diff --git a/.github/workflows/clang-format_check.yml b/.github/workflows/clang-format_check.yml index 8374d4d..7b2c58e 100644 --- a/.github/workflows/clang-format_check.yml +++ b/.github/workflows/clang-format_check.yml @@ -1,10 +1,10 @@ -name: clang-format Check -on: +name: Run clang-format Check +on: + workflow_dispatch: push: branches: [main, develop] pull_request: branches: [main, develop] -# on: workflow_dispatch jobs: formatting-check: name: Formatting Check @@ -18,7 +18,7 @@ jobs: exclude: '(template|unity|hw_test)' # Exclude file paths containing "template" or "unity" steps: - - uses: actions/checkout@v4.1.0 + - uses: actions/checkout@v4.1.1 - name: Run clang-format style check for C/C++/Protobuf programs. uses: jidicula/clang-format-action@v4.11.0 with: diff --git a/.github/workflows/run_cppcheck.yml b/.github/workflows/run_cppcheck.yml new file mode 100644 index 0000000..926d65e --- /dev/null +++ b/.github/workflows/run_cppcheck.yml @@ -0,0 +1,49 @@ +name: Run cppcheck-action +on: + workflow_dispatch: + push: + branches: [main, develop] + pull_request: + branches: [main, develop] + +jobs: + cppcheck-annotations_scr: + name: cppcheck-annotations /src + runs-on: ubuntu-latest + steps: + - name: Checkout + uses: actions/checkout@v4.1.1 + + - name: Run cppcheck-annotation-action for src + uses: Konstantin343/cppcheck-annotation-action@v1.0 + with: + std: 'c99' + platform: 'unix64' + log-level: 'verbose' + sources: './src' + annotation-failures: 'warning' + # suppress: 'unusedFunction' + # annotation-level-default: 'error' + - name: Annotate lines with errors src + uses: yuzutech/annotations-action@v0.4.0 + with: + repo-token: "${{ secrets.GITHUB_TOKEN }}" + title: 'Results of CppCheck src files' + input: 'annotations.json' + - name: Run cppcheck-annotation-action for tests + uses: Konstantin343/cppcheck-annotation-action@v1.0 + with: + std: 'c99' + platform: 'unix64' + log-level: 'verbose' + sources: './test/lcd_hd44780' + annotation-failures: 'warning' + # suppress: 'unusedFunction' + # annotation-level-default: 'error' + - name: Annotate lines with errors test_src + uses: yuzutech/annotations-action@v0.4.0 + with: + repo-token: "${{ secrets.GITHUB_TOKEN }}" + title: 'Results of CppCheck test lcd_hd44780 files' + input: 'annotations.json' + diff --git a/.github/workflows/run_lcd_hd44780_test .yml b/.github/workflows/run_lcd_hd44780_test .yml index d6bd2de..cffd555 100644 --- a/.github/workflows/run_lcd_hd44780_test .yml +++ b/.github/workflows/run_lcd_hd44780_test .yml @@ -1,21 +1,17 @@ name: Run LCD HD44780 Unit Tests -# on: [push, pull_request] -# on: workflow_dispatch -on: +on: + workflow_dispatch: push: branches: [main, develop] pull_request: branches: [main, develop] jobs: LCD_HD44780_test_running_win: - name: LCD HD44780 Test RUN + name: LCD HD44780 Unit Test RUN on Win runs-on: windows-latest - # strategy: - # matrix: - # os: [ubuntu-latest, windows-latest] steps: - name: Checkout code - uses: actions/checkout@v4.0.0 + uses: actions/checkout@v4.1.1 with: submodules: recursive @@ -29,20 +25,16 @@ jobs: cmake -Bout -GNinja cmake --build out - # - name: List files - # working-directory: test/lcd_hd44780/out - # run: dir - - name: Run LCD HD44780 tests working-directory: test/lcd_hd44780/out run: ./lcd_hd44780_test.exe -v LCD_HD44780_AVR_test_running_win: - name: LCD HD44780 AVR Test RUN + name: LCD HD44780 for AVR Unit Test RUN on Win runs-on: windows-latest steps: - name: Checkout code - uses: actions/checkout@v4.0.0 + uses: actions/checkout@v4.1.1 with: submodules: recursive @@ -56,20 +48,16 @@ jobs: cmake -S ./avr_code_test -B out_avr -GNinja cmake --build out_avr - # - name: List files - # working-directory: test/lcd_hd44780/out - # run: dir - - name: Run LCD HD44780 tests working-directory: test/lcd_hd44780/out_avr run: ./lcd_hd44780_test.exe -v LCD_HD44780_test_running_ubuntu: - name: LCD HD44780 Test RUN Ubuntu + name: RUN LCD HD44780 Unit Test on Ubuntu runs-on: ubuntu-latest steps: - name: Checkout code - uses: actions/checkout@v4.0.0 + uses: actions/checkout@v4.1.1 with: submodules: recursive @@ -83,10 +71,6 @@ jobs: cmake -Bout -GNinja cmake --build out - # - name: List files - # working-directory: test/lcd_hd44780/out - # run: dir - - name: Run LCD HD44780 tests working-directory: test/lcd_hd44780/out run: ./lcd_hd44780_test -v diff --git a/.github/workflows/run_lizard_lib_check.yml b/.github/workflows/run_lizard_lib_check.yml new file mode 100644 index 0000000..f82fdc1 --- /dev/null +++ b/.github/workflows/run_lizard_lib_check.yml @@ -0,0 +1,23 @@ +name: Run Lizard Library Check +on: + workflow_dispatch: + push: + branches: [main, develop] + pull_request: + branches: [main, develop] +jobs: + lizard: + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v4.1.1 + - name: Lizard Runner + uses: Uno-Takashi/Lizard-Runner@v3 + with: + path: "./src" + CCN: "12" + Threshold: "nloc=30" + language: "cpp" + verbose: "true" + arguments: "4" + + diff --git a/.github/workflows/run_template_test.yml b/.github/workflows/run_template_test.yml index e954f78..16dcf8b 100644 --- a/.github/workflows/run_template_test.yml +++ b/.github/workflows/run_template_test.yml @@ -1,6 +1,10 @@ -name: Run Unit Tests -# on: [push, pull_request] -on: workflow_dispatch +name: Run Template Unit Tests +on: + workflow_dispatch: + # push: + # branches: [main, develop] + # pull_request: + # branches: [main, develop] jobs: template_test_running: name: Template Test RUN @@ -10,7 +14,7 @@ jobs: # os: [ubuntu-latest, windows-latest] steps: - name: Checkout code - uses: actions/checkout@v4.0.0 + uses: actions/checkout@v4.1.1 with: submodules: recursive diff --git a/.github/workflows/self_hosted_test_not_ready.yml b/.github/workflows/self_hosted_test_not_ready.yml index 60b3873..1edf7fe 100644 --- a/.github/workflows/self_hosted_test_not_ready.yml +++ b/.github/workflows/self_hosted_test_not_ready.yml @@ -1,13 +1,17 @@ name: self-hosted test -# on: [push, pull_request] -on: workflow_dispatch +on: + workflow_dispatch: + # push: + # branches: [main, develop] + # pull_request: + # branches: [main, develop] jobs: formatting_check_docker_runner: name: Gcc_test runs-on: test-runner steps: - name: Checkout - uses: actions/checkout@v4.1.0 + uses: actions/checkout@v4.1.1 - name: test run: arm-none-eabi-gcc --version diff --git a/.gitignore b/.gitignore index a81b62c..9ef128b 100644 --- a/.gitignore +++ b/.gitignore @@ -3,7 +3,7 @@ out_avr/ Release/ Debug/ Build/ -.vscode/settings.json +.vscode/ # HW test ingnored files .metadata/ .cproject @@ -13,3 +13,4 @@ Build/ + diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json deleted file mode 100644 index feb4fa7..0000000 --- a/.vscode/c_cpp_properties.json +++ /dev/null @@ -1,51 +0,0 @@ -{ - "configurations": [ - { - "name": "windows-gcc-x64", - "includePath": [ - "${workspaceFolder}/**" - ], - "defines": [ - "_DEBUG", - "UNICODE", - "_UNICODE" - ], - "compilerPath": "C:/Qt_6_5/Tools/mingw1120_64/bin/gcc.exe", - "cStandard": "${default}", - "cppStandard": "${default}", - "intelliSenseMode": "windows-gcc-x64" - }, - { - "name": "AVR-GCC ATMega328P", - "includePath": [ - "${workspaceFolder}/**", - "D:/19_EMBEDED_TOOLS/1_AVR_toolchain/avr/include/**" - ], - "defines": [ - "_DEBUG", - "UNICODE", - "_UNICODE", - "__AVR_ATmega3250P__", - "AVR" - ], - "cppStandard": "gnu++17", - "compilerPath": "D:\\19_EMBEDED_TOOLS\\1_AVR_toolchain\\bin\\avr-gcc.exe", - "cStandard": "c99" - }, - { - "name": "ARM-GCC", - "includePath": [ - "${workspaceFolder}/**" - ], - "defines": [ - "_DEBUG", - "UNICODE", - "_UNICODE" - ], - "cppStandard": "gnu++17", - "compilerPath": "C:\\ST\\STM32CubeCLT\\GNU-tools-for-STM32\\bin\\arm-none-eabi-gcc.exe", - "cStandard": "c99" - } - ], - "version": 4 -} \ No newline at end of file diff --git a/.vscode/launch.json b/.vscode/launch.json deleted file mode 100644 index 109429f..0000000 --- a/.vscode/launch.json +++ /dev/null @@ -1,24 +0,0 @@ -{ - "version": "0.2.0", - "configurations": [ - { - "name": "C/C++ Runner: Debug Session", - "type": "cppdbg", - "request": "launch", - "args": [], - "stopAtEntry": false, - "externalConsole": true, - "cwd": "d:/0_Projekty/6_Biblioteki/LCD_HD44780/test/lcd_hd44780", - "program": "d:/0_Projekty/6_Biblioteki/LCD_HD44780/test/lcd_hd44780/build/Debug/outDebug", - "MIMode": "gdb", - "miDebuggerPath": "gdb", - "setupCommands": [ - { - "description": "Enable pretty-printing for gdb", - "text": "-enable-pretty-printing", - "ignoreFailures": true - } - ] - } - ] -} \ No newline at end of file diff --git a/.vscode/tasks.json b/.vscode/tasks.json deleted file mode 100644 index e876618..0000000 --- a/.vscode/tasks.json +++ /dev/null @@ -1,139 +0,0 @@ -{ - // See https://go.microsoft.com/fwlink/?LinkId=733558 - // for the documentation about the tasks.json format - "version": "2.0.0", - "tasks": [ - { - "label": "build lcd_hd44780_test", - "type": "shell", - "command": "make", - "args": [ - "all", - "-j12", - "-o lcd_hd44780.o" - - ], - "options": { - "cwd": "${workspaceFolder}/test/lcd_hd44780/out" - }, - "group": { - "kind": "build", - "isDefault": true - }, - // "problemMatcher": [], - // "dependsOn":["run lizard test"], - }, - { - "label": "clean lcd_hd44780_test", - "type": "shell", - "command": "make clean", - "args": [], - "options": { - "cwd": "${workspaceFolder}/test/lcd_hd44780/out" - }, - "group": { - "kind": "build", - "isDefault": true - } - }, - { - "type": "shell", - "label": "run lcd_hd44780_test", - "command": "./lcd_hd44780_test.exe", - "args": [], - "options": { - "cwd": "${workspaceFolder}/test/lcd_hd44780/out" - }, - "group": "test" - }, - { - "type": "shell", - "label": "UBUNTU run lcd_hd44780_test", - "command": "./lcd_hd44780_test", - "args": [], - "options": { - "cwd": "${workspaceFolder}/test/lcd_hd44780/out" - }, - "group": "test" - }, - { - "label": "run lizard test", - "type": "shell", - "command": "lizard src/ --CCN 12 -Tnloc=30 -a 4 --languages cpp -V -w -i 1", - "args": [], - "options": { - "cwd": "${workspaceFolder}" - }, - "group": "test", - - }, - { - "label": "run lizard test with report", - "type": "shell", - "command": "lizard src/ --CCN 12 -Tnloc=30 -a 4 --languages cpp -V -o reports/Cyclomatic_Complexity/Lizard_report.html", - "args": [], - "options": { - "cwd": "${workspaceFolder}" - }, - "group": "test", - - }, - { - "label": "run cppcheck for src", - "type": "shell", - "command": "cppcheck", - "args": [ - // ".", // option for whole project - "src/", - // "-itest/unity/", //suppress directory test/unity/ - // "-itest/template/", //suppress directory test/template/ - "--enable=all", - "--inconclusive", - "--force" , - "--inline-suppr", - // "--output-file=reports/cppcheck.out", // this will print out report instead of printing problems in terminal - "--platform=win64", - "--suppress=missingInclude", - "--suppress=missingIncludeSystem", - "--suppress=unusedFunction", - ], - "options": { - "cwd": "${workspaceFolder}" - }, - "group": "test", - }, - { // to use it replace "template" with specific module and provide whole"directory_to_your_project_folder" for exampel "D_/Projects/Project_a" D:/0_Projekty/6_Biblioteki/LCD_HD44780/ - "label": "UBUNTU lcd_hd44780 code coverage report generation", - "type": "shell", - "command": "python3 -m gcovr CMakeFiles/lcd_hd44780_test.dir/home/sandra/Pulpit/test/LCD_HD44780 -r ../../.. --html-details ../../../reports/Code_Coverage/lcd_hd44780_gcov_report.html", - "args": [], - "options": { - "cwd": "${workspaceFolder}/test/lcd_hd44780/out" - }, - "group": "test", - - }, - { // to use it replace "template" with specific module and provide whole"directory_to_your_project_folder" for exampel "D_/Projects/Project_a" D:/0_Projekty/6_Biblioteki/LCD_HD44780/ - "label": "lcd_hd44780 code coverage report generation", - "type": "shell", - "command": "python3 -m gcovr CMakeFiles/lcd_hd44780_test.dir/home/sandra/Pulpit/test/LCD_HD44780 -r ../../.. --html-details ../../../reports/Code_Coverage/lcd_hd44780_gcov_report.html", - "args": [], - "options": { - "cwd": "${workspaceFolder}/test/lcd_hd44780/out" - }, - "group": "test", - - } - // { // to use it replace "template" with specific module and provide whole"directory_to_your_project_folder" for exampel "D_/Projects/Project_a" - // "label": "template module.c code coverage report generation", - // "type": "shell", - // "command": "python3 -m gcovr CMakeFiles/template_test.dir/directory_to_your_project_folder -r ../../.. --html-details ../../../reports/Code_Coverage/template_gcov_report.html", - // "args": [], - // "options": { - // "cwd": "${workspaceFolder}/test/template/out" - // }, - // "group": "test", - - // }, - ] -} \ No newline at end of file diff --git a/LICENSE b/LICENSE new file mode 100644 index 0000000..b08e9b3 --- /dev/null +++ b/LICENSE @@ -0,0 +1,21 @@ +MIT License + +Copyright (c) 2023 niwciu + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/ReadMe.md b/ReadMe.md new file mode 100644 index 0000000..be9aeff --- /dev/null +++ b/ReadMe.md @@ -0,0 +1,707 @@ +# LCD HD44780 lib - simple cross-platform C library +- [LCD HD44780 lib - simple cross-platform C library](#lcd-hd44780-lib---simple-cross-platform-c-library) + - [Features](#features) + - [Hardware configuration](#hardware-configuration) + - [1. Requirements](#1-requirements) + - [2. Schematic for possible hardware configurations](#2-schematic-for-possible-hardware-configurations) + - [LCD\_HD44780 library src folders file structure and description](#lcd_hd44780-library-src-folders-file-structure-and-description) + - [1. lcd\_hd44780\_config.h](#1-lcd_hd44780_configh) + - [2. lcd\_hd44780\_def\_char.h](#2-lcd_hd44780_def_charh) + - [3. lcd\_hd44780\_interface.h](#3-lcd_hd44780_interfaceh) + - [4. lcd\_hd44780.c](#4-lcd_hd44780c) + - [5. lcd\_hd44780.h](#5-lcd_hd44780h) + - [Examples](#examples) + - [1. STM32G071RB -bare metal implementation](#1-stm32g071rb--bare-metal-implementation) + - [Requirements for compiling and running the example:](#requirements-for-compiling-and-running-the-example) + - [Hardware requirements, configuration, and connections](#hardware-requirements-configuration-and-connections) + - [LCD\_HD44780 library configuration - lcd\_hd44780\_config.h](#lcd_hd44780-library-configuration---lcd_hd44780_configh) + - [How to build and run the example](#how-to-build-and-run-the-example) + - [2. STM32G474 - STMCubeIDE project generated with LL drivers](#2-stm32g474---stmcubeide-project-generated-with-ll-drivers) + - [Requirements for compiling and running the example](#requirements-for-compiling-and-running-the-example-1) + - [Hardware configuration and connections](#hardware-configuration-and-connections) + - [LCD\_HD44780 library configuration - lcd\_hd44780\_config.h](#lcd_hd44780-library-configuration---lcd_hd44780_configh-1) + - [How to build and run the example](#how-to-build-and-run-the-example-1) + - [3. AVR ATmega 328P](#3-avr-atmega-328p) + - [Requirements for compiling and running the example](#requirements-for-compiling-and-running-the-example-2) + - [Hardware configuration and connections](#hardware-configuration-and-connections-1) + - [LCD\_HD44780 library configuration - lcd\_hd44780\_config.h](#lcd_hd44780-library-configuration---lcd_hd44780_configh-2) + - [How to build and run the example](#how-to-build-and-run-the-example-2) + - [4. ESP8266 NONOS SDK - TBD ...](#4-esp8266-nonos-sdk---tbd-) + - [Requirements](#requirements) + - [Hardware connections](#hardware-connections) + - [LCD\_HD44780 library configuration - lcd\_hd44780\_config.h](#lcd_hd44780-library-configuration---lcd_hd44780_configh-3) + - [How to build and run the example](#how-to-build-and-run-the-example-3) + - [Windows](#windows) + - [Linux - tbd](#linux---tbd) + - [How to use in your Project - simple case without user-predefined characters](#how-to-use-in-your-project---simple-case-without-user-predefined-characters) + - [How to use in your Project- simple case with user-predefined characters](#how-to-use-in-your-project--simple-case-with-user-predefined-characters) + - [How to define custom characters and custom character banks.](#how-to-define-custom-characters-and-custom-character-banks) + - [Example of Correspondence between EPROM Address Data and Character Pattern (5 × 8 Dots)](#example-of-correspondence-between-eprom-address-data-and-character-pattern-5--8-dots) + - [Defining special characters in code.](#defining-special-characters-in-code) + - [Defining banks for special characters.](#defining-banks-for-special-characters) + - [Project main folders file structure](#project-main-folders-file-structure) + +## Features +- Works with LCD connected in 4-bit mode, +- One-direction or bi-direction communication with LCD (predefined time slots or LCD RW pin usage) +- Easy to port on different microcontrollers +- Contain examples of porting to STM32, AVR, ESP8266 +- Allows to display strings/chars directly on LCD +- Allows to put strings/chars in buffer and refresh LCD periodically with buffer content +- Allows to define custom chars (more than 8) as well as custom char banks where different combinations of custom characters can be easily loaded to LCD CGRAM +- Contain functions for displaying on LCD int values as a string representing: + - int format + - hex format + - bin format +- The library has currently predefined LCD types: + - 2 lines 16 characters (1602) + - 4 lines 16 characters (1604) + - 4 lines 20 characters (2004) +- Allows to configure and compile only functionality that will be needed in the project +- Allows to control LCD backlight +## Hardware configuration +### 1. Requirements +- LCD should be connected to uC in 4bit mode +- LCD RW Pin can be connected to uC or GND -> user must define specific options in library configuration. +- LCD data pins D4-D7 and LCD signal pins can be connected to any pins on any ports on uC side. +### 2. Schematic for possible hardware configurations +- Using RW pin of the LCD (set **USE_RW_PIN   ON** in lcd_hd44780_config.h)

+


+- Without using RW pin of the LCD (set **USE_RW_PIN   OFF** in lcd_hd44780_config.h) +

+

+## LCD_HD44780 library src folders file structure and description +```bash +LCD_HD44780 +├───src +│ ├───lcd_hd44780_config.h +│ ├───lcd_hd44780_def_char.h +│ ├───lcd_hd44780_interface.h +│ ├───lcd_hd44780.c +│ ├───lcd_hd44780.h +... +``` +#### 1. lcd_hd44780_config.h + Header file for configuration of the library. In this file, it's required to configure: + - LCD type + - Usage of RW Signal/PIN + - Usage of LCD buffer for displaying the content on the LCD + - Which functions from LCD_HD44780 lib you would like to compile and use in your project. +#### 2. lcd_hd44780_def_char.h +Header file for defining user special characters and user special characters banks. Each bank can contain up to 8 characters that are user-defined combinations of characters from defined user-special characters. This allows to creation of different combinations of special characters that can be loaded depending on current code needs. +#### 3. lcd_hd44780_interface.h +Header file with library interface declaration that needs to be implemented on the drivers' side. Please look at the code examples in the "examples" folder and search for the "LCD_IO_driver.c" file for more details. +#### 4. lcd_hd44780.c +Library main C file +#### 5. lcd_hd44780.h +Library main header file with available library functions. +## Examples +### 1. STM32G071RB -bare metal implementation +#### Requirements for compiling and running the example: + 1. CMake installed + 2. Make or Ninja installed + 3. ARM GNU Toolchain (gcc-arm-none-eabi) installed + 4. STM32_Programmer_CLI installed + 5. ST-link (on Nucleo Board) installed +#### Hardware requirements, configuration, and connections + 1. STM32G071 Nucleo-64
+

+ 2. LCD Keypad Shield for Arduino
+

+ 3. Pin connection between LCD Keypad Shield and Nucleo board
+

+#### LCD_HD44780 library configuration - lcd_hd44780_config.h + ```C + /************************************ LCD HARDWARE SETTINGS ******************************* + * LCD_TYPE -> Set one of the predefined types: + * 2004 -> 4 lines 20 characters per line + * 1604 -> 4 lines 16 characters per line + * 1602 -> 2 lines 16 characters per line + * USE_RW_PIN -> Defines HW connection between LCD and uC + * ON - when the RW pin is connected + * OFF - when the RW pin is not connected + ********************************************************************************************/ + #define LCD_TYPE 1602 + #define USE_RW_PIN OFF + + #define LCD_BCKL_PIN_EN_STATE HIGH + + #define LCD_BUFFERING ON + ``` + + ```C + /******************************** LCD LIBRARY COMPILATION SETTINGS ************************ + * Setting USE_(procedure name) to: + * ON - add specific procedure to compilation + * OFF - exclude specific procedure from compilation + ********************************************************************************************/ + #define USE_DEF_CHAR_FUNCTION ON + #define USE_LCD_INT ON + #define USE_LCD_HEX ON + #define USE_LCD_BIN ON + + #define USE_LCD_CURSOR_HOME ON + #define USE_LCD_CURSOR_ON ON + #define USE_LCD_CURSOR_OFF ON + #define USE_LCD_BLINKING_CURSOR_ON ON + + #if LCD_BUFFERING == ON + #define USE_LCD_BUF_INT ON + #define USE_LCD_BUF_HEX ON + #define USE_LCD_BUF_BIN ON + #endif + ``` +#### How to build and run the example + 1. Open the location you want to clone the repository to in your terminal + 2. Clone the repository to your preferred localization + ```bash + git clone https://github.com/niwciu/LCD_HD44780.git + ``` + 3. Enter to LCD_HD44780/examples/STM32G071RB/ + ```bash + cd ./LCD_HD44780/examples/STM32G071RB + ``` + 4. For make type: + ```bash + cmake -S ./ -B Debug -G"Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug + ``` + ```bash + cd Debug + ``` + ```bash + make all + ``` + ```bash + make flash + ``` + 5. For Ninja type: + ```bash + cmake -S ./ -B Debug -G"Ninja" -DCMAKE_BUILD_TYPE=Debug + ``` + ```bash + cd Debug + ``` + ```bash + ninja + ``` + ```bash + ninja flash + ``` + 6. In some cases Nucleo board requires plugging out and in a USB port to run the program. + +### 2. STM32G474 - STMCubeIDE project generated with LL drivers +#### Requirements for compiling and running the example + 1. CMake installed + 2. Make or Ninja installed + 3. ARM GNU Toolchain (gcc-arm-none-eabi) installed + 4. STM32_Programmer_CLI installed + 5. ST-link (on Nucleo Board) installed +#### Hardware configuration and connections + 1. STM32G474 Nucleo-64
+

+ 2. LCD Keypad Shield for Arduino
+

+ 3. Pin connection between LCD Keypad Shield and Nucleo board
+

+#### LCD_HD44780 library configuration - lcd_hd44780_config.h + ```C + /************************************ LCD HARDWARE SETTINGS ******************************* + * LCD_TYPE -> Set one of the predefined types: + * 2004 -> 4 lines 20 characters per line + * 1604 -> 4 lines 16 characters per line + * 1602 -> 2 lines 16 characters per line + * USE_RW_PIN -> Defines HW connection between LCD and uC + * ON - when the RW pin is connected + * OFF - when the RW pin is not connected + ********************************************************************************************/ + #define LCD_TYPE 1602 + #define USE_RW_PIN OFF + + #define LCD_BCKL_PIN_EN_STATE HIGH + + #define LCD_BUFFERING ON + ``` + + ```C + /******************************** LCD LIBRARY COMPILATION SETTINGS ************************ + * Setting USE_(procedure name) to: + * ON - add specific procedure to compilation + * OFF - exclude specific procedure from compilation + ********************************************************************************************/ + #define USE_DEF_CHAR_FUNCTION ON + #define USE_LCD_INT ON + #define USE_LCD_HEX ON + #define USE_LCD_BIN ON + + #define USE_LCD_CURSOR_HOME ON + #define USE_LCD_CURSOR_ON ON + #define USE_LCD_CURSOR_OFF ON + #define USE_LCD_BLINKING_CURSOR_ON ON + + #if LCD_BUFFERING == ON + #define USE_LCD_BUF_INT ON + #define USE_LCD_BUF_HEX ON + #define USE_LCD_BUF_BIN ON + #endif + ``` +#### How to build and run the example + 1. Open the location you want to clone the repository to in your terminal + 2. Clone the repository to your preferred localization + ```bash + git clone https://github.com/niwciu/LCD_HD44780.git + ``` + 3. Enter to LCD_HD44780/examples/STM32G474RB/ + ```bash + cd ./LCD_HD44780/examples/STM32G474RB + ``` + 4. For make type: + ```bash + cmake -S ./ -B Debug -G"Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug + ``` + ```bash + cd Debug + ``` + ```bash + make all + ``` + ```bash + make flash + ``` + 5. For Ninja type: + ```bash + cmake -S ./ -B Debug -G"Ninja" -DCMAKE_BUILD_TYPE=Debug + ``` + ```bash + cd Debug + ``` + ```bash + ninja + ``` + ```bash + ninja flash + ``` + +### 3. AVR ATmega 328P +#### Requirements for compiling and running the example + 1. CMake installed + 2. Make or Ninja installed + 3. AVR 8-bit GNU Toolchain + 4. AVRdude Installed + 5. USBasp programmer installed and updated +#### Hardware configuration and connections + 1. Arduino UNO R3
+

+ 2. USBasp programmer
+

+ 3. LCD Keypad Shield for Arduino
+

+ 4. Pin connection between LCD Keypad Shield and Nucleo board
+

+#### LCD_HD44780 library configuration - lcd_hd44780_config.h + ```C + /************************************ LCD HARDWARE SETTINGS ******************************* + * LCD_TYPE -> Set one of the predefined types: + * 2004 -> 4 lines 20 characters per line + * 1604 -> 4 lines 16 characters per line + * 1602 -> 2 lines 16 characters per line + * USE_RW_PIN -> Defines HW connection between LCD and uC + * ON - when the RW pin is connected + * OFF - when the RW pin is not connected + ********************************************************************************************/ + #define LCD_TYPE 1602 + #define USE_RW_PIN OFF + + #define LCD_BCKL_PIN_EN_STATE HIGH + + #define LCD_BUFFERING ON + ``` + + ```C + /******************************** LCD LIBRARY COMPILATION SETTINGS ************************ + * Setting USE_(procedure name) to: + * ON - add specific procedure to compilation + * OFF - exclude specific procedure from compilation + ********************************************************************************************/ + #define USE_DEF_CHAR_FUNCTION ON + #define USE_LCD_INT ON + #define USE_LCD_HEX ON + #define USE_LCD_BIN ON + + #define USE_LCD_CURSOR_HOME ON + #define USE_LCD_CURSOR_ON ON + #define USE_LCD_CURSOR_OFF ON + #define USE_LCD_BLINKING_CURSOR_ON ON + + #if LCD_BUFFERING == ON + #define USE_LCD_BUF_INT ON + #define USE_LCD_BUF_HEX ON + #define USE_LCD_BUF_BIN ON + #endif + ``` +#### How to build and run the example + 1. Open the location you want to clone the repository to in your terminal + 2. Clone the repository to your preferred localization + ```bash + git clone https://github.com/niwciu/LCD_HD44780.git + ``` + 3. Enter to LCD_HD44780/examples/ATMEGA328P_ARDUINO_UNO_R3 folder + ```bash + cd ./LCD_HD44780/examples/ATMEGA328P_ARDUINO_UNO_R3 + ``` + 4. For make type: + ```bash + cmake -S ./ -B Build -G"Unix Makefiles" + ``` + ```bash + cd Build + ``` + ```bash + make all + ``` + ```bash + make write_fuses + ``` + ```bash + make flash + ``` + 5. For Ninja type: + ```bash + cmake -S ./ -B Build -G"Ninja" + ``` + ```bash + cd Build + ``` + ```bash + ninja + ``` + ```bash + ninja write_fuses + ``` + ```bash + ninja flash + ``` + +### 4. ESP8266 NONOS SDK - TBD ... +#### Requirements + 1. Make installed + 2. ESP Toolchain installed according to esspresif doc + - For Windows:
+ https://docs.espressif.com/projects/esp8266-rtos-sdk/en/latest/get-started/windows-setup.html + - For Linux:
+ https://docs.espressif.com/projects/esp8266-rtos-sdk/en/latest/get-started/linux-setup.html + 3. Downloaded Flash Download Tool V3.8.5 + 4. ESP8266 node mcu V3 installed +#### Hardware connections + 1. ESP8266 NodeMCU V3
+

+ 2. LCD Keypad Shield for Arduino
+

+ 3. Pin connection between LCD Keypad Shield and ESP8266 NoneMCU board
+

+#### LCD_HD44780 library configuration - lcd_hd44780_config.h + ```C + /************************************ LCD HARDWARE SETTINGS ******************************* + * LCD_TYPE -> Set one of the predefined types: + * 2004 -> 4 lines 20 characters per line + * 1604 -> 4 lines 16 characters per line + * 1602 -> 2 lines 16 characters per line + * USE_RW_PIN -> Defines HW connection between LCD and uC + * ON - when the RW pin is connected + * OFF - when the RW pin is not connected + ********************************************************************************************/ + #define LCD_TYPE 1602 + #define USE_RW_PIN OFF + + #define LCD_BCKL_PIN_EN_STATE HIGH + + #define LCD_BUFFERING ON + ``` + + ```C + /******************************** LCD LIBRARY COMPILATION SETTINGS ************************ + * Setting USE_(procedure name) to: + * ON - add specific procedure to compilation + * OFF - exclude specific procedure from compilation + ********************************************************************************************/ + #define USE_DEF_CHAR_FUNCTION ON + #define USE_LCD_INT ON + #define USE_LCD_HEX ON + #define USE_LCD_BIN ON + + #define USE_LCD_CURSOR_HOME ON + #define USE_LCD_CURSOR_ON ON + #define USE_LCD_CURSOR_OFF ON + #define USE_LCD_BLINKING_CURSOR_ON ON + + #if LCD_BUFFERING == ON + #define USE_LCD_BUF_INT ON + #define USE_LCD_BUF_HEX ON + #define USE_LCD_BUF_BIN ON + #endif + ``` +#### How to build and run the example +##### Windows + 1. Open the location you want to clone the repository to in your terminal + 2. Clone the repository to your preferred localization + ```bash + git clone https://github.com/niwciu/LCD_HD44780.git + ``` + 3. Enter to LCD_HD44780/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST folder + ```bash + cd ./LCD_HD44780/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST + ``` + 4. Clean the project running clean.bat script + ```bash + ./clean.bat + ``` + 5. Build the project running build.bat script + ```bash + ./build.bat + ``` + 6. Run flash_download_tool_3.8.5 + 7. Select "Developer Mode" and "ESP8266 DownloadTool" in next window + 8. Set all fields as it is shown on picture bellow
+

+ 9. Select COM port on which your NodeMCU board has been installed + 10. Click START to flash the IC + 11. After Flash is done pres reset button on your NodeMCU board +##### Linux - tbd +## How to use in your Project - simple case without user-predefined characters +1. Copy LCD library src files (or files from src folder) to your project. +2. In lcd_hd44780.config.h + - Define specyfic **LCD_TYPE**
+    LCD_TYPE -> set one of the predefined types:
+       2004 -> 4 lines 20 characters per line
+       1604 -> 4 lines 16 characters per line
+       1602 -> 2 lines 16 characters per line
+ - Define usage of **RW Pin**
+    USE_RW_PIN -> Defines HW connection between LCD and uC
+       ON - when RW pin is connected
+       OFF - when RW pin is not connected
+ - Define HW setup for **LCD_BCKL_PIN**
+    LCD_BCKL_PIN_EN_STATE -> Defines active state for enabling LCD backlight
+       HIGH - when high state on output pin is required to enable LCD backlight
+       LOW - when low state on output pin is required to enable LCD backlight
+ - Define usage of LCD buffering functionality **LCD_BUFFERING**
+    LCD_BUFFERING -> Defines whether you would ike to use LCD buffer or write directly to LCD screen
+       ON - when buffering of LCD is planned to be use in project
+       OFF - when buffering of LCD is NOT planned to be use in project
+ + +3. Declare the LCD IO driver interface in your application on the GPIO driver side. This interface should contain the following implementation defined in lcd_hd44780_interface.h +```C + /************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + set_LCD_DATA_PINS_as_outputs, + set_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + _delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +``` +It's a basic interface that connects the library with your HW driver layer in the application without making any dependencies between them.
In **.examples/lcd_driver_intrface_example_implementations** folder you can find a template with empty definitions of all required interface elements as well as a few files with examples of implementations for different microcontrollers. Additional details of the implementation in the project can be also found in ready to compile examples. + + +## How to use in your Project- simple case with user-predefined characters +1. Copy LCD library src files (files from src folder) to your project +2. In lcd_hd44780.config.h + - Define specyfic **LCD_TYPE**
+    LCD_TYPE -> set one of the predefined types:
+       2004 -> 4 lines 20 characters per line
+       1604 -> 4 lines 16 characters per line
+       1602 -> 2 lines 16 characters per line
+ - Define usage of **RW Pin**
+    USE_RW_PIN -> Defines HW connection between LCD and uC
+       ON - when RW pin is connected
+       OFF - when RW pin is not connected
+ - Define HW setup for **LCD_BCKL_PIN**
+    LCD_BCKL_PIN_EN_STATE -> Defines active state for enabling LCD backlight
+       HIGH - when high state on output pin is required to enable LCD backlight
+       LOW - when low state on output pin is required to enable LCD backlight
+ - Define usage of LCD buffering functionality **LCD_BUFFERING**
+    LCD_BUFFERING -> Defines whether you would ike to use LCD buffer or write directly to LCD screen
+       ON - when buffering of LCD is planned to be use in project
+       OFF - when buffering of LCD is NOT planned to be use in project
+ +3. Specify which procedures from to library you would like to compile and use in your project.
+ To do this, Edit defines in section:
+ ```C + /******************************** LCD LIBRARY COMPILATION SETTINGS ************************ + * Setting USE_(procedure name) to: + * ON - add specific procedure to compilation + * OFF - exclude specific procedure from compilation + ********************************************************************************************/ + #define USE_DEF_CHAR_FUNCTION ON + #define USE_LCD_INT ON + #define USE_LCD_HEX ON + #define USE_LCD_BIN ON + + #define USE_LCD_CURSOR_HOME ON + #define USE_LCD_CURSOR_ON ON + #define USE_LCD_CURSOR_OFF ON + #define USE_LCD_BLINKING_CURSOR_ON ON + + #if LCD_BUFFERING == ON + #define USE_LCD_BUF_INT ON + #define USE_LCD_BUF_HEX ON + #define USE_LCD_BUF_BIN ON + #endif + ``` +
+4. If setting USE_DEF_CHAR_FUNCTION   ON define special characters and character banks in lcd_hd44780_def_char.h
For more details about defining custom char please refer to [How to define custom characters and custom character banks.](#how-to-define-custome-charatcters-and-custom-character-banks) +5. Declare the LCD IO driver interface in your application on the GPIO driver side. This interface should contain the following implementation defined in lcd_hd44780_interface.h
+
+ ```C + /************LCD_IO_driver_interface implementation START**************/ + static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + set_LCD_DATA_PINS_as_outputs, + set_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + _delay_us, + }; + const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) + { + return &LCD_IO_driver; + } + ``` +
+ It's a basic interface that connects the library with your HW driver layer in the application without making any dependencies between them.
In **.examples/lcd_driver_intrface_example_implementations** folder you can find a template with empty definitions of all required interface elements as well as a few files with examples of implementation for different microcontrollers. Additional details of the implementation in the project can be also found in ready to compile examples. +## How to define custom characters and custom character banks. +### Example of Correspondence between EPROM Address Data and Character Pattern (5 × 8 Dots) +
+
+### Defining special characters in code. +If the letter shown in the picture above should be defined as a special character its definition should look like this: +```C +static const uint8_t leter_b[8] = {16, 16, 22, 25, 17, 17, 30, 0}; +``` +### Defining banks for special characters. +HD44780 allows the user to define a maximum of 8 user characters. Therefore on character bank can contain only up to 8 characters. Nevertheless, it's possible to define a couple of special character banks with different combinations of special characters. Depending on needs one of the banks can be loaded to the CGRAM and switched to another if the information presented on the LCD requires different special characters + +Below you can find a simple example of two special characters bank definitions: +1. Definition of special characters in lcd_hd44780_def_char.h: + ```C + static const uint8_t Pol_e[8] = {0, 0, 14, 17, 31, 16, 14, 3}; + static const uint8_t Pol_o[8] = {2, 4, 14, 17, 17, 17, 14, 0}; + static const uint8_t Pol_s[8] = {2, 4, 14, 16, 14, 1, 30, 0}; + static const uint8_t Pol_l[8] = {12, 4, 6, 12, 4, 4, 14, 0}; + static const uint8_t Pol_c[8] = {2, 4, 14, 16, 16, 17, 14, 0}; + static const uint8_t Pol_a[8] = {0, 0, 14, 1, 15, 17, 15, 3}; + static const uint8_t Pol_n[8] = {2, 4, 22, 25, 17, 17, 17, 0}; + static const uint8_t Zn_wody[8] = {0, 0, 0, 6, 9, 2, 4, 15}; + static const uint8_t Pol_z1[8] = {4, 32, 31, 2, 4, 8, 31, 0}; + static const uint8_t Pol_z2[8] = {2, 4, 31, 2, 4, 8, 31, 0}; + ``` +2. Declaration of lcd_cgram_bank_1 in lcd_hd44780_def_char.h: + ```C + static const struct char_bank_struct lcd_cgram_bank_1 = + { + Pol_e, + Pol_o, + Pol_s, + Pol_l, + Pol_c, + Pol_a, + Pol_n, + Zn_wody + }; + enum LCD_CGRAM_BANK_1 + { + pol_e, + pol_o, + pol_s, + pol_l, + pol_c, + pol_a, + pol_n, + zn_wody, + }; + ``` +3. Declaration of lcd_cgram_bank_2 in lcd_hd44780_def_char.h: + ```C + static const struct char_bank_struct lcd_cgram_bank_1 = + { + Pol_e, + Pol_o, + Pol_s, + Pol_l, + Pol_c, + Pol_a, + Pol_z1, + Pol_z2 + }; + enum LCD_CGRAM_BANK_1 + { + pol_e, + pol_o, + pol_s, + pol_l, + pol_c, + pol_a, + pol_z1, + pol_z2, + }; + ``` +4. When special characters from bank_1 are needed to display content on an LCD screen, it's required to call in the code: + ```C + lcd_load_char_bank(&lcd_cgram_bank_1); + ``` +5. When special characters from bank_2 are required to display content on an LCD screen, then it's required to call in code: + ```C + lcd_load_char_bank(&lcd_cgram_bank_2); + ``` + + +## Project main folders file structure +```bash +LCD_HD44780 +├───.github +├───doc +├───examples +│ ├───ATMEGA328P_ARDUINO_UNO_R3 +│ ├───config +│ ├───doc +│ ├───lcd_driver_intrface_example_implementations +│ └───STM32G071RB_NUCLEO_BARE_METAL +│ └───STM32G474RE_NUCLEO_CUBE_IDE_LL +├───reports +│ ├───Code_Coverage +│ └───Cyclomatic_Complexity +├───src +└───test + ├───hw_test + │ ├───ATMEGA328P_ARDUINO_UNO_R3 + │ └───STM32F030R8_CUBE_IDE + ├───lcd_hd44780 + ├───template + └───unity +``` +Folder description: +- .github -> Folder with githubactions .yml scripts +- doc -> folder for any documentation needed or created in the project +- examples -> folder with example hardware implementations contain ready to compile examples for different uC and templates of lcd_driver_interface implementations. + - ATMEGA328P_ARDUINO_UNO_R3 -> example project + - config -> tollchain files + - doc -> documentation of used hardware in examples + - lcd_driver_intrface_example_implementations -> as named + - STM32G071RB_NUCLEO_BARE_METAL -> example project + - STM32G474RE_NUCLEO_CUBE_IDE_LL -> example project +- src -> library source files +- test -> folder where all tests are written. The folder contains following subfolders: + - hw_test -> folder with configurations/setups for specific ucontrollers to make integration tests + - lcd_hd44780 -> folder where all unit tests for lcd_hd44780 module are kept + - template -> empty setup for uint test (copy, paste, rename, edit for new module unit testing) + - unity -> unity framework + diff --git a/ReadMe.txt b/ReadMe.txt deleted file mode 100644 index 485b9ba..0000000 --- a/ReadMe.txt +++ /dev/null @@ -1,7 +0,0 @@ -Tools that are used along with this project template and need to be instaled -1) Lizard -> https://pypi.org/project/lizard/ -2) cppcheck -> https://cppcheck.sourceforge.io/ -3) gcc ->mingw -4) Ninja -5) Git -6) LLVM \ No newline at end of file diff --git a/doc/HW connection no RW.png b/doc/HW connection no RW.png new file mode 100644 index 0000000..171cdab Binary files /dev/null and b/doc/HW connection no RW.png differ diff --git a/doc/HW connection using RW.png b/doc/HW connection using RW.png new file mode 100644 index 0000000..1e85f58 Binary files /dev/null and b/doc/HW connection using RW.png differ diff --git a/doc/font map.png b/doc/font map.png new file mode 100644 index 0000000..92ff324 Binary files /dev/null and b/doc/font map.png differ diff --git a/hw/ATMEGA328P_ARDUINO_UNO_R3/.gitignore b/examples/ATMEGA328P_ARDUINO_UNO_R3/.gitignore similarity index 100% rename from hw/ATMEGA328P_ARDUINO_UNO_R3/.gitignore rename to examples/ATMEGA328P_ARDUINO_UNO_R3/.gitignore diff --git a/hw/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt b/examples/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt similarity index 72% rename from hw/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt rename to examples/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt index e3926e7..027a4cf 100644 --- a/hw/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt +++ b/examples/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt @@ -4,18 +4,22 @@ # # usage: Edit MCPU-Variable to suit STM32 project requirements. # For debug build using Unix Makefiles: -# cmake -S ./ -B Debug -G"Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug -# make -C Debug all (optional with VERBOSE=1 and -jxx ->xx numnber of cores) +# cmake -S ./ -B Build -G"Unix Makefiles" +# make -C Build all (optional with VERBOSE=1 and -jxx ->xx numnber of cores) # For debug build using Ninja: -# cmake -S ./ -B Debug -G"Ninja" -DCMAKE_BUILD_TYPE=Debug -# ninja -C Debug (optional with -V and -jxx ->xx numnber of cores) -# -# For release build Unix Makefiles: -# cmake -S ./ -B Release -G"Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -# make all -C Release VERBOSE=1 -j12 (optional with VERBOSE=1 and -jxx ->xx numnber of cores) -# For Release build using Ninja: -# cmake -S ./ -B Release -G"Ninja" -DCMAKE_BUILD_TYPE=Release -# ninja -C Release (optional -V and -jxx ->xx numnber of cores) +# cmake -S ./ -B Build -G"Ninja" -DCMAKE_BUILD_TYPE=Debug +# ninja -C Build (optional with -V and -jxx ->xx numnber of cores) +# additional custom targets for this project: +# Erase Atmega chip: +# 1. make erase / ninja erase +# Read Fuse Bits: +# 1. make write_fuses / ninja write_fuses +# Write Fuse Bits: +# 1. make write_fuses / ninja write_fuses +# Read Flash: +# 1. make read_flash / ninja read_flash +# Write Flash: +# 1. make flash / ninja flash ############################################################################################################################# cmake_minimum_required(VERSION 3.10) @@ -47,12 +51,17 @@ set(L_FUSE 0xfd) set(LOCK_BIT 0xff) set(INCLUDE_DIRS - ./inc + ./inc + ../../src ) set(C_SRCS ./src/main.c ./src/debug.c + ./src/LCD_IO_driver.c + + ../../src/lcd_hd44780.c + ) set(ASM_SRCS @@ -61,6 +70,7 @@ set(ASM_SRCS set(GLOBAL_DEFINES -DF_CPU=${F_CPU} +-DAVR # -DBAUD=${BAUD} ) diff --git a/hw/ATMEGA328P_ARDUINO_UNO_R3/inc/debug.h b/examples/ATMEGA328P_ARDUINO_UNO_R3/inc/debug.h similarity index 100% rename from hw/ATMEGA328P_ARDUINO_UNO_R3/inc/debug.h rename to examples/ATMEGA328P_ARDUINO_UNO_R3/inc/debug.h diff --git a/hw/ATMEGA328P_ARDUINO_UNO_R3/inc/project_config.h b/examples/ATMEGA328P_ARDUINO_UNO_R3/inc/project_config.h similarity index 88% rename from hw/ATMEGA328P_ARDUINO_UNO_R3/inc/project_config.h rename to examples/ATMEGA328P_ARDUINO_UNO_R3/inc/project_config.h index 0e3f5ca..750b67e 100644 --- a/hw/ATMEGA328P_ARDUINO_UNO_R3/inc/project_config.h +++ b/examples/ATMEGA328P_ARDUINO_UNO_R3/inc/project_config.h @@ -8,7 +8,7 @@ #define ON 1 #define OFF 0 -#define DEBUG_CONSOLE ON +#define DEBUG_CONSOLE OFF #ifdef __cplusplus } diff --git a/examples/ATMEGA328P_ARDUINO_UNO_R3/src/LCD_IO_driver.c b/examples/ATMEGA328P_ARDUINO_UNO_R3/src/LCD_IO_driver.c new file mode 100644 index 0000000..1ebced1 --- /dev/null +++ b/examples/ATMEGA328P_ARDUINO_UNO_R3/src/LCD_IO_driver.c @@ -0,0 +1,186 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-04 20:13:23 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-08 10:49:44 + */ + + +#include "lcd_hd44780_interface.h" +#include "lcd_hd44780_config.h" +#include +#include +#include + +#define LCD_DATA_PORT PORTD +#define LCD_DATA_PORT_DIR DDRD +#define LCD_DATA_INPUT PIND + +#define LCD_SIG_PORT PORTB +#define LCD_SIG_PORT_DIR DDRB + +#define LCD_BCKL_PORT PORTB +#define LCD_BCKL_PORT_DIR DDRB + +#define LCD_PIN_D7 (1 << PIND7) +#define LCD_PIN_D6 (1 << PIND6) +#define LCD_PIN_D5 (1 << PIND5) +#define LCD_PIN_D4 (1 << PIND4) +#define LCD_PIN_RS (1 << PINB0) +#define LCD_PIN_RW (1 << PINC1) +#define LCD_PIN_E (1 << PINB1) +#define LCD_BCKL_PIN (1 << PINB2) + +#define LCD_D4_MASK 0x01 +#define LCD_D5_MASK 0x02 +#define LCD_D6_MASK 0x04 +#define LCD_D7_MASK 0x08 + +static void init_LCD_data_and_SIG_pins(void); +static void init_LCD_DATA_PINS_as_outputs(void); +static void init_LCD_DATA_PINS_as_inputs(void); +static void set_LCD_DATA_PINS_state(uint8_t data); +static uint8_t get_LCD_DATA_PINS_state(void); +static void LCD_set_SIG(enum lcd_sig LCD_SIG); +static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +static void wraper_delay_us(uint32_t delay_us); +static void init_LCD_SIGNAL_PINS_as_outputs(void); + +/************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + init_LCD_DATA_PINS_as_outputs, + init_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + wraper_delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +/*************LCD_IO_driver_interface implementation END***************/ + +static void init_LCD_data_and_SIG_pins(void) +{ + //set BCKL PIN as output + LCD_BCKL_PORT_DIR |= LCD_BCKL_PIN; + //disable LCD backlight + LCD_BCKL_PORT &= ~ LCD_BCKL_PIN; + init_LCD_DATA_PINS_as_outputs(); + init_LCD_SIGNAL_PINS_as_outputs(); +} +static void init_LCD_DATA_PINS_as_outputs(void) +{ + //set pins as output + LCD_DATA_PORT_DIR |= (LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); +} +static void init_LCD_DATA_PINS_as_inputs(void) +{ + + //set pins as inputs + LCD_DATA_PORT_DIR &= ~(LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); + // enable pull-up on input pins + LCD_DATA_PORT |= (LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); +} + +static void set_LCD_DATA_PINS_state(uint8_t data) +{ + if ((data & LCD_D4_MASK)) + LCD_DATA_PORT |= LCD_PIN_D4; + else + LCD_DATA_PORT &= ~LCD_PIN_D4; + + if ((data & LCD_D5_MASK)) + LCD_DATA_PORT |= LCD_PIN_D5; + else + LCD_DATA_PORT &= ~LCD_PIN_D5; + + if ((data & LCD_D6_MASK)) + LCD_DATA_PORT |= LCD_PIN_D6; + else + LCD_DATA_PORT &= ~LCD_PIN_D6; + + if ((data & LCD_D7_MASK)) + LCD_DATA_PORT |= LCD_PIN_D7; + else + LCD_DATA_PORT &= ~LCD_PIN_D7; +} + +static uint8_t get_LCD_DATA_PINS_state(void) +{ + uint8_t data = 0; + if (LCD_DATA_INPUT & LCD_PIN_D4) + data = LCD_D4_MASK; + if (LCD_DATA_INPUT & LCD_PIN_D5) + data |= LCD_D5_MASK; + if (LCD_DATA_INPUT & LCD_PIN_D6) + data |= LCD_D6_MASK; + if (LCD_DATA_INPUT & LCD_PIN_D7) + data |= LCD_D7_MASK; + return data; +} + +static void LCD_set_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_SIG_PORT |= LCD_PIN_RS; + break; + case LCD_E: + LCD_SIG_PORT |= LCD_PIN_E; + break; +#if USE_RW_PIN == ON + case LCD_RW: + LCD_SIG_PORT |= LCD_PIN_RW; + break; +#endif + case LCD_BCKL: + LCD_SIG_PORT |= LCD_BCKL_PIN; + break; + default: + break; + } +} + +static void LCD_reset_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_SIG_PORT &= ~LCD_PIN_RS; + break; + case LCD_E: + LCD_SIG_PORT &= ~LCD_PIN_E; + break; +#if USE_RW_PIN == ON + case LCD_RW: + LCD_SIG_PORT &= ~LCD_PIN_RW; + break; +#endif + case LCD_BCKL: + LCD_SIG_PORT &= ~LCD_BCKL_PIN; + break; + default: + break; + } +} + +static void wraper_delay_us(uint32_t delay_us) +{ + _delay_us((double)(delay_us)); +} + +static void init_LCD_SIGNAL_PINS_as_outputs(void) +{ +#if USE_RW_PIN == ON + LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_RW | LCD_PIN_E); + +#else + LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_E); +#endif +} diff --git a/hw/ATMEGA328P_ARDUINO_UNO_R3/src/debug.c b/examples/ATMEGA328P_ARDUINO_UNO_R3/src/debug.c similarity index 100% rename from hw/ATMEGA328P_ARDUINO_UNO_R3/src/debug.c rename to examples/ATMEGA328P_ARDUINO_UNO_R3/src/debug.c diff --git a/examples/ATMEGA328P_ARDUINO_UNO_R3/src/main.c b/examples/ATMEGA328P_ARDUINO_UNO_R3/src/main.c new file mode 100644 index 0000000..7d4c86b --- /dev/null +++ b/examples/ATMEGA328P_ARDUINO_UNO_R3/src/main.c @@ -0,0 +1,92 @@ +#include +#include +#include +#include +#include +#include +#include "project_config.h" +#if DEBUG_CONSOLE == ON +#include "debug.h" +#endif +#include "lcd_hd44780.h" + +#define SHIFT_DELAY 300 + +const char *demo_tekst = {"Congratulation, you have just run LCD demo example."}; +const char *demo_title = {"LCD HD44780 Demo"}; + +static void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line, uint16_t speed); +static void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line, uint16_t speed); +static void blink_backlight(uint8_t blinks_no); + +uint8_t j = 0; +uint8_t i = 0; + +int main(void) +{ + +#if DEBUG_CONSOLE == ON + // Init the debug UART allowing us to use `printf` + debug_console_init(); +#endif + lcd_init(); + lcd_enable_backlight(); + lcd_buf_str(demo_title); + lcd_update(); + blink_backlight(3); + while (1) + { + lcd_buf_slide_str_in(demo_tekst, LINE_2, SHIFT_DELAY); + lcd_buf_slide_str_out(demo_tekst, LINE_2, SHIFT_DELAY); + } + return 0; +} + +static void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line, uint16_t speed) +{ + uint8_t str_end_flag = 0; + for (j = 0; j <= strlen(str); j++) + { + _delay_ms(speed); + lcd_buf_locate(lcd_line, C1); + for (i = 0; i < LCD_X; i++) + { + if ((str[j + i] != '\0') && (str_end_flag == 0)) + { + lcd_buf_char(str[j + i]); + } + else + { + str_end_flag = 0xFF; + lcd_buf_char(' '); + } + } + str_end_flag = 0; + lcd_update(); + } +} + +static void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line, uint16_t speed) +{ + for (i = LCD_X - 1; i > C1; i--) + { + _delay_ms(speed); + lcd_buf_locate(lcd_line, i); + for (uint8_t j = 0; j < (LCD_X - i); j++) + { + lcd_buf_char(str[j]); + } + lcd_update(); + } +} + +static void blink_backlight(uint8_t blinks_no) +{ + for(uint8_t i=0; i> ~/.ssh/id_rsa_base64 + - base64 --decode --ignore-garbage ~/.ssh/id_rsa_base64 > ~/.ssh/id_rsa + - chmod 600 ~/.ssh/id_rsa + - echo -e "Host gitlab.espressif.cn\n\tStrictHostKeyChecking no\n" >> ~/.ssh/config + - *install_compiler + +build_ssc: + <<: *build_template + artifacts: + paths: + - ./SSC/ssc_bin + expire_in: 6 mos + script: + - git clone $GITLAB_SSH_SERVER/yinling/SSC.git + - cd SSC + # ssc master branch does not support nonos any more, now checkout to the reserved branch + - git checkout ${SSC_DEFAULT_BRANCH} + - chmod +x gen_misc_non_os.sh + - ./gen_misc_non_os.sh + +build_at: + <<: *build_template + artifacts: + paths: + - ./bin/upgrade + - ./bin/*.bin + expire_in: 6 mos + script: + - cp -rf examples/at at + - cd at + - make COMPILE=gcc BOOT=new APP=1 SPI_SPEED=40 SPI_MODE=QIO SPI_SIZE_MAP=5 + +push_master_to_github: + stage: deploy + only: + - master + - /^release\/v.*$/ + tags: + - deploy + when: on_success + image: $CI_DOCKER_REGISTRY/esp8266-ci-env + variables: + GIT_STRATEGY: clone + GITHUB_PUSH_REFS: refs/remotes/origin/release refs/remotes/origin/master + script: + - mkdir -p ~/.ssh + - chmod 700 ~/.ssh + - echo -n $GH_PUSH_KEY > ~/.ssh/id_rsa_base64 + - base64 --decode --ignore-garbage ~/.ssh/id_rsa_base64 > ~/.ssh/id_rsa + - chmod 600 ~/.ssh/id_rsa + - echo -e "Host github.com\n\tStrictHostKeyChecking no\n" >> ~/.ssh/config + - git remote add github git@github.com:espressif/ESP8266_NONOS_SDK.git + # - git push --follow-tags github HEAD:master + - eval $(git for-each-ref --shell bash --format 'if [ $CI_COMMIT_SHA == %(objectname) ]; then git checkout -B %(refname:strip=3); git push --follow-tags github %(refname:strip=3); fi;' $GITHUB_PUSH_REFS) diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/Makefile b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/Makefile new file mode 100644 index 0000000..b01d653 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/Makefile @@ -0,0 +1,121 @@ +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of object file images to be generated () +# GEN_BINS - list of binaries to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +TARGET = eagle +#FLAVOR = release +FLAVOR = debug + +#EXTRA_CCFLAGS += -u + +ifndef PDIR # { +GEN_IMAGES= eagle.app.v6.out +GEN_BINS= eagle.app.v6.bin +SPECIAL_MKTARGETS=$(APP_MKTARGETS) +SUBDIRS= \ + user + +endif # } PDIR + +APPDIR = . +LDDIR = ../ld + +CCFLAGS += -Os + +TARGET_LDFLAGS = \ + -nostdlib \ + -Wl,-EL \ + --longcalls \ + --text-section-literals + +ifeq ($(FLAVOR),debug) + TARGET_LDFLAGS += -g -O2 +endif + +ifeq ($(FLAVOR),release) + TARGET_LDFLAGS += -g -O0 +endif + +COMPONENTS_eagle.app.v6 = \ + user/libuser.a + +LINKFLAGS_eagle.app.v6 = \ + -L../lib \ + -nostdlib \ + -T$(LD_FILE) \ + -Wl,--no-check-sections \ + -Wl,--gc-sections \ + -u call_user_start \ + -Wl,-static \ + -Wl,--start-group \ + -lc \ + -lgcc \ + -lhal \ + -lphy \ + -lpp \ + -lnet80211 \ + -llwip \ + -lwpa \ + -lcrypto \ + -lmain \ + -ldriver \ + $(DEP_LIBS_eagle.app.v6) \ + -Wl,--end-group + +DEPENDS_eagle.app.v6 = \ + $(LD_FILE) \ + $(LDDIR)/eagle.rom.addr.v6.ld + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# + +#UNIVERSAL_TARGET_DEFINES = \ + +# Other potential configuration flags include: +# -DTXRX_TXBUF_DEBUG +# -DTXRX_RXBUF_DEBUG +# -DWLAN_CONFIG_CCX +CONFIGURATION_DEFINES = -DICACHE_FLASH + +DEFINES += \ + $(UNIVERSAL_TARGET_DEFINES) \ + $(CONFIGURATION_DEFINES) + +DDEFINES += \ + $(UNIVERSAL_TARGET_DEFINES) \ + $(CONFIGURATION_DEFINES) + + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + +.PHONY: FORCE +FORCE: + diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/build.bat b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/build.bat new file mode 100644 index 0000000..8dd23ed --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/build.bat @@ -0,0 +1,31 @@ + + +@echo off +set PATH=C:/msys32/xtensa-lx106-elf/bin;C:/msys32/usr/bin;C:/msys32/mingw32/bin +echo ======================================================================= +echo UPDATING LIBRARY FILES +echo ======================================================================= +if not exist user ( + call mkdir user +) else ( + echo folder "user" exist +) +copy "..\..\..\src\lcd_hd44780.c" "user\" + +if not exist include ( + call mkdir include + echo folder "include" created +) else ( + echo folder "include" exist +) + +echo Copy files to include\lcd_hd44780\ +copy "..\..\..\src\lcd_hd44780.h" "include\" +copy "..\..\..\src\lcd_hd44780_interface.h" "include\" +copy "..\..\..\src\lcd_hd44780_def_char.h" "include\" +copy "..\..\..\src\lcd_hd44780_config.h" "include\" +echo ======================================================================= +echo BUILD PROJECT +echo ======================================================================= + +call make COMPILE=gcc BOOT=new APP=1 SPI_SPEED=40 SPI_MODE=DIO SPI_SIZE_MAP=6 all \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/build.sh b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/build.sh new file mode 100644 index 0000000..e3fe887 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/build.sh @@ -0,0 +1,7 @@ +#!/bin/bash -x +echo "make_lib.sh version 20160307" + +# $env:PATH = "C:/msys32/xtensa-lx106-elf/bin;C:/msys32/usr/bin;C:/msys32/mingw32/bin"; +export PATH="C:/msys32/xtensa-lx106-elf/bin;C:/msys32/usr/bin;C:/msys32/mingw32/bin" +make clean +make COMPILE=gcc BOOT=new APP=1 SPI_SPEED=40 SPI_MODE=DIO SPI_SIZE_MAP=6 all \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/clean.bat b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/clean.bat new file mode 100644 index 0000000..31df2a9 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/clean.bat @@ -0,0 +1,8 @@ + + +@echo off +set PATH=C:/msys32/xtensa-lx106-elf/bin;C:/msys32/usr/bin;C:/msys32/mingw32/bin +echo ======================================================================= +echo CLEAN PROJECT +echo ======================================================================= +call make clean \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780.h b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780.h new file mode 100644 index 0000000..d239d50 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780.h @@ -0,0 +1,62 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-06 21:40:29 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2024-01-10 14:00:22 + */ + +#ifndef _LCD_HD_44780_H_ +#define _LCD_HD_44780_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ +#include +#include "lcd_hd44780_config.h" +#include "lcd_hd44780_interface.h" +#include "lcd_hd44780_def_char.h" + + enum alignment + { + left, + right + }; + + extern bool LCD_UPDATE_EVENT; + + void lcd_init(void); + void lcd_enable_backlight(void); + void lcd_disable_backlight(void); + void lcd_cls(void); + + void lcd_def_char(const uint8_t CGRAM_bank_x_char_adr, const uint8_t *def_char); + void lcd_load_char_bank(const struct char_bank_struct *char_bank); + + void lcd_char(const char C); + void lcd_str(const char *str); + void lcd_int(int val, uint8_t width, enum alignment alignment); + void lcd_hex(int val, uint8_t width, enum alignment alignment); + void lcd_bin(int val, uint8_t width); + + void lcd_locate(enum LCD_LINES y, enum LCD_COLUMNS x); + + void lcd_home(void); + void lcd_cursor_on(void); + void lcd_cursor_off(void); + void lcd_blinking_cursor_on(void); + + void lcd_buf_cls(void); + void lcd_buf_char(const char c); + void lcd_buf_locate(enum LCD_LINES y, enum LCD_COLUMNS x); + void lcd_buf_str(const char *str); + void lcd_update(void); + + void lcd_buf_int(int val, uint8_t width, enum alignment alignment); + void lcd_buf_hex(int val, uint8_t width, enum alignment alignment); + void lcd_buf_bin(int val, uint8_t width); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ +#endif /* _LCD_HD_44780_H_ */ \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_config.h b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_config.h new file mode 100644 index 0000000..4e9b234 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_config.h @@ -0,0 +1,110 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-06 21:38:27 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2024-01-09 21:20:52 + */ + +#ifndef _LCD_HD44780_CONFIG_H_ +#define _LCD_HD44780_CONFIG_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + // clang-format off +#define ON 1 +#define OFF 0 +#define HIGH 1 +#define LOW 0 + +/************************************ LCD HARDWARE SETTINGS ******************************* + * LCD_TYPE -> Set one of the predefined types: + * 2004 -> 4 lines 20 characters per line + * 1604 -> 4 lines 16 characters per line + * 1602 -> 2 lines 16 characters per line + * USE_RW_PIN -> Defines HW connection between LCD and uC + * ON - when the RW pin is connected + * OFF - when the RW pin is not connected + ********************************************************************************************/ +#define LCD_TYPE 1602 +#define USE_RW_PIN OFF + +#define LCD_BCKL_PIN_EN_STATE HIGH + +#define LCD_BUFFERING ON + +//definitions of Line and column labels for lcd_locate +enum LCD_LINES +{ + LINE_1, + LINE_2, + #if ((LCD_TYPE==2004) ||(LCD_TYPE ==1604)) + LINE_3, + LINE_4, +#endif +}; +enum LCD_COLUMNS{ + C1,C2,C3,C4,C5,C6,C7,C8,C9,C10,C11,C12,C13,C14,C15,C16, +#if LCD_TYPE==2004 + C17,C18,C19,C20 +#endif +}; + +/******************************** LCD LIBRARY COMPILATION SETTINGS ************************ + * Setting USE_(procedure name) to: + * ON - add specific procedure to compilation + * OFF - exclude specific procedure from compilation +********************************************************************************************/ +#define USE_DEF_CHAR_FUNCTION ON +#define USE_LCD_INT ON +#define USE_LCD_HEX ON +#define USE_LCD_BIN ON + +#define USE_LCD_CURSOR_HOME ON +#define USE_LCD_CURSOR_ON ON +#define USE_LCD_CURSOR_OFF ON +#define USE_LCD_BLINKING_CURSOR_ON ON + +#if LCD_BUFFERING == ON +#define USE_LCD_BUF_INT ON +#define USE_LCD_BUF_HEX ON +#define USE_LCD_BUF_BIN ON +#endif + + +/******************** definitions of Line address for different LCD screens ****************/ +//https://web.alfredstate.edu/faculty/weimandn/lcd/lcd_addressing/lcd_addressing_index.html + +#if LCD_TYPE ==1604 +#define LCD_Y 4 +#define LCD_X 16 +#define LCD_LINE1_ADR 0x00 +#define LCD_LINE2_ADR 0x40 +#define LCD_LINE3_ADR 0x10 +#define LCD_LINE4_ADR 0x50 +#endif + +#if LCD_TYPE==2004 +#define LCD_Y 4 +#define LCD_X 20 +#define LCD_LINE1_ADR 0x00 +#define LCD_LINE2_ADR 0x40 +#define LCD_LINE3_ADR 0x14 +#define LCD_LINE4_ADR 0x54 +#endif + +#if LCD_TYPE==1602 +#define LCD_Y 2 +#define LCD_X 16 +#define LCD_LINE1_ADR 0x00 +#define LCD_LINE2_ADR 0x40 +#endif + + // clang-format on + +#ifdef __cplusplus +} +#endif /* __cplusplus */ +#endif /* _LCD_HD44780_CONFIG_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_def_char.h b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_def_char.h new file mode 100644 index 0000000..6156113 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_def_char.h @@ -0,0 +1,93 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-08 11:15:52 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-13 13:17:53 + */ + +#ifndef _LCD_HD44780_DEF_CHAR_H_ +#define _LCD_HD44780_DEF_CHAR_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + struct char_bank_struct + { + const uint8_t *char_0; + const uint8_t *char_1; + const uint8_t *char_2; + const uint8_t *char_3; + const uint8_t *char_4; + const uint8_t *char_5; + const uint8_t *char_6; + const uint8_t *char_7; + }; + +#if USE_DEF_CHAR_FUNCTION == ON +#define LCD_CGRAM_BYTES_PER_CHAR 8 +#define DEF_CHAR_ADR_MASK 7 + /**********************USER CHAR DEFINITIONS START*******************************/ + /******To sace flash when using defchar comment char definitions that are unused*/ + static const uint8_t Pol_e[8] = {32, 32, 14, 17, 31, 16, 14, 3}; + static const uint8_t Pol_o[8] = {2, 4, 14, 17, 17, 17, 14, 0}; + static const uint8_t Pol_s[8] = {2, 4, 14, 16, 14, 1, 30, 32}; + static const uint8_t Pol_l[8] = {12, 4, 6, 12, 4, 4, 14, 32}; + static const uint8_t Pol_c[8] = {2, 4, 14, 16, 16, 17, 14, 32}; + static const uint8_t Pol_a[8] = {32, 32, 14, 1, 15, 17, 15, 3}; + static const uint8_t Pol_n[8] = {2, 4, 22, 25, 17, 17, 17, 0}; + static const uint8_t Zn_wody[8] = {0, 0, 0, 6, 9, 2, 4, 15}; + // here add "definition" of new chars + /**********************USER CHAR DEFINITIONS END********************************/ + + /**********************USER CHAR CGRAM BANKS DEFINITIONS START*******************/ + static const struct char_bank_struct lcd_cgram_bank_1 = { + Pol_e, + Pol_o, + Pol_s, + Pol_l, + Pol_c, + Pol_a, + Pol_n, + Zn_wody}; + enum LCD_CGRAM_BANK_1 + { + pol_e, + pol_o, + pol_s, + pol_l, + pol_c, + pol_a, + pol_n, + zn_wody, + }; + // //here define new bank with adreses for chars that you want load to this specifci bank + // static const struct char_bank_struct lcd_cgram_bank_x = { + // Pol_e, + // Pol_o, + // Pol_s, + // Pol_l, + // Pol_c, + // Pol_a, + // Pol_n, + // Zn_wody}; + // // here define labels for lcd_cgram_bank_x + // enum LCD_CGRAM_BANK_x + // { + // pol_e_bank_x, + // pol_o_bank_x, + // pol_s_bank_x, + // pol_l_bank_x, + // pol_c_bank_x, + // pol_a_bank_x, + // pol_n_bank_x, + // zn_wody_bank_x, + // }; + /**********************USER CHAR CGRAM BANKS DEFINITIONS END*********************/ + +#endif // USE_DEF_CHAR_FUNC +#ifdef __cplusplus +} +#endif /* __cplusplus */ +#endif /*_LCD_HD44780_DEF_CHAR_H_*/ \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_interface.h b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_interface.h new file mode 100644 index 0000000..2b7d99a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/lcd_hd44780_interface.h @@ -0,0 +1,51 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-06 21:38:59 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-07 12:46:27 + */ + +#ifndef _LCD_HD44780_INTERFACE_H_ +#define _LCD_HD44780_INTERFACE_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ +#include + enum lcd_sig + { + LCD_RS, + LCD_RW, + LCD_E, + LCD_BCKL, + }; + + typedef void (*init_LCD_data_and_SIG_pins_func_p)(void); + typedef void (*set_LCD_data_pins_as_outputs_func_p)(void); + typedef void (*set_LCD_data_pins_as_inputs_func_p)(void); + typedef void (*set_LCD_data_port_func_p)(uint8_t data); + typedef uint8_t (*get_LCD_data_port_func_p)(void); + typedef void (*set_LCD_SIG_func_p)(enum lcd_sig LCD_SIG); + typedef void (*reset_LCD_SIG_func_p)(enum lcd_sig LCD_SIG); + typedef void (*delay_us_func_p)(uint32_t delay_us); + + struct LCD_IO_driver_interface_struct + { + init_LCD_data_and_SIG_pins_func_p init_LCD_pins; + set_LCD_data_pins_as_outputs_func_p set_data_pins_as_outputs; + set_LCD_data_pins_as_inputs_func_p set_data_pins_as_inputs; + set_LCD_data_port_func_p write_data; + get_LCD_data_port_func_p read_data; + set_LCD_SIG_func_p set_SIG; + reset_LCD_SIG_func_p reset_SIG; + delay_us_func_p delay_us; + }; + // clang-format off + const struct LCD_IO_driver_interface_struct* LCD_IO_driver_interface_get(void); + // clang-format on + +#ifdef __cplusplus +} +#endif /* __cplusplus */ +#endif /* _LCD_HD_44780_H_ */ \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/user_config.h b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/user_config.h new file mode 100644 index 0000000..3edc1ee --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/include/user_config.h @@ -0,0 +1,29 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __USER_CONFIG_H__ +#define __USER_CONFIG_H__ + +#endif + diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/LCD_IO_driver_interface.c b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/LCD_IO_driver_interface.c new file mode 100644 index 0000000..69183db --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/LCD_IO_driver_interface.c @@ -0,0 +1,235 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-07 15:51:41 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-08 00:34:48 + */ +#include +#include "lcd_hd44780_interface.h" +#include "lcd_hd44780_config.h" +#include "user_interface.h" +#include "ets_sys.h" +#include "osapi.h" +// #include "..\gpio.h" + + +// clang-format off +#define ON 1 +#define OFF 0 + +/*********************************Define hardware connection in your project*******************************/ +// ToDo define here name of lcd PINS and it's hardware represetation +#define LCD_D5_MUX PERIPHS_IO_MUX_MTDI_U +#define LCD_D5_PIN BIT12 +#define LCD_D5_FUNC FUNC_GPIO12 + +#define LCD_D6_MUX PERIPHS_IO_MUX_MTCK_U +#define LCD_D6_PIN BIT13 +#define LCD_D6_FUNC FUNC_GPIO13 + +#define LCD_D4_MUX PERIPHS_IO_MUX_MTMS_U +#define LCD_D4_PIN BIT14 +#define LCD_D4_FUNC FUNC_GPIO14 + +#define LCD_D7_MUX PERIPHS_IO_MUX_MTDO_U +#define LCD_D7_PIN BIT15 +#define LCD_D7_FUNC FUNC_GPIO15 + +#define LCD_BCKL_MUX PERIPHS_IO_MUX_GPIO4_U +#define LCD_BCKL_PIN BIT4 +#define LCD_BCKL_FUNC FUNC_GPIO4 + +#define LCD_E_MUX PERIPHS_IO_MUX_U0TXD_U +#define LCD_E_PIN BIT1 +#define LCD_E_FUNC FUNC_GPIO1 + +#define LCD_RS_MUX PERIPHS_IO_MUX_U0RXD_U +#define LCD_RS_PIN BIT3 +#define LCD_RS_FUNC FUNC_GPIO3 + +/****************************END OFF define hardware connection in your application***********************/ + +#define LCD_D4_MASK 0x01 +#define LCD_D5_MASK 0x02 +#define LCD_D6_MASK 0x04 +#define LCD_D7_MASK 0x08 +// clang-format on + +static void init_LCD_data_and_SIG_pins(void); +static void set_LCD_DATA_PINS_as_outputs(void); +static void set_LCD_DATA_PINS_as_inputs(void); +static void set_LCD_DATA_PINS_state(uint8_t data); +static uint8_t get_LCD_DATA_PINS_state(void); +static void LCD_set_SIG(enum lcd_sig LCD_SIG); +static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +static void wraper_delay_us(uint32_t delay_us); +// static void init_LCD_SIGNAL_PINS_as_outputs(void); +// static void init_LCD_BCKL_PIN_as_output(void); + +/************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + set_LCD_DATA_PINS_as_outputs, + set_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + wraper_delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +/*************LCD_IO_driver_interface implementation END***************/ + +static void init_LCD_data_and_SIG_pins(void) +{ + PIN_FUNC_SELECT(LCD_RS_MUX,LCD_RS_FUNC); + PIN_FUNC_SELECT(LCD_E_MUX,LCD_E_FUNC); + PIN_FUNC_SELECT(LCD_D4_MUX,LCD_D4_FUNC); + PIN_FUNC_SELECT(LCD_D5_MUX,LCD_D5_FUNC); + PIN_FUNC_SELECT(LCD_D6_MUX,LCD_D6_FUNC); + PIN_FUNC_SELECT(LCD_D7_MUX,LCD_D7_FUNC); + PIN_FUNC_SELECT(LCD_BCKL_MUX,LCD_BCKL_FUNC); + gpio_output_set(0, + LCD_D4_PIN|LCD_D5_PIN|LCD_D6_PIN|LCD_D7_PIN|LCD_RS_PIN|LCD_E_PIN|LCD_BCKL_PIN, + LCD_D4_PIN|LCD_D5_PIN|LCD_D6_PIN|LCD_D7_PIN|LCD_RS_PIN|LCD_E_PIN|LCD_BCKL_PIN, + 0); + +} + +static void set_LCD_DATA_PINS_as_outputs(void) +{ +// configure LCD_D4, LCD_D5, LCD_D6, LCD_D7 as output + gpio_output_set( + 0, + LCD_D4_PIN|LCD_D5_PIN|LCD_D6_PIN|LCD_D7_PIN, + LCD_D4_PIN|LCD_D5_PIN|LCD_D6_PIN|LCD_D7_PIN, + 0); + +} +static void set_LCD_DATA_PINS_as_inputs(void) +{ +// configure LCD_D4, LCD_D5, LCD_D6, LCD_D7 as input + gpio_output_set( + 0, + 0, + 0, + LCD_D4_PIN|LCD_D5_PIN|LCD_D6_PIN|LCD_D7_PIN); +} + +static void set_LCD_DATA_PINS_state(uint8_t data) +{ + if ((data & LCD_D4_MASK)) + //Set LCD_D4 to HIGH + gpio_output_set(LCD_D4_PIN,0,LCD_D4_PIN, 0); + else + //Set LCD_D4 to LOW + gpio_output_set(0,LCD_D4_PIN,LCD_D4_PIN, 0); + + if ((data & LCD_D5_MASK)) + //set LCD_D5 to HIGH + gpio_output_set(LCD_D5_PIN,0,LCD_D5_PIN, 0); + else + //Set LCD_D5 to LOW + gpio_output_set(0,LCD_D5_PIN,LCD_D5_PIN, 0); + + if ((data & LCD_D6_MASK)) + // Set LCD_D6 to HIGH + gpio_output_set(LCD_D6_PIN,0,LCD_D6_PIN, 0); + else + //Set LCD_D6 to LOW + gpio_output_set(0,LCD_D6_PIN,LCD_D6_PIN, 0); + if ((data & LCD_D7_MASK)) + //Set LCD_D7 to HIGH + gpio_output_set(LCD_D7_PIN,0,LCD_D7_PIN, 0); + else + //Set LCD_D7 to LOW + gpio_output_set(0,LCD_D7_PIN,LCD_D7_PIN, 0); +} + +static uint8_t get_LCD_DATA_PINS_state(void) +{ + // uint8_t data = 0; + // // if (LCD_D4 input port is set to HIGH) + // data = LCD_D4_MASK; + // // if (LCD_D5 input port is set to HIGH) + // data |= LCD_D5_MASK; + // // if (LCD_D6 input port is set to HIGH) + // data |= LCD_D6_MASK; + // // if (LCD_D7 input port is set to HIGH) + // data |= LCD_D7_MASK; + // return data; +} + +static void LCD_set_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + // Set LCD_RS to High + gpio_output_set(LCD_RS_PIN,0,LCD_RS_PIN, 0); + break; + case LCD_E: + // Set LCD_E to High + gpio_output_set(LCD_E_PIN,0,LCD_E_PIN, 0); + break; +#if USE_RW_PIN == ON + case LCD_RW: + // Set LCD_RW to High + gpio_output_set(LCD_RW_PIN,0,LCD_RW_PIN, 0); + break; +#endif + case LCD_BCKL: + // Set LCD_BCKL to High + gpio_output_set(LCD_BCKL_PIN,0,LCD_BCKL_PIN, 0); + break; + default: + break; + } +} + +static void LCD_reset_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + // Set LCD_RS to LOW + gpio_output_set(0,LCD_RS_PIN,LCD_RS_PIN, 0); + break; + case LCD_E: + // Set LCD_E to LOW + gpio_output_set(0,LCD_E_PIN,LCD_E_PIN, 0); + break; +#if USE_RW_PIN == 1 + case LCD_RW: + // Set LCD_RW to LOW + gpio_output_set(0,LCD_RW_PIN,LCD_RW_PIN, 0); + break; +#endif + case LCD_BCKL: + // Set LCD_BCKL to LOW + gpio_output_set(0,LCD_BCKL_PIN,LCD_BCKL_PIN,0); + break; + default: + break; + } +} + +static void wraper_delay_us(uint32_t delay_us) +{ + // ToDo update wraper + os_delay_us((uint16_t)(delay_us)); +} + +// static void init_LCD_SIGNAL_PINS_as_outputs(void) +// { +// // Initialize LCD_E LCD_RS and optionl LCD_RW GPIOs as outputs +// } + +// static void init_LCD_BCKL_PIN_as_output(void) +// { +// // Initialize LCD_BCKL GPIO as outputs +// } diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/Makefile b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/Makefile new file mode 100644 index 0000000..639fe9b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/Makefile @@ -0,0 +1,45 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR +GEN_LIBS = libuser.a +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +INCLUDES += -I ../../include/ets +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/lcd_hd44780.c b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/lcd_hd44780.c new file mode 100644 index 0000000..985c2a2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/lcd_hd44780.c @@ -0,0 +1,947 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-06 21:39:30 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2024-01-10 18:04:17 + */ + +#include "lcd_hd44780.h" +#include +#include +#include +#include + +typedef char lcd_pos_t; +// clang-format off +#define BUSY_FLAG 1 << 7 +#define VAL_PREFIX_LENGHT 2U + +// LCD driver commands +#define LCDC_CLS 0x01 +#define LCDC_HOME 0x02 +/********************************/ +#define LCDC_ENTRY_MODE 0x04 + #define LCDC_ENTRYR 0x02 + #define LCDC_ENTRYL 0x00 + #define LCDC_MOVE 0x01 +/********************************/ +#define LCDC_ONOFF 0x08 + #define LCDC_DISPLAYON 0x04 + #define LCDC_CURSORON 0x02 + #define LCDC_CURSOROFF 0x00 + #define LCDC_BLINKON 0x01 +/********************************/ +#define LCDC_SHIFT 0x10 + #define LCDC_SHIFTDISP 0x08 + #define LCDC_SHIFTR 0x04 + #define LCDC_SHIFTL 0x00 +/********************************/ +#define LCDC_FUNC 0x20 + #define LCDC_FUNC8B 0x10 + #define LCDC_FUNC4B 0x00 + #define LCDC_FUNC2L 0x08 + #define LCDC_FUNC1L 0x00 + #define LCDC_FUNC5x10 0x04 + #define LCDC_FUNC5x7 0x00 +/********************************/ +#define LCDC_SET_CGRAM 0x40 +#define LCDC_SET_DDRAM 0x80 + +#ifndef UNIT_TEST +#define PRIVATE static +#else +#define PRIVATE +#endif + +#if LCD_BUFFERING == ON + +#define LAST_CHAR_IN_LCD_LINE (LCD_X-1) +#define LAST_LCD_LINE (LCD_Y-1) + +PRIVATE char lcd_buffer[LCD_Y][LCD_X]; +PRIVATE char prev_lcd_buffer[LCD_Y][LCD_X]; + +static lcd_pos_t *lcd_buf_position_ptr; +#endif + +static const struct LCD_IO_driver_interface_struct *LCD = NULL; +bool LCD_UPDATE_EVENT = false; + +static void register_LCD_IO_driver(void); +static void lcd_set_all_SIG(void); +static void lcd_reset_all_SIG(void); +static void lcd_write_4bit_data(uint8_t data); +static void lcd_write_cmd(uint8_t cmd); +static void lcd_write_data(uint8_t data); +static void lcd_write_byte(uint8_t byte); + +#if USE_RW_PIN == ON +static uint8_t lcd_read_byte(void); +static uint8_t lcd_read_4bit_data(void); +#endif +#ifdef AVR +#if ((USE_LCD_INT == ON) || (USE_LCD_HEX == ON)) +static void lcd_put_spaces(uint8_t empty_spaces); +#endif +#if USE_LCD_INT == ON +static void lcd_int_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_HEX == ON +static void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_BIN == ON +static void lcd_bin_AVR(int val, uint8_t width); +#endif +#if LCD_BUFFERING == ON +#if ((USE_LCD_BUF_INT == ON) || (USE_LCD_BUF_HEX == ON)) +static void lcd_buf_put_spaces(uint8_t empty_spaces); +#endif +#if USE_LCD_BUF_INT == ON +static void lcd_buf_int_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_BUF_HEX == ON +static void lcd_buf_hex_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_BUF_BIN == ON +static void lcd_buf_bin_AVR(int val, uint8_t width); +#endif +#endif +#else +#if (USE_LCD_BIN == ON || ((LCD_BUFFERING == ON) && (LCD_USE_BUF_BIN == ON))) +static void fill_bin_value_buffer(int val, char *bin_val_buffer); +static void fill_zeros_buffer(const char *buffer, uint8_t width, char *zeros_buf); +#endif +#endif +#if LCD_BUFFERING==ON +static void check_lcd_buf_possition_ptr_overflow(void); +static void copy_lcd_buf_2_prev_lcd_buf(void); +static void update_lcd_curosr_possition(uint8_t *lcd_cursor_position,uint8_t *lcd_line, uint8_t *missed_char_counter_in_LCD_line); +static void write_lcd_buf_2_lcd(const uint8_t *lcd_cursor_position,const uint8_t *lcd_line,uint8_t * missed_char_counter_in_LCD_line, const lcd_pos_t *prev_lcd_buff_pos_ptr); +#endif + +static void register_LCD_IO_driver(void) +{ + LCD = LCD_IO_driver_interface_get(); +} + +static void lcd_set_all_SIG(void) +{ + LCD->set_SIG(LCD_E); + LCD->set_SIG(LCD_RS); +#if USE_RW_PIN == ON + LCD->set_SIG(LCD_RW); +#endif +} + +static void lcd_reset_all_SIG(void) +{ +#if USE_RW_PIN == ON + LCD->reset_SIG(LCD_RW); +#endif + LCD->reset_SIG(LCD_RS); + LCD->reset_SIG(LCD_E); +} + +void lcd_write_4bit_data(uint8_t data) +{ + LCD->set_SIG(LCD_E); + data &= 0x0F; + LCD->write_data(data); + LCD->reset_SIG(LCD_E); +} + +static void lcd_write_cmd(uint8_t cmd) +{ + LCD->reset_SIG(LCD_RS); + lcd_write_byte(cmd); +} + +void lcd_write_data(uint8_t data) +{ + LCD->set_SIG(LCD_RS); + lcd_write_byte(data); +} + +void lcd_write_byte(uint8_t byte) +{ +#if USE_RW_PIN == ON + LCD->reset_SIG(LCD_RW); +#endif + lcd_write_4bit_data((byte) >> 4); + lcd_write_4bit_data((byte) & 0x0F); +#if USE_RW_PIN == ON + // check_BUSSY_FALG + LCD->set_data_pins_as_inputs(); + LCD->reset_SIG(LCD_RS); + LCD->set_SIG(LCD_RW); + while (lcd_read_byte() & BUSY_FLAG) + { + } + LCD->reset_SIG(LCD_RW); + LCD->set_data_pins_as_outputs(); + +#else + LCD->delay_us(120); +#endif +} + +#if USE_RW_PIN == ON +uint8_t lcd_read_byte(void) +{ + uint8_t data; + // read 4 MSB + data = (lcd_read_4bit_data() << 4); + // read 4 LSB + data |= (lcd_read_4bit_data() & 0x0F); + return data; +} + +uint8_t lcd_read_4bit_data(void) +{ + uint8_t data; + LCD->set_SIG(LCD_E); + data = LCD->read_data(); + LCD->reset_SIG(LCD_E); + return data; +} +#endif +#ifdef AVR +#if ((USE_LCD_INT == ON) || (USE_LCD_HEX == ON)) +static void lcd_put_spaces(uint8_t empty_spaces) +{ + for (uint8_t i = 0; i < empty_spaces; i++) + { + lcd_char(' '); + } +} +#endif +#if USE_LCD_INT == ON +static void lcd_int_AVR(int val, uint8_t width, enum alignment alignment) +{ + uint8_t buf_lenght = 0; + char buffer[20]; // 19chars for 64 bit int + end char '\0' + buffer[0] = '\0'; + itoa(val, buffer, 10); + buf_lenght = strlen(buffer); + if (buf_lenght >= (width)) + { + lcd_str(buffer); + } + else + { + uint8_t empty_spaces_qty = width - buf_lenght; + if (alignment == right) + { + lcd_put_spaces(empty_spaces_qty); + lcd_str(buffer); + } + else + { + lcd_str(buffer); + lcd_put_spaces(empty_spaces_qty); + } + } +} +#endif +#if USE_LCD_HEX == ON +static void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment) +{ + char buffer[17]; + buffer[0] = '\0'; + itoa(val, buffer, 16); + static const char *prefix = {"0x"}; + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + { + lcd_str(prefix); + lcd_str(buffer); + } + else + { + uint8_t empty_spaces_qty = width - (VAL_PREFIX_LENGHT + strlen(buffer)); + + if (alignment == right) + { + lcd_put_spaces(empty_spaces_qty); + lcd_str(prefix); + lcd_str(buffer); + } + else + { + lcd_str(prefix); + lcd_str(buffer); + lcd_put_spaces(empty_spaces_qty); + } + } +} +#endif +#if USE_LCD_BIN == ON +static void lcd_bin_AVR(int val, uint8_t width) +{ + char buffer[35]; // 0b 0000 0000 0000 0000 0000 0000 0000 0000 + static const char *prefix = {"0b"}; + buffer[0] = '\0'; + + itoa(val, buffer, 2); + // if (buf_lenght < (width - VAL_PREFIX_LENGHT)) + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + { + lcd_str(prefix); + lcd_str(buffer); + } + else + { + uint8_t zeros_qty = (width - (VAL_PREFIX_LENGHT + strlen(buffer))); + lcd_str(prefix); + for (uint8_t i = 0; i < zeros_qty; i++) + { + lcd_char('0'); + } + lcd_str(buffer); + } +} +#endif + +#if LCD_BUFFERING== ON +#if ((USE_LCD_BUF_INT == ON) || (USE_LCD_BUF_HEX == ON)) +static void lcd_buf_put_spaces(uint8_t empty_spaces) +{ + for (uint8_t i = 0; i < empty_spaces; i++) + { + lcd_buf_char(' '); + } +} +#endif +#if USE_LCD_BUF_INT == ON +static void lcd_buf_int_AVR(int val, uint8_t width, enum alignment alignment) +{ + uint8_t buf_lenght = 0; + char buffer[20]; // 19chars for 64 bit int + end char '\0' + buffer[0] = '\0'; + itoa(val, buffer, 10); + buf_lenght = strlen(buffer); + if (buf_lenght >= (width)) + { + lcd_buf_str(buffer); + } + else + { + uint8_t empty_spaces_qty = width - buf_lenght; + if (alignment == right) + { + lcd_buf_put_spaces(empty_spaces_qty); + lcd_buf_str(buffer); + } + else + { + lcd_buf_str(buffer); + lcd_buf_put_spaces(empty_spaces_qty); + } + } +} +#endif + +#if USE_LCD_BUF_HEX == ON +void lcd_buf_hex_AVR(int val, uint8_t width, enum alignment alignment) +{ + char buffer[17]; + buffer[0] = '\0'; + itoa(val, buffer, 16); + static const char *prefix = {"0x"}; + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + { + lcd_buf_str(prefix); + lcd_buf_str(buffer); + } + else + { + uint8_t empty_spaces_qty = width - (VAL_PREFIX_LENGHT + strlen(buffer)); + + if (alignment == right) + { + lcd_buf_put_spaces(empty_spaces_qty); + lcd_buf_str(prefix); + lcd_buf_str(buffer); + } + else + { + lcd_buf_str(prefix); + lcd_buf_str(buffer); + lcd_buf_put_spaces(empty_spaces_qty); + } + } +} +#endif +#if USE_LCD_BUF_BIN == ON +static void lcd_buf_bin_AVR(int val, uint8_t width) +{ + char buffer[35]; // 0b 0000 0000 0000 0000 0000 0000 0000 0000 + static const char *prefix = {"0b"}; + buffer[0] = '\0'; + + itoa(val, buffer, 2); + // if (buf_lenght < (width - VAL_PREFIX_LENGHT)) + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + { + lcd_buf_str(prefix); + lcd_buf_str(buffer); + } + else + { + uint8_t zeros_qty = (width - (VAL_PREFIX_LENGHT + strlen(buffer))); + lcd_buf_str(prefix); + for (uint8_t i = 0; i < zeros_qty; i++) + { + lcd_buf_char('0'); + } + lcd_buf_str(buffer); + } +} +#endif +#endif +#else +#if USE_LCD_BIN == ON +static void fill_bin_value_buffer(int val, char *bin_val_buffer) +{ + uint32_t bit_mask = 0x80000000; + while (bit_mask != 0) + { + if ((bit_mask & val) != 0) + { + strcat(bin_val_buffer, "1"); + } + else + { + if (strlen(bin_val_buffer) != 0) + { + strcat(bin_val_buffer, "0"); + } + } + bit_mask = bit_mask >> 1; + } +} + +static void fill_zeros_buffer(const char *buffer, uint8_t width, char *zeros_buf) +{ + if (strlen(buffer) < (width + VAL_PREFIX_LENGHT)) + { + uint8_t zeros_qty = width - ((strlen(buffer) + VAL_PREFIX_LENGHT)); + for (uint8_t t = 0; t < zeros_qty; t++) + { + strcat(zeros_buf, "0"); + } + } +} +#endif +#endif + +#if LCD_BUFFERING==ON +static void check_lcd_buf_possition_ptr_overflow(void) +{ + if(++lcd_buf_position_ptr>&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]) + { + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + } +} +static void copy_lcd_buf_2_prev_lcd_buf(void) +{ + for(uint8_t y=0;y=LCD_X) + { + *lcd_cursor_position=0; + (*lcd_line)++; + *missed_char_counter_in_LCD_line=0; + if(*lcd_line==LCD_Y) + { + *lcd_line=LINE_1; + } + lcd_locate(*lcd_line,*lcd_cursor_position); + + } +} + +void write_lcd_buf_2_lcd(const uint8_t * lcd_cursor_position, const uint8_t *lcd_line, uint8_t * missed_char_counter_in_LCD_line, const lcd_pos_t *prev_lcd_buff_pos_ptr) +{ + if(*lcd_buf_position_ptr!=*prev_lcd_buff_pos_ptr) + { + if (*missed_char_counter_in_LCD_line!=0) + { + lcd_locate(*lcd_line,*lcd_cursor_position); + *missed_char_counter_in_LCD_line=0; + } + lcd_char(*lcd_buf_position_ptr); + } + else + { + (*missed_char_counter_in_LCD_line)++; + } +} + +#endif + +/** + * @brief Function that initializes LCD in 4-bit mode with or without LCD R/W Pin handling. + * @attention LCD R/W handling should be configured in lcd_hd44780_config.h by setting USE_RW_PIN to 1 (Enable R/W Pin + * handling) or 0 (disable R/W Pin handling). + */ +void lcd_init(void) +{ + register_LCD_IO_driver(); + LCD->init_LCD_pins(); + lcd_disable_backlight(); + /**************************BASIC LCD INIT - basing on DS init procedure***************************************/ + // set all LCD signals to High for more than 15ms ->bit different than in DS based on other implementations from the internet + lcd_set_all_SIG(); + LCD->delay_us(15000); + lcd_reset_all_SIG(); + // send 0x03 & wait more then 4,1ms + lcd_write_4bit_data(0x03); + LCD->delay_us(4500); + // send 0x03 & wait more then 100us + lcd_write_4bit_data(0x03); + LCD->delay_us(110); + // send 0x03 & wait more then 100us + lcd_write_4bit_data(0x03); + LCD->delay_us(110); + // send 0x02 & wait more then 100us + lcd_write_4bit_data(0x02); + LCD->delay_us(110); + // FUNCTION SET ->send cmd -> LCD in 4-bit mode, 2 rows, char size 5x7 + lcd_write_cmd(LCDC_FUNC | LCDC_FUNC4B | LCDC_FUNC2L | LCDC_FUNC5x7); + // DISPLAY_ON_OFF send cmd -> enable lcd + lcd_write_cmd(LCDC_ONOFF | LCDC_CURSOROFF | LCDC_DISPLAYON); + // LCD clear screen + lcd_cls(); + // ENTRY MODe SET do not shift the LCD shift cursor right after placing a char + lcd_write_cmd(LCDC_ENTRY_MODE | LCDC_ENTRYR); + /*********************************END of BASIC LCD INIT***************************************/ +#if LCD_BUFFERING == ON + //clear lcd_buffer by putting spaces inside of the buffer + lcd_buf_cls(); + //copy lcd_buffer with spaces to prev_lcd_buffer + copy_lcd_buf_2_prev_lcd_buf(); + // clear flag due to init procedure that reset LCD screen and buffers + LCD_UPDATE_EVENT=false; +#endif + +} + +void lcd_enable_backlight(void) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + LCD->set_SIG(LCD_BCKL); +#else + LCD->reset_SIG(LCD_BCKL); +#endif +} + +void lcd_disable_backlight(void) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + LCD->reset_SIG(LCD_BCKL); +#else + LCD->set_SIG(LCD_BCKL); +#endif +} + +/** + * @brief Function that clears the LCD screen and sets the cursor on the position of the first character in the first line of the LCD + * screen. + */ +void lcd_cls(void) +{ + lcd_write_cmd(LCDC_CLS); +#if USE_RW_PIN == OFF + LCD->delay_us(4900); +#endif +} + +#if USE_DEF_CHAR_FUNCTION == ON +/** + * @brief Function for defining custom user characters in CGRAM of the LCD. + * @param CGRAM_char_index Position/address of the character in CGRAM of the LCD where defined char should be written. + * For the predefined example of special characters, taken values are defined in the type enum LCD_CGRAM that is defined + * in lcd-hd44780.h + * @param def_char Pointer to the predefined special character. + * @note CGRAM_char_index - This Parameter can take values from 0 to 7. For the predefined example of special + * characters, taken values are defined in the type enum LCD_CGRAM that is defined in lcd-hd44780.h + */ +void lcd_def_char(const uint8_t CGRAM_bank_x_char_adr, const uint8_t *def_char) +{ + lcd_write_cmd(LCDC_SET_CGRAM | ((DEF_CHAR_ADR_MASK & CGRAM_bank_x_char_adr) * LCD_CGRAM_BYTES_PER_CHAR)); + for (uint8_t j = 0; j < LCD_CGRAM_BYTES_PER_CHAR; j++) + { + lcd_write_data(def_char[j]); + } + lcd_write_cmd(LCDC_SET_DDRAM); +} + +void lcd_load_char_bank(const struct char_bank_struct *char_bank) +{ + lcd_def_char(0, char_bank->char_0); + lcd_def_char(1, char_bank->char_1); + lcd_def_char(2, char_bank->char_2); + lcd_def_char(3, char_bank->char_3); + lcd_def_char(4, char_bank->char_4); + lcd_def_char(5, char_bank->char_5); + lcd_def_char(6, char_bank->char_6); + lcd_def_char(7, char_bank->char_7); +} +#endif + +/** + * @brief Function for printing the char on the LCD screen under the current position of the LCD cursor. + * @param C char (for example '1') or its ASCI code (0x31). + * @note For user-defined char, place CGRAM_char_index (Position/address of the character in CGRAM of the LCD where + * defined char was written). + */ +void lcd_char(const char C) +{ + uint8_t data = (uint8_t)(C); + lcd_write_data(data); +} + +/** + * @brief Function for printing/writing the string on the LCD screen starting from the current LCD cursor position. + * @param str string that should be printed/written on the LCD screen + */ +void lcd_str(const char *str) +{ + register char znak; + while ((znak = *(str++))) + { + lcd_write_data((uint8_t)(znak)); + } +} + +#if USE_LCD_INT == ON +/** + * @brief Function for printing the integer value on the LCD screen under the current position of the LCD cursor. + * @param val int type value to print on LCD screen + * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the + * result is padded with blank spaces. The value is not truncated even if the result is larger. + * @param alignment If the value to be printed is shorter than the width, this parameter will specify the alignment of the + * printed text value. This parameter can be set to "left" or "right" + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_int(int val, uint8_t width, enum alignment alignment) +{ +#ifdef AVR + lcd_int_AVR(val, width, alignment); +#else + char buffer[20]; // 19chars for 64 bit int + end char '\0' + buffer[0] = '\0'; + if (alignment == right) + sprintf(buffer, "%*i", width, val); + else + sprintf(buffer, "%-*i", width, val); + lcd_str(buffer); +#endif +} +#endif + +#if USE_LCD_HEX == ON +/** + * @brief Function for printing the integer value in hexadecimal format on the LCD screen under the current position of the LCD + * cursor. + * @param val int type value to print on LCD screen in hexadecimal format + * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the + * result is padded with blank spaces. The value is not truncated even if the result is larger. The width should contain + * additional 2 characters for '0x' at the beginning of the printed value. + * @param alignment If the value to be printed is shorter than the width, this parameter will specify the alignment of the + * printed text value. This parameter can be set to "left" or "right" + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_hex(int val, uint8_t width, enum alignment alignment) +{ +#ifdef AVR + lcd_hex_AVR(val, width, alignment); +#else + char buffer[17]; + buffer[0] = '\0'; + if (alignment == right) + sprintf(buffer, "%#*x", width, val); + else + sprintf(buffer, "%-#*x", width, val); + lcd_str(buffer); +#endif +} +#endif + +#if USE_LCD_BIN == ON +/** + * @brief Function for printing the integer value in hexadecimal format on the LCD screen under the current position of the LCD + * cursor. + * @param val int type value to print on LCD screen in hexadecimal format + * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the + * result is padded with blank spaces. The value is not truncated even if the result is larger. The width should contain + * additional 2 characters for '0x' at the beginning of the printed value. + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_bin(int val, uint8_t width) +{ +#ifdef AVR + lcd_bin_AVR(val, width); +#else + char buffer[35]; + char bin_val_buffer[35]; + char zeros_buf[35]; + buffer[0] = '\0'; + bin_val_buffer[0] = '\0'; + zeros_buf[0] = '\0'; + + fill_bin_value_buffer(val, bin_val_buffer); + fill_zeros_buffer(bin_val_buffer, width, zeros_buf); + strcat(buffer, "0b"); + strcat(buffer, zeros_buf); + strcat(buffer, bin_val_buffer); + lcd_str(buffer); +#endif +} + +#endif + +/** + * @brief Function that moves LCD cursor to a specific position located under the x and y coordinate + * @param y LCD row/line number. Defined enum value LINE_1, LINE_2,... etc. + * @param x LCD column number. Defined enum value C1, C2, C3,... etc. + */ +void lcd_locate(enum LCD_LINES y, enum LCD_COLUMNS x) +{ + switch (y) + { + case 0: + y = LCD_LINE1_ADR; + break; + +#if (LCD_Y > 1) + case 1: + y = LCD_LINE2_ADR; + break; +#endif +#if (LCD_Y > 2) + case 2: + y = LCD_LINE3_ADR; + break; +#endif +#if (LCD_Y > 3) + case 3: + y = LCD_LINE4_ADR; + break; +#endif + default: + break; + } + lcd_write_cmd((uint8_t)(LCDC_SET_DDRAM + y + x)); +} +#if USE_LCD_CURSOR_HOME == ON +/** + * @brief Function that moves LCD cursor to the first position at the first row of the LCD screen + */ +void lcd_home(void) +{ + lcd_write_cmd(LCDC_CLS | LCDC_HOME); +#if USE_RW_PIN == OFF + LCD->delay_us(4900); +#endif +} +#endif + +#if USE_LCD_CURSOR_ON == ON +/** + * @brief Function that activates the visibility of the LCD cursor. + */ +void lcd_cursor_on(void) +{ + lcd_write_cmd(LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON); +} +#endif + +#if USE_LCD_CURSOR_OFF == ON +/** + * @brief Function that deactivates the visibility and blinking of the LCD cursor. + */ +void lcd_cursor_off(void) +{ + lcd_write_cmd(LCDC_ONOFF | LCDC_DISPLAYON); +} +#endif +#if USE_LCD_BLINKING_CURSOR_ON == ON +/** + * @brief Function that activates the visibility and blinking of the LCD cursor. + */ +void lcd_blinking_cursor_on(void) +{ + lcd_write_cmd(LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON | LCDC_BLINKON); +} +#endif + +#if LCD_BUFFERING == ON +/** + * @brief Function that puts spaces(0x32) in the whole LCD buffer and sets the cursor on the position of the first character in the first line of the LCD + * buffer. + */ +void lcd_buf_cls(void) +{ + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) + { + *lcd_buf_position_ptr=' '; + } + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + LCD_UPDATE_EVENT=true; +} + +/** + * @brief Function for adding the char to the LCD buffer under the current position of the LCD buffer. + * @param C char (for example '1') or its ASCI code (0x31). + * @note For user-defined char, place CGRAM_char_index (Position/address of the character in CGRAM of the LCD where + * defined char was written). + */ +void lcd_buf_char(const char c) +{ + *lcd_buf_position_ptr=c; + check_lcd_buf_possition_ptr_overflow(); + LCD_UPDATE_EVENT=true; +} + +/** + * @brief Function that changes the current LCD buffer position pointer to a specific position located under the x and y coordinate + * @param y LCD row/line number. Defined enum value LINE_1, LINE_2,... etc. + * @param x LCD column number. Defined enum value C1, C2, C3,... etc. + */ +void lcd_buf_locate(enum LCD_LINES y, enum LCD_COLUMNS x) +{ + lcd_buf_position_ptr=&lcd_buffer[y][x]; +} + +/** + * @brief Function for placing the string in the LCD buffer starts from the current LCD buffer position pointer. + * @param str string that should be placed in the LCD buffer + */ +void lcd_buf_str(const char *str) +{ + while (*str) + { + *(lcd_buf_position_ptr)=*(str++); + check_lcd_buf_possition_ptr_overflow(); + } + LCD_UPDATE_EVENT=true; +} + +/** + * @brief Function that prints on the LCD screen the content of The LCD buffer. + * The function sets also The LCD buffer position pointer to the First line's first character. + */ +void lcd_update(void) +{ + uint8_t lcd_cursor_position=0; + uint8_t lcd_line=0; + uint8_t missed_char_counter_in_LCD_line=0; + const lcd_pos_t *prev_lcd_buff_pos_ptr=&prev_lcd_buffer[LINE_1][C1]; + + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) + { + write_lcd_buf_2_lcd(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line,prev_lcd_buff_pos_ptr); + update_lcd_curosr_possition(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line); + prev_lcd_buff_pos_ptr++; + } + + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + copy_lcd_buf_2_prev_lcd_buf(); + LCD_UPDATE_EVENT=false; +} + +#if USE_LCD_BUF_INT == ON +/** + * @brief Function for adding integer value as string to the LCD buffer under the current position of the LCD buffer pointer. + * @param val int type value to add to LCD buffer + * @param width Minimum number of characters to be added to LCD buffer. If the value to be added to the LCD buffer is shorter than width, the + * result is padded with blank spaces. The value to be added to the buffer as a string is not truncated if the string length is larger than the width value. + * @param alignment If the value is to be added to the LCD buffer as a string is shorter than the width, this parameter will specify the alignment of the + * text representing the value. This parameter can be set to "left" or "right" + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_buf_int(int val, uint8_t width, enum alignment alignment) +{ +#ifdef AVR + lcd_buf_int_AVR(val, width, alignment); +#else + char buffer[20]; // 19chars for 64 bit int + end char '\0' + buffer[0] = '\0'; + if (alignment == right) + sprintf(buffer, "%*i", width, val); + else + sprintf(buffer, "%-*i", width, val); + lcd_buf_str(buffer); +#endif +} +#endif + +#if USE_LCD_BUF_HEX == ON +/** + * @brief Function for adding integer value in hexadecimal format as a string to the LCD buffer under the current position of the LCD buffer pointer. + * @param val int type value to add to LCD buffer as a string in hexadecimal format + * @param width Minimum number of characters to be added to lcd buffer. If the value to be added to the buffer is shorter than the width, the + * result is padded with blank spaces. The value to be added to the buffer as a string is not truncated if the string length is larger than the width value. Width should contain + * additional 2 characters for "0x" at the beginning of the value represented as a string. example: 0x01-> width=4 + * @param alignment If the value to be added to the LCD buffer as a string is shorter than the width, this parameter will specify the alignment of the +* text represented the value. This parameter can be set to "left" or "right" + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_buf_hex(int val, uint8_t width, enum alignment alignment) +{ +#ifdef AVR + lcd_buf_hex_AVR(val, width, alignment); +#else + char buffer[17]; + buffer[0] = '\0'; + if (alignment == right) + sprintf(buffer, "%#*x", width, val); + else + sprintf(buffer, "%-#*x", width, val); + lcd_buf_str(buffer); +#endif +} +#endif + +#if USE_LCD_BUF_BIN == ON +/** + * @brief Function for adding to the LCD buffer the integer value in binary format as a string under the current position of the LCD buffer pointer + * @param val int type value to be added to the LCD buffer as a string in hexadecimal format + * @param width Minimum number of characters to be added to LCD buffer. If the value to be added to the buffer as string length is shorter than width, the + * result is padded with blank spaces. The value to be added to the buffer as a string is not truncated if the string length represents the value in binary format length + * is larger than the width value. The width should contain an additional 2 characters for "0b" at the beginning of the value represented as a string. example: 0b01-> width=4 + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_buf_bin(int val, uint8_t width) +{ +#ifdef AVR + lcd_buf_bin_AVR(val, width); +#else + char buffer[35]; + char bin_val_buffer[35]; + char zeros_buf[35]; + buffer[0] = '\0'; + bin_val_buffer[0] = '\0'; + zeros_buf[0] = '\0'; + + fill_bin_value_buffer(val, bin_val_buffer); + fill_zeros_buffer(bin_val_buffer, width, zeros_buf); + strcat(buffer, "0b"); + strcat(buffer, zeros_buf); + strcat(buffer, bin_val_buffer); + lcd_buf_str(buffer); +#endif +} + +#endif +#endif + diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/partitions.c b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/partitions.c new file mode 100644 index 0000000..a293274 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/partitions.c @@ -0,0 +1,64 @@ +/* + * partitions.c + * + * Created on: 8 pa 2021 + * Author: Mirosaw Karda + */ +#include "ets_sys.h" +#include "osapi.h" +#include "user_interface.h" + + + +#if ((SPI_FLASH_SIZE_MAP == 0) || (SPI_FLASH_SIZE_MAP == 1)) +#error "The flash map is not supported" +#elif (SPI_FLASH_SIZE_MAP == 2) // 1 MB +#define SYSTEM_PARTITION_OTA_SIZE 0x78000 // 0x78000-480 KB // 0x7A000-488KB // 0x6A000-424KB +#define SYSTEM_PARTITION_OTA_2_ADDR 0x81000 +#define SYSTEM_PARTITION_RF_CAL_ADDR 0xfb000 +#define SYSTEM_PARTITION_PHY_DATA_ADDR 0xfc000 +#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR 0xfd000 +#elif (SPI_FLASH_SIZE_MAP == 3) // 2 MB +#define SYSTEM_PARTITION_OTA_SIZE 0x6A000 +#define SYSTEM_PARTITION_OTA_2_ADDR 0x81000 +#define SYSTEM_PARTITION_RF_CAL_ADDR 0x1fb000 +#define SYSTEM_PARTITION_PHY_DATA_ADDR 0x1fc000 +#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR 0x1fd000 +#elif (SPI_FLASH_SIZE_MAP == 4) // 4MB +#define SYSTEM_PARTITION_OTA_SIZE 0x6A000 +#define SYSTEM_PARTITION_OTA_2_ADDR 0x81000 +#define SYSTEM_PARTITION_RF_CAL_ADDR 0x3fb000 +#define SYSTEM_PARTITION_PHY_DATA_ADDR 0x3fc000 +#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR 0x3fd000 +#elif (SPI_FLASH_SIZE_MAP == 5) // 5 MB +#define SYSTEM_PARTITION_OTA_SIZE 0x6A000 +#define SYSTEM_PARTITION_OTA_2_ADDR 0x101000 +#define SYSTEM_PARTITION_RF_CAL_ADDR 0x1fb000 +#define SYSTEM_PARTITION_PHY_DATA_ADDR 0x1fc000 +#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR 0x1fd000 +#elif (SPI_FLASH_SIZE_MAP == 6) // 4 MB +#define SYSTEM_PARTITION_OTA_SIZE 0x6A000 +#define SYSTEM_PARTITION_OTA_2_ADDR 0x101000 +#define SYSTEM_PARTITION_RF_CAL_ADDR 0x3fb000 +#define SYSTEM_PARTITION_PHY_DATA_ADDR 0x3fc000 +#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR 0x3fd000 +#else +#error "The flash map is not supported" +#endif + +static const partition_item_t at_partition_table[] = { + { SYSTEM_PARTITION_BOOTLOADER, 0x0, 0x1000}, + { SYSTEM_PARTITION_OTA_1, 0x1000, SYSTEM_PARTITION_OTA_SIZE}, + { SYSTEM_PARTITION_OTA_2, SYSTEM_PARTITION_OTA_2_ADDR, SYSTEM_PARTITION_OTA_SIZE}, + { SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR, 0x1000}, + { SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR, 0x1000}, + { SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR, 0x3000}, +}; + +void ICACHE_FLASH_ATTR user_pre_init(void) +{ + if(!system_partition_table_regist(at_partition_table, sizeof(at_partition_table)/sizeof(at_partition_table[0]),SPI_FLASH_SIZE_MAP)) { + os_printf("system_partition_table_regist fail\r\n"); + while(1); + } +} diff --git a/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/user_main.c b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/user_main.c new file mode 100644 index 0000000..ab9f238 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/LCD_HD44780_TEST/user/user_main.c @@ -0,0 +1,144 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2015 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +#include "ets_sys.h" +#include "osapi.h" +#include "user_interface.h" +#include "lcd_hd44780.h" + +#define SHIFT_DELAY 300 +enum +{ + slide_in_init, + slide_in, + slide_out_init, + slide_out, +}; + +const char *demo_tekst = {"Congratulation, you have just run LCD demo example on ESP8266 using ESP826 NONOS SDK"}; +// const char *demo_tekst = {"Congratulation, you hav SDK\0"}; +const char *demo_title = {"LCD HD44780 Demo\0"}; + +static void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line); +static void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line); +static void blink_backlight(uint8_t blinks_no); + +uint8_t j = 0; +uint8_t i = 0; +uint8_t shift_str_state_machine=0; + +static os_timer_t lcd_shift_timer; + + +void ICACHE_FLASH_ATTR lcd_update_cb(void *arg) +{ + switch(shift_str_state_machine) + { + case slide_in_init: + lcd_buf_cls(); + lcd_buf_str(demo_title); + lcd_update(); + i = LCD_X - 1; + shift_str_state_machine=slide_in; + case slide_in: + lcd_buf_slide_str_in(demo_tekst,LINE_2); + if(i==C1) shift_str_state_machine=slide_out_init; + break; + case slide_out_init: + j=0; + shift_str_state_machine=slide_out; + case slide_out: + lcd_buf_slide_str_out(demo_tekst,LINE_2); + if(j > strlen(demo_tekst)) shift_str_state_machine=slide_in_init; + break; + default: + shift_str_state_machine=slide_in_init; + break; + } + +} + +void ICACHE_FLASH_ATTR lcd_blink_cb(void *arg) +{ + static uint8_t blink_cnt=6; + if((blink_cnt % 2)==0) + { + lcd_disable_backlight(); + } + else + { + lcd_enable_backlight(); + } + if(--blink_cnt==0) + { + os_timer_disarm(&lcd_shift_timer); + os_timer_setfn(&lcd_shift_timer,lcd_update_cb,NULL); + os_timer_arm(&lcd_shift_timer,SHIFT_DELAY,1); + } +} + +void ICACHE_FLASH_ATTR user_init(void) +{ + + lcd_init(); + lcd_enable_backlight(); + lcd_str(demo_title); + + os_timer_disarm(&lcd_shift_timer); + os_timer_setfn(&lcd_shift_timer,lcd_blink_cb,NULL); + os_timer_arm(&lcd_shift_timer,500,1); +} + +static void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line) +{ + + uint8_t str_end_flag = 0; + lcd_buf_locate(lcd_line, C1); + for (i = 0; i < LCD_X; i++) + { + if ((str[j + i] != '\0') && (str_end_flag == 0)) + { + lcd_buf_char(str[j + i]); + } + else + { + str_end_flag = 0xFF; + lcd_buf_char(' '); + } + } + str_end_flag = 0; + lcd_update(); + j++; +} + +static void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line) +{ + + lcd_buf_locate(lcd_line, i); + for (uint8_t j = 0; j < (LCD_X - i); j++) + { + lcd_buf_char(str[j]); + } + lcd_update(); + i--; +} diff --git a/examples/ESP8266_NONOS_SDK/License b/examples/ESP8266_NONOS_SDK/License new file mode 100644 index 0000000..8a9fade --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/License @@ -0,0 +1,24 @@ +ESPRESSIF MIT License + +Copyright (c) 2015 + +Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, it is free of charge, to any person obtaining a copy of this software and associated documentation files (the Software), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + + MIT ֤ + +Ȩ (c) 2015 <ϢƼϺ޹˾> + +֤ȨϢƼ ESP8266 ƷӦÿڴ£֤ȨκλøĵͳΪƵؾӪƵʹáơ޸ġϲ淢СɢȨȨȨЩȨͬʱ + +ижϵİȨȨ + +ṩûκȷ򰵺ĵڹԡʺijһض;ͷȨı֤ߺͰȨκ¾ʹԺͬʽȨʽκ⡢𺦻θ + + + + diff --git a/examples/ESP8266_NONOS_SDK/Makefile b/examples/ESP8266_NONOS_SDK/Makefile new file mode 100755 index 0000000..a580a7b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/Makefile @@ -0,0 +1,417 @@ +# copyright (c) 2010 Espressif System +# +ifndef PDIR + +endif + +ifeq ($(COMPILE), gcc) + AR = xtensa-lx106-elf-ar + CC = xtensa-lx106-elf-gcc + CXX = xtensa-lx106-elf-g++ + NM = xtensa-lx106-elf-nm + CPP = xtensa-lx106-elf-cpp + OBJCOPY = xtensa-lx106-elf-objcopy + OBJDUMP = xtensa-lx106-elf-objdump +else + AR = xt-ar + CC = xt-xcc + CXX = xt-xcc + NM = xt-nm + CPP = xt-cpp + OBJCOPY = xt-objcopy + OBJDUMP = xt-objdump +endif + +BOOT?=none +APP?=0 +SPI_SPEED?=40 +SPI_MODE?=QIO +SPI_SIZE_MAP?=0 + +ifeq ($(BOOT), new) + boot = new +else + ifeq ($(BOOT), old) + boot = old + else + boot = none + endif +endif + +ifeq ($(APP), 1) + app = 1 +else + ifeq ($(APP), 2) + app = 2 + else + app = 0 + endif +endif + +ifeq ($(SPI_SPEED), 26.7) + freqdiv = 1 +else + ifeq ($(SPI_SPEED), 20) + freqdiv = 2 + else + ifeq ($(SPI_SPEED), 80) + freqdiv = 15 + else + freqdiv = 0 + endif + endif +endif + + +ifeq ($(SPI_MODE), QOUT) + mode = 1 +else + ifeq ($(SPI_MODE), DIO) + mode = 2 + else + ifeq ($(SPI_MODE), DOUT) + mode = 3 + else + mode = 0 + endif + endif +endif + +addr = 0x01000 + +ifeq ($(SPI_SIZE_MAP), 1) + size_map = 1 + flash = 256 +else + ifeq ($(SPI_SIZE_MAP), 2) + size_map = 2 + flash = 1024 + ifeq ($(app), 2) + addr = 0x81000 + endif + else + ifeq ($(SPI_SIZE_MAP), 3) + size_map = 3 + flash = 2048 + ifeq ($(app), 2) + addr = 0x81000 + endif + else + ifeq ($(SPI_SIZE_MAP), 4) + size_map = 4 + flash = 4096 + ifeq ($(app), 2) + addr = 0x81000 + endif + else + ifeq ($(SPI_SIZE_MAP), 5) + size_map = 5 + flash = 2048 + ifeq ($(app), 2) + addr = 0x101000 + endif + else + ifeq ($(SPI_SIZE_MAP), 6) + size_map = 6 + flash = 4096 + ifeq ($(app), 2) + addr = 0x101000 + endif + else + ifeq ($(SPI_SIZE_MAP), 8) + size_map = 8 + flash = 8192 + ifeq ($(app), 2) + addr = 0x101000 + endif + else + ifeq ($(SPI_SIZE_MAP), 9) + size_map = 9 + flash = 16384 + ifeq ($(app), 2) + addr = 0x101000 + endif + else + size_map = 0 + flash = 512 + ifeq ($(app), 2) + addr = 0x41000 + endif + endif + endif + endif + endif + endif + endif + endif +endif + +LD_FILE = $(LDDIR)/eagle.app.v6.ld + +ifneq ($(boot), none) +ifneq ($(app),0) + ifneq ($(findstring $(size_map), 6 8 9),) + LD_FILE = $(LDDIR)/eagle.app.v6.$(boot).2048.ld + else + ifeq ($(size_map), 5) + LD_FILE = $(LDDIR)/eagle.app.v6.$(boot).2048.ld + else + ifeq ($(size_map), 4) + LD_FILE = $(LDDIR)/eagle.app.v6.$(boot).1024.app$(app).ld + else + ifeq ($(size_map), 3) + LD_FILE = $(LDDIR)/eagle.app.v6.$(boot).1024.app$(app).ld + else + ifeq ($(size_map), 2) + LD_FILE = $(LDDIR)/eagle.app.v6.$(boot).1024.app$(app).ld + else + ifeq ($(size_map), 0) + LD_FILE = $(LDDIR)/eagle.app.v6.$(boot).512.app$(app).ld + endif + endif + endif + endif + endif + endif + BIN_NAME = user$(app).$(flash).$(boot).$(size_map) +endif +else + app = 0 +endif + +CSRCS ?= $(wildcard *.c) +CXXSRCS ?= $(wildcard *.cpp) +ASRCs ?= $(wildcard *.s) +ASRCS ?= $(wildcard *.S) +SUBDIRS ?= $(patsubst %/,%,$(dir $(wildcard */Makefile))) + +ODIR := .output +OBJODIR := $(ODIR)/$(TARGET)/$(FLAVOR)/obj + +OBJS := $(CSRCS:%.c=$(OBJODIR)/%.o) \ + $(CXXSRCS:%.cpp=$(OBJODIR)/%.o) \ + $(ASRCs:%.s=$(OBJODIR)/%.o) \ + $(ASRCS:%.S=$(OBJODIR)/%.o) + +DEPS := $(CSRCS:%.c=$(OBJODIR)/%.d) \ + $(CXXSCRS:%.cpp=$(OBJODIR)/%.d) \ + $(ASRCs:%.s=$(OBJODIR)/%.d) \ + $(ASRCS:%.S=$(OBJODIR)/%.d) + +LIBODIR := $(ODIR)/$(TARGET)/$(FLAVOR)/lib +OLIBS := $(GEN_LIBS:%=$(LIBODIR)/%) + +IMAGEODIR := $(ODIR)/$(TARGET)/$(FLAVOR)/image +OIMAGES := $(GEN_IMAGES:%=$(IMAGEODIR)/%) + +BINODIR := $(ODIR)/$(TARGET)/$(FLAVOR)/bin +OBINS := $(GEN_BINS:%=$(BINODIR)/%) + +CCFLAGS += \ + -g \ + -Os \ + -Wpointer-arith \ + -Wundef \ + -Wl,-EL \ + -fno-inline-functions \ + -nostdlib \ + -mlongcalls \ + -mtext-section-literals \ + -ffunction-sections \ + -fdata-sections \ + -fno-builtin-printf \ + -fno-jump-tables \ + -fno-guess-branch-probability \ + -freorder-blocks-and-partition \ + -fno-cse-follow-jumps +# -Wall + +DEFINES += -DSPI_FLASH_SIZE_MAP=$(size_map) +CFLAGS = $(CCFLAGS) $(DEFINES) $(EXTRA_CCFLAGS) $(INCLUDES) +DFLAGS = $(CCFLAGS) $(DDEFINES) $(EXTRA_CCFLAGS) $(INCLUDES) + + +############################################################# +# Functions +# + +define ShortcutRule +$(1): .subdirs $(2)/$(1) +endef + +define MakeLibrary +DEP_LIBS_$(1) = $$(foreach lib,$$(filter %.a,$$(COMPONENTS_$(1))),$$(dir $$(lib))$$(LIBODIR)/$$(notdir $$(lib))) +DEP_OBJS_$(1) = $$(foreach obj,$$(filter %.o,$$(COMPONENTS_$(1))),$$(dir $$(obj))$$(OBJODIR)/$$(notdir $$(obj))) +$$(LIBODIR)/$(1).a: $$(OBJS) $$(DEP_OBJS_$(1)) $$(DEP_LIBS_$(1)) $$(DEPENDS_$(1)) + @mkdir -p $$(LIBODIR) + $$(if $$(filter %.a,$$?),mkdir -p $$(EXTRACT_DIR)_$(1)) + $$(if $$(filter %.a,$$?),cd $$(EXTRACT_DIR)_$(1); $$(foreach lib,$$(filter %.a,$$?),$$(AR) xo $$(UP_EXTRACT_DIR)/$$(lib);)) + $$(AR) ru $$@ $$(filter %.o,$$?) $$(if $$(filter %.a,$$?),$$(EXTRACT_DIR)_$(1)/*.o) + $$(if $$(filter %.a,$$?),$$(RM) -r $$(EXTRACT_DIR)_$(1)) +endef + +define MakeImage +DEP_LIBS_$(1) = $$(foreach lib,$$(filter %.a,$$(COMPONENTS_$(1))),$$(dir $$(lib))$$(LIBODIR)/$$(notdir $$(lib))) +DEP_OBJS_$(1) = $$(foreach obj,$$(filter %.o,$$(COMPONENTS_$(1))),$$(dir $$(obj))$$(OBJODIR)/$$(notdir $$(obj))) +$$(IMAGEODIR)/$(1).out: $$(OBJS) $$(DEP_OBJS_$(1)) $$(DEP_LIBS_$(1)) $$(DEPENDS_$(1)) + @mkdir -p $$(IMAGEODIR) + $$(CC) $$(LDFLAGS) $$(if $$(LINKFLAGS_$(1)),$$(LINKFLAGS_$(1)),$$(LINKFLAGS_DEFAULT) $$(OBJS) $$(DEP_OBJS_$(1)) $$(DEP_LIBS_$(1))) -o $$@ +endef + +$(BINODIR)/%.bin: $(IMAGEODIR)/%.out + @mkdir -p $(BINODIR) + +ifeq ($(APP), 0) + @$(RM) -r ../bin/eagle.S ../bin/eagle.dump + @$(OBJDUMP) -x -s $< > ../bin/eagle.dump + @$(OBJDUMP) -S $< > ../bin/eagle.S +else + mkdir -p ../bin/upgrade + @$(RM) -r ../bin/upgrade/$(BIN_NAME).S ../bin/upgrade/$(BIN_NAME).dump + @$(OBJDUMP) -x -s $< > ../bin/upgrade/$(BIN_NAME).dump + @$(OBJDUMP) -S $< > ../bin/upgrade/$(BIN_NAME).S +endif + + @$(OBJCOPY) --only-section .text -O binary $< eagle.app.v6.text.bin + @$(OBJCOPY) --only-section .data -O binary $< eagle.app.v6.data.bin + @$(OBJCOPY) --only-section .rodata -O binary $< eagle.app.v6.rodata.bin + @$(OBJCOPY) --only-section .irom0.text -O binary $< eagle.app.v6.irom0text.bin + + @echo "" + @echo "!!!" + +ifeq ($(app), 0) + @python2 ../tools/gen_appbin.py $< 0 $(mode) $(freqdiv) $(size_map) $(app) + @mv eagle.app.flash.bin ../bin/eagle.flash.bin + @mv eagle.app.v6.irom0text.bin ../bin/eagle.irom0text.bin + @rm eagle.app.v6.* + @echo "No boot needed." + @echo "Generate eagle.flash.bin and eagle.irom0text.bin successully in folder bin." + @echo "eagle.flash.bin-------->0x00000" + @echo "eagle.irom0text.bin---->0x10000" +else + ifneq ($(boot), new) + @python2 ../tools/gen_appbin.py $< 1 $(mode) $(freqdiv) $(size_map) $(app) + @echo "Support boot_v1.1 and +" + else + @python2 ../tools/gen_appbin.py $< 2 $(mode) $(freqdiv) $(size_map) $(app) + + ifeq ($(size_map), 6) + @echo "Support boot_v1.4 and +" + else + ifeq ($(size_map), 5) + @echo "Support boot_v1.4 and +" + else + @echo "Support boot_v1.2 and +" + endif + endif + endif + + @mv eagle.app.flash.bin ../bin/upgrade/$(BIN_NAME).bin + @rm eagle.app.v6.* + @echo "Generate $(BIN_NAME).bin successully in folder bin/upgrade." + @echo "boot.bin------------>0x00000" + @echo "$(BIN_NAME).bin--->$(addr)" +endif + + @echo "!!!" + +############################################################# +# Rules base +# Should be done in top-level makefile only +# + +all: .subdirs $(OBJS) $(OLIBS) $(OIMAGES) $(OBINS) $(SPECIAL_MKTARGETS) + +clean: + $(foreach d, $(SUBDIRS), $(MAKE) -C $(d) clean;) + $(RM) -r $(ODIR)/$(TARGET)/$(FLAVOR) + +clobber: $(SPECIAL_CLOBBER) + $(foreach d, $(SUBDIRS), $(MAKE) -C $(d) clobber;) + $(RM) -r $(ODIR) + +.subdirs: + @set -e; $(foreach d, $(SUBDIRS), $(MAKE) -C $(d);) + +#.subdirs: +# $(foreach d, $(SUBDIRS), $(MAKE) -C $(d)) + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(MAKECMDGOALS),clobber) +ifdef DEPS +sinclude $(DEPS) +endif +endif +endif + +$(OBJODIR)/%.o: %.c + @mkdir -p $(OBJODIR); + $(CC) $(if $(findstring $<,$(DSRCS)),$(DFLAGS),$(CFLAGS)) $(COPTS_$(*F)) -o $@ -c $< + +$(OBJODIR)/%.d: %.c + @mkdir -p $(OBJODIR); + @echo DEPEND: $(CC) -M $(CFLAGS) $< + @set -e; rm -f $@; \ + $(CC) -M $(CFLAGS) $< > $@.$$$$; \ + sed 's,\($*\.o\)[ :]*,$(OBJODIR)/\1 $@ : ,g' < $@.$$$$ > $@; \ + rm -f $@.$$$$ + +$(OBJODIR)/%.o: %.cpp + @mkdir -p $(OBJODIR); + $(CXX) $(if $(findstring $<,$(DSRCS)),$(DFLAGS),$(CFLAGS)) $(COPTS_$(*F)) -o $@ -c $< + +$(OBJODIR)/%.d: %.cpp + @mkdir -p $(OBJODIR); + @echo DEPEND: $(CXX) -M $(CFLAGS) $< + @set -e; rm -f $@; \ + sed 's,\($*\.o\)[ :]*,$(OBJODIR)/\1 $@ : ,g' < $@.$$$$ > $@; \ + rm -f $@.$$$$ + +$(OBJODIR)/%.o: %.s + @mkdir -p $(OBJODIR); + $(CC) $(CFLAGS) -o $@ -c $< + +$(OBJODIR)/%.d: %.s + @mkdir -p $(OBJODIR); \ + set -e; rm -f $@; \ + $(CC) -M $(CFLAGS) $< > $@.$$$$; \ + sed 's,\($*\.o\)[ :]*,$(OBJODIR)/\1 $@ : ,g' < $@.$$$$ > $@; \ + rm -f $@.$$$$ + +$(OBJODIR)/%.o: %.S + @mkdir -p $(OBJODIR); + $(CC) $(CFLAGS) -D__ASSEMBLER__ -o $@ -c $< + +$(OBJODIR)/%.d: %.S + @mkdir -p $(OBJODIR); \ + set -e; rm -f $@; \ + $(CC) -M $(CFLAGS) $< > $@.$$$$; \ + sed 's,\($*\.o\)[ :]*,$(OBJODIR)/\1 $@ : ,g' < $@.$$$$ > $@; \ + rm -f $@.$$$$ + +$(foreach lib,$(GEN_LIBS),$(eval $(call ShortcutRule,$(lib),$(LIBODIR)))) + +$(foreach image,$(GEN_IMAGES),$(eval $(call ShortcutRule,$(image),$(IMAGEODIR)))) + +$(foreach bin,$(GEN_BINS),$(eval $(call ShortcutRule,$(bin),$(BINODIR)))) + +$(foreach lib,$(GEN_LIBS),$(eval $(call MakeLibrary,$(basename $(lib))))) + +$(foreach image,$(GEN_IMAGES),$(eval $(call MakeImage,$(basename $(image))))) + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include -I $(PDIR)include/$(TARGET) -I $(PDIR)driver_lib/include +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile diff --git a/examples/ESP8266_NONOS_SDK/README.md b/examples/ESP8266_NONOS_SDK/README.md new file mode 100644 index 0000000..764f1c7 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/README.md @@ -0,0 +1,52 @@ +# Support Policy for ESP8266 NonOS + +Starting from December 2019, + +* We will not add any new features to the ESP8266 NonOS SDK. +* We will only fix critical bugs in the ESP8266 NonOS SDK. +* We will only maintain the master branch of ESP8266 NonOS SDK, which is a continuously bug-fix version based on v3.0. This means: + * All other released branches will not be updated. + * All the future versions will be released from only the master branch mentioned above. +* It is suggested that the [ESP8266_RTOS_SDK](https://github.com/espressif/ESP8266_RTOS_SDK), instead of ESP8266 NonOS SDK, be used for your projects. + +The latest ESP8266_RTOS_SDK allows users to develop applications using an architecture that are compatible with the SDKs of all Espressif chips, including ESP8266 series, ESP32 series, and the upcoming new series of chips. Switching to ESP8266_RTOS_SDK will helps users to: + +* Eliminate the necessity to maintain more than one applications (for different chips), thus greatly reducing maintenance costs. +* Easily switch to other Espressif chips in the future for enhanced flexibility, less dependency, and reduced time-to-market. + +Thank you for your interest in Espressif products. + +# ESP8266 NonOS 支持政策 + +自 2019 年 12 月起,我们将: + +* 停止为 ESP8266 NonOS 新增任何功能。 +* 仅修复 ESP8266 NonOS 的关键 bug。 +* 所有更新仅在 master 分支进行,即基于 v3.0.0 的持续 bug 修复版本。这意味着: + * 其他任何 release 分支均不再提供维护; + * 所有更新均将通过上述 master 分支发布。 +* 建议客户使用新版 [ESP8266_RTOS_SDK](https://github.com/espressif/ESP8266_RTOS_SDK)。 + +简单来说,新版 ESP8266_RTOS_SDK 可帮助客户避免对单一 SDK 的依赖,允许客户应用程序同时兼容多款乐鑫芯片,包括 ESP8266 系列、ESP32 系列以及未来发布的新产品。使用 ESP8266_RTOS_SDK 允许客户: + +* 避免同时维护针对不同芯片的多套应用程序,从而降低维护成本。 +* 未来可轻松切换至其他乐鑫芯片,从而提高灵活性、降低对单一芯片的依赖,并缩短上市时间。 + +感谢大家对乐鑫的支持与关注。 + +# ESP8266_NONOS_SDK + +All documentations @ http://espressif.com/en/support/download/documents?keys=&field_type_tid%5B%5D=14 + + +## Notes ## +Please add `user_pre_init()` in your project, which will be called before `user_init()`. And you MUST call `system_partition_table_regist()` in `user_pre_init` to register your project partition table. + +The following partition address CAN NOT be modified, and you MUST give the correct address. They are retated to the flash map, please refer to [ESP8266 SDK Getting Started Guide](https://www.espressif.com/sites/default/files/documentation/2a-esp8266-sdk_getting_started_guide_en.pdf) or [ESP8266 SDK 入门指南](https://www.espressif.com/sites/default/files/documentation/2a-esp8266-sdk_getting_started_guide_cn.pdf). + +- SYSTEM\_PARTITION\_BOOTLOADER +- SYSTEM\_PARTITION\_OTA_1 +- SYSTEM\_PARTITION\_OTA_2 +- SYSTEM\_PARTITION\_SYSTEM_PARAMETER + +If you donot use Non-FOTA bin, eagle.irom0.text.bin and irom0.text MUST be downloaded the fixed address, which also can be found in [ESP8266 SDK Getting Started Guide](https://www.espressif.com/sites/default/files/documentation/2a-esp8266-sdk_getting_started_guide_en.pdf) or [ESP8266 SDK 入门指南](https://www.espressif.com/sites/default/files/documentation/2a-esp8266-sdk_getting_started_guide_cn.pdf), and you can define their partition type after `SYSTEM_PARTITION_CUSTOMER_BEGIN`. \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/VERSION b/examples/ESP8266_NONOS_SDK/VERSION new file mode 100755 index 0000000..3a21ff5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/VERSION @@ -0,0 +1,22 @@ +gwen: + at : 865fa65 + crypto : 865fa65 + espnow : 865fa65 + main : 072755c + net80211 : 072755c + pp : 865fa65 + ssl : 865fa65 + upgrade : 81bde69 + wpa : 1cef03c + wpa2 : 865fa65 + wps : 865fa65 + +phy: + phy : 1156_0 + +gitlab: + driver : 5a2a54b4 + json : f55d5fee + lwip : 3c984cd8 + mbedtls : 82b93fe5 + smartconfig : ea1d4a13(v2.5.5) diff --git a/examples/ESP8266_NONOS_SDK/bin/at/1024+1024/user1.2048.new.5.bin b/examples/ESP8266_NONOS_SDK/bin/at/1024+1024/user1.2048.new.5.bin new file mode 100644 index 0000000..4e7da13 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/at/1024+1024/user1.2048.new.5.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/at/1024+1024/user2.2048.new.5.bin b/examples/ESP8266_NONOS_SDK/bin/at/1024+1024/user2.2048.new.5.bin new file mode 100644 index 0000000..b8a5225 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/at/1024+1024/user2.2048.new.5.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/at/512+512/user1.1024.new.2.bin b/examples/ESP8266_NONOS_SDK/bin/at/512+512/user1.1024.new.2.bin new file mode 100644 index 0000000..3de7ffa Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/at/512+512/user1.1024.new.2.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/at/512+512/user2.1024.new.2.bin b/examples/ESP8266_NONOS_SDK/bin/at/512+512/user2.1024.new.2.bin new file mode 100644 index 0000000..f10bedb Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/at/512+512/user2.1024.new.2.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/at/README.md b/examples/ESP8266_NONOS_SDK/bin/at/README.md new file mode 100755 index 0000000..abe0333 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/bin/at/README.md @@ -0,0 +1,72 @@ +# Notice: +AT firmware becomes larger since it supports more functions. So, we provide two firmwares here: + +* 1024+1024: Normal AT, which is compiled from ESP8266_NONOS_SDK/examples/at, and uses mbedTLS lib. +* 512+512: Nano AT, which is compiled from ESP8266_NONOS_SDK/examples/at_nano, and uses SSL lib that supports less cipher suites. +It is suggested to use normal AT(1024+1024), if your flash size is 2MB or larger. + +# BOOT MODE +## download + +### Flash size 8Mbit: 512KB+512KB + boot_v1.2+.bin 0x00000 + user1.1024.new.2.bin 0x01000 + esp_init_data_default.bin 0xfc000 + blank.bin 0x7e000 & 0xfe000 + + +### Flash size 16Mbit-C1: 1024KB+1024KB + boot_v1.2+.bin 0x00000 + user1.2048.new.5.bin 0x01000 + esp_init_data_default.bin 0x1fc000 + blank.bin 0xfe000 & 0x1fe000 + +# NON-BOOT MODE +## download + eagle.flash.bin 0x00000 + eagle.irom0text.bin 0x10000 + blank.bin + Flash size 8Mbit: 0x7e000 & 0xfe000 + Flash size 16Mbit: 0x7e000 & 0x1fe000 + Flash size 16Mbit-C1: 0xfe000 & 0x1fe000 + Flash size 32Mbit: 0x7e000 & 0x3fe000 + Flash size 32Mbit-C1: 0xfe000 & 0x3fe000 + esp_init_data_default.bin + Flash size 8Mbit: 0xfc000 + Flash size 16Mbit: 0x1fc000 + Flash size 16Mbit-C1: 0x1fc000 + Flash size 32Mbit: 0x3fc000 + Flash size 32Mbit-C1: 0x3fc000 + +## compile + modify eagle.app.v6.ld, as + irom0_0_seg : org = 0x40210000, len = 0x6C000 + + +> NOTICE: UPDATE is not supported in non-boot mode; 4Mbit Flash is not supported in non-boot mode; + +# Update steps +1.Make sure TE(terminal equipment) is in sta or sta+ap mode + + AT+CWMODE=3 + OK + +2.Make sure TE got ip address + + AT+CWJAP="ssid","12345678" + OK + + AT+CIFSR + 192.168.1.134 + +3.Let's update + + AT+CIUPDATE + +CIPUPDATE:1 found server + +CIPUPDATE:2 connect server + +CIPUPDATE:3 got edition + +CIPUPDATE:4 start start + + OK + +> NOTICE: If there are mistakes in the updating, then break update and print ERROR. diff --git a/examples/ESP8266_NONOS_SDK/bin/at_sdio/1024+1024/user1.2048.new.5.bin b/examples/ESP8266_NONOS_SDK/bin/at_sdio/1024+1024/user1.2048.new.5.bin new file mode 100644 index 0000000..011f414 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/at_sdio/1024+1024/user1.2048.new.5.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/at_sdio/1024+1024/user2.2048.new.5.bin b/examples/ESP8266_NONOS_SDK/bin/at_sdio/1024+1024/user2.2048.new.5.bin new file mode 100644 index 0000000..97ba857 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/at_sdio/1024+1024/user2.2048.new.5.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/at_sdio/README.md b/examples/ESP8266_NONOS_SDK/bin/at_sdio/README.md new file mode 100755 index 0000000..d5097b2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/bin/at_sdio/README.md @@ -0,0 +1,63 @@ +# BOOT MODE +## download +### Flash size 16Mbit-C1: 1024KB+1024KB + boot_v1.2+.bin 0x00000 + user1.2048.new.5.bin 0x01000 + esp_init_data_default.bin 0x1fc000 + blank.bin 0xfe000 & 0x1fe000 + +### Flash size 32Mbit-C1: 1024KB+1024KB + boot_v1.2+.bin 0x00000 + user1.2048.new.5.bin 0x01000 + esp_init_data_default.bin 0x3fc000 + blank.bin 0xfe000 & 0x3fe000 + +# NON-BOOT MODE +## download + eagle.flash.bin 0x00000 + eagle.irom0text.bin 0x10000 + blank.bin + Flash size 8Mbit: 0x7e000 & 0xfe000 + Flash size 16Mbit: 0x7e000 & 0x1fe000 + Flash size 16Mbit-C1: 0xfe000 & 0x1fe000 + Flash size 32Mbit: 0x7e000 & 0x3fe000 + Flash size 32Mbit-C1: 0xfe000 & 0x3fe000 + esp_init_data_default.bin + Flash size 8Mbit: 0xfc000 + Flash size 16Mbit: 0x1fc000 + Flash size 16Mbit-C1: 0x1fc000 + Flash size 32Mbit: 0x3fc000 + Flash size 32Mbit-C1: 0x3fc000 + +## compile + modify eagle.app.v6.ld, as + irom0_0_seg : org = 0x40210000, len = 0x6C000 + + +> NOTICE: UPDATE is not supported in non-boot mode; 4Mbit Flash is not supported in non-boot mode; + +# Update steps +1.Make sure TE(terminal equipment) is in sta or sta+ap mode + + AT+CWMODE=3 + OK + +2.Make sure TE got ip address + + AT+CWJAP="ssid","12345678" + OK + + AT+CIFSR + 192.168.1.134 + +3.Let's update + + AT+CIUPDATE + +CIPUPDATE:1 found server + +CIPUPDATE:2 connect server + +CIPUPDATE:3 got edition + +CIPUPDATE:4 start start + + OK + +> NOTICE: If there are mistakes in the updating, then break update and print ERROR. \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/bin/blank.bin b/examples/ESP8266_NONOS_SDK/bin/blank.bin new file mode 100644 index 0000000..7de9e36 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/bin/blank.bin @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/bin/boot_v1.2.bin b/examples/ESP8266_NONOS_SDK/bin/boot_v1.2.bin new file mode 100644 index 0000000..78e1254 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/boot_v1.2.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/boot_v1.6.bin b/examples/ESP8266_NONOS_SDK/bin/boot_v1.6.bin new file mode 100644 index 0000000..6b11db7 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/boot_v1.6.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/boot_v1.7.bin b/examples/ESP8266_NONOS_SDK/bin/boot_v1.7.bin new file mode 100644 index 0000000..94a1257 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/boot_v1.7.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/esp_init_data_default_v05.bin b/examples/ESP8266_NONOS_SDK/bin/esp_init_data_default_v05.bin new file mode 100644 index 0000000..0df6544 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/esp_init_data_default_v05.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/esp_init_data_default_v08.bin b/examples/ESP8266_NONOS_SDK/bin/esp_init_data_default_v08.bin new file mode 100644 index 0000000..32385dc Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/esp_init_data_default_v08.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.S b/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.S new file mode 100644 index 0000000..353df6e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.S @@ -0,0 +1,86464 @@ + +.output/eagle/debug/image/eagle.app.v6.out: file format elf32-xtensa-le + + +Disassembly of section .irom0.text: + +40201010 : +40201010: 0018a4 excw +40201013: 18b440 excw +40201016: 00 .byte 00 +40201017: 40 .byte 0x40 + +40201018 : +40201018: c0c112 addi a1, a1, -64 +4020101b: d1d9 s32i.n a13, a1, 52 +4020101d: c1e9 s32i.n a14, a1, 48 +4020101f: b1f9 s32i.n a15, a1, 44 +40201021: 02dd mov.n a13, a2 +40201023: 04fd mov.n a15, a4 +40201025: 052d mov.n a2, a5 +40201027: 03ed mov.n a14, a3 +40201029: 840c movi.n a4, 8 +4020102b: a6a032 movi a3, 166 +4020102e: f109 s32i.n a0, a1, 60 +40201030: e1c9 s32i.n a12, a1, 56 +40201032: 20c550 or a12, a5, a5 +40201035: fff601 l32r a0, 40201010 <_irom0_text_start> +40201038: 0000c0 callx0 a0 +4020103b: 0f3d mov.n a3, a15 +4020103d: 114ed0 slli a4, a14, 3 +40201040: 08cc22 addi a2, a12, 8 +40201043: fff401 l32r a0, 40201014 <_irom0_text_start+0x4> +40201046: 0000c0 callx0 a0 +40201049: 031c movi.n a3, 16 +4020104b: 0d2d mov.n a2, a13 +4020104d: 004bc5 call0 4020150c +40201050: 02fd mov.n a15, a2 +40201052: f27c movi.n a2, -1 +40201054: 07cf16 beqz a15, 402010d4 +40201057: 7480e0 extui a8, a14, 0, 8 +4020105a: 050c movi.n a5, 0 +4020105c: 670c movi.n a7, 6 +4020105e: 1d0c movi.n a13, 1 +40201060: b02dc0 addx8 a2, a13, a12 +40201063: 4129 s32i.n a2, a1, 16 +40201065: 572ed7 blt a14, a13, 402010c0 +40201068: 840c movi.n a4, 8 +4020106a: 0c3d mov.n a3, a12 +4020106c: 012d mov.n a2, a1 +4020106e: 5179 s32i.n a7, a1, 20 +40201070: 7189 s32i.n a8, a1, 28 +40201072: 6159 s32i.n a5, a1, 24 +40201074: ffe801 l32r a0, 40201014 <_irom0_text_start+0x4> +40201077: 0000c0 callx0 a0 +4020107a: 840c movi.n a4, 8 +4020107c: 4138 l32i.n a3, a1, 16 +4020107e: 214a add.n a2, a1, a4 +40201080: ffe501 l32r a0, 40201014 <_irom0_text_start+0x4> +40201083: 0000c0 callx0 a0 +40201086: 014d mov.n a4, a1 +40201088: 013d mov.n a3, a1 +4020108a: 0f2d mov.n a2, a15 +4020108c: 004e05 call0 40201570 +4020108f: 840c movi.n a4, 8 +40201091: 013d mov.n a3, a1 +40201093: 0c2d mov.n a2, a12 +40201095: ffdf01 l32r a0, 40201014 <_irom0_text_start+0x4> +40201098: 0000c0 callx0 a0 +4020109b: 6158 l32i.n a5, a1, 24 +4020109d: 070c22 l8ui a2, a12, 7 +402010a0: 35da add.n a3, a5, a13 +402010a2: 302320 xor a2, a3, a2 +402010a5: 074c22 s8i a2, a12, 7 +402010a8: 840c movi.n a4, 8 +402010aa: 4128 l32i.n a2, a1, 16 +402010ac: 314a add.n a3, a1, a4 +402010ae: ffd901 l32r a0, 40201014 <_irom0_text_start+0x4> +402010b1: 0000c0 callx0 a0 +402010b4: dd1b addi.n a13, a13, 1 +402010b6: 7188 l32i.n a8, a1, 28 +402010b8: 5178 l32i.n a7, a1, 20 +402010ba: 6158 l32i.n a5, a1, 24 +402010bc: ffe806 j 40201060 +402010bf: 558000 extui a8, a0, 16, 6 +402010c2: c77280 excw +402010c5: ff .byte 0xff +402010c6: 745050 extui a5, a5, 0, 8 +402010c9: f91756 bnez a7, 4020105e +402010cc: 202ff0 or a2, a15, a15 +402010cf: 004bc5 call0 4020158c +402010d2: 020c movi.n a2, 0 +402010d4: f108 l32i.n a0, a1, 60 +402010d6: e1c8 l32i.n a12, a1, 56 +402010d8: d1d8 l32i.n a13, a1, 52 +402010da: c1e8 l32i.n a14, a1, 48 +402010dc: b1f8 l32i.n a15, a1, 44 +402010de: 40c112 addi a1, a1, 64 +402010e1: f00d ret.n +402010e3: ccf000 excw +402010e6: ff .byte 0xff +402010e7: 3f .byte 0x3f +402010e8: 000000 ill +402010eb: ff .byte 0xff +402010ec: ff0000 excw +402010ef: ff0000 excw + ... + +402010f4 : +402010f4: e0c112 addi a1, a1, -32 +402010f7: 71c9 s32i.n a12, a1, 28 +402010f9: 61d9 s32i.n a13, a1, 24 +402010fb: 51e9 s32i.n a14, a1, 20 +402010fd: 41f9 s32i.n a15, a1, 16 +402010ff: 0268 l32i.n a6, a2, 0 +40201101: 0304b2 l8ui a11, a4, 3 +40201104: 000472 l8ui a7, a4, 0 +40201107: 30bb60 xor a11, a11, a6 +4020110a: 010462 l8ui a6, a4, 1 +4020110d: 017780 slli a7, a7, 24 +40201110: 30bb70 xor a11, a11, a7 +40201113: 116600 slli a6, a6, 16 +40201116: 306b60 xor a6, a11, a6 +40201119: 0204b2 l8ui a11, a4, 2 +4020111c: 0704a2 l8ui a10, a4, 7 +4020111f: 11bb80 slli a11, a11, 8 +40201122: 30b6b0 xor a11, a6, a11 +40201125: 1268 l32i.n a6, a2, 4 +40201127: 040472 l8ui a7, a4, 4 +4020112a: 30aa60 xor a10, a10, a6 +4020112d: 050462 l8ui a6, a4, 5 +40201130: 017780 slli a7, a7, 24 +40201133: 30aa70 xor a10, a10, a7 +40201136: 116600 slli a6, a6, 16 +40201139: 306a60 xor a6, a10, a6 +4020113c: 0604a2 l8ui a10, a4, 6 +4020113f: 0b0492 l8ui a9, a4, 11 +40201142: 11aa80 slli a10, a10, 8 +40201145: 30a6a0 xor a10, a6, a10 +40201148: 2268 l32i.n a6, a2, 8 +4020114a: 080472 l8ui a7, a4, 8 +4020114d: 309960 xor a9, a9, a6 +40201150: 090462 l8ui a6, a4, 9 +40201153: 017780 slli a7, a7, 24 +40201156: 309970 xor a9, a9, a7 +40201159: 116600 slli a6, a6, 16 +4020115c: 306960 xor a6, a9, a6 +4020115f: 0a0492 l8ui a9, a4, 10 +40201162: 0f0472 l8ui a7, a4, 15 +40201165: 119980 slli a9, a9, 8 +40201168: 309690 xor a9, a6, a9 +4020116b: 3268 l32i.n a6, a2, 12 +4020116d: 0c0482 l8ui a8, a4, 12 +40201170: 307760 xor a7, a7, a6 +40201173: 0d0462 l8ui a6, a4, 13 +40201176: 018880 slli a8, a8, 24 +40201179: 307780 xor a7, a7, a8 +4020117c: 116600 slli a6, a6, 16 +4020117f: 306760 xor a6, a7, a6 +40201182: 0e0472 l8ui a7, a4, 14 +40201185: ffd7c1 l32r a12, 402010e4 +40201188: 213130 srai a3, a3, 1 +4020118b: 117780 slli a7, a7, 8 +4020118e: 0139 s32i.n a3, a1, 0 +40201190: 03ed mov.n a14, a3 +40201192: 307670 xor a7, a6, a7 +40201195: 02dd mov.n a13, a2 +40201197: 0c3d mov.n a3, a12 +40201199: 7548b0 extui a4, a11, 24, 8 +4020119c: a044c0 addx4 a4, a4, a12 +4020119f: 0468 l32i.n a6, a4, 0 +402011a1: 4d48 l32i.n a4, a13, 16 +402011a3: ee0b addi.n a14, a14, -1 +402011a5: 304640 xor a4, a6, a4 +402011a8: 746070 extui a6, a7, 0, 8 +402011ab: a066c0 addx4 a6, a6, a12 +402011ae: 0668 l32i.n a6, a6, 0 +402011b0: 404810 ssai 24 +402011b3: 816660 src a6, a6, a6 +402011b6: 306460 xor a6, a4, a6 +402011b9: 7540a0 extui a4, a10, 16, 8 +402011bc: a044c0 addx4 a4, a4, a12 +402011bf: 0488 l32i.n a8, a4, 0 +402011c1: 404800 ssai 8 +402011c4: 818880 src a8, a8, a8 +402011c7: 304680 xor a4, a6, a8 +402011ca: 746890 extui a6, a9, 8, 8 +402011cd: a066c0 addx4 a6, a6, a12 +402011d0: 0688 l32i.n a8, a6, 0 +402011d2: 7460b0 extui a6, a11, 0, 8 +402011d5: 404010 ssai 16 +402011d8: 818880 src a8, a8, a8 +402011db: 308480 xor a8, a4, a8 +402011de: 7548a0 extui a4, a10, 24, 8 +402011e1: a044c0 addx4 a4, a4, a12 +402011e4: 04f8 l32i.n a15, a4, 0 +402011e6: 5d48 l32i.n a4, a13, 20 +402011e8: a066c0 addx4 a6, a6, a12 +402011eb: 304f40 xor a4, a15, a4 +402011ee: 06f8 l32i.n a15, a6, 0 +402011f0: 404810 ssai 24 +402011f3: 816ff0 src a6, a15, a15 +402011f6: 30f460 xor a15, a4, a6 +402011f9: 754090 extui a4, a9, 16, 8 +402011fc: a044c0 addx4 a4, a4, a12 +402011ff: 0468 l32i.n a6, a4, 0 +40201201: 404800 ssai 8 +40201204: 816660 src a6, a6, a6 +40201207: 304f60 xor a4, a15, a6 +4020120a: 746870 extui a6, a7, 8, 8 +4020120d: a066c0 addx4 a6, a6, a12 +40201210: 0668 l32i.n a6, a6, 0 +40201212: 404010 ssai 16 +40201215: 816660 src a6, a6, a6 +40201218: 306460 xor a6, a4, a6 +4020121b: 754890 extui a4, a9, 24, 8 +4020121e: a044c0 addx4 a4, a4, a12 +40201221: 04f8 l32i.n a15, a4, 0 +40201223: 6d48 l32i.n a4, a13, 24 +40201225: 749090 extui a9, a9, 0, 8 +40201228: 30ff40 xor a15, a15, a4 +4020122b: 7440a0 extui a4, a10, 0, 8 +4020122e: a044c0 addx4 a4, a4, a12 +40201231: 0448 l32i.n a4, a4, 0 +40201233: a099c0 addx4 a9, a9, a12 +40201236: 404810 ssai 24 +40201239: 814440 src a4, a4, a4 +4020123c: 30ff40 xor a15, a15, a4 +4020123f: 754070 extui a4, a7, 16, 8 +40201242: a044c0 addx4 a4, a4, a12 +40201245: 0448 l32i.n a4, a4, 0 +40201247: 757870 extui a7, a7, 24, 8 +4020124a: 404800 ssai 8 +4020124d: 814440 src a4, a4, a4 +40201250: 30ff40 xor a15, a15, a4 +40201253: 7448b0 extui a4, a11, 8, 8 +40201256: a044c0 addx4 a4, a4, a12 +40201259: 0448 l32i.n a4, a4, 0 +4020125b: a077c0 addx4 a7, a7, a12 +4020125e: 404010 ssai 16 +40201261: 814440 src a4, a4, a4 +40201264: 304f40 xor a4, a15, a4 +40201267: 07f8 l32i.n a15, a7, 0 +40201269: 7d78 l32i.n a7, a13, 28 +4020126b: 75b0b0 extui a11, a11, 16, 8 +4020126e: 307f70 xor a7, a15, a7 +40201271: 09f8 l32i.n a15, a9, 0 +40201273: a0bbc0 addx4 a11, a11, a12 +40201276: 404810 ssai 24 +40201279: 81fff0 src a15, a15, a15 +4020127c: 3077f0 xor a7, a7, a15 +4020127f: 0bf8 l32i.n a15, a11, 0 +40201281: 74a8a0 extui a10, a10, 8, 8 +40201284: a0aac0 addx4 a10, a10, a12 +40201287: 404800 ssai 8 +4020128a: 81fff0 src a15, a15, a15 +4020128d: 30f7f0 xor a15, a7, a15 +40201290: 0a78 l32i.n a7, a10, 0 +40201292: 20cdd2 addi a13, a13, 32 +40201295: 404010 ssai 16 +40201298: 817770 src a7, a7, a7 +4020129b: 307f70 xor a7, a15, a7 +4020129e: 039d mov.n a9, a3 +402012a0: 75a880 extui a10, a8, 24, 8 +402012a3: 0ffe16 beqz a14, 402013a6 +402012a6: a0aa30 addx4 a10, a10, a3 +402012a9: 0aa8 l32i.n a10, a10, 0 +402012ab: 0d98 l32i.n a9, a13, 0 +402012ad: 309a90 xor a9, a10, a9 +402012b0: 74a070 extui a10, a7, 0, 8 +402012b3: a0aa30 addx4 a10, a10, a3 +402012b6: 0aa8 l32i.n a10, a10, 0 +402012b8: 404810 ssai 24 +402012bb: 81aaa0 src a10, a10, a10 +402012be: 30a9a0 xor a10, a9, a10 +402012c1: 759060 extui a9, a6, 16, 8 +402012c4: a09930 addx4 a9, a9, a3 +402012c7: 09b8 l32i.n a11, a9, 0 +402012c9: 404800 ssai 8 +402012cc: 81bbb0 src a11, a11, a11 +402012cf: 309ab0 xor a9, a10, a11 +402012d2: 74a840 extui a10, a4, 8, 8 +402012d5: a0aa30 addx4 a10, a10, a3 +402012d8: 0ab8 l32i.n a11, a10, 0 +402012da: 74a080 extui a10, a8, 0, 8 +402012dd: 404010 ssai 16 +402012e0: 81bbb0 src a11, a11, a11 +402012e3: 30b9b0 xor a11, a9, a11 +402012e6: 759860 extui a9, a6, 24, 8 +402012e9: a09930 addx4 a9, a9, a3 +402012ec: 09f8 l32i.n a15, a9, 0 +402012ee: 1d98 l32i.n a9, a13, 4 +402012f0: a0aa30 addx4 a10, a10, a3 +402012f3: 309f90 xor a9, a15, a9 +402012f6: 0af8 l32i.n a15, a10, 0 +402012f8: 404810 ssai 24 +402012fb: 81aff0 src a10, a15, a15 +402012fe: 30f9a0 xor a15, a9, a10 +40201301: 759040 extui a9, a4, 16, 8 +40201304: a09930 addx4 a9, a9, a3 +40201307: 09a8 l32i.n a10, a9, 0 +40201309: 404800 ssai 8 +4020130c: 81aaa0 src a10, a10, a10 +4020130f: 309fa0 xor a9, a15, a10 +40201312: 74a870 extui a10, a7, 8, 8 +40201315: a0aa30 addx4 a10, a10, a3 +40201318: 0aa8 l32i.n a10, a10, 0 +4020131a: 404010 ssai 16 +4020131d: 81aaa0 src a10, a10, a10 +40201320: 30a9a0 xor a10, a9, a10 +40201323: 759840 extui a9, a4, 24, 8 +40201326: a09930 addx4 a9, a9, a3 +40201329: 09f8 l32i.n a15, a9, 0 +4020132b: 2d98 l32i.n a9, a13, 8 +4020132d: 744040 extui a4, a4, 0, 8 +40201330: 30ff90 xor a15, a15, a9 +40201333: 749060 extui a9, a6, 0, 8 +40201336: a09930 addx4 a9, a9, a3 +40201339: 0998 l32i.n a9, a9, 0 +4020133b: a04430 addx4 a4, a4, a3 +4020133e: 404810 ssai 24 +40201341: 819990 src a9, a9, a9 +40201344: 30ff90 xor a15, a15, a9 +40201347: 759070 extui a9, a7, 16, 8 +4020134a: a09930 addx4 a9, a9, a3 +4020134d: 0998 l32i.n a9, a9, 0 +4020134f: 757870 extui a7, a7, 24, 8 +40201352: 404800 ssai 8 +40201355: 819990 src a9, a9, a9 +40201358: 30ff90 xor a15, a15, a9 +4020135b: 749880 extui a9, a8, 8, 8 +4020135e: a09930 addx4 a9, a9, a3 +40201361: 0998 l32i.n a9, a9, 0 +40201363: a07730 addx4 a7, a7, a3 +40201366: 404010 ssai 16 +40201369: 819990 src a9, a9, a9 +4020136c: 309f90 xor a9, a15, a9 +4020136f: 07f8 l32i.n a15, a7, 0 +40201371: 3d78 l32i.n a7, a13, 12 +40201373: 758080 extui a8, a8, 16, 8 +40201376: 307f70 xor a7, a15, a7 +40201379: 04f8 l32i.n a15, a4, 0 +4020137b: a08830 addx4 a8, a8, a3 +4020137e: 404810 ssai 24 +40201381: 81fff0 src a15, a15, a15 +40201384: 3077f0 xor a7, a7, a15 +40201387: 08f8 l32i.n a15, a8, 0 +40201389: 746860 extui a6, a6, 8, 8 +4020138c: 404800 ssai 8 +4020138f: 81fff0 src a15, a15, a15 +40201392: a06630 addx4 a6, a6, a3 +40201395: 30f7f0 xor a15, a7, a15 +40201398: 0678 l32i.n a7, a6, 0 +4020139a: 404010 ssai 16 +4020139d: 817770 src a7, a7, a7 +402013a0: 307f70 xor a7, a15, a7 +402013a3: ff7c86 j 40201199 +402013a6: 01b8 l32i.n a11, a1, 0 +402013a8: a0aa90 addx4 a10, a10, a9 +402013ab: 113bb0 slli a3, a11, 5 +402013ae: 223a add.n a2, a2, a3 +402013b0: 0a38 l32i.n a3, a10, 0 +402013b2: ff4db1 l32r a11, 402010e8 +402013b5: 113380 slli a3, a3, 8 +402013b8: 10d3b0 and a13, a3, a11 +402013bb: 753060 extui a3, a6, 16, 8 +402013be: a03390 addx4 a3, a3, a9 +402013c1: ff4aa1 l32r a10, 402010ec +402013c4: 0338 l32i.n a3, a3, 0 +402013c6: 02c8 l32i.n a12, a2, 0 +402013c8: 1033a0 and a3, a3, a10 +402013cb: 303d30 xor a3, a13, a3 +402013ce: 30c3c0 xor a12, a3, a12 +402013d1: 743840 extui a3, a4, 8, 8 +402013d4: a03390 addx4 a3, a3, a9 +402013d7: 03d8 l32i.n a13, a3, 0 +402013d9: ff4531 l32r a3, 402010f0 +402013dc: 10dd30 and a13, a13, a3 +402013df: 30dcd0 xor a13, a12, a13 +402013e2: 74c070 extui a12, a7, 0, 8 +402013e5: a0cc90 addx4 a12, a12, a9 +402013e8: 010cc2 l8ui a12, a12, 1 +402013eb: 30cdc0 xor a12, a13, a12 +402013ee: 75d8c0 extui a13, a12, 24, 8 +402013f1: 0045d2 s8i a13, a5, 0 +402013f4: f5d0c0 extui a13, a12, 16, 16 +402013f7: 0145d2 s8i a13, a5, 1 +402013fa: 0345c2 s8i a12, a5, 3 +402013fd: 41d8c0 srli a13, a12, 8 +40201400: 75c860 extui a12, a6, 24, 8 +40201403: a0cc90 addx4 a12, a12, a9 +40201406: 0cc8 l32i.n a12, a12, 0 +40201408: 0245d2 s8i a13, a5, 2 +4020140b: 11cc80 slli a12, a12, 8 +4020140e: 10dcb0 and a13, a12, a11 +40201411: 75c040 extui a12, a4, 16, 8 +40201414: a0cc90 addx4 a12, a12, a9 +40201417: 0cc8 l32i.n a12, a12, 0 +40201419: 10cca0 and a12, a12, a10 +4020141c: 30cdc0 xor a12, a13, a12 +4020141f: 12d8 l32i.n a13, a2, 4 +40201421: 30ccd0 xor a12, a12, a13 +40201424: 74d870 extui a13, a7, 8, 8 +40201427: a0dd90 addx4 a13, a13, a9 +4020142a: 0dd8 l32i.n a13, a13, 0 +4020142c: 10dd30 and a13, a13, a3 +4020142f: 30dcd0 xor a13, a12, a13 +40201432: 74c080 extui a12, a8, 0, 8 +40201435: a0cc90 addx4 a12, a12, a9 +40201438: 010cc2 l8ui a12, a12, 1 +4020143b: 30cdc0 xor a12, a13, a12 +4020143e: 75d8c0 extui a13, a12, 24, 8 +40201441: 0445d2 s8i a13, a5, 4 +40201444: f5d0c0 extui a13, a12, 16, 16 +40201447: 0545d2 s8i a13, a5, 5 +4020144a: 0745c2 s8i a12, a5, 7 +4020144d: 41d8c0 srli a13, a12, 8 +40201450: 75c840 extui a12, a4, 24, 8 +40201453: a0cc90 addx4 a12, a12, a9 +40201456: 0cc8 l32i.n a12, a12, 0 +40201458: 0645d2 s8i a13, a5, 6 +4020145b: 11cc80 slli a12, a12, 8 +4020145e: 10dcb0 and a13, a12, a11 +40201461: 75c070 extui a12, a7, 16, 8 +40201464: a0cc90 addx4 a12, a12, a9 +40201467: 0cc8 l32i.n a12, a12, 0 +40201469: 757870 extui a7, a7, 24, 8 +4020146c: 10cca0 and a12, a12, a10 +4020146f: 30cdc0 xor a12, a13, a12 +40201472: 22d8 l32i.n a13, a2, 8 +40201474: a07790 addx4 a7, a7, a9 +40201477: 30ccd0 xor a12, a12, a13 +4020147a: 74d880 extui a13, a8, 8, 8 +4020147d: a0dd90 addx4 a13, a13, a9 +40201480: 0dd8 l32i.n a13, a13, 0 +40201482: 0778 l32i.n a7, a7, 0 +40201484: 10dd30 and a13, a13, a3 +40201487: 30dcd0 xor a13, a12, a13 +4020148a: 74c060 extui a12, a6, 0, 8 +4020148d: a0cc90 addx4 a12, a12, a9 +40201490: 010cc2 l8ui a12, a12, 1 +40201493: 758080 extui a8, a8, 16, 8 +40201496: 30cdc0 xor a12, a13, a12 +40201499: 75d8c0 extui a13, a12, 24, 8 +4020149c: 0845d2 s8i a13, a5, 8 +4020149f: f5d0c0 extui a13, a12, 16, 16 +402014a2: 0945d2 s8i a13, a5, 9 +402014a5: 117780 slli a7, a7, 8 +402014a8: 41d8c0 srli a13, a12, 8 +402014ab: a08890 addx4 a8, a8, a9 +402014ae: 0a45d2 s8i a13, a5, 10 +402014b1: 0b45c2 s8i a12, a5, 11 +402014b4: 10b7b0 and a11, a7, a11 +402014b7: 0878 l32i.n a7, a8, 0 +402014b9: 746860 extui a6, a6, 8, 8 +402014bc: 3228 l32i.n a2, a2, 12 +402014be: 10a7a0 and a10, a7, a10 +402014c1: a06690 addx4 a6, a6, a9 +402014c4: 30aba0 xor a10, a11, a10 +402014c7: 30aa20 xor a10, a10, a2 +402014ca: 744040 extui a4, a4, 0, 8 +402014cd: 0628 l32i.n a2, a6, 0 +402014cf: a09490 addx4 a9, a4, a9 +402014d2: 103230 and a3, a2, a3 +402014d5: 010922 l8ui a2, a9, 1 +402014d8: 303a30 xor a3, a10, a3 +402014db: 303320 xor a3, a3, a2 +402014de: 752830 extui a2, a3, 24, 8 +402014e1: 0c4522 s8i a2, a5, 12 +402014e4: f52030 extui a2, a3, 16, 16 +402014e7: 0d4522 s8i a2, a5, 13 +402014ea: 412830 srli a2, a3, 8 +402014ed: 71c8 l32i.n a12, a1, 28 +402014ef: 61d8 l32i.n a13, a1, 24 +402014f1: 51e8 l32i.n a14, a1, 20 +402014f3: 41f8 l32i.n a15, a1, 16 +402014f5: 0e4522 s8i a2, a5, 14 +402014f8: 0f4532 s8i a3, a5, 15 +402014fb: 20c112 addi a1, a1, 32 +402014fe: f00d ret.n +40201500: 230981 l32r a8, 401ca124 <_lit4_end+0xc3df8> +40201503: 209840 or a9, a8, a4 +40201506: d04010 subx2 a4, a0, a1 +40201509: 1e .byte 0x1e +4020150a: 10 .byte 0x10 +4020150b: 40 .byte 0x40 + +4020150c : +4020150c: e0c112 addi a1, a1, -32 +4020150f: 0561d2 s32i a13, a1, 20 +40201512: fffbd1 l32r a13, 40201500 +40201515: 0461e2 s32i a14, a1, 16 +40201518: 0361f2 s32i a15, a1, 12 +4020151b: 02ed mov.n a14, a2 +4020151d: 03fd mov.n a15, a3 +4020151f: 050c movi.n a5, 0 +40201521: 73a042 movi a4, 115 +40201524: 0d3d mov.n a3, a13 +40201526: f4a022 movi a2, 244 +40201529: 61c9 s32i.n a12, a1, 24 +4020152b: 7109 s32i.n a0, a1, 28 +4020152d: fff501 l32r a0, 40201504 +40201530: 0000c0 callx0 a0 +40201533: 02cd mov.n a12, a2 +40201535: 020c movi.n a2, 0 +40201537: 231c27 beq a12, a2, 4020155e +4020153a: 114fd0 slli a4, a15, 3 +4020153d: 0e3d mov.n a3, a14 +4020153f: 0c2d mov.n a2, a12 +40201541: 000785 call0 402015bc +40201544: 0112d6 bgez a2, 40201559 +40201547: 0c2d mov.n a2, a12 +40201549: 78a042 movi a4, 120 +4020154c: 0d3d mov.n a3, a13 +4020154e: ffee01 l32r a0, 40201508 +40201551: 0000c0 callx0 a0 +40201554: 020c movi.n a2, 0 +40201556: 000106 j 4020155e +40201559: 3c6c22 s32i a2, a12, 240 +4020155c: 0c2d mov.n a2, a12 +4020155e: 7108 l32i.n a0, a1, 28 +40201560: 61c8 l32i.n a12, a1, 24 +40201562: 51d8 l32i.n a13, a1, 20 +40201564: 41e8 l32i.n a14, a1, 16 +40201566: 31f8 l32i.n a15, a1, 12 +40201568: 20c112 addi a1, a1, 32 +4020156b: f00d ret.n +4020156d: 000000 ill + +40201570 : +40201570: 205440 or a5, a4, a4 +40201573: 204330 or a4, a3, a3 +40201576: 3c2232 l32i a3, a2, 240 +40201579: f0c112 addi a1, a1, -16 +4020157c: 036102 s32i a0, a1, 12 +4020157f: ffb745 call0 402010f4 +40201582: 3108 l32i.n a0, a1, 12 +40201584: 10c112 addi a1, a1, 16 +40201587: f00d ret.n +40201589: 000000 ill + +4020158c : +4020158c: f0c112 addi a1, a1, -16 +4020158f: f4a042 movi a4, 244 +40201592: 030c movi.n a3, 0 +40201594: 3109 s32i.n a0, a1, 12 +40201596: 21c9 s32i.n a12, a1, 8 +40201598: 02cd mov.n a12, a2 +4020159a: fe9d01 l32r a0, 40201010 <_irom0_text_start> +4020159d: 0000c0 callx0 a0 +402015a0: ffd831 l32r a3, 40201500 +402015a3: 0c2d mov.n a2, a12 +402015a5: 8aa042 movi a4, 138 +402015a8: ffd801 l32r a0, 40201508 +402015ab: 0000c0 callx0 a0 +402015ae: 3108 l32i.n a0, a1, 12 +402015b0: 21c8 l32i.n a12, a1, 8 +402015b2: 10c112 addi a1, a1, 16 +402015b5: f00d ret.n +402015b7: d0f000 subx2 a15, a0, a0 +402015ba: ff .byte 0xff +402015bb: 3f .byte 0x3f + +402015bc : +402015bc: f0c112 addi a1, a1, -16 +402015bf: 31c9 s32i.n a12, a1, 12 +402015c1: 21d9 s32i.n a13, a1, 8 +402015c3: 11e9 s32i.n a14, a1, 4 +402015c5: 01f9 s32i.n a15, a1, 0 +402015c7: 000352 l8ui a5, a3, 0 +402015ca: 016580 slli a6, a5, 24 +402015cd: 010352 l8ui a5, a3, 1 +402015d0: 115500 slli a5, a5, 16 +402015d3: 305650 xor a5, a6, a5 +402015d6: 030362 l8ui a6, a3, 3 +402015d9: 306560 xor a6, a5, a6 +402015dc: 020352 l8ui a5, a3, 2 +402015df: 115580 slli a5, a5, 8 +402015e2: 305650 xor a5, a6, a5 +402015e5: 0259 s32i.n a5, a2, 0 +402015e7: 040352 l8ui a5, a3, 4 +402015ea: 016580 slli a6, a5, 24 +402015ed: 050352 l8ui a5, a3, 5 +402015f0: 115500 slli a5, a5, 16 +402015f3: 305650 xor a5, a6, a5 +402015f6: 070362 l8ui a6, a3, 7 +402015f9: 306560 xor a6, a5, a6 +402015fc: 060352 l8ui a5, a3, 6 +402015ff: 115580 slli a5, a5, 8 +40201602: 305650 xor a5, a6, a5 +40201605: 1259 s32i.n a5, a2, 4 +40201607: 080352 l8ui a5, a3, 8 +4020160a: 016580 slli a6, a5, 24 +4020160d: 090352 l8ui a5, a3, 9 +40201610: 115500 slli a5, a5, 16 +40201613: 305650 xor a5, a6, a5 +40201616: 0b0362 l8ui a6, a3, 11 +40201619: 306560 xor a6, a5, a6 +4020161c: 0a0352 l8ui a5, a3, 10 +4020161f: 115580 slli a5, a5, 8 +40201622: 305650 xor a5, a6, a5 +40201625: 2259 s32i.n a5, a2, 8 +40201627: 0c0352 l8ui a5, a3, 12 +4020162a: 016580 slli a6, a5, 24 +4020162d: 0d0352 l8ui a5, a3, 13 +40201630: 115500 slli a5, a5, 16 +40201633: 305650 xor a5, a6, a5 +40201636: 0f0362 l8ui a6, a3, 15 +40201639: 306560 xor a6, a5, a6 +4020163c: 0e0352 l8ui a5, a3, 14 +4020163f: 115580 slli a5, a5, 8 +40201642: 305650 xor a5, a6, a5 +40201645: 3259 s32i.n a5, a2, 12 +40201647: 7de466 bnei a4, 128, 402016c8 +4020164a: a0a062 movi a6, 160 +4020164d: ffda71 l32r a7, 402015b8 +40201650: fea551 l32r a5, 402010e4 +40201653: fea7a1 l32r a10, 402010f0 +40201656: fea591 l32r a9, 402010ec +40201659: fea381 l32r a8, 402010e8 +4020165c: 626a add.n a6, a2, a6 +4020165e: 32b8 l32i.n a11, a2, 12 +40201660: 0248 l32i.n a4, a2, 0 +40201662: 7430b0 extui a3, a11, 0, 8 +40201665: a03350 addx4 a3, a3, a5 +40201668: 0338 l32i.n a3, a3, 0 +4020166a: 1033a0 and a3, a3, a10 +4020166d: 303340 xor a3, a3, a4 +40201670: 7448b0 extui a4, a11, 8, 8 +40201673: a04450 addx4 a4, a4, a5 +40201676: 0448 l32i.n a4, a4, 0 +40201678: 104490 and a4, a4, a9 +4020167b: 303340 xor a3, a3, a4 +4020167e: 7548b0 extui a4, a11, 24, 8 +40201681: a04450 addx4 a4, a4, a5 +40201684: 010442 l8ui a4, a4, 1 +40201687: 303340 xor a3, a3, a4 +4020168a: 000742 l8ui a4, a7, 0 +4020168d: 771b addi.n a7, a7, 1 +4020168f: 014480 slli a4, a4, 24 +40201692: 303340 xor a3, a3, a4 +40201695: 7540b0 extui a4, a11, 16, 8 +40201698: a04450 addx4 a4, a4, a5 +4020169b: 0448 l32i.n a4, a4, 0 +4020169d: 114480 slli a4, a4, 8 +402016a0: 104480 and a4, a4, a8 +402016a3: 303340 xor a3, a3, a4 +402016a6: 1248 l32i.n a4, a2, 4 +402016a8: 4239 s32i.n a3, a2, 16 +402016aa: 303340 xor a3, a3, a4 +402016ad: 2248 l32i.n a4, a2, 8 +402016af: 5239 s32i.n a3, a2, 20 +402016b1: 303340 xor a3, a3, a4 +402016b4: 6239 s32i.n a3, a2, 24 +402016b6: 303b30 xor a3, a11, a3 +402016b9: 7239 s32i.n a3, a2, 28 +402016bb: 10c222 addi a2, a2, 16 +402016be: 9c9267 bne a2, a6, 4020165e +402016c1: a30c movi.n a3, 10 +402016c3: 007ec6 j 402018c2 +402016c6: 520000 excw +402016c9: 801003 excw +402016cc: 520165 excw +402016cf: 001103 excw +402016d2: 501155 excw +402016d5: 623056 bnez a0, 40201cfc +402016d8: 601303 excw +402016db: 523065 excw +402016de: 801203 excw +402016e1: 501155 excw +402016e4: 593056 bnez a0, 40201c7b +402016e7: 035242 s16i a4, a2, 6 +402016ea: 658014 excw +402016ed: 035201 l32r a0, 401c2438 <_lit4_end+0xbc10c> +402016f0: 550015 excw +402016f3: 565011 l32r a1, 401d7034 <_lit4_end+0xd0d08> +402016f6: 036230 excw +402016f9: 656017 bbci a0, 1, 40201762 +402016fc: 035230 excw +402016ff: 558016 beqz a0, 40201c5b +40201702: 565011 l32r a1, 401d7044 <_lit4_end+0xd0d18> +40201705: 525930 excw +40201708: c0a052 movi a5, 192 +4020170b: 021457 beq a4, a5, 40201711 +4020170e: 002286 j 4020179c +40201711: a8a062 movi a6, 168 +40201714: ffa971 l32r a7, 402015b8 +40201717: fe7351 l32r a5, 402010e4 +4020171a: fe7581 l32r a8, 402010f0 +4020171d: fe7391 l32r a9, 402010ec +40201720: fe72a1 l32r a10, 402010e8 +40201723: 626a add.n a6, a2, a6 +40201725: 52b8 l32i.n a11, a2, 20 +40201727: 0248 l32i.n a4, a2, 0 +40201729: 7430b0 extui a3, a11, 0, 8 +4020172c: a03350 addx4 a3, a3, a5 +4020172f: 0338 l32i.n a3, a3, 0 +40201731: 103380 and a3, a3, a8 +40201734: 303340 xor a3, a3, a4 +40201737: 7448b0 extui a4, a11, 8, 8 +4020173a: a04450 addx4 a4, a4, a5 +4020173d: 0448 l32i.n a4, a4, 0 +4020173f: 104490 and a4, a4, a9 +40201742: 303340 xor a3, a3, a4 +40201745: 7548b0 extui a4, a11, 24, 8 +40201748: a04450 addx4 a4, a4, a5 +4020174b: 010442 l8ui a4, a4, 1 +4020174e: 303340 xor a3, a3, a4 +40201751: 000742 l8ui a4, a7, 0 +40201754: 771b addi.n a7, a7, 1 +40201756: 014480 slli a4, a4, 24 +40201759: 304340 xor a4, a3, a4 +4020175c: 7530b0 extui a3, a11, 16, 8 +4020175f: a03350 addx4 a3, a3, a5 +40201762: 0338 l32i.n a3, a3, 0 +40201764: 113380 slli a3, a3, 8 +40201767: 1033a0 and a3, a3, a10 +4020176a: 303430 xor a3, a4, a3 +4020176d: 1248 l32i.n a4, a2, 4 +4020176f: 6239 s32i.n a3, a2, 24 +40201771: 303340 xor a3, a3, a4 +40201774: 2248 l32i.n a4, a2, 8 +40201776: 7239 s32i.n a3, a2, 28 +40201778: 303340 xor a3, a3, a4 +4020177b: 3248 l32i.n a4, a2, 12 +4020177d: 8239 s32i.n a3, a2, 32 +4020177f: 303340 xor a3, a3, a4 +40201782: 9239 s32i.n a3, a2, 36 +40201784: 029267 bne a2, a6, 4020178a +40201787: 004d46 j 402018c0 +4020178a: 4248 l32i.n a4, a2, 16 +4020178c: 18c222 addi a2, a2, 24 +4020178f: 303340 xor a3, a3, a4 +40201792: 4239 s32i.n a3, a2, 16 +40201794: 303b30 xor a3, a11, a3 +40201797: 5239 s32i.n a3, a2, 20 +40201799: ffe206 j 40201725 +4020179c: 180352 l8ui a5, a3, 24 +4020179f: 016580 slli a6, a5, 24 +402017a2: 190352 l8ui a5, a3, 25 +402017a5: 115500 slli a5, a5, 16 +402017a8: 305650 xor a5, a6, a5 +402017ab: 1b0362 l8ui a6, a3, 27 +402017ae: 306560 xor a6, a5, a6 +402017b1: 1a0352 l8ui a5, a3, 26 +402017b4: 115580 slli a5, a5, 8 +402017b7: 305650 xor a5, a6, a5 +402017ba: 6259 s32i.n a5, a2, 24 +402017bc: 1c0352 l8ui a5, a3, 28 +402017bf: 016580 slli a6, a5, 24 +402017c2: 1d0352 l8ui a5, a3, 29 +402017c5: 115500 slli a5, a5, 16 +402017c8: 305650 xor a5, a6, a5 +402017cb: 1f0362 l8ui a6, a3, 31 +402017ce: 1e0332 l8ui a3, a3, 30 +402017d1: 305560 xor a5, a5, a6 +402017d4: 113380 slli a3, a3, 8 +402017d7: 303530 xor a3, a5, a3 +402017da: 7239 s32i.n a3, a2, 28 +402017dc: f37c movi.n a3, -1 +402017de: 02f426 beqi a4, 0x100, 402017e4 +402017e1: 003746 j 402018c2 +402017e4: fe4041 l32r a4, 402010e4 +402017e7: fe42c1 l32r a12, 402010f0 +402017ea: c0a082 movi a8, 192 +402017ed: ff7291 l32r a9, 402015b8 +402017f0: fe3ed1 l32r a13, 402010e8 +402017f3: fe3ee1 l32r a14, 402010ec +402017f6: 828a add.n a8, a2, a8 +402017f8: 047d mov.n a7, a4 +402017fa: 0cfd mov.n a15, a12 +402017fc: 7258 l32i.n a5, a2, 28 +402017fe: 02a8 l32i.n a10, a2, 0 +40201800: 743050 extui a3, a5, 0, 8 +40201803: a03340 addx4 a3, a3, a4 +40201806: 0338 l32i.n a3, a3, 0 +40201808: fe39b1 l32r a11, 402010ec +4020180b: 1033c0 and a3, a3, a12 +4020180e: 30a3a0 xor a10, a3, a10 +40201811: 743850 extui a3, a5, 8, 8 +40201814: a03340 addx4 a3, a3, a4 +40201817: 0338 l32i.n a3, a3, 0 +40201819: 1063b0 and a6, a3, a11 +4020181c: 303a60 xor a3, a10, a6 +4020181f: 756850 extui a6, a5, 24, 8 +40201822: a06640 addx4 a6, a6, a4 +40201825: 0106a2 l8ui a10, a6, 1 +40201828: fe30b1 l32r a11, 402010e8 +4020182b: 3033a0 xor a3, a3, a10 +4020182e: 0009a2 l8ui a10, a9, 0 +40201831: 991b addi.n a9, a9, 1 +40201833: 016a80 slli a6, a10, 24 +40201836: 30a360 xor a10, a3, a6 +40201839: 753050 extui a3, a5, 16, 8 +4020183c: a03340 addx4 a3, a3, a4 +4020183f: 0338 l32i.n a3, a3, 0 +40201841: 113380 slli a3, a3, 8 +40201844: 1063b0 and a6, a3, a11 +40201847: 303a60 xor a3, a10, a6 +4020184a: 1268 l32i.n a6, a2, 4 +4020184c: 8239 s32i.n a3, a2, 32 +4020184e: 303360 xor a3, a3, a6 +40201851: 2268 l32i.n a6, a2, 8 +40201853: 9239 s32i.n a3, a2, 36 +40201855: 303360 xor a3, a3, a6 +40201858: 3268 l32i.n a6, a2, 12 +4020185a: a239 s32i.n a3, a2, 40 +4020185c: 303360 xor a3, a3, a6 +4020185f: b239 s32i.n a3, a2, 44 +40201861: 551287 beq a2, a8, 402018ba +40201864: 756830 extui a6, a3, 24, 8 +40201867: a06670 addx4 a6, a6, a7 +4020186a: 06a8 l32i.n a10, a6, 0 +4020186c: 756030 extui a6, a3, 16, 8 +4020186f: a06670 addx4 a6, a6, a7 +40201872: 0668 l32i.n a6, a6, 0 +40201874: 11aa80 slli a10, a10, 8 +40201877: 10aad0 and a10, a10, a13 +4020187a: 1066e0 and a6, a6, a14 +4020187d: 306a60 xor a6, a10, a6 +40201880: 42a8 l32i.n a10, a2, 16 +40201882: 30a6a0 xor a10, a6, a10 +40201885: 746830 extui a6, a3, 8, 8 +40201888: a06670 addx4 a6, a6, a7 +4020188b: 0668 l32i.n a6, a6, 0 +4020188d: 743030 extui a3, a3, 0, 8 +40201890: a03370 addx4 a3, a3, a7 +40201893: 1066f0 and a6, a6, a15 +40201896: 306a60 xor a6, a10, a6 +40201899: 0103a2 l8ui a10, a3, 1 +4020189c: 5238 l32i.n a3, a2, 20 +4020189e: 3066a0 xor a6, a6, a10 +402018a1: c269 s32i.n a6, a2, 48 +402018a3: 306630 xor a6, a6, a3 +402018a6: 6238 l32i.n a3, a2, 24 +402018a8: d269 s32i.n a6, a2, 52 +402018aa: 306630 xor a6, a6, a3 +402018ad: 305560 xor a5, a5, a6 +402018b0: e269 s32i.n a6, a2, 56 +402018b2: f259 s32i.n a5, a2, 60 +402018b4: 20c222 addi a2, a2, 32 +402018b7: ffd046 j 402017fc +402018ba: e30c movi.n a3, 14 +402018bc: 000086 j 402018c2 +402018bf: c30c00 excw +402018c2: 032d mov.n a2, a3 +402018c4: 31c8 l32i.n a12, a1, 12 +402018c6: 21d8 l32i.n a13, a1, 8 +402018c8: 11e8 l32i.n a14, a1, 4 +402018ca: 01f8 l32i.n a15, a1, 0 +402018cc: 10c112 addi a1, a1, 16 +402018cf: f00d ret.n +402018d1: 000000 ill +402018d4: ff .byte 0xff +402018d5: 7f .byte 0x7f +402018d6: b00000 addx8 a0, a0, a0 +402018d9: 3ffe83 excw +402018dc: 0598 l32i.n a9, a5, 0 +402018de: 684023 excw +402018e1: 4000e2 l8ui a14, a0, 64 +402018e4: f0c112 addi a1, a1, -16 +402018e7: 21c9 s32i.n a12, a1, 8 +402018e9: fffbc1 l32r a12, 402018d8 +402018ec: 11d9 s32i.n a13, a1, 4 +402018ee: 036102 s32i a0, a1, 12 +402018f1: ffa3d2 movi a13, 0x3ff +402018f4: 0ddbc5 call0 4020f6b4 +402018f7: fff731 l32r a3, 402018d4 +402018fa: f42020 extui a2, a2, 0, 16 +402018fd: fff801 l32r a0, 402018e0 +40201900: 0000c0 callx0 a0 +40201903: f42020 extui a2, a2, 0, 16 +40201906: 005c22 s16i a2, a12, 0 +40201909: 053d27 bltu a13, a2, 40201912 +4020190c: 04d222 addmi a2, a2, 0x400 +4020190f: 005c22 s16i a2, a12, 0 +40201912: 001c22 l16ui a2, a12, 0 +40201915: fff151 l32r a5, 402018dc +40201918: 030c movi.n a3, 0 +4020191a: 435a add.n a4, a3, a5 +4020191c: 0448 l32i.n a4, a4, 0 +4020191e: 0448 l32i.n a4, a4, 0 +40201920: c48c beqz.n a4, 40201930 +40201922: 101462 l16ui a6, a4, 32 +40201925: cb1627 beq a6, a2, 402018f4 +40201928: 3448 l32i.n a4, a4, 12 +4020192a: fffc86 j 40201920 +4020192d: 000000 ill +40201930: 334b addi.n a3, a3, 4 +40201932: e4b366 bnei a3, 16, 4020191a +40201935: 3108 l32i.n a0, a1, 12 +40201937: 21c8 l32i.n a12, a1, 8 +40201939: 11d8 l32i.n a13, a1, 4 +4020193b: 10c112 addi a1, a1, 16 +4020193e: f00d ret.n +40201940: 0011f0 excw +40201943: e76460 excw +40201946: fe .byte 0xfe +40201947: 3f .byte 0x3f +40201948: fee770 excw +4020194b: 3f .byte 0x3f +4020194c: e778 l32i.n a7, a7, 56 +4020194e: fe .byte 0xfe +4020194f: 3f .byte 0x3f +40201950: fee774 excw +40201953: 3f .byte 0x3f +40201954: fe8863 excw +40201957: 3f .byte 0x3f +40201958: e76c movi.n a7, -18 +4020195a: fe .byte 0xfe +4020195b: 3f .byte 0x3f +4020195c: f0c112 addi a1, a1, -16 +4020195f: 21c9 s32i.n a12, a1, 8 +40201961: 3109 s32i.n a0, a1, 12 +40201963: 11d9 s32i.n a13, a1, 4 +40201965: 02cd mov.n a12, a2 +40201967: 4228 l32i.n a2, a2, 16 +40201969: 07c316 beqz a3, 402019e9 +4020196c: 021266 bnei a2, 1, 40201972 +4020196f: 003886 j 40201a55 +40201972: 212c32 l32i a3, a12, 132 +40201975: c3cc bnez.n a3, 40201985 +40201977: fff231 l32r a3, 40201940 +4020197a: 161c42 l16ui a4, a12, 44 +4020197d: 0020c0 memw +40201980: 0338 l32i.n a3, a3, 0 +40201982: 631437 beq a4, a3, 402019e9 +40201985: 0a2c32 l32i a3, a12, 40 +40201988: 111c72 l16ui a7, a12, 34 +4020198b: 101c62 l16ui a6, a12, 32 +4020198e: 172c22 l32i a2, a12, 92 +40201991: 04cc52 addi a5, a12, 4 +40201994: 0c4d mov.n a4, a12 +40201996: 2a1845 call0 4022bb1c +40201999: 0c2d mov.n a2, a12 +4020199b: 27ee85 call0 40229884 +4020199e: ffe931 l32r a3, 40201944 +402019a1: 0328 l32i.n a2, a3, 0 +402019a3: 059c27 bne a12, a2, 402019ac +402019a6: 3c28 l32i.n a2, a12, 12 +402019a8: 000886 j 402019ce +402019ab: e73100 excw +402019ae: ff .byte 0xff +402019af: 040c movi.n a4, 0 +402019b1: 0329 s32i.n a2, a3, 0 +402019b3: 529c beqz.n a2, 402019cc +402019b5: 3258 l32i.n a5, a2, 12 +402019b7: 0a9c57 bne a12, a5, 402019c5 +402019ba: 048c beqz.n a4, 402019be +402019bc: 0329 s32i.n a2, a3, 0 +402019be: 3c38 l32i.n a3, a12, 12 +402019c0: 3239 s32i.n a3, a2, 12 +402019c2: 0002c6 j 402019d1 +402019c5: 140c movi.n a4, 1 +402019c7: 052d mov.n a2, a5 +402019c9: fff986 j 402019b3 +402019cc: 148c beqz.n a4, 402019d1 +402019ce: 006322 s32i a2, a3, 0 +402019d1: 0aa022 movi a2, 10 +402019d4: 046c22 s32i a2, a12, 16 +402019d7: ffdd21 l32r a2, 4020194c +402019da: 002232 l32i a3, a2, 0 +402019dd: 02c9 s32i.n a12, a2, 0 +402019df: 3c39 s32i.n a3, a12, 12 +402019e1: 2aaf05 call0 4022c4d4 +402019e4: 020c movi.n a2, 0 +402019e6: 003506 j 40201abe +402019e9: 022266 bnei a2, 2, 402019ef +402019ec: 002146 j 40201a75 +402019ef: 0932f6 bgeui a2, 3, 402019fc +402019f2: b29c beqz.n a2, 40201a11 +402019f4: 5d1226 beqi a2, 1, 40201a55 +402019f7: 002c06 j 40201aab +402019fa: 660000 excw +402019fd: c60242 l8ui a4, a2, 198 +40201a00: f60020 excw +40201a03: 460242 l8ui a4, a2, 70 +40201a06: 1f .byte 0x1f +40201a07: 726600 excw +40201a0a: 224602 s8i a0, a6, 34 +40201a0d: 264600 excw +40201a10: 1c2200 excw +40201a13: 42bc10 excw +40201a16: ffce31 l32r a3, 40201950 +40201a19: 0328 l32i.n a2, a3, 0 +40201a1b: 059c27 bne a12, a2, 40201a24 +40201a1e: 3c28 l32i.n a2, a12, 12 +40201a20: 000886 j 40201a46 +40201a23: c93100 excw +40201a26: ff .byte 0xff +40201a27: 040c movi.n a4, 0 +40201a29: 0329 s32i.n a2, a3, 0 +40201a2b: 529c beqz.n a2, 40201a44 +40201a2d: 3258 l32i.n a5, a2, 12 +40201a2f: 0a9c57 bne a12, a5, 40201a3d +40201a32: 048c beqz.n a4, 40201a36 +40201a34: 0329 s32i.n a2, a3, 0 +40201a36: 3c38 l32i.n a3, a12, 12 +40201a38: 3239 s32i.n a3, a2, 12 +40201a3a: 000286 j 40201a48 +40201a3d: 140c movi.n a4, 1 +40201a3f: 052d mov.n a2, a5 +40201a41: fff986 j 40201a2b +40201a44: 048c beqz.n a4, 40201a48 +40201a46: 0329 s32i.n a2, a3, 0 +40201a48: 020c movi.n a2, 0 +40201a4a: 3c29 s32i.n a2, a12, 12 +40201a4c: c2a042 movi a4, 194 +40201a4f: 000386 j 40201a61 +40201a52: 000000 ill +40201a55: ffc021 l32r a2, 40201958 +40201a58: 203cc0 or a3, a12, a12 +40201a5b: 27e7c5 call0 402298d8 +40201a5e: c8a042 movi a4, 200 +40201a61: ffbc31 l32r a3, 40201954 +40201a64: 202cc0 or a2, a12, a12 +40201a67: 00a0c2 movi a12, 0 +40201a6a: fea701 l32r a0, 40201508 +40201a6d: 0000c0 callx0 a0 +40201a70: 0cdd mov.n a13, a12 +40201a72: 000e86 j 40201ab0 +40201a75: ffb321 l32r a2, 40201944 +40201a78: 0c3d mov.n a3, a12 +40201a7a: 27e5c5 call0 402298d8 +40201a7d: cea042 movi a4, 206 +40201a80: fff746 j 40201a61 +40201a83: 000000 ill +40201a86: 202cc0 or a2, a12, a12 +40201a89: 2a0485 call0 4022bad4 +40201a8c: 20d220 or a13, a2, a2 +40201a8f: 05a022 movi a2, 5 +40201a92: 0d9c beqz.n a13, 40201aa6 +40201a94: 000606 j 40201ab0 +40201a97: 2cc000 excw +40201a9a: 038520 excw +40201a9d: 202a add.n a2, a0, a2 +40201a9f: 5620d2 l32i a13, a0, 0x158 +40201aa2: 0c00b2 l8ui a11, a0, 12 +40201aa5: 4c2992 l32i a9, a9, 0x130 +40201aa8: 000106 j 40201ab0 +40201aab: 0d0c movi.n a13, 0 +40201aad: 20cdd0 or a12, a13, a13 +40201ab0: 008c16 beqz a12, 40201abc +40201ab3: 005d56 bnez a13, 40201abc +40201ab6: 202cc0 or a2, a12, a12 +40201ab9: 2a3305 call0 4022bdec +40201abc: 0d2d mov.n a2, a13 +40201abe: 3108 l32i.n a0, a1, 12 +40201ac0: 21c8 l32i.n a12, a1, 8 +40201ac2: 11d8 l32i.n a13, a1, 4 +40201ac4: 10c112 addi a1, a1, 16 +40201ac7: f00d ret.n +40201ac9: 000000 ill +40201acc: 201ad0 or a1, a10, a13 +40201acf: c11240 mul16u a1, a2, a4 +40201ad2: 6102f0 excw +40201ad5: ad0503 excw +40201ad8: fc3124 excw +40201adb: ff .byte 0xff +40201adc: 00a042 movi a4, 0 +40201adf: e8a322 movi a2, 0x3e8 +40201ae2: 2a7bc5 call0 4022c2a0 +40201ae5: 032102 l32i a0, a1, 12 +40201ae8: 10c112 addi a1, a1, 16 +40201aeb: f00d ret.n +40201aed: 000000 ill +40201af0: 201af4 excw +40201af3: c11240 mul16u a1, a2, a4 +40201af6: 6102f0 excw +40201af9: ba8503 excw +40201afc: 312c movi.n a1, 35 +40201afe: fffc bnez.n a15, 40201b41 +40201b00: 00a042 movi a4, 0 +40201b03: 64a022 movi a2, 100 +40201b06: 2a7985 call0 4022c2a0 +40201b09: 032102 l32i a0, a1, 12 +40201b0c: 10c112 addi a1, a1, 16 +40201b0f: f00d ret.n +40201b11: 000000 ill +40201b14: 1b18 l32i.n a1, a11, 4 +40201b16: 124020 excw +40201b19: 02f0c1 l32r a12, 401c26dc <_lit4_end+0xbc3b0> +40201b1c: c50361 l32r a6, 401f2f28 <_lit4_end+0xecbfc> +40201b1f: 312364 excw +40201b22: fffc bnez.n a15, 40201b65 +40201b24: 00a042 movi a4, 0 +40201b27: f4a122 movi a2, 0x1f4 +40201b2a: 2a7745 call0 4022c2a0 +40201b2d: 032102 l32i a0, a1, 12 +40201b30: 10c112 addi a1, a1, 16 +40201b33: f00d ret.n +40201b35: 000000 ill +40201b38: 201b40 or a1, a11, a4 +40201b3b: ea6040 excw +40201b3e: 120000 excw +40201b41: 02f0c1 l32r a12, 401c2704 <_lit4_end+0xbc3d8> +40201b44: c50361 l32r a6, 401f2f50 <_lit4_end+0xecc24> +40201b47: 452347 blt a3, a4, 40201b90 +40201b4a: 23d8 l32i.n a13, a3, 8 +40201b4c: fffb31 l32r a3, 40201b38 +40201b4f: fffb21 l32r a2, 40201b3c +40201b52: 00a042 movi a4, 0 +40201b55: 2a7485 call0 4022c2a0 +40201b58: 3108 l32i.n a0, a1, 12 +40201b5a: 10c112 addi a1, a1, 16 +40201b5d: f00d ret.n +40201b5f: 827c00 mull a7, a12, a0 +40201b62: f00d ret.n +40201b64: fedf24 excw +40201b67: 3f .byte 0x3f +40201b68: 006c movi.n a0, -32 +40201b6a: 003ff2 excw +40201b6d: 004000 break 0, 0 + +40201b70 : +40201b70: fffd21 l32r a2, 40201b64 +40201b73: 02d222 addmi a2, a2, 0x200 +40201b76: 140222 l8ui a2, a2, 20 +40201b79: 0142b6 bltui a2, 4, 40201b7e +40201b7c: 220c movi.n a2, 2 +40201b7e: fec222 addi a2, a2, -2 +40201b81: 743020 extui a3, a2, 0, 8 +40201b84: f27c movi.n a2, -1 +40201b86: 1423f6 bgeui a3, 2, 40201b9e +40201b89: fff731 l32r a3, 40201b68 +40201b8c: fff821 l32r a2, 40201b6c +40201b8f: 0020c0 memw +40201b92: 0348 l32i.n a4, a3, 0 +40201b94: 202420 or a2, a4, a2 +40201b97: 0020c0 memw +40201b9a: 0329 s32i.n a2, a3, 0 +40201b9c: 020c movi.n a2, 0 +40201b9e: f00d ret.n +40201ba0: ff .byte 0xff +40201ba1: ff .byte 0xff +40201ba2: bf .byte 0xbf +40201ba3: ff .byte 0xff + +40201ba4 : +40201ba4: fff131 l32r a3, 40201b68 +40201ba7: fffe21 l32r a2, 40201ba0 +40201baa: 0020c0 memw +40201bad: 0348 l32i.n a4, a3, 0 +40201baf: 102420 and a2, a4, a2 +40201bb2: 0020c0 memw +40201bb5: 0329 s32i.n a2, a3, 0 +40201bb7: f00d ret.n +40201bb9: 000000 ill + +40201bbc : +40201bbc: ffeb31 l32r a3, 40201b68 +40201bbf: fff821 l32r a2, 40201ba0 +40201bc2: 0020c0 memw +40201bc5: 0348 l32i.n a4, a3, 0 +40201bc7: 102420 and a2, a4, a2 +40201bca: 0020c0 memw +40201bcd: 0329 s32i.n a2, a3, 0 +40201bcf: ffe521 l32r a2, 40201b64 +40201bd2: 030c movi.n a3, 0 +40201bd4: 7c6232 s32i a3, a2, 0x1f0 +40201bd7: f00d ret.n +40201bd9: 000000 ill + +40201bdc : +40201bdc: f0c112 addi a1, a1, -16 +40201bdf: 040252 l8ui a5, a2, 4 +40201be2: 3109 s32i.n a0, a1, 12 +40201be4: 0a6507 bbci a5, 0, 40201bf2 +40201be7: ffdf51 l32r a5, 40201b64 +40201bea: 7c2552 l32i a5, a5, 0x1f0 +40201bed: 158c beqz.n a5, 40201bf2 +40201bef: 0005c0 callx0 a5 +40201bf2: 3108 l32i.n a0, a1, 12 +40201bf4: 10c112 addi a1, a1, 16 +40201bf7: f00d ret.n +40201bf9: 000000 ill + +40201bfc : +40201bfc: 023d mov.n a3, a2 +40201bfe: f27c movi.n a2, -1 +40201c00: 638c beqz.n a3, 40201c0a +40201c02: ffd821 l32r a2, 40201b64 +40201c05: 7c6232 s32i a3, a2, 0x1f0 +40201c08: 020c movi.n a2, 0 +40201c0a: f00d ret.n + +40201c0c : +40201c0c: ffd621 l32r a2, 40201b64 +40201c0f: 030c movi.n a3, 0 +40201c11: 7c6232 s32i a3, a2, 0x1f0 +40201c14: f00d ret.n +40201c16: 880000 excw +40201c19: 00dc bnez.n a0, 40201c2d +40201c1b: 18d440 excw +40201c1e: 00 .byte 00 +40201c1f: 40 .byte 0x40 + +40201c20 : +40201c20: e0c112 addi a1, a1, -32 +40201c23: 61c9 s32i.n a12, a1, 24 +40201c25: 03cd mov.n a12, a3 +40201c27: ffcf31 l32r a3, 40201b64 +40201c2a: 7109 s32i.n a0, a1, 28 +40201c2c: 51d9 s32i.n a13, a1, 20 +40201c2e: 41e9 s32i.n a14, a1, 16 +40201c30: 01d332 addmi a3, a3, 0x100 +40201c33: 350332 l8ui a3, a3, 53 +40201c36: 021366 bnei a3, 1, 40201c3c +40201c39: 002a46 j 40201ce6 +40201c3c: 42cc bnez.n a2, 40201c44 +40201c3e: 020c movi.n a2, 0 +40201c40: 002906 j 40201ce8 +40201c43: a1d200 sll a13, a2 +40201c46: da2c movi.n a10, 45 +40201c48: 640cd2 l8ui a13, a12, 100 +40201c4b: 030c movi.n a3, 0 +40201c4d: 0d2d mov.n a2, a13 +40201c4f: fcf001 l32r a0, 40201010 <_irom0_text_start> +40201c52: 0000c0 callx0 a0 +40201c55: fe5c16 beqz a12, 40201c3e +40201c58: 010c22 l8ui a2, a12, 1 +40201c5b: 330c movi.n a3, 3 +40201c5d: fdc222 addi a2, a2, -3 +40201c60: ffee01 l32r a0, 40201c18 +40201c63: 0000c0 callx0 a0 +40201c66: 74e020 extui a14, a2, 0, 8 +40201c69: d12ef6 bgeui a14, 2, 40201c3e +40201c6c: 640c movi.n a4, 6 +40201c6e: 030c movi.n a3, 0 +40201c70: 202110 or a2, a1, a1 +40201c73: fce701 l32r a0, 40201010 <_irom0_text_start> +40201c76: 0000c0 callx0 a0 +40201c79: 020c22 l8ui a2, a12, 2 +40201c7c: 030152 l8ui a5, a1, 3 +40201c7f: 004122 s8i a2, a1, 0 +40201c82: 030c22 l8ui a2, a12, 3 +40201c85: 040142 l8ui a4, a1, 4 +40201c88: 014122 s8i a2, a1, 1 +40201c8b: 040c22 l8ui a2, a12, 4 +40201c8e: e80c movi.n a8, 14 +40201c90: 024122 s8i a2, a1, 2 +40201c93: 020c movi.n a2, 0 +40201c95: 026d mov.n a6, a2 +40201c97: 023d mov.n a3, a2 +40201c99: f90c movi.n a9, 15 +40201c9b: 1bb3e7 bgeu a3, a14, 40201cba +40201c9e: 050c32 l8ui a3, a12, 5 +40201ca1: 0f3837 bltu a8, a3, 40201cb4 +40201ca4: 060c72 l8ui a7, a12, 6 +40201ca7: a73a add.n a10, a7, a3 +40201ca9: 0729a7 blt a9, a10, 40201cb4 +40201cac: 120c movi.n a2, 1 +40201cae: 074d mov.n a4, a7 +40201cb0: 035d mov.n a5, a3 +40201cb2: 026d mov.n a6, a2 +40201cb4: 130c movi.n a3, 1 +40201cb6: fff846 j 40201c9b +40201cb9: 261600 excw +40201cbc: 415200 srli a5, a0, 2 +40201cbf: 128c03 excw +40201cc2: 044142 s8i a4, a1, 4 +40201cc5: 030122 l8ui a2, a1, 3 +40201cc8: f72216 beqz a2, 40201c3e +40201ccb: 640c movi.n a4, 6 +40201ccd: 203110 or a3, a1, a1 +40201cd0: 0d2d mov.n a2, a13 +40201cd2: ffd201 l32r a0, 40201c1c +40201cd5: 0000c0 callx0 a0 +40201cd8: a28c beqz.n a2, 40201ce6 +40201cda: 640c movi.n a4, 6 +40201cdc: 013d mov.n a3, a1 +40201cde: 0d2d mov.n a2, a13 +40201ce0: fccd01 l32r a0, 40201014 <_irom0_text_start+0x4> +40201ce3: 0000c0 callx0 a0 +40201ce6: 120c movi.n a2, 1 +40201ce8: 7108 l32i.n a0, a1, 28 +40201cea: 61c8 l32i.n a12, a1, 24 +40201cec: 51d8 l32i.n a13, a1, 20 +40201cee: 41e8 l32i.n a14, a1, 16 +40201cf0: 20c112 addi a1, a1, 32 +40201cf3: f00d ret.n +40201cf5: 000000 ill +40201cf8: fee054 excw +40201cfb: 3f .byte 0x3f + +40201cfc : +40201cfc: ff9a21 l32r a2, 40201b64 +40201cff: 01d232 addmi a3, a2, 0x100 +40201d02: 350342 l8ui a4, a3, 53 +40201d05: 023d mov.n a3, a2 +40201d07: fffc21 l32r a2, 40201cf8 +40201d0a: e4dc bnez.n a4, 40201d2c +40201d0c: 4338 l32i.n a3, a3, 16 +40201d0e: a39c beqz.n a3, 40201d2c +40201d10: 112342 l32i a4, a3, 68 +40201d13: 155466 bnei a4, 5, 40201d2c +40201d16: 242332 l32i a3, a3, 144 +40201d19: f38c beqz.n a3, 40201d2c +40201d1b: 01d322 addmi a2, a3, 0x100 +40201d1e: 2f0242 l8ui a4, a2, 47 +40201d21: fff521 l32r a2, 40201cf8 +40201d24: 448c beqz.n a4, 40201d2c +40201d26: 2ca122 movi a2, 0x12c +40201d29: 802320 add a2, a3, a2 +40201d2c: f00d ret.n + ... + +40201d30 : +40201d30: f0c112 addi a1, a1, -16 +40201d33: 3109 s32i.n a0, a1, 12 +40201d35: 21c9 s32i.n a12, a1, 8 +40201d37: 02cd mov.n a12, a2 +40201d39: fffc05 call0 40201cfc +40201d3c: 730c movi.n a3, 7 +40201d3e: 004c32 s8i a3, a12, 0 +40201d41: 630c movi.n a3, 6 +40201d43: 014c32 s8i a3, a12, 1 +40201d46: 000232 l8ui a3, a2, 0 +40201d49: 3108 l32i.n a0, a1, 12 +40201d4b: 024c32 s8i a3, a12, 2 +40201d4e: 010232 l8ui a3, a2, 1 +40201d51: 034c32 s8i a3, a12, 3 +40201d54: 020232 l8ui a3, a2, 2 +40201d57: 044c32 s8i a3, a12, 4 +40201d5a: 030232 l8ui a3, a2, 3 +40201d5d: 054c32 s8i a3, a12, 5 +40201d60: 040222 l8ui a2, a2, 4 +40201d63: 064c22 s8i a2, a12, 6 +40201d66: 421c movi.n a2, 20 +40201d68: 074c22 s8i a2, a12, 7 +40201d6b: 2c8b addi.n a2, a12, 8 +40201d6d: 21c8 l32i.n a12, a1, 8 +40201d6f: 10c112 addi a1, a1, 16 +40201d72: f00d ret.n + +40201d74 : +40201d74: f0c112 addi a1, a1, -16 +40201d77: 3109 s32i.n a0, a1, 12 +40201d79: fff805 call0 40201cfc +40201d7c: 030232 l8ui a3, a2, 3 +40201d7f: 040222 l8ui a2, a2, 4 +40201d82: 3108 l32i.n a0, a1, 12 +40201d84: 232a add.n a2, a3, a2 +40201d86: 220b addi.n a2, a2, -1 +40201d88: 742020 extui a2, a2, 0, 8 +40201d8b: 10c112 addi a1, a1, 16 +40201d8e: f00d ret.n + +40201d90 : +40201d90: f0c112 addi a1, a1, -16 +40201d93: 3109 s32i.n a0, a1, 12 +40201d95: fff645 call0 40201cfc +40201d98: 3108 l32i.n a0, a1, 12 +40201d9a: 030222 l8ui a2, a2, 3 +40201d9d: 10c112 addi a1, a1, 16 +40201da0: f00d ret.n + ... + +40201da4 : +40201da4: f0c112 addi a1, a1, -16 +40201da7: 21c9 s32i.n a12, a1, 8 +40201da9: 3109 s32i.n a0, a1, 12 +40201dab: 74c020 extui a12, a2, 0, 8 +40201dae: fffc45 call0 40201d74 +40201db1: 00a032 movi a3, 0 +40201db4: 0c32c7 bltu a2, a12, 40201dc4 +40201db7: fffd85 call0 40201d90 +40201dba: 130c movi.n a3, 1 +40201dbc: 01bc27 bgeu a12, a2, 40201dc1 +40201dbf: 030c movi.n a3, 0 +40201dc1: 743030 extui a3, a3, 0, 8 +40201dc4: 3108 l32i.n a0, a1, 12 +40201dc6: 032d mov.n a2, a3 +40201dc8: 21c8 l32i.n a12, a1, 8 +40201dca: 10c112 addi a1, a1, 16 +40201dcd: f00d ret.n + ... + +40201dd0 : +40201dd0: f0c112 addi a1, a1, -16 +40201dd3: 0261c2 s32i a12, a1, 8 +40201dd6: ff63c1 l32r a12, 40201b64 +40201dd9: 0161d2 s32i a13, a1, 4 +40201ddc: 0061e2 s32i a14, a1, 0 +40201ddf: 3109 s32i.n a0, a1, 12 +40201de1: 74d020 extui a13, a2, 0, 8 +40201de4: 4ce8 l32i.n a14, a12, 16 +40201de6: fff8c5 call0 40201d74 +40201de9: 01dcc2 addmi a12, a12, 0x100 +40201dec: 023d mov.n a3, a2 +40201dee: 350c22 l8ui a2, a12, 53 +40201df1: d2cc bnez.n a2, 40201e02 +40201df3: be8c beqz.n a14, 40201e02 +40201df5: 112e22 l32i a2, a14, 68 +40201df8: 065226 beqi a2, 5, 40201e02 +40201dfb: b20c movi.n a2, 11 +40201dfd: 01b237 bgeu a2, a3, 40201e02 +40201e00: 023d mov.n a3, a2 +40201e02: 020c movi.n a2, 0 +40201e04: 0e33d7 bltu a3, a13, 40201e16 +40201e07: 0d2d mov.n a2, a13 +40201e09: fff985 call0 40201da4 +40201e0c: 030c movi.n a3, 0 +40201e0e: 140c movi.n a4, 1 +40201e10: 933420 movnez a3, a4, a2 +40201e13: 742030 extui a2, a3, 0, 8 +40201e16: 3108 l32i.n a0, a1, 12 +40201e18: 21c8 l32i.n a12, a1, 8 +40201e1a: 11d8 l32i.n a13, a1, 4 +40201e1c: 01e8 l32i.n a14, a1, 0 +40201e1e: 10c112 addi a1, a1, 16 +40201e21: f00d ret.n + ... + +40201e24 : +40201e24: ff5031 l32r a3, 40201b64 +40201e27: f0c112 addi a1, a1, -16 +40201e2a: 01d342 addmi a4, a3, 0x100 +40201e2d: 3109 s32i.n a0, a1, 12 +40201e2f: 150c movi.n a5, 1 +40201e31: ff4452 s8i a5, a4, 255 +40201e34: 034d mov.n a4, a3 +40201e36: a29c beqz.n a2, 40201e54 +40201e38: 9228 l32i.n a2, a2, 36 +40201e3a: 629c beqz.n a2, 40201e54 +40201e3c: 0f0222 l8ui a2, a2, 15 +40201e3f: 150c movi.n a5, 1 +40201e41: 320b addi.n a3, a2, -1 +40201e43: 020c movi.n a2, 0 +40201e45: 932530 movnez a2, a5, a3 +40201e48: 7b2432 l32i a3, a4, 0x1ec +40201e4b: 742020 extui a2, a2, 0, 8 +40201e4e: 002316 beqz a3, 40201e54 +40201e51: 0003c0 callx0 a3 +40201e54: 3108 l32i.n a0, a1, 12 +40201e56: 10c112 addi a1, a1, 16 +40201e59: f00d ret.n + ... + +40201e5c : +40201e5c: ff4221 l32r a2, 40201b64 +40201e5f: 130c movi.n a3, 1 +40201e61: 01d222 addmi a2, a2, 0x100 +40201e64: f94232 s8i a3, a2, 249 +40201e67: 030c movi.n a3, 0 +40201e69: fa4232 s8i a3, a2, 250 +40201e6c: fe4232 s8i a3, a2, 254 +40201e6f: f00d ret.n +40201e71: 000000 ill +40201e74: 201e24 excw +40201e77: 40 .byte 0x40 + +40201e78 : +40201e78: ff3b21 l32r a2, 40201b64 +40201e7b: f0c112 addi a1, a1, -16 +40201e7e: 036102 s32i a0, a1, 12 +40201e81: 01d232 addmi a3, a2, 0x100 +40201e84: 01a042 movi a4, 1 +40201e87: ff4342 s8i a4, a3, 255 +40201e8a: 00a032 movi a3, 0 +40201e8d: 7b6232 s32i a3, a2, 0x1ec +40201e90: fff921 l32r a2, 40201e74 +40201e93: 830c movi.n a3, 8 +40201e95: 1ee545 call0 40220cec +40201e98: 3108 l32i.n a0, a1, 12 +40201e9a: 10c112 addi a1, a1, 16 +40201e9d: f00d ret.n + ... + +40201ea0 : +40201ea0: ff3121 l32r a2, 40201b64 +40201ea3: 030c movi.n a3, 0 +40201ea5: 596232 s32i a3, a2, 0x164 +40201ea8: 5a6232 s32i a3, a2, 0x168 +40201eab: 5b6232 s32i a3, a2, 0x16c +40201eae: 5c6232 s32i a3, a2, 0x170 +40201eb1: 5d6232 s32i a3, a2, 0x174 +40201eb4: 5e6232 s32i a3, a2, 0x178 +40201eb7: 786232 s32i a3, a2, 0x1e0 +40201eba: f00d ret.n +40201ebc: 0009b4 excw +40201ebf: 09b300 excw +40201ec2: 990000 excw +40201ec5: fffff6 bgeui a15, 0x100, 40201ec8 +40201ec8: fff630 excw +40201ecb: ff .byte 0xff +40201ecc: e21c movi.n a2, 30 +40201ece: 00 .byte 00 +40201ecf: 40 .byte 0x40 + +40201ed0 : +40201ed0: f0c112 addi a1, a1, -16 +40201ed3: 3109 s32i.n a0, a1, 12 +40201ed5: 024d mov.n a4, a2 +40201ed7: fff951 l32r a5, 40201ebc +40201eda: e20c movi.n a2, 14 +40201edc: 2d6377 bbci a3, 7, 40201f0d +40201edf: 351457 beq a4, a5, 40201f18 +40201ee2: fff721 l32r a2, 40201ec0 +40201ee5: 0f3247 bltu a2, a4, 40201ef8 +40201ee8: fff721 l32r a2, 40201ec4 +40201eeb: 530c movi.n a3, 5 +40201eed: 242a add.n a2, a4, a2 +40201eef: ff4a01 l32r a0, 40201c18 +40201ef2: 0000c0 callx0 a0 +40201ef5: 0007c6 j 40201f18 +40201ef8: fff421 l32r a2, 40201ec8 +40201efb: 431c movi.n a3, 20 +40201efd: 242a add.n a2, a4, a2 +40201eff: fff301 l32r a0, 40201ecc +40201f02: 0000c0 callx0 a0 +40201f05: 22fb addi.n a2, a2, 15 +40201f07: 000346 j 40201f18 +40201f0a: 000000 ill +40201f0d: 071457 beq a4, a5, 40201f18 +40201f10: ffec21 l32r a2, 40201ec0 +40201f13: d1b247 bgeu a2, a4, 40201ee8 +40201f16: f27c movi.n a2, -1 +40201f18: 3108 l32i.n a0, a1, 12 +40201f1a: 10c112 addi a1, a1, 16 +40201f1d: f00d ret.n +40201f1f: 096c00 excw +40201f22: b20000 excw +40201f25: 0009 s32i.n a0, a0, 0 + ... + +40201f28 : +40201f28: d0c112 addi a1, a1, -48 +40201f2b: a1c9 s32i.n a12, a1, 40 +40201f2d: 91d9 s32i.n a13, a1, 36 +40201f2f: 81e9 s32i.n a14, a1, 32 +40201f31: 02dd mov.n a13, a2 +40201f33: 71f9 s32i.n a15, a1, 28 +40201f35: b109 s32i.n a0, a1, 44 +40201f37: 098ec5 call0 4020b824 +40201f3a: e20c movi.n a2, 14 +40201f3c: 84a0c2 movi a12, 132 +40201f3f: fff8e1 l32r a14, 40201f20 +40201f42: 206d22 s32i a2, a13, 128 +40201f45: cdca add.n a12, a13, a12 +40201f47: 0f0c movi.n a15, 0 +40201f49: 83a042 movi a4, 131 +40201f4c: d50c movi.n a5, 13 +40201f4e: 0c49 s32i.n a4, a12, 0 +40201f50: 025ce2 s16i a14, a12, 4 +40201f53: 059f57 bne a15, a5, 40201f5c +40201f56: ffd921 l32r a2, 40201ebc +40201f59: 925d22 s16i a2, a13, 0x124 +40201f5c: 060c22 l8ui a2, a12, 6 +40201f5f: 12dc bnez.n a2, 40201f74 +40201f61: 0c38 l32i.n a3, a12, 0 +40201f63: 021c22 l16ui a2, a12, 4 +40201f66: 0149 s32i.n a4, a1, 0 +40201f68: 1159 s32i.n a5, a1, 4 +40201f6a: fff645 call0 40201ed0 +40201f6d: 064c22 s8i a2, a12, 6 +40201f70: 1158 l32i.n a5, a1, 4 +40201f72: 0148 l32i.n a4, a1, 0 +40201f74: 070c22 l8ui a2, a12, 7 +40201f77: 72cc bnez.n a2, 40201f82 +40201f79: 090c22 l8ui a2, a12, 9 +40201f7c: 1122f0 slli a2, a2, 1 +40201f7f: 074c22 s8i a2, a12, 7 +40201f82: ee5b addi.n a14, a14, 5 +40201f84: ffe821 l32r a2, 40201f24 +40201f87: f4e0e0 extui a14, a14, 0, 16 +40201f8a: ff1b addi.n a15, a15, 1 +40201f8c: cccb addi.n a12, a12, 12 +40201f8e: bc9e27 bne a14, a2, 40201f4e +40201f91: 02ddc2 addmi a12, a13, 0x200 +40201f94: 020c movi.n a2, 0 +40201f96: 004c22 s8i a2, a12, 0 +40201f99: 64a022 movi a2, 100 +40201f9c: 145d22 s16i a2, a13, 40 +40201f9f: 202dd0 or a2, a13, a13 +40201fa2: 098d85 call0 4020b87c +40201fa5: 0d2d mov.n a2, a13 +40201fa7: 095385 call0 4020b4e0 +40201faa: 020c movi.n a2, 0 +40201fac: d06c22 s32i a2, a12, 0x340 +40201faf: d42c22 l32i a2, a12, 0x350 +40201fb2: 043266 bnei a2, 3, 40201fba +40201fb5: 0d2d mov.n a2, a13 +40201fb7: 067f85 call0 402087b0 +40201fba: feeac1 l32r a12, 40201b64 +40201fbd: 0c2d mov.n a2, a12 +40201fbf: 03d945 call0 40205d54 +40201fc2: ffe985 call0 40201e5c +40201fc5: 0d2d mov.n a2, a13 +40201fc7: 0427c5 call0 40206244 +40201fca: 085dc5 call0 4020a5a8 +40201fcd: 00a022 movi a2, 0 +40201fd0: 566c22 s32i a2, a12, 0x158 +40201fd3: ffecc5 call0 40201ea0 +40201fd6: ffea05 call0 40201e78 +40201fd9: ffbe05 call0 40201bbc +40201fdc: b108 l32i.n a0, a1, 44 +40201fde: a1c8 l32i.n a12, a1, 40 +40201fe0: 91d8 l32i.n a13, a1, 36 +40201fe2: 81e8 l32i.n a14, a1, 32 +40201fe4: 71f8 l32i.n a15, a1, 28 +40201fe6: 30c112 addi a1, a1, 48 +40201fe9: f00d ret.n +40201feb: ffff00 excw + ... + +40201ff0 : +40201ff0: 023d mov.n a3, a2 +40201ff2: 020c movi.n a2, 0 +40201ff4: 081327 beq a3, a2, 40202000 +40201ff7: fffd21 l32r a2, 40201fec +40201ffa: 021327 beq a3, a2, 40202000 +40201ffd: 060322 l8ui a2, a3, 6 +40202000: f00d ret.n +40202002: 440000 extui a0, a0, 0, 5 +40202005: 0e .byte 0xe +40202006: a83ff2 excw +40202009: fe8b addi.n a15, a14, 8 +4020200b: 3f .byte 0x3f + +4020200c : +4020200c: fffe21 l32r a2, 40202004 +4020200f: 0020c0 memw +40202012: 0238 l32i.n a3, a2, 0 +40202014: fffd21 l32r a2, 40202008 +40202017: 0228 l32i.n a2, a2, 0 +40202019: 302320 xor a2, a3, a2 +4020201c: f00d ret.n +4020201e: 820000 mull a0, a0, a0 +40202021: ff .byte 0xff +40202022: 7d4022 s8i a2, a0, 125 +40202025: ff .byte 0xff +40202026: 794022 s8i a2, a0, 121 +40202029: ff .byte 0xff +4020202a: f84022 s8i a2, a0, 248 +4020202d: fedb addi.n a15, a14, 13 +4020202f: 3f .byte 0x3f +40202030: ff59 s32i.n a5, a15, 60 +40202032: 944022 s8i a2, a0, 148 +40202035: ff .byte 0xff +40202036: 6a4022 s8i a2, a0, 106 +40202039: fe88 l32i.n a8, a14, 60 +4020203b: 3f .byte 0x3f +4020203c: 22ff55 excw +4020203f: ff4e40 excw +40202042: 2e4022 s8i a2, a0, 46 +40202045: ff .byte 0xff +40202046: 2c4022 s8i a2, a0, 44 +40202049: ff .byte 0xff +4020204a: d44022 s8i a2, a0, 212 +4020204d: 401015 excw +40202050: 223c movi.n a2, 50 +40202052: 10 .byte 0x10 +40202053: 40 .byte 0x40 + +40202054 : +40202054: c0c112 addi a1, a1, -64 +40202057: c1e9 s32i.n a14, a1, 48 +40202059: 74e020 extui a14, a2, 0, 8 +4020205c: fff121 l32r a2, 40202020 +4020205f: f109 s32i.n a0, a1, 60 +40202061: e1c9 s32i.n a12, a1, 56 +40202063: d1d9 s32i.n a13, a1, 52 +40202065: b1f9 s32i.n a15, a1, 44 +40202067: fff901 l32r a0, 4020204c +4020206a: 0000c0 callx0 a0 +4020206d: 1b1e26 beqi a14, 1, 4020208c +40202070: ce8c beqz.n a14, 40202080 +40202072: 022e66 bnei a14, 2, 40202078 +40202075: 004106 j 4020217d +40202078: 103e26 beqi a14, 3, 4020208c +4020207b: 006fc6 j 4020223e +4020207e: 210000 srai a0, a0, 0 +40202081: ffe9 s32i.n a14, a15, 60 +40202083: fff201 l32r a0, 4020204c +40202086: 0000c0 callx0 a0 +40202089: 006c46 j 4020223e +4020208c: ffe721 l32r a2, 40202028 +4020208f: ffef01 l32r a0, 4020204c +40202092: 0000c0 callx0 a0 +40202095: ffe521 l32r a2, 4020202c +40202098: 220272 l8ui a7, a2, 34 +4020209b: 210262 l8ui a6, a2, 33 +4020209e: 200252 l8ui a5, a2, 32 +402020a1: 1f0242 l8ui a4, a2, 31 +402020a4: 1e0232 l8ui a3, a2, 30 +402020a7: 230222 l8ui a2, a2, 35 +402020aa: 0129 s32i.n a2, a1, 0 +402020ac: ffe121 l32r a2, 40202030 +402020af: ffe701 l32r a0, 4020204c +402020b2: 0000c0 callx0 a0 +402020b5: feabd1 l32r a13, 40201b64 +402020b8: 4d28 l32i.n a2, a13, 16 +402020ba: 328c beqz.n a2, 402020c1 +402020bc: 1c0c movi.n a12, 1 +402020be: 002086 j 40202144 +402020c1: ffdcc1 l32r a12, 40202034 +402020c4: 39a242 movi a4, 0x239 +402020c7: 0c3d mov.n a3, a12 +402020c9: 90a222 movi a2, 0x290 +402020cc: ffe101 l32r a0, 40202050 +402020cf: 0000c0 callx0 a0 +402020d2: 025d mov.n a5, a2 +402020d4: 4d29 s32i.n a2, a13, 16 +402020d6: 020c movi.n a2, 0 +402020d8: 0cfd mov.n a15, a12 +402020da: 20c220 or a12, a2, a2 +402020dd: 631527 beq a5, a2, 40202144 +402020e0: 326522 s32i a2, a5, 200 +402020e3: 116522 s32i a2, a5, 68 +402020e6: 06dd32 addmi a3, a13, 0x600 +402020e9: 2c6322 s32i a2, a3, 176 +402020ec: 40a242 movi a4, 0x240 +402020ef: 203ff0 or a3, a15, a15 +402020f2: 34a122 movi a2, 0x134 +402020f5: 046152 s32i a5, a1, 16 +402020f8: ffd601 l32r a0, 40202050 +402020fb: 0000c0 callx0 a0 +402020fe: 4158 l32i.n a5, a1, 16 +40202100: 256522 s32i a2, a5, 148 +40202103: 4d28 l32i.n a2, a13, 16 +40202105: 252252 l32i a5, a2, 148 +40202108: 2915c7 beq a5, a12, 40202135 +4020210b: ffcb31 l32r a3, 40202038 +4020210e: 640c movi.n a4, 6 +40202110: 202550 or a2, a5, a5 +40202113: fbc001 l32r a0, 40201014 <_irom0_text_start+0x4> +40202116: 0000c0 callx0 a0 +40202119: 4d28 l32i.n a2, a13, 16 +4020211b: 2522c2 l32i a12, a2, 148 +4020211e: ffeec5 call0 4020200c +40202121: b42020 extui a2, a2, 0, 12 +40202124: 5e5c22 s16i a2, a12, 188 +40202127: 4d28 l32i.n a2, a13, 16 +40202129: 252222 l32i a2, a2, 148 +4020212c: 5e1222 l16ui a2, a2, 188 +4020212f: fe6216 beqz a2, 40202119 +40202132: ffe186 j 402020bc +40202135: 49a242 movi a4, 0x249 +40202138: 0f3d mov.n a3, a15 +4020213a: 0c0c movi.n a12, 0 +4020213c: fcf301 l32r a0, 40201508 +4020213f: 0000c0 callx0 a0 +40202142: 4dc9 s32i.n a12, a13, 16 +40202144: 291e66 bnei a14, 1, 40202171 +40202147: 5d28 l32i.n a2, a13, 20 +40202149: 0f3216 beqz a2, 40202240 +4020214c: ffbae1 l32r a14, 40202034 +4020214f: 262222 l32i a2, a2, 152 +40202152: 53a242 movi a4, 0x253 +40202155: 0e3d mov.n a3, a14 +40202157: fcec01 l32r a0, 40201508 +4020215a: 0000c0 callx0 a0 +4020215d: 5d28 l32i.n a2, a13, 20 +4020215f: 54a242 movi a4, 0x254 +40202162: 0e3d mov.n a3, a14 +40202164: fce901 l32r a0, 40201508 +40202167: 0000c0 callx0 a0 +4020216a: 020c movi.n a2, 0 +4020216c: 5d29 s32i.n a2, a13, 20 +4020216e: 003386 j 40202240 +40202171: ffb221 l32r a2, 4020203c +40202174: ffb601 l32r a0, 4020204c +40202177: 0000c0 callx0 a0 +4020217a: 000046 j 4020217f +4020217d: 1c0c movi.n a12, 1 +4020217f: ffb021 l32r a2, 40202040 +40202182: ffb201 l32r a0, 4020204c +40202185: 0000c0 callx0 a0 +40202188: ffa921 l32r a2, 4020202c +4020218b: 1c0272 l8ui a7, a2, 28 +4020218e: 1b0262 l8ui a6, a2, 27 +40202191: 1a0252 l8ui a5, a2, 26 +40202194: 190242 l8ui a4, a2, 25 +40202197: 180232 l8ui a3, a2, 24 +4020219a: 1d0222 l8ui a2, a2, 29 +4020219d: 0129 s32i.n a2, a1, 0 +4020219f: ffa921 l32r a2, 40202044 +402021a2: ffaa01 l32r a0, 4020204c +402021a5: 0000c0 callx0 a0 +402021a8: fe6fd1 l32r a13, 40201b64 +402021ab: 5d28 l32i.n a2, a13, 20 +402021ad: 05f256 bnez a2, 40202210 +402021b0: ffa1f1 l32r a15, 40202034 +402021b3: 60a242 movi a4, 0x260 +402021b6: 0f3d mov.n a3, a15 +402021b8: 90a222 movi a2, 0x290 +402021bb: ffa501 l32r a0, 40202050 +402021be: 0000c0 callx0 a0 +402021c1: 5d29 s32i.n a2, a13, 20 +402021c3: 025d mov.n a5, a2 +402021c5: 045216 beqz a2, 4020220e +402021c8: 120c movi.n a2, 1 +402021ca: 326522 s32i a2, a5, 200 +402021cd: 66a242 movi a4, 0x266 +402021d0: 0f3d mov.n a3, a15 +402021d2: 34a122 movi a2, 0x134 +402021d5: 4159 s32i.n a5, a1, 16 +402021d7: ff9e01 l32r a0, 40202050 +402021da: 0000c0 callx0 a0 +402021dd: 4158 l32i.n a5, a1, 16 +402021df: 266522 s32i a2, a5, 152 +402021e2: 5d28 l32i.n a2, a13, 20 +402021e4: 262252 l32i a5, a2, 152 +402021e7: 159c beqz.n a5, 402021fc +402021e9: ff9331 l32r a3, 40202038 +402021ec: 06a042 movi a4, 6 +402021ef: 202550 or a2, a5, a5 +402021f2: fb8801 l32r a0, 40201014 <_irom0_text_start+0x4> +402021f5: 0000c0 callx0 a0 +402021f8: 000506 j 40202210 +402021fb: a24200 excw +402021fe: 3d6c movi.n a13, -29 +40202200: 0f .byte 0xf +40202201: 0c0c movi.n a12, 0 +40202203: fcc101 l32r a0, 40201508 +40202206: 0000c0 callx0 a0 +40202209: 5dc9 s32i.n a12, a13, 20 +4020220b: 000046 j 40202210 +4020220e: 0c0c movi.n a12, 0 +40202210: 2c2e66 bnei a14, 2, 40202240 +40202213: 4d28 l32i.n a2, a13, 16 +40202215: 72ac beqz.n a2, 40202240 +40202217: ff87e1 l32r a14, 40202034 +4020221a: 252222 l32i a2, a2, 148 +4020221d: 77a242 movi a4, 0x277 +40202220: 0e3d mov.n a3, a14 +40202222: fcb901 l32r a0, 40201508 +40202225: 0000c0 callx0 a0 +40202228: 4d28 l32i.n a2, a13, 16 +4020222a: 78a242 movi a4, 0x278 +4020222d: 0e3d mov.n a3, a14 +4020222f: fcb601 l32r a0, 40201508 +40202232: 0000c0 callx0 a0 +40202235: 020c movi.n a2, 0 +40202237: 4d29 s32i.n a2, a13, 16 +40202239: 0000c6 j 40202240 +4020223c: 0c0000 excw +4020223f: 211c movi.n a1, 18 +40202241: 01ff82 excw +40202244: c0ff82 excw +40202247: 080000 excw +4020224a: 0c2df1 l32r a15, 401c5300 <_lit4_end+0xbefd4> +4020224d: d1d8 l32i.n a13, a1, 52 +4020224f: e1c8 l32i.n a12, a1, 56 +40202251: c1e8 l32i.n a14, a1, 48 +40202253: b1f8 l32i.n a15, a1, 44 +40202255: 40c112 addi a1, a1, 64 +40202258: f00d ret.n + ... + +4020225c : +4020225c: 9348 l32i.n a4, a3, 36 +4020225e: f0c112 addi a1, a1, -16 +40202261: 242222 l32i a2, a2, 144 +40202264: 0448 l32i.n a4, a4, 0 +40202266: 3109 s32i.n a0, a1, 12 +40202268: 21c9 s32i.n a12, a1, 8 +4020226a: fe3e51 l32r a5, 40201b64 +4020226d: 01d222 addmi a2, a2, 0x100 +40202270: 156477 bbci a4, 7, 40202289 +40202273: 090222 l8ui a2, a2, 9 +40202276: 024d mov.n a4, a2 +40202278: 0422b6 bltui a2, 2, 40202280 +4020227b: 420b addi.n a4, a2, -1 +4020227d: 744040 extui a4, a4, 0, 8 +40202280: a02250 addx4 a2, a2, a5 +40202283: 6322c2 l32i a12, a2, 0x18c +40202286: 000286 j 40202294 +40202289: 080242 l8ui a4, a2, 8 +4020228c: a02450 addx4 a2, a4, a5 +4020228f: 6322c2 l32i a12, a2, 0x18c +40202292: 040c movi.n a4, 0 +40202294: 5ccc bnez.n a12, 4020229d +40202296: 020c movi.n a2, 0 +40202298: 000646 j 402022b5 +4020229b: 220000 excw +4020229e: 252c movi.n a5, 34 +402022a0: ff2216 beqz a2, 40202296 +402022a3: 1144a0 slli a4, a4, 6 +402022a6: 4258 l32i.n a5, a2, 16 +402022a8: 744040 extui a4, a4, 0, 8 +402022ab: 0c2d mov.n a2, a12 +402022ad: 0005c0 callx0 a5 +402022b0: fe2216 beqz a2, 40202296 +402022b3: 0c2d mov.n a2, a12 +402022b5: 3108 l32i.n a0, a1, 12 +402022b7: 21c8 l32i.n a12, a1, 8 +402022b9: 10c112 addi a1, a1, 16 +402022bc: f00d ret.n + ... + +402022c0 : +402022c0: 0b1362 l16ui a6, a3, 22 +402022c3: 0a1352 l16ui a5, a3, 20 +402022c6: f0c112 addi a1, a1, -16 +402022c9: 565a add.n a5, a6, a5 +402022cb: 3109 s32i.n a0, a1, 12 +402022cd: 21c9 s32i.n a12, a1, 8 +402022cf: f61c movi.n a6, 31 +402022d1: 042657 blt a6, a5, 402022d9 +402022d4: 020c movi.n a2, 0 +402022d6: 001506 j 4020232e +402022d9: 1358 l32i.n a5, a3, 4 +402022db: 242222 l32i a2, a2, 144 +402022de: 1558 l32i.n a5, a5, 4 +402022e0: 040562 l8ui a6, a5, 4 +402022e3: 266607 bbci a6, 0, 4020230d +402022e6: 554a add.n a5, a5, a4 +402022e8: 030552 l8ui a5, a5, 3 +402022eb: 156557 bbci a5, 5, 40202304 +402022ee: 415650 srli a5, a5, 6 +402022f1: 225a add.n a2, a2, a5 +402022f3: 0ba152 movi a5, 0x10b +402022f6: 225a add.n a2, a2, a5 +402022f8: 000222 l8ui a2, a2, 0 +402022fb: ffa052 movi a5, 255 +402022fe: 119257 bne a2, a5, 40202313 +40202301: fff3c6 j 402022d4 +40202304: 01d222 addmi a2, a2, 0x100 +40202307: 090222 l8ui a2, a2, 9 +4020230a: 000146 j 40202313 +4020230d: 01d222 addmi a2, a2, 0x100 +40202310: 080222 l8ui a2, a2, 8 +40202313: fe1451 l32r a5, 40201b64 +40202316: a02250 addx4 a2, a2, a5 +40202319: 6322c2 l32i a12, a2, 0x18c +4020231c: fb4c16 beqz a12, 402022d4 +4020231f: 252c22 l32i a2, a12, 148 +40202322: 5258 l32i.n a5, a2, 20 +40202324: 0c2d mov.n a2, a12 +40202326: 0005c0 callx0 a5 +40202329: fa7216 beqz a2, 402022d4 +4020232c: 0c2d mov.n a2, a12 +4020232e: 3108 l32i.n a0, a1, 12 +40202330: 21c8 l32i.n a12, a1, 8 +40202332: 10c112 addi a1, a1, 16 +40202335: f00d ret.n +40202337: c11200 mul16u a1, a2, a0 +4020233a: 1342f0 excw +4020233d: 21c900 srai a12, a0, 9 +40202340: 03cd mov.n a12, a3 +40202342: 332b addi.n a3, a3, 2 +40202344: 3109 s32i.n a0, a1, 12 +40202346: 11d9 s32i.n a13, a1, 4 +40202348: 02dd mov.n a13, a2 +4020234a: fb3201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020234d: 0000c0 callx0 a0 +40202350: 001c22 l16ui a2, a12, 0 +40202353: 3108 l32i.n a0, a1, 12 +40202355: 2d2a add.n a2, a13, a2 +40202357: 21c8 l32i.n a12, a1, 8 +40202359: 11d8 l32i.n a13, a1, 4 +4020235b: 10c112 addi a1, a1, 16 +4020235e: f00d ret.n +40202360: 007772 excw +40202363: 888e00 excw +40202366: ff .byte 0xff +40202367: ff .byte 0xff +40202368: ff .byte 0xff +40202369: fffff0 excw +4020236c: ff .byte 0xff +4020236d: ff .byte 0xff +4020236e: 8f .byte 0x8f +4020236f: ff .byte 0xff +40202370: f20c00 excw +40202373: 3f .byte 0x3f +40202374: 000000 ill +40202377: 000080 ret +4020237a: ff4000 excw +4020237d: ff .byte 0xff +4020237e: ff .byte 0xff +4020237f: df .byte 0xdf +40202380: ff .byte 0xff +40202381: 0f .byte 0xf +40202382: 24ff00 extui a15, a0, 15, 3 +40202385: 600006 j 4021a389 + +40202388 : +40202388: b0c112 addi a1, a1, -80 +4020238b: 1061e2 s32i a14, a1, 64 +4020238e: 72e8 l32i.n a14, a2, 28 +40202390: 136102 s32i a0, a1, 76 +40202393: 112e22 l32i a2, a14, 68 +40202396: 1261c2 s32i a12, a1, 72 +40202399: 1161d2 s32i a13, a1, 68 +4020239c: f1f9 s32i.n a15, a1, 60 +4020239e: 5139 s32i.n a3, a1, 20 +402023a0: 025226 beqi a2, 5, 402023a6 +402023a3: 0020c6 j 4020242a +402023a6: 080316 beqz a3, 4020242a +402023a9: 5128 l32i.n a2, a1, 20 +402023ab: 12c8 l32i.n a12, a2, 4 +402023ad: 322e22 l32i a2, a14, 200 +402023b0: 62cc bnez.n a2, 402023ba +402023b2: 242ed2 l32i a13, a14, 144 +402023b5: 000286 j 402023c3 +402023b8: c00000 sub a0, a0, a0 +402023bb: 202c movi.n a0, 34 +402023bd: 07cb05 call0 4020a070 +402023c0: 20d220 or a13, a2, a2 +402023c3: 000c22 l8ui a2, a12, 0 +402023c6: 042020 extui a2, a2, 0, 1 +402023c9: 076122 s32i a2, a1, 28 +402023cc: 05ad16 beqz a13, 4020242a +402023cf: 0d1d22 l16ui a2, a13, 26 +402023d2: 32cc bnez.n a2, 402023d9 +402023d4: 2d28 l32i.n a2, a13, 8 +402023d6: 50f217 bbsi a2, 17, 4020242a +402023d9: 0d0c22 l8ui a2, a12, 13 +402023dc: 0c0c32 l8ui a3, a12, 12 +402023df: 112280 slli a2, a2, 8 +402023e2: 202230 or a2, a2, a3 +402023e5: 11c280 slli a12, a2, 8 +402023e8: 412820 srli a2, a2, 8 +402023eb: 20cc20 or a12, a12, a2 +402023ee: 11cc00 slli a12, a12, 16 +402023f1: ffdb21 l32r a2, 40202360 +402023f4: 31c0c0 srai a12, a12, 16 +402023f7: 803c20 add a3, a12, a2 +402023fa: 01a042 movi a4, 1 +402023fd: 020c movi.n a2, 0 +402023ff: 832430 moveqz a2, a4, a3 +40202402: 180d32 l8ui a3, a13, 24 +40202405: 742020 extui a2, a2, 0, 8 +40202408: 338c beqz.n a3, 4020240f +4020240a: 1c9347 bne a3, a4, 4020242a +4020240d: 929c beqz.n a2, 4020242a +4020240f: 5128 l32i.n a2, a1, 20 +40202411: 246ed2 s32i a13, a14, 144 +40202414: 040c movi.n a4, 0 +40202416: 130c movi.n a3, 1 +40202418: 1fd585 call0 40222174 +4020241b: 02fd mov.n a15, a2 +4020241d: ffd121 l32r a2, 40202364 +40202420: cfcc bnez.n a15, 40202430 +40202422: 049c27 bne a12, a2, 4020242a +40202425: 5128 l32i.n a2, a1, 20 +40202427: 269785 call0 40228da0 +4020242a: 120c movi.n a2, 1 +4020242c: 00d446 j 40202781 +4020242f: 9c2700 excw +40202432: 9f2814 excw +40202435: 00a132 movi a3, 0x100 +40202438: 0248 l32i.n a4, a2, 0 +4020243a: 203430 or a3, a4, a3 +4020243d: 0239 s32i.n a3, a2, 0 +4020243f: 322e32 l32i a3, a14, 200 +40202442: 23cc bnez.n a3, 40202448 +40202444: 830c movi.n a3, 8 +40202446: 4239 s32i.n a3, a2, 16 +40202448: 0e38 l32i.n a3, a14, 0 +4020244a: 1f28 l32i.n a2, a15, 4 +4020244c: 242e42 l32i a4, a14, 144 +4020244f: 8139 s32i.n a3, a1, 32 +40202451: 1238 l32i.n a3, a2, 4 +40202453: 4149 s32i.n a4, a1, 16 +40202455: 012d mov.n a2, a1 +40202457: e40c movi.n a4, 14 +40202459: c80ec2 l8ui a12, a14, 200 +4020245c: faee01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020245f: 0000c0 callx0 a0 +40202462: 1f88 l32i.n a8, a15, 4 +40202464: 0b1f72 l16ui a7, a15, 22 +40202467: 1828 l32i.n a2, a8, 4 +40202469: 014c80 slli a4, a12, 24 +4020246c: 32eb addi.n a3, a2, 14 +4020246e: 1839 s32i.n a3, a8, 4 +40202470: f2c732 addi a3, a7, -14 +40202473: 0b5f32 s16i a3, a15, 22 +40202476: 9149 s32i.n a4, a1, 36 +40202478: 111c66 bnei a12, 1, 4020248d +4020247b: 000132 l8ui a3, a1, 0 +4020247e: 0b6307 bbci a3, 0, 4020248d +40202481: 9f48 l32i.n a4, a15, 36 +40202483: 80a032 movi a3, 128 +40202486: 0498 l32i.n a9, a4, 0 +40202488: 203930 or a3, a9, a3 +4020248b: 0439 s32i.n a3, a4, 0 +4020248d: 4138 l32i.n a3, a1, 16 +4020248f: 2348 l32i.n a4, a3, 8 +40202491: 030c movi.n a3, 0 +40202493: 6139 s32i.n a3, a1, 24 +40202495: 831c movi.n a3, 24 +40202497: 1d6417 bbci a4, 1, 402024b8 +4020249a: 9f38 l32i.n a3, a15, 36 +4020249c: 440c movi.n a4, 4 +4020249e: 0338 l32i.n a3, a3, 0 +402024a0: 090c movi.n a9, 0 +402024a2: 413630 srli a3, a3, 6 +402024a5: 104340 and a4, a3, a4 +402024a8: 130c movi.n a3, 1 +402024aa: 933940 movnez a3, a9, a4 +402024ad: 6139 s32i.n a3, a1, 24 +402024af: 18a092 movi a9, 24 +402024b2: 1aa032 movi a3, 26 +402024b5: 933940 movnez a3, a9, a4 +402024b8: 0a5f32 s16i a3, a15, 20 +402024bb: 326b addi.n a3, a2, 6 +402024bd: 1839 s32i.n a3, a8, 4 +402024bf: fac772 addi a7, a7, -6 +402024c2: 0b5f72 s16i a7, a15, 22 +402024c5: aaaf32 movi a3, -86 +402024c8: 074232 s8i a3, a2, 7 +402024cb: 064232 s8i a3, a2, 6 +402024ce: 330c movi.n a3, 3 +402024d0: 084232 s8i a3, a2, 8 +402024d3: 030c movi.n a3, 0 +402024d5: 094232 s8i a3, a2, 9 +402024d8: 0a4232 s8i a3, a2, 10 +402024db: 0b4232 s8i a3, a2, 11 +402024de: 0c0132 l8ui a3, a1, 12 +402024e1: 4148 l32i.n a4, a1, 16 +402024e3: 0c4232 s8i a3, a2, 12 +402024e6: 0d0132 l8ui a3, a1, 13 +402024e9: 080c movi.n a8, 0 +402024eb: 0d4232 s8i a3, a2, 13 +402024ee: 2428 l32i.n a2, a4, 8 +402024f0: 225287 bbc a2, a8, 40202516 +402024f3: 142e22 l32i a2, a14, 80 +402024f6: 1c6247 bbci a2, 4, 40202516 +402024f9: 9f28 l32i.n a2, a15, 36 +402024fb: 0228 l32i.n a2, a2, 0 +402024fd: 096287 bbci a2, 8, 4020250a +40202500: 1f28 l32i.n a2, a15, 4 +40202502: 1228 l32i.n a2, a2, 4 +40202504: 0e0222 l8ui a2, a2, 14 +40202507: 0be237 bbsi a2, 3, 40202516 +4020250a: 203ff0 or a3, a15, a15 +4020250d: 202ee0 or a2, a14, a14 +40202510: ffd485 call0 4020225c +40202513: 208220 or a8, a2, a2 +40202516: 1f28 l32i.n a2, a15, 4 +40202518: 9148 l32i.n a4, a1, 36 +4020251a: 12c8 l32i.n a12, a2, 4 +4020251c: 030c movi.n a3, 0 +4020251e: e8cc72 addi a7, a12, -24 +40202521: 1279 s32i.n a7, a2, 4 +40202523: 4f79 s32i.n a7, a15, 16 +40202525: 820c movi.n a2, 8 +40202527: 004722 s8i a2, a7, 0 +4020252a: eacc22 addi a2, a12, -22 +4020252d: 005232 s16i a3, a2, 0 +40202530: 312840 srai a2, a4, 24 +40202533: f2bc beqz.n a2, 40202576 +40202535: 021226 beqi a2, 1, 4020253b +40202538: 004386 j 4020264a +4020253b: 220c movi.n a2, 2 +4020253d: 014722 s8i a2, a7, 1 +40202540: 640c movi.n a4, 6 +40202542: 013d mov.n a3, a1 +40202544: eccc22 addi a2, a12, -20 +40202547: a179 s32i.n a7, a1, 40 +40202549: b189 s32i.n a8, a1, 44 +4020254b: fab201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020254e: 0000c0 callx0 a0 +40202551: 8128 l32i.n a2, a1, 32 +40202553: 640c movi.n a4, 6 +40202555: 33c232 addi a3, a2, 51 +40202558: f2cc22 addi a2, a12, -14 +4020255b: faae01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020255e: 0000c0 callx0 a0 +40202561: 640c movi.n a4, 6 +40202563: 314a add.n a3, a1, a4 +40202565: f8cc22 addi a2, a12, -8 +40202568: faab01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020256b: 0000c0 callx0 a0 +4020256e: b188 l32i.n a8, a1, 44 +40202570: a178 l32i.n a7, a1, 40 +40202572: 000d06 j 402025aa +40202575: 120c00 excw +40202578: 4138 l32i.n a3, a1, 16 +4020257a: 014722 s8i a2, a7, 1 +4020257d: 640c movi.n a4, 6 +4020257f: eccc22 addi a2, a12, -20 +40202582: a179 s32i.n a7, a1, 40 +40202584: b189 s32i.n a8, a1, 44 +40202586: faa301 l32r a0, 40201014 <_irom0_text_start+0x4> +40202589: 0000c0 callx0 a0 +4020258c: 640c movi.n a4, 6 +4020258e: 314a add.n a3, a1, a4 +40202590: f2cc22 addi a2, a12, -14 +40202593: faa001 l32r a0, 40201014 <_irom0_text_start+0x4> +40202596: 0000c0 callx0 a0 +40202599: 640c movi.n a4, 6 +4020259b: 013d mov.n a3, a1 +4020259d: f8cc22 addi a2, a12, -8 +402025a0: fa9d01 l32r a0, 40201014 <_irom0_text_start+0x4> +402025a3: 0000c0 callx0 a0 +402025a6: a178 l32i.n a7, a1, 40 +402025a8: b188 l32i.n a8, a1, 44 +402025aa: 9f28 l32i.n a2, a15, 36 +402025ac: 0228 l32i.n a2, a2, 0 +402025ae: 0b7267 bbci a2, 22, 402025bd +402025b1: 010732 l8ui a3, a7, 1 +402025b4: 20a022 movi a2, 32 +402025b7: 202320 or a2, a3, a2 +402025ba: 014722 s8i a2, a7, 1 +402025bd: 6138 l32i.n a3, a1, 24 +402025bf: 938c beqz.n a3, 402025cc +402025c1: 020c movi.n a2, 0 +402025c3: 0020c0 memw +402025c6: 004222 s8i a2, a2, 0 +402025c9: 0041f0 break 1, 15 +402025cc: 4148 l32i.n a4, a1, 16 +402025ce: feccc2 addi a12, a12, -2 +402025d1: 5e1422 l16ui a2, a4, 188 +402025d4: 321b addi.n a3, a2, 1 +402025d6: 5e5432 s16i a3, a4, 188 +402025d9: 1122c0 slli a2, a2, 4 +402025dc: 005c22 s16i a2, a12, 0 +402025df: fd61c1 l32r a12, 40201b64 +402025e2: 04a816 beqz a8, 40202630 +402025e5: 010732 l8ui a3, a7, 1 +402025e8: 024c movi.n a2, 64 +402025ea: 202320 or a2, a3, a2 +402025ed: 014722 s8i a2, a7, 1 +402025f0: 9f48 l32i.n a4, a15, 36 +402025f2: 024c movi.n a2, 64 +402025f4: 0438 l32i.n a3, a4, 0 +402025f6: 202320 or a2, a3, a2 +402025f9: 0429 s32i.n a2, a4, 0 +402025fb: 5c28 l32i.n a2, a12, 20 +402025fd: 001832 l16ui a3, a8, 0 +40202600: 0c9e27 bne a14, a2, 40202610 +40202603: 80af22 movi a2, -128 +40202606: 202320 or a2, a3, a2 +40202609: 0c4422 s8i a2, a4, 12 +4020260c: 0000c6 j 40202613 +4020260f: 443200 extui a3, a0, 2, 5 +40202612: 220c movi.n a2, 2 +40202614: 2528 l32i.n a2, a5, 8 +40202616: 3478 l32i.n a7, a4, 12 +40202618: 000222 l8ui a2, a2, 0 +4020261b: 342020 extui a2, a2, 0, 4 +4020261e: 113280 slli a3, a2, 8 +40202621: ff5121 l32r a2, 40202368 +40202624: 102720 and a2, a7, a2 +40202627: 202230 or a2, a2, a3 +4020262a: 3429 s32i.n a2, a4, 12 +4020262c: 000306 j 4020263c +4020262f: 9f3800 excw +40202632: ff4d21 l32r a2, 40202368 +40202635: 3348 l32i.n a4, a3, 12 +40202637: 102420 and a2, a4, a2 +4020263a: 3329 s32i.n a2, a3, 12 +4020263c: 7c0c32 l8ui a3, a12, 124 +4020263f: 9f28 l32i.n a2, a15, 36 +40202641: 084232 s8i a3, a2, 8 +40202644: de2f16 beqz a15, 4020242a +40202647: 000306 j 40202657 +4020264a: 130c movi.n a3, 1 +4020264c: 0f2d mov.n a2, a15 +4020264e: 1fe605 call0 402224b0 +40202651: ff7546 j 4020242a +40202654: 000000 ill +40202657: 9f38 l32i.n a3, a15, 36 +40202659: 840c movi.n a4, 8 +4020265b: 0328 l32i.n a2, a3, 0 +4020265d: 5378 l32i.n a7, a3, 20 +4020265f: 418620 srli a8, a2, 6 +40202662: 204840 or a4, a8, a4 +40202665: 1144a0 slli a4, a4, 6 +40202668: 542020 extui a2, a2, 0, 6 +4020266b: 202240 or a2, a2, a4 +4020266e: 0329 s32i.n a2, a3, 0 +40202670: 7128 l32i.n a2, a1, 28 +40202672: 728c beqz.n a2, 4020267d +40202674: 140c movi.n a4, 1 +40202676: 202740 or a2, a7, a4 +40202679: 000186 j 40202683 +4020267c: af2200 excw +4020267f: fe .byte 0xfe +40202680: 102720 and a2, a7, a2 +40202683: 042c92 l32i a9, a12, 16 +40202686: 056322 s32i a2, a3, 20 +40202689: c04e90 sub a4, a14, a9 +4020268c: 020c movi.n a2, 0 +4020268e: 170c movi.n a7, 1 +40202690: 837240 moveqz a7, a2, a4 +40202693: 747070 extui a7, a7, 0, 8 +40202696: 021e97 beq a14, a9, 4020269c +40202699: 1a0d22 l8ui a2, a13, 26 +4020269c: 1398 l32i.n a9, a3, 4 +4020269e: ff3341 l32r a4, 4020236c +402026a1: 1177f0 slli a7, a7, 1 +402026a4: 104940 and a4, a9, a4 +402026a7: 097c movi.n a9, -16 +402026a9: 109490 and a9, a4, a9 +402026ac: 640c movi.n a4, 6 +402026ae: 204940 or a4, a9, a4 +402026b1: 1349 s32i.n a4, a3, 4 +402026b3: ff2f41 l32r a4, 40202370 +402026b6: 0398 l32i.n a9, a3, 0 +402026b8: 0020c0 memw +402026bb: 0448 l32i.n a4, a4, 0 +402026bd: 6349 s32i.n a4, a3, 24 +402026bf: c47c movi.n a4, -4 +402026c1: 104940 and a4, a9, a4 +402026c4: 204470 or a4, a4, a7 +402026c7: 0349 s32i.n a4, a3, 0 +402026c9: 0d1d32 l16ui a3, a13, 26 +402026cc: 838c beqz.n a3, 402026d8 +402026ce: 06e817 bbsi a8, 1, 402026d8 +402026d1: 206fc5 call0 40222dd0 +402026d4: 0000c6 j 402026db +402026d7: a02200 addx4 a2, a2, a0 +402026da: 6f2200 excw +402026dd: 2f4207 ball a2, a0, 40202710 +402026e0: 1f3201 l32r a0, 401ca3a8 <_lit4_end+0xc407c> +402026e3: 220b addi.n a2, a2, -1 +402026e5: 1f .byte 0x1f +402026e6: c00a add.n a12, a0, a0 +402026e8: 780020 excw +402026eb: 232a04 excw +402026ee: ff2131 l32r a3, 40202374 +402026f1: b42020 extui a2, a2, 0, 12 +402026f4: 203730 or a3, a7, a3 +402026f7: 0020c0 memw +402026fa: 0439 s32i.n a3, a4, 0 +402026fc: 0020c0 memw +402026ff: 0478 l32i.n a7, a4, 0 +40202701: ff1d31 l32r a3, 40202378 +40202704: 203730 or a3, a7, a3 +40202707: 0020c0 memw +4020270a: 0439 s32i.n a3, a4, 0 +4020270c: 0020c0 memw +4020270f: 0478 l32i.n a7, a4, 0 +40202711: ff1a31 l32r a3, 4020237c +40202714: 103730 and a3, a7, a3 +40202717: 0020c0 memw +4020271a: 0439 s32i.n a3, a4, 0 +4020271c: 0020c0 memw +4020271f: 0478 l32i.n a7, a4, 0 +40202721: 113240 slli a3, a2, 12 +40202724: ff1721 l32r a2, 40202380 +40202727: 102720 and a2, a7, a2 +4020272a: 202230 or a2, a2, a3 +4020272d: 0020c0 memw +40202730: 0429 s32i.n a2, a4, 0 +40202732: 9f28 l32i.n a2, a15, 36 +40202734: 0228 l32i.n a2, a2, 0 +40202736: 04e287 bbsi a2, 8, 4020273e +40202739: 5128 l32i.n a2, a1, 20 +4020273b: 266545 call0 40228d90 +4020273e: 2d28 l32i.n a2, a13, 8 +40202740: 0f6247 bbci a2, 4, 40202753 +40202743: 322e22 l32i a2, a14, 200 +40202746: 091266 bnei a2, 1, 40202753 +40202749: 0f3d mov.n a3, a15 +4020274b: 0d2d mov.n a2, a13 +4020274d: 0380c5 call0 40205f5c +40202750: 000ac6 j 4020277f +40202753: 037685 call0 40205ebc +40202756: 00b216 beqz a2, 40202765 +40202759: 202ff0 or a2, a15, a15 +4020275c: 1f5385 call0 40221c98 +4020275f: 01e256 bnez a2, 40202781 +40202762: 000386 j 40202774 +40202765: 020c movi.n a2, 0 +40202767: 8f29 s32i.n a2, a15, 32 +40202769: 742c22 l32i a2, a12, 0x1d0 +4020276c: 20cf52 addi a5, a15, 32 +4020276f: 02f9 s32i.n a15, a2, 0 +40202771: 746c52 s32i a5, a12, 0x1d0 +40202774: ff0421 l32r a2, 40202384 +40202777: 0020c0 memw +4020277a: 0228 l32i.n a2, a2, 0 +4020277c: 4e6c22 s32i a2, a12, 0x138 +4020277f: 020c movi.n a2, 0 +40202781: 132102 l32i a0, a1, 76 +40202784: 1221c2 l32i a12, a1, 72 +40202787: 1121d2 l32i a13, a1, 68 +4020278a: 1021e2 l32i a14, a1, 64 +4020278d: f1f8 l32i.n a15, a1, 60 +4020278f: 50c112 addi a1, a1, 80 +40202792: f00d ret.n + +40202794 : +40202794: d0c112 addi a1, a1, -48 +40202797: a1c9 s32i.n a12, a1, 40 +40202799: 43c8 l32i.n a12, a3, 16 +4020279b: 91d9 s32i.n a13, a1, 36 +4020279d: 81e9 s32i.n a14, a1, 32 +4020279f: 71f9 s32i.n a15, a1, 28 +402027a1: b109 s32i.n a0, a1, 44 +402027a3: 0169 s32i.n a6, a1, 0 +402027a5: c60c movi.n a6, 12 +402027a7: 03dd mov.n a13, a3 +402027a9: 2422f2 l32i a15, a2, 144 +402027ac: c80232 l8ui a3, a2, 200 +402027af: 1159 s32i.n a5, a1, 4 +402027b1: 004c42 s8i a4, a12, 0 +402027b4: 104460 and a4, a4, a6 +402027b7: 07ed mov.n a14, a7 +402027b9: 588466 bnei a4, 8, 40202815 +402027bc: 013380 slli a3, a3, 24 +402027bf: 313830 srai a3, a3, 24 +402027c2: 63ac beqz.n a3, 402027ec +402027c4: 7e1366 bnei a3, 1, 40202846 +402027c7: 220c movi.n a2, 2 +402027c9: 073d mov.n a3, a7 +402027cb: 014c22 s8i a2, a12, 1 +402027ce: 640c movi.n a4, 6 +402027d0: 2c4b addi.n a2, a12, 4 +402027d2: fa1001 l32r a0, 40201014 <_irom0_text_start+0x4> +402027d5: 0000c0 callx0 a0 +402027d8: c138 l32i.n a3, a1, 48 +402027da: 640c movi.n a4, 6 +402027dc: 2cab addi.n a2, a12, 10 +402027de: fa0d01 l32r a0, 40201014 <_irom0_text_start+0x4> +402027e1: 0000c0 callx0 a0 +402027e4: 640c movi.n a4, 6 +402027e6: 0138 l32i.n a3, a1, 0 +402027e8: 001446 j 4020283d +402027eb: 1fcc00 excw +402027ee: 2522f2 l32i a15, a2, 148 +402027f1: 120c movi.n a2, 1 +402027f3: c138 l32i.n a3, a1, 48 +402027f5: 014c22 s8i a2, a12, 1 +402027f8: 640c movi.n a4, 6 +402027fa: 2c4b addi.n a2, a12, 4 +402027fc: fa0601 l32r a0, 40201014 <_irom0_text_start+0x4> +402027ff: 0000c0 callx0 a0 +40202802: 0138 l32i.n a3, a1, 0 +40202804: 640c movi.n a4, 6 +40202806: 2cab addi.n a2, a12, 10 +40202808: fa0301 l32r a0, 40201014 <_irom0_text_start+0x4> +4020280b: 0000c0 callx0 a0 +4020280e: 640c movi.n a4, 6 +40202810: 0e3d mov.n a3, a14 +40202812: 0009c6 j 4020283d +40202815: 3fcc bnez.n a15, 4020281c +40202817: 13cc bnez.n a3, 4020281c +40202819: 2522f2 l32i a15, a2, 148 +4020281c: 020c movi.n a2, 0 +4020281e: 014c22 s8i a2, a12, 1 +40202821: 640c movi.n a4, 6 +40202823: 0e3d mov.n a3, a14 +40202825: 2c4b addi.n a2, a12, 4 +40202827: f9fb01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020282a: 0000c0 callx0 a0 +4020282d: 0138 l32i.n a3, a1, 0 +4020282f: 640c movi.n a4, 6 +40202831: 2cab addi.n a2, a12, 10 +40202833: f9f801 l32r a0, 40201014 <_irom0_text_start+0x4> +40202836: 0000c0 callx0 a0 +40202839: c138 l32i.n a3, a1, 48 +4020283b: 640c movi.n a4, 6 +4020283d: 10cc22 addi a2, a12, 16 +40202840: f9f501 l32r a0, 40201014 <_irom0_text_start+0x4> +40202843: 0000c0 callx0 a0 +40202846: 020c movi.n a2, 0 +40202848: 015c22 s16i a2, a12, 2 +4020284b: 1128 l32i.n a2, a1, 4 +4020284d: 9052f0 addx2 a5, a2, a15 +40202850: 4e1522 l16ui a2, a5, 156 +40202853: 321b addi.n a3, a2, 1 +40202855: 4e5532 s16i a3, a5, 156 +40202858: 1122c0 slli a2, a2, 4 +4020285b: 0b5c22 s16i a2, a12, 22 +4020285e: 000e22 l8ui a2, a14, 0 +40202861: 0f6207 bbci a2, 0, 40202874 +40202864: 9d38 l32i.n a3, a13, 36 +40202866: 02a422 movi a2, 0x402 +40202869: 0348 l32i.n a4, a3, 0 +4020286b: 1122a0 slli a2, a2, 6 +4020286e: 202420 or a2, a4, a2 +40202871: 006322 s32i a2, a3, 0 +40202874: fcbc21 l32r a2, 40201b64 +40202877: b108 l32i.n a0, a1, 44 +40202879: 7d0232 l8ui a3, a2, 125 +4020287c: 9d28 l32i.n a2, a13, 36 +4020287e: a1c8 l32i.n a12, a1, 40 +40202880: 91d8 l32i.n a13, a1, 36 +40202882: 81e8 l32i.n a14, a1, 32 +40202884: 71f8 l32i.n a15, a1, 28 +40202886: 084232 s8i a3, a2, 8 +40202889: 30c112 addi a1, a1, 48 +4020288c: f00d ret.n + ... + +40202890 : +40202890: e0c112 addi a1, a1, -32 +40202893: 242272 l32i a7, a2, 144 +40202896: 61c9 s32i.n a12, a1, 24 +40202898: 7109 s32i.n a0, a1, 28 +4020289a: 51d9 s32i.n a13, a1, 20 +4020289c: 03cd mov.n a12, a3 +4020289e: 0268 l32i.n a6, a2, 0 +402028a0: 0b1716 beqz a7, 40202955 +402028a3: 0ae616 beqz a6, 40202955 +402028a6: 1388 l32i.n a8, a3, 4 +402028a8: 0b1352 l16ui a5, a3, 22 +402028ab: 0a1332 l16ui a3, a3, 20 +402028ae: 0020c0 memw +402028b1: 0898 l32i.n a9, a8, 0 +402028b3: 353a add.n a3, a5, a3 +402028b5: feaf51 l32r a5, 40202374 +402028b8: b43030 extui a3, a3, 0, 12 +402028bb: 205950 or a5, a9, a5 +402028be: 0020c0 memw +402028c1: 0859 s32i.n a5, a8, 0 +402028c3: 0020c0 memw +402028c6: 0898 l32i.n a9, a8, 0 +402028c8: feac51 l32r a5, 40202378 +402028cb: 33c662 addi a6, a6, 51 +402028ce: 205950 or a5, a9, a5 +402028d1: 0020c0 memw +402028d4: 0859 s32i.n a5, a8, 0 +402028d6: 0020c0 memw +402028d9: 0898 l32i.n a9, a8, 0 +402028db: fea851 l32r a5, 4020237c +402028de: 105950 and a5, a9, a5 +402028e1: 0020c0 memw +402028e4: 0859 s32i.n a5, a8, 0 +402028e6: 0020c0 memw +402028e9: 0898 l32i.n a9, a8, 0 +402028eb: 115340 slli a5, a3, 12 +402028ee: fea431 l32r a3, 40202380 +402028f1: 103930 and a3, a9, a3 +402028f4: 203350 or a3, a3, a5 +402028f7: 0020c0 memw +402028fa: 0839 s32i.n a3, a8, 0 +402028fc: 322232 l32i a3, a2, 200 +402028ff: 4cd8 l32i.n a13, a12, 16 +40202901: 33cc bnez.n a3, 40202908 +40202903: 0179 s32i.n a7, a1, 0 +40202905: 000386 j 40202917 +40202908: 0d1732 l16ui a3, a7, 26 +4020290b: 48c252 addi a5, a2, 72 +4020290e: d43030 extui a3, a3, 0, 14 +40202911: 006162 s32i a6, a1, 0 +40202914: 837530 moveqz a7, a5, a3 +40202917: 10a052 movi a5, 16 +4020291a: 203cc0 or a3, a12, a12 +4020291d: ffe745 call0 40202794 +40202920: 9c28 l32i.n a2, a12, 36 +40202922: 0228 l32i.n a2, a2, 0 +40202924: 0a6267 bbci a2, 6, 40202932 +40202927: 010d32 l8ui a3, a13, 1 +4020292a: 024c movi.n a2, 64 +4020292c: 202320 or a2, a3, a2 +4020292f: 014d22 s8i a2, a13, 1 +40202932: 035885 call0 40205ebc +40202935: 728c beqz.n a2, 40202940 +40202937: 0c2d mov.n a2, a12 +40202939: 1f35c5 call0 40221c98 +4020293c: 0005c6 j 40202957 +4020293f: 030c00 excw +40202942: 8c39 s32i.n a3, a12, 32 +40202944: fc8831 l32r a3, 40201b64 +40202947: 742342 l32i a4, a3, 0x1d0 +4020294a: 04c9 s32i.n a12, a4, 0 +4020294c: 20ccc2 addi a12, a12, 32 +4020294f: 7463c2 s32i a12, a3, 0x1d0 +40202952: 000046 j 40202957 +40202955: 120c movi.n a2, 1 +40202957: 7108 l32i.n a0, a1, 28 +40202959: 61c8 l32i.n a12, a1, 24 +4020295b: 51d8 l32i.n a13, a1, 20 +4020295d: 20c112 addi a1, a1, 32 +40202960: f00d ret.n + ... + +40202964 : +40202964: b0c112 addi a1, a1, -80 +40202967: 1161d2 s32i a13, a1, 68 +4020296a: f1f9 s32i.n a15, a1, 60 +4020296c: 0268 l32i.n a6, a2, 0 +4020296e: 02fd mov.n a15, a2 +40202970: 2422d2 l32i a13, a2, 144 +40202973: 020c movi.n a2, 0 +40202975: 136102 s32i a0, a1, 76 +40202978: 1261c2 s32i a12, a1, 72 +4020297b: 1061e2 s32i a14, a1, 64 +4020297e: 4129 s32i.n a2, a1, 16 +40202980: 021627 beq a6, a2, 40202986 +40202983: 049d27 bne a13, a2, 4020298b +40202986: 120c movi.n a2, 1 +40202988: 003bc6 j 40202a7b +4020298b: 022d22 l32i a2, a13, 8 +4020298e: 42a0e2 movi a14, 66 +40202991: 102e20 and a2, a14, a2 +40202994: 831c movi.n a3, 24 +40202996: ae1c movi.n a14, 26 +40202998: 83e320 moveqz a14, a3, a2 +4020299b: 040c movi.n a4, 0 +4020299d: 0e3d mov.n a3, a14 +4020299f: 10c122 addi a2, a1, 16 +402029a2: 8169 s32i.n a6, a1, 32 +402029a4: 037145 call0 402060bc +402029a7: 02cd mov.n a12, a2 +402029a9: 8168 l32i.n a6, a1, 32 +402029ab: fd7216 beqz a2, 40202986 +402029ae: 0a52e2 s16i a14, a2, 20 +402029b1: 42e8 l32i.n a14, a2, 16 +402029b3: 2d28 l32i.n a2, a13, 8 +402029b5: 01d9 s32i.n a13, a1, 0 +402029b7: 48cf72 addi a7, a15, 72 +402029ba: 33c662 addi a6, a6, 51 +402029bd: 216217 bbci a2, 1, 402029e2 +402029c0: c8a042 movi a4, 200 +402029c3: 0c3d mov.n a3, a12 +402029c5: 0f2d mov.n a2, a15 +402029c7: 050c movi.n a5, 0 +402029c9: ffdc85 call0 40202794 +402029cc: 030c movi.n a3, 0 +402029ce: 184e32 s8i a3, a14, 24 +402029d1: 890d22 l8ui a2, a13, 137 +402029d4: 042c movi.n a4, 32 +402029d6: 932420 movnez a2, a4, a2 +402029d9: 184e22 s8i a2, a14, 24 +402029dc: 194e32 s8i a3, a14, 25 +402029df: 000346 j 402029f0 +402029e2: 10a052 movi a5, 16 +402029e5: 48a042 movi a4, 72 +402029e8: 0c3d mov.n a3, a12 +402029ea: 202ff0 or a2, a15, a15 +402029ed: ffda45 call0 40202794 +402029f0: 2d28 l32i.n a2, a13, 8 +402029f2: 0a6247 bbci a2, 4, 40202a00 +402029f5: 010e32 l8ui a3, a14, 1 +402029f8: 021c movi.n a2, 16 +402029fa: 202320 or a2, a3, a2 +402029fd: 014e22 s8i a2, a14, 1 +40202a00: fc59e1 l32r a14, 40201b64 +40202a03: 020c movi.n a2, 0 +40202a05: 4e58 l32i.n a5, a14, 16 +40202a07: 140c movi.n a4, 1 +40202a09: c03f50 sub a3, a15, a5 +40202a0c: 834230 moveqz a4, a2, a3 +40202a0f: 744040 extui a4, a4, 0, 8 +40202a12: 021f57 beq a15, a5, 40202a18 +40202a15: 1a0d22 l8ui a2, a13, 26 +40202a18: 9c58 l32i.n a5, a12, 36 +40202a1a: fe5431 l32r a3, 4020236c +40202a1d: 1568 l32i.n a6, a5, 4 +40202a1f: 1144f0 slli a4, a4, 1 +40202a22: 103630 and a3, a6, a3 +40202a25: 067c movi.n a6, -16 +40202a27: 106360 and a6, a3, a6 +40202a2a: 630c movi.n a3, 6 +40202a2c: 203630 or a3, a6, a3 +40202a2f: 1539 s32i.n a3, a5, 4 +40202a31: fe4f31 l32r a3, 40202370 +40202a34: 0568 l32i.n a6, a5, 0 +40202a36: 0020c0 memw +40202a39: 0338 l32i.n a3, a3, 0 +40202a3b: 6539 s32i.n a3, a5, 24 +40202a3d: c37c movi.n a3, -4 +40202a3f: 103630 and a3, a6, a3 +40202a42: 203340 or a3, a3, a4 +40202a45: 0539 s32i.n a3, a5, 0 +40202a47: 0d1d32 l16ui a3, a13, 26 +40202a4a: a38c beqz.n a3, 40202a58 +40202a4c: 0538 l32i.n a3, a5, 0 +40202a4e: 06e377 bbsi a3, 7, 40202a58 +40202a51: 2037c5 call0 40222dd0 +40202a54: 0000c6 j 40202a5b +40202a57: a02200 addx4 a2, a2, a0 +40202a5a: 6c2200 excw +40202a5d: 45c507 bnall a5, a0, 40202aa6 +40202a60: 728c03 excw +40202a63: 0c2d mov.n a2, a12 +40202a65: 1f2305 call0 40221c98 +40202a68: 0003c6 j 40202a7b +40202a6b: 030c00 excw +40202a6e: 8c39 s32i.n a3, a12, 32 +40202a70: 742e32 l32i a3, a14, 0x1d0 +40202a73: 03c9 s32i.n a12, a3, 0 +40202a75: 20ccc2 addi a12, a12, 32 +40202a78: 746ec2 s32i a12, a14, 0x1d0 +40202a7b: 132102 l32i a0, a1, 76 +40202a7e: 1221c2 l32i a12, a1, 72 +40202a81: 1121d2 l32i a13, a1, 68 +40202a84: 1021e2 l32i a14, a1, 64 +40202a87: f1f8 l32i.n a15, a1, 60 +40202a89: 50c112 addi a1, a1, 80 +40202a8c: f00d ret.n + ... + +40202a90 : +40202a90: fc3551 l32r a5, 40201b64 +40202a93: f0c112 addi a1, a1, -16 +40202a96: 3109 s32i.n a0, a1, 12 +40202a98: 21c9 s32i.n a12, a1, 8 +40202a9a: 11d9 s32i.n a13, a1, 4 +40202a9c: 01d552 addmi a5, a5, 0x100 +40202a9f: fd0542 l8ui a4, a5, 253 +40202aa2: fc05c2 l8ui a12, a5, 252 +40202aa5: c0c4c0 sub a12, a4, a12 +40202aa8: 088ce6 bgei a12, 8, 40202ab4 +40202aab: cc1b addi.n a12, a12, 1 +40202aad: 231ca6 blti a12, 1, 40202ad4 +40202ab0: 000086 j 40202ab6 +40202ab3: 8c0c00 excw +40202ab6: 140c movi.n a4, 1 +40202ab8: 004242 s8i a4, a2, 0 +40202abb: 0142c2 s8i a12, a2, 1 +40202abe: d22b addi.n a13, a2, 2 +40202ac0: fc0522 l8ui a2, a5, 252 +40202ac3: 331b addi.n a3, a3, 1 +40202ac5: 332a add.n a3, a3, a2 +40202ac7: 0c4d mov.n a4, a12 +40202ac9: 202dd0 or a2, a13, a13 +40202acc: f95201 l32r a0, 40201014 <_irom0_text_start+0x4> +40202acf: 0000c0 callx0 a0 +40202ad2: 2dca add.n a2, a13, a12 +40202ad4: 3108 l32i.n a0, a1, 12 +40202ad6: 21c8 l32i.n a12, a1, 8 +40202ad8: 11d8 l32i.n a13, a1, 4 +40202ada: 10c112 addi a1, a1, 16 +40202add: f00d ret.n + ... + +40202ae0 : +40202ae0: fc2151 l32r a5, 40201b64 +40202ae3: f0c112 addi a1, a1, -16 +40202ae6: 3109 s32i.n a0, a1, 12 +40202ae8: 21c9 s32i.n a12, a1, 8 +40202aea: 11d9 s32i.n a13, a1, 4 +40202aec: 01d552 addmi a5, a5, 0x100 +40202aef: fd0542 l8ui a4, a5, 253 +40202af2: fc05c2 l8ui a12, a5, 252 +40202af5: c0c4c0 sub a12, a4, a12 +40202af8: 208ca6 blti a12, 8, 40202b1c +40202afb: f9ccc2 addi a12, a12, -7 +40202afe: 243c movi.n a4, 50 +40202b00: 004242 s8i a4, a2, 0 +40202b03: 0142c2 s8i a12, a2, 1 +40202b06: d22b addi.n a13, a2, 2 +40202b08: fc0522 l8ui a2, a5, 252 +40202b0b: 0c4d mov.n a4, a12 +40202b0d: 332a add.n a3, a3, a2 +40202b0f: 339b addi.n a3, a3, 9 +40202b11: 202dd0 or a2, a13, a13 +40202b14: f94001 l32r a0, 40201014 <_irom0_text_start+0x4> +40202b17: 0000c0 callx0 a0 +40202b1a: 2dca add.n a2, a13, a12 +40202b1c: 3108 l32i.n a0, a1, 12 +40202b1e: 21c8 l32i.n a12, a1, 8 +40202b20: 11d8 l32i.n a13, a1, 4 +40202b22: 10c112 addi a1, a1, 16 +40202b25: f00d ret.n +40202b27: ffa000 excw +40202b2a: 504022 s8i a2, a0, 80 +40202b2d: df .byte 0xdf +40202b2e: fe .byte 0xfe +40202b2f: 3f .byte 0x3f + +40202b30 : +40202b30: a0c112 addi a1, a1, -96 +40202b33: 1661c2 s32i a12, a1, 88 +40202b36: fc0bc1 l32r a12, 40201b64 +40202b39: 600122 l8ui a2, a1, 96 +40202b3c: a149 s32i.n a4, a1, 40 +40202b3e: 4c48 l32i.n a4, a12, 16 +40202b40: 1461e2 s32i a14, a1, 80 +40202b43: 1361f2 s32i a15, a1, 76 +40202b46: 176102 s32i a0, a1, 92 +40202b49: 1561d2 s32i a13, a1, 84 +40202b4c: c129 s32i.n a2, a1, 48 +40202b4e: 01dc22 addmi a2, a12, 0x100 +40202b51: b159 s32i.n a5, a1, 44 +40202b53: 8149 s32i.n a4, a1, 32 +40202b55: fc0252 l8ui a5, a2, 252 +40202b58: fd0242 l8ui a4, a2, 253 +40202b5b: 06fd mov.n a15, a6 +40202b5d: 9139 s32i.n a3, a1, 36 +40202b5f: c06450 sub a6, a4, a5 +40202b62: 74e070 extui a14, a7, 0, 8 +40202b65: 0876e6 bgei a6, 7, 40202b71 +40202b68: 25c622 addi a2, a6, 37 +40202b6b: 030c movi.n a3, 0 +40202b6d: 0003c6 j 40202b80 +40202b70: c22c00 excw +40202b73: 030c movi.n a3, 0 +40202b75: 077626 beqi a6, 7, 40202b80 +40202b78: c02450 sub a2, a4, a5 +40202b7b: fbc232 addi a3, a2, -5 +40202b7e: c22c movi.n a2, 44 +40202b80: 4f2c42 l32i a4, a12, 0x13c +40202b83: 232a add.n a2, a3, a2 +40202b85: 030c movi.n a3, 0 +40202b87: 021437 beq a4, a3, 40202b8d +40202b8a: 001432 l16ui a3, a4, 0 +40202b8d: 542c42 l32i a4, a12, 0x150 +40202b90: 232a add.n a2, a3, a2 +40202b92: 030c movi.n a3, 0 +40202b94: 021437 beq a4, a3, 40202b9a +40202b97: 001432 l16ui a3, a4, 0 +40202b9a: 332a add.n a3, a3, a2 +40202b9c: 562c22 l32i a2, a12, 0x158 +40202b9f: 0d0c movi.n a13, 0 +40202ba1: b41c movi.n a4, 27 +40202ba3: 834d20 moveqz a4, a13, a2 +40202ba6: 243a add.n a2, a4, a3 +40202ba8: 5a2c32 l32i a3, a12, 0x168 +40202bab: 0b13d7 beq a3, a13, 40202bba +40202bae: 012342 l32i a4, a3, 4 +40202bb1: 0514d7 beq a4, a13, 40202bba +40202bb4: 0803d2 l8ui a13, a3, 8 +40202bb7: 0acdd2 addi a13, a13, 10 +40202bba: dd2a add.n a13, a13, a2 +40202bbc: 782c22 l32i a2, a12, 0x1e0 +40202bbf: b28c beqz.n a2, 40202bce +40202bc1: 0228 l32i.n a2, a2, 0 +40202bc3: 728c beqz.n a2, 40202bce +40202bc5: 0002c0 callx0 a2 +40202bc8: 0ba042 movi a4, 11 +40202bcb: 011226 beqi a2, 1, 40202bd0 +40202bce: 040c movi.n a4, 0 +40202bd0: 8044d0 add a4, a4, a13 +40202bd3: 18a032 movi a3, 24 +40202bd6: 10c122 addi a2, a1, 16 +40202bd9: 034e05 call0 402060bc +40202bdc: 20d220 or a13, a2, a2 +40202bdf: 72dc bnez.n a2, 40202bfa +40202be1: 4f2c22 l32i a2, a12, 0x13c +40202be4: 030c movi.n a3, 0 +40202be6: 021237 beq a2, a3, 40202bec +40202be9: 001232 l16ui a3, a2, 0 +40202bec: ffcf21 l32r a2, 40202b28 +40202bef: fd1701 l32r a0, 4020204c +40202bf2: 0000c0 callx0 a0 +40202bf5: 120c movi.n a2, 1 +40202bf7: 005b46 j 40202d68 +40202bfa: 821c movi.n a2, 24 +40202bfc: 0a5d22 s16i a2, a13, 20 +40202bff: 4128 l32i.n a2, a1, 16 +40202c01: 030c movi.n a3, 0 +40202c03: 004232 s8i a3, a2, 0 +40202c06: 0142e2 s8i a14, a2, 1 +40202c09: 522b addi.n a5, a2, 2 +40202c0b: ee8c beqz.n a14, 40202c1d +40202c0d: 052d mov.n a2, a5 +40202c0f: 0e4d mov.n a4, a14 +40202c11: 0f3d mov.n a3, a15 +40202c13: d159 s32i.n a5, a1, 52 +40202c15: f8ff01 l32r a0, 40201014 <_irom0_text_start+0x4> +40202c18: 0000c0 callx0 a0 +40202c1b: d158 l32i.n a5, a1, 52 +40202c1d: ffc3f1 l32r a15, 40202b2c +40202c20: 25ea add.n a2, a5, a14 +40202c22: 0f3d mov.n a3, a15 +40202c24: 4129 s32i.n a2, a1, 16 +40202c26: ffe685 call0 40202a90 +40202c29: 0f3d mov.n a3, a15 +40202c2b: 4129 s32i.n a2, a1, 16 +40202c2d: ffeb05 call0 40202ae0 +40202c30: 4f2c32 l32i a3, a12, 0x13c +40202c33: 4129 s32i.n a2, a1, 16 +40202c35: 004316 beqz a3, 40202c3d +40202c38: ff6fc5 call0 40202338 +40202c3b: 4129 s32i.n a2, a1, 16 +40202c3d: 542c32 l32i a3, a12, 0x150 +40202c40: 538c beqz.n a3, 40202c49 +40202c42: 4128 l32i.n a2, a1, 16 +40202c44: ff6f05 call0 40202338 +40202c47: 4129 s32i.n a2, a1, 16 +40202c49: 562c22 l32i a2, a12, 0x158 +40202c4c: 528c beqz.n a2, 40202c55 +40202c4e: 4128 l32i.n a2, a1, 16 +40202c50: 02f105 call0 40205b64 +40202c53: 4129 s32i.n a2, a1, 16 +40202c55: 5a2c32 l32i a3, a12, 0x168 +40202c58: 139c beqz.n a3, 40202c6d +40202c5a: 1348 l32i.n a4, a3, 4 +40202c5c: d48c beqz.n a4, 40202c6d +40202c5e: 080352 l8ui a5, a3, 8 +40202c61: 042122 l32i a2, a1, 16 +40202c64: 01c332 addi a3, a3, 1 +40202c67: 055a85 call0 40208210 +40202c6a: 046122 s32i a2, a1, 16 +40202c6d: 782c22 l32i a2, a12, 0x1e0 +40202c70: 01e216 beqz a2, 40202c92 +40202c73: 002222 l32i a2, a2, 0 +40202c76: 018216 beqz a2, 40202c92 +40202c79: 0002c0 callx0 a2 +40202c7c: 121266 bnei a2, 1, 40202c92 +40202c7f: 030c movi.n a3, 0 +40202c81: 4128 l32i.n a2, a1, 16 +40202c83: 0139 s32i.n a3, a1, 0 +40202c85: 037d mov.n a7, a3 +40202c87: 160c movi.n a6, 1 +40202c89: 035d mov.n a5, a3 +40202c8b: 034d mov.n a4, a3 +40202c8d: 0548c5 call0 4020811c +40202c90: 4129 s32i.n a2, a1, 16 +40202c92: 1d48 l32i.n a4, a13, 4 +40202c94: 0a1d32 l16ui a3, a13, 20 +40202c97: 1428 l32i.n a2, a4, 4 +40202c99: 4158 l32i.n a5, a1, 16 +40202c9b: 223a add.n a2, a2, a3 +40202c9d: c05520 sub a5, a5, a2 +40202ca0: f42050 extui a2, a5, 0, 16 +40202ca3: 0b5d22 s16i a2, a13, 22 +40202ca6: 0020c0 memw +40202ca9: 0468 l32i.n a6, a4, 0 +40202cab: fdb251 l32r a5, 40202374 +40202cae: 232a add.n a2, a3, a2 +40202cb0: 205650 or a5, a6, a5 +40202cb3: 0020c0 memw +40202cb6: 0459 s32i.n a5, a4, 0 +40202cb8: 0020c0 memw +40202cbb: 0468 l32i.n a6, a4, 0 +40202cbd: fdae51 l32r a5, 40202378 +40202cc0: b42020 extui a2, a2, 0, 12 +40202cc3: 205650 or a5, a6, a5 +40202cc6: 0020c0 memw +40202cc9: 0459 s32i.n a5, a4, 0 +40202ccb: 0020c0 memw +40202cce: 0468 l32i.n a6, a4, 0 +40202cd0: fdab51 l32r a5, 4020237c +40202cd3: 113240 slli a3, a2, 12 +40202cd6: 105650 and a5, a6, a5 +40202cd9: 0020c0 memw +40202cdc: 0459 s32i.n a5, a4, 0 +40202cde: 0020c0 memw +40202ce1: 0458 l32i.n a5, a4, 0 +40202ce3: fda721 l32r a2, 40202380 +40202ce6: 102520 and a2, a5, a2 +40202ce9: 202230 or a2, a2, a3 +40202cec: 0020c0 memw +40202cef: 0429 s32i.n a2, a4, 0 +40202cf1: b128 l32i.n a2, a1, 44 +40202cf3: a178 l32i.n a7, a1, 40 +40202cf5: 0129 s32i.n a2, a1, 0 +40202cf7: 9168 l32i.n a6, a1, 36 +40202cf9: 8128 l32i.n a2, a1, 32 +40202cfb: 051c movi.n a5, 16 +40202cfd: 044c movi.n a4, 64 +40202cff: 0d3d mov.n a3, a13 +40202d01: ffa905 call0 40202794 +40202d04: 9d38 l32i.n a3, a13, 36 +40202d06: fd9951 l32r a5, 4020236c +40202d09: 0348 l32i.n a4, a3, 0 +40202d0b: 1378 l32i.n a7, a3, 4 +40202d0d: 416640 srli a6, a4, 6 +40202d10: 021c movi.n a2, 16 +40202d12: 105750 and a5, a7, a5 +40202d15: 202620 or a2, a6, a2 +40202d18: 077c movi.n a7, -16 +40202d1a: 1122a0 slli a2, a2, 6 +40202d1d: 107570 and a7, a5, a7 +40202d20: 544040 extui a4, a4, 0, 6 +40202d23: 750c movi.n a5, 7 +40202d25: 204420 or a4, a4, a2 +40202d28: 205750 or a5, a7, a5 +40202d2b: fd9121 l32r a2, 40202370 +40202d2e: 1359 s32i.n a5, a3, 4 +40202d30: 0020c0 memw +40202d33: 0228 l32i.n a2, a2, 0 +40202d35: c57c movi.n a5, -4 +40202d37: 0349 s32i.n a4, a3, 0 +40202d39: 104450 and a4, a4, a5 +40202d3c: 6329 s32i.n a2, a3, 24 +40202d3e: 0349 s32i.n a4, a3, 0 +40202d40: 020c movi.n a2, 0 +40202d42: 02e617 bbsi a6, 1, 40202d48 +40202d45: 200885 call0 40222dd0 +40202d48: 076d22 s32i a2, a13, 28 +40202d4b: 7d0c22 l8ui a2, a12, 125 +40202d4e: 092d32 l32i a3, a13, 36 +40202d51: 0c2142 l32i a4, a1, 48 +40202d54: 084322 s8i a2, a3, 8 +40202d57: 120c movi.n a2, 1 +40202d59: 401400 ssl a4 +40202d5c: a12200 sll a2, a2 +40202d5f: 4329 s32i.n a2, a3, 16 +40202d61: 0d2d mov.n a2, a13 +40202d63: 1ef345 call0 40221c98 +40202d66: 020c movi.n a2, 0 +40202d68: 172102 l32i a0, a1, 92 +40202d6b: 1621c2 l32i a12, a1, 88 +40202d6e: 1521d2 l32i a13, a1, 84 +40202d71: 1421e2 l32i a14, a1, 80 +40202d74: 1321f2 l32i a15, a1, 76 +40202d77: 60c112 addi a1, a1, 96 +40202d7a: f00d ret.n + +40202d7c : +40202d7c: 026d mov.n a6, a2 +40202d7e: fb7921 l32r a2, 40201b64 +40202d81: 5258 l32i.n a5, a2, 20 +40202d83: 020c movi.n a2, 0 +40202d85: 322532 l32i a3, a5, 200 +40202d88: 430b addi.n a4, a3, -1 +40202d8a: 130c movi.n a3, 1 +40202d8c: 933240 movnez a3, a2, a4 +40202d8f: f42030 extui a2, a3, 0, 16 +40202d92: 142532 l32i a3, a5, 80 +40202d95: 056347 bbci a3, 4, 40202d9e +40202d98: 10a042 movi a4, 16 +40202d9b: 202240 or a2, a2, a4 +40202d9e: 0648 l32i.n a4, a6, 0 +40202da0: 087327 bbci a3, 18, 40202dac +40202da3: 056477 bbci a4, 7, 40202dac +40202da6: 20a052 movi a5, 32 +40202da9: 202250 or a2, a2, a5 +40202dac: 0563a7 bbci a3, 10, 40202db5 +40202daf: 00a452 movi a5, 0x400 +40202db2: 202250 or a2, a2, a5 +40202db5: 086487 bbci a4, 8, 40202dc1 +40202db8: 0573e7 bbci a3, 30, 40202dc1 +40202dbb: 00a132 movi a3, 0x100 +40202dbe: 202230 or a2, a2, a3 +40202dc1: f00d ret.n +40202dc3: 801000 add a1, a0, a0 +40202dc6: ff .byte 0xff +40202dc7: ff .byte 0xff +40202dc8: fee140 excw +40202dcb: 3f .byte 0x3f +40202dcc: 8858 l32i.n a5, a8, 32 +40202dce: fe .byte 0xfe +40202dcf: 3f .byte 0x3f +40202dd0: fee124 excw +40202dd3: 3f .byte 0x3f +40202dd4: fee424 excw +40202dd7: 3f .byte 0x3f + +40202dd8 : +40202dd8: c0c112 addi a1, a1, -64 +40202ddb: b1f9 s32i.n a15, a1, 44 +40202ddd: 2422f2 l32i a15, a2, 144 +40202de0: d1d9 s32i.n a13, a1, 52 +40202de2: c1e9 s32i.n a14, a1, 48 +40202de4: f109 s32i.n a0, a1, 60 +40202de6: e1c9 s32i.n a12, a1, 56 +40202de8: 4139 s32i.n a3, a1, 16 +40202dea: 02ed mov.n a14, a2 +40202dec: 04dd mov.n a13, a4 +40202dee: 120c movi.n a2, 1 +40202df0: 546f16 beqz a15, 4020333a +40202df3: 023c movi.n a2, 48 +40202df5: 029327 bne a3, a2, 40202dfb +40202df8: 00e386 j 4020318a +40202dfb: 112237 blt a2, a3, 40202e10 +40202dfe: 02b366 bnei a3, 16, 40202e04 +40202e01: 00e146 j 4020318a +40202e04: 02c366 bnei a3, 32, 40202e0a +40202e07: 005886 j 40202f6d +40202e0a: 15f316 beqz a3, 40202f6d +40202e0d: 0149c6 j 40203338 +40202e10: 4138 l32i.n a3, a1, 16 +40202e12: b0a022 movi a2, 176 +40202e15: 141327 beq a3, a2, 40202e2d +40202e18: c0a022 movi a2, 192 +40202e1b: 029327 bne a3, a2, 40202e21 +40202e1e: 004586 j 40202f38 +40202e21: a0a022 movi a2, 160 +40202e24: 029327 bne a3, a2, 40202e2a +40202e27: 011f86 j 402032a9 +40202e2a: 014286 j 40203338 +40202e2d: f43040 extui a3, a4, 0, 16 +40202e30: 316040 srai a6, a4, 16 +40202e33: fec322 addi a2, a3, -2 +40202e36: 040c movi.n a4, 0 +40202e38: 045d mov.n a5, a4 +40202e3a: 0722f6 bgeui a2, 2, 40202e45 +40202e3d: 172e22 l32i a2, a14, 92 +40202e40: 150c movi.n a5, 1 +40202e42: 835420 moveqz a5, a4, a2 +40202e45: 052d mov.n a2, a5 +40202e47: 1d33e6 bgei a3, 3, 40202e68 +40202e4a: a5dc bnez.n a5, 40202e68 +40202e4c: 070c movi.n a7, 0 +40202e4e: 181366 bnei a3, 1, 40202e6a +40202e51: fb4431 l32r a3, 40201b64 +40202e54: 040c movi.n a4, 0 +40202e56: 02d332 addmi a3, a3, 0x200 +40202e59: 3c0372 l8ui a7, a3, 60 +40202e5c: fec732 addi a3, a7, -2 +40202e5f: 170c movi.n a7, 1 +40202e61: 937430 movnez a7, a4, a3 +40202e64: 000086 j 40202e6a +40202e67: 170c00 excw +40202e6a: 01a032 movi a3, 1 +40202e6d: 00a052 movi a5, 0 +40202e70: 835360 moveqz a5, a3, a6 +40202e73: 105250 and a5, a2, a5 +40202e76: 88a042 movi a4, 136 +40202e79: 620c movi.n a2, 6 +40202e7b: 834250 moveqz a4, a2, a5 +40202e7e: c31c movi.n a3, 28 +40202e80: 821c movi.n a2, 24 +40202e82: 833250 moveqz a3, a2, a5 +40202e85: 012d mov.n a2, a1 +40202e87: 7159 s32i.n a5, a1, 28 +40202e89: 6169 s32i.n a6, a1, 24 +40202e8b: 056172 s32i a7, a1, 20 +40202e8e: 0322c5 call0 402060bc +40202e91: 02cd mov.n a12, a2 +40202e93: 7158 l32i.n a5, a1, 28 +40202e95: 6168 l32i.n a6, a1, 24 +40202e97: 5178 l32i.n a7, a1, 20 +40202e99: 49b216 beqz a2, 40203338 +40202e9c: 821c movi.n a2, 24 +40202e9e: 0a5c22 s16i a2, a12, 20 +40202ea1: 0128 l32i.n a2, a1, 0 +40202ea3: 005272 s16i a7, a2, 0 +40202ea6: 0152d2 s16i a13, a2, 2 +40202ea9: 025262 s16i a6, a2, 4 +40202eac: 082516 beqz a5, 40202f32 +40202eaf: ffc541 l32r a4, 40202dc4 +40202eb2: 172e32 l32i a3, a14, 92 +40202eb5: 035242 s16i a4, a2, 6 +40202eb8: 80a042 movi a4, 128 +40202ebb: 228b addi.n a2, a2, 8 +40202ebd: f85501 l32r a0, 40201014 <_irom0_text_start+0x4> +40202ec0: 0000c0 callx0 a0 +40202ec3: 1c38 l32i.n a3, a12, 4 +40202ec5: 88a022 movi a2, 136 +40202ec8: 0b5c22 s16i a2, a12, 22 +40202ecb: 1328 l32i.n a2, a3, 4 +40202ecd: 1cc222 addi a2, a2, 28 +40202ed0: 1329 s32i.n a2, a3, 4 +40202ed2: 0c3d mov.n a3, a12 +40202ed4: 0e2d mov.n a2, a14 +40202ed6: ff3845 call0 4020225c +40202ed9: 1c48 l32i.n a4, a12, 4 +40202edb: 1438 l32i.n a3, a4, 4 +40202edd: e8c332 addi a3, a3, -24 +40202ee0: 1439 s32i.n a3, a4, 4 +40202ee2: 4c39 s32i.n a3, a12, 16 +40202ee4: 9c38 l32i.n a3, a12, 36 +40202ee6: b2bc beqz.n a2, 40202f25 +40202ee8: 0358 l32i.n a5, a3, 0 +40202eea: 044c movi.n a4, 64 +40202eec: 204540 or a4, a5, a4 +40202eef: 0349 s32i.n a4, a3, 0 +40202ef1: fb1c41 l32r a4, 40201b64 +40202ef4: 001252 l16ui a5, a2, 0 +40202ef7: 5448 l32i.n a4, a4, 20 +40202ef9: 0b9e47 bne a14, a4, 40202f08 +40202efc: 80af42 movi a4, -128 +40202eff: 204540 or a4, a5, a4 +40202f02: 0c4342 s8i a4, a3, 12 +40202f05: 000086 j 40202f0b +40202f08: 0c4352 s8i a5, a3, 12 +40202f0b: 252222 l32i a2, a2, 148 +40202f0e: 3358 l32i.n a5, a3, 12 +40202f10: 000222 l8ui a2, a2, 0 +40202f13: 342020 extui a2, a2, 0, 4 +40202f16: 114280 slli a4, a2, 8 +40202f19: fd1321 l32r a2, 40202368 +40202f1c: 102520 and a2, a5, a2 +40202f1f: 202240 or a2, a2, a4 +40202f22: 0001c6 j 40202f2d +40202f25: 3348 l32i.n a4, a3, 12 +40202f27: fd1021 l32r a2, 40202368 +40202f2a: 102420 and a2, a4, a2 +40202f2d: 3329 s32i.n a2, a3, 12 +40202f2f: 00e546 j 402032c8 +40202f32: 620c movi.n a2, 6 +40202f34: 00e346 j 402032c5 +40202f37: a04200 addx4 a4, a2, a0 +40202f3a: a03202 excw +40202f3d: 1018 l32i.n a1, a0, 4 +40202f3f: 852021 l32r a2, 401e43c0 <_lit4_end+0xde094> +40202f42: cd0317 bnone a3, a1, 40202f13 +40202f45: e21602 l16ui a0, a6, 0x1c4 +40202f48: 3e .byte 0x3e +40202f49: 821c movi.n a2, 24 +40202f4b: 0a5c22 s16i a2, a12, 20 +40202f4e: 0128 l32i.n a2, a1, 0 +40202f50: 0052d2 s16i a13, a2, 0 +40202f53: 220c movi.n a2, 2 +40202f55: 0b5c22 s16i a2, a12, 22 +40202f58: 262e22 l32i a2, a14, 152 +40202f5b: 029f27 bne a15, a2, 40202f61 +40202f5e: 00d986 j 402032c8 +40202f61: 2f38 l32i.n a3, a15, 8 +40202f63: e27c movi.n a2, -2 +40202f65: 102320 and a2, a3, a2 +40202f68: 2f29 s32i.n a2, a15, 8 +40202f6a: 00d686 j 402032c8 +40202f6d: fafdd1 l32r a13, 40201b64 +40202f70: 01dd22 addmi a2, a13, 0x100 +40202f73: fd0242 l8ui a4, a2, 253 +40202f76: fc0232 l8ui a3, a2, 252 +40202f79: c06430 sub a6, a4, a3 +40202f7c: 0876e6 bgei a6, 7, 40202f88 +40202f7f: 2fc622 addi a2, a6, 47 +40202f82: 050c movi.n a5, 0 +40202f84: 000346 j 40202f95 +40202f87: 623c00 excw +40202f8a: 050c movi.n a5, 0 +40202f8c: 057626 beqi a6, 7, 40202f95 +40202f8f: c04430 sub a4, a4, a3 +40202f92: fbc452 addi a5, a4, -5 +40202f95: 552a add.n a5, a5, a2 +40202f97: 522d22 l32i a2, a13, 0x148 +40202f9a: 030c movi.n a3, 0 +40202f9c: 021237 beq a2, a3, 40202fa2 +40202f9f: 001232 l16ui a3, a2, 0 +40202fa2: 532d42 l32i a4, a13, 0x14c +40202fa5: 020c movi.n a2, 0 +40202fa7: 65c552 addi a5, a5, 101 +40202faa: 021427 beq a4, a2, 40202fb0 +40202fad: 001422 l16ui a2, a4, 0 +40202fb0: 502d42 l32i a4, a13, 0x140 +40202fb3: 335a add.n a3, a3, a5 +40202fb5: 050c movi.n a5, 0 +40202fb7: 021457 beq a4, a5, 40202fbd +40202fba: 001452 l16ui a5, a4, 0 +40202fbd: 323a add.n a3, a2, a3 +40202fbf: 552d22 l32i a2, a13, 0x154 +40202fc2: 040c movi.n a4, 0 +40202fc4: 021247 beq a2, a4, 40202fca +40202fc7: 001242 l16ui a4, a2, 0 +40202fca: 253a add.n a2, a5, a3 +40202fcc: 5c2d52 l32i a5, a13, 0x170 +40202fcf: 030c movi.n a3, 0 +40202fd1: 091537 beq a5, a3, 40202fde +40202fd4: 1568 l32i.n a6, a5, 4 +40202fd6: 041637 beq a6, a3, 40202fde +40202fd9: 080532 l8ui a3, a5, 8 +40202fdc: 33ab addi.n a3, a3, 10 +40202fde: 804240 add a4, a2, a4 +40202fe1: 804430 add a4, a4, a3 +40202fe4: 202110 or a2, a1, a1 +40202fe7: 831c movi.n a3, 24 +40202fe9: 030d05 call0 402060bc +40202fec: 02cd mov.n a12, a2 +40202fee: 346216 beqz a2, 40203338 +40202ff1: 821c movi.n a2, 24 +40202ff3: 0a5c22 s16i a2, a12, 20 +40202ff6: 02dd22 addmi a2, a13, 0x200 +40202ff9: 3e0242 l8ui a4, a2, 62 +40202ffc: 130c movi.n a3, 1 +40202ffe: 121c movi.n a2, 17 +40203000: 933240 movnez a3, a2, a4 +40203003: 7d48 l32i.n a4, a13, 28 +40203005: 262f22 l32i a2, a15, 152 +40203008: 097427 bbci a4, 18, 40203015 +4020300b: 0248 l32i.n a4, a2, 0 +4020300d: 046477 bbci a4, 7, 40203015 +40203010: 042c movi.n a4, 32 +40203012: 203340 or a3, a3, a4 +40203015: 0228 l32i.n a2, a2, 0 +40203017: c0a042 movi a4, 192 +4020301a: 105240 and a5, a2, a4 +4020301d: 081547 beq a5, a4, 40203029 +40203020: 80a442 movi a4, 0x480 +40203023: 102240 and a2, a2, a4 +40203026: 0a9247 bne a2, a4, 40203034 +40203029: 8d28 l32i.n a2, a13, 32 +4020302b: 0562e7 bbci a2, 14, 40203034 +4020302e: 00a422 movi a2, 0x400 +40203031: 203320 or a3, a3, a2 +40203034: 0128 l32i.n a2, a1, 0 +40203036: 005232 s16i a3, a2, 0 +40203039: 0e1f32 l16ui a3, a15, 28 +4020303c: 015232 s16i a3, a2, 2 +4020303f: 224b addi.n a2, a2, 4 +40203041: 4138 l32i.n a3, a1, 16 +40203043: 0129 s32i.n a2, a1, 0 +40203045: 11c366 bnei a3, 32, 4020305a +40203048: 640c movi.n a4, 6 +4020304a: 0f3d mov.n a3, a15 +4020304c: f7f201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020304f: 0000c0 callx0 a0 +40203052: 0128 l32i.n a2, a1, 0 +40203054: 06c222 addi a2, a2, 6 +40203057: 006122 s32i a2, a1, 0 +4020305a: 002122 l32i a2, a1, 0 +4020305d: 862d52 l32i a5, a13, 0x218 +40203060: 00a032 movi a3, 0 +40203063: 004232 s8i a3, a2, 0 +40203066: 014252 s8i a5, a2, 1 +40203069: 622b addi.n a6, a2, 2 +4020306b: 459c beqz.n a5, 40203083 +4020306d: ff5631 l32r a3, 40202dc8 +40203070: 054d mov.n a4, a5 +40203072: 062d mov.n a2, a6 +40203074: 7159 s32i.n a5, a1, 28 +40203076: 066162 s32i a6, a1, 24 +40203079: f7e601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020307c: 0000c0 callx0 a0 +4020307f: 6168 l32i.n a6, a1, 24 +40203081: 7158 l32i.n a5, a1, 28 +40203083: feaa31 l32r a3, 40202b2c +40203086: 265a add.n a2, a6, a5 +40203088: 0129 s32i.n a2, a1, 0 +4020308a: ffa045 call0 40202a90 +4020308d: 026d mov.n a6, a2 +4020308f: 0129 s32i.n a2, a1, 0 +40203091: 05dd22 addmi a2, a13, 0x500 +40203094: 1f2232 l32i a3, a2, 124 +40203097: 539c beqz.n a3, 402030b0 +40203099: ff4e21 l32r a2, 40202dd4 +4020309c: 202222 l32i a2, a2, 128 +4020309f: 0d1266 bnei a2, 1, 402030b0 +402030a2: 552d32 l32i a3, a13, 0x154 +402030a5: 738c beqz.n a3, 402030b0 +402030a7: 062d mov.n a2, a6 +402030a9: ff28c5 call0 40202338 +402030ac: 001bc6 j 4020311f +402030af: 484100 excw +402030b2: ff .byte 0xff +402030b3: 3d0432 l8ui a3, a4, 61 +402030b6: fcc322 addi a2, a3, -4 +402030b9: 742020 extui a2, a2, 0, 8 +402030bc: 0222b6 bltui a2, 2, 402030c2 +402030bf: 257366 bnei a3, 7, 402030e8 +402030c2: 532d52 l32i a5, a13, 0x14c +402030c5: f59c beqz.n a5, 402030e8 +402030c7: 030542 l8ui a4, a5, 3 +402030ca: 352b addi.n a3, a5, 2 +402030cc: 062d mov.n a2, a6 +402030ce: 442b addi.n a4, a4, 2 +402030d0: 7159 s32i.n a5, a1, 28 +402030d2: 6169 s32i.n a6, a1, 24 +402030d4: f7d001 l32r a0, 40201014 <_irom0_text_start+0x4> +402030d7: 0000c0 callx0 a0 +402030da: 7158 l32i.n a5, a1, 28 +402030dc: 6168 l32i.n a6, a1, 24 +402030de: 030522 l8ui a2, a5, 3 +402030e1: 222b addi.n a2, a2, 2 +402030e3: 802620 add a2, a6, a2 +402030e6: 0129 s32i.n a2, a1, 0 +402030e8: ff3a21 l32r a2, 40202dd0 +402030eb: 3d0232 l8ui a3, a2, 61 +402030ee: fec322 addi a2, a3, -2 +402030f1: 742020 extui a2, a2, 0, 8 +402030f4: 0222b6 bltui a2, 2, 402030fa +402030f7: 266366 bnei a3, 6, 40203121 +402030fa: 522d52 l32i a5, a13, 0x148 +402030fd: 05ac beqz.n a5, 40203121 +402030ff: 030542 l8ui a4, a5, 3 +40203102: 0168 l32i.n a6, a1, 0 +40203104: 352b addi.n a3, a5, 2 +40203106: 062d mov.n a2, a6 +40203108: 442b addi.n a4, a4, 2 +4020310a: 7159 s32i.n a5, a1, 28 +4020310c: 6169 s32i.n a6, a1, 24 +4020310e: f7c101 l32r a0, 40201014 <_irom0_text_start+0x4> +40203111: 0000c0 callx0 a0 +40203114: 7158 l32i.n a5, a1, 28 +40203116: 6168 l32i.n a6, a1, 24 +40203118: 030522 l8ui a2, a5, 3 +4020311b: 222b addi.n a2, a2, 2 +4020311d: 262a add.n a2, a6, a2 +4020311f: 0129 s32i.n a2, a1, 0 +40203121: fe8231 l32r a3, 40202b2c +40203124: 002122 l32i a2, a1, 0 +40203127: ff9b85 call0 40202ae0 +4020312a: ff2a41 l32r a4, 40202dd4 +4020312d: 006122 s32i a2, a1, 0 +40203130: 102432 l32i a3, a4, 64 +40203133: 0f7337 bbci a3, 19, 40203146 +40203136: 142e32 l32i a3, a14, 80 +40203139: c0a042 movi a4, 192 +4020313c: 060437 bnone a4, a3, 40203146 +4020313f: 0e3d mov.n a3, a14 +40203141: 05a185 call0 40208b5c +40203144: 0129 s32i.n a2, a1, 0 +40203146: 0158 l32i.n a5, a1, 0 +40203148: ff2131 l32r a3, 40202dcc +4020314b: 940c movi.n a4, 9 +4020314d: 052d mov.n a2, a5 +4020314f: 7159 s32i.n a5, a1, 28 +40203151: f7b001 l32r a0, 40201014 <_irom0_text_start+0x4> +40203154: 0000c0 callx0 a0 +40203157: 7158 l32i.n a5, a1, 28 +40203159: ff1e41 l32r a4, 40202dd4 +4020315c: 259b addi.n a2, a5, 9 +4020315e: 102432 l32i a3, a4, 64 +40203161: 0129 s32i.n a2, a1, 0 +40203163: 1173c7 bbci a3, 28, 40203178 +40203166: 142e32 l32i a3, a14, 80 +40203169: c0a042 movi a4, 192 +4020316c: 080437 bnone a4, a3, 40203178 +4020316f: 203ee0 or a3, a14, a14 +40203172: 05a045 call0 40208b78 +40203175: 006122 s32i a2, a1, 0 +40203178: 502d32 l32i a3, a13, 0x140 +4020317b: 538c beqz.n a3, 40203184 +4020317d: 0128 l32i.n a2, a1, 0 +4020317f: ff1b85 call0 40202338 +40203182: 0129 s32i.n a2, a1, 0 +40203184: 5c2d32 l32i a3, a13, 0x170 +40203187: 003ec6 j 40203286 +4020318a: fa7621 l32r a2, 40201b64 +4020318d: 01d242 addmi a4, a2, 0x100 +40203190: fd0432 l8ui a3, a4, 253 +40203193: fc0452 l8ui a5, a4, 252 +40203196: c06350 sub a6, a3, a5 +40203199: 0876e6 bgei a6, 7, 402031a5 +4020319c: 269b addi.n a2, a6, 9 +4020319e: 040c movi.n a4, 0 +402031a0: 000406 j 402031b4 +402031a3: 1c0000 excw +402031a6: 040c02 l8ui a0, a12, 4 +402031a9: 077626 beqi a6, 7, 402031b4 +402031ac: c02350 sub a2, a3, a5 +402031af: fbc242 addi a4, a2, -5 +402031b2: 021c movi.n a2, 16 +402031b4: 242a add.n a2, a4, a2 +402031b6: fa6b41 l32r a4, 40201b64 +402031b9: 050c movi.n a5, 0 +402031bb: 512432 l32i a3, a4, 0x144 +402031be: 021357 beq a3, a5, 402031c4 +402031c1: 001352 l16ui a5, a3, 0 +402031c4: fa6841 l32r a4, 40201b64 +402031c7: 56c222 addi a2, a2, 86 +402031ca: 5d2432 l32i a3, a4, 0x174 +402031cd: 040c movi.n a4, 0 +402031cf: 091347 beq a3, a4, 402031dc +402031d2: 1368 l32i.n a6, a3, 4 +402031d4: 041647 beq a6, a4, 402031dc +402031d7: 080342 l8ui a4, a3, 8 +402031da: 44ab addi.n a4, a4, 10 +402031dc: 802520 add a2, a5, a2 +402031df: 804240 add a4, a2, a4 +402031e2: 831c movi.n a3, 24 +402031e4: 012d mov.n a2, a1 +402031e6: 02ed45 call0 402060bc +402031e9: 02cd mov.n a12, a2 +402031eb: 149216 beqz a2, 40203338 +402031ee: fa5d31 l32r a3, 40201b64 +402031f1: 821c movi.n a2, 24 +402031f3: 0a5c22 s16i a2, a12, 20 +402031f6: 03d322 addmi a2, a3, 0x300 +402031f9: 410222 l8ui a2, a2, 65 +402031fc: 80a032 movi a3, 128 +402031ff: 220b addi.n a2, a2, -1 +40203201: fa5841 l32r a4, 40201b64 +40203204: 902220 addx2 a2, a2, a2 +40203207: a02230 addx4 a2, a2, a3 +4020320a: 242a add.n a2, a4, a2 +4020320c: 224b addi.n a2, a2, 4 +4020320e: ffb6c5 call0 40202d7c +40203211: 0138 l32i.n a3, a1, 0 +40203213: 005322 s16i a2, a3, 0 +40203216: 0153d2 s16i a13, a3, 2 +40203219: 234b addi.n a2, a3, 4 +4020321b: 0129 s32i.n a2, a1, 0 +4020321d: 4dcc bnez.n a13, 40203225 +4020321f: 0d1f22 l16ui a2, a15, 26 +40203222: 025322 s16i a2, a3, 4 +40203225: fe41d1 l32r a13, 40202b2c +40203228: 236b addi.n a2, a3, 6 +4020322a: 0d3d mov.n a3, a13 +4020322c: 0129 s32i.n a2, a1, 0 +4020322e: ff8605 call0 40202a90 +40203231: 0d3d mov.n a3, a13 +40203233: 0129 s32i.n a2, a1, 0 +40203235: ff8a85 call0 40202ae0 +40203238: 2f38 l32i.n a3, a15, 8 +4020323a: c0a042 movi a4, 192 +4020323d: 0129 s32i.n a2, a1, 0 +4020323f: 103430 and a3, a4, a3 +40203242: 0dd366 bnei a3, 64, 40203253 +40203245: 0e3d mov.n a3, a14 +40203247: 059145 call0 40208b5c +4020324a: 0e3d mov.n a3, a14 +4020324c: 0129 s32i.n a2, a1, 0 +4020324e: 0595c5 call0 40208bac +40203251: 0129 s32i.n a2, a1, 0 +40203253: 2f28 l32i.n a2, a15, 8 +40203255: c0a032 movi a3, 192 +40203258: 102320 and a2, a3, a2 +4020325b: 109237 bne a2, a3, 4020326f +4020325e: 002122 l32i a2, a1, 0 +40203261: 0e3d mov.n a3, a14 +40203263: 059145 call0 40208b78 +40203266: 0e3d mov.n a3, a14 +40203268: 0129 s32i.n a2, a1, 0 +4020326a: 0595c5 call0 40208bc8 +4020326d: 0129 s32i.n a2, a1, 0 +4020326f: fa3d21 l32r a2, 40201b64 +40203272: 512232 l32i a3, a2, 0x144 +40203275: 007316 beqz a3, 40203280 +40203278: 002122 l32i a2, a1, 0 +4020327b: ff0bc5 call0 40202338 +4020327e: 0129 s32i.n a2, a1, 0 +40203280: fa3941 l32r a4, 40201b64 +40203283: 5d2432 l32i a3, a4, 0x174 +40203286: e38c beqz.n a3, 40203298 +40203288: 1348 l32i.n a4, a3, 4 +4020328a: a48c beqz.n a4, 40203298 +4020328c: 080352 l8ui a5, a3, 8 +4020328f: 0128 l32i.n a2, a1, 0 +40203291: 331b addi.n a3, a3, 1 +40203293: 04f7c5 call0 40208210 +40203296: 0129 s32i.n a2, a1, 0 +40203298: 1c38 l32i.n a3, a12, 4 +4020329a: 0a1c22 l16ui a2, a12, 20 +4020329d: 1338 l32i.n a3, a3, 4 +4020329f: 332a add.n a3, a3, a2 +402032a1: 0128 l32i.n a2, a1, 0 +402032a3: c02230 sub a2, a2, a3 +402032a6: 0006c6 j 402032c5 +402032a9: 02a042 movi a4, 2 +402032ac: 18a032 movi a3, 24 +402032af: 012d mov.n a2, a1 +402032b1: 02e085 call0 402060bc +402032b4: 02cd mov.n a12, a2 +402032b6: 07e216 beqz a2, 40203338 +402032b9: 821c movi.n a2, 24 +402032bb: 0a5c22 s16i a2, a12, 20 +402032be: 0128 l32i.n a2, a1, 0 +402032c0: 0052d2 s16i a13, a2, 0 +402032c3: 220c movi.n a2, 2 +402032c5: 0b5c22 s16i a2, a12, 22 +402032c8: fa27d1 l32r a13, 40201b64 +402032cb: 140c movi.n a4, 1 +402032cd: 4d28 l32i.n a2, a13, 16 +402032cf: c032e0 sub a3, a2, a14 +402032d2: 020c movi.n a2, 0 +402032d4: 932430 movnez a2, a4, a3 +402032d7: 9c38 l32i.n a3, a12, 36 +402032d9: fc2441 l32r a4, 4020236c +402032dc: 1358 l32i.n a5, a3, 4 +402032de: 0368 l32i.n a6, a3, 0 +402032e0: 104540 and a4, a5, a4 +402032e3: 057c movi.n a5, -16 +402032e5: 105450 and a5, a4, a5 +402032e8: 740c movi.n a4, 7 +402032ea: 204540 or a4, a5, a4 +402032ed: 1349 s32i.n a4, a3, 4 +402032ef: fc2041 l32r a4, 40202370 +402032f2: 742020 extui a2, a2, 0, 8 +402032f5: 0020c0 memw +402032f8: 0448 l32i.n a4, a4, 0 +402032fa: 1152f0 slli a5, a2, 1 +402032fd: 6349 s32i.n a4, a3, 24 +402032ff: c47c movi.n a4, -4 +40203301: 104640 and a4, a6, a4 +40203304: 204450 or a4, a4, a5 +40203307: 0349 s32i.n a4, a3, 0 +40203309: 0d1f42 l16ui a4, a15, 26 +4020330c: 00c416 beqz a4, 4020331c +4020330f: 002332 l32i a3, a3, 0 +40203312: 06e377 bbsi a3, 7, 4020331c +40203315: 1fab85 call0 40222dd0 +40203318: 0000c6 j 4020331f +4020331b: a02200 addx4 a2, a2, a0 +4020331e: 6c2200 excw +40203321: 0d3207 bltu a2, a0, 40203332 +40203324: 227d excw +40203326: 092c movi.n a9, 32 +40203328: 4148 l32i.n a4, a1, 16 +4020332a: 084232 s8i a3, a2, 8 +4020332d: 0c3d mov.n a3, a12 +4020332f: 0e2d mov.n a2, a14 +40203331: ff55c5 call0 40202890 +40203334: 000086 j 4020333a +40203337: 120c00 excw +4020333a: f108 l32i.n a0, a1, 60 +4020333c: e1c8 l32i.n a12, a1, 56 +4020333e: d1d8 l32i.n a13, a1, 52 +40203340: c1e8 l32i.n a14, a1, 48 +40203342: b1f8 l32i.n a15, a1, 44 +40203344: 40c112 addi a1, a1, 64 +40203347: f00d ret.n +40203349: 000000 ill +4020334c: ce38 l32i.n a3, a14, 48 +4020334e: fe .byte 0xfe +4020334f: 3f .byte 0x3f +40203350: fee1e4 excw +40203353: 3f .byte 0x3f +40203354: 000880 ret +40203357: cee600 excw +4020335a: fe .byte 0xfe +4020335b: 3f .byte 0x3f +4020335c: 070000 excw + ... + +40203360 : +40203360: a0c112 addi a1, a1, -96 +40203363: 1661c2 s32i a12, a1, 88 +40203366: f9ffc1 l32r a12, 40201b64 +40203369: 1561d2 s32i a13, a1, 84 +4020336c: 176102 s32i a0, a1, 92 +4020336f: 1461e2 s32i a14, a1, 80 +40203372: 1361f2 s32i a15, a1, 76 +40203375: 02dd mov.n a13, a2 +40203377: 03dc22 addmi a2, a12, 0x300 +4020337a: 4102f2 l8ui a15, a2, 65 +4020337d: a139 s32i.n a3, a1, 40 +4020337f: ff0b addi.n a15, a15, -1 +40203381: 74f0f0 extui a15, a15, 0, 8 +40203384: 115ff0 slli a5, a15, 1 +40203387: 25fa add.n a2, a5, a15 +40203389: 80a032 movi a3, 128 +4020338c: a02230 addx4 a2, a2, a3 +4020338f: 22ca add.n a2, a2, a12 +40203391: 224b addi.n a2, a2, 4 +40203393: 356d22 s32i a2, a13, 212 +40203396: 9159 s32i.n a5, a1, 36 +40203398: 01dc52 addmi a5, a12, 0x100 +4020339b: fd0572 l8ui a7, a5, 253 +4020339e: fc0582 l8ui a8, a5, 252 +402033a1: 8129 s32i.n a2, a1, 32 +402033a3: c09780 sub a9, a7, a8 +402033a6: af2c42 l32i a4, a12, 0x2bc +402033a9: a50c movi.n a5, 10 +402033ab: 0279e6 bgei a9, 7, 402033b1 +402033ae: 03c952 addi a5, a9, 3 +402033b1: 90a022 movi a2, 144 +402033b4: 442a add.n a4, a4, a2 +402033b6: 02dc22 addmi a2, a12, 0x200 +402033b9: 080262 l8ui a6, a2, 8 +402033bc: 530c movi.n a3, 5 +402033be: 020c movi.n a2, 0 +402033c0: 660b addi.n a6, a6, -1 +402033c2: 933260 movnez a3, a2, a6 +402033c5: 036d mov.n a6, a3 +402033c7: 354a add.n a3, a5, a4 +402033c9: 025d mov.n a5, a2 +402033cb: 0589a6 blti a9, 8, 402033d4 +402033ce: c02780 sub a2, a7, a8 +402033d1: fbc252 addi a5, a2, -5 +402033d4: 502c22 l32i a2, a12, 0x140 +402033d7: 363a add.n a3, a6, a3 +402033d9: 060c movi.n a6, 0 +402033db: 021267 beq a2, a6, 402033e1 +402033de: 001262 l16ui a6, a2, 0 +402033e1: 253a add.n a2, a5, a3 +402033e3: 562c32 l32i a3, a12, 0x158 +402033e6: 5b2c52 l32i a5, a12, 0x16c +402033e9: 0e0c movi.n a14, 0 +402033eb: b41c movi.n a4, 27 +402033ed: 834e30 moveqz a4, a14, a3 +402033f0: 262a add.n a2, a6, a2 +402033f2: 0e3d mov.n a3, a14 +402033f4: 0915e7 beq a5, a14, 40203401 +402033f7: 1568 l32i.n a6, a5, 4 +402033f9: 0416e7 beq a6, a14, 40203401 +402033fc: 080532 l8ui a3, a5, 8 +402033ff: 33ab addi.n a3, a3, 10 +40203401: e42a add.n a14, a4, a2 +40203403: 782c22 l32i a2, a12, 0x1e0 +40203406: e28c beqz.n a2, 40203418 +40203408: 0228 l32i.n a2, a2, 0 +4020340a: a28c beqz.n a2, 40203418 +4020340c: b139 s32i.n a3, a1, 44 +4020340e: 0002c0 callx0 a2 +40203411: b40c movi.n a4, 11 +40203413: b138 l32i.n a3, a1, 44 +40203415: 017226 beqi a2, 7, 4020341a +40203418: 040c movi.n a4, 0 +4020341a: e3ea add.n a14, a3, a14 +4020341c: ffcc21 l32r a2, 4020334c +4020341f: 4e4a add.n a4, a14, a4 +40203421: 0249 s32i.n a4, a2, 0 +40203423: 831c movi.n a3, 24 +40203425: 10c122 addi a2, a1, 16 +40203428: 02c905 call0 402060bc +4020342b: 02ed mov.n a14, a2 +4020342d: 020c movi.n a2, 0 +4020342f: 029e27 bne a14, a2, 40203435 +40203432: 006c86 j 402035e8 +40203435: 821c movi.n a2, 24 +40203437: 0a5e22 s16i a2, a14, 20 +4020343a: 4128 l32i.n a2, a1, 16 +4020343c: 840c movi.n a4, 8 +4020343e: 030c movi.n a3, 0 +40203440: f6f401 l32r a0, 40201010 <_irom0_text_start> +40203443: 0000c0 callx0 a0 +40203446: 05dc22 addmi a2, a12, 0x500 +40203449: 4138 l32i.n a3, a1, 16 +4020344b: 3c1222 l16ui a2, a2, 120 +4020344e: 045322 s16i a2, a3, 8 +40203451: 23ab addi.n a2, a3, 10 +40203453: 4129 s32i.n a2, a1, 16 +40203455: 8128 l32i.n a2, a1, 32 +40203457: b139 s32i.n a3, a1, 44 +40203459: ff9205 call0 40202d7c +4020345c: b138 l32i.n a3, a1, 44 +4020345e: af2c52 l32i a5, a12, 0x2bc +40203461: 055322 s16i a2, a3, 10 +40203464: 23cb addi.n a2, a3, 12 +40203466: 4129 s32i.n a2, a1, 16 +40203468: 020c movi.n a2, 0 +4020346a: 0c4322 s8i a2, a3, 12 +4020346d: 0d4352 s8i a5, a3, 13 +40203470: 63eb addi.n a6, a3, 14 +40203472: 359c beqz.n a5, 40203489 +40203474: ffb731 l32r a3, 40203350 +40203477: 054d mov.n a4, a5 +40203479: 062d mov.n a2, a6 +4020347b: b159 s32i.n a5, a1, 44 +4020347d: c169 s32i.n a6, a1, 48 +4020347f: f6e501 l32r a0, 40201014 <_irom0_text_start+0x4> +40203482: 0000c0 callx0 a0 +40203485: c168 l32i.n a6, a1, 48 +40203487: b158 l32i.n a5, a1, 44 +40203489: fda831 l32r a3, 40202b2c +4020348c: 265a add.n a2, a6, a5 +4020348e: 4129 s32i.n a2, a1, 16 +40203490: ff5fc5 call0 40202a90 +40203493: 9158 l32i.n a5, a1, 36 +40203495: ffaf41 l32r a4, 40203354 +40203498: f5fa add.n a15, a5, a15 +4020349a: a0ffc0 addx4 a15, a15, a12 +4020349d: 212f32 l32i a3, a15, 132 +402034a0: fda351 l32r a5, 40202b2c +402034a3: 4129 s32i.n a2, a1, 16 +402034a5: 103340 and a3, a3, a4 +402034a8: 05fd mov.n a15, a5 +402034aa: 261347 beq a3, a4, 402034d4 +402034ad: 321b addi.n a3, a2, 1 +402034af: 4139 s32i.n a3, a1, 16 +402034b1: 330c movi.n a3, 3 +402034b3: 004232 s8i a3, a2, 0 +402034b6: 4128 l32i.n a2, a1, 16 +402034b8: 321b addi.n a3, a2, 1 +402034ba: 4139 s32i.n a3, a1, 16 +402034bc: 130c movi.n a3, 1 +402034be: 004232 s8i a3, a2, 0 +402034c1: 4138 l32i.n a3, a1, 16 +402034c3: 231b addi.n a2, a3, 1 +402034c5: 4129 s32i.n a2, a1, 16 +402034c7: 8128 l32i.n a2, a1, 32 +402034c9: b139 s32i.n a3, a1, 44 +402034cb: feb245 call0 40201ff0 +402034ce: 0b2132 l32i a3, a1, 44 +402034d1: 004322 s8i a2, a3, 0 +402034d4: fe3f31 l32r a3, 40202dd0 +402034d7: 080322 l8ui a2, a3, 8 +402034da: 281266 bnei a2, 1, 40203506 +402034dd: 090322 l8ui a2, a3, 9 +402034e0: 22ac beqz.n a2, 40203506 +402034e2: 4128 l32i.n a2, a1, 16 +402034e4: 532c movi.n a3, 37 +402034e6: 004232 s8i a3, a2, 0 +402034e9: 330c movi.n a3, 3 +402034eb: 014232 s8i a3, a2, 1 +402034ee: fe3841 l32r a4, 40202dd0 +402034f1: 130c movi.n a3, 1 +402034f3: 024232 s8i a3, a2, 2 +402034f6: 0a0432 l8ui a3, a4, 10 +402034f9: 034232 s8i a3, a2, 3 +402034fc: 090432 l8ui a3, a4, 9 +402034ff: 044232 s8i a3, a2, 4 +40203502: 225b addi.n a2, a2, 5 +40203504: 4129 s32i.n a2, a1, 16 +40203506: 4128 l32i.n a2, a1, 16 +40203508: 0c3d mov.n a3, a12 +4020350a: fe8245 call0 40201d30 +4020350d: 0f3d mov.n a3, a15 +4020350f: 4129 s32i.n a2, a1, 16 +40203511: ff5cc5 call0 40202ae0 +40203514: ff9131 l32r a3, 40203358 +40203517: 4129 s32i.n a2, a1, 16 +40203519: 009352 l16si a5, a3, 0 +4020351c: ffa042 movi a4, 255 +4020351f: 130c movi.n a3, 1 +40203521: 25cc bnez.n a5, 40203527 +40203523: 040c movi.n a4, 0 +40203525: 043d mov.n a3, a4 +40203527: f45050 extui a5, a5, 0, 16 +4020352a: 04c585 call0 40208184 +4020352d: 332d32 l32i a3, a13, 204 +40203530: 4129 s32i.n a2, a1, 16 +40203532: f39c beqz.n a3, 40203555 +40203534: 6348 l32i.n a4, a3, 24 +40203536: 142432 l32i a3, a4, 80 +40203539: 018316 beqz a3, 40203555 +4020353c: 152442 l32i a4, a4, 84 +4020353f: f6b501 l32r a0, 40201014 <_irom0_text_start+0x4> +40203542: 0000c0 callx0 a0 +40203545: 332d22 l32i a2, a13, 204 +40203548: 4138 l32i.n a3, a1, 16 +4020354a: 6228 l32i.n a2, a2, 24 +4020354c: 152222 l32i a2, a2, 84 +4020354f: 802320 add a2, a3, a2 +40203552: 046122 s32i a2, a1, 16 +40203555: 352d22 l32i a2, a13, 212 +40203558: 0238 l32i.n a3, a2, 0 +4020355a: ff8021 l32r a2, 4020335c +4020355d: 1d0327 bnone a3, a2, 4020357e +40203560: a158 l32i.n a5, a1, 40 +40203562: 181526 beqi a5, 1, 4020357e +40203565: 142d22 l32i a2, a13, 80 +40203568: c0a032 movi a3, 192 +4020356b: 0f0327 bnone a3, a2, 4020357e +4020356e: 4128 l32i.n a2, a1, 16 +40203570: 0d3d mov.n a3, a13 +40203572: 055e85 call0 40208b5c +40203575: 0d3d mov.n a3, a13 +40203577: 4129 s32i.n a2, a1, 16 +40203579: 056305 call0 40208bac +4020357c: 4129 s32i.n a2, a1, 16 +4020357e: 502c32 l32i a3, a12, 0x140 +40203581: 538c beqz.n a3, 4020358a +40203583: 4128 l32i.n a2, a1, 16 +40203585: fedb05 call0 40202338 +40203588: 4129 s32i.n a2, a1, 16 +4020358a: 562c22 l32i a2, a12, 0x158 +4020358d: 528c beqz.n a2, 40203596 +4020358f: 4128 l32i.n a2, a1, 16 +40203591: 025d05 call0 40205b64 +40203594: 4129 s32i.n a2, a1, 16 +40203596: 5b2c32 l32i a3, a12, 0x16c +40203599: 039c beqz.n a3, 402035ad +4020359b: 1348 l32i.n a4, a3, 4 +4020359d: c48c beqz.n a4, 402035ad +4020359f: 080352 l8ui a5, a3, 8 +402035a2: 4128 l32i.n a2, a1, 16 +402035a4: 01c332 addi a3, a3, 1 +402035a7: 04c685 call0 40208210 +402035aa: 046122 s32i a2, a1, 16 +402035ad: 782c22 l32i a2, a12, 0x1e0 +402035b0: 01e216 beqz a2, 402035d2 +402035b3: 002222 l32i a2, a2, 0 +402035b6: 018216 beqz a2, 402035d2 +402035b9: 0002c0 callx0 a2 +402035bc: 127266 bnei a2, 7, 402035d2 +402035bf: 040c movi.n a4, 0 +402035c1: 4128 l32i.n a2, a1, 16 +402035c3: 0149 s32i.n a4, a1, 0 +402035c5: 047d mov.n a7, a4 +402035c7: 046d mov.n a6, a4 +402035c9: 045d mov.n a5, a4 +402035cb: 130c movi.n a3, 1 +402035cd: 04b4c5 call0 4020811c +402035d0: 4129 s32i.n a2, a1, 16 +402035d2: 821c movi.n a2, 24 +402035d4: 0a5e22 s16i a2, a14, 20 +402035d7: 1e28 l32i.n a2, a14, 4 +402035d9: 1228 l32i.n a2, a2, 4 +402035db: 18c232 addi a3, a2, 24 +402035de: 4128 l32i.n a2, a1, 16 +402035e0: c02230 sub a2, a2, a3 +402035e3: 0b5e22 s16i a2, a14, 22 +402035e6: 0e2d mov.n a2, a14 +402035e8: 172102 l32i a0, a1, 92 +402035eb: 1621c2 l32i a12, a1, 88 +402035ee: 1521d2 l32i a13, a1, 84 +402035f1: 1421e2 l32i a14, a1, 80 +402035f4: 1321f2 l32i a15, a1, 76 +402035f7: 60c112 addi a1, a1, 96 +402035fa: f00d ret.n +402035fc: 000010 excw +402035ff: 02 .byte 0x2 + +40203600 : +40203600: c0c112 addi a1, a1, -64 +40203603: 207330 or a7, a3, a3 +40203606: 203440 or a3, a4, a4 +40203609: e1c9 s32i.n a12, a1, 56 +4020360b: d1d9 s32i.n a13, a1, 52 +4020360d: c1e9 s32i.n a14, a1, 48 +4020360f: b1f9 s32i.n a15, a1, 44 +40203611: f109 s32i.n a0, a1, 60 +40203613: 02f8 l32i.n a15, a2, 0 +40203615: 02dd mov.n a13, a2 +40203617: 046172 s32i a7, a1, 16 +4020361a: ffd445 call0 40203360 +4020361d: 02cd mov.n a12, a2 +4020361f: 1e0c movi.n a14, 1 +40203621: 4178 l32i.n a7, a1, 16 +40203623: 0eb216 beqz a2, 40203712 +40203626: 1248 l32i.n a4, a2, 4 +40203628: 0b1232 l16ui a3, a2, 22 +4020362b: 0a1222 l16ui a2, a2, 20 +4020362e: 0020c0 memw +40203631: 0458 l32i.n a5, a4, 0 +40203633: 232a add.n a2, a3, a2 +40203635: fb4f31 l32r a3, 40202374 +40203638: b42020 extui a2, a2, 0, 12 +4020363b: 203530 or a3, a5, a3 +4020363e: 0020c0 memw +40203641: 0439 s32i.n a3, a4, 0 +40203643: 0020c0 memw +40203646: 0458 l32i.n a5, a4, 0 +40203648: fb4c31 l32r a3, 40202378 +4020364b: 33cf62 addi a6, a15, 51 +4020364e: 203530 or a3, a5, a3 +40203651: 0020c0 memw +40203654: 0439 s32i.n a3, a4, 0 +40203656: 0020c0 memw +40203659: 0458 l32i.n a5, a4, 0 +4020365b: fb4831 l32r a3, 4020237c +4020365e: 103530 and a3, a5, a3 +40203661: 0020c0 memw +40203664: 0439 s32i.n a3, a4, 0 +40203666: 0020c0 memw +40203669: 0458 l32i.n a5, a4, 0 +4020366b: 113240 slli a3, a2, 12 +4020366e: fb4421 l32r a2, 40202380 +40203671: 102520 and a2, a5, a2 +40203674: 202230 or a2, a2, a3 +40203677: 0020c0 memw +4020367a: 0429 s32i.n a2, a4, 0 +4020367c: 0169 s32i.n a6, a1, 0 +4020367e: 051c movi.n a5, 16 +40203680: 045c movi.n a4, 80 +40203682: 0c3d mov.n a3, a12 +40203684: 0d2d mov.n a2, a13 +40203686: ff10c5 call0 40202794 +40203689: 9c48 l32i.n a4, a12, 36 +4020368b: fb3831 l32r a3, 4020236c +4020368e: 1478 l32i.n a7, a4, 4 +40203690: fb3821 l32r a2, 40202370 +40203693: 103730 and a3, a7, a3 +40203696: 077c movi.n a7, -16 +40203698: 107370 and a7, a3, a7 +4020369b: 730c movi.n a3, 7 +4020369d: 203730 or a3, a7, a3 +402036a0: 242d62 l32i a6, a13, 144 +402036a3: 1439 s32i.n a3, a4, 4 +402036a5: 0020c0 memw +402036a8: 0228 l32i.n a2, a2, 0 +402036aa: 0488 l32i.n a8, a4, 0 +402036ac: 6429 s32i.n a2, a4, 24 +402036ae: ffd331 l32r a3, 402035fc +402036b1: e27c movi.n a2, -2 +402036b3: 415680 srli a5, a8, 6 +402036b6: 102820 and a2, a8, a2 +402036b9: 270c movi.n a7, 2 +402036bb: 202270 or a2, a2, a7 +402036be: 203530 or a3, a5, a3 +402036c1: 1133a0 slli a3, a3, 6 +402036c4: 542020 extui a2, a2, 0, 6 +402036c7: 202230 or a2, a2, a3 +402036ca: 0429 s32i.n a2, a4, 0 +402036cc: 048577 bany a5, a7, 402036d4 +402036cf: 0d1622 l16ui a2, a6, 26 +402036d2: 32cc bnez.n a2, 402036d9 +402036d4: 020c movi.n a2, 0 +402036d6: 000146 j 402036df +402036d9: 742020 extui a2, a2, 0, 8 +402036dc: 1f6f05 call0 40222dd0 +402036df: 076c22 s32i a2, a12, 28 +402036e2: 027d85 call0 40205ebc +402036e5: 02ed mov.n a14, a2 +402036e7: 928c beqz.n a2, 402036f4 +402036e9: 0c2d mov.n a2, a12 +402036eb: 1e5ac5 call0 40221c98 +402036ee: 02ed mov.n a14, a2 +402036f0: 000786 j 40203712 +402036f3: 162100 excw +402036f6: ff .byte 0xff +402036f7: 00a142 movi a4, 0x100 +402036fa: 002222 l32i a2, a2, 0 +402036fd: 06a032 movi a3, 6 +40203700: 092427 blt a4, a2, 4020370d +40203703: 40a042 movi a4, 64 +40203706: 430c movi.n a3, 4 +40203708: 012427 blt a4, a2, 4020370d +4020370b: 530c movi.n a3, 5 +4020370d: 0c2d mov.n a2, a12 +4020370f: 1eda05 call0 402224b0 +40203712: f108 l32i.n a0, a1, 60 +40203714: 0e2d mov.n a2, a14 +40203716: e1c8 l32i.n a12, a1, 56 +40203718: d1d8 l32i.n a13, a1, 52 +4020371a: c1e8 l32i.n a14, a1, 48 +4020371c: b1f8 l32i.n a15, a1, 44 +4020371e: 40c112 addi a1, a1, 64 +40203721: f00d ret.n + ... + +40203724 : +40203724: e0c112 addi a1, a1, -32 +40203727: 61c9 s32i.n a12, a1, 24 +40203729: 831c movi.n a3, 24 +4020372b: f4c040 extui a12, a4, 0, 16 +4020372e: 012d mov.n a2, a1 +40203730: 240c movi.n a4, 2 +40203732: 7109 s32i.n a0, a1, 28 +40203734: 029845 call0 402060bc +40203737: 529c beqz.n a2, 40203750 +40203739: 0138 l32i.n a3, a1, 0 +4020373b: 841c movi.n a4, 24 +4020373d: 0053c2 s16i a12, a3, 0 +40203740: 0a5242 s16i a4, a2, 20 +40203743: 1248 l32i.n a4, a2, 4 +40203745: 1448 l32i.n a4, a4, 4 +40203747: c03340 sub a3, a3, a4 +4020374a: eac332 addi a3, a3, -22 +4020374d: 0b5232 s16i a3, a2, 22 +40203750: 7108 l32i.n a0, a1, 28 +40203752: 61c8 l32i.n a12, a1, 24 +40203754: 20c112 addi a1, a1, 32 +40203757: f00d ret.n +40203759: 000000 ill + +4020375c : +4020375c: d0c112 addi a1, a1, -48 +4020375f: f44040 extui a4, a4, 0, 16 +40203762: 0a61c2 s32i a12, a1, 40 +40203765: 0961d2 s32i a13, a1, 36 +40203768: 81e9 s32i.n a14, a1, 32 +4020376a: 71f9 s32i.n a15, a1, 28 +4020376c: b109 s32i.n a0, a1, 44 +4020376e: 02dd mov.n a13, a2 +40203770: 03fd mov.n a15, a3 +40203772: 02e8 l32i.n a14, a2, 0 +40203774: fffac5 call0 40203724 +40203777: 02cd mov.n a12, a2 +40203779: 120c movi.n a2, 1 +4020377b: 0e3c16 beqz a12, 40203862 +4020377e: 1c48 l32i.n a4, a12, 4 +40203780: 0b1c32 l16ui a3, a12, 22 +40203783: 0a1c22 l16ui a2, a12, 20 +40203786: 0020c0 memw +40203789: 0458 l32i.n a5, a4, 0 +4020378b: 232a add.n a2, a3, a2 +4020378d: faf931 l32r a3, 40202374 +40203790: b42020 extui a2, a2, 0, 12 +40203793: 203530 or a3, a5, a3 +40203796: 0020c0 memw +40203799: 0439 s32i.n a3, a4, 0 +4020379b: 0020c0 memw +4020379e: 0458 l32i.n a5, a4, 0 +402037a0: faf631 l32r a3, 40202378 +402037a3: 33ce62 addi a6, a14, 51 +402037a6: 203530 or a3, a5, a3 +402037a9: 0020c0 memw +402037ac: 0439 s32i.n a3, a4, 0 +402037ae: 0020c0 memw +402037b1: 0458 l32i.n a5, a4, 0 +402037b3: faf231 l32r a3, 4020237c +402037b6: 0f7d mov.n a7, a15 +402037b8: 103530 and a3, a5, a3 +402037bb: 0020c0 memw +402037be: 0439 s32i.n a3, a4, 0 +402037c0: 0020c0 memw +402037c3: 0458 l32i.n a5, a4, 0 +402037c5: 113240 slli a3, a2, 12 +402037c8: faee21 l32r a2, 40202380 +402037cb: 102520 and a2, a5, a2 +402037ce: 202230 or a2, a2, a3 +402037d1: 0020c0 memw +402037d4: 0429 s32i.n a2, a4, 0 +402037d6: 0169 s32i.n a6, a1, 0 +402037d8: 051c movi.n a5, 16 +402037da: c0a042 movi a4, 192 +402037dd: 0c3d mov.n a3, a12 +402037df: 0d2d mov.n a2, a13 +402037e1: fefb05 call0 40202794 +402037e4: 9c38 l32i.n a3, a12, 36 +402037e6: 021c movi.n a2, 16 +402037e8: 0348 l32i.n a4, a3, 0 +402037ea: 1368 l32i.n a6, a3, 4 +402037ec: 415640 srli a5, a4, 6 +402037ef: 202520 or a2, a5, a2 +402037f2: 1122a0 slli a2, a2, 6 +402037f5: 545040 extui a5, a4, 0, 6 +402037f8: 202520 or a2, a5, a2 +402037fb: fadc51 l32r a5, 4020236c +402037fe: 242d72 l32i a7, a13, 144 +40203801: 105650 and a5, a6, a5 +40203804: 067c movi.n a6, -16 +40203806: 106560 and a6, a5, a6 +40203809: 750c movi.n a5, 7 +4020380b: 205650 or a5, a6, a5 +4020380e: 1359 s32i.n a5, a3, 4 +40203810: fad851 l32r a5, 40202370 +40203813: 0329 s32i.n a2, a3, 0 +40203815: 0020c0 memw +40203818: 0558 l32i.n a5, a5, 0 +4020381a: 6359 s32i.n a5, a3, 24 +4020381c: e57c movi.n a5, -2 +4020381e: 102250 and a2, a2, a5 +40203821: 250c movi.n a5, 2 +40203823: 202250 or a2, a2, a5 +40203826: 0329 s32i.n a2, a3, 0 +40203828: 06e477 bbsi a4, 7, 40203832 +4020382b: 378c beqz.n a7, 40203832 +4020382d: 0d1722 l16ui a2, a7, 26 +40203830: 32cc bnez.n a2, 40203837 +40203832: 020c movi.n a2, 0 +40203834: 000146 j 4020383d +40203837: 742020 extui a2, a2, 0, 8 +4020383a: 1f5945 call0 40222dd0 +4020383d: 076c22 s32i a2, a12, 28 +40203840: 026785 call0 40205ebc +40203843: 009216 beqz a2, 40203850 +40203846: 202cc0 or a2, a12, a12 +40203849: 1e44c5 call0 40221c98 +4020384c: 000486 j 40203862 +4020384f: 030c00 excw +40203852: 8c39 s32i.n a3, a12, 32 +40203854: f8c431 l32r a3, 40201b64 +40203857: 742342 l32i a4, a3, 0x1d0 +4020385a: 04c9 s32i.n a12, a4, 0 +4020385c: 20ccc2 addi a12, a12, 32 +4020385f: 7463c2 s32i a12, a3, 0x1d0 +40203862: b108 l32i.n a0, a1, 44 +40203864: a1c8 l32i.n a12, a1, 40 +40203866: 91d8 l32i.n a13, a1, 36 +40203868: 81e8 l32i.n a14, a1, 32 +4020386a: 71f8 l32i.n a15, a1, 28 +4020386c: 30c112 addi a1, a1, 48 +4020386f: f00d ret.n +40203871: 000000 ill +40203874: ff .byte 0xff +40203875: ff .byte 0xff +40203876: 7f .byte 0x7f + ... + +40203878 : +40203878: c0c112 addi a1, a1, -64 +4020387b: 745050 extui a5, a5, 0, 8 +4020387e: 4159 s32i.n a5, a1, 16 +40203880: f8b951 l32r a5, 40201b64 +40203883: e1c9 s32i.n a12, a1, 56 +40203885: d1d9 s32i.n a13, a1, 52 +40203887: c1e9 s32i.n a14, a1, 48 +40203889: f109 s32i.n a0, a1, 60 +4020388b: b1f9 s32i.n a15, a1, 44 +4020388d: 01d5d2 addmi a13, a5, 0x100 +40203890: 038d mov.n a8, a3 +40203892: ff0d32 l8ui a3, a13, 255 +40203895: 02ed mov.n a14, a2 +40203897: 04cd mov.n a12, a4 +40203899: c27c movi.n a2, -4 +4020389b: 18f316 beqz a3, 40203a2e +4020389e: 120c movi.n a2, 1 +402038a0: 030c movi.n a3, 0 +402038a2: 741c movi.n a4, 23 +402038a4: 833280 moveqz a3, a2, a8 +402038a7: 01b4c7 bgeu a4, a12, 402038ac +402038aa: 020c movi.n a2, 0 +402038ac: 202320 or a2, a3, a2 +402038af: 026207 bbci a2, 0, 402038b5 +402038b2: 005d86 j 40203a2c +402038b5: 78a522 movi a2, 0x578 +402038b8: 02a2c7 bge a2, a12, 402038be +402038bb: 005b46 j 40203a2c +402038be: 000872 l8ui a7, a8, 0 +402038c1: 010892 l8ui a9, a8, 1 +402038c4: c30c movi.n a3, 12 +402038c6: 047c movi.n a4, -16 +402038c8: 103730 and a3, a7, a3 +402038cb: 104740 and a4, a7, a4 +402038ce: e27c movi.n a2, -2 +402038d0: 026967 bbci a9, 6, 402038d6 +402038d3: 0055c6 j 40203a2e +402038d6: 128326 beqi a3, 8, 402038ec +402038d9: 151356 bnez a3, 40203a2e +402038dc: 026c movi.n a2, -32 +402038de: 102720 and a2, a7, a2 +402038e1: 07d226 beqi a2, 64, 402038ec +402038e4: e27c movi.n a2, -2 +402038e6: 02e426 beqi a4, 128, 402038ec +402038e9: 005046 j 40203a2e +402038ec: 204cc0 or a4, a12, a12 +402038ef: 00a032 movi a3, 0 +402038f2: 202110 or a2, a1, a1 +402038f5: 5189 s32i.n a8, a1, 20 +402038f7: 6159 s32i.n a5, a1, 24 +402038f9: 027c05 call0 402060bc +402038fc: 02fd mov.n a15, a2 +402038fe: 5188 l32i.n a8, a1, 20 +40203900: f27c movi.n a2, -1 +40203902: 128f16 beqz a15, 40203a2e +40203905: 0178 l32i.n a7, a1, 0 +40203907: 0c4d mov.n a4, a12 +40203909: 083d mov.n a3, a8 +4020390b: 072d mov.n a2, a7 +4020390d: 5179 s32i.n a7, a1, 20 +4020390f: f5c101 l32r a0, 40201014 <_irom0_text_start+0x4> +40203912: 0000c0 callx0 a0 +40203915: 0128 l32i.n a2, a1, 0 +40203917: 1f38 l32i.n a3, a15, 4 +40203919: c2ca add.n a12, a2, a12 +4020391b: 821c movi.n a2, 24 +4020391d: 0a5f22 s16i a2, a15, 20 +40203920: 1328 l32i.n a2, a3, 4 +40203922: 01c9 s32i.n a12, a1, 0 +40203924: 18c222 addi a2, a2, 24 +40203927: c0cc20 sub a12, a12, a2 +4020392a: f4c0c0 extui a12, a12, 0, 16 +4020392d: 0b5fc2 s16i a12, a15, 22 +40203930: 0020c0 memw +40203933: 0348 l32i.n a4, a3, 0 +40203935: fa8f21 l32r a2, 40202374 +40203938: 18ccc2 addi a12, a12, 24 +4020393b: 202420 or a2, a4, a2 +4020393e: 0020c0 memw +40203941: 0329 s32i.n a2, a3, 0 +40203943: 0020c0 memw +40203946: 0348 l32i.n a4, a3, 0 +40203948: fa8c21 l32r a2, 40202378 +4020394b: b4c0c0 extui a12, a12, 0, 12 +4020394e: 202420 or a2, a4, a2 +40203951: 0020c0 memw +40203954: 0329 s32i.n a2, a3, 0 +40203956: 0020c0 memw +40203959: 0348 l32i.n a4, a3, 0 +4020395b: fa8821 l32r a2, 4020237c +4020395e: 102420 and a2, a4, a2 +40203961: 0020c0 memw +40203964: 0329 s32i.n a2, a3, 0 +40203966: fa8641 l32r a4, 40202380 +40203969: 112c40 slli a2, a12, 12 +4020396c: 0020c0 memw +4020396f: 03c8 l32i.n a12, a3, 0 +40203971: 10cc40 and a12, a12, a4 +40203974: 20cc20 or a12, a12, a2 +40203977: 0020c0 memw +4020397a: 03c9 s32i.n a12, a3, 0 +4020397c: 6158 l32i.n a5, a1, 24 +4020397e: 5178 l32i.n a7, a1, 20 +40203980: 4538 l32i.n a3, a5, 16 +40203982: 0693e7 bne a3, a14, 4020398c +40203985: 252322 l32i a2, a3, 148 +40203988: 000286 j 40203996 +4020398b: 554800 extui a4, a0, 24, 6 +4020398e: 020c movi.n a2, 0 +40203990: 029e47 bne a14, a4, 40203996 +40203993: 262e22 l32i a2, a14, 152 +40203996: 4148 l32i.n a4, a1, 16 +40203998: 449c beqz.n a4, 402039b0 +4020399a: 229c beqz.n a2, 402039b0 +4020399c: 5e1242 l16ui a4, a2, 188 +4020399f: 440b addi.n a4, a4, -1 +402039a1: 1144c0 slli a4, a4, 4 +402039a4: 0b5742 s16i a4, a7, 22 +402039a7: 5e1242 l16ui a4, a2, 188 +402039aa: 01c442 addi a4, a4, 1 +402039ad: 5e5242 s16i a4, a2, 188 +402039b0: 040722 l8ui a2, a7, 4 +402039b3: 0f6207 bbci a2, 0, 402039c6 +402039b6: 9f48 l32i.n a4, a15, 36 +402039b8: 02a422 movi a2, 0x402 +402039bb: 0488 l32i.n a8, a4, 0 +402039bd: 1122a0 slli a2, a2, 6 +402039c0: 202820 or a2, a8, a2 +402039c3: 006422 s32i a2, a4, 0 +402039c6: 092f42 l32i a4, a15, 36 +402039c9: 7d0522 l8ui a2, a5, 125 +402039cc: 012452 l32i a5, a4, 4 +402039cf: 084422 s8i a2, a4, 8 +402039d2: fa6621 l32r a2, 4020236c +402039d5: c033e0 sub a3, a3, a14 +402039d8: 102520 and a2, a5, a2 +402039db: f0af52 movi a5, -16 +402039de: 102250 and a2, a2, a5 +402039e1: 750c movi.n a5, 7 +402039e3: 202250 or a2, a2, a5 +402039e6: fa6251 l32r a5, 40202370 +402039e9: 1429 s32i.n a2, a4, 4 +402039eb: 0020c0 memw +402039ee: 0558 l32i.n a5, a5, 0 +402039f0: 6459 s32i.n a5, a4, 24 +402039f2: 011752 l16ui a5, a7, 2 +402039f5: ff9f71 l32r a7, 40203874 +402039f8: 015590 slli a5, a5, 23 +402039fb: 102270 and a2, a2, a7 +402039fe: 202250 or a2, a2, a5 +40203a01: 1429 s32i.n a2, a4, 4 +40203a03: 050c movi.n a5, 0 +40203a05: 120c movi.n a2, 1 +40203a07: 0478 l32i.n a7, a4, 0 +40203a09: 832530 moveqz a2, a5, a3 +40203a0c: 1132f0 slli a3, a2, 1 +40203a0f: c27c movi.n a2, -4 +40203a11: 102720 and a2, a7, a2 +40203a14: 202230 or a2, a2, a3 +40203a17: 0429 s32i.n a2, a4, 0 +40203a19: 00a122 movi a2, 0x100 +40203a1c: 4429 s32i.n a2, a4, 16 +40203a1e: 7f59 s32i.n a5, a15, 28 +40203a20: 0f2d mov.n a2, a15 +40203a22: ff4d52 s8i a5, a13, 255 +40203a25: 1e2705 call0 40221c98 +40203a28: 000086 j 40203a2e +40203a2b: d27c00 excw +40203a2e: f108 l32i.n a0, a1, 60 +40203a30: e1c8 l32i.n a12, a1, 56 +40203a32: d1d8 l32i.n a13, a1, 52 +40203a34: c1e8 l32i.n a14, a1, 48 +40203a36: b1f8 l32i.n a15, a1, 44 +40203a38: 40c112 addi a1, a1, 64 +40203a3b: f00d ret.n +40203a3d: 000000 ill +40203a40: 100000 and a0, a0, a0 +40203a43: 001000 excw +40203a46: 80 .byte 0x80 + ... + +40203a48 : +40203a48: a0c112 addi a1, a1, -96 +40203a4b: 1661c2 s32i a12, a1, 88 +40203a4e: f845c1 l32r a12, 40201b64 +40203a51: 1561d2 s32i a13, a1, 84 +40203a54: 1461e2 s32i a14, a1, 80 +40203a57: 176102 s32i a0, a1, 92 +40203a5a: 1361f2 s32i a15, a1, 76 +40203a5d: 02dd mov.n a13, a2 +40203a5f: 01dc22 addmi a2, a12, 0x100 +40203a62: fd0242 l8ui a4, a2, 253 +40203a65: fc0282 l8ui a8, a2, 252 +40203a68: 03ed mov.n a14, a3 +40203a6a: c09480 sub a9, a4, a8 +40203a6d: af2c52 l32i a5, a12, 0x2bc +40203a70: a70c movi.n a7, 10 +40203a72: 0279e6 bgei a9, 7, 40203a78 +40203a75: 03c972 addi a7, a9, 3 +40203a78: 02dc22 addmi a2, a12, 0x200 +40203a7b: 0802a2 l8ui a10, a2, 8 +40203a7e: a3a032 movi a3, 163 +40203a81: 353a add.n a3, a5, a3 +40203a83: 060c movi.n a6, 0 +40203a85: 0b1a66 bnei a10, 1, 40203a94 +40203a88: 090262 l8ui a6, a2, 9 +40203a8b: 5a0c movi.n a10, 5 +40203a8d: 020c movi.n a2, 0 +40203a8f: 83a260 moveqz a10, a2, a6 +40203a92: 0a6d mov.n a6, a10 +40203a94: 373a add.n a3, a7, a3 +40203a96: 070c movi.n a7, 0 +40203a98: 0589a6 blti a9, 8, 40203aa1 +40203a9b: c04480 sub a4, a4, a8 +40203a9e: fbc472 addi a7, a4, -5 +40203aa1: 263a add.n a2, a6, a3 +40203aa3: 562c32 l32i a3, a12, 0x158 +40203aa6: 0f0c movi.n a15, 0 +40203aa8: b61c movi.n a6, 27 +40203aaa: 272a add.n a2, a7, a2 +40203aac: 836f30 moveqz a6, a15, a3 +40203aaf: 0f4d mov.n a4, a15 +40203ab1: f62a add.n a15, a6, a2 +40203ab3: 782c22 l32i a2, a12, 0x1e0 +40203ab6: 559b addi.n a5, a5, 9 +40203ab8: 934530 movnez a4, a5, a3 +40203abb: f28c beqz.n a2, 40203ace +40203abd: 0228 l32i.n a2, a2, 0 +40203abf: b28c beqz.n a2, 40203ace +40203ac1: d149 s32i.n a4, a1, 52 +40203ac3: 0002c0 callx0 a2 +40203ac6: b30c movi.n a3, 11 +40203ac8: 0d2142 l32i a4, a1, 52 +40203acb: 017226 beqi a2, 7, 40203ad0 +40203ace: 030c movi.n a3, 0 +40203ad0: f4fa add.n a15, a4, a15 +40203ad2: 592c22 l32i a2, a12, 0x164 +40203ad5: ff3a add.n a15, a15, a3 +40203ad7: 0f4d mov.n a4, a15 +40203ad9: 928c beqz.n a2, 40203ae6 +40203adb: 1238 l32i.n a3, a2, 4 +40203add: 538c beqz.n a3, 40203ae6 +40203adf: 080242 l8ui a4, a2, 8 +40203ae2: 44ab addi.n a4, a4, 10 +40203ae4: 44fa add.n a4, a4, a15 +40203ae6: 18a032 movi a3, 24 +40203ae9: 1cc122 addi a2, a1, 28 +40203aec: 025cc5 call0 402060bc +40203aef: 8129 s32i.n a2, a1, 32 +40203af1: 8138 l32i.n a3, a1, 32 +40203af3: 020c movi.n a2, 0 +40203af5: 029327 bne a3, a2, 40203afb +40203af8: 00d406 j 40203e4c +40203afb: 821c movi.n a2, 24 +40203afd: 0a5322 s16i a2, a3, 20 +40203b00: 03dcf2 addmi a15, a12, 0x300 +40203b03: 410f22 l8ui a2, a15, 65 +40203b06: 80a032 movi a3, 128 +40203b09: 220b addi.n a2, a2, -1 +40203b0b: 742020 extui a2, a2, 0, 8 +40203b0e: 1142f0 slli a4, a2, 1 +40203b11: 9129 s32i.n a2, a1, 36 +40203b13: 242a add.n a2, a4, a2 +40203b15: a02230 addx4 a2, a2, a3 +40203b18: 2c2a add.n a2, a12, a2 +40203b1a: 7158 l32i.n a5, a1, 28 +40203b1c: 224b addi.n a2, a2, 4 +40203b1e: b149 s32i.n a4, a1, 44 +40203b20: a129 s32i.n a2, a1, 40 +40203b22: 356d22 s32i a2, a13, 212 +40203b25: 443c movi.n a4, 52 +40203b27: 030c movi.n a3, 0 +40203b29: 0e2d mov.n a2, a14 +40203b2b: 0d6152 s32i a5, a1, 52 +40203b2e: f53801 l32r a0, 40201010 <_irom0_text_start> +40203b31: 0000c0 callx0 a0 +40203b34: d158 l32i.n a5, a1, 52 +40203b36: 840c movi.n a4, 8 +40203b38: 030c movi.n a3, 0 +40203b3a: 052d mov.n a2, a5 +40203b3c: f53501 l32r a0, 40201010 <_irom0_text_start> +40203b3f: 0000c0 callx0 a0 +40203b42: 05dc22 addmi a2, a12, 0x500 +40203b45: 3c1222 l16ui a2, a2, 120 +40203b48: d158 l32i.n a5, a1, 52 +40203b4a: 045522 s16i a2, a5, 8 +40203b4d: a128 l32i.n a2, a1, 40 +40203b4f: d159 s32i.n a5, a1, 52 +40203b51: ff2285 call0 40202d7c +40203b54: d158 l32i.n a5, a1, 52 +40203b56: 0f6d mov.n a6, a15 +40203b58: 35ab addi.n a3, a5, 10 +40203b5a: 1e39 s32i.n a3, a14, 4 +40203b5c: 055522 s16i a2, a5, 10 +40203b5f: 020c movi.n a2, 0 +40203b61: 0c4522 s8i a2, a5, 12 +40203b64: 7c48 l32i.n a4, a12, 28 +40203b66: 023d mov.n a3, a2 +40203b68: f5eb addi.n a15, a5, 14 +40203b6a: 58f4b7 bbsi a4, 27, 40203bc6 +40203b6d: f27c movi.n a2, -1 +40203b6f: 104122 s8i a2, a1, 16 +40203b72: 562c22 l32i a2, a12, 0x158 +40203b75: 029c beqz.n a2, 40203b89 +40203b77: 10c142 addi a4, a1, 16 +40203b7a: 030c movi.n a3, 0 +40203b7c: 222b addi.n a2, a2, 2 +40203b7e: d159 s32i.n a5, a1, 52 +40203b80: c169 s32i.n a6, a1, 48 +40203b82: 01f245 call0 40205aa8 +40203b85: c168 l32i.n a6, a1, 48 +40203b87: d158 l32i.n a5, a1, 52 +40203b89: af2c22 l32i a2, a12, 0x2bc +40203b8c: 0d4522 s8i a2, a5, 13 +40203b8f: 430622 l8ui a2, a6, 67 +40203b92: af2c42 l32i a4, a12, 0x2bc +40203b95: 0b1226 beqi a2, 1, 40203ba4 +40203b98: 100122 l8ui a2, a1, 16 +40203b9b: fec222 addi a2, a2, -2 +40203b9e: 742020 extui a2, a2, 0, 8 +40203ba1: 0c22f6 bgeui a2, 2, 40203bb1 +40203ba4: 030c movi.n a3, 0 +40203ba6: 0f2d mov.n a2, a15 +40203ba8: f51a01 l32r a0, 40201010 <_irom0_text_start> +40203bab: 0000c0 callx0 a0 +40203bae: 000286 j 40203bbc +40203bb1: fde731 l32r a3, 40203350 +40203bb4: 0f2d mov.n a2, a15 +40203bb6: f51701 l32r a0, 40201014 <_irom0_text_start+0x4> +40203bb9: 0000c0 callx0 a0 +40203bbc: af2c22 l32i a2, a12, 0x2bc +40203bbf: 2f2a add.n a2, a15, a2 +40203bc1: 0001c6 j 40203bcc +40203bc4: f00000 subx8 a0, a0, a0 +40203bc7: 2f .byte 0x2f +40203bc8: 453220 extui a3, a2, 18, 5 +40203bcb: f10d ret.n +40203bcd: fbd8 l32i.n a13, a11, 60 +40203bcf: 0f3d mov.n a3, a15 +40203bd1: feebc5 call0 40202a90 +40203bd4: 9138 l32i.n a3, a1, 36 +40203bd6: b158 l32i.n a5, a1, 44 +40203bd8: 024d mov.n a4, a2 +40203bda: 253a add.n a2, a5, a3 +40203bdc: a022c0 addx4 a2, a2, a12 +40203bdf: 212222 l32i a2, a2, 132 +40203be2: fddc31 l32r a3, 40203354 +40203be5: 102230 and a2, a2, a3 +40203be8: 1f1237 beq a2, a3, 40203c0b +40203beb: 320c movi.n a2, 3 +40203bed: 004422 s8i a2, a4, 0 +40203bf0: 120c movi.n a2, 1 +40203bf2: 014422 s8i a2, a4, 1 +40203bf5: a128 l32i.n a2, a1, 40 +40203bf7: 343b addi.n a3, a4, 3 +40203bf9: c139 s32i.n a3, a1, 48 +40203bfb: 0d6142 s32i a4, a1, 52 +40203bfe: fe3f05 call0 40201ff0 +40203c01: d148 l32i.n a4, a1, 52 +40203c03: 024422 s8i a2, a4, 2 +40203c06: 0c2132 l32i a3, a1, 48 +40203c09: 034d mov.n a4, a3 +40203c0b: 322d22 l32i a2, a13, 200 +40203c0e: 3e49 s32i.n a4, a14, 12 +40203c10: 201266 bnei a2, 1, 40203c34 +40203c13: 520c movi.n a2, 5 +40203c15: 004422 s8i a2, a4, 0 +40203c18: 420c movi.n a2, 4 +40203c1a: 014422 s8i a2, a4, 1 +40203c1d: 230c movi.n a3, 2 +40203c1f: 020c movi.n a2, 0 +40203c21: 024422 s8i a2, a4, 2 +40203c24: 044422 s8i a2, a4, 4 +40203c27: 054422 s8i a2, a4, 5 +40203c2a: 034432 s8i a3, a4, 3 +40203c2d: 120c movi.n a2, 1 +40203c2f: 446b addi.n a4, a4, 6 +40203c31: 0c5e22 s16i a2, a14, 24 +40203c34: fc6751 l32r a5, 40202dd0 +40203c37: 5e49 s32i.n a4, a14, 20 +40203c39: 080522 l8ui a2, a5, 8 +40203c3c: 211266 bnei a2, 1, 40203c61 +40203c3f: 090522 l8ui a2, a5, 9 +40203c42: b29c beqz.n a2, 40203c61 +40203c44: 522c movi.n a2, 37 +40203c46: 004422 s8i a2, a4, 0 +40203c49: 320c movi.n a2, 3 +40203c4b: 014422 s8i a2, a4, 1 +40203c4e: 120c movi.n a2, 1 +40203c50: 024422 s8i a2, a4, 2 +40203c53: 0a0522 l8ui a2, a5, 10 +40203c56: 034422 s8i a2, a4, 3 +40203c59: 090522 l8ui a2, a5, 9 +40203c5c: 044422 s8i a2, a4, 4 +40203c5f: 445b addi.n a4, a4, 5 +40203c61: 0c3d mov.n a3, a12 +40203c63: 042d mov.n a2, a4 +40203c65: fe0c85 call0 40201d30 +40203c68: b158 l32i.n a5, a1, 44 +40203c6a: 9148 l32i.n a4, a1, 36 +40203c6c: 354a add.n a3, a5, a4 +40203c6e: a033c0 addx4 a3, a3, a12 +40203c71: 212332 l32i a3, a3, 132 +40203c74: c0a042 movi a4, 192 +40203c77: 105340 and a5, a3, a4 +40203c7a: 081547 beq a5, a4, 40203c86 +40203c7d: 80a442 movi a4, 0x480 +40203c80: 103340 and a3, a3, a4 +40203c83: 279347 bne a3, a4, 40203cae +40203c86: 7e29 s32i.n a2, a14, 28 +40203c88: a32c movi.n a3, 42 +40203c8a: 004232 s8i a3, a2, 0 +40203c8d: 130c movi.n a3, 1 +40203c8f: 014232 s8i a3, a2, 1 +40203c92: 7c58 l32i.n a5, a12, 28 +40203c94: ff6b31 l32r a3, 40203a40 +40203c97: 060c movi.n a6, 0 +40203c99: 104530 and a4, a5, a3 +40203c9c: 230c movi.n a3, 2 +40203c9e: 833640 moveqz a3, a6, a4 +40203ca1: 047557 bbci a5, 21, 40203ca9 +40203ca4: 440c movi.n a4, 4 +40203ca6: 203340 or a3, a3, a4 +40203ca9: 024232 s8i a3, a2, 2 +40203cac: 223b addi.n a2, a2, 3 +40203cae: 0f3d mov.n a3, a15 +40203cb0: fee2c5 call0 40202ae0 +40203cb3: fda931 l32r a3, 40203358 +40203cb6: ffa042 movi a4, 255 +40203cb9: 009352 l16si a5, a3, 0 +40203cbc: 130c movi.n a3, 1 +40203cbe: 25cc bnez.n a5, 40203cc4 +40203cc0: 040c movi.n a4, 0 +40203cc2: 043d mov.n a3, a4 +40203cc4: ce29 s32i.n a2, a14, 48 +40203cc6: f45050 extui a5, a5, 0, 16 +40203cc9: 044b85 call0 40208184 +40203ccc: 592c32 l32i a3, a12, 0x164 +40203ccf: 02fd mov.n a15, a2 +40203cd1: 039c beqz.n a3, 40203ce5 +40203cd3: 012342 l32i a4, a3, 4 +40203cd6: 00b416 beqz a4, 40203ce5 +40203cd9: 080352 l8ui a5, a3, 8 +40203cdc: 01c332 addi a3, a3, 1 +40203cdf: 045305 call0 40208210 +40203ce2: 20f220 or a15, a2, a2 +40203ce5: 332d22 l32i a2, a13, 204 +40203ce8: c29c beqz.n a2, 40203d08 +40203cea: 6228 l32i.n a2, a2, 24 +40203cec: 142232 l32i a3, a2, 80 +40203cef: 539c beqz.n a3, 40203d08 +40203cf1: 152242 l32i a4, a2, 84 +40203cf4: 202ff0 or a2, a15, a15 +40203cf7: f4c701 l32r a0, 40201014 <_irom0_text_start+0x4> +40203cfa: 0000c0 callx0 a0 +40203cfd: 332d22 l32i a2, a13, 204 +40203d00: 6228 l32i.n a2, a2, 24 +40203d02: 152222 l32i a2, a2, 84 +40203d05: 80ff20 add a15, a15, a2 +40203d08: 352d22 l32i a2, a13, 212 +40203d0b: 0238 l32i.n a3, a2, 0 +40203d0d: fd9321 l32r a2, 4020335c +40203d10: 0f0327 bnone a3, a2, 40203d23 +40203d13: 0d3d mov.n a3, a13 +40203d15: 0f2d mov.n a2, a15 +40203d17: 04e445 call0 40208b5c +40203d1a: 8e29 s32i.n a2, a14, 32 +40203d1c: 0d3d mov.n a3, a13 +40203d1e: 04e8c5 call0 40208bac +40203d21: 02fd mov.n a15, a2 +40203d23: 562c22 l32i a2, a12, 0x158 +40203d26: 129c beqz.n a2, 40203d3b +40203d28: 0f2d mov.n a2, a15 +40203d2a: 01e385 call0 40205b64 +40203d2d: af2c42 l32i a4, a12, 0x2bc +40203d30: fd8831 l32r a3, 40203350 +40203d33: 744040 extui a4, a4, 0, 8 +40203d36: 044905 call0 402081c8 +40203d39: 02fd mov.n a15, a2 +40203d3b: 782c22 l32i a2, a12, 0x1e0 +40203d3e: c29c beqz.n a2, 40203d5e +40203d40: 0228 l32i.n a2, a2, 0 +40203d42: 018216 beqz a2, 40203d5e +40203d45: 0002c0 callx0 a2 +40203d48: 127266 bnei a2, 7, 40203d5e +40203d4b: 040c movi.n a4, 0 +40203d4d: 0f2d mov.n a2, a15 +40203d4f: 0149 s32i.n a4, a1, 0 +40203d51: 047d mov.n a7, a4 +40203d53: 046d mov.n a6, a4 +40203d55: 045d mov.n a5, a4 +40203d57: 130c movi.n a3, 1 +40203d59: 043c05 call0 4020811c +40203d5c: 02fd mov.n a15, a2 +40203d5e: 082152 l32i a5, a1, 32 +40203d61: 052e22 l32i a2, a14, 20 +40203d64: 1538 l32i.n a3, a5, 4 +40203d66: c02f20 sub a2, a15, a2 +40203d69: 0d5e22 s16i a2, a14, 26 +40203d6c: 1348 l32i.n a4, a3, 4 +40203d6e: 0a1522 l16ui a2, a5, 20 +40203d71: 442a add.n a4, a4, a2 +40203d73: c0ff40 sub a15, a15, a4 +40203d76: f4f0f0 extui a15, a15, 0, 16 +40203d79: 0b55f2 s16i a15, a5, 22 +40203d7c: 0020c0 memw +40203d7f: 0358 l32i.n a5, a3, 0 +40203d81: f97c41 l32r a4, 40202374 +40203d84: f2fa add.n a15, a2, a15 +40203d86: 204540 or a4, a5, a4 +40203d89: 0020c0 memw +40203d8c: 0349 s32i.n a4, a3, 0 +40203d8e: 0020c0 memw +40203d91: 0358 l32i.n a5, a3, 0 +40203d93: f97941 l32r a4, 40202378 +40203d96: b4f0f0 extui a15, a15, 0, 12 +40203d99: 204540 or a4, a5, a4 +40203d9c: 0020c0 memw +40203d9f: 0349 s32i.n a4, a3, 0 +40203da1: 0020c0 memw +40203da4: 0358 l32i.n a5, a3, 0 +40203da6: f97541 l32r a4, 4020237c +40203da9: 112f40 slli a2, a15, 12 +40203dac: 104540 and a4, a5, a4 +40203daf: 0020c0 memw +40203db2: 0349 s32i.n a4, a3, 0 +40203db4: 0020c0 memw +40203db7: 03f8 l32i.n a15, a3, 0 +40203db9: f97141 l32r a4, 40202380 +40203dbc: 10ff40 and a15, a15, a4 +40203dbf: 20ff20 or a15, a15, a2 +40203dc2: 0020c0 memw +40203dc5: 03f9 s32i.n a15, a3, 0 +40203dc7: 262d22 l32i a2, a13, 152 +40203dca: f89b31 l32r a3, 40202038 +40203dcd: 640c movi.n a4, 6 +40203dcf: 246d22 s32i a2, a13, 144 +40203dd2: 16c122 addi a2, a1, 22 +40203dd5: f48f01 l32r a0, 40201014 <_irom0_text_start+0x4> +40203dd8: 0000c0 callx0 a0 +40203ddb: 10c132 addi a3, a1, 16 +40203dde: 01a022 movi a2, 1 +40203de1: 0faac5 call0 40213890 +40203de4: 10c122 addi a2, a1, 16 +40203de7: 8138 l32i.n a3, a1, 32 +40203de9: 026d mov.n a6, a2 +40203deb: 0129 s32i.n a2, a1, 0 +40203ded: 16c172 addi a7, a1, 22 +40203df0: 051c movi.n a5, 16 +40203df2: 80a042 movi a4, 128 +40203df5: 0d2d mov.n a2, a13 +40203df7: fe99c5 call0 40202794 +40203dfa: 8138 l32i.n a3, a1, 32 +40203dfc: f95c71 l32r a7, 4020236c +40203dff: 9328 l32i.n a2, a3, 36 +40203e01: e57c movi.n a5, -2 +40203e03: 1288 l32i.n a8, a2, 4 +40203e05: 0268 l32i.n a6, a2, 0 +40203e07: 107870 and a7, a8, a7 +40203e0a: 087c movi.n a8, -16 +40203e0c: 108780 and a8, a7, a8 +40203e0f: 770c movi.n a7, 7 +40203e11: 414660 srli a4, a6, 6 +40203e14: 207870 or a7, a8, a7 +40203e17: 106650 and a6, a6, a5 +40203e1a: f95531 l32r a3, 40202370 +40203e1d: 250c movi.n a5, 2 +40203e1f: 1279 s32i.n a7, a2, 4 +40203e21: 205650 or a5, a6, a5 +40203e24: 0020c0 memw +40203e27: 0338 l32i.n a3, a3, 0 +40203e29: 0259 s32i.n a5, a2, 0 +40203e2b: 8158 l32i.n a5, a1, 32 +40203e2d: 6239 s32i.n a3, a2, 24 +40203e2f: 030c movi.n a3, 0 +40203e31: 7539 s32i.n a3, a5, 28 +40203e33: 031c movi.n a3, 16 +40203e35: 4239 s32i.n a3, a2, 16 +40203e37: ff0331 l32r a3, 40203a44 +40203e3a: 203430 or a3, a4, a3 +40203e3d: 1143a0 slli a4, a3, 6 +40203e40: 0238 l32i.n a3, a2, 0 +40203e42: 543030 extui a3, a3, 0, 6 +40203e45: 203340 or a3, a3, a4 +40203e48: 0239 s32i.n a3, a2, 0 +40203e4a: 052d mov.n a2, a5 +40203e4c: 172102 l32i a0, a1, 92 +40203e4f: 1621c2 l32i a12, a1, 88 +40203e52: 1521d2 l32i a13, a1, 84 +40203e55: 1421e2 l32i a14, a1, 80 +40203e58: 1321f2 l32i a15, a1, 76 +40203e5b: 60c112 addi a1, a1, 96 +40203e5e: f00d ret.n +40203e60: 01e8 l32i.n a14, a1, 0 +40203e62: 22cb addi.n a2, a2, 12 +40203e64: 010242 l8ui a4, a2, 1 +40203e67: 023d mov.n a3, a2 +40203e69: 020c movi.n a2, 0 +40203e6b: 2b44b6 bltui a4, 4, 40203e9a +40203e6e: 632b addi.n a6, a3, 2 +40203e70: 020352 l8ui a5, a3, 2 +40203e73: 030332 l8ui a3, a3, 3 +40203e76: 020622 l8ui a2, a6, 2 +40203e79: 113380 slli a3, a3, 8 +40203e7c: 204350 or a4, a3, a5 +40203e7f: 112200 slli a2, a2, 16 +40203e82: 203240 or a3, a2, a4 +40203e85: 030622 l8ui a2, a6, 3 +40203e88: 140c movi.n a4, 1 +40203e8a: 012280 slli a2, a2, 24 +40203e8d: 202230 or a2, a2, a3 +40203e90: fff431 l32r a3, 40203e60 +40203e93: 323a add.n a3, a2, a3 +40203e95: 020c movi.n a2, 0 +40203e97: 832430 moveqz a2, a4, a3 +40203e9a: f00d ret.n +40203e9c: 400814 excw +40203e9f: 53ec00 excw +40203ea2: 32ac beqz.n a2, 40203ec9 +40203ea4: 010252 l8ui a5, a2, 1 +40203ea7: fffd71 l32r a7, 40203e9c +40203eaa: 023d mov.n a3, a2 +40203eac: 661c movi.n a6, 22 +40203eae: c04320 sub a4, a3, a2 +40203eb1: 10a457 bge a4, a5, 40203ec5 +40203eb4: 020342 l8ui a4, a3, 2 +40203eb7: 644040 extui a4, a4, 0, 7 +40203eba: 0b3647 bltu a6, a4, 40203ec9 +40203ebd: 331b addi.n a3, a3, 1 +40203ebf: 065747 bbc a7, a4, 40203ec9 +40203ec2: fffa06 j 40203eae +40203ec5: 120c movi.n a2, 1 +40203ec7: f00d ret.n +40203ec9: 020c movi.n a2, 0 +40203ecb: f00d ret.n +40203ecd: 000000 ill +40203ed0: 8039 s32i.n a3, a0, 32 +40203ed2: fe .byte 0xfe +40203ed3: 3f .byte 0x3f +40203ed4: 1388 l32i.n a8, a3, 4 +40203ed6: df0000 excw +40203ed9: 000493 excw +40203edc: 0fa000 excw + ... + +40203ee0 : +40203ee0: f0c112 addi a1, a1, -16 +40203ee3: 21c9 s32i.n a12, a1, 8 +40203ee5: 02cd mov.n a12, a2 +40203ee7: f92721 l32r a2, 40202384 +40203eea: 3109 s32i.n a0, a1, 12 +40203eec: 0020c0 memw +40203eef: 0248 l32i.n a4, a2, 0 +40203ef1: fff721 l32r a2, 40203ed0 +40203ef4: 11d9 s32i.n a13, a1, 4 +40203ef6: 01e9 s32i.n a14, a1, 0 +40203ef8: 000232 l8ui a3, a2, 0 +40203efb: 492c22 l32i a2, a12, 0x124 +40203efe: 63cc bnez.n a3, 40203f08 +40203f00: fff531 l32r a3, 40203ed4 +40203f03: 000106 j 40203f0b +40203f06: 320000 excw +40203f09: 2038a1 l32r a10, 401cbfec <_lit4_end+0xc5cc0> +40203f0c: 01c024 excw +40203f0f: ef .byte 0xef +40203f10: 00c0f7 bnall a0, a15, 40203f14 +40203f13: f13100 excw +40203f16: ff .byte 0xff +40203f17: 2eb327 bgeu a3, a2, 40203f49 +40203f1a: f712d1 l32r a13, 40201b64 +40203f1d: 04a042 movi a4, 4 +40203f20: 5d28 l32i.n a2, a13, 20 +40203f22: a0a032 movi a3, 160 +40203f25: 2422e2 l32i a14, a2, 144 +40203f28: 2462c2 s32i a12, a2, 144 +40203f2b: feeac5 call0 40202dd8 +40203f2e: 5d28 l32i.n a2, a13, 20 +40203f30: 240c movi.n a4, 2 +40203f32: c0a032 movi a3, 192 +40203f35: feea05 call0 40202dd8 +40203f38: 052d22 l32i a2, a13, 20 +40203f3b: 203cc0 or a3, a12, a12 +40203f3e: 2462e2 s32i a14, a2, 144 +40203f41: 061a85 call0 4020a0ec +40203f44: 000286 j 40203f52 +40203f47: 310000 srai a0, a0, 16 +40203f4a: c0ffe4 excw +40203f4d: 202c movi.n a0, 34 +40203f4f: 020785 call0 40205fc8 +40203f52: 032102 l32i a0, a1, 12 +40203f55: 0221c2 l32i a12, a1, 8 +40203f58: 11d8 l32i.n a13, a1, 4 +40203f5a: 01e8 l32i.n a14, a1, 0 +40203f5c: 10c112 addi a1, a1, 16 +40203f5f: f00d ret.n +40203f61: 000000 ill +40203f64: fece44 excw +40203f67: 3f .byte 0x3f +40203f68: ff .byte 0xff +40203f69: ef .byte 0xef +40203f6a: ff .byte 0xff +40203f6b: ff .byte 0xff +40203f6c: fece45 call0 40202c54 +40203f6f: 3f .byte 0x3f +40203f70: fe82a5 excw +40203f73: 3f .byte 0x3f +40203f74: ffca add.n a15, a15, a12 +40203f76: e44022 s8i a2, a0, 228 +40203f79: ce .byte 0xce +40203f7a: fe .byte 0xfe +40203f7b: 3f .byte 0x3f +40203f7c: 8e6c movi.n a14, -24 +40203f7e: fe .byte 0xfe +40203f7f: 3f .byte 0x3f +40203f80: ce3c movi.n a14, 60 +40203f82: fe .byte 0xfe +40203f83: 3f .byte 0x3f +40203f84: e5d8 l32i.n a13, a5, 56 +40203f86: fe .byte 0xfe +40203f87: 3f .byte 0x3f +40203f88: fe8e70 excw +40203f8b: 3f .byte 0x3f +40203f8c: 805d excw +40203f8e: fe .byte 0xfe +40203f8f: 3f .byte 0x3f +40203f90: 6e .byte 0x6e +40203f91: 8e .byte 0x8e +40203f92: fe .byte 0xfe +40203f93: 3f .byte 0x3f +40203f94: 8e78 l32i.n a7, a14, 32 +40203f96: fe .byte 0xfe +40203f97: 3f .byte 0x3f +40203f98: ffbd excw +40203f9a: 784022 s8i a2, a0, 120 +40203f9d: 600010 neg a0, a1 +40203fa0: 001000 excw +40203fa3: e0a000 subx4 a10, a0, a0 +40203fa6: fe .byte 0xfe +40203fa7: 3f .byte 0x3f +40203fa8: 4378 l32i.n a7, a3, 16 +40203faa: 744020 extui a4, a2, 0, 8 +40203fad: 8e .byte 0x8e +40203fae: fe .byte 0xfe +40203faf: 3f .byte 0x3f +40203fb0: ce48 l32i.n a4, a14, 48 +40203fb2: fe .byte 0xfe +40203fb3: 3f .byte 0x3f +40203fb4: 5ea8 l32i.n a10, a14, 20 +40203fb6: 4c4010 excw +40203fb9: 101b addi.n a1, a0, 1 +40203fbb: 1abc40 excw +40203fbe: 124010 excw +40203fc1: d9e0c1 l32r a12, 401fa744 <_lit4_end+0xf4418> +40203fc4: 31f951 l32r a5, 401d07a8 <_lit4_end+0xca47c> +40203fc7: 7109 s32i.n a0, a1, 28 +40203fc9: 61c9 s32i.n a12, a1, 24 +40203fcb: 41e9 s32i.n a14, a1, 16 +40203fcd: fff901 l32r a0, 40203fb4 +40203fd0: 0000c0 callx0 a0 +40203fd3: ffe4f1 l32r a15, 40203f64 +40203fd6: 02dd mov.n a13, a2 +40203fd8: 000f22 l8ui a2, a15, 0 +40203fdb: 349216 beqz a2, 40204328 +40203fde: 020c movi.n a2, 0 +40203fe0: 004f22 s8i a2, a15, 0 +40203fe3: f6e021 l32r a2, 40201b64 +40203fe6: d37c movi.n a3, -3 +40203fe8: 02d242 addmi a4, a2, 0x200 +40203feb: 140452 l8ui a5, a4, 20 +40203fee: ffdfc1 l32r a12, 40203f6c +40203ff1: 103530 and a3, a5, a3 +40203ff4: ffe3e1 l32r a14, 40203f80 +40203ff7: 7a1366 bnei a3, 1, 40204075 +40203ffa: 4228 l32i.n a2, a2, 16 +40203ffc: d20232 l8ui a3, a2, 210 +40203fff: fba022 movi a2, 251 +40204002: 102320 and a2, a3, a2 +40204005: 6c1266 bnei a2, 1, 40204075 +40204008: f6d831 l32r a3, 40201b68 +4020400b: ffd721 l32r a2, 40203f68 +4020400e: 0020c0 memw +40204011: 0348 l32i.n a4, a3, 0 +40204013: 102420 and a2, a4, a2 +40204016: 0020c0 memw +40204019: 0329 s32i.n a2, a3, 0 +4020401b: 000c22 l8ui a2, a12, 0 +4020401e: 301266 bnei a2, 1, 40204052 +40204021: fccdf1 l32r a15, 40203358 +40204024: ffd331 l32r a3, 40203f70 +40204027: 020c movi.n a2, 0 +40204029: 004322 s8i a2, a3, 0 +4020402c: 009f32 l16si a3, a15, 0 +4020402f: ffd121 l32r a2, 40203f74 +40204032: f80601 l32r a0, 4020204c +40204035: 0000c0 callx0 a0 +40204038: 009f32 l16si a3, a15, 0 +4020403b: 060d22 l8ui a2, a13, 6 +4020403e: 123c85 call0 40216408 +40204041: ffcd21 l32r a2, 40203f78 +40204044: 001f32 l16ui a3, a15, 0 +40204047: ffca41 l32r a4, 40203f70 +4020404a: 005232 s16i a3, a2, 0 +4020404d: 120c movi.n a2, 1 +4020404f: 004422 s8i a2, a4, 0 +40204052: ffca31 l32r a3, 40203f7c +40204055: 020c movi.n a2, 0 +40204057: 004322 s8i a2, a3, 0 +4020405a: 004c22 s8i a2, a12, 0 +4020405d: 004e22 s8i a2, a14, 0 +40204060: ff9d31 l32r a3, 40203ed4 +40204063: ffc821 l32r a2, 40203f84 +40204066: 150c movi.n a5, 1 +40204068: 040c movi.n a4, 0 +4020406a: ffd301 l32r a0, 40203fb8 +4020406d: 0000c0 callx0 a0 +40204070: 00bc86 j 40204366 +40204073: 210000 srai a0, a0, 0 +40204076: 32ffc4 excw +40204079: 160012 l8ui a1, a0, 22 +4020407c: 2113c3 excw +4020407f: 41ffc3 excw +40204082: 32ffc3 excw +40204085: 660002 l8ui a0, a0, 102 +40204088: 510d13 excw +4020408b: 32ffc2 excw +4020408e: 320015 excw +40204091: 0c0054 excw +40204094: 423203 excw +40204097: b92100 excw +4020409a: ff .byte 0xff +4020409b: 000232 l8ui a3, a2, 0 +4020409e: 057356 bnez a3, 402040f9 +402040a1: ffbc31 l32r a3, 40203f94 +402040a4: 009322 l16si a2, a3, 0 +402040a7: 009432 l16si a3, a4, 0 +402040aa: 902220 addx2 a2, a2, a2 +402040ad: 533b addi.n a5, a3, 3 +402040af: a33530 movltz a3, a5, a3 +402040b2: 523b addi.n a5, a2, 3 +402040b4: a32520 movltz a2, a5, a2 +402040b7: 213230 srai a3, a3, 2 +402040ba: 212220 srai a2, a2, 2 +402040bd: 232a add.n a2, a3, a2 +402040bf: 112200 slli a2, a2, 16 +402040c2: 312020 srai a2, a2, 16 +402040c5: 005422 s16i a2, a4, 0 +402040c8: ffac41 l32r a4, 40203f78 +402040cb: 009432 l16si a3, a4, 0 +402040ce: c02230 sub a2, a2, a3 +402040d1: 832c movi.n a3, 40 +402040d3: 0da327 bge a3, a2, 402040e4 +402040d6: fca031 l32r a3, 40203358 +402040d9: 001322 l16ui a2, a3, 0 +402040dc: 28c222 addi a2, a2, 40 +402040df: 001986 j 40204149 +402040e2: 320000 excw +402040e5: af .byte 0xaf +402040e6: 37d8 l32i.n a13, a7, 12 +402040e8: 860222 l8ui a2, a2, 134 +402040eb: 310030 srai a0, a3, 16 +402040ee: fc9a add.n a15, a12, a9 +402040f0: 001322 l16ui a2, a3, 0 +402040f3: d8c222 addi a2, a2, -40 +402040f6: 0013c6 j 40204149 +402040f9: ffa651 l32r a5, 40203f94 +402040fc: 030c movi.n a3, 0 +402040fe: 004232 s8i a3, a2, 0 +40204101: 009422 l16si a2, a4, 0 +40204104: 009532 l16si a3, a5, 0 +40204107: 523b addi.n a5, a2, 3 +40204109: 903330 addx2 a3, a3, a3 +4020410c: a32520 movltz a2, a5, a2 +4020410f: 533b addi.n a5, a3, 3 +40204111: a33530 movltz a3, a5, a3 +40204114: 213230 srai a3, a3, 2 +40204117: 212220 srai a2, a2, 2 +4020411a: 802230 add a2, a2, a3 +4020411d: 112200 slli a2, a2, 16 +40204120: 312020 srai a2, a2, 16 +40204123: 005422 s16i a2, a4, 0 +40204126: ff9441 l32r a4, 40203f78 +40204129: 009432 l16si a3, a4, 0 +4020412c: 045c movi.n a4, 80 +4020412e: c03230 sub a3, a2, a3 +40204131: 28c332 addi a3, a3, 40 +40204134: 78b437 bgeu a4, a3, 402041b0 +40204137: 28a032 movi a3, 40 +4020413a: f6b701 l32r a0, 40201c18 +4020413d: 0000c0 callx0 a0 +40204140: a02220 addx4 a2, a2, a2 +40204143: fc8531 l32r a3, 40203358 +40204146: 1122d0 slli a2, a2, 3 +40204149: fc8341 l32r a4, 40203358 +4020414c: 005322 s16i a2, a3, 0 +4020414f: 009452 l16si a5, a4, 0 +40204152: c0ae22 movi a2, 0xfffffec0 +40204155: 04fd mov.n a15, a4 +40204157: 02a527 bge a5, a2, 4020415d +4020415a: 005f22 s16i a2, a15, 0 +4020415d: 009f22 l16si a2, a15, 0 +40204160: 0512a6 blti a2, 1, 40204169 +40204163: 00a022 movi a2, 0 +40204166: 005f22 s16i a2, a15, 0 +40204169: ff8151 l32r a5, 40203f70 +4020416c: 00a022 movi a2, 0 +4020416f: 004522 s8i a2, a5, 0 +40204172: 009f32 l16si a3, a15, 0 +40204175: ff8821 l32r a2, 40203f98 +40204178: f7b501 l32r a0, 4020204c +4020417b: 0000c0 callx0 a0 +4020417e: 009f32 l16si a3, a15, 0 +40204181: 060d22 l8ui a2, a13, 6 +40204184: 122805 call0 40216408 +40204187: 009f22 l16si a2, a15, 0 +4020418a: ff7b31 l32r a3, 40203f78 +4020418d: ff7841 l32r a4, 40203f70 +40204190: 005322 s16i a2, a3, 0 +40204193: 01a032 movi a3, 1 +40204196: 004432 s8i a3, a4, 0 +40204199: ff8041 l32r a4, 40203f9c +4020419c: 112200 slli a2, a2, 16 +4020419f: 0020c0 memw +402041a2: 002432 l32i a3, a4, 0 +402041a5: f43030 extui a3, a3, 0, 16 +402041a8: 202320 or a2, a3, a2 +402041ab: 0020c0 memw +402041ae: 0429 s32i.n a2, a4, 0 +402041b0: 020c movi.n a2, 0 +402041b2: 004c22 s8i a2, a12, 0 +402041b5: 004e22 s8i a2, a14, 0 +402041b8: 004646 j 402042d5 +402041bb: 023526 beqi a5, 3, 402041c1 +402041be: 0037c6 j 402042a1 +402041c1: 000422 l8ui a2, a4, 0 +402041c4: 0d9256 bnez a2, 402042a1 +402041c7: 000e22 l8ui a2, a14, 0 +402041ca: c30c movi.n a3, 12 +402041cc: 01c222 addi a2, a2, 1 +402041cf: 742020 extui a2, a2, 0, 8 +402041d2: 004e22 s8i a2, a14, 0 +402041d5: f5c201 l32r a0, 402018e0 +402041d8: 0000c0 callx0 a0 +402041db: 742020 extui a2, a2, 0, 8 +402041de: 22ec bnez.n a2, 40204204 +402041e0: 1e0c movi.n a14, 1 +402041e2: ff6621 l32r a2, 40203f7c +402041e5: 004ce2 s8i a14, a12, 0 +402041e8: ff62c1 l32r a12, 40203f70 +402041eb: 0042e2 s8i a14, a2, 0 +402041ee: 020c movi.n a2, 0 +402041f0: 004c22 s8i a2, a12, 0 +402041f3: 060d22 l8ui a2, a13, 6 +402041f6: 030c movi.n a3, 0 +402041f8: 004fe2 s8i a14, a15, 0 +402041fb: 1220c5 call0 40216408 +402041fe: 030c movi.n a3, 0 +40204200: 000a86 j 4020422e +40204203: 126600 excw +40204206: 0c2254 excw +40204209: 126600 excw +4020420c: 4e .byte 0x4e +4020420d: ff5b21 l32r a2, 40203f7c +40204210: 230c movi.n a3, 2 +40204212: ff57c1 l32r a12, 40203f70 +40204215: 004232 s8i a3, a2, 0 +40204218: 020c movi.n a2, 0 +4020421a: 004c22 s8i a2, a12, 0 +4020421d: 060d22 l8ui a2, a13, 6 +40204220: 38af32 movi a3, -200 +40204223: 1e0c movi.n a14, 1 +40204225: 004fe2 s8i a14, a15, 0 +40204228: 121dc5 call0 40216408 +4020422b: 38af32 movi a3, -200 +4020422e: ff5221 l32r a2, 40203f78 +40204231: 004ce2 s8i a14, a12, 0 +40204234: 005232 s16i a3, a2, 0 +40204237: f64c31 l32r a3, 40201b68 +4020423a: ff5921 l32r a2, 40203fa0 +4020423d: 0020c0 memw +40204240: 0348 l32i.n a4, a3, 0 +40204242: ff5851 l32r a5, 40203fa4 +40204245: 202420 or a2, a4, a2 +40204248: ff5841 l32r a4, 40203fa8 +4020424b: 0020c0 memw +4020424e: 0329 s32i.n a2, a3, 0 +40204250: 330c movi.n a3, 3 +40204252: 0fa122 movi a2, 0x10f +40204255: 026c85 call0 40206920 +40204258: 001e46 j 402042d5 +4020425b: 0c2200 excw +4020425e: 126600 excw +40204261: 413172 excw +40204264: 4021f6 bgeui a1, 2, 402042a8 +40204267: ff .byte 0xff +40204268: 0020c0 memw +4020426b: 0348 l32i.n a4, a3, 0 +4020426d: ff40f1 l32r a15, 40203f70 +40204270: 102420 and a2, a4, a2 +40204273: 0020c0 memw +40204276: 0329 s32i.n a2, a3, 0 +40204278: 00a022 movi a2, 0 +4020427b: 004c22 s8i a2, a12, 0 +4020427e: fc36c1 l32r a12, 40203358 +40204281: 004e22 s8i a2, a14, 0 +40204284: 004f22 s8i a2, a15, 0 +40204287: 009c32 l16si a3, a12, 0 +4020428a: 060d22 l8ui a2, a13, 6 +4020428d: 121785 call0 40216408 +40204290: ff3a21 l32r a2, 40203f78 +40204293: 001c32 l16ui a3, a12, 0 +40204296: 005232 s16i a3, a2, 0 +40204299: 120c movi.n a2, 1 +4020429b: 004f22 s8i a2, a15, 0 +4020429e: 000cc6 j 402042d5 +402042a1: ff3621 l32r a2, 40203f7c +402042a4: 0f0c movi.n a15, 0 +402042a6: 0042f2 s8i a15, a2, 0 +402042a9: fc2b21 l32r a2, 40203358 +402042ac: ff3151 l32r a5, 40203f70 +402042af: 009232 l16si a3, a2, 0 +402042b2: 060d22 l8ui a2, a13, 6 +402042b5: 0045f2 s8i a15, a5, 0 +402042b8: 1214c5 call0 40216408 +402042bb: fc2741 l32r a4, 40203358 +402042be: ff2e21 l32r a2, 40203f78 +402042c1: 001432 l16ui a3, a4, 0 +402042c4: ff2b51 l32r a5, 40203f70 +402042c7: 005232 s16i a3, a2, 0 +402042ca: 120c movi.n a2, 1 +402042cc: 004522 s8i a2, a5, 0 +402042cf: 004cf2 s8i a15, a12, 0 +402042d2: 004ef2 s8i a15, a14, 0 +402042d5: ff2f31 l32r a3, 40203f94 +402042d8: 020c movi.n a2, 0 +402042da: 005322 s16i a2, a3, 0 +402042dd: ff3321 l32r a2, 40203fac +402042e0: 0c0c movi.n a12, 0 +402042e2: ff2941 l32r a4, 40203f88 +402042e5: 0062c2 s32i a12, a2, 0 +402042e8: ff2721 l32r a2, 40203f84 +402042eb: 0054c2 s16i a12, a4, 0 +402042ee: ff3301 l32r a0, 40203fbc +402042f1: 0000c0 callx0 a0 +402042f4: fef831 l32r a3, 40203ed4 +402042f7: ff2321 l32r a2, 40203f84 +402042fa: 0c4d mov.n a4, a12 +402042fc: 150c movi.n a5, 1 +402042fe: ff2e01 l32r a0, 40203fb8 +40204301: 0000c0 callx0 a0 +40204304: f81b21 l32r a2, 40202370 +40204307: 0020c0 memw +4020430a: 0238 l32i.n a3, a2, 0 +4020430c: ff2921 l32r a2, 40203fb0 +4020430f: 0239 s32i.n a3, a2, 0 +40204311: f61531 l32r a3, 40201b68 +40204314: ff2321 l32r a2, 40203fa0 +40204317: 0020c0 memw +4020431a: 0348 l32i.n a4, a3, 0 +4020431c: 202420 or a2, a4, a2 +4020431f: 0020c0 memw +40204322: 0329 s32i.n a2, a3, 0 +40204324: 000f86 j 40204366 +40204327: 172100 excw +4020432a: ff .byte 0xff +4020432b: ff2401 l32r a0, 40203fbc +4020432e: 0000c0 callx0 a0 +40204331: ff1421 l32r a2, 40203f84 +40204334: 040c movi.n a4, 0 +40204336: e8a332 movi a3, 0x3e8 +40204339: 150c movi.n a5, 1 +4020433b: ff1f01 l32r a0, 40203fb8 +4020433e: 0000c0 callx0 a0 +40204341: f60931 l32r a3, 40201b68 +40204344: ff0921 l32r a2, 40203f68 +40204347: 0020c0 memw +4020434a: 0348 l32i.n a4, a3, 0 +4020434c: 102420 and a2, a4, a2 +4020434f: 0020c0 memw +40204352: 0329 s32i.n a2, a3, 0 +40204354: f80721 l32r a2, 40202370 +40204357: 0020c0 memw +4020435a: 0238 l32i.n a3, a2, 0 +4020435c: 0020c0 memw +4020435f: 0228 l32i.n a2, a2, 0 +40204361: 120c movi.n a2, 1 +40204363: 004f22 s8i a2, a15, 0 +40204366: 7108 l32i.n a0, a1, 28 +40204368: 61c8 l32i.n a12, a1, 24 +4020436a: 51d8 l32i.n a13, a1, 20 +4020436c: 41e8 l32i.n a14, a1, 16 +4020436e: 31f8 l32i.n a15, a1, 12 +40204370: 20c112 addi a1, a1, 32 +40204373: f00d ret.n +40204375: 000000 ill + +40204378 : +40204378: f0c112 addi a1, a1, -16 +4020437b: 00a022 movi a2, 0 +4020437e: 036102 s32i a0, a1, 12 +40204381: ffc3c5 call0 40203fc0 +40204384: 032102 l32i a0, a1, 12 +40204387: 10c112 addi a1, a1, 16 +4020438a: f00d ret.n +4020438c: df .byte 0xdf +4020438d: ff .byte 0xff +4020438e: 044022 s8i a2, a0, 4 +40204391: 3ffee2 excw +40204394: 5418 l32i.n a1, a4, 20 +40204396: 5c4020 excw +40204399: ce .byte 0xce +4020439a: fe .byte 0xfe +4020439b: 3f .byte 0x3f +4020439c: fece50 excw +4020439f: 3f .byte 0x3f +402043a0: ce4c movi.n a14, 76 +402043a2: fe .byte 0xfe +402043a3: 3f .byte 0x3f +402043a4: fece64 excw +402043a7: 3f .byte 0x3f +402043a8: 553c movi.n a5, 53 +402043aa: 544020 extui a4, a2, 0, 6 +402043ad: ce .byte 0xce +402043ae: fe .byte 0xfe +402043af: 3f .byte 0x3f +402043b0: 2ac8 l32i.n a12, a10, 8 +402043b2: 6c4000 excw +402043b5: 401060 excw + +402043b8 : +402043b8: 90c112 addi a1, a1, -112 +402043bb: 106122 s32i a2, a1, 64 +402043be: 102132 l32i a3, a1, 64 +402043c1: 5228 l32i.n a2, a2, 20 +402043c3: 1961d2 s32i a13, a1, 100 +402043c6: 1b6102 s32i a0, a1, 108 +402043c9: 1a61c2 s32i a12, a1, 104 +402043cc: 1861e2 s32i a14, a1, 96 +402043cf: 1761f2 s32i a15, a1, 92 +402043d2: 116122 s32i a2, a1, 68 +402043d5: 03d322 addmi a2, a3, 0x300 +402043d8: 420222 l8ui a2, a2, 66 +402043db: 230c movi.n a3, 2 +402043dd: fec222 addi a2, a2, -2 +402043e0: f5e1d1 l32r a13, 40201b64 +402043e3: 02b327 bgeu a3, a2, 402043e9 +402043e6: 005506 j 4020453e +402043e9: ffe8c1 l32r a12, 4020438c +402043ec: 5de8 l32i.n a14, a13, 20 +402043ee: 62a142 movi a4, 0x162 +402043f1: 203cc0 or a3, a12, a12 +402043f4: c21c movi.n a2, 28 +402043f6: f71601 l32r a0, 40202050 +402043f9: 0000c0 callx0 a0 +402043fc: 336e22 s32i a2, a14, 204 +402043ff: 02fd mov.n a15, a2 +40204401: 139216 beqz a2, 4020453e +40204404: 0c3d mov.n a3, a12 +40204406: 68a142 movi a4, 0x168 +40204409: cca022 movi a2, 204 +4020440c: f71101 l32r a0, 40202050 +4020440f: 0000c0 callx0 a0 +40204412: 1f29 s32i.n a2, a15, 4 +40204414: 332e22 l32i a2, a14, 204 +40204417: 1238 l32i.n a3, a2, 4 +40204419: 73cc bnez.n a3, 40204424 +4020441b: 6ba142 movi a4, 0x16b +4020441e: 0c3d mov.n a3, a12 +40204420: 004506 j 40204538 +40204423: a14200 sll a4, a2 +40204426: 6f .byte 0x6f +40204427: 0c3d mov.n a3, a12 +40204429: c24c movi.n a2, 76 +4020442b: f70901 l32r a0, 40202050 +4020442e: 0000c0 callx0 a0 +40204431: 02fd mov.n a15, a2 +40204433: 332e72 l32i a7, a14, 204 +40204436: 22ec bnez.n a2, 4020445c +40204438: 1728 l32i.n a2, a7, 4 +4020443a: 72a142 movi a4, 0x172 +4020443d: 0c3d mov.n a3, a12 +4020443f: f43201 l32r a0, 40201508 +40204442: 0000c0 callx0 a0 +40204445: 332e22 l32i a2, a14, 204 +40204448: 73a142 movi a4, 0x173 +4020444b: 203cc0 or a3, a12, a12 +4020444e: f42e01 l32r a0, 40201508 +40204451: 0000c0 callx0 a0 +40204454: 020c movi.n a2, 0 +40204456: 336e22 s32i a2, a14, 204 +40204459: 003846 j 4020453e +4020445c: 03dd22 addmi a2, a13, 0x300 +4020445f: 420232 l8ui a3, a2, 66 +40204462: 032366 bnei a3, 2, 40204469 +40204465: 130c movi.n a3, 1 +40204467: 0f39 s32i.n a3, a15, 0 +40204469: 420232 l8ui a3, a2, 66 +4020446c: 043366 bnei a3, 3, 40204474 +4020446f: 02a032 movi a3, 2 +40204472: 0f39 s32i.n a3, a15, 0 +40204474: 420222 l8ui a2, a2, 66 +40204477: 034266 bnei a2, 4, 4020447e +4020447a: 320c movi.n a2, 3 +4020447c: 0f29 s32i.n a2, a15, 0 +4020447e: 220c movi.n a2, 2 +40204480: a30c movi.n a3, 10 +40204482: 3f29 s32i.n a2, a15, 12 +40204484: 2f39 s32i.n a3, a15, 8 +40204486: 8f39 s32i.n a3, a15, 32 +40204488: 1f29 s32i.n a2, a15, 4 +4020448a: af29 s32i.n a2, a15, 40 +4020448c: 1728 l32i.n a2, a7, 4 +4020448e: af2d42 l32i a4, a13, 0x2bc +40204491: fbaf31 l32r a3, 40203350 +40204494: 10c222 addi a2, a2, 16 +40204497: f2df01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020449a: 0000c0 callx0 a0 +4020449d: 332e22 l32i a2, a14, 204 +402044a0: 8aa142 movi a4, 0x18a +402044a3: 1278 l32i.n a7, a2, 4 +402044a5: af2d22 l32i a2, a13, 0x2bc +402044a8: 0c3d mov.n a3, a12 +402044aa: c729 s32i.n a2, a7, 48 +402044ac: 024c movi.n a2, 64 +402044ae: 136172 s32i a7, a1, 76 +402044b1: f6e701 l32r a0, 40202050 +402044b4: 0000c0 callx0 a0 +402044b7: 132172 l32i a7, a1, 76 +402044ba: ffb531 l32r a3, 40204390 +402044bd: f729 s32i.n a2, a7, 60 +402044bf: 332e22 l32i a2, a14, 204 +402044c2: 1228 l32i.n a2, a2, 4 +402044c4: f278 l32i.n a7, a2, 60 +402044c6: 032d mov.n a2, a3 +402044c8: 126132 s32i a3, a1, 72 +402044cb: 136172 s32i a7, a1, 76 +402044ce: ffb801 l32r a0, 402043b0 +402044d1: 0000c0 callx0 a0 +402044d4: 132172 l32i a7, a1, 76 +402044d7: 122132 l32i a3, a1, 72 +402044da: 024d mov.n a4, a2 +402044dc: 072d mov.n a2, a7 +402044de: f2cd01 l32r a0, 40201014 <_irom0_text_start+0x4> +402044e1: 0000c0 callx0 a0 +402044e4: 332e32 l32i a3, a14, 204 +402044e7: 2ca142 movi a4, 0x12c +402044ea: 1328 l32i.n a2, a3, 4 +402044ec: 262e72 l32i a7, a14, 152 +402044ef: 2d6242 s32i a4, a2, 180 +402044f2: 142e42 l32i a4, a14, 80 +402044f5: 021c movi.n a2, 16 +402044f7: 202420 or a2, a4, a2 +402044fa: 146e22 s32i a2, a14, 80 +402044fd: 320c movi.n a2, 3 +402044ff: 544e22 s8i a2, a14, 84 +40204502: 2728 l32i.n a2, a7, 8 +40204504: 140c movi.n a4, 1 +40204506: 202240 or a2, a2, a4 +40204509: 2729 s32i.n a2, a7, 8 +4020450b: 1328 l32i.n a2, a3, 4 +4020450d: 126142 s32i a4, a1, 72 +40204510: 0998c5 call0 4020dea0 +40204513: 122142 l32i a4, a1, 72 +40204516: 013d mov.n a3, a1 +40204518: 042d mov.n a2, a4 +4020451a: 0f3745 call0 40213890 +4020451d: 332e52 l32i a5, a14, 204 +40204520: 040c movi.n a4, 0 +40204522: 0f3d mov.n a3, a15 +40204524: 012d mov.n a2, a1 +40204526: 126152 s32i a5, a1, 72 +40204529: 083885 call0 4020c8b4 +4020452c: 122152 l32i a5, a1, 72 +4020452f: 99a142 movi a4, 0x199 +40204532: 6529 s32i.n a2, a5, 24 +40204534: 0c3d mov.n a3, a12 +40204536: 0f2d mov.n a2, a15 +40204538: f3f401 l32r a0, 40201508 +4020453b: 0000c0 callx0 a0 +4020453e: 34c132 addi a3, a1, 52 +40204541: 120c movi.n a2, 1 +40204543: 0f34c5 call0 40213890 +40204546: 64a052 movi a5, 100 +40204549: 240c movi.n a4, 2 +4020454b: 34c132 addi a3, a1, 52 +4020454e: 120c movi.n a2, 1 +40204550: 1c1c05 call0 40220714 +40204553: 102132 l32i a3, a1, 64 +40204556: 020c movi.n a2, 0 +40204558: ed5322 s16i a2, a3, 0x1da +4020455b: 112132 l32i a3, a1, 68 +4020455e: 520c movi.n a2, 5 +40204560: 116322 s32i a2, a3, 68 +40204563: ff8c21 l32r a2, 40204394 +40204566: 04a032 movi a3, 4 +40204569: 1c7805 call0 40220cec +4020456c: 112122 l32i a2, a1, 68 +4020456f: 013d mov.n a3, a1 +40204571: ff4d45 call0 40203a48 +40204574: ff8931 l32r a3, 40204398 +40204577: c148 l32i.n a4, a1, 48 +40204579: 0329 s32i.n a2, a3, 0 +4020457b: ff8831 l32r a3, 4020439c +4020457e: 4228 l32i.n a2, a2, 16 +40204580: 0349 s32i.n a4, a3, 0 +40204582: 3138 l32i.n a3, a1, 12 +40204584: 18c222 addi a2, a2, 24 +40204587: c02320 sub a2, a3, a2 +4020458a: af2d32 l32i a3, a13, 0x2bc +4020458d: ff85c1 l32r a12, 402043a4 +40204590: c02230 sub a2, a2, a3 +40204593: ff8331 l32r a3, 402043a0 +40204596: 01ddd2 addmi a13, a13, 0x100 +40204599: 004322 s8i a2, a3, 0 +4020459c: 0c2d mov.n a2, a12 +4020459e: fe8701 l32r a0, 40203fbc +402045a1: 0000c0 callx0 a0 +402045a4: ff8131 l32r a3, 402043a8 +402045a7: 0c2d mov.n a2, a12 +402045a9: 040c movi.n a4, 0 +402045ab: ff8201 l32r a0, 402043b4 +402045ae: 0000c0 callx0 a0 +402045b1: de0d22 l8ui a2, a13, 222 +402045b4: ff7ed1 l32r a13, 402043ac +402045b7: 0d2266 bnei a2, 2, 402045c8 +402045ba: 102122 l32i a2, a1, 64 +402045bd: 05d2e2 addmi a14, a2, 0x500 +402045c0: 3c1e22 l16ui a2, a14, 120 +402045c3: 0001c6 j 402045ce +402045c6: 050000 extui a0, a0, 16, 1 +402045c9: 1e9b addi.n a1, a14, 9 +402045cb: 1e9e45 call0 40222fb0 +402045ce: 006d22 s32i a2, a13, 0 +402045d1: 002d32 l32i a3, a13, 0 +402045d4: 0c2d mov.n a2, a12 +402045d6: 150c movi.n a5, 1 +402045d8: 040c movi.n a4, 0 +402045da: fe7701 l32r a0, 40203fb8 +402045dd: 0000c0 callx0 a0 +402045e0: 1b2102 l32i a0, a1, 108 +402045e3: 1a21c2 l32i a12, a1, 104 +402045e6: 1921d2 l32i a13, a1, 100 +402045e9: 1821e2 l32i a14, a1, 96 +402045ec: 1721f2 l32i a15, a1, 92 +402045ef: 70c112 addi a1, a1, 112 +402045f2: f00d ret.n +402045f4: 00c000 excw +402045f7: 87a000 excw +402045fa: fe .byte 0xfe +402045fb: 3f .byte 0x3f +402045fc: 8e88 l32i.n a8, a14, 32 +402045fe: ff .byte 0xff +402045ff: ff .byte 0xff +40204600: fe18 l32i.n a1, a14, 60 +40204602: 640134 excw +40204605: fedd excw +40204607: 3f .byte 0x3f +40204608: 09f9 s32i.n a15, a9, 0 +4020460a: 000000 ill +4020460d: 000a add.n a0, a0, a0 +4020460f: 3ee000 excw +40204612: 204020 or a4, a0, a2 +40204615: 000200 excw +40204618: 020021 l32r a2, 401c4e18 <_lit4_end+0xbeaec> +4020461b: 500000 excw +4020461e: 0001f2 l8ui a15, a1, 0 +40204621: 02f250 excw +40204624: 010000 slli a0, a0, 32 +40204627: 0e2400 excw +4020462a: 00 .byte 00 +4020462b: 40 .byte 0x40 + +4020462c : +4020462c: c0a092 movi a9, 192 +4020462f: c01190 sub a1, a1, a9 +40204632: 2d61d2 s32i a13, a1, 180 +40204635: 2b61f2 s32i a15, a1, 172 +40204638: 43d8 l32i.n a13, a3, 16 +4020463a: 02fd mov.n a15, a2 +4020463c: 0228 l32i.n a2, a2, 0 +4020463e: 186132 s32i a3, a1, 96 +40204641: 1b6122 s32i a2, a1, 108 +40204644: 0d28 l32i.n a2, a13, 0 +40204646: 2f6102 s32i a0, a1, 188 +40204649: b53020 extui a3, a2, 16, 12 +4020464c: 196132 s32i a3, a1, 100 +4020464f: ffe931 l32r a3, 402045f4 +40204652: 2e61c2 s32i a12, a1, 184 +40204655: 2c61e2 s32i a14, a1, 176 +40204658: 1f6142 s32i a4, a1, 124 +4020465b: 216152 s32i a5, a1, 132 +4020465e: 070237 bnone a2, a3, 40204669 +40204661: 1d28 l32i.n a2, a13, 4 +40204663: f42820 extui a2, a2, 8, 16 +40204666: 196122 s32i a2, a1, 100 +40204669: 192142 l32i a4, a1, 100 +4020466c: f20c movi.n a2, 15 +4020466e: 023247 bltu a2, a4, 40204674 +40204671: 0289c6 j 4020509c +40204674: 182152 l32i a5, a1, 96 +40204677: 1528 l32i.n a2, a5, 4 +40204679: 12e8 l32i.n a14, a2, 4 +4020467b: 000e22 l8ui a2, a14, 0 +4020467e: 1c6122 s32i a2, a1, 112 +40204681: 142020 extui a2, a2, 0, 2 +40204684: 128c beqz.n a2, 40204689 +40204686: 028486 j 4020509c +40204689: 010e22 l8ui a2, a14, 1 +4020468c: 1c2132 l32i a3, a1, 112 +4020468f: 142020 extui a2, a2, 0, 2 +40204692: cc0c movi.n a12, 12 +40204694: 057c movi.n a5, -16 +40204696: 1d6122 s32i a2, a1, 116 +40204699: 10c3c0 and a12, a3, a12 +4020469c: 106350 and a6, a3, a5 +4020469f: 1c8c66 bnei a12, 8, 402046bf +402046a2: 193266 bnei a2, 3, 402046bf +402046a5: 040e22 l8ui a2, a14, 4 +402046a8: 1c6207 bbci a2, 0, 402046c8 +402046ab: 192122 l32i a2, a1, 100 +402046ae: 1f2152 l32i a5, a1, 124 +402046b1: fcc232 addi a3, a2, -4 +402046b4: a0c542 addi a4, a5, -96 +402046b7: 0e2d mov.n a2, a14 +402046b9: fd5205 call0 40201bdc +402046bc: 027446 j 40205091 +402046bf: 1d2152 l32i a5, a1, 116 +402046c2: 002556 bnez a5, 402046c8 +402046c5: 044c66 bnei a12, 4, 402046cd +402046c8: 5e4b addi.n a5, a14, 4 +402046ca: 000386 j 402046dc +402046cd: 192132 l32i a3, a1, 100 +402046d0: 17a022 movi a2, 23 +402046d3: 023237 bltu a2, a3, 402046d9 +402046d6: 026dc6 j 40205091 +402046d9: 10ce52 addi a5, a14, 16 +402046dc: 1a6152 s32i a5, a1, 104 +402046df: 0ace52 addi a5, a14, 10 +402046e2: 052d mov.n a2, a5 +402046e4: 246162 s32i a6, a1, 144 +402046e7: 1e6152 s32i a5, a1, 120 +402046ea: 059845 call0 4020a070 +402046ed: 027d mov.n a7, a2 +402046ef: 242162 l32i a6, a1, 144 +402046f2: 07b256 bnez a2, 40204771 +402046f5: 1c8c66 bnei a12, 8, 40204715 +402046f8: f65021 l32r a2, 40202038 +402046fb: 059745 call0 4020a070 +402046fe: 32cc bnez.n a2, 40204705 +40204700: 8c0c movi.n a12, 8 +40204702: 0262c6 j 40205091 +40204705: 1e2132 l32i a3, a1, 120 +40204708: 246f22 s32i a2, a15, 144 +4020470b: 640c movi.n a4, 6 +4020470d: 0f2d mov.n a2, a15 +4020470f: ff04c5 call0 4020375c +40204712: 025ec6 j 40205091 +40204715: 080d32 l8ui a3, a13, 8 +40204718: 838c beqz.n a3, 40204724 +4020471a: 0baf22 movi a2, -245 +4020471d: 232a add.n a2, a3, a2 +4020471f: 128c beqz.n a2, 40204724 +40204721: 025b06 j 40205091 +40204724: f64531 l32r a3, 40202038 +40204727: 1a2122 l32i a2, a1, 104 +4020472a: 06a042 movi a4, 6 +4020472d: 246162 s32i a6, a1, 144 +40204730: f53b01 l32r a0, 40201c1c +40204733: 0000c0 callx0 a0 +40204736: 242162 l32i a6, a1, 144 +40204739: 017256 bnez a2, 40204754 +4020473c: f63f21 l32r a2, 40202038 +4020473f: 246162 s32i a6, a1, 144 +40204742: 0592c5 call0 4020a070 +40204745: 207220 or a7, a2, a2 +40204748: 242162 l32i a6, a1, 144 +4020474b: 050c movi.n a5, 0 +4020474d: 057256 bnez a2, 402047a8 +40204750: 024f46 j 40205091 +40204753: 212200 srai a2, a0, 2 +40204756: 0c1b addi.n a0, a12, 1 +40204758: c23264 excw +4020475b: 212233 excw +4020475e: 621a add.n a6, a2, a1 +40204760: 012461 l32r a6, 401c4bf0 <_lit4_end+0xbe8c4> +40204763: 2e .byte 0x2e +40204764: 00c0f5 excw +40204767: 216200 srai a6, a0, 2 +4020476a: d21624 excw +4020476d: c6fc bnez.n a6, 402047ad +4020476f: 320247 bnone a2, a4, 402047a5 +40204772: 080d mov.n a0, a8 +40204774: 00a316 beqz a3, 40204782 +40204777: 0baf22 movi a2, -245 +4020477a: 802320 add a2, a3, a2 +4020477d: 128c beqz.n a2, 40204782 +4020477f: 024386 j 40205091 +40204782: f70021 l32r a2, 40202384 +40204785: 0020c0 memw +40204788: 0228 l32i.n a2, a2, 0 +4020478a: 496722 s32i a2, a7, 0x124 +4020478d: cccc bnez.n a12, 4020479d +4020478f: 50af22 movi a2, -176 +40204792: 150c movi.n a5, 1 +40204794: 802620 add a2, a6, a2 +40204797: 206152 s32i a5, a1, 128 +4020479a: 00d216 beqz a2, 402047ab +4020479d: 01d722 addmi a2, a7, 0x100 +402047a0: 030c movi.n a3, 0 +402047a2: 0a4232 s8i a3, a2, 10 +402047a5: 01a052 movi a5, 1 +402047a8: 206152 s32i a5, a1, 128 +402047ab: c0c622 addi a2, a6, -64 +402047ae: 030c movi.n a3, 0 +402047b0: 1d0c movi.n a13, 1 +402047b2: 83d320 moveqz a13, a3, a2 +402047b5: 246f72 s32i a7, a15, 144 +402047b8: 74d0d0 extui a13, a13, 0, 8 +402047bb: 1a9c37 bne a12, a3, 402047d9 +402047be: 179d37 bne a13, a3, 402047d9 +402047c1: 212152 l32i a5, a1, 132 +402047c4: 1c2122 l32i a2, a1, 112 +402047c7: c04f52 s8i a5, a15, 192 +402047ca: 026227 bbci a2, 2, 402047d0 +402047cd: 0046c6 j 402048ec +402047d0: 044d56 bnez a13, 40204818 +402047d3: 004546 j 402048ec +402047d6: 000000 ill +402047d9: 1b2152 l32i a5, a1, 108 +402047dc: 1a2122 l32i a2, a1, 104 +402047df: 06a042 movi a4, 6 +402047e2: 33c532 addi a3, a5, 51 +402047e5: 246162 s32i a6, a1, 144 +402047e8: 236172 s32i a7, a1, 140 +402047eb: f50c01 l32r a0, 40201c1c +402047ee: 0000c0 callx0 a0 +402047f1: 242162 l32i a6, a1, 144 +402047f4: 232172 l32i a7, a1, 140 +402047f7: fc6216 beqz a2, 402047c1 +402047fa: f60f31 l32r a3, 40202038 +402047fd: 1a2122 l32i a2, a1, 104 +40204800: 640c movi.n a4, 6 +40204802: f50601 l32r a0, 40201c1c +40204805: 0000c0 callx0 a0 +40204808: 242162 l32i a6, a1, 144 +4020480b: 232172 l32i a7, a1, 140 +4020480e: 128c beqz.n a2, 40204813 +40204810: 021f46 j 40205091 +40204813: ffea86 j 402047c1 +40204816: 320000 excw +40204819: 0e .byte 0xe +4020481a: a02200 addx4 a2, a2, a0 +4020481d: 208c beqz.n a0, 40204823 +4020481f: 321023 excw +40204822: 1c88a0 excw +40204825: 370d excw +40204827: 221592 l16ui a9, a5, 68 +4020482a: 0e .byte 0xe +4020482b: 202001 l32r a0, 401cc8ac <_lit4_end+0xc6580> +4020482e: 326614 excw +40204831: 0ed206 j 4020837d +40204834: 1e .byte 0x1e +40204835: 0000c6 j 4020483c +40204838: 0ed200 excw +4020483b: d018 l32i.n a1, a0, 52 +4020483d: 5234d0 excw +40204840: 1e .byte 0x1e +40204841: 8c0b addi.n a8, a12, -1 +40204843: 227c movi.n a2, -14 +40204845: 562021 l32r a2, 401da0c8 <_lit4_end+0xd3d9c> +40204848: c60872 l8ui a7, a8, 198 +4020484b: 1e .byte 0x1e +4020484c: a02200 addx4 a2, a2, a0 +4020484f: 9627d0 excw +40204852: 0e2260 excw +40204855: ce8201 l32r a0, 401f8260 <_lit4_end+0xf1f34> +40204858: 2018 l32i.n a1, a0, 8 +4020485a: 220446 j 4020d06f <__wpa_send_eapol+0x633> +4020485d: ce .byte 0xce +4020485e: 284020 excw +40204861: 328b83 excw +40204864: 192142 l32i a4, a1, 100 +40204867: c033e0 sub a3, a3, a14 +4020486a: 02a437 bge a4, a3, 40204870 +4020486d: 0215c6 j 402050c8 +40204870: 000242 l8ui a4, a2, 0 +40204873: 7fa032 movi a3, 127 +40204876: ca9437 bne a4, a3, 40204844 +40204879: ff5f31 l32r a3, 402045f8 +4020487c: 340c movi.n a4, 3 +4020487e: 01c222 addi a2, a2, 1 +40204881: 226152 s32i a5, a1, 136 +40204884: 246162 s32i a6, a1, 144 +40204887: 236172 s32i a7, a1, 140 +4020488a: f4e401 l32r a0, 40201c1c +4020488d: 0000c0 callx0 a0 +40204890: 222152 l32i a5, a1, 136 +40204893: 242162 l32i a6, a1, 144 +40204896: 232172 l32i a7, a1, 140 +40204899: fa7256 bnez a2, 40204844 +4020489c: 1e2132 l32i a3, a1, 120 +4020489f: 640c movi.n a4, 6 +402048a1: 48cf22 addi a2, a15, 72 +402048a4: 246162 s32i a6, a1, 144 +402048a7: f1db01 l32r a0, 40201014 <_irom0_text_start+0x4> +402048aa: 0000c0 callx0 a0 +402048ad: 242162 l32i a6, a1, 144 +402048b0: 009706 j 40204b10 +402048b3: a02200 addx4 a2, a2, a0 +402048b6: 9627b0 excw +402048b9: 2289 s32i.n a8, a2, 8 +402048bb: 2f .byte 0x2f +402048bc: 172726 beqi a7, 2, 402048d7 +402048bf: d72283 excw +402048c2: 022201 l32r a0, 401c514c <_lit4_end+0xbee20> +402048c5: 560a add.n a5, a6, a0 +402048c7: 70f7a2 excw +402048ca: 90dd excw +402048cc: 5f5d52 s16i a5, a13, 190 +402048cf: 000646 j 402048ec +402048d2: 010e22 l8ui a2, a14, 1 +402048d5: f06237 bbci a2, 3, 402048c9 +402048d8: 902d70 addx2 a2, a13, a7 +402048db: 5f1222 l16ui a2, a2, 190 +402048de: c02520 sub a2, a5, a2 +402048e1: 0212e6 bgei a2, 1, 402048e7 +402048e4: 01ea46 j 40205091 +402048e7: fff786 j 402048c9 +402048ea: 320000 excw +402048ed: 0c1e21 l32r a2, 401c7968 <_lit4_end+0xc163c> +402048f0: cf2264 excw +402048f3: 6248 l32i.n a4, a2, 24 +402048f5: 722461 l32r a6, 401e1188 <_lit4_end+0xdae5c> +402048f8: 012361 l32r a6, 401c4d84 <_lit4_end+0xbea58> +402048fb: c0f1c6 j 401f4cc6 <_lit4_end+0xee99a> +402048fe: 620000 excw +40204901: 722421 l32r a2, 401e1194 <_lit4_end+0xdae68> +40204904: 662321 l32r a2, 401de190 <_lit4_end+0xd7e64> +40204907: 024c movi.n a2, 64 +40204909: 01afc6 j 40204fcc +4020490c: 058c26 beqi a12, 8, 40204915 +4020490f: 1fdc16 beqz a12, 40204b10 +40204912: 01dec6 j 40205091 +40204915: 010ed2 l8ui a13, a14, 1 +40204918: 831c movi.n a3, 24 +4020491a: 14d0d0 extui a13, a13, 0, 2 +4020491d: fdcd22 addi a2, a13, -3 +40204920: ed1c movi.n a13, 30 +40204922: 93d320 movnez a13, a3, a2 +40204925: 000e32 l8ui a3, a14, 0 +40204928: 8ca022 movi a2, 140 +4020492b: 102320 and a2, a3, a2 +4020492e: 88a042 movi a4, 136 +40204931: c02240 sub a2, a2, a4 +40204934: 3d2b addi.n a3, a13, 2 +40204936: 192142 l32i a4, a1, 100 +40204939: 83d320 moveqz a13, a3, a2 +4020493c: 182152 l32i a5, a1, 96 +4020493f: f430d0 extui a3, a13, 0, 16 +40204942: fcc422 addi a2, a4, -4 +40204945: c02230 sub a2, a2, a3 +40204948: 0a5532 s16i a3, a5, 20 +4020494b: 0b5522 s16i a2, a5, 22 +4020494e: 1d2152 l32i a5, a1, 116 +40204951: 021526 beqi a5, 1, 40204957 +40204954: ff6a06 j 40204700 +40204957: 02a4d7 bge a4, a13, 4020495d +4020495a: ff6886 j 40204700 +4020495d: 0d1722 l16ui a2, a7, 26 +40204960: 740c movi.n a4, 7 +40204962: a0a032 movi a3, 160 +40204965: 685216 beqz a2, 40204fee +40204968: 010e32 l8ui a3, a14, 1 +4020496b: 2728 l32i.n a2, a7, 8 +4020496d: 302320 xor a2, a3, a2 +40204970: 106247 bbci a2, 4, 40204984 +40204973: 021c movi.n a2, 16 +40204975: 103320 and a3, a3, a2 +40204978: 202770 or a2, a7, a7 +4020497b: 236172 s32i a7, a1, 140 +4020497e: 016f85 call0 40206078 +40204981: 232172 l32i a7, a1, 140 +40204984: 010e22 l8ui a2, a14, 1 +40204987: 2a6267 bbci a2, 6, 402049b5 +4020498a: 142f22 l32i a2, a15, 80 +4020498d: 02e247 bbsi a2, 4, 40204993 +40204990: ff5b06 j 40204700 +40204993: 182132 l32i a3, a1, 96 +40204996: 0d4d mov.n a4, a13 +40204998: 0f2d mov.n a2, a15 +4020499a: 236172 s32i a7, a1, 140 +4020499d: fd9205 call0 402022c0 +402049a0: 232172 l32i a7, a1, 140 +402049a3: d59216 beqz a2, 40204700 +402049a6: 010e32 l8ui a3, a14, 1 +402049a9: bfaf22 movi a2, -65 +402049ac: 102320 and a2, a3, a2 +402049af: 014e22 s8i a2, a14, 1 +402049b2: 000346 j 402049c3 +402049b5: 182122 l32i a2, a1, 96 +402049b8: 1238 l32i.n a3, a2, 4 +402049ba: 0a1222 l16ui a2, a2, 20 +402049bd: 1348 l32i.n a4, a3, 4 +402049bf: 242a add.n a2, a4, a2 +402049c1: 1329 s32i.n a2, a3, 4 +402049c3: 192142 l32i a4, a1, 100 +402049c6: 182122 l32i a2, a1, 96 +402049c9: 0e3d mov.n a3, a14 +402049cb: 205dd0 or a5, a13, a13 +402049ce: 236172 s32i a7, a1, 140 +402049d1: 02b885 call0 4020755c +402049d4: 1c2132 l32i a3, a1, 112 +402049d7: 186122 s32i a2, a1, 96 +402049da: 70a022 movi a2, 112 +402049dd: 102320 and a2, a3, a2 +402049e0: 232172 l32i a7, a1, 140 +402049e3: 02d266 bnei a2, 64, 402049e9 +402049e6: 01a886 j 4020508c +402049e9: 182142 l32i a4, a1, 96 +402049ec: 6a7416 beqz a4, 40205097 +402049ef: 1428 l32i.n a2, a4, 4 +402049f1: 12e8 l32i.n a14, a2, 4 +402049f3: 2728 l32i.n a2, a7, 8 +402049f5: 2ce207 bbsi a2, 0, 40204a25 +402049f8: 180722 l8ui a2, a7, 24 +402049fb: 5d1266 bnei a2, 1, 40204a5c +402049fe: 0d0e32 l8ui a3, a14, 13 +40204a01: 0c0e42 l8ui a4, a14, 12 +40204a04: fefe21 l32r a2, 402045fc +40204a07: 113380 slli a3, a3, 8 +40204a0a: 203340 or a3, a3, a4 +40204a0d: f42020 extui a2, a2, 0, 16 +40204a10: 021327 beq a3, a2, 40204a16 +40204a13: 019e86 j 40205091 +40204a16: 182122 l32i a2, a1, 96 +40204a19: 242f32 l32i a3, a15, 144 +40204a1c: 0b1252 l16ui a5, a2, 22 +40204a1f: 332f22 l32i a2, a15, 204 +40204a22: 0008c6 j 40204a49 +40204a25: 0d0e32 l8ui a3, a14, 13 +40204a28: 0c0e42 l8ui a4, a14, 12 +40204a2b: fef421 l32r a2, 402045fc +40204a2e: 113380 slli a3, a3, 8 +40204a31: 203340 or a3, a3, a4 +40204a34: f42020 extui a2, a2, 0, 16 +40204a37: 219327 bne a3, a2, 40204a5c +40204a3a: 332f22 l32i a2, a15, 204 +40204a3d: 01b216 beqz a2, 40204a5c +40204a40: 182132 l32i a3, a1, 96 +40204a43: 0b1352 l16ui a5, a3, 22 +40204a46: 242f32 l32i a3, a15, 144 +40204a49: 412332 l32i a3, a3, 0x104 +40204a4c: 062222 l32i a2, a2, 24 +40204a4f: f2c552 addi a5, a5, -14 +40204a52: 0ece42 addi a4, a14, 14 +40204a55: 08cd05 call0 4020d728 +40204a58: 018d46 j 40205091 +40204a5b: 0e2200 excw +40204a5e: 620700 excw +40204a61: 215216 beqz a2, 40204c7a +40204a64: 4218 l32i.n a1, a2, 16 +40204a66: 3200a0 excw +40204a69: 220b15 excw +40204a6c: 4503a0 extui a0, a10, 19, 5 +40204a6f: 243a add.n a2, a4, a3 +40204a71: 20d220 or a13, a2, a2 +40204a74: 92dc bnez.n a2, 40204a91 +40204a76: 001246 j 40204ac3 +40204a79: 1b2122 l32i a2, a1, 108 +40204a7c: 640c movi.n a4, 6 +40204a7e: 33c232 addi a3, a2, 51 +40204a81: 0e2d mov.n a2, a14 +40204a83: f46601 l32r a0, 40201c1c +40204a86: 0000c0 callx0 a0 +40204a89: fd5256 bnez a2, 40204a62 +40204a8c: 000cc6 j 40204ac3 +40204a8f: 320000 excw +40204a92: 281821 l32r a2, 401ceaf4 <_lit4_end+0xc87c8> +40204a95: 134213 excw +40204a98: 380b addi.n a3, a8, -1 +40204a9a: 1d2812 l32i a1, a8, 116 +40204a9d: f15d01 l32r a0, 40201014 <_irom0_text_start+0x4> +40204aa0: 0000c0 callx0 a0 +40204aa3: 071d22 l16ui a2, a13, 14 +40204aa6: 0d3d mov.n a3, a13 +40204aa8: 220b addi.n a2, a2, -1 +40204aaa: 075d22 s16i a2, a13, 14 +40204aad: 1b2122 l32i a2, a1, 108 +40204ab0: fd8d45 call0 40202388 +40204ab3: 0c1266 bnei a2, 1, 40204ac3 +40204ab6: 071d22 l16ui a2, a13, 14 +40204ab9: 221b addi.n a2, a2, 1 +40204abb: 075d22 s16i a2, a13, 14 +40204abe: 0d2d mov.n a2, a13 +40204ac0: 242dc5 call0 40228da0 +40204ac3: 000e22 l8ui a2, a14, 0 +40204ac6: 2e6207 bbci a2, 0, 40204af8 +40204ac9: 182152 l32i a5, a1, 96 +40204acc: 02a042 movi a4, 2 +40204acf: 0b1532 l16ui a3, a5, 22 +40204ad2: 03a022 movi a2, 3 +40204ad5: 2433c5 call0 40228e14 +40204ad8: 182142 l32i a4, a1, 96 +40204adb: 1438 l32i.n a3, a4, 4 +40204add: 1338 l32i.n a3, a3, 4 +40204adf: 1239 s32i.n a3, a2, 4 +40204ae1: 0429 s32i.n a2, a4, 0 +40204ae3: 4249 s32i.n a4, a2, 16 +40204ae5: 030c movi.n a3, 0 +40204ae7: 024d mov.n a4, a2 +40204ae9: d21c movi.n a2, 29 +40204aeb: fecf01 l32r a0, 40204628 +40204aee: 0000c0 callx0 a0 +40204af1: 820c movi.n a2, 8 +40204af3: 01db86 j 40205265 +40204af6: 520000 excw +40204af9: 0c1b21 l32r a2, 401c7b68 <_lit4_end+0xc183c> +40204afc: c53264 excw +40204aff: 0e2d33 excw +40204b02: f44601 l32r a0, 40201c1c +40204b05: 0000c0 callx0 a0 +40204b08: fbd216 beqz a2, 40204ac9 +40204b0b: 016086 j 40205091 +40204b0e: 420000 excw +40204b11: 0e .byte 0xe +40204b12: 831c01 l32r a0, 401e5784 <_lit4_end+0xdf458> +40204b15: 144040 extui a4, a4, 0, 2 +40204b18: fdc422 addi a2, a4, -3 +40204b1b: e41c movi.n a4, 30 +40204b1d: 934320 movnez a4, a3, a2 +40204b20: 000e32 l8ui a3, a14, 0 +40204b23: 8ca022 movi a2, 140 +40204b26: 102320 and a2, a3, a2 +40204b29: 88a072 movi a7, 136 +40204b2c: 342b addi.n a3, a4, 2 +40204b2e: c02270 sub a2, a2, a7 +40204b31: 834320 moveqz a4, a3, a2 +40204b34: 192152 l32i a5, a1, 100 +40204b37: 182122 l32i a2, a1, 96 +40204b3a: f43040 extui a3, a4, 0, 16 +40204b3d: 0a5232 s16i a3, a2, 20 +40204b40: fcc522 addi a2, a5, -4 +40204b43: c02230 sub a2, a2, a3 +40204b46: 182132 l32i a3, a1, 96 +40204b49: 0b5322 s16i a2, a3, 22 +40204b4c: 721c movi.n a2, 23 +40204b4e: 023257 bltu a2, a5, 40204b54 +40204b51: 015cc6 j 402050c8 +40204b54: 1d2152 l32i a5, a1, 116 +40204b57: 56d556 bnez a5, 402050c8 +40204b5a: 0a0e22 l8ui a2, a14, 10 +40204b5d: 026207 bbci a2, 0, 40204b63 +40204b60: 015906 j 402050c8 +40204b63: 010e22 l8ui a2, a14, 1 +40204b66: 3a6267 bbci a2, 6, 40204ba4 +40204b69: 30af22 movi a2, -208 +40204b6c: 262a add.n a2, a6, a2 +40204b6e: 22bc beqz.n a2, 40204ba4 +40204b70: b0a022 movi a2, 176 +40204b73: 021627 beq a6, a2, 40204b79 +40204b76: 015386 j 402050c8 +40204b79: 142f22 l32i a2, a15, 80 +40204b7c: 02e247 bbsi a2, 4, 40204b82 +40204b7f: 015146 j 402050c8 +40204b82: 0f2d mov.n a2, a15 +40204b84: 246162 s32i a6, a1, 144 +40204b87: fd7385 call0 402022c0 +40204b8a: 242162 l32i a6, a1, 144 +40204b8d: 537216 beqz a2, 402050c8 +40204b90: 182132 l32i a3, a1, 96 +40204b93: 1328 l32i.n a2, a3, 4 +40204b95: 012232 l32i a3, a2, 4 +40204b98: bfaf22 movi a2, -65 +40204b9b: 010342 l8ui a4, a3, 1 +40204b9e: 102420 and a2, a4, a2 +40204ba1: 014322 s8i a2, a3, 1 +40204ba4: 182142 l32i a4, a1, 96 +40204ba7: 0f38 l32i.n a3, a15, 0 +40204ba9: 1428 l32i.n a2, a4, 4 +40204bab: 0b14d2 l16ui a13, a4, 22 +40204bae: 1228 l32i.n a2, a2, 4 +40204bb0: 242fc2 l32i a12, a15, 144 +40204bb3: 18c282 addi a8, a2, 24 +40204bb6: 58da add.n a5, a8, a13 +40204bb8: 196122 s32i a2, a1, 100 +40204bbb: 1c6152 s32i a5, a1, 112 +40204bbe: 62e626 beqi a6, 128, 40204c24 +40204bc1: 80a022 movi a2, 128 +40204bc4: 203267 bltu a2, a6, 40204be8 +40204bc7: 02c666 bnei a6, 32, 40204bcd +40204bca: 00e1c6 j 40204f55 +40204bcd: 022c movi.n a2, 32 +40204bcf: 053267 bltu a2, a6, 40204bd8 +40204bd2: 37f616 beqz a6, 40204f55 +40204bd5: 013bc6 j 402050c8 +40204bd8: 71d626 beqi a6, 64, 40204c4d +40204bdb: 025c movi.n a2, 80 +40204bdd: 021627 beq a6, a2, 40204be3 +40204be0: 013906 j 402050c8 +40204be3: 140c movi.n a4, 1 +40204be5: 000f46 j 40204c26 +40204be8: b0a022 movi a2, 176 +40204beb: 029627 bne a6, a2, 40204bf1 +40204bee: 009986 j 40204e58 +40204bf1: 0b3267 bltu a2, a6, 40204c00 +40204bf4: a0a022 movi a2, 160 +40204bf7: 029627 bne a6, a2, 40204bfd +40204bfa: 00e786 j 40204f9c +40204bfd: 0131c6 j 402050c8 +40204c00: c0a022 movi a2, 192 +40204c03: 029627 bne a6, a2, 40204c09 +40204c06: 00e486 j 40204f9c +40204c09: d0a022 movi a2, 208 +40204c0c: 021627 beq a6, a2, 40204c12 +40204c0f: 012d46 j 402050c8 +40204c12: 1c2152 l32i a5, a1, 112 +40204c15: 192132 l32i a3, a1, 100 +40204c18: 084d mov.n a4, a8 +40204c1a: 202ff0 or a2, a15, a15 +40204c1d: 06a585 call0 4020b678 +40204c20: 012906 j 402050c8 +40204c23: 040c00 extui a0, a0, 12, 1 +40204c26: f3cf21 l32r a2, 40201b64 +40204c29: 7228 l32i.n a2, a2, 28 +40204c2b: 042720 extui a2, a2, 7, 1 +40204c2e: 0a1226 beqi a2, 1, 40204c3c +40204c31: b0c652 addi a5, a6, -80 +40204c34: 0c0c movi.n a12, 0 +40204c36: 0295c7 bne a5, a12, 40204c3c +40204c39: 011506 j 40205091 +40204c3c: 1f2152 l32i a5, a1, 124 +40204c3f: 182122 l32i a2, a1, 96 +40204c42: 013d mov.n a3, a1 +40204c44: 02cdc5 call0 40207924 +40204c47: 011f46 j 402050c8 +40204c4a: 000000 ill +40204c4d: 112f22 l32i a2, a15, 68 +40204c50: 025226 beqi a2, 5, 40204c56 +40204c53: 011c46 j 402050c8 +40204c56: 020c movi.n a2, 0 +40204c58: 1a6122 s32i a2, a1, 104 +40204c5b: 02ed mov.n a14, a2 +40204c5d: 02dd mov.n a13, a2 +40204c5f: 029d mov.n a9, a2 +40204c61: dda0c2 movi a12, 221 +40204c64: 1c2132 l32i a3, a1, 112 +40204c67: c02380 sub a2, a3, a8 +40204c6a: 0222e6 bgei a2, 2, 40204c70 +40204c6d: 002bc6 j 40204d20 +40204c70: 010862 l8ui a6, a8, 1 +40204c73: 361b addi.n a3, a6, 1 +40204c75: 022327 blt a3, a2, 40204c7b +40204c78: 011306 j 402050c8 +40204c7b: 000822 l8ui a2, a8, 0 +40204c7e: 0e1226 beqi a2, 1, 40204c90 +40204c81: 044216 beqz a2, 40204cc9 +40204c84: 233c movi.n a3, 50 +40204c86: 0b1237 beq a2, a3, 40204c95 +40204c89: 0f12c7 beq a2, a12, 40204c9c +40204c8c: 002186 j 40204d16 +40204c8f: 08dd00 excw +40204c92: 002006 j 40204d16 +40204c95: 08ed mov.n a14, a8 +40204c97: 001ec6 j 40204d16 +40204c9a: b60000 excw +40204c9d: 322e46 j 4021155a +40204ca0: 0308 l32i.n a0, a3, 0 +40204ca2: 020852 l8ui a5, a8, 2 +40204ca5: 040822 l8ui a2, a8, 4 +40204ca8: 113380 slli a3, a3, 8 +40204cab: 112200 slli a2, a2, 16 +40204cae: 204350 or a4, a3, a5 +40204cb1: 203240 or a3, a2, a4 +40204cb4: 050822 l8ui a2, a8, 5 +40204cb7: 012280 slli a2, a2, 24 +40204cba: 202230 or a2, a2, a3 +40204cbd: fe5031 l32r a3, 40204600 +40204cc0: 0a9237 bne a2, a3, 40204cce +40204cc3: 1a6182 s32i a8, a1, 104 +40204cc6: 001306 j 40204d16 +40204cc9: 089d mov.n a9, a8 +40204ccb: 0011c6 j 40204d16 +40204cce: 082d mov.n a2, a8 +40204cd0: 246162 s32i a6, a1, 144 +40204cd3: 226182 s32i a8, a1, 136 +40204cd6: 236192 s32i a9, a1, 140 +40204cd9: ff1885 call0 40203e64 +40204cdc: 242162 l32i a6, a1, 144 +40204cdf: 222182 l32i a8, a1, 136 +40204ce2: 232192 l32i a9, a1, 140 +40204ce5: d2ac beqz.n a2, 40204d16 +40204ce7: f39f21 l32r a2, 40201b64 +40204cea: 5e22a2 l32i a10, a2, 0x178 +40204ced: 5aac beqz.n a10, 40204d16 +40204cef: 1f2142 l32i a4, a1, 124 +40204cf2: 192122 l32i a2, a1, 100 +40204cf5: f8c662 addi a6, a6, -8 +40204cf8: a0c472 addi a7, a4, -96 +40204cfb: 58ab addi.n a5, a8, 10 +40204cfd: 487b addi.n a4, a8, 7 +40204cff: 32ab addi.n a3, a2, 10 +40204d01: 226182 s32i a8, a1, 136 +40204d04: 236192 s32i a9, a1, 140 +40204d07: 746060 extui a6, a6, 0, 8 +40204d0a: 01a022 movi a2, 1 +40204d0d: 000ac0 callx0 a10 +40204d10: 222182 l32i a8, a1, 136 +40204d13: 232192 l32i a9, a1, 140 +40204d16: 010822 l8ui a2, a8, 1 +40204d19: 222b addi.n a2, a2, 2 +40204d1b: 882a add.n a8, a8, a2 +40204d1d: ffd0c6 j 40204c64 +40204d20: 3a4d16 beqz a13, 402050c8 +40204d23: 010d32 l8ui a3, a13, 1 +40204d26: f20c movi.n a2, 15 +40204d28: 02b237 bgeu a2, a3, 40204d2e +40204d2b: 00e646 j 402050c8 +40204d2e: ae8c beqz.n a14, 40204d3c +40204d30: 010e42 l8ui a4, a14, 1 +40204d33: c02230 sub a2, a2, a3 +40204d36: 02a247 bge a2, a4, 40204d3c +40204d39: 00e2c6 j 402050c8 +40204d3c: 388916 beqz a9, 402050c8 +40204d3f: 010942 l8ui a4, a9, 1 +40204d42: 022c movi.n a2, 32 +40204d44: 02b247 bgeu a2, a4, 40204d4a +40204d47: 00df46 j 402050c8 +40204d4a: f386c1 l32r a12, 40201b64 +40204d4d: 03dc22 addmi a2, a12, 0x300 +40204d50: 430222 l8ui a2, a2, 67 +40204d53: 051266 bnei a2, 1, 40204d5c +40204d56: 36e416 beqz a4, 402050c8 +40204d59: 000246 j 40204d66 +40204d5c: 64cc bnez.n a4, 40204d66 +40204d5e: 7c28 l32i.n a2, a12, 28 +40204d60: 24f2b7 bbsi a2, 27, 40204d88 +40204d63: 0009c6 j 40204d8e +40204d66: af2c22 l32i a2, a12, 0x2bc +40204d69: 021427 beq a4, a2, 40204d6f +40204d6c: 00d606 j 402050c8 +40204d6f: f97831 l32r a3, 40203350 +40204d72: 292b addi.n a2, a9, 2 +40204d74: 236192 s32i a9, a1, 140 +40204d77: f3a901 l32r a0, 40201c1c +40204d7a: 0000c0 callx0 a0 +40204d7d: 232192 l32i a9, a1, 140 +40204d80: 344256 bnez a2, 402050c8 +40204d83: fff5c6 j 40204d5e +40204d86: 220000 excw +40204d89: 0109 s32i.n a0, a1, 0 +40204d8b: 339216 beqz a2, 402050c8 +40204d8e: 262f22 l32i a2, a15, 152 +40204d91: 246f22 s32i a2, a15, 144 +40204d94: fe1c21 l32r a2, 40204604 +40204d97: 0228 l32i.n a2, a2, 0 +40204d99: 063216 beqz a2, 40204e00 +40204d9c: fe1b41 l32r a4, 40204608 +40204d9f: fd7b31 l32r a3, 4020438c +40204da2: c22c movi.n a2, 44 +40204da4: f4ab01 l32r a0, 40202050 +40204da7: 0000c0 callx0 a0 +40204daa: 025d mov.n a5, a2 +40204dac: fd7871 l32r a7, 4020438c +40204daf: 04d216 beqz a2, 40204e00 +40204db2: 1f2142 l32i a4, a1, 124 +40204db5: 760c movi.n a6, 7 +40204db7: 0269 s32i.n a6, a2, 0 +40204db9: a0c422 addi a2, a4, -96 +40204dbc: 1529 s32i.n a2, a5, 4 +40204dbe: 192122 l32i a2, a1, 100 +40204dc1: 640c movi.n a4, 6 +40204dc3: 0ac232 addi a3, a2, 10 +40204dc6: 08c522 addi a2, a5, 8 +40204dc9: 236172 s32i a7, a1, 140 +40204dcc: 226152 s32i a5, a1, 136 +40204dcf: 246162 s32i a6, a1, 144 +40204dd2: f09001 l32r a0, 40201014 <_irom0_text_start+0x4> +40204dd5: 0000c0 callx0 a0 +40204dd8: 222152 l32i a5, a1, 136 +40204ddb: 242162 l32i a6, a1, 144 +40204dde: 054d mov.n a4, a5 +40204de0: 203660 or a3, a6, a6 +40204de3: 521c movi.n a2, 21 +40204de5: fe1001 l32r a0, 40204628 +40204de8: 0000c0 callx0 a0 +40204deb: 222152 l32i a5, a1, 136 +40204dee: 232172 l32i a7, a1, 140 +40204df1: b28c beqz.n a2, 40204e00 +40204df3: fe0641 l32r a4, 4020460c +40204df6: 073d mov.n a3, a7 +40204df8: 052d mov.n a2, a5 +40204dfa: f1c301 l32r a0, 40201508 +40204dfd: 0000c0 callx0 a0 +40204e00: 562c22 l32i a2, a12, 0x158 +40204e03: 035216 beqz a2, 40204e3c +40204e06: f37c movi.n a3, -1 +40204e08: 004132 s8i a3, a1, 0 +40204e0b: 014d mov.n a4, a1 +40204e0d: 030c movi.n a3, 0 +40204e0f: 222b addi.n a2, a2, 2 +40204e11: 00c945 call0 40205aa8 +40204e14: 000122 l8ui a2, a1, 0 +40204e17: 0522b6 bltui a2, 2, 40204e20 +40204e1a: 1a2132 l32i a3, a1, 104 +40204e1d: 2a7316 beqz a3, 402050c8 +40204e20: 0e3d mov.n a3, a14 +40204e22: 0d2d mov.n a2, a13 +40204e24: ff0785 call0 40203ea0 +40204e27: 192152 l32i a5, a1, 100 +40204e2a: 030c movi.n a3, 0 +40204e2c: 140c movi.n a4, 1 +40204e2e: 834320 moveqz a4, a3, a2 +40204e31: 35ab addi.n a3, a5, 10 +40204e33: 0f2d mov.n a2, a15 +40204e35: fe7c85 call0 40203600 +40204e38: 00a306 j 402050c8 +40204e3b: 0e3d00 excw +40204e3e: 0d2d mov.n a2, a13 +40204e40: ff05c5 call0 40203ea0 +40204e43: 0c0c movi.n a12, 0 +40204e45: 140c movi.n a4, 1 +40204e47: 834c20 moveqz a4, a12, a2 +40204e4a: 192122 l32i a2, a1, 100 +40204e4d: 32ab addi.n a3, a2, 10 +40204e4f: 0f2d mov.n a2, a15 +40204e51: fe7ac5 call0 40203600 +40204e54: 008e46 j 40205091 +40204e57: 2f2200 excw +40204e5a: 522611 l32r a1, 401d96f4 <_lit4_end+0xd33c8> +40204e5d: 998602 excw +40204e60: 215200 srai a5, a0, 2 +40204e63: 0c19 s32i.n a1, a12, 0 +40204e65: c33264 excw +40204e68: c52233 excw +40204e6b: 6c0110 excw +40204e6e: 00c0f3 excw +40204e71: 225600 excw +40204e74: 6de625 excw +40204e77: 930602 l8ui a0, a6, 147 +40204e7a: 3a4100 excw +40204e7d: 2122f3 excw +40204e80: 4219 s32i.n a1, a2, 16 +40204e82: 320724 excw +40204e85: 220c12 l8ui a1, a12, 34 +40204e88: a70d12 l8ui a1, a13, 167 +40204e8b: c60274 excw +40204e8e: 008d mov.n a8, a0 +40204e90: 262f42 l32i a4, a15, 152 +40204e93: 246f42 s32i a4, a15, 144 +40204e96: 22e356 bnez a3, 402050c8 +40204e99: 540f32 l8ui a3, a15, 84 +40204e9c: 1d2366 bnei a3, 2, 40204ebd +40204e9f: 172f22 l32i a2, a15, 92 +40204ea2: 222216 beqz a2, 402050c8 +40204ea5: fd3931 l32r a3, 4020438c +40204ea8: 32a642 movi a4, 0x632 +40204eab: 00a0c2 movi a12, 0 +40204eae: f19601 l32r a0, 40201508 +40204eb1: 0000c0 callx0 a0 +40204eb4: 176fc2 s32i a12, a15, 92 +40204eb7: 007586 j 40205091 +40204eba: 000000 ill +40204ebd: 021226 beqi a2, 1, 40204ec3 +40204ec0: 008106 j 402050c8 +40204ec3: 240c movi.n a4, 2 +40204ec5: b0a032 movi a3, 176 +40204ec8: 0f2d mov.n a2, a15 +40204eca: fdf0c5 call0 40202dd8 +40204ecd: 192132 l32i a3, a1, 100 +40204ed0: c3ab addi.n a12, a3, 10 +40204ed2: 0c2d mov.n a2, a12 +40204ed4: 051985 call0 4020a070 +40204ed7: 02dd mov.n a13, a2 +40204ed9: 82cc bnez.n a2, 40204ee5 +40204edb: 0c2d mov.n a2, a12 +40204edd: 050785 call0 40209f58 +40204ee0: 02dd mov.n a13, a2 +40204ee2: 1e2216 beqz a2, 402050c8 +40204ee5: 01dd22 addmi a2, a13, 0x100 +40204ee8: 130c movi.n a3, 1 +40204eea: 640c movi.n a4, 6 +40204eec: 0a4232 s8i a3, a2, 10 +40204eef: 0c3d mov.n a3, a12 +40204ef1: 0d2d mov.n a2, a13 +40204ef3: f04801 l32r a0, 40201014 <_irom0_text_start+0x4> +40204ef6: 0000c0 callx0 a0 +40204ef9: e0a022 movi a2, 224 +40204efc: 030c movi.n a3, 0 +40204efe: 2d2a add.n a2, a13, a2 +40204f00: 10a1c2 movi a12, 0x110 +40204f03: 00fec5 call0 40205ef0 +40204f06: cdca add.n a12, a13, a12 +40204f08: 0c2d mov.n a2, a12 +40204f0a: fc2c01 l32r a0, 40203fbc +40204f0d: 0000c0 callx0 a0 +40204f10: fdc031 l32r a3, 40204610 +40204f13: 0d4d mov.n a4, a13 +40204f15: 0c2d mov.n a2, a12 +40204f17: fd2701 l32r a0, 402043b4 +40204f1a: 0000c0 callx0 a0 +40204f1d: 150c movi.n a5, 1 +40204f1f: 054d mov.n a4, a5 +40204f21: d0a732 movi a3, 0x7d0 +40204f24: 0c2d mov.n a2, a12 +40204f26: fc2401 l32r a0, 40203fb8 +40204f29: 0000c0 callx0 a0 +40204f2c: 2d48 l32i.n a4, a13, 8 +40204f2e: fdb921 l32r a2, 40204614 +40204f31: 203420 or a3, a4, a2 +40204f34: 2d39 s32i.n a3, a13, 8 +40204f36: 540f32 l8ui a3, a15, 84 +40204f39: 0b3326 beqi a3, 3, 40204f48 +40204f3c: fdb731 l32r a3, 40204618 +40204f3f: 203430 or a3, a4, a3 +40204f42: 2d39 s32i.n a3, a13, 8 +40204f44: 006006 j 402050c8 +40204f47: e36c00 excw +40204f4a: 103430 and a3, a4, a3 +40204f4d: 202320 or a2, a3, a2 +40204f50: 2d29 s32i.n a2, a13, 8 +40204f52: 005c86 j 402050c8 +40204f55: 112f22 l32i a2, a15, 68 +40204f58: 025226 beqi a2, 5, 40204f5e +40204f5b: 005a46 j 402050c8 +40204f5e: 192152 l32i a5, a1, 100 +40204f61: 640c movi.n a4, 6 +40204f63: 33c332 addi a3, a3, 51 +40204f66: 10c522 addi a2, a5, 16 +40204f69: 246162 s32i a6, a1, 144 +40204f6c: f32c01 l32r a0, 40201c1c +40204f6f: 0000c0 callx0 a0 +40204f72: 242162 l32i a6, a1, 144 +40204f75: 14f256 bnez a2, 402050c8 +40204f78: 10c666 bnei a6, 32, 40204f8c +40204f7b: 023c movi.n a2, 48 +40204f7d: 1e6122 s32i a2, a1, 120 +40204f80: 920c movi.n a2, 9 +40204f82: 0222d7 blt a2, a13, 40204f88 +40204f85: 004fc6 j 402050c8 +40204f88: 0045c6 j 402050a3 +40204f8b: 031c00 excw +40204f8e: 1e6132 s32i a3, a1, 120 +40204f91: 024de6 bgei a13, 4, 40204f97 +40204f94: 004c06 j 402050c8 +40204f97: 00b046 j 4020525c +40204f9a: 220000 excw +40204f9d: 2f .byte 0x2f +40204f9e: 522611 l32r a1, 401d9838 <_lit4_end+0xd350c> +40204fa1: 488602 excw +40204fa4: 215200 srai a5, a0, 2 +40204fa7: 4219 s32i.n a1, a2, 16 +40204fa9: 3206a0 excw +40204fac: 2233c3 excw +40204faf: 0104c5 call0 40205ffc +40204fb2: f31a add.n a15, a3, a1 +40204fb4: 0000c0 callx0 a0 +40204fb7: 10d256 bnez a2, 402050c8 +40204fba: 022de6 bgei a13, 2, 40204fc0 +40204fbd: 0041c6 j 402050c8 +40204fc0: 203cc0 or a3, a12, a12 +40204fc3: 0f2d mov.n a2, a15 +40204fc5: 051245 call0 4020a0ec +40204fc8: 003f06 j 402050c8 +40204fcb: a02200 addx4 a2, a2, a0 +40204fce: 1627a0 excw +40204fd1: 2ec602 addi a0, a6, 46 +40204fd4: 213200 srai a3, a0, 2 +40204fd7: d218 l32i.n a1, a2, 52 +40204fd9: 2f .byte 0x2f +40204fda: 132824 excw +40204fdd: 1238 l32i.n a3, a2, 4 +40204fdf: 6d8c beqz.n a13, 40204fe9 +40204fe1: 0d1d22 l16ui a2, a13, 26 +40204fe4: d42020 extui a2, a2, 0, 14 +40204fe7: e2cc bnez.n a2, 40204ff9 +40204fe9: 740c movi.n a4, 7 +40204feb: c0a032 movi a3, 192 +40204fee: 0f2d mov.n a2, a15 +40204ff0: fdde45 call0 40202dd8 +40204ff3: 002686 j 40205091 +40204ff6: 000000 ill +40204ff9: 011332 l16ui a3, a3, 2 +40204ffc: d43030 extui a3, a3, 0, 14 +40204fff: 021237 beq a2, a3, 40205005 +40205002: 0022c6 j 40205091 +40205005: 3b2de2 l32i a14, a13, 236 +40205008: 00fe56 bnez a14, 4020501b +4020500b: 202ff0 or a2, a15, a15 +4020500e: fd9545 call0 40202964 +40205011: 030c movi.n a3, 0 +40205013: 0d2d mov.n a2, a13 +40205015: 00efc5 call0 40205f14 +40205018: 001d46 j 40205091 +4020501b: e0a032 movi a3, 224 +4020501e: 3d3a add.n a3, a13, a3 +40205020: 0328 l32i.n a2, a3, 0 +40205022: 220b addi.n a2, a2, -1 +40205024: 0329 s32i.n a2, a3, 0 +40205026: c2cc bnez.n a2, 40205036 +40205028: eca032 movi a3, 236 +4020502b: 3d3a add.n a3, a13, a3 +4020502d: 040c movi.n a4, 0 +4020502f: 1349 s32i.n a4, a3, 4 +40205031: 0349 s32i.n a4, a3, 0 +40205033: 000106 j 4020503b +40205036: 8e38 l32i.n a3, a14, 32 +40205038: 3b6d32 s32i a3, a13, 236 +4020503b: eca032 movi a3, 236 +4020503e: 3d3a add.n a3, a13, a3 +40205040: 2348 l32i.n a4, a3, 8 +40205042: 440b addi.n a4, a4, -1 +40205044: 2349 s32i.n a4, a3, 8 +40205046: 429c beqz.n a2, 4020505e +40205048: 182142 l32i a4, a1, 96 +4020504b: fd7621 l32r a2, 40204624 +4020504e: 9438 l32i.n a3, a4, 36 +40205050: 1122a0 slli a2, a2, 6 +40205053: 0348 l32i.n a4, a3, 0 +40205055: 202420 or a2, a4, a2 +40205058: 0329 s32i.n a2, a3, 0 +4020505a: 000206 j 40205066 +4020505d: a03200 addx4 a3, a2, a0 +40205060: 0d2d00 excw +40205063: 00eb05 call0 40205f14 +40205066: 00e545 call0 40205ebc +40205069: 728c beqz.n a2, 40205074 +4020506b: 0e2d mov.n a2, a14 +4020506d: 1cc285 call0 40221c98 +40205070: 000746 j 40205091 +40205073: 215200 srai a5, a0, 2 +40205076: 0c18 l32i.n a1, a12, 0 +40205078: 852902 l32i a0, a9, 0x214 +4020507b: f2ba21 l32r a2, 40201b64 +4020507e: 742232 l32i a3, a2, 0x1d0 +40205081: 0359 s32i.n a5, a3, 0 +40205083: 20c532 addi a3, a5, 32 +40205086: 746232 s32i a3, a2, 0x1d0 +40205089: 000106 j 40205091 +4020508c: 182122 l32i a2, a1, 96 +4020508f: 428c beqz.n a2, 40205097 +40205091: 182122 l32i a2, a1, 96 +40205094: 1bcb05 call0 40220d48 +40205097: 0c2d mov.n a2, a12 +40205099: 007206 j 40205265 +4020509c: ffa0c2 movi a12, 255 +4020509f: fffb86 j 40205091 +402050a2: 213200 srai a3, a0, 2 +402050a5: e219 s32i.n a1, a2, 56 +402050a7: 0c22c3 excw +402050aa: d20d excw +402050ac: d21b61 l32r a6, 401f9918 <_lit4_end+0xf35ec> +402050af: d21a61 l32r a6, 401f9918 <_lit4_end+0xf35ec> +402050b2: 321d61 l32r a6, 401d1928 <_lit4_end+0xcb5fc> +402050b5: e01c21 l32r a2, 401fd128 <_lit4_end+0xf6dfc> +402050b8: e6c023 excw +402050bb: c60222 l8ui a2, a2, 198 +402050be: 620022 l8ui a2, a0, 98 +402050c1: 0e .byte 0xe +402050c2: 361b01 l32r a0, 401d2930 <_lit4_end+0xcc604> +402050c5: 042327 blt a3, a2, 402050cd +402050c8: 0c0c movi.n a12, 0 +402050ca: fff0c6 j 40205091 +402050cd: 000e22 l8ui a2, a14, 0 +402050d0: d42c movi.n a4, 45 +402050d2: 301247 beq a2, a4, 40205106 +402050d5: 103427 bltu a4, a2, 402050e9 +402050d8: 061216 beqz a2, 4020513d +402050db: 1a2152 l32i a5, a1, 104 +402050de: 220b addi.n a2, a2, -1 +402050e0: 835e20 moveqz a5, a14, a2 +402050e3: 1a6152 s32i a5, a1, 104 +402050e6: 001586 j 40205140 +402050e9: 233c movi.n a3, 50 +402050eb: 111237 beq a2, a3, 40205100 +402050ee: dda032 movi a3, 221 +402050f1: 161237 beq a2, a3, 4020510b +402050f4: 033c movi.n a3, 48 +402050f6: 029237 bne a2, a3, 402050fc +402050f9: 003706 j 402051d9 +402050fc: 001006 j 40205140 +402050ff: 61e200 excw +40205102: 461b addi.n a4, a6, 1 +40205104: 0e .byte 0xe +40205105: 0edd00 excw +40205108: 000d06 j 40205140 +4020510b: 0246f6 bgeui a6, 4, 40205111 +4020510e: 0044c6 j 40205225 +40205111: 2e2b addi.n a2, a14, 2 +40205113: 010242 l8ui a4, a2, 1 +40205116: 020e72 l8ui a7, a14, 2 +40205119: 020232 l8ui a3, a2, 2 +4020511c: 114480 slli a4, a4, 8 +4020511f: 113300 slli a3, a3, 16 +40205122: 205470 or a5, a4, a7 +40205125: 204350 or a4, a3, a5 +40205128: 030232 l8ui a3, a2, 3 +4020512b: 013380 slli a3, a3, 24 +4020512e: 203340 or a3, a3, a4 +40205131: fd3a41 l32r a4, 4020461c +40205134: 029347 bne a3, a4, 4020513a +40205137: 002786 j 402051d9 +4020513a: 002e86 j 402051f8 +4020513d: 1d61e2 s32i a14, a1, 116 +40205140: 010e22 l8ui a2, a14, 1 +40205143: 222b addi.n a2, a2, 2 +40205145: ee2a add.n a14, a14, a2 +40205147: ffda46 j 402050b4 +4020514a: 420000 excw +4020514d: 161a21 l32r a2, 401ca9b8 <_lit4_end+0xc468c> +40205150: 32f754 excw +40205153: 220104 excw +40205156: 370fa0 excw +40205159: 4602b2 l8ui a11, a2, 70 +4020515c: ffda add.n a15, a15, a13 +4020515e: 1b2152 l32i a5, a1, 108 +40205161: 00b516 beqz a5, 40205170 +40205164: 010542 l8ui a4, a5, 1 +40205167: c02230 sub a2, a2, a3 +4020516a: 02a247 bge a2, a4, 40205170 +4020516d: ffd5c6 j 402050c8 +40205170: 1d2122 l32i a2, a1, 116 +40205173: f51216 beqz a2, 402050c8 +40205176: 010222 l8ui a2, a2, 1 +40205179: 032c movi.n a3, 32 +4020517b: 02b327 bgeu a3, a2, 40205181 +4020517e: ffd186 j 402050c8 +40205181: 7d9c beqz.n a13, 4020519c +40205183: 000d22 l8ui a2, a13, 0 +40205186: dda032 movi a3, 221 +40205189: c03230 sub a3, a2, a3 +4020518c: a51c movi.n a5, 26 +4020518e: e21c movi.n a2, 30 +40205190: 010d42 l8ui a4, a13, 1 +40205193: 932530 movnez a2, a5, a3 +40205196: 02b427 bgeu a4, a2, 4020519c +40205199: ffcac6 j 402050c8 +4020519c: 1a2132 l32i a3, a1, 104 +4020519f: 1b2142 l32i a4, a1, 108 +402051a2: 0fa052 movi a5, 15 +402051a5: 202cc0 or a2, a12, a12 +402051a8: 026b45 call0 40207860 +402051ab: 743020 extui a3, a2, 0, 8 +402051ae: 026277 bbci a2, 7, 402051b4 +402051b1: ffc4c6 j 402050c8 +402051b4: f26c21 l32r a2, 40201b64 +402051b7: 072222 l32i a2, a2, 28 +402051ba: 076257 bbci a2, 5, 402051c5 +402051bd: f22c movi.n a2, 47 +402051bf: 023237 bltu a2, a3, 402051c5 +402051c2: ffc086 j 402050c8 +402051c5: 262f22 l32i a2, a15, 152 +402051c8: 1e2142 l32i a4, a1, 120 +402051cb: 246f22 s32i a2, a15, 144 +402051ce: 0c3d mov.n a3, a12 +402051d0: 0f2d mov.n a2, a15 +402051d2: 0502c5 call0 4020a200 +402051d5: ffbbc6 j 402050c8 +402051d8: d23c00 excw +402051db: 02a267 bge a2, a6, 402051e1 +402051de: ffd786 j 40205140 +402051e1: 662b addi.n a6, a6, 2 +402051e3: 744060 extui a4, a6, 0, 8 +402051e6: 244c42 s8i a4, a12, 36 +402051e9: 0e3d mov.n a3, a14 +402051eb: 27cc22 addi a2, a12, 39 +402051ee: ef8901 l32r a0, 40201014 <_irom0_text_start+0x4> +402051f1: 0000c0 callx0 a0 +402051f4: ffd206 j 40205140 +402051f7: 66b600 excw +402051fa: 3229 s32i.n a2, a2, 12 +402051fc: 520102 l8ui a0, a1, 82 +402051ff: 800002 l8ui a0, a0, 128 +40205202: 501133 excw +40205205: 322043 excw +40205208: 220202 l8ui a0, a2, 34 +4020520b: 000302 l8ui a0, a3, 0 +4020520e: 401133 excw +40205211: 802033 excw +40205214: 300122 l8ui a2, a1, 48 +40205217: 312022 l32i a2, a0, 196 +4020521a: 37fd01 l32r a0, 401d3210 <_lit4_end+0xccee4> +4020521d: 220592 l8ui a9, a5, 34 +40205220: 0e .byte 0xe +40205221: a21606 j 401eda7d <_lit4_end+0xe7751> +40205224: 2ee0f1 l32r a15, 401d0da4 <_lit4_end+0xcaa78> +40205227: 616220 excw +4020522a: c38524 excw +4020522d: fe .byte 0xfe +4020522e: 242162 l32i a6, a1, 144 +40205231: f0b216 beqz a2, 40205140 +40205234: f24c21 l32r a2, 40201b64 +40205237: 5e22a2 l32i a10, a2, 0x178 +4020523a: f02a16 beqz a10, 40205140 +4020523d: 1f2142 l32i a4, a1, 124 +40205240: 192122 l32i a2, a1, 100 +40205243: f8c662 addi a6, a6, -8 +40205246: a0c472 addi a7, a4, -96 +40205249: 0ac232 addi a3, a2, 10 +4020524c: 746060 extui a6, a6, 0, 8 +4020524f: 0ace52 addi a5, a14, 10 +40205252: 4e7b addi.n a4, a14, 7 +40205254: 320c movi.n a2, 3 +40205256: 000ac0 callx0 a10 +40205259: ffb8c6 j 40205140 +4020525c: 192142 l32i a4, a1, 100 +4020525f: 1cc4e2 addi a14, a4, 28 +40205262: ff90c6 j 402050a9 +40205265: 2f2102 l32i a0, a1, 188 +40205268: c0a092 movi a9, 192 +4020526b: 2e21c2 l32i a12, a1, 184 +4020526e: 2d21d2 l32i a13, a1, 180 +40205271: 2c21e2 l32i a14, a1, 176 +40205274: 2b21f2 l32i a15, a1, 172 +40205277: 119a add.n a1, a1, a9 +40205279: f00d ret.n +4020527b: ce6000 excw +4020527e: fe .byte 0xfe +4020527f: 3f .byte 0x3f +40205280: fedc10 excw +40205283: 3f .byte 0x3f +40205284: 3a98 l32i.n a9, a10, 12 +40205286: 940000 extui a0, a0, 0, 10 +40205289: f20c movi.n a2, 15 +4020528b: 3f .byte 0x3f +4020528c: ce5b addi.n a12, a14, 5 +4020528e: fe .byte 0xfe +4020528f: 3f .byte 0x3f +40205290: 203fc0 or a3, a15, a12 +40205293: 82a440 mull a10, a4, a4 +40205296: fe .byte 0xfe +40205297: 3f .byte 0x3f +40205298: 105da0 and a5, a13, a10 +4020529b: 2ecc40 excw +4020529e: 744000 extui a4, a0, 0, 8 +402052a1: 0f .byte 0xf +402052a2: 804000 add a4, a0, a0 +402052a5: 0f .byte 0xf +402052a6: 00 .byte 00 +402052a7: 40 .byte 0x40 + +402052a8 : +402052a8: e0c112 addi a1, a1, -32 +402052ab: 51d9 s32i.n a13, a1, 20 +402052ad: f22dd1 l32r a13, 40201b64 +402052b0: 41e9 s32i.n a14, a1, 16 +402052b2: 5de8 l32i.n a14, a13, 20 +402052b4: 31f9 s32i.n a15, a1, 12 +402052b6: 7109 s32i.n a0, a1, 28 +402052b8: 74f020 extui a15, a2, 0, 8 +402052bb: 61c9 s32i.n a12, a1, 24 +402052bd: 020c movi.n a2, 0 +402052bf: 029e27 bne a14, a2, 402052c5 +402052c2: 004ac6 j 402053f1 +402052c5: 342e32 l32i a3, a14, 208 +402052c8: 120c movi.n a2, 1 +402052ca: 027387 bbci a3, 24, 402052d0 +402052cd: 004806 j 402053f1 +402052d0: ffeb21 l32r a2, 4020527c +402052d3: 000242 l8ui a4, a2, 0 +402052d6: 0b6407 bbci a4, 0, 402052e5 +402052d9: 230c movi.n a3, 2 +402052db: 203430 or a3, a4, a3 +402052de: 004232 s8i a3, a2, 0 +402052e1: 004286 j 402053ef +402052e4: e6c100 excw +402052e7: ff .byte 0xff +402052e8: 150c movi.n a5, 1 +402052ea: 053d mov.n a3, a5 +402052ec: 060c movi.n a6, 0 +402052ee: 0c4d mov.n a4, a12 +402052f0: 052d mov.n a2, a5 +402052f2: 1b2145 call0 40220508 +402052f5: 0c3d mov.n a3, a12 +402052f7: efdc bnez.n a15, 40205319 +402052f9: 0e28 l32i.n a2, a14, 0 +402052fb: 92cc bnez.n a2, 40205308 +402052fd: f34b41 l32r a4, 4020202c +40205300: 202ee0 or a2, a14, a14 +40205303: 0f5385 call0 4021483c +40205306: 0e29 s32i.n a2, a14, 0 +40205308: 002e22 l32i a2, a14, 0 +4020530b: 238f05 call0 40228bfc +4020530e: 002e22 l32i a2, a14, 0 +40205311: 237c05 call0 40228ad4 +40205314: 000bc6 j 40205347 +40205317: 010000 slli a0, a0, 32 +4020531a: df .byte 0xdf +4020531b: ff .byte 0xff +4020531c: 0000c0 callx0 a0 +4020531f: ffd921 l32r a2, 40205284 +40205322: ffde01 l32r a0, 4020529c +40205325: 0000c0 callx0 a0 +40205328: ffd831 l32r a3, 40205288 +4020532b: feaf22 movi a2, -2 +4020532e: 0020c0 memw +40205331: 002342 l32i a4, a3, 0 +40205334: 102420 and a2, a4, a2 +40205337: 0020c0 memw +4020533a: 0329 s32i.n a2, a3, 0 +4020533c: 195385 call0 4021e878 +4020533f: 12cc bnez.n a2, 40205344 +40205341: 192885 call0 4021e5cc +40205344: 1b71c5 call0 40220a64 +40205347: 0c6b45 call0 402119fc +4020534a: 0b3266 bnei a2, 3, 40205359 +4020534d: 042d22 l32i a2, a13, 16 +40205350: 005216 beqz a2, 40205359 +40205353: 112222 l32i a2, a2, 68 +40205356: 3a22f6 bgeui a2, 2, 40205394 +40205359: 03dd22 addmi a2, a13, 0x300 +4020535c: 4102c2 l8ui a12, a2, 65 +4020535f: ffd001 l32r a0, 402052a0 +40205362: 0000c0 callx0 a0 +40205365: cc0b addi.n a12, a12, -1 +40205367: 74c0c0 extui a12, a12, 0, 8 +4020536a: 80a022 movi a2, 128 +4020536d: 90ccc0 addx2 a12, a12, a12 +40205370: a0cc20 addx4 a12, a12, a2 +40205373: cdca add.n a12, a13, a12 +40205375: 4b2d22 l32i a2, a13, 0x12c +40205378: cc4b addi.n a12, a12, 4 +4020537a: 0712c7 beq a2, a12, 40205385 +4020537d: ffc321 l32r a2, 4020528c +40205380: 130c movi.n a3, 1 +40205382: 004232 s8i a3, a2, 0 +40205385: 4b6dc2 s32i a12, a13, 0x12c +40205388: ffc701 l32r a0, 402052a4 +4020538b: 0000c0 callx0 a0 +4020538e: 202cc0 or a2, a12, a12 +40205391: 009885 call0 40205d1c +40205394: 038f56 bnez a15, 402053d0 +40205397: 01dd22 addmi a2, a13, 0x100 +4020539a: df0222 l8ui a2, a2, 223 +4020539d: 2f6207 bbci a2, 0, 402053d0 +402053a0: faf9c1 l32r a12, 40203f84 +402053a3: ffbb31 l32r a3, 40205290 +402053a6: 00a042 movi a4, 0 +402053a9: 0c2d mov.n a2, a12 +402053ab: fc0201 l32r a0, 402043b4 +402053ae: 0000c0 callx0 a0 +402053b1: faec21 l32r a2, 40203f64 +402053b4: 130c movi.n a3, 1 +402053b6: 004232 s8i a3, a2, 0 +402053b9: 0c2d mov.n a2, a12 +402053bb: fb0001 l32r a0, 40203fbc +402053be: 0000c0 callx0 a0 +402053c1: 150c movi.n a5, 1 +402053c3: 040c movi.n a4, 0 +402053c5: e8a332 movi a3, 0x3e8 +402053c8: 0c2d mov.n a2, a12 +402053ca: fafb01 l32r a0, 40203fb8 +402053cd: 0000c0 callx0 a0 +402053d0: 01a022 movi a2, 1 +402053d3: 1dd005 call0 402230d4 +402053d6: 202dd0 or a2, a13, a13 +402053d9: fefdc5 call0 402043b8 +402053dc: ffae21 l32r a2, 40205294 +402053df: 030c movi.n a3, 0 +402053e1: 004232 s8i a3, a2, 0 +402053e4: d30e32 l8ui a3, a14, 211 +402053e7: 120c movi.n a2, 1 +402053e9: 202320 or a2, a3, a2 +402053ec: d34e22 s8i a2, a14, 211 +402053ef: 120c movi.n a2, 1 +402053f1: 7108 l32i.n a0, a1, 28 +402053f3: 61c8 l32i.n a12, a1, 24 +402053f5: 51d8 l32i.n a13, a1, 20 +402053f7: 41e8 l32i.n a14, a1, 16 +402053f9: 31f8 l32i.n a15, a1, 12 +402053fb: 20c112 addi a1, a1, 32 +402053fe: f00d ret.n +40205400: ce59 s32i.n a5, a14, 48 +40205402: fe .byte 0xfe +40205403: 3f .byte 0x3f +40205404: ce58 l32i.n a5, a14, 48 +40205406: fe .byte 0xfe +40205407: 3f .byte 0x3f +40205408: fece40 excw +4020540b: 3f .byte 0x3f +4020540c: 0927c0 excw +4020540f: f44800 extui a4, a0, 8, 16 +40205412: ff .byte 0xff +40205413: ff .byte 0xff +40205414: ce5a add.n a12, a14, a5 +40205416: fe .byte 0xfe +40205417: 3f .byte 0x3f +40205418: f0c112 addi a1, a1, -16 +4020541b: ff9821 l32r a2, 4020527c +4020541e: 21c9 s32i.n a12, a1, 8 +40205420: 3109 s32i.n a0, a1, 12 +40205422: 11d9 s32i.n a13, a1, 4 +40205424: 01e9 s32i.n a14, a1, 0 +40205426: 000242 l8ui a4, a2, 0 +40205429: e37c movi.n a3, -2 +4020542b: 103430 and a3, a4, a3 +4020542e: 004232 s8i a3, a2, 0 +40205431: ff9831 l32r a3, 40205294 +40205434: 02cd mov.n a12, a2 +40205436: 000332 l8ui a3, a3, 0 +40205439: 09b356 bnez a3, 402054d8 +4020543c: f1cac1 l32r a12, 40201b64 +4020543f: fbdbd1 l32r a13, 402043ac +40205442: 01dcc2 addmi a12, a12, 0x100 +40205445: de0c22 l8ui a2, a12, 222 +40205448: 042226 beqi a2, 2, 40205450 +4020544b: 1db645 call0 40222fb0 +4020544e: 0d29 s32i.n a2, a13, 0 +40205450: fbd5e1 l32r a14, 402043a4 +40205453: 0e2d mov.n a2, a14 +40205455: fad901 l32r a0, 40203fbc +40205458: 0000c0 callx0 a0 +4020545b: 0d38 l32i.n a3, a13, 0 +4020545d: 202ee0 or a2, a14, a14 +40205460: 150c movi.n a5, 1 +40205462: 00a042 movi a4, 0 +40205465: fad401 l32r a0, 40203fb8 +40205468: 0000c0 callx0 a0 +4020546b: ffe521 l32r a2, 40205400 +4020546e: 000222 l8ui a2, a2, 0 +40205471: 429c beqz.n a2, 40205489 +40205473: ffe431 l32r a3, 40205404 +40205476: 000322 l8ui a2, a3, 0 +40205479: 221b addi.n a2, a2, 1 +4020547b: 742020 extui a2, a2, 0, 8 +4020547e: 004322 s8i a2, a3, 0 +40205481: 0422b6 bltui a2, 2, 40205489 +40205484: 020c movi.n a2, 0 +40205486: 1cc145 call0 4022209c +40205489: de0c22 l8ui a2, a12, 222 +4020548c: 022226 beqi a2, 2, 40205492 +4020548f: 001e86 j 4020550d +40205492: 193e45 call0 4021e878 +40205495: 074216 beqz a2, 4020550d +40205498: ffdcc1 l32r a12, 40205408 +4020549b: 130c movi.n a3, 1 +4020549d: 0c28 l32i.n a2, a12, 0 +4020549f: 221b addi.n a2, a2, 1 +402054a1: 0c29 s32i.n a2, a12, 0 +402054a3: 032d mov.n a2, a3 +402054a5: 12ecc5 call0 40218374 +402054a8: 0d38 l32i.n a3, a13, 0 +402054aa: ffd821 l32r a2, 4020540c +402054ad: f28701 l32r a0, 40201ecc +402054b0: 0000c0 callx0 a0 +402054b3: 0c38 l32i.n a3, a12, 0 +402054b5: 083327 bltu a3, a2, 402054c1 +402054b8: 020c movi.n a2, 0 +402054ba: 145e45 call0 40219aa0 +402054bd: 020c movi.n a2, 0 +402054bf: 0c29 s32i.n a2, a12, 0 +402054c1: 0d38 l32i.n a3, a13, 0 +402054c3: 1123b0 slli a2, a3, 5 +402054c6: c02230 sub a2, a2, a3 +402054c9: a02230 addx4 a2, a2, a3 +402054cc: ffd131 l32r a3, 40205410 +402054cf: b02230 addx8 a2, a2, a3 +402054d2: 1905c5 call0 4021e530 +402054d5: 000d06 j 4020550d +402054d8: ffcf21 l32r a2, 40205414 +402054db: 01a032 movi a3, 1 +402054de: 004232 s8i a3, a2, 0 +402054e1: 01a022 movi a2, 1 +402054e4: 1cbb45 call0 4022209c +402054e7: 000c32 l8ui a3, a12, 0 +402054ea: 1f6317 bbci a3, 1, 4020550d +402054ed: fdaf22 movi a2, -3 +402054f0: 102320 and a2, a3, a2 +402054f3: 004c22 s8i a2, a12, 0 +402054f6: f19b21 l32r a2, 40201b64 +402054f9: 01d222 addmi a2, a2, 0x100 +402054fc: de0222 l8ui a2, a2, 222 +402054ff: 052266 bnei a2, 2, 40205508 +40205502: 120c movi.n a2, 1 +40205504: 000086 j 4020550a +40205507: 020c00 excw +4020550a: ffd9c5 call0 402052a8 +4020550d: 3108 l32i.n a0, a1, 12 +4020550f: 21c8 l32i.n a12, a1, 8 +40205511: 11d8 l32i.n a13, a1, 4 +40205513: 01e8 l32i.n a14, a1, 0 +40205515: 10c112 addi a1, a1, 16 +40205518: f00d ret.n +4020551a: 000000 ill +4020551d: 010000 slli a0, a0, 32 +40205520: fee100 excw +40205523: 3f .byte 0x3f +40205524: fe8ea5 excw +40205527: 3f .byte 0x3f +40205528: fe8861 l32r a6, 40204f48 +4020552b: 3f .byte 0x3f +4020552c: 04b000 extui a11, a0, 0, 1 +4020552f: 84dc00 extui a13, a0, 12, 9 +40205532: fe .byte 0xfe +40205533: 3f .byte 0x3f +40205534: 019000 slli a9, a0, 32 +40205537: 4cd000 excw +4020553a: 124000 excw +4020553d: f290c1 l32r a12, 40201f80 +40205540: f11761 l32r a6, 4020199c +40205543: c2ff52 excw +40205546: e21a61 l32r a6, 401fddb0 <_lit4_end+0xf7a84> +40205549: 021861 l32r a6, 401c5dac <_lit4_end+0xbfa80> +4020554c: d21b61 l32r a6, 401f9db8 <_lit4_end+0xf3a8c> +4020554f: 221961 l32r a6, 401cddb4 <_lit4_end+0xc7a88> +40205552: 0f .byte 0xf +40205553: 84c100 extui a12, a0, 1, 9 +40205556: 90e1f1 l32r a15, 401e98dc <_lit4_end+0xe35b0> +40205559: 26fb addi.n a2, a6, 15 +4020555b: 220b12 l8ui a1, a11, 34 +4020555e: 02dc bnez.n a2, 40205572 +40205560: 080222 l8ui a2, a2, 8 +40205563: 021226 beqi a2, 1, 40205569 +40205566: 002746 j 40205607 +40205569: 020c movi.n a2, 0 +4020556b: 004f22 s8i a2, a15, 0 +4020556e: 0e28 l32i.n a2, a14, 0 +40205570: 9238 l32i.n a3, a2, 36 +40205572: 0348 l32i.n a4, a3, 0 +40205574: 430c movi.n a3, 4 +40205576: 415640 srli a5, a4, 6 +40205579: 0ce5e7 bbsi a5, 14, 40205589 +4020557c: ffe841 l32r a4, 4020551c +4020557f: 630c movi.n a3, 6 +40205581: 104540 and a4, a5, a4 +40205584: 050c movi.n a5, 0 +40205586: 833540 moveqz a3, a5, a4 +40205589: 1cf245 call0 402224b0 +4020558c: 5c28 l32i.n a2, a12, 20 +4020558e: 013d mov.n a3, a1 +40205590: fe4b45 call0 40203a48 +40205593: fb8231 l32r a3, 4020439c +40205596: c148 l32i.n a4, a1, 48 +40205598: 0e29 s32i.n a2, a14, 0 +4020559a: 4228 l32i.n a2, a2, 16 +4020559c: 006342 s32i a4, a3, 0 +4020559f: 032132 l32i a3, a1, 12 +402055a2: 18c222 addi a2, a2, 24 +402055a5: c02320 sub a2, a3, a2 +402055a8: af2c32 l32i a3, a12, 0x2bc +402055ab: c02230 sub a2, a2, a3 +402055ae: fb7c31 l32r a3, 402043a0 +402055b1: 004322 s8i a2, a3, 0 +402055b4: 01dc22 addmi a2, a12, 0x100 +402055b7: de0222 l8ui a2, a2, 222 +402055ba: 022226 beqi a2, 2, 402055c0 +402055bd: 1d9bc5 call0 40222f7c +402055c0: 0c4385 call0 402119fc +402055c3: 093266 bnei a2, 3, 402055d0 +402055c6: 4c28 l32i.n a2, a12, 16 +402055c8: 428c beqz.n a2, 402055d0 +402055ca: 112222 l32i a2, a2, 68 +402055cd: 3622f6 bgeui a2, 2, 40205607 +402055d0: 03dc22 addmi a2, a12, 0x300 +402055d3: 4102d2 l8ui a13, a2, 65 +402055d6: ff3201 l32r a0, 402052a0 +402055d9: 0000c0 callx0 a0 +402055dc: dd0b addi.n a13, a13, -1 +402055de: 74d0d0 extui a13, a13, 0, 8 +402055e1: 80a022 movi a2, 128 +402055e4: 90ddd0 addx2 a13, a13, a13 +402055e7: a0dd20 addx4 a13, a13, a2 +402055ea: dcda add.n a13, a12, a13 +402055ec: 4b2c22 l32i a2, a12, 0x12c +402055ef: dd4b addi.n a13, a13, 4 +402055f1: 0412d7 beq a2, a13, 402055f9 +402055f4: 120c movi.n a2, 1 +402055f6: 004f22 s8i a2, a15, 0 +402055f9: 4b6cd2 s32i a13, a12, 0x12c +402055fc: ff2a01 l32r a0, 402052a4 +402055ff: 0000c0 callx0 a0 +40205602: 0d2d mov.n a2, a13 +40205604: 007145 call0 40205d1c +40205607: 0e28 l32i.n a2, a14, 0 +40205609: 1cc216 beqz a2, 402057d9 +4020560c: 42f8 l32i.n a15, a2, 16 +4020560e: af2c62 l32i a6, a12, 0x2bc +40205611: 18cf22 addi a2, a15, 24 +40205614: 106122 s32i a2, a1, 64 +40205617: fb6221 l32r a2, 402043a0 +4020561a: 5c38 l32i.n a3, a12, 20 +4020561c: 000222 l8ui a2, a2, 0 +4020561f: 262332 l32i a3, a3, 152 +40205622: 626a add.n a6, a2, a6 +40205624: 116122 s32i a2, a1, 68 +40205627: 102122 l32i a2, a1, 64 +4020562a: 02dcd2 addmi a13, a12, 0x200 +4020562d: 626a add.n a6, a2, a6 +4020562f: 5e1322 l16ui a2, a3, 188 +40205632: 220b addi.n a2, a2, -1 +40205634: 1122c0 slli a2, a2, 4 +40205637: 0b5f22 s16i a2, a15, 22 +4020563a: 5e1322 l16ui a2, a3, 188 +4020563d: 221b addi.n a2, a2, 1 +4020563f: 5e5322 s16i a2, a3, 188 +40205642: 150d22 l8ui a2, a13, 21 +40205645: 3f1266 bnei a2, 1, 40205688 +40205648: 170d82 l8ui a8, a13, 23 +4020564b: 170c movi.n a7, 1 +4020564d: 160d22 l8ui a2, a13, 22 +40205650: 103870 and a3, a8, a7 +40205653: 303730 xor a3, a7, a3 +40205656: 401200 ssl a2 +40205659: a14700 sll a4, a7 +4020565c: 401200 ssl a2 +4020565f: a13300 sll a3, a3 +40205662: 050c movi.n a5, 0 +40205664: 401200 ssl a2 +40205667: a12800 sll a2, a8 +4020566a: 136162 s32i a6, a1, 76 +4020566d: 126172 s32i a7, a1, 72 +40205670: ffb201 l32r a0, 40205538 +40205673: 0000c0 callx0 a0 +40205676: 170d22 l8ui a2, a13, 23 +40205679: 122172 l32i a7, a1, 72 +4020567c: 042020 extui a2, a2, 0, 1 +4020567f: 302720 xor a2, a7, a2 +40205682: 174d22 s8i a2, a13, 23 +40205685: 132162 l32i a6, a1, 76 +40205688: ffa631 l32r a3, 40205520 +4020568b: 265b addi.n a2, a6, 5 +4020568d: 01a042 movi a4, 1 +40205690: 136162 s32i a6, a1, 76 +40205693: ee6001 l32r a0, 40201014 <_irom0_text_start+0x4> +40205696: 0000c0 callx0 a0 +40205699: 132162 l32i a6, a1, 76 +4020569c: 020622 l8ui a2, a6, 2 +4020569f: 12cc bnez.n a2, 402056a4 +402056a1: 030622 l8ui a2, a6, 3 +402056a4: 220b addi.n a2, a2, -1 +402056a6: 024622 s8i a2, a6, 2 +402056a9: ff9e21 l32r a2, 40205524 +402056ac: ff5531 l32r a3, 40205400 +402056af: 000222 l8ui a2, a2, 0 +402056b2: 040642 l8ui a4, a6, 4 +402056b5: 928c beqz.n a2, 402056c2 +402056b7: 120c movi.n a2, 1 +402056b9: 004322 s8i a2, a3, 0 +402056bc: 202420 or a2, a4, a2 +402056bf: 000446 j 402056d4 +402056c2: 00a022 movi a2, 0 +402056c5: 004322 s8i a2, a3, 0 +402056c8: ff4f31 l32r a3, 40205404 +402056cb: 004322 s8i a2, a3, 0 +402056ce: feaf32 movi a3, -2 +402056d1: 102430 and a2, a4, a3 +402056d4: 044622 s8i a2, a6, 4 +402056d7: 562c22 l32i a2, a12, 0x158 +402056da: 046216 beqz a2, 40205724 +402056dd: f37c movi.n a3, -1 +402056df: 004132 s8i a3, a1, 0 +402056e2: 014d mov.n a4, a1 +402056e4: 030c movi.n a3, 0 +402056e6: 222b addi.n a2, a2, 2 +402056e8: 003bc5 call0 40205aa8 +402056eb: 000132 l8ui a3, a1, 0 +402056ee: 20cf22 addi a2, a15, 32 +402056f1: 240c movi.n a4, 2 +402056f3: 152366 bnei a3, 2, 4020570c +402056f6: ff8c31 l32r a3, 40205528 +402056f9: ee4601 l32r a0, 40201014 <_irom0_text_start+0x4> +402056fc: 0000c0 callx0 a0 +402056ff: ff8b21 l32r a2, 4020552c +40205702: 1d8645 call0 40222f68 +40205705: 2ca122 movi a2, 0x12c +40205708: 000486 j 4020571e +4020570b: 893100 excw +4020570e: ff .byte 0xff +4020570f: ee4101 l32r a0, 40201014 <_irom0_text_start+0x4> +40205712: 0000c0 callx0 a0 +40205715: ff8721 l32r a2, 40205534 +40205718: 1d84c5 call0 40222f68 +4020571b: 64a022 movi a2, 100 +4020571e: f5ad31 l32r a3, 40202dd4 +40205721: 3c5322 s16i a2, a3, 120 +40205724: af2c32 l32i a3, a12, 0x2bc +40205727: 112122 l32i a2, a1, 68 +4020572a: 323a add.n a3, a2, a3 +4020572c: 102122 l32i a2, a1, 64 +4020572f: 330b addi.n a3, a3, -1 +40205731: 803230 add a3, a2, a3 +40205734: 4b2c22 l32i a2, a12, 0x12c +40205737: 126132 s32i a3, a1, 72 +4020573a: fc8b45 call0 40201ff0 +4020573d: 122132 l32i a3, a1, 72 +40205740: 004322 s8i a2, a3, 0 +40205743: 4b2c22 l32i a2, a12, 0x12c +40205746: fc8a85 call0 40201ff0 +40205749: 03dc32 addmi a3, a12, 0x300 +4020574c: 414322 s8i a2, a3, 65 +4020574f: f30821 l32r a2, 40202370 +40205752: 0e38 l32i.n a3, a14, 0 +40205754: 0020c0 memw +40205757: 0228 l32i.n a2, a2, 0 +40205759: 9338 l32i.n a3, a3, 36 +4020575b: ffa042 movi a4, 255 +4020575e: 6329 s32i.n a2, a3, 24 +40205760: 6f29 s32i.n a2, a15, 24 +40205762: 020c movi.n a2, 0 +40205764: 7f29 s32i.n a2, a15, 28 +40205766: f6fc21 l32r a2, 40203358 +40205769: 150c movi.n a5, 1 +4020576b: 009222 l16si a2, a2, 0 +4020576e: 32cc bnez.n a2, 40205775 +40205770: 040c movi.n a4, 0 +40205772: 205440 or a5, a4, a4 +40205775: fb0931 l32r a3, 4020439c +40205778: f42020 extui a2, a2, 0, 16 +4020577b: 0338 l32i.n a3, a3, 0 +4020577d: 094322 s8i a2, a3, 9 +40205780: 412820 srli a2, a2, 8 +40205783: 074352 s8i a5, a3, 7 +40205786: 084342 s8i a4, a3, 8 +40205789: 0a4322 s8i a2, a3, 10 +4020578c: 0072c5 call0 40205ebc +4020578f: 046216 beqz a2, 402057d9 +40205792: feba31 l32r a3, 4020527c +40205795: 120c movi.n a2, 1 +40205797: 000342 l8ui a4, a3, 0 +4020579a: 202420 or a2, a4, a2 +4020579d: 004322 s8i a2, a3, 0 +402057a0: 562c22 l32i a2, a12, 0x158 +402057a3: 929c beqz.n a2, 402057c0 +402057a5: f37c movi.n a3, -1 +402057a7: 004132 s8i a3, a1, 0 +402057aa: 014d mov.n a4, a1 +402057ac: 030c movi.n a3, 0 +402057ae: 222b addi.n a2, a2, 2 +402057b0: 002f45 call0 40205aa8 +402057b3: 000122 l8ui a2, a1, 0 +402057b6: 063266 bnei a2, 3, 402057c0 +402057b9: ffc5c5 call0 40205418 +402057bc: 001b06 j 4020582c +402057bf: 0e2800 excw +402057c2: 1c4d45 call0 40221c98 +402057c5: 080d22 l8ui a2, a13, 8 +402057c8: 601266 bnei a2, 1, 4020582c +402057cb: 090d22 l8ui a2, a13, 9 +402057ce: 05a216 beqz a2, 4020582c +402057d1: 220b addi.n a2, a2, -1 +402057d3: 094d22 s8i a2, a13, 9 +402057d6: 001486 j 4020582c +402057d9: faf2d1 l32r a13, 402043a4 +402057dc: 01dcc2 addmi a12, a12, 0x100 +402057df: 202dd0 or a2, a13, a13 +402057e2: f9f601 l32r a0, 40203fbc +402057e5: 0000c0 callx0 a0 +402057e8: de0c22 l8ui a2, a12, 222 +402057eb: faf0e1 l32r a14, 402043ac +402057ee: 052226 beqi a2, 2, 402057f7 +402057f1: 1d7bc5 call0 40222fb0 +402057f4: 006e22 s32i a2, a14, 0 +402057f7: 0e38 l32i.n a3, a14, 0 +402057f9: 0d2d mov.n a2, a13 +402057fb: 150c movi.n a5, 1 +402057fd: 00a042 movi a4, 0 +40205800: f9ee01 l32r a0, 40203fb8 +40205803: 0000c0 callx0 a0 +40205806: de0c22 l8ui a2, a12, 222 +40205809: 1f2266 bnei a2, 2, 4020582c +4020580c: 190685 call0 4021e878 +4020580f: 929c beqz.n a2, 4020582c +40205811: 130c movi.n a3, 1 +40205813: 032d mov.n a2, a3 +40205815: 12b5c5 call0 40218374 +40205818: 0e38 l32i.n a3, a14, 0 +4020581a: 1123b0 slli a2, a3, 5 +4020581d: c02230 sub a2, a2, a3 +40205820: a02230 addx4 a2, a2, a3 +40205823: fefb31 l32r a3, 40205410 +40205826: b02230 addx8 a2, a2, a3 +40205829: 18d045 call0 4021e530 +4020582c: 1b2102 l32i a0, a1, 108 +4020582f: 1a21c2 l32i a12, a1, 104 +40205832: 1921d2 l32i a13, a1, 100 +40205835: 1821e2 l32i a14, a1, 96 +40205838: 1721f2 l32i a15, a1, 92 +4020583b: 70c112 addi a1, a1, 112 +4020583e: f00d ret.n +40205840: fe8060 excw +40205843: 3f .byte 0x3f +40205844: 0d78 l32i.n a7, a13, 0 +40205846: 7d0000 excw +40205849: 000d mov.n a0, a0 +4020584b: e86000 excw +4020584e: fe .byte 0xfe +4020584f: 3f .byte 0x3f + +40205850 : +40205850: d0c112 addi a1, a1, -48 +40205853: 0961d2 s32i a13, a1, 36 +40205856: f0c3d1 l32r a13, 40201b64 +40205859: a1c9 s32i.n a12, a1, 40 +4020585b: 5dc8 l32i.n a12, a13, 20 +4020585d: 71f9 s32i.n a15, a1, 28 +4020585f: b109 s32i.n a0, a1, 44 +40205861: 74f020 extui a15, a2, 0, 8 +40205864: 81e9 s32i.n a14, a1, 32 +40205866: 020c movi.n a2, 0 +40205868: 029c27 bne a12, a2, 4020586e +4020586b: 008a46 j 40205a98 +4020586e: 342c32 l32i a3, a12, 208 +40205871: 120c movi.n a2, 1 +40205873: 02f387 bbsi a3, 24, 40205879 +40205876: 008786 j 40205a98 +40205879: 02ed mov.n a14, a2 +4020587b: 05af56 bnez a15, 402058d9 +4020587e: 03dd22 addmi a2, a13, 0x300 +40205881: 440222 l8ui a2, a2, 68 +40205884: 221b addi.n a2, a2, 1 +40205886: 3e22e7 blt a2, a14, 402058c8 +40205889: a05ec0 addx4 a5, a14, a12 +4020588c: 262522 l32i a2, a5, 152 +4020588f: d2ac beqz.n a2, 402058c0 +40205891: 242c62 l32i a6, a12, 144 +40205894: 440c movi.n a4, 4 +40205896: 246c22 s32i a2, a12, 144 +40205899: a0a032 movi a3, 160 +4020589c: 0c2d mov.n a2, a12 +4020589e: 016152 s32i a5, a1, 4 +402058a1: 006162 s32i a6, a1, 0 +402058a4: fd5305 call0 40202dd8 +402058a7: c0a032 movi a3, 192 +402058aa: 240c movi.n a4, 2 +402058ac: 0c2d mov.n a2, a12 +402058ae: fd5285 call0 40202dd8 +402058b1: 0168 l32i.n a6, a1, 0 +402058b3: 1158 l32i.n a5, a1, 4 +402058b5: 246c62 s32i a6, a12, 144 +402058b8: 262532 l32i a3, a5, 152 +402058bb: 0c2d mov.n a2, a12 +402058bd: 0482c5 call0 4020a0ec +402058c0: ee1b addi.n a14, a14, 1 +402058c2: 74e0e0 extui a14, a14, 0, 8 +402058c5: ffed46 j 4020587e +402058c8: 002c22 l32i a2, a12, 0 +402058cb: 2336c5 call0 40228c38 +402058ce: 202cc0 or a2, a12, a12 +402058d1: 0f1285 call0 402149fc +402058d4: 000d46 j 4020590d +402058d7: 010000 slli a0, a0, 32 +402058da: 6f .byte 0x6f +402058db: fe .byte 0xfe +402058dc: 0000c0 callx0 a0 +402058df: fe6921 l32r a2, 40205284 +402058e2: fe6e01 l32r a0, 4020529c +402058e5: 0000c0 callx0 a0 +402058e8: fe6831 l32r a3, 40205288 +402058eb: 01a022 movi a2, 1 +402058ee: 0020c0 memw +402058f1: 002342 l32i a4, a3, 0 +402058f4: 202420 or a2, a4, a2 +402058f7: 0020c0 memw +402058fa: 0329 s32i.n a2, a3, 0 +402058fc: 18f785 call0 4021e878 +402058ff: 128c beqz.n a2, 40205904 +40205901: 18efc5 call0 4021e800 +40205904: ffcf21 l32r a2, 40205840 +40205907: 001222 l16ui a2, a2, 0 +4020590a: 1b2a45 call0 40220bb0 +4020590d: fe6121 l32r a2, 40205294 +40205910: 01a032 movi a3, 1 +40205913: 004232 s8i a3, a2, 0 +40205916: faa321 l32r a2, 402043a4 +40205919: f9a801 l32r a0, 40203fbc +4020591c: 0000c0 callx0 a0 +4020591f: fe5831 l32r a3, 40205280 +40205922: 050c movi.n a5, 0 +40205924: 240c movi.n a4, 2 +40205926: 01a022 movi a2, 1 +40205929: 1ade85 call0 40220714 +4020592c: 120c movi.n a2, 1 +4020592e: 1df4c5 call0 4022387c +40205931: 652d22 l32i a2, a13, 0x194 +40205934: 029c beqz.n a2, 40205948 +40205936: ffc341 l32r a4, 40205844 +40205939: fa9431 l32r a3, 4020438c +4020593c: eef301 l32r a0, 40201508 +4020593f: 0000c0 callx0 a0 +40205942: 00a022 movi a2, 0 +40205945: 656d22 s32i a2, a13, 0x194 +40205948: 662d22 l32i a2, a13, 0x198 +4020594b: f28c beqz.n a2, 4020595e +4020594d: ffbe41 l32r a4, 40205848 +40205950: fa8f31 l32r a3, 4020438c +40205953: eeed01 l32r a0, 40201508 +40205956: 0000c0 callx0 a0 +40205959: 020c movi.n a2, 0 +4020595b: 666d22 s32i a2, a13, 0x198 +4020595e: 060c movi.n a6, 0 +40205960: 150c movi.n a5, 1 +40205962: 064d mov.n a4, a6 +40205964: 063d mov.n a3, a6 +40205966: 052d mov.n a2, a5 +40205968: 1ab9c5 call0 40220508 +4020596b: 040c movi.n a4, 0 +4020596d: 042d mov.n a2, a4 +4020596f: 130c movi.n a3, 1 +40205971: 1d8bc5 call0 40223230 +40205974: 120c movi.n a2, 1 +40205976: 1d7845 call0 402230fc +40205979: 3fec bnez.n a15, 402059a0 +4020597b: 01dd22 addmi a2, a13, 0x100 +4020597e: df0222 l8ui a2, a2, 223 +40205981: 1b6207 bbci a2, 0, 402059a0 +40205984: f98021 l32r a2, 40203f84 +40205987: f98d01 l32r a0, 40203fbc +4020598a: 0000c0 callx0 a0 +4020598d: f07631 l32r a3, 40201b68 +40205990: f97621 l32r a2, 40203f68 +40205993: 0020c0 memw +40205996: 0348 l32i.n a4, a3, 0 +40205998: 102420 and a2, a4, a2 +4020599b: 0020c0 memw +4020599e: 0329 s32i.n a2, a3, 0 +402059a0: 5dd8 l32i.n a13, a13, 20 +402059a2: f26c movi.n a2, -17 +402059a4: 142d32 l32i a3, a13, 80 +402059a7: 102320 and a2, a3, a2 +402059aa: 146d22 s32i a2, a13, 80 +402059ad: 020c movi.n a2, 0 +402059af: 544d22 s8i a2, a13, 84 +402059b2: 262d22 l32i a2, a13, 152 +402059b5: 030c movi.n a3, 0 +402059b7: 2239 s32i.n a3, a2, 8 +402059b9: 332d22 l32i a2, a13, 204 +402059bc: 029237 bne a2, a3, 402059c2 +402059bf: 002686 j 40205a5d +402059c2: 6228 l32i.n a2, a2, 24 +402059c4: 142222 l32i a2, a2, 80 +402059c7: 0b1237 beq a2, a3, 402059d6 +402059ca: fa7031 l32r a3, 4020438c +402059cd: aca142 movi a4, 0x1ac +402059d0: eece01 l32r a0, 40201508 +402059d3: 0000c0 callx0 a0 +402059d6: 332d22 l32i a2, a13, 204 +402059d9: 6228 l32i.n a2, a2, 24 +402059db: 0228 l32i.n a2, a2, 0 +402059dd: a28c beqz.n a2, 402059eb +402059df: fa6b31 l32r a3, 4020438c +402059e2: b0a142 movi a4, 0x1b0 +402059e5: eec801 l32r a0, 40201508 +402059e8: 0000c0 callx0 a0 +402059eb: 332d22 l32i a2, a13, 204 +402059ee: 6228 l32i.n a2, a2, 24 +402059f0: a28c beqz.n a2, 402059fe +402059f2: fa6631 l32r a3, 4020438c +402059f5: b4a142 movi a4, 0x1b4 +402059f8: eec401 l32r a0, 40201508 +402059fb: 0000c0 callx0 a0 +402059fe: 332d22 l32i a2, a13, 204 +40205a01: 1228 l32i.n a2, a2, 4 +40205a03: e228 l32i.n a2, a2, 56 +40205a05: a28c beqz.n a2, 40205a13 +40205a07: fa6131 l32r a3, 4020438c +40205a0a: b8a142 movi a4, 0x1b8 +40205a0d: eebe01 l32r a0, 40201508 +40205a10: 0000c0 callx0 a0 +40205a13: 332d22 l32i a2, a13, 204 +40205a16: 1228 l32i.n a2, a2, 4 +40205a18: f228 l32i.n a2, a2, 60 +40205a1a: 00b216 beqz a2, 40205a29 +40205a1d: fa5b31 l32r a3, 4020438c +40205a20: bca142 movi a4, 0x1bc +40205a23: eeb901 l32r a0, 40201508 +40205a26: 0000c0 callx0 a0 +40205a29: 332d22 l32i a2, a13, 204 +40205a2c: 1228 l32i.n a2, a2, 4 +40205a2e: 00b216 beqz a2, 40205a3d +40205a31: fa5631 l32r a3, 4020438c +40205a34: c0a142 movi a4, 0x1c0 +40205a37: eeb401 l32r a0, 40201508 +40205a3a: 0000c0 callx0 a0 +40205a3d: 332d22 l32i a2, a13, 204 +40205a40: 029c beqz.n a2, 40205a54 +40205a42: fa5231 l32r a3, 4020438c +40205a45: c4a142 movi a4, 0x1c4 +40205a48: eeb001 l32r a0, 40201508 +40205a4b: 0000c0 callx0 a0 +40205a4e: 00a022 movi a2, 0 +40205a51: 336d22 s32i a2, a13, 204 +40205a54: ff7e21 l32r a2, 4020584c +40205a57: f95901 l32r a0, 40203fbc +40205a5a: 0000c0 callx0 a0 +40205a5d: fe0721 l32r a2, 4020527c +40205a60: 000222 l8ui a2, a2, 0 +40205a63: 24e207 bbsi a2, 0, 40205a8b +40205a66: fa4c21 l32r a2, 40204398 +40205a69: 0228 l32i.n a2, a2, 0 +40205a6b: c29c beqz.n a2, 40205a8b +40205a6d: 9238 l32i.n a3, a2, 36 +40205a6f: 0348 l32i.n a4, a3, 0 +40205a71: 430c movi.n a3, 4 +40205a73: 415640 srli a5, a4, 6 +40205a76: 0ee5e7 bbsi a5, 14, 40205a88 +40205a79: fea841 l32r a4, 4020551c +40205a7c: 06a032 movi a3, 6 +40205a7f: 104540 and a4, a5, a4 +40205a82: 00a052 movi a5, 0 +40205a85: 833540 moveqz a3, a5, a4 +40205a88: 1ca245 call0 402224b0 +40205a8b: d30c32 l8ui a3, a12, 211 +40205a8e: e27c movi.n a2, -2 +40205a90: 102320 and a2, a3, a2 +40205a93: d34c22 s8i a2, a12, 211 +40205a96: 120c movi.n a2, 1 +40205a98: b108 l32i.n a0, a1, 44 +40205a9a: a1c8 l32i.n a12, a1, 40 +40205a9c: 91d8 l32i.n a13, a1, 36 +40205a9e: 81e8 l32i.n a14, a1, 32 +40205aa0: 71f8 l32i.n a15, a1, 28 +40205aa2: 30c112 addi a1, a1, 48 +40205aa5: f00d ret.n + ... + +40205aa8 : +40205aa8: 025d mov.n a5, a2 +40205aaa: 042d mov.n a2, a4 +40205aac: f02e41 l32r a4, 40201b64 +40205aaf: f0c112 addi a1, a1, -16 +40205ab2: 562462 l32i a6, a4, 0x158 +40205ab5: 3109 s32i.n a0, a1, 12 +40205ab7: 743030 extui a3, a3, 0, 8 +40205aba: f47c movi.n a4, -1 +40205abc: 098616 beqz a6, 40205b58 +40205abf: 08d516 beqz a5, 40205b50 +40205ac2: 08a216 beqz a2, 40205b50 +40205ac5: 5b5326 beqi a3, 5, 40205b24 +40205ac8: 1d63f6 bgeui a3, 6, 40205ae9 +40205acb: 472326 beqi a3, 2, 40205b16 +40205ace: 0b33f6 bgeui a3, 3, 40205add +40205ad1: b3bc beqz.n a3, 40205b10 +40205ad3: 7f1366 bnei a3, 1, 40205b56 +40205ad6: 640c movi.n a4, 6 +40205ad8: 358b addi.n a3, a5, 8 +40205ada: 001846 j 40205b3f +40205add: 3b3326 beqi a3, 3, 40205b1c +40205ae0: 724366 bnei a3, 4, 40205b56 +40205ae3: 100532 l8ui a3, a5, 16 +40205ae6: 001786 j 40205b48 +40205ae9: 458326 beqi a3, 8, 40205b32 +40205aec: 840c movi.n a4, 8 +40205aee: 0b3437 bltu a4, a3, 40205afd +40205af1: 376326 beqi a3, 6, 40205b2c +40205af4: 5e7366 bnei a3, 7, 40205b56 +40205af7: 130532 l8ui a3, a5, 19 +40205afa: 001286 j 40205b48 +40205afd: 399326 beqi a3, 10, 40205b3a +40205b00: 2e93b6 bltui a3, 10, 40205b32 +40205b03: b40c movi.n a4, 11 +40205b05: 4d9347 bne a3, a4, 40205b56 +40205b08: 1a0532 l8ui a3, a5, 26 +40205b0b: 000e46 j 40205b48 +40205b0e: 320000 excw +40205b11: 460705 call0 4024bb84 <_irom0_text_end+0x1b008> +40205b14: 000c movi.n a0, 0 +40205b16: 0e0532 l8ui a3, a5, 14 +40205b19: 000ac6 j 40205b48 +40205b1c: 0f0532 l8ui a3, a5, 15 +40205b1f: 000946 j 40205b48 +40205b22: 320000 excw +40205b25: 461105 call0 4024bc38 <_irom0_text_end+0x1b0bc> +40205b28: 000007 bnone a0, a0, 40205b2c +40205b2b: 053200 extui a3, a0, 18, 1 +40205b2e: 054612 s8i a1, a6, 5 +40205b31: 240c00 extui a0, a0, 12, 3 +40205b34: 14c532 addi a3, a5, 20 +40205b37: 000106 j 40205b3f +40205b3a: 240c movi.n a4, 2 +40205b3c: 18c532 addi a3, a5, 24 +40205b3f: ed3501 l32r a0, 40201014 <_irom0_text_start+0x4> +40205b42: 0000c0 callx0 a0 +40205b45: 000086 j 40205b4b +40205b48: 004232 s8i a3, a2, 0 +40205b4b: 040c movi.n a4, 0 +40205b4d: 0001c6 j 40205b58 +40205b50: e47c movi.n a4, -2 +40205b52: 000086 j 40205b58 +40205b55: d47c00 extui a7, a0, 12, 14 +40205b58: 3108 l32i.n a0, a1, 12 +40205b5a: 042d mov.n a2, a4 +40205b5c: 10c112 addi a1, a1, 16 +40205b5f: f00d ret.n +40205b61: 000000 ill + +40205b64 : +40205b64: f0c112 addi a1, a1, -16 +40205b67: 11d9 s32i.n a13, a1, 4 +40205b69: 3109 s32i.n a0, a1, 12 +40205b6b: 02dd mov.n a13, a2 +40205b6d: 21c9 s32i.n a12, a1, 8 +40205b6f: 020c movi.n a2, 0 +40205b71: 1b1d27 beq a13, a2, 40205b90 +40205b74: effc21 l32r a2, 40201b64 +40205b77: 562232 l32i a3, a2, 0x158 +40205b7a: 020c movi.n a2, 0 +40205b7c: 101327 beq a3, a2, 40205b90 +40205b7f: 0013c2 l16ui a12, a3, 0 +40205b82: 0d2d mov.n a2, a13 +40205b84: 0c4d mov.n a4, a12 +40205b86: 332b addi.n a3, a3, 2 +40205b88: ed2301 l32r a0, 40201014 <_irom0_text_start+0x4> +40205b8b: 0000c0 callx0 a0 +40205b8e: 2dca add.n a2, a13, a12 +40205b90: 3108 l32i.n a0, a1, 12 +40205b92: 21c8 l32i.n a12, a1, 8 +40205b94: 11d8 l32i.n a13, a1, 4 +40205b96: 10c112 addi a1, a1, 16 +40205b99: f00d ret.n +40205b9b: 00c800 excw +40205b9e: f44023 excw +40205ba1: ff .byte 0xff +40205ba2: 244022 s8i a2, a0, 36 +40205ba5: 3ffee0 excw + +40205ba8 : +40205ba8: ffff41 l32r a4, 40205ba4 +40205bab: 050c movi.n a5, 0 +40205bad: fc4452 s8i a5, a4, 252 +40205bb0: efed31 l32r a3, 40201b64 +40205bb3: 0a1266 bnei a2, 1, 40205bc1 +40205bb6: 320c movi.n a2, 3 +40205bb8: fd4422 s8i a2, a4, 253 +40205bbb: fff821 l32r a2, 40205b9c +40205bbe: 0001c6 j 40205bc9 +40205bc1: b20c movi.n a2, 11 +40205bc3: fd4422 s8i a2, a4, 253 +40205bc6: fff621 l32r a2, 40205ba0 +40205bc9: 000252 l8ui a5, a2, 0 +40205bcc: 040c movi.n a4, 0 +40205bce: 2c4352 s8i a5, a3, 44 +40205bd1: 1ec222 addi a2, a2, 30 +40205bd4: 331b addi.n a3, a3, 1 +40205bd6: 10b457 bgeu a4, a5, 40205bea +40205bd9: 000262 l8ui a6, a2, 0 +40205bdc: 441b addi.n a4, a4, 1 +40205bde: 2c4362 s8i a6, a3, 44 +40205be1: 744040 extui a4, a4, 0, 8 +40205be4: 10c222 addi a2, a2, 16 +40205be7: fffa46 j 40205bd4 +40205bea: f00d ret.n + +40205bec : +40205bec: f0c112 addi a1, a1, -16 +40205bef: 21c9 s32i.n a12, a1, 8 +40205bf1: 3109 s32i.n a0, a1, 12 +40205bf3: 02cd mov.n a12, a2 +40205bf5: fffb05 call0 40205ba8 +40205bf8: efdb21 l32r a2, 40201b64 +40205bfb: 03a032 movi a3, 3 +40205bfe: 021c26 beqi a12, 1, 40205c04 +40205c01: 0ca032 movi a3, 12 +40205c04: 7c4232 s8i a3, a2, 124 +40205c07: 030c movi.n a3, 0 +40205c09: 7d4232 s8i a3, a2, 125 +40205c0c: 7e4232 s8i a3, a2, 126 +40205c0f: 430c movi.n a3, 4 +40205c11: 7f4232 s8i a3, a2, 127 +40205c14: 3108 l32i.n a0, a1, 12 +40205c16: 21c8 l32i.n a12, a1, 8 +40205c18: 10c112 addi a1, a1, 16 +40205c1b: f00d ret.n +40205c1d: 000000 ill +40205c20: ce78 l32i.n a7, a14, 48 +40205c22: fe .byte 0xfe +40205c23: 3f .byte 0x3f + +40205c24 : +40205c24: ffff21 l32r a2, 40205c20 +40205c27: 030c movi.n a3, 0 +40205c29: 8239 s32i.n a3, a2, 32 +40205c2b: 7239 s32i.n a3, a2, 28 +40205c2d: 504232 s8i a3, a2, 80 +40205c30: 514232 s8i a3, a2, 81 +40205c33: f00d ret.n +40205c35: 000000 ill +40205c38: ce7c movi.n a14, -4 +40205c3a: fe .byte 0xfe +40205c3b: 3f .byte 0x3f +40205c3c: 2ae8 l32i.n a14, a10, 8 +40205c3e: 00 .byte 00 +40205c3f: 40 .byte 0x40 + +40205c40 : +40205c40: f0c112 addi a1, a1, -16 +40205c43: 21c9 s32i.n a12, a1, 8 +40205c45: fff6c1 l32r a12, 40205c20 +40205c48: 11d9 s32i.n a13, a1, 4 +40205c4a: 01e9 s32i.n a14, a1, 0 +40205c4c: 6cd8 l32i.n a13, a12, 24 +40205c4e: 02ed mov.n a14, a2 +40205c50: fffa21 l32r a2, 40205c38 +40205c53: 831c movi.n a3, 24 +40205c55: 3109 s32i.n a0, a1, 12 +40205c57: fff901 l32r a0, 40205c3c +40205c5a: 0000c0 callx0 a0 +40205c5d: 5d8c beqz.n a13, 40205c66 +40205c5f: 4c28 l32i.n a2, a12, 16 +40205c61: 0e3d mov.n a3, a14 +40205c63: 000dc0 callx0 a13 +40205c66: 3108 l32i.n a0, a1, 12 +40205c68: 21c8 l32i.n a12, a1, 8 +40205c6a: 11d8 l32i.n a13, a1, 4 +40205c6c: 01e8 l32i.n a14, a1, 0 +40205c6e: 10c112 addi a1, a1, 16 +40205c71: f00d ret.n +40205c73: c11200 mul16u a1, a2, a0 +40205c76: a022f0 addx4 a2, a2, a15 +40205c79: 610200 excw +40205c7c: fc0503 excw +40205c7f: ff .byte 0xff +40205c80: 032102 l32i a0, a1, 12 +40205c83: 10c112 addi a1, a1, 16 +40205c86: f00d ret.n +40205c88: ce9c beqz.n a14, 40205ca8 +40205c8a: fe .byte 0xfe +40205c8b: 3f .byte 0x3f +40205c8c: feceb0 excw +40205c8f: 3f .byte 0x3f + +40205c90 : +40205c90: f0c112 addi a1, a1, -16 +40205c93: 0261c2 s32i a12, a1, 8 +40205c96: ffe2c1 l32r a12, 40205c20 +40205c99: 036102 s32i a0, a1, 12 +40205c9c: 012c22 l32i a2, a12, 4 +40205c9f: 016216 beqz a2, 40205cb9 +40205ca2: fff921 l32r a2, 40205c88 +40205ca5: f8c501 l32r a0, 40203fbc +40205ca8: 0000c0 callx0 a0 +40205cab: fff821 l32r a2, 40205c8c +40205cae: f8c301 l32r a0, 40203fbc +40205cb1: 0000c0 callx0 a0 +40205cb4: 420c movi.n a2, 4 +40205cb6: fff885 call0 40205c40 +40205cb9: 7c48 l32i.n a4, a12, 28 +40205cbb: 548c beqz.n a4, 40205cc4 +40205cbd: 8c28 l32i.n a2, a12, 32 +40205cbf: 430c movi.n a3, 4 +40205cc1: 0004c0 callx0 a4 +40205cc4: 3108 l32i.n a0, a1, 12 +40205cc6: 21c8 l32i.n a12, a1, 8 +40205cc8: 10c112 addi a1, a1, 16 +40205ccb: f00d ret.n +40205ccd: 000000 ill + +40205cd0 : +40205cd0: e0c112 addi a1, a1, -32 +40205cd3: 0661c2 s32i a12, a1, 24 +40205cd6: ffd2c1 l32r a12, 40205c20 +40205cd9: 0561d2 s32i a13, a1, 20 +40205cdc: 0461e2 s32i a14, a1, 16 +40205cdf: 31f9 s32i.n a15, a1, 12 +40205ce1: 7109 s32i.n a0, a1, 28 +40205ce3: 74d020 extui a13, a2, 0, 8 +40205ce6: 500c22 l8ui a2, a12, 80 +40205ce9: 03fd mov.n a15, a3 +40205ceb: 04ed mov.n a14, a4 +40205ced: 928c beqz.n a2, 40205cfa +40205cef: 510c32 l8ui a3, a12, 81 +40205cf2: 320c movi.n a2, 3 +40205cf4: 1033d7 bltu a3, a13, 40205d08 +40205cf7: fff985 call0 40205c90 +40205cfa: 120c movi.n a2, 1 +40205cfc: 504c22 s8i a2, a12, 80 +40205cff: 514cd2 s8i a13, a12, 81 +40205d02: 7cf9 s32i.n a15, a12, 28 +40205d04: 8ce9 s32i.n a14, a12, 32 +40205d06: 020c movi.n a2, 0 +40205d08: 7108 l32i.n a0, a1, 28 +40205d0a: 61c8 l32i.n a12, a1, 24 +40205d0c: 51d8 l32i.n a13, a1, 20 +40205d0e: 41e8 l32i.n a14, a1, 16 +40205d10: 31f8 l32i.n a15, a1, 12 +40205d12: 20c112 addi a1, a1, 32 +40205d15: f00d ret.n +40205d17: 315400 srai a5, a0, 20 +40205d1a: 10 .byte 0x10 +40205d1b: 40 .byte 0x40 + +40205d1c : +40205d1c: f0c112 addi a1, a1, -16 +40205d1f: 21c9 s32i.n a12, a1, 8 +40205d21: 02cd mov.n a12, a2 +40205d23: 021222 l16ui a2, a2, 4 +40205d26: 040c movi.n a4, 0 +40205d28: 01a032 movi a3, 1 +40205d2b: 036102 s32i a0, a1, 12 +40205d2e: fffa01 l32r a0, 40205d18 +40205d31: 0000c0 callx0 a0 +40205d34: fd5b01 l32r a0, 402052a0 +40205d37: 0000c0 callx0 a0 +40205d3a: ffb921 l32r a2, 40205c20 +40205d3d: 1362c2 s32i a12, a2, 76 +40205d40: fd5901 l32r a0, 402052a4 +40205d43: 0000c0 callx0 a0 +40205d46: 3108 l32i.n a0, a1, 12 +40205d48: 21c8 l32i.n a12, a1, 8 +40205d4a: 10c112 addi a1, a1, 16 +40205d4d: f00d ret.n +40205d4f: 5c7400 excw +40205d52: 20 .byte 0x20 +40205d53: 40 .byte 0x40 + +40205d54 : +40205d54: ef8431 l32r a3, 40201b64 +40205d57: f0c112 addi a1, a1, -16 +40205d5a: 21c9 s32i.n a12, a1, 8 +40205d5c: 11d9 s32i.n a13, a1, 4 +40205d5e: 3109 s32i.n a0, a1, 12 +40205d60: 02dd mov.n a13, a2 +40205d62: 02d322 addmi a2, a3, 0x200 +40205d65: 140222 l8ui a2, a2, 20 +40205d68: 0c0c movi.n a12, 0 +40205d6a: 0b1226 beqi a2, 1, 40205d79 +40205d6d: 03d332 addmi a3, a3, 0x300 +40205d70: 4103c2 l8ui a12, a3, 65 +40205d73: ffccc2 addi a12, a12, -1 +40205d76: 74c0c0 extui a12, a12, 0, 8 +40205d79: ffa921 l32r a2, 40205c20 +40205d7c: 90ccc0 addx2 a12, a12, a12 +40205d7f: 0062d2 s32i a13, a2, 0 +40205d82: fd4701 l32r a0, 402052a0 +40205d85: 0000c0 callx0 a0 +40205d88: 80a022 movi a2, 128 +40205d8b: a0cc20 addx4 a12, a12, a2 +40205d8e: cdca add.n a12, a13, a12 +40205d90: 4b2d22 l32i a2, a13, 0x12c +40205d93: cc4b addi.n a12, a12, 4 +40205d95: 0712c7 beq a2, a12, 40205da0 +40205d98: fd3d21 l32r a2, 4020528c +40205d9b: 130c movi.n a3, 1 +40205d9d: 004232 s8i a3, a2, 0 +40205da0: 4b6dc2 s32i a12, a13, 0x12c +40205da3: fd4001 l32r a0, 402052a4 +40205da6: 0000c0 callx0 a0 +40205da9: 202cc0 or a2, a12, a12 +40205dac: fff6c5 call0 40205d1c +40205daf: ffe8c1 l32r a12, 40205d50 +40205db2: ffb521 l32r a2, 40205c88 +40205db5: 203cc0 or a3, a12, a12 +40205db8: 00a042 movi a4, 0 +40205dbb: f97e01 l32r a0, 402043b4 +40205dbe: 0000c0 callx0 a0 +40205dc1: ffb221 l32r a2, 40205c8c +40205dc4: 0c3d mov.n a3, a12 +40205dc6: 140c movi.n a4, 1 +40205dc8: f97b01 l32r a0, 402043b4 +40205dcb: 0000c0 callx0 a0 +40205dce: 3108 l32i.n a0, a1, 12 +40205dd0: 21c8 l32i.n a12, a1, 8 +40205dd2: 11d8 l32i.n a13, a1, 4 +40205dd4: 10c112 addi a1, a1, 16 +40205dd7: f00d ret.n +40205dd9: 000000 ill +40205ddc: f0c112 addi a1, a1, -16 +40205ddf: 0261c2 s32i a12, a1, 8 +40205de2: ff8fc1 l32r a12, 40205c20 +40205de5: 0161d2 s32i a13, a1, 4 +40205de8: 132c32 l32i a3, a12, 76 +40205deb: 012c22 l32i a2, a12, 4 +40205dee: 021342 l16ui a4, a3, 4 +40205df1: 021232 l16ui a3, a2, 4 +40205df4: 01e9 s32i.n a14, a1, 0 +40205df6: 3109 s32i.n a0, a1, 12 +40205df8: 5cd8 l32i.n a13, a12, 20 +40205dfa: 4ce8 l32i.n a14, a12, 16 +40205dfc: 021437 beq a4, a3, 40205e02 +40205dff: fff1c5 call0 40205d1c +40205e02: 7d8c beqz.n a13, 40205e0d +40205e04: 00a032 movi a3, 0 +40205e07: 202ee0 or a2, a14, a14 +40205e0a: 000dc0 callx0 a13 +40205e0d: 2c28 l32i.n a2, a12, 8 +40205e0f: 32dc bnez.n a2, 40205e26 +40205e11: 3c28 l32i.n a2, a12, 12 +40205e13: e2ec bnez.n a2, 40205e45 +40205e15: ff8821 l32r a2, 40205c38 +40205e18: 831c movi.n a3, 24 +40205e1a: ff8801 l32r a0, 40205c3c +40205e1d: 0000c0 callx0 a0 +40205e20: 000e86 j 40205e5e +40205e23: 000000 ill +40205e26: 3c38 l32i.n a3, a12, 12 +40205e28: 19b237 bgeu a2, a3, 40205e45 +40205e2b: ff97d1 l32r a13, 40205c88 +40205e2e: 0d2d mov.n a2, a13 +40205e30: f86301 l32r a0, 40203fbc +40205e33: 0000c0 callx0 a0 +40205e36: 2c38 l32i.n a3, a12, 8 +40205e38: 150c movi.n a5, 1 +40205e3a: 040c movi.n a4, 0 +40205e3c: 202dd0 or a2, a13, a13 +40205e3f: f85e01 l32r a0, 40203fb8 +40205e42: 0000c0 callx0 a0 +40205e45: ff91d1 l32r a13, 40205c8c +40205e48: 0d2d mov.n a2, a13 +40205e4a: f85c01 l32r a0, 40203fbc +40205e4d: 0000c0 callx0 a0 +40205e50: 3c38 l32i.n a3, a12, 12 +40205e52: 150c movi.n a5, 1 +40205e54: 040c movi.n a4, 0 +40205e56: 0d2d mov.n a2, a13 +40205e58: f85801 l32r a0, 40203fb8 +40205e5b: 0000c0 callx0 a0 +40205e5e: 3108 l32i.n a0, a1, 12 +40205e60: 21c8 l32i.n a12, a1, 8 +40205e62: 11d8 l32i.n a13, a1, 4 +40205e64: 01e8 l32i.n a14, a1, 0 +40205e66: 10c112 addi a1, a1, 16 +40205e69: f00d ret.n + ... + +40205e6c : +40205e6c: ff6d81 l32r a8, 40205c20 +40205e6f: f0c112 addi a1, a1, -16 +40205e72: 0128a2 l32i a10, a8, 4 +40205e75: 036102 s32i a0, a1, 12 +40205e78: 209220 or a9, a2, a2 +40205e7b: 320c movi.n a2, 3 +40205e7d: facc bnez.n a10, 40205e90 +40205e7f: 1899 s32i.n a9, a8, 4 +40205e81: 2839 s32i.n a3, a8, 8 +40205e83: 3849 s32i.n a4, a8, 12 +40205e85: 5859 s32i.n a5, a8, 20 +40205e87: 6869 s32i.n a6, a8, 24 +40205e89: 4879 s32i.n a7, a8, 16 +40205e8b: fff505 call0 40205ddc +40205e8e: 020c movi.n a2, 0 +40205e90: 3108 l32i.n a0, a1, 12 +40205e92: 10c112 addi a1, a1, 16 +40205e95: f00d ret.n + ... + +40205e98 : +40205e98: ef3321 l32r a2, 40201b64 +40205e9b: ff6131 l32r a3, 40205c20 +40205e9e: 4b2222 l32i a2, a2, 0x12c +40205ea1: 132332 l32i a3, a3, 76 +40205ea4: f0c112 addi a1, a1, -16 +40205ea7: 021342 l16ui a4, a3, 4 +40205eaa: 021232 l16ui a3, a2, 4 +40205ead: 3109 s32i.n a0, a1, 12 +40205eaf: 021437 beq a4, a3, 40205eb5 +40205eb2: ffe685 call0 40205d1c +40205eb5: 3108 l32i.n a0, a1, 12 +40205eb7: 10c112 addi a1, a1, 16 +40205eba: f00d ret.n + +40205ebc : +40205ebc: ef2a21 l32r a2, 40201b64 +40205ebf: f0c112 addi a1, a1, -16 +40205ec2: 4b2222 l32i a2, a2, 0x12c +40205ec5: 036102 s32i a0, a1, 12 +40205ec8: 0261c2 s32i a12, a1, 8 +40205ecb: fc1245 call0 40201ff0 +40205ece: 20c220 or a12, a2, a2 +40205ed1: ff5321 l32r a2, 40205c20 +40205ed4: 132222 l32i a2, a2, 76 +40205ed7: fc1185 call0 40201ff0 +40205eda: 3108 l32i.n a0, a1, 12 +40205edc: c0cc20 sub a12, a12, a2 +40205edf: 130c movi.n a3, 1 +40205ee1: 020c movi.n a2, 0 +40205ee3: 8323c0 moveqz a2, a3, a12 +40205ee6: 21c8 l32i.n a12, a1, 8 +40205ee8: 10c112 addi a1, a1, 16 +40205eeb: f00d ret.n +40205eed: 000000 ill + +40205ef0 : +40205ef0: f0c112 addi a1, a1, -16 +40205ef3: 440c movi.n a4, 4 +40205ef5: 030c movi.n a3, 0 +40205ef7: 3109 s32i.n a0, a1, 12 +40205ef9: 21c9 s32i.n a12, a1, 8 +40205efb: 20c220 or a12, a2, a2 +40205efe: ec4401 l32r a0, 40201010 <_irom0_text_start> +40205f01: 0000c0 callx0 a0 +40205f04: 3108 l32i.n a0, a1, 12 +40205f06: a20c movi.n a2, 10 +40205f08: 1c29 s32i.n a2, a12, 4 +40205f0a: 21c8 l32i.n a12, a1, 8 +40205f0c: 10c112 addi a1, a1, 16 +40205f0f: f00d ret.n +40205f11: 000000 ill + +40205f14 : +40205f14: 0d1242 l16ui a4, a2, 26 +40205f17: fd8221 l32r a2, 40205520 +40205f1a: a46340 extui a6, a4, 3, 11 +40205f1d: 662a add.n a6, a6, a2 +40205f1f: 000672 l8ui a7, a6, 0 +40205f22: 245040 extui a5, a4, 0, 3 +40205f25: 400500 ssr a5 +40205f28: b18070 sra a8, a7 +40205f2b: 048080 extui a8, a8, 0, 1 +40205f2e: c02830 sub a2, a8, a3 +40205f31: 140c movi.n a4, 1 +40205f33: 090c movi.n a9, 0 +40205f35: 939420 movnez a9, a4, a2 +40205f38: 092d mov.n a2, a9 +40205f3a: 1a1837 beq a8, a3, 40205f58 +40205f3d: 401500 ssl a5 +40205f40: a14400 sll a4, a4 +40205f43: 638c beqz.n a3, 40205f4d +40205f45: 204470 or a4, a4, a7 +40205f48: 000246 j 40205f55 +40205f4b: 7c0000 excw +40205f4e: 4340f3 excw +40205f51: 447030 extui a7, a3, 0, 5 +40205f54: 464210 excw +40205f57: f00d00 subx8 a0, a13, a0 + ... + +40205f5c : +40205f5c: f0c112 addi a1, a1, -16 +40205f5f: 0261c2 s32i a12, a1, 8 +40205f62: 20c330 or a12, a3, a3 +40205f65: e0a032 movi a3, 224 +40205f68: 523a add.n a5, a2, a3 +40205f6a: 0548 l32i.n a4, a5, 0 +40205f6c: 1558 l32i.n a5, a5, 4 +40205f6e: 3109 s32i.n a0, a1, 12 +40205f70: 192457 blt a4, a5, 40205f8d +40205f73: 223a add.n a2, a2, a3 +40205f75: 2238 l32i.n a3, a2, 8 +40205f77: 331b addi.n a3, a3, 1 +40205f79: 2239 s32i.n a3, a2, 8 +40205f7b: 002c22 l32i a2, a12, 0 +40205f7e: 22e205 call0 40228da0 +40205f81: 130c movi.n a3, 1 +40205f83: 0c2d mov.n a2, a12 +40205f85: 1c5285 call0 402224b0 +40205f88: 130c movi.n a3, 1 +40205f8a: 000b86 j 40205fbc +40205f8d: 3c2232 l32i a3, a2, 240 +40205f90: 63cc bnez.n a3, 40205f9a +40205f92: 3b62c2 s32i a12, a2, 236 +40205f95: 0000c6 j 40205f9c +40205f98: c90000 excw +40205f9b: a05283 excw +40205f9e: 5aec bnez.n a10, 40205fc7 +40205fa0: 256852 s32i a5, a8, 148 +40205fa3: 030c movi.n a3, 0 +40205fa5: 8c39 s32i.n a3, a12, 32 +40205fa7: 661b addi.n a6, a6, 1 +40205fa9: 15c9 s32i.n a12, a5, 4 +40205fab: 2569 s32i.n a6, a5, 8 +40205fad: 441b addi.n a4, a4, 1 +40205faf: 386242 s32i a4, a2, 224 +40205fb2: 061466 bnei a4, 1, 40205fbc +40205fb5: 130c movi.n a3, 1 +40205fb7: fff5c5 call0 40205f14 +40205fba: 030c movi.n a3, 0 +40205fbc: 3108 l32i.n a0, a1, 12 +40205fbe: 032d mov.n a2, a3 +40205fc0: 21c8 l32i.n a12, a1, 8 +40205fc2: 10c112 addi a1, a1, 16 +40205fc5: f00d ret.n + ... + +40205fc8 : +40205fc8: d0c112 addi a1, a1, -48 +40205fcb: 0961d2 s32i a13, a1, 36 +40205fce: 20d220 or a13, a2, a2 +40205fd1: 3b2222 l32i a2, a2, 236 +40205fd4: 81e9 s32i.n a14, a1, 32 +40205fd6: b109 s32i.n a0, a1, 44 +40205fd8: a1c9 s32i.n a12, a1, 40 +40205fda: 71f9 s32i.n a15, a1, 28 +40205fdc: 03ed mov.n a14, a3 +40205fde: 07b216 beqz a2, 4020605d +40205fe1: eca0c2 movi a12, 236 +40205fe4: cdca add.n a12, a13, a12 +40205fe6: 0cf8 l32i.n a15, a12, 0 +40205fe8: 064f16 beqz a15, 40206050 +40205feb: 8f28 l32i.n a2, a15, 32 +40205fed: 006122 s32i a2, a1, 0 +40205ff0: 1eec bnez.n a14, 40206015 +40205ff2: ffec85 call0 40205ebc +40205ff5: 728c beqz.n a2, 40206000 +40205ff7: 0f2d mov.n a2, a15 +40205ff9: 1bc9c5 call0 40221c98 +40205ffc: 000e06 j 40206038 +40205fff: 020c00 excw +40206002: 8f29 s32i.n a2, a15, 32 +40206004: eed821 l32r a2, 40201b64 +40206007: 20cf42 addi a4, a15, 32 +4020600a: 742232 l32i a3, a2, 0x1d0 +4020600d: 03f9 s32i.n a15, a3, 0 +4020600f: 746242 s32i a4, a2, 0x1d0 +40206012: 000886 j 40206038 +40206015: 111e26 beqi a14, 1, 4020602a +40206018: f0d621 l32r a2, 40202370 +4020601b: 9f38 l32i.n a3, a15, 36 +4020601d: 0020c0 memw +40206020: 0228 l32i.n a2, a2, 0 +40206022: 6338 l32i.n a3, a3, 24 +40206024: c02230 sub a2, a2, a3 +40206027: 3b32e7 bltu a2, a14, 40206066 +4020602a: 002f22 l32i a2, a15, 0 +4020602d: 22d705 call0 40228da0 +40206030: 01a032 movi a3, 1 +40206033: 0f2d mov.n a2, a15 +40206035: 1c4785 call0 402224b0 +40206038: e0a022 movi a2, 224 +4020603b: 2d2a add.n a2, a13, a2 +4020603d: 0238 l32i.n a3, a2, 0 +4020603f: 330b addi.n a3, a3, -1 +40206041: 0239 s32i.n a3, a2, 0 +40206043: 2c28 l32i.n a2, a12, 8 +40206045: 220b addi.n a2, a2, -1 +40206047: 2c29 s32i.n a2, a12, 8 +40206049: 0128 l32i.n a2, a1, 0 +4020604b: 0c29 s32i.n a2, a12, 0 +4020604d: ffe546 j 40205fe6 +40206050: eca022 movi a2, 236 +40206053: 2d2a add.n a2, a13, a2 +40206055: 030c movi.n a3, 0 +40206057: 1239 s32i.n a3, a2, 4 +40206059: 0239 s32i.n a3, a2, 0 +4020605b: 2239 s32i.n a3, a2, 8 +4020605d: e0a022 movi a2, 224 +40206060: dd2a add.n a13, a13, a2 +40206062: 020c movi.n a2, 0 +40206064: 0d29 s32i.n a2, a13, 0 +40206066: b108 l32i.n a0, a1, 44 +40206068: a1c8 l32i.n a12, a1, 40 +4020606a: 91d8 l32i.n a13, a1, 36 +4020606c: 81e8 l32i.n a14, a1, 32 +4020606e: 71f8 l32i.n a15, a1, 28 +40206070: 30c112 addi a1, a1, 48 +40206073: f00d ret.n +40206075: 000000 ill + +40206078 : +40206078: f0c112 addi a1, a1, -16 +4020607b: 21c9 s32i.n a12, a1, 8 +4020607d: 3109 s32i.n a0, a1, 12 +4020607f: 02cd mov.n a12, a2 +40206081: 2248 l32i.n a4, a2, 8 +40206083: 938c beqz.n a3, 40206090 +40206085: 031c movi.n a3, 16 +40206087: 202430 or a2, a4, a3 +4020608a: 2c29 s32i.n a2, a12, 8 +4020608c: 000706 j 402060ac +4020608f: af2200 excw +40206092: ef .byte 0xef +40206093: 102420 and a2, a4, a2 +40206096: 026c22 s32i a2, a12, 8 +40206099: 030c movi.n a3, 0 +4020609b: 0c2d mov.n a2, a12 +4020609d: ffe745 call0 40205f14 +402060a0: 382c22 l32i a2, a12, 224 +402060a3: 528c beqz.n a2, 402060ac +402060a5: 030c movi.n a3, 0 +402060a7: 0c2d mov.n a2, a12 +402060a9: fff1c5 call0 40205fc8 +402060ac: 3108 l32i.n a0, a1, 12 +402060ae: 21c8 l32i.n a12, a1, 8 +402060b0: 10c112 addi a1, a1, 16 +402060b3: f00d ret.n +402060b5: 000000 ill +402060b8: 0031b4 excw +402060bb: 40 .byte 0x40 + +402060bc : +402060bc: f0c112 addi a1, a1, -16 +402060bf: 21c9 s32i.n a12, a1, 8 +402060c1: 03cd mov.n a12, a3 +402060c3: 11d9 s32i.n a13, a1, 4 +402060c5: 430c movi.n a3, 4 +402060c7: 02dd mov.n a13, a2 +402060c9: 2c4a add.n a2, a12, a4 +402060cb: 3109 s32i.n a0, a1, 12 +402060cd: fffa01 l32r a0, 402060b8 +402060d0: 0000c0 callx0 a0 +402060d3: 00a142 movi a4, 0x100 +402060d6: 630c movi.n a3, 6 +402060d8: 093427 bltu a4, a2, 402060e5 +402060db: 044c movi.n a4, 64 +402060dd: 430c movi.n a3, 4 +402060df: 023427 bltu a4, a2, 402060e5 +402060e2: 05a032 movi a3, 5 +402060e5: 024d mov.n a4, a2 +402060e7: 020c movi.n a2, 0 +402060e9: 1c0885 call0 40222174 +402060ec: 628c beqz.n a2, 402060f6 +402060ee: 1238 l32i.n a3, a2, 4 +402060f0: 1338 l32i.n a3, a3, 4 +402060f2: c3ca add.n a12, a3, a12 +402060f4: 0dc9 s32i.n a12, a13, 0 +402060f6: 3108 l32i.n a0, a1, 12 +402060f8: 21c8 l32i.n a12, a1, 8 +402060fa: 11d8 l32i.n a13, a1, 4 +402060fc: 10c112 addi a1, a1, 16 +402060ff: f00d ret.n +40206101: 000000 ill +40206104: e5ec bnez.n a5, 40206136 +40206106: fe .byte 0xfe +40206107: 3f .byte 0x3f +40206108: e0c112 addi a1, a1, -32 +4020610b: 61c9 s32i.n a12, a1, 24 +4020610d: fffdc1 l32r a12, 40206104 +40206110: 7109 s32i.n a0, a1, 28 +40206112: 460c42 l8ui a4, a12, 70 +40206115: 737c movi.n a3, -9 +40206117: 104430 and a4, a4, a3 +4020611a: 230c movi.n a3, 2 +4020611c: 203430 or a3, a4, a3 +4020611f: 464c32 s8i a3, a12, 70 +40206122: 0c38 l32i.n a3, a12, 0 +40206124: 0263e7 bbci a3, 14, 4020612a +40206127: 002946 j 402061d0 +4020612a: 0238 l32i.n a3, a2, 0 +4020612c: 026397 bbci a3, 9, 40206132 +4020612f: 002746 j 402061d0 +40206132: 060222 l8ui a2, a2, 6 +40206135: fbc985 call0 40201dd0 +40206138: 094216 beqz a2, 402061d0 +4020613b: 020c movi.n a2, 0 +4020613d: 924c22 s8i a2, a12, 146 +40206140: 002c22 l32i a2, a12, 0 +40206143: 0562d7 bbci a2, 13, 4020614c +40206146: 01a022 movi a2, 1 +40206149: 924c22 s8i a2, a12, 146 +4020614c: ee8621 l32r a2, 40201b64 +4020614f: 050c movi.n a5, 0 +40206151: 4228 l32i.n a2, a2, 16 +40206153: 0238 l32i.n a3, a2, 0 +40206155: 920c22 l8ui a2, a12, 146 +40206158: 1422f6 bgeui a2, 2, 40206170 +4020615b: 4c2a add.n a4, a12, a2 +4020615d: 900442 l8ui a4, a4, 144 +40206160: 621b addi.n a6, a2, 1 +40206162: 746060 extui a6, a6, 0, 8 +40206165: f4dc bnez.n a4, 40206188 +40206167: 062d mov.n a2, a6 +40206169: 150c movi.n a5, 1 +4020616b: fffa46 j 40206158 +4020616e: 160000 excw +40206171: 8605c5 call0 4018c1d0 <_lit4_end+0x85ea4> +40206174: 000002 l8ui a0, a0, 0 +40206177: 260000 excw +4020617a: 222814 excw +4020617d: 920c movi.n a2, 9 +4020617f: 221b addi.n a2, a2, 1 +40206181: 924c22 s8i a2, a12, 146 +40206184: 001206 j 402061d0 +40206187: 158c00 extui a8, a0, 28, 2 +4020618a: 924c22 s8i a2, a12, 146 +4020618d: e82466 bnei a4, 2, 40206179 +40206190: efaa41 l32r a4, 40202038 +40206193: 120c movi.n a2, 1 +40206195: 070c movi.n a7, 0 +40206197: 0129 s32i.n a2, a1, 0 +40206199: 076d mov.n a6, a7 +4020619b: 045d mov.n a5, a4 +4020619d: 33c332 addi a3, a3, 51 +402061a0: 072d mov.n a2, a7 +402061a2: 0008c6 j 402061c9 +402061a5: 1162d0 slli a6, a2, 3 +402061a8: 462a add.n a4, a6, a2 +402061aa: a044c0 addx4 a4, a4, a12 +402061ad: 122472 l32i a7, a4, 72 +402061b0: fc8716 beqz a7, 4020617c +402061b3: 046d mov.n a6, a4 +402061b5: efa041 l32r a4, 40202038 +402061b8: 120c movi.n a2, 1 +402061ba: 0129 s32i.n a2, a1, 0 +402061bc: 747070 extui a7, a7, 0, 8 +402061bf: 4cc662 addi a6, a6, 76 +402061c2: 045d mov.n a5, a4 +402061c4: 33c332 addi a3, a3, 51 +402061c7: 020c movi.n a2, 0 +402061c9: fc9645 call0 40202b30 +402061cc: ffeb06 j 4020617c +402061cf: 710800 excw +402061d2: 61c8 l32i.n a12, a1, 24 +402061d4: 20c112 addi a1, a1, 32 +402061d7: f00d ret.n +402061d9: 000000 ill +402061dc: de .byte 0xde +402061dd: 402301 l32r a0, 401d626c <_lit4_end+0xcff40> +402061e0: f0c112 addi a1, a1, -16 +402061e3: 11d9 s32i.n a13, a1, 4 +402061e5: ee5fd1 l32r a13, 40201b64 +402061e8: 3109 s32i.n a0, a1, 12 +402061ea: 21c9 s32i.n a12, a1, 8 +402061ec: 01e9 s32i.n a14, a1, 0 +402061ee: 5f2dc2 l32i a12, a13, 0x17c +402061f1: fcac beqz.n a12, 40206224 +402061f3: 002c22 l32i a2, a12, 0 +402061f6: 5f6d22 s32i a2, a13, 0x17c +402061f9: 005256 bnez a2, 40206202 +402061fc: f76a21 l32r a2, 40203fa4 +402061ff: 606d22 s32i a2, a13, 0x180 +40206202: fc28 l32i.n a2, a12, 60 +40206204: fff6e1 l32r a14, 402061dc +40206207: 928c beqz.n a2, 40206214 +40206209: 46a442 movi a4, 0x446 +4020620c: 0e3d mov.n a3, a14 +4020620e: ecbe01 l32r a0, 40201508 +40206211: 0000c0 callx0 a0 +40206214: 47a442 movi a4, 0x447 +40206217: 0e3d mov.n a3, a14 +40206219: 0c2d mov.n a2, a12 +4020621b: ecbb01 l32r a0, 40201508 +4020621e: 0000c0 callx0 a0 +40206221: fff246 j 402061ee +40206224: 3108 l32i.n a0, a1, 12 +40206226: 21c8 l32i.n a12, a1, 8 +40206228: 11d8 l32i.n a13, a1, 4 +4020622a: 01e8 l32i.n a14, a1, 0 +4020622c: 10c112 addi a1, a1, 16 +4020622f: f00d ret.n +40206231: 000000 ill +40206234: 68b8 l32i.n a11, a8, 24 +40206236: f04020 subx8 a4, a0, a2 +40206239: 3ffee5 excw +4020623c: 68a8 l32i.n a10, a8, 24 +4020623e: 044020 extui a4, a2, 0, 1 +40206241: 3ffee6 bgei a14, 0x100, 40206284 + +40206244 : +40206244: f0c112 addi a1, a1, -16 +40206247: 21c9 s32i.n a12, a1, 8 +40206249: 02cd mov.n a12, a2 +4020624b: ffae21 l32r a2, 40206104 +4020624e: 3109 s32i.n a0, a1, 12 +40206250: 1c29 s32i.n a2, a12, 4 +40206252: f37c movi.n a3, -1 +40206254: 934232 s8i a3, a2, 147 +40206257: 78a032 movi a3, 120 +4020625a: c239 s32i.n a3, a2, 48 +4020625c: d239 s32i.n a3, a2, 52 +4020625e: 68a132 movi a3, 0x168 +40206261: e239 s32i.n a3, a2, 56 +40206263: fff431 l32r a3, 40206234 +40206266: fff421 l32r a2, 40206238 +40206269: 040c movi.n a4, 0 +4020626b: f85201 l32r a0, 402043b4 +4020626e: 0000c0 callx0 a0 +40206271: fff321 l32r a2, 40206240 +40206274: fff231 l32r a3, 4020623c +40206277: 00a042 movi a4, 0 +4020627a: f84e01 l32r a0, 402043b4 +4020627d: 0000c0 callx0 a0 +40206280: 020c movi.n a2, 0 +40206282: 736c22 s32i a2, a12, 0x1cc +40206285: 3108 l32i.n a0, a1, 12 +40206287: cca122 movi a2, 0x1cc +4020628a: 2c2a add.n a2, a12, a2 +4020628c: 746c22 s32i a2, a12, 0x1d0 +4020628f: 21c8 l32i.n a12, a1, 8 +40206291: 10c112 addi a1, a1, 16 +40206294: f00d ret.n +40206296: e80000 excw +40206299: ce .byte 0xce +4020629a: fe .byte 0xfe +4020629b: 3f .byte 0x3f +4020629c: fecee3 excw +4020629f: 3f .byte 0x3f +402062a0: 2301d5 excw +402062a3: 01cf40 slli a12, a15, 28 +402062a6: c74023 excw +402062a9: 402301 l32r a0, 401d6338 <_lit4_end+0xd000c> + +402062ac : +402062ac: d0c112 addi a1, a1, -48 +402062af: 0a61c2 s32i a12, a1, 40 +402062b2: ee2cc1 l32r a12, 40201b64 +402062b5: 0961d2 s32i a13, a1, 36 +402062b8: 0861e2 s32i a14, a1, 32 +402062bb: b109 s32i.n a0, a1, 44 +402062bd: 71f9 s32i.n a15, a1, 28 +402062bf: 74e020 extui a14, a2, 0, 8 +402062c2: 01dc22 addmi a2, a12, 0x100 +402062c5: 035d mov.n a5, a3 +402062c7: 043d mov.n a3, a4 +402062c9: df0242 l8ui a4, a2, 223 +402062cc: 02dd mov.n a13, a2 +402062ce: 02e407 bbsi a4, 0, 402062d4 +402062d1: 003f06 j 402063d1 +402062d4: 153e66 bnei a14, 3, 402062ed +402062d7: f72521 l32r a2, 40203f6c +402062da: 000222 l8ui a2, a2, 0 +402062dd: 0c1226 beqi a2, 1, 402062ed +402062e0: ffee21 l32r a2, 40206298 +402062e3: 040c movi.n a4, 0 +402062e5: 004242 s8i a4, a2, 0 +402062e8: 052d mov.n a2, a5 +402062ea: 1ab285 call0 40220e14 +402062ed: 02dc22 addmi a2, a12, 0x200 +402062f0: 140232 l8ui a3, a2, 20 +402062f3: 113366 bnei a3, 3, 40206308 +402062f6: 000222 l8ui a2, a2, 0 +402062f9: 00b216 beqz a2, 40206308 +402062fc: ffe821 l32r a2, 4020629c +402062ff: 000222 l8ui a2, a2, 0 +40206302: 021266 bnei a2, 1, 40206308 +40206305: 003206 j 402063d1 +40206308: 4c28 l32i.n a2, a12, 16 +4020630a: d20222 l8ui a2, a2, 210 +4020630d: 025266 bnei a2, 5, 40206313 +40206310: 002c86 j 402063c6 +40206313: df0d22 l8ui a2, a13, 223 +40206316: 02e207 bbsi a2, 0, 4020631c +40206319: 002a46 j 402063c6 +4020631c: 1aa845 call0 40220da4 +4020631f: 021266 bnei a2, 1, 40206325 +40206322: 002806 j 402063c6 +40206325: f71121 l32r a2, 40203f6c +40206328: 000222 l8ui a2, a2, 0 +4020632b: 021266 bnei a2, 1, 40206331 +4020632e: 002506 j 402063c6 +40206331: f72001 l32r a0, 40203fb4 +40206334: 0000c0 callx0 a0 +40206337: ffd8c1 l32r a12, 40206298 +4020633a: 02fd mov.n a15, a2 +4020633c: 000c22 l8ui a2, a12, 0 +4020633f: f70f31 l32r a3, 40203f7c +40206342: f405d1 l32r a13, 40203358 +40206345: 1822b6 bltui a2, 2, 40206361 +40206348: 220c movi.n a2, 2 +4020634a: 004322 s8i a2, a3, 0 +4020634d: 38af22 movi a2, -200 +40206350: 005d22 s16i a2, a13, 0 +40206353: ffd321 l32r a2, 402062a0 +40206356: ef3d01 l32r a0, 4020204c +40206359: 0000c0 callx0 a0 +4020635c: 020c movi.n a2, 0 +4020635e: 001086 j 402063a4 +40206361: 1b1266 bnei a2, 1, 40206380 +40206364: ffd021 l32r a2, 402062a4 +40206367: 006132 s32i a3, a1, 0 +4020636a: ef3801 l32r a0, 4020204c +4020636d: 0000c0 callx0 a0 +40206370: 0138 l32i.n a3, a1, 0 +40206372: 120c movi.n a2, 1 +40206374: 004322 s8i a2, a3, 0 +40206377: 020c movi.n a2, 0 +40206379: 005d22 s16i a2, a13, 0 +4020637c: 000786 j 4020639e +4020637f: a02200 addx4 a2, a2, a0 +40206382: 432200 excw +40206385: 052100 extui a2, a0, 17, 1 +40206388: 20c0f7 bnall a0, a15, 402063ac +4020638b: 223200 excw +4020638e: c62100 excw +40206391: ff .byte 0xff +40206392: 313030 srai a3, a3, 16 +40206395: 005d32 s16i a3, a13, 0 +40206398: ef2d01 l32r a0, 4020204c +4020639b: 0000c0 callx0 a0 +4020639e: 000c22 l8ui a2, a12, 0 +402063a1: 01c222 addi a2, a2, 1 +402063a4: 004c22 s8i a2, a12, 0 +402063a7: f6f2c1 l32r a12, 40203f70 +402063aa: 020c movi.n a2, 0 +402063ac: 004c22 s8i a2, a12, 0 +402063af: 009d32 l16si a3, a13, 0 +402063b2: 060f22 l8ui a2, a15, 6 +402063b5: 100505 call0 40216408 +402063b8: f6f021 l32r a2, 40203f78 +402063bb: 001d32 l16ui a3, a13, 0 +402063be: 005232 s16i a3, a2, 0 +402063c1: 120c movi.n a2, 1 +402063c3: 004c22 s8i a2, a12, 0 +402063c6: 073e66 bnei a14, 3, 402063d1 +402063c9: ffb321 l32r a2, 40206298 +402063cc: 030c movi.n a3, 0 +402063ce: 004232 s8i a3, a2, 0 +402063d1: b108 l32i.n a0, a1, 44 +402063d3: a1c8 l32i.n a12, a1, 40 +402063d5: 91d8 l32i.n a13, a1, 36 +402063d7: 81e8 l32i.n a14, a1, 32 +402063d9: 71f8 l32i.n a15, a1, 28 +402063db: 30c112 addi a1, a1, 48 +402063de: f00d ret.n + +402063e0 : +402063e0: f0c112 addi a1, a1, -16 +402063e3: ff4821 l32r a2, 40206104 +402063e6: 3109 s32i.n a0, a1, 12 +402063e8: 460232 l8ui a3, a2, 70 +402063eb: 1f6307 bbci a3, 0, 4020640e +402063ee: 030c movi.n a3, 0 +402063f0: 464232 s8i a3, a2, 70 +402063f3: 474232 s8i a3, a2, 71 +402063f6: 201110 or a1, a1, a1 +402063f9: ff8945 call0 40205c90 +402063fc: ff9121 l32r a2, 40206240 +402063ff: f6ef01 l32r a0, 40203fbc +40206402: 0000c0 callx0 a0 +40206405: ff8c21 l32r a2, 40206238 +40206408: f6ed01 l32r a0, 40203fbc +4020640b: 0000c0 callx0 a0 +4020640e: 3108 l32i.n a0, a1, 12 +40206410: 10c112 addi a1, a1, 16 +40206413: f00d ret.n +40206415: 000000 ill +40206418: fee680 excw +4020641b: 3f .byte 0x3f + +4020641c : +4020641c: 023d mov.n a3, a2 +4020641e: fffe21 l32r a2, 40206418 +40206421: f0c112 addi a1, a1, -16 +40206424: 06a042 movi a4, 6 +40206427: 036102 s32i a0, a1, 12 +4020642a: eafa01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020642d: 0000c0 callx0 a0 +40206430: ff3521 l32r a2, 40206104 +40206433: 130c movi.n a3, 1 +40206435: 9a4232 s8i a3, a2, 154 +40206438: 3108 l32i.n a0, a1, 12 +4020643a: 10c112 addi a1, a1, 16 +4020643d: f00d ret.n + ... + +40206440 : +40206440: ff3121 l32r a2, 40206104 +40206443: 030c movi.n a3, 0 +40206445: 9a4232 s8i a3, a2, 154 +40206448: f00d ret.n + ... + +4020644c : +4020644c: ff2e31 l32r a3, 40206104 +4020644f: 9b4322 s8i a2, a3, 155 +40206452: f00d ret.n + +40206454 : +40206454: ff2c41 l32r a4, 40206104 +40206457: d429 s32i.n a2, a4, 52 +40206459: c439 s32i.n a3, a4, 48 +4020645b: f00d ret.n +4020645d: 000000 ill + +40206460 : +40206460: ff2931 l32r a3, 40206104 +40206463: e329 s32i.n a2, a3, 56 +40206465: f00d ret.n + ... + +40206468 : +40206468: d0c112 addi a1, a1, -48 +4020646b: 91d9 s32i.n a13, a1, 36 +4020646d: 71f9 s32i.n a15, a1, 28 +4020646f: b109 s32i.n a0, a1, 44 +40206471: a1c9 s32i.n a12, a1, 40 +40206473: 81e9 s32i.n a14, a1, 32 +40206475: 74d020 extui a13, a2, 0, 8 +40206478: 036d mov.n a6, a3 +4020647a: 744040 extui a4, a4, 0, 8 +4020647d: 74f050 extui a15, a5, 0, 8 +40206480: 353df6 bgeui a13, 3, 402064b9 +40206483: ff20e1 l32r a14, 40206104 +40206486: 2a1f66 bnei a15, 1, 402064b4 +40206489: b0cdd0 addx8 a12, a13, a13 +4020648c: 11cce0 slli a12, a12, 2 +4020648f: 2eca add.n a2, a14, a12 +40206491: 4cc2c2 addi a12, a2, 76 +40206494: 126242 s32i a4, a2, 72 +40206497: 032c movi.n a3, 32 +40206499: 0c2d mov.n a2, a12 +4020649b: 1149 s32i.n a4, a1, 4 +4020649d: 006162 s32i a6, a1, 0 +402064a0: fde701 l32r a0, 40205c3c +402064a3: 0000c0 callx0 a0 +402064a6: 0168 l32i.n a6, a1, 0 +402064a8: 1148 l32i.n a4, a1, 4 +402064aa: 063d mov.n a3, a6 +402064ac: 0c2d mov.n a2, a12 +402064ae: ead901 l32r a0, 40201014 <_irom0_text_start+0x4> +402064b1: 0000c0 callx0 a0 +402064b4: deda add.n a13, a14, a13 +402064b6: 904df2 s8i a15, a13, 144 +402064b9: b108 l32i.n a0, a1, 44 +402064bb: a1c8 l32i.n a12, a1, 40 +402064bd: 91d8 l32i.n a13, a1, 36 +402064bf: 81e8 l32i.n a14, a1, 32 +402064c1: 71f8 l32i.n a15, a1, 28 +402064c3: 30c112 addi a1, a1, 48 +402064c6: f00d ret.n + +402064c8 : +402064c8: 742020 extui a2, a2, 0, 8 +402064cb: 1932f6 bgeui a2, 3, 402064e8 +402064ce: ff0d41 l32r a4, 40206104 +402064d1: 90a032 movi a3, 144 +402064d4: 542a add.n a5, a4, a2 +402064d6: 353a add.n a3, a5, a3 +402064d8: b02220 addx8 a2, a2, a2 +402064db: 050c movi.n a5, 0 +402064dd: 004352 s8i a5, a3, 0 +402064e0: a02240 addx4 a2, a2, a4 +402064e3: 030c movi.n a3, 0 +402064e5: 126232 s32i a3, a2, 72 +402064e8: f00d ret.n +402064ea: 900000 addx2 a0, a0, a0 +402064ed: 4000e1 l32r a14, 401d64f0 <_lit4_end+0xd01c4> +402064f0: bfa8 l32i.n a10, a15, 44 +402064f2: 00 .byte 00 +402064f3: 40 .byte 0x40 + +402064f4 : +402064f4: b0c112 addi a1, a1, -80 +402064f7: 1161d2 s32i a13, a1, 68 +402064fa: 142c movi.n a4, 33 +402064fc: 02dd mov.n a13, a2 +402064fe: 030c movi.n a3, 0 +40206500: 012d mov.n a2, a1 +40206502: 136102 s32i a0, a1, 76 +40206505: 1261c2 s32i a12, a1, 72 +40206508: 1061e2 s32i a14, a1, 64 +4020650b: 0f61f2 s32i a15, a1, 60 +4020650e: fff701 l32r a0, 402064ec +40206511: 0000c0 callx0 a0 +40206514: 6d9c beqz.n a13, 4020652e +40206516: ed93f1 l32r a15, 40201b64 +40206519: 0c0c movi.n a12, 0 +4020651b: 0fed mov.n a14, a15 +4020651d: 000106 j 40206525 +40206520: cc1b addi.n a12, a12, 1 +40206522: 74c0c0 extui a12, a12, 0, 8 +40206525: 03de22 addmi a2, a14, 0x300 +40206528: 480222 l8ui a2, a2, 72 +4020652b: 063c27 bltu a12, a2, 40206535 +4020652e: 120c movi.n a2, 1 +40206530: 001306 j 40206580 +40206533: f60000 excw +40206536: f55c movi.n a5, 95 +40206538: 142c movi.n a4, 33 +4020653a: 030c movi.n a3, 0 +4020653c: 202110 or a2, a1, a1 +4020653f: eab401 l32r a0, 40201010 <_irom0_text_start> +40206542: 0000c0 callx0 a0 +40206545: d32f22 l32i a2, a15, 0x34c +40206548: 221b addi.n a2, a2, 1 +4020654a: 0e22b6 bltui a2, 2, 4020655c +4020654d: 50a322 movi a2, 0x350 +40206550: 3f2a add.n a3, a15, a2 +40206552: 042c movi.n a4, 32 +40206554: 012d mov.n a2, a1 +40206556: eaaf01 l32r a0, 40201014 <_irom0_text_start+0x4> +40206559: 0000c0 callx0 a0 +4020655c: 012d mov.n a2, a1 +4020655e: f79401 l32r a0, 402043b0 +40206561: 0000c0 callx0 a0 +40206564: 024d mov.n a4, a2 +40206566: 013d mov.n a3, a1 +40206568: 0d2d mov.n a2, a13 +4020656a: ffe101 l32r a0, 402064f0 +4020656d: 0000c0 callx0 a0 +40206570: 64cff2 addi a15, a15, 100 +40206573: fa9256 bnez a2, 40206520 +40206576: ceca add.n a12, a14, a12 +40206578: a7a6e2 movi a14, 0x6a7 +4020657b: ccea add.n a12, a12, a14 +4020657d: 000c22 l8ui a2, a12, 0 +40206580: 132102 l32i a0, a1, 76 +40206583: 1221c2 l32i a12, a1, 72 +40206586: 1121d2 l32i a13, a1, 68 +40206589: 1021e2 l32i a14, a1, 64 +4020658c: f1f8 l32i.n a15, a1, 60 +4020658e: 50c112 addi a1, a1, 80 +40206591: f00d ret.n +40206593: 82a600 mull a10, a6, a0 +40206596: fe .byte 0xfe +40206597: 3f .byte 0x3f + +40206598 : +40206598: 743030 extui a3, a3, 0, 8 +4020659b: 2a7217 bbci a2, 17, 402065c9 +4020659e: e20c movi.n a2, 14 +402065a0: 393237 bltu a2, a3, 402065dd +402065a3: 230b addi.n a2, a3, -1 +402065a5: fffb41 l32r a4, 40206594 +402065a8: 742020 extui a2, a2, 0, 8 +402065ab: 129c beqz.n a2, 402065c0 +402065ad: 542a add.n a5, a4, a2 +402065af: 650b addi.n a6, a5, -1 +402065b1: 000662 l8ui a6, a6, 0 +402065b4: 220b addi.n a2, a2, -1 +402065b6: 004562 s8i a6, a5, 0 +402065b9: 742020 extui a2, a2, 0, 8 +402065bc: fffac6 j 402065ab +402065bf: 443200 extui a3, a0, 2, 5 +402065c2: 058600 extui a8, a0, 22, 1 +402065c5: 000000 ill +402065c8: f23100 excw +402065cb: ff .byte 0xff +402065cc: 020c movi.n a2, 0 +402065ce: e40c movi.n a4, 14 +402065d0: 221b addi.n a2, a2, 1 +402065d2: 742020 extui a2, a2, 0, 8 +402065d5: 004322 s8i a2, a3, 0 +402065d8: 331b addi.n a3, a3, 1 +402065da: f29247 bne a2, a4, 402065d0 +402065dd: 020c movi.n a2, 0 +402065df: f00d ret.n +402065e1: 000000 ill +402065e4: 01bd mov.n a11, a1 +402065e6: fc4023 excw +402065e9: ce .byte 0xce +402065ea: fe .byte 0xfe +402065eb: 3f .byte 0x3f +402065ec: 95c8 l32i.n a12, a5, 36 +402065ee: 124020 excw +402065f1: d9d0c1 l32r a12, 401fcd34 <_lit4_end+0xf6a08> +402065f4: 5bd191 l32r a9, 401dd538 <_lit4_end+0xd720c> +402065f7: 09ed mov.n a14, a9 +402065f9: 4d28b1 l32r a11, 401d9a9c <_lit4_end+0xd3770> +402065fc: a1c9 s32i.n a12, a1, 40 +402065fe: 0129 s32i.n a2, a1, 0 +40206600: 1d28 l32i.n a2, a13, 4 +40206602: 81e9 s32i.n a14, a1, 32 +40206604: 71f9 s32i.n a15, a1, 28 +40206606: febfc1 l32r a12, 40206104 +40206609: 440222 l8ui a2, a2, 68 +4020660c: 03ed mov.n a14, a3 +4020660e: 1129 s32i.n a2, a1, 4 +40206610: 0c38 l32i.n a3, a12, 0 +40206612: fff421 l32r a2, 402065e4 +40206615: 2139 s32i.n a3, a1, 8 +40206617: fcf8 l32i.n a15, a12, 60 +40206619: ee8c01 l32r a0, 4020204c +4020661c: 0000c0 callx0 a0 +4020661f: ed5231 l32r a3, 40201b68 +40206622: f26c movi.n a2, -17 +40206624: 0020c0 memw +40206627: 0348 l32i.n a4, a3, 0 +40206629: 102420 and a2, a4, a2 +4020662c: 0020c0 memw +4020662f: 0329 s32i.n a2, a3, 0 +40206631: ff8645 call0 40205e98 +40206634: ff5ec5 call0 40205c24 +40206637: 460c42 l8ui a4, a12, 70 +4020663a: a27c movi.n a2, -6 +4020663c: 102420 and a2, a4, a2 +4020663f: 030c movi.n a3, 0 +40206641: 464c22 s8i a2, a12, 70 +40206644: fefd21 l32r a2, 40206238 +40206647: 0c39 s32i.n a3, a12, 0 +40206649: 474c32 s8i a3, a12, 71 +4020664c: 3139 s32i.n a3, a1, 12 +4020664e: f65b01 l32r a0, 40203fbc +40206651: 0000c0 callx0 a0 +40206654: 3138 l32i.n a3, a1, 12 +40206656: fc39 s32i.n a3, a12, 60 +40206658: 0138 l32i.n a3, a1, 0 +4020665a: 112322 l32i a2, a3, 68 +4020665d: 0c5266 bnei a2, 5, 4020666d +40206660: 0d28 l32i.n a2, a13, 0 +40206662: 030c movi.n a3, 0 +40206664: ed2242 l32i a4, a2, 0x3b4 +40206667: 220c movi.n a2, 2 +40206669: 0001c6 j 40206674 +4020666c: a04200 addx4 a4, a2, a0 +4020666f: 043d00 extui a3, a0, 13, 1 +40206672: 042d mov.n a2, a4 +40206674: 1cbb85 call0 40223230 +40206677: 431c movi.n a3, 20 +40206679: 00a122 movi a2, 0x100 +4020667c: fff185 call0 40206598 +4020667f: 01dd22 addmi a2, a13, 0x100 +40206682: df0232 l8ui a3, a2, 223 +40206685: 024d mov.n a4, a2 +40206687: 1a6307 bbci a3, 0, 402066a5 +4020668a: 1128 l32i.n a2, a1, 4 +4020668c: 153266 bnei a2, 3, 402066a5 +4020668f: f63721 l32r a2, 40203f6c +40206692: 000222 l8ui a2, a2, 0 +40206695: 0c1226 beqi a2, 1, 402066a5 +40206698: 2138 l32i.n a3, a1, 8 +4020669a: 0e2d mov.n a2, a14 +4020669c: 036142 s32i a4, a1, 12 +4020669f: 1a7945 call0 40220e34 +402066a2: 032142 l32i a4, a1, 12 +402066a5: 08bf16 beqz a15, 40206734 +402066a8: df0422 l8ui a2, a4, 223 +402066ab: 156207 bbci a2, 0, 402066c4 +402066ae: 1138 l32i.n a3, a1, 4 +402066b0: 103366 bnei a3, 3, 402066c4 +402066b3: f62e21 l32r a2, 40203f6c +402066b6: 000222 l8ui a2, a2, 0 +402066b9: 071226 beqi a2, 1, 402066c4 +402066bc: 0e2d mov.n a2, a14 +402066be: 1a6ec5 call0 40220dac +402066c1: 000686 j 402066df +402066c4: 102c22 l32i a2, a12, 64 +402066c7: f63731 l32r a3, 40203fa4 +402066ca: 0c9237 bne a2, a3, 402066da +402066cd: 020c movi.n a2, 0 +402066cf: 9b4c22 s8i a2, a12, 155 +402066d2: 0e3d mov.n a3, a14 +402066d4: 5f2d22 l32i a2, a13, 0x17c +402066d7: 000046 j 402066dc +402066da: 0e3d mov.n a3, a14 +402066dc: 000fc0 callx0 a15 +402066df: ffb005 call0 402061e0 +402066e2: ffc121 l32r a2, 402065e8 +402066e5: 000232 l8ui a3, a2, 0 +402066e8: 0a1326 beqi a3, 1, 402066f6 +402066eb: 4d28 l32i.n a2, a13, 16 +402066ed: d00222 l8ui a2, a2, 208 +402066f0: 6d3226 beqi a2, 3, 40206761 +402066f3: 000f46 j 40206734 +402066f6: aefc bnez.n a14, 40206734 +402066f8: 00a032 movi a3, 0 +402066fb: 004232 s8i a3, a2, 0 +402066fe: 002122 l32i a2, a1, 0 +40206701: 04c2e2 addi a14, a2, 4 +40206704: 0e2d mov.n a2, a14 +40206706: f62d01 l32r a0, 40203fbc +40206709: 0000c0 callx0 a0 +4020670c: 0138 l32i.n a3, a1, 0 +4020670e: 4328 l32i.n a2, a3, 16 +40206710: b2cc bnez.n a2, 4020671f +40206712: ffb631 l32r a3, 402065ec +40206715: 040c movi.n a4, 0 +40206717: 0e2d mov.n a2, a14 +40206719: f72601 l32r a0, 402043b4 +4020671c: 0000c0 callx0 a0 +4020671f: 0c4285 call0 40212b48 +40206722: 0e1266 bnei a2, 1, 40206734 +40206725: 150c movi.n a5, 1 +40206727: 040c movi.n a4, 0 +40206729: 64a032 movi a3, 100 +4020672c: 0e2d mov.n a2, a14 +4020672e: f62201 l32r a0, 40203fb8 +40206731: 0000c0 callx0 a0 +40206734: 220c movi.n a2, 2 +40206736: 444c22 s8i a2, a12, 68 +40206739: 0b2c05 call0 402119fc +4020673c: 163266 bnei a2, 3, 40206756 +4020673f: f61d01 l32r a0, 40203fb4 +40206742: 0000c0 callx0 a0 +40206745: fb8a85 call0 40201ff0 +40206748: 03ddd2 addmi a13, a13, 0x300 +4020674b: 410d32 l8ui a3, a13, 65 +4020674e: 041237 beq a2, a3, 40206756 +40206751: 020c movi.n a2, 0 +40206753: 0c7d45 call0 40212f28 +40206756: 1852c5 call0 4021ec84 +40206759: b28c beqz.n a2, 40206768 +4020675b: 197785 call0 4021fed4 +4020675e: 000186 j 40206768 +40206761: f99e16 beqz a14, 402066fe +40206764: fff306 j 40206734 +40206767: b10800 excw +4020676a: a1c8 l32i.n a12, a1, 40 +4020676c: 91d8 l32i.n a13, a1, 36 +4020676e: 81e8 l32i.n a14, a1, 32 +40206770: 71f8 l32i.n a15, a1, 28 +40206772: 30c112 addi a1, a1, 48 +40206775: f00d ret.n +40206777: 6a7800 excw +4020677a: 084020 excw +4020677d: 402061 l32r a6, 401d6800 <_lit4_end+0xd04d4> +40206780: d0c112 addi a1, a1, -48 +40206783: a1c9 s32i.n a12, a1, 40 +40206785: fe5fc1 l32r a12, 40206104 +40206788: 71f9 s32i.n a15, a1, 28 +4020678a: b109 s32i.n a0, a1, 44 +4020678c: 91d9 s32i.n a13, a1, 36 +4020678e: 81e9 s32i.n a14, a1, 32 +40206790: 930c22 l8ui a2, a12, 147 +40206793: ffa032 movi a3, 255 +40206796: 0f0c movi.n a15, 0 +40206798: 101237 beq a2, a3, 402067ac +4020679b: ecf2f1 l32r a15, 40201b64 +4020679e: 902220 addx2 a2, a2, a2 +402067a1: 80a032 movi a3, 128 +402067a4: a02230 addx4 a2, a2, a3 +402067a7: 22fa add.n a2, a2, a15 +402067a9: 04c2f2 addi a15, a2, 4 +402067ac: d50c movi.n a5, 13 +402067ae: 450c22 l8ui a2, a12, 69 +402067b1: 02b527 bgeu a5, a2, 402067b7 +402067b4: 003506 j 4020688c +402067b7: ff7731 l32r a3, 40206594 +402067ba: ecea61 l32r a6, 40201b64 +402067bd: 232a add.n a2, a3, a2 +402067bf: 0002d2 l8ui a13, a2, 0 +402067c2: 80a0e2 movi a14, 128 +402067c5: dd0b addi.n a13, a13, -1 +402067c7: 113df0 slli a3, a13, 1 +402067ca: 23da add.n a2, a3, a13 +402067cc: a0e2e0 addx4 a14, a2, a14 +402067cf: 01d622 addmi a2, a6, 0x100 +402067d2: 350222 l8ui a2, a2, 53 +402067d5: ee6a add.n a14, a14, a6 +402067d7: ee4b addi.n a14, a14, 4 +402067d9: 064d mov.n a4, a6 +402067db: 111226 beqi a2, 1, 402067f0 +402067de: 23da add.n a2, a3, a13 +402067e0: a02240 addx4 a2, a2, a4 +402067e3: 212222 l32i a2, a2, 132 +402067e6: 142020 extui a2, a2, 0, 2 +402067e9: 283226 beqi a2, 3, 40206815 +402067ec: 001506 j 40206844 +402067ef: 23d000 excw +402067f2: 226080 excw +402067f5: 0222a0 excw +402067f8: 328a add.n a3, a2, a8 +402067fa: 620061 l32r a6, 401deffc <_lit4_end+0xd8cd0> +402067fd: 590261 l32r a6, 401dcc08 <_lit4_end+0xd68dc> +40206800: 116931 l32r a3, 401cada4 <_lit4_end+0xc4a78> +40206803: fb5a05 call0 40201da4 +40206806: 0138 l32i.n a3, a1, 0 +40206808: 2148 l32i.n a4, a1, 8 +4020680a: 3158 l32i.n a5, a1, 12 +4020680c: 1168 l32i.n a6, a1, 4 +4020680e: 22bc beqz.n a2, 40206844 +40206810: fff286 j 402067de +40206813: 280000 excw +40206816: b70c movi.n a7, 11 +40206818: 620562 l8ui a6, a5, 98 +4020681b: 674b26 beqi a11, 4, 40206886 +4020681e: 1e .byte 0x1e +4020681f: 62f723 excw +40206822: 9ef702 excw +40206825: 071d mov.n a1, a7 +40206827: 520ff2 l8ui a15, a15, 82 +4020682a: 450c movi.n a5, 4 +4020682c: 551b addi.n a5, a5, 1 +4020682e: 454c52 s8i a5, a12, 69 +40206831: 1b62e7 bbci a2, 14, 40206850 +40206834: 000c46 j 40206869 +40206837: da0000 excw +4020683a: 664063 excw +4020683d: 2662a0 excw +40206840: 669721 l32r a2, 401e029c <_lit4_end+0xd9f70> +40206843: 0c22e4 excw +40206846: 221b45 call0 402289fc +40206849: 454c22 s8i a2, a12, 69 +4020684c: ffd786 j 402067ae +4020684f: d3d000 excw +40206852: dd4080 excw +40206855: 0d22a0 excw +40206858: 458a add.n a4, a5, a8 +4020685a: 16fb57 bbsi a11, 21, 40206874 +4020685d: 320092 l8ui a9, a0, 50 +40206860: 0d2c movi.n a13, 32 +40206862: cc48 l32i.n a4, a12, 48 +40206864: 0001c6 j 4020686f +40206867: 320000 excw +4020686a: 0e2c movi.n a14, 32 +4020686c: 204330 or a4, a3, a3 +4020686f: 460c52 l8ui a5, a12, 70 +40206872: 08a022 movi a2, 8 +40206875: 202520 or a2, a5, a2 +40206878: ffc061 l32r a6, 40206778 +4020687b: ffc051 l32r a5, 4020677c +4020687e: 464c22 s8i a2, a12, 70 +40206881: 0e7d mov.n a7, a14 +40206883: 0e2d mov.n a2, a14 +40206885: ff5e45 call0 40205e6c +40206888: 000246 j 40206895 +4020688b: a03200 addx4 a3, a2, a0 +4020688e: 233000 excw +40206891: d5c520 extui a12, a2, 21, 14 +40206894: ff .byte 0xff +40206895: 0b2102 l32i a0, a1, 44 +40206898: a1c8 l32i.n a12, a1, 40 +4020689a: 91d8 l32i.n a13, a1, 36 +4020689c: 81e8 l32i.n a14, a1, 32 +4020689e: 71f8 l32i.n a15, a1, 28 +402068a0: 30c112 addi a1, a1, 48 +402068a3: f00d ret.n +402068a5: 000000 ill +402068a8: f0c112 addi a1, a1, -16 +402068ab: 3109 s32i.n a0, a1, 12 +402068ad: ffed05 call0 40206780 +402068b0: 3108 l32i.n a0, a1, 12 +402068b2: 10c112 addi a1, a1, 16 +402068b5: f00d ret.n +402068b7: c11200 mul16u a1, a2, a0 +402068ba: 1221f0 excw +402068bd: fe .byte 0xfe +402068be: 3109 s32i.n a0, a1, 12 +402068c0: 460232 l8ui a3, a2, 70 +402068c3: 336307 bbci a3, 0, 402068fa +402068c6: a40c movi.n a4, 10 +402068c8: 140347 bnone a3, a4, 402068e0 +402068cb: 040c movi.n a4, 0 +402068cd: fe5a21 l32r a2, 40206238 +402068d0: 01a052 movi a5, 1 +402068d3: 203440 or a3, a4, a4 +402068d6: f5b801 l32r a0, 40203fb8 +402068d9: 0000c0 callx0 a0 +402068dc: 000686 j 402068fa +402068df: 023800 excw +402068e2: 0e6397 bbci a3, 9, 402068f4 +402068e5: b238 l32i.n a3, a2, 44 +402068e7: fe5421 l32r a2, 40206238 +402068ea: 150c movi.n a5, 1 +402068ec: 040c movi.n a4, 0 +402068ee: f5b201 l32r a0, 40203fb8 +402068f1: 0000c0 callx0 a0 +402068f4: 201110 or a1, a1, a1 +402068f7: ffe885 call0 40206780 +402068fa: 3108 l32i.n a0, a1, 12 +402068fc: 10c112 addi a1, a1, 16 +402068ff: f00d ret.n +40206901: 000000 ill +40206904: cecc bnez.n a14, 40206914 +40206906: fe .byte 0xfe +40206907: 3f .byte 0x3f +40206908: 6a4c movi.n a10, 70 +4020690a: f84020 excw +4020690d: ce .byte 0xce +4020690e: fe .byte 0xfe +4020690f: 3f .byte 0x3f +40206910: fecef4 excw +40206913: 3f .byte 0x3f +40206914: fecef0 excw +40206917: 3f .byte 0x3f +40206918: ceec bnez.n a14, 40206948 +4020691a: fe .byte 0xfe +4020691b: 3f .byte 0x3f +4020691c: 2065f0 or a6, a5, a15 +4020691f: 40 .byte 0x40 + +40206920 : +40206920: d0c112 addi a1, a1, -48 +40206923: 0a61c2 s32i a12, a1, 40 +40206926: fff7c1 l32r a12, 40206904 +40206929: 91d9 s32i.n a13, a1, 36 +4020692b: 02dd mov.n a13, a2 +4020692d: 0c2d mov.n a2, a12 +4020692f: b109 s32i.n a0, a1, 44 +40206931: 81e9 s32i.n a14, a1, 32 +40206933: 71f9 s32i.n a15, a1, 28 +40206935: 0159 s32i.n a5, a1, 0 +40206937: 04fd mov.n a15, a4 +40206939: 74e030 extui a14, a3, 0, 8 +4020693c: f5a001 l32r a0, 40203fbc +4020693f: 0000c0 callx0 a0 +40206942: fff131 l32r a3, 40206908 +40206945: 00a042 movi a4, 0 +40206948: 202cc0 or a2, a12, a12 +4020694b: f69a01 l32r a0, 402043b4 +4020694e: 0000c0 callx0 a0 +40206951: 183305 call0 4021ec84 +40206954: 040216 beqz a2, 40206998 +40206957: 193c05 call0 4021fd18 +4020695a: 72fc bnez.n a2, 40206995 +4020695c: 120c movi.n a2, 1 +4020695e: 196285 call0 4021ff88 +40206961: 0c2d mov.n a2, a12 +40206963: f59601 l32r a0, 40203fbc +40206966: 0000c0 callx0 a0 +40206969: ffe821 l32r a2, 4020690c +4020696c: 0138 l32i.n a3, a1, 0 +4020696e: 02d9 s32i.n a13, a2, 0 +40206970: ffe821 l32r a2, 40206910 +40206973: 150c movi.n a5, 1 +40206975: 0042e2 s8i a14, a2, 0 +40206978: ffe721 l32r a2, 40206914 +4020697b: 040c movi.n a4, 0 +4020697d: 02f9 s32i.n a15, a2, 0 +4020697f: ffe621 l32r a2, 40206918 +40206982: 0239 s32i.n a3, a2, 0 +40206984: a30c movi.n a3, 10 +40206986: 0c2d mov.n a2, a12 +40206988: f58c01 l32r a0, 40203fb8 +4020698b: 0000c0 callx0 a0 +4020698e: f37c movi.n a3, -1 +40206990: 002986 j 40206a3a +40206993: c50000 extui a0, a0, 16, 13 +40206996: 4f .byte 0x4f +40206997: 8519 s32i.n a1, a5, 32 +40206999: 5617e2 l16ui a14, a7, 172 +4020699c: c50022 l8ui a2, a0, 197 +4020699f: c117b3 excw +402069a2: 28ec70 excw +402069a5: 324c movi.n a2, 67 +402069a7: 66d002 addmi a0, a0, 0x6600 +402069aa: 311113 excw +402069ad: 32fdd6 bgez a13, 40206ce0 +402069b0: 074603 excw +402069b3: 310863 excw +402069b6: ff0c movi.n a15, 15 +402069b8: 01a042 movi a4, 1 +402069bb: 004342 s8i a4, a3, 0 +402069be: 224b addi.n a2, a2, 4 +402069c0: f57f01 l32r a0, 40203fbc +402069c3: 0000c0 callx0 a0 +402069c6: 4c28 l32i.n a2, a12, 16 +402069c8: ff0931 l32r a3, 402065ec +402069cb: 040c movi.n a4, 0 +402069cd: 224b addi.n a2, a2, 4 +402069cf: f67901 l32r a0, 402043b4 +402069d2: 0000c0 callx0 a0 +402069d5: ffa085 call0 402063e0 +402069d8: ffd131 l32r a3, 4020691c +402069db: 040c movi.n a4, 0 +402069dd: 0e2d mov.n a2, a14 +402069df: ff2f05 call0 40205cd0 +402069e2: f37c movi.n a3, -1 +402069e4: 523226 beqi a2, 3, 40206a3a +402069e7: 0148 l32i.n a4, a1, 0 +402069e9: 0f3d mov.n a3, a15 +402069eb: 0e2d mov.n a2, a14 +402069ed: ff8bc5 call0 402062ac +402069f0: ec5e31 l32r a3, 40201b68 +402069f3: 021c movi.n a2, 16 +402069f5: 0020c0 memw +402069f8: 0348 l32i.n a4, a3, 0 +402069fa: 202420 or a2, a4, a2 +402069fd: 0020c0 memw +40206a00: 0329 s32i.n a2, a3, 0 +40206a02: fdc021 l32r a2, 40206104 +40206a05: 0138 l32i.n a3, a1, 0 +40206a07: 4442e2 s8i a14, a2, 68 +40206a0a: 106232 s32i a3, a2, 64 +40206a0d: 130c movi.n a3, 1 +40206a0f: f2f9 s32i.n a15, a2, 60 +40206a11: 02d9 s32i.n a13, a2, 0 +40206a13: 464232 s8i a3, a2, 70 +40206a16: 0aedc7 bbsi a13, 12, 40206a24 +40206a19: 030c movi.n a3, 0 +40206a1b: 02ed87 bbsi a13, 8, 40206a21 +40206a1e: 930232 l8ui a3, a2, 147 +40206a21: 454232 s8i a3, a2, 69 +40206a24: ff7b85 call0 402061e0 +40206a27: 002c22 l32i a2, a12, 0 +40206a2a: 00a032 movi a3, 0 +40206a2d: 002222 l32i a2, a2, 0 +40206a30: 066217 bbci a2, 1, 40206a3a +40206a33: 032d mov.n a2, a3 +40206a35: ffe805 call0 402068b8 +40206a38: 030c movi.n a3, 0 +40206a3a: b108 l32i.n a0, a1, 44 +40206a3c: 032d mov.n a2, a3 +40206a3e: a1c8 l32i.n a12, a1, 40 +40206a40: 91d8 l32i.n a13, a1, 36 +40206a42: 81e8 l32i.n a14, a1, 32 +40206a44: 71f8 l32i.n a15, a1, 28 +40206a46: 30c112 addi a1, a1, 48 +40206a49: f00d ret.n +40206a4b: b32100 movgez a2, a1, a0 +40206a4e: ff .byte 0xff +40206a4f: f0c112 addi a1, a1, -16 +40206a52: 002252 l32i a5, a2, 0 +40206a55: ffaf21 l32r a2, 40206914 +40206a58: 036102 s32i a0, a1, 12 +40206a5b: 002242 l32i a4, a2, 0 +40206a5e: ffac21 l32r a2, 40206910 +40206a61: 000232 l8ui a3, a2, 0 +40206a64: ffaa21 l32r a2, 4020690c +40206a67: 0228 l32i.n a2, a2, 0 +40206a69: ffeb45 call0 40206920 +40206a6c: 3108 l32i.n a0, a1, 12 +40206a6e: 10c112 addi a1, a1, 16 +40206a71: f00d ret.n +40206a73: e0f000 subx4 a15, a0, a0 +40206a76: fe .byte 0xfe +40206a77: 3f .byte 0x3f +40206a78: f0c112 addi a1, a1, -16 +40206a7b: 21c9 s32i.n a12, a1, 8 +40206a7d: fda1c1 l32r a12, 40206104 +40206a80: 3109 s32i.n a0, a1, 12 +40206a82: 11d9 s32i.n a13, a1, 4 +40206a84: 01e9 s32i.n a14, a1, 0 +40206a86: 460c22 l8ui a2, a12, 70 +40206a89: f7af42 movi a4, -9 +40206a8c: 04e237 bbsi a2, 3, 40206a94 +40206a8f: 076217 bbci a2, 1, 40206a9a +40206a92: d47c movi.n a4, -3 +40206a94: 102240 and a2, a2, a4 +40206a97: 464c22 s8i a2, a12, 70 +40206a9a: ec32d1 l32r a13, 40201b64 +40206a9d: 06dd22 addmi a2, a13, 0x600 +40206aa0: ac0222 l8ui a2, a2, 172 +40206aa3: 22dc bnez.n a2, 40206ab9 +40206aa5: 460c22 l8ui a2, a12, 70 +40206aa8: 0d6227 bbci a2, 2, 40206ab9 +40206aab: 470c22 l8ui a2, a12, 71 +40206aae: 72cc bnez.n a2, 40206ab9 +40206ab0: 030c movi.n a3, 0 +40206ab2: 032d mov.n a2, a3 +40206ab4: 000786 j 40206ad6 +40206ab7: 160000 excw +40206aba: 2101f3 excw +40206abd: df .byte 0xdf +40206abe: 01fd mov.n a15, a1 +40206ac0: 3f .byte 0x3f +40206ac1: 00c0f5 excw +40206ac4: 0c3200 excw +40206ac7: af2246 j 401f2754 <_lit4_end+0xec428> +40206aca: 20fb addi.n a2, a0, 15 +40206acc: 221023 excw +40206acf: 464c movi.n a6, 68 +40206ad1: 01a032 movi a3, 1 +40206ad4: 020c movi.n a2, 0 +40206ad6: ffb185 call0 402065f0 +40206ad9: 001606 j 40206b35 +40206adc: 002c22 l32i a2, a12, 0 +40206adf: 396287 bbci a2, 8, 40206b1c +40206ae2: fdd521 l32r a2, 40206238 +40206ae5: 00a0e2 movi a14, 0 +40206ae8: f53501 l32r a0, 40203fbc +40206aeb: 0000c0 callx0 a0 +40206aee: ff3a85 call0 40205e98 +40206af1: fdd321 l32r a2, 40206240 +40206af4: 01a052 movi a5, 1 +40206af7: 040c movi.n a4, 0 +40206af9: e31c movi.n a3, 30 +40206afb: f52f01 l32r a0, 40203fb8 +40206afe: 0000c0 callx0 a0 +40206b01: ffdcc1 l32r a12, 40206a74 +40206b04: 732d22 l32i a2, a13, 0x1cc +40206b07: a2ac beqz.n a2, 40206b35 +40206b09: 8238 l32i.n a3, a2, 32 +40206b0b: 736d32 s32i a3, a13, 0x1cc +40206b0e: 002356 bnez a3, 40206b14 +40206b11: 746dc2 s32i a12, a13, 0x1d0 +40206b14: 82e9 s32i.n a14, a2, 32 +40206b16: 1b1805 call0 40221c98 +40206b19: fff9c6 j 40206b04 +40206b1c: 08e297 bbsi a2, 9, 40206b28 +40206b1f: fdc621 l32r a2, 40206238 +40206b22: f52601 l32r a0, 40203fbc +40206b25: 0000c0 callx0 a0 +40206b28: 0d28 l32i.n a2, a13, 0 +40206b2a: 0228 l32i.n a2, a2, 0 +40206b2c: 02e207 bbsi a2, 0, 40206b32 +40206b2f: ffdf46 j 40206ab0 +40206b32: ff3645 call0 40205e98 +40206b35: 3108 l32i.n a0, a1, 12 +40206b37: 21c8 l32i.n a12, a1, 8 +40206b39: 11d8 l32i.n a13, a1, 4 +40206b3b: 01e8 l32i.n a14, a1, 0 +40206b3d: 10c112 addi a1, a1, 16 +40206b40: f00d ret.n + ... + +40206b44 : +40206b44: fd7031 l32r a3, 40206104 +40206b47: 220b addi.n a2, a2, -1 +40206b49: 934322 s8i a2, a3, 147 +40206b4c: f00d ret.n + ... + +40206b50 : +40206b50: fd6d21 l32r a2, 40206104 +40206b53: 0228 l32i.n a2, a2, 0 +40206b55: f00d ret.n +40206b57: bfff00 excw +40206b5a: ff .byte 0xff +40206b5b: ff .byte 0xff +40206b5c: 01b9 s32i.n a11, a1, 0 +40206b5e: 004023 excw +40206b61: 000040 excw + +40206b64 : +40206b64: f0c112 addi a1, a1, -16 +40206b67: 0261c2 s32i a12, a1, 8 +40206b6a: 0022c2 l32i a12, a2, 0 +40206b6d: 120c movi.n a2, 1 +40206b6f: 3109 s32i.n a0, a1, 12 +40206b71: 1aa185 call0 4022158c +40206b74: ebfc31 l32r a3, 40201b64 +40206b77: 7348 l32i.n a4, a3, 28 +40206b79: f2dc bnez.n a2, 40206b9c +40206b7b: fff721 l32r a2, 40206b58 +40206b7e: 102420 and a2, a4, a2 +40206b81: 076322 s32i a2, a3, 28 +40206b84: fff621 l32r a2, 40206b5c +40206b87: ed3101 l32r a0, 4020204c +40206b8a: 0000c0 callx0 a0 +40206b8d: 050c movi.n a5, 0 +40206b8f: 054d mov.n a4, a5 +40206b91: 330c movi.n a3, 3 +40206b93: 0c2d mov.n a2, a12 +40206b95: ffd885 call0 40206920 +40206b98: 000206 j 40206ba4 +40206b9b: f12100 excw +40206b9e: ff .byte 0xff +40206b9f: 202420 or a2, a4, a2 +40206ba2: 7329 s32i.n a2, a3, 28 +40206ba4: 3108 l32i.n a0, a1, 12 +40206ba6: 21c8 l32i.n a12, a1, 8 +40206ba8: 10c112 addi a1, a1, 16 +40206bab: f00d ret.n +40206bad: 000000 ill +40206bb0: fecee0 excw +40206bb3: 3f .byte 0x3f +40206bb4: 2a98 l32i.n a9, a10, 8 +40206bb6: 124000 excw +40206bb9: c2b0c1 l32r a12, 401f767c <_lit4_end+0xf1350> +40206bbc: c11261 l32r a6, 401f7004 <_lit4_end+0xf0cd8> +40206bbf: 40fd87 bbsi a13, 24, 40206c03 +40206bc2: f97440 excw +40206bc5: 8129f1 l32r a15, 401e706c <_lit4_end+0xe0d40> +40206bc8: 9149 s32i.n a4, a1, 36 +40206bca: 03fd mov.n a15, a3 +40206bcc: 9ba442 movi a4, 0x49b +40206bcf: 0c3d mov.n a3, a12 +40206bd1: 025c movi.n a2, 80 +40206bd3: 1161d2 s32i a13, a1, 68 +40206bd6: 1061e2 s32i a14, a1, 64 +40206bd9: 136102 s32i a0, a1, 76 +40206bdc: 20d550 or a13, a5, a5 +40206bdf: ed1c01 l32r a0, 40202050 +40206be2: 0000c0 callx0 a0 +40206be5: 02ed mov.n a14, a2 +40206be7: 1c5216 beqz a2, 40206db0 +40206bea: 142f22 l32i a2, a15, 80 +40206bed: b2ac beqz.n a2, 40206c1c +40206bef: a2a442 movi a4, 0x4a2 +40206bf2: 0c3d mov.n a3, a12 +40206bf4: b21c movi.n a2, 27 +40206bf6: ed1601 l32r a0, 40202050 +40206bf9: 0000c0 callx0 a0 +40206bfc: fe29 s32i.n a2, a14, 60 +40206bfe: f2cc bnez.n a2, 40206c11 +40206c00: a4a442 movi a4, 0x4a4 +40206c03: 0c3d mov.n a3, a12 +40206c05: 0e2d mov.n a2, a14 +40206c07: ea4001 l32r a0, 40201508 +40206c0a: 0000c0 callx0 a0 +40206c0d: 0067c6 j 40206db0 +40206c10: 2f3200 excw +40206c13: b41c14 excw +40206c16: e8ff01 l32r a0, 40201014 <_irom0_text_start+0x4> +40206c19: 0000c0 callx0 a0 +40206c1c: 540f22 l8ui a2, a15, 84 +40206c1f: 06a042 movi a4, 6 +40206c22: 404e22 s8i a2, a14, 64 +40206c25: 082122 l32i a2, a1, 32 +40206c28: 0ac232 addi a3, a2, 10 +40206c2b: 2e4b addi.n a2, a14, 4 +40206c2d: e8f901 l32r a0, 40201014 <_irom0_text_start+0x4> +40206c30: 0000c0 callx0 a0 +40206c33: 9f28 l32i.n a2, a15, 36 +40206c35: 04c905 call0 4020b8c8 +40206c38: 061266 bnei a2, 1, 40206c42 +40206c3b: 344e22 s8i a2, a14, 52 +40206c3e: 000506 j 40206c56 +40206c41: 020c00 excw +40206c44: 344e22 s8i a2, a14, 52 +40206c47: 9f38 l32i.n a3, a15, 36 +40206c49: 2eab addi.n a2, a14, 10 +40206c4b: 010342 l8ui a4, a3, 1 +40206c4e: 332b addi.n a3, a3, 2 +40206c50: ffd901 l32r a0, 40206bb4 +40206c53: 0000c0 callx0 a0 +40206c56: 9f28 l32i.n a2, a15, 36 +40206c58: 010222 l8ui a2, a2, 1 +40206c5b: 2a4e22 s8i a2, a14, 42 +40206c5e: 040f22 l8ui a2, a15, 4 +40206c61: 1b5ed2 s16i a13, a14, 54 +40206c64: 2b4e22 s8i a2, a14, 43 +40206c67: 9128 l32i.n a2, a1, 36 +40206c69: 0d0c movi.n a13, 0 +40206c6b: 2c4e22 s8i a2, a14, 44 +40206c6e: 2b1f22 l16ui a2, a15, 86 +40206c71: 0dcd mov.n a12, a13 +40206c73: 1c5e22 s16i a2, a14, 56 +40206c76: df28 l32i.n a2, a15, 52 +40206c78: 1d12d7 beq a2, a13, 40206c99 +40206c7b: 010232 l8ui a3, a2, 1 +40206c7e: 014d mov.n a4, a1 +40206c80: 332b addi.n a3, a3, 2 +40206c82: 070a85 call0 4020dd2c +40206c85: 1128 l32i.n a2, a1, 4 +40206c87: 01c8 l32i.n a12, a1, 0 +40206c89: 04c105 call0 4020b89c +40206c8c: 31d8 l32i.n a13, a1, 12 +40206c8e: 116e22 s32i a2, a14, 68 +40206c91: 2128 l32i.n a2, a1, 8 +40206c93: 04c085 call0 4020b89c +40206c96: 126e22 s32i a2, a14, 72 +40206c99: ef28 l32i.n a2, a15, 56 +40206c9b: 12ac beqz.n a2, 40206cc0 +40206c9d: 010232 l8ui a3, a2, 1 +40206ca0: 014d mov.n a4, a1 +40206ca2: 02c332 addi a3, a3, 2 +40206ca5: 070845 call0 4020dd2c +40206ca8: 0128 l32i.n a2, a1, 0 +40206caa: 31d8 l32i.n a13, a1, 12 +40206cac: 20cc20 or a12, a12, a2 +40206caf: 1128 l32i.n a2, a1, 4 +40206cb1: 04be85 call0 4020b89c +40206cb4: 116e22 s32i a2, a14, 68 +40206cb7: 022122 l32i a2, a1, 8 +40206cba: 04be05 call0 4020b89c +40206cbd: 126e22 s32i a2, a14, 72 +40206cc0: d27c movi.n a2, -3 +40206cc2: 328d27 bany a13, a2, 40206cf8 +40206cc5: 231c26 beqi a12, 1, 40206cec +40206cc8: 042ce6 bgei a12, 2, 40206cd0 +40206ccb: cc8c beqz.n a12, 40206cdb +40206ccd: 000cc6 j 40206d04 +40206cd0: 1d2c26 beqi a12, 2, 40206cf1 +40206cd3: 2d3c66 bnei a12, 3, 40206d04 +40206cd6: 420c movi.n a2, 4 +40206cd8: 000986 j 40206d02 +40206cdb: 031f22 l16ui a2, a15, 6 +40206cde: 046247 bbci a2, 4, 40206ce6 +40206ce1: 120c movi.n a2, 1 +40206ce3: 0006c6 j 40206d02 +40206ce6: 020c movi.n a2, 0 +40206ce8: 000586 j 40206d02 +40206ceb: 220c00 excw +40206cee: 000406 j 40206d02 +40206cf1: 320c movi.n a2, 3 +40206cf3: 0002c6 j 40206d02 +40206cf6: 660000 excw +40206cf9: 081d mov.n a1, a8 +40206cfb: 14c0c0 extui a12, a12, 0, 2 +40206cfe: 2c8c beqz.n a12, 40206d04 +40206d00: 520c movi.n a2, 5 +40206d02: ce29 s32i.n a2, a14, 48 +40206d04: 132f22 l32i a2, a15, 76 +40206d07: 928c beqz.n a2, 40206d14 +40206d09: 132e32 l32i a3, a14, 76 +40206d0c: 820c movi.n a2, 8 +40206d0e: 202320 or a2, a3, a2 +40206d11: 136e22 s32i a2, a14, 76 +40206d14: af48 l32i.n a4, a15, 40 +40206d16: 720c movi.n a2, 7 +40206d18: 045416 beqz a4, 40206d61 +40206d1b: bf38 l32i.n a3, a15, 44 +40206d1d: 040316 beqz a3, 40206d61 +40206d20: 102f72 l32i a7, a15, 64 +40206d23: 010482 l8ui a8, a4, 1 +40206d26: 046d mov.n a6, a4 +40206d28: 030c movi.n a3, 0 +40206d2a: 82a092 movi a9, 130 +40206d2d: 2a0c movi.n a10, 2 +40206d2f: 1b0c movi.n a11, 1 +40206d31: c02640 sub a2, a6, a4 +40206d34: 1da287 bge a2, a8, 40206d55 +40206d37: 020622 l8ui a2, a6, 2 +40206d3a: 069297 bne a2, a9, 40206d44 +40206d3d: 2033b0 or a3, a3, a11 +40206d40: 000306 j 40206d50 +40206d43: 202000 or a2, a0, a0 +40206d46: c3a064 excw +40206d49: c22220 excw +40206d4c: 3c20f4 excw +40206d4f: 661b83 excw +40206d52: fff6c6 j 40206d31 +40206d55: 220c movi.n a2, 2 +40206d57: 202320 or a2, a3, a2 +40206d5a: 378c beqz.n a7, 40206d61 +40206d5c: 620c movi.n a2, 6 +40206d5e: 202320 or a2, a3, a2 +40206d61: 132e62 l32i a6, a14, 76 +40206d64: e47c movi.n a4, -2 +40206d66: 043020 extui a3, a2, 0, 1 +40206d69: 106640 and a6, a6, a4 +40206d6c: 206630 or a6, a6, a3 +40206d6f: 230c movi.n a3, 2 +40206d71: 206630 or a6, a6, a3 +40206d74: 042220 extui a2, a2, 2, 1 +40206d77: b47c movi.n a4, -5 +40206d79: 401300 ssl a3 +40206d7c: a13200 sll a3, a2 +40206d7f: 102640 and a2, a6, a4 +40206d82: 202230 or a2, a2, a3 +40206d85: 136e22 s32i a2, a14, 76 +40206d88: f94601 l32r a0, 402052a0 +40206d8b: 0000c0 callx0 a0 +40206d8e: 020c movi.n a2, 0 +40206d90: 0e29 s32i.n a2, a14, 0 +40206d92: eb7421 l32r a2, 40201b64 +40206d95: 602232 l32i a3, a2, 0x180 +40206d98: 0063e2 s32i a14, a3, 0 +40206d9b: ff8531 l32r a3, 40206bb0 +40206d9e: 6062e2 s32i a14, a2, 0x180 +40206da1: 001322 l16ui a2, a3, 0 +40206da4: 01c222 addi a2, a2, 1 +40206da7: 005322 s16i a2, a3, 0 +40206daa: f93e01 l32r a0, 402052a4 +40206dad: 0000c0 callx0 a0 +40206db0: 132102 l32i a0, a1, 76 +40206db3: 1221c2 l32i a12, a1, 72 +40206db6: 1121d2 l32i a13, a1, 68 +40206db9: 1021e2 l32i a14, a1, 64 +40206dbc: f1f8 l32i.n a15, a1, 60 +40206dbe: 50c112 addi a1, a1, 80 +40206dc1: f00d ret.n +40206dc3: e1da00 excw +40206dc6: fe .byte 0xfe +40206dc7: 3f .byte 0x3f +40206dc8: fecee2 addi a14, a14, -2 +40206dcb: 3f .byte 0x3f +40206dcc: fee167 bbsi a1, 6, 40206dce +40206dcf: 3f .byte 0x3f +40206dd0: 2301a5 excw +40206dd3: e1c940 excw +40206dd6: fe .byte 0xfe +40206dd7: 3f .byte 0x3f +40206dd8: fee524 excw +40206ddb: 3f .byte 0x3f + +40206ddc : +40206ddc: d0c112 addi a1, a1, -48 +40206ddf: 0861e2 s32i a14, a1, 32 +40206de2: eb60e1 l32r a14, 40201b64 +40206de5: 0a61c2 s32i a12, a1, 40 +40206de8: 0761f2 s32i a15, a1, 28 +40206deb: b109 s32i.n a0, a1, 44 +40206ded: 91d9 s32i.n a13, a1, 36 +40206def: 03fd mov.n a15, a3 +40206df1: 180e32 l8ui a3, a14, 24 +40206df4: 02cd mov.n a12, a2 +40206df6: 120c movi.n a2, 1 +40206df8: 022366 bnei a3, 2, 40206dfe +40206dfb: 006746 j 40206f9c +40206dfe: 9fd8 l32i.n a13, a15, 36 +40206e00: 0d2d mov.n a2, a13 +40206e02: 04ac45 call0 4020b8c8 +40206e05: c28c beqz.n a2, 40206e15 +40206e07: 02ded2 addmi a13, a14, 0x200 +40206e0a: b50d22 l8ui a2, a13, 181 +40206e0d: 231226 beqi a2, 1, 40206e34 +40206e10: 000c46 j 40206e45 +40206e13: 420000 excw +40206e16: 2e .byte 0x2e +40206e17: 0d2286 j 4020a2a5 +40206e1a: 142701 l32r a0, 401cbeb8 <_lit4_end+0xc5b8c> +40206e1d: 58c602 addi a0, a6, 88 +40206e20: e92100 excw +40206e23: ef .byte 0xef +40206e24: 3d2b addi.n a3, a13, 2 +40206e26: eb7d01 l32r a0, 40201c1c +40206e29: 0000c0 callx0 a0 +40206e2c: 155256 bnez a2, 40206f85 +40206e2f: fff506 j 40206e07 +40206e32: 210000 srai a0, a0, 0 +40206e35: 0cffe4 excw +40206e38: cc3264 excw +40206e3b: 780110 excw +40206e3e: c0eb addi.n a12, a0, 14 +40206e40: 560000 excw +40206e43: 2213f2 l16ui a15, a3, 68 +40206e46: 1f .byte 0x1f +40206e47: 621703 excw +40206e4a: 4d8602 excw +40206e4d: 4e4800 excw +40206e50: d20422 l8ui a2, a4, 210 +40206e53: 0d6266 bnei a2, 6, 40206e64 +40206e56: 202ff0 or a2, a15, a15 +40206e59: 010585 call0 40207eb4 +40206e5c: 742020 extui a2, a2, 0, 8 +40206e5f: 004e46 j 40206f9c +40206e62: 320000 excw +40206e65: c11424 excw +40206e68: ffd8 l32i.n a13, a15, 60 +40206e6a: efaf22 movi a2, -17 +40206e6d: 102320 and a2, a3, a2 +40206e70: 146422 s32i a2, a4, 80 +40206e73: 000c32 l8ui a3, a12, 0 +40206e76: 01a022 movi a2, 1 +40206e79: 3c4d22 s8i a2, a13, 60 +40206e7c: 3d4d22 s8i a2, a13, 61 +40206e7f: 00a022 movi a2, 0 +40206e82: 3e4d22 s8i a2, a13, 62 +40206e85: 3f4d22 s8i a2, a13, 63 +40206e88: 404d22 s8i a2, a13, 64 +40206e8b: 414d22 s8i a2, a13, 65 +40206e8e: 1123c0 slli a2, a3, 4 +40206e91: 343030 extui a3, a3, 0, 4 +40206e94: 202230 or a2, a2, a3 +40206e97: 742020 extui a2, a2, 0, 8 +40206e9a: ef38 l32i.n a3, a15, 56 +40206e9c: 004c22 s8i a2, a12, 0 +40206e9f: b39c beqz.n a3, 40206ebe +40206ea1: 142432 l32i a3, a4, 80 +40206ea4: 021c movi.n a2, 16 +40206ea6: 202320 or a2, a3, a2 +40206ea9: 146422 s32i a2, a4, 80 +40206eac: 0f2d mov.n a2, a15 +40206eae: 00f145 call0 40207dc4 +40206eb1: 000c32 l8ui a3, a12, 0 +40206eb4: 027c movi.n a2, -16 +40206eb6: 103320 and a3, a3, a2 +40206eb9: 320c movi.n a2, 3 +40206ebb: 003006 j 40206f7f +40206ebe: 0d2f32 l32i a3, a15, 52 +40206ec1: 020316 beqz a3, 40206ee5 +40206ec4: 142432 l32i a3, a4, 80 +40206ec7: 10a022 movi a2, 16 +40206eca: 202320 or a2, a3, a2 +40206ecd: 146422 s32i a2, a4, 80 +40206ed0: 0f2d mov.n a2, a15 +40206ed2: 00de45 call0 40207cb8 +40206ed5: 000c32 l8ui a3, a12, 0 +40206ed8: 027c movi.n a2, -16 +40206eda: 103320 and a3, a3, a2 +40206edd: 220c movi.n a2, 2 +40206edf: 002706 j 40206f7f +40206ee2: 000000 ill +40206ee5: 031f42 l16ui a4, a15, 6 +40206ee8: ffbc31 l32r a3, 40206dd8 +40206eeb: 02e447 bbsi a4, 4, 40206ef1 +40206eee: 002686 j 40206f8c +40206ef1: a60322 l8ui a2, a3, 166 +40206ef4: 021266 bnei a2, 1, 40206efa +40206ef7: 002286 j 40206f85 +40206efa: ffb421 l32r a2, 40206dcc +40206efd: f52c01 l32r a0, 402043b0 +40206f00: 0000c0 callx0 a0 +40206f03: 006122 s32i a2, a1, 0 +40206f06: ffb121 l32r a2, 40206dcc +40206f09: 203110 or a3, a1, a1 +40206f0c: 06d185 call0 4020dc28 +40206f0f: 20f220 or a15, a2, a2 +40206f12: ffae31 l32r a3, 40206dcc +40206f15: 12dc bnez.n a2, 40206f2a +40206f17: ffae21 l32r a2, 40206dd0 +40206f1a: ec4c01 l32r a0, 4020204c +40206f1d: 0000c0 callx0 a0 +40206f20: 4e28 l32i.n a2, a14, 16 +40206f22: 230c movi.n a3, 2 +40206f24: d24232 s8i a3, a2, 210 +40206f27: 001686 j 40206f85 +40206f2a: 0128 l32i.n a2, a1, 0 +40206f2c: 065266 bnei a2, 5, 40206f36 +40206f2f: 720c movi.n a2, 7 +40206f31: 000206 j 40206f3d +40206f34: 0c0000 excw +40206f37: 9237d3 excw +40206f3a: 820c04 excw +40206f3d: 3e4d22 s8i a2, a13, 62 +40206f40: ffa5d1 l32r a13, 40206dd4 +40206f43: 031c movi.n a3, 16 +40206f45: 0d2d mov.n a2, a13 +40206f47: fb3d01 l32r a0, 40205c3c +40206f4a: 0000c0 callx0 a0 +40206f4d: 0148 l32i.n a4, a1, 0 +40206f4f: 0f3d mov.n a3, a15 +40206f51: 0d2d mov.n a2, a13 +40206f53: e83001 l32r a0, 40201014 <_irom0_text_start+0x4> +40206f56: 0000c0 callx0 a0 +40206f59: fca031 l32r a3, 402061dc +40206f5c: 2aa442 movi a4, 0x42a +40206f5f: 202ff0 or a2, a15, a15 +40206f62: e96901 l32r a0, 40201508 +40206f65: 0000c0 callx0 a0 +40206f68: 4e38 l32i.n a3, a14, 16 +40206f6a: 021c movi.n a2, 16 +40206f6c: 142342 l32i a4, a3, 80 +40206f6f: 202420 or a2, a4, a2 +40206f72: 146322 s32i a2, a3, 80 +40206f75: 000c32 l8ui a3, a12, 0 +40206f78: 027c movi.n a2, -16 +40206f7a: 103320 and a3, a3, a2 +40206f7d: 120c movi.n a2, 1 +40206f7f: 202320 or a2, a3, a2 +40206f82: 000446 j 40206f97 +40206f85: 020c movi.n a2, 0 +40206f87: 000446 j 40206f9c +40206f8a: 320000 excw +40206f8d: 26a603 excw +40206f90: 7cf213 excw +40206f93: 223003 excw +40206f96: 4c2210 excw +40206f99: 120c00 excw +40206f9c: b108 l32i.n a0, a1, 44 +40206f9e: a1c8 l32i.n a12, a1, 40 +40206fa0: 91d8 l32i.n a13, a1, 36 +40206fa2: 81e8 l32i.n a14, a1, 32 +40206fa4: 71f8 l32i.n a15, a1, 28 +40206fa6: 30c112 addi a1, a1, 48 +40206fa9: f00d ret.n +40206fab: e65c00 excw +40206fae: fe .byte 0xfe +40206faf: 3f .byte 0x3f +40206fb0: fe8be6 bgei a11, 8, 40206fb2 +40206fb3: 3f .byte 0x3f +40206fb4: fee634 excw +40206fb7: 3f .byte 0x3f +40206fb8: 019c beqz.n a1, 40206fcc +40206fba: b84023 excw +40206fbd: 002a add.n a0, a0, a2 +40206fbf: 40 .byte 0x40 + +40206fc0 : +40206fc0: 90c112 addi a1, a1, -112 +40206fc3: 1a61c2 s32i a12, a1, 104 +40206fc6: 1961d2 s32i a13, a1, 100 +40206fc9: 1861e2 s32i a14, a1, 96 +40206fcc: 1761f2 s32i a15, a1, 92 +40206fcf: 1b6102 s32i a0, a1, 108 +40206fd2: 02dd mov.n a13, a2 +40206fd4: 9228 l32i.n a2, a2, 36 +40206fd6: fc4bc1 l32r a12, 40206104 +40206fd9: 22f8 l32i.n a15, a2, 8 +40206fdb: 4d28 l32i.n a2, a13, 16 +40206fdd: 744040 extui a4, a4, 0, 8 +40206fe0: 000222 l8ui a2, a2, 0 +40206fe3: f149 s32i.n a4, a1, 60 +40206fe5: c129 s32i.n a2, a1, 48 +40206fe7: 012280 slli a2, a2, 24 +40206fea: 312820 srai a2, a2, 24 +40206fed: e129 s32i.n a2, a1, 56 +40206fef: 9b0c22 l8ui a2, a12, 155 +40206ff2: 03ed mov.n a14, a3 +40206ff4: 00d256 bnez a2, 40207005 +40206ff7: 092322 l32i a2, a3, 36 +40206ffa: 048cc5 call0 4020b8c8 +40206ffd: 041266 bnei a2, 1, 40207005 +40207000: 030c movi.n a3, 0 +40207002: 00d846 j 40207367 +40207005: 040e42 l8ui a4, a14, 4 +40207008: 0f2d mov.n a2, a15 +4020700a: 106142 s32i a4, a1, 64 +4020700d: fafe05 call0 40201ff0 +40207010: 102142 l32i a4, a1, 64 +40207013: f37c movi.n a3, -1 +40207015: 021427 beq a4, a2, 4020701b +40207018: 00d2c6 j 40207367 +4020701b: 1d28 l32i.n a2, a13, 4 +4020701d: 1228 l32i.n a2, a2, 4 +4020701f: d129 s32i.n a2, a1, 52 +40207021: fc28 l32i.n a2, a12, 60 +40207023: 059216 beqz a2, 40207080 +40207026: 102c22 l32i a2, a12, 64 +40207029: 053216 beqz a2, 40207080 +4020702c: eace31 l32r a3, 40201b64 +4020702f: d128 l32i.n a2, a1, 52 +40207031: 5f2352 l32i a5, a3, 0x17c +40207034: 62ab addi.n a6, a2, 10 +40207036: f59c beqz.n a5, 40207059 +40207038: 063d mov.n a3, a6 +4020703a: 04c522 addi a2, a5, 4 +4020703d: 06a042 movi a4, 6 +40207040: 106152 s32i a5, a1, 64 +40207043: 116162 s32i a6, a1, 68 +40207046: eaf501 l32r a0, 40201c1c +40207049: 0000c0 callx0 a0 +4020704c: 102152 l32i a5, a1, 64 +4020704f: 112162 l32i a6, a1, 68 +40207052: a2ac beqz.n a2, 40207080 +40207054: 0558 l32i.n a5, a5, 0 +40207056: fff706 j 40207036 +40207059: 460c22 l8ui a2, a12, 70 +4020705c: 206207 bbci a2, 0, 40207080 +4020705f: 910c22 l8ui a2, a12, 145 +40207062: 021226 beqi a2, 1, 40207068 +40207065: 00a606 j 40207301 +40207068: 092e32 l32i a3, a14, 36 +4020706b: 9a0c22 l8ui a2, a12, 154 +4020706e: 010342 l8ui a4, a3, 1 +40207071: 021226 beqi a2, 1, 40207077 +40207074: 009c06 j 402072e8 +40207077: 1b2c22 l32i a2, a12, 108 +4020707a: 029247 bne a2, a4, 40207080 +4020707d: 0093c6 j 402072d0 +40207080: eab931 l32r a3, 40201b64 +40207083: 01d322 addmi a2, a3, 0x100 +40207086: de0222 l8ui a2, a2, 222 +40207089: 021266 bnei a2, 1, 4020708f +4020708c: ffdc06 j 40207000 +4020708f: 7a2322 l32i a2, a3, 0x1e8 +40207092: 728c beqz.n a2, 4020709d +40207094: 0238 l32i.n a3, a2, 0 +40207096: 338c beqz.n a3, 4020709d +40207098: 0e2d mov.n a2, a14 +4020709a: 0003c0 callx0 a3 +4020709d: eab151 l32r a5, 40201b64 +402070a0: 862522 l32i a2, a5, 0x218 +402070a3: 1aa216 beqz a2, 40207251 +402070a6: 9e28 l32i.n a2, a14, 36 +402070a8: 1a5216 beqz a2, 40207251 +402070ab: 440c22 l8ui a2, a12, 68 +402070ae: 023266 bnei a2, 3, 402070b4 +402070b1: 006706 j 40207251 +402070b4: d158 l32i.n a5, a1, 52 +402070b6: 10c552 addi a5, a5, 16 +402070b9: 052d mov.n a2, a5 +402070bb: c159 s32i.n a5, a1, 48 +402070bd: 0280c5 call0 402098cc +402070c0: 02dd mov.n a13, a2 +402070c2: e28c beqz.n a2, 402070d4 +402070c4: ff4221 l32r a2, 40206dcc +402070c7: f4ba01 l32r a0, 402043b0 +402070ca: 0000c0 callx0 a0 +402070cd: 4712e6 bgei a2, 1, 40207118 +402070d0: 001346 j 40207121 +402070d3: 9e3800 excw +402070d6: eaa351 l32r a5, 40201b64 +402070d9: 010342 l8ui a4, a3, 1 +402070dc: 862522 l32i a2, a5, 0x218 +402070df: 0e1247 beq a2, a4, 402070f1 +402070e2: eaa031 l32r a3, 40201b64 +402070e5: 02d322 addmi a2, a3, 0x200 +402070e8: b50222 l8ui a2, a2, 181 +402070eb: 32dc bnez.n a2, 40207102 +402070ed: 005806 j 40207251 +402070f0: 352100 extui a2, a0, 17, 4 +402070f3: ef .byte 0xef +402070f4: 332b addi.n a3, a3, 2 +402070f6: eac901 l32r a0, 40201c1c +402070f9: 0000c0 callx0 a0 +402070fc: fc4216 beqz a2, 402070c4 +402070ff: fff7c6 j 402070e2 +40207102: c138 l32i.n a3, a1, 48 +40207104: ff3021 l32r a2, 40206dc4 +40207107: 06a042 movi a4, 6 +4020710a: eac401 l32r a0, 40201c1c +4020710d: 0000c0 callx0 a0 +40207110: fb0216 beqz a2, 402070c4 +40207113: 004e86 j 40207251 +40207116: 220000 excw +40207119: 1e .byte 0x1e +4020711a: e24703 excw +4020711d: 4bc602 addi a0, a6, 75 +40207120: f14800 excw +40207123: d128 l32i.n a2, a1, 52 +40207125: 0e3d mov.n a3, a14 +40207127: ffcb45 call0 40206ddc +4020712a: 12a216 beqz a2, 40207258 +4020712d: 9e38 l32i.n a3, a14, 36 +4020712f: 012d mov.n a2, a1 +40207131: 010342 l8ui a4, a3, 1 +40207134: 332b addi.n a3, a3, 2 +40207136: fe9f01 l32r a0, 40206bb4 +40207139: 0000c0 callx0 a0 +4020713c: 9e28 l32i.n a2, a14, 36 +4020713e: e158 l32i.n a5, a1, 56 +40207140: 010222 l8ui a2, a2, 1 +40207143: 030c movi.n a3, 0 +40207145: 212a add.n a2, a1, a2 +40207147: a0c552 addi a5, a5, -96 +4020714a: 004232 s8i a3, a2, 0 +4020714d: e159 s32i.n a5, a1, 56 +4020714f: 075d56 bnez a13, 402071c8 +40207152: ff1d21 l32r a2, 40206dc8 +40207155: 053d mov.n a3, a5 +40207157: 000242 l8ui a4, a2, 0 +4020715a: c128 l32i.n a2, a1, 48 +4020715c: 344040 extui a4, a4, 0, 4 +4020715f: 029085 call0 40209a68 +40207162: 030c movi.n a3, 0 +40207164: 02dd mov.n a13, a2 +40207166: 029237 bne a2, a3, 4020716c +40207169: 007e86 j 40207367 +4020716c: 34a132 movi a3, 0x134 +4020716f: fab301 l32r a0, 40205c3c +40207172: 0000c0 callx0 a0 +40207175: 080f32 l8ui a3, a15, 8 +40207178: 820c movi.n a2, 8 +4020717a: 202320 or a2, a3, a2 +4020717d: 084f22 s8i a2, a15, 8 +40207180: 266df2 s32i a15, a13, 152 +40207183: 006c85 call0 4020784c +40207186: e138 l32i.n a3, a1, 56 +40207188: 240c movi.n a4, 2 +4020718a: 0d2d mov.n a2, a13 +4020718c: 0480c5 call0 4020b99c +4020718f: 040c movi.n a4, 0 +40207191: a30c movi.n a3, 10 +40207193: 0d2d mov.n a2, a13 +40207195: 029805 call0 40209b18 +40207198: 040c movi.n a4, 0 +4020719a: 530c movi.n a3, 5 +4020719c: 0d2d mov.n a2, a13 +4020719e: 0485c5 call0 4020b9fc +402071a1: d148 l32i.n a4, a1, 52 +402071a3: 0e3d mov.n a3, a14 +402071a5: 0d2d mov.n a2, a13 +402071a7: 02a1c5 call0 40209bc4 +402071aa: f148 l32i.n a4, a1, 60 +402071ac: 0d2d mov.n a2, a13 +402071ae: 0e3d mov.n a3, a14 +402071b0: 02a405 call0 40209bf4 +402071b3: ff7f21 l32r a2, 40206fb0 +402071b6: 000222 l8ui a2, a2, 0 +402071b9: 328c beqz.n a2, 402071c0 +402071bb: 0d2d mov.n a2, a13 +402071bd: 0056c5 call0 4020772c +402071c0: 0d2d mov.n a2, a13 +402071c2: 027645 call0 40209928 +402071c5: 001206 j 40207211 +402071c8: 266df2 s32i a15, a13, 152 +402071cb: 006805 call0 4020784c +402071ce: e138 l32i.n a3, a1, 56 +402071d0: 240c movi.n a4, 2 +402071d2: 0d2d mov.n a2, a13 +402071d4: 047c45 call0 4020b99c +402071d7: 140c movi.n a4, 1 +402071d9: 630c movi.n a3, 6 +402071db: 0d2d mov.n a2, a13 +402071dd: 029385 call0 40209b18 +402071e0: 0d2d mov.n a2, a13 +402071e2: 040c movi.n a4, 0 +402071e4: 530c movi.n a3, 5 +402071e6: 048145 call0 4020b9fc +402071e9: 6e28 l32i.n a2, a14, 24 +402071eb: a28c beqz.n a2, 402071f9 +402071ed: 020232 l8ui a3, a2, 2 +402071f0: 234d32 s8i a3, a13, 35 +402071f3: 030222 l8ui a2, a2, 3 +402071f6: 224d22 s8i a2, a13, 34 +402071f9: 0f2142 l32i a4, a1, 60 +402071fc: 202dd0 or a2, a13, a13 +402071ff: 0e3d mov.n a3, a14 +40207201: 029f05 call0 40209bf4 +40207204: ff6b21 l32r a2, 40206fb0 +40207207: 000222 l8ui a2, a2, 0 +4020720a: 328c beqz.n a2, 40207211 +4020720c: 0d2d mov.n a2, a13 +4020720e: 0051c5 call0 4020772c +40207211: ea5431 l32r a3, 40201b64 +40207214: 02d322 addmi a2, a3, 0x200 +40207217: b50222 l8ui a2, a2, 181 +4020721a: 829c beqz.n a2, 40207236 +4020721c: c138 l32i.n a3, a1, 48 +4020721e: fee921 l32r a2, 40206dc4 +40207221: 640c movi.n a4, 6 +40207223: ea7e01 l32r a0, 40201c1c +40207226: 0000c0 callx0 a0 +40207229: 92cc bnez.n a2, 40207236 +4020722b: 460c32 l8ui a3, a12, 70 +4020722e: 420c movi.n a2, 4 +40207230: 202320 or a2, a3, a2 +40207233: 464c22 s8i a2, a12, 70 +40207236: 0c28 l32i.n a2, a12, 0 +40207238: 0a62a7 bbci a2, 10, 40207246 +4020723b: 460c32 l8ui a3, a12, 70 +4020723e: 420c movi.n a2, 4 +40207240: 202320 or a2, a3, a2 +40207243: 464c22 s8i a2, a12, 70 +40207246: 060d32 l8ui a3, a13, 6 +40207249: 420c movi.n a2, 4 +4020724b: 202320 or a2, a3, a2 +4020724e: 064d22 s8i a2, a13, 6 +40207251: ff58d1 l32r a13, 40206fb4 +40207254: 001246 j 402072a1 +40207257: 5d1600 excw +4020725a: ff .byte 0xff +4020725b: ff5721 l32r a2, 40206fb8 +4020725e: eb7b01 l32r a0, 4020204c +40207261: 0000c0 callx0 a0 +40207264: ea4051 l32r a5, 40201b64 +40207267: 4528 l32i.n a2, a5, 16 +40207269: 112222 l32i a2, a2, 68 +4020726c: 009256 bnez a2, 40207279 +4020726f: 0d2d mov.n a2, a13 +40207271: 027745 call0 402099e8 +40207274: 000106 j 4020727c +40207277: c50000 extui a0, a0, 16, 13 +4020727a: 5f .byte 0x5f +4020727b: 320b addi.n a3, a2, -1 +4020727d: 060d mov.n a0, a6 +4020727f: fbaf22 movi a2, -5 +40207282: 102320 and a2, a3, a2 +40207285: 064d22 s8i a2, a13, 6 +40207288: 0b8bc5 call0 40212b48 +4020728b: c21266 bnei a2, 1, 40207251 +4020728e: 023385 call0 402095c8 +40207291: ffef06 j 40207251 +40207294: 9e38 l32i.n a3, a14, 36 +40207296: 23dc bnez.n a3, 402072ac +40207298: 24ccc2 addi a12, a12, 36 +4020729b: 029dc7 bne a13, a12, 402072a1 +4020729e: ff5786 j 40207000 +402072a1: 122c42 l32i a4, a12, 72 +402072a4: ff0416 beqz a4, 40207298 +402072a7: fffa46 j 40207294 +402072aa: 220000 excw +402072ad: 270103 excw +402072b0: 2be594 excw +402072b3: cc2233 excw +402072b6: 014c movi.n a1, 64 +402072b8: ea59 s32i.n a5, a10, 56 +402072ba: 0000c0 callx0 a0 +402072bd: 023d mov.n a3, a2 +402072bf: fd5256 bnez a2, 40207298 +402072c2: 080f42 l8ui a4, a15, 8 +402072c5: 420c movi.n a2, 4 +402072c7: 202420 or a2, a4, a2 +402072ca: 084f22 s8i a2, a15, 8 +402072cd: 002586 j 40207367 +402072d0: ff3721 l32r a2, 40206fac +402072d3: 332b addi.n a3, a3, 2 +402072d5: 116162 s32i a6, a1, 68 +402072d8: ff3901 l32r a0, 40206fbc +402072db: 0000c0 callx0 a0 +402072de: 112162 l32i a6, a1, 68 +402072e1: d9b256 bnez a2, 40207080 +402072e4: 0007c6 j 40207307 +402072e7: 2c2200 excw +402072ea: 471b addi.n a4, a7, 1 +402072ec: 860212 l8ui a1, a2, 134 +402072ef: 21ff63 excw +402072f2: 2e .byte 0x2e +402072f3: ff .byte 0xff +402072f4: 332b addi.n a3, a3, 2 +402072f6: ff3101 l32r a0, 40206fbc +402072f9: 0000c0 callx0 a0 +402072fc: 000586 j 40207316 +402072ff: 220000 excw +40207302: 9a0c movi.n a10, 9 +40207304: 411266 bnei a2, 1, 40207349 +40207307: fc4421 l32r a2, 40206418 +4020730a: 06a042 movi a4, 6 +4020730d: 203660 or a3, a6, a6 +40207310: ea4301 l32r a0, 40201c1c +40207313: 0000c0 callx0 a0 +40207316: d66256 bnez a2, 40207080 +40207319: 0c2152 l32i a5, a1, 48 +4020731c: d128 l32i.n a2, a1, 52 +4020731e: a0c542 addi a4, a5, -96 +40207321: 014480 slli a4, a4, 24 +40207324: 021f62 l16ui a6, a15, 4 +40207327: 0c9d52 l16si a5, a13, 24 +4020732a: 314840 srai a4, a4, 24 +4020732d: 0e3d mov.n a3, a14 +4020732f: ff8885 call0 40206bb8 +40207332: 0c28 l32i.n a2, a12, 0 +40207334: 02e2a7 bbsi a2, 10, 4020733a +40207337: ff5146 j 40207080 +4020733a: 460c32 l8ui a3, a12, 70 +4020733d: 420c movi.n a2, 4 +4020733f: 202320 or a2, a3, a2 +40207342: 464c22 s8i a2, a12, 70 +40207345: ff4dc6 j 40207080 +40207348: 215200 srai a5, a0, 2 +4020734b: 620c movi.n a2, 6 +4020734d: 1f .byte 0x1f +4020734e: c54202 s8i a0, a2, 197 +40207351: 4480a0 extui a8, a10, 0, 5 +40207354: 9d5201 l32r a0, 401ee89c <_lit4_end+0xe8570> +40207357: 220c movi.n a2, 2 +40207359: 400d21 l32r a2, 401d7390 <_lit4_end+0xd1064> +4020735c: 3148 l32i.n a4, a1, 12 +4020735e: 203ee0 or a3, a14, a14 +40207361: ff8545 call0 40206bb8 +40207364: ff4606 j 40207080 +40207367: 1b2102 l32i a0, a1, 108 +4020736a: 032d mov.n a2, a3 +4020736c: 1a21c2 l32i a12, a1, 104 +4020736f: 1921d2 l32i a13, a1, 100 +40207372: 1821e2 l32i a14, a1, 96 +40207375: 1721f2 l32i a15, a1, 92 +40207378: 70c112 addi a1, a1, 112 +4020737b: f00d ret.n +4020737d: 000000 ill +40207380: 01e8 l32i.n a14, a1, 0 +40207382: fecb addi.n a15, a14, 12 +40207384: 010242 l8ui a4, a2, 1 +40207387: 023d mov.n a3, a2 +40207389: 020c movi.n a2, 0 +4020738b: 2b44b6 bltui a4, 4, 402073ba +4020738e: 632b addi.n a6, a3, 2 +40207390: 020352 l8ui a5, a3, 2 +40207393: 030332 l8ui a3, a3, 3 +40207396: 020622 l8ui a2, a6, 2 +40207399: 113380 slli a3, a3, 8 +4020739c: 204350 or a4, a3, a5 +4020739f: 112200 slli a2, a2, 16 +402073a2: 203240 or a3, a2, a4 +402073a5: 030622 l8ui a2, a6, 3 +402073a8: 140c movi.n a4, 1 +402073aa: 012280 slli a2, a2, 24 +402073ad: 202230 or a2, a2, a3 +402073b0: fff431 l32r a3, 40207380 +402073b3: 323a add.n a3, a2, a3 +402073b5: 020c movi.n a2, 0 +402073b7: 832430 moveqz a2, a4, a3 +402073ba: f00d ret.n +402073bc: f25000 excw +402073bf: 500000 excw +402073c2: 0004f2 l8ui a15, a4, 0 +402073c5: 05f250 extui a15, a5, 18, 1 +402073c8: 010252 l8ui a5, a2, 1 +402073cb: 000272 l8ui a7, a2, 0 +402073ce: 020242 l8ui a4, a2, 2 +402073d1: 115580 slli a5, a5, 8 +402073d4: 114400 slli a4, a4, 16 +402073d7: 206570 or a6, a5, a7 +402073da: 205460 or a5, a4, a6 +402073dd: 030242 l8ui a4, a2, 3 +402073e0: 120c movi.n a2, 1 +402073e2: 014480 slli a4, a4, 24 +402073e5: 204450 or a4, a4, a5 +402073e8: f48e51 l32r a5, 40204620 +402073eb: 3e1457 beq a4, a5, 4020742d +402073ee: 123547 bltu a5, a4, 40207404 +402073f1: fff251 l32r a5, 402073bc +402073f4: 020c movi.n a2, 0 +402073f6: 331457 beq a4, a5, 4020742d +402073f9: f48821 l32r a2, 4020461c +402073fc: 151427 beq a4, a2, 40207415 +402073ff: 000a06 j 4020742b +40207402: 510000 excw +40207405: ef .byte 0xef +40207406: ff .byte 0xff +40207407: 320c movi.n a2, 3 +40207409: 201457 beq a4, a5, 4020742d +4020740c: ffee21 l32r a2, 402073c4 +4020740f: 0b1427 beq a4, a2, 4020741e +40207412: 000546 j 4020742b +40207415: 620c movi.n a2, 6 +40207417: 239c beqz.n a3, 4020742d +40207419: 520c movi.n a2, 5 +4020741b: 000146 j 40207424 +4020741e: 620c movi.n a2, 6 +40207420: 938c beqz.n a3, 4020742d +40207422: d20c movi.n a2, 13 +40207424: 004322 s8i a2, a3, 0 +40207427: 620c movi.n a2, 6 +40207429: f00d ret.n +4020742b: 022c movi.n a2, 32 +4020742d: f00d ret.n +4020742f: 0f0000 excw +40207432: 02ac beqz.n a2, 40207456 +40207434: ac0f00 excw +40207437: 0f0000 excw +4020743a: 01ac beqz.n a1, 4020745e +4020743c: ac0f00 excw +4020743f: 0f0004 excw +40207442: 05ac beqz.n a5, 40207466 +40207444: ac0f00 excw +40207447: 025203 excw +4020744a: 027201 l32r a0, 401c7e14 <_lit4_end+0xc1ae8> +4020744d: 024200 excw +40207450: 558002 excw +40207453: 440011 l32r a1, 401d8454 <_lit4_end+0xd2128> +40207456: 657011 l32r a1, 401e0a18 <_lit4_end+0xda6ec> +40207459: 546020 extui a6, a2, 0, 6 +4020745c: 024220 excw +4020745f: 120c03 excw +40207462: 014480 slli a4, a4, 24 +40207465: 204450 or a4, a4, a5 +40207468: fff251 l32r a5, 40207430 +4020746b: 461457 beq a4, a5, 402074b5 +4020746e: 123547 bltu a5, a4, 40207484 +40207471: fff051 l32r a5, 40207434 +40207474: 020c movi.n a2, 0 +40207476: 3b1457 beq a4, a5, 402074b5 +40207479: ffef21 l32r a2, 40207438 +4020747c: 1d1427 beq a4, a2, 4020749d +4020747f: 000c06 j 402074b3 +40207482: 510000 excw +40207485: ee .byte 0xee +40207486: ff .byte 0xff +40207487: 320c movi.n a2, 3 +40207489: 281457 beq a4, a5, 402074b5 +4020748c: ffed21 l32r a2, 40207440 +4020748f: 131427 beq a4, a2, 402074a6 +40207492: ffec31 l32r a3, 40207444 +40207495: 220c movi.n a2, 2 +40207497: 1a1437 beq a4, a3, 402074b5 +4020749a: 000546 j 402074b3 +4020749d: 620c movi.n a2, 6 +4020749f: 239c beqz.n a3, 402074b5 +402074a1: 520c movi.n a2, 5 +402074a3: 000146 j 402074ac +402074a6: 620c movi.n a2, 6 +402074a8: 938c beqz.n a3, 402074b5 +402074aa: d20c movi.n a2, 13 +402074ac: 004322 s8i a2, a3, 0 +402074af: 620c movi.n a2, 6 +402074b1: f00d ret.n +402074b3: 022c movi.n a2, 32 +402074b5: f00d ret.n +402074b7: 024200 excw +402074ba: 026201 l32r a0, 401c7e44 <_lit4_end+0xc1b18> +402074bd: 023200 excw +402074c0: 448002 excw +402074c3: 330011 l32r a1, 401d40c4 <_lit4_end+0xcdd98> +402074c6: 546011 l32r a1, 401dc648 <_lit4_end+0xd631c> +402074c9: 435020 excw +402074cc: 023220 excw +402074cf: 120c03 excw +402074d2: 013380 slli a3, a3, 24 +402074d5: 203340 or a3, a3, a4 +402074d8: ffd841 l32r a4, 40207438 +402074db: 0d1347 beq a3, a4, 402074ec +402074de: ffd421 l32r a2, 40207430 +402074e1: 040c movi.n a4, 0 +402074e3: c03320 sub a3, a3, a2 +402074e6: 02a022 movi a2, 2 +402074e9: 932430 movnez a2, a4, a3 +402074ec: f00d ret.n +402074ee: ef0000 excw +402074f1: 402301 l32r a0, 401d7580 <_lit4_end+0xd1254> + +402074f4 : +402074f4: f0c112 addi a1, a1, -16 +402074f7: 0228 l32i.n a2, a2, 0 +402074f9: 21c9 s32i.n a12, a1, 8 +402074fb: 3109 s32i.n a0, a1, 12 +402074fd: 11d9 s32i.n a13, a1, 4 +402074ff: 390222 l8ui a2, a2, 57 +40207502: 03cd mov.n a12, a3 +40207504: 0ce247 bbsi a2, 4, 40207514 +40207507: 03d316 beqz a3, 40207548 +4020750a: 202330 or a2, a3, a3 +4020750d: 198385 call0 40220d48 +40207510: 000d06 j 40207548 +40207513: 133200 excw +40207516: 420b addi.n a4, a2, -1 +40207518: 2202a0 excw +4020751b: 4503a0 extui a0, a10, 19, 5 +4020751e: 8f .byte 0x8f +4020751f: 02dd21 l32r a2, 401c8094 <_lit4_end+0xc1d68> +40207522: 1c28 l32i.n a2, a12, 4 +40207524: 0d4d mov.n a4, a13 +40207526: 1228 l32i.n a2, a2, 4 +40207528: 030c movi.n a3, 0 +4020752a: 1d29 s32i.n a2, a13, 4 +4020752c: 0cd9 s32i.n a13, a12, 0 +4020752e: 4dc9 s32i.n a12, a13, 16 +40207530: c21c movi.n a2, 28 +40207532: f43d01 l32r a0, 40204628 +40207535: 0000c0 callx0 a0 +40207538: c28c beqz.n a2, 40207548 +4020753a: ffed21 l32r a2, 402074f0 +4020753d: eac301 l32r a0, 4020204c +40207540: 0000c0 callx0 a0 +40207543: 0d2d mov.n a2, a13 +40207545: 218585 call0 40228da0 +40207548: 3108 l32i.n a0, a1, 12 +4020754a: 21c8 l32i.n a12, a1, 8 +4020754c: 11d8 l32i.n a13, a1, 4 +4020754e: 10c112 addi a1, a1, 16 +40207551: f00d ret.n +40207553: 0c8000 excw +40207556: ff .byte 0xff +40207557: ff .byte 0xff +40207558: 7f .byte 0x7f +40207559: ffc8 l32i.n a12, a15, 60 +4020755b: ff .byte 0xff + +4020755c : +4020755c: d0c112 addi a1, a1, -48 +4020755f: 91d9 s32i.n a13, a1, 36 +40207561: b109 s32i.n a0, a1, 44 +40207563: 02dd mov.n a13, a2 +40207565: a1c9 s32i.n a12, a1, 40 +40207567: f44040 extui a4, a4, 0, 16 +4020756a: 25eb addi.n a2, a5, 14 +4020756c: 0ab427 bgeu a4, a2, 4020757a +4020756f: 0d2d mov.n a2, a13 +40207571: 197d45 call0 40220d48 +40207574: 020c movi.n a2, 0 +40207576: 003246 j 40207643 +40207579: 054d00 extui a4, a0, 29, 1 +4020757c: 012d mov.n a2, a1 +4020757e: e6a501 l32r a0, 40201014 <_irom0_text_start+0x4> +40207581: 0000c0 callx0 a0 +40207584: 1d58 l32i.n a5, a13, 4 +40207586: aaa022 movi a2, 170 +40207589: 15c8 l32i.n a12, a5, 4 +4020758b: 000c32 l8ui a3, a12, 0 +4020758e: 5f9327 bne a3, a2, 402075f1 +40207591: 010c32 l8ui a3, a12, 1 +40207594: 599327 bne a3, a2, 402075f1 +40207597: 020c22 l8ui a2, a12, 2 +4020759a: 533266 bnei a2, 3, 402075f1 +4020759d: 030c22 l8ui a2, a12, 3 +402075a0: 04d256 bnez a2, 402075f1 +402075a3: 040c22 l8ui a2, a12, 4 +402075a6: 047256 bnez a2, 402075f1 +402075a9: 050c22 l8ui a2, a12, 5 +402075ac: 041256 bnez a2, 402075f1 +402075af: 070c22 l8ui a2, a12, 7 +402075b2: 060c32 l8ui a3, a12, 6 +402075b5: 112280 slli a2, a2, 8 +402075b8: 202230 or a2, a2, a3 +402075bb: ffe631 l32r a3, 40207554 +402075be: 323a add.n a3, a2, a3 +402075c0: d3ac beqz.n a3, 402075f1 +402075c2: ffe531 l32r a3, 40207558 +402075c5: 223a add.n a2, a2, a3 +402075c7: 62ac beqz.n a2, 402075f1 +402075c9: 0b1d22 l16ui a2, a13, 22 +402075cc: facc42 addi a4, a12, -6 +402075cf: 1549 s32i.n a4, a5, 4 +402075d1: 226b addi.n a2, a2, 6 +402075d3: 0b5d22 s16i a2, a13, 22 +402075d6: 070c22 l8ui a2, a12, 7 +402075d9: 060c32 l8ui a3, a12, 6 +402075dc: 112280 slli a2, a2, 8 +402075df: 202230 or a2, a2, a3 +402075e2: 064c22 s8i a2, a12, 6 +402075e5: 412820 srli a2, a2, 8 +402075e8: 074c22 s8i a2, a12, 7 +402075eb: 04cd mov.n a12, a4 +402075ed: 000346 j 402075fe +402075f0: cc2200 excw +402075f3: 1529f2 l32i a15, a9, 84 +402075f6: 0b1d22 l16ui a2, a13, 22 +402075f9: 22eb addi.n a2, a2, 14 +402075fb: 0b5d22 s16i a2, a13, 22 +402075fe: 010122 l8ui a2, a1, 1 +40207601: 142020 extui a2, a2, 0, 2 +40207604: 201226 beqi a2, 1, 40207628 +40207607: 529c beqz.n a2, 40207620 +40207609: 342266 bnei a2, 2, 40207641 +4020760c: 640c movi.n a4, 6 +4020760e: 314b addi.n a3, a1, 4 +40207610: 0c2d mov.n a2, a12 +40207612: e68001 l32r a0, 40201014 <_irom0_text_start+0x4> +40207615: 0000c0 callx0 a0 +40207618: 640c movi.n a4, 6 +4020761a: 10c132 addi a3, a1, 16 +4020761d: 000606 j 40207639 +40207620: 640c movi.n a4, 6 +40207622: 314b addi.n a3, a1, 4 +40207624: 000146 j 4020762d +40207627: 640c00 extui a0, a0, 12, 7 +4020762a: 10c132 addi a3, a1, 16 +4020762d: 0c2d mov.n a2, a12 +4020762f: e67901 l32r a0, 40201014 <_irom0_text_start+0x4> +40207632: 0000c0 callx0 a0 +40207635: 640c movi.n a4, 6 +40207637: 31ab addi.n a3, a1, 10 +40207639: 2c4a add.n a2, a12, a4 +4020763b: e67601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020763e: 0000c0 callx0 a0 +40207641: 0d2d mov.n a2, a13 +40207643: b108 l32i.n a0, a1, 44 +40207645: a1c8 l32i.n a12, a1, 40 +40207647: 91d8 l32i.n a13, a1, 36 +40207649: 30c112 addi a1, a1, 48 +4020764c: f00d ret.n +4020764e: df0000 excw +40207651: 3ffe84 excw + +40207654 : +40207654: f0c112 addi a1, a1, -16 +40207657: 743030 extui a3, a3, 0, 8 +4020765a: 072216 beqz a2, 402076d0 +4020765d: 338c beqz.n a3, 40207664 +4020765f: 330c movi.n a3, 3 +40207661: 001186 j 402076ab +40207664: fffb31 l32r a3, 40207650 +40207667: 000342 l8ui a4, a3, 0 +4020766a: 010352 l8ui a5, a3, 1 +4020766d: 004142 s8i a4, a1, 0 +40207670: 020342 l8ui a4, a3, 2 +40207673: 030332 l8ui a3, a3, 3 +40207676: 024142 s8i a4, a1, 2 +40207679: 670242 l8ui a4, a2, 103 +4020767c: 014152 s8i a5, a1, 1 +4020767f: 034132 s8i a3, a1, 3 +40207682: 2354f6 bgeui a4, 5, 402076a9 +40207685: 023d mov.n a3, a2 +40207687: 424a add.n a4, a2, a4 +40207689: 171437 beq a4, a3, 402076a4 +4020768c: 680362 l8ui a6, a3, 104 +4020768f: 050c movi.n a5, 0 +40207691: 646060 extui a6, a6, 0, 7 +40207694: 715a add.n a7, a1, a5 +40207696: 000772 l8ui a7, a7, 0 +40207699: 2d1767 beq a7, a6, 402076ca +4020769c: 551b addi.n a5, a5, 1 +4020769e: f24566 bnei a5, 4, 40207694 +402076a1: 000106 j 402076a9 +402076a4: 130c movi.n a3, 1 +402076a6: 000046 j 402076ab +402076a9: 230c movi.n a3, 2 +402076ab: 254232 s8i a3, a2, 37 +402076ae: e92d31 l32r a3, 40201b64 +402076b1: 250242 l8ui a4, a2, 37 +402076b4: 05d332 addmi a3, a3, 0x500 +402076b7: 142332 l32i a3, a3, 80 +402076ba: 06b347 bgeu a3, a4, 402076c4 +402076bd: 264232 s8i a3, a2, 38 +402076c0: 000306 j 402076d0 +402076c3: 424200 excw +402076c6: 014626 beqi a6, 4, 402076cb +402076c9: 331b00 excw +402076cc: ffee46 j 40207689 +402076cf: c11200 mul16u a1, a2, a0 +402076d2: f00d10 subx8 a0, a13, a1 +402076d5: 000000 ill +402076d8: fecf00 excw +402076db: 3f .byte 0x3f +402076dc: fecf04 excw +402076df: 3f .byte 0x3f +402076e0: cefd excw +402076e2: fe .byte 0xfe +402076e3: 3f .byte 0x3f + +402076e4 : +402076e4: 742020 extui a2, a2, 0, 8 +402076e7: 81a032 movi a3, 129 +402076ea: 06b327 bgeu a3, a2, 402076f4 +402076ed: fffa31 l32r a3, 402076d8 +402076f0: 000186 j 402076fa +402076f3: fa3100 excw +402076f6: ff .byte 0xff +402076f7: 412120 srli a2, a2, 1 +402076fa: 0348 l32i.n a4, a3, 0 +402076fc: 01b427 bgeu a4, a2, 40207701 +402076ff: 0329 s32i.n a2, a3, 0 +40207701: fff731 l32r a3, 402076e0 +40207704: 000322 l8ui a2, a3, 0 +40207707: 221b addi.n a2, a2, 1 +40207709: 004322 s8i a2, a3, 0 +4020770c: f00d ret.n +4020770e: 640000 extui a0, a0, 0, 7 +40207711: 3ffe83 excw +40207714: fe8384 excw +40207717: 3f .byte 0x3f +40207718: 830c movi.n a3, 8 +4020771a: fe .byte 0xfe +4020771b: 3f .byte 0x3f +4020771c: fe8364 excw +4020771f: 3f .byte 0x3f +40207720: cf08 l32i.n a0, a15, 48 +40207722: fe .byte 0xfe +40207723: 3f .byte 0x3f +40207724: fe82b4 excw +40207727: 3f .byte 0x3f +40207728: 830c movi.n a3, 8 +4020772a: fe .byte 0xfe +4020772b: 3f .byte 0x3f + +4020772c : +4020772c: e0c112 addi a1, a1, -32 +4020772f: 31f9 s32i.n a15, a1, 12 +40207731: 02fd mov.n a15, a2 +40207733: e90c21 l32r a2, 40201b64 +40207736: 7109 s32i.n a0, a1, 28 +40207738: 61c9 s32i.n a12, a1, 24 +4020773a: 51d9 s32i.n a13, a1, 20 +4020773c: 41e9 s32i.n a14, a1, 16 +4020773e: 01d222 addmi a2, a2, 0x100 +40207741: 01a032 movi a3, 1 +40207744: fe4232 s8i a3, a2, 254 +40207747: 260f22 l8ui a2, a15, 38 +4020774a: 261266 bnei a2, 1, 40207774 +4020774d: fff0c1 l32r a12, 40207710 +40207750: fff1d1 l32r a13, 40207714 +40207753: ffe1e1 l32r a14, 402076d8 +40207756: 002c32 l32i a3, a12, 0 +40207759: 002e22 l32i a2, a14, 0 +4020775c: 0c9327 bne a3, a2, 4020776c +4020775f: 00a032 movi a3, 0 +40207762: 040c42 l8ui a4, a12, 4 +40207765: 350c movi.n a5, 3 +40207767: 032d mov.n a2, a3 +40207769: 1b06c5 call0 402227d8 +4020776c: cc8b addi.n a12, a12, 8 +4020776e: e49dc7 bne a13, a12, 40207756 +40207771: 0031c6 j 4020783c +40207774: ffdad1 l32r a13, 402076dc +40207777: 4d2266 bnei a2, 2, 402077c8 +4020777a: 0d28 l32i.n a2, a13, 0 +4020777c: 930c movi.n a3, 9 +4020777e: 223327 bltu a3, a2, 402077a4 +40207781: ffd521 l32r a2, 402076d8 +40207784: 0238 l32i.n a3, a2, 0 +40207786: 96a022 movi a2, 150 +40207789: 179327 bne a3, a2, 402077a4 +4020778c: 00a042 movi a4, 0 +4020778f: 03a052 movi a5, 3 +40207792: 203440 or a3, a4, a4 +40207795: 042d mov.n a2, a4 +40207797: 1b0405 call0 402227d8 +4020779a: 120c movi.n a2, 1 +4020779c: 264f22 s8i a2, a15, 38 +4020779f: 002646 j 4020783c +402077a2: c10000 mul16u a0, a0, a0 +402077a5: ffdd excw +402077a7: ffdde1 l32r a14, 4020771c +402077aa: 002c32 l32i a3, a12, 0 +402077ad: 002d22 l32i a2, a13, 0 +402077b0: 0c9327 bne a3, a2, 402077c0 +402077b3: 040c42 l8ui a4, a12, 4 +402077b6: 0aa052 movi a5, 10 +402077b9: 030c movi.n a3, 0 +402077bb: 120c movi.n a2, 1 +402077bd: 1b0185 call0 402227d8 +402077c0: cc8b addi.n a12, a12, 8 +402077c2: e49ec7 bne a14, a12, 402077aa +402077c5: 001cc6 j 4020783c +402077c8: ffd651 l32r a5, 40207720 +402077cb: 0d28 l32i.n a2, a13, 0 +402077cd: 0548 l32i.n a4, a5, 0 +402077cf: 930c movi.n a3, 9 +402077d1: 05ed mov.n a14, a5 +402077d3: 31b247 bgeu a2, a4, 40207808 +402077d6: 0a3347 bltu a3, a4, 402077e4 +402077d9: ffbf21 l32r a2, 402076d8 +402077dc: 0238 l32i.n a3, a2, 0 +402077de: 96a022 movi a2, 150 +402077e1: a71327 beq a3, a2, 4020778c +402077e4: ffd0c1 l32r a12, 40207724 +402077e7: ffd0d1 l32r a13, 40207728 +402077ea: 002c32 l32i a3, a12, 0 +402077ed: 002e22 l32i a2, a14, 0 +402077f0: 0c9327 bne a3, a2, 40207800 +402077f3: 040c42 l8ui a4, a12, 4 +402077f6: 0ba052 movi a5, 11 +402077f9: 030c movi.n a3, 0 +402077fb: 220c movi.n a2, 2 +402077fd: 1afd85 call0 402227d8 +40207800: cc8b addi.n a12, a12, 8 +40207802: e49dc7 bne a13, a12, 402077ea +40207805: 000cc6 j 4020783c +40207808: 0d3327 bltu a3, a2, 40207819 +4020780b: ffb321 l32r a2, 402076d8 +4020780e: 0238 l32i.n a3, a2, 0 +40207810: 96a022 movi a2, 150 +40207813: 029327 bne a3, a2, 40207819 +40207816: ffdc86 j 4020778c +40207819: ffbfc1 l32r a12, 40207718 +4020781c: 2e0c movi.n a14, 2 +4020781e: 0c38 l32i.n a3, a12, 0 +40207820: 0d28 l32i.n a2, a13, 0 +40207822: 0e9327 bne a3, a2, 40207834 +40207825: 040c42 l8ui a4, a12, 4 +40207828: a50c movi.n a5, 10 +4020782a: 030c movi.n a3, 0 +4020782c: 120c movi.n a2, 1 +4020782e: 1afa85 call0 402227d8 +40207831: 264fe2 s8i a14, a15, 38 +40207834: ffba21 l32r a2, 4020771c +40207837: cc8b addi.n a12, a12, 8 +40207839: e192c7 bne a2, a12, 4020781e +4020783c: 7108 l32i.n a0, a1, 28 +4020783e: 61c8 l32i.n a12, a1, 24 +40207840: 51d8 l32i.n a13, a1, 20 +40207842: 41e8 l32i.n a14, a1, 16 +40207844: 31f8 l32i.n a15, a1, 12 +40207846: 20c112 addi a1, a1, 32 +40207849: f00d ret.n + ... + +4020784c : +4020784c: ffa431 l32r a3, 402076dc +4020784f: 020c movi.n a2, 0 +40207851: 0329 s32i.n a2, a3, 0 +40207853: ffb331 l32r a3, 40207720 +40207856: 0329 s32i.n a2, a3, 0 +40207858: ffa031 l32r a3, 402076d8 +4020785b: 0329 s32i.n a2, a3, 0 +4020785d: f00d ret.n + ... + +40207860 : +40207860: d0c112 addi a1, a1, -48 +40207863: 0961d2 s32i a13, a1, 36 +40207866: 0861e2 s32i a14, a1, 32 +40207869: 71f9 s32i.n a15, a1, 28 +4020786b: 02dd mov.n a13, a2 +4020786d: 03ed mov.n a14, a3 +4020786f: 04fd mov.n a15, a4 +40207871: 030c movi.n a3, 0 +40207873: 041c movi.n a4, 16 +40207875: 67c222 addi a2, a2, 103 +40207878: a1c9 s32i.n a12, a1, 40 +4020787a: 0b6102 s32i a0, a1, 44 +4020787d: e5e401 l32r a0, 40201010 <_irom0_text_start> +40207880: 0000c0 callx0 a0 +40207883: e8b8c1 l32r a12, 40201b64 +40207886: e8b731 l32r a3, 40201b64 +40207889: 2c0322 l8ui a2, a3, 44 +4020788c: c03c30 sub a3, a12, a3 +4020788f: 2ea327 bge a3, a2, 402078c1 +40207892: 2d0c72 l8ui a7, a12, 45 +40207895: 0f3d mov.n a3, a15 +40207897: 074d mov.n a4, a7 +40207899: 0e2d mov.n a2, a14 +4020789b: 0179 s32i.n a7, a1, 0 +4020789d: 040485 call0 4020b8e8 +402078a0: 0178 l32i.n a7, a1, 0 +402078a2: 629c beqz.n a2, 402078bc +402078a4: 670d32 l8ui a3, a13, 103 +402078a7: 231b addi.n a2, a3, 1 +402078a9: 742020 extui a2, a2, 0, 8 +402078ac: 674d22 s8i a2, a13, 103 +402078af: 3d3a add.n a3, a13, a3 +402078b1: 684372 s8i a7, a3, 104 +402078b4: 2d2a add.n a2, a13, a2 +402078b6: 670222 l8ui a2, a2, 103 +402078b9: ffe285 call0 402076e4 +402078bc: cc1b addi.n a12, a12, 1 +402078be: fff106 j 40207886 +402078c1: b108 l32i.n a0, a1, 44 +402078c3: 020c movi.n a2, 0 +402078c5: a1c8 l32i.n a12, a1, 40 +402078c7: 91d8 l32i.n a13, a1, 36 +402078c9: 81e8 l32i.n a14, a1, 32 +402078cb: 71f8 l32i.n a15, a1, 28 +402078cd: 30c112 addi a1, a1, 48 +402078d0: f00d ret.n +402078d2: f50000 extui a0, a0, 16, 16 +402078d5: 402301 l32r a0, 401d7964 <_lit4_end+0xd1638> + +402078d8 : +402078d8: f0c112 addi a1, a1, -16 +402078db: 21c9 s32i.n a12, a1, 8 +402078dd: 02cd mov.n a12, a2 +402078df: 172222 l32i a2, a2, 92 +402078e2: 3109 s32i.n a0, a1, 12 +402078e4: 014256 bnez a2, 402078fc +402078e7: fffb31 l32r a3, 402078d4 +402078ea: 00a052 movi a5, 0 +402078ed: 47a242 movi a4, 0x247 +402078f0: 80a022 movi a2, 128 +402078f3: e70401 l32r a0, 40201504 +402078f6: 0000c0 callx0 a0 +402078f9: 176c22 s32i a2, a12, 92 +402078fc: 172c32 l32i a3, a12, 92 +402078ff: 3108 l32i.n a0, a1, 12 +40207901: 020c movi.n a2, 0 +40207903: 140c movi.n a4, 1 +40207905: 932430 movnez a2, a4, a3 +40207908: 21c8 l32i.n a12, a1, 8 +4020790a: 10c112 addi a1, a1, 16 +4020790d: f00d ret.n +4020790f: fe1800 excw +40207912: 180334 excw +40207915: fe .byte 0xfe +40207916: 18dd34 excw +40207919: fe .byte 0xfe +4020791a: 000534 excw +4020791d: 334c90 excw +40207920: 4c9000 excw +40207923: 34 .byte 0x34 + +40207924 : +40207924: c0c112 addi a1, a1, -64 +40207927: e1c9 s32i.n a12, a1, 56 +40207929: 02cd mov.n a12, a2 +4020792b: 1228 l32i.n a2, a2, 4 +4020792d: c1e9 s32i.n a14, a1, 48 +4020792f: 12e8 l32i.n a14, a2, 4 +40207931: d1d9 s32i.n a13, a1, 52 +40207933: 2eab addi.n a2, a14, 10 +40207935: b1f9 s32i.n a15, a1, 44 +40207937: f109 s32i.n a0, a1, 60 +40207939: 0329 s32i.n a2, a3, 0 +4020793b: 0129 s32i.n a2, a1, 0 +4020793d: 0b1c22 l16ui a2, a12, 22 +40207940: 18cef2 addi a15, a14, 24 +40207943: 03dd mov.n a13, a3 +40207945: 3f2a add.n a3, a15, a2 +40207947: 2139 s32i.n a3, a1, 8 +40207949: 4159 s32i.n a5, a1, 16 +4020794b: 0ba032 movi a3, 11 +4020794e: 744040 extui a4, a4, 0, 8 +40207951: 042327 blt a3, a2, 40207959 +40207954: 120c movi.n a2, 1 +40207956: 00d3c6 j 40207ca9 +40207959: 58a032 movi a3, 88 +4020795c: 202dd0 or a2, a13, a13 +4020795f: 056142 s32i a4, a1, 20 +40207962: f8b601 l32r a0, 40205c3c +40207965: 0000c0 callx0 a0 +40207968: 0128 l32i.n a2, a1, 0 +4020796a: 7df9 s32i.n a15, a13, 28 +4020796c: 0d29 s32i.n a2, a13, 0 +4020796e: 101e22 l16ui a2, a14, 32 +40207971: 24cef2 addi a15, a14, 36 +40207974: 055d22 s16i a2, a13, 10 +40207977: 111e22 l16ui a2, a14, 34 +4020797a: 035d22 s16i a2, a13, 6 +4020797d: 9c28 l32i.n a2, a12, 36 +4020797f: 2228 l32i.n a2, a2, 8 +40207981: fa66c5 call0 40201ff0 +40207984: 2138 l32i.n a3, a1, 8 +40207986: 742020 extui a2, a2, 0, 8 +40207989: 054d22 s8i a2, a13, 5 +4020798c: 044d22 s8i a2, a13, 4 +4020798f: 5148 l32i.n a4, a1, 20 +40207991: c023f0 sub a2, a3, a15 +40207994: 5d29 s32i.n a2, a13, 20 +40207996: 230c movi.n a3, 2 +40207998: 020c movi.n a2, 0 +4020799a: 833240 moveqz a3, a2, a4 +4020799d: 4df9 s32i.n a15, a13, 16 +4020799f: 3139 s32i.n a3, a1, 12 +402079a1: 1129 s32i.n a2, a1, 4 +402079a3: 2138 l32i.n a3, a1, 8 +402079a5: c023f0 sub a2, a3, a15 +402079a8: 0222e6 bgei a2, 2, 402079ae +402079ab: 004e46 j 40207ae8 +402079ae: 010fe2 l8ui a14, a15, 1 +402079b1: 3e1b addi.n a3, a14, 1 +402079b3: 9da327 bge a3, a2, 40207954 +402079b6: 000f22 l8ui a2, a15, 0 +402079b9: 532c movi.n a3, 37 +402079bb: 651237 beq a2, a3, 40207a24 +402079be: 223327 bltu a3, a2, 402079e4 +402079c1: 673226 beqi a2, 3, 40207a2c +402079c4: 0d42f6 bgeui a2, 4, 402079d5 +402079c7: 049216 beqz a2, 40207a14 +402079ca: 021226 beqi a2, 1, 402079d0 +402079cd: 004306 j 40207add +402079d0: adf9 s32i.n a15, a13, 40 +402079d2: 0041c6 j 40207add +402079d5: 5c5226 beqi a2, 5, 40207a35 +402079d8: 027226 beqi a2, 7, 402079de +402079db: 003f86 j 40207add +402079de: 8df9 s32i.n a15, a13, 32 +402079e0: 003e46 j 40207add +402079e3: 033c00 excw +402079e6: 6f1237 beq a2, a3, 40207a59 +402079e9: 0f3327 bltu a3, a2, 402079fc +402079ec: a32c movi.n a3, 42 +402079ee: 521237 beq a2, a3, 40207a44 +402079f1: d32c movi.n a3, 45 +402079f3: 029237 bne a2, a3, 402079f9 +402079f6: 003806 j 40207ada +402079f9: 003806 j 40207add +402079fc: d33c movi.n a3, 61 +402079fe: 5e1237 beq a2, a3, 40207a60 +40207a01: dda032 movi a3, 221 +40207a04: 5e1237 beq a2, a3, 40207a66 +40207a07: 233c movi.n a3, 50 +40207a09: 021237 beq a2, a3, 40207a0f +40207a0c: 003346 j 40207add +40207a0f: bdf9 s32i.n a15, a13, 44 +40207a11: 003206 j 40207add +40207a14: 1128 l32i.n a2, a1, 4 +40207a16: 0c3256 bnez a2, 40207add +40207a19: 130c movi.n a3, 1 +40207a1b: 9df9 s32i.n a15, a13, 36 +40207a1d: 1139 s32i.n a3, a1, 4 +40207a1f: 002e86 j 40207add +40207a22: f20000 excw +40207a25: 126d excw +40207a27: 002c86 j 40207add +40207a2a: 220000 excw +40207a2d: 0f .byte 0xf +40207a2e: 4d2202 l32i a0, a2, 0x134 +40207a31: 29c604 excw +40207a34: 4c2800 excw +40207a37: 6df9 s32i.n a15, a13, 24 +40207a39: c02f20 sub a2, a15, a2 +40207a3c: 0c4d22 s8i a2, a13, 12 +40207a3f: 002686 j 40207add +40207a42: 260000 excw +40207a45: 1e .byte 0x1e +40207a46: 248602 excw +40207a49: 0f3200 excw +40207a4c: a12202 l32i a0, a2, 0x284 +40207a4f: 232000 excw +40207a52: 5d2220 excw +40207a55: 20c604 excw +40207a58: edf900 excw +40207a5b: 001f86 j 40207add +40207a5e: f20000 excw +40207a61: 116d excw +40207a63: 001d86 j 40207add +40207a66: 024ef6 bgeui a14, 4, 40207a6c +40207a69: 005546 j 40207bc2 +40207a6c: 2f2b addi.n a2, a15, 2 +40207a6e: 010242 l8ui a4, a2, 1 +40207a71: 020f72 l8ui a7, a15, 2 +40207a74: 020232 l8ui a3, a2, 2 +40207a77: 114480 slli a4, a4, 8 +40207a7a: 113300 slli a3, a3, 16 +40207a7d: 205470 or a5, a4, a7 +40207a80: 204350 or a4, a3, a5 +40207a83: 030232 l8ui a3, a2, 3 +40207a86: 013380 slli a3, a3, 24 +40207a89: 203340 or a3, a3, a4 +40207a8c: f2e441 l32r a4, 4020461c +40207a8f: 021347 beq a3, a4, 40207a95 +40207a92: 003cc6 j 40207b89 +40207a95: ddf9 s32i.n a15, a13, 52 +40207a97: 001086 j 40207add +40207a9a: b60000 excw +40207a9d: 4e .byte 0x4e +40207a9e: 504602 s8i a0, a6, 80 +40207aa1: cc3100 excw +40207aa4: 22ec bnez.n a2, 40207aca +40207aa6: c71023 excw +40207aa9: b63172 excw +40207aac: 4e .byte 0x4e +40207aad: 2e .byte 0x2e +40207aae: 030f32 l8ui a3, a15, 3 +40207ab1: 020f52 l8ui a5, a15, 2 +40207ab4: 040f22 l8ui a2, a15, 4 +40207ab7: 113380 slli a3, a3, 8 +40207aba: 112200 slli a2, a2, 16 +40207abd: 204350 or a4, a3, a5 +40207ac0: 203240 or a3, a2, a4 +40207ac3: 050f22 l8ui a2, a15, 5 +40207ac6: 012280 slli a2, a2, 24 +40207ac9: 202230 or a2, a2, a3 +40207acc: ff9431 l32r a3, 4020791c +40207acf: 021237 beq a2, a3, 40207ad5 +40207ad2: 005e86 j 40207c50 +40207ad5: 102d22 l32i a2, a13, 64 +40207ad8: 12cc bnez.n a2, 40207add +40207ada: 106df2 s32i a15, a13, 64 +40207add: 010f22 l8ui a2, a15, 1 +40207ae0: 222b addi.n a2, a2, 2 +40207ae2: ff2a add.n a15, a15, a2 +40207ae4: ffaec6 j 402079a3 +40207ae7: ad2800 excw +40207aea: 030c movi.n a3, 0 +40207aec: 1d1237 beq a2, a3, 40207b0d +40207aef: 010252 l8ui a5, a2, 1 +40207af2: f20c movi.n a2, 15 +40207af4: 01b257 bgeu a2, a5, 40207af9 +40207af7: 230c movi.n a3, 2 +40207af9: bd48 l32i.n a4, a13, 44 +40207afb: e48c beqz.n a4, 40207b0d +40207afd: f20c movi.n a2, 15 +40207aff: 010442 l8ui a4, a4, 1 +40207b02: c02250 sub a2, a2, a5 +40207b05: 04a247 bge a2, a4, 40207b0d +40207b08: 420c movi.n a2, 4 +40207b0a: 203320 or a3, a3, a2 +40207b0d: 9d28 l32i.n a2, a13, 36 +40207b0f: 628c beqz.n a2, 40207b19 +40207b11: 010222 l8ui a2, a2, 1 +40207b14: 042c movi.n a4, 32 +40207b16: 04b427 bgeu a4, a2, 40207b1e +40207b19: 820c movi.n a2, 8 +40207b1b: 203320 or a3, a3, a2 +40207b1e: 040d42 l8ui a4, a13, 4 +40207b21: 050d22 l8ui a2, a13, 5 +40207b24: 041427 beq a4, a2, 40207b2c +40207b27: 022c movi.n a2, 32 +40207b29: 203320 or a3, a3, a2 +40207b2c: 8d28 l32i.n a2, a13, 32 +40207b2e: a28c beqz.n a2, 40207b3c +40207b30: 010222 l8ui a2, a2, 1 +40207b33: 0532f6 bgeui a2, 3, 40207b3c +40207b36: 00a022 movi a2, 0 +40207b39: 086d22 s32i a2, a13, 32 +40207b3c: 102d22 l32i a2, a13, 64 +40207b3f: 929c beqz.n a2, 40207b5c +40207b41: 010252 l8ui a5, a2, 1 +40207b44: 000222 l8ui a2, a2, 0 +40207b47: dda042 movi a4, 221 +40207b4a: c04240 sub a4, a2, a4 +40207b4d: a61c movi.n a6, 26 +40207b4f: e21c movi.n a2, 30 +40207b51: 932640 movnez a2, a6, a4 +40207b54: 04b527 bgeu a5, a2, 40207b5c +40207b57: 020c movi.n a2, 0 +40207b59: 106d22 s32i a2, a13, 64 +40207b5c: 112d42 l32i a4, a13, 68 +40207b5f: 032d mov.n a2, a3 +40207b61: 144416 beqz a4, 40207ca9 +40207b64: 000422 l8ui a2, a4, 0 +40207b67: 010452 l8ui a5, a4, 1 +40207b6a: dda042 movi a4, 221 +40207b6d: c02240 sub a2, a2, a4 +40207b70: 661c movi.n a6, 22 +40207b72: a41c movi.n a4, 26 +40207b74: 934620 movnez a4, a6, a2 +40207b77: 032d mov.n a2, a3 +40207b79: 023547 bltu a5, a4, 40207b7f +40207b7c: 004a46 j 40207ca9 +40207b7f: 020c movi.n a2, 0 +40207b81: 116d22 s32i a2, a13, 68 +40207b84: 032d mov.n a2, a3 +40207b86: 0047c6 j 40207ca9 +40207b89: 026ef6 bgeui a14, 6, 40207b8f +40207b8c: 003b06 j 40207c7c +40207b8f: 010242 l8ui a4, a2, 1 +40207b92: 000272 l8ui a7, a2, 0 +40207b95: 020232 l8ui a3, a2, 2 +40207b98: 114480 slli a4, a4, 8 +40207b9b: 113300 slli a3, a3, 16 +40207b9e: 205470 or a5, a4, a7 +40207ba1: 204350 or a4, a3, a5 +40207ba4: 030232 l8ui a3, a2, 3 +40207ba7: 013380 slli a3, a3, 24 +40207baa: 203340 or a3, a3, a4 +40207bad: f29c41 l32r a4, 40204620 +40207bb0: 021347 beq a3, a4, 40207bb6 +40207bb3: 002fc6 j 40207c76 +40207bb6: 060f22 l8ui a2, a15, 6 +40207bb9: 021266 bnei a2, 1, 40207bbf +40207bbc: 002c46 j 40207c71 +40207bbf: 0ae216 beqz a2, 40207c71 +40207bc2: 0f2d mov.n a2, a15 +40207bc4: ff7bc5 call0 40207384 +40207bc7: 728c beqz.n a2, 40207bd2 +40207bc9: 146df2 s32i a15, a13, 80 +40207bcc: ffc346 j 40207add +40207bcf: 000000 ill +40207bd2: 202ff0 or a2, a15, a15 +40207bd5: ff7ac5 call0 40207384 +40207bd8: ec0216 beqz a2, 40207a9c +40207bdb: 07cf22 addi a2, a15, 7 +40207bde: 096d22 s32i a2, a13, 36 +40207be1: ffbe06 j 40207add +40207be4: 030f32 l8ui a3, a15, 3 +40207be7: 020f52 l8ui a5, a15, 2 +40207bea: 040f22 l8ui a2, a15, 4 +40207bed: 113380 slli a3, a3, 8 +40207bf0: 112200 slli a2, a2, 16 +40207bf3: 204350 or a4, a3, a5 +40207bf6: 203240 or a3, a2, a4 +40207bf9: 050f22 l8ui a2, a15, 5 +40207bfc: 012280 slli a2, a2, 24 +40207bff: 202230 or a2, a2, a3 +40207c02: ff4331 l32r a3, 40207910 +40207c05: 0f1237 beq a2, a3, 40207c18 +40207c08: ff4331 l32r a3, 40207914 +40207c0b: 1e1237 beq a2, a3, 40207c2d +40207c0e: ff4231 l32r a3, 40207918 +40207c11: 4b1237 beq a2, a3, 40207c60 +40207c14: ffa286 j 40207aa2 +40207c17: 0f2200 excw +40207c1a: 320a add.n a3, a2, a0 +40207c1c: 0f .byte 0xf +40207c1d: 8009 s32i.n a0, a0, 32 +40207c1f: 301122 l16ui a2, a1, 96 +40207c22: 222022 l32i a2, a0, 136 +40207c25: 2b5d excw +40207c27: ffac86 j 40207add +40207c2a: 000000 ill +40207c2d: e7cd21 l32r a2, 40201b64 +40207c30: 5e22a2 l32i a10, a2, 0x178 +40207c33: ea6a16 beqz a10, 40207add +40207c36: 4128 l32i.n a2, a1, 16 +40207c38: f8ce62 addi a6, a14, -8 +40207c3b: a0c272 addi a7, a2, -96 +40207c3e: 0138 l32i.n a3, a1, 0 +40207c40: 3128 l32i.n a2, a1, 12 +40207c42: 746060 extui a6, a6, 0, 8 +40207c45: 5fab addi.n a5, a15, 10 +40207c47: 4f7b addi.n a4, a15, 7 +40207c49: 000ac0 callx0 a10 +40207c4c: ffa346 j 40207add +40207c4f: 343100 extui a3, a0, 1, 4 +40207c52: ff .byte 0xff +40207c53: 021237 beq a2, a3, 40207c59 +40207c56: ffa0c6 j 40207add +40207c59: 112d22 l32i a2, a13, 68 +40207c5c: ff9e06 j 40207ad8 +40207c5f: 0f2200 excw +40207c62: 122607 blt a6, a0, 40207c78 +40207c65: 9cc602 addi a0, a6, -100 +40207c68: ff .byte 0xff +40207c69: 120c movi.n a2, 1 +40207c6b: 544d22 s8i a2, a13, 84 +40207c6e: ff9ac6 j 40207add +40207c71: fdf9 s32i.n a15, a13, 60 +40207c73: ff9986 j 40207add +40207c76: 024ef6 bgeui a14, 4, 40207c7c +40207c79: ffd146 j 40207bc2 +40207c7c: 010232 l8ui a3, a2, 1 +40207c7f: 000252 l8ui a5, a2, 0 +40207c82: 113380 slli a3, a3, 8 +40207c85: 204350 or a4, a3, a5 +40207c88: 020232 l8ui a3, a2, 2 +40207c8b: 030222 l8ui a2, a2, 3 +40207c8e: 113300 slli a3, a3, 16 +40207c91: 203340 or a3, a3, a4 +40207c94: 012280 slli a2, a2, 24 +40207c97: 202230 or a2, a2, a3 +40207c9a: fdc931 l32r a3, 402073c0 +40207c9d: 021237 beq a2, a3, 40207ca3 +40207ca0: ffc786 j 40207bc2 +40207ca3: 136df2 s32i a15, a13, 76 +40207ca6: ff8cc6 j 40207add +40207ca9: f108 l32i.n a0, a1, 60 +40207cab: e1c8 l32i.n a12, a1, 56 +40207cad: d1d8 l32i.n a13, a1, 52 +40207caf: c1e8 l32i.n a14, a1, 48 +40207cb1: b1f8 l32i.n a15, a1, 44 +40207cb3: 40c112 addi a1, a1, 64 +40207cb6: f00d ret.n + +40207cb8 : +40207cb8: c0c112 addi a1, a1, -64 +40207cbb: d1d9 s32i.n a13, a1, 52 +40207cbd: 030c movi.n a3, 0 +40207cbf: d2d8 l32i.n a13, a2, 52 +40207cc1: f109 s32i.n a0, a1, 60 +40207cc3: e1c9 s32i.n a12, a1, 56 +40207cc5: c1e9 s32i.n a14, a1, 48 +40207cc7: b1f9 s32i.n a15, a1, 44 +40207cc9: 004132 s8i a3, a1, 0 +40207ccc: 5dcc bnez.n a13, 40207cd5 +40207cce: 020c movi.n a2, 0 +40207cd0: 003786 j 40207db2 +40207cd3: 220000 excw +40207cd6: 070d mov.n a0, a7 +40207cd8: 060d32 l8ui a3, a13, 6 +40207cdb: 112280 slli a2, a2, 8 +40207cde: 202320 or a2, a3, a2 +40207ce1: 010de2 l8ui a14, a13, 1 +40207ce4: e61266 bnei a2, 1, 40207cce +40207ce7: e79ff1 l32r a15, 40201b64 +40207cea: 320c movi.n a2, 3 +40207cec: 02dff2 addmi a15, a15, 0x200 +40207cef: 3c4f22 s8i a2, a15, 60 +40207cf2: 013d mov.n a3, a1 +40207cf4: 2d8b addi.n a2, a13, 8 +40207cf6: ff6d05 call0 402073c8 +40207cf9: 404f22 s8i a2, a15, 64 +40207cfc: 0d0d32 l8ui a3, a13, 13 +40207cff: 0c0dc2 l8ui a12, a13, 12 +40207d02: 113380 slli a3, a3, 8 +40207d05: 20cc30 or a12, a12, a3 +40207d08: f4cee2 addi a14, a14, -12 +40207d0b: 040c movi.n a4, 0 +40207d0d: 312fe0 srai a2, a14, 31 +40207d10: c022e0 sub a2, a2, a14 +40207d13: 0262d6 bgez a2, 40207d3d +40207d16: 23b4c7 bgeu a4, a12, 40207d3d +40207d19: a024d0 addx4 a2, a4, a13 +40207d1c: 013d mov.n a3, a1 +40207d1e: 22eb addi.n a2, a2, 14 +40207d20: 4149 s32i.n a4, a1, 16 +40207d22: ff6a45 call0 402073c8 +40207d25: 3e0f32 l8ui a3, a15, 62 +40207d28: 4148 l32i.n a4, a1, 16 +40207d2a: 0223f6 bgeui a3, 2, 40207d30 +40207d2d: 3e4f22 s8i a2, a15, 62 +40207d30: 441b addi.n a4, a4, 1 +40207d32: fccee2 addi a14, a14, -4 +40207d35: f44040 extui a4, a4, 0, 16 +40207d38: fff446 j 40207d0d +40207d3b: a60000 excw +40207d3e: 1e .byte 0x1e +40207d3f: d08d excw +40207d41: a03c movi.n a0, 58 +40207d43: 0f0382 l8ui a8, a3, 15 +40207d46: f235a1 l32r a10, 4020461c +40207d49: 112880 slli a2, a8, 8 +40207d4c: 0e0382 l8ui a8, a3, 14 +40207d4f: f234b1 l32r a11, 40204620 +40207d52: 208820 or a8, a8, a2 +40207d55: 10c332 addi a3, a3, 16 +40207d58: fecee2 addi a14, a14, -2 +40207d5b: 020c movi.n a2, 0 +40207d5d: 290c movi.n a9, 2 +40207d5f: 3c0c movi.n a12, 3 +40207d61: 314fe0 srai a4, a14, 31 +40207d64: c044e0 sub a4, a4, a14 +40207d67: 0364d6 bgez a4, 40207da1 +40207d6a: 33b287 bgeu a2, a8, 40207da1 +40207d6d: 010352 l8ui a5, a3, 1 +40207d70: 000372 l8ui a7, a3, 0 +40207d73: 020342 l8ui a4, a3, 2 +40207d76: 115580 slli a5, a5, 8 +40207d79: 114400 slli a4, a4, 16 +40207d7c: 206570 or a6, a5, a7 +40207d7f: 205460 or a5, a4, a6 +40207d82: 030342 l8ui a4, a3, 3 +40207d85: 014480 slli a4, a4, 24 +40207d88: 204450 or a4, a4, a5 +40207d8b: 1d14a7 beq a4, a10, 40207dac +40207d8e: 0294b7 bne a4, a11, 40207d94 +40207d91: 3d4fc2 s8i a12, a15, 61 +40207d94: 221b addi.n a2, a2, 1 +40207d96: 334b addi.n a3, a3, 4 +40207d98: fccee2 addi a14, a14, -4 +40207d9b: f42020 extui a2, a2, 0, 16 +40207d9e: ffefc6 j 40207d61 +40207da1: f27c movi.n a2, -1 +40207da3: 3022e0 xor a2, a2, a14 +40207da6: 052f20 extui a2, a2, 31, 1 +40207da9: 000146 j 40207db2 +40207dac: 3d4f92 s8i a9, a15, 61 +40207daf: fff846 j 40207d94 +40207db2: f108 l32i.n a0, a1, 60 +40207db4: e1c8 l32i.n a12, a1, 56 +40207db6: d1d8 l32i.n a13, a1, 52 +40207db8: c1e8 l32i.n a14, a1, 48 +40207dba: b1f8 l32i.n a15, a1, 44 +40207dbc: 40c112 addi a1, a1, 64 +40207dbf: f00d ret.n +40207dc1: 000000 ill + +40207dc4 : +40207dc4: c0c112 addi a1, a1, -64 +40207dc7: e1c9 s32i.n a12, a1, 56 +40207dc9: 030c movi.n a3, 0 +40207dcb: e2c8 l32i.n a12, a2, 56 +40207dcd: f109 s32i.n a0, a1, 60 +40207dcf: d1d9 s32i.n a13, a1, 52 +40207dd1: c1e9 s32i.n a14, a1, 48 +40207dd3: b1f9 s32i.n a15, a1, 44 +40207dd5: 004132 s8i a3, a1, 0 +40207dd8: 4ccc bnez.n a12, 40207de0 +40207dda: 020c movi.n a2, 0 +40207ddc: 003106 j 40207ea4 +40207ddf: 0cd200 excw +40207de2: a02201 l32r a0, 401efe6c <_lit4_end+0xe9b40> +40207de5: d709 s32i.n a0, a7, 52 +40207de7: 22f0a2 excw +40207dea: 030c movi.n a3, 0 +40207dec: 020c32 l8ui a3, a12, 2 +40207def: 112280 slli a2, a2, 8 +40207df2: 202320 or a2, a3, a2 +40207df5: e11266 bnei a2, 1, 40207dda +40207df8: e75be1 l32r a14, 40201b64 +40207dfb: 03a022 movi a2, 3 +40207dfe: 02dee2 addmi a14, a14, 0x200 +40207e01: 3c4e22 s8i a2, a14, 60 +40207e04: 013d mov.n a3, a1 +40207e06: 2c4b addi.n a2, a12, 4 +40207e08: ff63c5 call0 40207448 +40207e0b: 404e22 s8i a2, a14, 64 +40207e0e: 090c42 l8ui a4, a12, 9 +40207e11: f8cdd2 addi a13, a13, -8 +40207e14: 112480 slli a2, a4, 8 +40207e17: 080c42 l8ui a4, a12, 8 +40207e1a: 0f0c movi.n a15, 0 +40207e1c: 204420 or a4, a4, a2 +40207e1f: ccab addi.n a12, a12, 10 +40207e21: 24bf47 bgeu a15, a4, 40207e49 +40207e24: 212da6 blti a13, 2, 40207e49 +40207e27: 013d mov.n a3, a1 +40207e29: 0c2d mov.n a2, a12 +40207e2b: 066142 s32i a4, a1, 24 +40207e2e: ff6185 call0 40207448 +40207e31: 3e0e32 l8ui a3, a14, 62 +40207e34: 6148 l32i.n a4, a1, 24 +40207e36: 0223f6 bgeui a3, 2, 40207e3c +40207e39: 3e4e22 s8i a2, a14, 62 +40207e3c: ff1b addi.n a15, a15, 1 +40207e3e: fccdd2 addi a13, a13, -4 +40207e41: cc4b addi.n a12, a12, 4 +40207e43: f4f0f0 extui a15, a15, 0, 16 +40207e46: fff5c6 j 40207e21 +40207e49: 8d1da6 blti a13, 1, 40207dda +40207e4c: 010c32 l8ui a3, a12, 1 +40207e4f: fecdd2 addi a13, a13, -2 +40207e52: 112380 slli a2, a3, 8 +40207e55: 000c32 l8ui a3, a12, 0 +40207e58: 0f0c movi.n a15, 0 +40207e5a: 203320 or a3, a3, a2 +40207e5d: cc2b addi.n a12, a12, 2 +40207e5f: 540c movi.n a4, 5 +40207e61: 450c movi.n a5, 4 +40207e63: 01a022 movi a2, 1 +40207e66: 022de6 bgei a13, 2, 40207e6c +40207e69: 00a022 movi a2, 0 +40207e6c: 742020 extui a2, a2, 0, 8 +40207e6f: 31bf37 bgeu a15, a3, 40207ea4 +40207e72: 02e216 beqz a2, 40207ea4 +40207e75: 202cc0 or a2, a12, a12 +40207e78: 046132 s32i a3, a1, 16 +40207e7b: 6149 s32i.n a4, a1, 24 +40207e7d: 5159 s32i.n a5, a1, 20 +40207e7f: ff6385 call0 402074b8 +40207e82: 4138 l32i.n a3, a1, 16 +40207e84: 6148 l32i.n a4, a1, 24 +40207e86: 5158 l32i.n a5, a1, 20 +40207e88: 051266 bnei a2, 1, 40207e91 +40207e8b: 3d4e52 s8i a5, a14, 61 +40207e8e: 000146 j 40207e97 +40207e91: 022266 bnei a2, 2, 40207e97 +40207e94: 3d4e42 s8i a4, a14, 61 +40207e97: ff1b addi.n a15, a15, 1 +40207e99: cc4b addi.n a12, a12, 4 +40207e9b: fccdd2 addi a13, a13, -4 +40207e9e: f4f0f0 extui a15, a15, 0, 16 +40207ea1: ffef86 j 40207e63 +40207ea4: f108 l32i.n a0, a1, 60 +40207ea6: e1c8 l32i.n a12, a1, 56 +40207ea8: d1d8 l32i.n a13, a1, 52 +40207eaa: c1e8 l32i.n a14, a1, 48 +40207eac: b1f8 l32i.n a15, a1, 44 +40207eae: 40c112 addi a1, a1, 64 +40207eb1: f00d ret.n + ... + +40207eb4 : +40207eb4: e72c31 l32r a3, 40201b64 +40207eb7: d0c112 addi a1, a1, -48 +40207eba: b109 s32i.n a0, a1, 44 +40207ebc: a1c9 s32i.n a12, a1, 40 +40207ebe: 91d9 s32i.n a13, a1, 36 +40207ec0: 81e9 s32i.n a14, a1, 32 +40207ec2: 71f9 s32i.n a15, a1, 28 +40207ec4: 02d332 addmi a3, a3, 0x200 +40207ec7: 3d0342 l8ui a4, a3, 61 +40207eca: fcc452 addi a5, a4, -4 +40207ecd: 745050 extui a5, a5, 0, 8 +40207ed0: 1825b6 bltui a5, 2, 40207eec +40207ed3: f9c452 addi a5, a4, -7 +40207ed6: 745050 extui a5, a5, 0, 8 +40207ed9: 0f35b6 bltui a5, 3, 40207eec +40207edc: fec452 addi a5, a4, -2 +40207edf: 745050 extui a5, a5, 0, 8 +40207ee2: 0225f6 bgeui a5, 2, 40207ee8 +40207ee5: 0032c6 j 40207fb4 +40207ee8: 003146 j 40207fb1 +40207eeb: e2c800 excw +40207eee: 3ccc bnez.n a12, 40207ef5 +40207ef0: 020c movi.n a2, 0 +40207ef2: 004e46 j 4020802f +40207ef5: 010ce2 l8ui a14, a12, 1 +40207ef8: f42eb6 bltui a14, 2, 40207ef0 +40207efb: 030c22 l8ui a2, a12, 3 +40207efe: 020c42 l8ui a4, a12, 2 +40207f01: 112280 slli a2, a2, 8 +40207f04: 202420 or a2, a4, a2 +40207f07: e51266 bnei a2, 1, 40207ef0 +40207f0a: fece42 addi a4, a14, -2 +40207f0d: 744040 extui a4, a4, 0, 8 +40207f10: 04cc22 addi a2, a12, 4 +40207f13: d944b6 bltui a4, 4, 40207ef0 +40207f16: 4003d2 l8ui a13, a3, 64 +40207f19: 00a032 movi a3, 0 +40207f1c: ff5285 call0 40207448 +40207f1f: cd9d27 bne a13, a2, 40207ef0 +40207f22: face22 addi a2, a14, -6 +40207f25: 742020 extui a2, a2, 0, 8 +40207f28: c422b6 bltui a2, 2, 40207ef0 +40207f2b: 090c32 l8ui a3, a12, 9 +40207f2e: f8cee2 addi a14, a14, -8 +40207f31: 112380 slli a2, a3, 8 +40207f34: 080c32 l8ui a3, a12, 8 +40207f37: 74e0e0 extui a14, a14, 0, 8 +40207f3a: 203320 or a3, a3, a2 +40207f3d: 113300 slli a3, a3, 16 +40207f40: 31d030 srai a13, a3, 16 +40207f43: f4f0d0 extui a15, a13, 0, 16 +40207f46: ccab addi.n a12, a12, 10 +40207f48: 040c movi.n a4, 0 +40207f4a: a24eb6 bltui a14, 4, 40207ef0 +40207f4d: 1314f7 beq a4, a15, 40207f64 +40207f50: 030c movi.n a3, 0 +40207f52: 0c2d mov.n a2, a12 +40207f54: 0149 s32i.n a4, a1, 0 +40207f56: ff4f05 call0 40207448 +40207f59: 0148 l32i.n a4, a1, 0 +40207f5b: 441b addi.n a4, a4, 1 +40207f5d: f44040 extui a4, a4, 0, 16 +40207f60: fffa46 j 40207f4d +40207f63: 3da000 excw +40207f66: 33d011 l32r a1, 401d4ea8 <_lit4_end+0xceb7c> +40207f69: 33e0c0 excw +40207f6c: 3030a0 xor a3, a0, a10 +40207f6f: cfc074 excw +40207f72: 1366a0 excw +40207f75: dd8602 excw +40207f78: ff .byte 0xff +40207f79: 010c42 l8ui a4, a12, 1 +40207f7c: 112480 slli a2, a4, 8 +40207f7f: 000c42 l8ui a4, a12, 0 +40207f82: 204420 or a4, a4, a2 +40207f85: fec322 addi a2, a3, -2 +40207f88: fdc332 addi a3, a3, -3 +40207f8b: 743030 extui a3, a3, 0, 8 +40207f8e: 742020 extui a2, a2, 0, 8 +40207f91: 0233f6 bgeui a3, 3, 40207f97 +40207f94: ffd606 j 40207ef0 +40207f97: 030c movi.n a3, 0 +40207f99: f28c beqz.n a2, 40207fac +40207f9b: 0db347 bgeu a3, a4, 40207fac +40207f9e: fcc222 addi a2, a2, -4 +40207fa1: 331b addi.n a3, a3, 1 +40207fa3: 742020 extui a2, a2, 0, 8 +40207fa6: f43030 extui a3, a3, 0, 16 +40207fa9: fffb06 j 40207f99 +40207fac: 120c movi.n a2, 1 +40207fae: 001f46 j 4020802f +40207fb1: 4c6466 bnei a4, 6, 40208001 +40207fb4: 0d22c2 l32i a12, a2, 52 +40207fb7: f35c16 beqz a12, 40207ef0 +40207fba: 070c22 l8ui a2, a12, 7 +40207fbd: 060c42 l8ui a4, a12, 6 +40207fc0: 112280 slli a2, a2, 8 +40207fc3: 202420 or a2, a4, a2 +40207fc6: 021226 beqi a2, 1, 40207fcc +40207fc9: ffc8c6 j 40207ef0 +40207fcc: 4003d2 l8ui a13, a3, 64 +40207fcf: 08cc22 addi a2, a12, 8 +40207fd2: 030c movi.n a3, 0 +40207fd4: ff3f05 call0 402073c8 +40207fd7: 021d27 beq a13, a2, 40207fdd +40207fda: ffc486 j 40207ef0 +40207fdd: 0d0cd2 l8ui a13, a12, 13 +40207fe0: 0e0c movi.n a14, 0 +40207fe2: 112d80 slli a2, a13, 8 +40207fe5: 0c0cd2 l8ui a13, a12, 12 +40207fe8: cceb addi.n a12, a12, 14 +40207fea: 20dd20 or a13, a13, a2 +40207fed: bb1ed7 beq a14, a13, 40207fac +40207ff0: 0c2d mov.n a2, a12 +40207ff2: 030c movi.n a3, 0 +40207ff4: ee1b addi.n a14, a14, 1 +40207ff6: ff3d05 call0 402073c8 +40207ff9: f4e0e0 extui a14, a14, 0, 16 +40207ffc: cc4b addi.n a12, a12, 4 +40207ffe: fffac6 j 40207fed +40208001: 031222 l16ui a2, a2, 6 +40208004: 146247 bbci a2, 4, 4020801c +40208007: 3e0332 l8ui a3, a3, 62 +4020800a: 120c movi.n a2, 1 +4020800c: f9c332 addi a3, a3, -7 +4020800f: 743030 extui a3, a3, 0, 8 +40208012: 1623b6 bltui a3, 2, 4020802c +40208015: 020c movi.n a2, 0 +40208017: 000446 j 4020802c +4020801a: 210000 srai a0, a0, 0 +4020801d: fb6b addi.n a15, a11, 6 +4020801f: 140c movi.n a4, 1 +40208021: 000222 l8ui a2, a2, 0 +40208024: 343020 extui a3, a2, 0, 4 +40208027: 020c movi.n a2, 0 +40208029: 832430 moveqz a2, a4, a3 +4020802c: 742020 extui a2, a2, 0, 8 +4020802f: b108 l32i.n a0, a1, 44 +40208031: a1c8 l32i.n a12, a1, 40 +40208033: 91d8 l32i.n a13, a1, 36 +40208035: 81e8 l32i.n a14, a1, 32 +40208037: 71f8 l32i.n a15, a1, 28 +40208039: 30c112 addi a1, a1, 48 +4020803c: f00d ret.n +4020803e: 700000 excw +40208041: 402304 excw + +40208044 : +40208044: 025d mov.n a5, a2 +40208046: 1328 l32i.n a2, a3, 4 +40208048: f0c112 addi a1, a1, -16 +4020804b: 1248 l32i.n a4, a2, 4 +4020804d: 21c9 s32i.n a12, a1, 8 +4020804f: 0b13c2 l16ui a12, a3, 22 +40208052: 11d9 s32i.n a13, a1, 4 +40208054: 3109 s32i.n a0, a1, 12 +40208056: 24ab addi.n a2, a4, 10 +40208058: 18c4d2 addi a13, a4, 24 +4020805b: 042cf6 bgeui a12, 2, 40208063 +4020805e: f37c movi.n a3, -1 +40208060: 001986 j 402080ca +40208063: 010432 l8ui a3, a4, 1 +40208066: 066367 bbci a3, 6, 40208070 +40208069: fff531 l32r a3, 40208040 +4020806c: 1338 l32i.n a3, a3, 4 +4020806e: dd3a add.n a13, a13, a3 +40208070: 000d62 l8ui a6, a13, 0 +40208073: 7fa042 movi a4, 127 +40208076: 030c movi.n a3, 0 +40208078: 4e1647 beq a6, a4, 402080ca +4020807b: 242532 l32i a3, a5, 144 +4020807e: a3cc bnez.n a3, 4020808c +40208080: 000d22 l8ui a2, a13, 0 +40208083: 153226 beqi a2, 3, 4020809c +40208086: 337226 beqi a2, 7, 402080bd +40208089: 000ec6 j 402080c8 +4020808c: 640c movi.n a4, 6 +4020808e: e6e301 l32r a0, 40201c1c +40208091: 0000c0 callx0 a0 +40208094: fc6256 bnez a2, 4020805e +40208097: fff946 j 40208080 +4020809a: 220000 excw +4020809d: 010d mov.n a0, a1 +4020809f: 071226 beqi a2, 1, 402080aa +402080a2: 428c beqz.n a2, 402080aa +402080a4: 0c2226 beqi a2, 2, 402080b4 +402080a7: 000746 j 402080c8 +402080aa: 820c movi.n a2, 8 +402080ac: aeb2c7 bgeu a2, a12, 4020805e +402080af: 000546 j 402080c8 +402080b2: b60000 excw +402080b5: a66c movi.n a6, -22 +402080b7: 000346 j 402080c8 +402080ba: 000000 ill +402080bd: 010d22 l8ui a2, a13, 1 +402080c0: 128c beqz.n a2, 402080c5 +402080c2: 021266 bnei a2, 1, 402080c8 +402080c5: 952c26 beqi a12, 2, 4020805e +402080c8: 030c movi.n a3, 0 +402080ca: 3108 l32i.n a0, a1, 12 +402080cc: 032d mov.n a2, a3 +402080ce: 21c8 l32i.n a12, a1, 8 +402080d0: 11d8 l32i.n a13, a1, 4 +402080d2: 10c112 addi a1, a1, 16 +402080d5: f00d ret.n +402080d7: 87a000 excw +402080da: fe .byte 0xfe +402080db: 3f .byte 0x3f + +402080dc : +402080dc: f0c112 addi a1, a1, -16 +402080df: 21c9 s32i.n a12, a1, 8 +402080e1: 01e9 s32i.n a14, a1, 0 +402080e3: 02cd mov.n a12, a2 +402080e5: 74e030 extui a14, a3, 0, 8 +402080e8: ddaf22 movi a2, -35 +402080eb: fffb31 l32r a3, 402080d8 +402080ee: 11d9 s32i.n a13, a1, 4 +402080f0: 004c22 s8i a2, a12, 0 +402080f3: 74d040 extui a13, a4, 0, 8 +402080f6: 014c52 s8i a5, a12, 1 +402080f9: 2c2b addi.n a2, a12, 2 +402080fb: 340c movi.n a4, 3 +402080fd: 3109 s32i.n a0, a1, 12 +402080ff: e3c501 l32r a0, 40201014 <_irom0_text_start+0x4> +40208102: 0000c0 callx0 a0 +40208105: 3108 l32i.n a0, a1, 12 +40208107: 054ce2 s8i a14, a12, 5 +4020810a: 064cd2 s8i a13, a12, 6 +4020810d: 2c7b addi.n a2, a12, 7 +4020810f: 11d8 l32i.n a13, a1, 4 +40208111: 21c8 l32i.n a12, a1, 8 +40208113: 01e8 l32i.n a14, a1, 0 +40208115: 10c112 addi a1, a1, 16 +40208118: f00d ret.n + ... + +4020811c : +4020811c: d0c112 addi a1, a1, -48 +4020811f: 91d9 s32i.n a13, a1, 36 +40208121: 3001d2 l8ui a13, a1, 48 +40208124: 81e9 s32i.n a14, a1, 32 +40208126: 07ed mov.n a14, a7 +40208128: 747050 extui a7, a5, 0, 8 +4020812b: 5d9b addi.n a5, a13, 9 +4020812d: 749030 extui a9, a3, 0, 8 +40208130: 748040 extui a8, a4, 0, 8 +40208133: 745050 extui a5, a5, 0, 8 +40208136: 140c movi.n a4, 1 +40208138: 530c movi.n a3, 5 +4020813a: a1c9 s32i.n a12, a1, 40 +4020813c: 71f9 s32i.n a15, a1, 28 +4020813e: 02cd mov.n a12, a2 +40208140: 74f060 extui a15, a6, 0, 8 +40208143: 2179 s32i.n a7, a1, 8 +40208145: 1189 s32i.n a8, a1, 4 +40208147: 0199 s32i.n a9, a1, 0 +40208149: b109 s32i.n a0, a1, 44 +4020814b: fff905 call0 402080dc +4020814e: 0198 l32i.n a9, a1, 0 +40208150: 1188 l32i.n a8, a1, 4 +40208152: 2178 l32i.n a7, a1, 8 +40208154: 074c92 s8i a9, a12, 7 +40208157: 084c82 s8i a8, a12, 8 +4020815a: 094c72 s8i a7, a12, 9 +4020815d: 0a4cf2 s8i a15, a12, 10 +40208160: ce8c beqz.n a14, 40208170 +40208162: ad8c beqz.n a13, 40208170 +40208164: 0d4d mov.n a4, a13 +40208166: 0e3d mov.n a3, a14 +40208168: 2cbb addi.n a2, a12, 11 +4020816a: e3aa01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020816d: 0000c0 callx0 a0 +40208170: b108 l32i.n a0, a1, 44 +40208172: 2dbb addi.n a2, a13, 11 +40208174: 2c2a add.n a2, a12, a2 +40208176: 91d8 l32i.n a13, a1, 36 +40208178: a1c8 l32i.n a12, a1, 40 +4020817a: 81e8 l32i.n a14, a1, 32 +4020817c: 71f8 l32i.n a15, a1, 28 +4020817e: 30c112 addi a1, a1, 48 +40208181: f00d ret.n + ... + +40208184 : +40208184: e0c112 addi a1, a1, -32 +40208187: 0561d2 s32i a13, a1, 20 +4020818a: 0461e2 s32i a14, a1, 16 +4020818d: 0361f2 s32i a15, a1, 12 +40208190: 74e040 extui a14, a4, 0, 8 +40208193: 74f030 extui a15, a3, 0, 8 +40208196: f4d050 extui a13, a5, 0, 16 +40208199: 140c movi.n a4, 1 +4020819b: 950c movi.n a5, 9 +4020819d: 330c movi.n a3, 3 +4020819f: 7109 s32i.n a0, a1, 28 +402081a1: 61c9 s32i.n a12, a1, 24 +402081a3: 02cd mov.n a12, a2 +402081a5: fff345 call0 402080dc +402081a8: 7108 l32i.n a0, a1, 28 +402081aa: 094cd2 s8i a13, a12, 9 +402081ad: 41d8d0 srli a13, a13, 8 +402081b0: 074cf2 s8i a15, a12, 7 +402081b3: 084ce2 s8i a14, a12, 8 +402081b6: 0a4cd2 s8i a13, a12, 10 +402081b9: 2cbb addi.n a2, a12, 11 +402081bb: 51d8 l32i.n a13, a1, 20 +402081bd: 61c8 l32i.n a12, a1, 24 +402081bf: 41e8 l32i.n a14, a1, 16 +402081c1: 31f8 l32i.n a15, a1, 12 +402081c3: 20c112 addi a1, a1, 32 +402081c6: f00d ret.n + +402081c8 : +402081c8: f0c112 addi a1, a1, -16 +402081cb: 0261c2 s32i a12, a1, 8 +402081ce: 74c040 extui a12, a4, 0, 8 +402081d1: 07cc52 addi a5, a12, 7 +402081d4: 0061e2 s32i a14, a1, 0 +402081d7: 745050 extui a5, a5, 0, 8 +402081da: 03ed mov.n a14, a3 +402081dc: 140c movi.n a4, 1 +402081de: 630c movi.n a3, 6 +402081e0: 3109 s32i.n a0, a1, 12 +402081e2: 11d9 s32i.n a13, a1, 4 +402081e4: 02dd mov.n a13, a2 +402081e6: ffef45 call0 402080dc +402081e9: 020c movi.n a2, 0 +402081eb: 074d22 s8i a2, a13, 7 +402081ee: 084dc2 s8i a12, a13, 8 +402081f1: 0c4d mov.n a4, a12 +402081f3: 0e3d mov.n a3, a14 +402081f5: 2d9b addi.n a2, a13, 9 +402081f7: e38701 l32r a0, 40201014 <_irom0_text_start+0x4> +402081fa: 0000c0 callx0 a0 +402081fd: 3108 l32i.n a0, a1, 12 +402081ff: 2c9b addi.n a2, a12, 9 +40208201: 2d2a add.n a2, a13, a2 +40208203: 21c8 l32i.n a12, a1, 8 +40208205: 11d8 l32i.n a13, a1, 4 +40208207: 01e8 l32i.n a14, a1, 0 +40208209: 10c112 addi a1, a1, 16 +4020820c: f00d ret.n + ... + +40208210 : +40208210: e0c112 addi a1, a1, -32 +40208213: 0661c2 s32i a12, a1, 24 +40208216: 74c050 extui a12, a5, 0, 8 +40208219: 08cc52 addi a5, a12, 8 +4020821c: 0461e2 s32i a14, a1, 16 +4020821f: 31f9 s32i.n a15, a1, 12 +40208221: 04ed mov.n a14, a4 +40208223: 03fd mov.n a15, a3 +40208225: 140c movi.n a4, 1 +40208227: dda032 movi a3, 221 +4020822a: 745050 extui a5, a5, 0, 8 +4020822d: 51d9 s32i.n a13, a1, 20 +4020822f: 7109 s32i.n a0, a1, 28 +40208231: 02dd mov.n a13, a2 +40208233: ffea85 call0 402080dc +40208236: 340c movi.n a4, 3 +40208238: 0f3d mov.n a3, a15 +4020823a: 2d7b addi.n a2, a13, 7 +4020823c: e37601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020823f: 0000c0 callx0 a0 +40208242: cc8c beqz.n a12, 40208252 +40208244: ae8c beqz.n a14, 40208252 +40208246: 0c4d mov.n a4, a12 +40208248: 0e3d mov.n a3, a14 +4020824a: 2dab addi.n a2, a13, 10 +4020824c: e37201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020824f: 0000c0 callx0 a0 +40208252: 7108 l32i.n a0, a1, 28 +40208254: 2cab addi.n a2, a12, 10 +40208256: 2d2a add.n a2, a13, a2 +40208258: 61c8 l32i.n a12, a1, 24 +4020825a: 51d8 l32i.n a13, a1, 20 +4020825c: 41e8 l32i.n a14, a1, 16 +4020825e: 31f8 l32i.n a15, a1, 12 +40208260: 20c112 addi a1, a1, 32 +40208263: f00d ret.n +40208265: 000000 ill +40208268: 230207 bnone a2, a0, 4020828f +4020826b: c11240 mul16u a1, a2, a4 +4020826e: d1d9c0 mul16s a13, a9, a12 +40208271: c1e9 s32i.n a14, a1, 48 +40208273: b1f9 s32i.n a15, a1, 44 +40208275: 02ed mov.n a14, a2 +40208277: f109 s32i.n a0, a1, 60 +40208279: e1c9 s32i.n a12, a1, 56 +4020827b: 036d mov.n a6, a3 +4020827d: 04fd mov.n a15, a4 +4020827f: 05dd mov.n a13, a5 +40208281: 120c movi.n a2, 1 +40208283: 141e16 beqz a14, 402083c8 +40208286: 242e32 l32i a3, a14, 144 +40208289: 13b316 beqz a3, 402083c8 +4020828c: 940c movi.n a4, 9 +4020828e: 831c movi.n a3, 24 +40208290: 012d mov.n a2, a1 +40208292: 4169 s32i.n a6, a1, 16 +40208294: fde245 call0 402060bc +40208297: 02cd mov.n a12, a2 +40208299: 4168 l32i.n a6, a1, 16 +4020829b: 11e216 beqz a2, 402083bd +4020829e: 0128 l32i.n a2, a1, 0 +402082a0: 321b addi.n a3, a2, 1 +402082a2: 0139 s32i.n a3, a1, 0 +402082a4: 004262 s8i a6, a2, 0 +402082a7: 0128 l32i.n a2, a1, 0 +402082a9: 321b addi.n a3, a2, 1 +402082ab: 0139 s32i.n a3, a1, 0 +402082ad: 0042f2 s8i a15, a2, 0 +402082b0: 0128 l32i.n a2, a1, 0 +402082b2: 321b addi.n a3, a2, 1 +402082b4: 0139 s32i.n a3, a1, 0 +402082b6: 001d32 l16ui a3, a13, 0 +402082b9: 004232 s8i a3, a2, 0 +402082bc: 181f66 bnei a15, 1, 402082d8 +402082bf: 0128 l32i.n a2, a1, 0 +402082c1: 011d32 l16ui a3, a13, 2 +402082c4: 004232 s8i a3, a2, 0 +402082c7: 011d22 l16ui a2, a13, 2 +402082ca: 0138 l32i.n a3, a1, 0 +402082cc: 412820 srli a2, a2, 8 +402082cf: 014322 s8i a2, a3, 1 +402082d2: 0128 l32i.n a2, a1, 0 +402082d4: 222b addi.n a2, a2, 2 +402082d6: 0129 s32i.n a2, a1, 0 +402082d8: 0128 l32i.n a2, a1, 0 +402082da: 021d32 l16ui a3, a13, 4 +402082dd: 004232 s8i a3, a2, 0 +402082e0: 021d22 l16ui a2, a13, 4 +402082e3: 0138 l32i.n a3, a1, 0 +402082e5: 412820 srli a2, a2, 8 +402082e8: 014322 s8i a2, a3, 1 +402082eb: 0128 l32i.n a2, a1, 0 +402082ed: 322b addi.n a3, a2, 2 +402082ef: 0139 s32i.n a3, a1, 0 +402082f1: 031d32 l16ui a3, a13, 6 +402082f4: 024232 s8i a3, a2, 2 +402082f7: 031d22 l16ui a2, a13, 6 +402082fa: 0138 l32i.n a3, a1, 0 +402082fc: 412820 srli a2, a2, 8 +402082ff: 014322 s8i a2, a3, 1 +40208302: 0128 l32i.n a2, a1, 0 +40208304: 322b addi.n a3, a2, 2 +40208306: 0139 s32i.n a3, a1, 0 +40208308: 5fdc bnez.n a15, 40208321 +4020830a: 041d32 l16ui a3, a13, 8 +4020830d: 024232 s8i a3, a2, 2 +40208310: 041d22 l16ui a2, a13, 8 +40208313: 0138 l32i.n a3, a1, 0 +40208315: 412820 srli a2, a2, 8 +40208318: 014322 s8i a2, a3, 1 +4020831b: 0128 l32i.n a2, a1, 0 +4020831d: 222b addi.n a2, a2, 2 +4020831f: 0129 s32i.n a2, a1, 0 +40208321: 18a022 movi a2, 24 +40208324: 0a5c22 s16i a2, a12, 20 +40208327: 012c22 l32i a2, a12, 4 +4020832a: 092c42 l32i a4, a12, 36 +4020832d: 1228 l32i.n a2, a2, 4 +4020832f: e60d51 l32r a5, 40201b64 +40208332: 18c232 addi a3, a2, 24 +40208335: 0128 l32i.n a2, a1, 0 +40208337: 070c movi.n a7, 0 +40208339: c02230 sub a2, a2, a3 +4020833c: 0438 l32i.n a3, a4, 0 +4020833e: 0b5c22 s16i a2, a12, 22 +40208341: 416630 srli a6, a3, 6 +40208344: 021c movi.n a2, 16 +40208346: 202620 or a2, a6, a2 +40208349: 1122a0 slli a2, a2, 6 +4020834c: 543030 extui a3, a3, 0, 6 +4020834f: 203320 or a3, a3, a2 +40208352: 4528 l32i.n a2, a5, 16 +40208354: 180c movi.n a8, 1 +40208356: c022e0 sub a2, a2, a14 +40208359: 838720 moveqz a8, a7, a2 +4020835c: 1498 l32i.n a9, a4, 4 +4020835e: 742080 extui a2, a8, 0, 8 +40208361: e80281 l32r a8, 4020236c +40208364: 0439 s32i.n a3, a4, 0 +40208366: 108980 and a8, a9, a8 +40208369: 097c movi.n a9, -16 +4020836b: 109890 and a9, a8, a9 +4020836e: 780c movi.n a8, 7 +40208370: 208980 or a8, a9, a8 +40208373: 1489 s32i.n a8, a4, 4 +40208375: e7fe81 l32r a8, 40202370 +40208378: c97c movi.n a9, -4 +4020837a: 0020c0 memw +4020837d: 0888 l32i.n a8, a8, 0 +4020837f: 103390 and a3, a3, a9 +40208382: 6489 s32i.n a8, a4, 24 +40208384: 1182f0 slli a8, a2, 1 +40208387: 203380 or a3, a3, a8 +4020838a: 0439 s32i.n a3, a4, 0 +4020838c: 242e32 l32i a3, a14, 144 +4020838f: 05dd mov.n a13, a5 +40208391: 0d1332 l16ui a3, a3, 26 +40208394: 0a1377 beq a3, a7, 402083a2 +40208397: 07e617 bbsi a6, 1, 402083a2 +4020839a: 1aa345 call0 40222dd0 +4020839d: 7c29 s32i.n a2, a12, 28 +4020839f: 000086 j 402083a5 +402083a2: 076c72 s32i a7, a12, 28 +402083a5: 7d0d32 l8ui a3, a13, 125 +402083a8: 092c22 l32i a2, a12, 36 +402083ab: d0a042 movi a4, 208 +402083ae: 084232 s8i a3, a2, 8 +402083b1: 203cc0 or a3, a12, a12 +402083b4: 0e2d mov.n a2, a14 +402083b6: fa4d85 call0 40202890 +402083b9: 0002c6 j 402083c8 +402083bc: aa2100 excw +402083bf: ff .byte 0xff +402083c0: e72301 l32r a0, 4020204c +402083c3: 0000c0 callx0 a0 +402083c6: 120c movi.n a2, 1 +402083c8: f108 l32i.n a0, a1, 60 +402083ca: e1c8 l32i.n a12, a1, 56 +402083cc: d1d8 l32i.n a13, a1, 52 +402083ce: c1e8 l32i.n a14, a1, 48 +402083d0: b1f8 l32i.n a15, a1, 44 +402083d2: 40c112 addi a1, a1, 64 +402083d5: f00d ret.n +402083d7: c11200 mul16u a1, a2, a0 +402083da: 7109e0 excw +402083dd: 130c movi.n a3, 1 +402083df: 061216 beqz a2, 40208444 +402083e2: 242252 l32i a5, a2, 144 +402083e5: 05b516 beqz a5, 40208444 +402083e8: 030452 l8ui a5, a4, 3 +402083eb: 040432 l8ui a3, a4, 4 +402083ee: 020442 l8ui a4, a4, 2 +402083f1: 113380 slli a3, a3, 8 +402083f4: 005142 s16i a4, a1, 0 +402083f7: 142242 l32i a4, a2, 80 +402083fa: 203530 or a3, a5, a3 +402083fd: 345230 extui a5, a3, 2, 4 +40208400: 413630 srli a3, a3, 6 +40208403: 1164a7 bbci a4, 10, 40208418 +40208406: e5d741 l32r a4, 40201b64 +40208409: 05d442 addmi a4, a4, 0x500 +4020840c: 102442 l32i a4, a4, 64 +4020840f: 057457 bbci a4, 21, 40208418 +40208412: 040c movi.n a4, 0 +40208414: 0000c6 j 4020841b +40208417: a04200 addx4 a4, a2, a0 +4020841a: 514201 l32r a0, 401dc924 <_lit4_end+0xd65f8> +4020841d: 33a001 l32r a0, 401d52a0 <_lit4_end+0xcef74> +40208420: a04211 l32r a1, 401f0528 <_lit4_end+0xea1fc> +40208423: 55e002 excw +40208426: 334011 l32r a1, 401d5128 <_lit4_end+0xcedfc> +40208429: 353020 extui a3, a2, 16, 4 +4020842c: 513220 excw +4020842f: a03202 excw +40208432: 513200 excw +40208435: 513203 excw +40208438: 015d04 excw +4020843b: 330c movi.n a3, 3 +4020843d: 140c movi.n a4, 1 +4020843f: 031ac5 call0 4020b5ec +40208442: 030c movi.n a3, 0 +40208444: 7108 l32i.n a0, a1, 28 +40208446: 032d mov.n a2, a3 +40208448: 20c112 addi a1, a1, 32 +4020844b: f00d ret.n +4020844d: 000000 ill +40208450: 060000 excw +40208453: c11200 mul16u a1, a2, a0 +40208456: 11d9f0 slli a13, a9, 1 +40208459: 641c movi.n a4, 22 +4020845b: 03dd mov.n a13, a3 +4020845d: 030c movi.n a3, 0 +4020845f: 3109 s32i.n a0, a1, 12 +40208461: 21c9 s32i.n a12, a1, 8 +40208463: 02cd mov.n a12, a2 +40208465: e2ea01 l32r a0, 40201010 <_irom0_text_start> +40208468: 0000c0 callx0 a0 +4020846b: 352d22 l32i a2, a13, 212 +4020846e: f9b805 call0 40201ff0 +40208471: 004c22 s8i a2, a12, 0 +40208474: e5bc21 l32r a2, 40201b64 +40208477: 05d222 addmi a2, a2, 0x500 +4020847a: 102222 l32i a2, a2, 64 +4020847d: 0472d7 bbci a2, 29, 40208485 +40208480: 820c movi.n a2, 8 +40208482: 000046 j 40208487 +40208485: 020c movi.n a2, 0 +40208487: 014c22 s8i a2, a12, 1 +4020848a: 352d22 l32i a2, a13, 212 +4020848d: 0228 l32i.n a2, a2, 0 +4020848f: 097217 bbci a2, 17, 4020849c +40208492: 010c32 l8ui a3, a12, 1 +40208495: 120c movi.n a2, 1 +40208497: 000246 j 402084a4 +4020849a: 270000 excw +4020849d: 320a72 l8ui a7, a10, 50 +402084a0: 010c movi.n a1, 0 +402084a2: 320c movi.n a2, 3 +402084a4: 202320 or a2, a3, a2 +402084a7: 014c22 s8i a2, a12, 1 +402084aa: 352d22 l32i a2, a13, 212 +402084ad: 0238 l32i.n a3, a2, 0 +402084af: ffe821 l32r a2, 40208450 +402084b2: 0a0327 bnone a3, a2, 402084c0 +402084b5: 010c32 l8ui a3, a12, 1 +402084b8: 420c movi.n a2, 4 +402084ba: 202320 or a2, a3, a2 +402084bd: 014c22 s8i a2, a12, 1 +402084c0: dd0d22 l8ui a2, a13, 221 +402084c3: e0a052 movi a5, 224 +402084c6: 024c22 s8i a2, a12, 2 +402084c9: 7c6b addi.n a7, a12, 6 +402084cb: 0d4d mov.n a4, a13 +402084cd: 5d5a add.n a5, a13, a5 +402084cf: 180c movi.n a8, 1 +402084d1: 000522 l8ui a2, a5, 0 +402084d4: c034d0 sub a3, a4, a13 +402084d7: 2ba327 bge a3, a2, 40208506 +402084da: e10432 l8ui a3, a4, 225 +402084dd: 416730 srli a6, a3, 7 +402084e0: 642030 extui a2, a3, 0, 7 +402084e3: a69c beqz.n a6, 40208501 +402084e5: 81c262 addi a6, a2, -127 +402084e8: 569c beqz.n a6, 40208501 +402084ea: 212320 srai a2, a2, 3 +402084ed: 272a add.n a2, a7, a2 +402084ef: 000262 l8ui a6, a2, 0 +402084f2: 243030 extui a3, a3, 0, 3 +402084f5: 401300 ssl a3 +402084f8: a13800 sll a3, a8 +402084fb: 203360 or a3, a3, a6 +402084fe: 004232 s8i a3, a2, 0 +40208501: 441b addi.n a4, a4, 1 +40208503: fff286 j 402084d1 +40208506: 3108 l32i.n a0, a1, 12 +40208508: 16cc22 addi a2, a12, 22 +4020850b: 11d8 l32i.n a13, a1, 4 +4020850d: 21c8 l32i.n a12, a1, 8 +4020850f: 10c112 addi a1, a1, 16 +40208512: f00d ret.n +40208514: 040000 extui a0, a0, 0, 1 +40208517: 000000 ill +4020851a: 000030 excw +4020851d: 00c000 excw +40208520: 020000 excw +40208523: ffff00 excw +40208526: fff8 l32i.n a15, a15, 60 +40208528: d0c112 addi a1, a1, -48 +4020852b: 91d9 s32i.n a13, a1, 36 +4020852d: e58dd1 l32r a13, 40201b64 +40208530: 71f9 s32i.n a15, a1, 28 +40208532: 05dd62 addmi a6, a13, 0x500 +40208535: 221672 l16ui a7, a6, 68 +40208538: 102642 l32i a4, a6, 64 +4020853b: 02fd mov.n a15, a2 +4020853d: b109 s32i.n a0, a1, 44 +4020853f: e26c movi.n a2, -18 +40208541: a1c9 s32i.n a12, a1, 40 +40208543: 81e9 s32i.n a14, a1, 32 +40208545: 038d mov.n a8, a3 +40208547: 102720 and a2, a7, a2 +4020854a: 0b7437 bbci a4, 19, 40208559 +4020854d: 752d92 l32i a9, a13, 0x1d4 +40208550: fff131 l32r a3, 40208514 +40208553: 203930 or a3, a9, a3 +40208556: 756d32 s32i a3, a13, 0x1d4 +40208559: ffef31 l32r a3, 40208518 +4020855c: 0b0437 bnone a4, a3, 4020856b +4020855f: 752d92 l32i a9, a13, 0x1d4 +40208562: f03031 l32r a3, 40204624 +40208565: 203930 or a3, a9, a3 +40208568: 756d32 s32i a3, a13, 0x1d4 +4020856b: ffec31 l32r a3, 4020851c +4020856e: 0b0437 bnone a4, a3, 4020857d +40208571: 752d92 l32i a9, a13, 0x1d4 +40208574: ffeb31 l32r a3, 40208520 +40208577: 203930 or a3, a9, a3 +4020857a: 756d32 s32i a3, a13, 0x1d4 +4020857d: 322892 l32i a9, a8, 200 +40208580: 352832 l32i a3, a8, 212 +40208583: 097956 bnez a9, 4020861e +40208586: ce6c movi.n a14, -20 +40208588: 10e7e0 and a14, a7, a14 +4020858b: 057487 bbci a4, 24, 40208594 +4020858e: 02a0e2 movi a14, 2 +40208591: 20e2e0 or a14, a2, a14 +40208594: da0892 l8ui a9, a8, 218 +40208597: 2316c2 l16ui a12, a6, 70 +4020859a: 147090 extui a7, a9, 0, 2 +4020859d: 1420c0 extui a2, a12, 0, 2 +402085a0: 01a277 bge a2, a7, 402085a5 +402085a3: 027d mov.n a7, a2 +402085a5: 1ca022 movi a2, 28 +402085a8: 41a290 srli a10, a9, 2 +402085ab: 41b2c0 srli a11, a12, 2 +402085ae: 10aa20 and a10, a10, a2 +402085b1: c21c movi.n a2, 28 +402085b3: 10cc20 and a12, a12, a2 +402085b6: 10bb20 and a11, a11, a2 +402085b9: 204220 or a4, a2, a2 +402085bc: 21c2c0 srai a12, a12, 2 +402085bf: 05aba7 bge a11, a10, 402085c8 +402085c2: 10c940 and a12, a9, a4 +402085c5: 21c2c0 srai a12, a12, 2 +402085c8: e68921 l32r a2, 40201fec +402085cb: 661327 beq a3, a2, 40208635 +402085ce: 002322 l32i a2, a3, 0 +402085d1: ffd441 l32r a4, 40208524 +402085d4: 021332 l16ui a3, a3, 4 +402085d7: 102240 and a2, a2, a4 +402085da: ffd141 l32r a4, 40208520 +402085dd: 026162 s32i a6, a1, 8 +402085e0: 204240 or a4, a2, a4 +402085e3: 0d2d mov.n a2, a13 +402085e5: 1179 s32i.n a7, a1, 4 +402085e7: 0189 s32i.n a8, a1, 0 +402085e9: 0325c5 call0 4020b848 +402085ec: ffce31 l32r a3, 40208524 +402085ef: 2168 l32i.n a6, a1, 8 +402085f1: 1178 l32i.n a7, a1, 4 +402085f3: 0188 l32i.n a8, a1, 0 +402085f5: c2fc bnez.n a2, 40208635 +402085f7: 352822 l32i a2, a8, 212 +402085fa: 0248 l32i.n a4, a2, 0 +402085fc: 103430 and a3, a4, a3 +402085ff: ffc541 l32r a4, 40208514 +40208602: 204340 or a4, a3, a4 +40208605: 021232 l16ui a3, a2, 4 +40208608: 0d2d mov.n a2, a13 +4020860a: 0323c5 call0 4020b848 +4020860d: 2168 l32i.n a6, a1, 8 +4020860f: 1178 l32i.n a7, a1, 4 +40208611: 02ec bnez.n a2, 40208635 +40208613: d27c movi.n a2, -3 +40208615: 10ee20 and a14, a14, a2 +40208618: 000646 j 40208635 +4020861b: 000000 ill +4020861e: 0348 l32i.n a4, a3, 0 +40208620: ff8c31 l32r a3, 40208450 +40208623: 2e0c movi.n a14, 2 +40208625: 20e2e0 or a14, a2, a14 +40208628: 058437 bany a4, a3, 40208631 +4020862b: ecafe2 movi a14, -20 +4020862e: 10e7e0 and a14, a7, a14 +40208631: 0c0c movi.n a12, 0 +40208633: 0c7d mov.n a7, a12 +40208635: 102622 l32i a2, a6, 64 +40208638: 032c movi.n a3, 32 +4020863a: 203e30 or a3, a14, a3 +4020863d: 05f2a7 bbsi a2, 26, 40208646 +40208640: dfaf32 movi a3, -33 +40208643: 103e30 and a3, a14, a3 +40208646: 0772b7 bbci a2, 27, 40208651 +40208649: 024c movi.n a2, 64 +4020864b: 202320 or a2, a3, a2 +4020864e: 05e317 bbsi a3, 1, 40208657 +40208651: bfaf22 movi a2, -65 +40208654: 102320 and a2, a3, a2 +40208657: 11cce0 slli a12, a12, 2 +4020865a: 20cc70 or a12, a12, a7 +4020865d: 004f22 s8i a2, a15, 0 +40208660: 024fc2 s8i a12, a15, 2 +40208663: 412820 srli a2, a2, 8 +40208666: cf3b addi.n a12, a15, 3 +40208668: 014f22 s8i a2, a15, 1 +4020866b: 030c movi.n a3, 0 +4020866d: 741c movi.n a4, 23 +4020866f: 0c2d mov.n a2, a12 +40208671: 2169 s32i.n a6, a1, 8 +40208673: e26701 l32r a0, 40201010 <_irom0_text_start> +40208676: 0000c0 callx0 a0 +40208679: 2168 l32i.n a6, a1, 8 +4020867b: 01dd22 addmi a2, a13, 0x100 +4020867e: 4a0632 l8ui a3, a6, 74 +40208681: 190c movi.n a9, 1 +40208683: d94232 s8i a3, a2, 217 +40208686: 4b0632 l8ui a3, a6, 75 +40208689: d84232 s8i a3, a2, 216 +4020868c: 030c movi.n a3, 0 +4020868e: d80242 l8ui a4, a2, 216 +40208691: 1144d0 slli a4, a4, 3 +40208694: 1ba347 bge a3, a4, 402086b3 +40208697: 214330 srai a4, a3, 3 +4020869a: 247030 extui a7, a3, 0, 3 +4020869d: 4c4a add.n a4, a12, a4 +4020869f: 401700 ssl a7 +402086a2: a18900 sll a8, a9 +402086a5: 000472 l8ui a7, a4, 0 +402086a8: 331b addi.n a3, a3, 1 +402086aa: 207870 or a7, a8, a7 +402086ad: 004472 s8i a7, a4, 0 +402086b0: fff686 j 4020868e +402086b3: 102632 l32i a3, a6, 64 +402086b6: 107387 bbci a3, 24, 402086ca +402086b9: 752d32 l32i a3, a13, 0x1d4 +402086bc: 0a7367 bbci a3, 22, 402086ca +402086bf: 070f42 l8ui a4, a15, 7 +402086c2: 130c movi.n a3, 1 +402086c4: 203430 or a3, a4, a3 +402086c7: 074f32 s8i a3, a15, 7 +402086ca: 752d32 l32i a3, a13, 0x1d4 +402086cd: 10f357 bbsi a3, 21, 402086e1 +402086d0: d90232 l8ui a3, a2, 217 +402086d3: d80222 l8ui a2, a2, 216 +402086d6: 021237 beq a2, a3, 402086dc +402086d9: 0021c6 j 40208764 +402086dc: 120c movi.n a2, 1 +402086de: 002686 j 4020877c +402086e1: d80232 l8ui a3, a2, 216 +402086e4: 0823f6 bgeui a3, 2, 402086f0 +402086e7: d80232 l8ui a3, a2, 216 +402086ea: 2833f6 bgeui a3, 3, 40208716 +402086ed: 0011c6 j 40208738 +402086f0: 070f32 l8ui a3, a15, 7 +402086f3: 142c movi.n a4, 33 +402086f5: 190c movi.n a9, 1 +402086f7: 782c movi.n a8, 39 +402086f9: 247040 extui a7, a4, 0, 3 +402086fc: 401700 ssl a7 +402086ff: a17900 sll a7, a9 +40208702: 203730 or a3, a7, a3 +40208705: 441b addi.n a4, a4, 1 +40208707: 743030 extui a3, a3, 0, 8 +4020870a: eb9487 bne a4, a8, 402086f9 +4020870d: 074f32 s8i a3, a15, 7 +40208710: fff4c6 j 402086e7 +40208713: 000000 ill +40208716: 732c movi.n a3, 39 +40208718: 1a0c movi.n a10, 1 +4020871a: 593c movi.n a9, 53 +4020871c: 214330 srai a4, a3, 3 +4020871f: 247030 extui a7, a3, 0, 3 +40208722: 4c4a add.n a4, a12, a4 +40208724: 401700 ssl a7 +40208727: a18a00 sll a8, a10 +4020872a: 000472 l8ui a7, a4, 0 +4020872d: 331b addi.n a3, a3, 1 +4020872f: 207870 or a7, a8, a7 +40208732: 004472 s8i a7, a4, 0 +40208735: e39397 bne a3, a9, 4020871c +40208738: d90232 l8ui a3, a2, 217 +4020873b: 9143b6 bltui a3, 4, 402086d0 +4020873e: 533c movi.n a3, 53 +40208740: 1a0c movi.n a10, 1 +40208742: d94c movi.n a9, 77 +40208744: 214330 srai a4, a3, 3 +40208747: 247030 extui a7, a3, 0, 3 +4020874a: 4c4a add.n a4, a12, a4 +4020874c: 401700 ssl a7 +4020874f: a18a00 sll a8, a10 +40208752: 000472 l8ui a7, a4, 0 +40208755: 331b addi.n a3, a3, 1 +40208757: 207870 or a7, a8, a7 +4020875a: 004472 s8i a7, a4, 0 +4020875d: e39397 bne a3, a9, 40208744 +40208760: ffdb06 j 402086d0 +40208763: 230b00 excw +40208766: 1122e0 slli a2, a2, 2 +40208769: 330c movi.n a3, 3 +4020876b: 202230 or a2, a2, a3 +4020876e: 752d32 l32i a3, a13, 0x1d4 +40208771: 742020 extui a2, a2, 0, 8 +40208774: 047377 bbci a3, 23, 4020877c +40208777: 031c movi.n a3, 16 +40208779: 202230 or a2, a2, a3 +4020877c: 0f4f22 s8i a2, a15, 15 +4020877f: 241622 l16ui a2, a6, 72 +40208782: 134f22 s8i a2, a15, 19 +40208785: 412820 srli a2, a2, 8 +40208788: 144f22 s8i a2, a15, 20 +4020878b: b108 l32i.n a0, a1, 44 +4020878d: 1acf22 addi a2, a15, 26 +40208790: a1c8 l32i.n a12, a1, 40 +40208792: 91d8 l32i.n a13, a1, 36 +40208794: 81e8 l32i.n a14, a1, 32 +40208796: 71f8 l32i.n a15, a1, 28 +40208798: 30c112 addi a1, a1, 48 +4020879b: f00d ret.n +4020879d: 000000 ill +402087a0: 080000 excw +402087a3: 110c04 excw +402087a6: d80000 excw +402087a9: 402083 excw +402087ac: 826c movi.n a2, -24 +402087ae: 20 .byte 0x20 +402087af: 40 .byte 0x40 + +402087b0 : +402087b0: f0c112 addi a1, a1, -16 +402087b3: fffb41 l32r a4, 402087a0 +402087b6: 3109 s32i.n a0, a1, 12 +402087b8: 02d232 addmi a3, a2, 0x200 +402087bb: d06342 s32i a4, a3, 0x340 +402087be: fff931 l32r a3, 402087a4 +402087c1: 05d222 addmi a2, a2, 0x500 +402087c4: 225232 s16i a3, a2, 68 +402087c7: c31c movi.n a3, 28 +402087c9: 235232 s16i a3, a2, 70 +402087cc: 030c movi.n a3, 0 +402087ce: 245232 s16i a3, a2, 72 +402087d1: fff541 l32r a4, 402087a8 +402087d4: 130c movi.n a3, 1 +402087d6: 4a4232 s8i a3, a2, 74 +402087d9: 4b4232 s8i a3, a2, 75 +402087dc: 030c movi.n a3, 0 +402087de: 320c movi.n a2, 3 +402087e0: 02e5c5 call0 4020b640 +402087e3: fff241 l32r a4, 402087ac +402087e6: 130c movi.n a3, 1 +402087e8: 320c movi.n a2, 3 +402087ea: 02dc45 call0 4020b5b0 +402087ed: 3108 l32i.n a0, a1, 12 +402087ef: 10c112 addi a1, a1, 16 +402087f2: f00d ret.n +402087f4: 000c40 excw + ... + +402087f8 : +402087f8: f0c112 addi a1, a1, -16 +402087fb: 21c9 s32i.n a12, a1, 8 +402087fd: 02cd mov.n a12, a2 +402087ff: 142222 l32i a2, a2, 80 +40208802: 3109 s32i.n a0, a1, 12 +40208804: 046267 bbci a2, 6, 4020880c +40208807: 0c2d mov.n a2, a12 +40208809: 031285 call0 4020b934 +4020880c: 01dc22 addmi a2, a12, 0x100 +4020880f: 030c movi.n a3, 0 +40208811: 664232 s8i a3, a2, 102 +40208814: 586cc2 s32i a12, a12, 0x160 +40208817: 130c movi.n a3, 1 +40208819: b24232 s8i a3, a2, 178 +4020881c: 6b6cc2 s32i a12, a12, 0x1ac +4020881f: 230c movi.n a3, 2 +40208821: fe4232 s8i a3, a2, 254 +40208824: 7e6cc2 s32i a12, a12, 0x1f8 +40208827: 02dc22 addmi a2, a12, 0x200 +4020882a: 330c movi.n a3, 3 +4020882c: 4a4232 s8i a3, a2, 74 +4020882f: 142c32 l32i a3, a12, 80 +40208832: fff021 l32r a2, 402087f4 +40208835: 3108 l32i.n a0, a1, 12 +40208837: 202320 or a2, a3, a2 +4020883a: 916cc2 s32i a12, a12, 0x244 +4020883d: 146c22 s32i a2, a12, 80 +40208840: 21c8 l32i.n a12, a1, 8 +40208842: 10c112 addi a1, a1, 16 +40208845: f00d ret.n +40208847: 84e300 extui a14, a0, 3, 9 +4020884a: fe .byte 0xfe +4020884b: 3f .byte 0x3f +4020884c: df48 l32i.n a4, a15, 52 +4020884e: 00 .byte 00 +4020884f: 40 .byte 0x40 + +40208850 : +40208850: e0c112 addi a1, a1, -32 +40208853: 7109 s32i.n a0, a1, 28 +40208855: 61c9 s32i.n a12, a1, 24 +40208857: 51d9 s32i.n a13, a1, 20 +40208859: 41e9 s32i.n a14, a1, 16 +4020885b: 000352 l8ui a5, a3, 0 +4020885e: dda042 movi a4, 221 +40208861: 109547 bne a5, a4, 40208875 +40208864: 142252 l32i a5, a2, 80 +40208867: 80a042 movi a4, 128 +4020886a: 204540 or a4, a5, a4 +4020886d: 146242 s32i a4, a2, 80 +40208870: 334b addi.n a3, a3, 4 +40208872: 000586 j 4020888c +40208875: e4bb41 l32r a4, 40201b64 +40208878: 02d442 addmi a4, a4, 0x200 +4020887b: 3e0442 l8ui a4, a4, 62 +4020887e: 0a1426 beqi a4, 1, 4020888c +40208881: 142252 l32i a5, a2, 80 +40208884: 044c movi.n a4, 64 +40208886: 204540 or a4, a5, a4 +40208889: 146242 s32i a4, a2, 80 +4020888c: 030342 l8ui a4, a3, 3 +4020888f: 020352 l8ui a5, a3, 2 +40208892: 114480 slli a4, a4, 8 +40208895: 204540 or a4, a5, a4 +40208898: 6c5242 s16i a4, a2, 216 +4020889b: 040342 l8ui a4, a3, 4 +4020889e: fba0d1 l32r a13, 40207720 +402088a1: da4242 s8i a4, a2, 218 +402088a4: 0503e2 l8ui a14, a3, 5 +402088a7: ffe831 l32r a3, 40208848 +402088aa: 0c0c movi.n a12, 0 +402088ac: 041c movi.n a4, 16 +402088ae: 012d mov.n a2, a1 +402088b0: 0dc9 s32i.n a12, a13, 0 +402088b2: ffe601 l32r a0, 4020884c +402088b5: 0000c0 callx0 a0 +402088b8: fb8a51 l32r a5, 402076e0 +402088bb: 0c2d mov.n a2, a12 +402088bd: 000542 l8ui a4, a5, 0 +402088c0: 0c6d mov.n a6, a12 +402088c2: ffa032 movi a3, 255 +402088c5: 095e27 bbc a14, a2, 402088d2 +402088c8: 441b addi.n a4, a4, 1 +402088ca: 743020 extui a3, a2, 0, 8 +402088cd: 744040 extui a4, a4, 0, 8 +402088d0: 160c movi.n a6, 1 +402088d2: 221b addi.n a2, a2, 1 +402088d4: ed8266 bnei a2, 8, 402088c5 +402088d7: 168c beqz.n a6, 402088dc +402088d9: 004542 s8i a4, a5, 0 +402088dc: 013380 slli a3, a3, 24 +402088df: 020c movi.n a2, 0 +402088e1: 313830 srai a3, a3, 24 +402088e4: 1142f0 slli a4, a2, 1 +402088e7: 514a add.n a5, a1, a4 +402088e9: 000552 l8ui a5, a5, 0 +402088ec: 099357 bne a3, a5, 402088f9 +402088ef: 414a add.n a4, a1, a4 +402088f1: 010422 l8ui a2, a4, 1 +402088f4: 0d29 s32i.n a2, a13, 0 +402088f6: 000106 j 402088fe +402088f9: 221b addi.n a2, a2, 1 +402088fb: e58266 bnei a2, 8, 402088e4 +402088fe: 7108 l32i.n a0, a1, 28 +40208900: 61c8 l32i.n a12, a1, 24 +40208902: 51d8 l32i.n a13, a1, 20 +40208904: 41e8 l32i.n a14, a1, 16 +40208906: 20c112 addi a1, a1, 32 +40208909: f00d ret.n +4020890b: 300000 xor a0, a0, a0 +4020890e: ff0000 excw +40208911: df .byte 0xdf +40208912: ff .byte 0xff +40208913: ff .byte 0xff +40208914: ff .byte 0xff +40208915: cf .byte 0xcf +40208916: ff .byte 0xff +40208917: ff .byte 0xff +40208918: ff .byte 0xff +40208919: 7f .byte 0x7f +4020891a: fe .byte 0xfe +4020891b: ff .byte 0xff +4020891c: 008000 excw +4020891f: 000000 ill +40208922: 0008 l32i.n a0, a0, 0 + +40208924 : +40208924: d0c112 addi a1, a1, -48 +40208927: a1c9 s32i.n a12, a1, 40 +40208929: 91d9 s32i.n a13, a1, 36 +4020892b: 71f9 s32i.n a15, a1, 28 +4020892d: 02cd mov.n a12, a2 +4020892f: b109 s32i.n a0, a1, 44 +40208931: 81e9 s32i.n a14, a1, 32 +40208933: 04dd mov.n a13, a4 +40208935: fff185 call0 40208850 +40208938: e48b51 l32r a5, 40201b64 +4020893b: c20c movi.n a2, 12 +4020893d: 05d5f2 addmi a15, a5, 0x500 +40208940: 221f32 l16ui a3, a15, 68 +40208943: 2e0327 bnone a3, a2, 40208975 +40208946: 6c1c42 l16ui a4, a12, 216 +40208949: 142c32 l32i a3, a12, 80 +4020894c: 102420 and a2, a4, a2 +4020894f: a28c beqz.n a2, 4020895d +40208951: 174266 bnei a2, 4, 4020896c +40208954: ffee21 l32r a2, 4020890c +40208957: 202320 or a2, a3, a2 +4020895a: 000506 j 40208972 +4020895d: ffec21 l32r a2, 40208910 +40208960: ed9041 l32r a4, 40203fa0 +40208963: 102320 and a2, a3, a2 +40208966: 202240 or a2, a2, a4 +40208969: 000146 j 40208972 +4020896c: ffea21 l32r a2, 40208914 +4020896f: 102320 and a2, a3, a2 +40208972: 146c22 s32i a2, a12, 80 +40208975: 142c32 l32i a3, a12, 80 +40208978: ffe821 l32r a2, 40208918 +4020897b: 6c1c42 l16ui a4, a12, 216 +4020897e: 102320 and a2, a3, a2 +40208981: 146c22 s32i a2, a12, 80 +40208984: 0e6457 bbci a4, 5, 40208996 +40208987: 102f32 l32i a3, a15, 64 +4020898a: 0873a7 bbci a3, 26, 40208996 +4020898d: ffe331 l32r a3, 4020891c +40208990: 202230 or a2, a2, a3 +40208993: 146c22 s32i a2, a12, 80 +40208996: 116467 bbci a4, 6, 402089ab +40208999: 102f22 l32i a2, a15, 64 +4020899c: 0b72b7 bbci a2, 27, 402089ab +4020899f: 142c32 l32i a3, a12, 80 +402089a2: ef2021 l32r a2, 40204624 +402089a5: 202320 or a2, a3, a2 +402089a8: 146c22 s32i a2, a12, 80 +402089ab: 000d22 l8ui a2, a13, 0 +402089ae: dda042 movi a4, 221 +402089b1: c02240 sub a2, a2, a4 +402089b4: 3d4b addi.n a3, a13, 4 +402089b6: 83d320 moveqz a13, a3, a2 +402089b9: 020d22 l8ui a2, a13, 2 +402089bc: ffd9e1 l32r a14, 40208920 +402089bf: db4c22 s8i a2, a12, 219 +402089c2: 030d22 l8ui a2, a13, 3 +402089c5: 060c movi.n a6, 0 +402089c7: 142020 extui a2, a2, 0, 2 +402089ca: dc4c22 s8i a2, a12, 220 +402089cd: 040d32 l8ui a3, a13, 4 +402089d0: 143030 extui a3, a3, 0, 2 +402089d3: dd4c32 s8i a3, a12, 221 +402089d6: 060d32 l8ui a3, a13, 6 +402089d9: 643030 extui a3, a3, 0, 7 +402089dc: de4c32 s8i a3, a12, 222 +402089df: 102f42 l32i a4, a15, 64 +402089e2: 1034e0 and a3, a4, a14 +402089e5: ef0fe1 l32r a14, 40204624 +402089e8: 83e630 moveqz a14, a6, a3 +402089eb: 030d32 l8ui a3, a13, 3 +402089ee: 166327 bbci a3, 2, 40208a08 +402089f1: 137487 bbci a4, 24, 40208a08 +402089f4: 0d1226 beqi a2, 1, 40208a05 +402089f7: fec731 l32r a3, 40208514 +402089fa: fdc222 addi a2, a2, -3 +402089fd: 83e320 moveqz a14, a3, a2 +40208a00: 000106 j 40208a08 +40208a03: e10000 excw +40208a06: 32fec6 j 40215605 +40208a09: 352c movi.n a5, 35 +40208a0b: fec641 l32r a4, 40208524 +40208a0e: 0328 l32i.n a2, a3, 0 +40208a10: 102240 and a2, a2, a4 +40208a13: 2022e0 or a2, a2, a14 +40208a16: 104240 and a4, a2, a4 +40208a19: 0329 s32i.n a2, a3, 0 +40208a1b: 2044e0 or a4, a4, a14 +40208a1e: 371247 beq a2, a4, 40208a59 +40208a21: 021332 l16ui a3, a3, 4 +40208a24: 052d mov.n a2, a5 +40208a26: 0159 s32i.n a5, a1, 0 +40208a28: 02e1c5 call0 4020b848 +40208a2b: 0158 l32i.n a5, a1, 0 +40208a2d: f2dc bnez.n a2, 40208a50 +40208a2f: fe8821 l32r a2, 40208450 +40208a32: 230e27 bnone a14, a2, 40208a59 +40208a35: 352c32 l32i a3, a12, 212 +40208a38: febb21 l32r a2, 40208524 +40208a3b: 0348 l32i.n a4, a3, 0 +40208a3d: 021332 l16ui a3, a3, 4 +40208a40: 102420 and a2, a4, a2 +40208a43: eef841 l32r a4, 40204624 +40208a46: 204240 or a4, a2, a4 +40208a49: 052d mov.n a2, a5 +40208a4b: 02dfc5 call0 4020b848 +40208a4e: 728c beqz.n a2, 40208a59 +40208a50: 352c32 l32i a3, a12, 212 +40208a53: 021327 beq a3, a2, 40208a59 +40208a56: 356c22 s32i a2, a12, 212 +40208a59: 352c22 l32i a2, a12, 212 +40208a5c: 842c movi.n a4, 40 +40208a5e: 0238 l32i.n a3, a2, 0 +40208a60: fe7c21 l32r a2, 40208450 +40208a63: 103320 and a3, a3, a2 +40208a66: 421c movi.n a2, 20 +40208a68: 932430 movnez a2, a4, a3 +40208a6b: df4c22 s8i a2, a12, 223 +40208a6e: 030d22 l8ui a2, a13, 3 +40208a71: 142c42 l32i a4, a12, 80 +40208a74: 106237 bbci a2, 3, 40208a88 +40208a77: 102f22 l32i a2, a15, 64 +40208a7a: 0a72d7 bbci a2, 29, 40208a88 +40208a7d: f83831 l32r a3, 40206b60 +40208a80: 202430 or a2, a4, a3 +40208a83: 0001c6 j 40208a8e +40208a86: 210000 srai a0, a0, 0 +40208a89: 20f834 excw +40208a8c: 081024 excw +40208a8f: 6c22b1 l32r a11, 401e3b18 <_lit4_end+0xdd7ec> +40208a92: 91d814 excw +40208a95: a1c8 l32i.n a12, a1, 40 +40208a97: 81e8 l32i.n a14, a1, 32 +40208a99: 71f8 l32i.n a15, a1, 28 +40208a9b: 30c112 addi a1, a1, 48 +40208a9e: f00d ret.n + +40208aa0 : +40208aa0: d0c112 addi a1, a1, -48 +40208aa3: a1c9 s32i.n a12, a1, 40 +40208aa5: 03cd mov.n a12, a3 +40208aa7: e42f31 l32r a3, 40201b64 +40208aaa: 91d9 s32i.n a13, a1, 36 +40208aac: 81e9 s32i.n a14, a1, 32 +40208aae: 71f9 s32i.n a15, a1, 28 +40208ab0: b109 s32i.n a0, a1, 44 +40208ab2: 025d mov.n a5, a2 +40208ab4: 01d322 addmi a2, a3, 0x100 +40208ab7: d90222 l8ui a2, a2, 217 +40208aba: 752342 l32i a4, a3, 0x1d4 +40208abd: 11e2d0 slli a14, a2, 3 +40208ac0: 03fd mov.n a15, a3 +40208ac2: 0d0c movi.n a13, 0 +40208ac4: 107477 bbci a4, 23, 40208ad8 +40208ac7: 6d2c movi.n a13, 38 +40208ac9: 0b32b6 bltui a2, 3, 40208ad8 +40208acc: fdc222 addi a2, a2, -3 +40208acf: 4ca032 movi a3, 76 +40208ad2: 34a0d2 movi a13, 52 +40208ad5: 93d320 movnez a13, a3, a2 +40208ad8: e0a022 movi a2, 224 +40208adb: 252a add.n a2, a5, a2 +40208add: 80a042 movi a4, 128 +40208ae0: 030c movi.n a3, 0 +40208ae2: 0159 s32i.n a5, a1, 0 +40208ae4: e14b01 l32r a0, 40201010 <_irom0_text_start> +40208ae7: 0000c0 callx0 a0 +40208aea: 0158 l32i.n a5, a1, 0 +40208aec: 05ac16 beqz a12, 40208b4a +40208aef: 000c22 l8ui a2, a12, 0 +40208af2: dda042 movi a4, 221 +40208af5: 3c4b addi.n a3, a12, 4 +40208af7: c02240 sub a2, a2, a4 +40208afa: 83c320 moveqz a12, a3, a2 +40208afd: 752f62 l32i a6, a15, 0x1d4 +40208b00: f28721 l32r a2, 4020551c +40208b03: 030c movi.n a3, 0 +40208b05: 106620 and a6, a6, a2 +40208b08: e0a022 movi a2, 224 +40208b0b: 252a add.n a2, a5, a2 +40208b0d: f71c movi.n a7, 31 +40208b0f: 7fa052 movi a5, 127 +40208b12: 20a082 movi a8, 32 +40208b15: 214330 srai a4, a3, 3 +40208b18: 804c40 add a4, a12, a4 +40208b1b: 050492 l8ui a9, a4, 5 +40208b1e: 244030 extui a4, a3, 0, 3 +40208b21: 205947 bbc a9, a4, 40208b45 +40208b24: 000242 l8ui a4, a2, 0 +40208b27: 1f1457 beq a4, a5, 40208b4a +40208b2a: 022737 blt a7, a3, 40208b30 +40208b2d: 14a3e7 bge a3, a14, 40208b45 +40208b30: 01c366 bnei a3, 32, 40208b35 +40208b33: e68c beqz.n a6, 40208b45 +40208b35: 02a837 bge a8, a3, 40208b3b +40208b38: 092d37 blt a13, a3, 40208b45 +40208b3b: 941b addi.n a9, a4, 1 +40208b3d: 004292 s8i a9, a2, 0 +40208b40: 424a add.n a4, a2, a4 +40208b42: 014432 s8i a3, a4, 1 +40208b45: 331b addi.n a3, a3, 1 +40208b47: ca9357 bne a3, a5, 40208b15 +40208b4a: b108 l32i.n a0, a1, 44 +40208b4c: 020c movi.n a2, 0 +40208b4e: a1c8 l32i.n a12, a1, 40 +40208b50: 91d8 l32i.n a13, a1, 36 +40208b52: 81e8 l32i.n a14, a1, 32 +40208b54: 71f8 l32i.n a15, a1, 28 +40208b56: 30c112 addi a1, a1, 48 +40208b59: f00d ret.n + ... + +40208b5c : +40208b5c: f0c112 addi a1, a1, -16 +40208b5f: 3109 s32i.n a0, a1, 12 +40208b61: d42c movi.n a4, 45 +40208b63: 004242 s8i a4, a2, 0 +40208b66: a41c movi.n a4, 26 +40208b68: 014242 s8i a4, a2, 1 +40208b6b: 222b addi.n a2, a2, 2 +40208b6d: ff9b85 call0 40208528 +40208b70: 3108 l32i.n a0, a1, 12 +40208b72: 10c112 addi a1, a1, 16 +40208b75: f00d ret.n + ... + +40208b78 : +40208b78: f0c112 addi a1, a1, -16 +40208b7b: 036102 s32i a0, a1, 12 +40208b7e: ddaf42 movi a4, -35 +40208b81: 004242 s8i a4, a2, 0 +40208b84: 1ea042 movi a4, 30 +40208b87: 014242 s8i a4, a2, 1 +40208b8a: 00a042 movi a4, 0 +40208b8d: 024242 s8i a4, a2, 2 +40208b90: 90af42 movi a4, -112 +40208b93: 034242 s8i a4, a2, 3 +40208b96: c44c movi.n a4, 76 +40208b98: 044242 s8i a4, a2, 4 +40208b9b: 343c movi.n a4, 51 +40208b9d: 054242 s8i a4, a2, 5 +40208ba0: 226b addi.n a2, a2, 6 +40208ba2: ff9845 call0 40208528 +40208ba5: 3108 l32i.n a0, a1, 12 +40208ba7: 10c112 addi a1, a1, 16 +40208baa: f00d ret.n + +40208bac : +40208bac: f0c112 addi a1, a1, -16 +40208baf: 3109 s32i.n a0, a1, 12 +40208bb1: d43c movi.n a4, 61 +40208bb3: 004242 s8i a4, a2, 0 +40208bb6: 641c movi.n a4, 22 +40208bb8: 014242 s8i a4, a2, 1 +40208bbb: 222b addi.n a2, a2, 2 +40208bbd: ff8945 call0 40208454 +40208bc0: 3108 l32i.n a0, a1, 12 +40208bc2: 10c112 addi a1, a1, 16 +40208bc5: f00d ret.n + ... + +40208bc8 : +40208bc8: f0c112 addi a1, a1, -16 +40208bcb: 036102 s32i a0, a1, 12 +40208bce: ddaf42 movi a4, -35 +40208bd1: 004242 s8i a4, a2, 0 +40208bd4: 1aa042 movi a4, 26 +40208bd7: 014242 s8i a4, a2, 1 +40208bda: 00a042 movi a4, 0 +40208bdd: 024242 s8i a4, a2, 2 +40208be0: 90af42 movi a4, -112 +40208be3: 034242 s8i a4, a2, 3 +40208be6: c44c movi.n a4, 76 +40208be8: 044242 s8i a4, a2, 4 +40208beb: 443c movi.n a4, 52 +40208bed: 054242 s8i a4, a2, 5 +40208bf0: 226b addi.n a2, a2, 6 +40208bf2: ff8605 call0 40208454 +40208bf5: 3108 l32i.n a0, a1, 12 +40208bf7: 10c112 addi a1, a1, 16 +40208bfa: f00d ret.n +40208bfc: cf28 l32i.n a2, a15, 48 +40208bfe: fe .byte 0xfe +40208bff: 3f .byte 0x3f +40208c00: 024d mov.n a4, a2 +40208c02: fffe21 l32r a2, 40208bfc +40208c05: 230c movi.n a3, 2 +40208c07: 03d222 addmi a2, a2, 0x300 +40208c0a: b00252 l8ui a5, a2, 176 +40208c0d: 216507 bbci a5, 0, 40208c32 +40208c10: 180537 bnone a5, a3, 40208c2c +40208c13: 930422 l8ui a2, a4, 147 +40208c16: 900432 l8ui a3, a4, 144 +40208c19: 012280 slli a2, a2, 24 +40208c1c: 013380 slli a3, a3, 24 +40208c1f: 312820 srai a2, a2, 24 +40208c22: 313830 srai a3, a3, 24 +40208c25: d12230 mul16s a2, a2, a3 +40208c28: 000506 j 40208c40 +40208c2b: 043200 extui a3, a0, 2, 1 +40208c2e: 01c693 excw +40208c31: 020c00 excw +40208c34: 080537 bnone a5, a3, 40208c40 +40208c37: 900432 l8ui a3, a4, 144 +40208c3a: 013380 slli a3, a3, 24 +40208c3d: 312830 srai a2, a3, 24 +40208c40: 096527 bbci a5, 2, 40208c4d +40208c43: 628c beqz.n a2, 40208c4d +40208c45: 910462 l8ui a6, a4, 145 +40208c48: 322b addi.n a3, a2, 2 +40208c4a: 932360 movnez a2, a3, a6 +40208c4d: 086537 bbci a5, 3, 40208c59 +40208c50: 960442 l8ui a4, a4, 150 +40208c53: 1132f0 slli a3, a2, 1 +40208c56: 932340 movnez a2, a3, a4 +40208c59: f00d ret.n +40208c5b: e82100 excw +40208c5e: ff .byte 0xff +40208c5f: e8a072 movi a7, 232 +40208c62: 03d242 addmi a4, a2, 0x300 +40208c65: b10462 l8ui a6, a4, 177 +40208c68: 025d mov.n a5, a2 +40208c6a: 00a282 movi a8, 0x200 +40208c6d: b20432 l8ui a3, a4, 178 +40208c70: 16b367 bgeu a3, a6, 40208c8a +40208c73: 237a add.n a2, a3, a7 +40208c75: a02250 addx4 a2, a2, a5 +40208c78: 331b addi.n a3, a3, 1 +40208c7a: 1228 l32i.n a2, a2, 4 +40208c7c: b24432 s8i a3, a4, 178 +40208c7f: 262232 l32i a3, a2, 152 +40208c82: 0338 l32i.n a3, a3, 0 +40208c84: 040837 bnone a8, a3, 40208c8c +40208c87: fff886 j 40208c6d +40208c8a: 020c movi.n a2, 0 +40208c8c: f00d ret.n +40208c8e: 940000 extui a0, a0, 0, 10 +40208c91: 208c beqz.n a0, 40208c97 +40208c93: c11240 mul16u a1, a2, a4 +40208c96: 91d9d0 excw +40208c99: e3b2d1 l32r a13, 40201b64 +40208c9c: a1c9 s32i.n a12, a1, 40 +40208c9e: 02cd mov.n a12, a2 +40208ca0: 4d28 l32i.n a2, a13, 16 +40208ca2: 71f9 s32i.n a15, a1, 28 +40208ca4: 262cf2 l32i a15, a12, 152 +40208ca7: 81e9 s32i.n a14, a1, 32 +40208ca9: b109 s32i.n a0, a1, 44 +40208cab: 02e8 l32i.n a14, a2, 0 +40208cad: ecc101 l32r a0, 40203fb4 +40208cb0: 0000c0 callx0 a0 +40208cb3: 151f27 beq a15, a2, 40208ccc +40208cb6: 060c movi.n a6, 0 +40208cb8: fff651 l32r a5, 40208c90 +40208cbb: 262c22 l32i a2, a12, 152 +40208cbe: 0c7d mov.n a7, a12 +40208cc0: 064d mov.n a4, a6 +40208cc2: 203660 or a3, a6, a6 +40208cc5: fd1a45 call0 40205e6c +40208cc8: 000706 j 40208ce8 +40208ccb: 2d7200 excw +40208cce: a02286 j 401f0d5c <_lit4_end+0xeaa30> +40208cd1: 3d6100 excw +40208cd4: 22e8 l32i.n a14, a2, 8 +40208cd6: 700061 l32r a6, 401e4cd8 <_lit4_end+0xde9ac> +40208cd9: c07470 sub a7, a4, a7 +40208cdc: 205c movi.n a0, 82 +40208cde: 0c4d mov.n a4, a12 +40208ce0: 33ce32 addi a3, a14, 51 +40208ce3: 0c2d mov.n a2, a12 +40208ce5: f9e485 call0 40202b30 +40208ce8: b108 l32i.n a0, a1, 44 +40208cea: a1c8 l32i.n a12, a1, 40 +40208cec: 91d8 l32i.n a13, a1, 36 +40208cee: 81e8 l32i.n a14, a1, 32 +40208cf0: 71f8 l32i.n a15, a1, 28 +40208cf2: 30c112 addi a1, a1, 48 +40208cf5: f00d ret.n +40208cf7: cf1000 excw +40208cfa: fe .byte 0xfe +40208cfb: 3f .byte 0x3f +40208cfc: ffff21 l32r a2, 40208cf8 +40208cff: e0c112 addi a1, a1, -32 +40208d02: 0661c2 s32i a12, a1, 24 +40208d05: 0022c2 l32i a12, a2, 0 +40208d08: ffbd21 l32r a2, 40208bfc +40208d0b: 7109 s32i.n a0, a1, 28 +40208d0d: 00a042 movi a4, 0 +40208d10: 03d222 addmi a2, a2, 0x300 +40208d13: b24242 s8i a4, a2, 178 +40208d16: 0139 s32i.n a3, a1, 0 +40208d18: fd17c5 call0 40205e98 +40208d1b: fcf085 call0 40205c24 +40208d1e: 0138 l32i.n a3, a1, 0 +40208d20: 5c8c beqz.n a12, 40208d29 +40208d22: 0c48 l32i.n a4, a12, 0 +40208d24: 020c movi.n a2, 0 +40208d26: 0004c0 callx0 a4 +40208d29: 7108 l32i.n a0, a1, 28 +40208d2b: 61c8 l32i.n a12, a1, 24 +40208d2d: 20c112 addi a1, a1, 32 +40208d30: f00d ret.n + ... + +40208d34 : +40208d34: f0c112 addi a1, a1, -16 +40208d37: 21c9 s32i.n a12, a1, 8 +40208d39: e38ac1 l32r a12, 40201b64 +40208d3c: 3109 s32i.n a0, a1, 12 +40208d3e: 11d9 s32i.n a13, a1, 4 +40208d40: 02dcc2 addmi a12, a12, 0x200 +40208d43: 170c62 l8ui a6, a12, 23 +40208d46: 1d0c movi.n a13, 1 +40208d48: 160c22 l8ui a2, a12, 22 +40208d4b: 1036d0 and a3, a6, a13 +40208d4e: 303d30 xor a3, a13, a3 +40208d51: 401200 ssl a2 +40208d54: a14d00 sll a4, a13 +40208d57: 401200 ssl a2 +40208d5a: a13300 sll a3, a3 +40208d5d: 00a052 movi a5, 0 +40208d60: 401200 ssl a2 +40208d63: a12600 sll a2, a6 +40208d66: f1f401 l32r a0, 40205538 +40208d69: 0000c0 callx0 a0 +40208d6c: 170c22 l8ui a2, a12, 23 +40208d6f: 1022d0 and a2, a2, a13 +40208d72: 302d20 xor a2, a13, a2 +40208d75: 174c22 s8i a2, a12, 23 +40208d78: 3108 l32i.n a0, a1, 12 +40208d7a: 21c8 l32i.n a12, a1, 8 +40208d7c: 11d8 l32i.n a13, a1, 4 +40208d7e: 10c112 addi a1, a1, 16 +40208d81: f00d ret.n +40208d83: c11200 mul16u a1, a2, a0 +40208d86: 61c9e0 excw +40208d89: e376c1 l32r a12, 40201b64 +40208d8c: 7109 s32i.n a0, a1, 28 +40208d8e: 4c48 l32i.n a4, a12, 16 +40208d90: 0438 l32i.n a3, a4, 0 +40208d92: 242422 l32i a2, a4, 144 +40208d95: 038c beqz.n a3, 40208d99 +40208d97: 62cc bnez.n a2, 40208da1 +40208d99: 520c movi.n a2, 5 +40208d9b: 404422 s8i a2, a4, 64 +40208d9e: 000ac6 j 40208dcd +40208da1: 400442 l8ui a4, a4, 64 +40208da4: 33c332 addi a3, a3, 51 +40208da7: e80861 l32r a6, 40202dc8 +40208daa: 862c72 l32i a7, a12, 0x218 +40208dad: 0d34f6 bgeui a4, 3, 40208dbe +40208db0: 040c movi.n a4, 0 +40208db2: 0149 s32i.n a4, a1, 0 +40208db4: 747070 extui a7, a7, 0, 8 +40208db7: 025d mov.n a5, a2 +40208db9: 024d mov.n a4, a2 +40208dbb: 0002c6 j 40208dca +40208dbe: e49e41 l32r a4, 40202038 +40208dc1: 050c movi.n a5, 0 +40208dc3: 0159 s32i.n a5, a1, 0 +40208dc5: 747070 extui a7, a7, 0, 8 +40208dc8: 045d mov.n a5, a4 +40208dca: f9d645 call0 40202b30 +40208dcd: 4c28 l32i.n a2, a12, 16 +40208dcf: 400232 l8ui a3, a2, 64 +40208dd2: 18c222 addi a2, a2, 24 +40208dd5: 331b addi.n a3, a3, 1 +40208dd7: 284232 s8i a3, a2, 40 +40208dda: ec7801 l32r a0, 40203fbc +40208ddd: 0000c0 callx0 a0 +40208de0: 4c28 l32i.n a2, a12, 16 +40208de2: 150c movi.n a5, 1 +40208de4: 040c movi.n a4, 0 +40208de6: f4a132 movi a3, 0x1f4 +40208de9: 18c222 addi a2, a2, 24 +40208dec: ec7301 l32r a0, 40203fb8 +40208def: 0000c0 callx0 a0 +40208df2: 7108 l32i.n a0, a1, 28 +40208df4: 61c8 l32i.n a12, a1, 24 +40208df6: 20c112 addi a1, a1, 32 +40208df9: f00d ret.n +40208dfb: 02fa00 excw +40208dfe: 804023 excw +40208e01: 402096 bltz a0, 40209207 +40208e04: fffe21 l32r a2, 40208dfc +40208e07: f0c112 addi a1, a1, -16 +40208e0a: 3109 s32i.n a0, a1, 12 +40208e0c: e49001 l32r a0, 4020204c +40208e0f: 0000c0 callx0 a0 +40208e12: e35421 l32r a2, 40201b64 +40208e15: 030c movi.n a3, 0 +40208e17: 4228 l32i.n a2, a2, 16 +40208e19: 00a042 movi a4, 0 +40208e1c: 404232 s8i a3, a2, 64 +40208e1f: fff831 l32r a3, 40208e00 +40208e22: 18c222 addi a2, a2, 24 +40208e25: ed6301 l32r a0, 402043b4 +40208e28: 0000c0 callx0 a0 +40208e2b: fff585 call0 40208d84 +40208e2e: 3108 l32i.n a0, a1, 12 +40208e30: 10c112 addi a1, a1, 16 +40208e33: f00d ret.n +40208e35: 000000 ill +40208e38: fee130 excw +40208e3b: 3f .byte 0x3f +40208e3c: c0c112 addi a1, a1, -64 +40208e3f: e1c9 s32i.n a12, a1, 56 +40208e41: d1d9 s32i.n a13, a1, 52 +40208e43: 02cd mov.n a12, a2 +40208e45: 03dd mov.n a13, a3 +40208e47: 10c122 addi a2, a1, 16 +40208e4a: 830c movi.n a3, 8 +40208e4c: f109 s32i.n a0, a1, 60 +40208e4e: c1e9 s32i.n a14, a1, 48 +40208e50: b1f9 s32i.n a15, a1, 44 +40208e52: f37a01 l32r a0, 40205c3c +40208e55: 0000c0 callx0 a0 +40208e58: fcdc85 call0 40205c24 +40208e5b: 109d56 bnez a13, 40208f68 +40208e5e: 220c movi.n a2, 2 +40208e60: 1a5105 call0 40223374 +40208e63: 320c movi.n a2, 3 +40208e65: 1a50c5 call0 40223374 +40208e68: 620c movi.n a2, 6 +40208e6a: 1a5085 call0 40223374 +40208e6d: 720c movi.n a2, 7 +40208e6f: 1a5045 call0 40223374 +40208e72: 820c movi.n a2, 8 +40208e74: 1a4fc5 call0 40223374 +40208e77: 920c movi.n a2, 9 +40208e79: 1a4f85 call0 40223374 +40208e7c: e33ad1 l32r a13, 40201b64 +40208e7f: 02dd22 addmi a2, a13, 0x200 +40208e82: 3d0232 l8ui a3, a2, 61 +40208e85: 231326 beqi a3, 1, 40208eac +40208e88: 0d2d mov.n a2, a13 +40208e8a: 06ad45 call0 4020f960 +40208e8d: 0c3d mov.n a3, a12 +40208e8f: 0d2d mov.n a2, a13 +40208e91: 06b045 call0 4020f998 +40208e94: 01dc22 addmi a2, a12, 0x100 +40208e97: f37c movi.n a3, -1 +40208e99: 094232 s8i a3, a2, 9 +40208e9c: 0b4232 s8i a3, a2, 11 +40208e9f: 0c4232 s8i a3, a2, 12 +40208ea2: 0d4232 s8i a3, a2, 13 +40208ea5: 0e4232 s8i a3, a2, 14 +40208ea8: 001fc6 j 40208f2b +40208eab: 022200 excw +40208eae: 3e .byte 0x3e +40208eaf: 367266 bnei a2, 7, 40208ee9 +40208eb2: f7c8e1 l32r a14, 40206dd4 +40208eb5: 05a0d2 movi a13, 5 +40208eb8: 01a052 movi a5, 1 +40208ebb: 08a072 movi a7, 8 +40208ebe: 10c162 addi a6, a1, 16 +40208ec1: 040c movi.n a4, 0 +40208ec3: 0c3d mov.n a3, a12 +40208ec5: 052d mov.n a2, a5 +40208ec7: 21d9 s32i.n a13, a1, 8 +40208ec9: 11d9 s32i.n a13, a1, 4 +40208ecb: 01e9 s32i.n a14, a1, 0 +40208ecd: 068905 call0 4020f760 +40208ed0: 620c movi.n a2, 6 +40208ed2: 150c movi.n a5, 1 +40208ed4: 2129 s32i.n a2, a1, 8 +40208ed6: 11d9 s32i.n a13, a1, 4 +40208ed8: 01e9 s32i.n a14, a1, 0 +40208eda: 870c movi.n a7, 8 +40208edc: 10c162 addi a6, a1, 16 +40208edf: 054d mov.n a4, a5 +40208ee1: 0c3d mov.n a3, a12 +40208ee3: 052d mov.n a2, a5 +40208ee5: 000dc6 j 40208f20 +40208ee8: 826600 mull a6, a6, a0 +40208eeb: 3e .byte 0x3e +40208eec: f7bae1 l32r a14, 40206dd4 +40208eef: 05a0d2 movi a13, 5 +40208ef2: df0c movi.n a15, 13 +40208ef4: 870c movi.n a7, 8 +40208ef6: 10c162 addi a6, a1, 16 +40208ef9: 150c movi.n a5, 1 +40208efb: 040c movi.n a4, 0 +40208efd: 0c3d mov.n a3, a12 +40208eff: 21d9 s32i.n a13, a1, 8 +40208f01: 11f9 s32i.n a15, a1, 4 +40208f03: 01e9 s32i.n a14, a1, 0 +40208f05: 202dd0 or a2, a13, a13 +40208f08: 068545 call0 4020f760 +40208f0b: 620c movi.n a2, 6 +40208f0d: 150c movi.n a5, 1 +40208f0f: 2129 s32i.n a2, a1, 8 +40208f11: 11f9 s32i.n a15, a1, 4 +40208f13: 01e9 s32i.n a14, a1, 0 +40208f15: 870c movi.n a7, 8 +40208f17: 10c162 addi a6, a1, 16 +40208f1a: 054d mov.n a4, a5 +40208f1c: 0c3d mov.n a3, a12 +40208f1e: 0d2d mov.n a2, a13 +40208f20: 0683c5 call0 4020f760 +40208f23: 01dc22 addmi a2, a12, 0x100 +40208f26: 430c movi.n a3, 4 +40208f28: 094232 s8i a3, a2, 9 +40208f2b: fdc245 call0 40206b50 +40208f2e: ff3321 l32r a2, 40208bfc +40208f31: ffc131 l32r a3, 40208e38 +40208f34: ee2242 l32i a4, a2, 0x3b8 +40208f37: a48c beqz.n a4, 40208f45 +40208f39: 0458 l32i.n a5, a4, 0 +40208f3b: d5cc bnez.n a5, 40208f4c +40208f3d: 021442 l16ui a4, a4, 4 +40208f40: 84cc bnez.n a4, 40208f4c +40208f42: 000406 j 40208f56 +40208f45: 040c movi.n a4, 0 +40208f47: 0002c6 j 40208f56 +40208f4a: 220000 excw +40208f4d: 2203d2 l8ui a13, a3, 34 +40208f50: ccc402 addi a0, a4, -52 +40208f53: 140c62 l8ui a6, a12, 20 +40208f56: 150c movi.n a5, 1 +40208f58: 000186 j 40208f62 +40208f5b: a05200 addx4 a5, a2, a0 +40208f5e: a04200 addx4 a4, a2, a0 +40208f61: 2cc001 l32r a0, 401d4264 <_lit4_end+0xcdf38> +40208f64: 5a4520 excw +40208f67: f10802 l8ui a0, a8, 241 +40208f6a: e1c8 l32i.n a12, a1, 56 +40208f6c: d1d8 l32i.n a13, a1, 52 +40208f6e: c1e8 l32i.n a14, a1, 48 +40208f70: b1f8 l32i.n a15, a1, 44 +40208f72: 40c112 addi a1, a1, 64 +40208f75: f00d ret.n +40208f77: 84f300 extui a15, a0, 3, 9 +40208f7a: fe .byte 0xfe +40208f7b: 3f .byte 0x3f +40208f7c: ffff31 l32r a3, 40208f78 +40208f7f: f0c112 addi a1, a1, -16 +40208f82: 000342 l8ui a4, a3, 0 +40208f85: 010352 l8ui a5, a3, 1 +40208f88: 004142 s8i a4, a1, 0 +40208f8b: 020342 l8ui a4, a3, 2 +40208f8e: 030332 l8ui a3, a3, 3 +40208f91: 024142 s8i a4, a1, 2 +40208f94: 034132 s8i a3, a1, 3 +40208f97: 010232 l8ui a3, a2, 1 +40208f9a: 014152 s8i a5, a1, 1 +40208f9d: 040c movi.n a4, 0 +40208f9f: 2a53f6 bgeui a3, 5, 40208fcd +40208fa2: 323a add.n a3, a2, a3 +40208fa4: 1a1327 beq a3, a2, 40208fc2 +40208fa7: 020252 l8ui a5, a2, 2 +40208faa: 00a042 movi a4, 0 +40208fad: 645050 extui a5, a5, 0, 7 +40208fb0: 614a add.n a6, a1, a4 +40208fb2: 000662 l8ui a6, a6, 0 +40208fb5: 0f1657 beq a6, a5, 40208fc8 +40208fb8: 441b addi.n a4, a4, 1 +40208fba: f24466 bnei a4, 4, 40208fb0 +40208fbd: 040c movi.n a4, 0 +40208fbf: 000286 j 40208fcd +40208fc2: 140c movi.n a4, 1 +40208fc4: 000146 j 40208fcd +40208fc7: 221b00 excw +40208fca: fff586 j 40208fa4 +40208fcd: 042d mov.n a2, a4 +40208fcf: 10c112 addi a1, a1, 16 +40208fd2: f00d ret.n +40208fd4: e69c beqz.n a6, 40208ff6 +40208fd6: fe .byte 0xfe +40208fd7: 3f .byte 0x3f +40208fd8: fecf14 excw +40208fdb: 3f .byte 0x3f +40208fdc: 209380 or a9, a3, a8 +40208fdf: 8e3c40 excw +40208fe2: 124020 excw +40208fe5: e9d0c1 l32r a12, 40203728 +40208fe8: 04e181 l32r a8, 401ca36c <_lit4_end+0xc4040> +40208feb: ff .byte 0xff +40208fec: a1c9 s32i.n a12, a1, 40 +40208fee: 02cd mov.n a12, a2 +40208ff0: ed2e22 l32i a2, a14, 0x3b4 +40208ff3: b109 s32i.n a0, a1, 44 +40208ff5: 0961d2 s32i a13, a1, 36 +40208ff8: 0761f2 s32i a15, a1, 28 +40208ffb: 042216 beqz a2, 40209041 +40208ffe: 3f92c7 bne a2, a12, 40209041 +40209001: 262cd2 l32i a13, a12, 152 +40209004: ebec01 l32r a0, 40203fb4 +40209007: 0000c0 callx0 a0 +4020900a: 161d27 beq a13, a2, 40209024 +4020900d: f0a401 l32r a0, 402052a0 +40209010: 0000c0 callx0 a0 +40209013: e2d4f1 l32r a15, 40201b64 +40209016: 02dfd2 addmi a13, a15, 0x200 +40209019: 140d22 l8ui a2, a13, 20 +4020901c: 293226 beqi a2, 3, 40209049 +4020901f: 002486 j 402090b5 +40209022: 320000 excw +40209025: 2e .byte 0x2e +40209026: a122f0 excw +40209029: 232040 excw +4020902c: 6e2220 excw +4020902f: e931f0 excw +40209032: ff .byte 0xff +40209033: e2cc21 l32r a2, 40201b64 +40209036: 000332 l8ui a3, a3, 0 +40209039: 4228 l32i.n a2, a2, 16 +4020903b: d24232 s8i a3, a2, 210 +4020903e: 001b86 j 402090b0 +40209041: fc8c56 bnez a12, 4020900d +40209044: 120c movi.n a2, 1 +40209046: 003c86 j 4020913c +40209049: 000d22 l8ui a2, a13, 0 +4020904c: 065216 beqz a2, 402090b5 +4020904f: 080d22 l8ui a2, a13, 8 +40209052: 5f1226 beqi a2, 1, 402090b5 +40209055: 262c32 l32i a3, a12, 152 +40209058: 0139 s32i.n a3, a1, 0 +4020905a: ebd601 l32r a0, 40203fb4 +4020905d: 0000c0 callx0 a0 +40209060: 0138 l32i.n a3, a1, 0 +40209062: 4f1327 beq a3, a2, 402090b5 +40209065: 120c movi.n a2, 1 +40209067: 084d22 s8i a2, a13, 8 +4020906a: 320c movi.n a2, 3 +4020906c: 094d22 s8i a2, a13, 9 +4020906f: 262c22 l32i a2, a12, 152 +40209072: 816fc2 s32i a12, a15, 0x204 +40209075: f8f785 call0 40201ff0 +40209078: 0a4d22 s8i a2, a13, 10 +4020907b: f08a01 l32r a0, 402052a4 +4020907e: 0000c0 callx0 a0 +40209081: ffd5e1 l32r a14, 40208fd8 +40209084: 0e2d mov.n a2, a14 +40209086: ebcd01 l32r a0, 40203fbc +40209089: 0000c0 callx0 a0 +4020908c: ffd431 l32r a3, 40208fdc +4020908f: 0c4d mov.n a4, a12 +40209091: 0e2d mov.n a2, a14 +40209093: ecc801 l32r a0, 402043b4 +40209096: 0000c0 callx0 a0 +40209099: 090d22 l8ui a2, a13, 9 +4020909c: 0e1c32 l16ui a3, a12, 28 +4020909f: 221b addi.n a2, a2, 1 +402090a1: 823230 mull a3, a2, a3 +402090a4: 150c movi.n a5, 1 +402090a6: 040c movi.n a4, 0 +402090a8: 0e2d mov.n a2, a14 +402090aa: ebc301 l32r a0, 40203fb8 +402090ad: 0000c0 callx0 a0 +402090b0: 020c movi.n a2, 0 +402090b2: 002186 j 4020913c +402090b5: f07b01 l32r a0, 402052a4 +402090b8: 0000c0 callx0 a0 +402090bb: 020c movi.n a2, 0 +402090bd: 0d5c22 s16i a2, a12, 26 +402090c0: f8f485 call0 4020200c +402090c3: b42020 extui a2, a2, 0, 12 +402090c6: 5e5c22 s16i a2, a12, 188 +402090c9: ff3216 beqz a2, 402090c0 +402090cc: 01dc22 addmi a2, a12, 0x100 +402090cf: 04a032 movi a3, 4 +402090d2: 084232 s8i a3, a2, 8 +402090d5: f07201 l32r a0, 402052a0 +402090d8: 0000c0 callx0 a0 +402090db: 262c22 l32i a2, a12, 152 +402090de: 4b2f32 l32i a3, a15, 0x12c +402090e1: 071327 beq a3, a2, 402090ec +402090e4: f06a31 l32r a3, 4020528c +402090e7: 140c movi.n a4, 1 +402090e9: 004342 s8i a4, a3, 0 +402090ec: 4b6f22 s32i a2, a15, 0x12c +402090ef: f06d01 l32r a0, 402052a4 +402090f2: 0000c0 callx0 a0 +402090f5: e4a321 l32r a2, 40202384 +402090f8: 262cd2 l32i a13, a12, 152 +402090fb: 0020c0 memw +402090fe: 002222 l32i a2, a2, 0 +40209101: ef6e22 s32i a2, a14, 0x3bc +40209104: ebac01 l32r a0, 40203fb4 +40209107: 0000c0 callx0 a0 +4020910a: 221d27 beq a13, a2, 40209130 +4020910d: ffb4d1 l32r a13, 40208fe0 +40209110: 0c4d mov.n a4, a12 +40209112: 0d3d mov.n a3, a13 +40209114: 320c movi.n a2, 3 +40209116: fcbb85 call0 40205cd0 +40209119: 0d5d mov.n a5, a13 +4020911b: f25256 bnez a2, 40209044 +4020911e: 040c movi.n a4, 0 +40209120: 262c22 l32i a2, a12, 152 +40209123: 0c7d mov.n a7, a12 +40209125: 0d6d mov.n a6, a13 +40209127: 043d mov.n a3, a4 +40209129: fcd405 call0 40205e6c +4020912c: 000246 j 40209139 +4020912f: a03200 addx4 a3, a2, a0 +40209132: 2cc000 excw +40209135: d04520 subx2 a4, a5, a2 +40209138: ff .byte 0xff +40209139: 02a022 movi a2, 2 +4020913c: b108 l32i.n a0, a1, 44 +4020913e: a1c8 l32i.n a12, a1, 40 +40209140: 91d8 l32i.n a13, a1, 36 +40209142: 81e8 l32i.n a14, a1, 32 +40209144: 71f8 l32i.n a15, a1, 28 +40209146: 30c112 addi a1, a1, 48 +40209149: f00d ret.n +4020914b: cf0c00 excw +4020914e: fe .byte 0xfe +4020914f: 3f .byte 0x3f +40209150: 230375 excw +40209153: 00ff40 excw +40209156: ff .byte 0xff +40209157: 033000 excw +4020915a: f44023 excw +4020915d: 600011 l32r a1, 401e1160 <_lit4_end+0xdae34> +40209160: d228 l32i.n a2, a2, 52 +40209162: fe .byte 0xfe +40209163: 3f .byte 0x3f + +40209164 : +40209164: b0a092 movi a9, 176 +40209167: c01190 sub a1, a1, a9 +4020916a: 2b6102 s32i a0, a1, 172 +4020916d: 2a61c2 s32i a12, a1, 168 +40209170: 2961d2 s32i a13, a1, 164 +40209173: 2861e2 s32i a14, a1, 160 +40209176: 2761f2 s32i a15, a1, 156 +40209179: 1e7356 bnez a3, 40209364 +4020917c: e27ac1 l32r a12, 40201b64 +4020917f: fe9f51 l32r a5, 40208bfc +40209182: 4c28 l32i.n a2, a12, 16 +40209184: 0538 l32i.n a3, a5, 0 +40209186: 216122 s32i a2, a1, 132 +40209189: 021c movi.n a2, 16 +4020918b: 0e0c movi.n a14, 0 +4020918d: 202320 or a2, a3, a2 +40209190: 0529 s32i.n a2, a5, 0 +40209192: 0efd mov.n a15, a14 +40209194: 2061e2 s32i a14, a1, 128 +40209197: 05dd mov.n a13, a5 +40209199: fff131 l32r a3, 40209160 +4020919c: b10322 l8ui a2, a3, 177 +4020919f: 4bbf27 bgeu a15, a2, 402091ee +402091a2: e8a032 movi a3, 232 +402091a5: 2f3a add.n a2, a15, a3 +402091a7: a022d0 addx4 a2, a2, a13 +402091aa: 1268 l32i.n a6, a2, 4 +402091ac: 02dc22 addmi a2, a12, 0x200 +402091af: b50222 l8ui a2, a2, 181 +402091b2: 72dc bnez.n a2, 402091cd +402091b4: 062d mov.n a2, a6 +402091b6: 236162 s32i a6, a1, 140 +402091b9: ffa445 call0 40208c00 +402091bc: 202132 l32i a3, a1, 128 +402091bf: 232162 l32i a6, a1, 140 +402091c2: 1fb327 bgeu a3, a2, 402091e5 +402091c5: 06ed mov.n a14, a6 +402091c7: 206122 s32i a2, a1, 128 +402091ca: 0005c6 j 402091e5 +402091cd: f6fd21 l32r a2, 40206dc4 +402091d0: 063d mov.n a3, a6 +402091d2: 640c movi.n a4, 6 +402091d4: 236162 s32i a6, a1, 140 +402091d7: e29101 l32r a0, 40201c1c +402091da: 0000c0 callx0 a0 +402091dd: 232162 l32i a6, a1, 140 +402091e0: c28c beqz.n a2, 402091f0 +402091e2: fff386 j 402091b4 +402091e5: 7f1b addi.n a7, a15, 1 +402091e7: 74f070 extui a15, a7, 0, 8 +402091ea: ffeac6 j 40209199 +402091ed: 0e6d00 excw +402091f0: 868c beqz.n a6, 402091fc +402091f2: 0e0c movi.n a14, 0 +402091f4: e8a0f2 movi a15, 232 +402091f7: 0e4d mov.n a4, a14 +402091f9: 004786 j 4020931b +402091fc: ffd431 l32r a3, 4020914c +402091ff: 000322 l8ui a2, a3, 0 +40209202: 221b addi.n a2, a2, 1 +40209204: 742020 extui a2, a2, 0, 8 +40209207: 004322 s8i a2, a3, 0 +4020920a: 145266 bnei a2, 5, 40209222 +4020920d: 012d mov.n a2, a1 +4020920f: 090445 call0 40212254 +40209212: 610122 l8ui a2, a1, 97 +40209215: 091266 bnei a2, 1, 40209222 +40209218: 020c movi.n a2, 0 +4020921a: 614122 s8i a2, a1, 97 +4020921d: 012d mov.n a2, a1 +4020921f: 092a45 call0 402124c4 +40209222: ecf821 l32r a2, 40204604 +40209225: 0228 l32i.n a2, a2, 0 +40209227: 05a216 beqz a2, 40209285 +4020922a: ffc9e1 l32r a14, 40209150 +4020922d: f9a142 movi a4, 0x1f9 +40209230: 0e3d mov.n a3, a14 +40209232: c22c movi.n a2, 44 +40209234: e38701 l32r a0, 40202050 +40209237: 0000c0 callx0 a0 +4020923a: 02dd mov.n a13, a2 +4020923c: 045216 beqz a2, 40209285 +4020923f: 120c movi.n a2, 1 +40209241: 0d29 s32i.n a2, a13, 0 +40209243: c9af22 movi a2, -55 +40209246: 2b4d22 s8i a2, a13, 43 +40209249: 640c movi.n a4, 6 +4020924b: 030c movi.n a3, 0 +4020924d: 25cd22 addi a2, a13, 37 +40209250: df7001 l32r a0, 40201010 <_irom0_text_start> +40209253: 0000c0 callx0 a0 +40209256: e6dc31 l32r a3, 40202dc8 +40209259: 042c movi.n a4, 32 +4020925b: 2d4b addi.n a2, a13, 4 +4020925d: df6d01 l32r a0, 40201014 <_irom0_text_start+0x4> +40209260: 0000c0 callx0 a0 +40209263: 862c22 l32i a2, a12, 0x218 +40209266: 0d4d mov.n a4, a13 +40209268: 244d22 s8i a2, a13, 36 +4020926b: c9a032 movi a3, 201 +4020926e: 521c movi.n a2, 21 +40209270: ecee01 l32r a0, 40204628 +40209273: 0000c0 callx0 a0 +40209276: b28c beqz.n a2, 40209285 +40209278: 04a242 movi a4, 0x204 +4020927b: 0e3d mov.n a3, a14 +4020927d: 0d2d mov.n a2, a13 +4020927f: e0a201 l32r a0, 40201508 +40209282: 0000c0 callx0 a0 +40209285: 4c28 l32i.n a2, a12, 16 +40209287: ffb331 l32r a3, 40209154 +4020928a: 342242 l32i a4, a2, 208 +4020928d: 028437 bany a4, a3, 40209293 +40209290: 003406 j 40209364 +40209293: d20222 l8ui a2, a2, 210 +40209296: 162226 beqi a2, 2, 402092b0 +40209299: 320c movi.n a2, 3 +4020929b: 013485 call0 4020a5e4 +4020929e: 098a85 call0 40212b48 +402092a1: 0b1266 bnei a2, 1, 402092b0 +402092a4: e6c931 l32r a3, 40202dc8 +402092a7: ffac21 l32r a2, 40209158 +402092aa: e36801 l32r a0, 4020204c +402092ad: 0000c0 callx0 a0 +402092b0: ecdd31 l32r a3, 40204624 +402092b3: ffaa21 l32r a2, 4020915c +402092b6: 0020c0 memw +402092b9: 0239 s32i.n a3, a2, 0 +402092bb: 0988c5 call0 40212b48 +402092be: 021226 beqi a2, 1, 402092c4 +402092c1: 0027c6 j 40209364 +402092c4: 212122 l32i a2, a1, 132 +402092c7: c24b addi.n a12, a2, 4 +402092c9: 0c2d mov.n a2, a12 +402092cb: eb3c01 l32r a0, 40203fbc +402092ce: 0000c0 callx0 a0 +402092d1: f4c631 l32r a3, 402065ec +402092d4: 0c2d mov.n a2, a12 +402092d6: 040c movi.n a4, 0 +402092d8: ec3701 l32r a0, 402043b4 +402092db: 0000c0 callx0 a0 +402092de: 150c movi.n a5, 1 +402092e0: 040c movi.n a4, 0 +402092e2: e8a332 movi a3, 0x3e8 +402092e5: 0c2d mov.n a2, a12 +402092e7: eb3401 l32r a0, 40203fb8 +402092ea: 0000c0 callx0 a0 +402092ed: 001cc6 j 40209364 +402092f0: 2efa add.n a2, a14, a15 +402092f2: a022d0 addx4 a2, a2, a13 +402092f5: 1228 l32i.n a2, a2, 4 +402092f7: 1b1627 beq a6, a2, 40209316 +402092fa: 34a132 movi a3, 0x134 +402092fd: 226142 s32i a4, a1, 136 +40209300: 236162 s32i a6, a1, 140 +40209303: f24e01 l32r a0, 40205c3c +40209306: 0000c0 callx0 a0 +40209309: 2efa add.n a2, a14, a15 +4020930b: 222142 l32i a4, a1, 136 +4020930e: a022d0 addx4 a2, a2, a13 +40209311: 232162 l32i a6, a1, 140 +40209314: 1249 s32i.n a4, a2, 4 +40209316: ee1b addi.n a14, a14, 1 +40209318: 74e0e0 extui a14, a14, 0, 8 +4020931b: ff9131 l32r a3, 40209160 +4020931e: b10322 l8ui a2, a3, 177 +40209321: cb3e27 bltu a14, a2, 402092f0 +40209324: 120c movi.n a2, 1 +40209326: b14322 s8i a2, a3, 177 +40209329: 4c38 l32i.n a3, a12, 16 +4020932b: e96d62 s32i a6, a13, 0x3a4 +4020932e: d20342 l8ui a4, a3, 210 +40209331: 073466 bnei a4, 3, 4020933c +40209334: d24322 s8i a2, a3, 210 +40209337: 020c movi.n a2, 0 +40209339: d14322 s8i a2, a3, 209 +4020933c: 202660 or a2, a6, a6 +4020933f: ffca45 call0 40208fe4 +40209342: 00f256 bnez a2, 40209355 +40209345: 002d32 l32i a3, a13, 0 +40209348: f26c movi.n a2, -17 +4020934a: 102320 and a2, a3, a2 +4020934d: 0d29 s32i.n a2, a13, 0 +4020934f: 000446 j 40209364 +40209352: 000000 ill +40209355: 0b1266 bnei a2, 1, 40209364 +40209358: f02d32 l32i a3, a13, 0x3c0 +4020935b: 40a122 movi a2, 0x140 +4020935e: 202320 or a2, a3, a2 +40209361: f06d22 s32i a2, a13, 0x3c0 +40209364: 2b2102 l32i a0, a1, 172 +40209367: b0a092 movi a9, 176 +4020936a: 2a21c2 l32i a12, a1, 168 +4020936d: 2921d2 l32i a13, a1, 164 +40209370: 2821e2 l32i a14, a1, 160 +40209373: 2721f2 l32i a15, a1, 156 +40209376: 119a add.n a1, a1, a9 +40209378: f00d ret.n +4020937a: 1a0000 excw +4020937d: 402303 excw + +40209380 : +40209380: f0c112 addi a1, a1, -16 +40209383: 11d9 s32i.n a13, a1, 4 +40209385: e1f7d1 l32r a13, 40201b64 +40209388: 21c9 s32i.n a12, a1, 8 +4020938a: 01e9 s32i.n a14, a1, 0 +4020938c: 036102 s32i a0, a1, 12 +4020938f: 02ddc2 addmi a12, a13, 0x200 +40209392: 20e220 or a14, a2, a2 +40209395: 0a0c32 l8ui a3, a12, 10 +40209398: fff921 l32r a2, 4020937c +4020939b: e32c01 l32r a0, 4020204c +4020939e: 0000c0 callx0 a0 +402093a1: 8e8c beqz.n a14, 402093ad +402093a3: 0e2d mov.n a2, a14 +402093a5: ffc3c5 call0 40208fe4 +402093a8: 001846 j 4020940d +402093ab: 420000 excw +402093ae: 4000a0 excw +402093b1: 0c2034 excw +402093b4: 918532 excw +402093b7: 0cfc bnez.n a12, 402093eb +402093b9: 625613 excw +402093bc: 0c2205 call0 402155e0 +402093bf: 320a add.n a3, a2, a0 +402093c1: 0b80a0 excw +402093c4: 222022 l32i a2, a0, 136 +402093c7: 223090 excw +402093ca: 070ca0 excw +402093cd: 2d2a add.n a2, a13, a2 +402093cf: 076d mov.n a6, a7 +402093d1: 075d mov.n a5, a7 +402093d3: 074d mov.n a4, a7 +402093d5: 073d mov.n a3, a7 +402093d7: 224b addi.n a2, a2, 4 +402093d9: fca905 call0 40205e6c +402093dc: d2ec bnez.n a2, 4020940d +402093de: efb001 l32r a0, 402052a0 +402093e1: 0000c0 callx0 a0 +402093e4: 0a0c22 l8ui a2, a12, 10 +402093e7: 80a032 movi a3, 128 +402093ea: 220b addi.n a2, a2, -1 +402093ec: 902220 addx2 a2, a2, a2 +402093ef: a02230 addx4 a2, a2, a3 +402093f2: 2d2a add.n a2, a13, a2 +402093f4: 4b2d32 l32i a3, a13, 0x12c +402093f7: 224b addi.n a2, a2, 4 +402093f9: 071327 beq a3, a2, 40209404 +402093fc: efa431 l32r a3, 4020528c +402093ff: 140c movi.n a4, 1 +40209401: 004342 s8i a4, a3, 0 +40209404: 4b6d22 s32i a2, a13, 0x12c +40209407: efa701 l32r a0, 402052a4 +4020940a: 0000c0 callx0 a0 +4020940d: 020c movi.n a2, 0 +4020940f: 084c22 s8i a2, a12, 8 +40209412: 030c movi.n a3, 0 +40209414: 3108 l32i.n a0, a1, 12 +40209416: 032d mov.n a2, a3 +40209418: 21c8 l32i.n a12, a1, 8 +4020941a: 11d8 l32i.n a13, a1, 4 +4020941c: 01e8 l32i.n a14, a1, 0 +4020941e: 10c112 addi a1, a1, 16 +40209421: f00d ret.n +40209423: 9b7400 excw +40209426: 20 .byte 0x20 +40209427: 40 .byte 0x40 + +40209428 : +40209428: f0c112 addi a1, a1, -16 +4020942b: 21c9 s32i.n a12, a1, 8 +4020942d: fdf3c1 l32r a12, 40208bfc +40209430: 11d9 s32i.n a13, a1, 4 +40209432: c8a332 movi a3, 0x3c8 +40209435: 02dd mov.n a13, a2 +40209437: 0c2d mov.n a2, a12 +40209439: 3109 s32i.n a0, a1, 12 +4020943b: f20001 l32r a0, 40205c3c +4020943e: 0000c0 callx0 a0 +40209441: 0c38 l32i.n a3, a12, 0 +40209443: 220c movi.n a2, 2 +40209445: 0dc9 s32i.n a12, a13, 0 +40209447: 202320 or a2, a3, a2 +4020944a: 0c29 s32i.n a2, a12, 0 +4020944c: 03dcc2 addmi a12, a12, 0x300 +4020944f: f20c movi.n a2, 15 +40209451: b04c22 s8i a2, a12, 176 +40209454: fff421 l32r a2, 40209424 +40209457: 030c movi.n a3, 0 +40209459: 178905 call0 40220cec +4020945c: 3108 l32i.n a0, a1, 12 +4020945e: 21c8 l32i.n a12, a1, 8 +40209460: 11d8 l32i.n a13, a1, 4 +40209462: 10c112 addi a1, a1, 16 +40209465: f00d ret.n +40209467: 840000 extui a0, a0, 0, 9 +4020946a: 880000 excw +4020946d: 3ffee6 bgei a14, 0x100, 402094b0 +40209470: 208d34 excw +40209473: 916440 excw +40209476: 20 .byte 0x20 +40209477: 40 .byte 0x40 + +40209478 : +40209478: d0c112 addi a1, a1, -48 +4020947b: 81e9 s32i.n a14, a1, 32 +4020947d: e1b9e1 l32r a14, 40201b64 +40209480: 91d9 s32i.n a13, a1, 36 +40209482: 71f9 s32i.n a15, a1, 28 +40209484: b109 s32i.n a0, a1, 44 +40209486: a1c9 s32i.n a12, a1, 40 +40209488: 02fd mov.n a15, a2 +4020948a: 852e22 l32i a2, a14, 0x214 +4020948d: 74d030 extui a13, a3, 0, 8 +40209490: f42020 extui a2, a2, 0, 16 +40209493: 01a132 movi a3, 0x101 +40209496: 269237 bne a2, a3, 402094c0 +40209499: fff4c1 l32r a12, 4020946c +4020949c: 202cc0 or a2, a12, a12 +4020949f: eac701 l32r a0, 40203fbc +402094a2: 0000c0 callx0 a0 +402094a5: fff231 l32r a3, 40209470 +402094a8: 040c movi.n a4, 0 +402094aa: 0c2d mov.n a2, a12 +402094ac: ebc201 l32r a0, 402043b4 +402094af: 0000c0 callx0 a0 +402094b2: 150c movi.n a5, 1 +402094b4: 054d mov.n a4, a5 +402094b6: 233c movi.n a3, 50 +402094b8: 0c2d mov.n a2, a12 +402094ba: eabf01 l32r a0, 40203fb8 +402094bd: 0000c0 callx0 a0 +402094c0: e1aa31 l32r a3, 40201b68 +402094c3: 021c movi.n a2, 16 +402094c5: 0020c0 memw +402094c8: 0348 l32i.n a4, a3, 0 +402094ca: 202420 or a2, a4, a2 +402094cd: 0020c0 memw +402094d0: 0329 s32i.n a2, a3, 0 +402094d2: a90f22 l8ui a2, a15, 169 +402094d5: c28c beqz.n a2, 402094e5 +402094d7: aaa042 movi a4, 170 +402094da: 4f4a add.n a4, a15, a4 +402094dc: 030c movi.n a3, 0 +402094de: 220c movi.n a2, 2 +402094e0: 000206 j 402094ec +402094e3: 420000 excw +402094e6: 3d00a0 excw +402094e9: 042d04 excw +402094ec: 19d405 call0 40223230 +402094ef: fcf505 call0 40206440 +402094f2: 0fa5c2 movi a12, 0x50f +402094f5: 7d8c beqz.n a13, 40209500 +402094f7: 202dd0 or a2, a13, a13 +402094fa: fd6485 call0 40206b44 +402094fd: ffdac1 l32r a12, 40209468 +40209500: fdbfd1 l32r a13, 40208bfc +40209503: 1d28 l32i.n a2, a13, 4 +40209505: 086207 bbci a2, 0, 40209511 +40209508: ec3b21 l32r a2, 402045f4 +4020950b: 20cc20 or a12, a12, a2 +4020950e: 000346 j 4020951f +40209511: 0c0f42 l8ui a4, a15, 12 +40209514: 01a052 movi a5, 1 +40209517: 10cf32 addi a3, a15, 16 +4020951a: 020c movi.n a2, 0 +4020951c: fcf485 call0 40206468 +4020951f: 4cecf7 bbsi a12, 15, 4020956f +40209522: 02def2 addmi a15, a14, 0x200 +40209525: a40f32 l8ui a3, a15, 164 +40209528: 0139 s32i.n a3, a1, 0 +4020952a: f88645 call0 40201d90 +4020952d: 0138 l32i.n a3, a1, 0 +4020952f: 122327 blt a3, a2, 40209545 +40209532: a40f32 l8ui a3, a15, 164 +40209535: 0139 s32i.n a3, a1, 0 +40209537: f883c5 call0 40201d74 +4020953a: 0138 l32i.n a3, a1, 0 +4020953c: 053237 bltu a2, a3, 40209545 +4020953f: a40ff2 l8ui a15, a15, 164 +40209542: 000206 j 4020954e +40209545: e62021 l32r a2, 40202dc8 +40209548: fcfa85 call0 402064f4 +4020954b: 74f020 extui a15, a2, 0, 8 +4020954e: f88405 call0 40201d90 +40209551: 0baf27 bge a15, a2, 40209560 +40209554: f88385 call0 40201d90 +40209557: 74f020 extui a15, a2, 0, 8 +4020955a: 000206 j 40209566 +4020955d: 000000 ill +40209560: f88105 call0 40201d74 +40209563: ed32f7 bltu a2, a15, 40209554 +40209566: fbee21 l32r a2, 40208520 +40209569: 203ff0 or a3, a15, a15 +4020956c: fd0285 call0 40206598 +4020956f: 042e22 l32i a2, a14, 16 +40209572: fe9831 l32r a3, 40208fd4 +40209575: d20242 l8ui a4, a2, 210 +40209578: 004342 s8i a4, a3, 0 +4020957b: d10242 l8ui a4, a2, 209 +4020957e: 130c movi.n a3, 1 +40209580: 14cc bnez.n a4, 40209585 +40209582: d24232 s8i a3, a2, 210 +40209585: 142242 l32i a4, a2, 80 +40209588: d04232 s8i a3, a2, 208 +4020958b: bfaf32 movi a3, -65 +4020958e: 103430 and a3, a4, a3 +40209591: 146232 s32i a3, a2, 80 +40209594: 002d32 l32i a3, a13, 0 +40209597: 10a022 movi a2, 16 +4020959a: 202320 or a2, a3, a2 +4020959d: 0d29 s32i.n a2, a13, 0 +4020959f: 020c movi.n a2, 0 +402095a1: fcea85 call0 4020644c +402095a4: ffb441 l32r a4, 40209474 +402095a7: 0c2d mov.n a2, a12 +402095a9: 050c movi.n a5, 0 +402095ab: 230c movi.n a3, 2 +402095ad: fd3705 call0 40206920 +402095b0: b108 l32i.n a0, a1, 44 +402095b2: a1c8 l32i.n a12, a1, 40 +402095b4: 91d8 l32i.n a13, a1, 36 +402095b6: 81e8 l32i.n a14, a1, 32 +402095b8: 71f8 l32i.n a15, a1, 28 +402095ba: 30c112 addi a1, a1, 48 +402095bd: f00d ret.n +402095bf: 035100 excw +402095c2: 0d4023 excw +402095c5: cf .byte 0xcf +402095c6: fe .byte 0xfe +402095c7: 3f .byte 0x3f + +402095c8 : +402095c8: f0c112 addi a1, a1, -16 +402095cb: 21c9 s32i.n a12, a1, 8 +402095cd: e165c1 l32r a12, 40201b64 +402095d0: fffc21 l32r a2, 402095c0 +402095d3: 11d9 s32i.n a13, a1, 4 +402095d5: 4cd8 l32i.n a13, a12, 16 +402095d7: 3109 s32i.n a0, a1, 12 +402095d9: e29c01 l32r a0, 4020204c +402095dc: 0000c0 callx0 a0 +402095df: 112d32 l32i a3, a13, 68 +402095e2: 0c2d mov.n a2, a12 +402095e4: 439c beqz.n a3, 402095fc +402095e6: fff7c1 l32r a12, 402095c4 +402095e9: 130c movi.n a3, 1 +402095eb: 040c movi.n a4, 0 +402095ed: 004c32 s8i a3, a12, 0 +402095f0: 203440 or a3, a4, a4 +402095f3: 0105c5 call0 4020a650 +402095f6: 00a022 movi a2, 0 +402095f9: 004c22 s8i a2, a12, 0 +402095fc: fed821 l32r a2, 4020915c +402095ff: 0020c0 memw +40209602: 0248 l32i.n a4, a2, 0 +40209604: 0020c0 memw +40209607: 0238 l32i.n a3, a2, 0 +40209609: f54040 extui a4, a4, 16, 16 +4020960c: 745030 extui a5, a3, 0, 8 +4020960f: fe0a21 l32r a2, 40208e38 +40209612: 081466 bnei a4, 1, 4020961e +40209615: 0da042 movi a4, 13 +40209618: 743030 extui a3, a3, 0, 8 +4020961b: 01b457 bgeu a4, a5, 40209620 +4020961e: 030c movi.n a3, 0 +40209620: ffe545 call0 40209478 +40209623: 032102 l32i a0, a1, 12 +40209626: 0221c2 l32i a12, a1, 8 +40209629: 0121d2 l32i a13, a1, 4 +4020962c: 10c112 addi a1, a1, 16 +4020962f: f00d ret.n +40209631: 000000 ill + +40209634 : +40209634: f0c112 addi a1, a1, -16 +40209637: 21c9 s32i.n a12, a1, 8 +40209639: e14ac1 l32r a12, 40201b64 +4020963c: 3109 s32i.n a0, a1, 12 +4020963e: 01dc22 addmi a2, a12, 0x100 +40209641: de0232 l8ui a3, a2, 222 +40209644: 114366 bnei a3, 4, 40209659 +40209647: 030c movi.n a3, 0 +40209649: de4232 s8i a3, a2, 222 +4020964c: 792c22 l32i a2, a12, 0x1e4 +4020964f: 628c beqz.n a2, 40209659 +40209651: 3228 l32i.n a2, a2, 12 +40209653: 002216 beqz a2, 40209659 +40209656: 0002c0 callx0 a2 +40209659: 02a042 movi a4, 2 +4020965c: 030c movi.n a3, 0 +4020965e: 0c2d mov.n a2, a12 +40209660: 00fec5 call0 4020a650 +40209663: 094e45 call0 40212b48 +40209666: 021266 bnei a2, 1, 4020966c +40209669: fff5c5 call0 402095c8 +4020966c: 3108 l32i.n a0, a1, 12 +4020966e: 21c8 l32i.n a12, a1, 8 +40209670: 10c112 addi a1, a1, 16 +40209673: f00d ret.n +40209675: 000000 ill +40209678: 208e04 excw +4020967b: 02c840 excw +4020967e: 124023 excw +40209681: c9f0c1 l32r a12, 401fbe44 <_lit4_end+0xf5b18> +40209684: 37c121 l32r a2, 401d7588 <_lit4_end+0xd125c> +40209687: 3109e1 l32r a14, 401d5aac <_lit4_end+0xcf780> +4020968a: 042c22 l32i a2, a12, 16 +4020968d: 00a042 movi a4, 0 +40209690: 400232 l8ui a3, a2, 64 +40209693: 18c222 addi a2, a2, 24 +40209696: 63fc bnez.n a3, 402096d0 +40209698: fff831 l32r a3, 40209678 +4020969b: eb4601 l32r a0, 402043b4 +4020969e: 0000c0 callx0 a0 +402096a1: 4c28 l32i.n a2, a12, 16 +402096a3: 18c222 addi a2, a2, 24 +402096a6: ea4501 l32r a0, 40203fbc +402096a9: 0000c0 callx0 a0 +402096ac: 4c28 l32i.n a2, a12, 16 +402096ae: 150c movi.n a5, 1 +402096b0: 242232 l32i a3, a2, 144 +402096b3: 18c222 addi a2, a2, 24 +402096b6: 0e1342 l16ui a4, a3, 28 +402096b9: 1134c0 slli a3, a4, 4 +402096bc: c03340 sub a3, a3, a4 +402096bf: 401500 ssl a5 +402096c2: a13300 sll a3, a3 +402096c5: 040c movi.n a4, 0 +402096c7: ea3c01 l32r a0, 40203fb8 +402096ca: 0000c0 callx0 a0 +402096cd: 001a46 j 4020973a +402096d0: 1153f6 bgeui a3, 5, 402096e5 +402096d3: fdcb31 l32r a3, 40208e00 +402096d6: eb3701 l32r a0, 402043b4 +402096d9: 0000c0 callx0 a0 +402096dc: ff6a45 call0 40208d84 +402096df: 0015c6 j 4020973a +402096e2: 000000 ill +402096e5: ffe431 l32r a3, 40209678 +402096e8: eb3301 l32r a0, 402043b4 +402096eb: 0000c0 callx0 a0 +402096ee: ffe321 l32r a2, 4020967c +402096f1: e25601 l32r a0, 4020204c +402096f4: 0000c0 callx0 a0 +402096f7: 140c movi.n a4, 1 +402096f9: 030c movi.n a3, 0 +402096fb: 0c2d mov.n a2, a12 +402096fd: 00f505 call0 4020a650 +40209700: f28121 l32r a2, 40206104 +40209703: 460222 l8ui a2, a2, 70 +40209706: 136207 bbci a2, 0, 4020971d +40209709: 4c28 l32i.n a2, a12, 16 +4020970b: 330c movi.n a3, 3 +4020970d: d04232 s8i a3, a2, 208 +40209710: d24232 s8i a3, a2, 210 +40209713: 030c movi.n a3, 0 +40209715: d14232 s8i a3, a2, 209 +40209718: 000786 j 4020973a +4020971b: 220000 excw +4020971e: 042c movi.n a4, 32 +40209720: 00a032 movi a3, 0 +40209723: d04232 s8i a3, a2, 208 +40209726: d24232 s8i a3, a2, 210 +40209729: d14232 s8i a3, a2, 209 +4020972c: 094185 call0 40212b48 +4020972f: 071266 bnei a2, 1, 4020973a +40209732: fdc121 l32r a2, 40208e38 +40209735: 030c movi.n a3, 0 +40209737: ffd405 call0 40209478 +4020973a: 3108 l32i.n a0, a1, 12 +4020973c: 21c8 l32i.n a12, a1, 8 +4020973e: 10c112 addi a1, a1, 16 +40209741: f00d ret.n +40209743: 035c00 excw +40209746: 23 .byte 0x23 +40209747: 40 .byte 0x40 + +40209748 : +40209748: d0c112 addi a1, a1, -48 +4020974b: a1c9 s32i.n a12, a1, 40 +4020974d: 02cd mov.n a12, a2 +4020974f: e10521 l32r a2, 40201b64 +40209752: 81e9 s32i.n a14, a1, 32 +40209754: 4228 l32i.n a2, a2, 16 +40209756: 71f9 s32i.n a15, a1, 28 +40209758: b109 s32i.n a0, a1, 44 +4020975a: 91d9 s32i.n a13, a1, 36 +4020975c: 342222 l32i a2, a2, 208 +4020975f: 03ed mov.n a14, a3 +40209761: 20f440 or a15, a4, a4 +40209764: 0cf297 bbsi a2, 25, 40209774 +40209767: fff721 l32r a2, 40209744 +4020976a: e23801 l32r a0, 4020204c +4020976d: 0000c0 callx0 a0 +40209770: 004186 j 4020987a +40209773: a02200 addx4 a2, a2, a0 +40209776: d50500 extui a0, a0, 21, 14 +40209779: 56fc bnez.n a6, 402097b2 +4020977b: 028c beqz.n a2, 4020977f +4020977d: 00a042 movi a4, 0 +40209780: 250c movi.n a5, 2 +40209782: 043d mov.n a3, a4 +40209784: 120c movi.n a2, 1 +40209786: fcce05 call0 40206468 +40209789: fccb45 call0 40206440 +4020978c: 020c movi.n a2, 0 +4020978e: fccbc5 call0 4020644c +40209791: 040c movi.n a4, 0 +40209793: 043d mov.n a3, a4 +40209795: 042d mov.n a2, a4 +40209797: 19a985 call0 40223230 +4020979a: 0f5d mov.n a5, a15 +4020979c: 0e4d mov.n a4, a14 +4020979e: 330c movi.n a3, 3 +402097a0: 0fa122 movi a2, 0x10f +402097a3: 003406 j 40209877 +402097a6: 0cd8 l32i.n a13, a12, 0 +402097a8: 2d9c beqz.n a13, 402097be +402097aa: 0d2d mov.n a2, a13 +402097ac: eb0101 l32r a0, 402043b0 +402097af: 0000c0 callx0 a0 +402097b2: 150c movi.n a5, 1 +402097b4: 744020 extui a4, a2, 0, 8 +402097b7: 0d3d mov.n a3, a13 +402097b9: 052d mov.n a2, a5 +402097bb: 0001c6 j 402097c6 +402097be: 040c movi.n a4, 0 +402097c0: 250c movi.n a5, 2 +402097c2: 043d mov.n a3, a4 +402097c4: 120c movi.n a2, 1 +402097c6: fcca05 call0 40206468 +402097c9: 1c28 l32i.n a2, a12, 4 +402097cb: 628c beqz.n a2, 402097d5 +402097cd: fcc4c5 call0 4020641c +402097d0: 000106 j 402097d8 +402097d3: 850000 extui a0, a0, 16, 9 +402097d6: 22fcc6 j 402123cd +402097d9: 080c movi.n a8, 0 +402097db: 0ca042 movi a4, 12 +402097de: ffc232 addi a3, a2, -1 +402097e1: 743030 extui a3, a3, 0, 8 +402097e4: 0fa1d2 movi a13, 0x10f +402097e7: 053437 bltu a4, a3, 402097f0 +402097ea: fd3585 call0 40206b44 +402097ed: fc4bd1 l32r a13, 4020891c +402097f0: 090c22 l8ui a2, a12, 9 +402097f3: 328c beqz.n a2, 402097fa +402097f5: 120c movi.n a2, 1 +402097f7: 000086 j 402097fd +402097fa: 00a022 movi a2, 0 +402097fd: fcc4c5 call0 4020644c +40209800: 032c22 l32i a2, a12, 12 +40209803: 00e256 bnez a2, 40209815 +40209806: f4d421 l32r a2, 40206b58 +40209809: 5c38 l32i.n a3, a12, 20 +4020980b: 10dd20 and a13, a13, a2 +4020980e: 03ac beqz.n a3, 40209832 +40209810: 4c28 l32i.n a2, a12, 16 +40209812: 000886 j 40209838 +40209815: 131266 bnei a2, 1, 4020982c +40209818: f4d221 l32r a2, 40206b60 +4020981b: 20dd20 or a13, a13, a2 +4020981e: 4c28 l32i.n a2, a12, 16 +40209820: 12cc bnez.n a2, 40209825 +40209822: 68a122 movi a2, 0x168 +40209825: fcc385 call0 40206460 +40209828: 0003c6 j 4020983b +4020982b: cb2100 excw +4020982e: dd20f4 excw +40209831: a03210 addx4 a3, a2, a1 +40209834: 2278 l32i.n a7, a2, 8 +40209836: 853ca0 extui a3, a10, 28, 9 +40209839: f7fcc1 l32r a12, 4020782c +4020983c: 30ed excw +4020983e: 0c28 l32i.n a2, a12, 0 +40209840: fccb05 call0 402064f4 +40209843: 743020 extui a3, a2, 0, 8 +40209846: 02cd mov.n a12, a2 +40209848: 0139 s32i.n a3, a1, 0 +4020984a: 74c0c0 extui a12, a12, 0, 8 +4020984d: f85405 call0 40201d90 +40209850: 0138 l32i.n a3, a1, 0 +40209852: 08ac27 bge a12, a2, 4020985e +40209855: f85385 call0 40201d90 +40209858: 743020 extui a3, a2, 0, 8 +4020985b: 000286 j 40209869 +4020985e: 006132 s32i a3, a1, 0 +40209861: f85105 call0 40201d74 +40209864: 0138 l32i.n a3, a1, 0 +40209866: eb3237 bltu a2, a3, 40209855 +40209869: fb2d21 l32r a2, 40208520 +4020986c: fcd285 call0 40206598 +4020986f: 0f5d mov.n a5, a15 +40209871: 0e4d mov.n a4, a14 +40209873: 330c movi.n a3, 3 +40209875: 0d2d mov.n a2, a13 +40209877: fd0a85 call0 40206920 +4020987a: b108 l32i.n a0, a1, 44 +4020987c: a1c8 l32i.n a12, a1, 40 +4020987e: 91d8 l32i.n a13, a1, 36 +40209880: 81e8 l32i.n a14, a1, 32 +40209882: 71f8 l32i.n a15, a1, 28 +40209884: 30c112 addi a1, a1, 48 +40209887: f00d ret.n +40209889: 000000 ill + +4020988c : +4020988c: e0b621 l32r a2, 40201b64 +4020988f: f0c112 addi a1, a1, -16 +40209892: 240c movi.n a4, 2 +40209894: 030c movi.n a3, 0 +40209896: 3109 s32i.n a0, a1, 12 +40209898: 00db45 call0 4020a650 +4020989b: 092ac5 call0 40212b48 +4020989e: 021266 bnei a2, 1, 402098a4 +402098a1: ffd245 call0 402095c8 +402098a4: 3108 l32i.n a0, a1, 12 +402098a6: 10c112 addi a1, a1, 16 +402098a9: f00d ret.n + ... + +402098ac : +402098ac: e0ae21 l32r a2, 40201b64 +402098af: f0c112 addi a1, a1, -16 +402098b2: 440c movi.n a4, 4 +402098b4: 030c movi.n a3, 0 +402098b6: 3109 s32i.n a0, a1, 12 +402098b8: 00d945 call0 4020a650 +402098bb: 0928c5 call0 40212b48 +402098be: 021266 bnei a2, 1, 402098c4 +402098c1: ffd045 call0 402095c8 +402098c4: 3108 l32i.n a0, a1, 12 +402098c6: 10c112 addi a1, a1, 16 +402098c9: f00d ret.n + ... + +402098cc : +402098cc: e0c112 addi a1, a1, -32 +402098cf: 51d9 s32i.n a13, a1, 20 +402098d1: 41e9 s32i.n a14, a1, 16 +402098d3: 31f9 s32i.n a15, a1, 12 +402098d5: 7109 s32i.n a0, a1, 28 +402098d7: 61c9 s32i.n a12, a1, 24 +402098d9: 02fd mov.n a15, a2 +402098db: 0d0c movi.n a13, 0 +402098dd: e8a0e2 movi a14, 232 +402098e0: fcc731 l32r a3, 40208bfc +402098e3: fcc641 l32r a4, 40208bfc +402098e6: 03d322 addmi a2, a3, 0x300 +402098e9: b10232 l8ui a3, a2, 177 +402098ec: 24bd37 bgeu a13, a3, 40209914 +402098ef: 2dea add.n a2, a13, a14 +402098f1: a02240 addx4 a2, a2, a4 +402098f4: 12c8 l32i.n a12, a2, 4 +402098f6: 6ccc bnez.n a12, 40209900 +402098f8: dd1b addi.n a13, a13, 1 +402098fa: 74d0d0 extui a13, a13, 0, 8 +402098fd: fff7c6 j 402098e0 +40209900: 640c movi.n a4, 6 +40209902: 0f3d mov.n a3, a15 +40209904: 0c2d mov.n a2, a12 +40209906: e0c501 l32r a0, 40201c1c +40209909: 0000c0 callx0 a0 +4020990c: fe8256 bnez a2, 402098f8 +4020990f: 0c2d mov.n a2, a12 +40209911: 000046 j 40209916 +40209914: 020c movi.n a2, 0 +40209916: 7108 l32i.n a0, a1, 28 +40209918: 61c8 l32i.n a12, a1, 24 +4020991a: 51d8 l32i.n a13, a1, 20 +4020991c: 41e8 l32i.n a14, a1, 16 +4020991e: 31f8 l32i.n a15, a1, 12 +40209920: 20c112 addi a1, a1, 32 +40209923: f00d ret.n +40209925: 000000 ill + +40209928 : +40209928: fcb531 l32r a3, 40208bfc +4020992b: ffa042 movi a4, 255 +4020992e: 03d362 addmi a6, a3, 0x300 +40209931: b10652 l8ui a5, a6, 177 +40209934: 5c35f6 bgeui a5, 3, 40209994 +40209937: 052526 beqi a5, 2, 40209940 +4020993a: a03530 addx4 a3, a5, a3 +4020993d: 001246 j 4020998a +40209940: e92372 l32i a7, a3, 0x3a4 +40209943: 262242 l32i a4, a2, 152 +40209946: 262772 l32i a7, a7, 152 +40209949: 0a9477 bne a4, a7, 40209957 +4020994c: 240c movi.n a4, 2 +4020994e: e7a082 movi a8, 231 +40209951: e8a092 movi a9, 232 +40209954: 000386 j 40209966 +40209957: ea2372 l32i a7, a3, 0x3a8 +4020995a: 262772 l32i a7, a7, 152 +4020995d: 241747 beq a7, a4, 40209985 +40209960: eb6322 s32i a2, a3, 0x3ac +40209963: 000986 j 4020998d +40209966: 1624a6 blti a4, 2, 40209980 +40209969: 748a add.n a7, a4, a8 +4020996b: a07730 addx4 a7, a7, a3 +4020996e: 17a8 l32i.n a10, a7, 4 +40209970: 749a add.n a7, a4, a9 +40209972: a07730 addx4 a7, a7, a3 +40209975: 440b addi.n a4, a4, -1 +40209977: 17a9 s32i.n a10, a7, 4 +40209979: 744040 extui a4, a4, 0, 8 +4020997c: fff986 j 40209966 +4020997f: 140c00 extui a0, a0, 12, 2 +40209982: 000046 j 40209987 +40209985: 240c movi.n a4, 2 +40209987: a03430 addx4 a3, a4, a3 +4020998a: e96322 s32i a2, a3, 0x3a4 +4020998d: 551b addi.n a5, a5, 1 +4020998f: b14652 s8i a5, a6, 177 +40209992: 040c movi.n a4, 0 +40209994: 042d mov.n a2, a4 +40209996: f00d ret.n + +40209998 : +40209998: e0c112 addi a1, a1, -32 +4020999b: 41e9 s32i.n a14, a1, 16 +4020999d: fc97e1 l32r a14, 40208bfc +402099a0: 61c9 s32i.n a12, a1, 24 +402099a2: 31f9 s32i.n a15, a1, 12 +402099a4: 7109 s32i.n a0, a1, 28 +402099a6: 51d9 s32i.n a13, a1, 20 +402099a8: 0c0c movi.n a12, 0 +402099aa: 03def2 addmi a15, a14, 0x300 +402099ad: b10f32 l8ui a3, a15, 177 +402099b0: 0edd mov.n a13, a14 +402099b2: 1ebc37 bgeu a12, a3, 402099d4 +402099b5: e8a022 movi a2, 232 +402099b8: 2c2a add.n a2, a12, a2 +402099ba: a0d2d0 addx4 a13, a2, a13 +402099bd: 1d28 l32i.n a2, a13, 4 +402099bf: 34a132 movi a3, 0x134 +402099c2: f09e01 l32r a0, 40205c3c +402099c5: 0000c0 callx0 a0 +402099c8: 020c movi.n a2, 0 +402099ca: cc1b addi.n a12, a12, 1 +402099cc: 1d29 s32i.n a2, a13, 4 +402099ce: 74c0c0 extui a12, a12, 0, 8 +402099d1: fff606 j 402099ad +402099d4: 030c movi.n a3, 0 +402099d6: b14f32 s8i a3, a15, 177 +402099d9: 7108 l32i.n a0, a1, 28 +402099db: 61c8 l32i.n a12, a1, 24 +402099dd: 51d8 l32i.n a13, a1, 20 +402099df: 41e8 l32i.n a14, a1, 16 +402099e1: 31f8 l32i.n a15, a1, 12 +402099e3: 20c112 addi a1, a1, 32 +402099e6: f00d ret.n + +402099e8 : +402099e8: fc8531 l32r a3, 40208bfc +402099eb: e0c112 addi a1, a1, -32 +402099ee: 51d9 s32i.n a13, a1, 20 +402099f0: 31f9 s32i.n a15, a1, 12 +402099f2: 7109 s32i.n a0, a1, 28 +402099f4: 61c9 s32i.n a12, a1, 24 +402099f6: 0461e2 s32i a14, a1, 16 +402099f9: 03d3d2 addmi a13, a3, 0x300 +402099fc: b10d52 l8ui a5, a13, 177 +402099ff: 00a042 movi a4, 0 +40209a02: 20f330 or a15, a3, a3 +40209a05: 74c040 extui a12, a4, 0, 8 +40209a08: 48bc57 bgeu a12, a5, 40209a54 +40209a0b: e92362 l32i a6, a3, 0x3a4 +40209a0e: 04ed mov.n a14, a4 +40209a10: 334b addi.n a3, a3, 4 +40209a12: 441b addi.n a4, a4, 1 +40209a14: ed9627 bne a6, a2, 40209a05 +40209a17: 34a132 movi a3, 0x134 +40209a1a: f08801 l32r a0, 40205c3c +40209a1d: 0000c0 callx0 a0 +40209a20: e8a032 movi a3, 232 +40209a23: ee3a add.n a14, a14, a3 +40209a25: 020c movi.n a2, 0 +40209a27: a0eef0 addx4 a14, a14, a15 +40209a2a: 1e29 s32i.n a2, a14, 4 +40209a2c: b10d22 l8ui a2, a13, 177 +40209a2f: e9a052 movi a5, 233 +40209a32: 220b addi.n a2, a2, -1 +40209a34: 742020 extui a2, a2, 0, 8 +40209a37: b14d22 s8i a2, a13, 177 +40209a3a: 16bc27 bgeu a12, a2, 40209a54 +40209a3d: 4c5a add.n a4, a12, a5 +40209a3f: a044f0 addx4 a4, a4, a15 +40209a42: 1468 l32i.n a6, a4, 4 +40209a44: 4c3a add.n a4, a12, a3 +40209a46: a044f0 addx4 a4, a4, a15 +40209a49: cc1b addi.n a12, a12, 1 +40209a4b: 1469 s32i.n a6, a4, 4 +40209a4d: 74c0c0 extui a12, a12, 0, 8 +40209a50: fff986 j 40209a3a +40209a53: 710800 excw +40209a56: 61c8 l32i.n a12, a1, 24 +40209a58: 51d8 l32i.n a13, a1, 20 +40209a5a: 41e8 l32i.n a14, a1, 16 +40209a5c: 31f8 l32i.n a15, a1, 12 +40209a5e: 20c112 addi a1, a1, 32 +40209a61: f00d ret.n +40209a63: cf3000 excw +40209a66: fe .byte 0xfe +40209a67: 3f .byte 0x3f + +40209a68 : +40209a68: e03f21 l32r a2, 40201b64 +40209a6b: d0c112 addi a1, a1, -48 +40209a6e: 06d222 addmi a2, a2, 0x600 +40209a71: b109 s32i.n a0, a1, 44 +40209a73: a1c9 s32i.n a12, a1, 40 +40209a75: 91d9 s32i.n a13, a1, 36 +40209a77: 81e9 s32i.n a14, a1, 32 +40209a79: 71f9 s32i.n a15, a1, 28 +40209a7b: a40262 l8ui a6, a2, 164 +40209a7e: 025d mov.n a5, a2 +40209a80: 016680 slli a6, a6, 24 +40209a83: 316860 srai a6, a6, 24 +40209a86: 744040 extui a4, a4, 0, 8 +40209a89: 020c movi.n a2, 0 +40209a8b: 772367 blt a3, a6, 40209b06 +40209a8e: a50532 l8ui a3, a5, 165 +40209a91: 713437 bltu a4, a3, 40209b06 +40209a94: fc5af1 l32r a15, 40208bfc +40209a97: 34a132 movi a3, 0x134 +40209a9a: ed2f52 l32i a5, a15, 0x3b4 +40209a9d: fff1d1 l32r a13, 40209a64 +40209aa0: 02ed mov.n a14, a2 +40209aa2: f47c movi.n a4, -1 +40209aa4: 02cd mov.n a12, a2 +40209aa6: 206330 or a6, a3, a3 +40209aa9: 822e30 mull a2, a14, a3 +40209aac: 2f2a add.n a2, a15, a2 +40209aae: 2228 l32i.n a2, a2, 8 +40209ab0: 92cc bnez.n a2, 40209abd +40209ab2: 822e60 mull a2, a14, a6 +40209ab5: 802f20 add a2, a15, a2 +40209ab8: 061222 l16ui a2, a2, 12 +40209abb: 72ac beqz.n a2, 40209ae6 +40209abd: 1b15d7 beq a5, a13, 40209adc +40209ac0: 0d2d mov.n a2, a13 +40209ac2: 2139 s32i.n a3, a1, 8 +40209ac4: 0149 s32i.n a4, a1, 0 +40209ac6: 1159 s32i.n a5, a1, 4 +40209ac8: 3169 s32i.n a6, a1, 12 +40209aca: ff1345 call0 40208c00 +40209acd: 0148 l32i.n a4, a1, 0 +40209acf: 2138 l32i.n a3, a1, 8 +40209ad1: 1158 l32i.n a5, a1, 4 +40209ad3: 3168 l32i.n a6, a1, 12 +40209ad5: 03b247 bgeu a2, a4, 40209adc +40209ad8: 024d mov.n a4, a2 +40209ada: 0dcd mov.n a12, a13 +40209adc: ee1b addi.n a14, a14, 1 +40209ade: dd3a add.n a13, a13, a3 +40209ae0: c53e66 bnei a14, 3, 40209aa9 +40209ae3: 000046 j 40209ae8 +40209ae6: 0dcd mov.n a12, a13 +40209ae8: 0c28 l32i.n a2, a12, 0 +40209aea: 32cc bnez.n a2, 40209af1 +40209aec: 021c22 l16ui a2, a12, 4 +40209aef: 628c beqz.n a2, 40209af9 +40209af1: 0c2d mov.n a2, a12 +40209af3: 201110 or a1, a1, a1 +40209af6: ffef05 call0 402099e8 +40209af9: 060c32 l8ui a3, a12, 6 +40209afc: 120c movi.n a2, 1 +40209afe: 202320 or a2, a3, a2 +40209b01: 064c22 s8i a2, a12, 6 +40209b04: 0c2d mov.n a2, a12 +40209b06: b108 l32i.n a0, a1, 44 +40209b08: a1c8 l32i.n a12, a1, 40 +40209b0a: 91d8 l32i.n a13, a1, 36 +40209b0c: 81e8 l32i.n a14, a1, 32 +40209b0e: 71f8 l32i.n a15, a1, 28 +40209b10: 30c112 addi a1, a1, 48 +40209b13: f00d ret.n +40209b15: 000000 ill + +40209b18 : +40209b18: f0c112 addi a1, a1, -16 +40209b1b: 3109 s32i.n a0, a1, 12 +40209b1d: 071466 bnei a4, 1, 40209b28 +40209b20: 930242 l8ui a4, a2, 147 +40209b23: 334a add.n a3, a3, a4 +40209b25: 000046 j 40209b2a +40209b28: 14cc bnez.n a4, 40209b2d +40209b2a: 934232 s8i a3, a2, 147 +40209b2d: 930232 l8ui a3, a2, 147 +40209b30: 013380 slli a3, a3, 24 +40209b33: 0053d6 bgez a3, 40209b3c +40209b36: 00a032 movi a3, 0 +40209b39: 934232 s8i a3, a2, 147 +40209b3c: fc3031 l32r a3, 40208bfc +40209b3f: 0fa042 movi a4, 15 +40209b42: ed2352 l32i a5, a3, 0x3b4 +40209b45: a60c movi.n a6, 10 +40209b47: c03250 sub a3, a2, a5 +40209b4a: 934630 movnez a4, a6, a3 +40209b4d: 930232 l8ui a3, a2, 147 +40209b50: 013380 slli a3, a3, 24 +40209b53: 313830 srai a3, a3, 24 +40209b56: 02a437 bge a4, a3, 40209b5c +40209b59: 934242 s8i a4, a2, 147 +40209b5c: 930232 l8ui a3, a2, 147 +40209b5f: 73cc bnez.n a3, 40209b6a +40209b61: 051257 beq a2, a5, 40209b6a +40209b64: 201110 or a1, a1, a1 +40209b67: ffe805 call0 402099e8 +40209b6a: 3108 l32i.n a0, a1, 12 +40209b6c: 10c112 addi a1, a1, 16 +40209b6f: f00d ret.n +40209b71: 000000 ill +40209b74: f0c112 addi a1, a1, -16 +40209b77: 0261c2 s32i a12, a1, 8 +40209b7a: 20c220 or a12, a2, a2 +40209b7d: 042222 l32i a2, a2, 16 +40209b80: 3109 s32i.n a0, a1, 12 +40209b82: 10c222 addi a2, a2, 16 +40209b85: ffd445 call0 402098cc +40209b88: 529c beqz.n a2, 40209ba1 +40209b8a: 9c38 l32i.n a3, a12, 36 +40209b8c: 0f0332 l8ui a3, a3, 15 +40209b8f: 071366 bnei a3, 1, 40209b9a +40209b92: 530c movi.n a3, 5 +40209b94: 954232 s8i a3, a2, 149 +40209b97: 000186 j 40209ba1 +40209b9a: 140c movi.n a4, 1 +40209b9c: d37c movi.n a3, -3 +40209b9e: fff785 call0 40209b18 +40209ba1: ff0b85 call0 40208c5c +40209ba4: 030c movi.n a3, 0 +40209ba6: 006216 beqz a2, 40209bb0 +40209ba9: ff0e85 call0 40208c94 +40209bac: 000186 j 40209bb6 +40209baf: 233000 excw +40209bb2: 148520 extui a8, a2, 5, 2 +40209bb5: ff .byte 0xff +40209bb6: 032102 l32i a0, a1, 12 +40209bb9: 0221c2 l32i a12, a1, 8 +40209bbc: 10c112 addi a1, a1, 16 +40209bbf: f00d ret.n +40209bc1: 000000 ill + +40209bc4 : +40209bc4: f0c112 addi a1, a1, -16 +40209bc7: 11d9 s32i.n a13, a1, 4 +40209bc9: 03dd mov.n a13, a3 +40209bcb: 10c432 addi a3, a4, 16 +40209bce: 640c movi.n a4, 6 +40209bd0: 3109 s32i.n a0, a1, 12 +40209bd2: 21c9 s32i.n a12, a1, 8 +40209bd4: 02cd mov.n a12, a2 +40209bd6: dd0f01 l32r a0, 40201014 <_irom0_text_start+0x4> +40209bd9: 0000c0 callx0 a0 +40209bdc: bd48 l32i.n a4, a13, 44 +40209bde: ad38 l32i.n a3, a13, 40 +40209be0: 67cc22 addi a2, a12, 103 +40209be3: f50c movi.n a5, 15 +40209be5: 01d485 call0 4020b930 +40209be8: 3108 l32i.n a0, a1, 12 +40209bea: 21c8 l32i.n a12, a1, 8 +40209bec: 11d8 l32i.n a13, a1, 4 +40209bee: 10c112 addi a1, a1, 16 +40209bf1: f00d ret.n + ... + +40209bf4 : +40209bf4: f0c112 addi a1, a1, -16 +40209bf7: 21c9 s32i.n a12, a1, 8 +40209bf9: 02cd mov.n a12, a2 +40209bfb: fc0021 l32r a2, 40208bfc +40209bfe: 01e9 s32i.n a14, a1, 0 +40209c00: ed22e2 l32i a14, a2, 0x3b4 +40209c03: 11d9 s32i.n a13, a1, 4 +40209c05: c02ec0 sub a2, a14, a12 +40209c08: 03dd mov.n a13, a3 +40209c0a: 1e0c movi.n a14, 1 +40209c0c: 030c movi.n a3, 0 +40209c0e: 93e320 movnez a14, a3, a2 +40209c11: 051d22 l16ui a2, a13, 10 +40209c14: 0e1c32 l16ui a3, a12, 28 +40209c17: 036102 s32i a0, a1, 12 +40209c1a: 744040 extui a4, a4, 0, 8 +40209c1d: 74e0e0 extui a14, a14, 0, 8 +40209c20: 021327 beq a3, a2, 40209c26 +40209c23: 0e5c22 s16i a2, a12, 28 +40209c26: f4cc bnez.n a4, 40209c39 +40209c28: 6d28 l32i.n a2, a13, 24 +40209c2a: 00b216 beqz a2, 40209c39 +40209c2d: 020232 l8ui a3, a2, 2 +40209c30: 234c32 s8i a3, a12, 35 +40209c33: 030222 l8ui a2, a2, 3 +40209c36: 224c22 s8i a2, a12, 34 +40209c39: 041d22 l16ui a2, a13, 8 +40209c3c: 072d32 l32i a3, a13, 28 +40209c3f: 105c22 s16i a2, a12, 32 +40209c42: 08a042 movi a4, 8 +40209c45: 10cc22 addi a2, a12, 16 +40209c48: dcf301 l32r a0, 40201014 <_irom0_text_start+0x4> +40209c4b: 0000c0 callx0 a0 +40209c4e: 031d32 l16ui a3, a13, 6 +40209c51: 0f1c22 l16ui a2, a12, 30 +40209c54: 302320 xor a2, a3, a2 +40209c57: 0e62a7 bbci a2, 10, 40209c69 +40209c5a: 00be16 beqz a14, 40209c69 +40209c5d: 00a422 movi a2, 0x400 +40209c60: 103320 and a3, a3, a2 +40209c63: dfc021 l32r a2, 40201b64 +40209c66: 01e145 call0 4020ba7c +40209c69: 031d22 l16ui a2, a13, 6 +40209c6c: 0f5c22 s16i a2, a12, 30 +40209c6f: f4d021 l32r a2, 40206fb0 +40209c72: 000222 l8ui a2, a2, 0 +40209c75: 01b216 beqz a2, 40209c94 +40209c78: 0b2d42 l32i a4, a13, 44 +40209c7b: ad38 l32i.n a3, a13, 40 +40209c7d: 050c movi.n a5, 0 +40209c7f: 0c2d mov.n a2, a12 +40209c81: fdbdc5 call0 40207860 +40209c84: 102d22 l32i a2, a13, 64 +40209c87: 030c movi.n a3, 0 +40209c89: 140c movi.n a4, 1 +40209c8b: 933420 movnez a3, a4, a2 +40209c8e: 202cc0 or a2, a12, a12 +40209c91: fd9c05 call0 40207654 +40209c94: 0f2d32 l32i a3, a13, 60 +40209c97: 01d316 beqz a3, 40209cb8 +40209c9a: 0c2d mov.n a2, a12 +40209c9c: 01d705 call0 4020ba10 +40209c9f: 313f20 srai a3, a2, 31 +40209ca2: c02320 sub a2, a3, a2 +40209ca5: 01f2d6 bgez a2, 40209cc8 +40209ca8: 01ce16 beqz a14, 40209cc8 +40209cab: 77cc32 addi a3, a12, 119 +40209cae: 202cc0 or a2, a12, a12 +40209cb1: 01de05 call0 4020ba94 +40209cb4: 000406 j 40209cc8 +40209cb7: 0c2200 excw +40209cba: 928c77 bany a12, a7, 40209c50 +40209cbd: 931c movi.n a3, 25 +40209cbf: 77cc22 addi a2, a12, 119 +40209cc2: efde01 l32r a0, 40205c3c +40209cc5: 0000c0 callx0 a0 +40209cc8: 082d32 l32i a3, a13, 32 +40209ccb: 0c2d mov.n a2, a12 +40209ccd: f7f505 call0 40201c20 +40209cd0: bd48 l32i.n a4, a13, 44 +40209cd2: ad38 l32i.n a3, a13, 40 +40209cd4: 050c movi.n a5, 0 +40209cd6: 0c2d mov.n a2, a12 +40209cd8: fdb845 call0 40207860 +40209cdb: ad28 l32i.n a2, a13, 40 +40209cdd: ff29c5 call0 40208f7c +40209ce0: 528c beqz.n a2, 40209ce9 +40209ce2: 120c movi.n a2, 1 +40209ce4: 000246 j 40209cf1 +40209ce7: 450000 extui a0, a0, 16, 5 +40209cea: 095a add.n a0, a9, a5 +40209cec: f21226 beqi a2, 1, 40209ce2 +40209cef: 220c movi.n a2, 2 +40209cf1: fbef85 call0 40205bec +40209cf4: bd48 l32i.n a4, a13, 44 +40209cf6: ad38 l32i.n a3, a13, 40 +40209cf8: 050c movi.n a5, 0 +40209cfa: 0c2d mov.n a2, a12 +40209cfc: fdb605 call0 40207860 +40209cff: ad28 l32i.n a2, a13, 40 +40209d01: ff2785 call0 40208f7c +40209d04: 328c beqz.n a2, 40209d0b +40209d06: 120c movi.n a2, 1 +40209d08: 000086 j 40209d0e +40209d0b: 02a022 movi a2, 2 +40209d0e: fbedc5 call0 40205bec +40209d11: 102d32 l32i a3, a13, 64 +40209d14: 01c316 beqz a3, 40209d34 +40209d17: 112d42 l32i a4, a13, 68 +40209d1a: 649c beqz.n a4, 40209d34 +40209d1c: df9221 l32r a2, 40201b64 +40209d1f: 05d252 addmi a5, a2, 0x500 +40209d22: 102552 l32i a5, a5, 64 +40209d25: 0b7537 bbci a5, 19, 40209d34 +40209d28: 042222 l32i a2, a2, 16 +40209d2b: 262c52 l32i a5, a12, 152 +40209d2e: 356252 s32i a5, a2, 212 +40209d31: febf05 call0 40208924 +40209d34: 3108 l32i.n a0, a1, 12 +40209d36: 21c8 l32i.n a12, a1, 8 +40209d38: 11d8 l32i.n a13, a1, 4 +40209d3a: 01e8 l32i.n a14, a1, 0 +40209d3c: 10c112 addi a1, a1, 16 +40209d3f: f00d ret.n +40209d41: 000000 ill + +40209d44 : +40209d44: c0c112 addi a1, a1, -64 +40209d47: e1c9 s32i.n a12, a1, 56 +40209d49: 03cd mov.n a12, a3 +40209d4b: d1d9 s32i.n a13, a1, 52 +40209d4d: c1e9 s32i.n a14, a1, 48 +40209d4f: b1f9 s32i.n a15, a1, 44 +40209d51: f109 s32i.n a0, a1, 60 +40209d53: 02ed mov.n a14, a2 +40209d55: 02d8 l32i.n a13, a2, 0 +40209d57: 1578c5 call0 4021f4e4 +40209d5a: 0d1cf2 l16ui a15, a12, 26 +40209d5d: 9f9c beqz.n a15, 40209d7a +40209d5f: 0c2d mov.n a2, a12 +40209d61: 01b205 call0 4020b884 +40209d64: 080c movi.n a8, 0 +40209d66: 027d mov.n a7, a2 +40209d68: 1189 s32i.n a8, a1, 4 +40209d6a: 0189 s32i.n a8, a1, 0 +40209d6c: b460f0 extui a6, a15, 0, 12 +40209d6f: 085d mov.n a5, a8 +40209d71: 0c4d mov.n a4, a12 +40209d73: 083d mov.n a3, a8 +40209d75: 082d mov.n a2, a8 +40209d77: 168845 call0 402205fc +40209d7a: 0d2d mov.n a2, a13 +40209d7c: 1eeb85 call0 40228c38 +40209d7f: 390d22 l8ui a2, a13, 57 +40209d82: 0e6237 bbci a2, 3, 40209d94 +40209d85: 0d2d mov.n a2, a13 +40209d87: 1b1685 call0 40224ef0 +40209d8a: 0d2d mov.n a2, a13 +40209d8c: 1b4a05 call0 40225230 +40209d8f: 0d2d mov.n a2, a13 +40209d91: 1ae845 call0 40224c18 +40209d94: 0f0c movi.n a15, 0 +40209d96: 1df9 s32i.n a15, a13, 4 +40209d98: 2df9 s32i.n a15, a13, 8 +40209d9a: 3df9 s32i.n a15, a13, 12 +40209d9c: 0f2d mov.n a2, a15 +40209d9e: 19adc5 call0 4022387c +40209da1: 01dc62 addmi a6, a12, 0x100 +40209da4: df70d1 l32r a13, 40201b64 +40209da7: 080622 l8ui a2, a6, 8 +40209daa: fce931 l32r a3, 40209150 +40209dad: a022d0 addx4 a2, a2, a13 +40209db0: 632222 l32i a2, a2, 0x18c +40209db3: 12a542 movi a4, 0x512 +40209db6: 4169 s32i.n a6, a1, 16 +40209db8: ddd401 l32r a0, 40201508 +40209dbb: 0000c0 callx0 a0 +40209dbe: 4168 l32i.n a6, a1, 16 +40209dc0: fce431 l32r a3, 40209150 +40209dc3: 080622 l8ui a2, a6, 8 +40209dc6: 60c222 addi a2, a2, 96 +40209dc9: a022d0 addx4 a2, a2, a13 +40209dcc: 32f9 s32i.n a15, a2, 12 +40209dce: 632d22 l32i a2, a13, 0x18c +40209dd1: 20f330 or a15, a3, a3 +40209dd4: 00d216 beqz a2, 40209de5 +40209dd7: 16a542 movi a4, 0x516 +40209dda: ddcb01 l32r a0, 40201508 +40209ddd: 0000c0 callx0 a0 +40209de0: 020c movi.n a2, 0 +40209de2: 636d22 s32i a2, a13, 0x18c +40209de5: 642d22 l32i a2, a13, 0x190 +40209de8: e28c beqz.n a2, 40209dfa +40209dea: 1ba542 movi a4, 0x51b +40209ded: 0f3d mov.n a3, a15 +40209def: ddc601 l32r a0, 40201508 +40209df2: 0000c0 callx0 a0 +40209df5: 020c movi.n a2, 0 +40209df7: 646d22 s32i a2, a13, 0x190 +40209dfa: 040c movi.n a4, 0 +40209dfc: 043d mov.n a3, a4 +40209dfe: 042d mov.n a2, a4 +40209e00: 1942c5 call0 40223230 +40209e03: fb7ed1 l32r a13, 40208bfc +40209e06: 220c movi.n a2, 2 +40209e08: 060c32 l8ui a3, a12, 6 +40209e0b: 0d29 s32i.n a2, a13, 0 +40209e0d: 130327 bnone a3, a2, 40209e24 +40209e10: d27c movi.n a2, -3 +40209e12: 102320 and a2, a3, a2 +40209e15: 064c22 s8i a2, a12, 6 +40209e18: 140c movi.n a4, 1 +40209e1a: 937c movi.n a3, -7 +40209e1c: 0c2d mov.n a2, a12 +40209e1e: ffcf85 call0 40209b18 +40209e21: ee6dc2 s32i a12, a13, 0x3b8 +40209e24: 202cc0 or a2, a12, a12 +40209e27: ffbc05 call0 402099e8 +40209e2a: 022c42 l32i a4, a12, 8 +40209e2d: 00a032 movi a3, 0 +40209e30: e27c movi.n a2, -2 +40209e32: ed6d32 s32i a3, a13, 0x3b4 +40209e35: 102420 and a2, a4, a2 +40209e38: f108 l32i.n a0, a1, 60 +40209e3a: 2c29 s32i.n a2, a12, 8 +40209e3c: 246e32 s32i a3, a14, 144 +40209e3f: e1c8 l32i.n a12, a1, 56 +40209e41: d1d8 l32i.n a13, a1, 52 +40209e43: c1e8 l32i.n a14, a1, 48 +40209e45: b1f8 l32i.n a15, a1, 44 +40209e47: 40c112 addi a1, a1, 64 +40209e4a: f00d ret.n +40209e4c: 209634 excw +40209e4f: 9c4040 excw +40209e52: 300000 xor a0, a0, a0 +40209e55: 000075 excw +40209e58: 002710 excw + ... + +40209e5c : +40209e5c: d0c112 addi a1, a1, -48 +40209e5f: 71f9 s32i.n a15, a1, 28 +40209e61: 0d13f2 l16ui a15, a3, 26 +40209e64: 91d9 s32i.n a13, a1, 36 +40209e66: 02dd mov.n a13, a2 +40209e68: 032d mov.n a2, a3 +40209e6a: b109 s32i.n a0, a1, 44 +40209e6c: a1c9 s32i.n a12, a1, 40 +40209e6e: 81e9 s32i.n a14, a1, 32 +40209e70: 0c0c movi.n a12, 0 +40209e72: 03ed mov.n a14, a3 +40209e74: b4f0f0 extui a15, a15, 0, 12 +40209e77: 01a0c5 call0 4020b884 +40209e7a: 027d mov.n a7, a2 +40209e7c: 0c5d mov.n a5, a12 +40209e7e: 0f6d mov.n a6, a15 +40209e80: 0e4d mov.n a4, a14 +40209e82: 130c movi.n a3, 1 +40209e84: 11c9 s32i.n a12, a1, 4 +40209e86: 01c9 s32i.n a12, a1, 0 +40209e88: 0c2d mov.n a2, a12 +40209e8a: 167705 call0 402205fc +40209e8d: 156745 call0 4021f504 +40209e90: 262e22 l32i a2, a14, 152 +40209e93: 18cde2 addi a14, a13, 24 +40209e96: 060232 l8ui a3, a2, 6 +40209e99: e9e221 l32r a2, 40204624 +40209e9c: dd4b addi.n a13, a13, 4 +40209e9e: 202320 or a2, a3, a2 +40209ea1: fcae31 l32r a3, 4020915c +40209ea4: 0020c0 memw +40209ea7: 0329 s32i.n a2, a3, 0 +40209ea9: 0e2d mov.n a2, a14 +40209eab: e84401 l32r a0, 40203fbc +40209eae: 0000c0 callx0 a0 +40209eb1: fdf131 l32r a3, 40209678 +40209eb4: 0c4d mov.n a4, a12 +40209eb6: 0e2d mov.n a2, a14 +40209eb8: e93f01 l32r a0, 402043b4 +40209ebb: 0000c0 callx0 a0 +40209ebe: 0d2d mov.n a2, a13 +40209ec0: e83f01 l32r a0, 40203fbc +40209ec3: 0000c0 callx0 a0 +40209ec6: ffe131 l32r a3, 40209e4c +40209ec9: 0c4d mov.n a4, a12 +40209ecb: 202dd0 or a2, a13, a13 +40209ece: e93901 l32r a0, 402043b4 +40209ed1: 0000c0 callx0 a0 +40209ed4: df24c1 l32r a12, 40201b64 +40209ed7: 05dc22 addmi a2, a12, 0x500 +40209eda: 1f2232 l32i a3, a2, 124 +40209edd: f39c beqz.n a3, 40209f00 +40209edf: 202222 l32i a2, a2, 128 +40209ee2: 1a1266 bnei a2, 1, 40209f00 +40209ee5: ffda31 l32r a3, 40209e50 +40209ee8: 0d2d mov.n a2, a13 +40209eea: 150c movi.n a5, 1 +40209eec: 040c movi.n a4, 0 +40209eee: e83201 l32r a0, 40203fb8 +40209ef1: 0000c0 callx0 a0 +40209ef4: 7a2c22 l32i a2, a12, 0x1e8 +40209ef7: 04d216 beqz a2, 40209f48 +40209efa: 3228 l32i.n a2, a2, 12 +40209efc: 000c06 j 40209f30 +40209eff: dc2200 excw +40209f02: 022202 l32i a0, a2, 8 +40209f05: 663d excw +40209f07: 222f42 l32i a4, a15, 136 +40209f0a: 792c movi.n a9, 39 +40209f0c: 82bc beqz.n a2, 40209f48 +40209f0e: 2228 l32i.n a2, a2, 8 +40209f10: 42bc beqz.n a2, 40209f48 +40209f12: 0002c0 callx0 a2 +40209f15: 150c movi.n a5, 1 +40209f17: 040c movi.n a4, 0 +40209f19: e8a332 movi a3, 0x3e8 +40209f1c: 02ec bnez.n a2, 40209f40 +40209f1e: ffcd31 l32r a3, 40209e54 +40209f21: 0d2d mov.n a2, a13 +40209f23: e82501 l32r a0, 40203fb8 +40209f26: 0000c0 callx0 a0 +40209f29: 792c22 l32i a2, a12, 0x1e4 +40209f2c: 829c beqz.n a2, 40209f48 +40209f2e: 1228 l32i.n a2, a2, 4 +40209f30: 429c beqz.n a2, 40209f48 +40209f32: 0002c0 callx0 a2 +40209f35: 0003c6 j 40209f48 +40209f38: c73100 excw +40209f3b: ff .byte 0xff +40209f3c: 150c movi.n a5, 1 +40209f3e: 040c movi.n a4, 0 +40209f40: 0d2d mov.n a2, a13 +40209f42: e81d01 l32r a0, 40203fb8 +40209f45: 0000c0 callx0 a0 +40209f48: b108 l32i.n a0, a1, 44 +40209f4a: a1c8 l32i.n a12, a1, 40 +40209f4c: 91d8 l32i.n a13, a1, 36 +40209f4e: 81e8 l32i.n a14, a1, 32 +40209f50: 71f8 l32i.n a15, a1, 28 +40209f52: 30c112 addi a1, a1, 48 +40209f55: f00d ret.n + ... + +40209f58 : +40209f58: e0c112 addi a1, a1, -32 +40209f5b: 31f9 s32i.n a15, a1, 12 +40209f5d: 02fd mov.n a15, a2 +40209f5f: df0121 l32r a2, 40201b64 +40209f62: 61c9 s32i.n a12, a1, 24 +40209f64: 41e9 s32i.n a14, a1, 16 +40209f66: 7109 s32i.n a0, a1, 28 +40209f68: 51d9 s32i.n a13, a1, 20 +40209f6a: 52e8 l32i.n a14, a2, 20 +40209f6c: 03d222 addmi a2, a2, 0x300 +40209f6f: 440222 l8ui a2, a2, 68 +40209f72: 1c0c movi.n a12, 1 +40209f74: 01c222 addi a2, a2, 1 +40209f77: 4122c7 blt a2, a12, 40209fbc +40209f7a: a03ce0 addx4 a3, a12, a14 +40209f7d: 262332 l32i a3, a3, 152 +40209f80: 03fc bnez.n a3, 40209fb4 +40209f82: fc7331 l32r a3, 40209150 +40209f85: dea542 movi a4, 0x5de +40209f88: 34a122 movi a2, 0x134 +40209f8b: e03101 l32r a0, 40202050 +40209f8e: 0000c0 callx0 a0 +40209f91: a0ece0 addx4 a14, a12, a14 +40209f94: 266e22 s32i a2, a14, 152 +40209f97: 02dd mov.n a13, a2 +40209f99: 12ac beqz.n a2, 40209fbe +40209f9b: 01d222 addmi a2, a2, 0x100 +40209f9e: cc7b addi.n a12, a12, 7 +40209fa0: 0842c2 s8i a12, a2, 8 +40209fa3: 262e22 l32i a2, a14, 152 +40209fa6: 640c movi.n a4, 6 +40209fa8: 0f3d mov.n a3, a15 +40209faa: dc1a01 l32r a0, 40201014 <_irom0_text_start+0x4> +40209fad: 0000c0 callx0 a0 +40209fb0: 000286 j 40209fbe +40209fb3: cc1b00 excw +40209fb6: 74c0c0 extui a12, a12, 0, 8 +40209fb9: ffee86 j 40209f77 +40209fbc: 0d0c movi.n a13, 0 +40209fbe: 7108 l32i.n a0, a1, 28 +40209fc0: 0d2d mov.n a2, a13 +40209fc2: 61c8 l32i.n a12, a1, 24 +40209fc4: 51d8 l32i.n a13, a1, 20 +40209fc6: 41e8 l32i.n a14, a1, 16 +40209fc8: 31f8 l32i.n a15, a1, 12 +40209fca: 20c112 addi a1, a1, 32 +40209fcd: f00d ret.n + ... + +40209fd0 : +40209fd0: d0c112 addi a1, a1, -48 +40209fd3: 0a61c2 s32i a12, a1, 40 +40209fd6: dee3c1 l32r a12, 40201b64 +40209fd9: 91d9 s32i.n a13, a1, 36 +40209fdb: 81e9 s32i.n a14, a1, 32 +40209fdd: b109 s32i.n a0, a1, 44 +40209fdf: 71f9 s32i.n a15, a1, 28 +40209fe1: 02dd mov.n a13, a2 +40209fe3: 03dc22 addmi a2, a12, 0x300 +40209fe6: 440232 l8ui a3, a2, 68 +40209fe9: 5ce8 l32i.n a14, a12, 20 +40209feb: 331b addi.n a3, a3, 1 +40209fed: 120c movi.n a2, 1 +40209fef: 6e2327 blt a3, a2, 4020a061 +40209ff2: 24c2f2 addi a15, a2, 36 +40209ff5: a04fe0 addx4 a4, a15, a14 +40209ff8: 2448 l32i.n a4, a4, 8 +40209ffa: 5b94d7 bne a4, a13, 4020a059 +40209ffd: 01ddc2 addmi a12, a13, 0x100 +4020a000: 080c22 l8ui a2, a12, 8 +4020a003: a0ffe0 addx4 a15, a15, a14 +4020a006: 222b addi.n a2, a2, 2 +4020a008: 193685 call0 40223374 +4020a00b: 412d22 l32i a2, a13, 0x104 +4020a00e: 029f45 call0 4020ca04 +4020a011: 080c22 l8ui a2, a12, 8 +4020a014: ded431 l32r a3, 40201b64 +4020a017: f5a542 movi a4, 0x5f5 +4020a01a: a02230 addx4 a2, a2, a3 +4020a01d: 632222 l32i a2, a2, 0x18c +4020a020: fc4c31 l32r a3, 40209150 +4020a023: dd3901 l32r a0, 40201508 +4020a026: 0000c0 callx0 a0 +4020a029: 080c22 l8ui a2, a12, 8 +4020a02c: dece31 l32r a3, 40201b64 +4020a02f: 60c222 addi a2, a2, 96 +4020a032: 060c movi.n a6, 0 +4020a034: a0c230 addx4 a12, a2, a3 +4020a037: 3c69 s32i.n a6, a12, 12 +4020a039: 130c movi.n a3, 1 +4020a03b: 202dd0 or a2, a13, a13 +4020a03e: 006162 s32i a6, a1, 0 +4020a041: fbf845 call0 40205fc8 +4020a044: fc4331 l32r a3, 40209150 +4020a047: f8a542 movi a4, 0x5f8 +4020a04a: 0d2d mov.n a2, a13 +4020a04c: dd2f01 l32r a0, 40201508 +4020a04f: 0000c0 callx0 a0 +4020a052: 0168 l32i.n a6, a1, 0 +4020a054: 2f69 s32i.n a6, a15, 8 +4020a056: 0001c6 j 4020a061 +4020a059: 221b addi.n a2, a2, 1 +4020a05b: 742020 extui a2, a2, 0, 8 +4020a05e: ffe346 j 40209fef +4020a061: b108 l32i.n a0, a1, 44 +4020a063: a1c8 l32i.n a12, a1, 40 +4020a065: 91d8 l32i.n a13, a1, 36 +4020a067: 81e8 l32i.n a14, a1, 32 +4020a069: 71f8 l32i.n a15, a1, 28 +4020a06b: 30c112 addi a1, a1, 48 +4020a06e: f00d ret.n + +4020a070 : +4020a070: 026d mov.n a6, a2 +4020a072: debc21 l32r a2, 40201b64 +4020a075: d0c112 addi a1, a1, -48 +4020a078: 91d9 s32i.n a13, a1, 36 +4020a07a: 5258 l32i.n a5, a2, 20 +4020a07c: 0d0c movi.n a13, 0 +4020a07e: a1c9 s32i.n a12, a1, 40 +4020a080: 71f9 s32i.n a15, a1, 28 +4020a082: b109 s32i.n a0, a1, 44 +4020a084: 81e9 s32i.n a14, a1, 32 +4020a086: 0dcd mov.n a12, a13 +4020a088: 02fd mov.n a15, a2 +4020a08a: 03df22 addmi a2, a15, 0x300 +4020a08d: 440222 l8ui a2, a2, 68 +4020a090: 221b addi.n a2, a2, 1 +4020a092: 3a22c7 blt a2, a12, 4020a0d0 +4020a095: 000622 l8ui a2, a6, 0 +4020a098: 056207 bbci a2, 0, 4020a0a1 +4020a09b: 2625d2 l32i a13, a5, 152 +4020a09e: 000986 j 4020a0c8 +4020a0a1: 24cce2 addi a14, a12, 36 +4020a0a4: a02e50 addx4 a2, a14, a5 +4020a0a7: 2238 l32i.n a3, a2, 8 +4020a0a9: b39c beqz.n a3, 4020a0c8 +4020a0ab: 062d mov.n a2, a6 +4020a0ad: 640c movi.n a4, 6 +4020a0af: 0159 s32i.n a5, a1, 0 +4020a0b1: 1169 s32i.n a6, a1, 4 +4020a0b3: deda01 l32r a0, 40201c1c +4020a0b6: 0000c0 callx0 a0 +4020a0b9: 0158 l32i.n a5, a1, 0 +4020a0bb: 1168 l32i.n a6, a1, 4 +4020a0bd: 72cc bnez.n a2, 4020a0c8 +4020a0bf: a0ee50 addx4 a14, a14, a5 +4020a0c2: 2ed8 l32i.n a13, a14, 8 +4020a0c4: 000206 j 4020a0d0 +4020a0c7: cc1b00 excw +4020a0ca: 74c0c0 extui a12, a12, 0, 8 +4020a0cd: ffee46 j 4020a08a +4020a0d0: b108 l32i.n a0, a1, 44 +4020a0d2: 0d2d mov.n a2, a13 +4020a0d4: a1c8 l32i.n a12, a1, 40 +4020a0d6: 91d8 l32i.n a13, a1, 36 +4020a0d8: 81e8 l32i.n a14, a1, 32 +4020a0da: 71f8 l32i.n a15, a1, 28 +4020a0dc: 30c112 addi a1, a1, 48 +4020a0df: f00d ret.n +4020a0e1: 000000 ill +4020a0e4: 230290 excw +4020a0e7: 027f40 excw +4020a0ea: 23 .byte 0x23 +4020a0eb: 40 .byte 0x40 + +4020a0ec : +4020a0ec: d0c112 addi a1, a1, -48 +4020a0ef: 91d9 s32i.n a13, a1, 36 +4020a0f1: 02dd mov.n a13, a2 +4020a0f3: 10a122 movi a2, 0x110 +4020a0f6: 232a add.n a2, a3, a2 +4020a0f8: a1c9 s32i.n a12, a1, 40 +4020a0fa: b109 s32i.n a0, a1, 44 +4020a0fc: 81e9 s32i.n a14, a1, 32 +4020a0fe: 71f9 s32i.n a15, a1, 28 +4020a100: 03cd mov.n a12, a3 +4020a102: e7ae01 l32r a0, 40203fbc +4020a105: 0000c0 callx0 a0 +4020a108: 262d22 l32i a2, a13, 152 +4020a10b: 029c27 bne a12, a2, 4020a111 +4020a10e: 003206 j 4020a1da +4020a111: 0d1c22 l16ui a2, a12, 26 +4020a114: d42020 extui a2, a2, 0, 14 +4020a117: 12ac beqz.n a2, 4020a13c +4020a119: 1129 s32i.n a2, a1, 4 +4020a11b: 050c22 l8ui a2, a12, 5 +4020a11e: 040c72 l8ui a7, a12, 4 +4020a121: 0129 s32i.n a2, a1, 0 +4020a123: 030c62 l8ui a6, a12, 3 +4020a126: 020c52 l8ui a5, a12, 2 +4020a129: 010c42 l8ui a4, a12, 1 +4020a12c: 000c32 l8ui a3, a12, 0 +4020a12f: ffed21 l32r a2, 4020a0e4 +4020a132: dfc601 l32r a0, 4020204c +4020a135: 0000c0 callx0 a0 +4020a138: 000246 j 4020a145 +4020a13b: eb2100 excw +4020a13e: ff .byte 0xff +4020a13f: dfc301 l32r a0, 4020204c +4020a142: 0000c0 callx0 a0 +4020a145: 0d1c22 l16ui a2, a12, 26 +4020a148: 086216 beqz a2, 4020a1d2 +4020a14b: e92e21 l32r a2, 40204604 +4020a14e: 0228 l32i.n a2, a2, 0 +4020a150: 044216 beqz a2, 4020a198 +4020a153: fbffe1 l32r a14, 40209150 +4020a156: 39a642 movi a4, 0x639 +4020a159: 0e3d mov.n a3, a14 +4020a15b: c22c movi.n a2, 44 +4020a15d: dfbc01 l32r a0, 40202050 +4020a160: 0000c0 callx0 a0 +4020a163: 02dd mov.n a13, a2 +4020a165: f2ac beqz.n a2, 4020a198 +4020a167: 6f0c movi.n a15, 6 +4020a169: 02f9 s32i.n a15, a2, 0 +4020a16b: 0f4d mov.n a4, a15 +4020a16d: 0c3d mov.n a3, a12 +4020a16f: 224b addi.n a2, a2, 4 +4020a171: dba801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a174: 0000c0 callx0 a0 +4020a177: 0d1c22 l16ui a2, a12, 26 +4020a17a: 0d4d mov.n a4, a13 +4020a17c: 0a4d22 s8i a2, a13, 10 +4020a17f: 0f3d mov.n a3, a15 +4020a181: 521c movi.n a2, 21 +4020a183: e92901 l32r a0, 40204628 +4020a186: 0000c0 callx0 a0 +4020a189: b28c beqz.n a2, 4020a198 +4020a18b: 40a642 movi a4, 0x640 +4020a18e: 0e3d mov.n a3, a14 +4020a190: 0d2d mov.n a2, a13 +4020a192: dcdd01 l32r a0, 40201508 +4020a195: 0000c0 callx0 a0 +4020a198: 0d1ce2 l16ui a14, a12, 26 +4020a19b: 0c2d mov.n a2, a12 +4020a19d: 016e45 call0 4020b884 +4020a1a0: 0d0c movi.n a13, 0 +4020a1a2: b4e0e0 extui a14, a14, 0, 12 +4020a1a5: 027d mov.n a7, a2 +4020a1a7: 0c4d mov.n a4, a12 +4020a1a9: 0d3d mov.n a3, a13 +4020a1ab: 11d9 s32i.n a13, a1, 4 +4020a1ad: 01d9 s32i.n a13, a1, 0 +4020a1af: 0e6d mov.n a6, a14 +4020a1b1: 0e5d mov.n a5, a14 +4020a1b3: 120c movi.n a2, 1 +4020a1b5: 164445 call0 402205fc +4020a1b8: 0d1c32 l16ui a3, a12, 26 +4020a1bb: de6a41 l32r a4, 40201b64 +4020a1be: e27c movi.n a2, -2 +4020a1c0: 401300 ssl a3 +4020a1c3: 813220 src a3, a2, a2 +4020a1c6: ed1422 l16ui a2, a4, 0x1da +4020a1c9: 102320 and a2, a3, a2 +4020a1cc: ed5422 s16i a2, a4, 0x1da +4020a1cf: 0d5cd2 s16i a13, a12, 26 +4020a1d2: 0c2d mov.n a2, a12 +4020a1d4: 201110 or a1, a1, a1 +4020a1d7: ffdf85 call0 40209fd0 +4020a1da: b108 l32i.n a0, a1, 44 +4020a1dc: a1c8 l32i.n a12, a1, 40 +4020a1de: 91d8 l32i.n a13, a1, 36 +4020a1e0: 81e8 l32i.n a14, a1, 32 +4020a1e2: 71f8 l32i.n a15, a1, 28 +4020a1e4: 30c112 addi a1, a1, 48 +4020a1e7: f00d ret.n +4020a1e9: 000000 ill +4020a1ec: 6e .byte 0x6e +4020a1ed: 402302 l32i a0, a3, 0x100 +4020a1f0: 230257 bnone a2, a5, 4020a217 +4020a1f3: c00040 sub a0, a0, a4 +4020a1f6: ff .byte 0xff +4020a1f7: ff .byte 0xff +4020a1f8: 230220 excw +4020a1fb: 838440 moveqz a8, a4, a4 +4020a1fe: fe .byte 0xfe +4020a1ff: 3f .byte 0x3f + +4020a200 : +4020a200: c0c112 addi a1, a1, -64 +4020a203: e1c9 s32i.n a12, a1, 56 +4020a205: 03cd mov.n a12, a3 +4020a207: df8c31 l32r a3, 40202038 +4020a20a: d1d9 s32i.n a13, a1, 52 +4020a20c: c1e9 s32i.n a14, a1, 48 +4020a20e: 02dd mov.n a13, a2 +4020a210: 04ed mov.n a14, a4 +4020a212: 0c2d mov.n a2, a12 +4020a214: 640c movi.n a4, 6 +4020a216: f109 s32i.n a0, a1, 60 +4020a218: 0b61f2 s32i a15, a1, 44 +4020a21b: de8001 l32r a0, 40201c1c +4020a21e: 0000c0 callx0 a0 +4020a221: 42dc bnez.n a2, 4020a239 +4020a223: 141c movi.n a4, 17 +4020a225: 0e3d mov.n a3, a14 +4020a227: 0d2d mov.n a2, a13 +4020a229: f8bac5 call0 40202dd8 +4020a22c: fff021 l32r a2, 4020a1ec +4020a22f: df8701 l32r a0, 4020204c +4020a232: 0000c0 callx0 a0 +4020a235: 000806 j 4020a259 +4020a238: 4a2100 excw +4020a23b: de .byte 0xde +4020a23c: 0d1c42 l16ui a4, a12, 26 +4020a23f: ed1232 l16ui a3, a2, 0x1da +4020a242: 1d5347 bbc a3, a4, 4020a263 +4020a245: ffea21 l32r a2, 4020a1f0 +4020a248: df8101 l32r a0, 4020204c +4020a24b: 0000c0 callx0 a0 +4020a24e: 11a042 movi a4, 17 +4020a251: 203ee0 or a3, a14, a14 +4020a254: 0d2d mov.n a2, a13 +4020a256: f8b805 call0 40202dd8 +4020a259: 0c3d mov.n a3, a12 +4020a25b: 0d2d mov.n a2, a13 +4020a25d: ffe8c5 call0 4020a0ec +4020a260: 006306 j 4020a3f0 +4020a263: 04f456 bnez a4, 4020a2b6 +4020a266: 03d242 addmi a4, a2, 0x300 +4020a269: 440462 l8ui a6, a4, 68 +4020a26c: 1f0c movi.n a15, 1 +4020a26e: dc26f7 blt a6, a15, 4020a24e +4020a271: 4440f0 extui a4, a15, 0, 5 +4020a274: 095347 bbc a3, a4, 4020a281 +4020a277: ff1b addi.n a15, a15, 1 +4020a279: f4f0f0 extui a15, a15, 0, 16 +4020a27c: fffb86 j 4020a26e +4020a27f: 510000 excw +4020a282: ffdc bnez.n a15, 4020a2a5 +4020a284: 180c movi.n a8, 1 +4020a286: 401400 ssl a4 +4020a289: a14800 sll a4, a8 +4020a28c: 205f50 or a5, a15, a5 +4020a28f: 203430 or a3, a4, a3 +4020a292: 0d5c52 s16i a5, a12, 26 +4020a295: ed5232 s16i a3, a2, 0x1da +4020a298: 0c2d mov.n a2, a12 +4020a29a: 4189 s32i.n a8, a1, 16 +4020a29c: 015e45 call0 4020b884 +4020a29f: 4188 l32i.n a8, a1, 16 +4020a2a1: 030c movi.n a3, 0 +4020a2a3: 1139 s32i.n a3, a1, 4 +4020a2a5: 0139 s32i.n a3, a1, 0 +4020a2a7: 027d mov.n a7, a2 +4020a2a9: 0f6d mov.n a6, a15 +4020a2ab: 0f5d mov.n a5, a15 +4020a2ad: 0c4d mov.n a4, a12 +4020a2af: 083d mov.n a3, a8 +4020a2b1: 082d mov.n a2, a8 +4020a2b3: 163485 call0 402205fc +4020a2b6: 0d1c22 l16ui a2, a12, 26 +4020a2b9: 010c42 l8ui a4, a12, 1 +4020a2bc: d42020 extui a2, a2, 0, 14 +4020a2bf: 1129 s32i.n a2, a1, 4 +4020a2c1: 050c22 l8ui a2, a12, 5 +4020a2c4: 000c32 l8ui a3, a12, 0 +4020a2c7: 0129 s32i.n a2, a1, 0 +4020a2c9: 040c72 l8ui a7, a12, 4 +4020a2cc: 030c62 l8ui a6, a12, 3 +4020a2cf: 020c52 l8ui a5, a12, 2 +4020a2d2: ffc921 l32r a2, 4020a1f8 +4020a2d5: df5d01 l32r a0, 4020204c +4020a2d8: 0000c0 callx0 a0 +4020a2db: ffc821 l32r a2, 4020a1fc +4020a2de: 130c movi.n a3, 1 +4020a2e0: 000242 l8ui a4, a2, 0 +4020a2e3: 203430 or a3, a4, a3 +4020a2e6: 004232 s8i a3, a2, 0 +4020a2e9: e8c631 l32r a3, 40204604 +4020a2ec: 0348 l32i.n a4, a3, 0 +4020a2ee: 062416 beqz a4, 4020a354 +4020a2f1: fb9731 l32r a3, 40209150 +4020a2f4: e8a642 movi a4, 0x6e8 +4020a2f7: c22c movi.n a2, 44 +4020a2f9: df5501 l32r a0, 40202050 +4020a2fc: 0000c0 callx0 a0 +4020a2ff: 02fd mov.n a15, a2 +4020a301: 04f216 beqz a2, 4020a354 +4020a304: 520c movi.n a2, 5 +4020a306: 0f29 s32i.n a2, a15, 0 +4020a308: 0c3d mov.n a3, a12 +4020a30a: 640c movi.n a4, 6 +4020a30c: 04cf22 addi a2, a15, 4 +4020a30f: db4101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a312: 0000c0 callx0 a0 +4020a315: 0d1c22 l16ui a2, a12, 26 +4020a318: ffb931 l32r a3, 4020a1fc +4020a31b: 0a4f22 s8i a2, a15, 10 +4020a31e: 000322 l8ui a2, a3, 0 +4020a321: 146227 bbci a2, 2, 4020a339 +4020a324: 0f4d mov.n a4, a15 +4020a326: 530c movi.n a3, 5 +4020a328: 521c movi.n a2, 21 +4020a32a: e8bf01 l32r a0, 40204628 +4020a32d: 0000c0 callx0 a0 +4020a330: f0a642 movi a4, 0x6f0 +4020a333: 12dc bnez.n a2, 4020a348 +4020a335: 0006c6 j 4020a354 +4020a338: b22100 excw +4020a33b: 32e8 l32i.n a14, a2, 12 +4020a33d: f00022 l8ui a2, a0, 240 +4020a340: 2f .byte 0x2f +4020a341: 03c020 rsr.depc a2 +4020a344: a64200 excw +4020a347: 8231f4 excw +4020a34a: f0fb addi.n a15, a0, 15 +4020a34c: 2f .byte 0x2f +4020a34d: 6e0120 excw +4020a350: c0dc bnez.n a0, 4020a370 +4020a352: 210000 srai a0, a0, 0 +4020a355: ffaa add.n a15, a15, a10 +4020a357: 000232 l8ui a3, a2, 0 +4020a35a: 420c movi.n a2, 4 +4020a35c: 102320 and a2, a3, a2 +4020a35f: 0a6317 bbci a3, 1, 4020a36d +4020a362: ffa631 l32r a3, 4020a1fc +4020a365: 004322 s8i a2, a3, 0 +4020a368: ffb886 j 4020a24e +4020a36b: 310000 srai a0, a0, 16 +4020a36e: 0cffa3 excw +4020a371: 432264 excw +4020a374: 2d2200 excw +4020a377: 0c3d24 excw +4020a37a: db2601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a37d: 0000c0 callx0 a0 +4020a380: 0d1c32 l16ui a3, a12, 26 +4020a383: 242d22 l32i a2, a13, 144 +4020a386: 040c movi.n a4, 0 +4020a388: 0d5232 s16i a3, a2, 26 +4020a38b: 0e3d mov.n a3, a14 +4020a38d: 0d2d mov.n a2, a13 +4020a38f: f8a485 call0 40202dd8 +4020a392: 242d22 l32i a2, a13, 144 +4020a395: ffa032 movi a3, 255 +4020a398: 640c movi.n a4, 6 +4020a39a: db1d01 l32r a0, 40201010 <_irom0_text_start> +4020a39d: 0000c0 callx0 a0 +4020a3a0: 242d22 l32i a2, a13, 144 +4020a3a3: 030c movi.n a3, 0 +4020a3a5: 0d5232 s16i a3, a2, 26 +4020a3a8: 332d22 l32i a2, a13, 204 +4020a3ab: 041216 beqz a2, 4020a3f0 +4020a3ae: 6228 l32i.n a2, a2, 24 +4020a3b0: 1228 l32i.n a2, a2, 4 +4020a3b2: 22dc bnez.n a2, 4020a3c8 +4020a3b4: 332d22 l32i a2, a13, 204 +4020a3b7: 412c32 l32i a3, a12, 0x104 +4020a3ba: 6228 l32i.n a2, a2, 24 +4020a3bc: 032f05 call0 4020d6b0 +4020a3bf: 120c movi.n a2, 1 +4020a3c1: 184c22 s8i a2, a12, 24 +4020a3c4: 000a06 j 4020a3f0 +4020a3c7: 2c2200 excw +4020a3ca: 638541 l32r a4, 401e31e0 <_lit4_end+0xdceb4> +4020a3cd: 2d2202 l32i a0, a2, 180 +4020a3d0: 0c3d33 excw +4020a3d3: 6228 l32i.n a2, a2, 24 +4020a3d5: 025b45 call0 4020c98c +4020a3d8: 416c22 s32i a2, a12, 0x104 +4020a3db: 129c beqz.n a2, 4020a3f0 +4020a3dd: 332d62 l32i a6, a13, 204 +4020a3e0: 023d mov.n a3, a2 +4020a3e2: 240c52 l8ui a5, a12, 36 +4020a3e5: 6628 l32i.n a2, a6, 24 +4020a3e7: 27cc42 addi a4, a12, 39 +4020a3ea: 01b385 call0 4020bf24 +4020a3ed: fc3216 beqz a2, 4020a3b4 +4020a3f0: f108 l32i.n a0, a1, 60 +4020a3f2: e1c8 l32i.n a12, a1, 56 +4020a3f4: d1d8 l32i.n a13, a1, 52 +4020a3f6: c1e8 l32i.n a14, a1, 48 +4020a3f8: b1f8 l32i.n a15, a1, 44 +4020a3fa: 40c112 addi a1, a1, 64 +4020a3fd: f00d ret.n +4020a3ff: d2f400 excw +4020a402: fe .byte 0xfe +4020a403: 3f .byte 0x3f + +4020a404 : +4020a404: f0c112 addi a1, a1, -16 +4020a407: 3109 s32i.n a0, a1, 12 +4020a409: f28c beqz.n a2, 4020a41c +4020a40b: 0d23f6 bgeui a3, 2, 4020a41c +4020a40e: fffc41 l32r a4, 4020a400 +4020a411: a03340 addx4 a3, a3, a4 +4020a414: 0338 l32i.n a3, a3, 0 +4020a416: 0003c0 callx0 a3 +4020a419: 000046 j 4020a41e +4020a41c: 020c movi.n a2, 0 +4020a41e: 3108 l32i.n a0, a1, 12 +4020a420: 10c112 addi a1, a1, 16 +4020a423: f00d ret.n +4020a425: 000000 ill +4020a428: 230424 excw +4020a42b: 040140 extui a0, a4, 1, 1 +4020a42e: f04023 excw +4020a431: 3ffed2 excw +4020a434: 2303e1 l32r a14, 401d3040 <_lit4_end+0xccd14> +4020a437: 03c140 excw +4020a43a: fc4023 excw +4020a43d: 3ffed2 excw + +4020a440 : +4020a440: c0c112 addi a1, a1, -64 +4020a443: d1d9 s32i.n a13, a1, 52 +4020a445: b1f9 s32i.n a15, a1, 44 +4020a447: f109 s32i.n a0, a1, 60 +4020a449: e1c9 s32i.n a12, a1, 56 +4020a44b: c1e9 s32i.n a14, a1, 48 +4020a44d: 04fd mov.n a15, a4 +4020a44f: 010342 l8ui a4, a3, 1 +4020a452: 0d4c movi.n a13, 64 +4020a454: 4139 s32i.n a3, a1, 16 +4020a456: 10d4d0 and a13, a4, a13 +4020a459: c055f0 sub a5, a5, a15 +4020a45c: 0d9c beqz.n a13, 4020a470 +4020a45e: f6f821 l32r a2, 40208040 +4020a461: 1278 l32i.n a7, a2, 4 +4020a463: 2238 l32i.n a3, a2, 8 +4020a465: 773a add.n a7, a7, a3 +4020a467: 77fb addi.n a7, a7, 15 +4020a469: 08b757 bgeu a7, a5, 4020a475 +4020a46c: 000586 j 4020a486 +4020a46f: f20c00 excw +4020a472: 173257 bltu a2, a5, 4020a48d +4020a475: ffec21 l32r a2, 4020a428 +4020a478: 053d mov.n a3, a5 +4020a47a: def401 l32r a0, 4020204c +4020a47d: 0000c0 callx0 a0 +4020a480: f37c movi.n a3, -1 +4020a482: 004186 j 4020a58c +4020a485: 12c800 excw +4020a488: cc8b addi.n a12, a12, 8 +4020a48a: 000046 j 4020a48f +4020a48d: 8c0c movi.n a12, 8 +4020a48f: cfca add.n a12, a15, a12 +4020a491: 820c movi.n a2, 8 +4020a493: ad8c beqz.n a13, 4020a4a1 +4020a495: f6ea31 l32r a3, 40208040 +4020a498: 1378 l32i.n a7, a3, 4 +4020a49a: 2328 l32i.n a2, a3, 8 +4020a49c: 272a add.n a2, a7, a2 +4020a49e: 08c222 addi a2, a2, 8 +4020a4a1: 010c32 l8ui a3, a12, 1 +4020a4a4: 732b addi.n a7, a3, 2 +4020a4a6: 272a add.n a2, a7, a2 +4020a4a8: 0eb527 bgeu a5, a2, 4020a4ba +4020a4ab: ffe021 l32r a2, 4020a42c +4020a4ae: dee701 l32r a0, 4020204c +4020a4b1: 0000c0 callx0 a0 +4020a4b4: e37c movi.n a3, -2 +4020a4b6: 003486 j 4020a58c +4020a4b9: 050c00 extui a0, a0, 28, 1 +4020a4bc: 041d57 beq a13, a5, 4020a4c4 +4020a4bf: f6e021 l32r a2, 40208040 +4020a4c2: 1258 l32i.n a5, a2, 4 +4020a4c4: 5f5a add.n a5, a15, a5 +4020a4c6: e54b addi.n a14, a5, 4 +4020a4c8: 25e437 bbsi a4, 3, 4020a4f1 +4020a4cb: ffd921 l32r a2, 4020a430 +4020a4ce: 440c movi.n a4, 4 +4020a4d0: 0e3d mov.n a3, a14 +4020a4d2: dad001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a4d5: 0000c0 callx0 a0 +4020a4d8: 050c22 l8ui a2, a12, 5 +4020a4db: 274226 beqi a2, 4, 4020a506 +4020a4de: 1e0c movi.n a14, 1 +4020a4e0: 245226 beqi a2, 5, 4020a508 +4020a4e3: ffd421 l32r a2, 4020a434 +4020a4e6: ded901 l32r a0, 4020204c +4020a4e9: 0000c0 callx0 a0 +4020a4ec: d37c movi.n a3, -3 +4020a4ee: 002686 j 4020a58c +4020a4f1: ffcf21 l32r a2, 4020a430 +4020a4f4: 0e3d mov.n a3, a14 +4020a4f6: 440c movi.n a4, 4 +4020a4f8: ddc901 l32r a0, 40201c1c +4020a4fb: 0000c0 callx0 a0 +4020a4fe: 236c movi.n a3, -30 +4020a500: 088216 beqz a2, 4020a58c +4020a503: fff106 j 4020a4cb +4020a506: 0e0c movi.n a14, 0 +4020a508: 4128 l32i.n a2, a1, 16 +4020a50a: 640c movi.n a4, 6 +4020a50c: 32ab addi.n a3, a2, 10 +4020a50e: 202110 or a2, a1, a1 +4020a511: dac001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a514: 0000c0 callx0 a0 +4020a517: 052d16 beqz a13, 4020a56d +4020a51a: 0e3d mov.n a3, a14 +4020a51c: 012d mov.n a2, a1 +4020a51e: ffee45 call0 4020a404 +4020a521: c2bc beqz.n a2, 4020a561 +4020a523: 252232 l32i a3, a2, 148 +4020a526: 73bc beqz.n a3, 4020a561 +4020a528: 030f42 l8ui a4, a15, 3 +4020a52b: d37c movi.n a3, -3 +4020a52d: 5b6457 bbci a4, 5, 4020a58c +4020a530: 010f32 l8ui a3, a15, 1 +4020a533: 060f52 l8ui a5, a15, 6 +4020a536: 114380 slli a4, a3, 8 +4020a539: 040f32 l8ui a3, a15, 4 +4020a53c: 113300 slli a3, a3, 16 +4020a53f: 203430 or a3, a4, a3 +4020a542: 000f42 l8ui a4, a15, 0 +4020a545: 204340 or a4, a3, a4 +4020a548: 050f32 l8ui a3, a15, 5 +4020a54b: 013380 slli a3, a3, 24 +4020a54e: 204430 or a4, a4, a3 +4020a551: 070f32 l8ui a3, a15, 7 +4020a554: 1249 s32i.n a4, a2, 4 +4020a556: 113380 slli a3, a3, 8 +4020a559: 203530 or a3, a5, a3 +4020a55c: 2239 s32i.n a3, a2, 8 +4020a55e: 0002c6 j 4020a56d +4020a561: 050c32 l8ui a3, a12, 5 +4020a564: ffb521 l32r a2, 4020a438 +4020a567: deb901 l32r a0, 4020204c +4020a56a: 0000c0 callx0 a0 +4020a56d: ffb321 l32r a2, 4020a43c +4020a570: 030c movi.n a3, 0 +4020a572: a0ee20 addx4 a14, a14, a2 +4020a575: 0e58 l32i.n a5, a14, 0 +4020a577: 111537 beq a5, a3, 4020a58c +4020a57a: 010c42 l8ui a4, a12, 1 +4020a57d: 0c3d mov.n a3, a12 +4020a57f: 442b addi.n a4, a4, 2 +4020a581: 744040 extui a4, a4, 0, 8 +4020a584: 202110 or a2, a1, a1 +4020a587: 0005c0 callx0 a5 +4020a58a: 030c movi.n a3, 0 +4020a58c: f108 l32i.n a0, a1, 60 +4020a58e: 032d mov.n a2, a3 +4020a590: e1c8 l32i.n a12, a1, 56 +4020a592: d1d8 l32i.n a13, a1, 52 +4020a594: c1e8 l32i.n a14, a1, 48 +4020a596: b1f8 l32i.n a15, a1, 44 +4020a598: 40c112 addi a1, a1, 64 +4020a59b: f00d ret.n +4020a59d: 000000 ill +4020a5a0: 20a440 or a10, a4, a4 +4020a5a3: 037e40 excw +4020a5a6: 23 .byte 0x23 +4020a5a7: 40 .byte 0x40 + +4020a5a8 : +4020a5a8: fffe41 l32r a4, 4020a5a0 +4020a5ab: f0c112 addi a1, a1, -16 +4020a5ae: 030c movi.n a3, 0 +4020a5b0: 7fa022 movi a2, 127 +4020a5b3: 21c9 s32i.n a12, a1, 8 +4020a5b5: 3109 s32i.n a0, a1, 12 +4020a5b7: 010885 call0 4020b640 +4020a5ba: 02cd mov.n a12, a2 +4020a5bc: 008216 beqz a2, 4020a5c8 +4020a5bf: fff921 l32r a2, 4020a5a4 +4020a5c2: dea201 l32r a0, 4020204c +4020a5c5: 0000c0 callx0 a0 +4020a5c8: dd6721 l32r a2, 40201b64 +4020a5cb: 030c movi.n a3, 0 +4020a5cd: 7d6232 s32i a3, a2, 0x1f4 +4020a5d0: 01d222 addmi a2, a2, 0x100 +4020a5d3: f84232 s8i a3, a2, 248 +4020a5d6: 3108 l32i.n a0, a1, 12 +4020a5d8: 0c2d mov.n a2, a12 +4020a5da: 21c8 l32i.n a12, a1, 8 +4020a5dc: 10c112 addi a1, a1, 16 +4020a5df: f00d ret.n +4020a5e1: 000000 ill + +4020a5e4 : +4020a5e4: dd6031 l32r a3, 40201b64 +4020a5e7: 742020 extui a2, a2, 0, 8 +4020a5ea: 4338 l32i.n a3, a3, 16 +4020a5ec: d00342 l8ui a4, a3, 208 +4020a5ef: 021427 beq a4, a2, 4020a5f5 +4020a5f2: 3c1466 bnei a4, 1, 4020a632 +4020a5f5: d20352 l8ui a5, a3, 210 +4020a5f8: fec542 addi a4, a5, -2 +4020a5fb: 744040 extui a4, a4, 0, 8 +4020a5fe: 0e34f6 bgeui a4, 3, 4020a610 +4020a601: 0b1257 beq a2, a5, 4020a610 +4020a604: 00a042 movi a4, 0 +4020a607: d14342 s8i a4, a3, 209 +4020a60a: 01a042 movi a4, 1 +4020a60d: d24342 s8i a4, a3, 210 +4020a610: d10342 l8ui a4, a3, 209 +4020a613: 441b addi.n a4, a4, 1 +4020a615: 744040 extui a4, a4, 0, 8 +4020a618: d14342 s8i a4, a3, 209 +4020a61b: 091466 bnei a4, 1, 4020a628 +4020a61e: 062266 bnei a2, 2, 4020a628 +4020a621: 240c movi.n a4, 2 +4020a623: 000486 j 4020a639 +4020a626: 660000 excw +4020a629: 221034 excw +4020a62c: 86d243 excw +4020a62f: 000002 l8ui a0, a0, 0 +4020a632: 040c movi.n a4, 0 +4020a634: d14342 s8i a4, a3, 209 +4020a637: 140c movi.n a4, 1 +4020a639: d24342 s8i a4, a3, 210 +4020a63c: d04322 s8i a2, a3, 208 +4020a63f: f00d ret.n +4020a641: 000000 ill +4020a644: 0448 l32i.n a4, a4, 0 +4020a646: 5e4023 excw +4020a649: 402304 excw +4020a64c: 0103d1 l32r a13, 401caa58 <_lit4_end+0xc472c> + ... + +4020a650 : +4020a650: d0c112 addi a1, a1, -48 +4020a653: a1c9 s32i.n a12, a1, 40 +4020a655: 42c8 l32i.n a12, a2, 16 +4020a657: 71f9 s32i.n a15, a1, 28 +4020a659: 112cf2 l32i a15, a12, 68 +4020a65c: 027d mov.n a7, a2 +4020a65e: fff921 l32r a2, 4020a644 +4020a661: 036d mov.n a6, a3 +4020a663: 91d9 s32i.n a13, a1, 36 +4020a665: 045d mov.n a5, a4 +4020a667: 04dd mov.n a13, a4 +4020a669: 034d mov.n a4, a3 +4020a66b: 0f3d mov.n a3, a15 +4020a66d: 81e9 s32i.n a14, a1, 32 +4020a66f: 0169 s32i.n a6, a1, 0 +4020a671: 1179 s32i.n a7, a1, 4 +4020a673: 0b6102 s32i a0, a1, 44 +4020a676: de7501 l32r a0, 4020204c +4020a679: 0000c0 callx0 a0 +4020a67c: 1178 l32i.n a7, a1, 4 +4020a67e: 0168 l32i.n a6, a1, 0 +4020a680: 0728 l32i.n a2, a7, 0 +4020a682: 116c62 s32i a6, a12, 68 +4020a685: ed22e2 l32i a14, a2, 0x3b4 +4020a688: 022666 bnei a6, 2, 4020a68e +4020a68b: 006386 j 4020a81d +4020a68e: 0636f6 bgeui a6, 3, 4020a698 +4020a691: 369c beqz.n a6, 4020a6a8 +4020a693: 00d146 j 4020a9dc +4020a696: 660000 excw +4020a699: 460236 excw +4020a69c: 6600b1 l32r a11, 401e3e9c <_lit4_end+0xddb70> +4020a69f: 060256 bnez a2, 4020a703 +4020a6a2: 00ba add.n a0, a0, a11 +4020a6a4: 00cd06 j 4020a9dc +4020a6a7: 3f6600 excw +4020a6aa: 254602 s8i a0, a6, 37 +4020a6ad: 4ff600 excw +4020a6b0: 660a add.n a6, a6, a0 +4020a6b2: 2f .byte 0x2f +4020a6b3: 314602 s8i a0, a6, 49 +4020a6b6: c84600 excw +4020a6b9: 000000 ill +4020a6bc: 055f26 beqi a15, 5, 4020a6c5 +4020a6bf: 027f26 beqi a15, 7, 4020a6c5 +4020a6c2: 00c586 j 4020a9dc +4020a6c5: 74d0d0 extui a13, a13, 0, 8 +4020a6c8: 282d26 beqi a13, 2, 4020a6f4 +4020a6cb: 193de6 bgei a13, 3, 4020a6e8 +4020a6ce: 481d66 bnei a13, 1, 4020a71a +4020a6d1: 420c movi.n a2, 4 +4020a6d3: fff105 call0 4020a5e4 +4020a6d6: 440c movi.n a4, 4 +4020a6d8: a0a032 movi a3, 160 +4020a6db: 0c2d mov.n a2, a12 +4020a6dd: f86f85 call0 40202dd8 +4020a6e0: c8a0f2 movi a15, 200 +4020a6e3: 001486 j 4020a739 +4020a6e6: 220000 excw +4020a6e9: 27a0a0 excw +4020a6ec: 051d mov.n a1, a5 +4020a6ee: c0a022 movi a2, 192 +4020a6f1: 259d27 bne a13, a2, 4020a71a +4020a6f4: 220c movi.n a2, 2 +4020a6f6: ffeec5 call0 4020a5e4 +4020a6f9: 2c4b addi.n a2, a12, 4 +4020a6fb: e63001 l32r a0, 40203fbc +4020a6fe: 0000c0 callx0 a0 +4020a701: 18cc22 addi a2, a12, 24 +4020a704: e62e01 l32r a0, 40203fbc +4020a707: 0000c0 callx0 a0 +4020a70a: 840c movi.n a4, 8 +4020a70c: a0a032 movi a3, 160 +4020a70f: 0c2d mov.n a2, a12 +4020a711: f86c45 call0 40202dd8 +4020a714: cca0f2 movi a15, 204 +4020a717: 000786 j 4020a739 +4020a71a: 04cc22 addi a2, a12, 4 +4020a71d: e62701 l32r a0, 40203fbc +4020a720: 0000c0 callx0 a0 +4020a723: 18cc22 addi a2, a12, 24 +4020a726: e62501 l32r a0, 40203fbc +4020a729: 0000c0 callx0 a0 +4020a72c: 08a042 movi a4, 8 +4020a72f: a0a032 movi a3, 160 +4020a732: 0c2d mov.n a2, a12 +4020a734: f86a05 call0 40202dd8 +4020a737: 8f0c movi.n a15, 8 +4020a739: 0e3d mov.n a3, a14 +4020a73b: 0c2d mov.n a2, a12 +4020a73d: ff6045 call0 40209d44 +4020a740: 001a86 j 4020a7ae +4020a743: 2c2200 excw +4020a746: a21624 excw +4020a749: cc2201 l32r a0, 401fd7d4 <_lit4_end+0xf74a8> +4020a74c: 1b0104 excw +4020a74f: 00c0e6 bgei a0, 32, 4020a753 +4020a752: cc2200 excw +4020a755: 0118 l32i.n a1, a1, 0 +4020a757: e619 s32i.n a1, a6, 56 +4020a759: 0000c0 callx0 a0 +4020a75c: 242c32 l32i a3, a12, 144 +4020a75f: 202cc0 or a2, a12, a12 +4020a762: ff5e05 call0 40209d44 +4020a765: 121c movi.n a2, 17 +4020a767: 5f0c movi.n a15, 5 +4020a769: 411d27 beq a13, a2, 4020a7ae +4020a76c: fccdd2 addi a13, a13, -4 +4020a76f: cba022 movi a2, 203 +4020a772: 430c movi.n a3, 4 +4020a774: 8323d0 moveqz a2, a3, a13 +4020a777: 02fd mov.n a15, a2 +4020a779: 000c46 j 4020a7ae +4020a77c: f92100 excw +4020a77f: 28dc bnez.n a8, 4020a795 +4020a781: 022242 l32i a4, a2, 8 +4020a784: 2226d0 excw +4020a787: 420c04 excw +4020a78a: ffe585 call0 4020a5e4 +4020a78d: 2c4b addi.n a2, a12, 4 +4020a78f: e60b01 l32r a0, 40203fbc +4020a792: 0000c0 callx0 a0 +4020a795: 18cc22 addi a2, a12, 24 +4020a798: e60901 l32r a0, 40203fbc +4020a79b: 0000c0 callx0 a0 +4020a79e: fecdd2 addi a13, a13, -2 +4020a7a1: caa022 movi a2, 202 +4020a7a4: 230c movi.n a3, 2 +4020a7a6: 8323d0 moveqz a2, a3, a13 +4020a7a9: 02fd mov.n a15, a2 +4020a7ab: ff1ec5 call0 40209998 +4020a7ae: e79521 l32r a2, 40204604 +4020a7b1: 0228 l32i.n a2, a2, 0 +4020a7b3: 225216 beqz a2, 4020a9dc +4020a7b6: fb8321 l32r a2, 402095c4 +4020a7b9: 000222 l8ui a2, a2, 0 +4020a7bc: 21c256 bnez a2, 4020a9dc +4020a7bf: ffa2e1 l32r a14, 4020a648 +4020a7c2: 20a142 movi a4, 0x120 +4020a7c5: 0e3d mov.n a3, a14 +4020a7c7: c22c movi.n a2, 44 +4020a7c9: de2101 l32r a0, 40202050 +4020a7cc: 0000c0 callx0 a0 +4020a7cf: 02dd mov.n a13, a2 +4020a7d1: 207216 beqz a2, 4020a9dc +4020a7d4: 150c movi.n a5, 1 +4020a7d6: 0259 s32i.n a5, a2, 0 +4020a7d8: 2b42f2 s8i a15, a2, 43 +4020a7db: 640c movi.n a4, 6 +4020a7dd: 48cc32 addi a3, a12, 72 +4020a7e0: 25c222 addi a2, a2, 37 +4020a7e3: 0159 s32i.n a5, a1, 0 +4020a7e5: da0b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a7e8: 0000c0 callx0 a0 +4020a7eb: e17731 l32r a3, 40202dc8 +4020a7ee: 042c movi.n a4, 32 +4020a7f0: 2d4b addi.n a2, a13, 4 +4020a7f2: da0801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a7f5: 0000c0 callx0 a0 +4020a7f8: dcdb21 l32r a2, 40201b64 +4020a7fb: 0d4d mov.n a4, a13 +4020a7fd: 862222 l32i a2, a2, 0x218 +4020a800: 244d22 s8i a2, a13, 36 +4020a803: 0158 l32i.n a5, a1, 0 +4020a805: 521c movi.n a2, 21 +4020a807: 203550 or a3, a5, a5 +4020a80a: e78701 l32r a0, 40204628 +4020a80d: 0000c0 callx0 a0 +4020a810: 1c8216 beqz a2, 4020a9dc +4020a813: 2ba142 movi a4, 0x12b +4020a816: 0e3d mov.n a3, a14 +4020a818: 0d2d mov.n a2, a13 +4020a81a: 004f06 j 4020a95a +4020a81d: 074ff6 bgeui a15, 4, 4020a828 +4020a820: 0c2ff6 bgeui a15, 2, 4020a830 +4020a823: 000d46 j 4020a85c +4020a826: 260000 excw +4020a829: 5f .byte 0x5f +4020a82a: 4638 l32i.n a3, a6, 16 +4020a82c: 006b addi.n a0, a0, 6 +4020a82e: d00000 subx2 a0, a0, a0 +4020a831: 327420 excw +4020a834: 37b0a0 excw +4020a837: 320812 l8ui a1, a8, 50 +4020a83a: 37c0a0 excw +4020a83d: 460812 l8ui a1, a8, 70 +4020a840: 0c0066 bnei a0, -1, 4020a850 +4020a843: 058624 excw +4020a846: d00000 subx2 a0, a0, a0 +4020a849: 21d8 l32i.n a13, a1, 8 +4020a84b: 021c movi.n a2, 16 +4020a84d: 02b2d7 bgeu a2, a13, 4020a853 +4020a850: 006206 j 4020a9dc +4020a853: ff7e21 l32r a2, 4020a64c +4020a856: 02d2d7 bbs a2, a13, 4020a85c +4020a859: 005fc6 j 4020a9dc +4020a85c: 140c movi.n a4, 1 +4020a85e: b0a032 movi a3, 176 +4020a861: 004746 j 4020a982 +4020a864: 7420d0 extui a2, a13, 0, 8 +4020a867: b0a032 movi a3, 176 +4020a86a: 0e1237 beq a2, a3, 4020a87c +4020a86d: c0a032 movi a3, 192 +4020a870: 1d1237 beq a2, a3, 4020a891 +4020a873: a0a032 movi a3, 160 +4020a876: 171237 beq a2, a3, 4020a891 +4020a879: 0057c6 j 4020a9dc +4020a87c: 02a042 movi a4, 2 +4020a87f: b0a032 movi a3, 176 +4020a882: 202cc0 or a2, a12, a12 +4020a885: f85505 call0 40202dd8 +4020a888: 05a022 movi a2, 5 +4020a88b: 116c22 s32i a2, a12, 68 +4020a88e: 005286 j 4020a9dc +4020a891: dcb421 l32r a2, 40201b64 +4020a894: 05d2f2 addmi a15, a2, 0x500 +4020a897: 202f32 l32i a3, a15, 128 +4020a89a: 013356 bnez a3, 4020a8b1 +4020a89d: 2128d0 srai a2, a13, 8 +4020a8a0: f2c232 addi a3, a2, -14 +4020a8a3: 0223b6 bltui a3, 2, 4020a8a9 +4020a8a6: 076266 bnei a2, 6, 4020a8b1 +4020a8a9: 220c movi.n a2, 2 +4020a8ab: 201110 or a1, a1, a1 +4020a8ae: ffd345 call0 4020a5e4 +4020a8b1: 18cc22 addi a2, a12, 24 +4020a8b4: e5c201 l32r a0, 40203fbc +4020a8b7: 0000c0 callx0 a0 +4020a8ba: fc4b addi.n a15, a12, 4 +4020a8bc: 0f2d mov.n a2, a15 +4020a8be: e5bf01 l32r a0, 40203fbc +4020a8c1: 0000c0 callx0 a0 +4020a8c4: 082805 call0 40212b48 +4020a8c7: 231266 bnei a2, 1, 4020a8ee +4020a8ca: e14231 l32r a3, 40202dd4 +4020a8cd: 202322 l32i a2, a3, 128 +4020a8d0: a2dc bnez.n a2, 4020a8ee +4020a8d2: ef4631 l32r a3, 402065ec +4020a8d5: 040c movi.n a4, 0 +4020a8d7: 0f2d mov.n a2, a15 +4020a8d9: e6b601 l32r a0, 402043b4 +4020a8dc: 0000c0 callx0 a0 +4020a8df: 150c movi.n a5, 1 +4020a8e1: 040c movi.n a4, 0 +4020a8e3: e8a332 movi a3, 0x3e8 +4020a8e6: 0f2d mov.n a2, a15 +4020a8e8: e5b401 l32r a0, 40203fb8 +4020a8eb: 0000c0 callx0 a0 +4020a8ee: 0c2d mov.n a2, a12 +4020a8f0: 0e3d mov.n a3, a14 +4020a8f2: ff4505 call0 40209d44 +4020a8f5: e74321 l32r a2, 40204604 +4020a8f8: 0228 l32i.n a2, a2, 0 +4020a8fa: 0de216 beqz a2, 4020a9dc +4020a8fd: ff52e1 l32r a14, 4020a648 +4020a900: 68a142 movi a4, 0x168 +4020a903: 0e3d mov.n a3, a14 +4020a905: c22c movi.n a2, 44 +4020a907: ddd201 l32r a0, 40202050 +4020a90a: 0000c0 callx0 a0 +4020a90d: 02fd mov.n a15, a2 +4020a90f: 0c9216 beqz a2, 4020a9dc +4020a912: 150c movi.n a5, 1 +4020a914: 21d8d0 srai a13, a13, 8 +4020a917: 0259 s32i.n a5, a2, 0 +4020a919: 2b42d2 s8i a13, a2, 43 +4020a91c: 640c movi.n a4, 6 +4020a91e: 48cc32 addi a3, a12, 72 +4020a921: 25c222 addi a2, a2, 37 +4020a924: 0159 s32i.n a5, a1, 0 +4020a926: d9bb01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a929: 0000c0 callx0 a0 +4020a92c: e12731 l32r a3, 40202dc8 +4020a92f: 042c movi.n a4, 32 +4020a931: 2f4b addi.n a2, a15, 4 +4020a933: d9b801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020a936: 0000c0 callx0 a0 +4020a939: dc8a31 l32r a3, 40201b64 +4020a93c: 0f4d mov.n a4, a15 +4020a93e: 862322 l32i a2, a3, 0x218 +4020a941: 244f22 s8i a2, a15, 36 +4020a944: 0158 l32i.n a5, a1, 0 +4020a946: 521c movi.n a2, 21 +4020a948: 053d mov.n a3, a5 +4020a94a: e73701 l32r a0, 40204628 +4020a94d: 0000c0 callx0 a0 +4020a950: 088216 beqz a2, 4020a9dc +4020a953: 73a142 movi a4, 0x173 +4020a956: 0e3d mov.n a3, a14 +4020a958: 0f2d mov.n a2, a15 +4020a95a: daeb01 l32r a0, 40201508 +4020a95d: 0000c0 callx0 a0 +4020a960: 001e06 j 4020a9dc +4020a963: 5f2600 excw +4020a966: 6ff614 excw +4020a969: 0e .byte 0xe +4020a96a: fecff2 addi a15, a15, -2 +4020a96d: 6b2ff6 bgeui a15, 2, 4020a9dc +4020a970: 040c movi.n a4, 0 +4020a972: 043d mov.n a3, a4 +4020a974: 000286 j 4020a982 +4020a977: 660000 excw +4020a97a: 7f .byte 0x7f +4020a97b: 5f .byte 0x5f +4020a97c: 00a042 movi a4, 0 +4020a97f: 20a032 movi a3, 32 +4020a982: 202cc0 or a2, a12, a12 +4020a985: f84505 call0 40202dd8 +4020a988: 001406 j 4020a9dc +4020a98b: f20000 excw +4020a98e: cf .byte 0xcf +4020a98f: fe .byte 0xfe +4020a990: 482ff6 bgeui a15, 2, 4020a9dc +4020a993: dc7421 l32r a2, 40201b64 +4020a996: 4228 l32i.n a2, a2, 16 +4020a998: d20232 l8ui a3, a2, 210 +4020a99b: 0b4366 bnei a3, 4, 4020a9aa +4020a99e: 01a032 movi a3, 1 +4020a9a1: d24232 s8i a3, a2, 210 +4020a9a4: 00a032 movi a3, 0 +4020a9a7: d14232 s8i a3, a2, 209 +4020a9aa: 00a0f2 movi a15, 0 +4020a9ad: f0cdd2 addi a13, a13, -16 +4020a9b0: 01a042 movi a4, 1 +4020a9b3: 0c2d mov.n a2, a12 +4020a9b5: 934fd0 movnez a4, a15, a13 +4020a9b8: 0e3d mov.n a3, a14 +4020a9ba: 016172 s32i a7, a1, 4 +4020a9bd: ff49c5 call0 40209e5c +4020a9c0: ee3621 l32r a2, 40206298 +4020a9c3: 0042f2 s8i a15, a2, 0 +4020a9c6: 1178 l32i.n a7, a1, 4 +4020a9c8: 02d772 addmi a7, a7, 0x200 +4020a9cb: 3c0722 l8ui a2, a7, 60 +4020a9ce: 053226 beqi a2, 3, 4020a9d7 +4020a9d1: 050145 call0 4020f9e8 +4020a9d4: 000106 j 4020a9dc +4020a9d7: 120c movi.n a2, 1 +4020a9d9: 184e22 s8i a2, a14, 24 +4020a9dc: b108 l32i.n a0, a1, 44 +4020a9de: 020c movi.n a2, 0 +4020a9e0: a1c8 l32i.n a12, a1, 40 +4020a9e2: 91d8 l32i.n a13, a1, 36 +4020a9e4: 81e8 l32i.n a14, a1, 32 +4020a9e6: 71f8 l32i.n a15, a1, 28 +4020a9e8: 30c112 addi a1, a1, 48 +4020a9eb: f00d ret.n +4020a9ed: 000000 ill + +4020a9f0 : +4020a9f0: f0c112 addi a1, a1, -16 +4020a9f3: 21c9 s32i.n a12, a1, 8 +4020a9f5: 01e9 s32i.n a14, a1, 0 +4020a9f7: dc5bc1 l32r a12, 40201b64 +4020a9fa: 03ed mov.n a14, a3 +4020a9fc: 1438 l32i.n a3, a4, 4 +4020a9fe: 3109 s32i.n a0, a1, 12 +4020aa00: 1358 l32i.n a5, a3, 4 +4020aa02: 05dc32 addmi a3, a12, 0x500 +4020aa05: 1f2362 l32i a6, a3, 124 +4020aa08: 11d9 s32i.n a13, a1, 4 +4020aa0a: 26ac beqz.n a6, 4020aa30 +4020aa0c: 202332 l32i a3, a3, 128 +4020aa0f: 1d1366 bnei a3, 1, 4020aa30 +4020aa12: 7a2c22 l32i a2, a12, 0x1e8 +4020aa15: 0af216 beqz a2, 4020aac8 +4020aa18: 2268 l32i.n a6, a2, 8 +4020aa1a: 0aa616 beqz a6, 4020aac8 +4020aa1d: 0b1442 l16ui a4, a4, 22 +4020aa20: 0ec532 addi a3, a5, 14 +4020aa23: f2c442 addi a4, a4, -14 +4020aa26: 06c522 addi a2, a5, 6 +4020aa29: 0006c0 callx0 a6 +4020aa2c: 002606 j 4020aac8 +4020aa2f: 056200 extui a6, a0, 18, 1 +4020aa32: 720d excw +4020aa34: 310c05 call0 4023baf8 <_irom0_text_end+0xaf7c> +4020aa37: 80e6f1 l32r a15, 401eadd0 <_lit4_end+0xe4aa4> +4020aa3a: 701166 bnei a1, 1, 4020aaae +4020aa3d: 302066 bnei a0, 2, 4020aa71 +4020aa40: 22f430 excw +4020aa43: 372422 l32i a2, a4, 220 +4020aa46: 380916 beqz a9, 4020adca +4020aa49: 220c22 l8ui a2, a12, 34 +4020aa4c: 7ae307 bbsi a3, 0, 4020aaca +4020aa4f: 001d46 j 4020aac8 +4020aa52: 2228 l32i.n a2, a2, 8 +4020aa54: 05e207 bbsi a2, 0, 4020aa5d +4020aa57: 180e22 l8ui a2, a14, 24 +4020aa5a: 6a1266 bnei a2, 1, 4020aac8 +4020aa5d: 02dc22 addmi a2, a12, 0x200 +4020aa60: 3d0222 l8ui a2, a2, 61 +4020aa63: 514266 bnei a2, 4, 4020aab8 +4020aa66: 06dc22 addmi a2, a12, 0x600 +4020aa69: 2c2232 l32i a3, a2, 176 +4020aa6c: 02dd mov.n a13, a2 +4020aa6e: 431366 bnei a3, 1, 4020aab5 +4020aa71: 792c22 l32i a2, a12, 0x1e4 +4020aa74: 050216 beqz a2, 4020aac8 +4020aa77: 0268 l32i.n a6, a2, 0 +4020aa79: 04b616 beqz a6, 4020aac8 +4020aa7c: 0b1442 l16ui a4, a4, 22 +4020aa7f: 35eb addi.n a3, a5, 14 +4020aa81: f2c442 addi a4, a4, -14 +4020aa84: 256b addi.n a2, a5, 6 +4020aa86: 0006c0 callx0 a6 +4020aa89: 2c2d22 l32i a2, a13, 176 +4020aa8c: 062226 beqi a2, 2, 4020aa96 +4020aa8f: 0a3226 beqi a2, 3, 4020aa9d +4020aa92: 000c86 j 4020aac8 +4020aa95: 0e3d00 excw +4020aa98: 0c2d mov.n a2, a12 +4020aa9a: 04efc5 call0 4020f998 +4020aa9d: 01dc22 addmi a2, a12, 0x100 +4020aaa0: 030c movi.n a3, 0 +4020aaa2: de4232 s8i a3, a2, 222 +4020aaa5: 792c22 l32i a2, a12, 0x1e4 +4020aaa8: c29c beqz.n a2, 4020aac8 +4020aaaa: 3228 l32i.n a2, a2, 12 +4020aaac: 829c beqz.n a2, 4020aac8 +4020aaae: 0002c0 callx0 a2 +4020aab1: 0004c6 j 4020aac8 +4020aab4: 236600 excw +4020aab7: 0f .byte 0xf +4020aab8: 0b1442 l16ui a4, a4, 22 +4020aabb: 35eb addi.n a3, a5, 14 +4020aabd: f2c442 addi a4, a4, -14 +4020aac0: 256b addi.n a2, a5, 6 +4020aac2: 201110 or a1, a1, a1 +4020aac5: 03d085 call0 4020e7d0 +4020aac8: 120c movi.n a2, 1 +4020aaca: 3108 l32i.n a0, a1, 12 +4020aacc: 21c8 l32i.n a12, a1, 8 +4020aace: 11d8 l32i.n a13, a1, 4 +4020aad0: 01e8 l32i.n a14, a1, 0 +4020aad2: 10c112 addi a1, a1, 16 +4020aad5: f00d ret.n +4020aad7: 87a000 excw +4020aada: fe .byte 0xfe +4020aadb: 3f .byte 0x3f +4020aadc: fed324 excw +4020aadf: 3f .byte 0x3f +4020aae0: d31c movi.n a3, 29 +4020aae2: fe .byte 0xfe +4020aae3: 3f .byte 0x3f +4020aae4: d318 l32i.n a1, a3, 52 +4020aae6: fe .byte 0xfe +4020aae7: 3f .byte 0x3f +4020aae8: fed304 excw +4020aaeb: 3f .byte 0x3f +4020aaec: e9fc bnez.n a9, 4020ab2e +4020aaee: ff .byte 0xff +4020aaef: ff .byte 0xff +4020aaf0: 98ac beqz.n a8, 4020ab1d +4020aaf2: 004020 break 0, 2 +4020aaf5: cbb370 excw +4020aaf8: ff .byte 0xff +4020aaf9: ff .byte 0xff +4020aafa: ef .byte 0xef +4020aafb: ff .byte 0xff + +4020aafc : +4020aafc: c0a092 movi a9, 192 +4020aaff: c01190 sub a1, a1, a9 +4020ab02: 2e61c2 s32i a12, a1, 184 +4020ab05: 02cd mov.n a12, a2 +4020ab07: 4328 l32i.n a2, a3, 16 +4020ab09: 2d61d2 s32i a13, a1, 180 +4020ab0c: 1e6142 s32i a4, a1, 120 +4020ab0f: 03dd mov.n a13, a3 +4020ab11: e6b841 l32r a4, 402045f4 +4020ab14: 002232 l32i a3, a2, 0 +4020ab17: 2f6102 s32i a0, a1, 188 +4020ab1a: 2c61e2 s32i a14, a1, 176 +4020ab1d: 2b61f2 s32i a15, a1, 172 +4020ab20: b57030 extui a7, a3, 16, 12 +4020ab23: 050347 bnone a3, a4, 4020ab2c +4020ab26: 012272 l32i a7, a2, 4 +4020ab29: f47870 extui a7, a7, 8, 16 +4020ab2c: dc0e21 l32r a2, 40201b64 +4020ab2f: 01d222 addmi a2, a2, 0x100 +4020ab32: de0222 l8ui a2, a2, 222 +4020ab35: 021266 bnei a2, 1, 4020ab3b +4020ab38: 0190c6 j 4020b17f +4020ab3b: 640c16 beqz a12, 4020b17f +4020ab3e: 242ca2 l32i a10, a12, 144 +4020ab41: f20c movi.n a2, 15 +4020ab43: 1861a2 s32i a10, a1, 96 +4020ab46: 023277 bltu a2, a7, 4020ab4c +4020ab49: 022dc6 j 4020b404 +4020ab4c: 1d28 l32i.n a2, a13, 4 +4020ab4e: 1268 l32i.n a6, a2, 4 +4020ab50: 000682 l8ui a8, a6, 0 +4020ab53: 142080 extui a2, a8, 0, 2 +4020ab56: 128c beqz.n a2, 4020ab5b +4020ab58: 022a06 j 4020b404 +4020ab5b: c20c movi.n a2, 12 +4020ab5d: 102820 and a2, a8, a2 +4020ab60: 0106e2 l8ui a14, a6, 1 +4020ab63: 1a6122 s32i a2, a1, 104 +4020ab66: 027c movi.n a2, -16 +4020ab68: 10f820 and a15, a8, a2 +4020ab6b: 14e0e0 extui a14, a14, 0, 2 +4020ab6e: 0ac622 addi a2, a6, 10 +4020ab71: 008a56 bnez a10, 4020ab7d +4020ab74: c04c52 s8i a5, a12, 192 +4020ab77: 426827 bbci a8, 2, 4020abbd +4020ab7a: 003b46 j 4020ac6b +4020ab7d: ed6131 l32r a3, 40206104 +4020ab80: 460332 l8ui a3, a3, 70 +4020ab83: ede307 bbsi a3, 0, 4020ab74 +4020ab86: 182132 l32i a3, a1, 96 +4020ab89: 640c movi.n a4, 6 +4020ab8b: 246152 s32i a5, a1, 144 +4020ab8e: 226162 s32i a6, a1, 136 +4020ab91: 216172 s32i a7, a1, 132 +4020ab94: 236182 s32i a8, a1, 140 +4020ab97: dc2101 l32r a0, 40201c1c +4020ab9a: 0000c0 callx0 a0 +4020ab9d: 242152 l32i a5, a1, 144 +4020aba0: 222162 l32i a6, a1, 136 +4020aba3: 212172 l32i a7, a1, 132 +4020aba6: 232182 l32i a8, a1, 140 +4020aba9: fc7216 beqz a2, 4020ab74 +4020abac: 1a21a2 l32i a10, a1, 104 +4020abaf: 5cca56 bnez a10, 4020b17f +4020abb2: 30af22 movi a2, -208 +4020abb5: 2f2a add.n a2, a15, a2 +4020abb7: 5c4256 bnez a2, 4020b17f +4020abba: ffed86 j 4020ab74 +4020abbd: 040622 l8ui a2, a6, 4 +4020abc0: 026207 bbci a2, 0, 4020abc6 +4020abc3: 002906 j 4020ac6b +4020abc6: 000632 l8ui a3, a6, 0 +4020abc9: 8ca022 movi a2, 140 +4020abcc: 103320 and a3, a3, a2 +4020abcf: 88a042 movi a4, 136 +4020abd2: 010622 l8ui a2, a6, 1 +4020abd5: 051c movi.n a5, 16 +4020abd7: 139347 bne a3, a4, 4020abee +4020abda: 143020 extui a3, a2, 0, 2 +4020abdd: 073366 bnei a3, 3, 4020abe8 +4020abe0: 1e0652 l8ui a5, a6, 30 +4020abe3: 000106 j 4020abeb +4020abe6: 520000 excw +4020abe9: 501806 j 4021ec4d +4020abec: a23450 excw +4020abef: 821a21 l32r a2, 401eb458 <_lit4_end+0xe512c> +4020abf2: cc0b16 beqz a11, 4020a8b6 +4020abf5: 325a add.n a3, a2, a5 +4020abf7: af .byte 0xaf +4020abf8: 3f3a30 excw +4020abfb: a38c beqz.n a3, 4020ac09 +4020abfd: 010622 l8ui a2, a6, 1 +4020ac00: 30c552 addi a5, a5, 48 +4020ac03: 52e237 bbsi a2, 3, 4020ac59 +4020ac06: 0016c6 j 4020ac65 +4020ac09: 043620 extui a3, a2, 6, 1 +4020ac0c: 18c642 addi a4, a6, 24 +4020ac0f: 20c622 addi a2, a6, 32 +4020ac12: 832430 moveqz a2, a4, a3 +4020ac15: 328b addi.n a3, a2, 8 +4020ac17: c03360 sub a3, a3, a6 +4020ac1a: 06a737 bge a7, a3, 4020ac24 +4020ac1d: 0a0c movi.n a10, 0 +4020ac1f: 01f906 j 4020b407 +4020ac22: 420000 excw +4020ac25: 320002 l8ui a0, a0, 50 +4020ac28: 377fa0 excw +4020ac2b: 31cf94 excw +4020ac2e: ffaa add.n a15, a15, a10 +4020ac30: 03a042 movi a4, 3 +4020ac33: 01c222 addi a2, a2, 1 +4020ac36: 246152 s32i a5, a1, 144 +4020ac39: 226162 s32i a6, a1, 136 +4020ac3c: 216172 s32i a7, a1, 132 +4020ac3f: 236182 s32i a8, a1, 140 +4020ac42: dbf601 l32r a0, 40201c1c +4020ac45: 0000c0 callx0 a0 +4020ac48: 242152 l32i a5, a1, 144 +4020ac4b: 222162 l32i a6, a1, 136 +4020ac4e: 212172 l32i a7, a1, 132 +4020ac51: 232182 l32i a8, a1, 140 +4020ac54: 329c beqz.n a2, 4020ac6b +4020ac56: ffe8c6 j 4020abfd +4020ac59: 9025c0 addx2 a2, a5, a12 +4020ac5c: 001222 l16ui a2, a2, 0 +4020ac5f: 029287 bne a2, a8, 4020ac65 +4020ac62: 014646 j 4020b17f +4020ac65: 9055c0 addx2 a5, a5, a12 +4020ac68: 005582 s16i a8, a5, 0 +4020ac6b: 010652 l8ui a5, a6, 1 +4020ac6e: 831c movi.n a3, 24 +4020ac70: 145050 extui a5, a5, 0, 2 +4020ac73: fdc522 addi a2, a5, -3 +4020ac76: e51c movi.n a5, 30 +4020ac78: 935320 movnez a5, a3, a2 +4020ac7b: 000632 l8ui a3, a6, 0 +4020ac7e: 8ca022 movi a2, 140 +4020ac81: 102320 and a2, a3, a2 +4020ac84: 88a042 movi a4, 136 +4020ac87: 352b addi.n a3, a5, 2 +4020ac89: c02240 sub a2, a2, a4 +4020ac8c: 835320 moveqz a5, a3, a2 +4020ac8f: f43050 extui a3, a5, 0, 16 +4020ac92: fcc722 addi a2, a7, -4 +4020ac95: c02230 sub a2, a2, a3 +4020ac98: 1a21a2 l32i a10, a1, 104 +4020ac9b: 0a5d32 s16i a3, a13, 20 +4020ac9e: 0b5d22 s16i a2, a13, 22 +4020aca1: 08ba16 beqz a10, 4020ad30 +4020aca4: 028a26 beqi a10, 8, 4020acaa +4020aca7: 013506 j 4020b17f +4020acaa: 242c22 l32i a2, a12, 144 +4020acad: 4ce216 beqz a2, 4020b17f +4020acb0: 022e26 beqi a14, 2, 4020acb6 +4020acb3: 013206 j 4020b17f +4020acb6: 02a757 bge a7, a5, 4020acbc +4020acb9: 013086 j 4020b17f +4020acbc: 010622 l8ui a2, a6, 1 +4020acbf: 236267 bbci a2, 6, 4020ace6 +4020acc2: 054d mov.n a4, a5 +4020acc4: 0d3d mov.n a3, a13 +4020acc6: 0c2d mov.n a2, a12 +4020acc8: 246152 s32i a5, a1, 144 +4020accb: 226162 s32i a6, a1, 136 +4020acce: 216172 s32i a7, a1, 132 +4020acd1: f75ec5 call0 402022c0 +4020acd4: 02ed mov.n a14, a2 +4020acd6: 242152 l32i a5, a1, 144 +4020acd9: 222162 l32i a6, a1, 136 +4020acdc: 212172 l32i a7, a1, 132 +4020acdf: 49c216 beqz a2, 4020b17f +4020ace2: 000286 j 4020acf0 +4020ace5: 1d3800 excw +4020ace8: 0e0c movi.n a14, 0 +4020acea: 1328 l32i.n a2, a3, 4 +4020acec: 225a add.n a2, a2, a5 +4020acee: 1329 s32i.n a2, a3, 4 +4020acf0: 0d2d mov.n a2, a13 +4020acf2: 074d mov.n a4, a7 +4020acf4: 063d mov.n a3, a6 +4020acf6: fc8645 call0 4020755c +4020acf9: 02dd mov.n a13, a2 +4020acfb: 485216 beqz a2, 4020b184 +4020acfe: 182132 l32i a3, a1, 96 +4020ad01: 024d mov.n a4, a2 +4020ad03: 202cc0 or a2, a12, a12 +4020ad06: ffce85 call0 4020a9f0 +4020ad09: 021266 bnei a2, 1, 4020ad0f +4020ad0c: 011bc6 j 4020b17f +4020ad0f: decc bnez.n a14, 4020ad20 +4020ad11: db9421 l32r a2, 40201b64 +4020ad14: 02d222 addmi a2, a2, 0x200 +4020ad17: 3d0222 l8ui a2, a2, 61 +4020ad1a: 021226 beqi a2, 1, 4020ad20 +4020ad1d: 011786 j 4020b17f +4020ad20: 202cc0 or a2, a12, a12 +4020ad23: 203dd0 or a3, a13, a13 +4020ad26: fc7cc5 call0 402074f4 +4020ad29: 08a022 movi a2, 8 +4020ad2c: 01b746 j 4020b40d +4020ad2f: 721c00 excw +4020ad32: 023277 bltu a2, a7, 4020ad38 +4020ad35: ffb906 j 4020ac1d +4020ad38: ee1e56 bnez a14, 4020ac1d +4020ad3b: 0c58 l32i.n a5, a12, 0 +4020ad3d: 012d mov.n a2, a1 +4020ad3f: 835c movi.n a3, 88 +4020ad41: 246152 s32i a5, a1, 144 +4020ad44: ebbe01 l32r a0, 40205c3c +4020ad47: 0000c0 callx0 a0 +4020ad4a: 1d28 l32i.n a2, a13, 4 +4020ad4c: 0b1de2 l16ui a14, a13, 22 +4020ad4f: 1298 l32i.n a9, a2, 4 +4020ad51: 025c movi.n a2, 80 +4020ad53: 18c942 addi a4, a9, 24 +4020ad56: a4ea add.n a10, a4, a14 +4020ad58: 1b61a2 s32i a10, a1, 108 +4020ad5b: 242152 l32i a5, a1, 144 +4020ad5e: 5b1f27 beq a15, a2, 4020adbd +4020ad61: 2332f7 bltu a2, a15, 4020ad88 +4020ad64: 02cf66 bnei a15, 32, 4020ad6a +4020ad67: 010506 j 4020b17f +4020ad6a: 022c movi.n a2, 32 +4020ad6c: 0c32f7 bltu a2, a15, 4020ad7c +4020ad6f: 40cf16 beqz a15, 4020b17f +4020ad72: 02bf66 bnei a15, 16, 4020ad78 +4020ad75: 00a3c6 j 4020b008 +4020ad78: 0100c6 j 4020b17f +4020ad7b: 023c00 excw +4020ad7e: 029f27 bne a15, a2, 4020ad84 +4020ad81: 00a0c6 j 4020b008 +4020ad84: 00fdc6 j 4020b17f +4020ad87: a02200 addx4 a2, a2, a0 +4020ad8a: 9f27b0 excw +4020ad8d: 4e8602 excw +4020ad90: 32f700 excw +4020ad93: ef6613 excw +4020ad96: fc8602 excw +4020ad99: a02200 addx4 a2, a2, a0 +4020ad9c: 9f27a0 excw +4020ad9f: db4602 s8i a0, a6, 219 +4020ada2: f60600 excw +4020ada5: 000000 ill +4020ada8: c0a022 movi a2, 192 +4020adab: 029f27 bne a15, a2, 4020adb1 +4020adae: 00d1c6 j 4020b0f9 +4020adb1: d0a022 movi a2, 208 +4020adb4: 029f27 bne a15, a2, 4020adba +4020adb7: 00e486 j 4020b14d +4020adba: 00f046 j 4020b17f +4020adbd: 1f0c movi.n a15, 1 +4020adbf: 1e2152 l32i a5, a1, 120 +4020adc2: 0f4d mov.n a4, a15 +4020adc4: 013d mov.n a3, a1 +4020adc6: 0d2d mov.n a2, a13 +4020adc8: fcb585 call0 40207924 +4020adcb: 3b0256 bnez a2, 4020b17f +4020adce: 0f4d mov.n a4, a15 +4020add0: 013d mov.n a3, a1 +4020add2: 0d2d mov.n a2, a13 +4020add4: fc1e85 call0 40206fc0 +4020add7: 242c22 l32i a2, a12, 144 +4020adda: 3a1216 beqz a2, 4020b17f +4020addd: 112c32 l32i a3, a12, 68 +4020ade0: 025326 beqi a3, 5, 4020ade6 +4020ade3: 00e606 j 4020b17f +4020ade6: 060222 l8ui a2, a2, 6 +4020ade9: 02e227 bbsi a2, 2, 4020adef +4020adec: 00e3c6 j 4020b17f +4020adef: 122132 l32i a3, a1, 72 +4020adf2: 08e316 beqz a3, 4020ae84 +4020adf5: 021f66 bnei a15, 1, 4020adfb +4020adf8: 002206 j 4020ae84 +4020adfb: db5a21 l32r a2, 40201b64 +4020adfe: 0422e2 l32i a14, a2, 16 +4020ae01: 242e22 l32i a2, a14, 144 +4020ae04: 262222 l32i a2, a2, 152 +4020ae07: 216132 s32i a3, a1, 132 +4020ae0a: f71e45 call0 40201ff0 +4020ae0d: db5541 l32r a4, 40201b64 +4020ae10: 742020 extui a2, a2, 0, 8 +4020ae13: 02d452 addmi a5, a4, 0x200 +4020ae16: 080542 l8ui a4, a5, 8 +4020ae19: 212132 l32i a3, a1, 132 +4020ae1c: 641426 beqi a4, 1, 4020ae84 +4020ae1f: 030342 l8ui a4, a3, 3 +4020ae22: 5e1427 beq a4, a2, 4020ae84 +4020ae25: 120c movi.n a2, 1 +4020ae27: 084522 s8i a2, a5, 8 +4020ae2a: 040322 l8ui a2, a3, 4 +4020ae2d: 094522 s8i a2, a5, 9 +4020ae30: 030332 l8ui a3, a3, 3 +4020ae33: 0a4532 s8i a3, a5, 10 +4020ae36: 140532 l8ui a3, a5, 20 +4020ae39: 0c3366 bnei a3, 3, 4020ae49 +4020ae3c: 000532 l8ui a3, a5, 0 +4020ae3f: 638c beqz.n a3, 4020ae49 +4020ae41: 0432f6 bgeui a2, 3, 4020ae49 +4020ae44: 320c movi.n a2, 3 +4020ae46: 094522 s8i a2, a5, 9 +4020ae49: ff27f1 l32r a15, 4020aae8 +4020ae4c: 246152 s32i a5, a1, 144 +4020ae4f: 202ff0 or a2, a15, a15 +4020ae52: e45a01 l32r a0, 40203fbc +4020ae55: 0000c0 callx0 a0 +4020ae58: f86131 l32r a3, 40208fdc +4020ae5b: 040c movi.n a4, 0 +4020ae5d: 0f2d mov.n a2, a15 +4020ae5f: e55501 l32r a0, 402043b4 +4020ae62: 0000c0 callx0 a0 +4020ae65: 242152 l32i a5, a1, 144 +4020ae68: 242e32 l32i a3, a14, 144 +4020ae6b: 090522 l8ui a2, a5, 9 +4020ae6e: 0e1332 l16ui a3, a3, 28 +4020ae71: 221b addi.n a2, a2, 1 +4020ae73: 823230 mull a3, a2, a3 +4020ae76: 01a052 movi a5, 1 +4020ae79: 040c movi.n a4, 0 +4020ae7b: 202ff0 or a2, a15, a15 +4020ae7e: e44e01 l32r a0, 40203fb8 +4020ae81: 0000c0 callx0 a0 +4020ae84: db3871 l32r a7, 40201b64 +4020ae87: 030c movi.n a3, 0 +4020ae89: 4728 l32i.n a2, a7, 16 +4020ae8b: 404232 s8i a3, a2, 64 +4020ae8e: 242c42 l32i a4, a12, 144 +4020ae91: ff1631 l32r a3, 4020aaec +4020ae94: 0e1422 l16ui a2, a4, 28 +4020ae97: f43030 extui a3, a3, 0, 16 +4020ae9a: 9cc222 addi a2, a2, -100 +4020ae9d: f42020 extui a2, a2, 0, 16 +4020aea0: 05b327 bgeu a3, a2, 4020aea9 +4020aea3: 64a022 movi a2, 100 +4020aea6: 0e5422 s16i a2, a4, 28 +4020aea9: 18cce2 addi a14, a12, 24 +4020aeac: 0e2d mov.n a2, a14 +4020aeae: e44301 l32r a0, 40203fbc +4020aeb1: 0000c0 callx0 a0 +4020aeb4: 242c22 l32i a2, a12, 144 +4020aeb7: 150c movi.n a5, 1 +4020aeb9: 0e1232 l16ui a3, a2, 28 +4020aebc: 040c movi.n a4, 0 +4020aebe: 1123c0 slli a2, a3, 4 +4020aec1: c03230 sub a3, a2, a3 +4020aec4: 1133e0 slli a3, a3, 2 +4020aec7: 0e2d mov.n a2, a14 +4020aec9: 004246 j 4020afd6 +4020aecc: 026ee6 bgei a14, 6, 4020aed2 +4020aecf: 00ab06 j 4020b17f +4020aed2: 0c1922 l16ui a2, a9, 24 +4020aed5: 0d1932 l16ui a3, a9, 26 +4020aed8: 0e19e2 l16ui a14, a9, 28 +4020aedb: 021226 beqi a2, 1, 4020aee1 +4020aede: 002c86 j 4020af94 +4020aee1: d20c movi.n a2, 13 +4020aee3: 1ec9f2 addi a15, a9, 30 +4020aee6: 109e27 bne a14, a2, 4020aefa +4020aee9: db1e21 l32r a2, 40201b64 +4020aeec: 230c movi.n a3, 2 +4020aeee: 02d222 addmi a2, a2, 0x200 +4020aef1: 3c4232 s8i a3, a2, 60 +4020aef4: 140c movi.n a4, 1 +4020aef6: 002086 j 4020af7c +4020aef9: 050c00 extui a0, a0, 28, 1 +4020aefc: 120c movi.n a2, 1 +4020aefe: fec342 addi a4, a3, -2 +4020af01: 056d mov.n a6, a5 +4020af03: 836240 moveqz a6, a2, a4 +4020af06: 9325e0 movnez a2, a5, a14 +4020af09: 080627 bnone a6, a2, 4020af15 +4020af0c: 1b21a2 l32i a10, a1, 108 +4020af0f: 029af7 bne a10, a15, 4020af15 +4020af12: 009a46 j 4020b17f +4020af15: 142c22 l32i a2, a12, 80 +4020af18: 112c62 l32i a6, a12, 68 +4020af1b: 686247 bbci a2, 4, 4020af87 +4020af1e: db1151 l32r a5, 40201b64 +4020af21: fda072 movi a7, 253 +4020af24: 02d522 addmi a2, a5, 0x200 +4020af27: 3c0222 l8ui a2, a2, 60 +4020af2a: fec222 addi a2, a2, -2 +4020af2d: 568277 bany a2, a7, 4020af87 +4020af30: 1b21a2 l32i a10, a1, 108 +4020af33: 1fc922 addi a2, a9, 31 +4020af36: 0232a7 bltu a2, a10, 4020af3c +4020af39: 00bc06 j 4020b22d +4020af3c: 1f0922 l8ui a2, a9, 31 +4020af3f: c07af0 sub a7, a10, a15 +4020af42: 821b addi.n a8, a2, 1 +4020af44: 3fa877 bge a8, a7, 4020af87 +4020af47: 1e0972 l8ui a7, a9, 30 +4020af4a: 02b726 beqi a7, 16, 4020af50 +4020af4d: 00b706 j 4020b22d +4020af50: 170c movi.n a7, 1 +4020af52: 023747 bltu a7, a4, 4020af58 +4020af55: 2ee266 bnei a2, 128, 4020af87 +4020af58: 022626 beqi a6, 2, 4020af5e +4020af5b: 008806 j 4020b17f +4020af5e: 022326 beqi a3, 2, 4020af64 +4020af61: 008506 j 4020b179 +4020af64: 0c2d mov.n a2, a12 +4020af66: fc9705 call0 402078d8 +4020af69: 212216 beqz a2, 4020b17f +4020af6c: 010f42 l8ui a4, a15, 1 +4020af6f: 172c22 l32i a2, a12, 92 +4020af72: 3f2b addi.n a3, a15, 2 +4020af74: d82801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020af77: 0000c0 callx0 a0 +4020af7a: 340c movi.n a4, 3 +4020af7c: b0a032 movi a3, 176 +4020af7f: 0c2d mov.n a2, a12 +4020af81: f7e545 call0 40202dd8 +4020af84: 007dc6 j 4020b17f +4020af87: 240c movi.n a4, 2 +4020af89: 130c movi.n a3, 1 +4020af8b: 022666 bnei a6, 2, 4020af91 +4020af8e: 006c86 j 4020b144 +4020af91: 007a86 j 4020b17f +4020af94: 1e7256 bnez a2, 4020b17f +4020af97: 112c22 l32i a2, a12, 68 +4020af9a: 022226 beqi a2, 2, 4020afa0 +4020af9d: 007786 j 4020b17f +4020afa0: daf121 l32r a2, 40201b64 +4020afa3: 3a2326 beqi a3, 2, 4020afe1 +4020afa6: 040c movi.n a4, 0 +4020afa8: 043d mov.n a3, a4 +4020afaa: ff6a45 call0 4020a650 +4020afad: 07b985 call0 40212b48 +4020afb0: 021226 beqi a2, 1, 4020afb6 +4020afb3: 007206 j 4020b17f +4020afb6: cc4b addi.n a12, a12, 4 +4020afb8: 0c2d mov.n a2, a12 +4020afba: e40001 l32r a0, 40203fbc +4020afbd: 0000c0 callx0 a0 +4020afc0: ed8b31 l32r a3, 402065ec +4020afc3: 040c movi.n a4, 0 +4020afc5: 0c2d mov.n a2, a12 +4020afc7: e4fb01 l32r a0, 402043b4 +4020afca: 0000c0 callx0 a0 +4020afcd: 150c movi.n a5, 1 +4020afcf: 040c movi.n a4, 0 +4020afd1: e8a332 movi a3, 0x3e8 +4020afd4: 0c2d mov.n a2, a12 +4020afd6: e3f801 l32r a0, 40203fb8 +4020afd9: 0000c0 callx0 a0 +4020afdc: 0067c6 j 4020b17f +4020afdf: 320000 excw +4020afe2: 370da0 excw +4020afe5: 9e .byte 0x9e +4020afe6: bf8602 excw +4020afe9: ff .byte 0xff +4020afea: fb8e56 bnez a14, 4020afa6 +4020afed: 00a042 movi a4, 0 +4020aff0: 03a032 movi a3, 3 +4020aff3: ff65c5 call0 4020a650 +4020aff6: cc4b addi.n a12, a12, 4 +4020aff8: 0c2d mov.n a2, a12 +4020affa: e3f001 l32r a0, 40203fbc +4020affd: 0000c0 callx0 a0 +4020b000: 040c movi.n a4, 0 +4020b002: febb31 l32r a3, 4020aaf0 +4020b005: ffef06 j 4020afc5 +4020b008: 112c22 l32i a2, a12, 68 +4020b00b: 023226 beqi a2, 3, 4020b011 +4020b00e: 005b46 j 4020b17f +4020b011: 026ee6 bgei a14, 6, 4020b017 +4020b014: 0059c6 j 4020b17f +4020b017: 242ce2 l32i a14, a12, 144 +4020b01a: 161e16 beqz a14, 4020b17f +4020b01d: 0c19a2 l16ui a10, a9, 24 +4020b020: 0d1942 l16ui a4, a9, 26 +4020b023: 1f61a2 s32i a10, a1, 124 +4020b026: 030c movi.n a3, 0 +4020b028: dacf21 l32r a2, 40201b64 +4020b02b: f7b456 bnez a4, 4020afaa +4020b02e: 0e19a2 l16ui a10, a9, 28 +4020b031: 1ec982 addi a8, a9, 30 +4020b034: 2061a2 s32i a10, a1, 128 +4020b037: 0a0c movi.n a10, 0 +4020b039: 1961a2 s32i a10, a1, 100 +4020b03c: 1861a2 s32i a10, a1, 96 +4020b03f: 1d61a2 s32i a10, a1, 116 +4020b042: 1c61a2 s32i a10, a1, 112 +4020b045: 1b2132 l32i a3, a1, 108 +4020b048: c02380 sub a2, a3, a8 +4020b04b: 0222e6 bgei a2, 2, 4020b051 +4020b04e: 002586 j 4020b0e8 +4020b051: 010862 l8ui a6, a8, 1 +4020b054: 361b addi.n a3, a6, 1 +4020b056: 022327 blt a3, a2, 4020b05c +4020b059: 004886 j 4020b17f +4020b05c: 000822 l8ui a2, a8, 0 +4020b05f: 233c movi.n a3, 50 +4020b061: 231237 beq a2, a3, 4020b088 +4020b064: 113327 bltu a3, a2, 4020b079 +4020b067: 5a1226 beqi a2, 1, 4020b0c5 +4020b06a: 182132 l32i a3, a1, 96 +4020b06d: d3c222 addi a2, a2, -45 +4020b070: 833820 moveqz a3, a8, a2 +4020b073: 186132 s32i a3, a1, 96 +4020b076: 001906 j 4020b0de +4020b079: d33c movi.n a3, 61 +4020b07b: 111237 beq a2, a3, 4020b090 +4020b07e: dda032 movi a3, 221 +4020b081: 131237 beq a2, a3, 4020b098 +4020b084: 001586 j 4020b0de +4020b087: 618200 excw +4020b08a: c61c movi.n a6, 28 +4020b08c: 000013 excw +4020b08f: 618200 excw +4020b092: c619 s32i.n a1, a6, 48 +4020b094: 000011 l32r a1, 401cb094 <_lit4_end+0xc4d68> +4020b097: 46b600 excw +4020b09a: 083230 excw +4020b09d: 085203 excw +4020b0a0: 082202 l32i a0, a2, 32 +4020b0a3: 338004 excw +4020b0a6: 220011 l32r a1, 401d38a8 <_lit4_end+0xcd57c> +4020b0a9: 435011 l32r a1, 401dbdec <_lit4_end+0xd5ac0> +4020b0ac: 324020 excw +4020b0af: 082220 excw +4020b0b2: 228005 call0 4022d8b4 +4020b0b5: 223001 l32r a0, 401d3978 <_lit4_end+0xcd64c> +4020b0b8: 593120 excw +4020b0bb: 9237e5 excw +4020b0be: 820c movi.n a2, 8 +4020b0c0: 061d61 l32r a6, 401cc934 <_lit4_end+0xc6608> +4020b0c3: ad0006 j 401f64c7 <_lit4_end+0xf019b> +4020b0c6: c608 l32i.n a0, a6, 48 +4020b0c8: 000004 excw +4020b0cb: 423100 excw +4020b0ce: df .byte 0xdf +4020b0cf: 102322 l32i a2, a3, 64 +4020b0d2: 02f2c7 bbsi a2, 28, 4020b0d8 +4020b0d5: 0066c6 j 4020b274 +4020b0d8: 0246b6 bltui a6, 4, 4020b0de +4020b0db: 005746 j 4020b23c +4020b0de: 010822 l8ui a2, a8, 1 +4020b0e1: 222b addi.n a2, a2, 2 +4020b0e3: 882a add.n a8, a8, a2 +4020b0e5: ffd706 j 4020b045 +4020b0e8: 1f8a16 beqz a10, 4020b2e4 +4020b0eb: 010a22 l8ui a2, a10, 1 +4020b0ee: f30c movi.n a3, 15 +4020b0f0: 02b327 bgeu a3, a2, 4020b0f6 +4020b0f3: 002206 j 4020b17f +4020b0f6: 007a86 j 4020b2e4 +4020b0f9: 022ee6 bgei a14, 2, 4020b0ff +4020b0fc: 001fc6 j 4020b17f +4020b0ff: 0c1922 l16ui a2, a9, 24 +4020b102: 112c32 l32i a3, a12, 68 +4020b105: 112280 slli a2, a2, 8 +4020b108: c0a042 movi a4, 192 +4020b10b: 305326 beqi a3, 5, 4020b13f +4020b10e: 001b46 j 4020b17f +4020b111: 112c22 l32i a2, a12, 68 +4020b114: fec232 addi a3, a2, -2 +4020b117: 0223b6 bltui a3, 2, 4020b11d +4020b11a: 615266 bnei a2, 5, 4020b17f +4020b11d: 294b addi.n a2, a9, 4 +4020b11f: 640c movi.n a4, 6 +4020b121: 33c532 addi a3, a5, 51 +4020b124: 226192 s32i a9, a1, 136 +4020b127: dabd01 l32r a0, 40201c1c +4020b12a: 0000c0 callx0 a0 +4020b12d: 222192 l32i a9, a1, 136 +4020b130: 04b256 bnez a2, 4020b17f +4020b133: 482ea6 blti a14, 2, 4020b17f +4020b136: 0c1922 l16ui a2, a9, 24 +4020b139: a0a042 movi a4, 160 +4020b13c: 112280 slli a2, a2, 8 +4020b13f: 204240 or a4, a2, a4 +4020b142: 230c movi.n a3, 2 +4020b144: da8821 l32r a2, 40201b64 +4020b147: ff5085 call0 4020a650 +4020b14a: 000c46 j 4020b17f +4020b14d: 112c22 l32i a2, a12, 68 +4020b150: 175266 bnei a2, 5, 4020b16b +4020b153: 203dd0 or a3, a13, a13 +4020b156: 202cc0 or a2, a12, a12 +4020b159: 216142 s32i a4, a1, 132 +4020b15c: 226192 s32i a9, a1, 136 +4020b15f: fcee45 call0 40208044 +4020b162: 212142 l32i a4, a1, 132 +4020b165: 222192 l32i a9, a1, 136 +4020b168: 013256 bnez a2, 4020b17f +4020b16b: 1b2152 l32i a5, a1, 108 +4020b16e: 093d mov.n a3, a9 +4020b170: 0c2d mov.n a2, a12 +4020b172: 005045 call0 4020b678 +4020b175: 000186 j 4020b17f +4020b178: 436600 excw +4020b17b: 214602 s8i a0, a6, 33 +4020b17e: 0d2d00 excw +4020b181: 15bc45 call0 40220d48 +4020b184: 1a2122 l32i a2, a1, 104 +4020b187: 00a086 j 4020b40d +4020b18a: 000000 ill +4020b18d: 242c32 l32i a3, a12, 144 +4020b190: 06c316 beqz a3, 4020b200 +4020b193: 640c movi.n a4, 6 +4020b195: 29ab addi.n a2, a9, 10 +4020b197: daa101 l32r a0, 40201c1c +4020b19a: 0000c0 callx0 a0 +4020b19d: 05f256 bnez a2, 4020b200 +4020b1a0: fe4ff1 l32r a15, 4020aadc +4020b1a3: 1e21a2 l32i a10, a1, 120 +4020b1a6: 000f22 l8ui a2, a15, 0 +4020b1a9: a0ca32 addi a3, a10, -96 +4020b1ac: fe4de1 l32r a14, 4020aae0 +4020b1af: 22ac beqz.n a2, 4020b1d5 +4020b1b1: 0e48 l32i.n a4, a14, 0 +4020b1b3: 1e28 l32i.n a2, a14, 4 +4020b1b5: 01a247 bge a2, a4, 4020b1ba +4020b1b8: 042d mov.n a2, a4 +4020b1ba: 034d mov.n a4, a3 +4020b1bc: 01a327 bge a3, a2, 4020b1c1 +4020b1bf: 024d mov.n a4, a2 +4020b1c1: d3af22 movi a2, -45 +4020b1c4: 25a427 bge a4, a2, 4020b1ed +4020b1c7: 020c movi.n a2, 0 +4020b1c9: 216132 s32i a3, a1, 132 +4020b1cc: 0dda45 call0 40218f74 +4020b1cf: 020c movi.n a2, 0 +4020b1d1: 000486 j 4020b1e7 +4020b1d4: af2200 excw +4020b1d7: 27e8 l32i.n a14, a7, 8 +4020b1d9: 221123 excw +4020b1dc: 3203a0 excw +4020b1df: 052161 l32r a6, 401cc664 <_lit4_end+0xc6338> +4020b1e2: 0dd9 s32i.n a13, a13, 0 +4020b1e4: 01a022 movi a2, 1 +4020b1e7: 004f22 s8i a2, a15, 0 +4020b1ea: 212132 l32i a3, a1, 132 +4020b1ed: fe3d41 l32r a4, 4020aae4 +4020b1f0: 000422 l8ui a2, a4, 0 +4020b1f3: a0e2e0 addx4 a14, a2, a14 +4020b1f6: 221b addi.n a2, a2, 1 +4020b1f8: 042020 extui a2, a2, 0, 1 +4020b1fb: 0e39 s32i.n a3, a14, 0 +4020b1fd: 004422 s8i a2, a4, 0 +4020b200: 0f0c movi.n a15, 0 +4020b202: feee46 j 4020adbf +4020b205: 172c22 l32i a2, a12, 92 +4020b208: 529c beqz.n a2, 4020b221 +4020b20a: fd0f31 l32r a3, 4020a648 +4020b20d: 69a442 movi a4, 0x469 +4020b210: 246152 s32i a5, a1, 144 +4020b213: d8bd01 l32r a0, 40201508 +4020b216: 0000c0 callx0 a0 +4020b219: 020c movi.n a2, 0 +4020b21b: 242152 l32i a5, a1, 144 +4020b21e: 176c22 s32i a2, a12, 92 +4020b221: f5ae56 bnez a14, 4020b17f +4020b224: 040c movi.n a4, 0 +4020b226: 330c movi.n a3, 3 +4020b228: 052d mov.n a2, a5 +4020b22a: ffc646 j 4020b147 +4020b22d: 120c movi.n a2, 1 +4020b22f: 023247 bltu a2, a4, 4020b235 +4020b232: ff5446 j 4020af87 +4020b235: 0f0c movi.n a15, 0 +4020b237: ff4746 j 4020af58 +4020b23a: 320000 excw +4020b23d: 0308 l32i.n a0, a3, 0 +4020b23f: 020852 l8ui a5, a8, 2 +4020b242: 040822 l8ui a2, a8, 4 +4020b245: 113380 slli a3, a3, 8 +4020b248: 112200 slli a2, a2, 16 +4020b24b: 204350 or a4, a3, a5 +4020b24e: 203240 or a3, a2, a4 +4020b251: 050822 l8ui a2, a8, 5 +4020b254: 012280 slli a2, a2, 24 +4020b257: 202230 or a2, a2, a3 +4020b25a: f1b031 l32r a3, 4020791c +4020b25d: 401237 beq a2, a3, 4020b2a1 +4020b260: fe2531 l32r a3, 4020aaf4 +4020b263: 223a add.n a2, a2, a3 +4020b265: e75256 bnez a2, 4020b0de +4020b268: 182142 l32i a4, a1, 96 +4020b26b: 192172 l32i a7, a1, 100 +4020b26e: 834870 moveqz a4, a8, a7 +4020b271: 000c86 j 4020b2a7 +4020b274: 0246f6 bgeui a6, 4, 4020b27a +4020b277: ff98c6 j 4020b0de +4020b27a: 030832 l8ui a3, a8, 3 +4020b27d: 020852 l8ui a5, a8, 2 +4020b280: 040822 l8ui a2, a8, 4 +4020b283: 113380 slli a3, a3, 8 +4020b286: 112200 slli a2, a2, 16 +4020b289: 204350 or a4, a3, a5 +4020b28c: 203240 or a3, a2, a4 +4020b28f: 050822 l8ui a2, a8, 5 +4020b292: 012280 slli a2, a2, 24 +4020b295: 202230 or a2, a2, a3 +4020b298: f19f31 l32r a3, 40207914 +4020b29b: 0e1237 beq a2, a3, 4020b2ad +4020b29e: ff8f06 j 4020b0de +4020b2a1: 182142 l32i a4, a1, 96 +4020b2a4: 834840 moveqz a4, a8, a4 +4020b2a7: 186142 s32i a4, a1, 96 +4020b2aa: ff8c06 j 4020b0de +4020b2ad: da2d21 l32r a2, 40201b64 +4020b2b0: 5e22b2 l32i a11, a2, 0x178 +4020b2b3: e27b16 beqz a11, 4020b0de +4020b2b6: 1e2122 l32i a2, a1, 120 +4020b2b9: f8c662 addi a6, a6, -8 +4020b2bc: a0c272 addi a7, a2, -96 +4020b2bf: 58ab addi.n a5, a8, 10 +4020b2c1: 487b addi.n a4, a8, 7 +4020b2c3: 0ac932 addi a3, a9, 10 +4020b2c6: 236182 s32i a8, a1, 140 +4020b2c9: 226192 s32i a9, a1, 136 +4020b2cc: 2161a2 s32i a10, a1, 132 +4020b2cf: 746060 extui a6, a6, 0, 8 +4020b2d2: 04a022 movi a2, 4 +4020b2d5: 000bc0 callx0 a11 +4020b2d8: 232182 l32i a8, a1, 140 +4020b2db: 222192 l32i a9, a1, 136 +4020b2de: 2121a2 l32i a10, a1, 132 +4020b2e1: ff7e46 j 4020b0de +4020b2e4: 1c2172 l32i a7, a1, 112 +4020b2e7: 279c beqz.n a7, 4020b2fd +4020b2e9: 1c2142 l32i a4, a1, 112 +4020b2ec: f20c movi.n a2, 15 +4020b2ee: 010432 l8ui a3, a4, 1 +4020b2f1: 010a42 l8ui a4, a10, 1 +4020b2f4: c02240 sub a2, a2, a4 +4020b2f7: 02a237 bge a2, a3, 4020b2fd +4020b2fa: ffa046 j 4020b17f +4020b2fd: 1c2142 l32i a4, a1, 112 +4020b300: 0a3d mov.n a3, a10 +4020b302: f52c movi.n a5, 47 +4020b304: 0e2d mov.n a2, a14 +4020b306: fc5585 call0 40207860 +4020b309: 1f21a2 l32i a10, a1, 124 +4020b30c: 162c22 l32i a2, a12, 88 +4020b30f: 0f5ea2 s16i a10, a14, 30 +4020b312: 2021a2 l32i a10, a1, 128 +4020b315: 0d5ea2 s16i a10, a14, 26 +4020b318: 92cc bnez.n a2, 4020b325 +4020b31a: dc1a21 l32r a2, 40202384 +4020b31d: 0020c0 memw +4020b320: 0228 l32i.n a2, a2, 0 +4020b322: 166c22 s32i a2, a12, 88 +4020b325: 1d21a2 l32i a10, a1, 116 +4020b328: 022a16 beqz a10, 4020b34e +4020b32b: 203aa0 or a3, a10, a10 +4020b32e: 202ee0 or a2, a14, a14 +4020b331: 006dc5 call0 4020ba10 +4020b334: 016296 bltz a2, 4020b34e +4020b337: 2e38 l32i.n a3, a14, 8 +4020b339: d27c movi.n a2, -3 +4020b33b: 102320 and a2, a3, a2 +4020b33e: 2e29 s32i.n a2, a14, 8 +4020b340: 77ce32 addi a3, a14, 119 +4020b343: 0e2d mov.n a2, a14 +4020b345: 0074c5 call0 4020ba94 +4020b348: 0002c6 j 4020b357 +4020b34b: 000000 ill +4020b34e: 2e38 l32i.n a3, a14, 8 +4020b350: d27c movi.n a2, -3 +4020b352: 102320 and a2, a3, a2 +4020b355: 2e29 s32i.n a2, a14, 8 +4020b357: 1821a2 l32i a10, a1, 96 +4020b35a: da0251 l32r a5, 40201b64 +4020b35d: 037a16 beqz a10, 4020b398 +4020b360: 1921a2 l32i a10, a1, 100 +4020b363: 1abc beqz.n a10, 4020b398 +4020b365: 05d522 addmi a2, a5, 0x500 +4020b368: 102222 l32i a2, a2, 64 +4020b36b: 297237 bbci a2, 19, 4020b398 +4020b36e: 0c2d mov.n a2, a12 +4020b370: 246152 s32i a5, a1, 144 +4020b373: fd4845 call0 402087f8 +4020b376: 192142 l32i a4, a1, 100 +4020b379: 182132 l32i a3, a1, 96 +4020b37c: 202cc0 or a2, a12, a12 +4020b37f: fd5a45 call0 40208924 +4020b382: 182132 l32i a3, a1, 96 +4020b385: 043c movi.n a4, 48 +4020b387: 0c2d mov.n a2, a12 +4020b389: fd7145 call0 40208aa0 +4020b38c: 192132 l32i a3, a1, 100 +4020b38f: 202cc0 or a2, a12, a12 +4020b392: 005b45 call0 4020b948 +4020b395: 242152 l32i a5, a1, 144 +4020b398: 0f1e32 l16ui a3, a14, 30 +4020b39b: 00a422 movi a2, 0x400 +4020b39e: 103320 and a3, a3, a2 +4020b3a1: 202550 or a2, a5, a5 +4020b3a4: 246152 s32i a5, a1, 144 +4020b3a7: 006d45 call0 4020ba7c +4020b3aa: 262e22 l32i a2, a14, 152 +4020b3ad: c0a032 movi a3, 192 +4020b3b0: 002222 l32i a2, a2, 0 +4020b3b3: 242152 l32i a5, a1, 144 +4020b3b6: 104230 and a4, a2, a3 +4020b3b9: 081437 beq a4, a3, 4020b3c5 +4020b3bc: 80a432 movi a3, 0x480 +4020b3bf: 102230 and a2, a2, a3 +4020b3c2: 149237 bne a2, a3, 4020b3da +4020b3c5: 101e22 l16ui a2, a14, 32 +4020b3c8: 0e6217 bbci a2, 1, 4020b3da +4020b3cb: 072532 l32i a3, a5, 28 +4020b3ce: e19c21 l32r a2, 40203a40 +4020b3d1: 202320 or a2, a3, a2 +4020b3d4: 0002c6 j 4020b3e3 +4020b3d7: 000000 ill +4020b3da: 072532 l32i a3, a5, 28 +4020b3dd: fdc621 l32r a2, 4020aaf8 +4020b3e0: 102320 and a2, a3, a2 +4020b3e3: 076522 s32i a2, a5, 28 +4020b3e6: 0528 l32i.n a2, a5, 0 +4020b3e8: 0f4d mov.n a4, a15 +4020b3ea: ed62e2 s32i a14, a2, 0x3b4 +4020b3ed: 530c movi.n a3, 5 +4020b3ef: 202550 or a2, a5, a5 +4020b3f2: ff25c5 call0 4020a650 +4020b3f5: 050c movi.n a5, 0 +4020b3f7: 140c movi.n a4, 1 +4020b3f9: 0e3d mov.n a3, a14 +4020b3fb: 052d mov.n a2, a5 +4020b3fd: 153145 call0 40220714 +4020b400: ff5ec6 j 4020b17f +4020b403: a0a200 addx4 a10, a2, a0 +4020b406: ff .byte 0xff +4020b407: 1a61a2 s32i a10, a1, 104 +4020b40a: ff5c46 j 4020b17f +4020b40d: 2f2102 l32i a0, a1, 188 +4020b410: c0a092 movi a9, 192 +4020b413: 2e21c2 l32i a12, a1, 184 +4020b416: 2d21d2 l32i a13, a1, 180 +4020b419: 2c21e2 l32i a14, a1, 176 +4020b41c: 2b21f2 l32i a15, a1, 172 +4020b41f: 119a add.n a1, a1, a9 +4020b421: f00d ret.n +4020b423: dc0400 excw +4020b426: fe .byte 0xfe +4020b427: 3f .byte 0x3f +4020b428: fedc16 beqz a12, 4020b419 +4020b42b: 3f .byte 0x3f + +4020b42c : +4020b42c: d9ce21 l32r a2, 40201b64 +4020b42f: f0c112 addi a1, a1, -16 +4020b432: 21c9 s32i.n a12, a1, 8 +4020b434: 42c8 l32i.n a12, a2, 16 +4020b436: 11d9 s32i.n a13, a1, 4 +4020b438: 3109 s32i.n a0, a1, 12 +4020b43a: 02dd mov.n a13, a2 +4020b43c: 01e9 s32i.n a14, a1, 0 +4020b43e: 020c movi.n a2, 0 +4020b440: 481c27 beq a12, a2, 4020b48c +4020b443: 342c32 l32i a3, a12, 208 +4020b446: 120c movi.n a2, 1 +4020b448: 40f397 bbsi a3, 25, 4020b48c +4020b44b: 0c28 l32i.n a2, a12, 0 +4020b44d: fff6e1 l32r a14, 4020b428 +4020b450: 02dc bnez.n a2, 4020b464 +4020b452: fff441 l32r a4, 4020b424 +4020b455: 203ee0 or a3, a14, a14 +4020b458: 0c2d mov.n a2, a12 +4020b45a: 093e05 call0 4021483c +4020b45d: 0c29 s32i.n a2, a12, 0 +4020b45f: 0d2d mov.n a2, a13 +4020b461: 047505 call0 4020fbb4 +4020b464: 060c movi.n a6, 0 +4020b466: 130c movi.n a3, 1 +4020b468: 065d mov.n a5, a6 +4020b46a: 0e4d mov.n a4, a14 +4020b46c: 062d mov.n a2, a6 +4020b46e: 150985 call0 40220508 +4020b471: 020c movi.n a2, 0 +4020b473: 17c605 call0 402230d4 +4020b476: 020c movi.n a2, 0 +4020b478: d30c32 l8ui a3, a12, 211 +4020b47b: d04c22 s8i a2, a12, 208 +4020b47e: d14c22 s8i a2, a12, 209 +4020b481: 220c movi.n a2, 2 +4020b483: 202320 or a2, a3, a2 +4020b486: d34c22 s8i a2, a12, 211 +4020b489: 01a022 movi a2, 1 +4020b48c: 3108 l32i.n a0, a1, 12 +4020b48e: 21c8 l32i.n a12, a1, 8 +4020b490: 11d8 l32i.n a13, a1, 4 +4020b492: 01e8 l32i.n a14, a1, 0 +4020b494: 10c112 addi a1, a1, 16 +4020b497: f00d ret.n +4020b499: 000000 ill + +4020b49c : +4020b49c: d9b221 l32r a2, 40201b64 +4020b49f: f0c112 addi a1, a1, -16 +4020b4a2: 042232 l32i a3, a2, 16 +4020b4a5: 036102 s32i a0, a1, 12 +4020b4a8: 020c movi.n a2, 0 +4020b4aa: 241327 beq a3, a2, 4020b4d2 +4020b4ad: 342342 l32i a4, a3, 208 +4020b4b0: 120c movi.n a2, 1 +4020b4b2: 1c7497 bbci a4, 25, 4020b4d2 +4020b4b5: d30342 l8ui a4, a3, 211 +4020b4b8: 020c movi.n a2, 0 +4020b4ba: d04322 s8i a2, a3, 208 +4020b4bd: d14322 s8i a2, a3, 209 +4020b4c0: d27c movi.n a2, -3 +4020b4c2: 102420 and a2, a4, a2 +4020b4c5: d34322 s8i a2, a3, 211 +4020b4c8: 073ac5 call0 40212878 +4020b4cb: 020c movi.n a2, 0 +4020b4cd: 17c2c5 call0 402230fc +4020b4d0: 120c movi.n a2, 1 +4020b4d2: 3108 l32i.n a0, a1, 12 +4020b4d4: 10c112 addi a1, a1, 16 +4020b4d7: f00d ret.n +4020b4d9: 000000 ill +4020b4dc: 20b880 or a11, a8, a8 +4020b4df: 40 .byte 0x40 + +4020b4e0 : +4020b4e0: f0c112 addi a1, a1, -16 +4020b4e3: 036102 s32i a0, a1, 12 +4020b4e6: 01a032 movi a3, 1 +4020b4e9: 072242 l32i a4, a2, 28 +4020b4ec: 3239 s32i.n a3, a2, 12 +4020b4ee: f40931 l32r a3, 40208514 +4020b4f1: 203430 or a3, a4, a3 +4020b4f4: 7239 s32i.n a3, a2, 28 +4020b4f6: fff921 l32r a2, 4020b4dc +4020b4f9: 230c movi.n a3, 2 +4020b4fb: 157f05 call0 40220cec +4020b4fe: 3108 l32i.n a0, a1, 12 +4020b500: 10c112 addi a1, a1, 16 +4020b503: f00d ret.n +4020b505: 000000 ill +4020b508: 988c beqz.n a8, 4020b515 +4020b50a: 20 .byte 0x20 +4020b50b: 40 .byte 0x40 + +4020b50c : +4020b50c: e0c112 addi a1, a1, -32 +4020b50f: 0561d2 s32i a13, a1, 20 +4020b512: d994d1 l32r a13, 40201b64 +4020b515: 0661c2 s32i a12, a1, 24 +4020b518: 042dc2 l32i a12, a13, 16 +4020b51b: 41e9 s32i.n a14, a1, 16 +4020b51d: 31f9 s32i.n a15, a1, 12 +4020b51f: 7109 s32i.n a0, a1, 28 +4020b521: 74f040 extui a15, a4, 0, 8 +4020b524: 246c22 s32i a2, a12, 144 +4020b527: 023d mov.n a3, a2 +4020b529: 640c movi.n a4, 6 +4020b52b: 48cc22 addi a2, a12, 72 +4020b52e: 74e050 extui a14, a5, 0, 8 +4020b531: d6b801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020b534: 0000c0 callx0 a0 +4020b537: ffdc bnez.n a15, 4020b55a +4020b539: be8c beqz.n a14, 4020b548 +4020b53b: 340c movi.n a4, 3 +4020b53d: c0a032 movi a3, 192 +4020b540: 0c2d mov.n a2, a12 +4020b542: f78945 call0 40202dd8 +4020b545: 0004c6 j 4020b55c +4020b548: 08a042 movi a4, 8 +4020b54b: a0a032 movi a3, 160 +4020b54e: 202cc0 or a2, a12, a12 +4020b551: f78845 call0 40202dd8 +4020b554: 00a042 movi a4, 0 +4020b557: 0002c6 j 4020b566 +4020b55a: 6e8c beqz.n a14, 4020b564 +4020b55c: b0a042 movi a4, 176 +4020b55f: 230c movi.n a3, 2 +4020b561: 0000c6 j 4020b568 +4020b564: 042c movi.n a4, 32 +4020b566: 330c movi.n a3, 3 +4020b568: 202dd0 or a2, a13, a13 +4020b56b: ff0e45 call0 4020a650 +4020b56e: cc4b addi.n a12, a12, 4 +4020b570: 0c2d mov.n a2, a12 +4020b572: e29201 l32r a0, 40203fbc +4020b575: 0000c0 callx0 a0 +4020b578: ffe431 l32r a3, 4020b508 +4020b57b: 0c2d mov.n a2, a12 +4020b57d: 040c movi.n a4, 0 +4020b57f: e38d01 l32r a0, 402043b4 +4020b582: 0000c0 callx0 a0 +4020b585: 0c2d mov.n a2, a12 +4020b587: 150c movi.n a5, 1 +4020b589: 040c movi.n a4, 0 +4020b58b: e8a332 movi a3, 0x3e8 +4020b58e: e28a01 l32r a0, 40203fb8 +4020b591: 0000c0 callx0 a0 +4020b594: 7108 l32i.n a0, a1, 28 +4020b596: 61c8 l32i.n a12, a1, 24 +4020b598: 51d8 l32i.n a13, a1, 20 +4020b59a: 41e8 l32i.n a14, a1, 16 +4020b59c: 31f8 l32i.n a15, a1, 12 +4020b59e: 20c112 addi a1, a1, 32 +4020b5a1: f00d ret.n +4020b5a3: 839c00 moveqz a9, a12, a0 +4020b5a6: fe .byte 0xfe +4020b5a7: 3f .byte 0x3f +4020b5a8: 8398 l32i.n a9, a3, 32 +4020b5aa: fe .byte 0xfe +4020b5ab: 3f .byte 0x3f +4020b5ac: fe8394 excw +4020b5af: 3f .byte 0x3f + +4020b5b0 : +4020b5b0: 187226 beqi a2, 7, 4020b5cc +4020b5b3: 7fa052 movi a5, 127 +4020b5b6: 1f1257 beq a2, a5, 4020b5d9 +4020b5b9: 273266 bnei a2, 3, 4020b5e4 +4020b5bc: f27c movi.n a2, -1 +4020b5be: 2423f6 bgeui a3, 2, 4020b5e6 +4020b5c1: fff821 l32r a2, 4020b5a4 +4020b5c4: a03320 addx4 a3, a3, a2 +4020b5c7: 0349 s32i.n a4, a3, 0 +4020b5c9: 000206 j 4020b5d5 +4020b5cc: f27c movi.n a2, -1 +4020b5ce: 43dc bnez.n a3, 4020b5e6 +4020b5d0: fff621 l32r a2, 4020b5a8 +4020b5d3: 0249 s32i.n a4, a2, 0 +4020b5d5: 020c movi.n a2, 0 +4020b5d7: f00d ret.n +4020b5d9: f27c movi.n a2, -1 +4020b5db: 73cc bnez.n a3, 4020b5e6 +4020b5dd: fff321 l32r a2, 4020b5ac +4020b5e0: fffbc6 j 4020b5d3 +4020b5e3: f27c00 excw +4020b5e6: f00d ret.n +4020b5e8: 20bbd0 or a11, a11, a13 +4020b5eb: 40 .byte 0x40 + +4020b5ec : +4020b5ec: f0c112 addi a1, a1, -16 +4020b5ef: 3109 s32i.n a0, a1, 12 +4020b5f1: 027d mov.n a7, a2 +4020b5f3: 197326 beqi a3, 7, 4020b610 +4020b5f6: 7fa022 movi a2, 127 +4020b5f9: fffb61 l32r a6, 4020b5e8 +4020b5fc: 1d1327 beq a3, a2, 4020b61d +4020b5ff: 213366 bnei a3, 3, 4020b624 +4020b602: 1e24f6 bgeui a4, 2, 4020b624 +4020b605: ffe761 l32r a6, 4020b5a4 +4020b608: a06460 addx4 a6, a4, a6 +4020b60b: 0668 l32i.n a6, a6, 0 +4020b60d: 0004c6 j 4020b624 +4020b610: fff661 l32r a6, 4020b5e8 +4020b613: ffe521 l32r a2, 4020b5a8 +4020b616: 848c beqz.n a4, 4020b622 +4020b618: 000206 j 4020b624 +4020b61b: cc0000 excw +4020b61e: e32134 excw +4020b621: ff .byte 0xff +4020b622: 0268 l32i.n a6, a2, 0 +4020b624: 120c movi.n a2, 1 +4020b626: 378c beqz.n a7, 4020b62d +4020b628: 072d mov.n a2, a7 +4020b62a: 0006c0 callx0 a6 +4020b62d: 3108 l32i.n a0, a1, 12 +4020b62f: 10c112 addi a1, a1, 16 +4020b632: f00d ret.n +4020b634: fe8390 excw +4020b637: 3f .byte 0x3f +4020b638: 838c beqz.n a3, 4020b644 +4020b63a: fe .byte 0xfe +4020b63b: 3f .byte 0x3f +4020b63c: 8388 l32i.n a8, a3, 32 +4020b63e: fe .byte 0xfe +4020b63f: 3f .byte 0x3f + +4020b640 : +4020b640: 127226 beqi a2, 7, 4020b656 +4020b643: 7fa052 movi a5, 127 +4020b646: 1a1257 beq a2, a5, 4020b664 +4020b649: 213266 bnei a2, 3, 4020b66e +4020b64c: f27c movi.n a2, -1 +4020b64e: e3dc bnez.n a3, 4020b670 +4020b650: fff921 l32r a2, 4020b634 +4020b653: 000186 j 4020b65d +4020b656: f27c movi.n a2, -1 +4020b658: 43dc bnez.n a3, 4020b670 +4020b65a: fff721 l32r a2, 4020b638 +4020b65d: 0249 s32i.n a4, a2, 0 +4020b65f: 020c movi.n a2, 0 +4020b661: f00d ret.n +4020b663: f27c00 excw +4020b666: 63cc bnez.n a3, 4020b670 +4020b668: fff521 l32r a2, 4020b63c +4020b66b: fffb86 j 4020b65d +4020b66e: f27c movi.n a2, -1 +4020b670: f00d ret.n +4020b672: d40000 extui a0, a0, 0, 14 +4020b675: 20bb addi.n a2, a0, 11 +4020b677: 40 .byte 0x40 + +4020b678 : +4020b678: f0c112 addi a1, a1, -16 +4020b67b: 010372 l8ui a7, a3, 1 +4020b67e: 3109 s32i.n a0, a1, 12 +4020b680: 046d mov.n a6, a4 +4020b682: 066767 bbci a7, 6, 4020b68c +4020b685: f26e61 l32r a6, 40208040 +4020b688: 1668 l32i.n a6, a6, 4 +4020b68a: 646a add.n a6, a4, a6 +4020b68c: 000672 l8ui a7, a6, 0 +4020b68f: 167726 beqi a7, 7, 4020b6a9 +4020b692: 7fa082 movi a8, 127 +4020b695: 1f1787 beq a7, a8, 4020b6b8 +4020b698: 253766 bnei a7, 3, 4020b6c1 +4020b69b: 010672 l8ui a7, a6, 1 +4020b69e: fff561 l32r a6, 4020b674 +4020b6a1: f7dc bnez.n a7, 4020b6c4 +4020b6a3: ffe461 l32r a6, 4020b634 +4020b6a6: 000446 j 4020b6bb +4020b6a9: 010672 l8ui a7, a6, 1 +4020b6ac: fff261 l32r a6, 4020b674 +4020b6af: 17dc bnez.n a7, 4020b6c4 +4020b6b1: ffe161 l32r a6, 4020b638 +4020b6b4: 0000c6 j 4020b6bb +4020b6b7: e16100 excw +4020b6ba: ff .byte 0xff +4020b6bb: 0668 l32i.n a6, a6, 0 +4020b6bd: 0000c6 j 4020b6c4 +4020b6c0: ec6100 excw +4020b6c3: ff .byte 0xff +4020b6c4: 0006c0 callx0 a6 +4020b6c7: 3108 l32i.n a0, a1, 12 +4020b6c9: 10c112 addi a1, a1, 16 +4020b6cc: f00d ret.n +4020b6ce: 510000 excw +4020b6d1: 40d925 excw +4020b6d4: 687440 excw +4020b6d7: 050c75 excw +4020b6da: 76f6a7 bbsi a6, 26, 4020b754 +4020b6dd: 1378 l32i.n a7, a3, 4 +4020b6df: 062c movi.n a6, 32 +4020b6e1: 1758 l32i.n a5, a7, 4 +4020b6e3: f8c582 addi a8, a5, -8 +4020b6e6: 1789 s32i.n a8, a7, 4 +4020b6e8: 0b1372 l16ui a7, a3, 22 +4020b6eb: 778b addi.n a7, a7, 8 +4020b6ed: 0b5372 s16i a7, a3, 22 +4020b6f0: 8d0232 l8ui a3, a2, 141 +4020b6f3: f9c572 addi a7, a5, -7 +4020b6f6: 004832 s8i a3, a8, 0 +4020b6f9: 643030 extui a3, a3, 0, 7 +4020b6fc: 203360 or a3, a3, a6 +4020b6ff: 004732 s8i a3, a7, 0 +4020b702: 232272 l32i a7, a2, 140 +4020b705: fac532 addi a3, a5, -6 +4020b708: 004372 s8i a7, a3, 0 +4020b70b: 206460 or a6, a4, a6 +4020b70e: fbc532 addi a3, a5, -5 +4020b711: 004362 s8i a6, a3, 0 +4020b714: 471242 l16ui a4, a2, 142 +4020b717: fcc532 addi a3, a5, -4 +4020b71a: 004342 s8i a4, a3, 0 +4020b71d: 8f0242 l8ui a4, a2, 143 +4020b720: fdc532 addi a3, a5, -3 +4020b723: 004342 s8i a4, a3, 0 +4020b726: 242242 l32i a4, a2, 144 +4020b729: fec532 addi a3, a5, -2 +4020b72c: 004342 s8i a4, a3, 0 +4020b72f: 242232 l32i a3, a2, 144 +4020b732: 550b addi.n a5, a5, -1 +4020b734: 413830 srli a3, a3, 8 +4020b737: 004532 s8i a3, a5, 0 +4020b73a: 232262 l32i a6, a2, 140 +4020b73d: 242232 l32i a3, a2, 144 +4020b740: 461b addi.n a4, a6, 1 +4020b742: 150c movi.n a5, 1 +4020b744: 023467 bltu a4, a6, 4020b74a +4020b747: 00a052 movi a5, 0 +4020b74a: 353a add.n a3, a5, a3 +4020b74c: 236242 s32i a4, a2, 140 +4020b74f: 246232 s32i a3, a2, 144 +4020b752: 150c movi.n a5, 1 +4020b754: 052d mov.n a2, a5 +4020b756: f00d ret.n +4020b758: 1388 l32i.n a8, a3, 4 +4020b75a: f0c112 addi a1, a1, -16 +4020b75d: 1868 l32i.n a6, a8, 4 +4020b75f: 31c9 s32i.n a12, a1, 12 +4020b761: 764a add.n a7, a6, a4 +4020b763: 030752 l8ui a5, a7, 3 +4020b766: 029d mov.n a9, a2 +4020b768: 020c movi.n a2, 0 +4020b76a: 02e557 bbsi a5, 5, 4020b770 +4020b76d: 002a46 j 4020b81a +4020b770: d8fd21 l32r a2, 40201b64 +4020b773: 7258 l32i.n a5, a2, 28 +4020b775: 020c movi.n a2, 0 +4020b777: 0275a7 bbci a5, 26, 4020b77d +4020b77a: 002706 j 4020b81a +4020b77d: 000652 l8ui a5, a6, 0 +4020b780: 8ca022 movi a2, 140 +4020b783: 102520 and a2, a5, a2 +4020b786: 88a052 movi a5, 136 +4020b789: 0a1c movi.n a10, 16 +4020b78b: 149257 bne a2, a5, 4020b7a3 +4020b78e: 010622 l8ui a2, a6, 1 +4020b791: 142020 extui a2, a2, 0, 2 +4020b794: 053266 bnei a2, 3, 4020b79d +4020b797: 1e06a2 l8ui a10, a6, 30 +4020b79a: 000086 j 4020b7a0 +4020b79d: 1806a2 l8ui a10, a6, 24 +4020b7a0: 34a0a0 extui a10, a10, 0, 4 +4020b7a3: 000752 l8ui a5, a7, 0 +4020b7a6: 040722 l8ui a2, a7, 4 +4020b7a9: 115580 slli a5, a5, 8 +4020b7ac: 112200 slli a2, a2, 16 +4020b7af: 0207b2 l8ui a11, a7, 2 +4020b7b2: 205520 or a5, a5, a2 +4020b7b5: 050722 l8ui a2, a7, 5 +4020b7b8: 0707c2 l8ui a12, a7, 7 +4020b7bb: 2055b0 or a5, a5, a11 +4020b7be: 012280 slli a2, a2, 24 +4020b7c1: b0aa90 addx8 a10, a10, a9 +4020b7c4: 20b520 or a11, a5, a2 +4020b7c7: 112c80 slli a2, a12, 8 +4020b7ca: 0607c2 l8ui a12, a7, 6 +4020b7cd: 012a72 l32i a7, a10, 4 +4020b7d0: 20cc20 or a12, a12, a2 +4020b7d3: 022a52 l32i a5, a10, 8 +4020b7d6: 020766 bnei a7, -1, 4020b7dc +4020b7d9: 1f0526 beqi a5, -1, 4020b7fc +4020b7dc: 0597b7 bne a7, a11, 4020b7e5 +4020b7df: 00a022 movi a2, 0 +4020b7e2: 3415c7 beq a5, a12, 4020b81a +4020b7e5: c07b70 sub a7, a11, a7 +4020b7e8: 01a022 movi a2, 1 +4020b7eb: 023b77 bltu a11, a7, 4020b7f1 +4020b7ee: 00a022 movi a2, 0 +4020b7f1: c05c50 sub a5, a12, a5 +4020b7f4: c05520 sub a5, a5, a2 +4020b7f7: 020c movi.n a2, 0 +4020b7f9: 1de5f7 bbsi a5, 15, 4020b81a +4020b7fc: 1ab9 s32i.n a11, a10, 4 +4020b7fe: 2ac9 s32i.n a12, a10, 8 +4020b800: 252952 l32i a5, a9, 148 +4020b803: 1528 l32i.n a2, a5, 4 +4020b805: 442a add.n a4, a4, a2 +4020b807: 464a add.n a4, a6, a4 +4020b809: 1849 s32i.n a4, a8, 4 +4020b80b: 2548 l32i.n a4, a5, 8 +4020b80d: 242a add.n a2, a4, a2 +4020b80f: 0b1342 l16ui a4, a3, 22 +4020b812: c02420 sub a2, a4, a2 +4020b815: 0b5322 s16i a2, a3, 22 +4020b818: 120c movi.n a2, 1 +4020b81a: 31c8 l32i.n a12, a1, 12 +4020b81c: 10c112 addi a1, a1, 16 +4020b81f: f00d ret.n +4020b821: 000000 ill + +4020b824 : +4020b824: 01d222 addmi a2, a2, 0x100 +4020b827: 334c movi.n a3, 67 +4020b829: 140c movi.n a4, 1 +4020b82b: 304232 s8i a3, a2, 48 +4020b82e: e34c movi.n a3, 78 +4020b830: 314232 s8i a3, a2, 49 +4020b833: 334242 s8i a4, a2, 51 +4020b836: 030c movi.n a3, 0 +4020b838: d40c movi.n a4, 13 +4020b83a: 324232 s8i a3, a2, 50 +4020b83d: 344242 s8i a4, a2, 52 +4020b840: 354232 s8i a3, a2, 53 +4020b843: f00d ret.n +4020b845: 000000 ill + +4020b848 : +4020b848: 84a062 movi a6, 132 +4020b84b: 202272 l32i a7, a2, 128 +4020b84e: 626a add.n a6, a2, a6 +4020b850: 050c movi.n a5, 0 +4020b852: 22a577 bge a5, a7, 4020b878 +4020b855: 021682 l16ui a8, a6, 4 +4020b858: 149837 bne a8, a3, 4020b870 +4020b85b: 0688 l32i.n a8, a6, 0 +4020b85d: 0f0487 bnone a4, a8, 4020b870 +4020b860: 80a032 movi a3, 128 +4020b863: 905550 addx2 a5, a5, a5 +4020b866: a05530 addx4 a5, a5, a3 +4020b869: 225a add.n a2, a2, a5 +4020b86b: 224b addi.n a2, a2, 4 +4020b86d: f00d ret.n +4020b86f: 551b00 extui a1, a0, 27, 6 +4020b872: 66cb addi.n a6, a6, 12 +4020b874: fff686 j 4020b852 +4020b877: 020c00 excw +4020b87a: f00d ret.n + +4020b87c : +4020b87c: f00d ret.n + ... + +4020b880 : +4020b880: f00d ret.n + ... + +4020b884 : +4020b884: 260232 l8ui a3, a2, 38 +4020b887: 020c movi.n a2, 0 +4020b889: 0b1326 beqi a3, 1, 4020b898 +4020b88c: fdc322 addi a2, a3, -3 +4020b88f: 140c movi.n a4, 1 +4020b891: 330c movi.n a3, 3 +4020b893: 834320 moveqz a4, a3, a2 +4020b896: 042d mov.n a2, a4 +4020b898: f00d ret.n +4020b89a: 3d0000 excw +4020b89d: 420c02 l8ui a0, a12, 66 +4020b8a0: 228326 beqi a3, 8, 4020b8c6 +4020b8a3: 820c movi.n a2, 8 +4020b8a5: 0c2237 blt a2, a3, 4020b8b5 +4020b8a8: 020c movi.n a2, 0 +4020b8aa: 181326 beqi a3, 1, 4020b8c6 +4020b8ad: 320c movi.n a2, 3 +4020b8af: 132326 beqi a3, 2, 4020b8c6 +4020b8b2: 000386 j 4020b8c4 +4020b8b5: 120c movi.n a2, 1 +4020b8b7: 0be326 beqi a3, 128, 4020b8c6 +4020b8ba: 220c movi.n a2, 2 +4020b8bc: 06f326 beqi a3, 0x100, 4020b8c6 +4020b8bf: 520c movi.n a2, 5 +4020b8c1: 019326 beqi a3, 10, 4020b8c6 +4020b8c4: 620c movi.n a2, 6 +4020b8c6: f00d ret.n + +4020b8c8 : +4020b8c8: 010232 l8ui a3, a2, 1 +4020b8cb: 140c movi.n a4, 1 +4020b8cd: 339c beqz.n a3, 4020b8e4 +4020b8cf: 323a add.n a3, a2, a3 +4020b8d1: 0d1237 beq a2, a3, 4020b8e2 +4020b8d4: 221b addi.n a2, a2, 1 +4020b8d6: 010242 l8ui a4, a2, 1 +4020b8d9: ff4416 beqz a4, 4020b8d1 +4020b8dc: 040c movi.n a4, 0 +4020b8de: 000086 j 4020b8e4 +4020b8e1: 140c00 extui a0, a0, 12, 2 +4020b8e4: 042d mov.n a2, a4 +4020b8e6: f00d ret.n + +4020b8e8 : +4020b8e8: 744040 extui a4, a4, 0, 8 +4020b8eb: 929c beqz.n a2, 4020b908 +4020b8ed: 010272 l8ui a7, a2, 1 +4020b8f0: 026d mov.n a6, a2 +4020b8f2: c05620 sub a5, a6, a2 +4020b8f5: 0fa577 bge a5, a7, 4020b908 +4020b8f8: 020652 l8ui a5, a6, 2 +4020b8fb: 661b addi.n a6, a6, 1 +4020b8fd: 305450 xor a5, a4, a5 +4020b900: 645050 extui a5, a5, 0, 7 +4020b903: 55ac beqz.n a5, 4020b92c +4020b905: fffa46 j 4020b8f2 +4020b908: 020c movi.n a2, 0 +4020b90a: 201327 beq a3, a2, 4020b92e +4020b90d: 010362 l8ui a6, a3, 1 +4020b910: 035d mov.n a5, a3 +4020b912: c02530 sub a2, a5, a3 +4020b915: 0fa267 bge a2, a6, 4020b928 +4020b918: 020522 l8ui a2, a5, 2 +4020b91b: 551b addi.n a5, a5, 1 +4020b91d: 302420 xor a2, a4, a2 +4020b920: 642020 extui a2, a2, 0, 7 +4020b923: 528c beqz.n a2, 4020b92c +4020b925: fffa46 j 4020b912 +4020b928: 020c movi.n a2, 0 +4020b92a: f00d ret.n +4020b92c: 120c movi.n a2, 1 +4020b92e: f00d ret.n + +4020b930 : +4020b930: 020c movi.n a2, 0 +4020b932: f00d ret.n + +4020b934 : +4020b934: 030c movi.n a3, 0 +4020b936: 142242 l32i a4, a2, 80 +4020b939: 6c5232 s16i a3, a2, 216 +4020b93c: bfaf32 movi a3, -65 +4020b93f: 103430 and a3, a4, a3 +4020b942: 146232 s32i a3, a2, 80 +4020b945: f00d ret.n + ... + +4020b948 : +4020b948: 000342 l8ui a4, a3, 0 +4020b94b: dda062 movi a6, 221 +4020b94e: e00272 l8ui a7, a2, 224 +4020b951: 534b addi.n a5, a3, 4 +4020b953: c04460 sub a4, a4, a6 +4020b956: 833540 moveqz a3, a5, a4 +4020b959: b7bc beqz.n a7, 4020b998 +4020b95b: 00a042 movi a4, 0 +4020b95e: 80af82 movi a8, -128 +4020b961: 7fa092 movi a9, 127 +4020b964: 215340 srai a5, a4, 3 +4020b967: 535a add.n a5, a3, a5 +4020b969: 080562 l8ui a6, a5, 8 +4020b96c: 245040 extui a5, a4, 0, 3 +4020b96f: 1d5657 bbc a6, a5, 4020b990 +4020b972: 025d mov.n a5, a2 +4020b974: 000486 j 4020b98a +4020b977: 620000 excw +4020b97a: 60e105 call0 4026c78c <_irom0_text_end+0x3bc10> +4020b97d: 4764a0 excw +4020b980: 059a add.n a0, a5, a9 +4020b982: 206680 or a6, a6, a8 +4020b985: e14562 s8i a6, a5, 225 +4020b988: 551b addi.n a5, a5, 1 +4020b98a: c06520 sub a6, a5, a2 +4020b98d: e82677 blt a6, a7, 4020b979 +4020b990: 441b addi.n a4, a4, 1 +4020b992: ce9497 bne a4, a9, 4020b964 +4020b995: f00d ret.n +4020b997: f00d00 subx8 a0, a13, a0 + ... + +4020b99c : +4020b99c: 924232 s8i a3, a2, 146 +4020b99f: 900252 l8ui a5, a2, 144 +4020b9a2: a49c beqz.n a4, 4020b9c0 +4020b9a4: 04e516 beqz a5, 4020b9f6 +4020b9a7: 014580 slli a4, a5, 24 +4020b9aa: 314840 srai a4, a4, 24 +4020b9ad: 906440 addx2 a6, a4, a4 +4020b9b0: a04640 addx4 a4, a6, a4 +4020b9b3: 903330 addx2 a3, a3, a3 +4020b9b6: 343a add.n a3, a4, a3 +4020b9b8: 43fb addi.n a4, a3, 15 +4020b9ba: a33430 movltz a3, a4, a3 +4020b9bd: 213430 srai a3, a3, 4 +4020b9c0: 25bc beqz.n a5, 4020b9f6 +4020b9c2: 910242 l8ui a4, a2, 145 +4020b9c5: 74cc bnez.n a4, 4020b9d0 +4020b9c7: c05350 sub a5, a3, a5 +4020b9ca: 745050 extui a5, a5, 0, 8 +4020b9cd: 000886 j 4020b9f3 +4020b9d0: 015580 slli a5, a5, 24 +4020b9d3: 014480 slli a4, a4, 24 +4020b9d6: 315850 srai a5, a5, 24 +4020b9d9: 314840 srai a4, a4, 24 +4020b9dc: c05350 sub a5, a3, a5 +4020b9df: a04440 addx4 a4, a4, a4 +4020b9e2: 1144f0 slli a4, a4, 1 +4020b9e5: 905550 addx2 a5, a5, a5 +4020b9e8: 905540 addx2 a5, a5, a4 +4020b9eb: 45fb addi.n a4, a5, 15 +4020b9ed: a35450 movltz a5, a4, a5 +4020b9f0: 745450 extui a5, a5, 4, 8 +4020b9f3: 914252 s8i a5, a2, 145 +4020b9f6: 904232 s8i a3, a2, 144 +4020b9f9: f00d ret.n + ... + +4020b9fc : +4020b9fc: 008416 beqz a4, 4020ba08 +4020b9ff: 081466 bnei a4, 1, 4020ba0b +4020ba02: 950242 l8ui a4, a2, 149 +4020ba05: 803340 add a3, a3, a4 +4020ba08: 954232 s8i a3, a2, 149 +4020ba0b: f00d ret.n +4020ba0d: 000000 ill + +4020ba10 : +4020ba10: 010352 l8ui a5, a3, 1 +4020ba13: 761c movi.n a6, 23 +4020ba15: f47c movi.n a4, -1 +4020ba17: 5bb657 bgeu a6, a5, 4020ba76 +4020ba1a: 080352 l8ui a5, a3, 8 +4020ba1d: 770272 l8ui a7, a2, 119 +4020ba20: 346050 extui a6, a5, 0, 4 +4020ba23: 040c movi.n a4, 0 +4020ba25: 4d1767 beq a7, a6, 4020ba76 +4020ba28: 80af42 movi a4, -128 +4020ba2b: 104540 and a4, a5, a4 +4020ba2e: 774262 s8i a6, a2, 119 +4020ba31: 0c4242 s8i a4, a2, 12 +4020ba34: 0ac352 addi a5, a3, 10 +4020ba37: 78c222 addi a2, a2, 120 +4020ba3a: 1ac332 addi a3, a3, 26 +4020ba3d: 10a062 movi a6, 16 +4020ba40: 000542 l8ui a4, a5, 0 +4020ba43: 104460 and a4, a4, a6 +4020ba46: 214440 srai a4, a4, 4 +4020ba49: 004242 s8i a4, a2, 0 +4020ba4c: 000542 l8ui a4, a5, 0 +4020ba4f: 344040 extui a4, a4, 0, 4 +4020ba52: 014242 s8i a4, a2, 1 +4020ba55: 010542 l8ui a4, a5, 1 +4020ba58: 344040 extui a4, a4, 0, 4 +4020ba5b: 024242 s8i a4, a2, 2 +4020ba5e: 010542 l8ui a4, a5, 1 +4020ba61: 414440 srli a4, a4, 4 +4020ba64: 034242 s8i a4, a2, 3 +4020ba67: 020542 l8ui a4, a5, 2 +4020ba6a: 554b addi.n a5, a5, 4 +4020ba6c: 044242 s8i a4, a2, 4 +4020ba6f: 226b addi.n a2, a2, 6 +4020ba71: cb9537 bne a5, a3, 4020ba40 +4020ba74: 140c movi.n a4, 1 +4020ba76: 042d mov.n a2, a4 +4020ba78: f00d ret.n + ... + +4020ba7c : +4020ba7c: 7248 l32i.n a4, a2, 28 +4020ba7e: 738c beqz.n a3, 4020ba89 +4020ba80: 00a432 movi a3, 0x400 +4020ba83: 203430 or a3, a4, a3 +4020ba86: 000146 j 4020ba8f +4020ba89: ffab32 movi a3, 0xfffffbff +4020ba8c: 103430 and a3, a4, a3 +4020ba8f: 7239 s32i.n a3, a2, 28 +4020ba91: f00d ret.n + ... + +4020ba94 : +4020ba94: f00d ret.n +4020ba96: 680000 excw +4020ba99: 404013 excw +4020ba9c: 165874 excw +4020ba9f: 180c movi.n a8, 1 +4020baa1: f8c572 addi a7, a5, -8 +4020baa4: 1679 s32i.n a7, a6, 4 +4020baa6: 0b1362 l16ui a6, a3, 22 +4020baa9: 668b addi.n a6, a6, 8 +4020baab: 0b5362 s16i a6, a3, 22 +4020baae: 232292 l32i a9, a2, 140 +4020bab1: 242262 l32i a6, a2, 144 +4020bab4: 391b addi.n a3, a9, 1 +4020bab6: 023397 bltu a3, a9, 4020babc +4020bab9: 00a082 movi a8, 0 +4020babc: 686a add.n a6, a8, a6 +4020babe: 236232 s32i a3, a2, 140 +4020bac1: 246262 s32i a6, a2, 144 +4020bac4: 004732 s8i a3, a7, 0 +4020bac7: 232232 l32i a3, a2, 140 +4020baca: f9c562 addi a6, a5, -7 +4020bacd: 413830 srli a3, a3, 8 +4020bad0: 004632 s8i a3, a6, 0 +4020bad3: fac532 addi a3, a5, -6 +4020bad6: 060c movi.n a6, 0 +4020bad8: 004362 s8i a6, a3, 0 +4020badb: 032c movi.n a3, 32 +4020badd: fbc562 addi a6, a5, -5 +4020bae0: 204430 or a4, a4, a3 +4020bae3: 004642 s8i a4, a6, 0 +4020bae6: 471242 l16ui a4, a2, 142 +4020bae9: fcc532 addi a3, a5, -4 +4020baec: 004342 s8i a4, a3, 0 +4020baef: 8f0242 l8ui a4, a2, 143 +4020baf2: fdc532 addi a3, a5, -3 +4020baf5: 004342 s8i a4, a3, 0 +4020baf8: 242242 l32i a4, a2, 144 +4020bafb: fec532 addi a3, a5, -2 +4020bafe: 004342 s8i a4, a3, 0 +4020bb01: 242222 l32i a2, a2, 144 +4020bb04: 550b addi.n a5, a5, -1 +4020bb06: 412820 srli a2, a2, 8 +4020bb09: 004522 s8i a2, a5, 0 +4020bb0c: 120c movi.n a2, 1 +4020bb0e: f00d ret.n +4020bb10: 1388 l32i.n a8, a3, 4 +4020bb12: f0c112 addi a1, a1, -16 +4020bb15: 1868 l32i.n a6, a8, 4 +4020bb17: 31c9 s32i.n a12, a1, 12 +4020bb19: c64a add.n a12, a6, a4 +4020bb1b: 030c52 l8ui a5, a12, 3 +4020bb1e: 070c movi.n a7, 0 +4020bb20: 02e557 bbsi a5, 5, 4020bb26 +4020bb23: 002746 j 4020bbc4 +4020bb26: 000672 l8ui a7, a6, 0 +4020bb29: 8ca052 movi a5, 140 +4020bb2c: 105750 and a5, a7, a5 +4020bb2f: 88a072 movi a7, 136 +4020bb32: 091c movi.n a9, 16 +4020bb34: 169577 bne a5, a7, 4020bb4e +4020bb37: 010652 l8ui a5, a6, 1 +4020bb3a: 145050 extui a5, a5, 0, 2 +4020bb3d: 073566 bnei a5, 3, 4020bb48 +4020bb40: 1e0692 l8ui a9, a6, 30 +4020bb43: 000106 j 4020bb4b +4020bb46: 920000 excw +4020bb49: 901806 j 401efbad <_lit4_end+0xe9881> +4020bb4c: 523490 excw +4020bb4f: 010c movi.n a1, 0 +4020bb51: 000ca2 l8ui a10, a12, 0 +4020bb54: 117580 slli a7, a5, 8 +4020bb57: 040c52 l8ui a5, a12, 4 +4020bb5a: 070cb2 l8ui a11, a12, 7 +4020bb5d: 115500 slli a5, a5, 16 +4020bb60: 205750 or a5, a7, a5 +4020bb63: 050c72 l8ui a7, a12, 5 +4020bb66: 2055a0 or a5, a5, a10 +4020bb69: 017780 slli a7, a7, 24 +4020bb6c: b09920 addx8 a9, a9, a2 +4020bb6f: 20a570 or a10, a5, a7 +4020bb72: 115b80 slli a5, a11, 8 +4020bb75: 1978 l32i.n a7, a9, 4 +4020bb77: 060cb2 l8ui a11, a12, 6 +4020bb7a: 20bb50 or a11, a11, a5 +4020bb7d: 2958 l32i.n a5, a9, 8 +4020bb7f: 020766 bnei a7, -1, 4020bb85 +4020bb82: 1a0526 beqi a5, -1, 4020bba0 +4020bb85: 0297a7 bne a7, a10, 4020bb8b +4020bb88: 3615b7 beq a5, a11, 4020bbc2 +4020bb8b: c07a70 sub a7, a10, a7 +4020bb8e: 1c0c movi.n a12, 1 +4020bb90: 013a77 bltu a10, a7, 4020bb95 +4020bb93: 0c0c movi.n a12, 0 +4020bb95: c05b50 sub a5, a11, a5 +4020bb98: c055c0 sub a5, a5, a12 +4020bb9b: 070c movi.n a7, 0 +4020bb9d: 23e5f7 bbsi a5, 15, 4020bbc4 +4020bba0: 19a9 s32i.n a10, a9, 4 +4020bba2: 29b9 s32i.n a11, a9, 8 +4020bba4: 252252 l32i a5, a2, 148 +4020bba7: 170c movi.n a7, 1 +4020bba9: 1528 l32i.n a2, a5, 4 +4020bbab: 442a add.n a4, a4, a2 +4020bbad: 464a add.n a4, a6, a4 +4020bbaf: 1849 s32i.n a4, a8, 4 +4020bbb1: 2548 l32i.n a4, a5, 8 +4020bbb3: 242a add.n a2, a4, a2 +4020bbb5: 0b1342 l16ui a4, a3, 22 +4020bbb8: c02420 sub a2, a4, a2 +4020bbbb: 0b5322 s16i a2, a3, 22 +4020bbbe: 000086 j 4020bbc4 +4020bbc1: 070c00 excw +4020bbc4: 072d mov.n a2, a7 +4020bbc6: 31c8 l32i.n a12, a1, 12 +4020bbc8: 10c112 addi a1, a1, 16 +4020bbcb: f00d ret.n +4020bbcd: 000000 ill +4020bbd0: f27c movi.n a2, -1 +4020bbd2: f00d ret.n +4020bbd4: f27c movi.n a2, -1 +4020bbd6: f00d ret.n +4020bbd8: 050c movi.n a5, 0 +4020bbda: 744040 extui a4, a4, 0, 8 +4020bbdd: 491357 beq a3, a5, 4020bc2a +4020bbe0: 1368 l32i.n a6, a3, 4 +4020bbe2: 180c movi.n a8, 1 +4020bbe4: 1658 l32i.n a5, a6, 4 +4020bbe6: fcc572 addi a7, a5, -4 +4020bbe9: 1679 s32i.n a7, a6, 4 +4020bbeb: 0b1362 l16ui a6, a3, 22 +4020bbee: 664b addi.n a6, a6, 4 +4020bbf0: 0b5362 s16i a6, a3, 22 +4020bbf3: 232292 l32i a9, a2, 140 +4020bbf6: 242262 l32i a6, a2, 144 +4020bbf9: 391b addi.n a3, a9, 1 +4020bbfb: 013397 bltu a3, a9, 4020bc00 +4020bbfe: 080c movi.n a8, 0 +4020bc00: 686a add.n a6, a8, a6 +4020bc02: 236232 s32i a3, a2, 140 +4020bc05: 246262 s32i a6, a2, 144 +4020bc08: f53030 extui a3, a3, 16, 16 +4020bc0b: fec562 addi a6, a5, -2 +4020bc0e: 004632 s8i a3, a6, 0 +4020bc11: 232232 l32i a3, a2, 140 +4020bc14: fdc562 addi a6, a5, -3 +4020bc17: 413830 srli a3, a3, 8 +4020bc1a: 004632 s8i a3, a6, 0 +4020bc1d: 232222 l32i a2, a2, 140 +4020bc20: 550b addi.n a5, a5, -1 +4020bc22: 004722 s8i a2, a7, 0 +4020bc25: 004542 s8i a4, a5, 0 +4020bc28: 150c movi.n a5, 1 +4020bc2a: 052d mov.n a2, a5 +4020bc2c: f00d ret.n +4020bc2e: 520000 excw +4020bc31: 682522 l32i a2, a5, 0x1a0 +4020bc34: 152813 excw +4020bc37: 1678 l32i.n a7, a6, 4 +4020bc39: 442a add.n a4, a4, a2 +4020bc3b: 474a add.n a4, a7, a4 +4020bc3d: 1649 s32i.n a4, a6, 4 +4020bc3f: 2548 l32i.n a4, a5, 8 +4020bc41: 242a add.n a2, a4, a2 +4020bc43: 0b1342 l16ui a4, a3, 22 +4020bc46: c02420 sub a2, a4, a2 +4020bc49: 0b5322 s16i a2, a3, 22 +4020bc4c: 120c movi.n a2, 1 +4020bc4e: f00d ret.n + +4020bc50 : +4020bc50: d0c112 addi a1, a1, -48 +4020bc53: 0a61c2 s32i a12, a1, 40 +4020bc56: 0961d2 s32i a13, a1, 36 +4020bc59: 0861e2 s32i a14, a1, 32 +4020bc5c: 71f9 s32i.n a15, a1, 28 +4020bc5e: b109 s32i.n a0, a1, 44 +4020bc60: 02fd mov.n a15, a2 +4020bc62: 023c movi.n a2, 48 +4020bc64: 004322 s8i a2, a3, 0 +4020bc67: 020c movi.n a2, 0 +4020bc69: 034322 s8i a2, a3, 3 +4020bc6c: 120c movi.n a2, 1 +4020bc6e: 024322 s8i a2, a3, 2 +4020bc71: 03cd mov.n a12, a3 +4020bc73: 3f38 l32i.n a3, a15, 12 +4020bc75: 220c movi.n a2, 2 +4020bc77: 04dd mov.n a13, a4 +4020bc79: 05ed mov.n a14, a5 +4020bc7b: 039c85 call0 4020f644 +4020bc7e: 32cc bnez.n a2, 4020bc85 +4020bc80: f27c movi.n a2, -1 +4020bc82: 0035c6 j 4020bd5d +4020bc85: 753820 extui a3, a2, 24, 8 +4020bc88: 044c32 s8i a3, a12, 4 +4020bc8b: f53020 extui a3, a2, 16, 16 +4020bc8e: 054c32 s8i a3, a12, 5 +4020bc91: 413820 srli a3, a2, 8 +4020bc94: 074c22 s8i a2, a12, 7 +4020bc97: 064c32 s8i a3, a12, 6 +4020bc9a: 4cab addi.n a4, a12, 10 +4020bc9c: 8f38 l32i.n a3, a15, 32 +4020bc9e: 042d mov.n a2, a4 +4020bca0: 0149 s32i.n a4, a1, 0 +4020bca2: 043585 call0 4020fffc +4020bca5: 0148 l32i.n a4, a1, 0 +4020bca7: a03240 addx4 a3, a2, a4 +4020bcaa: fd2216 beqz a2, 4020bc80 +4020bcad: 744820 extui a4, a2, 8, 8 +4020bcb0: 094c42 s8i a4, a12, 9 +4020bcb3: 084c22 s8i a2, a12, 8 +4020bcb6: 1f58 l32i.n a5, a15, 4 +4020bcb8: 040c movi.n a4, 0 +4020bcba: 232b addi.n a2, a3, 2 +4020bcbc: 185547 bbc a5, a4, 4020bcd8 +4020bcbf: 020c movi.n a2, 0 +4020bcc1: 024322 s8i a2, a3, 2 +4020bcc4: f20c movi.n a2, 15 +4020bcc6: 034322 s8i a2, a3, 3 +4020bcc9: acaf22 movi a2, -84 +4020bccc: 044322 s8i a2, a3, 4 +4020bccf: 120c movi.n a2, 1 +4020bcd1: 054322 s8i a2, a3, 5 +4020bcd4: 140c movi.n a4, 1 +4020bcd6: 236b addi.n a2, a3, 6 +4020bcd8: 1f58 l32i.n a5, a15, 4 +4020bcda: 1b6517 bbci a5, 1, 4020bcf9 +4020bcdd: 050c movi.n a5, 0 +4020bcdf: 004252 s8i a5, a2, 0 +4020bce2: f50c movi.n a5, 15 +4020bce4: 014252 s8i a5, a2, 1 +4020bce7: acaf52 movi a5, -84 +4020bcea: 024252 s8i a5, a2, 2 +4020bced: 250c movi.n a5, 2 +4020bcef: 034252 s8i a5, a2, 3 +4020bcf2: 441b addi.n a4, a4, 1 +4020bcf4: 224b addi.n a2, a2, 4 +4020bcf6: 000106 j 4020bcfe +4020bcf9: f83416 beqz a4, 4020bc80 +4020bcfc: 140c movi.n a4, 1 +4020bcfe: 050c movi.n a5, 0 +4020bd00: 014352 s8i a5, a3, 1 +4020bd03: 004342 s8i a4, a3, 0 +4020bd06: 9f48 l32i.n a4, a15, 36 +4020bd08: 030c movi.n a3, 0 +4020bd0a: 150c movi.n a5, 1 +4020bd0c: 933540 movnez a3, a5, a4 +4020bd0f: bf48 l32i.n a4, a15, 44 +4020bd11: f43030 extui a3, a3, 0, 16 +4020bd14: 448c beqz.n a4, 4020bd1c +4020bd16: 00a242 movi a4, 0x200 +4020bd19: 203340 or a3, a3, a4 +4020bd1c: cf48 l32i.n a4, a15, 48 +4020bd1e: 348c beqz.n a4, 4020bd25 +4020bd20: c40c movi.n a4, 12 +4020bd22: 203340 or a3, a3, a4 +4020bd25: 414830 srli a4, a3, 8 +4020bd28: 014242 s8i a4, a2, 1 +4020bd2b: 004232 s8i a3, a2, 0 +4020bd2e: f22b addi.n a15, a2, 2 +4020bd30: 0eac beqz.n a14, 4020bd54 +4020bd32: 14c2f2 addi a15, a2, 20 +4020bd35: dcda add.n a13, a12, a13 +4020bd37: 02bdf7 bgeu a13, a15, 4020bd3d +4020bd3a: ffd086 j 4020bc80 +4020bd3d: 030c movi.n a3, 0 +4020bd3f: 034232 s8i a3, a2, 3 +4020bd42: 130c movi.n a3, 1 +4020bd44: 024232 s8i a3, a2, 2 +4020bd47: 041c movi.n a4, 16 +4020bd49: 0e3d mov.n a3, a14 +4020bd4b: 04c222 addi a2, a2, 4 +4020bd4e: d4b101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020bd51: 0000c0 callx0 a0 +4020bd54: c02fc0 sub a2, a15, a12 +4020bd57: fec232 addi a3, a2, -2 +4020bd5a: 014c32 s8i a3, a12, 1 +4020bd5d: b108 l32i.n a0, a1, 44 +4020bd5f: a1c8 l32i.n a12, a1, 40 +4020bd61: 91d8 l32i.n a13, a1, 36 +4020bd63: 81e8 l32i.n a14, a1, 32 +4020bd65: 71f8 l32i.n a15, a1, 28 +4020bd67: 30c112 addi a1, a1, 48 +4020bd6a: f00d ret.n +4020bd6c: 230894 excw +4020bd6f: 40 .byte 0x40 + +4020bd70 : +4020bd70: 90a092 movi a9, 144 +4020bd73: c01190 sub a1, a1, a9 +4020bd76: 2161d2 s32i a13, a1, 132 +4020bd79: 20d220 or a13, a2, a2 +4020bd7c: 012222 l32i a2, a2, 4 +4020bd7f: 236102 s32i a0, a1, 140 +4020bd82: 2261c2 s32i a12, a1, 136 +4020bd85: 2061e2 s32i a14, a1, 128 +4020bd88: 166217 bbci a2, 1, 4020bda2 +4020bd8b: 203110 or a3, a1, a1 +4020bd8e: 050c movi.n a5, 0 +4020bd90: 80a042 movi a4, 128 +4020bd93: 2d4b addi.n a2, a13, 4 +4020bd95: ffeb85 call0 4020bc50 +4020bd98: 023d mov.n a3, a2 +4020bd9a: c12a add.n a12, a1, a2 +4020bd9c: 0042d6 bgez a2, 4020bda4 +4020bd9f: 003f46 j 4020bea0 +4020bda2: 01cd mov.n a12, a1 +4020bda4: 1d28 l32i.n a2, a13, 4 +4020bda6: 02e207 bbsi a2, 0, 4020bdac +4020bda9: 002cc6 j 4020be60 +4020bdac: ddaf22 movi a2, -35 +4020bdaf: 004c22 s8i a2, a12, 0 +4020bdb2: 025c movi.n a2, 80 +4020bdb4: 030c movi.n a3, 0 +4020bdb6: 034c22 s8i a2, a12, 3 +4020bdb9: 227c movi.n a2, -14 +4020bdbb: 024c32 s8i a3, a12, 2 +4020bdbe: 044c22 s8i a2, a12, 4 +4020bdc1: 074c32 s8i a3, a12, 7 +4020bdc4: 120c movi.n a2, 1 +4020bdc6: 4d38 l32i.n a3, a13, 16 +4020bdc8: 054c22 s8i a2, a12, 5 +4020bdcb: 064c22 s8i a2, a12, 6 +4020bdce: 120c movi.n a2, 1 +4020bdd0: 038705 call0 4020f644 +4020bdd3: 0c7216 beqz a2, 4020be9e +4020bdd6: 753820 extui a3, a2, 24, 8 +4020bdd9: 084c32 s8i a3, a12, 8 +4020bddc: f53020 extui a3, a2, 16, 16 +4020bddf: 094c32 s8i a3, a12, 9 +4020bde2: 413820 srli a3, a2, 8 +4020bde5: 0a4c32 s8i a3, a12, 10 +4020bde8: eceb addi.n a14, a12, 14 +4020bdea: 3d38 l32i.n a3, a13, 12 +4020bdec: 0b4c22 s8i a2, a12, 11 +4020bdef: 0e2d mov.n a2, a14 +4020bdf1: 042785 call0 4021006c +4020bdf4: 0a6216 beqz a2, 4020be9e +4020bdf7: 744820 extui a4, a2, 8, 8 +4020bdfa: 2d58 l32i.n a5, a13, 8 +4020bdfc: a032e0 addx4 a3, a2, a14 +4020bdff: 0d4c42 s8i a4, a12, 13 +4020be02: 0c4c22 s8i a2, a12, 12 +4020be05: 020c movi.n a2, 0 +4020be07: 432b addi.n a4, a3, 2 +4020be09: 175527 bbc a5, a2, 4020be24 +4020be0c: 024322 s8i a2, a3, 2 +4020be0f: 025c movi.n a2, 80 +4020be11: 034322 s8i a2, a3, 3 +4020be14: 227c movi.n a2, -14 +4020be16: 044322 s8i a2, a3, 4 +4020be19: 120c movi.n a2, 1 +4020be1b: 054322 s8i a2, a3, 5 +4020be1e: 06c342 addi a4, a3, 6 +4020be21: 01a022 movi a2, 1 +4020be24: 1d6517 bbci a5, 1, 4020be45 +4020be27: 050c movi.n a5, 0 +4020be29: 004452 s8i a5, a4, 0 +4020be2c: 055c movi.n a5, 80 +4020be2e: 014452 s8i a5, a4, 1 +4020be31: 257c movi.n a5, -14 +4020be33: 024452 s8i a5, a4, 2 +4020be36: 250c movi.n a5, 2 +4020be38: 034452 s8i a5, a4, 3 +4020be3b: 221b addi.n a2, a2, 1 +4020be3d: 444b addi.n a4, a4, 4 +4020be3f: 0001c6 j 4020be4a +4020be42: 000000 ill +4020be45: 055216 beqz a2, 4020be9e +4020be48: 120c movi.n a2, 1 +4020be4a: 050c movi.n a5, 0 +4020be4c: 004322 s8i a2, a3, 0 +4020be4f: 014352 s8i a5, a3, 1 +4020be52: c034c0 sub a3, a4, a12 +4020be55: fec322 addi a2, a3, -2 +4020be58: 014c22 s8i a2, a12, 1 +4020be5b: 041396 bltz a3, 4020bea0 +4020be5e: 04cd mov.n a12, a4 +4020be60: ffc3e1 l32r a14, 4020bd6c +4020be63: 142d22 l32i a2, a13, 80 +4020be66: 4ea142 movi a4, 0x14e +4020be69: 0e3d mov.n a3, a14 +4020be6b: d5a701 l32r a0, 40201508 +4020be6e: 0000c0 callx0 a0 +4020be71: c0cc10 sub a12, a12, a1 +4020be74: 050c movi.n a5, 0 +4020be76: 4fa142 movi a4, 0x14f +4020be79: 203ee0 or a3, a14, a14 +4020be7c: 202cc0 or a2, a12, a12 +4020be7f: d5a101 l32r a0, 40201504 +4020be82: 0000c0 callx0 a0 +4020be85: 146d22 s32i a2, a13, 80 +4020be88: 229c beqz.n a2, 4020be9e +4020be8a: 013d mov.n a3, a1 +4020be8c: 0c4d mov.n a4, a12 +4020be8e: d46101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020be91: 0000c0 callx0 a0 +4020be94: 030c movi.n a3, 0 +4020be96: 156dc2 s32i a12, a13, 84 +4020be99: 0000c6 j 4020bea0 +4020be9c: 7c0000 excw +4020be9f: 2102f3 excw +4020bea2: a09223 excw +4020bea5: 032d90 excw +4020bea8: 2221c2 l32i a12, a1, 136 +4020beab: 2121d2 l32i a13, a1, 132 +4020beae: 2021e2 l32i a14, a1, 128 +4020beb1: 119a add.n a1, a1, a9 +4020beb3: f00d ret.n +4020beb5: 000000 ill + +4020beb8 : +4020beb8: e0c112 addi a1, a1, -32 +4020bebb: 61c9 s32i.n a12, a1, 24 +4020bebd: 51d9 s32i.n a13, a1, 20 +4020bebf: 41e9 s32i.n a14, a1, 16 +4020bec1: 31f9 s32i.n a15, a1, 12 +4020bec3: 7109 s32i.n a0, a1, 28 +4020bec5: 048d mov.n a8, a4 +4020bec7: ddaf42 movi a4, -35 +4020beca: 004242 s8i a4, a2, 0 +4020becd: 474b addi.n a4, a7, 4 +4020becf: 445a add.n a4, a4, a5 +4020bed1: 014242 s8i a4, a2, 1 +4020bed4: 754830 extui a4, a3, 24, 8 +4020bed7: 024242 s8i a4, a2, 2 +4020beda: f54030 extui a4, a3, 16, 16 +4020bedd: 034242 s8i a4, a2, 3 +4020bee0: c26b addi.n a12, a2, 6 +4020bee2: 414830 srli a4, a3, 8 +4020bee5: 044242 s8i a4, a2, 4 +4020bee8: 054232 s8i a3, a2, 5 +4020beeb: 05dd mov.n a13, a5 +4020beed: 0c2d mov.n a2, a12 +4020beef: 06fd mov.n a15, a6 +4020bef1: 054d mov.n a4, a5 +4020bef3: 083d mov.n a3, a8 +4020bef5: 20e770 or a14, a7, a7 +4020bef8: ccda add.n a12, a12, a13 +4020befa: d44601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020befd: 0000c0 callx0 a0 +4020bf00: cf8c beqz.n a15, 4020bf10 +4020bf02: 0c2d mov.n a2, a12 +4020bf04: 0e4d mov.n a4, a14 +4020bf06: 0f3d mov.n a3, a15 +4020bf08: d44301 l32r a0, 40201014 <_irom0_text_start+0x4> +4020bf0b: 0000c0 callx0 a0 +4020bf0e: ccea add.n a12, a12, a14 +4020bf10: 7108 l32i.n a0, a1, 28 +4020bf12: 0c2d mov.n a2, a12 +4020bf14: 51d8 l32i.n a13, a1, 20 +4020bf16: 61c8 l32i.n a12, a1, 24 +4020bf18: 41e8 l32i.n a14, a1, 16 +4020bf1a: 31f8 l32i.n a15, a1, 12 +4020bf1c: 20c112 addi a1, a1, 32 +4020bf1f: f00d ret.n +4020bf21: 000000 ill + +4020bf24 : +4020bf24: b0c112 addi a1, a1, -80 +4020bf27: 1261c2 s32i a12, a1, 72 +4020bf2a: 1161d2 s32i a13, a1, 68 +4020bf2d: f1f9 s32i.n a15, a1, 60 +4020bf2f: 136102 s32i a0, a1, 76 +4020bf32: 1061e2 s32i a14, a1, 64 +4020bf35: 027d mov.n a7, a2 +4020bf37: 03cd mov.n a12, a3 +4020bf39: 04fd mov.n a15, a4 +4020bf3b: 05dd mov.n a13, a5 +4020bf3d: 105216 beqz a2, 4020c046 +4020bf40: 102316 beqz a3, 4020c046 +4020bf43: 148c beqz.n a4, 4020bf48 +4020bf45: 004556 bnez a5, 4020bf4d +4020bf48: 120c movi.n a2, 1 +4020bf4a: 003e86 j 4020c048 +4020bf4d: 0004e2 l8ui a14, a4, 0 +4020bf50: 01a032 movi a3, 1 +4020bf53: d0ce22 addi a2, a14, -48 +4020bf56: 02a0e2 movi a14, 2 +4020bf59: 93e320 movnez a14, a3, a2 +4020bf5c: 1738 l32i.n a3, a7, 4 +4020bf5e: a20c movi.n a2, 10 +4020bf60: 028e37 bany a14, a3, 4020bf66 +4020bf63: 003846 j 4020c048 +4020bf66: 9179 s32i.n a7, a1, 36 +4020bf68: 014d mov.n a4, a1 +4020bf6a: 053d mov.n a3, a5 +4020bf6c: 0f2d mov.n a2, a15 +4020bf6e: 122e66 bnei a14, 2, 4020bf84 +4020bf71: 031a05 call0 4020f114 +4020bf74: 1138 l32i.n a3, a1, 4 +4020bf76: 8129 s32i.n a2, a1, 32 +4020bf78: 220c movi.n a2, 2 +4020bf7a: 036c85 call0 4020f644 +4020bf7d: 2138 l32i.n a3, a1, 8 +4020bf7f: 220c movi.n a2, 2 +4020bf81: 000486 j 4020bf97 +4020bf84: 0332c5 call0 4020f2b4 +4020bf87: 012132 l32i a3, a1, 4 +4020bf8a: 086122 s32i a2, a1, 32 +4020bf8d: 01a022 movi a2, 1 +4020bf90: 036b05 call0 4020f644 +4020bf93: 2138 l32i.n a3, a1, 8 +4020bf95: 120c movi.n a2, 1 +4020bf97: 036ac5 call0 4020f644 +4020bf9a: 8128 l32i.n a2, a1, 32 +4020bf9c: 9178 l32i.n a7, a1, 36 +4020bf9e: fa6256 bnez a2, 4020bf48 +4020bfa1: 4738 l32i.n a3, a7, 16 +4020bfa3: 2148 l32i.n a4, a1, 8 +4020bfa5: 220c movi.n a2, 2 +4020bfa7: 021437 beq a4, a3, 4020bfad +4020bfaa: 002686 j 4020c048 +4020bfad: 2728 l32i.n a2, a7, 8 +4020bfaf: 3138 l32i.n a3, a1, 12 +4020bfb1: 103320 and a3, a3, a2 +4020bfb4: 420c movi.n a2, 4 +4020bfb6: 08e316 beqz a3, 4020c048 +4020bfb9: 120c movi.n a2, 1 +4020bfbb: 01e307 bbsi a3, 0, 4020bfc0 +4020bfbe: 220c movi.n a2, 2 +4020bfc0: 656c22 s32i a2, a12, 0x194 +4020bfc3: 1128 l32i.n a2, a1, 4 +4020bfc5: 042e66 bnei a14, 2, 4020bfcd +4020bfc8: 9738 l32i.n a3, a7, 36 +4020bfca: 000046 j 4020bfcf +4020bfcd: 3738 l32i.n a3, a7, 12 +4020bfcf: 103230 and a3, a2, a3 +4020bfd2: 320c movi.n a2, 3 +4020bfd4: 070316 beqz a3, 4020c048 +4020bfd7: 820c movi.n a2, 8 +4020bfd9: 078327 bany a3, a2, 4020bfe4 +4020bfdc: 024c movi.n a2, 64 +4020bfde: 028327 bany a3, a2, 4020bfe4 +4020bfe1: 02a022 movi a2, 2 +4020bfe4: 646c22 s32i a2, a12, 0x190 +4020bfe7: 000f32 l8ui a3, a15, 0 +4020bfea: 023c movi.n a2, 48 +4020bfec: 049327 bne a3, a2, 4020bff4 +4020bfef: 220c movi.n a2, 2 +4020bff1: 000046 j 4020bff6 +4020bff4: 120c movi.n a2, 1 +4020bff6: 636c22 s32i a2, a12, 0x18c +4020bff9: 612c22 l32i a2, a12, 0x184 +4020bffc: 929c beqz.n a2, 4020c019 +4020bffe: 622c32 l32i a3, a12, 0x188 +4020c001: 1433d7 bltu a3, a13, 4020c019 +4020c004: 612c22 l32i a2, a12, 0x184 +4020c007: 0d4d mov.n a4, a13 +4020c009: 0f3d mov.n a3, a15 +4020c00b: d40201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c00e: 0000c0 callx0 a0 +4020c011: 020c movi.n a2, 0 +4020c013: 626cd2 s32i a13, a12, 0x188 +4020c016: 000b86 j 4020c048 +4020c019: ff54e1 l32r a14, 4020bd6c +4020c01c: 73a242 movi a4, 0x273 +4020c01f: 203ee0 or a3, a14, a14 +4020c022: d53901 l32r a0, 40201508 +4020c025: 0000c0 callx0 a0 +4020c028: 050c movi.n a5, 0 +4020c02a: 74a242 movi a4, 0x274 +4020c02d: 0e3d mov.n a3, a14 +4020c02f: 202dd0 or a2, a13, a13 +4020c032: d53401 l32r a0, 40201504 +4020c035: 0000c0 callx0 a0 +4020c038: 616c22 s32i a2, a12, 0x184 +4020c03b: fc5256 bnez a2, 4020c004 +4020c03e: 620c movi.n a2, 6 +4020c040: 000106 j 4020c048 +4020c043: 000000 ill +4020c046: 520c movi.n a2, 5 +4020c048: 132102 l32i a0, a1, 76 +4020c04b: 1221c2 l32i a12, a1, 72 +4020c04e: 1121d2 l32i a13, a1, 68 +4020c051: 1021e2 l32i a14, a1, 64 +4020c054: f1f8 l32i.n a15, a1, 60 +4020c056: 50c112 addi a1, a1, 80 +4020c059: f00d ret.n +4020c05b: f20100 excw +4020c05e: 040050 extui a0, a5, 0, 1 +4020c061: 0fac beqz.n a15, 4020c085 +4020c063: ac0100 excw +4020c066: 0f .byte 0xf +4020c067: ac0300 excw +4020c06a: 0f .byte 0xf + ... + +4020c06c : +4020c06c: f0c112 addi a1, a1, -16 +4020c06f: 21c9 s32i.n a12, a1, 8 +4020c071: 04cd mov.n a12, a4 +4020c073: 11d9 s32i.n a13, a1, 4 +4020c075: 01e9 s32i.n a14, a1, 0 +4020c077: 03dd mov.n a13, a3 +4020c079: 02ed mov.n a14, a2 +4020c07b: 030c movi.n a3, 0 +4020c07d: 442c movi.n a4, 36 +4020c07f: 0c2d mov.n a2, a12 +4020c081: 036102 s32i a0, a1, 12 +4020c084: d3e301 l32r a0, 40201010 <_irom0_text_start> +4020c087: 0000c0 callx0 a0 +4020c08a: 3d0b addi.n a3, a13, -1 +4020c08c: fff681 l32r a8, 4020c064 +4020c08f: fff691 l32r a9, 4020c068 +4020c092: fff3b1 l32r a11, 4020c060 +4020c095: 5eda add.n a5, a14, a13 +4020c097: 0e2d mov.n a2, a14 +4020c099: dda062 movi a6, 221 +4020c09c: 3e3a add.n a3, a14, a3 +4020c09e: 073c movi.n a7, 48 +4020c0a0: 3a1c movi.n a10, 19 +4020c0a2: 421b addi.n a4, a2, 1 +4020c0a4: 023457 bltu a4, a5, 4020c0aa +4020c0a7: 003e46 j 4020c1a4 +4020c0aa: 0002d2 l8ui a13, a2, 0 +4020c0ad: 0b9d67 bne a13, a6, 4020c0bc +4020c0b0: 029237 bne a2, a3, 4020c0b6 +4020c0b3: 003b46 j 4020c1a4 +4020c0b6: 010242 l8ui a4, a2, 1 +4020c0b9: 0e7416 beqz a4, 4020c1a4 +4020c0bc: 010242 l8ui a4, a2, 1 +4020c0bf: e42b addi.n a14, a4, 2 +4020c0c1: e2ea add.n a14, a2, a14 +4020c0c3: 02b5e7 bgeu a5, a14, 4020c0c9 +4020c0c6: 003506 j 4020c19e +4020c0c9: 0b9d77 bne a13, a7, 4020c0d8 +4020c0cc: 2c29 s32i.n a2, a12, 8 +4020c0ce: 010242 l8ui a4, a2, 1 +4020c0d1: 442b addi.n a4, a4, 2 +4020c0d3: 3c49 s32i.n a4, a12, 12 +4020c0d5: 002ec6 j 4020c194 +4020c0d8: 021d67 beq a13, a6, 4020c0de +4020c0db: 002d46 j 4020c194 +4020c0de: 0c2416 beqz a4, 4020c1a4 +4020c0e1: 3b64b6 bltui a4, 6, 4020c120 +4020c0e4: 0202e2 l8ui a14, a2, 2 +4020c0e7: 0302d2 l8ui a13, a2, 3 +4020c0ea: 01ee80 slli a14, a14, 24 +4020c0ed: 11dd00 slli a13, a13, 16 +4020c0f0: 20ded0 or a13, a14, a13 +4020c0f3: 0502e2 l8ui a14, a2, 5 +4020c0f6: 20ede0 or a14, a13, a14 +4020c0f9: 0402d2 l8ui a13, a2, 4 +4020c0fc: 11dd80 slli a13, a13, 8 +4020c0ff: 20ded0 or a13, a14, a13 +4020c102: ffd6e1 l32r a14, 4020c05c +4020c105: 179de7 bne a13, a14, 4020c120 +4020c108: 0602d2 l8ui a13, a2, 6 +4020c10b: 111d66 bnei a13, 1, 4020c120 +4020c10e: 0702d2 l8ui a13, a2, 7 +4020c111: bdcc bnez.n a13, 4020c120 +4020c113: 0c29 s32i.n a2, a12, 0 +4020c115: 010242 l8ui a4, a2, 1 +4020c118: 442b addi.n a4, a4, 2 +4020c11a: 1c49 s32i.n a4, a12, 4 +4020c11c: 001d06 j 4020c194 +4020c11f: d25b00 excw +4020c122: 2bbd57 bgeu a13, a5, 4020c151 +4020c125: 28ba47 bgeu a10, a4, 4020c151 +4020c128: 020242 l8ui a4, a2, 2 +4020c12b: 01d480 slli a13, a4, 24 +4020c12e: 030242 l8ui a4, a2, 3 +4020c131: 114400 slli a4, a4, 16 +4020c134: 204d40 or a4, a13, a4 +4020c137: 0502d2 l8ui a13, a2, 5 +4020c13a: 20d4d0 or a13, a4, a13 +4020c13d: 040242 l8ui a4, a2, 4 +4020c140: 114480 slli a4, a4, 8 +4020c143: 204d40 or a4, a13, a4 +4020c146: 0a94b7 bne a4, a11, 4020c154 +4020c149: 426b addi.n a4, a2, 6 +4020c14b: 4c49 s32i.n a4, a12, 16 +4020c14d: 0010c6 j 4020c194 +4020c150: 74b600 extui a11, a0, 6, 8 +4020c153: 3f .byte 0x3f +4020c154: 020242 l8ui a4, a2, 2 +4020c157: 01d480 slli a13, a4, 24 +4020c15a: 030242 l8ui a4, a2, 3 +4020c15d: 114400 slli a4, a4, 16 +4020c160: 204d40 or a4, a13, a4 +4020c163: 0502d2 l8ui a13, a2, 5 +4020c166: 20d4d0 or a13, a4, a13 +4020c169: 040242 l8ui a4, a2, 4 +4020c16c: 114480 slli a4, a4, 8 +4020c16f: 204d40 or a4, a13, a4 +4020c172: 0f9487 bne a4, a8, 4020c185 +4020c175: 426b addi.n a4, a2, 6 +4020c177: 5c49 s32i.n a4, a12, 20 +4020c179: 010242 l8ui a4, a2, 1 +4020c17c: fcc442 addi a4, a4, -4 +4020c17f: 6c49 s32i.n a4, a12, 24 +4020c181: 0003c6 j 4020c194 +4020c184: 949700 extui a9, a0, 7, 10 +4020c187: 6b0b addi.n a6, a11, -1 +4020c189: 7c4942 s8i a4, a9, 124 +4020c18c: 010242 l8ui a4, a2, 1 +4020c18f: fcc442 addi a4, a4, -4 +4020c192: 8c49 s32i.n a4, a12, 32 +4020c194: 010242 l8ui a4, a2, 1 +4020c197: 442b addi.n a4, a4, 2 +4020c199: 224a add.n a2, a2, a4 +4020c19b: ffc0c6 j 4020c0a2 +4020c19e: f27c movi.n a2, -1 +4020c1a0: 000086 j 4020c1a6 +4020c1a3: 020c00 excw +4020c1a6: 3108 l32i.n a0, a1, 12 +4020c1a8: 21c8 l32i.n a12, a1, 8 +4020c1aa: 11d8 l32i.n a13, a1, 4 +4020c1ac: 01e8 l32i.n a14, a1, 0 +4020c1ae: 10c112 addi a1, a1, 16 +4020c1b1: f00d ret.n +4020c1b3: d93800 excw +4020c1b6: fe .byte 0xfe +4020c1b7: 3f .byte 0x3f +4020c1b8: fed934 excw +4020c1bb: 3f .byte 0x3f +4020c1bc: 08da add.n a0, a8, a13 +4020c1be: 124023 excw +4020c1c1: c9f0c1 l32r a12, 401fe984 <_lit4_end+0xf8658> +4020c1c4: 310921 l32r a2, 401d85e8 <_lit4_end+0xd22bc> +4020c1c7: 11d9 s32i.n a13, a1, 4 +4020c1c9: 02cd mov.n a12, a2 +4020c1cb: 22ac beqz.n a2, 4020c1f1 +4020c1cd: 672232 l32i a3, a2, 0x19c +4020c1d0: f20c movi.n a2, 15 +4020c1d2: 1b3237 bltu a2, a3, 4020c1f1 +4020c1d5: fff721 l32r a2, 4020c1b4 +4020c1d8: 040c movi.n a4, 0 +4020c1da: a02320 addx4 a2, a3, a2 +4020c1dd: 0249 s32i.n a4, a2, 0 +4020c1df: fff641 l32r a4, 4020c1b8 +4020c1e2: e27c movi.n a2, -2 +4020c1e4: 401300 ssl a3 +4020c1e7: 813220 src a3, a2, a2 +4020c1ea: 0428 l32i.n a2, a4, 0 +4020c1ec: 102320 and a2, a3, a2 +4020c1ef: 0429 s32i.n a2, a4, 0 +4020c1f1: 122c22 l32i a2, a12, 72 +4020c1f4: c28c beqz.n a2, 4020c204 +4020c1f6: 1c38 l32i.n a3, a12, 4 +4020c1f8: 3328 l32i.n a2, a3, 12 +4020c1fa: 220b addi.n a2, a2, -1 +4020c1fc: 3329 s32i.n a2, a3, 12 +4020c1fe: 00a022 movi a2, 0 +4020c201: 126c22 s32i a2, a12, 72 +4020c204: ffeed1 l32r a13, 4020c1bc +4020c207: 5b2c22 l32i a2, a12, 0x16c +4020c20a: 0d3d mov.n a3, a13 +4020c20c: cca242 movi a4, 0x2cc +4020c20f: d4be01 l32r a0, 40201508 +4020c212: 0000c0 callx0 a0 +4020c215: 612c22 l32i a2, a12, 0x184 +4020c218: 203dd0 or a3, a13, a13 +4020c21b: cda242 movi a4, 0x2cd +4020c21e: d4ba01 l32r a0, 40201508 +4020c221: 0000c0 callx0 a0 +4020c224: 0d3d mov.n a3, a13 +4020c226: 0c2d mov.n a2, a12 +4020c228: cea242 movi a4, 0x2ce +4020c22b: d4b701 l32r a0, 40201508 +4020c22e: 0000c0 callx0 a0 +4020c231: 3108 l32i.n a0, a1, 12 +4020c233: 21c8 l32i.n a12, a1, 8 +4020c235: 11d8 l32i.n a13, a1, 4 +4020c237: 10c112 addi a1, a1, 16 +4020c23a: f00d ret.n +4020c23c: 08cd mov.n a12, a8 +4020c23e: 484023 excw +4020c241: 00ba add.n a0, a0, a11 +4020c243: c11240 mul16u a1, a2, a4 +4020c246: 61c280 xsr.eps2 a8 +4020c249: 1e .byte 0x1e +4020c24a: 186132 s32i a3, a1, 96 +4020c24d: 02cd mov.n a12, a2 +4020c24f: 48c322 addi a2, a3, 72 +4020c252: 032c movi.n a3, 32 +4020c254: 1f6102 s32i a0, a1, 124 +4020c257: 0346c5 call0 4020f6c4 +4020c25a: 0042d6 bgez a2, 4020c262 +4020c25d: f27c movi.n a2, -1 +4020c25f: 001606 j 4020c2bb +4020c262: 06a042 movi a4, 6 +4020c265: 58cc32 addi a3, a12, 88 +4020c268: 30c122 addi a2, a1, 48 +4020c26b: d36a01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c26e: 0000c0 callx0 a0 +4020c271: 36c122 addi a2, a1, 54 +4020c274: 019145 call0 4020db8c +4020c277: 60c132 addi a3, a1, 96 +4020c27a: 04a042 movi a4, 4 +4020c27d: 3ec122 addi a2, a1, 62 +4020c280: d36501 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c283: 0000c0 callx0 a0 +4020c286: 20a032 movi a3, 32 +4020c289: 10c122 addi a2, a1, 16 +4020c28c: 034345 call0 4020f6c4 +4020c28f: fca296 bltz a2, 4020c25d +4020c292: ffea21 l32r a2, 4020c23c +4020c295: 041c movi.n a4, 16 +4020c297: 42c132 addi a3, a1, 66 +4020c29a: 04dec5 call0 40211088 +4020c29d: 182172 l32i a7, a1, 96 +4020c2a0: 032c movi.n a3, 32 +4020c2a2: 0139 s32i.n a3, a1, 0 +4020c2a4: 24c772 addi a7, a7, 36 +4020c2a7: 261c movi.n a6, 18 +4020c2a9: 30c152 addi a5, a1, 48 +4020c2ac: 42c142 addi a4, a1, 66 +4020c2af: 10c122 addi a2, a1, 16 +4020c2b2: ffe301 l32r a0, 4020c240 +4020c2b5: 0000c0 callx0 a0 +4020c2b8: 312f20 srai a2, a2, 31 +4020c2bb: 1f2102 l32i a0, a1, 124 +4020c2be: 80a092 movi a9, 128 +4020c2c1: 1e21c2 l32i a12, a1, 120 +4020c2c4: 119a add.n a1, a1, a9 +4020c2c6: f00d ret.n +4020c2c8: 2308a2 l8ui a10, a8, 35 +4020c2cb: a09240 addx4 a9, a2, a4 +4020c2ce: 1190a0 slli a9, a0, 6 +4020c2d1: 61e2c0 excw +4020c2d4: a0e224 excw +4020c2d7: eaa8 l32i.n a10, a10, 56 +4020c2d9: 61c2e3 excw +4020c2dc: c3c226 beqi a2, 32, 4020c2a3 +4020c2df: 025d24 excw +4020c2e2: 2561d2 s32i a13, a1, 148 +4020c2e5: 042c movi.n a4, 32 +4020c2e7: 03dd mov.n a13, a3 +4020c2e9: 0e2d mov.n a2, a14 +4020c2eb: 0c3d mov.n a3, a12 +4020c2ed: 276102 s32i a0, a1, 156 +4020c2f0: 1c6152 s32i a5, a1, 112 +4020c2f3: 2361f2 s32i a15, a1, 140 +4020c2f6: d34701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c2f9: 0000c0 callx0 a0 +4020c2fc: 0c2d mov.n a2, a12 +4020c2fe: 032c movi.n a3, 32 +4020c300: 039e05 call0 4020fce4 +4020c303: fff121 l32r a2, 4020c2c8 +4020c306: 4ec132 addi a3, a1, 78 +4020c309: 841c movi.n a4, 24 +4020c30b: 04d7c5 call0 40211088 +4020c30e: 1c2152 l32i a5, a1, 112 +4020c311: 640c movi.n a4, 6 +4020c313: 58c532 addi a3, a5, 88 +4020c316: 10c122 addi a2, a1, 16 +4020c319: 5df8 l32i.n a15, a13, 20 +4020c31b: 6dc8 l32i.n a12, a13, 24 +4020c31d: d33d01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c320: 0000c0 callx0 a0 +4020c323: 20a042 movi a4, 32 +4020c326: 203ee0 or a3, a14, a14 +4020c329: 16c122 addi a2, a1, 22 +4020c32c: d33a01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c32f: 0000c0 callx0 a0 +4020c332: 36c122 addi a2, a1, 54 +4020c335: 02ccc2 addi a12, a12, 2 +4020c338: 018505 call0 4020db8c +4020c33b: 11ccb0 slli a12, a12, 5 +4020c33e: cdca add.n a12, a13, a12 +4020c340: 031c movi.n a3, 16 +4020c342: 3ec122 addi a2, a1, 62 +4020c345: 0337c5 call0 4020f6c4 +4020c348: cc8b addi.n a12, a12, 8 +4020c34a: 31ef20 srai a14, a2, 31 +4020c34d: 01f9 s32i.n a15, a1, 0 +4020c34f: 0c7d mov.n a7, a12 +4020c351: 10c152 addi a5, a1, 16 +4020c354: 4ec142 addi a4, a1, 78 +4020c357: 032c movi.n a3, 32 +4020c359: 48cd22 addi a2, a13, 72 +4020c35c: e63c movi.n a6, 62 +4020c35e: ffb801 l32r a0, 4020c240 +4020c361: 0000c0 callx0 a0 +4020c364: f37c movi.n a3, -1 +4020c366: 272102 l32i a0, a1, 156 +4020c369: b33e20 movgez a3, a14, a2 +4020c36c: a0a092 movi a9, 160 +4020c36f: 032d mov.n a2, a3 +4020c371: 2621c2 l32i a12, a1, 152 +4020c374: 2521d2 l32i a13, a1, 148 +4020c377: 2421e2 l32i a14, a1, 144 +4020c37a: 2321f2 l32i a15, a1, 140 +4020c37d: 119a add.n a1, a1, a9 +4020c37f: f00d ret.n +4020c381: 000000 ill +4020c384: c0c112 addi a1, a1, -64 +4020c387: c1e9 s32i.n a14, a1, 48 +4020c389: b1f9 s32i.n a15, a1, 44 +4020c38b: 03ed mov.n a14, a3 +4020c38d: f109 s32i.n a0, a1, 60 +4020c38f: e1c9 s32i.n a12, a1, 56 +4020c391: d1d9 s32i.n a13, a1, 52 +4020c393: 62a032 movi a3, 98 +4020c396: 027d mov.n a7, a2 +4020c398: 04fd mov.n a15, a4 +4020c39a: f27c movi.n a2, -1 +4020c39c: 62b347 bgeu a3, a4, 4020c402 +4020c39f: 050ec2 l8ui a12, a14, 5 +4020c3a2: 51ced2 addi a13, a14, 81 +4020c3a5: 112c80 slli a2, a12, 8 +4020c3a8: 060ec2 l8ui a12, a14, 6 +4020c3ab: 041c movi.n a4, 16 +4020c3ad: 20cc20 or a12, a12, a2 +4020c3b0: 0d3d mov.n a3, a13 +4020c3b2: 012d mov.n a2, a1 +4020c3b4: 046172 s32i a7, a1, 16 +4020c3b7: d31701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c3ba: 0000c0 callx0 a0 +4020c3bd: 041c movi.n a4, 16 +4020c3bf: 030c movi.n a3, 0 +4020c3c1: 0d2d mov.n a2, a13 +4020c3c3: d31301 l32r a0, 40201010 <_irom0_text_start> +4020c3c6: 0000c0 callx0 a0 +4020c3c9: 4178 l32i.n a7, a1, 16 +4020c3cb: 2430c0 extui a3, a12, 0, 3 +4020c3ce: 0d6d mov.n a6, a13 +4020c3d0: 0f5d mov.n a5, a15 +4020c3d2: 0e4d mov.n a4, a14 +4020c3d4: 202770 or a2, a7, a7 +4020c3d7: 030885 call0 4020f460 +4020c3da: fc7c movi.n a12, -1 +4020c3dc: 42dc bnez.n a2, 4020c3f4 +4020c3de: 0d3d mov.n a3, a13 +4020c3e0: 041c movi.n a4, 16 +4020c3e2: 012d mov.n a2, a1 +4020c3e4: d60e01 l32r a0, 40201c1c +4020c3e7: 0000c0 callx0 a0 +4020c3ea: 030c movi.n a3, 0 +4020c3ec: 1c0c movi.n a12, 1 +4020c3ee: 83c320 moveqz a12, a3, a2 +4020c3f1: 60c0c0 neg a12, a12 +4020c3f4: 041c movi.n a4, 16 +4020c3f6: 013d mov.n a3, a1 +4020c3f8: 0d2d mov.n a2, a13 +4020c3fa: d30601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c3fd: 0000c0 callx0 a0 +4020c400: 0c2d mov.n a2, a12 +4020c402: f108 l32i.n a0, a1, 60 +4020c404: e1c8 l32i.n a12, a1, 56 +4020c406: d1d8 l32i.n a13, a1, 52 +4020c408: c1e8 l32i.n a14, a1, 48 +4020c40a: b1f8 l32i.n a15, a1, 44 +4020c40c: 40c112 addi a1, a1, 64 +4020c40f: f00d ret.n +4020c411: 000000 ill +4020c414: f0c112 addi a1, a1, -16 +4020c417: 21c9 s32i.n a12, a1, 8 +4020c419: 11d9 s32i.n a13, a1, 4 +4020c41b: 01e9 s32i.n a14, a1, 0 +4020c41d: 3109 s32i.n a0, a1, 12 +4020c41f: 03ed mov.n a14, a3 +4020c421: 02cd mov.n a12, a2 +4020c423: 30c2d2 addi a13, a2, 48 +4020c426: 2c28 l32i.n a2, a12, 8 +4020c428: 42cc bnez.n a2, 4020c430 +4020c42a: 020c movi.n a2, 0 +4020c42c: 000606 j 4020c448 +4020c42f: 840c00 extui a0, a0, 12, 9 +4020c432: 0c3d mov.n a3, a12 +4020c434: 0e2d mov.n a2, a14 +4020c436: d5f901 l32r a0, 40201c1c +4020c439: 0000c0 callx0 a0 +4020c43c: 628c beqz.n a2, 4020c446 +4020c43e: cccb addi.n a12, a12, 12 +4020c440: e29cd7 bne a12, a13, 4020c426 +4020c443: fff8c6 j 4020c42a +4020c446: 120c movi.n a2, 1 +4020c448: 3108 l32i.n a0, a1, 12 +4020c44a: 21c8 l32i.n a12, a1, 8 +4020c44c: 11d8 l32i.n a13, a1, 4 +4020c44e: 01e8 l32i.n a14, a1, 0 +4020c450: 10c112 addi a1, a1, 16 +4020c453: f00d ret.n +4020c455: 000000 ill +4020c458: e0c112 addi a1, a1, -32 +4020c45b: 61c9 s32i.n a12, a1, 24 +4020c45d: 51d9 s32i.n a13, a1, 20 +4020c45f: 41e9 s32i.n a14, a1, 16 +4020c461: 31f9 s32i.n a15, a1, 12 +4020c463: 7109 s32i.n a0, a1, 28 +4020c465: 03dd mov.n a13, a3 +4020c467: 02cd mov.n a12, a2 +4020c469: 30c2e2 addi a14, a2, 48 +4020c46c: 0f0c movi.n a15, 0 +4020c46e: 2c28 l32i.n a2, a12, 8 +4020c470: 429c beqz.n a2, 4020c488 +4020c472: 3dcc bnez.n a13, 4020c479 +4020c474: 2cf9 s32i.n a15, a12, 8 +4020c476: 000386 j 4020c488 +4020c479: 840c movi.n a4, 8 +4020c47b: 0c3d mov.n a3, a12 +4020c47d: 0d2d mov.n a2, a13 +4020c47f: d5e701 l32r a0, 40201c1c +4020c482: 0000c0 callx0 a0 +4020c485: feb216 beqz a2, 4020c474 +4020c488: cccb addi.n a12, a12, 12 +4020c48a: e09ce7 bne a12, a14, 4020c46e +4020c48d: 7108 l32i.n a0, a1, 28 +4020c48f: 61c8 l32i.n a12, a1, 24 +4020c491: 51d8 l32i.n a13, a1, 20 +4020c493: 41e8 l32i.n a14, a1, 16 +4020c495: 31f8 l32i.n a15, a1, 12 +4020c497: 20c112 addi a1, a1, 32 +4020c49a: f00d ret.n +4020c49c: 0b4c movi.n a11, 64 +4020c49e: 644023 excw +4020c4a1: 230b addi.n a2, a3, -1 +4020c4a3: c11240 mul16u a1, a2, a4 +4020c4a6: 61d2a0 xsr.excsave2 a10 +4020c4a9: 61e215 excw +4020c4ac: 61f214 excw +4020c4af: 610213 excw +4020c4b2: 61c217 bnall a2, a1, 4020c517 +4020c4b5: d22016 beqz a0, 4020c1db +4020c4b8: 032220 excw +4020c4bb: 614200 excw +4020c4be: 620c movi.n a2, 6 +4020c4c0: ed0d61 l32r a6, 402078f4 +4020c4c3: 05fd03 excw +4020c4c6: 1b6207 bbci a2, 0, 4020c4e5 +4020c4c9: 743040 extui a3, a4, 0, 8 +4020c4cc: 0e2d mov.n a2, a14 +4020c4ce: c32b addi.n a12, a3, 2 +4020c4d0: e139 s32i.n a3, a1, 56 +4020c4d2: fdb9c5 call0 4020a070 +4020c4d5: e138 l32i.n a3, a1, 56 +4020c4d7: 01d222 addmi a2, a2, 0x100 +4020c4da: 331b addi.n a3, a3, 1 +4020c4dc: 74c0c0 extui a12, a12, 0, 8 +4020c4df: 094232 s8i a3, a2, 9 +4020c4e2: 000906 j 4020c50a +4020c4e5: b27c movi.n a2, -5 +4020c4e7: 102d20 and a2, a13, a2 +4020c4ea: 0a1266 bnei a2, 1, 4020c4f8 +4020c4ed: c128 l32i.n a2, a1, 48 +4020c4ef: c29b addi.n a12, a2, 9 +4020c4f1: 74c0c0 extui a12, a12, 0, 8 +4020c4f4: 000706 j 4020c514 +4020c4f7: 233000 excw +4020c4fa: b74520 excw +4020c4fd: 22fd excw +4020c4ff: c201d2 l8ui a13, a1, 194 +4020c502: c20802 l8ui a0, a8, 194 +4020c505: 01cc bnez.n a1, 4020c509 +4020c507: 74c0c0 extui a12, a12, 0, 8 +4020c50a: 6dcc bnez.n a13, 4020c514 +4020c50c: 2c1b addi.n a2, a12, 1 +4020c50e: 142e45 call0 402207f4 +4020c511: 003486 j 4020c5e7 +4020c514: 252d66 bnei a13, 2, 4020c53d +4020c517: 841c movi.n a4, 24 +4020c519: 0f3d mov.n a3, a15 +4020c51b: 10c122 addi a2, a1, 16 +4020c51e: d2bd01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c521: 0000c0 callx0 a0 +4020c524: 840c movi.n a4, 8 +4020c526: 18cf32 addi a3, a15, 24 +4020c529: 20c122 addi a2, a1, 32 +4020c52c: d2ba01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c52f: 0000c0 callx0 a0 +4020c532: 840c movi.n a4, 8 +4020c534: 10cf32 addi a3, a15, 16 +4020c537: 28c122 addi a2, a1, 40 +4020c53a: 000186 j 4020c544 +4020c53d: d148 l32i.n a4, a1, 52 +4020c53f: 0f3d mov.n a3, a15 +4020c541: 10c122 addi a2, a1, 16 +4020c544: d2b401 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c547: 0000c0 callx0 a0 +4020c54a: d128 l32i.n a2, a1, 52 +4020c54c: fc1b addi.n a15, a12, 1 +4020c54e: c148 l32i.n a4, a1, 48 +4020c550: 0129 s32i.n a2, a1, 0 +4020c552: 0e5d mov.n a5, a14 +4020c554: 0d3d mov.n a3, a13 +4020c556: 10c172 addi a7, a1, 16 +4020c559: 0f6d mov.n a6, a15 +4020c55b: 01a022 movi a2, 1 +4020c55e: 142185 call0 40220778 +4020c561: d58031 l32r a3, 40201b64 +4020c564: ec0b addi.n a14, a12, -1 +4020c566: a0cc30 addx4 a12, a12, a3 +4020c569: 622c22 l32i a2, a12, 0x188 +4020c56c: ff14c1 l32r a12, 4020c1bc +4020c56f: a28c beqz.n a2, 4020c57d +4020c571: c4a042 movi a4, 196 +4020c574: 203cc0 or a3, a12, a12 +4020c577: d3e401 l32r a0, 40201508 +4020c57a: 0000c0 callx0 a0 +4020c57d: 0c3d mov.n a3, a12 +4020c57f: 050c movi.n a5, 0 +4020c581: c6a042 movi a4, 198 +4020c584: 98a022 movi a2, 152 +4020c587: d3df01 l32r a0, 40201504 +4020c58a: 0000c0 callx0 a0 +4020c58d: 02cd mov.n a12, a2 +4020c58f: d57521 l32r a2, 40201b64 +4020c592: a0ee20 addx4 a14, a14, a2 +4020c595: 636ec2 s32i a12, a14, 0x18c +4020c598: 04bc16 beqz a12, 4020c5e7 +4020c59b: 0c2d mov.n a2, a12 +4020c59d: 98a032 movi a3, 152 +4020c5a0: e5a701 l32r a0, 40205c3c +4020c5a3: 0000c0 callx0 a0 +4020c5a6: 020c movi.n a2, 0 +4020c5a8: f47c movi.n a4, -1 +4020c5aa: 151c movi.n a5, 17 +4020c5ac: b032c0 addx8 a3, a2, a12 +4020c5af: 1349 s32i.n a4, a3, 4 +4020c5b1: 2349 s32i.n a4, a3, 8 +4020c5b3: 221b addi.n a2, a2, 1 +4020c5b5: f39257 bne a2, a5, 4020c5ac +4020c5b8: 142d66 bnei a13, 2, 4020c5d0 +4020c5bb: ffb821 l32r a2, 4020c49c +4020c5be: 256c22 s32i a2, a12, 148 +4020c5c1: 120c movi.n a2, 1 +4020c5c3: 236c22 s32i a2, a12, 140 +4020c5c6: 020c movi.n a2, 0 +4020c5c8: 246c22 s32i a2, a12, 144 +4020c5cb: 000546 j 4020c5e4 +4020c5ce: 210000 srai a0, a0, 0 +4020c5d1: ee9c beqz.n a14, 4020c5f3 +4020c5d3: 0a3d26 beqi a13, 3, 4020c5e1 +4020c5d6: b27c movi.n a2, -5 +4020c5d8: 10dd20 and a13, a13, a2 +4020c5db: 051d66 bnei a13, 1, 4020c5e4 +4020c5de: ffb021 l32r a2, 4020c4a0 +4020c5e1: 256c22 s32i a2, a12, 148 +4020c5e4: 005cf2 s16i a15, a12, 0 +4020c5e7: 172102 l32i a0, a1, 92 +4020c5ea: 020c movi.n a2, 0 +4020c5ec: 1621c2 l32i a12, a1, 88 +4020c5ef: 1521d2 l32i a13, a1, 84 +4020c5f2: 1421e2 l32i a14, a1, 80 +4020c5f5: 1321f2 l32i a15, a1, 76 +4020c5f8: 60c112 addi a1, a1, 96 +4020c5fb: f00d ret.n +4020c5fd: 000000 ill +4020c600: f0c112 addi a1, a1, -16 +4020c603: 036102 s32i a0, a1, 12 +4020c606: 0261c2 s32i a12, a1, 8 +4020c609: 20c330 or a12, a3, a3 +4020c60c: 039c05 call0 4020ffd0 +4020c60f: 6c48 l32i.n a4, a12, 24 +4020c611: 5c68 l32i.n a6, a12, 20 +4020c613: 542b addi.n a5, a4, 2 +4020c615: 1155b0 slli a5, a5, 5 +4020c618: 5c5a add.n a5, a12, a5 +4020c61a: d68731 l32r a3, 40202038 +4020c61d: 558b addi.n a5, a5, 8 +4020c61f: ffe845 call0 4020c4a4 +4020c622: 3108 l32i.n a0, a1, 12 +4020c624: 312f20 srai a2, a2, 31 +4020c627: 21c8 l32i.n a12, a1, 8 +4020c629: 10c112 addi a1, a1, 16 +4020c62c: f00d ret.n +4020c62e: 120000 excw +4020c631: d2f0c1 l32r a12, 402011f4 +4020c634: dd0161 l32r a6, 40203a38 +4020c637: 232202 l32i a0, a2, 140 +4020c63a: 21c933 excw +4020c63d: 3109 s32i.n a0, a1, 12 +4020c63f: 03cd mov.n a12, a3 +4020c641: b2dc bnez.n a2, 4020c660 +4020c643: 120c movi.n a2, 1 +4020c645: 336322 s32i a2, a3, 204 +4020c648: 020c movi.n a2, 0 +4020c64a: 346322 s32i a2, a3, 208 +4020c64d: 0d2d mov.n a2, a13 +4020c64f: ffbf45 call0 4020c244 +4020c652: 0c3d mov.n a3, a12 +4020c654: 0d2d mov.n a2, a13 +4020c656: ffc745 call0 4020c2cc +4020c659: 4d28 l32i.n a2, a13, 16 +4020c65b: 0c3d mov.n a3, a12 +4020c65d: fffa05 call0 4020c600 +4020c660: 3108 l32i.n a0, a1, 12 +4020c662: 21c8 l32i.n a12, a1, 8 +4020c664: 11d8 l32i.n a13, a1, 4 +4020c666: 10c112 addi a1, a1, 16 +4020c669: f00d ret.n +4020c66b: 3e4100 excw +4020c66e: c112d5 excw +4020c671: 2442f0 extui a4, a15, 2, 3 +4020c674: 610205 call0 4026d698 <_irom0_text_end+0x3cb1c> +4020c677: 245203 excw +4020c67a: 433033 excw +4020c67d: 023d20 excw +4020c680: 1528 l32i.n a2, a5, 4 +4020c682: 018705 call0 4020def4 +4020c685: 3108 l32i.n a0, a1, 12 +4020c687: 10c112 addi a1, a1, 16 +4020c68a: f00d ret.n +4020c68c: 2308b6 bltui a8, 0x8000, 4020c6b3 +4020c68f: d67040 excw +4020c692: 924020 excw +4020c695: 90a0a0 addx2 a10, a0, a10 +4020c698: c2c011 l32r a1, 401fd198 <_lit4_end+0xf6e6c> +4020c69b: d22661 l32r a6, 40200f34 <_lit4_end+0xfac08> +4020c69e: f22561 l32r a6, 40208f34 +4020c6a1: 422361 l32r a6, 401dcf30 <_lit4_end+0xd6c04> +4020c6a4: 0201d2 l8ui a13, a1, 2 +4020c6a7: e22761 l32r a6, 40204f44 +4020c6aa: 202461 l32r a6, 401d473c <_lit4_end+0xce410> +4020c6ad: 3220c2 l32i a12, a0, 200 +4020c6b0: 227404 excw +4020c6b3: 2908a0 excw +4020c6b6: 0c4c movi.n a12, 64 +4020c6b8: 332012 l32i a1, a0, 204 +4020c6bb: 0d0c20 excw +4020c6be: bfaf22 movi a2, -65 +4020c6c1: 102320 and a2, a3, a2 +4020c6c4: ecd9 s32i.n a13, a12, 56 +4020c6c6: 8ca0f2 movi a15, 140 +4020c6c9: 744422 s8i a2, a4, 116 +4020c6cc: 2cfa add.n a2, a12, a15 +4020c6ce: 1c6122 s32i a2, a1, 112 +4020c6d1: 652c22 l32i a2, a12, 0x194 +4020c6d4: fc8b addi.n a15, a12, 8 +4020c6d6: 035b45 call0 4020fc8c +4020c6d9: 029c beqz.n a2, 4020c6ed +4020c6db: 0d3d mov.n a3, a13 +4020c6dd: 0f2d mov.n a2, a15 +4020c6df: fff8c5 call0 4020c66c +4020c6e2: 02dd mov.n a13, a2 +4020c6e4: 0b4216 beqz a2, 4020c79c +4020c6e7: 000146 j 4020c6f0 +4020c6ea: 000000 ill +4020c6ed: 1c21d2 l32i a13, a1, 112 +4020c6f0: 642ce2 l32i a14, a12, 0x190 +4020c6f3: 034c movi.n a3, 64 +4020c6f5: fece22 addi a2, a14, -2 +4020c6f8: 30a0e2 movi a14, 48 +4020c6fb: 83e320 moveqz a14, a3, a2 +4020c6fe: ffe321 l32r a2, 4020c68c +4020c701: 18a042 movi a4, 24 +4020c704: 50c132 addi a3, a1, 80 +4020c707: 049805 call0 40211088 +4020c70a: 652c22 l32i a2, a12, 0x194 +4020c70d: 7faf32 movi a3, -129 +4020c710: 80c222 addi a2, a2, -128 +4020c713: 080c movi.n a8, 0 +4020c715: 102230 and a2, a2, a3 +4020c718: 0c58 l32i.n a5, a12, 0 +4020c71a: 130c movi.n a3, 1 +4020c71c: 933820 movnez a3, a8, a2 +4020c71f: 21e9 s32i.n a14, a1, 8 +4020c721: 6ccc22 addi a2, a12, 108 +4020c724: 10c1e2 addi a14, a1, 16 +4020c727: 3139 s32i.n a3, a1, 12 +4020c729: 0129 s32i.n a2, a1, 0 +4020c72b: 4ccc72 addi a7, a12, 76 +4020c72e: 0f6d mov.n a6, a15 +4020c730: 58c552 addi a5, a5, 88 +4020c733: 50c142 addi a4, a1, 80 +4020c736: 032c movi.n a3, 32 +4020c738: 0d2d mov.n a2, a13 +4020c73a: 11e9 s32i.n a14, a1, 4 +4020c73c: 1d6182 s32i a8, a1, 116 +4020c73f: 02db05 call0 4020f4f0 +4020c742: 5c2c42 l32i a4, a12, 0x170 +4020c745: 5b2c32 l32i a3, a12, 0x16c +4020c748: 0e2d mov.n a2, a14 +4020c74a: ffc385 call0 4020c384 +4020c74d: 1d2182 l32i a8, a1, 116 +4020c750: a28c beqz.n a2, 4020c75e +4020c752: 652c22 l32i a2, a12, 0x194 +4020c755: 035345 call0 4020fc8c +4020c758: 040216 beqz a2, 4020c79c +4020c75b: ffdc86 j 4020c6d1 +4020c75e: 0c38 l32i.n a3, a12, 0 +4020c760: ffcc21 l32r a2, 4020c690 +4020c763: 666c82 s32i a8, a12, 0x198 +4020c766: 0c4d mov.n a4, a12 +4020c768: 039585 call0 402100c4 +4020c76b: 652c22 l32i a2, a12, 0x194 +4020c76e: 0351c5 call0 4020fc8c +4020c771: d28c beqz.n a2, 4020c782 +4020c773: 8ca022 movi a2, 140 +4020c776: 042c movi.n a4, 32 +4020c778: 0d3d mov.n a3, a13 +4020c77a: 2c2a add.n a2, a12, a2 +4020c77c: d22601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c77f: 0000c0 callx0 a0 +4020c782: 1d0c movi.n a13, 1 +4020c784: aca022 movi a2, 172 +4020c787: 116cd2 s32i a13, a12, 68 +4020c78a: 40a042 movi a4, 64 +4020c78d: 203ee0 or a3, a14, a14 +4020c790: 802c20 add a2, a12, a2 +4020c793: d22001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c796: 0000c0 callx0 a0 +4020c799: 3b6cd2 s32i a13, a12, 236 +4020c79c: 272102 l32i a0, a1, 156 +4020c79f: a0a092 movi a9, 160 +4020c7a2: 2621c2 l32i a12, a1, 152 +4020c7a5: 2521d2 l32i a13, a1, 148 +4020c7a8: 2421e2 l32i a14, a1, 144 +4020c7ab: 2321f2 l32i a15, a1, 140 +4020c7ae: 119a add.n a1, a1, a9 +4020c7b0: f00d ret.n +4020c7b2: 120000 excw +4020c7b5: e2f0c1 l32r a12, 40205378 +4020c7b8: 200061 l32r a6, 401d47b8 <_lit4_end+0xce48c> +4020c7bb: 2220e2 l32i a14, a0, 136 +4020c7be: c90223 excw +4020c7c1: 310921 l32r a2, 401d8be8 <_lit4_end+0xd28bc> +4020c7c4: 11d9 s32i.n a13, a1, 4 +4020c7c6: 03cd mov.n a12, a3 +4020c7c8: 42ac beqz.n a2, 4020c7f0 +4020c7ca: 030c movi.n a3, 0 +4020c7cc: 326c32 s32i a3, a12, 200 +4020c7cf: 116c32 s32i a3, a12, 68 +4020c7d2: 044c movi.n a4, 64 +4020c7d4: 68cc22 addi a2, a12, 104 +4020c7d7: d20e01 l32r a0, 40201010 <_irom0_text_start> +4020c7da: 0000c0 callx0 a0 +4020c7dd: 120c movi.n a2, 1 +4020c7df: 6c29 s32i.n a2, a12, 24 +4020c7e1: 220c movi.n a2, 2 +4020c7e3: 7c29 s32i.n a2, a12, 28 +4020c7e5: 0c3d mov.n a3, a12 +4020c7e7: 0e2d mov.n a2, a14 +4020c7e9: ffae05 call0 4020c2cc +4020c7ec: 001706 j 4020c84c +4020c7ef: 232200 excw +4020c7f2: 92dc11 l32r a1, 401f1364 <_lit4_end+0xeb038> +4020c7f5: 8328 l32i.n a2, a3, 32 +4020c7f7: 051216 beqz a2, 4020c84c +4020c7fa: 120c movi.n a2, 1 +4020c7fc: 326c22 s32i a2, a12, 200 +4020c7ff: 220c movi.n a2, 2 +4020c801: 116c22 s32i a2, a12, 68 +4020c804: 4e28 l32i.n a2, a14, 16 +4020c806: 203cc0 or a3, a12, a12 +4020c809: ffdf45 call0 4020c600 +4020c80c: 000f06 j 4020c84c +4020c80f: 226600 excw +4020c812: 222c movi.n a2, 34 +4020c814: 042c movi.n a4, 32 +4020c816: 032216 beqz a2, 4020c84c +4020c819: 01a022 movi a2, 1 +4020c81c: 6c38 l32i.n a3, a12, 24 +4020c81e: 326c22 s32i a2, a12, 200 +4020c821: 116c22 s32i a2, a12, 68 +4020c824: 7c28 l32i.n a2, a12, 28 +4020c826: 0d0c movi.n a13, 0 +4020c828: 7c39 s32i.n a3, a12, 28 +4020c82a: 6c29 s32i.n a2, a12, 24 +4020c82c: 4cd9 s32i.n a13, a12, 16 +4020c82e: 0c3d mov.n a3, a12 +4020c830: 0e2d mov.n a2, a14 +4020c832: ffa985 call0 4020c2cc +4020c835: 3c28 l32i.n a2, a12, 12 +4020c837: 1112d7 beq a2, a13, 4020c84c +4020c83a: 3cd9 s32i.n a13, a12, 12 +4020c83c: 000306 j 4020c84c +4020c83f: 126600 excw +4020c842: 2808 l32i.n a0, a8, 8 +4020c844: 121633 excw +4020c847: c6fb addi.n a12, a6, 15 +4020c849: 00fff1 l32r a15, 401ccc48 <_lit4_end+0xc691c> +4020c84c: 3108 l32i.n a0, a1, 12 +4020c84e: 21c8 l32i.n a12, a1, 8 +4020c850: 11d8 l32i.n a13, a1, 4 +4020c852: 01e8 l32i.n a14, a1, 0 +4020c854: 10c112 addi a1, a1, 16 +4020c857: f00d ret.n +4020c859: 000000 ill +4020c85c: 20c860 or a12, a8, a6 +4020c85f: c11240 mul16u a1, a2, a4 +4020c862: 61c9e0 excw +4020c865: 02c8 l32i.n a12, a2, 0 +4020c867: 51d9 s32i.n a13, a1, 20 +4020c869: 41e9 s32i.n a14, a1, 16 +4020c86b: 31f9 s32i.n a15, a1, 12 +4020c86d: 7109 s32i.n a0, a1, 28 +4020c86f: 02dd mov.n a13, a2 +4020c871: 1e0c movi.n a14, 1 +4020c873: 0f0c movi.n a15, 0 +4020c875: 8c9c beqz.n a12, 4020c891 +4020c877: 4ce9 s32i.n a14, a12, 16 +4020c879: 202dd0 or a2, a13, a13 +4020c87c: 326cf2 s32i a15, a12, 200 +4020c87f: 203cc0 or a3, a12, a12 +4020c882: fff305 call0 4020c7b4 +4020c885: 322c22 l32i a2, a12, 200 +4020c888: fed256 bnez a2, 4020c879 +4020c88b: 002cc2 l32i a12, a12, 0 +4020c88e: fff8c6 j 4020c875 +4020c891: 052d22 l32i a2, a13, 20 +4020c894: 00c216 beqz a2, 4020c8a4 +4020c897: 00a062 movi a6, 0 +4020c89a: fff041 l32r a4, 4020c85c +4020c89d: 0d5d mov.n a5, a13 +4020c89f: 063d mov.n a3, a6 +4020c8a1: 038245 call0 402100c8 +4020c8a4: 7108 l32i.n a0, a1, 28 +4020c8a6: 61c8 l32i.n a12, a1, 24 +4020c8a8: 51d8 l32i.n a13, a1, 20 +4020c8aa: 41e8 l32i.n a14, a1, 16 +4020c8ac: 31f8 l32i.n a15, a1, 12 +4020c8ae: 20c112 addi a1, a1, 32 +4020c8b1: f00d ret.n + ... + +4020c8b4 : +4020c8b4: e0c112 addi a1, a1, -32 +4020c8b7: 0461e2 s32i a14, a1, 16 +4020c8ba: fe40e1 l32r a14, 4020c1bc +4020c8bd: 51d9 s32i.n a13, a1, 20 +4020c8bf: 31f9 s32i.n a15, a1, 12 +4020c8c1: 03dd mov.n a13, a3 +4020c8c3: 02fd mov.n a15, a2 +4020c8c5: f4a142 movi a4, 0x1f4 +4020c8c8: 0e3d mov.n a3, a14 +4020c8ca: 60a022 movi a2, 96 +4020c8cd: 61c9 s32i.n a12, a1, 24 +4020c8cf: 7109 s32i.n a0, a1, 28 +4020c8d1: d5df01 l32r a0, 40202050 +4020c8d4: 0000c0 callx0 a0 +4020c8d7: 02cd mov.n a12, a2 +4020c8d9: 020c movi.n a2, 0 +4020c8db: 029c27 bne a12, a2, 4020c8e1 +4020c8de: 002686 j 4020c97c +4020c8e1: 640c movi.n a4, 6 +4020c8e3: 0f3d mov.n a3, a15 +4020c8e5: 58cc22 addi a2, a12, 88 +4020c8e8: d1cb01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c8eb: 0000c0 callx0 a0 +4020c8ee: c44c movi.n a4, 76 +4020c8f0: 0d3d mov.n a3, a13 +4020c8f2: 2c4b addi.n a2, a12, 4 +4020c8f4: d1c801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c8f7: 0000c0 callx0 a0 +4020c8fa: 0c2d mov.n a2, a12 +4020c8fc: ff4705 call0 4020bd70 +4020c8ff: fda142 movi a4, 0x1fd +4020c902: 06a256 bnez a2, 4020c970 +4020c905: 0e3d mov.n a3, a14 +4020c907: bda142 movi a4, 0x1bd +4020c90a: d4a022 movi a2, 212 +4020c90d: d5d001 l32r a0, 40202050 +4020c910: 0000c0 callx0 a0 +4020c913: 030c movi.n a3, 0 +4020c915: 02dd mov.n a13, a2 +4020c917: 3d1237 beq a2, a3, 4020c958 +4020c91a: 1f0c movi.n a15, 1 +4020c91c: 82f9 s32i.n a15, a2, 32 +4020c91e: 4c28 l32i.n a2, a12, 16 +4020c920: 036805 call0 4020ffa4 +4020c923: 5d29 s32i.n a2, a13, 20 +4020c925: 0d3d mov.n a3, a13 +4020c927: 0c2d mov.n a2, a12 +4020c929: ff9185 call0 4020c244 +4020c92c: 0122d6 bgez a2, 4020c942 +4020c92f: 0e3d mov.n a3, a14 +4020c931: d4a142 movi a4, 0x1d4 +4020c934: 0d2d mov.n a2, a13 +4020c936: d2f401 l32r a0, 40201508 +4020c939: 0000c0 callx0 a0 +4020c93c: 030c movi.n a3, 0 +4020c93e: 000586 j 4020c958 +4020c941: 0d3d00 excw +4020c944: 0c2d mov.n a2, a12 +4020c946: 2df9 s32i.n a15, a13, 8 +4020c948: ffe685 call0 4020c7b4 +4020c94b: 020c movi.n a2, 0 +4020c94d: 2d29 s32i.n a2, a13, 8 +4020c94f: 0d3d mov.n a3, a13 +4020c951: 0c2d mov.n a2, a12 +4020c953: ffe605 call0 4020c7b4 +4020c956: 0d3d mov.n a3, a13 +4020c958: 0c39 s32i.n a3, a12, 0 +4020c95a: 0c2d mov.n a2, a12 +4020c95c: 01c356 bnez a3, 4020c97c +4020c95f: 142c22 l32i a2, a12, 80 +4020c962: 03a242 movi a4, 0x203 +4020c965: 0e3d mov.n a3, a14 +4020c967: d2e801 l32r a0, 40201508 +4020c96a: 0000c0 callx0 a0 +4020c96d: 04a242 movi a4, 0x204 +4020c970: 0c2d mov.n a2, a12 +4020c972: 0e3d mov.n a3, a14 +4020c974: d2e501 l32r a0, 40201508 +4020c977: 0000c0 callx0 a0 +4020c97a: 020c movi.n a2, 0 +4020c97c: 7108 l32i.n a0, a1, 28 +4020c97e: 61c8 l32i.n a12, a1, 24 +4020c980: 51d8 l32i.n a13, a1, 20 +4020c982: 41e8 l32i.n a14, a1, 16 +4020c984: 31f8 l32i.n a15, a1, 12 +4020c986: 20c112 addi a1, a1, 32 +4020c989: f00d ret.n + ... + +4020c98c : +4020c98c: f0c112 addi a1, a1, -16 +4020c98f: 01e9 s32i.n a14, a1, 0 +4020c991: 03ed mov.n a14, a3 +4020c993: fe0a31 l32r a3, 4020c1bc +4020c996: 11d9 s32i.n a13, a1, 4 +4020c998: 88a242 movi a4, 0x288 +4020c99b: 02dd mov.n a13, a2 +4020c99d: a0a122 movi a2, 0x1a0 +4020c9a0: 21c9 s32i.n a12, a1, 8 +4020c9a2: 3109 s32i.n a0, a1, 12 +4020c9a4: d5ab01 l32r a0, 40202050 +4020c9a7: 0000c0 callx0 a0 +4020c9aa: 02cd mov.n a12, a2 +4020c9ac: 020c movi.n a2, 0 +4020c9ae: 431c27 beq a12, a2, 4020c9f5 +4020c9b1: 640c movi.n a4, 6 +4020c9b3: 0e3d mov.n a3, a14 +4020c9b5: 2c8b addi.n a2, a12, 8 +4020c9b7: d19701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020c9ba: 0000c0 callx0 a0 +4020c9bd: fdfe31 l32r a3, 4020c1b8 +4020c9c0: 0d28 l32i.n a2, a13, 0 +4020c9c2: 0348 l32i.n a4, a3, 0 +4020c9c4: 1c29 s32i.n a2, a12, 4 +4020c9c6: 006cd2 s32i a13, a12, 0 +4020c9c9: 00a022 movi a2, 0 +4020c9cc: 085427 bbc a4, a2, 4020c9d8 +4020c9cf: 221b addi.n a2, a2, 1 +4020c9d1: f7b266 bnei a2, 16, 4020c9cc +4020c9d4: 0006c6 j 4020c9f3 +4020c9d7: f75100 excw +4020c9da: 50fd excw +4020c9dc: c9a052 movi a5, 201 +4020c9df: 150c05 call0 40221aa0 +4020c9e2: 401200 ssl a2 +4020c9e5: a15500 sll a5, a5 +4020c9e8: 204540 or a4, a5, a4 +4020c9eb: 742020 extui a2, a2, 0, 8 +4020c9ee: 0349 s32i.n a4, a3, 0 +4020c9f0: 676c22 s32i a2, a12, 0x19c +4020c9f3: 0c2d mov.n a2, a12 +4020c9f5: 3108 l32i.n a0, a1, 12 +4020c9f7: 21c8 l32i.n a12, a1, 8 +4020c9f9: 11d8 l32i.n a13, a1, 4 +4020c9fb: 01e8 l32i.n a14, a1, 0 +4020c9fd: 10c112 addi a1, a1, 16 +4020ca00: f00d ret.n + ... + +4020ca04 : +4020ca04: f0c112 addi a1, a1, -16 +4020ca07: 3109 s32i.n a0, a1, 12 +4020ca09: d29c beqz.n a2, 4020ca2a +4020ca0b: 5d2232 l32i a3, a2, 0x174 +4020ca0e: 126317 bbci a3, 1, 4020ca24 +4020ca11: 01d222 addmi a2, a2, 0x100 +4020ca14: 740242 l8ui a4, a2, 116 +4020ca17: 430c movi.n a3, 4 +4020ca19: 203430 or a3, a4, a3 +4020ca1c: 744232 s8i a3, a2, 116 +4020ca1f: 0001c6 j 4020ca2a +4020ca22: 100000 and a0, a0, a0 +4020ca25: 852011 l32r a1, 401edea8 <_lit4_end+0xe7b7c> +4020ca28: ff79 s32i.n a7, a15, 60 +4020ca2a: 3108 l32i.n a0, a1, 12 +4020ca2c: 10c112 addi a1, a1, 16 +4020ca2f: f00d ret.n +4020ca31: 000000 ill +4020ca34: 000007 bnone a0, a0, 4020ca38 +4020ca37: dd6880 excw +4020ca3a: 00 .byte 00 +4020ca3b: 40 .byte 0x40 + +4020ca3c <__wpa_send_eapol>: +4020ca3c: 90c112 addi a1, a1, -112 +4020ca3f: 028d mov.n a8, a2 +4020ca41: 1f2122 l32i a2, a1, 124 +4020ca44: 1961d2 s32i a13, a1, 100 +4020ca47: 1861e2 s32i a14, a1, 96 +4020ca4a: 1b6102 s32i a0, a1, 108 +4020ca4d: 1a61c2 s32i a12, a1, 104 +4020ca50: 1761f2 s32i a15, a1, 92 +4020ca53: f159 s32i.n a5, a1, 60 +4020ca55: b179 s32i.n a7, a1, 44 +4020ca57: 03dd mov.n a13, a3 +4020ca59: 049d mov.n a9, a4 +4020ca5b: 06ed mov.n a14, a6 +4020ca5d: f2cc bnez.n a2, 4020ca70 <__wpa_send_eapol+0x34> +4020ca5f: 642322 l32i a2, a3, 0x190 +4020ca62: 240c movi.n a4, 2 +4020ca64: fec222 addi a2, a2, -2 +4020ca67: 01a032 movi a3, 1 +4020ca6a: 933420 movnez a3, a4, a2 +4020ca6d: 1f6132 s32i a3, a1, 124 +4020ca70: 1f2132 l32i a3, a1, 124 +4020ca73: 1e2142 l32i a4, a1, 120 +4020ca76: fec332 addi a3, a3, -2 +4020ca79: d139 s32i.n a3, a1, 52 +4020ca7b: 120c movi.n a2, 1 +4020ca7d: 030c movi.n a3, 0 +4020ca7f: 832340 moveqz a2, a3, a4 +4020ca82: 742020 extui a2, a2, 0, 8 +4020ca85: c129 s32i.n a2, a1, 48 +4020ca87: d128 l32i.n a2, a1, 52 +4020ca89: 850c movi.n a5, 8 +4020ca8b: 105950 and a5, a9, a5 +4020ca8e: 2f22f6 bgeui a2, 2, 4020cac1 <__wpa_send_eapol+0x85> +4020ca91: c138 l32i.n a3, a1, 48 +4020ca93: a3ac beqz.n a3, 4020cac1 <__wpa_send_eapol+0x85> +4020ca95: ffe721 l32r a2, 4020ca34 +4020ca98: 1c2142 l32i a4, a1, 112 +4020ca9b: 102420 and a2, a4, a2 +4020ca9e: 0082d6 bgez a2, 4020caaa <__wpa_send_eapol+0x6e> +4020caa1: 220b addi.n a2, a2, -1 +4020caa3: 837c movi.n a3, -8 +4020caa5: 202230 or a2, a2, a3 +4020caa8: 221b addi.n a2, a2, 1 +4020caaa: 9129 s32i.n a2, a1, 36 +4020caac: 528c beqz.n a2, 4020cab5 <__wpa_send_eapol+0x79> +4020caae: 830c movi.n a3, 8 +4020cab0: c03320 sub a3, a3, a2 +4020cab3: 9139 s32i.n a3, a1, 36 +4020cab5: 9138 l32i.n a3, a1, 36 +4020cab7: 1c2142 l32i a4, a1, 112 +4020caba: 238b addi.n a2, a3, 8 +4020cabc: f24a add.n a15, a2, a4 +4020cabe: 000186 j 4020cac8 <__wpa_send_eapol+0x8c> +4020cac1: 020c movi.n a2, 0 +4020cac3: 1c21f2 l32i a15, a1, 112 +4020cac6: 9129 s32i.n a2, a1, 36 +4020cac8: 63cf32 addi a3, a15, 99 +4020cacb: a139 s32i.n a3, a1, 40 +4020cacd: a128 l32i.n a2, a1, 40 +4020cacf: fdbb31 l32r a3, 4020c1bc +4020cad2: 72a542 movi a4, 0x572 +4020cad5: 126152 s32i a5, a1, 72 +4020cad8: 106182 s32i a8, a1, 64 +4020cadb: 116192 s32i a9, a1, 68 +4020cade: d55c01 l32r a0, 40202050 +4020cae1: 0000c0 callx0 a0 +4020cae4: 02cd mov.n a12, a2 +4020cae6: 122152 l32i a5, a1, 72 +4020cae9: 102182 l32i a8, a1, 64 +4020caec: 112192 l32i a9, a1, 68 +4020caef: 2c1216 beqz a2, 4020cdb4 <__wpa_send_eapol+0x378> +4020caf2: a148 l32i.n a4, a1, 40 +4020caf4: b828 l32i.n a2, a8, 44 +4020caf6: f44040 extui a4, a4, 0, 16 +4020caf9: fcc432 addi a3, a4, -4 +4020cafc: 004c22 s8i a2, a12, 0 +4020caff: f43030 extui a3, a3, 0, 16 +4020cb02: 320c movi.n a2, 3 +4020cb04: 014c22 s8i a2, a12, 1 +4020cb07: 112380 slli a2, a3, 8 +4020cb0a: f42020 extui a2, a2, 0, 16 +4020cb0d: 413830 srli a3, a3, 8 +4020cb10: 202230 or a2, a2, a3 +4020cb13: 024c22 s8i a2, a12, 2 +4020cb16: 412820 srli a2, a2, 8 +4020cb19: 034c22 s8i a2, a12, 3 +4020cb1c: 632d22 l32i a2, a13, 0x18c +4020cb1f: e149 s32i.n a4, a1, 56 +4020cb21: fec232 addi a3, a2, -2 +4020cb24: 240c movi.n a4, 2 +4020cb26: fea022 movi a2, 254 +4020cb29: 832430 moveqz a2, a4, a3 +4020cb2c: 044c22 s8i a2, a12, 4 +4020cb2f: 1f2122 l32i a2, a1, 124 +4020cb32: 1e2132 l32i a3, a1, 120 +4020cb35: 209290 or a9, a2, a9 +4020cb38: 8199 s32i.n a9, a1, 32 +4020cb3a: 632d22 l32i a2, a13, 0x18c +4020cb3d: c38c beqz.n a3, 4020cb4d <__wpa_send_eapol+0x111> +4020cb3f: 0a9247 bne a2, a4, 4020cb4d <__wpa_send_eapol+0x111> +4020cb42: dd1721 l32r a2, 40203fa0 +4020cb45: 204920 or a4, a9, a2 +4020cb48: 8149 s32i.n a4, a1, 32 +4020cb4a: 0003c6 j 4020cb5d <__wpa_send_eapol+0x121> +4020cb4d: 0c2226 beqi a2, 2, 4020cb5d <__wpa_send_eapol+0x121> +4020cb50: 1d2122 l32i a2, a1, 116 +4020cb53: 8138 l32i.n a3, a1, 32 +4020cb55: 1122c0 slli a2, a2, 4 +4020cb58: 203320 or a3, a3, a2 +4020cb5b: 8139 s32i.n a3, a1, 32 +4020cb5d: 8148 l32i.n a4, a1, 32 +4020cb5f: 742840 extui a2, a4, 8, 8 +4020cb62: 054c22 s8i a2, a12, 5 +4020cb65: 064c42 s8i a4, a12, 6 +4020cb68: 458c beqz.n a5, 4020cb70 <__wpa_send_eapol+0x134> +4020cb6a: 642d32 l32i a3, a13, 0x190 +4020cb6d: 000046 j 4020cb72 <__wpa_send_eapol+0x136> +4020cb70: 4838 l32i.n a3, a8, 16 +4020cb72: 032d mov.n a2, a3 +4020cb74: 106132 s32i a3, a1, 64 +4020cb77: 0342c5 call0 4020ffa4 +4020cb7a: 742820 extui a2, a2, 8, 8 +4020cb7d: 074c22 s8i a2, a12, 7 +4020cb80: 102132 l32i a3, a1, 64 +4020cb83: 032d mov.n a2, a3 +4020cb85: 0341c5 call0 4020ffa4 +4020cb88: 084c22 s8i a2, a12, 8 +4020cb8b: 8128 l32i.n a2, a1, 32 +4020cb8d: 0762d7 bbci a2, 13, 4020cb98 <__wpa_send_eapol+0x15c> +4020cb90: 020c movi.n a2, 0 +4020cb92: 074c22 s8i a2, a12, 7 +4020cb95: 084c22 s8i a2, a12, 8 +4020cb98: 14a152 movi a5, 0x114 +4020cb9b: f0a062 movi a6, 240 +4020cb9e: 5d5a add.n a5, a13, a5 +4020cba0: 6d6a add.n a6, a13, a6 +4020cba2: 2528 l32i.n a2, a5, 8 +4020cba4: 053d mov.n a3, a5 +4020cba6: 5529 s32i.n a2, a5, 20 +4020cba8: 840c movi.n a4, 8 +4020cbaa: 25cb addi.n a2, a5, 12 +4020cbac: 126152 s32i a5, a1, 72 +4020cbaf: 106162 s32i a6, a1, 64 +4020cbb2: d11801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cbb5: 0000c0 callx0 a0 +4020cbb8: 122152 l32i a5, a1, 72 +4020cbbb: 102162 l32i a6, a1, 64 +4020cbbe: f4c552 addi a5, a5, -12 +4020cbc1: dd9657 bne a6, a5, 4020cba2 <__wpa_send_eapol+0x166> +4020cbc4: fca052 movi a5, 252 +4020cbc7: 5d5a add.n a5, a13, a5 +4020cbc9: 202550 or a2, a5, a5 +4020cbcc: 08a032 movi a3, 8 +4020cbcf: 126152 s32i a5, a1, 72 +4020cbd2: 031105 call0 4020fce4 +4020cbd5: 122152 l32i a5, a1, 72 +4020cbd8: 840c movi.n a4, 8 +4020cbda: 053d mov.n a3, a5 +4020cbdc: 2c9b addi.n a2, a12, 9 +4020cbde: d10d01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cbe1: 0000c0 callx0 a0 +4020cbe4: 120c movi.n a2, 1 +4020cbe6: 416d22 s32i a2, a13, 0x104 +4020cbe9: ce8c beqz.n a14, 4020cbf9 <__wpa_send_eapol+0x1bd> +4020cbeb: 042c movi.n a4, 32 +4020cbed: 203ee0 or a3, a14, a14 +4020cbf0: 11cc22 addi a2, a12, 17 +4020cbf3: d10801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cbf6: 0000c0 callx0 a0 +4020cbf9: f138 l32i.n a3, a1, 60 +4020cbfb: 938c beqz.n a3, 4020cc08 <__wpa_send_eapol+0x1cc> +4020cbfd: 840c movi.n a4, 8 +4020cbff: 41cc22 addi a2, a12, 65 +4020cc02: d10401 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cc05: 0000c0 callx0 a0 +4020cc08: b148 l32i.n a4, a1, 44 +4020cc0a: 030c movi.n a3, 0 +4020cc0c: 120c movi.n a2, 1 +4020cc0e: 832340 moveqz a2, a3, a4 +4020cc11: 1e2132 l32i a3, a1, 120 +4020cc14: 742020 extui a2, a2, 0, 8 +4020cc17: d3dc bnez.n a3, 4020cc38 <__wpa_send_eapol+0x1fc> +4020cc19: b29c beqz.n a2, 4020cc38 <__wpa_send_eapol+0x1fc> +4020cc1b: 1c2142 l32i a4, a1, 112 +4020cc1e: b138 l32i.n a3, a1, 44 +4020cc20: 63cc22 addi a2, a12, 99 +4020cc23: d0fc01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cc26: 0000c0 callx0 a0 +4020cc29: 1c2142 l32i a4, a1, 112 +4020cc2c: 742840 extui a2, a4, 8, 8 +4020cc2f: 614c22 s8i a2, a12, 97 +4020cc32: 624c42 s8i a4, a12, 98 +4020cc35: 003bc6 j 4020cd28 <__wpa_send_eapol+0x2ec> +4020cc38: c138 l32i.n a3, a1, 48 +4020cc3a: 0ea316 beqz a3, 4020cd28 <__wpa_send_eapol+0x2ec> +4020cc3d: 0e7216 beqz a2, 4020cd28 <__wpa_send_eapol+0x2ec> +4020cc40: fd5f31 l32r a3, 4020c1bc +4020cc43: 9ea542 movi a4, 0x59e +4020cc46: 0f2d mov.n a2, a15 +4020cc48: d50201 l32r a0, 40202050 +4020cc4b: 0000c0 callx0 a0 +4020cc4e: 02ed mov.n a14, a2 +4020cc50: a0a542 movi a4, 0x5a0 +4020cc53: 151216 beqz a2, 4020cda8 <__wpa_send_eapol+0x36c> +4020cc56: 1c2142 l32i a4, a1, 112 +4020cc59: b138 l32i.n a3, a1, 44 +4020cc5b: d0ee01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cc5e: 0000c0 callx0 a0 +4020cc61: 1c2142 l32i a4, a1, 112 +4020cc64: 9138 l32i.n a3, a1, 36 +4020cc66: 2e4a add.n a2, a14, a4 +4020cc68: 438c beqz.n a3, 4020cc70 <__wpa_send_eapol+0x234> +4020cc6a: ddaf32 movi a3, -35 +4020cc6d: 004232 s8i a3, a2, 0 +4020cc70: 0d2142 l32i a4, a1, 52 +4020cc73: 3624f6 bgeui a4, 2, 4020ccad <__wpa_send_eapol+0x271> +4020cc76: ffcf22 addi a2, a15, -1 +4020cc79: f8cf32 addi a3, a15, -8 +4020cc7c: a33230 movltz a3, a2, a3 +4020cc7f: bca022 movi a2, 188 +4020cc82: 63cc52 addi a5, a12, 99 +4020cc85: 204ee0 or a4, a14, a14 +4020cc88: 213330 srai a3, a3, 3 +4020cc8b: 2d2a add.n a2, a13, a2 +4020cc8d: f43885 call0 40201018 +4020cc90: 07d216 beqz a2, 4020cd11 <__wpa_send_eapol+0x2d5> +4020cc93: fd4a31 l32r a3, 4020c1bc +4020cc96: b0a542 movi a4, 0x5b0 +4020cc99: 0c2d mov.n a2, a12 +4020cc9b: d21b01 l32r a0, 40201508 +4020cc9e: 0000c0 callx0 a0 +4020cca1: b1a542 movi a4, 0x5b1 +4020cca4: fd4631 l32r a3, 4020c1bc +4020cca7: 0e2d mov.n a2, a14 +4020cca9: 004046 j 4020cdae <__wpa_send_eapol+0x372> +4020ccac: 1d3800 excw +4020ccaf: 31cc52 addi a5, a12, 49 +4020ccb2: 041c movi.n a4, 16 +4020ccb4: 052d mov.n a2, a5 +4020ccb6: 34c332 addi a3, a3, 52 +4020ccb9: 126152 s32i a5, a1, 72 +4020ccbc: d0d601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ccbf: 0000c0 callx0 a0 +4020ccc2: 1d28 l32i.n a2, a13, 4 +4020ccc4: 032c movi.n a3, 32 +4020ccc6: 24c222 addi a2, a2, 36 +4020ccc9: 030185 call0 4020fce4 +4020cccc: 122152 l32i a5, a1, 72 +4020cccf: 041c movi.n a4, 16 +4020ccd1: 053d mov.n a3, a5 +4020ccd3: 012d mov.n a2, a1 +4020ccd5: d0cf01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ccd8: 0000c0 callx0 a0 +4020ccdb: 041c movi.n a4, 16 +4020ccdd: bca032 movi a3, 188 +4020cce0: 3d3a add.n a3, a13, a3 +4020cce2: 214a add.n a2, a1, a4 +4020cce4: d0cc01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cce7: 0000c0 callx0 a0 +4020ccea: 63cc52 addi a5, a12, 99 +4020cced: 0f4d mov.n a4, a15 +4020ccef: 0e3d mov.n a3, a14 +4020ccf1: 202550 or a2, a5, a5 +4020ccf4: 126152 s32i a5, a1, 72 +4020ccf7: d0c701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ccfa: 0000c0 callx0 a0 +4020ccfd: 122152 l32i a5, a1, 72 +4020cd00: 0f6d mov.n a6, a15 +4020cd02: 00a142 movi a4, 0x100 +4020cd05: 20a032 movi a3, 32 +4020cd08: 202110 or a2, a1, a1 +4020cd0b: ff4b01 l32r a0, 4020ca38 +4020cd0e: 0000c0 callx0 a0 +4020cd11: 7428f0 extui a2, a15, 8, 8 +4020cd14: fd2a31 l32r a3, 4020c1bc +4020cd17: 614c22 s8i a2, a12, 97 +4020cd1a: 624cf2 s8i a15, a12, 98 +4020cd1d: c0a542 movi a4, 0x5c0 +4020cd20: 0e2d mov.n a2, a14 +4020cd22: d1f901 l32r a0, 40201508 +4020cd25: 0000c0 callx0 a0 +4020cd28: 8128 l32i.n a2, a1, 32 +4020cd2a: 1a6287 bbci a2, 8, 4020cd48 <__wpa_send_eapol+0x30c> +4020cd2d: 3b2d22 l32i a2, a13, 236 +4020cd30: c8a542 movi a4, 0x5c8 +4020cd33: 071216 beqz a2, 4020cda8 <__wpa_send_eapol+0x36c> +4020cd36: aca022 movi a2, 172 +4020cd39: a158 l32i.n a5, a1, 40 +4020cd3b: 1f2132 l32i a3, a1, 124 +4020cd3e: 51cc62 addi a6, a12, 81 +4020cd41: 0c4d mov.n a4, a12 +4020cd43: 2d2a add.n a2, a13, a2 +4020cd45: 027185 call0 4020f460 +4020cd48: d38721 l32r a2, 40201b64 +4020cd4b: 040c movi.n a4, 0 +4020cd4d: 5228 l32i.n a2, a2, 20 +4020cd4f: 00a132 movi a3, 0x100 +4020cd52: 0228 l32i.n a2, a2, 0 +4020cd54: 8129 s32i.n a2, a1, 32 +4020cd56: 320c movi.n a2, 3 +4020cd58: 1c0b85 call0 40228e14 +4020cd5b: 12f8 l32i.n a15, a2, 4 +4020cd5d: 02ed mov.n a14, a2 +4020cd5f: 640c movi.n a4, 6 +4020cd61: 3d8b addi.n a3, a13, 8 +4020cd63: 0f2d mov.n a2, a15 +4020cd65: d0ab01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cd68: 0000c0 callx0 a0 +4020cd6b: 8128 l32i.n a2, a1, 32 +4020cd6d: 640c movi.n a4, 6 +4020cd6f: 33c232 addi a3, a2, 51 +4020cd72: 2f4a add.n a2, a15, a4 +4020cd74: d0a801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cd77: 0000c0 callx0 a0 +4020cd7a: 88af22 movi a2, -120 +4020cd7d: 0c4f22 s8i a2, a15, 12 +4020cd80: 8eaf22 movi a2, -114 +4020cd83: 0d4f22 s8i a2, a15, 13 +4020cd86: 1e28 l32i.n a2, a14, 4 +4020cd88: a148 l32i.n a4, a1, 40 +4020cd8a: 0c3d mov.n a3, a12 +4020cd8c: 0ec222 addi a2, a2, 14 +4020cd8f: d0a101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020cd92: 0000c0 callx0 a0 +4020cd95: e138 l32i.n a3, a1, 56 +4020cd97: 23eb addi.n a2, a3, 14 +4020cd99: 055e22 s16i a2, a14, 10 +4020cd9c: 082122 l32i a2, a1, 32 +4020cd9f: 203ee0 or a3, a14, a14 +4020cda2: f55e45 call0 40202388 +4020cda5: d3a542 movi a4, 0x5d3 +4020cda8: fd0531 l32r a3, 4020c1bc +4020cdab: 202cc0 or a2, a12, a12 +4020cdae: d1d601 l32r a0, 40201508 +4020cdb1: 0000c0 callx0 a0 +4020cdb4: 1b2102 l32i a0, a1, 108 +4020cdb7: 1a21c2 l32i a12, a1, 104 +4020cdba: 1921d2 l32i a13, a1, 100 +4020cdbd: 1821e2 l32i a14, a1, 96 +4020cdc0: 1721f2 l32i a15, a1, 92 +4020cdc3: 70c112 addi a1, a1, 112 +4020cdc6: f00d ret.n +4020cdc8: dacc bnez.n a10, 4020cdd9 <__wpa_send_eapol+0x39d> +4020cdca: e04020 subx4 a4, a0, a2 +4020cdcd: 401062 l16ui a6, a0, 128 +4020cdd0: c0c112 addi a1, a1, -64 +4020cdd3: e1c9 s32i.n a12, a1, 56 +4020cdd5: d1d9 s32i.n a13, a1, 52 +4020cdd7: b1f9 s32i.n a15, a1, 44 +4020cdd9: 8d0c movi.n a13, 8 +4020cddb: f109 s32i.n a0, a1, 60 +4020cddd: c1e9 s32i.n a14, a1, 48 +4020cddf: 02fd mov.n a15, a2 +4020cde1: 03cd mov.n a12, a3 +4020cde3: 10d4d0 and a13, a4, a13 +4020cde6: 09b316 beqz a3, 4020ce85 <__wpa_send_eapol+0x449> +4020cde9: 020c movi.n a2, 0 +4020cdeb: 3129 s32i.n a2, a1, 12 +4020cded: 122122 l32i a2, a1, 72 +4020cdf0: 4149 s32i.n a4, a1, 16 +4020cdf2: 2129 s32i.n a2, a1, 8 +4020cdf4: 112122 l32i a2, a1, 68 +4020cdf7: e8a3e2 movi a14, 0x3e8 +4020cdfa: 1129 s32i.n a2, a1, 4 +4020cdfc: 102122 l32i a2, a1, 64 +4020cdff: 0129 s32i.n a2, a1, 0 +4020ce01: 0f2d mov.n a2, a15 +4020ce03: ffc385 call0 4020ca3c <__wpa_send_eapol> +4020ce06: bc38 l32i.n a3, a12, 44 +4020ce08: cc28 l32i.n a2, a12, 48 +4020ce0a: 042182 l32i a8, a1, 16 +4020ce0d: 9323d0 movnez a2, a3, a13 +4020ce10: 0e1266 bnei a2, 1, 4020ce22 <__wpa_send_eapol+0x3e6> +4020ce13: 112f32 l32i a3, a15, 68 +4020ce16: 008316 beqz a3, 4020ce22 <__wpa_send_eapol+0x3e6> +4020ce19: f4a132 movi a3, 0x1f4 +4020ce1c: 64a0e2 movi a14, 100 +4020ce1f: 83e3d0 moveqz a14, a3, a13 +4020ce22: 7d8c beqz.n a13, 4020ce2d <__wpa_send_eapol+0x3f1> +4020ce24: 051266 bnei a2, 1, 4020ce2d <__wpa_send_eapol+0x3f1> +4020ce27: 02e887 bbsi a8, 8, 4020ce2d <__wpa_send_eapol+0x3f1> +4020ce2a: 666c22 s32i a2, a12, 0x198 +4020ce2d: e8a332 movi a3, 0x3e8 +4020ce30: 0e2d mov.n a2, a14 +4020ce32: ffe601 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +4020ce35: 0000c0 callx0 a0 +4020ce38: 11d2b0 slli a13, a2, 5 +4020ce3b: c0dd20 sub a13, a13, a2 +4020ce3e: a0dd20 addx4 a13, a13, a2 +4020ce41: e8a332 movi a3, 0x3e8 +4020ce44: 0e2d mov.n a2, a14 +4020ce46: d37401 l32r a0, 40201c18 +4020ce49: 0000c0 callx0 a0 +4020ce4c: fe1141 l32r a4, 4020c690 +4020ce4f: 11ddd0 slli a13, a13, 3 +4020ce52: 0f5d mov.n a5, a15 +4020ce54: 203dd0 or a3, a13, a13 +4020ce57: 206cc0 or a6, a12, a12 +4020ce5a: 0326c5 call0 402100c8 +4020ce5d: e27bd1 l32r a13, 4020584c +4020ce60: 0d2d mov.n a2, a13 +4020ce62: dc5601 l32r a0, 40203fbc +4020ce65: 0000c0 callx0 a0 +4020ce68: 672c42 l32i a4, a12, 0x19c +4020ce6b: ffd731 l32r a3, 4020cdc8 <__wpa_send_eapol+0x38c> +4020ce6e: 0d2d mov.n a2, a13 +4020ce70: dd5101 l32r a0, 402043b4 +4020ce73: 0000c0 callx0 a0 +4020ce76: 150c movi.n a5, 1 +4020ce78: 040c movi.n a4, 0 +4020ce7a: e8a332 movi a3, 0x3e8 +4020ce7d: 0d2d mov.n a2, a13 +4020ce7f: dc4e01 l32r a0, 40203fb8 +4020ce82: 0000c0 callx0 a0 +4020ce85: f108 l32i.n a0, a1, 60 +4020ce87: e1c8 l32i.n a12, a1, 56 +4020ce89: d1d8 l32i.n a13, a1, 52 +4020ce8b: c1e8 l32i.n a14, a1, 48 +4020ce8d: b1f8 l32i.n a15, a1, 44 +4020ce8f: 40c112 addi a1, a1, 64 +4020ce92: f00d ret.n +4020ce94: 0040a1 l32r a10, 401ccf94 <_lit4_end+0xc6c68> +4020ce97: c11200 mul16u a1, a2, a0 +4020ce9a: 61c2c0 xsr.eps2 a12 +4020ce9d: 0e .byte 0xe +4020ce9e: 01d232 addmi a3, a2, 0x100 +4020cea1: 0f6102 s32i a0, a1, 60 +4020cea4: 740342 l8ui a4, a3, 116 +4020cea7: 20c220 or a12, a2, a2 +4020ceaa: 120c movi.n a2, 1 +4020ceac: 202420 or a2, a4, a2 +4020ceaf: 744322 s8i a2, a3, 116 +4020ceb2: 720c movi.n a2, 7 +4020ceb4: 4c29 s32i.n a2, a12, 16 +4020ceb6: 020c movi.n a2, 0 +4020ceb8: 586c22 s32i a2, a12, 0x160 +4020cebb: dc29 s32i.n a2, a12, 52 +4020cebd: bc28 l32i.n a2, a12, 44 +4020cebf: 221b addi.n a2, a2, 1 +4020cec1: bc29 s32i.n a2, a12, 44 +4020cec3: 7352e6 bgei a2, 5, 4020cf3a <__wpa_send_eapol+0x4fe> +4020cec6: 632c32 l32i a3, a12, 0x18c +4020cec9: 020c movi.n a2, 0 +4020cecb: 027d mov.n a7, a2 +4020cecd: 512366 bnei a3, 2, 4020cf22 <__wpa_send_eapol+0x4e6> +4020ced0: 652c32 l32i a3, a12, 0x194 +4020ced3: fff041 l32r a4, 4020ce94 <__wpa_send_eapol+0x458> +4020ced6: 480347 bnone a3, a4, 4020cf22 <__wpa_send_eapol+0x4e6> +4020ced9: ddaf22 movi a2, -35 +4020cedc: 104122 s8i a2, a1, 16 +4020cedf: 421c movi.n a2, 20 +4020cee1: 114122 s8i a2, a1, 17 +4020cee4: 020c movi.n a2, 0 +4020cee6: 124122 s8i a2, a1, 18 +4020cee9: f20c movi.n a2, 15 +4020ceeb: 134122 s8i a2, a1, 19 +4020ceee: acaf22 movi a2, -84 +4020cef1: 144122 s8i a2, a1, 20 +4020cef4: 420c movi.n a2, 4 +4020cef6: 80c372 addi a7, a3, -128 +4020cef9: 154122 s8i a2, a1, 21 +4020cefc: 7faf22 movi a2, -129 +4020ceff: 102720 and a2, a7, a2 +4020cf02: 030c movi.n a3, 0 +4020cf04: 0c48 l32i.n a4, a12, 0 +4020cf06: 170c movi.n a7, 1 +4020cf08: 937320 movnez a7, a3, a2 +4020cf0b: 8ca022 movi a2, 140 +4020cf0e: 2c2a add.n a2, a12, a2 +4020cf10: 16c162 addi a6, a1, 22 +4020cf13: 5c8b addi.n a5, a12, 8 +4020cf15: 58c442 addi a4, a4, 88 +4020cf18: 032c movi.n a3, 32 +4020cf1a: 026b45 call0 4020f5d0 +4020cf1d: 621c movi.n a2, 22 +4020cf1f: 10c172 addi a7, a1, 16 +4020cf22: 00a052 movi a5, 0 +4020cf25: 006122 s32i a2, a1, 0 +4020cf28: 002c22 l32i a2, a12, 0 +4020cf2b: 2159 s32i.n a5, a1, 8 +4020cf2d: 1159 s32i.n a5, a1, 4 +4020cf2f: 4ccc62 addi a6, a12, 76 +4020cf32: 88a042 movi a4, 136 +4020cf35: 0c3d mov.n a3, a12 +4020cf37: ffe985 call0 4020cdd0 <__wpa_send_eapol+0x394> +4020cf3a: f108 l32i.n a0, a1, 60 +4020cf3c: e1c8 l32i.n a12, a1, 56 +4020cf3e: 40c112 addi a1, a1, 64 +4020cf41: f00d ret.n +4020cf43: 085b00 excw +4020cf46: 9e0000 excw +4020cf49: 0008 l32i.n a0, a0, 0 +4020cf4b: c11200 mul16u a1, a2, a0 +4020cf4e: 61d280 xsr.excsave2 a8 +4020cf51: e21d excw +4020cf53: 321c61 l32r a6, 401d97c4 <_lit4_end+0xd3498> +4020cf56: 0201d2 l8ui a13, a1, 2 +4020cf59: c21f61 l32r a6, 401fd7d8 <_lit4_end+0xf74ac> +4020cf5c: f21e61 l32r a6, 402097d4 +4020cf5f: 421b61 l32r a6, 401dd7cc <_lit4_end+0xd74a0> +4020cf62: ed7403 excw +4020cf65: 12d802 addmi a0, a8, 0x1200 +4020cf68: 120c movi.n a2, 1 +4020cf6a: 202420 or a2, a4, a2 +4020cf6d: 744322 s8i a2, a3, 116 +4020cf70: a20c movi.n a2, 10 +4020cf72: 4e29 s32i.n a2, a14, 16 +4020cf74: 020c movi.n a2, 0 +4020cf76: de29 s32i.n a2, a14, 52 +4020cf78: be28 l32i.n a2, a14, 44 +4020cf7a: 221b addi.n a2, a2, 1 +4020cf7c: be29 s32i.n a2, a14, 44 +4020cf7e: 0252a6 blti a2, 5, 4020cf84 <__wpa_send_eapol+0x548> +4020cf81: 004ac6 j 4020d0b0 <__wpa_send_eapol+0x674> +4020cf84: 030c movi.n a3, 0 +4020cf86: 840c movi.n a4, 8 +4020cf88: 30c122 addi a2, a1, 48 +4020cf8b: d02101 l32r a0, 40201010 <_irom0_text_start> +4020cf8e: 0000c0 callx0 a0 +4020cf91: 0e28 l32i.n a2, a14, 0 +4020cf93: 632e32 l32i a3, a14, 0x18c +4020cf96: 142262 l32i a6, a2, 80 +4020cf99: 1522b2 l32i a11, a2, 84 +4020cf9c: 201366 bnei a3, 1, 4020cfc0 <__wpa_send_eapol+0x584> +4020cf9f: 1228 l32i.n a2, a2, 4 +4020cfa1: 6c6217 bbci a2, 1, 4020d011 <__wpa_send_eapol+0x5d5> +4020cfa4: 010622 l8ui a2, a6, 1 +4020cfa7: 222b addi.n a2, a2, 2 +4020cfa9: 64a2b7 bge a2, a11, 4020d011 <__wpa_send_eapol+0x5d5> +4020cfac: 000642 l8ui a4, a6, 0 +4020cfaf: 033c movi.n a3, 48 +4020cfb1: 5c9437 bne a4, a3, 4020d011 <__wpa_send_eapol+0x5d5> +4020cfb4: 662a add.n a6, a6, a2 +4020cfb6: 0106b2 l8ui a11, a6, 1 +4020cfb9: bb2b addi.n a11, a11, 2 +4020cfbb: 001486 j 4020d011 <__wpa_send_eapol+0x5d5> +4020cfbe: 660000 excw +4020cfc1: c24d23 excw +4020cfc4: 062d mov.n a2, a6 +4020cfc6: 122222 l32i a2, a2, 72 +4020cfc9: 02ccc2 addi a12, a12, 2 +4020cfcc: 11ccb0 slli a12, a12, 5 +4020cfcf: 80cdc0 add a12, a13, a12 +4020cfd2: cc8b addi.n a12, a12, 8 +4020cfd4: 5d78 l32i.n a7, a13, 20 +4020cfd6: e29c beqz.n a2, 4020cff8 <__wpa_send_eapol+0x5bc> +4020cfd8: 073d mov.n a3, a7 +4020cfda: 10c122 addi a2, a1, 16 +4020cfdd: 136162 s32i a6, a1, 76 +4020cfe0: 156172 s32i a7, a1, 84 +4020cfe3: 1461b2 s32i a11, a1, 80 +4020cfe6: 026dc5 call0 4020f6c4 +4020cfe9: 132162 l32i a6, a1, 76 +4020cfec: 152172 l32i a7, a1, 84 +4020cfef: 1421b2 l32i a11, a1, 80 +4020cff2: 0ba296 bltz a2, 4020d0b0 <__wpa_send_eapol+0x674> +4020cff5: 10c1c2 addi a12, a1, 16 +4020cff8: 6dd8 l32i.n a13, a13, 24 +4020cffa: 1f0c movi.n a15, 1 +4020cffc: 30c122 addi a2, a1, 48 +4020cfff: 1061d2 s32i a13, a1, 64 +4020d002: 1161f2 s32i a15, a1, 68 +4020d005: 126122 s32i a2, a1, 72 +4020d008: ac9c beqz.n a12, 4020d026 <__wpa_send_eapol+0x5ea> +4020d00a: 278b addi.n a2, a7, 8 +4020d00c: 22ba add.n a2, a2, a11 +4020d00e: 000586 j 4020d028 <__wpa_send_eapol+0x5ec> +4020d011: 5d2e22 l32i a2, a14, 0x174 +4020d014: 0f0c movi.n a15, 0 +4020d016: 042520 extui a2, a2, 5, 1 +4020d019: 116122 s32i a2, a1, 68 +4020d01c: 1061f2 s32i a15, a1, 64 +4020d01f: 0f7d mov.n a7, a15 +4020d021: 0fcd mov.n a12, a15 +4020d023: 1261f2 s32i a15, a1, 72 +4020d026: 0b2d mov.n a2, a11 +4020d028: ffc741 l32r a4, 4020cf44 <__wpa_send_eapol+0x508> +4020d02b: fc6431 l32r a3, 4020c1bc +4020d02e: 050c movi.n a5, 0 +4020d030: 136162 s32i a6, a1, 76 +4020d033: 1461b2 s32i a11, a1, 80 +4020d036: 156172 s32i a7, a1, 84 +4020d039: d13201 l32r a0, 40201504 +4020d03c: 0000c0 callx0 a0 +4020d03f: 02dd mov.n a13, a2 +4020d041: 132162 l32i a6, a1, 76 +4020d044: 1421b2 l32i a11, a1, 80 +4020d047: 065216 beqz a2, 4020d0b0 <__wpa_send_eapol+0x674> +4020d04a: 0b4d mov.n a4, a11 +4020d04c: 063d mov.n a3, a6 +4020d04e: cff101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020d051: 0000c0 callx0 a0 +4020d054: 1421b2 l32i a11, a1, 80 +4020d057: 152172 l32i a7, a1, 84 +4020d05a: 2dba add.n a2, a13, a11 +4020d05c: 9c9c beqz.n a12, 4020d079 <__wpa_send_eapol+0x63d> +4020d05e: 102142 l32i a4, a1, 64 +4020d061: 0c6d mov.n a6, a12 +4020d063: 143040 extui a3, a4, 0, 2 +4020d066: 384132 s8i a3, a1, 56 +4020d069: 030c movi.n a3, 0 +4020d06b: 394132 s8i a3, a1, 57 +4020d06e: fbfd31 l32r a3, 4020c064 +4020d071: 250c movi.n a5, 2 +4020d073: 38c142 addi a4, a1, 56 +4020d076: fee405 call0 4020beb8 +4020d079: 102132 l32i a3, a1, 64 +4020d07c: 0ec8 l32i.n a12, a14, 0 +4020d07e: 1139 s32i.n a3, a1, 4 +4020d080: c022d0 sub a2, a2, a13 +4020d083: 112132 l32i a3, a1, 68 +4020d086: 0129 s32i.n a2, a1, 0 +4020d088: 122152 l32i a5, a1, 72 +4020d08b: c8a122 movi a2, 0x1c8 +4020d08e: c8a342 movi a4, 0x3c8 +4020d091: 834230 moveqz a4, a2, a3 +4020d094: 21f9 s32i.n a15, a1, 8 +4020d096: 0e3d mov.n a3, a14 +4020d098: 0c2d mov.n a2, a12 +4020d09a: 0d7d mov.n a7, a13 +4020d09c: 4cce62 addi a6, a14, 76 +4020d09f: ffd305 call0 4020cdd0 <__wpa_send_eapol+0x394> +4020d0a2: ffa941 l32r a4, 4020cf48 <__wpa_send_eapol+0x50c> +4020d0a5: fc4531 l32r a3, 4020c1bc +4020d0a8: 0d2d mov.n a2, a13 +4020d0aa: d11701 l32r a0, 40201508 +4020d0ad: 0000c0 callx0 a0 +4020d0b0: 1f2102 l32i a0, a1, 124 +4020d0b3: 80a092 movi a9, 128 +4020d0b6: 1e21c2 l32i a12, a1, 120 +4020d0b9: 1d21d2 l32i a13, a1, 116 +4020d0bc: 1c21e2 l32i a14, a1, 112 +4020d0bf: 1b21f2 l32i a15, a1, 108 +4020d0c2: 119a add.n a1, a1, a9 +4020d0c4: f00d ret.n +4020d0c6: 830000 moveqz a0, a0, a0 +4020d0c9: 0009 s32i.n a0, a0, 0 +4020d0cb: 099800 excw +4020d0ce: 120000 excw +4020d0d1: d2a0c1 l32r a12, 40201b54 +4020d0d4: e21561 l32r a6, 40205928 +4020d0d7: 321461 l32r a6, 401d9928 <_lit4_end+0xd35fc> +4020d0da: 0201d2 l8ui a13, a1, 2 +4020d0dd: c21761 l32r a6, 401fd93c <_lit4_end+0xf7610> +4020d0e0: f21661 l32r a6, 40209938 +4020d0e3: 421361 l32r a6, 401dd930 <_lit4_end+0xd7604> +4020d0e6: dd7403 excw +4020d0e9: 12e802 excw +4020d0ec: 120c movi.n a2, 1 +4020d0ee: 202420 or a2, a4, a2 +4020d0f1: 744322 s8i a2, a3, 116 +4020d0f4: 120c movi.n a2, 1 +4020d0f6: 5d29 s32i.n a2, a13, 20 +4020d0f8: cd28 l32i.n a2, a13, 48 +4020d0fa: 221b addi.n a2, a2, 1 +4020d0fc: 0c6d22 s32i a2, a13, 48 +4020d0ff: 0252a6 blti a2, 5, 4020d105 <__wpa_send_eapol+0x6c9> +4020d102: 0030c6 j 4020d1c9 <__wpa_send_eapol+0x78d> +4020d105: 632d32 l32i a3, a13, 0x18c +4020d108: 00a022 movi a2, 0 +4020d10b: 021366 bnei a3, 1, 4020d111 <__wpa_send_eapol+0x6d5> +4020d10e: 576d22 s32i a2, a13, 0x15c +4020d111: dd29 s32i.n a2, a13, 52 +4020d113: 840c movi.n a4, 8 +4020d115: 030c movi.n a3, 0 +4020d117: 30c122 addi a2, a1, 48 +4020d11a: cfbd01 l32r a0, 40201010 <_irom0_text_start> +4020d11d: 0000c0 callx0 a0 +4020d120: 6ec8 l32i.n a12, a14, 24 +4020d122: 0d28 l32i.n a2, a13, 0 +4020d124: cc2b addi.n a12, a12, 2 +4020d126: 11ccb0 slli a12, a12, 5 +4020d129: 122222 l32i a2, a2, 72 +4020d12c: ceca add.n a12, a14, a12 +4020d12e: cc8b addi.n a12, a12, 8 +4020d130: c28c beqz.n a2, 4020d140 <__wpa_send_eapol+0x704> +4020d132: 5e38 l32i.n a3, a14, 20 +4020d134: 10c122 addi a2, a1, 16 +4020d137: 0258c5 call0 4020f6c4 +4020d13a: 08b296 bltz a2, 4020d1c9 <__wpa_send_eapol+0x78d> +4020d13d: 10c1c2 addi a12, a1, 16 +4020d140: 632d32 l32i a3, a13, 0x18c +4020d143: 5e28 l32i.n a2, a14, 20 +4020d145: 372366 bnei a3, 2, 4020d180 <__wpa_send_eapol+0x744> +4020d148: ffe041 l32r a4, 4020d0c8 <__wpa_send_eapol+0x68c> +4020d14b: fc1c31 l32r a3, 4020c1bc +4020d14e: 050c movi.n a5, 0 +4020d150: 228b addi.n a2, a2, 8 +4020d152: d0ec01 l32r a0, 40201504 +4020d155: 0000c0 callx0 a0 +4020d158: 02fd mov.n a15, a2 +4020d15a: 06b216 beqz a2, 4020d1c9 <__wpa_send_eapol+0x78d> +4020d15d: 6e28 l32i.n a2, a14, 24 +4020d15f: 5e78 l32i.n a7, a14, 20 +4020d161: 142020 extui a2, a2, 0, 2 +4020d164: 384122 s8i a2, a1, 56 +4020d167: fbbf31 l32r a3, 4020c064 +4020d16a: 020c movi.n a2, 0 +4020d16c: 394122 s8i a2, a1, 57 +4020d16f: 0c6d mov.n a6, a12 +4020d171: 250c movi.n a5, 2 +4020d173: 38c142 addi a4, a1, 56 +4020d176: 202ff0 or a2, a15, a15 +4020d179: fed3c5 call0 4020beb8 +4020d17c: 000186 j 4020d186 <__wpa_send_eapol+0x74a> +4020d17f: 2c2000 excw +4020d182: fcc080 excw +4020d185: a03220 addx4 a3, a2, a2 +4020d188: 213901 l32r a0, 401d566c <_lit4_end+0xcf340> +4020d18b: 6e38 l32i.n a3, a14, 24 +4020d18d: 3e2d42 l32i a4, a13, 248 +4020d190: 1139 s32i.n a3, a1, 4 +4020d192: c032f0 sub a3, a2, a15 +4020d195: 0d88 l32i.n a8, a13, 0 +4020d197: 0139 s32i.n a3, a1, 0 +4020d199: 80a322 movi a2, 0x380 +4020d19c: c0a332 movi a3, 0x3c0 +4020d19f: 832340 moveqz a2, a3, a4 +4020d1a2: a8a062 movi a6, 168 +4020d1a5: 024d mov.n a4, a2 +4020d1a7: 0f7d mov.n a7, a15 +4020d1a9: 082d mov.n a2, a8 +4020d1ab: 6e6a add.n a6, a14, a6 +4020d1ad: 30c152 addi a5, a1, 48 +4020d1b0: 0d3d mov.n a3, a13 +4020d1b2: ffc1c5 call0 4020cdd0 <__wpa_send_eapol+0x394> +4020d1b5: 632d22 l32i a2, a13, 0x18c +4020d1b8: 0d2266 bnei a2, 2, 4020d1c9 <__wpa_send_eapol+0x78d> +4020d1bb: ffc441 l32r a4, 4020d0cc <__wpa_send_eapol+0x690> +4020d1be: fbff31 l32r a3, 4020c1bc +4020d1c1: 0f2d mov.n a2, a15 +4020d1c3: d0d101 l32r a0, 40201508 +4020d1c6: 0000c0 callx0 a0 +4020d1c9: 172102 l32i a0, a1, 92 +4020d1cc: 1621c2 l32i a12, a1, 88 +4020d1cf: 1521d2 l32i a13, a1, 84 +4020d1d2: 1421e2 l32i a14, a1, 80 +4020d1d5: 1321f2 l32i a15, a1, 76 +4020d1d8: 60c112 addi a1, a1, 96 +4020d1db: f00d ret.n +4020d1dd: 000000 ill +4020d1e0: 20d690 or a13, a6, a9 +4020d1e3: 40 .byte 0x40 + +4020d1e4 : +4020d1e4: f0c112 addi a1, a1, -16 +4020d1e7: 036102 s32i a0, a1, 12 +4020d1ea: 0261c2 s32i a12, a1, 8 +4020d1ed: 11d9 s32i.n a13, a1, 4 +4020d1ef: 0c0c movi.n a12, 0 +4020d1f1: 02dd mov.n a13, a2 +4020d1f3: 3b62c2 s32i a12, a2, 236 +4020d1f6: aca022 movi a2, 172 +4020d1f9: 0c3d mov.n a3, a12 +4020d1fb: 044c movi.n a4, 64 +4020d1fd: 802d20 add a2, a13, a2 +4020d200: cf8401 l32r a0, 40201010 <_irom0_text_start> +4020d203: 0000c0 callx0 a0 +4020d206: 0c6d mov.n a6, a12 +4020d208: 0c5d mov.n a5, a12 +4020d20a: 0c4d mov.n a4, a12 +4020d20c: 3d8b addi.n a3, a13, 8 +4020d20e: 0c2d mov.n a2, a12 +4020d210: ff2905 call0 4020c4a4 +4020d213: 0d38 l32i.n a3, a13, 0 +4020d215: fff221 l32r a2, 4020d1e0 <__wpa_send_eapol+0x7a4> +4020d218: 3c6dc2 s32i a12, a13, 240 +4020d21b: 0d4d mov.n a4, a13 +4020d21d: 02ea45 call0 402100c4 +4020d220: 3108 l32i.n a0, a1, 12 +4020d222: 21c8 l32i.n a12, a1, 8 +4020d224: 11d8 l32i.n a13, a1, 4 +4020d226: 10c112 addi a1, a1, 16 +4020d229: f00d ret.n +4020d22b: c11200 mul16u a1, a2, a0 +4020d22e: 21c9f0 srai a12, a15, 9 +4020d231: 3109 s32i.n a0, a1, 12 +4020d233: 02cd mov.n a12, a2 +4020d235: 01d222 addmi a2, a2, 0x100 +4020d238: 740242 l8ui a4, a2, 116 +4020d23b: 130c movi.n a3, 1 +4020d23d: 203430 or a3, a4, a3 +4020d240: 744232 s8i a3, a2, 116 +4020d243: 030c movi.n a3, 0 +4020d245: 4c39 s32i.n a3, a12, 16 +4020d247: 6c38 l32i.n a3, a12, 24 +4020d249: 938c beqz.n a3, 4020d256 +4020d24b: 740242 l8ui a4, a2, 116 +4020d24e: e37c movi.n a3, -2 +4020d250: 103430 and a3, a4, a3 +4020d253: 744232 s8i a3, a2, 116 +4020d256: 020c movi.n a2, 0 +4020d258: 3d6c22 s32i a2, a12, 244 +4020d25b: 122c22 l32i a2, a12, 72 +4020d25e: 628c beqz.n a2, 4020d268 +4020d260: 1c38 l32i.n a3, a12, 4 +4020d262: 3328 l32i.n a2, a3, 12 +4020d264: 220b addi.n a2, a2, -1 +4020d266: 3329 s32i.n a2, a3, 12 +4020d268: 020c movi.n a2, 0 +4020d26a: 632c32 l32i a3, a12, 0x18c +4020d26d: 126c22 s32i a2, a12, 72 +4020d270: 021366 bnei a3, 1, 4020d276 +4020d273: 576c22 s32i a2, a12, 0x15c +4020d276: 120c movi.n a2, 1 +4020d278: 3e6c22 s32i a2, a12, 248 +4020d27b: 0c2d mov.n a2, a12 +4020d27d: fff645 call0 4020d1e4 +4020d280: 3108 l32i.n a0, a1, 12 +4020d282: 020c movi.n a2, 0 +4020d284: bc29 s32i.n a2, a12, 44 +4020d286: 21c8 l32i.n a12, a1, 8 +4020d288: 10c112 addi a1, a1, 16 +4020d28b: f00d ret.n +4020d28d: 000000 ill +4020d290: e0c112 addi a1, a1, -32 +4020d293: 61c9 s32i.n a12, a1, 24 +4020d295: 7109 s32i.n a0, a1, 28 +4020d297: 51d9 s32i.n a13, a1, 20 +4020d299: 41e9 s32i.n a14, a1, 16 +4020d29b: 31f9 s32i.n a15, a1, 12 +4020d29d: 02cd mov.n a12, a2 +4020d29f: 52cc bnez.n a2, 4020d2a8 +4020d2a1: 020c movi.n a2, 0 +4020d2a3: 00edc6 j 4020d65e +4020d2a6: 220000 excw +4020d2a9: 175d22 s16i a2, a13, 46 +4020d2ac: d2f2e2 excw +4020d2af: 01dc bnez.n a1, 4020d2c3 +4020d2b1: 740d32 l8ui a3, a13, 116 +4020d2b4: 220c movi.n a2, 2 +4020d2b6: 202320 or a2, a3, a2 +4020d2b9: cca0e2 movi a14, 204 +4020d2bc: 744d22 s8i a2, a13, 116 +4020d2bf: ecea add.n a14, a12, a14 +4020d2c1: 5d2c22 l32i a2, a12, 0x174 +4020d2c4: 1d6227 bbci a2, 2, 4020d2e5 +4020d2c7: 740d32 l8ui a3, a13, 116 +4020d2ca: fdaf22 movi a2, -3 +4020d2cd: 102320 and a2, a3, a2 +4020d2d0: 744d22 s8i a2, a13, 116 +4020d2d3: 5d2c22 l32i a2, a12, 0x174 +4020d2d6: c76227 bbci a2, 2, 4020d2a1 +4020d2d9: 202cc0 or a2, a12, a12 +4020d2dc: feee05 call0 4020c1c0 +4020d2df: 01a022 movi a2, 1 +4020d2e2: 00de06 j 4020d65e +4020d2e5: 740d32 l8ui a3, a13, 116 +4020d2e8: e27c movi.n a2, -2 +4020d2ea: 102320 and a2, a3, a2 +4020d2ed: 744d22 s8i a2, a13, 116 +4020d2f0: 0c28 l32i.n a2, a12, 0 +4020d2f2: 040c movi.n a4, 0 +4020d2f4: 0238 l32i.n a3, a2, 0 +4020d2f6: 326342 s32i a4, a3, 200 +4020d2f9: 6c38 l32i.n a3, a12, 24 +4020d2fb: 021347 beq a3, a4, 4020d301 +4020d2fe: 003586 j 4020d3d8 +4020d301: ac38 l32i.n a3, a12, 40 +4020d303: 11d356 bnez a3, 4020d424 +4020d306: 7c38 l32i.n a3, a12, 28 +4020d308: 0b5356 bnez a3, 4020d3c1 +4020d30b: 8c38 l32i.n a3, a12, 32 +4020d30d: 83ac beqz.n a3, 4020d339 +4020d30f: 740d32 l8ui a3, a13, 116 +4020d312: 120c movi.n a2, 1 +4020d314: 202320 or a2, a3, a2 +4020d317: 744d22 s8i a2, a13, 116 +4020d31a: 320c movi.n a2, 3 +4020d31c: 4c29 s32i.n a2, a12, 16 +4020d31e: aca022 movi a2, 172 +4020d321: 044c movi.n a4, 64 +4020d323: 030c movi.n a3, 0 +4020d325: 2c2a add.n a2, a12, a2 +4020d327: cf3a01 l32r a0, 40201010 <_irom0_text_start> +4020d32a: 0000c0 callx0 a0 +4020d32d: 020c movi.n a2, 0 +4020d32f: 3b6c22 s32i a2, a12, 236 +4020d332: 8c29 s32i.n a2, a12, 32 +4020d334: 008246 j 4020d541 +4020d337: 380000 excw +4020d33a: ac9c beqz.n a12, 4020d358 +4020d33c: 0d4293 excw +4020d33f: a03274 excw +4020d342: 343001 l32r a0, 401da404 <_lit4_end+0xd40d8> +4020d345: 4d3220 excw +4020d348: a03274 excw +4020d34b: 4c3904 excw +4020d34e: 012c32 l32i a3, a12, 4 +4020d351: ff2dc5 call0 4020c630 +4020d354: 032c movi.n a3, 32 +4020d356: 4ccc22 addi a2, a12, 76 +4020d359: 023685 call0 4020f6c4 +4020d35c: 1e1256 bnez a2, 4020d541 +4020d35f: 020c movi.n a2, 0 +4020d361: 9c29 s32i.n a2, a12, 36 +4020d363: 004306 j 4020d473 +4020d366: 320000 excw +4020d369: 582c movi.n a8, 37 +4020d36b: 938c beqz.n a3, 4020d378 +4020d36d: 0c2d mov.n a2, a12 +4020d36f: ffb285 call0 4020ce98 <__wpa_send_eapol+0x45c> +4020d372: 0072c6 j 4020d541 +4020d375: 000000 ill +4020d378: 4c38 l32i.n a3, a12, 16 +4020d37a: 025366 bnei a3, 5, 4020d380 +4020d37d: 0028c6 j 4020d424 +4020d380: 1563f6 bgeui a3, 6, 4020d399 +4020d383: 512326 beqi a3, 2, 4020d3d8 +4020d386: 0633f6 bgeui a3, 3, 4020d390 +4020d389: 341326 beqi a3, 1, 4020d3c1 +4020d38c: 006c46 j 4020d541 +4020d38f: 332600 excw +4020d392: 26a9 s32i.n a10, a6, 8 +4020d394: c64943 excw +4020d397: 0069 s32i.n a6, a0, 0 +4020d399: 028366 bnei a3, 8, 4020d39f +4020d39c: 002f46 j 4020d45d +4020d39f: 820c movi.n a2, 8 +4020d3a1: 0b3237 bltu a2, a3, 4020d3b0 +4020d3a4: 726326 beqi a3, 6, 4020d41a +4020d3a7: 027366 bnei a3, 7, 4020d3ad +4020d3aa: 002306 j 4020d43a +4020d3ad: 006406 j 4020d541 +4020d3b0: 920c movi.n a2, 9 +4020d3b2: 029327 bne a3, a2, 4020d3b8 +4020d3b5: 0060c6 j 4020d53c +4020d3b8: 029366 bnei a3, 10, 4020d3be +4020d3bb: 003346 j 4020d48c +4020d3be: 005fc6 j 4020d541 +4020d3c1: 740d32 l8ui a3, a13, 116 +4020d3c4: 120c movi.n a2, 1 +4020d3c6: 202320 or a2, a3, a2 +4020d3c9: 744d22 s8i a2, a13, 116 +4020d3cc: 220c movi.n a2, 2 +4020d3ce: 4c29 s32i.n a2, a12, 16 +4020d3d0: 020c movi.n a2, 0 +4020d3d2: 7c29 s32i.n a2, a12, 28 +4020d3d4: 005a46 j 4020d541 +4020d3d7: 0c2d00 excw +4020d3da: ffe505 call0 4020d22c +4020d3dd: 005806 j 4020d541 +4020d3e0: 652c22 l32i a2, a12, 0x194 +4020d3e3: 028a85 call0 4020fc8c +4020d3e6: 157216 beqz a2, 4020d541 +4020d3e9: 740d32 l8ui a3, a13, 116 +4020d3ec: 01a022 movi a2, 1 +4020d3ef: 202320 or a2, a3, a2 +4020d3f2: 744d22 s8i a2, a13, 116 +4020d3f5: 06a022 movi a2, 6 +4020d3f8: 4c29 s32i.n a2, a12, 16 +4020d3fa: 030c movi.n a3, 0 +4020d3fc: 2c8b addi.n a2, a12, 8 +4020d3fe: ff26c5 call0 4020c66c +4020d401: d28c beqz.n a2, 4020d412 +4020d403: 023d mov.n a3, a2 +4020d405: 8ca022 movi a2, 140 +4020d408: 042c movi.n a4, 32 +4020d40a: 2c2a add.n a2, a12, a2 +4020d40c: cf0201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020d40f: 0000c0 callx0 a0 +4020d412: 020c movi.n a2, 0 +4020d414: 606c22 s32i a2, a12, 0x180 +4020d417: 004986 j 4020d541 +4020d41a: 030c movi.n a3, 0 +4020d41c: 2c8b addi.n a2, a12, 8 +4020d41e: ff24c5 call0 4020c66c +4020d421: f48256 bnez a2, 4020d36d +4020d424: 740d32 l8ui a3, a13, 116 +4020d427: 120c movi.n a2, 1 +4020d429: 202320 or a2, a3, a2 +4020d42c: 744d22 s8i a2, a13, 116 +4020d42f: 120c movi.n a2, 1 +4020d431: 4c29 s32i.n a2, a12, 16 +4020d433: 020c movi.n a2, 0 +4020d435: ac29 s32i.n a2, a12, 40 +4020d437: 004186 j 4020d541 +4020d43a: ec28 l32i.n a2, a12, 56 +4020d43c: 029c beqz.n a2, 4020d450 +4020d43e: 102c22 l32i a2, a12, 64 +4020d441: b2cc bnez.n a2, 4020d450 +4020d443: fc28 l32i.n a2, a12, 60 +4020d445: 007216 beqz a2, 4020d450 +4020d448: 0c2d mov.n a2, a12 +4020d44a: ff2485 call0 4020c694 +4020d44d: 003c06 j 4020d541 +4020d450: bc28 l32i.n a2, a12, 44 +4020d452: ce52e6 bgei a2, 5, 4020d424 +4020d455: dc28 l32i.n a2, a12, 52 +4020d457: f12256 bnez a2, 4020d36d +4020d45a: 0038c6 j 4020d541 +4020d45d: 112c22 l32i a2, a12, 68 +4020d460: 429c beqz.n a2, 4020d478 +4020d462: 740d32 l8ui a3, a13, 116 +4020d465: 120c movi.n a2, 1 +4020d467: 202320 or a2, a3, a2 +4020d46a: 744d22 s8i a2, a13, 116 +4020d46d: 920c movi.n a2, 9 +4020d46f: 4c29 s32i.n a2, a12, 16 +4020d471: 020c movi.n a2, 0 +4020d473: bc29 s32i.n a2, a12, 44 +4020d475: 003206 j 4020d541 +4020d478: ec28 l32i.n a2, a12, 56 +4020d47a: fd7216 beqz a2, 4020d455 +4020d47d: 102c22 l32i a2, a12, 64 +4020d480: fd1256 bnez a2, 4020d455 +4020d483: fc28 l32i.n a2, a12, 60 +4020d485: fbf256 bnez a2, 4020d448 +4020d488: fff246 j 4020d455 +4020d48b: 2c2200 excw +4020d48e: 675d excw +4020d490: 28b5e2 excw +4020d493: 16ec bnez.n a6, 4020d4b8 +4020d495: 220982 l8ui a8, a9, 34 +4020d498: 102c movi.n a0, 33 +4020d49a: 092256 bnez a2, 4020d530 +4020d49d: fc28 l32i.n a2, a12, 60 +4020d49f: 08d216 beqz a2, 4020d530 +4020d4a2: 112c22 l32i a2, a12, 68 +4020d4a5: 087216 beqz a2, 4020d530 +4020d4a8: 740d32 l8ui a3, a13, 116 +4020d4ab: 120c movi.n a2, 1 +4020d4ad: 202320 or a2, a3, a2 +4020d4b0: 744d22 s8i a2, a13, 116 +4020d4b3: b20c movi.n a2, 11 +4020d4b5: 4c29 s32i.n a2, a12, 16 +4020d4b7: 020c movi.n a2, 0 +4020d4b9: ec29 s32i.n a2, a12, 56 +4020d4bb: 3e2c22 l32i a2, a12, 248 +4020d4be: 042216 beqz a2, 4020d504 +4020d4c1: 642c22 l32i a2, a12, 0x190 +4020d4c4: 02b085 call0 4020ffd0 +4020d4c7: 02fd mov.n a15, a2 +4020d4c9: 642c22 l32i a2, a12, 0x190 +4020d4cc: 02ad45 call0 4020ffa4 +4020d4cf: 026d mov.n a6, a2 +4020d4d1: 0e5d mov.n a5, a14 +4020d4d3: 040c movi.n a4, 0 +4020d4d5: 3c8b addi.n a3, a12, 8 +4020d4d7: 0f2d mov.n a2, a15 +4020d4d9: fefc85 call0 4020c4a4 +4020d4dc: 061256 bnez a2, 4020d541 +4020d4df: 0c38 l32i.n a3, a12, 0 +4020d4e1: 120c movi.n a2, 1 +4020d4e3: 3c6c22 s32i a2, a12, 240 +4020d4e6: 8328 l32i.n a2, a3, 32 +4020d4e8: 829c beqz.n a2, 4020d504 +4020d4ea: ff3df1 l32r a15, 4020d1e0 <__wpa_send_eapol+0x7a4> +4020d4ed: 0c4d mov.n a4, a12 +4020d4ef: 202ff0 or a2, a15, a15 +4020d4f2: 02bd05 call0 402100c4 +4020d4f5: 0c28 l32i.n a2, a12, 0 +4020d4f7: 0c6d mov.n a6, a12 +4020d4f9: 025d mov.n a5, a2 +4020d4fb: 8228 l32i.n a2, a2, 32 +4020d4fd: 0f4d mov.n a4, a15 +4020d4ff: 030c movi.n a3, 0 +4020d501: 02bc45 call0 402100c8 +4020d504: 632c32 l32i a3, a12, 0x18c +4020d507: 120c movi.n a2, 1 +4020d509: 079327 bne a3, a2, 4020d514 +4020d50c: 576c22 s32i a2, a12, 0x15c +4020d50f: 000106 j 4020d517 +4020d512: 220000 excw +4020d515: 596c movi.n a9, -27 +4020d517: d19321 l32r a2, 40201b64 +4020d51a: 130c movi.n a3, 1 +4020d51c: 5228 l32i.n a2, a2, 20 +4020d51e: 242222 l32i a2, a2, 144 +4020d521: 2248 l32i.n a4, a2, 8 +4020d523: 203430 or a3, a4, a3 +4020d526: 2239 s32i.n a3, a2, 8 +4020d528: 030c movi.n a3, 0 +4020d52a: 184232 s8i a3, a2, 24 +4020d52d: 000406 j 4020d541 +4020d530: bc28 l32i.n a2, a12, 44 +4020d532: 0252a6 blti a2, 5, 4020d538 +4020d535: ffbac6 j 4020d424 +4020d538: dc28 l32i.n a2, a12, 52 +4020d53a: 328c beqz.n a2, 4020d541 +4020d53c: 0c2d mov.n a2, a12 +4020d53e: ffa0c5 call0 4020cf4c <__wpa_send_eapol+0x510> +4020d541: 5d2c22 l32i a2, a12, 0x174 +4020d544: 026227 bbci a2, 2, 4020d54a +4020d547: ff5f06 j 4020d2c7 +4020d54a: 6c38 l32i.n a3, a12, 24 +4020d54c: 43cc bnez.n a3, 4020d554 +4020d54e: 5a2c22 l32i a2, a12, 0x168 +4020d551: 027216 beqz a2, 4020d57c +4020d554: 740d42 l8ui a4, a13, 116 +4020d557: 120c movi.n a2, 1 +4020d559: 202420 or a2, a4, a2 +4020d55c: 744d22 s8i a2, a13, 116 +4020d55f: 020c movi.n a2, 0 +4020d561: 5c29 s32i.n a2, a12, 20 +4020d563: 0a1327 beq a3, a2, 4020d571 +4020d566: 740d32 l8ui a3, a13, 116 +4020d569: e27c movi.n a2, -2 +4020d56b: 102320 and a2, a3, a2 +4020d56e: 744d22 s8i a2, a13, 116 +4020d571: 020c movi.n a2, 0 +4020d573: cc29 s32i.n a2, a12, 48 +4020d575: 5a6c22 s32i a2, a12, 0x168 +4020d578: 002f06 j 4020d638 +4020d57b: 5c2800 excw +4020d57e: 2e1226 beqi a2, 1, 4020d5b0 +4020d581: f28c beqz.n a2, 4020d594 +4020d583: 022266 bnei a2, 2, 4020d589 +4020d586: 002686 j 4020d624 +4020d589: 023266 bnei a2, 3, 4020d58f +4020d58c: 002506 j 4020d624 +4020d58f: 002946 j 4020d638 +4020d592: 220000 excw +4020d595: 122c movi.n a2, 33 +4020d597: d2cc bnez.n a2, 4020d5a8 +4020d599: 632c22 l32i a2, a12, 0x18c +4020d59c: 021226 beqi a2, 1, 4020d5a2 +4020d59f: 002546 j 4020d638 +4020d5a2: 572c22 l32i a2, a12, 0x15c +4020d5a5: 08f216 beqz a2, 4020d638 +4020d5a8: 0c2d mov.n a2, a12 +4020d5aa: ffb245 call0 4020d0d0 <__wpa_send_eapol+0x694> +4020d5ad: 0021c6 j 4020d638 +4020d5b0: ec28 l32i.n a2, a12, 56 +4020d5b2: b2bc beqz.n a2, 4020d5f1 +4020d5b4: 102c22 l32i a2, a12, 64 +4020d5b7: 62fc bnez.n a2, 4020d5f1 +4020d5b9: fc28 l32i.n a2, a12, 60 +4020d5bb: 22fc bnez.n a2, 4020d5f1 +4020d5bd: 112c22 l32i a2, a12, 68 +4020d5c0: d2ac beqz.n a2, 4020d5f1 +4020d5c2: 740d32 l8ui a3, a13, 116 +4020d5c5: 120c movi.n a2, 1 +4020d5c7: 202320 or a2, a3, a2 +4020d5ca: 744d22 s8i a2, a13, 116 +4020d5cd: 220c movi.n a2, 2 +4020d5cf: 5c29 s32i.n a2, a12, 20 +4020d5d1: 020c movi.n a2, 0 +4020d5d3: ec29 s32i.n a2, a12, 56 +4020d5d5: 122c22 l32i a2, a12, 72 +4020d5d8: 628c beqz.n a2, 4020d5e2 +4020d5da: 1c38 l32i.n a3, a12, 4 +4020d5dc: 3328 l32i.n a2, a3, 12 +4020d5de: 220b addi.n a2, a2, -1 +4020d5e0: 3329 s32i.n a2, a3, 12 +4020d5e2: 020c movi.n a2, 0 +4020d5e4: 126c22 s32i a2, a12, 72 +4020d5e7: cc29 s32i.n a2, a12, 48 +4020d5e9: 120c movi.n a2, 1 +4020d5eb: 596c22 s32i a2, a12, 0x164 +4020d5ee: 001186 j 4020d638 +4020d5f1: cc28 l32i.n a2, a12, 48 +4020d5f3: 2752a6 blti a2, 5, 4020d61e +4020d5f6: 740d32 l8ui a3, a13, 116 +4020d5f9: 120c movi.n a2, 1 +4020d5fb: 202320 or a2, a3, a2 +4020d5fe: 744d22 s8i a2, a13, 116 +4020d601: 320c movi.n a2, 3 +4020d603: 5c29 s32i.n a2, a12, 20 +4020d605: 122c22 l32i a2, a12, 72 +4020d608: 628c beqz.n a2, 4020d612 +4020d60a: 1c38 l32i.n a3, a12, 4 +4020d60c: 3328 l32i.n a2, a3, 12 +4020d60e: 220b addi.n a2, a2, -1 +4020d610: 3329 s32i.n a2, a3, 12 +4020d612: 020c movi.n a2, 0 +4020d614: 126c22 s32i a2, a12, 72 +4020d617: 120c movi.n a2, 1 +4020d619: ac29 s32i.n a2, a12, 40 +4020d61b: 000646 j 4020d638 +4020d61e: dc28 l32i.n a2, a12, 52 +4020d620: ffe046 j 4020d5a5 +4020d623: 0d3200 excw +4020d626: a02274 excw +4020d629: 232001 l32r a0, 401d62ac <_lit4_end+0xcff80> +4020d62c: 4d2220 excw +4020d62f: a02274 excw +4020d632: 6c2200 excw +4020d635: cc2905 call0 401d98c8 <_lit4_end+0xd359c> +4020d638: 5d2c22 l32i a2, a12, 0x174 +4020d63b: 026227 bbci a2, 2, 4020d641 +4020d63e: ff2146 j 4020d2c7 +4020d641: 0c28 l32i.n a2, a12, 0 +4020d643: 1c38 l32i.n a3, a12, 4 +4020d645: ff16c5 call0 4020c7b4 +4020d648: 5d2c22 l32i a2, a12, 0x174 +4020d64b: 026207 bbci a2, 0, 4020d651 +4020d64e: ff1bc6 j 4020d2c1 +4020d651: 0c28 l32i.n a2, a12, 0 +4020d653: 0228 l32i.n a2, a2, 0 +4020d655: 322222 l32i a2, a2, 200 +4020d658: c65256 bnez a2, 4020d2c1 +4020d65b: ff1a06 j 4020d2c7 +4020d65e: 7108 l32i.n a0, a1, 28 +4020d660: 61c8 l32i.n a12, a1, 24 +4020d662: 51d8 l32i.n a13, a1, 20 +4020d664: 41e8 l32i.n a14, a1, 16 +4020d666: 31f8 l32i.n a15, a1, 12 +4020d668: 20c112 addi a1, a1, 32 +4020d66b: f00d ret.n +4020d66d: 000000 ill +4020d670: f0c112 addi a1, a1, -16 +4020d673: 036102 s32i a0, a1, 12 +4020d676: 202330 or a2, a3, a3 +4020d679: 00a032 movi a3, 0 +4020d67c: 666232 s32i a3, a2, 0x198 +4020d67f: 130c movi.n a3, 1 +4020d681: d239 s32i.n a3, a2, 52 +4020d683: ffc0c5 call0 4020d290 +4020d686: 3108 l32i.n a0, a1, 12 +4020d688: 10c112 addi a1, a1, 16 +4020d68b: f00d ret.n +4020d68d: 000000 ill +4020d690: f0c112 addi a1, a1, -16 +4020d693: 3109 s32i.n a0, a1, 12 +4020d695: 032d mov.n a2, a3 +4020d697: 838c beqz.n a3, 4020d6a3 +4020d699: 130c movi.n a3, 1 +4020d69b: 586232 s32i a3, a2, 0x160 +4020d69e: 030c movi.n a3, 0 +4020d6a0: 3b6232 s32i a3, a2, 236 +4020d6a3: ffbec5 call0 4020d290 +4020d6a6: 3108 l32i.n a0, a1, 12 +4020d6a8: 10c112 addi a1, a1, 16 +4020d6ab: f00d ret.n +4020d6ad: 000000 ill + +4020d6b0 : +4020d6b0: f0c112 addi a1, a1, -16 +4020d6b3: 21c9 s32i.n a12, a1, 8 +4020d6b5: 024d mov.n a4, a2 +4020d6b7: 3109 s32i.n a0, a1, 12 +4020d6b9: 11d9 s32i.n a13, a1, 4 +4020d6bb: 03cd mov.n a12, a3 +4020d6bd: f27c movi.n a2, -1 +4020d6bf: 04f416 beqz a4, 4020d712 +4020d6c2: 1428 l32i.n a2, a4, 4 +4020d6c4: 048216 beqz a2, 4020d710 +4020d6c7: 045316 beqz a3, 4020d710 +4020d6ca: 5d2322 l32i a2, a3, 0x174 +4020d6cd: 176237 bbci a2, 3, 4020d6e8 +4020d6d0: fca022 movi a2, 252 +4020d6d3: 043c movi.n a4, 48 +4020d6d5: 030c movi.n a3, 0 +4020d6d7: 802c20 add a2, a12, a2 +4020d6da: ce4d01 l32r a0, 40201010 <_irom0_text_start> +4020d6dd: 0000c0 callx0 a0 +4020d6e0: 120c movi.n a2, 1 +4020d6e2: 9c29 s32i.n a2, a12, 36 +4020d6e4: 000806 j 4020d708 +4020d6e7: d33200 excw +4020d6ea: 034201 l32r a0, 401ce3f4 <_lit4_end+0xc80c8> +4020d6ed: 820c74 excw +4020d6f0: 202420 or a2, a4, a2 +4020d6f3: 744322 s8i a2, a3, 116 +4020d6f6: 1d0c movi.n a13, 1 +4020d6f8: 6cd9 s32i.n a13, a12, 24 +4020d6fa: 0c2d mov.n a2, a12 +4020d6fc: ffb905 call0 4020d290 +4020d6ff: 0f12d7 beq a2, a13, 4020d712 +4020d702: 020c movi.n a2, 0 +4020d704: 6c29 s32i.n a2, a12, 24 +4020d706: 8cd9 s32i.n a13, a12, 32 +4020d708: 0c2d mov.n a2, a12 +4020d70a: ffb845 call0 4020d290 +4020d70d: 000046 j 4020d712 +4020d710: f27c movi.n a2, -1 +4020d712: 3108 l32i.n a0, a1, 12 +4020d714: 21c8 l32i.n a12, a1, 8 +4020d716: 11d8 l32i.n a13, a1, 4 +4020d718: 10c112 addi a1, a1, 16 +4020d71b: f00d ret.n +4020d71d: 000000 ill +4020d720: 002800 excw +4020d723: 080000 excw + ... + +4020d728 : +4020d728: 90c112 addi a1, a1, -112 +4020d72b: 1861e2 s32i a14, a1, 96 +4020d72e: 1761f2 s32i a15, a1, 92 +4020d731: 1b6102 s32i a0, a1, 108 +4020d734: 1a61c2 s32i a12, a1, 104 +4020d737: 1961d2 s32i a13, a1, 100 +4020d73a: e129 s32i.n a2, a1, 56 +4020d73c: d159 s32i.n a5, a1, 52 +4020d73e: 03fd mov.n a15, a3 +4020d740: 04ed mov.n a14, a4 +4020d742: 36f216 beqz a2, 4020dab5 +4020d745: 1238 l32i.n a3, a2, 4 +4020d747: 040c movi.n a4, 0 +4020d749: 120c movi.n a2, 1 +4020d74b: 834230 moveqz a4, a2, a3 +4020d74e: 043d mov.n a3, a4 +4020d750: 62a042 movi a4, 98 +4020d753: 01b457 bgeu a4, a5, 4020d758 +4020d756: 020c movi.n a2, 0 +4020d758: 202320 or a2, a3, a2 +4020d75b: 026207 bbci a2, 0, 4020d761 +4020d75e: 00d4c6 j 4020dab5 +4020d761: 350f16 beqz a15, 4020dab5 +4020d764: 050ec2 l8ui a12, a14, 5 +4020d767: 620e32 l8ui a3, a14, 98 +4020d76a: 112c80 slli a2, a12, 8 +4020d76d: 060ec2 l8ui a12, a14, 6 +4020d770: 20cc20 or a12, a12, a2 +4020d773: 610e22 l8ui a2, a14, 97 +4020d776: 112280 slli a2, a2, 8 +4020d779: 203320 or a3, a3, a2 +4020d77c: c139 s32i.n a3, a1, 48 +4020d77e: d138 l32i.n a3, a1, 52 +4020d780: c148 l32i.n a4, a1, 48 +4020d782: 9dc322 addi a2, a3, -99 +4020d785: 02b247 bgeu a2, a4, 4020d78b +4020d788: 00ca46 j 4020dab5 +4020d78b: 632f32 l32i a3, a15, 0x18c +4020d78e: 040e22 l8ui a2, a14, 4 +4020d791: 0f2366 bnei a3, 2, 4020d7a4 +4020d794: 152226 beqi a2, 2, 4020d7ad +4020d797: 02af32 movi a3, -254 +4020d79a: 223a add.n a2, a2, a3 +4020d79c: 315256 bnez a2, 4020dab5 +4020d79f: 000286 j 4020d7ad +4020d7a2: 320000 excw +4020d7a5: 37fea0 excw +4020d7a8: c60212 l8ui a1, a2, 198 +4020d7ab: 2100c1 l32r a12, 401d5bac <_lit4_end+0xcf880> +4020d7ae: ffdc bnez.n a15, 4020d7d1 +4020d7b0: 103c20 and a3, a12, a2 +4020d7b3: f42020 extui a2, a2, 0, 16 +4020d7b6: 0e9327 bne a3, a2, 4020d7c8 +4020d7b9: 042ac0 extui a2, a12, 10, 1 +4020d7bc: 430c movi.n a3, 4 +4020d7be: 6d0c movi.n a13, 6 +4020d7c0: 83d320 moveqz a13, a3, a2 +4020d7c3: 001246 j 4020d810 +4020d7c6: d70000 excw +4020d7c9: 15ec bnez.n a5, 4020d7ee +4020d7cb: 3d0c movi.n a13, 3 +4020d7cd: 17ecb7 bbsi a12, 11, 4020d7e8 +4020d7d0: 2d0c movi.n a13, 2 +4020d7d2: 126c37 bbci a12, 3, 4020d7e8 +4020d7d5: c158 l32i.n a5, a1, 48 +4020d7d7: 020c movi.n a2, 0 +4020d7d9: 1d0c movi.n a13, 1 +4020d7db: 93d250 movnez a13, a2, a5 +4020d7de: 000186 j 4020d7e8 +4020d7e1: 5d0c movi.n a13, 5 +4020d7e3: 000a46 j 4020d810 +4020d7e6: 220000 excw +4020d7e9: 2f .byte 0x2f +4020d7ea: 050c64 excw +4020d7ed: f8c242 addi a4, a2, -8 +4020d7f0: 160c movi.n a6, 1 +4020d7f2: 053d mov.n a3, a5 +4020d7f4: 833640 moveqz a3, a6, a4 +4020d7f7: 034d mov.n a4, a3 +4020d7f9: c0c232 addi a3, a2, -64 +4020d7fc: 052d mov.n a2, a5 +4020d7fe: 832630 moveqz a2, a6, a3 +4020d801: 202420 or a2, a4, a2 +4020d804: 081257 beq a2, a5, 4020d810 +4020d807: 2420c0 extui a2, a12, 0, 3 +4020d80a: 022226 beqi a2, 2, 4020d810 +4020d80d: 00a906 j 4020dab5 +4020d810: ffc521 l32r a2, 4020d724 +4020d813: 102c20 and a2, a12, a2 +4020d816: f129 s32i.n a2, a1, 60 +4020d818: e29c beqz.n a2, 4020d83a +4020d81a: 602f22 l32i a2, a15, 0x180 +4020d81d: b2ac beqz.n a2, 4020d84c +4020d81f: 75a132 movi a3, 0x175 +4020d822: 840c movi.n a4, 8 +4020d824: 803f30 add a3, a15, a3 +4020d827: 09ce22 addi a2, a14, 9 +4020d82a: d0fc01 l32r a0, 40201c1c +4020d82d: 0000c0 callx0 a0 +4020d830: 0212e6 bgei a2, 1, 4020d836 +4020d833: 009f86 j 4020dab5 +4020d836: 000486 j 4020d84c +4020d839: 5e9b00 excw +4020d83c: fca022 movi a2, 252 +4020d83f: 053d mov.n a3, a5 +4020d841: 802f20 add a2, a15, a2 +4020d844: 106152 s32i a5, a1, 64 +4020d847: febcc5 call0 4020c414 +4020d84a: 629c beqz.n a2, 4020d864 +4020d84c: 022d26 beqi a13, 2, 4020d852 +4020d84f: 008986 j 4020da79 +4020d852: 5f28 l32i.n a2, a15, 20 +4020d854: 021226 beqi a2, 1, 4020d85a +4020d857: 009686 j 4020dab5 +4020d85a: 3b2f22 l32i a2, a15, 236 +4020d85d: 254216 beqz a2, 4020dab5 +4020d860: 002906 j 4020d908 +4020d863: dd5600 excw +4020d866: a15224 excw +4020d869: 5a2c movi.n a10, 37 +4020d86b: 5f .byte 0x5f +4020d86c: 102132 l32i a3, a1, 64 +4020d86f: 052d mov.n a2, a5 +4020d871: 116152 s32i a5, a1, 68 +4020d874: feb9c5 call0 4020c414 +4020d877: 112152 l32i a5, a1, 68 +4020d87a: 22f216 beqz a2, 4020daad +4020d87d: 4f28 l32i.n a2, a15, 16 +4020d87f: 029226 beqi a2, 10, 4020d885 +4020d882: 0089c6 j 4020daad +4020d885: 20a042 movi a4, 32 +4020d888: 11ce32 addi a3, a14, 17 +4020d88b: 6ccf22 addi a2, a15, 108 +4020d88e: d0e301 l32r a0, 40201c1c +4020d891: 0000c0 callx0 a0 +4020d894: 112152 l32i a5, a1, 68 +4020d897: 212216 beqz a2, 4020daad +4020d89a: 01df32 addmi a3, a15, 0x100 +4020d89d: 740342 l8ui a4, a3, 116 +4020d8a0: 024c movi.n a2, 64 +4020d8a2: 202420 or a2, a4, a2 +4020d8a5: 744322 s8i a2, a3, 116 +4020d8a8: 102132 l32i a3, a1, 64 +4020d8ab: 052d mov.n a2, a5 +4020d8ad: feba85 call0 4020c458 +4020d8b0: 042f32 l32i a3, a15, 16 +4020d8b3: f9c322 addi a2, a3, -7 +4020d8b6: 0222b6 bltui a2, 2, 4020d8bc +4020d8b9: 0071c6 j 4020da84 +4020d8bc: 012f22 l32i a2, a15, 4 +4020d8bf: 342222 l32i a2, a2, 208 +4020d8c2: 1ef256 bnez a2, 4020dab5 +4020d8c5: 0c2132 l32i a3, a1, 48 +4020d8c8: 014d mov.n a4, a1 +4020d8ca: 63ce22 addi a2, a14, 99 +4020d8cd: fe79c5 call0 4020c06c +4020d8d0: 1e1296 bltz a2, 4020dab5 +4020d8d3: 2158 l32i.n a5, a1, 8 +4020d8d5: 3168 l32i.n a6, a1, 12 +4020d8d7: 25cc bnez.n a5, 4020d8dd +4020d8d9: 0158 l32i.n a5, a1, 0 +4020d8db: 1168 l32i.n a6, a1, 4 +4020d8dd: 632f32 l32i a3, a15, 0x18c +4020d8e0: 020c movi.n a2, 0 +4020d8e2: 132366 bnei a3, 2, 4020d8f9 +4020d8e5: 652f22 l32i a2, a15, 0x194 +4020d8e8: dfaf32 movi a3, -33 +4020d8eb: e0c222 addi a2, a2, -32 +4020d8ee: 103230 and a3, a2, a3 +4020d8f1: 140c movi.n a4, 1 +4020d8f3: 00a022 movi a2, 0 +4020d8f6: 832430 moveqz a2, a4, a3 +4020d8f9: 612f32 l32i a3, a15, 0x184 +4020d8fc: 1b5316 beqz a3, 4020dab5 +4020d8ff: 622f42 l32i a4, a15, 0x188 +4020d902: 01bac5 call0 4020f4b0 +4020d905: 1ac256 bnez a2, 4020dab5 +4020d908: 026c77 bbci a12, 7, 4020d90e +4020d90b: 006986 j 4020dab5 +4020d90e: 02ec87 bbsi a12, 8, 4020d914 +4020d911: 006806 j 4020dab5 +4020d914: 020c movi.n a2, 0 +4020d916: 116f22 s32i a2, a15, 68 +4020d919: 3b2f22 l32i a2, a15, 236 +4020d91c: 0a8216 beqz a2, 4020d9c8 +4020d91f: 5d2f22 l32i a2, a15, 0x174 +4020d922: 026267 bbci a2, 6, 4020d928 +4020d925: 0027c6 j 4020d9c8 +4020d928: aca022 movi a2, 172 +4020d92b: d148 l32i.n a4, a1, 52 +4020d92d: 0e3d mov.n a3, a14 +4020d92f: 2f2a add.n a2, a15, a2 +4020d931: fea505 call0 4020c384 +4020d934: 17d256 bnez a2, 4020dab5 +4020d937: 150c movi.n a5, 1 +4020d939: e138 l32i.n a3, a1, 56 +4020d93b: fb5521 l32r a2, 4020c690 +4020d93e: 116f52 s32i a5, a15, 68 +4020d941: 0f4d mov.n a4, a15 +4020d943: 116152 s32i a5, a1, 68 +4020d946: 0277c5 call0 402100c4 +4020d949: dfc021 l32r a2, 4020584c +4020d94c: d99c01 l32r a0, 40203fbc +4020d94f: 0000c0 callx0 a0 +4020d952: 020c movi.n a2, 0 +4020d954: f148 l32i.n a4, a1, 60 +4020d956: 666f22 s32i a2, a15, 0x198 +4020d959: 112152 l32i a5, a1, 68 +4020d95c: 6d1427 beq a4, a2, 4020d9cd +4020d95f: 112f22 l32i a2, a15, 68 +4020d962: 14f216 beqz a2, 4020dab5 +4020d965: 75a122 movi a2, 0x175 +4020d968: 606f52 s32i a5, a15, 0x180 +4020d96b: 840c movi.n a4, 8 +4020d96d: 3e9b addi.n a3, a14, 9 +4020d96f: 802f20 add a2, a15, a2 +4020d972: cda801 l32r a0, 40201014 <_irom0_text_start+0x4> +4020d975: 0000c0 callx0 a0 +4020d978: 026d66 bnei a13, 6, 4020d97e +4020d97b: 004d86 j 4020dab5 +4020d97e: 0f6ca7 bbci a12, 10, 4020d991 +4020d981: 120c movi.n a2, 1 +4020d983: 586f22 s32i a2, a15, 0x160 +4020d986: 020c movi.n a2, 0 +4020d988: 3b6f22 s32i a2, a15, 236 +4020d98b: 001d06 j 4020da03 +4020d98e: 000000 ill +4020d991: ecec37 bbsi a12, 3, 4020d981 +4020d994: c158 l32i.n a5, a1, 48 +4020d996: 016556 bnez a5, 4020d9b0 +4020d999: 0e2132 l32i a3, a1, 56 +4020d99c: fbb021 l32r a2, 4020c85c +4020d99f: 00a042 movi a4, 0 +4020d9a2: 027205 call0 402100c4 +4020d9a5: e128 l32i.n a2, a1, 56 +4020d9a7: 030c movi.n a3, 0 +4020d9a9: feeb45 call0 4020c860 +4020d9ac: 0014c6 j 4020da03 +4020d9af: 213200 srai a3, a0, 2 +4020d9b2: 100c movi.n a0, 1 +4020d9b4: 222041 l32r a4, 401d6234 <_lit4_end+0xcff08> +4020d9b7: ce .byte 0xce +4020d9b8: 6b0563 excw +4020d9bb: fe .byte 0xfe +4020d9bc: fd9256 bnez a2, 4020d999 +4020d9bf: 072122 l32i a2, a1, 28 +4020d9c2: d2fc bnez.n a2, 4020da03 +4020d9c4: fff446 j 4020d999 +4020d9c7: f12800 excw +4020d9ca: 0e7256 bnez a2, 4020dab5 +4020d9cd: fca022 movi a2, 252 +4020d9d0: 802f20 add a2, a15, a2 +4020d9d3: 09ce32 addi a3, a14, 9 +4020d9d6: 0c6122 s32i a2, a1, 48 +4020d9d9: fea7c5 call0 4020c458 +4020d9dc: 2ca122 movi a2, 0x12c +4020d9df: 043c movi.n a4, 48 +4020d9e1: bdcc bnez.n a13, 4020d9f0 +4020d9e3: c138 l32i.n a3, a1, 48 +4020d9e5: 2f2a add.n a2, a15, a2 +4020d9e7: cd8b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020d9ea: 0000c0 callx0 a0 +4020d9ed: 0002c6 j 4020d9fc +4020d9f0: 00a032 movi a3, 0 +4020d9f3: 802f20 add a2, a15, a2 +4020d9f6: cd8601 l32r a0, 40201010 <_irom0_text_start> +4020d9f9: 0000c0 callx0 a0 +4020d9fc: c128 l32i.n a2, a1, 48 +4020d9fe: 030c movi.n a3, 0 +4020da00: fea545 call0 4020c458 +4020da03: f9eed1 l32r a13, 4020c1bc +4020da06: 5b2f22 l32i a2, a15, 0x16c +4020da09: 02a542 movi a4, 0x502 +4020da0c: 0d3d mov.n a3, a13 +4020da0e: cebe01 l32r a0, 40201508 +4020da11: 0000c0 callx0 a0 +4020da14: d128 l32i.n a2, a1, 52 +4020da16: 050c movi.n a5, 0 +4020da18: 03a542 movi a4, 0x503 +4020da1b: 0d3d mov.n a3, a13 +4020da1d: ceb901 l32r a0, 40201504 +4020da20: 0000c0 callx0 a0 +4020da23: 5b6f22 s32i a2, a15, 0x16c +4020da26: 08b216 beqz a2, 4020dab5 +4020da29: d148 l32i.n a4, a1, 52 +4020da2b: 0e3d mov.n a3, a14 +4020da2d: cd7901 l32r a0, 40201014 <_irom0_text_start+0x4> +4020da30: 0000c0 callx0 a0 +4020da33: d128 l32i.n a2, a1, 52 +4020da35: 01df42 addmi a4, a15, 0x100 +4020da38: 740452 l8ui a5, a4, 116 +4020da3b: 5c6f22 s32i a2, a15, 0x170 +4020da3e: 0429c0 extui a2, a12, 9, 1 +4020da41: 1132b0 slli a3, a2, 5 +4020da44: dfaf22 movi a2, -33 +4020da47: 102520 and a2, a5, a2 +4020da4a: 202230 or a2, a2, a3 +4020da4d: 744422 s8i a2, a4, 116 +4020da50: f148 l32i.n a4, a1, 60 +4020da52: 120c movi.n a2, 1 +4020da54: 030c movi.n a3, 0 +4020da56: ef29 s32i.n a2, a15, 56 +4020da58: 04c3c0 extui a12, a12, 3, 1 +4020da5b: 832340 moveqz a2, a3, a4 +4020da5e: 106f22 s32i a2, a15, 64 +4020da61: ffc9 s32i.n a12, a15, 60 +4020da63: 042c movi.n a4, 32 +4020da65: 11ce32 addi a3, a14, 17 +4020da68: 6ccf22 addi a2, a15, 108 +4020da6b: cd6a01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020da6e: 0000c0 callx0 a0 +4020da71: 0f2d mov.n a2, a15 +4020da73: ff81c5 call0 4020d290 +4020da76: 000ec6 j 4020dab5 +4020da79: 243df6 bgeui a13, 3, 4020daa1 +4020da7c: e30d16 beqz a13, 4020d8b0 +4020da7f: 000406 j 4020da93 +4020da82: 220000 excw +4020da85: 2f .byte 0x2f +4020da86: 205d excw +4020da88: 660426 beqi a4, -1, 4020daf2 +4020da8b: 662712 l32i a1, a7, 0x198 +4020da8e: 062493 excw +4020da91: ff8a add.n a15, a15, a8 +4020da93: 021d26 beqi a13, 1, 4020da99 +4020da96: ff9b86 j 4020d908 +4020da99: 4f28 l32i.n a2, a15, 16 +4020da9b: 169266 bnei a2, 10, 4020dab5 +4020da9e: ff6e06 j 4020d85a +4020daa1: fccd22 addi a2, a13, -4 +4020daa4: 0232b6 bltui a2, 3, 4020daaa +4020daa7: ff9746 j 4020d908 +4020daaa: 0001c6 j 4020dab5 +4020daad: 102132 l32i a3, a1, 64 +4020dab0: 052d mov.n a2, a5 +4020dab2: fe9605 call0 4020c414 +4020dab5: 1b2102 l32i a0, a1, 108 +4020dab8: 1a21c2 l32i a12, a1, 104 +4020dabb: 1921d2 l32i a13, a1, 100 +4020dabe: 1821e2 l32i a14, a1, 96 +4020dac1: 1721f2 l32i a15, a1, 92 +4020dac4: 70c112 addi a1, a1, 112 +4020dac7: f00d ret.n +4020dac9: 000000 ill + +4020dacc : +4020dacc: f0c112 addi a1, a1, -16 +4020dacf: 036102 s32i a0, a1, 12 +4020dad2: 0fa032 movi a3, 15 +4020dad5: 2c3327 bltu a3, a2, 4020db05 +4020dad8: f9b831 l32r a3, 4020c1b8 +4020dadb: 002332 l32i a3, a3, 0 +4020dade: 235327 bbc a3, a2, 4020db05 +4020dae1: f9b431 l32r a3, 4020c1b4 +4020dae4: a02230 addx4 a2, a2, a3 +4020dae7: 0228 l32i.n a2, a2, 0 +4020dae9: 829c beqz.n a2, 4020db05 +4020daeb: 030c movi.n a3, 0 +4020daed: 01d242 addmi a4, a2, 0x100 +4020daf0: 666232 s32i a3, a2, 0x198 +4020daf3: 740452 l8ui a5, a4, 116 +4020daf6: 130c movi.n a3, 1 +4020daf8: d239 s32i.n a3, a2, 52 +4020dafa: d37c movi.n a3, -3 +4020dafc: 103530 and a3, a5, a3 +4020daff: 744432 s8i a3, a4, 116 +4020db02: ff78c5 call0 4020d290 +4020db05: 3108 l32i.n a0, a1, 12 +4020db07: 10c112 addi a1, a1, 16 +4020db0a: f00d ret.n + +4020db0c : +4020db0c: f0c112 addi a1, a1, -16 +4020db0f: 0261c2 s32i a12, a1, 8 +4020db12: 0161d2 s32i a13, a1, 4 +4020db15: 3109 s32i.n a0, a1, 12 +4020db17: 02dd mov.n a13, a2 +4020db19: 000222 l8ui a2, a2, 0 +4020db1c: 021945 call0 4020fcb4 +4020db1f: 02cd mov.n a12, a2 +4020db21: f27c movi.n a2, -1 +4020db23: 012c96 bltz a12, 4020db39 +4020db26: 010d22 l8ui a2, a13, 1 +4020db29: 021885 call0 4020fcb4 +4020db2c: 023d mov.n a3, a2 +4020db2e: f27c movi.n a2, -1 +4020db30: 005396 bltz a3, 4020db39 +4020db33: 11ccc0 slli a12, a12, 4 +4020db36: 202c30 or a2, a12, a3 +4020db39: 3108 l32i.n a0, a1, 12 +4020db3b: 21c8 l32i.n a12, a1, 8 +4020db3d: 11d8 l32i.n a13, a1, 4 +4020db3f: 10c112 addi a1, a1, 16 +4020db42: f00d ret.n + +4020db44 : +4020db44: f0c112 addi a1, a1, -16 +4020db47: 0261c2 s32i a12, a1, 8 +4020db4a: 0161d2 s32i a13, a1, 4 +4020db4d: 0061e2 s32i a14, a1, 0 +4020db50: 3109 s32i.n a0, a1, 12 +4020db52: 02dd mov.n a13, a2 +4020db54: 03cd mov.n a12, a3 +4020db56: e34a add.n a14, a3, a4 +4020db58: 111ce7 beq a12, a14, 4020db6d +4020db5b: 0d2d mov.n a2, a13 +4020db5d: fffac5 call0 4020db0c +4020db60: 00e296 bltz a2, 4020db72 +4020db63: 004c22 s8i a2, a12, 0 +4020db66: dd2b addi.n a13, a13, 2 +4020db68: cc1b addi.n a12, a12, 1 +4020db6a: fffa86 j 4020db58 +4020db6d: 020c movi.n a2, 0 +4020db6f: 000046 j 4020db74 +4020db72: f27c movi.n a2, -1 +4020db74: 3108 l32i.n a0, a1, 12 +4020db76: 21c8 l32i.n a12, a1, 8 +4020db78: 11d8 l32i.n a13, a1, 4 +4020db7a: 01e8 l32i.n a14, a1, 0 +4020db7c: 10c112 addi a1, a1, 16 +4020db7f: f00d ret.n +4020db81: 000000 ill +4020db84: aa7e80 excw +4020db87: 10c783 excw + ... + +4020db8c : +4020db8c: d0c112 addi a1, a1, -48 +4020db8f: 81e9 s32i.n a14, a1, 32 +4020db91: 02ed mov.n a14, a2 +4020db93: 012d mov.n a2, a1 +4020db95: b109 s32i.n a0, a1, 44 +4020db97: a1c9 s32i.n a12, a1, 40 +4020db99: 0961d2 s32i a13, a1, 36 +4020db9c: 0761f2 s32i a15, a1, 28 +4020db9f: 025205 call0 402100c0 +4020dba2: 0138 l32i.n a3, a1, 0 +4020dba4: fff821 l32r a2, 4020db84 +4020dba7: fff8f1 l32r a15, 4020db88 +4020dbaa: 232a add.n a2, a3, a2 +4020dbac: 1138 l32i.n a3, a1, 4 +4020dbae: cd4fd1 l32r a13, 402010ec +4020dbb1: 82f3f0 mull a15, a3, a15 +4020dbb4: 41c530 srli a12, a3, 5 +4020dbb7: c0ffc0 sub a15, a15, a12 +4020dbba: 413930 srli a3, a3, 9 +4020dbbd: c0ff30 sub a15, a15, a3 +4020dbc0: cd4cc1 l32r a12, 402010f0 +4020dbc3: 013280 slli a3, a2, 24 +4020dbc6: 754820 extui a4, a2, 24, 8 +4020dbc9: 204430 or a4, a4, a3 +4020dbcc: 1032d0 and a3, a2, a13 +4020dbcf: 413830 srli a3, a3, 8 +4020dbd2: 1022c0 and a2, a2, a12 +4020dbd5: 203430 or a3, a4, a3 +4020dbd8: 112280 slli a2, a2, 8 +4020dbdb: 202320 or a2, a3, a2 +4020dbde: 2129 s32i.n a2, a1, 8 +4020dbe0: 318b addi.n a3, a1, 8 +4020dbe2: 440c movi.n a4, 4 +4020dbe4: 0e2d mov.n a2, a14 +4020dbe6: cd0b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020dbe9: 0000c0 callx0 a0 +4020dbec: 7538f0 extui a3, a15, 24, 8 +4020dbef: 012f80 slli a2, a15, 24 +4020dbf2: 10dfd0 and a13, a15, a13 +4020dbf5: 202320 or a2, a3, a2 +4020dbf8: 10cfc0 and a12, a15, a12 +4020dbfb: 41d8d0 srli a13, a13, 8 +4020dbfe: 20d2d0 or a13, a2, a13 +4020dc01: 440c movi.n a4, 4 +4020dc03: 11cc80 slli a12, a12, 8 +4020dc06: 20cdc0 or a12, a13, a12 +4020dc09: 318b addi.n a3, a1, 8 +4020dc0b: 2e4a add.n a2, a14, a4 +4020dc0d: 21c9 s32i.n a12, a1, 8 +4020dc0f: cd0101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020dc12: 0000c0 callx0 a0 +4020dc15: b108 l32i.n a0, a1, 44 +4020dc17: a1c8 l32i.n a12, a1, 40 +4020dc19: 91d8 l32i.n a13, a1, 36 +4020dc1b: 81e8 l32i.n a14, a1, 32 +4020dc1d: 71f8 l32i.n a15, a1, 28 +4020dc1f: 30c112 addi a1, a1, 48 +4020dc22: f00d ret.n +4020dc24: 2308e5 excw +4020dc27: 40 .byte 0x40 + +4020dc28 : +4020dc28: d0c112 addi a1, a1, -48 +4020dc2b: 91d9 s32i.n a13, a1, 36 +4020dc2d: 81e9 s32i.n a14, a1, 32 +4020dc2f: b109 s32i.n a0, a1, 44 +4020dc31: a1c9 s32i.n a12, a1, 40 +4020dc33: 71f9 s32i.n a15, a1, 28 +4020dc35: 03dd mov.n a13, a3 +4020dc37: 000232 l8ui a3, a2, 0 +4020dc3a: 02ed mov.n a14, a2 +4020dc3c: 222c movi.n a2, 34 +4020dc3e: 509327 bne a3, a2, 4020dc92 +4020dc41: 0e2d mov.n a2, a14 +4020dc43: d9db01 l32r a0, 402043b0 +4020dc46: 0000c0 callx0 a0 +4020dc49: 117266 bnei a2, 7, 4020dc5e +4020dc4c: 01cee2 addi a14, a14, 1 +4020dc4f: 22a032 movi a3, 34 +4020dc52: 202ee0 or a2, a14, a14 +4020dc55: 074d05 call0 40215128 +4020dc58: 0b0216 beqz a2, 4020dd0c +4020dc5b: 0003c6 j 4020dc6e +4020dc5e: 0e2d mov.n a2, a14 +4020dc60: d9d401 l32r a0, 402043b0 +4020dc63: 0000c0 callx0 a0 +4020dc66: f30c movi.n a3, 15 +4020dc68: e01237 beq a2, a3, 4020dc4c +4020dc6b: 0008c6 j 4020dc92 +4020dc6e: c022e0 sub a2, a2, a14 +4020dc71: ffec31 l32r a3, 4020dc24 +4020dc74: 0d29 s32i.n a2, a13, 0 +4020dc76: 050c movi.n a5, 0 +4020dc78: 7ba042 movi a4, 123 +4020dc7b: 01c222 addi a2, a2, 1 +4020dc7e: ce2101 l32r a0, 40201504 +4020dc81: 0000c0 callx0 a0 +4020dc84: 02cd mov.n a12, a2 +4020dc86: 020c movi.n a2, 0 +4020dc88: 029c27 bne a12, a2, 4020dc8e +4020dc8b: 002346 j 4020dd1c +4020dc8e: 000906 j 4020dcb6 +4020dc91: 0e2d00 excw +4020dc94: d9c701 l32r a0, 402043b0 +4020dc97: 0000c0 callx0 a0 +4020dc9a: 737c movi.n a3, -9 +4020dc9c: 103230 and a3, a2, a3 +4020dc9f: 2b5366 bnei a3, 5, 4020dcce +4020dca2: ffe031 l32r a3, 4020dc24 +4020dca5: 0d29 s32i.n a2, a13, 0 +4020dca7: 050c movi.n a5, 0 +4020dca9: 86a042 movi a4, 134 +4020dcac: 221b addi.n a2, a2, 1 +4020dcae: ce1501 l32r a0, 40201504 +4020dcb1: 0000c0 callx0 a0 +4020dcb4: 02cd mov.n a12, a2 +4020dcb6: 0d48 l32i.n a4, a13, 0 +4020dcb8: 0e3d mov.n a3, a14 +4020dcba: 0c2d mov.n a2, a12 +4020dcbc: ccd601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020dcbf: 0000c0 callx0 a0 +4020dcc2: 0d28 l32i.n a2, a13, 0 +4020dcc4: 030c movi.n a3, 0 +4020dcc6: 2c2a add.n a2, a12, a2 +4020dcc8: 004232 s8i a3, a2, 0 +4020dccb: 0012c6 j 4020dd1a +4020dcce: f36c movi.n a3, -17 +4020dcd0: 103230 and a3, a2, a3 +4020dcd3: 359366 bnei a3, 10, 4020dd0c +4020dcd6: 41f120 srli a15, a2, 1 +4020dcd9: ffd231 l32r a3, 4020dc24 +4020dcdc: 050c movi.n a5, 0 +4020dcde: 8ba042 movi a4, 139 +4020dce1: 2f1b addi.n a2, a15, 1 +4020dce3: ce0801 l32r a0, 40201504 +4020dce6: 0000c0 callx0 a0 +4020dce9: 02cd mov.n a12, a2 +4020dceb: ffce51 l32r a5, 4020dc24 +4020dcee: a29c beqz.n a2, 4020dd0c +4020dcf0: 023d mov.n a3, a2 +4020dcf2: 0f4d mov.n a4, a15 +4020dcf4: 0e2d mov.n a2, a14 +4020dcf6: 0159 s32i.n a5, a1, 0 +4020dcf8: ffe485 call0 4020db44 +4020dcfb: 0158 l32i.n a5, a1, 0 +4020dcfd: 029c beqz.n a2, 4020dd11 +4020dcff: 8fa042 movi a4, 143 +4020dd02: 053d mov.n a3, a5 +4020dd04: 0c2d mov.n a2, a12 +4020dd06: ce0001 l32r a0, 40201508 +4020dd09: 0000c0 callx0 a0 +4020dd0c: 020c movi.n a2, 0 +4020dd0e: 000286 j 4020dd1c +4020dd11: 2cfa add.n a2, a12, a15 +4020dd13: 030c movi.n a3, 0 +4020dd15: 004232 s8i a3, a2, 0 +4020dd18: 0df9 s32i.n a15, a13, 0 +4020dd1a: 0c2d mov.n a2, a12 +4020dd1c: b108 l32i.n a0, a1, 44 +4020dd1e: a1c8 l32i.n a12, a1, 40 +4020dd20: 91d8 l32i.n a13, a1, 36 +4020dd22: 81e8 l32i.n a14, a1, 32 +4020dd24: 71f8 l32i.n a15, a1, 28 +4020dd26: 30c112 addi a1, a1, 48 +4020dd29: f00d ret.n + ... + +4020dd2c : +4020dd2c: f0c112 addi a1, a1, -16 +4020dd2f: 036102 s32i a0, a1, 12 +4020dd32: 00e316 beqz a3, 4020dd44 +4020dd35: 000262 l8ui a6, a2, 0 +4020dd38: 30a052 movi a5, 48 +4020dd3b: 059657 bne a6, a5, 4020dd44 +4020dd3e: 013d45 call0 4020f114 +4020dd41: 000086 j 4020dd47 +4020dd44: 0156c5 call0 4020f2b4 +4020dd47: 3108 l32i.n a0, a1, 12 +4020dd49: 10c112 addi a1, a1, 16 +4020dd4c: f00d ret.n + ... + +4020dd50 : +4020dd50: f0c112 addi a1, a1, -16 +4020dd53: 21c9 s32i.n a12, a1, 8 +4020dd55: 04cd mov.n a12, a4 +4020dd57: 11d9 s32i.n a13, a1, 4 +4020dd59: 01e9 s32i.n a14, a1, 0 +4020dd5b: 03dd mov.n a13, a3 +4020dd5d: 02ed mov.n a14, a2 +4020dd5f: 030c movi.n a3, 0 +4020dd61: 442c movi.n a4, 36 +4020dd63: 0c2d mov.n a2, a12 +4020dd65: 036102 s32i a0, a1, 12 +4020dd68: ccaa01 l32r a0, 40201010 <_irom0_text_start> +4020dd6b: 0000c0 callx0 a0 +4020dd6e: 3d0b addi.n a3, a13, -1 +4020dd70: f8bd81 l32r a8, 4020c064 +4020dd73: f8bd91 l32r a9, 4020c068 +4020dd76: f8bab1 l32r a11, 4020c060 +4020dd79: 5eda add.n a5, a14, a13 +4020dd7b: 0e2d mov.n a2, a14 +4020dd7d: dda062 movi a6, 221 +4020dd80: 3e3a add.n a3, a14, a3 +4020dd82: 073c movi.n a7, 48 +4020dd84: 3a1c movi.n a10, 19 +4020dd86: 421b addi.n a4, a2, 1 +4020dd88: 023457 bltu a4, a5, 4020dd8e +4020dd8b: 003e46 j 4020de88 +4020dd8e: 0002d2 l8ui a13, a2, 0 +4020dd91: 0b9d67 bne a13, a6, 4020dda0 +4020dd94: 029237 bne a2, a3, 4020dd9a +4020dd97: 003b46 j 4020de88 +4020dd9a: 010242 l8ui a4, a2, 1 +4020dd9d: 0e7416 beqz a4, 4020de88 +4020dda0: 010242 l8ui a4, a2, 1 +4020dda3: e42b addi.n a14, a4, 2 +4020dda5: e2ea add.n a14, a2, a14 +4020dda7: 02b5e7 bgeu a5, a14, 4020ddad +4020ddaa: 003506 j 4020de82 +4020ddad: 0b9d77 bne a13, a7, 4020ddbc +4020ddb0: 2c29 s32i.n a2, a12, 8 +4020ddb2: 010242 l8ui a4, a2, 1 +4020ddb5: 442b addi.n a4, a4, 2 +4020ddb7: 3c49 s32i.n a4, a12, 12 +4020ddb9: 002ec6 j 4020de78 +4020ddbc: 021d67 beq a13, a6, 4020ddc2 +4020ddbf: 002d46 j 4020de78 +4020ddc2: 0c2416 beqz a4, 4020de88 +4020ddc5: 3b64b6 bltui a4, 6, 4020de04 +4020ddc8: 0202e2 l8ui a14, a2, 2 +4020ddcb: 0302d2 l8ui a13, a2, 3 +4020ddce: 01ee80 slli a14, a14, 24 +4020ddd1: 11dd00 slli a13, a13, 16 +4020ddd4: 20ded0 or a13, a14, a13 +4020ddd7: 0502e2 l8ui a14, a2, 5 +4020ddda: 20ede0 or a14, a13, a14 +4020dddd: 0402d2 l8ui a13, a2, 4 +4020dde0: 11dd80 slli a13, a13, 8 +4020dde3: 20ded0 or a13, a14, a13 +4020dde6: f89de1 l32r a14, 4020c05c +4020dde9: 179de7 bne a13, a14, 4020de04 +4020ddec: 0602d2 l8ui a13, a2, 6 +4020ddef: 111d66 bnei a13, 1, 4020de04 +4020ddf2: 0702d2 l8ui a13, a2, 7 +4020ddf5: bdcc bnez.n a13, 4020de04 +4020ddf7: 0c29 s32i.n a2, a12, 0 +4020ddf9: 010242 l8ui a4, a2, 1 +4020ddfc: 442b addi.n a4, a4, 2 +4020ddfe: 1c49 s32i.n a4, a12, 4 +4020de00: 001d06 j 4020de78 +4020de03: d25b00 excw +4020de06: 2bbd57 bgeu a13, a5, 4020de35 +4020de09: 28ba47 bgeu a10, a4, 4020de35 +4020de0c: 020242 l8ui a4, a2, 2 +4020de0f: 01d480 slli a13, a4, 24 +4020de12: 030242 l8ui a4, a2, 3 +4020de15: 114400 slli a4, a4, 16 +4020de18: 204d40 or a4, a13, a4 +4020de1b: 0502d2 l8ui a13, a2, 5 +4020de1e: 20d4d0 or a13, a4, a13 +4020de21: 040242 l8ui a4, a2, 4 +4020de24: 114480 slli a4, a4, 8 +4020de27: 204d40 or a4, a13, a4 +4020de2a: 0a94b7 bne a4, a11, 4020de38 +4020de2d: 426b addi.n a4, a2, 6 +4020de2f: 4c49 s32i.n a4, a12, 16 +4020de31: 0010c6 j 4020de78 +4020de34: 74b600 extui a11, a0, 6, 8 +4020de37: 3f .byte 0x3f +4020de38: 020242 l8ui a4, a2, 2 +4020de3b: 01d480 slli a13, a4, 24 +4020de3e: 030242 l8ui a4, a2, 3 +4020de41: 114400 slli a4, a4, 16 +4020de44: 204d40 or a4, a13, a4 +4020de47: 0502d2 l8ui a13, a2, 5 +4020de4a: 20d4d0 or a13, a4, a13 +4020de4d: 040242 l8ui a4, a2, 4 +4020de50: 114480 slli a4, a4, 8 +4020de53: 204d40 or a4, a13, a4 +4020de56: 0f9487 bne a4, a8, 4020de69 +4020de59: 426b addi.n a4, a2, 6 +4020de5b: 5c49 s32i.n a4, a12, 20 +4020de5d: 010242 l8ui a4, a2, 1 +4020de60: fcc442 addi a4, a4, -4 +4020de63: 6c49 s32i.n a4, a12, 24 +4020de65: 0003c6 j 4020de78 +4020de68: 949700 extui a9, a0, 7, 10 +4020de6b: 6b0b addi.n a6, a11, -1 +4020de6d: 7c4942 s8i a4, a9, 124 +4020de70: 010242 l8ui a4, a2, 1 +4020de73: fcc442 addi a4, a4, -4 +4020de76: 8c49 s32i.n a4, a12, 32 +4020de78: 010242 l8ui a4, a2, 1 +4020de7b: 442b addi.n a4, a4, 2 +4020de7d: 224a add.n a2, a2, a4 +4020de7f: ffc0c6 j 4020dd86 +4020de82: f27c movi.n a2, -1 +4020de84: 000086 j 4020de8a +4020de87: 020c00 excw +4020de8a: 3108 l32i.n a0, a1, 12 +4020de8c: 21c8 l32i.n a12, a1, 8 +4020de8e: 11d8 l32i.n a13, a1, 4 +4020de90: 01e8 l32i.n a14, a1, 0 +4020de92: 10c112 addi a1, a1, 16 +4020de95: f00d ret.n +4020de97: 08ee00 excw +4020de9a: 454023 excw +4020de9d: 3ffee2 excw + +4020dea0 : +4020dea0: f0c112 addi a1, a1, -16 +4020dea3: f238 l32i.n a3, a2, 60 +4020dea5: 21c9 s32i.n a12, a1, 8 +4020dea7: 3109 s32i.n a0, a1, 12 +4020dea9: 02cd mov.n a12, a2 +4020deab: 020c movi.n a2, 0 +4020dead: 381327 beq a3, a2, 4020dee9 +4020deb0: ec28 l32i.n a2, a12, 56 +4020deb2: b2ec bnez.n a2, 4020dee1 +4020deb4: fff931 l32r a3, 4020de98 +4020deb7: 22a142 movi a4, 0x122 +4020deba: 023c movi.n a2, 48 +4020debc: d06501 l32r a0, 40202050 +4020debf: 0000c0 callx0 a0 +4020dec2: 023d mov.n a3, a2 +4020dec4: ec29 s32i.n a2, a12, 56 +4020dec6: f27c movi.n a2, -1 +4020dec8: d39c beqz.n a3, 4020dee9 +4020deca: fc28 l32i.n a2, a12, 60 +4020decc: d93901 l32r a0, 402043b0 +4020decf: 0000c0 callx0 a0 +4020ded2: ec28 l32i.n a2, a12, 56 +4020ded4: fff231 l32r a3, 4020de9c +4020ded7: 042c movi.n a4, 32 +4020ded9: 228b addi.n a2, a2, 8 +4020dedb: cc4e01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020dede: 0000c0 callx0 a0 +4020dee1: ec28 l32i.n a2, a12, 56 +4020dee3: 130c movi.n a3, 1 +4020dee5: 1239 s32i.n a3, a2, 4 +4020dee7: 020c movi.n a2, 0 +4020dee9: 3108 l32i.n a0, a1, 12 +4020deeb: 21c8 l32i.n a12, a1, 8 +4020deed: 10c112 addi a1, a1, 16 +4020def0: f00d ret.n + ... + +4020def4 : +4020def4: d0c112 addi a1, a1, -48 +4020def7: 91d9 s32i.n a13, a1, 36 +4020def9: 81e9 s32i.n a14, a1, 32 +4020defb: 036d mov.n a6, a3 +4020defd: 0e0c movi.n a14, 0 +4020deff: 130c movi.n a3, 1 +4020df01: e2d8 l32i.n a13, a2, 56 +4020df03: 71f9 s32i.n a15, a1, 28 +4020df05: b109 s32i.n a0, a1, 44 +4020df07: a1c9 s32i.n a12, a1, 40 +4020df09: 045d mov.n a5, a4 +4020df0b: 83e340 moveqz a14, a3, a4 +4020df0e: 03fd mov.n a15, a3 +4020df10: 0dbc beqz.n a13, 4020df44 +4020df12: cd8b addi.n a12, a13, 8 +4020df14: 0eac beqz.n a14, 4020df38 +4020df16: 1d28 l32i.n a2, a13, 4 +4020df18: 428c beqz.n a2, 4020df20 +4020df1a: 0c2d mov.n a2, a12 +4020df1c: 000986 j 4020df46 +4020df1f: 063d00 excw +4020df22: 640c movi.n a4, 6 +4020df24: 28cd22 addi a2, a13, 40 +4020df27: 1159 s32i.n a5, a1, 4 +4020df29: 0169 s32i.n a6, a1, 0 +4020df2b: cf3c01 l32r a0, 40201c1c +4020df2e: 0000c0 callx0 a0 +4020df31: 1158 l32i.n a5, a1, 4 +4020df33: 0168 l32i.n a6, a1, 0 +4020df35: fe1216 beqz a2, 4020df1a +4020df38: c0c5c0 sub a12, a5, a12 +4020df3b: 83efc0 moveqz a14, a15, a12 +4020df3e: 0dd8 l32i.n a13, a13, 0 +4020df40: fff306 j 4020df10 +4020df43: 020c00 excw +4020df46: b108 l32i.n a0, a1, 44 +4020df48: a1c8 l32i.n a12, a1, 40 +4020df4a: 91d8 l32i.n a13, a1, 36 +4020df4c: 81e8 l32i.n a14, a1, 32 +4020df4e: 71f8 l32i.n a15, a1, 28 +4020df50: 30c112 addi a1, a1, 48 +4020df53: f00d ret.n +4020df55: 000000 ill +4020df58: fed994 excw +4020df5b: 3f .byte 0x3f +4020df5c: c0c112 addi a1, a1, -64 +4020df5f: e1c9 s32i.n a12, a1, 56 +4020df61: d1d9 s32i.n a13, a1, 52 +4020df63: c1e9 s32i.n a14, a1, 48 +4020df65: f109 s32i.n a0, a1, 60 +4020df67: b1f9 s32i.n a15, a1, 44 +4020df69: 06dd mov.n a13, a6 +4020df6b: 02cd mov.n a12, a2 +4020df6d: 038d mov.n a8, a3 +4020df6f: 04ad mov.n a10, a4 +4020df71: 05ed mov.n a14, a5 +4020df73: 076d mov.n a6, a7 +4020df75: 092366 bnei a3, 2, 4020df82 +4020df78: 122122 l32i a2, a1, 72 +4020df7b: 03c266 bnei a2, 32, 4020df82 +4020df7e: 020c movi.n a2, 0 +4020df80: 0c29 s32i.n a2, a12, 0 +4020df82: 0f0c movi.n a15, 0 +4020df84: 2c89 s32i.n a8, a12, 8 +4020df86: 0a3d mov.n a3, a10 +4020df88: 1cf9 s32i.n a15, a12, 4 +4020df8a: 640c movi.n a4, 6 +4020df8c: 2ccb addi.n a2, a12, 12 +4020df8e: 066162 s32i a6, a1, 24 +4020df91: 046182 s32i a8, a1, 16 +4020df94: 0561a2 s32i a10, a1, 20 +4020df97: cc1f01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020df9a: 0000c0 callx0 a0 +4020df9d: 122142 l32i a4, a1, 72 +4020dfa0: 112132 l32i a3, a1, 68 +4020dfa3: 5ce9 s32i.n a14, a12, 20 +4020dfa5: 6cd9 s32i.n a13, a12, 24 +4020dfa7: 26cc22 addi a2, a12, 38 +4020dfaa: cc1a01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020dfad: 0000c0 callx0 a0 +4020dfb0: 132122 l32i a2, a1, 76 +4020dfb3: 51a8 l32i.n a10, a1, 20 +4020dfb5: 2129 s32i.n a2, a1, 8 +4020dfb7: 122122 l32i a2, a1, 72 +4020dfba: 4188 l32i.n a8, a1, 16 +4020dfbc: 1129 s32i.n a2, a1, 4 +4020dfbe: 112122 l32i a2, a1, 68 +4020dfc1: 102172 l32i a7, a1, 64 +4020dfc4: 0129 s32i.n a2, a1, 0 +4020dfc6: ffe421 l32r a2, 4020df58 +4020dfc9: 6168 l32i.n a6, a1, 24 +4020dfcb: 8222b2 l32i a11, a2, 0x208 +4020dfce: 0d5d mov.n a5, a13 +4020dfd0: 0e4d mov.n a4, a14 +4020dfd2: 082d mov.n a2, a8 +4020dfd4: 0a3d mov.n a3, a10 +4020dfd6: 000bc0 callx0 a11 +4020dfd9: f108 l32i.n a0, a1, 60 +4020dfdb: 0f2d mov.n a2, a15 +4020dfdd: e1c8 l32i.n a12, a1, 56 +4020dfdf: d1d8 l32i.n a13, a1, 52 +4020dfe1: c1e8 l32i.n a14, a1, 48 +4020dfe3: b1f8 l32i.n a15, a1, 44 +4020dfe5: 40c112 addi a1, a1, 64 +4020dfe8: f00d ret.n +4020dfea: 180000 excw +4020dfed: fedb addi.n a15, a14, 13 +4020dfef: 3f .byte 0x3f +4020dff0: fedb60 excw +4020dff3: 3f .byte 0x3f +4020dff4: e0c112 addi a1, a1, -32 +4020dff7: 61c9 s32i.n a12, a1, 24 +4020dff9: 51d9 s32i.n a13, a1, 20 +4020dffb: 02cd mov.n a12, a2 +4020dffd: 03dd mov.n a13, a3 +4020dfff: 012d mov.n a2, a1 +4020e001: 08a032 movi a3, 8 +4020e004: 7109 s32i.n a0, a1, 28 +4020e006: df0d01 l32r a0, 40205c3c +4020e009: 0000c0 callx0 a0 +4020e00c: ffd321 l32r a2, 4020df58 +4020e00f: fff851 l32r a5, 4020dff0 +4020e012: 532232 l32i a3, a2, 0x14c +4020e015: 3dccc2 addi a12, a12, 61 +4020e018: fec332 addi a3, a3, -2 +4020e01b: fff421 l32r a2, 4020dfec +4020e01e: 83c130 moveqz a12, a1, a3 +4020e021: 0c3d mov.n a3, a12 +4020e023: 8325d0 moveqz a2, a5, a13 +4020e026: 840c movi.n a4, 8 +4020e028: cbfb01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e02b: 0000c0 callx0 a0 +4020e02e: 7108 l32i.n a0, a1, 28 +4020e030: 61c8 l32i.n a12, a1, 24 +4020e032: 51d8 l32i.n a13, a1, 20 +4020e034: 20c112 addi a1, a1, 32 +4020e037: f00d ret.n +4020e039: 000000 ill +4020e03c: dbbc beqz.n a11, 4020e07d +4020e03e: fe .byte 0xfe +4020e03f: 3f .byte 0x3f +4020e040: dbcc bnez.n a11, 4020e051 +4020e042: fe .byte 0xfe +4020e043: 3f .byte 0x3f +4020e044: fedbd4 excw +4020e047: 3f .byte 0x3f +4020e048: dada add.n a13, a10, a13 +4020e04a: fe .byte 0xfe +4020e04b: 3f .byte 0x3f +4020e04c: fedb44 excw +4020e04f: 3f .byte 0x3f +4020e050: c0c112 addi a1, a1, -64 +4020e053: e1c9 s32i.n a12, a1, 56 +4020e055: ffc0c1 l32r a12, 4020df58 +4020e058: fff931 l32r a3, 4020e03c +4020e05b: 422c22 l32i a2, a12, 0x108 +4020e05e: f109 s32i.n a0, a1, 60 +4020e060: 036d mov.n a6, a3 +4020e062: 2b2266 bnei a2, 2, 4020e091 +4020e065: 10a042 movi a4, 16 +4020e068: 802140 add a2, a1, a4 +4020e06b: cbea01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e06e: 0000c0 callx0 a0 +4020e071: fff331 l32r a3, 4020e040 +4020e074: 08a042 movi a4, 8 +4020e077: 20c122 addi a2, a1, 32 +4020e07a: cbe601 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e07d: 0000c0 callx0 a0 +4020e080: fff131 l32r a3, 4020e044 +4020e083: 840c movi.n a4, 8 +4020e085: 28c122 addi a2, a1, 40 +4020e088: cbe301 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e08b: 0000c0 callx0 a0 +4020e08e: 10c162 addi a6, a1, 16 +4020e091: 892c52 l32i a5, a12, 0x224 +4020e094: 412c32 l32i a3, a12, 0x104 +4020e097: 7e6c52 s32i a5, a12, 0x1f8 +4020e09a: 3159 s32i.n a5, a1, 12 +4020e09c: ffd571 l32r a7, 4020dff0 +4020e09f: ffea41 l32r a4, 4020e048 +4020e0a2: ffea21 l32r a2, 4020e04c +4020e0a5: 101366 bnei a3, 1, 4020e0b9 +4020e0a8: 922c32 l32i a3, a12, 0x248 +4020e0ab: 1169 s32i.n a6, a1, 4 +4020e0ad: 2139 s32i.n a3, a1, 8 +4020e0af: 882c32 l32i a3, a12, 0x220 +4020e0b2: 160c movi.n a6, 1 +4020e0b4: 0139 s32i.n a3, a1, 0 +4020e0b6: 000446 j 4020e0cb +4020e0b9: 922c32 l32i a3, a12, 0x248 +4020e0bc: 016162 s32i a6, a1, 4 +4020e0bf: 026132 s32i a3, a1, 8 +4020e0c2: 882c32 l32i a3, a12, 0x220 +4020e0c5: 006132 s32i a3, a1, 0 +4020e0c8: 872c62 l32i a6, a12, 0x21c +4020e0cb: 862c32 l32i a3, a12, 0x218 +4020e0ce: ffe8c5 call0 4020df5c +4020e0d1: f108 l32i.n a0, a1, 60 +4020e0d3: 312f20 srai a2, a2, 31 +4020e0d6: e1c8 l32i.n a12, a1, 56 +4020e0d8: 40c112 addi a1, a1, 64 +4020e0db: f00d ret.n +4020e0dd: 000000 ill +4020e0e0: c0c112 addi a1, a1, -64 +4020e0e3: e1c9 s32i.n a12, a1, 56 +4020e0e5: d1d9 s32i.n a13, a1, 52 +4020e0e7: c1e9 s32i.n a14, a1, 48 +4020e0e9: b1f9 s32i.n a15, a1, 44 +4020e0eb: f109 s32i.n a0, a1, 60 +4020e0ed: 02dd mov.n a13, a2 +4020e0ef: 038d mov.n a8, a3 +4020e0f1: 010522 l8ui a2, a5, 1 +4020e0f4: 000532 l8ui a3, a5, 0 +4020e0f7: 06fd mov.n a15, a6 +4020e0f9: 202320 or a2, a3, a2 +4020e0fc: 020532 l8ui a3, a5, 2 +4020e0ff: 049d mov.n a9, a4 +4020e101: 202230 or a2, a2, a3 +4020e104: 030532 l8ui a3, a5, 3 +4020e107: 05cd mov.n a12, a5 +4020e109: 202230 or a2, a2, a3 +4020e10c: 040532 l8ui a3, a5, 4 +4020e10f: 07ed mov.n a14, a7 +4020e111: 202230 or a2, a2, a3 +4020e114: 050532 l8ui a3, a5, 5 +4020e117: 102162 l32i a6, a1, 64 +4020e11a: 202230 or a2, a2, a3 +4020e11d: 742020 extui a2, a2, 0, 8 +4020e120: 04d256 bnez a2, 4020e171 +4020e123: 01dd22 addmi a2, a13, 0x100 +4020e126: 470232 l8ui a3, a2, 71 +4020e129: 460242 l8ui a4, a2, 70 +4020e12c: 46a152 movi a5, 0x146 +4020e12f: 204430 or a4, a4, a3 +4020e132: 480232 l8ui a3, a2, 72 +4020e135: 5d5a add.n a5, a13, a5 +4020e137: 204430 or a4, a4, a3 +4020e13a: 490232 l8ui a3, a2, 73 +4020e13d: 204430 or a4, a4, a3 +4020e140: 4a0232 l8ui a3, a2, 74 +4020e143: 204430 or a4, a4, a3 +4020e146: 4b0232 l8ui a3, a2, 75 +4020e149: 202430 or a2, a4, a3 +4020e14c: 742020 extui a2, a2, 0, 8 +4020e14f: e2dc bnez.n a2, 4020e171 +4020e151: 053d mov.n a3, a5 +4020e153: 052d mov.n a2, a5 +4020e155: 640c movi.n a4, 6 +4020e157: 4159 s32i.n a5, a1, 16 +4020e159: 7169 s32i.n a6, a1, 28 +4020e15b: 5189 s32i.n a8, a1, 20 +4020e15d: 066192 s32i a9, a1, 24 +4020e160: cbad01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e163: 0000c0 callx0 a0 +4020e166: 4158 l32i.n a5, a1, 16 +4020e168: 6198 l32i.n a9, a1, 24 +4020e16a: 5188 l32i.n a8, a1, 20 +4020e16c: 7168 l32i.n a6, a1, 28 +4020e16e: 20c550 or a12, a5, a5 +4020e171: 061656 bnez a6, 4020e1d6 +4020e174: e40c movi.n a4, 14 +4020e176: 030c movi.n a3, 0 +4020e178: 202110 or a2, a1, a1 +4020e17b: cba501 l32r a0, 40201010 <_irom0_text_start> +4020e17e: 0000c0 callx0 a0 +4020e181: 0c3d mov.n a3, a12 +4020e183: 640c movi.n a4, 6 +4020e185: 012d mov.n a2, a1 +4020e187: cba301 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e18a: 0000c0 callx0 a0 +4020e18d: 640c movi.n a4, 6 +4020e18f: 40a132 movi a3, 0x140 +4020e192: 3d3a add.n a3, a13, a3 +4020e194: 214a add.n a2, a1, a4 +4020e196: cb9f01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e199: 0000c0 callx0 a0 +4020e19c: d91821 l32r a2, 402045fc +4020e19f: 3eeb addi.n a3, a14, 14 +4020e1a1: 065122 s16i a2, a1, 12 +4020e1a4: 7f2d22 l32i a2, a13, 0x1fc +4020e1a7: 12c8 l32i.n a12, a2, 4 +4020e1a9: 055232 s16i a3, a2, 10 +4020e1ac: 4cbc beqz.n a12, 4020e1e4 +4020e1ae: 203110 or a3, a1, a1 +4020e1b1: 0ea042 movi a4, 14 +4020e1b4: 202cc0 or a2, a12, a12 +4020e1b7: cb9701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e1ba: 0000c0 callx0 a0 +4020e1bd: 0f3d mov.n a3, a15 +4020e1bf: 0e4d mov.n a4, a14 +4020e1c1: 2ceb addi.n a2, a12, 14 +4020e1c3: cb9401 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e1c6: 0000c0 callx0 a0 +4020e1c9: 802d32 l32i a3, a13, 0x200 +4020e1cc: 7f2d22 l32i a2, a13, 0x1fc +4020e1cf: 0003c0 callx0 a3 +4020e1d2: 000386 j 4020e1e4 +4020e1d5: 0e5d00 excw +4020e1d8: 0f4d mov.n a4, a15 +4020e1da: 093d mov.n a3, a9 +4020e1dc: 082d mov.n a2, a8 +4020e1de: 012805 call0 4020f460 +4020e1e1: f8f216 beqz a2, 4020e174 +4020e1e4: f108 l32i.n a0, a1, 60 +4020e1e6: e1c8 l32i.n a12, a1, 56 +4020e1e8: d1d8 l32i.n a13, a1, 52 +4020e1ea: c1e8 l32i.n a14, a1, 48 +4020e1ec: b1f8 l32i.n a15, a1, 44 +4020e1ee: 40c112 addi a1, a1, 64 +4020e1f1: f00d ret.n +4020e1f3: 090000 excw +4020e1f6: 120000 excw +4020e1f9: d2b0c1 l32r a12, 40202cbc +4020e1fc: dd1161 l32r a6, 40205640 +4020e1ff: 222202 l32i a0, a2, 136 +4020e202: 61e243 excw +4020e205: 039d10 excw +4020e208: 048d mov.n a8, a4 +4020e20a: 136102 s32i a0, a1, 76 +4020e20d: 1261c2 s32i a12, a1, 72 +4020e210: f1f9 s32i.n a15, a1, 60 +4020e212: e0c242 addi a4, a2, -32 +4020e215: dfaf32 movi a3, -33 +4020e218: 3e0c movi.n a14, 3 +4020e21a: 150437 bnone a4, a3, 4020e233 +4020e21d: 80c222 addi a2, a2, -128 +4020e220: 7faf32 movi a3, -129 +4020e223: 0c0237 bnone a2, a3, 4020e233 +4020e226: 412de2 l32i a14, a13, 0x104 +4020e229: 130c movi.n a3, 1 +4020e22b: f8ce22 addi a2, a14, -8 +4020e22e: 2e0c movi.n a14, 2 +4020e230: 93e320 movnez a14, a3, a2 +4020e233: 46a132 movi a3, 0x146 +4020e236: 640c movi.n a4, 6 +4020e238: 3d3a add.n a3, a13, a3 +4020e23a: 10c122 addi a2, a1, 16 +4020e23d: 9189 s32i.n a8, a1, 36 +4020e23f: 8199 s32i.n a9, a1, 32 +4020e241: cb7401 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e244: 0000c0 callx0 a0 +4020e247: 18c172 addi a7, a1, 24 +4020e24a: 1cc162 addi a6, a1, 28 +4020e24d: f55c movi.n a5, 95 +4020e24f: 040c movi.n a4, 0 +4020e251: 330c movi.n a3, 3 +4020e253: 0d2d mov.n a2, a13 +4020e255: 019985 call0 4020fbf0 +4020e258: 02fd mov.n a15, a2 +4020e25a: 9188 l32i.n a8, a1, 36 +4020e25c: 8198 l32i.n a9, a1, 32 +4020e25e: 08e216 beqz a2, 4020e2f0 +4020e261: 532d32 l32i a3, a13, 0x14c +4020e264: 6128 l32i.n a2, a1, 24 +4020e266: fec342 addi a4, a3, -2 +4020e269: 250c movi.n a5, 2 +4020e26b: fea032 movi a3, 254 +4020e26e: 833540 moveqz a3, a5, a4 +4020e271: 004232 s8i a3, a2, 0 +4020e274: fd2cc1 l32r a12, 4020d724 +4020e277: 292d32 l32i a3, a13, 164 +4020e27a: 20cec0 or a12, a14, a12 +4020e27d: 438c beqz.n a3, 4020e285 +4020e27f: ffddc1 l32r a12, 4020e1f4 +4020e282: 20cec0 or a12, a14, a12 +4020e285: 498c beqz.n a9, 4020e28d +4020e287: 00a632 movi a3, 0x600 +4020e28a: 20cc30 or a12, a12, a3 +4020e28d: 388c beqz.n a8, 4020e294 +4020e28f: 830c movi.n a3, 8 +4020e291: 20cc30 or a12, a12, a3 +4020e294: fca062 movi a6, 252 +4020e297: 00a052 movi a5, 0 +4020e29a: 806d60 add a6, a13, a6 +4020e29d: 2138c0 srai a3, a12, 8 +4020e2a0: 034252 s8i a5, a2, 3 +4020e2a3: 044252 s8i a5, a2, 4 +4020e2a6: 014232 s8i a3, a2, 1 +4020e2a9: 0242c2 s8i a12, a2, 2 +4020e2ac: 840c movi.n a4, 8 +4020e2ae: 063d mov.n a3, a6 +4020e2b0: 225b addi.n a2, a2, 5 +4020e2b2: 9159 s32i.n a5, a1, 36 +4020e2b4: 8169 s32i.n a6, a1, 32 +4020e2b6: cb5701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e2b9: 0000c0 callx0 a0 +4020e2bc: 8168 l32i.n a6, a1, 32 +4020e2be: 830c movi.n a3, 8 +4020e2c0: 062d mov.n a2, a6 +4020e2c2: 01a205 call0 4020fce4 +4020e2c5: 6138 l32i.n a3, a1, 24 +4020e2c7: 9158 l32i.n a5, a1, 36 +4020e2c9: 00a122 movi a2, 0x100 +4020e2cc: 5d4352 s8i a5, a3, 93 +4020e2cf: 5e4352 s8i a5, a3, 94 +4020e2d2: 102c20 and a2, a12, a2 +4020e2d5: 4dc332 addi a3, a3, 77 +4020e2d8: 0c0c movi.n a12, 0 +4020e2da: 93c320 movnez a12, a3, a2 +4020e2dd: 7178 l32i.n a7, a1, 28 +4020e2df: 01c9 s32i.n a12, a1, 0 +4020e2e1: 0f6d mov.n a6, a15 +4020e2e3: 10c152 addi a5, a1, 16 +4020e2e6: 0e4d mov.n a4, a14 +4020e2e8: 24cd32 addi a3, a13, 36 +4020e2eb: 0d2d mov.n a2, a13 +4020e2ed: ffdf05 call0 4020e0e0 +4020e2f0: 132102 l32i a0, a1, 76 +4020e2f3: 1221c2 l32i a12, a1, 72 +4020e2f6: 1121d2 l32i a13, a1, 68 +4020e2f9: 1021e2 l32i a14, a1, 64 +4020e2fc: f1f8 l32i.n a15, a1, 60 +4020e2fe: 50c112 addi a1, a1, 80 +4020e301: f00d ret.n +4020e303: c11200 mul16u a1, a2, a0 +4020e306: 140cf0 extui a0, a15, 12, 2 +4020e309: 030c movi.n a3, 0 +4020e30b: 3109 s32i.n a0, a1, 12 +4020e30d: ffee85 call0 4020e1f8 +4020e310: 3108 l32i.n a0, a1, 12 +4020e312: 10c112 addi a1, a1, 16 +4020e315: f00d ret.n + ... + +4020e318 : +4020e318: ff1041 l32r a4, 4020df58 +4020e31b: 743030 extui a3, a3, 0, 8 +4020e31e: 536422 s32i a2, a4, 0x14c +4020e321: 120c movi.n a2, 1 +4020e323: 014326 beqi a3, 4, 4020e328 +4020e326: 220c movi.n a2, 2 +4020e328: 436422 s32i a2, a4, 0x10c +4020e32b: f00d ret.n +4020e32d: 000000 ill +4020e330: feda84 excw +4020e333: 3f .byte 0x3f +4020e334: fedad4 excw +4020e337: 3f .byte 0x3f +4020e338: d97a add.n a13, a9, a7 +4020e33a: fe .byte 0xfe +4020e33b: 3f .byte 0x3f +4020e33c: d978 l32i.n a7, a9, 52 +4020e33e: fe .byte 0xfe +4020e33f: 3f .byte 0x3f +4020e340: e1a8 l32i.n a10, a1, 56 +4020e342: fe .byte 0xfe +4020e343: 3f .byte 0x3f +4020e344: 00b840 excw +4020e347: 40 .byte 0x40 + +4020e348 : +4020e348: d0c112 addi a1, a1, -48 +4020e34b: a1c9 s32i.n a12, a1, 40 +4020e34d: 81e9 s32i.n a14, a1, 32 +4020e34f: ff02c1 l32r a12, 4020df58 +4020e352: 1e0c movi.n a14, 1 +4020e354: b109 s32i.n a0, a1, 44 +4020e356: 91d9 s32i.n a13, a1, 36 +4020e358: 71f9 s32i.n a15, a1, 28 +4020e35a: 028d mov.n a8, a2 +4020e35c: 401500 ssl a5 +4020e35f: a15e00 sll a5, a14 +4020e362: 0d0c movi.n a13, 0 +4020e364: 401400 ssl a4 +4020e367: a14e00 sll a4, a14 +4020e36a: fff121 l32r a2, 4020e330 +4020e36d: 037d mov.n a7, a3 +4020e36f: 426c52 s32i a5, a12, 0x108 +4020e372: 416c42 s32i a4, a12, 0x104 +4020e375: 3e6cd2 s32i a13, a12, 248 +4020e378: 840c movi.n a4, 8 +4020e37a: 0d3d mov.n a3, a13 +4020e37c: 06fd mov.n a15, a6 +4020e37e: 1179 s32i.n a7, a1, 4 +4020e380: 006182 s32i a8, a1, 0 +4020e383: cb2301 l32r a0, 40201010 <_irom0_text_start> +4020e386: 0000c0 callx0 a0 +4020e389: 02dc22 addmi a2, a12, 0x200 +4020e38c: 4e42d2 s8i a13, a2, 78 +4020e38f: 0188 l32i.n a8, a1, 0 +4020e391: ffe821 l32r a2, 4020e334 +4020e394: 203880 or a3, a8, a8 +4020e397: 06a042 movi a4, 6 +4020e39a: 4f6cd2 s32i a13, a12, 0x13c +4020e39d: 3b6ce2 s32i a14, a12, 236 +4020e3a0: cb1d01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e3a3: 0000c0 callx0 a0 +4020e3a6: 1178 l32i.n a7, a1, 4 +4020e3a8: ff2821 l32r a2, 4020e048 +4020e3ab: 073d mov.n a3, a7 +4020e3ad: 640c movi.n a4, 6 +4020e3af: cb1901 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e3b2: 0000c0 callx0 a0 +4020e3b5: ffe021 l32r a2, 4020e338 +4020e3b8: 831c movi.n a3, 24 +4020e3ba: 4c6c22 s32i a2, a12, 0x130 +4020e3bd: 532c22 l32i a2, a12, 0x14c +4020e3c0: 0112e7 beq a2, a14, 4020e3c5 +4020e3c3: 631c movi.n a3, 22 +4020e3c5: 4d6c32 s32i a3, a12, 0x134 +4020e3c8: 4d2c42 l32i a4, a12, 0x134 +4020e3cb: ffdc31 l32r a3, 4020e33c +4020e3ce: 812c52 l32i a5, a12, 0x204 +4020e3d1: 742020 extui a2, a2, 0, 8 +4020e3d4: 0005c0 callx0 a5 +4020e3d7: 4d2c42 l32i a4, a12, 0x134 +4020e3da: 4c2c32 l32i a3, a12, 0x130 +4020e3dd: 202cc0 or a2, a12, a12 +4020e3e0: 0191c5 call0 4020fd00 +4020e3e3: 075f16 beqz a15, 4020e45c +4020e3e6: 202ff0 or a2, a15, a15 +4020e3e9: d7f101 l32r a0, 402043b0 +4020e3ec: 0000c0 callx0 a0 +4020e3ef: cdddf1 l32r a15, 40201b64 +4020e3f2: 02dfe2 addmi a14, a15, 0x200 +4020e3f5: 420e22 l8ui a2, a14, 66 +4020e3f8: 049216 beqz a2, 4020e445 +4020e3fb: e274d1 l32r a13, 40206dcc +4020e3fe: 202dd0 or a2, a13, a13 +4020e401: d7eb01 l32r a0, 402043b0 +4020e404: 0000c0 callx0 a0 +4020e407: ffce31 l32r a3, 4020e340 +4020e40a: 0ad266 bnei a2, 64, 4020e418 +4020e40d: 042c movi.n a4, 32 +4020e40f: 0d2d mov.n a2, a13 +4020e411: ff7305 call0 4020db44 +4020e414: 000946 j 4020e43d +4020e417: 013900 slli a3, a9, 32 +4020e41a: 028745 call0 40210c90 +4020e41d: 125a85 call0 402209c8 +4020e420: 0138 l32i.n a3, a1, 0 +4020e422: d6df51 l32r a5, 40203fa0 +4020e425: 036d mov.n a6, a3 +4020e427: 862f42 l32i a4, a15, 0x218 +4020e42a: d26731 l32r a3, 40202dc8 +4020e42d: 072c movi.n a7, 32 +4020e42f: 0d2d mov.n a2, a13 +4020e431: ffc401 l32r a0, 4020e344 +4020e434: 0000c0 callx0 a0 +4020e437: 125b85 call0 402209f0 +4020e43a: 028845 call0 40210cc0 +4020e43d: 020c movi.n a2, 0 +4020e43f: 424e22 s8i a2, a14, 66 +4020e442: 042285 call0 4021266c +4020e445: 432c22 l32i a2, a12, 0x10c +4020e448: 0c1226 beqi a2, 1, 4020e458 +4020e44b: ffbd31 l32r a3, 4020e340 +4020e44e: 042c movi.n a4, 32 +4020e450: 0c2d mov.n a2, a12 +4020e452: caf001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e455: 0000c0 callx0 a0 +4020e458: 022c movi.n a2, 32 +4020e45a: 8c29 s32i.n a2, a12, 32 +4020e45c: b108 l32i.n a0, a1, 44 +4020e45e: a1c8 l32i.n a12, a1, 40 +4020e460: 91d8 l32i.n a13, a1, 36 +4020e462: 81e8 l32i.n a14, a1, 32 +4020e464: 71f8 l32i.n a15, a1, 28 +4020e466: 30c112 addi a1, a1, 48 +4020e469: f00d ret.n +4020e46b: dab000 excw +4020e46e: fe .byte 0xfe +4020e46f: 3f .byte 0x3f + +4020e470 : +4020e470: f0c112 addi a1, a1, -16 +4020e473: 11d9 s32i.n a13, a1, 4 +4020e475: 02dd mov.n a13, a2 +4020e477: feb821 l32r a2, 4020df58 +4020e47a: 21c9 s32i.n a12, a1, 8 +4020e47c: 542232 l32i a3, a2, 0x150 +4020e47f: 3109 s32i.n a0, a1, 12 +4020e481: 20c220 or a12, a2, a2 +4020e484: 089366 bnei a3, 10, 4020e490 +4020e487: fff921 l32r a2, 4020e46c +4020e48a: d6cc01 l32r a0, 40203fbc +4020e48d: 0000c0 callx0 a0 +4020e490: 3108 l32i.n a0, a1, 12 +4020e492: 546cd2 s32i a13, a12, 0x150 +4020e495: 21c8 l32i.n a12, a1, 8 +4020e497: 11d8 l32i.n a13, a1, 4 +4020e499: 10c112 addi a1, a1, 16 +4020e49c: f00d ret.n + ... + +4020e4a0 : +4020e4a0: feae21 l32r a2, 4020df58 +4020e4a3: f0c112 addi a1, a1, -16 +4020e4a6: 036102 s32i a0, a1, 12 +4020e4a9: 806232 s32i a3, a2, 0x200 +4020e4ac: 042132 l32i a3, a1, 16 +4020e4af: 01d282 addmi a8, a2, 0x100 +4020e4b2: 856232 s32i a3, a2, 0x214 +4020e4b5: 00a032 movi a3, 0 +4020e4b8: 190c movi.n a9, 1 +4020e4ba: 816242 s32i a4, a2, 0x204 +4020e4bd: 826252 s32i a5, a2, 0x208 +4020e4c0: 836262 s32i a6, a2, 0x20c +4020e4c3: 846272 s32i a7, a2, 0x210 +4020e4c6: 7e6232 s32i a3, a2, 0x1f8 +4020e4c9: 120c movi.n a2, 1 +4020e4cb: 384892 s8i a9, a8, 56 +4020e4ce: 644832 s8i a3, a8, 100 +4020e4d1: fff9c5 call0 4020e470 +4020e4d4: 3108 l32i.n a0, a1, 12 +4020e4d6: 10c112 addi a1, a1, 16 +4020e4d9: f00d ret.n +4020e4db: c11200 mul16u a1, a2, a0 +4020e4de: 61d2f0 xsr.excsave2 a15 +4020e4e1: d22001 l32r a0, 40202d64 +4020e4e4: 920c20 excw +4020e4e7: 3109 s32i.n a0, a1, 12 +4020e4e9: 21c9 s32i.n a12, a1, 8 +4020e4eb: 01e9 s32i.n a14, a1, 0 +4020e4ed: 20e330 or a14, a3, a3 +4020e4f0: fff7c5 call0 4020e470 +4020e4f3: fe99c1 l32r a12, 4020df58 +4020e4f6: 852c22 l32i a2, a12, 0x214 +4020e4f9: 0002c0 callx0 a2 +4020e4fc: 0c2d mov.n a2, a12 +4020e4fe: 7e8c beqz.n a14, 4020e509 +4020e500: 150c movi.n a5, 1 +4020e502: 340c movi.n a4, 3 +4020e504: 0d3d mov.n a3, a13 +4020e506: 01be45 call0 402100ec +4020e509: 3108 l32i.n a0, a1, 12 +4020e50b: 21c8 l32i.n a12, a1, 8 +4020e50d: 11d8 l32i.n a13, a1, 4 +4020e50f: 01e8 l32i.n a14, a1, 0 +4020e511: 10c112 addi a1, a1, 16 +4020e514: f00d ret.n +4020e516: fc0000 excw +4020e519: feda add.n a15, a14, a13 +4020e51b: 3f .byte 0x3f +4020e51c: d9d8 l32i.n a13, a9, 52 +4020e51e: fe .byte 0xfe +4020e51f: 3f .byte 0x3f +4020e520: 20e304 excw +4020e523: 000140 excw +4020e526: a88000 excw +4020e529: de .byte 0xde +4020e52a: 00 .byte 00 +4020e52b: 40 .byte 0x40 + +4020e52c : +4020e52c: cd8e31 l32r a3, 40201b64 +4020e52f: 90a092 movi a9, 144 +4020e532: c01190 sub a1, a1, a9 +4020e535: 4338 l32i.n a3, a3, 16 +4020e537: 236102 s32i a0, a1, 140 +4020e53a: 2261c2 s32i a12, a1, 136 +4020e53d: 2161d2 s32i a13, a1, 132 +4020e540: 2061e2 s32i a14, a1, 128 +4020e543: 1f61f2 s32i a15, a1, 124 +4020e546: 243316 beqz a3, 4020e78d +4020e549: 112332 l32i a3, a3, 68 +4020e54c: 025326 beqi a3, 5, 4020e552 +4020e54f: 008e86 j 4020e78d +4020e552: fe81c1 l32r a12, 4020df58 +4020e555: 02d8 l32i.n a13, a2, 0 +4020e557: 542c22 l32i a2, a12, 0x150 +4020e55a: 028266 bnei a2, 8, 4020e560 +4020e55d: 0036c6 j 4020e63c +4020e560: b30c movi.n a3, 11 +4020e562: 029237 bne a2, a3, 4020e568 +4020e565: 008546 j 4020e77e +4020e568: 027226 beqi a2, 7, 4020e56e +4020e56b: 008786 j 4020e78d +4020e56e: 0d0d22 l8ui a2, a13, 13 +4020e571: 02e267 bbsi a2, 6, 4020e577 +4020e574: 008546 j 4020e78d +4020e577: 02dc22 addmi a2, a12, 0x200 +4020e57a: 2612e2 l16ui a14, a2, 76 +4020e57d: 01dc22 addmi a2, a12, 0x100 +4020e580: 640232 l8ui a3, a2, 100 +4020e583: 02fd mov.n a15, a2 +4020e585: 061316 beqz a3, 4020e5ea +4020e588: 5e6e67 bbci a14, 6, 4020e5ea +4020e58b: 412c22 l32i a2, a12, 0x104 +4020e58e: 082226 beqi a2, 2, 4020e59a +4020e591: 0c8226 beqi a2, 8, 4020e5a1 +4020e594: 521226 beqi a2, 1, 4020e5ea +4020e597: 007b46 j 4020e788 +4020e59a: 230c movi.n a3, 2 +4020e59c: 022c movi.n a2, 32 +4020e59e: 0000c6 j 4020e5a5 +4020e5a1: 330c movi.n a3, 3 +4020e5a3: 021c movi.n a2, 16 +4020e5a5: 540c movi.n a4, 5 +4020e5a7: 7e6c42 s32i a4, a12, 0x1f8 +4020e5aa: 2129 s32i.n a2, a1, 8 +4020e5ac: ffdc21 l32r a2, 4020e51c +4020e5af: 3149 s32i.n a4, a1, 12 +4020e5b1: 1129 s32i.n a2, a1, 4 +4020e5b3: 820c movi.n a2, 8 +4020e5b5: 0129 s32i.n a2, a1, 0 +4020e5b7: fe8d71 l32r a7, 4020dfec +4020e5ba: fea341 l32r a4, 4020e048 +4020e5bd: ffd621 l32r a2, 4020e518 +4020e5c0: 01a062 movi a6, 1 +4020e5c3: 00a052 movi a5, 0 +4020e5c6: ff9945 call0 4020df5c +4020e5c9: 1bb296 bltz a2, 4020e788 +4020e5cc: 4f2c22 l32i a2, a12, 0x13c +4020e5cf: 729c beqz.n a2, 4020e5ea +4020e5d1: ffd321 l32r a2, 4020e520 +4020e5d4: 040c movi.n a4, 0 +4020e5d6: 0c3d mov.n a3, a12 +4020e5d8: 01ae85 call0 402100c4 +4020e5db: 060c movi.n a6, 0 +4020e5dd: ffd041 l32r a4, 4020e520 +4020e5e0: 4f2c22 l32i a2, a12, 0x13c +4020e5e3: 0c5d mov.n a5, a12 +4020e5e5: 063d mov.n a3, a6 +4020e5e7: 01ae05 call0 402100c8 +4020e5ea: 820c movi.n a2, 8 +4020e5ec: ffe805 call0 4020e470 +4020e5ef: 922c22 l32i a2, a12, 0x248 +4020e5f2: f29c beqz.n a2, 4020e615 +4020e5f4: 640f22 l8ui a2, a15, 100 +4020e5f7: d2cc bnez.n a2, 4020e608 +4020e5f9: 00a232 movi a3, 0x200 +4020e5fc: fe9321 l32r a2, 4020e048 +4020e5ff: 103e30 and a3, a14, a3 +4020e602: ffed85 call0 4020e4dc +4020e605: 000306 j 4020e615 +4020e608: ffa445 call0 4020e050 +4020e60b: 130c movi.n a3, 1 +4020e60d: b2dc bnez.n a2, 4020e62c +4020e60f: fff986 j 4020e5f9 +4020e612: 000000 ill +4020e615: 0c6e97 bbci a14, 9, 4020e625 +4020e618: 150c movi.n a5, 1 +4020e61a: fe8b31 l32r a3, 4020e048 +4020e61d: 054d mov.n a4, a5 +4020e61f: 202cc0 or a2, a12, a12 +4020e622: 01ac85 call0 402100ec +4020e625: 020c movi.n a2, 0 +4020e627: 644f22 s8i a2, a15, 100 +4020e62a: 030c movi.n a3, 0 +4020e62c: 0d0d42 l8ui a4, a13, 13 +4020e62f: bfaf22 movi a2, -65 +4020e632: 743030 extui a3, a3, 0, 8 +4020e635: 102420 and a2, a4, a2 +4020e638: 004e06 j 4020e774 +4020e63b: 0d2200 excw +4020e63e: 800d excw +4020e640: d60122 l8ui a2, a1, 214 +4020e643: 221472 l16ui a7, a4, 68 +4020e646: 02dc bnez.n a2, 4020e65a +4020e648: 2612f2 l16ui a15, a2, 76 +4020e64b: 922c22 l32i a2, a12, 0x248 +4020e64e: 42cc bnez.n a2, 4020e656 +4020e650: 130c movi.n a3, 1 +4020e652: 004546 j 4020e76b +4020e655: a03200 addx4 a3, a2, a0 +4020e658: 042c00 extui a2, a0, 12, 1 +4020e65b: 10c122 addi a2, a1, 16 +4020e65e: dfa301 l32r a0, 402064ec +4020e661: 0000c0 callx0 a0 +4020e664: fe7631 l32r a3, 4020e03c +4020e667: 422c22 l32i a2, a12, 0x108 +4020e66a: 20e330 or a14, a3, a3 +4020e66d: 2b2266 bnei a2, 2, 4020e69c +4020e670: 10a042 movi a4, 16 +4020e673: 30c122 addi a2, a1, 48 +4020e676: ca6701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e679: 0000c0 callx0 a0 +4020e67c: fe7131 l32r a3, 4020e040 +4020e67f: 840c movi.n a4, 8 +4020e681: 40c122 addi a2, a1, 64 +4020e684: ca6401 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e687: 0000c0 callx0 a0 +4020e68a: fe6e31 l32r a3, 4020e044 +4020e68d: 08a042 movi a4, 8 +4020e690: 48c122 addi a2, a1, 72 +4020e693: ca6001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e696: 0000c0 callx0 a0 +4020e699: 30c1e2 addi a14, a1, 48 +4020e69c: 892c22 l32i a2, a12, 0x224 +4020e69f: 10c162 addi a6, a1, 16 +4020e6a2: 006122 s32i a2, a1, 0 +4020e6a5: 832c82 l32i a8, a12, 0x20c +4020e6a8: 922c72 l32i a7, a12, 0x248 +4020e6ab: 58c152 addi a5, a1, 88 +4020e6ae: 50c142 addi a4, a1, 80 +4020e6b1: 5cc132 addi a3, a1, 92 +4020e6b4: 60c122 addi a2, a1, 96 +4020e6b7: 0008c0 callx0 a8 +4020e6ba: e2ec bnez.n a2, 4020e6ec +4020e6bc: 600122 l8ui a2, a1, 96 +4020e6bf: 92ec bnez.n a2, 4020e6ec +4020e6c1: 862c32 l32i a3, a12, 0x218 +4020e6c4: 172122 l32i a2, a1, 92 +4020e6c7: 219327 bne a3, a2, 4020e6ec +4020e6ca: fe5f31 l32r a3, 4020e048 +4020e6cd: 06a042 movi a4, 6 +4020e6d0: 50c122 addi a2, a1, 80 +4020e6d3: ff9501 l32r a0, 4020e528 +4020e6d6: 0000c0 callx0 a0 +4020e6d9: f2cc bnez.n a2, 4020e6ec +4020e6db: 922c42 l32i a4, a12, 0x248 +4020e6de: 10c132 addi a3, a1, 16 +4020e6e1: 0e2d mov.n a2, a14 +4020e6e3: ff9101 l32r a0, 4020e528 +4020e6e6: 0000c0 callx0 a0 +4020e6e9: 064216 beqz a2, 4020e751 +4020e6ec: 892c22 l32i a2, a12, 0x224 +4020e6ef: 0c4d mov.n a4, a12 +4020e6f1: 321b addi.n a3, a2, 1 +4020e6f3: ff8c21 l32r a2, 4020e524 +4020e6f6: 102320 and a2, a3, a2 +4020e6f9: 0092d6 bgez a2, 4020e706 +4020e6fc: 220b addi.n a2, a2, -1 +4020e6fe: e37c movi.n a3, -2 +4020e700: 202230 or a2, a2, a3 +4020e703: 01c222 addi a2, a2, 1 +4020e706: 0129 s32i.n a2, a1, 0 +4020e708: 832482 l32i a8, a4, 0x20c +4020e70b: 922472 l32i a7, a4, 0x248 +4020e70e: 10c162 addi a6, a1, 16 +4020e711: 58c152 addi a5, a1, 88 +4020e714: 50c142 addi a4, a1, 80 +4020e717: 5cc132 addi a3, a1, 92 +4020e71a: 60c122 addi a2, a1, 96 +4020e71d: 0008c0 callx0 a8 +4020e720: 03e256 bnez a2, 4020e762 +4020e723: 600122 l8ui a2, a1, 96 +4020e726: 82fc bnez.n a2, 4020e762 +4020e728: 862c32 l32i a3, a12, 0x218 +4020e72b: 172122 l32i a2, a1, 92 +4020e72e: 309327 bne a3, a2, 4020e762 +4020e731: fe4531 l32r a3, 4020e048 +4020e734: 640c movi.n a4, 6 +4020e736: 50c122 addi a2, a1, 80 +4020e739: ff7b01 l32r a0, 4020e528 +4020e73c: 0000c0 callx0 a0 +4020e73f: f2dc bnez.n a2, 4020e762 +4020e741: 922c42 l32i a4, a12, 0x248 +4020e744: 10c132 addi a3, a1, 16 +4020e747: 0e2d mov.n a2, a14 +4020e749: ff7701 l32r a0, 4020e528 +4020e74c: 0000c0 callx0 a0 +4020e74f: f2cc bnez.n a2, 4020e762 +4020e751: 00a232 movi a3, 0x200 +4020e754: fe3d21 l32r a2, 4020e048 +4020e757: 103f30 and a3, a15, a3 +4020e75a: ffd805 call0 4020e4dc +4020e75d: 030c movi.n a3, 0 +4020e75f: 000206 j 4020e76b +4020e762: ff8ec5 call0 4020e050 +4020e765: ee7256 bnez a2, 4020e650 +4020e768: fff946 j 4020e751 +4020e76b: 0d0d22 l8ui a2, a13, 13 +4020e76e: 743030 extui a3, a3, 0, 8 +4020e771: 642020 extui a2, a2, 0, 7 +4020e774: 0d4d22 s8i a2, a13, 13 +4020e777: 239c beqz.n a3, 4020e78d +4020e779: 130c movi.n a3, 1 +4020e77b: 000046 j 4020e780 +4020e77e: e30c movi.n a3, 14 +4020e780: 0c2d mov.n a2, a12 +4020e782: 019485 call0 402100cc +4020e785: 000106 j 4020e78d +4020e788: 130c movi.n a3, 1 +4020e78a: ffa786 j 4020e62c +4020e78d: 232102 l32i a0, a1, 140 +4020e790: 90a092 movi a9, 144 +4020e793: 2221c2 l32i a12, a1, 136 +4020e796: 2121d2 l32i a13, a1, 132 +4020e799: 2021e2 l32i a14, a1, 128 +4020e79c: 1f21f2 l32i a15, a1, 124 +4020e79f: 119a add.n a1, a1, a9 +4020e7a1: f00d ret.n +4020e7a3: 208000 or a8, a0, a0 +4020e7a6: f80000 excw +4020e7a9: fed9 s32i.n a13, a14, 60 +4020e7ab: 3f .byte 0x3f +4020e7ac: d9b8 l32i.n a11, a9, 52 +4020e7ae: fe .byte 0xfe +4020e7af: 3f .byte 0x3f +4020e7b0: d9c8 l32i.n a12, a9, 52 +4020e7b2: fe .byte 0xfe +4020e7b3: 3f .byte 0x3f +4020e7b4: dbac beqz.n a11, 4020e7e5 +4020e7b6: fe .byte 0xfe +4020e7b7: 3f .byte 0x3f +4020e7b8: fedbb4 excw +4020e7bb: 3f .byte 0x3f +4020e7bc: feda40 excw +4020e7bf: 3f .byte 0x3f +4020e7c0: 08fa add.n a0, a8, a15 +4020e7c2: 604023 excw +4020e7c5: feda add.n a15, a14, a13 +4020e7c7: 3f .byte 0x3f +4020e7c8: feda90 excw +4020e7cb: 3f .byte 0x3f +4020e7cc: 009410 excw +4020e7cf: 40 .byte 0x40 + +4020e7d0 : +4020e7d0: 90a092 movi a9, 144 +4020e7d3: c01190 sub a1, a1, a9 +4020e7d6: 2261c2 s32i a12, a1, 136 +4020e7d9: 236102 s32i a0, a1, 140 +4020e7dc: 03cd mov.n a12, a3 +4020e7de: 2161d2 s32i a13, a1, 132 +4020e7e1: 2061e2 s32i a14, a1, 128 +4020e7e4: 1f61f2 s32i a15, a1, 124 +4020e7e7: 62a032 movi a3, 98 +4020e7ea: 020c movi.n a2, 0 +4020e7ec: 023347 bltu a3, a4, 4020e7f2 +4020e7ef: 021386 j 4020f041 +4020e7f2: 2c4b addi.n a2, a12, 4 +4020e7f4: 166122 s32i a2, a1, 88 +4020e7f7: 020c22 l8ui a2, a12, 2 +4020e7fa: 030c32 l8ui a3, a12, 3 +4020e7fd: 112280 slli a2, a2, 8 +4020e800: 203230 or a3, a2, a3 +4020e803: 156132 s32i a3, a1, 84 +4020e806: 334b addi.n a3, a3, 4 +4020e808: 186132 s32i a3, a1, 96 +4020e80b: 010c32 l8ui a3, a12, 1 +4020e80e: 020c movi.n a2, 0 +4020e810: 023326 beqi a3, 3, 4020e816 +4020e813: 020a86 j 4020f041 +4020e816: 152122 l32i a2, a1, 84 +4020e819: fcc442 addi a4, a4, -4 +4020e81c: 02b427 bgeu a4, a2, 4020e822 +4020e81f: 014546 j 4020ed38 +4020e822: 152132 l32i a3, a1, 84 +4020e825: e25c movi.n a2, 94 +4020e827: 023237 bltu a2, a3, 4020e82d +4020e82a: 014286 j 4020ed38 +4020e82d: 040c32 l8ui a3, a12, 4 +4020e830: 02af22 movi a2, -254 +4020e833: 232a add.n a2, a3, a2 +4020e835: 007216 beqz a2, 4020e840 +4020e838: 020c movi.n a2, 0 +4020e83a: 022326 beqi a3, 2, 4020e840 +4020e83d: 020006 j 4020f041 +4020e840: 050cd2 l8ui a13, a12, 5 +4020e843: 112d80 slli a2, a13, 8 +4020e846: 060cd2 l8ui a13, a12, 6 +4020e849: 20dd20 or a13, a13, a2 +4020e84c: 2440d0 extui a4, a13, 0, 3 +4020e84f: ffc422 addi a2, a4, -1 +4020e852: 146142 s32i a4, a1, 80 +4020e855: f42020 extui a2, a2, 0, 16 +4020e858: 0222b6 bltui a2, 2, 4020e85e +4020e85b: 014d46 j 4020ed94 +4020e85e: fdbe81 l32r a8, 4020df58 +4020e861: 412822 l32i a2, a8, 0x104 +4020e864: 20f880 or a15, a8, a8 +4020e867: 118266 bnei a2, 8, 4020e87c +4020e86a: 0e2426 beqi a4, 2, 4020e87c +4020e86d: 422822 l32i a2, a8, 0x108 +4020e870: 028266 bnei a2, 8, 4020e876 +4020e873: 014746 j 4020ed94 +4020e876: 026d37 bbci a13, 3, 4020e87c +4020e879: 0145c6 j 4020ed94 +4020e87c: 3e2f22 l32i a2, a15, 248 +4020e87f: a2cc bnez.n a2, 4020e88d +4020e881: ffc821 l32r a2, 4020e7a4 +4020e884: 028d27 bany a13, a2, 4020e88a +4020e887: 014246 j 4020ed94 +4020e88a: 000646 j 4020e8a7 +4020e88d: fea831 l32r a3, 4020e330 +4020e890: 08a042 movi a4, 8 +4020e893: 09cc22 addi a2, a12, 9 +4020e896: cce101 l32r a0, 40201c1c +4020e899: 0000c0 callx0 a0 +4020e89c: 0212e6 bgei a2, 1, 4020e8a2 +4020e89f: 013c46 j 4020ed94 +4020e8a2: fff6c6 j 4020e881 +4020e8a5: b70000 excw +4020e8a8: 026d mov.n a6, a2 +4020e8aa: 013986 j 4020ed94 +4020e8ad: 00a122 movi a2, 0x100 +4020e8b0: 102d20 and a2, a13, a2 +4020e8b3: 176122 s32i a2, a1, 92 +4020e8b6: b2dc bnez.n a2, 4020e8d5 +4020e8b8: 610ce2 l8ui a14, a12, 97 +4020e8bb: 152132 l32i a3, a1, 84 +4020e8be: 112e80 slli a2, a14, 8 +4020e8c1: 620ce2 l8ui a14, a12, 98 +4020e8c4: 20ee20 or a14, a14, a2 +4020e8c7: a1c322 addi a2, a3, -95 +4020e8ca: 0e5d mov.n a5, a14 +4020e8cc: 02b2e7 bgeu a2, a14, 4020e8d2 +4020e8cf: 013046 j 4020ed94 +4020e8d2: 001686 j 4020e930 +4020e8d5: 041c movi.n a4, 16 +4020e8d7: 51cce2 addi a14, a12, 81 +4020e8da: 0e3d mov.n a3, a14 +4020e8dc: 214a add.n a2, a1, a4 +4020e8de: c9cd01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e8e1: 0000c0 callx0 a0 +4020e8e4: 2a2f22 l32i a2, a15, 168 +4020e8e7: 452216 beqz a2, 4020ed3d +4020e8ea: 041c movi.n a4, 16 +4020e8ec: 00a032 movi a3, 0 +4020e8ef: 202ee0 or a2, a14, a14 +4020e8f2: c9c701 l32r a0, 40201010 <_irom0_text_start> +4020e8f5: 0000c0 callx0 a0 +4020e8f8: 182152 l32i a5, a1, 96 +4020e8fb: 142132 l32i a3, a1, 80 +4020e8fe: ffaa21 l32r a2, 4020e7a8 +4020e901: 0e6d mov.n a6, a14 +4020e903: 0c4d mov.n a4, a12 +4020e905: 00b585 call0 4020f460 +4020e908: 041c movi.n a4, 16 +4020e90a: 0e3d mov.n a3, a14 +4020e90c: 214a add.n a2, a1, a4 +4020e90e: ccc301 l32r a0, 40201c1c +4020e911: 0000c0 callx0 a0 +4020e914: ffa531 l32r a3, 4020e7a8 +4020e917: 422256 bnez a2, 4020ed3d +4020e91a: 2a6f22 s32i a2, a15, 168 +4020e91d: 120c movi.n a2, 1 +4020e91f: 296f22 s32i a2, a15, 164 +4020e922: ffa221 l32r a2, 4020e7ac +4020e925: 044c movi.n a4, 64 +4020e927: c9bb01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e92a: 0000c0 callx0 a0 +4020e92d: 010f46 j 4020ed6e +4020e930: 532f22 l32i a2, a15, 0x14c +4020e933: 022226 beqi a2, 2, 4020e939 +4020e936: 002606 j 4020e9d2 +4020e939: 02edc7 bbsi a13, 12, 4020e93f +4020e93c: 002486 j 4020e9d2 +4020e93f: 292f22 l32i a2, a15, 164 +4020e942: 44e216 beqz a2, 4020ed94 +4020e945: 142142 l32i a4, a1, 80 +4020e948: 341466 bnei a4, 1, 4020e980 +4020e94b: 041c movi.n a4, 16 +4020e94d: 31cc32 addi a3, a12, 49 +4020e950: 214a add.n a2, a1, a4 +4020e952: c9b001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e955: 0000c0 callx0 a0 +4020e958: ff9631 l32r a3, 4020e7b0 +4020e95b: 041c movi.n a4, 16 +4020e95d: 20c122 addi a2, a1, 32 +4020e960: c9ad01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e963: 0000c0 callx0 a0 +4020e966: 0e6d mov.n a6, a14 +4020e968: 63cc52 addi a5, a12, 99 +4020e96b: 00a142 movi a4, 0x100 +4020e96e: 032c movi.n a3, 32 +4020e970: 10c122 addi a2, a1, 16 +4020e973: f83101 l32r a0, 4020ca38 +4020e976: 0000c0 callx0 a0 +4020e979: 049216 beqz a2, 4020e9c6 +4020e97c: 010506 j 4020ed94 +4020e97f: 20e000 or a14, a0, a0 +4020e982: d25624 excw +4020e985: cee240 excw +4020e988: 62f8 l32i.n a15, a2, 24 +4020e98a: 6bcc bnez.n a11, 4020e994 +4020e98c: 63cc72 addi a7, a12, 99 +4020e98f: f4e0e0 extui a14, a14, 0, 16 +4020e992: ff8721 l32r a2, 4020e7b0 +4020e995: 065d mov.n a5, a6 +4020e997: 074d mov.n a4, a7 +4020e999: 4133e0 srli a3, a14, 3 +4020e99c: 196162 s32i a6, a1, 100 +4020e99f: 1a6172 s32i a7, a1, 104 +4020e9a2: ff8a01 l32r a0, 4020e7cc +4020e9a5: 0000c0 callx0 a0 +4020e9a8: 192162 l32i a6, a1, 100 +4020e9ab: 1a2172 l32i a7, a1, 104 +4020e9ae: 3e2256 bnez a2, 4020ed94 +4020e9b1: 0e4d mov.n a4, a14 +4020e9b3: 063d mov.n a3, a6 +4020e9b5: 072d mov.n a2, a7 +4020e9b7: c99701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020e9ba: 0000c0 callx0 a0 +4020e9bd: 4128e0 srli a2, a14, 8 +4020e9c0: 614c22 s8i a2, a12, 97 +4020e9c3: 624ce2 s8i a14, a12, 98 +4020e9c6: 610c52 l8ui a5, a12, 97 +4020e9c9: 112580 slli a2, a5, 8 +4020e9cc: 620c52 l8ui a5, a12, 98 +4020e9cf: 205520 or a5, a5, a2 +4020e9d2: 02ed37 bbsi a13, 3, 4020e9d8 +4020e9d5: 0047c6 j 4020eaf8 +4020e9d8: 023c movi.n a2, 48 +4020e9da: 020d27 bnone a13, a2, 4020e9e0 +4020e9dd: 00ecc6 j 4020ed94 +4020e9e0: 172122 l32i a2, a1, 92 +4020e9e3: 0be216 beqz a2, 4020eaa5 +4020e9e6: 720c movi.n a2, 7 +4020e9e8: ffa845 call0 4020e470 +4020e9eb: 050cd2 l8ui a13, a12, 5 +4020e9ee: 620c32 l8ui a3, a12, 98 +4020e9f1: 112d80 slli a2, a13, 8 +4020e9f4: 060cd2 l8ui a13, a12, 6 +4020e9f7: 10c142 addi a4, a1, 16 +4020e9fa: 20dd20 or a13, a13, a2 +4020e9fd: 610c22 l8ui a2, a12, 97 +4020ea00: 112280 slli a2, a2, 8 +4020ea03: 203320 or a3, a3, a2 +4020ea06: 63cc22 addi a2, a12, 99 +4020ea09: ff3445 call0 4020dd50 +4020ea0c: 9128 l32i.n a2, a1, 36 +4020ea0e: 005216 beqz a2, 4020ea17 +4020ea11: 02edc7 bbsi a13, 12, 4020ea17 +4020ea14: 00ea86 j 4020edc2 +4020ea17: 552f22 l32i a2, a15, 0x154 +4020ea1a: 82cc bnez.n a2, 4020ea26 +4020ea1c: 562f22 l32i a2, a15, 0x158 +4020ea1f: 32cc bnez.n a2, 4020ea26 +4020ea21: 0f2d mov.n a2, a15 +4020ea23: 016cc5 call0 402100f0 +4020ea26: 4128 l32i.n a2, a1, 16 +4020ea28: 12ec bnez.n a2, 4020ea4d +4020ea2a: 6128 l32i.n a2, a1, 24 +4020ea2c: 528c beqz.n a2, 4020ea35 +4020ea2e: 6158 l32i.n a5, a1, 24 +4020ea30: 15fc bnez.n a5, 4020ea65 +4020ea32: 001486 j 4020ea88 +4020ea35: 552f22 l32i a2, a15, 0x154 +4020ea38: 42cc bnez.n a2, 4020ea40 +4020ea3a: 562f22 l32i a2, a15, 0x158 +4020ea3d: fed216 beqz a2, 4020ea2e +4020ea40: 131c movi.n a3, 17 +4020ea42: 0f2d mov.n a2, a15 +4020ea44: 016ac5 call0 402100f4 +4020ea47: 00ddc6 j 4020edc2 +4020ea4a: 000000 ill +4020ea4d: 552f32 l32i a3, a15, 0x154 +4020ea50: fda316 beqz a3, 4020ea2e +4020ea53: 5148 l32i.n a4, a1, 20 +4020ea55: 572f52 l32i a5, a15, 0x15c +4020ea58: e49457 bne a4, a5, 4020ea40 +4020ea5b: cc7001 l32r a0, 40201c1c +4020ea5e: 0000c0 callx0 a0 +4020ea61: fff606 j 4020ea3d +4020ea64: 2f3200 excw +4020ea67: c39c56 bnez a12, 4020e6a4 +4020ea6a: 432f22 l32i a2, a15, 0x10c +4020ea6d: dfaf42 movi a4, -33 +4020ea70: e0c222 addi a2, a2, -32 +4020ea73: 104240 and a4, a2, a4 +4020ea76: 160c movi.n a6, 1 +4020ea78: 020c movi.n a2, 0 +4020ea7a: 832640 moveqz a2, a6, a4 +4020ea7d: 7168 l32i.n a6, a1, 28 +4020ea7f: 582f42 l32i a4, a15, 0x160 +4020ea82: 00a2c5 call0 4020f4b0 +4020ea85: fb7256 bnez a2, 4020ea40 +4020ea88: 532f22 l32i a2, a15, 0x14c +4020ea8b: 021226 beqi a2, 1, 4020ea91 +4020ea8e: 00c1c6 j 4020ed99 +4020ea91: 6128 l32i.n a2, a1, 24 +4020ea93: 302216 beqz a2, 4020ed99 +4020ea96: 562f22 l32i a2, a15, 0x158 +4020ea99: 2fc256 bnez a2, 4020ed99 +4020ea9c: 452f22 l32i a2, a15, 0x114 +4020ea9f: f9d256 bnez a2, 4020ea40 +4020eaa2: 00bcc6 j 4020ed99 +4020eaa5: 02df32 addmi a3, a15, 0x200 +4020eaa8: 4e0322 l8ui a2, a3, 78 +4020eaab: 221b addi.n a2, a2, 1 +4020eaad: 742020 extui a2, a2, 0, 8 +4020eab0: 4e4322 s8i a2, a3, 78 +4020eab3: 0942b6 bltui a2, 4, 4020eac0 +4020eab6: 0fa022 movi a2, 15 +4020eab9: 00e6c5 call0 4020f928 +4020eabc: 00b506 j 4020ed94 +4020eabf: a02200 addx4 a2, a2, a0 +4020eac2: 9ac506 j 401f55da <_lit4_end+0xef2ae> +4020eac5: ff .byte 0xff +4020eac6: 24a042 movi a4, 36 +4020eac9: 030c movi.n a3, 0 +4020eacb: 10c122 addi a2, a1, 16 +4020eace: c95001 l32r a0, 40201010 <_irom0_text_start> +4020ead1: 0000c0 callx0 a0 +4020ead4: 532f22 l32i a2, a15, 0x14c +4020ead7: 142266 bnei a2, 2, 4020eaef +4020eada: 610c22 l8ui a2, a12, 97 +4020eadd: 620c32 l8ui a3, a12, 98 +4020eae0: 112280 slli a2, a2, 8 +4020eae3: 203320 or a3, a3, a2 +4020eae6: 10c142 addi a4, a1, 16 +4020eae9: 63cc22 addi a2, a12, 99 +4020eaec: ff2605 call0 4020dd50 +4020eaef: 8f28 l32i.n a2, a15, 32 +4020eaf1: 407256 bnez a2, 4020eefc +4020eaf4: 00b286 j 4020edc2 +4020eaf7: 212200 srai a2, a0, 2 +4020eafa: 52cc17 bnall a12, a1, 4020eb50 +4020eafd: 120c movi.n a2, 1 +4020eaff: 014f86 j 4020f041 +4020eb02: e10000 excw +4020eb05: ff2c movi.n a15, 47 +4020eb07: 030c movi.n a3, 0 +4020eb09: 443c movi.n a4, 52 +4020eb0b: 0e2d mov.n a2, a14 +4020eb0d: 196152 s32i a5, a1, 100 +4020eb10: c94001 l32r a0, 40201010 <_irom0_text_start> +4020eb13: 0000c0 callx0 a0 +4020eb16: 050cd2 l8ui a13, a12, 5 +4020eb19: 620c32 l8ui a3, a12, 98 +4020eb1c: 112d80 slli a2, a13, 8 +4020eb1f: 060cd2 l8ui a13, a12, 6 +4020eb22: 0e6d mov.n a6, a14 +4020eb24: 20dd20 or a13, a13, a2 +4020eb27: 610c22 l8ui a2, a12, 97 +4020eb2a: 192152 l32i a5, a1, 100 +4020eb2d: 112280 slli a2, a2, 8 +4020eb30: 207320 or a7, a3, a2 +4020eb33: 532f22 l32i a2, a15, 0x14c +4020eb36: 6e2266 bnei a2, 2, 4020eba8 +4020eb39: 10c142 addi a4, a1, 16 +4020eb3c: 073d mov.n a3, a7 +4020eb3e: 63cc22 addi a2, a12, 99 +4020eb41: 1961e2 s32i a14, a1, 100 +4020eb44: ff2085 call0 4020dd50 +4020eb47: 9128 l32i.n a2, a1, 36 +4020eb49: 192162 l32i a6, a1, 100 +4020eb4c: 06a216 beqz a2, 4020ebba +4020eb4f: 676dc7 bbci a13, 12, 4020ebba +4020eb52: a138 l32i.n a3, a1, 40 +4020eb54: ff1951 l32r a5, 4020e7b8 +4020eb57: fec332 addi a3, a3, -2 +4020eb5a: 422f22 l32i a2, a15, 0x108 +4020eb5d: 926f32 s32i a3, a15, 0x248 +4020eb60: 034d mov.n a4, a3 +4020eb62: 013d85 call0 4020ff3c +4020eb65: 051256 bnez a2, 4020ebba +4020eb68: 9138 l32i.n a3, a1, 36 +4020eb6a: 050c movi.n a5, 0 +4020eb6c: 000322 l8ui a2, a3, 0 +4020eb6f: 142020 extui a2, a2, 0, 2 +4020eb72: 896f22 s32i a2, a15, 0x224 +4020eb75: 000342 l8ui a4, a3, 0 +4020eb78: 420c movi.n a2, 4 +4020eb7a: 104420 and a4, a4, a2 +4020eb7d: 120c movi.n a2, 1 +4020eb7f: 832540 moveqz a2, a5, a4 +4020eb82: 071457 beq a4, a5, 4020eb8d +4020eb85: 412f42 l32i a4, a15, 0x104 +4020eb88: 440b addi.n a4, a4, -1 +4020eb8a: 932540 movnez a2, a5, a4 +4020eb8d: a148 l32i.n a4, a1, 40 +4020eb8f: 876f22 s32i a2, a15, 0x21c +4020eb92: fec442 addi a4, a4, -2 +4020eb95: 022c movi.n a2, 32 +4020eb97: 1f3247 bltu a2, a4, 4020ebba +4020eb9a: fd2821 l32r a2, 4020e03c +4020eb9d: 332b addi.n a3, a3, 2 +4020eb9f: c91d01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020eba2: 0000c0 callx0 a0 +4020eba5: 0036c6 j 4020ec84 +4020eba8: 070c32 l8ui a3, a12, 7 +4020ebab: 080c22 l8ui a2, a12, 8 +4020ebae: 113380 slli a3, a3, 8 +4020ebb1: 203230 or a3, a2, a3 +4020ebb4: 926f32 s32i a3, a15, 0x248 +4020ebb7: 05b577 bgeu a5, a7, 4020ebc0 +4020ebba: fe7c movi.n a14, -1 +4020ebbc: 003186 j 4020ec86 +4020ebbf: 214200 srai a4, a0, 2 +4020ebc2: 246614 excw +4020ebc5: e20b addi.n a14, a2, -1 +4020ebc7: f6f8c7 bbsi a8, 28, 4020ebc1 +4020ebca: 860787 bnone a7, a8, 4020eb54 +4020ebcd: fffa add.n a15, a15, a15 +4020ebcf: 000000 ill +4020ebd2: 07ed mov.n a14, a7 +4020ebd4: 422f22 l32i a2, a15, 0x108 +4020ebd7: fef851 l32r a5, 4020e7b8 +4020ebda: 0e4d mov.n a4, a14 +4020ebdc: 1a6172 s32i a7, a1, 104 +4020ebdf: 0135c5 call0 4020ff3c +4020ebe2: 1a2172 l32i a7, a1, 104 +4020ebe5: fd1256 bnez a2, 4020ebba +4020ebe8: 1424d0 extui a2, a13, 4, 2 +4020ebeb: 896f22 s32i a2, a15, 0x224 +4020ebee: 142122 l32i a2, a1, 80 +4020ebf1: 4f1266 bnei a2, 1, 4020ec44 +4020ebf4: 041c movi.n a4, 16 +4020ebf6: 31cc32 addi a3, a12, 49 +4020ebf9: 802140 add a2, a1, a4 +4020ebfc: 1a6172 s32i a7, a1, 104 +4020ebff: c90501 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ec02: 0000c0 callx0 a0 +4020ec05: feea31 l32r a3, 4020e7b0 +4020ec08: 10a042 movi a4, 16 +4020ec0b: 20c122 addi a2, a1, 32 +4020ec0e: c90101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ec11: 0000c0 callx0 a0 +4020ec14: 1a2172 l32i a7, a1, 104 +4020ec17: 022c movi.n a2, 32 +4020ec19: 9d3277 bltu a2, a7, 4020ebba +4020ec1c: fd08e1 l32r a14, 4020e03c +4020ec1f: 074d mov.n a4, a7 +4020ec21: 63cc32 addi a3, a12, 99 +4020ec24: 0e2d mov.n a2, a14 +4020ec26: c8fb01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ec29: 0000c0 callx0 a0 +4020ec2c: 1a2172 l32i a7, a1, 104 +4020ec2f: 0e5d mov.n a5, a14 +4020ec31: 076d mov.n a6, a7 +4020ec33: 00a142 movi a4, 0x100 +4020ec36: 032c movi.n a3, 32 +4020ec38: 10c122 addi a2, a1, 16 +4020ec3b: f77f01 l32r a0, 4020ca38 +4020ec3e: 0000c0 callx0 a0 +4020ec41: 000806 j 4020ec65 +4020ec44: 242070 extui a2, a7, 0, 3 +4020ec47: f6f256 bnez a2, 4020ebba +4020ec4a: 20a022 movi a2, 32 +4020ec4d: 02b2e7 bgeu a2, a14, 4020ec53 +4020ec50: ffd986 j 4020ebba +4020ec53: fcfa51 l32r a5, 4020e03c +4020ec56: fed621 l32r a2, 4020e7b0 +4020ec59: 63cc42 addi a4, a12, 99 +4020ec5c: 4133e0 srli a3, a14, 3 +4020ec5f: fedb01 l32r a0, 4020e7cc +4020ec62: 0000c0 callx0 a0 +4020ec65: f51256 bnez a2, 4020ebba +4020ec68: 034c movi.n a3, 64 +4020ec6a: 103d30 and a3, a13, a3 +4020ec6d: 040c movi.n a4, 0 +4020ec6f: 120c movi.n a2, 1 +4020ec71: 832430 moveqz a2, a4, a3 +4020ec74: 091347 beq a3, a4, 4020ec81 +4020ec77: 412f32 l32i a3, a15, 0x104 +4020ec7a: 040c movi.n a4, 0 +4020ec7c: 330b addi.n a3, a3, -1 +4020ec7e: 932430 movnez a2, a4, a3 +4020ec81: 876f22 s32i a2, a15, 0x21c +4020ec84: 0e0c movi.n a14, 0 +4020ec86: 820c movi.n a2, 8 +4020ec88: ff7e45 call0 4020e470 +4020ec8b: 133e56 bnez a14, 4020edc2 +4020ec8e: 162122 l32i a2, a1, 88 +4020ec91: 00a032 movi a3, 0 +4020ec94: ff35c5 call0 4020dff4 +4020ec97: 02df22 addmi a2, a15, 0x200 +4020ec9a: 2652d2 s16i a13, a2, 76 +4020ec9d: 10c172 addi a7, a1, 16 +4020eca0: 34c162 addi a6, a1, 52 +4020eca3: f55c movi.n a5, 95 +4020eca5: 040c movi.n a4, 0 +4020eca7: 330c movi.n a3, 3 +4020eca9: 0f2d mov.n a2, a15 +4020ecab: 00f445 call0 4020fbf0 +4020ecae: 02ed mov.n a14, a2 +4020ecb0: 10e216 beqz a2, 4020edc2 +4020ecb3: 7f2f32 l32i a3, a15, 0x1fc +4020ecb6: 80af22 movi a2, -128 +4020ecb9: 0d0342 l8ui a4, a3, 13 +4020ecbc: 260c movi.n a6, 2 +4020ecbe: 202420 or a2, a4, a2 +4020ecc1: 0d4322 s8i a2, a3, 13 +4020ecc4: 532f52 l32i a5, a15, 0x14c +4020ecc7: 4128 l32i.n a2, a1, 16 +4020ecc9: fec542 addi a4, a5, -2 +4020eccc: fea032 movi a3, 254 +4020eccf: 833640 moveqz a3, a6, a4 +4020ecd2: 004232 s8i a3, a2, 0 +4020ecd5: 033c movi.n a3, 48 +4020ecd7: 10dd30 and a13, a13, a3 +4020ecda: 142132 l32i a3, a1, 80 +4020ecdd: 20d3d0 or a13, a3, a13 +4020ece0: 330c movi.n a3, 3 +4020ece2: 014232 s8i a3, a2, 1 +4020ece5: 0242d2 s8i a13, a2, 2 +4020ece8: 0a9567 bne a5, a6, 4020ecf6 +4020eceb: 030c movi.n a3, 0 +4020eced: 034232 s8i a3, a2, 3 +4020ecf0: 044232 s8i a3, a2, 4 +4020ecf3: 000386 j 4020ed05 +4020ecf6: 02a042 movi a4, 2 +4020ecf9: 07cc32 addi a3, a12, 7 +4020ecfc: 03c222 addi a2, a2, 3 +4020ecff: c8c501 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ed02: 0000c0 callx0 a0 +4020ed05: 4128 l32i.n a2, a1, 16 +4020ed07: 3c9b addi.n a3, a12, 9 +4020ed09: 840c movi.n a4, 8 +4020ed0b: 225b addi.n a2, a2, 5 +4020ed0d: c8c101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ed10: 0000c0 callx0 a0 +4020ed13: 4128 l32i.n a2, a1, 16 +4020ed15: 030c movi.n a3, 0 +4020ed17: 5d4232 s8i a3, a2, 93 +4020ed1a: 5e4232 s8i a3, a2, 94 +4020ed1d: d178 l32i.n a7, a1, 52 +4020ed1f: 4dc222 addi a2, a2, 77 +4020ed22: 0129 s32i.n a2, a1, 0 +4020ed24: fcc951 l32r a5, 4020e048 +4020ed27: 142142 l32i a4, a1, 80 +4020ed2a: fea031 l32r a3, 4020e7ac +4020ed2d: 0e6d mov.n a6, a14 +4020ed2f: 0f2d mov.n a2, a15 +4020ed31: ff3ac5 call0 4020e0e0 +4020ed34: ff7146 j 4020eafd +4020ed37: 020c00 excw +4020ed3a: 00c0c6 j 4020f041 +4020ed3d: 292f22 l32i a2, a15, 164 +4020ed40: 050216 beqz a2, 4020ed94 +4020ed43: 041c movi.n a4, 16 +4020ed45: 030c movi.n a3, 0 +4020ed47: 202ee0 or a2, a14, a14 +4020ed4a: c8b101 l32r a0, 40201010 <_irom0_text_start> +4020ed4d: 0000c0 callx0 a0 +4020ed50: 142132 l32i a3, a1, 80 +4020ed53: 182152 l32i a5, a1, 96 +4020ed56: fe9521 l32r a2, 4020e7ac +4020ed59: 0c4d mov.n a4, a12 +4020ed5b: 0e6d mov.n a6, a14 +4020ed5d: 007005 call0 4020f460 +4020ed60: 041c movi.n a4, 16 +4020ed62: 0e3d mov.n a3, a14 +4020ed64: 214a add.n a2, a1, a4 +4020ed66: cbad01 l32r a0, 40201c1c +4020ed69: 0000c0 callx0 a0 +4020ed6c: 42ec bnez.n a2, 4020ed94 +4020ed6e: ec9b addi.n a14, a12, 9 +4020ed70: fd7021 l32r a2, 4020e330 +4020ed73: 0e3d mov.n a3, a14 +4020ed75: 08a042 movi a4, 8 +4020ed78: c8a701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ed7b: 0000c0 callx0 a0 +4020ed7e: 120c movi.n a2, 1 +4020ed80: 3e6f22 s32i a2, a15, 248 +4020ed83: fe9121 l32r a2, 4020e7c8 +4020ed86: 840c movi.n a4, 8 +4020ed88: 0e3d mov.n a3, a14 +4020ed8a: c8a201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ed8d: 0000c0 callx0 a0 +4020ed90: fec906 j 4020e8b8 +4020ed93: f27c00 excw +4020ed96: 00a9c6 j 4020f041 +4020ed99: fe8a21 l32r a2, 4020e7c4 +4020ed9c: 20a042 movi a4, 32 +4020ed9f: 11cc32 addi a3, a12, 17 +4020eda2: cb9e01 l32r a0, 40201c1c +4020eda5: 0000c0 callx0 a0 +4020eda8: 62dc bnez.n a2, 4020edc2 +4020edaa: 070c22 l8ui a2, a12, 7 +4020edad: 080c32 l8ui a3, a12, 8 +4020edb0: 112280 slli a2, a2, 8 +4020edb3: 202320 or a2, a3, a2 +4020edb6: 412f32 l32i a3, a15, 0x104 +4020edb9: 102326 beqi a3, 2, 4020edcd +4020edbc: 108366 bnei a3, 8, 4020edd0 +4020edbf: 0db226 beqi a2, 16, 4020edd0 +4020edc2: 130c movi.n a3, 1 +4020edc4: 0f2d mov.n a2, a15 +4020edc6: 013045 call0 402100cc +4020edc9: ff4c06 j 4020eafd +4020edcc: c26600 excw +4020edcf: 2122f1 l32r a15, 401d7258 <_lit4_end+0xd0f2c> +4020edd2: a03216 beqz a2, 4020e7d9 +4020edd5: 6f3201 l32r a0, 401eaaa0 <_lit4_end+0xe4774> +4020edd8: 853b addi.n a8, a5, 3 +4020edda: 22ff21 l32r a2, 401d79d8 <_lit4_end+0xd16ac> +4020eddd: df .byte 0xdf +4020edde: 52d202 addmi a0, a2, 0x5200 +4020ede1: a02226 beqi a2, 2, 4020ed85 +4020ede4: 6f2200 excw +4020ede7: 912892 l32i a9, a8, 0x244 +4020edea: 72dc bnez.n a2, 4020ee05 +4020edec: 34c172 addi a7, a1, 52 +4020edef: 4cc162 addi a6, a1, 76 +4020edf2: f55c movi.n a5, 95 +4020edf4: 040c movi.n a4, 0 +4020edf6: 330c movi.n a3, 3 +4020edf8: 0f2d mov.n a2, a15 +4020edfa: 00df45 call0 4020fbf0 +4020edfd: 02ed mov.n a14, a2 +4020edff: fbf216 beqz a2, 4020edc2 +4020ee02: 001f06 j 4020ee82 +4020ee05: 162122 l32i a2, a1, 88 +4020ee08: 00a032 movi a3, 0 +4020ee0b: ff1e85 call0 4020dff4 +4020ee0e: 092152 l32i a5, a1, 36 +4020ee11: fe6821 l32r a2, 4020e7b4 +4020ee14: a1e8 l32i.n a14, a1, 40 +4020ee16: 443c movi.n a4, 52 +4020ee18: 030c movi.n a3, 0 +4020ee1a: 196152 s32i a5, a1, 100 +4020ee1d: c87c01 l32r a0, 40201010 <_irom0_text_start> +4020ee20: 0000c0 callx0 a0 +4020ee23: fece72 addi a7, a14, -2 +4020ee26: 022c movi.n a2, 32 +4020ee28: fe63e1 l32r a14, 4020e7b4 +4020ee2b: 192152 l32i a5, a1, 100 +4020ee2e: 903277 bltu a2, a7, 4020edc2 +4020ee31: 000522 l8ui a2, a5, 0 +4020ee34: 040c movi.n a4, 0 +4020ee36: 142020 extui a2, a2, 0, 2 +4020ee39: 896f22 s32i a2, a15, 0x224 +4020ee3c: 000532 l8ui a3, a5, 0 +4020ee3f: 420c movi.n a2, 4 +4020ee41: 103320 and a3, a3, a2 +4020ee44: 120c movi.n a2, 1 +4020ee46: 832430 moveqz a2, a4, a3 +4020ee49: 071347 beq a3, a4, 4020ee54 +4020ee4c: 412f32 l32i a3, a15, 0x104 +4020ee4f: 330b addi.n a3, a3, -1 +4020ee51: 932430 movnez a2, a4, a3 +4020ee54: 876f22 s32i a2, a15, 0x21c +4020ee57: fc7921 l32r a2, 4020e03c +4020ee5a: 074d mov.n a4, a7 +4020ee5c: 352b addi.n a3, a5, 2 +4020ee5e: 1a6172 s32i a7, a1, 104 +4020ee61: c86c01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020ee64: 0000c0 callx0 a0 +4020ee67: 1a2172 l32i a7, a1, 104 +4020ee6a: fe5351 l32r a5, 4020e7b8 +4020ee6d: 422f22 l32i a2, a15, 0x108 +4020ee70: 926f72 s32i a7, a15, 0x248 +4020ee73: 0e6d mov.n a6, a14 +4020ee75: 074d mov.n a4, a7 +4020ee77: 073d mov.n a3, a7 +4020ee79: 010c05 call0 4020ff3c +4020ee7c: f42256 bnez a2, 4020edc2 +4020ee7f: ffda46 j 4020edec +4020ee82: 7f2f32 l32i a3, a15, 0x1fc +4020ee85: 024c movi.n a2, 64 +4020ee87: 0d0342 l8ui a4, a3, 13 +4020ee8a: 260c movi.n a6, 2 +4020ee8c: 202420 or a2, a4, a2 +4020ee8f: 0d4322 s8i a2, a3, 13 +4020ee92: 532f52 l32i a5, a15, 0x14c +4020ee95: d128 l32i.n a2, a1, 52 +4020ee97: fec542 addi a4, a5, -2 +4020ee9a: fea032 movi a3, 254 +4020ee9d: 833640 moveqz a3, a6, a4 +4020eea0: 004232 s8i a3, a2, 0 +4020eea3: 00a232 movi a3, 0x200 +4020eea6: 10dd30 and a13, a13, a3 +4020eea9: 142132 l32i a3, a1, 80 +4020eeac: 20d3d0 or a13, a3, a13 +4020eeaf: 08a132 movi a3, 0x108 +4020eeb2: 20dd30 or a13, a13, a3 +4020eeb5: 4138d0 srli a3, a13, 8 +4020eeb8: 014232 s8i a3, a2, 1 +4020eebb: 0242d2 s8i a13, a2, 2 +4020eebe: 0a9567 bne a5, a6, 4020eecc +4020eec1: 030c movi.n a3, 0 +4020eec3: 034232 s8i a3, a2, 3 +4020eec6: 044232 s8i a3, a2, 4 +4020eec9: 0002c6 j 4020eed8 +4020eecc: 240c movi.n a4, 2 +4020eece: 3c7b addi.n a3, a12, 7 +4020eed0: 223b addi.n a2, a2, 3 +4020eed2: c85001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020eed5: 0000c0 callx0 a0 +4020eed8: d128 l32i.n a2, a1, 52 +4020eeda: 3c9b addi.n a3, a12, 9 +4020eedc: 840c movi.n a4, 8 +4020eede: 225b addi.n a2, a2, 5 +4020eee0: c84d01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020eee3: 0000c0 callx0 a0 +4020eee6: d128 l32i.n a2, a1, 52 +4020eee8: 030c movi.n a3, 0 +4020eeea: 5d4232 s8i a3, a2, 93 +4020eeed: 5e4232 s8i a3, a2, 94 +4020eef0: 4dc222 addi a2, a2, 77 +4020eef3: 0129 s32i.n a2, a1, 0 +4020eef5: 132172 l32i a7, a1, 76 +4020eef8: ff8a06 j 4020ed24 +4020eefb: 2f2200 excw +4020eefe: 8c3b addi.n a8, a12, 3 +4020ef00: 2e21c2 l32i a12, a1, 184 +4020ef03: fe .byte 0xfe +4020ef04: 032c movi.n a3, 32 +4020ef06: 007bc5 call0 4020f6c4 +4020ef09: eb5256 bnez a2, 4020edc2 +4020ef0c: 3b6f22 s32i a2, a15, 236 +4020ef0f: 412fd2 l32i a13, a15, 0x104 +4020ef12: 034c movi.n a3, 64 +4020ef14: f8cd22 addi a2, a13, -8 +4020ef17: 0d3c movi.n a13, 48 +4020ef19: 93d320 movnez a13, a3, a2 +4020ef1c: fe2921 l32r a2, 4020e7c0 +4020ef1f: 841c movi.n a4, 24 +4020ef21: 34c132 addi a3, a1, 52 +4020ef24: 021605 call0 40211088 +4020ef27: 432f22 l32i a2, a15, 0x10c +4020ef2a: 090c movi.n a9, 0 +4020ef2c: 11cc42 addi a4, a12, 17 +4020ef2f: 7faf32 movi a3, -129 +4020ef32: 80c222 addi a2, a2, -128 +4020ef35: 1e0c movi.n a14, 1 +4020ef37: 156142 s32i a4, a1, 84 +4020ef3a: 102230 and a2, a2, a3 +4020ef3d: 093d mov.n a3, a9 +4020ef3f: 833e20 moveqz a3, a14, a2 +4020ef42: fe1941 l32r a4, 4020e7a8 +4020ef45: 152122 l32i a2, a1, 84 +4020ef48: 21d9 s32i.n a13, a1, 8 +4020ef4a: 1149 s32i.n a4, a1, 4 +4020ef4c: 0129 s32i.n a2, a1, 0 +4020ef4e: 3139 s32i.n a3, a1, 12 +4020ef50: 8f38 l32i.n a3, a15, 32 +4020ef52: fe1a71 l32r a7, 4020e7bc +4020ef55: fc3c61 l32r a6, 4020e048 +4020ef58: fcf751 l32r a5, 4020e334 +4020ef5b: 202ff0 or a2, a15, a15 +4020ef5e: 34c142 addi a4, a1, 52 +4020ef61: 196192 s32i a9, a1, 100 +4020ef64: 005885 call0 4020f4f0 +4020ef67: 192192 l32i a9, a1, 100 +4020ef6a: 01df22 addmi a2, a15, 0x100 +4020ef6d: 2a6fe2 s32i a14, a15, 168 +4020ef70: 6442e2 s8i a14, a2, 100 +4020ef73: 4c2fe2 l32i a14, a15, 0x130 +4020ef76: 296f92 s32i a9, a15, 164 +4020ef79: 4d2fd2 l32i a13, a15, 0x134 +4020ef7c: e42e16 beqz a14, 4020edc2 +4020ef7f: 5fcd52 addi a5, a13, 95 +4020ef82: 4cc162 addi a6, a1, 76 +4020ef85: 34c172 addi a7, a1, 52 +4020ef88: f45050 extui a5, a5, 0, 16 +4020ef8b: 040c movi.n a4, 0 +4020ef8d: 330c movi.n a3, 3 +4020ef8f: 0f2d mov.n a2, a15 +4020ef91: 00c5c5 call0 4020fbf0 +4020ef94: 026d mov.n a6, a2 +4020ef96: e28216 beqz a2, 4020edc2 +4020ef99: 532f52 l32i a5, a15, 0x14c +4020ef9c: d128 l32i.n a2, a1, 52 +4020ef9e: fec542 addi a4, a5, -2 +4020efa1: fea032 movi a3, 254 +4020efa4: 270c movi.n a7, 2 +4020efa6: 833740 moveqz a3, a7, a4 +4020efa9: 004232 s8i a3, a2, 0 +4020efac: 142142 l32i a4, a1, 80 +4020efaf: 130c movi.n a3, 1 +4020efb1: 014232 s8i a3, a2, 1 +4020efb4: 830c movi.n a3, 8 +4020efb6: 203430 or a3, a4, a3 +4020efb9: 024232 s8i a3, a2, 2 +4020efbc: 0a9577 bne a5, a7, 4020efca +4020efbf: 030c movi.n a3, 0 +4020efc1: 034232 s8i a3, a2, 3 +4020efc4: 044232 s8i a3, a2, 4 +4020efc7: 000446 j 4020efdc +4020efca: 240c movi.n a4, 2 +4020efcc: 3c7b addi.n a3, a12, 7 +4020efce: 223b addi.n a2, a2, 3 +4020efd0: 196162 s32i a6, a1, 100 +4020efd3: c81001 l32r a0, 40201014 <_irom0_text_start+0x4> +4020efd6: 0000c0 callx0 a0 +4020efd9: 192162 l32i a6, a1, 100 +4020efdc: d128 l32i.n a2, a1, 52 +4020efde: 3c9b addi.n a3, a12, 9 +4020efe0: 840c movi.n a4, 8 +4020efe2: 225b addi.n a2, a2, 5 +4020efe4: 196162 s32i a6, a1, 100 +4020efe7: c80b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020efea: 0000c0 callx0 a0 +4020efed: d128 l32i.n a2, a1, 52 +4020efef: 7438d0 extui a3, a13, 8, 8 +4020eff2: 5d4232 s8i a3, a2, 93 +4020eff5: 5e42d2 s8i a13, a2, 94 +4020eff8: 0d4d mov.n a4, a13 +4020effa: 0e3d mov.n a3, a14 +4020effc: 5fc222 addi a2, a2, 95 +4020efff: c80501 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f002: 0000c0 callx0 a0 +4020f005: d128 l32i.n a2, a1, 52 +4020f007: fded31 l32r a3, 4020e7bc +4020f00a: 042c movi.n a4, 32 +4020f00c: 0dc222 addi a2, a2, 13 +4020f00f: c80101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f012: 0000c0 callx0 a0 +4020f015: d128 l32i.n a2, a1, 52 +4020f017: 142142 l32i a4, a1, 80 +4020f01a: 4dc222 addi a2, a2, 77 +4020f01d: 132172 l32i a7, a1, 76 +4020f020: 192162 l32i a6, a1, 100 +4020f023: fc0951 l32r a5, 4020e048 +4020f026: fde031 l32r a3, 4020e7a8 +4020f029: 0129 s32i.n a2, a1, 0 +4020f02b: 0f2d mov.n a2, a15 +4020f02d: ff0b05 call0 4020e0e0 +4020f030: 152132 l32i a3, a1, 84 +4020f033: fde421 l32r a2, 4020e7c4 +4020f036: 042c movi.n a4, 32 +4020f038: c7f701 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f03b: 0000c0 callx0 a0 +4020f03e: feaec6 j 4020eafd +4020f041: 232102 l32i a0, a1, 140 +4020f044: 90a092 movi a9, 144 +4020f047: 2221c2 l32i a12, a1, 136 +4020f04a: 2121d2 l32i a13, a1, 132 +4020f04d: 2021e2 l32i a14, a1, 128 +4020f050: 1f21f2 l32i a15, a1, 124 +4020f053: 119a add.n a1, a1, a9 +4020f055: f00d ret.n +4020f057: ac0000 excw +4020f05a: 0f .byte 0xf +4020f05b: ac0200 excw +4020f05e: 0f .byte 0xf +4020f05f: ac0500 excw +4020f062: 0f .byte 0xf +4020f063: 023200 excw +4020f066: 438000 excw +4020f069: 023201 l32r a0, 401cf934 <_lit4_end+0xc9608> +4020f06c: 330001 l32r a0, 401dbc6c <_lit4_end+0xd5940> +4020f06f: 343011 l32r a1, 401dc130 <_lit4_end+0xd5e04> +4020f072: 024220 excw +4020f075: 022203 excw +4020f078: 334002 s8i a0, a0, 51 +4020f07b: 228020 excw +4020f07e: f64111 l32r a1, 4020c984 +4020f081: ff .byte 0xff +4020f082: 203320 or a3, a3, a2 +4020f085: 120c movi.n a2, 1 +4020f087: 261347 beq a3, a4, 4020f0b1 +4020f08a: f3f641 l32r a4, 4020c064 +4020f08d: 80a022 movi a2, 128 +4020f090: 1d1347 beq a3, a4, 4020f0b1 +4020f093: fff241 l32r a4, 4020f05c +4020f096: 220c movi.n a2, 2 +4020f098: 151347 beq a3, a4, 4020f0b1 +4020f09b: f3f141 l32r a4, 4020c060 +4020f09e: 820c movi.n a2, 8 +4020f0a0: 0d1347 beq a3, a4, 4020f0b1 +4020f0a3: ffef21 l32r a2, 4020f060 +4020f0a6: 040c movi.n a4, 0 +4020f0a8: c03320 sub a3, a3, a2 +4020f0ab: 00a122 movi a2, 0x100 +4020f0ae: 932430 movnez a2, a4, a3 +4020f0b1: f00d ret.n +4020f0b3: f20000 excw +4020f0b6: 020050 excw +4020f0b9: 0050f2 s16i a15, a0, 0 +4020f0bc: 50f204 excw +4020f0bf: f20500 excw +4020f0c2: 320050 excw +4020f0c5: 800002 l8ui a0, a0, 128 +4020f0c8: 320143 excw +4020f0cb: 000102 l8ui a0, a1, 0 +4020f0ce: 301133 excw +4020f0d1: 422034 excw +4020f0d4: 220302 l8ui a0, a3, 34 +4020f0d7: 400202 l8ui a0, a2, 64 +4020f0da: 802033 excw +4020f0dd: 411122 l16ui a2, a1, 130 +4020f0e0: 20fff5 excw +4020f0e3: 0c2033 excw +4020f0e6: 134712 s8i a1, a7, 19 +4020f0e9: dc4126 beqi a1, 4, 4020f0c9 +4020f0ec: a022f3 excw +4020f0ef: 134780 excw +4020f0f2: 411d excw +4020f0f4: 0cfff1 l32r a15, 401d24f0 <_lit4_end+0xcc1c4> +4020f0f7: 134722 s8i a2, a7, 19 +4020f0fa: f04115 excw +4020f0fd: ff .byte 0xff +4020f0fe: 820c movi.n a2, 8 +4020f100: 0d1347 beq a3, a4, 4020f111 +4020f103: ffef21 l32r a2, 4020f0c0 +4020f106: 040c movi.n a4, 0 +4020f108: c03320 sub a3, a3, a2 +4020f10b: 00a122 movi a2, 0x100 +4020f10e: 932430 movnez a2, a4, a3 +4020f111: f00d ret.n + ... + +4020f114 : +4020f114: d0c112 addi a1, a1, -48 +4020f117: 81e9 s32i.n a14, a1, 32 +4020f119: 04ed mov.n a14, a4 +4020f11b: a1c9 s32i.n a12, a1, 40 +4020f11d: 91d9 s32i.n a13, a1, 36 +4020f11f: 02cd mov.n a12, a2 +4020f121: 03dd mov.n a13, a3 +4020f123: 042c movi.n a4, 32 +4020f125: 030c movi.n a3, 0 +4020f127: 0e2d mov.n a2, a14 +4020f129: b109 s32i.n a0, a1, 44 +4020f12b: 71f9 s32i.n a15, a1, 28 +4020f12d: c7b801 l32r a0, 40201010 <_irom0_text_start> +4020f130: 0000c0 callx0 a0 +4020f133: 220c movi.n a2, 2 +4020f135: 0e29 s32i.n a2, a14, 0 +4020f137: 820c movi.n a2, 8 +4020f139: 1e29 s32i.n a2, a14, 4 +4020f13b: 2e29 s32i.n a2, a14, 8 +4020f13d: 120c movi.n a2, 1 +4020f13f: 3e29 s32i.n a2, a14, 12 +4020f141: 020c movi.n a2, 0 +4020f143: 4e29 s32i.n a2, a14, 16 +4020f145: 6e29 s32i.n a2, a14, 24 +4020f147: 5e29 s32i.n a2, a14, 20 +4020f149: 7e29 s32i.n a2, a14, 28 +4020f14b: f27c movi.n a2, -1 +4020f14d: 024df6 bgeui a13, 4, 4020f153 +4020f150: 005406 j 4020f2a4 +4020f153: 000c42 l8ui a4, a12, 0 +4020f156: 033c movi.n a3, 48 +4020f158: e27c movi.n a2, -2 +4020f15a: 021437 beq a4, a3, 4020f160 +4020f15d: 0050c6 j 4020f2a4 +4020f160: 010c42 l8ui a4, a12, 1 +4020f163: 3d2a add.n a3, a13, a2 +4020f165: 021437 beq a4, a3, 4020f16b +4020f168: 004e06 j 4020f2a4 +4020f16b: 030c32 l8ui a3, a12, 3 +4020f16e: 112380 slli a2, a3, 8 +4020f171: 020c32 l8ui a3, a12, 2 +4020f174: 203320 or a3, a3, a2 +4020f177: e27c movi.n a2, -2 +4020f179: 021326 beqi a3, 1, 4020f17f +4020f17c: 004906 j 4020f2a4 +4020f17f: fccdd2 addi a13, a13, -4 +4020f182: 2c4b addi.n a2, a12, 4 +4020f184: 0d4da6 blti a13, 4, 4020f195 +4020f187: ffedc5 call0 4020f064 +4020f18a: 2e29 s32i.n a2, a14, 8 +4020f18c: fccd32 addi a3, a13, -4 +4020f18f: 0e23e6 bgei a3, 2, 4020f1a1 +4020f192: 001486 j 4020f1e8 +4020f195: d27c movi.n a2, -3 +4020f197: 021da6 blti a13, 1, 4020f19d +4020f19a: 004186 j 4020f2a4 +4020f19d: 004046 j 4020f2a2 +4020f1a0: a02200 addx4 a2, a2, a0 +4020f1a3: 6e2200 excw +4020f1a6: 0cf201 l32r a0, 401d2570 <_lit4_end+0xcc244> +4020f1a9: d209 s32i.n a0, a2, 52 +4020f1ab: facd excw +4020f1ad: 112f80 slli a2, a15, 8 +4020f1b0: 080cf2 l8ui a15, a12, 8 +4020f1b3: 0accc2 addi a12, a12, 10 +4020f1b6: 20ff20 or a15, a15, a2 +4020f1b9: c27c movi.n a2, -4 +4020f1bb: 0e5f16 beqz a15, 4020f2a4 +4020f1be: 113fe0 slli a3, a15, 2 +4020f1c1: 040c movi.n a4, 0 +4020f1c3: 02ad37 bge a13, a3, 4020f1c9 +4020f1c6: 003686 j 4020f2a4 +4020f1c9: 0c2d mov.n a2, a12 +4020f1cb: 0149 s32i.n a4, a1, 0 +4020f1cd: ffe945 call0 4020f064 +4020f1d0: 1e38 l32i.n a3, a14, 4 +4020f1d2: 0148 l32i.n a4, a1, 0 +4020f1d4: 202320 or a2, a3, a2 +4020f1d7: 1e29 s32i.n a2, a14, 4 +4020f1d9: 441b addi.n a4, a4, 1 +4020f1db: cc4b addi.n a12, a12, 4 +4020f1dd: fccd32 addi a3, a13, -4 +4020f1e0: 09a4f7 bge a4, a15, 4020f1ed +4020f1e3: 03dd mov.n a13, a3 +4020f1e5: fff806 j 4020f1c9 +4020f1e8: b27c movi.n a2, -5 +4020f1ea: 001d06 j 4020f262 +4020f1ed: 6f23a6 blti a3, 2, 4020f260 +4020f1f0: 020c movi.n a2, 0 +4020f1f2: 3e29 s32i.n a2, a14, 12 +4020f1f4: 010c52 l8ui a5, a12, 1 +4020f1f7: 4c2b addi.n a4, a12, 2 +4020f1f9: 112580 slli a2, a5, 8 +4020f1fc: 000c52 l8ui a5, a12, 0 +4020f1ff: facd32 addi a3, a13, -6 +4020f202: 205520 or a5, a5, a2 +4020f205: a27c movi.n a2, -6 +4020f207: 099516 beqz a5, 4020f2a4 +4020f20a: 1165e0 slli a6, a5, 2 +4020f20d: 02a367 bge a3, a6, 4020f213 +4020f210: 002406 j 4020f2a4 +4020f213: 060c movi.n a6, 0 +4020f215: f39371 l32r a7, 4020c064 +4020f218: ff9181 l32r a8, 4020f05c +4020f21b: 290c movi.n a9, 2 +4020f21d: 06ad mov.n a10, a6 +4020f21f: 000422 l8ui a2, a4, 0 +4020f222: 01b280 slli a11, a2, 24 +4020f225: 010422 l8ui a2, a4, 1 +4020f228: 112200 slli a2, a2, 16 +4020f22b: 202b20 or a2, a11, a2 +4020f22e: 0304b2 l8ui a11, a4, 3 +4020f231: 20b2b0 or a11, a2, a11 +4020f234: 020422 l8ui a2, a4, 2 +4020f237: 112280 slli a2, a2, 8 +4020f23a: 202b20 or a2, a11, a2 +4020f23d: 1b0c movi.n a11, 1 +4020f23f: 071277 beq a2, a7, 4020f24a +4020f242: c02280 sub a2, a2, a8 +4020f245: 0abd mov.n a11, a10 +4020f247: 83b920 moveqz a11, a9, a2 +4020f24a: 3e28 l32i.n a2, a14, 12 +4020f24c: 661b addi.n a6, a6, 1 +4020f24e: 2022b0 or a2, a2, a11 +4020f251: 3e29 s32i.n a2, a14, 12 +4020f253: 444b addi.n a4, a4, 4 +4020f255: fcc322 addi a2, a3, -4 +4020f258: 0ca657 bge a6, a5, 4020f268 +4020f25b: 023d mov.n a3, a2 +4020f25d: ffef86 j 4020f21f +4020f260: 927c movi.n a2, -7 +4020f262: 3e1326 beqi a3, 1, 4020f2a4 +4020f265: 000e46 j 4020f2a2 +4020f268: 3622a6 blti a2, 2, 4020f2a2 +4020f26b: 010422 l8ui a2, a4, 1 +4020f26e: 000452 l8ui a5, a4, 0 +4020f271: 112280 slli a2, a2, 8 +4020f274: 202520 or a2, a5, a2 +4020f277: 4e29 s32i.n a2, a14, 16 +4020f279: 020c movi.n a2, 0 +4020f27b: 2583a6 blti a3, 8, 4020f2a4 +4020f27e: 030422 l8ui a2, a4, 3 +4020f281: 020452 l8ui a5, a4, 2 +4020f284: 112280 slli a2, a2, 8 +4020f287: 202520 or a2, a5, a2 +4020f28a: 5e29 s32i.n a2, a14, 20 +4020f28c: f8c332 addi a3, a3, -8 +4020f28f: 1122c0 slli a2, a2, 4 +4020f292: 444b addi.n a4, a4, 4 +4020f294: 08a327 bge a3, a2, 4020f2a0 +4020f297: 020c movi.n a2, 0 +4020f299: 5e29 s32i.n a2, a14, 20 +4020f29b: 727c movi.n a2, -9 +4020f29d: 0000c6 j 4020f2a4 +4020f2a0: 6e49 s32i.n a4, a14, 24 +4020f2a2: 020c movi.n a2, 0 +4020f2a4: b108 l32i.n a0, a1, 44 +4020f2a6: a1c8 l32i.n a12, a1, 40 +4020f2a8: 91d8 l32i.n a13, a1, 36 +4020f2aa: 81e8 l32i.n a14, a1, 32 +4020f2ac: 71f8 l32i.n a15, a1, 28 +4020f2ae: 30c112 addi a1, a1, 48 +4020f2b1: f00d ret.n + ... + +4020f2b4 : +4020f2b4: d0c112 addi a1, a1, -48 +4020f2b7: 81e9 s32i.n a14, a1, 32 +4020f2b9: 04ed mov.n a14, a4 +4020f2bb: a1c9 s32i.n a12, a1, 40 +4020f2bd: 91d9 s32i.n a13, a1, 36 +4020f2bf: 02cd mov.n a12, a2 +4020f2c1: 03dd mov.n a13, a3 +4020f2c3: 042c movi.n a4, 32 +4020f2c5: 030c movi.n a3, 0 +4020f2c7: 0e2d mov.n a2, a14 +4020f2c9: b109 s32i.n a0, a1, 44 +4020f2cb: 71f9 s32i.n a15, a1, 28 +4020f2cd: c75001 l32r a0, 40201010 <_irom0_text_start> +4020f2d0: 0000c0 callx0 a0 +4020f2d3: 120c movi.n a2, 1 +4020f2d5: 230c movi.n a3, 2 +4020f2d7: 0e29 s32i.n a2, a14, 0 +4020f2d9: 3e29 s32i.n a2, a14, 12 +4020f2db: 020c movi.n a2, 0 +4020f2dd: 4e29 s32i.n a2, a14, 16 +4020f2df: 6e29 s32i.n a2, a14, 24 +4020f2e1: 5e29 s32i.n a2, a14, 20 +4020f2e3: 7e29 s32i.n a2, a14, 28 +4020f2e5: 1e39 s32i.n a3, a14, 4 +4020f2e7: 2e39 s32i.n a3, a14, 8 +4020f2e9: f27c movi.n a2, -1 +4020f2eb: 028df6 bgeui a13, 8, 4020f2f1 +4020f2ee: 0055c6 j 4020f449 +4020f2f1: 000c42 l8ui a4, a12, 0 +4020f2f4: dda032 movi a3, 221 +4020f2f7: e27c movi.n a2, -2 +4020f2f9: 021437 beq a4, a3, 4020f2ff +4020f2fc: 005246 j 4020f449 +4020f2ff: 010c42 l8ui a4, a12, 1 +4020f302: 3d2a add.n a3, a13, a2 +4020f304: 021437 beq a4, a3, 4020f30a +4020f307: 004f86 j 4020f449 +4020f30a: 020c22 l8ui a2, a12, 2 +4020f30d: f35341 l32r a4, 4020c05c +4020f310: 013280 slli a3, a2, 24 +4020f313: 030c22 l8ui a2, a12, 3 +4020f316: 112200 slli a2, a2, 16 +4020f319: 202320 or a2, a3, a2 +4020f31c: 050c32 l8ui a3, a12, 5 +4020f31f: 203230 or a3, a2, a3 +4020f322: 040c22 l8ui a2, a12, 4 +4020f325: 112280 slli a2, a2, 8 +4020f328: 203320 or a3, a3, a2 +4020f32b: e27c movi.n a2, -2 +4020f32d: 021347 beq a3, a4, 4020f333 +4020f330: 004546 j 4020f449 +4020f333: 070c32 l8ui a3, a12, 7 +4020f336: 112380 slli a2, a3, 8 +4020f339: 060c32 l8ui a3, a12, 6 +4020f33c: 203320 or a3, a3, a2 +4020f33f: e27c movi.n a2, -2 +4020f341: 021326 beqi a3, 1, 4020f347 +4020f344: 004046 j 4020f449 +4020f347: f8cdd2 addi a13, a13, -8 +4020f34a: 2c8b addi.n a2, a12, 8 +4020f34c: 0d4da6 blti a13, 4, 4020f35d +4020f34f: ffd745 call0 4020f0c4 +4020f352: 2e29 s32i.n a2, a14, 8 +4020f354: fccd32 addi a3, a13, -4 +4020f357: 0e23e6 bgei a3, 2, 4020f369 +4020f35a: 001486 j 4020f3b0 +4020f35d: d27c movi.n a2, -3 +4020f35f: 021da6 blti a13, 1, 4020f365 +4020f362: 0038c6 j 4020f449 +4020f365: 003786 j 4020f447 +4020f368: a02200 addx4 a2, a2, a0 +4020f36b: 6e2200 excw +4020f36e: 0cf201 l32r a0, 401d2738 <_lit4_end+0xcc40c> +4020f371: d20d excw +4020f373: facd excw +4020f375: 112f80 slli a2, a15, 8 +4020f378: 0c0cf2 l8ui a15, a12, 12 +4020f37b: 0eccc2 addi a12, a12, 14 +4020f37e: 20ff20 or a15, a15, a2 +4020f381: c27c movi.n a2, -4 +4020f383: 0c2f16 beqz a15, 4020f449 +4020f386: 113fe0 slli a3, a15, 2 +4020f389: 040c movi.n a4, 0 +4020f38b: 02ad37 bge a13, a3, 4020f391 +4020f38e: 002dc6 j 4020f449 +4020f391: 0c2d mov.n a2, a12 +4020f393: 0149 s32i.n a4, a1, 0 +4020f395: ffd2c5 call0 4020f0c4 +4020f398: 1e38 l32i.n a3, a14, 4 +4020f39a: 0148 l32i.n a4, a1, 0 +4020f39c: 202320 or a2, a3, a2 +4020f39f: 1e29 s32i.n a2, a14, 4 +4020f3a1: 441b addi.n a4, a4, 1 +4020f3a3: cc4b addi.n a12, a12, 4 +4020f3a5: fccd32 addi a3, a13, -4 +4020f3a8: 09a4f7 bge a4, a15, 4020f3b5 +4020f3ab: 03dd mov.n a13, a3 +4020f3ad: fff806 j 4020f391 +4020f3b0: b27c movi.n a2, -5 +4020f3b2: 001e06 j 4020f42e +4020f3b5: 7323a6 blti a3, 2, 4020f42c +4020f3b8: 020c movi.n a2, 0 +4020f3ba: 3e29 s32i.n a2, a14, 12 +4020f3bc: 010c32 l8ui a3, a12, 1 +4020f3bf: facdd2 addi a13, a13, -6 +4020f3c2: 112380 slli a2, a3, 8 +4020f3c5: 000c32 l8ui a3, a12, 0 +4020f3c8: cc2b addi.n a12, a12, 2 +4020f3ca: 203320 or a3, a3, a2 +4020f3cd: a27c movi.n a2, -6 +4020f3cf: 076316 beqz a3, 4020f449 +4020f3d2: 1143e0 slli a4, a3, 2 +4020f3d5: 702d47 blt a13, a4, 4020f449 +4020f3d8: 040c movi.n a4, 0 +4020f3da: f32051 l32r a5, 4020c05c +4020f3dd: ff3661 l32r a6, 4020f0b8 +4020f3e0: ff3571 l32r a7, 4020f0b4 +4020f3e3: 081c movi.n a8, 16 +4020f3e5: 209440 or a9, a4, a4 +4020f3e8: 000c22 l8ui a2, a12, 0 +4020f3eb: 01a280 slli a10, a2, 24 +4020f3ee: 010c22 l8ui a2, a12, 1 +4020f3f1: 112200 slli a2, a2, 16 +4020f3f4: 202a20 or a2, a10, a2 +4020f3f7: 030ca2 l8ui a10, a12, 3 +4020f3fa: 20a2a0 or a10, a2, a10 +4020f3fd: 020c22 l8ui a2, a12, 2 +4020f400: 112280 slli a2, a2, 8 +4020f403: 202a20 or a2, a10, a2 +4020f406: 1a0c movi.n a10, 1 +4020f408: 0c1257 beq a2, a5, 4020f418 +4020f40b: 2a0c movi.n a10, 2 +4020f40d: 071267 beq a2, a6, 4020f418 +4020f410: c02270 sub a2, a2, a7 +4020f413: 09ad mov.n a10, a9 +4020f415: 83a820 moveqz a10, a8, a2 +4020f418: 3e28 l32i.n a2, a14, 12 +4020f41a: 441b addi.n a4, a4, 1 +4020f41c: 2022a0 or a2, a2, a10 +4020f41f: 3e29 s32i.n a2, a14, 12 +4020f421: cc4b addi.n a12, a12, 4 +4020f423: fccdd2 addi a13, a13, -4 +4020f426: be2437 blt a4, a3, 4020f3e8 +4020f429: 0001c6 j 4020f434 +4020f42c: 927c movi.n a2, -7 +4020f42e: 171326 beqi a3, 1, 4020f449 +4020f431: 000486 j 4020f447 +4020f434: 020c movi.n a2, 0 +4020f436: 0f2da6 blti a13, 2, 4020f449 +4020f439: 010c22 l8ui a2, a12, 1 +4020f43c: 000c32 l8ui a3, a12, 0 +4020f43f: 112280 slli a2, a2, 8 +4020f442: 202320 or a2, a3, a2 +4020f445: 4e29 s32i.n a2, a14, 16 +4020f447: 020c movi.n a2, 0 +4020f449: b108 l32i.n a0, a1, 44 +4020f44b: a1c8 l32i.n a12, a1, 40 +4020f44d: 91d8 l32i.n a13, a1, 36 +4020f44f: 81e8 l32i.n a14, a1, 32 +4020f451: 71f8 l32i.n a15, a1, 28 +4020f453: 30c112 addi a1, a1, 48 +4020f456: f00d ret.n +4020f458: a2cc bnez.n a2, 4020f466 +4020f45a: 284000 excw +4020f45d: 00ba add.n a0, a0, a11 +4020f45f: 40 .byte 0x40 + +4020f460 : +4020f460: d0c112 addi a1, a1, -48 +4020f463: 91d9 s32i.n a13, a1, 36 +4020f465: b109 s32i.n a0, a1, 44 +4020f467: a1c9 s32i.n a12, a1, 40 +4020f469: 06dd mov.n a13, a6 +4020f46b: 051326 beqi a3, 1, 4020f474 +4020f46e: 102326 beqi a3, 2, 4020f482 +4020f471: 000ac6 j 4020f4a0 +4020f474: 031c movi.n a3, 16 +4020f476: fff801 l32r a0, 4020f458 +4020f479: 0000c0 callx0 a0 +4020f47c: 02cd mov.n a12, a2 +4020f47e: 000806 j 4020f4a2 +4020f481: 016d00 slli a6, a13, 32 +4020f484: 031c movi.n a3, 16 +4020f486: fff501 l32r a0, 4020f45c +4020f489: 0000c0 callx0 a0 +4020f48c: 02cd mov.n a12, a2 +4020f48e: e2cc bnez.n a2, 4020f4a0 +4020f490: 041c movi.n a4, 16 +4020f492: 013d mov.n a3, a1 +4020f494: 0d2d mov.n a2, a13 +4020f496: c6df01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f499: 0000c0 callx0 a0 +4020f49c: 000086 j 4020f4a2 +4020f49f: fc7c00 excw +4020f4a2: b108 l32i.n a0, a1, 44 +4020f4a4: 0c2d mov.n a2, a12 +4020f4a6: 91d8 l32i.n a13, a1, 36 +4020f4a8: a1c8 l32i.n a12, a1, 40 +4020f4aa: 30c112 addi a1, a1, 48 +4020f4ad: f00d ret.n + ... + +4020f4b0 : +4020f4b0: 080c movi.n a8, 0 +4020f4b2: 190c movi.n a9, 1 +4020f4b4: 03ad mov.n a10, a3 +4020f4b6: 082d mov.n a2, a8 +4020f4b8: 087d mov.n a7, a8 +4020f4ba: 8329a0 moveqz a2, a9, a10 +4020f4bd: f0c112 addi a1, a1, -16 +4020f4c0: 837950 moveqz a7, a9, a5 +4020f4c3: c06460 sub a6, a4, a6 +4020f4c6: 207270 or a7, a2, a7 +4020f4c9: 3109 s32i.n a0, a1, 12 +4020f4cb: 838960 moveqz a8, a9, a6 +4020f4ce: 053d mov.n a3, a5 +4020f4d0: f27c movi.n a2, -1 +4020f4d2: 12b787 bgeu a7, a8, 4020f4e8 +4020f4d5: 202aa0 or a2, a10, a10 +4020f4d8: c9d101 l32r a0, 40201c1c +4020f4db: 0000c0 callx0 a0 +4020f4de: 030c movi.n a3, 0 +4020f4e0: 140c movi.n a4, 1 +4020f4e2: 933420 movnez a3, a4, a2 +4020f4e5: 602030 neg a2, a3 +4020f4e8: 3108 l32i.n a0, a1, 12 +4020f4ea: 10c112 addi a1, a1, 16 +4020f4ed: f00d ret.n + ... + +4020f4f0 : +4020f4f0: 90a092 movi a9, 144 +4020f4f3: c01190 sub a1, a1, a9 +4020f4f6: 1f61f2 s32i a15, a1, 124 +4020f4f9: 186122 s32i a2, a1, 96 +4020f4fc: 196132 s32i a3, a1, 100 +4020f4ff: 04fd mov.n a15, a4 +4020f501: 063d mov.n a3, a6 +4020f503: 640c movi.n a4, 6 +4020f505: 052d mov.n a2, a5 +4020f507: 2261c2 s32i a12, a1, 136 +4020f50a: 2161d2 s32i a13, a1, 132 +4020f50d: 2061e2 s32i a14, a1, 128 +4020f510: 236102 s32i a0, a1, 140 +4020f513: 05dd mov.n a13, a5 +4020f515: 06ed mov.n a14, a6 +4020f517: 20c770 or a12, a7, a7 +4020f51a: c9c001 l32r a0, 40201c1c +4020f51d: 0000c0 callx0 a0 +4020f520: 640c movi.n a4, 6 +4020f522: 0132d6 bgez a2, 4020f539 +4020f525: 0d3d mov.n a3, a13 +4020f527: 10c122 addi a2, a1, 16 +4020f52a: c6ba01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f52d: 0000c0 callx0 a0 +4020f530: 640c movi.n a4, 6 +4020f532: 0e3d mov.n a3, a14 +4020f534: 000406 j 4020f548 +4020f537: 3d0000 excw +4020f53a: 0e .byte 0xe +4020f53b: 10c122 addi a2, a1, 16 +4020f53e: c6b501 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f541: 0000c0 callx0 a0 +4020f544: 640c movi.n a4, 6 +4020f546: 0d3d mov.n a3, a13 +4020f548: 16c122 addi a2, a1, 22 +4020f54b: c6b201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f54e: 0000c0 callx0 a0 +4020f551: 242132 l32i a3, a1, 144 +4020f554: 042c movi.n a4, 32 +4020f556: 0c2d mov.n a2, a12 +4020f558: c9b101 l32r a0, 40201c1c +4020f55b: 0000c0 callx0 a0 +4020f55e: 042c movi.n a4, 32 +4020f560: 0142d6 bgez a2, 4020f578 +4020f563: 0c3d mov.n a3, a12 +4020f565: 1cc122 addi a2, a1, 28 +4020f568: c6ab01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f56b: 0000c0 callx0 a0 +4020f56e: 042c movi.n a4, 32 +4020f570: 242132 l32i a3, a1, 144 +4020f573: 000446 j 4020f588 +4020f576: 320000 excw +4020f579: 222421 l32r a2, 401d7e0c <_lit4_end+0xd1ae0> +4020f57c: 011cc1 l32r a12, 401cf9ec <_lit4_end+0xc96c0> +4020f57f: c0c6a5 excw +4020f582: 2c0000 excw +4020f585: 0c3d04 excw +4020f588: 3cc122 addi a2, a1, 60 +4020f58b: c6a201 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f58e: 0000c0 callx0 a0 +4020f591: 262122 l32i a2, a1, 152 +4020f594: 252172 l32i a7, a1, 148 +4020f597: 0129 s32i.n a2, a1, 0 +4020f599: 192132 l32i a3, a1, 100 +4020f59c: 182122 l32i a2, a1, 96 +4020f59f: 10c152 addi a5, a1, 16 +4020f5a2: 0f4d mov.n a4, a15 +4020f5a4: c64c movi.n a6, 76 +4020f5a6: f32601 l32r a0, 4020c240 +4020f5a9: 0000c0 callx0 a0 +4020f5ac: 232102 l32i a0, a1, 140 +4020f5af: 90a092 movi a9, 144 +4020f5b2: 2221c2 l32i a12, a1, 136 +4020f5b5: 2121d2 l32i a13, a1, 132 +4020f5b8: 2021e2 l32i a14, a1, 128 +4020f5bb: 1f21f2 l32i a15, a1, 124 +4020f5be: 119a add.n a1, a1, a9 +4020f5c0: f00d ret.n +4020f5c2: 200000 or a0, a0, a0 +4020f5c5: 2309 s32i.n a0, a3, 8 +4020f5c7: 091440 excw +4020f5ca: b44023 excw +4020f5cd: 00b8 l32i.n a11, a0, 0 +4020f5cf: 40 .byte 0x40 + +4020f5d0 : +4020f5d0: 90c112 addi a1, a1, -112 +4020f5d3: 1a61c2 s32i a12, a1, 104 +4020f5d6: 1861e2 s32i a14, a1, 96 +4020f5d9: 20c1c2 addi a12, a1, 32 +4020f5dc: 20e220 or a14, a2, a2 +4020f5df: fff921 l32r a2, 4020f5c4 +4020f5e2: 207440 or a7, a4, a4 +4020f5e5: 1761f2 s32i a15, a1, 92 +4020f5e8: 0ca042 movi a4, 12 +4020f5eb: 03fd mov.n a15, a3 +4020f5ed: 0c3d mov.n a3, a12 +4020f5ef: 1b6102 s32i a0, a1, 108 +4020f5f2: 1961d2 s32i a13, a1, 100 +4020f5f5: 116152 s32i a5, a1, 68 +4020f5f8: 06dd mov.n a13, a6 +4020f5fa: 106172 s32i a7, a1, 64 +4020f5fd: 01a885 call0 40211088 +4020f600: 102172 l32i a7, a1, 64 +4020f603: 112152 l32i a5, a1, 68 +4020f606: fff061 l32r a6, 4020f5c8 +4020f609: c179 s32i.n a7, a1, 48 +4020f60b: d159 s32i.n a5, a1, 52 +4020f60d: 017d mov.n a7, a1 +4020f60f: 2cc152 addi a5, a1, 44 +4020f612: 0f3d mov.n a3, a15 +4020f614: 340c movi.n a4, 3 +4020f616: 0e2d mov.n a2, a14 +4020f618: b1c9 s32i.n a12, a1, 44 +4020f61a: ffec01 l32r a0, 4020f5cc +4020f61d: 0000c0 callx0 a0 +4020f620: 013d mov.n a3, a1 +4020f622: 0d2d mov.n a2, a13 +4020f624: 041c movi.n a4, 16 +4020f626: c67b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f629: 0000c0 callx0 a0 +4020f62c: 1b2102 l32i a0, a1, 108 +4020f62f: 1a21c2 l32i a12, a1, 104 +4020f632: 1921d2 l32i a13, a1, 100 +4020f635: 1821e2 l32i a14, a1, 96 +4020f638: 1721f2 l32i a15, a1, 92 +4020f63b: 70c112 addi a1, a1, 112 +4020f63e: f00d ret.n +4020f640: ac08 l32i.n a0, a12, 40 +4020f642: 0f .byte 0xf + ... + +4020f644 : +4020f644: 024d mov.n a4, a2 +4020f646: 0b6337 bbci a3, 3, 4020f655 +4020f649: fec222 addi a2, a2, -2 +4020f64c: f28541 l32r a4, 4020c060 +4020f64f: fe9b31 l32r a3, 4020f0bc +4020f652: 001146 j 4020f69b +4020f655: fffa21 l32r a2, 4020f640 +4020f658: 44e367 bbsi a3, 6, 4020f6a0 +4020f65b: 0d6317 bbci a3, 1, 4020f66c +4020f65e: fec422 addi a2, a4, -2 +4020f661: fe9531 l32r a3, 4020f0b8 +4020f664: fe7e41 l32r a4, 4020f05c +4020f667: 000c06 j 4020f69b +4020f66a: 870000 excw +4020f66d: 220c63 excw +4020f670: 31fec4 excw +4020f673: 41fe93 excw +4020f676: fe7a add.n a15, a14, a7 +4020f678: 0007c6 j 4020f69b +4020f67b: 637700 excw +4020f67e: 220d excw +4020f680: 31fec4 excw +4020f683: 41f276 excw +4020f686: c6f277 bbsi a2, 23, 4020f650 +4020f689: 000003 excw +4020f68c: 020c00 excw +4020f68f: 0d5327 bbc a3, a2, 4020f6a0 +4020f692: fec422 addi a2, a4, -2 +4020f695: fe8731 l32r a3, 4020f0b4 +4020f698: fe7041 l32r a4, 4020f058 +4020f69b: 934320 movnez a4, a3, a2 +4020f69e: 042d mov.n a2, a4 +4020f6a0: f00d ret.n + ... + +4020f6a4 : +4020f6a4: f0c112 addi a1, a1, -16 +4020f6a7: 3109 s32i.n a0, a1, 12 +4020f6a9: 0b0845 call0 4021a730 +4020f6ac: 3108 l32i.n a0, a1, 12 +4020f6ae: 10c112 addi a1, a1, 16 +4020f6b1: f00d ret.n + ... + +4020f6b4 : +4020f6b4: f0c112 addi a1, a1, -16 +4020f6b7: 3109 s32i.n a0, a1, 12 +4020f6b9: 0b0745 call0 4021a730 +4020f6bc: 3108 l32i.n a0, a1, 12 +4020f6be: 10c112 addi a1, a1, 16 +4020f6c1: f00d ret.n + ... + +4020f6c4 : +4020f6c4: e0c112 addi a1, a1, -32 +4020f6c7: 0661c2 s32i a12, a1, 24 +4020f6ca: 03c3c2 addi a12, a3, 3 +4020f6cd: 41c2c0 srli a12, a12, 2 +4020f6d0: 0561d2 s32i a13, a1, 20 +4020f6d3: 41e9 s32i.n a14, a1, 16 +4020f6d5: 31f9 s32i.n a15, a1, 12 +4020f6d7: 7109 s32i.n a0, a1, 28 +4020f6d9: 02ed mov.n a14, a2 +4020f6db: 03fd mov.n a15, a3 +4020f6dd: a0cc20 addx4 a12, a12, a2 +4020f6e0: 02dd mov.n a13, a2 +4020f6e2: 261cd7 beq a12, a13, 4020f70c +4020f6e5: 0b0485 call0 4021a730 +4020f6e8: 0d5d mov.n a5, a13 +4020f6ea: 040c movi.n a4, 0 +4020f6ec: c035e0 sub a3, a5, a14 +4020f6ef: 0533f7 bltu a3, a15, 4020f6f8 +4020f6f2: dd4b addi.n a13, a13, 4 +4020f6f4: fffa86 j 4020f6e2 +4020f6f7: 040000 extui a0, a0, 0, 1 +4020f6fa: 302040 xor a2, a0, a4 +4020f6fd: 453291 l32r a9, 401e0bc8 <_lit4_end+0xda89c> +4020f700: 448b00 extui a8, a0, 11, 5 +4020f703: 551b addi.n a5, a5, 1 +4020f705: e3c466 bnei a4, 32, 4020f6ec +4020f708: fff986 j 4020f6f2 +4020f70b: 710800 excw +4020f70e: 020c movi.n a2, 0 +4020f710: 61c8 l32i.n a12, a1, 24 +4020f712: 51d8 l32i.n a13, a1, 20 +4020f714: 41e8 l32i.n a14, a1, 16 +4020f716: 31f8 l32i.n a15, a1, 12 +4020f718: 20c112 addi a1, a1, 32 +4020f71b: f00d ret.n +4020f71d: 000000 ill + +4020f720 : +4020f720: 742020 extui a2, a2, 0, 8 +4020f723: c91051 l32r a5, 40201b64 +4020f726: 061266 bnei a2, 1, 4020f730 +4020f729: 526532 s32i a3, a5, 0x148 +4020f72c: 0000c6 j 4020f733 +4020f72f: 653200 extui a3, a0, 18, 7 +4020f732: 534253 excw +4020f735: f00d00 subx8 a0, a13, a0 + +4020f738 : +4020f738: c90b21 l32r a2, 40201b64 +4020f73b: 4238 l32i.n a3, a2, 16 +4020f73d: d20342 l8ui a4, a3, 210 +4020f740: 145426 beqi a4, 5, 4020f758 +4020f743: 02d222 addmi a2, a2, 0x200 +4020f746: 3e0222 l8ui a2, a2, 62 +4020f749: f9c222 addi a2, a2, -7 +4020f74c: 742020 extui a2, a2, 0, 8 +4020f74f: 0522f6 bgeui a2, 2, 4020f758 +4020f752: 02a022 movi a2, 2 +4020f755: d24322 s8i a2, a3, 210 +4020f758: f00d ret.n +4020f75a: 760000 excw +4020f75d: 2309 s32i.n a0, a3, 8 +4020f75f: 40 .byte 0x40 + +4020f760 : +4020f760: b0c112 addi a1, a1, -80 +4020f763: 1261c2 s32i a12, a1, 72 +4020f766: 1621c2 l32i a12, a1, 88 +4020f769: 1161d2 s32i a13, a1, 68 +4020f76c: 1061e2 s32i a14, a1, 64 +4020f76f: 136102 s32i a0, a1, 76 +4020f772: f1f9 s32i.n a15, a1, 60 +4020f774: 5169 s32i.n a6, a1, 20 +4020f776: 02dd mov.n a13, a2 +4020f778: 035d mov.n a5, a3 +4020f77a: 142172 l32i a7, a1, 80 +4020f77d: c8f9e1 l32r a14, 40201b64 +4020f780: 024ca6 blti a12, 4, 4020f786 +4020f783: 001e46 j 4020f800 +4020f786: 4e28 l32i.n a2, a14, 16 +4020f788: 01af32 movi a3, -255 +4020f78b: 242222 l32i a2, a2, 144 +4020f78e: 01d2f2 addmi a15, a2, 0x100 +4020f791: 090f62 l8ui a6, a15, 9 +4020f794: 22ca add.n a2, a2, a12 +4020f796: 363a add.n a3, a6, a3 +4020f798: 138c beqz.n a3, 4020f79d +4020f79a: 041666 bnei a6, 1, 4020f7a2 +4020f79d: 060c movi.n a6, 0 +4020f79f: 000046 j 4020f7a4 +4020f7a2: 160c movi.n a6, 1 +4020f7a4: 0ba132 movi a3, 0x10b +4020f7a7: 094f62 s8i a6, a15, 9 +4020f7aa: 223a add.n a2, a2, a3 +4020f7ac: 004262 s8i a6, a2, 0 +4020f7af: 090f22 l8ui a2, a15, 9 +4020f7b2: 7149 s32i.n a4, a1, 28 +4020f7b4: 222b addi.n a2, a2, 2 +4020f7b6: 6159 s32i.n a5, a1, 24 +4020f7b8: 8179 s32i.n a7, a1, 32 +4020f7ba: 13bb85 call0 40223374 +4020f7bd: 090f62 l8ui a6, a15, 9 +4020f7c0: 152122 l32i a2, a1, 84 +4020f7c3: 8178 l32i.n a7, a1, 32 +4020f7c5: 6158 l32i.n a5, a1, 24 +4020f7c7: 7148 l32i.n a4, a1, 28 +4020f7c9: 0129 s32i.n a2, a1, 0 +4020f7cb: 662b addi.n a6, a6, 2 +4020f7cd: 0d3d mov.n a3, a13 +4020f7cf: 020c movi.n a2, 0 +4020f7d1: 10fa45 call0 40220778 +4020f7d4: 090f62 l8ui a6, a15, 9 +4020f7d7: 60c662 addi a6, a6, 96 +4020f7da: a026e0 addx4 a2, a6, a14 +4020f7dd: 32f8 l32i.n a15, a2, 12 +4020f7df: 062f56 bnez a15, 4020f845 +4020f7e2: ffde31 l32r a3, 4020f75c +4020f7e5: 050c movi.n a5, 0 +4020f7e7: 245c movi.n a4, 82 +4020f7e9: 98a022 movi a2, 152 +4020f7ec: 6169 s32i.n a6, a1, 24 +4020f7ee: c74501 l32r a0, 40201504 +4020f7f1: 0000c0 callx0 a0 +4020f7f4: 6168 l32i.n a6, a1, 24 +4020f7f6: 02fd mov.n a15, a2 +4020f7f8: a0e6e0 addx4 a14, a6, a14 +4020f7fb: 3e29 s32i.n a2, a14, 12 +4020f7fd: 001046 j 4020f842 +4020f800: 152122 l32i a2, a1, 84 +4020f803: 6c1b addi.n a6, a12, 1 +4020f805: 0129 s32i.n a2, a1, 0 +4020f807: 0d3d mov.n a3, a13 +4020f809: 020c movi.n a2, 0 +4020f80b: 10f6c5 call0 40220778 +4020f80e: 2c0b addi.n a2, a12, -1 +4020f810: 4129 s32i.n a2, a1, 16 +4020f812: a02ce0 addx4 a2, a12, a14 +4020f815: 622222 l32i a2, a2, 0x188 +4020f818: ffd1f1 l32r a15, 4020f75c +4020f81b: 009216 beqz a2, 4020f828 +4020f81e: f45c movi.n a4, 95 +4020f820: 0f3d mov.n a3, a15 +4020f822: c73901 l32r a0, 40201508 +4020f825: 0000c0 callx0 a0 +4020f828: 0f3d mov.n a3, a15 +4020f82a: 050c movi.n a5, 0 +4020f82c: 62a042 movi a4, 98 +4020f82f: 98a022 movi a2, 152 +4020f832: c73401 l32r a0, 40201504 +4020f835: 0000c0 callx0 a0 +4020f838: 02fd mov.n a15, a2 +4020f83a: 4128 l32i.n a2, a1, 16 +4020f83c: a0e2e0 addx4 a14, a2, a14 +4020f83f: 636ef2 s32i a15, a14, 0x18c +4020f842: 04ef16 beqz a15, 4020f894 +4020f845: 0f2d mov.n a2, a15 +4020f847: 98a032 movi a3, 152 +4020f84a: d8fc01 l32r a0, 40205c3c +4020f84d: 0000c0 callx0 a0 +4020f850: 020c movi.n a2, 0 +4020f852: ffaf42 movi a4, -1 +4020f855: 11a052 movi a5, 17 +4020f858: b032f0 addx8 a3, a2, a15 +4020f85b: 1349 s32i.n a4, a3, 4 +4020f85d: 2349 s32i.n a4, a3, 8 +4020f85f: 221b addi.n a2, a2, 1 +4020f861: f39257 bne a2, a5, 4020f858 +4020f864: f30e21 l32r a2, 4020c49c +4020f867: 112d26 beqi a13, 2, 4020f87c +4020f86a: e1f521 l32r a2, 40208040 +4020f86d: 0b3d26 beqi a13, 3, 4020f87c +4020f870: fbaf22 movi a2, -5 +4020f873: 10dd20 and a13, a13, a2 +4020f876: 051d66 bnei a13, 1, 4020f87f +4020f879: f30921 l32r a2, 4020c4a0 +4020f87c: 256f22 s32i a2, a15, 148 +4020f87f: cc1b addi.n a12, a12, 1 +4020f881: 8ca022 movi a2, 140 +4020f884: 5138 l32i.n a3, a1, 20 +4020f886: 005fc2 s16i a12, a15, 0 +4020f889: 840c movi.n a4, 8 +4020f88b: 802f20 add a2, a15, a2 +4020f88e: c5e101 l32r a0, 40201014 <_irom0_text_start+0x4> +4020f891: 0000c0 callx0 a0 +4020f894: 132102 l32i a0, a1, 76 +4020f897: 1221c2 l32i a12, a1, 72 +4020f89a: 1121d2 l32i a13, a1, 68 +4020f89d: 1021e2 l32i a14, a1, 64 +4020f8a0: f1f8 l32i.n a15, a1, 60 +4020f8a2: 50c112 addi a1, a1, 80 +4020f8a5: f00d ret.n + ... + +4020f8a8 : +4020f8a8: e0c112 addi a1, a1, -32 +4020f8ab: 209440 or a9, a4, a4 +4020f8ae: 204550 or a4, a5, a5 +4020f8b1: 082152 l32i a5, a1, 32 +4020f8b4: 7109 s32i.n a0, a1, 28 +4020f8b6: 028d mov.n a8, a2 +4020f8b8: f27c movi.n a2, -1 +4020f8ba: 0c45e6 bgei a5, 4, 4020f8ca +4020f8bd: 0179 s32i.n a7, a1, 0 +4020f8bf: 082d mov.n a2, a8 +4020f8c1: 067d mov.n a7, a6 +4020f8c3: 652b addi.n a6, a5, 2 +4020f8c5: 095d mov.n a5, a9 +4020f8c7: 10f0c5 call0 402207d4 +4020f8ca: 7108 l32i.n a0, a1, 28 +4020f8cc: 20c112 addi a1, a1, 32 +4020f8cf: f00d ret.n +4020f8d1: 000000 ill +4020f8d4: f0c112 addi a1, a1, -16 +4020f8d7: 0161d2 s32i a13, a1, 4 +4020f8da: c8a2d1 l32r a13, 40201b64 +4020f8dd: 0261c2 s32i a12, a1, 8 +4020f8e0: 74c020 extui a12, a2, 0, 8 +4020f8e3: 4d28 l32i.n a2, a13, 16 +4020f8e5: 0c4d mov.n a4, a12 +4020f8e7: c0a032 movi a3, 192 +4020f8ea: 036102 s32i a0, a1, 12 +4020f8ed: f34e85 call0 40202dd8 +4020f8f0: 11cc80 slli a12, a12, 8 +4020f8f3: c0a042 movi a4, 192 +4020f8f6: 204c40 or a4, a12, a4 +4020f8f9: 0d2d mov.n a2, a13 +4020f8fb: 230c movi.n a3, 2 +4020f8fd: fad505 call0 4020a650 +4020f900: 3108 l32i.n a0, a1, 12 +4020f902: 21c8 l32i.n a12, a1, 8 +4020f904: 11d8 l32i.n a13, a1, 4 +4020f906: 10c112 addi a1, a1, 16 +4020f909: f00d ret.n +4020f90b: 963100 excw +4020f90e: 12c8 l32i.n a12, a2, 4 +4020f910: 42f0c1 l32r a12, 401e04d0 <_lit4_end+0xda1a4> +4020f913: 200423 excw +4020f916: 222032 l32i a3, a0, 136 +4020f919: 090024 excw +4020f91c: a68531 l32r a3, 401f9330 <_lit4_end+0xf3004> +4020f91f: 3108f2 l8ui a15, a8, 49 +4020f922: 10c112 addi a1, a1, 16 +4020f925: f00d ret.n + ... + +4020f928 : +4020f928: f0c112 addi a1, a1, -16 +4020f92b: 0161d2 s32i a13, a1, 4 +4020f92e: c88dd1 l32r a13, 40201b64 +4020f931: 0261c2 s32i a12, a1, 8 +4020f934: 74c020 extui a12, a2, 0, 8 +4020f937: 4d28 l32i.n a2, a13, 16 +4020f939: 0c4d mov.n a4, a12 +4020f93b: c0a032 movi a3, 192 +4020f93e: 036102 s32i a0, a1, 12 +4020f941: f34945 call0 40202dd8 +4020f944: 11cc80 slli a12, a12, 8 +4020f947: c0a042 movi a4, 192 +4020f94a: 204c40 or a4, a12, a4 +4020f94d: 0d2d mov.n a2, a13 +4020f94f: 030c movi.n a3, 0 +4020f951: facfc5 call0 4020a650 +4020f954: 3108 l32i.n a0, a1, 12 +4020f956: 21c8 l32i.n a12, a1, 8 +4020f958: 11d8 l32i.n a13, a1, 4 +4020f95a: 10c112 addi a1, a1, 16 +4020f95d: f00d ret.n + ... + +4020f960 : +4020f960: f0c112 addi a1, a1, -16 +4020f963: 02d222 addmi a2, a2, 0x200 +4020f966: 036102 s32i a0, a1, 12 +4020f969: 3d0232 l8ui a3, a2, 61 +4020f96c: fec322 addi a2, a3, -2 +4020f96f: 742020 extui a2, a2, 0, 8 +4020f972: 0222b6 bltui a2, 2, 4020f978 +4020f975: 046366 bnei a3, 6, 4020f97d +4020f978: 120c movi.n a2, 1 +4020f97a: 000346 j 4020f98b +4020f97d: fcc322 addi a2, a3, -4 +4020f980: 742020 extui a2, a2, 0, 8 +4020f983: 0222b6 bltui a2, 2, 4020f989 +4020f986: 047366 bnei a3, 7, 4020f98e +4020f989: 220c movi.n a2, 2 +4020f98b: fe98c5 call0 4020e318 +4020f98e: 3108 l32i.n a0, a1, 12 +4020f990: 10c112 addi a1, a1, 16 +4020f993: f00d ret.n +4020f995: 000000 ill + +4020f998 : +4020f998: 0ca262 movi a6, 0x20c +4020f99b: e0c112 addi a1, a1, -32 +4020f99e: 02d272 addmi a7, a2, 0x200 +4020f9a1: 806260 add a6, a2, a6 +4020f9a4: 042222 l32i a2, a2, 16 +4020f9a7: 076102 s32i a0, a1, 28 +4020f9aa: 400752 l8ui a5, a7, 64 +4020f9ad: 3e0742 l8ui a4, a7, 62 +4020f9b0: 0228 l32i.n a2, a2, 0 +4020f9b2: 6778 l32i.n a7, a7, 24 +4020f9b4: 33c222 addi a2, a2, 51 +4020f9b7: 0179 s32i.n a7, a1, 0 +4020f9b9: 10c672 addi a7, a6, 16 +4020f9bc: 37c662 addi a6, a6, 55 +4020f9bf: fe9885 call0 4020e348 +4020f9c2: 7108 l32i.n a0, a1, 28 +4020f9c4: 20c112 addi a1, a1, 32 +4020f9c7: f00d ret.n +4020f9c9: 000000 ill +4020f9cc: 230956 bnez a9, 4020fc00 +4020f9cf: f73840 excw +4020f9d2: 444020 extui a4, a2, 0, 5 +4020f9d5: 3ffe80 excw +4020f9d8: 230940 excw +4020f9db: dc0c40 excw +4020f9de: fe .byte 0xfe +4020f9df: 3f .byte 0x3f +4020f9e0: dc08 l32i.n a0, a12, 52 +4020f9e2: fe .byte 0xfe +4020f9e3: 3f .byte 0x3f +4020f9e4: 0929 s32i.n a2, a9, 0 +4020f9e6: 23 .byte 0x23 +4020f9e7: 40 .byte 0x40 + +4020f9e8 : +4020f9e8: c0c112 addi a1, a1, -64 +4020f9eb: d1d9 s32i.n a13, a1, 52 +4020f9ed: c85dd1 l32r a13, 40201b64 +4020f9f0: e1c9 s32i.n a12, a1, 56 +4020f9f2: 4dc8 l32i.n a12, a13, 16 +4020f9f4: f109 s32i.n a0, a1, 60 +4020f9f6: 242c22 l32i a2, a12, 144 +4020f9f9: c1e9 s32i.n a14, a1, 48 +4020f9fb: 2238 l32i.n a3, a2, 8 +4020f9fd: b1f9 s32i.n a15, a1, 44 +4020f9ff: 026307 bbci a3, 0, 4020fa05 +4020fa02: 005cc6 j 4020fb79 +4020fa05: 262222 l32i a2, a2, 152 +4020fa08: ccf0f1 l32r a15, 40202dc8 +4020fa0b: 060242 l8ui a4, a2, 6 +4020fa0e: ffef21 l32r a2, 4020f9cc +4020fa11: 0f3d mov.n a3, a15 +4020fa13: c98e01 l32r a0, 4020204c +4020fa16: 0000c0 callx0 a0 +4020fa19: 05dde2 addmi a14, a13, 0x500 +4020fa1c: 1f2e22 l32i a2, a14, 124 +4020fa1f: 005216 beqz a2, 4020fa28 +4020fa22: 202e22 l32i a2, a14, 128 +4020fa25: 291226 beqi a2, 1, 4020fa52 +4020fa28: fc4b addi.n a15, a12, 4 +4020fa2a: 0f2d mov.n a2, a15 +4020fa2c: d16401 l32r a0, 40203fbc +4020fa2f: 0000c0 callx0 a0 +4020fa32: ffe731 l32r a3, 4020f9d0 +4020fa35: 00a042 movi a4, 0 +4020fa38: 202ff0 or a2, a15, a15 +4020fa3b: d25e01 l32r a0, 402043b4 +4020fa3e: 0000c0 callx0 a0 +4020fa41: d61031 l32r a3, 40205284 +4020fa44: 150c movi.n a5, 1 +4020fa46: 00a042 movi a4, 0 +4020fa49: 202ff0 or a2, a15, a15 +4020fa4c: d15b01 l32r a0, 40203fb8 +4020fa4f: 0000c0 callx0 a0 +4020fa52: 4d28 l32i.n a2, a13, 16 +4020fa54: 030c movi.n a3, 0 +4020fa56: d14232 s8i a3, a2, 209 +4020fa59: 02dd22 addmi a2, a13, 0x200 +4020fa5c: b50222 l8ui a2, a2, 181 +4020fa5f: 101226 beqi a2, 1, 4020fa73 +4020fa62: 242c32 l32i a3, a12, 144 +4020fa65: dcd721 l32r a2, 40206dc4 +4020fa68: 640c movi.n a4, 6 +4020fa6a: c56a01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020fa6d: 0000c0 callx0 a0 +4020fa70: 02cfc5 call0 40212770 +4020fa73: 242c22 l32i a2, a12, 144 +4020fa76: 0f0c movi.n a15, 0 +4020fa78: 2248 l32i.n a4, a2, 8 +4020fa7a: 01a032 movi a3, 1 +4020fa7d: 203430 or a3, a4, a3 +4020fa80: 1842f2 s8i a15, a2, 24 +4020fa83: 026232 s32i a3, a2, 8 +4020fa86: 242c22 l32i a2, a12, 144 +4020fa89: 262222 l32i a2, a2, 152 +4020fa8c: 060222 l8ui a2, a2, 6 +4020fa8f: 029285 call0 402123b8 +4020fa92: e5ae21 l32r a2, 4020914c +4020fa95: 0042f2 s8i a15, a2, 0 +4020fa98: d2db21 l32r a2, 40204604 +4020fa9b: 0228 l32i.n a2, a2, 0 +4020fa9d: 06a216 beqz a2, 4020fb0b +4020faa0: ff2f31 l32r a3, 4020f75c +4020faa3: 36a142 movi a4, 0x136 +4020faa6: c22c movi.n a2, 44 +4020faa8: c96a01 l32r a0, 40202050 +4020faab: 0000c0 callx0 a0 +4020faae: 02fd mov.n a15, a2 +4020fab0: ff2b51 l32r a5, 4020f75c +4020fab3: 054216 beqz a2, 4020fb0b +4020fab6: 060c movi.n a6, 0 +4020fab8: ccc431 l32r a3, 40202dc8 +4020fabb: 0269 s32i.n a6, a2, 0 +4020fabd: 042c movi.n a4, 32 +4020fabf: 224b addi.n a2, a2, 4 +4020fac1: 5159 s32i.n a5, a1, 20 +4020fac3: 4169 s32i.n a6, a1, 16 +4020fac5: c55301 l32r a0, 40201014 <_irom0_text_start+0x4> +4020fac8: 0000c0 callx0 a0 +4020facb: 862d22 l32i a2, a13, 0x218 +4020face: 640c movi.n a4, 6 +4020fad0: 244f22 s8i a2, a15, 36 +4020fad3: 48cc32 addi a3, a12, 72 +4020fad6: 25cf22 addi a2, a15, 37 +4020fad9: c54e01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020fadc: 0000c0 callx0 a0 +4020fadf: 242c22 l32i a2, a12, 144 +4020fae2: 0f4d mov.n a4, a15 +4020fae4: 262222 l32i a2, a2, 152 +4020fae7: 060222 l8ui a2, a2, 6 +4020faea: 2b4f22 s8i a2, a15, 43 +4020faed: 4168 l32i.n a6, a1, 16 +4020faef: 521c movi.n a2, 21 +4020faf1: 203660 or a3, a6, a6 +4020faf4: d2cd01 l32r a0, 40204628 +4020faf7: 0000c0 callx0 a0 +4020fafa: 5158 l32i.n a5, a1, 20 +4020fafc: b28c beqz.n a2, 4020fb0b +4020fafe: 3fa142 movi a4, 0x13f +4020fb01: 053d mov.n a3, a5 +4020fb03: 0f2d mov.n a2, a15 +4020fb05: c68001 l32r a0, 40201508 +4020fb08: 0000c0 callx0 a0 +4020fb0b: 620c movi.n a2, 6 +4020fb0d: faad45 call0 4020a5e4 +4020fb10: 0c28 l32i.n a2, a12, 0 +4020fb12: 390222 l8ui a2, a2, 57 +4020fb15: 60e237 bbsi a2, 3, 4020fb79 +4020fb18: ffaf21 l32r a2, 4020f9d4 +4020fb1b: 000222 l8ui a2, a2, 0 +4020fb1e: a29c beqz.n a2, 4020fb3c +4020fb20: 1f2e22 l32i a2, a14, 124 +4020fb23: 428c beqz.n a2, 4020fb2b +4020fb25: 202e22 l32i a2, a14, 128 +4020fb28: 4d1226 beqi a2, 1, 4020fb79 +4020fb2b: ffab21 l32r a2, 4020f9d8 +4020fb2e: c94701 l32r a0, 4020204c +4020fb31: 0000c0 callx0 a0 +4020fb34: 0c28 l32i.n a2, a12, 0 +4020fb36: 157345 call0 4022526c +4020fb39: 000f06 j 4020fb79 +4020fb3c: c93c21 l32r a2, 4020202c +4020fb3f: 032222 l32i a2, a2, 12 +4020fb42: a2ac beqz.n a2, 4020fb70 +4020fb44: 012d mov.n a2, a1 +4020fb46: c30c movi.n a3, 12 +4020fb48: d83d01 l32r a0, 40205c3c +4020fb4b: 0000c0 callx0 a0 +4020fb4e: ffa351 l32r a5, 4020f9dc +4020fb51: ffa341 l32r a4, 4020f9e0 +4020fb54: ee3431 l32r a3, 4020b424 +4020fb57: 0c28 l32i.n a2, a12, 0 +4020fb59: 18fe45 call0 40228b40 +4020fb5c: 0c28 l32i.n a2, a12, 0 +4020fb5e: 1909c5 call0 40228bfc +4020fb61: 418b addi.n a4, a1, 8 +4020fb63: 04c132 addi a3, a1, 4 +4020fb66: 202110 or a2, a1, a1 +4020fb69: 011d45 call0 40210d40 +4020fb6c: 000246 j 4020fb79 +4020fb6f: 9d2100 excw +4020fb72: ff .byte 0xff +4020fb73: c93601 l32r a0, 4020204c +4020fb76: 0000c0 callx0 a0 +4020fb79: f108 l32i.n a0, a1, 60 +4020fb7b: e1c8 l32i.n a12, a1, 56 +4020fb7d: d1d8 l32i.n a13, a1, 52 +4020fb7f: c1e8 l32i.n a14, a1, 48 +4020fb81: b1f8 l32i.n a15, a1, 44 +4020fb83: 40c112 addi a1, a1, 64 +4020fb86: f00d ret.n + +4020fb88 : +4020fb88: f0c112 addi a1, a1, -16 +4020fb8b: 3109 s32i.n a0, a1, 12 +4020fb8d: ffe585 call0 4020f9e8 +4020fb90: 3108 l32i.n a0, a1, 12 +4020fb92: 10c112 addi a1, a1, 16 +4020fb95: f00d ret.n +4020fb97: f8d400 excw +4020fb9a: a84020 excw +4020fb9d: 20f8 l32i.n a15, a0, 8 +4020fb9f: f76040 excw +4020fba2: 204020 or a4, a0, a2 +4020fba5: 4020f7 blt a0, a15, 4020fbe9 +4020fba8: f90c movi.n a9, 15 +4020fbaa: 884020 excw +4020fbad: 20fb addi.n a2, a0, 15 +4020fbaf: e52c40 extui a2, a4, 28, 15 +4020fbb2: 20 .byte 0x20 +4020fbb3: 40 .byte 0x40 + +4020fbb4 : +4020fbb4: e0c112 addi a1, a1, -32 +4020fbb7: 7ca132 movi a3, 0x17c +4020fbba: 7109 s32i.n a0, a1, 28 +4020fbbc: 080c movi.n a8, 0 +4020fbbe: 323a add.n a3, a2, a3 +4020fbc0: 5f6282 s32i a8, a2, 0x17c +4020fbc3: 606232 s32i a3, a2, 0x180 +4020fbc6: fff921 l32r a2, 4020fbac +4020fbc9: fff371 l32r a7, 4020fb98 +4020fbcc: fff461 l32r a6, 4020fb9c +4020fbcf: fff451 l32r a5, 4020fba0 +4020fbd2: fff441 l32r a4, 4020fba4 +4020fbd5: fff431 l32r a3, 4020fba8 +4020fbd8: 0129 s32i.n a2, a1, 0 +4020fbda: 202880 or a2, a8, a8 +4020fbdd: fe8c05 call0 4020e4a0 +4020fbe0: fff421 l32r a2, 4020fbb0 +4020fbe3: 330c movi.n a3, 3 +4020fbe5: 111045 call0 40220cec +4020fbe8: 7108 l32i.n a0, a1, 28 +4020fbea: 20c112 addi a1, a1, 32 +4020fbed: f00d ret.n + ... + +4020fbf0 : +4020fbf0: d0c112 addi a1, a1, -48 +4020fbf3: 208440 or a8, a4, a4 +4020fbf6: 0961d2 s32i a13, a1, 36 +4020fbf9: 0761f2 s32i a15, a1, 28 +4020fbfc: 07dd mov.n a13, a7 +4020fbfe: 02fd mov.n a15, a2 +4020fc00: 747030 extui a7, a3, 0, 8 +4020fc03: 040c movi.n a4, 0 +4020fc05: 00a132 movi a3, 0x100 +4020fc08: 320c movi.n a2, 3 +4020fc0a: a1c9 s32i.n a12, a1, 40 +4020fc0c: 81e9 s32i.n a14, a1, 32 +4020fc0e: 0179 s32i.n a7, a1, 0 +4020fc10: 1189 s32i.n a8, a1, 4 +4020fc12: b109 s32i.n a0, a1, 44 +4020fc14: 06cd mov.n a12, a6 +4020fc16: f4e050 extui a14, a5, 0, 16 +4020fc19: 191f85 call0 40228e14 +4020fc1c: 0178 l32i.n a7, a1, 0 +4020fc1e: 1188 l32i.n a8, a1, 4 +4020fc20: 52cc bnez.n a2, 4020fc29 +4020fc22: 020c movi.n a2, 0 +4020fc24: 001506 j 4020fc7c +4020fc27: 220000 excw +4020fc2a: 6f .byte 0x6f +4020fc2b: 7f .byte 0x7f +4020fc2c: 1228 l32i.n a2, a2, 4 +4020fc2e: 3e4b addi.n a3, a14, 4 +4020fc30: 0c39 s32i.n a3, a12, 0 +4020fc32: c2eb addi.n a12, a2, 14 +4020fc34: feac16 beqz a12, 4020fc22 +4020fc37: 01dff2 addmi a15, a15, 0x100 +4020fc3a: 380f32 l8ui a3, a15, 56 +4020fc3d: 0e4d mov.n a4, a14 +4020fc3f: 0e4232 s8i a3, a2, 14 +4020fc42: 112e80 slli a2, a14, 8 +4020fc45: f43020 extui a3, a2, 0, 16 +4020fc48: 4128e0 srli a2, a14, 8 +4020fc4b: 202320 or a2, a3, a2 +4020fc4e: 024c22 s8i a2, a12, 2 +4020fc51: 412820 srli a2, a2, 8 +4020fc54: 014c72 s8i a7, a12, 1 +4020fc57: 034c22 s8i a2, a12, 3 +4020fc5a: fc4b addi.n a15, a12, 4 +4020fc5c: c88c beqz.n a8, 4020fc6c +4020fc5e: 083d mov.n a3, a8 +4020fc60: 0f2d mov.n a2, a15 +4020fc62: c4ec01 l32r a0, 40201014 <_irom0_text_start+0x4> +4020fc65: 0000c0 callx0 a0 +4020fc68: 000286 j 4020fc76 +4020fc6b: 030c00 excw +4020fc6e: 0f2d mov.n a2, a15 +4020fc70: c4e801 l32r a0, 40201010 <_irom0_text_start> +4020fc73: 0000c0 callx0 a0 +4020fc76: 0c2d mov.n a2, a12 +4020fc78: 0d8c beqz.n a13, 4020fc7c +4020fc7a: 0df9 s32i.n a15, a13, 0 +4020fc7c: b108 l32i.n a0, a1, 44 +4020fc7e: a1c8 l32i.n a12, a1, 40 +4020fc80: 91d8 l32i.n a13, a1, 36 +4020fc82: 81e8 l32i.n a14, a1, 32 +4020fc84: 71f8 l32i.n a15, a1, 28 +4020fc86: 30c112 addi a1, a1, 48 +4020fc89: f00d ret.n +4020fc8b: 050c00 extui a0, a0, 28, 1 +4020fc8e: 160c movi.n a6, 1 +4020fc90: fec242 addi a4, a2, -2 +4020fc93: 053d mov.n a3, a5 +4020fc95: 833640 moveqz a3, a6, a4 +4020fc98: 034d mov.n a4, a3 +4020fc9a: 057d mov.n a7, a5 +4020fc9c: c0c232 addi a3, a2, -64 +4020fc9f: 837630 moveqz a7, a6, a3 +4020fca2: ffd232 addmi a3, a2, 0xffffff00 +4020fca5: 052d mov.n a2, a5 +4020fca7: 204470 or a4, a4, a7 +4020fcaa: 832630 moveqz a2, a6, a3 +4020fcad: 202240 or a2, a2, a4 +4020fcb0: f00d ret.n +4020fcb2: 320000 excw +4020fcb5: 4dd0c2 addmi a12, a0, 0x4d00 +4020fcb8: 950c02 l8ui a0, a12, 149 +4020fcbb: 742030 extui a2, a3, 0, 8 +4020fcbe: 033527 bltu a5, a2, 4020fcc5 +4020fcc1: 032d mov.n a2, a3 +4020fcc3: f00d ret.n +4020fcc5: 9fc422 addi a2, a4, -97 +4020fcc8: 742020 extui a2, a2, 0, 8 +4020fccb: 0562f6 bgeui a2, 6, 4020fcd4 +4020fcce: a9c422 addi a2, a4, -87 +4020fcd1: f00d ret.n +4020fcd3: c43200 extui a3, a0, 2, 13 +4020fcd6: bf .byte 0xbf +4020fcd7: 743030 extui a3, a3, 0, 8 +4020fcda: f27c movi.n a2, -1 +4020fcdc: 0263f6 bgeui a3, 6, 4020fce2 +4020fcdf: c9c422 addi a2, a4, -55 +4020fce2: f00d ret.n + +4020fce4 : +4020fce4: 330b addi.n a3, a3, -1 +4020fce6: 323a add.n a3, a2, a3 +4020fce8: c04320 sub a4, a3, a2 +4020fceb: 00f496 bltz a4, 4020fcfe +4020fcee: 000342 l8ui a4, a3, 0 +4020fcf1: 330b addi.n a3, a3, -1 +4020fcf3: 441b addi.n a4, a4, 1 +4020fcf5: 744040 extui a4, a4, 0, 8 +4020fcf8: 014342 s8i a4, a3, 1 +4020fcfb: fe9416 beqz a4, 4020fce8 +4020fcfe: f00d ret.n + +4020fd00 : +4020fd00: 532282 l32i a8, a2, 0x14c +4020fd03: 412262 l32i a6, a2, 0x104 +4020fd06: 422252 l32i a5, a2, 0x108 +4020fd09: 432272 l32i a7, a2, 0x10c +4020fd0c: 022826 beqi a8, 2, 4020fd12 +4020fd0f: 004346 j 4020fe20 +4020fd12: 15a022 movi a2, 21 +4020fd15: 033247 bltu a2, a4, 4020fd1c +4020fd18: f27c movi.n a2, -1 +4020fd1a: f00d ret.n +4020fd1c: 023c movi.n a2, 48 +4020fd1e: 004322 s8i a2, a3, 0 +4020fd21: 140c movi.n a4, 1 +4020fd23: 020c movi.n a2, 0 +4020fd25: 034322 s8i a2, a3, 3 +4020fd28: 024342 s8i a4, a3, 2 +4020fd2b: 128566 bnei a5, 8, 4020fd41 +4020fd2e: 044322 s8i a2, a3, 4 +4020fd31: f20c movi.n a2, 15 +4020fd33: 054322 s8i a2, a3, 5 +4020fd36: acaf22 movi a2, -84 +4020fd39: 064322 s8i a2, a3, 6 +4020fd3c: 420c movi.n a2, 4 +4020fd3e: 001046 j 4020fd83 +4020fd41: 132566 bnei a5, 2, 4020fd58 +4020fd44: 044322 s8i a2, a3, 4 +4020fd47: f20c movi.n a2, 15 +4020fd49: 054322 s8i a2, a3, 5 +4020fd4c: acaf22 movi a2, -84 +4020fd4f: 064322 s8i a2, a3, 6 +4020fd52: 220c movi.n a2, 2 +4020fd54: 000ac6 j 4020fd83 +4020fd57: f56600 extui a6, a0, 22, 16 +4020fd5a: 432214 excw +4020fd5d: f20c04 excw +4020fd60: 054322 s8i a2, a3, 5 +4020fd63: acaf22 movi a2, -84 +4020fd66: 064322 s8i a2, a3, 6 +4020fd69: 520c movi.n a2, 5 +4020fd6b: 000506 j 4020fd83 +4020fd6e: 660000 excw +4020fd71: 22a4e5 excw +4020fd74: 0c0443 excw +4020fd77: 4322f2 l32i a15, a2, 0x10c +4020fd7a: af2205 call0 401bef9c <_lit4_end+0xb8c70> +4020fd7d: 22ac beqz.n a2, 4020fda3 +4020fd7f: 0c0643 excw +4020fd82: 432212 l32i a1, a2, 0x10c +4020fd85: 120c07 bnone a12, a0, 4020fd9b +4020fd88: 084322 s8i a2, a3, 8 +4020fd8b: 020c movi.n a2, 0 +4020fd8d: 094322 s8i a2, a3, 9 +4020fd90: 148666 bnei a6, 8, 4020fda8 +4020fd93: 0a4322 s8i a2, a3, 10 +4020fd96: f20c movi.n a2, 15 +4020fd98: 0b4322 s8i a2, a3, 11 +4020fd9b: acaf22 movi a2, -84 +4020fd9e: 0c4322 s8i a2, a3, 12 +4020fda1: 420c movi.n a2, 4 +4020fda3: 000b46 j 4020fdd4 +4020fda6: 660000 excw +4020fda9: 221426 beqi a4, 1, 4020fdcf +4020fdac: 0c0a43 excw +4020fdaf: 4322f2 l32i a15, a2, 0x10c +4020fdb2: 220b addi.n a2, a2, -1 +4020fdb4: af .byte 0xaf +4020fdb5: 22ac beqz.n a2, 4020fddb +4020fdb7: 0c0c43 excw +4020fdba: 054622 s8i a2, a6, 5 +4020fdbd: 000000 ill +4020fdc0: 021626 beqi a6, 1, 4020fdc6 +4020fdc3: ffd446 j 4020fd18 +4020fdc6: f40c movi.n a4, 15 +4020fdc8: 0b4342 s8i a4, a3, 11 +4020fdcb: acaf42 movi a4, -84 +4020fdce: 0a4322 s8i a2, a3, 10 +4020fdd1: 0c4342 s8i a4, a3, 12 +4020fdd4: 0d4322 s8i a2, a3, 13 +4020fdd7: 120c movi.n a2, 1 +4020fdd9: 0e4322 s8i a2, a3, 14 +4020fddc: 020c movi.n a2, 0 +4020fdde: 0f4322 s8i a2, a3, 15 +4020fde1: 131766 bnei a7, 1, 4020fdf8 +4020fde4: 104322 s8i a2, a3, 16 +4020fde7: f20c movi.n a2, 15 +4020fde9: 114322 s8i a2, a3, 17 +4020fdec: acaf22 movi a2, -84 +4020fdef: 124322 s8i a2, a3, 18 +4020fdf2: 120c movi.n a2, 1 +4020fdf4: 000586 j 4020fe0e +4020fdf7: 272600 excw +4020fdfa: c64602 s8i a0, a6, 198 +4020fdfd: ff .byte 0xff +4020fdfe: 104322 s8i a2, a3, 16 +4020fe01: f20c movi.n a2, 15 +4020fe03: 114322 s8i a2, a3, 17 +4020fe06: acaf22 movi a2, -84 +4020fe09: 124322 s8i a2, a3, 18 +4020fe0c: 220c movi.n a2, 2 +4020fe0e: 134322 s8i a2, a3, 19 +4020fe11: 020c movi.n a2, 0 +4020fe13: 154322 s8i a2, a3, 21 +4020fe16: 144322 s8i a2, a3, 20 +4020fe19: 441c movi.n a4, 20 +4020fe1b: 621c movi.n a2, 22 +4020fe1d: 004586 j 4020ff37 +4020fe20: 721c movi.n a2, 23 +4020fe22: 023247 bltu a2, a4, 4020fe28 +4020fe25: ffbbc6 j 4020fd18 +4020fe28: ddaf22 movi a2, -35 +4020fe2b: 287c movi.n a8, -14 +4020fe2d: 004322 s8i a2, a3, 0 +4020fe30: 045c movi.n a4, 80 +4020fe32: 020c movi.n a2, 0 +4020fe34: 044382 s8i a8, a3, 4 +4020fe37: 180c movi.n a8, 1 +4020fe39: 024322 s8i a2, a3, 2 +4020fe3c: 034342 s8i a4, a3, 3 +4020fe3f: 054382 s8i a8, a3, 5 +4020fe42: 074322 s8i a2, a3, 7 +4020fe45: 064382 s8i a8, a3, 6 +4020fe48: 108566 bnei a5, 8, 4020fe5c +4020fe4b: 084322 s8i a2, a3, 8 +4020fe4e: 227c movi.n a2, -14 +4020fe50: 0a4322 s8i a2, a3, 10 +4020fe53: 094342 s8i a4, a3, 9 +4020fe56: 420c movi.n a2, 4 +4020fe58: 000f86 j 4020fe9a +4020fe5b: 256600 extui a6, a0, 22, 3 +4020fe5e: 432210 excw +4020fe61: 7c08 l32i.n a0, a12, 28 +4020fe63: 432222 l32i a2, a2, 0x10c +4020fe66: 420a add.n a4, a2, a0 +4020fe68: 0c0943 excw +4020fe6b: 0a8622 excw +4020fe6e: 660000 excw +4020fe71: 2211f5 excw +4020fe74: 5c0843 excw +4020fe77: 432202 l32i a0, a2, 0x10c +4020fe7a: 7c09 s32i.n a0, a12, 28 +4020fe7c: 432222 l32i a2, a2, 0x10c +4020fe7f: 0c0a add.n a0, a12, a0 +4020fe81: 050652 l8ui a5, a6, 5 +4020fe84: e52600 extui a2, a0, 22, 15 +4020fe87: a30602 l8ui a0, a6, 163 +4020fe8a: ff .byte 0xff +4020fe8b: 084322 s8i a2, a3, 8 +4020fe8e: 025c movi.n a2, 80 +4020fe90: 094322 s8i a2, a3, 9 +4020fe93: 227c movi.n a2, -14 +4020fe95: 0a4322 s8i a2, a3, 10 +4020fe98: 120c movi.n a2, 1 +4020fe9a: 0b4322 s8i a2, a3, 11 +4020fe9d: 120c movi.n a2, 1 +4020fe9f: 0c4322 s8i a2, a3, 12 +4020fea2: 020c movi.n a2, 0 +4020fea4: 0d4322 s8i a2, a3, 13 +4020fea7: 118666 bnei a6, 8, 4020febc +4020feaa: 0e4322 s8i a2, a3, 14 +4020fead: 025c movi.n a2, 80 +4020feaf: 0f4322 s8i a2, a3, 15 +4020feb2: 227c movi.n a2, -14 +4020feb4: 104322 s8i a2, a3, 16 +4020feb7: 420c movi.n a2, 4 +4020feb9: 0009c6 j 4020fee4 +4020febc: 112666 bnei a6, 2, 4020fed1 +4020febf: 0e4322 s8i a2, a3, 14 +4020fec2: 025c movi.n a2, 80 +4020fec4: 0f4322 s8i a2, a3, 15 +4020fec7: 227c movi.n a2, -14 +4020fec9: 104322 s8i a2, a3, 16 +4020fecc: 220c movi.n a2, 2 +4020fece: 000486 j 4020fee4 +4020fed1: 021626 beqi a6, 1, 4020fed7 +4020fed4: ff9006 j 4020fd18 +4020fed7: 045c movi.n a4, 80 +4020fed9: 0f4342 s8i a4, a3, 15 +4020fedc: 247c movi.n a4, -14 +4020fede: 0e4322 s8i a2, a3, 14 +4020fee1: 104342 s8i a4, a3, 16 +4020fee4: 114322 s8i a2, a3, 17 +4020fee7: 120c movi.n a2, 1 +4020fee9: 124322 s8i a2, a3, 18 +4020feec: 020c movi.n a2, 0 +4020feee: 134322 s8i a2, a3, 19 +4020fef1: 131766 bnei a7, 1, 4020ff08 +4020fef4: 144322 s8i a2, a3, 20 +4020fef7: 025c movi.n a2, 80 +4020fef9: 154322 s8i a2, a3, 21 +4020fefc: 227c movi.n a2, -14 +4020fefe: 164322 s8i a2, a3, 22 +4020ff01: 120c movi.n a2, 1 +4020ff03: 000a46 j 4020ff30 +4020ff06: 660000 excw +4020ff09: 221127 beq a1, a2, 4020ff2f +4020ff0c: 5c1443 excw +4020ff0f: 432202 l32i a0, a2, 0x10c +4020ff12: 227c15 excw +4020ff15: 164322 s8i a2, a3, 22 +4020ff18: 220c movi.n a2, 2 +4020ff1a: 000486 j 4020ff30 +4020ff1d: 02b726 beqi a7, 16, 4020ff23 +4020ff20: ff7d06 j 4020fd18 +4020ff23: 045c movi.n a4, 80 +4020ff25: 154342 s8i a4, a3, 21 +4020ff28: 247c movi.n a4, -14 +4020ff2a: 144322 s8i a2, a3, 20 +4020ff2d: 164342 s8i a4, a3, 22 +4020ff30: 174322 s8i a2, a3, 23 +4020ff33: 641c movi.n a4, 22 +4020ff35: 821c movi.n a2, 24 +4020ff37: 014342 s8i a4, a3, 1 +4020ff3a: f00d ret.n +4020ff3c: 158226 beqi a2, 8, 4020ff55 +4020ff3f: 870c movi.n a7, 8 +4020ff41: 072727 blt a7, a2, 4020ff4c +4020ff44: 202226 beqi a2, 2, 4020ff68 +4020ff47: 0014c6 j 4020ff9e +4020ff4a: 260000 excw +4020ff4d: 263ce2 excw +4020ff50: 0626f2 l32i a15, a6, 24 +4020ff53: 660012 l8ui a1, a0, 102 +4020ff56: 0c45b3 excw +4020ff59: a247f2 s8i a15, a7, 162 +4020ff5c: 620c40 excw +4020ff5f: 0529 s32i.n a2, a5, 0 +4020ff61: 320c movi.n a2, 3 +4020ff63: 000c46 j 4020ff98 +4020ff66: 660000 excw +4020ff69: 1c32c3 excw +4020ff6c: a247f2 s8i a15, a7, 162 +4020ff6f: 0c2d mov.n a2, a12 +4020ff71: 052962 l32i a6, a9, 20 +4020ff74: 220c movi.n a2, 2 +4020ff76: 000786 j 4020ff98 +4020ff79: f3c332 addi a3, a3, -13 +4020ff7c: e3dc bnez.n a3, 4020ff9e +4020ff7e: c20c movi.n a2, 12 +4020ff80: 1aa247 bge a2, a4, 4020ff9e +4020ff83: 020c movi.n a2, 0 +4020ff85: 0529 s32i.n a2, a5, 0 +4020ff87: 520c movi.n a2, 5 +4020ff89: 0002c6 j 4020ff98 +4020ff8c: 0e5366 bnei a3, 5, 4020ff9e +4020ff8f: 0b54a6 blti a4, 5, 4020ff9e +4020ff92: 020c movi.n a2, 0 +4020ff94: 0529 s32i.n a2, a5, 0 +4020ff96: 120c movi.n a2, 1 +4020ff98: 0629 s32i.n a2, a6, 0 +4020ff9a: 020c movi.n a2, 0 +4020ff9c: f00d ret.n +4020ff9e: f27c movi.n a2, -1 +4020ffa0: f00d ret.n + ... + +4020ffa4 : +4020ffa4: 20d226 beqi a2, 64, 4020ffc8 +4020ffa7: 034c movi.n a3, 64 +4020ffa9: 0b2327 blt a3, a2, 4020ffb8 +4020ffac: 032c movi.n a3, 32 +4020ffae: 182226 beqi a2, 2, 4020ffca +4020ffb1: 138226 beqi a2, 8, 4020ffc8 +4020ffb4: 000286 j 4020ffc2 +4020ffb7: 530c00 excw +4020ffba: 0ce226 beqi a2, 128, 4020ffca +4020ffbd: d30c movi.n a3, 13 +4020ffbf: 07f226 beqi a2, 0x100, 4020ffca +4020ffc2: 030c movi.n a3, 0 +4020ffc4: 000086 j 4020ffca +4020ffc7: 031c00 excw +4020ffca: 032d mov.n a2, a3 +4020ffcc: f00d ret.n + ... + +4020ffd0 : +4020ffd0: 930c movi.n a3, 9 +4020ffd2: 20d226 beqi a2, 64, 4020fff6 +4020ffd5: 034c movi.n a3, 64 +4020ffd7: 0d2327 blt a3, a2, 4020ffe8 +4020ffda: 230c movi.n a3, 2 +4020ffdc: 161237 beq a2, a3, 4020fff6 +4020ffdf: 330c movi.n a3, 3 +4020ffe1: 118226 beqi a2, 8, 4020fff6 +4020ffe4: 000306 j 4020fff4 +4020ffe7: e22600 excw +4020ffea: f26602 s32i a0, a6, 0x3c8 +4020ffed: 630c05 call0 402730b0 <_irom0_text_end+0x42534> +4020fff0: 000086 j 4020fff6 +4020fff3: 030c00 excw +4020fff6: 032d mov.n a2, a3 +4020fff8: f00d ret.n + ... + +4020fffc : +4020fffc: 040c movi.n a4, 0 +4020fffe: 166337 bbci a3, 3, 40210018 +40210001: 004242 s8i a4, a2, 0 +40210004: f40c movi.n a4, 15 +40210006: 014242 s8i a4, a2, 1 +40210009: acaf42 movi a4, -84 +4021000c: 024242 s8i a4, a2, 2 +4021000f: 440c movi.n a4, 4 +40210011: 034242 s8i a4, a2, 3 +40210014: 224b addi.n a2, a2, 4 +40210016: 140c movi.n a4, 1 +40210018: 186367 bbci a3, 6, 40210034 +4021001b: 050c movi.n a5, 0 +4021001d: 004252 s8i a5, a2, 0 +40210020: f50c movi.n a5, 15 +40210022: 014252 s8i a5, a2, 1 +40210025: acaf52 movi a5, -84 +40210028: 024252 s8i a5, a2, 2 +4021002b: 850c movi.n a5, 8 +4021002d: 034252 s8i a5, a2, 3 +40210030: 441b addi.n a4, a4, 1 +40210032: 224b addi.n a2, a2, 4 +40210034: 186317 bbci a3, 1, 40210050 +40210037: 050c movi.n a5, 0 +40210039: 004252 s8i a5, a2, 0 +4021003c: f50c movi.n a5, 15 +4021003e: 014252 s8i a5, a2, 1 +40210041: acaf52 movi a5, -84 +40210044: 024252 s8i a5, a2, 2 +40210047: 250c movi.n a5, 2 +40210049: 034252 s8i a5, a2, 3 +4021004c: 441b addi.n a4, a4, 1 +4021004e: 224b addi.n a2, a2, 4 +40210050: 146307 bbci a3, 0, 40210068 +40210053: f50c movi.n a5, 15 +40210055: 030c movi.n a3, 0 +40210057: 014252 s8i a5, a2, 1 +4021005a: acaf52 movi a5, -84 +4021005d: 004232 s8i a3, a2, 0 +40210060: 024252 s8i a5, a2, 2 +40210063: 034232 s8i a3, a2, 3 +40210066: 441b addi.n a4, a4, 1 +40210068: 042d mov.n a2, a4 +4021006a: f00d ret.n + +4021006c : +4021006c: 040c movi.n a4, 0 +4021006e: 166337 bbci a3, 3, 40210088 +40210071: 004242 s8i a4, a2, 0 +40210074: 045c movi.n a4, 80 +40210076: 014242 s8i a4, a2, 1 +40210079: 247c movi.n a4, -14 +4021007b: 024242 s8i a4, a2, 2 +4021007e: 440c movi.n a4, 4 +40210080: 034242 s8i a4, a2, 3 +40210083: 224b addi.n a2, a2, 4 +40210085: 01a042 movi a4, 1 +40210088: 186317 bbci a3, 1, 402100a4 +4021008b: 050c movi.n a5, 0 +4021008d: 004252 s8i a5, a2, 0 +40210090: 055c movi.n a5, 80 +40210092: 014252 s8i a5, a2, 1 +40210095: 257c movi.n a5, -14 +40210097: 024252 s8i a5, a2, 2 +4021009a: 250c movi.n a5, 2 +4021009c: 034252 s8i a5, a2, 3 +4021009f: 441b addi.n a4, a4, 1 +402100a1: 04c222 addi a2, a2, 4 +402100a4: 146307 bbci a3, 0, 402100bc +402100a7: 055c movi.n a5, 80 +402100a9: 030c movi.n a3, 0 +402100ab: 014252 s8i a5, a2, 1 +402100ae: 257c movi.n a5, -14 +402100b0: 004232 s8i a3, a2, 0 +402100b3: 024252 s8i a5, a2, 2 +402100b6: 034232 s8i a3, a2, 3 +402100b9: 01c442 addi a4, a4, 1 +402100bc: 042d mov.n a2, a4 +402100be: f00d ret.n + +402100c0 : +402100c0: 020c movi.n a2, 0 +402100c2: f00d ret.n + +402100c4 : +402100c4: 020c movi.n a2, 0 +402100c6: f00d ret.n + +402100c8 : +402100c8: 020c movi.n a2, 0 +402100ca: f00d ret.n + +402100cc : +402100cc: f0c112 addi a1, a1, -16 +402100cf: 542242 l32i a4, a2, 0x150 +402100d2: 3109 s32i.n a0, a1, 12 +402100d4: 743030 extui a3, a3, 0, 8 +402100d7: 0754b6 bltui a4, 5, 402100e2 +402100da: 842242 l32i a4, a2, 0x210 +402100dd: 032d mov.n a2, a3 +402100df: 0004c0 callx0 a4 +402100e2: 3108 l32i.n a0, a1, 12 +402100e4: 10c112 addi a1, a1, 16 +402100e7: f00d ret.n +402100e9: 000000 ill + +402100ec : +402100ec: 020c movi.n a2, 0 +402100ee: f00d ret.n + +402100f0 : +402100f0: 020c movi.n a2, 0 +402100f2: f00d ret.n + +402100f4 : +402100f4: f00d ret.n +402100f6: 140000 extui a0, a0, 0, 2 +402100f9: 600000 neg a0, a0 +402100fc: ff .byte 0xff +402100fd: ff .byte 0xff +402100fe: 0f .byte 0xf +402100ff: 002000 isync +40210102: ff6000 excw +40210105: ff .byte 0xff +40210106: fff9 s32i.n a15, a15, 60 + +40210108 : +40210108: 742020 extui a2, a2, 0, 8 +4021010b: 1142c0 slli a4, a2, 4 +4021010e: c02420 sub a2, a4, a2 +40210111: fffa51 l32r a5, 402100fc +40210114: fff941 l32r a4, 402100f8 +40210117: 112280 slli a2, a2, 8 +4021011a: 424a add.n a4, a2, a4 +4021011c: 103350 and a3, a3, a5 +4021011f: 0020c0 memw +40210122: 0439 s32i.n a3, a4, 0 +40210124: fff731 l32r a3, 40210100 +40210127: 223a add.n a2, a2, a3 +40210129: 0020c0 memw +4021012c: 0248 l32i.n a4, a2, 0 +4021012e: e0c831 l32r a3, 40208450 +40210131: 203430 or a3, a4, a3 +40210134: 0020c0 memw +40210137: 0239 s32i.n a3, a2, 0 +40210139: 0020c0 memw +4021013c: 0248 l32i.n a4, a2, 0 +4021013e: fff131 l32r a3, 40210104 +40210141: 103430 and a3, a4, a3 +40210144: 0020c0 memw +40210147: 0239 s32i.n a3, a2, 0 +40210149: f00d ret.n +4021014b: 090000 excw +4021014e: 246000 extui a6, a0, 0, 3 +40210151: 401002 l16ui a0, a0, 128 +40210154: f00004 excw +40210157: 3f .byte 0x3f +40210158: 000904 excw +4021015b: 090860 excw +4021015e: 886000 excw +40210161: 0f .byte 0xf +40210162: a84000 excw +40210165: 0f .byte 0xf +40210166: 00 .byte 00 +40210167: 40 .byte 0x40 + +40210168 : +40210168: f0c112 addi a1, a1, -16 +4021016b: 3109 s32i.n a0, a1, 12 +4021016d: 21c9 s32i.n a12, a1, 8 +4021016f: 742020 extui a2, a2, 0, 8 +40210172: 07a216 beqz a2, 402101f0 +40210175: fff5c1 l32r a12, 4021014c +40210178: e27c movi.n a2, -2 +4021017a: 0020c0 memw +4021017d: 0c38 l32i.n a3, a12, 0 +4021017f: 040c movi.n a4, 0 +40210181: 102320 and a2, a3, a2 +40210184: fff331 l32r a3, 40210150 +40210187: 0020c0 memw +4021018a: 0c29 s32i.n a2, a12, 0 +4021018c: 820c movi.n a2, 8 +4021018e: fff401 l32r a0, 40210160 +40210191: 0000c0 callx0 a0 +40210194: fff041 l32r a4, 40210154 +40210197: 120c movi.n a2, 1 +40210199: 0020c0 memw +4021019c: 0438 l32i.n a3, a4, 0 +4021019e: 203320 or a3, a3, a2 +402101a1: 0020c0 memw +402101a4: 0439 s32i.n a3, a4, 0 +402101a6: ffec31 l32r a3, 40210158 +402101a9: b40c movi.n a4, 11 +402101ab: 0020c0 memw +402101ae: 0349 s32i.n a4, a3, 0 +402101b0: ffeb31 l32r a3, 4021015c +402101b3: d40c movi.n a4, 13 +402101b5: 0020c0 memw +402101b8: 0349 s32i.n a4, a3, 0 +402101ba: 0020c0 memw +402101bd: 0c48 l32i.n a4, a12, 0 +402101bf: 833c movi.n a3, 56 +402101c1: 203430 or a3, a4, a3 +402101c4: 0020c0 memw +402101c7: 0c39 s32i.n a3, a12, 0 +402101c9: 0020c0 memw +402101cc: 0c48 l32i.n a4, a12, 0 +402101ce: 937c movi.n a3, -7 +402101d0: 103430 and a3, a4, a3 +402101d3: 0020c0 memw +402101d6: 0c39 s32i.n a3, a12, 0 +402101d8: 0020c0 memw +402101db: 002c32 l32i a3, a12, 0 +402101de: 202320 or a2, a3, a2 +402101e1: 0020c0 memw +402101e4: 006c22 s32i a2, a12, 0 +402101e7: 00a122 movi a2, 0x100 +402101ea: ffde01 l32r a0, 40210164 +402101ed: 0000c0 callx0 a0 +402101f0: 107985 call0 4022098c +402101f3: 032102 l32i a0, a1, 12 +402101f6: 0221c2 l32i a12, a1, 8 +402101f9: 10c112 addi a1, a1, 16 +402101fc: 000080 ret +402101ff: 001c00 excw +40210202: 446000 extui a6, a0, 0, 5 +40210205: 401017 beq a0, a1, 40210249 + +40210208 : +40210208: f0c112 addi a1, a1, -16 +4021020b: 21c9 s32i.n a12, a1, 8 +4021020d: 11d9 s32i.n a13, a1, 4 +4021020f: 0061e2 s32i a14, a1, 0 +40210212: 74d020 extui a13, a2, 0, 8 +40210215: 036102 s32i a0, a1, 12 +40210218: 20c330 or a12, a3, a3 +4021021b: fffa01 l32r a0, 40210204 +4021021e: 0000c0 callx0 a0 +40210221: 02ed mov.n a14, a2 +40210223: 112dc0 slli a2, a13, 4 +40210226: c022d0 sub a2, a2, a13 +40210229: fff5d1 l32r a13, 40210200 +4021022c: 112280 slli a2, a2, 8 +4021022f: d2da add.n a13, a2, a13 +40210231: 0020c0 memw +40210234: 0d28 l32i.n a2, a13, 0 +40210236: c3ad31 l32r a3, 402010ec +40210239: 0b0237 bnone a2, a3, 40210248 +4021023c: fff201 l32r a0, 40210204 +4021023f: 0000c0 callx0 a0 +40210242: c022e0 sub a2, a2, a14 +40210245: e8bc27 bgeu a12, a2, 40210231 +40210248: 3108 l32i.n a0, a1, 12 +4021024a: 21c8 l32i.n a12, a1, 8 +4021024c: 11d8 l32i.n a13, a1, 4 +4021024e: 01e8 l32i.n a14, a1, 0 +40210250: 10c112 addi a1, a1, 16 +40210253: f00d ret.n +40210255: 000000 ill + +40210258 : +40210258: f00d ret.n +4021025a: dc0000 excw +4021025d: fe8b addi.n a15, a14, 8 +4021025f: 3f .byte 0x3f + +40210260 : +40210260: ffff31 l32r a3, 4021025c +40210263: 004322 s8i a2, a3, 0 +40210266: f00d ret.n +40210268: 0058 l32i.n a5, a0, 0 +4021026a: 543ff0 extui a3, a15, 15, 6 +4021026d: 3ff000 excw +40210270: 00f000 excw +40210273: ffff00 excw +40210276: ff .byte 0xff +40210277: 0f .byte 0xf +40210278: f00050 subx8 a0, a0, a5 +4021027b: 3f .byte 0x3f +4021027c: 005c movi.n a0, 80 +4021027e: ff3ff0 excw +40210281: ff .byte 0xff +40210282: ff .byte 0xff + ... + +40210284 : +40210284: fff931 l32r a3, 40210268 +40210287: 80c112 addi a1, a1, -128 +4021028a: 0020c0 memw +4021028d: 0348 l32i.n a4, a3, 0 +4021028f: fff731 l32r a3, 4021026c +40210292: 017d mov.n a7, a1 +40210294: 0020c0 memw +40210297: 0358 l32i.n a5, a3, 0 +40210299: fff531 l32r a3, 40210270 +4021029c: 103430 and a3, a4, a3 +4021029f: fff541 l32r a4, 40210274 +402102a2: 113300 slli a3, a3, 16 +402102a5: 104540 and a4, a5, a4 +402102a8: 204340 or a4, a3, a4 +402102ab: fff331 l32r a3, 40210278 +402102ae: c38e51 l32r a5, 402010e8 +402102b1: 0020c0 memw +402102b4: 0368 l32i.n a6, a3, 0 +402102b6: fff131 l32r a3, 4021027c +402102b9: 106650 and a6, a6, a5 +402102bc: 0020c0 memw +402102bf: 0338 l32i.n a3, a3, 0 +402102c1: ffef51 l32r a5, 40210280 +402102c4: 103350 and a3, a3, a5 +402102c7: 203630 or a3, a6, a3 +402102ca: 80a062 movi a6, 128 +402102cd: 806260 add a6, a2, a6 +402102d0: 030252 l8ui a5, a2, 3 +402102d3: 018580 slli a8, a5, 24 +402102d6: 020252 l8ui a5, a2, 2 +402102d9: 115500 slli a5, a5, 16 +402102dc: 205850 or a5, a8, a5 +402102df: 000282 l8ui a8, a2, 0 +402102e2: 208580 or a8, a5, a8 +402102e5: 010252 l8ui a5, a2, 1 +402102e8: 224b addi.n a2, a2, 4 +402102ea: 115580 slli a5, a5, 8 +402102ed: 205850 or a5, a8, a5 +402102f0: 0759 s32i.n a5, a7, 0 +402102f2: 774b addi.n a7, a7, 4 +402102f4: d89627 bne a6, a2, 402102d0 +402102f7: 196132 s32i a3, a1, 100 +402102fa: 030c movi.n a3, 0 +402102fc: 186142 s32i a4, a1, 96 +402102ff: 032d mov.n a2, a3 +40210301: 68a042 movi a4, 104 +40210304: 513a add.n a5, a1, a3 +40210306: 0558 l32i.n a5, a5, 0 +40210308: 334b addi.n a3, a3, 4 +4021030a: 225a add.n a2, a2, a5 +4021030c: f49347 bne a3, a4, 40210304 +4021030f: f37c movi.n a3, -1 +40210311: 302320 xor a2, a3, a2 +40210314: 1a2132 l32i a3, a1, 104 +40210317: 140c movi.n a4, 1 +40210319: c03320 sub a3, a3, a2 +4021031c: 80a092 movi a9, 128 +4021031f: 020c movi.n a2, 0 +40210321: 932430 movnez a2, a4, a3 +40210324: 119a add.n a1, a1, a9 +40210326: f00d ret.n +40210328: 0010d6 bgez a0, 4021032d +4021032b: f38a00 excw +4021032e: 124022 s8i a2, a0, 18 +40210331: c9f0c1 l32r a12, 40202af4 +40210334: 12c821 l32r a2, 401d4e54 <_lit4_end+0xceb28> +40210337: d0b321 l32r a2, 40204604 +4021033a: 3109 s32i.n a0, a1, 12 +4021033c: 0238 l32i.n a3, a2, 0 +4021033e: 4c9c beqz.n a12, 40210356 +40210340: 012316 beqz a3, 40210356 +40210343: 0c2d mov.n a2, a12 +40210345: 0003c0 callx0 a3 +40210348: fff841 l32r a4, 40210328 +4021034b: fff831 l32r a3, 4021032c +4021034e: 0c2d mov.n a2, a12 +40210350: c46e01 l32r a0, 40201508 +40210353: 0000c0 callx0 a0 +40210356: 3108 l32i.n a0, a1, 12 +40210358: 21c8 l32i.n a12, a1, 8 +4021035a: 10c112 addi a1, a1, 16 +4021035d: f00d ret.n +4021035f: a12000 sll a2, a0 +40210362: 280007 bnone a0, a0, 4021038e +40210365: 3ff000 excw + +40210368 : +40210368: f0c112 addi a1, a1, -16 +4021036b: 21c9 s32i.n a12, a1, 8 +4021036d: fffcc1 l32r a12, 40210360 +40210370: 020c movi.n a2, 0 +40210372: 0c3d mov.n a3, a12 +40210374: 3109 s32i.n a0, a1, 12 +40210376: ffe905 call0 40210208 +40210379: 0c3d mov.n a3, a12 +4021037b: 120c movi.n a2, 1 +4021037d: ffe885 call0 40210208 +40210380: fff931 l32r a3, 40210364 +40210383: b27c movi.n a2, -5 +40210385: 0020c0 memw +40210388: 0348 l32i.n a4, a3, 0 +4021038a: 3108 l32i.n a0, a1, 12 +4021038c: 102420 and a2, a4, a2 +4021038f: 21c8 l32i.n a12, a1, 8 +40210391: 0020c0 memw +40210394: 0329 s32i.n a2, a3, 0 +40210396: 10c112 addi a1, a1, 16 +40210399: f00d ret.n +4021039b: 804600 add a4, a6, a0 +4021039e: fe .byte 0xfe +4021039f: 3f .byte 0x3f + +402103a0 : +402103a0: 743020 extui a3, a2, 0, 8 +402103a3: 140c movi.n a4, 1 +402103a5: 020c movi.n a2, 0 +402103a7: 932430 movnez a2, a4, a3 +402103aa: fffc31 l32r a3, 4021039c +402103ad: 004322 s8i a2, a3, 0 +402103b0: f00d ret.n +402103b2: f50000 extui a0, a0, 16, 16 +402103b5: fe8b addi.n a15, a14, 8 +402103b7: 3f .byte 0x3f +402103b8: 2144e4 excw +402103bb: 8bf840 excw +402103be: fe .byte 0xfe +402103bf: 3f .byte 0x3f +402103c0: fe8bf4 excw +402103c3: 3f .byte 0x3f +402103c4: 8be8 l32i.n a14, a11, 32 +402103c6: fe .byte 0xfe +402103c7: 3f .byte 0x3f +402103c8: 22f351 l32r a5, 401d8f94 <_lit4_end+0xd2c68> +402103cb: 8be940 excw +402103ce: fe .byte 0xfe +402103cf: 3f .byte 0x3f +402103d0: 8bea add.n a8, a11, a14 +402103d2: fe .byte 0xfe +402103d3: 3f .byte 0x3f +402103d4: f0c112 addi a1, a1, -16 +402103d7: 0261c2 s32i a12, a1, 8 +402103da: 036102 s32i a0, a1, 12 +402103dd: 11d9 s32i.n a13, a1, 4 +402103df: 01e9 s32i.n a14, a1, 0 +402103e1: 20c220 or a12, a2, a2 +402103e4: 0e3dc5 call0 4021e7c4 +402103e7: 12cc bnez.n a2, 402103ec +402103e9: 0e0f05 call0 4021e4dc +402103ec: 0e8945 call0 4021ec84 +402103ef: 62cc bnez.n a2, 402103f9 +402103f1: 020c movi.n a2, 0 +402103f3: 0028c6 j 4021049a +402103f6: 000000 ill +402103f9: ffee21 l32r a2, 402103b4 +402103fc: 000232 l8ui a3, a2, 0 +402103ff: 02dd mov.n a13, a2 +40210401: 23dc bnez.n a3, 40210417 +40210403: ffee21 l32r a2, 402103bc +40210406: ffec31 l32r a3, 402103b8 +40210409: 040c movi.n a4, 0 +4021040b: cfea01 l32r a0, 402043b4 +4021040e: 0000c0 callx0 a0 +40210411: 01a022 movi a2, 1 +40210414: 004d22 s8i a2, a13, 0 +40210417: 0f9005 call0 4021fd18 +4021041a: ffe9d1 l32r a13, 402103c0 +4021041d: 428c beqz.n a2, 40210425 +4021041f: 000d22 l8ui a2, a13, 0 +40210422: cb1266 bnei a2, 1, 402103f1 +40210425: 000d22 l8ui a2, a13, 0 +40210428: 025256 bnez a2, 40210451 +4021042b: 120c movi.n a2, 1 +4021042d: 0fb585 call0 4021ff88 +40210430: ffe3e1 l32r a14, 402103bc +40210433: 202ee0 or a2, a14, a14 +40210436: cee101 l32r a0, 40203fbc +40210439: 0000c0 callx0 a0 +4021043c: 0e2d mov.n a2, a14 +4021043e: 150c movi.n a5, 1 +40210440: 00a042 movi a4, 0 +40210443: 0aa032 movi a3, 10 +40210446: cedc01 l32r a0, 40203fb8 +40210449: 0000c0 callx0 a0 +4021044c: 120c movi.n a2, 1 +4021044e: 004d22 s8i a2, a13, 0 +40210451: ffdc21 l32r a2, 402103c4 +40210454: 000232 l8ui a3, a2, 0 +40210457: 20d220 or a13, a2, a2 +4021045a: 01c332 addi a3, a3, 1 +4021045d: 743030 extui a3, a3, 0, 8 +40210460: 004232 s8i a3, a2, 0 +40210463: a20c movi.n a2, 10 +40210465: 0db237 bgeu a2, a3, 40210476 +40210468: ffd821 l32r a2, 402103c8 +4021046b: c6f801 l32r a0, 4020204c +4021046e: 0000c0 callx0 a0 +40210471: a20c movi.n a2, 10 +40210473: 004d22 s8i a2, a13, 0 +40210476: ffd521 l32r a2, 402103cc +40210479: a40c movi.n a4, 10 +4021047b: 000232 l8ui a3, a2, 0 +4021047e: 000d22 l8ui a2, a13, 0 +40210481: 232a add.n a2, a3, a2 +40210483: ffd331 l32r a3, 402103d0 +40210486: 07a427 bge a4, a2, 40210491 +40210489: 232a add.n a2, a3, a2 +4021048b: f5c222 addi a2, a2, -11 +4021048e: 0000c6 j 40210495 +40210491: 232a add.n a2, a3, a2 +40210493: 220b addi.n a2, a2, -1 +40210495: 0042c2 s8i a12, a2, 0 +40210498: f27c movi.n a2, -1 +4021049a: 3108 l32i.n a0, a1, 12 +4021049c: 21c8 l32i.n a12, a1, 8 +4021049e: 11d8 l32i.n a13, a1, 4 +402104a0: 01e8 l32i.n a14, a1, 0 +402104a2: 10c112 addi a1, a1, 16 +402104a5: f00d ret.n +402104a7: f33700 excw +402104aa: 214022 s8i a2, a0, 33 +402104ad: ae .byte 0xae +402104ae: c112c5 call0 401d15dc <_lit4_end+0xcb2b0> +402104b1: 3109f0 srai a0, a15, 25 +402104b4: 832232 l32i a3, a2, 0x20c +402104b7: b41c movi.n a4, 27 +402104b9: 443830 extui a3, a3, 8, 5 +402104bc: 1dc332 addi a3, a3, 29 +402104bf: 443030 extui a3, a3, 0, 5 +402104c2: 120c movi.n a2, 1 +402104c4: 0ab437 bgeu a4, a3, 402104d2 +402104c7: fff821 l32r a2, 402104a8 +402104ca: c6e001 l32r a0, 4020204c +402104cd: 0000c0 callx0 a0 +402104d0: 020c movi.n a2, 0 +402104d2: 3108 l32i.n a0, a1, 12 +402104d4: 10c112 addi a1, a1, 16 +402104d7: f00d ret.n +402104d9: 000000 ill + +402104dc : +402104dc: f0c112 addi a1, a1, -16 +402104df: 3109 s32i.n a0, a1, 12 +402104e1: 108645 call0 40220d48 +402104e4: 3108 l32i.n a0, a1, 12 +402104e6: 10c112 addi a1, a1, 16 +402104e9: f00d ret.n + ... + +402104ec : +402104ec: f0c112 addi a1, a1, -16 +402104ef: 020c movi.n a2, 0 +402104f1: 3109 s32i.n a0, a1, 12 +402104f3: 063c05 call0 402168b4 +402104f6: c6bd41 l32r a4, 40201fec +402104f9: f43020 extui a3, a2, 0, 16 +402104fc: 211347 beq a3, a4, 40210521 +402104ff: f42020 extui a2, a2, 0, 16 +40210502: 902220 addx2 a2, a2, a2 +40210505: b30c movi.n a3, 11 +40210507: 1122e0 slli a2, a2, 2 +4021050a: c5c301 l32r a0, 40201c18 +4021050d: 0000c0 callx0 a0 +40210510: f42020 extui a2, a2, 0, 16 +40210513: 00a442 movi a4, 0x400 +40210516: 023d mov.n a3, a2 +40210518: 02b427 bgeu a4, a2, 4021051e +4021051b: 00a432 movi a3, 0x400 +4021051e: f43030 extui a3, a3, 0, 16 +40210521: 3108 l32i.n a0, a1, 12 +40210523: 032d mov.n a2, a3 +40210525: 10c112 addi a1, a1, 16 +40210528: f00d ret.n + ... + +4021052c : +4021052c: f0c112 addi a1, a1, -16 +4021052f: 11d9 s32i.n a13, a1, 4 +40210531: f4d030 extui a13, a3, 0, 16 +40210534: 21c9 s32i.n a12, a1, 8 +40210536: 0d3d mov.n a3, a13 +40210538: 02cd mov.n a12, a2 +4021053a: 744040 extui a4, a4, 0, 8 +4021053d: 01e9 s32i.n a14, a1, 0 +4021053f: 036102 s32i a0, a1, 12 +40210542: 90ddc0 addx2 a13, a13, a12 +40210545: 065145 call0 40216a5c +40210548: 00a4e2 movi a14, 0x400 +4021054b: 2d1cd7 beq a12, a13, 4021057c +4021054e: 001c42 l16ui a4, a12, 0 +40210551: c6a621 l32r a2, 40201fec +40210554: 1c1427 beq a4, a2, 40210574 +40210557: 902440 addx2 a2, a4, a4 +4021055a: b30c movi.n a3, 11 +4021055c: 1122e0 slli a2, a2, 2 +4021055f: c5ae01 l32r a0, 40201c18 +40210562: 0000c0 callx0 a0 +40210565: f42020 extui a2, a2, 0, 16 +40210568: 204220 or a4, a2, a2 +4021056b: 02be27 bgeu a14, a2, 40210571 +4021056e: 00a442 movi a4, 0x400 +40210571: f44040 extui a4, a4, 0, 16 +40210574: 005c42 s16i a4, a12, 0 +40210577: cc2b addi.n a12, a12, 2 +40210579: fff386 j 4021054b +4021057c: 3108 l32i.n a0, a1, 12 +4021057e: 21c8 l32i.n a12, a1, 8 +40210580: 11d8 l32i.n a13, a1, 4 +40210582: 01e8 l32i.n a14, a1, 0 +40210584: 10c112 addi a1, a1, 16 +40210587: f00d ret.n +40210589: 000000 ill + +4021058c : +4021058c: f0c112 addi a1, a1, -16 +4021058f: 3109 s32i.n a0, a1, 12 +40210591: 068985 call0 40216e2c +40210594: c69641 l32r a4, 40201fec +40210597: f43020 extui a3, a2, 0, 16 +4021059a: 131347 beq a3, a4, 402105b1 +4021059d: f42020 extui a2, a2, 0, 16 +402105a0: 902220 addx2 a2, a2, a2 +402105a3: b30c movi.n a3, 11 +402105a5: 1122e0 slli a2, a2, 2 +402105a8: c59c01 l32r a0, 40201c18 +402105ab: 0000c0 callx0 a0 +402105ae: f43020 extui a3, a2, 0, 16 +402105b1: 3108 l32i.n a0, a1, 12 +402105b3: 032d mov.n a2, a3 +402105b5: 10c112 addi a1, a1, 16 +402105b8: f00d ret.n + ... + +402105bc : +402105bc: f00d ret.n +402105be: a40000 extui a0, a0, 0, 11 +402105c1: 1028 l32i.n a2, a0, 4 +402105c3: 40 .byte 0x40 + +402105c4 : +402105c4: e0c112 addi a1, a1, -32 +402105c7: 013d mov.n a3, a1 +402105c9: 840c movi.n a4, 8 +402105cb: 020c movi.n a2, 0 +402105cd: 7109 s32i.n a0, a1, 28 +402105cf: fffc01 l32r a0, 402105c0 +402105d2: 0000c0 callx0 a0 +402105d5: 0128 l32i.n a2, a1, 0 +402105d7: 7108 l32i.n a0, a1, 28 +402105d9: 352c20 extui a2, a2, 28, 4 +402105dc: 20c112 addi a1, a1, 32 +402105df: f00d ret.n +402105e1: 000000 ill + +402105e4 : +402105e4: c56021 l32r a2, 40201b64 +402105e7: 832222 l32i a2, a2, 0x20c +402105ea: 442820 extui a2, a2, 8, 5 +402105ed: f00d ret.n + ... + +402105f0 : +402105f0: f0c112 addi a1, a1, -16 +402105f3: 3109 s32i.n a0, a1, 12 +402105f5: ffeb45 call0 402104ac +402105f8: ffa032 movi a3, 255 +402105fb: 728c beqz.n a2, 40210606 +402105fd: c55921 l32r a2, 40201b64 +40210600: 832232 l32i a3, a2, 0x20c +40210603: 043d30 extui a3, a3, 13, 1 +40210606: 3108 l32i.n a0, a1, 12 +40210608: 032d mov.n a2, a3 +4021060a: 10c112 addi a1, a1, 16 +4021060d: f00d ret.n + ... + +40210610 : +40210610: c55531 l32r a3, 40201b64 +40210613: 120c movi.n a2, 1 +40210615: 832342 l32i a4, a3, 0x20c +40210618: 444840 extui a4, a4, 8, 5 +4021061b: 1534a6 blti a4, 3, 40210634 +4021061e: 02d322 addmi a2, a3, 0x200 +40210621: 0d0242 l8ui a4, a2, 13 +40210624: f51c movi.n a5, 31 +40210626: 444040 extui a4, a4, 0, 5 +40210629: 120c movi.n a2, 1 +4021062b: 051457 beq a4, a5, 40210634 +4021062e: 832322 l32i a2, a3, 0x20c +40210631: 042f20 extui a2, a2, 15, 1 +40210634: f00d ret.n + ... + +40210638 : +40210638: 743020 extui a3, a2, 0, 8 +4021063b: c54a21 l32r a2, 40201b64 +4021063e: 832242 l32i a4, a2, 0x20c +40210641: 020c movi.n a2, 0 +40210643: 444840 extui a4, a4, 8, 5 +40210646: 3223f6 bgeui a3, 2, 4021067c +40210649: c9e151 l32r a5, 40202dd0 +4021064c: 052426 beqi a4, 2, 40210655 +4021064f: e1c442 addi a4, a4, -31 +40210652: 139427 bne a4, a2, 40210669 +40210655: 0c0542 l8ui a4, a5, 12 +40210658: 027c movi.n a2, -16 +4021065a: 343030 extui a3, a3, 0, 4 +4021065d: 102420 and a2, a4, a2 +40210660: 203230 or a3, a2, a3 +40210663: 0c4532 s8i a3, a5, 12 +40210666: 000406 j 4021067a +40210669: 061542 l16ui a4, a5, 12 +4021066c: c27c movi.n a2, -4 +4021066e: 143030 extui a3, a3, 0, 2 +40210671: 102420 and a2, a4, a2 +40210674: 203230 or a3, a2, a3 +40210677: 065532 s16i a3, a5, 12 +4021067a: 120c movi.n a2, 1 +4021067c: f00d ret.n + ... + +40210680 : +40210680: c53921 l32r a2, 40201b64 +40210683: 832232 l32i a3, a2, 0x20c +40210686: 832222 l32i a2, a2, 0x20c +40210689: 443830 extui a3, a3, 8, 5 +4021068c: e1c342 addi a4, a3, -31 +4021068f: 148c beqz.n a4, 40210694 +40210691: 102366 bnei a3, 2, 402106a5 +40210694: 342020 extui a2, a2, 0, 4 +40210697: 320b addi.n a3, a2, -1 +40210699: 140c movi.n a4, 1 +4021069b: 020c movi.n a2, 0 +4021069d: 832430 moveqz a2, a4, a3 +402106a0: 742020 extui a2, a2, 0, 8 +402106a3: f00d ret.n +402106a5: 143020 extui a3, a2, 0, 2 +402106a8: 412220 srli a2, a2, 2 +402106ab: 051366 bnei a3, 1, 402106b4 +402106ae: 042020 extui a2, a2, 0, 1 +402106b1: f00d ret.n +402106b3: 130c00 excw +402106b6: 302230 xor a2, a2, a3 +402106b9: 102230 and a2, a2, a3 +402106bc: f00d ret.n + ... + +402106c0 : +402106c0: f0c112 addi a1, a1, -16 +402106c3: 11d9 s32i.n a13, a1, 4 +402106c5: c527d1 l32r a13, 40201b64 +402106c8: 3109 s32i.n a0, a1, 12 +402106ca: 21c9 s32i.n a12, a1, 8 +402106cc: 01e9 s32i.n a14, a1, 0 +402106ce: 02ddd2 addmi a13, a13, 0x200 +402106d1: 0d0d32 l8ui a3, a13, 13 +402106d4: 80af22 movi a2, -128 +402106d7: 328327 bany a3, a2, 4021070d +402106da: 0c0d22 l8ui a2, a13, 12 +402106dd: 146227 bbci a2, 2, 402106f5 +402106e0: 130d22 l8ui a2, a13, 19 +402106e3: 110d32 l8ui a3, a13, 17 +402106e6: 11c200 slli a12, a2, 16 +402106e9: 120d22 l8ui a2, a13, 18 +402106ec: 112280 slli a2, a2, 8 +402106ef: 202c20 or a2, a12, a2 +402106f2: 000446 j 40210707 +402106f5: 100d22 l8ui a2, a13, 16 +402106f8: 0e0d32 l8ui a3, a13, 14 +402106fb: 11c200 slli a12, a2, 16 +402106fe: 0f0d22 l8ui a2, a13, 15 +40210701: 112280 slli a2, a2, 8 +40210704: 202c20 or a2, a12, a2 +40210707: 202230 or a2, a2, a3 +4021070a: 001346 j 4021075b +4021070d: ffeb45 call0 402105c4 +40210710: 02ed mov.n a14, a2 +40210712: fff6c5 call0 40210680 +40210715: 32dc bnez.n a2, 4021072c +40210717: 0d0d22 l8ui a2, a13, 13 +4021071a: ce21c1 l32r a12, 40203fa0 +4021071d: 442020 extui a2, a2, 0, 5 +40210720: e1c232 addi a3, a2, -31 +40210723: 020c movi.n a2, 0 +40210725: 932c30 movnez a2, a12, a3 +40210728: 000bc6 j 4021075b +4021072b: 20e000 or a14, a0, a0 +4021072e: 930c74 excw +40210731: 233327 bltu a3, a2, 40210758 +40210734: 130c movi.n a3, 1 +40210736: 401200 ssl a2 +40210739: a13300 sll a3, a3 +4021073c: 60a342 movi a4, 0x360 +4021073f: 01a1c2 movi a12, 0x101 +40210742: 128347 bany a3, a4, 40210758 +40210745: c41c movi.n a4, 28 +40210747: 0a8347 bany a3, a4, 40210755 +4021074a: 134c movi.n a3, 65 +4021074c: 83c320 moveqz a12, a3, a2 +4021074f: 000146 j 40210758 +40210752: 000000 ill +40210755: 81a0c2 movi a12, 129 +40210758: 112c40 slli a2, a12, 12 +4021075b: 3108 l32i.n a0, a1, 12 +4021075d: 21c8 l32i.n a12, a1, 8 +4021075f: 11d8 l32i.n a13, a1, 4 +40210761: 01e8 l32i.n a14, a1, 0 +40210763: 10c112 addi a1, a1, 16 +40210766: f00d ret.n +40210768: fe8cf1 l32r a15, 40210198 +4021076b: 3f .byte 0x3f + +4021076c : +4021076c: 743020 extui a3, a2, 0, 8 +4021076f: 020c movi.n a2, 0 +40210771: 0733f6 bgeui a3, 3, 4021077c +40210774: fffd21 l32r a2, 40210768 +40210777: 004232 s8i a3, a2, 0 +4021077a: 120c movi.n a2, 1 +4021077c: f00d ret.n + ... + +40210780 : +40210780: fffa21 l32r a2, 40210768 +40210783: 000222 l8ui a2, a2, 0 +40210786: f00d ret.n +40210788: fe8cf4 excw +4021078b: 3f .byte 0x3f + +4021078c : +4021078c: ffff21 l32r a2, 40210788 +4021078f: 030c movi.n a3, 0 +40210791: 004232 s8i a3, a2, 0 +40210794: 120c movi.n a2, 1 +40210796: f00d ret.n +40210798: 803c movi.n a0, 56 +4021079a: fe .byte 0xfe +4021079b: 3f .byte 0x3f +4021079c: f29c beqz.n a2, 402107bf +4021079e: ff4022 s8i a2, a0, 255 +402107a1: 0f .byte 0xf +402107a2: 140000 extui a0, a0, 0, 2 +402107a5: 3fffc7 bbsi a15, 28, 402107e8 +402107a8: f279 s32i.n a7, a2, 60 +402107aa: 22 .byte 0x22 +402107ab: 40 .byte 0x40 + +402107ac : +402107ac: f0c112 addi a1, a1, -16 +402107af: 21c9 s32i.n a12, a1, 8 +402107b1: 036102 s32i a0, a1, 12 +402107b4: 0161d2 s32i a13, a1, 4 +402107b7: f4c020 extui a12, a2, 0, 16 +402107ba: ffe085 call0 402105c4 +402107bd: c4e931 l32r a3, 40201b64 +402107c0: 742020 extui a2, a2, 0, 8 +402107c3: 832332 l32i a3, a3, 0x20c +402107c6: 443830 extui a3, a3, 8, 5 +402107c9: 022366 bnei a3, 2, 402107cf +402107cc: 001f86 j 4021084e +402107cf: e1c332 addi a3, a3, -31 +402107d2: 078316 beqz a3, 4021084e +402107d5: fec232 addi a3, a2, -2 +402107d8: 743030 extui a3, a3, 0, 8 +402107db: 81a0d2 movi a13, 129 +402107de: 0e33b6 bltui a3, 3, 402107f0 +402107e1: fbc222 addi a2, a2, -5 +402107e4: 742020 extui a2, a2, 0, 8 +402107e7: 01a1d2 movi a13, 0x101 +402107ea: 0222b6 bltui a2, 2, 402107f0 +402107ed: 41a0d2 movi a13, 65 +402107f0: ffe8c5 call0 40210680 +402107f3: 130c movi.n a3, 1 +402107f5: 83d320 moveqz a13, a3, a2 +402107f8: ffe821 l32r a2, 40210798 +402107fb: 0228 l32i.n a2, a2, 0 +402107fd: 0d0266 bnei a2, -1, 4021080e +40210800: ffe721 l32r a2, 4021079c +40210803: c61201 l32r a0, 4020204c +40210806: 0000c0 callx0 a0 +40210809: 000ec6 j 40210848 +4021080c: 310000 srai a0, a0, 16 +4021080f: 20ffe4 excw +40210812: 3ab440 excw +40210815: 232032 l32i a3, a0, 140 +40210818: 2c20a3 excw +4021081b: 048c21 l32r a2, 401d1a4c <_lit4_end+0xcb720> +4021081e: 221b addi.n a2, a2, 1 +40210820: 0232c7 bltu a2, a12, 40210826 +40210823: 16bcd7 bgeu a12, a13, 4021083d +40210826: ffdf21 l32r a2, 402107a4 +40210829: 0228 l32i.n a2, a2, 0 +4021082b: 3238 l32i.n a3, a2, 12 +4021082d: 1228 l32i.n a2, a2, 4 +4021082f: c5a701 l32r a0, 40201ecc +40210832: 0000c0 callx0 a0 +40210835: 04bc27 bgeu a12, a2, 4021083d +40210838: 120c movi.n a2, 1 +4021083a: 012c56 bnez a12, 40210850 +4021083d: ffda21 l32r a2, 402107a8 +40210840: 0c3d mov.n a3, a12 +40210842: c60201 l32r a0, 4020204c +40210845: 0000c0 callx0 a0 +40210848: 020c movi.n a2, 0 +4021084a: 000086 j 40210850 +4021084d: 120c00 excw +40210850: 3108 l32i.n a0, a1, 12 +40210852: 21c8 l32i.n a12, a1, 8 +40210854: 11d8 l32i.n a13, a1, 4 +40210856: 10c112 addi a1, a1, 16 +40210859: f00d ret.n +4021085b: f24500 excw +4021085e: 22 .byte 0x22 +4021085f: 40 .byte 0x40 + +40210860 : +40210860: e0c112 addi a1, a1, -32 +40210863: 041c movi.n a4, 16 +40210865: 013d mov.n a3, a1 +40210867: 076102 s32i a0, a1, 28 +4021086a: ff5501 l32r a0, 402105c0 +4021086d: 0000c0 callx0 a0 +40210870: 000142 l8ui a4, a1, 0 +40210873: e9a032 movi a3, 233 +40210876: 020c movi.n a2, 0 +40210878: 181437 beq a4, a3, 40210894 +4021087b: 001132 l16ui a3, a1, 0 +4021087e: eaa422 movi a2, 0x4ea +40210881: 049327 bne a3, a2, 40210889 +40210884: 3128 l32i.n a2, a1, 12 +40210886: 000286 j 40210894 +40210889: fff421 l32r a2, 4021085c +4021088c: c5f001 l32r a0, 4020204c +4021088f: 0000c0 callx0 a0 +40210892: f27c movi.n a2, -1 +40210894: 7108 l32i.n a0, a1, 28 +40210896: 20c112 addi a1, a1, 32 +40210899: f00d ret.n +4021089b: f23700 excw +4021089e: 234022 s8i a2, a0, 35 +402108a1: 4022f2 l32i a15, a2, 0x100 +402108a4: 0f .byte 0xf +402108a5: 4022f2 l32i a15, a2, 0x100 + +402108a8 : +402108a8: b0c112 addi a1, a1, -80 +402108ab: 041c movi.n a4, 16 +402108ad: 013d mov.n a3, a1 +402108af: f1f9 s32i.n a15, a1, 60 +402108b1: 136102 s32i a0, a1, 76 +402108b4: 1261c2 s32i a12, a1, 72 +402108b7: 1161d2 s32i a13, a1, 68 +402108ba: 1061e2 s32i a14, a1, 64 +402108bd: 02fd mov.n a15, a2 +402108bf: ff4001 l32r a0, 402105c0 +402108c2: 0000c0 callx0 a0 +402108c5: 1c7256 bnez a2, 40210a90 +402108c8: 000132 l8ui a3, a1, 0 +402108cb: e9a022 movi a2, 233 +402108ce: 0101e2 l8ui a14, a1, 1 +402108d1: 0b1327 beq a3, a2, 402108e0 +402108d4: fff221 l32r a2, 4021089c +402108d7: c5dd01 l32r a0, 4020204c +402108da: 0000c0 callx0 a0 +402108dd: 006bc6 j 40210a90 +402108e0: 31c8 l32i.n a12, a1, 12 +402108e2: 041c movi.n a4, 16 +402108e4: 013d mov.n a3, a1 +402108e6: 2f4a add.n a2, a15, a4 +402108e8: 81c9 s32i.n a12, a1, 32 +402108ea: ff3501 l32r a0, 402105c0 +402108ed: 0000c0 callx0 a0 +402108f0: 19c256 bnez a2, 40210a90 +402108f3: 20cff2 addi a15, a15, 32 +402108f6: 018d mov.n a8, a1 +402108f8: efa0d2 movi a13, 239 +402108fb: 070c movi.n a7, 0 +402108fd: 14fe16 beqz a14, 40210a50 +40210900: 021c movi.n a2, 16 +40210902: c03270 sub a3, a2, a7 +40210905: 743030 extui a3, a3, 0, 8 +40210908: 4c3c37 bltu a12, a3, 40210958 +4021090b: 142030 extui a2, a3, 0, 2 +4021090e: 629c beqz.n a2, 40210928 +40210910: 082d mov.n a2, a8 +40210912: c04280 sub a4, a2, a8 +40210915: 022437 blt a4, a3, 4021091b +40210918: 005f06 j 40210a98 +4021091b: 000242 l8ui a4, a2, 0 +4021091e: 221b addi.n a2, a2, 1 +40210920: 30dd40 xor a13, a13, a4 +40210923: fffac6 j 40210912 +40210926: 300000 xor a0, a0, a0 +40210929: 0c4172 s8i a7, a1, 12 +4021092c: 731604 excw +4021092f: 247716 beqz a7, 40210b7a +40210932: 584602 s8i a0, a6, 88 +40210935: 089200 excw +40210938: 082200 excw +4021093b: 441b01 l32r a0, 401e19a8 <_lit4_end+0xdb67c> +4021093e: 302920 xor a2, a9, a2 +40210941: 305d20 xor a5, a13, a2 +40210944: 020822 l8ui a2, a8, 2 +40210947: 305520 xor a5, a5, a2 +4021094a: 030822 l8ui a2, a8, 3 +4021094d: 884b addi.n a8, a8, 4 +4021094f: 305520 xor a5, a5, a2 +40210952: 74d050 extui a13, a5, 0, 8 +40210955: fff5c6 j 40210930 +40210958: 74c0c0 extui a12, a12, 0, 8 +4021095b: 000186 j 40210965 +4021095e: 10cff2 addi a15, a15, 16 +40210961: 070c movi.n a7, 0 +40210963: 018d mov.n a8, a1 +40210965: 1420c0 extui a2, a12, 0, 2 +40210968: 629c beqz.n a2, 40210982 +4021096a: 082d mov.n a2, a8 +4021096c: c03280 sub a3, a2, a8 +4021096f: 0aa3c7 bge a3, a12, 4021097d +40210972: 000232 l8ui a3, a2, 0 +40210975: 221b addi.n a2, a2, 1 +40210977: 30dd30 xor a13, a13, a3 +4021097a: fffb86 j 4021096c +4021097d: 88ca add.n a8, a8, a12 +4021097f: 000c46 j 402109b4 +40210982: ecac beqz.n a12, 402109b4 +40210984: 4192c0 srli a9, a12, 2 +40210987: 082d mov.n a2, a8 +40210989: 040c movi.n a4, 0 +4021098b: 22a497 bge a4, a9, 402109b1 +4021098e: 0002a2 l8ui a10, a2, 0 +40210991: 010232 l8ui a3, a2, 1 +40210994: 441b addi.n a4, a4, 1 +40210996: 303a30 xor a3, a10, a3 +40210999: 305d30 xor a5, a13, a3 +4021099c: 020232 l8ui a3, a2, 2 +4021099f: 305530 xor a5, a5, a3 +402109a2: 030232 l8ui a3, a2, 3 +402109a5: 224b addi.n a2, a2, 4 +402109a7: 305530 xor a5, a5, a3 +402109aa: 74d050 extui a13, a5, 0, 8 +402109ad: fff686 j 4021098b +402109b0: 898000 excw +402109b3: 1e66a0 excw +402109b6: 220d excw +402109b8: d70f01 l32r a0, 402065f4 +402109bb: c60212 l8ui a1, a2, 198 +402109be: d80033 excw +402109c1: 330681 l32r a8, 401dd5dc <_lit4_end+0xd72b0> +402109c4: 3c7a00 excw +402109c7: 74a030 extui a10, a3, 0, 8 +402109ca: 051c movi.n a5, 16 +402109cc: c0c5a0 sub a12, a5, a10 +402109cf: 74c0c0 extui a12, a12, 0, 8 +402109d2: 2e8cb6 bltui a12, 8, 40210a04 +402109d5: 050822 l8ui a2, a8, 5 +402109d8: 040892 l8ui a9, a8, 4 +402109db: 0608c2 l8ui a12, a8, 6 +402109de: 112280 slli a2, a2, 8 +402109e1: 401500 ssl a5 +402109e4: a1cc00 sll a12, a12 +402109e7: 204290 or a4, a2, a9 +402109ea: 202c40 or a2, a12, a4 +402109ed: 0708c2 l8ui a12, a8, 7 +402109f0: 8158 l32i.n a5, a1, 32 +402109f2: 01cc80 slli a12, a12, 24 +402109f5: 20cc20 or a12, a12, a2 +402109f8: 55ca add.n a5, a5, a12 +402109fa: 7a8b addi.n a7, a10, 8 +402109fc: 8159 s32i.n a5, a1, 32 +402109fe: 747070 extui a7, a7, 0, 8 +40210a01: 001046 j 40210a46 +40210a04: 0c4d mov.n a4, a12 +40210a06: 313a add.n a3, a1, a3 +40210a08: 10c122 addi a2, a1, 16 +40210a0b: c18201 l32r a0, 40201014 <_irom0_text_start+0x4> +40210a0e: 0000c0 callx0 a0 +40210a11: 041c movi.n a4, 16 +40210a13: 013d mov.n a3, a1 +40210a15: 0f2d mov.n a2, a15 +40210a17: feea01 l32r a0, 402105c0 +40210a1a: 0000c0 callx0 a0 +40210a1d: 06f256 bnez a2, 40210a90 +40210a20: 870c movi.n a7, 8 +40210a22: c077c0 sub a7, a7, a12 +40210a25: 747070 extui a7, a7, 0, 8 +40210a28: 10c152 addi a5, a1, 16 +40210a2b: 25ca add.n a2, a5, a12 +40210a2d: 074d mov.n a4, a7 +40210a2f: 013d mov.n a3, a1 +40210a31: a179 s32i.n a7, a1, 40 +40210a33: c17801 l32r a0, 40201014 <_irom0_text_start+0x4> +40210a36: 0000c0 callx0 a0 +40210a39: 8158 l32i.n a5, a1, 32 +40210a3b: 51c8 l32i.n a12, a1, 20 +40210a3d: a178 l32i.n a7, a1, 40 +40210a3f: 55ca add.n a5, a5, a12 +40210a41: 10cff2 addi a15, a15, 16 +40210a44: 8159 s32i.n a5, a1, 32 +40210a46: ee0b addi.n a14, a14, -1 +40210a48: 817a add.n a8, a1, a7 +40210a4a: 74e0e0 extui a14, a14, 0, 8 +40210a4d: ffab06 j 402108fd +40210a50: 001986 j 40210aba +40210a53: f20000 excw +40210a56: cf .byte 0xcf +40210a57: 020c10 excw +40210a5a: 312a add.n a3, a1, a2 +40210a5c: 000332 l8ui a3, a3, 0 +40210a5f: 221b addi.n a2, a2, 1 +40210a61: 30dd30 xor a13, a13, a3 +40210a64: f2b266 bnei a2, 16, 40210a5a +40210a67: 771b addi.n a7, a7, 1 +40210a69: 041c movi.n a4, 16 +40210a6b: 013d mov.n a3, a1 +40210a6d: 0f2d mov.n a2, a15 +40210a6f: 35a787 bge a7, a8, 40210aa8 +40210a72: a179 s32i.n a7, a1, 40 +40210a74: 096182 s32i a8, a1, 36 +40210a77: fed201 l32r a0, 402105c0 +40210a7a: 0000c0 callx0 a0 +40210a7d: a178 l32i.n a7, a1, 40 +40210a7f: 9188 l32i.n a8, a1, 36 +40210a81: fd0216 beqz a2, 40210a55 +40210a84: ff8721 l32r a2, 402108a0 +40210a87: eea332 movi a3, 0x3ee +40210a8a: c57001 l32r a0, 4020204c +40210a8d: 0000c0 callx0 a0 +40210a90: fd7c movi.n a13, -1 +40210a92: 0d2d mov.n a2, a13 +40210a94: 000886 j 40210aba +40210a97: cc3000 excw +40210a9a: 84c0c0 extui a12, a12, 0, 9 +40210a9d: 070c41 l32r a4, 401d26d0 <_lit4_end+0xcc3a4> +40210aa0: 34c0c0 extui a12, a12, 0, 4 +40210aa3: fff086 j 40210a69 +40210aa6: 010000 slli a0, a0, 32 +40210aa9: c0fec6 j 40200ea8 <_lit4_end+0xfab7c> +40210aac: 160000 excw +40210aaf: 32eac2 excw +40210ab2: 2103a4 excw +40210ab5: ff7c movi.n a15, -1 +40210ab7: fff3c6 j 40210a8a +40210aba: 132102 l32i a0, a1, 76 +40210abd: 1221c2 l32i a12, a1, 72 +40210ac0: 1121d2 l32i a13, a1, 68 +40210ac3: 1021e2 l32i a14, a1, 64 +40210ac6: f1f8 l32i.n a15, a1, 60 +40210ac8: 50c112 addi a1, a1, 80 +40210acb: f00d ret.n +40210acd: 000000 ill +40210ad0: 22f264 excw +40210ad3: f25340 excw +40210ad6: 22 .byte 0x22 +40210ad7: 40 .byte 0x40 + +40210ad8 : +40210ad8: f0c112 addi a1, a1, -16 +40210adb: 21c9 s32i.n a12, a1, 8 +40210add: 3109 s32i.n a0, a1, 12 +40210adf: 11d9 s32i.n a13, a1, 4 +40210ae1: ffae05 call0 402105c4 +40210ae4: 742020 extui a2, a2, 0, 8 +40210ae7: fec232 addi a3, a2, -2 +40210aea: 743030 extui a3, a3, 0, 8 +40210aed: 81a0c2 movi a12, 129 +40210af0: 0d33b6 bltui a3, 3, 40210b01 +40210af3: fbc222 addi a2, a2, -5 +40210af6: 742020 extui a2, a2, 0, 8 +40210af9: 01a1c2 movi a12, 0x101 +40210afc: 0122b6 bltui a2, 2, 40210b01 +40210aff: 1c4c movi.n a12, 65 +40210b01: ffb7c5 call0 40210680 +40210b04: 130c movi.n a3, 1 +40210b06: 83c320 moveqz a12, a3, a2 +40210b09: 11cc40 slli a12, a12, 12 +40210b0c: 0c2d mov.n a2, a12 +40210b0e: ffd505 call0 40210860 +40210b11: 20d220 or a13, a2, a2 +40210b14: 1c0226 beqi a2, -1, 40210b34 +40210b17: 802c20 add a2, a12, a2 +40210b1a: 10c222 addi a2, a2, 16 +40210b1d: ffd885 call0 402108a8 +40210b20: 080226 beqi a2, -1, 40210b2c +40210b23: 34cdd2 addi a13, a13, 52 +40210b26: 2d2a add.n a2, a13, a2 +40210b28: 0004c6 j 40210b3f +40210b2b: e92100 excw +40210b2e: ff .byte 0xff +40210b2f: 000106 j 40210b37 +40210b32: 210000 srai a0, a0, 0 +40210b35: ffe8 l32i.n a14, a15, 60 +40210b37: c54501 l32r a0, 4020204c +40210b3a: 0000c0 callx0 a0 +40210b3d: f27c movi.n a2, -1 +40210b3f: 3108 l32i.n a0, a1, 12 +40210b41: 21c8 l32i.n a12, a1, 8 +40210b43: 11d8 l32i.n a13, a1, 4 +40210b45: 10c112 addi a1, a1, 16 +40210b48: f00d ret.n + ... + +40210b4c : +40210b4c: f0c112 addi a1, a1, -16 +40210b4f: 3109 s32i.n a0, a1, 12 +40210b51: fff845 call0 40210ad8 +40210b54: ff1131 l32r a3, 40210798 +40210b57: 0329 s32i.n a2, a3, 0 +40210b59: ff0b31 l32r a3, 40210788 +40210b5c: 090266 bnei a2, -1, 40210b69 +40210b5f: 020c movi.n a2, 0 +40210b61: 004322 s8i a2, a3, 0 +40210b64: 020c movi.n a2, 0 +40210b66: 000186 j 40210b70 +40210b69: 120c movi.n a2, 1 +40210b6b: 004322 s8i a2, a3, 0 +40210b6e: 120c movi.n a2, 1 +40210b70: 3108 l32i.n a0, a1, 12 +40210b72: 10c112 addi a1, a1, 16 +40210b75: f00d ret.n +40210b77: 8cf200 excw +40210b7a: fe .byte 0xfe +40210b7b: 3f .byte 0x3f + +40210b7c : +40210b7c: 743020 extui a3, a2, 0, 8 +40210b7f: 0533b6 bltui a3, 3, 40210b88 +40210b82: 00a022 movi a2, 0 +40210b85: 074366 bnei a3, 4, 40210b90 +40210b88: fffc21 l32r a2, 40210b78 +40210b8b: 004232 s8i a3, a2, 0 +40210b8e: 120c movi.n a2, 1 +40210b90: f00d ret.n + ... + +40210b94 : +40210b94: f0c112 addi a1, a1, -16 +40210b97: 00a022 movi a2, 0 +40210b9a: 036102 s32i a0, a1, 12 +40210b9d: 061505 call0 40216cf0 +40210ba0: 032102 l32i a0, a1, 12 +40210ba3: 10c112 addi a1, a1, 16 +40210ba6: f00d ret.n + +40210ba8 : +40210ba8: f0c112 addi a1, a1, -16 +40210bab: 742020 extui a2, a2, 0, 8 +40210bae: 036102 s32i a0, a1, 12 +40210bb1: 09ae85 call0 4021a69c +40210bb4: 032102 l32i a0, a1, 12 +40210bb7: 10c112 addi a1, a1, 16 +40210bba: 000080 ret +40210bbd: 000000 ill + +40210bc0 : +40210bc0: f0c112 addi a1, a1, -16 +40210bc3: f42020 extui a2, a2, 0, 16 +40210bc6: 036102 s32i a0, a1, 12 +40210bc9: 09b185 call0 4021a6e4 +40210bcc: 032102 l32i a0, a1, 12 +40210bcf: 10c112 addi a1, a1, 16 +40210bd2: 000080 ret +40210bd5: 000000 ill + +40210bd8 : +40210bd8: f0c112 addi a1, a1, -16 +40210bdb: 742020 extui a2, a2, 0, 8 +40210bde: 036102 s32i a0, a1, 12 +40210be1: 092f85 call0 40219edc +40210be4: 032102 l32i a0, a1, 12 +40210be7: 10c112 addi a1, a1, 16 +40210bea: 000080 ret +40210bed: 000000 ill + +40210bf0 : +40210bf0: f0c112 addi a1, a1, -16 +40210bf3: 742020 extui a2, a2, 0, 8 +40210bf6: 036102 s32i a0, a1, 12 +40210bf9: 09c405 call0 4021a83c +40210bfc: 032102 l32i a0, a1, 12 +40210bff: 10c112 addi a1, a1, 16 +40210c02: 000080 ret +40210c05: 000000 ill +40210c08: f00014 excw +40210c0b: 3f .byte 0x3f +40210c0c: 002f04 excw +40210c0f: 40 .byte 0x40 + +40210c10 : +40210c10: f0c112 addi a1, a1, -16 +40210c13: 743020 extui a3, a2, 0, 8 +40210c16: 3109 s32i.n a0, a1, 12 +40210c18: 21c9 s32i.n a12, a1, 8 +40210c1a: 025c movi.n a2, 80 +40210c1c: 209327 bne a3, a2, 40210c40 +40210c1f: fffa31 l32r a3, 40210c08 +40210c22: e27c movi.n a2, -2 +40210c24: 0020c0 memw +40210c27: 0348 l32i.n a4, a3, 0 +40210c29: 102420 and a2, a4, a2 +40210c2c: 0020c0 memw +40210c2f: 0329 s32i.n a2, a3, 0 +40210c31: 025c movi.n a2, 80 +40210c33: fff601 l32r a0, 40210c0c +40210c36: 0000c0 callx0 a0 +40210c39: 120c movi.n a2, 1 +40210c3b: 000946 j 40210c64 +40210c3e: 420000 excw +40210c41: 0ca0a0 excw +40210c44: 934702 s8i a0, a7, 147 +40210c47: 311b addi.n a3, a1, 1 +40210c49: 0cfff0 excw +40210c4c: c01c movi.n a0, 28 +40210c4e: 280020 excw +40210c51: 22c003 excw +40210c54: 20c020 or a12, a0, a2 +40210c57: 032900 excw +40210c5a: 042d mov.n a2, a4 +40210c5c: ffec01 l32r a0, 40210c0c +40210c5f: 0000c0 callx0 a0 +40210c62: 0c2d mov.n a2, a12 +40210c64: 3108 l32i.n a0, a1, 12 +40210c66: 21c8 l32i.n a12, a1, 8 +40210c68: 10c112 addi a1, a1, 16 +40210c6b: f00d ret.n +40210c6d: 000000 ill +40210c70: 2f0c movi.n a15, 2 +40210c72: 00 .byte 00 +40210c73: 40 .byte 0x40 + +40210c74 : +40210c74: f0c112 addi a1, a1, -16 +40210c77: 036102 s32i a0, a1, 12 +40210c7a: fffd01 l32r a0, 40210c70 +40210c7d: 0000c0 callx0 a0 +40210c80: 3108 l32i.n a0, a1, 12 +40210c82: 742020 extui a2, a2, 0, 8 +40210c85: 10c112 addi a1, a1, 16 +40210c88: f00d ret.n +40210c8a: 3c0000 excw +40210c8d: fedc bnez.n a14, 40210cb0 +40210c8f: 3f .byte 0x3f + +40210c90 : +40210c90: f0c112 addi a1, a1, -16 +40210c93: 036102 s32i a0, a1, 12 +40210c96: fff601 l32r a0, 40210c70 +40210c99: 0000c0 callx0 a0 +40210c9c: 744020 extui a4, a2, 0, 8 +40210c9f: 035c movi.n a3, 80 +40210ca1: 020c movi.n a2, 0 +40210ca3: 0f9437 bne a4, a3, 40210cb6 +40210ca6: fff921 l32r a2, 40210c8c +40210ca9: 130c movi.n a3, 1 +40210cab: 004232 s8i a3, a2, 0 +40210cae: a0a022 movi a2, 160 +40210cb1: fff5c5 call0 40210c10 +40210cb4: 120c movi.n a2, 1 +40210cb6: 3108 l32i.n a0, a1, 12 +40210cb8: 10c112 addi a1, a1, 16 +40210cbb: f00d ret.n +40210cbd: 000000 ill + +40210cc0 : +40210cc0: f0c112 addi a1, a1, -16 +40210cc3: 21c9 s32i.n a12, a1, 8 +40210cc5: 3109 s32i.n a0, a1, 12 +40210cc7: ffea01 l32r a0, 40210c70 +40210cca: 0000c0 callx0 a0 +40210ccd: 742020 extui a2, a2, 0, 8 +40210cd0: a0a032 movi a3, 160 +40210cd3: 0c0c movi.n a12, 0 +40210cd5: 199237 bne a2, a3, 40210cf2 +40210cd8: ffed21 l32r a2, 40210c8c +40210cdb: 0002c2 l8ui a12, a2, 0 +40210cde: 0e1c66 bnei a12, 1, 40210cf0 +40210ce1: 030c movi.n a3, 0 +40210ce3: 004232 s8i a3, a2, 0 +40210ce6: 50a022 movi a2, 80 +40210ce9: fff245 call0 40210c10 +40210cec: 000086 j 40210cf2 +40210cef: 0c0c00 excw +40210cf2: 3108 l32i.n a0, a1, 12 +40210cf4: 0c2d mov.n a2, a12 +40210cf6: 21c8 l32i.n a12, a1, 8 +40210cf8: 10c112 addi a1, a1, 16 +40210cfb: f00d ret.n +40210cfd: 000000 ill +40210d00: 0628 l32i.n a2, a6, 0 +40210d02: 00 .byte 00 +40210d03: 60 .byte 0x60 + +40210d04 : +40210d04: cc7321 l32r a2, 40203ed0 +40210d07: 030c movi.n a3, 0 +40210d09: 004232 s8i a3, a2, 0 +40210d0c: fffd21 l32r a2, 40210d00 +40210d0f: 84a032 movi a3, 132 +40210d12: 0020c0 memw +40210d15: 0239 s32i.n a3, a2, 0 +40210d17: f00d ret.n +40210d19: 000000 ill +40210d1c: fecd34 excw +40210d1f: 3f .byte 0x3f + +40210d20 : +40210d20: c59431 l32r a3, 40202370 +40210d23: 0020c0 memw +40210d26: 0348 l32i.n a4, a3, 0 +40210d28: fffd31 l32r a3, 40210d1c +40210d2b: 0338 l32i.n a3, a3, 0 +40210d2d: 343a add.n a3, a4, a3 +40210d2f: c02320 sub a2, a3, a2 +40210d32: f00d ret.n +40210d34: 22f184 excw +40210d37: f18240 excw +40210d3a: f34022 s8i a2, a0, 243 +40210d3d: fe8c beqz.n a14, 40210d50 +40210d3f: 3f .byte 0x3f + +40210d40 : +40210d40: c0c112 addi a1, a1, -64 +40210d43: d1d9 s32i.n a13, a1, 52 +40210d45: c387d1 l32r a13, 40201b64 +40210d48: e1c9 s32i.n a12, a1, 56 +40210d4a: 4d58 l32i.n a5, a13, 16 +40210d4c: f109 s32i.n a0, a1, 60 +40210d4e: 05c8 l32i.n a12, a5, 0 +40210d50: c1e9 s32i.n a14, a1, 48 +40210d52: b1f9 s32i.n a15, a1, 44 +40210d54: 059c16 beqz a12, 40210db1 +40210d57: ce2b51 l32r a5, 40204604 +40210d5a: 0558 l32i.n a5, a5, 0 +40210d5c: 051516 beqz a5, 40210db1 +40210d5f: 0258 l32i.n a5, a2, 0 +40210d61: 1c28 l32i.n a2, a12, 4 +40210d63: 0d9527 bne a5, a2, 40210d74 +40210d66: 0338 l32i.n a3, a3, 0 +40210d68: 2c28 l32i.n a2, a12, 8 +40210d6a: 069327 bne a3, a2, 40210d74 +40210d6d: 0438 l32i.n a3, a4, 0 +40210d6f: 3c28 l32i.n a2, a12, 12 +40210d71: 3c1327 beq a3, a2, 40210db1 +40210d74: fd6ef1 l32r a15, 4021032c +40210d77: bfa542 movi a4, 0x5bf +40210d7a: 0f3d mov.n a3, a15 +40210d7c: c22c movi.n a2, 44 +40210d7e: c4b401 l32r a0, 40202050 +40210d81: 0000c0 callx0 a0 +40210d84: 02ed mov.n a14, a2 +40210d86: 72ac beqz.n a2, 40210db1 +40210d88: 330c movi.n a3, 3 +40210d8a: 0239 s32i.n a3, a2, 0 +40210d8c: 1c28 l32i.n a2, a12, 4 +40210d8e: 0e4d mov.n a4, a14 +40210d90: 1e29 s32i.n a2, a14, 4 +40210d92: 2c28 l32i.n a2, a12, 8 +40210d94: 2e29 s32i.n a2, a14, 8 +40210d96: 3c28 l32i.n a2, a12, 12 +40210d98: 3e29 s32i.n a2, a14, 12 +40210d9a: 521c movi.n a2, 21 +40210d9c: ce2301 l32r a0, 40204628 +40210d9f: 0000c0 callx0 a0 +40210da2: b28c beqz.n a2, 40210db1 +40210da4: c8a542 movi a4, 0x5c8 +40210da7: 0f3d mov.n a3, a15 +40210da9: 0e2d mov.n a2, a14 +40210dab: c1d701 l32r a0, 40201508 +40210dae: 0000c0 callx0 a0 +40210db1: 0f0c22 l8ui a2, a12, 15 +40210db4: 040c32 l8ui a3, a12, 4 +40210db7: 080c72 l8ui a7, a12, 8 +40210dba: 070c62 l8ui a6, a12, 7 +40210dbd: 060c52 l8ui a5, a12, 6 +40210dc0: 050c42 l8ui a4, a12, 5 +40210dc3: 6129 s32i.n a2, a1, 24 +40210dc5: 0e0c22 l8ui a2, a12, 14 +40210dc8: 5129 s32i.n a2, a1, 20 +40210dca: 0d0c22 l8ui a2, a12, 13 +40210dcd: 4129 s32i.n a2, a1, 16 +40210dcf: 0c0c22 l8ui a2, a12, 12 +40210dd2: 3129 s32i.n a2, a1, 12 +40210dd4: 0b0c22 l8ui a2, a12, 11 +40210dd7: 2129 s32i.n a2, a1, 8 +40210dd9: 0a0c22 l8ui a2, a12, 10 +40210ddc: 1129 s32i.n a2, a1, 4 +40210dde: 090c22 l8ui a2, a12, 9 +40210de1: 006122 s32i a2, a1, 0 +40210de4: ffd421 l32r a2, 40210d34 +40210de7: c49901 l32r a0, 4020204c +40210dea: 0000c0 callx0 a0 +40210ded: ffd221 l32r a2, 40210d38 +40210df0: c49701 l32r a0, 4020204c +40210df3: 0000c0 callx0 a0 +40210df6: 4d28 l32i.n a2, a13, 16 +40210df8: 05a032 movi a3, 5 +40210dfb: d24232 s8i a3, a2, 210 +40210dfe: d04232 s8i a3, a2, 208 +40210e01: 852d22 l32i a2, a13, 0x214 +40210e04: 01a132 movi a3, 0x101 +40210e07: f42020 extui a2, a2, 0, 16 +40210e0a: 369237 bne a2, a3, 40210e44 +40210e0d: e19721 l32r a2, 4020946c +40210e10: 02ddd2 addmi a13, a13, 0x200 +40210e13: cc6a01 l32r a0, 40203fbc +40210e16: 0000c0 callx0 a0 +40210e19: ffc821 l32r a2, 40210d3c +40210e1c: 140c movi.n a4, 1 +40210e1e: 000262 l8ui a6, a2, 0 +40210e21: 160d22 l8ui a2, a13, 22 +40210e24: 103640 and a3, a6, a4 +40210e27: 303430 xor a3, a4, a3 +40210e2a: 401200 ssl a2 +40210e2d: a13300 sll a3, a3 +40210e30: 401200 ssl a2 +40210e33: a14400 sll a4, a4 +40210e36: 050c movi.n a5, 0 +40210e38: 401200 ssl a2 +40210e3b: a12600 sll a2, a6 +40210e3e: d1be01 l32r a0, 40205538 +40210e41: 0000c0 callx0 a0 +40210e44: f108 l32i.n a0, a1, 60 +40210e46: e1c8 l32i.n a12, a1, 56 +40210e48: d1d8 l32i.n a13, a1, 52 +40210e4a: c1e8 l32i.n a14, a1, 48 +40210e4c: b1f8 l32i.n a15, a1, 44 +40210e4e: 40c112 addi a1, a1, 64 +40210e51: f00d ret.n +40210e53: 83b200 moveqz a11, a2, a0 +40210e56: fe .byte 0xfe +40210e57: 3f .byte 0x3f +40210e58: fe8000 excw +40210e5b: 3f .byte 0x3f +40210e5c: 22f164 excw +40210e5f: 88dc40 excw +40210e62: fe .byte 0xfe +40210e63: 3f .byte 0x3f +40210e64: fe83c0 excw +40210e67: 3f .byte 0x3f +40210e68: 22f146 j 40219a31 +40210e6b: e87840 excw +40210e6e: fe .byte 0xfe +40210e6f: 3f .byte 0x3f +40210e70: fe88e0 excw +40210e73: 3f .byte 0x3f +40210e74: f128 l32i.n a2, a1, 60 +40210e76: 004022 s8i a2, a0, 0 +40210e79: 3fffc0 excw +40210e7c: e878 l32i.n a7, a8, 56 +40210e7e: fe .byte 0xfe +40210e7f: 3f .byte 0x3f +40210e80: f10a add.n a15, a1, a0 +40210e82: 22 .byte 0x22 +40210e83: 40 .byte 0x40 + +40210e84 : +40210e84: fff441 l32r a4, 40210e54 +40210e87: fff431 l32r a3, 40210e58 +40210e8a: fff421 l32r a2, 40210e5c +40210e8d: f0c112 addi a1, a1, -16 +40210e90: c05430 sub a5, a4, a3 +40210e93: 036102 s32i a0, a1, 12 +40210e96: c46d01 l32r a0, 4020204c +40210e99: 0000c0 callx0 a0 +40210e9c: fff141 l32r a4, 40210e60 +40210e9f: fff131 l32r a3, 40210e64 +40210ea2: fff121 l32r a2, 40210e68 +40210ea5: c05430 sub a5, a4, a3 +40210ea8: c46901 l32r a0, 4020204c +40210eab: 0000c0 callx0 a0 +40210eae: ffef41 l32r a4, 40210e6c +40210eb1: ffef31 l32r a3, 40210e70 +40210eb4: fff021 l32r a2, 40210e74 +40210eb7: c05430 sub a5, a4, a3 +40210eba: c46401 l32r a0, 4020204c +40210ebd: 0000c0 callx0 a0 +40210ec0: ffee41 l32r a4, 40210e78 +40210ec3: ffee31 l32r a3, 40210e7c +40210ec6: ffee21 l32r a2, 40210e80 +40210ec9: c05430 sub a5, a4, a3 +40210ecc: c46001 l32r a0, 4020204c +40210ecf: 0000c0 callx0 a0 +40210ed2: 3108 l32i.n a0, a1, 12 +40210ed4: 10c112 addi a1, a1, 16 +40210ed7: f00d ret.n +40210ed9: 000000 ill + +40210edc : +40210edc: c32231 l32r a3, 40201b64 +40210edf: 06d332 addmi a3, a3, 0x600 +40210ee2: 9e0322 l8ui a2, a3, 158 +40210ee5: 1b6207 bbci a2, 0, 40210f04 +40210ee8: fce121 l32r a2, 4021026c +40210eeb: 0020c0 memw +40210eee: 0238 l32i.n a3, a2, 0 +40210ef0: fce221 l32r a2, 40210278 +40210ef3: f43030 extui a3, a3, 0, 16 +40210ef6: 0020c0 memw +40210ef9: 0228 l32i.n a2, a2, 0 +40210efb: 113380 slli a3, a3, 8 +40210efe: 752820 extui a2, a2, 24, 8 +40210f01: 000446 j 40210f16 +40210f04: a10322 l8ui a2, a3, 161 +40210f07: 114200 slli a4, a2, 16 +40210f0a: a20322 l8ui a2, a3, 162 +40210f0d: a30332 l8ui a3, a3, 163 +40210f10: 112280 slli a2, a2, 8 +40210f13: 202420 or a2, a4, a2 +40210f16: 202230 or a2, a2, a3 +40210f19: f00d ret.n + ... + +40210f1c : +40210f1c: f0c112 addi a1, a1, -16 +40210f1f: 3109 s32i.n a0, a1, 12 +40210f21: 0ddc45 call0 4021ece8 +40210f24: 3108 l32i.n a0, a1, 12 +40210f26: 10c112 addi a1, a1, 16 +40210f29: f00d ret.n +40210f2b: 071c00 excw +40210f2e: 00 .byte 00 +40210f2f: 60 .byte 0x60 + +40210f30 : +40210f30: ffff21 l32r a2, 40210f2c +40210f33: 0020c0 memw +40210f36: 0228 l32i.n a2, a2, 0 +40210f38: f00d ret.n +40210f3a: 180000 excw +40210f3d: 000000 ill +40210f40: 000000 ill +40210f43: 003c00 excw +40210f46: 800000 add a0, a0, a0 +40210f49: bf .byte 0xbf +40210f4a: f186b1 l32r a11, 4020d564 +40210f4d: ff .byte 0xff +40210f4e: ff .byte 0xff +40210f4f: ff .byte 0xff +40210f50: 000650 excw +40210f53: 40 .byte 0x40 + +40210f54 : +40210f54: d0c112 addi a1, a1, -48 +40210f57: a1c9 s32i.n a12, a1, 40 +40210f59: 91d9 s32i.n a13, a1, 36 +40210f5b: 81e9 s32i.n a14, a1, 32 +40210f5d: 71f9 s32i.n a15, a1, 28 +40210f5f: 05dd mov.n a13, a5 +40210f61: b109 s32i.n a0, a1, 44 +40210f63: 0169 s32i.n a6, a1, 0 +40210f65: fec352 addi a5, a3, -2 +40210f68: 02cd mov.n a12, a2 +40210f6a: 04fd mov.n a15, a4 +40210f6c: 07ed mov.n a14, a7 +40210f6e: 0315e6 bgei a5, 1, 40210f75 +40210f71: 53ab addi.n a5, a3, 10 +40210f73: c20b addi.n a12, a2, -1 +40210f75: 4142c0 srli a4, a12, 2 +40210f78: 90a132 movi a3, 0x190 +40210f7b: 0c2d mov.n a2, a12 +40210f7d: 026142 s32i a4, a1, 8 +40210f80: 1159 s32i.n a5, a1, 4 +40210f82: c3d201 l32r a0, 40201ecc +40210f85: 0000c0 callx0 a0 +40210f88: 2148 l32i.n a4, a1, 8 +40210f8a: 1158 l32i.n a5, a1, 4 +40210f8c: 242a add.n a2, a4, a2 +40210f8e: f2fa add.n a15, a2, a15 +40210f90: 902550 addx2 a2, a5, a5 +40210f93: f02250 subx8 a2, a2, a5 +40210f96: 1122c0 slli a2, a2, 4 +40210f99: c30c movi.n a3, 12 +40210f9b: c02250 sub a2, a2, a5 +40210f9e: c3cb01 l32r a0, 40201ecc +40210fa1: 0000c0 callx0 a0 +40210fa4: ff2a add.n a15, a15, a2 +40210fa6: 64a032 movi a3, 100 +40210fa9: 0c2d mov.n a2, a12 +40210fab: c3c801 l32r a0, 40201ecc +40210fae: 0000c0 callx0 a0 +40210fb1: b03cc0 addx8 a3, a12, a12 +40210fb4: b033c0 addx8 a3, a3, a12 +40210fb7: a03330 addx4 a3, a3, a3 +40210fba: c04f20 sub a4, a15, a2 +40210fbd: 243a add.n a2, a4, a3 +40210fbf: 01a032 movi a3, 1 +40210fc2: 023247 bltu a2, a4, 40210fc8 +40210fc5: 00a032 movi a3, 0 +40210fc8: ffdd41 l32r a4, 40210f3c +40210fcb: ffdd51 l32r a5, 40210f40 +40210fce: ffe001 l32r a0, 40210f50 +40210fd1: 0000c0 callx0 a0 +40210fd4: d2da add.n a13, a2, a13 +40210fd6: 160c movi.n a6, 1 +40210fd8: 013d27 bltu a13, a2, 40210fdd +40210fdb: 060c movi.n a6, 0 +40210fdd: ffd941 l32r a4, 40210f44 +40210fe0: ffd851 l32r a5, 40210f40 +40210fe3: 363a add.n a3, a6, a3 +40210fe5: 0d2d mov.n a2, a13 +40210fe7: ffda01 l32r a0, 40210f50 +40210fea: 0000c0 callx0 a0 +40210fed: 0148 l32i.n a4, a1, 0 +40210fef: 160c movi.n a6, 1 +40210ff1: c24a add.n a12, a2, a4 +40210ff3: 013c27 bltu a12, a2, 40210ff8 +40210ff6: 060c movi.n a6, 0 +40210ff8: ffd341 l32r a4, 40210f44 +40210ffb: ffd151 l32r a5, 40210f40 +40210ffe: 363a add.n a3, a6, a3 +40211000: 0c2d mov.n a2, a12 +40211002: ffd301 l32r a0, 40210f50 +40211005: 0000c0 callx0 a0 +40211008: 026d mov.n a6, a2 +4021100a: ffcf21 l32r a2, 40210f48 +4021100d: 140c movi.n a4, 1 +4021100f: 5e2a add.n a5, a14, a2 +40211011: 0135e7 bltu a5, a14, 40211016 +40211014: 040c movi.n a4, 0 +40211016: 265a add.n a2, a6, a5 +40211018: f1c442 addi a4, a4, -15 +4021101b: 150c movi.n a5, 1 +4021101d: 013267 bltu a2, a6, 40211022 +40211020: 050c movi.n a5, 0 +40211022: b108 l32i.n a0, a1, 44 +40211024: 334a add.n a3, a3, a4 +40211026: 353a add.n a3, a5, a3 +40211028: a1c8 l32i.n a12, a1, 40 +4021102a: 91d8 l32i.n a13, a1, 36 +4021102c: 81e8 l32i.n a14, a1, 32 +4021102e: 71f8 l32i.n a15, a1, 28 +40211030: 30c112 addi a1, a1, 48 +40211033: f00d ret.n +40211035: 000000 ill +40211038: fedc40 excw +4021103b: 3f .byte 0x3f + +4021103c : +4021103c: ffff31 l32r a3, 40211038 +4021103f: 0329 s32i.n a2, a3, 0 +40211041: f00d ret.n +40211043: dc4400 excw +40211046: fe .byte 0xfe +40211047: 3f .byte 0x3f + +40211048 : +40211048: ffff21 l32r a2, 40211044 +4021104b: f00d ret.n +4021104d: 000000 ill + +40211050 : +40211050: 144020 extui a4, a2, 0, 2 +40211053: 343a add.n a3, a4, a3 +40211055: c57c movi.n a5, -4 +40211057: 414230 srli a4, a3, 2 +4021105a: 102250 and a2, a2, a5 +4021105d: a02420 addx4 a2, a4, a2 +40211060: 0228 l32i.n a2, a2, 0 +40211062: f0c112 addi a1, a1, -16 +40211065: 143030 extui a3, a3, 0, 2 +40211068: 0129 s32i.n a2, a1, 0 +4021106a: 313a add.n a3, a1, a3 +4021106c: 000322 l8ui a2, a3, 0 +4021106f: 10c112 addi a1, a1, 16 +40211072: f00d ret.n + +40211074 : +40211074: 902320 addx2 a2, a3, a2 +40211077: f0c112 addi a1, a1, -16 +4021107a: 142020 extui a2, a2, 0, 2 +4021107d: 902210 addx2 a2, a2, a1 +40211080: 001222 l16ui a2, a2, 0 +40211083: 10c112 addi a1, a1, 16 +40211086: f00d ret.n + +40211088 : +40211088: b0c112 addi a1, a1, -80 +4021108b: c67c movi.n a6, -4 +4021108d: 523b addi.n a5, a2, 3 +4021108f: 105560 and a5, a5, a6 +40211092: 1061e2 s32i a14, a1, 64 +40211095: 03ed mov.n a14, a3 +40211097: 103260 and a3, a2, a6 +4021109a: c07230 sub a7, a2, a3 +4021109d: 744040 extui a4, a4, 0, 8 +402110a0: 1261c2 s32i a12, a1, 72 +402110a3: 1161d2 s32i a13, a1, 68 +402110a6: f1f9 s32i.n a15, a1, 60 +402110a8: 0c0c movi.n a12, 0 +402110aa: c0f520 sub a15, a5, a2 +402110ad: 02dd mov.n a13, a2 +402110af: 052d mov.n a2, a5 +402110b1: 6179 s32i.n a7, a1, 24 +402110b3: 7139 s32i.n a3, a1, 28 +402110b5: 8149 s32i.n a4, a1, 32 +402110b7: a159 s32i.n a5, a1, 40 +402110b9: 9169 s32i.n a6, a1, 36 +402110bb: 136102 s32i a0, a1, 76 +402110be: 01c9 s32i.n a12, a1, 0 +402110c0: ccbc01 l32r a0, 402043b0 +402110c3: 0000c0 callx0 a0 +402110c6: 22fa add.n a2, a2, a15 +402110c8: f42020 extui a2, a2, 0, 16 +402110cb: 4129 s32i.n a2, a1, 16 +402110cd: 8148 l32i.n a4, a1, 32 +402110cf: 4178 l32i.n a7, a1, 16 +402110d1: 9168 l32i.n a6, a1, 36 +402110d3: 0c2d mov.n a2, a12 +402110d5: 7138 l32i.n a3, a1, 28 +402110d7: a158 l32i.n a5, a1, 40 +402110d9: 63b747 bgeu a7, a4, 40211140 +402110dc: 257a add.n a2, a5, a7 +402110de: 10c260 and a12, a2, a6 +402110e1: c022c0 sub a2, a2, a12 +402110e4: 5129 s32i.n a2, a1, 20 +402110e6: 1420d0 extui a2, a13, 0, 2 +402110e9: b29c beqz.n a2, 40211108 +402110eb: 440c movi.n a4, 4 +402110ed: 202110 or a2, a1, a1 +402110f0: bfc901 l32r a0, 40201014 <_irom0_text_start+0x4> +402110f3: 0000c0 callx0 a0 +402110f6: 6178 l32i.n a7, a1, 24 +402110f8: 0f4d mov.n a4, a15 +402110fa: 803170 add a3, a1, a7 +402110fd: 202ee0 or a2, a14, a14 +40211100: bfc501 l32r a0, 40201014 <_irom0_text_start+0x4> +40211103: 0000c0 callx0 a0 +40211106: a158 l32i.n a5, a1, 40 +40211108: c04c50 sub a4, a12, a5 +4021110b: 053d mov.n a3, a5 +4021110d: 2efa add.n a2, a14, a15 +4021110f: bfc101 l32r a0, 40201014 <_irom0_text_start+0x4> +40211112: 0000c0 callx0 a0 +40211115: 5178 l32i.n a7, a1, 20 +40211117: a79c beqz.n a7, 40211135 +40211119: 440c movi.n a4, 4 +4021111b: 0c3d mov.n a3, a12 +4021111d: 012d mov.n a2, a1 +4021111f: bfbd01 l32r a0, 40201014 <_irom0_text_start+0x4> +40211122: 0000c0 callx0 a0 +40211125: c02cd0 sub a2, a12, a13 +40211128: 5148 l32i.n a4, a1, 20 +4021112a: 013d mov.n a3, a1 +4021112c: 802e20 add a2, a14, a2 +4021112f: bfb901 l32r a0, 40201014 <_irom0_text_start+0x4> +40211132: 0000c0 callx0 a0 +40211135: 4178 l32i.n a7, a1, 16 +40211137: 020c movi.n a2, 0 +40211139: ee7a add.n a14, a14, a7 +4021113b: 004e22 s8i a2, a14, 0 +4021113e: 120c movi.n a2, 1 +40211140: 132102 l32i a0, a1, 76 +40211143: 1221c2 l32i a12, a1, 72 +40211146: 1121d2 l32i a13, a1, 68 +40211149: 1021e2 l32i a14, a1, 64 +4021114c: f1f8 l32i.n a15, a1, 60 +4021114e: 50c112 addi a1, a1, 80 +40211151: f00d ret.n +40211153: 804500 add a4, a5, a0 +40211156: fe .byte 0xfe +40211157: 3f .byte 0x3f + +40211158 : +40211158: ffff21 l32r a2, 40211154 +4021115b: 000222 l8ui a2, a2, 0 +4021115e: f00d ret.n +40211160: 0011e0 excw +40211163: 60 .byte 0x60 + +40211164 : +40211164: ffff31 l32r a3, 40211160 +40211167: 742020 extui a2, a2, 0, 8 +4021116a: 0020c0 memw +4021116d: 0329 s32i.n a2, a3, 0 +4021116f: 120c movi.n a2, 1 +40211171: f00d ret.n + ... + +40211174 : +40211174: fa1821 l32r a2, 4020f9d4 +40211177: 000222 l8ui a2, a2, 0 +4021117a: f00d ret.n + +4021117c : +4021117c: f43030 extui a3, a3, 0, 16 +4021117f: 323a add.n a3, a2, a3 +40211181: efa042 movi a4, 239 +40211184: 0a1237 beq a2, a3, 40211192 +40211187: 000252 l8ui a5, a2, 0 +4021118a: 221b addi.n a2, a2, 1 +4021118c: 304450 xor a4, a4, a5 +4021118f: fffc46 j 40211184 +40211192: 042d mov.n a2, a4 +40211194: f00d ret.n +40211196: 190000 excw +40211199: 0008 l32i.n a0, a0, 0 +4021119b: f0f500 subx8 a15, a5, a0 +4021119e: f14022 s8i a2, a0, 241 +402111a1: 4022f0 excw +402111a4: f0ed excw +402111a6: df4022 s8i a2, a0, 223 +402111a9: 4022f0 excw +402111ac: 000834 excw +402111af: 27c800 excw +402111b2: 4c4010 excw +402111b5: 1028 l32i.n a2, a0, 4 +402111b7: 40 .byte 0x40 + +402111b8 : +402111b8: d0c112 addi a1, a1, -48 +402111bb: 91d9 s32i.n a13, a1, 36 +402111bd: 71f9 s32i.n a15, a1, 28 +402111bf: 0149 s32i.n a4, a1, 0 +402111c1: f4f050 extui a15, a5, 0, 16 +402111c4: 03dd mov.n a13, a3 +402111c6: fff441 l32r a4, 40211198 +402111c9: fc5831 l32r a3, 4021032c +402111cc: 81e9 s32i.n a14, a1, 32 +402111ce: 02ed mov.n a14, a2 +402111d0: 0f2d mov.n a2, a15 +402111d2: a1c9 s32i.n a12, a1, 40 +402111d4: b109 s32i.n a0, a1, 44 +402111d6: c39e01 l32r a0, 40202050 +402111d9: 0000c0 callx0 a0 +402111dc: 02cd mov.n a12, a2 +402111de: 06c216 beqz a2, 4021124e +402111e1: 82ded0 mull a13, a14, a13 +402111e4: 0e2d mov.n a2, a14 +402111e6: fff201 l32r a0, 402111b0 +402111e9: 0000c0 callx0 a0 +402111ec: 528c beqz.n a2, 402111f5 +402111ee: ffeb21 l32r a2, 4021119c +402111f1: 000446 j 40211206 +402111f4: 013800 slli a3, a8, 32 +402111f7: 0f4d mov.n a4, a15 +402111f9: 0d2d mov.n a2, a13 +402111fb: ffee01 l32r a0, 402111b4 +402111fe: 0000c0 callx0 a0 +40211201: b28c beqz.n a2, 40211210 +40211203: ffe721 l32r a2, 402111a0 +40211206: c39101 l32r a0, 4020204c +40211209: 0000c0 callx0 a0 +4021120c: 000886 j 40211232 +4021120f: 0f4d00 excw +40211212: 0c3d mov.n a3, a12 +40211214: 0d2d mov.n a2, a13 +40211216: fcea01 l32r a0, 402105c0 +40211219: 0000c0 callx0 a0 +4021121c: 428c beqz.n a2, 40211224 +4021121e: ffe121 l32r a2, 402111a4 +40211221: fff846 j 40211206 +40211224: 0138 l32i.n a3, a1, 0 +40211226: 0f4d mov.n a4, a15 +40211228: 0c2d mov.n a2, a12 +4021122a: c27c01 l32r a0, 40201c1c +4021122d: 0000c0 callx0 a0 +40211230: c28c beqz.n a2, 40211240 +40211232: ffdd21 l32r a2, 402111a8 +40211235: 0e3d mov.n a3, a14 +40211237: c38501 l32r a0, 4020204c +4021123a: 0000c0 callx0 a0 +4021123d: ffe8c6 j 402111e4 +40211240: ffdb41 l32r a4, 402111ac +40211243: fc3a31 l32r a3, 4021032c +40211246: 0c2d mov.n a2, a12 +40211248: c0b001 l32r a0, 40201508 +4021124b: 0000c0 callx0 a0 +4021124e: b108 l32i.n a0, a1, 44 +40211250: a1c8 l32i.n a12, a1, 40 +40211252: 91d8 l32i.n a13, a1, 36 +40211254: 81e8 l32i.n a14, a1, 32 +40211256: 71f8 l32i.n a15, a1, 28 +40211258: 30c112 addi a1, a1, 48 +4021125b: f00d ret.n +4021125d: 000000 ill +40211260: 084a add.n a0, a8, a4 +40211262: 520000 excw +40211265: 0008 l32i.n a0, a0, 0 +40211267: 085500 excw +4021126a: aa0000 excw +4021126d: 55aa55 excw +40211270: 55aa55 excw +40211273: aa .byte 0xaa + +40211274 : +40211274: b0c112 addi a1, a1, -80 +40211277: f42020 extui a2, a2, 0, 16 +4021127a: 1161d2 s32i a13, a1, 68 +4021127d: f1f9 s32i.n a15, a1, 60 +4021127f: 136102 s32i a0, a1, 76 +40211282: 1261c2 s32i a12, a1, 72 +40211285: 1061e2 s32i a14, a1, 64 +40211288: 8129 s32i.n a2, a1, 32 +4021128a: 03fd mov.n a15, a3 +4021128c: f4d040 extui a13, a4, 0, 16 +4021128f: 33cc bnez.n a3, 40211296 +40211291: 020c movi.n a2, 0 +40211293: 003dc6 j 4021138e +40211296: fd43c1 l32r a12, 402107a4 +40211299: 0c28 l32i.n a2, a12, 0 +4021129b: 3228 l32i.n a2, a2, 12 +4021129d: f032d7 bltu a2, a13, 40211291 +402112a0: 8168 l32i.n a6, a1, 32 +402112a2: 042c movi.n a4, 32 +402112a4: 662b addi.n a6, a6, 2 +402112a6: 822260 mull a2, a2, a6 +402112a9: 013d mov.n a3, a1 +402112ab: 096162 s32i a6, a1, 36 +402112ae: fcc401 l32r a0, 402105c0 +402112b1: 0000c0 callx0 a0 +402112b4: 000122 l8ui a2, a1, 0 +402112b7: 32cc bnez.n a2, 402112be +402112b9: 120c movi.n a2, 1 +402112bb: 000046 j 402112c0 +402112be: 020c movi.n a2, 0 +402112c0: fc1be1 l32r a14, 4021032c +402112c3: ffe741 l32r a4, 40211260 +402112c6: 004122 s8i a2, a1, 0 +402112c9: 050c movi.n a5, 0 +402112cb: 0e3d mov.n a3, a14 +402112cd: 202dd0 or a2, a13, a13 +402112d0: c08d01 l32r a0, 40201504 +402112d3: 0000c0 callx0 a0 +402112d6: 025d mov.n a5, a2 +402112d8: fb5216 beqz a2, 40211291 +402112db: 000132 l8ui a3, a1, 0 +402112de: 140c movi.n a4, 1 +402112e0: 020c movi.n a2, 0 +402112e2: 832430 moveqz a2, a4, a3 +402112e5: 8168 l32i.n a6, a1, 32 +402112e7: 0c38 l32i.n a3, a12, 0 +402112e9: 226a add.n a2, a2, a6 +402112eb: 3368 l32i.n a6, a3, 12 +402112ed: 0d4d mov.n a4, a13 +402112ef: 822260 mull a2, a2, a6 +402112f2: 053d mov.n a3, a5 +402112f4: a159 s32i.n a5, a1, 40 +402112f6: fcb201 l32r a0, 402105c0 +402112f9: 0000c0 callx0 a0 +402112fc: a158 l32i.n a5, a1, 40 +402112fe: 0d4d mov.n a4, a13 +40211300: 052d mov.n a2, a5 +40211302: 0f3d mov.n a3, a15 +40211304: c24601 l32r a0, 40201c1c +40211307: 0000c0 callx0 a0 +4021130a: a158 l32i.n a5, a1, 40 +4021130c: 12dc bnez.n a2, 40211321 +4021130e: ffd541 l32r a4, 40211264 +40211311: 0e3d mov.n a3, a14 +40211313: 202550 or a2, a5, a5 +40211316: c07c01 l32r a0, 40201508 +40211319: 0000c0 callx0 a0 +4021131c: 001b06 j 4021138c +4021131f: 410000 srli a0, a0, 0 +40211322: 2dffd1 l32r a13, 401dcb20 <_lit4_end+0xd67f4> +40211325: 0e3d05 call0 4021f6f8 +40211328: c07801 l32r a0, 40201508 +4021132b: 0000c0 callx0 a0 +4021132e: 0c38 l32i.n a3, a12, 0 +40211330: 000122 l8ui a2, a1, 0 +40211333: 8168 l32i.n a6, a1, 32 +40211335: 3338 l32i.n a3, a3, 12 +40211337: 226a add.n a2, a2, a6 +40211339: 0d5d mov.n a5, a13 +4021133b: 0f4d mov.n a4, a15 +4021133d: ffe785 call0 402111b8 +40211340: 1138 l32i.n a3, a1, 4 +40211342: ffca21 l32r a2, 4021126c +40211345: 119327 bne a3, a2, 4021135a +40211348: 7138 l32i.n a3, a1, 28 +4021134a: ffc921 l32r a2, 40211270 +4021134d: 099327 bne a3, a2, 4021135a +40211350: 2128 l32i.n a2, a1, 8 +40211352: 221b addi.n a2, a2, 1 +40211354: 000106 j 4021135c +40211357: 000000 ill +4021135a: 120c movi.n a2, 1 +4021135c: 2129 s32i.n a2, a1, 8 +4021135e: ffc321 l32r a2, 4021126c +40211361: 0001d2 l8ui a13, a1, 0 +40211364: 1129 s32i.n a2, a1, 4 +40211366: ffc221 l32r a2, 40211270 +40211369: 0e2c movi.n a14, 32 +4021136b: 7129 s32i.n a2, a1, 28 +4021136d: a02d10 addx4 a2, a13, a1 +40211370: 32e9 s32i.n a14, a2, 12 +40211372: 0e3d mov.n a3, a14 +40211374: 0f2d mov.n a2, a15 +40211376: ffe045 call0 4021117c +40211379: a0dd10 addx4 a13, a13, a1 +4021137c: 5d29 s32i.n a2, a13, 20 +4021137e: 0c28 l32i.n a2, a12, 0 +40211380: 0e5d mov.n a5, a14 +40211382: 3238 l32i.n a3, a2, 12 +40211384: 9128 l32i.n a2, a1, 36 +40211386: 204110 or a4, a1, a1 +40211389: ffe2c5 call0 402111b8 +4021138c: 120c movi.n a2, 1 +4021138e: 132102 l32i a0, a1, 76 +40211391: 1221c2 l32i a12, a1, 72 +40211394: 1121d2 l32i a13, a1, 68 +40211397: 1021e2 l32i a14, a1, 64 +4021139a: f1f8 l32i.n a15, a1, 60 +4021139c: 50c112 addi a1, a1, 80 +4021139f: f00d ret.n +402113a1: 000000 ill +402113a4: fe8040 excw +402113a7: 3f .byte 0x3f +402113a8: c0c112 addi a1, a1, -64 +402113ab: e1c9 s32i.n a12, a1, 56 +402113ad: d1d9 s32i.n a13, a1, 52 +402113af: c1e9 s32i.n a14, a1, 48 +402113b1: f109 s32i.n a0, a1, 60 +402113b3: b1f9 s32i.n a15, a1, 44 +402113b5: 02ed mov.n a14, a2 +402113b7: 01d222 addmi a2, a2, 0x100 +402113ba: 3d4242 s8i a4, a2, 61 +402113bd: 032d mov.n a2, a3 +402113bf: 04dd mov.n a13, a4 +402113c1: 03cd mov.n a12, a3 +402113c3: 036152 s32i a5, a1, 12 +402113c6: cbfa01 l32r a0, 402043b0 +402113c9: 0000c0 callx0 a0 +402113cc: 113de0 slli a3, a13, 2 +402113cf: 1139 s32i.n a3, a1, 4 +402113d1: 33da add.n a3, a3, a13 +402113d3: a03330 addx4 a3, a3, a3 +402113d6: 40a142 movi a4, 0x140 +402113d9: a033e0 addx4 a3, a3, a14 +402113dc: 334a add.n a3, a3, a4 +402113de: 042c movi.n a4, 32 +402113e0: 01b427 bgeu a4, a2, 402113e5 +402113e3: 042d mov.n a2, a4 +402113e5: 1148 l32i.n a4, a1, 4 +402113e7: 0329 s32i.n a2, a3, 0 +402113e9: f4da add.n a15, a4, a13 +402113eb: a0fff0 addx4 a15, a15, a15 +402113ee: 11ffe0 slli a15, a15, 2 +402113f1: 40a122 movi a2, 0x140 +402113f4: 2f2a add.n a2, a15, a2 +402113f6: 2e2a add.n a2, a14, a2 +402113f8: 042c movi.n a4, 32 +402113fa: 0c3d mov.n a3, a12 +402113fc: 224b addi.n a2, a2, 4 +402113fe: bf0501 l32r a0, 40201014 <_irom0_text_start+0x4> +40211401: 0000c0 callx0 a0 +40211404: 20cc22 addi a2, a12, 32 +40211407: 0129 s32i.n a2, a1, 0 +40211409: 60a122 movi a2, 0x160 +4021140c: 2f2a add.n a2, a15, a2 +4021140e: 0138 l32i.n a3, a1, 0 +40211410: 2e2a add.n a2, a14, a2 +40211412: 044c movi.n a4, 64 +40211414: 04c222 addi a2, a2, 4 +40211417: beff01 l32r a0, 40201014 <_irom0_text_start+0x4> +4021141a: 0000c0 callx0 a0 +4021141d: 10cef2 addi a15, a14, 16 +40211420: 0c3d mov.n a3, a12 +40211422: 042c movi.n a4, 32 +40211424: 0f2d mov.n a2, a15 +40211426: c1fd01 l32r a0, 40201c1c +40211429: 0000c0 callx0 a0 +4021142c: 37ce32 addi a3, a14, 55 +4021142f: 2139 s32i.n a3, a1, 8 +40211431: 1fcd52 addi a5, a13, 31 +40211434: 52fc bnez.n a2, 4021146d +40211436: 0138 l32i.n a3, a1, 0 +40211438: 2128 l32i.n a2, a1, 8 +4021143a: 044c movi.n a4, 64 +4021143c: 4159 s32i.n a5, a1, 16 +4021143e: c1f701 l32r a0, 40201c1c +40211441: 0000c0 callx0 a0 +40211444: 4158 l32i.n a5, a1, 16 +40211446: 32ec bnez.n a2, 4021146d +40211448: 1125b0 slli a2, a5, 5 +4021144b: 2e2a add.n a2, a14, a2 +4021144d: 040232 l8ui a3, a2, 4 +40211450: ffa022 movi a2, 255 +40211453: 291327 beq a3, a2, 40211480 +40211456: 1135b0 slli a3, a5, 5 +40211459: 3e3a add.n a3, a14, a3 +4021145b: 042c movi.n a4, 32 +4021145d: 334b addi.n a3, a3, 4 +4021145f: 78ce22 addi a2, a14, 120 +40211462: beec01 l32r a0, 40201014 <_irom0_text_start+0x4> +40211465: 0000c0 callx0 a0 +40211468: 020c movi.n a2, 0 +4021146a: 000506 j 40211482 +4021146d: 1125b0 slli a2, a5, 5 +40211470: 2e2a add.n a2, a14, a2 +40211472: 042c movi.n a4, 32 +40211474: ffa032 movi a3, 255 +40211477: 04c222 addi a2, a2, 4 +4021147a: bee501 l32r a0, 40201010 <_irom0_text_start> +4021147d: 0000c0 callx0 a0 +40211480: 120c movi.n a2, 1 +40211482: 1148 l32i.n a4, a1, 4 +40211484: 364e22 s8i a2, a14, 54 +40211487: 24da add.n a2, a4, a13 +40211489: a02220 addx4 a2, a2, a2 +4021148c: a022e0 addx4 a2, a2, a14 +4021148f: 502222 l32i a2, a2, 0x140 +40211492: 042c movi.n a4, 32 +40211494: 3e29 s32i.n a2, a14, 12 +40211496: 0c3d mov.n a3, a12 +40211498: 202ff0 or a2, a15, a15 +4021149b: bede01 l32r a0, 40201014 <_irom0_text_start+0x4> +4021149e: 0000c0 callx0 a0 +402114a1: 0138 l32i.n a3, a1, 0 +402114a3: 2128 l32i.n a2, a1, 8 +402114a5: 044c movi.n a4, 64 +402114a7: bedb01 l32r a0, 40201014 <_irom0_text_start+0x4> +402114aa: 0000c0 callx0 a0 +402114ad: cc5d41 l32r a4, 40204624 +402114b0: df2b21 l32r a2, 4020915c +402114b3: 030c movi.n a3, 0 +402114b5: 774e32 s8i a3, a14, 119 +402114b8: 0020c0 memw +402114bb: 0249 s32i.n a4, a2, 0 +402114bd: 610c42 l8ui a4, a12, 97 +402114c0: 112dd0 slli a2, a13, 3 +402114c3: 3e1466 bnei a4, 1, 40211505 +402114c6: c0d2d0 sub a13, a2, a13 +402114c9: 4eda add.n a4, a14, a13 +402114cb: 130c movi.n a3, 1 +402114cd: 48a322 movi a2, 0x348 +402114d0: a94e32 s8i a3, a14, 169 +402114d3: 242a add.n a2, a4, a2 +402114d5: 004232 s8i a3, a2, 0 +402114d8: 62cc22 addi a2, a12, 98 +402114db: 02fd mov.n a15, a2 +402114dd: 023d mov.n a3, a2 +402114df: aaa022 movi a2, 170 +402114e2: 640c movi.n a4, 6 +402114e4: 802e20 add a2, a14, a2 +402114e7: becb01 l32r a0, 40201014 <_irom0_text_start+0x4> +402114ea: 0000c0 callx0 a0 +402114ed: 40a322 movi a2, 0x340 +402114f0: dd2a add.n a13, a13, a2 +402114f2: 2eda add.n a2, a14, a13 +402114f4: 640c movi.n a4, 6 +402114f6: 0f3d mov.n a3, a15 +402114f8: 229b addi.n a2, a2, 9 +402114fa: bec601 l32r a0, 40201014 <_irom0_text_start+0x4> +402114fd: 0000c0 callx0 a0 +40211500: 000486 j 40211516 +40211503: d00000 subx2 a0, a0, a0 +40211506: dac0d2 addi a13, a0, -38 +40211509: de .byte 0xde +4021150a: 48a322 movi a2, 0x348 +4021150d: a94e32 s8i a3, a14, 169 +40211510: 80dd20 add a13, a13, a2 +40211513: 004d32 s8i a3, a13, 0 +40211516: 680c32 l8ui a3, a12, 104 +40211519: 04de22 addmi a2, a14, 0x400 +4021151c: 014380 slli a4, a3, 24 +4021151f: 002496 bltz a4, 40211525 +40211522: 81af32 movi a3, -127 +40211525: 984232 s8i a3, a2, 152 +40211528: 1b2c32 l32i a3, a12, 108 +4021152b: 0243b6 bltui a3, 4, 40211531 +4021152e: 00a032 movi a3, 0 +40211531: 994232 s8i a3, a2, 153 +40211534: 700c32 l8ui a3, a12, 112 +40211537: 150c movi.n a5, 1 +40211539: 430b addi.n a4, a3, -1 +4021153b: 030c movi.n a3, 0 +4021153d: 833540 moveqz a3, a5, a4 +40211540: 9a4232 s8i a3, a2, 154 +40211543: 710c32 l8ui a3, a12, 113 +40211546: a04232 s8i a3, a2, 160 +40211549: 3128 l32i.n a2, a1, 12 +4021154b: 0d9257 bne a2, a5, 4021155c +4021154e: ff9521 l32r a2, 402113a4 +40211551: a4a442 movi a4, 0x4a4 +40211554: 001222 l16ui a2, a2, 0 +40211557: 0e3d mov.n a3, a14 +40211559: ffd185 call0 40211274 +4021155c: 600c22 l8ui a2, a12, 96 +4021155f: f108 l32i.n a0, a1, 60 +40211561: 984e22 s8i a2, a14, 152 +40211564: e1c8 l32i.n a12, a1, 56 +40211566: d1d8 l32i.n a13, a1, 52 +40211568: c1e8 l32i.n a14, a1, 48 +4021156a: b1f8 l32i.n a15, a1, 44 +4021156c: 40c112 addi a1, a1, 64 +4021156f: f00d ret.n +40211571: 000000 ill +40211574: fe8be5 excw +40211577: 3f .byte 0x3f +40211578: d0c112 addi a1, a1, -48 +4021157b: 91d9 s32i.n a13, a1, 36 +4021157d: 81e9 s32i.n a14, a1, 32 +4021157f: 71f9 s32i.n a15, a1, 28 +40211581: b109 s32i.n a0, a1, 44 +40211583: a1c9 s32i.n a12, a1, 40 +40211585: 02ed mov.n a14, a2 +40211587: 01d222 addmi a2, a2, 0x100 +4021158a: 03fd mov.n a15, a3 +4021158c: 3c02c2 l8ui a12, a2, 60 +4021158f: 20c332 addi a3, a3, 32 +40211592: 045d mov.n a5, a4 +40211594: 0129 s32i.n a2, a1, 0 +40211596: 0d0c movi.n a13, 0 +40211598: 1139 s32i.n a3, a1, 4 +4021159a: 023dc7 bltu a13, a12, 402115a0 +4021159d: 003446 j 40211672 +402115a0: 025db6 bltui a13, 5, 402115a6 +402115a3: 0032c6 j 40211672 +402115a6: 118de0 slli a8, a13, 2 +402115a9: 28da add.n a2, a8, a13 +402115ab: 40a132 movi a3, 0x140 +402115ae: a02220 addx4 a2, a2, a2 +402115b1: a02230 addx4 a2, a2, a3 +402115b4: 2e2a add.n a2, a14, a2 +402115b6: 042c movi.n a4, 32 +402115b8: 0f3d mov.n a3, a15 +402115ba: 224b addi.n a2, a2, 4 +402115bc: 3159 s32i.n a5, a1, 12 +402115be: 2189 s32i.n a8, a1, 8 +402115c0: c19701 l32r a0, 40201c1c +402115c3: 0000c0 callx0 a0 +402115c6: 3158 l32i.n a5, a1, 12 +402115c8: 2188 l32i.n a8, a1, 8 +402115ca: 09c256 bnez a2, 4021166a +402115cd: 88da add.n a8, a8, a13 +402115cf: a08880 addx4 a8, a8, a8 +402115d2: 60a122 movi a2, 0x160 +402115d5: a02820 addx4 a2, a8, a2 +402115d8: 2e2a add.n a2, a14, a2 +402115da: 1138 l32i.n a3, a1, 4 +402115dc: 044c movi.n a4, 64 +402115de: 224b addi.n a2, a2, 4 +402115e0: c18f01 l32r a0, 40201c1c +402115e3: 0000c0 callx0 a0 +402115e6: 3158 l32i.n a5, a1, 12 +402115e8: 07e256 bnez a2, 4021166a +402115eb: 610f22 l8ui a2, a15, 97 +402115ee: 0e1226 beqi a2, 1, 40211600 +402115f1: 680f32 l8ui a3, a15, 104 +402115f4: 04de22 addmi a2, a14, 0x400 +402115f7: 013380 slli a3, a3, 24 +402115fa: 02e3d6 bgez a3, 4021162c +402115fd: 000886 j 40211623 +40211600: f03dd0 subx8 a3, a13, a13 +40211603: 40a322 movi a2, 0x340 +40211606: 232a add.n a2, a3, a2 +40211608: 2e2a add.n a2, a14, a2 +4021160a: 640c movi.n a4, 6 +4021160c: 62cf32 addi a3, a15, 98 +4021160f: 229b addi.n a2, a2, 9 +40211611: 3159 s32i.n a5, a1, 12 +40211613: c18201 l32r a0, 40201c1c +40211616: 0000c0 callx0 a0 +40211619: 3158 l32i.n a5, a1, 12 +4021161b: fd2216 beqz a2, 402115f1 +4021161e: 001206 j 4021166a +40211621: 420000 excw +40211624: 809802 l16si a0, a8, 0x100 +40211627: 470144 excw +4021162a: 423d93 excw +4021162d: 329902 l16si a0, a9, 100 +40211630: 2f .byte 0x2f +40211631: 371b addi.n a3, a7, 1 +40211633: 423494 excw +40211636: 329a02 l16si a0, a10, 100 +40211639: 0f .byte 0xf +4021163a: 943770 extui a3, a7, 7, 10 +4021163d: 322b addi.n a3, a2, 2 +4021163f: 22a002 movi a0, 34 +40211642: 0f .byte 0xf +40211643: 932771 l32r a7, 401f62e0 <_lit4_end+0xeffb4> +40211646: 2dd022 addmi a2, a0, 0x2d00 +40211649: 3e2af0 excw +4021164c: 48a322 movi a2, 0x348 +4021164f: 232a add.n a2, a3, a2 +40211651: 000222 l8ui a2, a2, 0 +40211654: 051266 bnei a2, 1, 4021165d +40211657: 610f22 l8ui a2, a15, 97 +4021165a: 0c1266 bnei a2, 1, 4021166a +4021165d: 0138 l32i.n a3, a1, 0 +4021165f: 0d4d mov.n a4, a13 +40211661: 3d0322 l8ui a2, a3, 61 +40211664: 2992d7 bne a2, a13, 40211691 +40211667: 001546 j 402116c0 +4021166a: 6d1b addi.n a6, a13, 1 +4021166c: 74d060 extui a13, a6, 0, 8 +4021166f: ffc9c6 j 4021159a +40211672: 44a122 movi a2, 0x144 +40211675: 2e2a add.n a2, a14, a2 +40211677: 00a032 movi a3, 0 +4021167a: ffa062 movi a6, 255 +4021167d: 744030 extui a4, a3, 0, 8 +40211680: 18b4c7 bgeu a4, a12, 4021169c +40211683: 000282 l8ui a8, a2, 0 +40211686: 034d mov.n a4, a3 +40211688: 64c222 addi a2, a2, 100 +4021168b: 01c332 addi a3, a3, 1 +4021168e: eb9867 bne a8, a6, 4021167d +40211691: 0f3d mov.n a3, a15 +40211693: 0e2d mov.n a2, a14 +40211695: ffd105 call0 402113a8 +40211698: 000906 j 402116c0 +4021169b: 94c700 extui a12, a0, 7, 10 +4021169e: b5d120 extui a13, a2, 17, 12 +402116a1: ff .byte 0xff +402116a2: 000d22 l8ui a2, a13, 0 +402116a5: 0492c7 bne a2, a12, 402116ad +402116a8: 020c movi.n a2, 0 +402116aa: 004d22 s8i a2, a13, 0 +402116ad: 000d42 l8ui a4, a13, 0 +402116b0: 0e2d mov.n a2, a14 +402116b2: 203ff0 or a3, a15, a15 +402116b5: ffcf05 call0 402113a8 +402116b8: 000d22 l8ui a2, a13, 0 +402116bb: 221b addi.n a2, a2, 1 +402116bd: 004d22 s8i a2, a13, 0 +402116c0: b108 l32i.n a0, a1, 44 +402116c2: a1c8 l32i.n a12, a1, 40 +402116c4: 91d8 l32i.n a13, a1, 36 +402116c6: 81e8 l32i.n a14, a1, 32 +402116c8: 71f8 l32i.n a15, a1, 28 +402116ca: 30c112 addi a1, a1, 48 +402116cd: f00d ret.n +402116cf: e5c200 extui a12, a0, 18, 15 +402116d2: fe .byte 0xfe +402116d3: 3f .byte 0x3f + +402116d4 : +402116d4: f0c112 addi a1, a1, -16 +402116d7: 11d9 s32i.n a13, a1, 4 +402116d9: fb14d1 l32r a13, 4021032c +402116dc: 050c movi.n a5, 0 +402116de: d1a142 movi a4, 0x1d1 +402116e1: 0d3d mov.n a3, a13 +402116e3: a4a422 movi a2, 0x4a4 +402116e6: 21c9 s32i.n a12, a1, 8 +402116e8: 3109 s32i.n a0, a1, 12 +402116ea: bf8601 l32r a0, 40201504 +402116ed: 0000c0 callx0 a0 +402116f0: 02cd mov.n a12, a2 +402116f2: 047216 beqz a2, 4021173d +402116f5: a4a442 movi a4, 0x4a4 +402116f8: ffa032 movi a3, 255 +402116fb: be4501 l32r a0, 40201010 <_irom0_text_start> +402116fe: 0000c0 callx0 a0 +40211701: ddcd31 l32r a3, 40208e38 +40211704: 08a042 movi a4, 8 +40211707: 202cc0 or a2, a12, a12 +4021170a: be4201 l32r a0, 40201014 <_irom0_text_start+0x4> +4021170d: 0000c0 callx0 a0 +40211710: fff031 l32r a3, 402116d0 +40211713: 92a422 movi a2, 0x492 +40211716: 640c movi.n a4, 6 +40211718: 802c20 add a2, a12, a2 +4021171b: be3e01 l32r a0, 40201014 <_irom0_text_start+0x4> +4021171e: 0000c0 callx0 a0 +40211721: ff2021 l32r a2, 402113a4 +40211724: a4a442 movi a4, 0x4a4 +40211727: 001222 l16ui a2, a2, 0 +4021172a: 203cc0 or a3, a12, a12 +4021172d: ffb445 call0 40211274 +40211730: dda142 movi a4, 0x1dd +40211733: 0d3d mov.n a3, a13 +40211735: 0c2d mov.n a2, a12 +40211737: bf7401 l32r a0, 40201508 +4021173a: 0000c0 callx0 a0 +4021173d: 3108 l32i.n a0, a1, 12 +4021173f: 21c8 l32i.n a12, a1, 8 +40211741: 11d8 l32i.n a13, a1, 4 +40211743: 10c112 addi a1, a1, 16 +40211746: f00d ret.n + +40211748 : +40211748: ff1721 l32r a2, 402113a4 +4021174b: ddbb31 l32r a3, 40208e38 +4021174e: 001222 l16ui a2, a2, 0 +40211751: f0c112 addi a1, a1, -16 +40211754: a4a442 movi a4, 0x4a4 +40211757: 3109 s32i.n a0, a1, 12 +40211759: ffb185 call0 40211274 +4021175c: 3108 l32i.n a0, a1, 12 +4021175e: 10c112 addi a1, a1, 16 +40211761: f00d ret.n + ... + +40211764 : +40211764: b0c112 addi a1, a1, -80 +40211767: 1261c2 s32i a12, a1, 72 +4021176a: 1061e2 s32i a14, a1, 64 +4021176d: f1f9 s32i.n a15, a1, 60 +4021176f: f4c020 extui a12, a2, 0, 16 +40211772: 136102 s32i a0, a1, 76 +40211775: 1161d2 s32i a13, a1, 68 +40211778: 020c movi.n a2, 0 +4021177a: 04fd mov.n a15, a4 +4021177c: f4e030 extui a14, a3, 0, 16 +4021177f: f45050 extui a5, a5, 0, 16 +40211782: 461427 beq a4, a2, 402117cc +40211785: fc07d1 l32r a13, 402107a4 +40211788: 3e5a add.n a3, a14, a5 +4021178a: 0d28 l32i.n a2, a13, 0 +4021178c: 3268 l32i.n a6, a2, 12 +4021178e: 020c movi.n a2, 0 +40211790: 383637 bltu a6, a3, 402117cc +40211793: 2c2b addi.n a2, a12, 2 +40211795: 822260 mull a2, a2, a6 +40211798: 042c movi.n a4, 32 +4021179a: 013d mov.n a3, a1 +4021179c: 8159 s32i.n a5, a1, 32 +4021179e: fb8801 l32r a0, 402105c0 +402117a1: 0000c0 callx0 a0 +402117a4: 000122 l8ui a2, a1, 0 +402117a7: 8158 l32i.n a5, a1, 32 +402117a9: 328c beqz.n a2, 402117b0 +402117ab: 120c movi.n a2, 1 +402117ad: 004122 s8i a2, a1, 0 +402117b0: 000122 l8ui a2, a1, 0 +402117b3: 054d mov.n a4, a5 +402117b5: c2ca add.n a12, a2, a12 +402117b7: 0d28 l32i.n a2, a13, 0 +402117b9: 0f3d mov.n a3, a15 +402117bb: 032222 l32i a2, a2, 12 +402117be: 822c20 mull a2, a12, a2 +402117c1: 8022e0 add a2, a2, a14 +402117c4: fb7f01 l32r a0, 402105c0 +402117c7: 0000c0 callx0 a0 +402117ca: 120c movi.n a2, 1 +402117cc: 132102 l32i a0, a1, 76 +402117cf: 1221c2 l32i a12, a1, 72 +402117d2: 1121d2 l32i a13, a1, 68 +402117d5: 1021e2 l32i a14, a1, 64 +402117d8: f1f8 l32i.n a15, a1, 60 +402117da: 50c112 addi a1, a1, 80 +402117dd: f00d ret.n +402117df: 8c0f00 excw +402117e2: fe .byte 0xfe +402117e3: 3f .byte 0x3f +402117e4: 0e .byte 0xe +402117e5: fe8c beqz.n a14, 402117f8 +402117e7: 3f .byte 0x3f +402117e8: fe8be7 bany a11, a14, 402117ea +402117eb: 3f .byte 0x3f +402117ec: fedc34 excw +402117ef: 3f .byte 0x3f +402117f0: d0c112 addi a1, a1, -48 +402117f3: a1c9 s32i.n a12, a1, 40 +402117f5: b109 s32i.n a0, a1, 44 +402117f7: 91d9 s32i.n a13, a1, 36 +402117f9: 81e9 s32i.n a14, a1, 32 +402117fb: 71f9 s32i.n a15, a1, 28 +402117fd: 1139 s32i.n a3, a1, 4 +402117ff: 02cd mov.n a12, a2 +40211801: 0442b6 bltui a2, 4, 40211809 +40211804: 0c0c movi.n a12, 0 +40211806: 005286 j 40211954 +40211809: c0d621 l32r a2, 40201b64 +4021180c: 01d232 addmi a3, a2, 0x100 +4021180f: de0332 l8ui a3, a3, 222 +40211812: fee356 bnez a3, 40211804 +40211815: 520c movi.n a2, 5 +40211817: febbc5 call0 402103d4 +4021181a: 130266 bnei a2, -1, 40211831 +4021181d: fff021 l32r a2, 402117e0 +40211820: 1138 l32i.n a3, a1, 4 +40211822: 0042c2 s8i a12, a2, 0 +40211825: ffef21 l32r a2, 402117e4 +40211828: 004232 s8i a3, a2, 0 +4021182b: 004246 j 40211938 +4021182e: 000000 ill +40211831: fabed1 l32r a13, 4021032c +40211834: 050c movi.n a5, 0 +40211836: c5a742 movi a4, 0x7c5 +40211839: 0d3d mov.n a3, a13 +4021183b: a4a422 movi a2, 0x4a4 +4021183e: bf3101 l32r a0, 40201504 +40211841: 0000c0 callx0 a0 +40211844: 02ed mov.n a14, a2 +40211846: fba216 beqz a2, 40211804 +40211849: fed6f1 l32r a15, 402113a4 +4021184c: 024d mov.n a4, a2 +4021184e: 001f22 l16ui a2, a15, 0 +40211851: a4a452 movi a5, 0x4a4 +40211854: 030c movi.n a3, 0 +40211856: fff0c5 call0 40211764 +40211859: c0c251 l32r a5, 40201b64 +4021185c: 02d522 addmi a2, a5, 0x200 +4021185f: 140252 l8ui a5, a2, 20 +40211862: 02dd mov.n a13, a2 +40211864: 0159 s32i.n a5, a1, 0 +40211866: 5b1c57 beq a12, a5, 402118c5 +40211869: 1442c2 s8i a12, a2, 20 +4021186c: ffdf21 l32r a2, 402117e8 +4021186f: 130c movi.n a3, 1 +40211871: 004232 s8i a3, a2, 0 +40211874: ffde31 l32r a3, 402117ec +40211877: 000332 l8ui a3, a3, 0 +4021187a: 3c1366 bnei a3, 1, 402118ba +4021187d: 042cf6 bgeui a12, 2, 40211885 +40211880: 020c movi.n a2, 0 +40211882: f3fcc5 call0 40205850 +40211885: df7c movi.n a15, -3 +40211887: 10fcf0 and a15, a12, a15 +4021188a: 1fcc bnez.n a15, 4021188f +4021188c: f9c0c5 call0 4020b49c +4021188f: 0c2d mov.n a2, a12 +40211891: f07c05 call0 40202054 +40211894: 021f66 bnei a15, 1, 4021189a +40211897: f9b945 call0 4020b42c +4021189a: fecc22 addi a2, a12, -2 +4021189d: 742020 extui a2, a2, 0, 8 +402118a0: 0922f6 bgeui a2, 2, 402118ad +402118a3: 020c movi.n a2, 0 +402118a5: f3a005 call0 402052a8 +402118a8: 000386 j 402118ba +402118ab: 660000 excw +402118ae: 091c movi.n a9, 16 +402118b0: c0ad31 l32r a3, 40201b64 +402118b3: 4328 l32i.n a2, a3, 16 +402118b5: 0228 l32i.n a2, a2, 0 +402118b7: 1721c5 call0 40228ad4 +402118ba: ffcb51 l32r a5, 402117e8 +402118bd: 020c movi.n a2, 0 +402118bf: 144dc2 s8i a12, a13, 20 +402118c2: 004522 s8i a2, a5, 0 +402118c5: 1128 l32i.n a2, a1, 4 +402118c7: 191266 bnei a2, 1, 402118e4 +402118ca: 080e22 l8ui a2, a14, 8 +402118cd: 1312c7 beq a2, a12, 402118e4 +402118d0: feb551 l32r a5, 402113a4 +402118d3: 084ec2 s8i a12, a14, 8 +402118d6: 001522 l16ui a2, a5, 0 +402118d9: a4a442 movi a4, 0x4a4 +402118dc: 0e3d mov.n a3, a14 +402118de: ff9945 call0 40211274 +402118e1: 144dc2 s8i a12, a13, 20 +402118e4: fa9231 l32r a3, 4021032c +402118e7: 0e2d mov.n a2, a14 +402118e9: dea742 movi a4, 0x7de +402118ec: bf0701 l32r a0, 40201508 +402118ef: 0000c0 callx0 a0 +402118f2: cb4421 l32r a2, 40204604 +402118f5: 0228 l32i.n a2, a2, 0 +402118f7: b2bc beqz.n a2, 40211936 +402118f9: fa8c31 l32r a3, 4021032c +402118fc: e2a742 movi a4, 0x7e2 +402118ff: 2ca022 movi a2, 44 +40211902: c1d301 l32r a0, 40202050 +40211905: 0000c0 callx0 a0 +40211908: 02ed mov.n a14, a2 +4021190a: 82ac beqz.n a2, 40211936 +4021190c: 0158 l32i.n a5, a1, 0 +4021190e: 830c movi.n a3, 8 +40211910: 0239 s32i.n a3, a2, 0 +40211912: 044252 s8i a5, a2, 4 +40211915: 140d22 l8ui a2, a13, 20 +40211918: 0e4d mov.n a4, a14 +4021191a: 054e22 s8i a2, a14, 5 +4021191d: 15a022 movi a2, 21 +40211920: cb4201 l32r a0, 40204628 +40211923: 0000c0 callx0 a0 +40211926: c28c beqz.n a2, 40211936 +40211928: fa8131 l32r a3, 4021032c +4021192b: eaa742 movi a4, 0x7ea +4021192e: 0e2d mov.n a2, a14 +40211930: bef601 l32r a0, 40201508 +40211933: 0000c0 callx0 a0 +40211936: 3c8c beqz.n a12, 4021193d +40211938: 1c0c movi.n a12, 1 +4021193a: 000586 j 40211954 +4021193d: 0ce185 call0 4021e758 +40211940: 02cd mov.n a12, a2 +40211942: f21266 bnei a2, 1, 40211938 +40211945: 02a022 movi a2, 2 +40211948: 0ccf85 call0 4021e644 +4021194b: 0cc805 call0 4021e5cc +4021194e: fa4921 l32r a2, 40210274 +40211951: 0cbdc5 call0 4021e530 +40211954: b108 l32i.n a0, a1, 44 +40211956: 0c2d mov.n a2, a12 +40211958: 91d8 l32i.n a13, a1, 36 +4021195a: a1c8 l32i.n a12, a1, 40 +4021195c: 81e8 l32i.n a14, a1, 32 +4021195e: 71f8 l32i.n a15, a1, 28 +40211960: 30c112 addi a1, a1, 48 +40211963: f00d ret.n +40211965: 000000 ill + +40211968 : +40211968: f0c112 addi a1, a1, -16 +4021196b: 130c movi.n a3, 1 +4021196d: 742020 extui a2, a2, 0, 8 +40211970: 3109 s32i.n a0, a1, 12 +40211972: ffe7c5 call0 402117f0 +40211975: 3108 l32i.n a0, a1, 12 +40211977: 10c112 addi a1, a1, 16 +4021197a: f00d ret.n + +4021197c : +4021197c: f0c112 addi a1, a1, -16 +4021197f: 030c movi.n a3, 0 +40211981: 742020 extui a2, a2, 0, 8 +40211984: 3109 s32i.n a0, a1, 12 +40211986: ffe685 call0 402117f0 +40211989: 3108 l32i.n a0, a1, 12 +4021198b: 10c112 addi a1, a1, 16 +4021198e: f00d ret.n +40211990: f0c112 addi a1, a1, -16 +40211993: 01e9 s32i.n a14, a1, 0 +40211995: 3109 s32i.n a0, a1, 12 +40211997: 21c9 s32i.n a12, a1, 8 +40211999: 11d9 s32i.n a13, a1, 4 +4021199b: 02ed mov.n a14, a2 +4021199d: 2c1226 beqi a2, 1, 402119cd +402119a0: fa6331 l32r a3, 4021032c +402119a3: 050c movi.n a5, 0 +402119a5: 21a742 movi a4, 0x721 +402119a8: a4a422 movi a2, 0x4a4 +402119ab: bed601 l32r a0, 40201504 +402119ae: 0000c0 callx0 a0 +402119b1: 02cd mov.n a12, a2 +402119b3: 020c movi.n a2, 0 +402119b5: 351c27 beq a12, a2, 402119ee +402119b8: 023d mov.n a3, a2 +402119ba: fe7a21 l32r a2, 402113a4 +402119bd: a4a452 movi a5, 0x4a4 +402119c0: 001222 l16ui a2, a2, 0 +402119c3: 0c4d mov.n a4, a12 +402119c5: ffd9c5 call0 40211764 +402119c8: 000106 j 402119d0 +402119cb: c10000 mul16u a0, a0, a0 +402119ce: dd1a add.n a13, a13, a1 +402119d0: 080cd2 l8ui a13, a12, 8 +402119d3: 024db6 bltui a13, 4, 402119d9 +402119d6: 02a0d2 movi a13, 2 +402119d9: 0d2d mov.n a2, a13 +402119db: 0f1e26 beqi a14, 1, 402119ee +402119de: fa5331 l32r a3, 4021032c +402119e1: 0c2d mov.n a2, a12 +402119e3: 2ba742 movi a4, 0x72b +402119e6: bec801 l32r a0, 40201508 +402119e9: 0000c0 callx0 a0 +402119ec: 0d2d mov.n a2, a13 +402119ee: 3108 l32i.n a0, a1, 12 +402119f0: 21c8 l32i.n a12, a1, 8 +402119f2: 11d8 l32i.n a13, a1, 4 +402119f4: 01e8 l32i.n a14, a1, 0 +402119f6: 10c112 addi a1, a1, 16 +402119f9: f00d ret.n + ... + +402119fc : +402119fc: f0c112 addi a1, a1, -16 +402119ff: 120c movi.n a2, 1 +40211a01: 3109 s32i.n a0, a1, 12 +40211a03: fff8c5 call0 40211990 +40211a06: 3108 l32i.n a0, a1, 12 +40211a08: 10c112 addi a1, a1, 16 +40211a0b: f00d ret.n +40211a0d: 000000 ill +40211a10: 214410 srai a4, a1, 4 +40211a13: 40 .byte 0x40 + +40211a14 : +40211a14: f0c112 addi a1, a1, -16 +40211a17: 21c9 s32i.n a12, a1, 8 +40211a19: 3109 s32i.n a0, a1, 12 +40211a1b: fffe05 call0 402119fc +40211a1e: 02cd mov.n a12, a2 +40211a20: fda022 movi a2, 253 +40211a23: 102c20 and a2, a12, a2 +40211a26: 021266 bnei a2, 1, 40211a2c +40211a29: f9a705 call0 4020b49c +40211a2c: feccc2 addi a12, a12, -2 +40211a2f: 74c0c0 extui a12, a12, 0, 8 +40211a32: 042cf6 bgeui a12, 2, 40211a3a +40211a35: 020c movi.n a2, 0 +40211a37: f3e185 call0 40205850 +40211a3a: de8cc1 l32r a12, 4020946c +40211a3d: 0c2d mov.n a2, a12 +40211a3f: c95f01 l32r a0, 40203fbc +40211a42: 0000c0 callx0 a0 +40211a45: fff231 l32r a3, 40211a10 +40211a48: 0c2d mov.n a2, a12 +40211a4a: 040c movi.n a4, 0 +40211a4c: ca5a01 l32r a0, 402043b4 +40211a4f: 0000c0 callx0 a0 +40211a52: 0c2d mov.n a2, a12 +40211a54: 150c movi.n a5, 1 +40211a56: 040c movi.n a4, 0 +40211a58: 64a032 movi a3, 100 +40211a5b: c95701 l32r a0, 40203fb8 +40211a5e: 0000c0 callx0 a0 +40211a61: 3108 l32i.n a0, a1, 12 +40211a63: 21c8 l32i.n a12, a1, 8 +40211a65: 10c112 addi a1, a1, 16 +40211a68: f00d ret.n +40211a6a: f80000 excw +40211a6d: fe8c beqz.n a14, 40211a80 +40211a6f: 3f .byte 0x3f +40211a70: 22f1b3 excw +40211a73: 8d0040 excw +40211a76: fe .byte 0xfe +40211a77: 3f .byte 0x3f +40211a78: 41fc bnez.n a1, 40211ab0 +40211a7a: 21 .byte 0x21 +40211a7b: 40 .byte 0x40 + +40211a7c : +40211a7c: e0c112 addi a1, a1, -32 +40211a7f: 7109 s32i.n a0, a1, 28 +40211a81: 1139 s32i.n a3, a1, 4 +40211a83: 61c9 s32i.n a12, a1, 24 +40211a85: 0129 s32i.n a2, a1, 0 +40211a87: fff745 call0 402119fc +40211a8a: 02cd mov.n a12, a2 +40211a8c: 0d2585 call0 4021ece8 +40211a8f: 0168 l32i.n a6, a1, 0 +40211a91: 1178 l32i.n a7, a1, 4 +40211a93: 024d mov.n a4, a2 +40211a95: 073d mov.n a3, a7 +40211a97: 062d mov.n a2, a6 +40211a99: 0b6285 call0 4021d0c4 +40211a9c: fff441 l32r a4, 40211a6c +40211a9f: 0429 s32i.n a2, a4, 0 +40211aa1: 1439 s32i.n a3, a4, 4 +40211aa3: 13cc bnez.n a3, 40211aa8 +40211aa5: 0102d6 bgez a2, 40211ab9 +40211aa8: fff221 l32r a2, 40211a70 +40211aab: c16801 l32r a0, 4020204c +40211aae: 0000c0 callx0 a0 +40211ab1: 020c movi.n a2, 0 +40211ab3: 0013c6 j 40211b06 +40211ab6: 000000 ill +40211ab9: ffee21 l32r a2, 40211a74 +40211abc: 01a032 movi a3, 1 +40211abf: 004232 s8i a3, a2, 0 +40211ac2: fda022 movi a2, 253 +40211ac5: 102c20 and a2, a12, a2 +40211ac8: 021266 bnei a2, 1, 40211ace +40211acb: f99d05 call0 4020b49c +40211ace: feccc2 addi a12, a12, -2 +40211ad1: 74c0c0 extui a12, a12, 0, 8 +40211ad4: 052cf6 bgeui a12, 2, 40211add +40211ad7: 00a022 movi a2, 0 +40211ada: f3d745 call0 40205850 +40211add: de63c1 l32r a12, 4020946c +40211ae0: 0c2d mov.n a2, a12 +40211ae2: c93601 l32r a0, 40203fbc +40211ae5: 0000c0 callx0 a0 +40211ae8: ffe431 l32r a3, 40211a78 +40211aeb: 040c movi.n a4, 0 +40211aed: 0c2d mov.n a2, a12 +40211aef: ca3101 l32r a0, 402043b4 +40211af2: 0000c0 callx0 a0 +40211af5: 0c2d mov.n a2, a12 +40211af7: 150c movi.n a5, 1 +40211af9: 040c movi.n a4, 0 +40211afb: 64a032 movi a3, 100 +40211afe: c92e01 l32r a0, 40203fb8 +40211b01: 0000c0 callx0 a0 +40211b04: 120c movi.n a2, 1 +40211b06: 7108 l32i.n a0, a1, 28 +40211b08: 61c8 l32i.n a12, a1, 24 +40211b0a: 20c112 addi a1, a1, 32 +40211b0d: f00d ret.n + ... + +40211b10 : +40211b10: f0c112 addi a1, a1, -16 +40211b13: 036102 s32i a0, a1, 12 +40211b16: 0261c2 s32i a12, a1, 8 +40211b19: ffee05 call0 402119fc +40211b1c: 023d mov.n a3, a2 +40211b1e: 020c movi.n a2, 0 +40211b20: 2823b6 bltui a3, 2, 40211b4c +40211b23: c01021 l32r a2, 40201b64 +40211b26: 01d222 addmi a2, a2, 0x100 +40211b29: de0232 l8ui a3, a2, 222 +40211b2c: 020c movi.n a2, 0 +40211b2e: 1a9327 bne a3, a2, 40211b4c +40211b31: 01a022 movi a2, 1 +40211b34: 02f385 call0 40214a70 +40211b37: fd87c1 l32r a12, 40211154 +40211b3a: 728c beqz.n a2, 40211b45 +40211b3c: 000c22 l8ui a2, a12, 0 +40211b3f: 021266 bnei a2, 1, 40211b45 +40211b42: 13bdc5 call0 40225720 +40211b45: 020c movi.n a2, 0 +40211b47: 004c22 s8i a2, a12, 0 +40211b4a: 120c movi.n a2, 1 +40211b4c: 3108 l32i.n a0, a1, 12 +40211b4e: 21c8 l32i.n a12, a1, 8 +40211b50: 10c112 addi a1, a1, 16 +40211b53: f00d ret.n +40211b55: 000000 ill + +40211b58 : +40211b58: f0c112 addi a1, a1, -16 +40211b5b: 036102 s32i a0, a1, 12 +40211b5e: 0261c2 s32i a12, a1, 8 +40211b61: ffe985 call0 402119fc +40211b64: fda032 movi a3, 253 +40211b67: 068237 bany a2, a3, 40211b71 +40211b6a: 020c movi.n a2, 0 +40211b6c: 000f86 j 40211bae +40211b6f: 210000 srai a0, a0, 0 +40211b72: bffc bnez.n a15, 40211bb1 +40211b74: 01d222 addmi a2, a2, 0x100 +40211b77: de0222 l8ui a2, a2, 222 +40211b7a: fec256 bnez a2, 40211b6a +40211b7d: 02ef05 call0 40214a70 +40211b80: f795c1 l32r a12, 4020f9d4 +40211b83: 92cc bnez.n a2, 40211b90 +40211b85: 120c movi.n a2, 1 +40211b87: 004c22 s8i a2, a12, 0 +40211b8a: 120c movi.n a2, 1 +40211b8c: 000786 j 40211bae +40211b8f: 0c3200 excw +40211b92: e35600 excw +40211b95: fe .byte 0xfe +40211b96: 390232 l8ui a3, a2, 57 +40211b99: e86307 bbci a3, 0, 40211b85 +40211b9c: 030c movi.n a3, 0 +40211b9e: 1239 s32i.n a3, a2, 4 +40211ba0: 2239 s32i.n a3, a2, 8 +40211ba2: 036232 s32i a3, a2, 12 +40211ba5: 136c45 call0 4022526c +40211ba8: fbe256 bnez a2, 40211b6a +40211bab: fff586 j 40211b85 +40211bae: 3108 l32i.n a0, a1, 12 +40211bb0: 21c8 l32i.n a12, a1, 8 +40211bb2: 10c112 addi a1, a1, 16 +40211bb5: f00d ret.n + ... + +40211bb8 : +40211bb8: f0c112 addi a1, a1, -16 +40211bbb: 3109 s32i.n a0, a1, 12 +40211bbd: 21c9 s32i.n a12, a1, 8 +40211bbf: ffe3c5 call0 402119fc +40211bc2: fda032 movi a3, 253 +40211bc5: 102230 and a2, a2, a3 +40211bc8: 42ac beqz.n a2, 40211bf0 +40211bca: bfe621 l32r a2, 40201b64 +40211bcd: 01d222 addmi a2, a2, 0x100 +40211bd0: de0232 l8ui a3, a2, 222 +40211bd3: 020c movi.n a2, 0 +40211bd5: 179327 bne a3, a2, 40211bf0 +40211bd8: 02e945 call0 40214a70 +40211bdb: f77ec1 l32r a12, 4020f9d4 +40211bde: 728c beqz.n a2, 40211be9 +40211be0: 000c32 l8ui a3, a12, 0 +40211be3: 021366 bnei a3, 1, 40211be9 +40211be6: 136485 call0 40225230 +40211be9: 020c movi.n a2, 0 +40211beb: 004c22 s8i a2, a12, 0 +40211bee: 120c movi.n a2, 1 +40211bf0: 3108 l32i.n a0, a1, 12 +40211bf2: 21c8 l32i.n a12, a1, 8 +40211bf4: 10c112 addi a1, a1, 16 +40211bf7: f00d ret.n +40211bf9: 000000 ill +40211bfc: fe8cf0 excw +40211bff: 3f .byte 0x3f +40211c00: fee760 excw +40211c03: 3f .byte 0x3f + +40211c04 : +40211c04: f0c112 addi a1, a1, -16 +40211c07: 036102 s32i a0, a1, 12 +40211c0a: ffdf05 call0 402119fc +40211c0d: 1b3266 bnei a2, 3, 40211c2c +40211c10: fffb21 l32r a2, 40211bfc +40211c13: 000222 l8ui a2, a2, 0 +40211c16: 012256 bnez a2, 40211c2c +40211c19: 02e545 call0 40214a70 +40211c1c: fff931 l32r a3, 40211c00 +40211c1f: 01a042 movi a4, 1 +40211c22: 0338 l32i.n a3, a3, 0 +40211c24: c03230 sub a3, a2, a3 +40211c27: 220c movi.n a2, 2 +40211c29: 832430 moveqz a2, a4, a3 +40211c2c: 3108 l32i.n a0, a1, 12 +40211c2e: 10c112 addi a1, a1, 16 +40211c31: f00d ret.n +40211c33: f0f900 subx8 a15, a9, a0 +40211c36: 22 .byte 0x22 +40211c37: 40 .byte 0x40 + +40211c38 : +40211c38: 742020 extui a2, a2, 0, 8 +40211c3b: f0c112 addi a1, a1, -16 +40211c3e: 320b addi.n a3, a2, -1 +40211c40: 3109 s32i.n a0, a1, 12 +40211c42: 0261c2 s32i a12, a1, 8 +40211c45: 743030 extui a3, a3, 0, 8 +40211c48: 0d33b6 bltui a3, 3, 40211c59 +40211c4b: fffa21 l32r a2, 40211c34 +40211c4e: c0ff01 l32r a0, 4020204c +40211c51: 0000c0 callx0 a0 +40211c54: 0009c6 j 40211c7f +40211c57: 310000 srai a0, a0, 16 +40211c5a: ffe8 l32i.n a14, a15, 60 +40211c5c: 040c movi.n a4, 0 +40211c5e: 004342 s8i a4, a3, 0 +40211c61: 20c330 or a12, a3, a3 +40211c64: 1d2226 beqi a2, 2, 40211c85 +40211c67: 3e3226 beqi a2, 3, 40211ca9 +40211c6a: ffd905 call0 402119fc +40211c6d: 081266 bnei a2, 1, 40211c79 +40211c70: bfbd21 l32r a2, 40201b64 +40211c73: 4228 l32i.n a2, a2, 16 +40211c75: 0005c6 j 40211c90 +40211c78: d80500 excw +40211c7b: ff .byte 0xff +40211c7c: f03226 beqi a2, 3, 40211c70 +40211c7f: 020c movi.n a2, 0 +40211c81: 000bc6 j 40211cb4 +40211c84: d74500 excw +40211c87: ff .byte 0xff +40211c88: 112266 bnei a2, 2, 40211c9d +40211c8b: bfb621 l32r a2, 40201b64 +40211c8e: 5228 l32i.n a2, a2, 20 +40211c90: feb216 beqz a2, 40211c7f +40211c93: 0228 l32i.n a2, a2, 0 +40211c95: 16e3c5 call0 40228ad4 +40211c98: 000586 j 40211cb2 +40211c9b: c50000 extui a0, a0, 16, 13 +40211c9e: 26ffd5 excw +40211ca1: 06e732 excw +40211ca4: 00fff6 bgeui a15, 0x100, 40211ca8 +40211ca7: 050000 extui a0, a0, 16, 1 +40211caa: 66ffd5 excw +40211cad: 22cf32 addi a3, a15, 34 +40211cb0: 004c movi.n a0, 64 +40211cb2: 120c movi.n a2, 1 +40211cb4: 3108 l32i.n a0, a1, 12 +40211cb6: 21c8 l32i.n a12, a1, 8 +40211cb8: 10c112 addi a1, a1, 16 +40211cbb: f00d ret.n +40211cbd: 000000 ill + +40211cc0 : +40211cc0: f0c112 addi a1, a1, -16 +40211cc3: 020c movi.n a2, 0 +40211cc5: 3109 s32i.n a0, a1, 12 +40211cc7: ffcc85 call0 40211990 +40211cca: 3108 l32i.n a0, a1, 12 +40211ccc: 10c112 addi a1, a1, 16 +40211ccf: f00d ret.n +40211cd1: 000000 ill +40211cd4: 6e .byte 0x6e +40211cd5: 0009 s32i.n a0, a0, 0 +40211cd7: e13c00 excw +40211cda: fe .byte 0xfe +40211cdb: 3f .byte 0x3f +40211cdc: 098d mov.n a8, a9 +40211cde: 7c0000 excw +40211ce1: fe8c beqz.n a14, 40211cf4 +40211ce3: 3f .byte 0x3f +40211ce4: 8c0d excw +40211ce6: fe .byte 0xfe +40211ce7: 3f .byte 0x3f +40211ce8: 09ec bnez.n a9, 40211d0c +40211cea: f30000 excw +40211ced: 0009 s32i.n a0, a0, 0 +40211cef: c11200 mul16u a1, a2, a0 +40211cf2: 61c9e0 excw +40211cf5: 51d9 s32i.n a13, a1, 20 +40211cf7: 7109 s32i.n a0, a1, 28 +40211cf9: 03dd mov.n a13, a3 +40211cfb: 41e9 s32i.n a14, a1, 16 +40211cfd: 31f9 s32i.n a15, a1, 12 +40211cff: 02cd mov.n a12, a2 +40211d01: ffcf85 call0 402119fc +40211d04: fda032 movi a3, 253 +40211d07: 010237 bnone a2, a3, 40211d0c +40211d0a: 3ccc bnez.n a12, 40211d11 +40211d0c: 020c movi.n a2, 0 +40211d0e: 005106 j 40211e56 +40211d11: 022d26 beqi a13, 2, 40211d17 +40211d14: 003106 j 40211ddc +40211d17: f985d1 l32r a13, 4021032c +40211d1a: ffee41 l32r a4, 40211cd4 +40211d1d: 050c movi.n a5, 0 +40211d1f: 0d3d mov.n a3, a13 +40211d21: a4a422 movi a2, 0x4a4 +40211d24: bdf801 l32r a0, 40201504 +40211d27: 0000c0 callx0 a0 +40211d2a: 02cd mov.n a12, a2 +40211d2c: 120c movi.n a2, 1 +40211d2e: 124c16 beqz a12, 40211e56 +40211d31: fd9cd1 l32r a13, 402113a4 +40211d34: a4a452 movi a5, 0x4a4 +40211d37: 001d22 l16ui a2, a13, 0 +40211d3a: 0c4d mov.n a4, a12 +40211d3c: 030c movi.n a3, 0 +40211d3e: ffa245 call0 40211764 +40211d41: fccb addi.n a15, a12, 12 +40211d43: a4a042 movi a4, 164 +40211d46: ffa032 movi a3, 255 +40211d49: 0f2d mov.n a2, a15 +40211d4b: bcb101 l32r a0, 40201010 <_irom0_text_start> +40211d4e: 0000c0 callx0 a0 +40211d51: ffe1e1 l32r a14, 40211cd8 +40211d54: a4a042 movi a4, 164 +40211d57: ffa032 movi a3, 255 +40211d5a: 0e2d mov.n a2, a14 +40211d5c: bcad01 l32r a0, 40201010 <_irom0_text_start> +40211d5f: 0000c0 callx0 a0 +40211d62: bf8031 l32r a3, 40201b64 +40211d65: 0e2d mov.n a2, a14 +40211d67: 862342 l32i a4, a3, 0x218 +40211d6a: 20e330 or a14, a3, a3 +40211d6d: 130466 bnei a4, -1, 40211d84 +40211d70: 24a032 movi a3, 36 +40211d73: cfb201 l32r a0, 40205c3c +40211d76: 0000c0 callx0 a0 +40211d79: d41421 l32r a2, 40206dcc +40211d7c: 034c movi.n a3, 64 +40211d7e: cfaf01 l32r a0, 40205c3c +40211d81: 0000c0 callx0 a0 +40211d84: 02de22 addmi a2, a14, 0x200 +40211d87: b50232 l8ui a3, a2, 181 +40211d8a: 0423b6 bltui a3, 2, 40211d92 +40211d8d: 030c movi.n a3, 0 +40211d8f: b54232 s8i a3, a2, 181 +40211d92: 3c28 l32i.n a2, a12, 12 +40211d94: 150266 bnei a2, -1, 40211dad +40211d97: 432c movi.n a3, 36 +40211d99: 202ff0 or a2, a15, a15 +40211d9c: cfa801 l32r a0, 40205c3c +40211d9f: 0000c0 callx0 a0 +40211da2: 034c movi.n a3, 64 +40211da4: 37cc22 addi a2, a12, 55 +40211da7: cfa501 l32r a0, 40205c3c +40211daa: 0000c0 callx0 a0 +40211dad: a90c32 l8ui a3, a12, 169 +40211db0: 020c movi.n a2, 0 +40211db2: 0223b6 bltui a3, 2, 40211db8 +40211db5: a94c22 s8i a2, a12, 169 +40211db8: 04dc32 addmi a3, a12, 0x400 +40211dbb: 9a4322 s8i a2, a3, 154 +40211dbe: 001d22 l16ui a2, a13, 0 +40211dc1: 0c3d mov.n a3, a12 +40211dc3: a4a442 movi a4, 0x4a4 +40211dc6: ff4ac5 call0 40211274 +40211dc9: ffc441 l32r a4, 40211cdc +40211dcc: f95831 l32r a3, 4021032c +40211dcf: 202cc0 or a2, a12, a12 +40211dd2: bdcd01 l32r a0, 40201508 +40211dd5: 0000c0 callx0 a0 +40211dd8: 001e06 j 40211e54 +40211ddb: dc2100 excw +40211dde: 0cdc bnez.n a12, 40211df2 +40211de0: 423203 excw +40211de3: 320c00 excw +40211de6: fe5ec5 call0 402103d4 +40211de9: 180266 bnei a2, -1, 40211e05 +40211dec: ffbd21 l32r a2, 40211ce0 +40211def: 74a042 movi a4, 116 +40211df2: 0c3d mov.n a3, a12 +40211df4: bc8801 l32r a0, 40201014 <_irom0_text_start+0x4> +40211df7: 0000c0 callx0 a0 +40211dfa: ffba21 l32r a2, 40211ce4 +40211dfd: 0042d2 s8i a13, a2, 0 +40211e00: 001406 j 40211e54 +40211e03: 660000 excw +40211e06: 401d excw +40211e08: f949e1 l32r a14, 4021032c +40211e0b: ffb741 l32r a4, 40211ce8 +40211e0e: 050c movi.n a5, 0 +40211e10: 203ee0 or a3, a14, a14 +40211e13: a4a422 movi a2, 0x4a4 +40211e16: bdbb01 l32r a0, 40201504 +40211e19: 0000c0 callx0 a0 +40211e1c: 02dd mov.n a13, a2 +40211e1e: eea216 beqz a2, 40211d0c +40211e21: 024d mov.n a4, a2 +40211e23: fd6021 l32r a2, 402113a4 +40211e26: a4a452 movi a5, 0x4a4 +40211e29: 001222 l16ui a2, a2, 0 +40211e2c: 00a032 movi a3, 0 +40211e2f: ff9345 call0 40211764 +40211e32: 140c movi.n a4, 1 +40211e34: 203cc0 or a3, a12, a12 +40211e37: 0d2d mov.n a2, a13 +40211e39: ff73c5 call0 40211578 +40211e3c: ffac41 l32r a4, 40211cec +40211e3f: 0e3d mov.n a3, a14 +40211e41: 0d2d mov.n a2, a13 +40211e43: bdb101 l32r a0, 40201508 +40211e46: 0000c0 callx0 a0 +40211e49: dbfb21 l32r a2, 40208e38 +40211e4c: 00a042 movi a4, 0 +40211e4f: 0c3d mov.n a3, a12 +40211e51: ff7245 call0 40211578 +40211e54: 120c movi.n a2, 1 +40211e56: 7108 l32i.n a0, a1, 28 +40211e58: 61c8 l32i.n a12, a1, 24 +40211e5a: 51d8 l32i.n a13, a1, 20 +40211e5c: 41e8 l32i.n a14, a1, 16 +40211e5e: 31f8 l32i.n a15, a1, 12 +40211e60: 20c112 addi a1, a1, 32 +40211e63: f00d ret.n +40211e65: 000000 ill +40211e68: 000000 ill +40211e6b: 0000f0 excw +40211e6e: ffd000 excw +40211e71: ff .byte 0xff +40211e72: ff .byte 0xff +40211e73: ef .byte 0xef +40211e74: f31b addi.n a15, a3, 1 +40211e76: fd4022 s8i a2, a0, 253 +40211e79: 4022f2 l32i a15, a2, 0x100 +40211e7c: 22f2e7 bbsi a2, 30, 40211ea2 +40211e7f: f2ca40 excw +40211e82: b34022 s8i a2, a0, 179 +40211e85: 4022f2 l32i a15, a2, 0x100 + +40211e88 : +40211e88: c0c112 addi a1, a1, -64 +40211e8b: e1c9 s32i.n a12, a1, 56 +40211e8d: f927c1 l32r a12, 4021032c +40211e90: d1d9 s32i.n a13, a1, 52 +40211e92: b1f9 s32i.n a15, a1, 44 +40211e94: 050c movi.n a5, 0 +40211e96: 03dd mov.n a13, a3 +40211e98: 74f020 extui a15, a2, 0, 8 +40211e9b: 52a242 movi a4, 0x252 +40211e9e: 0c3d mov.n a3, a12 +40211ea0: a4a422 movi a2, 0x4a4 +40211ea3: c1e9 s32i.n a14, a1, 48 +40211ea5: 0f6102 s32i a0, a1, 60 +40211ea8: bd9701 l32r a0, 40201504 +40211eab: 0000c0 callx0 a0 +40211eae: 050c movi.n a5, 0 +40211eb0: 02ed mov.n a14, a2 +40211eb2: 029257 bne a2, a5, 40211eb8 +40211eb5: 004dc6 j 40211ff0 +40211eb8: fd3b61 l32r a6, 402113a4 +40211ebb: 024d mov.n a4, a2 +40211ebd: 001622 l16ui a2, a6, 0 +40211ec0: a4a452 movi a5, 0x4a4 +40211ec3: 00a032 movi a3, 0 +40211ec6: ff89c5 call0 40211764 +40211ec9: fe5e05 call0 402104ac +40211ecc: 025d mov.n a5, a2 +40211ece: 32dc bnez.n a2, 40211ee5 +40211ed0: 5ba242 movi a4, 0x25b +40211ed3: 0c3d mov.n a3, a12 +40211ed5: 0e2d mov.n a2, a14 +40211ed7: 046152 s32i a5, a1, 16 +40211eda: bd8b01 l32r a0, 40201508 +40211edd: 0000c0 callx0 a0 +40211ee0: 4158 l32i.n a5, a1, 16 +40211ee2: 004286 j 40211ff0 +40211ee5: 084f56 bnez a15, 40211f6d +40211ee8: 840c movi.n a4, 8 +40211eea: 013d mov.n a3, a1 +40211eec: 00a022 movi a2, 0 +40211eef: f9b401 l32r a0, 402105c0 +40211ef2: 0000c0 callx0 a0 +40211ef5: 0148 l32i.n a4, a1, 0 +40211ef7: ffdc21 l32r a2, 40211e68 +40211efa: ffdc31 l32r a3, 40211e6c +40211efd: 102420 and a2, a4, a2 +40211f00: ffdc51 l32r a5, 40211e70 +40211f03: 223a add.n a2, a2, a3 +40211f05: 140257 bnone a2, a5, 40211f1d +40211f08: 110437 bnone a4, a3, 40211f1d +40211f0b: ffda21 l32r a2, 40211e74 +40211f0e: c04f01 l32r a0, 4020204c +40211f11: 0000c0 callx0 a0 +40211f14: 69a242 movi a4, 0x269 +40211f17: 001a46 j 40211f84 +40211f1a: 000000 ill +40211f1d: fe7a05 call0 402106c0 +40211f20: 02fd mov.n a15, a2 +40211f22: ffd521 l32r a2, 40211e78 +40211f25: 0d3d mov.n a3, a13 +40211f27: c04901 l32r a0, 4020204c +40211f2a: 0000c0 callx0 a0 +40211f2d: 010e22 l8ui a2, a14, 1 +40211f30: 000e32 l8ui a3, a14, 0 +40211f33: 642020 extui a2, a2, 0, 7 +40211f36: 014e22 s8i a2, a14, 1 +40211f39: 420c movi.n a2, 4 +40211f3b: 202320 or a2, a3, a2 +40211f3e: 004e22 s8i a2, a14, 0 +40211f41: f520d0 extui a2, a13, 16, 16 +40211f44: 074e22 s8i a2, a14, 7 +40211f47: 4128d0 srli a2, a13, 8 +40211f4a: 064e22 s8i a2, a14, 6 +40211f4d: f520f0 extui a2, a15, 16, 16 +40211f50: 044e22 s8i a2, a14, 4 +40211f53: fd1451 l32r a5, 402113a4 +40211f56: 4128f0 srli a2, a15, 8 +40211f59: 034e22 s8i a2, a14, 3 +40211f5c: 024ef2 s8i a15, a14, 2 +40211f5f: 054ed2 s8i a13, a14, 5 +40211f62: a4a442 movi a4, 0x4a4 +40211f65: 0e3d mov.n a3, a14 +40211f67: 001522 l16ui a2, a5, 0 +40211f6a: 001606 j 40211fc6 +40211f6d: 6f1f66 bnei a15, 1, 40211fe0 +40211f70: fe67c5 call0 402105f0 +40211f73: 742020 extui a2, a2, 0, 8 +40211f76: b2dc bnez.n a2, 40211f95 +40211f78: ffc121 l32r a2, 40211e7c +40211f7b: c03401 l32r a0, 4020204c +40211f7e: 0000c0 callx0 a0 +40211f81: 7ea242 movi a4, 0x27e +40211f84: 0c3d mov.n a3, a12 +40211f86: 0e2d mov.n a2, a14 +40211f88: bd6001 l32r a0, 40201508 +40211f8b: 0000c0 callx0 a0 +40211f8e: 050c movi.n a5, 0 +40211f90: 001706 j 40211ff0 +40211f93: 210000 srai a0, a0, 0 +40211f96: ffba add.n a15, a15, a11 +40211f98: 0d3d mov.n a3, a13 +40211f9a: c02c01 l32r a0, 4020204c +40211f9d: 0000c0 callx0 a0 +40211fa0: 010e32 l8ui a3, a14, 1 +40211fa3: bfaf22 movi a2, -65 +40211fa6: 102320 and a2, a3, a2 +40211fa9: 014e22 s8i a2, a14, 1 +40211fac: f520d0 extui a2, a13, 16, 16 +40211faf: 044e22 s8i a2, a14, 4 +40211fb2: fcfc61 l32r a6, 402113a4 +40211fb5: 4128d0 srli a2, a13, 8 +40211fb8: 034e22 s8i a2, a14, 3 +40211fbb: 024ed2 s8i a13, a14, 2 +40211fbe: 001622 l16ui a2, a6, 0 +40211fc1: a4a442 movi a4, 0x4a4 +40211fc4: 0e3d mov.n a3, a14 +40211fc6: ff2ac5 call0 40211274 +40211fc9: ffa485 call0 40211a14 +40211fcc: 91a242 movi a4, 0x291 +40211fcf: 0c3d mov.n a3, a12 +40211fd1: 0e2d mov.n a2, a14 +40211fd3: bd4d01 l32r a0, 40201508 +40211fd6: 0000c0 callx0 a0 +40211fd9: 150c movi.n a5, 1 +40211fdb: 000446 j 40211ff0 +40211fde: 210000 srai a0, a0, 0 +40211fe1: ffa9 s32i.n a10, a15, 60 +40211fe3: c01a01 l32r a0, 4020204c +40211fe6: 0000c0 callx0 a0 +40211fe9: 8ea242 movi a4, 0x28e +40211fec: ffe506 j 40211f84 +40211fef: f10800 excw +40211ff2: 052d mov.n a2, a5 +40211ff4: e1c8 l32i.n a12, a1, 56 +40211ff6: d1d8 l32i.n a13, a1, 52 +40211ff8: c1e8 l32i.n a14, a1, 48 +40211ffa: b1f8 l32i.n a15, a1, 44 +40211ffc: 40c112 addi a1, a1, 64 +40211fff: f00d ret.n +40212001: 000000 ill +40212004: 22f201 l32r a0, 401dabcc <_lit4_end+0xd48a0> +40212007: f1fe40 excw +4021200a: fb4022 s8i a2, a0, 251 +4021200d: 4022f1 l32r a15, 401e2098 <_lit4_end+0xdbd6c> +40212010: ff8000 excw +40212013: ff .byte 0xff +40212014: f1f8 l32i.n a15, a1, 60 +40212016: f54022 s8i a2, a0, 245 +40212019: 4022f1 l32r a15, 401e20a4 <_lit4_end+0xdbd78> +4021201c: 22f1f2 excw +4021201f: f1ef40 excw +40212022: 22 .byte 0x22 +40212023: 40 .byte 0x40 + +40212024 : +40212024: e0c112 addi a1, a1, -32 +40212027: 41e9 s32i.n a14, a1, 16 +40212029: f8c0e1 l32r a14, 4021032c +4021202c: 050c movi.n a5, 0 +4021202e: 6ea442 movi a4, 0x46e +40212031: 0e3d mov.n a3, a14 +40212033: a4a422 movi a2, 0x4a4 +40212036: 61c9 s32i.n a12, a1, 24 +40212038: 7109 s32i.n a0, a1, 28 +4021203a: 0561d2 s32i a13, a1, 20 +4021203d: 0361f2 s32i a15, a1, 12 +40212040: bd3101 l32r a0, 40201504 +40212043: 0000c0 callx0 a0 +40212046: 02cd mov.n a12, a2 +40212048: 020c movi.n a2, 0 +4021204a: 029c27 bne a12, a2, 40212050 +4021204d: 004146 j 40212156 +40212050: fcd5f1 l32r a15, 402113a4 +40212053: 023d mov.n a3, a2 +40212055: 001f22 l16ui a2, a15, 0 +40212058: a4a452 movi a5, 0x4a4 +4021205b: 204cc0 or a4, a12, a12 +4021205e: ff7045 call0 40211764 +40212061: bec021 l32r a2, 40201b64 +40212064: 8322d2 l32i a13, a2, 0x20c +40212067: f9c021 l32r a2, 40210768 +4021206a: 44d8d0 extui a13, a13, 8, 5 +4021206d: 000222 l8ui a2, a2, 0 +40212070: 112226 beqi a2, 2, 40212085 +40212073: 0c2d mov.n a2, a12 +40212075: 78a442 movi a4, 0x478 +40212078: 0e3d mov.n a3, a14 +4021207a: bd2301 l32r a0, 40201508 +4021207d: 0000c0 callx0 a0 +40212080: 020c movi.n a2, 0 +40212082: 003406 j 40212156 +40212085: ffdf21 l32r a2, 40212004 +40212088: bff101 l32r a0, 4020204c +4021208b: 0000c0 callx0 a0 +4021208e: 042d26 beqi a13, 2, 40212096 +40212091: e1cdd2 addi a13, a13, -31 +40212094: 8dfc bnez.n a13, 402120d0 +40212096: 0c28 l32i.n a2, a12, 0 +40212098: 342020 extui a2, a2, 0, 4 +4021209b: 151266 bnei a2, 1, 402120b4 +4021209e: ffda21 l32r a2, 40212008 +402120a1: bfea01 l32r a0, 4020204c +402120a4: 0000c0 callx0 a0 +402120a7: 000c32 l8ui a3, a12, 0 +402120aa: 027c movi.n a2, -16 +402120ac: 102320 and a2, a3, a2 +402120af: 0005c6 j 402120ca +402120b2: 210000 srai a0, a0, 0 +402120b5: 01ffd6 bgez a15, 402120d8 +402120b8: c0bfe5 excw +402120bb: 320000 excw +402120be: 000c movi.n a0, 0 +402120c0: 027c movi.n a2, -16 +402120c2: 103320 and a3, a3, a2 +402120c5: 120c movi.n a2, 1 +402120c7: 202320 or a2, a3, a2 +402120ca: 004c22 s8i a2, a12, 0 +402120cd: 001946 j 40212136 +402120d0: 001c32 l16ui a3, a12, 0 +402120d3: ffcf21 l32r a2, 40212010 +402120d6: 202320 or a2, a3, a2 +402120d9: 005c22 s16i a2, a12, 0 +402120dc: 0c38 l32i.n a3, a12, 0 +402120de: 142030 extui a2, a3, 0, 2 +402120e1: 14e327 bbsi a3, 2, 402120f9 +402120e4: 051266 bnei a2, 1, 402120ed +402120e7: ffcb21 l32r a2, 40212014 +402120ea: 000086 j 402120f0 +402120ed: ffca21 l32r a2, 40212018 +402120f0: bfd701 l32r a0, 4020204c +402120f3: 0000c0 callx0 a0 +402120f6: 000c06 j 4021212a +402120f9: 131266 bnei a2, 1, 40212110 +402120fc: ffc821 l32r a2, 4021201c +402120ff: bfd301 l32r a0, 4020204c +40212102: 0000c0 callx0 a0 +40212105: 001c32 l16ui a3, a12, 0 +40212108: c27c movi.n a2, -4 +4021210a: 102320 and a2, a3, a2 +4021210d: 000586 j 40212127 +40212110: ffc421 l32r a2, 40212020 +40212113: bfce01 l32r a0, 4020204c +40212116: 0000c0 callx0 a0 +40212119: 001c32 l16ui a3, a12, 0 +4021211c: c27c movi.n a2, -4 +4021211e: 103320 and a3, a3, a2 +40212121: 01a022 movi a2, 1 +40212124: 202320 or a2, a3, a2 +40212127: 005c22 s16i a2, a12, 0 +4021212a: 001c32 l16ui a3, a12, 0 +4021212d: 04a022 movi a2, 4 +40212130: 202320 or a2, a3, a2 +40212133: 005c22 s16i a2, a12, 0 +40212136: 001f22 l16ui a2, a15, 0 +40212139: a4a442 movi a4, 0x4a4 +4021213c: 203cc0 or a3, a12, a12 +4021213f: ff1345 call0 40211274 +40212142: 202cc0 or a2, a12, a12 +40212145: 9da442 movi a4, 0x49d +40212148: 203ee0 or a3, a14, a14 +4021214b: bcef01 l32r a0, 40201508 +4021214e: 0000c0 callx0 a0 +40212151: ff8c05 call0 40211a14 +40212154: 120c movi.n a2, 1 +40212156: 7108 l32i.n a0, a1, 28 +40212158: 61c8 l32i.n a12, a1, 24 +4021215a: 51d8 l32i.n a13, a1, 20 +4021215c: 41e8 l32i.n a14, a1, 16 +4021215e: 31f8 l32i.n a15, a1, 12 +40212160: 20c112 addi a1, a1, 32 +40212163: f00d ret.n +40212165: 000000 ill +40212168: 0899 s32i.n a9, a8, 0 +4021216a: b10000 sra a0, a0 +4021216d: 0008 l32i.n a0, a0, 0 +4021216f: c11200 mul16u a1, a2, a0 +40212172: 51d9e0 excw +40212175: 41e9 s32i.n a14, a1, 16 +40212177: 7109 s32i.n a0, a1, 28 +40212179: 61c9 s32i.n a12, a1, 24 +4021217b: 31f9 s32i.n a15, a1, 12 +4021217d: 02dd mov.n a13, a2 +4021217f: 03ed mov.n a14, a3 +40212181: 004256 bnez a2, 40212189 +40212184: 020c movi.n a2, 0 +40212186: 002e86 j 40212244 +40212189: 2c1326 beqi a3, 1, 402121b9 +4021218c: fff741 l32r a4, 40212168 +4021218f: f86731 l32r a3, 4021032c +40212192: 050c movi.n a5, 0 +40212194: a4a422 movi a2, 0x4a4 +40212197: bcdb01 l32r a0, 40201504 +4021219a: 0000c0 callx0 a0 +4021219d: 02cd mov.n a12, a2 +4021219f: fe1216 beqz a2, 40212184 +402121a2: 204220 or a4, a2, a2 +402121a5: fc7f21 l32r a2, 402113a4 +402121a8: a4a452 movi a5, 0x4a4 +402121ab: 001222 l16ui a2, a2, 0 +402121ae: 00a032 movi a3, 0 +402121b1: ff5b05 call0 40211764 +402121b4: 000106 j 402121bc +402121b7: c10000 mul16u a0, a0, a0 +402121ba: 1f .byte 0x1f +402121bb: 28db addi.n a2, a8, 13 +402121bd: f23c movi.n a2, 63 +402121bf: 37cc bnez.n a7, 402121c6 +402121c1: 140266 bnei a2, -1, 402121d9 +402121c4: 432c movi.n a3, 36 +402121c6: 2ccb addi.n a2, a12, 12 +402121c8: ce9d01 l32r a0, 40205c3c +402121cb: 0000c0 callx0 a0 +402121ce: 034c movi.n a3, 64 +402121d0: 202ff0 or a2, a15, a15 +402121d3: ce9a01 l32r a0, 40205c3c +402121d6: 0000c0 callx0 a0 +402121d9: a90c22 l8ui a2, a12, 169 +402121dc: 0422b6 bltui a2, 2, 402121e4 +402121df: 020c movi.n a2, 0 +402121e1: a94c22 s8i a2, a12, 169 +402121e4: 042c movi.n a4, 32 +402121e6: 10cc32 addi a3, a12, 16 +402121e9: 0d2d mov.n a2, a13 +402121eb: bb8a01 l32r a0, 40201014 <_irom0_text_start+0x4> +402121ee: 0000c0 callx0 a0 +402121f1: 40a042 movi a4, 64 +402121f4: 203ff0 or a3, a15, a15 +402121f7: 20cd22 addi a2, a13, 32 +402121fa: bb8601 l32r a0, 40201014 <_irom0_text_start+0x4> +402121fd: 0000c0 callx0 a0 +40212200: a90c22 l8ui a2, a12, 169 +40212203: aaa032 movi a3, 170 +40212206: 614d22 s8i a2, a13, 97 +40212209: 06a042 movi a4, 6 +4021220c: 803c30 add a3, a12, a3 +4021220f: 62cd22 addi a2, a13, 98 +40212212: bb8001 l32r a0, 40201014 <_irom0_text_start+0x4> +40212215: 0000c0 callx0 a0 +40212218: 04dc22 addmi a2, a12, 0x400 +4021221b: 9a0222 l8ui a2, a2, 154 +4021221e: 140c movi.n a4, 1 +40212220: 320b addi.n a3, a2, -1 +40212222: 020c movi.n a2, 0 +40212224: 832430 moveqz a2, a4, a3 +40212227: 704d22 s8i a2, a13, 112 +4021222a: 0e1e47 beq a14, a4, 4021223c +4021222d: ffcf41 l32r a4, 4021216c +40212230: f83f31 l32r a3, 4021032c +40212233: 202cc0 or a2, a12, a12 +40212236: bcb401 l32r a0, 40201508 +40212239: 0000c0 callx0 a0 +4021223c: 980c22 l8ui a2, a12, 152 +4021223f: 604d22 s8i a2, a13, 96 +40212242: 120c movi.n a2, 1 +40212244: 7108 l32i.n a0, a1, 28 +40212246: 61c8 l32i.n a12, a1, 24 +40212248: 51d8 l32i.n a13, a1, 20 +4021224a: 41e8 l32i.n a14, a1, 16 +4021224c: 31f8 l32i.n a15, a1, 12 +4021224e: 20c112 addi a1, a1, 32 +40212251: f00d ret.n + ... + +40212254 : +40212254: f0c112 addi a1, a1, -16 +40212257: 130c movi.n a3, 1 +40212259: 3109 s32i.n a0, a1, 12 +4021225b: fff145 call0 40212170 +4021225e: 3108 l32i.n a0, a1, 12 +40212260: 10c112 addi a1, a1, 16 +40212263: f00d ret.n +40212265: 000000 ill + +40212268 : +40212268: f0c112 addi a1, a1, -16 +4021226b: 030c movi.n a3, 0 +4021226d: 3109 s32i.n a0, a1, 12 +4021226f: fff005 call0 40212170 +40212272: 3108 l32i.n a0, a1, 12 +40212274: 10c112 addi a1, a1, 16 +40212277: f00d ret.n +40212279: 000000 ill +4021227c: fee274 excw +4021227f: 3f .byte 0x3f +40212280: e479 s32i.n a7, a4, 56 +40212282: fe .byte 0xfe +40212283: 3f .byte 0x3f + +40212284 : +40212284: d0c112 addi a1, a1, -48 +40212287: 81e9 s32i.n a14, a1, 32 +40212289: 71f9 s32i.n a15, a1, 28 +4021228b: 0e0c movi.n a14, 0 +4021228d: fffbf1 l32r a15, 4021227c +40212290: fffc51 l32r a5, 40212280 +40212293: a1c9 s32i.n a12, a1, 40 +40212295: b109 s32i.n a0, a1, 44 +40212297: 91d9 s32i.n a13, a1, 36 +40212299: 026d mov.n a6, a2 +4021229b: 0ecd mov.n a12, a14 +4021229d: ffa072 movi a7, 255 +402122a0: be3131 l32r a3, 40201b64 +402122a3: 03d322 addmi a2, a3, 0x300 +402122a6: 480222 l8ui a2, a2, 72 +402122a9: 60be27 bgeu a14, a2, 4021230d +402122ac: 5d5ef6 bgeui a14, 5, 4021230d +402122af: 000f22 l8ui a2, a15, 0 +402122b2: 4a1277 beq a2, a7, 40212300 +402122b5: f0dcc0 subx8 a13, a12, a12 +402122b8: a0ddc0 addx4 a13, a13, a12 +402122bb: a0dd60 addx4 a13, a13, a6 +402122be: 042c movi.n a4, 32 +402122c0: 0f3d mov.n a3, a15 +402122c2: 0d2d mov.n a2, a13 +402122c4: 1169 s32i.n a6, a1, 4 +402122c6: 2179 s32i.n a7, a1, 8 +402122c8: 0159 s32i.n a5, a1, 0 +402122ca: bb5201 l32r a0, 40201014 <_irom0_text_start+0x4> +402122cd: 0000c0 callx0 a0 +402122d0: 044c movi.n a4, 64 +402122d2: 20cf32 addi a3, a15, 32 +402122d5: 20cd22 addi a2, a13, 32 +402122d8: bb4f01 l32r a0, 40201014 <_irom0_text_start+0x4> +402122db: 0000c0 callx0 a0 +402122de: 0158 l32i.n a5, a1, 0 +402122e0: 640c movi.n a4, 6 +402122e2: 053d mov.n a3, a5 +402122e4: 62cd22 addi a2, a13, 98 +402122e7: bb4b01 l32r a0, 40201014 <_irom0_text_start+0x4> +402122ea: 0000c0 callx0 a0 +402122ed: 0158 l32i.n a5, a1, 0 +402122ef: cc1b addi.n a12, a12, 1 +402122f1: 250b addi.n a2, a5, -1 +402122f3: 000222 l8ui a2, a2, 0 +402122f6: 74c0c0 extui a12, a12, 0, 8 +402122f9: 614d22 s8i a2, a13, 97 +402122fc: 2178 l32i.n a7, a1, 8 +402122fe: 1168 l32i.n a6, a1, 4 +40212300: ee1b addi.n a14, a14, 1 +40212302: 74e0e0 extui a14, a14, 0, 8 +40212305: 64cff2 addi a15, a15, 100 +40212308: 557b addi.n a5, a5, 7 +4021230a: ffe486 j 402122a0 +4021230d: b108 l32i.n a0, a1, 44 +4021230f: 0c2d mov.n a2, a12 +40212311: 91d8 l32i.n a13, a1, 36 +40212313: a1c8 l32i.n a12, a1, 40 +40212315: 81e8 l32i.n a14, a1, 32 +40212317: 71f8 l32i.n a15, a1, 28 +40212319: 30c112 addi a1, a1, 48 +4021231c: f00d ret.n +4021231e: f40000 extui a0, a0, 0, 16 +40212321: 0008 l32i.n a0, a0, 0 + ... + +40212324 : +40212324: e0c112 addi a1, a1, -32 +40212327: 31f9 s32i.n a15, a1, 12 +40212329: 7109 s32i.n a0, a1, 28 +4021232b: 74f020 extui a15, a2, 0, 8 +4021232e: 61c9 s32i.n a12, a1, 24 +40212330: 51d9 s32i.n a13, a1, 20 +40212332: 0461e2 s32i a14, a1, 16 +40212335: ff6c45 call0 402119fc +40212338: 3f0b addi.n a3, a15, -1 +4021233a: 743030 extui a3, a3, 0, 8 +4021233d: 0453b6 bltui a3, 5, 40212345 +40212340: 020c movi.n a2, 0 +40212342: 001546 j 4021239b +40212345: fda032 movi a3, 253 +40212348: f40237 bnone a2, a3, 40212340 +4021234b: f7f8d1 l32r a13, 4021032c +4021234e: fff441 l32r a4, 40212320 +40212351: 050c movi.n a5, 0 +40212353: 0d3d mov.n a3, a13 +40212355: a4a422 movi a2, 0x4a4 +40212358: bc6b01 l32r a0, 40201504 +4021235b: 0000c0 callx0 a0 +4021235e: 02cd mov.n a12, a2 +40212360: fdc216 beqz a2, 40212340 +40212363: fc10e1 l32r a14, 402113a4 +40212366: 024d mov.n a4, a2 +40212368: 001e22 l16ui a2, a14, 0 +4021236b: 00a032 movi a3, 0 +4021236e: a4a452 movi a5, 0x4a4 +40212371: ff3f05 call0 40211764 +40212374: 01dc22 addmi a2, a12, 0x100 +40212377: 3c0232 l8ui a3, a2, 60 +4021237a: 0e13f7 beq a3, a15, 4021238c +4021237d: 3c42f2 s8i a15, a2, 60 +40212380: 001e22 l16ui a2, a14, 0 +40212383: a4a442 movi a4, 0x4a4 +40212386: 203cc0 or a3, a12, a12 +40212389: feee85 call0 40211274 +4021238c: ef9a41 l32r a4, 4020e1f4 +4021238f: 0c2d mov.n a2, a12 +40212391: 0d3d mov.n a3, a13 +40212393: bc5d01 l32r a0, 40201508 +40212396: 0000c0 callx0 a0 +40212399: 120c movi.n a2, 1 +4021239b: 7108 l32i.n a0, a1, 28 +4021239d: 61c8 l32i.n a12, a1, 24 +4021239f: 51d8 l32i.n a13, a1, 20 +402123a1: 41e8 l32i.n a14, a1, 16 +402123a3: 31f8 l32i.n a15, a1, 12 +402123a5: 20c112 addi a1, a1, 32 +402123a8: f00d ret.n +402123aa: 3a0000 excw +402123ad: 3ffe80 excw +402123b0: 000917 bnone a9, a1, 402123b4 +402123b3: 092300 excw + ... + +402123b8 : +402123b8: d0c112 addi a1, a1, -48 +402123bb: 91d9 s32i.n a13, a1, 36 +402123bd: 74d020 extui a13, a2, 0, 8 +402123c0: bde921 l32r a2, 40201b64 +402123c3: a1c9 s32i.n a12, a1, 40 +402123c5: 81e9 s32i.n a14, a1, 32 +402123c7: b109 s32i.n a0, a1, 44 +402123c9: 71f9 s32i.n a15, a1, 28 +402123cb: 03d232 addmi a3, a2, 0x300 +402123ce: 4803f2 l8ui a15, a3, 72 +402123d1: 02d222 addmi a2, a2, 0x200 +402123d4: ffaae1 l32r a14, 4021227c +402123d7: a442d2 s8i a13, a2, 164 +402123da: 0c0c movi.n a12, 0 +402123dc: 7430c0 extui a3, a12, 0, 8 +402123df: 0139 s32i.n a3, a1, 0 +402123e1: 37b3f7 bgeu a3, a15, 4021241c +402123e4: c27931 l32r a3, 40202dc8 +402123e7: 042c movi.n a4, 32 +402123e9: 0e2d mov.n a2, a14 +402123eb: be0c01 l32r a0, 40201c1c +402123ee: 0000c0 callx0 a0 +402123f1: f2dc bnez.n a2, 40212414 +402123f3: d27631 l32r a3, 40206dcc +402123f6: 044c movi.n a4, 64 +402123f8: 20ce22 addi a2, a14, 32 +402123fb: be0801 l32r a0, 40201c1c +402123fe: 0000c0 callx0 a0 +40212401: f2cc bnez.n a2, 40212414 +40212403: c27321 l32r a2, 40202dd0 +40212406: 32ca add.n a3, a2, a12 +40212408: a7a422 movi a2, 0x4a7 +4021240b: 232a add.n a2, a3, a2 +4021240d: 0042d2 s8i a13, a2, 0 +40212410: 000206 j 4021241c +40212413: cc1b00 excw +40212416: 64cee2 addi a14, a14, 100 +40212419: ffefc6 j 402123dc +4021241c: ffe421 l32r a2, 402123ac +4021241f: 000222 l8ui a2, a2, 0 +40212422: 701266 bnei a2, 1, 40212496 +40212425: f7c1d1 l32r a13, 4021032c +40212428: ffe241 l32r a4, 402123b0 +4021242b: 050c movi.n a5, 0 +4021242d: 0d3d mov.n a3, a13 +4021242f: a4a422 movi a2, 0x4a4 +40212432: bc3401 l32r a0, 40201504 +40212435: 0000c0 callx0 a0 +40212438: 02ed mov.n a14, a2 +4021243a: 058216 beqz a2, 40212496 +4021243d: fbd9d1 l32r a13, 402113a4 +40212440: 024d mov.n a4, a2 +40212442: 001d22 l16ui a2, a13, 0 +40212445: a4a452 movi a5, 0x4a4 +40212448: 030c movi.n a3, 0 +4021244a: ff3185 call0 40211764 +4021244d: fe2231 l32r a3, 40211cd8 +40212450: a4a042 movi a4, 164 +40212453: 0cce22 addi a2, a14, 12 +40212456: baef01 l32r a0, 40201014 <_irom0_text_start+0x4> +40212459: 0000c0 callx0 a0 +4021245c: 0128 l32i.n a2, a1, 0 +4021245e: 1bb2f7 bgeu a2, a15, 4021247d +40212461: c25b31 l32r a3, 40202dd0 +40212464: 74c0c0 extui a12, a12, 0, 8 +40212467: 23ca add.n a2, a3, a12 +40212469: a7a432 movi a3, 0x4a7 +4021246c: 223a add.n a2, a2, a3 +4021246e: 000232 l8ui a3, a2, 0 +40212471: 80cec0 add a12, a14, a12 +40212474: 9ba422 movi a2, 0x49b +40212477: 80cc20 add a12, a12, a2 +4021247a: 004c32 s8i a3, a12, 0 +4021247d: 001d22 l16ui a2, a13, 0 +40212480: a4a442 movi a4, 0x4a4 +40212483: 0e3d mov.n a3, a14 +40212485: fedec5 call0 40211274 +40212488: ffcb41 l32r a4, 402123b4 +4021248b: f7a831 l32r a3, 4021032c +4021248e: 0e2d mov.n a2, a14 +40212490: bc1e01 l32r a0, 40201508 +40212493: 0000c0 callx0 a0 +40212496: b108 l32i.n a0, a1, 44 +40212498: a1c8 l32i.n a12, a1, 40 +4021249a: 91d8 l32i.n a13, a1, 36 +4021249c: 81e8 l32i.n a14, a1, 32 +4021249e: 71f8 l32i.n a15, a1, 28 +402124a0: 30c112 addi a1, a1, 48 +402124a3: f00d ret.n +402124a5: 000000 ill + +402124a8 : +402124a8: f0c112 addi a1, a1, -16 +402124ab: ffc031 l32r a3, 402123ac +402124ae: 3109 s32i.n a0, a1, 12 +402124b0: 140c movi.n a4, 1 +402124b2: 004342 s8i a4, a3, 0 +402124b5: 130c movi.n a3, 1 +402124b7: ff8385 call0 40211cf0 +402124ba: 3108 l32i.n a0, a1, 12 +402124bc: 10c112 addi a1, a1, 16 +402124bf: f00d ret.n +402124c1: 000000 ill + +402124c4 : +402124c4: f0c112 addi a1, a1, -16 +402124c7: ffb931 l32r a3, 402123ac +402124ca: 3109 s32i.n a0, a1, 12 +402124cc: 040c movi.n a4, 0 +402124ce: 004342 s8i a4, a3, 0 +402124d1: 030c movi.n a3, 0 +402124d3: ff81c5 call0 40211cf0 +402124d6: 3108 l32i.n a0, a1, 12 +402124d8: 10c112 addi a1, a1, 16 +402124db: f00d ret.n +402124dd: 000000 ill + +402124e0 : +402124e0: f0c112 addi a1, a1, -16 +402124e3: 230c movi.n a3, 2 +402124e5: 020c movi.n a2, 0 +402124e7: 3109 s32i.n a0, a1, 12 +402124e9: ff8045 call0 40211cf0 +402124ec: 3108 l32i.n a0, a1, 12 +402124ee: 10c112 addi a1, a1, 16 +402124f1: f00d ret.n + ... + +402124f4 : +402124f4: bd9c21 l32r a2, 40201b64 +402124f7: ffa032 movi a3, 255 +402124fa: 03d222 addmi a2, a2, 0x300 +402124fd: 490222 l8ui a2, a2, 73 +40212500: 040c movi.n a4, 0 +40212502: c03230 sub a3, a2, a3 +40212505: 832430 moveqz a2, a4, a3 +40212508: f00d ret.n + ... + +4021250c : +4021250c: ff5c41 l32r a4, 4021227c +4021250f: 742020 extui a2, a2, 0, 8 +40212512: 030c movi.n a3, 0 +40212514: c8a052 movi a5, 200 +40212517: ffa062 movi a6, 255 +4021251a: 0fa327 bge a3, a2, 4021252d +4021251d: 445a add.n a4, a4, a5 +4021251f: c07450 sub a7, a4, a5 +40212522: 000772 l8ui a7, a7, 0 +40212525: 099767 bne a7, a6, 40212532 +40212528: 332b addi.n a3, a3, 2 +4021252a: fffb06 j 4021251a +4021252d: 051327 beq a3, a2, 40212536 +40212530: f00d ret.n +40212532: 120c movi.n a2, 1 +40212534: f00d ret.n +40212536: 020c movi.n a2, 0 +40212538: f00d ret.n + ... + +4021253c : +4021253c: e0c112 addi a1, a1, -32 +4021253f: 61c9 s32i.n a12, a1, 24 +40212541: bd88c1 l32r a12, 40201b64 +40212544: 51d9 s32i.n a13, a1, 20 +40212546: 41e9 s32i.n a14, a1, 16 +40212548: 7109 s32i.n a0, a1, 28 +4021254a: 4ce8 l32i.n a14, a12, 16 +4021254c: 02dd mov.n a13, a2 +4021254e: 0139 s32i.n a3, a1, 0 +40212550: ff4a85 call0 402119fc +40212553: fda042 movi a4, 253 +40212556: 0138 l32i.n a3, a1, 0 +40212558: 2a0247 bnone a2, a4, 40212586 +4021255b: 7eac beqz.n a14, 40212586 +4021255d: 01dcc2 addmi a12, a12, 0x100 +40212560: de0c42 l8ui a4, a12, 222 +40212563: 020c movi.n a2, 0 +40212565: 1f9427 bne a4, a2, 40212588 +40212568: d19221 l32r a2, 40206bb0 +4021256b: 040c movi.n a4, 0 +4021256d: 005242 s16i a4, a2, 0 +40212570: cee521 l32r a2, 40206104 +40212573: 140c movi.n a4, 1 +40212575: 474242 s8i a4, a2, 71 +40212578: c68b41 l32r a4, 40203fa4 +4021257b: 0d2d mov.n a2, a13 +4021257d: f71c85 call0 40209748 +40212580: 120c movi.n a2, 1 +40212582: 000086 j 40212588 +40212585: 020c00 excw +40212588: 7108 l32i.n a0, a1, 28 +4021258a: 61c8 l32i.n a12, a1, 24 +4021258c: 51d8 l32i.n a13, a1, 20 +4021258e: 41e8 l32i.n a14, a1, 16 +40212590: 20c112 addi a1, a1, 32 +40212593: f00d ret.n +40212595: 000000 ill + +40212598 : +40212598: bd7321 l32r a2, 40201b64 +4021259b: 05d222 addmi a2, a2, 0x500 +4021259e: 4c0222 l8ui a2, a2, 76 +402125a1: 013280 slli a3, a2, 24 +402125a4: 038c beqz.n a3, 402125a8 +402125a6: 120c movi.n a2, 1 +402125a8: 742020 extui a2, a2, 0, 8 +402125ab: f00d ret.n +402125ad: 000000 ill +402125b0: 000a82 l8ui a8, a10, 0 +402125b3: 0a8b00 excw +402125b6: 980000 excw +402125b9: 000a add.n a0, a0, a0 + ... + +402125bc : +402125bc: e0c112 addi a1, a1, -32 +402125bf: 51d9 s32i.n a13, a1, 20 +402125c1: f75ad1 l32r a13, 4021032c +402125c4: fffb41 l32r a4, 402125b0 +402125c7: 41e9 s32i.n a14, a1, 16 +402125c9: 050c movi.n a5, 0 +402125cb: 74e020 extui a14, a2, 0, 8 +402125ce: 0d3d mov.n a3, a13 +402125d0: a4a422 movi a2, 0x4a4 +402125d3: 61c9 s32i.n a12, a1, 24 +402125d5: 7109 s32i.n a0, a1, 28 +402125d7: 0361f2 s32i a15, a1, 12 +402125da: bbca01 l32r a0, 40201504 +402125dd: 0000c0 callx0 a0 +402125e0: 02cd mov.n a12, a2 +402125e2: 020c movi.n a2, 0 +402125e4: 6c1c27 beq a12, a2, 40212654 +402125e7: fb6ff1 l32r a15, 402113a4 +402125ea: 023d mov.n a3, a2 +402125ec: 001f22 l16ui a2, a15, 0 +402125ef: a4a452 movi a5, 0x4a4 +402125f2: 204cc0 or a4, a12, a12 +402125f5: ff16c5 call0 40211764 +402125f8: ff4005 call0 402119fc +402125fb: fda032 movi a3, 253 +402125fe: 160237 bnone a2, a3, 40212618 +40212601: 132ef6 bgeui a14, 2, 40212618 +40212604: bd5821 l32r a2, 40201b64 +40212607: 05d222 addmi a2, a2, 0x500 +4021260a: 4c0232 l8ui a3, a2, 76 +4021260d: 1c13e7 beq a3, a14, 4021262d +40212610: 4c42e2 s8i a14, a2, 76 +40212613: 000586 j 4021262d +40212616: 410000 srli a0, a0, 0 +40212619: 2dffe7 bbsi a15, 30, 4021264a +4021261c: 3d0c movi.n a13, 3 +4021261e: 010d mov.n a0, a1 +40212620: bbba add.n a11, a11, a11 +40212622: 0000c0 callx0 a0 +40212625: 020c movi.n a2, 0 +40212627: 000a46 j 40212654 +4021262a: 000000 ill +4021262d: 03dc22 addmi a2, a12, 0x300 +40212630: 400232 l8ui a3, a2, 64 +40212633: 0e13e7 beq a3, a14, 40212645 +40212636: 4042e2 s8i a14, a2, 64 +40212639: 001f22 l16ui a2, a15, 0 +4021263c: a4a442 movi a4, 0x4a4 +4021263f: 203cc0 or a3, a12, a12 +40212642: fec305 call0 40211274 +40212645: ffdc41 l32r a4, 402125b8 +40212648: 0c2d mov.n a2, a12 +4021264a: 0d3d mov.n a3, a13 +4021264c: bbaf01 l32r a0, 40201508 +4021264f: 0000c0 callx0 a0 +40212652: 120c movi.n a2, 1 +40212654: 7108 l32i.n a0, a1, 28 +40212656: 61c8 l32i.n a12, a1, 24 +40212658: 51d8 l32i.n a13, a1, 20 +4021265a: 41e8 l32i.n a14, a1, 16 +4021265c: 31f8 l32i.n a15, a1, 12 +4021265e: 20c112 addi a1, a1, 32 +40212661: f00d ret.n +40212663: 0aaf00 excw +40212666: bd0000 excw +40212669: 000a add.n a0, a0, a0 + ... + +4021266c : +4021266c: bd3e31 l32r a3, 40201b64 +4021266f: d0c112 addi a1, a1, -48 +40212672: a1c9 s32i.n a12, a1, 40 +40212674: 91d9 s32i.n a13, a1, 36 +40212676: 81e9 s32i.n a14, a1, 32 +40212678: b109 s32i.n a0, a1, 44 +4021267a: 71f9 s32i.n a15, a1, 28 +4021267c: 03d322 addmi a2, a3, 0x300 +4021267f: 480222 l8ui a2, a2, 72 +40212682: fefed1 l32r a13, 4021227c +40212685: d1d1e1 l32r a14, 40206dcc +40212688: 0129 s32i.n a2, a1, 0 +4021268a: 0c0c movi.n a12, 0 +4021268c: 0148 l32i.n a4, a1, 0 +4021268e: 74f0c0 extui a15, a12, 0, 8 +40212691: 43bf47 bgeu a15, a4, 402126d8 +40212694: c1cd31 l32r a3, 40202dc8 +40212697: 042c movi.n a4, 32 +40212699: 0d2d mov.n a2, a13 +4021269b: bd6001 l32r a0, 40201c1c +4021269e: 0000c0 callx0 a0 +402126a1: b2ec bnez.n a2, 402126d0 +402126a3: 044c movi.n a4, 64 +402126a5: 0e3d mov.n a3, a14 +402126a7: 20cd22 addi a2, a13, 32 +402126aa: bd5c01 l32r a0, 40201c1c +402126ad: 0000c0 callx0 a0 +402126b0: c2dc bnez.n a2, 402126d0 +402126b2: 1fcc22 addi a2, a12, 31 +402126b5: bd2b31 l32r a3, 40201b64 +402126b8: 1122b0 slli a2, a2, 5 +402126bb: 232a add.n a2, a3, a2 +402126bd: 10a252 movi a5, 0x210 +402126c0: ef2031 l32r a3, 4020e340 +402126c3: 042c movi.n a4, 32 +402126c5: 225a add.n a2, a2, a5 +402126c7: ba5301 l32r a0, 40201014 <_irom0_text_start+0x4> +402126ca: 0000c0 callx0 a0 +402126cd: 0001c6 j 402126d8 +402126d0: cc1b addi.n a12, a12, 1 +402126d2: 64cdd2 addi a13, a13, 100 +402126d5: ffecc6 j 4021268c +402126d8: ff3521 l32r a2, 402123ac +402126db: 000222 l8ui a2, a2, 0 +402126de: 741266 bnei a2, 1, 40212756 +402126e1: f712e1 l32r a14, 4021032c +402126e4: ffe041 l32r a4, 40212664 +402126e7: 050c movi.n a5, 0 +402126e9: 0e3d mov.n a3, a14 +402126eb: a4a422 movi a2, 0x4a4 +402126ee: bb8501 l32r a0, 40201504 +402126f1: 0000c0 callx0 a0 +402126f4: 02dd mov.n a13, a2 +402126f6: 05c216 beqz a2, 40212756 +402126f9: fb2ae1 l32r a14, 402113a4 +402126fc: 024d mov.n a4, a2 +402126fe: 001e22 l16ui a2, a14, 0 +40212701: a4a452 movi a5, 0x4a4 +40212704: 030c movi.n a3, 0 +40212706: ff05c5 call0 40211764 +40212709: fd7331 l32r a3, 40211cd8 +4021270c: a4a042 movi a4, 164 +4021270f: 0ccd22 addi a2, a13, 12 +40212712: ba4001 l32r a0, 40201014 <_irom0_text_start+0x4> +40212715: 0000c0 callx0 a0 +40212718: 0128 l32i.n a2, a1, 0 +4021271a: 1fbf27 bgeu a15, a2, 4021273d +4021271d: 7420c0 extui a2, a12, 0, 8 +40212720: bd1141 l32r a4, 40201b64 +40212723: 1fc222 addi a2, a2, 31 +40212726: 1122b0 slli a2, a2, 5 +40212729: 342a add.n a3, a4, a2 +4021272b: 10a252 movi a5, 0x210 +4021272e: 2d2a add.n a2, a13, a2 +40212730: 042c movi.n a4, 32 +40212732: 335a add.n a3, a3, a5 +40212734: 04c222 addi a2, a2, 4 +40212737: ba3701 l32r a0, 40201014 <_irom0_text_start+0x4> +4021273a: 0000c0 callx0 a0 +4021273d: 001e22 l16ui a2, a14, 0 +40212740: a4a442 movi a4, 0x4a4 +40212743: 0d3d mov.n a3, a13 +40212745: feb2c5 call0 40211274 +40212748: ffc841 l32r a4, 40212668 +4021274b: f6f831 l32r a3, 4021032c +4021274e: 0d2d mov.n a2, a13 +40212750: bb6e01 l32r a0, 40201508 +40212753: 0000c0 callx0 a0 +40212756: b108 l32i.n a0, a1, 44 +40212758: a1c8 l32i.n a12, a1, 40 +4021275a: 91d8 l32i.n a13, a1, 36 +4021275c: 81e8 l32i.n a14, a1, 32 +4021275e: 71f8 l32i.n a15, a1, 28 +40212760: 30c112 addi a1, a1, 48 +40212763: f00d ret.n +40212765: 000000 ill +40212768: 000ac5 call0 40212818 +4021276b: 0ad100 excw + ... + +40212770 : +40212770: e0c112 addi a1, a1, -32 +40212773: ff0e21 l32r a2, 402123ac +40212776: 7109 s32i.n a0, a1, 28 +40212778: 61c9 s32i.n a12, a1, 24 +4021277a: 51d9 s32i.n a13, a1, 20 +4021277c: 41e9 s32i.n a14, a1, 16 +4021277e: 31f9 s32i.n a15, a1, 12 +40212780: 000222 l8ui a2, a2, 0 +40212783: 661266 bnei a2, 1, 402127ed +40212786: f6e9d1 l32r a13, 4021032c +40212789: fff741 l32r a4, 40212768 +4021278c: 050c movi.n a5, 0 +4021278e: 0d3d mov.n a3, a13 +40212790: a4a422 movi a2, 0x4a4 +40212793: bb5c01 l32r a0, 40201504 +40212796: 0000c0 callx0 a0 +40212799: 20c220 or a12, a2, a2 +4021279c: 04d216 beqz a2, 402127ed +4021279f: fb01e1 l32r a14, 402113a4 +402127a2: 204220 or a4, a2, a2 +402127a5: 001e22 l16ui a2, a14, 0 +402127a8: a4a452 movi a5, 0x4a4 +402127ab: 00a032 movi a3, 0 +402127ae: fefb45 call0 40211764 +402127b1: aaa052 movi a5, 170 +402127b4: fc5a add.n a15, a12, a5 +402127b6: d18331 l32r a3, 40206dc4 +402127b9: 640c movi.n a4, 6 +402127bb: 202ff0 or a2, a15, a15 +402127be: bd1701 l32r a0, 40201c1c +402127c1: 0000c0 callx0 a0 +402127c4: d18031 l32r a3, 40206dc4 +402127c7: 529c beqz.n a2, 402127e0 +402127c9: 640c movi.n a4, 6 +402127cb: 202ff0 or a2, a15, a15 +402127ce: ba1101 l32r a0, 40201014 <_irom0_text_start+0x4> +402127d1: 0000c0 callx0 a0 +402127d4: 001e22 l16ui a2, a14, 0 +402127d7: a4a442 movi a4, 0x4a4 +402127da: 203cc0 or a3, a12, a12 +402127dd: fea945 call0 40211274 +402127e0: ffe341 l32r a4, 4021276c +402127e3: 0d3d mov.n a3, a13 +402127e5: 0c2d mov.n a2, a12 +402127e7: bb4801 l32r a0, 40201508 +402127ea: 0000c0 callx0 a0 +402127ed: 7108 l32i.n a0, a1, 28 +402127ef: 61c8 l32i.n a12, a1, 24 +402127f1: 51d8 l32i.n a13, a1, 20 +402127f3: 41e8 l32i.n a14, a1, 16 +402127f5: 31f8 l32i.n a15, a1, 12 +402127f7: 20c112 addi a1, a1, 32 +402127fa: f00d ret.n + +402127fc : +402127fc: f0c112 addi a1, a1, -16 +402127ff: 21c9 s32i.n a12, a1, 8 +40212801: bcd8c1 l32r a12, 40201b64 +40212804: 11d9 s32i.n a13, a1, 4 +40212806: 3109 s32i.n a0, a1, 12 +40212808: 4cd8 l32i.n a13, a12, 16 +4021280a: ff1f05 call0 402119fc +4021280d: fda032 movi a3, 253 +40212810: 540237 bnone a2, a3, 40212868 +40212813: 051d16 beqz a13, 40212868 +40212816: 01dc22 addmi a2, a12, 0x100 +40212819: de0232 l8ui a3, a2, 222 +4021281c: 00a022 movi a2, 0 +4021281f: 479327 bne a3, a2, 4021286a +40212822: 02a022 movi a2, 2 +40212825: fdbac5 call0 402103d4 +40212828: 370226 beqi a2, -1, 40212863 +4021282b: 4c28 l32i.n a2, a12, 16 +4021282d: 030c movi.n a3, 0 +4021282f: d04232 s8i a3, a2, 208 +40212832: d14232 s8i a3, a2, 209 +40212835: 862c22 l32i a2, a12, 0x218 +40212838: 221b addi.n a2, a2, 1 +4021283a: 2522b6 bltui a2, 2, 40212863 +4021283d: da4721 l32r a2, 4020915c +40212840: 0020c0 memw +40212843: 0248 l32i.n a4, a2, 0 +40212845: 0020c0 memw +40212848: 0238 l32i.n a3, a2, 0 +4021284a: f54040 extui a4, a4, 16, 16 +4021284d: 745030 extui a5, a3, 0, 8 +40212850: d97a21 l32r a2, 40208e38 +40212853: 071466 bnei a4, 1, 4021285e +40212856: d40c movi.n a4, 13 +40212858: 743030 extui a3, a3, 0, 8 +4021285b: 01b457 bgeu a4, a5, 40212860 +4021285e: 030c movi.n a3, 0 +40212860: f6c145 call0 40209478 +40212863: 120c movi.n a2, 1 +40212865: 000046 j 4021286a +40212868: 020c movi.n a2, 0 +4021286a: 3108 l32i.n a0, a1, 12 +4021286c: 21c8 l32i.n a12, a1, 8 +4021286e: 11d8 l32i.n a13, a1, 4 +40212870: 10c112 addi a1, a1, 16 +40212873: f00d ret.n +40212875: 000000 ill + +40212878 : +40212878: f0c112 addi a1, a1, -16 +4021287b: 21c9 s32i.n a12, a1, 8 +4021287d: bcb9c1 l32r a12, 40201b64 +40212880: 11d9 s32i.n a13, a1, 4 +40212882: 3109 s32i.n a0, a1, 12 +40212884: 4cd8 l32i.n a13, a12, 16 +40212886: ff1745 call0 402119fc +40212889: 024d mov.n a4, a2 +4021288b: 020c movi.n a2, 0 +4021288d: 029d27 bne a13, a2, 40212893 +40212890: 002386 j 40212922 +40212893: 01dc22 addmi a2, a12, 0x100 +40212896: de0232 l8ui a3, a2, 222 +40212899: 020c movi.n a2, 0 +4021289b: 021327 beq a3, a2, 402128a1 +4021289e: 002006 j 40212922 +402128a1: fda032 movi a3, 253 +402128a4: 088437 bany a4, a3, 402128b0 +402128a7: fbd021 l32r a2, 402117e8 +402128aa: 000222 l8ui a2, a2, 0 +402128ad: 071216 beqz a2, 40212922 +402128b0: 120c movi.n a2, 1 +402128b2: fdb205 call0 402103d4 +402128b5: 670226 beqi a2, -1, 40212920 +402128b8: 4c28 l32i.n a2, a12, 16 +402128ba: 030c movi.n a3, 0 +402128bc: d04232 s8i a3, a2, 208 +402128bf: d24232 s8i a3, a2, 210 +402128c2: d14232 s8i a3, a2, 209 +402128c5: fc6b21 l32r a2, 40211a74 +402128c8: 000222 l8ui a2, a2, 0 +402128cb: 92cc bnez.n a2, 402128d8 +402128cd: c75531 l32r a3, 40204624 +402128d0: da2321 l32r a2, 4020915c +402128d3: 0020c0 memw +402128d6: 0239 s32i.n a3, a2, 0 +402128d8: f3b045 call0 402063e0 +402128db: 042c22 l32i a2, a12, 16 +402128de: 112232 l32i a3, a2, 68 +402128e1: 00c316 beqz a3, 402128f1 +402128e4: 040c movi.n a4, 0 +402128e6: 043d mov.n a3, a4 +402128e8: 0c2d mov.n a2, a12 +402128ea: f7d645 call0 4020a650 +402128ed: 000546 j 40212906 +402128f0: c22200 excw +402128f3: b20104 excw +402128f6: 00c0c5 call0 40213504 +402128f9: 2c2200 excw +402128fc: c22204 excw +402128ff: 0118 l32i.n a1, a1, 0 +40212901: af .byte 0xaf +40212902: 00c0c5 call0 40213510 +40212905: 4c2800 excw +40212908: 342222 l32i a2, a2, 208 +4021290b: 11f297 bbsi a2, 25, 40212920 +4021290e: 0d2d mov.n a2, a13 +40212910: 020e85 call0 402149fc +40212913: 060c movi.n a6, 0 +40212915: 065d mov.n a5, a6 +40212917: 064d mov.n a4, a6 +40212919: 063d mov.n a3, a6 +4021291b: 062d mov.n a2, a6 +4021291d: 0dbe85 call0 40220508 +40212920: 120c movi.n a2, 1 +40212922: 3108 l32i.n a0, a1, 12 +40212924: 21c8 l32i.n a12, a1, 8 +40212926: 11d8 l32i.n a13, a1, 4 +40212928: 10c112 addi a1, a1, 16 +4021292b: f00d ret.n +4021292d: 000000 ill +40212930: 22f0c6 j 4021b4f7 +40212933: 40 .byte 0x40 + +40212934 : +40212934: d0c112 addi a1, a1, -48 +40212937: 91d9 s32i.n a13, a1, 36 +40212939: bc8ad1 l32r a13, 40201b64 +4021293c: a1c9 s32i.n a12, a1, 40 +4021293e: 71f9 s32i.n a15, a1, 28 +40212940: b109 s32i.n a0, a1, 44 +40212942: 0861e2 s32i a14, a1, 32 +40212945: 03ddf2 addmi a15, a13, 0x300 +40212948: 74c020 extui a12, a2, 0, 8 +4021294b: 480fe2 l8ui a14, a15, 72 +4021294e: ff0ac5 call0 402119fc +40212951: fda032 movi a3, 253 +40212954: 028237 bany a2, a3, 4021295a +40212957: 004446 j 40212a6c +4021295a: 023ce7 bltu a12, a14, 40212960 +4021295d: 0042c6 j 40212a6c +40212960: 01dd22 addmi a2, a13, 0x100 +40212963: de0232 l8ui a3, a2, 222 +40212966: 102356 bnez a3, 40212a6c +40212969: 0e2d mov.n a2, a14 +4021296b: 006132 s32i a3, a1, 0 +4021296e: ffb9c5 call0 4021250c +40212971: 0138 l32i.n a3, a1, 0 +40212973: 023ce7 bltu a12, a14, 40212979 +40212976: 003d06 j 40212a6e +40212979: 0f1216 beqz a2, 40212a6e +4021297c: 11ece0 slli a14, a12, 2 +4021297f: 2eca add.n a2, a14, a12 +40212981: 02dd52 addmi a5, a13, 0x200 +40212984: a02220 addx4 a2, a2, a2 +40212987: 50a142 movi a4, 0x150 +4021298a: a02250 addx4 a2, a2, a5 +4021298d: 224a add.n a2, a2, a4 +4021298f: 000242 l8ui a4, a2, 0 +40212992: ffa022 movi a2, 255 +40212995: 029427 bne a4, a2, 4021299b +40212998: 003486 j 40212a6e +4021299b: ffe521 l32r a2, 40212930 +4021299e: 0c3d mov.n a3, a12 +402129a0: 0159 s32i.n a5, a1, 0 +402129a2: bdaa01 l32r a0, 4020204c +402129a5: 0000c0 callx0 a0 +402129a8: 490f22 l8ui a2, a15, 73 +402129ab: 130c movi.n a3, 1 +402129ad: 0158 l32i.n a5, a1, 0 +402129af: 0292c7 bne a2, a12, 402129b5 +402129b2: 002e06 j 40212a6e +402129b5: eeca add.n a14, a14, a12 +402129b7: a0eee0 addx4 a14, a14, a14 +402129ba: 11eee0 slli a14, a14, 2 +402129bd: 2dea add.n a2, a13, a14 +402129bf: d32222 l32i a2, a2, 0x34c +402129c2: 40a132 movi a3, 0x140 +402129c5: 3e3a add.n a3, a14, a3 +402129c7: 494fc2 s8i a12, a15, 73 +402129ca: 866d22 s32i a2, a13, 0x218 +402129cd: 10a2f2 movi a15, 0x210 +402129d0: 3d3a add.n a3, a13, a3 +402129d2: c0fd21 l32r a2, 40202dc8 +402129d5: 042c movi.n a4, 32 +402129d7: 33fa add.n a3, a3, a15 +402129d9: 0159 s32i.n a5, a1, 0 +402129db: b98e01 l32r a0, 40201014 <_irom0_text_start+0x4> +402129de: 0000c0 callx0 a0 +402129e1: 60a132 movi a3, 0x160 +402129e4: 3e3a add.n a3, a14, a3 +402129e6: 3d3a add.n a3, a13, a3 +402129e8: d0f921 l32r a2, 40206dcc +402129eb: 044c movi.n a4, 64 +402129ed: 33fa add.n a3, a3, a15 +402129ef: b98901 l32r a0, 40201014 <_irom0_text_start+0x4> +402129f2: 0000c0 callx0 a0 +402129f5: 0158 l32i.n a5, a1, 0 +402129f7: 020c movi.n a2, 0 +402129f9: 1fcc32 addi a3, a12, 31 +402129fc: 834522 s8i a2, a5, 131 +402129ff: 1123b0 slli a2, a3, 5 +40212a02: 252a add.n a2, a5, a2 +40212a04: 100242 l8ui a4, a2, 16 +40212a07: ffa022 movi a2, 255 +40212a0a: 1c1427 beq a4, a2, 40212a2a +40212a0d: 1133b0 slli a3, a3, 5 +40212a10: 3d3a add.n a3, a13, a3 +40212a12: ee4b21 l32r a2, 4020e340 +40212a15: 042c movi.n a4, 32 +40212a17: 33fa add.n a3, a3, a15 +40212a19: 0159 s32i.n a5, a1, 0 +40212a1b: b97e01 l32r a0, 40201014 <_irom0_text_start+0x4> +40212a1e: 0000c0 callx0 a0 +40212a21: 020c movi.n a2, 0 +40212a23: 0158 l32i.n a5, a1, 0 +40212a25: 0000c6 j 40212a2c +40212a28: 0c0000 excw +40212a2b: 452212 l32i a1, a2, 0x114 +40212a2e: fd3142 excw +40212a31: ca21c6 j 402052bc +40212a34: c0d9 s32i.n a13, a0, 48 +40212a36: f0cc bnez.n a0, 40212a49 +40212a38: 0020c0 memw +40212a3b: 0239 s32i.n a3, a2, 0 +40212a3d: 35ca add.n a3, a5, a12 +40212a3f: 54a322 movi a2, 0x354 +40212a42: 232a add.n a2, a3, a2 +40212a44: 000222 l8ui a2, a2, 0 +40212a47: 40a332 movi a3, 0x340 +40212a4a: cc3a add.n a12, a12, a3 +40212a4c: b54522 s8i a2, a5, 181 +40212a4f: ddca add.n a13, a13, a12 +40212a51: 15a232 movi a3, 0x215 +40212a54: d0dc21 l32r a2, 40206dc4 +40212a57: 3d3a add.n a3, a13, a3 +40212a59: 640c movi.n a4, 6 +40212a5b: b96e01 l32r a0, 40201014 <_irom0_text_start+0x4> +40212a5e: 0000c0 callx0 a0 +40212a61: ffe145 call0 40212878 +40212a64: ffd945 call0 402127fc +40212a67: 130c movi.n a3, 1 +40212a69: 000046 j 40212a6e +40212a6c: 030c movi.n a3, 0 +40212a6e: b108 l32i.n a0, a1, 44 +40212a70: 032d mov.n a2, a3 +40212a72: a1c8 l32i.n a12, a1, 40 +40212a74: 91d8 l32i.n a13, a1, 36 +40212a76: 81e8 l32i.n a14, a1, 32 +40212a78: 71f8 l32i.n a15, a1, 28 +40212a7a: 30c112 addi a1, a1, 48 +40212a7d: f00d ret.n +40212a7f: 803b00 add a3, a11, a0 +40212a82: fe .byte 0xfe +40212a83: 3f .byte 0x3f + +40212a84 : +40212a84: c6e021 l32r a2, 40204604 +40212a87: f0c112 addi a1, a1, -16 +40212a8a: 0228 l32i.n a2, a2, 0 +40212a8c: 3109 s32i.n a0, a1, 12 +40212a8e: 21c9 s32i.n a12, a1, 8 +40212a90: 11d9 s32i.n a13, a1, 4 +40212a92: 01e9 s32i.n a14, a1, 0 +40212a94: 04d216 beqz a2, 40212ae5 +40212a97: 020c movi.n a2, 0 +40212a99: 01fd45 call0 40214a70 +40212a9c: 02cd mov.n a12, a2 +40212a9e: 628c beqz.n a2, 40212aa8 +40212aa0: 1278c5 call0 40225230 +40212aa3: 0c2d mov.n a2, a12 +40212aa5: 121705 call0 40224c18 +40212aa8: f621d1 l32r a13, 4021032c +40212aab: eba642 movi a4, 0x6eb +40212aae: 0d3d mov.n a3, a13 +40212ab0: c22c movi.n a2, 44 +40212ab2: bd6701 l32r a0, 40202050 +40212ab5: 0000c0 callx0 a0 +40212ab8: 02cd mov.n a12, a2 +40212aba: 72ac beqz.n a2, 40212ae5 +40212abc: 4e0c movi.n a14, 4 +40212abe: 02e9 s32i.n a14, a2, 0 +40212ac0: c30c movi.n a3, 12 +40212ac2: 22ea add.n a2, a2, a14 +40212ac4: cc5e01 l32r a0, 40205c3c +40212ac7: 0000c0 callx0 a0 +40212aca: 0c4d mov.n a4, a12 +40212acc: 0e3d mov.n a3, a14 +40212ace: 521c movi.n a2, 21 +40212ad0: c6d601 l32r a0, 40204628 +40212ad3: 0000c0 callx0 a0 +40212ad6: b28c beqz.n a2, 40212ae5 +40212ad8: f2a642 movi a4, 0x6f2 +40212adb: 0d3d mov.n a3, a13 +40212add: 0c2d mov.n a2, a12 +40212adf: ba8a01 l32r a0, 40201508 +40212ae2: 0000c0 callx0 a0 +40212ae5: ffe621 l32r a2, 40212a80 +40212ae8: 000222 l8ui a2, a2, 0 +40212aeb: 051266 bnei a2, 1, 40212af4 +40212aee: ffd885 call0 40212878 +40212af1: ffd085 call0 402127fc +40212af4: 3108 l32i.n a0, a1, 12 +40212af6: 21c8 l32i.n a12, a1, 8 +40212af8: 11d8 l32i.n a13, a1, 4 +40212afa: 01e8 l32i.n a14, a1, 0 +40212afc: 10c112 addi a1, a1, 16 +40212aff: f00d ret.n +40212b01: 000000 ill + +40212b04 : +40212b04: f0c112 addi a1, a1, -16 +40212b07: 21c9 s32i.n a12, a1, 8 +40212b09: bc16c1 l32r a12, 40201b64 +40212b0c: 11d9 s32i.n a13, a1, 4 +40212b0e: 3109 s32i.n a0, a1, 12 +40212b10: 4cd8 l32i.n a13, a12, 16 +40212b12: feee85 call0 402119fc +40212b15: fda032 movi a3, 253 +40212b18: 090237 bnone a2, a3, 40212b25 +40212b1b: 6d8c beqz.n a13, 40212b25 +40212b1d: 4c28 l32i.n a2, a12, 16 +40212b1f: d20222 l8ui a2, a2, 210 +40212b22: 000086 j 40212b28 +40212b25: ffa022 movi a2, 255 +40212b28: 3108 l32i.n a0, a1, 12 +40212b2a: 21c8 l32i.n a12, a1, 8 +40212b2c: 11d8 l32i.n a13, a1, 4 +40212b2e: 10c112 addi a1, a1, 16 +40212b31: f00d ret.n + ... + +40212b34 : +40212b34: 743020 extui a3, a2, 0, 8 +40212b37: 020c movi.n a2, 0 +40212b39: 0723f6 bgeui a3, 2, 40212b44 +40212b3c: ffd121 l32r a2, 40212a80 +40212b3f: 004232 s8i a3, a2, 0 +40212b42: 120c movi.n a2, 1 +40212b44: f00d ret.n + ... + +40212b48 : +40212b48: ffce21 l32r a2, 40212a80 +40212b4b: 000222 l8ui a2, a2, 0 +40212b4e: f00d ret.n + +40212b50 : +40212b50: f0c112 addi a1, a1, -16 +40212b53: 036102 s32i a0, a1, 12 +40212b56: feea45 call0 402119fc +40212b59: fda032 movi a3, 253 +40212b5c: 103230 and a3, a2, a3 +40212b5f: 1fa022 movi a2, 31 +40212b62: 161366 bnei a3, 1, 40212b7c +40212b65: bbff21 l32r a2, 40201b64 +40212b68: 042232 l32i a3, a2, 16 +40212b6b: f21c movi.n a2, 31 +40212b6d: b38c beqz.n a3, 40212b7c +40212b6f: 242332 l32i a3, a3, 144 +40212b72: 638c beqz.n a3, 40212b7c +40212b74: 020c movi.n a2, 0 +40212b76: 0dc945 call0 4022080c +40212b79: 742020 extui a2, a2, 0, 8 +40212b7c: 3108 l32i.n a0, a1, 12 +40212b7e: 10c112 addi a1, a1, 16 +40212b81: f00d ret.n +40212b83: dd7000 excw +40212b86: fe .byte 0xfe +40212b87: 3f .byte 0x3f +40212b88: 000b72 l8ui a7, a11, 0 +40212b8b: 0b7600 excw +40212b8e: 790000 excw +40212b91: 4022f3 excw + +40212b94 : +40212b94: d0c112 addi a1, a1, -48 +40212b97: a1c9 s32i.n a12, a1, 40 +40212b99: fffac1 l32r a12, 40212b84 +40212b9c: 91d9 s32i.n a13, a1, 36 +40212b9e: 02dd mov.n a13, a2 +40212ba0: 0c28 l32i.n a2, a12, 0 +40212ba2: 81e9 s32i.n a14, a1, 32 +40212ba4: b109 s32i.n a0, a1, 44 +40212ba6: f5e1e1 l32r a14, 4021032c +40212ba9: 00e216 beqz a2, 40212bbb +40212bac: fff741 l32r a4, 40212b88 +40212baf: 0e3d mov.n a3, a14 +40212bb1: ba5501 l32r a0, 40201508 +40212bb4: 0000c0 callx0 a0 +40212bb7: 020c movi.n a2, 0 +40212bb9: 0c29 s32i.n a2, a12, 0 +40212bbb: fff441 l32r a4, 40212b8c +40212bbe: 150c movi.n a5, 1 +40212bc0: 0e3d mov.n a3, a14 +40212bc2: 022c movi.n a2, 32 +40212bc4: ba5001 l32r a0, 40201504 +40212bc7: 0000c0 callx0 a0 +40212bca: 0c29 s32i.n a2, a12, 0 +40212bcc: 829c beqz.n a2, 40212be8 +40212bce: fff021 l32r a2, 40212b90 +40212bd1: 441c movi.n a4, 20 +40212bd3: 013d mov.n a3, a1 +40212bd5: fe4b05 call0 40211088 +40212bd8: 050d62 l8ui a6, a13, 5 +40212bdb: 040d52 l8ui a5, a13, 4 +40212bde: 030d42 l8ui a4, a13, 3 +40212be1: 0c28 l32i.n a2, a12, 0 +40212be3: 013d mov.n a3, a1 +40212be5: 024585 call0 40215040 +40212be8: b108 l32i.n a0, a1, 44 +40212bea: a1c8 l32i.n a12, a1, 40 +40212bec: 91d8 l32i.n a13, a1, 36 +40212bee: 81e8 l32i.n a14, a1, 32 +40212bf0: 30c112 addi a1, a1, 48 +40212bf3: f00d ret.n +40212bf5: 000000 ill + +40212bf8 : +40212bf8: f0c112 addi a1, a1, -16 +40212bfb: 3109 s32i.n a0, a1, 12 +40212bfd: fedfc5 call0 402119fc +40212c00: fda032 movi a3, 253 +40212c03: 103230 and a3, a2, a3 +40212c06: 020c movi.n a2, 0 +40212c08: 041366 bnei a3, 1, 40212c10 +40212c0b: ffde21 l32r a2, 40212b84 +40212c0e: 0228 l32i.n a2, a2, 0 +40212c10: 3108 l32i.n a0, a1, 12 +40212c12: 10c112 addi a1, a1, 16 +40212c15: f00d ret.n +40212c17: 804700 add a4, a7, a0 +40212c1a: fe .byte 0xfe +40212c1b: 3f .byte 0x3f +40212c1c: 000ba2 l8ui a10, a11, 0 +40212c1f: 0ba600 excw +40212c22: 880000 excw +40212c25: 002a add.n a0, a0, a2 +40212c27: 40 .byte 0x40 + +40212c28 : +40212c28: e0c112 addi a1, a1, -32 +40212c2b: 51d9 s32i.n a13, a1, 20 +40212c2d: 7109 s32i.n a0, a1, 28 +40212c2f: 61c9 s32i.n a12, a1, 24 +40212c31: 41e9 s32i.n a14, a1, 16 +40212c33: 31f9 s32i.n a15, a1, 12 +40212c35: 02dd mov.n a13, a2 +40212c37: 52cc bnez.n a2, 40212c40 +40212c39: 020c movi.n a2, 0 +40212c3b: 001b46 j 40212cac +40212c3e: 010000 slli a0, a0, 32 +40212c41: c5dc bnez.n a5, 40212c61 +40212c43: 0000c0 callx0 a0 +40212c46: 02ed mov.n a14, a2 +40212c48: 022c movi.n a2, 32 +40212c4a: eb32e7 bltu a2, a14, 40212c39 +40212c4d: fedac5 call0 402119fc +40212c50: fda032 movi a3, 253 +40212c53: 102230 and a2, a2, a3 +40212c56: df1266 bnei a2, 1, 40212c39 +40212c59: ffef21 l32r a2, 40212c18 +40212c5c: ffcac1 l32r a12, 40212b84 +40212c5f: 030c movi.n a3, 0 +40212c61: 004232 s8i a3, a2, 0 +40212c64: 002c22 l32i a2, a12, 0 +40212c67: f5b1f1 l32r a15, 4021032c +40212c6a: e28c beqz.n a2, 40212c7c +40212c6c: ffec41 l32r a4, 40212c1c +40212c6f: 203ff0 or a3, a15, a15 +40212c72: ba2501 l32r a0, 40201508 +40212c75: 0000c0 callx0 a0 +40212c78: 020c movi.n a2, 0 +40212c7a: 0c29 s32i.n a2, a12, 0 +40212c7c: ffe941 l32r a4, 40212c20 +40212c7f: 050c movi.n a5, 0 +40212c81: 0f3d mov.n a3, a15 +40212c83: 01ce22 addi a2, a14, 1 +40212c86: ba1f01 l32r a0, 40201504 +40212c89: 0000c0 callx0 a0 +40212c8c: 0c29 s32i.n a2, a12, 0 +40212c8e: fa7216 beqz a2, 40212c39 +40212c91: 020c movi.n a2, 0 +40212c93: 01ddc5 call0 40214a70 +40212c96: 02ed mov.n a14, a2 +40212c98: 0c28 l32i.n a2, a12, 0 +40212c9a: 0d3d mov.n a3, a13 +40212c9c: ffe201 l32r a0, 40212c24 +40212c9f: 0000c0 callx0 a0 +40212ca2: 120c movi.n a2, 1 +40212ca4: 4e8c beqz.n a14, 40212cac +40212ca6: 0c28 l32i.n a2, a12, 0 +40212ca8: be29 s32i.n a2, a14, 44 +40212caa: 120c movi.n a2, 1 +40212cac: 7108 l32i.n a0, a1, 28 +40212cae: 61c8 l32i.n a12, a1, 24 +40212cb0: 51d8 l32i.n a13, a1, 20 +40212cb2: 41e8 l32i.n a14, a1, 16 +40212cb4: 31f8 l32i.n a15, a1, 12 +40212cb6: 20c112 addi a1, a1, 32 +40212cb9: f00d ret.n + ... + +40212cbc : +40212cbc: e0c112 addi a1, a1, -32 +40212cbf: 51d9 s32i.n a13, a1, 20 +40212cc1: 41e9 s32i.n a14, a1, 16 +40212cc3: 7109 s32i.n a0, a1, 28 +40212cc5: 61c9 s32i.n a12, a1, 24 +40212cc7: 31f9 s32i.n a15, a1, 12 +40212cc9: 02dd mov.n a13, a2 +40212ccb: 03ed mov.n a14, a3 +40212ccd: 12bc beqz.n a2, 40212d02 +40212ccf: f3ac beqz.n a3, 40212d02 +40212cd1: 640c movi.n a4, 6 +40212cd3: b8d001 l32r a0, 40201014 <_irom0_text_start+0x4> +40212cd6: 0000c0 callx0 a0 +40212cd9: 0c0c movi.n a12, 0 +40212cdb: 2f0c movi.n a15, 2 +40212cdd: 000e22 l8ui a2, a14, 0 +40212ce0: 640c movi.n a4, 6 +40212ce2: 2032f0 or a3, a2, a15 +40212ce5: 112ce0 slli a2, a12, 2 +40212ce8: 302320 xor a2, a3, a2 +40212ceb: 004d22 s8i a2, a13, 0 +40212cee: 0e3d mov.n a3, a14 +40212cf0: 0d2d mov.n a2, a13 +40212cf2: d0b201 l32r a0, 40206fbc +40212cf5: 0000c0 callx0 a0 +40212cf8: b2cc bnez.n a2, 40212d07 +40212cfa: cc1b addi.n a12, a12, 1 +40212cfc: dddc66 bnei a12, 64, 40212cdd +40212cff: 000106 j 40212d07 +40212d02: 020c movi.n a2, 0 +40212d04: 000046 j 40212d09 +40212d07: 120c movi.n a2, 1 +40212d09: 7108 l32i.n a0, a1, 28 +40212d0b: 61c8 l32i.n a12, a1, 24 +40212d0d: 51d8 l32i.n a13, a1, 20 +40212d0f: 41e8 l32i.n a14, a1, 16 +40212d11: 31f8 l32i.n a15, a1, 12 +40212d13: 20c112 addi a1, a1, 32 +40212d16: f00d ret.n +40212d18: 0f .byte 0xf +40212d19: 000d mov.n a0, a0 +40212d1b: 0d1800 excw + ... + +40212d20 : +40212d20: d0c112 addi a1, a1, -48 +40212d23: 0129 s32i.n a2, a1, 0 +40212d25: bb8f21 l32r a2, 40201b64 +40212d28: a1c9 s32i.n a12, a1, 40 +40212d2a: 5258 l32i.n a5, a2, 20 +40212d2c: 81e9 s32i.n a14, a1, 32 +40212d2e: 71f9 s32i.n a15, a1, 28 +40212d30: b109 s32i.n a0, a1, 44 +40212d32: 91d9 s32i.n a13, a1, 36 +40212d34: 03ed mov.n a14, a3 +40212d36: 1c0c movi.n a12, 1 +40212d38: 02fd mov.n a15, a2 +40212d3a: 03df22 addmi a2, a15, 0x300 +40212d3d: 440222 l8ui a2, a2, 68 +40212d40: 221b addi.n a2, a2, 1 +40212d42: 02a2c7 bge a2, a12, 40212d48 +40212d45: 002806 j 40212de9 +40212d48: a02c50 addx4 a2, a12, a5 +40212d4b: 262232 l32i a3, a2, 152 +40212d4e: 08f316 beqz a3, 40212de1 +40212d51: 0128 l32i.n a2, a1, 0 +40212d53: 640c movi.n a4, 6 +40212d55: 016152 s32i a5, a1, 4 +40212d58: bbb101 l32r a0, 40201c1c +40212d5b: 0000c0 callx0 a0 +40212d5e: 1158 l32i.n a5, a1, 4 +40212d60: 07d256 bnez a2, 40212de1 +40212d63: a0cc50 addx4 a12, a12, a5 +40212d66: 262c22 l32i a2, a12, 152 +40212d69: 0e38 l32i.n a3, a14, 0 +40212d6b: 4a6232 s32i a3, a2, 0x128 +40212d6e: c62521 l32r a2, 40204604 +40212d71: 0228 l32i.n a2, a2, 0 +40212d73: 065216 beqz a2, 40212ddc +40212d76: f56df1 l32r a15, 4021032c +40212d79: ffe741 l32r a4, 40212d18 +40212d7c: 0f3d mov.n a3, a15 +40212d7e: c22c movi.n a2, 44 +40212d80: bcb401 l32r a0, 40202050 +40212d83: 0000c0 callx0 a0 +40212d86: 02dd mov.n a13, a2 +40212d88: 050216 beqz a2, 40212ddc +40212d8b: 970c movi.n a7, 9 +40212d8d: 624b addi.n a6, a2, 4 +40212d8f: 0279 s32i.n a7, a2, 0 +40212d91: 031c movi.n a3, 16 +40212d93: 062d mov.n a2, a6 +40212d95: 026172 s32i a7, a1, 8 +40212d98: 016162 s32i a6, a1, 4 +40212d9b: cba801 l32r a0, 40205c3c +40212d9e: 0000c0 callx0 a0 +40212da1: 262c22 l32i a2, a12, 152 +40212da4: 0138 l32i.n a3, a1, 0 +40212da6: 0d1222 l16ui a2, a2, 26 +40212da9: 640c movi.n a4, 6 +40212dab: 104d22 s8i a2, a13, 16 +40212dae: 012162 l32i a6, a1, 4 +40212db1: 202660 or a2, a6, a6 +40212db4: b89801 l32r a0, 40201014 <_irom0_text_start+0x4> +40212db7: 0000c0 callx0 a0 +40212dba: 0e28 l32i.n a2, a14, 0 +40212dbc: 0d4d mov.n a4, a13 +40212dbe: 3d29 s32i.n a2, a13, 12 +40212dc0: 2178 l32i.n a7, a1, 8 +40212dc2: 521c movi.n a2, 21 +40212dc4: 203770 or a3, a7, a7 +40212dc7: c61801 l32r a0, 40204628 +40212dca: 0000c0 callx0 a0 +40212dcd: b28c beqz.n a2, 40212ddc +40212dcf: ffd341 l32r a4, 40212d1c +40212dd2: 0f3d mov.n a3, a15 +40212dd4: 0d2d mov.n a2, a13 +40212dd6: b9cc01 l32r a0, 40201508 +40212dd9: 0000c0 callx0 a0 +40212ddc: 120c movi.n a2, 1 +40212dde: 000246 j 40212deb +40212de1: 2c1b addi.n a2, a12, 1 +40212de3: 74c020 extui a12, a2, 0, 8 +40212de6: ffd406 j 40212d3a +40212de9: 020c movi.n a2, 0 +40212deb: b108 l32i.n a0, a1, 44 +40212ded: a1c8 l32i.n a12, a1, 40 +40212def: 91d8 l32i.n a13, a1, 36 +40212df1: 81e8 l32i.n a14, a1, 32 +40212df3: 71f8 l32i.n a15, a1, 28 +40212df5: 30c112 addi a1, a1, 48 +40212df8: f00d ret.n +40212dfa: a80000 excw +40212dfd: 3ffee0 excw +40212e00: 000d36 excw + ... + +40212e04 : +40212e04: d0c112 addi a1, a1, -48 +40212e07: a1c9 s32i.n a12, a1, 40 +40212e09: bb56c1 l32r a12, 40201b64 +40212e0c: b109 s32i.n a0, a1, 44 +40212e0e: 5c28 l32i.n a2, a12, 20 +40212e10: 91d9 s32i.n a13, a1, 36 +40212e12: 81e9 s32i.n a14, a1, 32 +40212e14: 71f9 s32i.n a15, a1, 28 +40212e16: 006122 s32i a2, a1, 0 +40212e19: febe05 call0 402119fc +40212e1c: 0138 l32i.n a3, a1, 0 +40212e1e: 06b316 beqz a3, 40212e8d +40212e21: 6822b6 bltui a2, 2, 40212e8d +40212e24: 020c movi.n a2, 0 +40212e26: 616c22 s32i a2, a12, 0x184 +40212e29: fff421 l32r a2, 40212dfc +40212e2c: 1e0c movi.n a14, 1 +40212e2e: 626c22 s32i a2, a12, 0x188 +40212e31: 03dc22 addmi a2, a12, 0x300 +40212e34: 440222 l8ui a2, a2, 68 +40212e37: 221b addi.n a2, a2, 1 +40212e39: 2022e7 blt a2, a14, 40212e5d +40212e3c: 0128 l32i.n a2, a1, 0 +40212e3e: a0de20 addx4 a13, a14, a2 +40212e41: 262d22 l32i a2, a13, 152 +40212e44: d2bc beqz.n a2, 40212e85 +40212e46: 4a2222 l32i a2, a2, 0x128 +40212e49: 82bc beqz.n a2, 40212e85 +40212e4b: ffed41 l32r a4, 40212e00 +40212e4e: f53731 l32r a3, 4021032c +40212e51: 021c movi.n a2, 16 +40212e53: bc7f01 l32r a0, 40202050 +40212e56: 0000c0 callx0 a0 +40212e59: 02fd mov.n a15, a2 +40212e5b: 52cc bnez.n a2, 40212e64 +40212e5d: 612c22 l32i a2, a12, 0x184 +40212e60: 000ac6 j 40212e8f +40212e63: 2d3200 excw +40212e66: 640c26 beqi a12, -1, 40212ece +40212e69: 224b addi.n a2, a2, 4 +40212e6b: b86a01 l32r a0, 40201014 <_irom0_text_start+0x4> +40212e6e: 0000c0 callx0 a0 +40212e71: 262d22 l32i a2, a13, 152 +40212e74: 4a2222 l32i a2, a2, 0x128 +40212e77: 3f29 s32i.n a2, a15, 12 +40212e79: 020c movi.n a2, 0 +40212e7b: 0f29 s32i.n a2, a15, 0 +40212e7d: 622c22 l32i a2, a12, 0x188 +40212e80: 02f9 s32i.n a15, a2, 0 +40212e82: 626cf2 s32i a15, a12, 0x188 +40212e85: ee1b addi.n a14, a14, 1 +40212e87: 74e0e0 extui a14, a14, 0, 8 +40212e8a: ffe8c6 j 40212e31 +40212e8d: 020c movi.n a2, 0 +40212e8f: b108 l32i.n a0, a1, 44 +40212e91: a1c8 l32i.n a12, a1, 40 +40212e93: 91d8 l32i.n a13, a1, 36 +40212e95: 81e8 l32i.n a14, a1, 32 +40212e97: 71f8 l32i.n a15, a1, 28 +40212e99: 30c112 addi a1, a1, 48 +40212e9c: f00d ret.n +40212e9e: 4d0000 excw +40212ea1: 000d mov.n a0, a0 + ... + +40212ea4 : +40212ea4: f0c112 addi a1, a1, -16 +40212ea7: 21c9 s32i.n a12, a1, 8 +40212ea9: bb2ec1 l32r a12, 40201b64 +40212eac: 3109 s32i.n a0, a1, 12 +40212eae: 612c22 l32i a2, a12, 0x184 +40212eb1: b29c beqz.n a2, 40212ed0 +40212eb3: 0238 l32i.n a3, a2, 0 +40212eb5: 616c32 s32i a3, a12, 0x184 +40212eb8: 43cc bnez.n a3, 40212ec0 +40212eba: ffd031 l32r a3, 40212dfc +40212ebd: 626c32 s32i a3, a12, 0x188 +40212ec0: fff841 l32r a4, 40212ea0 +40212ec3: f51a31 l32r a3, 4021032c +40212ec6: b99001 l32r a0, 40201508 +40212ec9: 0000c0 callx0 a0 +40212ecc: fff786 j 40212eae +40212ecf: 310800 srai a0, a0, 24 +40212ed2: 21c8 l32i.n a12, a1, 8 +40212ed4: 10c112 addi a1, a1, 16 +40212ed7: f00d ret.n +40212ed9: 000000 ill + +40212edc : +40212edc: f0c112 addi a1, a1, -16 +40212edf: 21c9 s32i.n a12, a1, 8 +40212ee1: bb20c1 l32r a12, 40201b64 +40212ee4: 11d9 s32i.n a13, a1, 4 +40212ee6: 5cd8 l32i.n a13, a12, 20 +40212ee8: 3109 s32i.n a0, a1, 12 +40212eea: feb105 call0 402119fc +40212eed: 5dac beqz.n a13, 40212f16 +40212eef: 2322b6 bltui a2, 2, 40212f16 +40212ef2: 03dcc2 addmi a12, a12, 0x300 +40212ef5: 440c42 l8ui a4, a12, 68 +40212ef8: 020c movi.n a2, 0 +40212efa: 441b addi.n a4, a4, 1 +40212efc: 130c movi.n a3, 1 +40212efe: 162437 blt a4, a3, 40212f18 +40212f01: a053d0 addx4 a5, a3, a13 +40212f04: 262552 l32i a5, a5, 152 +40212f07: 358c beqz.n a5, 40212f0e +40212f09: 221b addi.n a2, a2, 1 +40212f0b: 742020 extui a2, a2, 0, 8 +40212f0e: 331b addi.n a3, a3, 1 +40212f10: 743030 extui a3, a3, 0, 8 +40212f13: fff9c6 j 40212efe +40212f16: 020c movi.n a2, 0 +40212f18: 3108 l32i.n a0, a1, 12 +40212f1a: 21c8 l32i.n a12, a1, 8 +40212f1c: 11d8 l32i.n a13, a1, 4 +40212f1e: 10c112 addi a1, a1, 16 +40212f21: f00d ret.n +40212f23: e22400 excw +40212f26: fe .byte 0xfe +40212f27: 3f .byte 0x3f + +40212f28 : +40212f28: d0c112 addi a1, a1, -48 +40212f2b: 91d9 s32i.n a13, a1, 36 +40212f2d: bb0dd1 l32r a13, 40201b64 +40212f30: a1c9 s32i.n a12, a1, 40 +40212f32: 81e9 s32i.n a14, a1, 32 +40212f34: b109 s32i.n a0, a1, 44 +40212f36: 71f9 s32i.n a15, a1, 28 +40212f38: 02ed mov.n a14, a2 +40212f3a: 5dc8 l32i.n a12, a13, 20 +40212f3c: feabc5 call0 402119fc +40212f3f: 0222f6 bgeui a2, 2, 40212f45 +40212f42: 002f06 j 40213002 +40212f45: 0b9c16 beqz a12, 40213002 +40212f48: 01ddd2 addmi a13, a13, 0x100 +40212f4b: de0d32 l8ui a3, a13, 222 +40212f4e: 020c movi.n a2, 0 +40212f50: 021327 beq a3, a2, 40212f56 +40212f53: 002b46 j 40213004 +40212f56: 262c22 l32i a2, a12, 152 +40212f59: 242cd2 l32i a13, a12, 144 +40212f5c: 246c22 s32i a2, a12, 144 +40212f5f: 043e56 bnez a14, 40212fa6 +40212f62: 1f0c movi.n a15, 1 +40212f64: 061c movi.n a6, 16 +40212f66: 48cc72 addi a7, a12, 72 +40212f69: ffee31 l32r a3, 40212f24 +40212f6c: 440322 l8ui a2, a3, 68 +40212f6f: 221b addi.n a2, a2, 1 +40212f71: 4822f7 blt a2, a15, 40212fbd +40212f74: a02fc0 addx4 a2, a15, a12 +40212f77: 262232 l32i a3, a2, 152 +40212f7a: f39c beqz.n a3, 40212f9d +40212f7c: 2328 l32i.n a2, a3, 8 +40212f7e: 1b8627 bany a6, a2, 40212f9d +40212f81: 072d mov.n a2, a7 +40212f83: 640c movi.n a4, 6 +40212f85: 0169 s32i.n a6, a1, 0 +40212f87: 1179 s32i.n a7, a1, 4 +40212f89: b82201 l32r a0, 40201014 <_irom0_text_start+0x4> +40212f8c: 0000c0 callx0 a0 +40212f8f: 240c movi.n a4, 2 +40212f91: c0a032 movi a3, 192 +40212f94: 0c2d mov.n a2, a12 +40212f96: efe405 call0 40202dd8 +40212f99: 1178 l32i.n a7, a1, 4 +40212f9b: 0168 l32i.n a6, a1, 0 +40212f9d: 5f1b addi.n a5, a15, 1 +40212f9f: 74f050 extui a15, a5, 0, 8 +40212fa2: fff0c6 j 40212f69 +40212fa5: 640c00 extui a0, a0, 12, 7 +40212fa8: 0e3d mov.n a3, a14 +40212faa: 48cc22 addi a2, a12, 72 +40212fad: b81901 l32r a0, 40201014 <_irom0_text_start+0x4> +40212fb0: 0000c0 callx0 a0 +40212fb3: 240c movi.n a4, 2 +40212fb5: c0a032 movi a3, 192 +40212fb8: 0c2d mov.n a2, a12 +40212fba: efe1c5 call0 40202dd8 +40212fbd: 246cd2 s32i a13, a12, 144 +40212fc0: 1d0c movi.n a13, 1 +40212fc2: ffd831 l32r a3, 40212f24 +40212fc5: 440322 l8ui a2, a3, 68 +40212fc8: 221b addi.n a2, a2, 1 +40212fca: 2e22d7 blt a2, a13, 40212ffc +40212fcd: a0fdc0 addx4 a15, a13, a12 +40212fd0: 262f32 l32i a3, a15, 152 +40212fd3: d39c beqz.n a3, 40212ff4 +40212fd5: 00de56 bnez a14, 40212fe6 +40212fd8: 262f32 l32i a3, a15, 152 +40212fdb: 0c2d mov.n a2, a12 +40212fdd: f710c5 call0 4020a0ec +40212fe0: 000406 j 40212ff4 +40212fe3: 000000 ill +40212fe6: 640c movi.n a4, 6 +40212fe8: 202ee0 or a2, a14, a14 +40212feb: bb0c01 l32r a0, 40201c1c +40212fee: 0000c0 callx0 a0 +40212ff1: fe3216 beqz a2, 40212fd8 +40212ff4: dd1b addi.n a13, a13, 1 +40212ff6: 74d0d0 extui a13, a13, 0, 8 +40212ff9: fff146 j 40212fc2 +40212ffc: 120c movi.n a2, 1 +40212ffe: 000086 j 40213004 +40213001: 020c00 excw +40213004: b108 l32i.n a0, a1, 44 +40213006: a1c8 l32i.n a12, a1, 40 +40213008: 91d8 l32i.n a13, a1, 36 +4021300a: 81e8 l32i.n a14, a1, 32 +4021300c: 71f8 l32i.n a15, a1, 28 +4021300e: 30c112 addi a1, a1, 48 +40213011: f00d ret.n + ... + +40213014 : +40213014: bad421 l32r a2, 40201b64 +40213017: 140c movi.n a4, 1 +40213019: 01d222 addmi a2, a2, 0x100 +4021301c: de0222 l8ui a2, a2, 222 +4021301f: fec232 addi a3, a2, -2 +40213022: 020c movi.n a2, 0 +40213024: 832430 moveqz a2, a4, a3 +40213027: f00d ret.n +40213029: 000000 ill + +4021302c : +4021302c: f0c112 addi a1, a1, -16 +4021302f: 21c9 s32i.n a12, a1, 8 +40213031: 3109 s32i.n a0, a1, 12 +40213033: 74c020 extui a12, a2, 0, 8 +40213036: fe9c45 call0 402119fc +40213039: 030c movi.n a3, 0 +4021303b: 532266 bnei a2, 2, 40213092 +4021303e: f9eb21 l32r a2, 402117ec +40213041: 000222 l8ui a2, a2, 0 +40213044: 149237 bne a2, a3, 4021305c +40213047: 130c movi.n a3, 1 +40213049: 045c16 beqz a12, 40213092 +4021304c: bac621 l32r a2, 40201b64 +4021304f: 230c movi.n a3, 2 +40213051: 01d222 addmi a2, a2, 0x100 +40213054: de4232 s8i a3, a2, 222 +40213057: 000d46 j 40213090 +4021305a: 210000 srai a0, a0, 0 +4021305d: 32cad2 addi a13, a10, 50 +40213060: 4201a0 excw +40213063: 16de02 addmi a0, a14, 0x1600 +40213066: 014c movi.n a1, 64 +40213068: 262426 beqi a4, 2, 40213092 +4021306b: 02a032 movi a3, 2 +4021306e: de4232 s8i a3, a2, 222 +40213071: 020c movi.n a2, 0 +40213073: f27dc5 call0 40205850 +40213076: 120c movi.n a2, 1 +40213078: 000446 j 4021308d +4021307b: 160000 excw +4021307e: 320114 excw +40213081: 3200a0 excw +40213084: 0cde42 addmi a4, a14, 0xc00 +40213087: 7c4512 s8i a1, a5, 124 +4021308a: 020cf2 l8ui a15, a12, 2 +4021308d: f22185 call0 402052a8 +40213090: 130c movi.n a3, 1 +40213092: 3108 l32i.n a0, a1, 12 +40213094: 032d mov.n a2, a3 +40213096: 21c8 l32i.n a12, a1, 8 +40213098: 10c112 addi a1, a1, 16 +4021309b: f00d ret.n +4021309d: 000000 ill + +402130a0 : +402130a0: 023d mov.n a3, a2 +402130a2: f27c movi.n a2, -1 +402130a4: 638c beqz.n a3, 402130ae +402130a6: baaf21 l32r a2, 40201b64 +402130a9: 5e6232 s32i a3, a2, 0x178 +402130ac: 020c movi.n a2, 0 +402130ae: f00d ret.n + +402130b0 : +402130b0: baad21 l32r a2, 40201b64 +402130b3: 030c movi.n a3, 0 +402130b5: 5e6232 s32i a3, a2, 0x178 +402130b8: f00d ret.n +402130ba: 980000 excw +402130bd: 3ffee0 excw +402130c0: e08c beqz.n a0, 402130d2 +402130c2: fe .byte 0xfe +402130c3: 3f .byte 0x3f +402130c4: fee094 excw +402130c7: 3f .byte 0x3f +402130c8: fee090 excw +402130cb: 3f .byte 0x3f +402130cc: e088 l32i.n a8, a0, 56 +402130ce: fe .byte 0xfe +402130cf: 3f .byte 0x3f +402130d0: 000df0 excw +402130d3: 0df400 excw +402130d6: f60000 excw +402130d9: 000d mov.n a0, a0 +402130db: 0dff00 excw +402130de: 000000 ill +402130e1: 0e .byte 0xe + ... + +402130e4 : +402130e4: d0c112 addi a1, a1, -48 +402130e7: 0139 s32i.n a3, a1, 0 +402130e9: 1159 s32i.n a5, a1, 4 +402130eb: 050c movi.n a5, 0 +402130ed: 91d9 s32i.n a13, a1, 36 +402130ef: 71f9 s32i.n a15, a1, 28 +402130f1: 742020 extui a2, a2, 0, 8 +402130f4: 74f040 extui a15, a4, 0, 8 +402130f7: 74d060 extui a13, a6, 0, 8 +402130fa: 140c movi.n a4, 1 +402130fc: 053d mov.n a3, a5 +402130fe: 0168 l32i.n a6, a1, 0 +40213100: 933420 movnez a3, a4, a2 +40213103: b109 s32i.n a0, a1, 44 +40213105: a1c9 s32i.n a12, a1, 40 +40213107: 81e9 s32i.n a14, a1, 32 +40213109: 743030 extui a3, a3, 0, 8 +4021310c: 934560 movnez a4, a5, a6 +4021310f: 248347 bany a3, a4, 40213137 +40213112: 215ff6 bgeui a15, 5, 40213137 +40213115: 1148 l32i.n a4, a1, 4 +40213117: 019457 bne a4, a5, 4021311c +4021311a: 93dc bnez.n a3, 40213137 +4021311c: c29c beqz.n a2, 4021313c +4021311e: 2d0b addi.n a2, a13, -1 +40213120: 742020 extui a2, a2, 0, 8 +40213123: f6a032 movi a3, 246 +40213126: 0d3327 bltu a3, a2, 40213137 +40213129: ffe7e1 l32r a14, 402130c8 +4021312c: 022f26 beqi a15, 2, 40213132 +4021312f: 003646 j 4021320c +40213132: 0e28 l32i.n a2, a14, 0 +40213134: 068216 beqz a2, 402131a0 +40213137: 020c movi.n a2, 0 +40213139: 004006 j 4021323d +4021313c: ffe3c1 l32r a12, 402130c8 +4021313f: 422f66 bnei a15, 2, 40213185 +40213142: 0c28 l32i.n a2, a12, 0 +40213144: 12ac beqz.n a2, 40213169 +40213146: 1228 l32i.n a2, a2, 4 +40213148: f479d1 l32r a13, 4021032c +4021314b: 928c beqz.n a2, 40213158 +4021314d: ffe341 l32r a4, 402130dc +40213150: 0d3d mov.n a3, a13 +40213152: b8ed01 l32r a0, 40201508 +40213155: 0000c0 callx0 a0 +40213158: 0c28 l32i.n a2, a12, 0 +4021315a: ffe141 l32r a4, 402130e0 +4021315d: 0d3d mov.n a3, a13 +4021315f: b8ea01 l32r a0, 40201508 +40213162: 0000c0 callx0 a0 +40213165: 020c movi.n a2, 0 +40213167: 0c29 s32i.n a2, a12, 0 +40213169: 3fdc bnez.n a15, 40213180 +4021316b: f9a021 l32r a2, 402117ec +4021316e: 000222 l8ui a2, a2, 0 +40213171: 0b1266 bnei a2, 1, 40213180 +40213174: c84631 l32r a3, 4020528c +40213177: 140c movi.n a4, 1 +40213179: 004342 s8i a4, a3, 0 +4021317c: 002f46 j 4021323d +4021317f: 120c00 excw +40213182: 002dc6 j 4021323d +40213185: 083ff6 bgeui a15, 3, 40213191 +40213188: ffcec1 l32r a12, 402130c0 +4021318b: b31f26 beqi a15, 1, 40213142 +4021318e: 0027c6 j 40213231 +40213191: ffccc1 l32r a12, 402130c4 +40213194: aa3f26 beqi a15, 3, 40213142 +40213197: ffc9c1 l32r a12, 402130bc +4021319a: a44f26 beqi a15, 4, 40213142 +4021319d: 002406 j 40213231 +402131a0: f463c1 l32r a12, 4021032c +402131a3: ffcb41 l32r a4, 402130d0 +402131a6: 050c movi.n a5, 0 +402131a8: 0c3d mov.n a3, a12 +402131aa: c20c movi.n a2, 12 +402131ac: b8d601 l32r a0, 40201504 +402131af: 0000c0 callx0 a0 +402131b2: 0e29 s32i.n a2, a14, 0 +402131b4: f7f216 beqz a2, 40213137 +402131b7: 0042f2 s8i a15, a2, 0 +402131ba: 0e88 l32i.n a8, a14, 0 +402131bc: ffc641 l32r a4, 402130d4 +402131bf: 0c3d mov.n a3, a12 +402131c1: 050c movi.n a5, 0 +402131c3: 0d2d mov.n a2, a13 +402131c5: 2189 s32i.n a8, a1, 8 +402131c7: b8cf01 l32r a0, 40201504 +402131ca: 0000c0 callx0 a0 +402131cd: 2188 l32i.n a8, a1, 8 +402131cf: 1829 s32i.n a2, a8, 4 +402131d1: 0e28 l32i.n a2, a14, 0 +402131d3: 1238 l32i.n a3, a2, 4 +402131d5: 00f356 bnez a3, 402131e8 +402131d8: ffc041 l32r a4, 402130d8 +402131db: 203cc0 or a3, a12, a12 +402131de: b8ca01 l32r a0, 40201508 +402131e1: 0000c0 callx0 a0 +402131e4: ffd3c6 j 40213137 +402131e7: 013800 slli a3, a8, 32 +402131ea: 340c movi.n a4, 3 +402131ec: 221b addi.n a2, a2, 1 +402131ee: b78901 l32r a0, 40201014 <_irom0_text_start+0x4> +402131f1: 0000c0 callx0 a0 +402131f4: 0e28 l32i.n a2, a14, 0 +402131f6: 1138 l32i.n a3, a1, 4 +402131f8: 1228 l32i.n a2, a2, 4 +402131fa: 0d4d mov.n a4, a13 +402131fc: b78601 l32r a0, 40201014 <_irom0_text_start+0x4> +402131ff: 0000c0 callx0 a0 +40213202: 0e28 l32i.n a2, a14, 0 +40213204: 0842d2 s8i a13, a2, 8 +40213207: ffd786 j 40213169 +4021320a: f60000 excw +4021320d: 3f .byte 0x3f +4021320e: e10c movi.n a1, 14 +40213210: ffac beqz.n a15, 40213243 +40213212: 021f66 bnei a15, 1, 40213218 +40213215: ffc646 j 40213132 +40213218: 0006c6 j 40213237 +4021321b: aae100 excw +4021321e: ff .byte 0xff +4021321f: 023f66 bnei a15, 3, 40213225 +40213222: ffc306 j 40213132 +40213225: ffa5e1 l32r a14, 402130bc +40213228: 024f66 bnei a15, 4, 4021322e +4021322b: ffc0c6 j 40213132 +4021322e: 000146 j 40213237 +40213231: ffa6c1 l32r a12, 402130cc +40213234: ffc286 j 40213142 +40213237: ffa5e1 l32r a14, 402130cc +4021323a: ffbd06 j 40213132 +4021323d: b108 l32i.n a0, a1, 44 +4021323f: a1c8 l32i.n a12, a1, 40 +40213241: 91d8 l32i.n a13, a1, 36 +40213243: 81e8 l32i.n a14, a1, 32 +40213245: 71f8 l32i.n a15, a1, 28 +40213247: 30c112 addi a1, a1, 48 +4021324a: f00d ret.n + +4021324c : +4021324c: 742020 extui a2, a2, 0, 8 +4021324f: 292226 beqi a2, 2, 4021327c +40213252: 0e32f6 bgeui a2, 3, 40213264 +40213255: b29c beqz.n a2, 40213274 +40213257: 311266 bnei a2, 1, 4021328c +4021325a: ba4221 l32r a2, 40201b64 +4021325d: 5a2222 l32i a2, a2, 0x168 +40213260: f00d ret.n +40213262: 260000 excw +40213265: 661c32 l16ui a3, a12, 204 +40213268: 212142 l32i a4, a1, 132 +4021326b: 3e .byte 0x3e +4021326c: 22ba add.n a2, a2, a11 +4021326e: 0d5d22 s16i a2, a13, 26 +40213271: 0000f0 excw +40213274: ba3c21 l32r a2, 40201b64 +40213277: 592222 l32i a2, a2, 0x164 +4021327a: f00d ret.n +4021327c: ba3a21 l32r a2, 40201b64 +4021327f: 5b2222 l32i a2, a2, 0x16c +40213282: f00d ret.n +40213284: ba3821 l32r a2, 40201b64 +40213287: 5c2222 l32i a2, a2, 0x170 +4021328a: f00d ret.n +4021328c: 020c movi.n a2, 0 +4021328e: f00d ret.n + +40213290 : +40213290: ba3521 l32r a2, 40201b64 +40213293: 05d222 addmi a2, a2, 0x500 +40213296: 142222 l32i a2, a2, 80 +40213299: f00d ret.n +4021329b: 0e3700 excw +4021329e: 3e0000 excw +402132a1: 0e .byte 0xe +402132a2: 690000 excw +402132a5: 0e .byte 0xe + ... + +402132a8 : +402132a8: d0c112 addi a1, a1, -48 +402132ab: 81e9 s32i.n a14, a1, 32 +402132ad: f41fe1 l32r a14, 4021032c +402132b0: fffb41 l32r a4, 4021329c +402132b3: 91d9 s32i.n a13, a1, 36 +402132b5: 050c movi.n a5, 0 +402132b7: 02dd mov.n a13, a2 +402132b9: 0e3d mov.n a3, a14 +402132bb: a4a422 movi a2, 0x4a4 +402132be: a1c9 s32i.n a12, a1, 40 +402132c0: b109 s32i.n a0, a1, 44 +402132c2: 71f9 s32i.n a15, a1, 28 +402132c4: b89001 l32r a0, 40201504 +402132c7: 0000c0 callx0 a0 +402132ca: 02cd mov.n a12, a2 +402132cc: 020c movi.n a2, 0 +402132ce: 029c27 bne a12, a2, 402132d4 +402132d1: 0034c6 j 402133a8 +402132d4: f834f1 l32r a15, 402113a4 +402132d7: 203220 or a3, a2, a2 +402132da: 001f22 l16ui a2, a15, 0 +402132dd: a4a452 movi a5, 0x4a4 +402132e0: 204cc0 or a4, a12, a12 +402132e3: fe4805 call0 40211764 +402132e6: 2d0b addi.n a2, a13, -1 +402132e8: 0c32f6 bgeui a2, 3, 402132f8 +402132eb: ba1e21 l32r a2, 40201b64 +402132ee: 01d232 addmi a3, a2, 0x100 +402132f1: de0332 l8ui a3, a3, 222 +402132f4: 02ed mov.n a14, a2 +402132f6: 239c beqz.n a3, 4021330c +402132f8: ffea41 l32r a4, 402132a0 +402132fb: f40c31 l32r a3, 4021032c +402132fe: 0c2d mov.n a2, a12 +40213300: b88201 l32r a0, 40201508 +40213303: 0000c0 callx0 a0 +40213306: 020c movi.n a2, 0 +40213308: 002706 j 402133a8 +4021330b: d22200 excw +4021330e: 223205 call0 40235630 <_irom0_text_end+0x4ab4> +40213311: 9d3714 excw +40213314: 1fc602 addi a0, a6, 31 +40213317: 01f900 slli a15, a9, 32 +4021331a: fe6e05 call0 402119fc +4021331d: 0158 l32i.n a5, a1, 0 +4021331f: 02fd mov.n a15, a2 +40213321: beac21 l32r a2, 40202dd4 +40213324: 0c3d mov.n a3, a12 +40213326: 1462d2 s32i a13, a2, 80 +40213329: 001522 l16ui a2, a5, 0 +4021332c: d16cd2 s32i a13, a12, 0x344 +4021332f: a4a442 movi a4, 0x4a4 +40213332: fdf405 call0 40211274 +40213335: f92d21 l32r a2, 402117ec +40213338: 000232 l8ui a3, a2, 0 +4021333b: 071366 bnei a3, 1, 40213346 +4021333e: f815c5 call0 4020b49c +40213341: 020c movi.n a2, 0 +40213343: f250c5 call0 40205850 +40213346: 0d2d mov.n a2, a13 +40213348: f28a05 call0 40205bec +4021334b: bea231 l32r a3, 40202dd4 +4021334e: 020c movi.n a2, 0 +40213350: 106322 s32i a2, a3, 64 +40213353: cd6c22 s32i a2, a12, 0x334 +40213356: 043d66 bnei a13, 3, 4021335e +40213359: 0e2d mov.n a2, a14 +4021335b: f54545 call0 402087b0 +4021335e: f92331 l32r a3, 402117ec +40213361: 000322 l8ui a2, a3, 0 +40213364: 301266 bnei a2, 1, 40213398 +40213367: fda022 movi a2, 253 +4021336a: 102f20 and a2, a15, a2 +4021336d: 051266 bnei a2, 1, 40213376 +40213370: f80b85 call0 4020b42c +40213373: ff4885 call0 402127fc +40213376: fecf22 addi a2, a15, -2 +40213379: 742020 extui a2, a2, 0, 8 +4021337c: 0922f6 bgeui a2, 2, 40213389 +4021337f: 020c movi.n a2, 0 +40213381: f1f245 call0 402052a8 +40213384: 000406 j 40213398 +40213387: 660000 excw +4021338a: 1f .byte 0x1f +4021338b: 220b addi.n a2, a2, -1 +4021338d: 2e .byte 0x2e +4021338e: 521604 excw +40213391: 222200 excw +40213394: 73c500 excw +40213397: c34115 excw +4021339a: ff .byte 0xff +4021339b: f3e431 l32r a3, 4021032c +4021339e: 0c2d mov.n a2, a12 +402133a0: b85a01 l32r a0, 40201508 +402133a3: 0000c0 callx0 a0 +402133a6: 120c movi.n a2, 1 +402133a8: b108 l32i.n a0, a1, 44 +402133aa: a1c8 l32i.n a12, a1, 40 +402133ac: 91d8 l32i.n a13, a1, 36 +402133ae: 81e8 l32i.n a14, a1, 32 +402133b0: 71f8 l32i.n a15, a1, 28 +402133b2: 30c112 addi a1, a1, 48 +402133b5: f00d ret.n + ... + +402133b8 : +402133b8: cefe21 l32r a2, 40206fb0 +402133bb: 130c movi.n a3, 1 +402133bd: 004232 s8i a3, a2, 0 +402133c0: f00d ret.n + ... + +402133c4 : +402133c4: cefb21 l32r a2, 40206fb0 +402133c7: 030c movi.n a3, 0 +402133c9: 004232 s8i a3, a2, 0 +402133cc: f00d ret.n + ... + +402133d0 : +402133d0: f0c112 addi a1, a1, -16 +402133d3: 036102 s32i a0, a1, 12 +402133d6: 00a032 movi a3, 0 +402133d9: 0532f6 bgeui a2, 3, 402133e2 +402133dc: 0be645 call0 4021f244 +402133df: 01a032 movi a3, 1 +402133e2: 3108 l32i.n a0, a1, 12 +402133e4: 032d mov.n a2, a3 +402133e6: 10c112 addi a1, a1, 16 +402133e9: f00d ret.n + ... + +402133ec : +402133ec: f0c112 addi a1, a1, -16 +402133ef: 742020 extui a2, a2, 0, 8 +402133f2: 036102 s32i a0, a1, 12 +402133f5: 0bf545 call0 4021f34c +402133f8: 032102 l32i a0, a1, 12 +402133fb: 01a022 movi a2, 1 +402133fe: 10c112 addi a1, a1, 16 +40213401: f00d ret.n + ... + +40213404 : +40213404: f0c112 addi a1, a1, -16 +40213407: 742020 extui a2, a2, 0, 8 +4021340a: 036102 s32i a0, a1, 12 +4021340d: 0bf4c5 call0 4021f35c +40213410: 032102 l32i a0, a1, 12 +40213413: 01a022 movi a2, 1 +40213416: 10c112 addi a1, a1, 16 +40213419: f00d ret.n +4021341b: 4e9000 excw +4021341e: 00 .byte 00 +4021341f: 40 .byte 0x40 + +40213420 : +40213420: f0c112 addi a1, a1, -16 +40213423: 3109 s32i.n a0, a1, 12 +40213425: 21c9 s32i.n a12, a1, 8 +40213427: 11d9 s32i.n a13, a1, 4 +40213429: 02cd mov.n a12, a2 +4021342b: 03dd mov.n a13, a3 +4021342d: fffb01 l32r a0, 4021341c +40213430: 0000c0 callx0 a0 +40213433: 0d3d mov.n a3, a13 +40213435: 0c2d mov.n a2, a12 +40213437: 0b7f05 call0 4021ec28 +4021343a: 3108 l32i.n a0, a1, 12 +4021343c: 21c8 l32i.n a12, a1, 8 +4021343e: 11d8 l32i.n a13, a1, 4 +40213440: 10c112 addi a1, a1, 16 +40213443: f00d ret.n +40213445: 000000 ill +40213448: 004ed4 excw +4021344b: 40 .byte 0x40 + +4021344c : +4021344c: f0c112 addi a1, a1, -16 +4021344f: 3109 s32i.n a0, a1, 12 +40213451: fffd01 l32r a0, 40213448 +40213454: 0000c0 callx0 a0 +40213457: 0b8045 call0 4021ec5c +4021345a: 3108 l32i.n a0, a1, 12 +4021345c: 10c112 addi a1, a1, 16 +4021345f: f00d ret.n +40213461: 000000 ill + +40213464 : +40213464: f0c112 addi a1, a1, -16 +40213467: 3109 s32i.n a0, a1, 12 +40213469: 0becc5 call0 4021f338 +4021346c: 3108 l32i.n a0, a1, 12 +4021346e: 10c112 addi a1, a1, 16 +40213471: f00d ret.n + ... + +40213474 : +40213474: f0c112 addi a1, a1, -16 +40213477: 3109 s32i.n a0, a1, 12 +40213479: 0bed85 call0 4021f354 +4021347c: 3108 l32i.n a0, a1, 12 +4021347e: 10c112 addi a1, a1, 16 +40213481: f00d ret.n + ... + +40213484 : +40213484: f0c112 addi a1, a1, -16 +40213487: 3109 s32i.n a0, a1, 12 +40213489: 0bed85 call0 4021f364 +4021348c: 3108 l32i.n a0, a1, 12 +4021348e: 10c112 addi a1, a1, 16 +40213491: f00d ret.n + ... + +40213494 : +40213494: f0c112 addi a1, a1, -16 +40213497: 036102 s32i a0, a1, 12 +4021349a: c2c601 l32r a0, 40203fb4 +4021349d: 0000c0 callx0 a0 +402134a0: 3108 l32i.n a0, a1, 12 +402134a2: 060222 l8ui a2, a2, 6 +402134a5: 10c112 addi a1, a1, 16 +402134a8: f00d ret.n + ... + +402134ac : +402134ac: f0c112 addi a1, a1, -16 +402134af: 21c9 s32i.n a12, a1, 8 +402134b1: 3109 s32i.n a0, a1, 12 +402134b3: 74c020 extui a12, a2, 0, 8 +402134b6: ee8bc5 call0 40201d74 +402134b9: 030c movi.n a3, 0 +402134bb: 3632c7 bltu a2, a12, 402134f5 +402134be: c77801 l32r a0, 402052a0 +402134c1: 0000c0 callx0 a0 +402134c4: cc0b addi.n a12, a12, -1 +402134c6: 80a022 movi a2, 128 +402134c9: 90ccc0 addx2 a12, a12, a12 +402134cc: a0cc20 addx4 a12, a12, a2 +402134cf: b9a521 l32r a2, 40201b64 +402134d2: cc2a add.n a12, a12, a2 +402134d4: 4b2232 l32i a3, a2, 0x12c +402134d7: cc4b addi.n a12, a12, 4 +402134d9: 0813c7 beq a3, a12, 402134e5 +402134dc: c76c31 l32r a3, 4020528c +402134df: 01a042 movi a4, 1 +402134e2: 004342 s8i a4, a3, 0 +402134e5: 4b62c2 s32i a12, a2, 0x12c +402134e8: c76f01 l32r a0, 402052a4 +402134eb: 0000c0 callx0 a0 +402134ee: 0c2d mov.n a2, a12 +402134f0: f28285 call0 40205d1c +402134f3: 130c movi.n a3, 1 +402134f5: 3108 l32i.n a0, a1, 12 +402134f7: 032d mov.n a2, a3 +402134f9: 21c8 l32i.n a12, a1, 8 +402134fb: 10c112 addi a1, a1, 16 +402134fe: f00d ret.n +40213500: dfa8 l32i.n a10, a15, 52 +40213502: fe .byte 0xfe +40213503: 3f .byte 0x3f + +40213504 : +40213504: f0c112 addi a1, a1, -16 +40213507: 21c9 s32i.n a12, a1, 8 +40213509: b996c1 l32r a12, 40201b64 +4021350c: 3109 s32i.n a0, a1, 12 +4021350e: 11d9 s32i.n a13, a1, 4 +40213510: 01dc22 addmi a2, a12, 0x100 +40213513: 330232 l8ui a3, a2, 51 +40213516: 340222 l8ui a2, a2, 52 +40213519: 332a add.n a3, a3, a2 +4021351b: 03dc22 addmi a2, a12, 0x300 +4021351e: 410242 l8ui a4, a2, 65 +40213521: 452437 blt a4, a3, 4021356a +40213524: 01a032 movi a3, 1 +40213527: 414232 s8i a3, a2, 65 +4021352a: fe4d05 call0 402119fc +4021352d: 082266 bnei a2, 2, 40213539 +40213530: 5c28 l32i.n a2, a12, 20 +40213532: f2cc bnez.n a2, 40213545 +40213534: 000c86 j 4021356a +40213537: 050000 extui a0, a0, 16, 1 +4021353a: fe4c movi.n a14, 79 +4021353c: f03226 beqi a2, 3, 40213530 +4021353f: 0009c6 j 4021356a +40213542: 000000 ill +40213545: c75601 l32r a0, 402052a0 +40213548: 0000c0 callx0 a0 +4021354b: 4b2c22 l32i a2, a12, 0x12c +4021354e: ffecd1 l32r a13, 40213500 +40213551: 0712d7 beq a2, a13, 4021355c +40213554: c74e21 l32r a2, 4020528c +40213557: 130c movi.n a3, 1 +40213559: 004232 s8i a3, a2, 0 +4021355c: 4b6cd2 s32i a13, a12, 0x12c +4021355f: c75101 l32r a0, 402052a4 +40213562: 0000c0 callx0 a0 +40213565: 0d2d mov.n a2, a13 +40213567: f27b45 call0 40205d1c +4021356a: 3108 l32i.n a0, a1, 12 +4021356c: 120c movi.n a2, 1 +4021356e: 21c8 l32i.n a12, a1, 8 +40213570: 11d8 l32i.n a13, a1, 4 +40213572: 10c112 addi a1, a1, 16 +40213575: f00d ret.n + ... + +40213578 : +40213578: f0c112 addi a1, a1, -16 +4021357b: 023d mov.n a3, a2 +4021357d: 3109 s32i.n a0, a1, 12 +4021357f: 020c movi.n a2, 0 +40213581: 2d1327 beq a3, a2, 402135b2 +40213584: 030342 l8ui a4, a3, 3 +40213587: 271427 beq a4, a2, 402135b2 +4021358a: 040322 l8ui a2, a3, 4 +4021358d: 12ac beqz.n a2, 402135b2 +4021358f: 442a add.n a4, a4, a2 +40213591: f50c movi.n a5, 15 +40213593: 00a022 movi a2, 0 +40213596: 182547 blt a5, a4, 402135b2 +40213599: b9d721 l32r a2, 40201cf8 +4021359c: 06a042 movi a4, 6 +4021359f: b69d01 l32r a0, 40201014 <_irom0_text_start+0x4> +402135a2: 0000c0 callx0 a0 +402135a5: c73921 l32r a2, 4020528c +402135a8: 130c movi.n a3, 1 +402135aa: 004232 s8i a3, a2, 0 +402135ad: fff545 call0 40213504 +402135b0: 120c movi.n a2, 1 +402135b2: 3108 l32i.n a0, a1, 12 +402135b4: 10c112 addi a1, a1, 16 +402135b7: f00d ret.n +402135b9: 000000 ill +402135bc: f0b8 l32i.n a11, a0, 60 +402135be: 22 .byte 0x22 +402135bf: 40 .byte 0x40 + +402135c0 : +402135c0: f0c112 addi a1, a1, -16 +402135c3: 21c9 s32i.n a12, a1, 8 +402135c5: 3109 s32i.n a0, a1, 12 +402135c7: 02cd mov.n a12, a2 +402135c9: c2cc bnez.n a2, 402135d9 +402135cb: fffc21 l32r a2, 402135bc +402135ce: ba9f01 l32r a0, 4020204c +402135d1: 0000c0 callx0 a0 +402135d4: 020c movi.n a2, 0 +402135d6: 000406 j 402135ea +402135d9: ee7205 call0 40201cfc +402135dc: 023d mov.n a3, a2 +402135de: 640c movi.n a4, 6 +402135e0: 0c2d mov.n a2, a12 +402135e2: b68c01 l32r a0, 40201014 <_irom0_text_start+0x4> +402135e5: 0000c0 callx0 a0 +402135e8: 120c movi.n a2, 1 +402135ea: 3108 l32i.n a0, a1, 12 +402135ec: 21c8 l32i.n a12, a1, 8 +402135ee: 10c112 addi a1, a1, 16 +402135f1: f00d ret.n + ... + +402135f4 : +402135f4: b95c41 l32r a4, 40201b64 +402135f7: f0c112 addi a1, a1, -16 +402135fa: 036102 s32i a0, a1, 12 +402135fd: 0261c2 s32i a12, a1, 8 +40213600: 01d442 addmi a4, a4, 0x100 +40213603: de04c2 l8ui a12, a4, 222 +40213606: 3a1c66 bnei a12, 1, 40213644 +40213609: b95741 l32r a4, 40201b68 +4021360c: 01a052 movi a5, 1 +4021360f: 0020c0 memw +40213612: 0438 l32i.n a3, a4, 0 +40213614: 205350 or a5, a3, a5 +40213617: 0020c0 memw +4021361a: 0459 s32i.n a5, a4, 0 +4021361c: 0020c0 memw +4021361f: 0438 l32i.n a3, a4, 0 +40213621: 250c movi.n a5, 2 +40213623: 205350 or a5, a3, a5 +40213626: 0020c0 memw +40213629: 0459 s32i.n a5, a4, 0 +4021362b: 0020c0 memw +4021362e: 0438 l32i.n a3, a4, 0 +40213630: 450c movi.n a5, 4 +40213632: 205350 or a5, a3, a5 +40213635: 0020c0 memw +40213638: 0459 s32i.n a5, a4, 0 +4021363a: 023d mov.n a3, a2 +4021363c: 020c movi.n a2, 0 +4021363e: 0f9ec5 call0 4022302c +40213641: 000046 j 40213646 +40213644: 0c0c movi.n a12, 0 +40213646: 3108 l32i.n a0, a1, 12 +40213648: 0c2d mov.n a2, a12 +4021364a: 21c8 l32i.n a12, a1, 8 +4021364c: 10c112 addi a1, a1, 16 +4021364f: f00d ret.n +40213651: 000000 ill + +40213654 : +40213654: f0c112 addi a1, a1, -16 +40213657: 21c9 s32i.n a12, a1, 8 +40213659: 3109 s32i.n a0, a1, 12 +4021365b: 11d9 s32i.n a13, a1, 4 +4021365d: 74c020 extui a12, a2, 0, 8 +40213660: fe3985 call0 402119fc +40213663: f86231 l32r a3, 402117ec +40213666: 000332 l8ui a3, a3, 0 +40213669: 0b8316 beqz a3, 40213725 +4021366c: 021226 beqi a2, 1, 40213672 +4021366f: 002c86 j 40213725 +40213672: b93cd1 l32r a13, 40201b64 +40213675: 01ddd2 addmi a13, a13, 0x100 +40213678: de0d22 l8ui a2, a13, 222 +4021367b: 023266 bnei a2, 3, 40213681 +4021367e: 0028c6 j 40213725 +40213681: 04cc16 beqz a12, 402136d1 +40213684: 021266 bnei a2, 1, 4021368a +40213687: 002846 j 4021372c +4021368a: ff1ec5 call0 40212878 +4021368d: c70201 l32r a0, 40205298 +40213690: 0000c0 callx0 a0 +40213693: b93521 l32r a2, 40201b68 +40213696: e37c movi.n a3, -2 +40213698: 0020c0 memw +4021369b: 0248 l32i.n a4, a2, 0 +4021369d: 103430 and a3, a4, a3 +402136a0: 0020c0 memw +402136a3: 0239 s32i.n a3, a2, 0 +402136a5: 0020c0 memw +402136a8: 0248 l32i.n a4, a2, 0 +402136aa: d37c movi.n a3, -3 +402136ac: 103430 and a3, a4, a3 +402136af: 0020c0 memw +402136b2: 0239 s32i.n a3, a2, 0 +402136b4: 0020c0 memw +402136b7: 0248 l32i.n a4, a2, 0 +402136b9: b37c movi.n a3, -5 +402136bb: 103430 and a3, a4, a3 +402136be: 0020c0 memw +402136c1: 0239 s32i.n a3, a2, 0 +402136c3: 120c movi.n a2, 1 +402136c5: de4d22 s8i a2, a13, 222 +402136c8: 102905 call0 4022395c +402136cb: 102645 call0 40223930 +402136ce: 001606 j 4021372a +402136d1: 055216 beqz a2, 4021372a +402136d4: c6f101 l32r a0, 40205298 +402136d7: 0000c0 callx0 a0 +402136da: 103a85 call0 40223a84 +402136dd: b92221 l32r a2, 40201b68 +402136e0: 01a0c2 movi a12, 1 +402136e3: 0020c0 memw +402136e6: 0238 l32i.n a3, a2, 0 +402136e8: 2033c0 or a3, a3, a12 +402136eb: 0020c0 memw +402136ee: 0239 s32i.n a3, a2, 0 +402136f0: 0020c0 memw +402136f3: 0248 l32i.n a4, a2, 0 +402136f5: 230c movi.n a3, 2 +402136f7: 203430 or a3, a4, a3 +402136fa: 0020c0 memw +402136fd: 0239 s32i.n a3, a2, 0 +402136ff: 0020c0 memw +40213702: 0248 l32i.n a4, a2, 0 +40213704: 430c movi.n a3, 4 +40213706: 203430 or a3, a4, a3 +40213709: 0020c0 memw +4021370c: 0239 s32i.n a3, a2, 0 +4021370e: df4631 l32r a3, 4020b428 +40213711: 00a022 movi a2, 0 +40213714: 0f9145 call0 4022302c +40213717: 00a022 movi a2, 0 +4021371a: de4d22 s8i a2, a13, 222 +4021371d: 102105 call0 40223930 +40213720: 0c2d mov.n a2, a12 +40213722: 000186 j 4021372c +40213725: 020c movi.n a2, 0 +40213727: 000046 j 4021372c +4021372a: 120c movi.n a2, 1 +4021372c: 3108 l32i.n a0, a1, 12 +4021372e: 21c8 l32i.n a12, a1, 8 +40213730: 11d8 l32i.n a13, a1, 4 +40213732: 10c112 addi a1, a1, 16 +40213735: f00d ret.n +40213737: dd6000 excw +4021373a: fe .byte 0xfe +4021373b: 3f .byte 0x3f + +4021373c : +4021373c: ffff31 l32r a3, 40213738 +4021373f: 0329 s32i.n a2, a3, 0 +40213741: f00d ret.n + ... + +40213744 : +40213744: f0c112 addi a1, a1, -16 +40213747: 0261c2 s32i a12, a1, 8 +4021374a: 0161d2 s32i a13, a1, 4 +4021374d: 036102 s32i a0, a1, 12 +40213750: 74d020 extui a13, a2, 0, 8 +40213753: 03cd mov.n a12, a3 +40213755: 5d2df6 bgeui a13, 2, 402137b6 +40213758: 05a316 beqz a3, 402137b6 +4021375b: 0d2d mov.n a2, a13 +4021375d: 013105 call0 40214a70 +40213760: 129c beqz.n a2, 40213775 +40213762: 390232 l8ui a3, a2, 57 +40213765: 0c6307 bbci a3, 0, 40213775 +40213768: 1238 l32i.n a3, a2, 4 +4021376a: 0c39 s32i.n a3, a12, 0 +4021376c: 2238 l32i.n a3, a2, 8 +4021376e: 3228 l32i.n a2, a2, 12 +40213770: 1c39 s32i.n a3, a12, 4 +40213772: 000806 j 40213796 +40213775: 4dec bnez.n a13, 4021379d +40213777: f09721 l32r a2, 4020f9d4 +4021377a: 000222 l8ui a2, a2, 0 +4021377d: 081266 bnei a2, 1, 40213789 +40213780: 020c movi.n a2, 0 +40213782: 0c29 s32i.n a2, a12, 0 +40213784: 1c29 s32i.n a2, a12, 4 +40213786: 000306 j 40213796 +40213789: ba2821 l32r a2, 4020202c +4021378c: 3238 l32i.n a3, a2, 12 +4021378e: 0c39 s32i.n a3, a12, 0 +40213790: 4238 l32i.n a3, a2, 16 +40213792: 5228 l32i.n a2, a2, 20 +40213794: 1c39 s32i.n a3, a12, 4 +40213796: 2c29 s32i.n a2, a12, 8 +40213798: 120c movi.n a2, 1 +4021379a: 000686 j 402137b8 +4021379d: f66d21 l32r a2, 40211154 +402137a0: 000222 l8ui a2, a2, 0 +402137a3: d91226 beqi a2, 1, 40213780 +402137a6: ba2121 l32r a2, 4020202c +402137a9: 0238 l32i.n a3, a2, 0 +402137ab: 0c39 s32i.n a3, a12, 0 +402137ad: 1238 l32i.n a3, a2, 4 +402137af: 2228 l32i.n a2, a2, 8 +402137b1: 1c39 s32i.n a3, a12, 4 +402137b3: fff7c6 j 40213796 +402137b6: 020c movi.n a2, 0 +402137b8: 3108 l32i.n a0, a1, 12 +402137ba: 21c8 l32i.n a12, a1, 8 +402137bc: 11d8 l32i.n a13, a1, 4 +402137be: 10c112 addi a1, a1, 16 +402137c1: f00d ret.n + ... + +402137c4 : +402137c4: e0c112 addi a1, a1, -32 +402137c7: 076102 s32i a0, a1, 28 +402137ca: 0661c2 s32i a12, a1, 24 +402137cd: fe22c5 call0 402119fc +402137d0: 023d mov.n a3, a2 +402137d2: 020c movi.n a2, 0 +402137d4: 3023b6 bltui a3, 2, 40213808 +402137d7: b8e321 l32r a2, 40201b64 +402137da: 01d222 addmi a2, a2, 0x100 +402137dd: de0232 l8ui a3, a2, 222 +402137e0: 020c movi.n a2, 0 +402137e2: 229327 bne a3, a2, 40213808 +402137e5: 01a022 movi a2, 1 +402137e8: 012845 call0 40214a70 +402137eb: f65ac1 l32r a12, 40211154 +402137ee: f28c beqz.n a2, 40213801 +402137f0: 000c22 l8ui a2, a12, 0 +402137f3: a2cc bnez.n a2, 40213801 +402137f5: 013d mov.n a3, a1 +402137f7: 120c movi.n a2, 1 +402137f9: fff485 call0 40213744 +402137fc: 012d mov.n a2, a1 +402137fe: 11d945 call0 40225594 +40213801: 120c movi.n a2, 1 +40213803: 004c22 s8i a2, a12, 0 +40213806: 120c movi.n a2, 1 +40213808: 7108 l32i.n a0, a1, 28 +4021380a: 61c8 l32i.n a12, a1, 24 +4021380c: 20c112 addi a1, a1, 32 +4021380f: f00d ret.n +40213811: 000000 ill + +40213814 : +40213814: e0c112 addi a1, a1, -32 +40213817: 0661c2 s32i a12, a1, 24 +4021381a: 076102 s32i a0, a1, 28 +4021381d: 74c020 extui a12, a2, 0, 8 +40213820: 010316 beqz a3, 40213834 +40213823: 0d2cf6 bgeui a12, 2, 40213834 +40213826: 0c2d mov.n a2, a12 +40213828: 0139 s32i.n a3, a1, 0 +4021382a: 012445 call0 40214a70 +4021382d: 0138 l32i.n a3, a1, 0 +4021382f: 1cec bnez.n a12, 40213854 +40213831: 000106 j 40213839 +40213834: 040c movi.n a4, 0 +40213836: 001206 j 40213882 +40213839: f06641 l32r a4, 4020f9d4 +4021383c: 000442 l8ui a4, a4, 0 +4021383f: f11426 beqi a4, 1, 40213834 +40213842: 0358 l32i.n a5, a3, 0 +40213844: b9fa41 l32r a4, 4020202c +40213847: 3459 s32i.n a5, a4, 12 +40213849: 1358 l32i.n a5, a3, 4 +4021384b: 4459 s32i.n a5, a4, 16 +4021384d: 2358 l32i.n a5, a3, 8 +4021384f: 5459 s32i.n a5, a4, 20 +40213851: 000686 j 4021386f +40213854: f64041 l32r a4, 40211154 +40213857: 000442 l8ui a4, a4, 0 +4021385a: d61426 beqi a4, 1, 40213834 +4021385d: 002352 l32i a5, a3, 0 +40213860: b9f341 l32r a4, 4020202c +40213863: 006452 s32i a5, a4, 0 +40213866: 012352 l32i a5, a3, 4 +40213869: 1459 s32i.n a5, a4, 4 +4021386b: 2358 l32i.n a5, a3, 8 +4021386d: 2459 s32i.n a5, a4, 8 +4021386f: 140c movi.n a4, 1 +40213871: d28c beqz.n a2, 40213882 +40213873: 390252 l8ui a5, a2, 57 +40213876: 086507 bbci a5, 0, 40213882 +40213879: 434b addi.n a4, a3, 4 +4021387b: 538b addi.n a5, a3, 8 +4021387d: 152c05 call0 40228b40 +40213880: 140c movi.n a4, 1 +40213882: 7108 l32i.n a0, a1, 28 +40213884: 042d mov.n a2, a4 +40213886: 61c8 l32i.n a12, a1, 24 +40213888: 20c112 addi a1, a1, 32 +4021388b: f00d ret.n +4021388d: 000000 ill + +40213890 : +40213890: f0c112 addi a1, a1, -16 +40213893: 21c9 s32i.n a12, a1, 8 +40213895: 11d9 s32i.n a13, a1, 4 +40213897: 3109 s32i.n a0, a1, 12 +40213899: 74d020 extui a13, a2, 0, 8 +4021389c: 03cd mov.n a12, a3 +4021389e: 232df6 bgeui a13, 2, 402138c5 +402138a1: 03ac beqz.n a3, 402138c5 +402138a3: 0d2d mov.n a2, a13 +402138a5: 011c85 call0 40214a70 +402138a8: 640c movi.n a4, 6 +402138aa: 33c232 addi a3, a2, 51 +402138ad: 72cc bnez.n a2, 402138b8 +402138af: c67431 l32r a3, 40205280 +402138b2: 002d56 bnez a13, 402138b8 +402138b5: dedc31 l32r a3, 4020b428 +402138b8: 0c2d mov.n a2, a12 +402138ba: b5d601 l32r a0, 40201014 <_irom0_text_start+0x4> +402138bd: 0000c0 callx0 a0 +402138c0: 120c movi.n a2, 1 +402138c2: 000046 j 402138c7 +402138c5: 020c movi.n a2, 0 +402138c7: 3108 l32i.n a0, a1, 12 +402138c9: 21c8 l32i.n a12, a1, 8 +402138cb: 11d8 l32i.n a13, a1, 4 +402138cd: 10c112 addi a1, a1, 16 +402138d0: f00d ret.n +402138d2: e00000 subx4 a0, a0, a0 +402138d5: 3ffee1 l32r a14, 401e38d0 <_lit4_end+0xdd5a4> + +402138d8 : +402138d8: d0c112 addi a1, a1, -48 +402138db: 14c132 addi a3, a1, 20 +402138de: 120c movi.n a2, 1 +402138e0: a1c9 s32i.n a12, a1, 40 +402138e2: b109 s32i.n a0, a1, 44 +402138e4: fffa85 call0 40213890 +402138e7: b89fc1 l32r a12, 40201b64 +402138ea: af2c22 l32i a2, a12, 0x2bc +402138ed: 0b0226 beqi a2, -1, 402138fc +402138f0: 02dc22 addmi a2, a12, 0x200 +402138f3: c00232 l8ui a3, a2, 192 +402138f6: ffa022 movi a2, 255 +402138f9: 2c9327 bne a3, a2, 40213929 +402138fc: fca521 l32r a2, 40212b90 +402138ff: 441c movi.n a4, 20 +40213901: 203110 or a3, a1, a1 +40213904: fd7805 call0 40211088 +40213907: fff321 l32r a2, 402138d4 +4021390a: 24a032 movi a3, 36 +4021390d: c8cb01 l32r a0, 40205c3c +40213910: 0000c0 callx0 a0 +40213913: 190162 l8ui a6, a1, 25 +40213916: 180152 l8ui a5, a1, 24 +40213919: 170142 l8ui a4, a1, 23 +4021391c: be8d21 l32r a2, 40203350 +4021391f: 013d mov.n a3, a1 +40213921: 0171c5 call0 40215040 +40213924: a20c movi.n a2, 10 +40213926: af6c22 s32i a2, a12, 0x2bc +40213929: b108 l32i.n a0, a1, 44 +4021392b: 120c movi.n a2, 1 +4021392d: a1c8 l32i.n a12, a1, 40 +4021392f: 30c112 addi a1, a1, 48 +40213932: f00d ret.n +40213934: d0c112 addi a1, a1, -48 +40213937: 91d9 s32i.n a13, a1, 36 +40213939: 02dd mov.n a13, a2 +4021393b: b4a022 movi a2, 180 +4021393e: 2149 s32i.n a4, a1, 8 +40213940: 2d2a add.n a2, a13, a2 +40213942: 042c movi.n a4, 32 +40213944: a1c9 s32i.n a12, a1, 40 +40213946: 71f9 s32i.n a15, a1, 28 +40213948: 03cd mov.n a12, a3 +4021394a: 0b6102 s32i a0, a1, 44 +4021394d: 81e9 s32i.n a14, a1, 32 +4021394f: 006122 s32i a2, a1, 0 +40213952: b8b201 l32r a0, 40201c1c +40213955: 0000c0 callx0 a0 +40213958: 20ccf2 addi a15, a12, 32 +4021395b: 628c beqz.n a2, 40213965 +4021395d: 1e0c movi.n a14, 1 +4021395f: 001946 j 402139c8 +40213962: 000000 ill +40213965: d4a022 movi a2, 212 +40213968: 044c movi.n a4, 64 +4021396a: 0f3d mov.n a3, a15 +4021396c: 2d2a add.n a2, a13, a2 +4021396e: b8ab01 l32r a0, 40201c1c +40213971: 0000c0 callx0 a0 +40213974: fe5256 bnez a2, 4021395d +40213977: 01dd22 addmi a2, a13, 0x100 +4021397a: 360242 l8ui a4, a2, 54 +4021397d: 192c32 l32i a3, a12, 100 +40213980: 181437 beq a4, a3, 4021399c +40213983: 0e0c movi.n a14, 0 +40213985: 3f94e7 bne a4, a14, 402139c8 +40213988: fec332 addi a3, a3, -2 +4021398b: 01a0e2 movi a14, 1 +4021398e: 0233b6 bltui a3, 3, 40213994 +40213991: 00a0e2 movi a14, 0 +40213994: 74e0e0 extui a14, a14, 0, 8 +40213997: 000b46 j 402139c8 +4021399a: 420000 excw +4021399d: 323502 excw +402139a0: 610c movi.n a1, 6 +402139a2: 209437 bne a4, a3, 402139c6 +402139a5: 380242 l8ui a4, a2, 56 +402139a8: 690c32 l8ui a3, a12, 105 +402139ab: 179437 bne a4, a3, 402139c6 +402139ae: 370232 l8ui a3, a2, 55 +402139b1: 680c22 l8ui a2, a12, 104 +402139b4: 0e9327 bne a3, a2, 402139c6 +402139b7: 03dd22 addmi a2, a13, 0x300 +402139ba: 361232 l16ui a3, a2, 108 +402139bd: 351c22 l16ui a2, a12, 106 +402139c0: 029327 bne a3, a2, 402139c6 +402139c3: 006046 j 40213b48 +402139c6: 0e0c movi.n a14, 0 +402139c8: 192c22 l32i a2, a12, 100 +402139cb: 0e22f6 bgeui a2, 2, 402139dd +402139ce: 001c32 l16ui a3, a12, 0 +402139d1: b98621 l32r a2, 40201fec +402139d4: 389327 bne a3, a2, 40213a10 +402139d7: fff005 call0 402138d8 +402139da: 001686 j 40213a38 +402139dd: 0f2d mov.n a2, a15 +402139df: c27401 l32r a0, 402043b0 +402139e2: 0000c0 callx0 a0 +402139e5: 0482e6 bgei a2, 8, 402139ed +402139e8: 020c movi.n a2, 0 +402139ea: 005706 j 40213b4a +402139ed: 202ff0 or a2, a15, a15 +402139f0: c27001 l32r a0, 402043b0 +402139f3: 0000c0 callx0 a0 +402139f6: 3fa032 movi a3, 63 +402139f9: d1a327 bge a3, a2, 402139ce +402139fc: 15a132 movi a3, 0x115 +402139ff: 20a042 movi a4, 32 +40213a02: 3d3a add.n a3, a13, a3 +40213a04: 0f2d mov.n a2, a15 +40213a06: fa13c5 call0 4020db44 +40213a09: db0226 beqi a2, -1, 402139e8 +40213a0c: ffef86 j 402139ce +40213a0f: 0c2200 excw +40213a12: 92cc60 excw +40213a15: 0c2d mov.n a2, a12 +40213a17: c26601 l32r a0, 402043b0 +40213a1a: 0000c0 callx0 a0 +40213a1d: 742020 extui a2, a2, 0, 8 +40213a20: 032c movi.n a3, 32 +40213a22: 023327 bltu a3, a2, 40213a28 +40213a25: 203220 or a3, a2, a2 +40213a28: 0128 l32i.n a2, a1, 0 +40213a2a: 2c6d32 s32i a3, a13, 176 +40213a2d: 042c movi.n a4, 32 +40213a2f: 203cc0 or a3, a12, a12 +40213a32: b57801 l32r a0, 40201014 <_irom0_text_start+0x4> +40213a35: 0000c0 callx0 a0 +40213a38: d4a022 movi a2, 212 +40213a3b: 2d2a add.n a2, a13, a2 +40213a3d: 0f3d mov.n a3, a15 +40213a3f: 044c movi.n a4, 64 +40213a41: 1129 s32i.n a2, a1, 4 +40213a43: b57401 l32r a0, 40201014 <_irom0_text_start+0x4> +40213a46: 0000c0 callx0 a0 +40213a49: 020c movi.n a2, 0 +40213a4b: 01ddf2 addmi a15, a13, 0x100 +40213a4e: 144f22 s8i a2, a15, 20 +40213a51: 192c22 l32i a2, a12, 100 +40213a54: 0262f6 bgeui a2, 6, 40213a5a +40213a57: 011266 bnei a2, 1, 40213a5c +40213a5a: 020c movi.n a2, 0 +40213a5c: 364f22 s8i a2, a15, 54 +40213a5f: 610c22 l8ui a2, a12, 97 +40213a62: ee3405 call0 40201da4 +40213a65: 62cc bnez.n a2, 40213a6f +40213a67: ee3285 call0 40201d90 +40213a6a: 000106 j 40213a72 +40213a6d: 220000 excw +40213a70: 610c movi.n a1, 6 +40213a72: 354f22 s8i a2, a15, 53 +40213a75: 680c22 l8ui a2, a12, 104 +40213a78: 0122b6 bltui a2, 2, 40213a7d +40213a7b: 020c movi.n a2, 0 +40213a7d: 374f22 s8i a2, a15, 55 +40213a80: 690c22 l8ui a2, a12, 105 +40213a83: 08a032 movi a3, 8 +40213a86: 02b327 bgeu a3, a2, 40213a8c +40213a89: 08a022 movi a2, 8 +40213a8c: 384f22 s8i a2, a15, 56 +40213a8f: 351c52 l16ui a5, a12, 106 +40213a92: dc1641 l32r a4, 4020aaec +40213a95: 9cc532 addi a3, a5, -100 +40213a98: f43030 extui a3, a3, 0, 16 +40213a9b: f44040 extui a4, a4, 0, 16 +40213a9e: 03dd22 addmi a2, a13, 0x300 +40213aa1: 08b437 bgeu a4, a3, 40213aad +40213aa4: 64a032 movi a3, 100 +40213aa7: 365232 s16i a3, a2, 108 +40213aaa: 000086 j 40213ab0 +40213aad: 365252 s16i a5, a2, 108 +40213ab0: 022132 l32i a3, a1, 8 +40213ab3: 01a356 bnez a3, 40213ad1 +40213ab6: 361222 l16ui a2, a2, 108 +40213ab9: 64a032 movi a3, 100 +40213abc: b90401 l32r a0, 40201ecc +40213abf: 0000c0 callx0 a0 +40213ac2: f42020 extui a2, a2, 0, 16 +40213ac5: a02220 addx4 a2, a2, a2 +40213ac8: a02220 addx4 a2, a2, a2 +40213acb: 112240 slli a2, a2, 12 +40213ace: 0f4985 call0 40222f68 +40213ad1: 192c22 l32i a2, a12, 100 +40213ad4: 3222b6 bltui a2, 2, 40213b0a +40213ad7: 1128 l32i.n a2, a1, 4 +40213ad9: c23501 l32r a0, 402043b0 +40213adc: 0000c0 callx0 a0 +40213adf: f33c movi.n a3, 63 +40213ae1: 252327 blt a3, a2, 40213b0a +40213ae4: 226e07 bbci a14, 0, 40213b0a +40213ae7: fd1a85 call0 40210c90 +40213aea: 0cedc5 call0 402209c8 +40213aed: c12c51 l32r a5, 40203fa0 +40213af0: 2c2d42 l32i a4, a13, 176 +40213af3: 0138 l32i.n a3, a1, 0 +40213af5: 15a162 movi a6, 0x115 +40213af8: 1128 l32i.n a2, a1, 4 +40213afa: 072c movi.n a7, 32 +40213afc: 6d6a add.n a6, a13, a6 +40213afe: ea1101 l32r a0, 4020e344 +40213b01: 0000c0 callx0 a0 +40213b04: 0cee85 call0 402209f0 +40213b07: fd1b85 call0 40210cc0 +40213b0a: 2128 l32i.n a2, a1, 8 +40213b0c: 101266 bnei a2, 1, 40213b20 +40213b0f: f62521 l32r a2, 402113a4 +40213b12: a4a442 movi a4, 0x4a4 +40213b15: 001222 l16ui a2, a2, 0 +40213b18: 0d3d mov.n a3, a13 +40213b1a: fd7585 call0 40211274 +40213b1d: 0009c6 j 40213b48 +40213b20: 022132 l32i a3, a1, 8 +40213b23: 021356 bnez a3, 40213b48 +40213b26: b80f21 l32r a2, 40201b64 +40213b29: 5238 l32i.n a3, a2, 20 +40213b2b: 939c beqz.n a3, 40213b48 +40213b2d: 01d222 addmi a2, a2, 0x100 +40213b30: de0222 l8ui a2, a2, 222 +40213b33: 92cc bnez.n a2, 40213b40 +40213b35: f1d185 call0 40205850 +40213b38: 020c movi.n a2, 0 +40213b3a: f176c5 call0 402052a8 +40213b3d: 0001c6 j 40213b48 +40213b40: c5d321 l32r a2, 4020528c +40213b43: 130c movi.n a3, 1 +40213b45: 004232 s8i a3, a2, 0 +40213b48: 120c movi.n a2, 1 +40213b4a: b108 l32i.n a0, a1, 44 +40213b4c: a1c8 l32i.n a12, a1, 40 +40213b4e: 91d8 l32i.n a13, a1, 36 +40213b50: 81e8 l32i.n a14, a1, 32 +40213b52: 71f8 l32i.n a15, a1, 28 +40213b54: 30c112 addi a1, a1, 48 +40213b57: f00d ret.n +40213b59: 000000 ill +40213b5c: fe8c10 excw +40213b5f: 3f .byte 0x3f +40213b60: 8c0c movi.n a12, 8 +40213b62: fe .byte 0xfe +40213b63: 3f .byte 0x3f +40213b64: 000ce6 bgei a12, -1, 40213b68 +40213b67: 0ced00 excw +40213b6a: 120000 excw +40213b6d: c9f0c1 l32r a12, 40206330 +40213b70: 02cd21 l32r a2, 401d46a4 <_lit4_end+0xce378> +40213b73: 11d9 s32i.n a13, a1, 4 +40213b75: 3109 s32i.n a0, a1, 12 +40213b77: 0061e2 s32i a14, a1, 0 +40213b7a: 20d330 or a13, a3, a3 +40213b7d: fde7c5 call0 402119fc +40213b80: dc8c beqz.n a12, 40213b91 +40213b82: 0b22b6 bltui a2, 2, 40213b91 +40213b85: b7f721 l32r a2, 40201b64 +40213b88: 01d222 addmi a2, a2, 0x100 +40213b8b: de0222 l8ui a2, a2, 222 +40213b8e: 041266 bnei a2, 1, 40213b96 +40213b91: 020c movi.n a2, 0 +40213b93: 001c46 j 40213c08 +40213b96: 620c movi.n a2, 6 +40213b98: fc8385 call0 402103d4 +40213b9b: 1a0266 bnei a2, -1, 40213bb9 +40213b9e: ffef21 l32r a2, 40213b5c +40213ba1: 6ca042 movi a4, 108 +40213ba4: 0c3d mov.n a3, a12 +40213ba6: b51b01 l32r a0, 40201014 <_irom0_text_start+0x4> +40213ba9: 0000c0 callx0 a0 +40213bac: ffed21 l32r a2, 40213b60 +40213baf: 0042d2 s8i a13, a2, 0 +40213bb2: 120c movi.n a2, 1 +40213bb4: 001406 j 40213c08 +40213bb7: 660000 excw +40213bba: 401d excw +40213bbc: f1dce1 l32r a14, 4021032c +40213bbf: ffe941 l32r a4, 40213b64 +40213bc2: 050c movi.n a5, 0 +40213bc4: 203ee0 or a3, a14, a14 +40213bc7: a4a422 movi a2, 0x4a4 +40213bca: b64e01 l32r a0, 40201504 +40213bcd: 0000c0 callx0 a0 +40213bd0: 02dd mov.n a13, a2 +40213bd2: fbb216 beqz a2, 40213b91 +40213bd5: 024d mov.n a4, a2 +40213bd7: f5f321 l32r a2, 402113a4 +40213bda: a4a452 movi a5, 0x4a4 +40213bdd: 001222 l16ui a2, a2, 0 +40213be0: 00a032 movi a3, 0 +40213be3: fdb805 call0 40211764 +40213be6: 140c movi.n a4, 1 +40213be8: 0c3d mov.n a3, a12 +40213bea: 202dd0 or a2, a13, a13 +40213bed: ffd445 call0 40213934 +40213bf0: ffde41 l32r a4, 40213b68 +40213bf3: 0e3d mov.n a3, a14 +40213bf5: 0d2d mov.n a2, a13 +40213bf7: b64401 l32r a0, 40201508 +40213bfa: 0000c0 callx0 a0 +40213bfd: d48e21 l32r a2, 40208e38 +40213c00: 040c movi.n a4, 0 +40213c02: 203cc0 or a3, a12, a12 +40213c05: ffd2c5 call0 40213934 +40213c08: 3108 l32i.n a0, a1, 12 +40213c0a: 21c8 l32i.n a12, a1, 8 +40213c0c: 11d8 l32i.n a13, a1, 4 +40213c0e: 01e8 l32i.n a14, a1, 0 +40213c10: 10c112 addi a1, a1, 16 +40213c13: f00d ret.n +40213c15: 000000 ill + +40213c18 : +40213c18: f0c112 addi a1, a1, -16 +40213c1b: 130c movi.n a3, 1 +40213c1d: 3109 s32i.n a0, a1, 12 +40213c1f: fff4c5 call0 40213b6c +40213c22: 3108 l32i.n a0, a1, 12 +40213c24: 10c112 addi a1, a1, 16 +40213c27: f00d ret.n +40213c29: 000000 ill + +40213c2c : +40213c2c: f0c112 addi a1, a1, -16 +40213c2f: 030c movi.n a3, 0 +40213c31: 3109 s32i.n a0, a1, 12 +40213c33: fff385 call0 40213b6c +40213c36: 3108 l32i.n a0, a1, 12 +40213c38: 10c112 addi a1, a1, 16 +40213c3b: f00d ret.n +40213c3d: 000000 ill +40213c40: 0bfa add.n a0, a11, a15 +40213c42: 3a0000 excw +40213c45: 000c movi.n a0, 0 +40213c47: c11200 mul16u a1, a2, a0 +40213c4a: 61d2b0 xsr.excsave2 a11 +40213c4d: f1f911 l32r a1, 40210434 +40213c50: 136102 s32i a0, a1, 76 +40213c53: 1261c2 s32i a12, a1, 72 +40213c56: 1061e2 s32i a14, a1, 64 +40213c59: 02dd mov.n a13, a2 +40213c5b: 03fd mov.n a15, a3 +40213c5d: 004256 bnez a2, 40213c65 +40213c60: 020c movi.n a2, 0 +40213c62: 004c86 j 40213d98 +40213c65: 2a1326 beqi a3, 1, 40213c93 +40213c68: fff641 l32r a4, 40213c40 +40213c6b: f1b031 l32r a3, 4021032c +40213c6e: 050c movi.n a5, 0 +40213c70: a4a422 movi a2, 0x4a4 +40213c73: b62401 l32r a0, 40201504 +40213c76: 0000c0 callx0 a0 +40213c79: 02cd mov.n a12, a2 +40213c7b: fe1216 beqz a2, 40213c60 +40213c7e: 204220 or a4, a2, a2 +40213c81: f5c821 l32r a2, 402113a4 +40213c84: a4a452 movi a5, 0x4a4 +40213c87: 001222 l16ui a2, a2, 0 +40213c8a: 00a032 movi a3, 0 +40213c8d: fdad45 call0 40211764 +40213c90: 000086 j 40213c96 +40213c93: d469c1 l32r a12, 40208e38 +40213c96: 01dce2 addmi a14, a12, 0x100 +40213c99: 360e22 l8ui a2, a14, 54 +40213c9c: 0252f6 bgeui a2, 5, 40213ca2 +40213c9f: 151266 bnei a2, 1, 40213cb8 +40213ca2: 020c movi.n a2, 0 +40213ca4: 196d22 s32i a2, a13, 100 +40213ca7: d4a022 movi a2, 212 +40213caa: 034c movi.n a3, 64 +40213cac: 2c2a add.n a2, a12, a2 +40213cae: c7e301 l32r a0, 40205c3c +40213cb1: 0000c0 callx0 a0 +40213cb4: 0000c6 j 40213cbb +40213cb7: 6d2200 excw +40213cba: 2219 s32i.n a1, a2, 8 +40213cbc: 2c2c movi.n a12, 34 +40213cbe: 080226 beqi a2, -1, 40213cca +40213cc1: b40c32 l8ui a3, a12, 180 +40213cc4: ffa022 movi a2, 255 +40213cc7: 369327 bne a3, a2, 40213d01 +40213cca: fbb121 l32r a2, 40212b90 +40213ccd: 441c movi.n a4, 20 +40213ccf: 013d mov.n a3, a1 +40213cd1: fd3b45 call0 40211088 +40213cd4: 14c132 addi a3, a1, 20 +40213cd7: 120c movi.n a2, 1 +40213cd9: ffbb45 call0 40213890 +40213cdc: b0a022 movi a2, 176 +40213cdf: 432c movi.n a3, 36 +40213ce1: 2c2a add.n a2, a12, a2 +40213ce3: c7d601 l32r a0, 40205c3c +40213ce6: 0000c0 callx0 a0 +40213ce9: 190162 l8ui a6, a1, 25 +40213cec: 180152 l8ui a5, a1, 24 +40213cef: 170142 l8ui a4, a1, 23 +40213cf2: b4a022 movi a2, 180 +40213cf5: 013d mov.n a3, a1 +40213cf7: 2c2a add.n a2, a12, a2 +40213cf9: 013445 call0 40215040 +40213cfc: a20c movi.n a2, 10 +40213cfe: 2c6c22 s32i a2, a12, 176 +40213d01: b4a032 movi a3, 180 +40213d04: 042c movi.n a4, 32 +40213d06: 3c3a add.n a3, a12, a3 +40213d08: 202dd0 or a2, a13, a13 +40213d0b: b4c201 l32r a0, 40201014 <_irom0_text_start+0x4> +40213d0e: 0000c0 callx0 a0 +40213d11: d4a032 movi a3, 212 +40213d14: 044c movi.n a4, 64 +40213d16: 3c3a add.n a3, a12, a3 +40213d18: 20cd22 addi a2, a13, 32 +40213d1b: b4be01 l32r a0, 40201014 <_irom0_text_start+0x4> +40213d1e: 0000c0 callx0 a0 +40213d21: 2c2c22 l32i a2, a12, 176 +40213d24: f41c movi.n a4, 31 +40213d26: 320b addi.n a3, a2, -1 +40213d28: 01b437 bgeu a4, a3, 40213d2d +40213d2b: 020c movi.n a2, 0 +40213d2d: 604d22 s8i a2, a13, 96 +40213d30: 350e32 l8ui a3, a14, 53 +40213d33: 8139 s32i.n a3, a1, 32 +40213d35: ee03c5 call0 40201d74 +40213d38: 8138 l32i.n a3, a1, 32 +40213d3a: 043237 bltu a2, a3, 40213d42 +40213d3d: 350e22 l8ui a2, a14, 53 +40213d40: 02cc bnez.n a2, 40213d44 +40213d42: 120c movi.n a2, 1 +40213d44: 614d22 s8i a2, a13, 97 +40213d47: 370e22 l8ui a2, a14, 55 +40213d4a: 0222b6 bltui a2, 2, 40213d50 +40213d4d: 00a022 movi a2, 0 +40213d50: 684d22 s8i a2, a13, 104 +40213d53: 380e22 l8ui a2, a14, 56 +40213d56: 830c movi.n a3, 8 +40213d58: 01b327 bgeu a3, a2, 40213d5d +40213d5b: 820c movi.n a2, 8 +40213d5d: 694d22 s8i a2, a13, 105 +40213d60: 03dc22 addmi a2, a12, 0x300 +40213d63: 361242 l16ui a4, a2, 108 +40213d66: db6131 l32r a3, 4020aaec +40213d69: 9cc422 addi a2, a4, -100 +40213d6c: f42020 extui a2, a2, 0, 16 +40213d6f: f43030 extui a3, a3, 0, 16 +40213d72: 0ab327 bgeu a3, a2, 40213d80 +40213d75: 64a022 movi a2, 100 +40213d78: 355d22 s16i a2, a13, 106 +40213d7b: 000106 j 40213d83 +40213d7e: 420000 excw +40213d81: 355d excw +40213d83: 120c movi.n a2, 1 +40213d85: 0f1f27 beq a15, a2, 40213d98 +40213d88: ffaf41 l32r a4, 40213c44 +40213d8b: f16831 l32r a3, 4021032c +40213d8e: 0c2d mov.n a2, a12 +40213d90: b5de01 l32r a0, 40201508 +40213d93: 0000c0 callx0 a0 +40213d96: 120c movi.n a2, 1 +40213d98: 132102 l32i a0, a1, 76 +40213d9b: 1221c2 l32i a12, a1, 72 +40213d9e: 1121d2 l32i a13, a1, 68 +40213da1: 1021e2 l32i a14, a1, 64 +40213da4: f1f8 l32i.n a15, a1, 60 +40213da6: 50c112 addi a1, a1, 80 +40213da9: f00d ret.n + ... + +40213dac : +40213dac: f0c112 addi a1, a1, -16 +40213daf: 130c movi.n a3, 1 +40213db1: 3109 s32i.n a0, a1, 12 +40213db3: ffe945 call0 40213c48 +40213db6: 3108 l32i.n a0, a1, 12 +40213db8: 10c112 addi a1, a1, 16 +40213dbb: f00d ret.n +40213dbd: 000000 ill + +40213dc0 : +40213dc0: f0c112 addi a1, a1, -16 +40213dc3: 030c movi.n a3, 0 +40213dc5: 3109 s32i.n a0, a1, 12 +40213dc7: ffe805 call0 40213c48 +40213dca: 3108 l32i.n a0, a1, 12 +40213dcc: 10c112 addi a1, a1, 16 +40213dcf: f00d ret.n +40213dd1: 000000 ill + +40213dd4 : +40213dd4: e0c112 addi a1, a1, -32 +40213dd7: 61c9 s32i.n a12, a1, 24 +40213dd9: 51d9 s32i.n a13, a1, 20 +40213ddb: 31f9 s32i.n a15, a1, 12 +40213ddd: 7109 s32i.n a0, a1, 28 +40213ddf: 41e9 s32i.n a14, a1, 16 +40213de1: 03cd mov.n a12, a3 +40213de3: 74f020 extui a15, a2, 0, 8 +40213de6: fdc145 call0 402119fc +40213de9: 02dd mov.n a13, a2 +40213deb: 7c8c beqz.n a12, 40213df6 +40213ded: 052ff6 bgeui a15, 2, 40213df6 +40213df0: 000c22 l8ui a2, a12, 0 +40213df3: 056207 bbci a2, 0, 40213dfc +40213df6: 0c0c movi.n a12, 0 +40213df8: 003dc6 j 40213ef3 +40213dfb: 0f2d00 excw +40213dfe: 00c705 call0 40214a70 +40213e01: 02ed mov.n a14, a2 +40213e03: 06ef56 bnez a15, 40213e75 +40213e06: fda022 movi a2, 253 +40213e09: 10dd20 and a13, a13, a2 +40213e0c: fe6d16 beqz a13, 40213df6 +40213e0f: dd86f1 l32r a15, 4020b428 +40213e12: 640c movi.n a4, 6 +40213e14: 0c3d mov.n a3, a12 +40213e16: 0f2d mov.n a2, a15 +40213e18: b78101 l32r a0, 40201c1c +40213e1b: 0000c0 callx0 a0 +40213e1e: 0cf216 beqz a2, 40213ef1 +40213e21: 271d26 beqi a13, 1, 40213e4c +40213e24: 640c movi.n a4, 6 +40213e26: 0c3d mov.n a3, a12 +40213e28: 0f2d mov.n a2, a15 +40213e2a: b47a01 l32r a0, 40201014 <_irom0_text_start+0x4> +40213e2d: 0000c0 callx0 a0 +40213e30: ceac beqz.n a14, 40213e60 +40213e32: 640c movi.n a4, 6 +40213e34: 0c3d mov.n a3, a12 +40213e36: 33ce22 addi a2, a14, 51 +40213e39: b47601 l32r a0, 40201014 <_irom0_text_start+0x4> +40213e3c: 0000c0 callx0 a0 +40213e3f: f765c5 call0 4020b49c +40213e42: f75e85 call0 4020b42c +40213e45: fe9b45 call0 402127fc +40213e48: 002946 j 40213ef1 +40213e4b: 0d2100 excw +40213e4e: 640cc5 call0 40277f1c <_irom0_text_end+0x473a0> +40213e51: 0c3d mov.n a3, a12 +40213e53: b77201 l32r a0, 40201c1c +40213e56: 0000c0 callx0 a0 +40213e59: f99216 beqz a2, 40213df6 +40213e5c: fff106 j 40213e24 +40213e5f: 6e2100 excw +40213e62: c2fb addi.n a12, a2, 15 +40213e64: 260002 l8ui a0, a0, 38 +40213e67: 021c movi.n a2, 16 +40213e69: 002106 j 40213ef1 +40213e6c: 0f2d mov.n a2, a15 +40213e6e: fed245 call0 40212b94 +40213e71: 001f86 j 40213ef3 +40213e74: b84500 excw +40213e77: 66fd excw +40213e79: c60212 l8ui a1, a2, 198 +40213e7c: ffdd excw +40213e7e: c500f1 l32r a15, 40205280 +40213e81: 640c movi.n a4, 6 +40213e83: 0c3d mov.n a3, a12 +40213e85: 0f2d mov.n a2, a15 +40213e87: b76501 l32r a0, 40201c1c +40213e8a: 0000c0 callx0 a0 +40213e8d: 060216 beqz a2, 40213ef1 +40213e90: fecdd2 addi a13, a13, -2 +40213e93: 74d0d0 extui a13, a13, 0, 8 +40213e96: 122db6 bltui a13, 2, 40213eac +40213e99: 640c movi.n a4, 6 +40213e9b: 0c3d mov.n a3, a12 +40213e9d: 0f2d mov.n a2, a15 +40213e9f: b45d01 l32r a0, 40201014 <_irom0_text_start+0x4> +40213ea2: 0000c0 callx0 a0 +40213ea5: 6edc bnez.n a14, 40213ebf +40213ea7: 001186 j 40213ef1 +40213eaa: 210000 srai a0, a0, 0 +40213ead: 5f .byte 0x5f +40213eae: 0cdd mov.n a13, a12 +40213eb0: 0c3d64 excw +40213eb3: b75a01 l32r a0, 40201c1c +40213eb6: 0000c0 callx0 a0 +40213eb9: f39216 beqz a2, 40213df6 +40213ebc: fff646 j 40213e99 +40213ebf: 06a042 movi a4, 6 +40213ec2: 203cc0 or a3, a12, a12 +40213ec5: 33ce22 addi a2, a14, 51 +40213ec8: b45301 l32r a0, 40201014 <_irom0_text_start+0x4> +40213ecb: 0000c0 callx0 a0 +40213ece: b72521 l32r a2, 40201b64 +40213ed1: 01d222 addmi a2, a2, 0x100 +40213ed4: de0222 l8ui a2, a2, 222 +40213ed7: 0a2266 bnei a2, 2, 40213ee5 +40213eda: 01a022 movi a2, 1 +40213edd: f19705 call0 40205850 +40213ee0: 120c movi.n a2, 1 +40213ee2: 000206 j 40213eee +40213ee5: 00a022 movi a2, 0 +40213ee8: f19645 call0 40205850 +40213eeb: 00a022 movi a2, 0 +40213eee: f13b85 call0 402052a8 +40213ef1: 1c0c movi.n a12, 1 +40213ef3: 7108 l32i.n a0, a1, 28 +40213ef5: 0c2d mov.n a2, a12 +40213ef7: 51d8 l32i.n a13, a1, 20 +40213ef9: 61c8 l32i.n a12, a1, 24 +40213efb: 41e8 l32i.n a14, a1, 16 +40213efd: 31f8 l32i.n a15, a1, 12 +40213eff: 20c112 addi a1, a1, 32 +40213f02: f00d ret.n + +40213f04 : +40213f04: b71831 l32r a3, 40201b64 +40213f07: 01d332 addmi a3, a3, 0x100 +40213f0a: f94322 s8i a2, a3, 249 +40213f0d: f00d ret.n + ... + +40213f10 : +40213f10: 629c beqz.n a2, 40213f2a +40213f12: 439c beqz.n a3, 40213f2a +40213f14: b71441 l32r a4, 40201b64 +40213f17: 01d442 addmi a4, a4, 0x100 +40213f1a: fb0452 l8ui a5, a4, 251 +40213f1d: 004352 s8i a5, a3, 0 +40213f20: fa0432 l8ui a3, a4, 250 +40213f23: 004232 s8i a3, a2, 0 +40213f26: 020c movi.n a2, 0 +40213f28: f00d ret.n +40213f2a: f27c movi.n a2, -1 +40213f2c: f00d ret.n + ... + +40213f30 : +40213f30: 743030 extui a3, a3, 0, 8 +40213f33: f41c movi.n a4, 31 +40213f35: 745020 extui a5, a2, 0, 8 +40213f38: f27c movi.n a2, -1 +40213f3a: 123437 bltu a4, a3, 40213f50 +40213f3d: e27c movi.n a2, -2 +40213f3f: 0d45f6 bgeui a5, 4, 40213f50 +40213f42: b70841 l32r a4, 40201b64 +40213f45: 020c movi.n a2, 0 +40213f47: 01d442 addmi a4, a4, 0x100 +40213f4a: fb4432 s8i a3, a4, 251 +40213f4d: fa4452 s8i a5, a4, 250 +40213f50: f00d ret.n + ... + +40213f54 : +40213f54: b70441 l32r a4, 40201b64 +40213f57: 370c movi.n a7, 3 +40213f59: 05d452 addmi a5, a4, 0x500 +40213f5c: 142552 l32i a5, a5, 80 +40213f5f: 742020 extui a2, a2, 0, 8 +40213f62: 650b addi.n a6, a5, -1 +40213f64: 743030 extui a3, a3, 0, 8 +40213f67: b50c movi.n a5, 11 +40213f69: 835760 moveqz a5, a7, a6 +40213f6c: 103327 bltu a3, a2, 40213f80 +40213f6f: 0d3537 bltu a5, a3, 40213f80 +40213f72: 01d442 addmi a4, a4, 0x100 +40213f75: fc4422 s8i a2, a4, 252 +40213f78: fd4432 s8i a3, a4, 253 +40213f7b: 020c movi.n a2, 0 +40213f7d: f00d ret.n +40213f7f: f27c00 excw +40213f82: f00d ret.n + +40213f84 : +40213f84: f0c112 addi a1, a1, -16 +40213f87: 036102 s32i a0, a1, 12 +40213f8a: 742020 extui a2, a2, 0, 8 +40213f8d: 743030 extui a3, a3, 0, 8 +40213f90: 744040 extui a4, a4, 0, 8 +40213f93: 745050 extui a5, a5, 0, 8 +40213f96: 00a062 movi a6, 0 +40213f99: 0d32f6 bgeui a2, 3, 40213faa +40213f9c: 0e8385 call0 402227d8 +40213f9f: 00a032 movi a3, 0 +40213fa2: 160c movi.n a6, 1 +40213fa4: 936320 movnez a6, a3, a2 +40213fa7: 746060 extui a6, a6, 0, 8 +40213faa: 3108 l32i.n a0, a1, 12 +40213fac: 062d mov.n a2, a6 +40213fae: 10c112 addi a1, a1, 16 +40213fb1: f00d ret.n + ... + +40213fb4 : +40213fb4: b6ec21 l32r a2, 40201b64 +40213fb7: 01d222 addmi a2, a2, 0x100 +40213fba: fe0222 l8ui a2, a2, 254 +40213fbd: f00d ret.n + ... + +40213fc0 : +40213fc0: 744020 extui a4, a2, 0, 8 +40213fc3: c37c movi.n a3, -4 +40213fc5: 020c movi.n a2, 0 +40213fc7: 0a8437 bany a4, a3, 40213fd5 +40213fca: b6e631 l32r a3, 40201b64 +40213fcd: 120c movi.n a2, 1 +40213fcf: 01d332 addmi a3, a3, 0x100 +40213fd2: fe4342 s8i a4, a3, 254 +40213fd5: f00d ret.n + ... + +40213fd8 : +40213fd8: 023d mov.n a3, a2 +40213fda: f27c movi.n a2, -1 +40213fdc: 638c beqz.n a3, 40213fe6 +40213fde: b6e121 l32r a2, 40201b64 +40213fe1: 7b6232 s32i a3, a2, 0x1ec +40213fe4: 020c movi.n a2, 0 +40213fe6: f00d ret.n + +40213fe8 : +40213fe8: b6df21 l32r a2, 40201b64 +40213feb: 030c movi.n a3, 0 +40213fed: 7b6232 s32i a3, a2, 0x1ec +40213ff0: f00d ret.n + ... + +40213ff4 : +40213ff4: f0c112 addi a1, a1, -16 +40213ff7: 21c9 s32i.n a12, a1, 8 +40213ff9: 11d9 s32i.n a13, a1, 4 +40213ffb: 01e9 s32i.n a14, a1, 0 +40213ffd: 3109 s32i.n a0, a1, 12 +40213fff: 02cd mov.n a12, a2 +40214001: 03dd mov.n a13, a3 +40214003: 74e040 extui a14, a4, 0, 8 +40214006: fd9f45 call0 402119fc +40214009: 0c1226 beqi a2, 1, 40214019 +4021400c: e2ac beqz.n a2, 4021403e +4021400e: 2c42f6 bgeui a2, 4, 4021403e +40214011: b6d421 l32r a2, 40201b64 +40214014: 5268 l32i.n a6, a2, 20 +40214016: 000146 j 4021401f +40214019: b6d221 l32r a2, 40201b64 +4021401c: 042262 l32i a6, a2, 16 +4021401f: f6af22 movi a2, -10 +40214022: 01a616 beqz a6, 40214040 +40214025: 0d4d mov.n a4, a13 +40214027: 0c3d mov.n a3, a12 +40214029: 0e5d mov.n a5, a14 +4021402b: 062d mov.n a2, a6 +4021402d: ef8485 call0 40203878 +40214030: 030c movi.n a3, 0 +40214032: 140c movi.n a4, 1 +40214034: 933420 movnez a3, a4, a2 +40214037: 602030 neg a2, a3 +4021403a: 000086 j 40214040 +4021403d: 627c00 excw +40214040: 3108 l32i.n a0, a1, 12 +40214042: 21c8 l32i.n a12, a1, 8 +40214044: 11d8 l32i.n a13, a1, 4 +40214046: 01e8 l32i.n a14, a1, 0 +40214048: 10c112 addi a1, a1, 16 +4021404b: f00d ret.n +4021404d: 000000 ill + +40214050 : +40214050: f0c112 addi a1, a1, -16 +40214053: 3109 s32i.n a0, a1, 12 +40214055: edb185 call0 40201b70 +40214058: 3108 l32i.n a0, a1, 12 +4021405a: 10c112 addi a1, a1, 16 +4021405d: f00d ret.n + ... + +40214060 : +40214060: f0c112 addi a1, a1, -16 +40214063: 3109 s32i.n a0, a1, 12 +40214065: edb3c5 call0 40201ba4 +40214068: 3108 l32i.n a0, a1, 12 +4021406a: 10c112 addi a1, a1, 16 +4021406d: f00d ret.n + ... + +40214070 : +40214070: f0c112 addi a1, a1, -16 +40214073: 3109 s32i.n a0, a1, 12 +40214075: edb845 call0 40201bfc +40214078: 3108 l32i.n a0, a1, 12 +4021407a: 10c112 addi a1, a1, 16 +4021407d: f00d ret.n + ... + +40214080 : +40214080: f0c112 addi a1, a1, -16 +40214083: 3109 s32i.n a0, a1, 12 +40214085: edb845 call0 40201c0c +40214088: 3108 l32i.n a0, a1, 12 +4021408a: 10c112 addi a1, a1, 16 +4021408d: f00d ret.n + ... + +40214090 : +40214090: b6b551 l32r a5, 40201b64 +40214093: 160c movi.n a6, 1 +40214095: 02d552 addmi a5, a5, 0x200 +40214098: 164522 s8i a2, a5, 22 +4021409b: 154562 s8i a6, a5, 21 +4021409e: 174562 s8i a6, a5, 23 +402140a1: 744040 extui a4, a4, 0, 8 +402140a4: 450c movi.n a5, 4 +402140a6: 105450 and a5, a4, a5 +402140a9: 0020c0 memw +402140ac: 0368 l32i.n a6, a3, 0 +402140ae: 1155e0 slli a5, a5, 2 +402140b1: 144040 extui a4, a4, 0, 2 +402140b4: 204540 or a4, a5, a4 +402140b7: cfae22 movi a2, 0xfffffecf +402140ba: 1144c0 slli a4, a4, 4 +402140bd: 102620 and a2, a6, a2 +402140c0: 204420 or a4, a4, a2 +402140c3: 0020c0 memw +402140c6: 0349 s32i.n a4, a3, 0 +402140c8: f00d ret.n + ... + +402140cc : +402140cc: b6a621 l32r a2, 40201b64 +402140cf: f0c112 addi a1, a1, -16 +402140d2: 3109 s32i.n a0, a1, 12 +402140d4: 02d222 addmi a2, a2, 0x200 +402140d7: 150232 l8ui a3, a2, 21 +402140da: 0e1366 bnei a3, 1, 402140ec +402140dd: 00a032 movi a3, 0 +402140e0: 154232 s8i a3, a2, 21 +402140e3: d4e221 l32r a2, 4020946c +402140e6: bfb501 l32r a0, 40203fbc +402140e9: 0000c0 callx0 a0 +402140ec: 3108 l32i.n a0, a1, 12 +402140ee: 10c112 addi a1, a1, 16 +402140f1: f00d ret.n + ... + +402140f4 : +402140f4: 742020 extui a2, a2, 0, 8 +402140f7: 320b addi.n a3, a2, -1 +402140f9: 140c movi.n a4, 1 +402140fb: 020c movi.n a2, 0 +402140fd: 832430 moveqz a2, a4, a3 +40214100: f30f31 l32r a3, 40210d3c +40214103: 004322 s8i a2, a3, 0 +40214106: f00d ret.n +40214108: fe8be4 excw +4021410b: 3f .byte 0x3f +4021410c: fedc60 excw +4021410f: 3f .byte 0x3f +40214110: 210330 srai a0, a3, 3 +40214113: 0dd040 excw +40214116: 00 .byte 00 +40214117: 40 .byte 0x40 + +40214118 : +40214118: f0c112 addi a1, a1, -16 +4021411b: 01e9 s32i.n a14, a1, 0 +4021411d: 02ed mov.n a14, a2 +4021411f: fffa21 l32r a2, 40214108 +40214122: 21c9 s32i.n a12, a1, 8 +40214124: 11d9 s32i.n a13, a1, 4 +40214126: 3109 s32i.n a0, a1, 12 +40214128: 000232 l8ui a3, a2, 0 +4021412b: 02cd mov.n a12, a2 +4021412d: c135d1 l32r a13, 40204604 +40214130: 83dc bnez.n a3, 4021414c +40214132: fff721 l32r a2, 40214110 +40214135: fff541 l32r a4, 4021410c +40214138: 052c movi.n a5, 32 +4021413a: 531c movi.n a3, 21 +4021413c: fff601 l32r a0, 40214114 +4021413f: 0000c0 callx0 a0 +40214142: 120c movi.n a2, 1 +40214144: 0de9 s32i.n a14, a13, 0 +40214146: 004c22 s8i a2, a12, 0 +40214149: 000046 j 4021414e +4021414c: 0de9 s32i.n a14, a13, 0 +4021414e: 3108 l32i.n a0, a1, 12 +40214150: 21c8 l32i.n a12, a1, 8 +40214152: 11d8 l32i.n a13, a1, 4 +40214154: 01e8 l32i.n a14, a1, 0 +40214156: 10c112 addi a1, a1, 16 +40214159: f00d ret.n +4021415b: f0a300 subx8 a10, a3, a0 +4021415e: 8c4022 s8i a2, a0, 140 +40214161: 4022f0 excw + +40214164 : +40214164: f0c112 addi a1, a1, -16 +40214167: 3109 s32i.n a0, a1, 12 +40214169: 743030 extui a3, a3, 0, 8 +4021416c: 745050 extui a5, a5, 0, 8 +4021416f: 0d33b6 bltui a3, 3, 40214180 +40214172: fffa21 l32r a2, 4021415c +40214175: 330c movi.n a3, 3 +40214177: b7b501 l32r a0, 4020204c +4021417a: 0000c0 callx0 a0 +4021417d: 000306 j 4021418d +40214180: 048c beqz.n a4, 40214184 +40214182: c5cc bnez.n a5, 40214192 +40214184: fff721 l32r a2, 40214160 +40214187: b7b101 l32r a0, 4020204c +4021418a: 0000c0 callx0 a0 +4021418d: 020c movi.n a2, 0 +4021418f: 000306 j 4021419f +40214192: 332b addi.n a3, a3, 2 +40214194: 743030 extui a3, a3, 0, 8 +40214197: ffdf01 l32r a0, 40214114 +4021419a: 0000c0 callx0 a0 +4021419d: 120c movi.n a2, 1 +4021419f: 3108 l32i.n a0, a1, 12 +402141a1: 10c112 addi a1, a1, 16 +402141a4: f00d ret.n +402141a6: dd0000 excw +402141a9: 4022f1 l32r a15, 401e4234 <_lit4_end+0xddf08> +402141ac: f20de0 excw +402141af: 3f .byte 0x3f +402141b0: 003333 excw +402141b3: 070000 excw +402141b6: 446000 extui a6, a0, 0, 5 +402141b9: 600007 bnone a0, a0, 4021421d +402141bc: 070c movi.n a7, 0 +402141be: 106000 and a6, a0, a0 +402141c1: 000100 excw +402141c4: 0748 l32i.n a4, a7, 0 +402141c6: ff6000 excw +402141c9: ffff01 l32r a0, 402141c8 +402141cc: 00fc00 excw +402141cf: 071000 excw +402141d2: 046000 extui a6, a0, 0, 1 +402141d5: 600007 bnone a0, a0, 40214239 +402141d8: 0718 l32i.n a1, a7, 0 +402141da: 086000 excw +402141dd: 600007 bnone a0, a0, 40214241 +402141e0: 079c beqz.n a7, 402141f4 +402141e2: a06000 addx4 a6, a0, a0 +402141e5: 600007 bnone a0, a0, 40214249 +402141e8: 40c8 l32i.n a12, a0, 16 +402141ea: 000006 j 402141ee +402141ed: 3ff000 excw +402141f0: 000740 excw +402141f3: 0f9860 excw +402141f6: e84000 excw +402141f9: 401017 beq a0, a1, 4021423d +402141fc: ffeb21 l32r a2, 402141a8 +402141ff: f0c112 addi a1, a1, -16 +40214202: 3109 s32i.n a0, a1, 12 +40214204: 21c9 s32i.n a12, a1, 8 +40214206: 11d9 s32i.n a13, a1, 4 +40214208: b79101 l32r a0, 4020204c +4021420b: 0000c0 callx0 a0 +4021420e: f25a21 l32r a2, 40210b78 +40214211: 000222 l8ui a2, a2, 0 +40214214: 05ce05 call0 40219ef8 +40214217: ffe631 l32r a3, 402141b0 +4021421a: ffe421 l32r a2, 402141ac +4021421d: 0020c0 memw +40214220: 0239 s32i.n a3, a2, 0 +40214222: 421c movi.n a2, 20 +40214224: c41e01 l32r a0, 4020529c +40214227: 0000c0 callx0 a0 +4021422a: f04dc1 l32r a12, 40210360 +4021422d: 020c movi.n a2, 0 +4021422f: 203cc0 or a3, a12, a12 +40214232: fbfd45 call0 40210208 +40214235: 0c3d mov.n a3, a12 +40214237: 120c movi.n a2, 1 +40214239: fbfcc5 call0 40210208 +4021423c: ffdec1 l32r a12, 402141b4 +4021423f: 050c movi.n a5, 0 +40214241: 0020c0 memw +40214244: 0c59 s32i.n a5, a12, 0 +40214246: 0020c0 memw +40214249: 0c38 l32i.n a3, a12, 0 +4021424b: ca4321 l32r a2, 40206b58 +4021424e: ffdbd1 l32r a13, 402141bc +40214251: 102320 and a2, a3, a2 +40214254: 0020c0 memw +40214257: 0c29 s32i.n a2, a12, 0 +40214259: 0020c0 memw +4021425c: 0c38 l32i.n a3, a12, 0 +4021425e: 023c movi.n a2, 48 +40214260: 202320 or a2, a3, a2 +40214263: 0020c0 memw +40214266: 0c29 s32i.n a2, a12, 0 +40214268: ffd421 l32r a2, 402141b8 +4021426b: 430c movi.n a3, 4 +4021426d: 0020c0 memw +40214270: 0239 s32i.n a3, a2, 0 +40214272: ffd321 l32r a2, 402141c0 +40214275: ffd431 l32r a3, 402141c8 +40214278: 0020c0 memw +4021427b: 0d29 s32i.n a2, a13, 0 +4021427d: ffd121 l32r a2, 402141c4 +40214280: 0020c0 memw +40214283: 0248 l32i.n a4, a2, 0 +40214285: 104430 and a4, a4, a3 +40214288: ffd131 l32r a3, 402141cc +4021428b: 203430 or a3, a4, a3 +4021428e: 0020c0 memw +40214291: 0239 s32i.n a3, a2, 0 +40214293: 0020c0 memw +40214296: 0248 l32i.n a4, a2, 0 +40214298: 00ae32 movi a3, 0xfffffe00 +4021429b: 104430 and a4, a4, a3 +4021429e: 80a032 movi a3, 128 +402142a1: 203430 or a3, a4, a3 +402142a4: 0020c0 memw +402142a7: 0239 s32i.n a3, a2, 0 +402142a9: ffc921 l32r a2, 402141d0 +402142ac: 0020c0 memw +402142af: 0259 s32i.n a5, a2, 0 +402142b1: f31e21 l32r a2, 40210f2c +402142b4: 0020c0 memw +402142b7: 0238 l32i.n a3, a2, 0 +402142b9: 88a022 movi a2, 136 +402142bc: 232a add.n a2, a3, a2 +402142be: ffc531 l32r a3, 402141d4 +402142c1: 0020c0 memw +402142c4: 0329 s32i.n a2, a3, 0 +402142c6: ffc421 l32r a2, 402141d8 +402142c9: 830c movi.n a3, 8 +402142cb: 0020c0 memw +402142ce: 0239 s32i.n a3, a2, 0 +402142d0: bddc31 l32r a3, 40203a40 +402142d3: ffc221 l32r a2, 402141dc +402142d6: 0020c0 memw +402142d9: 0239 s32i.n a3, a2, 0 +402142db: c8a022 movi a2, 200 +402142de: c3ef01 l32r a0, 4020529c +402142e1: 0000c0 callx0 a0 +402142e4: ffbf51 l32r a5, 402141e0 +402142e7: ffbf31 l32r a3, 402141e4 +402142ea: 161c movi.n a6, 17 +402142ec: 0020c0 memw +402142ef: 0569 s32i.n a6, a5, 0 +402142f1: 340c movi.n a4, 3 +402142f3: ffbd21 l32r a2, 402141e8 +402142f6: 0020c0 memw +402142f9: 0349 s32i.n a4, a3, 0 +402142fb: 0020c0 memw +402142fe: 0d29 s32i.n a2, a13, 0 +40214300: 0020c0 memw +40214303: 0c78 l32i.n a7, a12, 0 +40214305: cfaf22 movi a2, -49 +40214308: 102720 and a2, a7, a2 +4021430b: 0020c0 memw +4021430e: 0c29 s32i.n a2, a12, 0 +40214310: 0020c0 memw +40214313: 0569 s32i.n a6, a5, 0 +40214315: 0020c0 memw +40214318: 0349 s32i.n a4, a3, 0 +4021431a: ef8e31 l32r a3, 40210154 +4021431d: e27c movi.n a2, -2 +4021431f: 0020c0 memw +40214322: 0348 l32i.n a4, a3, 0 +40214324: 102420 and a2, a4, a2 +40214327: 0020c0 memw +4021432a: 0329 s32i.n a2, a3, 0 +4021432c: 00a122 movi a2, 0x100 +4021432f: ffb101 l32r a0, 402141f4 +40214332: 0000c0 callx0 a0 +40214335: ffad31 l32r a3, 402141ec +40214338: 056c movi.n a5, -32 +4021433a: 0ea042 movi a4, 14 +4021433d: 0020c0 memw +40214340: 0328 l32i.n a2, a3, 0 +40214342: 102250 and a2, a2, a5 +40214345: 202240 or a2, a2, a4 +40214348: 0020c0 memw +4021434b: 0329 s32i.n a2, a3, 0 +4021434d: 0020c0 memw +40214350: 0328 l32i.n a2, a3, 0 +40214352: e7e207 bbsi a2, 0, 4021433d +40214355: ffa621 l32r a2, 402141f0 +40214358: f37c movi.n a3, -1 +4021435a: f5c4c1 l32r a12, 40211a6c +4021435d: 0020c0 memw +40214360: 0239 s32i.n a3, a2, 0 +40214362: ff9521 l32r a2, 402141b8 +40214365: 032c movi.n a3, 32 +40214367: 0020c0 memw +4021436a: 0239 s32i.n a3, a2, 0 +4021436c: 1c38 l32i.n a3, a12, 4 +4021436e: 0c28 l32i.n a2, a12, 0 +40214370: 08db05 call0 4021d124 +40214373: 1c38 l32i.n a3, a12, 4 +40214375: 0c28 l32i.n a2, a12, 0 +40214377: 202230 or a2, a2, a3 +4021437a: ff9731 l32r a3, 402141d8 +4021437d: 028c beqz.n a2, 40214381 +4021437f: 820c movi.n a2, 8 +40214381: 0020c0 memw +40214384: 0329 s32i.n a2, a3, 0 +40214386: ff9c01 l32r a0, 402141f8 +40214389: 0000c0 callx0 a0 +4021438c: 3108 l32i.n a0, a1, 12 +4021438e: 120c movi.n a2, 1 +40214390: 21c8 l32i.n a12, a1, 8 +40214392: 11d8 l32i.n a13, a1, 4 +40214394: 10c112 addi a1, a1, 16 +40214397: f00d ret.n +40214399: 000000 ill +4021439c: f1c8 l32i.n a12, a1, 60 +4021439e: 22 .byte 0x22 +4021439f: 40 .byte 0x40 + +402143a0 : +402143a0: f0c112 addi a1, a1, -16 +402143a3: 036102 s32i a0, a1, 12 +402143a6: 0261c2 s32i a12, a1, 8 +402143a9: 11d9 s32i.n a13, a1, 4 +402143ab: 02cd mov.n a12, a2 +402143ad: 20d330 or a13, a3, a3 +402143b0: 0a9345 call0 4021ece8 +402143b3: 024d mov.n a4, a2 +402143b5: 0d3d mov.n a3, a13 +402143b7: 0c2d mov.n a2, a12 +402143b9: 08d085 call0 4021d0c4 +402143bc: f5ac41 l32r a4, 40211a6c +402143bf: 0429 s32i.n a2, a4, 0 +402143c1: 1439 s32i.n a3, a4, 4 +402143c3: 13cc bnez.n a3, 402143c8 +402143c5: 0102d6 bgez a2, 402143d9 +402143c8: fff521 l32r a2, 4021439c +402143cb: b72001 l32r a0, 4020204c +402143ce: 0000c0 callx0 a0 +402143d1: 020c movi.n a2, 0 +402143d3: 000146 j 402143dc +402143d6: 000000 ill +402143d9: ffe205 call0 402141fc +402143dc: 3108 l32i.n a0, a1, 12 +402143de: 21c8 l32i.n a12, a1, 8 +402143e0: 11d8 l32i.n a13, a1, 4 +402143e2: 10c112 addi a1, a1, 16 +402143e5: f00d ret.n +402143e7: 001800 excw +402143ea: ff3ff0 excw +402143ed: ffff00 excw +402143f0: 000730 excw +402143f3: 750060 extui a0, a6, 16, 8 +402143f6: ff0000 excw +402143f9: ff8a add.n a15, a15, a8 +402143fb: ff .byte 0xff +402143fc: 0d48 l32i.n a4, a13, 0 +402143fe: d06000 subx2 a6, a0, a0 +40214401: 1039 s32i.n a3, a0, 4 +40214403: 189040 excw +40214406: 6c4010 excw +40214409: 401017 beq a0, a1, 4021444d +4021440c: 101704 excw +4021440f: 40 .byte 0x40 + +40214410 : +40214410: d0c112 addi a1, a1, -48 +40214413: 420c movi.n a2, 4 +40214415: b109 s32i.n a0, a1, 44 +40214417: a1c9 s32i.n a12, a1, 40 +40214419: fbfb85 call0 402103d4 +4021441c: 150266 bnei a2, -1, 40214435 +4021441f: 020c movi.n a2, 0 +40214421: fff701 l32r a0, 40214400 +40214424: 0000c0 callx0 a0 +40214427: fff131 l32r a3, 402143ec +4021442a: ffef21 l32r a2, 402143e8 +4021442d: 0020c0 memw +40214430: 0239 s32i.n a3, a2, 0 +40214432: 0904c5 call0 4021d480 +40214435: c41c movi.n a4, 28 +40214437: 013d mov.n a3, a1 +40214439: 020c movi.n a2, 0 +4021443b: fff201 l32r a0, 40214404 +4021443e: 0000c0 callx0 a0 +40214441: 0128 l32i.n a2, a1, 0 +40214443: fec222 addi a2, a2, -2 +40214446: 2322b6 bltui a2, 2, 4021446d +40214449: c41c movi.n a4, 28 +4021444b: 030c movi.n a3, 0 +4021444d: 012d mov.n a2, a1 +4021444f: b2f001 l32r a0, 40201010 <_irom0_text_start> +40214452: 0000c0 callx0 a0 +40214455: ffe631 l32r a3, 402143f0 +40214458: 420c movi.n a2, 4 +4021445a: 0020c0 memw +4021445d: 0329 s32i.n a2, a3, 0 +4021445f: 0129 s32i.n a2, a1, 0 +40214461: c41c movi.n a4, 28 +40214463: 013d mov.n a3, a1 +40214465: 020c movi.n a2, 0 +40214467: ffe801 l32r a0, 40214408 +4021446a: 0000c0 callx0 a0 +4021446d: 202110 or a2, a1, a1 +40214470: fc1485 call0 402105bc +40214473: efbbc1 l32r a12, 40210360 +40214476: 020c movi.n a2, 0 +40214478: 0c3d mov.n a3, a12 +4021447a: fbd8c5 call0 40210208 +4021447d: 0c3d mov.n a3, a12 +4021447f: 01a022 movi a2, 1 +40214482: fbd845 call0 40210208 +40214485: fbee05 call0 40210368 +40214488: c38601 l32r a0, 402052a0 +4021448b: 0000c0 callx0 a0 +4021448e: ffd621 l32r a2, 402143e8 +40214491: ffd831 l32r a3, 402143f4 +40214494: 0020c0 memw +40214497: 0248 l32i.n a4, a2, 0 +40214499: 203430 or a3, a4, a3 +4021449c: 0020c0 memw +4021449f: 0239 s32i.n a3, a2, 0 +402144a1: 0020c0 memw +402144a4: 0248 l32i.n a4, a2, 0 +402144a6: ffd431 l32r a3, 402143f8 +402144a9: 103430 and a3, a4, a3 +402144ac: 0020c0 memw +402144af: 0239 s32i.n a3, a2, 0 +402144b1: ffd221 l32r a2, 402143fc +402144b4: 230c movi.n a3, 2 +402144b6: 0020c0 memw +402144b9: 0248 l32i.n a4, a2, 0 +402144bb: 203430 or a3, a4, a3 +402144be: 0020c0 memw +402144c1: 0239 s32i.n a3, a2, 0 +402144c3: 0020c0 memw +402144c6: 0248 l32i.n a4, a2, 0 +402144c8: d37c movi.n a3, -3 +402144ca: 103430 and a3, a4, a3 +402144cd: 0020c0 memw +402144d0: 0239 s32i.n a3, a2, 0 +402144d2: ffce01 l32r a0, 4021440c +402144d5: 0000c0 callx0 a0 +402144d8: b108 l32i.n a0, a1, 44 +402144da: a1c8 l32i.n a12, a1, 40 +402144dc: 30c112 addi a1, a1, 48 +402144df: f00d ret.n +402144e1: 000000 ill +402144e4: f0c112 addi a1, a1, -16 +402144e7: 21c9 s32i.n a12, a1, 8 +402144e9: efb5c1 l32r a12, 402103c0 +402144ec: 11d9 s32i.n a13, a1, 4 +402144ee: 036102 s32i a0, a1, 12 +402144f1: 0061e2 s32i a14, a1, 0 +402144f4: 020c movi.n a2, 0 +402144f6: efb3d1 l32r a13, 402103c4 +402144f9: 004c22 s8i a2, a12, 0 +402144fc: 000d22 l8ui a2, a13, 0 +402144ff: 0ded mov.n a14, a13 +40214501: 045216 beqz a2, 4021454a +40214504: 0b8105 call0 4021fd18 +40214507: 92bc beqz.n a2, 40214544 +40214509: efb0e1 l32r a14, 402103cc +4021450c: efb131 l32r a3, 402103d0 +4021450f: 000e22 l8ui a2, a14, 0 +40214512: 232a add.n a2, a3, a2 +40214514: 000222 l8ui a2, a2, 0 +40214517: 4e3226 beqi a2, 3, 40214569 +4021451a: 0e42f6 bgeui a2, 4, 4021452c +4021451d: 421226 beqi a2, 1, 40214563 +40214520: 6c2266 bnei a2, 2, 40214590 +40214523: fe2d85 call0 402127fc +40214526: 001986 j 40214590 +40214529: 000000 ill +4021452c: 515226 beqi a2, 5, 40214581 +4021452f: 4652b6 bltui a2, 5, 40214579 +40214532: 5a6266 bnei a2, 6, 40214590 +40214535: fd8a21 l32r a2, 40213b60 +40214538: 000232 l8ui a3, a2, 0 +4021453b: fd8821 l32r a2, 40213b5c +4021453e: ff62c5 call0 40213b6c +40214541: 0012c6 j 40214590 +40214544: 0a73c5 call0 4021ec84 +40214547: fbe216 beqz a2, 40214509 +4021454a: 000e22 l8ui a2, a14, 0 +4021454d: ef9bd1 l32r a13, 402103bc +40214550: 05d256 bnez a2, 402145b1 +40214553: 0d2d mov.n a2, a13 +40214555: be9901 l32r a0, 40203fbc +40214558: 0000c0 callx0 a0 +4021455b: 020c movi.n a2, 0 +4021455d: 001dc6 j 402145d8 +40214560: 000000 ill +40214563: fe3145 call0 40212878 +40214566: 000986 j 40214590 +40214569: f5de21 l32r a2, 40211ce4 +4021456c: 000232 l8ui a3, a2, 0 +4021456f: f5dc21 l32r a2, 40211ce0 +40214572: fd77c5 call0 40211cf0 +40214575: 0005c6 j 40214590 +40214578: e94500 excw +4021457b: ff .byte 0xff +4021457c: 000406 j 40214590 +4021457f: 210000 srai a0, a0, 0 +40214582: f498 l32i.n a9, a4, 60 +40214584: 000232 l8ui a3, a2, 0 +40214587: f49621 l32r a2, 402117e0 +4021458a: 000222 l8ui a2, a2, 0 +4021458d: fd2605 call0 402117f0 +40214590: 000d22 l8ui a2, a13, 0 +40214593: 220b addi.n a2, a2, -1 +40214595: 004d22 s8i a2, a13, 0 +40214598: 000e22 l8ui a2, a14, 0 +4021459b: 221b addi.n a2, a2, 1 +4021459d: 742020 extui a2, a2, 0, 8 +402145a0: 004e22 s8i a2, a14, 0 +402145a3: 029226 beqi a2, 10, 402145a9 +402145a6: ffd486 j 402144fc +402145a9: 020c movi.n a2, 0 +402145ab: 004e22 s8i a2, a14, 0 +402145ae: ffd286 j 402144fc +402145b1: 0a2105 call0 4021e7c4 +402145b4: 002256 bnez a2, 402145ba +402145b7: 09f245 call0 4021e4dc +402145ba: 120c movi.n a2, 1 +402145bc: 0b9c85 call0 4021ff88 +402145bf: 0d2d mov.n a2, a13 +402145c1: be7e01 l32r a0, 40203fbc +402145c4: 0000c0 callx0 a0 +402145c7: 202dd0 or a2, a13, a13 +402145ca: 150c movi.n a5, 1 +402145cc: 040c movi.n a4, 0 +402145ce: a30c movi.n a3, 10 +402145d0: be7a01 l32r a0, 40203fb8 +402145d3: 0000c0 callx0 a0 +402145d6: 120c movi.n a2, 1 +402145d8: 004c22 s8i a2, a12, 0 +402145db: 3108 l32i.n a0, a1, 12 +402145dd: 21c8 l32i.n a12, a1, 8 +402145df: 11d8 l32i.n a13, a1, 4 +402145e1: 01e8 l32i.n a14, a1, 0 +402145e3: 10c112 addi a1, a1, 16 +402145e6: f00d ret.n +402145e8: 0808 l32i.n a0, a8, 0 +402145ea: 106000 and a6, a0, a0 +402145ed: 0008 l32i.n a0, a0, 0 +402145ef: 60 .byte 0x60 + +402145f0 : +402145f0: f0c112 addi a1, a1, -16 +402145f3: 21c9 s32i.n a12, a1, 8 +402145f5: ef5ac1 l32r a12, 40210360 +402145f8: 020c movi.n a2, 0 +402145fa: 0c3d mov.n a3, a12 +402145fc: 3109 s32i.n a0, a1, 12 +402145fe: fbc085 call0 40210208 +40214601: 0c3d mov.n a3, a12 +40214603: 120c movi.n a2, 1 +40214605: fbc005 call0 40210208 +40214608: fff851 l32r a5, 402145e8 +4021460b: cfae42 movi a4, 0xfffffecf +4021460e: 0020c0 memw +40214611: 0528 l32i.n a2, a5, 0 +40214613: 00a132 movi a3, 0x100 +40214616: 102240 and a2, a2, a4 +40214619: 202230 or a2, a2, a3 +4021461c: 0020c0 memw +4021461f: 0529 s32i.n a2, a5, 0 +40214621: fff221 l32r a2, 402145ec +40214624: 3108 l32i.n a0, a1, 12 +40214626: 0020c0 memw +40214629: 0258 l32i.n a5, a2, 0 +4021462b: 21c8 l32i.n a12, a1, 8 +4021462d: 104540 and a4, a5, a4 +40214630: 203430 or a3, a4, a3 +40214633: 0020c0 memw +40214636: 0239 s32i.n a3, a2, 0 +40214638: ef4b31 l32r a3, 40210364 +4021463b: 420c movi.n a2, 4 +4021463d: 0020c0 memw +40214640: 0348 l32i.n a4, a3, 0 +40214642: 10c112 addi a1, a1, 16 +40214645: 202420 or a2, a4, a2 +40214648: 0020c0 memw +4021464b: 0329 s32i.n a2, a3, 0 +4021464d: f00d ret.n +4021464f: 83c000 moveqz a12, a0, a0 +40214652: fe .byte 0xfe +40214653: 3f .byte 0x3f + +40214654 : +40214654: ffff21 l32r a2, 40214650 +40214657: f00d ret.n +40214659: 000000 ill +4021465c: 862c movi.n a6, 40 +4021465e: fe .byte 0xfe +4021465f: 3f .byte 0x3f +40214660: fe8630 excw +40214663: 3f .byte 0x3f +40214664: 24cc bnez.n a4, 4021466a +40214666: 00 .byte 00 +40214667: 40 .byte 0x40 + +40214668 : +40214668: f0c112 addi a1, a1, -16 +4021466b: 0238 l32i.n a3, a2, 0 +4021466d: 3109 s32i.n a0, a1, 12 +4021466f: 110326 beqi a3, -1, 40214684 +40214672: fffa31 l32r a3, 4021465c +40214675: fffa21 l32r a2, 40214660 +40214678: 1ba142 movi a4, 0x11b +4021467b: fffa01 l32r a0, 40214664 +4021467e: 0000c0 callx0 a0 +40214681: ffff06 j 40214681 +40214684: 3108 l32i.n a0, a1, 12 +40214686: 030c movi.n a3, 0 +40214688: 1239 s32i.n a3, a2, 4 +4021468a: 2239 s32i.n a3, a2, 8 +4021468c: 3239 s32i.n a3, a2, 12 +4021468e: 4239 s32i.n a3, a2, 16 +40214690: 10c112 addi a1, a1, 16 +40214693: f00d ret.n +40214695: 000000 ill +40214698: dd68 l32i.n a6, a13, 52 +4021469a: fe .byte 0xfe +4021469b: 3f .byte 0x3f +4021469c: dd6c movi.n a13, -19 +4021469e: fe .byte 0xfe +4021469f: 3f .byte 0x3f +402146a0: fe8d04 excw +402146a3: 3f .byte 0x3f +402146a4: 19ec bnez.n a9, 402146c9 +402146a6: 6c4010 excw +402146a9: 1019 s32i.n a1, a0, 4 +402146ab: 40 .byte 0x40 + +402146ac : +402146ac: f0c112 addi a1, a1, -16 +402146af: 11d9 s32i.n a13, a1, 4 +402146b1: 01e9 s32i.n a14, a1, 0 +402146b3: 3109 s32i.n a0, a1, 12 +402146b5: 21c9 s32i.n a12, a1, 8 +402146b7: c2fa01 l32r a0, 402052a0 +402146ba: 0000c0 callx0 a0 +402146bd: b73121 l32r a2, 40202384 +402146c0: fff8d1 l32r a13, 402146a0 +402146c3: 0020c0 memw +402146c6: 0248 l32i.n a4, a2, 0 +402146c8: b72a21 l32r a2, 40202370 +402146cb: 0020c0 memw +402146ce: 02e8 l32i.n a14, a2, 0 +402146d0: 0dc8 l32i.n a12, a13, 0 +402146d2: 06cc16 beqz a12, 40214742 +402146d5: 1c28 l32i.n a2, a12, 4 +402146d7: c03240 sub a3, a2, a4 +402146da: 5e13e6 bgei a3, 1, 4021473c +402146dd: ffee31 l32r a3, 40214698 +402146e0: 3c58 l32i.n a5, a12, 12 +402146e2: 03c9 s32i.n a12, a3, 0 +402146e4: ffee31 l32r a3, 4021469c +402146e7: 0359 s32i.n a5, a3, 0 +402146e9: 0c38 l32i.n a3, a12, 0 +402146eb: 0d39 s32i.n a3, a13, 0 +402146ed: f37c movi.n a3, -1 +402146ef: 0c39 s32i.n a3, a12, 0 +402146f1: 2c38 l32i.n a3, a12, 8 +402146f3: 53ac beqz.n a3, 4021471c +402146f5: b71e51 l32r a5, 40202370 +402146f8: c2e361 l32r a6, 40205284 +402146fb: 0020c0 memw +402146fe: 0558 l32i.n a5, a5, 0 +40214700: c055e0 sub a5, a5, a14 +40214703: 07b657 bgeu a6, a5, 4021470e +40214706: 343a add.n a3, a4, a3 +40214708: 000106 j 40214710 +4021470b: 000000 ill +4021470e: 323a add.n a3, a2, a3 +40214710: 1c39 s32i.n a3, a12, 4 +40214712: 1c28 l32i.n a2, a12, 4 +40214714: 0c3d mov.n a3, a12 +40214716: ffe301 l32r a0, 402146a4 +40214719: 0000c0 callx0 a0 +4021471c: c2e201 l32r a0, 402052a4 +4021471f: 0000c0 callx0 a0 +40214722: 4c28 l32i.n a2, a12, 16 +40214724: 3c38 l32i.n a3, a12, 12 +40214726: 0003c0 callx0 a3 +40214729: c2dd01 l32r a0, 402052a0 +4021472c: 0000c0 callx0 a0 +4021472f: b71521 l32r a2, 40202384 +40214732: 0020c0 memw +40214735: 0248 l32i.n a4, a2, 0 +40214737: ffe546 j 402146d0 +4021473a: 010000 slli a0, a0, 32 +4021473d: ffdb addi.n a15, a15, 13 +4021473f: 0000c0 callx0 a0 +40214742: c2d801 l32r a0, 402052a4 +40214745: 0000c0 callx0 a0 +40214748: 3108 l32i.n a0, a1, 12 +4021474a: 21c8 l32i.n a12, a1, 8 +4021474c: 11d8 l32i.n a13, a1, 4 +4021474e: 01e8 l32i.n a14, a1, 0 +40214750: 10c112 addi a1, a1, 16 +40214753: f00d ret.n +40214755: 000000 ill +40214758: f0c112 addi a1, a1, -16 +4021475b: 0228 l32i.n a2, a2, 0 +4021475d: 3109 s32i.n a0, a1, 12 +4021475f: 12cc bnez.n a2, 40214764 +40214761: fff485 call0 402146ac +40214764: 3108 l32i.n a0, a1, 12 +40214766: 10c112 addi a1, a1, 16 +40214769: f00d ret.n +4021476b: 1aa000 excw +4021476e: 084010 excw +40214771: fe8d excw +40214773: 3f .byte 0x3f +40214774: 4758 l32i.n a5, a7, 16 +40214776: 304021 l32r a2, 401e0878 <_lit4_end+0xda54c> +40214779: 600006 j 4022c77d +4021477c: 000620 excw +4021477f: 60 .byte 0x60 + +40214780 : +40214780: f0c112 addi a1, a1, -16 +40214783: ffc721 l32r a2, 402146a0 +40214786: 3109 s32i.n a0, a1, 12 +40214788: 21c9 s32i.n a12, a1, 8 +4021478a: 11d9 s32i.n a13, a1, 4 +4021478c: 0c0c movi.n a12, 0 +4021478e: fff731 l32r a3, 4021476c +40214791: 0c4d mov.n a4, a12 +40214793: 02c9 s32i.n a12, a2, 0 +40214795: a20c movi.n a2, 10 +40214797: ee7201 l32r a0, 40210160 +4021479a: 0000c0 callx0 a0 +4021479d: ee6d31 l32r a3, 40210154 +402147a0: 4d0c movi.n a13, 4 +402147a2: 0020c0 memw +402147a5: 0328 l32i.n a2, a3, 0 +402147a7: 2022d0 or a2, a2, a13 +402147aa: 0020c0 memw +402147ad: 0329 s32i.n a2, a3, 0 +402147af: 00a422 movi a2, 0x400 +402147b2: ee6c01 l32r a0, 40210164 +402147b5: 0000c0 callx0 a0 +402147b8: ffef21 l32r a2, 40214774 +402147bb: ffed41 l32r a4, 40214770 +402147be: 0d5d mov.n a5, a13 +402147c0: f31c movi.n a3, 31 +402147c2: fe5401 l32r a0, 40214114 +402147c5: 0000c0 callx0 a0 +402147c8: ffec21 l32r a2, 40214778 +402147cb: 88a032 movi a3, 136 +402147ce: 0020c0 memw +402147d1: 02c9 s32i.n a12, a2, 0 +402147d3: f14b21 l32r a2, 40210d00 +402147d6: 3108 l32i.n a0, a1, 12 +402147d8: 0020c0 memw +402147db: 0239 s32i.n a3, a2, 0 +402147dd: ffe721 l32r a2, 4021477c +402147e0: 11d8 l32i.n a13, a1, 4 +402147e2: 0020c0 memw +402147e5: 02c9 s32i.n a12, a2, 0 +402147e7: 21c8 l32i.n a12, a1, 8 +402147e9: 10c112 addi a1, a1, 16 +402147ec: f00d ret.n +402147ee: 0c0000 excw +402147f1: 423263 excw +402147f4: a53232 excw +402147f7: 32dc bnez.n a2, 4021480e +402147f9: 321852 l16ui a5, a8, 100 +402147fc: af .byte 0xaf +402147fd: 4232b2 excw +40214800: 0c39 s32i.n a3, a12, 0 +40214802: f00d02 l8ui a0, a13, 240 +40214805: 000000 ill +40214808: 22f4e2 excw +4021480b: 7db440 excw +4021480e: d04022 s8i a2, a0, 208 +40214811: 101c movi.n a0, 17 +40214813: 2a8440 excw +40214816: 304021 l32r a2, 401e0918 <_lit4_end+0xda5ec> +40214819: fe8d excw +4021481b: 3f .byte 0x3f +4021481c: 4ac8 l32i.n a12, a10, 16 +4021481e: f04021 l32r a2, 40210920 +40214821: 402147 blt a1, a4, 40214865 +40214824: 7ea8 l32i.n a10, a14, 28 +40214826: 2c4022 s8i a2, a0, 44 +40214829: fe8d excw +4021482b: 3f .byte 0x3f +4021482c: 214a90 srai a4, a9, 10 +4021482f: f4ce40 extui a12, a4, 14, 16 +40214832: 9f4022 s8i a2, a0, 159 +40214835: 4022f4 excw +40214838: f49c beqz.n a4, 4021485b +4021483a: 22 .byte 0x22 +4021483b: 40 .byte 0x40 + +4021483c : +4021483c: a0c112 addi a1, a1, -96 +4021483f: 1361f2 s32i a15, a1, 76 +40214842: 02f8 l32i.n a15, a2, 0 +40214844: 1561d2 s32i a13, a1, 84 +40214847: 1461e2 s32i a14, a1, 80 +4021484a: 176102 s32i a0, a1, 92 +4021484d: 1661c2 s32i a12, a1, 88 +40214850: c139 s32i.n a3, a1, 48 +40214852: 02dd mov.n a13, a2 +40214854: 04ed mov.n a14, a4 +40214856: 6fdc bnez.n a15, 40214870 +40214858: ffec31 l32r a3, 40214808 +4021485b: 050c movi.n a5, 0 +4021485d: c0a042 movi a4, 192 +40214860: 44a022 movi a2, 68 +40214863: b32801 l32r a0, 40201504 +40214866: 0000c0 callx0 a0 +40214869: 0d29 s32i.n a2, a13, 0 +4021486b: 02cd mov.n a12, a2 +4021486d: 174216 beqz a2, 402149e5 +40214870: 322d22 l32i a2, a13, 200 +40214873: 015256 bnez a2, 4021488c +40214876: f8e821 l32r a2, 40212c18 +40214879: 000222 l8ui a2, a2, 0 +4021487c: 041266 bnei a2, 1, 40214884 +4021487f: c128 l32i.n a2, a1, 48 +40214881: fe3105 call0 40212b94 +40214884: f8c021 l32r a2, 40212b84 +40214887: 0228 l32i.n a2, a2, 0 +40214889: 000086 j 4021488f +4021488c: 00a022 movi a2, 0 +4021488f: 0b6c22 s32i a2, a12, 44 +40214892: 65a022 movi a2, 101 +40214895: 3a4c22 s8i a2, a12, 58 +40214898: 77a022 movi a2, 119 +4021489b: 3b4c22 s8i a2, a12, 59 +4021489e: ffdb21 l32r a2, 4021480c +402148a1: 0c2132 l32i a3, a1, 48 +402148a4: 5c29 s32i.n a2, a12, 20 +402148a6: ffda21 l32r a2, 40214810 +402148a9: 7cd9 s32i.n a13, a12, 28 +402148ab: 6c29 s32i.n a2, a12, 24 +402148ad: 640c movi.n a4, 6 +402148af: 33cc22 addi a2, a12, 51 +402148b2: b1d801 l32r a0, 40201014 <_irom0_text_start+0x4> +402148b5: 0000c0 callx0 a0 +402148b8: 322d22 l32i a2, a13, 200 +402148bb: 06b256 bnez a2, 4021492a +402148be: ffd521 l32r a2, 40214814 +402148c1: ac29 s32i.n a2, a12, 40 +402148c3: fc8b05 call0 40211174 +402148c6: 081266 bnei a2, 1, 402148d2 +402148c9: 020c movi.n a2, 0 +402148cb: a129 s32i.n a2, a1, 40 +402148cd: 9129 s32i.n a2, a1, 36 +402148cf: 000246 j 402148dc +402148d2: 0e28 l32i.n a2, a14, 0 +402148d4: a129 s32i.n a2, a1, 40 +402148d6: 1e28 l32i.n a2, a14, 4 +402148d8: 9129 s32i.n a2, a1, 36 +402148da: 2e28 l32i.n a2, a14, 8 +402148dc: ffcf61 l32r a6, 40214818 +402148df: 8129 s32i.n a2, a1, 32 +402148e1: 0628 l32i.n a2, a6, 0 +402148e3: 06ed mov.n a14, a6 +402148e5: 014256 bnez a2, 402148fd +402148e8: ffc831 l32r a3, 40214808 +402148eb: 00a052 movi a5, 0 +402148ee: f2a042 movi a4, 242 +402148f1: 50a022 movi a2, 80 +402148f4: b30401 l32r a0, 40201504 +402148f7: 0000c0 callx0 a0 +402148fa: 006e22 s32i a2, a14, 0 +402148fd: 0e48 l32i.n a4, a14, 0 +402148ff: ffc721 l32r a2, 4021481c +40214902: a50c movi.n a5, 10 +40214904: c31c movi.n a3, 28 +40214906: fe0301 l32r a0, 40214114 +40214909: 0000c0 callx0 a0 +4021490c: ffc621 l32r a2, 40214824 +4021490f: ffc471 l32r a7, 40214820 +40214912: 0129 s32i.n a2, a1, 0 +40214914: 0d6d mov.n a6, a13 +40214916: 20c152 addi a5, a1, 32 +40214919: 24c142 addi a4, a1, 36 +4021491c: 28c132 addi a3, a1, 40 +4021491f: 0c2d mov.n a2, a12 +40214921: 142545 call0 40228b78 +40214924: 0cfd mov.n a15, a12 +40214926: 002ec6 j 402149e5 +40214929: 0e2800 excw +4021492c: 20c152 addi a5, a1, 32 +4021492f: a129 s32i.n a2, a1, 40 +40214931: 1e28 l32i.n a2, a14, 4 +40214933: 24c142 addi a4, a1, 36 +40214936: 9129 s32i.n a2, a1, 36 +40214938: 2e28 l32i.n a2, a14, 8 +4021493a: 28c132 addi a3, a1, 40 +4021493d: 8129 s32i.n a2, a1, 32 +4021493f: 0c2d mov.n a2, a12 +40214941: 141fc5 call0 40228b40 +40214944: ffb961 l32r a6, 40214828 +40214947: 0628 l32i.n a2, a6, 0 +40214949: 06fd mov.n a15, a6 +4021494b: 22dc bnez.n a2, 40214961 +4021494d: ffae31 l32r a3, 40214808 +40214950: 050c movi.n a5, 0 +40214952: 00a142 movi a4, 0x100 +40214955: 50a022 movi a2, 80 +40214958: b2eb01 l32r a0, 40201504 +4021495b: 0000c0 callx0 a0 +4021495e: 006f22 s32i a2, a15, 0 +40214961: 0f48 l32i.n a4, a15, 0 +40214963: ffb221 l32r a2, 4021482c +40214966: a50c movi.n a5, 10 +40214968: d31c movi.n a3, 29 +4021496a: fdea01 l32r a0, 40214114 +4021496d: 0000c0 callx0 a0 +40214970: ffad21 l32r a2, 40214824 +40214973: ffab71 l32r a7, 40214820 +40214976: 0129 s32i.n a2, a1, 0 +40214978: 0d6d mov.n a6, a13 +4021497a: 20c152 addi a5, a1, 32 +4021497d: 24c142 addi a4, a1, 36 +40214980: 28c132 addi a3, a1, 40 +40214983: 0c2d mov.n a2, a12 +40214985: 141f05 call0 40228b78 +40214988: f1f321 l32r a2, 40211154 +4021498b: 0cfd mov.n a15, a12 +4021498d: 000222 l8ui a2, a2, 0 +40214990: 051216 beqz a2, 402149e5 +40214993: 0e2d mov.n a2, a14 +40214995: 10bfc5 call0 40225594 +40214998: ffa621 l32r a2, 40214830 +4021499b: b5ac01 l32r a0, 4020204c +4021499e: 0000c0 callx0 a0 +402149a1: 230122 l8ui a2, a1, 35 +402149a4: 240172 l8ui a7, a1, 36 +402149a7: 6129 s32i.n a2, a1, 24 +402149a9: 220122 l8ui a2, a1, 34 +402149ac: 2b0162 l8ui a6, a1, 43 +402149af: 5129 s32i.n a2, a1, 20 +402149b1: 210122 l8ui a2, a1, 33 +402149b4: 2a0152 l8ui a5, a1, 42 +402149b7: 4129 s32i.n a2, a1, 16 +402149b9: 200122 l8ui a2, a1, 32 +402149bc: 290142 l8ui a4, a1, 41 +402149bf: 3129 s32i.n a2, a1, 12 +402149c1: 270122 l8ui a2, a1, 39 +402149c4: 280132 l8ui a3, a1, 40 +402149c7: 2129 s32i.n a2, a1, 8 +402149c9: 260122 l8ui a2, a1, 38 +402149cc: 1129 s32i.n a2, a1, 4 +402149ce: 250122 l8ui a2, a1, 37 +402149d1: 0129 s32i.n a2, a1, 0 +402149d3: ff9821 l32r a2, 40214834 +402149d6: b59d01 l32r a0, 4020204c +402149d9: 0000c0 callx0 a0 +402149dc: ff9721 l32r a2, 40214838 +402149df: b59b01 l32r a0, 4020204c +402149e2: 0000c0 callx0 a0 +402149e5: 172102 l32i a0, a1, 92 +402149e8: 0f2d mov.n a2, a15 +402149ea: 1621c2 l32i a12, a1, 88 +402149ed: 1521d2 l32i a13, a1, 84 +402149f0: 1421e2 l32i a14, a1, 80 +402149f3: 1321f2 l32i a15, a1, 76 +402149f6: 60c112 addi a1, a1, 96 +402149f9: f00d ret.n + ... + +402149fc : +402149fc: f0c112 addi a1, a1, -16 +402149ff: 0261c2 s32i a12, a1, 8 +40214a02: 20c220 or a12, a2, a2 +40214a05: 322222 l32i a2, a2, 200 +40214a08: 036102 s32i a0, a1, 12 +40214a0b: 11d9 s32i.n a13, a1, 4 +40214a0d: 32dc bnez.n a2, 40214a24 +40214a0f: 0c28 l32i.n a2, a12, 0 +40214a11: 1424c5 call0 40228c60 +40214a14: ff8131 l32r a3, 40214818 +40214a17: 1ca142 movi a4, 0x11c +40214a1a: 0328 l32i.n a2, a3, 0 +40214a1c: 03dd mov.n a13, a3 +40214a1e: 22ec bnez.n a2, 40214a44 +40214a20: 000b46 j 40214a51 +40214a23: cc2100 excw +40214a26: 0222f1 l32r a15, 401d52b0 <_lit4_end+0xcef84> +40214a29: 221600 excw +40214a2c: cf0500 excw +40214a2f: 2c2210 excw +40214a32: 22c500 excw +40214a35: 7c3114 excw +40214a38: ff .byte 0xff +40214a39: 002322 l32i a2, a3, 0 +40214a3c: 03dd mov.n a13, a3 +40214a3e: 00f216 beqz a2, 40214a51 +40214a41: 27a142 movi a4, 0x127 +40214a44: ff7131 l32r a3, 40214808 +40214a47: b2b001 l32r a0, 40201508 +40214a4a: 0000c0 callx0 a0 +40214a4d: 020c movi.n a2, 0 +40214a4f: 0d29 s32i.n a2, a13, 0 +40214a51: 0c28 l32i.n a2, a12, 0 +40214a53: e28c beqz.n a2, 40214a65 +40214a55: ff6c31 l32r a3, 40214808 +40214a58: 2da142 movi a4, 0x12d +40214a5b: b2ab01 l32r a0, 40201508 +40214a5e: 0000c0 callx0 a0 +40214a61: 020c movi.n a2, 0 +40214a63: 0c29 s32i.n a2, a12, 0 +40214a65: 3108 l32i.n a0, a1, 12 +40214a67: 21c8 l32i.n a12, a1, 8 +40214a69: 11d8 l32i.n a13, a1, 4 +40214a6b: 10c112 addi a1, a1, 16 +40214a6e: f00d ret.n + +40214a70 : +40214a70: 742020 extui a2, a2, 0, 8 +40214a73: 62cc bnez.n a2, 40214a7d +40214a75: b43b21 l32r a2, 40201b64 +40214a78: 4238 l32i.n a3, a2, 16 +40214a7a: 0001c6 j 40214a85 +40214a7d: 0d1266 bnei a2, 1, 40214a8e +40214a80: b43921 l32r a2, 40201b64 +40214a83: 5238 l32i.n a3, a2, 20 +40214a85: 020c movi.n a2, 0 +40214a87: 031327 beq a3, a2, 40214a8e +40214a8a: 0328 l32i.n a2, a3, 0 +40214a8c: f00d ret.n +40214a8e: f00d ret.n +40214a90: f0c112 addi a1, a1, -16 +40214a93: 21c9 s32i.n a12, a1, 8 +40214a95: 02cd mov.n a12, a2 +40214a97: 120c movi.n a2, 1 +40214a99: 3109 s32i.n a0, a1, 12 +40214a9b: fffd45 call0 40214a70 +40214a9e: 0c38 l32i.n a3, a12, 0 +40214aa0: a3dc bnez.n a3, 40214abe +40214aa2: a28c beqz.n a2, 40214ab0 +40214aa4: 4248 l32i.n a4, a2, 16 +40214aa6: 023d mov.n a3, a2 +40214aa8: 1c28 l32i.n a2, a12, 4 +40214aaa: 0004c0 callx0 a4 +40214aad: 000346 j 40214abe +40214ab0: 012cc2 l32i a12, a12, 4 +40214ab3: 042c22 l32i a2, a12, 16 +40214ab6: 0c2905 call0 40220d48 +40214ab9: 0c2d mov.n a2, a12 +40214abb: 142e45 call0 40228da0 +40214abe: 3108 l32i.n a0, a1, 12 +40214ac0: 21c8 l32i.n a12, a1, 8 +40214ac2: 10c112 addi a1, a1, 16 +40214ac5: f00d ret.n +40214ac7: c11200 mul16u a1, a2, a0 +40214aca: 21c9f0 srai a12, a15, 9 +40214acd: 02cd mov.n a12, a2 +40214acf: 020c movi.n a2, 0 +40214ad1: 3109 s32i.n a0, a1, 12 +40214ad3: fff9c5 call0 40214a70 +40214ad6: 0c38 l32i.n a3, a12, 0 +40214ad8: a3dc bnez.n a3, 40214af6 +40214ada: a28c beqz.n a2, 40214ae8 +40214adc: 4248 l32i.n a4, a2, 16 +40214ade: 023d mov.n a3, a2 +40214ae0: 1c28 l32i.n a2, a12, 4 +40214ae2: 0004c0 callx0 a4 +40214ae5: 000346 j 40214af6 +40214ae8: 012cc2 l32i a12, a12, 4 +40214aeb: 042c22 l32i a2, a12, 16 +40214aee: 0c2585 call0 40220d48 +40214af1: 0c2d mov.n a2, a12 +40214af3: 142ac5 call0 40228da0 +40214af6: 3108 l32i.n a0, a1, 12 +40214af8: 21c8 l32i.n a12, a1, 8 +40214afa: 10c112 addi a1, a1, 16 +40214afd: f00d ret.n + ... + +40214b00 : +40214b00: f0c112 addi a1, a1, -16 +40214b03: 21c9 s32i.n a12, a1, 8 +40214b05: 11d9 s32i.n a13, a1, 4 +40214b07: 3109 s32i.n a0, a1, 12 +40214b09: 01e9 s32i.n a14, a1, 0 +40214b0b: 02dd mov.n a13, a2 +40214b0d: 02c8 l32i.n a12, a2, 0 +40214b0f: 199366 bnei a3, 10, 40214b2c +40214b12: 0c2d mov.n a2, a12 +40214b14: b37301 l32r a0, 402018e0 +40214b17: 0000c0 callx0 a0 +40214b1a: 02ed mov.n a14, a2 +40214b1c: a30c movi.n a3, 10 +40214b1e: 0c2d mov.n a2, a12 +40214b20: b4eb01 l32r a0, 40201ecc +40214b23: 0000c0 callx0 a0 +40214b26: 0d29 s32i.n a2, a13, 0 +40214b28: 000206 j 40214b34 +40214b2b: e0c000 subx4 a12, a0, a0 +40214b2e: c4c034 excw +40214b31: 02c941 l32r a4, 401d5658 <_lit4_end+0xcf32c> +40214b34: 3108 l32i.n a0, a1, 12 +40214b36: 0e2d mov.n a2, a14 +40214b38: 21c8 l32i.n a12, a1, 8 +40214b3a: 11d8 l32i.n a13, a1, 4 +40214b3c: 01e8 l32i.n a14, a1, 0 +40214b3e: 10c112 addi a1, a1, 16 +40214b41: f00d ret.n +40214b43: d85c00 excw +40214b46: ff .byte 0xff +40214b47: 3f .byte 0x3f +40214b48: d848 l32i.n a4, a8, 52 +40214b4a: ff .byte 0xff +40214b4b: 3f .byte 0x3f +40214b4c: b0c112 addi a1, a1, -80 +40214b4f: 1261c2 s32i a12, a1, 72 +40214b52: f1f9 s32i.n a15, a1, 60 +40214b54: 02cd mov.n a12, a2 +40214b56: 03fd mov.n a15, a3 +40214b58: fffb21 l32r a2, 40214b44 +40214b5b: fffb31 l32r a3, 40214b48 +40214b5e: 048670 extui a8, a7, 6, 1 +40214b61: 1161d2 s32i a13, a1, 68 +40214b64: 832380 moveqz a2, a3, a8 +40214b67: 136102 s32i a0, a1, 76 +40214b6a: 1061e2 s32i a14, a1, 64 +40214b6d: 4149 s32i.n a4, a1, 16 +40214b6f: 07dd mov.n a13, a7 +40214b71: 028d mov.n a8, a2 +40214b73: 056747 bbci a7, 4, 40214b7c +40214b76: feaf22 movi a2, -2 +40214b79: 10d720 and a13, a7, a2 +40214b7c: 0440d0 extui a4, a13, 0, 1 +40214b7f: 022c movi.n a2, 32 +40214b81: 033c movi.n a3, 48 +40214b83: 932340 movnez a2, a3, a4 +40214b86: 024d mov.n a4, a2 +40214b88: 0e0c movi.n a14, 0 +40214b8a: 1f6d17 bbci a13, 1, 40214bad +40214b8d: 4128 l32i.n a2, a1, 16 +40214b8f: 09a2e7 bge a2, a14, 40214b9c +40214b92: 602020 neg a2, a2 +40214b95: 4129 s32i.n a2, a1, 16 +40214b97: de2c movi.n a14, 45 +40214b99: 000406 j 40214bad +40214b9c: be2c movi.n a14, 43 +40214b9e: 0bed27 bbsi a13, 2, 40214bad +40214ba1: 8e0c movi.n a14, 8 +40214ba3: 102de0 and a2, a13, a14 +40214ba6: 030c movi.n a3, 0 +40214ba8: 0e2c movi.n a14, 32 +40214baa: 83e320 moveqz a14, a3, a2 +40214bad: 4128 l32i.n a2, a1, 16 +40214baf: 070c movi.n a7, 0 +40214bb1: 82cc bnez.n a2, 40214bbd +40214bb3: 023c movi.n a2, 48 +40214bb5: 004122 s8i a2, a1, 0 +40214bb8: 130c movi.n a3, 1 +40214bba: 000c06 j 40214bee +40214bbd: 4128 l32i.n a2, a1, 16 +40214bbf: 073d mov.n a3, a7 +40214bc1: 92ac beqz.n a2, 40214bee +40214bc3: 053d mov.n a3, a5 +40214bc5: 10c122 addi a2, a1, 16 +40214bc8: 7149 s32i.n a4, a1, 28 +40214bca: 8159 s32i.n a5, a1, 32 +40214bcc: 9169 s32i.n a6, a1, 36 +40214bce: 5179 s32i.n a7, a1, 20 +40214bd0: 6189 s32i.n a8, a1, 24 +40214bd2: fff2c5 call0 40214b00 +40214bd5: 6188 l32i.n a8, a1, 24 +40214bd7: 5178 l32i.n a7, a1, 20 +40214bd9: 282a add.n a2, a8, a2 +40214bdb: 000222 l8ui a2, a2, 0 +40214bde: 317a add.n a3, a1, a7 +40214be0: 004322 s8i a2, a3, 0 +40214be3: 771b addi.n a7, a7, 1 +40214be5: 9168 l32i.n a6, a1, 36 +40214be7: 8158 l32i.n a5, a1, 32 +40214be9: 7148 l32i.n a4, a1, 28 +40214beb: fff386 j 40214bbd +40214bee: 121c movi.n a2, 17 +40214bf0: c06630 sub a6, a6, a3 +40214bf3: 318d27 bany a13, a2, 40214c28 +40214bf6: ae8c beqz.n a14, 40214c04 +40214bf8: 312f60 srai a2, a6, 31 +40214bfb: c02260 sub a2, a2, a6 +40214bfe: 052f20 extui a2, a2, 31, 1 +40214c01: c06620 sub a6, a6, a2 +40214c04: 0c2d mov.n a2, a12 +40214c06: 072c movi.n a7, 32 +40214c08: c05620 sub a5, a6, a2 +40214c0b: 5c5a add.n a5, a12, a5 +40214c0d: 0b15a6 blti a5, 1, 40214c1c +40214c10: 023f27 bltu a15, a2, 40214c16 +40214c13: 004272 s8i a7, a2, 0 +40214c16: 221b addi.n a2, a2, 1 +40214c18: fffb06 j 40214c08 +40214c1b: 050c00 extui a0, a0, 28, 1 +40214c1e: b35660 movgez a5, a6, a6 +40214c21: 660b addi.n a6, a6, -1 +40214c23: cc5a add.n a12, a12, a5 +40214c25: c06650 sub a6, a6, a5 +40214c28: 8e8c beqz.n a14, 40214c34 +40214c2a: 043fc7 bltu a15, a12, 40214c32 +40214c2d: 004ce2 s8i a14, a12, 0 +40214c30: 660b addi.n a6, a6, -1 +40214c32: cc1b addi.n a12, a12, 1 +40214c34: 0c2d mov.n a2, a12 +40214c36: 1fed47 bbsi a13, 4, 40214c59 +40214c39: c05620 sub a5, a6, a2 +40214c3c: 805c50 add a5, a12, a5 +40214c3f: 0a15a6 blti a5, 1, 40214c4d +40214c42: 023f27 bltu a15, a2, 40214c48 +40214c45: 004242 s8i a4, a2, 0 +40214c48: 221b addi.n a2, a2, 1 +40214c4a: fffac6 j 40214c39 +40214c4d: 040c movi.n a4, 0 +40214c4f: b34660 movgez a4, a6, a6 +40214c52: 660b addi.n a6, a6, -1 +40214c54: cc4a add.n a12, a12, a4 +40214c56: c06640 sub a6, a6, a4 +40214c59: 032d mov.n a2, a3 +40214c5b: 0c4d mov.n a4, a12 +40214c5d: 220b addi.n a2, a2, -1 +40214c5f: 0f0226 beqi a2, -1, 40214c72 +40214c62: 073f47 bltu a15, a4, 40214c6d +40214c65: 512a add.n a5, a1, a2 +40214c67: 000552 l8ui a5, a5, 0 +40214c6a: 004452 s8i a5, a4, 0 +40214c6d: 441b addi.n a4, a4, 1 +40214c6f: fffa86 j 40214c5d +40214c72: 2c3a add.n a2, a12, a3 +40214c74: 023d mov.n a3, a2 +40214c76: 052c movi.n a5, 32 +40214c78: c04630 sub a4, a6, a3 +40214c7b: 424a add.n a4, a2, a4 +40214c7d: 0b14a6 blti a4, 1, 40214c8c +40214c80: 023f37 bltu a15, a3, 40214c86 +40214c83: 004352 s8i a5, a3, 0 +40214c86: 331b addi.n a3, a3, 1 +40214c88: fffb06 j 40214c78 +40214c8b: 030c00 excw +40214c8e: 132102 l32i a0, a1, 76 +40214c91: a36360 movltz a6, a3, a6 +40214c94: 226a add.n a2, a2, a6 +40214c96: 1221c2 l32i a12, a1, 72 +40214c99: 1121d2 l32i a13, a1, 68 +40214c9c: 1021e2 l32i a14, a1, 64 +40214c9f: f1f8 l32i.n a15, a1, 60 +40214ca1: 50c112 addi a1, a1, 80 +40214ca4: f00d ret.n + ... + +40214ca8 : +40214ca8: 025d mov.n a5, a2 +40214caa: 960c movi.n a6, 9 +40214cac: 020c movi.n a2, 0 +40214cae: 0548 l32i.n a4, a5, 0 +40214cb0: 000432 l8ui a3, a4, 0 +40214cb3: d0c332 addi a3, a3, -48 +40214cb6: 743030 extui a3, a3, 0, 8 +40214cb9: 123637 bltu a6, a3, 40214ccf +40214cbc: 341b addi.n a3, a4, 1 +40214cbe: 0539 s32i.n a3, a5, 0 +40214cc0: a03220 addx4 a3, a2, a2 +40214cc3: 000422 l8ui a2, a4, 0 +40214cc6: 903320 addx2 a3, a3, a2 +40214cc9: d0c322 addi a2, a3, -48 +40214ccc: fff786 j 40214cae +40214ccf: f00d ret.n +40214cd1: 000000 ill +40214cd4: ffd870 excw +40214cd7: 3f .byte 0x3f + +40214cd8 : +40214cd8: b0c112 addi a1, a1, -80 +40214cdb: 330b addi.n a3, a3, -1 +40214cdd: 1061e2 s32i a14, a1, 64 +40214ce0: f1f9 s32i.n a15, a1, 60 +40214ce2: 136102 s32i a0, a1, 76 +40214ce5: 1261c2 s32i a12, a1, 72 +40214ce8: 1161d2 s32i a13, a1, 68 +40214ceb: 6129 s32i.n a2, a1, 24 +40214ced: 0149 s32i.n a4, a1, 0 +40214cef: 1159 s32i.n a5, a1, 4 +40214cf1: 2169 s32i.n a6, a1, 8 +40214cf3: 3179 s32i.n a7, a1, 12 +40214cf5: 4159 s32i.n a5, a1, 16 +40214cf7: 5169 s32i.n a6, a1, 20 +40214cf9: f23a add.n a15, a2, a3 +40214cfb: 07ed mov.n a14, a7 +40214cfd: 01bf27 bgeu a15, a2, 40214d02 +40214d00: ff7c movi.n a15, -1 +40214d02: 61d8 l32i.n a13, a1, 24 +40214d04: 0128 l32i.n a2, a1, 0 +40214d06: 000222 l8ui a2, a2, 0 +40214d09: 2e7216 beqz a2, 40214ff4 +40214d0c: 532c movi.n a3, 37 +40214d0e: 129237 bne a2, a3, 40214d24 +40214d11: 0c0c movi.n a12, 0 +40214d13: da2c movi.n a10, 45 +40214d15: bb2c movi.n a11, 43 +40214d17: 073c movi.n a7, 48 +40214d19: 042c movi.n a4, 32 +40214d1b: 850c movi.n a5, 8 +40214d1d: 460c movi.n a6, 4 +40214d1f: 091c movi.n a9, 16 +40214d21: 000446 j 40214d36 +40214d24: 02bfd7 bgeu a15, a13, 40214d2a +40214d27: 008646 j 40214f44 +40214d2a: 0084c6 j 40214f41 +40214d2d: 1792b7 bne a2, a11, 40214d48 +40214d30: 20cc60 or a12, a12, a6 +40214d33: 74c0c0 extui a12, a12, 0, 8 +40214d36: 0138 l32i.n a3, a1, 0 +40214d38: 231b addi.n a2, a3, 1 +40214d3a: 0129 s32i.n a2, a1, 0 +40214d3c: 010322 l8ui a2, a3, 1 +40214d3f: ea92a7 bne a2, a10, 40214d2d +40214d42: 20cc90 or a12, a12, a9 +40214d45: fffa86 j 40214d33 +40214d48: 05c266 bnei a2, 32, 40214d51 +40214d4b: 20cc50 or a12, a12, a5 +40214d4e: fff846 j 40214d33 +40214d51: 382c movi.n a8, 35 +40214d53: 059287 bne a2, a8, 40214d5c +40214d56: 20cc40 or a12, a12, a4 +40214d59: fff586 j 40214d33 +40214d5c: 089277 bne a2, a7, 40214d68 +40214d5f: 120c movi.n a2, 1 +40214d61: 20cc20 or a12, a12, a2 +40214d64: fff2c6 j 40214d33 +40214d67: c24200 excw +40214d6a: 4040d0 excw +40214d6d: 950c74 excw +40214d70: 093547 bltu a5, a4, 40214d7d +40214d73: 012d mov.n a2, a1 +40214d75: fff305 call0 40214ca8 +40214d78: 026d mov.n a6, a2 +40214d7a: 000d06 j 40214db2 +40214d7d: a42c movi.n a4, 42 +40214d7f: f67c movi.n a6, -1 +40214d81: 2d9247 bne a2, a4, 40214db2 +40214d84: 332b addi.n a3, a3, 2 +40214d86: 0139 s32i.n a3, a1, 0 +40214d88: 2e4b addi.n a2, a14, 4 +40214d8a: 831c movi.n a3, 24 +40214d8c: 0ca327 bge a3, a2, 40214d9c +40214d8f: 0123e7 blt a3, a14, 40214d94 +40214d92: 422c movi.n a2, 36 +40214d94: 02ed mov.n a14, a2 +40214d96: 4138 l32i.n a3, a1, 16 +40214d98: 000106 j 40214da0 +40214d9b: 513800 excw +40214d9e: 02ed mov.n a14, a2 +40214da0: 232a add.n a2, a3, a2 +40214da2: fcc222 addi a2, a2, -4 +40214da5: 0268 l32i.n a6, a2, 0 +40214da7: 0076d6 bgez a6, 40214db2 +40214daa: 021c movi.n a2, 16 +40214dac: 606060 neg a6, a6 +40214daf: 20cc20 or a12, a12, a2 +40214db2: 0128 l32i.n a2, a1, 0 +40214db4: b47c movi.n a4, -5 +40214db6: 000232 l8ui a3, a2, 0 +40214db9: 68a052 movi a5, 104 +40214dbc: 104340 and a4, a3, a4 +40214dbf: 069457 bne a4, a5, 40214dc9 +40214dc2: 221b addi.n a2, a2, 1 +40214dc4: 0129 s32i.n a2, a1, 0 +40214dc6: 000046 j 40214dcb +40214dc9: 030c movi.n a3, 0 +40214dcb: 0128 l32i.n a2, a1, 0 +40214dcd: 69a042 movi a4, 105 +40214dd0: 000222 l8ui a2, a2, 0 +40214dd3: 029247 bne a2, a4, 40214dd9 +40214dd6: 005e86 j 40214f54 +40214dd9: 273427 bltu a4, a2, 40214e04 +40214ddc: 845c movi.n a4, 88 +40214dde: 029247 bne a2, a4, 40214de4 +40214de1: 005906 j 40214f49 +40214de4: 0a3427 bltu a4, a2, 40214df2 +40214de7: 532c movi.n a3, 37 +40214de9: 029237 bne a2, a3, 40214def +40214dec: 005306 j 40214f3c +40214def: 005a86 j 40214f5d +40214df2: 63a042 movi a4, 99 +40214df5: 411247 beq a2, a4, 40214e3a +40214df8: 64a042 movi a4, 100 +40214dfb: 029247 bne a2, a4, 40214e01 +40214dfe: 005486 j 40214f54 +40214e01: 005606 j 40214f5d +40214e04: 73a042 movi a4, 115 +40214e07: 029247 bne a2, a4, 40214e0d +40214e0a: 001fc6 j 40214e8d +40214e0d: 143427 bltu a4, a2, 40214e25 +40214e10: 6fa042 movi a4, 111 +40214e13: 029247 bne a2, a4, 40214e19 +40214e16: 005ac6 j 40214f85 +40214e19: 70a032 movi a3, 112 +40214e1c: 029237 bne a2, a3, 40214e22 +40214e1f: 003c46 j 40214f14 +40214e22: 004dc6 j 40214f5d +40214e25: 75a042 movi a4, 117 +40214e28: 029247 bne a2, a4, 40214e2e +40214e2b: 005446 j 40214f80 +40214e2e: 78a042 movi a4, 120 +40214e31: 021247 beq a2, a4, 40214e37 +40214e34: 004946 j 40214f5d +40214e37: 0044c6 j 40214f4e +40214e3a: 022c movi.n a2, 32 +40214e3c: 10ec47 bbsi a12, 4, 40214e50 +40214e3f: 660b addi.n a6, a6, -1 +40214e41: 0b16a6 blti a6, 1, 40214e50 +40214e44: 023fd7 bltu a15, a13, 40214e4a +40214e47: 004d22 s8i a2, a13, 0 +40214e4a: dd1b addi.n a13, a13, 1 +40214e4c: fffbc6 j 40214e3f +40214e4f: 2e4b00 excw +40214e52: 831c movi.n a3, 24 +40214e54: 0ca327 bge a3, a2, 40214e64 +40214e57: 0123e7 blt a3, a14, 40214e5c +40214e5a: 422c movi.n a2, 36 +40214e5c: 02ed mov.n a14, a2 +40214e5e: 4138 l32i.n a3, a1, 16 +40214e60: 000106 j 40214e68 +40214e63: 513800 excw +40214e66: 02ed mov.n a14, a2 +40214e68: 232a add.n a2, a3, a2 +40214e6a: fcc222 addi a2, a2, -4 +40214e6d: 000222 l8ui a2, a2, 0 +40214e70: 023fd7 bltu a15, a13, 40214e76 +40214e73: 004d22 s8i a2, a13, 0 +40214e76: 2d1b addi.n a2, a13, 1 +40214e78: 032c movi.n a3, 32 +40214e7a: 660b addi.n a6, a6, -1 +40214e7c: 0216e6 bgei a6, 1, 40214e82 +40214e7f: 005946 j 40214fe8 +40214e82: 023f27 bltu a15, a2, 40214e88 +40214e85: 004232 s8i a3, a2, 0 +40214e88: 221b addi.n a2, a2, 1 +40214e8a: fffb06 j 40214e7a +40214e8d: 2e4b addi.n a2, a14, 4 +40214e8f: 831c movi.n a3, 24 +40214e91: 0ba327 bge a3, a2, 40214ea0 +40214e94: 0123e7 blt a3, a14, 40214e99 +40214e97: 422c movi.n a2, 36 +40214e99: 02ed mov.n a14, a2 +40214e9b: 4138 l32i.n a3, a1, 16 +40214e9d: 0000c6 j 40214ea4 +40214ea0: 5138 l32i.n a3, a1, 20 +40214ea2: 02ed mov.n a14, a2 +40214ea4: 232a add.n a2, a3, a2 +40214ea6: fcc222 addi a2, a2, -4 +40214ea9: 0238 l32i.n a3, a2, 0 +40214eab: ff8a21 l32r a2, 40214cd4 +40214eae: 8169 s32i.n a6, a1, 32 +40214eb0: 833230 moveqz a3, a2, a3 +40214eb3: 032d mov.n a2, a3 +40214eb5: 7139 s32i.n a3, a1, 28 +40214eb7: bd3e01 l32r a0, 402043b0 +40214eba: 0000c0 callx0 a0 +40214ebd: 024d mov.n a4, a2 +40214ebf: 7138 l32i.n a3, a1, 28 +40214ec1: 8168 l32i.n a6, a1, 32 +40214ec3: 052c movi.n a5, 32 +40214ec5: 11ec47 bbsi a12, 4, 40214eda +40214ec8: 660b addi.n a6, a6, -1 +40214eca: 261b addi.n a2, a6, 1 +40214ecc: 0aa427 bge a4, a2, 40214eda +40214ecf: 023fd7 bltu a15, a13, 40214ed5 +40214ed2: 004d52 s8i a5, a13, 0 +40214ed5: dd1b addi.n a13, a13, 1 +40214ed7: fffb46 j 40214ec8 +40214eda: 0d2d mov.n a2, a13 +40214edc: c052d0 sub a5, a2, a13 +40214edf: 0fa547 bge a5, a4, 40214ef2 +40214ee2: 053f27 bltu a15, a2, 40214eeb +40214ee5: 000352 l8ui a5, a3, 0 +40214ee8: 004252 s8i a5, a2, 0 +40214eeb: 221b addi.n a2, a2, 1 +40214eed: 331b addi.n a3, a3, 1 +40214eef: fffa46 j 40214edc +40214ef2: 020c movi.n a2, 0 +40214ef4: b32440 movgez a2, a4, a4 +40214ef7: dd2a add.n a13, a13, a2 +40214ef9: 0d2d mov.n a2, a13 +40214efb: 052c movi.n a5, 32 +40214efd: c03620 sub a3, a6, a2 +40214f00: 3d3a add.n a3, a13, a3 +40214f02: 022437 blt a4, a3, 40214f08 +40214f05: 0037c6 j 40214fe8 +40214f08: 023f27 bltu a15, a2, 40214f0e +40214f0b: 004252 s8i a5, a2, 0 +40214f0e: 221b addi.n a2, a2, 1 +40214f10: fffa46 j 40214efd +40214f13: 066600 excw +40214f16: 120c06 j 4021974a +40214f19: 20cc20 or a12, a12, a2 +40214f1c: 860c movi.n a6, 8 +40214f1e: 9e4b addi.n a9, a14, 4 +40214f20: 831c movi.n a3, 24 +40214f22: 5128 l32i.n a2, a1, 20 +40214f24: 06a397 bge a3, a9, 40214f2e +40214f27: 0123e7 blt a3, a14, 40214f2c +40214f2a: 492c movi.n a9, 36 +40214f2c: 4128 l32i.n a2, a1, 16 +40214f2e: 229a add.n a2, a2, a9 +40214f30: fcc222 addi a2, a2, -4 +40214f33: 0c7d mov.n a7, a12 +40214f35: 051c movi.n a5, 16 +40214f37: 0248 l32i.n a4, a2, 0 +40214f39: 002786 j 40214fdb +40214f3c: 043fd7 bltu a15, a13, 40214f44 +40214f3f: 522c movi.n a2, 37 +40214f41: 004d22 s8i a2, a13, 0 +40214f44: 2d1b addi.n a2, a13, 1 +40214f46: 002786 j 40214fe8 +40214f49: 024c movi.n a2, 64 +40214f4b: 20cc20 or a12, a12, a2 +40214f4e: 051c movi.n a5, 16 +40214f50: 000cc6 j 40214f87 +40214f53: 220c00 excw +40214f56: 20cc20 or a12, a12, a2 +40214f59: 0008c6 j 40214f80 +40214f5c: 3fd700 excw +40214f5f: 522c04 excw +40214f62: 004d22 s8i a2, a13, 0 +40214f65: 0138 l32i.n a3, a1, 0 +40214f67: 2d1b addi.n a2, a13, 1 +40214f69: 000342 l8ui a4, a3, 0 +40214f6c: 948c beqz.n a4, 40214f79 +40214f6e: 023f27 bltu a15, a2, 40214f74 +40214f71: 014d42 s8i a4, a13, 1 +40214f74: 2d2b addi.n a2, a13, 2 +40214f76: 001b86 j 40214fe8 +40214f79: 330b addi.n a3, a3, -1 +40214f7b: 0139 s32i.n a3, a1, 0 +40214f7d: 0019c6 j 40214fe8 +40214f80: a50c movi.n a5, 10 +40214f82: 000046 j 40214f87 +40214f85: 850c movi.n a5, 8 +40214f87: 6ca042 movi a4, 108 +40214f8a: 9e4b addi.n a9, a14, 4 +40214f8c: 821c movi.n a2, 24 +40214f8e: 0a9347 bne a3, a4, 40214f9c +40214f91: 5138 l32i.n a3, a1, 20 +40214f93: 3ba297 bge a2, a9, 40214fd2 +40214f96: 3622e7 blt a2, a14, 40214fd0 +40214f99: 000c46 j 40214fce +40214f9c: 68a072 movi a7, 104 +40214f9f: 841c movi.n a4, 24 +40214fa1: 219377 bne a3, a7, 40214fc6 +40214fa4: 5138 l32i.n a3, a1, 20 +40214fa6: 06a297 bge a2, a9, 40214fb0 +40214fa9: 0124e7 blt a4, a14, 40214fae +40214fac: 492c movi.n a9, 36 +40214fae: 4138 l32i.n a3, a1, 16 +40214fb0: 339a add.n a3, a3, a9 +40214fb2: fcc332 addi a3, a3, -4 +40214fb5: 0328 l32i.n a2, a3, 0 +40214fb7: f44020 extui a4, a2, 0, 16 +40214fba: 1b6c17 bbci a12, 1, 40214fd9 +40214fbd: 114200 slli a4, a2, 16 +40214fc0: 314040 srai a4, a4, 16 +40214fc3: 000486 j 40214fd9 +40214fc6: 5138 l32i.n a3, a1, 20 +40214fc8: 06a297 bge a2, a9, 40214fd2 +40214fcb: 0124e7 blt a4, a14, 40214fd0 +40214fce: 492c movi.n a9, 36 +40214fd0: 4138 l32i.n a3, a1, 16 +40214fd2: 339a add.n a3, a3, a9 +40214fd4: fcc332 addi a3, a3, -4 +40214fd7: 0348 l32i.n a4, a3, 0 +40214fd9: 0c7d mov.n a7, a12 +40214fdb: 0f3d mov.n a3, a15 +40214fdd: 0d2d mov.n a2, a13 +40214fdf: 7199 s32i.n a9, a1, 28 +40214fe1: ffb685 call0 40214b4c +40214fe4: 7198 l32i.n a9, a1, 28 +40214fe6: 09ed mov.n a14, a9 +40214fe8: 0138 l32i.n a3, a1, 0 +40214fea: 02dd mov.n a13, a2 +40214fec: 331b addi.n a3, a3, 1 +40214fee: 0139 s32i.n a3, a1, 0 +40214ff0: ff4406 j 40214d04 +40214ff3: 3fd700 excw +40214ff6: 4d2205 call0 40262218 <_irom0_text_end+0x3169c> +40214ff9: 008600 excw +40214ffc: 4f2200 excw +40214fff: 618800 excw +40215002: 132102 l32i a0, a1, 76 +40215005: c02d80 sub a2, a13, a8 +40215008: 1221c2 l32i a12, a1, 72 +4021500b: 1121d2 l32i a13, a1, 68 +4021500e: 1021e2 l32i a14, a1, 64 +40215011: f1f8 l32i.n a15, a1, 60 +40215013: 50c112 addi a1, a1, 80 +40215016: f00d ret.n + +40215018 : +40215018: 058d mov.n a8, a5 +4021501a: e0c112 addi a1, a1, -32 +4021501d: 067d mov.n a7, a6 +4021501f: 045d mov.n a5, a4 +40215021: 086d mov.n a6, a8 +40215023: 034d mov.n a4, a3 +40215025: f37c movi.n a3, -1 +40215027: 7109 s32i.n a0, a1, 28 +40215029: ffcac5 call0 40214cd8 +4021502c: 7108 l32i.n a0, a1, 28 +4021502e: 20c112 addi a1, a1, 32 +40215031: f00d ret.n +40215033: 000000 ill +40215036: f24020 excw +40215039: 4022f4 excw +4021503c: 1758 l32i.n a5, a7, 4 +4021503e: 10 .byte 0x10 +4021503f: 40 .byte 0x40 + +40215040 : +40215040: a0a092 movi a9, 160 +40215043: c01190 sub a1, a1, a9 +40215046: 1c6122 s32i a2, a1, 112 +40215049: fffa21 l32r a2, 40215034 +4021504c: 2561d2 s32i a13, a1, 148 +4021504f: 2461e2 s32i a14, a1, 144 +40215052: 276102 s32i a0, a1, 156 +40215055: 03ed mov.n a14, a3 +40215057: 2661c2 s32i a12, a1, 152 +4021505a: 2361f2 s32i a15, a1, 140 +4021505d: 166142 s32i a4, a1, 88 +40215060: 176152 s32i a5, a1, 92 +40215063: 186162 s32i a6, a1, 96 +40215066: 196172 s32i a7, a1, 100 +40215069: 103320 and a3, a3, a2 +4021506c: 0d0c movi.n a13, 0 +4021506e: 539327 bne a3, a2, 402150c5 +40215071: 0e2d mov.n a2, a14 +40215073: bccf01 l32r a0, 402043b0 +40215076: 0000c0 callx0 a0 +40215079: 223b addi.n a2, a2, 3 +4021507b: d37c movi.n a3, -3 +4021507d: 10c230 and a12, a2, a3 +40215080: 124c movi.n a2, 65 +40215082: 0a32c7 bltu a2, a12, 40215090 +40215085: 1c4c movi.n a12, 65 +40215087: 0d0c movi.n a13, 0 +40215089: 01fd mov.n a15, a1 +4021508b: 000786 j 402150ad +4021508e: 010000 slli a0, a0, 32 +40215091: ffeb addi.n a15, a15, 14 +40215093: 0000c0 callx0 a0 +40215096: ebbc27 bgeu a12, a2, 40215085 +40215099: ffe731 l32r a3, 40215038 +4021509c: 050c movi.n a5, 0 +4021509e: d3a142 movi a4, 0x1d3 +402150a1: 0c2d mov.n a2, a12 +402150a3: b11801 l32r a0, 40201504 +402150a6: 0000c0 callx0 a0 +402150a9: 02fd mov.n a15, a2 +402150ab: 1d0c movi.n a13, 1 +402150ad: 4c0b addi.n a4, a12, -1 +402150af: 0e3d mov.n a3, a14 +402150b1: 0f2d mov.n a2, a15 +402150b3: afd801 l32r a0, 40201014 <_irom0_text_start+0x4> +402150b6: 0000c0 callx0 a0 +402150b9: 80cfc0 add a12, a15, a12 +402150bc: 00a022 movi a2, 0 +402150bf: 004c22 s8i a2, a12, 0 +402150c2: 20eff0 or a14, a15, a15 +402150c5: 80a022 movi a2, 128 +402150c8: 412a add.n a4, a1, a2 +402150ca: 1c2122 l32i a2, a1, 112 +402150cd: 50c152 addi a5, a1, 80 +402150d0: 860c movi.n a6, 8 +402150d2: 203ee0 or a3, a14, a14 +402150d5: 126152 s32i a5, a1, 72 +402150d8: 116142 s32i a4, a1, 68 +402150db: 136162 s32i a6, a1, 76 +402150de: fff385 call0 40215018 +402150e1: 02cd mov.n a12, a2 +402150e3: 0d1d66 bnei a13, 1, 402150f4 +402150e6: ffd431 l32r a3, 40215038 +402150e9: e5a142 movi a4, 0x1e5 +402150ec: 0e2d mov.n a2, a14 +402150ee: b10601 l32r a0, 40201508 +402150f1: 0000c0 callx0 a0 +402150f4: 272102 l32i a0, a1, 156 +402150f7: a0a092 movi a9, 160 +402150fa: 0c2d mov.n a2, a12 +402150fc: 2521d2 l32i a13, a1, 148 +402150ff: 2621c2 l32i a12, a1, 152 +40215102: 2421e2 l32i a14, a1, 144 +40215105: 2321f2 l32i a15, a1, 140 +40215108: 119a add.n a1, a1, a9 +4021510a: f00d ret.n + +4021510c : +4021510c: 024d mov.n a4, a2 +4021510e: 000452 l8ui a5, a4, 0 +40215111: 358c beqz.n a5, 40215118 +40215113: 441b addi.n a4, a4, 1 +40215115: fffd46 j 4021510e +40215118: 000352 l8ui a5, a3, 0 +4021511b: 331b addi.n a3, a3, 1 +4021511d: 004452 s8i a5, a4, 0 +40215120: 441b addi.n a4, a4, 1 +40215122: ff2556 bnez a5, 40215118 +40215125: f00d ret.n + ... + +40215128 : +40215128: 024d mov.n a4, a2 +4021512a: 000452 l8ui a5, a4, 0 +4021512d: 358c beqz.n a5, 40215134 +4021512f: 441b addi.n a4, a4, 1 +40215131: fffd46 j 4021512a +40215134: 440b addi.n a4, a4, -1 +40215136: 0a3427 bltu a4, a2, 40215144 +40215139: 000452 l8ui a5, a4, 0 +4021513c: f49537 bne a5, a3, 40215134 +4021513f: 042d mov.n a2, a4 +40215141: f00d ret.n +40215143: 020c00 excw +40215146: f00d ret.n + +40215148 : +40215148: 743030 extui a3, a3, 0, 8 +4021514b: 000242 l8ui a4, a2, 0 +4021514e: 848c beqz.n a4, 4021515a +40215150: 041347 beq a3, a4, 40215158 +40215153: 221b addi.n a2, a2, 1 +40215155: fffc86 j 4021514b +40215158: f00d ret.n +4021515a: 040c movi.n a4, 0 +4021515c: 932430 movnez a2, a4, a3 +4021515f: f00d ret.n +40215161: 000000 ill + +40215164 : +40215164: 030c movi.n a3, 0 +40215166: c28c beqz.n a2, 40215176 +40215168: 044020 extui a4, a2, 0, 1 +4021516b: 334a add.n a3, a3, a4 +4021516d: 743030 extui a3, a3, 0, 8 +40215170: 412120 srli a2, a2, 1 +40215173: fffbc6 j 40215166 +40215176: 032d mov.n a2, a3 +40215178: f00d ret.n + ... + +4021517c : +4021517c: a0a092 movi a9, 160 +4021517f: c01190 sub a1, a1, a9 +40215182: 1c6122 s32i a2, a1, 112 +40215185: ffab21 l32r a2, 40215034 +40215188: 2561d2 s32i a13, a1, 148 +4021518b: 2461e2 s32i a14, a1, 144 +4021518e: 2361f2 s32i a15, a1, 140 +40215191: 03ed mov.n a14, a3 +40215193: 276102 s32i a0, a1, 156 +40215196: 2661c2 s32i a12, a1, 152 +40215199: 176152 s32i a5, a1, 92 +4021519c: 186162 s32i a6, a1, 96 +4021519f: 196172 s32i a7, a1, 100 +402151a2: 103420 and a3, a4, a2 +402151a5: 04fd mov.n a15, a4 +402151a7: 0d0c movi.n a13, 0 +402151a9: 549327 bne a3, a2, 40215201 +402151ac: 042d mov.n a2, a4 +402151ae: bc8001 l32r a0, 402043b0 +402151b1: 0000c0 callx0 a0 +402151b4: 223b addi.n a2, a2, 3 +402151b6: d37c movi.n a3, -3 +402151b8: 10c230 and a12, a2, a3 +402151bb: 124c movi.n a2, 65 +402151bd: 0832c7 bltu a2, a12, 402151c9 +402151c0: 1c4c movi.n a12, 65 +402151c2: 0d0c movi.n a13, 0 +402151c4: 015d mov.n a5, a1 +402151c6: 000706 j 402151e6 +402151c9: ff9c01 l32r a0, 4021503c +402151cc: 0000c0 callx0 a0 +402151cf: edbc27 bgeu a12, a2, 402151c0 +402151d2: ff9931 l32r a3, 40215038 +402151d5: 050c movi.n a5, 0 +402151d7: 37a242 movi a4, 0x237 +402151da: 0c2d mov.n a2, a12 +402151dc: b0ca01 l32r a0, 40201504 +402151df: 0000c0 callx0 a0 +402151e2: 025d mov.n a5, a2 +402151e4: 1d0c movi.n a13, 1 +402151e6: 4c0b addi.n a4, a12, -1 +402151e8: 0f3d mov.n a3, a15 +402151ea: 052d mov.n a2, a5 +402151ec: 1d6152 s32i a5, a1, 116 +402151ef: af8901 l32r a0, 40201014 <_irom0_text_start+0x4> +402151f2: 0000c0 callx0 a0 +402151f5: 1d2152 l32i a5, a1, 116 +402151f8: 020c movi.n a2, 0 +402151fa: c5ca add.n a12, a5, a12 +402151fc: 004c22 s8i a2, a12, 0 +402151ff: 05fd mov.n a15, a5 +40215201: 80a022 movi a2, 128 +40215204: 512a add.n a5, a1, a2 +40215206: 1c2122 l32i a2, a1, 112 +40215209: 50c162 addi a6, a1, 80 +4021520c: c70c movi.n a7, 12 +4021520e: 0f4d mov.n a4, a15 +40215210: 0e3d mov.n a3, a14 +40215212: 126162 s32i a6, a1, 72 +40215215: 116152 s32i a5, a1, 68 +40215218: 136172 s32i a7, a1, 76 +4021521b: ffabc5 call0 40214cd8 +4021521e: 02cd mov.n a12, a2 +40215220: 0d1d66 bnei a13, 1, 40215231 +40215223: ff8531 l32r a3, 40215038 +40215226: 49a242 movi a4, 0x249 +40215229: 0f2d mov.n a2, a15 +4021522b: b0b701 l32r a0, 40201508 +4021522e: 0000c0 callx0 a0 +40215231: 272102 l32i a0, a1, 156 +40215234: a0a092 movi a9, 160 +40215237: 0c2d mov.n a2, a12 +40215239: 2521d2 l32i a13, a1, 148 +4021523c: 2621c2 l32i a12, a1, 152 +4021523f: 2421e2 l32i a14, a1, 144 +40215242: 2321f2 l32i a15, a1, 140 +40215245: 119a add.n a1, a1, a9 +40215247: f00d ret.n +40215249: 000000 ill +4021524c: 8048 l32i.n a4, a0, 32 +4021524e: fe .byte 0xfe +4021524f: 3f .byte 0x3f +40215250: fe8d84 excw +40215253: 3f .byte 0x3f +40215254: 52ec bnez.n a2, 4021527d +40215256: a84021 l32r a2, 401ff358 <_lit4_end+0xf902c> +40215259: 102c movi.n a0, 33 +4021525b: 2c9040 excw +4021525e: 10 .byte 0x10 +4021525f: 40 .byte 0x40 + +40215260 : + } + +} + +void ICACHE_FLASH_ATTR lcd_blink_cb(void *arg) +{ +40215260: f0c112 addi a1, a1, -16 +40215263: 0261c2 s32i a12, a1, 8 + static uint8_t blink_cnt=6; + if((blink_cnt % 2)==0) +40215266: fff9c1 l32r a12, 4021524c +{ +40215269: 036102 s32i a0, a1, 12 + if((blink_cnt % 2)==0) +4021526c: 000c22 l8ui a2, a12, 0 +4021526f: 42e207 bbsi a2, 0, 402152b5 + { + lcd_disable_backlight(); +40215272: fff901 l32r a0, 40215258 +40215275: 0000c0 callx0 a0 + } + else + { + lcd_enable_backlight(); + } + if(--blink_cnt==0) +40215278: 000c22 l8ui a2, a12, 0 +4021527b: 220b addi.n a2, a2, -1 +4021527d: 742020 extui a2, a2, 0, 8 +40215280: 004c22 s8i a2, a12, 0 +40215283: 52ec bnez.n a2, 402152ac + { + os_timer_disarm(&lcd_shift_timer); +40215285: fff2c1 l32r a12, 40215250 +40215288: 0c2d mov.n a2, a12 +4021528a: bb4c01 l32r a0, 40203fbc +4021528d: 0000c0 callx0 a0 + os_timer_setfn(&lcd_shift_timer,lcd_update_cb,NULL); +40215290: fff131 l32r a3, 40215254 +40215293: 040c movi.n a4, 0 +40215295: 0c2d mov.n a2, a12 +40215297: bc4701 l32r a0, 402043b4 +4021529a: 0000c0 callx0 a0 + os_timer_arm(&lcd_shift_timer,SHIFT_DELAY,1); +4021529d: 150c movi.n a5, 1 +4021529f: 054d mov.n a4, a5 +402152a1: 2ca132 movi a3, 0x12c +402152a4: 0c2d mov.n a2, a12 +402152a6: bb4401 l32r a0, 40203fb8 +402152a9: 0000c0 callx0 a0 + } +} +402152ac: 3108 l32i.n a0, a1, 12 +402152ae: 21c8 l32i.n a12, a1, 8 +402152b0: 10c112 addi a1, a1, 16 +402152b3: f00d ret.n + lcd_enable_backlight(); +402152b5: ffe901 l32r a0, 4021525c +402152b8: 0000c0 callx0 a0 +402152bb: ffee46 j 40215278 +402152be: 980000 excw +402152c1: fe8d excw +402152c3: 3f .byte 0x3f +402152c4: 804c movi.n a0, 72 +402152c6: fe .byte 0xfe +402152c7: 3f .byte 0x3f +402152c8: 8d99 s32i.n a9, a13, 32 +402152ca: fe .byte 0xfe +402152cb: 3f .byte 0x3f +402152cc: fe8050 excw +402152cf: 3f .byte 0x3f +402152d0: 8d9a add.n a8, a13, a9 +402152d2: fe .byte 0xfe +402152d3: 3f .byte 0x3f +402152d4: 102d30 and a2, a13, a3 +402152d7: 2e4040 excw +402152da: 744010 extui a4, a1, 0, 8 +402152dd: 2e .byte 0x2e +402152de: 2c4010 excw +402152e1: 2e .byte 0x2e +402152e2: 0c4010 excw +402152e5: 2e .byte 0x2e +402152e6: 4c4010 excw +402152e9: bf .byte 0xbf +402152ea: 00 .byte 00 +402152eb: 40 .byte 0x40 + +402152ec : +{ +402152ec: d0c112 addi a1, a1, -48 +402152ef: a1c9 s32i.n a12, a1, 40 + switch(shift_str_state_machine) +402152f1: fff3c1 l32r a12, 402152c0 +{ +402152f4: b109 s32i.n a0, a1, 44 +402152f6: 91d9 s32i.n a13, a1, 36 +402152f8: 81e9 s32i.n a14, a1, 32 +402152fa: 71f9 s32i.n a15, a1, 28 + switch(shift_str_state_machine) +402152fc: 000c22 l8ui a2, a12, 0 +402152ff: 3a1226 beqi a2, 1, 4021533d +40215302: 229c beqz.n a2, 40215318 +40215304: 030c movi.n a3, 0 +40215306: 022266 bnei a2, 2, 4021530c +40215309: 002406 j 4021539d +4021530c: 023266 bnei a2, 3, 40215312 +4021530f: 002586 j 402153a9 + shift_str_state_machine=slide_in_init; +40215312: 004c32 s8i a3, a12, 0 +} +40215315: 001746 j 40215376 + lcd_buf_cls(); +40215318: ffef01 l32r a0, 402152d4 +4021531b: 0000c0 callx0 a0 + lcd_buf_str(demo_title); +4021531e: ffe921 l32r a2, 402152c4 +40215321: 0228 l32i.n a2, a2, 0 +40215323: ffed01 l32r a0, 402152d8 +40215326: 0000c0 callx0 a0 + lcd_update(); +40215329: ffec01 l32r a0, 402152dc +4021532c: 0000c0 callx0 a0 + i = LCD_X - 1; +4021532f: ffe621 l32r a2, 402152c8 +40215332: f30c movi.n a3, 15 +40215334: 004232 s8i a3, a2, 0 + shift_str_state_machine=slide_in; +40215337: 01a022 movi a2, 1 +4021533a: 004c22 s8i a2, a12, 0 +} + +static void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line) +{ + + lcd_buf_locate(lcd_line, i); +4021533d: ffe2d1 l32r a13, 402152c8 + lcd_buf_slide_str_in(demo_tekst,LINE_2); +40215340: ffe321 l32r a2, 402152cc + lcd_buf_locate(lcd_line, i); +40215343: 000d32 l8ui a3, a13, 0 + lcd_buf_slide_str_in(demo_tekst,LINE_2); +40215346: 02f8 l32i.n a15, a2, 0 + lcd_buf_locate(lcd_line, i); +40215348: 01a022 movi a2, 1 +4021534b: ffe501 l32r a0, 402152e0 +4021534e: 0000c0 callx0 a0 + for (uint8_t j = 0; j < (LCD_X - i); j++) +40215351: 0e0c movi.n a14, 0 +40215353: 031c movi.n a3, 16 +40215355: 000d22 l8ui a2, a13, 0 +40215358: c02320 sub a2, a3, a2 +4021535b: 262e27 blt a14, a2, 40215385 + { + lcd_buf_char(str[j]); + } + lcd_update(); +4021535e: ffdf01 l32r a0, 402152dc +40215361: 0000c0 callx0 a0 + i--; +40215364: 000d22 l8ui a2, a13, 0 +40215367: 220b addi.n a2, a2, -1 +40215369: 742020 extui a2, a2, 0, 8 +4021536c: 004d22 s8i a2, a13, 0 + if(i==C1) shift_str_state_machine=slide_out_init; +4021536f: 32cc bnez.n a2, 40215376 +40215371: 220c movi.n a2, 2 + if(j > strlen(demo_tekst)) shift_str_state_machine=slide_in_init; +40215373: 004c22 s8i a2, a12, 0 +} +40215376: b108 l32i.n a0, a1, 44 +40215378: a1c8 l32i.n a12, a1, 40 +4021537a: 91d8 l32i.n a13, a1, 36 +4021537c: 81e8 l32i.n a14, a1, 32 +4021537e: 71f8 l32i.n a15, a1, 28 +40215380: 30c112 addi a1, a1, 48 +40215383: f00d ret.n + lcd_buf_char(str[j]); +40215385: 2fea add.n a2, a15, a14 +40215387: 000222 l8ui a2, a2, 0 + for (uint8_t j = 0; j < (LCD_X - i); j++) +4021538a: ee1b addi.n a14, a14, 1 + lcd_buf_char(str[j]); +4021538c: 0139 s32i.n a3, a1, 0 +4021538e: ffd501 l32r a0, 402152e4 +40215391: 0000c0 callx0 a0 + for (uint8_t j = 0; j < (LCD_X - i); j++) +40215394: 74e0e0 extui a14, a14, 0, 8 +40215397: 0138 l32i.n a3, a1, 0 +40215399: ffee06 j 40215355 +4021539c: cc2100 excw + j=0; +4021539f: ff .byte 0xff +402153a0: 004232 s8i a3, a2, 0 + shift_str_state_machine=slide_out; +402153a3: 03a022 movi a2, 3 +402153a6: 004c22 s8i a2, a12, 0 + lcd_buf_slide_str_out(demo_tekst,LINE_2); +402153a9: ffc821 l32r a2, 402152cc + lcd_buf_locate(lcd_line, C1); +402153ac: 030c movi.n a3, 0 + lcd_buf_slide_str_out(demo_tekst,LINE_2); +402153ae: 02f8 l32i.n a15, a2, 0 + lcd_buf_locate(lcd_line, C1); +402153b0: 120c movi.n a2, 1 +402153b2: ffcb01 l32r a0, 402152e0 +402153b5: 0000c0 callx0 a0 + for (i = 0; i < LCD_X; i++) +402153b8: ffc4d1 l32r a13, 402152c8 +402153bb: 020c movi.n a2, 0 +402153bd: 004d22 s8i a2, a13, 0 + uint8_t str_end_flag = 0; +402153c0: 030c movi.n a3, 0 + for (i = 0; i < LCD_X; i++) +402153c2: fe0c movi.n a14, 15 +402153c4: 000d22 l8ui a2, a13, 0 +402153c7: 26be27 bgeu a14, a2, 402153f1 + lcd_update(); +402153ca: ffc401 l32r a0, 402152dc +402153cd: 0000c0 callx0 a0 + j++; +402153d0: ffc021 l32r a2, 402152d0 + if(j > strlen(demo_tekst)) shift_str_state_machine=slide_in_init; +402153d3: ffbe31 l32r a3, 402152cc + j++; +402153d6: 0002d2 l8ui a13, a2, 0 +402153d9: dd1b addi.n a13, a13, 1 +402153db: 74d0d0 extui a13, a13, 0, 8 +402153de: 0042d2 s8i a13, a2, 0 + if(j > strlen(demo_tekst)) shift_str_state_machine=slide_in_init; +402153e1: 0328 l32i.n a2, a3, 0 +402153e3: ffc101 l32r a0, 402152e8 +402153e6: 0000c0 callx0 a0 +402153e9: 89b2d7 bgeu a2, a13, 40215376 +402153ec: 020c movi.n a2, 0 +402153ee: ffe046 j 40215373 + if ((str[j + i] != '\0') && (str_end_flag == 0)) +402153f1: ffb751 l32r a5, 402152d0 +402153f4: 2f2a add.n a2, a15, a2 +402153f6: 000542 l8ui a4, a5, 0 +402153f9: 224a add.n a2, a2, a4 +402153fb: 000222 l8ui a2, a2, 0 +402153fe: 33dc bnez.n a3, 40215415 +40215400: 129c beqz.n a2, 40215415 + lcd_buf_char(str[j + i]); +40215402: ffb801 l32r a0, 402152e4 +40215405: 0000c0 callx0 a0 +40215408: 030c movi.n a3, 0 + for (i = 0; i < LCD_X; i++) +4021540a: 000d22 l8ui a2, a13, 0 +4021540d: 221b addi.n a2, a2, 1 +4021540f: 004d22 s8i a2, a13, 0 +40215412: ffeb86 j 402153c4 + lcd_buf_char(' '); +40215415: 022c movi.n a2, 32 +40215417: ffb301 l32r a0, 402152e4 +4021541a: 0000c0 callx0 a0 + str_end_flag = 0xFF; +4021541d: ffa032 movi a3, 255 +40215420: fff986 j 4021540a +40215423: 526000 excw +40215426: 5c4021 l32r a2, 401ec528 <_lit4_end+0xe61fc> +40215429: 102d excw +4021542b: 2ce840 excw +4021542e: 10 .byte 0x10 +4021542f: 40 .byte 0x40 + +40215430 : +{ +40215430: f0c112 addi a1, a1, -16 +40215433: 3109 s32i.n a0, a1, 12 +40215435: 21c9 s32i.n a12, a1, 8 + lcd_init(); +40215437: fffc01 l32r a0, 40215428 +4021543a: 0000c0 callx0 a0 + lcd_enable_backlight(); +4021543d: ff8701 l32r a0, 4021525c +40215440: 0000c0 callx0 a0 + lcd_str(demo_title); +40215443: ffa021 l32r a2, 402152c4 +40215446: 0228 l32i.n a2, a2, 0 +40215448: fff901 l32r a0, 4021542c +4021544b: 0000c0 callx0 a0 + os_timer_disarm(&lcd_shift_timer); +4021544e: ff80c1 l32r a12, 40215250 +40215451: 0c2d mov.n a2, a12 +40215453: bada01 l32r a0, 40203fbc +40215456: 0000c0 callx0 a0 + os_timer_setfn(&lcd_shift_timer,lcd_blink_cb,NULL); +40215459: fff231 l32r a3, 40215424 +4021545c: 0c2d mov.n a2, a12 +4021545e: 040c movi.n a4, 0 +40215460: bbd501 l32r a0, 402043b4 +40215463: 0000c0 callx0 a0 + os_timer_arm(&lcd_shift_timer,500,1); +40215466: 150c movi.n a5, 1 +40215468: 0c2d mov.n a2, a12 +4021546a: 054d mov.n a4, a5 +4021546c: f4a132 movi a3, 0x1f4 +4021546f: bad201 l32r a0, 40203fb8 +40215472: 0000c0 callx0 a0 +} +40215475: 3108 l32i.n a0, a1, 12 +40215477: 21c8 l32i.n a12, a1, 8 +40215479: 10c112 addi a1, a1, 16 +4021547c: f00d ret.n +4021547e: 140000 extui a0, a0, 0, 2 +40215481: 3ffe87 bbsi a14, 24, 402154c4 +40215484: 86ed excw +40215486: fe .byte 0xfe +40215487: 3f .byte 0x3f + +40215488 : + { SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR, 0x3000}, +}; + +void ICACHE_FLASH_ATTR user_pre_init(void) +{ + if(!system_partition_table_regist(at_partition_table, sizeof(at_partition_table)/sizeof(at_partition_table[0]),SPI_FLASH_SIZE_MAP)) { +40215488: 06a042 movi a4, 6 +4021548b: fffd21 l32r a2, 40215480 +{ +4021548e: f0c112 addi a1, a1, -16 + if(!system_partition_table_regist(at_partition_table, sizeof(at_partition_table)/sizeof(at_partition_table[0]),SPI_FLASH_SIZE_MAP)) { +40215491: 203440 or a3, a4, a4 +{ +40215494: 036102 s32i a0, a1, 12 + if(!system_partition_table_regist(at_partition_table, sizeof(at_partition_table)/sizeof(at_partition_table[0]),SPI_FLASH_SIZE_MAP)) { +40215497: 194305 call0 4022e8c8 +4021549a: a2cc bnez.n a2, 402154a8 + os_printf("system_partition_table_regist fail\r\n"); +4021549c: fffa21 l32r a2, 40215484 +4021549f: b2eb01 l32r a0, 4020204c +402154a2: 0000c0 callx0 a0 + while(1); +402154a5: ffff06 j 402154a5 + } +} +402154a8: 3108 l32i.n a0, a1, 12 +402154aa: 10c112 addi a1, a1, 16 +402154ad: f00d ret.n +402154af: 8aa000 excw +402154b2: fe .byte 0xfe +402154b3: 3f .byte 0x3f + +402154b4 : +402154b4: f0c112 addi a1, a1, -16 +402154b7: 0109 s32i.n a0, a1, 0 +402154b9: fffd01 l32r a0, 402154b0 +402154bc: 0008 l32i.n a0, a0, 0 +402154be: 014280 slli a4, a2, 24 +402154c1: 0008 l32i.n a0, a0, 0 +402154c3: 312840 srai a2, a4, 24 +402154c6: 0000c0 callx0 a0 +402154c9: 0108 l32i.n a0, a1, 0 +402154cb: 10c112 addi a1, a1, 16 +402154ce: f00d ret.n + +402154d0 : +402154d0: f0c112 addi a1, a1, -16 +402154d3: 0109 s32i.n a0, a1, 0 +402154d5: fff601 l32r a0, 402154b0 +402154d8: 0008 l32i.n a0, a0, 0 +402154da: 6008 l32i.n a0, a0, 24 +402154dc: 0000c0 callx0 a0 +402154df: 0108 l32i.n a0, a1, 0 +402154e1: 10c112 addi a1, a1, 16 +402154e4: f00d ret.n + ... + +402154e8 : +402154e8: f0c112 addi a1, a1, -16 +402154eb: 11c9 s32i.n a12, a1, 4 +402154ed: 0109 s32i.n a0, a1, 0 +402154ef: 03cd mov.n a12, a3 +402154f1: ffef01 l32r a0, 402154b0 +402154f4: 013280 slli a3, a2, 24 +402154f7: 0008 l32i.n a0, a0, 0 +402154f9: 312830 srai a2, a3, 24 +402154fc: 0008 l32i.n a0, a0, 0 +402154fe: 0c3d mov.n a3, a12 +40215500: 0000c0 callx0 a0 +40215503: ffeb01 l32r a0, 402154b0 +40215506: 0008 l32i.n a0, a0, 0 +40215508: 0c2d mov.n a2, a12 +4021550a: 6008 l32i.n a0, a0, 24 +4021550c: 11c8 l32i.n a12, a1, 4 +4021550e: 0000c0 callx0 a0 +40215511: 0108 l32i.n a0, a1, 0 +40215513: 10c112 addi a1, a1, 16 +40215516: f00d ret.n + +40215518 : +40215518: f0c112 addi a1, a1, -16 +4021551b: 0109 s32i.n a0, a1, 0 +4021551d: ffe401 l32r a0, 402154b0 +40215520: 0008 l32i.n a0, a0, 0 +40215522: 013280 slli a3, a2, 24 +40215525: 2008 l32i.n a0, a0, 8 +40215527: 312830 srai a2, a3, 24 +4021552a: 0000c0 callx0 a0 +4021552d: 0108 l32i.n a0, a1, 0 +4021552f: 10c112 addi a1, a1, 16 +40215532: f00d ret.n + +40215534 : +40215534: f0c112 addi a1, a1, -16 +40215537: 0109 s32i.n a0, a1, 0 +40215539: ffdd01 l32r a0, 402154b0 +4021553c: 0008 l32i.n a0, a0, 0 +4021553e: 3008 l32i.n a0, a0, 12 +40215540: 0000c0 callx0 a0 +40215543: 0108 l32i.n a0, a1, 0 +40215545: 10c112 addi a1, a1, 16 +40215548: f00d ret.n + ... + +4021554c : +4021554c: f0c112 addi a1, a1, -16 +4021554f: 0109 s32i.n a0, a1, 0 +40215551: ffd701 l32r a0, 402154b0 +40215554: 0008 l32i.n a0, a0, 0 +40215556: 4008 l32i.n a0, a0, 16 +40215558: 0000c0 callx0 a0 +4021555b: 0108 l32i.n a0, a1, 0 +4021555d: 10c112 addi a1, a1, 16 +40215560: f00d ret.n + ... + +40215564 : +40215564: f0c112 addi a1, a1, -16 +40215567: 0109 s32i.n a0, a1, 0 +40215569: ffd101 l32r a0, 402154b0 +4021556c: 0008 l32i.n a0, a0, 0 +4021556e: 5008 l32i.n a0, a0, 20 +40215570: 0000c0 callx0 a0 +40215573: 0108 l32i.n a0, a1, 0 +40215575: 10c112 addi a1, a1, 16 +40215578: f00d ret.n + ... + +4021557c : +4021557c: f0c112 addi a1, a1, -16 +4021557f: 0109 s32i.n a0, a1, 0 +40215581: ffcb01 l32r a0, 402154b0 +40215584: 0008 l32i.n a0, a0, 0 +40215586: 6008 l32i.n a0, a0, 24 +40215588: 0000c0 callx0 a0 +4021558b: 0108 l32i.n a0, a1, 0 +4021558d: 10c112 addi a1, a1, 16 +40215590: f00d ret.n + ... + +40215594 : +40215594: f0c112 addi a1, a1, -16 +40215597: 0109 s32i.n a0, a1, 0 +40215599: ffc501 l32r a0, 402154b0 +4021559c: 0008 l32i.n a0, a0, 0 +4021559e: 7008 l32i.n a0, a0, 28 +402155a0: 0000c0 callx0 a0 +402155a3: 0108 l32i.n a0, a1, 0 +402155a5: 10c112 addi a1, a1, 16 +402155a8: f00d ret.n +402155aa: b80000 excw +402155ad: fe8a add.n a15, a14, a8 +402155af: 3f .byte 0x3f + +402155b0 : +402155b0: 230c movi.n a3, 2 +402155b2: e0c112 addi a1, a1, -32 +402155b5: 31c9 s32i.n a12, a1, 12 +402155b7: 41d9 s32i.n a13, a1, 16 +402155b9: fffcd1 l32r a13, 402155ac +402155bc: 2109 s32i.n a0, a1, 8 +402155be: 0d08 l32i.n a0, a13, 0 +402155c0: 02cd mov.n a12, a2 +402155c2: 2c2002 l32i a0, a0, 176 +402155c5: 320c movi.n a2, 3 +402155c7: 0000c0 callx0 a0 +402155ca: 130c movi.n a3, 1 +402155cc: 0d08 l32i.n a0, a13, 0 +402155ce: 0129 s32i.n a2, a1, 0 +402155d0: 2c2002 l32i a0, a0, 176 +402155d3: 220c movi.n a2, 2 +402155d5: 0000c0 callx0 a0 +402155d8: 130c movi.n a3, 1 +402155da: 0449c0 extui a4, a12, 9, 1 +402155dd: 0d08 l32i.n a0, a13, 0 +402155df: 0458c0 extui a5, a12, 8, 1 +402155e2: 0466c0 extui a6, a12, 6, 1 +402155e5: 1129 s32i.n a2, a1, 4 +402155e7: 0477c0 extui a7, a12, 7, 1 +402155ea: 320c movi.n a2, 3 +402155ec: 1177e0 slli a7, a7, 2 +402155ef: 1166d0 slli a6, a6, 3 +402155f2: 1155f0 slli a5, a5, 1 +402155f5: 2b2002 l32i a0, a0, 172 +402155f8: 204450 or a4, a4, a5 +402155fb: 206670 or a6, a6, a7 +402155fe: 0453c0 extui a5, a12, 3, 1 +40215601: 0474c0 extui a7, a12, 4, 1 +40215604: 1155a0 slli a5, a5, 6 +40215607: 1177b0 slli a7, a7, 5 +4021560a: 205570 or a5, a5, a7 +4021560d: 0475c0 extui a7, a12, 5, 1 +40215610: 1177c0 slli a7, a7, 4 +40215613: 205570 or a5, a5, a7 +40215616: 205560 or a5, a5, a6 +40215619: 204450 or a4, a4, a5 +4021561c: f44040 extui a4, a4, 0, 16 +4021561f: 0000c0 callx0 a0 +40215622: 320c movi.n a2, 3 +40215624: 230c movi.n a3, 2 +40215626: 0d08 l32i.n a0, a13, 0 +40215628: 0148 l32i.n a4, a1, 0 +4021562a: c7a152 movi a5, 0x1c7 +4021562d: 104450 and a4, a4, a5 +40215630: 2b2002 l32i a0, a0, 172 +40215633: 2450c0 extui a5, a12, 0, 3 +40215636: 1155d0 slli a5, a5, 3 +40215639: 204450 or a4, a4, a5 +4021563c: f44040 extui a4, a4, 0, 16 +4021563f: 0000c0 callx0 a0 +40215642: 220c movi.n a2, 2 +40215644: 130c movi.n a3, 1 +40215646: 85a152 movi a5, 0x185 +40215649: 0d08 l32i.n a0, a13, 0 +4021564b: 1148 l32i.n a4, a1, 4 +4021564d: 41d8 l32i.n a13, a1, 16 +4021564f: 104450 and a4, a4, a5 +40215652: 345bc0 extui a5, a12, 11, 4 +40215655: 2b2002 l32i a0, a0, 172 +40215658: 1155d0 slli a5, a5, 3 +4021565b: 204450 or a4, a4, a5 +4021565e: 045ac0 extui a5, a12, 10, 1 +40215661: 31c8 l32i.n a12, a1, 12 +40215663: 1155f0 slli a5, a5, 1 +40215666: 204450 or a4, a4, a5 +40215669: f44040 extui a4, a4, 0, 16 +4021566c: 0000c0 callx0 a0 +4021566f: 2108 l32i.n a0, a1, 8 +40215671: 20c112 addi a1, a1, 32 +40215674: f00d ret.n +40215676: 000000 ill +40215679: f20a add.n a15, a2, a0 +4021567b: 3f .byte 0x3f +4021567c: 000200 excw +4021567f: 000060 excw +40215682: 000800 excw +40215685: 009a add.n a0, a0, a9 +40215687: 60 .byte 0x60 + +40215688 : +40215688: e0c112 addi a1, a1, -32 +4021568b: 21d9 s32i.n a13, a1, 8 +4021568d: 31e9 s32i.n a14, a1, 12 +4021568f: 0109 s32i.n a0, a1, 0 +40215691: 11c9 s32i.n a12, a1, 4 +40215693: 41f9 s32i.n a15, a1, 16 +40215695: 004d mov.n a4, a0 +40215697: fff8f1 l32r a15, 40215678 +4021569a: fff8c1 l32r a12, 4021567c +4021569d: 0020c0 memw +402156a0: e52c22 l32i a2, a12, 0x394 +402156a3: 41e207 bbsi a2, 0, 402156e8 +402156a6: 0020c0 memw +402156a9: 9c2f52 l32i a5, a15, 0x270 +402156ac: 386517 bbci a5, 1, 402156e8 +402156af: ffbfd1 l32r a13, 402155ac +402156b2: 0d08 l32i.n a0, a13, 0 +402156b4: 1d2002 l32i a0, a0, 116 +402156b7: 0000c0 callx0 a0 +402156ba: 520c movi.n a2, 5 +402156bc: bef801 l32r a0, 4020529c +402156bf: 0000c0 callx0 a0 +402156c2: 84a1e2 movi a14, 0x184 +402156c5: 0d08 l32i.n a0, a13, 0 +402156c7: 220c movi.n a2, 2 +402156c9: 2c2002 l32i a0, a0, 176 +402156cc: 130c movi.n a3, 1 +402156ce: 0000c0 callx0 a0 +402156d1: f0c2e7 bnall a2, a14, 402156c5 +402156d4: 0d08 l32i.n a0, a13, 0 +402156d6: 320c movi.n a2, 3 +402156d8: 2c2002 l32i a0, a0, 176 +402156db: 230c movi.n a3, 2 +402156dd: 0000c0 callx0 a0 +402156e0: 630c movi.n a3, 6 +402156e2: 102230 and a2, a2, a3 +402156e5: dc6266 bnei a2, 6, 402156c5 +402156e8: ffe691 l32r a9, 40215680 +402156eb: ffe681 l32r a8, 40215684 +402156ee: 0020c0 memw +402156f1: 422872 l32i a7, a8, 0x108 +402156f4: 207790 or a7, a7, a9 +402156f7: 0020c0 memw +402156fa: 426872 s32i a7, a8, 0x108 +402156fd: 0020c0 memw +40215700: e52c52 l32i a5, a12, 0x394 +40215703: 160c movi.n a6, 1 +40215705: 205560 or a5, a5, a6 +40215708: 0020c0 memw +4021570b: e56c52 s32i a5, a12, 0x394 +4021570e: 0020c0 memw +40215711: 9c2f42 l32i a4, a15, 0x270 +40215714: b31901 l32r a0, 40202378 +40215717: 116417 bbci a4, 1, 4021572c +4021571a: 0020c0 memw +4021571d: e82ca2 l32i a10, a12, 0x3a0 +40215720: 08fae7 bbsi a10, 30, 4021572c +40215723: 0020c0 memw +40215726: e82cb2 l32i a11, a12, 0x3a0 +40215729: f60b07 bnone a11, a0, 40215723 +4021572c: 11c8 l32i.n a12, a1, 4 +4021572e: 21d8 l32i.n a13, a1, 8 +40215730: 31e8 l32i.n a14, a1, 12 +40215732: 41f8 l32i.n a15, a1, 16 +40215734: 0108 l32i.n a0, a1, 0 +40215736: 20c112 addi a1, a1, 32 +40215739: f00d ret.n + ... + +4021573c : +4021573c: 130c movi.n a3, 1 +4021573e: 81a042 movi a4, 129 +40215741: f0c112 addi a1, a1, -16 +40215744: 11c9 s32i.n a12, a1, 4 +40215746: 21d9 s32i.n a13, a1, 8 +40215748: ff99d1 l32r a13, 402155ac +4021574b: 0109 s32i.n a0, a1, 0 +4021574d: 0d08 l32i.n a0, a13, 0 +4021574f: 02cd mov.n a12, a2 +40215751: 2b2002 l32i a0, a0, 172 +40215754: 220c movi.n a2, 2 +40215756: 0000c0 callx0 a0 +40215759: 720c movi.n a2, 7 +4021575b: 0d08 l32i.n a0, a13, 0 +4021575d: 130c movi.n a3, 1 +4021575f: 2b2002 l32i a0, a0, 172 +40215762: 4145c0 srli a4, a12, 5 +40215765: 0000c0 callx0 a0 +40215768: 4440c0 extui a4, a12, 0, 5 +4021576b: 0d08 l32i.n a0, a13, 0 +4021576d: 020c movi.n a2, 0 +4021576f: 2b2002 l32i a0, a0, 172 +40215772: 130c movi.n a3, 1 +40215774: 0000c0 callx0 a0 +40215777: 120c movi.n a2, 1 +40215779: 0d08 l32i.n a0, a13, 0 +4021577b: 130c movi.n a3, 1 +4021577d: 2b2002 l32i a0, a0, 172 +40215780: 7fa042 movi a4, 127 +40215783: 0000c0 callx0 a0 +40215786: 620c movi.n a2, 6 +40215788: 130c movi.n a3, 1 +4021578a: 7fa042 movi a4, 127 +4021578d: 0d08 l32i.n a0, a13, 0 +4021578f: 11c8 l32i.n a12, a1, 4 +40215791: 2b2002 l32i a0, a0, 172 +40215794: 21d8 l32i.n a13, a1, 8 +40215796: 0000c0 callx0 a0 +40215799: 0108 l32i.n a0, a1, 0 +4021579b: 10c112 addi a1, a1, 16 +4021579e: f00d ret.n +402157a0: f00000 subx8 a0, a0, a0 +402157a3: ffff00 excw +402157a6: 0f .byte 0xf +402157a7: ff .byte 0xff + +402157a8 : +402157a8: e0c112 addi a1, a1, -32 +402157ab: 1129 s32i.n a2, a1, 4 +402157ad: 2139 s32i.n a3, a1, 8 +402157af: 4109 s32i.n a0, a1, 16 +402157b1: 3149 s32i.n a4, a1, 12 +402157b3: fffb41 l32r a4, 402157a0 +402157b6: ff7d01 l32r a0, 402155ac +402157b9: ffb031 l32r a3, 4021567c +402157bc: 0020c0 memw +402157bf: f22322 l32i a2, a3, 0x3c8 +402157c2: 202240 or a2, a2, a4 +402157c5: 0020c0 memw +402157c8: 0008 l32i.n a0, a0, 0 +402157ca: 372002 l32i a0, a0, 220 +402157cd: f26322 s32i a2, a3, 0x3c8 +402157d0: 0000c0 callx0 a0 +402157d3: 2128 l32i.n a2, a1, 8 +402157d5: 1138 l32i.n a3, a1, 4 +402157d7: 3148 l32i.n a4, a1, 12 +402157d9: 015d mov.n a5, a1 +402157db: 006f05 call0 40215ecc +402157de: ff7301 l32r a0, 402155ac +402157e1: 0008 l32i.n a0, a0, 0 +402157e3: 382002 l32i a0, a0, 224 +402157e6: 012d mov.n a2, a1 +402157e8: 0000c0 callx0 a0 +402157eb: ff7001 l32r a0, 402155ac +402157ee: 0008 l32i.n a0, a0, 0 +402157f0: 362002 l32i a0, a0, 216 +402157f3: 0000c0 callx0 a0 +402157f6: 0063c5 call0 40215e34 +402157f9: ffea41 l32r a4, 402157a4 +402157fc: 0020c0 memw +402157ff: ff9f31 l32r a3, 4021567c +40215802: f22322 l32i a2, a3, 0x3c8 +40215805: 102240 and a2, a2, a4 +40215808: 0020c0 memw +4021580b: f26322 s32i a2, a3, 0x3c8 +4021580e: 4108 l32i.n a0, a1, 16 +40215810: 20c112 addi a1, a1, 32 +40215813: f00d ret.n +40215815: 000000 ill +40215818: fe8aa4 excw +4021581b: 3f .byte 0x3f + +4021581c : +4021581c: 130c movi.n a3, 1 +4021581e: 540c movi.n a4, 5 +40215820: 750c movi.n a5, 7 +40215822: 060c movi.n a6, 0 +40215824: e0c112 addi a1, a1, -32 +40215827: 11c9 s32i.n a12, a1, 4 +40215829: 21d9 s32i.n a13, a1, 8 +4021582b: 31e9 s32i.n a14, a1, 12 +4021582d: 41f9 s32i.n a15, a1, 16 +4021582f: ff5ff1 l32r a15, 402155ac +40215832: 0109 s32i.n a0, a1, 0 +40215834: 0f08 l32i.n a0, a15, 0 +40215836: 02ed mov.n a14, a2 +40215838: 252002 l32i a0, a0, 148 +4021583b: 62a022 movi a2, 98 +4021583e: 0000c0 callx0 a0 +40215841: 0c0c movi.n a12, 0 +40215843: 02dd mov.n a13, a2 +40215845: acae32 movi a3, 0xfffffeac +40215848: 902220 addx2 a2, a2, a2 +4021584b: b02230 addx8 a2, a2, a3 +4021584e: e3a032 movi a3, 227 +40215851: b0f101 l32r a0, 40201c18 +40215854: 0000c0 callx0 a0 +40215857: 115200 slli a5, a2, 16 +4021585a: f40c movi.n a4, 15 +4021585c: 040d mov.n a0, a4 +4021585e: 315050 srai a5, a5, 16 +40215861: 0c2d mov.n a2, a12 +40215863: b32550 movgez a2, a5, a5 +40215866: 01b2e6 bgei a2, 16, 4021586b +40215869: 020d mov.n a0, a2 +4021586b: cfa032 movi a3, 207 +4021586e: 902dd0 addx2 a2, a13, a13 +40215871: f022d0 subx8 a2, a2, a13 +40215874: 1dc222 addi a2, a2, 29 +40215877: 11d000 slli a13, a0, 16 +4021587a: 31d0d0 srai a13, a13, 16 +4021587d: b0e601 l32r a0, 40201c18 +40215880: 0000c0 callx0 a0 +40215883: 114200 slli a4, a2, 16 +40215886: f30c movi.n a3, 15 +40215888: 030d mov.n a0, a3 +4021588a: 314040 srai a4, a4, 16 +4021588d: b3c440 movgez a12, a4, a4 +40215890: 01bce6 bgei a12, 16, 40215895 +40215893: 0c0d mov.n a0, a12 +40215895: 11c000 slli a12, a0, 16 +40215898: 31c0c0 srai a12, a12, 16 +4021589b: 083eb6 bltui a14, 3, 402158a7 +4021589e: 800c movi.n a0, 8 +402158a0: 018da6 blti a13, 8, 402158a5 +402158a3: 807c movi.n a0, -8 +402158a5: dd0a add.n a13, a13, a0 +402158a7: 440c movi.n a4, 4 +402158a9: 0f08 l32i.n a0, a15, 0 +402158ab: 3420d0 extui a2, a13, 0, 4 +402158ae: 034c movi.n a3, 64 +402158b0: ffdad1 l32r a13, 40215818 +402158b3: 202230 or a2, a2, a3 +402158b6: 030c movi.n a3, 0 +402158b8: 745020 extui a5, a2, 0, 8 +402158bb: 044d22 s8i a2, a13, 4 +402158be: 262002 l32i a0, a0, 152 +402158c1: 64a022 movi a2, 100 +402158c4: 0000c0 callx0 a0 +402158c7: 004c movi.n a0, 64 +402158c9: 082eb6 bltui a14, 2, 402158d5 +402158cc: 820c movi.n a2, 8 +402158ce: 018ca6 blti a12, 8, 402158d3 +402158d1: 827c movi.n a2, -8 +402158d3: cc2a add.n a12, a12, a2 +402158d5: 64a022 movi a2, 100 +402158d8: 030c movi.n a3, 0 +402158da: 740c movi.n a4, 7 +402158dc: 3450c0 extui a5, a12, 0, 4 +402158df: 205500 or a5, a5, a0 +402158e2: 0f08 l32i.n a0, a15, 0 +402158e4: 054d52 s8i a5, a13, 5 +402158e7: 262002 l32i a0, a0, 152 +402158ea: 745050 extui a5, a5, 0, 8 +402158ed: 0000c0 callx0 a0 +402158f0: 11c8 l32i.n a12, a1, 4 +402158f2: 21d8 l32i.n a13, a1, 8 +402158f4: 0f78 l32i.n a7, a15, 0 +402158f6: 41f8 l32i.n a15, a1, 16 +402158f8: 262772 l32i a7, a7, 152 +402158fb: ee8c beqz.n a14, 4021590d +402158fd: 61a022 movi a2, 97 +40215900: 130c movi.n a3, 1 +40215902: 540c movi.n a4, 5 +40215904: efa052 movi a5, 239 +40215907: 0007c0 callx0 a7 +4021590a: 000306 j 4021591a +4021590d: 61a022 movi a2, 97 +40215910: 130c movi.n a3, 1 +40215912: 540c movi.n a4, 5 +40215914: e0a052 movi a5, 224 +40215917: 0007c0 callx0 a7 +4021591a: 31e8 l32i.n a14, a1, 12 +4021591c: 0108 l32i.n a0, a1, 0 +4021591e: 20c112 addi a1, a1, 32 +40215921: f00d ret.n +40215923: 8b7e00 excw +40215926: fe .byte 0xfe +40215927: 3f .byte 0x3f + +40215928 : +40215928: 61a022 movi a2, 97 +4021592b: f0c112 addi a1, a1, -16 +4021592e: 0109 s32i.n a0, a1, 0 +40215930: ff1f01 l32r a0, 402155ac +40215933: 130c movi.n a3, 1 +40215935: 0008 l32i.n a0, a0, 0 +40215937: 840c movi.n a4, 8 +40215939: 262002 l32i a0, a0, 152 +4021593c: 151c movi.n a5, 17 +4021593e: 0000c0 callx0 a0 +40215941: fff821 l32r a2, 40215924 +40215944: 000222 l8ui a2, a2, 0 +40215947: ffed45 call0 4021581c +4021594a: 0108 l32i.n a0, a1, 0 +4021594c: 10c112 addi a1, a1, 16 +4021594f: f00d ret.n +40215951: 000000 ill +40215954: 000a00 excw +40215957: 000060 excw +4021595a: ff0020 excw +4021595d: ff .byte 0xff +4021595e: 7f .byte 0x7f +4021595f: ff .byte 0xff + +40215960 : +40215960: f0c112 addi a1, a1, -16 +40215963: 0109 s32i.n a0, a1, 0 +40215965: dfaf72 movi a7, -33 +40215968: fffb21 l32r a2, 40215954 +4021596b: 0020c0 memw +4021596e: d42262 l32i a6, a2, 0x350 +40215971: 106670 and a6, a6, a7 +40215974: 0020c0 memw +40215977: d46262 s32i a6, a2, 0x350 +4021597a: fff751 l32r a5, 40215958 +4021597d: 0020c0 memw +40215980: d72242 l32i a4, a2, 0x35c +40215983: 204450 or a4, a4, a5 +40215986: 0020c0 memw +40215989: d76242 s32i a4, a2, 0x35c +4021598c: fff431 l32r a3, 4021595c +4021598f: 0020c0 memw +40215992: d72202 l32i a0, a2, 0x35c +40215995: 100030 and a0, a0, a3 +40215998: 0020c0 memw +4021599b: d76202 s32i a0, a2, 0x35c +4021599e: c8a022 movi a2, 200 +402159a1: be3e01 l32r a0, 4020529c +402159a4: 0000c0 callx0 a0 +402159a7: 6ca022 movi a2, 108 +402159aa: 230c movi.n a3, 2 +402159ac: 040c movi.n a4, 0 +402159ae: feff01 l32r a0, 402155ac +402159b1: 650c movi.n a5, 6 +402159b3: 0008 l32i.n a0, a0, 0 +402159b5: 660c movi.n a6, 6 +402159b7: 272002 l32i a0, a0, 156 +402159ba: 070c movi.n a7, 0 +402159bc: 0000c0 callx0 a0 +402159bf: 6ca022 movi a2, 108 +402159c2: 230c movi.n a3, 2 +402159c4: 040c movi.n a4, 0 +402159c6: fef901 l32r a0, 402155ac +402159c9: 650c movi.n a5, 6 +402159cb: 0008 l32i.n a0, a0, 0 +402159cd: 660c movi.n a6, 6 +402159cf: 272002 l32i a0, a0, 156 +402159d2: 170c movi.n a7, 1 +402159d4: 0000c0 callx0 a0 +402159d7: 042c movi.n a4, 32 +402159d9: 0020c0 memw +402159dc: ffde31 l32r a3, 40215954 +402159df: d42322 l32i a2, a3, 0x350 +402159e2: 202240 or a2, a2, a4 +402159e5: 0020c0 memw +402159e8: 240c movi.n a4, 2 +402159ea: 750c movi.n a5, 7 +402159ec: 060c movi.n a6, 0 +402159ee: feef01 l32r a0, 402155ac +402159f1: d46322 s32i a2, a3, 0x350 +402159f4: 0008 l32i.n a0, a0, 0 +402159f6: 6ca022 movi a2, 108 +402159f9: 252002 l32i a0, a0, 148 +402159fc: 230c movi.n a3, 2 +402159fe: 0000c0 callx0 a0 +40215a01: 0108 l32i.n a0, a1, 0 +40215a03: 10c112 addi a1, a1, 16 +40215a06: f00d ret.n +40215a08: 800000 add a0, a0, a0 +40215a0b: ffff00 excw +40215a0e: df .byte 0xdf +40215a0f: ff .byte 0xff + +40215a10 : +40215a10: d0c112 addi a1, a1, -48 +40215a13: 81d9 s32i.n a13, a1, 32 +40215a15: 91e9 s32i.n a14, a1, 36 +40215a17: 6109 s32i.n a0, a1, 24 +40215a19: 71c9 s32i.n a12, a1, 28 +40215a1b: a1f9 s32i.n a15, a1, 40 +40215a1d: ff17c1 l32r a12, 4021567c +40215a20: 02fd mov.n a15, a2 +40215a22: f28c beqz.n a2, 40215a35 +40215a24: 120c movi.n a2, 1 +40215a26: 0020c0 memw +40215a29: e52c02 l32i a0, a12, 0x394 +40215a2c: 200020 or a0, a0, a2 +40215a2f: 0020c0 memw +40215a32: e56c02 s32i a0, a12, 0x394 +40215a35: feddd1 l32r a13, 402155ac +40215a38: 002d02 l32i a0, a13, 0 +40215a3b: 06a022 movi a2, 6 +40215a3e: 2c2002 l32i a0, a0, 176 +40215a41: 01a032 movi a3, 1 +40215a44: 0000c0 callx0 a0 +40215a47: 230c movi.n a3, 2 +40215a49: 940c movi.n a4, 9 +40215a4b: 250c movi.n a5, 2 +40215a4d: 060c movi.n a6, 0 +40215a4f: 0d08 l32i.n a0, a13, 0 +40215a51: 02ed mov.n a14, a2 +40215a53: 252002 l32i a0, a0, 148 +40215a56: 6ba022 movi a2, 107 +40215a59: 0000c0 callx0 a0 +40215a5c: 230c movi.n a3, 2 +40215a5e: 040c movi.n a4, 0 +40215a60: 550c movi.n a5, 5 +40215a62: 560c movi.n a6, 5 +40215a64: 0d08 l32i.n a0, a13, 0 +40215a66: 5129 s32i.n a2, a1, 20 +40215a68: 252002 l32i a0, a0, 148 +40215a6b: 6ca022 movi a2, 108 +40215a6e: 0000c0 callx0 a0 +40215a71: 130c movi.n a3, 1 +40215a73: 0d08 l32i.n a0, a13, 0 +40215a75: 4129 s32i.n a2, a1, 16 +40215a77: 240c movi.n a4, 2 +40215a79: 620c movi.n a2, 6 +40215a7b: 204e40 or a4, a14, a4 +40215a7e: 2b2002 l32i a0, a0, 172 +40215a81: f44040 extui a4, a4, 0, 16 +40215a84: 0000c0 callx0 a0 +40215a87: 6ba022 movi a2, 107 +40215a8a: 230c movi.n a3, 2 +40215a8c: 940c movi.n a4, 9 +40215a8e: 750c movi.n a5, 7 +40215a90: 0d08 l32i.n a0, a13, 0 +40215a92: 760c movi.n a6, 7 +40215a94: 272002 l32i a0, a0, 156 +40215a97: 170c movi.n a7, 1 +40215a99: 0000c0 callx0 a0 +40215a9c: 6ba022 movi a2, 107 +40215a9f: 230c movi.n a3, 2 +40215aa1: 940c movi.n a4, 9 +40215aa3: 250c movi.n a5, 2 +40215aa5: 0d08 l32i.n a0, a13, 0 +40215aa7: 060c movi.n a6, 0 +40215aa9: 272002 l32i a0, a0, 156 +40215aac: 070c movi.n a7, 0 +40215aae: 0000c0 callx0 a0 +40215ab1: 6ca022 movi a2, 108 +40215ab4: 230c movi.n a3, 2 +40215ab6: 040c movi.n a4, 0 +40215ab8: 550c movi.n a5, 5 +40215aba: 0d08 l32i.n a0, a13, 0 +40215abc: 560c movi.n a6, 5 +40215abe: 272002 l32i a0, a0, 156 +40215ac1: 170c movi.n a7, 1 +40215ac3: 0000c0 callx0 a0 +40215ac6: 200c movi.n a0, 2 +40215ac8: ffd071 l32r a7, 40215a08 +40215acb: ffa221 l32r a2, 40215954 +40215ace: 0020c0 memw +40215ad1: d72262 l32i a6, a2, 0x35c +40215ad4: 206670 or a6, a6, a7 +40215ad7: 0020c0 memw +40215ada: d76262 s32i a6, a2, 0x35c +40215add: ffcb51 l32r a5, 40215a0c +40215ae0: 0020c0 memw +40215ae3: d72242 l32i a4, a2, 0x35c +40215ae6: 104450 and a4, a4, a5 +40215ae9: 0020c0 memw +40215aec: d76242 s32i a4, a2, 0x35c +40215aef: 0020c0 memw +40215af2: d42232 l32i a3, a2, 0x350 +40215af5: 253830 extui a3, a3, 24, 3 +40215af8: a38c beqz.n a3, 40215b06 +40215afa: 0020c0 memw +40215afd: d42282 l32i a8, a2, 0x350 +40215b00: 258880 extui a8, a8, 24, 3 +40215b03: ff3856 bnez a8, 40215afa +40215b06: db7c movi.n a11, -3 +40215b08: 0020c0 memw +40215b0b: d422a2 l32i a10, a2, 0x350 +40215b0e: 10aab0 and a10, a10, a11 +40215b11: 0020c0 memw +40215b14: d462a2 s32i a10, a2, 0x350 +40215b17: 0020c0 memw +40215b1a: d42292 l32i a9, a2, 0x350 +40215b1d: 209900 or a9, a9, a0 +40215b20: 0020c0 memw +40215b23: d46292 s32i a9, a2, 0x350 +40215b26: 921c movi.n a2, 25 +40215b28: bddd01 l32r a0, 4020529c +40215b2b: 0000c0 callx0 a0 +40215b2e: 012d mov.n a2, a1 +40215b30: 068045 call0 4021c338 +40215b33: 000c movi.n a0, 0 +40215b35: 0c0c movi.n a12, 0 +40215b37: 012d mov.n a2, a1 +40215b39: 401b addi.n a4, a0, 1 +40215b3b: 903020 addx2 a3, a0, a2 +40215b3e: 001332 l16ui a3, a3, 0 +40215b41: 740040 extui a0, a4, 0, 8 +40215b44: c3ca add.n a12, a3, a12 +40215b46: f4c0c0 extui a12, a12, 0, 16 +40215b49: ec8066 bnei a0, 8, 40215b39 +40215b4c: 620c movi.n a2, 6 +40215b4e: 130c movi.n a3, 1 +40215b50: 0d08 l32i.n a0, a13, 0 +40215b52: 0e4d mov.n a4, a14 +40215b54: 2b2002 l32i a0, a0, 172 +40215b57: 41e8 l32i.n a14, a1, 16 +40215b59: 0000c0 callx0 a0 +40215b5c: 6ba022 movi a2, 107 +40215b5f: 230c movi.n a3, 2 +40215b61: 940c movi.n a4, 9 +40215b63: 750c movi.n a5, 7 +40215b65: 0d08 l32i.n a0, a13, 0 +40215b67: 760c movi.n a6, 7 +40215b69: 272002 l32i a0, a0, 156 +40215b6c: 070c movi.n a7, 0 +40215b6e: 0000c0 callx0 a0 +40215b71: 5178 l32i.n a7, a1, 20 +40215b73: 6ba022 movi a2, 107 +40215b76: 230c movi.n a3, 2 +40215b78: 940c movi.n a4, 9 +40215b7a: 0d08 l32i.n a0, a13, 0 +40215b7c: 250c movi.n a5, 2 +40215b7e: 272002 l32i a0, a0, 156 +40215b81: 060c movi.n a6, 0 +40215b83: 0000c0 callx0 a0 +40215b86: 0e7d mov.n a7, a14 +40215b88: 6ca022 movi a2, 108 +40215b8b: 230c movi.n a3, 2 +40215b8d: 040c movi.n a4, 0 +40215b8f: 0d08 l32i.n a0, a13, 0 +40215b91: 550c movi.n a5, 5 +40215b93: 272002 l32i a0, a0, 156 +40215b96: 560c movi.n a6, 5 +40215b98: 0000c0 callx0 a0 +40215b9b: 2f9c beqz.n a15, 40215bb1 +40215b9d: e47c movi.n a4, -2 +40215b9f: 0020c0 memw +40215ba2: feb631 l32r a3, 4021567c +40215ba5: e52322 l32i a2, a3, 0x394 +40215ba8: 102240 and a2, a2, a4 +40215bab: 0020c0 memw +40215bae: e56322 s32i a2, a3, 0x394 +40215bb1: 6108 l32i.n a0, a1, 24 +40215bb3: 81d8 l32i.n a13, a1, 32 +40215bb5: 91e8 l32i.n a14, a1, 36 +40215bb7: 112c60 slli a2, a12, 10 +40215bba: a1f8 l32i.n a15, a1, 40 +40215bbc: 71c8 l32i.n a12, a1, 28 +40215bbe: 08d222 addmi a2, a2, 0x800 +40215bc1: f42c20 extui a2, a2, 12, 16 +40215bc4: 30c112 addi a1, a1, 48 +40215bc7: f00d ret.n +40215bc9: 000000 ill +40215bcc: 8b28 l32i.n a2, a11, 32 +40215bce: fe .byte 0xfe +40215bcf: 3f .byte 0x3f +40215bd0: 000d33 excw +40215bd3: 8ac400 excw +40215bd6: fe .byte 0xfe +40215bd7: 3f .byte 0x3f + +40215bd8 : +40215bd8: e0c112 addi a1, a1, -32 +40215bdb: 31c9 s32i.n a12, a1, 12 +40215bdd: 1129 s32i.n a2, a1, 4 +40215bdf: 41d9 s32i.n a13, a1, 16 +40215be1: fffad1 l32r a13, 40215bcc +40215be4: 2109 s32i.n a0, a1, 8 +40215be6: 470d02 l8ui a0, a13, 71 +40215be9: ffa022 movi a2, 255 +40215bec: 099027 bne a0, a2, 40215bf9 +40215bef: 120c movi.n a2, 1 +40215bf1: ffe1c5 call0 40215a10 +40215bf4: 02cd mov.n a12, a2 +40215bf6: 000606 j 40215c12 +40215bf9: 131c movi.n a3, 17 +40215bfb: 10b307 bgeu a3, a0, 40215c0f +40215bfe: 442c movi.n a4, 36 +40215c00: 0b3407 bltu a4, a0, 40215c0f +40215c03: 66a0c2 movi a12, 102 +40215c06: c1c0c0 mul16u a12, a0, a12 +40215c09: f4c0c0 extui a12, a12, 0, 16 +40215c0c: 000086 j 40215c12 +40215c0f: fff0c1 l32r a12, 40215bd0 +40215c12: ffef01 l32r a0, 40215bd0 +40215c15: 020c movi.n a2, 0 +40215c17: 023c07 bltu a12, a0, 40215c1d +40215c1a: 000cc6 j 40215c51 +40215c1d: fe6301 l32r a0, 402155ac +40215c20: 0008 l32i.n a0, a0, 0 +40215c22: 0c2d mov.n a2, a12 +40215c24: e008 l32i.n a0, a0, 56 +40215c26: 330c movi.n a3, 3 +40215c28: 0000c0 callx0 a0 +40215c2b: fe6001 l32r a0, 402155ac +40215c2e: 330c movi.n a3, 3 +40215c30: 0008 l32i.n a0, a0, 0 +40215c32: 0129 s32i.n a2, a1, 0 +40215c34: e008 l32i.n a0, a0, 56 +40215c36: ffe621 l32r a2, 40215bd0 +40215c39: 0000c0 callx0 a0 +40215c3c: 023d mov.n a3, a2 +40215c3e: 0128 l32i.n a2, a1, 0 +40215c40: c02230 sub a2, a2, a3 +40215c43: 1122f0 slli a2, a2, 1 +40215c46: 112200 slli a2, a2, 16 +40215c49: 312020 srai a2, a2, 16 +40215c4c: 222b addi.n a2, a2, 2 +40215c4e: 212220 srai a2, a2, 2 +40215c51: 000c movi.n a0, 0 +40215c53: 1138 l32i.n a3, a1, 4 +40215c55: ffdf51 l32r a5, 40215bd4 +40215c58: 232a add.n a2, a3, a2 +40215c5a: 112200 slli a2, a2, 16 +40215c5d: 312020 srai a2, a2, 16 +40215c60: 605a add.n a6, a0, a5 +40215c62: 701b addi.n a7, a0, 1 +40215c64: 40da add.n a4, a0, a13 +40215c66: 140442 l8ui a4, a4, 20 +40215c69: 740070 extui a0, a7, 0, 8 +40215c6c: 424a add.n a4, a2, a4 +40215c6e: 324642 s8i a4, a6, 50 +40215c71: eb6066 bnei a0, 6, 40215c60 +40215c74: 41d8 l32i.n a13, a1, 16 +40215c76: 116c00 slli a6, a12, 16 +40215c79: 81af02 movi a0, -127 +40215c7c: 31c8 l32i.n a12, a1, 12 +40215c7e: 012207 blt a2, a0, 40215c83 +40215c81: 020d mov.n a0, a2 +40215c83: 747000 extui a7, a0, 0, 8 +40215c86: 2108 l32i.n a0, a1, 8 +40215c88: 667a add.n a6, a6, a7 +40215c8a: 156562 s32i a6, a5, 84 +40215c8d: 20c112 addi a1, a1, 32 +40215c90: f00d ret.n + ... + +40215c94 : +40215c94: e0c112 addi a1, a1, -32 +40215c97: 1109 s32i.n a0, a1, 4 +40215c99: 0139 s32i.n a3, a1, 0 +40215c9b: 21c9 s32i.n a12, a1, 8 +40215c9d: 31d9 s32i.n a13, a1, 12 +40215c9f: 41e9 s32i.n a14, a1, 16 +40215ca1: 02dd mov.n a13, a2 +40215ca3: 04ed mov.n a14, a4 +40215ca5: fe41c1 l32r a12, 402155ac +40215ca8: 0c4216 beqz a2, 40215d70 +40215cab: 77a022 movi a2, 119 +40215cae: 030c movi.n a3, 0 +40215cb0: c41c movi.n a4, 28 +40215cb2: 050c movi.n a5, 0 +40215cb4: 0c08 l32i.n a0, a12, 0 +40215cb6: 060c movi.n a6, 0 +40215cb8: 272002 l32i a0, a0, 156 +40215cbb: 070c movi.n a7, 0 +40215cbd: 0000c0 callx0 a0 +40215cc0: 77a022 movi a2, 119 +40215cc3: 030c movi.n a3, 0 +40215cc5: 0c08 l32i.n a0, a12, 0 +40215cc7: a41c movi.n a4, 26 +40215cc9: 262002 l32i a0, a0, 152 +40215ccc: 852c movi.n a5, 40 +40215cce: 0000c0 callx0 a0 +40215cd1: 77a022 movi a2, 119 +40215cd4: 030c movi.n a3, 0 +40215cd6: 0c08 l32i.n a0, a12, 0 +40215cd8: a41c movi.n a4, 26 +40215cda: 262002 l32i a0, a0, 152 +40215cdd: 853c movi.n a5, 56 +40215cdf: 0000c0 callx0 a0 +40215ce2: 77a022 movi a2, 119 +40215ce5: 030c movi.n a3, 0 +40215ce7: 0c08 l32i.n a0, a12, 0 +40215ce9: a41c movi.n a4, 26 +40215ceb: 262002 l32i a0, a0, 152 +40215cee: 851c movi.n a5, 24 +40215cf0: 0000c0 callx0 a0 +40215cf3: 77a022 movi a2, 119 +40215cf6: 030c movi.n a3, 0 +40215cf8: 0c08 l32i.n a0, a12, 0 +40215cfa: a41c movi.n a4, 26 +40215cfc: 262002 l32i a0, a0, 152 +40215cff: 853c movi.n a5, 56 +40215d01: 0000c0 callx0 a0 +40215d04: 77a022 movi a2, 119 +40215d07: 030c movi.n a3, 0 +40215d09: 040c movi.n a4, 0 +40215d0b: 0c08 l32i.n a0, a12, 0 +40215d0d: 0158 l32i.n a5, a1, 0 +40215d0f: 262002 l32i a0, a0, 152 +40215d12: 745c50 extui a5, a5, 12, 8 +40215d15: 0000c0 callx0 a0 +40215d18: 77a022 movi a2, 119 +40215d1b: 030c movi.n a3, 0 +40215d1d: 140c movi.n a4, 1 +40215d1f: 0c08 l32i.n a0, a12, 0 +40215d21: 0158 l32i.n a5, a1, 0 +40215d23: 262002 l32i a0, a0, 152 +40215d26: 745450 extui a5, a5, 4, 8 +40215d29: 0000c0 callx0 a0 +40215d2c: 77a022 movi a2, 119 +40215d2f: 030c movi.n a3, 0 +40215d31: 0c08 l32i.n a0, a12, 0 +40215d33: 440c movi.n a4, 4 +40215d35: 262002 l32i a0, a0, 152 +40215d38: 7450e0 extui a5, a14, 0, 8 +40215d3b: 0000c0 callx0 a0 +40215d3e: 77a022 movi a2, 119 +40215d41: 030c movi.n a3, 0 +40215d43: 0c08 l32i.n a0, a12, 0 +40215d45: 340c movi.n a4, 3 +40215d47: 262002 l32i a0, a0, 152 +40215d4a: 7458e0 extui a5, a14, 8, 8 +40215d4d: 0000c0 callx0 a0 +40215d50: 77a022 movi a2, 119 +40215d53: 030c movi.n a3, 0 +40215d55: 240c movi.n a4, 2 +40215d57: 0158 l32i.n a5, a1, 0 +40215d59: 0c08 l32i.n a0, a12, 0 +40215d5b: 3560e0 extui a6, a14, 16, 4 +40215d5e: 1166c0 slli a6, a6, 4 +40215d61: 262002 l32i a0, a0, 152 +40215d64: 345050 extui a5, a5, 0, 4 +40215d67: 205560 or a5, a5, a6 +40215d6a: 745050 extui a5, a5, 0, 8 +40215d6d: 0000c0 callx0 a0 +40215d70: f40c movi.n a4, 15 +40215d72: 350c movi.n a5, 3 +40215d74: 360c movi.n a6, 3 +40215d76: 0430d0 extui a3, a13, 0, 1 +40215d79: 120c movi.n a2, 1 +40215d7b: 0c08 l32i.n a0, a12, 0 +40215d7d: 0e0c movi.n a14, 0 +40215d7f: 272002 l32i a0, a0, 156 +40215d82: 83e230 moveqz a14, a2, a3 +40215d85: 0e7d mov.n a7, a14 +40215d87: 77a022 movi a2, 119 +40215d8a: 030c movi.n a3, 0 +40215d8c: 0000c0 callx0 a0 +40215d8f: 0e7d mov.n a7, a14 +40215d91: 77a022 movi a2, 119 +40215d94: 030c movi.n a3, 0 +40215d96: 841c movi.n a4, 24 +40215d98: 0c08 l32i.n a0, a12, 0 +40215d9a: 050c movi.n a5, 0 +40215d9c: 272002 l32i a0, a0, 156 +40215d9f: 060c movi.n a6, 0 +40215da1: 0000c0 callx0 a0 +40215da4: 77a022 movi a2, 119 +40215da7: 030c movi.n a3, 0 +40215da9: c41c movi.n a4, 28 +40215dab: 050c movi.n a5, 0 +40215dad: 060c movi.n a6, 0 +40215daf: 41e8 l32i.n a14, a1, 16 +40215db1: 0d7d mov.n a7, a13 +40215db3: 0c08 l32i.n a0, a12, 0 +40215db5: 21c8 l32i.n a12, a1, 8 +40215db7: 272002 l32i a0, a0, 156 +40215dba: 31d8 l32i.n a13, a1, 12 +40215dbc: 0000c0 callx0 a0 +40215dbf: 1108 l32i.n a0, a1, 4 +40215dc1: 20c112 addi a1, a1, 32 +40215dc4: f00d ret.n + ... + +40215dc8 : +40215dc8: 62a022 movi a2, 98 +40215dcb: 130c movi.n a3, 1 +40215dcd: 040c movi.n a4, 0 +40215dcf: 650c movi.n a5, 6 +40215dd1: f0c112 addi a1, a1, -16 +40215dd4: 11c9 s32i.n a12, a1, 4 +40215dd6: fdf5c1 l32r a12, 402155ac +40215dd9: 0109 s32i.n a0, a1, 0 +40215ddb: 0c08 l32i.n a0, a12, 0 +40215ddd: 660c movi.n a6, 6 +40215ddf: 272002 l32i a0, a0, 156 +40215de2: 170c movi.n a7, 1 +40215de4: 0000c0 callx0 a0 +40215de7: 62a022 movi a2, 98 +40215dea: 130c movi.n a3, 1 +40215dec: 040c movi.n a4, 0 +40215dee: 550c movi.n a5, 5 +40215df0: 0c08 l32i.n a0, a12, 0 +40215df2: 560c movi.n a6, 5 +40215df4: 272002 l32i a0, a0, 156 +40215df7: 070c movi.n a7, 0 +40215df9: 0000c0 callx0 a0 +40215dfc: 62a022 movi a2, 98 +40215dff: 130c movi.n a3, 1 +40215e01: 040c movi.n a4, 0 +40215e03: 550c movi.n a5, 5 +40215e05: 0c08 l32i.n a0, a12, 0 +40215e07: 560c movi.n a6, 5 +40215e09: 272002 l32i a0, a0, 156 +40215e0c: 170c movi.n a7, 1 +40215e0e: 0000c0 callx0 a0 +40215e11: 62a022 movi a2, 98 +40215e14: 130c movi.n a3, 1 +40215e16: 040c movi.n a4, 0 +40215e18: 650c movi.n a5, 6 +40215e1a: 660c movi.n a6, 6 +40215e1c: 0c08 l32i.n a0, a12, 0 +40215e1e: 070c movi.n a7, 0 +40215e20: 272002 l32i a0, a0, 156 +40215e23: 11c8 l32i.n a12, a1, 4 +40215e25: 0000c0 callx0 a0 +40215e28: 0108 l32i.n a0, a1, 0 +40215e2a: 10c112 addi a1, a1, 16 +40215e2d: f00d ret.n +40215e2f: f66000 excw +40215e32: 22 .byte 0x22 +40215e33: 40 .byte 0x40 + +40215e34 : +40215e34: e0c112 addi a1, a1, -32 +40215e37: 0109 s32i.n a0, a1, 0 +40215e39: 21d9 s32i.n a13, a1, 8 +40215e3b: 31e9 s32i.n a14, a1, 12 +40215e3d: 11c9 s32i.n a12, a1, 4 +40215e3f: 41f9 s32i.n a15, a1, 16 +40215e41: 0c0c movi.n a12, 0 +40215e43: 63a0f2 movi a15, 99 +40215e46: 64a0e2 movi a14, 100 +40215e49: fdd8d1 l32r a13, 402155ac +40215e4c: 421c movi.n a2, 20 +40215e4e: bd1301 l32r a0, 4020529c +40215e51: 0000c0 callx0 a0 +40215e54: 62a022 movi a2, 98 +40215e57: 130c movi.n a3, 1 +40215e59: 740c movi.n a4, 7 +40215e5b: 0d08 l32i.n a0, a13, 0 +40215e5d: 750c movi.n a5, 7 +40215e5f: 252002 l32i a0, a0, 148 +40215e62: 760c movi.n a6, 7 +40215e64: 0000c0 callx0 a0 +40215e67: 22dc bnez.n a2, 40215e7d +40215e69: 089cf7 bne a12, a15, 40215e75 +40215e6c: fff121 l32r a2, 40215e30 +40215e6f: b07701 l32r a0, 4020204c +40215e72: 0000c0 callx0 a0 +40215e75: cc1b addi.n a12, a12, 1 +40215e77: 74c0c0 extui a12, a12, 0, 8 +40215e7a: ce9ce7 bne a12, a14, 40215e4c +40215e7d: 11c8 l32i.n a12, a1, 4 +40215e7f: 21d8 l32i.n a13, a1, 8 +40215e81: 31e8 l32i.n a14, a1, 12 +40215e83: 41f8 l32i.n a15, a1, 16 +40215e85: 0108 l32i.n a0, a1, 0 +40215e87: 20c112 addi a1, a1, 32 +40215e8a: f00d ret.n +40215e8c: 200000 or a0, a0, a0 +40215e8f: 000042 l8ui a4, a0, 0 +40215e92: 0041c0 break 1, 12 +40215e95: 41d000 srli a13, a0, 0 +40215e98: 800000 add a0, a0, a0 +40215e9b: 000043 excw +40215e9e: 4008 l32i.n a0, a0, 16 +40215ea0: 800000 add a0, a0, a0 +40215ea3: 000044 excw +40215ea6: e8c200 excw +40215ea9: 4000e2 l8ui a14, a0, 64 +40215eac: 00cb94 excw +40215eaf: cd5c40 excw +40215eb2: dc4000 excw +40215eb5: 4000c3 excw +40215eb8: 105f30 and a5, a15, a3 +40215ebb: c18040 mul16u a8, a0, a4 +40215ebe: c44000 extui a4, a0, 0, 13 +40215ec1: 4000c4 excw +40215ec4: e2ac beqz.n a2, 40215ef6 +40215ec6: 684000 excw +40215ec9: 4000c2 l8ui a12, a0, 64 + +40215ecc : +40215ecc: e0c112 addi a1, a1, -32 +40215ecf: 31d9 s32i.n a13, a1, 12 +40215ed1: 1109 s32i.n a0, a1, 4 +40215ed3: 21c9 s32i.n a12, a1, 8 +40215ed5: 41e9 s32i.n a14, a1, 16 +40215ed7: 05cd mov.n a12, a5 +40215ed9: ffece1 l32r a14, 40215e8c +40215edc: d38c beqz.n a3, 40215eed +40215ede: 081326 beqi a3, 1, 40215eea +40215ee1: 082366 bnei a3, 2, 40215eed +40215ee4: ffebe1 l32r a14, 40215e90 +40215ee7: 000086 j 40215eed +40215eea: ffeae1 l32r a14, 40215e94 +40215eed: ffead1 l32r a13, 40215e98 +40215ef0: 112260 slli a2, a2, 10 +40215ef3: 242a add.n a2, a4, a2 +40215ef5: 1122e0 slli a2, a2, 2 +40215ef8: ffec01 l32r a0, 40215ea8 +40215efb: 0000c0 callx0 a0 +40215efe: ffe751 l32r a5, 40215e9c +40215f01: 040c movi.n a4, 0 +40215f03: ffea01 l32r a0, 40215eac +40215f06: 0000c0 callx0 a0 +40215f09: ffe901 l32r a0, 40215eb0 +40215f0c: 0000c0 callx0 a0 +40215f0f: 0129 s32i.n a2, a1, 0 +40215f11: ffe331 l32r a3, 40215ea0 +40215f14: 0e2d mov.n a2, a14 +40215f16: ffe701 l32r a0, 40215eb4 +40215f19: 0000c0 callx0 a0 +40215f1c: 023d mov.n a3, a2 +40215f1e: 0128 l32i.n a2, a1, 0 +40215f20: ffe601 l32r a0, 40215eb8 +40215f23: 0000c0 callx0 a0 +40215f26: ffdf31 l32r a3, 40215ea4 +40215f29: ffe401 l32r a0, 40215ebc +40215f2c: 0000c0 callx0 a0 +40215f2f: 02ed mov.n a14, a2 +40215f31: ffe301 l32r a0, 40215ec0 +40215f34: 0000c0 callx0 a0 +40215f37: 004c22 s8i a2, a12, 0 +40215f3a: 742020 extui a2, a2, 0, 8 +40215f3d: ffe101 l32r a0, 40215ec4 +40215f40: 0000c0 callx0 a0 +40215f43: 023d mov.n a3, a2 +40215f45: 0e2d mov.n a2, a14 +40215f47: ffe001 l32r a0, 40215ec8 +40215f4a: 0000c0 callx0 a0 +40215f4d: 0d3d mov.n a3, a13 +40215f4f: ffd901 l32r a0, 40215eb4 +40215f52: 0000c0 callx0 a0 +40215f55: 02ed mov.n a14, a2 +40215f57: ffda01 l32r a0, 40215ec0 +40215f5a: 0000c0 callx0 a0 +40215f5d: 014c22 s8i a2, a12, 1 +40215f60: 742020 extui a2, a2, 0, 8 +40215f63: ffd801 l32r a0, 40215ec4 +40215f66: 0000c0 callx0 a0 +40215f69: 023d mov.n a3, a2 +40215f6b: 0e2d mov.n a2, a14 +40215f6d: ffd601 l32r a0, 40215ec8 +40215f70: 0000c0 callx0 a0 +40215f73: 0d3d mov.n a3, a13 +40215f75: ffcf01 l32r a0, 40215eb4 +40215f78: 0000c0 callx0 a0 +40215f7b: 31d8 l32i.n a13, a1, 12 +40215f7d: 41e8 l32i.n a14, a1, 16 +40215f7f: ffd001 l32r a0, 40215ec0 +40215f82: 0000c0 callx0 a0 +40215f85: 024c22 s8i a2, a12, 2 +40215f88: 1108 l32i.n a0, a1, 4 +40215f8a: 21c8 l32i.n a12, a1, 8 +40215f8c: 20c112 addi a1, a1, 32 +40215f8f: f00d ret.n +40215f91: 000000 ill +40215f94: fe8300 excw +40215f97: 3f .byte 0x3f +40215f98: 601c movi.n a0, 22 +40215f9a: f34021 l32r a2, 40212c9c +40215f9d: 402160 excw + +40215fa0 : +40215fa0: e0c112 addi a1, a1, -32 +40215fa3: 31d9 s32i.n a13, a1, 12 +40215fa5: 41e9 s32i.n a14, a1, 16 +40215fa7: 1109 s32i.n a0, a1, 4 +40215fa9: 21c9 s32i.n a12, a1, 8 +40215fab: 51f9 s32i.n a15, a1, 20 +40215fad: 02cd mov.n a12, a2 +40215faf: 04fd mov.n a15, a4 +40215fb1: fd7e01 l32r a0, 402155ac +40215fb4: 03ed mov.n a14, a3 +40215fb6: fdb1d1 l32r a13, 4021567c +40215fb9: fdf931 l32r a3, 402157a0 +40215fbc: 0020c0 memw +40215fbf: f22d22 l32i a2, a13, 0x3c8 +40215fc2: 202230 or a2, a2, a3 +40215fc5: 0020c0 memw +40215fc8: 0008 l32i.n a0, a0, 0 +40215fca: 372002 l32i a0, a0, 220 +40215fcd: f26d22 s32i a2, a13, 0x3c8 +40215fd0: 0000c0 callx0 a0 +40215fd3: 5c0b addi.n a5, a12, -1 +40215fd5: c40c movi.n a4, 12 +40215fd7: 0d3457 bltu a4, a5, 40215fe8 +40215fda: ffee01 l32r a0, 40215f94 +40215fdd: 11dcf0 slli a13, a12, 1 +40215fe0: dd0a add.n a13, a13, a0 +40215fe2: 7f1dd2 l16ui a13, a13, 254 +40215fe5: 000086 j 40215feb +40215fe8: afb5d1 l32r a13, 40201ebc +40215feb: 057f56 bnez a15, 40216046 +40215fee: 542ef6 bgeui a14, 2, 40216046 +40215ff1: b03c movi.n a0, 59 +40215ff3: 2e0b addi.n a2, a14, -1 +40215ff5: 0d7256 bnez a2, 402160d0 +40215ff8: b7af42 movi a4, -73 +40215ffb: 83afb2 movi a11, -125 +40215ffe: 76a0a2 movi a10, 118 +40216001: e35c movi.n a3, 94 +40216003: d95c movi.n a9, 93 +40216005: c75c movi.n a7, 92 +40216007: b85c movi.n a8, 91 +40216009: e50c movi.n a5, 14 +4021600b: 023c57 bltu a12, a5, 40216011 +4021600e: 005386 j 40216160 +40216011: ffe121 l32r a2, 40215f98 +40216014: 906cc0 addx2 a6, a12, a12 +40216017: 662a add.n a6, a6, a2 +40216019: 0006a0 jx a6 +4021601c: 005006 j 40216160 +4021601f: 004786 j 40216141 +40216022: 005286 j 40216170 +40216025: 007d46 j 4021621e +40216028: 0079c6 j 40216213 +4021602b: 007606 j 40216207 +4021602e: 005306 j 4021617e +40216031: 007286 j 402161ff +40216034: 006e46 j 402161f1 +40216037: 006a46 j 402161e4 +4021603a: 0066c6 j 402161d9 +4021603d: 006286 j 402161cb +40216040: 005f06 j 402161c0 +40216043: 005b86 j 402161b5 +40216046: 0d2d mov.n a2, a13 +40216048: 0e3d mov.n a3, a14 +4021604a: 0f4d mov.n a4, a15 +4021604c: 015d mov.n a5, a1 +4021604e: ffe7c5 call0 40215ecc +40216051: fede01 l32r a0, 40215bcc +40216054: 490032 l8ui a3, a0, 73 +40216057: e40c movi.n a4, 14 +40216059: 1b6307 bbci a3, 0, 40216078 +4021605c: 189c47 bne a12, a4, 40216078 +4021605f: 0f4d mov.n a4, a15 +40216061: 0e3d mov.n a3, a14 +40216063: 015d mov.n a5, a1 +40216065: 4b0022 l8ui a2, a0, 75 +40216068: 4a00d2 l8ui a13, a0, 74 +4021606b: 110280 slli a0, a2, 8 +4021606e: dd0a add.n a13, a13, a0 +40216070: f4d0d0 extui a13, a13, 0, 16 +40216073: 0d2d mov.n a2, a13 +40216075: ffe545 call0 40215ecc +40216078: fd4dc1 l32r a12, 402155ac +4021607b: 0c08 l32i.n a0, a12, 0 +4021607d: fd7fe1 l32r a14, 4021567c +40216080: 382002 l32i a0, a0, 224 +40216083: 012d mov.n a2, a1 +40216085: 0000c0 callx0 a0 +40216088: 0c08 l32i.n a0, a12, 0 +4021608a: 362002 l32i a0, a0, 216 +4021608d: 0000c0 callx0 a0 +40216090: 200122 l8ui a2, a1, 32 +40216093: 128c beqz.n a2, 40216098 +40216095: ffd9c5 call0 40215e34 +40216098: 0d2d mov.n a2, a13 +4021609a: fdc281 l32r a8, 402157a4 +4021609d: fdde41 l32r a4, 40215818 +402160a0: 0020c0 memw +402160a3: f22e72 l32i a7, a14, 0x3c8 +402160a6: 107780 and a7, a7, a8 +402160a9: 0020c0 memw +402160ac: 1108 l32i.n a0, a1, 4 +402160ae: 21c8 l32i.n a12, a1, 8 +402160b0: 31d8 l32i.n a13, a1, 12 +402160b2: f26e72 s32i a7, a14, 0x3c8 +402160b5: 51f8 l32i.n a15, a1, 20 +402160b7: 41e8 l32i.n a14, a1, 16 +402160b9: 020132 l8ui a3, a1, 2 +402160bc: 010152 l8ui a5, a1, 1 +402160bf: 000162 l8ui a6, a1, 0 +402160c2: 084462 s8i a6, a4, 8 +402160c5: 094452 s8i a5, a4, 9 +402160c8: 0a4432 s8i a3, a4, 10 +402160cb: 20c112 addi a1, a1, 32 +402160ce: f00d ret.n +402160d0: 66a032 movi a3, 102 +402160d3: 91afb2 movi a11, -111 +402160d6: bbaf72 movi a7, -69 +402160d9: 696c movi.n a9, -26 +402160db: 181c movi.n a8, 17 +402160dd: 043c movi.n a4, 48 +402160df: 1a3c movi.n a10, 49 +402160e1: 223c movi.n a2, 50 +402160e3: e50c movi.n a5, 14 +402160e5: 34bc57 bgeu a12, a5, 4021611d +402160e8: ffad51 l32r a5, 40215f9c +402160eb: 906cc0 addx2 a6, a12, a12 +402160ee: 665a add.n a6, a6, a5 +402160f0: 0006a0 jx a6 +402160f3: 000986 j 4021611d +402160f6: 000f06 j 40216136 +402160f9: 0009c6 j 40216124 +402160fc: 002686 j 4021619a +402160ff: 0026c6 j 4021619e +40216102: 002a06 j 402161ae +40216105: 000846 j 4021612a +40216108: 001106 j 40216150 +4021610b: 001146 j 40216154 +4021610e: 002546 j 402161a7 +40216111: 0010c6 j 40216158 +40216114: 001d06 j 4021618c +40216117: 001d46 j 40216190 +4021611a: 000586 j 40216134 +4021611d: 024d mov.n a4, a2 +4021611f: ccaf82 movi a8, -52 +40216122: 08bd mov.n a11, a8 +40216124: 087d mov.n a7, a8 +40216126: 0b0d mov.n a0, a11 +40216128: 04ad mov.n a10, a4 +4021612a: 073d mov.n a3, a7 +4021612c: 0a4d mov.n a4, a10 +4021612e: 014102 s8i a0, a1, 1 +40216131: 000106 j 40216139 +40216134: 024d mov.n a4, a2 +40216136: 014132 s8i a3, a1, 1 +40216139: 030d mov.n a0, a3 +4021613b: 004142 s8i a4, a1, 0 +4021613e: 000206 j 4021614a +40216141: 004182 s8i a8, a1, 0 +40216144: b1af22 movi a2, -79 +40216147: 014122 s8i a2, a1, 1 +4021614a: 024102 s8i a0, a1, 2 +4021614d: ffc006 j 40216051 +40216150: 038d mov.n a8, a3 +40216152: 08bd mov.n a11, a8 +40216154: 083d mov.n a3, a8 +40216156: 0b9d mov.n a9, a11 +40216158: 0a4d mov.n a4, a10 +4021615a: 014192 s8i a9, a1, 1 +4021615d: fff606 j 40216139 +40216160: 0a0d mov.n a0, a10 +40216162: 62a062 movi a6, 98 +40216165: f75c movi.n a7, 95 +40216167: 004172 s8i a7, a1, 0 +4021616a: 014162 s8i a6, a1, 1 +4021616d: fff646 j 4021614a +40216170: 004182 s8i a8, a1, 0 +40216173: dfaf02 movi a0, -33 +40216176: 297c movi.n a9, -14 +40216178: 014192 s8i a9, a1, 1 +4021617b: fff2c6 j 4021614a +4021617e: 004172 s8i a7, a1, 0 +40216181: 6fa002 movi a0, 111 +40216184: 9a7c movi.n a10, -7 +40216186: 0141a2 s8i a10, a1, 1 +40216189: ffef46 j 4021614a +4021618c: 087d mov.n a7, a8 +4021618e: 070d mov.n a0, a7 +40216190: 073d mov.n a3, a7 +40216192: 024d mov.n a4, a2 +40216194: 014102 s8i a0, a1, 1 +40216197: ffe786 j 40216139 +4021619a: 073d mov.n a3, a7 +4021619c: 039d mov.n a9, a3 +4021619e: 037d mov.n a7, a3 +402161a0: 090d mov.n a0, a9 +402161a2: 04ad mov.n a10, a4 +402161a4: ffe086 j 4021612a +402161a7: 073d mov.n a3, a7 +402161a9: 039d mov.n a9, a3 +402161ab: ffea46 j 40216158 +402161ae: 087d mov.n a7, a8 +402161b0: 070d mov.n a0, a7 +402161b2: ffdd06 j 4021612a +402161b5: 004132 s8i a3, a1, 0 +402161b8: c4af22 movi a2, -60 +402161bb: c06c movi.n a0, -20 +402161bd: ffe186 j 40216147 +402161c0: 004132 s8i a3, a1, 0 +402161c3: 0141b2 s8i a11, a1, 1 +402161c6: 804c movi.n a0, 72 +402161c8: ffdf86 j 4021614a +402161cb: 004132 s8i a3, a1, 0 +402161ce: a4af02 movi a0, -92 +402161d1: 1b4c movi.n a11, 65 +402161d3: 0141b2 s8i a11, a1, 1 +402161d6: ffdc06 j 4021614a +402161d9: 000c movi.n a0, 0 +402161db: 014102 s8i a0, a1, 1 +402161de: 004132 s8i a3, a1, 0 +402161e1: ffd946 j 4021614a +402161e4: 080d mov.n a0, a8 +402161e6: 093d mov.n a3, a9 +402161e8: beaf22 movi a2, -66 +402161eb: 014122 s8i a2, a1, 1 +402161ee: fffb06 j 402161de +402161f1: 004192 s8i a9, a1, 0 +402161f4: 7ca002 movi a0, 124 +402161f7: 014102 s8i a0, a1, 1 +402161fa: 040d mov.n a0, a4 +402161fc: ffd286 j 4021614a +402161ff: 004192 s8i a9, a1, 0 +40216202: 341c movi.n a4, 19 +40216204: fffbc6 j 402161f7 +40216207: 004172 s8i a7, a1, 0 +4021620a: 014142 s8i a4, a1, 1 +4021620d: cbaf02 movi a0, -53 +40216210: ffcd86 j 4021614a +40216213: 004172 s8i a7, a1, 0 +40216216: 0141a2 s8i a10, a1, 1 +40216219: 702c movi.n a0, 39 +4021621b: ffcac6 j 4021614a +4021621e: 0b0d mov.n a0, a11 +40216220: 004172 s8i a7, a1, 0 +40216223: 433c movi.n a3, 52 +40216225: 014132 s8i a3, a1, 1 +40216228: ffc786 j 4021614a +4021622b: fe0000 excw +4021622e: ef .byte 0xef +4021622f: 3f .byte 0x3f +40216230: 009600 excw +40216233: 1d7760 excw +40216236: 200104 excw +40216239: 3ffe83 excw +4021623c: 0c6186 j 402193c6 +4021623f: 600000 neg a0, a0 + ... + +40216244 : +40216244: fe6241 l32r a4, 40215bcc +40216247: c0c112 addi a1, a1, -64 +4021624a: d1e9 s32i.n a14, a1, 52 +4021624c: 6139 s32i.n a3, a1, 24 +4021624e: 7169 s32i.n a6, a1, 28 +40216250: 8179 s32i.n a7, a1, 32 +40216252: c1d9 s32i.n a13, a1, 48 +40216254: a109 s32i.n a0, a1, 40 +40216256: b1c9 s32i.n a12, a1, 44 +40216258: d4ae02 movi a0, 0xfffffed4 +4021625b: 02cd mov.n a12, a2 +4021625d: 11d500 slli a13, a5, 16 +40216260: 2ca122 movi a2, 0x12c +40216263: 31d0d0 srai a13, a13, 16 +40216266: 012d07 blt a13, a0, 4021626b +40216269: 0d0d mov.n a0, a13 +4021626b: 012207 blt a2, a0, 40216270 +4021626e: 002d mov.n a2, a0 +40216270: 11d200 slli a13, a2, 16 +40216273: 4c0402 l8ui a0, a4, 76 +40216276: 31d0d0 srai a13, a13, 16 +40216279: 166007 bbci a0, 0, 40216293 +4021627c: 046017 bbci a0, 1, 40216284 +4021627f: 011da6 blti a13, 1, 40216284 +40216282: 0d0c movi.n a13, 0 +40216284: 0d2d mov.n a2, a13 +40216286: 330c movi.n a3, 3 +40216288: ae6401 l32r a0, 40201c18 +4021628b: 0000c0 callx0 a0 +4021628e: 020d mov.n a0, a2 +40216290: 0000c6 j 40216297 +40216293: 000c movi.n a0, 0 +40216295: 0d0c movi.n a13, 0 +40216297: 5109 s32i.n a0, a1, 20 +40216299: fcc491 l32r a9, 402155ac +4021629c: fe4e31 l32r a3, 40215bd4 +4021629f: fd5ee1 l32r a14, 40215818 +402162a2: 3043c2 s8i a12, a3, 48 +402162a5: 000e22 l8ui a2, a14, 0 +402162a8: 0998 l32i.n a9, a9, 0 +402162aa: 42cc bnez.n a2, 402162b2 +402162ac: 010e52 l8ui a5, a14, 1 +402162af: 000106 j 402162b7 +402162b2: 054c movi.n a5, 64 +402162b4: 014e52 s8i a5, a14, 1 +402162b7: 262992 l32i a9, a9, 152 +402162ba: e5cc bnez.n a5, 402162cc +402162bc: 62a022 movi a2, 98 +402162bf: 130c movi.n a3, 1 +402162c1: 140c movi.n a4, 1 +402162c3: 60a052 movi a5, 96 +402162c6: 0009c0 callx0 a9 +402162c9: 000246 j 402162d6 +402162cc: 62a022 movi a2, 98 +402162cf: 130c movi.n a3, 1 +402162d1: 140c movi.n a4, 1 +402162d3: 0009c0 callx0 a9 +402162d6: 0d4d mov.n a4, a13 +402162d8: 6138 l32i.n a3, a1, 24 +402162da: 7158 l32i.n a5, a1, 28 +402162dc: 8178 l32i.n a7, a1, 32 +402162de: 0c2d mov.n a2, a12 +402162e0: 10c162 addi a6, a1, 16 +402162e3: 4001a2 l8ui a10, a1, 64 +402162e6: 01a9 s32i.n a10, a1, 0 +402162e8: ffcb45 call0 40215fa0 +402162eb: 130c movi.n a3, 1 +402162ed: fcafd1 l32r a13, 402155ac +402162f0: 540c movi.n a4, 5 +402162f2: 0d08 l32i.n a0, a13, 0 +402162f4: 9129 s32i.n a2, a1, 36 +402162f6: 242002 l32i a0, a0, 144 +402162f9: 62a022 movi a2, 98 +402162fc: 0000c0 callx0 a0 +402162ff: fe3301 l32r a0, 40215bcc +40216302: 025d mov.n a5, a2 +40216304: 014e22 s8i a2, a14, 1 +40216307: 073ce6 bgei a12, 3, 40216312 +4021630a: 024d mov.n a4, a2 +4021630c: 0c4e22 s8i a2, a14, 12 +4021630f: 000086 j 40216315 +40216312: 0c0e42 l8ui a4, a14, 12 +40216315: 059ca6 blti a12, 10, 4021631e +40216318: 0d4e52 s8i a5, a14, 13 +4021631b: 000086 j 40216321 +4021631e: 0d0e52 l8ui a5, a14, 13 +40216321: ffc231 l32r a3, 4021622c +40216324: 069547 bne a5, a4, 4021632e +40216327: 348c beqz.n a4, 4021632e +40216329: 120c movi.n a2, 1 +4021632b: 004e22 s8i a2, a14, 0 +4021632e: 0020c0 memw +40216331: ffbf41 l32r a4, 40216230 +40216334: 962332 l32i a3, a3, 0x258 +40216337: 0020c0 memw +4021633a: 8c2442 l32i a4, a4, 0x230 +4021633d: 243d30 extui a3, a3, 13, 3 +40216340: 244040 extui a4, a4, 0, 3 +40216343: c3cc bnez.n a3, 40216353 +40216345: a4cc bnez.n a4, 40216353 +40216347: ffbb41 l32r a4, 40216234 +4021634a: fd8251 l32r a5, 40215954 +4021634d: 0020c0 memw +40216350: c06542 s32i a4, a5, 0x300 +40216353: 4c0022 l8ui a2, a0, 76 +40216356: 7c0b addi.n a7, a12, -1 +40216358: c60c movi.n a6, 12 +4021635a: 0d3677 bltu a6, a7, 4021636b +4021635d: ffb6e1 l32r a14, 40216238 +40216360: 11dcf0 slli a13, a12, 1 +40216363: ddea add.n a13, a13, a14 +40216365: 7f1dd2 l16ui a13, a13, 254 +40216368: 000086 j 4021636e +4021636b: 6aa0d2 movi a13, 106 +4021636e: 536207 bbci a2, 0, 402163c5 +40216371: 77a022 movi a2, 119 +40216374: 030c movi.n a3, 0 +40216376: 440c movi.n a4, 4 +40216378: ffb161 l32r a6, 4021623c +4021637b: fc8c01 l32r a0, 402155ac +4021637e: 5158 l32i.n a5, a1, 20 +40216380: 0008 l32i.n a0, a0, 0 +40216382: 556a add.n a5, a5, a6 +40216384: 262002 l32i a0, a0, 152 +40216387: 745050 extui a5, a5, 0, 8 +4021638a: 0000c0 callx0 a0 +4021638d: 77a022 movi a2, 119 +40216390: 030c movi.n a3, 0 +40216392: c41c movi.n a4, 28 +40216394: fc8601 l32r a0, 402155ac +40216397: 650c movi.n a5, 6 +40216399: 0008 l32i.n a0, a0, 0 +4021639b: 660c movi.n a6, 6 +4021639d: 272002 l32i a0, a0, 156 +402163a0: 170c movi.n a7, 1 +402163a2: 0000c0 callx0 a0 +402163a5: 77a022 movi a2, 119 +402163a8: 030c movi.n a3, 0 +402163aa: c41c movi.n a4, 28 +402163ac: fc8001 l32r a0, 402155ac +402163af: 550c movi.n a5, 5 +402163b1: 0008 l32i.n a0, a0, 0 +402163b3: 560c movi.n a6, 5 +402163b5: 272002 l32i a0, a0, 156 +402163b8: 170c movi.n a7, 1 +402163ba: 0000c0 callx0 a0 +402163bd: 520c movi.n a2, 5 +402163bf: bbb701 l32r a0, 4020529c +402163c2: 0000c0 callx0 a0 +402163c5: ff9e41 l32r a4, 40216240 +402163c8: 52dd52 addmi a5, a13, 0x5200 +402163cb: fcae31 l32r a3, 40215684 +402163ce: 08c552 addi a5, a5, 8 +402163d1: 0155f0 slli a5, a5, 17 +402163d4: 0020c0 memw +402163d7: 452322 l32i a2, a3, 0x114 +402163da: c42020 extui a2, a2, 0, 13 +402163dd: 202250 or a2, a2, a5 +402163e0: 202240 or a2, a2, a4 +402163e3: 0020c0 memw +402163e6: 456322 s32i a2, a3, 0x114 +402163e9: 202cc0 or a2, a12, a12 +402163ec: 9138 l32i.n a3, a1, 36 +402163ee: 025b85 call0 402189a8 +402163f1: b1c8 l32i.n a12, a1, 44 +402163f3: c1d8 l32i.n a13, a1, 48 +402163f5: d1e8 l32i.n a14, a1, 52 +402163f7: 0290c5 call0 40218d04 +402163fa: a108 l32i.n a0, a1, 40 +402163fc: 40c112 addi a1, a1, 64 +402163ff: f00d ret.n +40216401: 000000 ill +40216404: 8b78 l32i.n a7, a11, 32 +40216406: fe .byte 0xfe +40216407: 3f .byte 0x3f + +40216408 : +40216408: f0c112 addi a1, a1, -16 +4021640b: fdf051 l32r a5, 40215bcc +4021640e: 0109 s32i.n a0, a1, 0 +40216410: 4c0502 l8ui a0, a5, 76 +40216413: fffc61 l32r a6, 40216404 +40216416: 116027 bbci a0, 2, 4021642b +40216419: 4d0502 l8ui a0, a5, 77 +4021641c: 010080 slli a0, a0, 24 +4021641f: 310800 srai a0, a0, 24 +40216422: 1100d0 slli a0, a0, 3 +40216425: 005602 s16i a0, a6, 0 +40216428: 000b46 j 40216459 +4021642b: 009642 l16si a4, a6, 0 +4021642e: 0e6037 bbci a0, 3, 40216440 +40216431: 4d0502 l8ui a0, a5, 77 +40216434: 010080 slli a0, a0, 24 +40216437: 310800 srai a0, a0, 24 +4021643a: 1100d0 slli a0, a0, 3 +4021643d: 000046 j 40216442 +40216440: 000c movi.n a0, 0 +40216442: 030a add.n a0, a3, a0 +40216444: 115000 slli a5, a0, 16 +40216447: 315050 srai a5, a5, 16 +4021644a: 0b1457 beq a4, a5, 40216459 +4021644d: 005602 s16i a0, a6, 0 +40216450: 012280 slli a2, a2, 24 +40216453: 312820 srai a2, a2, 24 +40216456: 0001c5 call0 40216474 +40216459: 0108 l32i.n a0, a1, 0 +4021645b: 10c112 addi a1, a1, 16 +4021645e: f00d ret.n +40216460: 22f680 excw +40216463: 555540 extui a5, a4, 21, 6 +40216466: 005555 excw +40216469: 3ff202 excw +4021646c: 8bac beqz.n a11, 40216498 +4021646e: fe .byte 0xfe +4021646f: 3f .byte 0x3f +40216470: 388c beqz.n a8, 40216477 +40216472: 10 .byte 0x10 +40216473: 40 .byte 0x40 + +40216474 : +40216474: e0c112 addi a1, a1, -32 +40216477: 5109 s32i.n a0, a1, 20 +40216479: fce701 l32r a0, 40215818 +4021647c: 61c9 s32i.n a12, a1, 24 +4021647e: 020002 l8ui a0, a0, 2 +40216481: 02cd mov.n a12, a2 +40216483: a08c beqz.n a0, 40216491 +40216485: fff621 l32r a2, 40216460 +40216488: aef101 l32r a0, 4020204c +4021648b: 0000c0 callx0 a0 +4021648e: 002d06 j 40216546 +40216491: fdd021 l32r a2, 40215bd4 +40216494: 0228 l32i.n a2, a2, 0 +40216496: 0a7297 bbci a2, 25, 402164a4 +40216499: 420c movi.n a2, 4 +4021649b: fff501 l32r a0, 40216470 +4021649e: 0000c0 callx0 a0 +402164a1: 000106 j 402164a9 +402164a4: 015605 call0 40217a08 +402164a7: 4129 s32i.n a2, a1, 16 +402164a9: 0c2d mov.n a2, a12 +402164ab: 040c movi.n a4, 0 +402164ad: fdc961 l32r a6, 40215bd4 +402164b0: 64a072 movi a7, 100 +402164b3: 180c movi.n a8, 1 +402164b5: fdc531 l32r a3, 40215bcc +402164b8: ffd351 l32r a5, 40216404 +402164bb: 000332 l8ui a3, a3, 0 +402164be: 009552 l16si a5, a5, 0 +402164c1: 0189 s32i.n a8, a1, 0 +402164c3: ffd805 call0 40216244 +402164c6: 0c2d mov.n a2, a12 +402164c8: 024505 call0 4021891c +402164cb: 020c movi.n a2, 0 +402164cd: 0352c5 call0 402199fc +402164d0: fdc141 l32r a4, 40215bd4 +402164d3: 0448 l32i.n a4, a4, 0 +402164d5: 0f7497 bbci a4, 25, 402164e8 +402164d8: 420c movi.n a2, 4 +402164da: 030c movi.n a3, 0 +402164dc: 073845 call0 4021d864 +402164df: 042c45 call0 4021a7a4 +402164e2: 0001c6 j 402164ed +402164e5: 000000 ill +402164e8: 4128 l32i.n a2, a1, 16 +402164ea: 014d85 call0 402179c4 +402164ed: ea7c movi.n a10, -2 +402164ef: fd1971 l32r a7, 40215954 +402164f2: 0020c0 memw +402164f5: d82792 l32i a9, a7, 0x360 +402164f8: 1099a0 and a9, a9, a10 +402164fb: 0020c0 memw +402164fe: d86792 s32i a9, a7, 0x360 +40216501: 01a082 movi a8, 1 +40216504: 0020c0 memw +40216507: d82762 l32i a6, a7, 0x360 +4021650a: 206680 or a6, a6, a8 +4021650d: 0020c0 memw +40216510: fdaf51 l32r a5, 40215bcc +40216513: d86762 s32i a6, a7, 0x360 +40216516: 3c0552 l8ui a5, a5, 60 +40216519: 0b2566 bnei a5, 2, 40216528 +4021651c: ffd2b1 l32r a11, 40216464 +4021651f: ffd201 l32r a0, 40216468 +40216522: 0020c0 memw +40216525: 8060b2 s32i a11, a0, 0x200 +40216528: ffd121 l32r a2, 4021646c +4021652b: 000222 l8ui a2, a2, 0 +4021652e: 0ea032 movi a3, 14 +40216531: 129c beqz.n a2, 40216546 +40216533: 079c37 bne a12, a3, 4021653e +40216536: 120c movi.n a2, 1 +40216538: 043f85 call0 4021a934 +4021653b: 0001c6 j 40216546 +4021653e: 020c movi.n a2, 0 +40216540: 201110 or a1, a1, a1 +40216543: 043f05 call0 4021a934 +40216546: 61c8 l32i.n a12, a1, 24 +40216548: 5108 l32i.n a0, a1, 20 +4021654a: 20c112 addi a1, a1, 32 +4021654d: f00d ret.n + ... + +40216550 : +40216550: e0c112 addi a1, a1, -32 +40216553: 4109 s32i.n a0, a1, 16 +40216555: fc9281 l32r a8, 402157a0 +40216558: fc4971 l32r a7, 4021567c +4021655b: 0020c0 memw +4021655e: f22762 l32i a6, a7, 0x3c8 +40216561: 206680 or a6, a6, a8 +40216564: 0020c0 memw +40216567: 040c movi.n a4, 0 +40216569: 000c movi.n a0, 0 +4021656b: fd9831 l32r a3, 40215bcc +4021656e: f26762 s32i a6, a7, 0x3c8 +40216571: ffa451 l32r a5, 40216404 +40216574: fd9861 l32r a6, 40215bd4 +40216577: 64a072 movi a7, 100 +4021657a: 009552 l16si a5, a5, 0 +4021657d: 000332 l8ui a3, a3, 0 +40216580: 0109 s32i.n a0, a1, 0 +40216582: ffcc05 call0 40216244 +40216585: 4108 l32i.n a0, a1, 16 +40216587: 20c112 addi a1, a1, 32 +4021658a: f00d ret.n +4021658c: fe8ae4 excw +4021658f: 3f .byte 0x3f +40216590: 103180 and a3, a1, a8 +40216593: 40 .byte 0x40 + +40216594 : +40216594: 743020 extui a3, a2, 0, 8 +40216597: f0c112 addi a1, a1, -16 +4021659a: fffc21 l32r a2, 4021658c +4021659d: 036102 s32i a0, a1, 12 +402165a0: 026132 s32i a3, a1, 8 +402165a3: fffb01 l32r a0, 40216590 +402165a6: 0000c0 callx0 a0 +402165a9: 2128 l32i.n a2, a1, 8 +402165ab: 013d mov.n a3, a1 +402165ad: 017d05 call0 40217d80 +402165b0: ff8805 call0 40215e34 +402165b3: fcdc21 l32r a2, 40215924 +402165b6: 000222 l8ui a2, a2, 0 +402165b9: 029b85 call0 40218f74 +402165bc: fbfc01 l32r a0, 402155ac +402165bf: 0008 l32i.n a0, a0, 0 +402165c1: fd8421 l32r a2, 40215bd4 +402165c4: 162002 l32i a0, a0, 88 +402165c7: 179222 l16si a2, a2, 46 +402165ca: 0000c0 callx0 a0 +402165cd: fc7541 l32r a4, 402157a4 +402165d0: fc2b31 l32r a3, 4021567c +402165d3: 0020c0 memw +402165d6: f22322 l32i a2, a3, 0x3c8 +402165d9: 102240 and a2, a2, a4 +402165dc: 0020c0 memw +402165df: f26322 s32i a2, a3, 0x3c8 +402165e2: 3108 l32i.n a0, a1, 12 +402165e4: 10c112 addi a1, a1, 16 +402165e7: f00d ret.n +402165e9: 000000 ill +402165ec: ff0000 excw +402165ef: ff .byte 0xff +402165f0: 000600 excw +402165f3: ffff60 excw +402165f6: 7f .byte 0x7f +402165f7: fe .byte 0xfe +402165f8: c06a add.n a12, a0, a6 +402165fa: 0019 s32i.n a1, a0, 0 +402165fc: ff .byte 0xff +402165fd: ff .byte 0xff +402165fe: ff .byte 0xff +402165ff: 0000f7 bnone a0, a15, 40216603 +40216602: 9a0200 excw +40216605: fe8b addi.n a15, a14, 8 +40216607: 3f .byte 0x3f +40216608: 000000 ill +4021660b: ffff30 excw +4021660e: ff .byte 0xff +4021660f: 0000e0 excw +40216612: ff1c00 excw +40216615: ff .byte 0xff +40216616: ff .byte 0xff +40216617: cf .byte 0xcf +40216618: 000000 ill +4021661b: 000010 excw +4021661e: 00 .byte 00 +4021661f: 0c .byte 0xc + +40216620 : +40216620: fff351 l32r a5, 402165ec +40216623: ff0241 l32r a4, 4021622c +40216626: e0c112 addi a1, a1, -32 +40216629: 11c9 s32i.n a12, a1, 4 +4021662b: 0109 s32i.n a0, a1, 0 +4021662d: 41f9 s32i.n a15, a1, 16 +4021662f: 21d9 s32i.n a13, a1, 8 +40216631: 31e9 s32i.n a14, a1, 12 +40216633: ffefd1 l32r a13, 402165f0 +40216636: fc11e1 l32r a14, 4021567c +40216639: ffeef1 l32r a15, 402165f4 +4021663c: fd6601 l32r a0, 40215bd4 +4021663f: 0020c0 memw +40216642: 862432 l32i a3, a4, 0x218 +40216645: 203350 or a3, a3, a5 +40216648: 0020c0 memw +4021664b: 866432 s32i a3, a4, 0x218 +4021664e: 0028 l32i.n a2, a0, 0 +40216650: 20f2b7 bbsi a2, 27, 40216674 +40216653: ffe981 l32r a8, 402165f8 +40216656: 0020c0 memw +40216659: 406d82 s32i a8, a13, 0x100 +4021665c: ee0371 l32r a7, 40211e68 +4021665f: 0020c0 memw +40216662: 446d72 s32i a7, a13, 0x110 +40216665: 0020c0 memw +40216668: fa2e62 l32i a6, a14, 0x3e8 +4021666b: 1066f0 and a6, a6, a15 +4021666e: 0020c0 memw +40216671: fa6e62 s32i a6, a14, 0x3e8 +40216674: ffe251 l32r a5, 402165fc +40216677: fbcdc1 l32r a12, 402155ac +4021667a: 0020c0 memw +4021667d: fa2e42 l32i a4, a14, 0x3e8 +40216680: 104450 and a4, a4, a5 +40216683: 0020c0 memw +40216686: fa6e42 s32i a4, a14, 0x3e8 +40216689: ffdd31 l32r a3, 40216600 +4021668c: 0020c0 memw +4021668f: 442d22 l32i a2, a13, 0x110 +40216692: 202230 or a2, a2, a3 +40216695: 0020c0 memw +40216698: 230c movi.n a3, 2 +4021669a: 040c movi.n a4, 0 +4021669c: 752c movi.n a5, 39 +4021669e: 0c08 l32i.n a0, a12, 0 +402166a0: 446d22 s32i a2, a13, 0x110 +402166a3: 262002 l32i a0, a0, 152 +402166a6: 6aa022 movi a2, 106 +402166a9: 0000c0 callx0 a0 +402166ac: ffd661 l32r a6, 40216604 +402166af: 000662 l8ui a6, a6, 0 +402166b2: fcd581 l32r a8, 40215a08 +402166b5: 069c beqz.n a6, 402166c9 +402166b7: 0020c0 memw +402166ba: fa2e72 l32i a7, a14, 0x3e8 +402166bd: 1077f0 and a7, a7, a15 +402166c0: 207780 or a7, a7, a8 +402166c3: 0020c0 memw +402166c6: fa6e72 s32i a7, a14, 0x3e8 +402166c9: fd42f1 l32r a15, 40215bd4 +402166cc: ffcf71 l32r a7, 40216608 +402166cf: fbea91 l32r a9, 40215678 +402166d2: 0020c0 memw +402166d5: 442d62 l32i a6, a13, 0x110 +402166d8: 206670 or a6, a6, a7 +402166db: 0020c0 memw +402166de: 446d62 s32i a6, a13, 0x110 +402166e1: ffca51 l32r a5, 4021660c +402166e4: ffcb41 l32r a4, 40216610 +402166e7: 0020c0 memw +402166ea: e82e32 l32i a3, a14, 0x3a0 +402166ed: 103350 and a3, a3, a5 +402166f0: 203340 or a3, a3, a4 +402166f3: 0020c0 memw +402166f6: e86e32 s32i a3, a14, 0x3a0 +402166f9: ffc621 l32r a2, 40216614 +402166fc: ffc701 l32r a0, 40216618 +402166ff: 0020c0 memw +40216702: e62eb2 l32i a11, a14, 0x398 +40216705: 10bb20 and a11, a11, a2 +40216708: 20bb00 or a11, a11, a0 +4021670b: 0020c0 memw +4021670e: e66eb2 s32i a11, a14, 0x398 +40216711: da7c movi.n a10, -3 +40216713: 0020c0 memw +40216716: 9c2982 l32i a8, a9, 0x270 +40216719: 1088a0 and a8, a8, a10 +4021671c: 0020c0 memw +4021671f: 9c6982 s32i a8, a9, 0x270 +40216722: 220c movi.n a2, 2 +40216724: bade01 l32r a0, 4020529c +40216727: 0000c0 callx0 a0 +4021672a: ffbc31 l32r a3, 4021661c +4021672d: 0020c0 memw +40216730: 442d22 l32i a2, a13, 0x110 +40216733: 202230 or a2, a2, a3 +40216736: 0020c0 memw +40216739: 0c08 l32i.n a0, a12, 0 +4021673b: 282002 l32i a0, a0, 160 +4021673e: 446d22 s32i a2, a13, 0x110 +40216741: 0000c0 callx0 a0 +40216744: 220c movi.n a2, 2 +40216746: 0c08 l32i.n a0, a12, 0 +40216748: 130c movi.n a3, 1 +4021674a: 2b2002 l32i a0, a0, 172 +4021674d: 81a042 movi a4, 129 +40216750: 0000c0 callx0 a0 +40216753: 0c08 l32i.n a0, a12, 0 +40216755: 322002 l32i a0, a0, 200 +40216758: 0000c0 callx0 a0 +4021675b: 6aa022 movi a2, 106 +4021675e: 230c movi.n a3, 2 +40216760: 0c08 l32i.n a0, a12, 0 +40216762: 040c movi.n a4, 0 +40216764: 262002 l32i a0, a0, 152 +40216767: 452c movi.n a5, 36 +40216769: 0000c0 callx0 a0 +4021676c: 6aa022 movi a2, 106 +4021676f: 230c movi.n a3, 2 +40216771: 0c08 l32i.n a0, a12, 0 +40216773: 040c movi.n a4, 0 +40216775: 262002 l32i a0, a0, 152 +40216778: 552c movi.n a5, 37 +4021677a: 0000c0 callx0 a0 +4021677d: 0c08 l32i.n a0, a12, 0 +4021677f: 2f2002 l32i a0, a0, 188 +40216782: 0000c0 callx0 a0 +40216785: ffa952 movi a5, 0xfffff9ff +40216788: 00a442 movi a4, 0x400 +4021678b: fc7231 l32r a3, 40215954 +4021678e: 0020c0 memw +40216791: d02322 l32i a2, a3, 0x340 +40216794: 102250 and a2, a2, a5 +40216797: 202240 or a2, a2, a4 +4021679a: 0020c0 memw +4021679d: 040c movi.n a4, 0 +4021679f: 852c movi.n a5, 40 +402167a1: d06322 s32i a2, a3, 0x340 +402167a4: 0c08 l32i.n a0, a12, 0 +402167a6: 62a022 movi a2, 98 +402167a9: 262002 l32i a0, a0, 152 +402167ac: 130c movi.n a3, 1 +402167ae: 0000c0 callx0 a0 +402167b1: 0f68 l32i.n a6, a15, 0 +402167b3: 07f6b7 bbsi a6, 27, 402167be +402167b6: 120c movi.n a2, 1 +402167b8: ffcb85 call0 40216474 +402167bb: 0002c6 j 402167ca +402167be: 300f22 l8ui a2, a15, 48 +402167c1: 012280 slli a2, a2, 24 +402167c4: 312820 srai a2, a2, 24 +402167c7: ffd885 call0 40216550 +402167ca: 0c08 l32i.n a0, a12, 0 +402167cc: 232002 l32i a0, a0, 140 +402167cf: 0000c0 callx0 a0 +402167d2: 6ba022 movi a2, 107 +402167d5: 230c movi.n a3, 2 +402167d7: 0c08 l32i.n a0, a12, 0 +402167d9: 140c movi.n a4, 1 +402167db: 262002 l32i a0, a0, 152 +402167de: 854c movi.n a5, 72 +402167e0: 0000c0 callx0 a0 +402167e3: 0c08 l32i.n a0, a12, 0 +402167e5: 222002 l32i a0, a0, 136 +402167e8: 0000c0 callx0 a0 +402167eb: 6ca022 movi a2, 108 +402167ee: 230c movi.n a3, 2 +402167f0: 0c08 l32i.n a0, a12, 0 +402167f2: 040c movi.n a4, 0 +402167f4: 262002 l32i a0, a0, 152 +402167f7: 551c movi.n a5, 21 +402167f9: 0000c0 callx0 a0 +402167fc: 0c08 l32i.n a0, a12, 0 +402167fe: 132002 l32i a0, a0, 76 +40216801: 0000c0 callx0 a0 +40216804: 77a022 movi a2, 119 +40216807: 030c movi.n a3, 0 +40216809: 0c08 l32i.n a0, a12, 0 +4021680b: a41c movi.n a4, 26 +4021680d: 262002 l32i a0, a0, 152 +40216810: 850c movi.n a5, 8 +40216812: 0000c0 callx0 a0 +40216815: 77a022 movi a2, 119 +40216818: 030c movi.n a3, 0 +4021681a: 0c08 l32i.n a0, a12, 0 +4021681c: a41c movi.n a4, 26 +4021681e: 262002 l32i a0, a0, 152 +40216821: 853c movi.n a5, 56 +40216823: 0000c0 callx0 a0 +40216826: 67a022 movi a2, 103 +40216829: 430c movi.n a3, 4 +4021682b: 440c movi.n a4, 4 +4021682d: 750c movi.n a5, 7 +4021682f: 0c08 l32i.n a0, a12, 0 +40216831: 760c movi.n a6, 7 +40216833: 272002 l32i a0, a0, 156 +40216836: 170c movi.n a7, 1 +40216838: 0000c0 callx0 a0 +4021683b: 6aa022 movi a2, 106 +4021683e: 230c movi.n a3, 2 +40216840: 040c movi.n a4, 0 +40216842: 952c movi.n a5, 41 +40216844: 21d8 l32i.n a13, a1, 8 +40216846: 31e8 l32i.n a14, a1, 12 +40216848: 0c08 l32i.n a0, a12, 0 +4021684a: 41f8 l32i.n a15, a1, 16 +4021684c: 262002 l32i a0, a0, 152 +4021684f: 11c8 l32i.n a12, a1, 4 +40216851: 0000c0 callx0 a0 +40216854: 020c movi.n a2, 0 +40216856: 0108 l32i.n a0, a1, 0 +40216858: 20c112 addi a1, a1, 32 +4021685b: f00d ret.n +4021685d: 000000 ill +40216860: fe1f00 excw +40216863: ff .byte 0xff + +40216864 : +40216864: fcdc61 l32r a6, 40215bd4 +40216867: 5c0692 l8ui a9, a6, 92 +4021686a: 019980 slli a9, a9, 24 +4021686d: 319890 srai a9, a9, 24 +40216870: c09490 sub a9, a4, a9 +40216873: 72bc beqz.n a2, 402168ae +40216875: 8b1c movi.n a11, 24 +40216877: fb8171 l32r a7, 4021567c +4021687a: 020c movi.n a2, 0 +4021687c: 11a330 slli a10, a3, 13 +4021687f: fff831 l32r a3, 40216860 +40216882: a06270 addx4 a6, a2, a7 +40216885: 0020c0 memw +40216888: c12682 l32i a8, a6, 0x304 +4021688b: 105830 and a5, a8, a3 +4021688e: c08890 sub a8, a8, a9 +40216891: 205a50 or a5, a10, a5 +40216894: 748080 extui a8, a8, 0, 8 +40216897: 205580 or a5, a5, a8 +4021689a: 0020c0 memw +4021689d: c16652 s32i a5, a6, 0x304 +402168a0: 221b addi.n a2, a2, 1 +402168a2: 742020 extui a2, a2, 0, 8 +402168a5: d992b7 bne a2, a11, 40216882 +402168a8: fccb91 l32r a9, 40215bd4 +402168ab: 5c4942 s8i a4, a9, 92 +402168ae: f00d ret.n +402168b0: 000000 ill +402168b3: d6 .byte 0xd6 + +402168b4 : +402168b4: 160c movi.n a6, 1 +402168b6: d0c112 addi a1, a1, -48 +402168b9: 91d9 s32i.n a13, a1, 36 +402168bb: 7109 s32i.n a0, a1, 28 +402168bd: fbd6d1 l32r a13, 40215818 +402168c0: 81c9 s32i.n a12, a1, 32 +402168c2: 034d62 s8i a6, a13, 3 +402168c5: ff4a31 l32r a3, 402165f0 +402168c8: 02cd mov.n a12, a2 +402168ca: 0020c0 memw +402168cd: 442302 l32i a0, a3, 0x110 +402168d0: 6109 s32i.n a0, a1, 24 +402168d2: fff741 l32r a4, 402168b0 +402168d5: 0020c0 memw +402168d8: 442322 l32i a2, a3, 0x110 +402168db: 202240 or a2, a2, a4 +402168de: 0020c0 memw +402168e1: 446322 s32i a2, a3, 0x110 +402168e4: 0af097 bbsi a0, 25, 402168f2 +402168e7: fb3101 l32r a0, 402155ac +402168ea: 0008 l32i.n a0, a0, 0 +402168ec: 132002 l32i a0, a0, 76 +402168ef: 0000c0 callx0 a0 +402168f2: 020d22 l8ui a2, a13, 2 +402168f5: 41c9 s32i.n a12, a1, 16 +402168f7: 82cc bnez.n a2, 40216903 +402168f9: 6ccc bnez.n a12, 40216903 +402168fb: 420c movi.n a2, 4 +402168fd: fedc01 l32r a0, 40216470 +40216900: 0000c0 callx0 a0 +40216903: 6ca022 movi a2, 108 +40216906: 230c movi.n a3, 2 +40216908: 040c movi.n a4, 0 +4021690a: fb2801 l32r a0, 402155ac +4021690d: 550c movi.n a5, 5 +4021690f: 0008 l32i.n a0, a0, 0 +40216911: 560c movi.n a6, 5 +40216913: 272002 l32i a0, a0, 156 +40216916: 170c movi.n a7, 1 +40216918: 0000c0 callx0 a0 +4021691b: fc0f41 l32r a4, 40215958 +4021691e: fc0dc1 l32r a12, 40215954 +40216921: 0020c0 memw +40216924: d72c32 l32i a3, a12, 0x35c +40216927: 203340 or a3, a3, a4 +4021692a: 0020c0 memw +4021692d: d76c32 s32i a3, a12, 0x35c +40216930: 0020c0 memw +40216933: d42c22 l32i a2, a12, 0x350 +40216936: 252820 extui a2, a2, 24, 3 +40216939: a28c beqz.n a2, 40216947 +4021693b: 0020c0 memw +4021693e: d42c52 l32i a5, a12, 0x350 +40216941: 255850 extui a5, a5, 24, 3 +40216944: ff3556 bnez a5, 4021693b +40216947: d87c movi.n a8, -3 +40216949: 0020c0 memw +4021694c: d42c72 l32i a7, a12, 0x350 +4021694f: 107780 and a7, a7, a8 +40216952: 0020c0 memw +40216955: d46c72 s32i a7, a12, 0x350 +40216958: 220c movi.n a2, 2 +4021695a: 0020c0 memw +4021695d: d42c62 l32i a6, a12, 0x350 +40216960: 206620 or a6, a6, a2 +40216963: 0020c0 memw +40216966: d46c62 s32i a6, a12, 0x350 +40216969: ba4c01 l32r a0, 4020529c +4021696c: 0000c0 callx0 a0 +4021696f: 0020c0 memw +40216972: d42c92 l32i a9, a12, 0x350 +40216975: 259890 extui a9, a9, 24, 3 +40216978: a98c beqz.n a9, 40216986 +4021697a: 0020c0 memw +4021697d: d42ca2 l32i a10, a12, 0x350 +40216980: 25a8a0 extui a10, a10, 24, 3 +40216983: ff3a56 bnez a10, 4021697a +40216986: 202110 or a2, a1, a1 +40216989: 059ac5 call0 4021c338 +4021698c: fb0801 l32r a0, 402155ac +4021698f: 00a052 movi a5, 0 +40216992: 00a042 movi a4, 0 +40216995: 016d mov.n a6, a1 +40216997: 851b addi.n a8, a5, 1 +40216999: 907560 addx2 a7, a5, a6 +4021699c: 001772 l16ui a7, a7, 0 +4021699f: 745080 extui a5, a8, 0, 8 +402169a2: 474a add.n a4, a7, a4 +402169a4: f44040 extui a4, a4, 0, 16 +402169a7: ec8566 bnei a5, 8, 40216997 +402169aa: 560c movi.n a6, 5 +402169ac: 070c movi.n a7, 0 +402169ae: ad8f31 l32r a3, 40201fec +402169b1: ffa052 movi a5, 255 +402169b4: 248b addi.n a2, a4, 8 +402169b6: 0008 l32i.n a0, a0, 0 +402169b8: fc8541 l32r a4, 40215bcc +402169bb: f42420 extui a2, a2, 4, 16 +402169be: 470442 l8ui a4, a4, 71 +402169c1: 272002 l32i a0, a0, 156 +402169c4: c04450 sub a4, a4, a5 +402169c7: 832340 moveqz a2, a3, a4 +402169ca: 550c movi.n a5, 5 +402169cc: 230c movi.n a3, 2 +402169ce: 5129 s32i.n a2, a1, 20 +402169d0: 040c movi.n a4, 0 +402169d2: 6ca022 movi a2, 108 +402169d5: 0000c0 callx0 a0 +402169d8: 100c movi.n a0, 1 +402169da: 0020c0 memw +402169dd: d42c32 l32i a3, a12, 0x350 +402169e0: 253830 extui a3, a3, 24, 3 +402169e3: a38c beqz.n a3, 402169f1 +402169e5: 0020c0 memw +402169e8: d42c42 l32i a4, a12, 0x350 +402169eb: 254840 extui a4, a4, 24, 3 +402169ee: ff3456 bnez a4, 402169e5 +402169f1: fc06a1 l32r a10, 40215a0c +402169f4: 0020c0 memw +402169f7: d72c92 l32i a9, a12, 0x35c +402169fa: 1099a0 and a9, a9, a10 +402169fd: 0020c0 memw +40216a00: d76c92 s32i a9, a12, 0x35c +40216a03: feaf82 movi a8, -2 +40216a06: 0020c0 memw +40216a09: d82c72 l32i a7, a12, 0x360 +40216a0c: 107780 and a7, a7, a8 +40216a0f: 0020c0 memw +40216a12: d86c72 s32i a7, a12, 0x360 +40216a15: 0020c0 memw +40216a18: d82c62 l32i a6, a12, 0x360 +40216a1b: 206600 or a6, a6, a0 +40216a1e: 0020c0 memw +40216a21: d86c62 s32i a6, a12, 0x360 +40216a24: 020d52 l8ui a5, a13, 2 +40216a27: 0421b2 l32i a11, a1, 16 +40216a2a: 008556 bnez a5, 40216a36 +40216a2d: 5bcc bnez.n a11, 40216a36 +40216a2f: 420c movi.n a2, 4 +40216a31: 030c movi.n a3, 0 +40216a33: 06e305 call0 4021d864 +40216a36: 5108 l32i.n a0, a1, 20 +40216a38: 0020c0 memw +40216a3b: 81c8 l32i.n a12, a1, 32 +40216a3d: feec41 l32r a4, 402165f0 +40216a40: 6138 l32i.n a3, a1, 24 +40216a42: 020c movi.n a2, 0 +40216a44: 446432 s32i a3, a4, 0x110 +40216a47: 034d22 s8i a2, a13, 3 +40216a4a: 91d8 l32i.n a13, a1, 36 +40216a4c: 002d mov.n a2, a0 +40216a4e: 7108 l32i.n a0, a1, 28 +40216a50: 30c112 addi a1, a1, 48 +40216a53: f00d ret.n +40216a55: 000000 ill +40216a58: 000f00 excw + ... + +40216a5c : +40216a5c: d0c112 addi a1, a1, -48 +40216a5f: 8139 s32i.n a3, a1, 32 +40216a61: 7129 s32i.n a2, a1, 28 +40216a63: 2109 s32i.n a0, a1, 8 +40216a65: 41d9 s32i.n a13, a1, 16 +40216a67: 31c9 s32i.n a12, a1, 12 +40216a69: 61f9 s32i.n a15, a1, 24 +40216a6b: 51e9 s32i.n a14, a1, 20 +40216a6d: 04ed mov.n a14, a4 +40216a6f: fee0f1 l32r a15, 402165f0 +40216a72: 0020c0 memw +40216a75: 442f02 l32i a0, a15, 0x110 +40216a78: 1109 s32i.n a0, a1, 4 +40216a7a: ff8d31 l32r a3, 402168b0 +40216a7d: 0020c0 memw +40216a80: 442f22 l32i a2, a15, 0x110 +40216a83: 202230 or a2, a2, a3 +40216a86: 0020c0 memw +40216a89: 446f22 s32i a2, a15, 0x110 +40216a8c: 0af097 bbsi a0, 25, 40216a9a +40216a8f: fac701 l32r a0, 402155ac +40216a92: 0008 l32i.n a0, a0, 0 +40216a94: 132002 l32i a0, a0, 76 +40216a97: 0000c0 callx0 a0 +40216a9a: fbaec1 l32r a12, 40215954 +40216a9d: a99201 l32r a0, 402010e8 +40216aa0: 240c movi.n a4, 2 +40216aa2: fb5d71 l32r a7, 40215818 +40216aa5: 160c movi.n a6, 1 +40216aa7: 034762 s8i a6, a7, 3 +40216aaa: 012eb6 bltui a14, 2, 40216aaf +40216aad: 0e4d mov.n a4, a14 +40216aaf: 748040 extui a8, a4, 0, 8 +40216ab2: 0020c0 memw +40216ab5: d42c52 l32i a5, a12, 0x350 +40216ab8: 0159 s32i.n a5, a1, 0 +40216aba: 0020c0 memw +40216abd: d52cf2 l32i a15, a12, 0x354 +40216ac0: 0020c0 memw +40216ac3: 113880 slli a3, a8, 8 +40216ac6: f64941 l32r a4, 402143ec +40216ac9: d62ce2 l32i a14, a12, 0x358 +40216acc: 0020c0 memw +40216acf: d42c22 l32i a2, a12, 0x350 +40216ad2: 102240 and a2, a2, a4 +40216ad5: 202230 or a2, a2, a3 +40216ad8: 0020c0 memw +40216adb: d46c22 s32i a2, a12, 0x350 +40216ade: b80b addi.n a11, a8, -1 +40216ae0: 112b00 slli a2, a11, 16 +40216ae3: a0a880 addx4 a10, a8, a8 +40216ae6: 11bb80 slli a11, a11, 8 +40216ae9: bb2a add.n a11, a11, a2 +40216aeb: aaba add.n a10, a10, a11 +40216aed: aa0b addi.n a10, a10, -1 +40216aef: 0020c0 memw +40216af2: d52c92 l32i a9, a12, 0x354 +40216af5: 109900 and a9, a9, a0 +40216af8: 2099a0 or a9, a9, a10 +40216afb: 0020c0 memw +40216afe: d56c92 s32i a9, a12, 0x354 +40216b01: a07880 addx4 a7, a8, a8 +40216b04: 906880 addx2 a6, a8, a8 +40216b07: a05880 addx4 a5, a8, a8 +40216b0a: 905580 addx2 a5, a5, a8 +40216b0d: 660b addi.n a6, a6, -1 +40216b0f: f87c movi.n a8, -1 +40216b11: 907780 addx2 a7, a7, a8 +40216b14: 116680 slli a6, a6, 8 +40216b17: 117700 slli a7, a7, 16 +40216b1a: 667a add.n a6, a6, a7 +40216b1c: 556a add.n a5, a5, a6 +40216b1e: 550b addi.n a5, a5, -1 +40216b20: 0020c0 memw +40216b23: d62c42 l32i a4, a12, 0x358 +40216b26: 104400 and a4, a4, a0 +40216b29: 204450 or a4, a4, a5 +40216b2c: 0020c0 memw +40216b2f: d66c42 s32i a4, a12, 0x358 +40216b32: 336c movi.n a3, -29 +40216b34: 0020c0 memw +40216b37: d42c22 l32i a2, a12, 0x350 +40216b3a: 102230 and a2, a2, a3 +40216b3d: 0020c0 memw +40216b40: 230c movi.n a3, 2 +40216b42: 040c movi.n a4, 0 +40216b44: 550c movi.n a5, 5 +40216b46: 560c movi.n a6, 5 +40216b48: fa9901 l32r a0, 402155ac +40216b4b: 170c movi.n a7, 1 +40216b4d: 0008 l32i.n a0, a0, 0 +40216b4f: d46c22 s32i a2, a12, 0x350 +40216b52: 272002 l32i a0, a0, 156 +40216b55: 6ca022 movi a2, 108 +40216b58: 0000c0 callx0 a0 +40216b5b: fb7f81 l32r a8, 40215958 +40216b5e: 0020c0 memw +40216b61: d72c72 l32i a7, a12, 0x35c +40216b64: 207780 or a7, a7, a8 +40216b67: 0020c0 memw +40216b6a: d76c72 s32i a7, a12, 0x35c +40216b6d: 0020c0 memw +40216b70: d42c62 l32i a6, a12, 0x350 +40216b73: 256860 extui a6, a6, 24, 3 +40216b76: a68c beqz.n a6, 40216b84 +40216b78: 0020c0 memw +40216b7b: d42c92 l32i a9, a12, 0x350 +40216b7e: 259890 extui a9, a9, 24, 3 +40216b81: ff3956 bnez a9, 40216b78 +40216b84: 91f9 s32i.n a15, a1, 36 +40216b86: 81a8 l32i.n a10, a1, 32 +40216b88: a1e9 s32i.n a14, a1, 40 +40216b8a: 0a4a16 beqz a10, 40216c32 +40216b8d: 0d0c movi.n a13, 0 +40216b8f: ffa0f2 movi a15, 255 +40216b92: ad16e1 l32r a14, 40201fec +40216b95: 0020c0 memw +40216b98: d42c72 l32i a7, a12, 0x350 +40216b9b: d87c movi.n a8, -3 +40216b9d: 107780 and a7, a7, a8 +40216ba0: 0020c0 memw +40216ba3: d46c72 s32i a7, a12, 0x350 +40216ba6: 0020c0 memw +40216ba9: d42c52 l32i a5, a12, 0x350 +40216bac: 260c movi.n a6, 2 +40216bae: 205560 or a5, a5, a6 +40216bb1: 0020c0 memw +40216bb4: d46c52 s32i a5, a12, 0x350 +40216bb7: 120c movi.n a2, 1 +40216bb9: b9b801 l32r a0, 4020529c +40216bbc: 0000c0 callx0 a0 +40216bbf: ffa601 l32r a0, 40216a58 +40216bc2: 040c movi.n a4, 0 +40216bc4: f77c movi.n a7, -1 +40216bc6: fc01b1 l32r a11, 40215bcc +40216bc9: 0020c0 memw +40216bcc: d42c92 l32i a9, a12, 0x350 +40216bcf: 259890 extui a9, a9, 24, 3 +40216bd2: a98c beqz.n a9, 40216be0 +40216bd4: 0020c0 memw +40216bd7: d42ca2 l32i a10, a12, 0x350 +40216bda: 25a8a0 extui a10, a10, 24, 3 +40216bdd: ff3a56 bnez a10, 40216bd4 +40216be0: 0f8d mov.n a8, a15 +40216be2: 04ad mov.n a10, a4 +40216be4: 0020c0 memw +40216be7: 17a122 movi a2, 0x117 +40216bea: e02c32 l32i a3, a12, 0x380 +40216bed: 470b52 l8ui a5, a11, 71 +40216bf0: 303370 xor a3, a3, a7 +40216bf3: c055f0 sub a5, a5, a15 +40216bf6: a49030 extui a9, a3, 0, 11 +40216bf9: 743030 extui a3, a3, 0, 8 +40216bfc: ebc332 addi a3, a3, -21 +40216bff: b3a330 movgez a10, a3, a3 +40216c02: 82aa20 mull a10, a10, a2 +40216c05: 7138 l32i.n a3, a1, 28 +40216c07: 102900 and a2, a9, a0 +40216c0a: 21a8a0 srai a10, a10, 8 +40216c0d: 903d30 addx2 a3, a13, a3 +40216c10: 012fa7 blt a15, a10, 40216c15 +40216c13: 0a8d mov.n a8, a10 +40216c15: 282a add.n a2, a8, a2 +40216c17: dd1b addi.n a13, a13, 1 +40216c19: f4d0d0 extui a13, a13, 0, 16 +40216c1c: f42020 extui a2, a2, 0, 16 +40216c1f: 221b addi.n a2, a2, 1 +40216c21: 212120 srai a2, a2, 1 +40216c24: 832e50 moveqz a2, a14, a5 +40216c27: 8158 l32i.n a5, a1, 32 +40216c29: 005322 s16i a2, a3, 0 +40216c2c: 0215d7 beq a5, a13, 40216c32 +40216c2f: ffd886 j 40216b95 +40216c32: a1e8 l32i.n a14, a1, 40 +40216c34: 91f8 l32i.n a15, a1, 36 +40216c36: 01d8 l32i.n a13, a1, 0 +40216c38: 6ca022 movi a2, 108 +40216c3b: 230c movi.n a3, 2 +40216c3d: 040c movi.n a4, 0 +40216c3f: fa5b01 l32r a0, 402155ac +40216c42: 550c movi.n a5, 5 +40216c44: 0008 l32i.n a0, a0, 0 +40216c46: 560c movi.n a6, 5 +40216c48: 272002 l32i a0, a0, 156 +40216c4b: 070c movi.n a7, 0 +40216c4d: 0000c0 callx0 a0 +40216c50: 140c movi.n a4, 1 +40216c52: faf131 l32r a3, 40215818 +40216c55: fe6621 l32r a2, 402165f0 +40216c58: 1108 l32i.n a0, a1, 4 +40216c5a: 0020c0 memw +40216c5d: d46cd2 s32i a13, a12, 0x350 +40216c60: 0020c0 memw +40216c63: d56cf2 s32i a15, a12, 0x354 +40216c66: 0020c0 memw +40216c69: d66ce2 s32i a14, a12, 0x358 +40216c6c: 0020c0 memw +40216c6f: d42c52 l32i a5, a12, 0x350 +40216c72: 255850 extui a5, a5, 24, 3 +40216c75: a58c beqz.n a5, 40216c83 +40216c77: 0020c0 memw +40216c7a: d42c62 l32i a6, a12, 0x350 +40216c7d: 256860 extui a6, a6, 24, 3 +40216c80: ff3656 bnez a6, 40216c77 +40216c83: fb62d1 l32r a13, 40215a0c +40216c86: 0020c0 memw +40216c89: d72cb2 l32i a11, a12, 0x35c +40216c8c: 10bbd0 and a11, a11, a13 +40216c8f: 0020c0 memw +40216c92: d76cb2 s32i a11, a12, 0x35c +40216c95: ea7c movi.n a10, -2 +40216c97: 0020c0 memw +40216c9a: d82c92 l32i a9, a12, 0x360 +40216c9d: 1099a0 and a9, a9, a10 +40216ca0: 0020c0 memw +40216ca3: d86c92 s32i a9, a12, 0x360 +40216ca6: 0020c0 memw +40216ca9: d82c82 l32i a8, a12, 0x360 +40216cac: 208840 or a8, a8, a4 +40216caf: 0020c0 memw +40216cb2: d86c82 s32i a8, a12, 0x360 +40216cb5: 0020c0 memw +40216cb8: 31c8 l32i.n a12, a1, 12 +40216cba: 41d8 l32i.n a13, a1, 16 +40216cbc: 51e8 l32i.n a14, a1, 20 +40216cbe: 61f8 l32i.n a15, a1, 24 +40216cc0: 446202 s32i a0, a2, 0x110 +40216cc3: 070c movi.n a7, 0 +40216cc5: 2108 l32i.n a0, a1, 8 +40216cc7: 034372 s8i a7, a3, 3 +40216cca: 30c112 addi a1, a1, 48 +40216ccd: f00d ret.n + ... + +40216cd0 : +40216cd0: 029d mov.n a9, a2 +40216cd2: 052d mov.n a2, a5 +40216cd4: 022937 blt a9, a3, 40216cda +40216cd7: 0aa497 bge a4, a9, 40216ce5 +40216cda: 401600 ssl a6 +40216cdd: 130c movi.n a3, 1 +40216cdf: a13300 sll a3, a3 +40216ce2: 202230 or a2, a2, a3 +40216ce5: f00d ret.n +40216ce7: 8aca00 excw +40216cea: fe .byte 0xfe +40216ceb: 3f .byte 0x3f +40216cec: 000ff4 excw + ... + +40216cf0 : +40216cf0: 050c movi.n a5, 0 +40216cf2: e0c112 addi a1, a1, -32 +40216cf5: 21d9 s32i.n a13, a1, 8 +40216cf7: 41f9 s32i.n a15, a1, 16 +40216cf9: 31e9 s32i.n a14, a1, 12 +40216cfb: 11c9 s32i.n a12, a1, 4 +40216cfd: fbb5e1 l32r a14, 40215bd4 +40216d00: 0109 s32i.n a0, a1, 0 +40216d02: 0ecd mov.n a12, a14 +40216d04: ee8b addi.n a14, a14, 8 +40216d06: 030c movi.n a3, 0 +40216d08: c40c movi.n a4, 12 +40216d0a: 060c movi.n a6, 0 +40216d0c: 069c22 l16si a2, a12, 12 +40216d0f: fffc05 call0 40216cd0 +40216d12: 025d mov.n a5, a2 +40216d14: cc2b addi.n a12, a12, 2 +40216d16: ec9ce7 bne a12, a14, 40216d06 +40216d19: fff3c1 l32r a12, 40216ce8 +40216d1c: 1d0c movi.n a13, 1 +40216d1e: fbadf1 l32r a15, 40215bd4 +40216d21: fff201 l32r a0, 40216cec +40216d24: 2d1ff2 l16ui a15, a15, 90 +40216d27: e4a362 movi a6, 0x3e4 +40216d2a: 021f67 beq a15, a6, 40216d30 +40216d2d: 199f07 bne a15, a0, 40216d4a +40216d30: c30c movi.n a3, 12 +40216d32: c43c movi.n a4, 60 +40216d34: 370c22 l8ui a2, a12, 55 +40216d37: 160c movi.n a6, 1 +40216d39: 012280 slli a2, a2, 24 +40216d3c: 312820 srai a2, a2, 24 +40216d3f: fff905 call0 40216cd0 +40216d42: 025d mov.n a5, a2 +40216d44: ffea01 l32r a0, 40216cec +40216d47: e4a362 movi a6, 0x3e4 +40216d4a: cc6b addi.n a12, a12, 6 +40216d4c: dd1b addi.n a13, a13, 1 +40216d4e: d85d66 bnei a13, 5, 40216d2a +40216d51: fba001 l32r a0, 40215bd4 +40216d54: 0a1002 l16ui a0, a0, 20 +40216d57: 744800 extui a4, a0, 8, 8 +40216d5a: 042d mov.n a2, a4 +40216d5c: 740000 extui a0, a0, 0, 8 +40216d5f: 00dd mov.n a13, a0 +40216d61: 02b4a6 blti a4, 16, 40216d67 +40216d64: e0c422 addi a2, a4, -32 +40216d67: 02c0a6 blti a0, 32, 40216d6d +40216d6a: c0c0d2 addi a13, a0, -64 +40216d6d: 337c movi.n a3, -13 +40216d6f: d40c movi.n a4, 13 +40216d71: 260c movi.n a6, 2 +40216d73: fff5c5 call0 40216cd0 +40216d76: 536c movi.n a3, -27 +40216d78: b41c movi.n a4, 27 +40216d7a: 025d mov.n a5, a2 +40216d7c: 260c movi.n a6, 2 +40216d7e: 0d2d mov.n a2, a13 +40216d80: fff4c5 call0 40216cd0 +40216d83: fb94c1 l32r a12, 40215bd4 +40216d86: 025d mov.n a5, a2 +40216d88: fcab addi.n a15, a12, 10 +40216d8a: 0b1c02 l16ui a0, a12, 22 +40216d8d: 444600 extui a4, a0, 6, 5 +40216d90: 042d mov.n a2, a4 +40216d92: 540000 extui a0, a0, 0, 6 +40216d95: 00dd mov.n a13, a0 +40216d97: 02b4a6 blti a4, 16, 40216d9d +40216d9a: e0c422 addi a2, a4, -32 +40216d9d: 02c0a6 blti a0, 32, 40216da3 +40216da0: c0c0d2 addi a13, a0, -64 +40216da3: 337c movi.n a3, -13 +40216da5: d40c movi.n a4, 13 +40216da7: 360c movi.n a6, 3 +40216da9: fff245 call0 40216cd0 +40216dac: 536c movi.n a3, -27 +40216dae: b41c movi.n a4, 27 +40216db0: 025d mov.n a5, a2 +40216db2: 360c movi.n a6, 3 +40216db4: 0d2d mov.n a2, a13 +40216db6: fff185 call0 40216cd0 +40216db9: 025d mov.n a5, a2 +40216dbb: cc2b addi.n a12, a12, 2 +40216dbd: c99cf7 bne a12, a15, 40216d8a +40216dc0: fb85c1 l32r a12, 40215bd4 +40216dc3: 41f8 l32i.n a15, a1, 16 +40216dc5: 330c movi.n a3, 3 +40216dc7: 7ca042 movi a4, 124 +40216dca: 021c22 l16ui a2, a12, 4 +40216dcd: 460c movi.n a6, 4 +40216dcf: 74d820 extui a13, a2, 8, 8 +40216dd2: 742020 extui a2, a2, 0, 8 +40216dd5: ffef85 call0 40216cd0 +40216dd8: 330c movi.n a3, 3 +40216dda: 7ca042 movi a4, 124 +40216ddd: 025d mov.n a5, a2 +40216ddf: 460c movi.n a6, 4 +40216de1: 0d2d mov.n a2, a13 +40216de3: ffeec5 call0 40216cd0 +40216de6: 025d mov.n a5, a2 +40216de8: cc2b addi.n a12, a12, 2 +40216dea: d79ce7 bne a12, a14, 40216dc5 +40216ded: 11c8 l32i.n a12, a1, 4 +40216def: fb7931 l32r a3, 40215bd4 +40216df2: 21d8 l32i.n a13, a1, 8 +40216df4: 5d0332 l8ui a3, a3, 93 +40216df7: 31e8 l32i.n a14, a1, 12 +40216df9: 010380 slli a0, a3, 24 +40216dfc: 310800 srai a0, a0, 24 +40216dff: 0b6377 bbci a3, 7, 40216e0e +40216e02: 602000 neg a2, a0 +40216e05: 212320 srai a2, a2, 3 +40216e08: 602020 neg a2, a2 +40216e0b: 000086 j 40216e11 +40216e0e: 212300 srai a2, a0, 3 +40216e11: f43050 extui a3, a5, 0, 16 +40216e14: 112200 slli a2, a2, 16 +40216e17: 0108 l32i.n a0, a1, 0 +40216e19: 20c112 addi a1, a1, 32 +40216e1c: 202230 or a2, a2, a3 +40216e1f: f00d ret.n +40216e21: 000000 ill +40216e24: 8f0000 excw +40216e27: ffff03 excw +40216e2a: 70 .byte 0x70 +40216e2b: fc .byte 0xfc + +40216e2c : +40216e2c: f0c112 addi a1, a1, -16 +40216e2f: 21c9 s32i.n a12, a1, 8 +40216e31: 1109 s32i.n a0, a1, 4 +40216e33: fdef31 l32r a3, 402165f0 +40216e36: fa7801 l32r a0, 40215818 +40216e39: fcfcc1 l32r a12, 4021622c +40216e3c: 0020c0 memw +40216e3f: 442352 l32i a5, a3, 0x110 +40216e42: 0159 s32i.n a5, a1, 0 +40216e44: fe9b41 l32r a4, 402168b0 +40216e47: 0020c0 memw +40216e4a: 442322 l32i a2, a3, 0x110 +40216e4d: 202240 or a2, a2, a4 +40216e50: 0020c0 memw +40216e53: 446322 s32i a2, a3, 0x110 +40216e56: 020002 l8ui a0, a0, 2 +40216e59: 90cc bnez.n a0, 40216e66 +40216e5b: 420c movi.n a2, 4 +40216e5d: fd8401 l32r a0, 40216470 +40216e60: 0000c0 callx0 a0 +40216e63: 000706 j 40216e83 +40216e66: f9d101 l32r a0, 402155ac +40216e69: 0008 l32i.n a0, a0, 0 +40216e6b: 132002 l32i a0, a0, 76 +40216e6e: 0000c0 callx0 a0 +40216e71: ffec31 l32r a3, 40216e24 +40216e74: 0020c0 memw +40216e77: 862c22 l32i a2, a12, 0x218 +40216e7a: 202230 or a2, a2, a3 +40216e7d: 0020c0 memw +40216e80: 866c22 s32i a2, a12, 0x218 +40216e83: fb5241 l32r a4, 40215bcc +40216e86: ac5901 l32r a0, 40201fec +40216e89: 470442 l8ui a4, a4, 71 +40216e8c: ffa052 movi a5, 255 +40216e8f: 099457 bne a4, a5, 40216e9c +40216e92: 120c movi.n a2, 1 +40216e94: feb785 call0 40215a10 +40216e97: 020d mov.n a0, a2 +40216e99: ffffc6 j 40216e9c +40216e9c: faae21 l32r a2, 40215954 +40216e9f: 0020c0 memw +40216ea2: d42252 l32i a5, a2, 0x350 +40216ea5: 255850 extui a5, a5, 24, 3 +40216ea8: 00b516 beqz a5, 40216eb7 +40216eab: 0020c0 memw +40216eae: d42262 l32i a6, a2, 0x350 +40216eb1: 256860 extui a6, a6, 24, 3 +40216eb4: ff3656 bnez a6, 40216eab +40216eb7: fad561 l32r a6, 40215a0c +40216eba: 0020c0 memw +40216ebd: d72252 l32i a5, a2, 0x35c +40216ec0: 105560 and a5, a5, a6 +40216ec3: 0020c0 memw +40216ec6: d76252 s32i a5, a2, 0x35c +40216ec9: faa441 l32r a4, 4021595c +40216ecc: 0020c0 memw +40216ecf: d72232 l32i a3, a2, 0x35c +40216ed2: 103340 and a3, a3, a4 +40216ed5: 0020c0 memw +40216ed8: d76232 s32i a3, a2, 0x35c +40216edb: feafb2 movi a11, -2 +40216ede: 0020c0 memw +40216ee1: d822a2 l32i a10, a2, 0x360 +40216ee4: 10aab0 and a10, a10, a11 +40216ee7: 0020c0 memw +40216eea: d862a2 s32i a10, a2, 0x360 +40216eed: 01a092 movi a9, 1 +40216ef0: 0020c0 memw +40216ef3: d82282 l32i a8, a2, 0x360 +40216ef6: 208890 or a8, a8, a9 +40216ef9: 0020c0 memw +40216efc: fa4771 l32r a7, 40215818 +40216eff: d86282 s32i a8, a2, 0x360 +40216f02: 020772 l8ui a7, a7, 2 +40216f05: 3109 s32i.n a0, a1, 12 +40216f07: a7cc bnez.n a7, 40216f15 +40216f09: 420c movi.n a2, 4 +40216f0b: 030c movi.n a3, 0 +40216f0d: 069545 call0 4021d864 +40216f10: 3108 l32i.n a0, a1, 12 +40216f12: 000446 j 40216f27 +40216f15: ffc481 l32r a8, 40216e28 +40216f18: 0020c0 memw +40216f1b: 862c72 l32i a7, a12, 0x218 +40216f1e: 107780 and a7, a7, a8 +40216f21: 0020c0 memw +40216f24: 866c72 s32i a7, a12, 0x218 +40216f27: 002d mov.n a2, a0 +40216f29: 0020c0 memw +40216f2c: 1108 l32i.n a0, a1, 4 +40216f2e: 21c8 l32i.n a12, a1, 8 +40216f30: fdb0a1 l32r a10, 402165f0 +40216f33: 0198 l32i.n a9, a1, 0 +40216f35: 446a92 s32i a9, a10, 0x110 +40216f38: 10c112 addi a1, a1, 16 +40216f3b: f00d ret.n +40216f3d: 000000 ill + +40216f40 : +40216f40: f00d ret.n + ... + +40216f44 : +40216f44: f00d ret.n +40216f46: 000000 ill +40216f49: 0e .byte 0xe +40216f4a: 00 .byte 00 +40216f4b: 60 .byte 0x60 + +40216f4c : +40216f4c: c09320 sub a9, a3, a2 +40216f4f: 893b addi.n a8, a9, 3 +40216f51: b38990 movgez a8, a9, a9 +40216f54: 218280 srai a8, a8, 2 +40216f57: 881b addi.n a8, a8, 1 +40216f59: 889c beqz.n a8, 40216f75 +40216f5b: fffb31 l32r a3, 40216f48 +40216f5e: a07820 addx4 a7, a8, a2 +40216f61: 343a add.n a3, a4, a3 +40216f63: 0020c0 memw +40216f66: 0248 l32i.n a4, a2, 0 +40216f68: 0020c0 memw +40216f6b: 806342 s32i a4, a3, 0x200 +40216f6e: 224b addi.n a2, a2, 4 +40216f70: 334b addi.n a3, a3, 4 +40216f72: ed9277 bne a2, a7, 40216f63 +40216f75: 1128e0 slli a2, a8, 2 +40216f78: f00d ret.n + ... + +40216f7c : +40216f7c: c08320 sub a8, a3, a2 +40216f7f: 783b addi.n a7, a8, 3 +40216f81: b37880 movgez a7, a8, a8 +40216f84: 217270 srai a7, a7, 2 +40216f87: 771b addi.n a7, a7, 1 +40216f89: a79c beqz.n a7, 40216fa7 +40216f8b: ffefa1 l32r a10, 40216f48 +40216f8e: a09740 addx4 a9, a7, a4 +40216f91: 34aa add.n a3, a4, a10 +40216f93: 49aa add.n a4, a9, a10 +40216f95: 0020c0 memw +40216f98: 8023b2 l32i a11, a3, 0x200 +40216f9b: 0020c0 memw +40216f9e: 02b9 s32i.n a11, a2, 0 +40216fa0: 334b addi.n a3, a3, 4 +40216fa2: 224b addi.n a2, a2, 4 +40216fa4: ed9347 bne a3, a4, 40216f95 +40216fa7: 1127e0 slli a2, a7, 2 +40216faa: f00d ret.n + +40216fac : +40216fac: 047320 extui a7, a2, 3, 1 +40216faf: 046120 extui a6, a2, 1, 1 +40216fb2: 045020 extui a5, a2, 0, 1 +40216fb5: e0c112 addi a1, a1, -32 +40216fb8: 3109 s32i.n a0, a1, 12 +40216fba: 41c9 s32i.n a12, a1, 16 +40216fbc: 556a add.n a5, a5, a6 +40216fbe: f97bc1 l32r a12, 402155ac +40216fc1: 046220 extui a6, a2, 2, 1 +40216fc4: 667a add.n a6, a6, a7 +40216fc6: 040520 extui a0, a2, 5, 1 +40216fc9: 047620 extui a7, a2, 6, 1 +40216fcc: 007a add.n a0, a0, a7 +40216fce: 047420 extui a7, a2, 4, 1 +40216fd1: 007a add.n a0, a0, a7 +40216fd3: 006a add.n a0, a0, a6 +40216fd5: 005a add.n a0, a0, a5 +40216fd7: 245330 extui a5, a3, 3, 3 +40216fda: 742000 extui a2, a0, 0, 8 +40216fdd: 400c movi.n a0, 4 +40216fdf: 0152f6 bgeui a2, 5, 40216fe4 +40216fe2: 020d mov.n a0, a2 +40216fe4: 902000 addx2 a2, a0, a0 +40216fe7: d01c movi.n a0, 29 +40216fe9: 902250 addx2 a2, a2, a5 +40216fec: 742020 extui a2, a2, 0, 8 +40216fef: 013027 bltu a0, a2, 40216ff4 +40216ff2: 020d mov.n a0, a2 +40216ff4: 420c movi.n a2, 4 +40216ff6: 745000 extui a5, a0, 0, 8 +40216ff9: 130c movi.n a3, 1 +40216ffb: 0c08 l32i.n a0, a12, 0 +40216ffd: b04540 addx8 a4, a5, a4 +40217000: 1468 l32i.n a6, a4, 4 +40217002: 2b2002 l32i a0, a0, 172 +40217005: 0448 l32i.n a4, a4, 0 +40217007: 847960 extui a7, a6, 9, 9 +4021700a: 1179 s32i.n a7, a1, 4 +4021700c: 845040 extui a5, a4, 0, 9 +4021700f: 846060 extui a6, a6, 0, 9 +40217012: 2169 s32i.n a6, a1, 8 +40217014: 0159 s32i.n a5, a1, 0 +40217016: 844940 extui a4, a4, 9, 9 +40217019: 0000c0 callx0 a0 +4021701c: 1148 l32i.n a4, a1, 4 +4021701e: 0c08 l32i.n a0, a12, 0 +40217020: 520c movi.n a2, 5 +40217022: 2b2002 l32i a0, a0, 172 +40217025: 130c movi.n a3, 1 +40217027: 0000c0 callx0 a0 +4021702a: 0148 l32i.n a4, a1, 0 +4021702c: 0c08 l32i.n a0, a12, 0 +4021702e: 420c movi.n a2, 4 +40217030: 2b2002 l32i a0, a0, 172 +40217033: 230c movi.n a3, 2 +40217035: 0000c0 callx0 a0 +40217038: 2148 l32i.n a4, a1, 8 +4021703a: 520c movi.n a2, 5 +4021703c: 0c08 l32i.n a0, a12, 0 +4021703e: 230c movi.n a3, 2 +40217040: 2b2002 l32i a0, a0, 172 +40217043: 41c8 l32i.n a12, a1, 16 +40217045: 0000c0 callx0 a0 +40217048: 3108 l32i.n a0, a1, 12 +4021704a: 20c112 addi a1, a1, 32 +4021704d: f00d ret.n +4021704f: f70000 excw +40217052: 604022 s8i a2, a0, 96 +40217055: 4022f7 blt a2, a15, 40217099 +40217058: 22f7a0 excw +4021705b: f7b040 excw +4021705e: 22 .byte 0x22 +4021705f: 40 .byte 0x40 + +40217060 : +40217060: 06ad mov.n a10, a6 +40217062: 039d mov.n a9, a3 +40217064: a0c112 addi a1, a1, -96 +40217067: f98531 l32r a3, 4021567c +4021706a: d159 s32i.n a5, a1, 52 +4021706c: c129 s32i.n a2, a1, 48 +4021706e: 5109 s32i.n a0, a1, 20 +40217070: 71d9 s32i.n a13, a1, 28 +40217072: 61c9 s32i.n a12, a1, 24 +40217074: 91f9 s32i.n a15, a1, 36 +40217076: 81e9 s32i.n a14, a1, 32 +40217078: a149 s32i.n a4, a1, 40 +4021707a: f94ce1 l32r a14, 402155ac +4021707d: f46c movi.n a4, -17 +4021707f: 07fd mov.n a15, a7 +40217081: 0020c0 memw +40217084: e42322 l32i a2, a3, 0x390 +40217087: 102240 and a2, a2, a4 +4021708a: 0020c0 memw +4021708d: 241c movi.n a4, 18 +4021708f: 750c movi.n a5, 7 +40217091: 060c movi.n a6, 0 +40217093: 070c movi.n a7, 0 +40217095: f1a9 s32i.n a10, a1, 60 +40217097: 106192 s32i a9, a1, 64 +4021709a: e46322 s32i a2, a3, 0x390 +4021709d: 0e08 l32i.n a0, a14, 0 +4021709f: 77a022 movi a2, 119 +402170a2: 272002 l32i a0, a0, 156 +402170a5: 030c movi.n a3, 0 +402170a7: 0000c0 callx0 a0 +402170aa: 77a022 movi a2, 119 +402170ad: 030c movi.n a3, 0 +402170af: 940c movi.n a4, 9 +402170b1: 750c movi.n a5, 7 +402170b3: 0e08 l32i.n a0, a14, 0 +402170b5: 060c movi.n a6, 0 +402170b7: 272002 l32i a0, a0, 156 +402170ba: 070c movi.n a7, 0 +402170bc: 0000c0 callx0 a0 +402170bf: 150c movi.n a5, 1 +402170c1: 540c movi.n a4, 5 +402170c3: 030c movi.n a3, 0 +402170c5: c168 l32i.n a6, a1, 48 +402170c7: 156132 s32i a3, a1, 84 +402170ca: 934560 movnez a4, a5, a6 +402170cd: b149 s32i.n a4, a1, 44 +402170cf: b188 l32i.n a8, a1, 44 +402170d1: 152172 l32i a7, a1, 84 +402170d4: 022787 blt a7, a8, 402170da +402170d7: 00c246 j 402173e4 +402170da: 2ec716 beqz a7, 402173ca +402170dd: a70b addi.n a10, a7, -1 +402170df: 2eca16 beqz a10, 402173cf +402170e2: fec7b2 addi a11, a7, -2 +402170e5: 2f0b16 beqz a11, 402173d9 +402170e8: fdc7c2 addi a12, a7, -3 +402170eb: 318c16 beqz a12, 40217407 +402170ee: fcc7d2 addi a13, a7, -4 +402170f1: 318d16 beqz a13, 4021740d +402170f4: 0c0c movi.n a12, 0 +402170f6: 000c movi.n a0, 0 +402170f8: 146102 s32i a0, a1, 80 +402170fb: 152132 l32i a3, a1, 84 +402170fe: 820c movi.n a2, 8 +40217100: 0e08 l32i.n a0, a14, 0 +40217102: 0d0c movi.n a13, 0 +40217104: 342002 l32i a0, a0, 208 +40217107: 83d230 moveqz a13, a2, a3 +4021710a: 0d2d mov.n a2, a13 +4021710c: 0000c0 callx0 a0 +4021710f: 152142 l32i a4, a1, 84 +40217112: 1324f6 bgeui a4, 2, 40217129 +40217115: 020c movi.n a2, 0 +40217117: 0d3d mov.n a3, a13 +40217119: f4a142 movi a4, 0x1f4 +4021711c: 0e08 l32i.n a0, a14, 0 +4021711e: c50c movi.n a5, 12 +40217120: 3a2002 l32i a0, a0, 232 +40217123: 10c162 addi a6, a1, 16 +40217126: 0000c0 callx0 a0 +40217129: 120c movi.n a2, 1 +4021712b: 04a132 movi a3, 0x104 +4021712e: 0e08 l32i.n a0, a14, 0 +40217130: 0c4d mov.n a4, a12 +40217132: 152002 l32i a0, a0, 84 +40217135: 651c movi.n a5, 22 +40217137: 0000c0 callx0 a0 +4021713a: 0c2d mov.n a2, a12 +4021713c: 631c movi.n a3, 22 +4021713e: d148 l32i.n a4, a1, 52 +40217140: ffe685 call0 40216fac +40217143: dfac beqz.n a15, 40217174 +40217145: 0d6d mov.n a6, a13 +40217147: ffc221 l32r a2, 40217050 +4021714a: 130c movi.n a3, 1 +4021714c: 04a142 movi a4, 0x104 +4021714f: 6a1c movi.n a10, 22 +40217151: 01a9 s32i.n a10, a1, 0 +40217153: 100192 l8ui a9, a1, 16 +40217156: 142152 l32i a5, a1, 80 +40217159: 019980 slli a9, a9, 24 +4021715c: 319890 srai a9, a9, 24 +4021715f: 1199 s32i.n a9, a1, 4 +40217161: 110182 l8ui a8, a1, 17 +40217164: 0c7d mov.n a7, a12 +40217166: 018880 slli a8, a8, 24 +40217169: 318880 srai a8, a8, 24 +4021716c: 2189 s32i.n a8, a1, 8 +4021716e: abb701 l32r a0, 4020204c +40217171: 0000c0 callx0 a0 +40217174: 0e08 l32i.n a0, a14, 0 +40217176: 102002 l32i a0, a0, 64 +40217179: 120c movi.n a2, 1 +4021717b: 0000c0 callx0 a0 +4021717e: 0d0c movi.n a13, 0 +40217180: 120c movi.n a2, 1 +40217182: e129 s32i.n a2, a1, 56 +40217184: 120c movi.n a2, 1 +40217186: 102132 l32i a3, a1, 64 +40217189: 142142 l32i a4, a1, 80 +4021718c: 050c movi.n a5, 0 +4021718e: 060c movi.n a6, 0 +40217190: 0169 s32i.n a6, a1, 0 +40217192: 1169 s32i.n a6, a1, 4 +40217194: 2169 s32i.n a6, a1, 8 +40217196: 0e08 l32i.n a0, a14, 0 +40217198: 070c movi.n a7, 0 +4021719a: 1a2002 l32i a0, a0, 104 +4021719d: 060c movi.n a6, 0 +4021719f: 0000c0 callx0 a0 +402171a2: 0e08 l32i.n a0, a14, 0 +402171a4: 120c movi.n a2, 1 +402171a6: d008 l32i.n a0, a0, 52 +402171a8: 00a432 movi a3, 0x400 +402171ab: 0000c0 callx0 a0 +402171ae: 0020c0 memw +402171b1: f93221 l32r a2, 4021567c +402171b4: 0e08 l32i.n a0, a14, 0 +402171b6: f92222 l32i a2, a2, 0x3e4 +402171b9: c008 l32i.n a0, a0, 48 +402171bb: 212820 srai a2, a2, 8 +402171be: 116122 s32i a2, a1, 68 +402171c1: 0000c0 callx0 a0 +402171c4: 0e08 l32i.n a0, a14, 0 +402171c6: 1b2002 l32i a0, a0, 108 +402171c9: 120c movi.n a2, 1 +402171cb: 0000c0 callx0 a0 +402171ce: 4f9c beqz.n a15, 402171e6 +402171d0: ffa121 l32r a2, 40217054 +402171d3: 0d3d mov.n a3, a13 +402171d5: 112142 l32i a4, a1, 68 +402171d8: c5d151 l32r a5, 4020891c +402171db: e168 l32i.n a6, a1, 56 +402171dd: 142172 l32i a7, a1, 80 +402171e0: ab9b01 l32r a0, 4020204c +402171e3: 0000c0 callx0 a0 +402171e6: 112132 l32i a3, a1, 68 +402171e9: c5cc21 l32r a2, 4020891c +402171ec: ffa742 movi a4, 0x7ff +402171ef: 082237 blt a2, a3, 402171fb +402171f2: 5a2437 blt a4, a3, 40217250 +402171f5: c5c961 l32r a6, 4020891c +402171f8: 17a637 bge a6, a3, 40217213 +402171fb: 5dcc bnez.n a13, 40217204 +402171fd: 080c movi.n a8, 0 +402171ff: e189 s32i.n a8, a1, 56 +40217201: 000986 j 4021722b +40217204: 142192 l32i a9, a1, 80 +40217207: 18c9a2 addi a10, a9, 24 +4021720a: 7490a0 extui a9, a10, 0, 8 +4021720d: 146192 s32i a9, a1, 80 +40217210: 0005c6 j 4021722b +40217213: fdcc bnez.n a13, 40217226 +40217215: ffa3b2 movi a11, 0x3ff +40217218: 720c movi.n a2, 7 +4021721a: e129 s32i.n a2, a1, 56 +4021721c: 0bab37 bge a11, a3, 4021722b +4021721f: 330c movi.n a3, 3 +40217221: e139 s32i.n a3, a1, 56 +40217223: 000106 j 4021722b +40217226: 040c movi.n a4, 0 +40217228: 146142 s32i a4, a1, 80 +4021722b: e128 l32i.n a2, a1, 56 +4021722d: 04a132 movi a3, 0x104 +40217230: 0e08 l32i.n a0, a14, 0 +40217232: 0c4d mov.n a4, a12 +40217234: 152002 l32i a0, a0, 84 +40217237: 651c movi.n a5, 22 +40217239: 0000c0 callx0 a0 +4021723c: 0c2d mov.n a2, a12 +4021723e: 631c movi.n a3, 22 +40217240: d148 l32i.n a4, a1, 52 +40217242: ffd685 call0 40216fac +40217245: dd1b addi.n a13, a13, 1 +40217247: 74d0d0 extui a13, a13, 0, 8 +4021724a: fecd22 addi a2, a13, -2 +4021724d: f33256 bnez a2, 40217184 +40217250: 00a0c2 movi a12, 0 +40217253: 00a0d2 movi a13, 0 +40217256: 00a002 movi a0, 0 +40217259: 020c movi.n a2, 0 +4021725b: 030c movi.n a3, 0 +4021725d: 166132 s32i a3, a1, 88 +40217260: 126122 s32i a2, a1, 72 +40217263: 136102 s32i a0, a1, 76 +40217266: d20c movi.n a2, 13 +40217268: 102132 l32i a3, a1, 64 +4021726b: 142142 l32i a4, a1, 80 +4021726e: 12c152 addi a5, a1, 18 +40217271: f168 l32i.n a6, a1, 60 +40217273: 0f7d mov.n a7, a15 +40217275: 05b3c5 call0 4021cdb4 +40217278: bf9c beqz.n a15, 40217297 +4021727a: ff7721 l32r a2, 40217058 +4021727d: 0c3d mov.n a3, a12 +4021727f: 130152 l8ui a5, a1, 19 +40217282: 120142 l8ui a4, a1, 18 +40217285: 015580 slli a5, a5, 24 +40217288: 014480 slli a4, a4, 24 +4021728b: 314840 srai a4, a4, 24 +4021728e: 315850 srai a5, a5, 24 +40217291: ab6e01 l32r a0, 4020204c +40217294: 0000c0 callx0 a0 +40217297: 0cbc beqz.n a12, 402172cb +40217299: 0e08 l32i.n a0, a14, 0 +4021729b: 120122 l8ui a2, a1, 18 +4021729e: 0008 l32i.n a0, a0, 0 +402172a0: 012280 slli a2, a2, 24 +402172a3: 312820 srai a2, a2, 24 +402172a6: c02d20 sub a2, a13, a2 +402172a9: 0000c0 callx0 a0 +402172ac: 1b22e6 bgei a2, 2, 402172cb +402172af: 162122 l32i a2, a1, 88 +402172b2: 0e08 l32i.n a0, a14, 0 +402172b4: 130132 l8ui a3, a1, 19 +402172b7: 0008 l32i.n a0, a0, 0 +402172b9: 013380 slli a3, a3, 24 +402172bc: 313830 srai a3, a3, 24 +402172bf: c02230 sub a2, a2, a3 +402172c2: 0000c0 callx0 a0 +402172c5: 0222e6 bgei a2, 2, 402172cb +402172c8: 004206 j 402173d4 +402172cb: 132142 l32i a4, a1, 76 +402172ce: 122122 l32i a2, a1, 72 +402172d1: 1201d2 l8ui a13, a1, 18 +402172d4: 130132 l8ui a3, a1, 19 +402172d7: cc1b addi.n a12, a12, 1 +402172d9: 74c0c0 extui a12, a12, 0, 8 +402172dc: 013380 slli a3, a3, 24 +402172df: 01dd80 slli a13, a13, 24 +402172e2: 31d8d0 srai a13, a13, 24 +402172e5: 313830 srai a3, a3, 24 +402172e8: 166132 s32i a3, a1, 88 +402172eb: 232a add.n a2, a3, a2 +402172ed: 4d4a add.n a4, a13, a4 +402172ef: 136142 s32i a4, a1, 76 +402172f2: 126122 s32i a2, a1, 72 +402172f5: 024c26 beqi a12, 4, 402172fb +402172f8: ffda86 j 40217266 +402172fb: 000c movi.n a0, 0 +402172fd: 09d056 bnez a0, 4021739e +40217300: 1321d2 l32i a13, a1, 76 +40217303: 122102 l32i a0, a1, 72 +40217306: dd2b addi.n a13, a13, 2 +40217308: 002b addi.n a0, a0, 2 +4021730a: 210200 srai a0, a0, 2 +4021730d: 21d2d0 srai a13, a13, 2 +40217310: 01dd80 slli a13, a13, 24 +40217313: 31d8d0 srai a13, a13, 24 +40217316: 166c movi.n a6, -31 +40217318: 127c movi.n a2, -15 +4021731a: 013080 slli a3, a0, 24 +4021731d: f40c movi.n a4, 15 +4021731f: 047d mov.n a7, a4 +40217321: 313830 srai a3, a3, 24 +40217324: 020d mov.n a0, a2 +40217326: 166132 s32i a3, a1, 88 +40217329: 162152 l32i a5, a1, 88 +4021732c: c138 l32i.n a3, a1, 48 +4021732e: 012d27 blt a13, a2, 40217333 +40217331: 0d0d mov.n a0, a13 +40217333: 01b0e6 bgei a0, 16, 40217338 +40217336: 007d mov.n a7, a0 +40217338: 060d mov.n a0, a6 +4021733a: f21c movi.n a2, 31 +4021733c: 01d780 slli a13, a7, 24 +4021733f: 31d8d0 srai a13, a13, 24 +40217342: 027d mov.n a7, a2 +40217344: 012567 blt a5, a6, 40217349 +40217347: 050d mov.n a0, a5 +40217349: 01c0e6 bgei a0, 32, 4021734e +4021734c: 007d mov.n a7, a0 +4021734e: 014780 slli a4, a7, 24 +40217351: 314840 srai a4, a4, 24 +40217354: 166142 s32i a4, a1, 88 +40217357: 53dc bnez.n a3, 40217370 +40217359: a188 l32i.n a8, a1, 40 +4021735b: 545070 extui a5, a7, 0, 6 +4021735e: 4460d0 extui a6, a13, 0, 5 +40217361: 1166a0 slli a6, a6, 6 +40217364: 205560 or a5, a5, a6 +40217367: 152162 l32i a6, a1, 84 +4021736a: 906680 addx2 a6, a6, a8 +4021736d: 005652 s16i a5, a6, 0 +40217370: ff8c beqz.n a15, 40217383 +40217372: 0d4d mov.n a4, a13 +40217374: ff3a21 l32r a2, 4021705c +40217377: 152132 l32i a3, a1, 84 +4021737a: 162152 l32i a5, a1, 88 +4021737d: ab3301 l32r a0, 4020204c +40217380: 0000c0 callx0 a0 +40217383: 1490c0 extui a9, a12, 0, 2 +40217386: 1ea8 l32i.n a10, a14, 4 +40217388: 152172 l32i a7, a1, 84 +4021738b: 11aae0 slli a10, a10, 2 +4021738e: 871b addi.n a8, a7, 1 +40217390: 747080 extui a7, a8, 0, 8 +40217393: 2099a0 or a9, a9, a10 +40217396: 1e99 s32i.n a9, a14, 4 +40217398: 156172 s32i a7, a1, 84 +4021739b: ff4c06 j 402170cf +4021739e: 162132 l32i a3, a1, 88 +402173a1: 130102 l8ui a0, a1, 19 +402173a4: 120122 l8ui a2, a1, 18 +402173a7: 010080 slli a0, a0, 24 +402173aa: 012280 slli a2, a2, 24 +402173ad: 312820 srai a2, a2, 24 +402173b0: 310800 srai a0, a0, 24 +402173b3: 003a add.n a0, a0, a3 +402173b5: d2da add.n a13, a2, a13 +402173b7: dd1b addi.n a13, a13, 1 +402173b9: 001b addi.n a0, a0, 1 +402173bb: 210100 srai a0, a0, 1 +402173be: 21d1d0 srai a13, a13, 1 +402173c1: 01dd80 slli a13, a13, 24 +402173c4: 31d8d0 srai a13, a13, 24 +402173c7: ffd2c6 j 40217316 +402173ca: 0c0c movi.n a12, 0 +402173cc: ff4986 j 402170f6 +402173cf: 0c4c movi.n a12, 64 +402173d1: ff4846 j 402170f6 +402173d4: 100c movi.n a0, 1 +402173d6: ffc8c6 j 402172fd +402173d9: 60a0c2 movi a12, 96 +402173dc: f20c movi.n a2, 15 +402173de: 146122 s32i a2, a1, 80 +402173e1: ff4586 j 402170fb +402173e4: 051c movi.n a5, 16 +402173e6: 0020c0 memw +402173e9: f8a441 l32r a4, 4021567c +402173ec: e42432 l32i a3, a4, 0x390 +402173ef: 203350 or a3, a3, a5 +402173f2: 0020c0 memw +402173f5: e46432 s32i a3, a4, 0x390 +402173f8: 61c8 l32i.n a12, a1, 24 +402173fa: 71d8 l32i.n a13, a1, 28 +402173fc: 81e8 l32i.n a14, a1, 32 +402173fe: 91f8 l32i.n a15, a1, 36 +40217400: 5108 l32i.n a0, a1, 20 +40217402: 60c112 addi a1, a1, 96 +40217405: f00d ret.n +40217407: 70a0c2 movi a12, 112 +4021740a: 000086 j 40217410 +4021740d: 78a0c2 movi a12, 120 +40217410: 861c movi.n a6, 24 +40217412: 146162 s32i a6, a1, 80 +40217415: ff3886 j 402170fb +40217418: 22f7e0 excw +4021741b: 800440 add a0, a4, a4 +4021741e: fe .byte 0xfe +4021741f: 3f .byte 0x3f + +40217420 : +40217420: c0c112 addi a1, a1, -64 +40217423: 21c9 s32i.n a12, a1, 8 +40217425: 31d9 s32i.n a13, a1, 12 +40217427: 41e9 s32i.n a14, a1, 16 +40217429: 51f9 s32i.n a15, a1, 20 +4021742b: 1109 s32i.n a0, a1, 4 +4021742d: a159 s32i.n a5, a1, 40 +4021742f: 9179 s32i.n a7, a1, 36 +40217431: 7129 s32i.n a2, a1, 28 +40217433: 8149 s32i.n a4, a1, 32 +40217435: 7fa022 movi a2, 127 +40217438: 014380 slli a4, a3, 24 +4021743b: 314840 srai a4, a4, 24 +4021743e: a33240 movltz a3, a2, a4 +40217441: 6139 s32i.n a3, a1, 24 +40217443: 0213e6 bgei a3, 1, 40217449 +40217446: 004446 j 4021755b +40217449: 0c0c movi.n a12, 0 +4021744b: 000c movi.n a0, 0 +4021744d: 0f0c movi.n a15, 0 +4021744f: 05dd mov.n a13, a5 +40217451: 760b addi.n a7, a6, -1 +40217453: 557a add.n a5, a5, a7 +40217455: b159 s32i.n a5, a1, 44 +40217457: 000da2 l8ui a10, a13, 0 +4021745a: c06cf0 sub a6, a12, a15 +4021745d: 01e680 slli a14, a6, 24 +40217460: 31e8e0 srai a14, a14, 24 +40217463: 01aa80 slli a10, a10, 24 +40217466: 31a8a0 srai a10, a10, 24 +40217469: 3e2ea7 blt a14, a10, 402174ab +4021746c: 016680 slli a6, a6, 24 +4021746f: b128 l32i.n a2, a1, 44 +40217471: 316860 srai a6, a6, 24 +40217474: 33ad27 bge a13, a2, 402174ab +40217477: 7470a0 extui a7, a10, 0, 8 +4021747a: a7cc bnez.n a7, 40217488 +4021747c: 010d82 l8ui a8, a13, 1 +4021747f: 018880 slli a8, a8, 24 +40217482: 318880 srai a8, a8, 24 +40217485: 222687 blt a6, a8, 402174ab +40217488: a1d8 l32i.n a13, a1, 40 +4021748a: 001b addi.n a0, a0, 1 +4021748c: 7420a0 extui a2, a10, 0, 8 +4021748f: ff2a add.n a15, a15, a2 +40217491: 740000 extui a0, a0, 0, 8 +40217494: dd0a add.n a13, a13, a0 +40217496: c06cf0 sub a6, a12, a15 +40217499: 01e680 slli a14, a6, 24 +4021749c: 000da2 l8ui a10, a13, 0 +4021749f: 31e8e0 srai a14, a14, 24 +402174a2: 01aa80 slli a10, a10, 24 +402174a5: 31a8a0 srai a10, a10, 24 +402174a8: c0aea7 bge a14, a10, 4021746c +402174ab: c109 s32i.n a0, a1, 48 +402174ad: 8a1c movi.n a10, 24 +402174af: 0d2ea7 blt a14, a10, 402174c0 +402174b2: e8ce62 addi a6, a14, -24 +402174b5: fe0c movi.n a14, 15 +402174b7: 016680 slli a6, a6, 24 +402174ba: 316860 srai a6, a6, 24 +402174bd: 000a86 j 402174eb +402174c0: 0e2d mov.n a2, a14 +402174c2: 630c movi.n a3, 6 +402174c4: a9d501 l32r a0, 40201c18 +402174c7: 0000c0 callx0 a0 +402174ca: 020d mov.n a0, a2 +402174cc: 630c movi.n a3, 6 +402174ce: 0e2d mov.n a2, a14 +402174d0: 401000 ssl a0 +402174d3: 1e0c movi.n a14, 1 +402174d5: a1ee00 sll a14, a14 +402174d8: ee0b addi.n a14, a14, -1 +402174da: f4e0e0 extui a14, a14, 0, 16 +402174dd: d63b01 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +402174e0: 0000c0 callx0 a0 +402174e3: c108 l32i.n a0, a1, 48 +402174e5: 016280 slli a6, a2, 24 +402174e8: 316860 srai a6, a6, 24 +402174eb: 04a0c0 extui a10, a12, 0, 1 +402174ee: 0456a6 blti a6, 5, 402174f6 +402174f1: 560c movi.n a6, 5 +402174f3: 000086 j 402174f9 +402174f6: f46060 extui a6, a6, 0, 16 +402174f9: 0169 s32i.n a6, a1, 0 +402174fb: 7128 l32i.n a2, a1, 28 +402174fd: 8158 l32i.n a5, a1, 32 +402174ff: 21b1c0 srai a11, a12, 1 +40217502: 905050 addx2 a5, a0, a5 +40217505: 001552 l16ui a5, a5, 0 +40217508: a0bb20 addx4 a11, a11, a2 +4021750b: b09e50 addx8 a9, a14, a5 +4021750e: 969a add.n a9, a6, a9 +40217510: 0b6c07 bbci a12, 0, 4021751f +40217513: 0b78 l32i.n a7, a11, 0 +40217515: 119900 slli a9, a9, 16 +40217518: 979a add.n a9, a7, a9 +4021751a: 0b99 s32i.n a9, a11, 0 +4021751c: 000046 j 40217521 +4021751f: 0b99 s32i.n a9, a11, 0 +40217521: 91b8 l32i.n a11, a1, 36 +40217523: c109 s32i.n a0, a1, 48 +40217525: ab9c beqz.n a11, 40217543 +40217527: ffbc21 l32r a2, 40217418 +4021752a: 0c3d mov.n a3, a12 +4021752c: 0e6d mov.n a6, a14 +4021752e: 0178 l32i.n a7, a1, 0 +40217530: 110ac0 slli a0, a10, 4 +40217533: 400000 ssr a0 +40217536: 914090 srl a4, a9 +40217539: aac401 l32r a0, 4020204c +4021753c: 0000c0 callx0 a0 +4021753f: c108 l32i.n a0, a1, 48 +40217541: 0168 l32i.n a6, a1, 0 +40217543: f20c movi.n a2, 15 +40217545: 029e27 bne a14, a2, 4021754b +40217548: 1e5626 beqi a6, 5, 4021756a +4021754b: 6138 l32i.n a3, a1, 24 +4021754d: cc1b addi.n a12, a12, 1 +4021754f: 01cc80 slli a12, a12, 24 +40217552: 31c8c0 srai a12, a12, 24 +40217555: c03c30 sub a3, a12, a3 +40217558: efb356 bnez a3, 40217457 +4021755b: 21c8 l32i.n a12, a1, 8 +4021755d: 31d8 l32i.n a13, a1, 12 +4021755f: 41e8 l32i.n a14, a1, 16 +40217561: 51f8 l32i.n a15, a1, 20 +40217563: 1108 l32i.n a0, a1, 4 +40217565: 40c112 addi a1, a1, 64 +40217568: f00d ret.n +4021756a: ffacd1 l32r a13, 4021741c +4021756d: 004dc2 s8i a12, a13, 0 +40217570: fff9c6 j 4021755b + ... + +40217574 : +40217574: f0c112 addi a1, a1, -16 +40217577: 11c9 s32i.n a12, a1, 4 +40217579: 0109 s32i.n a0, a1, 0 +4021757b: 02cd mov.n a12, a2 +4021757d: 701c movi.n a0, 23 +4021757f: 1d2027 blt a0, a2, 402175a0 +40217582: 121c movi.n a2, 17 +40217584: 1222c7 blt a2, a12, 4021759a +40217587: 09ace6 bgei a12, 12, 40217594 +4021758a: 004c movi.n a0, 64 +4021758c: 136ce6 bgei a12, 6, 402175a3 +4021758f: 000c movi.n a0, 0 +40217591: 000386 j 402175a3 +40217594: 60a002 movi a0, 96 +40217597: 000206 j 402175a3 +4021759a: 70a002 movi a0, 112 +4021759d: 000086 j 402175a3 +402175a0: 78a002 movi a0, 120 +402175a3: f80221 l32r a2, 402155ac +402175a6: f44000 extui a4, a0, 0, 16 +402175a9: 0208 l32i.n a0, a2, 0 +402175ab: 130c movi.n a3, 1 +402175ad: 2b2002 l32i a0, a0, 172 +402175b0: 320c movi.n a2, 3 +402175b2: 0000c0 callx0 a0 +402175b5: 0c2d mov.n a2, a12 +402175b7: 630c movi.n a3, 6 +402175b9: d60401 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +402175bc: 0000c0 callx0 a0 +402175bf: 230c movi.n a3, 2 +402175c1: 11c8 l32i.n a12, a1, 4 +402175c3: 650c movi.n a5, 6 +402175c5: 1142d0 slli a4, a2, 3 +402175c8: f7f901 l32r a0, 402155ac +402175cb: 320c movi.n a2, 3 +402175cd: 0008 l32i.n a0, a0, 0 +402175cf: 204450 or a4, a4, a5 +402175d2: 2b2002 l32i a0, a0, 172 +402175d5: f44040 extui a4, a4, 0, 16 +402175d8: 0000c0 callx0 a0 +402175db: 0108 l32i.n a0, a1, 0 +402175dd: 10c112 addi a1, a1, 16 +402175e0: f00d ret.n +402175e2: 000000 ill +402175e5: 000300 excw +402175e8: 000fa0 jx a15 +402175eb: ffff00 excw +402175ee: fffc bnez.n a15, 40217631 +402175f0: 009e00 excw +402175f3: 60 .byte 0x60 + +402175f4 : +402175f4: 059d mov.n a9, a5 +402175f6: a0c112 addi a1, a1, -96 +402175f9: b109 s32i.n a0, a1, 44 +402175fb: 8129 s32i.n a2, a1, 32 +402175fd: 7139 s32i.n a3, a1, 28 +402175ff: 6149 s32i.n a4, a1, 24 +40217601: f1f9 s32i.n a15, a1, 60 +40217603: d1d9 s32i.n a13, a1, 52 +40217605: e1e9 s32i.n a14, a1, 56 +40217607: c1c9 s32i.n a12, a1, 48 +40217609: 07ed mov.n a14, a7 +4021760b: e0a1c2 movi a12, 0x1e0 +4021760e: 06dd mov.n a13, a6 +40217610: f7e761 l32r a6, 402155ac +40217613: f81cf1 l32r a15, 40215684 +40217616: 080642 l8ui a4, a6, 8 +40217619: 116192 s32i a9, a1, 68 +4021761c: 84cc bnez.n a4, 40217628 +4021761e: 0388 l32i.n a8, a3, 0 +40217620: 7139 s32i.n a3, a1, 28 +40217622: 058080 extui a8, a8, 16, 1 +40217625: 242856 bnez a8, 4021786b +40217628: ffef41 l32r a4, 402175e4 +4021762b: f81431 l32r a3, 4021567c +4021762e: 0020c0 memw +40217631: f22322 l32i a2, a3, 0x3c8 +40217634: 202240 or a2, a2, a4 +40217637: 0020c0 memw +4021763a: f26322 s32i a2, a3, 0x3c8 +4021763d: 0020c0 memw +40217640: f7db01 l32r a0, 402155ac +40217643: 0008 l32i.n a0, a0, 0 +40217645: 282002 l32i a0, a0, 160 +40217648: 1a6fc2 s32i a12, a15, 104 +4021764b: 0000c0 callx0 a0 +4021764e: 77a022 movi a2, 119 +40217651: 030c movi.n a3, 0 +40217653: f7d601 l32r a0, 402155ac +40217656: 241c movi.n a4, 18 +40217658: 0008 l32i.n a0, a0, 0 +4021765a: 750c movi.n a5, 7 +4021765c: 252002 l32i a0, a0, 148 +4021765f: 060c movi.n a6, 0 +40217661: 0000c0 callx0 a0 +40217664: 030c movi.n a3, 0 +40217666: 841c movi.n a4, 24 +40217668: 550c movi.n a5, 5 +4021766a: f7d001 l32r a0, 402155ac +4021766d: 560c movi.n a6, 5 +4021766f: 0008 l32i.n a0, a0, 0 +40217671: 9129 s32i.n a2, a1, 36 +40217673: 252002 l32i a0, a0, 148 +40217676: 77a022 movi a2, 119 +40217679: 0000c0 callx0 a0 +4021767c: 030c movi.n a3, 0 +4021767e: 841c movi.n a4, 24 +40217680: 550c movi.n a5, 5 +40217682: 560c movi.n a6, 5 +40217684: f7ca01 l32r a0, 402155ac +40217687: 070c movi.n a7, 0 +40217689: 0008 l32i.n a0, a0, 0 +4021768b: a129 s32i.n a2, a1, 40 +4021768d: 272002 l32i a0, a0, 156 +40217690: 77a022 movi a2, 119 +40217693: 0000c0 callx0 a0 +40217696: 77a022 movi a2, 119 +40217699: 030c movi.n a3, 0 +4021769b: 241c movi.n a4, 18 +4021769d: f7c301 l32r a0, 402155ac +402176a0: 750c movi.n a5, 7 +402176a2: 0008 l32i.n a0, a0, 0 +402176a4: 060c movi.n a6, 0 +402176a6: 272002 l32i a0, a0, 156 +402176a9: 070c movi.n a7, 0 +402176ab: 0000c0 callx0 a0 +402176ae: 6148 l32i.n a4, a1, 24 +402176b0: 11ed16 beqz a13, 402177d2 +402176b3: 751c movi.n a5, 23 +402176b5: 0a0c movi.n a10, 0 +402176b7: 170c movi.n a7, 1 +402176b9: ecadb2 movi a11, 0xfffffdec +402176bc: 0c0c movi.n a12, 0 +402176be: 680122 l8ui a2, a1, 104 +402176c1: 106122 s32i a2, a1, 64 +402176c4: 4161c0 srli a6, a12, 1 +402176c7: a066e0 addx4 a6, a6, a14 +402176ca: 0668 l32i.n a6, a6, 0 +402176cc: 056c07 bbci a12, 0, 402176d5 +402176cf: e56060 extui a6, a6, 16, 15 +402176d2: 000086 j 402176d8 +402176d5: e46060 extui a6, a6, 0, 15 +402176d8: 042860 extui a2, a6, 8, 1 +402176db: 048460 extui a8, a6, 4, 1 +402176de: 043360 extui a3, a6, 3, 1 +402176e1: 049660 extui a9, a6, 6, 1 +402176e4: 338a add.n a3, a3, a8 +402176e6: 048560 extui a8, a6, 5, 1 +402176e9: 889a add.n a8, a8, a9 +402176eb: 049960 extui a9, a6, 9, 1 +402176ee: 229a add.n a2, a2, a9 +402176f0: 049760 extui a9, a6, 7, 1 +402176f3: 229a add.n a2, a2, a9 +402176f5: d91c movi.n a9, 29 +402176f7: 228a add.n a2, a2, a8 +402176f9: 223a add.n a2, a2, a3 +402176fb: 480c movi.n a8, 4 +402176fd: 080d mov.n a0, a8 +402176ff: 742020 extui a2, a2, 0, 8 +40217702: 248060 extui a8, a6, 0, 3 +40217705: 0152f6 bgeui a2, 5, 4021770a +40217708: 020d mov.n a0, a2 +4021770a: 743000 extui a3, a0, 0, 8 +4021770d: 090d mov.n a0, a9 +4021770f: 903330 addx2 a3, a3, a3 +40217712: 903380 addx2 a3, a3, a8 +40217715: f43030 extui a3, a3, 0, 16 +40217718: 013937 bltu a9, a3, 4021771d +4021771b: 030d mov.n a0, a3 +4021771d: f40000 extui a0, a0, 0, 16 +40217720: 400000 ssr a0 +40217723: 9180a0 srl a8, a10 +40217726: 7ce807 bbsi a8, 0, 402177a6 +40217729: b03040 addx8 a3, a0, a4 +4021772c: 8033b0 add a3, a3, a11 +4021772f: 02b507 bgeu a5, a0, 40217735 +40217732: 002406 j 402177c6 +40217735: 146102 s32i a0, a1, 80 +40217738: 126132 s32i a3, a1, 72 +4021773b: 1361a2 s32i a10, a1, 76 +4021773e: 78e007 bbsi a0, 0, 402177ba +40217741: b42060 extui a2, a6, 0, 12 +40217744: fde685 call0 402155b0 +40217747: ffa821 l32r a2, 402175e8 +4021774a: 10c132 addi a3, a1, 16 +4021774d: f79701 l32r a0, 402155ac +40217750: 0aa042 movi a4, 10 +40217753: 002002 l32i a0, a0, 0 +40217756: 102152 l32i a5, a1, 64 +40217759: 3b2002 l32i a0, a0, 236 +4021775c: 060c movi.n a6, 0 +4021775e: 0000c0 callx0 a0 +40217761: 142102 l32i a0, a1, 80 +40217764: 1321a2 l32i a10, a1, 76 +40217767: ecadb2 movi a11, 0xfffffdec +4021776a: 6148 l32i.n a4, a1, 24 +4021776c: 751c movi.n a5, 23 +4021776e: 170c movi.n a7, 1 +40217770: 099162 l16si a6, a1, 18 +40217773: 089122 l16si a2, a1, 16 +40217776: 0b9182 l16si a8, a1, 22 +40217779: 0a9132 l16si a3, a1, 20 +4021777c: 848080 extui a8, a8, 0, 9 +4021777f: 843030 extui a3, a3, 0, 9 +40217782: 842020 extui a2, a2, 0, 9 +40217785: 846060 extui a6, a6, 0, 9 +40217788: 116670 slli a6, a6, 9 +4021778b: 112270 slli a2, a2, 9 +4021778e: 202230 or a2, a2, a3 +40217791: 122132 l32i a3, a1, 72 +40217794: 206680 or a6, a6, a8 +40217797: 856322 s32i a2, a3, 0x214 +4021779a: 866362 s32i a6, a3, 0x218 +4021779d: 401000 ssl a0 +402177a0: a18700 sll a8, a7 +402177a3: 20aa80 or a10, a10, a8 +402177a6: cc1b addi.n a12, a12, 1 +402177a8: 74c0c0 extui a12, a12, 0, 8 +402177ab: c09dc0 sub a9, a13, a12 +402177ae: 4161c0 srli a6, a12, 1 +402177b1: a066e0 addx4 a6, a6, a14 +402177b4: f12956 bnez a9, 402176ca +402177b7: 0005c6 j 402177d2 +402177ba: 842362 l32i a6, a3, 0x210 +402177bd: 832322 l32i a2, a3, 0x20c +402177c0: 856322 s32i a2, a3, 0x214 +402177c3: fff4c6 j 4021779a +402177c6: 792362 l32i a6, a3, 0x1e4 +402177c9: 856362 s32i a6, a3, 0x214 +402177cc: 7a2362 l32i a6, a3, 0x1e8 +402177cf: fff1c6 j 4021779a +402177d2: 7178 l32i.n a7, a1, 28 +402177d4: 0778 l32i.n a7, a7, 0 +402177d6: 8188 l32i.n a8, a1, 32 +402177d8: 18f707 bbsi a7, 16, 402177f4 +402177db: 589c beqz.n a8, 402177f4 +402177dd: 020c movi.n a2, 0 +402177df: 830c movi.n a3, 8 +402177e1: 112142 l32i a4, a1, 68 +402177e4: 6158 l32i.n a5, a1, 24 +402177e6: 600162 l8ui a6, a1, 96 +402177e9: 640172 l8ui a7, a1, 100 +402177ec: 680192 l8ui a9, a1, 104 +402177ef: 0199 s32i.n a9, a1, 0 +402177f1: ff86c5 call0 40217060 +402177f4: ff7e51 l32r a5, 402175ec +402177f7: 0020c0 memw +402177fa: f7a041 l32r a4, 4021567c +402177fd: f22432 l32i a3, a4, 0x3c8 +40217800: 103350 and a3, a3, a5 +40217803: 0020c0 memw +40217806: 550c movi.n a5, 5 +40217808: 560c movi.n a6, 5 +4021780a: 120c movi.n a2, 1 +4021780c: a178 l32i.n a7, a1, 40 +4021780e: f26432 s32i a3, a4, 0x3c8 +40217811: f76601 l32r a0, 402155ac +40217814: 030c movi.n a3, 0 +40217816: 841c movi.n a4, 24 +40217818: 0008 l32i.n a0, a0, 0 +4021781a: 937270 movnez a7, a2, a7 +4021781d: 272002 l32i a0, a0, 156 +40217820: 77a022 movi a2, 119 +40217823: 0000c0 callx0 a0 +40217826: 9178 l32i.n a7, a1, 36 +40217828: 77a022 movi a2, 119 +4021782b: 030c movi.n a3, 0 +4021782d: f75f01 l32r a0, 402155ac +40217830: 241c movi.n a4, 18 +40217832: 0008 l32i.n a0, a0, 0 +40217834: 750c movi.n a5, 7 +40217836: 272002 l32i a0, a0, 156 +40217839: 060c movi.n a6, 0 +4021783b: 0000c0 callx0 a0 +4021783e: f75b01 l32r a0, 402155ac +40217841: 0008 l32i.n a0, a0, 0 +40217843: 322002 l32i a0, a0, 200 +40217846: 0000c0 callx0 a0 +40217849: f75801 l32r a0, 402155ac +4021784c: 0008 l32i.n a0, a0, 0 +4021784e: 312002 l32i a0, a0, 196 +40217851: 0000c0 callx0 a0 +40217854: f75601 l32r a0, 402155ac +40217857: 0008 l32i.n a0, a0, 0 +40217859: 2f2002 l32i a0, a0, 188 +4021785c: 0000c0 callx0 a0 +4021785f: 7138 l32i.n a3, a1, 28 +40217861: b37041 l32r a4, 40204624 +40217864: 0328 l32i.n a2, a3, 0 +40217866: 202240 or a2, a2, a4 +40217869: 0329 s32i.n a2, a3, 0 +4021786b: 0d5d16 beqz a13, 40217944 +4021786e: ff60a1 l32r a10, 402175f0 +40217871: 6108 l32i.n a0, a1, 24 +40217873: 0c0c movi.n a12, 0 +40217875: 4161c0 srli a6, a12, 1 +40217878: a066e0 addx4 a6, a6, a14 +4021787b: 0668 l32i.n a6, a6, 0 +4021787d: 056c07 bbci a12, 0, 40217886 +40217880: e56060 extui a6, a6, 16, 15 +40217883: 000086 j 40217889 +40217886: e46060 extui a6, a6, 0, 15 +40217889: db1c movi.n a11, 29 +4021788b: 044860 extui a4, a6, 8, 1 +4021788e: 047460 extui a7, a6, 4, 1 +40217891: 045360 extui a5, a6, 3, 1 +40217894: 048660 extui a8, a6, 6, 1 +40217897: 557a add.n a5, a5, a7 +40217899: 047560 extui a7, a6, 5, 1 +4021789c: 778a add.n a7, a7, a8 +4021789e: 048960 extui a8, a6, 9, 1 +402178a1: 448a add.n a4, a4, a8 +402178a3: 048760 extui a8, a6, 7, 1 +402178a6: 448a add.n a4, a4, a8 +402178a8: 447a add.n a4, a4, a7 +402178aa: 445a add.n a4, a4, a5 +402178ac: 470c movi.n a7, 4 +402178ae: 072d mov.n a2, a7 +402178b0: 245060 extui a5, a6, 0, 3 +402178b3: 744040 extui a4, a4, 0, 8 +402178b6: 0154f6 bgeui a4, 5, 402178bb +402178b9: 042d mov.n a2, a4 +402178bb: 743020 extui a3, a2, 0, 8 +402178be: 0b2d mov.n a2, a11 +402178c0: 904330 addx2 a4, a3, a3 +402178c3: 904450 addx2 a4, a4, a5 +402178c6: f44040 extui a4, a4, 0, 16 +402178c9: 013b47 bltu a11, a4, 402178ce +402178cc: 042d mov.n a2, a4 +402178ce: f4b020 extui a11, a2, 0, 16 +402178d1: b0bb00 addx8 a11, a11, a0 +402178d4: fedbb2 addmi a11, a11, 0xfffffe00 +402178d7: eccbb2 addi a11, a11, -20 +402178da: 862b42 l32i a4, a11, 0x218 +402178dd: 852bb2 l32i a11, a11, 0x214 +402178e0: 848040 extui a8, a4, 0, 9 +402178e3: 844940 extui a4, a4, 9, 9 +402178e6: 8470b0 extui a7, a11, 0, 9 +402178e9: 8459b0 extui a5, a11, 9, 9 +402178ec: 0020c0 memw +402178ef: 115580 slli a5, a5, 8 +402178f2: 0196f0 slli a9, a6, 17 +402178f5: 995a add.n a9, a9, a5 +402178f7: e51c movi.n a5, 30 +402178f9: 1a6f52 s32i a5, a15, 104 +402178fc: 74b1b0 extui a11, a11, 1, 8 +402178ff: 99ba add.n a9, a9, a11 +40217901: a05ca0 addx4 a5, a12, a10 +40217904: 0020c0 memw +40217907: 017710 slli a7, a7, 31 +4021790a: 0144a0 slli a4, a4, 22 +4021790d: 447a add.n a4, a4, a7 +4021790f: 112172 l32i a7, a1, 68 +40217912: 0599 s32i.n a9, a5, 0 +40217914: 907370 addx2 a7, a3, a7 +40217917: 001772 l16ui a7, a7, 0 +4021791a: 118830 slli a8, a8, 13 +4021791d: a47070 extui a7, a7, 0, 11 +40217920: a07780 addx4 a7, a7, a8 +40217923: 447a add.n a4, a4, a7 +40217925: 0020c0 memw +40217928: e0a172 movi a7, 0x1e0 +4021792b: 1a6f72 s32i a7, a15, 104 +4021792e: 0020c0 memw +40217931: 0549 s32i.n a4, a5, 0 +40217933: cc1b addi.n a12, a12, 1 +40217935: 74c0c0 extui a12, a12, 0, 8 +40217938: c07dc0 sub a7, a13, a12 +4021793b: 4161c0 srli a6, a12, 1 +4021793e: a066e0 addx4 a6, a6, a14 +40217941: f36756 bnez a7, 4021787b +40217944: c1c8 l32i.n a12, a1, 48 +40217946: d1d8 l32i.n a13, a1, 52 +40217948: e1e8 l32i.n a14, a1, 56 +4021794a: f1f8 l32i.n a15, a1, 60 +4021794c: b108 l32i.n a0, a1, 44 +4021794e: 60c112 addi a1, a1, 96 +40217951: f00d ret.n + ... + +40217954 : +40217954: e0c112 addi a1, a1, -32 +40217957: 1109 s32i.n a0, a1, 4 +40217959: 0129 s32i.n a2, a1, 0 +4021795b: 31d9 s32i.n a13, a1, 12 +4021795d: 41e9 s32i.n a14, a1, 16 +4021795f: 21c9 s32i.n a12, a1, 8 +40217961: 05ed mov.n a14, a5 +40217963: f748c1 l32r a12, 40215684 +40217966: f744d1 l32r a13, 40215678 +40217969: 0020c0 memw +4021796c: 582c02 l32i a0, a12, 0x160 +4021796f: 5149 s32i.n a4, a1, 20 +40217971: 0e6017 bbci a0, 1, 40217983 +40217974: 0020c0 memw +40217977: 802d22 l32i a2, a13, 0x200 +4021797a: c02240 sub a2, a2, a4 +4021797d: e8be27 bgeu a14, a2, 40217969 +40217980: 000ac6 j 402179af +40217983: 032d mov.n a2, a3 +40217985: b64501 l32r a0, 4020529c +40217988: 0000c0 callx0 a0 +4021798b: f70801 l32r a0, 402155ac +4021798e: 0008 l32i.n a0, a0, 0 +40217990: 192002 l32i a0, a0, 100 +40217993: 0128 l32i.n a2, a1, 0 +40217995: 0000c0 callx0 a0 +40217998: 5108 l32i.n a0, a1, 20 +4021799a: 0020c0 memw +4021799d: 582c22 l32i a2, a12, 0x160 +402179a0: 1a6217 bbci a2, 1, 402179be +402179a3: 0020c0 memw +402179a6: 802d32 l32i a3, a13, 0x200 +402179a9: c03300 sub a3, a3, a0 +402179ac: eabe37 bgeu a14, a3, 4021799a +402179af: 120c movi.n a2, 1 +402179b1: 21c8 l32i.n a12, a1, 8 +402179b3: 31d8 l32i.n a13, a1, 12 +402179b5: 41e8 l32i.n a14, a1, 16 +402179b7: 1108 l32i.n a0, a1, 4 +402179b9: 20c112 addi a1, a1, 32 +402179bc: f00d ret.n +402179be: 020c movi.n a2, 0 +402179c0: fffb46 j 402179b1 + ... + +402179c4 : +402179c4: fb0e91 l32r a9, 402165fc +402179c7: f72f31 l32r a3, 40215684 +402179ca: 0020c0 memw +402179cd: 422382 l32i a8, a3, 0x108 +402179d0: 108890 and a8, a8, a9 +402179d3: 0020c0 memw +402179d6: 426382 s32i a8, a3, 0x108 +402179d9: 170c movi.n a7, 1 +402179db: 0020c0 memw +402179de: 582362 l32i a6, a3, 0x160 +402179e1: 206670 or a6, a6, a7 +402179e4: 0020c0 memw +402179e7: 586362 s32i a6, a3, 0x160 +402179ea: e57c movi.n a5, -2 +402179ec: 0020c0 memw +402179ef: 582342 l32i a4, a3, 0x160 +402179f2: 104450 and a4, a4, a5 +402179f5: 0020c0 memw +402179f8: 586342 s32i a4, a3, 0x160 +402179fb: 0020c0 memw +402179fe: b329 s32i.n a2, a3, 44 +40217a00: f00d ret.n +40217a02: ff0000 excw +40217a05: ff .byte 0xff +40217a06: f7 .byte 0xf7 +40217a07: ff .byte 0xff + +40217a08 : +40217a08: f71f41 l32r a4, 40215684 +40217a0b: 0020c0 memw +40217a0e: f71c71 l32r a7, 40215680 +40217a11: b428 l32i.n a2, a4, 44 +40217a13: 0020c0 memw +40217a16: 422462 l32i a6, a4, 0x108 +40217a19: 206670 or a6, a6, a7 +40217a1c: 0020c0 memw +40217a1f: 426462 s32i a6, a4, 0x108 +40217a22: fff851 l32r a5, 40217a04 +40217a25: 0020c0 memw +40217a28: b438 l32i.n a3, a4, 44 +40217a2a: 103350 and a3, a3, a5 +40217a2d: 0020c0 memw +40217a30: b439 s32i.n a3, a4, 44 +40217a32: f00d ret.n + +40217a34 : +40217a34: f0c112 addi a1, a1, -16 +40217a37: 006102 s32i a0, a1, 0 +40217a3a: f6dc01 l32r a0, 402155ac +40217a3d: 002002 l32i a0, a0, 0 +40217a40: 112002 l32i a0, a0, 68 +40217a43: 80a032 movi a3, 128 +40217a46: 0000c0 callx0 a0 +40217a49: fea285 call0 40216474 +40217a4c: 00a022 movi a2, 0 +40217a4f: 0108 l32i.n a0, a1, 0 +40217a51: 10c112 addi a1, a1, 16 +40217a54: f00d ret.n +40217a56: 400000 ssr a0 +40217a59: 3ffe84 excw +40217a5c: 802c movi.n a0, 40 +40217a5e: fe .byte 0xfe +40217a5f: 3f .byte 0x3f + +40217a60 : +40217a60: d0c112 addi a1, a1, -48 +40217a63: 0861d2 s32i a13, a1, 32 +40217a66: 0961e2 s32i a14, a1, 36 +40217a69: 71c9 s32i.n a12, a1, 28 +40217a6b: f6d0c1 l32r a12, 402155ac +40217a6e: 6109 s32i.n a0, a1, 24 +40217a70: 3c08 l32i.n a0, a12, 12 +40217a72: a1f9 s32i.n a15, a1, 40 +40217a74: 052200 extui a2, a0, 18, 1 +40217a77: 12b256 bnez a2, 40217ba6 +40217a7a: 0c08 l32i.n a0, a12, 0 +40217a7c: 282002 l32i a0, a0, 160 +40217a7f: 0000c0 callx0 a0 +40217a82: 0c08 l32i.n a0, a12, 0 +40217a84: 302002 l32i a0, a0, 192 +40217a87: 120c movi.n a2, 1 +40217a89: 0000c0 callx0 a0 +40217a8c: fe64d1 l32r a13, 4021741c +40217a8f: 011d22 l16ui a2, a13, 2 +40217a92: b42020 extui a2, a2, 0, 12 +40217a95: fdca45 call0 4021573c +40217a98: 011d22 l16ui a2, a13, 2 +40217a9b: 10c132 addi a3, a1, 16 +40217a9e: 140c movi.n a4, 1 +40217aa0: 036005 call0 4021b0a4 +40217aa3: 0c08 l32i.n a0, a12, 0 +40217aa5: 6008 l32i.n a0, a0, 24 +40217aa7: 020c movi.n a2, 0 +40217aa9: 0000c0 callx0 a0 +40217aac: 0d0c movi.n a13, 0 +40217aae: 3e0c movi.n a14, 3 +40217ab0: fab781 l32r a8, 4021658c +40217ab3: 5189 s32i.n a8, a1, 20 +40217ab5: e0c8f2 addi a15, a8, -32 +40217ab8: 0a3df6 bgeui a13, 3, 40217ac6 +40217abb: ffe701 l32r a0, 40217a58 +40217abe: 0d0a add.n a0, a13, a0 +40217ac0: 000002 l8ui a0, a0, 0 +40217ac3: 000046 j 40217ac8 +40217ac6: e00c movi.n a0, 14 +40217ac8: 206ff0 or a6, a15, a15 +40217acb: 64a072 movi a7, 100 +40217ace: 609c52 l16si a5, a12, 192 +40217ad1: 700c32 l8ui a3, a12, 112 +40217ad4: 01a042 movi a4, 1 +40217ad7: 012080 slli a2, a0, 24 +40217ada: 312820 srai a2, a2, 24 +40217add: 0149 s32i.n a4, a1, 0 +40217adf: 040c movi.n a4, 0 +40217ae1: fe7605 call0 40216244 +40217ae4: adfc bnez.n a13, 40217b22 +40217ae6: 024c movi.n a2, 64 +40217ae8: 38a142 movi a4, 0x138 +40217aeb: 030c movi.n a3, 0 +40217aed: ffdb71 l32r a7, 40217a5c +40217af0: c63c movi.n a6, 60 +40217af2: 053c movi.n a5, 48 +40217af4: 124152 s8i a5, a1, 18 +40217af7: 004762 s8i a6, a7, 0 +40217afa: f51c movi.n a5, 31 +40217afc: c63c movi.n a6, 60 +40217afe: 13c172 addi a7, a1, 19 +40217b01: 1139 s32i.n a3, a1, 4 +40217b03: 0149 s32i.n a4, a1, 0 +40217b05: 12c132 addi a3, a1, 18 +40217b08: 140c movi.n a4, 1 +40217b0a: 04d0c5 call0 4021c818 +40217b0d: 130102 l8ui a0, a1, 19 +40217b10: ffd381 l32r a8, 40217a5c +40217b13: 010080 slli a0, a0, 24 +40217b16: 310800 srai a0, a0, 24 +40217b19: 1fc002 addi a0, a0, 31 +40217b1c: 004802 s8i a0, a8, 0 +40217b1f: 0002c6 j 40217b2e +40217b22: ffce01 l32r a0, 40217a5c +40217b25: 000002 l8ui a0, a0, 0 +40217b28: 010080 slli a0, a0, 24 +40217b2b: 310800 srai a0, a0, 24 +40217b2e: 40a022 movi a2, 64 +40217b31: 02a042 movi a4, 2 +40217b34: 00a052 movi a5, 0 +40217b37: 743000 extui a3, a0, 0, 8 +40217b3a: 906dd0 addx2 a6, a13, a13 +40217b3d: 5178 l32i.n a7, a1, 20 +40217b3f: b169 s32i.n a6, a1, 44 +40217b41: 667a add.n a6, a6, a7 +40217b43: 04b1c5 call0 4021c660 +40217b46: ee0b addi.n a14, a14, -1 +40217b48: b108 l32i.n a0, a1, 44 +40217b4a: dd1b addi.n a13, a13, 1 +40217b4c: 00fa add.n a0, a0, a15 +40217b4e: 200082 l8ui a8, a0, 32 +40217b51: 74d0d0 extui a13, a13, 0, 8 +40217b54: 78dc bnez.n a8, 40217b6f +40217b56: 210022 l8ui a2, a0, 33 +40217b59: 220032 l8ui a3, a0, 34 +40217b5c: f2cc bnez.n a2, 40217b6f +40217b5e: d3cc bnez.n a3, 40217b6f +40217b60: 340c movi.n a4, 3 +40217b62: 750c movi.n a5, 7 +40217b64: f60c movi.n a6, 15 +40217b66: 204062 s8i a6, a0, 32 +40217b69: 214052 s8i a5, a0, 33 +40217b6c: 224042 s8i a4, a0, 34 +40217b6f: f45e56 bnez a14, 40217ab8 +40217b72: 0d0c movi.n a13, 0 +40217b74: 0dfa add.n a0, a13, a15 +40217b76: dd1b addi.n a13, a13, 1 +40217b78: 2600e2 l8ui a14, a0, 38 +40217b7b: 2940e2 s8i a14, a0, 41 +40217b7e: 74d0d0 extui a13, a13, 0, 8 +40217b81: ef3d66 bnei a13, 3, 40217b74 +40217b84: 0c08 l32i.n a0, a12, 0 +40217b86: 322002 l32i a0, a0, 200 +40217b89: 0000c0 callx0 a0 +40217b8c: 0c08 l32i.n a0, a12, 0 +40217b8e: 312002 l32i a0, a0, 196 +40217b91: 0000c0 callx0 a0 +40217b94: 0c08 l32i.n a0, a12, 0 +40217b96: 2f2002 l32i a0, a0, 188 +40217b99: c25ed1 l32r a13, 40208514 +40217b9c: 0000c0 callx0 a0 +40217b9f: 3c08 l32i.n a0, a12, 12 +40217ba1: 2000d0 or a0, a0, a13 +40217ba4: 3c09 s32i.n a0, a12, 12 +40217ba6: 81d8 l32i.n a13, a1, 32 +40217ba8: 91e8 l32i.n a14, a1, 36 +40217baa: a1f8 l32i.n a15, a1, 40 +40217bac: 0bf0b7 bbsi a0, 27, 40217bbb +40217baf: fa7721 l32r a2, 4021658c +40217bb2: 3c0c32 l8ui a3, a12, 60 +40217bb5: fa7601 l32r a0, 40216590 +40217bb8: 0000c0 callx0 a0 +40217bbb: 71c8 l32i.n a12, a1, 28 +40217bbd: 6108 l32i.n a0, a1, 24 +40217bbf: 30c112 addi a1, a1, 48 +40217bc2: f00d ret.n + +40217bc4 : +40217bc4: 871c movi.n a7, 24 +40217bc6: 012747 blt a7, a4, 40217bcb +40217bc9: 047d mov.n a7, a4 +40217bcb: 040c movi.n a4, 0 +40217bcd: 624a add.n a6, a2, a4 +40217bcf: 841b addi.n a8, a4, 1 +40217bd1: 534a add.n a5, a3, a4 +40217bd3: 000552 l8ui a5, a5, 0 +40217bd6: 744080 extui a4, a8, 0, 8 +40217bd9: c05570 sub a5, a5, a7 +40217bdc: 004652 s8i a5, a6, 0 +40217bdf: ea6466 bnei a4, 6, 40217bcd +40217be2: f00d ret.n +40217be4: fe8af6 bgeui a10, 8, 40217be6 +40217be7: 3f .byte 0x3f +40217be8: fe83d0 excw +40217beb: 3f .byte 0x3f +40217bec: 000000 ill +40217bef: 20 .byte 0x20 + +40217bf0 : +40217bf0: 64a072 movi a7, 100 +40217bf3: 01a042 movi a4, 1 +40217bf6: c0c112 addi a1, a1, -64 +40217bf9: 0a61c2 s32i a12, a1, 40 +40217bfc: 9109 s32i.n a0, a1, 36 +40217bfe: d1f9 s32i.n a15, a1, 52 +40217c00: c1e9 s32i.n a14, a1, 48 +40217c02: b1d9 s32i.n a13, a1, 44 +40217c04: 03ed mov.n a14, a3 +40217c06: 02dd mov.n a13, a2 +40217c08: f669f1 l32r a15, 402155ac +40217c0b: 012280 slli a2, a2, 24 +40217c0e: 312820 srai a2, a2, 24 +40217c11: 6fcb addi.n a6, a15, 12 +40217c13: 609f52 l16si a5, a15, 192 +40217c16: 700f32 l8ui a3, a15, 112 +40217c19: 0149 s32i.n a4, a1, 0 +40217c1b: 040c movi.n a4, 0 +40217c1d: fe6245 call0 40216244 +40217c20: fa5b21 l32r a2, 4021658c +40217c23: 0d3d mov.n a3, a13 +40217c25: fa5a01 l32r a0, 40216590 +40217c28: 0000c0 callx0 a0 +40217c2b: c20f52 l8ui a5, a15, 194 +40217c2e: 45cc bnez.n a5, 40217c36 +40217c30: 026d66 bnei a13, 6, 40217c36 +40217c33: 036885 call0 4021b2bc +40217c36: ffebf1 l32r a15, 40217be4 +40217c39: 2f1e66 bnei a14, 1, 40217c6c +40217c3c: 0c0c movi.n a12, 0 +40217c3e: 060c movi.n a6, 0 +40217c40: 8169 s32i.n a6, a1, 32 +40217c42: 202ff0 or a2, a15, a15 +40217c45: 10c132 addi a3, a1, 16 +40217c48: 037f85 call0 4021b444 +40217c4b: 082102 l32i a0, a1, 32 +40217c4e: 80c2c0 add a12, a2, a12 +40217c51: 11cc00 slli a12, a12, 16 +40217c54: 31c0c0 srai a12, a12, 16 +40217c57: 42cc bnez.n a2, 40217c5f +40217c59: 100122 l8ui a2, a1, 16 +40217c5c: 0ff256 bnez a2, 40217d5f +40217c5f: 001b addi.n a0, a0, 1 +40217c61: 740000 extui a0, a0, 0, 8 +40217c64: 8109 s32i.n a0, a1, 32 +40217c66: d82066 bnei a0, 2, 40217c42 +40217c69: 003d46 j 40217d62 +40217c6c: 0c0c movi.n a12, 0 +40217c6e: 0f3d mov.n a3, a15 +40217c70: 18c122 addi a2, a1, 24 +40217c73: 0c4d mov.n a4, a12 +40217c75: fff4c5 call0 40217bc4 +40217c78: 3d0b addi.n a3, a13, -1 +40217c7a: f64cf1 l32r a15, 402155ac +40217c7d: a20c movi.n a2, 10 +40217c7f: 0fcb addi.n a0, a15, 12 +40217c81: 0a3237 bltu a2, a3, 40217c8f +40217c84: ffd921 l32r a2, 40217be8 +40217c87: 2d2a add.n a2, a13, a2 +40217c89: 7f0222 l8ui a2, a2, 127 +40217c8c: 000046 j 40217c91 +40217c8f: 320c movi.n a2, 3 +40217c91: 90d200 addx2 a13, a2, a0 +40217c94: 065dc2 s16i a12, a13, 12 +40217c97: 2c1e66 bnei a14, 1, 40217cc7 +40217c9a: f67841 l32r a4, 4021567c +40217c9d: ffaf72 movi a7, -1 +40217ca0: 1162d0 slli a6, a2, 3 +40217ca3: 7450c0 extui a5, a12, 0, 8 +40217ca6: 401600 ssl a6 +40217ca9: ffa062 movi a6, 255 +40217cac: a15500 sll a5, a5 +40217caf: a16600 sll a6, a6 +40217cb2: 306670 xor a6, a6, a7 +40217cb5: 0020c0 memw +40217cb8: ff2432 l32i a3, a4, 0x3fc +40217cbb: 103360 and a3, a3, a6 +40217cbe: 203350 or a3, a3, a5 +40217cc1: 0020c0 memw +40217cc4: ff6432 s32i a3, a4, 0x3fc +40217cc7: 18c132 addi a3, a1, 24 +40217cca: 06a042 movi a4, 6 +40217ccd: 1fa052 movi a5, 31 +40217cd0: f7c1e1 l32r a14, 40215bd4 +40217cd3: 38a182 movi a8, 0x138 +40217cd6: 90c220 addx2 a12, a2, a2 +40217cd9: ff6071 l32r a7, 40217a5c +40217cdc: 024c movi.n a2, 64 +40217cde: 000762 l8ui a6, a7, 0 +40217ce1: 11ccf0 slli a12, a12, 1 +40217ce4: 016680 slli a6, a6, 24 +40217ce7: 316860 srai a6, a6, 24 +40217cea: fac662 addi a6, a6, -6 +40217ced: 004762 s8i a6, a7, 0 +40217cf0: 0189 s32i.n a8, a1, 0 +40217cf2: 016680 slli a6, a6, 24 +40217cf5: 070c movi.n a7, 0 +40217cf7: 1179 s32i.n a7, a1, 4 +40217cf9: 316860 srai a6, a6, 24 +40217cfc: 38ce72 addi a7, a14, 56 +40217cff: 7c7a add.n a7, a12, a7 +40217d01: 04b145 call0 4021c818 +40217d04: 3f0f52 l8ui a5, a15, 63 +40217d07: 3e0f02 l8ui a0, a15, 62 +40217d0a: 2cea add.n a2, a12, a14 +40217d0c: 380232 l8ui a3, a2, 56 +40217d0f: 3d0242 l8ui a4, a2, 61 +40217d12: 390222 l8ui a2, a2, 57 +40217d15: 014480 slli a4, a4, 24 +40217d18: 013380 slli a3, a3, 24 +40217d1b: c00050 sub a0, a0, a5 +40217d1e: 004b addi.n a0, a0, 4 +40217d20: 313830 srai a3, a3, 24 +40217d23: ff4e51 l32r a5, 40217a5c +40217d26: 314840 srai a4, a4, 24 +40217d29: 012280 slli a2, a2, 24 +40217d2c: 25c442 addi a4, a4, 37 +40217d2f: 004542 s8i a4, a5, 0 +40217d32: 312820 srai a2, a2, 24 +40217d35: c02230 sub a2, a2, a3 +40217d38: 09a027 bge a0, a2, 40217d45 +40217d3b: ffac41 l32r a4, 40217bec +40217d3e: 3f38 l32i.n a3, a15, 12 +40217d40: 203340 or a3, a3, a4 +40217d43: 3f39 s32i.n a3, a15, 12 +40217d45: a1c8 l32i.n a12, a1, 40 +40217d47: c1e8 l32i.n a14, a1, 48 +40217d49: 9108 l32i.n a0, a1, 36 +40217d4b: 069d52 l16si a5, a13, 12 +40217d4e: b1d8 l32i.n a13, a1, 44 +40217d50: 0455a6 blti a5, 5, 40217d58 +40217d53: 160c movi.n a6, 1 +40217d55: c34f62 s8i a6, a15, 195 +40217d58: d1f8 l32i.n a15, a1, 52 +40217d5a: 40c112 addi a1, a1, 64 +40217d5d: f00d ret.n +40217d5f: 122066 bnei a0, 2, 40217d75 +40217d62: 0c1b addi.n a0, a12, 1 +40217d64: cc2b addi.n a12, a12, 2 +40217d66: b3c000 movgez a12, a0, a0 +40217d69: 21c1c0 srai a12, a12, 1 +40217d6c: 11cc00 slli a12, a12, 16 +40217d6f: 31c0c0 srai a12, a12, 16 +40217d72: ffbe06 j 40217c6e +40217d75: 0c0c movi.n a12, 0 +40217d77: ffbcc6 j 40217c6e +40217d7a: 420000 excw +40217d7d: fe8b addi.n a15, a14, 8 +40217d7f: 3f .byte 0x3f + +40217d80 : +40217d80: c0c112 addi a1, a1, -64 +40217d83: 51d9 s32i.n a13, a1, 20 +40217d85: 61e9 s32i.n a14, a1, 24 +40217d87: 71f9 s32i.n a15, a1, 28 +40217d89: 41c9 s32i.n a12, a1, 16 +40217d8b: 3109 s32i.n a0, a1, 12 +40217d8d: f60701 l32r a0, 402155ac +40217d90: 02cd mov.n a12, a2 +40217d92: ad0022 l8ui a2, a0, 173 +40217d95: c139 s32i.n a3, a1, 48 +40217d97: 42cc bnez.n a2, 40217d9f +40217d99: 027e85 call0 4021a584 +40217d9c: f60401 l32r a0, 402155ac +40217d9f: 0f0c movi.n a15, 0 +40217da1: f78cd1 l32r a13, 40215bd4 +40217da4: 6e0c movi.n a14, 6 +40217da6: a06cc0 addx4 a6, a12, a12 +40217da9: 4c0b addi.n a4, a12, -1 +40217dab: facc52 addi a5, a12, -6 +40217dae: 8159 s32i.n a5, a1, 32 +40217db0: b149 s32i.n a4, a1, 44 +40217db2: c9c662 addi a6, a6, -55 +40217db5: 2169 s32i.n a6, a1, 8 +40217db7: 2d7cf6 bgeui a12, 7, 40217de8 +40217dba: 530c movi.n a3, 5 +40217dbc: b128 l32i.n a2, a1, 44 +40217dbe: 3e0d42 l8ui a4, a13, 62 +40217dc1: 380d52 l8ui a5, a13, 56 +40217dc4: a159 s32i.n a5, a1, 40 +40217dc6: 014480 slli a4, a4, 24 +40217dc9: 015580 slli a5, a5, 24 +40217dcc: 315850 srai a5, a5, 24 +40217dcf: 314840 srai a4, a4, 24 +40217dd2: c04450 sub a4, a4, a5 +40217dd5: 822240 mull a2, a2, a4 +40217dd8: a79001 l32r a0, 40201c18 +40217ddb: 0000c0 callx0 a0 +40217dde: a158 l32i.n a5, a1, 40 +40217de0: f5f301 l32r a0, 402155ac +40217de3: 225a add.n a2, a2, a5 +40217de5: 001806 j 40217e49 +40217de8: 2dacf6 bgeui a12, 12, 40217e19 +40217deb: 530c movi.n a3, 5 +40217ded: 8128 l32i.n a2, a1, 32 +40217def: 440d42 l8ui a4, a13, 68 +40217df2: 3e0d52 l8ui a5, a13, 62 +40217df5: 9159 s32i.n a5, a1, 36 +40217df7: 014480 slli a4, a4, 24 +40217dfa: 015580 slli a5, a5, 24 +40217dfd: 315850 srai a5, a5, 24 +40217e00: 314840 srai a4, a4, 24 +40217e03: c04450 sub a4, a4, a5 +40217e06: 822240 mull a2, a2, a4 +40217e09: a78301 l32r a0, 40201c18 +40217e0c: 0000c0 callx0 a0 +40217e0f: 9158 l32i.n a5, a1, 36 +40217e11: f5e601 l32r a0, 402155ac +40217e14: 225a add.n a2, a2, a5 +40217e16: 000bc6 j 40217e49 +40217e19: 4a0d22 l8ui a2, a13, 74 +40217e1c: d60c movi.n a6, 13 +40217e1e: 012280 slli a2, a2, 24 +40217e21: 312820 srai a2, a2, 24 +40217e24: 2136c7 bltu a6, a12, 40217e49 +40217e27: 440d42 l8ui a4, a13, 68 +40217e2a: 1149 s32i.n a4, a1, 4 +40217e2c: 014480 slli a4, a4, 24 +40217e2f: 314840 srai a4, a4, 24 +40217e32: c04240 sub a4, a2, a4 +40217e35: 2128 l32i.n a2, a1, 8 +40217e37: 631c movi.n a3, 22 +40217e39: 822240 mull a2, a2, a4 +40217e3c: a77701 l32r a0, 40201c18 +40217e3f: 0000c0 callx0 a0 +40217e42: 1158 l32i.n a5, a1, 4 +40217e44: f5da01 l32r a0, 402155ac +40217e47: 225a add.n a2, a2, a5 +40217e49: dd1b addi.n a13, a13, 1 +40217e4b: ee0b addi.n a14, a14, -1 +40217e4d: c178 l32i.n a7, a1, 48 +40217e4f: 680062 l8ui a6, a0, 104 +40217e52: 7f7a add.n a7, a15, a7 +40217e54: 016680 slli a6, a6, 24 +40217e57: ff1b addi.n a15, a15, 1 +40217e59: 316860 srai a6, a6, 24 +40217e5c: 662a add.n a6, a6, a2 +40217e5e: 004762 s8i a6, a7, 0 +40217e61: f52e56 bnez a14, 40217db7 +40217e64: a90082 l8ui a8, a0, 169 +40217e67: c40092 l8ui a9, a0, 196 +40217e6a: 2b1826 beqi a8, 1, 40217e99 +40217e6d: 281926 beqi a9, 1, 40217e99 +40217e70: 050c movi.n a5, 0 +40217e72: 80afd2 movi a13, -128 +40217e75: ffc121 l32r a2, 40217d7c +40217e78: 05a032 movi a3, 5 +40217e7b: 0c2142 l32i a4, a1, 48 +40217e7e: 0421c2 l32i a12, a1, 16 +40217e81: 61e8 l32i.n a14, a1, 24 +40217e83: 71f8 l32i.n a15, a1, 28 +40217e85: 0d6d mov.n a6, a13 +40217e87: 3d40d2 s8i a13, a0, 61 +40217e8a: 5e4052 s8i a5, a0, 94 +40217e8d: 51d8 l32i.n a13, a1, 20 +40217e8f: 037a45 call0 4021b634 +40217e92: 3108 l32i.n a0, a1, 12 +40217e94: 40c112 addi a1, a1, 64 +40217e97: f00d ret.n +40217e99: a000a2 l8ui a10, a0, 160 +40217e9c: a400e2 l8ui a14, a0, 164 +40217e9f: 5adc bnez.n a10, 40217eb8 +40217ea1: 023cb6 bltui a12, 3, 40217ea7 +40217ea4: 004786 j 40217fc6 +40217ea7: f74b21 l32r a2, 40215bd4 +40217eaa: 3a0222 l8ui a2, a2, 58 +40217ead: 150c movi.n a5, 1 +40217eaf: 01d280 slli a13, a2, 24 +40217eb2: 31d8d0 srai a13, a13, 24 +40217eb5: ffef06 j 40217e75 +40217eb8: 613ec7 bltu a14, a12, 40217f1d +40217ebb: f746f1 l32r a15, 40215bd4 +40217ebe: a200d2 l8ui a13, a0, 162 +40217ec1: ddfa add.n a13, a13, a15 +40217ec3: 380dd2 l8ui a13, a13, 56 +40217ec6: a500f2 l8ui a15, a0, 165 +40217ec9: 01dd80 slli a13, a13, 24 +40217ecc: 31d8d0 srai a13, a13, 24 +40217ecf: 451f66 bnei a15, 1, 40217f18 +40217ed2: f5b6c1 l32r a12, 402155ac +40217ed5: 530c movi.n a3, 5 +40217ed7: 4a0c22 l8ui a2, a12, 74 +40217eda: 440cc2 l8ui a12, a12, 68 +40217edd: 012280 slli a2, a2, 24 +40217ee0: 312820 srai a2, a2, 24 +40217ee3: 01cc80 slli a12, a12, 24 +40217ee6: 31c8c0 srai a12, a12, 24 +40217ee9: c022c0 sub a2, a2, a12 +40217eec: 822e20 mull a2, a14, a2 +40217eef: a74a01 l32r a0, 40201c18 +40217ef2: 0000c0 callx0 a0 +40217ef5: 3c2a add.n a3, a12, a2 +40217ef7: 013380 slli a3, a3, 24 +40217efa: b128 l32i.n a2, a1, 44 +40217efc: 313830 srai a3, a3, 24 +40217eff: c033d0 sub a3, a3, a13 +40217f02: 822230 mull a2, a2, a3 +40217f05: 0e3d mov.n a3, a14 +40217f07: a74401 l32r a0, 40201c18 +40217f0a: 0000c0 callx0 a0 +40217f0d: f5a701 l32r a0, 402155ac +40217f10: dd2a add.n a13, a13, a2 +40217f12: 01dd80 slli a13, a13, 24 +40217f15: 31d8d0 srai a13, a13, 24 +40217f18: 150c movi.n a5, 1 +40217f1a: ffd5c6 j 40217e75 +40217f1d: a30022 l8ui a2, a0, 163 +40217f20: ff0c movi.n a15, 15 +40217f22: c0ff20 sub a15, a15, a2 +40217f25: 4a2cf7 blt a12, a15, 40217f73 +40217f28: f72bf1 l32r a15, 40215bd4 +40217f2b: a100d2 l8ui a13, a0, 161 +40217f2e: ddfa add.n a13, a13, a15 +40217f30: 4a0dd2 l8ui a13, a13, 74 +40217f33: a50032 l8ui a3, a0, 165 +40217f36: 01dd80 slli a13, a13, 24 +40217f39: 31d8d0 srai a13, a13, 24 +40217f3c: d81366 bnei a3, 1, 40217f18 +40217f3f: 5000f2 l8ui a15, a0, 80 +40217f42: 01ff80 slli a15, a15, 24 +40217f45: 31f8f0 srai a15, a15, 24 +40217f48: 2facf6 bgeui a12, 12, 40217f7b +40217f4b: f59821 l32r a2, 402155ac +40217f4e: 830c movi.n a3, 8 +40217f50: 4a0222 l8ui a2, a2, 74 +40217f53: c033e0 sub a3, a3, a14 +40217f56: 012280 slli a2, a2, 24 +40217f59: 312820 srai a2, a2, 24 +40217f5c: 0129 s32i.n a2, a1, 0 +40217f5e: c02f20 sub a2, a15, a2 +40217f61: 822230 mull a2, a2, a3 +40217f64: 530c movi.n a3, 5 +40217f66: a72c01 l32r a0, 40201c18 +40217f69: 0000c0 callx0 a0 +40217f6c: 0108 l32i.n a0, a1, 0 +40217f6e: 002a add.n a0, a0, a2 +40217f70: 000ac6 j 40217f9f +40217f73: 050c movi.n a5, 0 +40217f75: 80afd2 movi a13, -128 +40217f78: ffbe46 j 40217e75 +40217f7b: f58c21 l32r a2, 402155ac +40217f7e: 330c movi.n a3, 3 +40217f80: 560222 l8ui a2, a2, 86 +40217f83: c033e0 sub a3, a3, a14 +40217f86: 012280 slli a2, a2, 24 +40217f89: 312820 srai a2, a2, 24 +40217f8c: c022f0 sub a2, a2, a15 +40217f8f: 822230 mull a2, a2, a3 +40217f92: a02220 addx4 a2, a2, a2 +40217f95: 631c movi.n a3, 22 +40217f97: a72001 l32r a0, 40201c18 +40217f9a: 0000c0 callx0 a0 +40217f9d: 0f2a add.n a0, a15, a2 +40217f9f: e30c movi.n a3, 14 +40217fa1: 012080 slli a2, a0, 24 +40217fa4: 312820 srai a2, a2, 24 +40217fa7: c033c0 sub a3, a3, a12 +40217faa: c022d0 sub a2, a2, a13 +40217fad: 822230 mull a2, a2, a3 +40217fb0: 0e3d mov.n a3, a14 +40217fb2: a71901 l32r a0, 40201c18 +40217fb5: 0000c0 callx0 a0 +40217fb8: f57d01 l32r a0, 402155ac +40217fbb: dd2a add.n a13, a13, a2 +40217fbd: 01dd80 slli a13, a13, 24 +40217fc0: 31d8d0 srai a13, a13, 24 +40217fc3: ffd446 j 40217f18 +40217fc6: 089cb6 bltui a12, 10, 40217fd2 +40217fc9: f70221 l32r a2, 40215bd4 +40217fcc: 460222 l8ui a2, a2, 70 +40217fcf: ffb686 j 40217ead +40217fd2: 80afd2 movi a13, -128 +40217fd5: 050c movi.n a5, 0 +40217fd7: ffa686 j 40217e75 + ... + +40217fdc : +40217fdc: 345020 extui a5, a2, 0, 4 +40217fdf: d0c112 addi a1, a1, -48 +40217fe2: 31c9 s32i.n a12, a1, 12 +40217fe4: 1139 s32i.n a3, a1, 4 +40217fe6: 0149 s32i.n a4, a1, 0 +40217fe8: 41d9 s32i.n a13, a1, 16 +40217fea: 51e9 s32i.n a14, a1, 20 +40217fec: 61f9 s32i.n a15, a1, 24 +40217fee: 2109 s32i.n a0, a1, 8 +40217ff0: 04f420 extui a15, a2, 4, 1 +40217ff3: f56e01 l32r a0, 402155ac +40217ff6: 242920 extui a2, a2, 9, 3 +40217ff9: 90fff0 addx2 a15, a15, a15 +40217ffc: 331002 l16ui a0, a0, 102 +40217fff: 90ff50 addx2 a15, a15, a5 +40218002: 04e400 extui a14, a0, 4, 1 +40218005: 345000 extui a5, a0, 0, 4 +40218008: 90eee0 addx2 a14, a14, a14 +4021800b: 240900 extui a0, a0, 9, 3 +4021800e: 90ee50 addx2 a14, a14, a5 +40218011: c0eef0 sub a14, a14, a15 +40218014: 11eee0 slli a14, a14, 2 +40218017: 08a027 bge a0, a2, 40218023 +4021801a: 0f0c movi.n a15, 0 +4021801c: 02dd mov.n a13, a2 +4021801e: 8109 s32i.n a0, a1, 32 +40218020: 000146 j 40218029 +40218023: 1f0c movi.n a15, 1 +40218025: 00dd mov.n a13, a0 +40218027: 8129 s32i.n a2, a1, 32 +40218029: 8158 l32i.n a5, a1, 32 +4021802b: 05cd mov.n a12, a5 +4021802d: 20a5d7 bge a5, a13, 40218051 +40218030: 7420c0 extui a2, a12, 0, 8 +40218033: 9f8c beqz.n a15, 40218040 +40218035: 030dc5 call0 4021b114 +40218038: ee2a add.n a14, a14, a2 +4021803a: 000206 j 40218046 +4021803d: 000000 ill +40218040: 030d05 call0 4021b114 +40218043: c0ee20 sub a14, a14, a2 +40218046: cc1b addi.n a12, a12, 1 +40218048: 01cc80 slli a12, a12, 24 +4021804b: 31c8c0 srai a12, a12, 24 +4021804e: de2cd7 blt a12, a13, 40218030 +40218051: 0c0c movi.n a12, 0 +40218053: 0d0c movi.n a13, 0 +40218055: 000c movi.n a0, 0 +40218057: 8109 s32i.n a0, a1, 32 +40218059: f6de21 l32r a2, 40215bd4 +4021805c: 11f8 l32i.n a15, a1, 4 +4021805e: 900cc0 addx2 a0, a12, a12 +40218061: fcfa add.n a15, a12, a15 +40218063: 000ff2 l8ui a15, a15, 0 +40218066: 900020 addx2 a0, a0, a2 +40218069: 3d0002 l8ui a0, a0, 61 +4021806c: 01ff80 slli a15, a15, 24 +4021806f: 31f8f0 srai a15, a15, 24 +40218072: 010080 slli a0, a0, 24 +40218075: 310800 srai a0, a0, 24 +40218078: c0ff00 sub a15, a15, a0 +4021807b: 01ff80 slli a15, a15, 24 +4021807e: f4c202 addi a0, a2, -12 +40218081: 0008 l32i.n a0, a0, 0 +40218083: 31f8f0 srai a15, a15, 24 +40218086: 0008 l32i.n a0, a0, 0 +40218088: 0f2d mov.n a2, a15 +4021808a: 0000c0 callx0 a0 +4021808d: 13ad27 bge a13, a2, 402180a4 +40218090: f54701 l32r a0, 402155ac +40218093: 0008 l32i.n a0, a0, 0 +40218095: 0f2d mov.n a2, a15 +40218097: 0008 l32i.n a0, a0, 0 +40218099: 81f9 s32i.n a15, a1, 32 +4021809b: 0000c0 callx0 a0 +4021809e: 01d280 slli a13, a2, 24 +402180a1: 31d8d0 srai a13, a13, 24 +402180a4: cc1b addi.n a12, a12, 1 +402180a6: 01cc80 slli a12, a12, 24 +402180a9: 31c8c0 srai a12, a12, 24 +402180ac: a94c66 bnei a12, 4, 40218059 +402180af: 0c0c movi.n a12, 0 +402180b1: 81f8 l32i.n a15, a1, 32 +402180b3: 0d0c movi.n a13, 0 +402180b5: 71d9 s32i.n a13, a1, 28 +402180b7: eefa add.n a14, a14, a15 +402180b9: 0d0c movi.n a13, 0 +402180bb: f6c621 l32r a2, 40215bd4 +402180be: f53b01 l32r a0, 402155ac +402180c1: 01f8 l32i.n a15, a1, 0 +402180c3: 0008 l32i.n a0, a0, 0 +402180c5: 90fcf0 addx2 a15, a12, a15 +402180c8: 902c20 addx2 a2, a12, a2 +402180cb: 069222 l16si a2, a2, 12 +402180ce: 009ff2 l16si a15, a15, 0 +402180d1: 0008 l32i.n a0, a0, 0 +402180d3: c0ff20 sub a15, a15, a2 +402180d6: 01ff80 slli a15, a15, 24 +402180d9: 31f8f0 srai a15, a15, 24 +402180dc: 0f2d mov.n a2, a15 +402180de: 0000c0 callx0 a0 +402180e1: 13ad27 bge a13, a2, 402180f8 +402180e4: f53201 l32r a0, 402155ac +402180e7: 0008 l32i.n a0, a0, 0 +402180e9: 0f2d mov.n a2, a15 +402180eb: 0008 l32i.n a0, a0, 0 +402180ed: 71f9 s32i.n a15, a1, 28 +402180ef: 0000c0 callx0 a0 +402180f2: 01d280 slli a13, a2, 24 +402180f5: 31d8d0 srai a13, a13, 24 +402180f8: cc1b addi.n a12, a12, 1 +402180fa: 01cc80 slli a12, a12, 24 +402180fd: 31c8c0 srai a12, a12, 24 +40218100: b74c66 bnei a12, 4, 402180bb +40218103: 2108 l32i.n a0, a1, 8 +40218105: 31c8 l32i.n a12, a1, 12 +40218107: f529f1 l32r a15, 402155ac +4021810a: 71d8 l32i.n a13, a1, 28 +4021810c: fb4fd2 s8i a13, a15, 251 +4021810f: fa4fe2 s8i a14, a15, 250 +40218112: 41d8 l32i.n a13, a1, 16 +40218114: 51e8 l32i.n a14, a1, 20 +40218116: 61f8 l32i.n a15, a1, 24 +40218118: 30c112 addi a1, a1, 48 +4021811b: f00d ret.n +4021811d: 000000 ill +40218120: fe8460 excw +40218123: 3f .byte 0x3f + +40218124 : +40218124: 023d mov.n a3, a2 +40218126: c0c112 addi a1, a1, -64 +40218129: a1c9 s32i.n a12, a1, 40 +4021812b: c1e9 s32i.n a14, a1, 48 +4021812d: d1f9 s32i.n a15, a1, 52 +4021812f: 9109 s32i.n a0, a1, 36 +40218131: b1d9 s32i.n a13, a1, 44 +40218133: f51ed1 l32r a13, 402155ac +40218136: fcb901 l32r a0, 4021741c +40218139: 3d48 l32i.n a4, a13, 12 +4021813b: 331d22 l16ui a2, a13, 102 +4021813e: 054440 extui a4, a4, 20, 1 +40218141: 0d9456 bnez a4, 4021821e +40218144: 015d mov.n a5, a1 +40218146: edcb addi.n a14, a13, 12 +40218148: 0c0c movi.n a12, 0 +4021814a: 8129 s32i.n a2, a1, 32 +4021814c: 03fd mov.n a15, a3 +4021814e: 318b addi.n a3, a1, 8 +40218150: 904c30 addx2 a4, a12, a3 +40218153: 902ce0 addx2 a2, a12, a14 +40218156: 900cc0 addx2 a0, a12, a12 +40218159: 9000e0 addx2 a0, a0, a14 +4021815c: 069222 l16si a2, a2, 12 +4021815f: 005422 s16i a2, a4, 0 +40218162: 3d0002 l8ui a0, a0, 61 +40218165: 802c50 add a2, a12, a5 +40218168: 004202 s8i a0, a2, 0 +4021816b: 01ccc2 addi a12, a12, 1 +4021816e: 74c0c0 extui a12, a12, 0, 8 +40218171: db4c66 bnei a12, 4, 40218150 +40218174: 0d08 l32i.n a0, a13, 0 +40218176: 282002 l32i a0, a0, 160 +40218179: 0000c0 callx0 a0 +4021817c: 0d08 l32i.n a0, a13, 0 +4021817e: 302002 l32i a0, a0, 192 +40218181: 120c movi.n a2, 1 +40218183: 0000c0 callx0 a0 +40218186: fca521 l32r a2, 4021741c +40218189: 011222 l16ui a2, a2, 2 +4021818c: b42020 extui a2, a2, 0, 12 +4021818f: fd5ac5 call0 4021573c +40218192: 10c132 addi a3, a1, 16 +40218195: fca121 l32r a2, 4021741c +40218198: 140c movi.n a4, 1 +4021819a: 011222 l16ui a2, a2, 2 +4021819d: 02f045 call0 4021b0a4 +402181a0: 0d08 l32i.n a0, a13, 0 +402181a2: 6008 l32i.n a0, a0, 24 +402181a4: 020c movi.n a2, 0 +402181a6: 0000c0 callx0 a0 +402181a9: 0c0c movi.n a12, 0 +402181ab: 0a3cf6 bgeui a12, 3, 402181b9 +402181ae: ffdc21 l32r a2, 40218120 +402181b1: 2c2a add.n a2, a12, a2 +402181b3: 000222 l8ui a2, a2, 0 +402181b6: 000046 j 402181bb +402181b9: e20c movi.n a2, 14 +402181bb: 0f3d mov.n a3, a15 +402181bd: ffa305 call0 40217bf0 +402181c0: cc1b addi.n a12, a12, 1 +402181c2: 74c0c0 extui a12, a12, 0, 8 +402181c5: e23c66 bnei a12, 3, 402181ab +402181c8: 0c0c movi.n a12, 0 +402181ca: 0e9df2 l16si a15, a13, 28 +402181cd: 0f5df2 s16i a15, a13, 30 +402181d0: 0cea add.n a0, a12, a14 +402181d2: cc1b addi.n a12, a12, 1 +402181d4: 4400f2 l8ui a15, a0, 68 +402181d7: 4a40f2 s8i a15, a0, 74 +402181da: 74c0c0 extui a12, a12, 0, 8 +402181dd: ef6c66 bnei a12, 6, 402181d0 +402181e0: 0d08 l32i.n a0, a13, 0 +402181e2: 322002 l32i a0, a0, 200 +402181e5: 81c8 l32i.n a12, a1, 32 +402181e7: 0000c0 callx0 a0 +402181ea: 0d08 l32i.n a0, a13, 0 +402181ec: 312002 l32i a0, a0, 196 +402181ef: 0000c0 callx0 a0 +402181f2: 0d08 l32i.n a0, a13, 0 +402181f4: 2f2002 l32i a0, a0, 188 +402181f7: 0000c0 callx0 a0 +402181fa: ae1131 l32r a3, 40203a40 +402181fd: 3d28 l32i.n a2, a13, 12 +402181ff: 040c movi.n a4, 0 +40218201: 694d42 s8i a4, a13, 105 +40218204: 684d42 s8i a4, a13, 104 +40218207: 2e5d42 s16i a4, a13, 92 +4021820a: 6a4d42 s8i a4, a13, 106 +4021820d: 202230 or a2, a2, a3 +40218210: 3d29 s32i.n a2, a13, 12 +40218212: 013d mov.n a3, a1 +40218214: 0c2d mov.n a2, a12 +40218216: 418b addi.n a4, a1, 8 +40218218: ffdc05 call0 40217fdc +4021821b: 000686 j 40218239 +4021821e: 10c132 addi a3, a1, 16 +40218221: 00a042 movi a4, 0 +40218224: 205000 or a5, a0, a0 +40218227: 015522 s16i a2, a5, 2 +4021822a: 02e785 call0 4021b0a4 +4021822d: fc7b21 l32r a2, 4021741c +40218230: 10c132 addi a3, a1, 16 +40218233: 011222 l16ui a2, a2, 2 +40218236: 02dd05 call0 4021b008 +40218239: a1c8 l32i.n a12, a1, 40 +4021823b: c1e8 l32i.n a14, a1, 48 +4021823d: 3d38 l32i.n a3, a13, 12 +4021823f: d1f8 l32i.n a15, a1, 52 +40218241: 08f3b7 bbsi a3, 27, 4021824d +40218244: 3c0d22 l8ui a2, a13, 60 +40218247: 18c132 addi a3, a1, 24 +4021824a: ffb345 call0 40217d80 +4021824d: b1d8 l32i.n a13, a1, 44 +4021824f: 9108 l32i.n a0, a1, 36 +40218251: 40c112 addi a1, a1, 64 +40218254: f00d ret.n + ... + +40218258 : +40218258: f50b21 l32r a2, 40215684 +4021825b: 0020c0 memw +4021825e: 592222 l32i a2, a2, 0x164 +40218261: b52420 extui a2, a2, 20, 12 +40218264: 221b addi.n a2, a2, 1 +40218266: 412120 srli a2, a2, 1 +40218269: f8d222 addmi a2, a2, 0xfffff800 +4021826c: 112200 slli a2, a2, 16 +4021826f: 312020 srai a2, a2, 16 +40218272: f00d ret.n + +40218274 : +40218274: f0c112 addi a1, a1, -16 +40218277: 0109 s32i.n a0, a1, 0 +40218279: f4cc01 l32r a0, 402155ac +4021827c: 0008 l32i.n a0, a0, 0 +4021827e: a008 l32i.n a0, a0, 40 +40218280: 0000c0 callx0 a0 +40218283: acae52 movi a5, 0xfffffeac +40218286: 78ae02 movi a0, 0xfffffe78 +40218289: 012207 blt a2, a0, 4021828e +4021828c: 020d mov.n a0, a2 +4021828e: 052d mov.n a2, a5 +40218290: 012507 blt a5, a0, 40218295 +40218293: 002d mov.n a2, a0 +40218295: 0108 l32i.n a0, a1, 0 +40218297: 112200 slli a2, a2, 16 +4021829a: 312020 srai a2, a2, 16 +4021829d: 10c112 addi a1, a1, 16 +402182a0: f00d ret.n +402182a2: fd0000 excw +402182a5: 7f .byte 0x7f +402182a6: fffd excw + +402182a8 : +402182a8: da7c movi.n a10, -3 +402182aa: f4f641 l32r a4, 40215684 +402182ad: 0020c0 memw +402182b0: 582492 l32i a9, a4, 0x160 +402182b3: 1099a0 and a9, a9, a10 +402182b6: 0020c0 memw +402182b9: 586492 s32i a9, a4, 0x160 +402182bc: a21b addi.n a10, a2, 1 +402182be: 822b addi.n a8, a2, 2 +402182c0: b38aa0 movgez a8, a10, a10 +402182c3: 218180 srai a8, a8, 1 +402182c6: 00ae92 movi a9, 0xfffffe00 +402182c9: 02d882 addmi a8, a8, 0x200 +402182cc: 848080 extui a8, a8, 0, 9 +402182cf: 0020c0 memw +402182d2: 592472 l32i a7, a4, 0x164 +402182d5: 107790 and a7, a7, a9 +402182d8: 207780 or a7, a7, a8 +402182db: 0020c0 memw +402182de: 596472 s32i a7, a4, 0x164 +402182e1: fff061 l32r a6, 402182a4 +402182e4: 250c movi.n a5, 2 +402182e6: 0020c0 memw +402182e9: 582432 l32i a3, a4, 0x160 +402182ec: 103360 and a3, a3, a6 +402182ef: 203350 or a3, a3, a5 +402182f2: 0020c0 memw +402182f5: 586432 s32i a3, a4, 0x160 +402182f8: f00d ret.n +402182fa: 000000 ill +402182fd: fffff0 excw +40218300: 028002 excw + ... + +40218304 : +40218304: f4e071 l32r a7, 40215684 +40218307: 0020c0 memw +4021830a: 582732 l32i a3, a7, 0x160 +4021830d: a0a182 movi a8, 0x1a0 +40218310: 2fe317 bbsi a3, 1, 40218343 +40218313: 249020 extui a9, a2, 0, 3 +40218316: fff9a1 l32r a10, 402182fc +40218319: 119970 slli a9, a9, 9 +4021831c: 0020c0 memw +4021831f: 592762 l32i a6, a7, 0x164 +40218322: 1066a0 and a6, a6, a10 +40218325: 206690 or a6, a6, a9 +40218328: 206680 or a6, a6, a8 +4021832b: 0020c0 memw +4021832e: 596762 s32i a6, a7, 0x164 +40218331: fff351 l32r a5, 40218300 +40218334: 0020c0 memw +40218337: 582742 l32i a4, a7, 0x160 +4021833a: 204450 or a4, a4, a5 +4021833d: 0020c0 memw +40218340: 586742 s32i a4, a7, 0x160 +40218343: f00d ret.n +40218345: 000000 ill +40218348: fff001 l32r a0, 40218308 +4021834b: ff .byte 0xff + +4021834c : +4021834c: ffff31 l32r a3, 40218348 +4021834f: f7b821 l32r a2, 40216230 +40218352: 0020c0 memw +40218355: 892222 l32i a2, a2, 0x224 +40218358: b42020 extui a2, a2, 0, 12 +4021835b: 223a add.n a2, a2, a3 +4021835d: 412120 srli a2, a2, 1 +40218360: 112200 slli a2, a2, 16 +40218363: 312020 srai a2, a2, 16 +40218366: f00d ret.n +40218368: ff .byte 0xff +40218369: fffff1 l32r a15, 40218368 +4021836c: fe8bc0 excw +4021836f: 3f .byte 0x3f +40218370: 8b18 l32i.n a1, a11, 32 +40218372: fe .byte 0xfe +40218373: 3f .byte 0x3f + +40218374 : +40218374: fffd61 l32r a6, 40218368 +40218377: 00a242 movi a4, 0x200 +4021837a: f0c112 addi a1, a1, -16 +4021837d: 0109 s32i.n a0, a1, 0 +4021837f: 11c9 s32i.n a12, a1, 4 +40218381: 21d9 s32i.n a13, a1, 8 +40218383: f4c051 l32r a5, 40215684 +40218386: 02dd mov.n a13, a2 +40218388: f489c1 l32r a12, 402155ac +4021838b: 0020c0 memw +4021838e: 592522 l32i a2, a5, 0x164 +40218391: 102260 and a2, a2, a6 +40218394: 202240 or a2, a2, a4 +40218397: 0020c0 memw +4021839a: 596522 s32i a2, a5, 0x164 +4021839d: 520c movi.n a2, 5 +4021839f: 0020c0 memw +402183a2: 582502 l32i a0, a5, 0x160 +402183a5: 410f00 srli a0, a0, 15 +402183a8: 100020 and a0, a0, a2 +402183ab: 0c5026 beqi a0, 5, 402183bb +402183ae: 0c08 l32i.n a0, a12, 0 +402183b0: 192002 l32i a0, a0, 100 +402183b3: 0d2d mov.n a2, a13 +402183b5: 0000c0 callx0 a0 +402183b8: 000586 j 402183d2 +402183bb: ffec01 l32r a0, 4021836c +402183be: 001022 l16ui a2, a0, 0 +402183c1: 0020c0 memw +402183c4: 582542 l32i a4, a5, 0x160 +402183c7: 1d6417 bbci a4, 1, 402183e8 +402183ca: 1f92f6 bgeui a2, 10, 402183ed +402183cd: 221b addi.n a2, a2, 1 +402183cf: 005022 s16i a2, a0, 0 +402183d2: 21d8 l32i.n a13, a1, 8 +402183d4: 1b2c42 l32i a4, a12, 108 +402183d7: ffe621 l32r a2, 40218370 +402183da: 11c8 l32i.n a12, a1, 4 +402183dc: 329b addi.n a3, a2, 9 +402183de: feb6c5 call0 40216f4c +402183e1: 0108 l32i.n a0, a1, 0 +402183e3: 10c112 addi a1, a1, 16 +402183e6: f00d ret.n +402183e8: 3139 s32i.n a3, a1, 12 +402183ea: 0592b6 bltui a2, 10, 402183f3 +402183ed: b0ae22 movi a2, 0xfffffeb0 +402183f0: 0002c6 j 402183ff +402183f3: 0c08 l32i.n a0, a12, 0 +402183f5: a008 l32i.n a0, a0, 40 +402183f7: 0000c0 callx0 a0 +402183fa: 3138 l32i.n a3, a1, 12 +402183fc: ffdc01 l32r a0, 4021836c +402183ff: 6cae42 movi a4, 0xfffffe6c +40218402: 6ca427 bge a4, a2, 40218472 +40218405: 001052 l16ui a5, a0, 0 +40218408: acae72 movi a7, 0xfffffeac +4021840b: 1495f6 bgeui a5, 10, 40218423 +4021840e: 78ae62 movi a6, 0xfffffe78 +40218411: 012267 blt a2, a6, 40218416 +40218414: 026d mov.n a6, a2 +40218416: 072d mov.n a2, a7 +40218418: 012767 blt a7, a6, 4021841d +4021841b: 062d mov.n a2, a6 +4021841d: 112200 slli a2, a2, 16 +40218420: 312020 srai a2, a2, 16 +40218423: 329c62 l16si a6, a12, 100 +40218426: 64a627 bge a6, a2, 4021848e +40218429: 904660 addx2 a4, a6, a6 +4021842c: 224a add.n a2, a2, a4 +4021842e: fec242 addi a4, a2, -2 +40218431: 221b addi.n a2, a2, 1 +40218433: b32440 movgez a2, a4, a4 +40218436: 212220 srai a2, a2, 2 +40218439: 116200 slli a6, a2, 16 +4021843c: 316060 srai a6, a6, 16 +4021843f: 325c62 s16i a6, a12, 100 +40218442: c50c72 l8ui a7, a12, 197 +40218445: 7cae22 movi a2, 0xfffffe7c +40218448: 051716 beqz a7, 4021849d +4021844b: 35a267 bge a2, a6, 40218484 +4021844e: 462a add.n a4, a6, a2 +40218450: 241b addi.n a2, a4, 1 +40218452: b32440 movgez a2, a4, a4 +40218455: 212120 srai a2, a2, 1 +40218458: 112200 slli a2, a2, 16 +4021845b: 312020 srai a2, a2, 16 +4021845e: 1d5c22 s16i a2, a12, 58 +40218461: 000906 j 40218489 +40218464: 050c movi.n a5, 0 +40218466: 838c beqz.n a3, 40218472 +40218468: 658c beqz.n a5, 40218472 +4021846a: 0c08 l32i.n a0, a12, 0 +4021846c: 162002 l32i a0, a0, 88 +4021846f: 0000c0 callx0 a0 +40218472: 0c08 l32i.n a0, a12, 0 +40218474: 192002 l32i a0, a0, 100 +40218477: 0d2d mov.n a2, a13 +40218479: 0000c0 callx0 a0 +4021847c: ffbc01 l32r a0, 4021836c +4021847f: 020c movi.n a2, 0 +40218481: ffd286 j 402183cf +40218484: 062d mov.n a2, a6 +40218486: 1d5c62 s16i a6, a12, 58 +40218489: 150c movi.n a5, 1 +4021848b: fff5c6 j 40218466 +4021848e: b0a267 bge a2, a6, 40218442 +40218491: f0c642 addi a4, a6, -16 +40218494: 1ba247 bge a2, a4, 402184b3 +40218497: f4c622 addi a2, a6, -12 +4021849a: ffe6c6 j 40218439 +4021849d: 1d9c22 l16si a2, a12, 58 +402184a0: 528b addi.n a5, a2, 8 +402184a2: 052567 blt a5, a6, 402184ab +402184a5: f8c272 addi a7, a2, -8 +402184a8: b8a677 bge a6, a7, 40218464 +402184ab: 062d mov.n a2, a6 +402184ad: 1d5c62 s16i a6, a12, 58 +402184b0: fff546 j 40218489 +402184b3: 902220 addx2 a2, a2, a2 +402184b6: 262a add.n a2, a6, a2 +402184b8: fec242 addi a4, a2, -2 +402184bb: 221b addi.n a2, a2, 1 +402184bd: b32440 movgez a2, a4, a4 +402184c0: 212220 srai a2, a2, 2 +402184c3: ffdc86 j 40218439 +402184c6: b80000 excw +402184c9: fe8b addi.n a15, a14, 8 +402184cb: 3f .byte 0x3f +402184cc: ff .byte 0xff +402184cd: ff .byte 0xff +402184ce: ff .byte 0xff +402184cf: bf .byte 0xbf + +402184d0 : +402184d0: 028d mov.n a8, a2 +402184d2: c0c112 addi a1, a1, -64 +402184d5: 5109 s32i.n a0, a1, 20 +402184d7: 71d9 s32i.n a13, a1, 28 +402184d9: 81e9 s32i.n a14, a1, 32 +402184db: 91f9 s32i.n a15, a1, 36 +402184dd: 61c9 s32i.n a12, a1, 24 +402184df: 00acf2 movi a15, 0xfffffc00 +402184e2: c9a0c2 movi a12, 201 +402184e5: 03ed mov.n a14, a3 +402184e7: f431d1 l32r a13, 402155ac +402184ea: 043d mov.n a3, a4 +402184ec: 102142 l32i a4, a1, 64 +402184ef: 0d98 l32i.n a9, a13, 0 +402184f1: 0408 l32i.n a0, a4, 0 +402184f3: 162992 l32i a9, a9, 88 +402184f6: 050500 extui a0, a0, 21, 1 +402184f9: 18c056 bnez a0, 40218689 +402184fc: 7cae22 movi a2, 0xfffffe7c +402184ff: 1169 s32i.n a6, a1, 4 +40218501: 0149 s32i.n a4, a1, 0 +40218503: d189 s32i.n a8, a1, 52 +40218505: c139 s32i.n a3, a1, 48 +40218507: b159 s32i.n a5, a1, 44 +40218509: 0009c0 callx0 a9 +4021850c: 7cae92 movi a9, 0xfffffe7c +4021850f: 0020c0 memw +40218512: f45ca1 l32r a10, 40215684 +40218515: da38 l32i.n a3, a10, 52 +40218517: 1033f0 and a3, a3, a15 +4021851a: 2033c0 or a3, a3, a12 +4021851d: 0020c0 memw +40218520: da39 s32i.n a3, a10, 52 +40218522: 0020c0 memw +40218525: da08 l32i.n a0, a10, 52 +40218527: e27c movi.n a2, -2 +40218529: 100020 and a0, a0, a2 +4021852c: 0020c0 memw +4021852f: da09 s32i.n a0, a10, 52 +40218531: 0020c0 memw +40218534: acae82 movi a8, 0xfffffeac +40218537: ffe401 l32r a0, 402184c8 +4021853a: 582aa2 l32i a10, a10, 0x160 +4021853d: 0b0c movi.n a11, 0 +4021853f: a1b9 s32i.n a11, a1, 40 +40218541: 1d5d92 s16i a9, a13, 58 +40218544: a148 l32i.n a4, a1, 40 +40218546: 541b addi.n a5, a4, 1 +40218548: 906400 addx2 a6, a4, a0 +4021854b: 005682 s16i a8, a6, 0 +4021854e: 744050 extui a4, a5, 0, 8 +40218551: a149 s32i.n a4, a1, 40 +40218553: ed4466 bnei a4, 4, 40218544 +40218556: 0020c0 memw +40218559: f44a91 l32r a9, 40215684 +4021855c: b938 l32i.n a3, a9, 44 +4021855e: 2139 s32i.n a3, a1, 8 +40218560: 0020c0 memw +40218563: c82922 l32i a2, a9, 0x320 +40218566: 3129 s32i.n a2, a1, 12 +40218568: 0020c0 memw +4021856b: d029f2 l32i a15, a9, 0x340 +4021856e: 41f9 s32i.n a15, a1, 16 +40218570: 0020c0 memw +40218573: b9b8 l32i.n a11, a9, 44 +40218575: ec7c movi.n a12, -2 +40218577: 10bbc0 and a11, a11, a12 +4021857a: 0020c0 memw +4021857d: b9b9 s32i.n a11, a9, 44 +4021857f: ffd3a1 l32r a10, 402184cc +40218582: 0020c0 memw +40218585: c82982 l32i a8, a9, 0x320 +40218588: 1088a0 and a8, a8, a10 +4021858b: 0020c0 memw +4021858e: c86982 s32i a8, a9, 0x320 +40218591: f439c1 l32r a12, 40215678 +40218594: 070c movi.n a7, 0 +40218596: a179 s32i.n a7, a1, 40 +40218598: 0020c0 memw +4021859b: 802cf2 l32i a15, a12, 0x200 +4021859e: 0a2142 l32i a4, a1, 40 +402185a1: 0ea022 movi a2, 14 +402185a4: a03440 addx4 a3, a4, a4 +402185a7: fdc442 addi a4, a4, -3 +402185aa: 01c332 addi a3, a3, 1 +402185ad: 932340 movnez a2, a3, a4 +402185b0: 012280 slli a2, a2, 24 +402185b3: 312820 srai a2, a2, 24 +402185b6: fdebc5 call0 40216474 +402185b9: 0020c0 memw +402185bc: f43201 l32r a0, 40215684 +402185bf: a1d8 l32i.n a13, a1, 40 +402185c1: 582042 l32i a4, a0, 0x160 +402185c4: deac beqz.n a14, 402185f5 +402185c6: ffc001 l32r a0, 402184c8 +402185c9: 0c0c movi.n a12, 0 +402185cb: 90dd00 addx2 a13, a13, a0 +402185ce: 0f4d mov.n a4, a15 +402185d0: d128 l32i.n a2, a1, 52 +402185d2: c138 l32i.n a3, a1, 48 +402185d4: b158 l32i.n a5, a1, 44 +402185d6: ff37c5 call0 40217954 +402185d9: 22dc bnez.n a2, 402185ef +402185db: ffc985 call0 40218274 +402185de: 009d32 l16si a3, a13, 0 +402185e1: cc1b addi.n a12, a12, 1 +402185e3: 02a237 bge a2, a3, 402185e9 +402185e6: 005d22 s16i a2, a13, 0 +402185e9: 74c0c0 extui a12, a12, 0, 8 +402185ec: de9ec7 bne a14, a12, 402185ce +402185ef: f42501 l32r a0, 40215684 +402185f2: f421c1 l32r a12, 40215678 +402185f5: 0020c0 memw +402185f8: d028 l32i.n a2, a0, 52 +402185fa: e37c movi.n a3, -2 +402185fc: 102230 and a2, a2, a3 +402185ff: 0020c0 memw +40218602: a1d8 l32i.n a13, a1, 40 +40218604: d029 s32i.n a2, a0, 52 +40218606: fd1b addi.n a15, a13, 1 +40218608: 74d0f0 extui a13, a15, 0, 8 +4021860b: a1d9 s32i.n a13, a1, 40 +4021860d: 874d66 bnei a13, 4, 40218598 +40218610: 0020c0 memw +40218613: f41c61 l32r a6, 40215684 +40218616: 2188 l32i.n a8, a1, 8 +40218618: b689 s32i.n a8, a6, 44 +4021861a: 0020c0 memw +4021861d: 3178 l32i.n a7, a1, 12 +4021861f: c86672 s32i a7, a6, 0x320 +40218622: 0020c0 memw +40218625: 4158 l32i.n a5, a1, 16 +40218627: 1148 l32i.n a4, a1, 4 +40218629: d06652 s32i a5, a6, 0x340 +4021862c: 84bc beqz.n a4, 40218668 +4021862e: ffa601 l32r a0, 402184c8 +40218631: d8af22 movi a2, -40 +40218634: 090c movi.n a9, 0 +40218636: a199 s32i.n a9, a1, 40 +40218638: a138 l32i.n a3, a1, 40 +4021863a: a148 l32i.n a4, a1, 40 +4021863c: 903300 addx2 a3, a3, a0 +4021863f: 541b addi.n a5, a4, 1 +40218641: 744050 extui a4, a5, 0, 8 +40218644: 009332 l16si a3, a3, 0 +40218647: a149 s32i.n a4, a1, 40 +40218649: 01a237 bge a2, a3, 4021864e +4021864c: 023d mov.n a3, a2 +4021864e: 112300 slli a2, a3, 16 +40218651: 312020 srai a2, a2, 16 +40218654: e04466 bnei a4, 4, 40218638 +40218657: f3d531 l32r a3, 402155ac +4021865a: 0308 l32i.n a0, a3, 0 +4021865c: 1d5322 s16i a2, a3, 58 +4021865f: 162002 l32i a0, a0, 88 +40218662: 0000c0 callx0 a0 +40218665: 000206 j 40218671 +40218668: f3d151 l32r a5, 402155ac +4021866b: 7cae42 movi a4, 0xfffffe7c +4021866e: 1d5542 s16i a4, a5, 58 +40218671: 0198 l32i.n a9, a1, 0 +40218673: f4b9a1 l32r a10, 40215958 +40218676: 0988 l32i.n a8, a9, 0 +40218678: f3cd71 l32r a7, 402155ac +4021867b: 2088a0 or a8, a8, a10 +4021867e: 0989 s32i.n a8, a9, 0 +40218680: 1d9762 l16si a6, a7, 58 +40218683: 325762 s16i a6, a7, 100 +40218686: 000b46 j 402186b7 +40218689: 1d9d22 l16si a2, a13, 58 +4021868c: 0009c0 callx0 a9 +4021868f: 0020c0 memw +40218692: f3fcb1 l32r a11, 40215684 +40218695: db08 l32i.n a0, a11, 52 +40218697: 1000f0 and a0, a0, a15 +4021869a: 2000c0 or a0, a0, a12 +4021869d: 0020c0 memw +402186a0: db09 s32i.n a0, a11, 52 +402186a2: 0020c0 memw +402186a5: dbd8 l32i.n a13, a11, 52 +402186a7: ee7c movi.n a14, -2 +402186a9: 10dde0 and a13, a13, a14 +402186ac: 0020c0 memw +402186af: dbd9 s32i.n a13, a11, 52 +402186b1: 0020c0 memw +402186b4: 582bb2 l32i a11, a11, 0x160 +402186b7: 61c8 l32i.n a12, a1, 24 +402186b9: 71d8 l32i.n a13, a1, 28 +402186bb: 81e8 l32i.n a14, a1, 32 +402186bd: 91f8 l32i.n a15, a1, 36 +402186bf: 5108 l32i.n a0, a1, 20 +402186c1: 40c112 addi a1, a1, 64 +402186c4: f00d ret.n + ... + +402186c8 : +402186c8: f0c112 addi a1, a1, -16 +402186cb: 0361c2 s32i a12, a1, 12 +402186ce: 203110 or a3, a1, a1 +402186d1: 20c220 or a12, a2, a2 +402186d4: f3b621 l32r a2, 402155ac +402186d7: 2109 s32i.n a0, a1, 8 +402186d9: 3c0222 l8ui a2, a2, 60 +402186dc: ff6a05 call0 40217d80 +402186df: f3b301 l32r a0, 402155ac +402186e2: 020c movi.n a2, 0 +402186e4: 015d mov.n a5, a1 +402186e6: 621b addi.n a6, a2, 1 +402186e8: 425a add.n a4, a2, a5 +402186ea: 000432 l8ui a3, a4, 0 +402186ed: 742060 extui a2, a6, 0, 8 +402186f0: 33ca add.n a3, a3, a12 +402186f2: 004432 s8i a3, a4, 0 +402186f5: ed6266 bnei a2, 6, 402186e6 +402186f8: fda121 l32r a2, 40217d7c +402186fb: 530c movi.n a3, 5 +402186fd: 014d mov.n a4, a1 +402186ff: 31c8 l32i.n a12, a1, 12 +40218701: 3d0062 l8ui a6, a0, 61 +40218704: 5e0052 l8ui a5, a0, 94 +40218707: 016680 slli a6, a6, 24 +4021870a: 316860 srai a6, a6, 24 +4021870d: 02f245 call0 4021b634 +40218710: 2108 l32i.n a0, a1, 8 +40218712: 10c112 addi a1, a1, 16 +40218715: f00d ret.n +40218717: f81000 excw +4021871a: 22 .byte 0x22 +4021871b: 40 .byte 0x40 + +4021871c : +4021871c: 027d mov.n a7, a2 +4021871e: e0c112 addi a1, a1, -32 +40218721: 0139 s32i.n a3, a1, 0 +40218723: fffd21 l32r a2, 40218718 +40218726: 1109 s32i.n a0, a1, 4 +40218728: 21c9 s32i.n a12, a1, 8 +4021872a: 31d9 s32i.n a13, a1, 12 +4021872c: 05cd mov.n a12, a5 +4021872e: 04dd mov.n a13, a4 +40218730: 4179 s32i.n a7, a1, 16 +40218732: a64601 l32r a0, 4020204c +40218735: 0000c0 callx0 a0 +40218738: 4108 l32i.n a0, a1, 16 +4021873a: 0020c0 memw +4021873d: 0d28 l32i.n a2, a13, 0 +4021873f: f792c7 bne a2, a12, 4021873a +40218742: 002d mov.n a2, a0 +40218744: b2d601 l32r a0, 4020529c +40218747: 0000c0 callx0 a0 +4021874a: 0108 l32i.n a0, a1, 0 +4021874c: 540c movi.n a4, 5 +4021874e: f3cd21 l32r a2, 40215684 +40218751: 0020c0 memw +40218754: 582232 l32i a3, a2, 0x160 +40218757: 413f30 srli a3, a3, 15 +4021875a: 103340 and a3, a3, a4 +4021875d: 135366 bnei a3, 5, 40218774 +40218760: d57c movi.n a5, -3 +40218762: 0020c0 memw +40218765: 582242 l32i a4, a2, 0x160 +40218768: 104450 and a4, a4, a5 +4021876b: 0020c0 memw +4021876e: 586242 s32i a4, a2, 0x160 +40218771: 000146 j 4021877a +40218774: 0020c0 memw +40218777: 582262 l32i a6, a2, 0x160 +4021877a: f38c71 l32r a7, 402155ac +4021877d: 21c8 l32i.n a12, a1, 8 +4021877f: 0778 l32i.n a7, a7, 0 +40218781: 31d8 l32i.n a13, a1, 12 +40218783: 192772 l32i a7, a7, 100 +40218786: 742000 extui a2, a0, 0, 8 +40218789: 0007c0 callx0 a7 +4021878c: 1108 l32i.n a0, a1, 4 +4021878e: 20c112 addi a1, a1, 32 +40218791: f00d ret.n +40218793: 846400 extui a6, a0, 4, 9 +40218796: fe .byte 0xfe +40218797: 3f .byte 0x3f +40218798: ff .byte 0xff +40218799: fffc03 excw + +4021879c : +4021879c: fffe41 l32r a4, 40218794 +4021879f: e0c112 addi a1, a1, -32 +402187a2: 51e9 s32i.n a14, a1, 20 +402187a4: 41d9 s32i.n a13, a1, 16 +402187a6: 2109 s32i.n a0, a1, 8 +402187a8: 31c9 s32i.n a12, a1, 12 +402187aa: f38001 l32r a0, 402155ac +402187ad: 02cd mov.n a12, a2 +402187af: 03dd mov.n a13, a3 +402187b1: d20c movi.n a2, 13 +402187b3: 020432 l8ui a3, a4, 2 +402187b6: 024132 s8i a3, a1, 2 +402187b9: 7200e2 l8ui a14, a0, 114 +402187bc: 001442 l16ui a4, a4, 0 +402187bf: 005142 s16i a4, a1, 0 +402187c2: 01ee80 slli a14, a14, 24 +402187c5: 31e8e0 srai a14, a14, 24 +402187c8: 237ce6 bgei a12, 7, 402187ef +402187cb: 530c movi.n a3, 5 +402187cd: 004d mov.n a4, a0 +402187cf: 710442 l8ui a4, a4, 113 +402187d2: 2c0b addi.n a2, a12, -1 +402187d4: 014480 slli a4, a4, 24 +402187d7: 314840 srai a4, a4, 24 +402187da: 1149 s32i.n a4, a1, 4 +402187dc: c04e40 sub a4, a14, a4 +402187df: 822240 mull a2, a2, a4 +402187e2: 11e8 l32i.n a14, a1, 4 +402187e4: a50d01 l32r a0, 40201c18 +402187e7: 0000c0 callx0 a0 +402187ea: ee2a add.n a14, a14, a2 +402187ec: 000846 j 40218811 +402187ef: 730032 l8ui a3, a0, 115 +402187f2: 013380 slli a3, a3, 24 +402187f5: 313830 srai a3, a3, 24 +402187f8: c033e0 sub a3, a3, a14 +402187fb: 02a2c7 bge a2, a12, 40218801 +402187fe: 004246 j 4021890b +40218801: facc22 addi a2, a12, -6 +40218804: 822320 mull a2, a3, a2 +40218807: 530c movi.n a3, 5 +40218809: a50301 l32r a0, 40201c18 +4021880c: 0000c0 callx0 a0 +4021880f: ee2a add.n a14, a14, a2 +40218811: 0a1d66 bnei a13, 1, 4021881f +40218814: ad7c movi.n a13, -6 +40218816: 0041d2 s8i a13, a1, 0 +40218819: 0241d2 s8i a13, a1, 2 +4021881c: 0008c6 j 40218843 +4021881f: fecd32 addi a3, a13, -2 +40218822: 0b9356 bnez a3, 402188df +40218825: f36101 l32r a0, 402155ac +40218828: 740032 l8ui a3, a0, 116 +4021882b: 004132 s8i a3, a1, 0 +4021882e: 750022 l8ui a2, a0, 117 +40218831: 014122 s8i a2, a1, 1 +40218834: 760002 l8ui a0, a0, 118 +40218837: 024102 s8i a0, a1, 2 +4021883a: 0101d2 l8ui a13, a1, 1 +4021883d: 01dd80 slli a13, a13, 24 +40218840: 31d8d0 srai a13, a13, 24 +40218843: 2c7ce6 bgei a12, 7, 40218873 +40218846: 000132 l8ui a3, a1, 0 +40218849: 2c0b addi.n a2, a12, -1 +4021884b: 013380 slli a3, a3, 24 +4021884e: 313830 srai a3, a3, 24 +40218851: 013380 slli a3, a3, 24 +40218854: 313830 srai a3, a3, 24 +40218857: c03d30 sub a3, a13, a3 +4021885a: 822230 mull a2, a2, a3 +4021885d: 530c movi.n a3, 5 +4021885f: a4ee01 l32r a0, 40201c18 +40218862: 0000c0 callx0 a0 +40218865: 000102 l8ui a0, a1, 0 +40218868: 010080 slli a0, a0, 24 +4021886b: 310800 srai a0, a0, 24 +4021886e: 002a add.n a0, a0, a2 +40218870: 000806 j 40218894 +40218873: 020102 l8ui a0, a1, 2 +40218876: d20c movi.n a2, 13 +40218878: 010080 slli a0, a0, 24 +4021887b: 310800 srai a0, a0, 24 +4021887e: c000d0 sub a0, a0, a13 +40218881: 7522c7 blt a2, a12, 402188fa +40218884: 530c movi.n a3, 5 +40218886: facc22 addi a2, a12, -6 +40218889: 822020 mull a2, a0, a2 +4021888c: a4e301 l32r a0, 40201c18 +4021888f: 0000c0 callx0 a0 +40218892: 02da add.n a0, a2, a13 +40218894: ffc1a1 l32r a10, 40218798 +40218897: 9e0a add.n a9, a14, a0 +40218899: f37a41 l32r a4, 40215684 +4021889c: 749090 extui a9, a9, 0, 8 +4021889f: 119960 slli a9, a9, 10 +402188a2: 0020c0 memw +402188a5: da2482 l32i a8, a4, 0x368 +402188a8: 1088a0 and a8, a8, a10 +402188ab: 208890 or a8, a8, a9 +402188ae: 0020c0 memw +402188b1: da6482 s32i a8, a4, 0x368 +402188b4: 170c movi.n a7, 1 +402188b6: 0020c0 memw +402188b9: d468 l32i.n a6, a4, 52 +402188bb: 206670 or a6, a6, a7 +402188be: 0020c0 memw +402188c1: d469 s32i.n a6, a4, 52 +402188c3: e57c movi.n a5, -2 +402188c5: 0020c0 memw +402188c8: d438 l32i.n a3, a4, 52 +402188ca: 103350 and a3, a3, a5 +402188cd: 0020c0 memw +402188d0: d439 s32i.n a3, a4, 52 +402188d2: 31c8 l32i.n a12, a1, 12 +402188d4: 41d8 l32i.n a13, a1, 16 +402188d6: 51e8 l32i.n a14, a1, 20 +402188d8: 2108 l32i.n a0, a1, 8 +402188da: 20c112 addi a1, a1, 32 +402188dd: f00d ret.n +402188df: fdcda2 addi a10, a13, -3 +402188e2: f54a56 bnez a10, 4021883a +402188e5: f33101 l32r a0, 402155ac +402188e8: 770032 l8ui a3, a0, 119 +402188eb: 004132 s8i a3, a1, 0 +402188ee: 780022 l8ui a2, a0, 120 +402188f1: 014122 s8i a2, a1, 1 +402188f4: 790002 l8ui a0, a0, 121 +402188f7: ffcf06 j 40218837 +402188fa: 530c movi.n a3, 5 +402188fc: fecc22 addi a2, a12, -2 +402188ff: 822020 mull a2, a0, a2 +40218902: a4c501 l32r a0, 40201c18 +40218905: 0000c0 callx0 a0 +40218908: ffe186 j 40218892 +4021890b: fecc22 addi a2, a12, -2 +4021890e: 822320 mull a2, a3, a2 +40218911: 530c movi.n a3, 5 +40218913: a4c101 l32r a0, 40201c18 +40218916: 0000c0 callx0 a0 +40218919: ffbc86 j 4021880f + +4021891c : +4021891c: f0c112 addi a1, a1, -16 +4021891f: 3109 s32i.n a0, a1, 12 +40218921: f32201 l32r a0, 402155ac +40218924: 3008 l32i.n a0, a0, 12 +40218926: 2129 s32i.n a2, a1, 8 +40218928: 127027 bbci a0, 18, 4021893e +4021892b: f32021 l32r a2, 402155ac +4021892e: 2138 l32i.n a3, a1, 8 +40218930: 2cc222 addi a2, a2, 44 +40218933: 743030 extui a3, a3, 0, 8 +40218936: f71601 l32r a0, 40216590 +40218939: 0000c0 callx0 a0 +4021893c: 2128 l32i.n a2, a1, 8 +4021893e: f34e31 l32r a3, 40215678 +40218941: 0020c0 memw +40218944: 9c2332 l32i a3, a3, 0x270 +40218947: 266317 bbci a3, 1, 40218971 +4021894a: 742020 extui a2, a2, 0, 8 +4021894d: 013d mov.n a3, a1 +4021894f: ff4305 call0 40217d80 +40218952: f31621 l32r a2, 402155ac +40218955: c60222 l8ui a2, a2, 198 +40218958: 006185 call0 40218f74 +4021895b: f31421 l32r a2, 402155ac +4021895e: 0208 l32i.n a0, a2, 0 +40218960: 162002 l32i a0, a0, 88 +40218963: 1d9222 l16si a2, a2, 58 +40218966: 0000c0 callx0 a0 +40218969: e21c movi.n a2, 30 +4021896b: b24c01 l32r a0, 4020529c +4021896e: 0000c0 callx0 a0 +40218971: 3108 l32i.n a0, a1, 12 +40218973: 10c112 addi a1, a1, 16 +40218976: f00d ret.n +40218978: 8468 l32i.n a6, a4, 32 +4021897a: fe .byte 0xfe +4021897b: 3f .byte 0x3f +4021897c: 005dc0 excw +4021897f: 000000 ill +40218982: 994024 excw +40218985: 4999 s32i.n a9, a9, 16 +40218987: 999a40 excw +4021898a: 9999 s32i.n a9, a9, 36 +4021898c: 9999 s32i.n a9, a9, 36 +4021898e: 40e9 s32i.n a14, a0, 16 +40218990: 000000 ill +40218993: e2a4c0 excw +40218996: ec4000 excw +40218999: 5f .byte 0x5f +4021899a: f04010 subx8 a4, a0, a1 +4021899d: 4000e2 l8ui a14, a0, 64 +402189a0: 00c8f0 excw +402189a3: ccb840 excw +402189a6: 00 .byte 00 +402189a7: 40 .byte 0x40 + +402189a8 : +402189a8: b0c112 addi a1, a1, -80 +402189ab: d1e9 s32i.n a14, a1, 52 +402189ad: e1f9 s32i.n a15, a1, 56 +402189af: 7129 s32i.n a2, a1, 28 +402189b1: c1d9 s32i.n a13, a1, 48 +402189b3: b1c9 s32i.n a12, a1, 44 +402189b5: f2fdc1 l32r a12, 402155ac +402189b8: a109 s32i.n a0, a1, 40 +402189ba: 700c02 l8ui a0, a12, 112 +402189bd: 03dd mov.n a13, a3 +402189bf: 30cc bnez.n a0, 402189c6 +402189c1: 8e2c movi.n a14, 40 +402189c3: 000446 j 402189d8 +402189c6: 041066 bnei a0, 1, 402189ce +402189c9: ae1c movi.n a14, 26 +402189cb: 000246 j 402189d8 +402189ce: fec032 addi a3, a0, -2 +402189d1: 821c movi.n a2, 24 +402189d3: 8e2c movi.n a14, 40 +402189d5: 83e230 moveqz a14, a2, a3 +402189d8: 0d2d mov.n a2, a13 +402189da: 0e3d mov.n a3, a14 +402189dc: d0fc01 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +402189df: 0000c0 callx0 a0 +402189e2: 1a92e6 bgei a2, 10, 40218a00 +402189e5: 0d2d mov.n a2, a13 +402189e7: 0e3d mov.n a3, a14 +402189e9: a48b01 l32r a0, 40201c18 +402189ec: 0000c0 callx0 a0 +402189ef: 820e20 mull a0, a14, a2 +402189f2: c000d0 sub a0, a0, a13 +402189f5: a00000 addx4 a0, a0, a0 +402189f8: 1120f0 slli a2, a0, 1 +402189fb: 6129 s32i.n a2, a1, 24 +402189fd: 000846 j 40218a22 +40218a00: c03e20 sub a3, a14, a2 +40218a03: 1793e6 bgei a3, 10, 40218a1e +40218a06: 0d2d mov.n a2, a13 +40218a08: 0e3d mov.n a3, a14 +40218a0a: a48301 l32r a0, 40201c18 +40218a0d: 0000c0 callx0 a0 +40218a10: 021b addi.n a0, a2, 1 +40218a12: 820e00 mull a0, a14, a0 +40218a15: c000d0 sub a0, a0, a13 +40218a18: a00000 addx4 a0, a0, a0 +40218a1b: fff646 j 402189f8 +40218a1e: 020c movi.n a2, 0 +40218a20: 6129 s32i.n a2, a1, 24 +40218a22: 7c0c32 l8ui a3, a12, 124 +40218a25: 9a0c22 l8ui a2, a12, 154 +40218a28: 082316 beqz a3, 40218aae +40218a2b: 5139 s32i.n a3, a1, 20 +40218a2d: 7b0cf2 l8ui a15, a12, 123 +40218a30: 112280 slli a2, a2, 8 +40218a33: ff2a add.n a15, a15, a2 +40218a35: 075f16 beqz a15, 40218aae +40218a38: 032d mov.n a2, a3 +40218a3a: 6e7c movi.n a14, -10 +40218a3c: 82eed0 mull a14, a14, a13 +40218a3f: c122d0 mul16u a2, a2, a13 +40218a42: a03330 addx4 a3, a3, a3 +40218a45: 1133f0 slli a3, a3, 1 +40218a48: f129 s32i.n a2, a1, 60 +40218a4a: 126132 s32i a3, a1, 72 +40218a4d: 0f3d mov.n a3, a15 +40218a4f: d0df01 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +40218a52: 0000c0 callx0 a0 +40218a55: 122102 l32i a0, a1, 72 +40218a58: f148 l32i.n a4, a1, 60 +40218a5a: 022207 blt a2, a0, 40218a60 +40218a5d: 005406 j 40218bb1 +40218a60: 042d mov.n a2, a4 +40218a62: 0f3d mov.n a3, a15 +40218a64: a46d01 l32r a0, 40201c18 +40218a67: 0000c0 callx0 a0 +40218a6a: f51601 l32r a0, 40215ec4 +40218a6d: 0000c0 callx0 a0 +40218a70: 2129 s32i.n a2, a1, 8 +40218a72: 0f2d mov.n a2, a15 +40218a74: f51401 l32r a0, 40215ec4 +40218a77: 0000c0 callx0 a0 +40218a7a: 02fd mov.n a15, a2 +40218a7c: 5128 l32i.n a2, a1, 20 +40218a7e: ffc501 l32r a0, 40218994 +40218a81: 0000c0 callx0 a0 +40218a84: 023d mov.n a3, a2 +40218a86: 0f2d mov.n a2, a15 +40218a88: f50c01 l32r a0, 40215eb8 +40218a8b: 0000c0 callx0 a0 +40218a8e: 023d mov.n a3, a2 +40218a90: 2128 l32i.n a2, a1, 8 +40218a92: f50801 l32r a0, 40215eb4 +40218a95: 0000c0 callx0 a0 +40218a98: ffb8f1 l32r a15, 40218978 +40218a9b: 0f38 l32i.n a3, a15, 0 +40218a9d: f50501 l32r a0, 40215eb4 +40218aa0: 0000c0 callx0 a0 +40218aa3: ffbd01 l32r a0, 40218998 +40218aa6: 0000c0 callx0 a0 +40218aa9: fe2a add.n a15, a14, a2 +40218aab: 000186 j 40218ab5 +40218aae: 0f0c movi.n a15, 0 +40218ab0: 6e7c movi.n a14, -10 +40218ab2: 82eed0 mull a14, a14, a13 +40218ab5: 970c02 l8ui a0, a12, 151 +40218ab8: 1361f2 s32i a15, a1, 76 +40218abb: 081016 beqz a0, 40218b40 +40218abe: 4109 s32i.n a0, a1, 16 +40218ac0: 9b0c22 l8ui a2, a12, 155 +40218ac3: 960cf2 l8ui a15, a12, 150 +40218ac6: 112280 slli a2, a2, 8 +40218ac9: ff2a add.n a15, a15, a2 +40218acb: 071f16 beqz a15, 40218b40 +40218ace: 0f3d mov.n a3, a15 +40218ad0: c120d0 mul16u a2, a0, a13 +40218ad3: 106122 s32i a2, a1, 64 +40218ad6: a0d000 addx4 a13, a0, a0 +40218ad9: 11ddf0 slli a13, a13, 1 +40218adc: d0bc01 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +40218adf: 0000c0 callx0 a0 +40218ae2: 102102 l32i a0, a1, 64 +40218ae5: 0222d7 blt a2, a13, 40218aeb +40218ae8: 004786 j 40218c0a +40218aeb: 0f3d mov.n a3, a15 +40218aed: 002d mov.n a2, a0 +40218aef: a44a01 l32r a0, 40201c18 +40218af2: 0000c0 callx0 a0 +40218af5: f4f301 l32r a0, 40215ec4 +40218af8: 0000c0 callx0 a0 +40218afb: 3129 s32i.n a2, a1, 12 +40218afd: 41d8 l32i.n a13, a1, 16 +40218aff: 0f2d mov.n a2, a15 +40218b01: f4f001 l32r a0, 40215ec4 +40218b04: 0000c0 callx0 a0 +40218b07: 02fd mov.n a15, a2 +40218b09: 0d2d mov.n a2, a13 +40218b0b: ffa201 l32r a0, 40218994 +40218b0e: 0000c0 callx0 a0 +40218b11: 023d mov.n a3, a2 +40218b13: 31d8 l32i.n a13, a1, 12 +40218b15: 0f2d mov.n a2, a15 +40218b17: f4e801 l32r a0, 40215eb8 +40218b1a: 0000c0 callx0 a0 +40218b1d: 023d mov.n a3, a2 +40218b1f: 0d2d mov.n a2, a13 +40218b21: f4e401 l32r a0, 40215eb4 +40218b24: 0000c0 callx0 a0 +40218b27: ff9431 l32r a3, 40218978 +40218b2a: 0338 l32i.n a3, a3, 0 +40218b2c: f4e201 l32r a0, 40215eb4 +40218b2f: 0000c0 callx0 a0 +40218b32: ff9901 l32r a0, 40218998 +40218b35: 0000c0 callx0 a0 +40218b38: 1321f2 l32i a15, a1, 76 +40218b3b: 3e2a add.n a3, a14, a2 +40218b3d: 000106 j 40218b45 +40218b40: 1321f2 l32i a15, a1, 76 +40218b43: 030c movi.n a3, 0 +40218b45: 116132 s32i a3, a1, 68 +40218b48: 0c08 l32i.n a0, a12, 0 +40218b4a: 4e1cd2 l16ui a13, a12, 156 +40218b4d: 0008 l32i.n a0, a0, 0 +40218b4f: deda add.n a13, a14, a13 +40218b51: 5eddd2 addmi a13, a13, 0x5e00 +40218b54: c0cdd2 addi a13, a13, -64 +40218b57: 0d2d mov.n a2, a13 +40218b59: 0000c0 callx0 a0 +40218b5c: ff8801 l32r a0, 4021897c +40218b5f: 030c movi.n a3, 0 +40218b61: 64a042 movi a4, 100 +40218b64: 012247 blt a2, a4, 40218b69 +40218b67: 03dd mov.n a13, a3 +40218b69: 0c58 l32i.n a5, a12, 0 +40218b6b: 4f1c22 l16ui a2, a12, 158 +40218b6e: 0558 l32i.n a5, a5, 0 +40218b70: ee2a add.n a14, a14, a2 +40218b72: ee0a add.n a14, a14, a0 +40218b74: 0e2d mov.n a2, a14 +40218b76: 0005c0 callx0 a5 +40218b79: 112102 l32i a0, a1, 68 +40218b7c: 7138 l32i.n a3, a1, 28 +40218b7e: 3f1c62 l16ui a6, a12, 126 +40218b81: 330b addi.n a3, a3, -1 +40218b83: 400300 ssr a3 +40218b86: b16060 sra a6, a6 +40218b89: 026607 bbci a6, 0, 40218b8f +40218b8c: 15af56 bnez a15, 40218cea +40218b8f: 4c1c42 l16ui a4, a12, 152 +40218b92: 400300 ssr a3 +40218b95: b14040 sra a4, a4 +40218b98: 026407 bbci a4, 0, 40218b9e +40218b9b: 15d056 bnez a0, 40218cfc +40218b9e: 0bfd56 bnez a13, 40218c61 +40218ba1: 64a052 movi a5, 100 +40218ba4: 012257 blt a2, a5, 40218ba9 +40218ba7: 0e0c movi.n a14, 0 +40218ba9: 61c8 l32i.n a12, a1, 24 +40218bab: 93cee0 movnez a12, a14, a14 +40218bae: 002c46 j 40218c63 +40218bb1: c06f20 sub a6, a15, a2 +40218bb4: 022607 blt a6, a0, 40218bba +40218bb7: 004d06 j 40218cef +40218bba: 042d mov.n a2, a4 +40218bbc: 0f3d mov.n a3, a15 +40218bbe: a41601 l32r a0, 40201c18 +40218bc1: 0000c0 callx0 a0 +40218bc4: 221b addi.n a2, a2, 1 +40218bc6: f4bf01 l32r a0, 40215ec4 +40218bc9: 0000c0 callx0 a0 +40218bcc: 0129 s32i.n a2, a1, 0 +40218bce: 0f2d mov.n a2, a15 +40218bd0: f4bd01 l32r a0, 40215ec4 +40218bd3: 0000c0 callx0 a0 +40218bd6: 1129 s32i.n a2, a1, 4 +40218bd8: 5128 l32i.n a2, a1, 20 +40218bda: ff6e01 l32r a0, 40218994 +40218bdd: 0000c0 callx0 a0 +40218be0: 023d mov.n a3, a2 +40218be2: 01f8 l32i.n a15, a1, 0 +40218be4: 1128 l32i.n a2, a1, 4 +40218be6: f4b401 l32r a0, 40215eb8 +40218be9: 0000c0 callx0 a0 +40218bec: 023d mov.n a3, a2 +40218bee: 0f2d mov.n a2, a15 +40218bf0: f4b101 l32r a0, 40215eb4 +40218bf3: 0000c0 callx0 a0 +40218bf6: ff6031 l32r a3, 40218978 +40218bf9: 0338 l32i.n a3, a3, 0 +40218bfb: f4ae01 l32r a0, 40215eb4 +40218bfe: 0000c0 callx0 a0 +40218c01: ff6501 l32r a0, 40218998 +40218c04: 0000c0 callx0 a0 +40218c07: ffa786 j 40218aa9 +40218c0a: c04f20 sub a4, a15, a2 +40218c0d: 0224d7 blt a4, a13, 40218c13 +40218c10: 003806 j 40218cf4 +40218c13: 0f3d mov.n a3, a15 +40218c15: 002d mov.n a2, a0 +40218c17: a40001 l32r a0, 40201c18 +40218c1a: 0000c0 callx0 a0 +40218c1d: 221b addi.n a2, a2, 1 +40218c1f: f4a901 l32r a0, 40215ec4 +40218c22: 0000c0 callx0 a0 +40218c25: 02dd mov.n a13, a2 +40218c27: 0f2d mov.n a2, a15 +40218c29: f4a601 l32r a0, 40215ec4 +40218c2c: 0000c0 callx0 a0 +40218c2f: 02fd mov.n a15, a2 +40218c31: 4128 l32i.n a2, a1, 16 +40218c33: ff5801 l32r a0, 40218994 +40218c36: 0000c0 callx0 a0 +40218c39: 023d mov.n a3, a2 +40218c3b: 0f2d mov.n a2, a15 +40218c3d: f49e01 l32r a0, 40215eb8 +40218c40: 0000c0 callx0 a0 +40218c43: 023d mov.n a3, a2 +40218c45: 0d2d mov.n a2, a13 +40218c47: f49b01 l32r a0, 40215eb4 +40218c4a: 0000c0 callx0 a0 +40218c4d: ff4a31 l32r a3, 40218978 +40218c50: 0338 l32i.n a3, a3, 0 +40218c52: f49801 l32r a0, 40215eb4 +40218c55: 0000c0 callx0 a0 +40218c58: ff5001 l32r a0, 40218998 +40218c5b: 0000c0 callx0 a0 +40218c5e: ffb586 j 40218b38 +40218c61: 0dcd mov.n a12, a13 +40218c63: ff47e1 l32r a14, 40218980 +40218c66: 0d0c movi.n a13, 0 +40218c68: 0c2d mov.n a2, a12 +40218c6a: ff4c01 l32r a0, 4021899c +40218c6d: 0000c0 callx0 a0 +40218c70: 9129 s32i.n a2, a1, 36 +40218c72: 8139 s32i.n a3, a1, 32 +40218c74: ff4451 l32r a5, 40218984 +40218c77: ff4441 l32r a4, 40218988 +40218c7a: ff4901 l32r a0, 402189a0 +40218c7d: 0000c0 callx0 a0 +40218c80: 0e5d mov.n a5, a14 +40218c82: 0d4d mov.n a4, a13 +40218c84: f48a01 l32r a0, 40215eac +40218c87: 0000c0 callx0 a0 +40218c8a: ff4601 l32r a0, 402189a4 +40218c8d: 0000c0 callx0 a0 +40218c90: 8138 l32i.n a3, a1, 32 +40218c92: ff3e51 l32r a5, 4021898c +40218c95: 02fd mov.n a15, a2 +40218c97: ff3c41 l32r a4, 40218988 +40218c9a: 9128 l32i.n a2, a1, 36 +40218c9c: ff4101 l32r a0, 402189a0 +40218c9f: 0000c0 callx0 a0 +40218ca2: 0d4d mov.n a4, a13 +40218ca4: 0e5d mov.n a5, a14 +40218ca6: f48101 l32r a0, 40215eac +40218ca9: 0000c0 callx0 a0 +40218cac: f561d1 l32r a13, 40216230 +40218caf: ff3d01 l32r a0, 402189a4 +40218cb2: 0000c0 callx0 a0 +40218cb5: ff3671 l32r a7, 40218990 +40218cb8: dd1151 l32r a5, 402100fc +40218cbb: 9460f0 extui a6, a15, 0, 10 +40218cbe: 105250 and a5, a2, a5 +40218cc1: 0166c0 slli a6, a6, 20 +40218cc4: 0c2d mov.n a2, a12 +40218cc6: 0020c0 memw +40218cc9: a82d42 l32i a4, a13, 0x2a0 +40218ccc: 104470 and a4, a4, a7 +40218ccf: 204460 or a4, a4, a6 +40218cd2: 204450 or a4, a4, a5 +40218cd5: 0020c0 memw +40218cd8: b1c8 l32i.n a12, a1, 44 +40218cda: d1e8 l32i.n a14, a1, 52 +40218cdc: a86d42 s32i a4, a13, 0x2a0 +40218cdf: e1f8 l32i.n a15, a1, 56 +40218ce1: c1d8 l32i.n a13, a1, 48 +40218ce3: a108 l32i.n a0, a1, 40 +40218ce5: 50c112 addi a1, a1, 80 +40218ce8: f00d ret.n +40218cea: 0fcd mov.n a12, a15 +40218cec: ffdcc6 j 40218c63 +40218cef: 0f0c movi.n a15, 0 +40218cf1: ff7006 j 40218ab5 +40218cf4: 1321f2 l32i a15, a1, 76 +40218cf7: 030c movi.n a3, 0 +40218cf9: ff9206 j 40218b45 +40218cfc: 00cd mov.n a12, a0 +40218cfe: ffd846 j 40218c63 +40218d01: 000000 ill + +40218d04 : +40218d04: f0c112 addi a1, a1, -16 +40218d07: 11c9 s32i.n a12, a1, 4 +40218d09: 0109 s32i.n a0, a1, 0 +40218d0b: 52cc bnez.n a2, 40218d14 +40218d0d: 0c0c movi.n a12, 0 +40218d0f: 000c movi.n a0, 0 +40218d11: 000e06 j 40218d4d +40218d14: 0212e6 bgei a2, 1, 40218d1a +40218d17: 006e46 j 40218ed4 +40218d1a: 64a032 movi a3, 100 +40218d1d: 11c2b0 slli a12, a2, 5 +40218d20: 0c2d mov.n a2, a12 +40218d22: a3bd01 l32r a0, 40201c18 +40218d25: 0000c0 callx0 a0 +40218d28: 020d mov.n a0, a2 +40218d2a: a30c movi.n a3, 10 +40218d2c: 0c2d mov.n a2, a12 +40218d2e: 01c080 slli a12, a0, 24 +40218d31: 31c8c0 srai a12, a12, 24 +40218d34: a3b901 l32r a0, 40201c18 +40218d37: 0000c0 callx0 a0 +40218d3a: a30c movi.n a3, 10 +40218d3c: d02401 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +40218d3f: 0000c0 callx0 a0 +40218d42: 0222a6 blti a2, 2, 40218d48 +40218d45: 007086 j 40218f0b +40218d48: 100c movi.n a0, 1 +40218d4a: ffffc6 j 40218d4d +40218d4d: 051ce6 bgei a12, 1, 40218d56 +40218d50: 214100 srai a4, a0, 1 +40218d53: 0001c6 j 40218d5e +40218d56: 2c0b addi.n a2, a12, -1 +40218d58: 401200 ssl a2 +40218d5b: a14000 sll a4, a0 +40218d5e: f53421 l32r a2, 40216230 +40218d61: 0020c0 memw +40218d64: b56242 s32i a4, a2, 0x2d4 +40218d67: 1ecc62 addi a6, a12, 30 +40218d6a: 050c movi.n a5, 0 +40218d6c: 401600 ssl a6 +40218d6f: a13000 sll a3, a0 +40218d72: b335c0 movgez a3, a5, a12 +40218d75: 0020c0 memw +40218d78: a76232 s32i a3, a2, 0x29c +40218d7b: 051ce6 bgei a12, 1, 40218d84 +40218d7e: 214100 srai a4, a0, 1 +40218d81: 0001c6 j 40218d8c +40218d84: 7c0b addi.n a7, a12, -1 +40218d86: 401700 ssl a7 +40218d89: a14000 sll a4, a0 +40218d8c: 0020c0 memw +40218d8f: 060c movi.n a6, 0 +40218d91: ec6242 s32i a4, a2, 0x3b0 +40218d94: 1ecca2 addi a10, a12, 30 +40218d97: 090c movi.n a9, 0 +40218d99: 401a00 ssl a10 +40218d9c: a18000 sll a8, a0 +40218d9f: b389c0 movgez a8, a9, a12 +40218da2: 0020c0 memw +40218da5: a16282 s32i a8, a2, 0x284 +40218da8: 141026 beqi a0, 1, 40218dc0 +40218dab: 042066 bnei a0, 2, 40218db3 +40218dae: 850c movi.n a5, 8 +40218db0: 000386 j 40218dc2 +40218db3: fdc032 addi a3, a0, -3 +40218db6: ab0c movi.n a11, 10 +40218db8: 065d mov.n a5, a6 +40218dba: 835b30 moveqz a5, a11, a3 +40218dbd: 000046 j 40218dc2 +40218dc0: 250c movi.n a5, 2 +40218dc2: 0dbca6 blti a12, 16, 40218dd3 +40218dc5: 046c movi.n a4, -32 +40218dc7: 904c40 addx2 a4, a12, a4 +40218dca: 401400 ssl a4 +40218dcd: a14500 sll a4, a5 +40218dd0: 000046 j 40218dd5 +40218dd3: 040c movi.n a4, 0 +40218dd5: 0020c0 memw +40218dd8: a36242 s32i a4, a2, 0x28c +40218ddb: 0b7c movi.n a11, -16 +40218ddd: 101ca6 blti a12, 1, 40218df1 +40218de0: 0dbce6 bgei a12, 16, 40218df1 +40218de3: e77c movi.n a7, -2 +40218de5: 907c70 addx2 a7, a12, a7 +40218de8: 401700 ssl a7 +40218deb: a17500 sll a7, a5 +40218dee: 0001c6 j 40218df9 +40218df1: 080c movi.n a8, 0 +40218df3: 217250 srai a7, a5, 2 +40218df6: 9378c0 movnez a7, a8, a12 +40218df9: 0020c0 memw +40218dfc: 1a6c movi.n a10, -31 +40218dfe: a26272 s32i a7, a2, 0x288 +40218e01: f22081 l32r a8, 40215684 +40218e04: 10abc7 bge a11, a12, 40218e18 +40218e07: 00dcd6 bgez a12, 40218e18 +40218e0a: e91c movi.n a9, 30 +40218e0c: 909c90 addx2 a9, a12, a9 +40218e0f: 401900 ssl a9 +40218e12: a17500 sll a7, a5 +40218e15: 000046 j 40218e1a +40218e18: 070c movi.n a7, 0 +40218e1a: 197c movi.n a9, -15 +40218e1c: 0020c0 memw +40218e1f: c36872 s32i a7, a8, 0x30c +40218e22: 10aac7 bge a10, a12, 40218e36 +40218e25: 0dac97 bge a12, a9, 40218e36 +40218e28: c33c movi.n a3, 60 +40218e2a: 903c30 addx2 a3, a12, a3 +40218e2d: 401300 ssl a3 +40218e30: a14500 sll a4, a5 +40218e33: 000046 j 40218e38 +40218e36: 040c movi.n a4, 0 +40218e38: 0020c0 memw +40218e3b: c26842 s32i a4, a8, 0x308 +40218e3e: 141026 beqi a0, 1, 40218e56 +40218e41: 042066 bnei a0, 2, 40218e49 +40218e44: 400c movi.n a0, 4 +40218e46: 000386 j 40218e58 +40218e49: fdc052 addi a5, a0, -3 +40218e4c: 540c movi.n a4, 5 +40218e4e: 060d mov.n a0, a6 +40218e50: 830450 moveqz a0, a4, a5 +40218e53: 000046 j 40218e58 +40218e56: 100c movi.n a0, 1 +40218e58: 0dbca6 blti a12, 16, 40218e69 +40218e5b: 066c movi.n a6, -32 +40218e5d: 906c60 addx2 a6, a12, a6 +40218e60: 401600 ssl a6 +40218e63: a14000 sll a4, a0 +40218e66: 000046 j 40218e6b +40218e69: 040c movi.n a4, 0 +40218e6b: 0020c0 memw +40218e6e: ef6242 s32i a4, a2, 0x3bc +40218e71: 101ca6 blti a12, 1, 40218e85 +40218e74: 0dbce6 bgei a12, 16, 40218e85 +40218e77: e77c movi.n a7, -2 +40218e79: 907c70 addx2 a7, a12, a7 +40218e7c: 401700 ssl a7 +40218e7f: a15000 sll a5, a0 +40218e82: 0001c6 j 40218e8d +40218e85: 080c movi.n a8, 0 +40218e87: 215200 srai a5, a0, 2 +40218e8a: 9358c0 movnez a5, a8, a12 +40218e8d: 0020c0 memw +40218e90: ee6252 s32i a5, a2, 0x3b8 +40218e93: 10abc7 bge a11, a12, 40218ea7 +40218e96: 00dcd6 bgez a12, 40218ea7 +40218e99: eb1c movi.n a11, 30 +40218e9b: 90bcb0 addx2 a11, a12, a11 +40218e9e: 401b00 ssl a11 +40218ea1: a15000 sll a5, a0 +40218ea4: 000046 j 40218ea9 +40218ea7: 050c movi.n a5, 0 +40218ea9: 0020c0 memw +40218eac: eb6252 s32i a5, a2, 0x3ac +40218eaf: 10aac7 bge a10, a12, 40218ec3 +40218eb2: 0dac97 bge a12, a9, 40218ec3 +40218eb5: c33c movi.n a3, 60 +40218eb7: 903c30 addx2 a3, a12, a3 +40218eba: 401300 ssl a3 +40218ebd: a10000 sll a0, a0 +40218ec0: 000046 j 40218ec5 +40218ec3: 000c movi.n a0, 0 +40218ec5: 0020c0 memw +40218ec8: 11c8 l32i.n a12, a1, 4 +40218eca: ea6202 s32i a0, a2, 0x3a8 +40218ecd: 0108 l32i.n a0, a1, 0 +40218ecf: 10c112 addi a1, a1, 16 +40218ed2: f00d ret.n +40218ed4: e752d6 bgez a2, 40218d4d +40218ed7: 64a032 movi a3, 100 +40218eda: 11c2b0 slli a12, a2, 5 +40218edd: 0c2d mov.n a2, a12 +40218edf: a34e01 l32r a0, 40201c18 +40218ee2: 0000c0 callx0 a0 +40218ee5: 020d mov.n a0, a2 +40218ee7: a30c movi.n a3, 10 +40218ee9: 0c2d mov.n a2, a12 +40218eeb: c00b addi.n a12, a0, -1 +40218eed: 01cc80 slli a12, a12, 24 +40218ef0: 31c8c0 srai a12, a12, 24 +40218ef3: a34901 l32r a0, 40201c18 +40218ef6: 0000c0 callx0 a0 +40218ef9: a30c movi.n a3, 10 +40218efb: cfb401 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +40218efe: 0000c0 callx0 a0 +40218f01: 837c movi.n a3, -8 +40218f03: 11a237 bge a2, a3, 40218f18 +40218f06: 100c movi.n a0, 1 +40218f08: ff9046 j 40218d4d +40218f0b: 300c movi.n a0, 3 +40218f0d: 0282e6 bgei a2, 8, 40218f13 +40218f10: ff8e46 j 40218d4d +40218f13: 200c movi.n a0, 2 +40218f15: ff8d06 j 40218d4d +40218f18: 300c movi.n a0, 3 +40218f1a: e47c movi.n a4, -2 +40218f1c: 02a247 bge a2, a4, 40218f22 +40218f1f: ff8a86 j 40218d4d +40218f22: 200c movi.n a0, 2 +40218f24: ff8946 j 40218d4d + ... + +40218f28 : +40218f28: f0c112 addi a1, a1, -16 +40218f2b: 0109 s32i.n a0, a1, 0 +40218f2d: f1d301 l32r a0, 4021567c +40218f30: 22dc bnez.n a2, 40218f46 +40218f32: 041c movi.n a4, 16 +40218f34: 0020c0 memw +40218f37: e42032 l32i a3, a0, 0x390 +40218f3a: 203340 or a3, a3, a4 +40218f3d: 0020c0 memw +40218f40: e46032 s32i a3, a0, 0x390 +40218f43: 000406 j 40218f57 +40218f46: f66c movi.n a6, -17 +40218f48: 0020c0 memw +40218f4b: e42052 l32i a5, a0, 0x390 +40218f4e: 105560 and a5, a5, a6 +40218f51: 0020c0 memw +40218f54: e46052 s32i a5, a0, 0x390 +40218f57: f19541 l32r a4, 402155ac +40218f5a: 013280 slli a3, a2, 24 +40218f5d: 3c0422 l8ui a2, a4, 60 +40218f60: 313830 srai a3, a3, 24 +40218f63: 012280 slli a2, a2, 24 +40218f66: 312820 srai a2, a2, 24 +40218f69: ff8305 call0 4021879c +40218f6c: 0108 l32i.n a0, a1, 0 +40218f6e: 10c112 addi a1, a1, 16 +40218f71: f00d ret.n + ... + +40218f74 : +40218f74: f0c112 addi a1, a1, -16 +40218f77: 0161c2 s32i a12, a1, 4 +40218f7a: 006102 s32i a0, a1, 0 +40218f7d: 20c220 or a12, a2, a2 +40218f80: fc8985 call0 4021581c +40218f83: 0c2d mov.n a2, a12 +40218f85: 11c8 l32i.n a12, a1, 4 +40218f87: fffa05 call0 40218f28 +40218f8a: 0108 l32i.n a0, a1, 0 +40218f8c: 10c112 addi a1, a1, 16 +40218f8f: f00d ret.n +40218f91: 000000 ill +40218f94: ef .byte 0xef +40218f95: cf .byte 0xcf +40218f96: ff .byte 0xff +40218f97: ff .byte 0xff +40218f98: 002000 isync + ... + +40218f9c : +40218f9c: fffe51 l32r a5, 40218f94 +40218f9f: f1b941 l32r a4, 40215684 +40218fa2: 0020c0 memw +40218fa5: 812432 l32i a3, a4, 0x204 +40218fa8: 103350 and a3, a3, a5 +40218fab: 0020c0 memw +40218fae: 816432 s32i a3, a4, 0x204 +40218fb1: 121266 bnei a2, 1, 40218fc7 +40218fb4: 071c movi.n a7, 16 +40218fb6: 0020c0 memw +40218fb9: 812462 l32i a6, a4, 0x204 +40218fbc: 206670 or a6, a6, a7 +40218fbf: 0020c0 memw +40218fc2: 816462 s32i a6, a4, 0x204 +40218fc5: f00d ret.n +40218fc7: 132266 bnei a2, 2, 40218fde +40218fca: abf591 l32r a9, 40203fa0 +40218fcd: 0020c0 memw +40218fd0: 812482 l32i a8, a4, 0x204 +40218fd3: 208890 or a8, a8, a9 +40218fd6: 0020c0 memw +40218fd9: 816482 s32i a8, a4, 0x204 +40218fdc: f00d ret.n +40218fde: 113266 bnei a2, 3, 40218ff3 +40218fe1: ffedb1 l32r a11, 40218f98 +40218fe4: 0020c0 memw +40218fe7: 8124a2 l32i a10, a4, 0x204 +40218fea: 20aab0 or a10, a10, a11 +40218fed: 0020c0 memw +40218ff0: 8164a2 s32i a10, a4, 0x204 +40218ff3: f00d ret.n +40218ff5: 000000 ill +40218ff8: 001400 excw +40218ffb: ffff00 excw +40218ffe: 7f .byte 0x7f +40218fff: bc8180 excw +40219002: 980914 excw +40219005: 5ac641 l32r a4, 401efb20 <_lit4_end+0xe97f4> +40219008: ff .byte 0xff +40219009: ff .byte 0xff +4021900a: ff .byte 0xff +4021900b: 7f .byte 0x7f +4021900c: ff .byte 0xff +4021900d: ff .byte 0xff +4021900e: 00fc00 excw +40219011: 019000 slli a9, a0, 32 +40219014: ff .byte 0xff +40219015: ff .byte 0xff +40219016: ff .byte 0xff +40219017: 00fb addi.n a0, a0, 15 +40219019: 180000 excw +4021901c: ff .byte 0xff +4021901d: ff .byte 0xff +4021901e: ff .byte 0xff +4021901f: 0fff80 excw +40219022: 00fff0 excw +40219025: 000220 excw +40219028: 000fa6 blti a15, -1, 4021902c +4021902b: 000000 ill +4021902e: 54ffc0 extui a15, a12, 15, 6 +40219031: 3858 l32i.n a5, a8, 12 +40219033: ff0000 excw +40219036: 0f .byte 0xf +40219037: 00e6f0 excw +4021903a: 3f0b20 excw +4021903d: dffff0 excw +40219040: 000c40 excw +40219043: ffff20 excw +40219046: 00ff80 excw +40219049: 001300 excw +4021904c: 3f .byte 0x3f +4021904d: fffff0 excw +40219050: 000d80 ret +40219053: 000000 ill +40219056: 24fc00 extui a15, a0, 12, 3 +40219059: 03fe01 l32r a0, 401da054 <_lit4_end+0xd3d28> +4021905c: 000000 ill +4021905f: 0000b0 excw +40219062: ff0400 excw +40219065: ff .byte 0xff +40219066: ff0b addi.n a15, a15, -1 +40219068: 240000 extui a0, a0, 0, 3 +4021906b: 008300 excw +4021906e: ff0080 excw +40219071: fffff7 bbsi a15, 31, 40219074 +40219074: fe8470 excw +40219077: 3f .byte 0x3f + +40219078 : +40219078: 80af62 movi a6, -128 +4021907b: f8e831 l32r a3, 4021741c +4021907e: f56681 l32r a8, 40216618 +40219081: ffdd21 l32r a2, 40218ff8 +40219084: c0c112 addi a1, a1, -64 +40219087: c109 s32i.n a0, a1, 48 +40219089: e1d9 s32i.n a13, a1, 56 +4021908b: d1c9 s32i.n a12, a1, 52 +4021908d: f1e9 s32i.n a14, a1, 60 +4021908f: f147c1 l32r a12, 402155ac +40219092: f467e1 l32r a14, 40216230 +40219095: f17bd1 l32r a13, 40215684 +40219098: 0020c0 memw +4021909b: 582db2 l32i a11, a13, 0x160 +4021909e: 20bb20 or a11, a11, a2 +402190a1: 0020c0 memw +402190a4: 586db2 s32i a11, a13, 0x160 +402190a7: 0020c0 memw +402190aa: 432da2 l32i a10, a13, 0x10c +402190ad: 20aa80 or a10, a10, a8 +402190b0: 0020c0 memw +402190b3: 436da2 s32i a10, a13, 0x10c +402190b6: ffd191 l32r a9, 40218ffc +402190b9: 0020c0 memw +402190bc: d02d72 l32i a7, a13, 0x340 +402190bf: 107790 and a7, a7, a9 +402190c2: 207780 or a7, a7, a8 +402190c5: 0020c0 memw +402190c8: d06d72 s32i a7, a13, 0x340 +402190cb: ffcd51 l32r a5, 40219000 +402190ce: 0020c0 memw +402190d1: 5b6d52 s32i a5, a13, 0x16c +402190d4: ffcc41 l32r a4, 40219004 +402190d7: 0020c0 memw +402190da: 5a6d42 s32i a4, a13, 0x168 +402190dd: ffca21 l32r a2, 40219008 +402190e0: 0020c0 memw +402190e3: 542db2 l32i a11, a13, 0x150 +402190e6: 10bb20 and a11, a11, a2 +402190e9: 0020c0 memw +402190ec: 546db2 s32i a11, a13, 0x150 +402190ef: 0020c0 memw +402190f2: 90a192 movi a9, 0x190 +402190f5: c62da2 l32i a10, a13, 0x318 +402190f8: 0020c0 memw +402190fb: c66d92 s32i a9, a13, 0x318 +402190fe: ffc471 l32r a7, 40219010 +40219101: ffc281 l32r a8, 4021900c +40219104: 0020c0 memw +40219107: bb2e52 l32i a5, a14, 0x2ec +4021910a: 105580 and a5, a5, a8 +4021910d: 205570 or a5, a5, a7 +40219110: 0020c0 memw +40219113: bb6e52 s32i a5, a14, 0x2ec +40219116: ffbf41 l32r a4, 40219014 +40219119: 0020c0 memw +4021911c: e22e22 l32i a2, a14, 0x388 +4021911f: 102240 and a2, a2, a4 +40219122: 0020c0 memw +40219125: e26e22 s32i a2, a14, 0x388 +40219128: 0003b2 l8ui a11, a3, 0 +4021912b: f1cbb2 addi a11, a11, -15 +4021912e: 0020c0 memw +40219131: 522da2 l32i a10, a13, 0x148 +40219134: 10aa60 and a10, a10, a6 +40219137: 20aab0 or a10, a10, a11 +4021913a: 0020c0 memw +4021913d: 526da2 s32i a10, a13, 0x148 +40219140: ffb681 l32r a8, 40219018 +40219143: dc4f91 l32r a9, 40210280 +40219146: 0020c0 memw +40219149: 4a2d72 l32i a7, a13, 0x128 +4021914c: 107790 and a7, a7, a9 +4021914f: 207780 or a7, a7, a8 +40219152: 0020c0 memw +40219155: 4a6d72 s32i a7, a13, 0x128 +40219158: ffb151 l32r a5, 4021901c +4021915b: 0020c0 memw +4021915e: dd48 l32i.n a4, a13, 52 +40219160: 104450 and a4, a4, a5 +40219163: 0020c0 memw +40219166: dd49 s32i.n a4, a13, 52 +40219168: bc0c22 l8ui a2, a12, 188 +4021916b: e42c movi.n a4, 46 +4021916d: 146207 bbci a2, 0, 40219185 +40219170: 0020c0 memw +40219173: 512d32 l32i a3, a13, 0x144 +40219176: 103360 and a3, a3, a6 +40219179: 203340 or a3, a3, a4 +4021917c: 0020c0 memw +4021917f: 516d32 s32i a3, a13, 0x144 +40219182: 0004c6 j 40219199 +40219185: 652c movi.n a5, 38 +40219187: 0020c0 memw +4021918a: 512d42 l32i a4, a13, 0x144 +4021918d: 104460 and a4, a4, a6 +40219190: 204450 or a4, a4, a5 +40219193: 0020c0 memw +40219196: 516d42 s32i a4, a13, 0x144 +40219199: c0af72 movi a7, -64 +4021919c: 161c movi.n a6, 17 +4021919e: f13681 l32r a8, 40215678 +402191a1: 0020c0 memw +402191a4: dc2d52 l32i a5, a13, 0x370 +402191a7: 105570 and a5, a5, a7 +402191aa: 205560 or a5, a5, a6 +402191ad: 0020c0 memw +402191b0: dc6d52 s32i a5, a13, 0x370 +402191b3: fdf741 l32r a4, 40218990 +402191b6: 0020c0 memw +402191b9: a82e32 l32i a3, a14, 0x2a0 +402191bc: 203340 or a3, a3, a4 +402191bf: 0020c0 memw +402191c2: a86e32 s32i a3, a14, 0x2a0 +402191c5: ff9621 l32r a2, 40219020 +402191c8: ff9701 l32r a0, 40219024 +402191cb: 0020c0 memw +402191ce: 592db2 l32i a11, a13, 0x164 +402191d1: 10bb20 and a11, a11, a2 +402191d4: 20bb00 or a11, a11, a0 +402191d7: 0020c0 memw +402191da: 596db2 s32i a11, a13, 0x164 +402191dd: fc47a1 l32r a10, 402182fc +402191e0: ff9291 l32r a9, 40219028 +402191e3: 0020c0 memw +402191e6: 592d72 l32i a7, a13, 0x164 +402191e9: 1077a0 and a7, a7, a10 +402191ec: 207790 or a7, a7, a9 +402191ef: 0020c0 memw +402191f2: 596d72 s32i a7, a13, 0x164 +402191f5: ff8d61 l32r a6, 4021902c +402191f8: ff8e51 l32r a5, 40219030 +402191fb: 0020c0 memw +402191fe: 572d42 l32i a4, a13, 0x15c +40219201: 104460 and a4, a4, a6 +40219204: 204450 or a4, a4, a5 +40219207: 0020c0 memw +4021920a: 576d42 s32i a4, a13, 0x15c +4021920d: ff8931 l32r a3, 40219034 +40219210: ff8a21 l32r a2, 40219038 +40219213: 0020c0 memw +40219216: 542d02 l32i a0, a13, 0x150 +40219219: 100030 and a0, a0, a3 +4021921c: 200020 or a0, a0, a2 +4021921f: 0020c0 memw +40219222: 546d02 s32i a0, a13, 0x150 +40219225: 0020c0 memw +40219228: 80a0a2 movi a10, 128 +4021922b: c62db2 l32i a11, a13, 0x318 +4021922e: 0020c0 memw +40219231: c66da2 s32i a10, a13, 0x318 +40219234: 490c movi.n a9, 4 +40219236: 0020c0 memw +40219239: c42d72 l32i a7, a13, 0x310 +4021923c: 207790 or a7, a7, a9 +4021923f: 0020c0 memw +40219242: c46d72 s32i a7, a13, 0x310 +40219245: ff7d61 l32r a6, 4021903c +40219248: ff7e51 l32r a5, 40219040 +4021924b: 0020c0 memw +4021924e: dc2d42 l32i a4, a13, 0x370 +40219251: 104460 and a4, a4, a6 +40219254: 204450 or a4, a4, a5 +40219257: 0020c0 memw +4021925a: dc6d42 s32i a4, a13, 0x370 +4021925d: ff7931 l32r a3, 40219044 +40219260: ff7a21 l32r a2, 40219048 +40219263: 0020c0 memw +40219266: c92d02 l32i a0, a13, 0x324 +40219269: 100030 and a0, a0, a3 +4021926c: 200020 or a0, a0, a2 +4021926f: 0020c0 memw +40219272: c96d02 s32i a0, a13, 0x324 +40219275: ff75b1 l32r a11, 4021904c +40219278: ff76a1 l32r a10, 40219050 +4021927b: 0020c0 memw +4021927e: 562d92 l32i a9, a13, 0x158 +40219281: 1099b0 and a9, a9, a11 +40219284: 2099a0 or a9, a9, a10 +40219287: 0020c0 memw +4021928a: 566d92 s32i a9, a13, 0x158 +4021928d: ff7171 l32r a7, 40219054 +40219290: ff7261 l32r a6, 40219058 +40219293: 0020c0 memw +40219296: d32d52 l32i a5, a13, 0x34c +40219299: 105570 and a5, a5, a7 +4021929c: 205560 or a5, a5, a6 +4021929f: 0020c0 memw +402192a2: d36d52 s32i a5, a13, 0x34c +402192a5: dbf341 l32r a4, 40210274 +402192a8: ff6d31 l32r a3, 4021905c +402192ab: 0020c0 memw +402192ae: c82d22 l32i a2, a13, 0x320 +402192b1: 102240 and a2, a2, a4 +402192b4: 202230 or a2, a2, a3 +402192b7: 0020c0 memw +402192ba: c86d22 s32i a2, a13, 0x320 +402192bd: ff6801 l32r a0, 40219060 +402192c0: 0020c0 memw +402192c3: e22eb2 l32i a11, a14, 0x388 +402192c6: 20bb00 or a11, a11, a0 +402192c9: 0020c0 memw +402192cc: e26eb2 s32i a11, a14, 0x388 +402192cf: ff65a1 l32r a10, 40219064 +402192d2: ff6591 l32r a9, 40219068 +402192d5: 0020c0 memw +402192d8: 9c2872 l32i a7, a8, 0x270 +402192db: 1077a0 and a7, a7, a10 +402192de: 207790 or a7, a7, a9 +402192e1: 0020c0 memw +402192e4: 9c6872 s32i a7, a8, 0x270 +402192e7: a22e61 l32r a6, 40201ba0 +402192ea: 0020c0 memw +402192ed: d12d52 l32i a5, a13, 0x344 +402192f0: 105560 and a5, a5, a6 +402192f3: 0020c0 memw +402192f6: d16d52 s32i a5, a13, 0x344 +402192f9: c60c22 l8ui a2, a12, 198 +402192fc: ffc285 call0 40218f28 +402192ff: 0c08 l32i.n a0, a12, 0 +40219301: 3008 l32i.n a0, a0, 12 +40219303: 020c movi.n a2, 0 +40219305: 0000c0 callx0 a0 +40219308: cfafa2 movi a10, -49 +4021930b: 092c movi.n a9, 32 +4021930d: f0db31 l32r a3, 4021567c +40219310: f3c761 l32r a6, 4021622c +40219313: dd2301 l32r a0, 402107a0 +40219316: 0020c0 memw +40219319: 8e2e82 l32i a8, a14, 0x238 +4021931c: 1088a0 and a8, a8, a10 +4021931f: 208890 or a8, a8, a9 +40219322: 0020c0 memw +40219325: 8e6e82 s32i a8, a14, 0x238 +40219328: 0020c0 memw +4021932b: ff5051 l32r a5, 4021906c +4021932e: 922d72 l32i a7, a13, 0x248 +40219331: 0020c0 memw +40219334: 926d52 s32i a5, a13, 0x248 +40219337: 640c movi.n a4, 6 +40219339: 0020c0 memw +4021933c: 932d22 l32i a2, a13, 0x24c +4021933f: 202240 or a2, a2, a4 +40219342: 0020c0 memw +40219345: 936d22 s32i a2, a13, 0x24c +40219348: 0020c0 memw +4021934b: c76d02 s32i a0, a13, 0x31c +4021934e: 0020c0 memw +40219351: c72db2 l32i a11, a13, 0x31c +40219354: 20bb00 or a11, a11, a0 +40219357: 0020c0 memw +4021935a: c76db2 s32i a11, a13, 0x31c +4021935d: ff44a1 l32r a10, 40219070 +40219360: 0020c0 memw +40219363: ad98 l32i.n a9, a13, 40 +40219365: 1099a0 and a9, a9, a10 +40219368: 0020c0 memw +4021936b: ad99 s32i.n a9, a13, 40 +4021936d: 987c movi.n a8, -7 +4021936f: 270c movi.n a7, 2 +40219371: 0020c0 memw +40219374: 892652 l32i a5, a6, 0x224 +40219377: 105580 and a5, a5, a8 +4021937a: 205570 or a5, a5, a7 +4021937d: 0020c0 memw +40219380: 896652 s32i a5, a6, 0x224 +40219383: e47c movi.n a4, -2 +40219385: 0020c0 memw +40219388: f02322 l32i a2, a3, 0x3c0 +4021938b: 102240 and a2, a2, a4 +4021938e: 0020c0 memw +40219391: 0c08 l32i.n a0, a12, 0 +40219393: 282002 l32i a0, a0, 160 +40219396: f06322 s32i a2, a3, 0x3c0 +40219399: 0000c0 callx0 a0 +4021939c: f820d1 l32r a13, 4021741c +4021939f: 120c movi.n a2, 1 +402193a1: 0c08 l32i.n a0, a12, 0 +402193a3: 130c movi.n a3, 1 +402193a5: 2b2002 l32i a0, a0, 172 +402193a8: c40c movi.n a4, 12 +402193aa: 0000c0 callx0 a0 +402193ad: 080c22 l8ui a2, a12, 8 +402193b0: b29c beqz.n a2, 402193cf +402193b2: 220c movi.n a2, 2 +402193b4: 0c08 l32i.n a0, a12, 0 +402193b6: 130c movi.n a3, 1 +402193b8: 2b2002 l32i a0, a0, 172 +402193bb: 84a142 movi a4, 0x184 +402193be: 0000c0 callx0 a0 +402193c1: 320c movi.n a2, 3 +402193c3: 0c08 l32i.n a0, a12, 0 +402193c5: 230c movi.n a3, 2 +402193c7: 2b2002 l32i a0, a0, 172 +402193ca: 640c movi.n a4, 6 +402193cc: 0000c0 callx0 a0 +402193cf: 0c08 l32i.n a0, a12, 0 +402193d1: 2f2002 l32i a0, a0, 188 +402193d4: 0000c0 callx0 a0 +402193d7: 080c22 l8ui a2, a12, 8 +402193da: f29c beqz.n a2, 402193fd +402193dc: 10c122 addi a2, a1, 16 +402193df: ff2531 l32r a3, 40219074 +402193e2: 042c movi.n a4, 32 +402193e4: bd1a01 l32r a0, 4020884c +402193e7: 0000c0 callx0 a0 +402193ea: 322c22 l32i a2, a12, 200 +402193ed: 7fa032 movi a3, 127 +402193f0: 10c142 addi a4, a1, 16 +402193f3: 332c52 l32i a5, a12, 204 +402193f6: 061c movi.n a6, 16 +402193f8: 070c movi.n a7, 0 +402193fa: fe0245 call0 40217420 +402193fd: 120c movi.n a2, 1 +402193ff: 080c movi.n a8, 0 +40219401: 000d62 l8ui a6, a13, 0 +40219404: 322c72 l32i a7, a12, 200 +40219407: f1f331 l32r a3, 40215bd4 +4021940a: 01d742 addmi a4, a7, 0x100 +4021940d: 16c352 addi a5, a3, 22 +40219410: 661b addi.n a6, a6, 1 +40219412: 0189 s32i.n a8, a1, 0 +40219414: 1189 s32i.n a8, a1, 4 +40219416: 2189 s32i.n a8, a1, 8 +40219418: 746060 extui a6, a6, 0, 8 +4021941b: fe1d85 call0 402175f4 +4021941e: 1d0c movi.n a13, 1 +40219420: 0c78 l32i.n a7, a12, 0 +40219422: bc0c92 l8ui a9, a12, 188 +40219425: 262772 l32i a7, a7, 152 +40219428: 246907 bbci a9, 0, 40219450 +4021942b: 77a022 movi a2, 119 +4021942e: 030c movi.n a3, 0 +40219430: 241c movi.n a4, 18 +40219432: d8a052 movi a5, 216 +40219435: 0007c0 callx0 a7 +40219438: 77a022 movi a2, 119 +4021943b: 030c movi.n a3, 0 +4021943d: 841c movi.n a4, 24 +4021943f: 150c movi.n a5, 1 +40219441: 0c08 l32i.n a0, a12, 0 +40219443: 160c movi.n a6, 1 +40219445: 272002 l32i a0, a0, 156 +40219448: 170c movi.n a7, 1 +4021944a: 0000c0 callx0 a0 +4021944d: 000306 j 4021945d +40219450: 77a022 movi a2, 119 +40219453: 030c movi.n a3, 0 +40219455: 241c movi.n a4, 18 +40219457: e8a052 movi a5, 232 +4021945a: 0007c0 callx0 a7 +4021945d: 0020c0 memw +40219460: 982e22 l32i a2, a14, 0x260 +40219463: 2022d0 or a2, a2, a13 +40219466: 0020c0 memw +40219469: d1c8 l32i.n a12, a1, 52 +4021946b: 986e22 s32i a2, a14, 0x260 +4021946e: e1d8 l32i.n a13, a1, 56 +40219470: 220c movi.n a2, 2 +40219472: f1e8 l32i.n a14, a1, 60 +40219474: ffb245 call0 40218f9c +40219477: c108 l32i.n a0, a1, 48 +40219479: 40c112 addi a1, a1, 64 +4021947c: f00d ret.n + ... + +40219480 : +40219480: f0c112 addi a1, a1, -16 +40219483: 006102 s32i a0, a1, 0 +40219486: 05ee45 call0 4021f36c +40219489: 64a022 movi a2, 100 +4021948c: af8401 l32r a0, 4020529c +4021948f: 0000c0 callx0 a0 +40219492: 002102 l32i a0, a1, 0 +40219495: 10c112 addi a1, a1, 16 +40219498: 000080 ret +4021949b: ffff00 excw +4021949e: 1f .byte 0x1f +4021949f: 0000f0 excw +402194a2: ff0180 excw +402194a5: ff .byte 0xff +402194a6: ff .byte 0xff +402194a7: 1f .byte 0x1f +402194a8: ff .byte 0xff +402194a9: 3f .byte 0x3f +402194aa: 00ffe0 excw +402194ad: 001f40 excw +402194b0: ff .byte 0xff +402194b1: ff .byte 0xff +402194b2: 00ff00 excw +402194b5: 00ab00 excw + +402194b8 : +402194b8: fff9b1 l32r a11, 4021949c +402194bb: fff9a1 l32r a10, 402194a0 +402194be: f06f31 l32r a3, 4021567c +402194c1: 0020c0 memw +402194c4: e62322 l32i a2, a3, 0x398 +402194c7: 1022b0 and a2, a2, a11 +402194ca: 2022a0 or a2, a2, a10 +402194cd: 0020c0 memw +402194d0: e66322 s32i a2, a3, 0x398 +402194d3: 0020c0 memw +402194d6: e72392 l32i a9, a3, 0x39c +402194d9: 1099b0 and a9, a9, a11 +402194dc: 2099a0 or a9, a9, a10 +402194df: 0020c0 memw +402194e2: e76392 s32i a9, a3, 0x39c +402194e5: ffef81 l32r a8, 402194a4 +402194e8: fd2a71 l32r a7, 40218990 +402194eb: 0020c0 memw +402194ee: e52362 l32i a6, a3, 0x394 +402194f1: 106680 and a6, a6, a8 +402194f4: 206670 or a6, a6, a7 +402194f7: 0020c0 memw +402194fa: e56362 s32i a6, a3, 0x394 +402194fd: ffea51 l32r a5, 402194a8 +40219500: ffeb41 l32r a4, 402194ac +40219503: 0020c0 memw +40219506: e62322 l32i a2, a3, 0x398 +40219509: 102250 and a2, a2, a5 +4021950c: 202240 or a2, a2, a4 +4021950f: 0020c0 memw +40219512: e66322 s32i a2, a3, 0x398 +40219515: ffe6b1 l32r a11, 402194b0 +40219518: ffe7a1 l32r a10, 402194b4 +4021951b: 0020c0 memw +4021951e: e82392 l32i a9, a3, 0x3a0 +40219521: 1099b0 and a9, a9, a11 +40219524: 2099a0 or a9, a9, a10 +40219527: 0020c0 memw +4021952a: e86392 s32i a9, a3, 0x3a0 +4021952d: ebaf81 l32r a8, 402143ec +40219530: 00a172 movi a7, 0x100 +40219533: 0020c0 memw +40219536: f22362 l32i a6, a3, 0x3c8 +40219539: 106680 and a6, a6, a8 +4021953c: 206670 or a6, a6, a7 +4021953f: 0020c0 memw +40219542: f26362 s32i a6, a3, 0x3c8 +40219545: 80af52 movi a5, -128 +40219548: 744c movi.n a4, 71 +4021954a: 0020c0 memw +4021954d: e62322 l32i a2, a3, 0x398 +40219550: 102250 and a2, a2, a5 +40219553: 202240 or a2, a2, a4 +40219556: 0020c0 memw +40219559: e66322 s32i a2, a3, 0x398 +4021955c: f00d ret.n +4021955e: 000000 ill +40219561: 010e00 slli a0, a14, 32 +40219564: 0d0000 excw +40219567: 000001 l32r a0, 401d9568 <_lit4_end+0xd323c> +4021956a: de .byte 0xde +4021956b: 000003 excw +4021956e: 03ed mov.n a14, a3 + +40219570 : +40219570: f0c112 addi a1, a1, -16 +40219573: f00e41 l32r a4, 402155ac +40219576: 0109 s32i.n a0, a1, 0 +40219578: 950402 l8ui a0, a4, 149 +4021957b: f41d31 l32r a3, 402165f0 +4021957e: 172066 bnei a0, 2, 40219599 +40219581: 94af62 movi a6, -108 +40219584: 69a052 movi a5, 105 +40219587: 0020c0 memw +4021958a: 682322 l32i a2, a3, 0x1a0 +4021958d: 102260 and a2, a2, a6 +40219590: 202250 or a2, a2, a5 +40219593: 0020c0 memw +40219596: 686322 s32i a2, a3, 0x1a0 +40219599: 072c movi.n a7, 32 +4021959b: 920402 l8ui a0, a4, 146 +4021959e: cfae62 movi a6, 0xfffffecf +402195a1: 261026 beqi a0, 1, 402195cb +402195a4: 233026 beqi a0, 3, 402195cb +402195a7: 204026 beqi a0, 4, 402195cb +402195aa: 1d5026 beqi a0, 5, 402195cb +402195ad: 940402 l8ui a0, a4, 148 +402195b0: fdc082 addi a8, a0, -3 +402195b3: 0c2856 bnez a8, 40219679 +402195b6: 0020c0 memw +402195b9: 8d2392 l32i a9, a3, 0x234 +402195bc: 109960 and a9, a9, a6 +402195bf: 209970 or a9, a9, a7 +402195c2: 0020c0 memw +402195c5: 8d6392 s32i a9, a3, 0x234 +402195c8: 002986 j 40219672 +402195cb: f02c51 l32r a5, 4021567c +402195ce: 080c movi.n a8, 0 +402195d0: a00b addi.n a10, a0, -1 +402195d2: 102a16 beqz a10, 402196d8 +402195d5: fcc0b2 addi a11, a0, -4 +402195d8: 0fcb16 beqz a11, 402196d8 +402195db: fdc022 addi a2, a0, -3 +402195de: 158216 beqz a2, 4021973a +402195e1: fbc092 addi a9, a0, -5 +402195e4: 152916 beqz a9, 4021973a +402195e7: 0fae02 movi a0, 0xfffffe0f +402195ea: 053c movi.n a5, 48 +402195ec: 0020c0 memw +402195ef: 822322 l32i a2, a3, 0x208 +402195f2: 102200 and a2, a2, a0 +402195f5: 202250 or a2, a2, a5 +402195f8: 0020c0 memw +402195fb: 826322 s32i a2, a3, 0x208 +402195fe: 0020c0 memw +40219601: 8323b2 l32i a11, a3, 0x20c +40219604: 10bb00 and a11, a11, a0 +40219607: 20bb50 or a11, a11, a5 +4021960a: 0020c0 memw +4021960d: 8363b2 s32i a11, a3, 0x20c +40219610: 9304a2 l8ui a10, a4, 147 +40219613: 262ab6 bltui a10, 2, 4021963d +40219616: 0020c0 memw +40219619: 852382 l32i a8, a3, 0x214 +4021961c: 108860 and a8, a8, a6 +4021961f: 208870 or a8, a8, a7 +40219622: 0020c0 memw +40219625: 856382 s32i a8, a3, 0x214 +40219628: 0020c0 memw +4021962b: 8d2352 l32i a5, a3, 0x234 +4021962e: 105560 and a5, a5, a6 +40219631: 205570 or a5, a5, a7 +40219634: 0020c0 memw +40219637: 8d6352 s32i a5, a3, 0x234 +4021963a: 000806 j 4021965e +4021963d: 0020c0 memw +40219640: 8523a2 l32i a10, a3, 0x214 +40219643: 10aa60 and a10, a10, a6 +40219646: 20aa50 or a10, a10, a5 +40219649: 0020c0 memw +4021964c: 8563a2 s32i a10, a3, 0x214 +4021964f: 0020c0 memw +40219652: 8d2392 l32i a9, a3, 0x234 +40219655: 109960 and a9, a9, a6 +40219658: 0020c0 memw +4021965b: 8d6392 s32i a9, a3, 0x234 +4021965e: 920402 l8ui a0, a4, 146 +40219661: b00b addi.n a11, a0, -1 +40219663: 08cb16 beqz a11, 402196f3 +40219666: fdc022 addi a2, a0, -3 +40219669: 086216 beqz a2, 402196f3 +4021966c: 214026 beqi a0, 4, 40219691 +4021966f: 1e5026 beqi a0, 5, 40219691 +40219672: 0108 l32i.n a0, a1, 0 +40219674: 10c112 addi a1, a1, 16 +40219677: f00d ret.n +40219679: f52066 bnei a0, 2, 40219672 +4021967c: 0020c0 memw +4021967f: 852342 l32i a4, a3, 0x214 +40219682: 104460 and a4, a4, a6 +40219685: 204470 or a4, a4, a7 +40219688: 0020c0 memw +4021968b: 856342 s32i a4, a3, 0x214 +4021968e: fff806 j 40219672 +40219691: 930402 l8ui a0, a4, 147 +40219694: 1e1066 bnei a0, 1, 402196b6 +40219697: 020c movi.n a2, 0 +40219699: 130c movi.n a3, 1 +4021969b: 140c movi.n a4, 1 +4021969d: 050c movi.n a5, 0 +4021969f: afa601 l32r a0, 40205538 +402196a2: 0000c0 callx0 a0 +402196a5: 820c movi.n a2, 8 +402196a7: 030c movi.n a3, 0 +402196a9: 840c movi.n a4, 8 +402196ab: 050c movi.n a5, 0 +402196ad: afa201 l32r a0, 40205538 +402196b0: 0000c0 callx0 a0 +402196b3: ffeec6 j 40219672 +402196b6: fb8056 bnez a0, 40219672 +402196b9: 120c movi.n a2, 1 +402196bb: 030c movi.n a3, 0 +402196bd: 140c movi.n a4, 1 +402196bf: 050c movi.n a5, 0 +402196c1: af9d01 l32r a0, 40205538 +402196c4: 0000c0 callx0 a0 +402196c7: 020c movi.n a2, 0 +402196c9: 830c movi.n a3, 8 +402196cb: 840c movi.n a4, 8 +402196cd: 050c movi.n a5, 0 +402196cf: af9a01 l32r a0, 40205538 +402196d2: 0000c0 callx0 a0 +402196d5: ffe646 j 40219672 +402196d8: 930402 l8ui a0, a4, 147 +402196db: 023066 bnei a0, 3, 402196e1 +402196de: 002086 j 40219764 +402196e1: 7f5026 beqi a0, 5, 40219764 +402196e4: 6a20b6 bltui a0, 2, 40219752 +402196e7: ff9e81 l32r a8, 40219560 +402196ea: 0020c0 memw +402196ed: 406582 s32i a8, a5, 0x100 +402196f0: ffbcc6 j 402195e7 +402196f3: 930402 l8ui a0, a4, 147 +402196f6: 1e1066 bnei a0, 1, 40219718 +402196f9: 120c movi.n a2, 1 +402196fb: 030c movi.n a3, 0 +402196fd: 140c movi.n a4, 1 +402196ff: 050c movi.n a5, 0 +40219701: af8d01 l32r a0, 40205538 +40219704: 0000c0 callx0 a0 +40219707: 020c movi.n a2, 0 +40219709: 830c movi.n a3, 8 +4021970b: 840c movi.n a4, 8 +4021970d: 050c movi.n a5, 0 +4021970f: af8a01 l32r a0, 40205538 +40219712: 0000c0 callx0 a0 +40219715: ffd646 j 40219672 +40219718: f56056 bnez a0, 40219672 +4021971b: 020c movi.n a2, 0 +4021971d: 130c movi.n a3, 1 +4021971f: 140c movi.n a4, 1 +40219721: 050c movi.n a5, 0 +40219723: af8501 l32r a0, 40205538 +40219726: 0000c0 callx0 a0 +40219729: 820c movi.n a2, 8 +4021972b: 030c movi.n a3, 0 +4021972d: 840c movi.n a4, 8 +4021972f: 050c movi.n a5, 0 +40219731: af8101 l32r a0, 40205538 +40219734: 0000c0 callx0 a0 +40219737: ffcdc6 j 40219672 +4021973a: 930402 l8ui a0, a4, 147 +4021973d: 2f3026 beqi a0, 3, 40219770 +40219740: 2c5026 beqi a0, 5, 40219770 +40219743: 1420b6 bltui a0, 2, 4021975b +40219746: ff8791 l32r a9, 40219564 +40219749: 0020c0 memw +4021974c: 406592 s32i a9, a5, 0x100 +4021974f: ffa506 j 402195e7 +40219752: 0020c0 memw +40219755: 406582 s32i a8, a5, 0x100 +40219758: ffa2c6 j 402195e7 +4021975b: 0020c0 memw +4021975e: 406582 s32i a8, a5, 0x100 +40219761: ffa086 j 402195e7 +40219764: ff81a1 l32r a10, 40219568 +40219767: 0020c0 memw +4021976a: 4065a2 s32i a10, a5, 0x100 +4021976d: ff9d86 j 402195e7 +40219770: ff7fb1 l32r a11, 4021956c +40219773: 0020c0 memw +40219776: 4065b2 s32i a11, a5, 0x100 +40219779: ff9a86 j 402195e7 +4021977c: e03f80 subx4 a3, a15, a8 +4021977f: 0f .byte 0xf +40219780: ff .byte 0xff +40219781: ff .byte 0xff +40219782: cf .byte 0xcf +40219783: ff .byte 0xff + +40219784 : +40219784: f0c112 addi a1, a1, -16 +40219787: 0109 s32i.n a0, a1, 0 +40219789: ef8801 l32r a0, 402155ac +4021978c: c40022 l8ui a2, a0, 196 +4021978f: 083256 bnez a2, 40219816 +40219792: 66a022 movi a2, 102 +40219795: 0008 l32i.n a0, a0, 0 +40219797: 330c movi.n a3, 3 +40219799: 242002 l32i a0, a0, 144 +4021979c: 140c movi.n a4, 1 +4021979e: 0000c0 callx0 a0 +402197a1: ef8231 l32r a3, 402155ac +402197a4: 346322 s32i a2, a3, 208 +402197a7: efb521 l32r a2, 4021567c +402197aa: 0020c0 memw +402197ad: e52252 l32i a5, a2, 0x394 +402197b0: 356352 s32i a5, a3, 212 +402197b3: 0020c0 memw +402197b6: e62242 l32i a4, a2, 0x398 +402197b9: 366342 s32i a4, a3, 216 +402197bc: 0020c0 memw +402197bf: 140c movi.n a4, 1 +402197c1: 550c movi.n a5, 5 +402197c3: 060c movi.n a6, 0 +402197c5: c73c movi.n a7, 60 +402197c7: e72222 l32i a2, a2, 0x39c +402197ca: 376322 s32i a2, a3, 220 +402197cd: 0308 l32i.n a0, a3, 0 +402197cf: 66a022 movi a2, 102 +402197d2: 272002 l32i a0, a0, 156 +402197d5: 330c movi.n a3, 3 +402197d7: 0000c0 callx0 a0 +402197da: ef7401 l32r a0, 402155ac +402197dd: ffe721 l32r a2, 4021977c +402197e0: 0020c0 memw +402197e3: efa671 l32r a7, 4021567c +402197e6: e727b2 l32i a11, a7, 0x39c +402197e9: 20bb20 or a11, a11, a2 +402197ec: 0020c0 memw +402197ef: e767b2 s32i a11, a7, 0x39c +402197f2: daa0a1 l32r a10, 40210274 +402197f5: 0020c0 memw +402197f8: e62792 l32i a9, a7, 0x398 +402197fb: 2099a0 or a9, a9, a10 +402197fe: 0020c0 memw +40219801: e66792 s32i a9, a7, 0x398 +40219804: ffdf81 l32r a8, 40219780 +40219807: 0020c0 memw +4021980a: e52762 l32i a6, a7, 0x394 +4021980d: 106680 and a6, a6, a8 +40219810: 0020c0 memw +40219813: e56762 s32i a6, a7, 0x394 +40219816: 130c movi.n a3, 1 +40219818: c44032 s8i a3, a0, 196 +4021981b: 0108 l32i.n a0, a1, 0 +4021981d: 10c112 addi a1, a1, 16 +40219820: f00d ret.n + ... + +40219824 : +40219824: f0c112 addi a1, a1, -16 +40219827: 0109 s32i.n a0, a1, 0 +40219829: ef6001 l32r a0, 402155ac +4021982c: c40022 l8ui a2, a0, 196 +4021982f: 341266 bnei a2, 1, 40219867 +40219832: 66a022 movi a2, 102 +40219835: 330c movi.n a3, 3 +40219837: 005d mov.n a5, a0 +40219839: 0508 l32i.n a0, a5, 0 +4021983b: 140c movi.n a4, 1 +4021983d: 262002 l32i a0, a0, 152 +40219840: d00552 l8ui a5, a5, 208 +40219843: 0000c0 callx0 a0 +40219846: ef5901 l32r a0, 402155ac +40219849: ef8c31 l32r a3, 4021567c +4021984c: 352052 l32i a5, a0, 212 +4021984f: 0020c0 memw +40219852: e56352 s32i a5, a3, 0x394 +40219855: 362042 l32i a4, a0, 216 +40219858: 0020c0 memw +4021985b: e66342 s32i a4, a3, 0x398 +4021985e: 372022 l32i a2, a0, 220 +40219861: 0020c0 memw +40219864: e76322 s32i a2, a3, 0x39c +40219867: 060c movi.n a6, 0 +40219869: c44062 s8i a6, a0, 196 +4021986c: 0108 l32i.n a0, a1, 0 +4021986e: 10c112 addi a1, a1, 16 +40219871: f00d ret.n + ... + +40219874 : +40219874: f0c112 addi a1, a1, -16 +40219877: 0109 s32i.n a0, a1, 0 +40219879: 051266 bnei a2, 1, 40219882 +4021987c: fff045 call0 40219784 +4021987f: 000086 j 40219885 +40219882: fffa05 call0 40219824 +40219885: 0108 l32i.n a0, a1, 0 +40219887: 10c112 addi a1, a1, 16 +4021988a: f00d ret.n +4021988c: 007800 waiti 8 + ... + +40219890 : +40219890: e0c112 addi a1, a1, -32 +40219893: 046102 s32i a0, a1, 16 +40219896: 51c9 s32i.n a12, a1, 20 +40219898: f26521 l32r a2, 4021622c +4021989b: ef44c1 l32r a12, 402155ac +4021989e: 0020c0 memw +402198a1: 972242 l32i a4, a2, 0x25c +402198a4: 0020c0 memw +402198a7: 962232 l32i a3, a2, 0x258 +402198aa: 0020c0 memw +402198ad: 404810 ssai 24 +402198b0: 130c movi.n a3, 1 +402198b2: 740c movi.n a4, 7 +402198b4: 155c movi.n a5, 81 +402198b6: 0c08 l32i.n a0, a12, 0 +402198b8: 972222 l32i a2, a2, 0x25c +402198bb: 262002 l32i a0, a0, 152 +402198be: 61a022 movi a2, 97 +402198c1: 0000c0 callx0 a0 +402198c4: ffbf05 call0 402194b8 +402198c7: 77a022 movi a2, 119 +402198ca: 030c movi.n a3, 0 +402198cc: 041c movi.n a4, 16 +402198ce: 050c movi.n a5, 0 +402198d0: 0c08 l32i.n a0, a12, 0 +402198d2: 060c movi.n a6, 0 +402198d4: 272002 l32i a0, a0, 156 +402198d7: 170c movi.n a7, 1 +402198d9: 0000c0 callx0 a0 +402198dc: 023005 call0 4021bbe0 +402198df: f0bd31 l32r a3, 40215bd4 +402198e2: 032d mov.n a2, a3 +402198e4: 334b addi.n a3, a3, 4 +402198e6: 016645 call0 4021af4c +402198e9: 3c48 l32i.n a4, a12, 12 +402198eb: 0ef467 bbsi a4, 22, 402198fd +402198ee: 020c movi.n a2, 0 +402198f0: fc2e45 call0 40215bd8 +402198f3: a09e71 l32r a7, 40201b6c +402198f6: 3c68 l32i.n a6, a12, 12 +402198f8: 206670 or a6, a6, a7 +402198fb: 3c69 s32i.n a6, a12, 12 +402198fd: fe1605 call0 40217a60 +40219900: ad0c82 l8ui a8, a12, 173 +40219903: 688c beqz.n a8, 4021990d +40219905: 020c movi.n a2, 0 +40219907: fe81c5 call0 40218124 +4021990a: 000106 j 40219912 +4021990d: 120c movi.n a2, 1 +4021990f: fe8145 call0 40218124 +40219912: 054c movi.n a5, 64 +40219914: 070c movi.n a7, 0 +40219916: 060c movi.n a6, 0 +40219918: 190c movi.n a9, 1 +4021991a: 0a0c movi.n a10, 0 +4021991c: f6c041 l32r a4, 4021741c +4021991f: f0ad21 l32r a2, 40215bd4 +40219922: 590c82 l8ui a8, a12, 89 +40219925: 14c232 addi a3, a2, 20 +40219928: 018880 slli a8, a8, 24 +4021992b: 011442 l16ui a4, a4, 2 +4021992e: 01a9 s32i.n a10, a1, 0 +40219930: 1199 s32i.n a9, a1, 4 +40219932: 318880 srai a8, a8, 24 +40219935: 1fc882 addi a8, a8, 31 +40219938: 018880 slli a8, a8, 24 +4021993b: 318880 srai a8, a8, 24 +4021993e: b36880 movgez a6, a8, a8 +40219941: 746060 extui a6, a6, 0, 8 +40219944: 020305 call0 4021b978 +40219947: 080c92 l8ui a9, a12, 8 +4021994a: 398c beqz.n a9, 40219951 +4021994c: 620c movi.n a2, 6 +4021994e: fcb245 call0 40216474 +40219951: ff7245 call0 40219078 +40219954: 220c movi.n a2, 2 +40219956: ef4801 l32r a0, 40215678 +40219959: 0020c0 memw +4021995c: 9c20b2 l32i a11, a0, 0x270 +4021995f: 20bb20 or a11, a11, a2 +40219962: 0020c0 memw +40219965: 120c movi.n a2, 1 +40219967: 730c movi.n a3, 7 +40219969: 540c movi.n a4, 5 +4021996b: ffc851 l32r a5, 4021988c +4021996e: 160c movi.n a6, 1 +40219970: 070c movi.n a7, 0 +40219972: 9c60b2 s32i a11, a0, 0x270 +40219975: f097a1 l32r a10, 40215bd4 +40219978: 01a9 s32i.n a10, a1, 0 +4021997a: feb545 call0 402184d0 +4021997d: 028845 call0 4021c204 +40219980: 3c38 l32i.n a3, a12, 12 +40219982: 0b73b7 bbci a3, 27, 40219991 +40219985: 3c0c22 l8ui a2, a12, 60 +40219988: 012280 slli a2, a2, 24 +4021998b: 312820 srai a2, a2, 24 +4021998e: fcc045 call0 40216594 +40219991: 00a745 call0 4021a408 +40219994: ad0c22 l8ui a2, a12, 173 +40219997: ae0c32 l8ui a3, a12, 174 +4021999a: af0c42 l8ui a4, a12, 175 +4021999d: fcec45 call0 40216864 +402199a0: a90c32 l8ui a3, a12, 169 +402199a3: 51c8 l32i.n a12, a1, 20 +402199a5: 0a1366 bnei a3, 1, 402199b3 +402199a8: 120c movi.n a2, 1 +402199aa: ffec85 call0 40219874 +402199ad: 0001c6 j 402199b8 +402199b0: 000000 ill +402199b3: 020c movi.n a2, 0 +402199b5: ffebc5 call0 40219874 +402199b8: 020c movi.n a2, 0 +402199ba: 4108 l32i.n a0, a1, 16 +402199bc: 20c112 addi a1, a1, 32 +402199bf: f00d ret.n +402199c1: 000000 ill + +402199c4 : +402199c4: eefa31 l32r a3, 402155ac +402199c7: 00a042 movi a4, 0 +402199ca: f0c112 addi a1, a1, -16 +402199cd: 202110 or a2, a1, a1 +402199d0: 016102 s32i a0, a1, 4 +402199d3: c24342 s8i a4, a3, 194 +402199d6: 0149 s32i.n a4, a1, 0 +402199d8: 10c332 addi a3, a3, 16 +402199db: 015705 call0 4021af4c +402199de: f07d21 l32r a2, 40215bd4 +402199e1: 040c movi.n a4, 0 +402199e3: 53c232 addi a3, a2, 83 +402199e6: fd5645 call0 40216f4c +402199e9: 024d mov.n a4, a2 +402199eb: fa6121 l32r a2, 40218370 +402199ee: 3249 s32i.n a4, a2, 12 +402199f0: 329b addi.n a3, a2, 9 +402199f2: fd5585 call0 40216f4c +402199f5: 1108 l32i.n a0, a1, 4 +402199f7: 10c112 addi a1, a1, 16 +402199fa: f00d ret.n + +402199fc : +402199fc: f0c112 addi a1, a1, -16 +402199ff: 2109 s32i.n a0, a1, 8 +40219a01: 0129 s32i.n a2, a1, 0 +40219a03: f20a21 l32r a2, 4021622c +40219a06: 0020c0 memw +40219a09: 852242 l32i a4, a2, 0x214 +40219a0c: 1149 s32i.n a4, a1, 4 +40219a0e: e37c movi.n a3, -2 +40219a10: 0020c0 memw +40219a13: 852202 l32i a0, a2, 0x214 +40219a16: 100030 and a0, a0, a3 +40219a19: 0020c0 memw +40219a1c: 856202 s32i a0, a2, 0x214 +40219a1f: 025c movi.n a2, 80 +40219a21: dc7a01 l32r a0, 40210c0c +40219a24: 0000c0 callx0 a0 +40219a27: 120c movi.n a2, 1 +40219a29: ae1c01 l32r a0, 4020529c +40219a2c: 0000c0 callx0 a0 +40219a2f: 880c movi.n a8, 8 +40219a31: 397c movi.n a9, -13 +40219a33: efc871 l32r a7, 40215954 +40219a36: 0020c0 memw +40219a39: d02762 l32i a6, a7, 0x340 +40219a3c: 106690 and a6, a6, a9 +40219a3f: 206680 or a6, a6, a8 +40219a42: 0020c0 memw +40219a45: 0158 l32i.n a5, a1, 0 +40219a47: d06762 s32i a6, a7, 0x340 +40219a4a: a58c beqz.n a5, 40219a58 +40219a4c: e8a322 movi a2, 0x3e8 +40219a4f: ae1301 l32r a0, 4020529c +40219a52: 0000c0 callx0 a0 +40219a55: 000206 j 40219a61 +40219a58: 64a022 movi a2, 100 +40219a5b: ae1001 l32r a0, 4020529c +40219a5e: 0000c0 callx0 a0 +40219a61: 400c movi.n a0, 4 +40219a63: 0020c0 memw +40219a66: efbbb1 l32r a11, 40215954 +40219a69: d02ba2 l32i a10, a11, 0x340 +40219a6c: 327c movi.n a2, -13 +40219a6e: 10aa20 and a10, a10, a2 +40219a71: 20aa00 or a10, a10, a0 +40219a74: 0020c0 memw +40219a77: d06ba2 s32i a10, a11, 0x340 +40219a7a: 120c movi.n a2, 1 +40219a7c: ae0801 l32r a0, 4020529c +40219a7f: 0000c0 callx0 a0 +40219a82: 0020c0 memw +40219a85: f1e941 l32r a4, 4021622c +40219a88: 1138 l32i.n a3, a1, 4 +40219a8a: 856432 s32i a3, a4, 0x214 +40219a8d: 086307 bbci a3, 0, 40219a99 +40219a90: a0a022 movi a2, 160 +40219a93: dc5e01 l32r a0, 40210c0c +40219a96: 0000c0 callx0 a0 +40219a99: 2108 l32i.n a0, a1, 8 +40219a9b: 10c112 addi a1, a1, 16 +40219a9e: f00d ret.n + +40219aa0 : +40219aa0: f0c112 addi a1, a1, -16 +40219aa3: 1109 s32i.n a0, a1, 4 +40219aa5: eec101 l32r a0, 402155ac +40219aa8: 060c movi.n a6, 0 +40219aaa: e00032 l8ui a3, a0, 224 +40219aad: b30052 l8ui a5, a0, 179 +40219ab0: 63cc bnez.n a3, 40219aba +40219ab2: 140c movi.n a4, 1 +40219ab4: e04042 s8i a4, a0, 224 +40219ab7: 000cc6 j 40219aee +40219aba: 0129 s32i.n a2, a1, 0 +40219abc: e04062 s8i a6, a0, 224 +40219abf: 2be517 bbsi a5, 1, 40219aee +40219ac2: 420c movi.n a2, 4 +40219ac4: f26b01 l32r a0, 40216470 +40219ac7: 0000c0 callx0 a0 +40219aca: eeb801 l32r a0, 402155ac +40219acd: e10072 l8ui a7, a0, 225 +40219ad0: 67cc bnez.n a7, 40219ada +40219ad2: 120c movi.n a2, 1 +40219ad4: fff245 call0 402199fc +40219ad7: eeb501 l32r a0, 402155ac +40219ada: 002122 l32i a2, a1, 0 +40219add: 00a082 movi a8, 0 +40219ae0: e14082 s8i a8, a0, 225 +40219ae3: ffee05 call0 402199c4 +40219ae6: 04a022 movi a2, 4 +40219ae9: 030c movi.n a3, 0 +40219aeb: 03d785 call0 4021d864 +40219aee: 1108 l32i.n a0, a1, 4 +40219af0: 10c112 addi a1, a1, 16 +40219af3: f00d ret.n +40219af5: 000000 ill +40219af8: 8b2c movi.n a11, 40 +40219afa: fe .byte 0xfe +40219afb: 3f .byte 0x3f +40219afc: 2e .byte 0x2e +40219afd: fe8b addi.n a15, a14, 8 +40219aff: 3f .byte 0x3f +40219b00: fe8b30 excw +40219b03: 3f .byte 0x3f + +40219b04 : +40219b04: 060c movi.n a6, 0 +40219b06: 2a6c movi.n a10, -30 +40219b08: eea981 l32r a8, 402155ac +40219b0b: 322b addi.n a3, a2, 2 +40219b0d: 336832 s32i a3, a8, 204 +40219b10: 73c872 addi a7, a8, 115 +40219b13: 70c892 addi a9, a8, 112 +40219b16: 095d mov.n a5, a9 +40219b18: b62a add.n a11, a6, a2 +40219b1a: 551b addi.n a5, a5, 1 +40219b1c: 661b addi.n a6, a6, 1 +40219b1e: 110b42 l8ui a4, a11, 17 +40219b21: 004542 s8i a4, a5, 0 +40219b24: 140bb2 l8ui a11, a11, 20 +40219b27: 0645a2 s8i a10, a5, 6 +40219b2a: 44ba add.n a4, a4, a11 +40219b2c: 034542 s8i a4, a5, 3 +40219b2f: e59577 bne a5, a7, 40219b18 +40219b32: 095d mov.n a5, a9 +40219b34: fff171 l32r a7, 40219af8 +40219b37: 0a0c movi.n a10, 0 +40219b39: 060c movi.n a6, 0 +40219b3b: 1a0232 l8ui a3, a2, 26 +40219b3e: 7b4832 s8i a3, a8, 123 +40219b41: 1b02b2 l8ui a11, a2, 27 +40219b44: 7c48b2 s8i a11, a8, 124 +40219b47: 1c0242 l8ui a4, a2, 28 +40219b4a: 1d0232 l8ui a3, a2, 29 +40219b4d: 544040 extui a4, a4, 0, 6 +40219b50: 114480 slli a4, a4, 8 +40219b53: 203340 or a3, a3, a4 +40219b56: 3f5832 s16i a3, a8, 126 +40219b59: 462a add.n a4, a6, a2 +40219b5b: 661b addi.n a6, a6, 1 +40219b5d: 1e0442 l8ui a4, a4, 30 +40219b60: 104542 s8i a4, a5, 16 +40219b63: 01b480 slli a11, a4, 24 +40219b66: 31b8b0 srai a11, a11, 24 +40219b69: 026be6 bgei a11, 6, 40219b6f +40219b6c: 026477 bbci a4, 7, 40219b72 +40219b6f: 1045a2 s8i a10, a5, 16 +40219b72: 462a add.n a4, a6, a2 +40219b74: 551b addi.n a5, a5, 1 +40219b76: e19577 bne a5, a7, 40219b5b +40219b79: 095d mov.n a5, a9 +40219b7b: ffe071 l32r a7, 40219afc +40219b7e: 060c movi.n a6, 0 +40219b80: a62a add.n a10, a6, a2 +40219b82: 661b addi.n a6, a6, 1 +40219b84: 220aa2 l8ui a10, a10, 34 +40219b87: 1445a2 s8i a10, a5, 20 +40219b8a: 551b addi.n a5, a5, 1 +40219b8c: f09577 bne a5, a7, 40219b80 +40219b8f: 095d mov.n a5, a9 +40219b91: ffdb71 l32r a7, 40219b00 +40219b94: 060c movi.n a6, 0 +40219b96: b62a add.n a11, a6, a2 +40219b98: 661b addi.n a6, a6, 1 +40219b9a: 280bb2 l8ui a11, a11, 40 +40219b9d: 1a45b2 s8i a11, a5, 26 +40219ba0: 551b addi.n a5, a5, 1 +40219ba2: f09577 bne a5, a7, 40219b96 +40219ba5: 550c movi.n a5, 5 +40219ba7: 300262 l8ui a6, a2, 48 +40219baa: 704862 s8i a6, a8, 112 +40219bad: 330242 l8ui a4, a2, 51 +40219bb0: 924842 s8i a4, a8, 146 +40219bb3: 340232 l8ui a3, a2, 52 +40219bb6: 934832 s8i a3, a8, 147 +40219bb9: 3502b2 l8ui a11, a2, 53 +40219bbc: 9448b2 s8i a11, a8, 148 +40219bbf: 4002a2 l8ui a10, a2, 64 +40219bc2: 9648a2 s8i a10, a8, 150 +40219bc5: 410292 l8ui a9, a2, 65 +40219bc8: 974892 s8i a9, a8, 151 +40219bcb: 420272 l8ui a7, a2, 66 +40219bce: 430262 l8ui a6, a2, 67 +40219bd1: 547070 extui a7, a7, 0, 6 +40219bd4: 117780 slli a7, a7, 8 +40219bd7: 206670 or a6, a6, a7 +40219bda: 4c5862 s16i a6, a8, 152 +40219bdd: 440242 l8ui a4, a2, 68 +40219be0: 9a4842 s8i a4, a8, 154 +40219be3: 450232 l8ui a3, a2, 69 +40219be6: 9b4832 s8i a3, a8, 155 +40219be9: 4702b2 l8ui a11, a2, 71 +40219bec: 4602a2 l8ui a10, a2, 70 +40219bef: 01bb80 slli a11, a11, 24 +40219bf2: 31b8b0 srai a11, a11, 24 +40219bf5: 11bb80 slli a11, a11, 8 +40219bf8: 20aab0 or a10, a10, a11 +40219bfb: 4e58a2 s16i a10, a8, 156 +40219bfe: 490292 l8ui a9, a2, 73 +40219c01: 480272 l8ui a7, a2, 72 +40219c04: 019980 slli a9, a9, 24 +40219c07: 319890 srai a9, a9, 24 +40219c0a: 119980 slli a9, a9, 8 +40219c0d: 207790 or a7, a7, a9 +40219c10: 4f5872 s16i a7, a8, 158 +40219c13: 4a0262 l8ui a6, a2, 74 +40219c16: a04862 s8i a6, a8, 160 +40219c19: 4b0242 l8ui a4, a2, 75 +40219c1c: 056d mov.n a6, a5 +40219c1e: 344040 extui a4, a4, 0, 4 +40219c21: a24842 s8i a4, a8, 162 +40219c24: 0164f6 bgeui a4, 6, 40219c29 +40219c27: 046d mov.n a6, a4 +40219c29: a24862 s8i a6, a8, 162 +40219c2c: 4b0292 l8ui a9, a2, 75 +40219c2f: 249490 extui a9, a9, 4, 3 +40219c32: a44892 s8i a9, a8, 164 +40219c35: 4b0272 l8ui a7, a2, 75 +40219c38: 047770 extui a7, a7, 7, 1 +40219c3b: a64872 s8i a7, a8, 166 +40219c3e: 4c0262 l8ui a6, a2, 76 +40219c41: 346060 extui a6, a6, 0, 4 +40219c44: a14862 s8i a6, a8, 161 +40219c47: 013567 bltu a5, a6, 40219c4c +40219c4a: 065d mov.n a5, a6 +40219c4c: a14852 s8i a5, a8, 161 +40219c4f: 4c0242 l8ui a4, a2, 76 +40219c52: 244440 extui a4, a4, 4, 3 +40219c55: a34842 s8i a4, a8, 163 +40219c58: 4c0232 l8ui a3, a2, 76 +40219c5b: 043730 extui a3, a3, 7, 1 +40219c5e: a54832 s8i a3, a8, 165 +40219c61: 4d02b2 l8ui a11, a2, 77 +40219c64: 34b0b0 extui a11, a11, 0, 4 +40219c67: a848b2 s8i a11, a8, 168 +40219c6a: 4d02a2 l8ui a10, a2, 77 +40219c6d: 34a4a0 extui a10, a10, 4, 4 +40219c70: a748a2 s8i a10, a8, 167 +40219c73: 4e0292 l8ui a9, a2, 78 +40219c76: a94892 s8i a9, a8, 169 +40219c79: 540272 l8ui a7, a2, 84 +40219c7c: aa4872 s8i a7, a8, 170 +40219c7f: 580262 l8ui a6, a2, 88 +40219c82: ab4862 s8i a6, a8, 171 +40219c85: 5d0242 l8ui a4, a2, 93 +40219c88: ad4842 s8i a4, a8, 173 +40219c8b: 5e0232 l8ui a3, a2, 94 +40219c8e: ae4832 s8i a3, a8, 174 +40219c91: 5f02b2 l8ui a11, a2, 95 +40219c94: af48b2 s8i a11, a8, 175 +40219c97: 6002a2 l8ui a10, a2, 96 +40219c9a: b048a2 s8i a10, a8, 176 +40219c9d: 610292 l8ui a9, a2, 97 +40219ca0: b14892 s8i a9, a8, 177 +40219ca3: 620272 l8ui a7, a2, 98 +40219ca6: b24872 s8i a7, a8, 178 +40219ca9: 630262 l8ui a6, a2, 99 +40219cac: b34862 s8i a6, a8, 179 +40219caf: 640242 l8ui a4, a2, 100 +40219cb2: b44842 s8i a4, a8, 180 +40219cb5: 690232 l8ui a3, a2, 105 +40219cb8: b54832 s8i a3, a8, 181 +40219cbb: 6a02b2 l8ui a11, a2, 106 +40219cbe: b648b2 s8i a11, a8, 182 +40219cc1: 6b02a2 l8ui a10, a2, 107 +40219cc4: b748a2 s8i a10, a8, 183 +40219cc7: 6c0292 l8ui a9, a2, 108 +40219cca: b84892 s8i a9, a8, 184 +40219ccd: 6d0272 l8ui a7, a2, 109 +40219cd0: b94872 s8i a7, a8, 185 +40219cd3: 6e0262 l8ui a6, a2, 110 +40219cd6: ba4862 s8i a6, a8, 186 +40219cd9: 6f0242 l8ui a4, a2, 111 +40219cdc: bb4842 s8i a4, a8, 187 +40219cdf: 700232 l8ui a3, a2, 112 +40219ce2: bc4832 s8i a3, a8, 188 +40219ce5: 7102b2 l8ui a11, a2, 113 +40219ce8: bd48b2 s8i a11, a8, 189 +40219ceb: 7202a2 l8ui a10, a2, 114 +40219cee: be48a2 s8i a10, a8, 190 +40219cf1: 020c movi.n a2, 0 +40219cf3: f00d ret.n +40219cf5: 000000 ill +40219cf8: 010101 l32r a0, 401da0fc <_lit4_end+0xd3dd0> +40219cfb: 040401 l32r a0, 401dad0c <_lit4_end+0xd49e0> +40219cfe: 040404 excw +40219d01: 040101 l32r a0, 401dad08 <_lit4_end+0xd49dc> +40219d04: 040401 l32r a0, 401dad14 <_lit4_end+0xd49e8> +40219d07: c3ff01 l32r a0, 4020ad04 +40219d0a: ff .byte 0xff +40219d0b: ff .byte 0xff +40219d0c: 010101 l32r a0, 401da110 <_lit4_end+0xd3de4> +40219d0f: 040404 excw +40219d12: 04 .byte 0x4 +40219d13: 01 .byte 0x1 + +40219d14 : +40219d14: ee2671 l32r a7, 402155ac +40219d17: ee5b31 l32r a3, 40215684 +40219d1a: 920742 l8ui a4, a7, 146 +40219d1d: fff651 l32r a5, 40219cf8 +40219d20: 681426 beqi a4, 1, 40219d8c +40219d23: 653426 beqi a4, 3, 40219d8c +40219d26: fff561 l32r a6, 40219cfc +40219d29: 714426 beqi a4, 4, 40219d9e +40219d2c: 6e5426 beqi a4, 5, 40219d9e +40219d2f: 940742 l8ui a4, a7, 148 +40219d32: 112466 bnei a4, 2, 40219d47 +40219d35: fff221 l32r a2, 40219d00 +40219d38: 0020c0 memw +40219d3b: d86322 s32i a2, a3, 0x360 +40219d3e: 0020c0 memw +40219d41: d96362 s32i a6, a3, 0x364 +40219d44: 000446 j 40219d59 +40219d47: 0e3466 bnei a4, 3, 40219d59 +40219d4a: ffee41 l32r a4, 40219d04 +40219d4d: 0020c0 memw +40219d50: d86342 s32i a4, a3, 0x360 +40219d53: 0020c0 memw +40219d56: d96352 s32i a5, a3, 0x364 +40219d59: ef2ba1 l32r a10, 40215a08 +40219d5c: 0020c0 memw +40219d5f: 402392 l32i a9, a3, 0x100 +40219d62: 2099a0 or a9, a9, a10 +40219d65: 0020c0 memw +40219d68: 406392 s32i a9, a3, 0x100 +40219d6b: ffe781 l32r a8, 40219d08 +40219d6e: ce6d71 l32r a7, 4020d724 +40219d71: 0020c0 memw +40219d74: 422362 l32i a6, a3, 0x108 +40219d77: 106680 and a6, a6, a8 +40219d7a: 206670 or a6, a6, a7 +40219d7d: 0020c0 memw +40219d80: 426362 s32i a6, a3, 0x108 +40219d83: 250c movi.n a5, 2 +40219d85: 0020c0 memw +40219d88: a359 s32i.n a5, a3, 40 +40219d8a: f00d ret.n +40219d8c: 0020c0 memw +40219d8f: d86352 s32i a5, a3, 0x360 +40219d92: ffdeb1 l32r a11, 40219d0c +40219d95: 0020c0 memw +40219d98: d963b2 s32i a11, a3, 0x364 +40219d9b: ffee86 j 40219d59 +40219d9e: 0020c0 memw +40219da1: d86362 s32i a6, a3, 0x360 +40219da4: ffdb21 l32r a2, 40219d10 +40219da7: 0020c0 memw +40219daa: d96322 s32i a2, a3, 0x364 +40219dad: ffea06 j 40219d59 +40219db0: 8008 l32i.n a0, a0, 32 +40219db2: fe .byte 0xfe +40219db3: 3f .byte 0x3f +40219db4: 314c movi.n a1, 67 +40219db6: 10 .byte 0x10 +40219db7: 40 .byte 0x40 + +40219db8 : +40219db8: fffe21 l32r a2, 40219db0 +40219dbb: f0c112 addi a1, a1, -16 +40219dbe: 11c9 s32i.n a12, a1, 4 +40219dc0: 0109 s32i.n a0, a1, 0 +40219dc2: fffc01 l32r a0, 40219db4 +40219dc5: 0000c0 callx0 a0 +40219dc8: f2ba21 l32r a2, 402168b0 +40219dcb: f20931 l32r a3, 402165f0 +40219dce: edf7c1 l32r a12, 402155ac +40219dd1: 0020c0 memw +40219dd4: 340c movi.n a4, 3 +40219dd6: 750c movi.n a5, 7 +40219dd8: 460c movi.n a6, 4 +40219dda: 070c movi.n a7, 0 +40219ddc: 446322 s32i a2, a3, 0x110 +40219ddf: 0c08 l32i.n a0, a12, 0 +40219de1: 62a022 movi a2, 98 +40219de4: 272002 l32i a0, a0, 156 +40219de7: 130c movi.n a3, 1 +40219de9: 0000c0 callx0 a0 +40219dec: 65a022 movi a2, 101 +40219def: 430c movi.n a3, 4 +40219df1: 040c movi.n a4, 0 +40219df3: 650c movi.n a5, 6 +40219df5: 0c08 l32i.n a0, a12, 0 +40219df7: 660c movi.n a6, 6 +40219df9: 272002 l32i a0, a0, 156 +40219dfc: 070c movi.n a7, 0 +40219dfe: 0000c0 callx0 a0 +40219e01: 65a022 movi a2, 101 +40219e04: 430c movi.n a3, 4 +40219e06: 040c movi.n a4, 0 +40219e08: 750c movi.n a5, 7 +40219e0a: 0c08 l32i.n a0, a12, 0 +40219e0c: 760c movi.n a6, 7 +40219e0e: 272002 l32i a0, a0, 156 +40219e11: 070c movi.n a7, 0 +40219e13: 0000c0 callx0 a0 +40219e16: b70c22 l8ui a2, a12, 183 +40219e19: ffa032 movi a3, 255 +40219e1c: 459237 bne a2, a3, 40219e65 +40219e1f: f1f751 l32r a5, 402165fc +40219e22: ee1641 l32r a4, 4021567c +40219e25: 0020c0 memw +40219e28: fa2432 l32i a3, a4, 0x3e8 +40219e2b: 103350 and a3, a3, a5 +40219e2e: 0020c0 memw +40219e31: fa6432 s32i a3, a4, 0x3e8 +40219e34: 130c movi.n a3, 1 +40219e36: 0020c0 memw +40219e39: e52422 l32i a2, a4, 0x394 +40219e3c: 202230 or a2, a2, a3 +40219e3f: 0020c0 memw +40219e42: e56422 s32i a2, a4, 0x394 +40219e45: 0c08 l32i.n a0, a12, 0 +40219e47: 620c movi.n a2, 6 +40219e49: 2b2002 l32i a0, a0, 172 +40219e4c: 240c movi.n a4, 2 +40219e4e: 0000c0 callx0 a0 +40219e51: e87c movi.n a8, -2 +40219e53: 0020c0 memw +40219e56: ee0971 l32r a7, 4021567c +40219e59: e52762 l32i a6, a7, 0x394 +40219e5c: 106680 and a6, a6, a8 +40219e5f: 0020c0 memw +40219e62: e56762 s32i a6, a7, 0x394 +40219e65: f3f041 l32r a4, 40216e28 +40219e68: f0f131 l32r a3, 4021622c +40219e6b: 0020c0 memw +40219e6e: 862322 l32i a2, a3, 0x218 +40219e71: 102240 and a2, a2, a4 +40219e74: 0020c0 memw +40219e77: 040c movi.n a4, 0 +40219e79: 552c movi.n a5, 37 +40219e7b: 866322 s32i a2, a3, 0x218 +40219e7e: 0c08 l32i.n a0, a12, 0 +40219e80: 6aa022 movi a2, 106 +40219e83: 262002 l32i a0, a0, 152 +40219e86: 230c movi.n a3, 2 +40219e88: 0000c0 callx0 a0 +40219e8b: 0c08 l32i.n a0, a12, 0 +40219e8d: 132002 l32i a0, a0, 76 +40219e90: 11c8 l32i.n a12, a1, 4 +40219e92: 0000c0 callx0 a0 +40219e95: 0108 l32i.n a0, a1, 0 +40219e97: 10c112 addi a1, a1, 16 +40219e9a: f00d ret.n +40219e9c: 0e68 l32i.n a6, a14, 0 +40219e9e: 00 .byte 00 +40219e9f: 60 .byte 0x60 + +40219ea0 : +40219ea0: f42a61 l32r a6, 40216f48 +40219ea3: 050c movi.n a5, 0 +40219ea5: fffd71 l32r a7, 40219e9c +40219ea8: 0020c0 memw +40219eab: 802632 l32i a3, a6, 0x200 +40219eae: 664b addi.n a6, a6, 4 +40219eb0: 535a add.n a5, a3, a5 +40219eb2: f29677 bne a6, a7, 40219ea8 +40219eb5: f47c movi.n a4, -1 +40219eb7: 304540 xor a4, a5, a4 +40219eba: f42351 l32r a5, 40216f48 +40219ebd: e28c beqz.n a2, 40219ecf +40219ebf: 0020c0 memw +40219ec2: 9a2522 l32i a2, a5, 0x268 +40219ec5: 160c movi.n a6, 1 +40219ec7: c02240 sub a2, a2, a4 +40219eca: 932620 movnez a2, a6, a2 +40219ecd: f00d ret.n +40219ecf: 0020c0 memw +40219ed2: 9a6542 s32i a4, a5, 0x268 +40219ed5: 020c movi.n a2, 0 +40219ed7: f00d ret.n +40219ed9: 000000 ill + +40219edc : +40219edc: 115200 slli a5, a2, 16 +40219edf: f41a41 l32r a4, 40216f48 +40219ee2: 0020c0 memw +40219ee5: 9b2432 l32i a3, a4, 0x26c +40219ee8: f43030 extui a3, a3, 0, 16 +40219eeb: 203350 or a3, a3, a5 +40219eee: 0020c0 memw +40219ef1: 9b6432 s32i a3, a4, 0x26c +40219ef4: f00d ret.n + ... + +40219ef8 : +40219ef8: f0c112 addi a1, a1, -16 +40219efb: 0109 s32i.n a0, a1, 0 +40219efd: 114200 slli a4, a2, 16 +40219f00: f41231 l32r a3, 40216f48 +40219f03: 0020c0 memw +40219f06: 9b2302 l32i a0, a3, 0x26c +40219f09: f40000 extui a0, a0, 0, 16 +40219f0c: 200040 or a0, a0, a4 +40219f0f: 0020c0 memw +40219f12: 020c movi.n a2, 0 +40219f14: 9b6302 s32i a0, a3, 0x26c +40219f17: fff885 call0 40219ea0 +40219f1a: 0108 l32i.n a0, a1, 0 +40219f1c: 10c112 addi a1, a1, 16 +40219f1f: f00d ret.n +40219f21: 000000 ill + +40219f24 : +40219f24: 040c movi.n a4, 0 +40219f26: f40851 l32r a5, 40216f48 +40219f29: a07420 addx4 a7, a4, a2 +40219f2c: 010782 l8ui a8, a7, 1 +40219f2f: 000762 l8ui a6, a7, 0 +40219f32: 118880 slli a8, a8, 8 +40219f35: 668a add.n a6, a6, a8 +40219f37: 030782 l8ui a8, a7, 3 +40219f3a: 020772 l8ui a7, a7, 2 +40219f3d: 018880 slli a8, a8, 24 +40219f40: 117700 slli a7, a7, 16 +40219f43: 778a add.n a7, a7, a8 +40219f45: 667a add.n a6, a6, a7 +40219f47: a07450 addx4 a7, a4, a5 +40219f4a: 0020c0 memw +40219f4d: 806762 s32i a6, a7, 0x200 +40219f50: 441b addi.n a4, a4, 1 +40219f52: 744040 extui a4, a4, 0, 8 +40219f55: d0c466 bnei a4, 32, 40219f29 +40219f58: f00d ret.n + ... + +40219f5c : +40219f5c: 040c movi.n a4, 0 +40219f5e: f3fa51 l32r a5, 40216f48 +40219f61: a06450 addx4 a6, a4, a5 +40219f64: 0020c0 memw +40219f67: a07420 addx4 a7, a4, a2 +40219f6a: 802662 l32i a6, a6, 0x200 +40219f6d: 441b addi.n a4, a4, 1 +40219f6f: 744040 extui a4, a4, 0, 8 +40219f72: 004762 s8i a6, a7, 0 +40219f75: f58060 extui a8, a6, 16, 16 +40219f78: 419860 srli a9, a6, 8 +40219f7b: 014792 s8i a9, a7, 1 +40219f7e: 024782 s8i a8, a7, 2 +40219f81: 756860 extui a6, a6, 24, 8 +40219f84: 034762 s8i a6, a7, 3 +40219f87: d6c466 bnei a4, 32, 40219f61 +40219f8a: f00d ret.n +40219f8c: 215c94 excw +40219f8f: cc1040 excw +40219f92: 544021 l32r a2, 401ef094 <_lit4_end+0xe8d68> +40219f95: 21ca add.n a2, a1, a12 +40219f97: c45c40 extui a5, a4, 12, 13 +40219f9a: 884021 l32r a2, 401fc09c <_lit4_end+0xf5d70> +40219f9d: 402156 bnez a1, 4021a3a3 +40219fa0: 5928 l32i.n a2, a9, 20 +40219fa2: 584021 l32r a2, 401f00a4 <_lit4_end+0xe9d78> +40219fa5: 402182 l32i a8, a1, 0x100 +40219fa8: 82a8 l32i.n a10, a2, 32 +40219faa: 044021 l32r a2, 401db0ac <_lit4_end+0xd4d80> +40219fad: 402183 excw +40219fb0: c39c beqz.n a3, 40219fd0 +40219fb2: c84021 l32r a2, 4020c0b4 +40219fb5: 215d excw +40219fb7: 6f4040 excw +40219fba: 444021 l32r a2, 401eb0bc <_lit4_end+0xe4d90> +40219fbd: 6f .byte 0x6f +40219fbe: 084021 l32r a2, 401dc0c0 <_lit4_end+0xd5d94> +40219fc1: 006b addi.n a0, a0, 6 +40219fc3: 40 .byte 0x40 + +40219fc4 : +40219fc4: f0c112 addi a1, a1, -16 +40219fc7: 0109 s32i.n a0, a1, 0 +40219fc9: fffd01 l32r a0, 40219fc0 +40219fcc: 0000c0 callx0 a0 +40219fcf: fff101 l32r a0, 40219f94 +40219fd2: ffef31 l32r a3, 40219f90 +40219fd5: ffed41 l32r a4, 40219f8c +40219fd8: fff561 l32r a6, 40219fac +40219fdb: fff371 l32r a7, 40219fa8 +40219fde: fff181 l32r a8, 40219fa4 +40219fe1: ffef91 l32r a9, 40219fa0 +40219fe4: ffeea1 l32r a10, 40219f9c +40219fe7: ed7151 l32r a5, 402155ac +40219fea: ffebb1 l32r a11, 40219f98 +40219fed: 0529 s32i.n a2, a5, 0 +40219fef: 3a62b2 s32i a11, a2, 232 +40219ff2: 2862a2 s32i a10, a2, 160 +40219ff5: 226292 s32i a9, a2, 136 +40219ff8: a289 s32i.n a8, a2, 40 +40219ffa: 166272 s32i a7, a2, 88 +40219ffd: 196262 s32i a6, a2, 100 +4021a000: 1f6242 s32i a4, a2, 124 +4021a003: 436232 s32i a3, a2, 0x10c +4021a006: 126202 s32i a0, a2, 72 +4021a009: ffe951 l32r a5, 40219fb0 +4021a00c: 9259 s32i.n a5, a2, 36 +4021a00e: ffeb01 l32r a0, 40219fbc +4021a011: ffe931 l32r a3, 40219fb8 +4021a014: ffe841 l32r a4, 40219fb4 +4021a017: 366242 s32i a4, a2, 216 +4021a01a: 1e6232 s32i a3, a2, 120 +4021a01d: 1d6202 s32i a0, a2, 116 +4021a020: 0108 l32i.n a0, a1, 0 +4021a022: 10c112 addi a1, a1, 16 +4021a025: f00d ret.n +4021a027: 8bc200 excw +4021a02a: fe .byte 0xfe +4021a02b: 3f .byte 0x3f +4021a02c: 840000 extui a0, a0, 0, 9 +4021a02f: 360404 excw +4021a032: 2c4010 excw +4021a035: 401031 l32r a3, 401ea078 <_lit4_end+0xe3d4c> +4021a038: 3278 l32i.n a7, a2, 12 +4021a03a: 10 .byte 0x10 +4021a03b: 40 .byte 0x40 + +4021a03c : +4021a03c: c0c112 addi a1, a1, -64 +4021a03f: 81c9 s32i.n a12, a1, 32 +4021a041: 91d9 s32i.n a13, a1, 36 +4021a043: a1e9 s32i.n a14, a1, 40 +4021a045: b1f9 s32i.n a15, a1, 44 +4021a047: 6129 s32i.n a2, a1, 24 +4021a049: 7109 s32i.n a0, a1, 28 +4021a04b: fff901 l32r a0, 4021a030 +4021a04e: 0000c0 callx0 a0 +4021a051: fff705 call0 40219fc4 +4021a054: fff5e1 l32r a14, 4021a028 +4021a057: 000e02 l8ui a0, a14, 0 +4021a05a: ed54c1 l32r a12, 402155ac +4021a05d: 10dc bnez.n a0, 4021a072 +4021a05f: 6128 l32i.n a2, a1, 24 +4021a061: ffaa05 call0 40219b04 +4021a064: 4129 s32i.n a2, a1, 16 +4021a066: f4ed31 l32r a3, 4021741c +4021a069: 840c22 l8ui a2, a12, 132 +4021a06c: 244322 s8i a2, a3, 36 +4021a06f: 000246 j 4021a07c +4021a072: 3c0c42 l8ui a4, a12, 60 +4021a075: 050c movi.n a5, 0 +4021a077: 4159 s32i.n a5, a1, 16 +4021a079: 004142 s8i a4, a1, 0 +4021a07c: 201110 or a1, a1, a1 +4021a07f: 03d3c5 call0 4021ddbc +4021a082: ffc905 call0 40219d14 +4021a085: 000e62 l8ui a6, a14, 0 +4021a088: 16cc bnez.n a6, 4021a08d +4021a08a: ff4e45 call0 40219570 +4021a08d: ff7945 call0 40219824 +4021a090: 000e02 l8ui a0, a14, 0 +4021a093: f15761 l32r a6, 402165f0 +4021a096: 50dc bnez.n a0, 4021a0af +4021a098: bc0c82 l8ui a8, a12, 188 +4021a09b: c70c movi.n a7, 12 +4021a09d: 0e0787 bnone a7, a8, 4021a0af +4021a0a0: bd0c92 l8ui a9, a12, 189 +4021a0a3: 019980 slli a9, a9, 24 +4021a0a6: 319890 srai a9, a9, 24 +4021a0a9: 1199d0 slli a9, a9, 3 +4021a0ac: 605c92 s16i a9, a12, 192 +4021a0af: 0020c0 memw +4021a0b2: 4f2652 l32i a5, a6, 0x13c +4021a0b5: be0c32 l8ui a3, a12, 190 +4021a0b8: 745050 extui a5, a5, 0, 8 +4021a0bb: 042366 bnei a3, 2, 4021a0c3 +4021a0be: 130c movi.n a3, 1 +4021a0c0: be4c32 s8i a3, a12, 190 +4021a0c3: 835350 moveqz a5, a3, a5 +4021a0c6: 130c movi.n a3, 1 +4021a0c8: 745050 extui a5, a5, 0, 8 +4021a0cb: 358c beqz.n a5, 4021a0d2 +4021a0cd: 011526 beqi a5, 1, 4021a0d2 +4021a0d0: 030c movi.n a3, 0 +4021a0d2: f39dd1 l32r a13, 40216f48 +4021a0d5: 180c movi.n a8, 1 +4021a0d7: fec592 addi a9, a5, -2 +4021a0da: 0f0c movi.n a15, 0 +4021a0dc: 050c movi.n a5, 0 +4021a0de: 83f890 moveqz a15, a8, a9 +4021a0e1: 0020c0 memw +4021a0e4: 452672 l32i a7, a6, 0x114 +4021a0e7: 247070 extui a7, a7, 0, 3 +4021a0ea: 0c2766 bnei a7, 2, 4021a0fa +4021a0ed: 90cc bnez.n a0, 4021a0fa +4021a0ef: 0020c0 memw +4021a0f2: c02da2 l32i a10, a13, 0x300 +4021a0f5: 015a66 bnei a10, 5, 4021a0fa +4021a0f8: 150c movi.n a5, 1 +4021a0fa: 74e050 extui a14, a5, 0, 8 +4021a0fd: 0b0c movi.n a11, 0 +4021a0ff: d1b9 s32i.n a11, a1, 52 +4021a101: 70cc bnez.n a0, 4021a10c +4021a103: 140c movi.n a4, 1 +4021a105: 0b2d mov.n a2, a11 +4021a107: 8324e0 moveqz a2, a4, a14 +4021a10a: d129 s32i.n a2, a1, 52 +4021a10c: 745030 extui a5, a3, 0, 8 +4021a10f: c159 s32i.n a5, a1, 48 +4021a111: 030c movi.n a3, 0 +4021a113: 05cc bnez.n a5, 4021a117 +4021a115: 8f8c beqz.n a15, 4021a121 +4021a117: d178 l32i.n a7, a1, 52 +4021a119: 160c movi.n a6, 1 +4021a11b: 747070 extui a7, a7, 0, 8 +4021a11e: 933670 movnez a3, a6, a7 +4021a121: 748030 extui a8, a3, 0, 8 +4021a124: f88c beqz.n a8, 4021a137 +4021a126: 6128 l32i.n a2, a1, 24 +4021a128: 01d222 addmi a2, a2, 0x100 +4021a12b: 80c222 addi a2, a2, -128 +4021a12e: ffdf45 call0 40219f24 +4021a131: ffbd01 l32r a0, 4021a028 +4021a134: 000002 l8ui a0, a0, 0 +4021a137: 05b056 bnez a0, 4021a196 +4021a13a: d84e51 l32r a5, 40210274 +4021a13d: f03b61 l32r a6, 4021622c +4021a140: 0020c0 memw +4021a143: 952632 l32i a3, a6, 0x254 +4021a146: d84a41 l32r a4, 40210270 +4021a149: 103350 and a3, a3, a5 +4021a14c: 0020c0 memw +4021a14f: 962622 l32i a2, a6, 0x258 +4021a152: 102240 and a2, a2, a4 +4021a155: 112200 slli a2, a2, 16 +4021a158: 202230 or a2, a2, a3 +4021a15b: 1129 s32i.n a2, a1, 4 +4021a15d: d84891 l32r a9, 40210280 +4021a160: 0020c0 memw +4021a163: 972672 l32i a7, a6, 0x25c +4021a166: 9be081 l32r a8, 402010e8 +4021a169: 107790 and a7, a7, a9 +4021a16c: 0020c0 memw +4021a16f: 942662 l32i a6, a6, 0x250 +4021a172: 106680 and a6, a6, a8 +4021a175: 206670 or a6, a6, a7 +4021a178: 2169 s32i.n a6, a1, 8 +4021a17a: 130c movi.n a3, 1 +4021a17c: 0020c0 memw +4021a17f: 982d42 l32i a4, a13, 0x260 +4021a182: 0a9247 bne a2, a4, 4021a190 +4021a185: 0020c0 memw +4021a188: 992d72 l32i a7, a13, 0x264 +4021a18b: 019677 bne a6, a7, 4021a190 +4021a18e: 030c movi.n a3, 0 +4021a190: 746030 extui a6, a3, 0, 8 +4021a193: 000046 j 4021a198 +4021a196: 060c movi.n a6, 0 +4021a198: 0020c0 memw +4021a19b: 9b2d52 l32i a5, a13, 0x26c +4021a19e: 755050 extui a5, a5, 16, 8 +4021a1a1: 5ecc bnez.n a14, 4021a1aa +4021a1a3: 080c movi.n a8, 0 +4021a1a5: e189 s32i.n a8, a1, 56 +4021a1a7: 0004c6 j 4021a1be +4021a1aa: fcc5b2 addi a11, a5, -4 +4021a1ad: 1a0c movi.n a10, 1 +4021a1af: 090c movi.n a9, 0 +4021a1b1: fec532 addi a3, a5, -2 +4021a1b4: 120c movi.n a2, 1 +4021a1b6: 83f230 moveqz a15, a2, a3 +4021a1b9: 839ab0 moveqz a9, a10, a11 +4021a1bc: e199 s32i.n a9, a1, 56 +4021a1be: 40fc bnez.n a0, 4021a1f6 +4021a1c0: be9c beqz.n a14, 4021a1df +4021a1c2: 0020c0 memw +4021a1c5: 9b2d32 l32i a3, a13, 0x26c +4021a1c8: b80c72 l8ui a7, a12, 184 +4021a1cb: f43030 extui a3, a3, 0, 16 +4021a1ce: 20d716 beqz a7, 4021a3df +4021a1d1: 20a556 bnez a5, 4021a3df +4021a1d4: 02b377 bgeu a3, a7, 4021a1da +4021a1d7: 0087c6 j 4021a3fa +4021a1da: 030c movi.n a3, 0 +4021a1dc: 000046 j 4021a1e1 +4021a1df: 030c movi.n a3, 0 +4021a1e1: f10251 l32r a5, 402165ec +4021a1e4: 0020c0 memw +4021a1e7: 9b2d42 l32i a4, a13, 0x26c +4021a1ea: 104450 and a4, a4, a5 +4021a1ed: 204430 or a4, a4, a3 +4021a1f0: 0020c0 memw +4021a1f3: 9b6d42 s32i a4, a13, 0x26c +4021a1f6: 130c movi.n a3, 1 +4021a1f8: c178 l32i.n a7, a1, 48 +4021a1fa: 3169 s32i.n a6, a1, 12 +4021a1fc: 07cc bnez.n a7, 4021a200 +4021a1fe: 4f8c beqz.n a15, 4021a206 +4021a200: 20cc bnez.n a0, 4021a206 +4021a202: e188 l32i.n a8, a1, 56 +4021a204: b88c beqz.n a8, 4021a213 +4021a206: 071066 bnei a0, 1, 4021a211 +4021a209: 9bb8a1 l32r a10, 402010ec +4021a20c: 3c98 l32i.n a9, a12, 12 +4021a20e: 01c9a7 bnall a9, a10, 4021a213 +4021a211: 030c movi.n a3, 0 +4021a213: 74e030 extui a14, a3, 0, 8 +4021a216: 6e9c beqz.n a14, 4021a230 +4021a218: 120c movi.n a2, 1 +4021a21a: ffc845 call0 40219ea0 +4021a21d: 100c movi.n a0, 1 +4021a21f: 52cc bnez.n a2, 4021a228 +4021a221: 3138 l32i.n a3, a1, 12 +4021a223: 020c movi.n a2, 0 +4021a225: 830230 moveqz a0, a2, a3 +4021a228: 745000 extui a5, a0, 0, 8 +4021a22b: 040c movi.n a4, 0 +4021a22d: 93e450 movnez a14, a4, a5 +4021a230: 2ebc beqz.n a14, 4021a266 +4021a232: ee6821 l32r a2, 40215bd4 +4021a235: 040c movi.n a4, 0 +4021a237: 53c232 addi a3, a2, 83 +4021a23a: fcd405 call0 40216f7c +4021a23d: 024d mov.n a4, a2 +4021a23f: 1b6c22 s32i a2, a12, 108 +4021a242: f84b21 l32r a2, 40218370 +4021a245: 329b addi.n a3, a2, 9 +4021a247: fcd345 call0 40216f7c +4021a24a: ff7791 l32r a9, 4021a028 +4021a24d: 000992 l8ui a9, a9, 0 +4021a250: 29dc bnez.n a9, 4021a266 +4021a252: 191f16 beqz a15, 4021a3e7 +4021a255: d1a8 l32i.n a10, a1, 52 +4021a257: 74a0a0 extui a10, a10, 0, 8 +4021a25a: 8a8c beqz.n a10, 4021a266 +4021a25c: 9e5101 l32r a0, 40201ba0 +4021a25f: 3cb8 l32i.n a11, a12, 12 +4021a261: 10bb00 and a11, a11, a0 +4021a264: 3cb9 s32i.n a11, a12, 12 +4021a266: 000c movi.n a0, 0 +4021a268: 3e8c beqz.n a14, 4021a26f +4021a26a: 120c movi.n a2, 1 +4021a26c: 9302f0 movnez a0, a2, a15 +4021a26f: ff6ef1 l32r a15, 4021a028 +4021a272: 322c22 l32i a2, a12, 200 +4021a275: 7da032 movi a3, 125 +4021a278: 140c movi.n a4, 1 +4021a27a: e24c02 s8i a0, a12, 226 +4021a27d: 004e85 call0 4021a768 +4021a280: 100c movi.n a0, 1 +4021a282: 52cc bnez.n a2, 4021a28b +4021a284: 3c38 l32i.n a3, a12, 12 +4021a286: 017307 bbci a3, 16, 4021a28b +4021a289: 000c movi.n a0, 0 +4021a28b: 084c02 s8i a0, a12, 8 +4021a28e: ecfa51 l32r a5, 40215678 +4021a291: 0020c0 memw +4021a294: 802552 l32i a5, a5, 0x200 +4021a297: e148 l32i.n a4, a1, 56 +4021a299: 5159 s32i.n a5, a1, 20 +4021a29b: 448c beqz.n a4, 4021a2a3 +4021a29d: ffb185 call0 40219db8 +4021a2a0: 000206 j 4021a2ac +4021a2a3: fec321 l32r a2, 40219db0 +4021a2a6: ff6301 l32r a0, 4021a034 +4021a2a9: 0000c0 callx0 a0 +4021a2ac: 0020c0 memw +4021a2af: ecf271 l32r a7, 40215678 +4021a2b2: 5188 l32i.n a8, a1, 20 +4021a2b4: 802772 l32i a7, a7, 0x200 +4021a2b7: 080c62 l8ui a6, a12, 8 +4021a2ba: c07780 sub a7, a7, a8 +4021a2bd: 396c72 s32i a7, a12, 228 +4021a2c0: 968c beqz.n a6, 4021a2cd +4021a2c2: 322c22 l32i a2, a12, 200 +4021a2c5: 7da032 movi a3, 125 +4021a2c8: 040c movi.n a4, 0 +4021a2ca: 0049c5 call0 4021a768 +4021a2cd: 000f82 l8ui a8, a15, 0 +4021a2d0: 161866 bnei a8, 1, 4021a2ea +4021a2d3: 3c98 l32i.n a9, a12, 12 +4021a2d5: 4cf9b7 bbsi a9, 27, 4021a325 +4021a2d8: 000122 l8ui a2, a1, 0 +4021a2db: 012280 slli a2, a2, 24 +4021a2de: 312820 srai a2, a2, 24 +4021a2e1: fc1905 call0 40216474 +4021a2e4: 000f46 j 4021a325 +4021a2e7: 000000 ill +4021a2ea: e138 l32i.n a3, a1, 56 +4021a2ec: 53fc bnez.n a3, 4021a325 +4021a2ee: ee3921 l32r a2, 40215bd4 +4021a2f1: 040c movi.n a4, 0 +4021a2f3: 53c232 addi a3, a2, 83 +4021a2f6: fcc545 call0 40216f4c +4021a2f9: 024d mov.n a4, a2 +4021a2fb: 1b6c22 s32i a2, a12, 108 +4021a2fe: f81c21 l32r a2, 40218370 +4021a301: 329b addi.n a3, a2, 9 +4021a303: fcc485 call0 40216f4c +4021a306: 1158 l32i.n a5, a1, 4 +4021a308: 0020c0 memw +4021a30b: 986d52 s32i a5, a13, 0x260 +4021a30e: 2148 l32i.n a4, a1, 8 +4021a310: 0020c0 memw +4021a313: 996d42 s32i a4, a13, 0x264 +4021a316: 020c movi.n a2, 0 +4021a318: ffb845 call0 40219ea0 +4021a31b: f0b971 l32r a7, 40216600 +4021a31e: 3c68 l32i.n a6, a12, 12 +4021a320: 206670 or a6, a6, a7 +4021a323: 3c69 s32i.n a6, a12, 12 +4021a325: ff4191 l32r a9, 4021a02c +4021a328: 0020c0 memw +4021a32b: 9f2d82 l32i a8, a13, 0x27c +4021a32e: f48080 extui a8, a8, 0, 16 +4021a331: 208890 or a8, a8, a9 +4021a334: 0020c0 memw +4021a337: 9f6d82 s32i a8, a13, 0x27c +4021a33a: 0edc bnez.n a14, 4021a34e +4021a33c: d198 l32i.n a9, a1, 52 +4021a33e: 749090 extui a9, a9, 0, 8 +4021a341: 998c beqz.n a9, 4021a34e +4021a343: 6128 l32i.n a2, a1, 24 +4021a345: 01d222 addmi a2, a2, 0x100 +4021a348: 80c222 addi a2, a2, -128 +4021a34b: ffc105 call0 40219f5c +4021a34e: eccd51 l32r a5, 40215684 +4021a351: ab0c02 l8ui a0, a12, 171 +4021a354: fb3331 l32r a3, 40219020 +4021a357: 1a3066 bnei a0, 3, 4021a375 +4021a35a: aa0c62 l8ui a6, a12, 170 +4021a35d: 116640 slli a6, a6, 12 +4021a360: 0020c0 memw +4021a363: 592542 l32i a4, a5, 0x164 +4021a366: 104430 and a4, a4, a3 +4021a369: 204460 or a4, a4, a6 +4021a36c: 0020c0 memw +4021a36f: 596542 s32i a4, a5, 0x164 +4021a372: ab0c02 l8ui a0, a12, 171 +4021a375: 294066 bnei a0, 4, 4021a3a2 +4021a378: aa0ca2 l8ui a10, a12, 170 +4021a37b: 11aa40 slli a10, a10, 12 +4021a37e: 0020c0 memw +4021a381: 592592 l32i a9, a5, 0x164 +4021a384: 109930 and a9, a9, a3 +4021a387: 2099a0 or a9, a9, a10 +4021a38a: 0020c0 memw +4021a38d: 596592 s32i a9, a5, 0x164 +4021a390: b86181 l32r a8, 40208514 +4021a393: 0020c0 memw +4021a396: da2572 l32i a7, a5, 0x368 +4021a399: 207780 or a7, a7, a8 +4021a39c: 0020c0 memw +4021a39f: da6572 s32i a7, a5, 0x368 +4021a3a2: ac0cb2 l8ui a11, a12, 172 +4021a3a5: 0b2b66 bnei a11, 2, 4021a3b4 +4021a3a8: f02fd1 l32r a13, 40216464 +4021a3ab: f02fe1 l32r a14, 40216468 +4021a3ae: 0020c0 memw +4021a3b1: 806ed2 s32i a13, a14, 0x200 +4021a3b4: 3c08 l32i.n a0, a12, 12 +4021a3b6: 0770b7 bbci a0, 27, 4021a3c1 +4021a3b9: 120c movi.n a2, 1 +4021a3bb: ff1f01 l32r a0, 4021a038 +4021a3be: 0000c0 callx0 a0 +4021a3c1: 81c8 l32i.n a12, a1, 32 +4021a3c3: 91d8 l32i.n a13, a1, 36 +4021a3c5: 000f22 l8ui a2, a15, 0 +4021a3c8: a1e8 l32i.n a14, a1, 40 +4021a3ca: 12cc bnez.n a2, 4021a3cf +4021a3cc: 007f85 call0 4021abc8 +4021a3cf: 4128 l32i.n a2, a1, 16 +4021a3d1: 140c movi.n a4, 1 +4021a3d3: 7108 l32i.n a0, a1, 28 +4021a3d5: 004f42 s8i a4, a15, 0 +4021a3d8: b1f8 l32i.n a15, a1, 44 +4021a3da: 40c112 addi a1, a1, 64 +4021a3dd: f00d ret.n +4021a3df: 331b addi.n a3, a3, 1 +4021a3e1: f43030 extui a3, a3, 0, 16 +4021a3e4: ff7e46 j 4021a1e1 +4021a3e7: c148 l32i.n a4, a1, 48 +4021a3e9: e79416 beqz a4, 4021a266 +4021a3ec: 80ae52 movi a5, 0xfffffe80 +4021a3ef: ed5a61 l32r a6, 40215958 +4021a3f2: 3c69 s32i.n a6, a12, 12 +4021a3f4: 1d5c52 s16i a5, a12, 58 +4021a3f7: ff9ac6 j 4021a266 +4021a3fa: 1f0c movi.n a15, 1 +4021a3fc: 331b addi.n a3, a3, 1 +4021a3fe: f43030 extui a3, a3, 0, 16 +4021a401: ff7706 j 4021a1e1 + +4021a404 : +4021a404: f00d ret.n + ... + +4021a408 : +4021a408: 77a022 movi a2, 119 +4021a40b: 030c movi.n a3, 0 +4021a40d: f40c movi.n a4, 15 +4021a40f: f0c112 addi a1, a1, -16 +4021a412: 0109 s32i.n a0, a1, 0 +4021a414: ec6601 l32r a0, 402155ac +4021a417: 150c movi.n a5, 1 +4021a419: 0008 l32i.n a0, a0, 0 +4021a41b: 160c movi.n a6, 1 +4021a41d: 272002 l32i a0, a0, 156 +4021a420: 170c movi.n a7, 1 +4021a422: 0000c0 callx0 a0 +4021a425: 0108 l32i.n a0, a1, 0 +4021a427: 10c112 addi a1, a1, 16 +4021a42a: f00d ret.n +4021a42c: ff .byte 0xff +4021a42d: 1f .byte 0x1f +4021a42e: fe .byte 0xfe +4021a42f: ff .byte 0xff + +4021a430 : +4021a430: ec9361 l32r a6, 4021567c +4021a433: 881c movi.n a8, 24 +4021a435: fffd51 l32r a5, 4021a42c +4021a438: 117230 slli a7, a2, 13 +4021a43b: 020c movi.n a2, 0 +4021a43d: a04260 addx4 a4, a2, a6 +4021a440: 0020c0 memw +4021a443: c12432 l32i a3, a4, 0x304 +4021a446: 103350 and a3, a3, a5 +4021a449: 203730 or a3, a7, a3 +4021a44c: 0020c0 memw +4021a44f: c16432 s32i a3, a4, 0x304 +4021a452: 221b addi.n a2, a2, 1 +4021a454: 742020 extui a2, a2, 0, 8 +4021a457: e29287 bne a2, a8, 4021a43d +4021a45a: f00d ret.n +4021a45c: 000ce4 excw + ... + +4021a460 : +4021a460: f42020 extui a2, a2, 0, 16 +4021a463: f0c112 addi a1, a1, -16 +4021a466: 2109 s32i.n a0, a1, 8 +4021a468: 07a702 movi a0, 0x707 +4021a46b: 05b027 bgeu a0, a2, 4021a474 +4021a46e: fffb31 l32r a3, 4021a45c +4021a471: 02b327 bgeu a3, a2, 4021a477 +4021a474: fffa21 l32r a2, 4021a45c +4021a477: ec4d01 l32r a0, 402155ac +4021a47a: 182032 l32i a3, a0, 96 +4021a47d: 0008 l32i.n a0, a0, 0 +4021a47f: f53030 extui a3, a3, 16, 16 +4021a482: 0139 s32i.n a3, a1, 0 +4021a484: e008 l32i.n a0, a0, 56 +4021a486: 330c movi.n a3, 3 +4021a488: 0000c0 callx0 a0 +4021a48b: ec4801 l32r a0, 402155ac +4021a48e: 330c movi.n a3, 3 +4021a490: 0008 l32i.n a0, a0, 0 +4021a492: 1129 s32i.n a2, a1, 4 +4021a494: e008 l32i.n a0, a0, 56 +4021a496: 0128 l32i.n a2, a1, 0 +4021a498: 0000c0 callx0 a0 +4021a49b: 1148 l32i.n a4, a1, 4 +4021a49d: 7fa002 movi a0, 127 +4021a4a0: c04420 sub a4, a4, a2 +4021a4a3: 81af22 movi a2, -127 +4021a4a6: 1144f0 slli a4, a4, 1 +4021a4a9: 114400 slli a4, a4, 16 +4021a4ac: 314040 srai a4, a4, 16 +4021a4af: 442b addi.n a4, a4, 2 +4021a4b1: 214240 srai a4, a4, 2 +4021a4b4: 114400 slli a4, a4, 16 +4021a4b7: 314040 srai a4, a4, 16 +4021a4ba: 01e4e6 bgei a4, 128, 4021a4bf +4021a4bd: 040d mov.n a0, a4 +4021a4bf: 012027 blt a0, a2, 4021a4c4 +4021a4c2: 002d mov.n a2, a0 +4021a4c4: 2108 l32i.n a0, a1, 8 +4021a4c6: 112200 slli a2, a2, 16 +4021a4c9: 312020 srai a2, a2, 16 +4021a4cc: 10c112 addi a1, a1, 16 +4021a4cf: f00d ret.n +4021a4d1: 000000 ill + +4021a4d4 : +4021a4d4: e0c112 addi a1, a1, -32 +4021a4d7: 51d9 s32i.n a13, a1, 20 +4021a4d9: 41c9 s32i.n a12, a1, 16 +4021a4db: 03dd mov.n a13, a3 +4021a4dd: ec3331 l32r a3, 402155ac +4021a4e0: 3109 s32i.n a0, a1, 12 +4021a4e2: 3c0302 l8ui a0, a3, 60 +4021a4e5: 02cd mov.n a12, a2 +4021a4e7: 1e70f6 bgeui a0, 7, 4021a509 +4021a4ea: 0c9342 l16si a4, a3, 24 +4021a4ed: 200b addi.n a2, a0, -1 +4021a4ef: 0d9332 l16si a3, a3, 26 +4021a4f2: 2149 s32i.n a4, a1, 8 +4021a4f4: c03340 sub a3, a3, a4 +4021a4f7: 822230 mull a2, a2, a3 +4021a4fa: 530c movi.n a3, 5 +4021a4fc: 9dc701 l32r a0, 40201c18 +4021a4ff: 0000c0 callx0 a0 +4021a502: 2108 l32i.n a0, a1, 8 +4021a504: 002a add.n a0, a0, a2 +4021a506: 001306 j 4021a556 +4021a509: 1fa0f6 bgeui a0, 12, 4021a52c +4021a50c: 0d9342 l16si a4, a3, 26 +4021a50f: fac022 addi a2, a0, -6 +4021a512: 0e9332 l16si a3, a3, 28 +4021a515: 1149 s32i.n a4, a1, 4 +4021a517: c03340 sub a3, a3, a4 +4021a51a: 822230 mull a2, a2, a3 +4021a51d: 530c movi.n a3, 5 +4021a51f: 9dbe01 l32r a0, 40201c18 +4021a522: 0000c0 callx0 a0 +4021a525: 1108 l32i.n a0, a1, 4 +4021a527: 002a add.n a0, a0, a2 +4021a529: 000a46 j 4021a556 +4021a52c: 0f9322 l16si a2, a3, 30 +4021a52f: d40c movi.n a4, 13 +4021a531: 1f3407 bltu a4, a0, 4021a554 +4021a534: a05000 addx4 a5, a0, a0 +4021a537: 0e9332 l16si a3, a3, 28 +4021a53a: 0139 s32i.n a3, a1, 0 +4021a53c: c9c552 addi a5, a5, -55 +4021a53f: c02230 sub a2, a2, a3 +4021a542: 822520 mull a2, a5, a2 +4021a545: 631c movi.n a3, 22 +4021a547: 9db401 l32r a0, 40201c18 +4021a54a: 0000c0 callx0 a0 +4021a54d: 0108 l32i.n a0, a1, 0 +4021a54f: 002a add.n a0, a0, a2 +4021a551: 000046 j 4021a556 +4021a554: 020d mov.n a0, a2 +4021a556: 0c2d mov.n a2, a12 +4021a558: f5a331 l32r a3, 40217be4 +4021a55b: 114000 slli a4, a0, 16 +4021a55e: 314040 srai a4, a4, 16 +4021a561: fd6605 call0 40217bc4 +4021a564: 000c movi.n a0, 0 +4021a566: 701b addi.n a7, a0, 1 +4021a568: 6c0a add.n a6, a12, a0 +4021a56a: 000652 l8ui a5, a6, 0 +4021a56d: 740070 extui a0, a7, 0, 8 +4021a570: 5d5a add.n a5, a13, a5 +4021a572: 004652 s8i a5, a6, 0 +4021a575: ed6066 bnei a0, 6, 4021a566 +4021a578: 41c8 l32i.n a12, a1, 16 +4021a57a: 51d8 l32i.n a13, a1, 20 +4021a57c: 3108 l32i.n a0, a1, 12 +4021a57e: 20c112 addi a1, a1, 32 +4021a581: f00d ret.n + ... + +4021a584 : +4021a584: f0c112 addi a1, a1, -16 +4021a587: 31c9 s32i.n a12, a1, 12 +4021a589: ec08c1 l32r a12, 402155ac +4021a58c: 012d mov.n a2, a1 +4021a58e: e80c32 l8ui a3, a12, 232 +4021a591: 2109 s32i.n a0, a1, 8 +4021a593: 013380 slli a3, a3, 24 +4021a596: 313830 srai a3, a3, 24 +4021a599: fff385 call0 4021a4d4 +4021a59c: f3a021 l32r a2, 4021741c +4021a59f: 550c movi.n a5, 5 +4021a5a1: 240222 l8ui a2, a2, 36 +4021a5a4: 050102 l8ui a0, a1, 5 +4021a5a7: 012280 slli a2, a2, 24 +4021a5aa: 312820 srai a2, a2, 24 +4021a5ad: 1da207 bge a2, a0, 4021a5ce +4021a5b0: ea4c52 s8i a5, a12, 234 +4021a5b3: 160c movi.n a6, 1 +4021a5b5: e94c62 s8i a6, a12, 233 +4021a5b8: c05020 sub a5, a0, a2 +4021a5bb: 745050 extui a5, a5, 0, 8 +4021a5be: 820c movi.n a2, 8 +4021a5c0: 5f3257 bltu a2, a5, 4021a623 +4021a5c3: e20c movi.n a2, 14 +4021a5c5: f8c072 addi a7, a0, -8 +4021a5c8: eb4c72 s8i a7, a12, 235 +4021a5cb: 000c06 j 4021a5ff +4021a5ce: 060c movi.n a6, 0 +4021a5d0: 040172 l8ui a7, a1, 4 +4021a5d3: e94c62 s8i a6, a12, 233 +4021a5d6: 1d2277 blt a2, a7, 4021a5f7 +4021a5d9: 030102 l8ui a0, a1, 3 +4021a5dc: 450c movi.n a5, 4 +4021a5de: 61a207 bge a2, a0, 4021a643 +4021a5e1: 070d mov.n a0, a7 +4021a5e3: 000406 j 4021a5f7 +4021a5e6: 000152 l8ui a5, a1, 0 +4021a5e9: 02a207 bge a2, a0, 4021a5ef +4021a5ec: 002646 j 4021a689 +4021a5ef: 022257 blt a2, a5, 4021a5f5 +4021a5f2: 0024c6 j 4021a689 +4021a5f5: 150c movi.n a5, 1 +4021a5f7: ea4c52 s8i a5, a12, 234 +4021a5fa: eb4c02 s8i a0, a12, 235 +4021a5fd: f20c movi.n a2, 15 +4021a5ff: 468c beqz.n a6, 4021a607 +4021a601: ffe2c5 call0 4021a430 +4021a604: 000486 j 4021a61a +4021a607: ad0c82 l8ui a8, a12, 173 +4021a60a: 788c beqz.n a8, 4021a615 +4021a60c: ae0c22 l8ui a2, a12, 174 +4021a60f: ffe205 call0 4021a430 +4021a612: 000106 j 4021a61a +4021a615: f20c movi.n a2, 15 +4021a617: ffe185 call0 4021a430 +4021a61a: 31c8 l32i.n a12, a1, 12 +4021a61c: 2108 l32i.n a0, a1, 8 +4021a61e: 10c112 addi a1, a1, 16 +4021a621: f00d ret.n +4021a623: 891c movi.n a9, 24 +4021a625: 0a3957 bltu a9, a5, 4021a633 +4021a628: d20c movi.n a2, 13 +4021a62a: e8c0a2 addi a10, a0, -24 +4021a62d: eb4ca2 s8i a10, a12, 235 +4021a630: fff2c6 j 4021a5ff +4021a633: 0b2c movi.n a11, 32 +4021a635: 153b57 bltu a11, a5, 4021a64e +4021a638: e0c022 addi a2, a0, -32 +4021a63b: eb4c22 s8i a2, a12, 235 +4021a63e: 920c movi.n a2, 9 +4021a640: ffeec6 j 4021a5ff +4021a643: 020152 l8ui a5, a1, 2 +4021a646: 14a257 bge a2, a5, 4021a65e +4021a649: 350c movi.n a5, 3 +4021a64b: ffea06 j 4021a5f7 +4021a64e: c32c movi.n a3, 44 +4021a650: 173357 bltu a3, a5, 4021a66b +4021a653: c20c movi.n a2, 12 +4021a655: d4c042 addi a4, a0, -44 +4021a658: eb4c42 s8i a4, a12, 235 +4021a65b: ffe806 j 4021a5ff +4021a65e: 010102 l8ui a0, a1, 1 +4021a661: 81a207 bge a2, a0, 4021a5e6 +4021a664: 050d mov.n a0, a5 +4021a666: 250c movi.n a5, 2 +4021a668: ffe2c6 j 4021a5f7 +4021a66b: 873c movi.n a7, 56 +4021a66d: 083757 bltu a7, a5, 4021a679 +4021a670: c8c082 addi a8, a0, -56 +4021a673: eb4c82 s8i a8, a12, 235 +4021a676: ffe146 j 4021a5ff +4021a679: 494c movi.n a9, 68 +4021a67b: 113957 bltu a9, a5, 4021a690 +4021a67e: 420c movi.n a2, 4 +4021a680: bcc0a2 addi a10, a0, -68 +4021a683: eb4ca2 s8i a10, a12, 235 +4021a686: ffdd46 j 4021a5ff +4021a689: 050d mov.n a0, a5 +4021a68b: 050c movi.n a5, 0 +4021a68d: ffd986 j 4021a5f7 +4021a690: 020c movi.n a2, 0 +4021a692: a4c0b2 addi a11, a0, -92 +4021a695: eb4cb2 s8i a11, a12, 235 +4021a698: ffd8c6 j 4021a5ff + ... + +4021a69c : +4021a69c: f36041 l32r a4, 4021741c +4021a69f: f0c112 addi a1, a1, -16 +4021a6a2: 2109 s32i.n a0, a1, 8 +4021a6a4: 013d mov.n a3, a1 +4021a6a6: ebc101 l32r a0, 402155ac +4021a6a9: 244422 s8i a2, a4, 36 +4021a6ac: 3c0022 l8ui a2, a0, 60 +4021a6af: fd6d05 call0 40217d80 +4021a6b2: ebbe61 l32r a6, 402155ac +4021a6b5: 150c movi.n a5, 1 +4021a6b7: 2108 l32i.n a0, a1, 8 +4021a6b9: 10c112 addi a1, a1, 16 +4021a6bc: ec4652 s8i a5, a6, 236 +4021a6bf: f00d ret.n +4021a6c1: 000000 ill + +4021a6c4 : +4021a6c4: ebba31 l32r a3, 402155ac +4021a6c7: ec0342 l8ui a4, a3, 236 +4021a6ca: 840322 l8ui a2, a3, 132 +4021a6cd: eb0332 l8ui a3, a3, 235 +4021a6d0: 012280 slli a2, a2, 24 +4021a6d3: 312820 srai a2, a2, 24 +4021a6d6: 013380 slli a3, a3, 24 +4021a6d9: 313830 srai a3, a3, 24 +4021a6dc: 932340 movnez a2, a3, a4 +4021a6df: f00d ret.n +4021a6e1: 000000 ill + +4021a6e4 : +4021a6e4: f0c112 addi a1, a1, -16 +4021a6e7: 0109 s32i.n a0, a1, 0 +4021a6e9: ffd745 call0 4021a460 +4021a6ec: ebb001 l32r a0, 402155ac +4021a6ef: e84022 s8i a2, a0, 232 +4021a6f2: 0108 l32i.n a0, a1, 0 +4021a6f4: 10c112 addi a1, a1, 16 +4021a6f7: f00d ret.n +4021a6f9: 000000 ill + +4021a6fc : +4021a6fc: 040c movi.n a4, 0 +4021a6fe: 020c movi.n a2, 0 +4021a700: eecc51 l32r a5, 40216230 +4021a703: c70c movi.n a7, 12 +4021a705: 0020c0 memw +4021a708: 841b addi.n a8, a4, 1 +4021a70a: 8c2562 l32i a6, a5, 0x230 +4021a70d: 1194e0 slli a9, a4, 2 +4021a710: 401900 ssl a9 +4021a713: 143060 extui a3, a6, 0, 2 +4021a716: 744080 extui a4, a8, 0, 8 +4021a719: 416860 srli a6, a6, 8 +4021a71c: 106670 and a6, a6, a7 +4021a71f: 336a add.n a3, a3, a6 +4021a721: a13300 sll a3, a3 +4021a724: 223a add.n a2, a2, a3 +4021a726: db8466 bnei a4, 8, 4021a705 +4021a729: f00d ret.n +4021a72b: 0e0000 excw +4021a72e: f2 .byte 0xf2 +4021a72f: 3f .byte 0x3f + +4021a730 : +4021a730: eb9f31 l32r a3, 402155ac +4021a733: fffe21 l32r a2, 4021a72c +4021a736: 3c2332 l32i a3, a3, 240 +4021a739: 0020c0 memw +4021a73c: 112222 l32i a2, a2, 68 +4021a73f: 302230 xor a2, a2, a3 +4021a742: f00d ret.n + +4021a744 : +4021a744: 120c movi.n a2, 1 +4021a746: c0ec41 l32r a4, 4020aaf8 +4021a749: 050c movi.n a5, 0 +4021a74b: f0c112 addi a1, a1, -16 +4021a74e: eb9731 l32r a3, 402155ac +4021a751: 0109 s32i.n a0, a1, 0 +4021a753: 3308 l32i.n a0, a3, 12 +4021a755: c24352 s8i a5, a3, 194 +4021a758: 100040 and a0, a0, a4 +4021a75b: 3309 s32i.n a0, a3, 12 +4021a75d: fd9c45 call0 40218124 +4021a760: 0108 l32i.n a0, a1, 0 +4021a762: 10c112 addi a1, a1, 16 +4021a765: f00d ret.n + ... + +4021a768 : +4021a768: 630b addi.n a6, a3, -1 +4021a76a: 169c beqz.n a6, 4021a77f +4021a76c: 070c movi.n a7, 0 +4021a76e: 028d mov.n a8, a2 +4021a770: a09620 addx4 a9, a6, a2 +4021a773: 0858 l32i.n a5, a8, 0 +4021a775: 884b addi.n a8, a8, 4 +4021a777: 757a add.n a7, a5, a7 +4021a779: f69897 bne a8, a9, 4021a773 +4021a77c: 000046 j 4021a781 +4021a77f: 070c movi.n a7, 0 +4021a781: a02320 addx4 a2, a3, a2 +4021a784: fed222 addmi a2, a2, 0xfffffe00 +4021a787: f37c movi.n a3, -1 +4021a789: 303730 xor a3, a7, a3 +4021a78c: b48c beqz.n a4, 4021a79b +4021a78e: 7f2222 l32i a2, a2, 0x1fc +4021a791: 140c movi.n a4, 1 +4021a793: c02230 sub a2, a2, a3 +4021a796: 932420 movnez a2, a4, a2 +4021a799: f00d ret.n +4021a79b: 7f6232 s32i a3, a2, 0x1fc +4021a79e: 020c movi.n a2, 0 +4021a7a0: f00d ret.n + ... + +4021a7a4 : +4021a7a4: f0c112 addi a1, a1, -16 +4021a7a7: 0109 s32i.n a0, a1, 0 +4021a7a9: ef9231 l32r a3, 402165f4 +4021a7ac: ebb421 l32r a2, 4021567c +4021a7af: 0020c0 memw +4021a7b2: fa2202 l32i a0, a2, 0x3e8 +4021a7b5: 100030 and a0, a0, a3 +4021a7b8: 0020c0 memw +4021a7bb: fa6202 s32i a0, a2, 0x3e8 +4021a7be: 520c movi.n a2, 5 +4021a7c0: aab701 l32r a0, 4020529c +4021a7c3: 0000c0 callx0 a0 +4021a7c6: f1a092 movi a9, 241 +4021a7c9: 00ac72 movi a7, 0xfffffc00 +4021a7cc: ebae51 l32r a5, 40215684 +4021a7cf: 0020c0 memw +4021a7d2: d588 l32i.n a8, a5, 52 +4021a7d4: 108870 and a8, a8, a7 +4021a7d7: 208890 or a8, a8, a9 +4021a7da: 0020c0 memw +4021a7dd: d589 s32i.n a8, a5, 52 +4021a7df: f0a062 movi a6, 240 +4021a7e2: 0020c0 memw +4021a7e5: d548 l32i.n a4, a5, 52 +4021a7e7: 104470 and a4, a4, a7 +4021a7ea: 204460 or a4, a4, a6 +4021a7ed: 0020c0 memw +4021a7f0: d549 s32i.n a4, a5, 52 +4021a7f2: 520c movi.n a2, 5 +4021a7f4: aaaa01 l32r a0, 4020529c +4021a7f7: 0000c0 callx0 a0 +4021a7fa: 0108 l32i.n a0, a1, 0 +4021a7fc: 10c112 addi a1, a1, 16 +4021a7ff: f00d ret.n +4021a801: 000000 ill +4021a804: fff030 excw +4021a807: ff .byte 0xff + +4021a808 : +4021a808: ee8a41 l32r a4, 40216230 +4021a80b: 829c beqz.n a2, 4021a827 +4021a80d: 8aa462 movi a6, 0x48a +4021a810: fffd71 l32r a7, 4021a804 +4021a813: 0020c0 memw +4021a816: 882452 l32i a5, a4, 0x220 +4021a819: 105570 and a5, a5, a7 +4021a81c: 205560 or a5, a5, a6 +4021a81f: 0020c0 memw +4021a822: 886452 s32i a5, a4, 0x220 +4021a825: f00d ret.n +4021a827: 3faf32 movi a3, -193 +4021a82a: 0020c0 memw +4021a82d: 882422 l32i a2, a4, 0x220 +4021a830: 102230 and a2, a2, a3 +4021a833: 0020c0 memw +4021a836: 886422 s32i a2, a4, 0x220 +4021a839: f00d ret.n + ... + +4021a83c : +4021a83c: ef6d31 l32r a3, 402165f0 +4021a83f: 0020c0 memw +4021a842: 4f6322 s32i a2, a3, 0x13c +4021a845: f00d ret.n +4021a847: 8bca00 excw +4021a84a: fe .byte 0xfe +4021a84b: 3f .byte 0x3f +4021a84c: ce .byte 0xce +4021a84d: fe8b addi.n a15, a14, 8 +4021a84f: 3f .byte 0x3f +4021a850: 22f850 excw +4021a853: 40 .byte 0x40 + +4021a854 : +4021a854: e0c112 addi a1, a1, -32 +4021a857: 4109 s32i.n a0, a1, 16 +4021a859: fdaf05 call0 4021834c +4021a85c: eb5441 l32r a4, 402155ac +4021a85f: fffb01 l32r a0, 4021a84c +4021a862: 023d mov.n a3, a2 +4021a864: fff961 l32r a6, 4021a848 +4021a867: fffa21 l32r a2, 4021a850 +4021a86a: 009662 l16si a6, a6, 0 +4021a86d: 009002 l16si a0, a0, 0 +4021a870: 609472 l16si a7, a4, 192 +4021a873: 690452 l8ui a5, a4, 105 +4021a876: 331442 l16ui a4, a4, 102 +4021a879: 015580 slli a5, a5, 24 +4021a87c: 315850 srai a5, a5, 24 +4021a87f: 0109 s32i.n a0, a1, 0 +4021a881: 9df201 l32r a0, 4020204c +4021a884: 0000c0 callx0 a0 +4021a887: 4108 l32i.n a0, a1, 16 +4021a889: 20c112 addi a1, a1, 32 +4021a88c: f00d ret.n + ... + +4021a890 : +4021a890: 090c movi.n a9, 0 +4021a892: ecd0b1 l32r a11, 40215bd4 +4021a895: a29a add.n a10, a2, a9 +4021a897: 9089b0 addx2 a8, a9, a11 +4021a89a: 069882 l16si a8, a8, 12 +4021a89d: 004a82 s8i a8, a10, 0 +4021a8a0: 859a add.n a8, a5, a9 +4021a8a2: 90a990 addx2 a10, a9, a9 +4021a8a5: 90aab0 addx2 a10, a10, a11 +4021a8a8: 991b addi.n a9, a9, 1 +4021a8aa: 3d0aa2 l8ui a10, a10, 61 +4021a8ad: 0048a2 s8i a10, a8, 0 +4021a8b0: 749090 extui a9, a9, 0, 8 +4021a8b3: de4966 bnei a9, 4, 4021a895 +4021a8b6: eb3da1 l32r a10, 402155ac +4021a8b9: ffe391 l32r a9, 4021a848 +4021a8bc: fa0a52 l8ui a5, a10, 250 +4021a8bf: 004352 s8i a5, a3, 0 +4021a8c2: fb0a22 l8ui a2, a10, 251 +4021a8c5: 014322 s8i a2, a3, 1 +4021a8c8: 331ab2 l16ui a11, a10, 102 +4021a8cb: 0054b2 s16i a11, a4, 0 +4021a8ce: 690aa2 l8ui a10, a10, 105 +4021a8d1: 0046a2 s8i a10, a6, 0 +4021a8d4: 009992 l16si a9, a9, 0 +4021a8d7: 005792 s16i a9, a7, 0 +4021a8da: f00d ret.n + +4021a8dc : +4021a8dc: eb3421 l32r a2, 402155ac +4021a8df: 1d9222 l16si a2, a2, 58 +4021a8e2: f00d ret.n + +4021a8e4 : +4021a8e4: eb3251 l32r a5, 402155ac +4021a8e7: ffd941 l32r a4, 4021a84c +4021a8ea: 609552 l16si a5, a5, 192 +4021a8ed: 005252 s16i a5, a2, 0 +4021a8f0: 009442 l16si a4, a4, 0 +4021a8f3: 005342 s16i a4, a3, 0 +4021a8f6: f00d ret.n + +4021a8f8 : +4021a8f8: f0c112 addi a1, a1, -16 +4021a8fb: 0109 s32i.n a0, a1, 0 +4021a8fd: eb2b01 l32r a0, 402155ac +4021a900: f44022 s8i a2, a0, 244 +4021a903: 62cc bnez.n a2, 4021a90d +4021a905: 020c movi.n a2, 0 +4021a907: 0002c5 call0 4021a934 +4021a90a: 000706 j 4021a92a +4021a90d: f50042 l8ui a4, a0, 245 +4021a910: f2c321 l32r a2, 4021741c +4021a913: 94cc bnez.n a4, 4021a920 +4021a915: 150c movi.n a5, 1 +4021a917: 240262 l8ui a6, a2, 36 +4021a91a: 254262 s8i a6, a2, 37 +4021a91d: f54052 s8i a5, a0, 245 +4021a920: 403c movi.n a0, 52 +4021a922: 012037 blt a0, a3, 4021a927 +4021a925: 030d mov.n a0, a3 +4021a927: 264202 s8i a0, a2, 38 +4021a92a: 0108 l32i.n a0, a1, 0 +4021a92c: 10c112 addi a1, a1, 16 +4021a92f: f00d ret.n +4021a931: 000000 ill + +4021a934 : +4021a934: f0c112 addi a1, a1, -16 +4021a937: 0109 s32i.n a0, a1, 0 +4021a939: 281266 bnei a2, 1, 4021a965 +4021a93c: 120c movi.n a2, 1 +4021a93e: fe65c5 call0 40218f9c +4021a941: 66a022 movi a2, 102 +4021a944: 330c movi.n a3, 3 +4021a946: 140c movi.n a4, 1 +4021a948: eb1901 l32r a0, 402155ac +4021a94b: 550c movi.n a5, 5 +4021a94d: 0008 l32i.n a0, a0, 0 +4021a94f: 060c movi.n a6, 0 +4021a951: 272002 l32i a0, a0, 156 +4021a954: c73c movi.n a7, 60 +4021a956: 0000c0 callx0 a0 +4021a959: f2b021 l32r a2, 4021741c +4021a95c: 260222 l8ui a2, a2, 38 +4021a95f: ffd3c5 call0 4021a69c +4021a962: 000986 j 4021a98c +4021a965: 220c movi.n a2, 2 +4021a967: fe6345 call0 40218f9c +4021a96a: 66a022 movi a2, 102 +4021a96d: 330c movi.n a3, 3 +4021a96f: 140c movi.n a4, 1 +4021a971: eb0e71 l32r a7, 402155ac +4021a974: 550c movi.n a5, 5 +4021a976: 0708 l32i.n a0, a7, 0 +4021a978: 060c movi.n a6, 0 +4021a97a: 272002 l32i a0, a0, 156 +4021a97d: 390772 l8ui a7, a7, 57 +4021a980: 0000c0 callx0 a0 +4021a983: f2a621 l32r a2, 4021741c +4021a986: 250222 l8ui a2, a2, 37 +4021a989: ffd105 call0 4021a69c +4021a98c: 0108 l32i.n a0, a1, 0 +4021a98e: 10c112 addi a1, a1, 16 +4021a991: f00d ret.n +4021a993: 000000 ill +4021a996: a5fe00 extui a15, a0, 30, 11 +4021a999: fe8a add.n a15, a14, a8 +4021a99b: 3f .byte 0x3f +4021a99c: 8aac beqz.n a10, 4021a9c8 +4021a99e: fe .byte 0xfe +4021a99f: 3f .byte 0x3f +4021a9a0: 8aa8 l32i.n a10, a10, 32 +4021a9a2: fe .byte 0xfe +4021a9a3: 3f .byte 0x3f + +4021a9a4 : +4021a9a4: f0c112 addi a1, a1, -16 +4021a9a7: 1a0c movi.n a10, 1 +4021a9a9: 11c9 s32i.n a12, a1, 4 +4021a9ab: eb00c1 l32r a12, 402155ac +4021a9ae: 0109 s32i.n a0, a1, 0 +4021a9b0: f64ca2 s8i a10, a12, 246 +4021a9b3: d97c movi.n a9, -3 +4021a9b5: ee1d51 l32r a5, 4021622c +4021a9b8: eb3081 l32r a8, 40215678 +4021a9bb: 0020c0 memw +4021a9be: 9c2872 l32i a7, a8, 0x270 +4021a9c1: 107790 and a7, a7, a9 +4021a9c4: 0020c0 memw +4021a9c7: 9c6872 s32i a7, a8, 0x270 +4021a9ca: ef0861 l32r a6, 402165ec +4021a9cd: 0020c0 memw +4021a9d0: 862542 l32i a4, a5, 0x218 +4021a9d3: 204460 or a4, a4, a6 +4021a9d6: 0020c0 memw +4021a9d9: 866542 s32i a4, a5, 0x218 +4021a9dc: ffee21 l32r a2, 4021a994 +4021a9df: ef0431 l32r a3, 402165f0 +4021a9e2: 0020c0 memw +4021a9e5: 040c movi.n a4, 0 +4021a9e7: 552c movi.n a5, 37 +4021a9e9: 446322 s32i a2, a3, 0x110 +4021a9ec: 0c08 l32i.n a0, a12, 0 +4021a9ee: 6aa022 movi a2, 106 +4021a9f1: 262002 l32i a0, a0, 152 +4021a9f4: 230c movi.n a3, 2 +4021a9f6: 0000c0 callx0 a0 +4021a9f9: ffa952 movi a5, 0xfffff9ff +4021a9fc: 00a442 movi a4, 0x400 +4021a9ff: ebd531 l32r a3, 40215954 +4021aa02: 0020c0 memw +4021aa05: d02322 l32i a2, a3, 0x340 +4021aa08: 102250 and a2, a2, a5 +4021aa0b: 202240 or a2, a2, a4 +4021aa0e: 0020c0 memw +4021aa11: 140c movi.n a4, 1 +4021aa13: ffe151 l32r a5, 4021a998 +4021aa16: d06322 s32i a2, a3, 0x340 +4021aa19: 0c08 l32i.n a0, a12, 0 +4021aa1b: 62a022 movi a2, 98 +4021aa1e: 130c movi.n a3, 1 +4021aa20: 262002 l32i a0, a0, 152 +4021aa23: 000552 l8ui a5, a5, 0 +4021aa26: 0000c0 callx0 a0 +4021aa29: 0c08 l32i.n a0, a12, 0 +4021aa2b: 372002 l32i a0, a0, 220 +4021aa2e: 0000c0 callx0 a0 +4021aa31: 0c08 l32i.n a0, a12, 0 +4021aa33: 382002 l32i a0, a0, 224 +4021aa36: ffd921 l32r a2, 4021a99c +4021aa39: 0000c0 callx0 a0 +4021aa3c: 0c08 l32i.n a0, a12, 0 +4021aa3e: 362002 l32i a0, a0, 216 +4021aa41: 0000c0 callx0 a0 +4021aa44: 0c08 l32i.n a0, a12, 0 +4021aa46: 232002 l32i a0, a0, 140 +4021aa49: 0000c0 callx0 a0 +4021aa4c: 6ba022 movi a2, 107 +4021aa4f: 230c movi.n a3, 2 +4021aa51: 0c08 l32i.n a0, a12, 0 +4021aa53: 140c movi.n a4, 1 +4021aa55: 262002 l32i a0, a0, 152 +4021aa58: 854c movi.n a5, 72 +4021aa5a: 0000c0 callx0 a0 +4021aa5d: 61a022 movi a2, 97 +4021aa60: 130c movi.n a3, 1 +4021aa62: 0c08 l32i.n a0, a12, 0 +4021aa64: 840c movi.n a4, 8 +4021aa66: 262002 l32i a0, a0, 152 +4021aa69: 151c movi.n a5, 17 +4021aa6b: 0000c0 callx0 a0 +4021aa6e: 6ca022 movi a2, 108 +4021aa71: 230c movi.n a3, 2 +4021aa73: 0c08 l32i.n a0, a12, 0 +4021aa75: 040c movi.n a4, 0 +4021aa77: 262002 l32i a0, a0, 152 +4021aa7a: 551c movi.n a5, 21 +4021aa7c: 0000c0 callx0 a0 +4021aa7f: 0c08 l32i.n a0, a12, 0 +4021aa81: 132002 l32i a0, a0, 76 +4021aa84: 0000c0 callx0 a0 +4021aa87: 67a022 movi a2, 103 +4021aa8a: 430c movi.n a3, 4 +4021aa8c: 440c movi.n a4, 4 +4021aa8e: 750c movi.n a5, 7 +4021aa90: 0c08 l32i.n a0, a12, 0 +4021aa92: 760c movi.n a6, 7 +4021aa94: 272002 l32i a0, a0, 156 +4021aa97: 170c movi.n a7, 1 +4021aa99: 0000c0 callx0 a0 +4021aa9c: 6aa022 movi a2, 106 +4021aa9f: 230c movi.n a3, 2 +4021aaa1: 0c08 l32i.n a0, a12, 0 +4021aaa3: 040c movi.n a4, 0 +4021aaa5: 262002 l32i a0, a0, 152 +4021aaa8: 952c movi.n a5, 41 +4021aaaa: 0000c0 callx0 a0 +4021aaad: 0020c0 memw +4021aab0: eddf21 l32r a2, 4021622c +4021aab3: eddf01 l32r a0, 40216230 +4021aab6: 962222 l32i a2, a2, 0x258 +4021aab9: 0020c0 memw +4021aabc: 8c2002 l32i a0, a0, 0x230 +4021aabf: 242d20 extui a2, a2, 13, 3 +4021aac2: 240000 extui a0, a0, 0, 3 +4021aac5: c2cc bnez.n a2, 4021aad5 +4021aac7: a0cc bnez.n a0, 4021aad5 +4021aac9: edda31 l32r a3, 40216234 +4021aacc: 0020c0 memw +4021aacf: eba141 l32r a4, 40215954 +4021aad2: c06432 s32i a3, a4, 0x300 +4021aad5: 61a022 movi a2, 97 +4021aad8: 130c movi.n a3, 1 +4021aada: 0c08 l32i.n a0, a12, 0 +4021aadc: 740c movi.n a4, 7 +4021aade: 262002 l32i a0, a0, 152 +4021aae1: 155c movi.n a5, 81 +4021aae3: 0000c0 callx0 a0 +4021aae6: 61a022 movi a2, 97 +4021aae9: 130c movi.n a3, 1 +4021aaeb: 240c movi.n a4, 2 +4021aaed: a0a062 movi a6, 160 +4021aaf0: 380c52 l8ui a5, a12, 56 +4021aaf3: 0c08 l32i.n a0, a12, 0 +4021aaf5: 205560 or a5, a5, a6 +4021aaf8: 262002 l32i a0, a0, 152 +4021aafb: 745050 extui a5, a5, 0, 8 +4021aafe: 0000c0 callx0 a0 +4021ab01: 66a022 movi a2, 102 +4021ab04: 330c movi.n a3, 3 +4021ab06: 140c movi.n a4, 1 +4021ab08: 064c movi.n a6, 64 +4021ab0a: 390c52 l8ui a5, a12, 57 +4021ab0d: 0c08 l32i.n a0, a12, 0 +4021ab0f: 205560 or a5, a5, a6 +4021ab12: 262002 l32i a0, a0, 152 +4021ab15: 745050 extui a5, a5, 0, 8 +4021ab18: 0000c0 callx0 a0 +4021ab1b: 290c movi.n a9, 2 +4021ab1d: 0020c0 memw +4021ab20: ead681 l32r a8, 40215678 +4021ab23: 9c2872 l32i a7, a8, 0x270 +4021ab26: 207790 or a7, a7, a9 +4021ab29: 0020c0 memw +4021ab2c: ee9821 l32r a2, 4021658c +4021ab2f: 9c6872 s32i a7, a8, 0x270 +4021ab32: 3c0c32 l8ui a3, a12, 60 +4021ab35: ee9601 l32r a0, 40216590 +4021ab38: 0000c0 callx0 a0 +4021ab3b: 64a022 movi a2, 100 +4021ab3e: 030c movi.n a3, 0 +4021ab40: 440c movi.n a4, 4 +4021ab42: 0c08 l32i.n a0, a12, 0 +4021ab44: ff9751 l32r a5, 4021a9a0 +4021ab47: 262002 l32i a0, a0, 152 +4021ab4a: 000552 l8ui a5, a5, 0 +4021ab4d: 0000c0 callx0 a0 +4021ab50: 64a022 movi a2, 100 +4021ab53: 030c movi.n a3, 0 +4021ab55: 740c movi.n a4, 7 +4021ab57: 0c08 l32i.n a0, a12, 0 +4021ab59: ff9151 l32r a5, 4021a9a0 +4021ab5c: 262002 l32i a0, a0, 152 +4021ab5f: 010552 l8ui a5, a5, 1 +4021ab62: 0000c0 callx0 a0 +4021ab65: 0c78 l32i.n a7, a12, 0 +4021ab67: c60c62 l8ui a6, a12, 198 +4021ab6a: 262772 l32i a7, a7, 152 +4021ab6d: e68c beqz.n a6, 4021ab7f +4021ab6f: 61a022 movi a2, 97 +4021ab72: 130c movi.n a3, 1 +4021ab74: 540c movi.n a4, 5 +4021ab76: efa052 movi a5, 239 +4021ab79: 0007c0 callx0 a7 +4021ab7c: 000306 j 4021ab8c +4021ab7f: 61a022 movi a2, 97 +4021ab82: 130c movi.n a3, 1 +4021ab84: 540c movi.n a4, 5 +4021ab86: e0a052 movi a5, 224 +4021ab89: 0007c0 callx0 a7 +4021ab8c: a90c82 l8ui a8, a12, 169 +4021ab8f: 071866 bnei a8, 1, 4021ab9a +4021ab92: 120c movi.n a2, 1 +4021ab94: fecdc5 call0 40219874 +4021ab97: 000106 j 4021ab9f +4021ab9a: 020c movi.n a2, 0 +4021ab9c: fecd45 call0 40219874 +4021ab9f: 120c movi.n a2, 1 +4021aba1: fd2501 l32r a0, 4021a038 +4021aba4: 0000c0 callx0 a0 +4021aba7: 090c movi.n a9, 0 +4021aba9: 0108 l32i.n a0, a1, 0 +4021abab: f64c92 s8i a9, a12, 246 +4021abae: 11c8 l32i.n a12, a1, 4 +4021abb0: 10c112 addi a1, a1, 16 +4021abb3: f00d ret.n +4021abb5: 000000 ill +4021abb8: 22f870 excw +4021abbb: 877c40 excw +4021abbe: fe .byte 0xfe +4021abbf: 3f .byte 0x3f +4021abc0: fe8784 excw +4021abc3: 3f .byte 0x3f +4021abc4: fe8790 excw +4021abc7: 3f .byte 0x3f + +4021abc8 : +4021abc8: fffc21 l32r a2, 4021abb8 +4021abcb: 84a432 movi a3, 0x484 +4021abce: 040c movi.n a4, 0 +4021abd0: fffb51 l32r a5, 4021abbc +4021abd3: fffb61 l32r a6, 4021abc0 +4021abd6: fffb71 l32r a7, 4021abc4 +4021abd9: f0c112 addi a1, a1, -16 +4021abdc: 0109 s32i.n a0, a1, 0 +4021abde: 9d1b01 l32r a0, 4020204c +4021abe1: 0000c0 callx0 a0 +4021abe4: 0108 l32i.n a0, a1, 0 +4021abe6: 10c112 addi a1, a1, 16 +4021abe9: f00d ret.n +4021abeb: f8a000 excw +4021abee: c04022 s8i a2, a0, 192 +4021abf1: 22f8 l32i.n a15, a2, 8 +4021abf3: f8e040 excw +4021abf6: 204022 s8i a2, a0, 32 +4021abf9: 22f9 s32i.n a15, a2, 8 +4021abfb: f95040 excw +4021abfe: 804022 s8i a2, a0, 128 +4021ac01: 22f9 s32i.n a15, a2, 8 +4021ac03: f9b040 excw +4021ac06: d04022 s8i a2, a0, 208 +4021ac09: 22f9 s32i.n a15, a2, 8 +4021ac0b: fa0040 excw +4021ac0e: 084022 s8i a2, a0, 8 +4021ac11: 22fa add.n a2, a2, a15 +4021ac13: fa1040 excw +4021ac16: 204022 s8i a2, a0, 32 +4021ac19: 22fa add.n a2, a2, a15 +4021ac1b: fa4040 excw +4021ac1e: 484022 s8i a2, a0, 72 +4021ac21: 22fa add.n a2, a2, a15 +4021ac23: fa5040 excw +4021ac26: 704022 s8i a2, a0, 112 +4021ac29: 22fa add.n a2, a2, a15 +4021ac2b: fa7840 excw +4021ac2e: 804022 s8i a2, a0, 128 +4021ac31: 22fa add.n a2, a2, a15 +4021ac33: fa9040 excw +4021ac36: a04022 s8i a2, a0, 160 +4021ac39: 22fa add.n a2, a2, a15 +4021ac3b: fab040 excw +4021ac3e: b84022 s8i a2, a0, 184 +4021ac41: 22fa add.n a2, a2, a15 +4021ac43: fac040 excw +4021ac46: d04022 s8i a2, a0, 208 +4021ac49: 22fa add.n a2, a2, a15 +4021ac4b: 8b4040 excw +4021ac4e: fe .byte 0xfe +4021ac4f: 3f .byte 0x3f +4021ac50: fad8 l32i.n a13, a10, 60 +4021ac52: e04022 s8i a2, a0, 224 +4021ac55: 22fa add.n a2, a2, a15 +4021ac57: fb0040 excw +4021ac5a: 22 .byte 0x22 +4021ac5b: 40 .byte 0x40 + +4021ac5c : +4021ac5c: d0c112 addi a1, a1, -48 +4021ac5f: 0561c2 s32i a12, a1, 20 +4021ac62: 0661d2 s32i a13, a1, 24 +4021ac65: 0761e2 s32i a14, a1, 28 +4021ac68: 81f9 s32i.n a15, a1, 32 +4021ac6a: 4109 s32i.n a0, a1, 16 +4021ac6c: facf05 call0 40215960 +4021ac6f: ffd341 l32r a4, 4021abbc +4021ac72: ffd351 l32r a5, 4021abc0 +4021ac75: ea4d31 l32r a3, 402155ac +4021ac78: ffd361 l32r a6, 4021abc4 +4021ac7b: 182302 l32i a0, a3, 96 +4021ac7e: 112280 slli a2, a2, 8 +4021ac81: 002a add.n a0, a0, a2 +4021ac83: 186302 s32i a0, a3, 96 +4021ac86: ffd921 l32r a2, 4021abec +4021ac89: 84a432 movi a3, 0x484 +4021ac8c: 9cf001 l32r a0, 4020204c +4021ac8f: 0000c0 callx0 a0 +4021ac92: ea4631 l32r a3, 402155ac +4021ac95: ffd621 l32r a2, 4021abf0 +4021ac98: 3338 l32i.n a3, a3, 12 +4021ac9a: 9cec01 l32r a0, 4020204c +4021ac9d: 0000c0 callx0 a0 +4021aca0: ea4381 l32r a8, 402155ac +4021aca3: ffd421 l32r a2, 4021abf4 +4021aca6: 2e9852 l16si a5, a8, 92 +4021aca9: 5e0862 l8ui a6, a8, 94 +4021acac: 331892 l16ui a9, a8, 102 +4021acaf: 3c0832 l8ui a3, a8, 60 +4021acb2: 5f0872 l8ui a7, a8, 95 +4021acb5: 3d0842 l8ui a4, a8, 61 +4021acb8: 017780 slli a7, a7, 24 +4021acbb: 014480 slli a4, a4, 24 +4021acbe: 013380 slli a3, a3, 24 +4021acc1: 313830 srai a3, a3, 24 +4021acc4: 0199 s32i.n a9, a1, 0 +4021acc6: 680892 l8ui a9, a8, 104 +4021acc9: 314840 srai a4, a4, 24 +4021accc: 019980 slli a9, a9, 24 +4021accf: 319890 srai a9, a9, 24 +4021acd2: 1199 s32i.n a9, a1, 4 +4021acd4: 690882 l8ui a8, a8, 105 +4021acd7: 317870 srai a7, a7, 24 +4021acda: 018880 slli a8, a8, 24 +4021acdd: 318880 srai a8, a8, 24 +4021ace0: 2189 s32i.n a8, a1, 8 +4021ace2: 9cda01 l32r a0, 4020204c +4021ace5: 0000c0 callx0 a0 +4021ace8: ea3141 l32r a4, 402155ac +4021aceb: ffc321 l32r a2, 4021abf8 +4021acee: 380432 l8ui a3, a4, 56 +4021acf1: 390442 l8ui a4, a4, 57 +4021acf4: 9cd601 l32r a0, 4020204c +4021acf7: 0000c0 callx0 a0 +4021acfa: ea2c51 l32r a5, 402155ac +4021acfd: 182552 l32i a5, a5, 96 +4021ad00: ffbf21 l32r a2, 4021abfc +4021ad03: f53050 extui a3, a5, 16, 16 +4021ad06: 744850 extui a4, a5, 8, 8 +4021ad09: 745050 extui a5, a5, 0, 8 +4021ad0c: 9cd001 l32r a0, 4020204c +4021ad0f: 0000c0 callx0 a0 +4021ad12: ea2641 l32r a4, 402155ac +4021ad15: 331442 l16ui a4, a4, 102 +4021ad18: ffba21 l32r a2, 4021ac00 +4021ad1b: 413540 srli a3, a4, 5 +4021ad1e: 444040 extui a4, a4, 0, 5 +4021ad21: 9cca01 l32r a0, 4020204c +4021ad24: 0000c0 callx0 a0 +4021ad27: 0c0c movi.n a12, 0 +4021ad29: ffb6d1 l32r a13, 4021ac04 +4021ad2c: f5e7e1 l32r a14, 402184c8 +4021ad2f: 0d2d mov.n a2, a13 +4021ad31: 903ce0 addx2 a3, a12, a14 +4021ad34: 009332 l16si a3, a3, 0 +4021ad37: 9cc501 l32r a0, 4020204c +4021ad3a: 0000c0 callx0 a0 +4021ad3d: cc1b addi.n a12, a12, 1 +4021ad3f: 74c0c0 extui a12, a12, 0, 8 +4021ad42: e94c66 bnei a12, 4, 4021ad2f +4021ad45: ea1941 l32r a4, 402155ac +4021ad48: ffb021 l32r a2, 4021ac08 +4021ad4b: 1d9432 l16si a3, a4, 58 +4021ad4e: 329442 l16si a4, a4, 100 +4021ad51: 9cbe01 l32r a0, 4020204c +4021ad54: 0000c0 callx0 a0 +4021ad57: ffad21 l32r a2, 4021ac0c +4021ad5a: 9cbc01 l32r a0, 4020204c +4021ad5d: 0000c0 callx0 a0 +4021ad60: 0c0c movi.n a12, 0 +4021ad62: ffabe1 l32r a14, 4021ac10 +4021ad65: eb9bd1 l32r a13, 40215bd4 +4021ad68: 0e2d mov.n a2, a14 +4021ad6a: 3cda add.n a3, a12, a13 +4021ad6c: 200332 l8ui a3, a3, 32 +4021ad6f: 9cb701 l32r a0, 4020204c +4021ad72: 0000c0 callx0 a0 +4021ad75: cc1b addi.n a12, a12, 1 +4021ad77: 74c0c0 extui a12, a12, 0, 8 +4021ad7a: eaac66 bnei a12, 12, 4021ad68 +4021ad7d: ffa521 l32r a2, 4021ac14 +4021ad80: 9cb301 l32r a0, 4020204c +4021ad83: 0000c0 callx0 a0 +4021ad86: ffa421 l32r a2, 4021ac18 +4021ad89: 9cb001 l32r a0, 4020204c +4021ad8c: 0000c0 callx0 a0 +4021ad8f: ffa3e1 l32r a14, 4021ac1c +4021ad92: 0c0c movi.n a12, 0 +4021ad94: 0e2d mov.n a2, a14 +4021ad96: 903cd0 addx2 a3, a12, a13 +4021ad99: 069332 l16si a3, a3, 12 +4021ad9c: 9cac01 l32r a0, 4020204c +4021ad9f: 0000c0 callx0 a0 +4021ada2: cc1b addi.n a12, a12, 1 +4021ada4: 74c0c0 extui a12, a12, 0, 8 +4021ada7: e94c66 bnei a12, 4, 4021ad94 +4021adaa: ff9d21 l32r a2, 4021ac20 +4021adad: 9ca701 l32r a0, 4020204c +4021adb0: 0000c0 callx0 a0 +4021adb3: ff9c21 l32r a2, 4021ac24 +4021adb6: 9ca501 l32r a0, 4020204c +4021adb9: 0000c0 callx0 a0 +4021adbc: 0c0c movi.n a12, 0 +4021adbe: ff9af1 l32r a15, 4021ac28 +4021adc1: 8e1c movi.n a14, 24 +4021adc3: 3cda add.n a3, a12, a13 +4021adc5: 380332 l8ui a3, a3, 56 +4021adc8: 0f2d mov.n a2, a15 +4021adca: 013380 slli a3, a3, 24 +4021adcd: 313830 srai a3, a3, 24 +4021add0: 9c9f01 l32r a0, 4020204c +4021add3: 0000c0 callx0 a0 +4021add6: cc1b addi.n a12, a12, 1 +4021add8: 74c0c0 extui a12, a12, 0, 8 +4021addb: e49ce7 bne a12, a14, 4021adc3 +4021adde: ff9321 l32r a2, 4021ac2c +4021ade1: 9c9a01 l32r a0, 4020204c +4021ade4: 0000c0 callx0 a0 +4021ade7: e9f101 l32r a0, 402155ac +4021adea: 101002 l16ui a0, a0, 32 +4021aded: 413800 srli a3, a0, 8 +4021adf0: 014080 slli a4, a0, 24 +4021adf3: 314840 srai a4, a4, 24 +4021adf6: 013380 slli a3, a3, 24 +4021adf9: 313830 srai a3, a3, 24 +4021adfc: 08b3a6 blti a3, 16, 4021ae08 +4021adff: e0c332 addi a3, a3, -32 +4021ae02: 013380 slli a3, a3, 24 +4021ae05: 313830 srai a3, a3, 24 +4021ae08: 08c4a6 blti a4, 32, 4021ae14 +4021ae0b: c0c442 addi a4, a4, -64 +4021ae0e: 014480 slli a4, a4, 24 +4021ae11: 314840 srai a4, a4, 24 +4021ae14: ff8721 l32r a2, 4021ac30 +4021ae17: 9c8d01 l32r a0, 4020204c +4021ae1a: 0000c0 callx0 a0 +4021ae1d: ff8521 l32r a2, 4021ac34 +4021ae20: 9c8b01 l32r a0, 4020204c +4021ae23: 0000c0 callx0 a0 +4021ae26: 0c0c movi.n a12, 0 +4021ae28: ff84e1 l32r a14, 4021ac38 +4021ae2b: 903cd0 addx2 a3, a12, a13 +4021ae2e: 021332 l16ui a3, a3, 4 +4021ae31: 0e2d mov.n a2, a14 +4021ae33: 414830 srli a4, a3, 8 +4021ae36: 014480 slli a4, a4, 24 +4021ae39: 013380 slli a3, a3, 24 +4021ae3c: 313830 srai a3, a3, 24 +4021ae3f: 314840 srai a4, a4, 24 +4021ae42: 9c8201 l32r a0, 4020204c +4021ae45: 0000c0 callx0 a0 +4021ae48: cc1b addi.n a12, a12, 1 +4021ae4a: 74c0c0 extui a12, a12, 0, 8 +4021ae4d: da4c66 bnei a12, 4, 4021ae2b +4021ae50: ff7b21 l32r a2, 4021ac3c +4021ae53: 9c7e01 l32r a0, 4020204c +4021ae56: 0000c0 callx0 a0 +4021ae59: 0c0c movi.n a12, 0 +4021ae5b: 900cd0 addx2 a0, a12, a13 +4021ae5e: 0b1002 l16ui a0, a0, 22 +4021ae61: 54e000 extui a14, a0, 0, 6 +4021ae64: 44f600 extui a15, a0, 6, 5 +4021ae67: 08bfa6 blti a15, 16, 4021ae73 +4021ae6a: e0cff2 addi a15, a15, -32 +4021ae6d: 01ff80 slli a15, a15, 24 +4021ae70: 31f8f0 srai a15, a15, 24 +4021ae73: 08cea6 blti a14, 32, 4021ae7f +4021ae76: c0cee2 addi a14, a14, -64 +4021ae79: 01ee80 slli a14, a14, 24 +4021ae7c: 31e8e0 srai a14, a14, 24 +4021ae7f: 7ccc bnez.n a12, 4021ae8a +4021ae81: ff6f21 l32r a2, 4021ac40 +4021ae84: 9c7201 l32r a0, 4020204c +4021ae87: 0000c0 callx0 a0 +4021ae8a: 0e4d mov.n a4, a14 +4021ae8c: 0f3d mov.n a3, a15 +4021ae8e: ff6d21 l32r a2, 4021ac44 +4021ae91: 9c6e01 l32r a0, 4020204c +4021ae94: 0000c0 callx0 a0 +4021ae97: 084c66 bnei a12, 4, 4021aea3 +4021ae9a: ff6b21 l32r a2, 4021ac48 +4021ae9d: 9c6b01 l32r a0, 4020204c +4021aea0: 0000c0 callx0 a0 +4021aea3: cc1b addi.n a12, a12, 1 +4021aea5: 74c0c0 extui a12, a12, 0, 8 +4021aea8: af5c66 bnei a12, 5, 4021ae5b +4021aeab: ff68d1 l32r a13, 4021ac4c +4021aeae: 102dd2 l32i a13, a13, 64 +4021aeb1: 0c0c movi.n a12, 0 +4021aeb3: 01ddd2 addmi a13, a13, 0x100 +4021aeb6: 91d9 s32i.n a13, a1, 36 +4021aeb8: 91d8 l32i.n a13, a1, 36 +4021aeba: b0dcd0 addx8 a13, a12, a13 +4021aebd: 0de8 l32i.n a14, a13, 0 +4021aebf: 1dd8 l32i.n a13, a13, 4 +4021aec1: 8409e0 extui a0, a14, 9, 9 +4021aec4: a109 s32i.n a0, a1, 40 +4021aec6: 84f9d0 extui a15, a13, 9, 9 +4021aec9: 84e0e0 extui a14, a14, 0, 9 +4021aecc: 84d0d0 extui a13, a13, 0, 9 +4021aecf: 9ccc bnez.n a12, 4021aedc +4021aed1: ff5f21 l32r a2, 4021ac50 +4021aed4: 9c5e01 l32r a0, 4020204c +4021aed7: 0000c0 callx0 a0 +4021aeda: a108 l32i.n a0, a1, 40 +4021aedc: 0d6d mov.n a6, a13 +4021aede: 0e5d mov.n a5, a14 +4021aee0: 0f4d mov.n a4, a15 +4021aee2: ff5c21 l32r a2, 4021ac54 +4021aee5: 003d mov.n a3, a0 +4021aee7: 9c5901 l32r a0, 4020204c +4021aeea: 0000c0 callx0 a0 +4021aeed: de1c movi.n a14, 29 +4021aeef: 089ce7 bne a12, a14, 4021aefb +4021aef2: ff5921 l32r a2, 4021ac58 +4021aef5: 9c5501 l32r a0, 4020204c +4021aef8: 0000c0 callx0 a0 +4021aefb: ef1c movi.n a15, 30 +4021aefd: cc1b addi.n a12, a12, 1 +4021aeff: 74c0c0 extui a12, a12, 0, 8 +4021af02: b29cf7 bne a12, a15, 4021aeb8 +4021af05: 51c8 l32i.n a12, a1, 20 +4021af07: 61d8 l32i.n a13, a1, 24 +4021af09: 71e8 l32i.n a14, a1, 28 +4021af0b: 81f8 l32i.n a15, a1, 32 +4021af0d: 4108 l32i.n a0, a1, 16 +4021af0f: 30c112 addi a1, a1, 48 +4021af12: f00d ret.n +4021af14: fe8410 excw +4021af17: 3f .byte 0x3f + +4021af18 : +4021af18: fcc242 addi a4, a2, -4 +4021af1b: 031c movi.n a3, 16 +4021af1d: 093347 bltu a3, a4, 4021af2a +4021af20: fffd31 l32r a3, 4021af14 +4021af23: 223a add.n a2, a2, a3 +4021af25: 7c0222 l8ui a2, a2, 124 +4021af28: f00d ret.n +4021af2a: 120c movi.n a2, 1 +4021af2c: f00d ret.n +4021af2e: b00000 addx8 a0, a0, a0 +4021af31: 3ffe84 excw + +4021af34 : +4021af34: 0942f6 bgeui a2, 4, 4021af41 +4021af37: fffe31 l32r a3, 4021af30 +4021af3a: 223a add.n a2, a2, a3 +4021af3c: 000222 l8ui a2, a2, 0 +4021af3f: f00d ret.n +4021af41: 021c movi.n a2, 16 +4021af43: f00d ret.n +4021af45: 000000 ill +4021af48: fe8006 j 4021a94c +4021af4b: 3f .byte 0x3f + +4021af4c : +4021af4c: e0c112 addi a1, a1, -32 +4021af4f: 31d9 s32i.n a13, a1, 12 +4021af51: 51f9 s32i.n a15, a1, 20 +4021af53: 21c9 s32i.n a12, a1, 8 +4021af55: 41e9 s32i.n a14, a1, 16 +4021af57: 1109 s32i.n a0, a1, 4 +4021af59: 03ed mov.n a14, a3 +4021af5b: 0208 l32i.n a0, a2, 0 +4021af5d: 02cd mov.n a12, a2 +4021af5f: 050300 extui a0, a0, 19, 1 +4021af62: 08b056 bnez a0, 4021aff1 +4021af65: e991f1 l32r a15, 402155ac +4021af68: fff821 l32r a2, 4021af48 +4021af6b: 0f08 l32i.n a0, a15, 0 +4021af6d: 001222 l16ui a2, a2, 0 +4021af70: 292002 l32i a0, a0, 164 +4021af73: 442020 extui a2, a2, 0, 5 +4021af76: 0000c0 callx0 a0 +4021af79: 120c movi.n a2, 1 +4021af7b: 0f08 l32i.n a0, a15, 0 +4021af7d: 130c movi.n a3, 1 +4021af7f: 2b2002 l32i a0, a0, 172 +4021af82: f41c movi.n a4, 31 +4021af84: 0000c0 callx0 a0 +4021af87: 0d0c movi.n a13, 0 +4021af89: 0d2d mov.n a2, a13 +4021af8b: fffa85 call0 4021af34 +4021af8e: f4a142 movi a4, 0x1f4 +4021af91: c50c movi.n a5, 12 +4021af93: 016d mov.n a6, a1 +4021af95: 0f08 l32i.n a0, a15, 0 +4021af97: 023d mov.n a3, a2 +4021af99: 3a2002 l32i a0, a0, 232 +4021af9c: 020c movi.n a2, 0 +4021af9e: 0000c0 callx0 a0 +4021afa1: 000102 l8ui a0, a1, 0 +4021afa4: 010122 l8ui a2, a1, 1 +4021afa7: 010080 slli a0, a0, 24 +4021afaa: 012280 slli a2, a2, 24 +4021afad: 312820 srai a2, a2, 24 +4021afb0: 310800 srai a0, a0, 24 +4021afb3: 112280 slli a2, a2, 8 +4021afb6: 200020 or a0, a0, a2 +4021afb9: 902de0 addx2 a2, a13, a14 +4021afbc: 005202 s16i a0, a2, 0 +4021afbf: dd1b addi.n a13, a13, 1 +4021afc1: 74d0d0 extui a13, a13, 0, 8 +4021afc4: c14d66 bnei a13, 4, 4021af89 +4021afc7: 013d mov.n a3, a1 +4021afc9: ffdf21 l32r a2, 4021af48 +4021afcc: 140c movi.n a4, 1 +4021afce: 001222 l16ui a2, a2, 0 +4021afd1: 000d05 call0 4021b0a4 +4021afd4: ffdd21 l32r a2, 4021af48 +4021afd7: 013d mov.n a3, a1 +4021afd9: 001222 l16ui a2, a2, 0 +4021afdc: 000285 call0 4021b008 +4021afdf: 0f08 l32i.n a0, a15, 0 +4021afe1: 2a2002 l32i a0, a0, 168 +4021afe4: b64fd1 l32r a13, 40208920 +4021afe7: 0000c0 callx0 a0 +4021afea: 0c28 l32i.n a2, a12, 0 +4021afec: 2022d0 or a2, a2, a13 +4021afef: 0c29 s32i.n a2, a12, 0 +4021aff1: 21c8 l32i.n a12, a1, 8 +4021aff3: 31d8 l32i.n a13, a1, 12 +4021aff5: 41e8 l32i.n a14, a1, 16 +4021aff7: 51f8 l32i.n a15, a1, 20 +4021aff9: 1108 l32i.n a0, a1, 4 +4021affb: 20c112 addi a1, a1, 32 +4021affe: f00d ret.n +4021b000: ff .byte 0xff +4021b001: 3f .byte 0x3f +4021b002: fff000 excw +4021b005: fff000 excw + +4021b008 : +4021b008: 119280 slli a9, a2, 8 +4021b00b: e99c81 l32r a8, 4021567c +4021b00e: fffcb1 l32r a11, 4021b000 +4021b011: bc78a1 l32r a10, 4020a1f4 +4021b014: fffc71 l32r a7, 4021b004 +4021b017: f0c112 addi a1, a1, -16 +4021b01a: 11c9 s32i.n a12, a1, 4 +4021b01c: 31e9 s32i.n a14, a1, 12 +4021b01e: 0109 s32i.n a0, a1, 0 +4021b020: 21d9 s32i.n a13, a1, 8 +4021b022: 000c movi.n a0, 0 +4021b024: 8d1c movi.n a13, 24 +4021b026: a05080 addx4 a5, a0, a8 +4021b029: 0020c0 memw +4021b02c: c12542 l32i a4, a5, 0x304 +4021b02f: 104470 and a4, a4, a7 +4021b032: 204490 or a4, a4, a9 +4021b035: 0020c0 memw +4021b038: c16542 s32i a4, a5, 0x304 +4021b03b: 412100 srli a2, a0, 1 +4021b03e: a02280 addx4 a2, a2, a8 +4021b041: 010362 l8ui a6, a3, 1 +4021b044: 000352 l8ui a5, a3, 0 +4021b047: 016680 slli a6, a6, 24 +4021b04a: 015580 slli a5, a5, 24 +4021b04d: 315850 srai a5, a5, 24 +4021b050: 316860 srai a6, a6, 24 +4021b053: 1d6007 bbci a0, 0, 4021b074 +4021b056: 11e520 slli a14, a5, 14 +4021b059: 0146b0 slli a4, a6, 21 +4021b05c: 0020c0 memw +4021b05f: 8122c2 l32i a12, a2, 0x204 +4021b062: 10ccb0 and a12, a12, a11 +4021b065: 20cc40 or a12, a12, a4 +4021b068: 20cce0 or a12, a12, a14 +4021b06b: 0020c0 memw +4021b06e: 8162c2 s32i a12, a2, 0x204 +4021b071: 0005c6 j 4021b08c +4021b074: 114690 slli a4, a6, 7 +4021b077: 0020c0 memw +4021b07a: 8122e2 l32i a14, a2, 0x204 +4021b07d: 10eea0 and a14, a14, a10 +4021b080: 20ee40 or a14, a14, a4 +4021b083: 20ee50 or a14, a14, a5 +4021b086: 0020c0 memw +4021b089: 8162e2 s32i a14, a2, 0x204 +4021b08c: 001b addi.n a0, a0, 1 +4021b08e: 740000 extui a0, a0, 0, 8 +4021b091: 9190d7 bne a0, a13, 4021b026 +4021b094: 11c8 l32i.n a12, a1, 4 +4021b096: 21d8 l32i.n a13, a1, 8 +4021b098: 31e8 l32i.n a14, a1, 12 +4021b09a: 0108 l32i.n a0, a1, 0 +4021b09c: 10c112 addi a1, a1, 16 +4021b09f: f00d ret.n +4021b0a1: 000000 ill + +4021b0a4 : +4021b0a4: 442020 extui a2, a2, 0, 5 +4021b0a7: f0c112 addi a1, a1, -16 +4021b0aa: 0149 s32i.n a4, a1, 0 +4021b0ac: 21c9 s32i.n a12, a1, 8 +4021b0ae: 1109 s32i.n a0, a1, 4 +4021b0b0: 03cd mov.n a12, a3 +4021b0b2: ffe645 call0 4021af18 +4021b0b5: eac741 l32r a4, 40215bd4 +4021b0b8: 902240 addx2 a2, a2, a4 +4021b0bb: 021232 l16ui a3, a2, 4 +4021b0be: 004c32 s8i a3, a12, 0 +4021b0c1: 021222 l16ui a2, a2, 4 +4021b0c4: 0108 l32i.n a0, a1, 0 +4021b0c6: 412820 srli a2, a2, 8 +4021b0c9: 014c22 s8i a2, a12, 1 +4021b0cc: 40bc beqz.n a0, 4021b104 +4021b0ce: 020c movi.n a2, 0 +4021b0d0: 230c movi.n a3, 2 +4021b0d2: 000c42 l8ui a4, a12, 0 +4021b0d5: e93501 l32r a0, 402155ac +4021b0d8: 014480 slli a4, a4, 24 +4021b0db: 0008 l32i.n a0, a0, 0 +4021b0dd: 314840 srai a4, a4, 24 +4021b0e0: 2b2002 l32i a0, a0, 172 +4021b0e3: f44040 extui a4, a4, 0, 16 +4021b0e6: 0000c0 callx0 a0 +4021b0e9: 120c movi.n a2, 1 +4021b0eb: 230c movi.n a3, 2 +4021b0ed: 010c42 l8ui a4, a12, 1 +4021b0f0: e92f01 l32r a0, 402155ac +4021b0f3: 014480 slli a4, a4, 24 +4021b0f6: 0008 l32i.n a0, a0, 0 +4021b0f8: 314840 srai a4, a4, 24 +4021b0fb: 2b2002 l32i a0, a0, 172 +4021b0fe: f44040 extui a4, a4, 0, 16 +4021b101: 0000c0 callx0 a0 +4021b104: 21c8 l32i.n a12, a1, 8 +4021b106: 1108 l32i.n a0, a1, 4 +4021b108: 10c112 addi a1, a1, 16 +4021b10b: f00d ret.n +4021b10d: 000000 ill +4021b110: 8438 l32i.n a3, a4, 32 +4021b112: fe .byte 0xfe +4021b113: 3f .byte 0x3f + +4021b114 : +4021b114: 320b addi.n a3, a2, -1 +4021b116: 0963f6 bgeui a3, 6, 4021b123 +4021b119: fffd31 l32r a3, 4021b110 +4021b11c: 223a add.n a2, a2, a3 +4021b11e: 7f0222 l8ui a2, a2, 127 +4021b121: f00d ret.n +4021b123: 520c movi.n a2, 5 +4021b125: f00d ret.n + ... + +4021b128 : +4021b128: e0c112 addi a1, a1, -32 +4021b12b: 0109 s32i.n a0, a1, 0 +4021b12d: 11c9 s32i.n a12, a1, 4 +4021b12f: 21d9 s32i.n a13, a1, 8 +4021b131: 41f9 s32i.n a15, a1, 16 +4021b133: 31e9 s32i.n a14, a1, 12 +4021b135: 03fd mov.n a15, a3 +4021b137: 02ed mov.n a14, a2 +4021b139: 0013d2 l16ui a13, a3, 0 +4021b13c: 000222 l8ui a2, a2, 0 +4021b13f: 24c9d0 extui a12, a13, 9, 3 +4021b142: 3430d0 extui a3, a13, 0, 4 +4021b145: 010280 slli a0, a2, 24 +4021b148: 310800 srai a0, a0, 24 +4021b14b: 04d4d0 extui a13, a13, 4, 1 +4021b14e: 90ddd0 addx2 a13, a13, a13 +4021b151: 90dd30 addx2 a13, a13, a3 +4021b154: 74d0d0 extui a13, a13, 0, 8 +4021b157: 7c10a6 blti a0, 1, 4021b1d7 +4021b15a: 104d66 bnei a13, 4, 4021b16e +4021b15d: f8c002 addi a0, a0, -8 +4021b160: dd2b addi.n a13, a13, 2 +4021b162: 74d0d0 extui a13, a13, 0, 8 +4021b165: 004e02 s8i a0, a14, 0 +4021b168: 010080 slli a0, a0, 24 +4021b16b: 310800 srai a0, a0, 24 +4021b16e: 3e10a6 blti a0, 1, 4021b1b0 +4021b171: 1e7cf6 bgeui a12, 7, 4021b193 +4021b174: 0c2d mov.n a2, a12 +4021b176: fff9c5 call0 4021b114 +4021b179: 000e02 l8ui a0, a14, 0 +4021b17c: cc1b addi.n a12, a12, 1 +4021b17e: 74c0c0 extui a12, a12, 0, 8 +4021b181: c00020 sub a0, a0, a2 +4021b184: 004e02 s8i a0, a14, 0 +4021b187: 010080 slli a0, a0, 24 +4021b18a: 310800 srai a0, a0, 24 +4021b18d: 1f10a6 blti a0, 1, 4021b1b0 +4021b190: e07c66 bnei a12, 7, 4021b174 +4021b193: 1910a6 blti a0, 1, 4021b1b0 +4021b196: 169df6 bgeui a13, 10, 4021b1b0 +4021b199: f8c002 addi a0, a0, -8 +4021b19c: dd2b addi.n a13, a13, 2 +4021b19e: 74d0d0 extui a13, a13, 0, 8 +4021b1a1: 004e02 s8i a0, a14, 0 +4021b1a4: 010080 slli a0, a0, 24 +4021b1a7: 310800 srai a0, a0, 24 +4021b1aa: 0210a6 blti a0, 1, 4021b1b0 +4021b1ad: e89db6 bltui a13, 10, 4021b199 +4021b1b0: 11ecc0 slli a14, a12, 4 +4021b1b3: 0108 l32i.n a0, a1, 0 +4021b1b5: 11c8 l32i.n a12, a1, 4 +4021b1b7: eefb addi.n a14, a14, 15 +4021b1b9: 74e0e0 extui a14, a14, 0, 8 +4021b1bc: 11eeb0 slli a14, a14, 5 +4021b1bf: 046db6 bltui a13, 6, 4021b1c7 +4021b1c2: ddab addi.n a13, a13, 10 +4021b1c4: 74d0d0 extui a13, a13, 0, 8 +4021b1c7: edea add.n a14, a13, a14 +4021b1c9: 005fe2 s16i a14, a15, 0 +4021b1cc: 21d8 l32i.n a13, a1, 8 +4021b1ce: 31e8 l32i.n a14, a1, 12 +4021b1d0: 41f8 l32i.n a15, a1, 16 +4021b1d2: 20c112 addi a1, a1, 32 +4021b1d5: f00d ret.n +4021b1d7: d56277 bbci a2, 7, 4021b1b0 +4021b1da: 167db6 bltui a13, 7, 4021b1f4 +4021b1dd: fecdd2 addi a13, a13, -2 +4021b1e0: 208b addi.n a2, a0, 8 +4021b1e2: 004e22 s8i a2, a14, 0 +4021b1e5: 74d0d0 extui a13, a13, 0, 8 +4021b1e8: 010280 slli a0, a2, 24 +4021b1eb: 310800 srai a0, a0, 24 +4021b1ee: 026277 bbci a2, 7, 4021b1f4 +4021b1f1: e87df6 bgeui a13, 7, 4021b1dd +4021b1f4: fb80d6 bgez a0, 4021b1b0 +4021b1f7: 1d2cb6 bltui a12, 2, 4021b218 +4021b1fa: cc0b addi.n a12, a12, -1 +4021b1fc: 74c0c0 extui a12, a12, 0, 8 +4021b1ff: 0c2d mov.n a2, a12 +4021b201: fff105 call0 4021b114 +4021b204: 000e32 l8ui a3, a14, 0 +4021b207: 232a add.n a2, a3, a2 +4021b209: 004e22 s8i a2, a14, 0 +4021b20c: 010280 slli a0, a2, 24 +4021b20f: 310800 srai a0, a0, 24 +4021b212: 026277 bbci a2, 7, 4021b218 +4021b215: e11c66 bnei a12, 1, 4021b1fa +4021b218: f940d6 bgez a0, 4021b1b0 +4021b21b: 916d66 bnei a13, 6, 4021b1b0 +4021b21e: fecdd2 addi a13, a13, -2 +4021b221: 208b addi.n a2, a0, 8 +4021b223: 004e22 s8i a2, a14, 0 +4021b226: 74d0d0 extui a13, a13, 0, 8 +4021b229: ffe0c6 j 4021b1b0 + +4021b22c : +4021b22c: e0c112 addi a1, a1, -32 +4021b22f: 4129 s32i.n a2, a1, 16 +4021b231: 7109 s32i.n a0, a1, 28 +4021b233: 012d mov.n a2, a1 +4021b235: 011005 call0 4021c338 +4021b238: 330c movi.n a3, 3 +4021b23a: 031152 l16ui a5, a1, 6 +4021b23d: 0211b2 l16ui a11, a1, 4 +4021b240: 011182 l16ui a8, a1, 2 +4021b243: 0711a2 l16ui a10, a1, 14 +4021b246: 061172 l16ui a7, a1, 12 +4021b249: 051192 l16ui a9, a1, 10 +4021b24c: 041162 l16ui a6, a1, 8 +4021b24f: e8d701 l32r a0, 402155ac +4021b252: 040c movi.n a4, 0 +4021b254: 042d mov.n a2, a4 +4021b256: 0008 l32i.n a0, a0, 0 +4021b258: 669a add.n a6, a6, a9 +4021b25a: 77aa add.n a7, a7, a10 +4021b25c: 88ba add.n a8, a8, a11 +4021b25e: e008 l32i.n a0, a0, 56 +4021b260: 558a add.n a5, a5, a8 +4021b262: 907770 addx2 a7, a7, a7 +4021b265: 906660 addx2 a6, a6, a6 +4021b268: c06670 sub a6, a6, a7 +4021b26b: d05570 subx2 a5, a5, a7 +4021b26e: 115500 slli a5, a5, 16 +4021b271: 116600 slli a6, a6, 16 +4021b274: 316060 srai a6, a6, 16 +4021b277: 315050 srai a5, a5, 16 +4021b27a: b32550 movgez a2, a5, a5 +4021b27d: b34660 movgez a4, a6, a6 +4021b280: 114400 slli a4, a4, 16 +4021b283: 112200 slli a2, a2, 16 +4021b286: 312020 srai a2, a2, 16 +4021b289: 314040 srai a4, a4, 16 +4021b28c: 5149 s32i.n a4, a1, 20 +4021b28e: 0000c0 callx0 a0 +4021b291: e8c601 l32r a0, 402155ac +4021b294: 330c movi.n a3, 3 +4021b296: 0008 l32i.n a0, a0, 0 +4021b298: 6129 s32i.n a2, a1, 24 +4021b29a: e008 l32i.n a0, a0, 56 +4021b29c: 5128 l32i.n a2, a1, 20 +4021b29e: 0000c0 callx0 a0 +4021b2a1: 6138 l32i.n a3, a1, 24 +4021b2a3: 7108 l32i.n a0, a1, 28 +4021b2a5: c03320 sub a3, a3, a2 +4021b2a8: 4128 l32i.n a2, a1, 16 +4021b2aa: 20c112 addi a1, a1, 32 +4021b2ad: 223a add.n a2, a2, a3 +4021b2af: 112200 slli a2, a2, 16 +4021b2b2: 312020 srai a2, a2, 16 +4021b2b5: f00d ret.n +4021b2b7: 0bf000 excw + ... + +4021b2bc : +4021b2bc: c23c movi.n a2, 60 +4021b2be: fffe31 l32r a3, 4021b2b8 +4021b2c1: d0c112 addi a1, a1, -48 +4021b2c4: a1f9 s32i.n a15, a1, 40 +4021b2c6: 71c9 s32i.n a12, a1, 28 +4021b2c8: 6109 s32i.n a0, a1, 24 +4021b2ca: 91e9 s32i.n a14, a1, 36 +4021b2cc: 81d9 s32i.n a13, a1, 32 +4021b2ce: 0e0c movi.n a14, 0 +4021b2d0: e8b7d1 l32r a13, 402155ac +4021b2d3: ea4001 l32r a0, 40215bd4 +4021b2d6: ff1cc1 l32r a12, 4021af48 +4021b2d9: f1e0f1 l32r a15, 40217a5c +4021b2dc: 005c32 s16i a3, a12, 0 +4021b2df: 004f22 s8i a2, a15, 0 +4021b2e2: 370002 l8ui a0, a0, 55 +4021b2e5: 104102 s8i a0, a1, 16 +4021b2e8: 720c movi.n a2, 7 +4021b2ea: 130c movi.n a3, 1 +4021b2ec: 0d08 l32i.n a0, a13, 0 +4021b2ee: 001c42 l16ui a4, a12, 0 +4021b2f1: 2b2002 l32i a0, a0, 172 +4021b2f4: 414540 srli a4, a4, 5 +4021b2f7: 0000c0 callx0 a0 +4021b2fa: 020c movi.n a2, 0 +4021b2fc: 130c movi.n a3, 1 +4021b2fe: 0d08 l32i.n a0, a13, 0 +4021b300: 001c42 l16ui a4, a12, 0 +4021b303: 2b2002 l32i a0, a0, 172 +4021b306: 444040 extui a4, a4, 0, 5 +4021b309: 0000c0 callx0 a0 +4021b30c: 001c22 l16ui a2, a12, 0 +4021b30f: 12c132 addi a3, a1, 18 +4021b312: 140c movi.n a4, 1 +4021b314: ffd8c5 call0 4021b0a4 +4021b317: 024c movi.n a2, 64 +4021b319: 10c132 addi a3, a1, 16 +4021b31c: 140c movi.n a4, 1 +4021b31e: f51c movi.n a5, 31 +4021b320: 070c movi.n a7, 0 +4021b322: 000f62 l8ui a6, a15, 0 +4021b325: 38a182 movi a8, 0x138 +4021b328: 0189 s32i.n a8, a1, 0 +4021b32a: 1179 s32i.n a7, a1, 4 +4021b32c: 016680 slli a6, a6, 24 +4021b32f: 316860 srai a6, a6, 24 +4021b332: 14c172 addi a7, a1, 20 +4021b335: 014e05 call0 4021c818 +4021b338: 140132 l8ui a3, a1, 20 +4021b33b: 402c movi.n a0, 36 +4021b33d: 013380 slli a3, a3, 24 +4021b340: 313830 srai a3, a3, 24 +4021b343: 1fc392 addi a9, a3, 31 +4021b346: 004f92 s8i a9, a15, 0 +4021b349: 2e2037 blt a0, a3, 4021b37b +4021b34c: 2ba3a6 blti a3, 12, 4021b37b +4021b34f: 001c22 l16ui a2, a12, 0 +4021b352: 12c132 addi a3, a1, 18 +4021b355: 140c movi.n a4, 1 +4021b357: 91e8 l32i.n a14, a1, 36 +4021b359: a1f8 l32i.n a15, a1, 40 +4021b35b: ffd485 call0 4021b0a4 +4021b35e: ea1dd1 l32r a13, 40215bd4 +4021b361: 001c22 l16ui a2, a12, 0 +4021b364: 12c132 addi a3, a1, 18 +4021b367: ffca05 call0 4021b008 +4021b36a: 6108 l32i.n a0, a1, 24 +4021b36c: 001c42 l16ui a4, a12, 0 +4021b36f: 2d5d42 s16i a4, a13, 90 +4021b372: 71c8 l32i.n a12, a1, 28 +4021b374: 81d8 l32i.n a13, a1, 32 +4021b376: 30c112 addi a1, a1, 48 +4021b379: f00d ret.n +4021b37b: 14c122 addi a2, a1, 20 +4021b37e: 851c movi.n a5, 24 +4021b380: c05530 sub a5, a5, a3 +4021b383: 144152 s8i a5, a1, 20 +4021b386: 0c3d mov.n a3, a12 +4021b388: ffd9c5 call0 4021b128 +4021b38b: 720c movi.n a2, 7 +4021b38d: 130c movi.n a3, 1 +4021b38f: 0d08 l32i.n a0, a13, 0 +4021b391: 001c42 l16ui a4, a12, 0 +4021b394: 2b2002 l32i a0, a0, 172 +4021b397: 414540 srli a4, a4, 5 +4021b39a: 0000c0 callx0 a0 +4021b39d: 020c movi.n a2, 0 +4021b39f: 130c movi.n a3, 1 +4021b3a1: 0d08 l32i.n a0, a13, 0 +4021b3a3: 001c42 l16ui a4, a12, 0 +4021b3a6: 2b2002 l32i a0, a0, 172 +4021b3a9: 444040 extui a4, a4, 0, 5 +4021b3ac: 0000c0 callx0 a0 +4021b3af: 763c movi.n a6, 55 +4021b3b1: 140172 l8ui a7, a1, 20 +4021b3b4: ee1b addi.n a14, a14, 1 +4021b3b6: 01ee80 slli a14, a14, 24 +4021b3b9: 017780 slli a7, a7, 24 +4021b3bc: 31e8e0 srai a14, a14, 24 +4021b3bf: fece52 addi a5, a14, -2 +4021b3c2: 317870 srai a7, a7, 24 +4021b3c5: c06670 sub a6, a6, a7 +4021b3c8: 004f62 s8i a6, a15, 0 +4021b3cb: f19556 bnez a5, 4021b2e8 +4021b3ce: ffdf46 j 4021b34f +4021b3d1: 000000 ill + +4021b3d4 : +4021b3d4: 050c movi.n a5, 0 +4021b3d6: 060c movi.n a6, 0 +4021b3d8: 070c movi.n a7, 0 +4021b3da: 744020 extui a4, a2, 0, 8 +4021b3dd: 030c movi.n a3, 0 +4021b3df: e0c112 addi a1, a1, -32 +4021b3e2: 51c9 s32i.n a12, a1, 20 +4021b3e4: 61d9 s32i.n a13, a1, 24 +4021b3e6: 4109 s32i.n a0, a1, 16 +4021b3e8: 71e9 s32i.n a14, a1, 28 +4021b3ea: 2139 s32i.n a3, a1, 8 +4021b3ec: 1139 s32i.n a3, a1, 4 +4021b3ee: e86fe1 l32r a14, 402155ac +4021b3f1: 0139 s32i.n a3, a1, 0 +4021b3f3: 0e08 l32i.n a0, a14, 0 +4021b3f5: 120c movi.n a2, 1 +4021b3f7: 1a2002 l32i a0, a0, 104 +4021b3fa: 034c movi.n a3, 64 +4021b3fc: 0000c0 callx0 a0 +4021b3ff: 0d0c movi.n a13, 0 +4021b401: 0c0c movi.n a12, 0 +4021b403: 0e08 l32i.n a0, a14, 0 +4021b405: b008 l32i.n a0, a0, 44 +4021b407: 38a122 movi a2, 0x138 +4021b40a: 0000c0 callx0 a0 +4021b40d: dd1b addi.n a13, a13, 1 +4021b40f: c2ca add.n a12, a2, a12 +4021b411: 11cc00 slli a12, a12, 16 +4021b414: 31c0c0 srai a12, a12, 16 +4021b417: e82d66 bnei a13, 2, 4021b403 +4021b41a: 120c movi.n a2, 1 +4021b41c: 0e08 l32i.n a0, a14, 0 +4021b41e: 61d8 l32i.n a13, a1, 24 +4021b420: 1b2002 l32i a0, a0, 108 +4021b423: 71e8 l32i.n a14, a1, 28 +4021b425: 0000c0 callx0 a0 +4021b428: 3c2b addi.n a3, a12, 2 +4021b42a: 2c5b addi.n a2, a12, 5 +4021b42c: 4108 l32i.n a0, a1, 16 +4021b42e: 51c8 l32i.n a12, a1, 20 +4021b430: b32330 movgez a2, a3, a3 +4021b433: 20c112 addi a1, a1, 32 +4021b436: 212220 srai a2, a2, 2 +4021b439: 112200 slli a2, a2, 16 +4021b43c: 312020 srai a2, a2, 16 +4021b43f: f00d ret.n +4021b441: 000000 ill + +4021b444 : +4021b444: c44c movi.n a4, 76 +4021b446: c0c112 addi a1, a1, -64 +4021b449: 81c9 s32i.n a12, a1, 32 +4021b44b: a1e9 s32i.n a14, a1, 40 +4021b44d: 5139 s32i.n a3, a1, 20 +4021b44f: 91d9 s32i.n a13, a1, 36 +4021b451: 7109 s32i.n a0, a1, 28 +4021b453: b1f9 s32i.n a15, a1, 44 +4021b455: 000202 l8ui a0, a2, 0 +4021b458: 6129 s32i.n a2, a1, 24 +4021b45a: 11f0f0 slli a15, a0, 1 +4021b45d: 11ff00 slli a15, a15, 16 +4021b460: 31f0f0 srai a15, a15, 16 +4021b463: 09b407 bgeu a4, a0, 4021b470 +4021b466: 1d0c movi.n a13, 1 +4021b468: 203c movi.n a0, 50 +4021b46a: 104102 s8i a0, a1, 16 +4021b46d: 0001c6 j 4021b478 +4021b470: 0d0c movi.n a13, 0 +4021b472: e6c022 addi a2, a0, -26 +4021b475: 104122 s8i a2, a1, 16 +4021b478: 024c movi.n a2, 64 +4021b47a: 10c132 addi a3, a1, 16 +4021b47d: 140c movi.n a4, 1 +4021b47f: f51c movi.n a5, 31 +4021b481: 38a182 movi a8, 0x138 +4021b484: f176c1 l32r a12, 40217a5c +4021b487: 070c movi.n a7, 0 +4021b489: 000c62 l8ui a6, a12, 0 +4021b48c: 1179 s32i.n a7, a1, 4 +4021b48e: 0189 s32i.n a8, a1, 0 +4021b490: 11c172 addi a7, a1, 17 +4021b493: 016680 slli a6, a6, 24 +4021b496: 316860 srai a6, a6, 24 +4021b499: 0137c5 call0 4021c818 +4021b49c: 0e0c movi.n a14, 0 +4021b49e: 6fa002 movi a0, 111 +4021b4a1: 060c movi.n a6, 0 +4021b4a3: 110122 l8ui a2, a1, 17 +4021b4a6: 050c movi.n a5, 0 +4021b4a8: d159 s32i.n a5, a1, 52 +4021b4aa: 012280 slli a2, a2, 24 +4021b4ad: 312820 srai a2, a2, 24 +4021b4b0: 1fc222 addi a2, a2, 31 +4021b4b3: 01b280 slli a11, a2, 24 +4021b4b6: 004c22 s8i a2, a12, 0 +4021b4b9: 114122 s8i a2, a1, 17 +4021b4bc: 31b8b0 srai a11, a11, 24 +4021b4bf: e6cbc2 addi a12, a11, -26 +4021b4c2: 01cc80 slli a12, a12, 24 +4021b4c5: 31c8c0 srai a12, a12, 24 +4021b4c8: 009d mov.n a9, a0 +4021b4ca: 062d mov.n a2, a6 +4021b4cc: b32cc0 movgez a2, a12, a12 +4021b4cf: 01c280 slli a12, a2, 24 +4021b4d2: 31c8c0 srai a12, a12, 24 +4021b4d5: 0120b7 blt a0, a11, 4021b4da +4021b4d8: 0b9d mov.n a9, a11 +4021b4da: 114192 s8i a9, a1, 17 +4021b4dd: 0c2d mov.n a2, a12 +4021b4df: ffef45 call0 4021b3d4 +4021b4e2: 110132 l8ui a3, a1, 17 +4021b4e5: c129 s32i.n a2, a1, 48 +4021b4e7: 012380 slli a2, a3, 24 +4021b4ea: 312820 srai a2, a2, 24 +4021b4ed: ffee45 call0 4021b3d4 +4021b4f0: 6fa002 movi a0, 111 +4021b4f3: 060c movi.n a6, 0 +4021b4f5: c72c movi.n a7, 44 +4021b4f7: c198 l32i.n a9, a1, 48 +4021b4f9: b82c movi.n a8, 43 +4021b4fb: 4edc bnez.n a14, 4021b513 +4021b4fd: c0a920 sub a10, a9, a2 +4021b500: 11aa00 slli a10, a10, 16 +4021b503: 31a0a0 srai a10, a10, 16 +4021b506: 12a9f7 bge a9, a15, 4021b51c +4021b509: 0fa7a7 bge a7, a10, 4021b51c +4021b50c: edcc bnez.n a13, 4021b51e +4021b50e: 1d0c movi.n a13, 1 +4021b510: 000206 j 4021b51c +4021b513: c0a920 sub a10, a9, a2 +4021b516: 11aa00 slli a10, a10, 16 +4021b519: 31a0a0 srai a10, a10, 16 +4021b51c: 9d8c beqz.n a13, 4021b529 +4021b51e: 05a8a7 bge a8, a10, 4021b527 +4021b521: 0727a7 blt a7, a10, 4021b52c +4021b524: 0129f7 blt a9, a15, 4021b529 +4021b527: 0d0c movi.n a13, 0 +4021b529: 02a7a7 bge a7, a10, 4021b52f +4021b52c: 087d16 beqz a13, 4021b5b7 +4021b52f: d1b8 l32i.n a11, a1, 52 +4021b531: 052ba7 blt a11, a10, 4021b53a +4021b534: 02a8a7 bge a8, a10, 4021b53a +4021b537: 07cd16 beqz a13, 4021b5b7 +4021b53a: 0229f7 blt a9, a15, 4021b540 +4021b53d: 076d56 bnez a13, 4021b5b7 +4021b540: 035c movi.n a3, 80 +4021b542: 71a327 bge a3, a2, 4021b5b7 +4021b545: 110142 l8ui a4, a1, 17 +4021b548: 014480 slli a4, a4, 24 +4021b54b: 314840 srai a4, a4, 24 +4021b54e: 651407 beq a4, a0, 4021b5b7 +4021b551: 062c16 beqz a12, 4021b5b7 +4021b554: 1dbc beqz.n a13, 4021b589 +4021b556: 9edc bnez.n a14, 4021b573 +4021b558: 053c movi.n a5, 48 +4021b55a: 15a5a7 bge a5, a10, 4021b573 +4021b55d: c029f0 sub a2, a9, a15 +4021b560: b21b addi.n a11, a2, 1 +4021b562: b3b220 movgez a11, a2, a2 +4021b565: 21b1b0 srai a11, a11, 1 +4021b568: bb0b addi.n a11, a11, -1 +4021b56a: 01bb80 slli a11, a11, 24 +4021b56d: 31b8b0 srai a11, a11, 24 +4021b570: 000106 j 4021b578 +4021b573: cb7c movi.n a11, -4 +4021b575: c029f0 sub a2, a9, a15 +4021b578: 113bf0 slli a3, a11, 1 +4021b57b: 0ca327 bge a3, a2, 4021b58b +4021b57e: 420b addi.n a4, a2, -1 +4021b580: b32440 movgez a2, a4, a4 +4021b583: 21b120 srai a11, a2, 1 +4021b586: 000046 j 4021b58b +4021b589: 2b0c movi.n a11, 2 +4021b58b: 062d mov.n a2, a6 +4021b58d: ee1b addi.n a14, a14, 1 +4021b58f: 113a00 slli a3, a10, 16 +4021b592: ccba add.n a12, a12, a11 +4021b594: 01cc80 slli a12, a12, 24 +4021b597: 313030 srai a3, a3, 16 +4021b59a: 74e0e0 extui a14, a14, 0, 8 +4021b59d: f6ce52 addi a5, a14, -10 +4021b5a0: 8323d0 moveqz a2, a3, a13 +4021b5a3: 31c8c0 srai a12, a12, 24 +4021b5a6: 1accb2 addi a11, a12, 26 +4021b5a9: d129 s32i.n a2, a1, 52 +4021b5ab: 1141b2 s8i a11, a1, 17 +4021b5ae: 01bb80 slli a11, a11, 24 +4021b5b1: 31b8b0 srai a11, a11, 24 +4021b5b4: f10556 bnez a5, 4021b4c8 +4021b5b7: 100c movi.n a0, 1 +4021b5b9: 5128 l32i.n a2, a1, 20 +4021b5bb: 81c8 l32i.n a12, a1, 32 +4021b5bd: 91d8 l32i.n a13, a1, 36 +4021b5bf: a1e8 l32i.n a14, a1, 40 +4021b5c1: 0f3c movi.n a15, 48 +4021b5c3: 012fa7 blt a15, a10, 4021b5c8 +4021b5c6: 000c movi.n a0, 0 +4021b5c8: 004202 s8i a0, a2, 0 +4021b5cb: 6108 l32i.n a0, a1, 24 +4021b5cd: 000002 l8ui a0, a0, 0 +4021b5d0: b1f8 l32i.n a15, a1, 44 +4021b5d2: 1120f0 slli a2, a0, 1 +4021b5d5: 15a927 bge a9, a2, 4021b5ee +4021b5d8: d02090 subx2 a2, a0, a9 +4021b5db: 321b addi.n a3, a2, 1 +4021b5dd: 222b addi.n a2, a2, 2 +4021b5df: b32330 movgez a2, a3, a3 +4021b5e2: 212120 srai a2, a2, 1 +4021b5e5: 112200 slli a2, a2, 16 +4021b5e8: 312020 srai a2, a2, 16 +4021b5eb: 000046 j 4021b5f0 +4021b5ee: 020c movi.n a2, 0 +4021b5f0: 7108 l32i.n a0, a1, 28 +4021b5f2: 40c112 addi a1, a1, 64 +4021b5f5: f00d ret.n + ... + +4021b5f8 : +4021b5f8: a28c beqz.n a2, 4021b606 +4021b5fa: 0c2326 beqi a3, 2, 4021b60a +4021b5fd: 093326 beqi a3, 3, 4021b60a +4021b600: 066326 beqi a3, 6, 4021b60a +4021b603: 037326 beqi a3, 7, 4021b60a +4021b606: 020c movi.n a2, 0 +4021b608: f00d ret.n +4021b60a: e97021 l32r a2, 40215bcc +4021b60d: e97141 l32r a4, 40215bd4 +4021b610: 380232 l8ui a3, a2, 56 +4021b613: 300442 l8ui a4, a4, 48 +4021b616: 370222 l8ui a2, a2, 55 +4021b619: 014480 slli a4, a4, 24 +4021b61c: 013380 slli a3, a3, 24 +4021b61f: 313830 srai a3, a3, 24 +4021b622: 314840 srai a4, a4, 24 +4021b625: 012280 slli a2, a2, 24 +4021b628: 312820 srai a2, a2, 24 +4021b62b: d974e6 bgei a4, 7, 4021b608 +4021b62e: 032d mov.n a2, a3 +4021b630: f00d ret.n + ... + +4021b634 : +4021b634: d0c112 addi a1, a1, -48 +4021b637: 1109 s32i.n a0, a1, 4 +4021b639: 6139 s32i.n a3, a1, 24 +4021b63b: 7169 s32i.n a6, a1, 28 +4021b63d: 0129 s32i.n a2, a1, 0 +4021b63f: 31d9 s32i.n a13, a1, 12 +4021b641: 41e9 s32i.n a14, a1, 16 +4021b643: 51f9 s32i.n a15, a1, 20 +4021b645: 21c9 s32i.n a12, a1, 8 +4021b647: 04fd mov.n a15, a4 +4021b649: 0c0c movi.n a12, 0 +4021b64b: e80ce1 l32r a14, 4021567c +4021b64e: 8d1c movi.n a13, 24 +4021b650: 0c2d mov.n a2, a12 +4021b652: 0138 l32i.n a3, a1, 0 +4021b654: 007545 call0 4021bdac +4021b657: 02fa add.n a0, a2, a15 +4021b659: 000002 l8ui a0, a0, 0 +4021b65c: 6148 l32i.n a4, a1, 24 +4021b65e: 010080 slli a0, a0, 24 +4021b661: 310800 srai a0, a0, 24 +4021b664: 048cf6 bgeui a12, 8, 4021b66c +4021b667: 404a add.n a4, a0, a4 +4021b669: 000206 j 4021b675 +4021b66c: 7158 l32i.n a5, a1, 28 +4021b66e: 054d mov.n a4, a5 +4021b670: 01a507 bge a5, a0, 4021b675 +4021b673: 004d mov.n a4, a0 +4021b675: 00af02 movi a0, 0xffffff00 +4021b678: a03ce0 addx4 a3, a12, a14 +4021b67b: 608040 neg a8, a4 +4021b67e: 0d4d mov.n a4, a13 +4021b680: 018880 slli a8, a8, 24 +4021b683: 318880 srai a8, a8, 24 +4021b686: 012d87 blt a13, a8, 4021b68b +4021b689: 084d mov.n a4, a8 +4021b68b: 745040 extui a5, a4, 0, 8 +4021b68e: 0020c0 memw +4021b691: c12322 l32i a2, a3, 0x304 +4021b694: 102200 and a2, a2, a0 +4021b697: 202250 or a2, a2, a5 +4021b69a: 0020c0 memw +4021b69d: c16322 s32i a2, a3, 0x304 +4021b6a0: cc1b addi.n a12, a12, 1 +4021b6a2: 74c0c0 extui a12, a12, 0, 8 +4021b6a5: a79cd7 bne a12, a13, 4021b650 +4021b6a8: 21c8 l32i.n a12, a1, 8 +4021b6aa: 31d8 l32i.n a13, a1, 12 +4021b6ac: 41e8 l32i.n a14, a1, 16 +4021b6ae: 51f8 l32i.n a15, a1, 20 +4021b6b0: 1108 l32i.n a0, a1, 4 +4021b6b2: 30c112 addi a1, a1, 48 +4021b6b5: f00d ret.n +4021b6b7: 000000 ill +4021b6ba: 002c movi.n a0, 32 +4021b6bc: ff .byte 0xff +4021b6bd: ff .byte 0xff +4021b6be: ff .byte 0xff +4021b6bf: f0 .byte 0xf0 + +4021b6c0 : +4021b6c0: 018260 slli a8, a2, 26 +4021b6c3: d9e991 l32r a9, 40211e68 +4021b6c6: f0c112 addi a1, a1, -16 +4021b6c9: 607030 neg a7, a3 +4021b6cc: 747070 extui a7, a7, 0, 8 +4021b6cf: 1169 s32i.n a6, a1, 4 +4021b6d1: 2109 s32i.n a0, a1, 8 +4021b6d3: 31c9 s32i.n a12, a1, 12 +4021b6d5: 0159 s32i.n a5, a1, 0 +4021b6d7: 02cd mov.n a12, a2 +4021b6d9: e7e851 l32r a5, 4021567c +4021b6dc: e7b401 l32r a0, 402155ac +4021b6df: fff661 l32r a6, 4021b6b8 +4021b6e2: 117760 slli a7, a7, 10 +4021b6e5: 206460 or a6, a4, a6 +4021b6e8: 0020c0 memw +4021b6eb: ee2522 l32i a2, a5, 0x3b8 +4021b6ee: 102290 and a2, a2, a9 +4021b6f1: 202280 or a2, a2, a8 +4021b6f4: 202270 or a2, a2, a7 +4021b6f7: 202260 or a2, a2, a6 +4021b6fa: 0020c0 memw +4021b6fd: a30c movi.n a3, 10 +4021b6ff: 0008 l32i.n a0, a0, 0 +4021b701: ee6522 s32i a2, a5, 0x3b8 +4021b704: 1c2002 l32i a0, a0, 112 +4021b707: 420c movi.n a2, 4 +4021b709: 0000c0 callx0 a0 +4021b70c: 115cd0 slli a5, a12, 3 +4021b70f: 0470c0 extui a7, a12, 0, 1 +4021b712: 160c movi.n a6, 1 +4021b714: 0188 l32i.n a8, a1, 0 +4021b716: 040c movi.n a4, 0 +4021b718: 005822 s16i a2, a8, 0 +4021b71b: 834670 moveqz a4, a6, a7 +4021b71e: 204450 or a4, a4, a5 +4021b721: ffe651 l32r a5, 4021b6bc +4021b724: 014480 slli a4, a4, 24 +4021b727: 0020c0 memw +4021b72a: e7d431 l32r a3, 4021567c +4021b72d: ee2322 l32i a2, a3, 0x3b8 +4021b730: 102250 and a2, a2, a5 +4021b733: 202240 or a2, a2, a4 +4021b736: 0020c0 memw +4021b739: 31c8 l32i.n a12, a1, 12 +4021b73b: e79c01 l32r a0, 402155ac +4021b73e: ee6322 s32i a2, a3, 0x3b8 +4021b741: 0008 l32i.n a0, a0, 0 +4021b743: 420c movi.n a2, 4 +4021b745: 1c2002 l32i a0, a0, 112 +4021b748: a30c movi.n a3, 10 +4021b74a: 0000c0 callx0 a0 +4021b74d: 1198 l32i.n a9, a1, 4 +4021b74f: 2108 l32i.n a0, a1, 8 +4021b751: 005922 s16i a2, a9, 0 +4021b754: 10c112 addi a1, a1, 16 +4021b757: f00d ret.n +4021b759: 000000 ill +4021b75c: fe8bc4 excw +4021b75f: 3f .byte 0x3f +4021b760: 22fb10 excw +4021b763: 40 .byte 0x40 + +4021b764 : +4021b764: 038d mov.n a8, a3 +4021b766: 090c movi.n a9, 0 +4021b768: 0a0c movi.n a10, 0 +4021b76a: c0c112 addi a1, a1, -64 +4021b76d: d129 s32i.n a2, a1, 52 +4021b76f: e159 s32i.n a5, a1, 56 +4021b771: b169 s32i.n a6, a1, 44 +4021b773: 3109 s32i.n a0, a1, 12 +4021b775: 51d9 s32i.n a13, a1, 20 +4021b777: 61e9 s32i.n a14, a1, 24 +4021b779: 41c9 s32i.n a12, a1, 16 +4021b77b: 71f9 s32i.n a15, a1, 28 +4021b77d: 04cd mov.n a12, a4 +4021b77f: 0f0c movi.n a15, 0 +4021b781: 0e0c movi.n a14, 0 +4021b783: 0d0c movi.n a13, 0 +4021b785: 91a9 s32i.n a10, a1, 36 +4021b787: a199 s32i.n a9, a1, 40 +4021b789: 1189 s32i.n a8, a1, 4 +4021b78b: f4c202 addi a0, a2, -12 +4021b78e: 740000 extui a0, a0, 0, 8 +4021b791: c109 s32i.n a0, a1, 48 +4021b793: 424df6 bgeui a13, 4, 4021b7d9 +4021b796: 130c movi.n a3, 1 +4021b798: e148 l32i.n a4, a1, 56 +4021b79a: e78401 l32r a0, 402155ac +4021b79d: d12ee0 mul16s a2, a14, a14 +4021b7a0: 01d222 addmi a2, a2, 0x100 +4021b7a3: 0008 l32i.n a0, a0, 0 +4021b7a5: 80c222 addi a2, a2, -128 +4021b7a8: 212820 srai a2, a2, 8 +4021b7ab: 8129 s32i.n a2, a1, 32 +4021b7ad: 422002 l32i a0, a0, 0x108 +4021b7b0: 22fa add.n a2, a2, a15 +4021b7b2: 81f8 l32i.n a15, a1, 32 +4021b7b4: 012280 slli a2, a2, 24 +4021b7b7: 312820 srai a2, a2, 24 +4021b7ba: 0000c0 callx0 a0 +4021b7bd: 030c movi.n a3, 0 +4021b7bf: e148 l32i.n a4, a1, 56 +4021b7c1: c0f2f0 sub a15, a2, a15 +4021b7c4: e77a01 l32r a0, 402155ac +4021b7c7: 0e2d mov.n a2, a14 +4021b7c9: 0008 l32i.n a0, a0, 0 +4021b7cb: 01ff80 slli a15, a15, 24 +4021b7ce: 422002 l32i a0, a0, 0x108 +4021b7d1: 31f8f0 srai a15, a15, 24 +4021b7d4: 0000c0 callx0 a0 +4021b7d7: 02ed mov.n a14, a2 +4021b7d9: 120c movi.n a2, 1 +4021b7db: c138 l32i.n a3, a1, 48 +4021b7dd: 1148 l32i.n a4, a1, 4 +4021b7df: 015d mov.n a5, a1 +4021b7e1: 612b addi.n a6, a1, 2 +4021b7e3: ffedc5 call0 4021b6c0 +4021b7e6: 019192 l16si a9, a1, 2 +4021b7e9: 009102 l16si a0, a1, 0 +4021b7ec: 093d mov.n a3, a9 +4021b7ee: 01a097 bge a0, a9, 4021b7f3 +4021b7f1: 003d mov.n a3, a0 +4021b7f3: c02900 sub a2, a9, a0 +4021b7f6: 140c movi.n a4, 1 +4021b7f8: 833430 moveqz a3, a4, a3 +4021b7fb: 112250 slli a2, a2, 11 +4021b7fe: 990601 l32r a0, 40201c18 +4021b801: 0000c0 callx0 a0 +4021b804: e158 l32i.n a5, a1, 56 +4021b806: 10c222 addi a2, a2, 16 +4021b809: 212520 srai a2, a2, 5 +4021b80c: 004c22 s8i a2, a12, 0 +4021b80f: 758c beqz.n a5, 4021b81a +4021b811: 005fd6 bgez a15, 4021b81a +4021b814: 603020 neg a3, a2 +4021b817: 004c32 s8i a3, a12, 0 +4021b81a: 020c movi.n a2, 0 +4021b81c: d138 l32i.n a3, a1, 52 +4021b81e: 1148 l32i.n a4, a1, 4 +4021b820: 015d mov.n a5, a1 +4021b822: 612b addi.n a6, a1, 2 +4021b824: ffe985 call0 4021b6c0 +4021b827: 019132 l16si a3, a1, 2 +4021b82a: 009142 l16si a4, a1, 0 +4021b82d: c02430 sub a2, a4, a3 +4021b830: 334a add.n a3, a3, a4 +4021b832: 112240 slli a2, a2, 12 +4021b835: 140c movi.n a4, 1 +4021b837: 113300 slli a3, a3, 16 +4021b83a: 313030 srai a3, a3, 16 +4021b83d: 833430 moveqz a3, a4, a3 +4021b840: 98f601 l32r a0, 40201c18 +4021b843: 0000c0 callx0 a0 +4021b846: e158 l32i.n a5, a1, 56 +4021b848: 10c202 addi a0, a2, 16 +4021b84b: 210500 srai a0, a0, 5 +4021b84e: 014c02 s8i a0, a12, 1 +4021b851: 758c beqz.n a5, 4021b85c +4021b853: 056e77 bbci a14, 7, 4021b85c +4021b856: 600000 neg a0, a0 +4021b859: 014c02 s8i a0, a12, 1 +4021b85c: 000c22 l8ui a2, a12, 0 +4021b85f: 012280 slli a2, a2, 24 +4021b862: 312820 srai a2, a2, 24 +4021b865: 143df6 bgeui a13, 3, 4021b87d +4021b868: c0ff20 sub a15, a15, a2 +4021b86b: c0ee00 sub a14, a14, a0 +4021b86e: 01ee80 slli a14, a14, 24 +4021b871: 01ff80 slli a15, a15, 24 +4021b874: 31f8f0 srai a15, a15, 24 +4021b877: 31e8e0 srai a14, a14, 24 +4021b87a: 002206 j 4021b906 +4021b87d: 9138 l32i.n a3, a1, 36 +4021b87f: a158 l32i.n a5, a1, 40 +4021b881: 403a add.n a4, a0, a3 +4021b883: 625a add.n a6, a2, a5 +4021b885: e74901 l32r a0, 402155ac +4021b888: 016680 slli a6, a6, 24 +4021b88b: 014480 slli a4, a4, 24 +4021b88e: 313840 srai a3, a4, 24 +4021b891: 315860 srai a5, a6, 24 +4021b894: 0008 l32i.n a0, a0, 0 +4021b896: a159 s32i.n a5, a1, 40 +4021b898: 0008 l32i.n a0, a0, 0 +4021b89a: 9139 s32i.n a3, a1, 36 +4021b89c: 0000c0 callx0 a0 +4021b89f: 1522e6 bgei a2, 2, 4021b8b8 +4021b8a2: e74201 l32r a0, 402155ac +4021b8a5: 010c22 l8ui a2, a12, 1 +4021b8a8: 0008 l32i.n a0, a0, 0 +4021b8aa: 012280 slli a2, a2, 24 +4021b8ad: 0008 l32i.n a0, a0, 0 +4021b8af: 312820 srai a2, a2, 24 +4021b8b2: 0000c0 callx0 a0 +4021b8b5: 7722a6 blti a2, 2, 4021b930 +4021b8b8: 4a6d66 bnei a13, 6, 4021b906 +4021b8bb: a128 l32i.n a2, a1, 40 +4021b8bd: e73b01 l32r a0, 402155ac +4021b8c0: 9138 l32i.n a3, a1, 36 +4021b8c2: 0008 l32i.n a0, a0, 0 +4021b8c4: 332b addi.n a3, a3, 2 +4021b8c6: 222b addi.n a2, a2, 2 +4021b8c8: 212220 srai a2, a2, 2 +4021b8cb: 213230 srai a3, a3, 2 +4021b8ce: 2139 s32i.n a3, a1, 8 +4021b8d0: 0008 l32i.n a0, a0, 0 +4021b8d2: c0ff20 sub a15, a15, a2 +4021b8d5: c0ee30 sub a14, a14, a3 +4021b8d8: 01ee80 slli a14, a14, 24 +4021b8db: 01ff80 slli a15, a15, 24 +4021b8de: 31f8f0 srai a15, a15, 24 +4021b8e1: 31e8e0 srai a14, a14, 24 +4021b8e4: 0000c0 callx0 a0 +4021b8e7: 0e52e6 bgei a2, 5, 4021b8f9 +4021b8ea: e73001 l32r a0, 402155ac +4021b8ed: 0008 l32i.n a0, a0, 0 +4021b8ef: 0008 l32i.n a0, a0, 0 +4021b8f1: 2128 l32i.n a2, a1, 8 +4021b8f3: 0000c0 callx0 a0 +4021b8f6: 0c52a6 blti a2, 5, 4021b906 +4021b8f9: ff9831 l32r a3, 4021b75c +4021b8fc: f5a741 l32r a4, 40218f98 +4021b8ff: 0328 l32i.n a2, a3, 0 +4021b901: 202240 or a2, a2, a4 +4021b904: 0329 s32i.n a2, a3, 0 +4021b906: b158 l32i.n a5, a1, 44 +4021b908: 959c beqz.n a5, 4021b925 +4021b90a: ff9521 l32r a2, 4021b760 +4021b90d: 010c42 l8ui a4, a12, 1 +4021b910: 000c32 l8ui a3, a12, 0 +4021b913: 014480 slli a4, a4, 24 +4021b916: 013380 slli a3, a3, 24 +4021b919: 313830 srai a3, a3, 24 +4021b91c: 314840 srai a4, a4, 24 +4021b91f: 99cb01 l32r a0, 4020204c +4021b922: 0000c0 callx0 a0 +4021b925: dd1b addi.n a13, a13, 1 +4021b927: 74d0d0 extui a13, a13, 0, 8 +4021b92a: f9cd52 addi a5, a13, -7 +4021b92d: e62556 bnez a5, 4021b793 +4021b930: 130c movi.n a3, 1 +4021b932: e148 l32i.n a4, a1, 56 +4021b934: e71e01 l32r a0, 402155ac +4021b937: 51d8 l32i.n a13, a1, 20 +4021b939: 0008 l32i.n a0, a0, 0 +4021b93b: 012f80 slli a2, a15, 24 +4021b93e: 422002 l32i a0, a0, 0x108 +4021b941: 312820 srai a2, a2, 24 +4021b944: 0000c0 callx0 a0 +4021b947: e148 l32i.n a4, a1, 56 +4021b949: e71801 l32r a0, 402155ac +4021b94c: 030c movi.n a3, 0 +4021b94e: 0008 l32i.n a0, a0, 0 +4021b950: 012e80 slli a2, a14, 24 +4021b953: 422002 l32i a0, a0, 0x108 +4021b956: 312820 srai a2, a2, 24 +4021b959: 0000c0 callx0 a0 +4021b95c: 3108 l32i.n a0, a1, 12 +4021b95e: 014ce2 s8i a14, a12, 1 +4021b961: 004cf2 s8i a15, a12, 0 +4021b964: 61e8 l32i.n a14, a1, 24 +4021b966: 71f8 l32i.n a15, a1, 28 +4021b968: 41c8 l32i.n a12, a1, 16 +4021b96a: 40c112 addi a1, a1, 64 +4021b96d: f00d ret.n +4021b96f: fb2000 excw +4021b972: ff4022 s8i a2, a0, 255 +4021b975: ff .byte 0xff +4021b976: 00 .byte 00 +4021b977: e0 .byte 0xe0 + +4021b978 : +4021b978: 209330 or a9, a3, a3 +4021b97b: c0c112 addi a1, a1, -64 +4021b97e: 0961c2 s32i a12, a1, 36 +4021b981: 0c61f2 s32i a15, a1, 48 +4021b984: 3169 s32i.n a6, a1, 12 +4021b986: 2149 s32i.n a4, a1, 8 +4021b988: 8109 s32i.n a0, a1, 32 +4021b98a: a1d9 s32i.n a13, a1, 40 +4021b98c: b1e9 s32i.n a14, a1, 44 +4021b98e: 02dd mov.n a13, a2 +4021b990: 07ed mov.n a14, a7 +4021b992: 0208 l32i.n a0, a2, 0 +4021b994: 1199 s32i.n a9, a1, 4 +4021b996: 050100 extui a0, a0, 17, 1 +4021b999: 187056 bnez a0, 4021bb24 +4021b99c: 77a022 movi a2, 119 +4021b99f: 030c movi.n a3, 0 +4021b9a1: 041c movi.n a4, 16 +4021b9a3: e702c1 l32r a12, 402155ac +4021b9a6: 060c movi.n a6, 0 +4021b9a8: 0c08 l32i.n a0, a12, 0 +4021b9aa: 05fd mov.n a15, a5 +4021b9ac: 252002 l32i a0, a0, 148 +4021b9af: 050c movi.n a5, 0 +4021b9b1: 0000c0 callx0 a0 +4021b9b4: 030c movi.n a3, 0 +4021b9b6: f40c movi.n a4, 15 +4021b9b8: 650c movi.n a5, 6 +4021b9ba: 660c movi.n a6, 6 +4021b9bc: 0c08 l32i.n a0, a12, 0 +4021b9be: 5129 s32i.n a2, a1, 20 +4021b9c0: 252002 l32i a0, a0, 148 +4021b9c3: 77a022 movi a2, 119 +4021b9c6: 0000c0 callx0 a0 +4021b9c9: 030c movi.n a3, 0 +4021b9cb: 940c movi.n a4, 9 +4021b9cd: 750c movi.n a5, 7 +4021b9cf: 060c movi.n a6, 0 +4021b9d1: 0c08 l32i.n a0, a12, 0 +4021b9d3: 6129 s32i.n a2, a1, 24 +4021b9d5: 252002 l32i a0, a0, 148 +4021b9d8: 77a022 movi a2, 119 +4021b9db: 0000c0 callx0 a0 +4021b9de: 0c08 l32i.n a0, a12, 0 +4021b9e0: 282002 l32i a0, a0, 160 +4021b9e3: 7129 s32i.n a2, a1, 28 +4021b9e5: 0000c0 callx0 a0 +4021b9e8: 0c08 l32i.n a0, a12, 0 +4021b9ea: 302002 l32i a0, a0, 192 +4021b9ed: 120c movi.n a2, 1 +4021b9ef: 0000c0 callx0 a0 +4021b9f2: 2128 l32i.n a2, a1, 8 +4021b9f4: f9d445 call0 4021573c +4021b9f7: 2128 l32i.n a2, a1, 8 +4021b9f9: 013d mov.n a3, a1 +4021b9fb: 140c movi.n a4, 1 +4021b9fd: ff6a45 call0 4021b0a4 +4021ba00: 0c08 l32i.n a0, a12, 0 +4021ba02: 6008 l32i.n a0, a0, 24 +4021ba04: 020c movi.n a2, 0 +4021ba06: 0000c0 callx0 a0 +4021ba09: 0c08 l32i.n a0, a12, 0 +4021ba0b: f008 l32i.n a0, a0, 60 +4021ba0d: 120c movi.n a2, 1 +4021ba0f: 0000c0 callx0 a0 +4021ba12: 77a022 movi a2, 119 +4021ba15: 030c movi.n a3, 0 +4021ba17: 940c movi.n a4, 9 +4021ba19: 750c movi.n a5, 7 +4021ba1b: 0c08 l32i.n a0, a12, 0 +4021ba1d: 060c movi.n a6, 0 +4021ba1f: 272002 l32i a0, a0, 156 +4021ba22: 070c movi.n a7, 0 +4021ba24: 0000c0 callx0 a0 +4021ba27: 77a022 movi a2, 119 +4021ba2a: 030c movi.n a3, 0 +4021ba2c: 041c movi.n a4, 16 +4021ba2e: 250c movi.n a5, 2 +4021ba30: 0c08 l32i.n a0, a12, 0 +4021ba32: 260c movi.n a6, 2 +4021ba34: 272002 l32i a0, a0, 156 +4021ba37: 170c movi.n a7, 1 +4021ba39: 0000c0 callx0 a0 +4021ba3c: 3128 l32i.n a2, a1, 12 +4021ba3e: 440172 l8ui a7, a1, 68 +4021ba41: 0f3d mov.n a3, a15 +4021ba43: 412b addi.n a4, a1, 2 +4021ba45: 4001f2 l8ui a15, a1, 64 +4021ba48: 0e5d mov.n a5, a14 +4021ba4a: 0f6d mov.n a6, a15 +4021ba4c: ffd145 call0 4021b764 +4021ba4f: 0c08 l32i.n a0, a12, 0 +4021ba51: 1b2002 l32i a0, a0, 108 +4021ba54: 120c movi.n a2, 1 +4021ba56: 0000c0 callx0 a0 +4021ba59: 77a022 movi a2, 119 +4021ba5c: 030c movi.n a3, 0 +4021ba5e: 041c movi.n a4, 16 +4021ba60: 050c movi.n a5, 0 +4021ba62: 060c movi.n a6, 0 +4021ba64: 0c08 l32i.n a0, a12, 0 +4021ba66: 5178 l32i.n a7, a1, 20 +4021ba68: 272002 l32i a0, a0, 156 +4021ba6b: 4179 s32i.n a7, a1, 16 +4021ba6d: 0000c0 callx0 a0 +4021ba70: 6178 l32i.n a7, a1, 24 +4021ba72: 77a022 movi a2, 119 +4021ba75: 030c movi.n a3, 0 +4021ba77: f40c movi.n a4, 15 +4021ba79: 0c08 l32i.n a0, a12, 0 +4021ba7b: 650c movi.n a5, 6 +4021ba7d: 272002 l32i a0, a0, 156 +4021ba80: 660c movi.n a6, 6 +4021ba82: 0000c0 callx0 a0 +4021ba85: 7178 l32i.n a7, a1, 28 +4021ba87: 77a022 movi a2, 119 +4021ba8a: 030c movi.n a3, 0 +4021ba8c: 940c movi.n a4, 9 +4021ba8e: 0c08 l32i.n a0, a12, 0 +4021ba90: 750c movi.n a5, 7 +4021ba92: 272002 l32i a0, a0, 156 +4021ba95: 060c movi.n a6, 0 +4021ba97: 0000c0 callx0 a0 +4021ba9a: 77a022 movi a2, 119 +4021ba9d: 030c movi.n a3, 0 +4021ba9f: 041c movi.n a4, 16 +4021baa1: 250c movi.n a5, 2 +4021baa3: 0c08 l32i.n a0, a12, 0 +4021baa5: 260c movi.n a6, 2 +4021baa7: 272002 l32i a0, a0, 156 +4021baaa: 070c movi.n a7, 0 +4021baac: 0000c0 callx0 a0 +4021baaf: f20c movi.n a2, 15 +4021bab1: 020142 l8ui a4, a1, 2 +4021bab4: 107c movi.n a0, -15 +4021bab6: 014480 slli a4, a4, 24 +4021bab9: 314840 srai a4, a4, 24 +4021babc: 012407 blt a4, a0, 4021bac1 +4021babf: 040d mov.n a0, a4 +4021bac1: 030142 l8ui a4, a1, 3 +4021bac4: 012207 blt a2, a0, 4021bac9 +4021bac7: 002d mov.n a2, a0 +4021bac9: 106c movi.n a0, -31 +4021bacb: 024122 s8i a2, a1, 2 +4021bace: 014480 slli a4, a4, 24 +4021bad1: 013280 slli a3, a2, 24 +4021bad4: 313830 srai a3, a3, 24 +4021bad7: 314840 srai a4, a4, 24 +4021bada: f21c movi.n a2, 31 +4021badc: 012407 blt a4, a0, 4021bae1 +4021badf: 040d mov.n a0, a4 +4021bae1: 012207 blt a2, a0, 4021bae6 +4021bae4: 002d mov.n a2, a0 +4021bae6: 034122 s8i a2, a1, 3 +4021bae9: 014280 slli a4, a2, 24 +4021baec: 314840 srai a4, a4, 24 +4021baef: ee8c beqz.n a14, 4021bb01 +4021baf1: 4158 l32i.n a5, a1, 16 +4021baf3: a58c beqz.n a5, 4021bb01 +4021baf5: 603030 neg a3, a3 +4021baf8: 024132 s8i a3, a1, 2 +4021bafb: 013380 slli a3, a3, 24 +4021bafe: 313830 srai a3, a3, 24 +4021bb01: df8c beqz.n a15, 4021bb12 +4021bb03: ff9b21 l32r a2, 4021b970 +4021bb06: 995101 l32r a0, 4020204c +4021bb09: 0000c0 callx0 a0 +4021bb0c: 030142 l8ui a4, a1, 3 +4021bb0f: 020132 l8ui a3, a1, 2 +4021bb12: 045730 extui a5, a3, 7, 1 +4021bb15: 01e380 slli a14, a3, 24 +4021bb18: 31e8e0 srai a14, a14, 24 +4021bb1b: 086516 beqz a5, 4021bba5 +4021bb1e: 20c3e2 addi a14, a3, 32 +4021bb21: 002006 j 4021bba5 +4021bb24: 0013c2 l16ui a12, a3, 0 +4021bb27: 41e8c0 srli a14, a12, 8 +4021bb2a: 01cc80 slli a12, a12, 24 +4021bb2d: 31c8c0 srai a12, a12, 24 +4021bb30: e6d561 l32r a6, 40215684 +4021bb33: 01ae80 slli a10, a14, 24 +4021bb36: eeabb1 l32r a11, 402175e4 +4021bb39: 019ce0 slli a9, a12, 18 +4021bb3c: 2099b0 or a9, a9, a11 +4021bb3f: e9bce1 l32r a14, 40216230 +4021bb42: ff8cb1 l32r a11, 4021b974 +4021bb45: 0020c0 memw +4021bb48: 982e82 l32i a8, a14, 0x260 +4021bb4b: 1088b0 and a8, a8, a11 +4021bb4e: 2088a0 or a8, a8, a10 +4021bb51: 208890 or a8, a8, a9 +4021bb54: 0020c0 memw +4021bb57: 986e82 s32i a8, a14, 0x260 +4021bb5a: 072c movi.n a7, 32 +4021bb5c: 0020c0 memw +4021bb5f: a658 l32i.n a5, a6, 40 +4021bb61: 205570 or a5, a5, a7 +4021bb64: 0020c0 memw +4021bb67: a659 s32i.n a5, a6, 40 +4021bb69: 047c movi.n a4, -16 +4021bb6b: 230c movi.n a3, 2 +4021bb6d: 0020c0 memw +4021bb70: 8f2e22 l32i a2, a14, 0x23c +4021bb73: 102240 and a2, a2, a4 +4021bb76: 202230 or a2, a2, a3 +4021bb79: 0020c0 memw +4021bb7c: 8f6e22 s32i a2, a14, 0x23c +4021bb7f: 0eae02 movi a0, 0xfffffe0e +4021bb82: 1f0c movi.n a15, 1 +4021bb84: 0020c0 memw +4021bb87: 992ed2 l32i a13, a14, 0x264 +4021bb8a: 10dd00 and a13, a13, a0 +4021bb8d: 20ddf0 or a13, a13, a15 +4021bb90: 0020c0 memw +4021bb93: 91c8 l32i.n a12, a1, 36 +4021bb95: 996ed2 s32i a13, a14, 0x264 +4021bb98: c1f8 l32i.n a15, a1, 48 +4021bb9a: a1d8 l32i.n a13, a1, 40 +4021bb9c: b1e8 l32i.n a14, a1, 44 +4021bb9e: 8108 l32i.n a0, a1, 32 +4021bba0: 40c112 addi a1, a1, 64 +4021bba3: f00d ret.n +4021bba5: 01f480 slli a15, a4, 24 +4021bba8: 31f8f0 srai a15, a15, 24 +4021bbab: 026477 bbci a4, 7, 4021bbb1 +4021bbae: 40c4f2 addi a15, a4, 64 +4021bbb1: 0c08 l32i.n a0, a12, 0 +4021bbb3: 01cf80 slli a12, a15, 24 +4021bbb6: 2a2002 l32i a0, a0, 168 +4021bbb9: 31c8c0 srai a12, a12, 24 +4021bbbc: 0000c0 callx0 a0 +4021bbbf: b25831 l32r a3, 40208520 +4021bbc2: 0d28 l32i.n a2, a13, 0 +4021bbc4: 014f80 slli a4, a15, 24 +4021bbc7: 115e80 slli a5, a14, 8 +4021bbca: 314840 srai a4, a4, 24 +4021bbcd: 204450 or a4, a4, a5 +4021bbd0: 1158 l32i.n a5, a1, 4 +4021bbd2: 202230 or a2, a2, a3 +4021bbd5: 005542 s16i a4, a5, 0 +4021bbd8: 0d29 s32i.n a2, a13, 0 +4021bbda: ffd486 j 4021bb30 +4021bbdd: 000000 ill + +4021bbe0 : +4021bbe0: e0c112 addi a1, a1, -32 +4021bbe3: 31e9 s32i.n a14, a1, 12 +4021bbe5: 21d9 s32i.n a13, a1, 8 +4021bbe7: 11c9 s32i.n a12, a1, 4 +4021bbe9: 41f9 s32i.n a15, a1, 16 +4021bbeb: e7faf1 l32r a15, 40215bd4 +4021bbee: 0109 s32i.n a0, a1, 0 +4021bbf0: 0f08 l32i.n a0, a15, 0 +4021bbf2: e66ec1 l32r a12, 402155ac +4021bbf5: 35f077 bbsi a0, 23, 4021bc2e +4021bbf8: 6aa022 movi a2, 106 +4021bbfb: 230c movi.n a3, 2 +4021bbfd: 040c movi.n a4, 0 +4021bbff: 550c movi.n a5, 5 +4021bc01: 0c08 l32i.n a0, a12, 0 +4021bc03: 460c movi.n a6, 4 +4021bc05: 272002 l32i a0, a0, 156 +4021bc08: 070c movi.n a7, 0 +4021bc0a: 0000c0 callx0 a0 +4021bc0d: e7ef91 l32r a9, 40215bcc +4021bc10: 0ca8 l32i.n a10, a12, 0 +4021bc12: 000922 l8ui a2, a9, 0 +4021bc15: 272aa2 l32i a10, a10, 156 +4021bc18: 056216 beqz a2, 4021bc72 +4021bc1b: 6aa022 movi a2, 106 +4021bc1e: 230c movi.n a3, 2 +4021bc20: 440c movi.n a4, 4 +4021bc22: 750c movi.n a5, 7 +4021bc24: 460c movi.n a6, 4 +4021bc26: 170c movi.n a7, 1 +4021bc28: 000ac0 callx0 a10 +4021bc2b: 0014c6 j 4021bc82 +4021bc2e: 2c0fd2 l8ui a13, a15, 44 +4021bc31: 61a022 movi a2, 97 +4021bc34: 130c movi.n a3, 1 +4021bc36: 240c movi.n a4, 2 +4021bc38: a0a052 movi a5, 160 +4021bc3b: 0c08 l32i.n a0, a12, 0 +4021bc3d: 205d50 or a5, a13, a5 +4021bc40: 262002 l32i a0, a0, 152 +4021bc43: 745050 extui a5, a5, 0, 8 +4021bc46: 0000c0 callx0 a0 +4021bc49: 66a022 movi a2, 102 +4021bc4c: 330c movi.n a3, 3 +4021bc4e: 140c movi.n a4, 1 +4021bc50: 21d8 l32i.n a13, a1, 8 +4021bc52: 31e8 l32i.n a14, a1, 12 +4021bc54: 064c movi.n a6, 64 +4021bc56: 0c08 l32i.n a0, a12, 0 +4021bc58: 2d0f52 l8ui a5, a15, 45 +4021bc5b: 11c8 l32i.n a12, a1, 4 +4021bc5d: 41f8 l32i.n a15, a1, 16 +4021bc5f: 205560 or a5, a5, a6 +4021bc62: 262002 l32i a0, a0, 152 +4021bc65: 745050 extui a5, a5, 0, 8 +4021bc68: 0000c0 callx0 a0 +4021bc6b: 0108 l32i.n a0, a1, 0 +4021bc6d: 20c112 addi a1, a1, 32 +4021bc70: f00d ret.n +4021bc72: 6aa022 movi a2, 106 +4021bc75: 230c movi.n a3, 2 +4021bc77: 440c movi.n a4, 4 +4021bc79: 750c movi.n a5, 7 +4021bc7b: 460c movi.n a6, 4 +4021bc7d: 270c movi.n a7, 2 +4021bc7f: 000ac0 callx0 a10 +4021bc82: 68a022 movi a2, 104 +4021bc85: 330c movi.n a3, 3 +4021bc87: 140c movi.n a4, 1 +4021bc89: 050c movi.n a5, 0 +4021bc8b: 0c08 l32i.n a0, a12, 0 +4021bc8d: 060c movi.n a6, 0 +4021bc8f: 272002 l32i a0, a0, 156 +4021bc92: 170c movi.n a7, 1 +4021bc94: 0000c0 callx0 a0 +4021bc97: 6aa022 movi a2, 106 +4021bc9a: 230c movi.n a3, 2 +4021bc9c: 640c movi.n a4, 6 +4021bc9e: 450c movi.n a5, 4 +4021bca0: 0c08 l32i.n a0, a12, 0 +4021bca2: 060c movi.n a6, 0 +4021bca4: 272002 l32i a0, a0, 156 +4021bca7: 870c movi.n a7, 8 +4021bca9: 0000c0 callx0 a0 +4021bcac: 6aa022 movi a2, 106 +4021bcaf: 230c movi.n a3, 2 +4021bcb1: 440c movi.n a4, 4 +4021bcb3: 050c movi.n a5, 0 +4021bcb5: 0c08 l32i.n a0, a12, 0 +4021bcb7: 060c movi.n a6, 0 +4021bcb9: 272002 l32i a0, a0, 156 +4021bcbc: 170c movi.n a7, 1 +4021bcbe: 0000c0 callx0 a0 +4021bcc1: 6aa022 movi a2, 106 +4021bcc4: 230c movi.n a3, 2 +4021bcc6: 340c movi.n a4, 3 +4021bcc8: 650c movi.n a5, 6 +4021bcca: 0c08 l32i.n a0, a12, 0 +4021bccc: 660c movi.n a6, 6 +4021bcce: 272002 l32i a0, a0, 156 +4021bcd1: 170c movi.n a7, 1 +4021bcd3: 0000c0 callx0 a0 +4021bcd6: 6aa022 movi a2, 106 +4021bcd9: 230c movi.n a3, 2 +4021bcdb: 440c movi.n a4, 4 +4021bcdd: 350c movi.n a5, 3 +4021bcdf: 0c08 l32i.n a0, a12, 0 +4021bce1: 360c movi.n a6, 3 +4021bce3: 272002 l32i a0, a0, 156 +4021bce6: 070c movi.n a7, 0 +4021bce8: 0000c0 callx0 a0 +4021bceb: 6aa022 movi a2, 106 +4021bcee: 230c movi.n a3, 2 +4021bcf0: 440c movi.n a4, 4 +4021bcf2: 350c movi.n a5, 3 +4021bcf4: 0c08 l32i.n a0, a12, 0 +4021bcf6: 360c movi.n a6, 3 +4021bcf8: 272002 l32i a0, a0, 156 +4021bcfb: 170c movi.n a7, 1 +4021bcfd: 0000c0 callx0 a0 +4021bd00: 64a022 movi a2, 100 +4021bd03: a56601 l32r a0, 4020529c +4021bd06: 0000c0 callx0 a0 +4021bd09: 6aa022 movi a2, 106 +4021bd0c: 230c movi.n a3, 2 +4021bd0e: 540c movi.n a4, 5 +4021bd10: 0c08 l32i.n a0, a12, 0 +4021bd12: 550c movi.n a5, 5 +4021bd14: 252002 l32i a0, a0, 148 +4021bd17: 060c movi.n a6, 0 +4021bd19: 0000c0 callx0 a0 +4021bd1c: 330c movi.n a3, 3 +4021bd1e: 140c movi.n a4, 1 +4021bd20: 050c movi.n a5, 0 +4021bd22: 060c movi.n a6, 0 +4021bd24: 070c movi.n a7, 0 +4021bd26: 0c08 l32i.n a0, a12, 0 +4021bd28: 02ed mov.n a14, a2 +4021bd2a: 272002 l32i a0, a0, 156 +4021bd2d: 68a022 movi a2, 104 +4021bd30: 0000c0 callx0 a0 +4021bd33: e7a601 l32r a0, 40215bcc +4021bd36: fe8941 l32r a4, 4021b75c +4021bd39: 000062 l8ui a6, a0, 0 +4021bd3c: 043eb6 bltui a14, 3, 4021bd44 +4021bd3f: c23c movi.n a2, 60 +4021bd41: 09b2e7 bgeu a2, a14, 4021bd4e +4021bd44: a5f651 l32r a5, 4020551c +4021bd47: 0438 l32i.n a3, a4, 0 +4021bd49: 203350 or a3, a3, a5 +4021bd4c: 0439 s32i.n a3, a4, 0 +4021bd4e: a6bc beqz.n a6, 4021bd8c +4021bd50: e31c movi.n a3, 30 +4021bd52: 112ec0 slli a2, a14, 4 +4021bd55: d9c222 addi a2, a2, -39 +4021bd58: 97b001 l32r a0, 40201c18 +4021bd5b: 0000c0 callx0 a0 +4021bd5e: 02dd mov.n a13, a2 +4021bd60: 2c4fd2 s8i a13, a15, 44 +4021bd63: 930c movi.n a3, 9 +4021bd65: f02ee0 subx8 a2, a14, a14 +4021bd68: 1122e0 slli a2, a2, 2 +4021bd6b: f42020 extui a2, a2, 0, 16 +4021bd6e: 985701 l32r a0, 40201ecc +4021bd71: 0000c0 callx0 a0 +4021bd74: e72551 l32r a5, 40215a08 +4021bd77: 0f48 l32i.n a4, a15, 0 +4021bd79: 743020 extui a3, a2, 0, 8 +4021bd7c: 332b addi.n a3, a3, 2 +4021bd7e: 213230 srai a3, a3, 2 +4021bd81: 2d4f32 s8i a3, a15, 45 +4021bd84: 204450 or a4, a4, a5 +4021bd87: 0f49 s32i.n a4, a15, 0 +4021bd89: ffa906 j 4021bc31 +4021bd8c: 431c movi.n a3, 20 +4021bd8e: a02ee0 addx4 a2, a14, a14 +4021bd91: 9022e0 addx2 a2, a2, a14 +4021bd94: f2c222 addi a2, a2, -14 +4021bd97: 97a001 l32r a0, 40201c18 +4021bd9a: 0000c0 callx0 a0 +4021bd9d: 02dd mov.n a13, a2 +4021bd9f: ffef46 j 4021bd60 +4021bda2: dd0000 excw +4021bda5: 21bd excw +4021bda7: 8ba240 excw +4021bdaa: fe .byte 0xfe +4021bdab: 3f .byte 0x3f + +4021bdac : +4021bdac: f0c112 addi a1, a1, -16 +4021bdaf: 21d9 s32i.n a13, a1, 8 +4021bdb1: 11c9 s32i.n a12, a1, 4 +4021bdb3: 0109 s32i.n a0, a1, 0 +4021bdb5: 02cd mov.n a12, a2 +4021bdb7: 100c movi.n a0, 1 +4021bdb9: e78621 l32r a2, 40215bd4 +4021bdbc: 03dd mov.n a13, a3 +4021bdbe: 520222 l8ui a2, a2, 82 +4021bdc1: 0c3d mov.n a3, a12 +4021bdc3: 932020 movnez a2, a0, a2 +4021bdc6: ff8305 call0 4021b5f8 +4021bdc9: e78201 l32r a0, 40215bd4 +4021bdcc: e78061 l32r a6, 40215bcc +4021bdcf: 3abcf6 bgeui a12, 16, 4021be0d +4021bdd2: fff441 l32r a4, 4021bda4 +4021bdd5: 903cc0 addx2 a3, a12, a12 +4021bdd8: 334a add.n a3, a3, a4 +4021bdda: 0003a0 jx a3 +4021bddd: 002886 j 4021be83 +4021bde0: 0027c6 j 4021be83 +4021bde3: 003306 j 4021beb3 +4021bde6: 003246 j 4021beb3 +4021bde9: 002586 j 4021be83 +4021bdec: 0024c6 j 4021be83 +4021bdef: 003006 j 4021beb3 +4021bdf2: 002f46 j 4021beb3 +4021bdf5: 002d06 j 4021bead +4021bdf8: 002ac6 j 4021bea7 +4021bdfb: 002886 j 4021bea1 +4021bdfe: 0021c6 j 4021be89 +4021be01: 002586 j 4021be9b +4021be04: 002346 j 4021be95 +4021be07: 002106 j 4021be8f +4021be0a: 001ec6 j 4021be89 +4021be0d: 3cda add.n a3, a12, a13 +4021be0f: ffd332 addmi a3, a3, 0xffffff00 +4021be12: f00332 l8ui a3, a3, 240 +4021be15: 300002 l8ui a0, a0, 48 +4021be18: 0b8cf6 bgeui a12, 8, 4021be27 +4021be1b: 400642 l8ui a4, a6, 64 +4021be1e: 050456 bnez a4, 4021be72 +4021be21: 000d32 l8ui a3, a13, 0 +4021be24: 001286 j 4021be72 +4021be27: 010080 slli a0, a0, 24 +4021be2a: 310800 srai a0, a0, 24 +4021be2d: 171026 beqi a0, 1, 4021be48 +4021be30: b20c movi.n a2, 11 +4021be32: 411027 beq a0, a2, 4021be77 +4021be35: d40c movi.n a4, 13 +4021be37: 421047 beq a0, a4, 4021be7d +4021be3a: f2c072 addi a7, a0, -14 +4021be3d: 130652 l8ui a5, a6, 19 +4021be40: 000c movi.n a0, 0 +4021be42: 830570 moveqz a0, a5, a7 +4021be45: 000086 j 4021be4b +4021be48: 100602 l8ui a0, a6, 16 +4021be4b: 742030 extui a2, a3, 0, 8 +4021be4e: 05b207 bgeu a2, a0, 4021be57 +4021be51: 390682 l8ui a8, a6, 57 +4021be54: 012826 beqi a8, 2, 4021be59 +4021be57: 020d mov.n a0, a2 +4021be59: 11c8 l32i.n a12, a1, 4 +4021be5b: ffd321 l32r a2, 4021bda8 +4021be5e: 21d8 l32i.n a13, a1, 8 +4021be60: 000222 l8ui a2, a2, 0 +4021be63: 740000 extui a0, a0, 0, 8 +4021be66: 01b207 bgeu a2, a0, 4021be6b +4021be69: 002d mov.n a2, a0 +4021be6b: 0108 l32i.n a0, a1, 0 +4021be6d: 10c112 addi a1, a1, 16 +4021be70: f00d ret.n +4021be72: 323a add.n a3, a2, a3 +4021be74: ffebc6 j 4021be27 +4021be77: 110602 l8ui a0, a6, 17 +4021be7a: fff346 j 4021be4b +4021be7d: 120602 l8ui a0, a6, 18 +4021be80: fff1c6 j 4021be4b +4021be83: 420632 l8ui a3, a6, 66 +4021be86: ffe2c6 j 4021be15 +4021be89: 000d32 l8ui a3, a13, 0 +4021be8c: ffe146 j 4021be15 +4021be8f: 020d32 l8ui a3, a13, 2 +4021be92: ffdfc6 j 4021be15 +4021be95: 040d32 l8ui a3, a13, 4 +4021be98: ffde46 j 4021be15 +4021be9b: 060d32 l8ui a3, a13, 6 +4021be9e: ffdcc6 j 4021be15 +4021bea1: 010d32 l8ui a3, a13, 1 +4021bea4: ffdb46 j 4021be15 +4021bea7: 030d32 l8ui a3, a13, 3 +4021beaa: ffd9c6 j 4021be15 +4021bead: 050d32 l8ui a3, a13, 5 +4021beb0: ffd846 j 4021be15 +4021beb3: 410632 l8ui a3, a6, 65 +4021beb6: ffd6c6 j 4021be15 +4021beb9: 000000 ill + +4021bebc : +4021bebc: 642b addi.n a6, a4, 2 +4021bebe: 009382 l16si a8, a3, 0 +4021bec1: 400400 ssr a4 +4021bec4: b19080 sra a9, a8 +4021bec7: c08890 sub a8, a8, a9 +4021beca: 401600 ssl a6 +4021becd: 828a add.n a8, a2, a8 +4021becf: a12500 sll a2, a5 +4021bed2: 118800 slli a8, a8, 16 +4021bed5: 318080 srai a8, a8, 16 +4021bed8: 005382 s16i a8, a3, 0 +4021bedb: 142827 blt a8, a2, 4021bef3 +4021bede: c04820 sub a4, a8, a2 +4021bee1: 602050 neg a2, a5 +4021bee4: 012280 slli a2, a2, 24 +4021bee7: 312820 srai a2, a2, 24 +4021beea: 005342 s16i a4, a3, 0 +4021beed: f00d ret.n +4021beef: 020c movi.n a2, 0 +4021bef1: f00d ret.n +4021bef3: 604020 neg a4, a2 +4021bef6: f52487 blt a4, a8, 4021beef +4021bef9: 482a add.n a4, a8, a2 +4021befb: 012580 slli a2, a5, 24 +4021befe: 312820 srai a2, a2, 24 +4021bf01: fff946 j 4021beea +4021bf04: 22fb40 excw +4021bf07: 0ff340 excw +4021bf0a: d00000 subx2 a0, a0, a0 +4021bf0d: 22fb addi.n a2, a2, 15 +4021bf0f: 40 .byte 0x40 + +4021bf10 : +4021bf10: a0c112 addi a1, a1, -96 +4021bf13: 1261d2 s32i a13, a1, 72 +4021bf16: 1461f2 s32i a15, a1, 80 +4021bf19: 106102 s32i a0, a1, 64 +4021bf1c: e129 s32i.n a2, a1, 56 +4021bf1e: f159 s32i.n a5, a1, 60 +4021bf20: 166162 s32i a6, a1, 88 +4021bf23: 1161c2 s32i a12, a1, 68 +4021bf26: 1361e2 s32i a14, a1, 76 +4021bf29: 03ed mov.n a14, a3 +4021bf2b: e68ac1 l32r a12, 40215954 +4021bf2e: 0020c0 memw +4021bf31: 38a122 movi a2, 0x138 +4021bf34: d82cc2 l32i a12, a12, 0x360 +4021bf37: d149 s32i.n a4, a1, 52 +4021bf39: 45c8c0 extui a12, a12, 24, 5 +4021bf3c: ff2ec5 call0 4021b22c +4021bf3f: fe07f1 l32r a15, 4021b75c +4021bf42: 02dd mov.n a13, a2 +4021bf44: 025f22 s16i a2, a15, 4 +4021bf47: 0a8cf6 bgeui a12, 8, 4021bf55 +4021bf4a: f27c movi.n a2, -1 +4021bf4c: 302c20 xor a2, a12, a2 +4021bf4f: 242020 extui a2, a2, 0, 3 +4021bf52: 000046 j 4021bf57 +4021bf55: 0c2d mov.n a2, a12 +4021bf57: 0e3d mov.n a3, a14 +4021bf59: ffe505 call0 4021bdac +4021bf5c: e138 l32i.n a3, a1, 56 +4021bf5e: 092c movi.n a9, 32 +4021bf60: 223a add.n a2, a2, a3 +4021bf62: 156122 s32i a2, a1, 84 +4021bf65: 000222 l8ui a2, a2, 0 +4021bf68: 006c movi.n a0, -32 +4021bf6a: 1122e0 slli a2, a2, 2 +4021bf6d: c02d20 sub a2, a13, a2 +4021bf70: 112200 slli a2, a2, 16 +4021bf73: 312020 srai a2, a2, 16 +4021bf76: 035f22 s16i a2, a15, 6 +4021bf79: 012207 blt a2, a0, 4021bf7e +4021bf7c: 020d mov.n a0, a2 +4021bf7e: 080f42 l8ui a4, a15, 8 +4021bf81: 012907 blt a9, a0, 4021bf86 +4021bf84: 009d mov.n a9, a0 +4021bf86: 112900 slli a2, a9, 16 +4021bf89: 312020 srai a2, a2, 16 +4021bf8c: 1944f6 bgeui a4, 4, 4021bfa9 +4021bf8f: 0212e6 bgei a2, 1, 4021bf95 +4021bf92: 0096c6 j 4021c1f1 +4021bf95: 210220 srai a0, a2, 2 +4021bf98: 020a add.n a0, a2, a0 +4021bf9a: 21d200 srai a13, a0, 2 +4021bf9d: 60d0d0 neg a13, a13 +4021bfa0: 01dd80 slli a13, a13, 24 +4021bfa3: 31d8d0 srai a13, a13, 24 +4021bfa6: 000286 j 4021bfb4 +4021bfa9: d138 l32i.n a3, a1, 52 +4021bfab: 440c movi.n a4, 4 +4021bfad: 250c movi.n a5, 2 +4021bfaf: fff0c5 call0 4021bebc +4021bfb2: 02dd mov.n a13, a2 +4021bfb4: e708e1 l32r a14, 40215bd4 +4021bfb7: 162132 l32i a3, a1, 88 +4021bfba: 0f1da6 blti a13, 1, 4021bfcd +4021bfbd: 5d0e22 l8ui a2, a14, 93 +4021bfc0: 301c movi.n a0, 19 +4021bfc2: 012280 slli a2, a2, 24 +4021bfc5: 312820 srai a2, a2, 24 +4021bfc8: 01a027 bge a0, a2, 4021bfcd +4021bfcb: 0d0c movi.n a13, 0 +4021bfcd: fbde01 l32r a0, 4021af48 +4021bfd0: 065316 beqz a3, 4021c039 +4021bfd3: 0d5d mov.n a5, a13 +4021bfd5: 5d0e72 l8ui a7, a14, 93 +4021bfd8: 039f42 l16si a4, a15, 6 +4021bfdb: 5c0e82 l8ui a8, a14, 92 +4021bfde: d168 l32i.n a6, a1, 52 +4021bfe0: 152132 l32i a3, a1, 84 +4021bfe3: 009662 l16si a6, a6, 0 +4021bfe6: 000332 l8ui a3, a3, 0 +4021bfe9: 018880 slli a8, a8, 24 +4021bfec: 318880 srai a8, a8, 24 +4021bfef: 0189 s32i.n a8, a1, 0 +4021bff1: ffc421 l32r a2, 4021bf04 +4021bff4: 017780 slli a7, a7, 24 +4021bff7: 317870 srai a7, a7, 24 +4021bffa: 0020c0 memw +4021bffd: e59f81 l32r a8, 4021567c +4021c000: d828b2 l32i a11, a8, 0x360 +4021c003: 00ad mov.n a10, a0 +4021c005: 01bb80 slli a11, a11, 24 +4021c008: 31b8b0 srai a11, a11, 24 +4021c00b: 11b9 s32i.n a11, a1, 4 +4021c00d: 001aa2 l16ui a10, a10, 0 +4021c010: 21a9 s32i.n a10, a1, 8 +4021c012: 31c9 s32i.n a12, a1, 12 +4021c014: 300e92 l8ui a9, a14, 48 +4021c017: 019980 slli a9, a9, 24 +4021c01a: 319890 srai a9, a9, 24 +4021c01d: 4199 s32i.n a9, a1, 16 +4021c01f: a08c80 addx4 a8, a12, a8 +4021c022: 0020c0 memw +4021c025: c12882 l32i a8, a8, 0x304 +4021c028: 018880 slli a8, a8, 24 +4021c02b: 318880 srai a8, a8, 24 +4021c02e: 5189 s32i.n a8, a1, 20 +4021c030: 980701 l32r a0, 4020204c +4021c033: 0000c0 callx0 a0 +4021c036: fbc401 l32r a0, 4021af48 +4021c039: f188 l32i.n a8, a1, 60 +4021c03b: 19e816 beqz a8, 4021c1dd +4021c03e: c1c9 s32i.n a12, a1, 48 +4021c040: 199d16 beqz a13, 4021c1dd +4021c043: 7fa0c2 movi a12, 127 +4021c046: 020c movi.n a2, 0 +4021c048: 0dfd mov.n a15, a13 +4021c04a: 5c0e42 l8ui a4, a14, 92 +4021c04d: 432c movi.n a3, 36 +4021c04f: 014480 slli a4, a4, 24 +4021c052: 314840 srai a4, a4, 24 +4021c055: 905220 addx2 a5, a2, a2 +4021c058: 221b addi.n a2, a2, 1 +4021c05a: 9055e0 addx2 a5, a5, a14 +4021c05d: 3d0552 l8ui a5, a5, 61 +4021c060: 742020 extui a2, a2, 0, 8 +4021c063: 015580 slli a5, a5, 24 +4021c066: 315850 srai a5, a5, 24 +4021c069: 01ac57 bge a12, a5, 4021c06e +4021c06c: 0c5d mov.n a5, a12 +4021c06e: 01c580 slli a12, a5, 24 +4021c071: 31c8c0 srai a12, a12, 24 +4021c074: dd4266 bnei a2, 4, 4021c055 +4021c077: c4ca add.n a12, a4, a12 +4021c079: c02cd0 sub a2, a12, a13 +4021c07c: 012280 slli a2, a2, 24 +4021c07f: 312820 srai a2, a2, 24 +4021c082: 08a327 bge a3, a2, 4021c08e +4021c085: 001062 l16ui a6, a0, 0 +4021c088: e4a352 movi a5, 0x3e4 +4021c08b: 0b3567 bltu a5, a6, 4021c09a +4021c08e: 75a2e6 bgei a2, 12, 4021c107 +4021c091: 001082 l16ui a8, a0, 0 +4021c094: ff9d71 l32r a7, 4021bf08 +4021c097: 6c3787 bltu a7, a8, 4021c107 +4021c09a: fbab31 l32r a3, 4021af48 +4021c09d: 891c movi.n a9, 24 +4021c09f: c09920 sub a9, a9, a2 +4021c0a2: 204192 s8i a9, a1, 32 +4021c0a5: 20c122 addi a2, a1, 32 +4021c0a8: ff07c5 call0 4021b128 +4021c0ab: 5e0e02 l8ui a0, a14, 94 +4021c0ae: 200142 l8ui a4, a1, 32 +4021c0b1: 5d0e32 l8ui a3, a14, 93 +4021c0b4: c05dc0 sub a5, a13, a12 +4021c0b7: 18c552 addi a5, a5, 24 +4021c0ba: 013380 slli a3, a3, 24 +4021c0bd: 014480 slli a4, a4, 24 +4021c0c0: 010080 slli a0, a0, 24 +4021c0c3: 310800 srai a0, a0, 24 +4021c0c6: 314840 srai a4, a4, 24 +4021c0c9: 313830 srai a3, a3, 24 +4021c0cc: c02540 sub a2, a5, a4 +4021c0cf: c04450 sub a4, a4, a5 +4021c0d2: 332a add.n a3, a3, a2 +4021c0d4: 002a add.n a0, a0, a2 +4021c0d6: 5e4e02 s8i a0, a14, 94 +4021c0d9: 5d4e32 s8i a3, a14, 93 +4021c0dc: ff4a add.n a15, a15, a4 +4021c0de: 22c132 addi a3, a1, 34 +4021c0e1: 040c movi.n a4, 0 +4021c0e3: fb9921 l32r a2, 4021af48 +4021c0e6: 01ff80 slli a15, a15, 24 +4021c0e9: 31f8f0 srai a15, a15, 24 +4021c0ec: 001222 l16ui a2, a2, 0 +4021c0ef: fefb45 call0 4021b0a4 +4021c0f2: fb9521 l32r a2, 4021af48 +4021c0f5: 22c132 addi a3, a1, 34 +4021c0f8: 001222 l16ui a2, a2, 0 +4021c0fb: fef0c5 call0 4021b008 +4021c0fe: fb9201 l32r a0, 4021af48 +4021c101: 001032 l16ui a3, a0, 0 +4021c104: 2d5e32 s16i a3, a14, 90 +4021c107: 00dfd6 bgez a15, 4021c118 +4021c10a: 644c movi.n a4, 70 +4021c10c: c05cf0 sub a5, a12, a15 +4021c10f: 015580 slli a5, a5, 24 +4021c112: 315850 srai a5, a5, 24 +4021c115: 14a457 bge a4, a5, 4021c12d +4021c118: 021fe6 bgei a15, 1, 4021c11e +4021c11b: 002f86 j 4021c1dd +4021c11e: c06cf0 sub a6, a12, a15 +4021c121: 016680 slli a6, a6, 24 +4021c124: 316860 srai a6, a6, 24 +4021c127: 02a6e6 bgei a6, 12, 4021c12d +4021c12a: 002bc6 j 4021c1dd +4021c12d: 300e22 l8ui a2, a14, 48 +4021c130: 28c132 addi a3, a1, 40 +4021c133: 5c0e92 l8ui a9, a14, 92 +4021c136: 5e0e72 l8ui a7, a14, 94 +4021c139: 5d0e82 l8ui a8, a14, 93 +4021c13c: 017780 slli a7, a7, 24 +4021c13f: 018880 slli a8, a8, 24 +4021c142: 019980 slli a9, a9, 24 +4021c145: 319890 srai a9, a9, 24 +4021c148: 318880 srai a8, a8, 24 +4021c14b: 317870 srai a7, a7, 24 +4021c14e: 8077f0 add a7, a7, a15 +4021c151: 8088f0 add a8, a8, a15 +4021c154: c099f0 sub a9, a9, a15 +4021c157: 5c4e92 s8i a9, a14, 92 +4021c15a: 5d4e82 s8i a8, a14, 93 +4021c15d: 5e4e72 s8i a7, a14, 94 +4021c160: fbc1c5 call0 40217d80 +4021c163: f08321 l32r a2, 40218370 +4021c166: 182e42 l32i a4, a14, 96 +4021c169: 329b addi.n a3, a2, 9 +4021c16b: fade05 call0 40216f4c +4021c16e: 162182 l32i a8, a1, 88 +4021c171: 068816 beqz a8, 4021c1dd +4021c174: ff6621 l32r a2, 4021bf0c +4021c177: 5d0e72 l8ui a7, a14, 93 +4021c17a: 5c0e82 l8ui a8, a14, 92 +4021c17d: d168 l32i.n a6, a1, 52 +4021c17f: 152132 l32i a3, a1, 84 +4021c182: fd7641 l32r a4, 4021b75c +4021c185: 000332 l8ui a3, a3, 0 +4021c188: 039442 l16si a4, a4, 6 +4021c18b: 009662 l16si a6, a6, 0 +4021c18e: 018880 slli a8, a8, 24 +4021c191: 318880 srai a8, a8, 24 +4021c194: 0189 s32i.n a8, a1, 0 +4021c196: 0d5d mov.n a5, a13 +4021c198: 017780 slli a7, a7, 24 +4021c19b: 317870 srai a7, a7, 24 +4021c19e: 0020c0 memw +4021c1a1: e536a1 l32r a10, 4021567c +4021c1a4: c198 l32i.n a9, a1, 48 +4021c1a6: d82af2 l32i a15, a10, 0x360 +4021c1a9: fb67c1 l32r a12, 4021af48 +4021c1ac: 01ff80 slli a15, a15, 24 +4021c1af: 31f8f0 srai a15, a15, 24 +4021c1b2: 11f9 s32i.n a15, a1, 4 +4021c1b4: 001cc2 l16ui a12, a12, 0 +4021c1b7: 3199 s32i.n a9, a1, 12 +4021c1b9: 21c9 s32i.n a12, a1, 8 +4021c1bb: 300eb2 l8ui a11, a14, 48 +4021c1be: 01bb80 slli a11, a11, 24 +4021c1c1: 31b8b0 srai a11, a11, 24 +4021c1c4: 41b9 s32i.n a11, a1, 16 +4021c1c6: a099a0 addx4 a9, a9, a10 +4021c1c9: 0020c0 memw +4021c1cc: c12992 l32i a9, a9, 0x304 +4021c1cf: 019980 slli a9, a9, 24 +4021c1d2: 319890 srai a9, a9, 24 +4021c1d5: 5199 s32i.n a9, a1, 20 +4021c1d7: 979d01 l32r a0, 4020204c +4021c1da: 0000c0 callx0 a0 +4021c1dd: 1121c2 l32i a12, a1, 68 +4021c1e0: 1221d2 l32i a13, a1, 72 +4021c1e3: 1321e2 l32i a14, a1, 76 +4021c1e6: 1421f2 l32i a15, a1, 80 +4021c1e9: 102102 l32i a0, a1, 64 +4021c1ec: 60c112 addi a1, a1, 96 +4021c1ef: f00d ret.n +4021c1f1: 077c movi.n a7, -16 +4021c1f3: 08a277 bge a2, a7, 4021c1ff +4021c1f6: 210220 srai a0, a2, 2 +4021c1f9: c00200 sub a0, a2, a0 +4021c1fc: ff6686 j 4021bf9a +4021c1ff: 0d0c movi.n a13, 0 +4021c201: ff6bc6 j 4021bfb4 + +4021c204 : +4021c204: e60241 l32r a4, 40215a0c +4021c207: e67c movi.n a6, -2 +4021c209: e5d231 l32r a3, 40215954 +4021c20c: 0020c0 memw +4021c20f: d72322 l32i a2, a3, 0x35c +4021c212: 102240 and a2, a2, a4 +4021c215: 0020c0 memw +4021c218: d76322 s32i a2, a3, 0x35c +4021c21b: e5d0b1 l32r a11, 4021595c +4021c21e: 0020c0 memw +4021c221: d723a2 l32i a10, a3, 0x35c +4021c224: 10aab0 and a10, a10, a11 +4021c227: 0020c0 memw +4021c22a: d763a2 s32i a10, a3, 0x35c +4021c22d: 0020c0 memw +4021c230: d42392 l32i a9, a3, 0x350 +4021c233: 109960 and a9, a9, a6 +4021c236: 0020c0 memw +4021c239: d46392 s32i a9, a3, 0x350 +4021c23c: 280c movi.n a8, 2 +4021c23e: 0020c0 memw +4021c241: d82372 l32i a7, a3, 0x360 +4021c244: 207780 or a7, a7, a8 +4021c247: 0020c0 memw +4021c24a: d86372 s32i a7, a3, 0x360 +4021c24d: 0020c0 memw +4021c250: d82352 l32i a5, a3, 0x360 +4021c253: 105560 and a5, a5, a6 +4021c256: 0020c0 memw +4021c259: d86352 s32i a5, a3, 0x360 +4021c25c: 140c movi.n a4, 1 +4021c25e: 0020c0 memw +4021c261: d82322 l32i a2, a3, 0x360 +4021c264: 202240 or a2, a2, a4 +4021c267: 0020c0 memw +4021c26a: d86322 s32i a2, a3, 0x360 +4021c26d: f00d ret.n +4021c26f: 8ba100 excw +4021c272: fe .byte 0xfe +4021c273: 3f .byte 0x3f +4021c274: fe8aa7 bany a10, a10, 4021c276 +4021c277: 3f .byte 0x3f +4021c278: fe8ba0 excw +4021c27b: 3f .byte 0x3f +4021c27c: fe8b14 excw +4021c27f: 3f .byte 0x3f + +4021c280 : +4021c280: e0c112 addi a1, a1, -32 +4021c283: 046102 s32i a0, a1, 16 +4021c286: e65101 l32r a0, 40215bcc +4021c289: 430042 l8ui a4, a0, 67 +4021c28c: 3d0052 l8ui a5, a0, 61 +4021c28f: 044040 extui a4, a4, 0, 1 +4021c292: 098456 bnez a4, 4021c32e +4021c295: 095556 bnez a5, 4021c32e +4021c298: fff661 l32r a6, 4021c270 +4021c29b: fff671 l32r a7, 4021c274 +4021c29e: 000662 l8ui a6, a6, 0 +4021c2a1: 000772 l8ui a7, a7, 0 +4021c2a4: 086656 bnez a6, 4021c32e +4021c2a7: 083756 bnez a7, 4021c32e +4021c2aa: fd2c01 l32r a0, 4021b75c +4021c2ad: 00a052 movi a5, 0 +4021c2b0: e5a961 l32r a6, 40215954 +4021c2b3: 0020c0 memw +4021c2b6: d42682 l32i a8, a6, 0x350 +4021c2b9: 42f8f7 bbsi a8, 31, 4021c2ff +4021c2bc: 0020c0 memw +4021c2bf: 036122 s32i a2, a1, 12 +4021c2c2: d42692 l32i a9, a6, 0x350 +4021c2c5: 2139 s32i.n a3, a1, 8 +4021c2c7: 259890 extui a9, a9, 24, 3 +4021c2ca: 19fc bnez.n a9, 4021c2ff +4021c2cc: ffeb31 l32r a3, 4021c278 +4021c2cf: 000332 l8ui a3, a3, 0 +4021c2d2: 012d mov.n a2, a1 +4021c2d4: 013380 slli a3, a3, 24 +4021c2d7: 313830 srai a3, a3, 24 +4021c2da: fe1f85 call0 4021a4d4 +4021c2dd: 012d mov.n a2, a1 +4021c2df: eea731 l32r a3, 40217d7c +4021c2e2: ffe641 l32r a4, 4021c27c +4021c2e5: 3158 l32i.n a5, a1, 12 +4021c2e7: 2168 l32i.n a6, a1, 8 +4021c2e9: ffc245 call0 4021bf10 +4021c2ec: fd1c21 l32r a2, 4021b75c +4021c2ef: 080202 l8ui a0, a2, 8 +4021c2f2: 341c movi.n a4, 19 +4021c2f4: 0a3407 bltu a4, a0, 4021c302 +4021c2f7: 501b addi.n a5, a0, 1 +4021c2f9: 084252 s8i a5, a2, 8 +4021c2fc: 000086 j 4021c302 +4021c2ff: 025052 s16i a5, a0, 4 +4021c302: fff005 call0 4021c204 +4021c305: e63321 l32r a2, 40215bd4 +4021c308: e4a901 l32r a0, 402155ac +4021c30b: 5e0222 l8ui a2, a2, 94 +4021c30e: 002002 l32i a0, a0, 0 +4021c311: 012280 slli a2, a2, 24 +4021c314: 002002 l32i a0, a0, 0 +4021c317: 312820 srai a2, a2, 24 +4021c31a: 0000c0 callx0 a0 +4021c31d: 0d82a6 blti a2, 8, 4021c32e +4021c320: e62d31 l32r a3, 40215bd4 +4021c323: 00a022 movi a2, 0 +4021c326: 5e4322 s8i a2, a3, 94 +4021c329: 020c movi.n a2, 0 +4021c32b: fd7745 call0 40219aa0 +4021c32e: 4108 l32i.n a0, a1, 16 +4021c330: 20c112 addi a1, a1, 32 +4021c333: f00d ret.n +4021c335: 000000 ill + +4021c338 : +4021c338: e9c891 l32r a9, 40216a58 +4021c33b: 0b0c movi.n a11, 0 +4021c33d: e58581 l32r a8, 40215954 +4021c340: f0c112 addi a1, a1, -16 +4021c343: 11c9 s32i.n a12, a1, 4 +4021c345: 0109 s32i.n a0, a1, 0 +4021c347: 21d9 s32i.n a13, a1, 8 +4021c349: 000c movi.n a0, 0 +4021c34b: ffa0d2 movi a13, 255 +4021c34e: fc7c movi.n a12, -1 +4021c350: a06080 addx4 a6, a0, a8 +4021c353: 907020 addx2 a7, a0, a2 +4021c356: 0d5d mov.n a5, a13 +4021c358: 0bad mov.n a10, a11 +4021c35a: 0020c0 memw +4021c35d: 17a132 movi a3, 0x117 +4021c360: e02662 l32i a6, a6, 0x380 +4021c363: 001b addi.n a0, a0, 1 +4021c365: 740000 extui a0, a0, 0, 8 +4021c368: 3066c0 xor a6, a6, a12 +4021c36b: 744060 extui a4, a6, 0, 8 +4021c36e: ebc442 addi a4, a4, -21 +4021c371: a46060 extui a6, a6, 0, 11 +4021c374: 005762 s16i a6, a7, 0 +4021c377: b3a440 movgez a10, a4, a4 +4021c37a: 82aa30 mull a10, a10, a3 +4021c37d: 103690 and a3, a6, a9 +4021c380: 21a8a0 srai a10, a10, 8 +4021c383: 012da7 blt a13, a10, 4021c388 +4021c386: 0a5d mov.n a5, a10 +4021c388: 353a add.n a3, a5, a3 +4021c38a: 005732 s16i a3, a7, 0 +4021c38d: bf8066 bnei a0, 8, 4021c350 +4021c390: 11c8 l32i.n a12, a1, 4 +4021c392: 21d8 l32i.n a13, a1, 8 +4021c394: 0108 l32i.n a0, a1, 0 +4021c396: 10c112 addi a1, a1, 16 +4021c399: f00d ret.n + ... + +4021c39c : +4021c39c: e0c112 addi a1, a1, -32 +4021c39f: 6109 s32i.n a0, a1, 24 +4021c3a1: 4129 s32i.n a2, a1, 16 +4021c3a3: 5139 s32i.n a3, a1, 20 +4021c3a5: 71c9 s32i.n a12, a1, 28 +4021c3a7: d47c movi.n a4, -3 +4021c3a9: e56ac1 l32r a12, 40215954 +4021c3ac: 0020c0 memw +4021c3af: d42c32 l32i a3, a12, 0x350 +4021c3b2: 103340 and a3, a3, a4 +4021c3b5: 0020c0 memw +4021c3b8: d46c32 s32i a3, a12, 0x350 +4021c3bb: 220c movi.n a2, 2 +4021c3bd: 0020c0 memw +4021c3c0: d42c02 l32i a0, a12, 0x350 +4021c3c3: 200020 or a0, a0, a2 +4021c3c6: 0020c0 memw +4021c3c9: 921c movi.n a2, 25 +4021c3cb: d46c02 s32i a0, a12, 0x350 +4021c3ce: a3b301 l32r a0, 4020529c +4021c3d1: 0000c0 callx0 a0 +4021c3d4: 750c movi.n a5, 7 +4021c3d6: 0020c0 memw +4021c3d9: d42c62 l32i a6, a12, 0x350 +4021c3dc: 756860 extui a6, a6, 24, 8 +4021c3df: 0b0567 bnone a5, a6, 4021c3ee +4021c3e2: 0020c0 memw +4021c3e5: d42c72 l32i a7, a12, 0x350 +4021c3e8: 257870 extui a7, a7, 24, 3 +4021c3eb: ff3756 bnez a7, 4021c3e2 +4021c3ee: 41c8 l32i.n a12, a1, 16 +4021c3f0: 012d mov.n a2, a1 +4021c3f2: fff445 call0 4021c338 +4021c3f5: 031102 l16ui a0, a1, 6 +4021c3f8: 021142 l16ui a4, a1, 4 +4021c3fb: 011132 l16ui a3, a1, 2 +4021c3fe: 071182 l16ui a8, a1, 14 +4021c401: 051152 l16ui a5, a1, 10 +4021c404: 041122 l16ui a2, a1, 8 +4021c407: 061172 l16ui a7, a1, 12 +4021c40a: 225a add.n a2, a2, a5 +4021c40c: 778a add.n a7, a7, a8 +4021c40e: 334a add.n a3, a3, a4 +4021c410: 003a add.n a0, a0, a3 +4021c412: 907770 addx2 a7, a7, a7 +4021c415: 902220 addx2 a2, a2, a2 +4021c418: f42020 extui a2, a2, 0, 16 +4021c41b: f46070 extui a6, a7, 0, 16 +4021c41e: 1180f0 slli a8, a0, 1 +4021c421: f48080 extui a8, a8, 0, 16 +4021c424: 053867 bltu a8, a6, 4021c42d +4021c427: d07070 subx2 a7, a0, a7 +4021c42a: 000046 j 4021c42f +4021c42d: 070c movi.n a7, 0 +4021c42f: 005c72 s16i a7, a12, 0 +4021c432: 5108 l32i.n a0, a1, 20 +4021c434: 71c8 l32i.n a12, a1, 28 +4021c436: 053267 bltu a2, a6, 4021c43f +4021c439: c02260 sub a2, a2, a6 +4021c43c: 000046 j 4021c441 +4021c43f: 020c movi.n a2, 0 +4021c441: 005022 s16i a2, a0, 0 +4021c444: 6108 l32i.n a0, a1, 24 +4021c446: 20c112 addi a1, a1, 32 +4021c449: f00d ret.n +4021c44b: 3cf100 excw +4021c44e: f30111 l32r a1, 40219054 +4021c451: 113c movi.n a1, 49 +4021c453: 3cf001 l32r a0, 401eb814 <_lit4_end+0xe54e8> +4021c456: ff0111 l32r a1, 4021c05c +4021c459: ff .byte 0xff +4021c45a: 03 .byte 0x3 + ... + +4021c45c : +4021c45c: f44030 extui a4, a3, 0, 16 +4021c45f: d0c112 addi a1, a1, -48 +4021c462: 41c9 s32i.n a12, a1, 16 +4021c464: 61e9 s32i.n a14, a1, 24 +4021c466: 71f9 s32i.n a15, a1, 28 +4021c468: b159 s32i.n a5, a1, 44 +4021c46a: 2169 s32i.n a6, a1, 8 +4021c46c: 130c movi.n a3, 1 +4021c46e: 51d9 s32i.n a13, a1, 20 +4021c470: e44fd1 l32r a13, 402155ac +4021c473: 3109 s32i.n a0, a1, 12 +4021c475: 0d08 l32i.n a0, a13, 0 +4021c477: 1129 s32i.n a2, a1, 4 +4021c479: 2b2002 l32i a0, a0, 172 +4021c47c: 020c movi.n a2, 0 +4021c47e: 0000c0 callx0 a0 +4021c481: b128 l32i.n a2, a1, 44 +4021c483: e534c1 l32r a12, 40215954 +4021c486: 114216 beqz a2, 4021c59e +4021c489: cf1c movi.n a15, 28 +4021c48b: 0e4c movi.n a14, 64 +4021c48d: 0d4c movi.n a13, 64 +4021c48f: 080c movi.n a8, 0 +4021c491: 090c movi.n a9, 0 +4021c493: 0a0c movi.n a10, 0 +4021c495: fcc2b2 addi a11, a2, -4 +4021c498: 81b9 s32i.n a11, a1, 32 +4021c49a: 01a9 s32i.n a10, a1, 0 +4021c49c: 9199 s32i.n a9, a1, 36 +4021c49e: a189 s32i.n a8, a1, 40 +4021c4a0: e44301 l32r a0, 402155ac +4021c4a3: 120c movi.n a2, 1 +4021c4a5: 0008 l32i.n a0, a0, 0 +4021c4a7: 230c movi.n a3, 2 +4021c4a9: 2b2002 l32i a0, a0, 172 +4021c4ac: f440e0 extui a4, a14, 0, 16 +4021c4af: 0000c0 callx0 a0 +4021c4b2: e43e01 l32r a0, 402155ac +4021c4b5: 020c movi.n a2, 0 +4021c4b7: 0008 l32i.n a0, a0, 0 +4021c4b9: 230c movi.n a3, 2 +4021c4bb: 2b2002 l32i a0, a0, 172 +4021c4be: f440d0 extui a4, a13, 0, 16 +4021c4c1: 0000c0 callx0 a0 +4021c4c4: 0020c0 memw +4021c4c7: ffe131 l32r a3, 4021c44c +4021c4ca: d36c32 s32i a3, a12, 0x34c +4021c4cd: 0020c0 memw +4021c4d0: ffe021 l32r a2, 4021c450 +4021c4d3: d36c22 s32i a2, a12, 0x34c +4021c4d6: 220c movi.n a2, 2 +4021c4d8: a37101 l32r a0, 4020529c +4021c4db: 0000c0 callx0 a0 +4021c4de: 7fa032 movi a3, 127 +4021c4e1: 0108 l32i.n a0, a1, 0 +4021c4e3: 0020c0 memw +4021c4e6: d32c42 l32i a4, a12, 0x34c +4021c4e9: 08f487 bbsi a4, 24, 4021c4f5 +4021c4ec: 0020c0 memw +4021c4ef: d32c52 l32i a5, a12, 0x34c +4021c4f2: f67587 bbci a5, 24, 4021c4ec +4021c4f5: 0020c0 memw +4021c4f8: d32c62 l32i a6, a12, 0x34c +4021c4fb: 170c movi.n a7, 1 +4021c4fd: 056f60 extui a6, a6, 31, 1 +4021c500: 306670 xor a6, a6, a7 +4021c503: 0020c0 memw +4021c506: 979ca1 l32r a10, 40202378 +4021c509: d32c82 l32i a8, a12, 0x34c +4021c50c: 090c movi.n a9, 0 +4021c50e: 1088a0 and a8, a8, a10 +4021c511: 839780 moveqz a9, a7, a8 +4021c514: 269c beqz.n a6, 4021c52a +4021c516: 038d mov.n a8, a3 +4021c518: dfda add.n a13, a15, a13 +4021c51a: 11dd00 slli a13, a13, 16 +4021c51d: 31d0d0 srai a13, a13, 16 +4021c520: 0123d7 blt a3, a13, 4021c525 +4021c523: 0d8d mov.n a8, a13 +4021c525: 08dd mov.n a13, a8 +4021c527: 000346 j 4021c538 +4021c52a: c02df0 sub a2, a13, a15 +4021c52d: 0d0c movi.n a13, 0 +4021c52f: 112200 slli a2, a2, 16 +4021c532: 312020 srai a2, a2, 16 +4021c535: b3d220 movgez a13, a2, a2 +4021c538: 8148 l32i.n a4, a1, 32 +4021c53a: 299c beqz.n a9, 4021c550 +4021c53c: 038d mov.n a8, a3 +4021c53e: efea add.n a14, a15, a14 +4021c540: 11ee00 slli a14, a14, 16 +4021c543: 31e0e0 srai a14, a14, 16 +4021c546: 0123e7 blt a3, a14, 4021c54b +4021c549: 0e8d mov.n a8, a14 +4021c54b: 08ed mov.n a14, a8 +4021c54d: 000346 j 4021c55e +4021c550: c02ef0 sub a2, a14, a15 +4021c553: 0e0c movi.n a14, 0 +4021c555: 112200 slli a2, a2, 16 +4021c558: 312020 srai a2, a2, 16 +4021c55b: b3e220 movgez a14, a2, a2 +4021c55e: fecf62 addi a6, a15, -2 +4021c561: 2151f0 srai a5, a15, 1 +4021c564: 551b addi.n a5, a5, 1 +4021c566: 1f0c movi.n a15, 1 +4021c568: 015580 slli a5, a5, 24 +4021c56b: 315850 srai a5, a5, 24 +4021c56e: 93f560 movnez a15, a5, a6 +4021c571: 172047 blt a0, a4, 4021c58c +4021c574: 9168 l32i.n a6, a1, 36 +4021c576: a188 l32i.n a8, a1, 40 +4021c578: 76ea add.n a7, a6, a14 +4021c57a: 98da add.n a9, a8, a13 +4021c57c: 119900 slli a9, a9, 16 +4021c57f: 117700 slli a7, a7, 16 +4021c582: 316070 srai a6, a7, 16 +4021c585: 318090 srai a8, a9, 16 +4021c588: a189 s32i.n a8, a1, 40 +4021c58a: 9169 s32i.n a6, a1, 36 +4021c58c: b188 l32i.n a8, a1, 44 +4021c58e: 001b addi.n a0, a0, 1 +4021c590: 740000 extui a0, a0, 0, 8 +4021c593: 0109 s32i.n a0, a1, 0 +4021c595: c08800 sub a8, a8, a0 +4021c598: f04856 bnez a8, 4021c4a0 +4021c59b: 0001c6 j 4021c5a6 +4021c59e: 020c movi.n a2, 0 +4021c5a0: 030c movi.n a3, 0 +4021c5a2: 9139 s32i.n a3, a1, 36 +4021c5a4: a129 s32i.n a2, a1, 40 +4021c5a6: 120c movi.n a2, 1 +4021c5a8: 230c movi.n a3, 2 +4021c5aa: 91f8 l32i.n a15, a1, 36 +4021c5ac: e400d1 l32r a13, 402155ac +4021c5af: ff2b addi.n a15, a15, 2 +4021c5b1: 0d08 l32i.n a0, a13, 0 +4021c5b3: f442f0 extui a4, a15, 2, 16 +4021c5b6: 2b2002 l32i a0, a0, 172 +4021c5b9: 21f2f0 srai a15, a15, 2 +4021c5bc: 0000c0 callx0 a0 +4021c5bf: 020c movi.n a2, 0 +4021c5c1: 230c movi.n a3, 2 +4021c5c3: a1e8 l32i.n a14, a1, 40 +4021c5c5: 0d08 l32i.n a0, a13, 0 +4021c5c7: ee2b addi.n a14, a14, 2 +4021c5c9: f442e0 extui a4, a14, 2, 16 +4021c5cc: 2b2002 l32i a0, a0, 172 +4021c5cf: 21e2e0 srai a14, a14, 2 +4021c5d2: 0000c0 callx0 a0 +4021c5d5: 120c movi.n a2, 1 +4021c5d7: 0d08 l32i.n a0, a13, 0 +4021c5d9: 130c movi.n a3, 1 +4021c5db: 2b2002 l32i a0, a0, 172 +4021c5de: 7fa042 movi a4, 127 +4021c5e1: 0000c0 callx0 a0 +4021c5e4: ff9c41 l32r a4, 4021c454 +4021c5e7: 0020c0 memw +4021c5ea: 1128 l32i.n a2, a1, 4 +4021c5ec: 2138 l32i.n a3, a1, 8 +4021c5ee: d36c42 s32i a4, a12, 0x34c +4021c5f1: 0043e2 s8i a14, a3, 0 +4021c5f4: 0143f2 s8i a15, a3, 1 +4021c5f7: f29c beqz.n a2, 4021c61a +4021c5f9: ff9791 l32r a9, 4021c458 +4021c5fc: 017ee0 slli a7, a14, 18 +4021c5ff: 018f70 slli a8, a15, 25 +4021c602: e70b61 l32r a6, 40216230 +4021c605: 0020c0 memw +4021c608: 992652 l32i a5, a6, 0x264 +4021c60b: 105590 and a5, a5, a9 +4021c60e: 205580 or a5, a5, a8 +4021c611: 205570 or a5, a5, a7 +4021c614: 0020c0 memw +4021c617: 996652 s32i a5, a6, 0x264 +4021c61a: 41c8 l32i.n a12, a1, 16 +4021c61c: 51d8 l32i.n a13, a1, 20 +4021c61e: 61e8 l32i.n a14, a1, 24 +4021c620: 71f8 l32i.n a15, a1, 28 +4021c622: 3108 l32i.n a0, a1, 12 +4021c624: 30c112 addi a1, a1, 48 +4021c627: f00d ret.n +4021c629: 000000 ill + +4021c62c : +4021c62c: 040c movi.n a4, 0 +4021c62e: 528b addi.n a5, a2, 8 +4021c630: 7fa022 movi a2, 127 +4021c633: e05530 subx4 a5, a5, a3 +4021c636: 115500 slli a5, a5, 16 +4021c639: 315050 srai a5, a5, 16 +4021c63c: b34550 movgez a4, a5, a5 +4021c63f: 114400 slli a4, a4, 16 +4021c642: 313040 srai a3, a4, 16 +4021c645: 01e3e6 bgei a3, 128, 4021c64a +4021c648: 032d mov.n a2, a3 +4021c64a: 012280 slli a2, a2, 24 +4021c64d: 312820 srai a2, a2, 24 +4021c650: f00d ret.n +4021c652: c00000 sub a0, a0, a0 +4021c655: 3ffe84 excw +4021c658: 22fc60 excw +4021c65b: fc8040 excw +4021c65e: 22 .byte 0x22 +4021c65f: 40 .byte 0x40 + +4021c660 : +4021c660: 070c movi.n a7, 0 +4021c662: c0c112 addi a1, a1, -64 +4021c665: 71e9 s32i.n a14, a1, 28 +4021c667: 81f9 s32i.n a15, a1, 32 +4021c669: 61d9 s32i.n a13, a1, 24 +4021c66b: 4109 s32i.n a0, a1, 16 +4021c66d: 51c9 s32i.n a12, a1, 20 +4021c66f: 9169 s32i.n a6, a1, 36 +4021c671: d149 s32i.n a4, a1, 52 +4021c673: f159 s32i.n a5, a1, 60 +4021c675: 940c movi.n a4, 9 +4021c677: 750c movi.n a5, 7 +4021c679: 060c movi.n a6, 0 +4021c67b: 03cd mov.n a12, a3 +4021c67d: e3cb01 l32r a0, 402155ac +4021c680: 02dd mov.n a13, a2 +4021c682: 0008 l32i.n a0, a0, 0 +4021c684: 77a022 movi a2, 119 +4021c687: 272002 l32i a0, a0, 156 +4021c68a: 030c movi.n a3, 0 +4021c68c: 0000c0 callx0 a0 +4021c68f: 0c4d mov.n a4, a12 +4021c691: 0d3d mov.n a3, a13 +4021c693: 050c movi.n a5, 0 +4021c695: 060c movi.n a6, 0 +4021c697: e3c501 l32r a0, 402155ac +4021c69a: 020c movi.n a2, 0 +4021c69c: 0129 s32i.n a2, a1, 0 +4021c69e: 1129 s32i.n a2, a1, 4 +4021c6a0: 2129 s32i.n a2, a1, 8 +4021c6a2: 0008 l32i.n a0, a0, 0 +4021c6a4: 070c movi.n a7, 0 +4021c6a6: 1a2002 l32i a0, a0, 104 +4021c6a9: 120c movi.n a2, 1 +4021c6ab: 0000c0 callx0 a0 +4021c6ae: 0c0c movi.n a12, 0 +4021c6b0: 350c movi.n a5, 3 +4021c6b2: b159 s32i.n a5, a1, 44 +4021c6b4: a149 s32i.n a4, a1, 40 +4021c6b6: 0d0c movi.n a13, 0 +4021c6b8: 0f0c movi.n a15, 0 +4021c6ba: 91a8 l32i.n a10, a1, 36 +4021c6bc: 090c movi.n a9, 0 +4021c6be: 093cf6 bgeui a12, 3, 4021c6cb +4021c6c1: ffe481 l32r a8, 4021c654 +4021c6c4: 8c8a add.n a8, a12, a8 +4021c6c6: 000882 l8ui a8, a8, 0 +4021c6c9: a189 s32i.n a8, a1, 40 +4021c6cb: a1b8 l32i.n a11, a1, 40 +4021c6cd: aaca add.n a10, a10, a12 +4021c6cf: c1a9 s32i.n a10, a1, 48 +4021c6d1: 004a92 s8i a9, a10, 0 +4021c6d4: bb1b addi.n a11, a11, 1 +4021c6d6: e1b9 s32i.n a11, a1, 56 +4021c6d8: acbc beqz.n a12, 4021c716 +4021c6da: 1d1c26 beqi a12, 1, 4021c6fb +4021c6dd: 532c66 bnei a12, 2, 4021c734 +4021c6e0: 6ba022 movi a2, 107 +4021c6e3: 230c movi.n a3, 2 +4021c6e5: 240c movi.n a4, 2 +4021c6e7: e3b101 l32r a0, 402155ac +4021c6ea: 650c movi.n a5, 6 +4021c6ec: 0008 l32i.n a0, a0, 0 +4021c6ee: 460c movi.n a6, 4 +4021c6f0: 272002 l32i a0, a0, 156 +4021c6f3: 0d7d mov.n a7, a13 +4021c6f5: 0000c0 callx0 a0 +4021c6f8: 000e06 j 4021c734 +4021c6fb: 6ba022 movi a2, 107 +4021c6fe: 230c movi.n a3, 2 +4021c700: 240c movi.n a4, 2 +4021c702: e3aa01 l32r a0, 402155ac +4021c705: 350c movi.n a5, 3 +4021c707: 0008 l32i.n a0, a0, 0 +4021c709: 060c movi.n a6, 0 +4021c70b: 272002 l32i a0, a0, 156 +4021c70e: 0d7d mov.n a7, a13 +4021c710: 0000c0 callx0 a0 +4021c713: 000746 j 4021c734 +4021c716: 6ba022 movi a2, 107 +4021c719: 230c movi.n a3, 2 +4021c71b: 140c movi.n a4, 1 +4021c71d: 350c movi.n a5, 3 +4021c71f: 060c movi.n a6, 0 +4021c721: e3a201 l32r a0, 402155ac +4021c724: 170c movi.n a7, 1 +4021c726: 0008 l32i.n a0, a0, 0 +4021c728: 907d70 addx2 a7, a13, a7 +4021c72b: 272002 l32i a0, a0, 156 +4021c72e: 747070 extui a7, a7, 0, 8 +4021c731: 0000c0 callx0 a0 +4021c734: e39e01 l32r a0, 402155ac +4021c737: 0008 l32i.n a0, a0, 0 +4021c739: d128 l32i.n a2, a1, 52 +4021c73b: 1c2002 l32i a0, a0, 112 +4021c73e: a30c movi.n a3, 10 +4021c740: 0000c0 callx0 a0 +4021c743: 02ed mov.n a14, a2 +4021c745: f128 l32i.n a2, a1, 60 +4021c747: b28c beqz.n a2, 4021c756 +4021c749: ffc321 l32r a2, 4021c658 +4021c74c: 0d3d mov.n a3, a13 +4021c74e: 0e4d mov.n a4, a14 +4021c750: 963f01 l32r a0, 4020204c +4021c753: 0000c0 callx0 a0 +4021c756: 0eafe7 bge a15, a14, 4021c768 +4021c759: 0efd mov.n a15, a14 +4021c75b: c148 l32i.n a4, a1, 48 +4021c75d: 130c movi.n a3, 1 +4021c75f: 903d30 addx2 a3, a13, a3 +4021c762: 933dc0 movnez a3, a13, a12 +4021c765: 004432 s8i a3, a4, 0 +4021c768: e148 l32i.n a4, a1, 56 +4021c76a: dd1b addi.n a13, a13, 1 +4021c76c: 74d0d0 extui a13, a13, 0, 8 +4021c76f: c044d0 sub a4, a4, a13 +4021c772: f62456 bnez a4, 4021c6d8 +4021c775: f1e8 l32i.n a14, a1, 60 +4021c777: ee8c beqz.n a14, 4021c789 +4021c779: ffb821 l32r a2, 4021c65c +4021c77c: c148 l32i.n a4, a1, 48 +4021c77e: 0c3d mov.n a3, a12 +4021c780: 000442 l8ui a4, a4, 0 +4021c783: 963201 l32r a0, 4020204c +4021c786: 0000c0 callx0 a0 +4021c789: 2cac beqz.n a12, 4021c7af +4021c78b: 651c26 beqi a12, 1, 4021c7f4 +4021c78e: 382c66 bnei a12, 2, 4021c7ca +4021c791: 6ba022 movi a2, 107 +4021c794: 230c movi.n a3, 2 +4021c796: 240c movi.n a4, 2 +4021c798: 650c movi.n a5, 6 +4021c79a: e38401 l32r a0, 402155ac +4021c79d: 460c movi.n a6, 4 +4021c79f: 0008 l32i.n a0, a0, 0 +4021c7a1: c178 l32i.n a7, a1, 48 +4021c7a3: 272002 l32i a0, a0, 156 +4021c7a6: 000772 l8ui a7, a7, 0 +4021c7a9: 0000c0 callx0 a0 +4021c7ac: 000686 j 4021c7ca +4021c7af: 6ba022 movi a2, 107 +4021c7b2: 230c movi.n a3, 2 +4021c7b4: 140c movi.n a4, 1 +4021c7b6: 350c movi.n a5, 3 +4021c7b8: e37d01 l32r a0, 402155ac +4021c7bb: 060c movi.n a6, 0 +4021c7bd: 0008 l32i.n a0, a0, 0 +4021c7bf: c178 l32i.n a7, a1, 48 +4021c7c1: 272002 l32i a0, a0, 156 +4021c7c4: 000772 l8ui a7, a7, 0 +4021c7c7: 0000c0 callx0 a0 +4021c7ca: b128 l32i.n a2, a1, 44 +4021c7cc: cc1b addi.n a12, a12, 1 +4021c7ce: 74c0c0 extui a12, a12, 0, 8 +4021c7d1: 220b addi.n a2, a2, -1 +4021c7d3: b129 s32i.n a2, a1, 44 +4021c7d5: edd256 bnez a2, 4021c6b6 +4021c7d8: e37501 l32r a0, 402155ac +4021c7db: 0008 l32i.n a0, a0, 0 +4021c7dd: 1b2002 l32i a0, a0, 108 +4021c7e0: 120c movi.n a2, 1 +4021c7e2: 0000c0 callx0 a0 +4021c7e5: 51c8 l32i.n a12, a1, 20 +4021c7e7: 61d8 l32i.n a13, a1, 24 +4021c7e9: 71e8 l32i.n a14, a1, 28 +4021c7eb: 81f8 l32i.n a15, a1, 32 +4021c7ed: 4108 l32i.n a0, a1, 16 +4021c7ef: 40c112 addi a1, a1, 64 +4021c7f2: f00d ret.n +4021c7f4: 6ba022 movi a2, 107 +4021c7f7: 230c movi.n a3, 2 +4021c7f9: 240c movi.n a4, 2 +4021c7fb: 350c movi.n a5, 3 +4021c7fd: e36b01 l32r a0, 402155ac +4021c800: 060c movi.n a6, 0 +4021c802: 0008 l32i.n a0, a0, 0 +4021c804: c178 l32i.n a7, a1, 48 +4021c806: 272002 l32i a0, a0, 156 +4021c809: 000772 l8ui a7, a7, 0 +4021c80c: 0000c0 callx0 a0 +4021c80f: ffedc6 j 4021c7ca +4021c812: a00000 addx4 a0, a0, a0 +4021c815: 22fc bnez.n a2, 4021c84b +4021c817: 40 .byte 0x40 + +4021c818 : +4021c818: a0c112 addi a1, a1, -96 +4021c81b: 81c9 s32i.n a12, a1, 32 +4021c81d: 91d9 s32i.n a13, a1, 36 +4021c81f: a1e9 s32i.n a14, a1, 40 +4021c821: b1f9 s32i.n a15, a1, 44 +4021c823: 166142 s32i a4, a1, 88 +4021c826: 6179 s32i.n a7, a1, 24 +4021c828: c159 s32i.n a5, a1, 48 +4021c82a: d139 s32i.n a3, a1, 52 +4021c82c: 116162 s32i a6, a1, 68 +4021c82f: 7109 s32i.n a0, a1, 28 +4021c831: 060c movi.n a6, 0 +4021c833: e4e601 l32r a0, 40215bcc +4021c836: 340b addi.n a3, a4, -1 +4021c838: 4139 s32i.n a3, a1, 16 +4021c83a: 745030 extui a5, a3, 0, 8 +4021c83d: 3d0082 l8ui a8, a0, 61 +4021c840: 013380 slli a3, a3, 24 +4021c843: 313830 srai a3, a3, 24 +4021c846: 835680 moveqz a5, a6, a8 +4021c849: e159 s32i.n a5, a1, 56 +4021c84b: 126132 s32i a3, a1, 72 +4021c84e: 02a357 bge a3, a5, 4021c854 +4021c851: 005ec6 j 4021c9d0 +4021c854: 106122 s32i a2, a1, 64 +4021c857: 0e0c movi.n a14, 0 +4021c859: 64a0a2 movi a10, 100 +4021c85c: 166142 s32i a4, a1, 88 +4021c85f: 6179 s32i.n a7, a1, 24 +4021c861: 3011b2 l16ui a11, a1, 96 +4021c864: 6401c2 l8ui a12, a1, 100 +4021c867: f1c9 s32i.n a12, a1, 60 +4021c869: 1561b2 s32i a11, a1, 84 +4021c86c: d108 l32i.n a0, a1, 52 +4021c86e: 122142 l32i a4, a1, 72 +4021c871: 4158 l32i.n a5, a1, 16 +4021c873: 040a add.n a0, a4, a0 +4021c875: 000062 l8ui a6, a0, 0 +4021c878: 136162 s32i a6, a1, 76 +4021c87b: 0da457 bge a4, a5, 4021c88c +4021c87e: 0100f2 l8ui a15, a0, 1 +4021c881: c0ff60 sub a15, a15, a6 +4021c884: eefa add.n a14, a14, a15 +4021c886: 11ee00 slli a14, a14, 16 +4021c889: 31e0e0 srai a14, a14, 16 +4021c88c: 0f0c movi.n a15, 0 +4021c88e: 200c movi.n a0, 2 +4021c890: 1121b2 l32i a11, a1, 68 +4021c893: e346c1 l32r a12, 402155ac +4021c896: bbea add.n a11, a11, a14 +4021c898: 11bb00 slli a11, a11, 16 +4021c89b: 31b0b0 srai a11, a11, 16 +4021c89e: 07aab7 bge a10, a11, 4021c8a9 +4021c8a1: 64a0d2 movi a13, 100 +4021c8a4: 5109 s32i.n a0, a1, 20 +4021c8a6: 000246 j 4021c8b3 +4021c8a9: e340c1 l32r a12, 402155ac +4021c8ac: 5109 s32i.n a0, a1, 20 +4021c8ae: 0d0c movi.n a13, 0 +4021c8b0: b3dbb0 movgez a13, a11, a11 +4021c8b3: 120c movi.n a2, 1 +4021c8b5: 102132 l32i a3, a1, 64 +4021c8b8: 7440d0 extui a4, a13, 0, 8 +4021c8bb: 050c movi.n a5, 0 +4021c8bd: 060c movi.n a6, 0 +4021c8bf: 0169 s32i.n a6, a1, 0 +4021c8c1: 1169 s32i.n a6, a1, 4 +4021c8c3: 2169 s32i.n a6, a1, 8 +4021c8c5: 0c08 l32i.n a0, a12, 0 +4021c8c7: 070c movi.n a7, 0 +4021c8c9: 1a2002 l32i a0, a0, 104 +4021c8cc: 060c movi.n a6, 0 +4021c8ce: 0000c0 callx0 a0 +4021c8d1: 220c movi.n a2, 2 +4021c8d3: a27201 l32r a0, 4020529c +4021c8d6: 0000c0 callx0 a0 +4021c8d9: 0c08 l32i.n a0, a12, 0 +4021c8db: b008 l32i.n a0, a0, 44 +4021c8dd: 152122 l32i a2, a1, 84 +4021c8e0: 0000c0 callx0 a0 +4021c8e3: 0c08 l32i.n a0, a12, 0 +4021c8e5: 146122 s32i a2, a1, 80 +4021c8e8: b008 l32i.n a0, a0, 44 +4021c8ea: 152122 l32i a2, a1, 84 +4021c8ed: 0000c0 callx0 a0 +4021c8f0: 64a0a2 movi a10, 100 +4021c8f3: 861c movi.n a6, 24 +4021c8f5: 1321b2 l32i a11, a1, 76 +4021c8f8: 142152 l32i a5, a1, 80 +4021c8fb: 040c movi.n a4, 0 +4021c8fd: 552a add.n a5, a5, a2 +4021c8ff: 115500 slli a5, a5, 16 +4021c902: 826c movi.n a2, -24 +4021c904: 020d mov.n a0, a2 +4021c906: 315050 srai a5, a5, 16 +4021c909: 554b addi.n a5, a5, 4 +4021c90b: 215350 srai a5, a5, 3 +4021c90e: 115500 slli a5, a5, 16 +4021c911: 315050 srai a5, a5, 16 +4021c914: b34550 movgez a4, a5, a5 +4021c917: 114400 slli a4, a4, 16 +4021c91a: 314040 srai a4, a4, 16 +4021c91d: c0b4b0 sub a11, a4, a11 +4021c920: 11bb00 slli a11, a11, 16 +4021c923: 31b0b0 srai a11, a11, 16 +4021c926: 012b27 blt a11, a2, 4021c92b +4021c929: 0b0d mov.n a0, a11 +4021c92b: 06bd mov.n a11, a6 +4021c92d: f178 l32i.n a7, a1, 60 +4021c92f: 012607 blt a6, a0, 4021c934 +4021c932: 00bd mov.n a11, a0 +4021c934: 11cb00 slli a12, a11, 16 +4021c937: 31c0c0 srai a12, a12, 16 +4021c93a: 579c beqz.n a7, 4021c953 +4021c93c: 01d9 s32i.n a13, a1, 0 +4021c93e: ffb521 l32r a2, 4021c814 +4021c941: 0f3d mov.n a3, a15 +4021c943: 132152 l32i a5, a1, 76 +4021c946: 0c6d mov.n a6, a12 +4021c948: 0e7d mov.n a7, a14 +4021c94a: 95c001 l32r a0, 4020204c +4021c94d: 0000c0 callx0 a0 +4021c950: 64a0a2 movi a10, 100 +4021c953: 1ccc bnez.n a12, 4021c958 +4021c955: 421fe6 bgei a15, 1, 4021c99b +4021c958: 060c66 bnei a12, -1, 4021c962 +4021c95b: 5108 l32i.n a0, a1, 20 +4021c95d: 3a1026 beqi a0, 1, 4021c99b +4021c960: 70bc beqz.n a0, 4021c99b +4021c962: 1dcc bnez.n a13, 4021c967 +4021c964: 033c96 bltz a12, 4021c99b +4021c967: 029da7 bne a13, a10, 4021c96d +4021c96a: 2d1ce6 bgei a12, 1, 4021c99b +4021c96d: 0c0d mov.n a0, a12 +4021c96f: ff1b addi.n a15, a15, 1 +4021c971: 01ff80 slli a15, a15, 24 +4021c974: 31f8f0 srai a15, a15, 24 +4021c977: f6cf42 addi a4, a15, -10 +4021c97a: 123ce6 bgei a12, 3, 4021c990 +4021c97d: e37c movi.n a3, -2 +4021c97f: 0d2c37 blt a12, a3, 4021c990 +4021c982: 9cea add.n a9, a12, a14 +4021c984: 11e900 slli a14, a9, 16 +4021c987: 31e0e0 srai a14, a14, 16 +4021c98a: f02456 bnez a4, 4021c890 +4021c98d: 000286 j 4021c99b +4021c990: 2192c0 srai a9, a12, 2 +4021c993: c09c90 sub a9, a12, a9 +4021c996: 9e9a add.n a9, a14, a9 +4021c998: fffa06 j 4021c984 +4021c99b: 1221f2 l32i a15, a1, 72 +4021c99e: 6128 l32i.n a2, a1, 24 +4021c9a0: c1c8 l32i.n a12, a1, 48 +4021c9a2: 122102 l32i a0, a1, 72 +4021c9a5: c0cdc0 sub a12, a13, a12 +4021c9a8: 002a add.n a0, a0, a2 +4021c9aa: 01bc80 slli a11, a12, 24 +4021c9ad: 31b8b0 srai a11, a11, 24 +4021c9b0: 0040c2 s8i a12, a0, 0 +4021c9b3: 2f0b addi.n a2, a15, -1 +4021c9b5: 8c6c movi.n a12, -24 +4021c9b7: 012280 slli a2, a2, 24 +4021c9ba: 31f820 srai a15, a2, 24 +4021c9bd: 04abc7 bge a11, a12, 4021c9c5 +4021c9c0: 8d6c movi.n a13, -24 +4021c9c2: 0040d2 s8i a13, a0, 0 +4021c9c5: e108 l32i.n a0, a1, 56 +4021c9c7: 1261f2 s32i a15, a1, 72 +4021c9ca: 022f07 blt a15, a0, 4021c9d0 +4021c9cd: ffa6c6 j 4021c86c +4021c9d0: e47f01 l32r a0, 40215bcc +4021c9d3: 233c movi.n a3, 50 +4021c9d5: 6178 l32i.n a7, a1, 24 +4021c9d7: 162142 l32i a4, a1, 88 +4021c9da: 000762 l8ui a6, a7, 0 +4021c9dd: 547a add.n a5, a4, a7 +4021c9df: 016680 slli a6, a6, 24 +4021c9e2: 80c552 addi a5, a5, -128 +4021c9e5: 7f0522 l8ui a2, a5, 127 +4021c9e8: 316860 srai a6, a6, 24 +4021c9eb: 012280 slli a2, a2, 24 +4021c9ee: 312820 srai a2, a2, 24 +4021c9f1: c06260 sub a6, a2, a6 +4021c9f4: 05a367 bge a3, a6, 4021c9fd +4021c9f7: cec262 addi a6, a2, -50 +4021c9fa: 004762 s8i a6, a7, 0 +4021c9fd: 3d0082 l8ui a8, a0, 61 +4021ca00: a8ac beqz.n a8, 4021ca2e +4021ca02: 2824a6 blti a4, 2, 4021ca2e +4021ca05: 4128 l32i.n a2, a1, 16 +4021ca07: e47361 l32r a6, 40215bd4 +4021ca0a: 000c movi.n a0, 0 +4021ca0c: 446a add.n a4, a4, a6 +4021ca0e: 310482 l8ui a8, a4, 49 +4021ca11: 906a add.n a9, a0, a6 +4021ca13: 320992 l8ui a9, a9, 50 +4021ca16: 7f0532 l8ui a3, a5, 127 +4021ca19: c08890 sub a8, a8, a9 +4021ca1c: 338a add.n a3, a3, a8 +4021ca1e: 807a add.n a8, a0, a7 +4021ca20: 004832 s8i a3, a8, 0 +4021ca23: 001b addi.n a0, a0, 1 +4021ca25: 010080 slli a0, a0, 24 +4021ca28: 310800 srai a0, a0, 24 +4021ca2b: df9207 bne a2, a0, 4021ca0e +4021ca2e: e2df01 l32r a0, 402155ac +4021ca31: 0008 l32i.n a0, a0, 0 +4021ca33: 1b2002 l32i a0, a0, 108 +4021ca36: 120c movi.n a2, 1 +4021ca38: 0000c0 callx0 a0 +4021ca3b: 81c8 l32i.n a12, a1, 32 +4021ca3d: 91d8 l32i.n a13, a1, 36 +4021ca3f: a1e8 l32i.n a14, a1, 40 +4021ca41: b1f8 l32i.n a15, a1, 44 +4021ca43: 7108 l32i.n a0, a1, 28 +4021ca45: 60c112 addi a1, a1, 96 +4021ca48: f00d ret.n +4021ca4a: e00000 subx4 a0, a0, a0 +4021ca4d: 22fc bnez.n a2, 4021ca83 +4021ca4f: ce6040 excw +4021ca52: 00 .byte 00 +4021ca53: 40 .byte 0x40 + +4021ca54 : +4021ca54: a0c112 addi a1, a1, -96 +4021ca57: 91c9 s32i.n a12, a1, 36 +4021ca59: a1d9 s32i.n a13, a1, 40 +4021ca5b: b1e9 s32i.n a14, a1, 44 +4021ca5d: 8109 s32i.n a0, a1, 32 +4021ca5f: 146152 s32i a5, a1, 80 +4021ca62: d169 s32i.n a6, a1, 52 +4021ca64: c1f9 s32i.n a15, a1, 48 +4021ca66: fec2f2 addi a15, a2, -2 +4021ca69: e30461 l32r a6, 4021567c +4021ca6c: 0020c0 memw +4021ca6f: e026d2 l32i a13, a6, 0x380 +4021ca72: 400f00 ssr a15 +4021ca75: b1d0d0 sra a13, a13 +4021ca78: 0020c0 memw +4021ca7b: e326e2 l32i a14, a6, 0x38c +4021ca7e: 400f00 ssr a15 +4021ca81: b1e0e0 sra a14, a14 +4021ca84: c0bde0 sub a11, a13, a14 +4021ca87: 0020c0 memw +4021ca8a: e22682 l32i a8, a6, 0x388 +4021ca8d: 400f00 ssr a15 +4021ca90: b18080 sra a8, a8 +4021ca93: 0020c0 memw +4021ca96: 1179 s32i.n a7, a1, 4 +4021ca98: d198 l32i.n a9, a1, 52 +4021ca9a: 400f00 ssr a15 +4021ca9d: e12602 l32i a0, a6, 0x384 +4021caa0: ddea add.n a13, a13, a14 +4021caa2: 0d2d mov.n a2, a13 +4021caa4: b10000 sra a0, a0 +4021caa7: 309590 xor a9, a5, a9 +4021caaa: a80a add.n a10, a8, a0 +4021caac: c00080 sub a0, a0, a8 +4021caaf: 00cd mov.n a12, a0 +4021cab1: 308340 xor a8, a3, a4 +4021cab4: 071897 beq a8, a9, 4021cabf +4021cab7: 0acd mov.n a12, a10 +4021cab9: 0b2d mov.n a2, a11 +4021cabb: 00ad mov.n a10, a0 +4021cabd: 0dbd mov.n a11, a13 +4021cabf: f129 s32i.n a2, a1, 60 +4021cac1: 31dfc0 srai a13, a12, 31 +4021cac4: 024d mov.n a4, a2 +4021cac6: 1361b2 s32i a11, a1, 76 +4021cac9: 1261a2 s32i a10, a1, 72 +4021cacc: 01f9 s32i.n a15, a1, 0 +4021cace: 315f20 srai a5, a2, 31 +4021cad1: e159 s32i.n a5, a1, 56 +4021cad3: 053d mov.n a3, a5 +4021cad5: d11e01 l32r a0, 40210f50 +4021cad8: 0000c0 callx0 a0 +4021cadb: 0d5d mov.n a5, a13 +4021cadd: 0c4d mov.n a4, a12 +4021cadf: 03ed mov.n a14, a3 +4021cae1: 3129 s32i.n a2, a1, 12 +4021cae3: 0d3d mov.n a3, a13 +4021cae5: 0c2d mov.n a2, a12 +4021cae7: d11a01 l32r a0, 40210f50 +4021caea: 0000c0 callx0 a0 +4021caed: 132102 l32i a0, a1, 76 +4021caf0: 1221a2 l32i a10, a1, 72 +4021caf3: 040c movi.n a4, 0 +4021caf5: fe3a add.n a15, a14, a3 +4021caf7: 1b0c movi.n a11, 1 +4021caf9: 3138 l32i.n a3, a1, 12 +4021cafb: 050c movi.n a5, 0 +4021cafd: e32a add.n a14, a3, a2 +4021caff: 835be0 moveqz a5, a11, a14 +4021cb02: 01be37 bgeu a14, a3, 4021cb07 +4021cb05: ff1b addi.n a15, a15, 1 +4021cb07: 834bf0 moveqz a4, a11, a15 +4021cb0a: 030457 bnone a4, a5, 4021cb11 +4021cb0d: 0bed mov.n a14, a11 +4021cb0f: 0f0c movi.n a15, 0 +4021cb11: 1161a2 s32i a10, a1, 68 +4021cb14: e138 l32i.n a3, a1, 56 +4021cb16: f128 l32i.n a2, a1, 60 +4021cb18: 004d mov.n a4, a0 +4021cb1a: 5109 s32i.n a0, a1, 20 +4021cb1c: 316fa0 srai a6, a10, 31 +4021cb1f: 315f00 srai a5, a0, 31 +4021cb22: 4159 s32i.n a5, a1, 16 +4021cb24: 106162 s32i a6, a1, 64 +4021cb27: d10a01 l32r a0, 40210f50 +4021cb2a: 0000c0 callx0 a0 +4021cb2d: 102152 l32i a5, a1, 64 +4021cb30: 112142 l32i a4, a1, 68 +4021cb33: 6139 s32i.n a3, a1, 24 +4021cb35: 7129 s32i.n a2, a1, 28 +4021cb37: 0d3d mov.n a3, a13 +4021cb39: 0c2d mov.n a2, a12 +4021cb3b: d10501 l32r a0, 40210f50 +4021cb3e: 0000c0 callx0 a0 +4021cb41: 6108 l32i.n a0, a1, 24 +4021cb43: 7198 l32i.n a9, a1, 28 +4021cb45: c00030 sub a0, a0, a3 +4021cb48: c0a920 sub a10, a9, a2 +4021cb4b: 01b9a7 bgeu a9, a10, 4021cb50 +4021cb4e: 000b addi.n a0, a0, -1 +4021cb50: 112a70 slli a2, a10, 9 +4021cb53: 0f5d mov.n a5, a15 +4021cb55: 0e4d mov.n a4, a14 +4021cb57: 404710 ssai 23 +4021cb5a: 8130a0 src a3, a0, a10 +4021cb5d: ffbc01 l32r a0, 4021ca50 +4021cb60: 0000c0 callx0 a0 +4021cb63: 1138 l32i.n a3, a1, 4 +4021cb65: 014280 slli a4, a2, 24 +4021cb68: d158 l32i.n a5, a1, 52 +4021cb6a: 314840 srai a4, a4, 24 +4021cb6d: 441b addi.n a4, a4, 1 +4021cb6f: 214140 srai a4, a4, 1 +4021cb72: 602040 neg a2, a4 +4021cb75: 832450 moveqz a2, a4, a5 +4021cb78: 4158 l32i.n a5, a1, 16 +4021cb7a: 5148 l32i.n a4, a1, 20 +4021cb7c: 004322 s8i a2, a3, 0 +4021cb7f: 2129 s32i.n a2, a1, 8 +4021cb81: 0d3d mov.n a3, a13 +4021cb83: 0c2d mov.n a2, a12 +4021cb85: d0f201 l32r a0, 40210f50 +4021cb88: 0000c0 callx0 a0 +4021cb8b: 102152 l32i a5, a1, 64 +4021cb8e: 112142 l32i a4, a1, 68 +4021cb91: 03dd mov.n a13, a3 +4021cb93: 02cd mov.n a12, a2 +4021cb95: e138 l32i.n a3, a1, 56 +4021cb97: f128 l32i.n a2, a1, 60 +4021cb99: d0ed01 l32r a0, 40210f50 +4021cb9c: 0000c0 callx0 a0 +4021cb9f: 0d3a add.n a0, a13, a3 +4021cba1: 2c2a add.n a2, a12, a2 +4021cba3: 1421d2 l32i a13, a1, 80 +4021cba6: 01b2c7 bgeu a2, a12, 4021cbab +4021cba9: 001b addi.n a0, a0, 1 +4021cbab: 0e4d mov.n a4, a14 +4021cbad: 0f5d mov.n a5, a15 +4021cbaf: 404710 ssai 23 +4021cbb2: 11c8 l32i.n a12, a1, 4 +4021cbb4: 813020 src a3, a0, a2 +4021cbb7: 112270 slli a2, a2, 9 +4021cbba: ffa501 l32r a0, 4021ca50 +4021cbbd: 0000c0 callx0 a0 +4021cbc0: 600152 l8ui a5, a1, 96 +4021cbc3: 016280 slli a6, a2, 24 +4021cbc6: 316860 srai a6, a6, 24 +4021cbc9: 661b addi.n a6, a6, 1 +4021cbcb: 216160 srai a6, a6, 1 +4021cbce: 600060 neg a0, a6 +4021cbd1: 8306d0 moveqz a0, a6, a13 +4021cbd4: 014c02 s8i a0, a12, 1 +4021cbd7: 65ac beqz.n a5, 4021cc01 +4021cbd9: ff9c21 l32r a2, 4021ca4c +4021cbdc: 0020c0 memw +4021cbdf: e2a731 l32r a3, 4021567c +4021cbe2: 0148 l32i.n a4, a1, 0 +4021cbe4: 015080 slli a5, a0, 24 +4021cbe7: 315850 srai a5, a5, 24 +4021cbea: 400400 ssr a4 +4021cbed: f92332 l32i a3, a3, 0x3e4 +4021cbf0: 2148 l32i.n a4, a1, 8 +4021cbf2: b13030 sra a3, a3 +4021cbf5: 014480 slli a4, a4, 24 +4021cbf8: 314840 srai a4, a4, 24 +4021cbfb: 951401 l32r a0, 4020204c +4021cbfe: 0000c0 callx0 a0 +4021cc01: 91c8 l32i.n a12, a1, 36 +4021cc03: a1d8 l32i.n a13, a1, 40 +4021cc05: b1e8 l32i.n a14, a1, 44 +4021cc07: c1f8 l32i.n a15, a1, 48 +4021cc09: 8108 l32i.n a0, a1, 32 +4021cc0b: 60c112 addi a1, a1, 96 +4021cc0e: f00d ret.n + +4021cc10 : +4021cc10: 039d mov.n a9, a3 +4021cc12: b0c112 addi a1, a1, -80 +4021cc15: 7179 s32i.n a7, a1, 28 +4021cc17: 5149 s32i.n a4, a1, 20 +4021cc19: 116152 s32i a5, a1, 68 +4021cc1c: 8109 s32i.n a0, a1, 32 +4021cc1e: 126162 s32i a6, a1, 72 +4021cc21: 106122 s32i a2, a1, 64 +4021cc24: c1f9 s32i.n a15, a1, 48 +4021cc26: a1d9 s32i.n a13, a1, 40 +4021cc28: b1e9 s32i.n a14, a1, 44 +4021cc2a: 91c9 s32i.n a12, a1, 36 +4021cc2c: 0e0c movi.n a14, 0 +4021cc2e: 0c0c movi.n a12, 0 +4021cc30: e25fd1 l32r a13, 402155ac +4021cc33: 5401f2 l8ui a15, a1, 84 +4021cc36: 6199 s32i.n a9, a1, 24 +4021cc38: 220c movi.n a2, 2 +4021cc3a: 056d mov.n a6, a5 +4021cc3c: 104162 s8i a6, a1, 16 +4021cc3f: 136122 s32i a2, a1, 76 +4021cc42: 102102 l32i a0, a1, 64 +4021cc45: 120c movi.n a2, 1 +4021cc47: 122152 l32i a5, a1, 72 +4021cc4a: 114152 s8i a5, a1, 17 +4021cc4d: 401000 ssl a0 +4021cc50: a12200 sll a2, a2 +4021cc53: 580102 l8ui a0, a1, 88 +4021cc56: e109 s32i.n a0, a1, 56 +4021cc58: f42020 extui a2, a2, 0, 16 +4021cc5b: d129 s32i.n a2, a1, 52 +4021cc5d: 10c132 addi a3, a1, 16 +4021cc60: 140c movi.n a4, 1 +4021cc62: 0f5d mov.n a5, a15 +4021cc64: 0d08 l32i.n a0, a13, 0 +4021cc66: d12cc0 mul16s a2, a12, a12 +4021cc69: 01d222 addmi a2, a2, 0x100 +4021cc6c: 80c222 addi a2, a2, -128 +4021cc6f: 3e2002 l32i a0, a0, 248 +4021cc72: 212820 srai a2, a2, 8 +4021cc75: f129 s32i.n a2, a1, 60 +4021cc77: c02e20 sub a2, a14, a2 +4021cc7a: 012280 slli a2, a2, 24 +4021cc7d: 312820 srai a2, a2, 24 +4021cc80: 0000c0 callx0 a0 +4021cc83: 11c132 addi a3, a1, 17 +4021cc86: 040c movi.n a4, 0 +4021cc88: 0f5d mov.n a5, a15 +4021cc8a: 0d08 l32i.n a0, a13, 0 +4021cc8c: 02ed mov.n a14, a2 +4021cc8e: 3e2002 l32i a0, a0, 248 +4021cc91: 0c2d mov.n a2, a12 +4021cc93: 0000c0 callx0 a0 +4021cc96: d138 l32i.n a3, a1, 52 +4021cc98: 0d08 l32i.n a0, a13, 0 +4021cc9a: 02cd mov.n a12, a2 +4021cc9c: d008 l32i.n a0, a0, 52 +4021cc9e: 120c movi.n a2, 1 +4021cca0: 0000c0 callx0 a0 +4021cca3: 102122 l32i a2, a1, 64 +4021cca6: 6138 l32i.n a3, a1, 24 +4021cca8: 110152 l8ui a5, a1, 17 +4021ccab: 112182 l32i a8, a1, 68 +4021ccae: 100162 l8ui a6, a1, 16 +4021ccb1: 190c movi.n a9, 1 +4021ccb3: c06680 sub a6, a6, a8 +4021ccb6: 122182 l32i a8, a1, 72 +4021ccb9: 936960 movnez a6, a9, a6 +4021ccbc: 104162 s8i a6, a1, 16 +4021ccbf: c05580 sub a5, a5, a8 +4021ccc2: e188 l32i.n a8, a1, 56 +4021ccc4: 935950 movnez a5, a9, a5 +4021ccc7: 114152 s8i a5, a1, 17 +4021ccca: 0189 s32i.n a8, a1, 0 +4021cccc: 0d08 l32i.n a0, a13, 0 +4021ccce: 5148 l32i.n a4, a1, 20 +4021ccd0: 122002 l32i a0, a0, 72 +4021ccd3: 12c172 addi a7, a1, 18 +4021ccd6: 0000c0 callx0 a0 +4021ccd9: f128 l32i.n a2, a1, 60 +4021ccdb: 120102 l8ui a0, a1, 18 +4021ccde: 2e2a add.n a2, a14, a2 +4021cce0: 01e080 slli a14, a0, 24 +4021cce3: 130102 l8ui a0, a1, 19 +4021cce6: 31e8e0 srai a14, a14, 24 +4021cce9: ee2a add.n a14, a14, a2 +4021cceb: 010080 slli a0, a0, 24 +4021ccee: 01ee80 slli a14, a14, 24 +4021ccf1: 31e8e0 srai a14, a14, 24 +4021ccf4: 310800 srai a0, a0, 24 +4021ccf7: c0cc00 sub a12, a12, a0 +4021ccfa: 0d08 l32i.n a0, a13, 0 +4021ccfc: 01cc80 slli a12, a12, 24 +4021ccff: c008 l32i.n a0, a0, 48 +4021cd01: 31c8c0 srai a12, a12, 24 +4021cd04: 0000c0 callx0 a0 +4021cd07: 132132 l32i a3, a1, 76 +4021cd0a: 330b addi.n a3, a3, -1 +4021cd0c: 136132 s32i a3, a1, 76 +4021cd0f: f4a356 bnez a3, 4021cc5d +4021cd12: 120122 l8ui a2, a1, 18 +4021cd15: 0d08 l32i.n a0, a13, 0 +4021cd17: 012280 slli a2, a2, 24 +4021cd1a: 0008 l32i.n a0, a0, 0 +4021cd1c: 312820 srai a2, a2, 24 +4021cd1f: 0000c0 callx0 a0 +4021cd22: 1252e6 bgei a2, 5, 4021cd38 +4021cd25: 130122 l8ui a2, a1, 19 +4021cd28: 0d08 l32i.n a0, a13, 0 +4021cd2a: 012280 slli a2, a2, 24 +4021cd2d: 0008 l32i.n a0, a0, 0 +4021cd2f: 312820 srai a2, a2, 24 +4021cd32: 0000c0 callx0 a0 +4021cd35: 1452a6 blti a2, 5, 4021cd4d +4021cd38: fa8941 l32r a4, 4021b75c +4021cd3b: a78961 l32r a6, 40206b60 +4021cd3e: 0438 l32i.n a3, a4, 0 +4021cd40: 090452 l8ui a5, a4, 9 +4021cd43: 203360 or a3, a3, a6 +4021cd46: 551b addi.n a5, a5, 1 +4021cd48: 094452 s8i a5, a4, 9 +4021cd4b: 0439 s32i.n a3, a4, 0 +4021cd4d: f20c movi.n a2, 15 +4021cd4f: 107c movi.n a0, -15 +4021cd51: 012e07 blt a14, a0, 4021cd56 +4021cd54: 0e0d mov.n a0, a14 +4021cd56: 012207 blt a2, a0, 4021cd5b +4021cd59: 002d mov.n a2, a0 +4021cd5b: 106c movi.n a0, -31 +4021cd5d: 01e280 slli a14, a2, 24 +4021cd60: 31e8e0 srai a14, a14, 24 +4021cd63: f21c movi.n a2, 31 +4021cd65: 012c07 blt a12, a0, 4021cd6a +4021cd68: 0c0d mov.n a0, a12 +4021cd6a: 012207 blt a2, a0, 4021cd6f +4021cd6d: 002d mov.n a2, a0 +4021cd6f: 10c132 addi a3, a1, 16 +4021cd72: 140c movi.n a4, 1 +4021cd74: 0f5d mov.n a5, a15 +4021cd76: 01c280 slli a12, a2, 24 +4021cd79: 0d08 l32i.n a0, a13, 0 +4021cd7b: 31c8c0 srai a12, a12, 24 +4021cd7e: 3e2002 l32i a0, a0, 248 +4021cd81: 0e2d mov.n a2, a14 +4021cd83: 0000c0 callx0 a0 +4021cd86: 0c2d mov.n a2, a12 +4021cd88: 11c132 addi a3, a1, 17 +4021cd8b: 040c movi.n a4, 0 +4021cd8d: 0f5d mov.n a5, a15 +4021cd8f: 0d08 l32i.n a0, a13, 0 +4021cd91: a1d8 l32i.n a13, a1, 40 +4021cd93: 3e2002 l32i a0, a0, 248 +4021cd96: c1f8 l32i.n a15, a1, 48 +4021cd98: 0000c0 callx0 a0 +4021cd9b: 8108 l32i.n a0, a1, 32 +4021cd9d: 7138 l32i.n a3, a1, 28 +4021cd9f: 142122 l32i a2, a1, 80 +4021cda2: 0043e2 s8i a14, a3, 0 +4021cda5: 0042c2 s8i a12, a2, 0 +4021cda8: b1e8 l32i.n a14, a1, 44 +4021cdaa: 91c8 l32i.n a12, a1, 36 +4021cdac: 50c112 addi a1, a1, 80 +4021cdaf: f00d ret.n +4021cdb1: 000000 ill + +4021cdb4 : +4021cdb4: 059d mov.n a9, a5 +4021cdb6: b0c112 addi a1, a1, -80 +4021cdb9: f1d9 s32i.n a13, a1, 60 +4021cdbb: 1061e2 s32i a14, a1, 64 +4021cdbe: a179 s32i.n a7, a1, 40 +4021cdc0: 050c movi.n a5, 0 +4021cdc2: 1161f2 s32i a15, a1, 68 +4021cdc5: d109 s32i.n a0, a1, 52 +4021cdc7: e1c9 s32i.n a12, a1, 56 +4021cdc9: 7149 s32i.n a4, a1, 28 +4021cdcb: 5129 s32i.n a2, a1, 20 +4021cdcd: 6139 s32i.n a3, a1, 24 +4021cdcf: 77a022 movi a2, 119 +4021cdd2: 030c movi.n a3, 0 +4021cdd4: 041c movi.n a4, 16 +4021cdd6: e1f5c1 l32r a12, 402155ac +4021cdd9: 126192 s32i a9, a1, 72 +4021cddc: 0c08 l32i.n a0, a12, 0 +4021cdde: 06fd mov.n a15, a6 +4021cde0: 252002 l32i a0, a0, 148 +4021cde3: 060c movi.n a6, 0 +4021cde5: 0000c0 callx0 a0 +4021cde8: 030c movi.n a3, 0 +4021cdea: f40c movi.n a4, 15 +4021cdec: 650c movi.n a5, 6 +4021cdee: 660c movi.n a6, 6 +4021cdf0: 0c08 l32i.n a0, a12, 0 +4021cdf2: 02ed mov.n a14, a2 +4021cdf4: 252002 l32i a0, a0, 148 +4021cdf7: 77a022 movi a2, 119 +4021cdfa: 0000c0 callx0 a0 +4021cdfd: 030c movi.n a3, 0 +4021cdff: 841c movi.n a4, 24 +4021ce01: 550c movi.n a5, 5 +4021ce03: 560c movi.n a6, 5 +4021ce05: 0c08 l32i.n a0, a12, 0 +4021ce07: 02dd mov.n a13, a2 +4021ce09: 252002 l32i a0, a0, 148 +4021ce0c: 77a022 movi a2, 119 +4021ce0f: 0000c0 callx0 a0 +4021ce12: 030c movi.n a3, 0 +4021ce14: 841c movi.n a4, 24 +4021ce16: 350c movi.n a5, 3 +4021ce18: 360c movi.n a6, 3 +4021ce1a: 0c08 l32i.n a0, a12, 0 +4021ce1c: b129 s32i.n a2, a1, 44 +4021ce1e: 252002 l32i a0, a0, 148 +4021ce21: 77a022 movi a2, 119 +4021ce24: 0000c0 callx0 a0 +4021ce27: 030c movi.n a3, 0 +4021ce29: 940c movi.n a4, 9 +4021ce2b: 750c movi.n a5, 7 +4021ce2d: 060c movi.n a6, 0 +4021ce2f: 0c08 l32i.n a0, a12, 0 +4021ce31: c129 s32i.n a2, a1, 48 +4021ce33: 252002 l32i a0, a0, 148 +4021ce36: 77a022 movi a2, 119 +4021ce39: 0000c0 callx0 a0 +4021ce3c: 0c08 l32i.n a0, a12, 0 +4021ce3e: 9129 s32i.n a2, a1, 36 +4021ce40: 102002 l32i a0, a0, 64 +4021ce43: 120c movi.n a2, 1 +4021ce45: 0000c0 callx0 a0 +4021ce48: 120c movi.n a2, 1 +4021ce4a: 93d2d0 movnez a13, a2, a13 +4021ce4d: 93e2e0 movnez a14, a2, a14 +4021ce50: 1041e2 s8i a14, a1, 16 +4021ce53: 1141d2 s8i a13, a1, 17 +4021ce56: cf8c beqz.n a15, 4021ce66 +4021ce58: 0c08 l32i.n a0, a12, 0 +4021ce5a: 10c122 addi a2, a1, 16 +4021ce5d: 452002 l32i a0, a0, 0x114 +4021ce60: 11c132 addi a3, a1, 17 +4021ce63: 0000c0 callx0 a0 +4021ce66: 77a022 movi a2, 119 +4021ce69: 030c movi.n a3, 0 +4021ce6b: 041c movi.n a4, 16 +4021ce6d: 250c movi.n a5, 2 +4021ce6f: 0c08 l32i.n a0, a12, 0 +4021ce71: 260c movi.n a6, 2 +4021ce73: 272002 l32i a0, a0, 156 +4021ce76: 170c movi.n a7, 1 +4021ce78: 0000c0 callx0 a0 +4021ce7b: 77a022 movi a2, 119 +4021ce7e: 030c movi.n a3, 0 +4021ce80: 841c movi.n a4, 24 +4021ce82: 750c movi.n a5, 7 +4021ce84: 0c08 l32i.n a0, a12, 0 +4021ce86: 170c movi.n a7, 1 +4021ce88: 100192 l8ui a9, a1, 16 +4021ce8b: 110182 l8ui a8, a1, 17 +4021ce8e: c09e90 sub a9, a14, a9 +4021ce91: c08d80 sub a8, a13, a8 +4021ce94: 938780 movnez a8, a7, a8 +4021ce97: 939790 movnez a9, a7, a9 +4021ce9a: 104192 s8i a9, a1, 16 +4021ce9d: 114182 s8i a8, a1, 17 +4021cea0: 272002 l32i a0, a0, 156 +4021cea3: 760c movi.n a6, 7 +4021cea5: 0000c0 callx0 a0 +4021cea8: 0c08 l32i.n a0, a12, 0 +4021ceaa: 142002 l32i a0, a0, 80 +4021cead: 7128 l32i.n a2, a1, 28 +4021ceaf: 0000c0 callx0 a0 +4021ceb2: 050c movi.n a5, 0 +4021ceb4: 060c movi.n a6, 0 +4021ceb6: 070c movi.n a7, 0 +4021ceb8: 024d mov.n a4, a2 +4021ceba: 030c movi.n a3, 0 +4021cebc: 2139 s32i.n a3, a1, 8 +4021cebe: 1139 s32i.n a3, a1, 4 +4021cec0: 0139 s32i.n a3, a1, 0 +4021cec2: 0c08 l32i.n a0, a12, 0 +4021cec4: 120c movi.n a2, 1 +4021cec6: 1a2002 l32i a0, a0, 104 +4021cec9: 6138 l32i.n a3, a1, 24 +4021cecb: 0000c0 callx0 a0 +4021cece: 5128 l32i.n a2, a1, 20 +4021ced0: 13c172 addi a7, a1, 19 +4021ced3: a198 l32i.n a9, a1, 40 +4021ced5: b158 l32i.n a5, a1, 44 +4021ced7: 110142 l8ui a4, a1, 17 +4021ceda: 100132 l8ui a3, a1, 16 +4021cedd: c168 l32i.n a6, a1, 48 +4021cedf: 1a0c movi.n a10, 1 +4021cee1: 936a60 movnez a6, a10, a6 +4021cee4: 11f9 s32i.n a15, a1, 4 +4021cee6: 935a50 movnez a5, a10, a5 +4021cee9: 8159 s32i.n a5, a1, 32 +4021ceeb: 2199 s32i.n a9, a1, 8 +4021ceed: 0179 s32i.n a7, a1, 0 +4021ceef: 0c08 l32i.n a0, a12, 0 +4021cef1: 06fd mov.n a15, a6 +4021cef3: 432002 l32i a0, a0, 0x10c +4021cef6: 12c172 addi a7, a1, 18 +4021cef9: 0000c0 callx0 a0 +4021cefc: 0c08 l32i.n a0, a12, 0 +4021cefe: 1b2002 l32i a0, a0, 108 +4021cf01: 120c movi.n a2, 1 +4021cf03: 0000c0 callx0 a0 +4021cf06: 77a022 movi a2, 119 +4021cf09: 030c movi.n a3, 0 +4021cf0b: 041c movi.n a4, 16 +4021cf0d: 050c movi.n a5, 0 +4021cf0f: 060c movi.n a6, 0 +4021cf11: 0c08 l32i.n a0, a12, 0 +4021cf13: 0e7d mov.n a7, a14 +4021cf15: 272002 l32i a0, a0, 156 +4021cf18: 81e8 l32i.n a14, a1, 32 +4021cf1a: 0000c0 callx0 a0 +4021cf1d: 0d7d mov.n a7, a13 +4021cf1f: 77a022 movi a2, 119 +4021cf22: 030c movi.n a3, 0 +4021cf24: f40c movi.n a4, 15 +4021cf26: 0c08 l32i.n a0, a12, 0 +4021cf28: 650c movi.n a5, 6 +4021cf2a: 272002 l32i a0, a0, 156 +4021cf2d: 660c movi.n a6, 6 +4021cf2f: 0000c0 callx0 a0 +4021cf32: 0e7d mov.n a7, a14 +4021cf34: 77a022 movi a2, 119 +4021cf37: 030c movi.n a3, 0 +4021cf39: 841c movi.n a4, 24 +4021cf3b: 550c movi.n a5, 5 +4021cf3d: 0c08 l32i.n a0, a12, 0 +4021cf3f: 560c movi.n a6, 5 +4021cf41: 272002 l32i a0, a0, 156 +4021cf44: 91d8 l32i.n a13, a1, 36 +4021cf46: 0000c0 callx0 a0 +4021cf49: 0f7d mov.n a7, a15 +4021cf4b: 77a022 movi a2, 119 +4021cf4e: 030c movi.n a3, 0 +4021cf50: 841c movi.n a4, 24 +4021cf52: 0c08 l32i.n a0, a12, 0 +4021cf54: 350c movi.n a5, 3 +4021cf56: 272002 l32i a0, a0, 156 +4021cf59: 360c movi.n a6, 3 +4021cf5b: 0000c0 callx0 a0 +4021cf5e: 0d7d mov.n a7, a13 +4021cf60: 77a022 movi a2, 119 +4021cf63: 030c movi.n a3, 0 +4021cf65: 940c movi.n a4, 9 +4021cf67: 0c08 l32i.n a0, a12, 0 +4021cf69: 750c movi.n a5, 7 +4021cf6b: 272002 l32i a0, a0, 156 +4021cf6e: 060c movi.n a6, 0 +4021cf70: 0000c0 callx0 a0 +4021cf73: 77a022 movi a2, 119 +4021cf76: 030c movi.n a3, 0 +4021cf78: 841c movi.n a4, 24 +4021cf7a: 750c movi.n a5, 7 +4021cf7c: 0c08 l32i.n a0, a12, 0 +4021cf7e: 760c movi.n a6, 7 +4021cf80: 272002 l32i a0, a0, 156 +4021cf83: 070c movi.n a7, 0 +4021cf85: 0000c0 callx0 a0 +4021cf88: 77a022 movi a2, 119 +4021cf8b: 030c movi.n a3, 0 +4021cf8d: 041c movi.n a4, 16 +4021cf8f: 250c movi.n a5, 2 +4021cf91: 0c08 l32i.n a0, a12, 0 +4021cf93: 260c movi.n a6, 2 +4021cf95: 272002 l32i a0, a0, 156 +4021cf98: 070c movi.n a7, 0 +4021cf9a: 0000c0 callx0 a0 +4021cf9d: 1221d2 l32i a13, a1, 72 +4021cfa0: 020c movi.n a2, 0 +4021cfa2: 1021e2 l32i a14, a1, 64 +4021cfa5: 0c08 l32i.n a0, a12, 0 +4021cfa7: 1121f2 l32i a15, a1, 68 +4021cfaa: 102002 l32i a0, a0, 64 +4021cfad: e1c8 l32i.n a12, a1, 56 +4021cfaf: 0000c0 callx0 a0 +4021cfb2: 120132 l8ui a3, a1, 18 +4021cfb5: d108 l32i.n a0, a1, 52 +4021cfb7: 004d32 s8i a3, a13, 0 +4021cfba: 130122 l8ui a2, a1, 19 +4021cfbd: 014d22 s8i a2, a13, 1 +4021cfc0: f1d8 l32i.n a13, a1, 60 +4021cfc2: 50c112 addi a1, a1, 80 +4021cfc5: f00d ret.n + ... + +4021cfc8 : +4021cfc8: f0c112 addi a1, a1, -16 +4021cfcb: 0109 s32i.n a0, a1, 0 +4021cfcd: e1ab51 l32r a5, 4021567c +4021cfd0: 0020c0 memw +4021cfd3: 77a022 movi a2, 119 +4021cfd6: 030c movi.n a3, 0 +4021cfd8: 840c movi.n a4, 8 +4021cfda: d82552 l32i a5, a5, 0x360 +4021cfdd: e2fd61 l32r a6, 40215bd4 +4021cfe0: e17301 l32r a0, 402155ac +4021cfe3: 530662 l8ui a6, a6, 83 +4021cfe6: 0008 l32i.n a0, a0, 0 +4021cfe8: 605050 neg a5, a5 +4021cfeb: 015580 slli a5, a5, 24 +4021cfee: 262002 l32i a0, a0, 152 +4021cff1: 315850 srai a5, a5, 24 +4021cff4: 016680 slli a6, a6, 24 +4021cff7: 316860 srai a6, a6, 24 +4021cffa: c05560 sub a5, a5, a6 +4021cffd: e8c552 addi a5, a5, -24 +4021d000: 745050 extui a5, a5, 0, 8 +4021d003: 0000c0 callx0 a0 +4021d006: 0108 l32i.n a0, a1, 0 +4021d008: 10c112 addi a1, a1, 16 +4021d00b: f00d ret.n +4021d00d: 000000 ill + +4021d010 : +4021d010: 035d mov.n a5, a3 +4021d012: f0c112 addi a1, a1, -16 +4021d015: 030c movi.n a3, 0 +4021d017: 0109 s32i.n a0, a1, 0 +4021d019: 31e9 s32i.n a14, a1, 12 +4021d01b: 21d9 s32i.n a13, a1, 8 +4021d01d: 11c9 s32i.n a12, a1, 4 +4021d01f: 04dd mov.n a13, a4 +4021d021: e162c1 l32r a12, 402155ac +4021d024: 02ed mov.n a14, a2 +4021d026: 0c08 l32i.n a0, a12, 0 +4021d028: 77a022 movi a2, 119 +4021d02b: 262002 l32i a0, a0, 152 +4021d02e: b41c movi.n a4, 27 +4021d030: 0000c0 callx0 a0 +4021d033: 77a022 movi a2, 119 +4021d036: 030c movi.n a3, 0 +4021d038: 0c08 l32i.n a0, a12, 0 +4021d03a: 540c movi.n a4, 5 +4021d03c: 262002 l32i a0, a0, 152 +4021d03f: 7454e0 extui a5, a14, 4, 8 +4021d042: 0000c0 callx0 a0 +4021d045: 3450e0 extui a5, a14, 0, 4 +4021d048: 77a022 movi a2, 119 +4021d04b: 0c08 l32i.n a0, a12, 0 +4021d04d: 030c movi.n a3, 0 +4021d04f: 262002 l32i a0, a0, 152 +4021d052: 640c movi.n a4, 6 +4021d054: 0000c0 callx0 a0 +4021d057: 77a022 movi a2, 119 +4021d05a: 030c movi.n a3, 0 +4021d05c: f40c movi.n a4, 15 +4021d05e: 450c movi.n a5, 4 +4021d060: 0c08 l32i.n a0, a12, 0 +4021d062: 205d50 or a5, a13, a5 +4021d065: 262002 l32i a0, a0, 152 +4021d068: 745050 extui a5, a5, 0, 8 +4021d06b: 0000c0 callx0 a0 +4021d06e: 77a022 movi a2, 119 +4021d071: 030c movi.n a3, 0 +4021d073: f40c movi.n a4, 15 +4021d075: 31e8 l32i.n a14, a1, 12 +4021d077: 0d5d mov.n a5, a13 +4021d079: 0c08 l32i.n a0, a12, 0 +4021d07b: 11c8 l32i.n a12, a1, 4 +4021d07d: 262002 l32i a0, a0, 152 +4021d080: 21d8 l32i.n a13, a1, 8 +4021d082: 0000c0 callx0 a0 +4021d085: 0108 l32i.n a0, a1, 0 +4021d087: 10c112 addi a1, a1, 16 +4021d08a: f00d ret.n + +4021d08c : +4021d08c: f0c112 addi a1, a1, -16 +4021d08f: 0109 s32i.n a0, a1, 0 +4021d091: 93cc bnez.n a3, 4021d09e +4021d093: 530c movi.n a3, 5 +4021d095: 938d01 l32r a0, 40201ecc +4021d098: 0000c0 callx0 a0 +4021d09b: 000686 j 4021d0b9 +4021d09e: cc1701 l32r a0, 402100fc +4021d0a1: 0bb027 bgeu a0, a2, 4021d0b0 +4021d0a4: 938a01 l32r a0, 40201ecc +4021d0a7: 0000c0 callx0 a0 +4021d0aa: 112240 slli a2, a2, 12 +4021d0ad: 000206 j 4021d0b9 +4021d0b0: 112240 slli a2, a2, 12 +4021d0b3: 938601 l32r a0, 40201ecc +4021d0b6: 0000c0 callx0 a0 +4021d0b9: 0108 l32i.n a0, a1, 0 +4021d0bb: 10c112 addi a1, a1, 16 +4021d0be: f00d ret.n +4021d0c0: 00d310 excw +4021d0c3: 40 .byte 0x40 + +4021d0c4 : +4021d0c4: f0c112 addi a1, a1, -16 +4021d0c7: 0109 s32i.n a0, a1, 0 +4021d0c9: b4cc bnez.n a4, 4021d0d8 +4021d0cb: 050c movi.n a5, 0 +4021d0cd: 540c movi.n a4, 5 +4021d0cf: fffc01 l32r a0, 4021d0c0 +4021d0d2: 0000c0 callx0 a0 +4021d0d5: 000d86 j 4021d10f +4021d0d8: 000c movi.n a0, 0 +4021d0da: f97c movi.n a9, -1 +4021d0dc: cc0881 l32r a8, 402100fc +4021d0df: 050c movi.n a5, 0 +4021d0e1: 073387 bltu a3, a8, 4021d0ec +4021d0e4: 029387 bne a3, a8, 4021d0ea +4021d0e7: 01b927 bgeu a9, a2, 4021d0ec +4021d0ea: 100c movi.n a0, 1 +4021d0ec: 009c beqz.n a0, 4021d100 +4021d0ee: fff401 l32r a0, 4021d0c0 +4021d0f1: 0000c0 callx0 a0 +4021d0f4: 404410 ssai 20 +4021d0f7: 813320 src a3, a3, a2 +4021d0fa: 112240 slli a2, a2, 12 +4021d0fd: 000386 j 4021d10f +4021d100: 404410 ssai 20 +4021d103: 813320 src a3, a3, a2 +4021d106: 112240 slli a2, a2, 12 +4021d109: ffed01 l32r a0, 4021d0c0 +4021d10c: 0000c0 callx0 a0 +4021d10f: 0108 l32i.n a0, a1, 0 +4021d111: 10c112 addi a1, a1, 16 +4021d114: f00d ret.n + ... + +4021d118 : +4021d118: 822230 mull a2, a2, a3 +4021d11b: 412c20 srli a2, a2, 12 +4021d11e: f00d ret.n +4021d120: fe8bd4 excw +4021d123: 3f .byte 0x3f + +4021d124 : +4021d124: e53351 l32r a5, 402165f0 +4021d127: 0020c0 memw +4021d12a: 472542 l32i a4, a5, 0x11c +4021d12d: 424a add.n a4, a2, a4 +4021d12f: 0020c0 memw +4021d132: fffb61 l32r a6, 4021d120 +4021d135: 416542 s32i a4, a5, 0x104 +4021d138: 9b6731 l32r a3, 40203ed4 +4021d13b: 150c movi.n a5, 1 +4021d13d: 013327 bltu a3, a2, 4021d142 +4021d140: 050c movi.n a5, 0 +4021d142: 004652 s8i a5, a6, 0 +4021d145: f00d ret.n +4021d147: 000000 ill +4021d14a: 00 .byte 00 +4021d14b: 50 .byte 0x50 + +4021d14c : +4021d14c: f0c112 addi a1, a1, -16 +4021d14f: 31d9 s32i.n a13, a1, 12 +4021d151: 0159 s32i.n a5, a1, 0 +4021d153: 1109 s32i.n a0, a1, 4 +4021d155: e29d01 l32r a0, 40215bcc +4021d158: 21c9 s32i.n a12, a1, 8 +4021d15a: 250002 l8ui a0, a0, 37 +4021d15d: e524c1 l32r a12, 402165f0 +4021d160: 20dc bnez.n a0, 4021d176 +4021d162: c57c movi.n a5, -4 +4021d164: 0020c0 memw +4021d167: 592c32 l32i a3, a12, 0x164 +4021d16a: 103350 and a3, a3, a5 +4021d16d: 0020c0 memw +4021d170: 596c32 s32i a3, a12, 0x164 +4021d173: 000786 j 4021d195 +4021d176: 071066 bnei a0, 1, 4021d181 +4021d179: 062c movi.n a6, 32 +4021d17b: 204460 or a4, a4, a6 +4021d17e: 0004c6 j 4021d195 +4021d181: 102066 bnei a0, 2, 4021d195 +4021d184: 380c movi.n a8, 3 +4021d186: 0020c0 memw +4021d189: 592c72 l32i a7, a12, 0x164 +4021d18c: 207780 or a7, a7, a8 +4021d18f: 0020c0 memw +4021d192: 596c72 s32i a7, a12, 0x164 +4021d195: 030c movi.n a3, 0 +4021d197: e105d1 l32r a13, 402155ac +4021d19a: 0020c0 memw +4021d19d: 506c32 s32i a3, a12, 0x140 +4021d1a0: 0020c0 memw +4021d1a3: 516c22 s32i a2, a12, 0x144 +4021d1a6: 0020c0 memw +4021d1a9: 77a022 movi a2, 119 +4021d1ac: 852c movi.n a5, 40 +4021d1ae: 0d08 l32i.n a0, a13, 0 +4021d1b0: 406c42 s32i a4, a12, 0x100 +4021d1b3: 262002 l32i a0, a0, 152 +4021d1b6: c41c movi.n a4, 28 +4021d1b8: 0000c0 callx0 a0 +4021d1bb: e90c51 l32r a5, 402175ec +4021d1be: 9d1941 l32r a4, 40204624 +4021d1c1: e12e31 l32r a3, 4021567c +4021d1c4: 0020c0 memw +4021d1c7: f22322 l32i a2, a3, 0x3c8 +4021d1ca: 102250 and a2, a2, a5 +4021d1cd: 202240 or a2, a2, a4 +4021d1d0: 0020c0 memw +4021d1d3: f26322 s32i a2, a3, 0x3c8 +4021d1d6: 120c movi.n a2, 1 +4021d1d8: a03101 l32r a0, 4020529c +4021d1db: 0000c0 callx0 a0 +4021d1de: 77a022 movi a2, 119 +4021d1e1: 030c movi.n a3, 0 +4021d1e3: 0d08 l32i.n a0, a13, 0 +4021d1e5: c41c movi.n a4, 28 +4021d1e7: 262002 l32i a0, a0, 152 +4021d1ea: 850c movi.n a5, 8 +4021d1ec: 0000c0 callx0 a0 +4021d1ef: e50151 l32r a5, 402165f4 +4021d1f2: e20541 l32r a4, 40215a08 +4021d1f5: 0020c0 memw +4021d1f8: e12131 l32r a3, 4021567c +4021d1fb: fa2322 l32i a2, a3, 0x3e8 +4021d1fe: 102250 and a2, a2, a5 +4021d201: 202240 or a2, a2, a4 +4021d204: 0020c0 memw +4021d207: 340c movi.n a4, 3 +4021d209: 150c movi.n a5, 1 +4021d20b: fa6322 s32i a2, a3, 0x3e8 +4021d20e: 0d08 l32i.n a0, a13, 0 +4021d210: 62a022 movi a2, 98 +4021d213: 262002 l32i a0, a0, 152 +4021d216: 130c movi.n a3, 1 +4021d218: 0000c0 callx0 a0 +4021d21b: 0168 l32i.n a6, a1, 0 +4021d21d: ffca31 l32r a3, 4021d148 +4021d220: 318666 bnei a6, 8, 4021d255 +4021d223: 6ca022 movi a2, 108 +4021d226: 230c movi.n a3, 2 +4021d228: 040c movi.n a4, 0 +4021d22a: 050c movi.n a5, 0 +4021d22c: 0d08 l32i.n a0, a13, 0 +4021d22e: 060c movi.n a6, 0 +4021d230: 272002 l32i a0, a0, 156 +4021d233: 070c movi.n a7, 0 +4021d235: 0000c0 callx0 a0 +4021d238: 65a022 movi a2, 101 +4021d23b: 430c movi.n a3, 4 +4021d23d: 0d08 l32i.n a0, a13, 0 +4021d23f: 040c movi.n a4, 0 +4021d241: 262002 l32i a0, a0, 152 +4021d244: 650c movi.n a5, 6 +4021d246: 0000c0 callx0 a0 +4021d249: e59921 l32r a2, 402168b0 +4021d24c: 0020c0 memw +4021d24f: 446c22 s32i a2, a12, 0x110 +4021d252: 000146 j 4021d25b +4021d255: 0020c0 memw +4021d258: 446c32 s32i a3, a12, 0x110 +4021d25b: 21c8 l32i.n a12, a1, 8 +4021d25d: 31d8 l32i.n a13, a1, 12 +4021d25f: 1108 l32i.n a0, a1, 4 +4021d261: 10c112 addi a1, a1, 16 +4021d264: f00d ret.n + ... + +4021d268 : +4021d268: c0af82 movi a8, -64 +4021d26b: e4e151 l32r a5, 402165f0 +4021d26e: 0020c0 memw +4021d271: 462572 l32i a7, a5, 0x118 +4021d274: 107780 and a7, a7, a8 +4021d277: 207720 or a7, a7, a2 +4021d27a: 0020c0 memw +4021d27d: 466572 s32i a7, a5, 0x118 +4021d280: e67c movi.n a6, -2 +4021d282: 0020c0 memw +4021d285: 6a2542 l32i a4, a5, 0x1a8 +4021d288: 104460 and a4, a4, a6 +4021d28b: 204430 or a4, a4, a3 +4021d28e: 0020c0 memw +4021d291: 6a6542 s32i a4, a5, 0x1a8 +4021d294: f00d ret.n +4021d296: 300000 xor a0, a0, a0 +4021d299: 3ffe80 excw +4021d29c: 000000 ill +4021d29f: 0f .byte 0xf + +4021d2a0 : +4021d2a0: fffe61 l32r a6, 4021d298 +4021d2a3: 0628 l32i.n a2, a6, 0 +4021d2a5: 250266 bnei a2, -1, 4021d2ce +4021d2a8: ad9d51 l32r a5, 4020891c +4021d2ab: fffc41 l32r a4, 4021d29c +4021d2ae: e3df21 l32r a2, 4021622c +4021d2b1: 0020c0 memw +4021d2b4: 962232 l32i a3, a2, 0x258 +4021d2b7: 103350 and a3, a3, a5 +4021d2ba: 413f30 srli a3, a3, 15 +4021d2bd: 0f1366 bnei a3, 1, 4021d2d0 +4021d2c0: 0020c0 memw +4021d2c3: 952222 l32i a2, a2, 0x254 +4021d2c6: 102240 and a2, a2, a4 +4021d2c9: 752820 extui a2, a2, 24, 8 +4021d2cc: 0629 s32i.n a2, a6, 0 +4021d2ce: f00d ret.n +4021d2d0: 0020c0 memw +4021d2d3: 972222 l32i a2, a2, 0x25c +4021d2d6: fffb06 j 4021d2c6 +4021d2d9: 000000 ill +4021d2dc: 800050 add a0, a0, a5 + ... + +4021d2e0 : +4021d2e0: f0c112 addi a1, a1, -16 +4021d2e3: 11c9 s32i.n a12, a1, 4 +4021d2e5: 0109 s32i.n a0, a1, 0 +4021d2e7: 02cd mov.n a12, a2 +4021d2e9: fffb45 call0 4021d2a0 +4021d2ec: 0e2226 beqi a2, 2, 4021d2fe +4021d2ef: 0c5d mov.n a5, a12 +4021d2f1: 420c movi.n a2, 4 +4021d2f3: 030c movi.n a3, 0 +4021d2f5: fff941 l32r a4, 4021d2dc +4021d2f8: ffe505 call0 4021d14c +4021d2fb: 0008c6 j 4021d322 +4021d2fe: e23301 l32r a0, 40215bcc +4021d301: 440002 l8ui a0, a0, 68 +4021d304: 0e2066 bnei a0, 2, 4021d316 +4021d307: 0c5d mov.n a5, a12 +4021d309: 420c movi.n a2, 4 +4021d30b: 030c movi.n a3, 0 +4021d30d: fff341 l32r a4, 4021d2dc +4021d310: ffe385 call0 4021d14c +4021d313: 0002c6 j 4021d322 +4021d316: 0c5d mov.n a5, a12 +4021d318: 420c movi.n a2, 4 +4021d31a: 030c movi.n a3, 0 +4021d31c: e1bb41 l32r a4, 40215a08 +4021d31f: ffe2c5 call0 4021d14c +4021d322: 11c8 l32i.n a12, a1, 4 +4021d324: 0108 l32i.n a0, a1, 0 +4021d326: 10c112 addi a1, a1, 16 +4021d329: f00d ret.n + ... + +4021d32c : +4021d32c: f0c112 addi a1, a1, -16 +4021d32f: 11c9 s32i.n a12, a1, 4 +4021d331: 0109 s32i.n a0, a1, 0 +4021d333: 02cd mov.n a12, a2 +4021d335: fff685 call0 4021d2a0 +4021d338: 0e2226 beqi a2, 2, 4021d34a +4021d33b: 0c5d mov.n a5, a12 +4021d33d: 020c movi.n a2, 0 +4021d33f: 030c movi.n a3, 0 +4021d341: ffe641 l32r a4, 4021d2dc +4021d344: ffe045 call0 4021d14c +4021d347: 0008c6 j 4021d36e +4021d34a: e22001 l32r a0, 40215bcc +4021d34d: 440002 l8ui a0, a0, 68 +4021d350: 0e2066 bnei a0, 2, 4021d362 +4021d353: 0c5d mov.n a5, a12 +4021d355: 020c movi.n a2, 0 +4021d357: 030c movi.n a3, 0 +4021d359: ffe041 l32r a4, 4021d2dc +4021d35c: ffdec5 call0 4021d14c +4021d35f: 0002c6 j 4021d36e +4021d362: 0c5d mov.n a5, a12 +4021d364: 020c movi.n a2, 0 +4021d366: 030c movi.n a3, 0 +4021d368: e1a841 l32r a4, 40215a08 +4021d36b: ffde05 call0 4021d14c +4021d36e: 11c8 l32i.n a12, a1, 4 +4021d370: 0108 l32i.n a0, a1, 0 +4021d372: 10c112 addi a1, a1, 16 +4021d375: f00d ret.n +4021d377: 203c00 or a3, a12, a0 +4021d37a: 640003 excw +4021d37d: 000c80 ret + +4021d380 : +4021d380: f0c112 addi a1, a1, -16 +4021d383: 0109 s32i.n a0, a1, 0 +4021d385: fff185 call0 4021d2a0 +4021d388: e49a01 l32r a0, 402165f0 +4021d38b: 111226 beqi a2, 1, 4021d3a0 +4021d38e: e28c beqz.n a2, 4021d3a0 +4021d390: fffa21 l32r a2, 4021d378 +4021d393: 0020c0 memw +4021d396: 436022 s32i a2, a0, 0x10c +4021d399: 0108 l32i.n a0, a1, 0 +4021d39b: 10c112 addi a1, a1, 16 +4021d39e: f00d ret.n +4021d3a0: fff731 l32r a3, 4021d37c +4021d3a3: 0020c0 memw +4021d3a6: 436032 s32i a3, a0, 0x10c +4021d3a9: fffb06 j 4021d399 + +4021d3ac : +4021d3ac: f00d ret.n +4021d3ae: 110000 slli a0, a0, 16 +4021d3b1: 000020 excw + +4021d3b4 : +4021d3b4: b5d171 l32r a7, 4020aaf8 +4021d3b7: e39d81 l32r a8, 4021622c +4021d3ba: 0020c0 memw +4021d3bd: 862862 l32i a6, a8, 0x218 +4021d3c0: e0af21 l32r a2, 4021567c +4021d3c3: 106670 and a6, a6, a7 +4021d3c6: 0020c0 memw +4021d3c9: 462222 l32i a2, a2, 0x118 +4021d3cc: fff971 l32r a7, 4021d3b0 +4021d3cf: 517227 bbci a2, 18, 4021d424 +4021d3d2: e16051 l32r a5, 40215954 +4021d3d5: 0020c0 memw +4021d3d8: 562592 l32i a9, a5, 0x158 +4021d3db: 031977 beq a9, a7, 4021d3e2 +4021d3de: 120c movi.n a2, 1 +4021d3e0: f00d ret.n +4021d3e2: 0020c0 memw +4021d3e5: 4f2522 l32i a2, a5, 0x13c +4021d3e8: 15a220 extui a10, a2, 18, 2 +4021d3eb: ef3a66 bnei a10, 3, 4021d3de +4021d3ee: 25b420 extui a11, a2, 20, 3 +4021d3f1: e92b66 bnei a11, 2, 4021d3de +4021d3f4: 853720 extui a3, a2, 23, 9 +4021d3f7: 7fa092 movi a9, 127 +4021d3fa: e08937 bany a9, a3, 4021d3de +4021d3fd: 0020c0 memw +4021d400: 4f2522 l32i a2, a5, 0x13c +4021d403: 154220 extui a4, a2, 18, 2 +4021d406: d43466 bnei a4, 3, 4021d3de +4021d409: 25a420 extui a10, a2, 20, 3 +4021d40c: ce2a66 bnei a10, 2, 4021d3de +4021d40f: 85b720 extui a11, a2, 23, 9 +4021d412: c889b7 bany a9, a11, 4021d3de +4021d415: 0020c0 memw +4021d418: 562522 l32i a2, a5, 0x158 +4021d41b: bf9277 bne a2, a7, 4021d3de +4021d41e: 0020c0 memw +4021d421: 866862 s32i a6, a8, 0x218 +4021d424: 020c movi.n a2, 0 +4021d426: f00d ret.n + +4021d428 : +4021d428: 345020 extui a5, a2, 0, 4 +4021d42b: 547040 extui a7, a4, 0, 6 +4021d42e: 146030 extui a6, a3, 0, 2 +4021d431: 1166c0 slli a6, a6, 4 +4021d434: 1177a0 slli a7, a7, 6 +4021d437: 205560 or a5, a5, a6 +4021d43a: ff3961 l32r a6, 4021d120 +4021d43d: 205570 or a5, a5, a7 +4021d440: 015652 s16i a5, a6, 2 +4021d443: f00d ret.n +4021d445: 000000 ill + +4021d448 : +4021d448: 021226 beqi a2, 1, 4021d44e +4021d44b: 2f2266 bnei a2, 2, 4021d47e +4021d44e: ff3451 l32r a5, 4021d120 +4021d451: 040522 l8ui a2, a5, 4 +4021d454: 62ec bnez.n a2, 4021d47e +4021d456: e46621 l32r a2, 402165f0 +4021d459: 0020c0 memw +4021d45c: 4a2232 l32i a3, a2, 0x128 +4021d45f: 143030 extui a3, a3, 0, 2 +4021d462: a3cc bnez.n a3, 4021d470 +4021d464: 0020c0 memw +4021d467: 4a2242 l32i a4, a2, 0x128 +4021d46a: 144040 extui a4, a4, 0, 2 +4021d46d: ff3416 beqz a4, 4021d464 +4021d470: 270c movi.n a7, 2 +4021d472: 0020c0 memw +4021d475: 4a2262 l32i a6, a2, 0x128 +4021d478: 106670 and a6, a6, a7 +4021d47b: 064562 s8i a6, a5, 6 +4021d47e: f00d ret.n + +4021d480 : +4021d480: f54581 l32r a8, 4021a994 +4021d483: e07e31 l32r a3, 4021567c +4021d486: e45a61 l32r a6, 402165f0 +4021d489: 0020c0 memw +4021d48c: 446682 s32i a8, a6, 0x110 +4021d48f: 070c movi.n a7, 0 +4021d491: 0020c0 memw +4021d494: 516672 s32i a7, a6, 0x144 +4021d497: a02151 l32r a5, 4020551c +4021d49a: 0020c0 memw +4021d49d: 406652 s32i a5, a6, 0x100 +4021d4a0: e85341 l32r a4, 402175ec +4021d4a3: 0020c0 memw +4021d4a6: f22322 l32i a2, a3, 0x3c8 +4021d4a9: 102240 and a2, a2, a4 +4021d4ac: 0020c0 memw +4021d4af: f26322 s32i a2, a3, 0x3c8 +4021d4b2: f00d ret.n +4021d4b4: f1fe00 excw +4021d4b7: 3f .byte 0x3f +4021d4b8: ff .byte 0xff +4021d4b9: ff .byte 0xff +4021d4ba: 3f .byte 0x3f +4021d4bb: ff .byte 0xff +4021d4bc: ff .byte 0xff +4021d4bd: ff .byte 0xff +4021d4be: ff .byte 0xff +4021d4bf: fffc bnez.n a15, 4021d502 +4021d4c1: ff .byte 0xff +4021d4c2: ff .byte 0xff +4021d4c3: 3f .byte 0x3f + +4021d4c4 : +4021d4c4: db3ba1 l32r a10, 402141b0 +4021d4c7: fffb31 l32r a3, 4021d4b4 +4021d4ca: e06b61 l32r a6, 40215678 +4021d4cd: 0020c0 memw +4021d4d0: f866a2 s32i a10, a6, 0x3e0 +4021d4d3: fff991 l32r a9, 4021d4b8 +4021d4d6: e14c81 l32r a8, 40215a08 +4021d4d9: 0020c0 memw +4021d4dc: 9d2672 l32i a7, a6, 0x274 +4021d4df: 107790 and a7, a7, a9 +4021d4e2: 207780 or a7, a7, a8 +4021d4e5: 0020c0 memw +4021d4e8: 9d6672 s32i a7, a6, 0x274 +4021d4eb: fff451 l32r a5, 4021d4bc +4021d4ee: e44441 l32r a4, 40216600 +4021d4f1: 0020c0 memw +4021d4f4: 9d2622 l32i a2, a6, 0x274 +4021d4f7: 102250 and a2, a2, a5 +4021d4fa: 202240 or a2, a2, a4 +4021d4fd: 0020c0 memw +4021d500: 9d6622 s32i a2, a6, 0x274 +4021d503: e444b1 l32r a11, 40216614 +4021d506: e9b9a1 l32r a10, 40217bec +4021d509: 0020c0 memw +4021d50c: 9d2692 l32i a9, a6, 0x274 +4021d50f: 1099b0 and a9, a9, a11 +4021d512: 2099a0 or a9, a9, a10 +4021d515: 0020c0 memw +4021d518: 9d6692 s32i a9, a6, 0x274 +4021d51b: ffe981 l32r a8, 4021d4c0 +4021d51e: 939571 l32r a7, 40202374 +4021d521: 0020c0 memw +4021d524: 9d2652 l32i a5, a6, 0x274 +4021d527: 105580 and a5, a5, a8 +4021d52a: 205570 or a5, a5, a7 +4021d52d: 0020c0 memw +4021d530: 9d6652 s32i a5, a6, 0x274 +4021d533: eeb541 l32r a4, 40219008 +4021d536: 0020c0 memw +4021d539: 812322 l32i a2, a3, 0x204 +4021d53c: 102240 and a2, a2, a4 +4021d53f: 0020c0 memw +4021d542: 816322 s32i a2, a3, 0x204 +4021d545: f00d ret.n + ... + +4021d548 : +4021d548: e1a141 l32r a4, 40215bcc +4021d54b: f0c112 addi a1, a1, -16 +4021d54e: 11c9 s32i.n a12, a1, 4 +4021d550: 0109 s32i.n a0, a1, 0 +4021d552: 220402 l8ui a0, a4, 34 +4021d555: e048c1 l32r a12, 40215678 +4021d558: 761026 beqi a0, 1, 4021d5d2 +4021d55b: 733026 beqi a0, 3, 4021d5d2 +4021d55e: 704026 beqi a0, 4, 4021d5d2 +4021d561: 6d5026 beqi a0, 5, 4021d5d2 +4021d564: 000c movi.n a0, 0 +4021d566: 0020c0 memw +4021d569: f86c02 s32i a0, a12, 0x3e0 +4021d56c: ffd501 l32r a0, 4021d4c0 +4021d56f: ffd131 l32r a3, 4021d4b4 +4021d572: 0020c0 memw +4021d575: 9d2cb2 l32i a11, a12, 0x274 +4021d578: 10bb00 and a11, a11, a0 +4021d57b: 0020c0 memw +4021d57e: 9d6cb2 s32i a11, a12, 0x274 +4021d581: e424a1 l32r a10, 40216614 +4021d584: 0020c0 memw +4021d587: 9d2c92 l32i a9, a12, 0x274 +4021d58a: 1099a0 and a9, a9, a10 +4021d58d: 0020c0 memw +4021d590: 9d6c92 s32i a9, a12, 0x274 +4021d593: ffca81 l32r a8, 4021d4bc +4021d596: 0020c0 memw +4021d599: 9d2c72 l32i a7, a12, 0x274 +4021d59c: 107780 and a7, a7, a8 +4021d59f: 0020c0 memw +4021d5a2: 9d6c72 s32i a7, a12, 0x274 +4021d5a5: ffc461 l32r a6, 4021d4b8 +4021d5a8: 0020c0 memw +4021d5ab: 9d2c52 l32i a5, a12, 0x274 +4021d5ae: 105560 and a5, a5, a6 +4021d5b1: 0020c0 memw +4021d5b4: 9d6c52 s32i a5, a12, 0x274 +4021d5b7: 936f41 l32r a4, 40202374 +4021d5ba: 0020c0 memw +4021d5bd: 812322 l32i a2, a3, 0x204 +4021d5c0: 202240 or a2, a2, a4 +4021d5c3: 0020c0 memw +4021d5c6: 816322 s32i a2, a3, 0x204 +4021d5c9: 11c8 l32i.n a12, a1, 4 +4021d5cb: 0108 l32i.n a0, a1, 0 +4021d5cd: 10c112 addi a1, a1, 16 +4021d5d0: f00d ret.n +4021d5d2: 230422 l8ui a2, a4, 35 +4021d5d5: 002245 call0 4021d7fc +4021d5d8: ffe406 j 4021d56c +4021d5db: 138700 excw + ... + +4021d5e0 : +4021d5e0: 421c movi.n a2, 20 +4021d5e2: e0c112 addi a1, a1, -32 +4021d5e5: 11c9 s32i.n a12, a1, 4 +4021d5e7: 21d9 s32i.n a13, a1, 8 +4021d5e9: 31e9 s32i.n a14, a1, 12 +4021d5eb: 41f9 s32i.n a15, a1, 16 +4021d5ed: 0109 s32i.n a0, a1, 0 +4021d5ef: 9f2b01 l32r a0, 4020529c +4021d5f2: 0000c0 callx0 a0 +4021d5f5: 0c0c movi.n a12, 0 +4021d5f7: fff9e1 l32r a14, 4021d5dc +4021d5fa: e39bd1 l32r a13, 40216468 +4021d5fd: ffadf1 l32r a15, 4021d4b4 +4021d600: 0020c0 memw +4021d603: 842d02 l32i a0, a13, 0x210 +4021d606: 340000 extui a0, a0, 0, 4 +4021d609: 90cc bnez.n a0, 4021d616 +4021d60b: 0020c0 memw +4021d60e: f42f22 l32i a2, a15, 0x3d0 +4021d611: 342c20 extui a2, a2, 12, 4 +4021d614: 029c beqz.n a2, 4021d628 +4021d616: 220c movi.n a2, 2 +4021d618: 9f2101 l32r a0, 4020529c +4021d61b: 0000c0 callx0 a0 +4021d61e: 0c3d mov.n a3, a12 +4021d620: cc1b addi.n a12, a12, 1 +4021d622: f4c0c0 extui a12, a12, 0, 16 +4021d625: d7be37 bgeu a14, a3, 4021d600 +4021d628: 11c8 l32i.n a12, a1, 4 +4021d62a: 21d8 l32i.n a13, a1, 8 +4021d62c: 31e8 l32i.n a14, a1, 12 +4021d62e: 41f8 l32i.n a15, a1, 16 +4021d630: 0108 l32i.n a0, a1, 0 +4021d632: 20c112 addi a1, a1, 32 +4021d635: f00d ret.n + ... + +4021d638 : +4021d638: f0c112 addi a1, a1, -16 +4021d63b: e16431 l32r a3, 40215bcc +4021d63e: 0109 s32i.n a0, a1, 0 +4021d640: 220302 l8ui a0, a3, 34 +4021d643: cfae42 movi a4, 0xfffffecf +4021d646: 0f1026 beqi a0, 1, 4021d659 +4021d649: 0c3026 beqi a0, 3, 4021d659 +4021d64c: 094026 beqi a0, 4, 4021d659 +4021d64f: 065026 beqi a0, 5, 4021d659 +4021d652: 0108 l32i.n a0, a1, 0 +4021d654: 10c112 addi a1, a1, 16 +4021d657: f00d ret.n +4021d659: 063c movi.n a6, 48 +4021d65b: e3e521 l32r a2, 402165f0 +4021d65e: 0020c0 memw +4021d661: 852252 l32i a5, a2, 0x214 +4021d664: 105540 and a5, a5, a4 +4021d667: 205560 or a5, a5, a6 +4021d66a: 0020c0 memw +4021d66d: 856252 s32i a5, a2, 0x214 +4021d670: 0020c0 memw +4021d673: 8d2202 l32i a0, a2, 0x234 +4021d676: 100040 and a0, a0, a4 +4021d679: 0020c0 memw +4021d67c: 8d6202 s32i a0, a2, 0x234 +4021d67f: 220302 l8ui a0, a3, 34 +4021d682: 2d1026 beqi a0, 1, 4021d6b3 +4021d685: 2a3026 beqi a0, 3, 4021d6b3 +4021d688: 024026 beqi a0, 4, 4021d68e +4021d68b: c35066 bnei a0, 5, 4021d652 +4021d68e: 230362 l8ui a6, a3, 35 +4021d691: bd26b6 bltui a6, 2, 4021d652 +4021d694: 020c movi.n a2, 0 +4021d696: 130c movi.n a3, 1 +4021d698: 140c movi.n a4, 1 +4021d69a: 050c movi.n a5, 0 +4021d69c: 9fa701 l32r a0, 40205538 +4021d69f: 0000c0 callx0 a0 +4021d6a2: 820c movi.n a2, 8 +4021d6a4: 030c movi.n a3, 0 +4021d6a6: 840c movi.n a4, 8 +4021d6a8: 050c movi.n a5, 0 +4021d6aa: 9fa301 l32r a0, 40205538 +4021d6ad: 0000c0 callx0 a0 +4021d6b0: ffe786 j 4021d652 +4021d6b3: 230372 l8ui a7, a3, 35 +4021d6b6: 9827b6 bltui a7, 2, 4021d652 +4021d6b9: 120c movi.n a2, 1 +4021d6bb: 030c movi.n a3, 0 +4021d6bd: 140c movi.n a4, 1 +4021d6bf: 050c movi.n a5, 0 +4021d6c1: 9f9d01 l32r a0, 40205538 +4021d6c4: 0000c0 callx0 a0 +4021d6c7: 020c movi.n a2, 0 +4021d6c9: 830c movi.n a3, 8 +4021d6cb: 840c movi.n a4, 8 +4021d6cd: 050c movi.n a5, 0 +4021d6cf: 9f9a01 l32r a0, 40205538 +4021d6d2: 0000c0 callx0 a0 +4021d6d5: ffde46 j 4021d652 + +4021d6d8 : +4021d6d8: f0c112 addi a1, a1, -16 +4021d6db: e13c31 l32r a3, 40215bcc +4021d6de: 0109 s32i.n a0, a1, 0 +4021d6e0: 220302 l8ui a0, a3, 34 +4021d6e3: cfae52 movi a5, 0xfffffecf +4021d6e6: 0f1026 beqi a0, 1, 4021d6f9 +4021d6e9: 0c3026 beqi a0, 3, 4021d6f9 +4021d6ec: 094026 beqi a0, 4, 4021d6f9 +4021d6ef: 065026 beqi a0, 5, 4021d6f9 +4021d6f2: 0108 l32i.n a0, a1, 0 +4021d6f4: 10c112 addi a1, a1, 16 +4021d6f7: f00d ret.n +4021d6f9: 230322 l8ui a2, a3, 35 +4021d6fc: e3bd01 l32r a0, 402165f0 +4021d6ff: 2822b6 bltui a2, 2, 4021d72b +4021d702: 062c movi.n a6, 32 +4021d704: 0020c0 memw +4021d707: 852072 l32i a7, a0, 0x214 +4021d70a: 107750 and a7, a7, a5 +4021d70d: 207760 or a7, a7, a6 +4021d710: 0020c0 memw +4021d713: 856072 s32i a7, a0, 0x214 +4021d716: 0020c0 memw +4021d719: 8d2042 l32i a4, a0, 0x234 +4021d71c: 104450 and a4, a4, a5 +4021d71f: 204460 or a4, a4, a6 +4021d722: 0020c0 memw +4021d725: 8d6042 s32i a4, a0, 0x234 +4021d728: 000886 j 4021d74e +4021d72b: 0a3c movi.n a10, 48 +4021d72d: 0020c0 memw +4021d730: 852092 l32i a9, a0, 0x214 +4021d733: 109950 and a9, a9, a5 +4021d736: 2099a0 or a9, a9, a10 +4021d739: 0020c0 memw +4021d73c: 856092 s32i a9, a0, 0x214 +4021d73f: 0020c0 memw +4021d742: 8d2082 l32i a8, a0, 0x234 +4021d745: 108850 and a8, a8, a5 +4021d748: 0020c0 memw +4021d74b: 8d6082 s32i a8, a0, 0x234 +4021d74e: 220302 l8ui a0, a3, 34 +4021d751: 4f1026 beqi a0, 1, 4021d7a4 +4021d754: 4c3026 beqi a0, 3, 4021d7a4 +4021d757: 024026 beqi a0, 4, 4021d75d +4021d75a: 945066 bnei a0, 5, 4021d6f2 +4021d75d: 230302 l8ui a0, a3, 35 +4021d760: 1e1066 bnei a0, 1, 4021d782 +4021d763: 020c movi.n a2, 0 +4021d765: 130c movi.n a3, 1 +4021d767: 140c movi.n a4, 1 +4021d769: 050c movi.n a5, 0 +4021d76b: 9f7301 l32r a0, 40205538 +4021d76e: 0000c0 callx0 a0 +4021d771: 820c movi.n a2, 8 +4021d773: 030c movi.n a3, 0 +4021d775: 840c movi.n a4, 8 +4021d777: 050c movi.n a5, 0 +4021d779: 9f6f01 l32r a0, 40205538 +4021d77c: 0000c0 callx0 a0 +4021d77f: ffdbc6 j 4021d6f2 +4021d782: f6c056 bnez a0, 4021d6f2 +4021d785: 120c movi.n a2, 1 +4021d787: 030c movi.n a3, 0 +4021d789: 140c movi.n a4, 1 +4021d78b: 050c movi.n a5, 0 +4021d78d: 9f6a01 l32r a0, 40205538 +4021d790: 0000c0 callx0 a0 +4021d793: 020c movi.n a2, 0 +4021d795: 830c movi.n a3, 8 +4021d797: 840c movi.n a4, 8 +4021d799: 050c movi.n a5, 0 +4021d79b: 9f6701 l32r a0, 40205538 +4021d79e: 0000c0 callx0 a0 +4021d7a1: ffd346 j 4021d6f2 +4021d7a4: 230302 l8ui a0, a3, 35 +4021d7a7: 1e1066 bnei a0, 1, 4021d7c9 +4021d7aa: 120c movi.n a2, 1 +4021d7ac: 030c movi.n a3, 0 +4021d7ae: 140c movi.n a4, 1 +4021d7b0: 050c movi.n a5, 0 +4021d7b2: 9f6101 l32r a0, 40205538 +4021d7b5: 0000c0 callx0 a0 +4021d7b8: 020c movi.n a2, 0 +4021d7ba: 830c movi.n a3, 8 +4021d7bc: 840c movi.n a4, 8 +4021d7be: 050c movi.n a5, 0 +4021d7c0: 9f5e01 l32r a0, 40205538 +4021d7c3: 0000c0 callx0 a0 +4021d7c6: ffca06 j 4021d6f2 +4021d7c9: f25056 bnez a0, 4021d6f2 +4021d7cc: 020c movi.n a2, 0 +4021d7ce: 130c movi.n a3, 1 +4021d7d0: 140c movi.n a4, 1 +4021d7d2: 050c movi.n a5, 0 +4021d7d4: 9f5901 l32r a0, 40205538 +4021d7d7: 0000c0 callx0 a0 +4021d7da: 820c movi.n a2, 8 +4021d7dc: 030c movi.n a3, 0 +4021d7de: 840c movi.n a4, 8 +4021d7e0: 050c movi.n a5, 0 +4021d7e2: 9f5501 l32r a0, 40205538 +4021d7e5: 0000c0 callx0 a0 +4021d7e8: ffc186 j 4021d6f2 +4021d7eb: 366000 excw +4021d7ee: 104000 and a4, a0, a0 +4021d7f1: 400011 l32r a1, 401ed7f4 <_lit4_end+0xe74c8> +4021d7f4: 001550 excw +4021d7f7: 333040 excw +4021d7fa: 00 .byte 00 +4021d7fb: 40 .byte 0x40 + +4021d7fc : +4021d7fc: df9f41 l32r a4, 40215678 +4021d7ff: 829c beqz.n a2, 4021d81b +4021d801: 201226 beqi a2, 1, 4021d825 +4021d804: 282226 beqi a2, 2, 4021d830 +4021d807: 303226 beqi a2, 3, 4021d83b +4021d80a: 384226 beqi a2, 4, 4021d846 +4021d80d: 085266 bnei a2, 5, 4021d819 +4021d810: fff721 l32r a2, 4021d7ec +4021d813: 0020c0 memw +4021d816: f86422 s32i a2, a4, 0x3e0 +4021d819: f00d ret.n +4021d81b: 030c movi.n a3, 0 +4021d81d: 0020c0 memw +4021d820: f86432 s32i a3, a4, 0x3e0 +4021d823: f00d ret.n +4021d825: da6251 l32r a5, 402141b0 +4021d828: 0020c0 memw +4021d82b: f86452 s32i a5, a4, 0x3e0 +4021d82e: f00d ret.n +4021d830: fff061 l32r a6, 4021d7f0 +4021d833: 0020c0 memw +4021d836: f86462 s32i a6, a4, 0x3e0 +4021d839: f00d ret.n +4021d83b: ffee71 l32r a7, 4021d7f4 +4021d83e: 0020c0 memw +4021d841: f86472 s32i a7, a4, 0x3e0 +4021d844: f00d ret.n +4021d846: ffec81 l32r a8, 4021d7f8 +4021d849: 0020c0 memw +4021d84c: f86482 s32i a8, a4, 0x3e0 +4021d84f: f00d ret.n +4021d851: 000000 ill +4021d854: ff .byte 0xff +4021d855: 0f .byte 0xf +4021d856: 988000 excw +4021d859: fe8b addi.n a15, a14, 8 +4021d85b: 3f .byte 0x3f +4021d85c: fe8aa6 blti a10, 8, 4021d85e +4021d85f: 3f .byte 0x3f +4021d860: 8b7a add.n a8, a11, a7 +4021d862: fe .byte 0xfe +4021d863: 3f .byte 0x3f + +4021d864 : +4021d864: e0c112 addi a1, a1, -32 +4021d867: 31e9 s32i.n a14, a1, 12 +4021d869: 0109 s32i.n a0, a1, 0 +4021d86b: 41f9 s32i.n a15, a1, 16 +4021d86d: 21d9 s32i.n a13, a1, 8 +4021d86f: 11c9 s32i.n a12, a1, 4 +4021d871: 03dd mov.n a13, a3 +4021d873: 02cd mov.n a12, a2 +4021d875: fe2af1 l32r a15, 4021d120 +4021d878: 022226 beqi a2, 2, 4021d87e +4021d87b: 191266 bnei a2, 1, 4021d898 +4021d87e: 016d56 bnez a13, 4021d898 +4021d881: 070f22 l8ui a2, a15, 7 +4021d884: 029c beqz.n a2, 4021d898 +4021d886: 040f32 l8ui a3, a15, 4 +4021d889: b3cc bnez.n a3, 4021d898 +4021d88b: 060f42 l8ui a4, a15, 6 +4021d88e: 64cc bnez.n a4, 4021d898 +4021d890: 004f05 call0 4021dd84 +4021d893: 050c movi.n a5, 0 +4021d895: 074f52 s8i a5, a15, 7 +4021d898: 3b7c movi.n a11, -13 +4021d89a: 4a0c movi.n a10, 4 +4021d89c: e26451 l32r a5, 4021622c +4021d89f: e02d91 l32r a9, 40215954 +4021d8a2: 0020c0 memw +4021d8a5: d02982 l32i a8, a9, 0x340 +4021d8a8: 1088b0 and a8, a8, a11 +4021d8ab: 2088a0 or a8, a8, a10 +4021d8ae: 0020c0 memw +4021d8b1: d06982 s32i a8, a9, 0x340 +4021d8b4: 986371 l32r a7, 40203a40 +4021d8b7: 0020c0 memw +4021d8ba: 862562 l32i a6, a5, 0x218 +4021d8bd: 206670 or a6, a6, a7 +4021d8c0: 0020c0 memw +4021d8c3: 866562 s32i a6, a5, 0x218 +4021d8c6: 051c26 beqi a12, 1, 4021d8cf +4021d8c9: 022c26 beqi a12, 2, 4021d8cf +4021d8cc: 118c66 bnei a12, 8, 4021d8e1 +4021d8cf: e55501 l32r a0, 40216e24 +4021d8d2: 0020c0 memw +4021d8d5: 8625e2 l32i a14, a5, 0x218 +4021d8d8: 20ee00 or a14, a14, a0 +4021d8db: 0020c0 memw +4021d8de: 8665e2 s32i a14, a5, 0x218 +4021d8e1: ffdc41 l32r a4, 4021d854 +4021d8e4: e346e1 l32r a14, 402165fc +4021d8e7: df6401 l32r a0, 40215678 +4021d8ea: 0020c0 memw +4021d8ed: 856042 s32i a4, a0, 0x214 +4021d8f0: fef231 l32r a3, 4021d4b8 +4021d8f3: 0020c0 memw +4021d8f6: 9d2022 l32i a2, a0, 0x274 +4021d8f9: 102230 and a2, a2, a3 +4021d8fc: 0020c0 memw +4021d8ff: 9d6022 s32i a2, a0, 0x274 +4021d902: 081c26 beqi a12, 1, 4021d90e +4021d905: 052c26 beqi a12, 2, 4021d90e +4021d908: 028c26 beqi a12, 8, 4021d90e +4021d90b: 001f86 j 4021d98d +4021d90e: 020c movi.n a2, 0 +4021d910: f1ca01 l32r a0, 4021a038 +4021d913: 0000c0 callx0 a0 +4021d916: 62a022 movi a2, 98 +4021d919: df2401 l32r a0, 402155ac +4021d91c: 130c movi.n a3, 1 +4021d91e: 0008 l32i.n a0, a0, 0 +4021d920: 340c movi.n a4, 3 +4021d922: 262002 l32i a0, a0, 152 +4021d925: f1a052 movi a5, 241 +4021d928: 0000c0 callx0 a0 +4021d92b: 62a022 movi a2, 98 +4021d92e: df1f01 l32r a0, 402155ac +4021d931: 130c movi.n a3, 1 +4021d933: 0008 l32i.n a0, a0, 0 +4021d935: b40c movi.n a4, 11 +4021d937: 262002 l32i a0, a0, 152 +4021d93a: 80a052 movi a5, 128 +4021d93d: 0000c0 callx0 a0 +4021d940: ffb3c5 call0 4021d480 +4021d943: 65a022 movi a2, 101 +4021d946: df1901 l32r a0, 402155ac +4021d949: 430c movi.n a3, 4 +4021d94b: 0008 l32i.n a0, a0, 0 +4021d94d: 040c movi.n a4, 0 +4021d94f: 262002 l32i a0, a0, 152 +4021d952: c6a052 movi a5, 198 +4021d955: 0000c0 callx0 a0 +4021d958: 6ca022 movi a2, 108 +4021d95b: 230c movi.n a3, 2 +4021d95d: 040c movi.n a4, 0 +4021d95f: df1301 l32r a0, 402155ac +4021d962: 050c movi.n a5, 0 +4021d964: 0008 l32i.n a0, a0, 0 +4021d966: 060c movi.n a6, 0 +4021d968: 272002 l32i a0, a0, 156 +4021d96b: 170c movi.n a7, 1 +4021d96d: 0000c0 callx0 a0 +4021d970: e09931 l32r a3, 40215bd4 +4021d973: df4341 l32r a4, 40215680 +4021d976: 0328 l32i.n a2, a3, 0 +4021d978: 202240 or a2, a2, a4 +4021d97b: 0329 s32i.n a2, a3, 0 +4021d97d: fd0245 call0 4021a9a4 +4021d980: e09561 l32r a6, 40215bd4 +4021d983: 0658 l32i.n a5, a6, 0 +4021d985: df3c01 l32r a0, 40215678 +4021d988: 1055e0 and a5, a5, a14 +4021d98b: 0659 s32i.n a5, a6, 0 +4021d98d: df3d81 l32r a8, 40215684 +4021d990: 0020c0 memw +4021d993: 422822 l32i a2, a8, 0x108 +4021d996: 1022e0 and a2, a2, a14 +4021d999: 0020c0 memw +4021d99c: 426822 s32i a2, a8, 0x108 +4021d99f: 1b0c movi.n a11, 1 +4021d9a1: 0020c0 memw +4021d9a4: 5828a2 l32i a10, a8, 0x160 +4021d9a7: 20aab0 or a10, a10, a11 +4021d9aa: 0020c0 memw +4021d9ad: 5868a2 s32i a10, a8, 0x160 +4021d9b0: e97c movi.n a9, -2 +4021d9b2: 0020c0 memw +4021d9b5: 582872 l32i a7, a8, 0x160 +4021d9b8: 107790 and a7, a7, a9 +4021d9bb: 0020c0 memw +4021d9be: 586872 s32i a7, a8, 0x160 +4021d9c1: 0020c0 memw +4021d9c4: 9c2062 l32i a6, a0, 0x270 +4021d9c7: 3b6617 bbci a6, 1, 4021da06 +4021d9ca: 220c movi.n a2, 2 +4021d9cc: 9e3401 l32r a0, 4020529c +4021d9cf: 0000c0 callx0 a0 +4021d9d2: f1a082 movi a8, 241 +4021d9d5: 00ac62 movi a6, 0xfffffc00 +4021d9d8: 0020c0 memw +4021d9db: df2a41 l32r a4, 40215684 +4021d9de: d478 l32i.n a7, a4, 52 +4021d9e0: 107760 and a7, a7, a6 +4021d9e3: 207780 or a7, a7, a8 +4021d9e6: 0020c0 memw +4021d9e9: d479 s32i.n a7, a4, 52 +4021d9eb: f0a052 movi a5, 240 +4021d9ee: 0020c0 memw +4021d9f1: d438 l32i.n a3, a4, 52 +4021d9f3: 103360 and a3, a3, a6 +4021d9f6: 203350 or a3, a3, a5 +4021d9f9: 0020c0 memw +4021d9fc: d439 s32i.n a3, a4, 52 +4021d9fe: 220c movi.n a2, 2 +4021da00: 9e2701 l32r a0, 4020529c +4021da03: 0000c0 callx0 a0 +4021da06: fccf45 call0 4021a6fc +4021da09: 917f81 l32r a8, 40202008 +4021da0c: 0829 s32i.n a2, a8, 0 +4021da0e: ffcc85 call0 4021d6d8 +4021da11: ffb345 call0 4021d548 +4021da14: 8ddc bnez.n a13, 4021da30 +4021da16: 050f92 l8ui a9, a15, 5 +4021da19: 39dc bnez.n a9, 4021da30 +4021da1b: ff8f01 l32r a0, 4021d858 +4021da1e: 0000a2 l8ui a10, a0, 0 +4021da21: 0b1a66 bnei a10, 1, 4021da30 +4021da24: 000fb2 l8ui a11, a15, 0 +4021da27: 051b66 bnei a11, 1, 4021da30 +4021da2a: 192c26 beqi a12, 2, 4021da47 +4021da2d: 161c26 beqi a12, 1, 4021da47 +4021da30: 0108 l32i.n a0, a1, 0 +4021da32: 31e8 l32i.n a14, a1, 12 +4021da34: ff8ad1 l32r a13, 4021d85c +4021da37: 0c0c movi.n a12, 0 +4021da39: 41f8 l32i.n a15, a1, 16 +4021da3b: 004dc2 s8i a12, a13, 0 +4021da3e: 11c8 l32i.n a12, a1, 4 +4021da40: 21d8 l32i.n a13, a1, 8 +4021da42: 20c112 addi a1, a1, 32 +4021da45: f00d ret.n +4021da47: 00a022 movi a2, 0 +4021da4a: e060e1 l32r a14, 40215bcc +4021da4d: 004022 s8i a2, a0, 0 +4021da50: 430ee2 l8ui a14, a14, 67 +4021da53: 004f22 s8i a2, a15, 0 +4021da56: d6ee17 bbsi a14, 1, 4021da30 +4021da59: 04a022 movi a2, 4 +4021da5c: e28501 l32r a0, 40216470 +4021da5f: 0000c0 callx0 a0 +4021da62: ff7f21 l32r a2, 4021d860 +4021da65: 000222 l8ui a2, a2, 0 +4021da68: fbf585 call0 402199c4 +4021da6b: 04a022 movi a2, 4 +4021da6e: 030c movi.n a3, 0 +4021da70: ffdf05 call0 4021d864 +4021da73: ffee46 j 4021da30 + ... + +4021da78 : +4021da78: 060c movi.n a6, 0 +4021da7a: e2dd51 l32r a5, 402165f0 +4021da7d: 0020c0 memw +4021da80: 506562 s32i a6, a5, 0x140 +4021da83: 0020c0 memw +4021da86: 516522 s32i a2, a5, 0x144 +4021da89: 0020c0 memw +4021da8c: 406542 s32i a4, a5, 0x100 +4021da8f: 0020c0 memw +4021da92: 446532 s32i a3, a5, 0x110 +4021da95: f00d ret.n + ... + +4021da98 : +4021da98: f0c112 addi a1, a1, -16 +4021da9b: 0109 s32i.n a0, a1, 0 +4021da9d: ff8005 call0 4021d2a0 +4021daa0: 0c2226 beqi a2, 2, 4021dab0 +4021daa3: 020c movi.n a2, 0 +4021daa5: 030c movi.n a3, 0 +4021daa7: fe0d41 l32r a4, 4021d2dc +4021daaa: fffcc5 call0 4021da78 +4021daad: 000246 j 4021daba +4021dab0: 020c movi.n a2, 0 +4021dab2: 030c movi.n a3, 0 +4021dab4: dfd541 l32r a4, 40215a08 +4021dab7: fffc05 call0 4021da78 +4021daba: 0108 l32i.n a0, a1, 0 +4021dabc: 10c112 addi a1, a1, 16 +4021dabf: f00d ret.n +4021dac1: 000000 ill +4021dac4: 302020 xor a2, a0, a2 +4021dac7: 000020 excw +4021daca: 50 .byte 0x50 +4021dacb: 20 .byte 0x20 + +4021dacc : +4021dacc: f0c112 addi a1, a1, -16 +4021dacf: 11c9 s32i.n a12, a1, 4 +4021dad1: 0109 s32i.n a0, a1, 0 +4021dad3: f07c movi.n a0, -1 +4021dad5: e2c6c1 l32r a12, 402165f0 +4021dad8: 0020c0 memw +4021dadb: 496c02 s32i a0, a12, 0x124 +4021dade: fffb85 call0 4021da98 +4021dae1: 820c movi.n a2, 8 +4021dae3: 030c movi.n a3, 0 +4021dae5: ff7805 call0 4021d268 +4021dae8: ff8945 call0 4021d380 +4021daeb: e8a322 movi a2, 0x3e8 +4021daee: ff6345 call0 4021d124 +4021daf1: 97d331 l32r a3, 40203a40 +4021daf4: 0020c0 memw +4021daf7: 422c22 l32i a2, a12, 0x108 +4021dafa: 202230 or a2, a2, a3 +4021dafd: 0020c0 memw +4021db00: 426c22 s32i a2, a12, 0x108 +4021db03: 220c movi.n a2, 2 +4021db05: ff9405 call0 4021d448 +4021db08: e2bc01 l32r a0, 402165f8 +4021db0b: 040c movi.n a4, 0 +4021db0d: 750c movi.n a5, 7 +4021db0f: 0020c0 memw +4021db12: 406c02 s32i a0, a12, 0x100 +4021db15: cb22b1 l32r a11, 402107a0 +4021db18: 0020c0 memw +4021db1b: 416cb2 s32i a11, a12, 0x104 +4021db1e: 0020c0 memw +4021db21: 426c42 s32i a4, a12, 0x108 +4021db24: d9b1a1 l32r a10, 402141e8 +4021db27: 0020c0 memw +4021db2a: 436ca2 s32i a10, a12, 0x10c +4021db2d: d0ce91 l32r a9, 40211e68 +4021db30: 0020c0 memw +4021db33: 446c92 s32i a9, a12, 0x110 +4021db36: 480c movi.n a8, 4 +4021db38: 0020c0 memw +4021db3b: 466c82 s32i a8, a12, 0x118 +4021db3e: 0020c0 memw +4021db41: 486c42 s32i a4, a12, 0x120 +4021db44: 0020c0 memw +4021db47: 506c42 s32i a4, a12, 0x140 +4021db4a: 0020c0 memw +4021db4d: 516c42 s32i a4, a12, 0x144 +4021db50: ffdd71 l32r a7, 4021dac4 +4021db53: 0020c0 memw +4021db56: 526c72 s32i a7, a12, 0x148 +4021db59: ffdb61 l32r a6, 4021dac8 +4021db5c: 0020c0 memw +4021db5f: 536c62 s32i a6, a12, 0x14c +4021db62: 0020c0 memw +4021db65: 566c42 s32i a4, a12, 0x158 +4021db68: 0020c0 memw +4021db6b: 576c52 s32i a5, a12, 0x15c +4021db6e: 0020c0 memw +4021db71: 586c52 s32i a5, a12, 0x160 +4021db74: 0020c0 memw +4021db77: 596c42 s32i a4, a12, 0x164 +4021db7a: 0020c0 memw +4021db7d: 5a6c42 s32i a4, a12, 0x168 +4021db80: 0020c0 memw +4021db83: 5d6c42 s32i a4, a12, 0x174 +4021db86: 0020c0 memw +4021db89: 606c42 s32i a4, a12, 0x180 +4021db8c: 0020c0 memw +4021db8f: 646c42 s32i a4, a12, 0x190 +4021db92: 0020c0 memw +4021db95: 656c42 s32i a4, a12, 0x194 +4021db98: 0020c0 memw +4021db9b: 666c42 s32i a4, a12, 0x198 +4021db9e: 0020c0 memw +4021dba1: 676c42 s32i a4, a12, 0x19c +4021dba4: 0020c0 memw +4021dba7: 686c42 s32i a4, a12, 0x1a0 +4021dbaa: 0020c0 memw +4021dbad: 6a6c42 s32i a4, a12, 0x1a8 +4021dbb0: 0020c0 memw +4021dbb3: 6b6c42 s32i a4, a12, 0x1ac +4021dbb6: 0020c0 memw +4021dbb9: 6c6c42 s32i a4, a12, 0x1b0 +4021dbbc: 0020c0 memw +4021dbbf: 6d6c42 s32i a4, a12, 0x1b4 +4021dbc2: 11c8 l32i.n a12, a1, 4 +4021dbc4: 0108 l32i.n a0, a1, 0 +4021dbc6: 10c112 addi a1, a1, 16 +4021dbc9: f00d ret.n +4021dbcb: 007000 waiti 0 +4021dbce: 000080 ret +4021dbd1: 000d00 excw + +4021dbd4 : +4021dbd4: e0c112 addi a1, a1, -32 +4021dbd7: 026102 s32i a0, a1, 8 +4021dbda: 0461d2 s32i a13, a1, 16 +4021dbdd: 31c9 s32i.n a12, a1, 12 +4021dbdf: f27c movi.n a2, -1 +4021dbe1: e283c1 l32r a12, 402165f0 +4021dbe4: de72d1 l32r a13, 402155ac +4021dbe7: 0020c0 memw +4021dbea: 230c movi.n a3, 2 +4021dbec: 840c movi.n a4, 8 +4021dbee: 050c movi.n a5, 0 +4021dbf0: 0d08 l32i.n a0, a13, 0 +4021dbf2: 496c22 s32i a2, a12, 0x124 +4021dbf5: 262002 l32i a0, a0, 152 +4021dbf8: 6aa022 movi a2, 106 +4021dbfb: 0000c0 callx0 a0 +4021dbfe: 030c movi.n a3, 0 +4021dc00: 0020c0 memw +4021dc03: 436c32 s32i a3, a12, 0x10c +4021dc06: 320c movi.n a2, 3 +4021dc08: ff5185 call0 4021d124 +4021dc0b: 0020c0 memw +4021dc0e: 080c movi.n a8, 0 +4021dc10: 506c82 s32i a8, a12, 0x140 +4021dc13: 0020c0 memw +4021dc16: 516c82 s32i a8, a12, 0x144 +4021dc19: e77c movi.n a7, -2 +4021dc1b: 0020c0 memw +4021dc1e: 6a2c62 l32i a6, a12, 0x1a8 +4021dc21: 106670 and a6, a6, a7 +4021dc24: 0020c0 memw +4021dc27: 6a6c62 s32i a6, a12, 0x1a8 +4021dc2a: 0020c0 memw +4021dc2d: 402c52 l32i a5, a12, 0x100 +4021dc30: 0159 s32i.n a5, a1, 0 +4021dc32: ffe641 l32r a4, 4021dbcc +4021dc35: 0020c0 memw +4021dc38: 406c42 s32i a4, a12, 0x100 +4021dc3b: 820c movi.n a2, 8 +4021dc3d: 030c movi.n a3, 0 +4021dc3f: ff6285 call0 4021d268 +4021dc42: 977fa1 l32r a10, 40203a40 +4021dc45: dfe101 l32r a0, 40215bcc +4021dc48: 0020c0 memw +4021dc4b: 422c92 l32i a9, a12, 0x108 +4021dc4e: 000002 l8ui a0, a0, 0 +4021dc51: 2099a0 or a9, a9, a10 +4021dc54: 1199 s32i.n a9, a1, 4 +4021dc56: 261066 bnei a0, 1, 4021dc80 +4021dc59: 67a022 movi a2, 103 +4021dc5c: 430c movi.n a3, 4 +4021dc5e: 0d08 l32i.n a0, a13, 0 +4021dc60: 140c movi.n a4, 1 +4021dc62: 262002 l32i a0, a0, 152 +4021dc65: 88a052 movi a5, 136 +4021dc68: 0000c0 callx0 a0 +4021dc6b: 67a022 movi a2, 103 +4021dc6e: 430c movi.n a3, 4 +4021dc70: 0d08 l32i.n a0, a13, 0 +4021dc72: 240c movi.n a4, 2 +4021dc74: 262002 l32i a0, a0, 152 +4021dc77: 91a052 movi a5, 145 +4021dc7a: 0000c0 callx0 a0 +4021dc7d: 0005c6 j 4021dc98 +4021dc80: 142066 bnei a0, 2, 4021dc98 +4021dc83: 67a022 movi a2, 103 +4021dc86: 430c movi.n a3, 4 +4021dc88: 240c movi.n a4, 2 +4021dc8a: 750c movi.n a5, 7 +4021dc8c: 0d08 l32i.n a0, a13, 0 +4021dc8e: 560c movi.n a6, 5 +4021dc90: 272002 l32i a0, a0, 156 +4021dc93: 270c movi.n a7, 2 +4021dc95: 0000c0 callx0 a0 +4021dc98: dfcd21 l32r a2, 40215bcc +4021dc9b: 0d98 l32i.n a9, a13, 0 +4021dc9d: 4c0222 l8ui a2, a2, 76 +4021dca0: 272992 l32i a9, a9, 156 +4021dca3: 142020 extui a2, a2, 0, 2 +4021dca6: 121266 bnei a2, 1, 4021dcbc +4021dca9: 67a022 movi a2, 103 +4021dcac: 430c movi.n a3, 4 +4021dcae: 440c movi.n a4, 4 +4021dcb0: 450c movi.n a5, 4 +4021dcb2: 060c movi.n a6, 0 +4021dcb4: 471c movi.n a7, 20 +4021dcb6: 0009c0 callx0 a9 +4021dcb9: 0003c6 j 4021dccc +4021dcbc: 67a022 movi a2, 103 +4021dcbf: 430c movi.n a3, 4 +4021dcc1: 440c movi.n a4, 4 +4021dcc3: 450c movi.n a5, 4 +4021dcc5: 060c movi.n a6, 0 +4021dcc7: 371c movi.n a7, 19 +4021dcc9: 0009c0 callx0 a9 +4021dccc: dfc031 l32r a3, 40215bcc +4021dccf: 4c0332 l8ui a3, a3, 76 +4021dcd2: 0d08 l32i.n a0, a13, 0 +4021dcd4: 4a6307 bbci a3, 0, 4021dd22 +4021dcd7: 045130 extui a5, a3, 1, 1 +4021dcda: e15841 l32r a4, 4021623c +4021dcdd: ffbc21 l32r a2, 4021dbd0 +4021dce0: 1f2002 l32i a0, a0, 124 +4021dce3: 932450 movnez a2, a4, a5 +4021dce6: 023d mov.n a3, a2 +4021dce8: 120c movi.n a2, 1 +4021dcea: 0000c0 callx0 a0 +4021dced: 77a022 movi a2, 119 +4021dcf0: 030c movi.n a3, 0 +4021dcf2: c41c movi.n a4, 28 +4021dcf4: 650c movi.n a5, 6 +4021dcf6: 0d08 l32i.n a0, a13, 0 +4021dcf8: 660c movi.n a6, 6 +4021dcfa: 272002 l32i a0, a0, 156 +4021dcfd: 170c movi.n a7, 1 +4021dcff: 0000c0 callx0 a0 +4021dd02: 77a022 movi a2, 119 +4021dd05: 030c movi.n a3, 0 +4021dd07: c41c movi.n a4, 28 +4021dd09: 550c movi.n a5, 5 +4021dd0b: 0d08 l32i.n a0, a13, 0 +4021dd0d: 560c movi.n a6, 5 +4021dd0f: 272002 l32i a0, a0, 156 +4021dd12: 170c movi.n a7, 1 +4021dd14: 0000c0 callx0 a0 +4021dd17: 520c movi.n a2, 5 +4021dd19: 9d6001 l32r a0, 4020529c +4021dd1c: 0000c0 callx0 a0 +4021dd1f: 000fc6 j 4021dd62 +4021dd22: 77a022 movi a2, 119 +4021dd25: 00a032 movi a3, 0 +4021dd28: 0fa042 movi a4, 15 +4021dd2b: 03a052 movi a5, 3 +4021dd2e: 360c movi.n a6, 3 +4021dd30: 272002 l32i a0, a0, 156 +4021dd33: 170c movi.n a7, 1 +4021dd35: 0000c0 callx0 a0 +4021dd38: 77a022 movi a2, 119 +4021dd3b: 030c movi.n a3, 0 +4021dd3d: 841c movi.n a4, 24 +4021dd3f: 050c movi.n a5, 0 +4021dd41: 0d08 l32i.n a0, a13, 0 +4021dd43: 060c movi.n a6, 0 +4021dd45: 272002 l32i a0, a0, 156 +4021dd48: 170c movi.n a7, 1 +4021dd4a: 0000c0 callx0 a0 +4021dd4d: 77a022 movi a2, 119 +4021dd50: 030c movi.n a3, 0 +4021dd52: c41c movi.n a4, 28 +4021dd54: 050c movi.n a5, 0 +4021dd56: 0d08 l32i.n a0, a13, 0 +4021dd58: 060c movi.n a6, 0 +4021dd5a: 272002 l32i a0, a0, 156 +4021dd5d: 070c movi.n a7, 0 +4021dd5f: 0000c0 callx0 a0 +4021dd62: 01d8 l32i.n a13, a1, 0 +4021dd64: 0020c0 memw +4021dd67: 1128 l32i.n a2, a1, 4 +4021dd69: 426c22 s32i a2, a12, 0x108 +4021dd6c: 120c movi.n a2, 1 +4021dd6e: ff6d85 call0 4021d448 +4021dd71: 0020c0 memw +4021dd74: 406cd2 s32i a13, a12, 0x100 +4021dd77: 2108 l32i.n a0, a1, 8 +4021dd79: 31c8 l32i.n a12, a1, 12 +4021dd7b: 41d8 l32i.n a13, a1, 16 +4021dd7d: 20c112 addi a1, a1, 32 +4021dd80: f00d ret.n + ... + +4021dd84 : +4021dd84: f0c112 addi a1, a1, -16 +4021dd87: 0109 s32i.n a0, a1, 0 +4021dd89: ff5145 call0 4021d2a0 +4021dd8c: df9001 l32r a0, 40215bcc +4021dd8f: 000032 l8ui a3, a0, 0 +4021dd92: 440002 l8ui a0, a0, 68 +4021dd95: 439c beqz.n a3, 4021ddad +4021dd97: 081066 bnei a0, 1, 4021dda3 +4021dd9a: ffe385 call0 4021dbd4 +4021dd9d: 000306 j 4021ddad +4021dda0: 000000 ill +4021dda3: 60cc bnez.n a0, 4021ddad +4021dda5: 041226 beqi a2, 1, 4021ddad +4021dda8: 128c beqz.n a2, 4021ddad +4021ddaa: ffe285 call0 4021dbd4 +4021ddad: 0108 l32i.n a0, a1, 0 +4021ddaf: 10c112 addi a1, a1, 16 +4021ddb2: f00d ret.n +4021ddb4: 003a14 excw +4021ddb7: 38a440 excw +4021ddba: 00 .byte 00 +4021ddbb: 40 .byte 0x40 + +4021ddbc : +4021ddbc: f0c112 addi a1, a1, -16 +4021ddbf: 0109 s32i.n a0, a1, 0 +4021ddc1: df8201 l32r a0, 40215bcc +4021ddc4: df8441 l32r a4, 40215bd4 +4021ddc7: 000022 l8ui a2, a0, 0 +4021ddca: 0448 l32i.n a4, a4, 0 +4021ddcc: 42cc bnez.n a2, 4021ddd4 +4021ddce: 4c0032 l8ui a3, a0, 76 +4021ddd1: 526307 bbci a3, 0, 4021de27 +4021ddd4: 4ff4b7 bbsi a4, 27, 4021de27 +4021ddd7: 387c movi.n a8, -13 +4021ddd9: 870c movi.n a7, 8 +4021dddb: dede61 l32r a6, 40215954 +4021ddde: 0020c0 memw +4021dde1: d02652 l32i a5, a6, 0x340 +4021dde4: 105580 and a5, a5, a8 +4021dde7: 205570 or a5, a5, a7 +4021ddea: 0020c0 memw +4021dded: d06652 s32i a5, a6, 0x340 +4021ddf0: ffde05 call0 4021dbd4 +4021ddf3: de2201 l32r a0, 4021567c +4021ddf6: 0020c0 memw +4021ddf9: 462092 l32i a9, a0, 0x118 +4021ddfc: 277927 bbci a9, 18, 4021de27 +4021ddff: 0020c0 memw +4021de02: 4620a2 l32i a10, a0, 0x118 +4021de05: 25ada0 extui a10, a10, 29, 3 +4021de08: 1b2a66 bnei a10, 2, 4021de27 +4021de0b: e1f9b1 l32r a11, 402165f0 +4021de0e: 0020c0 memw +4021de11: 882bb2 l32i a11, a11, 0x220 +4021de14: 0f6b87 bbci a11, 8, 4021de27 +4021de17: 120c movi.n a2, 1 +4021de19: ffe601 l32r a0, 4021ddb4 +4021de1c: 0000c0 callx0 a0 +4021de1f: 120c movi.n a2, 1 +4021de21: ffe501 l32r a0, 4021ddb8 +4021de24: 0000c0 callx0 a0 +4021de27: 0108 l32i.n a0, a1, 0 +4021de29: 10c112 addi a1, a1, 16 +4021de2c: f00d ret.n + ... + +4021de30 : +4021de30: f0c112 addi a1, a1, -16 +4021de33: 0109 s32i.n a0, a1, 0 +4021de35: fff845 call0 4021ddbc +4021de38: 0108 l32i.n a0, a1, 0 +4021de3a: 10c112 addi a1, a1, 16 +4021de3d: f00d ret.n +4021de3f: 805400 add a5, a4, a0 +4021de42: fe .byte 0xfe +4021de43: 3f .byte 0x3f +4021de44: 8de8 l32i.n a14, a13, 32 +4021de46: fe .byte 0xfe +4021de47: 3f .byte 0x3f +4021de48: fe8eb1 l32r a11, 4021d880 +4021de4b: 3f .byte 0x3f +4021de4c: fe8eb0 excw +4021de4f: 3f .byte 0x3f +4021de50: f0c112 addi a1, a1, -16 +4021de53: fffb21 l32r a2, 4021de40 +4021de56: 3109 s32i.n a0, a1, 12 +4021de58: 21c9 s32i.n a12, a1, 8 +4021de5a: 000222 l8ui a2, a2, 0 +4021de5d: 581266 bnei a2, 1, 4021deb9 +4021de60: fff9c1 l32r a12, 4021de44 +4021de63: 2c0c22 l8ui a2, a12, 44 +4021de66: 1022f6 bgeui a2, 2, 4021de7a +4021de69: 030c movi.n a3, 0 +4021de6b: 220c movi.n a2, 2 +4021de6d: ff9f45 call0 4021d864 +4021de70: 220c movi.n a2, 2 +4021de72: 2c4c22 s8i a2, a12, 44 +4021de75: 000286 j 4021de83 +4021de78: 320000 excw +4021de7b: 2201a0 excw +4021de7e: 0502a0 extui a0, a10, 18, 1 +4021de81: 9e .byte 0x9e +4021de82: ff .byte 0xff +4021de83: 9d0801 l32r a0, 402052a4 +4021de86: 0000c0 callx0 a0 +4021de89: 020c movi.n a2, 0 +4021de8b: d95d01 l32r a0, 40214400 +4021de8e: 0000c0 callx0 a0 +4021de91: 02b5c5 call0 402209f0 +4021de94: 2d0c22 l8ui a2, a12, 45 +4021de97: 391266 bnei a2, 1, 4021ded4 +4021de9a: cb5b31 l32r a3, 40210c08 +4021de9d: 0020c0 memw +4021dea0: 0348 l32i.n a4, a3, 0 +4021dea2: 202420 or a2, a4, a2 +4021dea5: 0020c0 memw +4021dea8: 006322 s32i a2, a3, 0 +4021deab: a0a022 movi a2, 160 +4021deae: cb5701 l32r a0, 40210c0c +4021deb1: 0000c0 callx0 a0 +4021deb4: 000706 j 4021ded4 +4021deb7: 660000 excw +4021deba: 221722 l16ui a2, a7, 68 +4021debd: 0101a0 slli a0, a1, 22 +4021dec0: c0d950 sub a13, a9, a5 +4021dec3: 0c0000 excw +4021dec6: 820c03 excw +4021dec9: ff9985 call0 4021d864 +4021decc: 020c movi.n a2, 0 +4021dece: d94c01 l32r a0, 40214400 +4021ded1: 0000c0 callx0 a0 +4021ded4: ffdd21 l32r a2, 4021de48 +4021ded7: 000232 l8ui a3, a2, 0 +4021deda: 091366 bnei a3, 1, 4021dee7 +4021dedd: 030c movi.n a3, 0 +4021dedf: 004232 s8i a3, a2, 0 +4021dee2: 020c movi.n a2, 0 +4021dee4: fbbb85 call0 40219aa0 +4021dee7: ffd921 l32r a2, 4021de4c +4021deea: 000232 l8ui a3, a2, 0 +4021deed: 0b1366 bnei a3, 1, 4021defc +4021def0: 030c movi.n a3, 0 +4021def2: 004232 s8i a3, a2, 0 +4021def5: 130c movi.n a3, 1 +4021def7: 032d mov.n a2, a3 +4021def9: fa4785 call0 40218374 +4021defc: 3108 l32i.n a0, a1, 12 +4021defe: 21c8 l32i.n a12, a1, 8 +4021df00: 10c112 addi a1, a1, 16 +4021df03: f00d ret.n +4021df05: 000000 ill +4021df08: f0c112 addi a1, a1, -16 +4021df0b: 3109 s32i.n a0, a1, 12 +4021df0d: fff405 call0 4021de50 +4021df10: ffcd21 l32r a2, 4021de44 +4021df13: e91551 l32r a5, 40218368 +4021df16: 4238 l32i.n a3, a2, 16 +4021df18: 1163d7 bbci a3, 13, 4021df2d +4021df1b: 081242 l16ui a4, a2, 16 +4021df1e: 103540 and a3, a5, a4 +4021df21: 00a642 movi a4, 0x600 +4021df24: 203340 or a3, a3, a4 +4021df27: 000206 j 4021df33 +4021df2a: 000000 ill +4021df2d: 081232 l16ui a3, a2, 16 +4021df30: 103530 and a3, a5, a3 +4021df33: 085232 s16i a3, a2, 16 +4021df36: 0363c5 call0 40221574 +4021df39: 3108 l32i.n a0, a1, 12 +4021df3b: 10c112 addi a1, a1, 16 +4021df3e: f00d ret.n +4021df40: 879c beqz.n a7, 4021df5c +4021df42: fe .byte 0xfe +4021df43: 3f .byte 0x3f +4021df44: fe8630 excw +4021df47: 3f .byte 0x3f +4021df48: fe8de4 excw +4021df4b: 3f .byte 0x3f +4021df4c: ffbe21 l32r a2, 4021de44 +4021df4f: f0c112 addi a1, a1, -16 +4021df52: 3109 s32i.n a0, a1, 12 +4021df54: 4238 l32i.n a3, a2, 16 +4021df56: d46221 l32r a2, 402130e0 +4021df59: 102320 and a2, a3, a2 +4021df5c: 00a432 movi a3, 0x400 +4021df5f: 121237 beq a2, a3, 4021df75 +4021df62: fff731 l32r a3, 4021df40 +4021df65: fff721 l32r a2, 4021df44 +4021df68: 9aa142 movi a4, 0x19a +4021df6b: d9be01 l32r a0, 40214664 +4021df6e: 0000c0 callx0 a0 +4021df71: ffff06 j 4021df71 +4021df74: f90500 excw +4021df77: ff .byte 0xff +4021df78: fff421 l32r a2, 4021df48 +4021df7b: 0228 l32i.n a2, a2, 0 +4021df7d: 128c beqz.n a2, 4021df82 +4021df7f: 0002c0 callx0 a2 +4021df82: 3108 l32i.n a0, a1, 12 +4021df84: 10c112 addi a1, a1, 16 +4021df87: f00d ret.n +4021df89: 000000 ill +4021df8c: 002e00 excw +4021df8f: 220000 excw +4021df92: fe0000 excw +4021df95: ff .byte 0xff +4021df96: ff .byte 0xff +4021df97: 0f .byte 0xf +4021df98: af .byte 0xaf +4021df99: ffffd2 excw +4021df9c: ae .byte 0xae +4021df9d: 0fffd2 excw +4021dfa0: fedc20 excw +4021dfa3: 3f .byte 0x3f +4021dfa4: 3f .byte 0x3f +4021dfa5: 22fd excw +4021dfa7: 0bb840 excw +4021dfaa: 160000 excw +4021dfad: fffff4 excw +4021dfb0: 0017d4 excw +4021dfb3: 8e0000 excw +4021dfb6: fe .byte 0xfe +4021dfb7: 3f .byte 0x3f +4021dfb8: 0728 l32i.n a2, a7, 0 +4021dfba: 1c6000 excw +4021dfbd: 401037 beq a0, a3, 4021e001 +4021dfc0: 000dc0 callx0 a13 +4021dfc3: c11240 mul16u a1, a2, a4 +4021dfc6: 91d9d0 excw +4021dfc9: b109 s32i.n a0, a1, 44 +4021dfcb: a1c9 s32i.n a12, a1, 40 +4021dfcd: 0861e2 s32i a14, a1, 32 +4021dfd0: 71f9 s32i.n a15, a1, 28 +4021dfd2: 9cb401 l32r a0, 402052a4 +4021dfd5: 0000c0 callx0 a0 +4021dfd8: ff9b61 l32r a6, 4021de44 +4021dfdb: ffec21 l32r a2, 4021df8c +4021dfde: 042632 l32i a3, a6, 16 +4021dfe1: 20d660 or a13, a6, a6 +4021dfe4: 102320 and a2, a3, a2 +4021dfe7: ffea31 l32r a3, 4021df90 +4021dfea: 131237 beq a2, a3, 4021e001 +4021dfed: ffd431 l32r a3, 4021df40 +4021dff0: ffd521 l32r a2, 4021df44 +4021dff3: 63a242 movi a4, 0x263 +4021dff6: d99b01 l32r a0, 40214664 +4021dff9: 0000c0 callx0 a0 +4021dffc: ffff06 j 4021dffc +4021dfff: 050000 extui a0, a0, 16, 1 +4021e002: 00c8 l32i.n a12, a0, 0 +4021e004: 129c beqz.n a2, 4021e019 +4021e006: ffce31 l32r a3, 4021df40 +4021e009: ffce21 l32r a2, 4021df44 +4021e00c: 64a242 movi a4, 0x264 +4021e00f: d99501 l32r a0, 40214664 +4021e012: 0000c0 callx0 a0 +4021e015: ffff06 j 4021e015 +4021e018: 4dc800 excw +4021e01b: 997621 l32r a2, 402045f4 +4021e01e: 10cc20 and a12, a12, a2 +4021e021: 47fc56 bnez a12, 4021e4a4 +4021e024: 120c movi.n a2, 1 +4021e026: 035645 call0 4022158c +4021e029: 021266 bnei a2, 1, 4021e02f +4021e02c: 011d06 j 4021e4a4 +4021e02f: 90d021 l32r a2, 40202370 +4021e032: 5d48 l32i.n a4, a13, 20 +4021e034: 0020c0 memw +4021e037: 0238 l32i.n a3, a2, 0 +4021e039: ffd631 l32r a3, 4021df94 +4021e03c: c88ee1 l32r a14, 40210274 +4021e03f: 1e3347 bltu a3, a4, 4021e061 +4021e042: 0020c0 memw +4021e045: 0228 l32i.n a2, a2, 0 +4021e047: 2d38 l32i.n a3, a13, 8 +4021e049: 64c222 addi a2, a2, 100 +4021e04c: c02230 sub a2, a2, a3 +4021e04f: 0e0c movi.n a14, 0 +4021e051: 0cb247 bgeu a2, a4, 4021e061 +4021e054: 90c721 l32r a2, 40202370 +4021e057: 343a add.n a3, a4, a3 +4021e059: 0020c0 memw +4021e05c: 02e8 l32i.n a14, a2, 0 +4021e05e: c0e3e0 sub a14, a3, a14 +4021e061: ffcd21 l32r a2, 4021df98 +4021e064: ffce31 l32r a3, 4021df9c +4021e067: 2e2a add.n a2, a14, a2 +4021e069: 02b327 bgeu a3, a2, 4021e06f +4021e06c: 00ff06 j 4021e46c +4021e06f: 081d32 l16ui a3, a13, 16 +4021e072: 97bd21 l32r a2, 40203f68 +4021e075: 102320 and a2, a3, a2 +4021e078: 085d22 s16i a2, a13, 16 +4021e07b: c87e21 l32r a2, 40210274 +4021e07e: 0b9e27 bne a14, a2, 4021e08d +4021e081: 081d32 l16ui a3, a13, 16 +4021e084: 97c721 l32r a2, 40203fa0 +4021e087: 202320 or a2, a3, a2 +4021e08a: 085d22 s16i a2, a13, 16 +4021e08d: 2e0d22 l8ui a2, a13, 46 +4021e090: 021226 beqi a2, 1, 4021e096 +4021e093: 001f06 j 4021e113 +4021e096: 029cc5 call0 40220a64 +4021e099: ffc1f1 l32r a15, 4021dfa0 +4021e09c: 0f2d mov.n a2, a15 +4021e09e: 97c701 l32r a0, 40203fbc +4021e0a1: 0000c0 callx0 a0 +4021e0a4: 4d28 l32i.n a2, a13, 16 +4021e0a6: 3ce2c7 bbsi a2, 12, 4021e0e6 +4021e0a9: d97d21 l32r a2, 402146a0 +4021e0ac: 0248 l32i.n a4, a2, 0 +4021e0ae: b4ac beqz.n a4, 4021e0dd +4021e0b0: 978821 l32r a2, 40203ed0 +4021e0b3: 000232 l8ui a3, a2, 0 +4021e0b6: 112ee0 slli a2, a14, 2 +4021e0b9: 52ea add.n a5, a2, a14 +4021e0bb: 005316 beqz a3, 4021e0c4 +4021e0be: 1125f0 slli a2, a5, 1 +4021e0c1: 415520 srli a5, a2, 5 +4021e0c4: 90b021 l32r a2, 40202384 +4021e0c7: 0020c0 memw +4021e0ca: 0238 l32i.n a3, a2, 0 +4021e0cc: 0020c0 memw +4021e0cf: 0238 l32i.n a3, a2, 0 +4021e0d1: 253a add.n a2, a5, a3 +4021e0d3: 1438 l32i.n a3, a4, 4 +4021e0d5: 0db327 bgeu a3, a2, 4021e0e6 +4021e0d8: 220c movi.n a2, 2 +4021e0da: 000286 j 4021e0e8 +4021e0dd: ffb121 l32r a2, 4021dfa4 +4021e0e0: 8fdb01 l32r a0, 4020204c +4021e0e3: 0000c0 callx0 a0 +4021e0e6: 120c movi.n a2, 1 +4021e0e8: ff5631 l32r a3, 4021de40 +4021e0eb: 004322 s8i a2, a3, 0 +4021e0ee: ff5431 l32r a3, 4021de40 +4021e0f1: 000322 l8ui a2, a3, 0 +4021e0f4: 242266 bnei a2, 2, 4021e11c +4021e0f7: ffac31 l32r a3, 4021dfa8 +4021e0fa: 032d mov.n a2, a3 +4021e0fc: 006132 s32i a3, a1, 0 +4021e0ff: 02ab05 call0 40220bb0 +4021e102: 150c movi.n a5, 1 +4021e104: 0138 l32i.n a3, a1, 0 +4021e106: 054d mov.n a4, a5 +4021e108: 0f2d mov.n a2, a15 +4021e10a: 97ab01 l32r a0, 40203fb8 +4021e10d: 0000c0 callx0 a0 +4021e110: 000206 j 4021e11c +4021e113: ff4b31 l32r a3, 4021de40 +4021e116: 02a022 movi a2, 2 +4021e119: 004322 s8i a2, a3, 0 +4021e11c: ff4931 l32r a3, 4021de40 +4021e11f: 000322 l8ui a2, a3, 0 +4021e122: 021226 beqi a2, 1, 4021e128 +4021e125: 005ac6 j 4021e294 +4021e128: 00bf45 call0 4021ed20 +4021e12b: 9cb931 l32r a3, 40205410 +4021e12e: 006d22 s32i a2, a13, 0 +4021e131: 80ee30 add a14, a14, a3 +4021e134: 024d mov.n a4, a2 +4021e136: 030c movi.n a3, 0 +4021e138: 0e2d mov.n a2, a14 +4021e13a: fef885 call0 4021d0c4 +4021e13d: 908c31 l32r a3, 40202370 +4021e140: 0020c0 memw +4021e143: 03f8 l32i.n a15, a3, 0 +4021e145: 2ca132 movi a3, 0x12c +4021e148: 023327 bltu a3, a2, 4021e14e +4021e14b: 007946 j 4021e334 +4021e14e: caae21 l32r a2, 40210c08 +4021e151: 0020c0 memw +4021e154: 0228 l32i.n a2, a2, 0 +4021e156: 046207 bbci a2, 0, 4021e15e +4021e159: 120c movi.n a2, 1 +4021e15b: 000046 j 4021e160 +4021e15e: 020c movi.n a2, 0 +4021e160: 2d4d22 s8i a2, a13, 45 +4021e163: 2d0d22 l8ui a2, a13, 45 +4021e166: 1a1266 bnei a2, 1, 4021e184 +4021e169: caa731 l32r a3, 40210c08 +4021e16c: e27c movi.n a2, -2 +4021e16e: 0020c0 memw +4021e171: 0348 l32i.n a4, a3, 0 +4021e173: 102420 and a2, a4, a2 +4021e176: 0020c0 memw +4021e179: 006322 s32i a2, a3, 0 +4021e17c: 025c movi.n a2, 80 +4021e17e: caa301 l32r a0, 40210c0c +4021e181: 0000c0 callx0 a0 +4021e184: 028405 call0 402209c8 +4021e187: 120c movi.n a2, 1 +4021e189: d89d01 l32r a0, 40214400 +4021e18c: 0000c0 callx0 a0 +4021e18f: 220c movi.n a2, 2 +4021e191: e0b701 l32r a0, 40216470 +4021e194: 0000c0 callx0 a0 +4021e197: 00b505 call0 4021ece8 +4021e19a: 024d mov.n a4, a2 +4021e19c: 0d29 s32i.n a2, a13, 0 +4021e19e: 030c movi.n a3, 0 +4021e1a0: 0e2d mov.n a2, a14 +4021e1a2: fef205 call0 4021d0c4 +4021e1a5: 02ed mov.n a14, a2 +4021e1a7: 907221 l32r a2, 40202370 +4021e1aa: 0d48 l32i.n a4, a13, 0 +4021e1ac: 0020c0 memw +4021e1af: 0228 l32i.n a2, a2, 0 +4021e1b1: 030c movi.n a3, 0 +4021e1b3: c022f0 sub a2, a2, a15 +4021e1b6: fef0c5 call0 4021d0c4 +4021e1b9: d4ae32 movi a3, 0xfffffed4 +4021e1bc: 20f220 or a15, a2, a2 +4021e1bf: 80ee30 add a14, a14, a3 +4021e1c2: 9c3701 l32r a0, 402052a0 +4021e1c5: 0000c0 callx0 a0 +4021e1c8: e8a332 movi a3, 0x3e8 +4021e1cb: 3f3a add.n a3, a15, a3 +4021e1cd: 0233e7 bltu a3, a14, 4021e1d3 +4021e1d0: 005746 j 4021e331 +4021e1d3: 4d28 l32i.n a2, a13, 16 +4021e1d5: 0c62c7 bbci a2, 12, 4021e1e5 +4021e1d8: 081d22 l16ui a2, a13, 16 +4021e1db: e37c movi.n a3, -2 +4021e1dd: 103230 and a3, a2, a3 +4021e1e0: 000286 j 4021e1ee +4021e1e3: 220000 excw +4021e1e6: 081d mov.n a1, a8 +4021e1e8: 01a032 movi a3, 1 +4021e1eb: 203230 or a3, a2, a3 +4021e1ee: 085d32 s16i a3, a13, 16 +4021e1f1: 042d32 l32i a3, a13, 16 +4021e1f4: 00a042 movi a4, 0 +4021e1f7: c02ef0 sub a2, a14, a15 +4021e1fa: 045347 bbc a3, a4, 4021e202 +4021e1fd: fef245 call0 4021d124 +4021e200: 840c movi.n a4, 8 +4021e202: 4d38 l32i.n a3, a13, 16 +4021e204: 046317 bbci a3, 1, 4021e20c +4021e207: 021c movi.n a2, 16 +4021e209: 204420 or a4, a4, a2 +4021e20c: 420c movi.n a2, 4 +4021e20e: 102320 and a2, a3, a2 +4021e211: 202420 or a2, a4, a2 +4021e214: 043330 extui a3, a3, 3, 1 +4021e217: ff0505 call0 4021d268 +4021e21a: 4d38 l32i.n a3, a13, 16 +4021e21c: d3b121 l32r a2, 402130e0 +4021e21f: 102320 and a2, a3, a2 +4021e222: 00a232 movi a3, 0x200 +4021e225: 141237 beq a2, a3, 4021e23d +4021e228: ff4631 l32r a3, 4021df40 +4021e22b: ff4621 l32r a2, 4021df44 +4021e22e: dba142 movi a4, 0x1db +4021e231: d90c01 l32r a0, 40214664 +4021e234: 0000c0 callx0 a0 +4021e237: ffff06 j 4021e237 +4021e23a: 000000 ill +4021e23d: 081d32 l16ui a3, a13, 16 +4021e240: e84a21 l32r a2, 40218368 +4021e243: 102320 and a2, a3, a2 +4021e246: 00a432 movi a3, 0x400 +4021e249: 203230 or a3, a2, a3 +4021e24c: 3fae22 movi a2, 0xfffffe3f +4021e24f: 102320 and a2, a3, a2 +4021e252: 085d22 s16i a2, a13, 16 +4021e255: cb3521 l32r a2, 40210f2c +4021e258: 0020c0 memw +4021e25b: 002222 l32i a2, a2, 0 +4021e25e: 016d22 s32i a2, a13, 4 +4021e261: 904321 l32r a2, 40202370 +4021e264: 0020c0 memw +4021e267: 002222 l32i a2, a2, 0 +4021e26a: 2d29 s32i.n a2, a13, 8 +4021e26c: 904621 l32r a2, 40202384 +4021e26f: 0020c0 memw +4021e272: 0228 l32i.n a2, a2, 0 +4021e274: 3d29 s32i.n a2, a13, 12 +4021e276: 220c movi.n a2, 2 +4021e278: 2c4d22 s8i a2, a13, 44 +4021e27b: 220c movi.n a2, 2 +4021e27d: ff4f01 l32r a0, 4021dfbc +4021e280: 0000c0 callx0 a0 +4021e283: 742020 extui a2, a2, 0, 8 +4021e286: 2c4d22 s8i a2, a13, 44 +4021e289: 0a9256 bnez a2, 4021e336 +4021e28c: 220c movi.n a2, 2 +4021e28e: ff1b85 call0 4021d448 +4021e291: 002846 j 4021e336 +4021e294: 022226 beqi a2, 2, 4021e29a +4021e297: 003dc6 j 4021e392 +4021e29a: 903521 l32r a2, 40202370 +4021e29d: 0020c0 memw +4021e2a0: 02f8 l32i.n a15, a2, 0 +4021e2a2: 120c movi.n a2, 1 +4021e2a4: d85701 l32r a0, 40214400 +4021e2a7: 0000c0 callx0 a0 +4021e2aa: 820c movi.n a2, 8 +4021e2ac: e07101 l32r a0, 40216470 +4021e2af: 0000c0 callx0 a0 +4021e2b2: 020c movi.n a2, 0 +4021e2b4: d85301 l32r a0, 40214400 +4021e2b7: 0000c0 callx0 a0 +4021e2ba: 902d31 l32r a3, 40202370 +4021e2bd: 0020c0 memw +4021e2c0: 0328 l32i.n a2, a3, 0 +4021e2c2: c0f2f0 sub a15, a2, a15 +4021e2c5: ff3921 l32r a2, 4021dfac +4021e2c8: ee2a add.n a14, a14, a2 +4021e2ca: ff3921 l32r a2, 4021dfb0 +4021e2cd: 2f2a add.n a2, a15, a2 +4021e2cf: 5eb2e7 bgeu a2, a14, 4021e331 +4021e2d2: 042d22 l32i a2, a13, 16 +4021e2d5: 23e2c7 bbsi a2, 12, 4021e2fc +4021e2d8: ff3721 l32r a2, 4021dfb4 +4021e2db: 973801 l32r a0, 40203fbc +4021e2de: 0000c0 callx0 a0 +4021e2e1: e8a332 movi a3, 0x3e8 +4021e2e4: c02ef0 sub a2, a14, a15 +4021e2e7: 8ef901 l32r a0, 40201ecc +4021e2ea: 0000c0 callx0 a0 +4021e2ed: 023d mov.n a3, a2 +4021e2ef: ff3121 l32r a2, 4021dfb4 +4021e2f2: 150c movi.n a5, 1 +4021e2f4: 040c movi.n a4, 0 +4021e2f6: 973001 l32r a0, 40203fb8 +4021e2f9: 0000c0 callx0 a0 +4021e2fc: 4d38 l32i.n a3, a13, 16 +4021e2fe: d37821 l32r a2, 402130e0 +4021e301: 102320 and a2, a3, a2 +4021e304: 00a232 movi a3, 0x200 +4021e307: 111237 beq a2, a3, 4021e31c +4021e30a: ff0d31 l32r a3, 4021df40 +4021e30d: ff0d21 l32r a2, 4021df44 +4021e310: 49a242 movi a4, 0x249 +4021e313: d8d401 l32r a0, 40214664 +4021e316: 0000c0 callx0 a0 +4021e319: ffff06 j 4021e319 +4021e31c: 081d32 l16ui a3, a13, 16 +4021e31f: e81221 l32r a2, 40218368 +4021e322: 103320 and a3, a3, a2 +4021e325: 00a422 movi a2, 0x400 +4021e328: 202320 or a2, a3, a2 +4021e32b: 085d22 s16i a2, a13, 16 +4021e32e: 000106 j 4021e336 +4021e331: ffb1c5 call0 4021de50 +4021e334: 1c0c movi.n a12, 1 +4021e336: 74c0c0 extui a12, a12, 0, 8 +4021e339: 055c16 beqz a12, 4021e392 +4021e33c: 4d28 l32i.n a2, a13, 16 +4021e33e: e80a41 l32r a4, 40218368 +4021e341: 1062d7 bbci a2, 13, 4021e355 +4021e344: 081d32 l16ui a3, a13, 16 +4021e347: 102430 and a2, a4, a3 +4021e34a: 00a632 movi a3, 0x600 +4021e34d: 202230 or a2, a2, a3 +4021e350: 0001c6 j 4021e35b +4021e353: 220000 excw +4021e356: 081d mov.n a1, a8 +4021e358: 102420 and a2, a4, a2 +4021e35b: feb931 l32r a3, 4021de40 +4021e35e: 085d22 s16i a2, a13, 16 +4021e361: 000322 l8ui a2, a3, 0 +4021e364: 021226 beqi a2, 1, 4021e36a +4021e367: 0048c6 j 4021e48e +4021e36a: ff0fd1 l32r a13, 4021dfa8 +4021e36d: 0d2d mov.n a2, a13 +4021e36f: 028405 call0 40220bb0 +4021e372: ff0bc1 l32r a12, 4021dfa0 +4021e375: 0c2d mov.n a2, a12 +4021e377: 971101 l32r a0, 40203fbc +4021e37a: 0000c0 callx0 a0 +4021e37d: 150c movi.n a5, 1 +4021e37f: 054d mov.n a4, a5 +4021e381: 0d3d mov.n a3, a13 +4021e383: 202cc0 or a2, a12, a12 +4021e386: 970c01 l32r a0, 40203fb8 +4021e389: 0000c0 callx0 a0 +4021e38c: 003f86 j 4021e48e +4021e38f: 000000 ill +4021e392: 030c movi.n a3, 0 +4021e394: 032d mov.n a2, a3 +4021e396: ff0a01 l32r a0, 4021dfc0 +4021e399: 0000c0 callx0 a0 +4021e39c: fea931 l32r a3, 4021de40 +4021e39f: 000322 l8ui a2, a3, 0 +4021e3a2: 021226 beqi a2, 1, 4021e3a8 +4021e3a5: 003ec6 j 4021e4a4 +4021e3a8: 2c0d22 l8ui a2, a13, 44 +4021e3ab: 049256 bnez a2, 4021e3f8 +4021e3ae: cadf21 l32r a2, 40210f2c +4021e3b1: 0d38 l32i.n a3, a13, 0 +4021e3b3: 0020c0 memw +4021e3b6: 0248 l32i.n a4, a2, 0 +4021e3b8: 012d22 l32i a2, a13, 4 +4021e3bb: c02420 sub a2, a4, a2 +4021e3be: fed585 call0 4021d118 +4021e3c1: 8feb31 l32r a3, 40202370 +4021e3c4: 0020c0 memw +4021e3c7: 0348 l32i.n a4, a3, 0 +4021e3c9: 2d38 l32i.n a3, a13, 8 +4021e3cb: c03340 sub a3, a3, a4 +4021e3ce: ca5341 l32r a4, 40210d1c +4021e3d1: 232a add.n a2, a3, a2 +4021e3d3: 0438 l32i.n a3, a4, 0 +4021e3d5: 332a add.n a3, a3, a2 +4021e3d7: 0439 s32i.n a3, a4, 0 +4021e3d9: 96bd31 l32r a3, 40203ed0 +4021e3dc: 000352 l8ui a5, a3, 0 +4021e3df: 1132e0 slli a3, a2, 2 +4021e3e2: 432a add.n a4, a3, a2 +4021e3e4: 458c beqz.n a5, 4021e3ec +4021e3e6: 1124f0 slli a2, a4, 1 +4021e3e9: 414520 srli a4, a2, 5 +4021e3ec: 3d38 l32i.n a3, a13, 12 +4021e3ee: 243a add.n a2, a4, a3 +4021e3f0: d8e331 l32r a3, 4021477c +4021e3f3: 0020c0 memw +4021e3f6: 0329 s32i.n a2, a3, 0 +4021e3f8: fef021 l32r a2, 4021dfb8 +4021e3fb: 0020c0 memw +4021e3fe: 0228 l32i.n a2, a2, 0 +4021e400: 143020 extui a3, a2, 0, 2 +4021e403: 23dc bnez.n a3, 4021e419 +4021e405: fece31 l32r a3, 4021df40 +4021e408: fecf21 l32r a2, 4021df44 +4021e40b: 7fa142 movi a4, 0x17f +4021e40e: d89501 l32r a0, 40214664 +4021e411: 0000c0 callx0 a0 +4021e414: ffff06 j 4021e414 +4021e417: 070000 excw +4021e41a: 210762 l8ui a6, a7, 33 +4021e41d: 6f .byte 0x6f +4021e41e: 20c0d7 bnall a0, a13, 4021e442 +4021e421: 022800 excw +4021e424: 4d38 l32i.n a3, a13, 16 +4021e426: d32e21 l32r a2, 402130e0 +4021e429: 102320 and a2, a3, a2 +4021e42c: 00a432 movi a3, 0x400 +4021e42f: 121237 beq a2, a3, 4021e445 +4021e432: fec331 l32r a3, 4021df40 +4021e435: fec321 l32r a2, 4021df44 +4021e438: 8aa142 movi a4, 0x18a +4021e43b: d88a01 l32r a0, 40214664 +4021e43e: 0000c0 callx0 a0 +4021e441: ffff06 j 4021e441 +4021e444: ac0500 excw +4021e447: ff .byte 0xff +4021e448: fed6d1 l32r a13, 4021dfa0 +4021e44b: 0d2d mov.n a2, a13 +4021e44d: 96db01 l32r a0, 40203fbc +4021e450: 0000c0 callx0 a0 +4021e453: fed5c1 l32r a12, 4021dfa8 +4021e456: 150c movi.n a5, 1 +4021e458: 0d2d mov.n a2, a13 +4021e45a: 054d mov.n a4, a5 +4021e45c: 0c3d mov.n a3, a12 +4021e45e: 96d601 l32r a0, 40203fb8 +4021e461: 0000c0 callx0 a0 +4021e464: 0c2d mov.n a2, a12 +4021e466: 027485 call0 40220bb0 +4021e469: 000ac6 j 4021e498 +4021e46c: 4d28 l32i.n a2, a13, 16 +4021e46e: e7be41 l32r a4, 40218368 +4021e471: 1062d7 bbci a2, 13, 4021e485 +4021e474: 081d32 l16ui a3, a13, 16 +4021e477: 102430 and a2, a4, a3 +4021e47a: 00a632 movi a3, 0x600 +4021e47d: 202230 or a2, a2, a3 +4021e480: 0001c6 j 4021e48b +4021e483: 220000 excw +4021e486: 081d mov.n a1, a8 +4021e488: 102420 and a2, a4, a2 +4021e48b: 085d22 s16i a2, a13, 16 +4021e48e: 030c movi.n a3, 0 +4021e490: 032d mov.n a2, a3 +4021e492: fecb01 l32r a0, 4021dfc0 +4021e495: 0000c0 callx0 a0 +4021e498: feac21 l32r a2, 4021df48 +4021e49b: 002222 l32i a2, a2, 0 +4021e49e: 002216 beqz a2, 4021e4a4 +4021e4a1: 0002c0 callx0 a2 +4021e4a4: 9b7f01 l32r a0, 402052a0 +4021e4a7: 0000c0 callx0 a0 +4021e4aa: 968921 l32r a2, 40203ed0 +4021e4ad: d8b231 l32r a3, 40214778 +4021e4b0: 000242 l8ui a4, a2, 0 +4021e4b3: 8fb421 l32r a2, 40202384 +4021e4b6: 0020c0 memw +4021e4b9: 0228 l32i.n a2, a2, 0 +4021e4bb: 548c beqz.n a4, 4021e4c4 +4021e4bd: 50c222 addi a2, a2, 80 +4021e4c0: 0000c6 j 4021e4c7 +4021e4c3: d22200 excw +4021e4c6: b10805 call0 401cf548 <_lit4_end+0xc921c> +4021e4c9: a1c8 l32i.n a12, a1, 40 +4021e4cb: 91d8 l32i.n a13, a1, 36 +4021e4cd: 81e8 l32i.n a14, a1, 32 +4021e4cf: 71f8 l32i.n a15, a1, 28 +4021e4d1: 0020c0 memw +4021e4d4: 0329 s32i.n a2, a3, 0 +4021e4d6: 30c112 addi a1, a1, 48 +4021e4d9: f00d ret.n + ... + +4021e4dc : +4021e4dc: f0c112 addi a1, a1, -16 +4021e4df: fe5921 l32r a2, 4021de44 +4021e4e2: 21c9 s32i.n a12, a1, 8 +4021e4e4: 3109 s32i.n a0, a1, 12 +4021e4e6: 4238 l32i.n a3, a2, 16 +4021e4e8: 20c220 or a12, a2, a2 +4021e4eb: 3163d7 bbci a3, 13, 4021e520 +4021e4ee: 007945 call0 4021ec84 +4021e4f1: b2ec bnez.n a2, 4021e520 +4021e4f3: fe5321 l32r a2, 4021de40 +4021e4f6: 000222 l8ui a2, a2, 0 +4021e4f9: 232266 bnei a2, 2, 4021e520 +4021e4fc: 4c38 l32i.n a3, a12, 16 +4021e4fe: d2f821 l32r a2, 402130e0 +4021e501: 102320 and a2, a3, a2 +4021e504: 00a432 movi a3, 0x400 +4021e507: 159237 bne a2, a3, 4021e520 +4021e50a: 030c movi.n a3, 0 +4021e50c: 032d mov.n a2, a3 +4021e50e: feac01 l32r a0, 4021dfc0 +4021e511: 0000c0 callx0 a0 +4021e514: fea821 l32r a2, 4021dfb4 +4021e517: 96a901 l32r a0, 40203fbc +4021e51a: 0000c0 callx0 a0 +4021e51d: ff9e85 call0 4021df08 +4021e520: 3108 l32i.n a0, a1, 12 +4021e522: 21c8 l32i.n a12, a1, 8 +4021e524: 10c112 addi a1, a1, 16 +4021e527: f00d ret.n +4021e529: 000000 ill +4021e52c: 21dfc4 excw +4021e52f: 40 .byte 0x40 + +4021e530 : +4021e530: f0c112 addi a1, a1, -16 +4021e533: 036102 s32i a0, a1, 12 +4021e536: 0161d2 s32i a13, a1, 4 +4021e539: 21c9 s32i.n a12, a1, 8 +4021e53b: 02dd mov.n a13, a2 +4021e53d: f34bc5 call0 402119fc +4021e540: f34b85 call0 402119fc +4021e543: 229c beqz.n a2, 4021e559 +4021e545: fe7e31 l32r a3, 4021df40 +4021e548: fe7f21 l32r a2, 4021df44 +4021e54b: fca242 movi a4, 0x2fc +4021e54e: d84501 l32r a0, 40214664 +4021e551: 0000c0 callx0 a0 +4021e554: ffff06 j 4021e554 +4021e557: 850000 extui a0, a0, 16, 9 +4021e55a: 9c0072 l8ui a7, a0, 156 +4021e55d: 783102 excw +4021e560: fe .byte 0xfe +4021e561: fe7821 l32r a2, 4021df44 +4021e564: fda242 movi a4, 0x2fd +4021e567: d83f01 l32r a0, 40214664 +4021e56a: 0000c0 callx0 a0 +4021e56d: ffff06 j 4021e56d +4021e570: fe35c1 l32r a12, 4021de44 +4021e573: fea022 movi a2, 254 +4021e576: 4c38 l32i.n a3, a12, 16 +4021e578: 4163d7 bbci a3, 13, 4021e5bd +4021e57b: d2d921 l32r a2, 402130e0 +4021e57e: 00a642 movi a4, 0x600 +4021e581: 103320 and a3, a3, a2 +4021e584: ffa022 movi a2, 255 +4021e587: 329347 bne a3, a4, 4021e5bd +4021e58a: 2e0c32 l8ui a3, a12, 46 +4021e58d: 020c movi.n a2, 0 +4021e58f: 2a1327 beq a3, a2, 4021e5bd +4021e592: 8f7721 l32r a2, 40202370 +4021e595: 030c movi.n a3, 0 +4021e597: 0020c0 memw +4021e59a: 0228 l32i.n a2, a2, 0 +4021e59c: 5cd9 s32i.n a13, a12, 20 +4021e59e: 2c29 s32i.n a2, a12, 8 +4021e5a0: ffe321 l32r a2, 4021e52c +4021e5a3: fe8701 l32r a0, 4021dfc0 +4021e5a6: 0000c0 callx0 a0 +4021e5a9: 081c32 l16ui a3, a12, 16 +4021e5ac: e76f21 l32r a2, 40218368 +4021e5af: 103320 and a3, a3, a2 +4021e5b2: 00a222 movi a2, 0x200 +4021e5b5: 202320 or a2, a3, a2 +4021e5b8: 085c22 s16i a2, a12, 16 +4021e5bb: 020c movi.n a2, 0 +4021e5bd: 3108 l32i.n a0, a1, 12 +4021e5bf: 21c8 l32i.n a12, a1, 8 +4021e5c1: 11d8 l32i.n a13, a1, 4 +4021e5c3: 10c112 addi a1, a1, 16 +4021e5c6: f00d ret.n +4021e5c8: fd4a add.n a15, a13, a4 +4021e5ca: 22 .byte 0x22 +4021e5cb: 40 .byte 0x40 + +4021e5cc : +4021e5cc: f0c112 addi a1, a1, -16 +4021e5cf: 0261c2 s32i a12, a1, 8 +4021e5d2: fe1cc1 l32r a12, 4021de44 +4021e5d5: 0161d2 s32i a13, a1, 4 +4021e5d8: 3109 s32i.n a0, a1, 12 +4021e5da: 4c28 l32i.n a2, a12, 16 +4021e5dc: ea6fd1 l32r a13, 40218f98 +4021e5df: 4582d7 bany a2, a13, 4021e628 +4021e5e2: 006a05 call0 4021ec84 +4021e5e5: 128c beqz.n a2, 4021e5ea +4021e5e7: 012d85 call0 4021f8c0 +4021e5ea: 081c22 l16ui a2, a12, 16 +4021e5ed: 030c movi.n a3, 0 +4021e5ef: 202d20 or a2, a13, a2 +4021e5f2: 085c22 s16i a2, a12, 16 +4021e5f5: 032d mov.n a2, a3 +4021e5f7: fe7201 l32r a0, 4021dfc0 +4021e5fa: 0000c0 callx0 a0 +4021e5fd: 4c48 l32i.n a4, a12, 16 +4021e5ff: 2e0c32 l8ui a3, a12, 46 +4021e602: fff121 l32r a2, 4021e5c8 +4021e605: 244940 extui a4, a4, 9, 3 +4021e608: 8e9101 l32r a0, 4020204c +4021e60b: 0000c0 callx0 a0 +4021e60e: 4c38 l32i.n a3, a12, 16 +4021e610: d2b421 l32r a2, 402130e0 +4021e613: 118327 bany a3, a2, 4021e628 +4021e616: 081c32 l16ui a3, a12, 16 +4021e619: e75321 l32r a2, 40218368 +4021e61c: 103320 and a3, a3, a2 +4021e61f: 00a622 movi a2, 0x600 +4021e622: 202320 or a2, a3, a2 +4021e625: 085c22 s16i a2, a12, 16 +4021e628: 3108 l32i.n a0, a1, 12 +4021e62a: 21c8 l32i.n a12, a1, 8 +4021e62c: 11d8 l32i.n a13, a1, 4 +4021e62e: 10c112 addi a1, a1, 16 +4021e631: f00d ret.n +4021e633: fd8b00 excw +4021e636: 7a4022 s8i a2, a0, 122 +4021e639: 22fd excw +4021e63b: fd7040 excw +4021e63e: 6e4022 s8i a2, a0, 110 +4021e641: 22fd excw +4021e643: 40 .byte 0x40 + +4021e644 : +4021e644: e0c112 addi a1, a1, -32 +4021e647: 51d9 s32i.n a13, a1, 20 +4021e649: 7109 s32i.n a0, a1, 28 +4021e64b: 61c9 s32i.n a12, a1, 24 +4021e64d: 41e9 s32i.n a14, a1, 16 +4021e64f: 31f9 s32i.n a15, a1, 12 +4021e651: 74d020 extui a13, a2, 0, 8 +4021e654: cdec bnez.n a13, 4021e684 +4021e656: fe52c1 l32r a12, 4021dfa0 +4021e659: 202cc0 or a2, a12, a12 +4021e65c: 965801 l32r a0, 40203fbc +4021e65f: 0000c0 callx0 a0 +4021e662: 150c movi.n a5, 1 +4021e664: 0c2d mov.n a2, a12 +4021e666: 054d mov.n a4, a5 +4021e668: 931c movi.n a3, 25 +4021e66a: 965301 l32r a0, 40203fb8 +4021e66d: 0000c0 callx0 a0 +4021e670: fdf521 l32r a2, 4021de44 +4021e673: 030c movi.n a3, 0 +4021e675: 2e4232 s8i a3, a2, 46 +4021e678: ffef21 l32r a2, 4021e634 +4021e67b: 8e7401 l32r a0, 4020204c +4021e67e: 0000c0 callx0 a0 +4021e681: 001ac6 j 4021e6f0 +4021e684: ffed21 l32r a2, 4021e638 +4021e687: 8e7101 l32r a0, 4020204c +4021e68a: 0000c0 callx0 a0 +4021e68d: 2d0b addi.n a2, a13, -1 +4021e68f: 742020 extui a2, a2, 0, 8 +4021e692: 5a22f6 bgeui a2, 2, 4021e6f0 +4021e695: fdebc1 l32r a12, 4021de44 +4021e698: 2e0c22 l8ui a2, a12, 46 +4021e69b: 4512d7 beq a2, a13, 4021e6e4 +4021e69e: fe40e1 l32r a14, 4021dfa0 +4021e6a1: 0e2d mov.n a2, a14 +4021e6a3: 1d1d66 bnei a13, 1, 4021e6c4 +4021e6a6: 964501 l32r a0, 40203fbc +4021e6a9: 0000c0 callx0 a0 +4021e6ac: fe3ff1 l32r a15, 4021dfa8 +4021e6af: 150c movi.n a5, 1 +4021e6b1: 0e2d mov.n a2, a14 +4021e6b3: 054d mov.n a4, a5 +4021e6b5: 0f3d mov.n a3, a15 +4021e6b7: 964001 l32r a0, 40203fb8 +4021e6ba: 0000c0 callx0 a0 +4021e6bd: 0f2d mov.n a2, a15 +4021e6bf: 0006c6 j 4021e6de +4021e6c2: 010000 slli a0, a0, 32 +4021e6c5: 3e .byte 0x3e +4021e6c6: 00c096 bltz a0, 4021e6d6 +4021e6c9: a05200 addx4 a5, a2, a0 +4021e6cc: 2ee001 l32r a0, 401ea24c <_lit4_end+0xe3f20> +4021e6cf: 455020 extui a5, a2, 16, 5 +4021e6d2: 931c20 movnez a1, a12, a2 +4021e6d5: 963801 l32r a0, 40203fb8 +4021e6d8: 0000c0 callx0 a0 +4021e6db: 64a022 movi a2, 100 +4021e6de: 024d05 call0 40220bb0 +4021e6e1: 2e4cd2 s8i a13, a12, 46 +4021e6e4: 2e0c32 l8ui a3, a12, 46 +4021e6e7: ffd521 l32r a2, 4021e63c +4021e6ea: 8e5801 l32r a0, 4020204c +4021e6ed: 0000c0 callx0 a0 +4021e6f0: ffd421 l32r a2, 4021e640 +4021e6f3: 8e5601 l32r a0, 4020204c +4021e6f6: 0000c0 callx0 a0 +4021e6f9: 7108 l32i.n a0, a1, 28 +4021e6fb: 61c8 l32i.n a12, a1, 24 +4021e6fd: 51d8 l32i.n a13, a1, 20 +4021e6ff: 41e8 l32i.n a14, a1, 16 +4021e701: 31f8 l32i.n a15, a1, 12 +4021e703: 20c112 addi a1, a1, 32 +4021e706: f00d ret.n + +4021e708 : +4021e708: fdcf21 l32r a2, 4021de44 +4021e70b: 2e0222 l8ui a2, a2, 46 +4021e70e: f00d ret.n +4021e710: 22fd21 l32r a2, 401e7304 <_lit4_end+0xe0fd8> +4021e713: fd1840 excw +4021e716: 104022 s8i a2, a0, 16 +4021e719: 22fd excw +4021e71b: 40 .byte 0x40 + +4021e71c : +4021e71c: f0c112 addi a1, a1, -16 +4021e71f: 21c9 s32i.n a12, a1, 8 +4021e721: 74c020 extui a12, a2, 0, 8 +4021e724: fffb21 l32r a2, 4021e710 +4021e727: 036102 s32i a0, a1, 12 +4021e72a: 8e4801 l32r a0, 4020204c +4021e72d: 0000c0 callx0 a0 +4021e730: fdc521 l32r a2, 4021de44 +4021e733: 9ccc bnez.n a12, 4021e740 +4021e735: 030c movi.n a3, 0 +4021e737: 2f4232 s8i a3, a2, 47 +4021e73a: fff621 l32r a2, 4021e714 +4021e73d: 0001c6 j 4021e748 +4021e740: 130c movi.n a3, 1 +4021e742: 2f4232 s8i a3, a2, 47 +4021e745: fff421 l32r a2, 4021e718 +4021e748: 8e4101 l32r a0, 4020204c +4021e74b: 0000c0 callx0 a0 +4021e74e: 3108 l32i.n a0, a1, 12 +4021e750: 21c8 l32i.n a12, a1, 8 +4021e752: 10c112 addi a1, a1, 16 +4021e755: f00d ret.n + ... + +4021e758 : +4021e758: fdbb21 l32r a2, 4021de44 +4021e75b: 2f0222 l8ui a2, a2, 47 +4021e75e: f00d ret.n +4021e760: df4c movi.n a15, 77 +4021e762: 21 .byte 0x21 +4021e763: 40 .byte 0x40 + +4021e764 : +4021e764: f0c112 addi a1, a1, -16 +4021e767: 21c9 s32i.n a12, a1, 8 +4021e769: fdb6c1 l32r a12, 4021de44 +4021e76c: 3109 s32i.n a0, a1, 12 +4021e76e: 11d9 s32i.n a13, a1, 4 +4021e770: 01e9 s32i.n a14, a1, 0 +4021e772: 081c32 l16ui a3, a12, 16 +4021e775: 420c movi.n a2, 4 +4021e777: 1d0c movi.n a13, 1 +4021e779: 202320 or a2, a3, a2 +4021e77c: 2022d0 or a2, a2, a13 +4021e77f: d37c movi.n a3, -3 +4021e781: 102230 and a2, a2, a3 +4021e784: 830c movi.n a3, 8 +4021e786: 202230 or a2, a2, a3 +4021e789: 085c22 s16i a2, a12, 16 +4021e78c: fff531 l32r a3, 4021e760 +4021e78f: fe0921 l32r a2, 4021dfb4 +4021e792: 2e0c movi.n a14, 2 +4021e794: 00a042 movi a4, 0 +4021e797: 2c4ce2 s8i a14, a12, 44 +4021e79a: 970601 l32r a0, 402043b4 +4021e79d: 0000c0 callx0 a0 +4021e7a0: 020c movi.n a2, 0 +4021e7a2: 2d4c22 s8i a2, a12, 45 +4021e7a5: 081c32 l16ui a3, a12, 16 +4021e7a8: a85a21 l32r a2, 40208910 +4021e7ab: 2e4ce2 s8i a14, a12, 46 +4021e7ae: 102320 and a2, a3, a2 +4021e7b1: 085c22 s16i a2, a12, 16 +4021e7b4: 124cd2 s8i a13, a12, 18 +4021e7b7: 3108 l32i.n a0, a1, 12 +4021e7b9: 21c8 l32i.n a12, a1, 8 +4021e7bb: 11d8 l32i.n a13, a1, 4 +4021e7bd: 01e8 l32i.n a14, a1, 0 +4021e7bf: 10c112 addi a1, a1, 16 +4021e7c2: f00d ret.n + +4021e7c4 : +4021e7c4: fda021 l32r a2, 4021de44 +4021e7c7: 040c movi.n a4, 0 +4021e7c9: 4238 l32i.n a3, a2, 16 +4021e7cb: d24521 l32r a2, 402130e0 +4021e7ce: 150c movi.n a5, 1 +4021e7d0: 103320 and a3, a3, a2 +4021e7d3: fad322 addmi a2, a3, 0xfffffa00 +4021e7d6: 046d mov.n a6, a4 +4021e7d8: 836520 moveqz a6, a5, a2 +4021e7db: 834530 moveqz a4, a5, a3 +4021e7de: 202640 or a2, a6, a4 +4021e7e1: f00d ret.n + ... + +4021e7e4 : +4021e7e4: fd9821 l32r a2, 4021de44 +4021e7e7: 140c movi.n a4, 1 +4021e7e9: 4238 l32i.n a3, a2, 16 +4021e7eb: d23d21 l32r a2, 402130e0 +4021e7ee: 102320 and a2, a3, a2 +4021e7f1: fcd232 addmi a3, a2, 0xfffffc00 +4021e7f4: 020c movi.n a2, 0 +4021e7f6: 832430 moveqz a2, a4, a3 +4021e7f9: f00d ret.n +4021e7fb: fd5f00 excw +4021e7fe: 22 .byte 0x22 +4021e7ff: 40 .byte 0x40 + +4021e800 : +4021e800: f0c112 addi a1, a1, -16 +4021e803: 21c9 s32i.n a12, a1, 8 +4021e805: fd8fc1 l32r a12, 4021de44 +4021e808: 3109 s32i.n a0, a1, 12 +4021e80a: 4c28 l32i.n a2, a12, 16 +4021e80c: 5c62d7 bbci a2, 13, 4021e86c +4021e80f: 030c movi.n a3, 0 +4021e811: 032d mov.n a2, a3 +4021e813: fdeb01 l32r a0, 4021dfc0 +4021e816: 0000c0 callx0 a0 +4021e819: fd8921 l32r a2, 4021de40 +4021e81c: 000222 l8ui a2, a2, 0 +4021e81f: 112266 bnei a2, 2, 4021e834 +4021e822: fffc05 call0 4021e7e4 +4021e825: 00b216 beqz a2, 4021e834 +4021e828: fde321 l32r a2, 4021dfb4 +4021e82b: 95e401 l32r a0, 40203fbc +4021e82e: 0000c0 callx0 a0 +4021e831: ff6d45 call0 4021df08 +4021e834: 4c38 l32i.n a3, a12, 16 +4021e836: fff121 l32r a2, 4021e7fc +4021e839: 243930 extui a3, a3, 9, 3 +4021e83c: 8e0401 l32r a0, 4020204c +4021e83f: 0000c0 callx0 a0 +4021e842: 081c32 l16ui a3, a12, 16 +4021e845: a83221 l32r a2, 40208910 +4021e848: 103320 and a3, a3, a2 +4021e84b: 3fae22 movi a2, 0xfffffe3f +4021e84e: 102320 and a2, a3, a2 +4021e851: 085c22 s16i a2, a12, 16 +4021e854: 020c movi.n a2, 0 +4021e856: 2c29 s32i.n a2, a12, 8 +4021e858: 4c38 l32i.n a3, a12, 16 +4021e85a: d22121 l32r a2, 402130e0 +4021e85d: 0b0327 bnone a3, a2, 4021e86c +4021e860: 081c32 l16ui a3, a12, 16 +4021e863: e6c121 l32r a2, 40218368 +4021e866: 102320 and a2, a3, a2 +4021e869: 085c22 s16i a2, a12, 16 +4021e86c: 3108 l32i.n a0, a1, 12 +4021e86e: 21c8 l32i.n a12, a1, 8 +4021e870: 10c112 addi a1, a1, 16 +4021e873: f00d ret.n +4021e875: 000000 ill + +4021e878 : +4021e878: fd7321 l32r a2, 4021de44 +4021e87b: 4228 l32i.n a2, a2, 16 +4021e87d: 042d20 extui a2, a2, 13, 1 +4021e880: f00d ret.n + ... + +4021e884 : +4021e884: fdb131 l32r a3, 4021df48 +4021e887: 0329 s32i.n a2, a3, 0 +4021e889: f00d ret.n +4021e88b: dd7800 excw +4021e88e: fe .byte 0xfe +4021e88f: 3f .byte 0x3f +4021e890: ffff31 l32r a3, 4021e88c +4021e893: 020c movi.n a2, 0 +4021e895: 320342 l8ui a4, a3, 50 +4021e898: 281427 beq a4, a2, 4021e8c4 +4021e89b: 8eb521 l32r a2, 40202370 +4021e89e: 410352 l8ui a5, a3, 65 +4021e8a1: 0020c0 memw +4021e8a4: 0248 l32i.n a4, a2, 0 +4021e8a6: 5328 l32i.n a2, a3, 20 +4021e8a8: c04240 sub a4, a2, a4 +4021e8ab: b328 l32i.n a2, a3, 44 +4021e8ad: 825520 mull a5, a5, a2 +4021e8b0: 020c movi.n a2, 0 +4021e8b2: 0e3547 bltu a5, a4, 4021e8c4 +4021e8b5: 132322 l32i a2, a3, 76 +4021e8b8: 141352 l16ui a5, a3, 40 +4021e8bb: 352a add.n a3, a5, a2 +4021e8bd: 042d mov.n a2, a4 +4021e8bf: 013347 bltu a3, a4, 4021e8c4 +4021e8c2: 020c movi.n a2, 0 +4021e8c4: f00d ret.n + ... + +4021e8c8 : +4021e8c8: f00d ret.n +4021e8ca: e00000 subx4 a0, a0, a0 +4021e8cd: fedd excw +4021e8cf: 3f .byte 0x3f +4021e8d0: ddcc bnez.n a13, 4021e8e1 +4021e8d2: fe .byte 0xfe +4021e8d3: 3f .byte 0x3f +4021e8d4: e0c112 addi a1, a1, -32 +4021e8d7: 61c9 s32i.n a12, a1, 24 +4021e8d9: 8ea521 l32r a2, 40202370 +4021e8dc: ffecc1 l32r a12, 4021e88c +4021e8df: 51d9 s32i.n a13, a1, 20 +4021e8e1: 7109 s32i.n a0, a1, 28 +4021e8e3: 41e9 s32i.n a14, a1, 16 +4021e8e5: 31f9 s32i.n a15, a1, 12 +4021e8e7: 0020c0 memw +4021e8ea: 02d8 l32i.n a13, a2, 0 +4021e8ec: 181c32 l16ui a3, a12, 48 +4021e8ef: e69e21 l32r a2, 40218368 +4021e8f2: 103320 and a3, a3, a2 +4021e8f5: bb8b21 l32r a2, 4020d724 +4021e8f8: 202320 or a2, a3, a2 +4021e8fb: 185c22 s16i a2, a12, 48 +4021e8fe: 320c22 l8ui a2, a12, 50 +4021e901: 094216 beqz a2, 4021e999 +4021e904: 040c movi.n a4, 0 +4021e906: 6ca8 l32i.n a10, a12, 24 +4021e908: 4c58 l32i.n a5, a12, 16 +4021e90a: 5c78 l32i.n a7, a12, 20 +4021e90c: 410c62 l8ui a6, a12, 65 +4021e90f: bc38 l32i.n a3, a12, 44 +4021e911: 048d mov.n a8, a4 +4021e913: 042d mov.n a2, a4 +4021e915: 04bd mov.n a11, a4 +4021e917: 049d mov.n a9, a4 +4021e919: 64a0f2 movi a15, 100 +4021e91c: c0e5d0 sub a14, a5, a13 +4021e91f: 2bb3e7 bgeu a3, a14, 4021e94e +4021e922: e53a add.n a14, a5, a3 +4021e924: 82a630 mull a10, a6, a3 +4021e927: c0b7e0 sub a11, a7, a14 +4021e92a: 04bab7 bgeu a10, a11, 4021e932 +4021e92d: 77aa add.n a7, a7, a10 +4021e92f: 01a022 movi a2, 1 +4021e932: 991b addi.n a9, a9, 1 +4021e934: 0c99f7 bne a9, a15, 4021e944 +4021e937: 26cc bnez.n a6, 4021e93d +4021e939: 180c movi.n a8, 1 +4021e93b: 086d mov.n a6, a8 +4021e93d: 33cc bnez.n a3, 4021e944 +4021e93f: 9afd31 l32r a3, 40205534 +4021e942: 140c movi.n a4, 1 +4021e944: 05ad mov.n a10, a5 +4021e946: 1b0c movi.n a11, 1 +4021e948: 0e5d mov.n a5, a14 +4021e94a: fff386 j 4021e91c +4021e94d: 2b8c00 excw +4021e950: 6ca9 s32i.n a10, a12, 24 +4021e952: 4c59 s32i.n a5, a12, 16 +4021e954: 028c beqz.n a2, 4021e958 +4021e956: 5c79 s32i.n a7, a12, 20 +4021e958: 188c beqz.n a8, 4021e95d +4021e95a: 414c62 s8i a6, a12, 65 +4021e95d: 048c beqz.n a4, 4021e961 +4021e95f: bc39 s32i.n a3, a12, 44 +4021e961: ffda21 l32r a2, 4021e8cc +4021e964: 959601 l32r a0, 40203fbc +4021e967: 0000c0 callx0 a0 +4021e96a: ffd9e1 l32r a14, 4021e8d0 +4021e96d: 0e2d mov.n a2, a14 +4021e96f: 959301 l32r a0, 40203fbc +4021e972: 0000c0 callx0 a0 +4021e975: 4c38 l32i.n a3, a12, 16 +4021e977: 142c22 l32i a2, a12, 80 +4021e97a: 232a add.n a2, a3, a2 +4021e97c: c0d2d0 sub a13, a2, a13 +4021e97f: 132c22 l32i a2, a12, 76 +4021e982: e8a332 movi a3, 0x3e8 +4021e985: c02d20 sub a2, a13, a2 +4021e988: 8d5101 l32r a0, 40201ecc +4021e98b: 0000c0 callx0 a0 +4021e98e: 023d mov.n a3, a2 +4021e990: 150c movi.n a5, 1 +4021e992: 040c movi.n a4, 0 +4021e994: 0e2d mov.n a2, a14 +4021e996: 000706 j 4021e9b6 +4021e999: ffcc21 l32r a2, 4021e8cc +4021e99c: 958801 l32r a0, 40203fbc +4021e99f: 0000c0 callx0 a0 +4021e9a2: ffcbc1 l32r a12, 4021e8d0 +4021e9a5: 0c2d mov.n a2, a12 +4021e9a7: 958501 l32r a0, 40203fbc +4021e9aa: 0000c0 callx0 a0 +4021e9ad: 150c movi.n a5, 1 +4021e9af: 040c movi.n a4, 0 +4021e9b1: 69a032 movi a3, 105 +4021e9b4: 0c2d mov.n a2, a12 +4021e9b6: 958001 l32r a0, 40203fb8 +4021e9b9: 0000c0 callx0 a0 +4021e9bc: 7108 l32i.n a0, a1, 28 +4021e9be: 61c8 l32i.n a12, a1, 24 +4021e9c0: 51d8 l32i.n a13, a1, 20 +4021e9c2: 41e8 l32i.n a14, a1, 16 +4021e9c4: 31f8 l32i.n a15, a1, 12 +4021e9c6: 20c112 addi a1, a1, 32 +4021e9c9: f00d ret.n +4021e9cb: ddf400 excw +4021e9ce: fe .byte 0xfe +4021e9cf: 3f .byte 0x3f +4021e9d0: f0c112 addi a1, a1, -16 +4021e9d3: 21c9 s32i.n a12, a1, 8 +4021e9d5: fffdc1 l32r a12, 4021e9cc +4021e9d8: 3109 s32i.n a0, a1, 12 +4021e9da: 0c2d mov.n a2, a12 +4021e9dc: 957801 l32r a0, 40203fbc +4021e9df: 0000c0 callx0 a0 +4021e9e2: 0c2d mov.n a2, a12 +4021e9e4: 150c movi.n a5, 1 +4021e9e6: 040c movi.n a4, 0 +4021e9e8: 733c movi.n a3, 55 +4021e9ea: 957301 l32r a0, 40203fb8 +4021e9ed: 0000c0 callx0 a0 +4021e9f0: 3108 l32i.n a0, a1, 12 +4021e9f2: 21c8 l32i.n a12, a1, 8 +4021e9f4: 10c112 addi a1, a1, 16 +4021e9f7: f00d ret.n +4021e9f9: 000000 ill +4021e9fc: fe8055 excw +4021e9ff: 3f .byte 0x3f +4021ea00: f0c112 addi a1, a1, -16 +4021ea03: fffe21 l32r a2, 4021e9fc +4021ea06: 3109 s32i.n a0, a1, 12 +4021ea08: 21c9 s32i.n a12, a1, 8 +4021ea0a: 000222 l8ui a2, a2, 0 +4021ea0d: 581266 bnei a2, 1, 4021ea69 +4021ea10: ff9fc1 l32r a12, 4021e88c +4021ea13: e00c22 l8ui a2, a12, 224 +4021ea16: 1022f6 bgeui a2, 2, 4021ea2a +4021ea19: 030c movi.n a3, 0 +4021ea1b: 220c movi.n a2, 2 +4021ea1d: fee445 call0 4021d864 +4021ea20: 220c movi.n a2, 2 +4021ea22: e04c22 s8i a2, a12, 224 +4021ea25: 000286 j 4021ea33 +4021ea28: 320000 excw +4021ea2b: 2201a0 excw +4021ea2e: 0502a0 extui a0, a10, 18, 1 +4021ea31: 01fee3 excw +4021ea34: 9a1c movi.n a10, 25 +4021ea36: 0000c0 callx0 a0 +4021ea39: 020c movi.n a2, 0 +4021ea3b: d67101 l32r a0, 40214400 +4021ea3e: 0000c0 callx0 a0 +4021ea41: 01fac5 call0 402209f0 +4021ea44: e10c22 l8ui a2, a12, 225 +4021ea47: 391266 bnei a2, 1, 4021ea84 +4021ea4a: c86f31 l32r a3, 40210c08 +4021ea4d: 0020c0 memw +4021ea50: 0348 l32i.n a4, a3, 0 +4021ea52: 202420 or a2, a4, a2 +4021ea55: 0020c0 memw +4021ea58: 006322 s32i a2, a3, 0 +4021ea5b: a0a022 movi a2, 160 +4021ea5e: c86b01 l32r a0, 40210c0c +4021ea61: 0000c0 callx0 a0 +4021ea64: 000706 j 4021ea84 +4021ea67: 660000 excw +4021ea6a: 221722 l16ui a2, a7, 68 +4021ea6d: 0101a0 slli a0, a1, 22 +4021ea70: c0d664 excw +4021ea73: 0c0000 excw +4021ea76: 820c03 excw +4021ea79: fede85 call0 4021d864 +4021ea7c: 020c movi.n a2, 0 +4021ea7e: d66001 l32r a0, 40214400 +4021ea81: 0000c0 callx0 a0 +4021ea84: fcf121 l32r a2, 4021de48 +4021ea87: 000232 l8ui a3, a2, 0 +4021ea8a: 091366 bnei a3, 1, 4021ea97 +4021ea8d: 030c movi.n a3, 0 +4021ea8f: 004232 s8i a3, a2, 0 +4021ea92: 020c movi.n a2, 0 +4021ea94: fb0085 call0 40219aa0 +4021ea97: fced21 l32r a2, 4021de4c +4021ea9a: 000232 l8ui a3, a2, 0 +4021ea9d: 0b1366 bnei a3, 1, 4021eaac +4021eaa0: 030c movi.n a3, 0 +4021eaa2: 004232 s8i a3, a2, 0 +4021eaa5: 130c movi.n a3, 1 +4021eaa7: 032d mov.n a2, a3 +4021eaa9: f98c85 call0 40218374 +4021eaac: 3108 l32i.n a0, a1, 12 +4021eaae: 21c8 l32i.n a12, a1, 8 +4021eab0: 10c112 addi a1, a1, 16 +4021eab3: f00d ret.n +4021eab5: 000000 ill +4021eab8: fe0a add.n a15, a14, a0 +4021eaba: 9d4022 s8i a2, a0, 157 +4021eabd: 3ffe87 bbsi a14, 24, 4021eb00 +4021eac0: fe8630 excw +4021eac3: 3f .byte 0x3f +4021eac4: f0c112 addi a1, a1, -16 +4021eac7: 11d9 s32i.n a13, a1, 4 +4021eac9: 02dd mov.n a13, a2 +4021eacb: 21c9 s32i.n a12, a1, 8 +4021eacd: 3109 s32i.n a0, a1, 12 +4021eacf: 01e9 s32i.n a14, a1, 0 +4021ead1: fff2c5 call0 4021ea00 +4021ead4: ff6ec1 l32r a12, 4021e88c +4021ead7: 2a8d26 beqi a13, 8, 4021eb05 +4021eada: 4cbd66 bnei a13, 16, 4021eb2a +4021eadd: cc28 l32i.n a2, a12, 48 +4021eadf: 4762d7 bbci a2, 13, 4021eb2a +4021eae2: ff7ae1 l32r a14, 4021e8cc +4021eae5: 0e2d mov.n a2, a14 +4021eae7: 953501 l32r a0, 40203fbc +4021eaea: 0000c0 callx0 a0 +4021eaed: 181c32 l16ui a3, a12, 48 +4021eaf0: a01c21 l32r a2, 40206b60 +4021eaf3: 150c movi.n a5, 1 +4021eaf5: 202320 or a2, a3, a2 +4021eaf8: 185c22 s16i a2, a12, 48 +4021eafb: 040c movi.n a4, 0 +4021eafd: a30c movi.n a3, 10 +4021eaff: 0007c6 j 4021eb22 +4021eb02: 000000 ill +4021eb05: ff72e1 l32r a14, 4021e8d0 +4021eb08: 0e2d mov.n a2, a14 +4021eb0a: 952c01 l32r a0, 40203fbc +4021eb0d: 0000c0 callx0 a0 +4021eb10: 142c22 l32i a2, a12, 80 +4021eb13: e8a332 movi a3, 0x3e8 +4021eb16: 8ced01 l32r a0, 40201ecc +4021eb19: 0000c0 callx0 a0 +4021eb1c: 150c movi.n a5, 1 +4021eb1e: 040c movi.n a4, 0 +4021eb20: 023d mov.n a3, a2 +4021eb22: 0e2d mov.n a2, a14 +4021eb24: 952501 l32r a0, 40203fb8 +4021eb27: 0000c0 callx0 a0 +4021eb2a: cc38 l32i.n a3, a12, 48 +4021eb2c: d16d21 l32r a2, 402130e0 +4021eb2f: 102320 and a2, a3, a2 +4021eb32: 00a632 movi a3, 0x600 +4021eb35: 0f1237 beq a2, a3, 4021eb48 +4021eb38: cc38 l32i.n a3, a12, 48 +4021eb3a: ffdf21 l32r a2, 4021eab8 +4021eb3d: 0d4d mov.n a4, a13 +4021eb3f: 243930 extui a3, a3, 9, 3 +4021eb42: 8d4201 l32r a0, 4020204c +4021eb45: 0000c0 callx0 a0 +4021eb48: cc38 l32i.n a3, a12, 48 +4021eb4a: d16521 l32r a2, 402130e0 +4021eb4d: 00a642 movi a4, 0x600 +4021eb50: 102320 and a2, a3, a2 +4021eb53: 111247 beq a2, a4, 4021eb68 +4021eb56: ffd931 l32r a3, 4021eabc +4021eb59: ffd921 l32r a2, 4021eac0 +4021eb5c: 90a242 movi a4, 0x290 +4021eb5f: d6c101 l32r a0, 40214664 +4021eb62: 0000c0 callx0 a0 +4021eb65: ffff06 j 4021eb65 +4021eb68: e60041 l32r a4, 40218368 +4021eb6b: 0e63d7 bbci a3, 13, 4021eb7d +4021eb6e: 181c32 l16ui a3, a12, 48 +4021eb71: 102430 and a2, a4, a3 +4021eb74: 96a631 l32r a3, 4020460c +4021eb77: 202230 or a2, a2, a3 +4021eb7a: 000146 j 4021eb83 +4021eb7d: 181c22 l16ui a2, a12, 48 +4021eb80: 102420 and a2, a4, a2 +4021eb83: 185c22 s16i a2, a12, 48 +4021eb86: 334cd2 s8i a13, a12, 51 +4021eb89: 3108 l32i.n a0, a1, 12 +4021eb8b: 21c8 l32i.n a12, a1, 8 +4021eb8d: 11d8 l32i.n a13, a1, 4 +4021eb8f: 01e8 l32i.n a14, a1, 0 +4021eb91: 10c112 addi a1, a1, 16 +4021eb94: f00d ret.n +4021eb96: 120000 excw +4021eb99: 21f0c1 l32r a12, 401e735c <_lit4_end+0xe1030> +4021eb9c: ff98 l32i.n a9, a15, 60 +4021eb9e: 3109 s32i.n a0, a1, 12 +4021eba0: 000222 l8ui a2, a2, 0 +4021eba3: 052266 bnei a2, 2, 4021ebac +4021eba6: 08a022 movi a2, 8 +4021eba9: fff185 call0 4021eac4 +4021ebac: 3108 l32i.n a0, a1, 12 +4021ebae: 10c112 addi a1, a1, 16 +4021ebb1: f00d ret.n +4021ebb3: ed5c00 excw +4021ebb6: 124021 l32r a2, 401e34b8 <_lit4_end+0xdd18c> +4021ebb9: c9f0c1 l32r a12, 4021137c +4021ebbc: 33c121 l32r a2, 401ebac0 <_lit4_end+0xe5794> +4021ebbf: ff .byte 0xff +4021ebc0: fffd21 l32r a2, 4021ebb4 +4021ebc3: 0c3d mov.n a3, a12 +4021ebc5: 3109 s32i.n a0, a1, 12 +4021ebc7: fcfe01 l32r a0, 4021dfc0 +4021ebca: 0000c0 callx0 a0 +4021ebcd: 181c32 l16ui a3, a12, 48 +4021ebd0: e5e621 l32r a2, 40218368 +4021ebd3: 103320 and a3, a3, a2 +4021ebd6: 00a422 movi a2, 0x400 +4021ebd9: 202320 or a2, a3, a2 +4021ebdc: 185c22 s16i a2, a12, 48 +4021ebdf: 3108 l32i.n a0, a1, 12 +4021ebe1: 21c8 l32i.n a12, a1, 8 +4021ebe3: 10c112 addi a1, a1, 16 +4021ebe6: f00d ret.n +4021ebe8: 000c00 excw +4021ebeb: c11200 mul16u a1, a2, a0 +4021ebee: 2721f0 excw +4021ebf1: ff .byte 0xff +4021ebf2: 3109 s32i.n a0, a1, 12 +4021ebf4: c248 l32i.n a4, a2, 48 +4021ebf6: d13a31 l32r a3, 402130e0 +4021ebf9: fffb51 l32r a5, 4021ebe8 +4021ebfc: 106430 and a6, a4, a3 +4021ebff: 1c9657 bne a6, a5, 4021ec1f +4021ec02: 0a64d7 bbci a4, 13, 4021ec10 +4021ec05: 181242 l16ui a4, a2, 48 +4021ec08: 203340 or a3, a3, a4 +4021ec0b: 000286 j 4021ec19 +4021ec0e: 420000 excw +4021ec11: 311812 l16ui a1, a8, 98 +4021ec14: 30e5d5 excw +4021ec17: 321034 excw +4021ec1a: 451852 l16ui a5, a8, 138 +4021ec1d: 080295 excw +4021ec20: c11231 l32r a3, 4020f068 +4021ec23: f00d10 subx8 a0, a13, a1 + ... + +4021ec28 : +4021ec28: 140c movi.n a4, 1 +4021ec2a: 401200 ssl a2 +4021ec2d: a12400 sll a2, a4 +4021ec30: ff1741 l32r a4, 4021e88c +4021ec33: 3f2452 l32i a5, a4, 252 +4021ec36: 205520 or a5, a5, a2 +4021ec39: 3f6452 s32i a5, a4, 252 +4021ec3c: 084366 bnei a3, 4, 4021ec48 +4021ec3f: 3e2432 l32i a3, a4, 248 +4021ec42: 202320 or a2, a3, a2 +4021ec45: 000346 j 4021ec56 +4021ec48: 0d5366 bnei a3, 5, 4021ec59 +4021ec4b: f37c movi.n a3, -1 +4021ec4d: 302320 xor a2, a3, a2 +4021ec50: 3e2432 l32i a3, a4, 248 +4021ec53: 102320 and a2, a3, a2 +4021ec56: 3e6422 s32i a2, a4, 248 +4021ec59: f00d ret.n + ... + +4021ec5c : +4021ec5c: ff0c21 l32r a2, 4021e88c +4021ec5f: 030c movi.n a3, 0 +4021ec61: 3f6232 s32i a3, a2, 252 +4021ec64: 3e6232 s32i a3, a2, 248 +4021ec67: f00d ret.n +4021ec69: 000000 ill +4021ec6c: fe8e24 excw +4021ec6f: 3f .byte 0x3f + +4021ec70 : +4021ec70: ffff31 l32r a3, 4021ec6c +4021ec73: 0329 s32i.n a2, a3, 0 +4021ec75: f00d ret.n +4021ec77: 8e2000 excw +4021ec7a: fe .byte 0xfe +4021ec7b: 3f .byte 0x3f + +4021ec7c : +4021ec7c: ffff31 l32r a3, 4021ec78 +4021ec7f: 0329 s32i.n a2, a3, 0 +4021ec81: f00d ret.n + ... + +4021ec84 : +4021ec84: ff0221 l32r a2, 4021e88c +4021ec87: c228 l32i.n a2, a2, 48 +4021ec89: 042d20 extui a2, a2, 13, 1 +4021ec8c: f00d ret.n + ... + +4021ec90 : +4021ec90: f0c112 addi a1, a1, -16 +4021ec93: fefe21 l32r a2, 4021e88c +4021ec96: 036102 s32i a0, a1, 12 +4021ec99: 430222 l8ui a2, a2, 67 +4021ec9c: 040685 call0 40222d08 +4021ec9f: 203220 or a3, a2, a2 +4021eca2: f0a022 movi a2, 240 +4021eca5: 021316 beqz a3, 4021ecca +4021eca8: 010332 l8ui a3, a3, 1 +4021ecab: a51c movi.n a5, 26 +4021ecad: 014380 slli a4, a3, 24 +4021ecb0: 314840 srai a4, a4, 24 +4021ecb3: 025c movi.n a2, 80 +4021ecb5: 112547 blt a5, a4, 4021ecca +4021ecb8: efc332 addi a3, a3, -17 +4021ecbb: 743030 extui a3, a3, 0, 8 +4021ecbe: 6da042 movi a4, 109 +4021ecc1: f0a022 movi a2, 240 +4021ecc4: 023437 bltu a4, a3, 4021ecca +4021ecc7: a0a022 movi a2, 160 +4021ecca: 3108 l32i.n a0, a1, 12 +4021eccc: 10c112 addi a1, a1, 16 +4021eccf: f00d ret.n +4021ecd1: 000000 ill + +4021ecd4 : +4021ecd4: 302240 xor a2, a2, a4 +4021ecd7: 103230 and a3, a2, a3 +4021ecda: 140c movi.n a4, 1 +4021ecdc: 020c movi.n a2, 0 +4021ecde: 932430 movnez a2, a4, a3 +4021ece1: f00d ret.n +4021ece3: 365800 excw +4021ece6: 10 .byte 0x10 +4021ece7: 40 .byte 0x40 + +4021ece8 : +4021ece8: da3121 l32r a2, 402155ac +4021eceb: f0c112 addi a1, a1, -16 +4021ecee: 0228 l32i.n a2, a2, 0 +4021ecf0: 21c9 s32i.n a12, a1, 8 +4021ecf2: fee6c1 l32r a12, 4021e88c +4021ecf5: 3109 s32i.n a0, a1, 12 +4021ecf7: 050c movi.n a5, 0 +4021ecf9: 262262 l32i a6, a2, 152 +4021ecfc: 1c59 s32i.n a5, a12, 4 +4021ecfe: 840c movi.n a4, 8 +4021ed00: 230c movi.n a3, 2 +4021ed02: 6aa022 movi a2, 106 +4021ed05: 0006c0 callx0 a6 +4021ed08: 0c2d mov.n a2, a12 +4021ed0a: fff601 l32r a0, 4021ece4 +4021ed0d: 0000c0 callx0 a0 +4021ed10: 3108 l32i.n a0, a1, 12 +4021ed12: 1c28 l32i.n a2, a12, 4 +4021ed14: 21c8 l32i.n a12, a1, 8 +4021ed16: 10c112 addi a1, a1, 16 +4021ed19: f00d ret.n +4021ed1b: 8e1d00 excw +4021ed1e: fe .byte 0xfe +4021ed1f: 3f .byte 0x3f + +4021ed20 : +4021ed20: f0c112 addi a1, a1, -16 +4021ed23: fffe21 l32r a2, 4021ed1c +4021ed26: 21c9 s32i.n a12, a1, 8 +4021ed28: 3109 s32i.n a0, a1, 12 +4021ed2a: 000232 l8ui a3, a2, 0 +4021ed2d: 02cd mov.n a12, a2 +4021ed2f: 63cc bnez.n a3, 4021ed39 +4021ed31: fffb45 call0 4021ece8 +4021ed34: 120c movi.n a2, 1 +4021ed36: 004c22 s8i a2, a12, 0 +4021ed39: fed421 l32r a2, 4021e88c +4021ed3c: 3108 l32i.n a0, a1, 12 +4021ed3e: 1228 l32i.n a2, a2, 4 +4021ed40: 21c8 l32i.n a12, a1, 8 +4021ed42: 10c112 addi a1, a1, 16 +4021ed45: f00d ret.n +4021ed47: 424000 excw +4021ed4a: 0f .byte 0xf +4021ed4b: 1e0000 excw +4021ed4e: a60000 excw +4021ed51: 22fd excw +4021ed53: de4440 excw +4021ed56: fe .byte 0xfe +4021ed57: 3f .byte 0x3f +4021ed58: 004cf0 break 12, 15 +4021ed5b: c11240 mul16u a1, a2, a4 +4021ed5e: 61c9e0 excw +4021ed61: 7109 s32i.n a0, a1, 28 +4021ed63: 51d9 s32i.n a13, a1, 20 +4021ed65: 0461e2 s32i a14, a1, 16 +4021ed68: 31f9 s32i.n a15, a1, 12 +4021ed6a: 994e01 l32r a0, 402052a4 +4021ed6d: 0000c0 callx0 a0 +4021ed70: fec7c1 l32r a12, 4021e88c +4021ed73: fff631 l32r a3, 4021ed4c +4021ed76: 0c2c22 l32i a2, a12, 48 +4021ed79: e89f41 l32r a4, 40218ff8 +4021ed7c: 103230 and a3, a2, a3 +4021ed7f: 059347 bne a3, a4, 4021ed88 +4021ed82: 360c32 l8ui a3, a12, 54 +4021ed85: 014316 beqz a3, 4021ed9d +4021ed88: 1162d7 bbci a2, 13, 4021ed9d +4021ed8b: ff4c31 l32r a3, 4021eabc +4021ed8e: ff4c21 l32r a2, 4021eac0 +4021ed91: 62a542 movi a4, 0x562 +4021ed94: d63401 l32r a0, 40214664 +4021ed97: 0000c0 callx0 a0 +4021ed9a: ffff06 j 4021ed9a +4021ed9d: 961531 l32r a3, 402045f4 +4021eda0: 020237 bnone a2, a3, 4021eda6 +4021eda3: 00a9c6 j 4021f04e +4021eda6: 120c movi.n a2, 1 +4021eda8: 027e05 call0 4022158c +4021edab: 021266 bnei a2, 1, 4021edb1 +4021edae: 00a706 j 4021f04e +4021edb1: cc28 l32i.n a2, a12, 48 +4021edb3: 026207 bbci a2, 0, 4021edb9 +4021edb6: 009fc6 j 4021f039 +4021edb9: ffe3d1 l32r a13, 4021ed48 +4021edbc: e20c22 l8ui a2, a12, 226 +4021edbf: ff0fe1 l32r a14, 4021e9fc +4021edc2: 4e1266 bnei a2, 1, 4021ee14 +4021edc5: d63621 l32r a2, 402146a0 +4021edc8: 0248 l32i.n a4, a2, 0 +4021edca: 64ac beqz.n a4, 4021edf4 +4021edcc: 944121 l32r a2, 40203ed0 +4021edcf: 000232 l8ui a3, a2, 0 +4021edd2: 112de0 slli a2, a13, 2 +4021edd5: 52da add.n a5, a2, a13 +4021edd7: 005316 beqz a3, 4021ede0 +4021edda: 1125f0 slli a2, a5, 1 +4021eddd: 415520 srli a5, a2, 5 +4021ede0: 8d6921 l32r a2, 40202384 +4021ede3: 0020c0 memw +4021ede6: 0238 l32i.n a3, a2, 0 +4021ede8: 253a add.n a2, a5, a3 +4021edea: 1438 l32i.n a3, a4, 4 +4021edec: 0db327 bgeu a3, a2, 4021edfd +4021edef: 220c movi.n a2, 2 +4021edf1: 000286 j 4021edff +4021edf4: ffd721 l32r a2, 4021ed50 +4021edf7: 8c9501 l32r a0, 4020204c +4021edfa: 0000c0 callx0 a0 +4021edfd: 120c movi.n a2, 1 +4021edff: 004e22 s8i a2, a14, 0 +4021ee02: ffd501 l32r a0, 4021ed58 +4021ee05: 0000c0 callx0 a0 +4021ee08: 3e2c32 l32i a3, a12, 248 +4021ee0b: 302230 xor a2, a2, a3 +4021ee0e: 3f2c32 l32i a3, a12, 252 +4021ee11: 040237 bnone a2, a3, 4021ee19 +4021ee14: 220c movi.n a2, 2 +4021ee16: 004e22 s8i a2, a14, 0 +4021ee19: ff9421 l32r a2, 4021ec6c +4021ee1c: 0228 l32i.n a2, a2, 0 +4021ee1e: 00a216 beqz a2, 4021ee2c +4021ee21: 0002c0 callx0 a2 +4021ee24: 041266 bnei a2, 1, 4021ee2c +4021ee27: 220c movi.n a2, 2 +4021ee29: 004e22 s8i a2, a14, 0 +4021ee2c: 000e22 l8ui a2, a14, 0 +4021ee2f: 021226 beqi a2, 1, 4021ee35 +4021ee32: 0054c6 j 4021ef89 +4021ee35: ffee85 call0 4021ed20 +4021ee38: 132c22 l32i a2, a12, 76 +4021ee3b: 012c42 l32i a4, a12, 4 +4021ee3e: 00a032 movi a3, 0 +4021ee41: c02d20 sub a2, a13, a2 +4021ee44: fe27c5 call0 4021d0c4 +4021ee47: 8d4a31 l32r a3, 40202370 +4021ee4a: 0020c0 memw +4021ee4d: 0023f2 l32i a15, a3, 0 +4021ee50: 2ca132 movi a3, 0x12c +4021ee53: 023327 bltu a3, a2, 4021ee59 +4021ee56: 004986 j 4021ef80 +4021ee59: c76b21 l32r a2, 40210c08 +4021ee5c: 0020c0 memw +4021ee5f: 0228 l32i.n a2, a2, 0 +4021ee61: 046207 bbci a2, 0, 4021ee69 +4021ee64: 120c movi.n a2, 1 +4021ee66: 000046 j 4021ee6b +4021ee69: 020c movi.n a2, 0 +4021ee6b: e14c22 s8i a2, a12, 225 +4021ee6e: e10c22 l8ui a2, a12, 225 +4021ee71: 1b1266 bnei a2, 1, 4021ee90 +4021ee74: c76531 l32r a3, 40210c08 +4021ee77: e27c movi.n a2, -2 +4021ee79: 0020c0 memw +4021ee7c: 002342 l32i a4, a3, 0 +4021ee7f: 102420 and a2, a4, a2 +4021ee82: 0020c0 memw +4021ee85: 006322 s32i a2, a3, 0 +4021ee88: 025c movi.n a2, 80 +4021ee8a: c76001 l32r a0, 40210c0c +4021ee8d: 0000c0 callx0 a0 +4021ee90: 01b345 call0 402209c8 +4021ee93: 120c movi.n a2, 1 +4021ee95: d55a01 l32r a0, 40214400 +4021ee98: 0000c0 callx0 a0 +4021ee9b: 220c movi.n a2, 2 +4021ee9d: dd7401 l32r a0, 40216470 +4021eea0: 0000c0 callx0 a0 +4021eea3: ffe445 call0 4021ece8 +4021eea6: 132c22 l32i a2, a12, 76 +4021eea9: 1c48 l32i.n a4, a12, 4 +4021eeab: c02d20 sub a2, a13, a2 +4021eeae: 030c movi.n a3, 0 +4021eeb0: fe2105 call0 4021d0c4 +4021eeb3: 02dd mov.n a13, a2 +4021eeb5: 8d2e21 l32r a2, 40202370 +4021eeb8: 1c48 l32i.n a4, a12, 4 +4021eeba: 0020c0 memw +4021eebd: 0228 l32i.n a2, a2, 0 +4021eebf: 030c movi.n a3, 0 +4021eec1: c022f0 sub a2, a2, a15 +4021eec4: fe1fc5 call0 4021d0c4 +4021eec7: d4ae32 movi a3, 0xfffffed4 +4021eeca: 02fd mov.n a15, a2 +4021eecc: dd3a add.n a13, a13, a3 +4021eece: 98f401 l32r a0, 402052a0 +4021eed1: 0000c0 callx0 a0 +4021eed4: e8a332 movi a3, 0x3e8 +4021eed7: 3f3a add.n a3, a15, a3 +4021eed9: 0233d7 bltu a3, a13, 4021eedf +4021eedc: 005446 j 4021f031 +4021eedf: cc38 l32i.n a3, a12, 48 +4021eee1: 040c movi.n a4, 0 +4021eee3: c02df0 sub a2, a13, a15 +4021eee6: 045347 bbc a3, a4, 4021eeee +4021eee9: fe2385 call0 4021d124 +4021eeec: 840c movi.n a4, 8 +4021eeee: cc38 l32i.n a3, a12, 48 +4021eef0: 046317 bbci a3, 1, 4021eef8 +4021eef3: 021c movi.n a2, 16 +4021eef5: 204420 or a4, a4, a2 +4021eef8: 420c movi.n a2, 4 +4021eefa: 102320 and a2, a3, a2 +4021eefd: 202420 or a2, a4, a2 +4021ef00: 043330 extui a3, a3, 3, 1 +4021ef03: fe3645 call0 4021d268 +4021ef06: cc38 l32i.n a3, a12, 48 +4021ef08: d07621 l32r a2, 402130e0 +4021ef0b: 00a442 movi a4, 0x400 +4021ef0e: 102320 and a2, a3, a2 +4021ef11: 141247 beq a2, a4, 4021ef29 +4021ef14: 116307 bbci a3, 0, 4021ef29 +4021ef17: fee931 l32r a3, 4021eabc +4021ef1a: fee921 l32r a2, 4021eac0 +4021ef1d: 24a142 movi a4, 0x124 +4021ef20: d5d101 l32r a0, 40214664 +4021ef23: 0000c0 callx0 a0 +4021ef26: ffff06 j 4021ef26 +4021ef29: 181c32 l16ui a3, a12, 48 +4021ef2c: e50f21 l32r a2, 40218368 +4021ef2f: 102320 and a2, a3, a2 +4021ef32: 00a632 movi a3, 0x600 +4021ef35: 203230 or a3, a2, a3 +4021ef38: 3fae22 movi a2, 0xfffffe3f +4021ef3b: 102320 and a2, a3, a2 +4021ef3e: 185c22 s16i a2, a12, 48 +4021ef41: c7fa21 l32r a2, 40210f2c +4021ef44: 0020c0 memw +4021ef47: 002222 l32i a2, a2, 0 +4021ef4a: 076c22 s32i a2, a12, 28 +4021ef4d: 8d0821 l32r a2, 40202370 +4021ef50: 0020c0 memw +4021ef53: 002222 l32i a2, a2, 0 +4021ef56: 8c29 s32i.n a2, a12, 32 +4021ef58: 8d0b21 l32r a2, 40202384 +4021ef5b: 0020c0 memw +4021ef5e: 0228 l32i.n a2, a2, 0 +4021ef60: 9c29 s32i.n a2, a12, 36 +4021ef62: 220c movi.n a2, 2 +4021ef64: e04c22 s8i a2, a12, 224 +4021ef67: 220c movi.n a2, 2 +4021ef69: fc1401 l32r a0, 4021dfbc +4021ef6c: 0000c0 callx0 a0 +4021ef6f: 742020 extui a2, a2, 0, 8 +4021ef72: e04c22 s8i a2, a12, 224 +4021ef75: 10b256 bnez a2, 4021f084 +4021ef78: 220c movi.n a2, 2 +4021ef7a: fe4cc5 call0 4021d448 +4021ef7d: 0040c6 j 4021f084 +4021ef80: 98c901 l32r a0, 402052a4 +4021ef83: 0000c0 callx0 a0 +4021ef86: 002dc6 j 4021f041 +4021ef89: 022226 beqi a2, 2, 4021ef8f +4021ef8c: 002d06 j 4021f044 +4021ef8f: 132c22 l32i a2, a12, 76 +4021ef92: c0dd20 sub a13, a13, a2 +4021ef95: 8cf621 l32r a2, 40202370 +4021ef98: 0020c0 memw +4021ef9b: 02f8 l32i.n a15, a2, 0 +4021ef9d: 223c movi.n a2, 50 +4021ef9f: 0232d7 bltu a2, a13, 4021efa5 +4021efa2: 0026c6 j 4021f041 +4021efa5: 120c movi.n a2, 1 +4021efa7: d51601 l32r a0, 40214400 +4021efaa: 0000c0 callx0 a0 +4021efad: 820c movi.n a2, 8 +4021efaf: dd3001 l32r a0, 40216470 +4021efb2: 0000c0 callx0 a0 +4021efb5: 020c movi.n a2, 0 +4021efb7: d51201 l32r a0, 40214400 +4021efba: 0000c0 callx0 a0 +4021efbd: 8cec21 l32r a2, 40202370 +4021efc0: cecdd2 addi a13, a13, -50 +4021efc3: 0020c0 memw +4021efc6: 0228 l32i.n a2, a2, 0 +4021efc8: c0f2f0 sub a15, a2, a15 +4021efcb: fbf921 l32r a2, 4021dfb0 +4021efce: 802f20 add a2, a15, a2 +4021efd1: 5cb2d7 bgeu a2, a13, 4021f031 +4021efd4: ff6021 l32r a2, 4021ed54 +4021efd7: 93f901 l32r a0, 40203fbc +4021efda: 0000c0 callx0 a0 +4021efdd: e8a332 movi a3, 0x3e8 +4021efe0: c02df0 sub a2, a13, a15 +4021efe3: 8bba01 l32r a0, 40201ecc +4021efe6: 0000c0 callx0 a0 +4021efe9: 023d mov.n a3, a2 +4021efeb: ff5a21 l32r a2, 4021ed54 +4021efee: 040c movi.n a4, 0 +4021eff0: 150c movi.n a5, 1 +4021eff2: 93f101 l32r a0, 40203fb8 +4021eff5: 0000c0 callx0 a0 +4021eff8: cc38 l32i.n a3, a12, 48 +4021effa: d03921 l32r a2, 402130e0 +4021effd: 00a442 movi a4, 0x400 +4021f000: 102320 and a2, a3, a2 +4021f003: 151247 beq a2, a4, 4021f01c +4021f006: 126307 bbci a3, 0, 4021f01c +4021f009: feac31 l32r a3, 4021eabc +4021f00c: fead21 l32r a2, 4021eac0 +4021f00f: 5ba242 movi a4, 0x25b +4021f012: d59401 l32r a0, 40214664 +4021f015: 0000c0 callx0 a0 +4021f018: ffff06 j 4021f018 +4021f01b: 1c3200 excw +4021f01e: 2118 l32i.n a1, a1, 8 +4021f020: 20e4d2 excw +4021f023: 221033 excw +4021f026: 2000a6 blti a0, -1, 4021f04a +4021f029: 222023 excw +4021f02c: 185c movi.n a8, 81 +4021f02e: 001486 j 4021f084 +4021f031: ff9cc5 call0 4021ea00 +4021f034: 000246 j 4021f041 +4021f037: 450000 extui a0, a0, 16, 5 +4021f03a: ddff85 call0 401fd034 <_lit4_end+0xf6d08> +4021f03d: a25602 s16i a0, a6, 0x144 +4021f040: 8905d7 bnone a5, a13, 4021efcd +4021f043: ff .byte 0xff +4021f044: 030c movi.n a3, 0 +4021f046: 032d mov.n a2, a3 +4021f048: fbde01 l32r a0, 4021dfc0 +4021f04b: 0000c0 callx0 a0 +4021f04e: 989401 l32r a0, 402052a0 +4021f051: 0000c0 callx0 a0 +4021f054: 939f21 l32r a2, 40203ed0 +4021f057: d5c831 l32r a3, 40214778 +4021f05a: 000242 l8ui a4, a2, 0 +4021f05d: 8cc921 l32r a2, 40202384 +4021f060: 0020c0 memw +4021f063: 0228 l32i.n a2, a2, 0 +4021f065: 448c beqz.n a4, 4021f06d +4021f067: 50c222 addi a2, a2, 80 +4021f06a: 000086 j 4021f070 +4021f06d: 05d222 addmi a2, a2, 0x500 +4021f070: 7108 l32i.n a0, a1, 28 +4021f072: 61c8 l32i.n a12, a1, 24 +4021f074: 51d8 l32i.n a13, a1, 20 +4021f076: 41e8 l32i.n a14, a1, 16 +4021f078: 31f8 l32i.n a15, a1, 12 +4021f07a: 0020c0 memw +4021f07d: 0329 s32i.n a2, a3, 0 +4021f07f: 20c112 addi a1, a1, 32 +4021f082: f00d ret.n +4021f084: 000e22 l8ui a2, a14, 0 +4021f087: b91266 bnei a2, 1, 4021f044 +4021f08a: e00c22 l8ui a2, a12, 224 +4021f08d: 06f256 bnez a2, 4021f100 +4021f090: c7a721 l32r a2, 40210f2c +4021f093: 012c32 l32i a3, a12, 4 +4021f096: 0020c0 memw +4021f099: 002242 l32i a4, a2, 0 +4021f09c: 072c22 l32i a2, a12, 28 +4021f09f: c02420 sub a2, a4, a2 +4021f0a2: fe0745 call0 4021d118 +4021f0a5: 8cb231 l32r a3, 40202370 +4021f0a8: 0020c0 memw +4021f0ab: 0348 l32i.n a4, a3, 0 +4021f0ad: 8c38 l32i.n a3, a12, 32 +4021f0af: c03340 sub a3, a3, a4 +4021f0b2: 232a add.n a2, a3, a2 +4021f0b4: 3c38 l32i.n a3, a12, 12 +4021f0b6: c71941 l32r a4, 40210d1c +4021f0b9: 332a add.n a3, a3, a2 +4021f0bb: 3c39 s32i.n a3, a12, 12 +4021f0bd: 0438 l32i.n a3, a4, 0 +4021f0bf: 332a add.n a3, a3, a2 +4021f0c1: 0439 s32i.n a3, a4, 0 +4021f0c3: 4c38 l32i.n a3, a12, 16 +4021f0c5: c03320 sub a3, a3, a2 +4021f0c8: 4c39 s32i.n a3, a12, 16 +4021f0ca: 5c38 l32i.n a3, a12, 20 +4021f0cc: c03320 sub a3, a3, a2 +4021f0cf: 5c39 s32i.n a3, a12, 20 +4021f0d1: 6c38 l32i.n a3, a12, 24 +4021f0d3: c03320 sub a3, a3, a2 +4021f0d6: 6c39 s32i.n a3, a12, 24 +4021f0d8: 2c38 l32i.n a3, a12, 8 +4021f0da: c03320 sub a3, a3, a2 +4021f0dd: 2c39 s32i.n a3, a12, 8 +4021f0df: 937c31 l32r a3, 40203ed0 +4021f0e2: 000352 l8ui a5, a3, 0 +4021f0e5: 1132e0 slli a3, a2, 2 +4021f0e8: 432a add.n a4, a3, a2 +4021f0ea: 458c beqz.n a5, 4021f0f2 +4021f0ec: 1124f0 slli a2, a4, 1 +4021f0ef: 414520 srli a4, a2, 5 +4021f0f2: 9c38 l32i.n a3, a12, 36 +4021f0f4: 802430 add a2, a4, a3 +4021f0f7: d5a131 l32r a3, 4021477c +4021f0fa: 0020c0 memw +4021f0fd: 006322 s32i a2, a3, 0 +4021f100: fbae21 l32r a2, 4021dfb8 +4021f103: 0020c0 memw +4021f106: 0228 l32i.n a2, a2, 0 +4021f108: 143020 extui a3, a2, 0, 2 +4021f10b: 33dc bnez.n a3, 4021f122 +4021f10d: fe6b31 l32r a3, 4021eabc +4021f110: fe6c21 l32r a2, 4021eac0 +4021f113: dba542 movi a4, 0x5db +4021f116: d55301 l32r a0, 40214664 +4021f119: 0000c0 callx0 a0 +4021f11c: ffff06 j 4021f11c +4021f11f: 000000 ill +4021f122: 2d0c movi.n a13, 2 +4021f124: 10d2d0 and a13, a2, a13 +4021f127: 0b6207 bbci a2, 0, 4021f136 +4021f12a: d42b21 l32r a2, 402141d8 +4021f12d: 0020c0 memw +4021f130: 0022d2 l32i a13, a2, 0 +4021f133: 54d8d0 extui a13, a13, 8, 6 +4021f136: 420c movi.n a2, 4 +4021f138: 103d20 and a3, a13, a2 +4021f13b: 93d230 movnez a13, a2, a3 +4021f13e: 2d0b addi.n a2, a13, -1 +4021f140: 1022d0 and a2, a2, a13 +4021f143: 031c movi.n a3, 16 +4021f145: 93d320 movnez a13, a3, a2 +4021f148: e00c22 l8ui a2, a12, 224 +4021f14b: 230c movi.n a3, 2 +4021f14d: 220b addi.n a2, a2, -1 +4021f14f: 83d320 moveqz a13, a3, a2 +4021f152: ff8ac5 call0 4021ea00 +4021f155: 288d26 beqi a13, 8, 4021f181 +4021f158: 4cbd66 bnei a13, 16, 4021f1a8 +4021f15b: cc28 l32i.n a2, a12, 48 +4021f15d: 4762d7 bbci a2, 13, 4021f1a8 +4021f160: fddbe1 l32r a14, 4021e8cc +4021f163: 202ee0 or a2, a14, a14 +4021f166: 939501 l32r a0, 40203fbc +4021f169: 0000c0 callx0 a0 +4021f16c: 181c32 l16ui a3, a12, 48 +4021f16f: 9e7c21 l32r a2, 40206b60 +4021f172: 150c movi.n a5, 1 +4021f174: 202320 or a2, a3, a2 +4021f177: 185c22 s16i a2, a12, 48 +4021f17a: 040c movi.n a4, 0 +4021f17c: a30c movi.n a3, 10 +4021f17e: 000746 j 4021f19f +4021f181: fdd3e1 l32r a14, 4021e8d0 +4021f184: 0e2d mov.n a2, a14 +4021f186: 938d01 l32r a0, 40203fbc +4021f189: 0000c0 callx0 a0 +4021f18c: 142c22 l32i a2, a12, 80 +4021f18f: e8a332 movi a3, 0x3e8 +4021f192: 8b4e01 l32r a0, 40201ecc +4021f195: 0000c0 callx0 a0 +4021f198: 150c movi.n a5, 1 +4021f19a: 040c movi.n a4, 0 +4021f19c: 203220 or a3, a2, a2 +4021f19f: 202ee0 or a2, a14, a14 +4021f1a2: 938501 l32r a0, 40203fb8 +4021f1a5: 0000c0 callx0 a0 +4021f1a8: 334cd2 s8i a13, a12, 51 +4021f1ab: cc38 l32i.n a3, a12, 48 +4021f1ad: cfcc21 l32r a2, 402130e0 +4021f1b0: 00a642 movi a4, 0x600 +4021f1b3: 102320 and a2, a3, a2 +4021f1b6: 121247 beq a2, a4, 4021f1cc +4021f1b9: fe4031 l32r a3, 4021eabc +4021f1bc: fe4121 l32r a2, 4021eac0 +4021f1bf: 44a542 movi a4, 0x544 +4021f1c2: d52801 l32r a0, 40214664 +4021f1c5: 0000c0 callx0 a0 +4021f1c8: ffff06 j 4021f1c8 +4021f1cb: 674100 excw +4021f1ce: 63d7e4 excw +4021f1d1: 0e .byte 0xe +4021f1d2: 181c32 l16ui a3, a12, 48 +4021f1d5: 102430 and a2, a4, a3 +4021f1d8: 950d31 l32r a3, 4020460c +4021f1db: 202230 or a2, a2, a3 +4021f1de: 000146 j 4021f1e7 +4021f1e1: 181c22 l16ui a2, a12, 48 +4021f1e4: 102420 and a2, a4, a2 +4021f1e7: 185c22 s16i a2, a12, 48 +4021f1ea: fea321 l32r a2, 4021ec78 +4021f1ed: 0228 l32i.n a2, a2, 0 +4021f1ef: e51216 beqz a2, 4021f044 +4021f1f2: 0002c0 callx0 a2 +4021f1f5: ff92c6 j 4021f044 + +4021f1f8 : +4021f1f8: fda531 l32r a3, 4021e88c +4021f1fb: f0c112 addi a1, a1, -16 +4021f1fe: 1348 l32i.n a4, a3, 4 +4021f200: 030c movi.n a3, 0 +4021f202: 3109 s32i.n a0, a1, 12 +4021f204: fdebc5 call0 4021d0c4 +4021f207: fdf1c5 call0 4021d124 +4021f20a: 3108 l32i.n a0, a1, 12 +4021f20c: 10c112 addi a1, a1, 16 +4021f20f: f00d ret.n +4021f211: 000000 ill + +4021f214 : +4021f214: fd9e21 l32r a2, 4021e88c +4021f217: 140c movi.n a4, 1 +4021f219: c238 l32i.n a3, a2, 48 +4021f21b: cfb121 l32r a2, 402130e0 +4021f21e: 102320 and a2, a3, a2 +4021f221: fad232 addmi a3, a2, 0xfffffa00 +4021f224: 020c movi.n a2, 0 +4021f226: 832430 moveqz a2, a4, a3 +4021f229: f00d ret.n +4021f22b: dc3600 excw +4021f22e: fe .byte 0xfe +4021f22f: 3f .byte 0x3f +4021f230: 22fe40 excw +4021f233: 8ea740 excw +4021f236: fe .byte 0xfe +4021f237: 3f .byte 0x3f +4021f238: 22fe33 excw +4021f23b: fe2940 excw +4021f23e: 274022 s8i a2, a0, 39 +4021f241: fe .byte 0xfe +4021f242: 22 .byte 0x22 +4021f243: 40 .byte 0x40 + +4021f244 : +4021f244: e0c112 addi a1, a1, -32 +4021f247: 61c9 s32i.n a12, a1, 24 +4021f249: 51d9 s32i.n a13, a1, 20 +4021f24b: 7109 s32i.n a0, a1, 28 +4021f24d: 41e9 s32i.n a14, a1, 16 +4021f24f: 31f9 s32i.n a15, a1, 12 +4021f251: 74d020 extui a13, a2, 0, 8 +4021f254: fd8ec1 l32r a12, 4021e88c +4021f257: 6dfc bnez.n a13, 4021f291 +4021f259: fb51d1 l32r a13, 4021dfa0 +4021f25c: 202dd0 or a2, a13, a13 +4021f25f: 935701 l32r a0, 40203fbc +4021f262: 0000c0 callx0 a0 +4021f265: fff121 l32r a2, 4021f22c +4021f268: 150c movi.n a5, 1 +4021f26a: 931c movi.n a3, 25 +4021f26c: 005232 s16i a3, a2, 0 +4021f26f: 204550 or a4, a5, a5 +4021f272: 202dd0 or a2, a13, a13 +4021f275: 931c movi.n a3, 25 +4021f277: 935001 l32r a0, 40203fb8 +4021f27a: 0000c0 callx0 a0 +4021f27d: 020c movi.n a2, 0 +4021f27f: e24c22 s8i a2, a12, 226 +4021f282: e44c22 s8i a2, a12, 228 +4021f285: ffea21 l32r a2, 4021f230 +4021f288: 8b7101 l32r a0, 4020204c +4021f28b: 0000c0 callx0 a0 +4021f28e: 002346 j 4021f31f +4021f291: e40c22 l8ui a2, a12, 228 +4021f294: 62cc bnez.n a2, 4021f29e +4021f296: ffe721 l32r a2, 4021f234 +4021f299: 130c movi.n a3, 1 +4021f29b: 004232 s8i a3, a2, 0 +4021f29e: 120c movi.n a2, 1 +4021f2a0: e44c22 s8i a2, a12, 228 +4021f2a3: ffe521 l32r a2, 4021f238 +4021f2a6: 8b6901 l32r a0, 4020204c +4021f2a9: 0000c0 callx0 a0 +4021f2ac: 2d0b addi.n a2, a13, -1 +4021f2ae: 742020 extui a2, a2, 0, 8 +4021f2b1: 6722f6 bgeui a2, 2, 4021f31c +4021f2b4: e20c22 l8ui a2, a12, 226 +4021f2b7: 5212d7 beq a2, a13, 4021f30d +4021f2ba: fb39e1 l32r a14, 4021dfa0 +4021f2bd: 202ee0 or a2, a14, a14 +4021f2c0: 211d66 bnei a13, 1, 4021f2e5 +4021f2c3: 933e01 l32r a0, 40203fbc +4021f2c6: 0000c0 callx0 a0 +4021f2c9: ffd821 l32r a2, 4021f22c +4021f2cc: fb37f1 l32r a15, 4021dfa8 +4021f2cf: 150c movi.n a5, 1 +4021f2d1: 0052f2 s16i a15, a2, 0 +4021f2d4: 054d mov.n a4, a5 +4021f2d6: 0e2d mov.n a2, a14 +4021f2d8: 0f3d mov.n a3, a15 +4021f2da: 933701 l32r a0, 40203fb8 +4021f2dd: 0000c0 callx0 a0 +4021f2e0: 0f2d mov.n a2, a15 +4021f2e2: 000846 j 4021f307 +4021f2e5: 933501 l32r a0, 40203fbc +4021f2e8: 0000c0 callx0 a0 +4021f2eb: ffd031 l32r a3, 4021f22c +4021f2ee: 19a022 movi a2, 25 +4021f2f1: 01a052 movi a5, 1 +4021f2f4: 005322 s16i a2, a3, 0 +4021f2f7: 204550 or a4, a5, a5 +4021f2fa: 0e2d mov.n a2, a14 +4021f2fc: 931c movi.n a3, 25 +4021f2fe: 932e01 l32r a0, 40203fb8 +4021f301: 0000c0 callx0 a0 +4021f304: 64a022 movi a2, 100 +4021f307: 018a85 call0 40220bb0 +4021f30a: e24cd2 s8i a13, a12, 226 +4021f30d: e20c32 l8ui a3, a12, 226 +4021f310: ffcb21 l32r a2, 4021f23c +4021f313: 8b4e01 l32r a0, 4020204c +4021f316: 0000c0 callx0 a0 +4021f319: 000086 j 4021f31f +4021f31c: e34cd2 s8i a13, a12, 227 +4021f31f: ffc821 l32r a2, 4021f240 +4021f322: 8b4a01 l32r a0, 4020204c +4021f325: 0000c0 callx0 a0 +4021f328: 7108 l32i.n a0, a1, 28 +4021f32a: 61c8 l32i.n a12, a1, 24 +4021f32c: 51d8 l32i.n a13, a1, 20 +4021f32e: 41e8 l32i.n a14, a1, 16 +4021f330: 31f8 l32i.n a15, a1, 12 +4021f332: 20c112 addi a1, a1, 32 +4021f335: f00d ret.n + ... + +4021f338 : +4021f338: fd5521 l32r a2, 4021e88c +4021f33b: e40242 l8ui a4, a2, 228 +4021f33e: 023d mov.n a3, a2 +4021f340: 020c movi.n a2, 0 +4021f342: 021466 bnei a4, 1, 4021f348 +4021f345: e20322 l8ui a2, a3, 226 +4021f348: f00d ret.n + ... + +4021f34c : +4021f34c: fd5031 l32r a3, 4021e88c +4021f34f: e54322 s8i a2, a3, 229 +4021f352: f00d ret.n + +4021f354 : +4021f354: fd4e21 l32r a2, 4021e88c +4021f357: e50222 l8ui a2, a2, 229 +4021f35a: f00d ret.n + +4021f35c : +4021f35c: fd4c31 l32r a3, 4021e88c +4021f35f: 404322 s8i a2, a3, 64 +4021f362: f00d ret.n + +4021f364 : +4021f364: fd4a21 l32r a2, 4021e88c +4021f367: 400222 l8ui a2, a2, 64 +4021f36a: f00d ret.n + +4021f36c : +4021f36c: f00d ret.n + ... + +4021f370 : +4021f370: f00d ret.n +4021f372: 1c0000 excw +4021f375: de .byte 0xde +4021f376: fe .byte 0xfe +4021f377: 3f .byte 0x3f + +4021f378 : +4021f378: f0c112 addi a1, a1, -16 +4021f37b: 21c9 s32i.n a12, a1, 8 +4021f37d: 11d9 s32i.n a13, a1, 4 +4021f37f: fffdc1 l32r a12, 4021f374 +4021f382: fd42d1 l32r a13, 4021e88c +4021f385: 3109 s32i.n a0, a1, 12 +4021f387: 020c movi.n a2, 0 +4021f389: 344d22 s8i a2, a13, 52 +4021f38c: 0c2d mov.n a2, a12 +4021f38e: 930b01 l32r a0, 40203fbc +4021f391: 0000c0 callx0 a0 +4021f394: cd28 l32i.n a2, a13, 48 +4021f396: 13e2d7 bbsi a2, 13, 4021f3ad +4021f399: 038ec5 call0 40222c88 +4021f39c: d2cc bnez.n a2, 4021f3ad +4021f39e: 150c movi.n a5, 1 +4021f3a0: 040c movi.n a4, 0 +4021f3a2: f4a132 movi a3, 0x1f4 +4021f3a5: 0c2d mov.n a2, a12 +4021f3a7: 930401 l32r a0, 40203fb8 +4021f3aa: 0000c0 callx0 a0 +4021f3ad: 3108 l32i.n a0, a1, 12 +4021f3af: 21c8 l32i.n a12, a1, 8 +4021f3b1: 11d8 l32i.n a13, a1, 4 +4021f3b3: 10c112 addi a1, a1, 16 +4021f3b6: f00d ret.n +4021f3b8: fdba add.n a15, a13, a11 +4021f3ba: bc4022 s8i a2, a0, 188 +4021f3bd: fedd excw +4021f3bf: 3f .byte 0x3f + +4021f3c0 : +4021f3c0: f0c112 addi a1, a1, -16 +4021f3c3: 0261c2 s32i a12, a1, 8 +4021f3c6: fd31c1 l32r a12, 4021e88c +4021f3c9: 0161d2 s32i a13, a1, 4 +4021f3cc: 3109 s32i.n a0, a1, 12 +4021f3ce: 0061e2 s32i a14, a1, 0 +4021f3d1: 74d020 extui a13, a2, 0, 8 +4021f3d4: cc28 l32i.n a2, a12, 48 +4021f3d6: 0262d7 bbci a2, 13, 4021f3dc +4021f3d9: 002b46 j 4021f48a +4021f3dc: ff4985 call0 4021e878 +4021f3df: 128c beqz.n a2, 4021f3e4 +4021f3e1: ff41c5 call0 4021e800 +4021f3e4: 0d2d mov.n a2, a13 +4021f3e6: 039205 call0 40222d08 +4021f3e9: 02ed mov.n a14, a2 +4021f3eb: 09b216 beqz a2, 4021f48a +4021f3ee: 181c32 l16ui a3, a12, 48 +4021f3f1: e6e921 l32r a2, 40218f98 +4021f3f4: 202320 or a2, a3, a2 +4021f3f7: 185c22 s16i a2, a12, 48 +4021f3fa: ffde21 l32r a2, 4021f374 +4021f3fd: 92ef01 l32r a0, 40203fbc +4021f400: 0000c0 callx0 a0 +4021f403: cc48 l32i.n a4, a12, 48 +4021f405: e20c32 l8ui a3, a12, 226 +4021f408: ffec21 l32r a2, 4021f3b8 +4021f40b: 244940 extui a4, a4, 9, 3 +4021f40e: 8b0f01 l32r a0, 4020204c +4021f411: 0000c0 callx0 a0 +4021f414: cc38 l32i.n a3, a12, 48 +4021f416: cf3221 l32r a2, 402130e0 +4021f419: 104320 and a4, a3, a2 +4021f41c: c4cc bnez.n a4, 4021f42c +4021f41e: 181c32 l16ui a3, a12, 48 +4021f421: 202230 or a2, a2, a3 +4021f424: 185c22 s16i a2, a12, 48 +4021f427: 0007c6 j 4021f44a +4021f42a: 210000 srai a0, a0, 0 +4021f42d: ef .byte 0xef +4021f42e: 27fd excw +4021f430: 071714 excw +4021f433: 311463 excw +4021f436: 21fda1 l32r a10, 401e7c2c <_lit4_end+0xe1900> +4021f439: 42fda2 excw +4021f43c: 01a1a3 excw +4021f43f: d489 s32i.n a8, a4, 52 +4021f441: 0000c0 callx0 a0 +4021f444: ffff06 j 4021f444 +4021f447: 000000 ill +4021f44a: 030c movi.n a3, 0 +4021f44c: 032d mov.n a2, a3 +4021f44e: fadc01 l32r a0, 4021dfc0 +4021f451: 0000c0 callx0 a0 +4021f454: 101e22 l16ui a2, a14, 32 +4021f457: 640c movi.n a4, 6 +4021f459: 255c22 s16i a2, a12, 74 +4021f45c: ffd821 l32r a2, 4021f3bc +4021f45f: 1ace32 addi a3, a14, 26 +4021f462: 434cd2 s8i a13, a12, 67 +4021f465: 86eb01 l32r a0, 40201014 <_irom0_text_start+0x4> +4021f468: 0000c0 callx0 a0 +4021f46b: 181c32 l16ui a3, a12, 48 +4021f46e: 120c movi.n a2, 1 +4021f470: 202320 or a2, a3, a2 +4021f473: 185c22 s16i a2, a12, 48 +4021f476: 8bbe21 l32r a2, 40202370 +4021f479: 0020c0 memw +4021f47c: 0228 l32i.n a2, a2, 0 +4021f47e: 2c29 s32i.n a2, a12, 8 +4021f480: 020c movi.n a2, 0 +4021f482: 3c29 s32i.n a2, a12, 12 +4021f484: 0177c5 call0 40220c04 +4021f487: 017a05 call0 40220c28 +4021f48a: 3108 l32i.n a0, a1, 12 +4021f48c: 21c8 l32i.n a12, a1, 8 +4021f48e: 11d8 l32i.n a13, a1, 4 +4021f490: 01e8 l32i.n a14, a1, 0 +4021f492: 10c112 addi a1, a1, 16 +4021f495: f00d ret.n + ... + +4021f498 : +4021f498: fcfd21 l32r a2, 4021e88c +4021f49b: f238 l32i.n a3, a2, 60 +4021f49d: 431b addi.n a4, a3, 1 +4021f49f: f249 s32i.n a4, a2, 60 +4021f4a1: 34cc bnez.n a4, 4021f4a8 +4021f4a3: 332b addi.n a3, a3, 2 +4021f4a5: 0f6232 s32i a3, a2, 60 +4021f4a8: f00d ret.n +4021f4aa: 300000 xor a0, a0, a0 +4021f4ad: de .byte 0xde +4021f4ae: fe .byte 0xfe +4021f4af: 3f .byte 0x3f + +4021f4b0 : +4021f4b0: ffff21 l32r a2, 4021f4ac +4021f4b3: f0c112 addi a1, a1, -16 +4021f4b6: 3109 s32i.n a0, a1, 12 +4021f4b8: 92c101 l32r a0, 40203fbc +4021f4bb: 0000c0 callx0 a0 +4021f4be: 3108 l32i.n a0, a1, 12 +4021f4c0: 10c112 addi a1, a1, 16 +4021f4c3: f00d ret.n +4021f4c5: 000000 ill + +4021f4c8 : +4021f4c8: aa6431 l32r a3, 40209e58 +4021f4cb: fff821 l32r a2, 4021f4ac +4021f4ce: f0c112 addi a1, a1, -16 +4021f4d1: 150c movi.n a5, 1 +4021f4d3: 040c movi.n a4, 0 +4021f4d5: 3109 s32i.n a0, a1, 12 +4021f4d7: 92b801 l32r a0, 40203fb8 +4021f4da: 0000c0 callx0 a0 +4021f4dd: 3108 l32i.n a0, a1, 12 +4021f4df: 10c112 addi a1, a1, 16 +4021f4e2: f00d ret.n + +4021f4e4 : +4021f4e4: f0c112 addi a1, a1, -16 +4021f4e7: 21c9 s32i.n a12, a1, 8 +4021f4e9: fce8c1 l32r a12, 4021e88c +4021f4ec: 3109 s32i.n a0, a1, 12 +4021f4ee: 020c movi.n a2, 0 +4021f4f0: 3a4c22 s8i a2, a12, 58 +4021f4f3: fffbc5 call0 4021f4b0 +4021f4f6: 3108 l32i.n a0, a1, 12 +4021f4f8: 020c movi.n a2, 0 +4021f4fa: fc29 s32i.n a2, a12, 60 +4021f4fc: 21c8 l32i.n a12, a1, 8 +4021f4fe: 10c112 addi a1, a1, 16 +4021f501: f00d ret.n + ... + +4021f504 : +4021f504: f0c112 addi a1, a1, -16 +4021f507: fce121 l32r a2, 4021e88c +4021f50a: 3109 s32i.n a0, a1, 12 +4021f50c: 01a032 movi a3, 1 +4021f50f: 3a4232 s8i a3, a2, 58 +4021f512: fff9c5 call0 4021f4b0 +4021f515: fffb05 call0 4021f4c8 +4021f518: 3108 l32i.n a0, a1, 12 +4021f51a: 10c112 addi a1, a1, 16 +4021f51d: f00d ret.n + ... + +4021f520 : +4021f520: fcdb31 l32r a3, 4021e88c +4021f523: 022c movi.n a2, 32 +4021f525: 181342 l16ui a4, a3, 48 +4021f528: 202420 or a2, a4, a2 +4021f52b: 185322 s16i a2, a3, 48 +4021f52e: f00d ret.n +4021f530: eb98 l32i.n a9, a11, 56 +4021f532: c44021 l32r a2, 40210634 +4021f535: 0009 s32i.n a0, a0, 0 +4021f537: 232800 excw +4021f53a: 080000 excw +4021f53d: 21fc bnez.n a1, 4021f573 +4021f53f: fb3c40 excw +4021f542: ac4021 l32r a2, 4020a644 +4021f545: 21f9 s32i.n a15, a1, 8 +4021f547: fa6040 excw +4021f54a: d04021 l32r a2, 4021364c +4021f54d: 21e9 s32i.n a14, a1, 8 +4021f54f: e8c840 excw +4021f552: 044021 l32r a2, 401e0654 <_lit4_end+0xda328> +4021f555: 402203 excw +4021f558: 8e28 l32i.n a2, a14, 32 +4021f55a: fe .byte 0xfe +4021f55b: 3f .byte 0x3f +4021f55c: fd38 l32i.n a3, a13, 60 +4021f55e: 21 .byte 0x21 +4021f55f: 40 .byte 0x40 + +4021f560 : +4021f560: f0c112 addi a1, a1, -16 +4021f563: 21c9 s32i.n a12, a1, 8 +4021f565: fcc9c1 l32r a12, 4021e88c +4021f568: 3109 s32i.n a0, a1, 12 +4021f56a: 11d9 s32i.n a13, a1, 4 +4021f56c: 01e9 s32i.n a14, a1, 0 +4021f56e: 181c32 l16ui a3, a12, 48 +4021f571: 420c movi.n a2, 4 +4021f573: 202320 or a2, a3, a2 +4021f576: e47c movi.n a4, -2 +4021f578: 102240 and a2, a2, a4 +4021f57b: d37c movi.n a3, -3 +4021f57d: 103230 and a3, a2, a3 +4021f580: 820c movi.n a2, 8 +4021f582: 202320 or a2, a3, a2 +4021f585: 185c22 s16i a2, a12, 48 +4021f588: ffea31 l32r a3, 4021f530 +4021f58b: fdf221 l32r a2, 4021ed54 +4021f58e: 2d0c movi.n a13, 2 +4021f590: 040c movi.n a4, 0 +4021f592: e04cd2 s8i a13, a12, 224 +4021f595: 938701 l32r a0, 402043b4 +4021f598: 0000c0 callx0 a0 +4021f59b: 020c movi.n a2, 0 +4021f59d: e14c22 s8i a2, a12, 225 +4021f5a0: e34c22 s8i a2, a12, 227 +4021f5a3: e54c22 s8i a2, a12, 229 +4021f5a6: 324c22 s8i a2, a12, 50 +4021f5a9: ffe221 l32r a2, 4021f534 +4021f5ac: 181c42 l16ui a4, a12, 48 +4021f5af: 145c22 s16i a2, a12, 40 +4021f5b2: 330c movi.n a3, 3 +4021f5b4: fa7d21 l32r a2, 4021dfa8 +4021f5b7: 404c32 s8i a3, a12, 64 +4021f5ba: dfaf32 movi a3, -33 +4021f5bd: 104430 and a4, a4, a3 +4021f5c0: 136c22 s32i a2, a12, 76 +4021f5c3: a4d331 l32r a3, 40208910 +4021f5c6: ffdc21 l32r a2, 4021f538 +4021f5c9: 103430 and a3, a4, a3 +4021f5cc: 146c22 s32i a2, a12, 80 +4021f5cf: ffdb21 l32r a2, 4021f53c +4021f5d2: e24cd2 s8i a13, a12, 226 +4021f5d5: 1e0c movi.n a14, 1 +4021f5d7: 0d0c movi.n a13, 0 +4021f5d9: 185c32 s16i a3, a12, 48 +4021f5dc: 530c movi.n a3, 5 +4021f5de: e44ce2 s8i a14, a12, 228 +4021f5e1: fcd9 s32i.n a13, a12, 60 +4021f5e3: 3a4cd2 s8i a13, a12, 58 +4021f5e6: 017045 call0 40220cec +4021f5e9: ffd521 l32r a2, 4021f540 +4021f5ec: 630c movi.n a3, 6 +4021f5ee: 016fc5 call0 40220cec +4021f5f1: ffd431 l32r a3, 4021f544 +4021f5f4: fcb721 l32r a2, 4021e8d0 +4021f5f7: 204dd0 or a4, a13, a13 +4021f5fa: 936e01 l32r a0, 402043b4 +4021f5fd: 0000c0 callx0 a0 +4021f600: ffd231 l32r a3, 4021f548 +4021f603: fcb221 l32r a2, 4021e8cc +4021f606: 0d4d mov.n a4, a13 +4021f608: 936b01 l32r a0, 402043b4 +4021f60b: 0000c0 callx0 a0 +4021f60e: ffcf31 l32r a3, 4021f54c +4021f611: fcee21 l32r a2, 4021e9cc +4021f614: 0d4d mov.n a4, a13 +4021f616: 936701 l32r a0, 402043b4 +4021f619: 0000c0 callx0 a0 +4021f61c: ffcd31 l32r a3, 4021f550 +4021f61f: ff5521 l32r a2, 4021f374 +4021f622: 0d4d mov.n a4, a13 +4021f624: 936401 l32r a0, 402043b4 +4021f627: 0000c0 callx0 a0 +4021f62a: ffca31 l32r a3, 4021f554 +4021f62d: ff9f21 l32r a2, 4021f4ac +4021f630: 0d4d mov.n a4, a13 +4021f632: 936001 l32r a0, 402043b4 +4021f635: 0000c0 callx0 a0 +4021f638: ffc841 l32r a4, 4021f558 +4021f63b: ffc821 l32r a2, 4021f55c +4021f63e: 350c movi.n a5, 3 +4021f640: 14a032 movi a3, 20 +4021f643: d2b401 l32r a0, 40214114 +4021f646: 0000c0 callx0 a0 +4021f649: ff6105 call0 4021ec5c +4021f64c: 354ce2 s8i a14, a12, 53 +4021f64f: ffd285 call0 4021f378 +4021f652: 3108 l32i.n a0, a1, 12 +4021f654: 21c8 l32i.n a12, a1, 8 +4021f656: 11d8 l32i.n a13, a1, 4 +4021f658: 01e8 l32i.n a14, a1, 0 +4021f65a: 10c112 addi a1, a1, 16 +4021f65d: f00d ret.n +4021f65f: 080c00 excw +4021f662: 000000 ill +4021f665: 000180 ret +4021f668: fffff7 bbsi a15, 31, 4021f66b +4021f66b: 03 .byte 0x3 + +4021f66c : +4021f66c: b0c112 addi a1, a1, -80 +4021f66f: 1061e2 s32i a14, a1, 64 +4021f672: 74e020 extui a14, a2, 0, 8 +4021f675: 020c movi.n a2, 0 +4021f677: 1161d2 s32i a13, a1, 68 +4021f67a: 136102 s32i a0, a1, 76 +4021f67d: 1261c2 s32i a12, a1, 72 +4021f680: f1f9 s32i.n a15, a1, 60 +4021f682: 74d030 extui a13, a3, 0, 8 +4021f685: 4129 s32i.n a2, a1, 16 +4021f687: 391d27 beq a13, a2, 4021f6c4 +4021f68a: fc8031 l32r a3, 4021e88c +4021f68d: 370322 l8ui a2, a3, 55 +4021f690: 528c beqz.n a2, 4021f699 +4021f692: 240c movi.n a4, 2 +4021f694: 020c movi.n a2, 0 +4021f696: 000406 j 4021f6aa +4021f699: 380322 l8ui a2, a3, 56 +4021f69c: 040c movi.n a4, 0 +4021f69e: 62cc bnez.n a2, 4021f6a8 +4021f6a0: c328 l32i.n a2, a3, 48 +4021f6a2: 0e62f7 bbci a2, 15, 4021f6b4 +4021f6a5: 02a042 movi a4, 2 +4021f6a8: 120c movi.n a2, 1 +4021f6aa: 9342e0 movnez a4, a2, a14 +4021f6ad: 394342 s8i a4, a3, 57 +4021f6b0: 005086 j 4021f7f6 +4021f6b3: 120c00 excw +4021f6b6: 364322 s8i a2, a3, 54 +4021f6b9: 4e8c beqz.n a14, 4021f6c1 +4021f6bb: 374322 s8i a2, a3, 55 +4021f6be: 000086 j 4021f6c4 +4021f6c1: 384322 s8i a2, a3, 56 +4021f6c4: 00a042 movi a4, 0 +4021f6c7: 18a032 movi a3, 24 +4021f6ca: 10c122 addi a2, a1, 16 +4021f6cd: e69ec5 call0 402060bc +4021f6d0: 20c220 or a12, a2, a2 +4021f6d3: 12dc bnez.n a2, 4021f6e8 +4021f6d5: ffe241 l32r a4, 4021f660 +4021f6d8: fcf931 l32r a3, 4021eabc +4021f6db: fcf921 l32r a2, 4021eac0 +4021f6de: d3e101 l32r a0, 40214664 +4021f6e1: 0000c0 callx0 a0 +4021f6e4: ffff06 j 4021f6e4 +4021f6e7: 122800 excw +4021f6ea: 831c movi.n a3, 24 +4021f6ec: 12f8 l32i.n a15, a2, 4 +4021f6ee: 0f2d mov.n a2, a15 +4021f6f0: 995301 l32r a0, 40205c3c +4021f6f3: 0000c0 callx0 a0 +4021f6f6: 821c movi.n a2, 24 +4021f6f8: 0a5c22 s16i a2, a12, 20 +4021f6fb: 020c movi.n a2, 0 +4021f6fd: 0b5c22 s16i a2, a12, 22 +4021f700: 1c28 l32i.n a2, a12, 4 +4021f702: 8b1c31 l32r a3, 40202374 +4021f705: 0020c0 memw +4021f708: 0248 l32i.n a4, a2, 0 +4021f70a: 203430 or a3, a4, a3 +4021f70d: 0020c0 memw +4021f710: 0239 s32i.n a3, a2, 0 +4021f712: 0020c0 memw +4021f715: 0248 l32i.n a4, a2, 0 +4021f717: 8b1831 l32r a3, 40202378 +4021f71a: 203430 or a3, a4, a3 +4021f71d: 0020c0 memw +4021f720: 0239 s32i.n a3, a2, 0 +4021f722: 0020c0 memw +4021f725: 0248 l32i.n a4, a2, 0 +4021f727: 8b1531 l32r a3, 4020237c +4021f72a: 103430 and a3, a4, a3 +4021f72d: 0020c0 memw +4021f730: 0239 s32i.n a3, a2, 0 +4021f732: 0020c0 memw +4021f735: 0248 l32i.n a4, a2, 0 +4021f737: 8b1231 l32r a3, 40202380 +4021f73a: 104430 and a4, a4, a3 +4021f73d: ffc931 l32r a3, 4021f664 +4021f740: 203430 or a3, a4, a3 +4021f743: 0020c0 memw +4021f746: 0239 s32i.n a3, a2, 0 +4021f748: 890721 l32r a2, 40201b64 +4021f74b: 4288 l32i.n a8, a2, 16 +4021f74d: 020c movi.n a2, 0 +4021f74f: 8189 s32i.n a8, a1, 32 +4021f751: 00c605 call0 402203b4 +4021f754: ff1a71 l32r a7, 4021f3bc +4021f757: 8188 l32i.n a8, a1, 32 +4021f759: 026d mov.n a6, a2 +4021f75b: 050c movi.n a5, 0 +4021f75d: 844c movi.n a4, 72 +4021f75f: 0c3d mov.n a3, a12 +4021f761: 082d mov.n a2, a8 +4021f763: 0179 s32i.n a7, a1, 0 +4021f765: e302c5 call0 40202794 +4021f768: 8b0221 l32r a2, 40202370 +4021f76b: 9c48 l32i.n a4, a12, 36 +4021f76d: 0020c0 memw +4021f770: 0228 l32i.n a2, a2, 0 +4021f772: 1438 l32i.n a3, a4, 4 +4021f774: 6429 s32i.n a2, a4, 24 +4021f776: 8afd21 l32r a2, 4020236c +4021f779: 0458 l32i.n a5, a4, 0 +4021f77b: 102320 and a2, a3, a2 +4021f77e: 037c movi.n a3, -16 +4021f780: 103230 and a3, a2, a3 +4021f783: 620c movi.n a2, 6 +4021f785: 202320 or a2, a3, a2 +4021f788: ffb831 l32r a3, 4021f668 +4021f78b: 1429 s32i.n a2, a4, 4 +4021f78d: 412650 srli a2, a5, 6 +4021f790: 103230 and a3, a2, a3 +4021f793: 1133a0 slli a3, a3, 6 +4021f796: 542050 extui a2, a5, 0, 6 +4021f799: 202230 or a2, a2, a3 +4021f79c: fc3c31 l32r a3, 4021e88c +4021f79f: 0429 s32i.n a2, a4, 0 +4021f7a1: 430332 l8ui a3, a3, 67 +4021f7a4: d57c movi.n a5, -3 +4021f7a6: 043030 extui a3, a3, 0, 1 +4021f7a9: 1133f0 slli a3, a3, 1 +4021f7ac: 102250 and a2, a2, a5 +4021f7af: 202230 or a2, a2, a3 +4021f7b2: 0429 s32i.n a2, a4, 0 +4021f7b4: 020c movi.n a2, 0 +4021f7b6: 7c29 s32i.n a2, a12, 28 +4021f7b8: 341d27 beq a13, a2, 4021f7f0 +4021f7bb: 131e27 beq a14, a2, 4021f7d2 +4021f7be: 010f32 l8ui a3, a15, 1 +4021f7c1: 021c movi.n a2, 16 +4021f7c3: 202320 or a2, a3, a2 +4021f7c6: 014f22 s8i a2, a15, 1 +4021f7c9: 9c28 l32i.n a2, a12, 36 +4021f7cb: 032c movi.n a3, 32 +4021f7cd: 4239 s32i.n a3, a2, 16 +4021f7cf: 0000c6 j 4021f7d6 +4021f7d2: 024c movi.n a2, 64 +4021f7d4: 4429 s32i.n a2, a4, 16 +4021f7d6: fc7dd1 l32r a13, 4021e9cc +4021f7d9: 202dd0 or a2, a13, a13 +4021f7dc: 91f801 l32r a0, 40203fbc +4021f7df: 0000c0 callx0 a0 +4021f7e2: 150c movi.n a5, 1 +4021f7e4: 040c movi.n a4, 0 +4021f7e6: 733c movi.n a3, 55 +4021f7e8: 0d2d mov.n a2, a13 +4021f7ea: 91f301 l32r a0, 40203fb8 +4021f7ed: 0000c0 callx0 a0 +4021f7f0: 202cc0 or a2, a12, a12 +4021f7f3: 024a45 call0 40221c98 +4021f7f6: 132102 l32i a0, a1, 76 +4021f7f9: 1221c2 l32i a12, a1, 72 +4021f7fc: 1121d2 l32i a13, a1, 68 +4021f7ff: 1021e2 l32i a14, a1, 64 +4021f802: 0f21f2 l32i a15, a1, 60 +4021f805: 50c112 addi a1, a1, 80 +4021f808: 000080 ret +4021f80b: fddb00 excw +4021f80e: 124022 s8i a2, a0, 18 +4021f811: 02f0c1 l32r a12, 401e03d4 <_lit4_end+0xda0a8> +4021f814: c50361 l32r a6, 40210c20 +4021f817: 9f .byte 0x9f +4021f818: ff .byte 0xff +4021f819: b2dc bnez.n a2, 4021f838 +4021f81b: 130c movi.n a3, 1 +4021f81d: ffe4c5 call0 4021f66c +4021f820: fc1b41 l32r a4, 4021e88c +4021f823: e2d121 l32r a2, 40218368 +4021f826: 181432 l16ui a3, a4, 48 +4021f829: 103320 and a3, a3, a2 +4021f82c: fcef21 l32r a2, 4021ebe8 +4021f82f: 202320 or a2, a3, a2 +4021f832: 185422 s16i a2, a4, 48 +4021f835: 000206 j 4021f841 +4021f838: fff521 l32r a2, 4021f80c +4021f83b: 8a0401 l32r a0, 4020204c +4021f83e: 0000c0 callx0 a0 +4021f841: 3108 l32i.n a0, a1, 12 +4021f843: 10c112 addi a1, a1, 16 +4021f846: f00d ret.n +4021f848: 030c movi.n a3, 0 +4021f84a: f0c112 addi a1, a1, -16 +4021f84d: 032d mov.n a2, a3 +4021f84f: 3109 s32i.n a0, a1, 12 +4021f851: 21c9 s32i.n a12, a1, 8 +4021f853: f9db01 l32r a0, 4021dfc0 +4021f856: 0000c0 callx0 a0 +4021f859: fc0cc1 l32r a12, 4021e88c +4021f85c: 9cbf21 l32r a2, 40206b58 +4021f85f: 181c32 l16ui a3, a12, 48 +4021f862: 102320 and a2, a3, a2 +4021f865: 185c22 s16i a2, a12, 48 +4021f868: fc1a21 l32r a2, 4021e8d0 +4021f86b: 91d401 l32r a0, 40203fbc +4021f86e: 0000c0 callx0 a0 +4021f871: fc1621 l32r a2, 4021e8cc +4021f874: 91d201 l32r a0, 40203fbc +4021f877: 0000c0 callx0 a0 +4021f87a: cc38 l32i.n a3, a12, 48 +4021f87c: 202cc0 or a2, a12, a12 +4021f87f: 05e3c7 bbsi a3, 12, 4021f888 +4021f882: 370c42 l8ui a4, a12, 55 +4021f885: 005416 beqz a4, 4021f88e +4021f888: fff845 call0 4021f810 +4021f88b: 0007c6 j 4021f8ae +4021f88e: 040c movi.n a4, 0 +4021f890: 394c42 s8i a4, a12, 57 +4021f893: 181c42 l16ui a4, a12, 48 +4021f896: 0863d7 bbci a3, 13, 4021f8a2 +4021f899: ce1131 l32r a3, 402130e0 +4021f89c: 203430 or a3, a4, a3 +4021f89f: 000146 j 4021f8a8 +4021f8a2: e2b131 l32r a3, 40218368 +4021f8a5: 103430 and a3, a4, a3 +4021f8a8: 185232 s16i a3, a2, 48 +4021f8ab: 01cc85 call0 40221574 +4021f8ae: 032102 l32i a0, a1, 12 +4021f8b1: 0221c2 l32i a12, a1, 8 +4021f8b4: 10c112 addi a1, a1, 16 +4021f8b7: 000080 ret +4021f8ba: ce0000 excw +4021f8bd: 22fd excw +4021f8bf: 40 .byte 0x40 + +4021f8c0 : +4021f8c0: f0c112 addi a1, a1, -16 +4021f8c3: 21c9 s32i.n a12, a1, 8 +4021f8c5: fbf1c1 l32r a12, 4021e88c +4021f8c8: 3109 s32i.n a0, a1, 12 +4021f8ca: 0c2c22 l32i a2, a12, 48 +4021f8cd: 02e2d7 bbsi a2, 13, 4021f8d3 +4021f8d0: 002d46 j 4021f989 +4021f8d3: fbff21 l32r a2, 4021e8d0 +4021f8d6: 91b901 l32r a0, 40203fbc +4021f8d9: 0000c0 callx0 a0 +4021f8dc: fbfc21 l32r a2, 4021e8cc +4021f8df: 91b701 l32r a0, 40203fbc +4021f8e2: 0000c0 callx0 a0 +4021f8e5: 00a022 movi a2, 0 +4021f8e8: 181c32 l16ui a3, a12, 48 +4021f8eb: 364c22 s8i a2, a12, 54 +4021f8ee: 374c22 s8i a2, a12, 55 +4021f8f1: 919d21 l32r a2, 40203f68 +4021f8f4: 102320 and a2, a3, a2 +4021f8f7: 185c22 s16i a2, a12, 48 +4021f8fa: fc4021 l32r a2, 4021e9fc +4021f8fd: 000222 l8ui a2, a2, 0 +4021f900: 122266 bnei a2, 2, 4021f916 +4021f903: ff9105 call0 4021f214 +4021f906: c28c beqz.n a2, 4021f916 +4021f908: fd1321 l32r a2, 4021ed54 +4021f90b: 91ac01 l32r a0, 40203fbc +4021f90e: 0000c0 callx0 a0 +4021f911: 220c movi.n a2, 2 +4021f913: ff1b05 call0 4021eac4 +4021f916: 0c2c32 l32i a3, a12, 48 +4021f919: cdf121 l32r a2, 402130e0 +4021f91c: 102320 and a2, a3, a2 +4021f91f: f2d232 addmi a3, a2, 0xfffff200 +4021f922: 005316 beqz a3, 4021f92b +4021f925: 002216 beqz a2, 4021f92b +4021f928: fff1c5 call0 4021f848 +4021f92b: 0c2c32 l32i a3, a12, 48 +4021f92e: ffe321 l32r a2, 4021f8bc +4021f931: 243930 extui a3, a3, 9, 3 +4021f934: 89c601 l32r a0, 4020204c +4021f937: 0000c0 callx0 a0 +4021f93a: 181c32 l16ui a3, a12, 48 +4021f93d: a3f421 l32r a2, 40208910 +4021f940: f99a41 l32r a4, 4021dfa8 +4021f943: 102320 and a2, a3, a2 +4021f946: 00a032 movi a3, 0 +4021f949: 324c32 s8i a3, a12, 50 +4021f94c: 3fae32 movi a3, 0xfffffe3f +4021f94f: 103230 and a3, a2, a3 +4021f952: 020c movi.n a2, 0 +4021f954: bc29 s32i.n a2, a12, 44 +4021f956: 414c22 s8i a2, a12, 65 +4021f959: 6c29 s32i.n a2, a12, 24 +4021f95b: 4c29 s32i.n a2, a12, 16 +4021f95d: 5c29 s32i.n a2, a12, 20 +4021f95f: 8c29 s32i.n a2, a12, 32 +4021f961: e27c movi.n a2, -2 +4021f963: 102320 and a2, a3, a2 +4021f966: 185c22 s16i a2, a12, 48 +4021f969: 136c42 s32i a4, a12, 76 +4021f96c: fef341 l32r a4, 4021f538 +4021f96f: cc38 l32i.n a3, a12, 48 +4021f971: cddb21 l32r a2, 402130e0 +4021f974: 146c42 s32i a4, a12, 80 +4021f977: 0e0327 bnone a3, a2, 4021f989 +4021f97a: 181c32 l16ui a3, a12, 48 +4021f97d: e27a21 l32r a2, 40218368 +4021f980: 102320 and a2, a3, a2 +4021f983: 185c22 s16i a2, a12, 48 +4021f986: 01bec5 call0 40221574 +4021f989: 3108 l32i.n a0, a1, 12 +4021f98b: 21c8 l32i.n a12, a1, 8 +4021f98d: 10c112 addi a1, a1, 16 +4021f990: f00d ret.n +4021f992: 000000 ill +4021f995: 0e .byte 0xe +4021f996: 00ff00 excw +4021f999: 000a add.n a0, a0, a0 +4021f99b: 3c08 l32i.n a0, a12, 12 +4021f99d: 0f .byte 0xf +4021f99e: b40000 extui a0, a0, 0, 12 +4021f9a1: 002d mov.n a2, a0 +4021f9a3: 0c1b00 excw +4021f9a6: cb0000 excw +4021f9a9: 000010 excw +4021f9ac: f0c112 addi a1, a1, -16 +4021f9af: 21c9 s32i.n a12, a1, 8 +4021f9b1: fbb6c1 l32r a12, 4021e88c +4021f9b4: 036102 s32i a0, a1, 12 +4021f9b7: 11d9 s32i.n a13, a1, 4 +4021f9b9: 0c2c42 l32i a4, a12, 48 +4021f9bc: fff631 l32r a3, 4021f994 +4021f9bf: fff621 l32r a2, 4021f998 +4021f9c2: 103430 and a3, a4, a3 +4021f9c5: 0b1327 beq a3, a2, 4021f9d4 +4021f9c8: cdc621 l32r a2, 402130e0 +4021f9cb: b75631 l32r a3, 4020d724 +4021f9ce: 102420 and a2, a4, a2 +4021f9d1: 7f9237 bne a2, a3, 4021fa54 +4021f9d4: 731cd2 l16ui a13, a12, 230 +4021f9d7: dd1b addi.n a13, a13, 1 +4021f9d9: f4d0d0 extui a13, a13, 0, 16 +4021f9dc: 735cd2 s16i a13, a12, 230 +4021f9df: 069d16 beqz a13, 4021fa4c +4021f9e2: 741c22 l16ui a2, a12, 232 +4021f9e5: 0d3d mov.n a3, a13 +4021f9e7: 893901 l32r a0, 40201ecc +4021f9ea: 0000c0 callx0 a0 +4021f9ed: f42020 extui a2, a2, 0, 16 +4021f9f0: a30c movi.n a3, 10 +4021f9f2: 07b327 bgeu a3, a2, 4021f9fd +4021f9f5: d31c movi.n a3, 29 +4021f9f7: 223327 bltu a3, a2, 4021fa1d +4021f9fa: 000fc6 j 4021fa3d +4021f9fd: 132c32 l32i a3, a12, 76 +4021fa00: ffe741 l32r a4, 4021f99c +4021fa03: 053437 bltu a4, a3, 4021fa0c +4021fa06: 64c332 addi a3, a3, 100 +4021fa09: 136c32 s32i a3, a12, 76 +4021fa0c: 142c32 l32i a3, a12, 80 +4021fa0f: ffe441 l32r a4, 4021f9a0 +4021fa12: df3437 bltu a4, a3, 4021f9f5 +4021fa15: 2ca122 movi a2, 0x12c +4021fa18: 000706 j 4021fa38 +4021fa1b: 220000 excw +4021fa1e: 132c movi.n a3, 33 +4021fa20: ffe131 l32r a3, 4021f9a4 +4021fa23: 05b327 bgeu a3, a2, 4021fa2c +4021fa26: 9cc222 addi a2, a2, -100 +4021fa29: 136c22 s32i a2, a12, 76 +4021fa2c: 142c32 l32i a3, a12, 80 +4021fa2f: ffde21 l32r a2, 4021f9a8 +4021fa32: 07b237 bgeu a2, a3, 4021fa3d +4021fa35: d4ae22 movi a2, 0xfffffed4 +4021fa38: 232a add.n a2, a3, a2 +4021fa3a: 146c22 s32i a2, a12, 80 +4021fa3d: 020c movi.n a2, 0 +4021fa3f: 745c22 s16i a2, a12, 232 +4021fa42: 0b1d26 beqi a13, 1, 4021fa51 +4021fa45: ffe005 call0 4021f848 +4021fa48: 000206 j 4021fa54 +4021fa4b: 020c00 excw +4021fa4e: 745c22 s16i a2, a12, 232 +4021fa51: fee805 call0 4021e8d4 +4021fa54: 3108 l32i.n a0, a1, 12 +4021fa56: 21c8 l32i.n a12, a1, 8 +4021fa58: 11d8 l32i.n a13, a1, 4 +4021fa5a: 10c112 addi a1, a1, 16 +4021fa5d: f00d ret.n +4021fa5f: c11200 mul16u a1, a2, a0 +4021fa62: 8a21f0 excw +4021fa65: c9fb addi.n a12, a9, 15 +4021fa67: 11d921 l32r a2, 401e41cc <_lit4_end+0xddea0> +4021fa6a: 3109 s32i.n a0, a1, 12 +4021fa6c: 181242 l16ui a4, a2, 48 +4021fa6f: 9c3a31 l32r a3, 40206b58 +4021fa72: 02cd mov.n a12, a2 +4021fa74: 103430 and a3, a4, a3 +4021fa77: 185232 s16i a3, a2, 48 +4021fa7a: fbe031 l32r a3, 4021e9fc +4021fa7d: 000342 l8ui a4, a3, 0 +4021fa80: 20d330 or a13, a3, a3 +4021fa83: 022466 bnei a4, 2, 4021fa89 +4021fa86: ffd885 call0 4021f810 +4021fa89: 000d22 l8ui a2, a13, 0 +4021fa8c: 5c1266 bnei a2, 1, 4021faec +4021fa8f: cc38 l32i.n a3, a12, 48 +4021fa91: cd9321 l32r a2, 402130e0 +4021fa94: 92de41 l32r a4, 4020460c +4021fa97: 102320 and a2, a3, a2 +4021fa9a: 131247 beq a2, a4, 4021fab1 +4021fa9d: fc0731 l32r a3, 4021eabc +4021faa0: fc0821 l32r a2, 4021eac0 +4021faa3: 13a742 movi a4, 0x713 +4021faa6: d2ef01 l32r a0, 40214664 +4021faa9: 0000c0 callx0 a0 +4021faac: ffff06 j 4021faac +4021faaf: c70000 excw +4021fab2: 223763 excw +4021fab5: 360c movi.n a6, 3 +4021fab7: e2dc bnez.n a2, 4021fad9 +4021fab9: fedd45 call0 4021e890 +4021fabc: 628c beqz.n a2, 4021fac6 +4021fabe: ff0f85 call0 4021ebb8 +4021fac1: 0009c6 j 4021faec +4021fac4: 0c0000 excw +4021fac7: 233003 excw +4021faca: 3d0120 excw +4021facd: c0f9 s32i.n a15, a0, 48 +4021facf: 050000 extui a0, a0, 16, 1 +4021fad2: 06fee0 excw +4021fad5: 000005 call0 4021fad8 +4021fad8: f83100 excw +4021fadb: 21fb addi.n a2, a1, 15 +4021fadd: fbf9 s32i.n a15, a11, 60 +4021fadf: 29a742 movi a4, 0x729 +4021fae2: d2e001 l32r a0, 40214664 +4021fae5: 0000c0 callx0 a0 +4021fae8: ffff06 j 4021fae8 +4021faeb: 310800 srai a0, a0, 24 +4021faee: 21c8 l32i.n a12, a1, 8 +4021faf0: 11d8 l32i.n a13, a1, 4 +4021faf2: 10c112 addi a1, a1, 16 +4021faf5: f00d ret.n +4021faf7: fdf300 excw +4021fafa: 124022 s8i a2, a0, 18 +4021fafd: 09f0c1 l32r a12, 401e22c0 <_lit4_end+0xdbf94> +4021fb00: 710531 l32r a3, 401fbf14 <_lit4_end+0xf5be8> +4021fb03: ff .byte 0xff +4021fb04: d2dc bnez.n a2, 4021fb25 +4021fb06: 130c movi.n a3, 1 +4021fb08: 032d mov.n a2, a3 +4021fb0a: ffb605 call0 4021f66c +4021fb0d: fb5f41 l32r a4, 4021e88c +4021fb10: e21621 l32r a2, 40218368 +4021fb13: 181432 l16ui a3, a4, 48 +4021fb16: 103320 and a3, a3, a2 +4021fb19: 00a222 movi a2, 0x200 +4021fb1c: 202320 or a2, a3, a2 +4021fb1f: 185422 s16i a2, a4, 48 +4021fb22: 000206 j 4021fb2e +4021fb25: fff421 l32r a2, 4021faf8 +4021fb28: 894901 l32r a0, 4020204c +4021fb2b: 0000c0 callx0 a0 +4021fb2e: 3108 l32i.n a0, a1, 12 +4021fb30: 10c112 addi a1, a1, 16 +4021fb33: f00d ret.n +4021fb35: 000000 ill +4021fb38: 8e19 s32i.n a1, a14, 32 +4021fb3a: fe .byte 0xfe +4021fb3b: 3f .byte 0x3f +4021fb3c: f0c112 addi a1, a1, -16 +4021fb3f: 01e9 s32i.n a14, a1, 0 +4021fb41: 02ed mov.n a14, a2 +4021fb43: fba221 l32r a2, 4021e9cc +4021fb46: 21c9 s32i.n a12, a1, 8 +4021fb48: 036102 s32i a0, a1, 12 +4021fb4b: 0161d2 s32i a13, a1, 4 +4021fb4e: 911b01 l32r a0, 40203fbc +4021fb51: 0000c0 callx0 a0 +4021fb54: fb4ec1 l32r a12, 4021e88c +4021fb57: cd6221 l32r a2, 402130e0 +4021fb5a: cc38 l32i.n a3, a12, 48 +4021fb5c: 028327 bany a3, a2, 4021fb62 +4021fb5f: 002346 j 4021fbf0 +4021fb62: fff5d1 l32r a13, 4021fb38 +4021fb65: 020c movi.n a2, 0 +4021fb67: 364c22 s8i a2, a12, 54 +4021fb6a: 384c22 s8i a2, a12, 56 +4021fb6d: 000d22 l8ui a2, a13, 0 +4021fb70: f30c movi.n a3, 15 +4021fb72: 08b327 bgeu a3, a2, 4021fb7e +4021fb75: 092e22 l32i a2, a14, 36 +4021fb78: 01a032 movi a3, 1 +4021fb7b: 0f4232 s8i a3, a2, 15 +4021fb7e: 9e28 l32i.n a2, a14, 36 +4021fb80: 0f0222 l8ui a2, a2, 15 +4021fb83: 491226 beqi a2, 1, 4021fbd0 +4021fb86: 910b01 l32r a0, 40203fb4 +4021fb89: 0000c0 callx0 a0 +4021fb8c: 390c22 l8ui a2, a12, 57 +4021fb8f: 051266 bnei a2, 1, 4021fb98 +4021fb92: 020c movi.n a2, 0 +4021fb94: 0001c6 j 4021fb9f +4021fb97: cc2800 excw +4021fb9a: 0762f7 bbci a2, 15, 4021fba5 +4021fb9d: 220c movi.n a2, 2 +4021fb9f: 394c22 s8i a2, a12, 57 +4021fba2: 001286 j 4021fbf0 +4021fba5: fe0531 l32r a3, 4021f3bc +4021fba8: 430c22 l8ui a2, a12, 67 +4021fbab: 031a85 call0 40222d54 +4021fbae: 00b256 bnez a2, 4021fbbd +4021fbb1: 020c movi.n a2, 0 +4021fbb3: 394c22 s8i a2, a12, 57 +4021fbb6: ff0345 call0 4021ebec +4021fbb9: 000cc6 j 4021fbf0 +4021fbbc: 0d2200 excw +4021fbbf: 130c00 excw +4021fbc2: 221b addi.n a2, a2, 1 +4021fbc4: 004d22 s8i a2, a13, 0 +4021fbc7: 020c movi.n a2, 0 +4021fbc9: ffaa05 call0 4021f66c +4021fbcc: 000806 j 4021fbf0 +4021fbcf: 020c00 excw +4021fbd2: 004d22 s8i a2, a13, 0 +4021fbd5: 181c32 l16ui a3, a12, 48 +4021fbd8: 90e421 l32r a2, 40203f68 +4021fbdb: 102320 and a2, a3, a2 +4021fbde: 185c22 s16i a2, a12, 48 +4021fbe1: 390c22 l8ui a2, a12, 57 +4021fbe4: c91266 bnei a2, 1, 4021fbb1 +4021fbe7: cc28 l32i.n a2, a12, 48 +4021fbe9: a5e2d7 bbsi a2, 13, 4021fb92 +4021fbec: fff046 j 4021fbb1 +4021fbef: 310800 srai a0, a0, 24 +4021fbf2: 21c8 l32i.n a12, a1, 8 +4021fbf4: 11d8 l32i.n a13, a1, 4 +4021fbf6: 01e8 l32i.n a14, a1, 0 +4021fbf8: 10c112 addi a1, a1, 16 +4021fbfb: f00d ret.n +4021fbfd: 000000 ill +4021fc00: af .byte 0xaf +4021fc01: 000036 excw +4021fc04: 8e18 l32i.n a1, a14, 32 +4021fc06: fe .byte 0xfe +4021fc07: 3f .byte 0x3f +4021fc08: f0c112 addi a1, a1, -16 +4021fc0b: 11d9 s32i.n a13, a1, 4 +4021fc0d: 02dd mov.n a13, a2 +4021fc0f: fb6f21 l32r a2, 4021e9cc +4021fc12: 21c9 s32i.n a12, a1, 8 +4021fc14: 3109 s32i.n a0, a1, 12 +4021fc16: 90e901 l32r a0, 40203fbc +4021fc19: 0000c0 callx0 a0 +4021fc1c: fb1cc1 l32r a12, 4021e88c +4021fc1f: cd3021 l32r a2, 402130e0 +4021fc22: cc38 l32i.n a3, a12, 48 +4021fc24: 028327 bany a3, a2, 4021fc2a +4021fc27: 003846 j 4021fd0c +4021fc2a: 020c movi.n a2, 0 +4021fc2c: 364c22 s8i a2, a12, 54 +4021fc2f: 374c22 s8i a2, a12, 55 +4021fc32: 9d38 l32i.n a3, a13, 36 +4021fc34: 0f0332 l8ui a3, a3, 15 +4021fc37: 5d1326 beqi a3, 1, 4021fc98 +4021fc3a: 90de01 l32r a0, 40203fb4 +4021fc3d: 0000c0 callx0 a0 +4021fc40: 390c22 l8ui a2, a12, 57 +4021fc43: 0a2266 bnei a2, 2, 4021fc51 +4021fc46: 020c movi.n a2, 0 +4021fc48: 394c22 s8i a2, a12, 57 +4021fc4b: ffbc45 call0 4021f810 +4021fc4e: 002e86 j 4021fd0c +4021fc51: cc28 l32i.n a2, a12, 48 +4021fc53: 05e2d7 bbsi a2, 13, 4021fc5c +4021fc56: 020c movi.n a2, 0 +4021fc58: 000146 j 4021fc61 +4021fc5b: 62f700 excw +4021fc5e: 120c07 bnone a12, a0, 4021fc74 +4021fc61: 394c22 s8i a2, a12, 57 +4021fc64: 002906 j 4021fd0c +4021fc67: fec285 call0 4021e890 +4021fc6a: ffe531 l32r a3, 4021fc00 +4021fc6d: 073327 bltu a3, a2, 4021fc78 +4021fc70: 020c movi.n a2, 0 +4021fc72: 394c22 s8i a2, a12, 57 +4021fc75: 001e06 j 4021fcf1 +4021fc78: ffe321 l32r a2, 4021fc04 +4021fc7b: 000232 l8ui a3, a2, 0 +4021fc7e: 431b addi.n a4, a3, 1 +4021fc80: 004242 s8i a4, a2, 0 +4021fc83: e40c movi.n a4, 14 +4021fc85: 04b437 bgeu a4, a3, 4021fc8d +4021fc88: e30c movi.n a3, 14 +4021fc8a: 004232 s8i a3, a2, 0 +4021fc8d: 130c movi.n a3, 1 +4021fc8f: 032d mov.n a2, a3 +4021fc91: ff9d85 call0 4021f66c +4021fc94: 001d06 j 4021fd0c +4021fc97: db3100 excw +4021fc9a: ff .byte 0xff +4021fc9b: 004322 s8i a2, a3, 0 +4021fc9e: 181c32 l16ui a3, a12, 48 +4021fca1: 90bf21 l32r a2, 40203fa0 +4021fca4: 202320 or a2, a3, a2 +4021fca7: 185c22 s16i a2, a12, 48 +4021fcaa: 390c22 l8ui a2, a12, 57 +4021fcad: 952226 beqi a2, 2, 4021fc46 +4021fcb0: 020c movi.n a2, 0 +4021fcb2: 394c22 s8i a2, a12, 57 +4021fcb5: cc38 l32i.n a3, a12, 48 +4021fcb7: cd0a21 l32r a2, 402130e0 +4021fcba: 00a242 movi a4, 0x200 +4021fcbd: 102320 and a2, a3, a2 +4021fcc0: 359247 bne a2, a4, 4021fcf9 +4021fcc3: 12e3d7 bbsi a3, 13, 4021fcd9 +4021fcc6: fb7d31 l32r a3, 4021eabc +4021fcc9: fb7d21 l32r a2, 4021eac0 +4021fccc: 2da642 movi a4, 0x62d +4021fccf: d26501 l32r a0, 40214664 +4021fcd2: 0000c0 callx0 a0 +4021fcd5: ffff06 j 4021fcd5 +4021fcd8: bb4500 excw +4021fcdb: fe .byte 0xfe +4021fcdc: 628c beqz.n a2, 4021fce6 +4021fcde: feed85 call0 4021ebb8 +4021fce1: 0009c6 j 4021fd0c +4021fce4: 0c0000 excw +4021fce7: 233003 excw +4021fcea: b50120 extui a0, a2, 17, 12 +4021fced: c0f8 l32i.n a15, a0, 48 +4021fcef: 050000 extui a0, a0, 16, 1 +4021fcf2: be .byte 0xbe +4021fcf3: fe .byte 0xfe +4021fcf4: 000506 j 4021fd0c +4021fcf7: 310000 srai a0, a0, 16 +4021fcfa: 21fb70 srai a15, a7, 11 +4021fcfd: 42fb71 l32r a7, 401f08ec <_lit4_end+0xea5c0> +4021fd00: 0136a6 blti a6, 3, 4021fd05 +4021fd03: d258 l32i.n a5, a2, 52 +4021fd05: 0000c0 callx0 a0 +4021fd08: ffff06 j 4021fd08 +4021fd0b: 310800 srai a0, a0, 24 +4021fd0e: 21c8 l32i.n a12, a1, 8 +4021fd10: 11d8 l32i.n a13, a1, 4 +4021fd12: 10c112 addi a1, a1, 16 +4021fd15: f00d ret.n + ... + +4021fd18 : +4021fd18: fadd21 l32r a2, 4021e88c +4021fd1b: 140c movi.n a4, 1 +4021fd1d: c238 l32i.n a3, a2, 48 +4021fd1f: f89b21 l32r a2, 4021df8c +4021fd22: 102320 and a2, a3, a2 +4021fd25: d2d232 addmi a3, a2, 0xffffd200 +4021fd28: 020c movi.n a2, 0 +4021fd2a: 832430 moveqz a2, a4, a3 +4021fd2d: f00d ret.n +4021fd2f: 8e4000 excw +4021fd32: fe .byte 0xfe +4021fd33: 3f .byte 0x3f +4021fd34: fe8e43 excw +4021fd37: 3f .byte 0x3f +4021fd38: f0c112 addi a1, a1, -16 +4021fd3b: 0238 l32i.n a3, a2, 0 +4021fd3d: 21c9 s32i.n a12, a1, 8 +4021fd3f: 3109 s32i.n a0, a1, 12 +4021fd41: 02cd mov.n a12, a2 +4021fd43: 5e1326 beqi a3, 1, 4021fda5 +4021fd46: 73ac beqz.n a3, 4021fd71 +4021fd48: 022326 beqi a3, 2, 4021fd4e +4021fd4b: 002506 j 4021fde3 +4021fd4e: 955401 l32r a0, 402052a0 +4021fd51: 0000c0 callx0 a0 +4021fd54: 0c28 l32i.n a2, a12, 0 +4021fd56: fff631 l32r a3, 4021fd30 +4021fd59: 232a add.n a2, a3, a2 +4021fd5b: 000232 l8ui a3, a2, 0 +4021fd5e: 330b addi.n a3, a3, -1 +4021fd60: 004232 s8i a3, a2, 0 +4021fd63: 955001 l32r a0, 402052a4 +4021fd66: 0000c0 callx0 a0 +4021fd69: ff60c5 call0 4021f378 +4021fd6c: 001cc6 j 4021fde3 +4021fd6f: 310000 srai a0, a0, 16 +4021fd72: ef .byte 0xef +4021fd73: ff .byte 0xff +4021fd74: 000322 l8ui a2, a3, 0 +4021fd77: ffc222 addi a2, a2, -1 +4021fd7a: 004322 s8i a2, a3, 0 +4021fd7d: 01a022 movi a2, 1 +4021fd80: 018085 call0 4022158c +4021fd83: 05c256 bnez a2, 4021fde3 +4021fd86: fff905 call0 4021fd18 +4021fd89: 056216 beqz a2, 4021fde3 +4021fd8c: fac021 l32r a2, 4021e88c +4021fd8f: e40222 l8ui a2, a2, 228 +4021fd92: 4d1266 bnei a2, 1, 4021fde3 +4021fd95: ffe721 l32r a2, 4021fd34 +4021fd98: 01a032 movi a3, 1 +4021fd9b: 004232 s8i a3, a2, 0 +4021fd9e: ffd5c5 call0 4021fafc +4021fda1: 000f86 j 4021fde3 +4021fda4: e23100 excw +4021fda7: ff .byte 0xff +4021fda8: 010322 l8ui a2, a3, 1 +4021fdab: ffc222 addi a2, a2, -1 +4021fdae: 014322 s8i a2, a3, 1 +4021fdb1: fab621 l32r a2, 4021e88c +4021fdb4: 0c2222 l32i a2, a2, 48 +4021fdb7: 2862d7 bbci a2, 13, 4021fde3 +4021fdba: fb8b31 l32r a3, 4021ebe8 +4021fdbd: 102230 and a2, a2, a3 +4021fdc0: 1f1237 beq a2, a3, 4021fde3 +4021fdc3: fb0e21 l32r a2, 4021e9fc +4021fdc6: 000222 l8ui a2, a2, 0 +4021fdc9: 132266 bnei a2, 2, 4021fde0 +4021fdcc: fbe221 l32r a2, 4021ed54 +4021fdcf: 907b01 l32r a0, 40203fbc +4021fdd2: 0000c0 callx0 a0 +4021fdd5: ff43c5 call0 4021f214 +4021fdd8: 428c beqz.n a2, 4021fde0 +4021fdda: 02a022 movi a2, 2 +4021fddd: fece45 call0 4021eac4 +4021fde0: ffa645 call0 4021f848 +4021fde3: 3108 l32i.n a0, a1, 12 +4021fde5: 21c8 l32i.n a12, a1, 8 +4021fde7: 10c112 addi a1, a1, 16 +4021fdea: f00d ret.n +4021fdec: 000871 l32r a7, 401dfe0c <_lit4_end+0xd9ae0> +4021fdef: 087800 excw +4021fdf2: 210000 srai a0, a0, 0 +4021fdf5: 12faa6 blti a10, 0x100, 4021fe0b +4021fdf8: 09f0c1 l32r a12, 401e25b8 <_lit4_end+0xdc28c> +4021fdfb: 123231 l32r a3, 401e46c4 <_lit4_end+0xde398> +4021fdfe: 3018 l32i.n a1, a0, 12 +4021fe00: 32e430 excw +4021fe03: 321852 l16ui a5, a8, 100 +4021fe06: d70c22 l8ui a2, a12, 215 +4021fe09: 427963 excw +4021fe0c: 563602 excw +4021fe0f: 420734 excw +4021fe12: 663902 excw +4021fe15: 422d14 excw +4021fe18: 4200a0 excw +4021fe1b: 213942 excw +4021fe1e: 20ccb0 or a12, a12, a11 +4021fe21: 321023 excw +4021fe24: 3700a2 l8ui a10, a0, 55 +4021fe27: 411212 l16ui a1, a2, 130 +4021fe2a: 31fff0 srai a15, a15, 31 +4021fe2d: 21fb24 excw +4021fe30: 01fb24 excw +4021fe33: d20c movi.n a2, 13 +4021fe35: 0000c0 callx0 a0 +4021fe38: ffff06 j 4021fe38 +4021fe3b: 130c00 excw +4021fe3e: 032d mov.n a2, a3 +4021fe40: 000b46 j 4021fe71 +4021fe43: 660000 excw +4021fe46: 0c3024 excw +4021fe49: 424204 excw +4021fe4c: 2139 s32i.n a3, a1, 8 +4021fe4e: 20cca4 excw +4021fe51: 311023 excw +4021fe54: 37fb65 excw +4021fe57: 411312 l16ui a1, a3, 130 +4021fe5a: 31ffe5 excw +4021fe5d: fb18 l32i.n a1, a11, 60 +4021fe5f: fb1821 l32r a2, 4021eac0 +4021fe62: d20001 l32r a0, 40214664 +4021fe65: 0000c0 callx0 a0 +4021fe68: ffff06 j 4021fe68 +4021fe6b: 0c0000 excw +4021fe6e: 020c13 excw +4021fe71: ff7f85 call0 4021f66c +4021fe74: 000346 j 4021fe85 +4021fe77: c50000 extui a0, a0, 16, 13 +4021fe7a: ffe9 s32i.n a14, a15, 60 +4021fe7c: 005216 beqz a2, 4021fe85 +4021fe7f: 00d845 call0 40220c04 +4021fe82: 00da45 call0 40220c28 +4021fe85: 032102 l32i a0, a1, 12 +4021fe88: 10c112 addi a1, a1, 16 +4021fe8b: f00d ret.n +4021fe8d: 000000 ill +4021fe90: 22fda2 excw +4021fe93: 40 .byte 0x40 + +4021fe94 : +4021fe94: ffff21 l32r a2, 4021fe90 +4021fe97: f0c112 addi a1, a1, -16 +4021fe9a: 036102 s32i a0, a1, 12 +4021fe9d: 886b01 l32r a0, 4020204c +4021fea0: 0000c0 callx0 a0 +4021fea3: fa7a31 l32r a3, 4021e88c +4021fea6: c85a21 l32r a2, 40212010 +4021fea9: 181342 l16ui a4, a3, 48 +4021feac: 202420 or a2, a4, a2 +4021feaf: 185322 s16i a2, a3, 48 +4021feb2: 00d505 call0 40220c04 +4021feb5: 032102 l32i a0, a1, 12 +4021feb8: 10c112 addi a1, a1, 16 +4021febb: 000080 ret + ... + +4021fec0 : +4021fec0: f0c112 addi a1, a1, -16 +4021fec3: 3109 s32i.n a0, a1, 12 +4021fec5: fff2c5 call0 4021fdf4 +4021fec8: 3108 l32i.n a0, a1, 12 +4021feca: 10c112 addi a1, a1, 16 +4021fecd: f00d ret.n +4021fecf: fd9d00 excw +4021fed2: 22 .byte 0x22 +4021fed3: 40 .byte 0x40 + +4021fed4 : +4021fed4: ffff21 l32r a2, 4021fed0 +4021fed7: f0c112 addi a1, a1, -16 +4021feda: 3109 s32i.n a0, a1, 12 +4021fedc: 885c01 l32r a0, 4020204c +4021fedf: 0000c0 callx0 a0 +4021fee2: fff105 call0 4021fdf4 +4021fee5: 3108 l32i.n a0, a1, 12 +4021fee7: 10c112 addi a1, a1, 16 +4021feea: f00d ret.n + +4021feec : +4021feec: fa6821 l32r a2, 4021e88c +4021feef: 130c movi.n a3, 1 +4021fef1: c228 l32i.n a2, a2, 48 +4021fef3: 042f20 extui a2, a2, 15, 1 +4021fef6: 302230 xor a2, a2, a3 +4021fef9: f00d ret.n + ... + +4021fefc : +4021fefc: fa6441 l32r a4, 4021e88c +4021feff: cc7851 l32r a5, 402130e0 +4021ff02: c438 l32i.n a3, a4, 48 +4021ff04: 742020 extui a2, a2, 0, 8 +4021ff07: 105350 and a5, a3, a5 +4021ff0a: f2d532 addmi a3, a5, 0xfffff200 +4021ff0d: f38c beqz.n a3, 4021ff20 +4021ff0f: d58c beqz.n a5, 4021ff20 +4021ff11: 430432 l8ui a3, a4, 67 +4021ff14: 140c movi.n a4, 1 +4021ff16: c03320 sub a3, a3, a2 +4021ff19: 020c movi.n a2, 0 +4021ff1b: 932430 movnez a2, a4, a3 +4021ff1e: f00d ret.n +4021ff20: 120c movi.n a2, 1 +4021ff22: f00d ret.n + +4021ff24 : +4021ff24: 011242 l16ui a4, a2, 2 +4021ff27: 023d mov.n a3, a2 +4021ff29: f27c movi.n a2, -1 +4021ff2b: 94cc bnez.n a4, 4021ff38 +4021ff2d: fa5721 l32r a2, 4021e88c +4021ff30: 021332 l16ui a3, a3, 4 +4021ff33: 255232 s16i a3, a2, 74 +4021ff36: 020c movi.n a2, 0 +4021ff38: f00d ret.n + ... + +4021ff3c : +4021ff3c: f0c112 addi a1, a1, -16 +4021ff3f: fa5341 l32r a4, 4021e88c +4021ff42: 3109 s32i.n a0, a1, 12 +4021ff44: 434422 s8i a2, a4, 67 +4021ff47: fd1d21 l32r a2, 4021f3bc +4021ff4a: 640c movi.n a4, 6 +4021ff4c: 843201 l32r a0, 40201014 <_irom0_text_start+0x4> +4021ff4f: 0000c0 callx0 a0 +4021ff52: 3108 l32i.n a0, a1, 12 +4021ff54: 10c112 addi a1, a1, 16 +4021ff57: f00d ret.n +4021ff59: 000000 ill + +4021ff5c : +4021ff5c: fa4c31 l32r a3, 4021e88c +4021ff5f: f0c112 addi a1, a1, -16 +4021ff62: 3109 s32i.n a0, a1, 12 +4021ff64: c348 l32i.n a4, a3, 48 +4021ff66: 030c movi.n a3, 0 +4021ff68: 1164d7 bbci a4, 13, 4021ff7d +4021ff6b: fd1431 l32r a3, 4021f3bc +4021ff6e: 640c movi.n a4, 6 +4021ff70: 872b01 l32r a0, 40201c1c +4021ff73: 0000c0 callx0 a0 +4021ff76: 030c movi.n a3, 0 +4021ff78: 140c movi.n a4, 1 +4021ff7a: 833420 moveqz a3, a4, a2 +4021ff7d: 3108 l32i.n a0, a1, 12 +4021ff7f: 032d mov.n a2, a3 +4021ff81: 10c112 addi a1, a1, 16 +4021ff84: f00d ret.n + ... + +4021ff88 : +4021ff88: f0c112 addi a1, a1, -16 +4021ff8b: 21c9 s32i.n a12, a1, 8 +4021ff8d: 02cd mov.n a12, a2 +4021ff8f: fa3f21 l32r a2, 4021e88c +4021ff92: 036102 s32i a0, a1, 12 +4021ff95: 350222 l8ui a2, a2, 53 +4021ff98: 82bc beqz.n a2, 4021ffd4 +4021ff9a: 94c101 l32r a0, 402052a0 +4021ff9d: 0000c0 callx0 a0 +4021ffa0: ff6441 l32r a4, 4021fd30 +4021ffa3: 24ca add.n a2, a4, a12 +4021ffa5: 000222 l8ui a2, a2, 0 +4021ffa8: 928c beqz.n a2, 4021ffb5 +4021ffaa: 94be01 l32r a0, 402052a4 +4021ffad: 0000c0 callx0 a0 +4021ffb0: 020c movi.n a2, 0 +4021ffb2: 000786 j 4021ffd4 +4021ffb5: 44ca add.n a4, a4, a12 +4021ffb7: 120c movi.n a2, 1 +4021ffb9: 004422 s8i a2, a4, 0 +4021ffbc: 94ba01 l32r a0, 402052a4 +4021ffbf: 0000c0 callx0 a0 +4021ffc2: 040c movi.n a4, 0 +4021ffc4: 203cc0 or a3, a12, a12 +4021ffc7: 14a022 movi a2, 20 +4021ffca: 919701 l32r a0, 40204628 +4021ffcd: 0000c0 callx0 a0 +4021ffd0: 000006 j 4021ffd4 +4021ffd3: 310800 srai a0, a0, 24 +4021ffd6: 21c8 l32i.n a12, a1, 8 +4021ffd8: 10c112 addi a1, a1, 16 +4021ffdb: f00d ret.n +4021ffdd: 000000 ill +4021ffe0: 22fdb1 l32r a11, 401e8bd4 <_lit4_end+0xe28a8> +4021ffe3: 8e6040 excw +4021ffe6: fe .byte 0xfe +4021ffe7: 3f .byte 0x3f +4021ffe8: 0186a0 slli a8, a6, 22 +4021ffeb: 8e1c00 excw +4021ffee: fe .byte 0xfe +4021ffef: 3f .byte 0x3f +4021fff0: fe8e44 excw +4021fff3: 3f .byte 0x3f +4021fff4: 8e1b addi.n a8, a14, 1 +4021fff6: fe .byte 0xfe +4021fff7: 3f .byte 0x3f +4021fff8: 5e .byte 0x5e +4021fff9: 3ffe80 excw +4021fffc: 8e1a add.n a8, a14, a1 +4021fffe: fe .byte 0xfe +4021ffff: 3f .byte 0x3f +40220000: 00d770 excw +40220003: 40 .byte 0x40 + +40220004 : +40220004: d0c112 addi a1, a1, -48 +40220007: 71f9 s32i.n a15, a1, 28 +40220009: 0129 s32i.n a2, a1, 0 +4022000b: 03fd mov.n a15, a3 +4022000d: c02430 sub a2, a4, a3 +40220010: b109 s32i.n a0, a1, 44 +40220012: a1c9 s32i.n a12, a1, 40 +40220014: 91d9 s32i.n a13, a1, 36 +40220016: 81e9 s32i.n a14, a1, 32 +40220018: b30c movi.n a3, 11 +4022001a: 022327 blt a3, a2, 40220020 +4022001d: 00b506 j 402202f5 +40220020: 041f22 l16ui a2, a15, 8 +40220023: fa1ac1 l32r a12, 4021e88c +40220026: 112260 slli a2, a2, 10 +40220029: bc29 s32i.n a2, a12, 44 +4022002b: 12dc bnez.n a2, 40220040 +4022002d: faa331 l32r a3, 4021eabc +40220030: faa421 l32r a2, 4021eac0 +40220033: f4a342 movi a4, 0x3f4 +40220036: d18b01 l32r a0, 40214664 +40220039: 0000c0 callx0 a0 +4022003c: ffff06 j 4022003c +4022003f: 2fcb00 excw +40220042: 0d0c movi.n a13, 0 +40220044: c05420 sub a5, a4, a2 +40220047: 1a25a6 blti a5, 2, 40220065 +4022004a: 010232 l8ui a3, a2, 1 +4022004d: 731b addi.n a7, a3, 1 +4022004f: 022757 blt a7, a5, 40220055 +40220052: 00a7c6 j 402202f5 +40220055: 000252 l8ui a5, a2, 0 +40220058: 332b addi.n a3, a3, 2 +4022005a: fbc552 addi a5, a5, -5 +4022005d: 83d250 moveqz a13, a2, a5 +40220060: 223a add.n a2, a2, a3 +40220062: fff786 j 40220044 +40220065: bdcc bnez.n a13, 40220074 +40220067: ffde21 l32r a2, 4021ffe0 +4022006a: 87f801 l32r a0, 4020204c +4022006d: 0000c0 callx0 a0 +40220070: 00a046 j 402202f5 +40220073: 172100 excw +40220076: 01fa add.n a0, a1, a15 +40220078: c08fd1 l32r a13, 402102b4 +4022007b: 220000 excw +4022007e: 741c movi.n a4, 23 +40220080: 221b addi.n a2, a2, 1 +40220082: 745c22 s16i a2, a12, 232 +40220085: 020c movi.n a2, 0 +40220087: 735c22 s16i a2, a12, 230 +4022008a: e50c22 l8ui a2, a12, 229 +4022008d: e2cc bnez.n a2, 4022009f +4022008f: 020d22 l8ui a2, a13, 2 +40220092: 328c beqz.n a2, 40220099 +40220094: bce8 l32i.n a14, a12, 44 +40220096: 000286 j 402200a4 +40220099: 030de2 l8ui a14, a13, 3 +4022009c: 000086 j 402200a2 +4022009f: 400ce2 l8ui a14, a12, 64 +402200a2: bc28 l32i.n a2, a12, 44 +402200a4: ffd041 l32r a4, 4021ffe4 +402200a7: 82ee20 mull a14, a14, a2 +402200aa: 0458 l32i.n a5, a4, 0 +402200ac: 1815a6 blti a5, 1, 402200c8 +402200af: ffce31 l32r a3, 4021ffe8 +402200b2: 0e2d mov.n a2, a14 +402200b4: 2149 s32i.n a4, a1, 8 +402200b6: 1159 s32i.n a5, a1, 4 +402200b8: 878501 l32r a0, 40201ecc +402200bb: 0000c0 callx0 a0 +402200be: 1158 l32i.n a5, a1, 4 +402200c0: 2148 l32i.n a4, a1, 8 +402200c2: c02520 sub a2, a5, a2 +402200c5: 006422 s32i a2, a4, 0 +402200c8: 002422 l32i a2, a4, 0 +402200cb: 0142d6 bgez a2, 402200e3 +402200ce: 86a521 l32r a2, 40201b64 +402200d1: 01d222 addmi a2, a2, 0x100 +402200d4: df0222 l8ui a2, a2, 223 +402200d7: 086207 bbci a2, 0, 402200e3 +402200da: e3cb21 l32r a2, 40219008 +402200dd: 006422 s32i a2, a4, 0 +402200e0: 007505 call0 40220834 +402200e3: 002122 l32i a2, a1, 0 +402200e6: bc78 l32i.n a7, a12, 44 +402200e8: 1f38 l32i.n a3, a15, 4 +402200ea: 9268 l32i.n a6, a2, 36 +402200ec: 0f28 l32i.n a2, a15, 0 +402200ee: 074d mov.n a4, a7 +402200f0: 050c movi.n a5, 0 +402200f2: 2169 s32i.n a6, a1, 8 +402200f4: 1179 s32i.n a7, a1, 4 +402200f6: ffc201 l32r a0, 40220000 +402200f9: 0000c0 callx0 a0 +402200fc: 2168 l32i.n a6, a1, 8 +402200fe: 1178 l32i.n a7, a1, 4 +40220100: 1638 l32i.n a3, a6, 4 +40220102: e50c52 l8ui a5, a12, 229 +40220105: c02320 sub a2, a3, a2 +40220108: 772a add.n a7, a7, a2 +4022010a: 6c29 s32i.n a2, a12, 24 +4022010c: 2e2a add.n a2, a14, a2 +4022010e: 4c79 s32i.n a7, a12, 16 +40220110: 5c29 s32i.n a2, a12, 20 +40220112: f5cc bnez.n a5, 40220125 +40220114: 320c32 l8ui a3, a12, 50 +40220117: 030d22 l8ui a2, a13, 3 +4022011a: a38c beqz.n a3, 40220128 +4022011c: 410c32 l8ui a3, a12, 65 +4022011f: 081327 beq a3, a2, 4022012b +40220122: 000086 j 40220128 +40220125: 400c22 l8ui a2, a12, 64 +40220128: 414c22 s8i a2, a12, 65 +4022012b: 120c movi.n a2, 1 +4022012d: 324c22 s8i a2, a12, 50 +40220130: 040d22 l8ui a2, a13, 4 +40220133: 010d42 l8ui a4, a13, 1 +40220136: 251c72 l16ui a7, a12, 74 +40220139: e67c movi.n a6, -2 +4022013b: 106260 and a6, a2, a6 +4022013e: fcc442 addi a4, a4, -4 +40220141: 042020 extui a2, a2, 0, 1 +40220144: d48070 extui a8, a7, 0, 14 +40220147: 464a add.n a4, a6, a4 +40220149: 2a4c22 s8i a2, a12, 42 +4022014c: 413380 srli a3, a8, 3 +4022014f: 744040 extui a4, a4, 0, 8 +40220152: 120c movi.n a2, 1 +40220154: c89c beqz.n a8, 40220174 +40220156: 00a022 movi a2, 0 +40220159: 173367 bltu a3, a6, 40220174 +4022015c: 143437 bltu a4, a3, 40220174 +4022015f: c03360 sub a3, a3, a6 +40220162: 803d30 add a3, a13, a3 +40220165: 050322 l8ui a2, a3, 5 +40220168: 247070 extui a7, a7, 0, 3 +4022016b: 400700 ssr a7 +4022016e: b17020 sra a7, a2 +40220171: 042070 extui a2, a7, 0, 1 +40220174: ff9ef1 l32r a15, 4021ffec +40220177: 2b4c22 s8i a2, a12, 43 +4022017a: 000fe2 l8ui a14, a15, 0 +4022017d: ac48 l32i.n a4, a12, 40 +4022017f: ee1b addi.n a14, a14, 1 +40220181: d91a31 l32r a3, 402165ec +40220184: 74e0e0 extui a14, a14, 0, 8 +40220187: 004fe2 s8i a14, a15, 0 +4022018a: 104430 and a4, a4, a3 +4022018d: 129c beqz.n a2, 402201a2 +4022018f: cc28 l32i.n a2, a12, 48 +40220191: 242920 extui a2, a2, 9, 3 +40220194: fec222 addi a2, a2, -2 +40220197: 0742f6 bgeui a2, 4, 402201a2 +4022019a: ff9521 l32r a2, 4021fff0 +4022019d: 130c movi.n a3, 1 +4022019f: 004232 s8i a3, a2, 0 +402201a2: 65cc bnez.n a5, 402201ac +402201a4: 030d32 l8ui a3, a13, 3 +402201a7: 000106 j 402201af +402201aa: 320000 excw +402201ad: 400c movi.n a0, 4 +402201af: 530b addi.n a5, a3, -1 +402201b1: 745050 extui a5, a5, 0, 8 +402201b4: f20c movi.n a2, 15 +402201b6: 0c35f6 bgeui a5, 3, 402201c6 +402201b9: 2149 s32i.n a4, a1, 8 +402201bb: 869701 l32r a0, 40201c18 +402201be: 0000c0 callx0 a0 +402201c1: 2148 l32i.n a4, a1, 8 +402201c3: 742020 extui a2, a2, 0, 8 +402201c6: 6f3e27 bltu a14, a2, 40220239 +402201c9: 020c movi.n a2, 0 +402201cb: 004f22 s8i a2, a15, 0 +402201ce: ff88f1 l32r a15, 4021fff0 +402201d1: ff8831 l32r a3, 4021fff4 +402201d4: 000f52 l8ui a5, a15, 0 +402201d7: fed7e1 l32r a14, 4021fd34 +402201da: e59c beqz.n a5, 402201fc +402201dc: 000322 l8ui a2, a3, 0 +402201df: 221b addi.n a2, a2, 1 +402201e1: 742020 extui a2, a2, 0, 8 +402201e4: 004322 s8i a2, a3, 0 +402201e7: 4622b6 bltui a2, 2, 40220231 +402201ea: 020c movi.n a2, 0 +402201ec: 004322 s8i a2, a3, 0 +402201ef: ff8221 l32r a2, 4021fff8 +402201f2: 14a532 movi a3, 0x514 +402201f5: 005232 s16i a3, a2, 0 +402201f8: 000d46 j 40220231 +402201fb: 432200 excw +402201fe: 0e2200 excw +40220201: 7e3100 excw +40220204: ff .byte 0xff +40220205: 32ac beqz.n a2, 4022022c +40220207: 000322 l8ui a2, a3, 0 +4022020a: 221b addi.n a2, a2, 1 +4022020c: 742020 extui a2, a2, 0, 8 +4022020f: 004322 s8i a2, a3, 0 +40220212: b29c beqz.n a2, 40220231 +40220214: 00a022 movi a2, 0 +40220217: 004322 s8i a2, a3, 0 +4022021a: 026142 s32i a4, a1, 8 +4022021d: fea705 call0 4021ec90 +40220220: ff7631 l32r a3, 4021fff8 +40220223: 2148 l32i.n a4, a1, 8 +40220225: 005322 s16i a2, a3, 0 +40220228: 000146 j 40220231 +4022022b: 020c00 excw +4022022e: 004322 s8i a2, a3, 0 +40220231: 020c movi.n a2, 0 +40220233: 004f22 s8i a2, a15, 0 +40220236: 004e22 s8i a2, a14, 0 +40220239: 020c movi.n a2, 0 +4022023b: 64ec bnez.n a4, 40220265 +4022023d: e50c22 l8ui a2, a12, 229 +40220240: 42dc bnez.n a2, 40220258 +40220242: 030d32 l8ui a3, a13, 3 +40220245: 420c22 l8ui a2, a12, 66 +40220248: c12320 mul16u a2, a3, a2 +4022024b: f30c movi.n a3, 15 +4022024d: 0fa327 bge a3, a2, 40220260 +40220250: 020c movi.n a2, 0 +40220252: 424c22 s8i a2, a12, 66 +40220255: 0001c6 j 40220260 +40220258: 400c32 l8ui a3, a12, 64 +4022025b: fff986 j 40220245 +4022025e: 220000 excw +40220261: 420c movi.n a2, 4 +40220263: 221b addi.n a2, a2, 1 +40220265: 424c22 s8i a2, a12, 66 +40220268: cc28 l32i.n a2, a12, 48 +4022026a: 242920 extui a2, a2, 9, 3 +4022026d: 214226 beqi a2, 4, 40220292 +40220270: 0852f6 bgeui a2, 5, 4022027c +40220273: 671226 beqi a2, 1, 402202de +40220276: 502226 beqi a2, 2, 402202ca +40220279: 001c46 j 402202ee +4022027c: 756226 beqi a2, 6, 402202f5 +4022027f: 3872b6 bltui a2, 7, 402202bb +40220282: 06f456 bnez a4, 402202f5 +40220285: ffc645 call0 4021feec +40220288: 069216 beqz a2, 402202f5 +4022028b: 009c45 call0 40220c50 +4022028e: 0018c6 j 402202f5 +40220291: 641600 extui a1, a0, 6, 7 +40220294: 578500 excw +40220297: ff .byte 0xff +40220298: 001646 j 402202f5 +4022029b: cc2800 excw +4022029e: 13e2c7 bbsi a2, 12, 402202b5 +402202a1: ff8585 call0 4021fafc +402202a4: 001346 j 402202f5 +402202a7: 220000 excw +402202aa: 330c movi.n a3, 3 +402202ac: fba032 movi a3, 251 +402202af: fcc222 addi a2, a2, -4 +402202b2: 3f8237 bany a2, a3, 402202f5 +402202b5: fe9005 call0 4021ebb8 +402202b8: 000e46 j 402202f5 +402202bb: fea416 beqz a4, 402202a9 +402202be: f98321 l32r a2, 4021e8cc +402202c1: 8f3e01 l32r a0, 40203fbc +402202c4: 0000c0 callx0 a0 +402202c7: 0002c6 j 402202d6 +402202ca: 74ac beqz.n a4, 402202f5 +402202cc: 030c movi.n a3, 0 +402202ce: 032d mov.n a2, a3 +402202d0: f73c01 l32r a0, 4021dfc0 +402202d3: 0000c0 callx0 a0 +402202d6: cc28 l32i.n a2, a12, 48 +402202d8: b9e2c7 bbsi a2, 12, 40220295 +402202db: 000586 j 402202f5 +402202de: 349c beqz.n a4, 402202f5 +402202e0: cc28 l32i.n a2, a12, 48 +402202e2: afe2c7 bbsi a2, 12, 40220295 +402202e5: 370c22 l8ui a2, a12, 55 +402202e8: fa9256 bnez a2, 40220295 +402202eb: 000186 j 402202f5 +402202ee: 348c beqz.n a4, 402202f5 +402202f0: 120c movi.n a2, 1 +402202f2: ffc945 call0 4021ff88 +402202f5: b108 l32i.n a0, a1, 44 +402202f7: a1c8 l32i.n a12, a1, 40 +402202f9: 91d8 l32i.n a13, a1, 36 +402202fb: 81e8 l32i.n a14, a1, 32 +402202fd: 71f8 l32i.n a15, a1, 28 +402202ff: 30c112 addi a1, a1, 48 +40220302: f00d ret.n +40220304: f0c112 addi a1, a1, -16 +40220307: 21c9 s32i.n a12, a1, 8 +40220309: f960c1 l32r a12, 4021e88c +4022030c: 036102 s32i a0, a1, 12 +4022030f: 3a0c22 l8ui a2, a12, 58 +40220312: 321266 bnei a2, 1, 40220348 +40220315: ff1985 call0 4021f4b0 +40220318: fc28 l32i.n a2, a12, 60 +4022031a: 32ec bnez.n a2, 40220341 +4022031c: cc28 l32i.n a2, a12, 48 +4022031e: 0462d7 bbci a2, 13, 40220326 +40220321: e20c22 l8ui a2, a12, 226 +40220324: 82cc bnez.n a2, 40220330 +40220326: 030c movi.n a3, 0 +40220328: 032d mov.n a2, a3 +4022032a: ff3405 call0 4021f66c +4022032d: 000106 j 40220335 +40220330: 120c movi.n a2, 1 +40220332: ffc545 call0 4021ff88 +40220335: 3a0c22 l8ui a2, a12, 58 +40220338: 0c1266 bnei a2, 1, 40220348 +4022033b: ff18c5 call0 4021f4c8 +4022033e: 000186 j 40220348 +40220341: 020c movi.n a2, 0 +40220343: fc29 s32i.n a2, a12, 60 +40220345: fffb06 j 40220335 +40220348: 3108 l32i.n a0, a1, 12 +4022034a: 21c8 l32i.n a12, a1, 8 +4022034c: 10c112 addi a1, a1, 16 +4022034f: f00d ret.n +40220351: 000000 ill +40220354: f0c112 addi a1, a1, -16 +40220357: 036102 s32i a0, a1, 12 +4022035a: 02a905 call0 40222dec +4022035d: 0222f6 bgeui a2, 2, 40220363 +40220360: ff05c5 call0 4021f3c0 +40220363: 032102 l32i a0, a1, 12 +40220366: 10c112 addi a1, a1, 16 +40220369: 000080 ret +4022036c: de78 l32i.n a7, a14, 52 +4022036e: fe .byte 0xfe +4022036f: 3f .byte 0x3f +40220370: f0c112 addi a1, a1, -16 +40220373: 0261c2 s32i a12, a1, 8 +40220376: 20c220 or a12, a2, a2 +40220379: 85fa21 l32r a2, 40201b64 +4022037c: 036102 s32i a0, a1, 12 +4022037f: 01d222 addmi a2, a2, 0x100 +40220382: f80222 l8ui a2, a2, 248 +40220385: 32dc bnez.n a2, 4022039c +40220387: fff931 l32r a3, 4022036c +4022038a: 112cc0 slli a2, a12, 4 +4022038d: 232a add.n a2, a3, a2 +4022038f: 030c movi.n a3, 0 +40220391: 0d4232 s8i a3, a2, 13 +40220394: 0e4232 s8i a3, a2, 14 +40220397: 0c2d mov.n a2, a12 +40220399: 0355c5 call0 402238f8 +4022039c: 203cc0 or a3, a12, a12 +4022039f: 00a042 movi a4, 0 +402203a2: 01a022 movi a2, 1 +402203a5: 02e885 call0 40223230 +402203a8: 3108 l32i.n a0, a1, 12 +402203aa: 21c8 l32i.n a12, a1, 8 +402203ac: 10c112 addi a1, a1, 16 +402203af: f00d ret.n +402203b1: 000000 ill + +402203b4 : +402203b4: ffee31 l32r a3, 4022036c +402203b7: 742020 extui a2, a2, 0, 8 +402203ba: 1122c0 slli a2, a2, 4 +402203bd: 232a add.n a2, a3, a2 +402203bf: f00d ret.n +402203c1: 000000 ill + +402203c4 : +402203c4: 742020 extui a2, a2, 0, 8 +402203c7: ffe951 l32r a5, 4022036c +402203ca: 1122c0 slli a2, a2, 4 +402203cd: 252a add.n a2, a5, a2 +402203cf: 2239 s32i.n a3, a2, 8 +402203d1: 0c4242 s8i a4, a2, 12 +402203d4: f00d ret.n +402203d6: 980000 excw +402203d9: de .byte 0xde +402203da: fe .byte 0xfe +402203db: 3f .byte 0x3f + +402203dc : +402203dc: e0c112 addi a1, a1, -32 +402203df: 51d9 s32i.n a13, a1, 20 +402203e1: 31f9 s32i.n a15, a1, 12 +402203e3: 74d020 extui a13, a2, 0, 8 +402203e6: 04fd mov.n a15, a4 +402203e8: ffe141 l32r a4, 4022036c +402203eb: 61c9 s32i.n a12, a1, 24 +402203ed: 11cdc0 slli a12, a13, 4 +402203f0: cc4a add.n a12, a12, a4 +402203f2: 0c2d mov.n a2, a12 +402203f4: 640c movi.n a4, 6 +402203f6: 7109 s32i.n a0, a1, 28 +402203f8: 41e9 s32i.n a14, a1, 16 +402203fa: 74e050 extui a14, a5, 0, 8 +402203fd: 830501 l32r a0, 40201014 <_irom0_text_start+0x4> +40220400: 0000c0 callx0 a0 +40220403: fff541 l32r a4, 402203d8 +40220406: 120c movi.n a2, 1 +40220408: 000432 l8ui a3, a4, 0 +4022040b: 401d00 ssl a13 +4022040e: a12200 sll a2, a2 +40220411: 202230 or a2, a2, a3 +40220414: 2cf9 s32i.n a15, a12, 8 +40220416: 0c4ce2 s8i a14, a12, 12 +40220419: 742020 extui a2, a2, 0, 8 +4022041c: 004422 s8i a2, a4, 0 +4022041f: f4d445 call0 40215164 +40220422: 7108 l32i.n a0, a1, 28 +40220424: 742020 extui a2, a2, 0, 8 +40220427: 61c8 l32i.n a12, a1, 24 +40220429: 51d8 l32i.n a13, a1, 20 +4022042b: 41e8 l32i.n a14, a1, 16 +4022042d: 31f8 l32i.n a15, a1, 12 +4022042f: 20c112 addi a1, a1, 32 +40220432: f00d ret.n + +40220434 : +40220434: ffe931 l32r a3, 402203d8 +40220437: 000332 l8ui a3, a3, 0 +4022043a: 400200 ssr a2 +4022043d: 912030 srl a2, a3 +40220440: 042020 extui a2, a2, 0, 1 +40220443: f00d ret.n +40220445: 000000 ill + +40220448 : +40220448: f0c112 addi a1, a1, -16 +4022044b: 21c9 s32i.n a12, a1, 8 +4022044d: ffe2c1 l32r a12, 402203d8 +40220450: 3109 s32i.n a0, a1, 12 +40220452: 000c42 l8ui a4, a12, 0 +40220455: 742020 extui a2, a2, 0, 8 +40220458: 105427 bbc a4, a2, 4022046c +4022045b: e37c movi.n a3, -2 +4022045d: 401200 ssl a2 +40220460: 813330 src a3, a3, a3 +40220463: 103430 and a3, a4, a3 +40220466: 004c32 s8i a3, a12, 0 +40220469: 0287c5 call0 40222ce8 +4022046c: 000c22 l8ui a2, a12, 0 +4022046f: f4cf45 call0 40215164 +40220472: 032102 l32i a0, a1, 12 +40220475: 742020 extui a2, a2, 0, 8 +40220478: 0221c2 l32i a12, a1, 8 +4022047b: 10c112 addi a1, a1, 16 +4022047e: 000080 ret +40220481: 000000 ill + +40220484 : +40220484: 742020 extui a2, a2, 0, 8 +40220487: ffb941 l32r a4, 4022036c +4022048a: 1132c0 slli a3, a2, 4 +4022048d: 243a add.n a2, a4, a3 +4022048f: 2258 l32i.n a5, a2, 8 +40220491: 020c movi.n a2, 0 +40220493: 091526 beqi a5, 1, 402204a0 +40220496: 343a add.n a3, a4, a3 +40220498: 0c0332 l8ui a3, a3, 12 +4022049b: 140c movi.n a4, 1 +4022049d: 832430 moveqz a2, a4, a3 +402204a0: f00d ret.n + ... + +402204a4 : +402204a4: ffb231 l32r a3, 4022036c +402204a7: 742020 extui a2, a2, 0, 8 +402204aa: 1122c0 slli a2, a2, 4 +402204ad: 232a add.n a2, a3, a2 +402204af: 0d0222 l8ui a2, a2, 13 +402204b2: f00d ret.n + +402204b4 : +402204b4: ffae31 l32r a3, 4022036c +402204b7: 742020 extui a2, a2, 0, 8 +402204ba: 1122c0 slli a2, a2, 4 +402204bd: 232a add.n a2, a3, a2 +402204bf: 0e0222 l8ui a2, a2, 14 +402204c2: f00d ret.n + +402204c4 : +402204c4: 742020 extui a2, a2, 0, 8 +402204c7: ffa941 l32r a4, 4022036c +402204ca: 1122c0 slli a2, a2, 4 +402204cd: 242a add.n a2, a4, a2 +402204cf: 0d4232 s8i a3, a2, 13 +402204d2: f00d ret.n + +402204d4 : +402204d4: 742020 extui a2, a2, 0, 8 +402204d7: ffa541 l32r a4, 4022036c +402204da: 1122c0 slli a2, a2, 4 +402204dd: 242a add.n a2, a4, a2 +402204df: 0e4232 s8i a3, a2, 14 +402204e2: f00d ret.n + +402204e4 : +402204e4: ffa231 l32r a3, 4022036c +402204e7: 742020 extui a2, a2, 0, 8 +402204ea: 1122c0 slli a2, a2, 4 +402204ed: 232a add.n a2, a3, a2 +402204ef: 0c0222 l8ui a2, a2, 12 +402204f2: f00d ret.n +402204f4: 22fe76 excw +402204f7: fe6c40 excw +402204fa: 804022 s8i a2, a0, 128 +402204fd: fe .byte 0xfe +402204fe: 484022 s8i a2, a0, 72 +40220501: 8e .byte 0x8e +40220502: fe .byte 0xfe +40220503: 3f .byte 0x3f +40220504: 220354 excw +40220507: 40 .byte 0x40 + +40220508 : +40220508: e0c112 addi a1, a1, -32 +4022050b: 61c9 s32i.n a12, a1, 24 +4022050d: 51d9 s32i.n a13, a1, 20 +4022050f: 41e9 s32i.n a14, a1, 16 +40220511: 31f9 s32i.n a15, a1, 12 +40220513: 7109 s32i.n a0, a1, 28 +40220515: 743030 extui a3, a3, 0, 8 +40220518: 04fd mov.n a15, a4 +4022051a: 05dd mov.n a13, a5 +4022051c: 74c020 extui a12, a2, 0, 8 +4022051f: 74e060 extui a14, a6, 0, 8 +40220522: 1a2366 bnei a3, 2, 40220540 +40220525: fff321 l32r a2, 402204f4 +40220528: 0c3d mov.n a3, a12 +4022052a: 86c801 l32r a0, 4020204c +4022052d: 0000c0 callx0 a0 +40220530: ff8f21 l32r a2, 4022036c +40220533: 11ccc0 slli a12, a12, 4 +40220536: c2ca add.n a12, a2, a12 +40220538: 2cd9 s32i.n a13, a12, 8 +4022053a: 0c4ce2 s8i a14, a12, 12 +4022053d: 001506 j 40220595 +40220540: 2d1366 bnei a3, 1, 40220571 +40220543: ffed21 l32r a2, 402204f8 +40220546: 203cc0 or a3, a12, a12 +40220549: 86c001 l32r a0, 4020204c +4022054c: 0000c0 callx0 a0 +4022054f: 203ff0 or a3, a15, a15 +40220552: 202cc0 or a2, a12, a12 +40220555: 02ad45 call0 4022302c +40220558: 0e5d mov.n a5, a14 +4022055a: 0d4d mov.n a4, a13 +4022055c: 0f3d mov.n a3, a15 +4022055e: 0c2d mov.n a2, a12 +40220560: ffe785 call0 402203dc +40220563: 021266 bnei a2, 1, 40220569 +40220566: 033c85 call0 40223930 +40220569: 0c2d mov.n a2, a12 +4022056b: ffe045 call0 40220370 +4022056e: 0008c6 j 40220595 +40220571: ffe221 l32r a2, 402204fc +40220574: 0c3d mov.n a3, a12 +40220576: 86b501 l32r a0, 4020204c +40220579: 0000c0 callx0 a0 +4022057c: 040c movi.n a4, 0 +4022057e: 042d mov.n a2, a4 +40220580: 0c3d mov.n a3, a12 +40220582: 02cac5 call0 40223230 +40220585: 0c2d mov.n a2, a12 +40220587: ffec05 call0 40220448 +4022058a: 72cc bnez.n a2, 40220595 +4022058c: 934301 l32r a0, 40205298 +4022058f: 0000c0 callx0 a0 +40220592: ff9405 call0 4021fed4 +40220595: ffdac1 l32r a12, 40220500 +40220598: 0c2d mov.n a2, a12 +4022059a: 8e8801 l32r a0, 40203fbc +4022059d: 0000c0 callx0 a0 +402205a0: 857121 l32r a2, 40201b64 +402205a3: 01d222 addmi a2, a2, 0x100 +402205a6: de0222 l8ui a2, a2, 222 +402205a9: 03a256 bnez a2, 402205e7 +402205ac: ffd631 l32r a3, 40220504 +402205af: 00a042 movi a4, 0 +402205b2: 0c2d mov.n a2, a12 +402205b4: 8f8001 l32r a0, 402043b4 +402205b7: 0000c0 callx0 a0 +402205ba: 028305 call0 40222dec +402205bd: 02dd mov.n a13, a2 +402205bf: 010296 bltz a2, 402205d3 +402205c2: 742020 extui a2, a2, 0, 8 +402205c5: ffebc5 call0 40220484 +402205c8: 728c beqz.n a2, 402205d3 +402205ca: ff8321 l32r a2, 402203d8 +402205cd: 000222 l8ui a2, a2, 0 +402205d0: 0d6217 bbci a2, 1, 402205e1 +402205d3: 0c2d mov.n a2, a12 +402205d5: 8e7901 l32r a0, 40203fbc +402205d8: 0000c0 callx0 a0 +402205db: ff2e45 call0 4021f8c0 +402205de: 000146 j 402205e7 +402205e1: 202dd0 or a2, a13, a13 +402205e4: fedd85 call0 4021f3c0 +402205e7: 072102 l32i a0, a1, 28 +402205ea: 0621c2 l32i a12, a1, 24 +402205ed: 51d8 l32i.n a13, a1, 20 +402205ef: 41e8 l32i.n a14, a1, 16 +402205f1: 31f8 l32i.n a15, a1, 12 +402205f3: 20c112 addi a1, a1, 32 +402205f6: f00d ret.n +402205f8: 22fe64 excw +402205fb: 40 .byte 0x40 + +402205fc : +402205fc: d0c112 addi a1, a1, -48 +402205ff: 0961d2 s32i a13, a1, 36 +40220602: 0861e2 s32i a14, a1, 32 +40220605: 71f9 s32i.n a15, a1, 28 +40220607: b109 s32i.n a0, a1, 44 +40220609: a1c9 s32i.n a12, a1, 40 +4022060b: 74e030 extui a14, a3, 0, 8 +4022060e: 048d mov.n a8, a4 +40220610: 74d020 extui a13, a2, 0, 8 +40220613: 744050 extui a4, a5, 0, 8 +40220616: f4f060 extui a15, a6, 0, 16 +40220619: 041e16 beqz a14, 4022065e +4022061c: 083d mov.n a3, a8 +4022061e: 0f5d mov.n a5, a15 +40220620: 0d2d mov.n a2, a13 +40220622: 0179 s32i.n a7, a1, 0 +40220624: 025845 call0 40222bac +40220627: 02cd mov.n a12, a2 +40220629: fff321 l32r a2, 402205f8 +4022062c: 0f3d mov.n a3, a15 +4022062e: 868701 l32r a0, 4020204c +40220631: 0000c0 callx0 a0 +40220634: 0178 l32i.n a7, a1, 0 +40220636: bcac beqz.n a12, 40220665 +40220638: ff4d31 l32r a3, 4022036c +4022063b: 112dc0 slli a2, a13, 4 +4022063e: 232a add.n a2, a3, a2 +40220640: 0c02f2 l8ui a15, a2, 12 +40220643: 176c72 s32i a7, a12, 92 +40220646: 931601 l32r a0, 402052a0 +40220649: 0000c0 callx0 a0 +4022064c: 0f4d mov.n a4, a15 +4022064e: 030c movi.n a3, 0 +40220650: 0c2d mov.n a2, a12 +40220652: 022d45 call0 40222928 +40220655: 931301 l32r a0, 402052a4 +40220658: 0000c0 callx0 a0 +4022065b: 000186 j 40220665 +4022065e: 083d mov.n a3, a8 +40220660: 0d2d mov.n a2, a13 +40220662: 026345 call0 40222c98 +40220665: 853f31 l32r a3, 40201b64 +40220668: 1c0c movi.n a12, 1 +4022066a: 05d322 addmi a2, a3, 0x500 +4022066d: 1f2242 l32i a4, a2, 124 +40220670: 00f416 beqz a4, 40220683 +40220673: 2022c2 l32i a12, a2, 128 +40220676: 040c movi.n a4, 0 +40220678: fecc22 addi a2, a12, -2 +4022067b: 1c0c movi.n a12, 1 +4022067d: 93c420 movnez a12, a4, a2 +40220680: 74c0c0 extui a12, a12, 0, 8 +40220683: ff9ff1 l32r a15, 40220500 +40220686: 0139 s32i.n a3, a1, 0 +40220688: 0f2d mov.n a2, a15 +4022068a: 8e4c01 l32r a0, 40203fbc +4022068d: 0000c0 callx0 a0 +40220690: 0138 l32i.n a3, a1, 0 +40220692: 03ec16 beqz a12, 402206d4 +40220695: 01d322 addmi a2, a3, 0x100 +40220698: de0222 l8ui a2, a2, 222 +4022069b: 52fc bnez.n a2, 402206d4 +4022069d: 0274c5 call0 40222dec +402206a0: 010296 bltz a2, 402206b4 +402206a3: 742020 extui a2, a2, 0, 8 +402206a6: ffddc5 call0 40220484 +402206a9: 728c beqz.n a2, 402206b4 +402206ab: ff4b21 l32r a2, 402203d8 +402206ae: 000222 l8ui a2, a2, 0 +402206b1: 106217 bbci a2, 1, 402206c5 +402206b4: 0f2d mov.n a2, a15 +402206b6: 8e4101 l32r a0, 40203fbc +402206b9: 0000c0 callx0 a0 +402206bc: ff2005 call0 4021f8c0 +402206bf: 000446 j 402206d4 +402206c2: 000000 ill +402206c5: a5e431 l32r a3, 40209e58 +402206c8: 150c movi.n a5, 1 +402206ca: 040c movi.n a4, 0 +402206cc: 0f2d mov.n a2, a15 +402206ce: 8e3a01 l32r a0, 40203fb8 +402206d1: 0000c0 callx0 a0 +402206d4: 1f1d66 bnei a13, 1, 402206f7 +402206d7: 92f201 l32r a0, 402052a0 +402206da: 0000c0 callx0 a0 +402206dd: 89bc21 l32r a2, 40202dd0 +402206e0: 000232 l8ui a3, a2, 0 +402206e3: 3e8c beqz.n a14, 402206ea +402206e5: 331b addi.n a3, a3, 1 +402206e7: 0000c6 j 402206ee +402206ea: 338c beqz.n a3, 402206f1 +402206ec: 330b addi.n a3, a3, -1 +402206ee: 004232 s8i a3, a2, 0 +402206f1: 92ec01 l32r a0, 402052a4 +402206f4: 0000c0 callx0 a0 +402206f7: b108 l32i.n a0, a1, 44 +402206f9: a1c8 l32i.n a12, a1, 40 +402206fb: 91d8 l32i.n a13, a1, 36 +402206fd: 81e8 l32i.n a14, a1, 32 +402206ff: 71f8 l32i.n a15, a1, 28 +40220701: 30c112 addi a1, a1, 48 +40220704: f00d ret.n +40220706: 5c0000 excw +40220709: fe .byte 0xfe +4022070a: 564022 s8i a2, a0, 86 +4022070d: fe .byte 0xfe +4022070e: 4e4022 s8i a2, a0, 78 +40220711: fe .byte 0xfe +40220712: 22 .byte 0x22 +40220713: 40 .byte 0x40 + +40220714 : +40220714: f0c112 addi a1, a1, -16 +40220717: 0261c2 s32i a12, a1, 8 +4022071a: 036102 s32i a0, a1, 12 +4022071d: f44040 extui a4, a4, 0, 16 +40220720: 20c550 or a12, a5, a5 +40220723: 742020 extui a2, a2, 0, 8 +40220726: 1f2466 bnei a4, 2, 40220749 +40220729: a58c beqz.n a5, 40220737 +4022072b: 034d mov.n a4, a3 +4022072d: 023d mov.n a3, a2 +4022072f: 220c movi.n a2, 2 +40220731: 02afc5 call0 40223230 +40220734: 000086 j 4022073a +40220737: ffc385 call0 40220370 +4022073a: fff321 l32r a2, 40220708 +4022073d: 0c3d mov.n a3, a12 +4022073f: 864301 l32r a0, 4020204c +40220742: 0000c0 callx0 a0 +40220745: 000906 j 4022076d +40220748: 146600 extui a6, a0, 6, 2 +4022074b: 433014 excw +4022074e: 322020 excw +40220751: a02220 addx4 a2, a2, a2 +40220754: ad8502 excw +40220757: ed2102 l32i a0, a1, 0x3b4 +4022075a: ff .byte 0xff +4022075b: 000206 j 40220767 +4022075e: 000000 ill +40220761: ffc0c5 call0 40220370 +40220764: ffeb21 l32r a2, 40220710 +40220767: 863901 l32r a0, 4020204c +4022076a: 0000c0 callx0 a0 +4022076d: 3108 l32i.n a0, a1, 12 +4022076f: 21c8 l32i.n a12, a1, 8 +40220771: 10c112 addi a1, a1, 16 +40220774: f00d ret.n + ... + +40220778 : +40220778: e0c112 addi a1, a1, -32 +4022077b: 61c9 s32i.n a12, a1, 24 +4022077d: 51d9 s32i.n a13, a1, 20 +4022077f: 74c030 extui a12, a3, 0, 8 +40220782: 74d020 extui a13, a2, 0, 8 +40220785: fef931 l32r a3, 4022036c +40220788: 112dc0 slli a2, a13, 4 +4022078b: 7109 s32i.n a0, a1, 28 +4022078d: 746060 extui a6, a6, 0, 8 +40220790: 744040 extui a4, a4, 0, 8 +40220793: 200182 l8ui a8, a1, 32 +40220796: 232a add.n a2, a3, a2 +40220798: 0566b6 bltui a6, 6, 402207a1 +4022079b: 0d42c2 s8i a12, a2, 13 +4022079e: 000486 j 402207b4 +402207a1: cccc bnez.n a12, 402207b1 +402207a3: 030c movi.n a3, 0 +402207a5: 0d4232 s8i a3, a2, 13 +402207a8: 0e4232 s8i a3, a2, 14 +402207ab: 000146 j 402207b4 +402207ae: 000000 ill +402207b1: 0e42c2 s8i a12, a2, 14 +402207b4: 006182 s32i a8, a1, 0 +402207b7: 203dd0 or a3, a13, a13 +402207ba: 0c2d mov.n a2, a12 +402207bc: 02c405 call0 40223400 +402207bf: 0c3d mov.n a3, a12 +402207c1: 0d2d mov.n a2, a13 +402207c3: 031005 call0 402238c4 +402207c6: 7108 l32i.n a0, a1, 28 +402207c8: 61c8 l32i.n a12, a1, 24 +402207ca: 51d8 l32i.n a13, a1, 20 +402207cc: 20c112 addi a1, a1, 32 +402207cf: f00d ret.n +402207d1: 000000 ill + +402207d4 : +402207d4: e0c112 addi a1, a1, -32 +402207d7: 208330 or a8, a3, a3 +402207da: 200132 l8ui a3, a1, 32 +402207dd: 746060 extui a6, a6, 0, 8 +402207e0: 006132 s32i a3, a1, 0 +402207e3: 203220 or a3, a2, a2 +402207e6: 082d mov.n a2, a8 +402207e8: 7109 s32i.n a0, a1, 28 +402207ea: 02af85 call0 402232e4 +402207ed: 7108 l32i.n a0, a1, 28 +402207ef: 20c112 addi a1, a1, 32 +402207f2: f00d ret.n + +402207f4 : +402207f4: f0c112 addi a1, a1, -16 +402207f7: 742020 extui a2, a2, 0, 8 +402207fa: 036102 s32i a0, a1, 12 +402207fd: 02b745 call0 40223374 +40220800: 032102 l32i a0, a1, 12 +40220803: 10c112 addi a1, a1, 16 +40220806: 000080 ret +40220809: 000000 ill + +4022080c : +4022080c: f0c112 addi a1, a1, -16 +4022080f: 742020 extui a2, a2, 0, 8 +40220812: 036102 s32i a0, a1, 12 +40220815: 0253c5 call0 40222d54 +40220818: 203220 or a3, a2, a2 +4022081b: 1fa022 movi a2, 31 +4022081e: 738c beqz.n a3, 40220829 +40220820: 030322 l8ui a2, a3, 3 +40220823: a0c222 addi a2, a2, -96 +40220826: 742020 extui a2, a2, 0, 8 +40220829: 3108 l32i.n a0, a1, 12 +4022082b: 10c112 addi a1, a1, 16 +4022082e: f00d ret.n +40220830: 805c movi.n a0, 88 +40220832: fe .byte 0xfe +40220833: 3f .byte 0x3f + +40220834 : +40220834: ffff21 l32r a2, 40220830 +40220837: 130c movi.n a3, 1 +40220839: 004232 s8i a3, a2, 0 +4022083c: f00d ret.n + ... + +40220840 : +40220840: f0c112 addi a1, a1, -16 +40220843: 963021 l32r a2, 40206104 +40220846: 3109 s32i.n a0, a1, 12 +40220848: 460222 l8ui a2, a2, 70 +4022084b: 07e207 bbsi a2, 0, 40220856 +4022084e: 020c movi.n a2, 0 +40220850: 201110 or a1, a1, a1 +40220853: ff7345 call0 4021ff88 +40220856: 3108 l32i.n a0, a1, 12 +40220858: 10c112 addi a1, a1, 16 +4022085b: f00d ret.n +4022085d: 000000 ill +40220860: fe87a0 excw +40220863: 3f .byte 0x3f +40220864: d0c112 addi a1, a1, -48 +40220867: a1c9 s32i.n a12, a1, 40 +40220869: 91d9 s32i.n a13, a1, 36 +4022086b: 0139 s32i.n a3, a1, 0 +4022086d: b109 s32i.n a0, a1, 44 +4022086f: 81e9 s32i.n a14, a1, 32 +40220871: 71f9 s32i.n a15, a1, 28 +40220873: c02540 sub a2, a5, a4 +40220876: b30c movi.n a3, 11 +40220878: 05dd mov.n a13, a5 +4022087a: 20c660 or a12, a6, a6 +4022087d: 052327 blt a3, a2, 40220886 +40220880: 220c movi.n a2, 2 +40220882: 002c86 j 40220938 +40220885: e4cb00 extui a12, a0, 11, 15 +40220888: 020c movi.n a2, 0 +4022088a: dda0f2 movi a15, 221 +4022088d: c03de0 sub a3, a13, a14 +40220890: 0223e6 bgei a3, 2, 40220896 +40220893: 002846 j 40220938 +40220896: 010e42 l8ui a4, a14, 1 +40220899: 641b addi.n a6, a4, 1 +4022089b: e1a637 bge a6, a3, 40220880 +4022089e: 000e32 l8ui a3, a14, 0 +402208a1: 503326 beqi a3, 3, 402208f5 +402208a4: 6513f7 beq a3, a15, 4022090d +402208a7: 082356 bnez a3, 4022092d +402208aa: 7f2c66 bnei a12, 2, 4022092d +402208ad: 84ad31 l32r a3, 40201b64 +402208b0: 02d322 addmi a2, a3, 0x200 +402208b3: b50222 l8ui a2, a2, 181 +402208b6: f2cc bnez.n a2, 402208c9 +402208b8: 84ab31 l32r a3, 40201b64 +402208bb: 010e42 l8ui a4, a14, 1 +402208be: 862322 l32i a2, a3, 0x218 +402208c1: 179247 bne a2, a4, 402208dc +402208c4: 000686 j 402208e2 +402208c7: 280000 excw +402208ca: 640c01 l32r a0, 401f98fc <_lit4_end+0xf35d0> +402208cd: 10c232 addi a3, a2, 16 +402208d0: 993d21 l32r a2, 40206dc4 +402208d3: 84d201 l32r a0, 40201c1c +402208d6: 0000c0 callx0 a0 +402208d9: fdb216 beqz a2, 402208b8 +402208dc: 020c movi.n a2, 0 +402208de: 001586 j 40220938 +402208e1: 392100 excw +402208e4: 2b89 s32i.n a8, a11, 8 +402208e6: 3e .byte 0x3e +402208e7: 84cd01 l32r a0, 40201c1c +402208ea: 0000c0 callx0 a0 +402208ed: feb256 bnez a2, 402208dc +402208f0: 120c movi.n a2, 1 +402208f2: 000dc6 j 4022092d +402208f5: 341c66 bnei a12, 1, 4022092d +402208f8: 8daf01 l32r a0, 40203fb4 +402208fb: 0000c0 callx0 a0 +402208fe: 020e32 l8ui a3, a14, 2 +40220901: 060222 l8ui a2, a2, 6 +40220904: d49327 bne a3, a2, 402208dc +40220907: fff946 j 402208f0 +4022090a: 000000 ill +4022090d: 1c1c66 bnei a12, 1, 4022092d +40220910: dc34b6 bltui a4, 3, 402208f0 +40220913: ffd331 l32r a3, 40220860 +40220916: 340c movi.n a4, 3 +40220918: 2e2b addi.n a2, a14, 2 +4022091a: 84c001 l32r a0, 40201c1c +4022091d: 0000c0 callx0 a0 +40220920: 030c movi.n a3, 0 +40220922: 140c movi.n a4, 1 +40220924: 933420 movnez a3, a4, a2 +40220927: 742030 extui a2, a3, 0, 8 +4022092a: 000286 j 40220938 +4022092d: 010e32 l8ui a3, a14, 1 +40220930: 332b addi.n a3, a3, 2 +40220932: ee3a add.n a14, a14, a3 +40220934: ffd546 j 4022088d +40220937: b10800 excw +4022093a: a1c8 l32i.n a12, a1, 40 +4022093c: 91d8 l32i.n a13, a1, 36 +4022093e: 81e8 l32i.n a14, a1, 32 +40220940: 71f8 l32i.n a15, a1, 28 +40220942: 30c112 addi a1, a1, 48 +40220945: f00d ret.n +40220947: 091400 excw +4022094a: b36000 movgez a6, a0, a0 +4022094d: 8e .byte 0x8e +4022094e: fe .byte 0xfe +4022094f: 3f .byte 0x3f +40220950: 806c movi.n a0, -24 +40220952: fe .byte 0xfe +40220953: 3f .byte 0x3f +40220954: 1050e4 excw +40220957: 40 .byte 0x40 + +40220958 : +40220958: f0c112 addi a1, a1, -16 +4022095b: fffb21 l32r a2, 40220948 +4022095e: 3109 s32i.n a0, a1, 12 +40220960: 73a032 movi a3, 115 +40220963: 0020c0 memw +40220966: 0239 s32i.n a3, a2, 0 +40220968: fff921 l32r a2, 4022094c +4022096b: 030c movi.n a3, 0 +4022096d: 004232 s8i a3, a2, 0 +40220970: fff821 l32r a2, 40220950 +40220973: 002222 l32i a2, a2, 0 +40220976: fff701 l32r a0, 40220954 +40220979: 0000c0 callx0 a0 +4022097c: 3108 l32i.n a0, a1, 12 +4022097e: 10c112 addi a1, a1, 16 +40220981: f00d ret.n +40220983: 3ccc00 excw +40220986: b44010 extui a4, a1, 0, 12 +40220989: 401050 excw + +4022098c : +4022098c: fffe21 l32r a2, 40220984 +4022098f: f0c112 addi a1, a1, -16 +40220992: 3109 s32i.n a0, a1, 12 +40220994: fffd01 l32r a0, 40220988 +40220997: 0000c0 callx0 a0 +4022099a: ffed21 l32r a2, 40220950 +4022099d: 0228 l32i.n a2, a2, 0 +4022099f: ffed01 l32r a0, 40220954 +402209a2: 0000c0 callx0 a0 +402209a5: 3108 l32i.n a0, a1, 12 +402209a7: 10c112 addi a1, a1, 16 +402209aa: f00d ret.n + +402209ac : +402209ac: ffe821 l32r a2, 4022094c +402209af: 030c movi.n a3, 0 +402209b1: 004232 s8i a3, a2, 0 +402209b4: ffe521 l32r a2, 40220948 +402209b7: 73a032 movi a3, 115 +402209ba: 0020c0 memw +402209bd: 0239 s32i.n a3, a2, 0 +402209bf: f00d ret.n +402209c1: 000000 ill +402209c4: 2c1d80 excw +402209c7: 04 .byte 0x4 + +402209c8 : +402209c8: f0c112 addi a1, a1, -16 +402209cb: ffdf21 l32r a2, 40220948 +402209ce: 3109 s32i.n a0, a1, 12 +402209d0: 73a032 movi a3, 115 +402209d3: 0020c0 memw +402209d6: 0239 s32i.n a3, a2, 0 +402209d8: ffdd21 l32r a2, 4022094c +402209db: 030c movi.n a3, 0 +402209dd: 004232 s8i a3, a2, 0 +402209e0: fff921 l32r a2, 402209c4 +402209e3: ffdc01 l32r a0, 40220954 +402209e6: 0000c0 callx0 a0 +402209e9: 3108 l32i.n a0, a1, 12 +402209eb: 10c112 addi a1, a1, 16 +402209ee: f00d ret.n + +402209f0 : +402209f0: ffe521 l32r a2, 40220984 +402209f3: f0c112 addi a1, a1, -16 +402209f6: 3109 s32i.n a0, a1, 12 +402209f8: ffe401 l32r a0, 40220988 +402209fb: 0000c0 callx0 a0 +402209fe: ffd421 l32r a2, 40220950 +40220a01: 0228 l32i.n a2, a2, 0 +40220a03: ffd401 l32r a0, 40220954 +40220a06: 0000c0 callx0 a0 +40220a09: ffd021 l32r a2, 4022094c +40220a0c: 030c movi.n a3, 0 +40220a0e: 004232 s8i a3, a2, 0 +40220a11: 3108 l32i.n a0, a1, 12 +40220a13: ffcd21 l32r a2, 40220948 +40220a16: 73a032 movi a3, 115 +40220a19: 0020c0 memw +40220a1c: 0239 s32i.n a3, a2, 0 +40220a1e: 10c112 addi a1, a1, 16 +40220a21: f00d ret.n +40220a23: dee400 excw +40220a26: fe .byte 0xfe +40220a27: 3f .byte 0x3f + +40220a28 : +40220a28: ffff31 l32r a3, 40220a24 +40220a2b: 620c movi.n a2, 6 +40220a2d: 050342 l8ui a4, a3, 5 +40220a30: 94cc bnez.n a4, 40220a3d +40220a32: 000342 l8ui a4, a3, 0 +40220a35: 020322 l8ui a2, a3, 2 +40220a38: 242a add.n a2, a4, a2 +40220a3a: 742020 extui a2, a2, 0, 8 +40220a3d: f00d ret.n + ... + +40220a40 : +40220a40: fff921 l32r a2, 40220a24 +40220a43: 050242 l8ui a4, a2, 5 +40220a46: 023d mov.n a3, a2 +40220a48: 520c movi.n a2, 5 +40220a4a: e4cc bnez.n a4, 40220a5c +40220a4c: a338 l32i.n a3, a3, 40 +40220a4e: 020c movi.n a2, 0 +40220a50: 838c beqz.n a3, 40220a5c +40220a52: 221b addi.n a2, a2, 1 +40220a54: 742020 extui a2, a2, 0, 8 +40220a57: 2338 l32i.n a3, a3, 8 +40220a59: fffcc6 j 40220a50 +40220a5c: f00d ret.n +40220a5e: 440000 extui a0, a0, 0, 5 +40220a61: 3ffe91 l32r a9, 401f0a5c <_lit4_end+0xea730> + +40220a64 : +40220a64: ffff21 l32r a2, 40220a60 +40220a67: f0c112 addi a1, a1, -16 +40220a6a: 3109 s32i.n a0, a1, 12 +40220a6c: 8d5401 l32r a0, 40203fbc +40220a6f: 0000c0 callx0 a0 +40220a72: 3108 l32i.n a0, a1, 12 +40220a74: 10c112 addi a1, a1, 16 +40220a77: f00d ret.n +40220a79: 000000 ill +40220a7c: 8ea8 l32i.n a10, a14, 32 +40220a7e: fe .byte 0xfe +40220a7f: 3f .byte 0x3f +40220a80: feb9 s32i.n a11, a14, 60 +40220a82: ab4022 s8i a2, a0, 171 +40220a85: fe .byte 0xfe +40220a86: 684022 s8i a2, a0, 104 +40220a89: 3ffe80 excw +40220a8c: 8eac beqz.n a14, 40220ab8 +40220a8e: fe .byte 0xfe +40220a8f: 3f .byte 0x3f +40220a90: fe8064 excw +40220a93: 3f .byte 0x3f + +40220a94 : +40220a94: d0c112 addi a1, a1, -48 +40220a97: 0961d2 s32i a13, a1, 36 +40220a9a: fff1d1 l32r a13, 40220a60 +40220a9d: 0b6102 s32i a0, a1, 44 +40220aa0: 202dd0 or a2, a13, a13 +40220aa3: a1c9 s32i.n a12, a1, 40 +40220aa5: 81e9 s32i.n a14, a1, 32 +40220aa7: 71f9 s32i.n a15, a1, 28 +40220aa9: 8d4401 l32r a0, 40203fbc +40220aac: 0000c0 callx0 a0 +40220aaf: fe7645 call0 4021f214 +40220ab2: b28c beqz.n a2, 40220ac1 +40220ab4: f4e621 l32r a2, 4021de4c +40220ab7: 130c movi.n a3, 1 +40220ab9: 004232 s8i a3, a2, 0 +40220abc: 000406 j 40220ad0 +40220abf: 050000 extui a0, a0, 16, 1 +40220ac2: 56fdd2 excw +40220ac5: 32fec2 excw +40220ac8: 3001a0 xor a0, a1, a10 +40220acb: 452023 excw +40220ace: f78a add.n a15, a7, a8 +40220ad0: ffd521 l32r a2, 40220a24 +40220ad3: 0002c2 l8ui a12, a2, 0 +40220ad6: 020232 l8ui a3, a2, 2 +40220ad9: cc3a add.n a12, a12, a3 +40220adb: 74c0c0 extui a12, a12, 0, 8 +40220ade: fff605 call0 40220a40 +40220ae1: 02dd mov.n a13, a2 +40220ae3: ffe641 l32r a4, 40220a7c +40220ae6: 9356f1 l32r a15, 40205840 +40220ae9: 0b2cb6 bltui a12, 2, 40220af8 +40220aec: 0822b6 bltui a2, 2, 40220af8 +40220aef: 020c movi.n a2, 0 +40220af1: 004422 s8i a2, a4, 0 +40220af4: 000fc6 j 40220b37 +40220af7: 04e200 extui a14, a0, 2, 1 +40220afa: 1f3200 excw +40220afd: ee1b00 excw +40220b00: 74e0e0 extui a14, a14, 0, 8 +40220b03: 0044e2 s8i a14, a4, 0 +40220b06: e8a322 movi a2, 0x3e8 +40220b09: 0149 s32i.n a4, a1, 0 +40220b0b: 844301 l32r a0, 40201c18 +40220b0e: 0000c0 callx0 a0 +40220b11: 0148 l32i.n a4, a1, 0 +40220b13: 202e27 blt a14, a2, 40220b37 +40220b16: 020c movi.n a2, 0 +40220b18: 004422 s8i a2, a4, 0 +40220b1b: 0a2cf6 bgeui a12, 2, 40220b29 +40220b1e: ffd821 l32r a2, 40220a80 +40220b21: 0c3d mov.n a3, a12 +40220b23: 854a01 l32r a0, 4020204c +40220b26: 0000c0 callx0 a0 +40220b29: 0a2df6 bgeui a13, 2, 40220b37 +40220b2c: ffd621 l32r a2, 40220a84 +40220b2f: 0d3d mov.n a3, a13 +40220b31: 854601 l32r a0, 4020204c +40220b34: 0000c0 callx0 a0 +40220b37: f78145 call0 4021834c +40220b3a: ffd331 l32r a3, 40220a88 +40220b3d: ffd3c1 l32r a12, 40220a8c +40220b40: 222b addi.n a2, a2, 2 +40220b42: 212220 srai a2, a2, 2 +40220b45: 004322 s8i a2, a3, 0 +40220b48: 0ce8 l32i.n a14, a12, 0 +40220b4a: ffd121 l32r a2, 40220a90 +40220b4d: ee1b addi.n a14, a14, 1 +40220b4f: 001f32 l16ui a3, a15, 0 +40220b52: 0228 l32i.n a2, a2, 0 +40220b54: 0ce9 s32i.n a14, a12, 0 +40220b56: 84dd01 l32r a0, 40201ecc +40220b59: 0000c0 callx0 a0 +40220b5c: 1e3e27 bltu a14, a2, 40220b7e +40220b5f: 020c movi.n a2, 0 +40220b61: 0c29 s32i.n a2, a12, 0 +40220b63: fe6b05 call0 4021f214 +40220b66: b28c beqz.n a2, 40220b75 +40220b68: f4b821 l32r a2, 4021de48 +40220b6b: 130c movi.n a3, 1 +40220b6d: 004232 s8i a3, a2, 0 +40220b70: 000286 j 40220b7e +40220b73: c50000 extui a0, a0, 16, 13 +40220b76: 56fdc6 j 40236771 <_irom0_text_end+0x5bf5> +40220b79: 45fec2 excw +40220b7c: 32f8f2 excw +40220b7f: 1f .byte 0x1f +40220b80: b72100 excw +40220b83: ff .byte 0xff +40220b84: 01a052 movi a5, 1 +40220b87: 00a042 movi a4, 0 +40220b8a: 8d0b01 l32r a0, 40203fb8 +40220b8d: 0000c0 callx0 a0 +40220b90: b108 l32i.n a0, a1, 44 +40220b92: a1c8 l32i.n a12, a1, 40 +40220b94: 91d8 l32i.n a13, a1, 36 +40220b96: 81e8 l32i.n a14, a1, 32 +40220b98: 71f8 l32i.n a15, a1, 28 +40220b9a: 30c112 addi a1, a1, 48 +40220b9d: f00d ret.n + ... + +40220ba0 : +40220ba0: f0c112 addi a1, a1, -16 +40220ba3: 3109 s32i.n a0, a1, 12 +40220ba5: ffeec5 call0 40220a94 +40220ba8: 3108 l32i.n a0, a1, 12 +40220baa: 10c112 addi a1, a1, 16 +40220bad: f00d ret.n + ... + +40220bb0 : +40220bb0: f0c112 addi a1, a1, -16 +40220bb3: 01e9 s32i.n a14, a1, 0 +40220bb5: f4e020 extui a14, a2, 0, 16 +40220bb8: ffb521 l32r a2, 40220a8c +40220bbb: 3109 s32i.n a0, a1, 12 +40220bbd: 21c9 s32i.n a12, a1, 8 +40220bbf: 11d9 s32i.n a13, a1, 4 +40220bc1: 0c0c movi.n a12, 0 +40220bc3: 0062c2 s32i a12, a2, 0 +40220bc6: ffa6d1 l32r a13, 40220a60 +40220bc9: ffac21 l32r a2, 40220a7c +40220bcc: 0042c2 s8i a12, a2, 0 +40220bcf: 202dd0 or a2, a13, a13 +40220bd2: 8cfa01 l32r a0, 40203fbc +40220bd5: 0000c0 callx0 a0 +40220bd8: 931a21 l32r a2, 40205840 +40220bdb: 0c4d mov.n a4, a12 +40220bdd: 0052e2 s16i a14, a2, 0 +40220be0: 0e3d mov.n a3, a14 +40220be2: 0d2d mov.n a2, a13 +40220be4: 150c movi.n a5, 1 +40220be6: 8cf401 l32r a0, 40203fb8 +40220be9: 0000c0 callx0 a0 +40220bec: 3108 l32i.n a0, a1, 12 +40220bee: 21c8 l32i.n a12, a1, 8 +40220bf0: 11d8 l32i.n a13, a1, 4 +40220bf2: 01e8 l32i.n a14, a1, 0 +40220bf4: 10c112 addi a1, a1, 16 +40220bf7: f00d ret.n +40220bf9: 000000 ill +40220bfc: fe8ea6 blti a14, 8, 40220bfe +40220bff: 3f .byte 0x3f +40220c00: 9158 l32i.n a5, a1, 36 +40220c02: fe .byte 0xfe +40220c03: 3f .byte 0x3f + +40220c04 : +40220c04: f0c112 addi a1, a1, -16 +40220c07: fffd21 l32r a2, 40220bfc +40220c0a: 3109 s32i.n a0, a1, 12 +40220c0c: 000232 l8ui a3, a2, 0 +40220c0f: 051366 bnei a3, 1, 40220c18 +40220c12: 00a032 movi a3, 0 +40220c15: 004232 s8i a3, a2, 0 +40220c18: fffa21 l32r a2, 40220c00 +40220c1b: 8ce801 l32r a0, 40203fbc +40220c1e: 0000c0 callx0 a0 +40220c21: 3108 l32i.n a0, a1, 12 +40220c23: 10c112 addi a1, a1, 16 +40220c26: f00d ret.n + +40220c28 : +40220c28: f0c112 addi a1, a1, -16 +40220c2b: fff421 l32r a2, 40220bfc +40220c2e: 3109 s32i.n a0, a1, 12 +40220c30: 130c movi.n a3, 1 +40220c32: 004232 s8i a3, a2, 0 +40220c35: fcf021 l32r a2, 4021fff8 +40220c38: 150c movi.n a5, 1 +40220c3a: 001232 l16ui a3, a2, 0 +40220c3d: fff021 l32r a2, 40220c00 +40220c40: 040c movi.n a4, 0 +40220c42: 8cdd01 l32r a0, 40203fb8 +40220c45: 0000c0 callx0 a0 +40220c48: 3108 l32i.n a0, a1, 12 +40220c4a: 10c112 addi a1, a1, 16 +40220c4d: f00d ret.n + ... + +40220c50 : +40220c50: ffeb21 l32r a2, 40220bfc +40220c53: f0c112 addi a1, a1, -16 +40220c56: 3109 s32i.n a0, a1, 12 +40220c58: 000232 l8ui a3, a2, 0 +40220c5b: f97621 l32r a2, 4021f234 +40220c5e: 438c beqz.n a3, 40220c66 +40220c60: 000232 l8ui a3, a2, 0 +40220c63: 071366 bnei a3, 1, 40220c6e +40220c66: 030c movi.n a3, 0 +40220c68: 004232 s8i a3, a2, 0 +40220c6b: fffbc5 call0 40220c28 +40220c6e: 3108 l32i.n a0, a1, 12 +40220c70: 10c112 addi a1, a1, 16 +40220c73: f00d ret.n +40220c75: 000000 ill +40220c78: 22fec7 bbsi a14, 28, 40220c9e +40220c7b: 40 .byte 0x40 + +40220c7c : +40220c7c: f0c112 addi a1, a1, -16 +40220c7f: 21c9 s32i.n a12, a1, 8 +40220c81: 02cd mov.n a12, a2 +40220c83: caad21 l32r a2, 40213738 +40220c86: 3109 s32i.n a0, a1, 12 +40220c88: 0248 l32i.n a4, a2, 0 +40220c8a: 042416 beqz a4, 40220cd0 +40220c8d: 0c38 l32i.n a3, a12, 0 +40220c8f: 8e5921 l32r a2, 402045f4 +40220c92: 0f0327 bnone a3, a2, 40220ca5 +40220c95: 1c28 l32i.n a2, a12, 4 +40220c97: c30c movi.n a3, 12 +40220c99: 24e277 bbsi a2, 7, 40220cc1 +40220c9c: 645020 extui a5, a2, 0, 7 +40220c9f: 1e85e6 bgei a5, 8, 40220cc1 +40220ca2: 1bf2e7 bbsi a2, 30, 40220cc1 +40220ca5: 0c0c22 l8ui a2, a12, 12 +40220ca8: 80a032 movi a3, 128 +40220cab: 342020 extui a2, a2, 0, 4 +40220cae: f28c beqz.n a2, 40220cc1 +40220cb0: 181c32 l16ui a3, a12, 48 +40220cb3: 330b addi.n a3, a3, -1 +40220cb5: a03330 addx4 a3, a3, a3 +40220cb8: 1133f0 slli a3, a3, 1 +40220cbb: 3cc332 addi a3, a3, 60 +40220cbe: f43030 extui a3, a3, 0, 16 +40220cc1: 000c22 l8ui a2, a12, 0 +40220cc4: a0c222 addi a2, a2, -96 +40220cc7: 004c22 s8i a2, a12, 0 +40220cca: 202cc0 or a2, a12, a12 +40220ccd: 0004c0 callx0 a4 +40220cd0: ffea31 l32r a3, 40220c78 +40220cd3: 0c2d mov.n a2, a12 +40220cd5: 73a142 movi a4, 0x173 +40220cd8: 820c01 l32r a0, 40201508 +40220cdb: 0000c0 callx0 a0 +40220cde: 3108 l32i.n a0, a1, 12 +40220ce0: 21c8 l32i.n a12, a1, 8 +40220ce2: 10c112 addi a1, a1, 16 +40220ce5: f00d ret.n +40220ce7: 8eb800 excw +40220cea: fe .byte 0xfe +40220ceb: 3f .byte 0x3f + +40220cec : +40220cec: ffff51 l32r a5, 40220ce8 +40220cef: 140c movi.n a4, 1 +40220cf1: 743030 extui a3, a3, 0, 8 +40220cf4: 4e2572 l32i a7, a5, 0x138 +40220cf7: 401300 ssl a3 +40220cfa: a16400 sll a6, a4 +40220cfd: 028d mov.n a8, a2 +40220cff: 042d mov.n a2, a4 +40220d01: 0d8767 bany a7, a6, 40220d12 +40220d04: 206760 or a6, a7, a6 +40220d07: a03350 addx4 a3, a3, a5 +40220d0a: 4e6562 s32i a6, a5, 0x138 +40220d0d: 4f6382 s32i a8, a3, 0x13c +40220d10: 020c movi.n a2, 0 +40220d12: f00d ret.n + +40220d14 : +40220d14: fff541 l32r a4, 40220ce8 +40220d17: 743020 extui a3, a2, 0, 8 +40220d1a: 4e2452 l32i a5, a4, 0x138 +40220d1d: 120c movi.n a2, 1 +40220d1f: 401300 ssl a3 +40220d22: a16200 sll a6, a2 +40220d25: 140657 bnone a6, a5, 40220d3d +40220d28: f27c movi.n a2, -1 +40220d2a: 306260 xor a6, a2, a6 +40220d2d: 4cc332 addi a3, a3, 76 +40220d30: 105650 and a5, a6, a5 +40220d33: a03340 addx4 a3, a3, a4 +40220d36: 020c movi.n a2, 0 +40220d38: 4e6452 s32i a5, a4, 0x138 +40220d3b: 3329 s32i.n a2, a3, 12 +40220d3d: f00d ret.n +40220d3f: 505000 pitlb a0, a0 +40220d42: f44000 extui a4, a0, 0, 16 +40220d45: 401051 l32r a5, 401f0d88 <_lit4_end+0xeaa5c> + +40220d48 : +40220d48: f0c112 addi a1, a1, -16 +40220d4b: 21c9 s32i.n a12, a1, 8 +40220d4d: 02cd mov.n a12, a2 +40220d4f: 4c38 l32i.n a3, a12, 16 +40220d51: 1228 l32i.n a2, a2, 4 +40220d53: 3109 s32i.n a0, a1, 12 +40220d55: 1239 s32i.n a3, a2, 4 +40220d57: 9c38 l32i.n a3, a12, 36 +40220d59: 0338 l32i.n a3, a3, 0 +40220d5b: 09e347 bbsi a3, 4, 40220d68 +40220d5e: 061c42 l16ui a4, a12, 12 +40220d61: 2c38 l32i.n a3, a12, 8 +40220d63: 000886 j 40220d89 +40220d66: 320000 excw +40220d69: 061c movi.n a6, 16 +40220d6b: ffc332 addi a3, a3, -1 +40220d6e: f43030 extui a3, a3, 0, 16 +40220d71: fff301 l32r a0, 40220d40 +40220d74: 0000c0 callx0 a0 +40220d77: 00a032 movi a3, 0 +40220d7a: 026232 s32i a3, a2, 8 +40220d7d: 061c42 l16ui a4, a12, 12 +40220d80: 023d mov.n a3, a2 +40220d82: 440b addi.n a4, a4, -1 +40220d84: 1c28 l32i.n a2, a12, 4 +40220d86: f44040 extui a4, a4, 0, 16 +40220d89: ffee01 l32r a0, 40220d44 +40220d8c: 0000c0 callx0 a0 +40220d8f: 0c2d mov.n a2, a12 +40220d91: 830c movi.n a3, 8 +40220d93: 0171c5 call0 402224b0 +40220d96: 3108 l32i.n a0, a1, 12 +40220d98: 21c8 l32i.n a12, a1, 8 +40220d9a: 10c112 addi a1, a1, 16 +40220d9d: f00d ret.n +40220d9f: deb000 excw +40220da2: fe .byte 0xfe +40220da3: 3f .byte 0x3f + +40220da4 : +40220da4: ffff21 l32r a2, 40220da0 +40220da7: 0b0222 l8ui a2, a2, 11 +40220daa: f00d ret.n + +40220dac : +40220dac: e0c112 addi a1, a1, -32 +40220daf: 61c9 s32i.n a12, a1, 24 +40220db1: 7109 s32i.n a0, a1, 28 +40220db3: 023d mov.n a3, a2 +40220db5: fffac1 l32r a12, 40220da0 +40220db8: a2ec bnez.n a2, 40220de6 +40220dba: 009c22 l16si a2, a12, 0 +40220dbd: 42cc bnez.n a2, 40220dc5 +40220dbf: 0b0c22 l8ui a2, a12, 11 +40220dc2: 431226 beqi a2, 1, 40220e09 +40220dc5: 042c22 l32i a2, a12, 16 +40220dc8: 8c7731 l32r a3, 40203fa4 +40220dcb: 0f9237 bne a2, a3, 40220dde +40220dce: 00a022 movi a2, 0 +40220dd1: e56785 call0 4020644c +40220dd4: 042c22 l32i a2, a12, 16 +40220dd7: 3c48 l32i.n a4, a12, 12 +40220dd9: 030c movi.n a3, 0 +40220ddb: 0007c6 j 40220dfe +40220dde: 3c48 l32i.n a4, a12, 12 +40220de0: 030c movi.n a3, 0 +40220de2: 000806 j 40220e06 +40220de5: 2c2200 excw +40220de8: 6e4104 excw +40220deb: 478c beqz.n a7, 40220df3 +40220ded: 221492 l16ui a9, a4, 68 +40220df0: 3200a0 excw +40220df3: 450061 l32r a6, 401f21f4 <_lit4_end+0xebec8> +40220df6: 28e565 excw +40220df9: 484c movi.n a8, 68 +40220dfb: 383c movi.n a8, 51 +40220dfd: 022801 l32r a0, 401e16a0 <_lit4_end+0xdb374> +40220e00: 000086 j 40220e06 +40220e03: 3c4800 excw +40220e06: 0004c0 callx0 a4 +40220e09: 7108 l32i.n a0, a1, 28 +40220e0b: 61c8 l32i.n a12, a1, 24 +40220e0d: 20c112 addi a1, a1, 32 +40220e10: f00d ret.n + ... + +40220e14 : +40220e14: ffe341 l32r a4, 40220da0 +40220e17: 050c movi.n a5, 0 +40220e19: 005452 s16i a5, a4, 0 +40220e1c: 015452 s16i a5, a4, 2 +40220e1f: 050c movi.n a5, 0 +40220e21: 1459 s32i.n a5, a4, 4 +40220e23: 150c movi.n a5, 1 +40220e25: 0a4452 s8i a5, a4, 10 +40220e28: 3429 s32i.n a2, a4, 12 +40220e2a: 4439 s32i.n a3, a4, 16 +40220e2c: f00d ret.n +40220e2e: 980000 excw +40220e31: fe .byte 0xfe +40220e32: 22 .byte 0x22 +40220e33: 40 .byte 0x40 + +40220e34 : +40220e34: d0c112 addi a1, a1, -48 +40220e37: a1c9 s32i.n a12, a1, 40 +40220e39: 91d9 s32i.n a13, a1, 36 +40220e3b: 81e9 s32i.n a14, a1, 32 +40220e3d: 71f9 s32i.n a15, a1, 28 +40220e3f: b109 s32i.n a0, a1, 44 +40220e41: 03fd mov.n a15, a3 +40220e43: 006122 s32i a2, a1, 0 +40220e46: 8c5b01 l32r a0, 40203fb4 +40220e49: 0000c0 callx0 a0 +40220e4c: ffd5c1 l32r a12, 40220da0 +40220e4f: 024d mov.n a4, a2 +40220e51: 020c movi.n a2, 0 +40220e53: 0a4c22 s8i a2, a12, 10 +40220e56: 0158 l32i.n a5, a1, 0 +40220e58: 8c46d1 l32r a13, 40203f70 +40220e5b: 8c47e1 l32r a14, 40203f78 +40220e5e: 122556 bnez a5, 40220f84 +40220e61: 834021 l32r a2, 40201b64 +40220e64: 4238 l32i.n a3, a2, 16 +40220e66: d20332 l8ui a3, a3, 210 +40220e69: 025366 bnei a3, 5, 40220e6f +40220e6c: 004506 j 40220f84 +40220e6f: 02d222 addmi a2, a2, 0x200 +40220e72: 140232 l8ui a3, a2, 20 +40220e75: 083366 bnei a3, 3, 40220e81 +40220e78: 000222 l8ui a2, a2, 0 +40220e7b: 828c beqz.n a2, 40220e87 +40220e7d: 0040c6 j 40220f84 +40220e80: 132600 excw +40220e83: 3f0602 l8ui a0, a6, 63 +40220e86: 9c2200 excw +40220e89: 321600 excw +40220e8c: 0c08 l32i.n a0, a12, 0 +40220e8e: 4c2202 l32i a0, a2, 0x130 +40220e91: 210b addi.n a2, a1, -1 +40220e93: 8c3a add.n a8, a12, a3 +40220e95: 030c movi.n a3, 0 +40220e97: 000262 l8ui a6, a2, 0 +40220e9a: 045c32 s16i a3, a12, 8 +40220e9d: 8c3c51 l32r a5, 40203f90 +40220ea0: 892ef1 l32r a15, 40203358 +40220ea3: 168c beqz.n a6, 40220ea8 +40220ea5: 004232 s8i a3, a2, 0 +40220ea8: 019c22 l16si a2, a12, 2 +40220eab: 005f22 s16i a2, a15, 0 +40220eae: 005522 s16i a2, a5, 0 +40220eb1: 009f52 l16si a5, a15, 0 +40220eb4: c0ae22 movi a2, 0xfffffec0 +40220eb7: 02a527 bge a5, a2, 40220ebd +40220eba: 005f22 s16i a2, a15, 0 +40220ebd: 009f22 l16si a2, a15, 0 +40220ec0: 0512a6 blti a2, 1, 40220ec9 +40220ec3: 00a022 movi a2, 0 +40220ec6: 005f22 s16i a2, a15, 0 +40220ec9: 00a022 movi a2, 0 +40220ecc: 004d22 s8i a2, a13, 0 +40220ecf: 009f32 l16si a3, a15, 0 +40220ed2: ffd721 l32r a2, 40220e30 +40220ed5: 006142 s32i a4, a1, 0 +40220ed8: 845d01 l32r a0, 4020204c +40220edb: 0000c0 callx0 a0 +40220ede: 002142 l32i a4, a1, 0 +40220ee1: 009f32 l16si a3, a15, 0 +40220ee4: 060422 l8ui a2, a4, 6 +40220ee7: f55205 call0 40216408 +40220eea: 130c movi.n a3, 1 +40220eec: 8c2c41 l32r a4, 40203f9c +40220eef: 004d32 s8i a3, a13, 0 +40220ef2: 009f22 l16si a2, a15, 0 +40220ef5: 0020c0 memw +40220ef8: 0438 l32i.n a3, a4, 0 +40220efa: 005e22 s16i a2, a14, 0 +40220efd: f43030 extui a3, a3, 0, 16 +40220f00: 112200 slli a2, a2, 16 +40220f03: 202320 or a2, a3, a2 +40220f06: 0020c0 memw +40220f09: 0429 s32i.n a2, a4, 0 +40220f0b: 002706 j 40220fab +40220f0e: 000000 ill +40220f11: 041c22 l16ui a2, a12, 8 +40220f14: 01c222 addi a2, a2, 1 +40220f17: 112200 slli a2, a2, 16 +40220f1a: 312020 srai a2, a2, 16 +40220f1d: 045c22 s16i a2, a12, 8 +40220f20: 281266 bnei a2, 1, 40220f4c +40220f23: 8c1621 l32r a2, 40203f7c +40220f26: 01a052 movi a5, 1 +40220f29: 004252 s8i a5, a2, 0 +40220f2c: 00a022 movi a2, 0 +40220f2f: 004d22 s8i a2, a13, 0 +40220f32: 060422 l8ui a2, a4, 6 +40220f35: 030c movi.n a3, 0 +40220f37: 0159 s32i.n a5, a1, 0 +40220f39: f54cc5 call0 40216408 +40220f3c: 0158 l32i.n a5, a1, 0 +40220f3e: 020c movi.n a2, 0 +40220f40: 005e22 s16i a2, a14, 0 +40220f43: 004d52 s8i a5, a13, 0 +40220f46: 0b4c52 s8i a5, a12, 11 +40220f49: 000a06 j 40220f75 +40220f4c: 342266 bnei a2, 2, 40220f84 +40220f4f: 8c0b21 l32r a2, 40203f7c +40220f52: 02a032 movi a3, 2 +40220f55: 004232 s8i a3, a2, 0 +40220f58: 00a022 movi a2, 0 +40220f5b: 004d22 s8i a2, a13, 0 +40220f5e: 060422 l8ui a2, a4, 6 +40220f61: 38af32 movi a3, -200 +40220f64: f54a05 call0 40216408 +40220f67: 38af22 movi a2, -200 +40220f6a: 005e22 s16i a2, a14, 0 +40220f6d: 120c movi.n a2, 1 +40220f6f: 004d22 s8i a2, a13, 0 +40220f72: 0b4c22 s8i a2, a12, 11 +40220f75: 4c58 l32i.n a5, a12, 16 +40220f77: 3c48 l32i.n a4, a12, 12 +40220f79: 330c movi.n a3, 3 +40220f7b: 0f2d mov.n a2, a15 +40220f7d: e59a05 call0 40206920 +40220f80: 0009c6 j 40220fab +40220f83: a02200 addx4 a2, a2, a0 +40220f86: 4c2200 excw +40220f89: 220b addi.n a2, a2, -1 +40220f8b: 2200a0 excw +40220f8e: 045c movi.n a4, 80 +40220f90: 88f2c1 l32r a12, 40203358 +40220f93: 004d22 s8i a2, a13, 0 +40220f96: 009c32 l16si a3, a12, 0 +40220f99: 060422 l8ui a2, a4, 6 +40220f9c: f54685 call0 40216408 +40220f9f: 001c22 l16ui a2, a12, 0 +40220fa2: 005e22 s16i a2, a14, 0 +40220fa5: 01a022 movi a2, 1 +40220fa8: 004d22 s8i a2, a13, 0 +40220fab: b108 l32i.n a0, a1, 44 +40220fad: a1c8 l32i.n a12, a1, 40 +40220faf: 91d8 l32i.n a13, a1, 36 +40220fb1: 81e8 l32i.n a14, a1, 32 +40220fb3: 71f8 l32i.n a15, a1, 28 +40220fb5: 30c112 addi a1, a1, 48 +40220fb8: f00d ret.n + ... + +40220fbc : +40220fbc: f0c112 addi a1, a1, -16 +40220fbf: 21c9 s32i.n a12, a1, 8 +40220fc1: ff77c1 l32r a12, 40220da0 +40220fc4: 3109 s32i.n a0, a1, 12 +40220fc6: 0a0c32 l8ui a3, a12, 10 +40220fc9: 112200 slli a2, a2, 16 +40220fcc: 312020 srai a2, a2, 16 +40220fcf: 1d1366 bnei a3, 1, 40220ff0 +40220fd2: 001c32 l16ui a3, a12, 0 +40220fd5: 1c48 l32i.n a4, a12, 4 +40220fd7: 331b addi.n a3, a3, 1 +40220fd9: 113300 slli a3, a3, 16 +40220fdc: 313030 srai a3, a3, 16 +40220fdf: 224a add.n a2, a2, a4 +40220fe1: 005c32 s16i a3, a12, 0 +40220fe4: 016c22 s32i a2, a12, 4 +40220fe7: 830c01 l32r a0, 40201c18 +40220fea: 0000c0 callx0 a0 +40220fed: 015c22 s16i a2, a12, 2 +40220ff0: 3108 l32i.n a0, a1, 12 +40220ff2: 21c8 l32i.n a12, a1, 8 +40220ff4: 10c112 addi a1, a1, 16 +40220ff7: f00d ret.n +40220ff9: 000000 ill +40220ffc: ff8001 l32r a0, 40220dfc +40220fff: ff .byte 0xff +40221000: 8e68 l32i.n a6, a14, 32 +40221002: fe .byte 0xfe +40221003: 3f .byte 0x3f +40221004: fe8e66 bnei a14, 8, 40221006 +40221007: 3f .byte 0x3f +40221008: fe8e64 excw +4022100b: 3f .byte 0x3f +4022100c: fe8a add.n a15, a14, a8 +4022100e: 9c4022 s8i a2, a0, 156 +40221011: de .byte 0xde +40221012: fe .byte 0xfe +40221013: 3f .byte 0x3f +40221014: 220834 excw +40221017: c11240 mul16u a1, a2, a4 +4022101a: 51d9e0 excw +4022101d: 039d mov.n a9, a3 +4022101f: 7109 s32i.n a0, a1, 28 +40221021: 043d mov.n a3, a4 +40221023: 61c9 s32i.n a12, a1, 24 +40221025: 054d mov.n a4, a5 +40221027: 41e9 s32i.n a14, a1, 16 +40221029: 065d mov.n a5, a6 +4022102b: 31f9 s32i.n a15, a1, 12 +4022102d: 065c movi.n a6, 80 +4022102f: 0c92d2 l16si a13, a2, 24 +40221032: 0b9767 bne a7, a6, 40221041 +40221035: 8bcd61 l32r a6, 40203f6c +40221038: 000662 l8ui a6, a6, 0 +4022103b: 086616 beqz a6, 402210c5 +4022103e: 000386 j 40221050 +40221041: 0be766 bnei a7, 128, 40221050 +40221044: ff5761 l32r a6, 40220da0 +40221047: 0a0662 l8ui a6, a6, 10 +4022104a: 021666 bnei a6, 1, 40221050 +4022104d: 0099c6 j 402212b8 +40221050: 82c581 l32r a8, 40201b64 +40221053: 1a0c movi.n a10, 1 +40221055: 02d862 addmi a6, a8, 0x200 +40221058: 1406c2 l8ui a12, a6, 20 +4022105b: 060c movi.n a6, 0 +4022105d: bc0b addi.n a11, a12, -1 +4022105f: 836ab0 moveqz a6, a10, a11 +40221062: da7c movi.n a10, -3 +40221064: 10aca0 and a10, a12, a10 +40221067: 746060 extui a6, a6, 0, 8 +4022106a: 111a66 bnei a10, 1, 4022107f +4022106d: 042882 l32i a8, a8, 16 +40221070: d208a2 l8ui a10, a8, 210 +40221073: fba082 movi a8, 251 +40221076: 108a80 and a8, a10, a8 +40221079: 481826 beqi a8, 1, 402210c5 +4022107c: 045656 bnez a6, 402210c5 +4022107f: 0968 l32i.n a6, a9, 0 +40221081: 04f6d7 bbsi a6, 29, 40221089 +40221084: b0c772 addi a7, a7, -80 +40221087: a7fc bnez.n a7, 402210c5 +40221089: 160c movi.n a6, 1 +4022108b: ff7d85 call0 40220864 +4022108e: 021226 beqi a2, 1, 40221094 +40221091: 008706 j 402212b1 +40221094: ffda21 l32r a2, 40220ffc +40221097: 2d2a add.n a2, a13, a2 +40221099: 214216 beqz a2, 402212b1 +4022109c: 8bbb21 l32r a2, 40203f88 +4022109f: 8bc341 l32r a4, 40203fac +402210a2: 001232 l16ui a3, a2, 0 +402210a5: 331b addi.n a3, a3, 1 +402210a7: f43030 extui a3, a3, 0, 16 +402210aa: 005232 s16i a3, a2, 0 +402210ad: 0428 l32i.n a2, a4, 0 +402210af: 2d2a add.n a2, a13, a2 +402210b1: 0429 s32i.n a2, a4, 0 +402210b3: 82d901 l32r a0, 40201c18 +402210b6: 0000c0 callx0 a0 +402210b9: 8bb631 l32r a3, 40203f94 +402210bc: 005322 s16i a2, a3, 0 +402210bf: 007b86 j 402212b1 +402210c2: 000000 ill +402210c5: 820361 l32r a6, 402018d4 +402210c8: 029d67 bne a13, a6, 402210ce +402210cb: 007746 j 402212ac +402210ce: ff3461 l32r a6, 40220da0 +402210d1: 0a0662 l8ui a6, a6, 10 +402210d4: 141666 bnei a6, 1, 402210ec +402210d7: 01a062 movi a6, 1 +402210da: ff7885 call0 40220864 +402210dd: 021226 beqi a2, 1, 402210e3 +402210e0: 007206 j 402212ac +402210e3: 0d2d mov.n a2, a13 +402210e5: ffed45 call0 40220fbc +402210e8: 007006 j 402212ac +402210eb: 260c00 excw +402210ee: ff7745 call0 40220864 +402210f1: 021226 beqi a2, 1, 402210f7 +402210f4: 006d06 j 402212ac +402210f7: 8baf01 l32r a0, 40203fb4 +402210fa: 0000c0 callx0 a0 +402210fd: ffc0c1 l32r a12, 40221000 +40221100: ffc1e1 l32r a14, 40221004 +40221103: 001c32 l16ui a3, a12, 0 +40221106: 02fd mov.n a15, a2 +40221108: 001e22 l16ui a2, a14, 0 +4022110b: 331b addi.n a3, a3, 1 +4022110d: 802d20 add a2, a13, a2 +40221110: 113300 slli a3, a3, 16 +40221113: 112200 slli a2, a2, 16 +40221116: 313030 srai a3, a3, 16 +40221119: 312020 srai a2, a2, 16 +4022111c: 005c32 s16i a3, a12, 0 +4022111f: 005e22 s16i a2, a14, 0 +40221122: 82bd01 l32r a0, 40201c18 +40221125: 0000c0 callx0 a0 +40221128: fdc2d1 l32r a13, 40220830 +4022112b: 112200 slli a2, a2, 16 +4022112e: ffb631 l32r a3, 40221008 +40221131: 312020 srai a2, a2, 16 +40221134: 000d42 l8ui a4, a13, 0 +40221137: 005322 s16i a2, a3, 0 +4022113a: 16e416 beqz a4, 402212ac +4022113d: 8b9331 l32r a3, 40203f8c +40221140: 8b9441 l32r a4, 40203f90 +40221143: 000352 l8ui a5, a3, 0 +40221146: 0a1566 bnei a5, 1, 40221154 +40221149: 005422 s16i a2, a4, 0 +4022114c: 020c movi.n a2, 0 +4022114e: 004322 s8i a2, a3, 0 +40221151: 004106 j 40221259 +40221154: 8b8a31 l32r a3, 40203f7c +40221157: 8b88e1 l32r a14, 40203f78 +4022115a: 000362 l8ui a6, a3, 0 +4022115d: 035d mov.n a5, a3 +4022115f: 1132f0 slli a3, a2, 1 +40221162: 04b656 bnez a6, 402211b1 +40221165: 009452 l16si a5, a4, 0 +40221168: 232a add.n a2, a3, a2 +4022116a: 323b addi.n a3, a2, 3 +4022116c: 653b addi.n a6, a5, 3 +4022116e: a32320 movltz a2, a3, a2 +40221171: a35650 movltz a5, a6, a5 +40221174: 215250 srai a5, a5, 2 +40221177: 212220 srai a2, a2, 2 +4022117a: 252a add.n a2, a5, a2 +4022117c: 009e32 l16si a3, a14, 0 +4022117f: 112200 slli a2, a2, 16 +40221182: 312020 srai a2, a2, 16 +40221185: 005422 s16i a2, a4, 0 +40221188: c02230 sub a2, a2, a3 +4022118b: 832c movi.n a3, 40 +4022118d: 0ba327 bge a3, a2, 4022119c +40221190: 887231 l32r a3, 40203358 +40221193: 001322 l16ui a2, a3, 0 +40221196: 28c222 addi a2, a2, 40 +40221199: 001606 j 402211f5 +4022119c: d8af32 movi a3, -40 +4022119f: 022237 blt a2, a3, 402211a5 +402211a2: 002cc6 j 40221259 +402211a5: 886c31 l32r a3, 40203358 +402211a8: 001322 l16ui a2, a3, 0 +402211ab: d8c222 addi a2, a2, -40 +402211ae: 0010c6 j 402211f5 +402211b1: 060c movi.n a6, 0 +402211b3: 004562 s8i a6, a5, 0 +402211b6: 009452 l16si a5, a4, 0 +402211b9: 232a add.n a2, a3, a2 +402211bb: 323b addi.n a3, a2, 3 +402211bd: 653b addi.n a6, a5, 3 +402211bf: a32320 movltz a2, a3, a2 +402211c2: a35650 movltz a5, a6, a5 +402211c5: 215250 srai a5, a5, 2 +402211c8: 212220 srai a2, a2, 2 +402211cb: 252a add.n a2, a5, a2 +402211cd: 112200 slli a2, a2, 16 +402211d0: 009e32 l16si a3, a14, 0 +402211d3: 312020 srai a2, a2, 16 +402211d6: c03230 sub a3, a2, a3 +402211d9: 005422 s16i a2, a4, 0 +402211dc: 28c332 addi a3, a3, 40 +402211df: 045c movi.n a4, 80 +402211e1: 74b437 bgeu a4, a3, 40221259 +402211e4: 832c movi.n a3, 40 +402211e6: 828c01 l32r a0, 40201c18 +402211e9: 0000c0 callx0 a0 +402211ec: a02220 addx4 a2, a2, a2 +402211ef: 885a31 l32r a3, 40203358 +402211f2: 1122d0 slli a2, a2, 3 +402211f5: 885841 l32r a4, 40203358 +402211f8: 005322 s16i a2, a3, 0 +402211fb: 009452 l16si a5, a4, 0 +402211fe: c0ae22 movi a2, 0xfffffec0 +40221201: 04cd mov.n a12, a4 +40221203: 02a527 bge a5, a2, 40221209 +40221206: 005c22 s16i a2, a12, 0 +40221209: 009c22 l16si a2, a12, 0 +4022120c: 0512a6 blti a2, 1, 40221215 +4022120f: 00a022 movi a2, 0 +40221212: 005c22 s16i a2, a12, 0 +40221215: 8b5631 l32r a3, 40203f70 +40221218: 00a022 movi a2, 0 +4022121b: 004322 s8i a2, a3, 0 +4022121e: 009c32 l16si a3, a12, 0 +40221221: ff7a21 l32r a2, 4022100c +40221224: 838a01 l32r a0, 4020204c +40221227: 0000c0 callx0 a0 +4022122a: 009c32 l16si a3, a12, 0 +4022122d: 060f22 l8ui a2, a15, 6 +40221230: f51d45 call0 40216408 +40221233: 8b4f41 l32r a4, 40203f70 +40221236: 01a032 movi a3, 1 +40221239: 004432 s8i a3, a4, 0 +4022123c: 8b5841 l32r a4, 40203f9c +4022123f: 009c22 l16si a2, a12, 0 +40221242: 0020c0 memw +40221245: 002432 l32i a3, a4, 0 +40221248: 005e22 s16i a2, a14, 0 +4022124b: f43030 extui a3, a3, 0, 16 +4022124e: 112200 slli a2, a2, 16 +40221251: 202320 or a2, a3, a2 +40221254: 0020c0 memw +40221257: 0429 s32i.n a2, a4, 0 +40221259: 00a022 movi a2, 0 +4022125c: ff6931 l32r a3, 40221000 +4022125f: 004d22 s8i a2, a13, 0 +40221262: 00a022 movi a2, 0 +40221265: 005322 s16i a2, a3, 0 +40221268: ff6741 l32r a4, 40221004 +4022126b: ff6731 l32r a3, 40221008 +4022126e: 005422 s16i a2, a4, 0 +40221271: 005322 s16i a2, a3, 0 +40221274: fda0c5 call0 4021ec84 +40221277: 00a216 beqz a2, 40221285 +4022127a: fb5a21 l32r a2, 4021ffe4 +4022127d: 930c movi.n a3, 9 +4022127f: 0239 s32i.n a3, a2, 0 +40221281: 0009c6 j 402212ac +40221284: 62c100 excw +40221287: ff .byte 0xff +40221288: 0c2d mov.n a2, a12 +4022128a: 8b4c01 l32r a0, 40203fbc +4022128d: 0000c0 callx0 a0 +40221290: ff6131 l32r a3, 40221014 +40221293: 040c movi.n a4, 0 +40221295: 0c2d mov.n a2, a12 +40221297: 8c4701 l32r a0, 402043b4 +4022129a: 0000c0 callx0 a0 +4022129d: 150c movi.n a5, 1 +4022129f: 040c movi.n a4, 0 +402212a1: e8a332 movi a3, 0x3e8 +402212a4: 0c2d mov.n a2, a12 +402212a6: 8b4401 l32r a0, 40203fb8 +402212a9: 0000c0 callx0 a0 +402212ac: 020c movi.n a2, 0 +402212ae: 0003c6 j 402212c1 +402212b1: 120c movi.n a2, 1 +402212b3: 000286 j 402212c1 +402212b6: 610000 excw +402212b9: 678187 bany a1, a8, 40221324 +402212bc: ed1d excw +402212be: ff8546 j 402210d7 +402212c1: 7108 l32i.n a0, a1, 28 +402212c3: 61c8 l32i.n a12, a1, 24 +402212c5: 51d8 l32i.n a13, a1, 20 +402212c7: 41e8 l32i.n a14, a1, 16 +402212c9: 31f8 l32i.n a15, a1, 12 +402212cb: 20c112 addi a1, a1, 32 +402212ce: f00d ret.n + +402212d0 : +402212d0: f0c112 addi a1, a1, -16 +402212d3: 3109 s32i.n a0, a1, 12 +402212d5: 21c9 s32i.n a12, a1, 8 +402212d7: 11d9 s32i.n a13, a1, 4 +402212d9: 742020 extui a2, a2, 0, 8 +402212dc: 2882f6 bgeui a2, 8, 40221308 +402212df: fe8231 l32r a3, 40220ce8 +402212e2: 11c2b0 slli a12, a2, 5 +402212e5: 23ca add.n a2, a3, a12 +402212e7: 270222 l8ui a2, a2, 39 +402212ea: 03dd mov.n a13, a3 +402212ec: 82dc bnez.n a2, 40221308 +402212ee: cdca add.n a12, a13, a12 +402212f0: 8fec01 l32r a0, 402052a0 +402212f3: 0000c0 callx0 a0 +402212f6: 6cc8 l32i.n a12, a12, 24 +402212f8: 8feb01 l32r a0, 402052a4 +402212fb: 0000c0 callx0 a0 +402212fe: 6c8c beqz.n a12, 40221308 +40221300: 092c22 l32i a2, a12, 36 +40221303: 0228 l32i.n a2, a2, 0 +40221305: 017287 bbci a2, 24, 4022130a +40221308: 0c0c movi.n a12, 0 +4022130a: 3108 l32i.n a0, a1, 12 +4022130c: 0c2d mov.n a2, a12 +4022130e: 11d8 l32i.n a13, a1, 4 +40221310: 21c8 l32i.n a12, a1, 8 +40221312: 10c112 addi a1, a1, 16 +40221315: f00d ret.n +40221317: 8ed000 excw +4022131a: fe .byte 0xfe +4022131b: 3f .byte 0x3f +4022131c: fe8fd0 excw +4022131f: 3f .byte 0x3f +40221320: 8fd8 l32i.n a13, a15, 32 +40221322: fe .byte 0xfe +40221323: 3f .byte 0x3f +40221324: fe8fe0 excw +40221327: 3f .byte 0x3f +40221328: 8fe8 l32i.n a14, a15, 32 +4022132a: fe .byte 0xfe +4022132b: 3f .byte 0x3f +4022132c: 11f8 l32i.n a15, a1, 4 +4022132e: 026000 excw +40221331: 000a add.n a0, a0, a0 +40221333: 902400 addx2 a2, a4, a0 +40221336: fe .byte 0xfe +40221337: 3f .byte 0x3f +40221338: 166c movi.n a6, -31 +4022133a: 404022 s8i a2, a0, 64 +4022133d: 2208 l32i.n a0, a2, 8 +4022133f: 0ba040 excw +40221342: 22 .byte 0x22 +40221343: 40 .byte 0x40 + +40221344 : +40221344: f0c112 addi a1, a1, -16 +40221347: fff421 l32r a2, 40221318 +4022134a: 3109 s32i.n a0, a1, 12 +4022134c: 21c9 s32i.n a12, a1, 8 +4022134e: 830c movi.n a3, 8 +40221350: 040c movi.n a4, 0 +40221352: 330b addi.n a3, a3, -1 +40221354: 0249 s32i.n a4, a2, 0 +40221356: 1229 s32i.n a2, a2, 4 +40221358: 0f4242 s8i a4, a2, 15 +4022135b: 743030 extui a3, a3, 0, 8 +4022135e: 20c222 addi a2, a2, 32 +40221361: fed356 bnez a3, 40221352 +40221364: fe6121 l32r a2, 40220ce8 +40221367: 730c movi.n a3, 7 +40221369: 244232 s8i a3, a2, 36 +4022136c: 444232 s8i a3, a2, 68 +4022136f: 230c movi.n a3, 2 +40221371: 144232 s8i a3, a2, 20 +40221374: 330c movi.n a3, 3 +40221376: 154232 s8i a3, a2, 21 +40221379: 530c movi.n a3, 5 +4022137b: 164232 s8i a3, a2, 22 +4022137e: 630c movi.n a3, 6 +40221380: 174232 s8i a3, a2, 23 +40221383: ffe631 l32r a3, 4022131c +40221386: 0c0c movi.n a12, 0 +40221388: 476232 s32i a3, a2, 0x11c +4022138b: ffe531 l32r a3, 40221320 +4022138e: 140c movi.n a4, 1 +40221390: 496232 s32i a3, a2, 0x124 +40221393: ffe431 l32r a3, 40221324 +40221396: 274242 s8i a4, a2, 39 +40221399: 4b6232 s32i a3, a2, 0x12c +4022139c: ffe331 l32r a3, 40221328 +4022139f: 474242 s8i a4, a2, 71 +402213a2: 02c9 s32i.n a12, a2, 0 +402213a4: 4d6232 s32i a3, a2, 0x134 +402213a7: 12c9 s32i.n a12, a2, 4 +402213a9: ffe131 l32r a3, 40221330 +402213ac: 22c9 s32i.n a12, a2, 8 +402213ae: 32c9 s32i.n a12, a2, 12 +402213b0: 42c9 s32i.n a12, a2, 16 +402213b2: 4662c2 s32i a12, a2, 0x118 +402213b5: 4862c2 s32i a12, a2, 0x120 +402213b8: 4a62c2 s32i a12, a2, 0x128 +402213bb: 4c62c2 s32i a12, a2, 0x130 +402213be: ffdb21 l32r a2, 4022132c +402213c1: 0020c0 memw +402213c4: 0239 s32i.n a3, a2, 0 +402213c6: 012245 call0 402225ec +402213c9: ffda41 l32r a4, 40221334 +402213cc: ffdb21 l32r a2, 40221338 +402213cf: 252c movi.n a5, 34 +402213d1: 032c movi.n a3, 32 +402213d3: cb5001 l32r a0, 40214114 +402213d6: 0000c0 callx0 a0 +402213d9: ffd831 l32r a3, 4022133c +402213dc: fe0921 l32r a2, 40220c00 +402213df: 204cc0 or a4, a12, a12 +402213e2: 8bf401 l32r a0, 402043b4 +402213e5: 0000c0 callx0 a0 +402213e8: d1f921 l32r a2, 40215bcc +402213eb: fda931 l32r a3, 40220a90 +402213ee: 6a0242 l8ui a4, a2, 106 +402213f1: 900621 l32r a2, 4020540c +402213f4: 0514c7 beq a4, a12, 402213fd +402213f7: a29821 l32r a2, 40209e58 +402213fa: 822420 mull a2, a4, a2 +402213fd: 0329 s32i.n a2, a3, 0 +402213ff: ffd031 l32r a3, 40221340 +40221402: fd9721 l32r a2, 40220a60 +40221405: 040c movi.n a4, 0 +40221407: 8beb01 l32r a0, 402043b4 +4022140a: 0000c0 callx0 a0 +4022140d: ff6845 call0 40220a94 +40221410: 3108 l32i.n a0, a1, 12 +40221412: 21c8 l32i.n a12, a1, 8 +40221414: 10c112 addi a1, a1, 16 +40221417: f00d ret.n +40221419: 000000 ill +4022141c: 8e5d excw +4022141e: fe .byte 0xfe +4022141f: 3f .byte 0x3f +40221420: 3a38 l32i.n a3, a10, 12 +40221422: 344010 extui a4, a1, 0, 4 +40221425: 103c movi.n a0, 49 +40221427: c11240 mul16u a1, a2, a4 +4022142a: fc21d0 excw +4022142d: ff .byte 0xff +4022142e: 91d9 s32i.n a13, a1, 36 +40221430: 81e9 s32i.n a14, a1, 32 +40221432: b109 s32i.n a0, a1, 44 +40221434: a1c9 s32i.n a12, a1, 40 +40221436: 71f9 s32i.n a15, a1, 28 +40221438: 0002c2 l8ui a12, a2, 0 +4022143b: ffafd2 movi a13, -1 +4022143e: 0e0c movi.n a14, 0 +40221440: fd3805 call0 4021e7c4 +40221443: 002256 bnez a2, 40221449 +40221446: fd0945 call0 4021e4dc +40221449: 0c2d mov.n a2, a12 +4022144b: feab05 call0 4021fefc +4022144e: 0e6216 beqz a2, 40221538 +40221451: 8f9301 l32r a0, 402052a0 +40221454: 0000c0 callx0 a0 +40221457: fe2421 l32r a2, 40220ce8 +4022145a: 02f8 l32i.n a15, a2, 0 +4022145c: 8f9201 l32r a0, 402052a4 +4022145f: 0000c0 callx0 a0 +40221462: 320c movi.n a2, 3 +40221464: 202f20 or a2, a15, a2 +40221467: ffa032 movi a3, 255 +4022146a: 029237 bne a2, a3, 40221470 +4022146d: 0031c6 j 40221538 +40221470: fe1e31 l32r a3, 40220ce8 +40221473: 22cc72 addi a7, a12, 34 +40221476: b02730 addx8 a2, a7, a3 +40221479: 22f8 l32i.n a15, a2, 8 +4022147b: 0b9f16 beqz a15, 40221538 +4022147e: 027d mov.n a7, a2 +40221480: 228b addi.n a2, a2, 8 +40221482: 27e9 s32i.n a14, a7, 8 +40221484: 3729 s32i.n a2, a7, 12 +40221486: 07dd mov.n a13, a7 +40221488: 8f28 l32i.n a2, a15, 32 +4022148a: 20cf32 addi a3, a15, 32 +4022148d: 1129 s32i.n a2, a1, 4 +4022148f: 7f28 l32i.n a2, a15, 28 +40221491: 8fe9 s32i.n a14, a15, 32 +40221493: 0139 s32i.n a3, a1, 0 +40221495: 82cc bnez.n a2, 402214a1 +40221497: 9f28 l32i.n a2, a15, 36 +40221499: 0228 l32i.n a2, a2, 0 +4022149b: 042120 extui a2, a2, 1, 1 +4022149e: 000f06 j 402214de +402214a1: 8f7f01 l32r a0, 402052a0 +402214a4: 0000c0 callx0 a0 +402214a7: 9f28 l32i.n a2, a15, 36 +402214a9: 7f38 l32i.n a3, a15, 28 +402214ab: 1248 l32i.n a4, a2, 4 +402214ad: 0228 l32i.n a2, a2, 0 +402214af: 760332 l8ui a3, a3, 118 +402214b2: 255440 extui a5, a4, 20, 3 +402214b5: 042120 extui a2, a2, 1, 1 +402214b8: 344040 extui a4, a4, 0, 4 +402214bb: ffd901 l32r a0, 40221420 +402214be: 0000c0 callx0 a0 +402214c1: 2129 s32i.n a2, a1, 8 +402214c3: 8f7801 l32r a0, 402052a4 +402214c6: 0000c0 callx0 a0 +402214c9: 2128 l32i.n a2, a1, 8 +402214cb: 0f8266 bnei a2, 8, 402214de +402214ce: 3d28 l32i.n a2, a13, 12 +402214d0: 8fe9 s32i.n a14, a15, 32 +402214d2: 02f9 s32i.n a15, a2, 0 +402214d4: 0128 l32i.n a2, a1, 0 +402214d6: 3d29 s32i.n a2, a13, 12 +402214d8: 001546 j 40221531 +402214db: 000000 ill +402214de: 9f48 l32i.n a4, a15, 36 +402214e0: 342020 extui a2, a2, 0, 4 +402214e3: 0458 l32i.n a5, a4, 0 +402214e5: 1132e0 slli a3, a2, 2 +402214e8: c3af22 movi a2, -61 +402214eb: 102520 and a2, a5, a2 +402214ee: 202230 or a2, a2, a3 +402214f1: 0429 s32i.n a2, a4, 0 +402214f3: 8f6b01 l32r a0, 402052a0 +402214f6: 0000c0 callx0 a0 +402214f9: 9f28 l32i.n a2, a15, 36 +402214fb: fdfb31 l32r a3, 40220ce8 +402214fe: 0228 l32i.n a2, a2, 0 +40221500: 8fe9 s32i.n a14, a15, 32 +40221502: 342220 extui a2, a2, 2, 4 +40221505: 1122b0 slli a2, a2, 5 +40221508: 232a add.n a2, a3, a2 +4022150a: 7228 l32i.n a2, a2, 28 +4022150c: 02f9 s32i.n a15, a2, 0 +4022150e: 9f28 l32i.n a2, a15, 36 +40221510: 0228 l32i.n a2, a2, 0 +40221512: 342220 extui a2, a2, 2, 4 +40221515: 1122b0 slli a2, a2, 5 +40221518: 232a add.n a2, a3, a2 +4022151a: 0138 l32i.n a3, a1, 0 +4022151c: 7239 s32i.n a3, a2, 28 +4022151e: 8f6101 l32r a0, 402052a4 +40221521: 0000c0 callx0 a0 +40221524: 9f28 l32i.n a2, a15, 36 +40221526: 1228 l32i.n a2, a2, 4 +40221528: 252420 extui a2, a2, 20, 3 +4022152b: ffbe01 l32r a0, 40221424 +4022152e: 0000c0 callx0 a0 +40221531: 11f8 l32i.n a15, a1, 4 +40221533: f51f56 bnez a15, 40221488 +40221536: 0cdd mov.n a13, a12 +40221538: cc1b addi.n a12, a12, 1 +4022153a: 74c0c0 extui a12, a12, 0, 8 +4022153d: ffb731 l32r a3, 4022141c +40221540: fecc22 addi a2, a12, -2 +40221543: 83ce20 moveqz a12, a14, a2 +40221546: 000322 l8ui a2, a3, 0 +40221549: 0212c7 beq a2, a12, 4022154f +4022154c: ffbc06 j 40221440 +4022154f: 0f0d26 beqi a13, -1, 40221562 +40221552: dd1b addi.n a13, a13, 1 +40221554: 74d0d0 extui a13, a13, 0, 8 +40221557: 0043d2 s8i a13, a3, 0 +4022155a: 042d66 bnei a13, 2, 40221562 +4022155d: 020c movi.n a2, 0 +4022155f: 004322 s8i a2, a3, 0 +40221562: b108 l32i.n a0, a1, 44 +40221564: a1c8 l32i.n a12, a1, 40 +40221566: 91d8 l32i.n a13, a1, 36 +40221568: 81e8 l32i.n a14, a1, 32 +4022156a: 71f8 l32i.n a15, a1, 28 +4022156c: 30c112 addi a1, a1, 48 +4022156f: f00d ret.n +40221571: 000000 ill + +40221574 : +40221574: f0c112 addi a1, a1, -16 +40221577: 3109 s32i.n a0, a1, 12 +40221579: ffeac5 call0 40221428 +4022157c: 3108 l32i.n a0, a1, 12 +4022157e: 10c112 addi a1, a1, 16 +40221581: f00d ret.n +40221583: 410000 srli a0, a0, 0 +40221586: 2c4010 excw +40221589: 103d excw +4022158b: 40 .byte 0x40 + +4022158c : +4022158c: f0c112 addi a1, a1, -16 +4022158f: 21c9 s32i.n a12, a1, 8 +40221591: 3109 s32i.n a0, a1, 12 +40221593: 0161d2 s32i a13, a1, 4 +40221596: 74c020 extui a12, a2, 0, 8 +40221599: 005c16 beqz a12, 402215a2 +4022159c: 8f4101 l32r a0, 402052a0 +4022159f: 0000c0 callx0 a0 +402215a2: 4d0c movi.n a13, 4 +402215a4: fff801 l32r a0, 40221584 +402215a7: 0000c0 callx0 a0 +402215aa: 07c216 beqz a2, 4022162a +402215ad: dd0b addi.n a13, a13, -1 +402215af: 74d0d0 extui a13, a13, 0, 8 +402215b2: feed56 bnez a13, 402215a4 +402215b5: fdccd1 l32r a13, 40220ce8 +402215b8: 0d38 l32i.n a3, a13, 0 +402215ba: 602030 neg a2, a3 +402215bd: 102230 and a2, a2, a3 +402215c0: 40f220 nsau a2, a2 +402215c3: 602020 neg a2, a2 +402215c6: 1fc222 addi a2, a2, 31 +402215c9: 0d3d mov.n a3, a13 +402215cb: 3a0226 beqi a2, -1, 40221609 +402215ce: 1152b0 slli a5, a2, 5 +402215d1: 435a add.n a4, a3, a5 +402215d3: 6448 l32i.n a4, a4, 24 +402215d5: 051456 bnez a4, 4022162a +402215d8: 421b addi.n a4, a2, 1 +402215da: 1144b0 slli a4, a4, 5 +402215dd: 434a add.n a4, a3, a4 +402215df: 3448 l32i.n a4, a4, 12 +402215e1: 045456 bnez a4, 4022162a +402215e4: 335a add.n a3, a3, a5 +402215e6: 240342 l8ui a4, a3, 36 +402215e9: 149c beqz.n a4, 402215fe +402215eb: 0f3426 beqi a4, 3, 402215fe +402215ee: 330c movi.n a3, 3 +402215f0: 0c3437 bltu a4, a3, 40221600 +402215f3: 130c movi.n a3, 1 +402215f5: 0764b6 bltui a4, 6, 40221600 +402215f8: 030c movi.n a3, 0 +402215fa: 000086 j 40221600 +402215fd: 230c00 excw +40221600: ffe201 l32r a0, 40221588 +40221603: 0000c0 callx0 a0 +40221606: ffeb86 j 402215b8 +40221609: 6d28 l32i.n a2, a13, 24 +4022160b: b2dc bnez.n a2, 4022162a +4022160d: ed28 l32i.n a2, a13, 56 +4022160f: 72dc bnez.n a2, 4022162a +40221611: 462d22 l32i a2, a13, 0x118 +40221614: 22dc bnez.n a2, 4022162a +40221616: 482d22 l32i a2, a13, 0x120 +40221619: d2cc bnez.n a2, 4022162a +4022161b: 171c27 beq a12, a2, 40221636 +4022161e: 8f2101 l32r a0, 402052a4 +40221621: 0000c0 callx0 a0 +40221624: 020c movi.n a2, 0 +40221626: 000306 j 40221636 +40221629: 120c00 excw +4022162c: 6c8c beqz.n a12, 40221636 +4022162e: 8f1d01 l32r a0, 402052a4 +40221631: 0000c0 callx0 a0 +40221634: 120c movi.n a2, 1 +40221636: 3108 l32i.n a0, a1, 12 +40221638: 21c8 l32i.n a12, a1, 8 +4022163a: 11d8 l32i.n a13, a1, 4 +4022163c: 10c112 addi a1, a1, 16 +4022163f: f00d ret.n +40221641: 000000 ill +40221644: fe8eb2 excw +40221647: 3f .byte 0x3f +40221648: fe8eb5 excw +4022164b: 3f .byte 0x3f +4022164c: fe8eb4 excw +4022164f: 3f .byte 0x3f +40221650: fe9134 excw +40221653: 3f .byte 0x3f +40221654: 8e5c movi.n a14, 88 +40221656: fe .byte 0xfe +40221657: 3f .byte 0x3f +40221658: 000000 ill +4022165b: 8e6aa0 excw +4022165e: fe .byte 0xfe +4022165f: 3f .byte 0x3f +40221660: 4218 l32i.n a1, a2, 16 +40221662: 5c4010 excw +40221665: 103d excw +40221667: 627c40 excw +4022166a: 124010 excw +4022166d: d9c0c1 l32r a12, 40217d70 +40221670: f4d1d1 l32r a13, 4021e9b4 +40221673: ff .byte 0xff +40221674: e1c9 s32i.n a12, a1, 56 +40221676: f109 s32i.n a0, a1, 60 +40221678: 0c61e2 s32i a14, a1, 48 +4022167b: 0b61f2 s32i a15, a1, 44 +4022167e: 20c220 or a12, a2, a2 +40221681: 000d22 l8ui a2, a13, 0 +40221684: 341266 bnei a2, 1, 402216bc +40221687: 8f0601 l32r a0, 402052a0 +4022168a: 0000c0 callx0 a0 +4022168d: ffee21 l32r a2, 40221648 +40221690: 000222 l8ui a2, a2, 0 +40221693: 62cc bnez.n a2, 4022169d +40221695: fcad21 l32r a2, 4022094c +40221698: 030c movi.n a3, 0 +4022169a: 004232 s8i a3, a2, 0 +4022169d: ffeb21 l32r a2, 4022164c +402216a0: 000222 l8ui a2, a2, 0 +402216a3: a2cc bnez.n a2, 402216b1 +402216a5: fca821 l32r a2, 40220948 +402216a8: 73a032 movi a3, 115 +402216ab: 0020c0 memw +402216ae: 006232 s32i a3, a2, 0 +402216b1: 020c movi.n a2, 0 +402216b3: 004d22 s8i a2, a13, 0 +402216b6: 8efb01 l32r a0, 402052a4 +402216b9: 0000c0 callx0 a0 +402216bc: 0c28 l32i.n a2, a12, 0 +402216be: 930c movi.n a3, 9 +402216c0: 029237 bne a2, a3, 402216c6 +402216c3: 012c86 j 40221b79 +402216c6: 2b3327 bltu a3, a2, 402216f5 +402216c9: 024266 bnei a2, 4, 402216cf +402216cc: 002906 j 40221774 +402216cf: 0242f6 bgeui a2, 4, 402216d5 +402216d2: 0021c6 j 4022175d +402216d5: 025266 bnei a2, 5, 402216db +402216d8: 008e46 j 40221915 +402216db: 028226 beqi a2, 8, 402216e1 +402216de: 015f86 j 40221c60 +402216e1: ffdb31 l32r a3, 40221650 +402216e4: 080322 l8ui a2, a3, 8 +402216e7: ffc222 addi a2, a2, -1 +402216ea: 084322 s8i a2, a3, 8 +402216ed: ffd385 call0 40221428 +402216f0: 015b06 j 40221c60 +402216f3: 660000 excw +402216f6: 4602a2 l8ui a10, a2, 70 +402216f9: 0c0121 l32r a2, 401e4700 <_lit4_end+0xde3d4> +402216fc: 3327c3 excw +402216ff: 926625 excw +40221702: 144602 s8i a0, a6, 20 +40221705: b30c01 l32r a0, 4020e338 +40221708: 021237 beq a2, a3, 4022170e +4022170b: 015446 j 40221c60 +4022170e: 8ee401 l32r a0, 402052a0 +40221711: 0000c0 callx0 a0 +40221714: ffcf31 l32r a3, 40221650 +40221717: 0c28 l32i.n a2, a12, 0 +40221719: 232a add.n a2, a3, a2 +4022171b: 000232 l8ui a3, a2, 0 +4022171e: 330b addi.n a3, a3, -1 +40221720: 004232 s8i a3, a2, 0 +40221723: 012786 j 40221bc5 +40221726: d30c movi.n a3, 13 +40221728: 029237 bne a2, a3, 4022172e +4022172b: 012886 j 40221bd1 +4022172e: e30c movi.n a3, 14 +40221730: 021237 beq a2, a3, 40221736 +40221733: 014a46 j 40221c60 +40221736: 8eda01 l32r a0, 402052a0 +40221739: 0000c0 callx0 a0 +4022173c: 0c28 l32i.n a2, a12, 0 +4022173e: ffc431 l32r a3, 40221650 +40221741: 232a add.n a2, a3, a2 +40221743: 000232 l8ui a3, a2, 0 +40221746: 330b addi.n a3, a3, -1 +40221748: 004232 s8i a3, a2, 0 +4022174b: 8ed601 l32r a0, 402052a4 +4022174e: 0000c0 callx0 a0 +40221751: ffc301 l32r a0, 40221660 +40221754: 0000c0 callx0 a0 +40221757: 014146 j 40221c60 +4022175a: 000000 ill +4022175d: ffbc31 l32r a3, 40221650 +40221760: 332a add.n a3, a3, a2 +40221762: 000342 l8ui a4, a3, 0 +40221765: 440b addi.n a4, a4, -1 +40221767: 004342 s8i a4, a3, 0 +4022176a: ffbe01 l32r a0, 40221664 +4022176d: 0000c0 callx0 a0 +40221770: 013b06 j 40221c60 +40221773: cb0100 excw +40221776: 8e .byte 0x8e +40221777: 0000c0 callx0 a0 +4022177a: 0c28 l32i.n a2, a12, 0 +4022177c: ffb531 l32r a3, 40221650 +4022177f: 0c0c movi.n a12, 0 +40221781: 232a add.n a2, a3, a2 +40221783: 000232 l8ui a3, a2, 0 +40221786: 20dcc0 or a13, a12, a12 +40221789: 330b addi.n a3, a3, -1 +4022178b: 004232 s8i a3, a2, 0 +4022178e: 8ec501 l32r a0, 402052a4 +40221791: 0000c0 callx0 a0 +40221794: 8ec301 l32r a0, 402052a0 +40221797: 0000c0 callx0 a0 +4022179a: fd5341 l32r a4, 40220ce8 +4022179d: 4a24e2 l32i a14, a4, 0x128 +402217a0: 04fd mov.n a15, a4 +402217a2: fe8c beqz.n a14, 402217b5 +402217a4: 8e28 l32i.n a2, a14, 32 +402217a6: 4a6422 s32i a2, a4, 0x128 +402217a9: 42cc bnez.n a2, 402217b1 +402217ab: fede21 l32r a2, 40221324 +402217ae: 4b6422 s32i a2, a4, 0x12c +402217b1: 050c movi.n a5, 0 +402217b3: 8e59 s32i.n a5, a14, 32 +402217b5: 8ebb01 l32r a0, 402052a4 +402217b8: 0000c0 callx0 a0 +402217bb: 121e16 beqz a14, 402218e0 +402217be: 9e28 l32i.n a2, a14, 36 +402217c0: 170c movi.n a7, 1 +402217c2: 4258 l32i.n a5, a2, 16 +402217c4: f87c movi.n a8, -1 +402217c6: 602050 neg a2, a5 +402217c9: 102250 and a2, a2, a5 +402217cc: 40f220 nsau a2, a2 +402217cf: 602020 neg a2, a2 +402217d2: 1fc232 addi a3, a2, 31 +402217d5: 300326 beqi a3, -1, 40221809 +402217d8: 4e2f22 l32i a2, a15, 0x138 +402217db: 1a5237 bbc a2, a3, 402217f9 +402217de: a023f0 addx4 a2, a3, a15 +402217e1: 4f2292 l32i a9, a2, 0x13c +402217e4: 2139 s32i.n a3, a1, 8 +402217e6: 3159 s32i.n a5, a1, 12 +402217e8: 4179 s32i.n a7, a1, 16 +402217ea: 5189 s32i.n a8, a1, 20 +402217ec: 0e2d mov.n a2, a14 +402217ee: 0009c0 callx0 a9 +402217f1: 5188 l32i.n a8, a1, 20 +402217f3: 4178 l32i.n a7, a1, 16 +402217f5: 3158 l32i.n a5, a1, 12 +402217f7: 2138 l32i.n a3, a1, 8 +402217f9: 401300 ssl a3 +402217fc: a12700 sll a2, a7 +402217ff: 302820 xor a2, a8, a2 +40221802: 105520 and a5, a5, a2 +40221805: ffef46 j 402217c6 +40221808: 9e3800 excw +4022180b: 0328 l32i.n a2, a3, 0 +4022180d: 34f2c7 bbsi a2, 28, 40221845 +40221810: 80d521 l32r a2, 40201b64 +40221813: 160c movi.n a6, 1 +40221815: 01d222 addmi a2, a2, 0x100 +40221818: de0252 l8ui a5, a2, 222 +4022181b: fec522 addi a2, a5, -2 +4022181e: 550c movi.n a5, 5 +40221820: 835620 moveqz a5, a6, a2 +40221823: ff8c61 l32r a6, 40221654 +40221826: 1328 l32i.n a2, a3, 4 +40221828: 000632 l8ui a3, a6, 0 +4022182b: 342420 extui a2, a2, 4, 4 +4022182e: 223a add.n a2, a2, a3 +40221830: 742020 extui a2, a2, 0, 8 +40221833: 004622 s8i a2, a6, 0 +40221836: 0b3257 bltu a2, a5, 40221845 +40221839: 020c movi.n a2, 0 +4022183b: 004622 s8i a2, a6, 0 +4022183e: 030c movi.n a3, 0 +40221840: 120c movi.n a2, 1 +40221842: faa3c5 call0 4021c280 +40221845: 9e38 l32i.n a3, a14, 36 +40221847: 0358 l32i.n a5, a3, 0 +40221849: 412650 srli a2, a5, 6 +4022184c: 0c6237 bbci a2, 3, 4022185c +4022184f: 09e517 bbsi a5, 1, 4022185c +40221852: 0f0332 l8ui a3, a3, 15 +40221855: 150c movi.n a5, 1 +40221857: 330b addi.n a3, a3, -1 +40221859: 83c530 moveqz a12, a5, a3 +4022185c: 1062d7 bbci a2, 13, 40221870 +4022185f: 0e28 l32i.n a2, a14, 0 +40221861: 0c0232 l8ui a3, a2, 12 +40221864: 03cc bnez.n a3, 40221868 +40221866: 4239 s32i.n a3, a2, 16 +40221868: 075345 call0 40228da0 +4022186b: 1d0c movi.n a13, 1 +4022186d: 0007c6 j 40221890 +40221870: 0ee2e7 bbsi a2, 14, 40221882 +40221873: 11f287 bbsi a2, 24, 40221888 +40221876: 14e2f7 bbsi a2, 15, 4022188e +40221879: 027257 bbci a2, 21, 4022187f +4022187c: ffc506 j 40221794 +4022187f: 000346 j 40221890 +40221882: 4d0c movi.n a13, 4 +40221884: 000206 j 40221890 +40221887: 6d0c00 excw +4022188a: 000086 j 40221890 +4022188d: 5d0c00 excw +40221890: 9e28 l32i.n a2, a14, 36 +40221892: 0228 l32i.n a2, a2, 0 +40221894: 3d72d7 bbci a2, 29, 402218d5 +40221897: 0b1e22 l16ui a2, a14, 22 +4022189a: 2e58 l32i.n a5, a14, 8 +4022189c: fcc222 addi a2, a2, -4 +4022189f: 0b5e22 s16i a2, a14, 22 +402218a2: 0020c0 memw +402218a5: 0528 l32i.n a2, a5, 0 +402218a7: 0020c0 memw +402218aa: 0568 l32i.n a6, a5, 0 +402218ac: b42c20 extui a2, a2, 12, 12 +402218af: fcc222 addi a2, a2, -4 +402218b2: b42020 extui a2, a2, 0, 12 +402218b5: 113240 slli a3, a2, 12 +402218b8: 82b221 l32r a2, 40202380 +402218bb: 102620 and a2, a6, a2 +402218be: 202230 or a2, a2, a3 +402218c1: 0020c0 memw +402218c4: 0529 s32i.n a2, a5, 0 +402218c6: 8ed321 l32r a2, 40205414 +402218c9: 000232 l8ui a3, a2, 0 +402218cc: ec4316 beqz a3, 40221794 +402218cf: 00a032 movi a3, 0 +402218d2: 004232 s8i a3, a2, 0 +402218d5: 0d3d mov.n a3, a13 +402218d7: 0e2d mov.n a2, a14 +402218d9: 00bd45 call0 402224b0 +402218dc: ffad06 j 40221794 +402218df: 1c6600 excw +402218e2: 111005 call0 402329e4 <_irom0_text_end+0x1e68> +402218e5: bb0520 excw +402218e8: 85fd excw +402218ea: 22ff31 l32r a3, 401ea4e8 <_lit4_end+0xe41bc> +402218ed: c501a0 extui a0, a10, 17, 13 +402218f0: ffc9 s32i.n a12, a15, 60 +402218f2: b2cc bnez.n a2, 40221901 +402218f4: fe4205 call0 4021fd18 +402218f7: 628c beqz.n a2, 40221901 +402218f9: fe5f05 call0 4021feec +402218fc: 128c beqz.n a2, 40221901 +402218fe: ff3285 call0 40220c28 +40221901: 809821 l32r a2, 40201b64 +40221904: 7238 l32i.n a3, a2, 28 +40221906: 02e3e7 bbsi a3, 14, 4022190c +40221909: 00d4c6 j 40221c60 +4022190c: 1228 l32i.n a2, a2, 4 +4022190e: e52545 call0 40206b64 +40221911: 00d2c6 j 40221c60 +40221914: 620100 excw +40221917: 8e .byte 0x8e +40221918: 0000c0 callx0 a0 +4022191b: ff4d31 l32r a3, 40221650 +4022191e: 0c28 l32i.n a2, a12, 0 +40221920: 232a add.n a2, a3, a2 +40221922: 000232 l8ui a3, a2, 0 +40221925: ffc332 addi a3, a3, -1 +40221928: 004232 s8i a3, a2, 0 +4022192b: 8e5e01 l32r a0, 402052a4 +4022192e: 0000c0 callx0 a0 +40221931: 8e5b01 l32r a0, 402052a0 +40221934: 0000c0 callx0 a0 +40221937: fcec21 l32r a2, 40220ce8 +4022193a: 4c22d2 l32i a13, a2, 0x130 +4022193d: fd8c beqz.n a13, 40221950 +4022193f: 8d38 l32i.n a3, a13, 32 +40221941: 4c6232 s32i a3, a2, 0x130 +40221944: 43cc bnez.n a3, 4022194c +40221946: fe7831 l32r a3, 40221328 +40221949: 4d6232 s32i a3, a2, 0x134 +4022194c: 020c movi.n a2, 0 +4022194e: 8d29 s32i.n a2, a13, 32 +40221950: 8e5501 l32r a0, 402052a4 +40221953: 0000c0 callx0 a0 +40221956: 306d16 beqz a13, 40221c60 +40221959: 4dc8 l32i.n a12, a13, 16 +4022195b: 1d28 l32i.n a2, a13, 4 +4022195d: 4ccb addi.n a4, a12, 12 +4022195f: 1249 s32i.n a4, a2, 4 +40221961: 0c0c22 l8ui a2, a12, 12 +40221964: c30c movi.n a3, 12 +40221966: 103230 and a3, a2, a3 +40221969: fc47e1 l32r a14, 40220a88 +4022196c: 1139 s32i.n a3, a1, 4 +4022196e: 037c movi.n a3, -16 +40221970: 103230 and a3, a2, a3 +40221973: 000e22 l8ui a2, a14, 0 +40221976: 0139 s32i.n a3, a1, 0 +40221978: 012280 slli a2, a2, 24 +4022197b: 312820 srai a2, a2, 24 +4022197e: 0e12a6 blti a2, 1, 40221990 +40221981: 2149 s32i.n a4, a1, 8 +40221983: f69c85 call0 4021834c +40221986: 222b addi.n a2, a2, 2 +40221988: 212220 srai a2, a2, 2 +4022198b: 004e22 s8i a2, a14, 0 +4022198e: 2148 l32i.n a4, a1, 8 +40221990: 0c78 l32i.n a7, a12, 0 +40221992: ff31e1 l32r a14, 40221658 +40221995: edec21 l32r a2, 4021d148 +40221998: 10e7e0 and a14, a7, a14 +4022199b: 090727 bnone a7, a2, 402219a8 +4022199e: 220c movi.n a2, 2 +402219a0: 030c movi.n a3, 0 +402219a2: 8323e0 moveqz a2, a3, a14 +402219a5: 000186 j 402219af +402219a8: 220c movi.n a2, 2 +402219aa: 130c movi.n a3, 1 +402219ac: 9323e0 movnez a2, a3, a14 +402219af: 907d61 l32r a6, 40205ba4 +402219b2: 02ed mov.n a14, a2 +402219b4: df0652 l8ui a5, a6, 223 +402219b7: 045050 extui a5, a5, 0, 1 +402219ba: 746050 extui a6, a5, 0, 8 +402219bd: 968c beqz.n a6, 402219ca +402219bf: ff2731 l32r a3, 4022165c +402219c2: 001322 l16ui a2, a3, 0 +402219c5: 221b addi.n a2, a2, 1 +402219c7: 005322 s16i a2, a3, 0 +402219ca: 1128 l32i.n a2, a1, 4 +402219cc: 168266 bnei a2, 8, 402219e6 +402219cf: ff2345 call0 40220c04 +402219d2: fe3445 call0 4021fd18 +402219d5: 0b4216 beqz a2, 40221a8d +402219d8: fe5105 call0 4021feec +402219db: 0ae216 beqz a2, 40221a8d +402219de: ff2485 call0 40220c28 +402219e1: 002a06 j 40221a8d +402219e4: 320000 excw +402219e7: 560121 l32r a2, 401f71ec <_lit4_end+0xf0ec0> +402219ea: 220a03 excw +402219ed: 0d0c movi.n a13, 0 +402219ef: 18a082 movi a8, 24 +402219f2: 142020 extui a2, a2, 0, 2 +402219f5: fdc232 addi a3, a2, -3 +402219f8: e21c movi.n a2, 30 +402219fa: 932830 movnez a2, a8, a3 +402219fd: 0c0c82 l8ui a8, a12, 12 +40221a00: 8ca032 movi a3, 140 +40221a03: 103830 and a3, a8, a3 +40221a06: 88a092 movi a9, 136 +40221a09: c03390 sub a3, a3, a9 +40221a0c: 822b addi.n a8, a2, 2 +40221a0e: 832830 moveqz a2, a8, a3 +40221a11: f4f020 extui a15, a2, 0, 16 +40221a14: 8af821 l32r a2, 402045f4 +40221a17: b53070 extui a3, a7, 16, 12 +40221a1a: 040727 bnone a7, a2, 40221a22 +40221a1d: 1c78 l32i.n a7, a12, 4 +40221a1f: f43870 extui a3, a7, 8, 16 +40221a22: c0f3f0 sub a15, a3, a15 +40221a25: fccff2 addi a15, a15, -4 +40221a28: 0128 l32i.n a2, a1, 0 +40221a2a: 24cc82 addi a8, a12, 36 +40221a2d: f4f0f0 extui a15, a15, 0, 16 +40221a30: f8fa add.n a15, a8, a15 +40221a32: 34e266 bnei a2, 128, 40221a6a +40221a35: 669c beqz.n a6, 40221a4f +40221a37: 085d mov.n a5, a8 +40221a39: 80a072 movi a7, 128 +40221a3c: 0f6d mov.n a6, a15 +40221a3e: 0c3d mov.n a3, a12 +40221a40: 0d2d mov.n a2, a13 +40221a42: 5189 s32i.n a8, a1, 20 +40221a44: ff5d05 call0 40221018 +40221a47: 5188 l32i.n a8, a1, 20 +40221a49: 021266 bnei a2, 1, 40221a4f +40221a4c: 004006 j 40221b50 +40221a4f: 16cc22 addi a2, a12, 22 +40221a52: 5189 s32i.n a8, a1, 20 +40221a54: fe5045 call0 4021ff5c +40221a57: 5188 l32i.n a8, a1, 20 +40221a59: 02bc beqz.n a2, 40221a8d +40221a5b: 0f4d mov.n a4, a15 +40221a5d: 083d mov.n a3, a8 +40221a5f: 0d2d mov.n a2, a13 +40221a61: fe5a05 call0 40220004 +40221a64: 000946 j 40221a8d +40221a67: 000000 ill +40221a6a: 0138 l32i.n a3, a1, 0 +40221a6c: b0c322 addi a2, a3, -80 +40221a6f: a2dc bnez.n a2, 40221a8d +40221a71: 859c beqz.n a5, 40221a8d +40221a73: 075c movi.n a7, 80 +40221a75: 0f6d mov.n a6, a15 +40221a77: 085d mov.n a5, a8 +40221a79: 0c3d mov.n a3, a12 +40221a7b: 202dd0 or a2, a13, a13 +40221a7e: ff5985 call0 40221018 +40221a81: 021266 bnei a2, 1, 40221a87 +40221a84: 003206 j 40221b50 +40221a87: 50a042 movi a4, 80 +40221a8a: 006142 s32i a4, a1, 0 +40221a8d: 022e66 bnei a14, 2, 40221a93 +40221a90: 002786 j 40221b32 +40221a93: 16ccf2 addi a15, a12, 22 +40221a96: 0f3d mov.n a3, a15 +40221a98: 0e2d mov.n a2, a14 +40221a9a: 012b85 call0 40222d54 +40221a9d: 7d29 s32i.n a2, a13, 28 +40221a9f: 0c3d mov.n a3, a12 +40221aa1: fef101 l32r a0, 40221668 +40221aa4: 0000c0 callx0 a0 +40221aa7: 000c22 l8ui a2, a12, 0 +40221aaa: 223b addi.n a2, a2, 3 +40221aac: 004c22 s8i a2, a12, 0 +40221aaf: 0e2d mov.n a2, a14 +40221ab1: fe9d05 call0 40220484 +40221ab4: 1158 l32i.n a5, a1, 4 +40221ab6: 05d556 bnez a5, 40221b17 +40221ab9: 05a216 beqz a2, 40221b17 +40221abc: 0d0c32 l8ui a3, a12, 13 +40221abf: 841c movi.n a4, 24 +40221ac1: 143030 extui a3, a3, 0, 2 +40221ac4: fdc322 addi a2, a3, -3 +40221ac7: e31c movi.n a3, 30 +40221ac9: 933420 movnez a3, a4, a2 +40221acc: 0c0c42 l8ui a4, a12, 12 +40221acf: 8ca022 movi a2, 140 +40221ad2: 102420 and a2, a4, a2 +40221ad5: 88a052 movi a5, 136 +40221ad8: c02250 sub a2, a2, a5 +40221adb: 432b addi.n a4, a3, 2 +40221add: 833420 moveqz a3, a4, a2 +40221ae0: 8ac551 l32r a5, 402045f4 +40221ae3: 0c28 l32i.n a2, a12, 0 +40221ae5: f44030 extui a4, a3, 0, 16 +40221ae8: b53020 extui a3, a2, 16, 12 +40221aeb: 040257 bnone a2, a5, 40221af3 +40221aee: 1c28 l32i.n a2, a12, 4 +40221af0: f43820 extui a3, a2, 8, 16 +40221af3: c03340 sub a3, a3, a4 +40221af6: fcc332 addi a3, a3, -4 +40221af9: 0168 l32i.n a6, a1, 0 +40221afb: 24cc22 addi a2, a12, 36 +40221afe: f43030 extui a3, a3, 0, 16 +40221b01: 323a add.n a3, a2, a3 +40221b03: 04b626 beqi a6, 16, 40221b0b +40221b06: 043c movi.n a4, 48 +40221b08: 0b9647 bne a6, a4, 40221b17 +40221b0b: fe4185 call0 4021ff24 +40221b0e: 528c beqz.n a2, 40221b17 +40221b10: 0f3d mov.n a3, a15 +40221b12: 0e2d mov.n a2, a14 +40221b14: fe4245 call0 4021ff3c +40221b17: 0d0c22 l8ui a2, a12, 13 +40221b1a: 146267 bbci a2, 6, 40221b32 +40221b1d: 100c22 l8ui a2, a12, 16 +40221b20: 086207 bbci a2, 0, 40221b2c +40221b23: 0e2d mov.n a2, a14 +40221b25: fe98c5 call0 402204b4 +40221b28: 000186 j 40221b32 +40221b2b: 2ee000 excw +40221b2e: 974520 excw +40221b31: fe .byte 0xfe +40221b32: 002c22 l32i a2, a12, 0 +40221b35: ed8431 l32r a3, 4021d148 +40221b38: 028237 bany a2, a3, 40221b3e +40221b3b: 003046 j 40221c00 +40221b3e: 0be296 bltz a2, 40221c00 +40221b41: 080c32 l8ui a3, a12, 8 +40221b44: 0c6316 beqz a3, 40221c0e +40221b47: 0baf22 movi a2, -245 +40221b4a: 802320 add a2, a3, a2 +40221b4d: 0bd216 beqz a2, 40221c0e +40221b50: 0d2d mov.n a2, a13 +40221b52: ff1f45 call0 40220d48 +40221b55: ff7606 j 40221931 +40221b58: 8dd201 l32r a0, 402052a0 +40221b5b: 0000c0 callx0 a0 +40221b5e: 0c28 l32i.n a2, a12, 0 +40221b60: febc31 l32r a3, 40221650 +40221b63: 232a add.n a2, a3, a2 +40221b65: 000232 l8ui a3, a2, 0 +40221b68: 330b addi.n a3, a3, -1 +40221b6a: 004232 s8i a3, a2, 0 +40221b6d: 8dcd01 l32r a0, 402052a4 +40221b70: 0000c0 callx0 a0 +40221b73: fd9ac5 call0 4021f520 +40221b76: 003986 j 40221c60 +40221b79: 1c28 l32i.n a2, a12, 4 +40221b7b: ff1005 call0 40220c7c +40221b7e: 003786 j 40221c60 +40221b81: 8dc701 l32r a0, 402052a0 +40221b84: 0000c0 callx0 a0 +40221b87: feb231 l32r a3, 40221650 +40221b8a: 0c28 l32i.n a2, a12, 0 +40221b8c: 232a add.n a2, a3, a2 +40221b8e: 000232 l8ui a3, a2, 0 +40221b91: 330b addi.n a3, a3, -1 +40221b93: 004232 s8i a3, a2, 0 +40221b96: 000d22 l8ui a2, a13, 0 +40221b99: 281266 bnei a2, 1, 40221bc5 +40221b9c: feab21 l32r a2, 40221648 +40221b9f: 000222 l8ui a2, a2, 0 +40221ba2: 72cc bnez.n a2, 40221bad +40221ba4: fb6a21 l32r a2, 4022094c +40221ba7: 00a032 movi a3, 0 +40221baa: 004232 s8i a3, a2, 0 +40221bad: fea721 l32r a2, 4022164c +40221bb0: 000222 l8ui a2, a2, 0 +40221bb3: 92cc bnez.n a2, 40221bc0 +40221bb5: fb6421 l32r a2, 40220948 +40221bb8: 73a032 movi a3, 115 +40221bbb: 0020c0 memw +40221bbe: 0239 s32i.n a3, a2, 0 +40221bc0: 020c movi.n a2, 0 +40221bc2: 004d22 s8i a2, a13, 0 +40221bc5: 8db701 l32r a0, 402052a4 +40221bc8: 0000c0 callx0 a0 +40221bcb: 002446 j 40221c60 +40221bce: 000000 ill +40221bd1: 8db301 l32r a0, 402052a0 +40221bd4: 0000c0 callx0 a0 +40221bd7: fe9e31 l32r a3, 40221650 +40221bda: 0c28 l32i.n a2, a12, 0 +40221bdc: 232a add.n a2, a3, a2 +40221bde: 000232 l8ui a3, a2, 0 +40221be1: 330b addi.n a3, a3, -1 +40221be3: 004232 s8i a3, a2, 0 +40221be6: 8daf01 l32r a0, 402052a4 +40221be9: 0000c0 callx0 a0 +40221bec: 7fde21 l32r a2, 40201b64 +40221bef: 7a2222 l32i a2, a2, 0x1e8 +40221bf2: 06a216 beqz a2, 40221c60 +40221bf5: 1228 l32i.n a2, a2, 4 +40221bf7: 065216 beqz a2, 40221c60 +40221bfa: 0002c0 callx0 a2 +40221bfd: 0017c6 j 40221c60 +40221c00: 8fe941 l32r a4, 40205ba4 +40221c03: de0432 l8ui a3, a4, 222 +40221c06: 231366 bnei a3, 1, 40221c2d +40221c09: ffcd06 j 40221b41 +40221c0c: 220000 excw +40221c0f: 042d mov.n a2, a4 +40221c11: 7fd461 l32r a6, 40201b64 +40221c14: 000242 l8ui a4, a2, 0 +40221c17: 042622 l32i a2, a6, 16 +40221c1a: 014480 slli a4, a4, 24 +40221c1d: 00a052 movi a5, 0 +40221c20: 314840 srai a4, a4, 24 +40221c23: 0d3d mov.n a3, a13 +40221c25: e8ed45 call0 4020aafc +40221c28: ff4146 j 40221931 +40221c2b: 310000 srai a0, a0, 16 +40221c2e: fe8a add.n a15, a14, a8 +40221c30: 028237 bany a2, a3, 40221c36 +40221c33: ffc646 j 40221b50 +40221c36: 8d9721 l32r a2, 40205294 +40221c39: 000222 l8ui a2, a2, 0 +40221c3c: 021266 bnei a2, 1, 40221c42 +40221c3f: ffc346 j 40221b50 +40221c42: 042d22 l32i a2, a13, 16 +40221c45: 7fc761 l32r a6, 40201b64 +40221c48: 000242 l8ui a4, a2, 0 +40221c4b: 052622 l32i a2, a6, 20 +40221c4e: 014480 slli a4, a4, 24 +40221c51: 00a052 movi a5, 0 +40221c54: 314840 srai a4, a4, 24 +40221c57: 0d3d mov.n a3, a13 +40221c59: e29d05 call0 4020462c +40221c5c: ff3446 j 40221931 +40221c5f: f10800 excw +40221c62: e1c8 l32i.n a12, a1, 56 +40221c64: d1d8 l32i.n a13, a1, 52 +40221c66: c1e8 l32i.n a14, a1, 48 +40221c68: b1f8 l32i.n a15, a1, 44 +40221c6a: 40c112 addi a1, a1, 64 +40221c6d: f00d ret.n +40221c6f: 87a400 excw +40221c72: fe .byte 0xfe +40221c73: 3f .byte 0x3f +40221c74: fe8630 excw +40221c77: 3f .byte 0x3f +40221c78: fe87a7 bany a7, a10, 40221c7a +40221c7b: 3f .byte 0x3f +40221c7c: 0b49 s32i.n a4, a11, 0 +40221c7e: ff0000 excw +40221c81: 0f .byte 0xf +40221c82: fff8 l32i.n a15, a15, 60 +40221c84: fe8ea4 excw +40221c87: 3f .byte 0x3f +40221c88: 8e7c movi.n a14, -8 +40221c8a: fe .byte 0xfe +40221c8b: 3f .byte 0x3f +40221c8c: 3f28 l32i.n a2, a15, 12 +40221c8e: 7c4010 excw +40221c91: 104c movi.n a0, 65 +40221c93: 3ff440 excw +40221c96: 10 .byte 0x10 +40221c97: 40 .byte 0x40 + +40221c98 : +40221c98: e0c112 addi a1, a1, -32 +40221c9b: 61c9 s32i.n a12, a1, 24 +40221c9d: 7109 s32i.n a0, a1, 28 +40221c9f: 51d9 s32i.n a13, a1, 20 +40221ca1: 41e9 s32i.n a14, a1, 16 +40221ca3: 31f9 s32i.n a15, a1, 12 +40221ca5: 9248 l32i.n a4, a2, 36 +40221ca7: 02cd mov.n a12, a2 +40221ca9: 1438 l32i.n a3, a4, 4 +40221cab: 342030 extui a2, a3, 0, 4 +40221cae: 429c beqz.n a2, 40221cc6 +40221cb0: 123226 beqi a2, 3, 40221cc6 +40221cb3: 025d mov.n a5, a2 +40221cb5: 320c movi.n a2, 3 +40221cb7: 0d2527 blt a5, a2, 40221cc8 +40221cba: 120c movi.n a2, 1 +40221cbc: 0865a6 blti a5, 6, 40221cc8 +40221cbf: 020c movi.n a2, 0 +40221cc1: 0000c6 j 40221cc8 +40221cc4: 0c0000 excw +40221cc7: 343022 excw +40221cca: 123725 excw +40221ccd: e83113 excw +40221cd0: ff .byte 0xff +40221cd1: ffe821 l32r a2, 40221c74 +40221cd4: 61a242 movi a4, 0x261 +40221cd7: ca6301 l32r a0, 40214664 +40221cda: 0000c0 callx0 a0 +40221cdd: ffff06 j 40221cdd +40221ce0: 680000 excw +40221ce3: 224c movi.n a2, 66 +40221ce5: 070406 j 402238f9 +40221ce8: 380962 l8ui a6, a9, 56 +40221ceb: a02204 excw +40221cee: 232080 excw +40221cf1: 042920 extui a2, a2, 9, 1 +40221cf4: 000672 l8ui a7, a6, 0 +40221cf7: c50c movi.n a5, 12 +40221cf9: 037c movi.n a3, -16 +40221cfb: 105750 and a5, a7, a5 +40221cfe: 103730 and a3, a7, a3 +40221d01: 0428 l32i.n a2, a4, 0 +40221d03: 2a8566 bnei a5, 8, 40221d31 +40221d06: 413620 srli a3, a2, 6 +40221d09: 205350 or a5, a3, a5 +40221d0c: 1155a0 slli a5, a5, 6 +40221d0f: 542020 extui a2, a2, 0, 6 +40221d12: 202250 or a2, a2, a5 +40221d15: 70a052 movi a5, 112 +40221d18: 0429 s32i.n a2, a4, 0 +40221d1a: 105750 and a5, a7, a5 +40221d1d: 43d566 bnei a5, 64, 40221d64 +40221d20: f65221 l32r a2, 4021f668 +40221d23: 102320 and a2, a3, a2 +40221d26: 1132a0 slli a3, a2, 6 +40221d29: 0428 l32i.n a2, a4, 0 +40221d2b: 542020 extui a2, a2, 0, 6 +40221d2e: 000b46 j 40221d5f +40221d31: f5ec bnez.n a5, 40221d64 +40221d33: 11e366 bnei a3, 128, 40221d48 +40221d36: 2a72d7 bbci a2, 29, 40221d64 +40221d39: fbeb31 l32r a3, 40220ce8 +40221d3c: 5a2322 l32i a2, a3, 0x168 +40221d3f: 221b addi.n a2, a2, 1 +40221d41: 5a6322 s32i a2, a3, 0x168 +40221d44: 000706 j 40221d64 +40221d47: d36600 excw +40221d4a: 2018 l32i.n a1, a0, 8 +40221d4c: 174126 beqi a1, 4, 40221d67 +40221d4f: 3112e2 l16ui a14, a2, 98 +40221d52: 30ae74 excw +40221d55: 382022 l32i a2, a0, 224 +40221d58: 22a004 excw +40221d5b: 303011 l32r a1, 401ede1c <_lit4_end+0xe7af0> +40221d5e: 232054 excw +40221d61: 042920 extui a2, a2, 9, 1 +40221d64: 0458 l32i.n a5, a4, 0 +40221d66: 412650 srli a2, a5, 6 +40221d69: 99ea51 l32r a5, 40208514 +40221d6c: 105250 and a5, a2, a5 +40221d6f: b58c beqz.n a5, 40221d7e +40221d71: 1c28 l32i.n a2, a12, 4 +40221d73: 1238 l32i.n a3, a2, 4 +40221d75: 0b1622 l16ui a2, a6, 22 +40221d78: 412420 srli a2, a2, 4 +40221d7b: 034322 s8i a2, a3, 3 +40221d7e: 3438 l32i.n a3, a4, 12 +40221d80: 7c68 l32i.n a6, a12, 28 +40221d82: 343830 extui a3, a3, 8, 4 +40221d85: ffc332 addi a3, a3, -1 +40221d88: 743030 extui a3, a3, 0, 8 +40221d8b: 04a022 movi a2, 4 +40221d8e: 0733f6 bgeui a3, 3, 40221d99 +40221d91: ffb921 l32r a2, 40221c78 +40221d94: 323a add.n a3, a2, a3 +40221d96: 000322 l8ui a2, a3, 0 +40221d99: 2c88 l32i.n a8, a12, 8 +40221d9b: 0b1c72 l16ui a7, a12, 22 +40221d9e: 0020c0 memw +40221da1: 0838 l32i.n a3, a8, 0 +40221da3: f42020 extui a2, a2, 0, 16 +40221da6: 727a add.n a7, a2, a7 +40221da8: b43c30 extui a3, a3, 12, 12 +40221dab: 232a add.n a2, a3, a2 +40221dad: f47070 extui a7, a7, 0, 16 +40221db0: 0b5c72 s16i a7, a12, 22 +40221db3: b42020 extui a2, a2, 0, 12 +40221db6: 113240 slli a3, a2, 12 +40221db9: 0020c0 memw +40221dbc: 0898 l32i.n a9, a8, 0 +40221dbe: 817021 l32r a2, 40202380 +40221dc1: 102920 and a2, a9, a2 +40221dc4: 202230 or a2, a2, a3 +40221dc7: 0020c0 memw +40221dca: 0829 s32i.n a2, a8, 0 +40221dcc: 078516 beqz a5, 40221e48 +40221dcf: 089616 beqz a6, 40221e5c +40221dd2: 1c38 l32i.n a3, a12, 4 +40221dd4: d78621 l32r a2, 40217bec +40221dd7: 0020c0 memw +40221dda: 0358 l32i.n a5, a3, 0 +40221ddc: 202520 or a2, a5, a2 +40221ddf: 0020c0 memw +40221de2: 0329 s32i.n a2, a3, 0 +40221de4: 3448 l32i.n a4, a4, 12 +40221de6: d31c21 l32r a2, 40216a58 +40221de9: 102420 and a2, a4, a2 +40221dec: fdd242 addmi a4, a2, 0xfffffd00 +40221def: 015416 beqz a4, 40221e08 +40221df2: 012216 beqz a2, 40221e08 +40221df5: ffa141 l32r a4, 40221c7c +40221df8: ff9e31 l32r a3, 40221c70 +40221dfb: ff9e21 l32r a2, 40221c74 +40221dfe: ca1901 l32r a0, 40214664 +40221e01: 0000c0 callx0 a0 +40221e04: ffff06 j 40221e04 +40221e07: 134800 excw +40221e0a: d93c31 l32r a3, 402182fc +40221e0d: 0458 l32i.n a5, a4, 0 +40221e0f: fcc722 addi a2, a7, -4 +40221e12: b42020 extui a2, a2, 0, 12 +40221e15: 103530 and a3, a5, a3 +40221e18: 203320 or a3, a3, a2 +40221e1b: 0439 s32i.n a3, a4, 0 +40221e1d: 740652 l8ui a5, a6, 116 +40221e20: 623b addi.n a6, a2, 3 +40221e22: 030c movi.n a3, 0 +40221e24: 05a657 bge a6, a5, 40221e2d +40221e27: c02520 sub a2, a5, a2 +40221e2a: 643220 extui a3, a2, 2, 7 +40221e2d: 112340 slli a2, a3, 12 +40221e30: 0458 l32i.n a5, a4, 0 +40221e32: ff9331 l32r a3, 40221c80 +40221e35: 103530 and a3, a5, a3 +40221e38: 203320 or a3, a3, a2 +40221e3b: de5121 l32r a2, 40219780 +40221e3e: 103320 and a3, a3, a2 +40221e41: 0439 s32i.n a3, a4, 0 +40221e43: 000c46 j 40221e78 +40221e46: c00000 sub a0, a0, a0 +40221e49: 380020 excw +40221e4c: 2108 l32i.n a0, a1, 8 +40221e4e: 814a add.n a8, a1, a4 +40221e50: 202320 or a2, a3, a2 +40221e53: 0020c0 memw +40221e56: 0829 s32i.n a2, a8, 0 +40221e58: 000706 j 40221e78 +40221e5b: 110100 slli a0, a1, 16 +40221e5e: c08d excw +40221e60: 2d0000 excw +40221e63: 010c movi.n a1, 0 +40221e65: ff8a add.n a15, a15, a8 +40221e67: 0000c0 callx0 a0 +40221e6a: 8d0e01 l32r a0, 402052a4 +40221e6d: 0000c0 callx0 a0 +40221e70: 120c movi.n a2, 1 +40221e72: 0084c6 j 40222089 +40221e75: 000000 ill +40221e78: 8d0a01 l32r a0, 402052a0 +40221e7b: 0000c0 callx0 a0 +40221e7e: 092c32 l32i a3, a12, 36 +40221e81: 072c22 l32i a2, a12, 28 +40221e84: ff8301 l32r a0, 40221c90 +40221e87: 0000c0 callx0 a0 +40221e8a: 8d0601 l32r a0, 402052a4 +40221e8d: 0000c0 callx0 a0 +40221e90: 0c2d mov.n a2, a12 +40221e92: ff8001 l32r a0, 40221c94 +40221e95: 0000c0 callx0 a0 +40221e98: 813621 l32r a2, 40202370 +40221e9b: 4cd8 l32i.n a13, a12, 16 +40221e9d: 0020c0 memw +40221ea0: 0238 l32i.n a3, a2, 0 +40221ea2: 092c22 l32i a2, a12, 36 +40221ea5: 6239 s32i.n a3, a2, 24 +40221ea7: ff5805 call0 40221428 +40221eaa: 000df2 l8ui a15, a13, 0 +40221ead: c20c movi.n a2, 12 +40221eaf: 10ff20 and a15, a15, a2 +40221eb2: fc9105 call0 4021e7c4 +40221eb5: 12cc bnez.n a2, 40221eba +40221eb7: fc6245 call0 4021e4dc +40221eba: 9c28 l32i.n a2, a12, 36 +40221ebc: 5238 l32i.n a3, a2, 20 +40221ebe: 0228 l32i.n a2, a2, 0 +40221ec0: 0e6307 bbci a3, 0, 40221ed2 +40221ec3: 8d5031 l32r a3, 40205404 +40221ec6: 000332 l8ui a3, a3, 0 +40221ec9: 0523f6 bgeui a3, 2, 40221ed2 +40221ecc: 026217 bbci a2, 1, 40221ed2 +40221ecf: 005786 j 40222031 +40221ed2: 072c32 l32i a3, a12, 28 +40221ed5: fb84d1 l32r a13, 40220ce8 +40221ed8: 20cce2 addi a14, a12, 32 +40221edb: 046356 bnez a3, 40221f25 +40221ede: 63e297 bbsi a2, 9, 40221f45 +40221ee1: 042120 extui a2, a2, 1, 1 +40221ee4: fe0145 call0 4021fefc +40221ee7: 092c32 l32i a3, a12, 36 +40221eea: 00a256 bnez a2, 40221ef8 +40221eed: 4328 l32i.n a2, a3, 16 +40221eef: dfaf42 movi a4, -33 +40221ef2: e0c222 addi a2, a2, -32 +40221ef5: 418247 bany a2, a4, 40221f3a +40221ef8: 0358 l32i.n a5, a3, 0 +40221efa: c3af22 movi a2, -61 +40221efd: 044150 extui a4, a5, 1, 1 +40221f00: 1144e0 slli a4, a4, 2 +40221f03: 102520 and a2, a5, a2 +40221f06: 202240 or a2, a2, a4 +40221f09: 0329 s32i.n a2, a3, 0 +40221f0b: 1348 l32i.n a4, a3, 4 +40221f0d: 811721 l32r a2, 4020236c +40221f10: 102420 and a2, a4, a2 +40221f13: 047c movi.n a4, -16 +40221f15: 104240 and a4, a2, a4 +40221f18: 720c movi.n a2, 7 +40221f1a: 202420 or a2, a4, a2 +40221f1d: 1329 s32i.n a2, a3, 4 +40221f1f: 0029c6 j 40221fca +40221f22: 000000 ill +40221f25: 042120 extui a2, a2, 1, 1 +40221f28: 01cf16 beqz a15, 40221f48 +40221f2b: fdfd05 call0 4021fefc +40221f2e: 04b256 bnez a2, 40221f7d +40221f31: 092c22 l32i a2, a12, 36 +40221f34: 002222 l32i a2, a2, 0 +40221f37: 427237 bbci a2, 19, 40221f7d +40221f3a: 120c movi.n a2, 1 +40221f3c: fe0485 call0 4021ff88 +40221f3f: 003146 j 40222008 +40221f42: 000000 ill +40221f45: 042120 extui a2, a2, 1, 1 +40221f48: fdfb05 call0 4021fefc +40221f4b: feb216 beqz a2, 40221f3a +40221f4e: 092c42 l32i a4, a12, 36 +40221f51: c3af22 movi a2, -61 +40221f54: 002452 l32i a5, a4, 0 +40221f57: 043150 extui a3, a5, 1, 1 +40221f5a: 1133e0 slli a3, a3, 2 +40221f5d: 102520 and a2, a5, a2 +40221f60: 202230 or a2, a2, a3 +40221f63: 006422 s32i a2, a4, 0 +40221f66: 1438 l32i.n a3, a4, 4 +40221f68: 810121 l32r a2, 4020236c +40221f6b: 102320 and a2, a3, a2 +40221f6e: 037c movi.n a3, -16 +40221f70: 103230 and a3, a2, a3 +40221f73: 720c movi.n a2, 7 +40221f75: 202320 or a2, a3, a2 +40221f78: 1429 s32i.n a2, a4, 4 +40221f7a: 001306 j 40221fca +40221f7d: 8cc801 l32r a0, 402052a0 +40221f80: 0000c0 callx0 a0 +40221f83: 9c28 l32i.n a2, a12, 36 +40221f85: 7c38 l32i.n a3, a12, 28 +40221f87: 1248 l32i.n a4, a2, 4 +40221f89: 0228 l32i.n a2, a2, 0 +40221f8b: 760332 l8ui a3, a3, 118 +40221f8e: 255440 extui a5, a4, 20, 3 +40221f91: 042120 extui a2, a2, 1, 1 +40221f94: 344040 extui a4, a4, 0, 4 +40221f97: fd2201 l32r a0, 40221420 +40221f9a: 0000c0 callx0 a0 +40221f9d: 02fd mov.n a15, a2 +40221f9f: 8cc101 l32r a0, 402052a4 +40221fa2: 0000c0 callx0 a0 +40221fa5: 5f8f26 beqi a15, 8, 40222008 +40221fa8: 9c28 l32i.n a2, a12, 36 +40221faa: 0228 l32i.n a2, a2, 0 +40221fac: 042120 extui a2, a2, 1, 1 +40221faf: fdf4c5 call0 4021fefc +40221fb2: f84216 beqz a2, 40221f3a +40221fb5: 9c48 l32i.n a4, a12, 36 +40221fb7: 34f0f0 extui a15, a15, 0, 4 +40221fba: 112fe0 slli a2, a15, 2 +40221fbd: 04f8 l32i.n a15, a4, 0 +40221fbf: c3af32 movi a3, -61 +40221fc2: 10ff30 and a15, a15, a3 +40221fc5: 20ff20 or a15, a15, a2 +40221fc8: 04f9 s32i.n a15, a4, 0 +40221fca: 8cb501 l32r a0, 402052a0 +40221fcd: 0000c0 callx0 a0 +40221fd0: 020c movi.n a2, 0 +40221fd2: 8c29 s32i.n a2, a12, 32 +40221fd4: 9c28 l32i.n a2, a12, 36 +40221fd6: 0228 l32i.n a2, a2, 0 +40221fd8: 342220 extui a2, a2, 2, 4 +40221fdb: 1122b0 slli a2, a2, 5 +40221fde: 2d2a add.n a2, a13, a2 +40221fe0: 7228 l32i.n a2, a2, 28 +40221fe2: 02c9 s32i.n a12, a2, 0 +40221fe4: 9c28 l32i.n a2, a12, 36 +40221fe6: 0228 l32i.n a2, a2, 0 +40221fe8: 342220 extui a2, a2, 2, 4 +40221feb: 1122b0 slli a2, a2, 5 +40221fee: dd2a add.n a13, a13, a2 +40221ff0: 7de9 s32i.n a14, a13, 28 +40221ff2: 8cac01 l32r a0, 402052a4 +40221ff5: 0000c0 callx0 a0 +40221ff8: 9c28 l32i.n a2, a12, 36 +40221ffa: 1228 l32i.n a2, a2, 4 +40221ffc: 252420 extui a2, a2, 20, 3 +40221fff: fd0901 l32r a0, 40221424 +40222002: 0000c0 callx0 a0 +40222005: 002006 j 40222089 +40222008: 9c38 l32i.n a3, a12, 36 +4022200a: 020c movi.n a2, 0 +4022200c: 0338 l32i.n a3, a3, 0 +4022200e: 8c29 s32i.n a2, a12, 32 +40222010: 043130 extui a3, a3, 1, 1 +40222013: 22c332 addi a3, a3, 34 +40222016: b033d0 addx8 a3, a3, a13 +40222019: 3338 l32i.n a3, a3, 12 +4022201b: 03c9 s32i.n a12, a3, 0 +4022201d: 9c38 l32i.n a3, a12, 36 +4022201f: 0338 l32i.n a3, a3, 0 +40222021: 043130 extui a3, a3, 1, 1 +40222024: 22c332 addi a3, a3, 34 +40222027: b0d3d0 addx8 a13, a3, a13 +4022202a: 3de9 s32i.n a14, a13, 12 +4022202c: 001646 j 40222089 +4022202f: 310000 srai a0, a0, 16 +40222032: 8d3c movi.n a13, 56 +40222034: 000322 l8ui a2, a3, 0 +40222037: 03dd mov.n a13, a3 +40222039: 221b addi.n a2, a2, 1 +4022203b: 742020 extui a2, a2, 0, 8 +4022203e: 004322 s8i a2, a3, 0 +40222041: a30c movi.n a3, 10 +40222043: 1eb327 bgeu a3, a2, 40222065 +40222046: 8c9601 l32r a0, 402052a0 +40222049: 0000c0 callx0 a0 +4022204c: 0c2d mov.n a2, a12 +4022204e: ff0f01 l32r a0, 40221c8c +40222051: 0000c0 callx0 a0 +40222054: 8c9401 l32r a0, 402052a4 +40222057: 0000c0 callx0 a0 +4022205a: 000d22 l8ui a2, a13, 0 +4022205d: 220b addi.n a2, a2, -1 +4022205f: 004d22 s8i a2, a13, 0 +40222062: ff8286 j 40221e70 +40222065: ff0721 l32r a2, 40221c84 +40222068: ff0841 l32r a4, 40221c88 +4022206b: 000232 l8ui a3, a2, 0 +4022206e: 950c movi.n a5, 9 +40222070: a04340 addx4 a4, a3, a4 +40222073: 331b addi.n a3, a3, 1 +40222075: 743030 extui a3, a3, 0, 8 +40222078: 04c9 s32i.n a12, a4, 0 +4022207a: 004232 s8i a3, a2, 0 +4022207d: 024d mov.n a4, a2 +4022207f: 020c movi.n a2, 0 +40222081: 04b537 bgeu a5, a3, 40222089 +40222084: 004422 s8i a2, a4, 0 +40222087: 020c movi.n a2, 0 +40222089: 7108 l32i.n a0, a1, 28 +4022208b: 61c8 l32i.n a12, a1, 24 +4022208d: 51d8 l32i.n a13, a1, 20 +4022208f: 41e8 l32i.n a14, a1, 16 +40222091: 31f8 l32i.n a15, a1, 12 +40222093: 20c112 addi a1, a1, 32 +40222096: f00d ret.n +40222098: 8e7a add.n a8, a14, a7 +4022209a: fe .byte 0xfe +4022209b: 3f .byte 0x3f + +4022209c : +4022209c: f0c112 addi a1, a1, -16 +4022209f: 21c9 s32i.n a12, a1, 8 +402220a1: 11d9 s32i.n a13, a1, 4 +402220a3: fffdc1 l32r a12, 40222098 +402220a6: 8d1fd1 l32r a13, 40205524 +402220a9: 01e9 s32i.n a14, a1, 0 +402220ab: 3109 s32i.n a0, a1, 12 +402220ad: 74e020 extui a14, a2, 0, 8 +402220b0: 000d22 l8ui a2, a13, 0 +402220b3: 0a1216 beqz a2, 40222158 +402220b6: 05ee56 bnez a14, 40222118 +402220b9: fef331 l32r a3, 40221c88 +402220bc: 000c22 l8ui a2, a12, 0 +402220bf: a02230 addx4 a2, a2, a3 +402220c2: 0228 l32i.n a2, a2, 0 +402220c4: 9238 l32i.n a3, a2, 36 +402220c6: 3358 l32i.n a5, a3, 12 +402220c8: 430c movi.n a3, 4 +402220ca: 345850 extui a5, a5, 8, 4 +402220cd: 550b addi.n a5, a5, -1 +402220cf: 745050 extui a5, a5, 0, 8 +402220d2: 0735f6 bgeui a5, 3, 402220dd +402220d5: fee831 l32r a3, 40221c78 +402220d8: 535a add.n a5, a3, a5 +402220da: 000532 l8ui a3, a5, 0 +402220dd: f44030 extui a4, a3, 0, 16 +402220e0: 0b1232 l16ui a3, a2, 22 +402220e3: 2258 l32i.n a5, a2, 8 +402220e5: c03340 sub a3, a3, a4 +402220e8: 0b5232 s16i a3, a2, 22 +402220eb: 0020c0 memw +402220ee: 0538 l32i.n a3, a5, 0 +402220f0: 0020c0 memw +402220f3: 002562 l32i a6, a5, 0 +402220f6: b43c30 extui a3, a3, 12, 12 +402220f9: c03340 sub a3, a3, a4 +402220fc: b43030 extui a3, a3, 0, 12 +402220ff: 114340 slli a4, a3, 12 +40222102: 809f31 l32r a3, 40202380 +40222105: 103630 and a3, a6, a3 +40222108: 203340 or a3, a3, a4 +4022210b: 0020c0 memw +4022210e: 006532 s32i a3, a5, 0 +40222111: ffb845 call0 40221c98 +40222114: 000806 j 40222138 +40222117: 1e6600 excw +4022211a: 011c movi.n a1, 16 +4022211c: c08c61 l32r a6, 4021234c +4022211f: 310000 srai a0, a0, 16 +40222122: fed9 s32i.n a13, a14, 60 +40222124: 000c22 l8ui a2, a12, 0 +40222127: a02230 addx4 a2, a2, a3 +4022212a: 0228 l32i.n a2, a2, 0 +4022212c: fed801 l32r a0, 40221c8c +4022212f: 0000c0 callx0 a0 +40222132: 8c5c01 l32r a0, 402052a4 +40222135: 0000c0 callx0 a0 +40222138: 000c22 l8ui a2, a12, 0 +4022213b: 930c movi.n a3, 9 +4022213d: 221b addi.n a2, a2, 1 +4022213f: 742020 extui a2, a2, 0, 8 +40222142: 004c22 s8i a2, a12, 0 +40222145: 04b327 bgeu a3, a2, 4022214d +40222148: 020c movi.n a2, 0 +4022214a: 004c22 s8i a2, a12, 0 +4022214d: 000d22 l8ui a2, a13, 0 +40222150: 220b addi.n a2, a2, -1 +40222152: 004d22 s8i a2, a13, 0 +40222155: ffd5c6 j 402220b0 +40222158: 3108 l32i.n a0, a1, 12 +4022215a: 21c8 l32i.n a12, a1, 8 +4022215c: 11d8 l32i.n a13, a1, 4 +4022215e: 01e8 l32i.n a14, a1, 0 +40222160: 10c112 addi a1, a1, 16 +40222163: f00d ret.n +40222165: 000000 ill +40222168: fe9170 excw +4022216b: 3f .byte 0x3f +4022216c: 87aa add.n a8, a7, a10 +4022216e: fe .byte 0xfe +4022216f: 3f .byte 0x3f +40222170: fecc bnez.n a14, 40222183 +40222172: 22 .byte 0x22 +40222173: 40 .byte 0x40 + +40222174 : +40222174: e0c112 addi a1, a1, -32 +40222177: 61c9 s32i.n a12, a1, 24 +40222179: 51d9 s32i.n a13, a1, 20 +4022217b: 7109 s32i.n a0, a1, 28 +4022217d: 41e9 s32i.n a14, a1, 16 +4022217f: 31f9 s32i.n a15, a1, 12 +40222181: 02dd mov.n a13, a2 +40222183: 04cd mov.n a12, a4 +40222185: 6b1366 bnei a3, 1, 402221f4 +40222188: 068216 beqz a2, 402221f4 +4022218b: 8c4501 l32r a0, 402052a0 +4022218e: 0000c0 callx0 a0 +40222191: fff521 l32r a2, 40222168 +40222194: 02c8 l32i.n a12, a2, 0 +40222196: 8ccc bnez.n a12, 402221a2 +40222198: 8c4301 l32r a0, 402052a4 +4022219b: 0000c0 callx0 a0 +4022219e: 007f06 j 4022239e +402221a1: 8c3800 excw +402221a4: 0239 s32i.n a3, a2, 0 +402221a6: 020c movi.n a2, 0 +402221a8: 8c29 s32i.n a2, a12, 32 +402221aa: 8c3e01 l32r a0, 402052a4 +402221ad: 0000c0 callx0 a0 +402221b0: 807221 l32r a2, 40202378 +402221b3: 0db2d7 bgeu a2, a13, 402221c4 +402221b6: ffed21 l32r a2, 4022216c +402221b9: 0d3d mov.n a3, a13 +402221bb: c92a01 l32r a0, 40214664 +402221be: 0000c0 callx0 a0 +402221c1: 007646 j 4022239e +402221c4: 9c28 l32i.n a2, a12, 36 +402221c6: 042c movi.n a4, 32 +402221c8: 030c movi.n a3, 0 +402221ca: 7b9101 l32r a0, 40201010 <_irom0_text_start> +402221cd: 0000c0 callx0 a0 +402221d0: 0cd9 s32i.n a13, a12, 0 +402221d2: 0c0d22 l8ui a2, a13, 12 +402221d5: 02cc bnez.n a2, 402221d9 +402221d7: 4dc9 s32i.n a12, a13, 16 +402221d9: 1d28 l32i.n a2, a13, 4 +402221db: 1c38 l32i.n a3, a12, 4 +402221dd: 1329 s32i.n a2, a3, 4 +402221df: dcc222 addi a2, a2, -36 +402221e2: 4c29 s32i.n a2, a12, 16 +402221e4: 051d22 l16ui a2, a13, 10 +402221e7: 9c38 l32i.n a3, a12, 36 +402221e9: 0b5c22 s16i a2, a12, 22 +402221ec: 0348 l32i.n a4, a3, 0 +402221ee: db6a21 l32r a2, 40218f98 +402221f1: 00a886 j 40222497 +402221f4: 024326 beqi a3, 4, 402221fa +402221f7: 004286 j 40222305 +402221fa: ffdde1 l32r a14, 40222170 +402221fd: 70a142 movi a4, 0x170 +40222200: 050c movi.n a5, 0 +40222202: 0e3d mov.n a3, a14 +40222204: 822c movi.n a2, 40 +40222206: 7cbf01 l32r a0, 40201504 +40222209: 0000c0 callx0 a0 +4022220c: 02dd mov.n a13, a2 +4022220e: 805a21 l32r a2, 40202378 +40222211: 73a142 movi a4, 0x173 +40222214: 02b2d7 bgeu a2, a13, 4022221a +40222217: 005e46 j 40222394 +4022221a: 180d16 beqz a13, 4022239e +4022221d: 79a142 movi a4, 0x179 +40222220: 0e3d mov.n a3, a14 +40222222: 050c movi.n a5, 0 +40222224: 0ca022 movi a2, 12 +40222227: 7cb701 l32r a0, 40201504 +4022222a: 0000c0 callx0 a0 +4022222d: eca441 l32r a4, 4021d4c0 +40222230: 1d29 s32i.n a2, a13, 4 +40222232: 320b addi.n a3, a2, -1 +40222234: 16b437 bgeu a4, a3, 4022224e +40222237: 805031 l32r a3, 40202378 +4022223a: 0ab327 bgeu a3, a2, 40222248 +4022223d: 7ca142 movi a4, 0x17c +40222240: 0e3d mov.n a3, a14 +40222242: 7cb101 l32r a0, 40201508 +40222245: 0000c0 callx0 a0 +40222248: 7ea142 movi a4, 0x17e +4022224b: 005146 j 40222394 +4022224e: 2d29 s32i.n a2, a13, 8 +40222250: 01a022 movi a2, 1 +40222253: 065d22 s16i a2, a13, 12 +40222256: 84a142 movi a4, 0x184 +40222259: 203ee0 or a3, a14, a14 +4022225c: 20a022 movi a2, 32 +4022225f: 7f7c01 l32r a0, 40202050 +40222262: 0000c0 callx0 a0 +40222265: ec9641 l32r a4, 4021d4c0 +40222268: 9d29 s32i.n a2, a13, 36 +4022226a: 320b addi.n a3, a2, -1 +4022226c: 28b437 bgeu a4, a3, 40222298 +4022226f: 804231 l32r a3, 40202378 +40222272: 0ab327 bgeu a3, a2, 40222280 +40222275: 87a142 movi a4, 0x187 +40222278: 0e3d mov.n a3, a14 +4022227a: 7ca301 l32r a0, 40201508 +4022227d: 0000c0 callx0 a0 +40222280: 1d28 l32i.n a2, a13, 4 +40222282: 89a142 movi a4, 0x189 +40222285: 0e3d mov.n a3, a14 +40222287: 7ca001 l32r a0, 40201508 +4022228a: 0000c0 callx0 a0 +4022228d: 0c0c movi.n a12, 0 +4022228f: 1dc9 s32i.n a12, a13, 4 +40222291: 8ba142 movi a4, 0x18b +40222294: 006f86 j 40222456 +40222297: 042c00 extui a2, a0, 12, 1 +4022229a: 030c movi.n a3, 0 +4022229c: 7b5d01 l32r a0, 40201010 <_irom0_text_start> +4022229f: 0000c0 callx0 a0 +402222a2: 9d38 l32i.n a3, a13, 36 +402222a4: 922f21 l32r a2, 40206b60 +402222a7: 0348 l32i.n a4, a3, 0 +402222a9: 1122a0 slli a2, a2, 6 +402222ac: 202420 or a2, a4, a2 +402222af: 0329 s32i.n a2, a3, 0 +402222b1: 91a142 movi a4, 0x191 +402222b4: 0e3d mov.n a3, a14 +402222b6: 050c movi.n a5, 0 +402222b8: 0c2d mov.n a2, a12 +402222ba: 7c9201 l32r a0, 40201504 +402222bd: 0000c0 callx0 a0 +402222c0: ec8041 l32r a4, 4021d4c0 +402222c3: 4d29 s32i.n a2, a13, 16 +402222c5: 320b addi.n a3, a2, -1 +402222c7: 023437 bltu a4, a3, 402222cd +402222ca: 006586 j 40222464 +402222cd: 802a31 l32r a3, 40202378 +402222d0: 0ab327 bgeu a3, a2, 402222de +402222d3: 94a142 movi a4, 0x194 +402222d6: 0e3d mov.n a3, a14 +402222d8: 7c8c01 l32r a0, 40201508 +402222db: 0000c0 callx0 a0 +402222de: 9d28 l32i.n a2, a13, 36 +402222e0: 96a142 movi a4, 0x196 +402222e3: 203ee0 or a3, a14, a14 +402222e6: 7c8801 l32r a0, 40201508 +402222e9: 0000c0 callx0 a0 +402222ec: 0c0c movi.n a12, 0 +402222ee: 1d28 l32i.n a2, a13, 4 +402222f0: 98a142 movi a4, 0x198 +402222f3: 9dc9 s32i.n a12, a13, 36 +402222f5: 0e3d mov.n a3, a14 +402222f7: 7c8401 l32r a0, 40201508 +402222fa: 0000c0 callx0 a0 +402222fd: 9aa142 movi a4, 0x19a +40222300: 1dc9 s32i.n a12, a13, 4 +40222302: 005406 j 40222456 +40222305: 375366 bnei a3, 5, 40222340 +40222308: 8be601 l32r a0, 402052a0 +4022230b: 0000c0 callx0 a0 +4022230e: ff9621 l32r a2, 40222168 +40222311: 22c8 l32i.n a12, a2, 8 +40222313: e81c16 beqz a12, 40222198 +40222316: 8c38 l32i.n a3, a12, 32 +40222318: 0d0c movi.n a13, 0 +4022231a: 8cd9 s32i.n a13, a12, 32 +4022231c: 2239 s32i.n a3, a2, 8 +4022231e: 8be101 l32r a0, 402052a4 +40222321: 0000c0 callx0 a0 +40222324: 9c28 l32i.n a2, a12, 36 +40222326: 042c movi.n a4, 32 +40222328: 0d3d mov.n a3, a13 +4022232a: 7b3901 l32r a0, 40201010 <_irom0_text_start> +4022232d: 0000c0 callx0 a0 +40222330: 1c28 l32i.n a2, a12, 4 +40222332: 4c38 l32i.n a3, a12, 16 +40222334: 1239 s32i.n a3, a2, 4 +40222336: 9c38 l32i.n a3, a12, 36 +40222338: 997921 l32r a2, 4020891c +4022233b: 0348 l32i.n a4, a3, 0 +4022233d: 005586 j 40222497 +40222340: 026326 beqi a3, 6, 40222346 +40222343: 004986 j 4022246d +40222346: ff8ae1 l32r a14, 40222170 +40222349: bda142 movi a4, 0x1bd +4022234c: 050c movi.n a5, 0 +4022234e: 0e3d mov.n a3, a14 +40222350: 822c movi.n a2, 40 +40222352: 7c6c01 l32r a0, 40201504 +40222355: 0000c0 callx0 a0 +40222358: 02dd mov.n a13, a2 +4022235a: 800721 l32r a2, 40202378 +4022235d: c0a142 movi a4, 0x1c0 +40222360: 3032d7 bltu a2, a13, 40222394 +40222363: 7dbc beqz.n a13, 4022239e +40222365: c5a142 movi a4, 0x1c5 +40222368: 0e3d mov.n a3, a14 +4022236a: 050c movi.n a5, 0 +4022236c: 0ca022 movi a2, 12 +4022236f: 7c6501 l32r a0, 40201504 +40222372: 0000c0 callx0 a0 +40222375: ec5241 l32r a4, 4021d4c0 +40222378: 1d29 s32i.n a2, a13, 4 +4022237a: 320b addi.n a3, a2, -1 +4022237c: 26b437 bgeu a4, a3, 402223a6 +4022237f: 7ffe31 l32r a3, 40202378 +40222382: 0bb327 bgeu a3, a2, 40222391 +40222385: c8a142 movi a4, 0x1c8 +40222388: 203ee0 or a3, a14, a14 +4022238b: 7c5f01 l32r a0, 40201508 +4022238e: 0000c0 callx0 a0 +40222391: caa142 movi a4, 0x1ca +40222394: 0e3d mov.n a3, a14 +40222396: 0d2d mov.n a2, a13 +40222398: 7c5c01 l32r a0, 40201508 +4022239b: 0000c0 callx0 a0 +4022239e: 0c0c movi.n a12, 0 +402223a0: 003ec6 j 4022249f +402223a3: 000000 ill +402223a6: 2d29 s32i.n a2, a13, 8 +402223a8: 120c movi.n a2, 1 +402223aa: 065d22 s16i a2, a13, 12 +402223ad: d0a142 movi a4, 0x1d0 +402223b0: 0e3d mov.n a3, a14 +402223b2: 050c movi.n a5, 0 +402223b4: 20a022 movi a2, 32 +402223b7: 7c5301 l32r a0, 40201504 +402223ba: 0000c0 callx0 a0 +402223bd: ec4041 l32r a4, 4021d4c0 +402223c0: 9d29 s32i.n a2, a13, 36 +402223c2: 320b addi.n a3, a2, -1 +402223c4: 27b437 bgeu a4, a3, 402223ef +402223c7: 7fec31 l32r a3, 40202378 +402223ca: 0ab327 bgeu a3, a2, 402223d8 +402223cd: d3a142 movi a4, 0x1d3 +402223d0: 0e3d mov.n a3, a14 +402223d2: 7c4d01 l32r a0, 40201508 +402223d5: 0000c0 callx0 a0 +402223d8: 1d28 l32i.n a2, a13, 4 +402223da: d5a142 movi a4, 0x1d5 +402223dd: 0e3d mov.n a3, a14 +402223df: 7c4a01 l32r a0, 40201508 +402223e2: 0000c0 callx0 a0 +402223e5: 0c0c movi.n a12, 0 +402223e7: 1dc9 s32i.n a12, a13, 4 +402223e9: d7a142 movi a4, 0x1d7 +402223ec: 001986 j 40222456 +402223ef: 042c movi.n a4, 32 +402223f1: 00a032 movi a3, 0 +402223f4: 7b0701 l32r a0, 40201010 <_irom0_text_start> +402223f7: 0000c0 callx0 a0 +402223fa: 9d38 l32i.n a3, a13, 36 +402223fc: 8c48f1 l32r a15, 4020551c +402223ff: 0328 l32i.n a2, a3, 0 +40222401: 11ffa0 slli a15, a15, 6 +40222404: 2022f0 or a2, a2, a15 +40222407: 0329 s32i.n a2, a3, 0 +40222409: dda142 movi a4, 0x1dd +4022240c: 0e3d mov.n a3, a14 +4022240e: 050c movi.n a5, 0 +40222410: 0c2d mov.n a2, a12 +40222412: 7c3c01 l32r a0, 40201504 +40222415: 0000c0 callx0 a0 +40222418: ec2a41 l32r a4, 4021d4c0 +4022241b: 4d29 s32i.n a2, a13, 16 +4022241d: 320b addi.n a3, a2, -1 +4022241f: 41b437 bgeu a4, a3, 40222464 +40222422: 0abf27 bgeu a15, a2, 40222430 +40222425: e0a142 movi a4, 0x1e0 +40222428: 0e3d mov.n a3, a14 +4022242a: 7c3701 l32r a0, 40201508 +4022242d: 0000c0 callx0 a0 +40222430: 9d28 l32i.n a2, a13, 36 +40222432: e2a142 movi a4, 0x1e2 +40222435: 0e3d mov.n a3, a14 +40222437: 7c3401 l32r a0, 40201508 +4022243a: 0000c0 callx0 a0 +4022243d: 0c0c movi.n a12, 0 +4022243f: 012d22 l32i a2, a13, 4 +40222442: e4a142 movi a4, 0x1e4 +40222445: 096dc2 s32i a12, a13, 36 +40222448: 203ee0 or a3, a14, a14 +4022244b: 7c2f01 l32r a0, 40201508 +4022244e: 0000c0 callx0 a0 +40222451: e6a142 movi a4, 0x1e6 +40222454: 1dc9 s32i.n a12, a13, 4 +40222456: 0e3d mov.n a3, a14 +40222458: 0d2d mov.n a2, a13 +4022245a: 7c2b01 l32r a0, 40201508 +4022245d: 0000c0 callx0 a0 +40222460: 000ec6 j 4022249f +40222463: 1d3800 excw +40222466: 0dcd mov.n a12, a13 +40222468: 1329 s32i.n a2, a3, 4 +4022246a: 000c46 j 4022249f +4022246d: 027326 beqi a3, 7, 40222473 +40222470: ffca86 j 4022239e +40222473: 8b8b01 l32r a0, 402052a0 +40222476: 0000c0 callx0 a0 +40222479: ff3b21 l32r a2, 40222168 +4022247c: 32c8 l32i.n a12, a2, 12 +4022247e: d16c16 beqz a12, 40222198 +40222481: 8c38 l32i.n a3, a12, 32 +40222483: 3239 s32i.n a3, a2, 12 +40222485: 020c movi.n a2, 0 +40222487: 086c22 s32i a2, a12, 32 +4022248a: 8b8601 l32r a0, 402052a4 +4022248d: 0000c0 callx0 a0 +40222490: 9c38 l32i.n a3, a12, 36 +40222492: cd3121 l32r a2, 40215958 +40222495: 0348 l32i.n a4, a3, 0 +40222497: 1122a0 slli a2, a2, 6 +4022249a: 202420 or a2, a4, a2 +4022249d: 0329 s32i.n a2, a3, 0 +4022249f: 7108 l32i.n a0, a1, 28 +402224a1: 0c2d mov.n a2, a12 +402224a3: 51d8 l32i.n a13, a1, 20 +402224a5: 61c8 l32i.n a12, a1, 24 +402224a7: 41e8 l32i.n a14, a1, 16 +402224a9: 31f8 l32i.n a15, a1, 12 +402224ab: 20c112 addi a1, a1, 32 +402224ae: f00d ret.n + +402224b0 : +402224b0: f0c112 addi a1, a1, -16 +402224b3: 21c9 s32i.n a12, a1, 8 +402224b5: 3109 s32i.n a0, a1, 12 +402224b7: 02cd mov.n a12, a2 +402224b9: 11d9 s32i.n a13, a1, 4 +402224bb: 230b addi.n a2, a3, -1 +402224bd: 2022f6 bgeui a2, 2, 402224e1 +402224c0: 9c28 l32i.n a2, a12, 36 +402224c2: 030c movi.n a3, 0 +402224c4: 042c movi.n a4, 32 +402224c6: 7ad201 l32r a0, 40201010 <_irom0_text_start> +402224c9: 0000c0 callx0 a0 +402224cc: 8b7501 l32r a0, 402052a0 +402224cf: 0000c0 callx0 a0 +402224d2: ff2521 l32r a2, 40222168 +402224d5: 0238 l32i.n a3, a2, 0 +402224d7: 02c9 s32i.n a12, a2, 0 +402224d9: 8c39 s32i.n a3, a12, 32 +402224db: 003806 j 402225bf +402224de: 000000 ill +402224e1: 344366 bnei a3, 4, 40222519 +402224e4: ff23d1 l32r a13, 40222170 +402224e7: 1c28 l32i.n a2, a12, 4 +402224e9: 1ea242 movi a4, 0x21e +402224ec: 0d3d mov.n a3, a13 +402224ee: 7c0601 l32r a0, 40201508 +402224f1: 0000c0 callx0 a0 +402224f4: 9c28 l32i.n a2, a12, 36 +402224f6: 20a242 movi a4, 0x220 +402224f9: 0d3d mov.n a3, a13 +402224fb: 7c0301 l32r a0, 40201508 +402224fe: 0000c0 callx0 a0 +40222501: 042c22 l32i a2, a12, 16 +40222504: 21a242 movi a4, 0x221 +40222507: 203dd0 or a3, a13, a13 +4022250a: 7bff01 l32r a0, 40201508 +4022250d: 0000c0 callx0 a0 +40222510: 22a242 movi a4, 0x222 +40222513: 001606 j 4022256f +40222516: 000000 ill +40222519: 205366 bnei a3, 5, 4022253d +4022251c: 9c28 l32i.n a2, a12, 36 +4022251e: 030c movi.n a3, 0 +40222520: 042c movi.n a4, 32 +40222522: 7abb01 l32r a0, 40201010 <_irom0_text_start> +40222525: 0000c0 callx0 a0 +40222528: 8b5e01 l32r a0, 402052a0 +4022252b: 0000c0 callx0 a0 +4022252e: ff0e21 l32r a2, 40222168 +40222531: 2238 l32i.n a3, a2, 8 +40222533: 22c9 s32i.n a12, a2, 8 +40222535: 8c39 s32i.n a3, a12, 32 +40222537: 002106 j 402225bf +4022253a: 000000 ill +4022253d: 3c6366 bnei a3, 6, 4022257d +40222540: ff0cd1 l32r a13, 40222170 +40222543: 1c28 l32i.n a2, a12, 4 +40222545: 33a242 movi a4, 0x233 +40222548: 203dd0 or a3, a13, a13 +4022254b: 7bef01 l32r a0, 40201508 +4022254e: 0000c0 callx0 a0 +40222551: 9c28 l32i.n a2, a12, 36 +40222553: 35a242 movi a4, 0x235 +40222556: 0d3d mov.n a3, a13 +40222558: 7bec01 l32r a0, 40201508 +4022255b: 0000c0 callx0 a0 +4022255e: 4c28 l32i.n a2, a12, 16 +40222560: 36a242 movi a4, 0x236 +40222563: 203dd0 or a3, a13, a13 +40222566: 7be801 l32r a0, 40201508 +40222569: 0000c0 callx0 a0 +4022256c: 37a242 movi a4, 0x237 +4022256f: 0d3d mov.n a3, a13 +40222571: 0c2d mov.n a2, a12 +40222573: 7be501 l32r a0, 40201508 +40222576: 0000c0 callx0 a0 +40222579: 001206 j 402225c5 +4022257c: 736600 excw +4022257f: 9c2820 excw +40222582: 030c movi.n a3, 0 +40222584: 042c movi.n a4, 32 +40222586: 7aa201 l32r a0, 40201010 <_irom0_text_start> +40222589: 0000c0 callx0 a0 +4022258c: 8b4501 l32r a0, 402052a0 +4022258f: 0000c0 callx0 a0 +40222592: fef521 l32r a2, 40222168 +40222595: 3238 l32i.n a3, a2, 12 +40222597: 32c9 s32i.n a12, a2, 12 +40222599: 8c39 s32i.n a3, a12, 32 +4022259b: 000806 j 402225bf +4022259e: 000000 ill +402225a1: 208366 bnei a3, 8, 402225c5 +402225a4: 9c28 l32i.n a2, a12, 36 +402225a6: 030c movi.n a3, 0 +402225a8: c40c movi.n a4, 12 +402225aa: 7a9901 l32r a0, 40201010 <_irom0_text_start> +402225ad: 0000c0 callx0 a0 +402225b0: 8b3c01 l32r a0, 402052a0 +402225b3: 0000c0 callx0 a0 +402225b6: feec21 l32r a2, 40222168 +402225b9: 4238 l32i.n a3, a2, 16 +402225bb: 42c9 s32i.n a12, a2, 16 +402225bd: 8c39 s32i.n a3, a12, 32 +402225bf: 8b3901 l32r a0, 402052a4 +402225c2: 0000c0 callx0 a0 +402225c5: 3108 l32i.n a0, a1, 12 +402225c7: 21c8 l32i.n a12, a1, 8 +402225c9: 11d8 l32i.n a13, a1, 4 +402225cb: 10c112 addi a1, a1, 16 +402225ce: f00d ret.n +402225d0: fe9610 excw +402225d3: 3f .byte 0x3f +402225d4: fe9184 excw +402225d7: 3f .byte 0x3f +402225d8: fe9890 excw +402225db: 3f .byte 0x3f +402225dc: fe92c4 excw +402225df: 3f .byte 0x3f +402225e0: fe9404 excw +402225e3: 3f .byte 0x3f +402225e4: fe94a4 excw +402225e7: 3f .byte 0x3f +402225e8: 95bc beqz.n a5, 40222625 +402225ea: fe .byte 0xfe +402225eb: 3f .byte 0x3f + +402225ec : +402225ec: d0c112 addi a1, a1, -48 +402225ef: 71f9 s32i.n a15, a1, 28 +402225f1: fff7f1 l32r a15, 402225d0 +402225f4: a1c9 s32i.n a12, a1, 40 +402225f6: fff7c1 l32r a12, 402225d4 +402225f9: 91d9 s32i.n a13, a1, 36 +402225fb: 81e9 s32i.n a14, a1, 32 +402225fd: b109 s32i.n a0, a1, 44 +402225ff: 4d5c movi.n a13, 84 +40222601: 0fed mov.n a14, a15 +40222603: 150c movi.n a5, 1 +40222605: f90731 l32r a3, 40220a24 +40222608: 065c52 s16i a5, a12, 12 +4022260b: a328 l32i.n a2, a3, 40 +4022260d: 32da add.n a3, a2, a13 +4022260f: 1c39 s32i.n a3, a12, 4 +40222611: 2c39 s32i.n a3, a12, 8 +40222613: 1228 l32i.n a2, a2, 4 +40222615: 130c movi.n a3, 1 +40222617: 4c29 s32i.n a2, a12, 16 +40222619: 9cf9 s32i.n a15, a12, 36 +4022261b: 202cc0 or a2, a12, a12 +4022261e: 006152 s32i a5, a1, 0 +40222621: ffe8c5 call0 402224b0 +40222624: f4cdd2 addi a13, a13, -12 +40222627: 427c movi.n a2, -12 +40222629: 28ccc2 addi a12, a12, 40 +4022262c: 20cff2 addi a15, a15, 32 +4022262f: 0158 l32i.n a5, a1, 0 +40222631: d09d27 bne a13, a2, 40222605 +40222634: ffe9d1 l32r a13, 402225d8 +40222637: ffe9c1 l32r a12, 402225dc +4022263a: 00a0f2 movi a15, 0 +4022263d: 40a042 movi a4, 64 +40222640: 0020c0 memw +40222643: 0d28 l32i.n a2, a13, 0 +40222645: d72d31 l32r a3, 402182fc +40222648: 102230 and a2, a2, a3 +4022264b: 202240 or a2, a2, a4 +4022264e: 0020c0 memw +40222651: 0d29 s32i.n a2, a13, 0 +40222653: 120c movi.n a2, 1 +40222655: 065c22 s16i a2, a12, 12 +40222658: 2dcb addi.n a2, a13, 12 +4022265a: 4c29 s32i.n a2, a12, 16 +4022265c: 01df22 addmi a2, a15, 0x100 +4022265f: 2e2a add.n a2, a14, a2 +40222661: 1cd9 s32i.n a13, a12, 4 +40222663: 2cd9 s32i.n a13, a12, 8 +40222665: 9c29 s32i.n a2, a12, 36 +40222667: 530c movi.n a3, 5 +40222669: 0c2d mov.n a2, a12 +4022266b: 006142 s32i a4, a1, 0 +4022266e: 20cff2 addi a15, a15, 32 +40222671: ffe3c5 call0 402224b0 +40222674: 28ccc2 addi a12, a12, 40 +40222677: 4ccdd2 addi a13, a13, 76 +4022267a: 0148 l32i.n a4, a1, 0 +4022267c: c0ff66 bnei a15, 0x100, 40222640 +4022267f: ffd8d1 l32r a13, 402225e0 +40222682: 0c0c movi.n a12, 0 +40222684: 02dc22 addmi a2, a12, 0x200 +40222687: 2e2a add.n a2, a14, a2 +40222689: 9d29 s32i.n a2, a13, 36 +4022268b: 730c movi.n a3, 7 +4022268d: 0d2d mov.n a2, a13 +4022268f: 20ccc2 addi a12, a12, 32 +40222692: ffe1c5 call0 402224b0 +40222695: 28cdd2 addi a13, a13, 40 +40222698: e8ec66 bnei a12, 128, 40222684 +4022269b: ffd2d1 l32r a13, 402225e4 +4022269e: ffd2f1 l32r a15, 402225e8 +402226a1: 0c0c movi.n a12, 0 +402226a3: 4e5c movi.n a14, 84 +402226a5: 2cfa add.n a2, a12, a15 +402226a7: 9d29 s32i.n a2, a13, 36 +402226a9: 830c movi.n a3, 8 +402226ab: 202dd0 or a2, a13, a13 +402226ae: 0cccc2 addi a12, a12, 12 +402226b1: ffdfc5 call0 402224b0 +402226b4: 28cdd2 addi a13, a13, 40 +402226b7: ea9ce7 bne a12, a14, 402226a5 +402226ba: b108 l32i.n a0, a1, 44 +402226bc: a1c8 l32i.n a12, a1, 40 +402226be: 91d8 l32i.n a13, a1, 36 +402226c0: 81e8 l32i.n a14, a1, 32 +402226c2: 71f8 l32i.n a15, a1, 28 +402226c4: 30c112 addi a1, a1, 48 +402226c7: f00d ret.n +402226c9: 000000 ill +402226cc: fe9af0 excw +402226cf: 3f .byte 0x3f + +402226d0 : +402226d0: ffff71 l32r a7, 402226cc +402226d3: 744040 extui a4, a4, 0, 8 +402226d6: 044722 s8i a2, a7, 4 +402226d9: 020c movi.n a2, 0 +402226db: 094722 s8i a2, a7, 9 +402226de: 0a4722 s8i a2, a7, 10 +402226e1: 0b4722 s8i a2, a7, 11 +402226e4: 020c movi.n a2, 0 +402226e6: 054732 s8i a3, a7, 5 +402226e9: 074742 s8i a4, a7, 7 +402226ec: 084752 s8i a5, a7, 8 +402226ef: 064742 s8i a4, a7, 6 +402226f2: 075762 s16i a6, a7, 14 +402226f5: 5729 s32i.n a2, a7, 20 +402226f7: 6729 s32i.n a2, a7, 24 +402226f9: f00d ret.n +402226fb: dec400 excw +402226fe: fe .byte 0xfe +402226ff: 3f .byte 0x3f +40222700: 092a add.n a0, a9, a2 + ... + +40222704 : +40222704: f0c112 addi a1, a1, -16 +40222707: 0261c2 s32i a12, a1, 8 +4022270a: fffcc1 l32r a12, 402226fc +4022270d: 036102 s32i a0, a1, 12 +40222710: 00a122 movi a2, 0x100 +40222713: 0c29 s32i.n a2, a12, 0 +40222715: 00a222 movi a2, 0x200 +40222718: 1c29 s32i.n a2, a12, 4 +4022271a: b20c movi.n a2, 11 +4022271c: 094c22 s8i a2, a12, 9 +4022271f: 084c22 s8i a2, a12, 8 +40222722: 920c movi.n a2, 9 +40222724: 085c22 s16i a2, a12, 16 +40222727: fff621 l32r a2, 40222700 +4022272a: 240c movi.n a4, 2 +4022272c: 065c22 s16i a2, a12, 12 +4022272f: 055c22 s16i a2, a12, 10 +40222732: 5fa122 movi a2, 0x15f +40222735: 0c5c22 s16i a2, a12, 24 +40222738: b81a21 l32r a2, 402107a0 +4022273b: 043d mov.n a3, a4 +4022273d: 0d5c22 s16i a2, a12, 26 +40222740: e0a562 movi a6, 0x5e0 +40222743: 350c movi.n a5, 3 +40222745: 00a022 movi a2, 0 +40222748: fff845 call0 402226d0 +4022274b: 0c1c22 l16ui a2, a12, 24 +4022274e: 130c movi.n a3, 1 +40222750: 014685 call0 40223bbc +40222753: 003d05 call0 40222b24 +40222756: 3108 l32i.n a0, a1, 12 +40222758: 21c8 l32i.n a12, a1, 8 +4022275a: 10c112 addi a1, a1, 16 +4022275d: f00d ret.n + ... + +40222760 : +40222760: 742020 extui a2, a2, 0, 8 +40222763: 431c movi.n a3, 20 +40222765: 093327 bltu a3, a2, 40222772 +40222768: 0852f6 bgeui a2, 5, 40222774 +4022276b: 520c movi.n a2, 5 +4022276d: 0000c6 j 40222774 +40222770: 1c0000 excw +40222773: e23142 excw +40222776: ff .byte 0xff +40222777: 094322 s8i a2, a3, 9 +4022277a: 084322 s8i a2, a3, 8 +4022277d: f00d ret.n +4022277f: 87ba00 excw +40222782: fe .byte 0xfe +40222783: 3f .byte 0x3f + +40222784 : +40222784: ffd221 l32r a2, 402226cc +40222787: f0c112 addi a1, a1, -16 +4022278a: 3109 s32i.n a0, a1, 12 +4022278c: 0278 l32i.n a7, a2, 0 +4022278e: 5268 l32i.n a6, a2, 20 +40222790: 6258 l32i.n a5, a2, 24 +40222792: 0b0242 l8ui a4, a2, 11 +40222795: 040232 l8ui a3, a2, 4 +40222798: fffa21 l32r a2, 40222780 +4022279b: c7b201 l32r a0, 40214664 +4022279e: 0000c0 callx0 a0 +402227a1: 3108 l32i.n a0, a1, 12 +402227a3: 10c112 addi a1, a1, 16 +402227a6: f00d ret.n +402227a8: 040c movi.n a4, 0 +402227aa: 0c1437 beq a4, a3, 402227ba +402227ad: 0a4242 s8i a4, a2, 10 +402227b0: 441b addi.n a4, a4, 1 +402227b2: 744040 extui a4, a4, 0, 8 +402227b5: 22cb addi.n a2, a2, 12 +402227b7: fffbc6 j 402227aa +402227ba: f00d ret.n + +402227bc : +402227bc: 744020 extui a4, a2, 0, 8 +402227bf: 220c movi.n a2, 2 +402227c1: 743030 extui a3, a3, 0, 8 +402227c4: 01b427 bgeu a4, a2, 402227c9 +402227c7: 042d mov.n a2, a4 +402227c9: 538c beqz.n a3, 402227d2 +402227cb: 348c beqz.n a4, 402227d2 +402227cd: 222b addi.n a2, a2, 2 +402227cf: 742020 extui a2, a2, 0, 8 +402227d2: f00d ret.n +402227d4: 828c beqz.n a2, 402227e0 +402227d6: fe .byte 0xfe +402227d7: 3f .byte 0x3f + +402227d8 : +402227d8: 743030 extui a3, a3, 0, 8 +402227db: 746020 extui a6, a2, 0, 8 +402227de: 744040 extui a4, a4, 0, 8 +402227e1: 745050 extui a5, a5, 0, 8 +402227e4: f27c movi.n a2, -1 +402227e6: 0223b6 bltui a3, 2, 402227ec +402227e9: 004446 j 402228fe +402227ec: 782626 beqi a6, 2, 40222868 +402227ef: 0936f6 bgeui a6, 3, 402227fc +402227f2: 569c beqz.n a6, 4022280b +402227f4: 401626 beqi a6, 1, 40222838 +402227f7: 003f46 j 402228f8 +402227fa: 660000 excw +402227fd: 460236 excw +40222800: 660024 excw +40222803: c60246 j 40214010 +40222806: 002c movi.n a0, 32 +40222808: 003b06 j 402228f8 +4022280b: 01af22 movi a2, -255 +4022280e: 642a add.n a6, a4, a2 +40222810: 46dc bnez.n a6, 40222828 +40222812: 252a add.n a2, a5, a2 +40222814: 02dc bnez.n a2, 40222828 +40222816: ffef21 l32r a2, 402227d4 +40222819: 903320 addx2 a3, a3, a2 +4022281c: 020c movi.n a2, 0 +4022281e: 004322 s8i a2, a3, 0 +40222821: 320c movi.n a2, 3 +40222823: 002bc6 j 402228d6 +40222826: 470000 excw +40222829: 4602b5 excw +4022282c: b60033 excw +4022282f: c60245 call0 401e8854 <_lit4_end+0xe2528> +40222832: 060031 l32r a3, 401e4034 <_lit4_end+0xddd08> +40222835: 002c movi.n a0, 32 +40222837: af2200 excw +4022283a: 642a01 l32r a0, 401fb8e4 <_lit4_end+0xf55b8> +4022283d: 46dc bnez.n a6, 40222855 +4022283f: 252a add.n a2, a5, a2 +40222841: 02dc bnez.n a2, 40222855 +40222843: ffe421 l32r a2, 402227d4 +40222846: 332b addi.n a3, a3, 2 +40222848: 903320 addx2 a3, a3, a2 +4022284b: 020c movi.n a2, 0 +4022284d: 004322 s8i a2, a3, 0 +40222850: a20c movi.n a2, 10 +40222852: 002006 j 402228d6 +40222855: 02b547 bgeu a5, a4, 4022285b +40222858: 002806 j 402228fc +4022285b: a20c movi.n a2, 10 +4022285d: 332b addi.n a3, a3, 2 +4022285f: 023257 bltu a2, a5, 40222865 +40222862: 002086 j 402228e8 +40222865: 0024c6 j 402228fc +40222868: 01af22 movi a2, -255 +4022286b: 642a add.n a6, a4, a2 +4022286d: 46dc bnez.n a6, 40222885 +4022286f: 252a add.n a2, a5, a2 +40222871: 02dc bnez.n a2, 40222885 +40222873: ffd821 l32r a2, 402227d4 +40222876: 334b addi.n a3, a3, 4 +40222878: 903320 addx2 a3, a3, a2 +4022287b: 020c movi.n a2, 0 +4022287d: 004322 s8i a2, a3, 0 +40222880: b20c movi.n a2, 11 +40222882: 001406 j 402228d6 +40222885: 733547 bltu a5, a4, 402228fc +40222888: b20c movi.n a2, 11 +4022288a: 334b addi.n a3, a3, 4 +4022288c: 58b257 bgeu a2, a5, 402228e8 +4022288f: 001a46 j 402228fc +40222892: 220000 excw +40222895: af .byte 0xaf +40222896: 642a01 l32r a0, 401fb940 <_lit4_end+0xf5614> +40222899: 46dc bnez.n a6, 402228b1 +4022289b: 252a add.n a2, a5, a2 +4022289d: 02dc bnez.n a2, 402228b1 +4022289f: ffcd21 l32r a2, 402227d4 +402228a2: 336b addi.n a3, a3, 6 +402228a4: 903320 addx2 a3, a3, a2 +402228a7: 020c movi.n a2, 0 +402228a9: 004322 s8i a2, a3, 0 +402228ac: 720c movi.n a2, 7 +402228ae: 000906 j 402228d6 +402228b1: 473547 bltu a5, a4, 402228fc +402228b4: 336b addi.n a3, a3, 6 +402228b6: 2e85b6 bltui a5, 8, 402228e8 +402228b9: 000fc6 j 402228fc +402228bc: 01af22 movi a2, -255 +402228bf: 642a add.n a6, a4, a2 +402228c1: 76dc bnez.n a6, 402228dc +402228c3: 252a add.n a2, a5, a2 +402228c5: 32dc bnez.n a2, 402228dc +402228c7: ffc321 l32r a2, 402227d4 +402228ca: 338b addi.n a3, a3, 8 +402228cc: 903320 addx2 a3, a3, a2 +402228cf: 020c movi.n a2, 0 +402228d1: 004322 s8i a2, a3, 0 +402228d4: 820c movi.n a2, 8 +402228d6: 014322 s8i a2, a3, 1 +402228d9: 0005c6 j 402228f4 +402228dc: 1c3547 bltu a5, a4, 402228fc +402228df: 08a022 movi a2, 8 +402228e2: 163257 bltu a2, a5, 402228fc +402228e5: 803320 add a3, a3, a2 +402228e8: ffbb21 l32r a2, 402227d4 +402228eb: 903320 addx2 a3, a3, a2 +402228ee: 004342 s8i a4, a3, 0 +402228f1: 014352 s8i a5, a3, 1 +402228f4: 020c movi.n a2, 0 +402228f6: f00d ret.n +402228f8: e27c movi.n a2, -2 +402228fa: f00d ret.n +402228fc: f27c movi.n a2, -1 +402228fe: f00d ret.n +40222900: fe8184 excw +40222903: 3f .byte 0x3f +40222904: fe81f0 excw +40222907: 3f .byte 0x3f +40222908: fe80f4 excw +4022290b: 3f .byte 0x3f +4022290c: fe8154 excw +4022290f: 3f .byte 0x3f +40222910: fe80a0 excw +40222913: 3f .byte 0x3f +40222914: fe8100 excw +40222917: 3f .byte 0x3f +40222918: 4a7c movi.n a10, -12 +4022291a: 704010 excw +4022291d: 3ffe80 excw +40222920: 4a98 l32i.n a9, a10, 16 +40222922: 944010 extui a4, a1, 0, 10 +40222925: 3ffe80 excw + +40222928 : +40222928: e0c112 addi a1, a1, -32 +4022292b: 61c9 s32i.n a12, a1, 24 +4022292d: 51d9 s32i.n a13, a1, 20 +4022292f: 7109 s32i.n a0, a1, 28 +40222931: 41e9 s32i.n a14, a1, 16 +40222933: 31f9 s32i.n a15, a1, 12 +40222935: 745030 extui a5, a3, 0, 8 +40222938: 02cd mov.n a12, a2 +4022293a: 154252 s8i a5, a2, 21 +4022293d: 172222 l32i a2, a2, 92 +40222940: 74d040 extui a13, a4, 0, 8 +40222943: 021266 bnei a2, 1, 40222949 +40222946: 002286 j 402229d4 +40222949: 11c216 beqz a2, 40222a69 +4022294c: 0c2226 beqi a2, 2, 4022295c +4022294f: 023226 beqi a2, 3, 40222955 +40222952: 0058c6 j 40222ab9 +40222955: 0e0c movi.n a14, 0 +40222957: 000446 j 4022296c +4022295a: 310000 srai a0, a0, 16 +4022295d: 0c9195 excw +40222960: 033204 excw +40222963: 1e0c00 excw +40222966: 83e430 moveqz a14, a4, a3 +40222969: 74e0e0 extui a14, a14, 0, 8 +4022296c: 919131 l32r a3, 40206fb0 +4022296f: 000332 l8ui a3, a3, 0 +40222972: 05e316 beqz a3, 402229d4 +40222975: ffe231 l32r a3, 40222900 +40222978: ffe3f1 l32r a15, 40222904 +4022297b: b40c movi.n a4, 11 +4022297d: 93f3d0 movnez a15, a3, a13 +40222980: 046d mov.n a6, a4 +40222982: 830c movi.n a3, 8 +40222984: 9363d0 movnez a6, a3, a13 +40222987: 784c32 s8i a3, a12, 120 +4022298a: 013580 slli a3, a5, 24 +4022298d: 1a6cf2 s32i a15, a12, 104 +40222990: 044ce2 s8i a14, a12, 4 +40222993: 054c62 s8i a6, a12, 5 +40222996: 315830 srai a5, a3, 24 +40222999: 1ca457 bge a4, a5, 402229b9 +4022299c: 054d mov.n a4, a5 +4022299e: 051c movi.n a5, 16 +402229a0: 1aa547 bge a5, a4, 402229be +402229a3: 551c movi.n a5, 21 +402229a5: 1ba547 bge a5, a4, 402229c4 +402229a8: a51c movi.n a5, 26 +402229aa: 1ba547 bge a5, a4, 402229c9 +402229ad: d51c movi.n a5, 29 +402229af: 1ba547 bge a5, a4, 402229ce +402229b2: 043d mov.n a3, a4 +402229b4: 142c movi.n a4, 33 +402229b6: 0017c6 j 40222a19 +402229b9: be0c movi.n a14, 11 +402229bb: 0017c6 j 40222a1e +402229be: 7e0c movi.n a14, 7 +402229c0: 001686 j 40222a1e +402229c3: 5e0c00 excw +402229c6: 001506 j 40222a1e +402229c9: 4e0c movi.n a14, 4 +402229cb: 0013c6 j 40222a1e +402229ce: 3e0c movi.n a14, 3 +402229d0: 001286 j 40222a1e +402229d3: cf3100 excw +402229d6: ff .byte 0xff +402229d7: ffcff1 l32r a15, 40222914 +402229da: ae0c movi.n a14, 10 +402229dc: 93f3d0 movnez a15, a3, a13 +402229df: 030c movi.n a3, 0 +402229e1: 044c32 s8i a3, a12, 4 +402229e4: 0e4d mov.n a4, a14 +402229e6: 730c movi.n a3, 7 +402229e8: 9343d0 movnez a4, a3, a13 +402229eb: 054c42 s8i a4, a12, 5 +402229ee: ffca41 l32r a4, 40222918 +402229f1: 784c32 s8i a3, a12, 120 +402229f4: 013580 slli a3, a5, 24 +402229f7: 1b6c42 s32i a4, a12, 108 +402229fa: 1a6cf2 s32i a15, a12, 104 +402229fd: 314830 srai a4, a3, 24 +40222a00: b50c movi.n a5, 11 +40222a02: 18a547 bge a5, a4, 40222a1e +40222a05: 051c movi.n a5, 16 +40222a07: 5e0c movi.n a14, 5 +40222a09: 11a547 bge a5, a4, 40222a1e +40222a0c: 551c movi.n a5, 21 +40222a0e: 3e0c movi.n a14, 3 +40222a10: 0aa547 bge a5, a4, 40222a1e +40222a13: 043d mov.n a3, a4 +40222a15: 0e0c movi.n a14, 0 +40222a17: d41c movi.n a4, 29 +40222a19: 012437 blt a4, a3, 40222a1e +40222a1c: 2e0c movi.n a14, 2 +40222a1e: 3d8c beqz.n a13, 40222a25 +40222a20: 018eb6 bltui a14, 8, 40222a25 +40222a23: 7e0c movi.n a14, 7 +40222a25: 0d3d mov.n a3, a13 +40222a27: 742020 extui a2, a2, 0, 8 +40222a2a: ffd905 call0 402227bc +40222a2d: 770c42 l8ui a4, a12, 119 +40222a30: ff6951 l32r a5, 402227d4 +40222a33: 1122f0 slli a2, a2, 1 +40222a36: 324a add.n a3, a2, a4 +40222a38: 903350 addx2 a3, a3, a5 +40222a3b: 000332 l8ui a3, a3, 0 +40222a3e: 123e37 bltu a14, a3, 40222a54 +40222a41: 424a add.n a4, a2, a4 +40222a43: 904450 addx2 a4, a4, a5 +40222a46: 010422 l8ui a2, a4, 1 +40222a49: 0e3d mov.n a3, a14 +40222a4b: 02b2e7 bgeu a2, a14, 40222a51 +40222a4e: 203220 or a3, a2, a2 +40222a51: 743030 extui a3, a3, 0, 8 +40222a54: 903330 addx2 a3, a3, a3 +40222a57: a033f0 addx4 a3, a3, a15 +40222a5a: 186c32 s32i a3, a12, 96 +40222a5d: ffaa21 l32r a2, 40222908 +40222a60: ffab31 l32r a3, 4022290c +40222a63: 8323d0 moveqz a2, a3, a13 +40222a66: 001b86 j 40222ad8 +40222a69: 030c movi.n a3, 0 +40222a6b: 032d mov.n a2, a3 +40222a6d: ffd4c5 call0 402227bc +40222a70: 770c42 l8ui a4, a12, 119 +40222a73: ff5851 l32r a5, 402227d4 +40222a76: 1122f0 slli a2, a2, 1 +40222a79: 324a add.n a3, a2, a4 +40222a7b: 903350 addx2 a3, a3, a5 +40222a7e: 000332 l8ui a3, a3, 0 +40222a81: 0c43f6 bgeui a3, 4, 40222a91 +40222a84: 424a add.n a4, a2, a4 +40222a86: 904450 addx2 a4, a4, a5 +40222a89: 010432 l8ui a3, a4, 1 +40222a8c: 0133b6 bltui a3, 3, 40222a91 +40222a8f: 330c movi.n a3, 3 +40222a91: ffa221 l32r a2, 4022291c +40222a94: 903330 addx2 a3, a3, a3 +40222a97: a03320 addx4 a3, a3, a2 +40222a9a: 1a6c22 s32i a2, a12, 104 +40222a9d: 020c movi.n a2, 0 +40222a9f: 044c22 s8i a2, a12, 4 +40222aa2: 320c movi.n a2, 3 +40222aa4: 054c22 s8i a2, a12, 5 +40222aa7: 784c22 s8i a2, a12, 120 +40222aaa: ff9d21 l32r a2, 40222920 +40222aad: 186c32 s32i a3, a12, 96 +40222ab0: 1b6c22 s32i a2, a12, 108 +40222ab3: ff9c21 l32r a2, 40222924 +40222ab6: 000786 j 40222ad8 +40222ab9: ff9821 l32r a2, 4022291c +40222abc: 030c movi.n a3, 0 +40222abe: 044c32 s8i a3, a12, 4 +40222ac1: 330c movi.n a3, 3 +40222ac3: 1a6c22 s32i a2, a12, 104 +40222ac6: 054c32 s8i a3, a12, 5 +40222ac9: ff9621 l32r a2, 40222924 +40222acc: 784c32 s8i a3, a12, 120 +40222acf: ff9431 l32r a3, 40222920 +40222ad2: 186c22 s32i a2, a12, 96 +40222ad5: 1b6c32 s32i a3, a12, 108 +40222ad8: 196c22 s32i a2, a12, 100 +40222adb: 182c22 l32i a2, a12, 96 +40222ade: 794cd2 s8i a13, a12, 121 +40222ae1: 030c movi.n a3, 0 +40222ae3: 0b4232 s8i a3, a2, 11 +40222ae6: b61e21 l32r a2, 40210360 +40222ae9: 7108 l32i.n a0, a1, 28 +40222aeb: 166c22 s32i a2, a12, 88 +40222aee: 020c movi.n a2, 0 +40222af0: ac29 s32i.n a2, a12, 40 +40222af2: 9c29 s32i.n a2, a12, 36 +40222af4: ec29 s32i.n a2, a12, 56 +40222af6: 164c22 s8i a2, a12, 22 +40222af9: 7fa022 movi a2, 127 +40222afc: 174c32 s8i a3, a12, 23 +40222aff: 064c32 s8i a3, a12, 6 +40222b02: 004c22 s8i a2, a12, 0 +40222b05: 014c22 s8i a2, a12, 1 +40222b08: 024c22 s8i a2, a12, 2 +40222b0b: 034c22 s8i a2, a12, 3 +40222b0e: 51d8 l32i.n a13, a1, 20 +40222b10: 61c8 l32i.n a12, a1, 24 +40222b12: 41e8 l32i.n a14, a1, 16 +40222b14: 31f8 l32i.n a15, a1, 12 +40222b16: 20c112 addi a1, a1, 32 +40222b19: f00d ret.n +40222b1b: 9b1200 excw +40222b1e: fe .byte 0xfe +40222b1f: 3f .byte 0x3f +40222b20: fe9b10 excw +40222b23: 3f .byte 0x3f + +40222b24 : +40222b24: f0c112 addi a1, a1, -16 +40222b27: fffd31 l32r a3, 40222b1c +40222b2a: 3109 s32i.n a0, a1, 12 +40222b2c: 00a022 movi a2, 0 +40222b2f: 004322 s8i a2, a3, 0 +40222b32: fffb31 l32r a3, 40222b20 +40222b35: 004322 s8i a2, a3, 0 +40222b38: 014322 s8i a2, a3, 1 +40222b3b: ff7221 l32r a2, 40222904 +40222b3e: 0ca032 movi a3, 12 +40222b41: ffc645 call0 402227a8 +40222b44: ff6f21 l32r a2, 40222900 +40222b47: 930c movi.n a3, 9 +40222b49: ffc5c5 call0 402227a8 +40222b4c: ff7221 l32r a2, 40222914 +40222b4f: b30c movi.n a3, 11 +40222b51: ffc545 call0 402227a8 +40222b54: ff6f21 l32r a2, 40222910 +40222b57: 830c movi.n a3, 8 +40222b59: ffc4c5 call0 402227a8 +40222b5c: ff7021 l32r a2, 4022291c +40222b5f: 430c movi.n a3, 4 +40222b61: ffc445 call0 402227a8 +40222b64: 3108 l32i.n a0, a1, 12 +40222b66: 10c112 addi a1, a1, 16 +40222b69: f00d ret.n +40222b6b: 9b1400 excw +40222b6e: fe .byte 0xfe +40222b6f: 3f .byte 0x3f + +40222b70 : +40222b70: ffff21 l32r a2, 40222b6c +40222b73: f00d ret.n +40222b75: 000000 ill + +40222b78 : +40222b78: f00d ret.n + ... + +40222b7c : +40222b7c: e28c beqz.n a2, 40222b8e +40222b7e: 140242 l8ui a4, a2, 20 +40222b81: 130c movi.n a3, 1 +40222b83: 204430 or a4, a4, a3 +40222b86: 430c movi.n a3, 4 +40222b88: 203430 or a3, a4, a3 +40222b8b: 144232 s8i a3, a2, 20 +40222b8e: f00d ret.n + +40222b90 : +40222b90: e28c beqz.n a2, 40222ba2 +40222b92: 140242 l8ui a4, a2, 20 +40222b95: e37c movi.n a3, -2 +40222b97: 104430 and a4, a4, a3 +40222b9a: b37c movi.n a3, -5 +40222b9c: 103430 and a3, a4, a3 +40222b9f: 144232 s8i a3, a2, 20 +40222ba2: f00d ret.n +40222ba4: 0f .byte 0xf +40222ba5: ff .byte 0xff +40222ba6: 074022 s8i a2, a0, 7 +40222ba9: ff .byte 0xff +40222baa: 22 .byte 0x22 +40222bab: 40 .byte 0x40 + +40222bac : +40222bac: d0c112 addi a1, a1, -48 +40222baf: 71f9 s32i.n a15, a1, 28 +40222bb1: f45050 extui a5, a5, 0, 16 +40222bb4: 74f040 extui a15, a4, 0, 8 +40222bb7: ffed71 l32r a7, 40222b6c +40222bba: ffd891 l32r a9, 40222b1c +40222bbd: 2159 s32i.n a5, a1, 8 +40222bbf: 115fb0 slli a5, a15, 5 +40222bc2: a1c9 s32i.n a12, a1, 40 +40222bc4: 91d9 s32i.n a13, a1, 36 +40222bc6: 81e9 s32i.n a14, a1, 32 +40222bc8: b109 s32i.n a0, a1, 44 +40222bca: c0c5f0 sub a12, a5, a15 +40222bcd: a0cc70 addx4 a12, a12, a7 +40222bd0: 74e020 extui a14, a2, 0, 8 +40222bd3: 000922 l8ui a2, a9, 0 +40222bd6: 01c9 s32i.n a12, a1, 0 +40222bd8: 1139 s32i.n a3, a1, 4 +40222bda: 07cd mov.n a12, a7 +40222bdc: 09dd mov.n a13, a9 +40222bde: 3452f7 bbc a2, a15, 40222c16 +40222be1: ffcf31 l32r a3, 40222b20 +40222be4: 23ea add.n a2, a3, a14 +40222be6: 000222 l8ui a2, a2, 0 +40222be9: 0fd2f7 bbs a2, a15, 40222bfc +40222bec: ffee21 l32r a2, 40222ba4 +40222bef: 7d1701 l32r a0, 4020204c +40222bf2: 0000c0 callx0 a0 +40222bf5: 020c movi.n a2, 0 +40222bf7: 001ec6 j 40222c76 +40222bfa: f00000 subx8 a0, a0, a0 +40222bfd: 70c025 excw +40222c00: 38a022 movi a2, 56 +40222c03: 640c11 l32r a1, 401fbc34 <_lit4_end+0xf5908> +40222c06: 1ac222 addi a2, a2, 26 +40222c09: 3159 s32i.n a5, a1, 12 +40222c0b: 7c0401 l32r a0, 40201c1c +40222c0e: 0000c0 callx0 a0 +40222c11: 3158 l32i.n a5, a1, 12 +40222c13: fd5256 bnez a2, 40222bec +40222c16: 120c movi.n a2, 1 +40222c18: 000d32 l8ui a3, a13, 0 +40222c1b: 401f00 ssl a15 +40222c1e: a12200 sll a2, a2 +40222c21: 742020 extui a2, a2, 0, 8 +40222c24: 203230 or a3, a2, a3 +40222c27: 004d32 s8i a3, a13, 0 +40222c2a: ffbd31 l32r a3, 40222b20 +40222c2d: d3ea add.n a13, a3, a14 +40222c2f: 000d32 l8ui a3, a13, 0 +40222c32: 202230 or a2, a2, a3 +40222c35: 004d22 s8i a2, a13, 0 +40222c38: 0128 l32i.n a2, a1, 0 +40222c3a: 7ca032 movi a3, 124 +40222c3d: 036152 s32i a5, a1, 12 +40222c40: 8bff01 l32r a0, 40205c3c +40222c43: 0000c0 callx0 a0 +40222c46: 3158 l32i.n a5, a1, 12 +40222c48: 2138 l32i.n a3, a1, 8 +40222c4a: c025f0 sub a2, a5, a15 +40222c4d: 1152e0 slli a5, a2, 2 +40222c50: 2c5a add.n a2, a12, a5 +40222c52: 105232 s16i a3, a2, 32 +40222c55: 1138 l32i.n a3, a1, 4 +40222c57: 7742e2 s8i a14, a2, 119 +40222c5a: 7642f2 s8i a15, a2, 118 +40222c5d: 06a042 movi a4, 6 +40222c60: 1ac222 addi a2, a2, 26 +40222c63: 78ec01 l32r a0, 40201014 <_irom0_text_start+0x4> +40222c66: 0000c0 callx0 a0 +40222c69: ffcf21 l32r a2, 40222ba8 +40222c6c: 0f3d mov.n a3, a15 +40222c6e: 7cf701 l32r a0, 4020204c +40222c71: 0000c0 callx0 a0 +40222c74: 0128 l32i.n a2, a1, 0 +40222c76: b108 l32i.n a0, a1, 44 +40222c78: a1c8 l32i.n a12, a1, 40 +40222c7a: 91d8 l32i.n a13, a1, 36 +40222c7c: 81e8 l32i.n a14, a1, 32 +40222c7e: 71f8 l32i.n a15, a1, 28 +40222c80: 30c112 addi a1, a1, 48 +40222c83: f00d ret.n +40222c85: 000000 ill + +40222c88 : +40222c88: ffa521 l32r a2, 40222b1c +40222c8b: 000222 l8ui a2, a2, 0 +40222c8e: f00d ret.n +40222c90: 22ff00 excw +40222c93: fef840 excw +40222c96: 22 .byte 0x22 +40222c97: 40 .byte 0x40 + +40222c98 : +40222c98: ffa251 l32r a5, 40222b20 +40222c9b: f0c112 addi a1, a1, -16 +40222c9e: 742020 extui a2, a2, 0, 8 +40222ca1: 3109 s32i.n a0, a1, 12 +40222ca3: 743040 extui a3, a4, 0, 8 +40222ca6: 452a add.n a4, a5, a2 +40222ca8: 000462 l8ui a6, a4, 0 +40222cab: 295637 bbc a6, a3, 40222cd8 +40222cae: e57c movi.n a5, -2 +40222cb0: 401300 ssl a3 +40222cb3: 815550 src a5, a5, a5 +40222cb6: 745050 extui a5, a5, 0, 8 +40222cb9: 106650 and a6, a6, a5 +40222cbc: 004462 s8i a6, a4, 0 +40222cbf: ff9741 l32r a4, 40222b1c +40222cc2: 000422 l8ui a2, a4, 0 +40222cc5: 105520 and a5, a5, a2 +40222cc8: fff221 l32r a2, 40222c90 +40222ccb: 004452 s8i a5, a4, 0 +40222cce: 7cdf01 l32r a0, 4020204c +40222cd1: 0000c0 callx0 a0 +40222cd4: 000246 j 40222ce1 +40222cd7: ef2100 excw +40222cda: ff .byte 0xff +40222cdb: 7cdc01 l32r a0, 4020204c +40222cde: 0000c0 callx0 a0 +40222ce1: 3108 l32i.n a0, a1, 12 +40222ce3: 10c112 addi a1, a1, 16 +40222ce6: f00d ret.n + +40222ce8 : +40222ce8: ff8e31 l32r a3, 40222b20 +40222ceb: ff8c41 l32r a4, 40222b1c +40222cee: 742020 extui a2, a2, 0, 8 +40222cf1: 232a add.n a2, a3, a2 +40222cf3: 000252 l8ui a5, a2, 0 +40222cf6: 000432 l8ui a3, a4, 0 +40222cf9: 303530 xor a3, a5, a3 +40222cfc: 004432 s8i a3, a4, 0 +40222cff: 030c movi.n a3, 0 +40222d01: 004232 s8i a3, a2, 0 +40222d04: f00d ret.n + ... + +40222d08 : +40222d08: f0c112 addi a1, a1, -16 +40222d0b: 11d9 s32i.n a13, a1, 4 +40222d0d: ff84d1 l32r a13, 40222b20 +40222d10: 21c9 s32i.n a12, a1, 8 +40222d12: 74c020 extui a12, a2, 0, 8 +40222d15: 3109 s32i.n a0, a1, 12 +40222d17: 2dca add.n a2, a13, a12 +40222d19: 000222 l8ui a2, a2, 0 +40222d1c: f24445 call0 40215164 +40222d1f: 030c movi.n a3, 0 +40222d21: 1f1266 bnei a2, 1, 40222d44 +40222d24: cdca add.n a12, a13, a12 +40222d26: 000c32 l8ui a3, a12, 0 +40222d29: 602030 neg a2, a3 +40222d2c: 102230 and a2, a2, a3 +40222d2f: 40f220 nsau a2, a2 +40222d32: 602020 neg a2, a2 +40222d35: 1fc222 addi a2, a2, 31 +40222d38: 1132b0 slli a3, a2, 5 +40222d3b: c02320 sub a2, a3, a2 +40222d3e: ff8b31 l32r a3, 40222b6c +40222d41: a03230 addx4 a3, a2, a3 +40222d44: 3108 l32i.n a0, a1, 12 +40222d46: 032d mov.n a2, a3 +40222d48: 21c8 l32i.n a12, a1, 8 +40222d4a: 11d8 l32i.n a13, a1, 4 +40222d4c: 10c112 addi a1, a1, 16 +40222d4f: f00d ret.n +40222d51: 000000 ill + +40222d54 : +40222d54: d0c112 addi a1, a1, -48 +40222d57: 91d9 s32i.n a13, a1, 36 +40222d59: 03dd mov.n a13, a3 +40222d5b: ff7131 l32r a3, 40222b20 +40222d5e: 742020 extui a2, a2, 0, 8 +40222d61: b109 s32i.n a0, a1, 44 +40222d63: a1c9 s32i.n a12, a1, 40 +40222d65: 81e9 s32i.n a14, a1, 32 +40222d67: 71f9 s32i.n a15, a1, 28 +40222d69: 232a add.n a2, a3, a2 +40222d6b: 0002f2 l8ui a15, a2, 0 +40222d6e: 160c movi.n a6, 1 +40222d70: 6030f0 neg a3, a15 +40222d73: 1033f0 and a3, a3, a15 +40222d76: 40f330 nsau a3, a3 +40222d79: 603030 neg a3, a3 +40222d7c: 1fc3c2 addi a12, a3, 31 +40222d7f: 3b0c26 beqi a12, -1, 40222dbe +40222d82: ff7a31 l32r a3, 40222b6c +40222d85: 11ecb0 slli a14, a12, 5 +40222d88: c02ec0 sub a2, a14, a12 +40222d8b: a02230 addx4 a2, a2, a3 +40222d8e: 640c movi.n a4, 6 +40222d90: 0d3d mov.n a3, a13 +40222d92: 1ac222 addi a2, a2, 26 +40222d95: 0169 s32i.n a6, a1, 0 +40222d97: 7ba101 l32r a0, 40201c1c +40222d9a: 0000c0 callx0 a0 +40222d9d: 0168 l32i.n a6, a1, 0 +40222d9f: a2cc bnez.n a2, 40222dad +40222da1: ff7231 l32r a3, 40222b6c +40222da4: c0cec0 sub a12, a14, a12 +40222da7: a02c30 addx4 a2, a12, a3 +40222daa: 000486 j 40222dc0 +40222dad: 401c00 ssl a12 +40222db0: a13600 sll a3, a6 +40222db3: fc7c movi.n a12, -1 +40222db5: 303c30 xor a3, a12, a3 +40222db8: 10ff30 and a15, a15, a3 +40222dbb: ffec46 j 40222d70 +40222dbe: 020c movi.n a2, 0 +40222dc0: b108 l32i.n a0, a1, 44 +40222dc2: a1c8 l32i.n a12, a1, 40 +40222dc4: 91d8 l32i.n a13, a1, 36 +40222dc6: 81e8 l32i.n a14, a1, 32 +40222dc8: 71f8 l32i.n a15, a1, 28 +40222dca: 30c112 addi a1, a1, 48 +40222dcd: f00d ret.n + ... + +40222dd0 : +40222dd0: 744020 extui a4, a2, 0, 8 +40222dd3: ff5221 l32r a2, 40222b1c +40222dd6: 000232 l8ui a3, a2, 0 +40222dd9: 020c movi.n a2, 0 +40222ddb: 0b5347 bbc a3, a4, 40222dea +40222dde: 1134b0 slli a3, a4, 5 +40222de1: c02340 sub a2, a3, a4 +40222de4: ff6231 l32r a3, 40222b6c +40222de7: a02230 addx4 a2, a2, a3 +40222dea: f00d ret.n + +40222dec : +40222dec: f0c112 addi a1, a1, -16 +40222def: ff4b21 l32r a2, 40222b1c +40222df2: 3109 s32i.n a0, a1, 12 +40222df4: 000222 l8ui a2, a2, 0 +40222df7: f236c5 call0 40215164 +40222dfa: f37c movi.n a3, -1 +40222dfc: 0c1266 bnei a2, 1, 40222e0c +40222dff: ff4821 l32r a2, 40222b20 +40222e02: 030c movi.n a3, 0 +40222e04: 000222 l8ui a2, a2, 0 +40222e07: 140c movi.n a4, 1 +40222e09: 833420 moveqz a3, a4, a2 +40222e0c: 3108 l32i.n a0, a1, 12 +40222e0e: 032d mov.n a2, a3 +40222e10: 10c112 addi a1, a1, 16 +40222e13: f00d ret.n +40222e15: 000000 ill +40222e18: 0c88 l32i.n a8, a12, 0 +40222e1a: 003ff2 excw +40222e1d: 8084a0 add a8, a4, a10 +40222e20: dfbff7 bgeu a15, a15, 40222e03 +40222e23: ff .byte 0xff +40222e24: f20c90 excw +40222e27: 3f .byte 0x3f +40222e28: 0e08 l32i.n a0, a14, 0 +40222e2a: 683ff2 excw +40222e2d: f20c movi.n a2, 15 +40222e2f: 3f .byte 0x3f +40222e30: 0c6c movi.n a12, -32 +40222e32: 003ff2 excw +40222e35: 000016 beqz a0, 40222e39 +40222e38: f20c14 excw +40222e3b: 3f .byte 0x3f + +40222e3c : +40222e3c: fff721 l32r a2, 40222e18 +40222e3f: fff731 l32r a3, 40222e1c +40222e42: 0020c0 memw +40222e45: 0248 l32i.n a4, a2, 0 +40222e47: 203430 or a3, a4, a3 +40222e4a: 0020c0 memw +40222e4d: 0239 s32i.n a3, a2, 0 +40222e4f: 0020c0 memw +40222e52: 0248 l32i.n a4, a2, 0 +40222e54: fff331 l32r a3, 40222e20 +40222e57: 103430 and a3, a4, a3 +40222e5a: 0020c0 memw +40222e5d: 0239 s32i.n a3, a2, 0 +40222e5f: fff131 l32r a3, 40222e24 +40222e62: 820c movi.n a2, 8 +40222e64: 0020c0 memw +40222e67: 0348 l32i.n a4, a3, 0 +40222e69: 202420 or a2, a4, a2 +40222e6c: 0020c0 memw +40222e6f: 0329 s32i.n a2, a3, 0 +40222e71: 890531 l32r a3, 40205288 +40222e74: 320c movi.n a2, 3 +40222e76: 0020c0 memw +40222e79: 0348 l32i.n a4, a3, 0 +40222e7b: 202420 or a2, a4, a2 +40222e7e: 0020c0 memw +40222e81: 0329 s32i.n a2, a3, 0 +40222e83: ffe931 l32r a3, 40222e28 +40222e86: 0faf22 movi a2, -241 +40222e89: 0020c0 memw +40222e8c: 0348 l32i.n a4, a3, 0 +40222e8e: 102420 and a2, a4, a2 +40222e91: ffe641 l32r a4, 40222e2c +40222e94: 0020c0 memw +40222e97: 0329 s32i.n a2, a3, 0 +40222e99: 0020c0 memw +40222e9c: 0458 l32i.n a5, a4, 0 +40222e9e: 0020c0 memw +40222ea1: 0428 l32i.n a2, a4, 0 +40222ea3: d98331 l32r a3, 402194b0 +40222ea6: f52020 extui a2, a2, 16, 16 +40222ea9: 12c222 addi a2, a2, 18 +40222eac: 742020 extui a2, a2, 0, 8 +40222eaf: 103530 and a3, a5, a3 +40222eb2: 112200 slli a2, a2, 16 +40222eb5: 202230 or a2, a2, a3 +40222eb8: 0020c0 memw +40222ebb: 0429 s32i.n a2, a4, 0 +40222ebd: ffdc21 l32r a2, 40222e30 +40222ec0: 00af32 movi a3, 0xffffff00 +40222ec3: 0020c0 memw +40222ec6: 0248 l32i.n a4, a2, 0 +40222ec8: 104430 and a4, a4, a3 +40222ecb: 631c movi.n a3, 22 +40222ecd: 203430 or a3, a4, a3 +40222ed0: 0020c0 memw +40222ed3: 0239 s32i.n a3, a2, 0 +40222ed5: 0020c0 memw +40222ed8: 0248 l32i.n a4, a2, 0 +40222eda: c54431 l32r a3, 402143ec +40222edd: 104430 and a4, a4, a3 +40222ee0: ffd531 l32r a3, 40222e34 +40222ee3: 203430 or a3, a4, a3 +40222ee6: 0020c0 memw +40222ee9: 0239 s32i.n a3, a2, 0 +40222eeb: ffd321 l32r a2, 40222e38 +40222eee: d50331 l32r a3, 402182fc +40222ef1: 0020c0 memw +40222ef4: 0248 l32i.n a4, a2, 0 +40222ef6: 104430 and a4, a4, a3 +40222ef9: f0a032 movi a3, 240 +40222efc: 203430 or a3, a4, a3 +40222eff: 0020c0 memw +40222f02: 0239 s32i.n a3, a2, 0 +40222f04: 0020c0 memw +40222f07: 0248 l32i.n a4, a2, 0 +40222f09: 7d1a31 l32r a3, 40202374 +40222f0c: 203430 or a3, a4, a3 +40222f0f: 0020c0 memw +40222f12: 0239 s32i.n a3, a2, 0 +40222f14: 0020c0 memw +40222f17: 0248 l32i.n a4, a2, 0 +40222f19: 7d1731 l32r a3, 40202378 +40222f1c: 203430 or a3, a4, a3 +40222f1f: 0020c0 memw +40222f22: 0239 s32i.n a3, a2, 0 +40222f24: f00d ret.n +40222f26: 580000 excw +40222f29: 3ff210 excw +40222f2c: 000000 ill +40222f2f: c4 .byte 0xc4 + +40222f30 : +40222f30: fffe31 l32r a3, 40222f28 +40222f33: fffe21 l32r a2, 40222f2c +40222f36: 0020c0 memw +40222f39: 0348 l32i.n a4, a3, 0 +40222f3b: 202420 or a2, a4, a2 +40222f3e: 0020c0 memw +40222f41: 0329 s32i.n a2, a3, 0 +40222f43: f00d ret.n +40222f45: 000000 ill +40222f48: ff .byte 0xff +40222f49: ff .byte 0xff +40222f4a: ff .byte 0xff +40222f4b: 3b .byte 0x3b + +40222f4c : +40222f4c: fff731 l32r a3, 40222f28 +40222f4f: fffe21 l32r a2, 40222f48 +40222f52: 0020c0 memw +40222f55: 0348 l32i.n a4, a3, 0 +40222f57: 102420 and a2, a4, a2 +40222f5a: 0020c0 memw +40222f5d: 0329 s32i.n a2, a3, 0 +40222f5f: f00d ret.n +40222f61: 000000 ill +40222f64: fe82a0 excw +40222f67: 3f .byte 0x3f + +40222f68 : +40222f68: ffff31 l32r a3, 40222f64 +40222f6b: 0329 s32i.n a2, a3, 0 +40222f6d: f00d ret.n +40222f6f: 9f7800 excw +40222f72: fe .byte 0xfe +40222f73: 3f .byte 0x3f +40222f74: 105c movi.n a0, 81 +40222f76: 603ff2 excw +40222f79: 3ff210 excw + +40222f7c : +40222f7c: f0c112 addi a1, a1, -16 +40222f7f: 036102 s32i a0, a1, 12 +40222f82: fffc85 call0 40222f4c +40222f85: fd9d05 call0 40220958 +40222f88: fffa31 l32r a3, 40222f70 +40222f8b: 00a022 movi a2, 0 +40222f8e: 006322 s32i a2, a3, 0 +40222f91: fff831 l32r a3, 40222f74 +40222f94: 0020c0 memw +40222f97: 0329 s32i.n a2, a3, 0 +40222f99: fff731 l32r a3, 40222f78 +40222f9c: 0020c0 memw +40222f9f: 0329 s32i.n a2, a3, 0 +40222fa1: fff8c5 call0 40222f30 +40222fa4: 3108 l32i.n a0, a1, 12 +40222fa6: 10c112 addi a1, a1, 16 +40222fa9: f00d ret.n +40222fab: 104800 and a4, a8, a0 +40222fae: f2 .byte 0xf2 +40222faf: 3f .byte 0x3f + +40222fb0 : +40222fb0: ffed21 l32r a2, 40222f64 +40222fb3: f0c112 addi a1, a1, -16 +40222fb6: 0238 l32i.n a3, a2, 0 +40222fb8: ffee41 l32r a4, 40222f70 +40222fbb: fffc61 l32r a6, 40222fac +40222fbe: 3109 s32i.n a0, a1, 12 +40222fc0: 0428 l32i.n a2, a4, 0 +40222fc2: 232a add.n a2, a3, a2 +40222fc4: 0429 s32i.n a2, a4, 0 +40222fc6: 0020c0 memw +40222fc9: 0658 l32i.n a5, a6, 0 +40222fcb: c02250 sub a2, a2, a5 +40222fce: ee3327 bltu a3, a2, 40222fc0 +40222fd1: e8a332 movi a3, 0x3e8 +40222fd4: 7bbe01 l32r a0, 40201ecc +40222fd7: 0000c0 callx0 a0 +40222fda: 3108 l32i.n a0, a1, 12 +40222fdc: 221b addi.n a2, a2, 1 +40222fde: 10c112 addi a1, a1, 16 +40222fe1: f00d ret.n +40222fe3: 040c00 extui a0, a0, 12, 1 +40222fe6: 003ff2 excw +40222fe9: 070b addi.n a0, a7, -1 +40222feb: 0c0700 excw +40222fee: 07 .byte 0x7 + ... + +40222ff0 : +40222ff0: 742020 extui a2, a2, 0, 8 +40222ff3: fffc31 l32r a3, 40222fe4 +40222ff6: 628c beqz.n a2, 40223000 +40222ff8: fffc21 l32r a2, 40222fe8 +40222ffb: 000106 j 40223003 +40222ffe: 210000 srai a0, a0, 0 +40223001: fffb addi.n a15, a15, 15 +40223003: 0020c0 memw +40223006: 0329 s32i.n a2, a3, 0 +40223008: f00d ret.n +4022300a: 480000 excw +4022300d: f20c movi.n a2, 15 +4022300f: 3f .byte 0x3f +40223010: 0c4c movi.n a12, 64 +40223012: 583ff2 excw +40223015: f20c movi.n a2, 15 +40223017: 3f .byte 0x3f +40223018: 0c5c movi.n a12, 80 +4022301a: 503ff2 excw +4022301d: f20c movi.n a2, 15 +4022301f: 3f .byte 0x3f +40223020: f20c54 excw +40223023: 3f .byte 0x3f +40223024: f20c60 excw +40223027: 3f .byte 0x3f +40223028: f20c64 excw +4022302b: 3f .byte 0x3f + +4022302c : +4022302c: 742020 extui a2, a2, 0, 8 +4022302f: 000342 l8ui a4, a3, 0 +40223032: 010352 l8ui a5, a3, 1 +40223035: 020372 l8ui a7, a3, 2 +40223038: 030362 l8ui a6, a3, 3 +4022303b: d2fc bnez.n a2, 4022307c +4022303d: 115580 slli a5, a5, 8 +40223040: 205540 or a5, a5, a4 +40223043: 114700 slli a4, a7, 16 +40223046: 202450 or a2, a4, a5 +40223049: 014680 slli a4, a6, 24 +4022304c: 204420 or a4, a4, a2 +4022304f: ffef21 l32r a2, 4022300c +40223052: 0020c0 memw +40223055: 0249 s32i.n a4, a2, 0 +40223057: 050322 l8ui a2, a3, 5 +4022305a: 040342 l8ui a4, a3, 4 +4022305d: 112280 slli a2, a2, 8 +40223060: ffec31 l32r a3, 40223010 +40223063: 202240 or a2, a2, a4 +40223066: 0020c0 memw +40223069: 0329 s32i.n a2, a3, 0 +4022306b: ffea21 l32r a2, 40223014 +4022306e: f37c movi.n a3, -1 +40223070: 0020c0 memw +40223073: 0239 s32i.n a3, a2, 0 +40223075: ffe821 l32r a2, 40223018 +40223078: 000ec6 j 402230b7 +4022307b: 258000 extui a8, a0, 16, 3 +4022307e: 424011 l32r a1, 401f3980 <_lit4_end+0xed654> +40223081: 270020 excw +40223084: 224011 l32r a1, 401eb984 <_lit4_end+0xe5658> +40223087: 468020 excw +4022308a: 442001 l32r a0, 401f410c <_lit4_end+0xedde0> +4022308d: e32120 excw +40223090: ff .byte 0xff +40223091: 0020c0 memw +40223094: 0249 s32i.n a4, a2, 0 +40223096: 050322 l8ui a2, a3, 5 +40223099: 040342 l8ui a4, a3, 4 +4022309c: 112280 slli a2, a2, 8 +4022309f: ffe031 l32r a3, 40223020 +402230a2: 202240 or a2, a2, a4 +402230a5: 0020c0 memw +402230a8: 0329 s32i.n a2, a3, 0 +402230aa: ffde21 l32r a2, 40223024 +402230ad: f37c movi.n a3, -1 +402230af: 0020c0 memw +402230b2: 0239 s32i.n a3, a2, 0 +402230b4: ffdd21 l32r a2, 40223028 +402230b7: 7bcd31 l32r a3, 40201fec +402230ba: 0020c0 memw +402230bd: 0239 s32i.n a3, a2, 0 +402230bf: 0020c0 memw +402230c2: 0248 l32i.n a4, a2, 0 +402230c4: 855831 l32r a3, 40204624 +402230c7: 203430 or a3, a4, a3 +402230ca: 0020c0 memw +402230cd: 0239 s32i.n a3, a2, 0 +402230cf: f00d ret.n +402230d1: 000000 ill + +402230d4 : +402230d4: 742020 extui a2, a2, 0, 8 +402230d7: 855331 l32r a3, 40204624 +402230da: 62cc bnez.n a2, 402230e4 +402230dc: ffcf21 l32r a2, 40223018 +402230df: 000106 j 402230e7 +402230e2: 210000 srai a0, a0, 0 +402230e5: c0ffd1 l32r a13, 402134e4 +402230e8: 480020 excw +402230eb: 343002 excw +402230ee: 20c020 or a12, a0, a2 +402230f1: 023900 excw +402230f4: f00d ret.n +402230f6: ff0000 excw +402230f9: ff .byte 0xff +402230fa: fe .byte 0xfe +402230fb: ff .byte 0xff + +402230fc : +402230fc: 742020 extui a2, a2, 0, 8 +402230ff: fffe31 l32r a3, 402230f8 +40223102: 62cc bnez.n a2, 4022310c +40223104: ffc521 l32r a2, 40223018 +40223107: 000106 j 4022310f +4022310a: 210000 srai a0, a0, 0 +4022310d: c0ffc7 bbsi a15, 28, 402230d1 +40223110: 480020 excw +40223113: 343002 excw +40223116: 20c010 or a12, a0, a1 +40223119: 023900 excw +4022311c: f00d ret.n +4022311e: 3c0000 excw +40223121: f20c movi.n a2, 15 +40223123: 3f .byte 0x3f +40223124: 0c28 l32i.n a2, a12, 0 +40223126: 2c3ff2 excw +40223129: f20c movi.n a2, 15 +4022312b: 3f .byte 0x3f +4022312c: 0c38 l32i.n a3, a12, 0 +4022312e: 443ff2 excw +40223131: f20c movi.n a2, 15 +40223133: 3f .byte 0x3f +40223134: f20c30 excw +40223137: 3f .byte 0x3f +40223138: f20c34 excw +4022313b: 3f .byte 0x3f +4022313c: f20c40 excw +4022313f: 3f .byte 0x3f + +40223140 : +40223140: 742020 extui a2, a2, 0, 8 +40223143: ffed41 l32r a4, 402230f8 +40223146: 051256 bnez a2, 4022319b +40223149: fff571 l32r a7, 40223120 +4022314c: 0020c0 memw +4022314f: 0728 l32i.n a2, a7, 0 +40223151: 104240 and a4, a2, a4 +40223154: 0020c0 memw +40223157: 0749 s32i.n a4, a7, 0 +40223159: 010342 l8ui a4, a3, 1 +4022315c: 000362 l8ui a6, a3, 0 +4022315f: 020322 l8ui a2, a3, 2 +40223162: 114480 slli a4, a4, 8 +40223165: 112200 slli a2, a2, 16 +40223168: 205460 or a5, a4, a6 +4022316b: 204250 or a4, a2, a5 +4022316e: 030322 l8ui a2, a3, 3 +40223171: 012280 slli a2, a2, 24 +40223174: 202240 or a2, a2, a4 +40223177: ffeb41 l32r a4, 40223124 +4022317a: 0020c0 memw +4022317d: 0429 s32i.n a2, a4, 0 +4022317f: 050322 l8ui a2, a3, 5 +40223182: 040342 l8ui a4, a3, 4 +40223185: 112280 slli a2, a2, 8 +40223188: ffe831 l32r a3, 40223128 +4022318b: 202240 or a2, a2, a4 +4022318e: 0020c0 memw +40223191: 0329 s32i.n a2, a3, 0 +40223193: f37c movi.n a3, -1 +40223195: ffe521 l32r a2, 4022312c +40223198: 001386 j 402231ea +4022319b: ffe571 l32r a7, 40223130 +4022319e: 0020c0 memw +402231a1: 0728 l32i.n a2, a7, 0 +402231a3: 104240 and a4, a2, a4 +402231a6: 0020c0 memw +402231a9: 0749 s32i.n a4, a7, 0 +402231ab: 010342 l8ui a4, a3, 1 +402231ae: 000362 l8ui a6, a3, 0 +402231b1: 020322 l8ui a2, a3, 2 +402231b4: 114480 slli a4, a4, 8 +402231b7: 112200 slli a2, a2, 16 +402231ba: 205460 or a5, a4, a6 +402231bd: 204250 or a4, a2, a5 +402231c0: 030322 l8ui a2, a3, 3 +402231c3: 012280 slli a2, a2, 24 +402231c6: 202240 or a2, a2, a4 +402231c9: ffda41 l32r a4, 40223134 +402231cc: 0020c0 memw +402231cf: 0429 s32i.n a2, a4, 0 +402231d1: 050322 l8ui a2, a3, 5 +402231d4: 040342 l8ui a4, a3, 4 +402231d7: 112280 slli a2, a2, 8 +402231da: ffd731 l32r a3, 40223138 +402231dd: 202240 or a2, a2, a4 +402231e0: 0020c0 memw +402231e3: 0329 s32i.n a2, a3, 0 +402231e5: ffd521 l32r a2, 4022313c +402231e8: f37c movi.n a3, -1 +402231ea: 0020c0 memw +402231ed: 0239 s32i.n a3, a2, 0 +402231ef: 7b7f21 l32r a2, 40201fec +402231f2: 0020c0 memw +402231f5: 0729 s32i.n a2, a7, 0 +402231f7: 0020c0 memw +402231fa: 0738 l32i.n a3, a7, 0 +402231fc: 850a21 l32r a2, 40204624 +402231ff: 202320 or a2, a3, a2 +40223202: 0020c0 memw +40223205: 0729 s32i.n a2, a7, 0 +40223207: f00d ret.n +40223209: 000000 ill + +4022320c : +4022320c: 742020 extui a2, a2, 0, 8 +4022320f: ffba31 l32r a3, 402230f8 +40223212: 62cc bnez.n a2, 4022321c +40223214: ffc321 l32r a2, 40223120 +40223217: 000106 j 4022321f +4022321a: 210000 srai a0, a0, 0 +4022321d: c0ffc5 call0 401e421c <_lit4_end+0xddef0> +40223220: 480020 excw +40223223: 343002 excw +40223226: 20c010 or a12, a0, a1 +40223229: 023900 excw +4022322c: f00d ret.n + ... + +40223230 : +40223230: f0c112 addi a1, a1, -16 +40223233: 025d mov.n a5, a2 +40223235: 3109 s32i.n a0, a1, 12 +40223237: 742030 extui a2, a3, 0, 8 +4022323a: 006556 bnez a5, 40223244 +4022323d: fffcc5 call0 4022320c +40223240: 000406 j 40223254 +40223243: 7d3100 excw +40223246: 267b addi.n a2, a6, 7 +40223248: 660615 excw +4022324b: 8c0625 excw +4022324e: 043d34 excw +40223251: ffeec5 call0 40223140 +40223254: 3108 l32i.n a0, a1, 12 +40223256: 10c112 addi a1, a1, 16 +40223259: f00d ret.n +4022325b: 080c00 excw +4022325e: 003ff2 excw +40223261: 3ff214 excw +40223264: f21404 excw +40223267: 3f .byte 0x3f + +40223268 : +40223268: d0c112 addi a1, a1, -48 +4022326b: 91d9 s32i.n a13, a1, 36 +4022326d: 02dd mov.n a13, a2 +4022326f: fffb21 l32r a2, 4022325c +40223272: 81e9 s32i.n a14, a1, 32 +40223274: 0020c0 memw +40223277: 02e8 l32i.n a14, a2, 0 +40223279: a1c9 s32i.n a12, a1, 40 +4022327b: 71f9 s32i.n a15, a1, 28 +4022327d: b109 s32i.n a0, a1, 44 +4022327f: 20f330 or a15, a3, a3 +40223282: 00a0c2 movi a12, 0 +40223285: 0bdec7 bbs a14, a12, 40223294 +40223288: cc1b addi.n a12, a12, 1 +4022328a: 921c movi.n a2, 25 +4022328c: f59c27 bne a12, a2, 40223285 +4022328f: 020c movi.n a2, 0 +40223291: 000f06 j 402232d1 +40223294: a02cc0 addx4 a2, a12, a12 +40223297: fff241 l32r a4, 40223260 +4022329a: 1132d0 slli a3, a2, 3 +4022329d: 234a add.n a2, a3, a4 +4022329f: 0020c0 memw +402232a2: 0228 l32i.n a2, a2, 0 +402232a4: 0129 s32i.n a2, a1, 0 +402232a6: ffef21 l32r a2, 40223264 +402232a9: 232a add.n a2, a3, a2 +402232ab: 0020c0 memw +402232ae: 0238 l32i.n a3, a2, 0 +402232b0: 0020c0 memw +402232b3: 0228 l32i.n a2, a2, 0 +402232b5: 025132 s16i a3, a1, 4 +402232b8: 152e20 extui a2, a2, 30, 2 +402232bb: c992f7 bne a2, a15, 40223288 +402232be: 640c movi.n a4, 6 +402232c0: 203110 or a3, a1, a1 +402232c3: 202dd0 or a2, a13, a13 +402232c6: 7a5501 l32r a0, 40201c1c +402232c9: 0000c0 callx0 a0 +402232cc: fb8256 bnez a2, 40223288 +402232cf: 120c movi.n a2, 1 +402232d1: b108 l32i.n a0, a1, 44 +402232d3: a1c8 l32i.n a12, a1, 40 +402232d5: 91d8 l32i.n a13, a1, 36 +402232d7: 81e8 l32i.n a14, a1, 32 +402232d9: 71f8 l32i.n a15, a1, 28 +402232db: 30c112 addi a1, a1, 48 +402232de: f00d ret.n +402232e0: 1408 l32i.n a0, a4, 4 +402232e2: f2 .byte 0xf2 +402232e3: 3f .byte 0x3f + +402232e4 : +402232e4: a06660 addx4 a6, a6, a6 +402232e7: ffde81 l32r a8, 40223260 +402232ea: 1166d0 slli a6, a6, 3 +402232ed: 868a add.n a8, a6, a8 +402232ef: 0020c0 memw +402232f2: 0898 l32i.n a9, a8, 0 +402232f4: ffdc81 l32r a8, 40223264 +402232f7: f0c112 addi a1, a1, -16 +402232fa: 868a add.n a8, a6, a8 +402232fc: 0020c0 memw +402232ff: 0888 l32i.n a8, a8, 0 +40223301: 3109 s32i.n a0, a1, 12 +40223303: 41a890 srli a10, a9, 8 +40223306: 004592 s8i a9, a5, 0 +40223309: 0145a2 s8i a10, a5, 1 +4022330c: f5a090 extui a10, a9, 16, 16 +4022330f: 759890 extui a9, a9, 24, 8 +40223312: 034592 s8i a9, a5, 3 +40223315: 419880 srli a9, a8, 8 +40223318: 044582 s8i a8, a5, 4 +4022331b: 0245a2 s8i a10, a5, 2 +4022331e: 054592 s8i a9, a5, 5 +40223321: 055880 extui a5, a8, 24, 1 +40223324: 004352 s8i a5, a3, 0 +40223327: 153e80 extui a3, a8, 30, 2 +4022332a: 0439 s32i.n a3, a4, 0 +4022332c: 253280 extui a3, a8, 18, 3 +4022332f: 158080 extui a8, a8, 16, 2 +40223332: 041866 bnei a8, 1, 4022333a +40223335: 011366 bnei a3, 1, 4022333a +40223338: 530c movi.n a3, 5 +4022333a: 0239 s32i.n a3, a2, 0 +4022333c: ffe931 l32r a3, 402232e0 +4022333f: 4148 l32i.n a4, a1, 16 +40223341: 363a add.n a3, a6, a3 +40223343: 202770 or a2, a7, a7 +40223346: 773301 l32r a0, 40201014 <_irom0_text_start+0x4> +40223349: 0000c0 callx0 a0 +4022334c: 3108 l32i.n a0, a1, 12 +4022334e: 020c movi.n a2, 0 +40223350: 10c112 addi a1, a1, 16 +40223353: f00d ret.n +40223355: 000000 ill +40223358: 140c movi.n a4, 1 +4022335a: 103ff2 excw +4022335d: 3ff214 excw +40223360: f21414 excw +40223363: 3f .byte 0x3f +40223364: 1418 l32i.n a1, a4, 4 +40223366: 1c3ff2 excw +40223369: 3ff214 excw +4022336c: f21420 excw +4022336f: 3f .byte 0x3f +40223370: f21424 excw +40223373: 3f .byte 0x3f + +40223374 : +40223374: ffba51 l32r a5, 4022325c +40223377: e37c movi.n a3, -2 +40223379: 0020c0 memw +4022337c: 0548 l32i.n a4, a5, 0 +4022337e: 401200 ssl a2 +40223381: 813330 src a3, a3, a3 +40223384: 103340 and a3, a3, a4 +40223387: a02220 addx4 a2, a2, a2 +4022338a: ffb541 l32r a4, 40223260 +4022338d: 1122d0 slli a2, a2, 3 +40223390: 0020c0 memw +40223393: 0539 s32i.n a3, a5, 0 +40223395: 424a add.n a4, a2, a4 +40223397: 030c movi.n a3, 0 +40223399: 0020c0 memw +4022339c: 0439 s32i.n a3, a4, 0 +4022339e: ffb141 l32r a4, 40223264 +402233a1: 424a add.n a4, a2, a4 +402233a3: 0020c0 memw +402233a6: 0439 s32i.n a3, a4, 0 +402233a8: ffce41 l32r a4, 402232e0 +402233ab: 424a add.n a4, a2, a4 +402233ad: 0020c0 memw +402233b0: 0439 s32i.n a3, a4, 0 +402233b2: ffe941 l32r a4, 40223358 +402233b5: 424a add.n a4, a2, a4 +402233b7: 0020c0 memw +402233ba: 0439 s32i.n a3, a4, 0 +402233bc: ffe841 l32r a4, 4022335c +402233bf: 424a add.n a4, a2, a4 +402233c1: 0020c0 memw +402233c4: 0439 s32i.n a3, a4, 0 +402233c6: ffe641 l32r a4, 40223360 +402233c9: 424a add.n a4, a2, a4 +402233cb: 0020c0 memw +402233ce: 0439 s32i.n a3, a4, 0 +402233d0: ffe541 l32r a4, 40223364 +402233d3: 424a add.n a4, a2, a4 +402233d5: 0020c0 memw +402233d8: 0439 s32i.n a3, a4, 0 +402233da: ffe341 l32r a4, 40223368 +402233dd: 424a add.n a4, a2, a4 +402233df: 0020c0 memw +402233e2: 0439 s32i.n a3, a4, 0 +402233e4: ffe241 l32r a4, 4022336c +402233e7: 424a add.n a4, a2, a4 +402233e9: 0020c0 memw +402233ec: 0439 s32i.n a3, a4, 0 +402233ee: ffe041 l32r a4, 40223370 +402233f1: 224a add.n a2, a2, a4 +402233f3: 0020c0 memw +402233f6: 0239 s32i.n a3, a2, 0 +402233f8: f00d ret.n +402233fa: 7c0000 excw +402233fd: 3ff214 excw + +40223400 : +40223400: c0c112 addi a1, a1, -64 +40223403: d1d9 s32i.n a13, a1, 52 +40223405: c1e9 s32i.n a14, a1, 48 +40223407: f109 s32i.n a0, a1, 60 +40223409: e1c9 s32i.n a12, a1, 56 +4022340b: b1f9 s32i.n a15, a1, 44 +4022340d: 74d020 extui a13, a2, 0, 8 +40223410: 74e030 extui a14, a3, 0, 8 +40223413: 020522 l8ui a2, a5, 2 +40223416: 030532 l8ui a3, a5, 3 +40223419: 112200 slli a2, a2, 16 +4022341c: 013380 slli a3, a3, 24 +4022341f: 332a add.n a3, a3, a2 +40223421: 010522 l8ui a2, a5, 1 +40223424: 050582 l8ui a8, a5, 5 +40223427: 112280 slli a2, a2, 8 +4022342a: 232a add.n a2, a3, a2 +4022342c: 000532 l8ui a3, a5, 0 +4022342f: 323a add.n a3, a2, a3 +40223431: 112880 slli a2, a8, 8 +40223434: 040582 l8ui a8, a5, 4 +40223437: 828a add.n a8, a2, a8 +40223439: 115d26 beqi a13, 5, 4022344e +4022343c: 050c movi.n a5, 0 +4022343e: 7c0c movi.n a12, 7 +40223440: 121d26 beqi a13, 1, 40223456 +40223443: 2c0c movi.n a12, 2 +40223445: 0d66e6 bgei a6, 6, 40223456 +40223448: 6c0c movi.n a12, 6 +4022344a: 000206 j 40223456 +4022344d: 150c00 extui a0, a0, 28, 2 +40223450: 20d550 or a13, a5, a5 +40223453: 07a0c2 movi a12, 7 +40223456: 1f0c movi.n a15, 1 +40223458: 012eb6 bltui a14, 2, 4022345d +4022345b: 0f0c movi.n a15, 0 +4022345d: 120c movi.n a2, 1 +4022345f: 0126e6 bgei a6, 2, 40223464 +40223462: 020c movi.n a2, 0 +40223464: 10ff20 and a15, a15, a2 +40223467: 74f0f0 extui a15, a15, 0, 8 +4022346a: 6f9c beqz.n a15, 40223484 +4022346c: 01a022 movi a2, 1 +4022346f: 401600 ssl a6 +40223472: a19200 sll a9, a2 +40223475: 79bb21 l32r a2, 40201b64 +40223478: 7d2222 l32i a2, a2, 0x1f4 +4022347b: 102920 and a2, a9, a2 +4022347e: 03a092 movi a9, 3 +40223481: 93c920 movnez a12, a9, a2 +40223484: 2c2666 bnei a6, 2, 402234b4 +40223487: ffdd21 l32r a2, 402233fc +4022348a: 0020c0 memw +4022348d: 0228 l32i.n a2, a2, 0 +4022348f: 152e20 extui a2, a2, 30, 2 +40223492: 1e9247 bne a2, a4, 402234b4 +40223495: 320c movi.n a2, 3 +40223497: 0139 s32i.n a3, a1, 0 +40223499: 3149 s32i.n a4, a1, 12 +4022349b: 2159 s32i.n a5, a1, 8 +4022349d: 4169 s32i.n a6, a1, 16 +4022349f: 5179 s32i.n a7, a1, 20 +402234a1: 1189 s32i.n a8, a1, 4 +402234a3: ffed05 call0 40223374 +402234a6: 1188 l32i.n a8, a1, 4 +402234a8: 5178 l32i.n a7, a1, 20 +402234aa: 4168 l32i.n a6, a1, 16 +402234ac: 2158 l32i.n a5, a1, 8 +402234ae: 032142 l32i a4, a1, 12 +402234b1: 002132 l32i a3, a1, 0 +402234b4: a02660 addx4 a2, a6, a6 +402234b7: ff6a91 l32r a9, 40223260 +402234ba: 1122d0 slli a2, a2, 3 +402234bd: 929a add.n a9, a2, a9 +402234bf: 0020c0 memw +402234c2: 0939 s32i.n a3, a9, 0 +402234c4: 0490e0 extui a9, a14, 0, 1 +402234c7: 019980 slli a9, a9, 24 +402234ca: 014420 slli a4, a4, 30 +402234cd: 494a add.n a4, a9, a4 +402234cf: 448a add.n a4, a4, a8 +402234d1: 115500 slli a5, a5, 16 +402234d4: 24d0d0 extui a13, a13, 0, 3 +402234d7: 545a add.n a5, a4, a5 +402234d9: ff6231 l32r a3, 40223264 +402234dc: 01dde0 slli a13, a13, 18 +402234df: d5da add.n a13, a5, a13 +402234e1: 01ccb0 slli a12, a12, 21 +402234e4: 323a add.n a3, a2, a3 +402234e6: ff5d51 l32r a5, 4022325c +402234e9: cdca add.n a12, a13, a12 +402234eb: 0020c0 memw +402234ee: 03c9 s32i.n a12, a3, 0 +402234f0: 0020c0 memw +402234f3: 0548 l32i.n a4, a5, 0 +402234f5: 130c movi.n a3, 1 +402234f7: 401600 ssl a6 +402234fa: a16300 sll a6, a3 +402234fd: 203460 or a3, a4, a6 +40223500: 0020c0 memw +40223503: 0539 s32i.n a3, a5, 0 +40223505: ff8c beqz.n a15, 40223518 +40223507: f54731 l32r a3, 40220a24 +4022350a: eecb addi.n a14, a14, 12 +4022350c: a0ee30 addx4 a14, a14, a3 +4022350f: 022e32 l32i a3, a14, 8 +40223512: 206360 or a6, a3, a6 +40223515: 026e62 s32i a6, a14, 8 +40223518: ff7251 l32r a5, 402232e0 +4022351b: 102142 l32i a4, a1, 64 +4022351e: 073d mov.n a3, a7 +40223520: 225a add.n a2, a2, a5 +40223522: 76bc01 l32r a0, 40201014 <_irom0_text_start+0x4> +40223525: 0000c0 callx0 a0 +40223528: f108 l32i.n a0, a1, 60 +4022352a: e1c8 l32i.n a12, a1, 56 +4022352c: d1d8 l32i.n a13, a1, 52 +4022352e: c1e8 l32i.n a14, a1, 48 +40223530: b1f8 l32i.n a15, a1, 44 +40223532: 40c112 addi a1, a1, 64 +40223535: f00d ret.n +40223537: 0c1800 excw +4022353a: 243ff2 excw +4022353d: f20c movi.n a2, 15 +4022353f: 3f .byte 0x3f +40223540: f20800 excw +40223543: 3f .byte 0x3f +40223544: f20804 excw +40223547: 3f .byte 0x3f +40223548: 0808 l32i.n a0, a8, 0 +4022354a: 983ff2 excw +4022354d: 000025 excw +40223550: fea750 excw +40223553: 3f .byte 0x3f +40223554: cce8 l32i.n a14, a12, 48 +40223556: fe .byte 0xfe +40223557: 3f .byte 0x3f +40223558: fedef0 excw +4022355b: 3f .byte 0x3f +4022355c: deec bnez.n a14, 4022358d +4022355e: fe .byte 0xfe +4022355f: 3f .byte 0x3f +40223560: ef .byte 0xef +40223561: be .byte 0xbe +40223562: dead excw +40223564: 9f7c movi.n a15, -7 +40223566: fe .byte 0xfe +40223567: 3f .byte 0x3f +40223568: 9f9c beqz.n a15, 40223585 +4022356a: fe .byte 0xfe +4022356b: 3f .byte 0x3f +4022356c: fedf10 excw +4022356f: 3f .byte 0x3f +40223570: df0c movi.n a15, 13 +40223572: fe .byte 0xfe +40223573: 3f .byte 0x3f +40223574: df08 l32i.n a0, a15, 52 +40223576: fe .byte 0xfe +40223577: 3f .byte 0x3f +40223578: 9ffc bnez.n a15, 402235b5 +4022357a: fe .byte 0xfe +4022357b: 3f .byte 0x3f +4022357c: a6fc bnez.n a6, 402235ba +4022357e: fe .byte 0xfe +4022357f: 3f .byte 0x3f +40223580: df18 l32i.n a1, a15, 52 +40223582: fe .byte 0xfe +40223583: 3f .byte 0x3f +40223584: fedf14 excw +40223587: 3f .byte 0x3f +40223588: f20080 excw +4022358b: 3f .byte 0x3f +4022358c: 007c movi.n a0, -16 +4022358e: 883ff2 excw +40223591: 3ff200 excw +40223594: f20084 excw +40223597: 3f .byte 0x3f +40223598: f20000 excw +4022359b: 3f .byte 0x3f +4022359c: 0008 l32i.n a0, a0, 0 +4022359e: fc3ff2 excw +402235a1: de .byte 0xde +402235a2: fe .byte 0xfe +402235a3: 3f .byte 0x3f +402235a4: 000c movi.n a0, 0 +402235a6: 103ff2 excw +402235a9: 3ff200 excw +402235ac: f20400 excw +402235af: 3f .byte 0x3f +402235b0: 503210 ritlb0 a1, a2 +402235b3: 040476 excw +402235b6: bb3ff2 excw +402235b9: bbbb addi.n a11, a11, 11 +402235bb: 08bb addi.n a0, a8, 11 +402235bd: 3ff204 excw +402235c0: 9f0300 excw +402235c3: 782c movi.n a8, 39 +402235c5: 3ff201 l32r a0, 401f3590 <_lit4_end+0xed264> +402235c8: f20004 excw +402235cb: 3f .byte 0x3f +402235cc: fecd30 excw +402235cf: 3f .byte 0x3f +402235d0: 004f40 break 15, 4 +402235d3: 40 .byte 0x40 + +402235d4 : +402235d4: c0c112 addi a1, a1, -64 +402235d7: ffd821 l32r a2, 40223538 +402235da: f109 s32i.n a0, a1, 60 +402235dc: e1c9 s32i.n a12, a1, 56 +402235de: d1d9 s32i.n a13, a1, 52 +402235e0: 0c0c movi.n a12, 0 +402235e2: c1e9 s32i.n a14, a1, 48 +402235e4: b1f9 s32i.n a15, a1, 44 +402235e6: 0020c0 memw +402235e9: 02c9 s32i.n a12, a2, 0 +402235eb: ffd421 l32r a2, 4022353c +402235ee: f37c movi.n a3, -1 +402235f0: 0020c0 memw +402235f3: 0239 s32i.n a3, a2, 0 +402235f5: ff8445 call0 40222e3c +402235f8: cffb21 l32r a2, 402175e4 +402235fb: ffd131 l32r a3, 40223540 +402235fe: 7a8ed1 l32r a13, 40202038 +40223601: 0020c0 memw +40223604: 0329 s32i.n a2, a3, 0 +40223606: ffcf31 l32r a3, 40223544 +40223609: 6e0c movi.n a14, 6 +4022360b: 0020c0 memw +4022360e: 0329 s32i.n a2, a3, 0 +40223610: 0d7d mov.n a7, a13 +40223612: 0c6d mov.n a6, a12 +40223614: 0d5d mov.n a5, a13 +40223616: 0c4d mov.n a4, a12 +40223618: 0c3d mov.n a3, a12 +4022361a: 01e9 s32i.n a14, a1, 0 +4022361c: 320c movi.n a2, 3 +4022361e: ffde05 call0 40223400 +40223621: 160c movi.n a6, 1 +40223623: 0d7d mov.n a7, a13 +40223625: 0d5d mov.n a5, a13 +40223627: 0c4d mov.n a4, a12 +40223629: 063d mov.n a3, a6 +4022362b: 0061e2 s32i a14, a1, 0 +4022362e: 03a022 movi a2, 3 +40223631: ffdcc5 call0 40223400 +40223634: ffc521 l32r a2, 40223548 +40223637: ffc6d1 l32r a13, 40223550 +4022363a: 0020c0 memw +4022363d: 02c9 s32i.n a12, a2, 0 +4022363f: ffc621 l32r a2, 40223558 +40223642: ffc4c1 l32r a12, 40223554 +40223645: 1129 s32i.n a2, a1, 4 +40223647: ffc521 l32r a2, 4022355c +4022364a: ffc051 l32r a5, 4022354c +4022364d: 0129 s32i.n a2, a1, 0 +4022364f: 170c movi.n a7, 1 +40223651: 44a662 movi a6, 0x644 +40223654: 834c movi.n a3, 72 +40223656: 0c2d mov.n a2, a12 +40223658: 0d4d mov.n a4, a13 +4022365a: ffdd01 l32r a0, 402235d0 +4022365d: 0000c0 callx0 a0 +40223660: f4f121 l32r a2, 40220a24 +40223663: d32671 l32r a7, 402182fc +40223666: 2238 l32i.n a3, a2, 8 +40223668: 7b46a1 l32r a10, 40202380 +4022366b: ffbd61 l32r a6, 40223560 +4022366e: 0052e2 s16i a14, a2, 0 +40223671: 0c9d mov.n a9, a12 +40223673: 0ded mov.n a14, a13 +40223675: 04f316 beqz a3, 402236c8 +40223678: 0020c0 memw +4022367b: 0358 l32i.n a5, a3, 0 +4022367d: b45050 extui a5, a5, 0, 12 +40223680: fcc552 addi a5, a5, -4 +40223683: b42050 extui a2, a5, 0, 12 +40223686: 0020c0 memw +40223689: 0358 l32i.n a5, a3, 0 +4022368b: 105570 and a5, a5, a7 +4022368e: 205520 or a5, a5, a2 +40223691: 0020c0 memw +40223694: 0359 s32i.n a5, a3, 0 +40223696: 0020c0 memw +40223699: 0328 l32i.n a2, a3, 0 +4022369b: b42020 extui a2, a2, 0, 12 +4022369e: 114240 slli a4, a2, 12 +402236a1: 0020c0 memw +402236a4: 0328 l32i.n a2, a3, 0 +402236a6: 1022a0 and a2, a2, a10 +402236a9: 202240 or a2, a2, a4 +402236ac: 1348 l32i.n a4, a3, 4 +402236ae: 0020c0 memw +402236b1: 0329 s32i.n a2, a3, 0 +402236b3: 0469 s32i.n a6, a4, 0 +402236b5: 0020c0 memw +402236b8: 0328 l32i.n a2, a3, 0 +402236ba: b42020 extui a2, a2, 0, 12 +402236bd: 242a add.n a2, a4, a2 +402236bf: 0269 s32i.n a6, a2, 0 +402236c1: 2338 l32i.n a3, a3, 8 +402236c3: ffeb86 j 40223675 +402236c6: 210000 srai a0, a0, 0 +402236c9: ffa9 s32i.n a10, a15, 60 +402236cb: ffa641 l32r a4, 40223564 +402236ce: 1129 s32i.n a2, a1, 4 +402236d0: ffa821 l32r a2, 40223570 +402236d3: 070c movi.n a7, 0 +402236d5: 0129 s32i.n a2, a1, 0 +402236d7: ffa421 l32r a2, 40223568 +402236da: 460c movi.n a6, 4 +402236dc: 052c movi.n a5, 32 +402236de: 60a032 movi a3, 96 +402236e1: 4199 s32i.n a9, a1, 16 +402236e3: ffbb01 l32r a0, 402235d0 +402236e6: 0000c0 callx0 a0 +402236e9: ffa221 l32r a2, 40223574 +402236ec: f4cec1 l32r a12, 40220a24 +402236ef: 0f0c movi.n a15, 0 +402236f1: 0020c0 memw +402236f4: 6c38 l32i.n a3, a12, 24 +402236f6: 7c29 s32i.n a2, a12, 28 +402236f8: d30121 l32r a2, 402182fc +402236fb: 0d0c movi.n a13, 0 +402236fd: 103320 and a3, a3, a2 +40223700: 420c movi.n a2, 4 +40223702: 202320 or a2, a3, a2 +40223705: 0020c0 memw +40223708: 6c29 s32i.n a2, a12, 24 +4022370a: 0020c0 memw +4022370d: 6c38 l32i.n a3, a12, 24 +4022370f: 7b1921 l32r a2, 40202374 +40223712: 015cd2 s16i a13, a12, 2 +40223715: 202320 or a2, a3, a2 +40223718: 0020c0 memw +4022371b: 6c29 s32i.n a2, a12, 24 +4022371d: 0020c0 memw +40223720: 6c38 l32i.n a3, a12, 24 +40223722: d36a21 l32r a2, 402184cc +40223725: 8cf9 s32i.n a15, a12, 32 +40223727: 102320 and a2, a3, a2 +4022372a: 0020c0 memw +4022372d: 6c29 s32i.n a2, a12, 24 +4022372f: 0020c0 memw +40223732: 6c28 l32i.n a2, a12, 24 +40223734: 7b1231 l32r a3, 4020237c +40223737: ff9041 l32r a4, 40223578 +4022373a: 102230 and a2, a2, a3 +4022373d: 0020c0 memw +40223740: 6c29 s32i.n a2, a12, 24 +40223742: ff8f21 l32r a2, 40223580 +40223745: 170c movi.n a7, 1 +40223747: 1129 s32i.n a2, a1, 4 +40223749: ff8e21 l32r a2, 40223584 +4022374c: 00a162 movi a6, 0x100 +4022374f: 0129 s32i.n a2, a1, 0 +40223751: ff8a21 l32r a2, 4022357c +40223754: 00a752 movi a5, 0x700 +40223757: 54a032 movi a3, 84 +4022375a: ff9d01 l32r a0, 402235d0 +4022375d: 0000c0 callx0 a0 +40223760: 720c movi.n a2, 7 +40223762: 044c22 s8i a2, a12, 4 +40223765: 4198 l32i.n a9, a1, 16 +40223767: ff8821 l32r a2, 40223588 +4022376a: ff8441 l32r a4, 4022357c +4022376d: 0020c0 memw +40223770: 0299 s32i.n a9, a2, 0 +40223772: ff7621 l32r a2, 4022354c +40223775: 00af32 movi a3, 0xffffff00 +40223778: 8e2a add.n a8, a14, a2 +4022377a: ff8421 l32r a2, 4022358c +4022377d: 0020c0 memw +40223780: 0289 s32i.n a8, a2, 0 +40223782: ff8321 l32r a2, 40223590 +40223785: 0020c0 memw +40223788: 0249 s32i.n a4, a2, 0 +4022378a: ff7b21 l32r a2, 40223578 +4022378d: 07d2e2 addmi a14, a2, 0x700 +40223790: ff8121 l32r a2, 40223594 +40223793: 0020c0 memw +40223796: 02e9 s32i.n a14, a2, 0 +40223798: ff8021 l32r a2, 40223598 +4022379b: 0020c0 memw +4022379e: 0248 l32i.n a4, a2, 0 +402237a0: 103430 and a3, a4, a3 +402237a3: 0020c0 memw +402237a6: 0239 s32i.n a3, a2, 0 +402237a8: 2c48 l32i.n a4, a12, 8 +402237aa: ff7c31 l32r a3, 4022359c +402237ad: 0020c0 memw +402237b0: 0349 s32i.n a4, a3, 0 +402237b2: ff7c31 l32r a3, 402235a4 +402237b5: ff7a41 l32r a4, 402235a0 +402237b8: 0020c0 memw +402237bb: 0349 s32i.n a4, a3, 0 +402237bd: ff7a31 l32r a3, 402235a8 +402237c0: 054cd2 s8i a13, a12, 5 +402237c3: 0020c0 memw +402237c6: 03f9 s32i.n a15, a3, 0 +402237c8: 0020c0 memw +402237cb: 0238 l32i.n a3, a2, 0 +402237cd: 7aeb41 l32r a4, 4020237c +402237d0: 10d340 and a13, a3, a4 +402237d3: 0020c0 memw +402237d6: 02d9 s32i.n a13, a2, 0 +402237d8: ff7631 l32r a3, 402235b0 +402237db: ff7421 l32r a2, 402235ac +402237de: 0020c0 memw +402237e1: 0239 s32i.n a3, a2, 0 +402237e3: ff7521 l32r a2, 402235b8 +402237e6: ff7331 l32r a3, 402235b4 +402237e9: 0020c0 memw +402237ec: 0329 s32i.n a2, a3, 0 +402237ee: ff7331 l32r a3, 402235bc +402237f1: 0020c0 memw +402237f4: 0329 s32i.n a2, a3, 0 +402237f6: 78dc21 l32r a2, 40201b68 +402237f9: 07a732 movi a3, 0x707 +402237fc: 0020c0 memw +402237ff: 0248 l32i.n a4, a2, 0 +40223801: 203430 or a3, a4, a3 +40223804: 0020c0 memw +40223807: 0239 s32i.n a3, a2, 0 +40223809: 0020c0 memw +4022380c: 0248 l32i.n a4, a2, 0 +4022380e: f36c movi.n a3, -17 +40223810: 103430 and a3, a4, a3 +40223813: 0020c0 memw +40223816: 0239 s32i.n a3, a2, 0 +40223818: 0020c0 memw +4022381b: 0248 l32i.n a4, a2, 0 +4022381d: 81d231 l32r a3, 40203f68 +40223820: 103430 and a3, a4, a3 +40223823: 0020c0 memw +40223826: 0239 s32i.n a3, a2, 0 +40223828: 0f2d mov.n a2, a15 +4022382a: ff9e05 call0 4022320c +4022382d: 120c movi.n a2, 1 +4022382f: ff9dc5 call0 4022320c +40223832: ff6331 l32r a3, 402235c0 +40223835: ff4021 l32r a2, 40223538 +40223838: 0020c0 memw +4022383b: 0239 s32i.n a3, a2, 0 +4022383d: ff6131 l32r a3, 402235c4 +40223840: 220c movi.n a2, 2 +40223842: 0020c0 memw +40223845: 0348 l32i.n a4, a3, 0 +40223847: 202420 or a2, a4, a2 +4022384a: 0020c0 memw +4022384d: 0329 s32i.n a2, a3, 0 +4022384f: ff5e31 l32r a3, 402235c8 +40223852: d5ed21 l32r a2, 40219008 +40223855: 0020c0 memw +40223858: 0348 l32i.n a4, a3, 0 +4022385a: 102420 and a2, a4, a2 +4022385d: 0020c0 memw +40223860: 0329 s32i.n a2, a3, 0 +40223862: ff5a21 l32r a2, 402235cc +40223865: 130c movi.n a3, 1 +40223867: 004232 s8i a3, a2, 0 +4022386a: f108 l32i.n a0, a1, 60 +4022386c: e1c8 l32i.n a12, a1, 56 +4022386e: d1d8 l32i.n a13, a1, 52 +40223870: c1e8 l32i.n a14, a1, 48 +40223872: b1f8 l32i.n a15, a1, 44 +40223874: 40c112 addi a1, a1, 64 +40223877: f00d ret.n +40223879: 000000 ill + +4022387c : +4022387c: 78ba31 l32r a3, 40201b64 +4022387f: f0c112 addi a1, a1, -16 +40223882: 7d2332 l32i a3, a3, 0x1f4 +40223885: 11d9 s32i.n a13, a1, 4 +40223887: fd7c movi.n a13, -1 +40223889: 30dd30 xor a13, a13, a3 +4022388c: f46631 l32r a3, 40220a24 +4022388f: 742020 extui a2, a2, 0, 8 +40223892: a02230 addx4 a2, a2, a3 +40223895: e228 l32i.n a2, a2, 56 +40223897: 21c9 s32i.n a12, a1, 8 +40223899: 01e9 s32i.n a14, a1, 0 +4022389b: 3109 s32i.n a0, a1, 12 +4022389d: 10dd20 and a13, a13, a2 +402238a0: 0c0c movi.n a12, 0 +402238a2: 9e1c movi.n a14, 25 +402238a4: 045dc7 bbc a13, a12, 402238ac +402238a7: 0c2d mov.n a2, a12 +402238a9: ffac85 call0 40223374 +402238ac: cc1b addi.n a12, a12, 1 +402238ae: f29ce7 bne a12, a14, 402238a4 +402238b1: 3108 l32i.n a0, a1, 12 +402238b3: 21c8 l32i.n a12, a1, 8 +402238b5: 11d8 l32i.n a13, a1, 4 +402238b7: 01e8 l32i.n a14, a1, 0 +402238b9: 10c112 addi a1, a1, 16 +402238bc: f00d ret.n +402238be: 030000 excw +402238c1: 000303 excw + +402238c4 : +402238c4: 742020 extui a2, a2, 0, 8 +402238c7: 743030 extui a3, a3, 0, 8 +402238ca: fffd51 l32r a5, 402238c0 +402238cd: b47c movi.n a4, -5 +402238cf: 52cc bnez.n a2, 402238d8 +402238d1: ff1b21 l32r a2, 40223540 +402238d4: 0000c6 j 402238db +402238d7: 1b2100 excw +402238da: ff .byte 0xff +402238db: 0020c0 memw +402238de: 0259 s32i.n a5, a2, 0 +402238e0: 104340 and a4, a3, a4 +402238e3: 0f1466 bnei a4, 1, 402238f6 +402238e6: 0020c0 memw +402238e9: 0248 l32i.n a4, a2, 0 +402238eb: cb4b31 l32r a3, 40216618 +402238ee: 203430 or a3, a4, a3 +402238f1: 0020c0 memw +402238f4: 0239 s32i.n a3, a2, 0 +402238f6: f00d ret.n + +402238f8 : +402238f8: f44b31 l32r a3, 40220a24 +402238fb: 742020 extui a2, a2, 0, 8 +402238fe: a03230 addx4 a3, a2, a3 +40223901: e348 l32i.n a4, a3, 56 +40223903: cf3831 l32r a3, 402175e4 +40223906: 42cc bnez.n a2, 4022390e +40223908: ff0e21 l32r a2, 40223540 +4022390b: 000086 j 40223911 +4022390e: ff0d21 l32r a2, 40223544 +40223911: fe5251 l32r a5, 4022325c +40223914: 0020c0 memw +40223917: 0239 s32i.n a3, a2, 0 +40223919: 0020c0 memw +4022391c: 0538 l32i.n a3, a5, 0 +4022391e: f27c movi.n a2, -1 +40223920: 302240 xor a2, a2, a4 +40223923: 102230 and a2, a2, a3 +40223926: 0020c0 memw +40223929: 0529 s32i.n a2, a5, 0 +4022392b: f00d ret.n +4022392d: 000000 ill + +40223930 : +40223930: ff2631 l32r a3, 402235c8 +40223933: 7a9021 l32r a2, 40202374 +40223936: 0020c0 memw +40223939: 0348 l32i.n a4, a3, 0 +4022393b: 202420 or a2, a4, a2 +4022393e: 0020c0 memw +40223941: 0329 s32i.n a2, a3, 0 +40223943: ff2221 l32r a2, 402235cc +40223946: 030c movi.n a3, 0 +40223948: 004232 s8i a3, a2, 0 +4022394b: f00d ret.n +4022394d: 000000 ill +40223950: 000000 ill +40223953: 9d4403 excw +40223956: ff6000 excw +40223959: ff .byte 0xff +4022395a: ff .byte 0xff +4022395b: db .byte 0xdb + +4022395c : +4022395c: f0c112 addi a1, a1, -16 +4022395f: f43121 l32r a2, 40220a24 +40223962: 3109 s32i.n a0, a1, 12 +40223964: 130c movi.n a3, 1 +40223966: 054232 s8i a3, a2, 5 +40223969: c238 l32i.n a3, a2, 48 +4022396b: ff0e21 l32r a2, 402235a4 +4022396e: 0020c0 memw +40223971: 0239 s32i.n a3, a2, 0 +40223973: fd2931 l32r a3, 40222e18 +40223976: 92e721 l32r a2, 40208514 +40223979: 0020c0 memw +4022397c: 0348 l32i.n a4, a3, 0 +4022397e: 202420 or a2, a4, a2 +40223981: 0020c0 memw +40223984: 0329 s32i.n a2, a3, 0 +40223986: feee21 l32r a2, 40223540 +40223989: fff141 l32r a4, 40223950 +4022398c: 0020c0 memw +4022398f: 0238 l32i.n a3, a2, 0 +40223991: 203340 or a3, a3, a4 +40223994: 0020c0 memw +40223997: 0239 s32i.n a3, a2, 0 +40223999: 0020c0 memw +4022399c: 0258 l32i.n a5, a2, 0 +4022399e: fdd631 l32r a3, 402230f8 +402239a1: 105530 and a5, a5, a3 +402239a4: 0020c0 memw +402239a7: 0259 s32i.n a5, a2, 0 +402239a9: fee621 l32r a2, 40223544 +402239ac: 0020c0 memw +402239af: 0258 l32i.n a5, a2, 0 +402239b1: 204540 or a4, a5, a4 +402239b4: 0020c0 memw +402239b7: 0249 s32i.n a4, a2, 0 +402239b9: 0020c0 memw +402239bc: 0248 l32i.n a4, a2, 0 +402239be: 103430 and a3, a4, a3 +402239c1: 0020c0 memw +402239c4: 0239 s32i.n a3, a2, 0 +402239c6: fd9321 l32r a2, 40223014 +402239c9: 030c movi.n a3, 0 +402239cb: 0020c0 memw +402239ce: 0239 s32i.n a3, a2, 0 +402239d0: fd9241 l32r a4, 40223018 +402239d3: 831421 l32r a2, 40204624 +402239d6: 0020c0 memw +402239d9: 0429 s32i.n a2, a4, 0 +402239db: fdd441 l32r a4, 4022312c +402239de: 0020c0 memw +402239e1: 0439 s32i.n a3, a4, 0 +402239e3: fdcf31 l32r a3, 40223120 +402239e6: 0020c0 memw +402239e9: 0329 s32i.n a2, a3, 0 +402239eb: fed331 l32r a3, 40223538 +402239ee: c20c movi.n a2, 12 +402239f0: 0020c0 memw +402239f3: 0348 l32i.n a4, a3, 0 +402239f5: 202420 or a2, a4, a2 +402239f8: 0020c0 memw +402239fb: 0329 s32i.n a2, a3, 0 +402239fd: ffd531 l32r a3, 40223954 +40223a00: ffd621 l32r a2, 40223958 +40223a03: 0020c0 memw +40223a06: 0348 l32i.n a4, a3, 0 +40223a08: 102420 and a2, a4, a2 +40223a0b: 0020c0 memw +40223a0e: 0329 s32i.n a2, a3, 0 +40223a10: 861d21 l32r a2, 40205284 +40223a13: 862201 l32r a0, 4020529c +40223a16: 0000c0 callx0 a0 +40223a19: 861b31 l32r a3, 40205288 +40223a1c: e27c movi.n a2, -2 +40223a1e: 0020c0 memw +40223a21: 0348 l32i.n a4, a3, 0 +40223a23: 3108 l32i.n a0, a1, 12 +40223a25: 102420 and a2, a4, a2 +40223a28: 0020c0 memw +40223a2b: 0329 s32i.n a2, a3, 0 +40223a2d: 10c112 addi a1, a1, 16 +40223a30: f00d ret.n + ... + +40223a34 : +40223a34: 784d31 l32r a3, 40201b68 +40223a37: f0c112 addi a1, a1, -16 +40223a3a: 0020c0 memw +40223a3d: 0358 l32i.n a5, a3, 0 +40223a3f: 140c movi.n a4, 1 +40223a41: 3109 s32i.n a0, a1, 12 +40223a43: 204540 or a4, a5, a4 +40223a46: 0020c0 memw +40223a49: 0349 s32i.n a4, a3, 0 +40223a4b: 0020c0 memw +40223a4e: 0358 l32i.n a5, a3, 0 +40223a50: 240c movi.n a4, 2 +40223a52: 204540 or a4, a5, a4 +40223a55: 0020c0 memw +40223a58: 0349 s32i.n a4, a3, 0 +40223a5a: 0020c0 memw +40223a5d: 0358 l32i.n a5, a3, 0 +40223a5f: 440c movi.n a4, 4 +40223a61: 204540 or a4, a5, a4 +40223a64: 0020c0 memw +40223a67: 0349 s32i.n a4, a3, 0 +40223a69: 023d mov.n a3, a2 +40223a6b: 020c movi.n a2, 0 +40223a6d: ff5bc5 call0 4022302c +40223a70: 3108 l32i.n a0, a1, 12 +40223a72: 10c112 addi a1, a1, 16 +40223a75: f00d ret.n +40223a77: 000000 ill +40223a7a: ff2400 excw +40223a7d: ff .byte 0xff +40223a7e: ff0001 l32r a0, 40223680 +40223a81: ff .byte 0xff +40223a82: fffb addi.n a15, a15, 15 + +40223a84 : +40223a84: f3e821 l32r a2, 40220a24 +40223a87: 050232 l8ui a3, a2, 5 +40223a8a: 0c2316 beqz a3, 40223b50 +40223a8d: 85fe41 l32r a4, 40205288 +40223a90: 130c movi.n a3, 1 +40223a92: 0020c0 memw +40223a95: 0458 l32i.n a5, a4, 0 +40223a97: 203530 or a3, a5, a3 +40223a9a: 0020c0 memw +40223a9d: 0439 s32i.n a3, a4, 0 +40223a9f: ffad41 l32r a4, 40223954 +40223aa2: fff531 l32r a3, 40223a78 +40223aa5: 0020c0 memw +40223aa8: 0458 l32i.n a5, a4, 0 +40223aaa: 203530 or a3, a5, a3 +40223aad: 0020c0 memw +40223ab0: 0439 s32i.n a3, a4, 0 +40223ab2: fea141 l32r a4, 40223538 +40223ab5: 337c movi.n a3, -13 +40223ab7: 0020c0 memw +40223aba: 0458 l32i.n a5, a4, 0 +40223abc: 103530 and a3, a5, a3 +40223abf: 0020c0 memw +40223ac2: 0439 s32i.n a3, a4, 0 +40223ac4: fd5441 l32r a4, 40223014 +40223ac7: f37c movi.n a3, -1 +40223ac9: 0020c0 memw +40223acc: 0439 s32i.n a3, a4, 0 +40223ace: ffeb51 l32r a5, 40223a7c +40223ad1: fd5141 l32r a4, 40223018 +40223ad4: 0020c0 memw +40223ad7: 0459 s32i.n a5, a4, 0 +40223ad9: fd9441 l32r a4, 4022312c +40223adc: e67851 l32r a5, 4021d4bc +40223adf: 0020c0 memw +40223ae2: 0439 s32i.n a3, a4, 0 +40223ae4: 794241 l32r a4, 40201fec +40223ae7: fd8e31 l32r a3, 40223120 +40223aea: 0020c0 memw +40223aed: 0349 s32i.n a4, a3, 0 +40223aef: fe9431 l32r a3, 40223540 +40223af2: 0020c0 memw +40223af5: 0348 l32i.n a4, a3, 0 +40223af7: 104450 and a4, a4, a5 +40223afa: 0020c0 memw +40223afd: 0349 s32i.n a4, a3, 0 +40223aff: 0020c0 memw +40223b02: 0368 l32i.n a6, a3, 0 +40223b04: 82c841 l32r a4, 40204624 +40223b07: 206640 or a6, a6, a4 +40223b0a: 0020c0 memw +40223b0d: 0369 s32i.n a6, a3, 0 +40223b0f: fe8d31 l32r a3, 40223544 +40223b12: 0020c0 memw +40223b15: 0368 l32i.n a6, a3, 0 +40223b17: 105650 and a5, a6, a5 +40223b1a: 0020c0 memw +40223b1d: 0359 s32i.n a5, a3, 0 +40223b1f: 0020c0 memw +40223b22: 0358 l32i.n a5, a3, 0 +40223b24: 204540 or a4, a5, a4 +40223b27: 0020c0 memw +40223b2a: 0349 s32i.n a4, a3, 0 +40223b2c: fcbb41 l32r a4, 40222e18 +40223b2f: ffd431 l32r a3, 40223a80 +40223b32: 0020c0 memw +40223b35: 0458 l32i.n a5, a4, 0 +40223b37: 103530 and a3, a5, a3 +40223b3a: 0020c0 memw +40223b3d: 0439 s32i.n a3, a4, 0 +40223b3f: fe9931 l32r a3, 402235a4 +40223b42: fe9741 l32r a4, 402235a0 +40223b45: 0020c0 memw +40223b48: 0349 s32i.n a4, a3, 0 +40223b4a: 00a032 movi a3, 0 +40223b4d: 054232 s8i a3, a2, 5 +40223b50: f00d ret.n +40223b52: 380000 excw +40223b55: fecd excw +40223b57: 3f .byte 0x3f +40223b58: 2e .byte 0x2e +40223b59: 00ba add.n a0, a0, a11 +40223b5b: 5d1700 excw +40223b5e: aa0000 excw +40223b61: 00aa add.n a0, a0, a10 +40223b63: 71c700 excw +40223b66: 550000 extui a0, a0, 16, 6 +40223b69: 000055 excw +40223b6c: 0038e3 excw +40223b6f: 2aaa00 excw +40223b72: 710000 excw +40223b75: 001c movi.n a0, 16 +40223b77: 155500 extui a5, a0, 21, 2 +40223b7a: f60000 excw +40223b7d: 000012 l8ui a1, a0, 0 +40223b80: 9d89 s32i.n a8, a13, 36 +40223b82: c40000 extui a0, a0, 0, 13 +40223b85: 4e .byte 0x4e +40223b86: 830000 moveqz a0, a0, a0 +40223b89: 000034 excw +40223b8c: 002762 l32i a6, a7, 0 +40223b8f: 1a4100 excw +40223b92: b10000 sra a0, a0 +40223b95: 000013 excw +40223b98: 001181 l32r a8, 401e3bdc <_lit4_end+0xdd8b0> +40223b9b: 0fc000 excw +40223b9e: c80000 excw +40223ba1: 008d mov.n a8, a0 +40223ba3: 46e400 excw +40223ba6: 420000 excw +40223ba9: 2f .byte 0x2f +40223baa: 720000 excw +40223bad: 000023 excw +40223bb0: 0017a1 l32r a10, 401e3c0c <_lit4_end+0xdd8e0> +40223bb3: 11b900 slli a11, a9, 16 +40223bb6: 2d0000 excw +40223bb9: 0e .byte 0xe + ... + +40223bbc : +40223bbc: 5fa142 movi a4, 0x15f +40223bbf: f42020 extui a2, a2, 0, 16 +40223bc2: 102240 and a2, a2, a4 +40223bc5: 5fa152 movi a5, 0x15f +40223bc8: 743030 extui a3, a3, 0, 8 +40223bcb: ffe241 l32r a4, 40223b54 +40223bce: 021257 beq a2, a5, 40223bd4 +40223bd1: 007846 j 40223db6 +40223bd4: 925031 l32r a3, 40208514 +40223bd7: 020c movi.n a2, 0 +40223bd9: ffdf51 l32r a5, 40223b58 +40223bdc: 0439 s32i.n a3, a4, 0 +40223bde: 044422 s8i a2, a4, 4 +40223be1: 054422 s8i a2, a4, 5 +40223be4: 064422 s8i a2, a4, 6 +40223be7: 8439 s32i.n a3, a4, 32 +40223be9: 264422 s8i a2, a4, 38 +40223bec: 924d31 l32r a3, 40208520 +40223bef: 120c movi.n a2, 1 +40223bf1: 2e4422 s8i a2, a4, 46 +40223bf4: 0c4422 s8i a2, a4, 12 +40223bf7: 0d4422 s8i a2, a4, 13 +40223bfa: 0e4422 s8i a2, a4, 14 +40223bfd: c459 s32i.n a5, a4, 48 +40223bff: 220c movi.n a2, 2 +40223c01: 4459 s32i.n a5, a4, 16 +40223c03: ffd651 l32r a5, 40223b5c +40223c06: 560c movi.n a6, 5 +40223c08: 480c movi.n a8, 4 +40223c0a: 790c movi.n a9, 7 +40223c0c: a439 s32i.n a3, a4, 40 +40223c0e: 2439 s32i.n a3, a4, 8 +40223c10: 364422 s8i a2, a4, 54 +40223c13: 630c movi.n a3, 6 +40223c15: 144422 s8i a2, a4, 20 +40223c18: 154422 s8i a2, a4, 21 +40223c1b: 164422 s8i a2, a4, 22 +40223c1e: 320c movi.n a2, 3 +40223c20: e459 s32i.n a5, a4, 56 +40223c22: 3c4492 s8i a9, a4, 60 +40223c25: 3d4492 s8i a9, a4, 61 +40223c28: 3e4422 s8i a2, a4, 62 +40223c2b: 244482 s8i a8, a4, 36 +40223c2e: 254482 s8i a8, a4, 37 +40223c31: 2c4462 s8i a6, a4, 44 +40223c34: 2d4462 s8i a6, a4, 45 +40223c37: 344432 s8i a3, a4, 52 +40223c3a: 354432 s8i a3, a4, 53 +40223c3d: 6459 s32i.n a5, a4, 24 +40223c3f: 1c4422 s8i a2, a4, 28 +40223c42: 1d4422 s8i a2, a4, 29 +40223c45: 1e4422 s8i a2, a4, 30 +40223c48: ffc621 l32r a2, 40223b60 +40223c4b: ffcaa1 l32r a10, 40223b74 +40223c4e: 166422 s32i a2, a4, 88 +40223c51: ffc421 l32r a2, 40223b64 +40223c54: a50c movi.n a5, 10 +40223c56: 1e6422 s32i a2, a4, 120 +40223c59: ffc321 l32r a2, 40223b68 +40223c5c: b70c movi.n a7, 11 +40223c5e: 146422 s32i a2, a4, 80 +40223c61: ffc221 l32r a2, 40223b6c +40223c64: 5c4472 s8i a7, a4, 92 +40223c67: 1c6422 s32i a2, a4, 112 +40223c6a: ffc121 l32r a2, 40223b70 +40223c6d: 5d4472 s8i a7, a4, 93 +40223c70: 126422 s32i a2, a4, 72 +40223c73: 920c movi.n a2, 9 +40223c75: 7c4472 s8i a7, a4, 124 +40223c78: 7d4472 s8i a7, a4, 125 +40223c7b: 544452 s8i a5, a4, 84 +40223c7e: 554452 s8i a5, a4, 85 +40223c81: 744452 s8i a5, a4, 116 +40223c84: 754452 s8i a5, a4, 117 +40223c87: 1a64a2 s32i a10, a4, 104 +40223c8a: 5e4482 s8i a8, a4, 94 +40223c8d: 7e4482 s8i a8, a4, 126 +40223c90: 564462 s8i a6, a4, 86 +40223c93: 764462 s8i a6, a4, 118 +40223c96: 4c4422 s8i a2, a4, 76 +40223c99: 4d4422 s8i a2, a4, 77 +40223c9c: 4e4432 s8i a3, a4, 78 +40223c9f: 6c4422 s8i a2, a4, 108 +40223ca2: 6d4422 s8i a2, a4, 109 +40223ca5: 6e4432 s8i a3, a4, 110 +40223ca8: 464492 s8i a9, a4, 70 +40223cab: 664492 s8i a9, a4, 102 +40223cae: ffb491 l32r a9, 40223b80 +40223cb1: ffb1a1 l32r a10, 40223b78 +40223cb4: 206492 s32i a9, a4, 128 +40223cb7: ffb391 l32r a9, 40223b84 +40223cba: 1064a2 s32i a10, a4, 64 +40223cbd: 226492 s32i a9, a4, 136 +40223cc0: ffb291 l32r a9, 40223b88 +40223cc3: ffaea1 l32r a10, 40223b7c +40223cc6: 246492 s32i a9, a4, 144 +40223cc9: ffb091 l32r a9, 40223b8c +40223ccc: 1864a2 s32i a10, a4, 96 +40223ccf: 266492 s32i a9, a4, 152 +40223cd2: ffaf91 l32r a9, 40223b90 +40223cd5: 844472 s8i a7, a4, 132 +40223cd8: 854472 s8i a7, a4, 133 +40223cdb: 8c4452 s8i a5, a4, 140 +40223cde: 8d4452 s8i a5, a4, 141 +40223ce1: 944452 s8i a5, a4, 148 +40223ce4: 954452 s8i a5, a4, 149 +40223ce7: 286492 s32i a9, a4, 160 +40223cea: 444422 s8i a2, a4, 68 +40223ced: 454422 s8i a2, a4, 69 +40223cf0: 644422 s8i a2, a4, 100 +40223cf3: 654422 s8i a2, a4, 101 +40223cf6: 864482 s8i a8, a4, 134 +40223cf9: 8e4462 s8i a6, a4, 142 +40223cfc: 964462 s8i a6, a4, 150 +40223cff: 9c4422 s8i a2, a4, 156 +40223d02: 9d4422 s8i a2, a4, 157 +40223d05: 9e4432 s8i a3, a4, 158 +40223d08: a44422 s8i a2, a4, 164 +40223d0b: ffa291 l32r a9, 40223b94 +40223d0e: c44472 s8i a7, a4, 196 +40223d11: 2a6492 s32i a9, a4, 168 +40223d14: c54472 s8i a7, a4, 197 +40223d17: ffa091 l32r a9, 40223b98 +40223d1a: ffa271 l32r a7, 40223ba4 +40223d1d: 2c6492 s32i a9, a4, 176 +40223d20: ffa0a1 l32r a10, 40223ba0 +40223d23: ff9e91 l32r a9, 40223b9c +40223d26: 326472 s32i a7, a4, 200 +40223d29: ff9f71 l32r a7, 40223ba8 +40223d2c: a54422 s8i a2, a4, 165 +40223d2f: a64432 s8i a3, a4, 166 +40223d32: ac4422 s8i a2, a4, 172 +40223d35: ad4422 s8i a2, a4, 173 +40223d38: ae4432 s8i a3, a4, 174 +40223d3b: b44422 s8i a2, a4, 180 +40223d3e: b54422 s8i a2, a4, 181 +40223d41: b64432 s8i a3, a4, 182 +40223d44: 2e6492 s32i a9, a4, 184 +40223d47: bc4422 s8i a2, a4, 188 +40223d4a: bd4422 s8i a2, a4, 189 +40223d4d: be4432 s8i a3, a4, 190 +40223d50: 3064a2 s32i a10, a4, 192 +40223d53: c64482 s8i a8, a4, 198 +40223d56: cc4452 s8i a5, a4, 204 +40223d59: cd4452 s8i a5, a4, 205 +40223d5c: ce4462 s8i a6, a4, 206 +40223d5f: 346472 s32i a7, a4, 208 +40223d62: d44452 s8i a5, a4, 212 +40223d65: d54452 s8i a5, a4, 213 +40223d68: d64462 s8i a6, a4, 214 +40223d6b: ff9051 l32r a5, 40223bac +40223d6e: dc4422 s8i a2, a4, 220 +40223d71: 366452 s32i a5, a4, 216 +40223d74: ff8f51 l32r a5, 40223bb0 +40223d77: dd4422 s8i a2, a4, 221 +40223d7a: 386452 s32i a5, a4, 224 +40223d7d: ff8d51 l32r a5, 40223bb4 +40223d80: de4432 s8i a3, a4, 222 +40223d83: 3a6452 s32i a5, a4, 232 +40223d86: ff8c51 l32r a5, 40223bb8 +40223d89: e44422 s8i a2, a4, 228 +40223d8c: e54422 s8i a2, a4, 229 +40223d8f: e64432 s8i a3, a4, 230 +40223d92: ec4422 s8i a2, a4, 236 +40223d95: ed4422 s8i a2, a4, 237 +40223d98: ee4432 s8i a3, a4, 238 +40223d9b: 3c6492 s32i a9, a4, 240 +40223d9e: f44422 s8i a2, a4, 244 +40223da1: f54422 s8i a2, a4, 245 +40223da4: f64432 s8i a3, a4, 246 +40223da7: 3e6452 s32i a5, a4, 248 +40223daa: fc4422 s8i a2, a4, 252 +40223dad: fd4422 s8i a2, a4, 253 +40223db0: fe4432 s8i a3, a4, 254 +40223db3: 000a86 j 40223de1 +40223db6: 230b addi.n a2, a3, -1 +40223db8: 050c movi.n a5, 0 +40223dba: 430c movi.n a3, 4 +40223dbc: 933520 movnez a3, a5, a2 +40223dbf: 120c movi.n a2, 1 +40223dc1: 202320 or a2, a3, a2 +40223dc4: 5c4422 s8i a2, a4, 92 +40223dc7: 7c4422 s8i a2, a4, 124 +40223dca: 544422 s8i a2, a4, 84 +40223dcd: 320c movi.n a2, 3 +40223dcf: 203320 or a3, a3, a2 +40223dd2: 744432 s8i a3, a4, 116 +40223dd5: 4c4432 s8i a3, a4, 76 +40223dd8: 6c4432 s8i a3, a4, 108 +40223ddb: 444432 s8i a3, a4, 68 +40223dde: 644432 s8i a3, a4, 100 +40223de1: 020c movi.n a2, 0 +40223de3: f00d ret.n +40223de5: 000000 ill +40223de8: 0c0242 l8ui a4, a2, 12 +40223deb: 0d1437 beq a4, a3, 40223dfc +40223dee: 0c4232 s8i a3, a2, 12 +40223df1: 030c movi.n a3, 0 +40223df3: 0d4232 s8i a3, a2, 13 +40223df6: 00a032 movi a3, 0 +40223df9: 0d5232 s16i a3, a2, 26 +40223dfc: f00d ret.n +40223dfe: 120000 excw +40223e01: c2f0c1 l32r a12, 402149c4 +40223e04: c20261 l32r a6, 4021460c +40223e07: d20822 l8ui a2, a8, 210 +40223e0a: 0c0161 l32r a6, 401e6e10 <_lit4_end+0xe0ae4> +40223e0d: 02dd83 excw +40223e10: 0c2d mov.n a2, a12 +40223e12: 3109 s32i.n a0, a1, 12 +40223e14: fffd05 call0 40223de8 +40223e17: 2ccc32 addi a3, a12, 44 +40223e1a: 0d2d mov.n a2, a13 +40223e1c: 040c movi.n a4, 0 +40223e1e: 03df85 call0 40227c18 +40223e21: 0d0c22 l8ui a2, a12, 13 +40223e24: 221b addi.n a2, a2, 1 +40223e26: 0d4c22 s8i a2, a12, 13 +40223e29: 3108 l32i.n a0, a1, 12 +40223e2b: 120c movi.n a2, 1 +40223e2d: 0d5c22 s16i a2, a12, 26 +40223e30: 11d8 l32i.n a13, a1, 4 +40223e32: 21c8 l32i.n a12, a1, 8 +40223e34: 10c112 addi a1, a1, 16 +40223e37: f00d ret.n +40223e39: 000000 ill +40223e3c: 0c1252 l16ui a5, a2, 24 +40223e3f: 5268 l32i.n a6, a2, 20 +40223e41: 751b addi.n a7, a5, 1 +40223e43: 0c5272 s16i a7, a2, 24 +40223e46: 565a add.n a5, a6, a5 +40223e48: f04532 s8i a3, a5, 240 +40223e4b: 0c1232 l16ui a3, a2, 24 +40223e4e: 5258 l32i.n a5, a2, 20 +40223e50: 631b addi.n a6, a3, 1 +40223e52: 0c5262 s16i a6, a2, 24 +40223e55: 353a add.n a3, a5, a3 +40223e57: f04342 s8i a4, a3, 240 +40223e5a: f00d ret.n +40223e5c: 0c1242 l16ui a4, a2, 24 +40223e5f: 5258 l32i.n a5, a2, 20 +40223e61: 641b addi.n a6, a4, 1 +40223e63: 0c5262 s16i a6, a2, 24 +40223e66: 454a add.n a4, a5, a4 +40223e68: f04432 s8i a3, a4, 240 +40223e6b: f00d ret.n +40223e6d: 000000 ill +40223e70: 0c1242 l16ui a4, a2, 24 +40223e73: 5258 l32i.n a5, a2, 20 +40223e75: 641b addi.n a6, a4, 1 +40223e77: 0c5262 s16i a6, a2, 24 +40223e7a: 454a add.n a4, a5, a4 +40223e7c: 415830 srli a5, a3, 8 +40223e7f: f04452 s8i a5, a4, 240 +40223e82: 0c1242 l16ui a4, a2, 24 +40223e85: 5258 l32i.n a5, a2, 20 +40223e87: 641b addi.n a6, a4, 1 +40223e89: 0c5262 s16i a6, a2, 24 +40223e8c: 454a add.n a4, a5, a4 +40223e8e: f04432 s8i a3, a4, 240 +40223e91: f00d ret.n +40223e93: 124200 excw +40223e96: 580c movi.n a8, 5 +40223e98: 641b52 l16ui a5, a11, 200 +40223e9b: 0c5262 s16i a6, a2, 24 +40223e9e: 454a add.n a4, a5, a4 +40223ea0: 755830 extui a5, a3, 24, 8 +40223ea3: f04452 s8i a5, a4, 240 +40223ea6: 0c1242 l16ui a4, a2, 24 +40223ea9: 5258 l32i.n a5, a2, 20 +40223eab: 641b addi.n a6, a4, 1 +40223ead: 554a add.n a5, a5, a4 +40223eaf: 748f41 l32r a4, 402010ec +40223eb2: 0c5262 s16i a6, a2, 24 +40223eb5: 104340 and a4, a3, a4 +40223eb8: f54040 extui a4, a4, 16, 16 +40223ebb: f04542 s8i a4, a5, 240 +40223ebe: 0c1242 l16ui a4, a2, 24 +40223ec1: 5258 l32i.n a5, a2, 20 +40223ec3: 641b addi.n a6, a4, 1 +40223ec5: 554a add.n a5, a5, a4 +40223ec7: 748a41 l32r a4, 402010f0 +40223eca: 0c5262 s16i a6, a2, 24 +40223ecd: 104340 and a4, a3, a4 +40223ed0: 414840 srli a4, a4, 8 +40223ed3: f04542 s8i a4, a5, 240 +40223ed6: 0c1242 l16ui a4, a2, 24 +40223ed9: 5258 l32i.n a5, a2, 20 +40223edb: 641b addi.n a6, a4, 1 +40223edd: 0c5262 s16i a6, a2, 24 +40223ee0: 454a add.n a4, a5, a4 +40223ee2: f04432 s8i a3, a4, 240 +40223ee5: f00d ret.n +40223ee7: c11200 mul16u a1, a2, a0 +40223eea: 61c2f0 xsr.eps2 a15 +40223eed: 610202 l8ui a0, a2, 97 +40223ef0: c22003 excw +40223ef3: c28c20 excw +40223ef6: 4228 l32i.n a2, a2, 16 +40223ef8: 002216 beqz a2, 40223efe +40223efb: 04ea45 call0 40228da0 +40223efe: 020c movi.n a2, 0 +40223f00: 4c29 s32i.n a2, a12, 16 +40223f02: 5c29 s32i.n a2, a12, 20 +40223f04: 3108 l32i.n a0, a1, 12 +40223f06: 21c8 l32i.n a12, a1, 8 +40223f08: 10c112 addi a1, a1, 16 +40223f0b: f00d ret.n +40223f0d: 000000 ill +40223f10: d2ac beqz.n a2, 40223f41 +40223f12: 0c1232 l16ui a3, a2, 24 +40223f15: 5248 l32i.n a4, a2, 20 +40223f17: 531b addi.n a5, a3, 1 +40223f19: 0c5252 s16i a5, a2, 24 +40223f1c: 343a add.n a3, a4, a3 +40223f1e: f47c movi.n a4, -1 +40223f20: f04342 s8i a4, a3, 240 +40223f23: f0a052 movi a5, 240 +40223f26: 344c movi.n a4, 67 +40223f28: 060c movi.n a6, 0 +40223f2a: 0c1232 l16ui a3, a2, 24 +40223f2d: 103437 bltu a4, a3, 40223f41 +40223f30: 5278 l32i.n a7, a2, 20 +40223f32: 831b addi.n a8, a3, 1 +40223f34: 373a add.n a3, a7, a3 +40223f36: 0c5282 s16i a8, a2, 24 +40223f39: 335a add.n a3, a3, a5 +40223f3b: 004362 s8i a6, a3, 0 +40223f3e: fffa06 j 40223f2a +40223f41: f00d ret.n +40223f43: d32c00 excw +40223f46: fe .byte 0xfe +40223f47: 3f .byte 0x3f +40223f48: d328 l32i.n a2, a3, 52 +40223f4a: fe .byte 0xfe +40223f4b: 3f .byte 0x3f +40223f4c: e0c112 addi a1, a1, -32 +40223f4f: 31f9 s32i.n a15, a1, 12 +40223f51: fffcf1 l32r a15, 40223f44 +40223f54: 61c9 s32i.n a12, a1, 24 +40223f56: 51d9 s32i.n a13, a1, 20 +40223f58: 41e9 s32i.n a14, a1, 16 +40223f5a: 7109 s32i.n a0, a1, 28 +40223f5c: 02ed mov.n a14, a2 +40223f5e: 000f22 l8ui a2, a15, 0 +40223f61: 03cd mov.n a12, a3 +40223f63: 04dd mov.n a13, a4 +40223f65: 42dc bnez.n a2, 40223f7d +40223f67: eb74c5 call0 4020f6b4 +40223f6a: fff731 l32r a3, 40223f48 +40223f6d: 140c movi.n a4, 1 +40223f6f: 0329 s32i.n a2, a3, 0 +40223f71: 000f32 l8ui a3, a15, 0 +40223f74: 00a022 movi a2, 0 +40223f77: 832430 moveqz a2, a4, a3 +40223f7a: 004f22 s8i a2, a15, 0 +40223f7d: f4af22 movi a2, -12 +40223f80: 176e16 beqz a14, 402240fa +40223f83: faaf22 movi a2, -6 +40223f86: 170c16 beqz a12, 402240fa +40223f89: 040c movi.n a4, 0 +40223f8b: 34a132 movi a3, 0x134 +40223f8e: 042d mov.n a2, a4 +40223f90: 04e805 call0 40228e14 +40223f93: 023d mov.n a3, a2 +40223f95: 4c29 s32i.n a2, a12, 16 +40223f97: f27c movi.n a2, -1 +40223f99: 15d316 beqz a3, 402240fa +40223f9c: 103d26 beqi a13, 3, 40223fb0 +40223f9f: 0d0c22 l8ui a2, a12, 13 +40223fa2: ffe9f1 l32r a15, 40223f48 +40223fa5: 32cc bnez.n a2, 40223fac +40223fa7: eb70c5 call0 4020f6b4 +40223faa: 0f29 s32i.n a2, a15, 0 +40223fac: 0f28 l32i.n a2, a15, 0 +40223fae: 0c29 s32i.n a2, a12, 0 +40223fb0: 4c28 l32i.n a2, a12, 16 +40223fb2: 1238 l32i.n a3, a2, 4 +40223fb4: 120c movi.n a2, 1 +40223fb6: 5c39 s32i.n a3, a12, 20 +40223fb8: 004322 s8i a2, a3, 0 +40223fbb: 5c38 l32i.n a3, a12, 20 +40223fbd: 014322 s8i a2, a3, 1 +40223fc0: 5c28 l32i.n a2, a12, 20 +40223fc2: 320e32 l8ui a3, a14, 50 +40223fc5: 024232 s8i a3, a2, 2 +40223fc8: 5c28 l32i.n a2, a12, 20 +40223fca: 030c movi.n a3, 0 +40223fcc: 034232 s8i a3, a2, 3 +40223fcf: 0c58 l32i.n a5, a12, 0 +40223fd1: 5c28 l32i.n a2, a12, 20 +40223fd3: 014580 slli a4, a5, 24 +40223fd6: 753850 extui a3, a5, 24, 8 +40223fd9: 203430 or a3, a4, a3 +40223fdc: 744541 l32r a4, 402010f0 +40223fdf: 106540 and a6, a5, a4 +40223fe2: 116680 slli a6, a6, 8 +40223fe5: 415850 srli a5, a5, 8 +40223fe8: 104540 and a4, a5, a4 +40223feb: 203360 or a3, a3, a6 +40223fee: 203340 or a3, a3, a4 +40223ff1: 744830 extui a4, a3, 8, 8 +40223ff4: 044232 s8i a3, a2, 4 +40223ff7: 054242 s8i a4, a2, 5 +40223ffa: 754030 extui a4, a3, 16, 8 +40223ffd: 753830 extui a3, a3, 24, 8 +40224000: 074232 s8i a3, a2, 7 +40224003: 030c movi.n a3, 0 +40224005: 064242 s8i a4, a2, 6 +40224008: 084232 s8i a3, a2, 8 +4022400b: 094232 s8i a3, a2, 9 +4022400e: 0a4232 s8i a3, a2, 10 +40224011: 0b4232 s8i a3, a2, 11 +40224014: 0c4232 s8i a3, a2, 12 +40224017: 0d4232 s8i a3, a2, 13 +4022401a: 0e4232 s8i a3, a2, 14 +4022401d: 0f4232 s8i a3, a2, 15 +40224020: fba042 movi a4, 251 +40224023: fccd32 addi a3, a13, -4 +40224026: 0e0347 bnone a3, a4, 40224038 +40224029: 233d66 bnei a13, 3, 40224050 +4022402c: 0c0c32 l8ui a3, a12, 12 +4022402f: fcc332 addi a3, a3, -4 +40224032: 743030 extui a3, a3, 0, 8 +40224035: 1723f6 bgeui a3, 2, 40224050 +40224038: 040e32 l8ui a3, a14, 4 +4022403b: 0c4232 s8i a3, a2, 12 +4022403e: 050e32 l8ui a3, a14, 5 +40224041: 0d4232 s8i a3, a2, 13 +40224044: 060e32 l8ui a3, a14, 6 +40224047: 0e4232 s8i a3, a2, 14 +4022404a: 070e32 l8ui a3, a14, 7 +4022404d: 0f4232 s8i a3, a2, 15 +40224050: 030c movi.n a3, 0 +40224052: 104232 s8i a3, a2, 16 +40224055: 114232 s8i a3, a2, 17 +40224058: 124232 s8i a3, a2, 18 +4022405b: 134232 s8i a3, a2, 19 +4022405e: 144232 s8i a3, a2, 20 +40224061: 154232 s8i a3, a2, 21 +40224064: 164232 s8i a3, a2, 22 +40224067: 174232 s8i a3, a2, 23 +4022406a: 184232 s8i a3, a2, 24 +4022406d: 194232 s8i a3, a2, 25 +40224070: 1a4232 s8i a3, a2, 26 +40224073: 1b4232 s8i a3, a2, 27 +40224076: 33ce22 addi a2, a14, 51 +40224079: 320e62 l8ui a6, a14, 50 +4022407c: f45030 extui a5, a3, 0, 16 +4022407f: 5c48 l32i.n a4, a12, 20 +40224081: 09b567 bgeu a5, a6, 4022408e +40224084: 0665f6 bgeui a5, 6, 4022408e +40224087: 000252 l8ui a5, a2, 0 +4022408a: 000086 j 40224090 +4022408d: 050c00 extui a0, a0, 28, 1 +40224090: 443a add.n a4, a4, a3 +40224092: 1c4452 s8i a5, a4, 28 +40224095: 331b addi.n a3, a3, 1 +40224097: 221b addi.n a2, a2, 1 +40224099: dcb366 bnei a3, 16, 40224079 +4022409c: 020c movi.n a2, 0 +4022409e: 204220 or a4, a2, a2 +402240a1: 5c38 l32i.n a3, a12, 20 +402240a3: 332a add.n a3, a3, a2 +402240a5: 2c4342 s8i a4, a3, 44 +402240a8: 221b addi.n a2, a2, 1 +402240aa: f3d266 bnei a2, 64, 402240a1 +402240ad: 020c movi.n a2, 0 +402240af: 024d mov.n a4, a2 +402240b1: 5c38 l32i.n a3, a12, 20 +402240b3: 332a add.n a3, a3, a2 +402240b5: 6c4342 s8i a4, a3, 108 +402240b8: 221b addi.n a2, a2, 1 +402240ba: f3e266 bnei a2, 128, 402240b1 +402240bd: 5c28 l32i.n a2, a12, 20 +402240bf: 82af42 movi a4, -126 +402240c2: ed4242 s8i a4, a2, 237 +402240c5: 63a032 movi a3, 99 +402240c8: 345c movi.n a4, 83 +402240ca: ee4242 s8i a4, a2, 238 +402240cd: ec4232 s8i a3, a2, 236 +402240d0: ef4232 s8i a3, a2, 239 +402240d3: 020c movi.n a2, 0 +402240d5: 0c5c22 s16i a2, a12, 24 +402240d8: 444c movi.n a4, 68 +402240da: 020c movi.n a2, 0 +402240dc: 5c38 l32i.n a3, a12, 20 +402240de: 332a add.n a3, a3, a2 +402240e0: f04322 s8i a2, a3, 240 +402240e3: 221b addi.n a2, a2, 1 +402240e5: f39247 bne a2, a4, 402240dc +402240e8: 140c movi.n a4, 1 +402240ea: 533c movi.n a3, 53 +402240ec: 0c2d mov.n a2, a12 +402240ee: ffd4c5 call0 40223e3c +402240f1: 0c2d mov.n a2, a12 +402240f3: 0d3d mov.n a3, a13 +402240f5: ffd645 call0 40223e5c +402240f8: 020c movi.n a2, 0 +402240fa: 7108 l32i.n a0, a1, 28 +402240fc: 61c8 l32i.n a12, a1, 24 +402240fe: 51d8 l32i.n a13, a1, 20 +40224100: 41e8 l32i.n a14, a1, 16 +40224102: 31f8 l32i.n a15, a1, 12 +40224104: 20c112 addi a1, a1, 32 +40224107: f00d ret.n +40224109: 000000 ill +4022410c: fed330 excw +4022410f: 3f .byte 0x3f +40224110: 0568 l32i.n a6, a5, 0 +40224112: 344023 excw +40224115: 3ffed3 excw +40224118: e0c112 addi a1, a1, -32 +4022411b: 61c9 s32i.n a12, a1, 24 +4022411d: 82c8 l32i.n a12, a2, 32 +4022411f: 7109 s32i.n a0, a1, 28 +40224121: 51d9 s32i.n a13, a1, 20 +40224123: 41e9 s32i.n a14, a1, 16 +40224125: 31f9 s32i.n a15, a1, 12 +40224127: 02ed mov.n a14, a2 +40224129: 020c movi.n a2, 0 +4022412b: bc29 s32i.n a2, a12, 44 +4022412d: 630c movi.n a3, 6 +4022412f: 202cc0 or a2, a12, a12 +40224132: ffcb45 call0 40223de8 +40224135: 140c movi.n a4, 1 +40224137: 0c3d mov.n a3, a12 +40224139: 0e2d mov.n a2, a14 +4022413b: ffe105 call0 40223f4c +4022413e: 02dd mov.n a13, a2 +40224140: 104256 bnez a2, 40224248 +40224143: 240c movi.n a4, 2 +40224145: 933c movi.n a3, 57 +40224147: 0c2d mov.n a2, a12 +40224149: ffcf05 call0 40223e3c +4022414c: 181e32 l16ui a3, a14, 48 +4022414f: 0c2d mov.n a2, a12 +40224151: ffd1c5 call0 40223e70 +40224154: bef8 l32i.n a15, a14, 44 +40224156: bfcc bnez.n a15, 40224165 +40224158: ffed21 l32r a2, 4022410c +4022415b: 02f8 l32i.n a15, a2, 0 +4022415d: 0b8f56 bnez a15, 40224219 +40224160: 000a46 j 4022418d +40224163: 2d0000 excw +40224166: 0f .byte 0xf +40224167: 809201 l32r a0, 402043b0 +4022416a: 0000c0 callx0 a0 +4022416d: 743020 extui a3, a2, 0, 8 +40224170: fe4316 beqz a3, 40224158 +40224173: 034d mov.n a4, a3 +40224175: 0c2d mov.n a2, a12 +40224177: c30c movi.n a3, 12 +40224179: ffcc05 call0 40223e3c +4022417c: 000f32 l8ui a3, a15, 0 +4022417f: fd5316 beqz a3, 40224158 +40224182: 0c2d mov.n a2, a12 +40224184: ff1b addi.n a15, a15, 1 +40224186: ffcd45 call0 40223e5c +40224189: fffbc6 j 4022417c +4022418c: c40c00 extui a0, a0, 12, 13 +4022418f: 0c2d mov.n a2, a12 +40224191: 733c movi.n a3, 55 +40224193: ffca85 call0 40223e3c +40224196: 0c2d mov.n a2, a12 +40224198: 130c movi.n a3, 1 +4022419a: ffcc05 call0 40223e5c +4022419d: 0c2d mov.n a2, a12 +4022419f: 330c movi.n a3, 3 +402241a1: ffcb85 call0 40223e5c +402241a4: 0c2d mov.n a2, a12 +402241a6: c31c movi.n a3, 28 +402241a8: ffcb05 call0 40223e5c +402241ab: 0c2d mov.n a2, a12 +402241ad: 630c movi.n a3, 6 +402241af: ffcac5 call0 40223e5c +402241b2: 0c2d mov.n a2, a12 +402241b4: f30c movi.n a3, 15 +402241b6: ffca45 call0 40223e5c +402241b9: 0c2d mov.n a2, a12 +402241bb: c32c movi.n a3, 44 +402241bd: ffc9c5 call0 40223e5c +402241c0: 0c2d mov.n a2, a12 +402241c2: 2ea032 movi a3, 46 +402241c5: ffc945 call0 40223e5c +402241c8: 0c2d mov.n a2, a12 +402241ca: 2fa032 movi a3, 47 +402241cd: ffc8c5 call0 40223e5c +402241d0: 0c2d mov.n a2, a12 +402241d2: 1fa032 movi a3, 31 +402241d5: ffc845 call0 40223e5c +402241d8: 0c2d mov.n a2, a12 +402241da: 132c movi.n a3, 33 +402241dc: ffc7c5 call0 40223e5c +402241df: 0c2d mov.n a2, a12 +402241e1: 79a032 movi a3, 121 +402241e4: ffc745 call0 40223e5c +402241e7: b32c movi.n a3, 43 +402241e9: 0c2d mov.n a2, a12 +402241eb: ffc705 call0 40223e5c +402241ee: 0c2d mov.n a2, a12 +402241f0: ffd1c5 call0 40223f10 +402241f3: 0c1c32 l16ui a3, a12, 24 +402241f6: f0a022 movi a2, 240 +402241f9: 332a add.n a3, a3, a2 +402241fb: 4c28 l32i.n a2, a12, 16 +402241fd: f43030 extui a3, a3, 0, 16 +40224200: 04d985 call0 40228f9c +40224203: ffc341 l32r a4, 40224110 +40224206: 4c38 l32i.n a3, a12, 16 +40224208: 1c28 l32i.n a2, a12, 4 +4022420a: 0e6d mov.n a6, a14 +4022420c: 354c movi.n a5, 67 +4022420e: 084805 call0 4022c690 +40224211: 0c2d mov.n a2, a12 +40224213: ffcd45 call0 40223ee8 +40224216: 000b86 j 40224248 +40224219: 0f2d mov.n a2, a15 +4022421b: 806501 l32r a0, 402043b0 +4022421e: 0000c0 callx0 a0 +40224221: ffbc21 l32r a2, 40224114 +40224224: 002242 l32i a4, a2, 0 +40224227: 0214e6 bgei a4, 1, 4022422d +4022422a: ffd7c6 j 4022418d +4022422d: 744040 extui a4, a4, 0, 8 +40224230: c33c movi.n a3, 60 +40224232: 202cc0 or a2, a12, a12 +40224235: ffc045 call0 40223e3c +40224238: 000f32 l8ui a3, a15, 0 +4022423b: f4e316 beqz a3, 4022418d +4022423e: 0c2d mov.n a2, a12 +40224240: ff1b addi.n a15, a15, 1 +40224242: ffc185 call0 40223e5c +40224245: fffbc6 j 40224238 +40224248: 0d0c32 l8ui a3, a12, 13 +4022424b: 763c21 l32r a2, 40201b3c +4022424e: 331b addi.n a3, a3, 1 +40224250: 743030 extui a3, a3, 0, 8 +40224253: 0d4c32 s8i a3, a12, 13 +40224256: 0b63f6 bgeui a3, 6, 40224265 +40224259: e8a322 movi a2, 0x3e8 +4022425c: 401300 ssl a3 +4022425f: a12200 sll a2, a2 +40224262: f42020 extui a2, a2, 0, 16 +40224265: f3a142 movi a4, 0x1f3 +40224268: f4a132 movi a3, 0x1f4 +4022426b: 802240 add a2, a2, a4 +4022426e: 766a01 l32r a0, 40201c18 +40224271: 0000c0 callx0 a0 +40224274: 7108 l32i.n a0, a1, 28 +40224276: 0d5c22 s16i a2, a12, 26 +40224279: 41e8 l32i.n a14, a1, 16 +4022427b: 0d2d mov.n a2, a13 +4022427d: 61c8 l32i.n a12, a1, 24 +4022427f: 51d8 l32i.n a13, a1, 20 +40224281: 31f8 l32i.n a15, a1, 12 +40224283: 20c112 addi a1, a1, 32 +40224286: f00d ret.n +40224288: e0c112 addi a1, a1, -32 +4022428b: 61c9 s32i.n a12, a1, 24 +4022428d: 82c8 l32i.n a12, a2, 32 +4022428f: 51d9 s32i.n a13, a1, 20 +40224291: 130c movi.n a3, 1 +40224293: 02dd mov.n a13, a2 +40224295: 0c2d mov.n a2, a12 +40224297: 7109 s32i.n a0, a1, 28 +40224299: 41e9 s32i.n a14, a1, 16 +4022429b: 0361f2 s32i a15, a1, 12 +4022429e: ffb485 call0 40223de8 +402242a1: 340c movi.n a4, 3 +402242a3: 0c3d mov.n a3, a12 +402242a5: 0d2d mov.n a2, a13 +402242a7: ffca45 call0 40223f4c +402242aa: 02ed mov.n a14, a2 +402242ac: 164256 bnez a2, 40224414 +402242af: 240c movi.n a4, 2 +402242b1: 933c movi.n a3, 57 +402242b3: 202cc0 or a2, a12, a12 +402242b6: ffb845 call0 40223e3c +402242b9: 181d32 l16ui a3, a13, 48 +402242bc: 0c2d mov.n a2, a12 +402242be: ffbb05 call0 40223e70 +402242c1: 440c movi.n a4, 4 +402242c3: 233c movi.n a3, 50 +402242c5: 0c2d mov.n a2, a12 +402242c7: ffb745 call0 40223e3c +402242ca: bc28 l32i.n a2, a12, 44 +402242cc: 7389f1 l32r a15, 402010f0 +402242cf: 014280 slli a4, a2, 24 +402242d2: 753820 extui a3, a2, 24, 8 +402242d5: 203430 or a3, a4, a3 +402242d8: 1042f0 and a4, a2, a15 +402242db: 114480 slli a4, a4, 8 +402242de: 412820 srli a2, a2, 8 +402242e1: 203340 or a3, a3, a4 +402242e4: 1022f0 and a2, a2, a15 +402242e7: 203320 or a3, a3, a2 +402242ea: 202cc0 or a2, a12, a12 +402242ed: ffba45 call0 40223e94 +402242f0: 440c movi.n a4, 4 +402242f2: 633c movi.n a3, 54 +402242f4: 202cc0 or a2, a12, a12 +402242f7: ffb445 call0 40223e3c +402242fa: ac28 l32i.n a2, a12, 40 +402242fc: 014280 slli a4, a2, 24 +402242ff: 753820 extui a3, a2, 24, 8 +40224302: 203430 or a3, a4, a3 +40224305: 1042f0 and a4, a2, a15 +40224308: 114480 slli a4, a4, 8 +4022430b: 412820 srli a2, a2, 8 +4022430e: 203340 or a3, a3, a4 +40224311: 10f2f0 and a15, a2, a15 +40224314: 2033f0 or a3, a3, a15 +40224317: 202cc0 or a2, a12, a12 +4022431a: ffb785 call0 40223e94 +4022431d: c40c movi.n a4, 12 +4022431f: 733c movi.n a3, 55 +40224321: 0c2d mov.n a2, a12 +40224323: ffb185 call0 40223e3c +40224326: 130c movi.n a3, 1 +40224328: 202cc0 or a2, a12, a12 +4022432b: ffb305 call0 40223e5c +4022432e: 330c movi.n a3, 3 +40224330: 202cc0 or a2, a12, a12 +40224333: ffb285 call0 40223e5c +40224336: c31c movi.n a3, 28 +40224338: 202cc0 or a2, a12, a12 +4022433b: ffb205 call0 40223e5c +4022433e: 630c movi.n a3, 6 +40224340: 202cc0 or a2, a12, a12 +40224343: ffb185 call0 40223e5c +40224346: f30c movi.n a3, 15 +40224348: 202cc0 or a2, a12, a12 +4022434b: ffb105 call0 40223e5c +4022434e: c32c movi.n a3, 44 +40224350: 202cc0 or a2, a12, a12 +40224353: ffb085 call0 40223e5c +40224356: e32c movi.n a3, 46 +40224358: 202cc0 or a2, a12, a12 +4022435b: ffb005 call0 40223e5c +4022435e: f32c movi.n a3, 47 +40224360: 202cc0 or a2, a12, a12 +40224363: ffaf85 call0 40223e5c +40224366: f31c movi.n a3, 31 +40224368: 202cc0 or a2, a12, a12 +4022436b: ffaf05 call0 40223e5c +4022436e: 132c movi.n a3, 33 +40224370: 0c2d mov.n a2, a12 +40224372: ffae85 call0 40223e5c +40224375: 79a032 movi a3, 121 +40224378: 0c2d mov.n a2, a12 +4022437a: ffae05 call0 40223e5c +4022437d: b32c movi.n a3, 43 +4022437f: 0c2d mov.n a2, a12 +40224381: ffad85 call0 40223e5c +40224384: bdf8 l32i.n a15, a13, 44 +40224386: bfcc bnez.n a15, 40224395 +40224388: ff6121 l32r a2, 4022410c +4022438b: 02f8 l32i.n a15, a2, 0 +4022438d: 058f56 bnez a15, 402243e9 +40224390: 000a06 j 402243bc +40224393: 2d0000 excw +40224396: 0f .byte 0xf +40224397: 800601 l32r a0, 402043b0 +4022439a: 0000c0 callx0 a0 +4022439d: 743020 extui a3, a2, 0, 8 +402243a0: fe4316 beqz a3, 40224388 +402243a3: 034d mov.n a4, a3 +402243a5: 0c2d mov.n a2, a12 +402243a7: c30c movi.n a3, 12 +402243a9: ffa905 call0 40223e3c +402243ac: 000f32 l8ui a3, a15, 0 +402243af: fd5316 beqz a3, 40224388 +402243b2: 0c2d mov.n a2, a12 +402243b4: ff1b addi.n a15, a15, 1 +402243b6: ffaa45 call0 40223e5c +402243b9: fffbc6 j 402243ac +402243bc: 202cc0 or a2, a12, a12 +402243bf: ffb505 call0 40223f10 +402243c2: 0c1c32 l16ui a3, a12, 24 +402243c5: f0a022 movi a2, 240 +402243c8: 803320 add a3, a3, a2 +402243cb: 4c28 l32i.n a2, a12, 16 +402243cd: f43030 extui a3, a3, 0, 16 +402243d0: 04bc85 call0 40228f9c +402243d3: ff4f41 l32r a4, 40224110 +402243d6: 4c38 l32i.n a3, a12, 16 +402243d8: 1c28 l32i.n a2, a12, 4 +402243da: 0d6d mov.n a6, a13 +402243dc: 354c movi.n a5, 67 +402243de: 082b05 call0 4022c690 +402243e1: 0c2d mov.n a2, a12 +402243e3: ffb045 call0 40223ee8 +402243e6: 000a86 j 40224414 +402243e9: 0f2d mov.n a2, a15 +402243eb: 7ff101 l32r a0, 402043b0 +402243ee: 0000c0 callx0 a0 +402243f1: ff4821 l32r a2, 40224114 +402243f4: 0248 l32i.n a4, a2, 0 +402243f6: c214a6 blti a4, 1, 402243bc +402243f9: 744040 extui a4, a4, 0, 8 +402243fc: c33c movi.n a3, 60 +402243fe: 202cc0 or a2, a12, a12 +40224401: ffa385 call0 40223e3c +40224404: 000f32 l8ui a3, a15, 0 +40224407: fb1316 beqz a3, 402243bc +4022440a: 0c2d mov.n a2, a12 +4022440c: ff1b addi.n a15, a15, 1 +4022440e: ffa4c5 call0 40223e5c +40224411: fffbc6 j 40224404 +40224414: 0d0c32 l8ui a3, a12, 13 +40224417: 75c921 l32r a2, 40201b3c +4022441a: 331b addi.n a3, a3, 1 +4022441c: 743030 extui a3, a3, 0, 8 +4022441f: 0d4c32 s8i a3, a12, 13 +40224422: 0b63f6 bgeui a3, 6, 40224431 +40224425: e8a322 movi a2, 0x3e8 +40224428: 401300 ssl a3 +4022442b: a12200 sll a2, a2 +4022442e: f42020 extui a2, a2, 0, 16 +40224431: f3a142 movi a4, 0x1f3 +40224434: f4a132 movi a3, 0x1f4 +40224437: 802240 add a2, a2, a4 +4022443a: 75f701 l32r a0, 40201c18 +4022443d: 0000c0 callx0 a0 +40224440: 7108 l32i.n a0, a1, 28 +40224442: 0d5c22 s16i a2, a12, 26 +40224445: 51d8 l32i.n a13, a1, 20 +40224447: 0e2d mov.n a2, a14 +40224449: 61c8 l32i.n a12, a1, 24 +4022444b: 41e8 l32i.n a14, a1, 16 +4022444d: 31f8 l32i.n a15, a1, 12 +4022444f: 20c112 addi a1, a1, 32 +40224452: f00d ret.n +40224454: f0c112 addi a1, a1, -16 +40224457: 21c9 s32i.n a12, a1, 8 +40224459: 82c8 l32i.n a12, a2, 32 +4022445b: 01e9 s32i.n a14, a1, 0 +4022445d: 330c movi.n a3, 3 +4022445f: 02ed mov.n a14, a2 +40224461: 0c2d mov.n a2, a12 +40224463: 3109 s32i.n a0, a1, 12 +40224465: 11d9 s32i.n a13, a1, 4 +40224467: ff9805 call0 40223de8 +4022446a: 340c movi.n a4, 3 +4022446c: 0c3d mov.n a3, a12 +4022446e: 0e2d mov.n a2, a14 +40224470: ffad85 call0 40223f4c +40224473: 02dd mov.n a13, a2 +40224475: 069256 bnez a2, 402244e2 +40224478: 240c movi.n a4, 2 +4022447a: 933c movi.n a3, 57 +4022447c: 202cc0 or a2, a12, a12 +4022447f: ff9bc5 call0 40223e3c +40224482: 40a232 movi a3, 0x240 +40224485: 202cc0 or a2, a12, a12 +40224488: ff9e45 call0 40223e70 +4022448b: 440c movi.n a4, 4 +4022448d: 233c movi.n a3, 50 +4022448f: 0c2d mov.n a2, a12 +40224491: ff9a85 call0 40223e3c +40224494: bc28 l32i.n a2, a12, 44 +40224496: 014280 slli a4, a2, 24 +40224499: 753820 extui a3, a2, 24, 8 +4022449c: 205430 or a5, a4, a3 +4022449f: 731431 l32r a3, 402010f0 +402244a2: 104230 and a4, a2, a3 +402244a5: 114480 slli a4, a4, 8 +402244a8: 412820 srli a2, a2, 8 +402244ab: 204540 or a4, a5, a4 +402244ae: 103230 and a3, a2, a3 +402244b1: 203430 or a3, a4, a3 +402244b4: 202cc0 or a2, a12, a12 +402244b7: ff9dc5 call0 40223e94 +402244ba: 0c2d mov.n a2, a12 +402244bc: ffa505 call0 40223f10 +402244bf: 0c1c32 l16ui a3, a12, 24 +402244c2: f0a022 movi a2, 240 +402244c5: 332a add.n a3, a3, a2 +402244c7: 4c28 l32i.n a2, a12, 16 +402244c9: f43030 extui a3, a3, 0, 16 +402244cc: 04acc5 call0 40228f9c +402244cf: ff1041 l32r a4, 40224110 +402244d2: 4c38 l32i.n a3, a12, 16 +402244d4: 1c28 l32i.n a2, a12, 4 +402244d6: 0e6d mov.n a6, a14 +402244d8: 354c movi.n a5, 67 +402244da: 081b45 call0 4022c690 +402244dd: 0c2d mov.n a2, a12 +402244df: ffa085 call0 40223ee8 +402244e2: 0d0c42 l8ui a4, a12, 13 +402244e5: 920c movi.n a2, 9 +402244e7: 441b addi.n a4, a4, 1 +402244e9: 743040 extui a3, a4, 0, 8 +402244ec: 0d4c32 s8i a3, a12, 13 +402244ef: 965a41 l32r a4, 40209e58 +402244f2: 0e3237 bltu a2, a3, 40224504 +402244f5: 1123b0 slli a2, a3, 5 +402244f8: c02230 sub a2, a2, a3 +402244fb: a04230 addx4 a4, a2, a3 +402244fe: 1144d0 slli a4, a4, 3 +40224501: f44040 extui a4, a4, 0, 16 +40224504: f3a122 movi a2, 0x1f3 +40224507: f4a132 movi a3, 0x1f4 +4022450a: 242a add.n a2, a4, a2 +4022450c: 75c301 l32r a0, 40201c18 +4022450f: 0000c0 callx0 a0 +40224512: 3108 l32i.n a0, a1, 12 +40224514: 0d5c22 s16i a2, a12, 26 +40224517: 01e8 l32i.n a14, a1, 0 +40224519: 0d2d mov.n a2, a13 +4022451b: 21c8 l32i.n a12, a1, 8 +4022451d: 11d8 l32i.n a13, a1, 4 +4022451f: 10c112 addi a1, a1, 16 +40224522: f00d ret.n +40224524: d0c112 addi a1, a1, -48 +40224527: 91d9 s32i.n a13, a1, 36 +40224529: b109 s32i.n a0, a1, 44 +4022452b: a1c9 s32i.n a12, a1, 40 +4022452d: 02dd mov.n a13, a2 +4022452f: 112216 beqz a2, 40224645 +40224532: 82c8 l32i.n a12, a2, 32 +40224534: 10dc16 beqz a12, 40224645 +40224537: 020c movi.n a2, 0 +40224539: 125c22 s16i a2, a12, 36 +4022453c: ec28 l32i.n a2, a12, 56 +4022453e: 1c0226 beqi a2, -1, 4022455e +40224541: c33c movi.n a3, 60 +40224543: 1ec222 addi a2, a2, 30 +40224546: 766101 l32r a0, 40201ecc +40224549: 0000c0 callx0 a0 +4022454c: 76a831 l32r a3, 40201fec +4022454f: 01b327 bgeu a3, a2, 40224554 +40224552: 032d mov.n a2, a3 +40224554: 135c22 s16i a2, a12, 38 +40224557: 32cc bnez.n a2, 4022455e +40224559: 120c movi.n a2, 1 +4022455b: 135c22 s16i a2, a12, 38 +4022455e: fc28 l32i.n a2, a12, 60 +40224560: 230226 beqi a2, -1, 40224587 +40224563: c33c movi.n a3, 60 +40224565: 1ec222 addi a2, a2, 30 +40224568: 765901 l32r a0, 40201ecc +4022456b: 0000c0 callx0 a0 +4022456e: 769f31 l32r a3, 40201fec +40224571: 01b327 bgeu a3, a2, 40224576 +40224574: 032d mov.n a2, a3 +40224576: 0e5c22 s16i a2, a12, 28 +40224579: 42cc bnez.n a2, 40224581 +4022457b: 01a022 movi a2, 1 +4022457e: 0e5c22 s16i a2, a12, 28 +40224581: 0e1c22 l16ui a2, a12, 28 +40224584: 105c22 s16i a2, a12, 32 +40224587: 102c22 l32i a2, a12, 64 +4022458a: 240226 beqi a2, -1, 402245b2 +4022458d: c33c movi.n a3, 60 +4022458f: 1ec222 addi a2, a2, 30 +40224592: 764e01 l32r a0, 40201ecc +40224595: 0000c0 callx0 a0 +40224598: 769531 l32r a3, 40201fec +4022459b: 01b327 bgeu a3, a2, 402245a0 +4022459e: 032d mov.n a2, a3 +402245a0: 0f5c22 s16i a2, a12, 30 +402245a3: 005256 bnez a2, 402245ac +402245a6: 01a022 movi a2, 1 +402245a9: 0f5c22 s16i a2, a12, 30 +402245ac: 0f1c22 l16ui a2, a12, 30 +402245af: 115c22 s16i a2, a12, 34 +402245b2: 0f1c22 l16ui a2, a12, 30 +402245b5: 0e1c32 l16ui a3, a12, 28 +402245b8: 083327 bltu a3, a2, 402245c4 +402245bb: 005216 beqz a2, 402245c4 +402245be: 00a022 movi a2, 0 +402245c1: 0e5c22 s16i a2, a12, 28 +402245c4: 0e0c22 l8ui a2, a12, 14 +402245c7: 328c beqz.n a2, 402245ce +402245c9: cc28 l32i.n a2, a12, 48 +402245cb: 000846 j 402245f0 +402245ce: 2d28 l32i.n a2, a13, 8 +402245d0: c2dc bnez.n a2, 402245f0 +402245d2: 2c0c22 l8ui a2, a12, 44 +402245d5: 013280 slli a3, a2, 24 +402245d8: 005396 bltz a3, 402245e1 +402245db: ffa022 movi a2, 255 +402245de: 000386 j 402245f0 +402245e1: bfa032 movi a3, 191 +402245e4: 05b327 bgeu a3, a2, 402245ed +402245e7: af2621 l32r a2, 40210280 +402245ea: 000086 j 402245f0 +402245ed: 767f21 l32r a2, 40201fec +402245f0: 4129 s32i.n a2, a1, 16 +402245f2: dc28 l32i.n a2, a12, 52 +402245f4: 22dc bnez.n a2, 4022460a +402245f6: 3d28 l32i.n a2, a13, 12 +402245f8: 00e256 bnez a2, 4022460a +402245fb: 042122 l32i a2, a1, 16 +402245fe: 0b2c32 l32i a3, a12, 44 +40224601: 103320 and a3, a3, a2 +40224604: 83c621 l32r a2, 4020551c +40224607: 202320 or a2, a3, a2 +4022460a: 3129 s32i.n a2, a1, 12 +4022460c: 1d28 l32i.n a2, a13, 4 +4022460e: 2ccc32 addi a3, a12, 44 +40224611: 2129 s32i.n a2, a1, 8 +40224613: 2d28 l32i.n a2, a13, 8 +40224615: 1129 s32i.n a2, a1, 4 +40224617: 3d28 l32i.n a2, a13, 12 +40224619: 0129 s32i.n a2, a1, 0 +4022461b: 202dd0 or a2, a13, a13 +4022461e: 044bc5 call0 40228adc +40224621: 10c132 addi a3, a1, 16 +40224624: 0d2d mov.n a2, a13 +40224626: 045bc5 call0 40228be4 +40224629: 31cb addi.n a3, a1, 12 +4022462b: 0d2d mov.n a2, a13 +4022462d: 045c05 call0 40228bf0 +40224630: 0d2d mov.n a2, a13 +40224632: 045c85 call0 40228bfc +40224635: 314b addi.n a3, a1, 4 +40224637: 014d mov.n a4, a1 +40224639: 218b addi.n a2, a1, 8 +4022463b: ec7045 call0 40210d40 +4022463e: a30c movi.n a3, 10 +40224640: 0c2d mov.n a2, a12 +40224642: ff7a45 call0 40223de8 +40224645: b108 l32i.n a0, a1, 44 +40224647: a1c8 l32i.n a12, a1, 40 +40224649: 91d8 l32i.n a13, a1, 36 +4022464b: 30c112 addi a1, a1, 48 +4022464e: f00d ret.n +40224650: fee6a0 excw +40224653: 3f .byte 0x3f +40224654: e6ac beqz.n a6, 40224686 +40224656: fe .byte 0xfe +40224657: 3f .byte 0x3f +40224658: d338 l32i.n a3, a3, 52 +4022465a: fe .byte 0xfe +4022465b: 3f .byte 0x3f +4022465c: d0c112 addi a1, a1, -48 +4022465f: b109 s32i.n a0, a1, 44 +40224661: a1c9 s32i.n a12, a1, 40 +40224663: 91d9 s32i.n a13, a1, 36 +40224665: 81e9 s32i.n a14, a1, 32 +40224667: 71f9 s32i.n a15, a1, 28 +40224669: 030c movi.n a3, 0 +4022466b: c239 s32i.n a3, a2, 48 +4022466d: d239 s32i.n a3, a2, 52 +4022466f: fff831 l32r a3, 40224650 +40224672: 030342 l8ui a4, a3, 3 +40224675: 748c beqz.n a4, 40224680 +40224677: fff741 l32r a4, 40224654 +4022467a: 032442 l32i a4, a4, 12 +4022467d: 0e6242 s32i a4, a2, 56 +40224680: 040342 l8ui a4, a3, 4 +40224683: 648c beqz.n a4, 4022468d +40224685: fff341 l32r a4, 40224654 +40224688: 4448 l32i.n a4, a4, 16 +4022468a: 000106 j 40224692 +4022468d: e248 l32i.n a4, a2, 56 +4022468f: 414140 srli a4, a4, 1 +40224692: f249 s32i.n a4, a2, 60 +40224694: 050342 l8ui a4, a3, 5 +40224697: 648c beqz.n a4, 402246a1 +40224699: ffee41 l32r a4, 40224654 +4022469c: 5448 l32i.n a4, a4, 20 +4022469e: 0001c6 j 402246a9 +402246a1: e248 l32i.n a4, a2, 56 +402246a3: f04440 subx8 a4, a4, a4 +402246a6: 414340 srli a4, a4, 3 +402246a9: 2288 l32i.n a8, a2, 8 +402246ab: 106242 s32i a4, a2, 64 +402246ae: 110852 l8ui a5, a8, 17 +402246b1: 100872 l8ui a7, a8, 16 +402246b4: 120842 l8ui a4, a8, 18 +402246b7: 115580 slli a5, a5, 8 +402246ba: 114400 slli a4, a4, 16 +402246bd: 206570 or a6, a5, a7 +402246c0: 205460 or a5, a4, a6 +402246c3: 130842 l8ui a4, a8, 19 +402246c6: 014480 slli a4, a4, 24 +402246c9: 204450 or a4, a4, a5 +402246cc: b249 s32i.n a4, a2, 44 +402246ce: 060342 l8ui a4, a3, 6 +402246d1: 94ac beqz.n a4, 402246fe +402246d3: ffe041 l32r a4, 40224654 +402246d6: 6458 l32i.n a5, a4, 24 +402246d8: 016580 slli a6, a5, 24 +402246db: 754850 extui a4, a5, 24, 8 +402246de: 207640 or a7, a6, a4 +402246e1: 728341 l32r a4, 402010f0 +402246e4: 106540 and a6, a5, a4 +402246e7: 116680 slli a6, a6, 8 +402246ea: 415850 srli a5, a5, 8 +402246ed: 206760 or a6, a7, a6 +402246f0: 104540 and a4, a5, a4 +402246f3: 204640 or a4, a6, a4 +402246f6: c249 s32i.n a4, a2, 48 +402246f8: 140c movi.n a4, 1 +402246fa: 0000c6 j 40224701 +402246fd: a04200 addx4 a4, a2, a0 +40224700: 424200 excw +40224703: 0e .byte 0xe +40224704: 070342 l8ui a4, a3, 7 +40224707: 025416 beqz a4, 40224730 +4022470a: ffd241 l32r a4, 40224654 +4022470d: 072452 l32i a5, a4, 28 +40224710: 016580 slli a6, a5, 24 +40224713: 754850 extui a4, a5, 24, 8 +40224716: 207640 or a7, a6, a4 +40224719: 727541 l32r a4, 402010f0 +4022471c: 106540 and a6, a5, a4 +4022471f: 116680 slli a6, a6, 8 +40224722: 415850 srli a5, a5, 8 +40224725: 206760 or a6, a7, a6 +40224728: 104540 and a4, a5, a4 +4022472b: 204640 or a4, a6, a4 +4022472e: d249 s32i.n a4, a2, 52 +40224730: ffca21 l32r a2, 40224658 +40224733: 000222 l8ui a2, a2, 0 +40224736: 03e256 bnez a2, 40224778 +40224739: ffc6d1 l32r a13, 40224654 +4022473c: 726dc1 l32r a12, 402010f0 +4022473f: 03ed mov.n a14, a3 +40224741: 0f0c movi.n a15, 0 +40224743: 080e32 l8ui a3, a14, 8 +40224746: 0f2d mov.n a2, a15 +40224748: ee1b addi.n a14, a14, 1 +4022474a: ff1b addi.n a15, a15, 1 +4022474c: dd4b addi.n a13, a13, 4 +4022474e: 63ac beqz.n a3, 40224778 +40224750: 7d38 l32i.n a3, a13, 28 +40224752: 754830 extui a4, a3, 24, 8 +40224755: 015380 slli a5, a3, 24 +40224758: 205540 or a5, a5, a4 +4022475b: 1043c0 and a4, a3, a12 +4022475e: 114480 slli a4, a4, 8 +40224761: 413830 srli a3, a3, 8 +40224764: 204540 or a4, a5, a4 +40224767: 1033c0 and a3, a3, a12 +4022476a: 203430 or a3, a4, a3 +4022476d: 0139 s32i.n a3, a1, 0 +4022476f: 013d mov.n a3, a1 +40224771: 01db45 call0 40226528 +40224774: fff2c6 j 40224743 +40224777: b10800 excw +4022477a: a1c8 l32i.n a12, a1, 40 +4022477c: 91d8 l32i.n a13, a1, 36 +4022477e: 81e8 l32i.n a14, a1, 32 +40224780: 71f8 l32i.n a15, a1, 28 +40224782: 30c112 addi a1, a1, 48 +40224785: f00d ret.n +40224787: 056c00 extui a6, a0, 28, 1 +4022478a: 124023 excw +4022478d: e2a0c1 l32r a12, 4021d210 +40224790: ed1461 l32r a6, 4021fbe0 +40224793: 822802 l32i a0, a8, 0x208 +40224796: 1361f2 s32i a15, a1, 76 +40224799: 4129 s32i.n a2, a1, 16 +4022479b: 051422 l16ui a2, a4, 10 +4022479e: 176102 s32i a0, a1, 92 +402247a1: 1661c2 s32i a12, a1, 88 +402247a4: 1561d2 s32i a13, a1, 84 +402247a7: b32c movi.n a3, 43 +402247a9: 04fd mov.n a15, a4 +402247ab: 1468 l32i.n a6, a4, 4 +402247ad: 023327 bltu a3, a2, 402247b3 +402247b0: 004c86 j 402248e6 +402247b3: 000622 l8ui a2, a6, 0 +402247b6: 022226 beqi a2, 2, 402247bc +402247b9: 004a46 j 402248e6 +402247bc: 320e32 l8ui a3, a14, 50 +402247bf: 33ce42 addi a4, a14, 51 +402247c2: 062d mov.n a2, a6 +402247c4: 363a add.n a3, a6, a3 +402247c6: 131327 beq a3, a2, 402247dd +402247c9: 000482 l8ui a8, a4, 0 +402247cc: 1c0252 l8ui a5, a2, 28 +402247cf: 441b addi.n a4, a4, 1 +402247d1: 221b addi.n a2, a2, 1 +402247d3: 021857 beq a8, a5, 402247d9 +402247d6: 004306 j 402248e6 +402247d9: fffa46 j 402247c6 +402247dc: 063200 excw +402247df: 065205 call0 4022ad00 +402247e2: 062204 excw +402247e5: 338006 j 402315e9 <_irom0_text_end+0xa6d> +402247e8: 435011 l32r a1, 401f5528 <_lit4_end+0xef1fc> +402247eb: 220020 excw +402247ee: 324011 l32r a1, 401f10f0 <_lit4_end+0xeadc4> +402247f1: 062220 excw +402247f4: 228007 bany a0, a0, 4022481a +402247f7: 223001 l32r a0, 401ed0b8 <_lit4_end+0xe6d8c> +402247fa: 428020 excw +402247fd: 382001 l32r a0, 401f2880 <_lit4_end+0xec554> +40224800: 543075 excw +40224803: 3b3120 excw +40224806: 423072 excw +40224809: 448010 extui a8, a1, 0, 5 +4022480c: 282011 l32r a1, 401ee88c <_lit4_end+0xe8560> +4022480f: 454041 l32r a4, 401f5d10 <_lit4_end+0xef9e4> +40224812: 223020 excw +40224815: 242010 extui a2, a1, 0, 3 +40224818: 414820 srli a4, a2, 8 +4022481b: 0438 l32i.n a3, a4, 0 +4022481d: 021237 beq a2, a3, 40224823 +40224820: 003086 j 402248e6 +40224823: ff8b21 l32r a2, 40224650 +40224826: 030c movi.n a3, 0 +40224828: a40c movi.n a4, 10 +4022482a: 71f901 l32r a0, 40201010 <_irom0_text_start> +4022482d: 0000c0 callx0 a0 +40224830: 051f22 l16ui a2, a15, 10 +40224833: b32c movi.n a3, 43 +40224835: 023327 bltu a3, a2, 4022483b +40224838: 002a86 j 402248e6 +4022483b: 1f28 l32i.n a2, a15, 4 +4022483d: 4158 l32i.n a5, a1, 16 +4022483f: 041f92 l16ui a9, a15, 8 +40224842: 2529 s32i.n a2, a5, 8 +40224844: 070c movi.n a7, 0 +40224846: f0a0c2 movi a12, 240 +40224849: 0f8d mov.n a8, a15 +4022484b: 051822 l16ui a2, a8, 10 +4022484e: 02bc27 bgeu a12, a2, 40224854 +40224851: 002cc6 j 40224908 +40224854: 0888 l32i.n a8, a8, 0 +40224856: c0cc20 sub a12, a12, a2 +40224859: c09920 sub a9, a9, a2 +4022485c: f4c0c0 extui a12, a12, 0, 16 +4022485f: f49090 extui a9, a9, 0, 16 +40224862: 080816 beqz a8, 402248e6 +40224865: fff886 j 4022484b +40224868: 260b addi.n a2, a6, -1 +4022486a: 543220 extui a3, a2, 2, 6 +4022486d: 1123a0 slli a2, a3, 6 +40224870: c02230 sub a2, a2, a3 +40224873: a06260 addx4 a6, a2, a6 +40224876: 746060 extui a6, a6, 0, 8 +40224879: d3da add.n a13, a3, a13 +4022487b: 000122 l8ui a2, a1, 0 +4022487e: 204666 bnei a6, 4, 402248a2 +40224881: 002132 l32i a3, a1, 0 +40224884: 014380 slli a4, a3, 24 +40224887: 752830 extui a2, a3, 24, 8 +4022488a: 205420 or a5, a4, a2 +4022488d: 721821 l32r a2, 402010f0 +40224890: 104320 and a4, a3, a2 +40224893: 114480 slli a4, a4, 8 +40224896: 413830 srli a3, a3, 8 +40224899: 204540 or a4, a5, a4 +4022489c: 102320 and a2, a3, a2 +4022489f: 202420 or a2, a4, a2 +402248a2: 0129 s32i.n a2, a1, 0 +402248a4: ff6b21 l32r a2, 40224650 +402248a7: 130c movi.n a3, 1 +402248a9: 22da add.n a2, a2, a13 +402248ab: 004232 s8i a3, a2, 0 +402248ae: ff6921 l32r a2, 40224654 +402248b1: a0dd20 addx4 a13, a13, a2 +402248b4: 0128 l32i.n a2, a1, 0 +402248b6: 006d22 s32i a2, a13, 0 +402248b9: 051822 l16ui a2, a8, 10 +402248bc: 4c3c27 bltu a12, a2, 4022490c +402248bf: c0cc20 sub a12, a12, a2 +402248c2: c09920 sub a9, a9, a2 +402248c5: f4c0c0 extui a12, a12, 0, 16 +402248c8: f49090 extui a9, a9, 0, 16 +402248cb: 02bc97 bgeu a12, a9, 402248d1 +402248ce: 007986 j 40224ab8 +402248d1: ff5f31 l32r a3, 40224650 +402248d4: 000322 l8ui a2, a3, 0 +402248d7: 204330 or a4, a3, a3 +402248da: 1e6256 bnez a2, 40224ac4 +402248dd: 1f3756 bnez a7, 40224ad4 +402248e0: 010422 l8ui a2, a4, 1 +402248e3: 21a256 bnez a2, 40224b01 +402248e6: 042132 l32i a3, a1, 16 +402248e9: 00a022 movi a2, 0 +402248ec: 026322 s32i a2, a3, 8 +402248ef: 0f2d mov.n a2, a15 +402248f1: 044ac5 call0 40228da0 +402248f4: 172102 l32i a0, a1, 92 +402248f7: 1621c2 l32i a12, a1, 88 +402248fa: 1521d2 l32i a13, a1, 84 +402248fd: 1421e2 l32i a14, a1, 80 +40224900: 1321f2 l32i a15, a1, 76 +40224903: 60c112 addi a1, a1, 96 +40224906: f00d ret.n +40224908: 1848 l32i.n a4, a8, 4 +4022490a: 7149 s32i.n a4, a1, 28 +4022490c: 7138 l32i.n a3, a1, 28 +4022490e: 43ca add.n a4, a3, a12 +40224910: 000422 l8ui a2, a4, 0 +40224913: babc97 bgeu a12, a9, 402248d1 +40224916: 01af52 movi a5, -255 +40224919: 325a add.n a3, a2, a5 +4022491b: fb2316 beqz a3, 402248d1 +4022491e: 051852 l16ui a5, a8, 10 +40224921: ac2b addi.n a10, a12, 2 +40224923: 3c1b addi.n a3, a12, 1 +40224925: f4a0a0 extui a10, a10, 0, 16 +40224928: 05a357 bge a3, a5, 40224931 +4022492b: 010432 l8ui a3, a4, 1 +4022492e: 000246 j 4022493b +40224931: 0838 l32i.n a3, a8, 0 +40224933: 082316 beqz a3, 402249b9 +40224936: 1338 l32i.n a3, a3, 4 +40224938: 000332 l8ui a3, a3, 0 +4022493b: 343c movi.n a4, 51 +4022493d: 7f1247 beq a2, a4, 402249c0 +40224940: 143427 bltu a4, a2, 40224958 +40224943: 036d mov.n a6, a3 +40224945: 6d0c movi.n a13, 6 +40224947: 021266 bnei a2, 1, 4022494d +4022494a: 003506 j 40224a22 +4022494d: 52bc beqz.n a2, 40224986 +4022494f: 463226 beqi a2, 3, 40224999 +40224952: 4f12d7 beq a2, a13, 402249a5 +40224955: 003146 j 40224a1e +40224958: 643c movi.n a4, 54 +4022495a: 029247 bne a2, a4, 40224960 +4022495d: 0024c6 j 402249f4 +40224960: 0c3427 bltu a4, a2, 40224970 +40224963: 443c movi.n a4, 52 +40224965: 691247 beq a2, a4, 402249d2 +40224968: 543c movi.n a4, 53 +4022496a: 721247 beq a2, a4, 402249e0 +4022496d: 002b46 j 40224a1e +40224970: a43c movi.n a4, 58 +40224972: 029247 bne a2, a4, 40224978 +40224975: 0022c6 j 40224a04 +40224978: b43c movi.n a4, 59 +4022497a: 029247 bne a2, a4, 40224980 +4022497d: 0024c6 j 40224a14 +40224980: 002686 j 40224a1e +40224983: c2cc00 excw +40224986: cc0b addi.n a12, a12, -1 +40224988: 060c movi.n a6, 0 +4022498a: f4c0c0 extui a12, a12, 0, 16 +4022498d: fd7c movi.n a13, -1 +4022498f: 063d mov.n a3, a6 +40224991: 002346 j 40224a22 +40224994: 083266 bnei a2, 3, 402249a0 +40224997: 030c movi.n a3, 0 +40224999: 7d0c movi.n a13, 7 +4022499b: 460c movi.n a6, 4 +4022499d: 002046 j 40224a22 +402249a0: 786266 bnei a2, 6, 40224a1c +402249a3: 030c movi.n a3, 0 +402249a5: 820c movi.n a2, 8 +402249a7: 206330 or a6, a3, a3 +402249aa: 02b237 bgeu a2, a3, 402249b0 +402249ad: 08a062 movi a6, 8 +402249b0: 746060 extui a6, a6, 0, 8 +402249b3: 8d0c movi.n a13, 8 +402249b5: 001a46 j 40224a22 +402249b8: 333c00 excw +402249bb: 289237 bne a2, a3, 402249e7 +402249be: 030c movi.n a3, 0 +402249c0: 036d mov.n a6, a3 +402249c2: 3d0c movi.n a13, 3 +402249c4: 001686 j 40224a22 +402249c7: 332700 excw +402249ca: 433c31 l32r a3, 401f56bc <_lit4_end+0xef390> +402249cd: 089237 bne a2, a3, 402249d9 +402249d0: 030c movi.n a3, 0 +402249d2: 036d mov.n a6, a3 +402249d4: 0d0c movi.n a13, 0 +402249d6: 001206 j 40224a22 +402249d9: 533c movi.n a3, 53 +402249db: 3d9237 bne a2, a3, 40224a1c +402249de: 030c movi.n a3, 0 +402249e0: 036d mov.n a6, a3 +402249e2: 1d0c movi.n a13, 1 +402249e4: 000e86 j 40224a22 +402249e7: 023327 bltu a3, a2, 402249ed +402249ea: 003f86 j 40224aec +402249ed: 633c movi.n a3, 54 +402249ef: d59237 bne a2, a3, 402249c8 +402249f2: 030c movi.n a3, 0 +402249f4: 036d mov.n a6, a3 +402249f6: 2d0c movi.n a13, 2 +402249f8: 000986 j 40224a22 +402249fb: 3c0000 excw +402249fe: 9237a3 excw +40224a01: 0c0a add.n a0, a12, a0 +40224a03: 036d03 excw +40224a06: 4d0c movi.n a13, 4 +40224a08: 000586 j 40224a22 +40224a0b: 3c0000 excw +40224a0e: 9237b3 excw +40224a11: 0c09 s32i.n a0, a12, 0 +40224a13: 036d03 excw +40224a16: 5d0c movi.n a13, 5 +40224a18: 000186 j 40224a22 +40224a1b: 030c00 excw +40224a1e: fd7c movi.n a13, -1 +40224a20: 060c movi.n a6, 0 +40224a22: cc2b addi.n a12, a12, 2 +40224a24: cc3a add.n a12, a12, a3 +40224a26: f4c0c0 extui a12, a12, 0, 16 +40224a29: e8c616 beqz a6, 402248b9 +40224a2c: 020c movi.n a2, 0 +40224a2e: 0129 s32i.n a2, a1, 0 +40224a30: ff0821 l32r a2, 40224650 +40224a33: 06bd mov.n a11, a6 +40224a35: 2d2a add.n a2, a13, a2 +40224a37: 6129 s32i.n a2, a1, 24 +40224a39: ff0621 l32r a2, 40224654 +40224a3c: a02d20 addx4 a2, a13, a2 +40224a3f: 5129 s32i.n a2, a1, 20 +40224a41: 440c movi.n a4, 4 +40224a43: 02bb47 bgeu a11, a4, 40224a49 +40224a46: f440b0 extui a4, a11, 0, 16 +40224a49: 205aa0 or a5, a10, a10 +40224a4c: 202880 or a2, a8, a8 +40224a4f: 203110 or a3, a1, a1 +40224a52: a169 s32i.n a6, a1, 40 +40224a54: d179 s32i.n a7, a1, 52 +40224a56: 9189 s32i.n a8, a1, 36 +40224a58: c199 s32i.n a9, a1, 48 +40224a5a: 81a9 s32i.n a10, a1, 32 +40224a5c: b1b9 s32i.n a11, a1, 44 +40224a5e: 046cc5 call0 4022912c +40224a61: b1b8 l32i.n a11, a1, 44 +40224a63: a168 l32i.n a6, a1, 40 +40224a65: d178 l32i.n a7, a1, 52 +40224a67: 9188 l32i.n a8, a1, 36 +40224a69: c198 l32i.n a9, a1, 48 +40224a6b: 81a8 l32i.n a10, a1, 32 +40224a6d: 025bf6 bgeui a11, 5, 40224a73 +40224a70: ff7d06 j 40224868 +40224a73: 6128 l32i.n a2, a1, 24 +40224a75: 130c movi.n a3, 1 +40224a77: 004232 s8i a3, a2, 0 +40224a7a: 0138 l32i.n a3, a1, 0 +40224a7c: fccbb2 addi a11, a11, -4 +40224a7f: 014380 slli a4, a3, 24 +40224a82: 752830 extui a2, a3, 24, 8 +40224a85: 205420 or a5, a4, a2 +40224a88: 719a21 l32r a2, 402010f0 +40224a8b: aa4b addi.n a10, a10, 4 +40224a8d: 104320 and a4, a3, a2 +40224a90: 114480 slli a4, a4, 8 +40224a93: 413830 srli a3, a3, 8 +40224a96: 204540 or a4, a5, a4 +40224a99: 102320 and a2, a3, a2 +40224a9c: 202420 or a2, a4, a2 +40224a9f: 6158 l32i.n a5, a1, 24 +40224aa1: 5148 l32i.n a4, a1, 20 +40224aa3: 551b addi.n a5, a5, 1 +40224aa5: 0429 s32i.n a2, a4, 0 +40224aa7: 444b addi.n a4, a4, 4 +40224aa9: 74b0b0 extui a11, a11, 0, 8 +40224aac: f4a0a0 extui a10, a10, 0, 16 +40224aaf: 6159 s32i.n a5, a1, 24 +40224ab1: 5149 s32i.n a4, a1, 20 +40224ab3: ffe286 j 40224a41 +40224ab6: 160000 excw +40224ab9: e159 s32i.n a5, a1, 56 +40224abb: 0888 l32i.n a8, a8, 0 +40224abd: 1828 l32i.n a2, a8, 4 +40224abf: 7129 s32i.n a2, a1, 28 +40224ac1: ff91c6 j 4022490c +40224ac4: fee421 l32r a2, 40224654 +40224ac7: 050c movi.n a5, 0 +40224ac9: 0228 l32i.n a2, a2, 0 +40224acb: 004352 s8i a5, a3, 0 +40224ace: 261226 beqi a2, 1, 40224af8 +40224ad1: 0b2266 bnei a2, 2, 40224ae0 +40224ad4: 070c movi.n a7, 0 +40224ad6: 6ca092 movi a9, 108 +40224ad9: cc2c movi.n a12, 44 +40224adb: ff5a86 j 40224849 +40224ade: 260000 excw +40224ae1: 860232 l8ui a3, a2, 134 +40224ae4: ff7d excw +40224ae6: 170c movi.n a7, 1 +40224ae8: 000306 j 40224af8 +40224aeb: 122600 excw +40224aee: a44602 s8i a0, a6, 164 +40224af1: ff .byte 0xff +40224af2: 0acd mov.n a12, a10 +40224af4: ff7046 j 402248b9 +40224af7: a09200 addx4 a9, a2, a0 +40224afa: c2ec bnez.n a2, 40224b2a +40224afc: c66ca0 excw +40224aff: 21ff51 l32r a5, 401ed2fc <_lit4_end+0xe6fd0> +40224b02: 32fed4 excw +40224b05: 660402 l8ui a0, a4, 102 +40224b08: 382e53 excw +40224b0b: 032241 l32r a4, 401e5794 <_lit4_end+0xdf468> +40224b0e: 660c movi.n a6, 6 +40224b10: 220d12 l8ui a1, a13, 34 +40224b13: 2e .byte 0x2e +40224b14: 4508 l32i.n a0, a5, 16 +40224b16: 2dffb4 excw +40224b19: 0e .byte 0xe +40224b1a: ff2e45 call0 40223e00 +40224b1d: ff7146 j 402248e6 +40224b20: fdc222 addi a2, a2, -3 +40224b23: 742020 extui a2, a2, 0, 8 +40224b26: 0232b6 bltui a2, 3, 40224b2c +40224b29: ff6e46 j 402248e6 +40224b2c: 8e28 l32i.n a2, a14, 32 +40224b2e: ffb2c5 call0 4022465c +40224b31: 0e2d mov.n a2, a14 +40224b33: ff9f05 call0 40224524 +40224b36: ff6b06 j 402248e6 +40224b39: 446366 bnei a3, 6, 40224b81 +40224b3c: 4148 l32i.n a4, a1, 16 +40224b3e: 0c0432 l8ui a3, a4, 12 +40224b41: fdc322 addi a2, a3, -3 +40224b44: 742020 extui a2, a2, 0, 8 +40224b47: 0532b6 bltui a2, 3, 40224b50 +40224b4a: 021326 beqi a3, 1, 40224b50 +40224b4d: ff6546 j 402248e6 +40224b50: 202ee0 or a2, a14, a14 +40224b53: 082ed2 l32i a13, a14, 32 +40224b56: 040e05 call0 40228c38 +40224b59: ff0bc1 l32r a12, 40224788 +40224b5c: 0e2d mov.n a2, a14 +40224b5e: 203cc0 or a3, a12, a12 +40224b61: 03f785 call0 40228adc +40224b64: 0c3d mov.n a3, a12 +40224b66: 0e2d mov.n a2, a14 +40224b68: 040845 call0 40228bf0 +40224b6b: 0c3d mov.n a3, a12 +40224b6d: 0e2d mov.n a2, a14 +40224b6f: 040745 call0 40228be4 +40224b72: 0d2d mov.n a2, a13 +40224b74: c30c movi.n a3, 12 +40224b76: ff2705 call0 40223de8 +40224b79: 0e2d mov.n a2, a14 +40224b7b: ff59c5 call0 40224118 +40224b7e: ff5906 j 402248e6 +40224b81: 022326 beqi a3, 2, 40224b87 +40224b84: ff5786 j 402248e6 +40224b87: 4158 l32i.n a5, a1, 16 +40224b89: 0c0532 l8ui a3, a5, 12 +40224b8c: 026326 beqi a3, 6, 40224b92 +40224b8f: ff54c6 j 402248e6 +40224b92: 030c movi.n a3, 0 +40224b94: 0d5532 s16i a3, a5, 26 +40224b97: 020432 l8ui a3, a4, 2 +40224b9a: 8e68 l32i.n a6, a14, 32 +40224b9c: d46316 beqz a3, 402248e6 +40224b9f: 2238 l32i.n a3, a2, 8 +40224ba1: 2688 l32i.n a8, a6, 8 +40224ba3: 014380 slli a4, a3, 24 +40224ba6: 752830 extui a2, a3, 24, 8 +40224ba9: 205420 or a5, a4, a2 +40224bac: 715121 l32r a2, 402010f0 +40224baf: 104320 and a4, a3, a2 +40224bb2: 114480 slli a4, a4, 8 +40224bb5: 413830 srli a3, a3, 8 +40224bb8: 204540 or a4, a5, a4 +40224bbb: 102320 and a2, a3, a2 +40224bbe: 202420 or a2, a4, a2 +40224bc1: a629 s32i.n a2, a6, 40 +40224bc3: 110832 l8ui a3, a8, 17 +40224bc6: 100852 l8ui a5, a8, 16 +40224bc9: 120822 l8ui a2, a8, 18 +40224bcc: 113380 slli a3, a3, 8 +40224bcf: 204350 or a4, a3, a5 +40224bd2: 112200 slli a2, a2, 16 +40224bd5: 203240 or a3, a2, a4 +40224bd8: 130822 l8ui a2, a8, 19 +40224bdb: 012280 slli a2, a2, 24 +40224bde: 202230 or a2, a2, a3 +40224be1: b629 s32i.n a2, a6, 44 +40224be3: 0e2d mov.n a2, a14 +40224be5: ff6a05 call0 40224288 +40224be8: ff3e86 j 402248e6 + ... + +40224bec : +40224bec: f0c112 addi a1, a1, -16 +40224bef: 21c9 s32i.n a12, a1, 8 +40224bf1: 03cd mov.n a12, a3 +40224bf3: 11d9 s32i.n a13, a1, 4 +40224bf5: 444c movi.n a4, 68 +40224bf7: 02dd mov.n a13, a2 +40224bf9: 030c movi.n a3, 0 +40224bfb: 0c2d mov.n a2, a12 +40224bfd: 3109 s32i.n a0, a1, 12 +40224bff: 710401 l32r a0, 40201010 <_irom0_text_start> +40224c02: 0000c0 callx0 a0 +40224c05: 3108 l32i.n a0, a1, 12 +40224c07: 8dc9 s32i.n a12, a13, 32 +40224c09: 21c8 l32i.n a12, a1, 8 +40224c0b: 11d8 l32i.n a13, a1, 4 +40224c0d: 10c112 addi a1, a1, 16 +40224c10: f00d ret.n +40224c12: 630000 excw +40224c15: fe88 l32i.n a8, a14, 60 +40224c17: 3f .byte 0x3f + +40224c18 : +40224c18: f0c112 addi a1, a1, -16 +40224c1b: 21c9 s32i.n a12, a1, 8 +40224c1d: 02cd mov.n a12, a2 +40224c1f: 8228 l32i.n a2, a2, 32 +40224c21: 3109 s32i.n a0, a1, 12 +40224c23: e28c beqz.n a2, 40224c35 +40224c25: fffb31 l32r a3, 40224c14 +40224c28: 96a242 movi a4, 0x296 +40224c2b: 723701 l32r a0, 40201508 +40224c2e: 0000c0 callx0 a0 +40224c31: 020c movi.n a2, 0 +40224c33: 8c29 s32i.n a2, a12, 32 +40224c35: 3108 l32i.n a0, a1, 12 +40224c37: 21c8 l32i.n a12, a1, 8 +40224c39: 10c112 addi a1, a1, 16 +40224c3c: f00d ret.n + ... + +40224c40 : +40224c40: a0c112 addi a1, a1, -96 +40224c43: 1561d2 s32i a13, a1, 84 +40224c46: 176102 s32i a0, a1, 92 +40224c49: 1661c2 s32i a12, a1, 88 +40224c4c: 02dd mov.n a13, a2 +40224c4e: 087216 beqz a2, 40224cd9 +40224c51: 444c movi.n a4, 68 +40224c53: 030c movi.n a3, 0 +40224c55: 012d mov.n a2, a1 +40224c57: 70ee01 l32r a0, 40201010 <_irom0_text_start> +40224c5a: 0000c0 callx0 a0 +40224c5d: 012d mov.n a2, a1 +40224c5f: 830c movi.n a3, 8 +40224c61: ff1845 call0 40223de8 +40224c64: 8d28 l32i.n a2, a13, 32 +40224c66: 228c beqz.n a2, 40224c6c +40224c68: 12c8 l32i.n a12, a2, 4 +40224c6a: fcdc bnez.n a12, 40224c8d +40224c6c: 078985 call0 4022c508 +40224c6f: 20c220 or a12, a2, a2 +40224c72: 063216 beqz a2, 40224cd9 +40224c75: 080232 l8ui a3, a2, 8 +40224c78: 016122 s32i a2, a1, 4 +40224c7b: 022c movi.n a2, 32 +40224c7d: 202320 or a2, a3, a2 +40224c80: fec231 l32r a3, 40224788 +40224c83: 084c22 s8i a2, a12, 8 +40224c86: 444c movi.n a4, 68 +40224c88: 0c2d mov.n a2, a12 +40224c8a: 079005 call0 4022c58c +40224c8d: 840c movi.n a4, 8 +40224c8f: 013d mov.n a3, a1 +40224c91: 0d2d mov.n a2, a13 +40224c93: ff2b85 call0 40223f4c +40224c96: 038256 bnez a2, 40224cd2 +40224c99: 240c movi.n a4, 2 +40224c9b: 933c movi.n a3, 57 +40224c9d: 012d mov.n a2, a1 +40224c9f: ff19c5 call0 40223e3c +40224ca2: 181d32 l16ui a3, a13, 48 +40224ca5: 012d mov.n a2, a1 +40224ca7: ff1c85 call0 40223e70 +40224caa: 012d mov.n a2, a1 +40224cac: ff2605 call0 40223f10 +40224caf: 0c1132 l16ui a3, a1, 24 +40224cb2: f0a022 movi a2, 240 +40224cb5: 332a add.n a3, a3, a2 +40224cb7: 4128 l32i.n a2, a1, 16 +40224cb9: f43030 extui a3, a3, 0, 16 +40224cbc: 042dc5 call0 40228f9c +40224cbf: fd1441 l32r a4, 40224110 +40224cc2: 4138 l32i.n a3, a1, 16 +40224cc4: 0d6d mov.n a6, a13 +40224cc6: 354c movi.n a5, 67 +40224cc8: 0c2d mov.n a2, a12 +40224cca: 079c45 call0 4022c690 +40224ccd: 012d mov.n a2, a1 +40224ccf: ff2185 call0 40223ee8 +40224cd2: 1128 l32i.n a2, a1, 4 +40224cd4: 128c beqz.n a2, 40224cd9 +40224cd6: 078705 call0 4022c548 +40224cd9: 172102 l32i a0, a1, 92 +40224cdc: 1621c2 l32i a12, a1, 88 +40224cdf: 1521d2 l32i a13, a1, 84 +40224ce2: 60c112 addi a1, a1, 96 +40224ce5: f00d ret.n + ... + +40224ce8 : +40224ce8: f0c112 addi a1, a1, -16 +40224ceb: 11d9 s32i.n a13, a1, 4 +40224ced: 82d8 l32i.n a13, a2, 32 +40224cef: 21c9 s32i.n a12, a1, 8 +40224cf1: 3109 s32i.n a0, a1, 12 +40224cf3: 02cd mov.n a12, a2 +40224cf5: ddac beqz.n a13, 40224d26 +40224cf7: 0c0d22 l8ui a2, a13, 12 +40224cfa: 0762f6 bgeui a2, 6, 40224d05 +40224cfd: 0732f6 bgeui a2, 3, 40224d08 +40224d00: 22ac beqz.n a2, 40224d26 +40224d02: 000586 j 40224d1c +40224d05: 139266 bnei a2, 10, 40224d1c +40224d08: 0c2d mov.n a2, a12 +40224d0a: 03f2c5 call0 40228c38 +40224d0d: 020c movi.n a2, 0 +40224d0f: 0d4d22 s8i a2, a13, 13 +40224d12: 202cc0 or a2, a12, a12 +40224d15: ff73c5 call0 40224454 +40224d18: 000286 j 40224d26 +40224d1b: 020c00 excw +40224d1e: 0d4d22 s8i a2, a13, 13 +40224d21: 0c2d mov.n a2, a12 +40224d23: ff3f45 call0 40224118 +40224d26: 3108 l32i.n a0, a1, 12 +40224d28: 21c8 l32i.n a12, a1, 8 +40224d2a: 11d8 l32i.n a13, a1, 4 +40224d2c: 10c112 addi a1, a1, 16 +40224d2f: f00d ret.n +40224d31: 000000 ill + +40224d34 : +40224d34: f0c112 addi a1, a1, -16 +40224d37: 11d9 s32i.n a13, a1, 4 +40224d39: 3109 s32i.n a0, a1, 12 +40224d3b: 21c9 s32i.n a12, a1, 8 +40224d3d: 02dd mov.n a13, a2 +40224d3f: 08b216 beqz a2, 40224dce +40224d42: 82c8 l32i.n a12, a2, 32 +40224d44: 086c16 beqz a12, 40224dce +40224d47: 0c0c22 l8ui a2, a12, 12 +40224d4a: 028226 beqi a2, 8, 40224d50 +40224d4d: 001f46 j 40224dce +40224d50: 0338 l32i.n a3, a3, 0 +40224d52: bc28 l32i.n a2, a12, 44 +40224d54: 769327 bne a3, a2, 40224dce +40224d57: c30c movi.n a3, 12 +40224d59: 0c2d mov.n a2, a12 +40224d5b: ff08c5 call0 40223de8 +40224d5e: 440c movi.n a4, 4 +40224d60: 0c3d mov.n a3, a12 +40224d62: 0d2d mov.n a2, a13 +40224d64: ff1e45 call0 40223f4c +40224d67: 056256 bnez a2, 40224dc1 +40224d6a: 440c movi.n a4, 4 +40224d6c: 233c movi.n a3, 50 +40224d6e: 0c2d mov.n a2, a12 +40224d70: ff0c85 call0 40223e3c +40224d73: bc28 l32i.n a2, a12, 44 +40224d75: 014280 slli a4, a2, 24 +40224d78: 753820 extui a3, a2, 24, 8 +40224d7b: 205430 or a5, a4, a3 +40224d7e: 70dc31 l32r a3, 402010f0 +40224d81: 104230 and a4, a2, a3 +40224d84: 114480 slli a4, a4, 8 +40224d87: 412820 srli a2, a2, 8 +40224d8a: 204540 or a4, a5, a4 +40224d8d: 103230 and a3, a2, a3 +40224d90: 203430 or a3, a4, a3 +40224d93: 0c2d mov.n a2, a12 +40224d95: ff0fc5 call0 40223e94 +40224d98: 0c2d mov.n a2, a12 +40224d9a: ff1745 call0 40223f10 +40224d9d: 0c1c32 l16ui a3, a12, 24 +40224da0: f0a022 movi a2, 240 +40224da3: 332a add.n a3, a3, a2 +40224da5: 4c28 l32i.n a2, a12, 16 +40224da7: f43030 extui a3, a3, 0, 16 +40224daa: 041f05 call0 40228f9c +40224dad: fcd841 l32r a4, 40224110 +40224db0: 4c38 l32i.n a3, a12, 16 +40224db2: 1c28 l32i.n a2, a12, 4 +40224db4: 0d6d mov.n a6, a13 +40224db6: 43a052 movi a5, 67 +40224db9: 078d45 call0 4022c690 +40224dbc: 0c2d mov.n a2, a12 +40224dbe: ff1285 call0 40223ee8 +40224dc1: 0d0c22 l8ui a2, a12, 13 +40224dc4: 221b addi.n a2, a2, 1 +40224dc6: 0d4c22 s8i a2, a12, 13 +40224dc9: 421c movi.n a2, 20 +40224dcb: 0d5c22 s16i a2, a12, 26 +40224dce: 3108 l32i.n a0, a1, 12 +40224dd0: 21c8 l32i.n a12, a1, 8 +40224dd2: 11d8 l32i.n a13, a1, 4 +40224dd4: 10c112 addi a1, a1, 16 +40224dd7: f00d ret.n +40224dd9: 000000 ill +40224ddc: 004e20 break 14, 2 + ... + +40224de0 : +40224de0: e0c112 addi a1, a1, -32 +40224de3: 61c9 s32i.n a12, a1, 24 +40224de5: 82c8 l32i.n a12, a2, 32 +40224de7: 41e9 s32i.n a14, a1, 16 +40224de9: 530c movi.n a3, 5 +40224deb: 02ed mov.n a14, a2 +40224ded: 0c2d mov.n a2, a12 +40224def: 7109 s32i.n a0, a1, 28 +40224df1: 51d9 s32i.n a13, a1, 20 +40224df3: 0361f2 s32i a15, a1, 12 +40224df6: feff05 call0 40223de8 +40224df9: 340c movi.n a4, 3 +40224dfb: 0c3d mov.n a3, a12 +40224dfd: 0e2d mov.n a2, a14 +40224dff: ff14c5 call0 40223f4c +40224e02: 02dd mov.n a13, a2 +40224e04: 0a0256 bnez a2, 40224ea8 +40224e07: 240c movi.n a4, 2 +40224e09: 933c movi.n a3, 57 +40224e0b: 0c2d mov.n a2, a12 +40224e0d: ff02c5 call0 40223e3c +40224e10: 181e32 l16ui a3, a14, 48 +40224e13: 0c2d mov.n a2, a12 +40224e15: ff0585 call0 40223e70 +40224e18: bef8 l32i.n a15, a14, 44 +40224e1a: bfcc bnez.n a15, 40224e29 +40224e1c: fcbc21 l32r a2, 4022410c +40224e1f: 02f8 l32i.n a15, a2, 0 +40224e21: 058f56 bnez a15, 40224e7d +40224e24: 000a06 j 40224e50 +40224e27: 2d0000 excw +40224e2a: 0f .byte 0xf +40224e2b: 7d6101 l32r a0, 402043b0 +40224e2e: 0000c0 callx0 a0 +40224e31: 743020 extui a3, a2, 0, 8 +40224e34: fe4316 beqz a3, 40224e1c +40224e37: 034d mov.n a4, a3 +40224e39: 0c2d mov.n a2, a12 +40224e3b: c30c movi.n a3, 12 +40224e3d: feffc5 call0 40223e3c +40224e40: 000f32 l8ui a3, a15, 0 +40224e43: fd5316 beqz a3, 40224e1c +40224e46: 0c2d mov.n a2, a12 +40224e48: ff1b addi.n a15, a15, 1 +40224e4a: ff0105 call0 40223e5c +40224e4d: fffbc6 j 40224e40 +40224e50: 202cc0 or a2, a12, a12 +40224e53: ff0bc5 call0 40223f10 +40224e56: 0c1c32 l16ui a3, a12, 24 +40224e59: f0a022 movi a2, 240 +40224e5c: 803320 add a3, a3, a2 +40224e5f: 4c28 l32i.n a2, a12, 16 +40224e61: f43030 extui a3, a3, 0, 16 +40224e64: 041345 call0 40228f9c +40224e67: 4c38 l32i.n a3, a12, 16 +40224e69: 1c28 l32i.n a2, a12, 4 +40224e6b: 0e6d mov.n a6, a14 +40224e6d: 354c movi.n a5, 67 +40224e6f: 28cc42 addi a4, a12, 40 +40224e72: 0781c5 call0 4022c690 +40224e75: 0c2d mov.n a2, a12 +40224e77: ff0705 call0 40223ee8 +40224e7a: 000a86 j 40224ea8 +40224e7d: 0f2d mov.n a2, a15 +40224e7f: 7d4c01 l32r a0, 402043b0 +40224e82: 0000c0 callx0 a0 +40224e85: fca321 l32r a2, 40224114 +40224e88: 0248 l32i.n a4, a2, 0 +40224e8a: c214a6 blti a4, 1, 40224e50 +40224e8d: 744040 extui a4, a4, 0, 8 +40224e90: c33c movi.n a3, 60 +40224e92: 202cc0 or a2, a12, a12 +40224e95: fefa45 call0 40223e3c +40224e98: 000f32 l8ui a3, a15, 0 +40224e9b: fb1316 beqz a3, 40224e50 +40224e9e: 0c2d mov.n a2, a12 +40224ea0: ff1b addi.n a15, a15, 1 +40224ea2: fefb85 call0 40223e5c +40224ea5: fffbc6 j 40224e98 +40224ea8: 0d0c42 l8ui a4, a12, 13 +40224eab: 09a022 movi a2, 9 +40224eae: 01c442 addi a4, a4, 1 +40224eb1: 743040 extui a3, a4, 0, 8 +40224eb4: 0d4c32 s8i a3, a12, 13 +40224eb7: ffc941 l32r a4, 40224ddc +40224eba: 0e3237 bltu a2, a3, 40224ecc +40224ebd: 1123b0 slli a2, a3, 5 +40224ec0: c02230 sub a2, a2, a3 +40224ec3: a04230 addx4 a4, a2, a3 +40224ec6: 1144c0 slli a4, a4, 4 +40224ec9: f44040 extui a4, a4, 0, 16 +40224ecc: f3a122 movi a2, 0x1f3 +40224ecf: f4a132 movi a3, 0x1f4 +40224ed2: 242a add.n a2, a4, a2 +40224ed4: 735101 l32r a0, 40201c18 +40224ed7: 0000c0 callx0 a0 +40224eda: 7108 l32i.n a0, a1, 28 +40224edc: 0d5c22 s16i a2, a12, 26 +40224edf: 41e8 l32i.n a14, a1, 16 +40224ee1: 0d2d mov.n a2, a13 +40224ee3: 61c8 l32i.n a12, a1, 24 +40224ee5: 51d8 l32i.n a13, a1, 20 +40224ee7: 31f8 l32i.n a15, a1, 12 +40224ee9: 20c112 addi a1, a1, 32 +40224eec: f00d ret.n + ... + +40224ef0 : +40224ef0: f0c112 addi a1, a1, -16 +40224ef3: 21c9 s32i.n a12, a1, 8 +40224ef5: 82c8 l32i.n a12, a2, 32 +40224ef7: 11d9 s32i.n a13, a1, 4 +40224ef9: 3109 s32i.n a0, a1, 12 +40224efb: 01e9 s32i.n a14, a1, 0 +40224efd: 02dd mov.n a13, a2 +40224eff: 427c movi.n a2, -12 +40224f01: 0abc16 beqz a12, 40224fb0 +40224f04: 030c movi.n a3, 0 +40224f06: 0c2d mov.n a2, a12 +40224f08: feedc5 call0 40223de8 +40224f0b: 020c movi.n a2, 0 +40224f0d: ac29 s32i.n a2, a12, 40 +40224f0f: bc29 s32i.n a2, a12, 44 +40224f11: cc29 s32i.n a2, a12, 48 +40224f13: dc29 s32i.n a2, a12, 52 +40224f15: 106c22 s32i a2, a12, 64 +40224f18: fc29 s32i.n a2, a12, 60 +40224f1a: ec29 s32i.n a2, a12, 56 +40224f1c: 135c22 s16i a2, a12, 38 +40224f1f: 125c22 s16i a2, a12, 36 +40224f22: 115c22 s16i a2, a12, 34 +40224f25: 105c22 s16i a2, a12, 32 +40224f28: 740c movi.n a4, 7 +40224f2a: 0c3d mov.n a3, a12 +40224f2c: 202dd0 or a2, a13, a13 +40224f2f: ff01c5 call0 40223f4c +40224f32: 02ed mov.n a14, a2 +40224f34: 62ec bnez.n a2, 40224f5e +40224f36: 0c2d mov.n a2, a12 +40224f38: fefd45 call0 40223f10 +40224f3b: 0c1c32 l16ui a3, a12, 24 +40224f3e: f0a022 movi a2, 240 +40224f41: 332a add.n a3, a3, a2 +40224f43: 4c28 l32i.n a2, a12, 16 +40224f45: f43030 extui a3, a3, 0, 16 +40224f48: 040505 call0 40228f9c +40224f4b: 4c38 l32i.n a3, a12, 16 +40224f4d: 1c28 l32i.n a2, a12, 4 +40224f4f: 0d6d mov.n a6, a13 +40224f51: 354c movi.n a5, 67 +40224f53: 28cc42 addi a4, a12, 40 +40224f56: 077385 call0 4022c690 +40224f59: 0c2d mov.n a2, a12 +40224f5b: fef8c5 call0 40223ee8 +40224f5e: 0d0c42 l8ui a4, a12, 13 +40224f61: 920c movi.n a2, 9 +40224f63: 441b addi.n a4, a4, 1 +40224f65: 743040 extui a3, a4, 0, 8 +40224f68: 0d4c32 s8i a3, a12, 13 +40224f6b: 93bb41 l32r a4, 40209e58 +40224f6e: 0e3237 bltu a2, a3, 40224f80 +40224f71: 1123b0 slli a2, a3, 5 +40224f74: c02230 sub a2, a2, a3 +40224f77: a04230 addx4 a4, a2, a3 +40224f7a: 1144d0 slli a4, a4, 3 +40224f7d: f44040 extui a4, a4, 0, 16 +40224f80: f3a122 movi a2, 0x1f3 +40224f83: 242a add.n a2, a4, a2 +40224f85: f4a132 movi a3, 0x1f4 +40224f88: 732401 l32r a0, 40201c18 +40224f8b: 0000c0 callx0 a0 +40224f8e: 0d5c22 s16i a2, a12, 26 +40224f91: 0d2d mov.n a2, a13 +40224f93: 03ca45 call0 40228c38 +40224f96: fdfcc1 l32r a12, 40224788 +40224f99: 0d2d mov.n a2, a13 +40224f9b: 0c3d mov.n a3, a12 +40224f9d: 03b3c5 call0 40228adc +40224fa0: 0c3d mov.n a3, a12 +40224fa2: 0d2d mov.n a2, a13 +40224fa4: 03c485 call0 40228bf0 +40224fa7: 0d2d mov.n a2, a13 +40224fa9: 0c3d mov.n a3, a12 +40224fab: 03c385 call0 40228be4 +40224fae: 0e2d mov.n a2, a14 +40224fb0: 3108 l32i.n a0, a1, 12 +40224fb2: 21c8 l32i.n a12, a1, 8 +40224fb4: 11d8 l32i.n a13, a1, 4 +40224fb6: 01e8 l32i.n a14, a1, 0 +40224fb8: 10c112 addi a1, a1, 16 +40224fbb: f00d ret.n +40224fbd: 000000 ill +40224fc0: e75c movi.n a7, 94 +40224fc2: fe .byte 0xfe +40224fc3: 3f .byte 0x3f + +40224fc4 : +40224fc4: ffff21 l32r a2, 40224fc0 +40224fc7: e0c112 addi a1, a1, -32 +40224fca: 51d9 s32i.n a13, a1, 20 +40224fcc: 02d8 l32i.n a13, a2, 0 +40224fce: 41e9 s32i.n a14, a1, 16 +40224fd0: 7109 s32i.n a0, a1, 28 +40224fd2: 61c9 s32i.n a12, a1, 24 +40224fd4: 31f9 s32i.n a15, a1, 12 +40224fd6: be7c movi.n a14, -5 +40224fd8: 17ad16 beqz a13, 40225156 +40224fdb: 8dc8 l32i.n a12, a13, 32 +40224fdd: 170c16 beqz a12, 40225151 +40224fe0: 0c0c32 l8ui a3, a12, 12 +40224fe3: 16a316 beqz a3, 40225151 +40224fe6: 131c42 l16ui a4, a12, 38 +40224fe9: b49c beqz.n a4, 40225008 +40224feb: 121c22 l16ui a2, a12, 36 +40224fee: 01c222 addi a2, a2, 1 +40224ff1: f42020 extui a2, a2, 0, 16 +40224ff4: 125c22 s16i a2, a12, 36 +40224ff7: 0d9427 bne a4, a2, 40225008 +40224ffa: 202dd0 or a2, a13, a13 +40224ffd: ffef05 call0 40224ef0 +40225000: 0d2d mov.n a2, a13 +40225002: ff1145 call0 40224118 +40225005: 005206 j 40225151 +40225008: 111c22 l16ui a2, a12, 34 +4022500b: 115216 beqz a2, 40225124 +4022500e: 420b addi.n a4, a2, -1 +40225010: 115c42 s16i a4, a12, 34 +40225013: 021226 beqi a2, 1, 40225019 +40225016: 004286 j 40225124 +40225019: 1023e0 and a2, a3, a14 +4022501c: 051226 beqi a2, 1, 40225025 +4022501f: 029326 beqi a3, 10, 40225025 +40225022: 004ac6 j 40225151 +40225025: 430c movi.n a3, 4 +40225027: 0c2d mov.n a2, a12 +40225029: fedbc5 call0 40223de8 +4022502c: 340c movi.n a4, 3 +4022502e: 0c3d mov.n a3, a12 +40225030: 0d2d mov.n a2, a13 +40225032: fef185 call0 40223f4c +40225035: 09f256 bnez a2, 402250d8 +40225038: 240c movi.n a4, 2 +4022503a: 933c movi.n a3, 57 +4022503c: 0c2d mov.n a2, a12 +4022503e: fedfc5 call0 40223e3c +40225041: 181d32 l16ui a3, a13, 48 +40225044: 0c2d mov.n a2, a12 +40225046: fee285 call0 40223e70 +40225049: bdf8 l32i.n a15, a13, 44 +4022504b: afcc bnez.n a15, 40225059 +4022504d: fc2f21 l32r a2, 4022410c +40225050: 02f8 l32i.n a15, a2, 0 +40225052: 057f56 bnez a15, 402250ad +40225055: 0009c6 j 40225080 +40225058: 0f2d00 excw +4022505b: 7cd501 l32r a0, 402043b0 +4022505e: 0000c0 callx0 a0 +40225061: 743020 extui a3, a2, 0, 8 +40225064: fe5316 beqz a3, 4022504d +40225067: 034d mov.n a4, a3 +40225069: 0c2d mov.n a2, a12 +4022506b: c30c movi.n a3, 12 +4022506d: fedcc5 call0 40223e3c +40225070: 000f32 l8ui a3, a15, 0 +40225073: fd6316 beqz a3, 4022504d +40225076: 0c2d mov.n a2, a12 +40225078: ff1b addi.n a15, a15, 1 +4022507a: fede05 call0 40223e5c +4022507d: fffbc6 j 40225070 +40225080: 202cc0 or a2, a12, a12 +40225083: fee8c5 call0 40223f10 +40225086: 0c1c32 l16ui a3, a12, 24 +40225089: f0a022 movi a2, 240 +4022508c: 803320 add a3, a3, a2 +4022508f: 4c28 l32i.n a2, a12, 16 +40225091: f43030 extui a3, a3, 0, 16 +40225094: 03f045 call0 40228f9c +40225097: fc1e41 l32r a4, 40224110 +4022509a: 4c38 l32i.n a3, a12, 16 +4022509c: 1c28 l32i.n a2, a12, 4 +4022509e: 0d6d mov.n a6, a13 +402250a0: 354c movi.n a5, 67 +402250a2: 075ec5 call0 4022c690 +402250a5: 0c2d mov.n a2, a12 +402250a7: fee405 call0 40223ee8 +402250aa: 000a86 j 402250d8 +402250ad: 0f2d mov.n a2, a15 +402250af: 7cc001 l32r a0, 402043b0 +402250b2: 0000c0 callx0 a0 +402250b5: fc1721 l32r a2, 40224114 +402250b8: 0248 l32i.n a4, a2, 0 +402250ba: c214a6 blti a4, 1, 40225080 +402250bd: 744040 extui a4, a4, 0, 8 +402250c0: c33c movi.n a3, 60 +402250c2: 202cc0 or a2, a12, a12 +402250c5: fed745 call0 40223e3c +402250c8: 000f32 l8ui a3, a15, 0 +402250cb: fb1316 beqz a3, 40225080 +402250ce: 0c2d mov.n a2, a12 +402250d0: ff1b addi.n a15, a15, 1 +402250d2: fed885 call0 40223e5c +402250d5: fffbc6 j 402250c8 +402250d8: 0d0c42 l8ui a4, a12, 13 +402250db: 09a022 movi a2, 9 +402250de: 01c442 addi a4, a4, 1 +402250e1: 743040 extui a3, a4, 0, 8 +402250e4: 0d4c32 s8i a3, a12, 13 +402250e7: 935c41 l32r a4, 40209e58 +402250ea: 0e3237 bltu a2, a3, 402250fc +402250ed: 1123b0 slli a2, a3, 5 +402250f0: c02230 sub a2, a2, a3 +402250f3: a04230 addx4 a4, a2, a3 +402250f6: 1144d0 slli a4, a4, 3 +402250f9: f44040 extui a4, a4, 0, 16 +402250fc: f3a122 movi a2, 0x1f3 +402250ff: f4a132 movi a3, 0x1f4 +40225102: 242a add.n a2, a4, a2 +40225104: 72c501 l32r a0, 40201c18 +40225107: 0000c0 callx0 a0 +4022510a: 0d5c22 s16i a2, a12, 26 +4022510d: 121c32 l16ui a3, a12, 36 +40225110: 131c22 l16ui a2, a12, 38 +40225113: c02230 sub a2, a2, a3 +40225116: 3722a6 blti a2, 2, 40225151 +40225119: 212120 srai a2, a2, 1 +4022511c: 115c22 s16i a2, a12, 34 +4022511f: 000b86 j 40225151 +40225122: 220000 excw +40225125: 101c movi.n a0, 17 +40225127: 62ac beqz.n a2, 40225151 +40225129: 420b addi.n a4, a2, -1 +4022512b: 105c42 s16i a4, a12, 32 +4022512e: 1f1266 bnei a2, 1, 40225151 +40225131: 1023e0 and a2, a3, a14 +40225134: 021226 beqi a2, 1, 4022513a +40225137: 169366 bnei a3, 10, 40225151 +4022513a: 0d2d mov.n a2, a13 +4022513c: ffca05 call0 40224de0 +4022513f: 0f1c22 l16ui a2, a12, 30 +40225142: 121c32 l16ui a3, a12, 36 +40225145: c02230 sub a2, a2, a3 +40225148: 0522a6 blti a2, 2, 40225151 +4022514b: 212120 srai a2, a2, 1 +4022514e: 105c22 s16i a2, a12, 32 +40225151: 0dd8 l32i.n a13, a13, 0 +40225153: ffa046 j 40224fd8 +40225156: 7108 l32i.n a0, a1, 28 +40225158: 61c8 l32i.n a12, a1, 24 +4022515a: 51d8 l32i.n a13, a1, 20 +4022515c: 41e8 l32i.n a14, a1, 16 +4022515e: 31f8 l32i.n a15, a1, 12 +40225160: 20c112 addi a1, a1, 32 +40225163: f00d ret.n +40225165: 000000 ill +40225168: 0488 l32i.n a8, a4, 0 +4022516a: 23 .byte 0x23 +4022516b: 40 .byte 0x40 + +4022516c : +4022516c: ff9521 l32r a2, 40224fc0 +4022516f: f0c112 addi a1, a1, -16 +40225172: 21c9 s32i.n a12, a1, 8 +40225174: 11d9 s32i.n a13, a1, 4 +40225176: 02c8 l32i.n a12, a2, 0 +40225178: affad1 l32r a13, 40211160 +4022517b: 01e9 s32i.n a14, a1, 0 +4022517d: 3109 s32i.n a0, a1, 12 +4022517f: 0e0c movi.n a14, 0 +40225181: 09cc16 beqz a12, 40225221 +40225184: 8c28 l32i.n a2, a12, 32 +40225186: 092216 beqz a2, 4022521c +40225189: 0020c0 memw +4022518c: 0d38 l32i.n a3, a13, 0 +4022518e: 33ac beqz.n a3, 402251b5 +40225190: 0c0232 l8ui a3, a2, 12 +40225193: 1e5326 beqi a3, 5, 402251b5 +40225196: 0020c0 memw +40225199: 0d38 l32i.n a3, a13, 0 +4022519b: 0d0242 l8ui a4, a2, 13 +4022519e: 133437 bltu a4, a3, 402251b5 +402251a1: fff121 l32r a2, 40225168 +402251a4: 73aa01 l32r a0, 4020204c +402251a7: 0000c0 callx0 a0 +402251aa: ac28 l32i.n a2, a12, 40 +402251ac: 071216 beqz a2, 40225221 +402251af: 0002c0 callx0 a2 +402251b2: 001ac6 j 40225221 +402251b5: 0d1232 l16ui a3, a2, 26 +402251b8: 0823b6 bltui a3, 2, 402251c4 +402251bb: 330b addi.n a3, a3, -1 +402251bd: 0d5232 s16i a3, a2, 26 +402251c0: 001606 j 4022521c +402251c3: 136600 excw +402251c6: 023254 excw +402251c9: e20c movi.n a2, 14 +402251cb: 260d52 l8ui a5, a13, 38 +402251ce: 2646a3 excw +402251d1: 664363 excw +402251d4: 221513 excw +402251d7: f60d02 l8ui a0, a13, 246 +402251da: 2d0762 l8ui a6, a7, 45 +402251dd: 850c movi.n a5, 8 +402251df: ff0a add.n a15, a15, a0 +402251e1: 000dc6 j 4022521c +402251e4: 0c2d mov.n a2, a12 +402251e6: ffd085 call0 40224ef0 +402251e9: 000a86 j 40225217 +402251ec: 158366 bnei a3, 8, 40225205 +402251ef: 0d0222 l8ui a2, a2, 13 +402251f2: 0722f6 bgeui a2, 2, 402251fd +402251f5: 0c2d mov.n a2, a12 +402251f7: fec085 call0 40223e00 +402251fa: 000786 j 4022521c +402251fd: 0c2d mov.n a2, a12 +402251ff: ff3245 call0 40224524 +40225202: 000586 j 4022521c +40225205: 133366 bnei a3, 3, 4022521c +40225208: 0d0222 l8ui a2, a2, 13 +4022520b: 0822f6 bgeui a2, 2, 40225217 +4022520e: 202cc0 or a2, a12, a12 +40225211: ff2405 call0 40224454 +40225214: 000106 j 4022521c +40225217: 0c2d mov.n a2, a12 +40225219: feefc5 call0 40224118 +4022521c: 0cc8 l32i.n a12, a12, 0 +4022521e: ffd7c6 j 40225181 +40225221: 3108 l32i.n a0, a1, 12 +40225223: 21c8 l32i.n a12, a1, 8 +40225225: 11d8 l32i.n a13, a1, 4 +40225227: 01e8 l32i.n a14, a1, 0 +40225229: 10c112 addi a1, a1, 16 +4022522c: f00d ret.n + ... + +40225230 : +40225230: f0c112 addi a1, a1, -16 +40225233: 036102 s32i a0, a1, 12 +40225236: 0261c2 s32i a12, a1, 8 +40225239: 020216 beqz a2, 4022525d +4022523c: 390242 l8ui a4, a2, 57 +4022523f: 737c movi.n a3, -9 +40225241: 103430 and a3, a4, a3 +40225244: 82c8 l32i.n a12, a2, 32 +40225246: 394232 s8i a3, a2, 57 +40225249: 0c9c beqz.n a12, 4022525d +4022524b: 1c28 l32i.n a2, a12, 4 +4022524d: 528c beqz.n a2, 40225256 +4022524f: 072f85 call0 4022c548 +40225252: 020c movi.n a2, 0 +40225254: 1c29 s32i.n a2, a12, 4 +40225256: 030c movi.n a3, 0 +40225258: 0c2d mov.n a2, a12 +4022525a: feb8c5 call0 40223de8 +4022525d: 3108 l32i.n a0, a1, 12 +4022525f: 21c8 l32i.n a12, a1, 8 +40225261: 10c112 addi a1, a1, 16 +40225264: f00d ret.n +40225266: 8c0000 excw +40225269: 402247 blt a2, a4, 402252ad + +4022526c : +4022526c: f0c112 addi a1, a1, -16 +4022526f: 21c9 s32i.n a12, a1, 8 +40225271: 3109 s32i.n a0, a1, 12 +40225273: 11d9 s32i.n a13, a1, 4 +40225275: 01e9 s32i.n a14, a1, 0 +40225277: 02cd mov.n a12, a2 +40225279: 004256 bnez a2, 40225281 +4022527c: 427c movi.n a2, -12 +4022527e: 0025c6 j 40225319 +40225281: 390232 l8ui a3, a2, 57 +40225284: 82d8 l32i.n a13, a2, 32 +40225286: 727c movi.n a2, -9 +40225288: 102320 and a2, a3, a2 +4022528b: 394c22 s8i a2, a12, 57 +4022528e: ea6357 bbci a3, 5, 4022527c +40225291: 181c22 l16ui a2, a12, 48 +40225294: 3fa232 movi a3, 0x23f +40225297: 6bb327 bgeu a3, a2, 40225306 +4022529a: 8ddc bnez.n a13, 402252b6 +4022529c: fe5e31 l32r a3, 40224c14 +4022529f: 050c movi.n a5, 0 +402252a1: c2a242 movi a4, 0x2c2 +402252a4: 424c movi.n a2, 68 +402252a6: 709701 l32r a0, 40201504 +402252a9: 0000c0 callx0 a0 +402252ac: 02dd mov.n a13, a2 +402252ae: 054216 beqz a2, 40225306 +402252b1: 8c29 s32i.n a2, a12, 32 +402252b3: 000186 j 402252bd +402252b6: 1d28 l32i.n a2, a13, 4 +402252b8: 128c beqz.n a2, 402252bd +402252ba: 0728c5 call0 4022c548 +402252bd: 444c movi.n a4, 68 +402252bf: 030c movi.n a3, 0 +402252c1: 0d2d mov.n a2, a13 +402252c3: 6f5301 l32r a0, 40201010 <_irom0_text_start> +402252c6: 0000c0 callx0 a0 +402252c9: 0723c5 call0 4022c508 +402252cc: 1d29 s32i.n a2, a13, 4 +402252ce: 42bc beqz.n a2, 40225306 +402252d0: 080242 l8ui a4, a2, 8 +402252d3: 032c movi.n a3, 32 +402252d5: 203430 or a3, a4, a3 +402252d8: 084232 s8i a3, a2, 8 +402252db: fd2be1 l32r a14, 40224788 +402252de: 1d28 l32i.n a2, a13, 4 +402252e0: 444c movi.n a4, 68 +402252e2: 0e3d mov.n a3, a14 +402252e4: 072a45 call0 4022c58c +402252e7: 1d28 l32i.n a2, a13, 4 +402252e9: 344c movi.n a4, 67 +402252eb: 0e3d mov.n a3, a14 +402252ed: 0731c5 call0 4022c60c +402252f0: 1d28 l32i.n a2, a13, 4 +402252f2: ffdd31 l32r a3, 40225268 +402252f5: 0c4d mov.n a4, a12 +402252f7: 073905 call0 4022c688 +402252fa: 0c2d mov.n a2, a12 +402252fc: fee185 call0 40224118 +402252ff: 928c beqz.n a2, 4022530c +40225301: 0c2d mov.n a2, a12 +40225303: fff2c5 call0 40225230 +40225306: f27c movi.n a2, -1 +40225308: 000346 j 40225319 +4022530b: 0c3200 excw +4022530e: 0c39 s32i.n a3, a12, 0 +40225310: 232082 l32i a8, a0, 140 +40225313: 4c2220 excw +40225316: 0c39 s32i.n a3, a12, 0 +40225318: 310802 l8ui a0, a8, 49 +4022531b: 21c8 l32i.n a12, a1, 8 +4022531d: 11d8 l32i.n a13, a1, 4 +4022531f: 01e8 l32i.n a14, a1, 0 +40225321: 10c112 addi a1, a1, 16 +40225324: f00d ret.n +40225326: 4c0000 excw +40225329: 3ffed3 excw +4022532c: 538263 excw +4022532f: c11263 excw +40225332: 61c9e0 excw +40225335: 02cd mov.n a12, a2 +40225337: fffc21 l32r a2, 40225328 +4022533a: 7109 s32i.n a0, a1, 28 +4022533c: 0228 l32i.n a2, a2, 0 +4022533e: 440c movi.n a4, 4 +40225340: 1129 s32i.n a2, a1, 4 +40225342: 220c movi.n a2, 2 +40225344: 004c22 s8i a2, a12, 0 +40225347: 120c movi.n a2, 1 +40225349: 014c22 s8i a2, a12, 1 +4022534c: 620c movi.n a2, 6 +4022534e: 024c22 s8i a2, a12, 2 +40225351: 020c movi.n a2, 0 +40225353: 034c22 s8i a2, a12, 3 +40225356: 020c movi.n a2, 0 +40225358: 045c22 s16i a2, a12, 8 +4022535b: 80a022 movi a2, 128 +4022535e: 803140 add a3, a1, a4 +40225361: 055c22 s16i a2, a12, 10 +40225364: 10cc22 addi a2, a12, 16 +40225367: 6f2b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022536a: 0000c0 callx0 a0 +4022536d: 440c movi.n a4, 4 +4022536f: 030c movi.n a3, 0 +40225371: 2ccb addi.n a2, a12, 12 +40225373: 6f2701 l32r a0, 40201010 <_irom0_text_start> +40225376: 0000c0 callx0 a0 +40225379: 440c movi.n a4, 4 +4022537b: 030c movi.n a3, 0 +4022537d: 14cc22 addi a2, a12, 20 +40225380: 6f2401 l32r a0, 40201010 <_irom0_text_start> +40225383: 0000c0 callx0 a0 +40225386: 440c movi.n a4, 4 +40225388: 00a032 movi a3, 0 +4022538b: 18cc22 addi a2, a12, 24 +4022538e: 6f2001 l32r a0, 40201010 <_irom0_text_start> +40225391: 0000c0 callx0 a0 +40225394: 044c movi.n a4, 64 +40225396: 030c movi.n a3, 0 +40225398: 2ccc22 addi a2, a12, 44 +4022539b: 6f1d01 l32r a0, 40201010 <_irom0_text_start> +4022539e: 0000c0 callx0 a0 +402253a1: 80a042 movi a4, 128 +402253a4: 00a032 movi a3, 0 +402253a7: 6ccc22 addi a2, a12, 108 +402253aa: 6f1901 l32r a0, 40201010 <_irom0_text_start> +402253ad: 0000c0 callx0 a0 +402253b0: eca022 movi a2, 236 +402253b3: 80cc20 add a12, a12, a2 +402253b6: 38a142 movi a4, 0x138 +402253b9: 030c movi.n a3, 0 +402253bb: 202cc0 or a2, a12, a12 +402253be: 6f1401 l32r a0, 40201010 <_irom0_text_start> +402253c1: 0000c0 callx0 a0 +402253c4: ffda21 l32r a2, 4022532c +402253c7: 013d mov.n a3, a1 +402253c9: 0129 s32i.n a2, a1, 0 +402253cb: 440c movi.n a4, 4 +402253cd: 0c2d mov.n a2, a12 +402253cf: 6f1101 l32r a0, 40201014 <_irom0_text_start+0x4> +402253d2: 0000c0 callx0 a0 +402253d5: 7108 l32i.n a0, a1, 28 +402253d7: 61c8 l32i.n a12, a1, 24 +402253d9: 20c112 addi a1, a1, 32 +402253dc: f00d ret.n +402253de: 500000 excw +402253e1: 3ffed3 excw +402253e4: fe83a4 excw +402253e7: 3f .byte 0x3f +402253e8: 83a8 l32i.n a10, a3, 32 +402253ea: fe .byte 0xfe +402253eb: 3f .byte 0x3f +402253ec: c0c112 addi a1, a1, -64 +402253ef: e1c9 s32i.n a12, a1, 56 +402253f1: 02cd mov.n a12, a2 +402253f3: fffb21 l32r a2, 402253e0 +402253f6: 440c movi.n a4, 4 +402253f8: 0238 l32i.n a3, a2, 0 +402253fa: 120c movi.n a2, 1 +402253fc: 004c22 s8i a2, a12, 0 +402253ff: f27c movi.n a2, -1 +40225401: 024c22 s8i a2, a12, 2 +40225404: 034c22 s8i a2, a12, 3 +40225407: 044c22 s8i a2, a12, 4 +4022540a: 020c movi.n a2, 0 +4022540c: 054c22 s8i a2, a12, 5 +4022540f: 323c movi.n a2, 51 +40225411: 064c22 s8i a2, a12, 6 +40225414: fff421 l32r a2, 402253e4 +40225417: 014c42 s8i a4, a12, 1 +4022541a: 0258 l32i.n a5, a2, 0 +4022541c: d1d9 s32i.n a13, a1, 52 +4022541e: 1125c0 slli a2, a5, 4 +40225421: c02250 sub a2, a2, a5 +40225424: 1122e0 slli a2, a2, 2 +40225427: 755820 extui a5, a2, 24, 8 +4022542a: c1e9 s32i.n a14, a1, 48 +4022542c: b1f9 s32i.n a15, a1, 44 +4022542e: 75e030 extui a14, a3, 16, 8 +40225431: 74f830 extui a15, a3, 8, 8 +40225434: 75d830 extui a13, a3, 24, 8 +40225437: 074c42 s8i a4, a12, 7 +4022543a: 0d4c42 s8i a4, a12, 13 +4022543d: 744030 extui a4, a3, 0, 8 +40225440: ffea31 l32r a3, 402253e8 +40225443: f109 s32i.n a0, a1, 60 +40225445: 084c52 s8i a5, a12, 8 +40225448: f55020 extui a5, a2, 16, 16 +4022544b: 094c52 s8i a5, a12, 9 +4022544e: 0b4c22 s8i a2, a12, 11 +40225451: 415820 srli a5, a2, 8 +40225454: 000332 l8ui a3, a3, 0 +40225457: 623c movi.n a2, 54 +40225459: 0c4c22 s8i a2, a12, 12 +4022545c: 0a4c52 s8i a5, a12, 10 +4022545f: 0e4c42 s8i a4, a12, 14 +40225462: 0f4cf2 s8i a15, a12, 15 +40225465: 104ce2 s8i a14, a12, 16 +40225468: 114cd2 s8i a13, a12, 17 +4022546b: 12cc22 addi a2, a12, 18 +4022546e: 3a6307 bbci a3, 0, 402254ac +40225471: c30c movi.n a3, 12 +40225473: 012d mov.n a2, a1 +40225475: 4149 s32i.n a4, a1, 16 +40225477: 81f101 l32r a0, 40205c3c +4022547a: 0000c0 callx0 a0 +4022547d: 013d mov.n a3, a1 +4022547f: 01a022 movi a2, 1 +40225482: ee2c05 call0 40213744 +40225485: 320c movi.n a2, 3 +40225487: 124c22 s8i a2, a12, 18 +4022548a: 420c movi.n a2, 4 +4022548c: 134c22 s8i a2, a12, 19 +4022548f: 080122 l8ui a2, a1, 8 +40225492: 0b0132 l8ui a3, a1, 11 +40225495: 144c22 s8i a2, a12, 20 +40225498: 090122 l8ui a2, a1, 9 +4022549b: 4148 l32i.n a4, a1, 16 +4022549d: 154c22 s8i a2, a12, 21 +402254a0: 0a0122 l8ui a2, a1, 10 +402254a3: 174c32 s8i a3, a12, 23 +402254a6: 164c22 s8i a2, a12, 22 +402254a9: 18cc22 addi a2, a12, 24 +402254ac: c31c movi.n a3, 28 +402254ae: 064232 s8i a3, a2, 6 +402254b1: f37c movi.n a3, -1 +402254b3: 0b4232 s8i a3, a2, 11 +402254b6: a31c movi.n a3, 26 +402254b8: 0c4232 s8i a3, a2, 12 +402254bb: 034c movi.n a3, 64 +402254bd: 0f4232 s8i a3, a2, 15 +402254c0: f31c movi.n a3, 31 +402254c2: 024242 s8i a4, a2, 2 +402254c5: 084242 s8i a4, a2, 8 +402254c8: 104232 s8i a3, a2, 16 +402254cb: 450c movi.n a5, 4 +402254cd: 030c movi.n a3, 0 +402254cf: 240c movi.n a4, 2 +402254d1: 670c movi.n a7, 6 +402254d3: 160c movi.n a6, 1 +402254d5: b82c movi.n a8, 43 +402254d7: 004272 s8i a7, a2, 0 +402254da: 014252 s8i a5, a2, 1 +402254dd: 0342f2 s8i a15, a2, 3 +402254e0: 0442e2 s8i a14, a2, 4 +402254e3: 0542d2 s8i a13, a2, 5 +402254e6: 074252 s8i a5, a2, 7 +402254e9: 0942f2 s8i a15, a2, 9 +402254ec: 0a42e2 s8i a14, a2, 10 +402254ef: 0d4242 s8i a4, a2, 13 +402254f2: 0e4242 s8i a4, a2, 14 +402254f5: 114262 s8i a6, a2, 17 +402254f8: 124232 s8i a3, a2, 18 +402254fb: 134282 s8i a8, a2, 19 +402254fe: 144272 s8i a7, a2, 20 +40225501: 154262 s8i a6, a2, 21 +40225504: 164252 s8i a5, a2, 22 +40225507: 174232 s8i a3, a2, 23 +4022550a: 184232 s8i a3, a2, 24 +4022550d: 194232 s8i a3, a2, 25 +40225510: 1a4242 s8i a4, a2, 26 +40225513: f108 l32i.n a0, a1, 60 +40225515: 1bc222 addi a2, a2, 27 +40225518: e1c8 l32i.n a12, a1, 56 +4022551a: d1d8 l32i.n a13, a1, 52 +4022551c: c1e8 l32i.n a14, a1, 48 +4022551e: b1f8 l32i.n a15, a1, 44 +40225520: 40c112 addi a1, a1, 64 +40225523: f00d ret.n +40225525: 000000 ill + +40225528 : +40225528: 0248 l32i.n a4, a2, 0 +4022552a: b48c beqz.n a4, 40225539 +4022552c: 0358 l32i.n a5, a3, 0 +4022552e: 0468 l32i.n a6, a4, 0 +40225530: 0558 l32i.n a5, a5, 0 +40225532: 0668 l32i.n a6, a6, 0 +40225534: 08b567 bgeu a5, a6, 40225540 +40225537: 1349 s32i.n a4, a3, 4 +40225539: 0239 s32i.n a3, a2, 0 +4022553b: f00d ret.n +4022553d: 024d00 excw +40225540: 1428 l32i.n a2, a4, 4 +40225542: a28c beqz.n a2, 40225550 +40225544: 0268 l32i.n a6, a2, 0 +40225546: 0668 l32i.n a6, a6, 0 +40225548: f2b567 bgeu a5, a6, 4022553e +4022554b: 016322 s32i a2, a3, 4 +4022554e: 1439 s32i.n a3, a4, 4 +40225550: 1428 l32i.n a2, a4, 4 +40225552: 02cc bnez.n a2, 40225556 +40225554: 1439 s32i.n a3, a4, 4 +40225556: f00d ret.n + +40225558 : +40225558: 0248 l32i.n a4, a2, 0 +4022555a: f49c beqz.n a4, 4022557d +4022555c: 0a9437 bne a4, a3, 4022556a +4022555f: 1438 l32i.n a3, a4, 4 +40225561: 0239 s32i.n a3, a2, 0 +40225563: 020c movi.n a2, 0 +40225565: 1429 s32i.n a2, a4, 4 +40225567: f00d ret.n +40225569: 020c00 excw +4022556c: 1458 l32i.n a5, a4, 4 +4022556e: 069357 bne a3, a5, 40225578 +40225571: 1358 l32i.n a5, a3, 4 +40225573: 1459 s32i.n a5, a4, 4 +40225575: 016322 s32i a2, a3, 4 +40225578: 1448 l32i.n a4, a4, 4 +4022557a: fee456 bnez a4, 4022556c +4022557d: f00d ret.n +4022557f: d35800 excw +40225582: fe .byte 0xfe +40225583: 3f .byte 0x3f +40225584: 0498 l32i.n a9, a4, 0 +40225586: 544023 excw +40225589: 3ffed3 excw +4022558c: fed340 excw +4022558f: 3f .byte 0x3f +40225590: 5d2c movi.n a13, 37 +40225592: 22 .byte 0x22 +40225593: 40 .byte 0x40 + +40225594 : +40225594: e0c112 addi a1, a1, -32 +40225597: 0561d2 s32i a13, a1, 20 +4022559a: 20d220 or a13, a2, a2 +4022559d: 120c movi.n a2, 1 +4022559f: 41e9 s32i.n a14, a1, 16 +402255a1: 7109 s32i.n a0, a1, 28 +402255a3: 61c9 s32i.n a12, a1, 24 +402255a5: 0361f2 s32i a15, a1, 12 +402255a8: ef4c45 call0 40214a70 +402255ab: 02ed mov.n a14, a2 +402255ad: 9228 l32i.n a2, a2, 36 +402255af: 002216 beqz a2, 402255b5 +402255b2: 06f945 call0 4022c548 +402255b5: 06f505 call0 4022c508 +402255b8: fff2c1 l32r a12, 40225580 +402255bb: 006c22 s32i a2, a12, 0 +402255be: 002216 beqz a2, 402255c4 +402255c1: 008d56 bnez a13, 402255cd +402255c4: fff021 l32r a2, 40225584 +402255c7: 72a101 l32r a0, 4020204c +402255ca: 0000c0 callx0 a0 +402255cd: 0c28 l32i.n a2, a12, 0 +402255cf: f37c movi.n a3, -1 +402255d1: 9e29 s32i.n a2, a14, 36 +402255d3: ffed21 l32r a2, 40225588 +402255d6: 0d48 l32i.n a4, a13, 0 +402255d8: 0239 s32i.n a3, a2, 0 +402255da: ffecd1 l32r a13, 4022558c +402255dd: ff8021 l32r a2, 402253e0 +402255e0: 0249 s32i.n a4, a2, 0 +402255e2: 000d22 l8ui a2, a13, 0 +402255e5: 7f1266 bnei a2, 1, 40225668 +402255e8: 752840 extui a2, a4, 24, 8 +402255eb: 016480 slli a6, a4, 24 +402255ee: 206620 or a6, a6, a2 +402255f1: 6ebf21 l32r a2, 402010f0 +402255f4: 105420 and a5, a4, a2 +402255f7: 115580 slli a5, a5, 8 +402255fa: 203650 or a3, a6, a5 +402255fd: 1d58 l32i.n a5, a13, 4 +402255ff: 416840 srli a6, a4, 8 +40225602: 106620 and a6, a6, a2 +40225605: 017580 slli a7, a5, 24 +40225608: 206360 or a6, a3, a6 +4022560b: 753850 extui a3, a5, 24, 8 +4022560e: 207730 or a7, a7, a3 +40225611: 103520 and a3, a5, a2 +40225614: 113380 slli a3, a3, 8 +40225617: 415850 srli a5, a5, 8 +4022561a: 203730 or a3, a7, a3 +4022561d: 105520 and a5, a5, a2 +40225620: 205350 or a5, a3, a5 +40225623: 2d38 l32i.n a3, a13, 8 +40225625: 757830 extui a7, a3, 24, 8 +40225628: 018380 slli a8, a3, 24 +4022562b: 208870 or a8, a8, a7 +4022562e: 107320 and a7, a3, a2 +40225631: 117780 slli a7, a7, 8 +40225634: 413830 srli a3, a3, 8 +40225637: 207870 or a7, a8, a7 +4022563a: 103320 and a3, a3, a2 +4022563d: 202730 or a2, a7, a3 +40225640: 0c3657 bltu a6, a5, 40225650 +40225643: 093267 bltu a2, a6, 40225650 +40225646: 020c movi.n a2, 0 +40225648: 004d22 s8i a2, a13, 0 +4022564b: 000646 j 40225668 +4022564e: 600000 neg a0, a0 +40225651: 4168 l32i.n a6, a1, 16 +40225653: 413850 srli a3, a5, 8 +40225656: ec9637 bne a6, a3, 40225646 +40225659: 413820 srli a3, a2, 8 +4022565c: e69637 bne a6, a3, 40225646 +4022565f: c02250 sub a2, a2, a5 +40225662: 64a032 movi a3, 100 +40225665: dd3327 bltu a3, a2, 40225646 +40225668: 000d22 l8ui a2, a13, 0 +4022566b: 083256 bnez a2, 402256f2 +4022566e: 013480 slli a3, a4, 24 +40225671: 752840 extui a2, a4, 24, 8 +40225674: 202320 or a2, a3, a2 +40225677: 6e9e31 l32r a3, 402010f0 +4022567a: 105430 and a5, a4, a3 +4022567d: 115580 slli a5, a5, 8 +40225680: 414840 srli a4, a4, 8 +40225683: 103430 and a3, a4, a3 +40225686: 202250 or a2, a2, a5 +40225689: 202230 or a2, a2, a3 +4022568c: 00af32 movi a3, 0xffffff00 +4022568f: 10f230 and a15, a2, a3 +40225692: 742020 extui a2, a2, 0, 8 +40225695: 7fa032 movi a3, 127 +40225698: e21b addi.n a14, a2, 1 +4022569a: 02b327 bgeu a3, a2, 402256a0 +4022569d: 9cc2e2 addi a14, a2, -100 +402256a0: 0ca032 movi a3, 12 +402256a3: 202dd0 or a2, a13, a13 +402256a6: 816501 l32r a0, 40205c3c +402256a9: 0000c0 callx0 a0 +402256ac: 202fe0 or a2, a15, a14 +402256af: 015280 slli a5, a2, 24 +402256b2: 754820 extui a4, a2, 24, 8 +402256b5: 206540 or a6, a5, a4 +402256b8: 6e8e41 l32r a4, 402010f0 +402256bb: 63ce32 addi a3, a14, 99 +402256be: 105240 and a5, a2, a4 +402256c1: 115580 slli a5, a5, 8 +402256c4: 412820 srli a2, a2, 8 +402256c7: 205650 or a5, a6, a5 +402256ca: 102240 and a2, a2, a4 +402256cd: 2033f0 or a3, a3, a15 +402256d0: 202520 or a2, a5, a2 +402256d3: 1d29 s32i.n a2, a13, 4 +402256d5: 015380 slli a5, a3, 24 +402256d8: 752830 extui a2, a3, 24, 8 +402256db: 202520 or a2, a5, a2 +402256de: 105340 and a5, a3, a4 +402256e1: 115580 slli a5, a5, 8 +402256e4: 413830 srli a3, a3, 8 +402256e7: 205250 or a5, a2, a5 +402256ea: 102340 and a2, a3, a4 +402256ed: 202520 or a2, a5, a2 +402256f0: 2d29 s32i.n a2, a13, 8 +402256f2: fc2531 l32r a3, 40224788 +402256f5: 0c28 l32i.n a2, a12, 0 +402256f7: 344c movi.n a4, 67 +402256f9: 06e905 call0 4022c58c +402256fc: 0c28 l32i.n a2, a12, 0 +402256fe: ffa431 l32r a3, 40225590 +40225701: 040c movi.n a4, 0 +40225703: 06f845 call0 4022c688 +40225706: 7108 l32i.n a0, a1, 28 +40225708: 61c8 l32i.n a12, a1, 24 +4022570a: 51d8 l32i.n a13, a1, 20 +4022570c: 41e8 l32i.n a14, a1, 16 +4022570e: 31f8 l32i.n a15, a1, 12 +40225710: 20c112 addi a1, a1, 32 +40225713: f00d ret.n +40225715: 000000 ill +40225718: d33c movi.n a3, 61 +4022571a: fe .byte 0xfe +4022571b: 3f .byte 0x3f +4022571c: fe8863 excw +4022571f: 3f .byte 0x3f + +40225720 : +40225720: d0c112 addi a1, a1, -48 +40225723: 120c movi.n a2, 1 +40225725: b109 s32i.n a0, a1, 44 +40225727: a1c9 s32i.n a12, a1, 40 +40225729: 91d9 s32i.n a13, a1, 36 +4022572b: 81e9 s32i.n a14, a1, 32 +4022572d: 71f9 s32i.n a15, a1, 28 +4022572f: ef3405 call0 40214a70 +40225732: 02cd mov.n a12, a2 +40225734: ff9321 l32r a2, 40225580 +40225737: 0228 l32i.n a2, a2, 0 +40225739: 06f385 call0 4022c674 +4022573c: 9c28 l32i.n a2, a12, 36 +4022573e: 528c beqz.n a2, 40225747 +40225740: 06e045 call0 4022c548 +40225743: 020c movi.n a2, 0 +40225745: 9c29 s32i.n a2, a12, 36 +40225747: 440c movi.n a4, 4 +40225749: 030c movi.n a3, 0 +4022574b: 012d mov.n a2, a1 +4022574d: 6e3001 l32r a0, 40201010 <_irom0_text_start> +40225750: 0000c0 callx0 a0 +40225753: fff121 l32r a2, 40225718 +40225756: 0f0c movi.n a15, 0 +40225758: 02c8 l32i.n a12, a2, 0 +4022575a: 02dd mov.n a13, a2 +4022575c: 5cbc beqz.n a12, 40225795 +4022575e: 0c3d mov.n a3, a12 +40225760: 0d2d mov.n a2, a13 +40225762: 1ce8 l32i.n a14, a12, 4 +40225764: ffdf05 call0 40225558 +40225767: 0c28 l32i.n a2, a12, 0 +40225769: 203110 or a3, a1, a1 +4022576c: 04c222 addi a2, a2, 4 +4022576f: ed5b05 call0 40212d20 +40225772: 0c28 l32i.n a2, a12, 0 +40225774: ffea31 l32r a3, 4022571c +40225777: 10a342 movi a4, 0x310 +4022577a: 6f6301 l32r a0, 40201508 +4022577d: 0000c0 callx0 a0 +40225780: ffe731 l32r a3, 4022571c +40225783: 0cf9 s32i.n a15, a12, 0 +40225785: 0c2d mov.n a2, a12 +40225787: 12a342 movi a4, 0x312 +4022578a: 6f5f01 l32r a0, 40201508 +4022578d: 0000c0 callx0 a0 +40225790: 0ecd mov.n a12, a14 +40225792: fff186 j 4022575c +40225795: b108 l32i.n a0, a1, 44 +40225797: a1c8 l32i.n a12, a1, 40 +40225799: 91d8 l32i.n a13, a1, 36 +4022579b: 81e8 l32i.n a14, a1, 32 +4022579d: 71f8 l32i.n a15, a1, 28 +4022579f: 30c112 addi a1, a1, 48 +402257a2: f00d ret.n + +402257a4 : +402257a4: e0c112 addi a1, a1, -32 +402257a7: 0661c2 s32i a12, a1, 24 +402257aa: 076102 s32i a0, a1, 28 +402257ad: 0561d2 s32i a13, a1, 20 +402257b0: 02cd mov.n a12, a2 +402257b2: ec2485 call0 402119fc +402257b5: 0122b6 bltui a2, 2, 402257ba +402257b8: 3ccc bnez.n a12, 402257bf +402257ba: 020c movi.n a2, 0 +402257bc: 0030c6 j 40225883 +402257bf: eb9985 call0 40211158 +402257c2: f41226 beqi a2, 1, 402257ba +402257c5: 000c22 l8ui a2, a12, 0 +402257c8: 0ac216 beqz a2, 40225878 +402257cb: 0ca032 movi a3, 12 +402257ce: 202110 or a2, a1, a1 +402257d1: 811a01 l32r a0, 40205c3c +402257d4: 0000c0 callx0 a0 +402257d7: 013d mov.n a3, a1 +402257d9: 120c movi.n a2, 1 +402257db: edf685 call0 40213744 +402257de: 0148 l32i.n a4, a1, 0 +402257e0: 6e4461 l32r a6, 402010f0 +402257e3: 752840 extui a2, a4, 24, 8 +402257e6: 015480 slli a5, a4, 24 +402257e9: 205520 or a5, a5, a2 +402257ec: 102460 and a2, a4, a6 +402257ef: 112280 slli a2, a2, 8 +402257f2: 414840 srli a4, a4, 8 +402257f5: 205520 or a5, a5, a2 +402257f8: 104460 and a4, a4, a6 +402257fb: 205540 or a5, a5, a4 +402257fe: 1c48 l32i.n a4, a12, 4 +40225800: 013480 slli a3, a4, 24 +40225803: 752840 extui a2, a4, 24, 8 +40225806: 202320 or a2, a3, a2 +40225809: 103460 and a3, a4, a6 +4022580c: 113380 slli a3, a3, 8 +4022580f: 202230 or a2, a2, a3 +40225812: 414840 srli a4, a4, 8 +40225815: 2c38 l32i.n a3, a12, 8 +40225817: 104460 and a4, a4, a6 +4022581a: 017380 slli a7, a3, 24 +4022581d: 204240 or a4, a2, a4 +40225820: 752830 extui a2, a3, 24, 8 +40225823: 202720 or a2, a7, a2 +40225826: 107360 and a7, a3, a6 +40225829: 117780 slli a7, a7, 8 +4022582c: 413830 srli a3, a3, 8 +4022582f: 202270 or a2, a2, a7 +40225832: 103360 and a3, a3, a6 +40225835: 202230 or a2, a2, a3 +40225838: 053547 bltu a5, a4, 40225841 +4022583b: 023257 bltu a2, a5, 40225841 +4022583e: ffde06 j 402257ba +40225841: 415850 srli a5, a5, 8 +40225844: 413840 srli a3, a4, 8 +40225847: 021537 beq a5, a3, 4022584d +4022584a: ffdb06 j 402257ba +4022584d: 413820 srli a3, a2, 8 +40225850: 021537 beq a5, a3, 40225856 +40225853: ffd8c6 j 402257ba +40225856: c02240 sub a2, a2, a4 +40225859: 64a032 movi a3, 100 +4022585c: 02b327 bgeu a3, a2, 40225862 +4022585f: ffd5c6 j 402257ba +40225862: ff4ad1 l32r a13, 4022558c +40225865: c30c movi.n a3, 12 +40225867: 202dd0 or a2, a13, a13 +4022586a: 80f401 l32r a0, 40205c3c +4022586d: 0000c0 callx0 a0 +40225870: 1c28 l32i.n a2, a12, 4 +40225872: 1d29 s32i.n a2, a13, 4 +40225874: 2c28 l32i.n a2, a12, 8 +40225876: 2d29 s32i.n a2, a13, 8 +40225878: ff4521 l32r a2, 4022558c +4022587b: 000c32 l8ui a3, a12, 0 +4022587e: 004232 s8i a3, a2, 0 +40225881: 120c movi.n a2, 1 +40225883: 7108 l32i.n a0, a1, 28 +40225885: 61c8 l32i.n a12, a1, 24 +40225887: 51d8 l32i.n a13, a1, 20 +40225889: 20c112 addi a1, a1, 32 +4022588c: f00d ret.n + ... + +40225890 : +40225890: f0c112 addi a1, a1, -16 +40225893: 0161d2 s32i a13, a1, 4 +40225896: 20d220 or a13, a2, a2 +40225899: 3109 s32i.n a0, a1, 12 +4022589b: 21c9 s32i.n a12, a1, 8 +4022589d: ec15c5 call0 402119fc +402258a0: ed8c beqz.n a13, 402258b2 +402258a2: 0c22b6 bltui a2, 2, 402258b2 +402258a5: ff39c1 l32r a12, 4022558c +402258a8: 000c22 l8ui a2, a12, 0 +402258ab: 92cc bnez.n a2, 402258b8 +402258ad: eb8a85 call0 40211158 +402258b0: 42cc bnez.n a2, 402258b8 +402258b2: 020c movi.n a2, 0 +402258b4: 000286 j 402258c2 +402258b7: 1c2800 excw +402258ba: 1d29 s32i.n a2, a13, 4 +402258bc: 2c28 l32i.n a2, a12, 8 +402258be: 2d29 s32i.n a2, a13, 8 +402258c0: 120c movi.n a2, 1 +402258c2: 3108 l32i.n a0, a1, 12 +402258c4: 21c8 l32i.n a12, a1, 8 +402258c6: 11d8 l32i.n a13, a1, 4 +402258c8: 10c112 addi a1, a1, 16 +402258cb: f00d ret.n +402258cd: 000000 ill + +402258d0 : +402258d0: ff9251 l32r a5, 40225718 +402258d3: d0c112 addi a1, a1, -48 +402258d6: a1c9 s32i.n a12, a1, 40 +402258d8: 91d9 s32i.n a13, a1, 36 +402258da: 05c8 l32i.n a12, a5, 0 +402258dc: 0d0c movi.n a13, 0 +402258de: 81e9 s32i.n a14, a1, 32 +402258e0: 71f9 s32i.n a15, a1, 28 +402258e2: b109 s32i.n a0, a1, 44 +402258e4: 05ed mov.n a14, a5 +402258e6: 0dfd mov.n a15, a13 +402258e8: 04cc16 beqz a12, 40225938 +402258eb: 0c28 l32i.n a2, a12, 0 +402258ed: 4238 l32i.n a3, a2, 16 +402258ef: 53cc bnez.n a3, 402258f8 +402258f1: 3238 l32i.n a3, a2, 12 +402258f3: ffc332 addi a3, a3, -1 +402258f6: 3239 s32i.n a3, a2, 12 +402258f8: 3228 l32i.n a2, a2, 12 +402258fa: 1c68 l32i.n a6, a12, 4 +402258fc: d2ec bnez.n a2, 4022592d +402258fe: 0c3d mov.n a3, a12 +40225900: 202ee0 or a2, a14, a14 +40225903: 0169 s32i.n a6, a1, 0 +40225905: ffc505 call0 40225558 +40225908: 0c28 l32i.n a2, a12, 0 +4022590a: ff8431 l32r a3, 4022571c +4022590d: a0a342 movi a4, 0x3a0 +40225910: 6efe01 l32r a0, 40201508 +40225913: 0000c0 callx0 a0 +40225916: ff8131 l32r a3, 4022571c +40225919: 0cf9 s32i.n a15, a12, 0 +4022591b: 0c2d mov.n a2, a12 +4022591d: a2a342 movi a4, 0x3a2 +40225920: 6efa01 l32r a0, 40201508 +40225923: 0000c0 callx0 a0 +40225926: 0168 l32i.n a6, a1, 0 +40225928: 06cd mov.n a12, a6 +4022592a: ffee86 j 402258e8 +4022592d: dd1b addi.n a13, a13, 1 +4022592f: 06cd mov.n a12, a6 +40225931: 74d0d0 extui a13, a13, 0, 8 +40225934: ffec06 j 402258e8 +40225937: 8db600 excw +4022593a: 384a add.n a3, a8, a4 +4022593c: 0e .byte 0xe +4022593d: 040c movi.n a4, 0 +4022593f: 1328 l32i.n a2, a3, 4 +40225941: 035d mov.n a5, a3 +40225943: 02cd mov.n a12, a2 +40225945: 429c beqz.n a2, 4022595d +40225947: 0248 l32i.n a4, a2, 0 +40225949: 0c68 l32i.n a6, a12, 0 +4022594b: 3478 l32i.n a7, a4, 12 +4022594d: 3668 l32i.n a6, a6, 12 +4022594f: 03b767 bgeu a7, a6, 40225956 +40225952: 02cd mov.n a12, a2 +40225954: 053d mov.n a3, a5 +40225956: 025d mov.n a5, a2 +40225958: 1228 l32i.n a2, a2, 4 +4022595a: fff9c6 j 40225945 +4022595d: 1c28 l32i.n a2, a12, 4 +4022595f: ff6fd1 l32r a13, 4022571c +40225962: 1329 s32i.n a2, a3, 4 +40225964: 120c movi.n a2, 1 +40225966: 5429 s32i.n a2, a4, 20 +40225968: 0c28 l32i.n a2, a12, 0 +4022596a: 8aa342 movi a4, 0x38a +4022596d: 0d3d mov.n a3, a13 +4022596f: 6ee601 l32r a0, 40201508 +40225972: 0000c0 callx0 a0 +40225975: 020c movi.n a2, 0 +40225977: 0c29 s32i.n a2, a12, 0 +40225979: 8ca342 movi a4, 0x38c +4022597c: 0d3d mov.n a3, a13 +4022597e: 0c2d mov.n a2, a12 +40225980: 6ee201 l32r a0, 40201508 +40225983: 0000c0 callx0 a0 +40225986: b108 l32i.n a0, a1, 44 +40225988: a1c8 l32i.n a12, a1, 40 +4022598a: 91d8 l32i.n a13, a1, 36 +4022598c: 81e8 l32i.n a14, a1, 32 +4022598e: 71f8 l32i.n a15, a1, 28 +40225990: 30c112 addi a1, a1, 48 +40225993: f00d ret.n +40225995: 000000 ill + +40225998 : +40225998: f0c112 addi a1, a1, -16 +4022599b: 21c9 s32i.n a12, a1, 8 +4022599d: 11d9 s32i.n a13, a1, 4 +4022599f: 3109 s32i.n a0, a1, 12 +402259a1: 03cd mov.n a12, a3 +402259a3: 74d020 extui a13, a2, 0, 8 +402259a6: 638c beqz.n a3, 402259b0 +402259a8: 0a1d66 bnei a13, 1, 402259b6 +402259ab: 0003c6 j 402259be +402259ae: 450000 extui a0, a0, 16, 5 +402259b1: eb7a add.n a14, a11, a7 +402259b3: ff1256 bnez a2, 402259a8 +402259b6: 020c movi.n a2, 0 +402259b8: 000406 j 402259cc +402259bb: 000000 ill +402259be: 000c22 l8ui a2, a12, 0 +402259c1: fe8931 l32r a3, 402253e8 +402259c4: 042020 extui a2, a2, 0, 1 +402259c7: 004322 s8i a2, a3, 0 +402259ca: 120c movi.n a2, 1 +402259cc: 3108 l32i.n a0, a1, 12 +402259ce: 21c8 l32i.n a12, a1, 8 +402259d0: 11d8 l32i.n a13, a1, 4 +402259d2: 10c112 addi a1, a1, 16 +402259d5: f00d ret.n + ... + +402259d8 : +402259d8: f0c112 addi a1, a1, -16 +402259db: 21c9 s32i.n a12, a1, 8 +402259dd: 3109 s32i.n a0, a1, 12 +402259df: 20c220 or a12, a2, a2 +402259e2: ec0185 call0 402119fc +402259e5: 0422f6 bgeui a2, 2, 402259ed +402259e8: 020c movi.n a2, 0 +402259ea: 000446 j 402259ff +402259ed: eb7685 call0 40211158 +402259f0: ff4c16 beqz a12, 402259e8 +402259f3: f11226 beqi a2, 1, 402259e8 +402259f6: fe7b21 l32r a2, 402253e4 +402259f9: 0062c2 s32i a12, a2, 0 +402259fc: 01a022 movi a2, 1 +402259ff: 032102 l32i a0, a1, 12 +40225a02: 21c8 l32i.n a12, a1, 8 +40225a04: 10c112 addi a1, a1, 16 +40225a07: f00d ret.n +40225a09: 000000 ill + +40225a0c : +40225a0c: f0c112 addi a1, a1, -16 +40225a0f: 3109 s32i.n a0, a1, 12 +40225a11: ebfe85 call0 402119fc +40225a14: 0422f6 bgeui a2, 2, 40225a1c +40225a17: 020c movi.n a2, 0 +40225a19: 000446 j 40225a2e +40225a1c: eb7385 call0 40211158 +40225a1f: f41226 beqi a2, 1, 40225a17 +40225a22: fe7021 l32r a2, 402253e4 +40225a25: 78a032 movi a3, 120 +40225a28: 006232 s32i a3, a2, 0 +40225a2b: 01a022 movi a2, 1 +40225a2e: 032102 l32i a0, a1, 12 +40225a31: 10c112 addi a1, a1, 16 +40225a34: f00d ret.n + ... + +40225a38 : +40225a38: fe6b21 l32r a2, 402253e4 +40225a3b: 0228 l32i.n a2, a2, 0 +40225a3d: f00d ret.n + ... + +40225a40 : +40225a40: c0c112 addi a1, a1, -64 +40225a43: 744040 extui a4, a4, 0, 8 +40225a46: d1d9 s32i.n a13, a1, 52 +40225a48: c1e9 s32i.n a14, a1, 48 +40225a4a: f109 s32i.n a0, a1, 60 +40225a4c: e1c9 s32i.n a12, a1, 56 +40225a4e: b1f9 s32i.n a15, a1, 44 +40225a50: 4149 s32i.n a4, a1, 16 +40225a52: 02dd mov.n a13, a2 +40225a54: 03ed mov.n a14, a3 +40225a56: 07f216 beqz a2, 40225ad9 +40225a59: 07c316 beqz a3, 40225ad9 +40225a5c: ff2fc1 l32r a12, 40225718 +40225a5f: 0cf8 l32i.n a15, a12, 0 +40225a61: 074f16 beqz a15, 40225ad9 +40225a64: 0fc8 l32i.n a12, a15, 0 +40225a66: 06a042 movi a4, 6 +40225a69: 203dd0 or a3, a13, a13 +40225a6c: 04cc22 addi a2, a12, 4 +40225a6f: 706b01 l32r a0, 40201c1c +40225a72: 0000c0 callx0 a0 +40225a75: 05b256 bnez a2, 40225ad4 +40225a78: 440c movi.n a4, 4 +40225a7a: 0e3d mov.n a3, a14 +40225a7c: 0c2d mov.n a2, a12 +40225a7e: 706701 l32r a0, 40201c1c +40225a81: 0000c0 callx0 a0 +40225a84: 04c256 bnez a2, 40225ad4 +40225a87: 4c28 l32i.n a2, a12, 16 +40225a89: 031226 beqi a2, 1, 40225a90 +40225a8c: 4128 l32i.n a2, a1, 16 +40225a8e: 62ac beqz.n a2, 40225ab8 +40225a90: ff2221 l32r a2, 40225718 +40225a93: 0f3d mov.n a3, a15 +40225a95: ffac05 call0 40225558 +40225a98: ff21e1 l32r a14, 4022571c +40225a9b: 0f2d mov.n a2, a15 +40225a9d: 0e3d mov.n a3, a14 +40225a9f: fba342 movi a4, 0x3fb +40225aa2: 6e9901 l32r a0, 40201508 +40225aa5: 0000c0 callx0 a0 +40225aa8: 00a442 movi a4, 0x400 +40225aab: 0e3d mov.n a3, a14 +40225aad: 0c2d mov.n a2, a12 +40225aaf: 6e9601 l32r a0, 40201508 +40225ab2: 0000c0 callx0 a0 +40225ab5: 0000c6 j 40225abc +40225ab8: 120c movi.n a2, 1 +40225aba: 5c29 s32i.n a2, a12, 20 +40225abc: 440c movi.n a4, 4 +40225abe: 030c movi.n a3, 0 +40225ac0: 202110 or a2, a1, a1 +40225ac3: 6d5301 l32r a0, 40201010 <_irom0_text_start> +40225ac6: 0000c0 callx0 a0 +40225ac9: 013d mov.n a3, a1 +40225acb: 0d2d mov.n a2, a13 +40225acd: ed2505 call0 40212d20 +40225ad0: 000146 j 40225ad9 +40225ad3: 1ff800 excw +40225ad6: ffe1c6 j 40225a61 +40225ad9: f108 l32i.n a0, a1, 60 +40225adb: e1c8 l32i.n a12, a1, 56 +40225add: d1d8 l32i.n a13, a1, 52 +40225adf: c1e8 l32i.n a14, a1, 48 +40225ae1: b1f8 l32i.n a15, a1, 44 +40225ae3: 40c112 addi a1, a1, 64 +40225ae6: f00d ret.n +40225ae8: d339 s32i.n a3, a3, 52 +40225aea: fe .byte 0xfe +40225aeb: 3f .byte 0x3f + +40225aec : +40225aec: b0c112 addi a1, a1, -80 +40225aef: 4129 s32i.n a2, a1, 16 +40225af1: fea621 l32r a2, 4022558c +40225af4: 038d mov.n a8, a3 +40225af6: 1238 l32i.n a3, a2, 4 +40225af8: 2228 l32i.n a2, a2, 8 +40225afa: 136102 s32i a0, a1, 76 +40225afd: 5129 s32i.n a2, a1, 20 +40225aff: 4128 l32i.n a2, a1, 16 +40225b01: 1261c2 s32i a12, a1, 72 +40225b04: 1161d2 s32i a13, a1, 68 +40225b07: 1061e2 s32i a14, a1, 64 +40225b0a: f1f9 s32i.n a15, a1, 60 +40225b0c: 0139 s32i.n a3, a1, 0 +40225b0e: 1c8216 beqz a2, 40225cda +40225b11: 189c beqz.n a8, 40225b26 +40225b13: 0828 l32i.n a2, a8, 0 +40225b15: 020266 bnei a2, -1, 40225b1b +40225b18: 006f86 j 40225cda +40225b1b: 1d0c movi.n a13, 1 +40225b1d: 72cc bnez.n a2, 40225b28 +40225b1f: 0d0c movi.n a13, 0 +40225b21: 0d8d mov.n a8, a13 +40225b23: 000046 j 40225b28 +40225b26: 0d0c movi.n a13, 0 +40225b28: fff021 l32r a2, 40225ae8 +40225b2b: 030c movi.n a3, 0 +40225b2d: 004232 s8i a3, a2, 0 +40225b30: fefa31 l32r a3, 40225718 +40225b33: 0f0c movi.n a15, 0 +40225b35: 03c8 l32i.n a12, a3, 0 +40225b37: 6d6ee1 l32r a14, 402010f0 +40225b3a: 0f9d mov.n a9, a15 +40225b3c: 61f9 s32i.n a15, a1, 24 +40225b3e: 09fc16 beqz a12, 40225be1 +40225b41: 0c58 l32i.n a5, a12, 0 +40225b43: 4138 l32i.n a3, a1, 16 +40225b45: 254b addi.n a2, a5, 4 +40225b47: 640c movi.n a4, 6 +40225b49: 7159 s32i.n a5, a1, 28 +40225b4b: 9189 s32i.n a8, a1, 36 +40225b4d: 8199 s32i.n a9, a1, 32 +40225b4f: 703301 l32r a0, 40201c1c +40225b52: 0000c0 callx0 a0 +40225b55: 7158 l32i.n a5, a1, 28 +40225b57: 9188 l32i.n a8, a1, 36 +40225b59: 8198 l32i.n a9, a1, 32 +40225b5b: 72cc bnez.n a2, 40225b66 +40225b5d: 085816 beqz a8, 40225be6 +40225b60: 61c9 s32i.n a12, a1, 24 +40225b62: 000086 j 40225b68 +40225b65: 889c00 excw +40225b68: 083d mov.n a3, a8 +40225b6a: 440c movi.n a4, 4 +40225b6c: 052d mov.n a2, a5 +40225b6e: 9189 s32i.n a8, a1, 36 +40225b70: 8199 s32i.n a9, a1, 32 +40225b72: 702a01 l32r a0, 40201c1c +40225b75: 0000c0 callx0 a0 +40225b78: 8198 l32i.n a9, a1, 32 +40225b7a: 9188 l32i.n a8, a1, 36 +40225b7c: 839c20 moveqz a9, a12, a2 +40225b7f: 001646 j 40225bdc +40225b82: 054f56 bnez a15, 40225bda +40225b85: 440c movi.n a4, 4 +40225b87: 013d mov.n a3, a1 +40225b89: 052d mov.n a2, a5 +40225b8b: 9189 s32i.n a8, a1, 36 +40225b8d: 8199 s32i.n a9, a1, 32 +40225b8f: 702301 l32r a0, 40201c1c +40225b92: 0000c0 callx0 a0 +40225b95: 9188 l32i.n a8, a1, 36 +40225b97: 8198 l32i.n a9, a1, 32 +40225b99: d2fc bnez.n a2, 40225bda +40225b9b: 0138 l32i.n a3, a1, 0 +40225b9d: 014380 slli a4, a3, 24 +40225ba0: 752830 extui a2, a3, 24, 8 +40225ba3: 202420 or a2, a4, a2 +40225ba6: 1043e0 and a4, a3, a14 +40225ba9: 114480 slli a4, a4, 8 +40225bac: 413830 srli a3, a3, 8 +40225baf: 202240 or a2, a2, a4 +40225bb2: 1033e0 and a3, a3, a14 +40225bb5: 202230 or a2, a2, a3 +40225bb8: 221b addi.n a2, a2, 1 +40225bba: 753820 extui a3, a2, 24, 8 +40225bbd: 014280 slli a4, a2, 24 +40225bc0: 204430 or a4, a4, a3 +40225bc3: 1032e0 and a3, a2, a14 +40225bc6: 113380 slli a3, a3, 8 +40225bc9: 412820 srli a2, a2, 8 +40225bcc: 203430 or a3, a4, a3 +40225bcf: 1022e0 and a2, a2, a14 +40225bd2: 202320 or a2, a3, a2 +40225bd5: 0129 s32i.n a2, a1, 0 +40225bd7: 000046 j 40225bdc +40225bda: 1f0c movi.n a15, 1 +40225bdc: 1cc8 l32i.n a12, a12, 4 +40225bde: ffd706 j 40225b3e +40225be1: 61c8 l32i.n a12, a1, 24 +40225be3: 000046 j 40225be8 +40225be6: 1f0c movi.n a15, 1 +40225be8: d8cc bnez.n a8, 40225bf9 +40225bea: 0b1f26 beqi a15, 1, 40225bf9 +40225bed: 0128 l32i.n a2, a1, 0 +40225bef: 5138 l32i.n a3, a1, 20 +40225bf1: 02b327 bgeu a3, a2, 40225bf7 +40225bf4: 003886 j 40225cda +40225bf7: 1f0c movi.n a15, 1 +40225bf9: 079c16 beqz a12, 40225c76 +40225bfc: 045916 beqz a9, 40225c45 +40225bff: 09e8 l32i.n a14, a9, 0 +40225c01: 331c97 beq a12, a9, 40225c38 +40225c04: 5e28 l32i.n a2, a14, 20 +40225c06: 021226 beqi a2, 1, 40225c0c +40225c09: 003346 j 40225cda +40225c0c: fec321 l32r a2, 40225718 +40225c0f: 0c3d mov.n a3, a12 +40225c11: ff9445 call0 40225558 +40225c14: fec2f1 l32r a15, 4022571c +40225c17: 0c28 l32i.n a2, a12, 0 +40225c19: 0f3d mov.n a3, a15 +40225c1b: 5ba442 movi a4, 0x45b +40225c1e: 6e3a01 l32r a0, 40201508 +40225c21: 0000c0 callx0 a0 +40225c24: 020c movi.n a2, 0 +40225c26: 0c29 s32i.n a2, a12, 0 +40225c28: 5da442 movi a4, 0x45d +40225c2b: 0f3d mov.n a3, a15 +40225c2d: 0c2d mov.n a2, a12 +40225c2f: 6e3601 l32r a0, 40201508 +40225c32: 0000c0 callx0 a0 +40225c35: 001186 j 40225c7f +40225c38: ffac31 l32r a3, 40225ae8 +40225c3b: 120c movi.n a2, 1 +40225c3d: 004322 s8i a2, a3, 0 +40225c40: 0d0c movi.n a13, 0 +40225c42: 001186 j 40225c8c +40225c45: 0ce8 l32i.n a14, a12, 0 +40225c47: 688c beqz.n a8, 40225c51 +40225c49: 0828 l32i.n a2, a8, 0 +40225c4b: 000286 j 40225c59 +40225c4e: 000000 ill +40225c51: 021f26 beqi a15, 1, 40225c57 +40225c54: 002086 j 40225cda +40225c57: 0128 l32i.n a2, a1, 0 +40225c59: 0e29 s32i.n a2, a14, 0 +40225c5b: feaf21 l32r a2, 40225718 +40225c5e: 203cc0 or a3, a12, a12 +40225c61: ff8f45 call0 40225558 +40225c64: fde021 l32r a2, 402253e4 +40225c67: 4ed9 s32i.n a13, a14, 16 +40225c69: 0228 l32i.n a2, a2, 0 +40225c6b: 0c3d mov.n a3, a12 +40225c6d: 3e29 s32i.n a2, a14, 12 +40225c6f: 020c movi.n a2, 0 +40225c71: 5e29 s32i.n a2, a14, 20 +40225c73: 002546 j 40225d0c +40225c76: 29ac beqz.n a9, 40225c9c +40225c78: 09e8 l32i.n a14, a9, 0 +40225c7a: 5e28 l32i.n a2, a14, 20 +40225c7c: 5a1266 bnei a2, 1, 40225cda +40225c7f: 4138 l32i.n a3, a1, 16 +40225c81: 640c movi.n a4, 6 +40225c83: 04ce22 addi a2, a14, 4 +40225c86: 6ce301 l32r a0, 40201014 <_irom0_text_start+0x4> +40225c89: 0000c0 callx0 a0 +40225c8c: fdd621 l32r a2, 402253e4 +40225c8f: 0228 l32i.n a2, a2, 0 +40225c91: 4ed9 s32i.n a13, a14, 16 +40225c93: 3e29 s32i.n a2, a14, 12 +40225c95: 020c movi.n a2, 0 +40225c97: 5e29 s32i.n a2, a14, 20 +40225c99: 001d46 j 40225d12 +40225c9c: fea0c1 l32r a12, 4022571c +40225c9f: 84a442 movi a4, 0x484 +40225ca2: 0c3d mov.n a3, a12 +40225ca4: 821c movi.n a2, 24 +40225ca6: 9189 s32i.n a8, a1, 36 +40225ca8: 70ea01 l32r a0, 40202050 +40225cab: 0000c0 callx0 a0 +40225cae: 9188 l32i.n a8, a1, 36 +40225cb0: 02ed mov.n a14, a2 +40225cb2: 388c beqz.n a8, 40225cb9 +40225cb4: 0828 l32i.n a2, a8, 0 +40225cb6: 000106 j 40225cbe +40225cb9: 101f66 bnei a15, 1, 40225ccd +40225cbc: 0128 l32i.n a2, a1, 0 +40225cbe: 0e29 s32i.n a2, a14, 0 +40225cc0: 0e28 l32i.n a2, a14, 0 +40225cc2: 5138 l32i.n a3, a1, 20 +40225cc4: 8ea442 movi a4, 0x48e +40225cc7: 053327 bltu a3, a2, 40225cd0 +40225cca: 000446 j 40225cdf +40225ccd: 8aa442 movi a4, 0x48a +40225cd0: 0c3d mov.n a3, a12 +40225cd2: 0e2d mov.n a2, a14 +40225cd4: 6e0d01 l32r a0, 40201508 +40225cd7: 0000c0 callx0 a0 +40225cda: 020c movi.n a2, 0 +40225cdc: 000d06 j 40225d14 +40225cdf: 4138 l32i.n a3, a1, 16 +40225ce1: 06a042 movi a4, 6 +40225ce4: 2e4b addi.n a2, a14, 4 +40225ce6: 6ccb01 l32r a0, 40201014 <_irom0_text_start+0x4> +40225ce9: 0000c0 callx0 a0 +40225cec: fdbe21 l32r a2, 402253e4 +40225cef: 4ed9 s32i.n a13, a14, 16 +40225cf1: 0228 l32i.n a2, a2, 0 +40225cf3: 0d0c movi.n a13, 0 +40225cf5: 3e29 s32i.n a2, a14, 12 +40225cf7: 0c3d mov.n a3, a12 +40225cf9: 5ed9 s32i.n a13, a14, 20 +40225cfb: 95a442 movi a4, 0x495 +40225cfe: 820c movi.n a2, 8 +40225d00: 70d401 l32r a0, 40202050 +40225d03: 0000c0 callx0 a0 +40225d06: 02e9 s32i.n a14, a2, 0 +40225d08: 12d9 s32i.n a13, a2, 4 +40225d0a: 023d mov.n a3, a2 +40225d0c: fe8321 l32r a2, 40225718 +40225d0f: ff8185 call0 40225528 +40225d12: 0e28 l32i.n a2, a14, 0 +40225d14: 132102 l32i a0, a1, 76 +40225d17: 1221c2 l32i a12, a1, 72 +40225d1a: 1121d2 l32i a13, a1, 68 +40225d1d: 1021e2 l32i a14, a1, 64 +40225d20: f1f8 l32i.n a15, a1, 60 +40225d22: 50c112 addi a1, a1, 80 +40225d25: f00d ret.n +40225d27: 04c000 extui a12, a0, 0, 1 +40225d2a: 124023 excw +40225d2d: d2b0c1 l32r a12, 4021a7f0 +40225d30: 021161 l32r a6, 401e6574 <_lit4_end+0xe0248> +40225d33: c21361 l32r a6, 40216580 +40225d36: e21261 l32r a6, 4021e580 +40225d39: f91061 l32r a6, 4022417c +40225d3c: 04ddf1 l32r a15, 401e70b0 <_lit4_end+0xe0d84> +40225d3f: 2d1416 beqz a4, 40226014 +40225d42: fe76e1 l32r a14, 4022571c +40225d45: 69a242 movi a4, 0x269 +40225d48: 0e3d mov.n a3, a14 +40225d4a: 24a222 movi a2, 0x224 +40225d4d: 70c001 l32r a0, 40202050 +40225d50: 0000c0 callx0 a0 +40225d53: 02cd mov.n a12, a2 +40225d55: 72cc bnez.n a2, 40225d60 +40225d57: 0d2d mov.n a2, a13 +40225d59: 030445 call0 40228da0 +40225d5c: 00ad06 j 40226014 +40225d5f: 1de200 excw +40225d62: 1d4804 excw +40225d65: 020c movi.n a2, 0 +40225d67: 051d32 l16ui a3, a13, 10 +40225d6a: 12b237 bgeu a2, a3, 40225d80 +40225d6d: 342a add.n a3, a4, a2 +40225d6f: 000352 l8ui a5, a3, 0 +40225d72: 3c2a add.n a3, a12, a2 +40225d74: 221b addi.n a2, a2, 1 +40225d76: 004352 s8i a5, a3, 0 +40225d79: f42020 extui a2, a2, 0, 16 +40225d7c: fff9c6 j 40225d67 +40225d7f: 0d3800 excw +40225d82: 054356 bnez a3, 40225dda +40225d85: 10af22 movi a2, -240 +40225d88: ee2a add.n a14, a14, a2 +40225d8a: ffe731 l32r a3, 40225d28 +40225d8d: eca022 movi a2, 236 +40225d90: 440c movi.n a4, 4 +40225d92: 2c2a add.n a2, a12, a2 +40225d94: f4e0e0 extui a14, a14, 0, 16 +40225d97: 6fa101 l32r a0, 40201c1c +40225d9a: 0000c0 callx0 a0 +40225d9d: 0c0256 bnez a2, 40225e61 +40225da0: 440c movi.n a4, 4 +40225da2: 3ccb addi.n a3, a12, 12 +40225da4: 214a add.n a2, a1, a4 +40225da6: 6c9b01 l32r a0, 40201014 <_irom0_text_start+0x4> +40225da9: 0000c0 callx0 a0 +40225dac: 1cccf2 addi a15, a12, 28 +40225daf: 04c132 addi a3, a1, 4 +40225db2: 202ff0 or a2, a15, a15 +40225db5: ffd345 call0 40225aec +40225db8: fd5c31 l32r a3, 40225328 +40225dbb: 116e00 slli a6, a14, 16 +40225dbe: f0a052 movi a5, 240 +40225dc1: 5c5a add.n a5, a12, a5 +40225dc3: 316060 srai a6, a6, 16 +40225dc6: 0329 s32i.n a2, a3, 0 +40225dc8: 0129 s32i.n a2, a1, 0 +40225dca: 656a add.n a6, a5, a6 +40225dcc: 520c movi.n a2, 5 +40225dce: 070c movi.n a7, 0 +40225dd0: 03ed mov.n a14, a3 +40225dd2: 583c movi.n a8, 53 +40225dd4: ffa092 movi a9, 255 +40225dd7: 000c86 j 40225e0d +40225dda: 1368 l32i.n a6, a3, 4 +40225ddc: 030c movi.n a3, 0 +40225dde: 0d58 l32i.n a5, a13, 0 +40225de0: 423a add.n a4, a2, a3 +40225de2: 051552 l16ui a5, a5, 10 +40225de5: f44040 extui a4, a4, 0, 16 +40225de8: 99b357 bgeu a3, a5, 40225d85 +40225deb: 563a add.n a5, a6, a3 +40225ded: 000552 l8ui a5, a5, 0 +40225df0: 4c4a add.n a4, a12, a4 +40225df2: 331b addi.n a3, a3, 1 +40225df4: 004452 s8i a5, a4, 0 +40225df7: f43030 extui a3, a3, 0, 16 +40225dfa: fff806 j 40225dde +40225dfd: 000532 l8ui a3, a5, 0 +40225e00: 109387 bne a3, a8, 40225e14 +40225e03: 020572 l8ui a7, a5, 2 +40225e06: 010532 l8ui a3, a5, 1 +40225e09: 332b addi.n a3, a3, 2 +40225e0b: 553a add.n a5, a5, a3 +40225e0d: ec3567 bltu a5, a6, 40225dfd +40225e10: 000d06 j 40225e48 +40225e13: 139700 excw +40225e16: 243c30 extui a3, a3, 12, 3 +40225e19: e99347 bne a3, a4, 40225e06 +40225e1c: 352b addi.n a3, a5, 2 +40225e1e: 440c movi.n a4, 4 +40225e20: 012d mov.n a2, a1 +40225e22: 4159 s32i.n a5, a1, 16 +40225e24: 8169 s32i.n a6, a1, 32 +40225e26: 5179 s32i.n a7, a1, 20 +40225e28: 6189 s32i.n a8, a1, 24 +40225e2a: 7199 s32i.n a9, a1, 28 +40225e2c: 6f7c01 l32r a0, 40201c1c +40225e2f: 0000c0 callx0 a0 +40225e32: 430c movi.n a3, 4 +40225e34: 340c movi.n a4, 3 +40225e36: 833420 moveqz a3, a4, a2 +40225e39: 032d mov.n a2, a3 +40225e3b: 4158 l32i.n a5, a1, 16 +40225e3d: 8168 l32i.n a6, a1, 32 +40225e3f: 5178 l32i.n a7, a1, 20 +40225e41: 6188 l32i.n a8, a1, 24 +40225e43: 7198 l32i.n a9, a1, 28 +40225e45: ffef46 j 40225e06 +40225e48: 023726 beqi a7, 3, 40225e4e +40225e4b: 006a86 j 40225ff9 +40225e4e: 265226 beqi a2, 5, 40225e78 +40225e51: 2f6266 bnei a2, 6, 40225e84 +40225e54: 0f2d mov.n a2, a15 +40225e56: 140c movi.n a4, 1 +40225e58: 314b addi.n a3, a1, 4 +40225e5a: ffbe45 call0 40225a40 +40225e5d: 1128 l32i.n a2, a1, 4 +40225e5f: 0e29 s32i.n a2, a14, 0 +40225e61: 0d2d mov.n a2, a13 +40225e63: 02f3c5 call0 40228da0 +40225e66: fe2d31 l32r a3, 4022571c +40225e69: aba242 movi a4, 0x2ab +40225e6c: 0c2d mov.n a2, a12 +40225e6e: 6da601 l32r a0, 40201508 +40225e71: 0000c0 callx0 a0 +40225e74: 006706 j 40226014 +40225e77: 1c2100 excw +40225e7a: ff .byte 0xff +40225e7b: 000222 l8ui a2, a2, 0 +40225e7e: 711226 beqi a2, 1, 40225ef3 +40225e81: 003ec6 j 40225f80 +40225e84: 6b3226 beqi a2, 3, 40225ef3 +40225e87: 024266 bnei a2, 4, 40225e8d +40225e8a: 003c86 j 40225f80 +40225e8d: d01266 bnei a2, 1, 40225e61 +40225e90: 202cc0 or a2, a12, a12 +40225e93: ff49c5 call0 40225330 +40225e96: 35a022 movi a2, 53 +40225e99: f04c22 s8i a2, a12, 240 +40225e9c: 01a022 movi a2, 1 +40225e9f: f14c22 s8i a2, a12, 241 +40225ea2: 220c movi.n a2, 2 +40225ea4: f24c22 s8i a2, a12, 242 +40225ea7: f3a022 movi a2, 243 +40225eaa: 2c2a add.n a2, a12, a2 +40225eac: ff53c5 call0 402253ec +40225eaf: 040c movi.n a4, 0 +40225eb1: f37c movi.n a3, -1 +40225eb3: 004232 s8i a3, a2, 0 +40225eb6: 042d mov.n a2, a4 +40225eb8: 24a232 movi a3, 0x224 +40225ebb: 02f585 call0 40228e14 +40225ebe: 02ed mov.n a14, a2 +40225ec0: 024d mov.n a4, a2 +40225ec2: 050c movi.n a5, 0 +40225ec4: f99216 beqz a2, 40225e61 +40225ec7: 1478 l32i.n a7, a4, 4 +40225ec9: 052d mov.n a2, a5 +40225ecb: c03250 sub a3, a2, a5 +40225ece: 051462 l16ui a6, a4, 10 +40225ed1: f43030 extui a3, a3, 0, 16 +40225ed4: 11b367 bgeu a3, a6, 40225ee9 +40225ed7: 621b addi.n a6, a2, 1 +40225ed9: 2c2a add.n a2, a12, a2 +40225edb: 000222 l8ui a2, a2, 0 +40225ede: 373a add.n a3, a7, a3 +40225ee0: 004322 s8i a2, a3, 0 +40225ee3: f42060 extui a2, a6, 0, 16 +40225ee6: fff846 j 40225ecb +40225ee9: 0448 l32i.n a4, a4, 0 +40225eeb: 0ed416 beqz a4, 40225fdc +40225eee: 025d mov.n a5, a2 +40225ef0: fff4c6 j 40225ec7 +40225ef3: 0c2d mov.n a2, a12 +40225ef5: ff4385 call0 40225330 +40225ef8: 523c movi.n a2, 53 +40225efa: f04c22 s8i a2, a12, 240 +40225efd: 120c movi.n a2, 1 +40225eff: f14c22 s8i a2, a12, 241 +40225f02: 520c movi.n a2, 5 +40225f04: f24c22 s8i a2, a12, 242 +40225f07: f3a022 movi a2, 243 +40225f0a: 2c2a add.n a2, a12, a2 +40225f0c: ff4dc5 call0 402253ec +40225f0f: 040c movi.n a4, 0 +40225f11: f37c movi.n a3, -1 +40225f13: 004232 s8i a3, a2, 0 +40225f16: 042d mov.n a2, a4 +40225f18: 24a232 movi a3, 0x224 +40225f1b: 02ef85 call0 40228e14 +40225f1e: 026d mov.n a6, a2 +40225f20: 024d mov.n a4, a2 +40225f22: 050c movi.n a5, 0 +40225f24: 04d216 beqz a2, 40225f75 +40225f27: 1488 l32i.n a8, a4, 4 +40225f29: 052d mov.n a2, a5 +40225f2b: c03250 sub a3, a2, a5 +40225f2e: 051472 l16ui a7, a4, 10 +40225f31: f43030 extui a3, a3, 0, 16 +40225f34: 11b377 bgeu a3, a7, 40225f49 +40225f37: 721b addi.n a7, a2, 1 +40225f39: 2c2a add.n a2, a12, a2 +40225f3b: 000222 l8ui a2, a2, 0 +40225f3e: 383a add.n a3, a8, a3 +40225f40: 004322 s8i a2, a3, 0 +40225f43: f42070 extui a2, a7, 0, 16 +40225f46: fff846 j 40225f2b +40225f49: 0448 l32i.n a4, a4, 0 +40225f4b: 548c beqz.n a4, 40225f54 +40225f4d: 025d mov.n a5, a2 +40225f4f: fff506 j 40225f27 +40225f52: 210000 srai a0, a0, 0 +40225f55: fd8b addi.n a15, a13, 8 +40225f57: fd8c41 l32r a4, 40225588 +40225f5a: 002222 l32i a2, a2, 0 +40225f5d: 063d mov.n a3, a6 +40225f5f: 454c movi.n a5, 68 +40225f61: 086162 s32i a6, a1, 32 +40225f64: 068705 call0 4022c7d8 +40225f67: 8168 l32i.n a6, a1, 32 +40225f69: 071622 l16ui a2, a6, 14 +40225f6c: 005216 beqz a2, 40225f75 +40225f6f: 202660 or a2, a6, a6 +40225f72: 02e2c5 call0 40228da0 +40225f75: 0e3d mov.n a3, a14 +40225f77: 0f2d mov.n a2, a15 +40225f79: ecda45 call0 40212d20 +40225f7c: ffb846 j 40225e61 +40225f7f: 2cc000 excw +40225f82: 3ac520 excw +40225f85: ff .byte 0xff +40225f86: 35a022 movi a2, 53 +40225f89: f04c22 s8i a2, a12, 240 +40225f8c: 01a022 movi a2, 1 +40225f8f: f14c22 s8i a2, a12, 241 +40225f92: 620c movi.n a2, 6 +40225f94: 040c movi.n a4, 0 +40225f96: f24c22 s8i a2, a12, 242 +40225f99: f27c movi.n a2, -1 +40225f9b: f34c22 s8i a2, a12, 243 +40225f9e: 24a232 movi a3, 0x224 +40225fa1: 042d mov.n a2, a4 +40225fa3: 02e705 call0 40228e14 +40225fa6: 02ed mov.n a14, a2 +40225fa8: 024d mov.n a4, a2 +40225faa: 050c movi.n a5, 0 +40225fac: eb1216 beqz a2, 40225e61 +40225faf: 1478 l32i.n a7, a4, 4 +40225fb1: 052d mov.n a2, a5 +40225fb3: c03250 sub a3, a2, a5 +40225fb6: 051462 l16ui a6, a4, 10 +40225fb9: f43030 extui a3, a3, 0, 16 +40225fbc: 11b367 bgeu a3, a6, 40225fd1 +40225fbf: 621b addi.n a6, a2, 1 +40225fc1: 2c2a add.n a2, a12, a2 +40225fc3: 000222 l8ui a2, a2, 0 +40225fc6: 373a add.n a3, a7, a3 +40225fc8: 004322 s8i a2, a3, 0 +40225fcb: f42060 extui a2, a6, 0, 16 +40225fce: fff846 j 40225fb3 +40225fd1: 0448 l32i.n a4, a4, 0 +40225fd3: 548c beqz.n a4, 40225fdc +40225fd5: 025d mov.n a5, a2 +40225fd7: fff506 j 40225faf +40225fda: 210000 srai a0, a0, 0 +40225fdd: fd69 s32i.n a6, a13, 60 +40225fdf: fd6a41 l32r a4, 40225588 +40225fe2: 0228 l32i.n a2, a2, 0 +40225fe4: 454c movi.n a5, 68 +40225fe6: 0e3d mov.n a3, a14 +40225fe8: 067ec5 call0 4022c7d8 +40225feb: 071e22 l16ui a2, a14, 14 +40225fee: e6f216 beqz a2, 40225e61 +40225ff1: 0e2d mov.n a2, a14 +40225ff3: 02dac5 call0 40228da0 +40225ff6: ff99c6 j 40225e61 +40225ff9: 0847f6 bgeui a7, 4, 40226005 +40225ffc: 021766 bnei a7, 1, 40226002 +40225fff: ffa346 j 40225e90 +40226002: ff92c6 j 40225e51 +40226005: 024766 bnei a7, 4, 4022600b +40226008: ff9546 j 40225e61 +4022600b: 027766 bnei a7, 7, 40226011 +4022600e: ff9086 j 40225e54 +40226011: ff8f06 j 40225e51 +40226014: 132102 l32i a0, a1, 76 +40226017: 1221c2 l32i a12, a1, 72 +4022601a: 1121d2 l32i a13, a1, 68 +4022601d: 1021e2 l32i a14, a1, 64 +40226020: f1f8 l32i.n a15, a1, 60 +40226022: 50c112 addi a1, a1, 80 +40226025: f00d ret.n +40226027: af4200 excw +4022602a: a052c0 addx4 a5, a2, a12 +4022602d: 321bc0 excw +40226030: 000222 l8ui a2, a2, 0 +40226033: 106240 and a6, a2, a4 +40226036: 0a1657 beq a6, a5, 40226044 +40226039: 232a add.n a2, a3, a2 +4022603b: 000232 l8ui a3, a2, 0 +4022603e: fec356 bnez a3, 4022602e +40226041: 203220 or a3, a2, a2 +40226044: 231b addi.n a2, a3, 1 +40226046: f00d ret.n +40226048: fe8863 excw +4022604b: 3f .byte 0x3f +4022604c: fed360 excw +4022604f: 3f .byte 0x3f +40226050: d35c movi.n a3, 93 +40226052: fe .byte 0xfe +40226053: 3f .byte 0x3f +40226054: d36c movi.n a3, -19 +40226056: fe .byte 0xfe +40226057: 3f .byte 0x3f +40226058: 000100 excw +4022605b: 3a8001 l32r a0, 401f4a5c <_lit4_end+0xee730> +4022605e: 0009 s32i.n a0, a0, 0 +40226060: b0c112 addi a1, a1, -80 +40226063: 1061e2 s32i a14, a1, 64 +40226066: fff8e1 l32r a14, 40226048 +40226069: 4149 s32i.n a4, a1, 16 +4022606b: 0e3d mov.n a3, a14 +4022606d: eaa242 movi a4, 0x2ea +40226070: 03a222 movi a2, 0x203 +40226073: 1261c2 s32i a12, a1, 72 +40226076: 136102 s32i a0, a1, 76 +40226079: 1161d2 s32i a13, a1, 68 +4022607c: f1f9 s32i.n a15, a1, 60 +4022607e: 6ff401 l32r a0, 40202050 +40226081: 0000c0 callx0 a0 +40226084: 4158 l32i.n a5, a1, 16 +40226086: 323b addi.n a3, a2, 3 +40226088: 5129 s32i.n a2, a1, 20 +4022608a: 041542 l16ui a4, a5, 8 +4022608d: c27c movi.n a2, -4 +4022608f: 103320 and a3, a3, a2 +40226092: ffee21 l32r a2, 4022604c +40226095: e6c452 addi a5, a4, -26 +40226098: 0239 s32i.n a3, a2, 0 +4022609a: 02cd mov.n a12, a2 +4022609c: f45050 extui a5, a5, 0, 16 +4022609f: e6a122 movi a2, 0x1e6 +402260a2: 02b257 bgeu a2, a5, 402260a8 +402260a5: 008146 j 402262ae +402260a8: 4128 l32i.n a2, a1, 16 +402260aa: 050c movi.n a5, 0 +402260ac: 0307c5 call0 4022912c +402260af: 4148 l32i.n a4, a1, 16 +402260b1: 041432 l16ui a3, a4, 8 +402260b4: 021327 beq a3, a2, 402260ba +402260b7: 007cc6 j 402262ae +402260ba: 0c28 l32i.n a2, a12, 0 +402260bc: 010232 l8ui a3, a2, 1 +402260bf: 000242 l8ui a4, a2, 0 +402260c2: 113380 slli a3, a3, 8 +402260c5: 203340 or a3, a3, a4 +402260c8: ffe241 l32r a4, 40226050 +402260cb: 115380 slli a5, a3, 8 +402260ce: 413830 srli a3, a3, 8 +402260d1: 203530 or a3, a5, a3 +402260d4: 001452 l16ui a5, a4, 0 +402260d7: c05350 sub a5, a3, a5 +402260da: f4f050 extui a15, a5, 0, 16 +402260dd: 024fb6 bltui a15, 4, 402260e3 +402260e0: 007286 j 402262ae +402260e3: 11efe0 slli a14, a15, 2 +402260e6: ffdb71 l32r a7, 40226054 +402260e9: 3efa add.n a3, a14, a15 +402260eb: f03330 subx8 a3, a3, a3 +402260ee: b03370 addx8 a3, a3, a7 +402260f1: 000332 l8ui a3, a3, 0 +402260f4: 07dd mov.n a13, a7 +402260f6: 022326 beqi a3, 2, 402260fc +402260f9: 006c46 j 402262ae +402260fc: 0302a2 l8ui a10, a2, 3 +402260ff: 3efa add.n a3, a14, a15 +40226101: f03330 subx8 a3, a3, a3 +40226104: b03370 addx8 a3, a3, a7 +40226107: 34a0a0 extui a10, a10, 0, 4 +4022610a: 0543a2 s8i a10, a3, 5 +4022610d: 050232 l8ui a3, a2, 5 +40226110: 040242 l8ui a4, a2, 4 +40226113: 113380 slli a3, a3, 8 +40226116: 203340 or a3, a3, a4 +40226119: 070242 l8ui a4, a2, 7 +4022611c: 060292 l8ui a9, a2, 6 +4022611f: 114480 slli a4, a4, 8 +40226122: 204490 or a4, a4, a9 +40226125: 116480 slli a6, a4, 8 +40226128: 414840 srli a4, a4, 8 +4022612b: 206640 or a6, a6, a4 +4022612e: 020242 l8ui a4, a2, 2 +40226131: f97c movi.n a9, -1 +40226133: 304940 xor a4, a9, a4 +40226136: 049740 extui a9, a4, 7, 1 +40226139: 1b0c movi.n a11, 1 +4022613b: 040c movi.n a4, 0 +4022613d: 934ba0 movnez a4, a11, a10 +40226140: 204490 or a4, a4, a9 +40226143: f47060 extui a7, a6, 0, 16 +40226146: 164456 bnez a4, 402262ae +40226149: 114380 slli a4, a3, 8 +4022614c: 413830 srli a3, a3, 8 +4022614f: 203430 or a3, a4, a3 +40226152: 113300 slli a3, a3, 16 +40226155: 313030 srai a3, a3, 16 +40226158: 0213b7 beq a3, a11, 4022615e +4022615b: 0053c6 j 402262ae +4022615e: cefa add.n a12, a14, a15 +40226160: f0ccc0 subx8 a12, a12, a12 +40226163: b0ccd0 addx8 a12, a12, a13 +40226166: 330c movi.n a3, 3 +40226168: 004c32 s8i a3, a12, 0 +4022616b: 22cb addi.n a2, a2, 12 +4022616d: cccb addi.n a12, a12, 12 +4022616f: 023d mov.n a3, a2 +40226171: 0c9d mov.n a9, a12 +40226173: c0af52 movi a5, -64 +40226176: c0a062 movi a6, 192 +40226179: 000342 l8ui a4, a3, 0 +4022617c: a31b addi.n a10, a3, 1 +4022617e: 103450 and a3, a4, a5 +40226181: 029367 bne a3, a6, 40226187 +40226184: 005406 j 402262d8 +40226187: 0a3d mov.n a3, a10 +40226189: 74bc beqz.n a4, 402261c4 +4022618b: 0009b2 l8ui a11, a9, 0 +4022618e: 0003a2 l8ui a10, a3, 0 +40226191: 231ba7 beq a11, a10, 402261b8 +40226194: 2efa add.n a2, a14, a15 +40226196: f02220 subx8 a2, a2, a2 +40226199: b022d0 addx8 a2, a2, a13 +4022619c: 442262 l32i a6, a2, 0x110 +4022619f: 0f3616 beqz a6, 40226296 +402261a2: 2efa add.n a2, a14, a15 +402261a4: f02220 subx8 a2, a2, a2 +402261a7: b022d0 addx8 a2, a2, a13 +402261aa: 452242 l32i a4, a2, 0x114 +402261ad: 030c movi.n a3, 0 +402261af: 0c2d mov.n a2, a12 +402261b1: 0006c0 callx0 a6 +402261b4: 003786 j 40226296 +402261b7: 440b00 extui a0, a0, 11, 5 +402261ba: 331b addi.n a3, a3, 1 +402261bc: 991b addi.n a9, a9, 1 +402261be: 744040 extui a4, a4, 0, 8 +402261c1: fff106 j 40226189 +402261c4: 000342 l8ui a4, a3, 0 +402261c7: 991b addi.n a9, a9, 1 +402261c9: fac456 bnez a4, 40226179 +402261cc: 004206 j 402262d8 +402261cf: 800000 add a0, a0, a0 +402261d2: 301123 excw +402261d5: 4138 l32i.n a3, a1, 16 +402261d7: 202230 or a2, a2, a3 +402261da: f42020 extui a2, a2, 0, 16 +402261dd: 22ab addi.n a2, a2, 10 +402261df: 670b addi.n a6, a7, -1 +402261e1: 2a2a add.n a2, a10, a2 +402261e3: f47060 extui a7, a6, 0, 16 +402261e6: faa716 beqz a7, 40226194 +402261e9: 7179 s32i.n a7, a1, 28 +402261eb: 8199 s32i.n a9, a1, 32 +402261ed: ffe385 call0 40226028 +402261f0: 02ad mov.n a10, a2 +402261f2: 023d mov.n a3, a2 +402261f4: a40c movi.n a4, 10 +402261f6: 012d mov.n a2, a1 +402261f8: 61a9 s32i.n a10, a1, 24 +402261fa: 6b8601 l32r a0, 40201014 <_irom0_text_start+0x4> +402261fd: 0000c0 callx0 a0 +40226200: 0128 l32i.n a2, a1, 0 +40226202: ff9551 l32r a5, 40226058 +40226205: 041132 l16ui a3, a1, 8 +40226208: 7178 l32i.n a7, a1, 28 +4022620a: 8198 l32i.n a9, a1, 32 +4022620c: 61a8 l32i.n a10, a1, 24 +4022620e: bf9257 bne a2, a5, 402261d1 +40226211: bc9397 bne a3, a9, 402261d1 +40226214: 1148 l32i.n a4, a1, 4 +40226216: 013480 slli a3, a4, 24 +40226219: 752840 extui a2, a4, 24, 8 +4022621c: 202320 or a2, a3, a2 +4022621f: 6bb431 l32r a3, 402010f0 +40226222: 106430 and a6, a4, a3 +40226225: 116680 slli a6, a6, 8 +40226228: 414840 srli a4, a4, 8 +4022622b: 103430 and a3, a4, a3 +4022622e: 202260 or a2, a2, a6 +40226231: 202230 or a2, a2, a3 +40226234: 3efa add.n a3, a14, a15 +40226236: f03330 subx8 a3, a3, a3 +40226239: b033d0 addx8 a3, a3, a13 +4022623c: 2329 s32i.n a2, a3, 8 +4022623e: ff8731 l32r a3, 4022605c +40226241: 09b327 bgeu a3, a2, 4022624e +40226244: 2efa add.n a2, a14, a15 +40226246: f02220 subx8 a2, a2, a2 +40226249: b022d0 addx8 a2, a2, a13 +4022624c: 2239 s32i.n a3, a2, 8 +4022624e: 6efa add.n a6, a14, a15 +40226250: f06660 subx8 a6, a6, a6 +40226253: 1166d0 slli a6, a6, 3 +40226256: 01d692 addmi a9, a6, 0x100 +40226259: 9d9a add.n a9, a13, a9 +4022625b: 99cb addi.n a9, a9, 12 +4022625d: 092d mov.n a2, a9 +4022625f: 440c movi.n a4, 4 +40226261: 3aab addi.n a3, a10, 10 +40226263: 6169 s32i.n a6, a1, 24 +40226265: 8199 s32i.n a9, a1, 32 +40226267: 6b6b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022626a: 0000c0 callx0 a0 +4022626d: 6168 l32i.n a6, a1, 24 +4022626f: 8198 l32i.n a9, a1, 32 +40226271: 6d6a add.n a6, a13, a6 +40226273: 442662 l32i a6, a6, 0x110 +40226276: 069c beqz.n a6, 4022628a +40226278: 2efa add.n a2, a14, a15 +4022627a: f02220 subx8 a2, a2, a2 +4022627d: b022d0 addx8 a2, a2, a13 +40226280: 452242 l32i a4, a2, 0x114 +40226283: 093d mov.n a3, a9 +40226285: 0c2d mov.n a2, a12 +40226287: 0006c0 callx0 a6 +4022628a: 2efa add.n a2, a14, a15 +4022628c: f02220 subx8 a2, a2, a2 +4022628f: b022d0 addx8 a2, a2, a13 +40226292: 2228 l32i.n a2, a2, 8 +40226294: 62dc bnez.n a2, 402262ae +40226296: 5efa add.n a5, a14, a15 +40226298: f05550 subx8 a5, a5, a5 +4022629b: b075d0 addx8 a7, a5, a13 +4022629e: 020c movi.n a2, 0 +402262a0: 10a182 movi a8, 0x110 +402262a3: 004722 s8i a2, a7, 0 +402262a6: 778a add.n a7, a7, a8 +402262a8: 00a022 movi a2, 0 +402262ab: 006722 s32i a2, a7, 0 +402262ae: 042122 l32i a2, a1, 16 +402262b1: 02aec5 call0 40228da0 +402262b4: 052122 l32i a2, a1, 20 +402262b7: ff6431 l32r a3, 40226048 +402262ba: 61a342 movi a4, 0x361 +402262bd: 6c9201 l32r a0, 40201508 +402262c0: 0000c0 callx0 a0 +402262c3: 132102 l32i a0, a1, 76 +402262c6: 1221c2 l32i a12, a1, 72 +402262c9: 1121d2 l32i a13, a1, 68 +402262cc: 1021e2 l32i a14, a1, 64 +402262cf: 0f21f2 l32i a15, a1, 60 +402262d2: 50c112 addi a1, a1, 80 +402262d5: f00d ret.n +402262d7: 717900 excw +402262da: ffd4c5 call0 40226028 +402262dd: 224b addi.n a2, a2, 4 +402262df: 00a492 movi a9, 0x400 +402262e2: 7178 l32i.n a7, a1, 28 +402262e4: ffbf86 j 402261e6 +402262e7: d36400 excw +402262ea: fe .byte 0xfe +402262eb: 3f .byte 0x3f +402262ec: fed7d0 excw +402262ef: 3f .byte 0x3f +402262f0: c0c112 addi a1, a1, -64 +402262f3: 0f6102 s32i a0, a1, 60 +402262f6: 0e61c2 s32i a12, a1, 56 +402262f9: d1d9 s32i.n a13, a1, 52 +402262fb: c1e9 s32i.n a14, a1, 48 +402262fd: b1f9 s32i.n a15, a1, 44 +402262ff: 03cd mov.n a12, a3 +40226301: 04ed mov.n a14, a4 +40226303: 4129 s32i.n a2, a1, 16 +40226305: e93ac5 call0 4020f6b4 +40226308: ff52f1 l32r a15, 40226050 +4022630b: f52020 extui a2, a2, 16, 16 +4022630e: 040c movi.n a4, 0 +40226310: 005f22 s16i a2, a15, 0 +40226313: 10a132 movi a3, 0x110 +40226316: 202440 or a2, a4, a4 +40226319: 02af85 call0 40228e14 +4022631c: 0f5d mov.n a5, a15 +4022631e: 02dd mov.n a13, a2 +40226320: ff7c movi.n a15, -1 +40226322: 0ba216 beqz a2, 402263e0 +40226325: 12f8 l32i.n a15, a2, 4 +40226327: c40c movi.n a4, 12 +40226329: 0f2d mov.n a2, a15 +4022632b: 030c movi.n a3, 0 +4022632d: 5159 s32i.n a5, a1, 20 +4022632f: 6b3801 l32r a0, 40201010 <_irom0_text_start> +40226332: 0000c0 callx0 a0 +40226335: 5158 l32i.n a5, a1, 20 +40226337: cc0b addi.n a12, a12, -1 +40226339: 001542 l16ui a4, a5, 0 +4022633c: 44ea add.n a4, a4, a14 +4022633e: 112480 slli a2, a4, 8 +40226341: 744840 extui a4, a4, 8, 8 +40226344: 202240 or a2, a2, a4 +40226347: f42020 extui a2, a2, 0, 16 +4022634a: 004f22 s8i a2, a15, 0 +4022634d: 412820 srli a2, a2, 8 +40226350: 014f22 s8i a2, a15, 1 +40226353: 120c movi.n a2, 1 +40226355: 024f22 s8i a2, a15, 2 +40226358: 020c movi.n a2, 0 +4022635a: 044f22 s8i a2, a15, 4 +4022635d: 120c movi.n a2, 1 +4022635f: 054f22 s8i a2, a15, 5 +40226362: ffcb addi.n a15, a15, 12 +40226364: cc1b addi.n a12, a12, 1 +40226366: ef1b addi.n a14, a15, 1 +40226368: 020c movi.n a2, 0 +4022636a: 000c32 l8ui a3, a12, 0 +4022636d: d2c342 addi a4, a3, -46 +40226370: 049c beqz.n a4, 40226384 +40226372: e38c beqz.n a3, 40226384 +40226374: 221b addi.n a2, a2, 1 +40226376: 004e32 s8i a3, a14, 0 +40226379: 742020 extui a2, a2, 0, 8 +4022637c: ee1b addi.n a14, a14, 1 +4022637e: cc1b addi.n a12, a12, 1 +40226380: fff986 j 4022636a +40226383: 4f2200 excw +40226386: 0c2200 excw +40226389: 328c00 excw +4022638c: 0efd mov.n a15, a14 +4022638e: fff486 j 40226364 +40226391: 004e22 s8i a2, a14, 0 +40226394: 00a122 movi a2, 0x100 +40226397: 440c movi.n a4, 4 +40226399: 005122 s16i a2, a1, 0 +4022639c: 015122 s16i a2, a1, 2 +4022639f: 013d mov.n a3, a1 +402263a1: 01ce22 addi a2, a14, 1 +402263a4: 6b1c01 l32r a0, 40201014 <_irom0_text_start+0x4> +402263a7: 0000c0 callx0 a0 +402263aa: 1d38 l32i.n a3, a13, 4 +402263ac: ee5b addi.n a14, a14, 5 +402263ae: c03e30 sub a3, a14, a3 +402263b1: f43030 extui a3, a3, 0, 16 +402263b4: 202dd0 or a2, a13, a13 +402263b7: 02be45 call0 40228f9c +402263ba: ffcb21 l32r a2, 402262e8 +402263bd: 4138 l32i.n a3, a1, 16 +402263bf: ffcbc1 l32r a12, 402262ec +402263c2: a0e320 addx4 a14, a3, a2 +402263c5: 0c28 l32i.n a2, a12, 0 +402263c7: 543c movi.n a4, 53 +402263c9: 0e3d mov.n a3, a14 +402263cb: 062405 call0 4022c60c +402263ce: 0c28 l32i.n a2, a12, 0 +402263d0: 553c movi.n a5, 53 +402263d2: 0e4d mov.n a4, a14 +402263d4: 0d3d mov.n a3, a13 +402263d6: 064005 call0 4022c7d8 +402263d9: 02fd mov.n a15, a2 +402263db: 0d2d mov.n a2, a13 +402263dd: 029c05 call0 40228da0 +402263e0: f108 l32i.n a0, a1, 60 +402263e2: 0f2d mov.n a2, a15 +402263e4: e1c8 l32i.n a12, a1, 56 +402263e6: d1d8 l32i.n a13, a1, 52 +402263e8: c1e8 l32i.n a14, a1, 48 +402263ea: b1f8 l32i.n a15, a1, 44 +402263ec: 40c112 addi a1, a1, 64 +402263ef: f00d ret.n +402263f1: 000000 ill +402263f4: f0c112 addi a1, a1, -16 +402263f7: 21c9 s32i.n a12, a1, 8 +402263f9: 11c2e0 slli a12, a2, 2 +402263fc: ff1631 l32r a3, 40226054 +402263ff: 4c2a add.n a4, a12, a2 +40226401: f04440 subx8 a4, a4, a4 +40226404: 11d9 s32i.n a13, a1, 4 +40226406: 01e9 s32i.n a14, a1, 0 +40226408: 3109 s32i.n a0, a1, 12 +4022640a: b04430 addx8 a4, a4, a3 +4022640d: 000442 l8ui a4, a4, 0 +40226410: 02dd mov.n a13, a2 +40226412: 03ed mov.n a14, a3 +40226414: 2c2426 beqi a4, 2, 40226444 +40226417: 023466 bnei a4, 3, 4022641d +4022641a: 003186 j 402264e4 +4022641d: 021426 beqi a4, 1, 40226423 +40226420: 003d06 j 40226518 +40226423: 3c2a add.n a3, a12, a2 +40226425: f03330 subx8 a3, a3, a3 +40226428: b033e0 addx8 a3, a3, a14 +4022642b: 220c movi.n a2, 2 +4022642d: 004322 s8i a2, a3, 0 +40226430: 020c movi.n a2, 0 +40226432: 014322 s8i a2, a3, 1 +40226435: 024342 s8i a4, a3, 2 +40226438: 034322 s8i a2, a3, 3 +4022643b: 0d4d mov.n a4, a13 +4022643d: 33cb addi.n a3, a3, 12 +4022643f: 020c movi.n a2, 0 +40226441: 002606 j 402264dd +40226444: 2c2a add.n a2, a12, a2 +40226446: f02220 subx8 a2, a2, a2 +40226449: b02230 addx8 a2, a2, a3 +4022644c: 020232 l8ui a3, a2, 2 +4022644f: 330b addi.n a3, a3, -1 +40226451: 743030 extui a3, a3, 0, 8 +40226454: 024232 s8i a3, a2, 2 +40226457: 0bd356 bnez a3, 40226518 +4022645a: 2cda add.n a2, a12, a13 +4022645c: f02220 subx8 a2, a2, a2 +4022645f: b022e0 addx8 a2, a2, a14 +40226462: 030232 l8ui a3, a2, 3 +40226465: 331b addi.n a3, a3, 1 +40226467: 743030 extui a3, a3, 0, 8 +4022646a: 034232 s8i a3, a2, 3 +4022646d: 2cda add.n a2, a12, a13 +4022646f: f02220 subx8 a2, a2, a2 +40226472: b022e0 addx8 a2, a2, a14 +40226475: 584366 bnei a3, 4, 402264d1 +40226478: 010222 l8ui a2, a2, 1 +4022647b: d2dc bnez.n a2, 4022649c +4022647d: ff9a21 l32r a2, 402262e8 +40226480: 1228 l32i.n a2, a2, 4 +40226482: 629c beqz.n a2, 4022649c +40226484: ccda add.n a12, a12, a13 +40226486: f0ccc0 subx8 a12, a12, a12 +40226489: b03ce0 addx8 a3, a12, a14 +4022648c: 120c movi.n a2, 1 +4022648e: 014322 s8i a2, a3, 1 +40226491: 024322 s8i a2, a3, 2 +40226494: 020c movi.n a2, 0 +40226496: 034322 s8i a2, a3, 3 +40226499: 001ec6 j 40226518 +4022649c: 2cda add.n a2, a12, a13 +4022649e: f02220 subx8 a2, a2, a2 +402264a1: b022e0 addx8 a2, a2, a14 +402264a4: 442252 l32i a5, a2, 0x110 +402264a7: 159c beqz.n a5, 402264bc +402264a9: 2cda add.n a2, a12, a13 +402264ab: f02220 subx8 a2, a2, a2 +402264ae: b022e0 addx8 a2, a2, a14 +402264b1: 452242 l32i a4, a2, 0x114 +402264b4: 030c movi.n a3, 0 +402264b6: 0cc222 addi a2, a2, 12 +402264b9: 0005c0 callx0 a5 +402264bc: ccda add.n a12, a12, a13 +402264be: f0ccc0 subx8 a12, a12, a12 +402264c1: b03ce0 addx8 a3, a12, a14 +402264c4: 020c movi.n a2, 0 +402264c6: 10a1e2 movi a14, 0x110 +402264c9: 004322 s8i a2, a3, 0 +402264cc: 33ea add.n a3, a3, a14 +402264ce: 000c06 j 40226502 +402264d1: 024232 s8i a3, a2, 2 +402264d4: 0cc232 addi a3, a2, 12 +402264d7: 010222 l8ui a2, a2, 1 +402264da: 204dd0 or a4, a13, a13 +402264dd: ffe105 call0 402262f0 +402264e0: 000d06 j 40226518 +402264e3: 2c2a00 excw +402264e6: f02220 subx8 a2, a2, a2 +402264e9: b02230 addx8 a2, a2, a3 +402264ec: 2238 l32i.n a3, a2, 8 +402264ee: 73dc bnez.n a3, 40226509 +402264f0: ccda add.n a12, a12, a13 +402264f2: f0ccc0 subx8 a12, a12, a12 +402264f5: b03ce0 addx8 a3, a12, a14 +402264f8: 020c movi.n a2, 0 +402264fa: 004322 s8i a2, a3, 0 +402264fd: 10a122 movi a2, 0x110 +40226500: 332a add.n a3, a3, a2 +40226502: 020c movi.n a2, 0 +40226504: 0329 s32i.n a2, a3, 0 +40226506: 000386 j 40226518 +40226509: 2cda add.n a2, a12, a13 +4022650b: f02220 subx8 a2, a2, a2 +4022650e: 330b addi.n a3, a3, -1 +40226510: b022e0 addx8 a2, a2, a14 +40226513: 2239 s32i.n a3, a2, 8 +40226515: fd7316 beqz a3, 402264f0 +40226518: 3108 l32i.n a0, a1, 12 +4022651a: 21c8 l32i.n a12, a1, 8 +4022651c: 11d8 l32i.n a13, a1, 4 +4022651e: 01e8 l32i.n a14, a1, 0 +40226520: 10c112 addi a1, a1, 16 +40226523: f00d ret.n +40226525: 000000 ill + +40226528 : +40226528: 742020 extui a2, a2, 0, 8 +4022652b: 1622f6 bgeui a2, 2, 40226545 +4022652e: ff6f41 l32r a4, 402262ec +40226531: 0448 l32i.n a4, a4, 0 +40226533: e48c beqz.n a4, 40226545 +40226535: c38c beqz.n a3, 40226545 +40226537: 0348 l32i.n a4, a3, 0 +40226539: 848c beqz.n a4, 40226545 +4022653b: ff6b41 l32r a4, 402262e8 +4022653e: 0338 l32i.n a3, a3, 0 +40226540: a02240 addx4 a2, a2, a4 +40226543: 0239 s32i.n a3, a2, 0 +40226545: f00d ret.n +40226547: 43d000 excw +4022654a: de .byte 0xde +4022654b: de .byte 0xde +4022654c: 226060 excw +4022654f: 40 .byte 0x40 + +40226550 : +40226550: e0c112 addi a1, a1, -32 +40226553: fffd21 l32r a2, 40226548 +40226556: 0661c2 s32i a12, a1, 24 +40226559: ff64c1 l32r a12, 402262ec +4022655c: 0129 s32i.n a2, a1, 0 +4022655e: 0c28 l32i.n a2, a12, 0 +40226560: 7109 s32i.n a0, a1, 28 +40226562: e2dc bnez.n a2, 40226584 +40226564: 05fa05 call0 4022c508 +40226567: 0c29 s32i.n a2, a12, 0 +40226569: 729c beqz.n a2, 40226584 +4022656b: f88731 l32r a3, 40224788 +4022656e: 040c movi.n a4, 0 +40226570: 060185 call0 4022c58c +40226573: fff631 l32r a3, 4022654c +40226576: 0c28 l32i.n a2, a12, 0 +40226578: 040c movi.n a4, 0 +4022657a: 0610c5 call0 4022c688 +4022657d: 013d mov.n a3, a1 +4022657f: 020c movi.n a2, 0 +40226581: fffa45 call0 40226528 +40226584: 7108 l32i.n a0, a1, 28 +40226586: 61c8 l32i.n a12, a1, 24 +40226588: 20c112 addi a1, a1, 32 +4022658b: f00d ret.n +4022658d: 000000 ill + +40226590 : +40226590: 742020 extui a2, a2, 0, 8 +40226593: 0922f6 bgeui a2, 2, 402265a0 +40226596: ff5431 l32r a3, 402262e8 +40226599: a02230 addx4 a2, a2, a3 +4022659c: 0000c6 j 402265a3 +4022659f: 7a2100 excw +402265a2: 28f8 l32i.n a15, a8, 8 +402265a4: f00d02 l8ui a0, a13, 240 + ... + +402265a8 : +402265a8: ff5121 l32r a2, 402262ec +402265ab: f0c112 addi a1, a1, -16 +402265ae: 0228 l32i.n a2, a2, 0 +402265b0: 3109 s32i.n a0, a1, 12 +402265b2: 429c beqz.n a2, 402265ca +402265b4: 00a022 movi a2, 0 +402265b7: ffe3c5 call0 402263f4 +402265ba: 01a022 movi a2, 1 +402265bd: ffe345 call0 402263f4 +402265c0: 220c movi.n a2, 2 +402265c2: ffe305 call0 402263f4 +402265c5: 320c movi.n a2, 3 +402265c7: ffe2c5 call0 402263f4 +402265ca: 3108 l32i.n a0, a1, 12 +402265cc: 10c112 addi a1, a1, 16 +402265cf: f00d ret.n +402265d1: 000000 ill +402265d4: d7cc bnez.n a7, 402265e5 +402265d6: fe .byte 0xfe +402265d7: 3f .byte 0x3f + +402265d8 : +402265d8: d0c112 addi a1, a1, -48 +402265db: 91d9 s32i.n a13, a1, 36 +402265dd: 02dd mov.n a13, a2 +402265df: ff4321 l32r a2, 402262ec +402265e2: a1c9 s32i.n a12, a1, 40 +402265e4: 0228 l32i.n a2, a2, 0 +402265e6: 81e9 s32i.n a14, a1, 32 +402265e8: b109 s32i.n a0, a1, 44 +402265ea: 71f9 s32i.n a15, a1, 28 +402265ec: 0159 s32i.n a5, a1, 0 +402265ee: 03cd mov.n a12, a3 +402265f0: 04ed mov.n a14, a4 +402265f2: 32cc bnez.n a2, 402265f9 +402265f4: 427c movi.n a2, -12 +402265f6: 003906 j 402266de +402265f9: ff7316 beqz a3, 402265f4 +402265fc: ff4d16 beqz a13, 402265f4 +402265ff: 000d22 l8ui a2, a13, 0 +40226602: fee216 beqz a2, 402265f4 +40226605: 0d2d mov.n a2, a13 +40226607: 776a01 l32r a0, 402043b0 +4022660a: 0000c0 callx0 a0 +4022660d: ffa032 movi a3, 255 +40226610: e02327 blt a3, a2, 402265f4 +40226613: 0d2d mov.n a2, a13 +40226615: 0237c5 call0 40228994 +40226618: 060226 beqi a2, -1, 40226622 +4022661b: 0c29 s32i.n a2, a12, 0 +4022661d: 020c movi.n a2, 0 +4022661f: 002ec6 j 402266de +40226622: ffec31 l32r a3, 402265d4 +40226625: fe8b81 l32r a8, 40226054 +40226628: 020c movi.n a2, 0 +4022662a: 000342 l8ui a4, a3, 0 +4022662d: 4f0c movi.n a15, 4 +4022662f: 209220 or a9, a2, a2 +40226632: 20c880 or a12, a8, a8 +40226635: 18a1a2 movi a10, 0x118 +40226638: 000832 l8ui a3, a8, 0 +4022663b: 747020 extui a7, a2, 0, 8 +4022663e: f3cc bnez.n a3, 40226651 +40226640: a02220 addx4 a2, a2, a2 +40226643: f02220 subx8 a2, a2, a2 +40226646: b0c2c0 addx8 a12, a2, a12 +40226649: 07fd mov.n a15, a7 +4022664b: 000f86 j 4022668d +4022664e: 000000 ill +40226651: 113366 bnei a3, 3, 40226666 +40226654: 040832 l8ui a3, a8, 4 +40226657: c03430 sub a3, a4, a3 +4022665a: 743030 extui a3, a3, 0, 8 +4022665d: 05b937 bgeu a9, a3, 40226666 +40226660: 20f770 or a15, a7, a7 +40226663: 209330 or a9, a3, a3 +40226666: 221b addi.n a2, a2, 1 +40226668: 88aa add.n a8, a8, a10 +4022666a: ca4266 bnei a2, 4, 40226638 +4022666d: f27c movi.n a2, -1 +4022666f: 6b4f26 beqi a15, 4, 402266de +40226672: 113fe0 slli a3, a15, 2 +40226675: 23fa add.n a2, a3, a15 +40226677: f02220 subx8 a2, a2, a2 +4022667a: b022c0 addx8 a2, a2, a12 +4022667d: 000272 l8ui a7, a2, 0 +40226680: f27c movi.n a2, -1 +40226682: 583766 bnei a7, 3, 402266de +40226685: 23fa add.n a2, a3, a15 +40226687: f02220 subx8 a2, a2, a2 +4022668a: b0c2c0 addx8 a12, a2, a12 +4022668d: 0138 l32i.n a3, a1, 0 +4022668f: 120c movi.n a2, 1 +40226691: 004c22 s8i a2, a12, 0 +40226694: 446ce2 s32i a14, a12, 0x110 +40226697: 456c32 s32i a3, a12, 0x114 +4022669a: 044c42 s8i a4, a12, 4 +4022669d: 0d2d mov.n a2, a13 +4022669f: 774401 l32r a0, 402043b0 +402266a2: 0000c0 callx0 a0 +402266a5: fea032 movi a3, 254 +402266a8: ffa0e2 movi a14, 255 +402266ab: 0a2327 blt a3, a2, 402266b9 +402266ae: 0d2d mov.n a2, a13 +402266b0: 774001 l32r a0, 402043b0 +402266b3: 0000c0 callx0 a0 +402266b6: 20e220 or a14, a2, a2 +402266b9: 0e4d mov.n a4, a14 +402266bb: 0d3d mov.n a3, a13 +402266bd: 2ccb addi.n a2, a12, 12 +402266bf: 6a5501 l32r a0, 40201014 <_irom0_text_start+0x4> +402266c2: 0000c0 callx0 a0 +402266c5: ffc331 l32r a3, 402265d4 +402266c8: 020c movi.n a2, 0 +402266ca: ccea add.n a12, a12, a14 +402266cc: 0c4c22 s8i a2, a12, 12 +402266cf: 000322 l8ui a2, a3, 0 +402266d2: 221b addi.n a2, a2, 1 +402266d4: 004322 s8i a2, a3, 0 +402266d7: 0f2d mov.n a2, a15 +402266d9: ffd185 call0 402263f4 +402266dc: b27c movi.n a2, -5 +402266de: b108 l32i.n a0, a1, 44 +402266e0: a1c8 l32i.n a12, a1, 40 +402266e2: 91d8 l32i.n a13, a1, 36 +402266e4: 81e8 l32i.n a14, a1, 32 +402266e6: 71f8 l32i.n a15, a1, 28 +402266e8: 30c112 addi a1, a1, 48 +402266eb: f00d ret.n +402266ed: 000000 ill +402266f0: 74d8 l32i.n a13, a4, 28 +402266f2: 124022 s8i a2, a0, 18 +402266f5: c2f0c1 l32r a12, 402172b8 +402266f8: d90261 l32r a6, 4021cb00 +402266fb: 03cd11 l32r a1, 401e7630 <_lit4_end+0xe1304> +402266fe: 02dd mov.n a13, a2 +40226700: 01e9 s32i.n a14, a1, 0 +40226702: 1d39 s32i.n a3, a13, 4 +40226704: 04ed mov.n a14, a4 +40226706: 030c movi.n a3, 0 +40226708: 0c2d mov.n a2, a12 +4022670a: 036102 s32i a0, a1, 12 +4022670d: 02efc5 call0 4022960c +40226710: 0edc bnez.n a14, 40226724 +40226712: 0c2d mov.n a2, a12 +40226714: 032305 call0 40229948 +40226717: 92ac beqz.n a2, 40226744 +40226719: fff531 l32r a3, 402266f0 +4022671c: 0c2d mov.n a2, a12 +4022671e: 02eec5 call0 4022960c +40226721: 001246 j 4022676e +40226724: 040c movi.n a4, 0 +40226726: 043d mov.n a3, a4 +40226728: 0c2d mov.n a2, a12 +4022672a: 02ef05 call0 4022961c +4022672d: 0c2d mov.n a2, a12 +4022672f: 030c movi.n a3, 0 +40226731: 02ee05 call0 40229614 +40226734: 0c2d mov.n a2, a12 +40226736: 030c movi.n a3, 0 +40226738: 02ee85 call0 40229624 +4022673b: 0c2d mov.n a2, a12 +4022673d: 036a05 call0 40229de0 +40226740: 000606 j 4022675c +40226743: a04200 addx4 a4, a2, a0 +40226746: 043d00 extui a3, a0, 13, 1 +40226749: 0c2d mov.n a2, a12 +4022674b: 02ed05 call0 4022961c +4022674e: 030c movi.n a3, 0 +40226750: 0c2d mov.n a2, a12 +40226752: 02ec05 call0 40229614 +40226755: 030c movi.n a3, 0 +40226757: 0c2d mov.n a2, a12 +40226759: 02ec85 call0 40229624 +4022675c: 0d28 l32i.n a2, a13, 0 +4022675e: 630c movi.n a3, 6 +40226760: 1239 s32i.n a3, a2, 4 +40226762: 0d4d mov.n a4, a13 +40226764: 730c movi.n a3, 7 +40226766: a21c movi.n a2, 26 +40226768: 77b001 l32r a0, 40204628 +4022676b: 0000c0 callx0 a0 +4022676e: 3108 l32i.n a0, a1, 12 +40226770: 21c8 l32i.n a12, a1, 8 +40226772: 11d8 l32i.n a13, a1, 4 +40226774: 01e8 l32i.n a14, a1, 0 +40226776: 10c112 addi a1, a1, 16 +40226779: f00d ret.n +4022677b: d92000 excw +4022677e: fe .byte 0xfe +4022677f: 3f .byte 0x3f +40226780: f0c112 addi a1, a1, -16 +40226783: 0261c2 s32i a12, a1, 8 +40226786: 036102 s32i a0, a1, 12 +40226789: 03cd mov.n a12, a3 +4022678b: 12dc bnez.n a2, 402267a0 +4022678d: 0c2d mov.n a2, a12 +4022678f: 030c movi.n a3, 0 +40226791: 035a85 call0 40229d3c +40226794: 040c movi.n a4, 0 +40226796: 043d mov.n a3, a4 +40226798: 0c2d mov.n a2, a12 +4022679a: 02e805 call0 4022961c +4022679d: 001106 j 402267e5 +402267a0: 1239 s32i.n a3, a2, 4 +402267a2: 4338 l32i.n a3, a3, 16 +402267a4: 364366 bnei a3, 4, 402267de +402267a7: b248 l32i.n a4, a2, 44 +402267a9: a238 l32i.n a3, a2, 40 +402267ab: 441b addi.n a4, a4, 1 +402267ad: b249 s32i.n a4, a2, 44 +402267af: 938c beqz.n a3, 402267bc +402267b1: 303437 bltu a4, a3, 402267e5 +402267b4: 040c movi.n a4, 0 +402267b6: b249 s32i.n a4, a2, 44 +402267b8: 000906 j 402267e0 +402267bb: f03100 subx8 a3, a1, a0 +402267be: ff .byte 0xff +402267bf: 0338 l32i.n a3, a3, 0 +402267c1: 03ac beqz.n a3, 402267e5 +402267c3: 0368 l32i.n a6, a3, 0 +402267c5: 152252 l32i a5, a2, 84 +402267c8: 0c9657 bne a6, a5, 402267d8 +402267cb: a338 l32i.n a3, a3, 40 +402267cd: fe0356 bnez a3, 402267b1 +402267d0: 030c movi.n a3, 0 +402267d2: b239 s32i.n a3, a2, 44 +402267d4: 000346 j 402267e5 +402267d7: 233200 excw +402267da: f88617 bany a6, a1, 402267d6 +402267dd: ff .byte 0xff +402267de: 040c movi.n a4, 0 +402267e0: 0c3d mov.n a3, a12 +402267e2: fff105 call0 402266f4 +402267e5: 3108 l32i.n a0, a1, 12 +402267e7: 020c movi.n a2, 0 +402267e9: 21c8 l32i.n a12, a1, 8 +402267eb: 10c112 addi a1, a1, 16 +402267ee: f00d ret.n +402267f0: 75c8 l32i.n a12, a5, 28 +402267f2: 124022 s8i a2, a0, 18 +402267f5: c2f0c1 l32r a12, 402173b8 +402267f8: d90261 l32r a6, 4021cc00 +402267fb: 03cd11 l32r a1, 401e7730 <_lit4_end+0xe1404> +402267fe: 02dd mov.n a13, a2 +40226800: 01e9 s32i.n a14, a1, 0 +40226802: 1d39 s32i.n a3, a13, 4 +40226804: 04ed mov.n a14, a4 +40226806: 030c movi.n a3, 0 +40226808: 0c2d mov.n a2, a12 +4022680a: 036102 s32i a0, a1, 12 +4022680d: 02dfc5 call0 4022960c +40226810: 0edc bnez.n a14, 40226824 +40226812: 0c2d mov.n a2, a12 +40226814: 031305 call0 40229948 +40226817: 12ac beqz.n a2, 4022683c +40226819: fff531 l32r a3, 402267f0 +4022681c: 0c2d mov.n a2, a12 +4022681e: 02dec5 call0 4022960c +40226821: 000e46 j 4022685e +40226824: 202cc0 or a2, a12, a12 +40226827: 030c movi.n a3, 0 +40226829: 02de85 call0 40229614 +4022682c: 0c2d mov.n a2, a12 +4022682e: 030c movi.n a3, 0 +40226830: 02df05 call0 40229624 +40226833: 0c2d mov.n a2, a12 +40226835: 035a85 call0 40229de0 +40226838: 000406 j 4022684c +4022683b: a03200 addx4 a3, a2, a0 +4022683e: 2cc000 excw +40226841: dd0520 excw +40226844: 030c02 l8ui a0, a12, 3 +40226847: 0c2d mov.n a2, a12 +40226849: 02dd85 call0 40229624 +4022684c: 0d28 l32i.n a2, a13, 0 +4022684e: 630c movi.n a3, 6 +40226850: 1239 s32i.n a3, a2, 4 +40226852: 0d4d mov.n a4, a13 +40226854: 730c movi.n a3, 7 +40226856: a21c movi.n a2, 26 +40226858: 777401 l32r a0, 40204628 +4022685b: 0000c0 callx0 a0 +4022685e: 3108 l32i.n a0, a1, 12 +40226860: 21c8 l32i.n a12, a1, 8 +40226862: 11d8 l32i.n a13, a1, 4 +40226864: 01e8 l32i.n a14, a1, 0 +40226866: 10c112 addi a1, a1, 16 +40226869: f00d ret.n +4022686b: 11e400 slli a14, a4, 16 +4022686e: e86000 excw +40226871: 600011 l32r a1, 401fe874 <_lit4_end+0xf8548> +40226874: f0c112 addi a1, a1, -16 +40226877: 3109 s32i.n a0, a1, 12 +40226879: 07b216 beqz a2, 402268f8 +4022687c: 0258 l32i.n a5, a2, 0 +4022687e: 660c movi.n a6, 6 +40226880: 1248 l32i.n a4, a2, 4 +40226882: 1569 s32i.n a6, a5, 4 +40226884: 857c movi.n a5, -8 +40226886: 5e9357 bne a3, a5, 402268e8 +40226889: 4438 l32i.n a3, a4, 16 +4022688b: 3d4326 beqi a3, 4, 402268cc +4022688e: 0a53f6 bgeui a3, 5, 4022689c +40226891: 051316 beqz a3, 402268e6 +40226894: 0d2326 beqi a3, 2, 402268a5 +40226897: 001406 j 402268eb +4022689a: 260000 excw +4022689d: 261853 excw +402268a0: 463d63 excw +402268a3: 310011 l32r a1, 401f2ca4 <_lit4_end+0xec978> +402268a6: 42fff1 l32r a15, 401f74a4 <_lit4_end+0xf1178> +402268a9: c04e04 excw +402268ac: 380020 excw +402268af: 943703 excw +402268b2: 0bc612 addi a1, a6, 11 +402268b5: 000000 ill +402268b8: ffee31 l32r a3, 40226870 +402268bb: 4e0442 l8ui a4, a4, 78 +402268be: 0020c0 memw +402268c1: 0338 l32i.n a3, a3, 0 +402268c3: 191437 beq a4, a3, 402268e0 +402268c6: 837c movi.n a3, -8 +402268c8: 000706 j 402268e8 +402268cb: e93100 excw +402268ce: ff .byte 0xff +402268cf: 4e0442 l8ui a4, a4, 78 +402268d2: 0020c0 memw +402268d5: 0338 l32i.n a3, a3, 0 +402268d7: eb9437 bne a4, a3, 402268c6 +402268da: d37c movi.n a3, -3 +402268dc: 000206 j 402268e8 +402268df: 637c00 excw +402268e2: 000086 j 402268e8 +402268e5: 537c00 excw +402268e8: 264232 s8i a3, a2, 38 +402268eb: 024d mov.n a4, a2 +402268ed: 130c movi.n a3, 1 +402268ef: 1aa022 movi a2, 26 +402268f2: 774d01 l32r a0, 40204628 +402268f5: 0000c0 callx0 a0 +402268f8: 3108 l32i.n a0, a1, 12 +402268fa: 10c112 addi a1, a1, 16 +402268fd: f00d ret.n +402268ff: c11200 mul16u a1, a2, a0 +40226902: 3109f0 srai a0, a15, 25 +40226905: 07b216 beqz a2, 40226984 +40226908: 0258 l32i.n a5, a2, 0 +4022690a: 660c movi.n a6, 6 +4022690c: 1248 l32i.n a4, a2, 4 +4022690e: 1569 s32i.n a6, a5, 4 +40226910: 857c movi.n a5, -8 +40226912: 5e9357 bne a3, a5, 40226974 +40226915: 4438 l32i.n a3, a4, 16 +40226917: 3e4326 beqi a3, 4, 40226959 +4022691a: 0a53f6 bgeui a3, 5, 40226928 +4022691d: 051316 beqz a3, 40226972 +40226920: 103326 beqi a3, 3, 40226934 +40226923: 001406 j 40226977 +40226926: 260000 excw +40226929: 0c1973 excw +4022692c: 134794 excw +4022692f: c63b addi.n a12, a6, 3 +40226931: 000010 excw +40226934: ffce31 l32r a3, 4022686c +40226937: 4e0442 l8ui a4, a4, 78 +4022693a: 0020c0 memw +4022693d: 0338 l32i.n a3, a3, 0 +4022693f: 119437 bne a4, a3, 40226954 +40226942: 000b06 j 40226972 +40226945: ffca31 l32r a3, 40226870 +40226948: 4e0442 l8ui a4, a4, 78 +4022694b: 0020c0 memw +4022694e: 002332 l32i a3, a3, 0 +40226951: 171437 beq a4, a3, 4022696c +40226954: 837c movi.n a3, -8 +40226956: 000686 j 40226974 +40226959: ffc531 l32r a3, 40226870 +4022695c: 4e0442 l8ui a4, a4, 78 +4022695f: 0020c0 memw +40226962: 0338 l32i.n a3, a3, 0 +40226964: ec9437 bne a4, a3, 40226954 +40226967: d37c movi.n a3, -3 +40226969: 0001c6 j 40226974 +4022696c: 637c movi.n a3, -10 +4022696e: 000086 j 40226974 +40226971: 537c00 excw +40226974: 264232 s8i a3, a2, 38 +40226977: 024d mov.n a4, a2 +40226979: 130c movi.n a3, 1 +4022697b: 1aa022 movi a2, 26 +4022697e: 772a01 l32r a0, 40204628 +40226981: 0000c0 callx0 a0 +40226984: 3108 l32i.n a0, a1, 12 +40226986: 10c112 addi a1, a1, 16 +40226989: f00d ret.n +4022698b: 736c00 excw +4022698e: 5c4022 s8i a2, a0, 92 +40226991: 226a add.n a2, a2, a6 +40226993: 886340 excw +40226996: fe .byte 0xfe +40226997: 3f .byte 0x3f +40226998: 2304e0 excw +4022699b: c11240 mul16u a1, a2, a4 +4022699e: 21c9f0 srai a12, a15, 9 +402269a1: 11d9 s32i.n a13, a1, 4 +402269a3: 01e9 s32i.n a14, a1, 0 +402269a5: 3109 s32i.n a0, a1, 12 +402269a7: 02dd mov.n a13, a2 +402269a9: 03cd mov.n a12, a3 +402269ab: 04ed mov.n a14, a4 +402269ad: 090456 bnez a4, 40226a41 +402269b0: 0228 l32i.n a2, a2, 0 +402269b2: 330c movi.n a3, 3 +402269b4: 1239 s32i.n a3, a2, 4 +402269b6: 020c movi.n a2, 0 +402269b8: 264d22 s8i a2, a13, 38 +402269bb: 101c22 l16ui a2, a12, 32 +402269be: 1dc9 s32i.n a12, a13, 4 +402269c0: 4d29 s32i.n a2, a13, 16 +402269c2: 0c28 l32i.n a2, a12, 0 +402269c4: 0d3d mov.n a3, a13 +402269c6: 5d29 s32i.n a2, a13, 20 +402269c8: 111c22 l16ui a2, a12, 34 +402269cb: 2d29 s32i.n a2, a13, 8 +402269cd: 040c22 l8ui a2, a12, 4 +402269d0: 0c4d22 s8i a2, a13, 12 +402269d3: 050c22 l8ui a2, a12, 5 +402269d6: 0d4d22 s8i a2, a13, 13 +402269d9: 060c22 l8ui a2, a12, 6 +402269dc: 0e4d22 s8i a2, a13, 14 +402269df: 070c22 l8ui a2, a12, 7 +402269e2: 0f4d22 s8i a2, a13, 15 +402269e5: 120c movi.n a2, 1 +402269e7: 484d22 s8i a2, a13, 72 +402269ea: 0c2d mov.n a2, a12 +402269ec: 02c145 call0 40229604 +402269ef: ffe731 l32r a3, 4022698c +402269f2: 0c2d mov.n a2, a12 +402269f4: 02c1c5 call0 40229614 +402269f7: ff7e31 l32r a3, 402267f0 +402269fa: 0c2d mov.n a2, a12 +402269fc: 02c0c5 call0 4022960c +402269ff: 240c32 l8ui a3, a12, 36 +40226a02: 024c movi.n a2, 64 +40226a04: 202320 or a2, a3, a2 +40226a07: 244c22 s8i a2, a12, 36 +40226a0a: 0d28 l32i.n a2, a13, 0 +40226a0c: 130c movi.n a3, 1 +40226a0e: 066185 call0 4022d028 +40226a11: 0d28 l32i.n a2, a13, 0 +40226a13: 2238 l32i.n a3, a2, 8 +40226a15: 4338 l32i.n a3, a3, 16 +40226a17: 138c beqz.n a3, 40226a1c +40226a19: 0003c0 callx0 a3 +40226a1c: 132d22 l32i a2, a13, 76 +40226a1f: 0a6247 bbci a2, 4, 40226a2d +40226a22: ffdb31 l32r a3, 40226990 +40226a25: 0c2d mov.n a2, a12 +40226a27: 201110 or a1, a1, a1 +40226a2a: 02be05 call0 4022960c +40226a2d: 132d22 l32i a2, a13, 76 +40226a30: 196237 bbci a2, 3, 40226a4d +40226a33: 080c32 l8ui a3, a12, 8 +40226a36: 820c movi.n a2, 8 +40226a38: 202320 or a2, a3, a2 +40226a3b: 084c22 s8i a2, a12, 8 +40226a3e: 0002c6 j 40226a4d +40226a41: ffd431 l32r a3, 40226994 +40226a44: ffd521 l32r a2, 40226998 +40226a47: 6d8101 l32r a0, 4020204c +40226a4a: 0000c0 callx0 a0 +40226a4d: 3108 l32i.n a0, a1, 12 +40226a4f: 0e2d mov.n a2, a14 +40226a51: 21c8 l32i.n a12, a1, 8 +40226a53: 11d8 l32i.n a13, a1, 4 +40226a55: 01e8 l32i.n a14, a1, 0 +40226a57: 10c112 addi a1, a1, 16 +40226a5a: f00d ret.n +40226a5c: e0c112 addi a1, a1, -32 +40226a5f: 41e9 s32i.n a14, a1, 16 +40226a61: 03ed mov.n a14, a3 +40226a63: 61c9 s32i.n a12, a1, 24 +40226a65: 023d mov.n a3, a2 +40226a67: 02cd mov.n a12, a2 +40226a69: 0e2d mov.n a2, a14 +40226a6b: 51d9 s32i.n a13, a1, 20 +40226a6d: 31f9 s32i.n a15, a1, 12 +40226a6f: 7109 s32i.n a0, a1, 28 +40226a71: 04dd mov.n a13, a4 +40226a73: 05fd mov.n a15, a5 +40226a75: 02b8c5 call0 40229604 +40226a78: 1a2c22 l32i a2, a12, 104 +40226a7b: 528c beqz.n a2, 40226a84 +40226a7d: 0fac beqz.n a15, 40226aa1 +40226a7f: 002346 j 40226b10 +40226a82: 210000 srai a0, a0, 0 +40226a85: af .byte 0xaf +40226a86: c06b addi.n a12, a0, 6 +40226a88: 220020 excw +40226a8b: 450022 l8ui a2, a0, 69 +40226a8e: 06bc beqz.n a6, 40226ac2 +40226a90: 203220 or a3, a2, a2 +40226a93: 1a6c22 s32i a2, a12, 104 +40226a96: ffaf22 movi a2, -1 +40226a99: 075316 beqz a3, 40226b12 +40226a9c: fff746 j 40226a7d +40226a9f: 0c0000 excw +40226aa2: bc2902 l32i a0, a9, 0x2f0 +40226aa5: 4f1d27 beq a13, a2, 40226af8 +40226aa8: 051d42 l16ui a4, a13, 10 +40226aab: 012d32 l32i a3, a13, 4 +40226aae: 1a2c22 l32i a2, a12, 104 +40226ab1: 06e445 call0 4022d8f8 +40226ab4: 020256 bnez a2, 40226ad8 +40226ab7: 1a2c22 l32i a2, a12, 104 +40226aba: 06c785 call0 4022d734 +40226abd: 204220 or a4, a2, a2 +40226ac0: 0c28 l32i.n a2, a12, 0 +40226ac2: 530c movi.n a3, 5 +40226ac4: 1239 s32i.n a3, a2, 4 +40226ac6: 3258 l32i.n a5, a2, 12 +40226ac8: 1ce9 s32i.n a14, a12, 4 +40226aca: a59c beqz.n a5, 40226ae8 +40226acc: f44040 extui a4, a4, 0, 16 +40226acf: 030c movi.n a3, 0 +40226ad1: 0005c0 callx0 a5 +40226ad4: 000406 j 40226ae8 +40226ad7: 0d2d00 excw +40226ada: 022c45 call0 40228da0 +40226add: 0dd8 l32i.n a13, a13, 0 +40226adf: fc5d56 bnez a13, 40226aa8 +40226ae2: fff446 j 40226ab7 +40226ae5: 000000 ill +40226ae8: 4e28 l32i.n a2, a14, 16 +40226aea: 224266 bnei a2, 4, 40226b10 +40226aed: 0c28 l32i.n a2, a12, 0 +40226aef: 330c movi.n a3, 3 +40226af1: 1239 s32i.n a3, a2, 4 +40226af3: 000646 j 40226b10 +40226af6: 220000 excw +40226af9: 152c movi.n a5, 33 +40226afb: 040c movi.n a4, 0 +40226afd: 203ee0 or a3, a14, a14 +40226b00: 728c beqz.n a2, 40226b0b +40226b02: 202cc0 or a2, a12, a12 +40226b05: ffbec5 call0 402266f4 +40226b08: 000106 j 40226b10 +40226b0b: 0c2d mov.n a2, a12 +40226b0d: ffce45 call0 402267f4 +40226b10: 020c movi.n a2, 0 +40226b12: 7108 l32i.n a0, a1, 28 +40226b14: 61c8 l32i.n a12, a1, 24 +40226b16: 51d8 l32i.n a13, a1, 20 +40226b18: 41e8 l32i.n a14, a1, 16 +40226b1a: 31f8 l32i.n a15, a1, 12 +40226b1c: 20c112 addi a1, a1, 32 +40226b1f: f00d ret.n +40226b21: 000000 ill +40226b24: 226900 excw +40226b27: d92440 excw +40226b2a: fe .byte 0xfe +40226b2b: 3f .byte 0x3f +40226b2c: 227390 excw +40226b2f: 678040 excw +40226b32: 124022 s8i a2, a0, 18 +40226b35: e9c0c1 l32r a12, 40221238 +40226b38: 02edc1 l32r a12, 401e76ec <_lit4_end+0xe13c0> +40226b3b: 020c movi.n a2, 0 +40226b3d: d1d9 s32i.n a13, a1, 52 +40226b3f: 0129 s32i.n a2, a1, 0 +40226b41: f109 s32i.n a0, a1, 60 +40226b43: e1c9 s32i.n a12, a1, 56 +40226b45: b1f9 s32i.n a15, a1, 44 +40226b47: 03dd mov.n a13, a3 +40226b49: 427c movi.n a2, -12 +40226b4b: 135e16 beqz a14, 40226c84 +40226b4e: 2e38 l32i.n a3, a14, 8 +40226b50: 130316 beqz a3, 40226c84 +40226b53: 030c movi.n a3, 0 +40226b55: 0d2d mov.n a2, a13 +40226b57: 02aac5 call0 40229604 +40226b5a: fff231 l32r a3, 40226b24 +40226b5d: 0d2d mov.n a2, a13 +40226b5f: 02ac45 call0 40229624 +40226b62: 013d mov.n a3, a1 +40226b64: 040c movi.n a4, 0 +40226b66: 202ee0 or a2, a14, a14 +40226b69: 0655c5 call0 4022d0c8 +40226b6c: 0e2d mov.n a2, a14 +40226b6e: 140ec2 l8ui a12, a14, 20 +40226b71: 0644c5 call0 4022cfc0 +40226b74: 012280 slli a2, a2, 24 +40226b77: 313820 srai a3, a2, 24 +40226b7a: 127c movi.n a2, -15 +40226b7c: 029c37 bne a12, a3, 40226b82 +40226b7f: 004046 j 40226c84 +40226b82: ff84f1 l32r a15, 40226994 +40226b85: 6da542 movi a4, 0x56d +40226b88: 0f3d mov.n a3, a15 +40226b8a: 6ca022 movi a2, 108 +40226b8d: 6d3001 l32r a0, 40202050 +40226b90: 0000c0 callx0 a0 +40226b93: 02cd mov.n a12, a2 +40226b95: 023d mov.n a3, a2 +40226b97: 0d2d mov.n a2, a13 +40226b99: 02a685 call0 40229604 +40226b9c: 5ccc bnez.n a12, 40226ba5 +40226b9e: f27c movi.n a2, -1 +40226ba0: 003806 j 40226c84 +40226ba3: 210000 srai a0, a0, 0 +40226ba6: 3dffe0 excw +40226ba9: c50c movi.n a5, 12 +40226bab: 0c05f3 excw +40226bae: 4c2212 l32i a1, a2, 0x130 +40226bb1: 6ce251 l32r a5, 40201f3c +40226bb4: a54215 excw +40226bb7: 0f3d77 bltu a13, a7, 40226bca +40226bba: c21c movi.n a2, 28 +40226bbc: 6d2501 l32r a0, 40202050 +40226bbf: 0000c0 callx0 a0 +40226bc2: 0c29 s32i.n a2, a12, 0 +40226bc4: 025d mov.n a5, a2 +40226bc6: fd4216 beqz a2, 40226b9e +40226bc9: 7aa542 movi a4, 0x57a +40226bcc: 0f3d mov.n a3, a15 +40226bce: 022c movi.n a2, 32 +40226bd0: 046152 s32i a5, a1, 16 +40226bd3: 6d1f01 l32r a0, 40202050 +40226bd6: 0000c0 callx0 a0 +40226bd9: 4158 l32i.n a5, a1, 16 +40226bdb: 2529 s32i.n a2, a5, 8 +40226bdd: 0c28 l32i.n a2, a12, 0 +40226bdf: 2228 l32i.n a2, a2, 8 +40226be1: fb9216 beqz a2, 40226b9e +40226be4: 111d22 l16ui a2, a13, 34 +40226be7: 1cd9 s32i.n a13, a12, 4 +40226be9: 2c29 s32i.n a2, a12, 8 +40226beb: 040d22 l8ui a2, a13, 4 +40226bee: 440c movi.n a4, 4 +40226bf0: 0c4c22 s8i a2, a12, 12 +40226bf3: 050d22 l8ui a2, a13, 5 +40226bf6: 3ccb addi.n a3, a12, 12 +40226bf8: 0d4c22 s8i a2, a12, 13 +40226bfb: 060d22 l8ui a2, a13, 6 +40226bfe: 0e4c22 s8i a2, a12, 14 +40226c01: 070d22 l8ui a2, a13, 7 +40226c04: 0f4c22 s8i a2, a12, 15 +40226c07: 120c movi.n a2, 1 +40226c09: 484c22 s8i a2, a12, 72 +40226c0c: 2e28 l32i.n a2, a14, 8 +40226c0e: 0cc222 addi a2, a2, 12 +40226c11: 690001 l32r a0, 40201014 <_irom0_text_start+0x4> +40226c14: 0000c0 callx0 a0 +40226c17: 111d32 l16ui a3, a13, 34 +40226c1a: 2e28 l32i.n a2, a14, 8 +40226c1c: 0239 s32i.n a3, a2, 0 +40226c1e: 320c movi.n a2, 3 +40226c20: 1e29 s32i.n a2, a14, 4 +40226c22: 0c28 l32i.n a2, a12, 0 +40226c24: 0e3d mov.n a3, a14 +40226c26: 05e0c5 call0 4022ca34 +40226c29: ffc031 l32r a3, 40226b2c +40226c2c: 202dd0 or a2, a13, a13 +40226c2f: 029e45 call0 40229614 +40226c32: feaf31 l32r a3, 402266f0 +40226c35: 0d2d mov.n a2, a13 +40226c37: 029d45 call0 4022960c +40226c3a: ffbd31 l32r a3, 40226b30 +40226c3d: 440c movi.n a4, 4 +40226c3f: 0d2d mov.n a2, a13 +40226c41: 029d85 call0 4022961c +40226c44: 240d32 l8ui a3, a13, 36 +40226c47: 024c movi.n a2, 64 +40226c49: 202320 or a2, a3, a2 +40226c4c: 244d22 s8i a2, a13, 36 +40226c4f: 0c28 l32i.n a2, a12, 0 +40226c51: 130c movi.n a3, 1 +40226c53: 063d45 call0 4022d028 +40226c56: 0c28 l32i.n a2, a12, 0 +40226c58: 2238 l32i.n a3, a2, 8 +40226c5a: 4338 l32i.n a3, a3, 16 +40226c5c: 138c beqz.n a3, 40226c61 +40226c5e: 0003c0 callx0 a3 +40226c61: 132c22 l32i a2, a12, 76 +40226c64: 076247 bbci a2, 4, 40226c6f +40226c67: ff4a31 l32r a3, 40226990 +40226c6a: 0d2d mov.n a2, a13 +40226c6c: 0299c5 call0 4022960c +40226c6f: 132c32 l32i a3, a12, 76 +40226c72: 020c movi.n a2, 0 +40226c74: 0c6337 bbci a3, 3, 40226c84 +40226c77: 080d32 l8ui a3, a13, 8 +40226c7a: 820c movi.n a2, 8 +40226c7c: 202320 or a2, a3, a2 +40226c7f: 084d22 s8i a2, a13, 8 +40226c82: 020c movi.n a2, 0 +40226c84: f108 l32i.n a0, a1, 60 +40226c86: e1c8 l32i.n a12, a1, 56 +40226c88: d1d8 l32i.n a13, a1, 52 +40226c8a: c1e8 l32i.n a14, a1, 48 +40226c8c: b1f8 l32i.n a15, a1, 44 +40226c8e: 40c112 addi a1, a1, 64 +40226c91: f00d ret.n +40226c93: 05a400 extui a10, a0, 20, 1 +40226c96: 23 .byte 0x23 +40226c97: 40 .byte 0x40 + +40226c98 : +40226c98: d0c112 addi a1, a1, -48 +40226c9b: 91d9 s32i.n a13, a1, 36 +40226c9d: 6b0fd1 l32r a13, 402018dc +40226ca0: b109 s32i.n a0, a1, 44 +40226ca2: a1c9 s32i.n a12, a1, 40 +40226ca4: 0861e2 s32i a14, a1, 32 +40226ca7: 71f9 s32i.n a15, a1, 28 +40226ca9: f45020 extui a5, a2, 0, 16 +40226cac: 1df8 l32i.n a15, a13, 4 +40226cae: 0fc8 l32i.n a12, a15, 0 +40226cb0: 5cac beqz.n a12, 40226cd9 +40226cb2: 101c22 l16ui a2, a12, 32 +40226cb5: 3ce8 l32i.n a14, a12, 12 +40226cb7: 359257 bne a2, a5, 40226cf0 +40226cba: 0c3d mov.n a3, a12 +40226cbc: 0f2d mov.n a2, a15 +40226cbe: 006152 s32i a5, a1, 0 +40226cc1: 02c145 call0 402298d8 +40226cc4: ff3431 l32r a3, 40226994 +40226cc7: 0c2d mov.n a2, a12 +40226cc9: aba042 movi a4, 171 +40226ccc: 6a0f01 l32r a0, 40201508 +40226ccf: 0000c0 callx0 a0 +40226cd2: 0ecd mov.n a12, a14 +40226cd4: 0158 l32i.n a5, a1, 0 +40226cd6: fff586 j 40226cb0 +40226cd9: ffee21 l32r a2, 40226c94 +40226cdc: dd4b addi.n a13, a13, 4 +40226cde: ca9d27 bne a13, a2, 40226cac +40226ce1: b108 l32i.n a0, a1, 44 +40226ce3: a1c8 l32i.n a12, a1, 40 +40226ce5: 91d8 l32i.n a13, a1, 36 +40226ce7: 81e8 l32i.n a14, a1, 32 +40226ce9: 71f8 l32i.n a15, a1, 28 +40226ceb: 30c112 addi a1, a1, 48 +40226cee: f00d ret.n +40226cf0: 0ecd mov.n a12, a14 +40226cf2: ffee86 j 40226cb0 +40226cf5: 000000 ill +40226cf8: 2304c4 excw +40226cfb: 40 .byte 0x40 + +40226cfc : +40226cfc: e0c112 addi a1, a1, -32 +40226cff: 51d9 s32i.n a13, a1, 20 +40226d01: 02dd mov.n a13, a2 +40226d03: 020c movi.n a2, 0 +40226d05: 7109 s32i.n a0, a1, 28 +40226d07: 61c9 s32i.n a12, a1, 24 +40226d09: 41e9 s32i.n a14, a1, 16 +40226d0b: 0129 s32i.n a2, a1, 0 +40226d0d: 059d27 bne a13, a2, 40226d16 +40226d10: f4a022 movi a2, 244 +40226d13: 001886 j 40226d79 +40226d16: 013d mov.n a3, a1 +40226d18: 040c movi.n a4, 0 +40226d1a: 0d2d mov.n a2, a13 +40226d1c: 063a85 call0 4022d0c8 +40226d1f: 140d32 l8ui a3, a13, 20 +40226d22: fba022 movi a2, 251 +40226d25: 050356 bnez a3, 40226d79 +40226d28: fe9521 l32r a2, 4022677c +40226d2b: 02c8 l32i.n a12, a2, 0 +40226d2d: 043c16 beqz a12, 40226d74 +40226d30: 0c38 l32i.n a3, a12, 0 +40226d32: 369d37 bne a13, a3, 40226d6c +40226d35: 203cc0 or a3, a12, a12 +40226d38: 05dcc5 call0 4022cb08 +40226d3b: 152cd2 l32i a13, a12, 84 +40226d3e: ffee21 l32r a2, 40226cf8 +40226d41: 101d42 l16ui a4, a13, 32 +40226d44: 4d38 l32i.n a3, a13, 16 +40226d46: 6cc101 l32r a0, 4020204c +40226d49: 0000c0 callx0 a0 +40226d4c: 101d22 l16ui a2, a13, 32 +40226d4f: fff485 call0 40226c98 +40226d52: 202dd0 or a2, a13, a13 +40226d55: 02bf05 call0 40229948 +40226d58: ff0f31 l32r a3, 40226994 +40226d5b: 02ed mov.n a14, a2 +40226d5d: 01a642 movi a4, 0x601 +40226d60: 0c2d mov.n a2, a12 +40226d62: 69e901 l32r a0, 40201508 +40226d65: 0000c0 callx0 a0 +40226d68: 000206 j 40226d74 +40226d6b: 2cc200 excw +40226d6e: ee8617 bany a6, a1, 40226d60 +40226d71: ff .byte 0xff +40226d72: 560000 excw +40226d75: 8e .byte 0x8e +40226d76: 0cf9 s32i.n a15, a12, 0 +40226d78: 710802 l8ui a0, a8, 113 +40226d7b: 61c8 l32i.n a12, a1, 24 +40226d7d: 51d8 l32i.n a13, a1, 20 +40226d7f: 41e8 l32i.n a14, a1, 16 +40226d81: 20c112 addi a1, a1, 32 +40226d84: f00d ret.n +40226d86: a00000 addx4 a0, a0, a0 +40226d89: 402305 call0 40266fbc <_irom0_text_end+0x36440> +40226d8c: 11fc bnez.n a1, 40226dc1 +40226d8e: 686000 excw +40226d91: 3ffee7 bbsi a14, 30, 40226dd4 + +40226d94 : +40226d94: d0c112 addi a1, a1, -48 +40226d97: 71f9 s32i.n a15, a1, 28 +40226d99: 6ad0f1 l32r a15, 402018dc +40226d9c: b109 s32i.n a0, a1, 44 +40226d9e: a1c9 s32i.n a12, a1, 40 +40226da0: 91d9 s32i.n a13, a1, 36 +40226da2: 81e9 s32i.n a14, a1, 32 +40226da4: 020c movi.n a2, 0 +40226da6: 2f38 l32i.n a3, a15, 8 +40226da8: fff951 l32r a5, 40226d8c +40226dab: 0338 l32i.n a3, a3, 0 +40226dad: 43bc beqz.n a3, 40226de5 +40226daf: 4348 l32i.n a4, a3, 16 +40226db1: 0f9466 bnei a4, 10, 40226dc4 +40226db4: 221b addi.n a2, a2, 1 +40226db6: 0020c0 memw +40226db9: 0568 l32i.n a6, a5, 0 +40226dbb: 742020 extui a2, a2, 0, 8 +40226dbe: 231267 beq a2, a6, 40226de5 +40226dc1: 000146 j 40226dca +40226dc4: fbc462 addi a6, a4, -5 +40226dc7: 0526b6 bltui a6, 2, 40226dd0 +40226dca: f7c442 addi a4, a4, -9 +40226dcd: 00f456 bnez a4, 40226de0 +40226dd0: ffef61 l32r a6, 40226d8c +40226dd3: 221b addi.n a2, a2, 1 +40226dd5: 0020c0 memw +40226dd8: 0648 l32i.n a4, a6, 0 +40226dda: 742020 extui a2, a2, 0, 8 +40226ddd: 041247 beq a2, a4, 40226de5 +40226de0: 3338 l32i.n a3, a3, 12 +40226de2: fff1c6 j 40226dad +40226de5: ffe941 l32r a4, 40226d8c +40226de8: 0020c0 memw +40226deb: 0448 l32i.n a4, a4, 0 +40226ded: 021247 beq a2, a4, 40226df3 +40226df0: 002b06 j 40226ea0 +40226df3: ffe7d1 l32r a13, 40226d90 +40226df6: 6ad521 l32r a2, 4020194c +40226df9: 040c movi.n a4, 0 +40226dfb: 0d58 l32i.n a5, a13, 0 +40226dfd: 02e8 l32i.n a14, a2, 0 +40226dff: 042d mov.n a2, a4 +40226e01: 0e9c beqz.n a14, 40226e15 +40226e03: de38 l32i.n a3, a14, 52 +40226e05: c03530 sub a3, a5, a3 +40226e08: 043347 bltu a3, a4, 40226e10 +40226e0b: 034d mov.n a4, a3 +40226e0d: 202ee0 or a2, a14, a14 +40226e10: 3ee8 l32i.n a14, a14, 12 +40226e12: fffac6 j 40226e01 +40226e15: 428c beqz.n a2, 40226e1d +40226e17: 201110 or a1, a1, a1 +40226e1a: 02fc45 call0 40229de0 +40226e1d: 6ac961 l32r a6, 40201944 +40226e20: 0d48 l32i.n a4, a13, 0 +40226e22: 06c8 l32i.n a12, a6, 0 +40226e24: 030c movi.n a3, 0 +40226e26: 065d mov.n a5, a6 +40226e28: 8c9c beqz.n a12, 40226e44 +40226e2a: 4c28 l32i.n a2, a12, 16 +40226e2c: fbc222 addi a2, a2, -5 +40226e2f: 0b22f6 bgeui a2, 2, 40226e3e +40226e32: dc28 l32i.n a2, a12, 52 +40226e34: c02420 sub a2, a4, a2 +40226e37: 033237 bltu a2, a3, 40226e3e +40226e3a: 023d mov.n a3, a2 +40226e3c: 0ced mov.n a14, a12 +40226e3e: 3cc8 l32i.n a12, a12, 12 +40226e40: fff906 j 40226e28 +40226e43: de1600 excw +40226e46: 255001 l32r a0, 401f0388 <_lit4_end+0xea05c> +40226e49: 3ee020 excw +40226e4c: 115920 slli a5, a9, 14 +40226e4f: 0169 s32i.n a6, a1, 0 +40226e51: 02a845 call0 402298d8 +40226e54: fed031 l32r a3, 40226994 +40226e57: 845c movi.n a4, 88 +40226e59: 0e2d mov.n a2, a14 +40226e5b: 69ab01 l32r a0, 40201508 +40226e5e: 0000c0 callx0 a0 +40226e61: 0168 l32i.n a6, a1, 0 +40226e63: 1158 l32i.n a5, a1, 4 +40226e65: 0628 l32i.n a2, a6, 0 +40226e67: 0d68 l32i.n a6, a13, 0 +40226e69: 040c movi.n a4, 0 +40226e6b: 970c movi.n a7, 9 +40226e6d: 429c beqz.n a2, 40226e85 +40226e6f: 4238 l32i.n a3, a2, 16 +40226e71: 0b9377 bne a3, a7, 40226e80 +40226e74: d238 l32i.n a3, a2, 52 +40226e76: c03630 sub a3, a6, a3 +40226e79: 033347 bltu a3, a4, 40226e80 +40226e7c: 034d mov.n a4, a3 +40226e7e: 02cd mov.n a12, a2 +40226e80: 3228 l32i.n a2, a2, 12 +40226e82: fff9c6 j 40226e6d +40226e85: 9c9c beqz.n a12, 40226ea2 +40226e87: 0c3d mov.n a3, a12 +40226e89: 052d mov.n a2, a5 +40226e8b: 02a4c5 call0 402298d8 +40226e8e: fec131 l32r a3, 40226994 +40226e91: 69a042 movi a4, 105 +40226e94: 0c2d mov.n a2, a12 +40226e96: 699c01 l32r a0, 40201508 +40226e99: 0000c0 callx0 a0 +40226e9c: 000086 j 40226ea2 +40226e9f: 03cc00 excw +40226ea2: 020c movi.n a2, 0 +40226ea4: ffb931 l32r a3, 40226d88 +40226ea7: ff4b addi.n a15, a15, 4 +40226ea9: 0213f7 beq a3, a15, 40226eaf +40226eac: ffbd86 j 40226da6 +40226eaf: b108 l32i.n a0, a1, 44 +40226eb1: a1c8 l32i.n a12, a1, 40 +40226eb3: 91d8 l32i.n a13, a1, 36 +40226eb5: 81e8 l32i.n a14, a1, 32 +40226eb7: 71f8 l32i.n a15, a1, 28 +40226eb9: 30c112 addi a1, a1, 48 +40226ebc: f00d ret.n + ... + +40226ec0 : +40226ec0: 152272 l32i a7, a2, 84 +40226ec3: 081252 l16ui a5, a2, 16 +40226ec6: 5268 l32i.n a6, a2, 20 +40226ec8: 041232 l16ui a3, a2, 8 +40226ecb: 3248 l32i.n a4, a2, 12 +40226ecd: 04f756 bnez a7, 40226f20 +40226ed0: 068c beqz.n a6, 40226ed4 +40226ed2: 25cc bnez.n a5, 40226ed8 +40226ed4: 1228 l32i.n a2, a2, 4 +40226ed6: f00d ret.n +40226ed8: 6a9b21 l32r a2, 40201944 +40226edb: 0228 l32i.n a2, a2, 0 +40226edd: b29c beqz.n a2, 40226efc +40226edf: 111272 l16ui a7, a2, 34 +40226ee2: 0f9737 bne a7, a3, 40226ef5 +40226ee5: 1278 l32i.n a7, a2, 4 +40226ee7: 0a9477 bne a4, a7, 40226ef5 +40226eea: 101272 l16ui a7, a2, 32 +40226eed: 049757 bne a7, a5, 40226ef5 +40226ef0: 0278 l32i.n a7, a2, 0 +40226ef2: 5f1677 beq a6, a7, 40226f55 +40226ef5: 3228 l32i.n a2, a2, 12 +40226ef7: fff886 j 40226edd +40226efa: 210000 srai a0, a0, 0 +40226efd: 286a94 excw +40226f00: 929c02 l16si a0, a12, 0x124 +40226f03: 111272 l16ui a7, a2, 34 +40226f06: 0f9737 bne a7, a3, 40226f19 +40226f09: 1278 l32i.n a7, a2, 4 +40226f0b: 0a9477 bne a4, a7, 40226f19 +40226f0e: 101272 l16ui a7, a2, 32 +40226f11: 049757 bne a7, a5, 40226f19 +40226f14: 0278 l32i.n a7, a2, 0 +40226f16: 3b1677 beq a6, a7, 40226f55 +40226f19: 3228 l32i.n a2, a2, 12 +40226f1b: fff886 j 40226f01 +40226f1e: f00d ret.n +40226f20: fb0416 beqz a4, 40226ed4 +40226f23: fad316 beqz a3, 40226ed4 +40226f26: 6a8721 l32r a2, 40201944 +40226f29: 0228 l32i.n a2, a2, 0 +40226f2b: e28c beqz.n a2, 40226f3d +40226f2d: 111252 l16ui a5, a2, 34 +40226f30: 049537 bne a5, a3, 40226f38 +40226f33: 1258 l32i.n a5, a2, 4 +40226f35: 1c1457 beq a4, a5, 40226f55 +40226f38: 3228 l32i.n a2, a2, 12 +40226f3a: fffb46 j 40226f2b +40226f3d: 6a8321 l32r a2, 4020194c +40226f40: 0228 l32i.n a2, a2, 0 +40226f42: f28c beqz.n a2, 40226f55 +40226f44: 111252 l16ui a5, a2, 34 +40226f47: 059537 bne a5, a3, 40226f50 +40226f4a: 012252 l32i a5, a2, 4 +40226f4d: 041457 beq a4, a5, 40226f55 +40226f50: 3228 l32i.n a2, a2, 12 +40226f52: fffb06 j 40226f42 +40226f55: f00d ret.n + ... + +40226f58 : +40226f58: f0c112 addi a1, a1, -16 +40226f5b: 0261c2 s32i a12, a1, 8 +40226f5e: 036102 s32i a0, a1, 12 +40226f61: 0161d2 s32i a13, a1, 4 +40226f64: 01e9 s32i.n a14, a1, 0 +40226f66: 02cd mov.n a12, a2 +40226f68: 05a216 beqz a2, 40226fc6 +40226f6b: 132222 l32i a2, a2, 76 +40226f6e: 076247 bbci a2, 4, 40226f79 +40226f71: feed21 l32r a2, 40226b28 +40226f74: 0c3d mov.n a3, a12 +40226f76: 05b905 call0 4022cb08 +40226f79: 510c22 l8ui a2, a12, 81 +40226f7c: fe86d1 l32r a13, 40226994 +40226f7f: 2a1266 bnei a2, 1, 40226fad +40226f82: 0c28 l32i.n a2, a12, 0 +40226f84: e28c beqz.n a2, 40226f96 +40226f86: 2228 l32i.n a2, a2, 8 +40226f88: a28c beqz.n a2, 40226f96 +40226f8a: f0a042 movi a4, 240 +40226f8d: 203dd0 or a3, a13, a13 +40226f90: 695e01 l32r a0, 40201508 +40226f93: 0000c0 callx0 a0 +40226f96: 0c28 l32i.n a2, a12, 0 +40226f98: 0e0c movi.n a14, 0 +40226f9a: 22e9 s32i.n a14, a2, 8 +40226f9c: 0c28 l32i.n a2, a12, 0 +40226f9e: f3a042 movi a4, 243 +40226fa1: 203dd0 or a3, a13, a13 +40226fa4: 695901 l32r a0, 40201508 +40226fa7: 0000c0 callx0 a0 +40226faa: 006ce2 s32i a14, a12, 0 +40226fad: 1a2c22 l32i a2, a12, 104 +40226fb0: 005216 beqz a2, 40226fb9 +40226fb3: 68cc22 addi a2, a12, 104 +40226fb6: 0670c5 call0 4022d6c4 +40226fb9: faa042 movi a4, 250 +40226fbc: 0d3d mov.n a3, a13 +40226fbe: 0c2d mov.n a2, a12 +40226fc0: 695201 l32r a0, 40201508 +40226fc3: 0000c0 callx0 a0 +40226fc6: 3108 l32i.n a0, a1, 12 +40226fc8: 21c8 l32i.n a12, a1, 8 +40226fca: 11d8 l32i.n a13, a1, 4 +40226fcc: 01e8 l32i.n a14, a1, 0 +40226fce: 10c112 addi a1, a1, 16 +40226fd1: f00d ret.n +40226fd3: e84c00 excw +40226fd6: fe .byte 0xfe +40226fd7: 3f .byte 0x3f +40226fd8: e838 l32i.n a3, a8, 56 +40226fda: fe .byte 0xfe +40226fdb: 3f .byte 0x3f +40226fdc: fed331 l32r a3, 40226b28 +40226fdf: d0c112 addi a1, a1, -48 +40226fe2: 0348 l32i.n a4, a3, 0 +40226fe4: a1c9 s32i.n a12, a1, 40 +40226fe6: 025d mov.n a5, a2 +40226fe8: 12c8 l32i.n a12, a2, 4 +40226fea: b109 s32i.n a0, a1, 44 +40226fec: 91d9 s32i.n a13, a1, 36 +40226fee: 81e9 s32i.n a14, a1, 32 +40226ff0: 71f9 s32i.n a15, a1, 28 +40226ff2: 032d mov.n a2, a3 +40226ff4: 1c8416 beqz a4, 402271c0 +40226ff7: 0514c7 beq a4, a12, 40227000 +40226ffa: 172442 l32i a4, a4, 92 +40226ffd: fffcc6 j 40226ff4 +40227000: 0538 l32i.n a3, a5, 0 +40227002: 124366 bnei a3, 4, 40227018 +40227005: 0c28 l32i.n a2, a12, 0 +40227007: 1b5216 beqz a2, 402271c0 +4022700a: 2238 l32i.n a3, a2, 8 +4022700c: 7338 l32i.n a3, a3, 28 +4022700e: 1ae316 beqz a3, 402271c0 +40227011: 0003c0 callx0 a3 +40227014: 006a06 j 402271c0 +40227017: 732600 excw +4022701a: 318602 excw +4022701d: 2c3200 excw +40227020: e34713 excw +40227023: 3d09 s32i.n a0, a13, 12 +40227025: 050c movi.n a5, 0 +40227027: ae .byte 0xae +40227028: 01c605 call0 40228c8c +4022702b: 000000 ill +4022702e: 01a022 movi a2, 1 +40227031: 644c22 s8i a2, a12, 100 +40227034: ffd5c5 call0 40226d94 +40227037: 002c32 l32i a3, a12, 0 +4022703a: 152cd2 l32i a13, a12, 84 +4022703d: 04c316 beqz a3, 4022708d +40227040: 010d16 beqz a13, 40227054 +40227043: 2328 l32i.n a2, a3, 8 +40227045: d28c beqz.n a2, 40227056 +40227047: 2d28 l32i.n a2, a13, 8 +40227049: 928c beqz.n a2, 40227056 +4022704b: 0d2d mov.n a2, a13 +4022704d: 059e45 call0 4022ca34 +40227050: 000086 j 40227056 +40227053: 03dd00 excw +40227056: 0c2d mov.n a2, a12 +40227058: ffe645 call0 40226ec0 +4022705b: 02ed mov.n a14, a2 +4022705d: c2ac beqz.n a2, 4022708d +4022705f: 132c22 l32i a2, a12, 76 +40227062: 186207 bbci a2, 0, 4022707e +40227065: 6a3921 l32r a2, 4020194c +40227068: 0f0c movi.n a15, 0 +4022706a: 0258 l32i.n a5, a2, 0 +4022706c: d59c beqz.n a5, 4022708d +4022706e: 101532 l16ui a3, a5, 32 +40227071: 101e22 l16ui a2, a14, 32 +40227074: 029327 bne a3, a2, 4022707a +40227077: 004246 j 40227184 +4022707a: 004f46 j 402271bb +4022707d: a03200 addx4 a3, a2, a0 +40227080: 0e2d00 excw +40227083: 025805 call0 40229604 +40227086: 030c movi.n a3, 0 +40227088: 0e2d mov.n a2, a14 +4022708a: 025985 call0 40229624 +4022708d: 6ce8 l32i.n a14, a12, 24 +4022708f: 18ccf2 addi a15, a12, 24 +40227092: fe9c beqz.n a14, 402270b5 +40227094: 4e68 l32i.n a6, a14, 16 +40227096: 0e3d mov.n a3, a14 +40227098: 202ff0 or a2, a15, a15 +4022709b: 1169 s32i.n a6, a1, 4 +4022709d: 059745 call0 4022ca14 +402270a0: fe3d31 l32r a3, 40226994 +402270a3: 0e2d mov.n a2, a14 +402270a5: 7ea142 movi a4, 0x17e +402270a8: 691801 l32r a0, 40201508 +402270ab: 0000c0 callx0 a0 +402270ae: 1168 l32i.n a6, a1, 4 +402270b0: 06ed mov.n a14, a6 +402270b2: fff706 j 40227092 +402270b5: ffc8e1 l32r a14, 40226fd8 +402270b8: 431c movi.n a3, 20 +402270ba: 0e2d mov.n a2, a14 +402270bc: 7ae001 l32r a0, 40205c3c +402270bf: 0000c0 callx0 a0 +402270c2: 441c movi.n a4, 20 +402270c4: 34cc32 addi a3, a12, 52 +402270c7: 202ee0 or a2, a14, a14 +402270ca: 67d201 l32r a0, 40201014 <_irom0_text_start+0x4> +402270cd: 0000c0 callx0 a0 +402270d0: 2d28 l32i.n a2, a13, 8 +402270d2: 728c beqz.n a2, 402270dd +402270d4: 6238 l32i.n a3, a2, 24 +402270d6: 338c beqz.n a3, 402270dd +402270d8: 0d2d mov.n a2, a13 +402270da: 0003c0 callx0 a3 +402270dd: 0c2d mov.n a2, a12 +402270df: ffe785 call0 40226f58 +402270e2: 003686 j 402271c0 +402270e5: 021326 beqi a3, 1, 402270eb +402270e8: 003506 j 402271c0 +402270eb: 132c32 l32i a3, a12, 76 +402270ee: 0ae347 bbsi a3, 4, 402270fc +402270f1: 0c3d mov.n a3, a12 +402270f3: 05a145 call0 4022cb08 +402270f6: 000206 j 40227102 +402270f9: 000000 ill +402270fc: 01a022 movi a2, 1 +402270ff: 644c22 s8i a2, a12, 100 +40227102: ffc905 call0 40226d94 +40227105: 002c32 l32i a3, a12, 0 +40227108: 152cd2 l32i a13, a12, 84 +4022710b: 260ce2 l8ui a14, a12, 38 +4022710e: 010316 beqz a3, 40227122 +40227111: bd8c beqz.n a13, 40227120 +40227113: 2328 l32i.n a2, a3, 8 +40227115: 928c beqz.n a2, 40227122 +40227117: 0d2d mov.n a2, a13 +40227119: 059185 call0 4022ca34 +4022711c: 000086 j 40227122 +4022711f: 03dd00 excw +40227122: 6cf8 l32i.n a15, a12, 24 +40227124: 18cc62 addi a6, a12, 24 +40227127: 2fac beqz.n a15, 4022714d +40227129: 4f78 l32i.n a7, a15, 16 +4022712b: 062d mov.n a2, a6 +4022712d: 0f3d mov.n a3, a15 +4022712f: 1169 s32i.n a6, a1, 4 +40227131: 0179 s32i.n a7, a1, 0 +40227133: 058e05 call0 4022ca14 +40227136: fe1731 l32r a3, 40226994 +40227139: 0f2d mov.n a2, a15 +4022713b: 20a142 movi a4, 0x120 +4022713e: 68f201 l32r a0, 40201508 +40227141: 0000c0 callx0 a0 +40227144: 0178 l32i.n a7, a1, 0 +40227146: 1168 l32i.n a6, a1, 4 +40227148: 07fd mov.n a15, a7 +4022714a: fff646 j 40227127 +4022714d: ffa1f1 l32r a15, 40226fd4 +40227150: 431c movi.n a3, 20 +40227152: 0f2d mov.n a2, a15 +40227154: 7aba01 l32r a0, 40205c3c +40227157: 0000c0 callx0 a0 +4022715a: 441c movi.n a4, 20 +4022715c: 34cc32 addi a3, a12, 52 +4022715f: 202ff0 or a2, a15, a15 +40227162: 67ac01 l32r a0, 40201014 <_irom0_text_start+0x4> +40227165: 0000c0 callx0 a0 +40227168: f71d16 beqz a13, 402270dd +4022716b: 2d28 l32i.n a2, a13, 8 +4022716d: f6c216 beqz a2, 402270dd +40227170: 5248 l32i.n a4, a2, 20 +40227172: f67416 beqz a4, 402270dd +40227175: 013e80 slli a3, a14, 24 +40227178: 313830 srai a3, a3, 24 +4022717b: 0d2d mov.n a2, a13 +4022717d: 0004c0 callx0 a4 +40227180: ffd646 j 402270dd +40227183: 255000 extui a5, a0, 16, 3 +40227186: 615220 excw +40227189: 6f8500 excw +4022718c: 215202 s16i a0, a2, 66 +4022718f: 352800 extui a2, a0, 24, 4 +40227192: 3f8c beqz.n a15, 40227199 +40227194: 3f29 s32i.n a2, a15, 12 +40227196: 000106 j 4022719e +40227199: 69ec31 l32r a3, 4020194c +4022719c: 0329 s32i.n a2, a3, 0 +4022719e: 3578 l32i.n a7, a5, 12 +402271a0: fdfd31 l32r a3, 40226994 +402271a3: 052d mov.n a2, a5 +402271a5: 6aa142 movi a4, 0x16a +402271a8: 0179 s32i.n a7, a1, 0 +402271aa: 68d701 l32r a0, 40201508 +402271ad: 0000c0 callx0 a0 +402271b0: 0178 l32i.n a7, a1, 0 +402271b2: 0f5d mov.n a5, a15 +402271b4: 05fd mov.n a15, a5 +402271b6: 075d mov.n a5, a7 +402271b8: ffac06 j 4022706c +402271bb: 3578 l32i.n a7, a5, 12 +402271bd: fffcc6 j 402271b4 +402271c0: b108 l32i.n a0, a1, 44 +402271c2: a1c8 l32i.n a12, a1, 40 +402271c4: 91d8 l32i.n a13, a1, 36 +402271c6: 81e8 l32i.n a14, a1, 32 +402271c8: 71f8 l32i.n a15, a1, 28 +402271ca: 30c112 addi a1, a1, 48 +402271cd: f00d ret.n + ... + +402271d0 : +402271d0: d0c112 addi a1, a1, -48 +402271d3: 036d mov.n a6, a3 +402271d5: 030c movi.n a3, 0 +402271d7: 91d9 s32i.n a13, a1, 36 +402271d9: 71f9 s32i.n a15, a1, 28 +402271db: 02dd mov.n a13, a2 +402271dd: f4f040 extui a15, a4, 0, 16 +402271e0: 120c movi.n a2, 1 +402271e2: 034d mov.n a4, a3 +402271e4: 834260 moveqz a4, a2, a6 +402271e7: 9323f0 movnez a2, a3, a15 +402271ea: b109 s32i.n a0, a1, 44 +402271ec: a1c9 s32i.n a12, a1, 40 +402271ee: 81e9 s32i.n a14, a1, 32 +402271f0: 202420 or a2, a4, a2 +402271f3: 021237 beq a2, a3, 402271f9 +402271f6: 002586 j 40227290 +402271f9: 029d37 bne a13, a3, 402271ff +402271fc: 002406 j 40227290 +402271ff: 1de8 l32i.n a14, a13, 4 +40227201: 20cff0 or a12, a15, a15 +40227204: 391e22 l16ui a2, a14, 114 +40227207: 02b2f7 bgeu a2, a15, 4022720d +4022720a: 20c220 or a12, a2, a2 +4022720d: 1e1e22 l16ui a2, a14, 60 +40227210: f4c0c0 extui a12, a12, 0, 16 +40227213: 1122f0 slli a2, a2, 1 +40227216: 02a2c7 bge a2, a12, 4022721c +40227219: f4c020 extui a12, a2, 0, 16 +4022721c: 132d22 l32i a2, a13, 76 +4022721f: 430c movi.n a3, 4 +40227221: 150c movi.n a5, 1 +40227223: 018327 bany a3, a2, 40227228 +40227226: 050c movi.n a5, 0 +40227228: 203660 or a3, a6, a6 +4022722b: 204cc0 or a4, a12, a12 +4022722e: 202ee0 or a2, a14, a14 +40227231: 0169 s32i.n a6, a1, 0 +40227233: 0440c5 call0 4022b640 +40227236: 0168 l32i.n a6, a1, 0 +40227238: 100266 bnei a2, -1, 4022724c +4022723b: 0a3cf6 bgeui a12, 3, 40227249 +4022723e: cc0b addi.n a12, a12, -1 +40227240: f4c0c0 extui a12, a12, 0, 16 +40227243: 000146 j 4022724c +40227246: 000000 ill +40227249: 41c1c0 srli a12, a12, 1 +4022724c: 020266 bnei a2, -1, 40227252 +4022724f: fc9c56 bnez a12, 4022721c +40227252: 03c256 bnez a2, 40227292 +40227255: 072d22 l32i a2, a13, 28 +40227258: 8066c0 add a6, a6, a12 +4022725b: c0cfc0 sub a12, a15, a12 +4022725e: 0452c2 s16i a12, a2, 8 +40227261: 1269 s32i.n a6, a2, 4 +40227263: 0e2d mov.n a2, a14 +40227265: 04b845 call0 4022bdec +40227268: 132d32 l32i a3, a13, 76 +4022726b: 02cd mov.n a12, a2 +4022726d: 216327 bbci a3, 2, 40227292 +40227270: 7d28 l32i.n a2, a13, 28 +40227272: 041232 l16ui a3, a2, 8 +40227275: 0c2d mov.n a2, a12 +40227277: 73dc bnez.n a3, 40227292 +40227279: 120c movi.n a2, 1 +4022727b: 484d22 s8i a2, a13, 72 +4022727e: 0d4d mov.n a4, a13 +40227280: 430c movi.n a3, 4 +40227282: a21c movi.n a2, 26 +40227284: 74e901 l32r a0, 40204628 +40227287: 0000c0 callx0 a0 +4022728a: 0c2d mov.n a2, a12 +4022728c: 000086 j 40227292 +4022728f: 427c00 excw +40227292: b108 l32i.n a0, a1, 44 +40227294: a1c8 l32i.n a12, a1, 40 +40227296: 91d8 l32i.n a13, a1, 36 +40227298: 81e8 l32i.n a14, a1, 32 +4022729a: 71f8 l32i.n a15, a1, 28 +4022729c: 30c112 addi a1, a1, 48 +4022729f: f00d ret.n +402272a1: 000000 ill + +402272a4 : +402272a4: f0c112 addi a1, a1, -16 +402272a7: 11d9 s32i.n a13, a1, 4 +402272a9: 12d8 l32i.n a13, a2, 4 +402272ab: 21c9 s32i.n a12, a1, 8 +402272ad: 3109 s32i.n a0, a1, 12 +402272af: 02cd mov.n a12, a2 +402272b1: 240d22 l8ui a2, a13, 36 +402272b4: 186267 bbci a2, 6, 402272d0 +402272b7: 3a1d32 l16ui a3, a13, 116 +402272ba: f27c movi.n a2, -1 +402272bc: 2883f6 bgeui a3, 8, 402272e8 +402272bf: 000346 j 402272d0 +402272c2: 7c28 l32i.n a2, a12, 28 +402272c4: e29c beqz.n a2, 402272e6 +402272c6: 041242 l16ui a4, a2, 8 +402272c9: c4cc bnez.n a4, 402272d9 +402272cb: 4228 l32i.n a2, a2, 16 +402272cd: 076c22 s32i a2, a12, 28 +402272d0: 391d22 l16ui a2, a13, 114 +402272d3: feb256 bnez a2, 402272c2 +402272d6: 000386 j 402272e8 +402272d9: 1238 l32i.n a3, a2, 4 +402272db: 0c2d mov.n a2, a12 +402272dd: ffef05 call0 402271d0 +402272e0: 42cc bnez.n a2, 402272e8 +402272e2: fffa86 j 402272d0 +402272e5: 020c00 excw +402272e8: 3108 l32i.n a0, a1, 12 +402272ea: 21c8 l32i.n a12, a1, 8 +402272ec: 11d8 l32i.n a13, a1, 4 +402272ee: 10c112 addi a1, a1, 16 +402272f1: f00d ret.n +402272f3: c11200 mul16u a1, a2, a0 +402272f6: 51d9e0 excw +402272f9: 02dd mov.n a13, a2 +402272fb: 41e9 s32i.n a14, a1, 16 +402272fd: 31f9 s32i.n a15, a1, 12 +402272ff: 7109 s32i.n a0, a1, 28 +40227301: 61c9 s32i.n a12, a1, 24 +40227303: 0f0c movi.n a15, 0 +40227305: fff9c5 call0 402272a4 +40227308: 18cde2 addi a14, a13, 24 +4022730b: 6dc8 l32i.n a12, a13, 24 +4022730d: 049c16 beqz a12, 4022735a +40227310: 061c22 l16ui a2, a12, 12 +40227313: ff2a add.n a15, a15, a2 +40227315: f4f0f0 extui a15, a15, 0, 16 +40227318: 051c22 l16ui a2, a12, 10 +4022731b: 065cf2 s16i a15, a12, 12 +4022731e: 383f27 bltu a15, a2, 4022735a +40227321: 0c3d mov.n a3, a12 +40227323: 0e2d mov.n a2, a14 +40227325: 056ec5 call0 4022ca14 +40227328: 051c22 l16ui a2, a12, 10 +4022732b: 061cf2 l16ui a15, a12, 12 +4022732e: fd9931 l32r a3, 40226994 +40227331: c0ff20 sub a15, a15, a2 +40227334: 1a5d22 s16i a2, a13, 52 +40227337: 5fa342 movi a4, 0x35f +4022733a: 0c2d mov.n a2, a12 +4022733c: 687301 l32r a0, 40201508 +4022733f: 0000c0 callx0 a0 +40227342: 0d28 l32i.n a2, a13, 0 +40227344: 330c movi.n a3, 3 +40227346: 1239 s32i.n a3, a2, 4 +40227348: 042232 l32i a3, a2, 16 +4022734b: f4f0f0 extui a15, a15, 0, 16 +4022734e: 002316 beqz a3, 40227354 +40227351: 0003c0 callx0 a3 +40227354: 1a5df2 s16i a15, a13, 52 +40227357: ffec06 j 4022730b +4022735a: 7108 l32i.n a0, a1, 28 +4022735c: 61c8 l32i.n a12, a1, 24 +4022735e: 51d8 l32i.n a13, a1, 20 +40227360: 41e8 l32i.n a14, a1, 16 +40227362: 31f8 l32i.n a15, a1, 12 +40227364: 20c112 addi a1, a1, 32 +40227367: f00d ret.n +40227369: 000000 ill +4022736c: f0c112 addi a1, a1, -16 +4022736f: 6258 l32i.n a5, a2, 24 +40227371: 3109 s32i.n a0, a1, 12 +40227373: 1239 s32i.n a3, a2, 4 +40227375: 061532 l16ui a3, a5, 12 +40227378: f44040 extui a4, a4, 0, 16 +4022737b: 343a add.n a3, a4, a3 +4022737d: 065532 s16i a3, a5, 12 +40227380: 1a5242 s16i a4, a2, 52 +40227383: fff705 call0 402272f4 +40227386: 3108 l32i.n a0, a1, 12 +40227388: 020c movi.n a2, 0 +4022738a: 10c112 addi a1, a1, 16 +4022738d: f00d ret.n +4022738f: c11200 mul16u a1, a2, a0 +40227392: 6258f0 excw +40227395: 3109 s32i.n a0, a1, 12 +40227397: 21c9 s32i.n a12, a1, 8 +40227399: 1239 s32i.n a3, a2, 4 +4022739b: 061532 l16ui a3, a5, 12 +4022739e: f44040 extui a4, a4, 0, 16 +402273a1: 0c0c movi.n a12, 0 +402273a3: b2c9 s32i.n a12, a2, 44 +402273a5: 343a add.n a3, a4, a3 +402273a7: 065532 s16i a3, a5, 12 +402273aa: 1a5242 s16i a4, a2, 52 +402273ad: fff445 call0 402272f4 +402273b0: 3108 l32i.n a0, a1, 12 +402273b2: 0c2d mov.n a2, a12 +402273b4: 21c8 l32i.n a12, a1, 8 +402273b6: 10c112 addi a1, a1, 16 +402273b9: f00d ret.n + ... + +402273bc : +402273bc: f0c112 addi a1, a1, -16 +402273bf: 3109 s32i.n a0, a1, 12 +402273c1: 744030 extui a4, a3, 0, 8 +402273c4: 129c beqz.n a2, 402273d9 +402273c6: 152232 l32i a3, a2, 84 +402273c9: 738c beqz.n a3, 402273d4 +402273cb: 1238 l32i.n a3, a2, 4 +402273cd: ff3245 call0 402266f4 +402273d0: 000146 j 402273d9 +402273d3: 123800 excw +402273d6: ff41c5 call0 402267f4 +402273d9: 3108 l32i.n a0, a1, 12 +402273db: 10c112 addi a1, a1, 16 +402273de: f00d ret.n +402273e0: 0528 l32i.n a2, a5, 0 +402273e2: 23 .byte 0x23 +402273e3: 40 .byte 0x40 + +402273e4 : +402273e4: e0c112 addi a1, a1, -32 +402273e7: 030c movi.n a3, 0 +402273e9: 0139 s32i.n a3, a1, 0 +402273eb: 7109 s32i.n a0, a1, 28 +402273ed: f4a032 movi a3, 244 +402273f0: c2ac beqz.n a2, 40227420 +402273f2: 203110 or a3, a1, a1 +402273f5: 057545 call0 4022cb4c +402273f8: 0e1226 beqi a2, 1, 4022740a +402273fb: fff921 l32r a2, 402273e0 +402273fe: 6b1301 l32r a0, 4020204c +40227401: 0000c0 callx0 a0 +40227404: f4a032 movi a3, 244 +40227407: 000546 j 40227420 +4022740a: 0128 l32i.n a2, a1, 0 +4022740c: 030c movi.n a3, 0 +4022740e: 600242 l8ui a4, a2, 96 +40227411: 0b9437 bne a4, a3, 40227420 +40227414: 130c movi.n a3, 1 +40227416: 604232 s8i a3, a2, 96 +40227419: 030c movi.n a3, 0 +4022741b: 315232 s16i a3, a2, 98 +4022741e: 030c movi.n a3, 0 +40227420: 7108 l32i.n a0, a1, 28 +40227422: 032d mov.n a2, a3 +40227424: 20c112 addi a1, a1, 32 +40227427: f00d ret.n +40227429: 000000 ill +4022742c: 04fc bnez.n a4, 40227460 +4022742e: 23 .byte 0x23 +4022742f: 40 .byte 0x40 + +40227430 : +40227430: e0c112 addi a1, a1, -32 +40227433: 0661c2 s32i a12, a1, 24 +40227436: 20c220 or a12, a2, a2 +40227439: 00a022 movi a2, 0 +4022743c: 0129 s32i.n a2, a1, 0 +4022743e: 7109 s32i.n a0, a1, 28 +40227440: f4a022 movi a2, 244 +40227443: 03fc16 beqz a12, 40227486 +40227446: 013d mov.n a3, a1 +40227448: 0c2d mov.n a2, a12 +4022744a: 057005 call0 4022cb4c +4022744d: 0f1226 beqi a2, 1, 40227460 +40227450: fff721 l32r a2, 4022742c +40227453: 6afe01 l32r a0, 4020204c +40227456: 0000c0 callx0 a0 +40227459: f4a022 movi a2, 244 +4022745c: 000986 j 40227486 +4022745f: 214200 srai a4, a0, 2 +40227462: a02200 addx4 a2, a2, a0 +40227465: 043200 extui a3, a0, 2, 1 +40227468: 136660 excw +4022746b: 2219 s32i.n a1, a2, 8 +4022746d: 002c movi.n a0, 32 +4022746f: 07b266 bnei a2, 16, 4022747a +40227472: 311432 l16ui a3, a4, 98 +40227475: 1428 l32i.n a2, a4, 4 +40227477: 023605 call0 402297d8 +4022747a: 0128 l32i.n a2, a1, 0 +4022747c: 030c movi.n a3, 0 +4022747e: 315232 s16i a3, a2, 98 +40227481: 604232 s8i a3, a2, 96 +40227484: 020c movi.n a2, 0 +40227486: 7108 l32i.n a0, a1, 28 +40227488: 61c8 l32i.n a12, a1, 24 +4022748a: 20c112 addi a1, a1, 32 +4022748d: f00d ret.n + ... + +40227490 : +40227490: f0c112 addi a1, a1, -16 +40227493: 21c9 s32i.n a12, a1, 8 +40227495: 3109 s32i.n a0, a1, 12 +40227497: 02cd mov.n a12, a2 +40227499: f4a022 movi a2, 244 +4022749c: dcac beqz.n a12, 402274cd +4022749e: 0c38 l32i.n a3, a12, 0 +402274a0: 93ac beqz.n a3, 402274cd +402274a2: 3338 l32i.n a3, a3, 12 +402274a4: 020c movi.n a2, 0 +402274a6: 239327 bne a3, a2, 402274cd +402274a9: 1a2c22 l32i a2, a12, 104 +402274ac: 928c beqz.n a2, 402274b9 +402274ae: 0c28 l32i.n a2, a12, 0 +402274b0: fff305 call0 402273e4 +402274b3: 742020 extui a2, a2, 0, 8 +402274b6: 0004c6 j 402274cd +402274b9: 692121 l32r a2, 40201940 +402274bc: 0020c0 memw +402274bf: 0228 l32i.n a2, a2, 0 +402274c1: 061905 call0 4022d654 +402274c4: 1a6c22 s32i a2, a12, 104 +402274c7: fe3256 bnez a2, 402274ae +402274ca: ffa022 movi a2, 255 +402274cd: 3108 l32i.n a0, a1, 12 +402274cf: 21c8 l32i.n a12, a1, 8 +402274d1: 10c112 addi a1, a1, 16 +402274d4: f00d ret.n +402274d6: 120000 excw +402274d9: d9d0c1 l32r a12, 4021dc1c +402274dc: 03dd91 l32r a9, 401e8450 <_lit4_end+0xe2124> +402274df: 71f9 s32i.n a15, a1, 28 +402274e1: 023d mov.n a3, a2 +402274e3: 02fd mov.n a15, a2 +402274e5: 0d2d mov.n a2, a13 +402274e7: a1c9 s32i.n a12, a1, 40 +402274e9: b109 s32i.n a0, a1, 44 +402274eb: 81e9 s32i.n a14, a1, 32 +402274ed: 04cd mov.n a12, a4 +402274ef: 0159 s32i.n a5, a1, 0 +402274f1: 021105 call0 40229604 +402274f4: 0f2d mov.n a2, a15 +402274f6: fff985 call0 40227490 +402274f9: bc9c beqz.n a12, 40227518 +402274fb: 600f22 l8ui a2, a15, 96 +402274fe: b2cc bnez.n a2, 4022750d +40227500: 041c32 l16ui a3, a12, 8 +40227503: 0d2d mov.n a2, a13 +40227505: 022d05 call0 402297d8 +40227508: 000306 j 40227518 +4022750b: 320000 excw +4022750e: 1f .byte 0x1f +4022750f: 1c2231 l32r a3, 401ee598 <_lit4_end+0xe826c> +40227512: 232a04 excw +40227515: 315f22 s16i a2, a15, 98 +40227518: 0f28 l32i.n a2, a15, 0 +4022751a: 0ced mov.n a14, a12 +4022751c: 3228 l32i.n a2, a2, 12 +4022751e: 06a216 beqz a2, 4022758c +40227521: 0128 l32i.n a2, a1, 0 +40227523: 07e256 bnez a2, 402275a5 +40227526: 07bc16 beqz a12, 402275a5 +40227529: 041c22 l16ui a2, a12, 8 +4022752c: 050c movi.n a5, 0 +4022752e: fd1931 l32r a3, 40226994 +40227531: bf59 s32i.n a5, a15, 44 +40227533: 98a442 movi a4, 0x498 +40227536: 221b addi.n a2, a2, 1 +40227538: 1159 s32i.n a5, a1, 4 +4022753a: 6ac501 l32r a0, 40202050 +4022753d: 0000c0 callx0 a0 +40227540: 1158 l32i.n a5, a1, 4 +40227542: 041c42 l16ui a4, a12, 8 +40227545: 023d mov.n a3, a2 +40227547: 02ed mov.n a14, a2 +40227549: 0c2d mov.n a2, a12 +4022754b: 01be05 call0 4022912c +4022754e: 024d mov.n a4, a2 +40227550: 0c2d mov.n a2, a12 +40227552: 1149 s32i.n a4, a1, 4 +40227554: 018485 call0 40228da0 +40227557: 1148 l32i.n a4, a1, 4 +40227559: fd0e61 l32r a6, 40226994 +4022755c: c49c beqz.n a4, 4022757c +4022755e: 0f28 l32i.n a2, a15, 0 +40227560: 530c movi.n a3, 5 +40227562: 1239 s32i.n a3, a2, 4 +40227564: 3258 l32i.n a5, a2, 12 +40227566: 1fd9 s32i.n a13, a15, 4 +40227568: 1169 s32i.n a6, a1, 4 +4022756a: 0e3d mov.n a3, a14 +4022756c: 0005c0 callx0 a5 +4022756f: 4d28 l32i.n a2, a13, 16 +40227571: 1168 l32i.n a6, a1, 4 +40227573: 054266 bnei a2, 4, 4022757c +40227576: 0f28 l32i.n a2, a15, 0 +40227578: 330c movi.n a3, 3 +4022757a: 1239 s32i.n a3, a2, 4 +4022757c: a8a442 movi a4, 0x4a8 +4022757f: 063d mov.n a3, a6 +40227581: 0e2d mov.n a2, a14 +40227583: 67e101 l32r a0, 40201508 +40227586: 0000c0 callx0 a0 +40227589: 000606 j 402275a5 +4022758c: 015e16 beqz a14, 402275a5 +4022758f: 051e42 l16ui a4, a14, 10 +40227592: 012e32 l32i a3, a14, 4 +40227595: 1a2f22 l32i a2, a15, 104 +40227598: 0635c5 call0 4022d8f8 +4022759b: 0e2d mov.n a2, a14 +4022759d: 018005 call0 40228da0 +402275a0: 0ee8 l32i.n a14, a14, 0 +402275a2: fff986 j 4022758c +402275a5: 0128 l32i.n a2, a1, 0 +402275a7: 92cc bnez.n a2, 402275b4 +402275a9: 7ccc bnez.n a12, 402275b4 +402275ab: 040c movi.n a4, 0 +402275ad: 0d3d mov.n a3, a13 +402275af: 0f2d mov.n a2, a15 +402275b1: ff1405 call0 402266f4 +402275b4: b108 l32i.n a0, a1, 44 +402275b6: 020c movi.n a2, 0 +402275b8: a1c8 l32i.n a12, a1, 40 +402275ba: 91d8 l32i.n a13, a1, 36 +402275bc: 81e8 l32i.n a14, a1, 32 +402275be: 71f8 l32i.n a15, a1, 28 +402275c0: 30c112 addi a1, a1, 48 +402275c3: f00d ret.n +402275c5: 000000 ill +402275c8: d0c112 addi a1, a1, -48 +402275cb: 91d9 s32i.n a13, a1, 36 +402275cd: 03dd mov.n a13, a3 +402275cf: 71f9 s32i.n a15, a1, 28 +402275d1: 023d mov.n a3, a2 +402275d3: 02fd mov.n a15, a2 +402275d5: 0d2d mov.n a2, a13 +402275d7: a1c9 s32i.n a12, a1, 40 +402275d9: b109 s32i.n a0, a1, 44 +402275db: 81e9 s32i.n a14, a1, 32 +402275dd: 04cd mov.n a12, a4 +402275df: 0159 s32i.n a5, a1, 0 +402275e1: 020205 call0 40229604 +402275e4: 0f2d mov.n a2, a15 +402275e6: ffea85 call0 40227490 +402275e9: bc9c beqz.n a12, 40227608 +402275eb: 600f22 l8ui a2, a15, 96 +402275ee: b2cc bnez.n a2, 402275fd +402275f0: 041c32 l16ui a3, a12, 8 +402275f3: 0d2d mov.n a2, a13 +402275f5: 021e05 call0 402297d8 +402275f8: 000306 j 40227608 +402275fb: 320000 excw +402275fe: 1f .byte 0x1f +402275ff: 1c2231 l32r a3, 401ee688 <_lit4_end+0xe835c> +40227602: 232a04 excw +40227605: 315f22 s16i a2, a15, 98 +40227608: 0f28 l32i.n a2, a15, 0 +4022760a: 0ced mov.n a14, a12 +4022760c: 3228 l32i.n a2, a2, 12 +4022760e: 066216 beqz a2, 40227678 +40227611: 0128 l32i.n a2, a1, 0 +40227613: 07a256 bnez a2, 40227691 +40227616: 077c16 beqz a12, 40227691 +40227619: 041c22 l16ui a2, a12, 8 +4022761c: fcde31 l32r a3, 40226994 +4022761f: 05a342 movi a4, 0x305 +40227622: 221b addi.n a2, a2, 1 +40227624: 6a8b01 l32r a0, 40202050 +40227627: 0000c0 callx0 a0 +4022762a: 041c42 l16ui a4, a12, 8 +4022762d: 023d mov.n a3, a2 +4022762f: 050c movi.n a5, 0 +40227631: 02ed mov.n a14, a2 +40227633: 0c2d mov.n a2, a12 +40227635: 01af45 call0 4022912c +40227638: 024d mov.n a4, a2 +4022763a: 0c2d mov.n a2, a12 +4022763c: 1149 s32i.n a4, a1, 4 +4022763e: 017605 call0 40228da0 +40227641: 1148 l32i.n a4, a1, 4 +40227643: fcd461 l32r a6, 40226994 +40227646: e49c beqz.n a4, 40227668 +40227648: 0f28 l32i.n a2, a15, 0 +4022764a: 530c movi.n a3, 5 +4022764c: 1239 s32i.n a3, a2, 4 +4022764e: 3258 l32i.n a5, a2, 12 +40227650: 1fd9 s32i.n a13, a15, 4 +40227652: 1169 s32i.n a6, a1, 4 +40227654: 0e3d mov.n a3, a14 +40227656: 0005c0 callx0 a5 +40227659: 4d28 l32i.n a2, a13, 16 +4022765b: 1168 l32i.n a6, a1, 4 +4022765d: 074266 bnei a2, 4, 40227668 +40227660: 002f22 l32i a2, a15, 0 +40227663: 330c movi.n a3, 3 +40227665: 016232 s32i a3, a2, 4 +40227668: 15a342 movi a4, 0x315 +4022766b: 063d mov.n a3, a6 +4022766d: 0e2d mov.n a2, a14 +4022766f: 67a601 l32r a0, 40201508 +40227672: 0000c0 callx0 a0 +40227675: 000606 j 40227691 +40227678: 015e16 beqz a14, 40227691 +4022767b: 051e42 l16ui a4, a14, 10 +4022767e: 012e32 l32i a3, a14, 4 +40227681: 1a2f22 l32i a2, a15, 104 +40227684: 062705 call0 4022d8f8 +40227687: 0e2d mov.n a2, a14 +40227689: 017145 call0 40228da0 +4022768c: 0ee8 l32i.n a14, a14, 0 +4022768e: fff986 j 40227678 +40227691: 0128 l32i.n a2, a1, 0 +40227693: 92cc bnez.n a2, 402276a0 +40227695: 7ccc bnez.n a12, 402276a0 +40227697: 040c movi.n a4, 0 +40227699: 0d3d mov.n a3, a13 +4022769b: 0f2d mov.n a2, a15 +4022769d: ff1545 call0 402267f4 +402276a0: b108 l32i.n a0, a1, 44 +402276a2: 020c movi.n a2, 0 +402276a4: a1c8 l32i.n a12, a1, 40 +402276a6: 91d8 l32i.n a13, a1, 36 +402276a8: 81e8 l32i.n a14, a1, 32 +402276aa: 71f8 l32i.n a15, a1, 28 +402276ac: 30c112 addi a1, a1, 48 +402276af: f00d ret.n +402276b1: 000000 ill + +402276b4 : +402276b4: f0c112 addi a1, a1, -16 +402276b7: 3109 s32i.n a0, a1, 12 +402276b9: f4a032 movi a3, 244 +402276bc: 029c beqz.n a2, 402276d0 +402276be: 0228 l32i.n a2, a2, 0 +402276c0: c28c beqz.n a2, 402276d0 +402276c2: 3248 l32i.n a4, a2, 12 +402276c4: 00a032 movi a3, 0 +402276c7: 051437 beq a4, a3, 402276d0 +402276ca: ffd645 call0 40227430 +402276cd: 743020 extui a3, a2, 0, 8 +402276d0: 3108 l32i.n a0, a1, 12 +402276d2: 032d mov.n a2, a3 +402276d4: 10c112 addi a1, a1, 16 +402276d7: f00d ret.n +402276d9: 000000 ill +402276dc: 226874 excw +402276df: 699c40 excw +402276e2: 22 .byte 0x22 +402276e3: 40 .byte 0x40 + +402276e4 : +402276e4: d0c112 addi a1, a1, -48 +402276e7: 91d9 s32i.n a13, a1, 36 +402276e9: fcaad1 l32r a13, 40226994 +402276ec: 81e9 s32i.n a14, a1, 32 +402276ee: 0fa442 movi a4, 0x40f +402276f1: 02ed mov.n a14, a2 +402276f3: 0d3d mov.n a3, a13 +402276f5: 6ca022 movi a2, 108 +402276f8: a1c9 s32i.n a12, a1, 40 +402276fa: 71f9 s32i.n a15, a1, 28 +402276fc: b109 s32i.n a0, a1, 44 +402276fe: 6a5401 l32r a0, 40202050 +40227701: 0000c0 callx0 a0 +40227704: 02cd mov.n a12, a2 +40227706: ffa0f2 movi a15, 255 +40227709: 087216 beqz a2, 40227794 +4022770c: 2e28 l32i.n a2, a14, 8 +4022770e: 3228 l32i.n a2, a2, 12 +40227710: 0129 s32i.n a2, a1, 0 +40227712: 0288c5 call0 40229fa0 +40227715: 02dd mov.n a13, a2 +40227717: 1fa442 movi a4, 0x41f +4022771a: 06b216 beqz a2, 40227789 +4022771d: fd0221 l32r a2, 40226b28 +40227720: 0c3d mov.n a3, a12 +40227722: 053c45 call0 4022cae8 +40227725: 0c3d mov.n a3, a12 +40227727: 202dd0 or a2, a13, a13 +4022772a: 01ed85 call0 40229604 +4022772d: ffeb31 l32r a3, 402276dc +40227730: 0d2d mov.n a2, a13 +40227732: 01ef05 call0 40229624 +40227735: 020c movi.n a2, 0 +40227737: 156c22 s32i a2, a12, 84 +4022773a: 0ce9 s32i.n a14, a12, 0 +4022773c: 120c movi.n a2, 1 +4022773e: 1e29 s32i.n a2, a14, 4 +40227740: 1cd9 s32i.n a13, a12, 4 +40227742: 2e28 l32i.n a2, a14, 8 +40227744: f41131 l32r a3, 40224788 +40227747: 021242 l16ui a4, a2, 4 +4022774a: 0d2d mov.n a2, a13 +4022774c: 01edc5 call0 4022962c +4022774f: 220c movi.n a2, 2 +40227751: 514c22 s8i a2, a12, 81 +40227754: 0c28 l32i.n a2, a12, 0 +40227756: ffe251 l32r a5, 402276e0 +40227759: 022222 l32i a2, a2, 8 +4022775c: 013d mov.n a3, a1 +4022775e: 001242 l16ui a4, a2, 0 +40227761: 202dd0 or a2, a13, a13 +40227764: 028805 call0 40229fe8 +40227767: 74f020 extui a15, a2, 0, 8 +4022776a: 013f80 slli a3, a15, 24 +4022776d: 264cf2 s8i a15, a12, 38 +40227770: 313830 srai a3, a3, 24 +40227773: c47c movi.n a4, -4 +40227775: fcec21 l32r a2, 40226b28 +40227778: 189347 bne a3, a4, 40227794 +4022777b: 0c3d mov.n a3, a12 +4022777d: 053885 call0 4022cb08 +40227780: 101d22 l16ui a2, a13, 32 +40227783: ff5145 call0 40226c98 +40227786: 40a442 movi a4, 0x440 +40227789: fc8231 l32r a3, 40226994 +4022778c: 0c2d mov.n a2, a12 +4022778e: 675e01 l32r a0, 40201508 +40227791: 0000c0 callx0 a0 +40227794: b108 l32i.n a0, a1, 44 +40227796: 0f2d mov.n a2, a15 +40227798: a1c8 l32i.n a12, a1, 40 +4022779a: 91d8 l32i.n a13, a1, 36 +4022779c: 81e8 l32i.n a14, a1, 32 +4022779e: 71f8 l32i.n a15, a1, 28 +402277a0: 30c112 addi a1, a1, 48 +402277a3: f00d ret.n +402277a5: 000000 ill +402277a8: 226b34 excw +402277ab: 40 .byte 0x40 + +402277ac : +402277ac: d0c112 addi a1, a1, -48 +402277af: 91d9 s32i.n a13, a1, 36 +402277b1: fc78d1 l32r a13, 40226994 +402277b4: 81e9 s32i.n a14, a1, 32 +402277b6: b8a542 movi a4, 0x5b8 +402277b9: 02ed mov.n a14, a2 +402277bb: 0d3d mov.n a3, a13 +402277bd: 6ca022 movi a2, 108 +402277c0: a1c9 s32i.n a12, a1, 40 +402277c2: b109 s32i.n a0, a1, 44 +402277c4: 71f9 s32i.n a15, a1, 28 +402277c6: 6a2201 l32r a0, 40202050 +402277c9: 0000c0 callx0 a0 +402277cc: 02cd mov.n a12, a2 +402277ce: ffa022 movi a2, 255 +402277d1: 07fc16 beqz a12, 40227854 +402277d4: 027c85 call0 40229fa0 +402277d7: 02fd mov.n a15, a2 +402277d9: c1a542 movi a4, 0x5c1 +402277dc: 067216 beqz a2, 40227847 +402277df: 2e28 l32i.n a2, a14, 8 +402277e1: f3e931 l32r a3, 40224788 +402277e4: 021242 l16ui a4, a2, 4 +402277e7: 0f2d mov.n a2, a15 +402277e9: 01e405 call0 4022962c +402277ec: ffa032 movi a3, 255 +402277ef: 0f2d mov.n a2, a15 +402277f1: 01ebc5 call0 402296b0 +402277f4: 024d mov.n a4, a2 +402277f6: 03b216 beqz a2, 40227835 +402277f9: fbe021 l32r a2, 4022677c +402277fc: 0c3d mov.n a3, a12 +402277fe: 0149 s32i.n a4, a1, 0 +40227800: 052e45 call0 4022cae8 +40227803: fd6221 l32r a2, 40226d8c +40227806: 0148 l32i.n a4, a1, 0 +40227808: 0020c0 memw +4022780b: 0228 l32i.n a2, a2, 0 +4022780d: 156c42 s32i a4, a12, 84 +40227810: 504c22 s8i a2, a12, 80 +40227813: a20c movi.n a2, 10 +40227815: ac29 s32i.n a2, a12, 40 +40227817: 0ce9 s32i.n a14, a12, 0 +40227819: 220c movi.n a2, 2 +4022781b: 1e29 s32i.n a2, a14, 4 +4022781d: 0e3d mov.n a3, a14 +4022781f: 042d mov.n a2, a4 +40227821: 0149 s32i.n a4, a1, 0 +40227823: 01de05 call0 40229604 +40227826: 0148 l32i.n a4, a1, 0 +40227828: ffe031 l32r a3, 402277a8 +4022782b: 042d mov.n a2, a4 +4022782d: 01dd85 call0 40229608 +40227830: 020c movi.n a2, 0 +40227832: 000786 j 40227854 +40227835: daa542 movi a4, 0x5da +40227838: 203dd0 or a3, a13, a13 +4022783b: 202ff0 or a2, a15, a15 +4022783e: 673201 l32r a0, 40201508 +40227841: 0000c0 callx0 a0 +40227844: dba542 movi a4, 0x5db +40227847: 0c2d mov.n a2, a12 +40227849: 0d3d mov.n a3, a13 +4022784b: 672f01 l32r a0, 40201508 +4022784e: 0000c0 callx0 a0 +40227851: ffa022 movi a2, 255 +40227854: b108 l32i.n a0, a1, 44 +40227856: a1c8 l32i.n a12, a1, 40 +40227858: 91d8 l32i.n a13, a1, 36 +4022785a: 81e8 l32i.n a14, a1, 32 +4022785c: 71f8 l32i.n a15, a1, 28 +4022785e: 30c112 addi a1, a1, 48 +40227861: f00d ret.n +40227863: e6d400 excw +40227866: fe .byte 0xfe +40227867: 3f .byte 0x3f +40227868: 6fdc bnez.n a15, 40227882 +4022786a: 22 .byte 0x22 +4022786b: 40 .byte 0x40 + +4022786c : +4022786c: fffe41 l32r a4, 40227864 +4022786f: fffe21 l32r a2, 40227868 +40227872: f0c112 addi a1, a1, -16 +40227875: f50c movi.n a5, 15 +40227877: a31c movi.n a3, 26 +40227879: 3109 s32i.n a0, a1, 12 +4022787b: b22601 l32r a0, 40214114 +4022787e: 0000c0 callx0 a0 +40227881: 3108 l32i.n a0, a1, 12 +40227883: 10c112 addi a1, a1, 16 +40227886: f00d ret.n +40227888: d7d8 l32i.n a13, a7, 52 +4022788a: fe .byte 0xfe +4022788b: 3f .byte 0x3f +4022788c: fe8863 excw +4022788f: 3f .byte 0x3f +40227890: d0c112 addi a1, a1, -48 +40227893: 81e9 s32i.n a14, a1, 32 +40227895: 71f9 s32i.n a15, a1, 28 +40227897: fffce1 l32r a14, 40227888 +4022789a: 11f2f0 slli a15, a2, 1 +4022789d: a1c9 s32i.n a12, a1, 40 +4022789f: 02cd mov.n a12, a2 +402278a1: 2f2a add.n a2, a15, a2 +402278a3: b022e0 addx8 a2, a2, a14 +402278a6: 91d9 s32i.n a13, a1, 36 +402278a8: 02d8 l32i.n a13, a2, 0 +402278aa: b109 s32i.n a0, a1, 44 +402278ac: 6dac beqz.n a13, 402278d6 +402278ae: 0d58 l32i.n a5, a13, 0 +402278b0: 1d28 l32i.n a2, a13, 4 +402278b2: 006152 s32i a5, a1, 0 +402278b5: 014e85 call0 40228da0 +402278b8: fff531 l32r a3, 4022788c +402278bb: 0d2d mov.n a2, a13 +402278bd: a5a042 movi a4, 165 +402278c0: 671201 l32r a0, 40201508 +402278c3: 0000c0 callx0 a0 +402278c6: 0158 l32i.n a5, a1, 0 +402278c8: 05dd mov.n a13, a5 +402278ca: fe0556 bnez a5, 402278ae +402278cd: 2fca add.n a2, a15, a12 +402278cf: b022e0 addx8 a2, a2, a14 +402278d2: 030c movi.n a3, 0 +402278d4: 0239 s32i.n a3, a2, 0 +402278d6: cfca add.n a12, a15, a12 +402278d8: b0cce0 addx8 a12, a12, a14 +402278db: 020c movi.n a2, 0 +402278dd: 144c22 s8i a2, a12, 20 +402278e0: b108 l32i.n a0, a1, 44 +402278e2: a1c8 l32i.n a12, a1, 40 +402278e4: 91d8 l32i.n a13, a1, 36 +402278e6: 81e8 l32i.n a14, a1, 32 +402278e8: 71f8 l32i.n a15, a1, 28 +402278ea: 30c112 addi a1, a1, 48 +402278ed: f00d ret.n +402278ef: c11200 mul16u a1, a2, a0 +402278f2: 090ce0 excw +402278f5: a80c movi.n a8, 10 +402278f7: ffe471 l32r a7, 40227888 +402278fa: 61c9 s32i.n a12, a1, 24 +402278fc: 51d9 s32i.n a13, a1, 20 +402278fe: 31f9 s32i.n a15, a1, 12 +40227900: 02dd mov.n a13, a2 +40227902: 7109 s32i.n a0, a1, 28 +40227904: 41e9 s32i.n a14, a1, 16 +40227906: 09fd mov.n a15, a9 +40227908: 092d mov.n a2, a9 +4022790a: 094d mov.n a4, a9 +4022790c: 08ad mov.n a10, a8 +4022790e: 20c880 or a12, a8, a8 +40227911: 20b880 or a11, a8, a8 +40227914: 140762 l8ui a6, a7, 20 +40227917: 079a66 bnei a10, 10, 40227922 +4022791a: 46cc bnez.n a6, 40227922 +4022791c: 74a040 extui a10, a4, 0, 8 +4022791f: 000946 j 40227948 +40227922: 26ac beqz.n a6, 40227948 +40227924: dd8c beqz.n a13, 40227935 +40227926: 0d58 l32i.n a5, a13, 0 +40227928: 17e8 l32i.n a14, a7, 4 +4022792a: 0795e7 bne a5, a14, 40227935 +4022792d: 742040 extui a2, a4, 0, 8 +40227930: 002406 j 402279c4 +40227933: 520000 excw +40227936: 661507 beq a5, a0, 402279a0 +40227939: 687c16 beqz a12, 40227fc4 +4022793c: b61607 beq a6, a0, 402278f6 +4022793f: 359706 j 40234f9f <_irom0_text_end+0x4423> +40227942: 804004 excw +40227945: 059d74 excw +40227948: 441b addi.n a4, a4, 1 +4022794a: 744040 extui a4, a4, 0, 8 +4022794d: 18c772 addi a7, a7, 24 +40227950: c09466 bnei a4, 10, 40227914 +40227953: ffa022 movi a2, 255 +40227956: 6ae317 bbsi a3, 1, 402279c4 +40227959: 079a66 bnei a10, 10, 40227964 +4022795c: 646307 bbci a3, 0, 402279c4 +4022795f: 000246 j 4022796c +40227962: a00000 addx4 a0, a0, a0 +40227965: 8674c0 excw +40227968: 000007 bnone a0, a0, 4022796c +4022796b: 9c2600 excw +4022796e: c0c005 call0 401e8570 <_lit4_end+0xe2244> +40227971: 038674 excw +40227974: c0b000 sub a11, a0, a0 +40227977: 9b6674 excw +4022797a: 2208 l32i.n a0, a2, 8 +4022797c: 26ffa0 excw +4022797f: 4298 l32i.n a9, a2, 16 +40227981: 74c080 extui a12, a8, 0, 8 +40227984: 0c2d mov.n a2, a12 +40227986: fff085 call0 40227890 +40227989: ffbf41 l32r a4, 40227888 +4022798c: 112cf0 slli a2, a12, 1 +4022798f: 7d8c beqz.n a13, 4022799a +40227991: 0d58 l32i.n a5, a13, 0 +40227993: 32ca add.n a3, a2, a12 +40227995: b03340 addx8 a3, a3, a4 +40227998: 1359 s32i.n a5, a3, 4 +4022799a: 22ca add.n a2, a2, a12 +4022799c: b02240 addx8 a2, a2, a4 +4022799f: 030c movi.n a3, 0 +402279a1: 154232 s8i a3, a2, 21 +402279a4: 7420c0 extui a2, a12, 0, 8 +402279a7: 000646 j 402279c4 +402279aa: 270000 excw +402279ad: 409835 excw +402279b0: 2d74b0 excw +402279b3: e40605 call0 4020ba14 +402279b6: ff .byte 0xff +402279b7: 35f700 extui a15, a0, 23, 4 +402279ba: 408c beqz.n a0, 402279c2 +402279bc: fd74c0 excw +402279bf: e10605 call0 40208a20 +402279c2: ff .byte 0xff +402279c3: 710800 excw +402279c6: 61c8 l32i.n a12, a1, 24 +402279c8: 51d8 l32i.n a13, a1, 20 +402279ca: 41e8 l32i.n a14, a1, 16 +402279cc: 31f8 l32i.n a15, a1, 12 +402279ce: 20c112 addi a1, a1, 32 +402279d1: f00d ret.n +402279d3: c11200 mul16u a1, a2, a0 +402279d6: 61c9e0 excw +402279d9: 13c8 l32i.n a12, a3, 4 +402279db: 51d9 s32i.n a13, a1, 20 +402279dd: 41e9 s32i.n a14, a1, 16 +402279df: 02dd mov.n a13, a2 +402279e1: 31f9 s32i.n a15, a1, 12 +402279e3: 03ed mov.n a14, a3 +402279e5: 04fd mov.n a15, a4 +402279e7: 053d mov.n a3, a5 +402279e9: 640c movi.n a4, 6 +402279eb: 0c2d mov.n a2, a12 +402279ed: 7109 s32i.n a0, a1, 28 +402279ef: 658901 l32r a0, 40201014 <_irom0_text_start+0x4> +402279f2: 0000c0 callx0 a0 +402279f5: 640c movi.n a4, 6 +402279f7: 0f3d mov.n a3, a15 +402279f9: 2c4a add.n a2, a12, a4 +402279fb: 658601 l32r a0, 40201014 <_irom0_text_start+0x4> +402279fe: 0000c0 callx0 a0 +40227a01: 820c movi.n a2, 8 +40227a03: 0c4c22 s8i a2, a12, 12 +40227a06: 6d48 l32i.n a4, a13, 24 +40227a08: 020c movi.n a2, 0 +40227a0a: 0d4c22 s8i a2, a12, 13 +40227a0d: 0e3d mov.n a3, a14 +40227a0f: 0d2d mov.n a2, a13 +40227a11: 0004c0 callx0 a4 +40227a14: 7108 l32i.n a0, a1, 28 +40227a16: 61c8 l32i.n a12, a1, 24 +40227a18: 51d8 l32i.n a13, a1, 20 +40227a1a: 41e8 l32i.n a14, a1, 16 +40227a1c: 31f8 l32i.n a15, a1, 12 +40227a1e: 20c112 addi a1, a1, 32 +40227a21: f00d ret.n + ... + +40227a24 : +40227a24: e0c112 addi a1, a1, -32 +40227a27: 61c9 s32i.n a12, a1, 24 +40227a29: ff97c1 l32r a12, 40227888 +40227a2c: 51d9 s32i.n a13, a1, 20 +40227a2e: 41e9 s32i.n a14, a1, 16 +40227a30: 31f9 s32i.n a15, a1, 12 +40227a32: 7109 s32i.n a0, a1, 28 +40227a34: 0d0c movi.n a13, 0 +40227a36: efa0e2 movi a14, 239 +40227a39: 02a0f2 movi a15, 2 +40227a3c: 140c32 l8ui a3, a12, 20 +40227a3f: 03ac beqz.n a3, 40227a63 +40227a41: 150c22 l8ui a2, a12, 21 +40227a44: 221b addi.n a2, a2, 1 +40227a46: 742020 extui a2, a2, 0, 8 +40227a49: 154c22 s8i a2, a12, 21 +40227a4c: 053e27 bltu a14, a2, 40227a55 +40227a4f: 0a1366 bnei a3, 1, 40227a5d +40227a52: 0d22b6 bltui a2, 2, 40227a63 +40227a55: 0d2d mov.n a2, a13 +40227a57: ffe385 call0 40227890 +40227a5a: 000146 j 40227a63 +40227a5d: 023366 bnei a3, 3, 40227a63 +40227a60: 144cf2 s8i a15, a12, 20 +40227a63: dd1b addi.n a13, a13, 1 +40227a65: 18ccc2 addi a12, a12, 24 +40227a68: d09d66 bnei a13, 10, 40227a3c +40227a6b: 7108 l32i.n a0, a1, 28 +40227a6d: 61c8 l32i.n a12, a1, 24 +40227a6f: 51d8 l32i.n a13, a1, 20 +40227a71: 41e8 l32i.n a14, a1, 16 +40227a73: 31f8 l32i.n a15, a1, 12 +40227a75: 20c112 addi a1, a1, 32 +40227a78: f00d ret.n + ... + +40227a7c : +40227a7c: f0c112 addi a1, a1, -16 +40227a7f: 032d mov.n a2, a3 +40227a81: 230c movi.n a3, 2 +40227a83: 21c9 s32i.n a12, a1, 8 +40227a85: 11d9 s32i.n a13, a1, 4 +40227a87: 3109 s32i.n a0, a1, 12 +40227a89: 04dd mov.n a13, a4 +40227a8b: 20c550 or a12, a5, a5 +40227a8e: ffe605 call0 402278f0 +40227a91: 744020 extui a4, a2, 0, 8 +40227a94: 013480 slli a3, a4, 24 +40227a97: ffa022 movi a2, 255 +40227a9a: 022396 bltz a3, 40227ac0 +40227a9d: 313830 srai a3, a3, 24 +40227aa0: ff7a61 l32r a6, 40227888 +40227aa3: 1153f0 slli a5, a3, 1 +40227aa6: 753a add.n a7, a5, a3 +40227aa8: b07760 addx8 a7, a7, a6 +40227aab: 140772 l8ui a7, a7, 20 +40227aae: 0e27b6 bltui a7, 2, 40227ac0 +40227ab1: 353a add.n a3, a5, a3 +40227ab3: b03360 addx8 a3, a3, a6 +40227ab6: 238b addi.n a2, a3, 8 +40227ab8: 0d29 s32i.n a2, a13, 0 +40227aba: 334b addi.n a3, a3, 4 +40227abc: 0c39 s32i.n a3, a12, 0 +40227abe: 042d mov.n a2, a4 +40227ac0: 3108 l32i.n a0, a1, 12 +40227ac2: 21c8 l32i.n a12, a1, 8 +40227ac4: 11d8 l32i.n a13, a1, 4 +40227ac6: 10c112 addi a1, a1, 16 +40227ac9: f00d ret.n +40227acb: 886400 excw +40227ace: fe .byte 0xfe +40227acf: 3f .byte 0x3f + +40227ad0 : +40227ad0: d0c112 addi a1, a1, -48 +40227ad3: 91d9 s32i.n a13, a1, 36 +40227ad5: 71f9 s32i.n a15, a1, 28 +40227ad7: 33c2d2 addi a13, a2, 51 +40227ada: 02fd mov.n a15, a2 +40227adc: 224b addi.n a2, a2, 4 +40227ade: 1139 s32i.n a3, a1, 4 +40227ae0: 0129 s32i.n a2, a1, 0 +40227ae2: 040c movi.n a4, 0 +40227ae4: a32c movi.n a3, 42 +40227ae6: 320c movi.n a2, 3 +40227ae8: 81e9 s32i.n a14, a1, 32 +40227aea: b109 s32i.n a0, a1, 44 +40227aec: a1c9 s32i.n a12, a1, 40 +40227aee: 013245 call0 40228e14 +40227af1: 02ed mov.n a14, a2 +40227af3: f27c movi.n a2, -1 +40227af5: 095e16 beqz a14, 40227b8e +40227af8: 1ec8 l32i.n a12, a14, 4 +40227afa: 070c movi.n a7, 0 +40227afc: 180c movi.n a8, 1 +40227afe: 144c72 s8i a7, a12, 20 +40227b01: 154c82 s8i a8, a12, 21 +40227b04: 640c movi.n a4, 6 +40227b06: 0d3d mov.n a3, a13 +40227b08: 16cc22 addi a2, a12, 22 +40227b0b: 2179 s32i.n a7, a1, 8 +40227b0d: 3189 s32i.n a8, a1, 12 +40227b0f: 654101 l32r a0, 40201014 <_irom0_text_start+0x4> +40227b12: 0000c0 callx0 a0 +40227b15: ffed31 l32r a3, 40227acc +40227b18: 640c movi.n a4, 6 +40227b1a: 20cc22 addi a2, a12, 32 +40227b1d: 653d01 l32r a0, 40201014 <_irom0_text_start+0x4> +40227b20: 0000c0 callx0 a0 +40227b23: 694531 l32r a3, 40202038 +40227b26: 640c movi.n a4, 6 +40227b28: 0c2d mov.n a2, a12 +40227b2a: 653a01 l32r a0, 40201014 <_irom0_text_start+0x4> +40227b2d: 0000c0 callx0 a0 +40227b30: 640c movi.n a4, 6 +40227b32: 2c4a add.n a2, a12, a4 +40227b34: 0d3d mov.n a3, a13 +40227b36: 653701 l32r a0, 40201014 <_irom0_text_start+0x4> +40227b39: 0000c0 callx0 a0 +40227b3c: 0138 l32i.n a3, a1, 0 +40227b3e: 440c movi.n a4, 4 +40227b40: 1ccc22 addi a2, a12, 28 +40227b43: 653401 l32r a0, 40201014 <_irom0_text_start+0x4> +40227b46: 0000c0 callx0 a0 +40227b49: 1138 l32i.n a3, a1, 4 +40227b4b: 04a042 movi a4, 4 +40227b4e: 26cc22 addi a2, a12, 38 +40227b51: 653001 l32r a0, 40201014 <_irom0_text_start+0x4> +40227b54: 0000c0 callx0 a0 +40227b57: 630c movi.n a3, 6 +40227b59: 2178 l32i.n a7, a1, 8 +40227b5b: 3188 l32i.n a8, a1, 12 +40227b5d: 124c32 s8i a3, a12, 18 +40227b60: 430c movi.n a3, 4 +40227b62: 134c32 s8i a3, a12, 19 +40227b65: 820c movi.n a2, 8 +40227b67: 104c22 s8i a2, a12, 16 +40227b6a: 0c4c22 s8i a2, a12, 12 +40227b6d: 6f48 l32i.n a4, a15, 24 +40227b6f: 620c movi.n a2, 6 +40227b71: 0e4c72 s8i a7, a12, 14 +40227b74: 0f4c82 s8i a8, a12, 15 +40227b77: 114c72 s8i a7, a12, 17 +40227b7a: 0d4c22 s8i a2, a12, 13 +40227b7d: 0e3d mov.n a3, a14 +40227b7f: 202ff0 or a2, a15, a15 +40227b82: 0004c0 callx0 a4 +40227b85: 02cd mov.n a12, a2 +40227b87: 0e2d mov.n a2, a14 +40227b89: 012145 call0 40228da0 +40227b8c: 0c2d mov.n a2, a12 +40227b8e: b108 l32i.n a0, a1, 44 +40227b90: a1c8 l32i.n a12, a1, 40 +40227b92: 91d8 l32i.n a13, a1, 36 +40227b94: 81e8 l32i.n a14, a1, 32 +40227b96: 71f8 l32i.n a15, a1, 28 +40227b98: 30c112 addi a1, a1, 48 +40227b9b: f00d ret.n +40227b9d: 000000 ill +40227ba0: d0c112 addi a1, a1, -48 +40227ba3: 81e9 s32i.n a14, a1, 32 +40227ba5: ff3851 l32r a5, 40227888 +40227ba8: 11e4f0 slli a14, a4, 1 +40227bab: 71f9 s32i.n a15, a1, 28 +40227bad: 02fd mov.n a15, a2 +40227baf: 2e4a add.n a2, a14, a4 +40227bb1: a1c9 s32i.n a12, a1, 40 +40227bb3: 91d9 s32i.n a13, a1, 36 +40227bb5: b109 s32i.n a0, a1, 44 +40227bb7: b02250 addx8 a2, a2, a5 +40227bba: 140222 l8ui a2, a2, 20 +40227bbd: 036d mov.n a6, a3 +40227bbf: 04cd mov.n a12, a4 +40227bc1: 05dd mov.n a13, a5 +40227bc3: 292266 bnei a2, 2, 40227bf0 +40227bc6: 2e4a add.n a2, a14, a4 +40227bc8: b02250 addx8 a2, a2, a5 +40227bcb: 150222 l8ui a2, a2, 21 +40227bce: e3a032 movi a3, 227 +40227bd1: 1bb327 bgeu a3, a2, 40227bf0 +40227bd4: 3e4a add.n a3, a14, a4 +40227bd6: b03350 addx8 a3, a3, a5 +40227bd9: 334b addi.n a3, a3, 4 +40227bdb: 0f2d mov.n a2, a15 +40227bdd: 0169 s32i.n a6, a1, 0 +40227bdf: ffef05 call0 40227ad0 +40227be2: 0168 l32i.n a6, a1, 0 +40227be4: 82cc bnez.n a2, 40227bf0 +40227be6: 2eca add.n a2, a14, a12 +40227be8: b022d0 addx8 a2, a2, a13 +40227beb: 330c movi.n a3, 3 +40227bed: 144232 s8i a3, a2, 20 +40227bf0: ceca add.n a12, a14, a12 +40227bf2: b05cd0 addx8 a5, a12, a13 +40227bf5: 33cf42 addi a4, a15, 51 +40227bf8: 0f2d mov.n a2, a15 +40227bfa: 558b addi.n a5, a5, 8 +40227bfc: 063d mov.n a3, a6 +40227bfe: ffdd45 call0 402279d4 +40227c01: b108 l32i.n a0, a1, 44 +40227c03: a1c8 l32i.n a12, a1, 40 +40227c05: 91d8 l32i.n a13, a1, 36 +40227c07: 81e8 l32i.n a14, a1, 32 +40227c09: 71f8 l32i.n a15, a1, 28 +40227c0b: 30c112 addi a1, a1, 48 +40227c0e: f00d ret.n +40227c10: fed7d4 excw +40227c13: 3f .byte 0x3f +40227c14: 230570 excw +40227c17: 40 .byte 0x40 + +40227c18 : +40227c18: d0c112 addi a1, a1, -48 +40227c1b: 207330 or a7, a3, a3 +40227c1e: 0761f2 s32i a15, a1, 28 +40227c21: 20f220 or a15, a2, a2 +40227c24: 33c222 addi a2, a2, 51 +40227c27: 0129 s32i.n a2, a1, 0 +40227c29: 0728 l32i.n a2, a7, 0 +40227c2b: 0f3d mov.n a3, a15 +40227c2d: a1c9 s32i.n a12, a1, 40 +40227c2f: 1179 s32i.n a7, a1, 4 +40227c31: b109 s32i.n a0, a1, 44 +40227c33: 91d9 s32i.n a13, a1, 36 +40227c35: 81e9 s32i.n a14, a1, 32 +40227c37: 04cd mov.n a12, a4 +40227c39: 00af45 call0 40228730 +40227c3c: 437c movi.n a3, -12 +40227c3e: 1178 l32i.n a7, a1, 4 +40227c40: 158256 bnez a2, 40227d9c +40227c43: 0748 l32i.n a4, a7, 0 +40227c45: f0a022 movi a2, 240 +40227c48: 103420 and a3, a4, a2 +40227c4b: 20af22 movi a2, -224 +40227c4e: 232a add.n a2, a3, a2 +40227c50: 098216 beqz a2, 40227cec +40227c53: 095416 beqz a4, 40227cec +40227c56: 130c movi.n a3, 1 +40227c58: 072d mov.n a2, a7 +40227c5a: ffc945 call0 402278f0 +40227c5d: 744020 extui a4, a2, 0, 8 +40227c60: 016480 slli a6, a4, 24 +40227c63: 1178 l32i.n a7, a1, 4 +40227c65: 313860 srai a3, a6, 24 +40227c68: 130696 bltz a6, 40227d9c +40227c6b: 31d860 srai a13, a6, 24 +40227c6e: ff0631 l32r a3, 40227888 +40227c71: 11edf0 slli a14, a13, 1 +40227c74: 2eda add.n a2, a14, a13 +40227c76: b02230 addx8 a2, a2, a3 +40227c79: 140222 l8ui a2, a2, 20 +40227c7c: 82cc bnez.n a2, 40227c88 +40227c7e: 2eda add.n a2, a14, a13 +40227c80: b02230 addx8 a2, a2, a3 +40227c83: 130c movi.n a3, 1 +40227c85: 144232 s8i a3, a2, 20 +40227c88: ff0031 l32r a3, 40227888 +40227c8b: 2eda add.n a2, a14, a13 +40227c8d: b02230 addx8 a2, a2, a3 +40227c90: 140222 l8ui a2, a2, 20 +40227c93: 011226 beqi a2, 1, 40227c98 +40227c96: 2cdc bnez.n a12, 40227cac +40227c98: 073d mov.n a3, a7 +40227c9a: 0f2d mov.n a2, a15 +40227c9c: 1149 s32i.n a4, a1, 4 +40227c9e: ffe305 call0 40227ad0 +40227ca1: 023d mov.n a3, a2 +40227ca3: 1148 l32i.n a4, a1, 4 +40227ca5: 0f3c16 beqz a12, 40227d9c +40227ca8: 000086 j 40227cae +40227cab: f27c00 excw +40227cae: fef651 l32r a5, 40227888 +40227cb1: 3eda add.n a3, a14, a13 +40227cb3: b03350 addx8 a3, a3, a5 +40227cb6: 140352 l8ui a5, a3, 20 +40227cb9: 1525b6 bltui a5, 2, 40227cd2 +40227cbc: ffd521 l32r a2, 40227c10 +40227cbf: 538b addi.n a5, a3, 8 +40227cc1: 004242 s8i a4, a2, 0 +40227cc4: 0148 l32i.n a4, a1, 0 +40227cc6: 0c3d mov.n a3, a12 +40227cc8: 0f2d mov.n a2, a15 +40227cca: ffd085 call0 402279d4 +40227ccd: 023d mov.n a3, a2 +40227ccf: 003246 j 40227d9c +40227cd2: 023d mov.n a3, a2 +40227cd4: 0c2d mov.n a2, a12 +40227cd6: 021526 beqi a5, 1, 40227cdc +40227cd9: 002fc6 j 40227d9c +40227cdc: 129c beqz.n a2, 40227cf1 +40227cde: 0c0232 l8ui a3, a2, 12 +40227ce1: 021326 beqi a3, 1, 40227ce7 +40227ce4: 002346 j 40227d75 +40227ce7: 0228 l32i.n a2, a2, 0 +40227ce9: fffbc6 j 40227cdc +40227cec: 437c movi.n a3, -12 +40227cee: 002a86 j 40227d9c +40227cf1: 202cc0 or a2, a12, a12 +40227cf4: 010985 call0 40228d90 +40227cf7: 09fc16 beqz a12, 40227d9a +40227cfa: ffc621 l32r a2, 40227c14 +40227cfd: fee3f1 l32r a15, 4022788c +40227d00: 052222 l32i a2, a2, 20 +40227d03: 00a052 movi a5, 0 +40227d06: 73a442 movi a4, 0x473 +40227d09: 0f3d mov.n a3, a15 +40227d0b: 65fe01 l32r a0, 40201504 +40227d0e: 0000c0 callx0 a0 +40227d11: 057216 beqz a2, 40227d6c +40227d14: 030c movi.n a3, 0 +40227d16: 0239 s32i.n a3, a2, 0 +40227d18: fedc31 l32r a3, 40227888 +40227d1b: 4eda add.n a4, a14, a13 +40227d1d: b04430 addx8 a4, a4, a3 +40227d20: 12c9 s32i.n a12, a2, 4 +40227d22: 04c8 l32i.n a12, a4, 0 +40227d24: 140c movi.n a4, 1 +40227d26: 0c5d mov.n a5, a12 +40227d28: 0cbc beqz.n a12, 40227d5c +40227d2a: 0538 l32i.n a3, a5, 0 +40227d2c: 538c beqz.n a3, 40227d35 +40227d2e: 441b addi.n a4, a4, 1 +40227d30: 035d mov.n a5, a3 +40227d32: fffd06 j 40227d2a +40227d35: 0529 s32i.n a2, a5, 0 +40227d37: 6134b6 bltui a4, 3, 40227d9c +40227d3a: fed321 l32r a2, 40227888 +40227d3d: eeda add.n a14, a14, a13 +40227d3f: b0de20 addx8 a13, a14, a2 +40227d42: 0c28 l32i.n a2, a12, 0 +40227d44: 0d29 s32i.n a2, a13, 0 +40227d46: 012c22 l32i a2, a12, 4 +40227d49: 010545 call0 40228da0 +40227d4c: 8ba442 movi a4, 0x48b +40227d4f: 0f3d mov.n a3, a15 +40227d51: 0c2d mov.n a2, a12 +40227d53: 65ed01 l32r a0, 40201508 +40227d56: 0000c0 callx0 a0 +40227d59: 000246 j 40227d66 +40227d5c: fecb51 l32r a5, 40227888 +40227d5f: eeda add.n a14, a14, a13 +40227d61: b0de50 addx8 a13, a14, a5 +40227d64: 0d29 s32i.n a2, a13, 0 +40227d66: 030c movi.n a3, 0 +40227d68: 000c06 j 40227d9c +40227d6b: 0c2d00 excw +40227d6e: 010305 call0 40228da0 +40227d71: 000946 j 40227d9a +40227d74: 123200 excw +40227d77: a04204 excw +40227d7a: a02200 addx4 a2, a2, a0 +40227d7d: 094503 excw +40227d80: 02fd01 l32r a0, 401e8974 <_lit4_end+0xe2648> +40227d83: 329c beqz.n a2, 40227d9a +40227d85: 0c3d mov.n a3, a12 +40227d87: 0f2d mov.n a2, a15 +40227d89: 012e45 call0 40229070 +40227d8c: 428c beqz.n a2, 40227d94 +40227d8e: 0f2d mov.n a2, a15 +40227d90: fff686 j 40227d6e +40227d93: 0fcd00 excw +40227d96: ffd806 j 40227cfa +40227d99: f37c00 excw +40227d9c: b108 l32i.n a0, a1, 44 +40227d9e: 032d mov.n a2, a3 +40227da0: a1c8 l32i.n a12, a1, 40 +40227da2: 91d8 l32i.n a13, a1, 36 +40227da4: 81e8 l32i.n a14, a1, 32 +40227da6: 71f8 l32i.n a15, a1, 28 +40227da8: 30c112 addi a1, a1, 48 +40227dab: f00d ret.n +40227dad: 000000 ill +40227db0: fea9 s32i.n a10, a14, 60 + ... + +40227db4 : +40227db4: e0c112 addi a1, a1, -32 +40227db7: 41e9 s32i.n a14, a1, 16 +40227db9: 03ed mov.n a14, a3 +40227dbb: 61c9 s32i.n a12, a1, 24 +40227dbd: e30c movi.n a3, 14 +40227dbf: 02cd mov.n a12, a2 +40227dc1: 0e2d mov.n a2, a14 +40227dc3: 51d9 s32i.n a13, a1, 20 +40227dc5: 7109 s32i.n a0, a1, 28 +40227dc7: 04dd mov.n a13, a4 +40227dc9: 00f4c5 call0 40228d18 +40227dcc: e37c movi.n a3, -2 +40227dce: 0c6256 bnez a2, 40227e98 +40227dd1: 0d28 l32i.n a2, a13, 0 +40227dd3: 0c3d mov.n a3, a12 +40227dd5: 009585 call0 40228730 +40227dd8: 0ad256 bnez a2, 40227e89 +40227ddb: 0d28 l32i.n a2, a13, 0 +40227ddd: f0a032 movi a3, 240 +40227de0: 103230 and a3, a2, a3 +40227de3: e0a042 movi a4, 224 +40227de6: 289347 bne a3, a4, 40227e12 +40227de9: 120c movi.n a2, 1 +40227deb: 004122 s8i a2, a1, 0 +40227dee: 020c movi.n a2, 0 +40227df0: 014122 s8i a2, a1, 1 +40227df3: e25c movi.n a2, 94 +40227df5: 024122 s8i a2, a1, 2 +40227df8: 010d22 l8ui a2, a13, 1 +40227dfb: 015d mov.n a5, a1 +40227dfd: 642020 extui a2, a2, 0, 7 +40227e00: 034122 s8i a2, a1, 3 +40227e03: 020d22 l8ui a2, a13, 2 +40227e06: 044122 s8i a2, a1, 4 +40227e09: 030d22 l8ui a2, a13, 3 +40227e0c: 054122 s8i a2, a1, 5 +40227e0f: 001e46 j 40227e8c +40227e12: 1c38 l32i.n a3, a12, 4 +40227e14: 2c48 l32i.n a4, a12, 8 +40227e16: 303230 xor a3, a2, a3 +40227e19: 130347 bnone a3, a4, 40227e30 +40227e1c: ffe531 l32r a3, 40227db0 +40227e1f: f42020 extui a2, a2, 0, 16 +40227e22: 0a1237 beq a2, a3, 40227e30 +40227e25: 3c28 l32i.n a2, a12, 12 +40227e27: 0cccd2 addi a13, a12, 12 +40227e2a: fcaf32 movi a3, -4 +40227e2d: 067216 beqz a2, 40227e98 +40227e30: ff7861 l32r a6, 40227c10 +40227e33: fe9521 l32r a2, 40227888 +40227e36: 000642 l8ui a4, a6, 0 +40227e39: 1134f0 slli a3, a4, 1 +40227e3c: 534a add.n a5, a3, a4 +40227e3e: b05520 addx8 a5, a5, a2 +40227e41: 140552 l8ui a5, a5, 20 +40227e44: 0e25b6 bltui a5, 2, 40227e56 +40227e47: 803340 add a3, a3, a4 +40227e4a: b03320 addx8 a3, a3, a2 +40227e4d: 002d52 l32i a5, a13, 0 +40227e50: 012332 l32i a3, a3, 4 +40227e53: 121537 beq a5, a3, 40227e69 +40227e56: 00a042 movi a4, 0 +40227e59: 140232 l8ui a3, a2, 20 +40227e5c: 1423b6 bltui a3, 2, 40227e74 +40227e5f: 0d58 l32i.n a5, a13, 0 +40227e61: 1238 l32i.n a3, a2, 4 +40227e63: 0d9537 bne a5, a3, 40227e74 +40227e66: 004642 s8i a4, a6, 0 +40227e69: 0e3d mov.n a3, a14 +40227e6b: 0c2d mov.n a2, a12 +40227e6d: ffd305 call0 40227ba0 +40227e70: 000886 j 40227e96 +40227e73: 441b00 extui a1, a0, 11, 5 +40227e76: 18c222 addi a2, a2, 24 +40227e79: dc9466 bnei a4, 10, 40227e59 +40227e7c: 0e4d mov.n a4, a14 +40227e7e: 0d3d mov.n a3, a13 +40227e80: 0c2d mov.n a2, a12 +40227e82: ffd945 call0 40227c18 +40227e85: 000346 j 40227e96 +40227e88: 6b5100 excw +40227e8b: 4268 l32i.n a6, a2, 16 +40227e8d: 33cc bnez.n a3, 40227e94 +40227e8f: 0e3d mov.n a3, a14 +40227e91: 0c2d mov.n a2, a12 +40227e93: ffb405 call0 402279d4 +40227e96: 023d mov.n a3, a2 +40227e98: 7108 l32i.n a0, a1, 28 +40227e9a: 032d mov.n a2, a3 +40227e9c: 61c8 l32i.n a12, a1, 24 +40227e9e: 51d8 l32i.n a13, a1, 20 +40227ea0: 41e8 l32i.n a14, a1, 16 +40227ea2: 20c112 addi a1, a1, 32 +40227ea5: f00d ret.n + ... + +40227ea8 : +40227ea8: a0c112 addi a1, a1, -96 +40227eab: 051242 l16ui a4, a2, 10 +40227eae: 1661c2 s32i a12, a1, 88 +40227eb1: 1561d2 s32i a13, a1, 84 +40227eb4: 176102 s32i a0, a1, 92 +40227eb7: 02dd mov.n a13, a2 +40227eb9: 1461e2 s32i a14, a1, 80 +40227ebc: 1361f2 s32i a15, a1, 76 +40227ebf: e20c movi.n a2, 14 +40227ec1: 03cd mov.n a12, a3 +40227ec3: 023247 bltu a2, a4, 40227ec9 +40227ec6: 008486 j 402280dc +40227ec9: 1de8 l32i.n a14, a13, 4 +40227ecb: 0d0e22 l8ui a2, a14, 13 +40227ece: 0c0e32 l8ui a3, a14, 12 +40227ed1: 112280 slli a2, a2, 8 +40227ed4: 202230 or a2, a2, a3 +40227ed7: 0a8226 beqi a2, 8, 40227ee5 +40227eda: 08a632 movi a3, 0x608 +40227edd: 231237 beq a2, a3, 40227f04 +40227ee0: 007e06 j 402280dc +40227ee3: 220000 excw +40227ee6: 390c movi.n a9, 3 +40227ee8: 02e257 bbsi a2, 5, 40227eee +40227eeb: 007b46 j 402280dc +40227eee: f2af32 movi a3, -14 +40227ef1: 202dd0 or a2, a13, a13 +40227ef4: 00e205 call0 40228d18 +40227ef7: 1e1256 bnez a2, 402280dc +40227efa: 0c3d mov.n a3, a12 +40227efc: 0d2d mov.n a2, a13 +40227efe: 002fc5 call0 402281fc +40227f01: 007706 j 402280e1 +40227f04: 390c22 l8ui a2, a12, 57 +40227f07: 02e257 bbsi a2, 5, 40227f0d +40227f0a: 007386 j 402280dc +40227f0d: 33cc22 addi a2, a12, 51 +40227f10: 5129 s32i.n a2, a1, 20 +40227f12: 922c movi.n a2, 41 +40227f14: 023247 bltu a2, a4, 40227f1a +40227f17: 007046 j 402280dc +40227f1a: 0f0e22 l8ui a2, a14, 15 +40227f1d: 0e0e32 l8ui a3, a14, 14 +40227f20: 112280 slli a2, a2, 8 +40227f23: 202230 or a2, a2, a3 +40227f26: 02f226 beqi a2, 0x100, 40227f2c +40227f29: 006bc6 j 402280dc +40227f2c: 120e22 l8ui a2, a14, 18 +40227f2f: 026226 beqi a2, 6, 40227f35 +40227f32: 006986 j 402280dc +40227f35: 130e22 l8ui a2, a14, 19 +40227f38: 024226 beqi a2, 4, 40227f3e +40227f3b: 006746 j 402280dc +40227f3e: 110e22 l8ui a2, a14, 17 +40227f41: 100e32 l8ui a3, a14, 16 +40227f44: 112280 slli a2, a2, 8 +40227f47: 202230 or a2, a2, a3 +40227f4a: 028226 beqi a2, 8, 40227f50 +40227f4d: 0062c6 j 402280dc +40227f50: 440c movi.n a4, 4 +40227f52: 1cce32 addi a3, a14, 28 +40227f55: 214a add.n a2, a1, a4 +40227f57: 066132 s32i a3, a1, 24 +40227f5a: 642e01 l32r a0, 40201014 <_irom0_text_start+0x4> +40227f5d: 0000c0 callx0 a0 +40227f60: 26ce22 addi a2, a14, 38 +40227f63: 023d mov.n a3, a2 +40227f65: 8129 s32i.n a2, a1, 32 +40227f67: 440c movi.n a4, 4 +40227f69: 012d mov.n a2, a1 +40227f6b: 642a01 l32r a0, 40201014 <_irom0_text_start+0x4> +40227f6e: 0000c0 callx0 a0 +40227f71: 3c4b addi.n a3, a12, 4 +40227f73: 040c movi.n a4, 0 +40227f75: 1c28 l32i.n a2, a12, 4 +40227f77: 9139 s32i.n a3, a1, 36 +40227f79: 7149 s32i.n a4, a1, 28 +40227f7b: 0e1247 beq a2, a4, 40227f8d +40227f7e: 0138 l32i.n a3, a1, 0 +40227f80: c03320 sub a3, a3, a2 +40227f83: 120c movi.n a2, 1 +40227f85: 932430 movnez a2, a4, a3 +40227f88: 742020 extui a2, a2, 0, 8 +40227f8b: 7129 s32i.n a2, a1, 28 +40227f8d: 16ce22 addi a2, a14, 22 +40227f90: 7138 l32i.n a3, a1, 28 +40227f92: 4129 s32i.n a2, a1, 16 +40227f94: 2f0c movi.n a15, 2 +40227f96: 120c movi.n a2, 1 +40227f98: 93f230 movnez a15, a2, a3 +40227f9b: 012122 l32i a2, a1, 4 +40227f9e: 32ec bnez.n a2, 40227fc5 +40227fa0: 150e22 l8ui a2, a14, 21 +40227fa3: 140e32 l8ui a3, a14, 20 +40227fa6: 112280 slli a2, a2, 8 +40227fa9: 202230 or a2, a2, a3 +40227fac: 02f266 bnei a2, 0x100, 40227fb2 +40227faf: 002a86 j 4022805d +40227fb2: 00a232 movi a3, 0x200 +40227fb5: 021237 beq a2, a3, 40227fbb +40227fb8: 004806 j 402280dc +40227fbb: 314b addi.n a3, a1, 4 +40227fbd: 0c2d mov.n a2, a12 +40227fbf: fcd745 call0 40224d34 +40227fc2: 004586 j 402280dc +40227fc5: 203cc0 or a3, a12, a12 +40227fc8: 007645 call0 40228730 +40227fcb: fd1256 bnez a2, 40227fa0 +40227fce: 012122 l32i a2, a1, 4 +40227fd1: f0a032 movi a3, 240 +40227fd4: 102320 and a2, a3, a2 +40227fd7: e0a032 movi a3, 224 +40227fda: c21237 beq a2, a3, 40227fa0 +40227fdd: 0f3d mov.n a3, a15 +40227fdf: 214b addi.n a2, a1, 4 +40227fe1: ff90c5 call0 402278f0 +40227fe4: 012280 slli a2, a2, 24 +40227fe7: fb5296 bltz a2, 40227fa0 +40227fea: 318820 srai a8, a2, 24 +40227fed: 1198f0 slli a9, a8, 1 +40227ff0: 798a add.n a7, a9, a8 +40227ff2: fe25f1 l32r a15, 40227888 +40227ff5: 1177d0 slli a7, a7, 3 +40227ff8: ff7a add.n a15, a15, a7 +40227ffa: 220c movi.n a2, 2 +40227ffc: 4138 l32i.n a3, a1, 16 +40227ffe: 144f22 s8i a2, a15, 20 +40228001: 640c movi.n a4, 6 +40228003: 2f8b addi.n a2, a15, 8 +40228005: c179 s32i.n a7, a1, 48 +40228007: a189 s32i.n a8, a1, 40 +40228009: b199 s32i.n a9, a1, 44 +4022800b: 640201 l32r a0, 40201014 <_irom0_text_start+0x4> +4022800e: 0000c0 callx0 a0 +40228011: 020c movi.n a2, 0 +40228013: 154f22 s8i a2, a15, 21 +40228016: b198 l32i.n a9, a1, 44 +40228018: c178 l32i.n a7, a1, 48 +4022801a: a188 l32i.n a8, a1, 40 +4022801c: fe1b31 l32r a3, 40227888 +4022801f: 237a add.n a2, a3, a7 +40228021: 0228 l32i.n a2, a2, 0 +40228023: f79216 beqz a2, 40227fa0 +40228026: 498a add.n a4, a9, a8 +40228028: b03430 addx8 a3, a4, a3 +4022802b: 0248 l32i.n a4, a2, 0 +4022802d: 12f8 l32i.n a15, a2, 4 +4022802f: 0349 s32i.n a4, a3, 0 +40228031: fe1631 l32r a3, 4022788c +40228034: ffa142 movi a4, 0x1ff +40228037: c179 s32i.n a7, a1, 48 +40228039: a189 s32i.n a8, a1, 40 +4022803b: 0b6192 s32i a9, a1, 44 +4022803e: 653201 l32r a0, 40201508 +40228041: 0000c0 callx0 a0 +40228044: 4158 l32i.n a5, a1, 16 +40228046: 5148 l32i.n a4, a1, 20 +40228048: 0f3d mov.n a3, a15 +4022804a: 0c2d mov.n a2, a12 +4022804c: ff9845 call0 402279d4 +4022804f: 0f2d mov.n a2, a15 +40228051: 00d4c5 call0 40228da0 +40228054: b198 l32i.n a9, a1, 44 +40228056: a188 l32i.n a8, a1, 40 +40228058: c178 l32i.n a7, a1, 48 +4022805a: ffef86 j 4022801c +4022805d: 072122 l32i a2, a1, 28 +40228060: 078216 beqz a2, 402280dc +40228063: 02a022 movi a2, 2 +40228066: 154e22 s8i a2, a14, 21 +40228069: 0f0c movi.n a15, 0 +4022806b: 6138 l32i.n a3, a1, 24 +4022806d: 8128 l32i.n a2, a1, 32 +4022806f: 144ef2 s8i a15, a14, 20 +40228072: 440c movi.n a4, 4 +40228074: 63e801 l32r a0, 40201014 <_irom0_text_start+0x4> +40228077: 0000c0 callx0 a0 +4022807a: 9138 l32i.n a3, a1, 36 +4022807c: 6128 l32i.n a2, a1, 24 +4022807e: 440c movi.n a4, 4 +40228080: 63e501 l32r a0, 40201014 <_irom0_text_start+0x4> +40228083: 0000c0 callx0 a0 +40228086: 4138 l32i.n a3, a1, 16 +40228088: 640c movi.n a4, 6 +4022808a: 20ce22 addi a2, a14, 32 +4022808d: 63e101 l32r a0, 40201014 <_irom0_text_start+0x4> +40228090: 0000c0 callx0 a0 +40228093: 4138 l32i.n a3, a1, 16 +40228095: 640c movi.n a4, 6 +40228097: 0e2d mov.n a2, a14 +40228099: 63de01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022809c: 0000c0 callx0 a0 +4022809f: 5138 l32i.n a3, a1, 20 +402280a1: 4128 l32i.n a2, a1, 16 +402280a3: 640c movi.n a4, 6 +402280a5: 63db01 l32r a0, 40201014 <_irom0_text_start+0x4> +402280a8: 0000c0 callx0 a0 +402280ab: 640c movi.n a4, 6 +402280ad: 5138 l32i.n a3, a1, 20 +402280af: 2e4a add.n a2, a14, a4 +402280b1: 63d801 l32r a0, 40201014 <_irom0_text_start+0x4> +402280b4: 0000c0 callx0 a0 +402280b7: 041d32 l16ui a3, a13, 8 +402280ba: 0f4d mov.n a4, a15 +402280bc: 320c movi.n a2, 3 +402280be: 00d545 call0 40228e14 +402280c1: 02ed mov.n a14, a2 +402280c3: 0512f7 beq a2, a15, 402280cc +402280c6: 203dd0 or a3, a13, a13 +402280c9: 00fa45 call0 40229070 +402280cc: 062c42 l32i a4, a12, 24 +402280cf: 203ee0 or a3, a14, a14 +402280d2: 0c2d mov.n a2, a12 +402280d4: 0004c0 callx0 a4 +402280d7: 0e2d mov.n a2, a14 +402280d9: 00cc45 call0 40228da0 +402280dc: 0d2d mov.n a2, a13 +402280de: 00cc05 call0 40228da0 +402280e1: 172102 l32i a0, a1, 92 +402280e4: 020c movi.n a2, 0 +402280e6: 1621c2 l32i a12, a1, 88 +402280e9: 1521d2 l32i a13, a1, 84 +402280ec: 1421e2 l32i a14, a1, 80 +402280ef: 1321f2 l32i a15, a1, 76 +402280f2: 60c112 addi a1, a1, 96 +402280f5: f00d ret.n + ... + +402280f8 : +402280f8: f0c112 addi a1, a1, -16 +402280fb: 11d9 s32i.n a13, a1, 4 +402280fd: fde2d1 l32r a13, 40227888 +40228100: 21c9 s32i.n a12, a1, 8 +40228102: 01e9 s32i.n a14, a1, 0 +40228104: 036102 s32i a0, a1, 12 +40228107: 20e220 or a14, a2, a2 +4022810a: 00a0c2 movi a12, 0 +4022810d: 140d22 l8ui a2, a13, 20 +40228110: 828c beqz.n a2, 4022811c +40228112: 4d28 l32i.n a2, a13, 16 +40228114: 0492e7 bne a2, a14, 4022811c +40228117: 0c2d mov.n a2, a12 +40228119: ff7745 call0 40227890 +4022811c: cc1b addi.n a12, a12, 1 +4022811e: 18cdd2 addi a13, a13, 24 +40228121: e89c66 bnei a12, 10, 4022810d +40228124: 3108 l32i.n a0, a1, 12 +40228126: 21c8 l32i.n a12, a1, 8 +40228128: 11d8 l32i.n a13, a1, 4 +4022812a: 01e8 l32i.n a14, a1, 0 +4022812c: 10c112 addi a1, a1, 16 +4022812f: f00d ret.n +40228131: 000000 ill +40228134: 0016d0 excw + ... + +40228138 : +40228138: f0c112 addi a1, a1, -16 +4022813b: fb1421 l32r a2, 40226d8c +4022813e: 3109 s32i.n a0, a1, 12 +40228140: 530c movi.n a3, 5 +40228142: 0020c0 memw +40228145: 0239 s32i.n a3, a2, 0 +40228147: fffb31 l32r a3, 40228134 +4022814a: 65fd21 l32r a2, 40201940 +4022814d: 0020c0 memw +40228150: 0239 s32i.n a3, a2, 0 +40228152: f9c721 l32r a2, 40226870 +40228155: c30c movi.n a3, 12 +40228157: 0020c0 memw +4022815a: 0239 s32i.n a3, a2, 0 +4022815c: f9c421 l32r a2, 4022686c +4022815f: 630c movi.n a3, 6 +40228161: 0020c0 memw +40228164: 0239 s32i.n a3, a2, 0 +40228166: 009345 call0 40228a9c +40228169: 0611c5 call0 4022e288 +4022816c: fe3e05 call0 40226550 +4022816f: 041b45 call0 4022c324 +40228172: 3108 l32i.n a0, a1, 12 +40228174: 10c112 addi a1, a1, 16 +40228177: f00d ret.n +40228179: 000000 ill + +4022817c : +4022817c: f0c112 addi a1, a1, -16 +4022817f: 11d9 s32i.n a13, a1, 4 +40228181: 02dd mov.n a13, a2 +40228183: f38f21 l32r a2, 40224fc0 +40228186: 21c9 s32i.n a12, a1, 8 +40228188: 02c8 l32i.n a12, a2, 0 +4022818a: 3109 s32i.n a0, a1, 12 +4022818c: 0c2d mov.n a2, a12 +4022818e: e29c beqz.n a2, 402281b0 +40228190: 390232 l8ui a3, a2, 57 +40228193: 0b6307 bbci a3, 0, 402281a2 +40228196: 0d48 l32i.n a4, a13, 0 +40228198: 1238 l32i.n a3, a2, 4 +4022819a: 303430 xor a3, a4, a3 +4022819d: 2248 l32i.n a4, a2, 8 +4022819f: 3a0347 bnone a3, a4, 402281dd +402281a2: 0228 l32i.n a2, a2, 0 +402281a4: fff986 j 4022818e +402281a7: 0c2200 excw +402281aa: 0739 s32i.n a3, a7, 0 +402281ac: c807e2 l8ui a14, a7, 200 +402281af: 560c movi.n a6, 5 +402281b1: ff4c movi.n a15, 79 +402281b3: 000506 j 402281cb +402281b6: 002d22 l32i a2, a13, 0 +402281b9: 203cc0 or a3, a12, a12 +402281bc: 005705 call0 40228730 +402281bf: feb256 bnez a2, 402281ae +402281c2: ec8ac5 call0 40214a70 +402281c5: 141c27 beq a12, a2, 402281dd +402281c8: fff886 j 402281ae +402281cb: a68d21 l32r a2, 40211c00 +402281ce: 0228 l32i.n a2, a2, 0 +402281d0: 928c beqz.n a2, 402281dd +402281d2: 390232 l8ui a3, a2, 57 +402281d5: 040c movi.n a4, 0 +402281d7: 043030 extui a3, a3, 0, 1 +402281da: 832430 moveqz a2, a4, a3 +402281dd: 3108 l32i.n a0, a1, 12 +402281df: 21c8 l32i.n a12, a1, 8 +402281e1: 11d8 l32i.n a13, a1, 4 +402281e3: 10c112 addi a1, a1, 16 +402281e6: f00d ret.n +402281e8: fee754 excw +402281eb: 3f .byte 0x3f +402281ec: e74c movi.n a7, 78 +402281ee: fe .byte 0xfe +402281ef: 3f .byte 0x3f +402281f0: 004400 break 4, 0 +402281f3: e75000 excw +402281f6: fe .byte 0xfe +402281f7: 3f .byte 0x3f +402281f8: e758 l32i.n a5, a7, 56 +402281fa: fe .byte 0xfe +402281fb: 3f .byte 0x3f + +402281fc : +402281fc: d0c112 addi a1, a1, -48 +402281ff: 81e9 s32i.n a14, a1, 32 +40228201: 12e8 l32i.n a14, a2, 4 +40228203: a1c9 s32i.n a12, a1, 40 +40228205: 71f9 s32i.n a15, a1, 28 +40228207: b109 s32i.n a0, a1, 44 +40228209: 91d9 s32i.n a13, a1, 36 +4022820b: 02cd mov.n a12, a2 +4022820d: 010e22 l8ui a2, a14, 1 +40228210: 035d mov.n a5, a3 +40228212: 000e32 l8ui a3, a14, 0 +40228215: 112280 slli a2, a2, 8 +40228218: 202230 or a2, a2, a3 +4022821b: 11f280 slli a15, a2, 8 +4022821e: 412820 srli a2, a2, 8 +40228221: 20ff20 or a15, a15, a2 +40228224: f4f0f0 extui a15, a15, 0, 16 +40228227: 412cf0 srli a2, a15, 12 +4022822a: 074226 beqi a2, 4, 40228235 +4022822d: 0c2d mov.n a2, a12 +4022822f: 00b705 call0 40228da0 +40228232: 008006 j 40228436 +40228235: 030e22 l8ui a2, a14, 3 +40228238: 020e32 l8ui a3, a14, 2 +4022823b: 112280 slli a2, a2, 8 +4022823e: 202230 or a2, a2, a3 +40228241: 11d280 slli a13, a2, 8 +40228244: 412820 srli a2, a2, 8 +40228247: 20dd20 or a13, a13, a2 +4022824a: 34f8f0 extui a15, a15, 8, 4 +4022824d: 051c22 l16ui a2, a12, 10 +40228250: 11ffe0 slli a15, a15, 2 +40228253: f4d0d0 extui a13, a13, 0, 16 +40228256: d332f7 bltu a2, a15, 4022822d +40228259: 041c22 l16ui a2, a12, 8 +4022825c: cd32d7 bltu a2, a13, 4022822d +4022825f: 203ff0 or a3, a15, a15 +40228262: 0e2d mov.n a2, a14 +40228264: 026152 s32i a5, a1, 8 +40228267: 084045 call0 4023066c +4022826a: fbf256 bnez a2, 4022822d +4022826d: 0d3d mov.n a3, a13 +4022826f: 0c2d mov.n a2, a12 +40228271: 00d285 call0 40228f9c +40228274: 110e32 l8ui a3, a14, 17 +40228277: 100e72 l8ui a7, a14, 16 +4022827a: 120e22 l8ui a2, a14, 18 +4022827d: 113380 slli a3, a3, 8 +40228280: 206370 or a6, a3, a7 +40228283: 112200 slli a2, a2, 16 +40228286: 203260 or a3, a2, a6 +40228289: 130e22 l8ui a2, a14, 19 +4022828c: ffd7d1 l32r a13, 402281e8 +4022828f: 012280 slli a2, a2, 24 +40228292: 202230 or a2, a2, a3 +40228295: 0d29 s32i.n a2, a13, 0 +40228297: 0d0e62 l8ui a6, a14, 13 +4022829a: 0c0e82 l8ui a8, a14, 12 +4022829d: 0e0e32 l8ui a3, a14, 14 +402282a0: 116680 slli a6, a6, 8 +402282a3: 113300 slli a3, a3, 16 +402282a6: 207680 or a7, a6, a8 +402282a9: 206370 or a6, a3, a7 +402282ac: 0f0e32 l8ui a3, a14, 15 +402282af: ffcf41 l32r a4, 402281ec +402282b2: 013380 slli a3, a3, 24 +402282b5: 203360 or a3, a3, a6 +402282b8: 0439 s32i.n a3, a4, 0 +402282ba: f0a032 movi a3, 240 +402282bd: 102230 and a2, a2, a3 +402282c0: e0a032 movi a3, 224 +402282c3: 2158 l32i.n a5, a1, 8 +402282c5: 199237 bne a2, a3, 402282e2 +402282c8: 390522 l8ui a2, a5, 57 +402282cb: 012280 slli a2, a2, 24 +402282ce: 0572d6 bgez a2, 40228329 +402282d1: 052d mov.n a2, a5 +402282d3: 0d3d mov.n a3, a13 +402282d5: 0606c5 call0 4022e344 +402282d8: 2158 l32i.n a5, a1, 8 +402282da: 04b216 beqz a2, 40228329 +402282dd: 056d mov.n a6, a5 +402282df: 004886 j 40228405 +402282e2: 056d mov.n a6, a5 +402282e4: 170c movi.n a7, 1 +402282e6: 390622 l8ui a2, a6, 57 +402282e9: 09e207 bbsi a2, 0, 402282f6 +402282ec: d7ac beqz.n a7, 4022831d +402282ee: f33421 l32r a2, 40224fc0 +402282f1: 0268 l32i.n a6, a2, 0 +402282f3: 000a06 j 4022831f +402282f6: 012632 l32i a3, a6, 4 +402282f9: fef316 beqz a3, 402282ec +402282fc: 002d22 l32i a2, a13, 0 +402282ff: 029327 bne a3, a2, 40228305 +40228302: 003fc6 j 40228405 +40228305: 203660 or a3, a6, a6 +40228308: 2159 s32i.n a5, a1, 8 +4022830a: 1169 s32i.n a6, a1, 4 +4022830c: 0179 s32i.n a7, a1, 0 +4022830e: 004205 call0 40228730 +40228311: 2158 l32i.n a5, a1, 8 +40228313: 1168 l32i.n a6, a1, 4 +40228315: 0178 l32i.n a7, a1, 0 +40228317: 0ea256 bnez a2, 40228405 +4022831a: fff386 j 402282ec +4022831d: 0668 l32i.n a6, a6, 0 +4022831f: 019657 bne a6, a5, 40228324 +40228322: 0568 l32i.n a6, a5, 0 +40228324: 070c movi.n a7, 0 +40228326: bc9677 bne a6, a7, 402282e6 +40228329: 090e32 l8ui a3, a14, 9 +4022832c: 121c movi.n a2, 17 +4022832e: 021327 beq a3, a2, 40228334 +40228331: 003346 j 40228402 +40228334: fefa add.n a15, a14, a15 +40228336: 030f22 l8ui a2, a15, 3 +40228339: 020f32 l8ui a3, a15, 2 +4022833c: 112280 slli a2, a2, 8 +4022833f: 202230 or a2, a2, a3 +40228342: ffab31 l32r a3, 402281f0 +40228345: 021237 beq a2, a3, 4022834b +40228348: 002d86 j 40228402 +4022834b: 056d mov.n a6, a5 +4022834d: edc616 beqz a6, 4022822d +40228350: 060e22 l8ui a2, a14, 6 +40228353: 070e32 l8ui a3, a14, 7 +40228356: 542020 extui a2, a2, 0, 6 +40228359: 113380 slli a3, a3, 8 +4022835c: 202230 or a2, a2, a3 +4022835f: eca256 bnez a2, 4022822d +40228362: ffa521 l32r a2, 402281f8 +40228365: ffa3f1 l32r a15, 402281f4 +40228368: 0062e2 s32i a14, a2, 0 +4022836b: 006f52 s32i a5, a15, 0 +4022836e: 053d mov.n a3, a5 +40228370: 0c2d mov.n a2, a12 +40228372: 026152 s32i a5, a1, 8 +40228375: 011f45 call0 4022956c +40228378: 2158 l32i.n a5, a1, 8 +4022837a: 06e256 bnez a2, 402283ec +4022837d: 090e22 l8ui a2, a14, 9 +40228380: 332226 beqi a2, 2, 402283b7 +40228383: 0d32f6 bgeui a2, 3, 40228394 +40228386: 3a1266 bnei a2, 1, 402283c4 +40228389: 053d mov.n a3, a5 +4022838b: 0c2d mov.n a2, a12 +4022838d: 05b705 call0 4022df00 +40228390: 001606 j 402283ec +40228393: 622600 excw +40228396: 131c12 l16ui a1, a12, 38 +40228399: 279237 bne a2, a3, 402283c4 +4022839c: 053d mov.n a3, a5 +4022839e: 202cc0 or a2, a12, a12 +402283a1: 044905 call0 4022c834 +402283a4: 001106 j 402283ec +402283a7: 000000 ill +402283aa: 053d mov.n a3, a5 +402283ac: 0c2d mov.n a2, a12 +402283ae: 027305 call0 4022aae0 +402283b1: 000dc6 j 402283ec +402283b4: 000000 ill +402283b7: 0d4d mov.n a4, a13 +402283b9: 053d mov.n a3, a5 +402283bb: 0c2d mov.n a2, a12 +402283bd: 060445 call0 4022e404 +402283c0: 000a06 j 402283ec +402283c3: 2d2200 excw +402283c6: 355000 extui a5, a0, 16, 4 +402283c9: 364520 excw +402283cc: 52dc00 excw +402283cf: 0d28 l32i.n a2, a13, 0 +402283d1: f0a032 movi a3, 240 +402283d4: 102320 and a2, a3, a2 +402283d7: e0a032 movi a3, 224 +402283da: 081237 beq a2, a3, 402283e6 +402283dd: 1ce9 s32i.n a14, a12, 4 +402283df: 230c movi.n a3, 2 +402283e1: 0c2d mov.n a2, a12 +402283e3: 05cb85 call0 4022e09c +402283e6: 202cc0 or a2, a12, a12 +402283e9: 009b45 call0 40228da0 +402283ec: ff8331 l32r a3, 402281f8 +402283ef: 00a022 movi a2, 0 +402283f2: 006322 s32i a2, a3, 0 +402283f5: ff7d31 l32r a3, 402281ec +402283f8: 0f29 s32i.n a2, a15, 0 +402283fa: 0329 s32i.n a2, a3, 0 +402283fc: 0d29 s32i.n a2, a13, 0 +402283fe: 000d06 j 40228436 +40228401: a06200 addx4 a6, a2, a0 +40228404: 793100 excw +40228407: ff .byte 0xff +40228408: 002322 l32i a2, a3, 0 +4022840b: f3e216 beqz a2, 4022834d +4022840e: 203550 or a3, a5, a5 +40228411: 2159 s32i.n a5, a1, 8 +40228413: 1169 s32i.n a6, a1, 4 +40228415: 003185 call0 40228730 +40228418: 2158 l32i.n a5, a1, 8 +4022841a: 1168 l32i.n a6, a1, 4 +4022841c: e0d256 bnez a2, 4022822d +4022841f: ff7331 l32r a3, 402281ec +40228422: 0328 l32i.n a2, a3, 0 +40228424: f0a032 movi a3, 240 +40228427: 102320 and a2, a3, a2 +4022842a: e0a032 movi a3, 224 +4022842d: 029237 bne a2, a3, 40228433 +40228430: ff7e46 j 4022822d +40228433: ffc586 j 4022834d +40228436: b108 l32i.n a0, a1, 44 +40228438: 020c movi.n a2, 0 +4022843a: a1c8 l32i.n a12, a1, 40 +4022843c: 91d8 l32i.n a13, a1, 36 +4022843e: 81e8 l32i.n a14, a1, 32 +40228440: 71f8 l32i.n a15, a1, 28 +40228442: 30c112 addi a1, a1, 48 +40228445: f00d ret.n +40228447: d8c800 excw +4022844a: fe .byte 0xfe +4022844b: 3f .byte 0x3f + +4022844c : +4022844c: b0c112 addi a1, a1, -80 +4022844f: 746060 extui a6, a6, 0, 8 +40228452: 745050 extui a5, a5, 0, 8 +40228455: 747070 extui a7, a7, 0, 8 +40228458: 1061e2 s32i a14, a1, 64 +4022845b: f1f9 s32i.n a15, a1, 60 +4022845d: 7169 s32i.n a6, a1, 28 +4022845f: 136102 s32i a0, a1, 76 +40228462: 1261c2 s32i a12, a1, 72 +40228465: 1161d2 s32i a13, a1, 68 +40228468: 5139 s32i.n a3, a1, 20 +4022846a: 6159 s32i.n a5, a1, 24 +4022846c: 4179 s32i.n a7, a1, 16 +4022846e: 02fd mov.n a15, a2 +40228470: 04ed mov.n a14, a4 +40228472: 2c1162 l16ui a6, a1, 88 +40228475: 1a5416 beqz a4, 4022861e +40228478: 061616 beqz a6, 402284dd +4022847b: 563b addi.n a5, a6, 3 +4022847d: c27c movi.n a2, -4 +4022847f: 105520 and a5, a5, a2 +40228482: f4c050 extui a12, a5, 0, 16 +40228485: 113c00 slli a3, a12, 16 +40228488: 313030 srai a3, a3, 16 +4022848b: 0f2d mov.n a2, a15 +4022848d: 8169 s32i.n a6, a1, 32 +4022848f: 14ccd2 addi a13, a12, 20 +40228492: 008845 call0 40228d18 +40228495: f4d0d0 extui a13, a13, 0, 16 +40228498: 8168 l32i.n a6, a1, 32 +4022849a: 328c beqz.n a2, 402284a1 +4022849c: e27c movi.n a2, -2 +4022849e: 006b86 j 40228650 +402284a1: 1f28 l32i.n a2, a15, 4 +402284a3: 152132 l32i a3, a1, 84 +402284a6: 064d mov.n a4, a6 +402284a8: 8169 s32i.n a6, a1, 32 +402284aa: 62da01 l32r a0, 40201014 <_irom0_text_start+0x4> +402284ad: 0000c0 callx0 a0 +402284b0: 8168 l32i.n a6, a1, 32 +402284b2: 0eb6c7 bgeu a6, a12, 402284c4 +402284b5: 1f28 l32i.n a2, a15, 4 +402284b7: c04c60 sub a4, a12, a6 +402284ba: 030c movi.n a3, 0 +402284bc: 226a add.n a2, a2, a6 +402284be: 62d401 l32r a0, 40201010 <_irom0_text_start> +402284c1: 0000c0 callx0 a0 +402284c4: 020c movi.n a2, 0 +402284c6: 4151c0 srli a5, a12, 1 +402284c9: 024d mov.n a4, a2 +402284cb: 14a257 bge a2, a5, 402284e3 +402284ce: 1f38 l32i.n a3, a15, 4 +402284d0: 903230 addx2 a3, a2, a3 +402284d3: 001332 l16ui a3, a3, 0 +402284d6: 221b addi.n a2, a2, 1 +402284d8: 443a add.n a4, a4, a3 +402284da: fffb46 j 402284cb +402284dd: 14a0d2 movi a13, 20 +402284e0: 00a042 movi a4, 0 +402284e3: 14a032 movi a3, 20 +402284e6: 0f2d mov.n a2, a15 +402284e8: 8149 s32i.n a4, a1, 32 +402284ea: 0082c5 call0 40228d18 +402284ed: 8148 l32i.n a4, a1, 32 +402284ef: fa9256 bnez a2, 4022849c +402284f2: 1f28 l32i.n a2, a15, 4 +402284f4: 6158 l32i.n a5, a1, 24 +402284f6: 4168 l32i.n a6, a1, 16 +402284f8: 084252 s8i a5, a2, 8 +402284fb: 094262 s8i a6, a2, 9 +402284fe: 0e78 l32i.n a7, a14, 0 +40228500: 799851 l32r a5, 40206b60 +40228503: 743870 extui a3, a7, 8, 8 +40228506: 7168 l32i.n a6, a1, 28 +40228508: 114232 s8i a3, a2, 17 +4022850b: 753870 extui a3, a7, 24, 8 +4022850e: 134232 s8i a3, a2, 19 +40228511: 11dda0 slli a13, a13, 6 +40228514: 203650 or a3, a6, a5 +40228517: 20dd30 or a13, a13, a3 +4022851a: 113d80 slli a3, a13, 8 +4022851d: 74d8d0 extui a13, a13, 8, 8 +40228520: 2033d0 or a3, a3, a13 +40228523: 041f62 l16ui a6, a15, 8 +40228526: f43030 extui a3, a3, 0, 16 +40228529: 415830 srli a5, a3, 8 +4022852c: ffc7d1 l32r a13, 40228448 +4022852f: 014252 s8i a5, a2, 1 +40228532: 115680 slli a5, a6, 8 +40228535: 416860 srli a6, a6, 8 +40228538: 205560 or a5, a5, a6 +4022853b: 001da2 l16ui a10, a13, 0 +4022853e: f45050 extui a5, a5, 0, 16 +40228541: 416850 srli a6, a5, 8 +40228544: f58070 extui a8, a7, 16, 16 +40228547: 11ba80 slli a11, a10, 8 +4022854a: 104272 s8i a7, a2, 16 +4022854d: 034262 s8i a6, a2, 3 +40228550: f47070 extui a7, a7, 0, 16 +40228553: 4168a0 srli a6, a10, 8 +40228556: 206b60 or a6, a11, a6 +40228559: 778a add.n a7, a7, a8 +4022855b: f46060 extui a6, a6, 0, 16 +4022855e: 024252 s8i a5, a2, 2 +40228561: 575a add.n a5, a7, a5 +40228563: 41b860 srli a11, a6, 8 +40228566: 044262 s8i a6, a2, 4 +40228569: 656a add.n a6, a5, a6 +4022856b: 4158 l32i.n a5, a1, 16 +4022856d: 0542b2 s8i a11, a2, 5 +40228570: 11b580 slli a11, a5, 8 +40228573: 6158 l32i.n a5, a1, 24 +40228575: 090c movi.n a9, 0 +40228577: 20bb50 or a11, a11, a5 +4022857a: 66ba add.n a6, a6, a11 +4022857c: 464a add.n a4, a6, a4 +4022857e: aa1b addi.n a10, a10, 1 +40228580: 4168 l32i.n a6, a1, 16 +40228582: 004232 s8i a3, a2, 0 +40228585: 124282 s8i a8, a2, 18 +40228588: 064292 s8i a9, a2, 6 +4022858b: 074292 s8i a9, a2, 7 +4022858e: 005da2 s16i a10, a13, 0 +40228591: 334a add.n a3, a3, a4 +40228593: 066666 bnei a6, 6, 4022859d +40228596: 044c movi.n a4, 64 +40228598: 064242 s8i a4, a2, 6 +4022859b: 334a add.n a3, a3, a4 +4022859d: 5148 l32i.n a4, a1, 20 +4022859f: 248c beqz.n a4, 402285a5 +402285a1: 0448 l32i.n a4, a4, 0 +402285a3: 94dc bnez.n a4, 402285c0 +402285a5: 142152 l32i a5, a1, 80 +402285a8: 040542 l8ui a4, a5, 4 +402285ab: 0c4242 s8i a4, a2, 12 +402285ae: 050542 l8ui a4, a5, 5 +402285b1: 0d4242 s8i a4, a2, 13 +402285b4: 060542 l8ui a4, a5, 6 +402285b7: 0e4242 s8i a4, a2, 14 +402285ba: 070542 l8ui a4, a5, 7 +402285bd: 000446 j 402285d2 +402285c0: 745840 extui a5, a4, 8, 8 +402285c3: 0d4252 s8i a5, a2, 13 +402285c6: 755040 extui a5, a4, 16, 8 +402285c9: 0c4242 s8i a4, a2, 12 +402285cc: 0e4252 s8i a5, a2, 14 +402285cf: 754840 extui a4, a4, 24, 8 +402285d2: 0d0252 l8ui a5, a2, 13 +402285d5: 0f4242 s8i a4, a2, 15 +402285d8: 0c0272 l8ui a7, a2, 12 +402285db: 0e0242 l8ui a4, a2, 14 +402285de: 115580 slli a5, a5, 8 +402285e1: 114400 slli a4, a4, 16 +402285e4: 206570 or a6, a5, a7 +402285e7: 205460 or a5, a4, a6 +402285ea: 0f0242 l8ui a4, a2, 15 +402285ed: 014480 slli a4, a4, 24 +402285f0: 204450 or a4, a4, a5 +402285f3: f45040 extui a5, a4, 0, 16 +402285f6: f54040 extui a4, a4, 16, 16 +402285f9: 454a add.n a4, a5, a4 +402285fb: 343a add.n a3, a4, a3 +402285fd: f54030 extui a4, a3, 16, 16 +40228600: f43030 extui a3, a3, 0, 16 +40228603: 343a add.n a3, a4, a3 +40228605: f54030 extui a4, a3, 16, 16 +40228608: 334a add.n a3, a3, a4 +4022860a: f47c movi.n a4, -1 +4022860c: 303430 xor a3, a4, a3 +4022860f: f43030 extui a3, a3, 0, 16 +40228612: 0a4232 s8i a3, a2, 10 +40228615: 413830 srli a3, a3, 8 +40228618: 0b4232 s8i a3, a2, 11 +4022861b: 0008c6 j 40228642 +4022861e: 1268 l32i.n a6, a2, 4 +40228620: 01ed mov.n a14, a1 +40228622: 110632 l8ui a3, a6, 17 +40228625: 100652 l8ui a5, a6, 16 +40228628: 120622 l8ui a2, a6, 18 +4022862b: 113380 slli a3, a3, 8 +4022862e: 112200 slli a2, a2, 16 +40228631: 204350 or a4, a3, a5 +40228634: 203240 or a3, a2, a4 +40228637: 130622 l8ui a2, a6, 19 +4022863a: 012280 slli a2, a2, 24 +4022863d: 202230 or a2, a2, a3 +40228640: 0129 s32i.n a2, a1, 0 +40228642: 142162 l32i a6, a1, 80 +40228645: 0e4d mov.n a4, a14 +40228647: 5658 l32i.n a5, a6, 20 +40228649: 0f3d mov.n a3, a15 +4022864b: 062d mov.n a2, a6 +4022864d: 0005c0 callx0 a5 +40228650: 132102 l32i a0, a1, 76 +40228653: 1221c2 l32i a12, a1, 72 +40228656: 1121d2 l32i a13, a1, 68 +40228659: 1021e2 l32i a14, a1, 64 +4022865c: f1f8 l32i.n a15, a1, 60 +4022865e: 50c112 addi a1, a1, 80 +40228661: f00d ret.n + ... + +40228664 : +40228664: e0c112 addi a1, a1, -32 +40228667: 080c movi.n a8, 0 +40228669: 2189 s32i.n a8, a1, 8 +4022866b: 1189 s32i.n a8, a1, 4 +4022866d: 8188 l32i.n a8, a1, 32 +4022866f: 747070 extui a7, a7, 0, 8 +40228672: 0189 s32i.n a8, a1, 0 +40228674: 746060 extui a6, a6, 0, 8 +40228677: 745050 extui a5, a5, 0, 8 +4022867a: 076102 s32i a0, a1, 28 +4022867d: ffdcc5 call0 4022844c +40228680: 7108 l32i.n a0, a1, 28 +40228682: 20c112 addi a1, a1, 32 +40228685: f00d ret.n + ... + +40228688 : +40228688: c0c112 addi a1, a1, -64 +4022868b: e1c9 s32i.n a12, a1, 56 +4022868d: 02cd mov.n a12, a2 +4022868f: 042d mov.n a2, a4 +40228691: d1d9 s32i.n a13, a1, 52 +40228693: c1e9 s32i.n a14, a1, 48 +40228695: b1f9 s32i.n a15, a1, 44 +40228697: 4139 s32i.n a3, a1, 16 +40228699: 5149 s32i.n a4, a1, 20 +4022869b: f109 s32i.n a0, a1, 60 +4022869d: 74d050 extui a13, a5, 0, 8 +402286a0: 74e060 extui a14, a6, 0, 8 +402286a3: 74f070 extui a15, a7, 0, 8 +402286a6: ffad45 call0 4022817c +402286a9: 028d mov.n a8, a2 +402286ab: 4138 l32i.n a3, a1, 16 +402286ad: c27c movi.n a2, -4 +402286af: 5148 l32i.n a4, a1, 20 +402286b1: b88c beqz.n a8, 402286c0 +402286b3: 0189 s32i.n a8, a1, 0 +402286b5: 0f7d mov.n a7, a15 +402286b7: 0e6d mov.n a6, a14 +402286b9: 0d5d mov.n a5, a13 +402286bb: 0c2d mov.n a2, a12 +402286bd: fffa45 call0 40228664 +402286c0: f108 l32i.n a0, a1, 60 +402286c2: e1c8 l32i.n a12, a1, 56 +402286c4: d1d8 l32i.n a13, a1, 52 +402286c6: c1e8 l32i.n a14, a1, 48 +402286c8: b1f8 l32i.n a15, a1, 44 +402286ca: 40c112 addi a1, a1, 64 +402286cd: f00d ret.n +402286cf: 055400 extui a5, a0, 20, 1 +402286d2: 23 .byte 0x23 +402286d3: 40 .byte 0x40 + +402286d4 : +402286d4: f0c112 addi a1, a1, -16 +402286d7: 028d mov.n a8, a2 +402286d9: f23921 l32r a2, 40224fc0 +402286dc: 3109 s32i.n a0, a1, 12 +402286de: 21c9 s32i.n a12, a1, 8 +402286e0: 0228 l32i.n a2, a2, 0 +402286e2: b29c beqz.n a2, 40228701 +402286e4: 390242 l8ui a4, a2, 57 +402286e7: f56407 bbci a4, 0, 402286e0 +402286ea: 1278 l32i.n a7, a2, 4 +402286ec: 0858 l32i.n a5, a8, 0 +402286ee: 2268 l32i.n a6, a2, 8 +402286f0: 305750 xor a5, a7, a5 +402286f3: 2f0567 bnone a5, a6, 40228726 +402286f6: 0348 l32i.n a4, a3, 0 +402286f8: 304740 xor a4, a7, a4 +402286fb: 270467 bnone a4, a6, 40228726 +402286fe: fff786 j 402286e0 +40228701: a53f31 l32r a3, 40211c00 +40228704: 0328 l32i.n a2, a3, 0 +40228706: 03cd mov.n a12, a3 +40228708: a29c beqz.n a2, 40228726 +4022870a: 390232 l8ui a3, a2, 57 +4022870d: 136307 bbci a3, 0, 40228724 +40228710: 024d mov.n a4, a2 +40228712: ffef21 l32r a2, 402286d0 +40228715: c7a032 movi a3, 199 +40228718: 664d01 l32r a0, 4020204c +4022871b: 0000c0 callx0 a0 +4022871e: 0c28 l32i.n a2, a12, 0 +40228720: 000086 j 40228726 +40228723: 020c00 excw +40228726: 3108 l32i.n a0, a1, 12 +40228728: 21c8 l32i.n a12, a1, 8 +4022872a: 10c112 addi a1, a1, 16 +4022872d: f00d ret.n + ... + +40228730 : +40228730: 520b addi.n a5, a2, -1 +40228732: d67c movi.n a6, -3 +40228734: 024d mov.n a4, a2 +40228736: 120c movi.n a2, 1 +40228738: 2d3657 bltu a6, a5, 40228769 +4022873b: 390352 l8ui a5, a3, 57 +4022873e: 220c movi.n a2, 2 +40228740: 102520 and a2, a5, a2 +40228743: 22ac beqz.n a2, 40228769 +40228745: 1358 l32i.n a5, a3, 4 +40228747: 020c movi.n a2, 0 +40228749: 1c1457 beq a4, a5, 40228769 +4022874c: 2338 l32i.n a3, a3, 8 +4022874e: 305450 xor a5, a4, a5 +40228751: 148537 bany a5, a3, 40228769 +40228754: f27c movi.n a2, -1 +40228756: 302230 xor a2, a2, a3 +40228759: 104420 and a4, a4, a2 +4022875c: c04420 sub a4, a4, a2 +4022875f: 130c movi.n a3, 1 +40228761: 020c movi.n a2, 0 +40228763: 832340 moveqz a2, a3, a4 +40228766: 742020 extui a2, a2, 0, 8 +40228769: f00d ret.n + ... + +4022876c : +4022876c: 014280 slli a4, a2, 24 +4022876f: 753820 extui a3, a2, 24, 8 +40228772: 205430 or a5, a4, a3 +40228775: 625e31 l32r a3, 402010f0 +40228778: 104230 and a4, a2, a3 +4022877b: 114480 slli a4, a4, 8 +4022877e: 412820 srli a2, a2, 8 +40228781: 204540 or a4, a5, a4 +40228784: 103230 and a3, a2, a3 +40228787: 202430 or a2, a4, a3 +4022878a: 66fa31 l32r a3, 40202374 +4022878d: 20a042 movi a4, 32 +40228790: 120237 bnone a2, a3, 402287a6 +40228793: 440b addi.n a4, a4, -1 +40228795: 413130 srli a3, a3, 1 +40228798: ff4456 bnez a4, 40228790 +4022879b: 000286 j 402287a9 +4022879e: 270000 excw +402287a1: 300983 excw +402287a4: 564131 l32r a3, 401fe0a8 <_lit4_end+0xf7d7c> +402287a7: 0cff63 excw +402287aa: f00d12 l8ui a1, a13, 240 +402287ad: 020c movi.n a2, 0 +402287af: f00d ret.n +402287b1: 000000 ill +402287b4: fe8034 excw +402287b7: 3f .byte 0x3f + +402287b8 : +402287b8: b0c112 addi a1, a1, -80 +402287bb: 1161d2 s32i a13, a1, 68 +402287be: f1f9 s32i.n a15, a1, 60 +402287c0: 136102 s32i a0, a1, 76 +402287c3: 1261c2 s32i a12, a1, 72 +402287c6: 1061e2 s32i a14, a1, 64 +402287c9: 024d mov.n a4, a2 +402287cb: 0002c2 l8ui a12, a2, 0 +402287ce: fff921 l32r a2, 402287b4 +402287d1: 037d mov.n a7, a3 +402287d3: 0228 l32i.n a2, a2, 0 +402287d5: 01dd mov.n a13, a1 +402287d7: 4129 s32i.n a2, a1, 16 +402287d9: 4f0c movi.n a15, 4 +402287db: 61a092 movi a9, 97 +402287de: 4158 l32i.n a5, a1, 16 +402287e0: 480c movi.n a8, 4 +402287e2: 25ca add.n a2, a5, a12 +402287e4: 010222 l8ui a2, a2, 1 +402287e7: 028287 bany a2, a8, 402287ed +402287ea: 006406 j 4022897e +402287ed: 023c movi.n a2, 48 +402287ef: ae0c movi.n a14, 10 +402287f1: 1d9c27 bne a12, a2, 40228812 +402287f4: 0104c2 l8ui a12, a4, 1 +402287f7: dfaf52 movi a5, -33 +402287fa: 103c50 and a3, a12, a5 +402287fd: 885c movi.n a8, 88 +402287ff: 241b addi.n a2, a4, 1 +40228801: 099387 bne a3, a8, 4022880e +40228804: 0204c2 l8ui a12, a4, 2 +40228807: 0e1c movi.n a14, 16 +40228809: 442b addi.n a4, a4, 2 +4022880b: 0000c6 j 40228812 +4022880e: 024d mov.n a4, a2 +40228810: 8e0c movi.n a14, 8 +40228812: 0e3d mov.n a3, a14 +40228814: f27c movi.n a2, -1 +40228816: 6149 s32i.n a4, a1, 24 +40228818: 7179 s32i.n a7, a1, 28 +4022881a: 8199 s32i.n a9, a1, 32 +4022881c: 65ac01 l32r a0, 40201ecc +4022881f: 0000c0 callx0 a0 +40228822: 026d mov.n a6, a2 +40228824: 0e3d mov.n a3, a14 +40228826: f27c movi.n a2, -1 +40228828: 5169 s32i.n a6, a1, 20 +4022882a: 642d01 l32r a0, 402018e0 +4022882d: 0000c0 callx0 a0 +40228830: 6148 l32i.n a4, a1, 24 +40228832: 5168 l32i.n a6, a1, 20 +40228834: 7178 l32i.n a7, a1, 28 +40228836: 8198 l32i.n a9, a1, 32 +40228838: 441b addi.n a4, a4, 1 +4022883a: 030c movi.n a3, 0 +4022883c: 1a4c movi.n a10, 65 +4022883e: 4158 l32i.n a5, a1, 16 +40228840: b40b addi.n a11, a4, -1 +40228842: 85ca add.n a8, a5, a12 +40228844: 010852 l8ui a5, a8, 1 +40228847: 480c movi.n a8, 4 +40228849: 1f0587 bnone a5, a8, 4022886c +4022884c: d0cc52 addi a5, a12, -48 +4022884f: 745050 extui a5, a5, 0, 8 +40228852: 02b637 bgeu a6, a3, 40228858 +40228855: 004946 j 4022897e +40228858: 059367 bne a3, a6, 40228861 +4022885b: 02a257 bge a2, a5, 40228861 +4022885e: 004706 j 4022897e +40228861: 8233e0 mull a3, a3, a14 +40228864: 33ca add.n a3, a3, a12 +40228866: d0c332 addi a3, a3, -48 +40228869: 000f06 j 402288a9 +4022886c: 41be66 bnei a14, 16, 402288b1 +4022886f: 484c movi.n a8, 68 +40228871: 3c0587 bnone a5, a8, 402288b1 +40228874: 145050 extui a5, a5, 0, 2 +40228877: fec5b2 addi a11, a5, -2 +4022887a: 208aa0 or a8, a10, a10 +4022887d: 8389b0 moveqz a8, a9, a11 +40228880: 0accc2 addi a12, a12, 10 +40228883: c0bc80 sub a11, a12, a8 +40228886: 74b0b0 extui a11, a11, 0, 8 +40228889: 02b637 bgeu a6, a3, 4022888f +4022888c: 003b86 j 4022897e +4022888f: 059367 bne a3, a6, 40228898 +40228892: 02a2b7 bge a2, a11, 40228898 +40228895: 003946 j 4022897e +40228898: fec552 addi a5, a5, -2 +4022889b: 0a8d mov.n a8, a10 +4022889d: 838950 moveqz a8, a9, a5 +402288a0: 1133c0 slli a3, a3, 4 +402288a3: c0cc80 sub a12, a12, a8 +402288a6: 203c30 or a3, a12, a3 +402288a9: 0004c2 l8ui a12, a4, 0 +402288ac: 441b addi.n a4, a4, 1 +402288ae: ffe306 j 4022883e +402288b1: e22c movi.n a2, 46 +402288b3: 139c27 bne a12, a2, 402288ca +402288b6: ff0b addi.n a15, a15, -1 +402288b8: 0c2f16 beqz a15, 4022897e +402288bb: 0d39 s32i.n a3, a13, 0 +402288bd: 4b1b addi.n a4, a11, 1 +402288bf: 010bc2 l8ui a12, a11, 1 +402288c2: dd4b addi.n a13, a13, 4 +402288c4: ffc586 j 402287de +402288c7: 000000 ill +402288ca: 6c8c beqz.n a12, 402288d4 +402288cc: 020c movi.n a2, 0 +402288ce: 02e537 bbsi a5, 3, 402288d4 +402288d1: 002ac6 j 40228980 +402288d4: c02d10 sub a2, a13, a1 +402288d7: 212220 srai a2, a2, 2 +402288da: 221b addi.n a2, a2, 1 +402288dc: 112226 beqi a2, 2, 402288f1 +402288df: 0532e6 bgei a2, 3, 402288e8 +402288e2: 09a216 beqz a2, 40228980 +402288e5: 001a86 j 40228953 +402288e8: 1e3226 beqi a2, 3, 4022890a +402288eb: 394226 beqi a2, 4, 40228928 +402288ee: 001846 j 40228953 +402288f1: 9e6341 l32r a4, 40210280 +402288f4: 020c movi.n a2, 0 +402288f6: 02b437 bgeu a4, a3, 402288fc +402288f9: 0020c6 j 40228980 +402288fc: 0148 l32i.n a4, a1, 0 +402288fe: ffa052 movi a5, 255 +40228901: 7b3547 bltu a5, a4, 40228980 +40228904: 014480 slli a4, a4, 24 +40228907: 001146 j 40228950 +4022890a: 65b841 l32r a4, 40201fec +4022890d: 020c movi.n a2, 0 +4022890f: 6d3437 bltu a4, a3, 40228980 +40228912: 0158 l32i.n a5, a1, 0 +40228914: ffa062 movi a6, 255 +40228917: 653657 bltu a6, a5, 40228980 +4022891a: 1148 l32i.n a4, a1, 4 +4022891c: 603647 bltu a6, a4, 40228980 +4022891f: 015580 slli a5, a5, 24 +40228922: 114400 slli a4, a4, 16 +40228925: 000906 j 4022894d +40228928: ffa042 movi a4, 255 +4022892b: 020c movi.n a2, 0 +4022892d: 4f3437 bltu a4, a3, 40228980 +40228930: 0168 l32i.n a6, a1, 0 +40228932: 4a3467 bltu a4, a6, 40228980 +40228935: 1158 l32i.n a5, a1, 4 +40228937: 048d mov.n a8, a4 +40228939: 433457 bltu a4, a5, 40228980 +4022893c: 2148 l32i.n a4, a1, 8 +4022893e: 3e3847 bltu a8, a4, 40228980 +40228941: 016680 slli a6, a6, 24 +40228944: 115500 slli a5, a5, 16 +40228947: 205650 or a5, a6, a5 +4022894a: 114480 slli a4, a4, 8 +4022894d: 204540 or a4, a5, a4 +40228950: 203340 or a3, a3, a4 +40228953: 120c movi.n a2, 1 +40228955: 77ac beqz.n a7, 40228980 +40228957: 014380 slli a4, a3, 24 +4022895a: 752830 extui a2, a3, 24, 8 +4022895d: 205420 or a5, a4, a2 +40228960: 61e421 l32r a2, 402010f0 +40228963: 104320 and a4, a3, a2 +40228966: 114480 slli a4, a4, 8 +40228969: 413830 srli a3, a3, 8 +4022896c: 103320 and a3, a3, a2 +4022896f: 204540 or a4, a5, a4 +40228972: 203430 or a3, a4, a3 +40228975: 0739 s32i.n a3, a7, 0 +40228977: 120c movi.n a2, 1 +40228979: 0000c6 j 40228980 +4022897c: 0c0000 excw +4022897f: 210202 l8ui a0, a2, 33 +40228982: 21c213 excw +40228985: 21d212 addmi a1, a2, 0x2100 +40228988: 21e211 l32r a1, 401f1110 <_lit4_end+0xeade4> +4022898b: f1f810 excw +4022898e: 50c112 addi a1, a1, 80 +40228991: f00d ret.n + ... + +40228994 : +40228994: e0c112 addi a1, a1, -32 +40228997: 013d mov.n a3, a1 +40228999: 7109 s32i.n a0, a1, 28 +4022899b: ffe1c5 call0 402287b8 +4022899e: 0148 l32i.n a4, a1, 0 +402289a0: f37c movi.n a3, -1 +402289a2: 7108 l32i.n a0, a1, 28 +402289a4: 933420 movnez a3, a4, a2 +402289a7: 032d mov.n a2, a3 +402289a9: 20c112 addi a1, a1, 32 +402289ac: f00d ret.n + ... + +402289b0 : +402289b0: 0228 l32i.n a2, a2, 0 +402289b2: b0c112 addi a1, a1, -80 +402289b5: 1161d2 s32i a13, a1, 68 +402289b8: 1061e2 s32i a14, a1, 64 +402289bb: f1f9 s32i.n a15, a1, 60 +402289bd: 136102 s32i a0, a1, 76 +402289c0: 1261c2 s32i a12, a1, 72 +402289c3: 03dd mov.n a13, a3 +402289c5: 0129 s32i.n a2, a1, 0 +402289c7: 036d mov.n a6, a3 +402289c9: 4e0c movi.n a14, 4 +402289cb: 0f0c movi.n a15, 0 +402289cd: 015d mov.n a5, a1 +402289cf: ffa092 movi a9, 255 +402289d2: 2ea072 movi a7, 46 +402289d5: 0005a2 l8ui a10, a5, 0 +402289d8: 0c0c movi.n a12, 0 +402289da: a30c movi.n a3, 10 +402289dc: 0a2d mov.n a2, a10 +402289de: 7149 s32i.n a4, a1, 28 +402289e0: 5159 s32i.n a5, a1, 20 +402289e2: 6169 s32i.n a6, a1, 24 +402289e4: 9179 s32i.n a7, a1, 36 +402289e6: 8199 s32i.n a9, a1, 32 +402289e8: 41a9 s32i.n a10, a1, 16 +402289ea: 63bd01 l32r a0, 402018e0 +402289ed: 0000c0 callx0 a0 +402289f0: 41a8 l32i.n a10, a1, 16 +402289f2: 74b020 extui a11, a2, 0, 8 +402289f5: a30c movi.n a3, 10 +402289f7: 0a2d mov.n a2, a10 +402289f9: 41b9 s32i.n a11, a1, 16 +402289fb: 653401 l32r a0, 40201ecc +402289fe: 0000c0 callx0 a0 +40228a01: 41b8 l32i.n a11, a1, 16 +40228a03: 814b addi.n a8, a1, 4 +40228a05: 30cbb2 addi a11, a11, 48 +40228a08: 38ca add.n a3, a8, a12 +40228a0a: 0043b2 s8i a11, a3, 0 +40228a0d: 74a020 extui a10, a2, 0, 8 +40228a10: 2c1b addi.n a2, a12, 1 +40228a12: 742020 extui a2, a2, 0, 8 +40228a15: 7148 l32i.n a4, a1, 28 +40228a17: 5158 l32i.n a5, a1, 20 +40228a19: 6168 l32i.n a6, a1, 24 +40228a1b: 9178 l32i.n a7, a1, 36 +40228a1d: 8198 l32i.n a9, a1, 32 +40228a1f: 3a8c beqz.n a10, 40228a26 +40228a21: 02cd mov.n a12, a2 +40228a23: ffecc6 j 402289da +40228a26: 020c movi.n a2, 0 +40228a28: 004522 s8i a2, a5, 0 +40228a2b: 063d mov.n a3, a6 +40228a2d: c0ff60 sub a15, a15, a6 +40228a30: 2f3a add.n a2, a15, a3 +40228a32: 181c97 beq a12, a9, 40228a4e +40228a35: 6c0b addi.n a6, a12, -1 +40228a37: 746060 extui a6, a6, 0, 8 +40228a3a: 2ea247 bge a2, a4, 40228a6c +40228a3d: 814b addi.n a8, a1, 4 +40228a3f: c8ca add.n a12, a8, a12 +40228a41: 000c22 l8ui a2, a12, 0 +40228a44: 06cd mov.n a12, a6 +40228a46: 004322 s8i a2, a3, 0 +40228a49: 331b addi.n a3, a3, 1 +40228a4b: fff846 j 40228a30 +40228a4e: f21b addi.n a15, a2, 1 +40228a50: 18a247 bge a2, a4, 40228a6c +40228a53: ee0b addi.n a14, a14, -1 +40228a55: 004372 s8i a7, a3, 0 +40228a58: 74e0e0 extui a14, a14, 0, 8 +40228a5b: 631b addi.n a6, a3, 1 +40228a5d: 551b addi.n a5, a5, 1 +40228a5f: f72e56 bnez a14, 402289d5 +40228a62: 020c movi.n a2, 0 +40228a64: 004322 s8i a2, a3, 0 +40228a67: 0d2d mov.n a2, a13 +40228a69: 000046 j 40228a6e +40228a6c: 020c movi.n a2, 0 +40228a6e: 132102 l32i a0, a1, 76 +40228a71: 1221c2 l32i a12, a1, 72 +40228a74: 1121d2 l32i a13, a1, 68 +40228a77: 1021e2 l32i a14, a1, 64 +40228a7a: f1f8 l32i.n a15, a1, 60 +40228a7c: 50c112 addi a1, a1, 80 +40228a7f: f00d ret.n +40228a81: 000000 ill +40228a84: d8ca add.n a13, a8, a12 +40228a86: fe .byte 0xfe +40228a87: 3f .byte 0x3f + +40228a88 : +40228a88: ffff31 l32r a3, 40228a84 +40228a8b: f0c112 addi a1, a1, -16 +40228a8e: 041c movi.n a4, 16 +40228a90: 3109 s32i.n a0, a1, 12 +40228a92: fff1c5 call0 402289b0 +40228a95: 3108 l32i.n a0, a1, 12 +40228a97: 10c112 addi a1, a1, 16 +40228a9a: f00d ret.n + +40228a9c : +40228a9c: f00d ret.n + ... + +40228aa0 : +40228aa0: 030c movi.n a3, 0 +40228aa2: 271237 beq a2, a3, 40228acd +40228aa5: 020242 l8ui a4, a2, 2 +40228aa8: f14631 l32r a3, 40224fc0 +40228aab: d0c442 addi a4, a4, -48 +40228aae: 744040 extui a4, a4, 0, 8 +40228ab1: 0338 l32i.n a3, a3, 0 +40228ab3: 639c beqz.n a3, 40228acd +40228ab5: 3c0352 l8ui a5, a3, 60 +40228ab8: f59547 bne a5, a4, 40228ab1 +40228abb: 000262 l8ui a6, a2, 0 +40228abe: 3a0352 l8ui a5, a3, 58 +40228ac1: ec9657 bne a6, a5, 40228ab1 +40228ac4: 010262 l8ui a6, a2, 1 +40228ac7: 3b0352 l8ui a5, a3, 59 +40228aca: e39657 bne a6, a5, 40228ab1 +40228acd: 032d mov.n a2, a3 +40228acf: f00d ret.n +40228ad1: 000000 ill + +40228ad4 : +40228ad4: a44b31 l32r a3, 40211c00 +40228ad7: 0329 s32i.n a2, a3, 0 +40228ad9: f00d ret.n + ... + +40228adc : +40228adc: f0c112 addi a1, a1, -16 +40228adf: 0261c2 s32i a12, a1, 8 +40228ae2: 0161d2 s32i a13, a1, 4 +40228ae5: 036102 s32i a0, a1, 12 +40228ae8: 02dd mov.n a13, a2 +40228aea: 01e9 s32i.n a14, a1, 0 +40228aec: 020c movi.n a2, 0 +40228aee: 03cd mov.n a12, a3 +40228af0: 3c1327 beq a3, a2, 40228b30 +40228af3: 0338 l32i.n a3, a3, 0 +40228af5: 1d28 l32i.n a2, a13, 4 +40228af7: 331327 beq a3, a2, 40228b2e +40228afa: 639221 l32r a2, 40201944 +40228afd: 0228 l32i.n a2, a2, 0 +40228aff: 129c beqz.n a2, 40228b14 +40228b01: 0248 l32i.n a4, a2, 0 +40228b03: 1d38 l32i.n a3, a13, 4 +40228b05: 32e8 l32i.n a14, a2, 12 +40228b07: 029437 bne a4, a3, 40228b0d +40228b0a: 012d45 call0 40229de0 +40228b0d: 0e2d mov.n a2, a14 +40228b0f: fffb06 j 40228aff +40228b12: 210000 srai a0, a0, 0 +40228b15: 286391 l32r a9, 401f2ca4 <_lit4_end+0xec978> +40228b18: 129c02 l16si a0, a12, 36 +40228b1b: 0238 l32i.n a3, a2, 0 +40228b1d: 738c beqz.n a3, 40228b28 +40228b1f: 1d48 l32i.n a4, a13, 4 +40228b21: 039347 bne a3, a4, 40228b28 +40228b24: 0c38 l32i.n a3, a12, 0 +40228b26: 0239 s32i.n a3, a2, 0 +40228b28: 3228 l32i.n a2, a2, 12 +40228b2a: fffac6 j 40228b19 +40228b2d: 0c2800 excw +40228b30: 3108 l32i.n a0, a1, 12 +40228b32: 1d29 s32i.n a2, a13, 4 +40228b34: 21c8 l32i.n a12, a1, 8 +40228b36: 11d8 l32i.n a13, a1, 4 +40228b38: 01e8 l32i.n a14, a1, 0 +40228b3a: 10c112 addi a1, a1, 16 +40228b3d: f00d ret.n + ... + +40228b40 : +40228b40: f0c112 addi a1, a1, -16 +40228b43: 21c9 s32i.n a12, a1, 8 +40228b45: 11d9 s32i.n a13, a1, 4 +40228b47: 01e9 s32i.n a14, a1, 0 +40228b49: 02cd mov.n a12, a2 +40228b4b: 3109 s32i.n a0, a1, 12 +40228b4d: 04ed mov.n a14, a4 +40228b4f: 20d550 or a13, a5, a5 +40228b52: fff885 call0 40228adc +40228b55: 020c movi.n a2, 0 +40228b57: 011e27 beq a14, a2, 40228b5c +40228b5a: 0e28 l32i.n a2, a14, 0 +40228b5c: 2c29 s32i.n a2, a12, 8 +40228b5e: 020c movi.n a2, 0 +40228b60: 011d27 beq a13, a2, 40228b65 +40228b63: 0d28 l32i.n a2, a13, 0 +40228b65: 3108 l32i.n a0, a1, 12 +40228b67: 3c29 s32i.n a2, a12, 12 +40228b69: 11d8 l32i.n a13, a1, 4 +40228b6b: 21c8 l32i.n a12, a1, 8 +40228b6d: 01e8 l32i.n a14, a1, 0 +40228b6f: 10c112 addi a1, a1, 16 +40228b72: f00d ret.n +40228b74: d8da add.n a13, a8, a13 +40228b76: fe .byte 0xfe +40228b77: 3f .byte 0x3f + +40228b78 : +40228b78: f0c112 addi a1, a1, -16 +40228b7b: 21c9 s32i.n a12, a1, 8 +40228b7d: 11d9 s32i.n a13, a1, 4 +40228b7f: 01e9 s32i.n a14, a1, 0 +40228b81: 3109 s32i.n a0, a1, 12 +40228b83: 7269 s32i.n a6, a2, 28 +40228b85: fffb61 l32r a6, 40228b74 +40228b88: 0d0c movi.n a13, 0 +40228b8a: 02cd mov.n a12, a2 +40228b8c: 12d9 s32i.n a13, a2, 4 +40228b8e: 22d9 s32i.n a13, a2, 8 +40228b90: 32d9 s32i.n a13, a2, 12 +40228b92: 3942d2 s8i a13, a2, 57 +40228b95: 82d9 s32i.n a13, a2, 32 +40228b97: 92d9 s32i.n a13, a2, 36 +40228b99: 1062d2 s32i a13, a2, 64 +40228b9c: 000622 l8ui a2, a6, 0 +40228b9f: 07ed mov.n a14, a7 +40228ba1: 3c4c22 s8i a2, a12, 60 +40228ba4: 721b addi.n a7, a2, 1 +40228ba6: 4128 l32i.n a2, a1, 16 +40228ba8: 004672 s8i a7, a6, 0 +40228bab: 4c29 s32i.n a2, a12, 16 +40228bad: 202cc0 or a2, a12, a12 +40228bb0: fff8c5 call0 40228b40 +40228bb3: 0c2d mov.n a2, a12 +40228bb5: 000ec0 callx0 a14 +40228bb8: 1892d7 bne a2, a13, 40228bd4 +40228bbb: f10121 l32r a2, 40224fc0 +40228bbe: 0cdd mov.n a13, a12 +40228bc0: 0238 l32i.n a3, a2, 0 +40228bc2: 0c39 s32i.n a3, a12, 0 +40228bc4: 02c9 s32i.n a12, a2, 0 +40228bc6: 390c22 l8ui a2, a12, 57 +40228bc9: 012280 slli a2, a2, 24 +40228bcc: 0042d6 bgez a2, 40228bd4 +40228bcf: 0c2d mov.n a2, a12 +40228bd1: 057e85 call0 4022e3bc +40228bd4: 3108 l32i.n a0, a1, 12 +40228bd6: 0d2d mov.n a2, a13 +40228bd8: 21c8 l32i.n a12, a1, 8 +40228bda: 11d8 l32i.n a13, a1, 4 +40228bdc: 01e8 l32i.n a14, a1, 0 +40228bde: 10c112 addi a1, a1, 16 +40228be1: f00d ret.n + ... + +40228be4 : +40228be4: 040c movi.n a4, 0 +40228be6: 021347 beq a3, a4, 40228bec +40228be9: 002342 l32i a4, a3, 0 +40228bec: 2249 s32i.n a4, a2, 8 +40228bee: f00d ret.n + +40228bf0 : +40228bf0: 040c movi.n a4, 0 +40228bf2: 021347 beq a3, a4, 40228bf8 +40228bf5: 002342 l32i a4, a3, 0 +40228bf8: 3249 s32i.n a4, a2, 12 +40228bfa: f00d ret.n + +40228bfc : +40228bfc: f0c112 addi a1, a1, -16 +40228bff: 21c9 s32i.n a12, a1, 8 +40228c01: 3109 s32i.n a0, a1, 12 +40228c03: 02cd mov.n a12, a2 +40228c05: 390222 l8ui a2, a2, 57 +40228c08: 22e207 bbsi a2, 0, 40228c2e +40228c0b: 130c movi.n a3, 1 +40228c0d: 203230 or a3, a2, a3 +40228c10: 394c32 s8i a3, a12, 57 +40228c13: 176247 bbci a2, 4, 40228c2e +40228c16: 066257 bbci a2, 5, 40228c20 +40228c19: 3c4b addi.n a3, a12, 4 +40228c1b: 0c2d mov.n a2, a12 +40228c1d: feeb05 call0 40227ad0 +40228c20: 390c22 l8ui a2, a12, 57 +40228c23: 012280 slli a2, a2, 24 +40228c26: 0042d6 bgez a2, 40228c2e +40228c29: 0c2d mov.n a2, a12 +40228c2b: 056e85 call0 4022e314 +40228c2e: 3108 l32i.n a0, a1, 12 +40228c30: 21c8 l32i.n a12, a1, 8 +40228c32: 10c112 addi a1, a1, 16 +40228c35: f00d ret.n + ... + +40228c38 : +40228c38: f0c112 addi a1, a1, -16 +40228c3b: 036102 s32i a0, a1, 12 +40228c3e: 014216 beqz a2, 40228c56 +40228c41: 390232 l8ui a3, a2, 57 +40228c44: 0e6307 bbci a3, 0, 40228c56 +40228c47: feaf42 movi a4, -2 +40228c4a: 104340 and a4, a3, a4 +40228c4d: 394242 s8i a4, a2, 57 +40228c50: 026357 bbci a3, 5, 40228c56 +40228c53: ff4a45 call0 402280f8 +40228c56: 3108 l32i.n a0, a1, 12 +40228c58: 10c112 addi a1, a1, 16 +40228c5b: f00d ret.n +40228c5d: 000000 ill + +40228c60 : +40228c60: f0c112 addi a1, a1, -16 +40228c63: 0261c2 s32i a12, a1, 8 +40228c66: 036102 s32i a0, a1, 12 +40228c69: 20c220 or a12, a2, a2 +40228c6c: 041216 beqz a2, 40228cb1 +40228c6f: 390222 l8ui a2, a2, 57 +40228c72: 012280 slli a2, a2, 24 +40228c75: 0042d6 bgez a2, 40228c7d +40228c78: 0c2d mov.n a2, a12 +40228c7a: 056285 call0 4022e2a4 +40228c7d: 390c22 l8ui a2, a12, 57 +40228c80: 046207 bbci a2, 0, 40228c88 +40228c83: 0c2d mov.n a2, a12 +40228c85: fffb05 call0 40228c38 +40228c88: f0ce31 l32r a3, 40224fc0 +40228c8b: 0328 l32i.n a2, a3, 0 +40228c8d: 099c27 bne a12, a2, 40228c9a +40228c90: 0c28 l32i.n a2, a12, 0 +40228c92: 0329 s32i.n a2, a3, 0 +40228c94: 000346 j 40228ca5 +40228c97: 032d00 excw +40228c9a: 329c beqz.n a2, 40228cb1 +40228c9c: 0238 l32i.n a3, a2, 0 +40228c9e: f69c37 bne a12, a3, 40228c98 +40228ca1: 0c38 l32i.n a3, a12, 0 +40228ca3: 0239 s32i.n a3, a2, 0 +40228ca5: a3d621 l32r a2, 40211c00 +40228ca8: 0238 l32i.n a3, a2, 0 +40228caa: 039c37 bne a12, a3, 40228cb1 +40228cad: 030c movi.n a3, 0 +40228caf: 0239 s32i.n a3, a2, 0 +40228cb1: 3108 l32i.n a0, a1, 12 +40228cb3: 21c8 l32i.n a12, a1, 8 +40228cb5: 10c112 addi a1, a1, 16 +40228cb8: f00d ret.n + ... + +40228cbc : +40228cbc: f0c112 addi a1, a1, -16 +40228cbf: 21c9 s32i.n a12, a1, 8 +40228cc1: 3109 s32i.n a0, a1, 12 +40228cc3: 390232 l8ui a3, a2, 57 +40228cc6: 02cd mov.n a12, a2 +40228cc8: 021c movi.n a2, 16 +40228cca: 308327 bany a3, a2, 40228cfe +40228ccd: 202320 or a2, a3, a2 +40228cd0: 394c22 s8i a2, a12, 57 +40228cd3: 8c28 l32i.n a2, a12, 32 +40228cd5: 004216 beqz a2, 40228cdd +40228cd8: 0c2d mov.n a2, a12 +40228cda: fc00c5 call0 40224ce8 +40228cdd: 390c22 l8ui a2, a12, 57 +40228ce0: 1a6207 bbci a2, 0, 40228cfe +40228ce3: 066257 bbci a2, 5, 40228ced +40228ce6: 3c4b addi.n a3, a12, 4 +40228ce8: 0c2d mov.n a2, a12 +40228cea: fede45 call0 40227ad0 +40228ced: 390c22 l8ui a2, a12, 57 +40228cf0: 012280 slli a2, a2, 24 +40228cf3: 0072d6 bgez a2, 40228cfe +40228cf6: 0c2d mov.n a2, a12 +40228cf8: 201110 or a1, a1, a1 +40228cfb: 056185 call0 4022e314 +40228cfe: 3108 l32i.n a0, a1, 12 +40228d00: 21c8 l32i.n a12, a1, 8 +40228d02: 10c112 addi a1, a1, 16 +40228d05: f00d ret.n + ... + +40228d08 : +40228d08: 390242 l8ui a4, a2, 57 +40228d0b: 076447 bbci a4, 4, 40228d16 +40228d0e: f36c movi.n a3, -17 +40228d10: 103430 and a3, a4, a3 +40228d13: 394232 s8i a3, a2, 57 +40228d16: f00d ret.n + +40228d18 : +40228d18: 113300 slli a3, a3, 16 +40228d1b: 313030 srai a3, a3, 16 +40228d1e: 068316 beqz a3, 40228d8a +40228d21: 065216 beqz a2, 40228d8a +40228d24: 0103d6 bgez a3, 40228d38 +40228d27: 606030 neg a6, a3 +40228d2a: 051242 l16ui a4, a2, 10 +40228d2d: f46060 extui a6, a6, 0, 16 +40228d30: 150c movi.n a5, 1 +40228d32: 563467 bltu a4, a6, 40228d8c +40228d35: 000086 j 40228d3b +40228d38: f46030 extui a6, a3, 0, 16 +40228d3b: 0c0272 l8ui a7, a2, 12 +40228d3e: 1248 l32i.n a4, a2, 4 +40228d40: 178c beqz.n a7, 40228d45 +40228d42: 133766 bnei a7, 3, 40228d59 +40228d45: c05430 sub a5, a4, a3 +40228d48: 1259 s32i.n a5, a2, 4 +40228d4a: 38c262 addi a6, a2, 56 +40228d4d: 25b567 bgeu a5, a6, 40228d76 +40228d50: 1249 s32i.n a4, a2, 4 +40228d52: 150c movi.n a5, 1 +40228d54: 000d06 j 40228d8c +40228d57: 0b0000 excw +40228d5a: 808087 bany a0, a8, 40228cde +40228d5d: 150cf4 excw +40228d60: 2828f6 bgeui a8, 2, 40228d8c +40228d63: 0053d6 bgez a3, 40228d6c +40228d66: 051252 l16ui a5, a2, 10 +40228d69: 04b567 bgeu a5, a6, 40228d71 +40228d6c: 150c movi.n a5, 1 +40228d6e: 1a2766 bnei a7, 2, 40228d8c +40228d71: c04430 sub a4, a4, a3 +40228d74: 1249 s32i.n a4, a2, 4 +40228d76: 051242 l16ui a4, a2, 10 +40228d79: f43030 extui a3, a3, 0, 16 +40228d7c: 434a add.n a4, a3, a4 +40228d7e: 055242 s16i a4, a2, 10 +40228d81: 041242 l16ui a4, a2, 8 +40228d84: 803340 add a3, a3, a4 +40228d87: 045232 s16i a3, a2, 8 +40228d8a: 050c movi.n a5, 0 +40228d8c: 052d mov.n a2, a5 +40228d8e: f00d ret.n + +40228d90 : +40228d90: 628c beqz.n a2, 40228d9a +40228d92: 071232 l16ui a3, a2, 14 +40228d95: 331b addi.n a3, a3, 1 +40228d97: 075232 s16i a3, a2, 14 +40228d9a: f00d ret.n +40228d9c: fe8863 excw +40228d9f: 3f .byte 0x3f + +40228da0 : +40228da0: e0c112 addi a1, a1, -32 +40228da3: 61c9 s32i.n a12, a1, 24 +40228da5: 51d9 s32i.n a13, a1, 20 +40228da7: 41e9 s32i.n a14, a1, 16 +40228da9: 02dd mov.n a13, a2 +40228dab: 7109 s32i.n a0, a1, 28 +40228dad: 020c movi.n a2, 0 +40228daf: 31f9 s32i.n a15, a1, 12 +40228db1: 02cd mov.n a12, a2 +40228db3: fffae1 l32r a14, 40228d9c +40228db6: 4a1d27 beq a13, a2, 40228e04 +40228db9: 071d22 l16ui a2, a13, 14 +40228dbc: ffc222 addi a2, a2, -1 +40228dbf: f42020 extui a2, a2, 0, 16 +40228dc2: 075d22 s16i a2, a13, 14 +40228dc5: 92fc bnez.n a2, 40228e02 +40228dc7: 0c0d22 l8ui a2, a13, 12 +40228dca: 0df8 l32i.n a15, a13, 0 +40228dcc: e9a242 movi a4, 0x2e9 +40228dcf: 163226 beqi a2, 3, 40228de9 +40228dd2: ffc232 addi a3, a2, -1 +40228dd5: f43030 extui a3, a3, 0, 16 +40228dd8: 0523b6 bltui a3, 2, 40228de1 +40228ddb: f6a242 movi a4, 0x2f6 +40228dde: 074266 bnei a2, 4, 40228de9 +40228de1: 4d28 l32i.n a2, a13, 16 +40228de3: e76f85 call0 402104dc +40228de6: f3a242 movi a4, 0x2f3 +40228de9: 0e3d mov.n a3, a14 +40228deb: 0d2d mov.n a2, a13 +40228ded: cc1b addi.n a12, a12, 1 +40228def: 61c601 l32r a0, 40201508 +40228df2: 0000c0 callx0 a0 +40228df5: 74c0c0 extui a12, a12, 0, 8 +40228df8: 6f8c beqz.n a15, 40228e02 +40228dfa: 0fdd mov.n a13, a15 +40228dfc: ffee46 j 40228db9 +40228dff: 000000 ill +40228e02: 0c2d mov.n a2, a12 +40228e04: 7108 l32i.n a0, a1, 28 +40228e06: 61c8 l32i.n a12, a1, 24 +40228e08: 51d8 l32i.n a13, a1, 20 +40228e0a: 41e8 l32i.n a14, a1, 16 +40228e0c: 31f8 l32i.n a15, a1, 12 +40228e0e: 20c112 addi a1, a1, 32 +40228e11: f00d ret.n + ... + +40228e14 : +40228e14: d0c112 addi a1, a1, -48 +40228e17: 81e9 s32i.n a14, a1, 32 +40228e19: 71f9 s32i.n a15, a1, 28 +40228e1b: b109 s32i.n a0, a1, 44 +40228e1d: a1c9 s32i.n a12, a1, 40 +40228e1f: 91d9 s32i.n a13, a1, 36 +40228e21: 04ed mov.n a14, a4 +40228e23: f4f030 extui a15, a3, 0, 16 +40228e26: 141226 beqi a2, 1, 40228e3e +40228e29: c28c beqz.n a2, 40228e39 +40228e2b: 172226 beqi a2, 2, 40228e46 +40228e2e: 023226 beqi a2, 3, 40228e34 +40228e31: 0054c6 j 40228f88 +40228e34: 4d2c movi.n a13, 36 +40228e36: 000506 j 40228e4e +40228e39: 4d1c movi.n a13, 20 +40228e3b: 000046 j 40228e40 +40228e3e: 0d0c movi.n a13, 0 +40228e40: 14cdd2 addi a13, a13, 20 +40228e43: 000046 j 40228e48 +40228e46: 0d0c movi.n a13, 0 +40228e48: 32cdd2 addi a13, a13, 50 +40228e4b: f4d0d0 extui a13, a13, 0, 16 +40228e4e: 063ef6 bgeui a14, 3, 40228e58 +40228e51: 0fce56 bnez a14, 40228f51 +40228e54: 002e86 j 40228f12 +40228e57: 3e2600 excw +40228e5a: 6608 l32i.n a0, a6, 24 +40228e5c: 4e .byte 0x4e +40228e5d: 3bc602 addi a0, a6, 59 +40228e60: 48c600 excw +40228e63: 6c2100 excw +40228e66: e1fb addi.n a14, a1, 15 +40228e68: ffcd excw +40228e6a: 9228 l32i.n a2, a2, 36 +40228e6c: 050c movi.n a5, 0 +40228e6e: 29a142 movi a4, 0x129 +40228e71: 0e3d mov.n a3, a14 +40228e73: 006122 s32i a2, a1, 0 +40228e76: 61a301 l32r a0, 40201504 +40228e79: 0000c0 callx0 a0 +40228e7c: 02cd mov.n a12, a2 +40228e7e: 106216 beqz a2, 40228f88 +40228e81: 320c movi.n a2, 3 +40228e83: 0c4c22 s8i a2, a12, 12 +40228e86: 020c movi.n a2, 0 +40228e88: 0c29 s32i.n a2, a12, 0 +40228e8a: 2cda add.n a2, a12, a13 +40228e8c: c37c movi.n a3, -4 +40228e8e: 17c222 addi a2, a2, 23 +40228e91: 102230 and a2, a2, a3 +40228e94: dd3b addi.n a13, a13, 3 +40228e96: 1c29 s32i.n a2, a12, 4 +40228e98: 10dd30 and a13, a13, a3 +40228e9b: eca522 movi a2, 0x5ec +40228e9e: 045cf2 s16i a15, a12, 8 +40228ea1: c0d2d0 sub a13, a2, a13 +40228ea4: 02afd7 bge a15, a13, 40228eaa +40228ea7: 20dff0 or a13, a15, a15 +40228eaa: 120c movi.n a2, 1 +40228eac: 055cd2 s16i a13, a12, 10 +40228eaf: 075c22 s16i a2, a12, 14 +40228eb2: c0dfd0 sub a13, a15, a13 +40228eb5: 370c movi.n a7, 3 +40228eb7: 0cfd mov.n a15, a12 +40228eb9: 080c movi.n a8, 0 +40228ebb: 021de6 bgei a13, 1, 40228ec1 +40228ebe: 002d86 j 40228f78 +40228ec1: 0128 l32i.n a2, a1, 0 +40228ec3: 050c movi.n a5, 0 +40228ec5: 4aa142 movi a4, 0x14a +40228ec8: 0e3d mov.n a3, a14 +40228eca: 1179 s32i.n a7, a1, 4 +40228ecc: 026182 s32i a8, a1, 8 +40228ecf: 618d01 l32r a0, 40201504 +40228ed2: 0000c0 callx0 a0 +40228ed5: 1178 l32i.n a7, a1, 4 +40228ed7: 2188 l32i.n a8, a1, 8 +40228ed9: 72cc bnez.n a2, 40228ee4 +40228edb: 0c2d mov.n a2, a12 +40228edd: ffec05 call0 40228da0 +40228ee0: 002906 j 40228f88 +40228ee3: 030c00 excw +40228ee6: 0239 s32i.n a3, a2, 0 +40228ee8: 0c4272 s8i a7, a2, 12 +40228eeb: 0d4282 s8i a8, a2, 13 +40228eee: 0f29 s32i.n a2, a15, 0 +40228ef0: 0452d2 s16i a13, a2, 8 +40228ef3: eca542 movi a4, 0x5ec +40228ef6: 0d3d mov.n a3, a13 +40228ef8: 01a4d7 bge a4, a13, 40228efd +40228efb: 043d mov.n a3, a4 +40228efd: 14c242 addi a4, a2, 20 +40228f00: 1249 s32i.n a4, a2, 4 +40228f02: 140c movi.n a4, 1 +40228f04: 055232 s16i a3, a2, 10 +40228f07: 075242 s16i a4, a2, 14 +40228f0a: c0dd30 sub a13, a13, a3 +40228f0d: 02fd mov.n a15, a2 +40228f0f: ffea06 j 40228ebb +40228f12: ce7c movi.n a14, -4 +40228f14: 17cd72 addi a7, a13, 23 +40228f17: 2f3b addi.n a2, a15, 3 +40228f19: 1077e0 and a7, a7, a14 +40228f1c: 1022e0 and a2, a2, a14 +40228f1f: ff9f31 l32r a3, 40228d9c +40228f22: 050c movi.n a5, 0 +40228f24: 6ea142 movi a4, 0x16e +40228f27: 802720 add a2, a7, a2 +40228f2a: 617601 l32r a0, 40201504 +40228f2d: 0000c0 callx0 a0 +40228f30: 02cd mov.n a12, a2 +40228f32: 052216 beqz a2, 40228f88 +40228f35: 22da add.n a2, a2, a13 +40228f37: 17c222 addi a2, a2, 23 +40228f3a: 1022e0 and a2, a2, a14 +40228f3d: 1c29 s32i.n a2, a12, 4 +40228f3f: 020c movi.n a2, 0 +40228f41: 045cf2 s16i a15, a12, 8 +40228f44: 055cf2 s16i a15, a12, 10 +40228f47: 0c29 s32i.n a2, a12, 0 +40228f49: 0c4c22 s8i a2, a12, 12 +40228f4c: 4c29 s32i.n a2, a12, 16 +40228f4e: 000986 j 40228f78 +40228f51: fb3021 l32r a2, 40227c14 +40228f54: ff9231 l32r a3, 40228d9c +40228f57: 8228 l32i.n a2, a2, 32 +40228f59: 00a052 movi a5, 0 +40228f5c: 84a142 movi a4, 0x184 +40228f5f: 616901 l32r a0, 40201504 +40228f62: 0000c0 callx0 a0 +40228f65: 02cd mov.n a12, a2 +40228f67: d29c beqz.n a2, 40228f88 +40228f69: 020c movi.n a2, 0 +40228f6b: 1c29 s32i.n a2, a12, 4 +40228f6d: 045cf2 s16i a15, a12, 8 +40228f70: 055cf2 s16i a15, a12, 10 +40228f73: 0c29 s32i.n a2, a12, 0 +40228f75: 0c4ce2 s8i a14, a12, 12 +40228f78: 120c movi.n a2, 1 +40228f7a: 075c22 s16i a2, a12, 14 +40228f7d: 020c movi.n a2, 0 +40228f7f: 0d4c22 s8i a2, a12, 13 +40228f82: 0c2d mov.n a2, a12 +40228f84: 000086 j 40228f8a +40228f87: 020c00 excw +40228f8a: b108 l32i.n a0, a1, 44 +40228f8c: a1c8 l32i.n a12, a1, 40 +40228f8e: 91d8 l32i.n a13, a1, 36 +40228f90: 81e8 l32i.n a14, a1, 32 +40228f92: 71f8 l32i.n a15, a1, 28 +40228f94: 30c112 addi a1, a1, 48 +40228f97: f00d ret.n +40228f99: 000000 ill + +40228f9c : +40228f9c: f0c112 addi a1, a1, -16 +40228f9f: 041262 l16ui a6, a2, 8 +40228fa2: 21c9 s32i.n a12, a1, 8 +40228fa4: f43030 extui a3, a3, 0, 16 +40228fa7: 3109 s32i.n a0, a1, 12 +40228fa9: 02cd mov.n a12, a2 +40228fab: 034d mov.n a4, a3 +40228fad: 2fb367 bgeu a3, a6, 40228fe0 +40228fb0: 051c52 l16ui a5, a12, 10 +40228fb3: 0c28 l32i.n a2, a12, 0 +40228fb5: 18b547 bgeu a5, a4, 40228fd1 +40228fb8: c04450 sub a4, a4, a5 +40228fbb: 041c52 l16ui a5, a12, 8 +40228fbe: f44040 extui a4, a4, 0, 16 +40228fc1: c05560 sub a5, a5, a6 +40228fc4: 535a add.n a5, a3, a5 +40228fc6: 045c52 s16i a5, a12, 8 +40228fc9: 02cd mov.n a12, a2 +40228fcb: fff846 j 40228fb0 +40228fce: 000000 ill +40228fd1: 055c42 s16i a4, a12, 10 +40228fd4: 045c42 s16i a4, a12, 8 +40228fd7: 128c beqz.n a2, 40228fdc +40228fd9: ffdc45 call0 40228da0 +40228fdc: 020c movi.n a2, 0 +40228fde: 0c29 s32i.n a2, a12, 0 +40228fe0: 3108 l32i.n a0, a1, 12 +40228fe2: 21c8 l32i.n a12, a1, 8 +40228fe4: 10c112 addi a1, a1, 16 +40228fe7: f00d ret.n +40228fe9: 000000 ill + +40228fec : +40228fec: 024d mov.n a4, a2 +40228fee: 020c movi.n a2, 0 +40228ff0: 848c beqz.n a4, 40228ffc +40228ff2: 321b addi.n a3, a2, 1 +40228ff4: 742030 extui a2, a3, 0, 8 +40228ff7: 0448 l32i.n a4, a4, 0 +40228ff9: fffcc6 j 40228ff0 +40228ffc: f00d ret.n + ... + +40229000 : +40229000: 629c beqz.n a2, 4022901a +40229002: 439c beqz.n a3, 4022901a +40229004: 041252 l16ui a5, a2, 8 +40229007: 041342 l16ui a4, a3, 8 +4022900a: 0268 l32i.n a6, a2, 0 +4022900c: 454a add.n a4, a5, a4 +4022900e: 045242 s16i a4, a2, 8 +40229011: 368c beqz.n a6, 40229018 +40229013: 062d mov.n a2, a6 +40229015: fffac6 j 40229004 +40229018: 0239 s32i.n a3, a2, 0 +4022901a: f00d ret.n + +4022901c : +4022901c: f0c112 addi a1, a1, -16 +4022901f: 3109 s32i.n a0, a1, 12 +40229021: 21c9 s32i.n a12, a1, 8 +40229023: 03cd mov.n a12, a3 +40229025: fffd85 call0 40229000 +40229028: 0c2d mov.n a2, a12 +4022902a: ffd645 call0 40228d90 +4022902d: 3108 l32i.n a0, a1, 12 +4022902f: 21c8 l32i.n a12, a1, 8 +40229031: 10c112 addi a1, a1, 16 +40229034: f00d ret.n + ... + +40229038 : +40229038: f0c112 addi a1, a1, -16 +4022903b: 21c9 s32i.n a12, a1, 8 +4022903d: 02c8 l32i.n a12, a2, 0 +4022903f: 3109 s32i.n a0, a1, 12 +40229041: 004c56 bnez a12, 40229049 +40229044: 020c movi.n a2, 0 +40229046: 000706 j 40229066 +40229049: 051242 l16ui a4, a2, 10 +4022904c: 041232 l16ui a3, a2, 8 +4022904f: c03340 sub a3, a3, a4 +40229052: 045c32 s16i a3, a12, 8 +40229055: 030c movi.n a3, 0 +40229057: 0239 s32i.n a3, a2, 0 +40229059: 045242 s16i a4, a2, 8 +4022905c: 0c2d mov.n a2, a12 +4022905e: ffd405 call0 40228da0 +40229061: fdf256 bnez a2, 40229044 +40229064: 0c2d mov.n a2, a12 +40229066: 3108 l32i.n a0, a1, 12 +40229068: 21c8 l32i.n a12, a1, 8 +4022906a: 10c112 addi a1, a1, 16 +4022906d: f00d ret.n + ... + +40229070 : +40229070: d0c112 addi a1, a1, -48 +40229073: a1c9 s32i.n a12, a1, 40 +40229075: 91d9 s32i.n a13, a1, 36 +40229077: b109 s32i.n a0, a1, 44 +40229079: 81e9 s32i.n a14, a1, 32 +4022907b: 71f9 s32i.n a15, a1, 28 +4022907d: 02cd mov.n a12, a2 +4022907f: 03dd mov.n a13, a3 +40229081: 08b216 beqz a2, 40229110 +40229084: 088316 beqz a3, 40229110 +40229087: 041242 l16ui a4, a2, 8 +4022908a: 041332 l16ui a3, a3, 8 +4022908d: 427c movi.n a2, -12 +4022908f: 02b437 bgeu a4, a3, 40229095 +40229092: 002186 j 4022911c +40229095: 0f0c movi.n a15, 0 +40229097: 0fed mov.n a14, a15 +40229099: 051c32 l16ui a3, a12, 10 +4022909c: 051d22 l16ui a2, a13, 10 +4022909f: c033e0 sub a3, a3, a14 +402290a2: c022f0 sub a2, a2, a15 +402290a5: f45030 extui a5, a3, 0, 16 +402290a8: 022327 blt a3, a2, 402290ae +402290ab: f45020 extui a5, a2, 0, 16 +402290ae: 1d38 l32i.n a3, a13, 4 +402290b0: 1c28 l32i.n a2, a12, 4 +402290b2: 054d mov.n a4, a5 +402290b4: 33fa add.n a3, a3, a15 +402290b6: 8022e0 add a2, a2, a14 +402290b9: 006152 s32i a5, a1, 0 +402290bc: 5fd601 l32r a0, 40201014 <_irom0_text_start+0x4> +402290bf: 0000c0 callx0 a0 +402290c2: 0158 l32i.n a5, a1, 0 +402290c4: 051c22 l16ui a2, a12, 10 +402290c7: ee5a add.n a14, a14, a5 +402290c9: ff5a add.n a15, a15, a5 +402290cb: f4e0e0 extui a14, a14, 0, 16 +402290ce: f4f0f0 extui a15, a15, 0, 16 +402290d1: 0392e7 bne a2, a14, 402290d8 +402290d4: 0cc8 l32i.n a12, a12, 0 +402290d6: 0e0c movi.n a14, 0 +402290d8: 051d22 l16ui a2, a13, 10 +402290db: 053f27 bltu a15, a2, 402290e4 +402290de: 0dd8 l32i.n a13, a13, 0 +402290e0: 4d9c beqz.n a13, 402290f8 +402290e2: 0f0c movi.n a15, 0 +402290e4: 051d32 l16ui a3, a13, 10 +402290e7: 041d22 l16ui a2, a13, 8 +402290ea: 039327 bne a3, a2, 402290f1 +402290ed: 0d28 l32i.n a2, a13, 0 +402290ef: 22ec bnez.n a2, 40229115 +402290f1: fa4c16 beqz a12, 40229099 +402290f4: 000106 j 402290fc +402290f7: ec9c00 excw +402290fa: 0f0c movi.n a15, 0 +402290fc: 051c32 l16ui a3, a12, 10 +402290ff: 041c22 l16ui a2, a12, 8 +40229102: 039327 bne a3, a2, 40229109 +40229105: 0c28 l32i.n a2, a12, 0 +40229107: a2cc bnez.n a2, 40229115 +40229109: f8cd56 bnez a13, 40229099 +4022910c: 000286 j 4022911a +4022910f: 427c00 excw +40229112: 000186 j 4022911c +40229115: a27c movi.n a2, -6 +40229117: 000046 j 4022911c +4022911a: 020c movi.n a2, 0 +4022911c: b108 l32i.n a0, a1, 44 +4022911e: a1c8 l32i.n a12, a1, 40 +40229120: 91d8 l32i.n a13, a1, 36 +40229122: 81e8 l32i.n a14, a1, 32 +40229124: 71f8 l32i.n a15, a1, 28 +40229126: 30c112 addi a1, a1, 48 +40229129: f00d ret.n + ... + +4022912c : +4022912c: d0c112 addi a1, a1, -48 +4022912f: 81e9 s32i.n a14, a1, 32 +40229131: b109 s32i.n a0, a1, 44 +40229133: a1c9 s32i.n a12, a1, 40 +40229135: 91d9 s32i.n a13, a1, 36 +40229137: 71f9 s32i.n a15, a1, 28 +40229139: 02ed mov.n a14, a2 +4022913b: 036d mov.n a6, a3 +4022913d: f47040 extui a7, a4, 0, 16 +40229140: f45050 extui a5, a5, 0, 16 +40229143: 062316 beqz a3, 402291a9 +40229146: 0c0c movi.n a12, 0 +40229148: 0cfd mov.n a15, a12 +4022914a: 05b216 beqz a2, 402291a9 +4022914d: 053716 beqz a7, 402291a4 +40229150: 050e16 beqz a14, 402291a4 +40229153: d58c beqz.n a5, 40229164 +40229155: 051e32 l16ui a3, a14, 10 +40229158: 083537 bltu a5, a3, 40229164 +4022915b: c05530 sub a5, a5, a3 +4022915e: f45050 extui a5, a5, 0, 16 +40229161: 000e86 j 4022919f +40229164: 051e22 l16ui a2, a14, 10 +40229167: 07dd mov.n a13, a7 +40229169: c02250 sub a2, a2, a5 +4022916c: f42020 extui a2, a2, 0, 16 +4022916f: 01b277 bgeu a2, a7, 40229174 +40229172: 02dd mov.n a13, a2 +40229174: 1e38 l32i.n a3, a14, 4 +40229176: f4d0d0 extui a13, a13, 0, 16 +40229179: 26fa add.n a2, a6, a15 +4022917b: 0d4d mov.n a4, a13 +4022917d: 335a add.n a3, a3, a5 +4022917f: 0169 s32i.n a6, a1, 0 +40229181: 1179 s32i.n a7, a1, 4 +40229183: 5fa401 l32r a0, 40201014 <_irom0_text_start+0x4> +40229186: 0000c0 callx0 a0 +40229189: 1178 l32i.n a7, a1, 4 +4022918b: ccda add.n a12, a12, a13 +4022918d: ffda add.n a15, a15, a13 +4022918f: 0168 l32i.n a6, a1, 0 +40229191: c0d7d0 sub a13, a7, a13 +40229194: f4c0c0 extui a12, a12, 0, 16 +40229197: f4f0f0 extui a15, a15, 0, 16 +4022919a: f470d0 extui a7, a13, 0, 16 +4022919d: 050c movi.n a5, 0 +4022919f: 0ee8 l32i.n a14, a14, 0 +402291a1: ffea06 j 4022914d +402291a4: 0c2d mov.n a2, a12 +402291a6: 000046 j 402291ab +402291a9: 020c movi.n a2, 0 +402291ab: b108 l32i.n a0, a1, 44 +402291ad: a1c8 l32i.n a12, a1, 40 +402291af: 91d8 l32i.n a13, a1, 36 +402291b1: 81e8 l32i.n a14, a1, 32 +402291b3: 71f8 l32i.n a15, a1, 28 +402291b5: 30c112 addi a1, a1, 48 +402291b8: f00d ret.n + ... + +402291bc : +402291bc: d0c112 addi a1, a1, -48 +402291bf: a1c9 s32i.n a12, a1, 40 +402291c1: 91d9 s32i.n a13, a1, 36 +402291c3: b109 s32i.n a0, a1, 44 +402291c5: 81e9 s32i.n a14, a1, 32 +402291c7: 71f9 s32i.n a15, a1, 28 +402291c9: 02dd mov.n a13, a2 +402291cb: 035d mov.n a5, a3 +402291cd: f4c040 extui a12, a4, 0, 16 +402291d0: 028c beqz.n a2, 402291d4 +402291d2: 33cc bnez.n a3, 402291d9 +402291d4: 020c movi.n a2, 0 +402291d6: 000e86 j 40229214 +402291d9: 041232 l16ui a3, a2, 8 +402291dc: 0f0c movi.n a15, 0 +402291de: 427c movi.n a2, -12 +402291e0: 3033c7 bltu a3, a12, 40229214 +402291e3: fedc16 beqz a12, 402291d4 +402291e6: 051d22 l16ui a2, a13, 10 +402291e9: 0ced mov.n a14, a12 +402291eb: 01b2c7 bgeu a2, a12, 402291f0 +402291ee: 02ed mov.n a14, a2 +402291f0: f4e0e0 extui a14, a14, 0, 16 +402291f3: 1d28 l32i.n a2, a13, 4 +402291f5: 35fa add.n a3, a5, a15 +402291f7: 0e4d mov.n a4, a14 +402291f9: 0159 s32i.n a5, a1, 0 +402291fb: c0cce0 sub a12, a12, a14 +402291fe: 5f8501 l32r a0, 40201014 <_irom0_text_start+0x4> +40229201: 0000c0 callx0 a0 +40229204: ffea add.n a15, a15, a14 +40229206: f4c0c0 extui a12, a12, 0, 16 +40229209: f4f0f0 extui a15, a15, 0, 16 +4022920c: 0dd8 l32i.n a13, a13, 0 +4022920e: 0158 l32i.n a5, a1, 0 +40229210: fff3c6 j 402291e3 +40229213: b10800 excw +40229216: a1c8 l32i.n a12, a1, 40 +40229218: 91d8 l32i.n a13, a1, 36 +4022921a: 81e8 l32i.n a14, a1, 32 +4022921c: 71f8 l32i.n a15, a1, 28 +4022921e: 30c112 addi a1, a1, 48 +40229221: f00d ret.n + ... + +40229224 : +40229224: f0c112 addi a1, a1, -16 +40229227: 11d9 s32i.n a13, a1, 4 +40229229: 02dd mov.n a13, a2 +4022922b: 032d mov.n a2, a3 +4022922d: 0d38 l32i.n a3, a13, 0 +4022922f: 3109 s32i.n a0, a1, 12 +40229231: 21c9 s32i.n a12, a1, 8 +40229233: 63cc bnez.n a3, 4022923d +40229235: 0d2d mov.n a2, a13 +40229237: 000706 j 40229257 +4022923a: 000000 ill +4022923d: 041d32 l16ui a3, a13, 8 +40229240: 00a042 movi a4, 0 +40229243: ffbd05 call0 40228e14 +40229246: 02cd mov.n a12, a2 +40229248: fe9216 beqz a2, 40229235 +4022924b: 0d3d mov.n a3, a13 +4022924d: ffe205 call0 40229070 +40229250: 0d2d mov.n a2, a13 +40229252: ffb4c5 call0 40228da0 +40229255: 0c2d mov.n a2, a12 +40229257: 3108 l32i.n a0, a1, 12 +40229259: 21c8 l32i.n a12, a1, 8 +4022925b: 11d8 l32i.n a13, a1, 4 +4022925d: 10c112 addi a1, a1, 16 +40229260: f00d ret.n + ... + +40229264 : +40229264: f43030 extui a3, a3, 0, 16 +40229267: f28c beqz.n a2, 4022927a +40229269: 051242 l16ui a4, a2, 10 +4022926c: 0e3347 bltu a3, a4, 4022927e +4022926f: c03340 sub a3, a3, a4 +40229272: f43030 extui a3, a3, 0, 16 +40229275: 0228 l32i.n a2, a2, 0 +40229277: fffb06 j 40229267 +4022927a: 020c movi.n a2, 0 +4022927c: f00d ret.n +4022927e: 1228 l32i.n a2, a2, 4 +40229280: 323a add.n a3, a2, a3 +40229282: 000322 l8ui a2, a3, 0 +40229285: f00d ret.n + ... + +40229288 : +40229288: d0c112 addi a1, a1, -48 +4022928b: 81e9 s32i.n a14, a1, 32 +4022928d: 71f9 s32i.n a15, a1, 28 +4022928f: b109 s32i.n a0, a1, 44 +40229291: a1c9 s32i.n a12, a1, 40 +40229293: 91d9 s32i.n a13, a1, 36 +40229295: 02fd mov.n a15, a2 +40229297: f4e030 extui a14, a3, 0, 16 +4022929a: f45050 extui a5, a5, 0, 16 +4022929d: 048f16 beqz a15, 402292e9 +402292a0: 051f22 l16ui a2, a15, 10 +402292a3: 0b3e27 bltu a14, a2, 402292b2 +402292a6: c0ee20 sub a14, a14, a2 +402292a9: f4e0e0 extui a14, a14, 0, 16 +402292ac: 0ff8 l32i.n a15, a15, 0 +402292ae: fffac6 j 4022929d +402292b1: 0d0c00 excw +402292b4: f4c0d0 extui a12, a13, 0, 16 +402292b7: 2915d7 beq a5, a13, 402292e4 +402292ba: 3eca add.n a3, a14, a12 +402292bc: f43030 extui a3, a3, 0, 16 +402292bf: 0f2d mov.n a2, a15 +402292c1: 0149 s32i.n a4, a1, 0 +402292c3: 1159 s32i.n a5, a1, 4 +402292c5: fff9c5 call0 40229264 +402292c8: 0148 l32i.n a4, a1, 0 +402292ca: 3d1b addi.n a3, a13, 1 +402292cc: d4da add.n a13, a4, a13 +402292ce: 000d62 l8ui a6, a13, 0 +402292d1: 1158 l32i.n a5, a1, 4 +402292d3: 071627 beq a6, a2, 402292de +402292d6: 2c1b addi.n a2, a12, 1 +402292d8: f42020 extui a2, a2, 0, 16 +402292db: 000346 j 402292ec +402292de: 03dd mov.n a13, a3 +402292e0: fff406 j 402292b4 +402292e3: 020c00 excw +402292e6: 000086 j 402292ec +402292e9: 634021 l32r a2, 40201fec +402292ec: b108 l32i.n a0, a1, 44 +402292ee: a1c8 l32i.n a12, a1, 40 +402292f0: 91d8 l32i.n a13, a1, 36 +402292f2: 81e8 l32i.n a14, a1, 32 +402292f4: 71f8 l32i.n a15, a1, 28 +402292f6: 30c112 addi a1, a1, 48 +402292f9: f00d ret.n + ... + +402292fc : +402292fc: d0c112 addi a1, a1, -48 +402292ff: 036d mov.n a6, a3 +40229301: 041232 l16ui a3, a2, 8 +40229304: a1c9 s32i.n a12, a1, 40 +40229306: 81e9 s32i.n a14, a1, 32 +40229308: f4c050 extui a12, a5, 0, 16 +4022930b: f4e040 extui a14, a4, 0, 16 +4022930e: 91d9 s32i.n a13, a1, 36 +40229310: 71f9 s32i.n a15, a1, 28 +40229312: c0d3e0 sub a13, a3, a14 +40229315: b109 s32i.n a0, a1, 44 +40229317: 4cea add.n a4, a12, a14 +40229319: 02fd mov.n a15, a2 +4022931b: f4d0d0 extui a13, a13, 0, 16 +4022931e: 633321 l32r a2, 40201fec +40229321: 232347 blt a3, a4, 40229348 +40229324: 183dc7 bltu a13, a12, 40229340 +40229327: 064d mov.n a4, a6 +40229329: 0e5d mov.n a5, a14 +4022932b: 0c3d mov.n a3, a12 +4022932d: 0f2d mov.n a2, a15 +4022932f: 0169 s32i.n a6, a1, 0 +40229331: fff545 call0 40229288 +40229334: 0168 l32i.n a6, a1, 0 +40229336: c28c beqz.n a2, 40229346 +40229338: cc2a add.n a12, a12, a2 +4022933a: f4c0c0 extui a12, a12, 0, 16 +4022933d: fff8c6 j 40229324 +40229340: 632b21 l32r a2, 40201fec +40229343: 000046 j 40229348 +40229346: 0c2d mov.n a2, a12 +40229348: b108 l32i.n a0, a1, 44 +4022934a: a1c8 l32i.n a12, a1, 40 +4022934c: 91d8 l32i.n a13, a1, 36 +4022934e: 81e8 l32i.n a14, a1, 32 +40229350: 71f8 l32i.n a15, a1, 28 +40229352: 30c112 addi a1, a1, 48 +40229355: f00d ret.n +40229357: fffe00 excw + ... + +4022935c : +4022935c: e0c112 addi a1, a1, -32 +4022935f: 61c9 s32i.n a12, a1, 24 +40229361: 51d9 s32i.n a13, a1, 20 +40229363: 7109 s32i.n a0, a1, 28 +40229365: 02dd mov.n a13, a2 +40229367: 6321c1 l32r a12, 40201fec +4022936a: 33cc bnez.n a3, 40229371 +4022936c: 0c2d mov.n a2, a12 +4022936e: 0009c6 j 40229399 +40229371: 000322 l8ui a2, a3, 0 +40229374: ff4216 beqz a2, 4022936c +40229377: 041d22 l16ui a2, a13, 8 +4022937a: ee12c7 beq a2, a12, 4022936c +4022937d: 032d mov.n a2, a3 +4022937f: 006132 s32i a3, a1, 0 +40229382: 6c0b01 l32r a0, 402043b0 +40229385: 0000c0 callx0 a0 +40229388: fff441 l32r a4, 40229358 +4022938b: 0138 l32i.n a3, a1, 0 +4022938d: db3427 bltu a4, a2, 4022936c +40229390: 024d mov.n a4, a2 +40229392: 050c movi.n a5, 0 +40229394: 0d2d mov.n a2, a13 +40229396: fff645 call0 402292fc +40229399: 7108 l32i.n a0, a1, 28 +4022939b: 61c8 l32i.n a12, a1, 24 +4022939d: 51d8 l32i.n a13, a1, 20 +4022939f: 20c112 addi a1, a1, 32 +402293a2: f00d ret.n + +402293a4 : +402293a4: 616821 l32r a2, 40201944 +402293a7: f0c112 addi a1, a1, -16 +402293aa: 0261c2 s32i a12, a1, 8 +402293ad: 0022c2 l32i a12, a2, 0 +402293b0: 0061e2 s32i a14, a1, 0 +402293b3: 3109 s32i.n a0, a1, 12 +402293b5: 11d9 s32i.n a13, a1, 4 +402293b7: 0e0c movi.n a14, 0 +402293b9: 3cbc beqz.n a12, 402293f0 +402293bb: 202cd2 l32i a13, a12, 128 +402293be: 9dac beqz.n a13, 402293eb +402293c0: 0d28 l32i.n a2, a13, 0 +402293c2: a2cc bnez.n a2, 402293d0 +402293c4: 0d2d mov.n a2, a13 +402293c6: 0046c5 call0 40229834 +402293c9: 206ce2 s32i a14, a12, 128 +402293cc: 0006c6 j 402293eb +402293cf: 3dd000 excw +402293d2: 232220 excw +402293d5: 224200 excw +402293d8: 94cc00 extui a12, a0, 12, 10 +402293db: 03e9 s32i.n a14, a3, 0 +402293dd: 004545 call0 40229834 +402293e0: 206cd2 s32i a13, a12, 128 +402293e3: 000106 j 402293eb +402293e6: 023d mov.n a3, a2 +402293e8: fff9c6 j 402293d3 +402293eb: 3cc8 l32i.n a12, a12, 12 +402293ed: fff206 j 402293b9 +402293f0: 3108 l32i.n a0, a1, 12 +402293f2: 21c8 l32i.n a12, a1, 8 +402293f4: 11d8 l32i.n a13, a1, 4 +402293f6: 01e8 l32i.n a14, a1, 0 +402293f8: 10c112 addi a1, a1, 16 +402293fb: f00d ret.n +402293fd: 000000 ill +40229400: fe8863 excw +40229403: 3f .byte 0x3f +40229404: d8dc bnez.n a8, 40229425 +40229406: fe .byte 0xfe +40229407: 3f .byte 0x3f + +40229408 : +40229408: f0c112 addi a1, a1, -16 +4022940b: 11d9 s32i.n a13, a1, 4 +4022940d: 74d020 extui a13, a2, 0, 8 +40229410: fa0121 l32r a2, 40227c14 +40229413: fffb31 l32r a3, 40229400 +40229416: 0228 l32i.n a2, a2, 0 +40229418: 050c movi.n a5, 0 +4022941a: 59a142 movi a4, 0x159 +4022941d: 0261c2 s32i a12, a1, 8 +40229420: 3109 s32i.n a0, a1, 12 +40229422: 603801 l32r a0, 40201504 +40229425: 0000c0 callx0 a0 +40229428: 02cd mov.n a12, a2 +4022942a: c29c beqz.n a2, 4022944a +4022942c: 00a032 movi a3, 0 +4022942f: 1ca042 movi a4, 28 +40229432: 5ef701 l32r a0, 40201010 <_irom0_text_start> +40229435: 0000c0 callx0 a0 +40229438: 80af22 movi a2, -128 +4022943b: 0a4c22 s8i a2, a12, 10 +4022943e: fff121 l32r a2, 40229404 +40229441: 104cd2 s8i a13, a12, 16 +40229444: 0238 l32i.n a3, a2, 0 +40229446: 02c9 s32i.n a12, a2, 0 +40229448: 3c39 s32i.n a3, a12, 12 +4022944a: 3108 l32i.n a0, a1, 12 +4022944c: 0c2d mov.n a2, a12 +4022944e: 11d8 l32i.n a13, a1, 4 +40229450: 21c8 l32i.n a12, a1, 8 +40229452: 10c112 addi a1, a1, 16 +40229455: f00d ret.n + ... + +40229458 : +40229458: ffeb41 l32r a4, 40229404 +4022945b: f0c112 addi a1, a1, -16 +4022945e: 0438 l32i.n a3, a4, 0 +40229460: 3109 s32i.n a0, a1, 12 +40229462: 0e9327 bne a3, a2, 40229474 +40229465: 3338 l32i.n a3, a3, 12 +40229467: 0439 s32i.n a3, a4, 0 +40229469: 000646 j 40229486 +4022946c: 480000 excw +4022946f: 84cc33 excw +40229472: 3338 l32i.n a3, a3, 12 +40229474: ff6356 bnez a3, 4022946e +40229477: 0002c6 j 40229486 +4022947a: 470000 excw +4022947d: 48f292 excw +40229480: 334932 s8i a3, a9, 51 +40229483: fffac6 j 40229472 +40229486: ffde31 l32r a3, 40229400 +40229489: 45a142 movi a4, 0x145 +4022948c: 601f01 l32r a0, 40201508 +4022948f: 0000c0 callx0 a0 +40229492: 3108 l32i.n a0, a1, 12 +40229494: 10c112 addi a1, a1, 16 +40229497: f00d ret.n +40229499: 000000 ill + +4022949c : +4022949c: 040c movi.n a4, 0 +4022949e: 021347 beq a3, a4, 402294a4 +402294a1: 002342 l32i a4, a3, 0 +402294a4: 0249 s32i.n a4, a2, 0 +402294a6: 020c movi.n a2, 0 +402294a8: f00d ret.n + ... + +402294ac : +402294ac: 040c movi.n a4, 0 +402294ae: 021347 beq a3, a4, 402294b4 +402294b1: 002342 l32i a4, a3, 0 +402294b4: 1249 s32i.n a4, a2, 4 +402294b6: 020c movi.n a2, 0 +402294b8: f00d ret.n + ... + +402294bc : +402294bc: 5239 s32i.n a3, a2, 20 +402294be: 6249 s32i.n a4, a2, 24 +402294c0: f00d ret.n + ... + +402294c4 : +402294c4: d0c112 addi a1, a1, -48 +402294c7: 0961d2 s32i a13, a1, 36 +402294ca: 20d330 or a13, a3, a3 +402294cd: 81e9 s32i.n a14, a1, 32 +402294cf: 431c movi.n a3, 20 +402294d1: 02ed mov.n a14, a2 +402294d3: 0d2d mov.n a2, a13 +402294d5: 71f9 s32i.n a15, a1, 28 +402294d7: b109 s32i.n a0, a1, 44 +402294d9: a1c9 s32i.n a12, a1, 40 +402294db: 20f440 or a15, a4, a4 +402294de: ff8385 call0 40228d18 +402294e1: 52ac beqz.n a2, 4022950a +402294e3: 040c movi.n a4, 0 +402294e5: 043d mov.n a3, a4 +402294e7: 120c movi.n a2, 1 +402294e9: ff9285 call0 40228e14 +402294ec: 02cd mov.n a12, a2 +402294ee: 32cc bnez.n a2, 402294f5 +402294f0: f27c movi.n a2, -1 +402294f2: 001986 j 4022955c +402294f5: 041d22 l16ui a2, a13, 8 +402294f8: 01d216 beqz a2, 40229519 +402294fb: 203dd0 or a3, a13, a13 +402294fe: 202cc0 or a2, a12, a12 +40229501: ffb185 call0 4022901c +40229504: 000446 j 40229519 +40229507: 000000 ill +4022950a: ecaf32 movi a3, -20 +4022950d: 202dd0 or a2, a13, a13 +40229510: ff8045 call0 40228d18 +40229513: fd9256 bnez a2, 402294f0 +40229516: 20cdd0 or a12, a13, a13 +40229519: 202ff0 or a2, a15, a15 +4022951c: fec5c5 call0 4022817c +4022951f: 00e256 bnez a2, 40229531 +40229522: c27c movi.n a2, -4 +40229524: 341cd7 beq a12, a13, 4022955c +40229527: 0c2d mov.n a2, a12 +40229529: ff8745 call0 40228da0 +4022952c: c27c movi.n a2, -4 +4022952e: 000a86 j 4022955c +40229531: 0e3d mov.n a3, a14 +40229533: 3e8c beqz.n a14, 4022953a +40229535: 0e48 l32i.n a4, a14, 0 +40229537: 001456 bnez a4, 4022953c +4022953a: 324b addi.n a3, a2, 4 +4022953c: 100e72 l8ui a7, a14, 16 +4022953f: 090e62 l8ui a6, a14, 9 +40229542: 0a0e52 l8ui a5, a14, 10 +40229545: 204ff0 or a4, a15, a15 +40229548: 006122 s32i a2, a1, 0 +4022954b: 0c2d mov.n a2, a12 +4022954d: ff1145 call0 40228664 +40229550: 02ed mov.n a14, a2 +40229552: 061cd7 beq a12, a13, 4022955c +40229555: 0c2d mov.n a2, a12 +40229557: ff8485 call0 40228da0 +4022955a: 0e2d mov.n a2, a14 +4022955c: b108 l32i.n a0, a1, 44 +4022955e: a1c8 l32i.n a12, a1, 40 +40229560: 91d8 l32i.n a13, a1, 36 +40229562: 81e8 l32i.n a14, a1, 32 +40229564: 71f8 l32i.n a15, a1, 28 +40229566: 30c112 addi a1, a1, 48 +40229569: f00d ret.n + ... + +4022956c : +4022956c: d0c112 addi a1, a1, -48 +4022956f: 91d9 s32i.n a13, a1, 36 +40229571: 81e9 s32i.n a14, a1, 32 +40229573: ffa4d1 l32r a13, 40229404 +40229576: 02ed mov.n a14, a2 +40229578: 1228 l32i.n a2, a2, 4 +4022957a: a1c9 s32i.n a12, a1, 40 +4022957c: 71f9 s32i.n a15, a1, 28 +4022957e: b109 s32i.n a0, a1, 44 +40229580: 030c movi.n a3, 0 +40229582: 090272 l8ui a7, a2, 9 +40229585: 0dc8 l32i.n a12, a13, 0 +40229587: 03fd mov.n a15, a3 +40229589: 04f356 bnez a3, 402295dc +4022958c: 04cc16 beqz a12, 402295dc +4022958f: 100c22 l8ui a2, a12, 16 +40229592: 030c movi.n a3, 0 +40229594: 3c9277 bne a2, a7, 402295d4 +40229597: 0c28 l32i.n a2, a12, 0 +40229599: 091237 beq a2, a3, 402295a6 +4022959c: fb1331 l32r a3, 402281e8 +4022959f: 0348 l32i.n a4, a3, 0 +402295a1: 030c movi.n a3, 0 +402295a3: 2d9247 bne a2, a4, 402295d4 +402295a6: 5c68 l32i.n a6, a12, 20 +402295a8: 030c movi.n a3, 0 +402295aa: 261637 beq a6, a3, 402295d4 +402295ad: 6c28 l32i.n a2, a12, 24 +402295af: fb0f51 l32r a5, 402281ec +402295b2: 0c3d mov.n a3, a12 +402295b4: 0179 s32i.n a7, a1, 0 +402295b6: 204ee0 or a4, a14, a14 +402295b9: 0006c0 callx0 a6 +402295bc: 030c movi.n a3, 0 +402295be: 0178 l32i.n a7, a1, 0 +402295c0: 101237 beq a2, a3, 402295d4 +402295c3: 0e0c movi.n a14, 0 +402295c5: 130c movi.n a3, 1 +402295c7: 091fe7 beq a15, a14, 402295d4 +402295ca: 3c28 l32i.n a2, a12, 12 +402295cc: 3f29 s32i.n a2, a15, 12 +402295ce: 0d28 l32i.n a2, a13, 0 +402295d0: 0dc9 s32i.n a12, a13, 0 +402295d2: 3c29 s32i.n a2, a12, 12 +402295d4: 0cfd mov.n a15, a12 +402295d6: 3cc8 l32i.n a12, a12, 12 +402295d8: ffeb46 j 40229589 +402295db: b10800 excw +402295de: 032d mov.n a2, a3 +402295e0: a1c8 l32i.n a12, a1, 40 +402295e2: 91d8 l32i.n a13, a1, 36 +402295e4: 81e8 l32i.n a14, a1, 32 +402295e6: 71f8 l32i.n a15, a1, 28 +402295e8: 30c112 addi a1, a1, 48 +402295eb: f00d ret.n +402295ed: 000000 ill + +402295f0 : +402295f0: f0c112 addi a1, a1, -16 +402295f3: 424b addi.n a4, a2, 4 +402295f5: 3109 s32i.n a0, a1, 12 +402295f7: ffecc5 call0 402294c4 +402295fa: 3108 l32i.n a0, a1, 12 +402295fc: 10c112 addi a1, a1, 16 +402295ff: f00d ret.n +40229601: 000000 ill + +40229604 : +40229604: 6239 s32i.n a3, a2, 24 +40229606: f00d ret.n + +40229608 : +40229608: 7239 s32i.n a3, a2, 28 +4022960a: f00d ret.n + +4022960c : +4022960c: 236232 s32i a3, a2, 140 +4022960f: f00d ret.n +40229611: 000000 ill + +40229614 : +40229614: 226232 s32i a3, a2, 136 +40229617: f00d ret.n +40229619: 000000 ill + +4022961c : +4022961c: 256232 s32i a3, a2, 148 +4022961f: 394242 s8i a4, a2, 57 +40229622: f00d ret.n + +40229624 : +40229624: 266232 s32i a3, a2, 152 +40229627: f00d ret.n +40229629: 000000 ill + +4022962c : +4022962c: f0c112 addi a1, a1, -16 +4022962f: 11d9 s32i.n a13, a1, 4 +40229631: 03dd mov.n a13, a3 +40229633: 4238 l32i.n a3, a2, 16 +40229635: 21c9 s32i.n a12, a1, 8 +40229637: 3109 s32i.n a0, a1, 12 +40229639: 02cd mov.n a12, a2 +4022963b: f44040 extui a4, a4, 0, 16 +4022963e: 127c movi.n a2, -15 +40229640: 05d356 bnez a3, 402296a1 +40229643: 34cc bnez.n a4, 4022964a +40229645: d829c5 call0 402018e4 +40229648: 024d mov.n a4, a2 +4022964a: 030c movi.n a3, 0 +4022964c: 01a052 movi a5, 1 +4022964f: 9353d0 movnez a5, a3, a13 +40229652: 60a281 l32r a8, 402018dc +40229655: 745050 extui a5, a5, 0, 8 +40229658: 238a add.n a2, a3, a8 +4022965a: 0228 l32i.n a2, a2, 0 +4022965c: 0268 l32i.n a6, a2, 0 +4022965e: 769c beqz.n a6, 40229679 +40229660: 101622 l16ui a2, a6, 32 +40229663: 0d9247 bne a2, a4, 40229674 +40229666: 0678 l32i.n a7, a6, 0 +40229668: 35fc bnez.n a5, 4022969f +4022966a: 17bc beqz.n a7, 4022969f +4022966c: 002d22 l32i a2, a13, 0 +4022966f: c2ac beqz.n a2, 4022969f +40229671: 2a1727 beq a7, a2, 4022969f +40229674: 3668 l32i.n a6, a6, 12 +40229676: fff906 j 4022965e +40229679: 334b addi.n a3, a3, 4 +4022967b: d9b366 bnei a3, 16, 40229658 +4022967e: 6d8c beqz.n a13, 40229688 +40229680: 0d28 l32i.n a2, a13, 0 +40229682: 002216 beqz a2, 40229688 +40229685: 006c22 s32i a2, a12, 0 +40229688: 60b221 l32r a2, 40201950 +4022968b: 105c42 s16i a4, a12, 32 +4022968e: 002232 l32i a3, a2, 0 +40229691: 0062c2 s32i a12, a2, 0 +40229694: 036c32 s32i a3, a12, 12 +40229697: 02e3c5 call0 4022c4d4 +4022969a: 020c movi.n a2, 0 +4022969c: 000046 j 402296a1 +4022969f: 327c movi.n a2, -13 +402296a1: 3108 l32i.n a0, a1, 12 +402296a3: 21c8 l32i.n a12, a1, 8 +402296a5: 11d8 l32i.n a13, a1, 4 +402296a7: 10c112 addi a1, a1, 16 +402296aa: f00d ret.n +402296ac: 201b60 or a1, a11, a6 +402296af: 40 .byte 0x40 + +402296b0 : +402296b0: f0c112 addi a1, a1, -16 +402296b3: 11d9 s32i.n a13, a1, 4 +402296b5: 02dd mov.n a13, a2 +402296b7: 4228 l32i.n a2, a2, 16 +402296b9: 3109 s32i.n a0, a1, 12 +402296bb: 21c9 s32i.n a12, a1, 8 +402296bd: 01e9 s32i.n a14, a1, 0 +402296bf: 528c beqz.n a2, 402296c8 +402296c1: 020c movi.n a2, 0 +402296c3: 002ac6 j 40229772 +402296c6: 210000 srai a0, a0, 0 +402296c9: e1f953 excw +402296cc: 2860a2 s32i a10, a0, 160 +402296cf: 0e3d32 excw +402296d2: 050c movi.n a5, 0 +402296d4: 14a242 movi a4, 0x214 +402296d7: 5f8b01 l32r a0, 40201504 +402296da: 0000c0 callx0 a0 +402296dd: 02cd mov.n a12, a2 +402296df: 0e3d mov.n a3, a14 +402296e1: fdc216 beqz a2, 402296c1 +402296e4: 6d28 l32i.n a2, a13, 24 +402296e6: 6c29 s32i.n a2, a12, 24 +402296e8: 101d22 l16ui a2, a13, 32 +402296eb: 105c22 s16i a2, a12, 32 +402296ee: 120c movi.n a2, 1 +402296f0: 4c29 s32i.n a2, a12, 16 +402296f2: 140d22 l8ui a2, a13, 20 +402296f5: 144c22 s8i a2, a12, 20 +402296f8: 080d42 l8ui a4, a13, 8 +402296fb: 220c movi.n a2, 2 +402296fd: 202420 or a2, a4, a2 +40229700: 084c22 s8i a2, a12, 8 +40229703: 0a0d22 l8ui a2, a13, 10 +40229706: 0a4c22 s8i a2, a12, 10 +40229709: 090d22 l8ui a2, a13, 9 +4022970c: 094c22 s8i a2, a12, 9 +4022970f: 0d28 l32i.n a2, a13, 0 +40229711: 0c29 s32i.n a2, a12, 0 +40229713: 101d22 l16ui a2, a13, 32 +40229716: 72bc beqz.n a2, 40229751 +40229718: 608e41 l32r a4, 40201950 +4022971b: 0428 l32i.n a2, a4, 0 +4022971d: 049d27 bne a13, a2, 40229725 +40229720: 3d28 l32i.n a2, a13, 12 +40229722: 000946 j 4022974b +40229725: 608841 l32r a4, 40201948 +40229728: 050c movi.n a5, 0 +4022972a: 0429 s32i.n a2, a4, 0 +4022972c: 929c beqz.n a2, 40229749 +4022972e: 3268 l32i.n a6, a2, 12 +40229730: 0c9d67 bne a13, a6, 40229740 +40229733: 158c beqz.n a5, 40229738 +40229735: 006422 s32i a2, a4, 0 +40229738: 3d48 l32i.n a4, a13, 12 +4022973a: 3249 s32i.n a4, a2, 12 +4022973c: 000346 j 4022974d +4022973f: 150c00 extui a0, a0, 28, 2 +40229742: 062d mov.n a2, a6 +40229744: fff906 j 4022972c +40229747: 8c0000 excw +4022974a: 042905 call0 4022d9dc +4022974d: 020c movi.n a2, 0 +4022974f: 3d29 s32i.n a2, a13, 12 +40229751: 24a242 movi a4, 0x224 +40229754: 202dd0 or a2, a13, a13 +40229757: 5f6c01 l32r a0, 40201508 +4022975a: 0000c0 callx0 a0 +4022975d: ffd321 l32r a2, 402296ac +40229760: 076c22 s32i a2, a12, 28 +40229763: 607d21 l32r a2, 40201958 +40229766: 002232 l32i a3, a2, 0 +40229769: 02c9 s32i.n a12, a2, 0 +4022976b: 3c39 s32i.n a3, a12, 12 +4022976d: 02d645 call0 4022c4d4 +40229770: 0c2d mov.n a2, a12 +40229772: 3108 l32i.n a0, a1, 12 +40229774: 21c8 l32i.n a12, a1, 8 +40229776: 11d8 l32i.n a13, a1, 4 +40229778: 01e8 l32i.n a14, a1, 0 +4022977a: 10c112 addi a1, a1, 16 +4022977d: f00d ret.n + ... + +40229780 : +40229780: 144232 s8i a3, a2, 20 +40229783: f00d ret.n +40229785: 000000 ill + +40229788 : +40229788: 023d mov.n a3, a2 +4022978a: a268 l32i.n a6, a2, 40 +4022978c: 161282 l16ui a8, a2, 44 +4022978f: c258 l32i.n a5, a2, 48 +40229791: 606b21 l32r a2, 40201940 +40229794: 1e1342 l16ui a4, a3, 60 +40229797: 0020c0 memw +4022979a: 002272 l32i a7, a2, 0 +4022979d: 417170 srli a7, a7, 1 +402297a0: 08b747 bgeu a7, a4, 402297ac +402297a3: 0020c0 memw +402297a6: 002242 l32i a4, a2, 0 +402297a9: 414140 srli a4, a4, 1 +402297ac: c02850 sub a2, a8, a5 +402297af: 226a add.n a2, a2, a6 +402297b1: c04240 sub a4, a2, a4 +402297b4: 004496 bltz a4, 402297bc +402297b7: 175382 s16i a8, a3, 46 +402297ba: f00d ret.n +402297bc: c02650 sub a2, a6, a5 +402297bf: 0912a6 blti a2, 1, 402297cc +402297c2: 020c movi.n a2, 0 +402297c4: 175322 s16i a2, a3, 46 +402297c7: 0001c6 j 402297d2 +402297ca: 600000 neg a0, a0 +402297cd: 52c055 excw +402297d0: 0c1753 excw +402297d3: f00d02 l8ui a0, a13, 240 + ... + +402297d8 : +402297d8: f0c112 addi a1, a1, -16 +402297db: 21c9 s32i.n a12, a1, 8 +402297dd: 02cd mov.n a12, a2 +402297df: 161222 l16ui a2, a2, 44 +402297e2: 3109 s32i.n a0, a1, 12 +402297e4: 803320 add a3, a3, a2 +402297e7: 605621 l32r a2, 40201940 +402297ea: f43030 extui a3, a3, 0, 16 +402297ed: 0020c0 memw +402297f0: 002242 l32i a4, a2, 0 +402297f3: 165c32 s16i a3, a12, 44 +402297f6: 08b437 bgeu a4, a3, 40229802 +402297f9: 0020c0 memw +402297fc: 002222 l32i a2, a2, 0 +402297ff: 165c22 s16i a2, a12, 44 +40229802: 202cc0 or a2, a12, a12 +40229805: fff805 call0 40229788 +40229808: 604e31 l32r a3, 40201940 +4022980b: 0020c0 memw +4022980e: 002332 l32i a3, a3, 0 +40229811: 413230 srli a3, a3, 2 +40229814: 103237 bltu a2, a3, 40229828 +40229817: 240c32 l8ui a3, a12, 36 +4022981a: 02a022 movi a2, 2 +4022981d: 202320 or a2, a3, a2 +40229820: 244c22 s8i a2, a12, 36 +40229823: 0c2d mov.n a2, a12 +40229825: 025c45 call0 4022bdec +40229828: 3108 l32i.n a0, a1, 12 +4022982a: 21c8 l32i.n a12, a1, 8 +4022982c: 10c112 addi a1, a1, 16 +4022982f: f00d ret.n +40229831: 000000 ill + +40229834 : +40229834: f0c112 addi a1, a1, -16 +40229837: 0261c2 s32i a12, a1, 8 +4022983a: 036102 s32i a0, a1, 12 +4022983d: 20c220 or a12, a2, a2 +40229840: 429c beqz.n a2, 40229858 +40229842: 1228 l32i.n a2, a2, 4 +40229844: 128c beqz.n a2, 40229849 +40229846: ff5585 call0 40228da0 +40229849: 604231 l32r a3, 40201954 +4022984c: 3ba442 movi a4, 0x43b +4022984f: 202cc0 or a2, a12, a12 +40229852: 5f2d01 l32r a0, 40201508 +40229855: 0000c0 callx0 a0 +40229858: 3108 l32i.n a0, a1, 12 +4022985a: 21c8 l32i.n a12, a1, 8 +4022985c: 10c112 addi a1, a1, 16 +4022985f: f00d ret.n +40229861: 000000 ill + +40229864 : +40229864: f0c112 addi a1, a1, -16 +40229867: 3109 s32i.n a0, a1, 12 +40229869: 21c9 s32i.n a12, a1, 8 +4022986b: 928c beqz.n a2, 40229878 +4022986d: 02c8 l32i.n a12, a2, 0 +4022986f: fffc45 call0 40229834 +40229872: 0c2d mov.n a2, a12 +40229874: fffcc6 j 4022986b +40229877: 310800 srai a0, a0, 24 +4022987a: 21c8 l32i.n a12, a1, 8 +4022987c: 10c112 addi a1, a1, 16 +4022987f: f00d ret.n +40229881: 000000 ill + +40229884 : +40229884: f0c112 addi a1, a1, -16 +40229887: 21c9 s32i.n a12, a1, 8 +40229889: 02cd mov.n a12, a2 +4022988b: 4228 l32i.n a2, a2, 16 +4022988d: 3109 s32i.n a0, a1, 12 +4022988f: 11d9 s32i.n a13, a1, 4 +40229891: 379226 beqi a2, 10, 402298cc +40229894: 3422b6 bltui a2, 2, 402298cc +40229897: 212c22 l32i a2, a12, 132 +4022989a: 007216 beqz a2, 402298a5 +4022989d: ff5005 call0 40228da0 +402298a0: 020c movi.n a2, 0 +402298a2: 216c22 s32i a2, a12, 132 +402298a5: 202c22 l32i a2, a12, 128 +402298a8: 00a0d2 movi a13, 0 +402298ab: fffb85 call0 40229864 +402298ae: ffaf22 movi a2, -1 +402298b1: 1d5c22 s16i a2, a12, 58 +402298b4: 1e2c22 l32i a2, a12, 120 +402298b7: 206cd2 s32i a13, a12, 128 +402298ba: fffa85 call0 40229864 +402298bd: 1f2c22 l32i a2, a12, 124 +402298c0: fffa05 call0 40229864 +402298c3: 1e6cd2 s32i a13, a12, 120 +402298c6: 1f6cd2 s32i a13, a12, 124 +402298c9: 3b5cd2 s16i a13, a12, 118 +402298cc: 3108 l32i.n a0, a1, 12 +402298ce: 21c8 l32i.n a12, a1, 8 +402298d0: 11d8 l32i.n a13, a1, 4 +402298d2: 10c112 addi a1, a1, 16 +402298d5: f00d ret.n + ... + +402298d8 : +402298d8: f0c112 addi a1, a1, -16 +402298db: 21c9 s32i.n a12, a1, 8 +402298dd: 03cd mov.n a12, a3 +402298df: 0238 l32i.n a3, a2, 0 +402298e1: 3109 s32i.n a0, a1, 12 +402298e3: 0593c7 bne a3, a12, 402298ec +402298e6: 3338 l32i.n a3, a3, 12 +402298e8: 0008c6 j 4022990f +402298eb: 172100 excw +402298ee: 040c60 extui a0, a6, 12, 1 +402298f1: 0239 s32i.n a3, a2, 0 +402298f3: 639c beqz.n a3, 4022990d +402298f5: 3358 l32i.n a5, a3, 12 +402298f7: 0a9c57 bne a12, a5, 40229905 +402298fa: 048c beqz.n a4, 402298fe +402298fc: 0239 s32i.n a3, a2, 0 +402298fe: 3c28 l32i.n a2, a12, 12 +40229900: 3329 s32i.n a2, a3, 12 +40229902: 0002c6 j 40229911 +40229905: 140c movi.n a4, 1 +40229907: 053d mov.n a3, a5 +40229909: fff986 j 402298f3 +4022990c: 048c00 extui a8, a0, 12, 1 +4022990f: 0239 s32i.n a3, a2, 0 +40229911: 00a022 movi a2, 0 +40229914: 036c22 s32i a2, a12, 12 +40229917: 202cc0 or a2, a12, a12 +4022991a: fff685 call0 40229884 +4022991d: 4c28 l32i.n a2, a12, 16 +4022991f: 159226 beqi a2, 10, 40229938 +40229922: 121226 beqi a2, 1, 40229938 +40229925: 240c32 l8ui a3, a12, 36 +40229928: 0c6307 bbci a3, 0, 40229938 +4022992b: 220c movi.n a2, 2 +4022992d: 202320 or a2, a3, a2 +40229930: 244c22 s8i a2, a12, 36 +40229933: 0c2d mov.n a2, a12 +40229935: 024b45 call0 4022bdec +40229938: 3108 l32i.n a0, a1, 12 +4022993a: 020c movi.n a2, 0 +4022993c: 4c29 s32i.n a2, a12, 16 +4022993e: 21c8 l32i.n a12, a1, 8 +40229940: 10c112 addi a1, a1, 16 +40229943: f00d ret.n +40229945: 000000 ill + +40229948 : +40229948: f0c112 addi a1, a1, -16 +4022994b: 4238 l32i.n a3, a2, 16 +4022994d: 3109 s32i.n a0, a1, 12 +4022994f: 0a1326 beqi a3, 1, 4022995d +40229952: 240242 l8ui a4, a2, 36 +40229955: 031c movi.n a3, 16 +40229957: 203430 or a3, a4, a3 +4022995a: 244232 s8i a3, a2, 36 +4022995d: 01a032 movi a3, 1 +40229960: d7ff85 call0 4020195c +40229963: 032102 l32i a0, a1, 12 +40229966: 10c112 addi a1, a1, 16 +40229969: 000080 ret + +4022996c : +4022996c: f0c112 addi a1, a1, -16 +4022996f: 0261c2 s32i a12, a1, 8 +40229972: 036102 s32i a0, a1, 12 +40229975: 206330 or a6, a3, a3 +40229978: 04cd mov.n a12, a4 +4022997a: 049c beqz.n a4, 4022998e +4022997c: 041432 l16ui a3, a4, 8 +4022997f: 062d mov.n a2, a6 +40229981: ffe545 call0 402297d8 +40229984: 0c2d mov.n a2, a12 +40229986: ff4185 call0 40228da0 +40229989: 020c movi.n a2, 0 +4022998b: 000246 j 40229998 +4022998e: 020c movi.n a2, 0 +40229990: 049527 bne a5, a2, 40229998 +40229993: 032d mov.n a2, a3 +40229995: fffb05 call0 40229948 +40229998: 3108 l32i.n a0, a1, 12 +4022999a: 21c8 l32i.n a12, a1, 8 +4022999c: 10c112 addi a1, a1, 16 +4022999f: f00d ret.n +402299a1: 000000 ill + +402299a4 : +402299a4: 5fe821 l32r a2, 40201944 +402299a7: e0c112 addi a1, a1, -32 +402299aa: 61c9 s32i.n a12, a1, 24 +402299ac: 02c8 l32i.n a12, a2, 0 +402299ae: 41e9 s32i.n a14, a1, 16 +402299b0: 31f9 s32i.n a15, a1, 12 +402299b2: 7109 s32i.n a0, a1, 28 +402299b4: 51d9 s32i.n a13, a1, 20 +402299b6: 2e0c movi.n a14, 2 +402299b8: cf7c movi.n a15, -4 +402299ba: 04cc16 beqz a12, 40229a0a +402299bd: 212c42 l32i a4, a12, 132 +402299c0: 3cd8 l32i.n a13, a12, 12 +402299c2: 54ac beqz.n a4, 402299eb +402299c4: 232c62 l32i a6, a12, 140 +402299c7: 050c movi.n a5, 0 +402299c9: 0c3d mov.n a3, a12 +402299cb: 009616 beqz a6, 402299d8 +402299ce: 062c22 l32i a2, a12, 24 +402299d1: 0006c0 callx0 a6 +402299d4: 000146 j 402299dd +402299d7: 052d00 extui a2, a0, 29, 1 +402299da: fff905 call0 4022996c +402299dd: 52cc bnez.n a2, 402299e6 +402299df: 216c22 s32i a2, a12, 132 +402299e2: 000146 j 402299eb +402299e5: 837c00 moveqz a7, a12, a0 +402299e8: 191237 beq a2, a3, 40229a05 +402299eb: 240c22 l8ui a2, a12, 36 +402299ee: 136207 bbci a2, 0, 40229a05 +402299f1: 2022e0 or a2, a2, a14 +402299f4: 244c22 s8i a2, a12, 36 +402299f7: 0c2d mov.n a2, a12 +402299f9: 023f05 call0 4022bdec +402299fc: 240c22 l8ui a2, a12, 36 +402299ff: 1022f0 and a2, a2, a15 +40229a02: 244c22 s8i a2, a12, 36 +40229a05: 0dcd mov.n a12, a13 +40229a07: ffebc6 j 402299ba +40229a0a: 7108 l32i.n a0, a1, 28 +40229a0c: 61c8 l32i.n a12, a1, 24 +40229a0e: 51d8 l32i.n a13, a1, 20 +40229a10: 41e8 l32i.n a14, a1, 16 +40229a12: 31f8 l32i.n a15, a1, 12 +40229a14: 20c112 addi a1, a1, 32 +40229a17: f00d ret.n +40229a19: 000000 ill + +40229a1c : +40229a1c: f0c112 addi a1, a1, -16 +40229a1f: 11d9 s32i.n a13, a1, 4 +40229a21: 04dd mov.n a13, a4 +40229a23: 4248 l32i.n a4, a2, 16 +40229a25: 21c9 s32i.n a12, a1, 8 +40229a27: 3109 s32i.n a0, a1, 12 +40229a29: 02cd mov.n a12, a2 +40229a2b: 527c movi.n a2, -11 +40229a2d: 331426 beqi a4, 1, 40229a64 +40229a30: 639c beqz.n a3, 40229a4a +40229a32: 212c22 l32i a2, a12, 132 +40229a35: 628c beqz.n a2, 40229a3f +40229a37: ff3685 call0 40228da0 +40229a3a: 020c movi.n a2, 0 +40229a3c: 216c22 s32i a2, a12, 132 +40229a3f: 240c32 l8ui a3, a12, 36 +40229a42: 021c movi.n a2, 16 +40229a44: 202320 or a2, a3, a2 +40229a47: 244c22 s8i a2, a12, 36 +40229a4a: 00a022 movi a2, 0 +40229a4d: 131d27 beq a13, a2, 40229a64 +40229a50: 042c32 l32i a3, a12, 16 +40229a53: 0d83f6 bgeui a3, 8, 40229a64 +40229a56: 98a042 movi a4, 152 +40229a59: 075437 bbc a4, a3, 40229a64 +40229a5c: 203220 or a3, a2, a2 +40229a5f: 0c2d mov.n a2, a12 +40229a61: d7ef85 call0 4020195c +40229a64: 3108 l32i.n a0, a1, 12 +40229a66: 21c8 l32i.n a12, a1, 8 +40229a68: 11d8 l32i.n a13, a1, 4 +40229a6a: 10c112 addi a1, a1, 16 +40229a6d: f00d ret.n +40229a6f: 05a800 extui a10, a0, 24, 1 +40229a72: af4023 excw +40229a75: 402305 call0 40269ca8 <_irom0_text_end+0x3912c> + +40229a78 : +40229a78: d0c112 addi a1, a1, -48 +40229a7b: a1c9 s32i.n a12, a1, 40 +40229a7d: f4c4c1 l32r a12, 40226d90 +40229a80: 81e9 s32i.n a14, a1, 32 +40229a82: 0c28 l32i.n a2, a12, 0 +40229a84: b109 s32i.n a0, a1, 44 +40229a86: 221b addi.n a2, a2, 1 +40229a88: 91d9 s32i.n a13, a1, 36 +40229a8a: 71f9 s32i.n a15, a1, 28 +40229a8c: 0c29 s32i.n a2, a12, 0 +40229a8e: 5fad21 l32r a2, 40201944 +40229a91: 030c movi.n a3, 0 +40229a93: 02e8 l32i.n a14, a2, 0 +40229a95: 0139 s32i.n a3, a1, 0 +40229a97: 221e16 beqz a14, 40229cbc +40229a9a: 4e58 l32i.n a5, a14, 16 +40229a9c: 4e0e32 l8ui a3, a14, 78 +40229a9f: 112566 bnei a5, 2, 40229ab4 +40229aa2: f37221 l32r a2, 4022686c +40229aa5: 01a0d2 movi a13, 1 +40229aa8: 0020c0 memw +40229aab: 002222 l32i a2, a2, 0 +40229aae: 029327 bne a3, a2, 40229ab4 +40229ab1: 002ec6 j 40229b70 +40229ab4: f36f41 l32r a4, 40226870 +40229ab7: 01a0d2 movi a13, 1 +40229aba: 0020c0 memw +40229abd: 002422 l32i a2, a4, 0 +40229ac0: 029327 bne a3, a2, 40229ac6 +40229ac3: 002a46 j 40229b70 +40229ac6: ac0e22 l8ui a2, a14, 172 +40229ac9: 030216 beqz a2, 40229afd +40229acc: 2a2ef2 l32i a15, a14, 168 +40229acf: 320b addi.n a3, a2, -1 +40229ad1: ffda add.n a15, a15, a13 +40229ad3: ffe721 l32r a2, 40229a70 +40229ad6: 2a6ef2 s32i a15, a14, 168 +40229ad9: e75745 call0 40211050 +40229adc: 02bf27 bgeu a15, a2, 40229ae2 +40229adf: 0022c6 j 40229b6e +40229ae2: 020c movi.n a2, 0 +40229ae4: 2a6e22 s32i a2, a14, 168 +40229ae7: ac0e22 l8ui a2, a14, 172 +40229aea: 0472f6 bgeui a2, 7, 40229af2 +40229aed: 221b addi.n a2, a2, 1 +40229aef: ac4e22 s8i a2, a14, 172 +40229af2: 0e2d mov.n a2, a14 +40229af4: 021e05 call0 4022bcd8 +40229af7: 001cc6 j 40229b6e +40229afa: 000000 ill +40229afd: 1d9e22 l16si a2, a14, 58 +40229b00: 004296 bltz a2, 40229b08 +40229b03: 221b addi.n a2, a2, 1 +40229b05: 1d5e22 s16i a2, a14, 58 +40229b08: 1f2e22 l32i a2, a14, 124 +40229b0b: 05f216 beqz a2, 40229b6e +40229b0e: 1d9e42 l16si a4, a14, 58 +40229b11: 269e22 l16si a2, a14, 76 +40229b14: 562427 blt a4, a2, 40229b6e +40229b17: 1f2526 beqi a5, 2, 40229b3a +40229b1a: 241ef2 l16ui a15, a14, 72 +40229b1d: 259e22 l16si a2, a14, 74 +40229b20: 11ff00 slli a15, a15, 16 +40229b23: 31f3f0 srai a15, a15, 19 +40229b26: ff2a add.n a15, a15, a2 +40229b28: ffd321 l32r a2, 40229a74 +40229b2b: 201110 or a1, a1, a1 +40229b2e: e75205 call0 40211050 +40229b31: 401200 ssl a2 +40229b34: a12f00 sll a2, a15 +40229b37: 265e22 s16i a2, a14, 76 +40229b3a: 020c movi.n a2, 0 +40229b3c: 1d5e22 s16i a2, a14, 58 +40229b3f: 2b1e32 l16ui a3, a14, 86 +40229b42: 301e22 l16ui a2, a14, 96 +40229b45: f45030 extui a5, a3, 0, 16 +40229b48: f44020 extui a4, a2, 0, 16 +40229b4b: 02b547 bgeu a5, a4, 40229b51 +40229b4e: 202330 or a2, a3, a3 +40229b51: 1e1e32 l16ui a3, a14, 60 +40229b54: e42120 extui a2, a2, 1, 15 +40229b57: 2c5e22 s16i a2, a14, 88 +40229b5a: 1143f0 slli a4, a3, 1 +40229b5d: 02a247 bge a2, a4, 40229b63 +40229b60: 2c5e42 s16i a4, a14, 88 +40229b63: 2b5e32 s16i a3, a14, 86 +40229b66: 0e2d mov.n a2, a14 +40229b68: 201110 or a1, a1, a1 +40229b6b: 026b85 call0 4022c224 +40229b6e: 0d0c movi.n a13, 0 +40229b70: 4e28 l32i.n a2, a14, 16 +40229b72: 126266 bnei a2, 6, 40229b88 +40229b75: de58 l32i.n a5, a14, 52 +40229b77: 0c38 l32i.n a3, a12, 0 +40229b79: c03350 sub a3, a3, a5 +40229b7c: 50a052 movi a5, 80 +40229b7f: 05b537 bgeu a5, a3, 40229b88 +40229b82: 01cd42 addi a4, a13, 1 +40229b85: 74d040 extui a13, a4, 0, 8 +40229b88: 080e32 l8ui a3, a14, 8 +40229b8b: 0f0c movi.n a15, 0 +40229b8d: 606337 bbci a3, 3, 40229bf1 +40229b90: 024226 beqi a2, 4, 40229b96 +40229b93: 5a7266 bnei a2, 7, 40229bf1 +40229b96: 0cf8 l32i.n a15, a12, 0 +40229b98: de28 l32i.n a2, a14, 52 +40229b9a: 282e52 l32i a5, a14, 160 +40229b9d: c02f20 sub a2, a15, a2 +40229ba0: 1129 s32i.n a2, a1, 4 +40229ba2: 292e22 l32i a2, a14, 164 +40229ba5: 272ef2 l32i a15, a14, 156 +40229ba8: 822520 mull a2, a5, a2 +40229bab: faa032 movi a3, 250 +40229bae: 22fa add.n a2, a2, a15 +40229bb0: 2159 s32i.n a5, a1, 8 +40229bb2: 60c601 l32r a0, 40201ecc +40229bb5: 0000c0 callx0 a0 +40229bb8: 1148 l32i.n a4, a1, 4 +40229bba: 2158 l32i.n a5, a1, 8 +40229bbc: 09b247 bgeu a2, a4, 40229bc9 +40229bbf: 4d1b addi.n a4, a13, 1 +40229bc1: 74d040 extui a13, a4, 0, 8 +40229bc4: 1f0c movi.n a15, 1 +40229bc6: 0009c6 j 40229bf1 +40229bc9: ad0e22 l8ui a2, a14, 173 +40229bcc: faa032 movi a3, 250 +40229bcf: 822250 mull a2, a2, a5 +40229bd2: 8022f0 add a2, a2, a15 +40229bd5: 60bd01 l32r a0, 40201ecc +40229bd8: 0000c0 callx0 a0 +40229bdb: 012142 l32i a4, a1, 4 +40229bde: 00a0f2 movi a15, 0 +40229be1: 0cb247 bgeu a2, a4, 40229bf1 +40229be4: 0e2d mov.n a2, a14 +40229be6: 020705 call0 4022bc58 +40229be9: ad0e22 l8ui a2, a14, 173 +40229bec: 221b addi.n a2, a2, 1 +40229bee: ad4e22 s8i a2, a14, 173 +40229bf1: 202e22 l32i a2, a14, 128 +40229bf4: 929c beqz.n a2, 40229c11 +40229bf6: 269e32 l16si a3, a14, 76 +40229bf9: 0c68 l32i.n a6, a12, 0 +40229bfb: de78 l32i.n a7, a14, 52 +40229bfd: 903330 addx2 a3, a3, a3 +40229c00: c06670 sub a6, a6, a7 +40229c03: 1133f0 slli a3, a3, 1 +40229c06: 073637 bltu a6, a3, 40229c11 +40229c09: ffc585 call0 40229864 +40229c0c: 020c movi.n a2, 0 +40229c0e: 206e22 s32i a2, a14, 128 +40229c11: 4e28 l32i.n a2, a14, 16 +40229c13: 0b3266 bnei a2, 3, 40229c22 +40229c16: de38 l32i.n a3, a14, 52 +40229c18: 0c28 l32i.n a2, a12, 0 +40229c1a: c02230 sub a2, a2, a3 +40229c1d: 035c movi.n a3, 80 +40229c1f: 0003c6 j 40229c32 +40229c22: 930c movi.n a3, 9 +40229c24: 0d9237 bne a2, a3, 40229c35 +40229c27: de38 l32i.n a3, a14, 52 +40229c29: 002c22 l32i a2, a12, 0 +40229c2c: c02230 sub a2, a2, a3 +40229c2f: e0a132 movi a3, 0x1e0 +40229c32: 023327 bltu a3, a2, 40229c38 +40229c35: 04cd16 beqz a13, 40229c85 +40229c38: 0e2d mov.n a2, a14 +40229c3a: ffc485 call0 40229884 +40229c3d: 0138 l32i.n a3, a1, 0 +40229c3f: 3e28 l32i.n a2, a14, 12 +40229c41: 338c beqz.n a3, 40229c48 +40229c43: 3329 s32i.n a2, a3, 12 +40229c45: 000146 j 40229c4e +40229c48: 5f3f41 l32r a4, 40201944 +40229c4b: 006422 s32i a2, a4, 0 +40229c4e: 012f16 beqz a15, 40229c64 +40229c51: 111e72 l16ui a7, a14, 34 +40229c54: 101e62 l16ui a6, a14, 32 +40229c57: 0a2e32 l32i a3, a14, 40 +40229c5a: 172e22 l32i a2, a14, 92 +40229c5d: 5e4b addi.n a5, a14, 4 +40229c5f: 0e4d mov.n a4, a14 +40229c61: 01eb85 call0 4022bb1c +40229c64: 262e42 l32i a4, a14, 152 +40229c67: 548c beqz.n a4, 40229c70 +40229c69: 6e28 l32i.n a2, a14, 24 +40229c6b: 837c movi.n a3, -8 +40229c6d: 0004c0 callx0 a4 +40229c70: 5f3931 l32r a3, 40201954 +40229c73: 0e2d mov.n a2, a14 +40229c75: bca342 movi a4, 0x3bc +40229c78: 3ef8 l32i.n a15, a14, 12 +40229c7a: 5e2301 l32r a0, 40201508 +40229c7d: 0000c0 callx0 a0 +40229c80: 01e8 l32i.n a14, a1, 0 +40229c82: 000b86 j 40229cb4 +40229c85: 380e22 l8ui a2, a14, 56 +40229c88: 390e32 l8ui a3, a14, 57 +40229c8b: 221b addi.n a2, a2, 1 +40229c8d: 742020 extui a2, a2, 0, 8 +40229c90: 384e22 s8i a2, a14, 56 +40229c93: 3ef8 l32i.n a15, a14, 12 +40229c95: 1b3237 bltu a2, a3, 40229cb4 +40229c98: 020c movi.n a2, 0 +40229c9a: 252e42 l32i a4, a14, 148 +40229c9d: 384e22 s8i a2, a14, 56 +40229ca0: 64cc bnez.n a4, 40229caa +40229ca2: 0e2d mov.n a2, a14 +40229ca4: 021445 call0 4022bdec +40229ca7: 000246 j 40229cb4 +40229caa: 6e28 l32i.n a2, a14, 24 +40229cac: 0e3d mov.n a3, a14 +40229cae: 0004c0 callx0 a4 +40229cb1: fed216 beqz a2, 40229ca2 +40229cb4: 01e9 s32i.n a14, a1, 0 +40229cb6: 0fed mov.n a14, a15 +40229cb8: ff76c6 j 40229a97 +40229cbb: 24d100 extui a13, a0, 1, 3 +40229cbe: 5f .byte 0x5f +40229cbf: 0d58 l32i.n a5, a13, 0 +40229cc1: 040516 beqz a5, 40229d05 +40229cc4: d538 l32i.n a3, a5, 52 +40229cc6: 0c28 l32i.n a2, a12, 0 +40229cc8: c02230 sub a2, a2, a3 +40229ccb: e0a132 movi a3, 0x1e0 +40229cce: 2eb327 bgeu a3, a2, 40229d00 +40229cd1: 052d mov.n a2, a5 +40229cd3: 2159 s32i.n a5, a1, 8 +40229cd5: ffbac5 call0 40229884 +40229cd8: 2158 l32i.n a5, a1, 8 +40229cda: 3528 l32i.n a2, a5, 12 +40229cdc: 4e8c beqz.n a14, 40229ce4 +40229cde: 3e29 s32i.n a2, a14, 12 +40229ce0: 000086 j 40229ce6 +40229ce3: 0d2900 excw +40229ce6: 5f1b31 l32r a3, 40201954 +40229ce9: 052d mov.n a2, a5 +40229ceb: eea342 movi a4, 0x3ee +40229cee: 35f8 l32i.n a15, a5, 12 +40229cf0: 5e0601 l32r a0, 40201508 +40229cf3: 0000c0 callx0 a0 +40229cf6: 0e5d mov.n a5, a14 +40229cf8: 05ed mov.n a14, a5 +40229cfa: 0f5d mov.n a5, a15 +40229cfc: fff046 j 40229cc1 +40229cff: 35f800 extui a15, a0, 24, 4 +40229d02: fffc86 j 40229cf8 +40229d05: b108 l32i.n a0, a1, 44 +40229d07: a1c8 l32i.n a12, a1, 40 +40229d09: 91d8 l32i.n a13, a1, 36 +40229d0b: 81e8 l32i.n a14, a1, 32 +40229d0d: 71f8 l32i.n a15, a1, 28 +40229d0f: 30c112 addi a1, a1, 48 +40229d12: f00d ret.n +40229d14: fed8e0 excw +40229d17: 3f .byte 0x3f + +40229d18 : +40229d18: f0c112 addi a1, a1, -16 +40229d1b: 3109 s32i.n a0, a1, 12 +40229d1d: ffc845 call0 402299a4 +40229d20: fffd31 l32r a3, 40229d14 +40229d23: 000322 l8ui a2, a3, 0 +40229d26: 221b addi.n a2, a2, 1 +40229d28: 742020 extui a2, a2, 0, 8 +40229d2b: 004322 s8i a2, a3, 0 +40229d2e: 026207 bbci a2, 0, 40229d34 +40229d31: ffd445 call0 40229a78 +40229d34: 3108 l32i.n a0, a1, 12 +40229d36: 10c112 addi a1, a1, 16 +40229d39: f00d ret.n + ... + +40229d3c : +40229d3c: c0c112 addi a1, a1, -64 +40229d3f: e1c9 s32i.n a12, a1, 56 +40229d41: 02cd mov.n a12, a2 +40229d43: 4228 l32i.n a2, a2, 16 +40229d45: b1f9 s32i.n a15, a1, 44 +40229d47: f109 s32i.n a0, a1, 60 +40229d49: d1d9 s32i.n a13, a1, 52 +40229d4b: c1e9 s32i.n a14, a1, 48 +40229d4d: 20f330 or a15, a3, a3 +40229d50: 0e9266 bnei a2, 10, 40229d62 +40229d53: 5efe21 l32r a2, 4020194c +40229d56: 203cc0 or a3, a12, a12 +40229d59: ffb7c5 call0 402298d8 +40229d5c: 67a142 movi a4, 0x167 +40229d5f: 001846 j 40229dc4 +40229d62: 172c22 l32i a2, a12, 92 +40229d65: 0c3d mov.n a3, a12 +40229d67: 4129 s32i.n a2, a1, 16 +40229d69: 0c28 l32i.n a2, a12, 0 +40229d6b: ace8 l32i.n a14, a12, 40 +40229d6d: 0129 s32i.n a2, a1, 0 +40229d6f: 1c28 l32i.n a2, a12, 4 +40229d71: 262cd2 l32i a13, a12, 152 +40229d74: 1129 s32i.n a2, a1, 4 +40229d76: 101c22 l16ui a2, a12, 32 +40229d79: 5129 s32i.n a2, a1, 20 +40229d7b: 111c22 l16ui a2, a12, 34 +40229d7e: 6129 s32i.n a2, a1, 24 +40229d80: 062c22 l32i a2, a12, 24 +40229d83: 076122 s32i a2, a1, 28 +40229d86: 5eef21 l32r a2, 40201944 +40229d89: ffb4c5 call0 402298d8 +40229d8c: 1f2c22 l32i a2, a12, 124 +40229d8f: 128c beqz.n a2, 40229d94 +40229d91: ffad05 call0 40229864 +40229d94: 1e2c22 l32i a2, a12, 120 +40229d97: 128c beqz.n a2, 40229d9c +40229d99: ffac85 call0 40229864 +40229d9c: 202c22 l32i a2, a12, 128 +40229d9f: 128c beqz.n a2, 40229da4 +40229da1: ffac05 call0 40229864 +40229da4: 010f16 beqz a15, 40229db8 +40229da7: 062172 l32i a7, a1, 24 +40229daa: 052162 l32i a6, a1, 20 +40229dad: 4128 l32i.n a2, a1, 16 +40229daf: 514b addi.n a5, a1, 4 +40229db1: 014d mov.n a4, a1 +40229db3: 0e3d mov.n a3, a14 +40229db5: 01d645 call0 4022bb1c +40229db8: 5d8c beqz.n a13, 40229dc1 +40229dba: 7128 l32i.n a2, a1, 28 +40229dbc: 837c movi.n a3, -8 +40229dbe: 000dc0 callx0 a13 +40229dc1: 84a142 movi a4, 0x184 +40229dc4: 5ee431 l32r a3, 40201954 +40229dc7: 202cc0 or a2, a12, a12 +40229dca: 5dcf01 l32r a0, 40201508 +40229dcd: 0000c0 callx0 a0 +40229dd0: f108 l32i.n a0, a1, 60 +40229dd2: e1c8 l32i.n a12, a1, 56 +40229dd4: d1d8 l32i.n a13, a1, 52 +40229dd6: c1e8 l32i.n a14, a1, 48 +40229dd8: b1f8 l32i.n a15, a1, 44 +40229dda: 40c112 addi a1, a1, 64 +40229ddd: f00d ret.n + ... + +40229de0 : +40229de0: f0c112 addi a1, a1, -16 +40229de3: 130c movi.n a3, 1 +40229de5: 3109 s32i.n a0, a1, 12 +40229de7: fff545 call0 40229d3c +40229dea: 3108 l32i.n a0, a1, 12 +40229dec: 10c112 addi a1, a1, 16 +40229def: f00d ret.n +40229df1: 000000 ill + +40229df4 : +40229df4: f0c112 addi a1, a1, -16 +40229df7: 0161d2 s32i a13, a1, 4 +40229dfa: 20d220 or a13, a2, a2 +40229dfd: f78521 l32r a2, 40227c14 +40229e00: 5ed531 l32r a3, 40201954 +40229e03: 042222 l32i a2, a2, 16 +40229e06: 050c movi.n a5, 0 +40229e08: 58a442 movi a4, 0x458 +40229e0b: 21c9 s32i.n a12, a1, 8 +40229e0d: 3109 s32i.n a0, a1, 12 +40229e0f: 5dbd01 l32r a0, 40201504 +40229e12: 0000c0 callx0 a0 +40229e15: 02cd mov.n a12, a2 +40229e17: d28c beqz.n a2, 40229e28 +40229e19: 441c movi.n a4, 20 +40229e1b: 0d3d mov.n a3, a13 +40229e1d: 5c7d01 l32r a0, 40201014 <_irom0_text_start+0x4> +40229e20: 0000c0 callx0 a0 +40229e23: 1c28 l32i.n a2, a12, 4 +40229e25: fef685 call0 40228d90 +40229e28: 3108 l32i.n a0, a1, 12 +40229e2a: 0c2d mov.n a2, a12 +40229e2c: 11d8 l32i.n a13, a1, 4 +40229e2e: 21c8 l32i.n a12, a1, 8 +40229e30: 10c112 addi a1, a1, 16 +40229e33: f00d ret.n +40229e35: 000000 ill +40229e38: 83ac beqz.n a3, 40229e64 +40229e3a: fe .byte 0xfe +40229e3b: 3f .byte 0x3f + +40229e3c : +40229e3c: ffff31 l32r a3, 40229e38 +40229e3f: f3d441 l32r a4, 40226d90 +40229e42: 0328 l32i.n a2, a3, 0 +40229e44: 0448 l32i.n a4, a4, 0 +40229e46: 224a add.n a2, a2, a4 +40229e48: ffa216 beqz a2, 40229e46 +40229e4b: 0329 s32i.n a2, a3, 0 +40229e4d: f00d ret.n +40229e4f: 0b6800 excw +40229e52: 6c0000 excw +40229e55: 2299 s32i.n a9, a2, 8 +40229e57: d4c040 extui a12, a4, 0, 14 +40229e5a: 01 .byte 0x1 + ... + +40229e5c : +40229e5c: d0c112 addi a1, a1, -48 +40229e5f: 71f9 s32i.n a15, a1, 28 +40229e61: 74f020 extui a15, a2, 0, 8 +40229e64: f76c21 l32r a2, 40227c14 +40229e67: a1c9 s32i.n a12, a1, 40 +40229e69: 5ebac1 l32r a12, 40201954 +40229e6c: 2228 l32i.n a2, a2, 8 +40229e6e: 050c movi.n a5, 0 +40229e70: bda442 movi a4, 0x4bd +40229e73: 0c3d mov.n a3, a12 +40229e75: 91d9 s32i.n a13, a1, 36 +40229e77: 81e9 s32i.n a14, a1, 32 +40229e79: b109 s32i.n a0, a1, 44 +40229e7b: 006122 s32i a2, a1, 0 +40229e7e: 5da101 l32r a0, 40201504 +40229e81: 0000c0 callx0 a0 +40229e84: 02ed mov.n a14, a2 +40229e86: f3c2d1 l32r a13, 40226d90 +40229e89: 07f256 bnez a2, 40229f0c +40229e8c: 5eb021 l32r a2, 4020194c +40229e8f: 050c movi.n a5, 0 +40229e91: 0d68 l32i.n a6, a13, 0 +40229e93: 0238 l32i.n a3, a2, 0 +40229e95: 052d mov.n a2, a5 +40229e97: 139c beqz.n a3, 40229eac +40229e99: d348 l32i.n a4, a3, 52 +40229e9b: c04640 sub a4, a6, a4 +40229e9e: 033457 bltu a4, a5, 40229ea5 +40229ea1: 045d mov.n a5, a4 +40229ea3: 032d mov.n a2, a3 +40229ea5: 3338 l32i.n a3, a3, 12 +40229ea7: fffb06 j 40229e97 +40229eaa: 8c0000 excw +40229ead: f30512 l8ui a1, a5, 243 +40229eb0: ff .byte 0xff +40229eb1: 0128 l32i.n a2, a1, 0 +40229eb3: 050c movi.n a5, 0 +40229eb5: c4a442 movi a4, 0x4c4 +40229eb8: 0c3d mov.n a3, a12 +40229eba: 5d9201 l32r a0, 40201504 +40229ebd: 0000c0 callx0 a0 +40229ec0: 02ed mov.n a14, a2 +40229ec2: 046256 bnez a2, 40229f0c +40229ec5: 5e9f21 l32r a2, 40201944 +40229ec8: 050c movi.n a5, 0 +40229eca: 0d88 l32i.n a8, a13, 0 +40229ecc: 0238 l32i.n a3, a2, 0 +40229ece: 7fa072 movi a7, 127 +40229ed1: 052d mov.n a2, a5 +40229ed3: a39c beqz.n a3, 40229ef1 +40229ed5: 140362 l8ui a6, a3, 20 +40229ed8: 103767 bltu a7, a6, 40229eec +40229edb: 0d3f67 bltu a15, a6, 40229eec +40229ede: d348 l32i.n a4, a3, 52 +40229ee0: c04840 sub a4, a8, a4 +40229ee3: 053457 bltu a4, a5, 40229eec +40229ee6: 067d mov.n a7, a6 +40229ee8: 045d mov.n a5, a4 +40229eea: 032d mov.n a2, a3 +40229eec: 3338 l32i.n a3, a3, 12 +40229eee: fff846 j 40229ed3 +40229ef1: 128c beqz.n a2, 40229ef6 +40229ef3: ffeec5 call0 40229de0 +40229ef6: 0128 l32i.n a2, a1, 0 +40229ef8: 050c movi.n a5, 0 +40229efa: caa442 movi a4, 0x4ca +40229efd: 203cc0 or a3, a12, a12 +40229f00: 5d8101 l32r a0, 40201504 +40229f03: 0000c0 callx0 a0 +40229f06: 20e220 or a14, a2, a2 +40229f09: 081216 beqz a2, 40229f8e +40229f0c: b0a042 movi a4, 176 +40229f0f: 030c movi.n a3, 0 +40229f11: 0e2d mov.n a2, a14 +40229f13: 5c3f01 l32r a0, 40201010 <_irom0_text_start> +40229f16: 0000c0 callx0 a0 +40229f19: ffcd21 l32r a2, 40229e50 +40229f1c: 144ef2 s8i a15, a14, 20 +40229f1f: 395e22 s16i a2, a14, 114 +40229f22: 5e8721 l32r a2, 40201940 +40229f25: 0c0c movi.n a12, 0 +40229f27: 0020c0 memw +40229f2a: 0238 l32i.n a3, a2, 0 +40229f2c: 0020c0 memw +40229f2f: 0228 l32i.n a2, a2, 0 +40229f31: 3a5ec2 s16i a12, a14, 116 +40229f34: 175e22 s16i a2, a14, 46 +40229f37: 80af22 movi a2, -128 +40229f3a: 0a4e22 s8i a2, a14, 10 +40229f3d: 18a222 movi a2, 0x218 +40229f40: 1e5e22 s16i a2, a14, 60 +40229f43: 420c movi.n a2, 4 +40229f45: 265e22 s16i a2, a14, 76 +40229f48: 255e22 s16i a2, a14, 74 +40229f4b: f27c movi.n a2, -1 +40229f4d: 1d5e22 s16i a2, a14, 58 +40229f50: 120c movi.n a2, 1 +40229f52: 165e32 s16i a3, a14, 44 +40229f55: 094ec2 s8i a12, a14, 9 +40229f58: 245ec2 s16i a12, a14, 72 +40229f5b: 2b5e22 s16i a2, a14, 86 +40229f5e: ffedc5 call0 40229e3c +40229f61: 1a6e22 s32i a2, a14, 104 +40229f64: 176e22 s32i a2, a14, 92 +40229f67: 146e22 s32i a2, a14, 80 +40229f6a: 1b6e22 s32i a2, a14, 108 +40229f6d: 0d28 l32i.n a2, a13, 0 +40229f6f: 384ec2 s8i a12, a14, 56 +40229f72: de29 s32i.n a2, a14, 52 +40229f74: ffb821 l32r a2, 40229e54 +40229f77: ad4ec2 s8i a12, a14, 173 +40229f7a: 236e22 s32i a2, a14, 140 +40229f7d: ffb621 l32r a2, 40229e58 +40229f80: 276e22 s32i a2, a14, 156 +40229f83: 7fb521 l32r a2, 40209e58 +40229f86: 286e22 s32i a2, a14, 160 +40229f89: 920c movi.n a2, 9 +40229f8b: 296e22 s32i a2, a14, 164 +40229f8e: b108 l32i.n a0, a1, 44 +40229f90: 0e2d mov.n a2, a14 +40229f92: a1c8 l32i.n a12, a1, 40 +40229f94: 91d8 l32i.n a13, a1, 36 +40229f96: 81e8 l32i.n a14, a1, 32 +40229f98: 71f8 l32i.n a15, a1, 28 +40229f9a: 30c112 addi a1, a1, 48 +40229f9d: f00d ret.n + ... + +40229fa0 : +40229fa0: f0c112 addi a1, a1, -16 +40229fa3: 024c movi.n a2, 64 +40229fa5: 3109 s32i.n a0, a1, 12 +40229fa7: ffeb45 call0 40229e5c +40229faa: 3108 l32i.n a0, a1, 12 +40229fac: 10c112 addi a1, a1, 16 +40229faf: f00d ret.n +40229fb1: 000000 ill + +40229fb4 : +40229fb4: f0c112 addi a1, a1, -16 +40229fb7: 21c9 s32i.n a12, a1, 8 +40229fb9: f4c020 extui a12, a2, 0, 16 +40229fbc: 032d mov.n a2, a3 +40229fbe: 3109 s32i.n a0, a1, 12 +40229fc0: fe1b85 call0 4022817c +40229fc3: 429c beqz.n a2, 40229fdb +40229fc5: 181222 l16ui a2, a2, 48 +40229fc8: f28c beqz.n a2, 40229fdb +40229fca: d8c222 addi a2, a2, -40 +40229fcd: 023d mov.n a3, a2 +40229fcf: f42020 extui a2, a2, 0, 16 +40229fd2: 02bc27 bgeu a12, a2, 40229fd8 +40229fd5: 203cc0 or a3, a12, a12 +40229fd8: f4c030 extui a12, a3, 0, 16 +40229fdb: 3108 l32i.n a0, a1, 12 +40229fdd: 0c2d mov.n a2, a12 +40229fdf: 21c8 l32i.n a12, a1, 8 +40229fe1: 10c112 addi a1, a1, 16 +40229fe4: f00d ret.n + ... + +40229fe8 : +40229fe8: e0c112 addi a1, a1, -32 +40229feb: 0361f2 s32i a15, a1, 12 +40229fee: 20f330 or a15, a3, a3 +40229ff1: 4238 l32i.n a3, a2, 16 +40229ff3: 61c9 s32i.n a12, a1, 24 +40229ff5: 41e9 s32i.n a14, a1, 16 +40229ff7: 7109 s32i.n a0, a1, 28 +40229ff9: 51d9 s32i.n a13, a1, 20 +40229ffb: 02cd mov.n a12, a2 +40229ffd: 05ed mov.n a14, a5 +40229fff: f44040 extui a4, a4, 0, 16 +4022a002: 127c movi.n a2, -15 +4022a004: 0d6356 bnez a3, 4022a0de +4022a007: a27c movi.n a2, -6 +4022a009: 0d1f16 beqz a15, 4022a0de +4022a00c: 0f28 l32i.n a2, a15, 0 +4022a00e: 115c42 s16i a4, a12, 34 +4022a011: 1c29 s32i.n a2, a12, 4 +4022a013: 0c28 l32i.n a2, a12, 0 +4022a015: f2cc bnez.n a2, 4022a028 +4022a017: 04cc22 addi a2, a12, 4 +4022a01a: fe1605 call0 4022817c +4022a01d: 023d mov.n a3, a2 +4022a01f: c27c movi.n a2, -4 +4022a021: 0b9316 beqz a3, 4022a0de +4022a024: 1328 l32i.n a2, a3, 4 +4022a026: 0c29 s32i.n a2, a12, 0 +4022a028: 101cd2 l16ui a13, a12, 32 +4022a02b: 005d56 bnez a13, 4022a034 +4022a02e: d78b45 call0 402018e4 +4022a031: 105c22 s16i a2, a12, 32 +4022a034: ffe045 call0 40229e3c +4022a037: 176c22 s32i a2, a12, 92 +4022a03a: 220b addi.n a2, a2, -1 +4022a03c: 146c22 s32i a2, a12, 80 +4022a03f: 1b6c22 s32i a2, a12, 108 +4022a042: 5e3f21 l32r a2, 40201940 +4022a045: 030c movi.n a3, 0 +4022a047: 0020c0 memw +4022a04a: 0248 l32i.n a4, a2, 0 +4022a04c: ac39 s32i.n a3, a12, 40 +4022a04e: 165c42 s16i a4, a12, 44 +4022a051: 0020c0 memw +4022a054: 0248 l32i.n a4, a2, 0 +4022a056: 0020c0 memw +4022a059: 0228 l32i.n a2, a2, 0 +4022a05b: cc39 s32i.n a3, a12, 48 +4022a05d: 305c22 s16i a2, a12, 96 +4022a060: 18a222 movi a2, 0x218 +4022a063: 1e5c22 s16i a2, a12, 60 +4022a066: 0f3d mov.n a3, a15 +4022a068: 175c42 s16i a4, a12, 46 +4022a06b: 18a222 movi a2, 0x218 +4022a06e: fff445 call0 40229fb4 +4022a071: 1e5c22 s16i a2, a12, 60 +4022a074: a02220 addx4 a2, a2, a2 +4022a077: 130c movi.n a3, 1 +4022a079: 1122f0 slli a2, a2, 1 +4022a07c: 2b5c32 s16i a3, a12, 86 +4022a07f: 2c5c22 s16i a2, a12, 88 +4022a082: 246ce2 s32i a14, a12, 144 +4022a085: 230c movi.n a3, 2 +4022a087: 0c2d mov.n a2, a12 +4022a089: 019885 call0 4022ba14 +4022a08c: 04e256 bnez a2, 4022a0de +4022a08f: 220c movi.n a2, 2 +4022a091: 4c29 s32i.n a2, a12, 16 +4022a093: 2dbc beqz.n a13, 4022a0c9 +4022a095: 5e2e31 l32r a3, 40201950 +4022a098: 0328 l32i.n a2, a3, 0 +4022a09a: 069c27 bne a12, a2, 4022a0a4 +4022a09d: 3c28 l32i.n a2, a12, 12 +4022a09f: 000906 j 4022a0c7 +4022a0a2: 310000 srai a0, a0, 16 +4022a0a5: 5e29 s32i.n a2, a14, 20 +4022a0a7: 040c movi.n a4, 0 +4022a0a9: 0329 s32i.n a2, a3, 0 +4022a0ab: 629c beqz.n a2, 4022a0c5 +4022a0ad: 3258 l32i.n a5, a2, 12 +4022a0af: 0a9c57 bne a12, a5, 4022a0bd +4022a0b2: 048c beqz.n a4, 4022a0b6 +4022a0b4: 0329 s32i.n a2, a3, 0 +4022a0b6: 3c38 l32i.n a3, a12, 12 +4022a0b8: 3239 s32i.n a3, a2, 12 +4022a0ba: 0002c6 j 4022a0c9 +4022a0bd: 140c movi.n a4, 1 +4022a0bf: 052d mov.n a2, a5 +4022a0c1: fff986 j 4022a0ab +4022a0c4: 048c00 extui a8, a0, 12, 1 +4022a0c7: 0329 s32i.n a2, a3, 0 +4022a0c9: 5e1e21 l32r a2, 40201944 +4022a0cc: 002232 l32i a3, a2, 0 +4022a0cf: 0062c2 s32i a12, a2, 0 +4022a0d2: 3c39 s32i.n a3, a12, 12 +4022a0d4: 023fc5 call0 4022c4d4 +4022a0d7: 0c2d mov.n a2, a12 +4022a0d9: 01d105 call0 4022bdec +4022a0dc: 020c movi.n a2, 0 +4022a0de: 7108 l32i.n a0, a1, 28 +4022a0e0: 61c8 l32i.n a12, a1, 24 +4022a0e2: 51d8 l32i.n a13, a1, 20 +4022a0e4: 41e8 l32i.n a14, a1, 16 +4022a0e6: 31f8 l32i.n a15, a1, 12 +4022a0e8: 20c112 addi a1, a1, 32 +4022a0eb: f00d ret.n +4022a0ed: 000000 ill +4022a0f0: fed8f4 excw +4022a0f3: 3f .byte 0x3f +4022a0f4: e0c112 addi a1, a1, -32 +4022a0f7: 0561d2 s32i a13, a1, 20 +4022a0fa: 20d220 or a13, a2, a2 +4022a0fd: 042222 l32i a2, a2, 16 +4022a100: 61c9 s32i.n a12, a1, 24 +4022a102: 41e9 s32i.n a14, a1, 16 +4022a104: 7109 s32i.n a0, a1, 28 +4022a106: 31f9 s32i.n a15, a1, 12 +4022a108: 0d0222 l8ui a2, a2, 13 +4022a10b: 03cd mov.n a12, a3 +4022a10d: 00a1e2 movi a14, 0x100 +4022a110: 6e6207 bbci a2, 0, 4022a182 +4022a113: 032d mov.n a2, a3 +4022a115: ff74c5 call0 40229864 +4022a118: 0c0c movi.n a12, 0 +4022a11a: 001fc6 j 4022a19d +4022a11d: 042c82 l32i a8, a12, 16 +4022a120: fff421 l32r a2, 4022a0f0 +4022a123: 050842 l8ui a4, a8, 5 +4022a126: 002232 l32i a3, a2, 0 +4022a129: 040862 l8ui a6, a8, 4 +4022a12c: 060822 l8ui a2, a8, 6 +4022a12f: 114480 slli a4, a4, 8 +4022a132: 112200 slli a2, a2, 16 +4022a135: 205460 or a5, a4, a6 +4022a138: 204250 or a4, a2, a5 +4022a13b: 070822 l8ui a2, a8, 7 +4022a13e: 061d72 l16ui a7, a13, 12 +4022a141: 012280 slli a2, a2, 24 +4022a144: 202240 or a2, a2, a4 +4022a147: 061c42 l16ui a4, a12, 12 +4022a14a: 807730 add a7, a7, a3 +4022a14d: c04740 sub a4, a7, a4 +4022a150: c04420 sub a4, a4, a2 +4022a153: 032496 bltz a4, 4022a189 +4022a156: 0d0822 l8ui a2, a8, 13 +4022a159: 1c6207 bbci a2, 0, 4022a179 +4022a15c: 4d48 l32i.n a4, a13, 16 +4022a15e: 0d0422 l8ui a2, a4, 13 +4022a161: 0c0432 l8ui a3, a4, 12 +4022a164: 112280 slli a2, a2, 8 +4022a167: 202230 or a2, a2, a3 +4022a16a: 2022e0 or a2, a2, a14 +4022a16d: f42020 extui a2, a2, 0, 16 +4022a170: 0c4422 s8i a2, a4, 12 +4022a173: 412820 srli a2, a2, 8 +4022a176: 0d4422 s8i a2, a4, 13 +4022a179: 0cf8 l32i.n a15, a12, 0 +4022a17b: 0c2d mov.n a2, a12 +4022a17d: ff6b45 call0 40229834 +4022a180: 0fcd mov.n a12, a15 +4022a182: 7c9c beqz.n a12, 4022a19d +4022a184: ffe546 j 4022a11d +4022a187: 200000 or a0, a0, a0 +4022a18a: a6c077 bnall a0, a7, 4022a134 +4022a18d: 300d17 bnone a13, a1, 4022a1c1 +4022a190: 30c032 addi a3, a0, 48 +4022a193: 28f430 excw +4022a196: 321d excw +4022a198: 065d mov.n a5, a6 +4022a19a: fee005 call0 40228f9c +4022a19d: 7108 l32i.n a0, a1, 28 +4022a19f: 0dc9 s32i.n a12, a13, 0 +4022a1a1: 41e8 l32i.n a14, a1, 16 +4022a1a3: 61c8 l32i.n a12, a1, 24 +4022a1a5: 51d8 l32i.n a13, a1, 20 +4022a1a7: 31f8 l32i.n a15, a1, 12 +4022a1a9: 20c112 addi a1, a1, 32 +4022a1ac: f00d ret.n +4022a1ae: ec0000 excw +4022a1b1: fed8 l32i.n a13, a14, 60 +4022a1b3: 3f .byte 0x3f +4022a1b4: fed8f0 excw +4022a1b7: 3f .byte 0x3f +4022a1b8: d8f8 l32i.n a15, a8, 52 +4022a1ba: fe .byte 0xfe +4022a1bb: 3f .byte 0x3f +4022a1bc: d8ea add.n a13, a8, a14 +4022a1be: fe .byte 0xfe +4022a1bf: 3f .byte 0x3f +4022a1c0: d8fc bnez.n a8, 4022a201 +4022a1c2: fe .byte 0xfe +4022a1c3: 3f .byte 0x3f +4022a1c4: ff .byte 0xff +4022a1c5: ffffc0 excw +4022a1c8: fed8e4 excw +4022a1cb: 3f .byte 0x3f +4022a1cc: d8e8 l32i.n a14, a8, 52 +4022a1ce: fe .byte 0xfe +4022a1cf: 3f .byte 0x3f +4022a1d0: d0c112 addi a1, a1, -48 +4022a1d3: a1c9 s32i.n a12, a1, 40 +4022a1d5: 02cd mov.n a12, a2 +4022a1d7: fff621 l32r a2, 4022a1b0 +4022a1da: b109 s32i.n a0, a1, 44 +4022a1dc: 91d9 s32i.n a13, a1, 36 +4022a1de: 81e9 s32i.n a14, a1, 32 +4022a1e0: 71f9 s32i.n a15, a1, 28 +4022a1e2: 000222 l8ui a2, a2, 0 +4022a1e5: 02e247 bbsi a2, 4, 4022a1eb +4022a1e8: 00bc06 j 4022a4dc +4022a1eb: ffc141 l32r a4, 4022a0f0 +4022a1ee: 192c32 l32i a3, a12, 100 +4022a1f1: 002452 l32i a5, a4, 0 +4022a1f4: 301c72 l16ui a7, a12, 96 +4022a1f7: 1a2c22 l32i a2, a12, 104 +4022a1fa: c08350 sub a8, a3, a5 +4022a1fd: 806720 add a6, a7, a2 +4022a200: ffedd1 l32r a13, 4022a1b4 +4022a203: 023896 bltz a8, 4022a22a +4022a206: 079357 bne a3, a5, 4022a211 +4022a209: 0d38 l32i.n a3, a13, 0 +4022a20b: c03230 sub a3, a2, a3 +4022a20e: 018396 bltz a3, 4022a22a +4022a211: 0d38 l32i.n a3, a13, 0 +4022a213: 3b9237 bne a2, a3, 4022a252 +4022a216: ffe821 l32r a2, 4022a1b8 +4022a219: 0228 l32i.n a2, a2, 0 +4022a21b: 0e0232 l8ui a3, a2, 14 +4022a21e: 0f0222 l8ui a2, a2, 15 +4022a221: 112280 slli a2, a2, 8 +4022a224: 202230 or a2, a2, a3 +4022a227: 27b727 bgeu a7, a2, 4022a252 +4022a22a: ffe321 l32r a2, 4022a1b8 +4022a22d: 0228 l32i.n a2, a2, 0 +4022a22f: 0e0232 l8ui a3, a2, 14 +4022a232: 0f0222 l8ui a2, a2, 15 +4022a235: 196c52 s32i a5, a12, 100 +4022a238: 112280 slli a2, a2, 8 +4022a23b: 202230 or a2, a2, a3 +4022a23e: 0d38 l32i.n a3, a13, 0 +4022a240: 305c22 s16i a2, a12, 96 +4022a243: 1a6c32 s32i a3, a12, 104 +4022a246: 828c beqz.n a2, 4022a252 +4022a248: ac0c22 l8ui a2, a12, 172 +4022a24b: 328c beqz.n a2, 4022a252 +4022a24d: 020c movi.n a2, 0 +4022a24f: ac4c22 s8i a2, a12, 172 +4022a252: 0d58 l32i.n a5, a13, 0 +4022a254: 142c22 l32i a2, a12, 80 +4022a257: c02520 sub a2, a5, a2 +4022a25a: 5f12e6 bgei a2, 1, 4022a2bd +4022a25d: 030c movi.n a3, 0 +4022a25f: 385c32 s16i a3, a12, 112 +4022a262: ffd631 l32r a3, 4022a1bc +4022a265: 001332 l16ui a3, a3, 0 +4022a268: 138c beqz.n a3, 4022a26d +4022a26a: 01f2c6 j 4022aa39 +4022a26d: 301c52 l16ui a5, a12, 96 +4022a270: 1a2c32 l32i a3, a12, 104 +4022a273: 353a add.n a3, a5, a3 +4022a275: 021637 beq a6, a3, 4022a27b +4022a278: 01ef46 j 4022aa39 +4022a27b: 1d1c32 l16ui a3, a12, 58 +4022a27e: 0263f7 bbci a3, 15, 4022a284 +4022a281: 01ed06 j 4022aa39 +4022a284: 7b1256 bnez a2, 4022aa39 +4022a287: 540c22 l8ui a2, a12, 84 +4022a28a: 221b addi.n a2, a2, 1 +4022a28c: 742020 extui a2, a2, 0, 8 +4022a28f: 544c22 s8i a2, a12, 84 +4022a292: 1642b6 bltui a2, 4, 4022a2ac +4022a295: 2b1c32 l16ui a3, a12, 86 +4022a298: 1e1c22 l16ui a2, a12, 60 +4022a29b: 232a add.n a2, a3, a2 +4022a29d: f42020 extui a2, a2, 0, 16 +4022a2a0: 023327 bltu a3, a2, 4022a2a6 +4022a2a3: 004a86 j 4022a3d1 +4022a2a6: 2b5c22 s16i a2, a12, 86 +4022a2a9: 004906 j 4022a3d1 +4022a2ac: 023226 beqi a2, 3, 4022a2b2 +4022a2af: 004786 j 4022a3d1 +4022a2b2: 0c2d mov.n a2, a12 +4022a2b4: 016f85 call0 4022b9b0 +4022a2b7: 004586 j 4022a3d1 +4022a2ba: 000000 ill +4022a2bd: 172c32 l32i a3, a12, 92 +4022a2c0: c03530 sub a3, a5, a3 +4022a2c3: 0213a6 blti a3, 1, 4022a2c9 +4022a2c6: 004086 j 4022a3cc +4022a2c9: 240c62 l8ui a6, a12, 36 +4022a2cc: 0d6627 bbci a6, 2, 4022a2dd +4022a2cf: b37c movi.n a3, -5 +4022a2d1: 103630 and a3, a6, a3 +4022a2d4: 244c32 s8i a3, a12, 36 +4022a2d7: 2c1c32 l16ui a3, a12, 88 +4022a2da: 2b5c32 s16i a3, a12, 86 +4022a2dd: 241c32 l16ui a3, a12, 72 +4022a2e0: 251c62 l16ui a6, a12, 74 +4022a2e3: 113300 slli a3, a3, 16 +4022a2e6: 313330 srai a3, a3, 19 +4022a2e9: 336a add.n a3, a3, a6 +4022a2eb: 265c32 s16i a3, a12, 76 +4022a2ee: 391c32 l16ui a3, a12, 114 +4022a2f1: f42020 extui a2, a2, 0, 16 +4022a2f4: 385c22 s16i a2, a12, 112 +4022a2f7: 223a add.n a2, a2, a3 +4022a2f9: 070c movi.n a7, 0 +4022a2fb: 395c22 s16i a2, a12, 114 +4022a2fe: 4c28 l32i.n a2, a12, 16 +4022a300: 4e4c72 s8i a7, a12, 78 +4022a303: 544c72 s8i a7, a12, 84 +4022a306: 146c52 s32i a5, a12, 80 +4022a309: 2842b6 bltui a2, 4, 4022a335 +4022a30c: 2b1ce2 l16ui a14, a12, 86 +4022a30f: 2c1c22 l16ui a2, a12, 88 +4022a312: 06be27 bgeu a14, a2, 4022a31c +4022a315: 1e1c22 l16ui a2, a12, 60 +4022a318: 000386 j 4022a32a +4022a31b: 1c2200 excw +4022a31e: 1e .byte 0x1e +4022a31f: 0e3d mov.n a3, a14 +4022a321: 822220 mull a2, a2, a2 +4022a324: 5e3d01 l32r a0, 40201c18 +4022a327: 0000c0 callx0 a0 +4022a32a: 2e2a add.n a2, a14, a2 +4022a32c: f42020 extui a2, a2, 0, 16 +4022a32f: 02be27 bgeu a14, a2, 4022a335 +4022a332: 2b5c22 s16i a2, a12, 86 +4022a335: 1f0c movi.n a15, 1 +4022a337: 1f2ce2 l32i a14, a12, 124 +4022a33a: 703e16 beqz a14, 4022aa41 +4022a33d: 4e78 l32i.n a7, a14, 16 +4022a33f: 5b6c41 l32r a4, 402010f0 +4022a342: 050732 l8ui a3, a7, 5 +4022a345: 040782 l8ui a8, a7, 4 +4022a348: 060722 l8ui a2, a7, 6 +4022a34b: 113380 slli a3, a3, 8 +4022a34e: 205380 or a5, a3, a8 +4022a351: 112200 slli a2, a2, 16 +4022a354: 203250 or a3, a2, a5 +4022a357: 070722 l8ui a2, a7, 7 +4022a35a: 012280 slli a2, a2, 24 +4022a35d: 202230 or a2, a2, a3 +4022a360: 753820 extui a3, a2, 24, 8 +4022a363: 015280 slli a5, a2, 24 +4022a366: 205530 or a5, a5, a3 +4022a369: 103240 and a3, a2, a4 +4022a36c: 113380 slli a3, a3, 8 +4022a36f: 412820 srli a2, a2, 8 +4022a372: 203530 or a3, a5, a3 +4022a375: 102240 and a2, a2, a4 +4022a378: 202320 or a2, a3, a2 +4022a37b: 0d38 l32i.n a3, a13, 0 +4022a37d: 050c movi.n a5, 0 +4022a37f: c02230 sub a2, a2, a3 +4022a382: 0d0732 l8ui a3, a7, 13 +4022a385: 143030 extui a3, a3, 0, 2 +4022a388: 935f30 movnez a5, a15, a3 +4022a38b: 061e32 l16ui a3, a14, 12 +4022a38e: 353a add.n a3, a5, a3 +4022a390: 223a add.n a2, a2, a3 +4022a392: 0212a6 blti a2, 1, 4022a398 +4022a395: 01ab46 j 4022aa46 +4022a398: 0e28 l32i.n a2, a14, 0 +4022a39a: 1f6c22 s32i a2, a12, 124 +4022a39d: 1e28 l32i.n a2, a14, 4 +4022a39f: fec4c5 call0 40228fec +4022a3a2: 381c22 l16ui a2, a12, 112 +4022a3a5: b28c beqz.n a2, 4022a3b4 +4022a3a7: 4e38 l32i.n a3, a14, 16 +4022a3a9: 0d0332 l8ui a3, a3, 13 +4022a3ac: 046307 bbci a3, 0, 4022a3b4 +4022a3af: 220b addi.n a2, a2, -1 +4022a3b1: 385c22 s16i a2, a12, 112 +4022a3b4: 012e22 l32i a2, a14, 4 +4022a3b7: fec345 call0 40228fec +4022a3ba: 3a1c32 l16ui a3, a12, 116 +4022a3bd: c02320 sub a2, a3, a2 +4022a3c0: 3a5c22 s16i a2, a12, 116 +4022a3c3: 202ee0 or a2, a14, a14 +4022a3c6: ff46c5 call0 40229834 +4022a3c9: ffda86 j 4022a337 +4022a3cc: 020c movi.n a2, 0 +4022a3ce: 385c22 s16i a2, a12, 112 +4022a3d1: 01a0f2 movi a15, 1 +4022a3d4: 1e2ce2 l32i a14, a12, 120 +4022a3d7: 095e16 beqz a14, 4022a470 +4022a3da: 042e62 l32i a6, a14, 16 +4022a3dd: 5b4431 l32r a3, 402010f0 +4022a3e0: 050652 l8ui a5, a6, 5 +4022a3e3: 040692 l8ui a9, a6, 4 +4022a3e6: 060622 l8ui a2, a6, 6 +4022a3e9: 115580 slli a5, a5, 8 +4022a3ec: 208590 or a8, a5, a9 +4022a3ef: 112200 slli a2, a2, 16 +4022a3f2: 205280 or a5, a2, a8 +4022a3f5: 070622 l8ui a2, a6, 7 +4022a3f8: 002d72 l32i a7, a13, 0 +4022a3fb: 012280 slli a2, a2, 24 +4022a3fe: 202250 or a2, a2, a5 +4022a401: 755820 extui a5, a2, 24, 8 +4022a404: 018280 slli a8, a2, 24 +4022a407: 208850 or a8, a8, a5 +4022a40a: 105230 and a5, a2, a3 +4022a40d: 115580 slli a5, a5, 8 +4022a410: 412820 srli a2, a2, 8 +4022a413: 205850 or a5, a8, a5 +4022a416: 102230 and a2, a2, a3 +4022a419: 202520 or a2, a5, a2 +4022a41c: 0d0652 l8ui a5, a6, 13 +4022a41f: c02720 sub a2, a7, a2 +4022a422: 146050 extui a6, a5, 0, 2 +4022a425: 050c movi.n a5, 0 +4022a427: 935f60 movnez a5, a15, a6 +4022a42a: 061e62 l16ui a6, a14, 12 +4022a42d: 556a add.n a5, a5, a6 +4022a42f: c02250 sub a2, a2, a5 +4022a432: 03a296 bltz a2, 4022a470 +4022a435: 172c22 l32i a2, a12, 92 +4022a438: c07720 sub a7, a7, a2 +4022a43b: 3117e6 bgei a7, 1, 4022a470 +4022a43e: 0e28 l32i.n a2, a14, 0 +4022a440: 1e6c22 s32i a2, a12, 120 +4022a443: 1e28 l32i.n a2, a14, 4 +4022a445: feba45 call0 40228fec +4022a448: 381c22 l16ui a2, a12, 112 +4022a44b: b28c beqz.n a2, 4022a45a +4022a44d: 4e58 l32i.n a5, a14, 16 +4022a44f: 0d0552 l8ui a5, a5, 13 +4022a452: 046507 bbci a5, 0, 4022a45a +4022a455: 220b addi.n a2, a2, -1 +4022a457: 385c22 s16i a2, a12, 112 +4022a45a: 1e28 l32i.n a2, a14, 4 +4022a45c: feb8c5 call0 40228fec +4022a45f: 3a1c52 l16ui a5, a12, 116 +4022a462: c02520 sub a2, a5, a2 +4022a465: 3a5c22 s16i a2, a12, 116 +4022a468: 0e2d mov.n a2, a14 +4022a46a: ff3c85 call0 40229834 +4022a46d: ffd8c6 j 4022a3d4 +4022a470: 102c22 l32i a2, a12, 64 +4022a473: 065216 beqz a2, 4022a4dc +4022a476: 112c52 l32i a5, a12, 68 +4022a479: 0d38 l32i.n a3, a13, 0 +4022a47b: c05530 sub a5, a5, a3 +4022a47e: 05a5d6 bgez a5, 4022a4dc +4022a481: f24331 l32r a3, 40226d90 +4022a484: 241c62 l16ui a6, a12, 72 +4022a487: 0338 l32i.n a3, a3, 0 +4022a489: 116600 slli a6, a6, 16 +4022a48c: c03320 sub a3, a3, a2 +4022a48f: 312360 srai a2, a6, 19 +4022a492: c02320 sub a2, a3, a2 +4022a495: 315060 srai a5, a6, 16 +4022a498: f42020 extui a2, a2, 0, 16 +4022a49b: 325a add.n a3, a2, a5 +4022a49d: 113300 slli a3, a3, 16 +4022a4a0: 116200 slli a6, a2, 16 +4022a4a3: 313030 srai a3, a3, 16 +4022a4a6: 316060 srai a6, a6, 16 +4022a4a9: 245c32 s16i a3, a12, 72 +4022a4ac: 0086d6 bgez a6, 4022a4b8 +4022a4af: 602020 neg a2, a2 +4022a4b2: 112200 slli a2, a2, 16 +4022a4b5: 316020 srai a6, a2, 16 +4022a4b8: 251c52 l16ui a5, a12, 74 +4022a4bb: 213330 srai a3, a3, 3 +4022a4be: 115500 slli a5, a5, 16 +4022a4c1: 312050 srai a2, a5, 16 +4022a4c4: 315250 srai a5, a5, 18 +4022a4c7: c05250 sub a5, a2, a5 +4022a4ca: 656a add.n a6, a5, a6 +4022a4cc: f46060 extui a6, a6, 0, 16 +4022a4cf: 363a add.n a3, a6, a3 +4022a4d1: 020c movi.n a2, 0 +4022a4d3: 255c62 s16i a6, a12, 74 +4022a4d6: 265c32 s16i a3, a12, 76 +4022a4d9: 106c22 s32i a2, a12, 64 +4022a4dc: ff38e1 l32r a14, 4022a1bc +4022a4df: ac58 l32i.n a5, a12, 40 +4022a4e1: 001e72 l16ui a7, a14, 0 +4022a4e4: 530716 beqz a7, 4022aa18 +4022a4e7: ff0241 l32r a4, 4022a0f0 +4022a4ea: 0428 l32i.n a2, a4, 0 +4022a4ec: c03520 sub a3, a5, a2 +4022a4ef: 630b addi.n a6, a3, -1 +4022a4f1: 080696 bltz a6, 4022a575 +4022a4f4: 651b addi.n a6, a5, 1 +4022a4f6: c06620 sub a6, a6, a2 +4022a4f9: c06670 sub a6, a6, a7 +4022a4fc: 7516e6 bgei a6, 1, 4022a575 +4022a4ff: ff30d1 l32r a13, 4022a1c0 +4022a502: 035d mov.n a5, a3 +4022a504: 1d28 l32i.n a2, a13, 4 +4022a506: 051262 l16ui a6, a2, 10 +4022a509: 28a637 bge a6, a3, 4022a535 +4022a50c: 041262 l16ui a6, a2, 8 +4022a50f: 070c movi.n a7, 0 +4022a511: c03630 sub a3, a6, a3 +4022a514: f43030 extui a3, a3, 0, 16 +4022a517: 051262 l16ui a6, a2, 10 +4022a51a: 0ea657 bge a6, a5, 4022a52c +4022a51d: 045232 s16i a3, a2, 8 +4022a520: 055272 s16i a7, a2, 10 +4022a523: c05560 sub a5, a5, a6 +4022a526: 0228 l32i.n a2, a2, 0 +4022a528: fffac6 j 4022a517 +4022a52b: 305000 xor a5, a0, a0 +4022a52e: 014660 slli a4, a6, 26 +4022a531: 000000 ill +4022a534: 303000 xor a3, a0, a0 +4022a537: 330060 excw +4022a53a: 303011 l32r a1, 401f65fc <_lit4_end+0xf02d0> +4022a53d: 7d8531 l32r a3, 40209b54 +4022a540: fe .byte 0xfe +4022a541: feeb31 l32r a3, 4022a0f0 +4022a544: 0a2c22 l32i a2, a12, 40 +4022a547: 002352 l32i a5, a3, 0 +4022a54a: 061d32 l16ui a3, a13, 12 +4022a54d: fee841 l32r a4, 4022a0f0 +4022a550: 803530 add a3, a5, a3 +4022a553: c03320 sub a3, a3, a2 +4022a556: 065d32 s16i a3, a13, 12 +4022a559: 4d38 l32i.n a3, a13, 16 +4022a55b: 745820 extui a5, a2, 8, 8 +4022a55e: 0429 s32i.n a2, a4, 0 +4022a560: 044322 s8i a2, a3, 4 +4022a563: 054352 s8i a5, a3, 5 +4022a566: 755020 extui a5, a2, 16, 8 +4022a569: 752820 extui a2, a2, 24, 8 +4022a56c: 064352 s8i a5, a3, 6 +4022a56f: 074322 s8i a2, a3, 7 +4022a572: 000406 j 4022a586 +4022a575: c02250 sub a2, a2, a5 +4022a578: 00a2d6 bgez a2, 4022a586 +4022a57b: 240c32 l8ui a3, a12, 36 +4022a57e: 220c movi.n a2, 2 +4022a580: 202320 or a2, a3, a2 +4022a583: 244c22 s8i a2, a12, 36 +4022a586: feda21 l32r a2, 4022a0f0 +4022a589: ac38 l32i.n a3, a12, 40 +4022a58b: 0258 l32i.n a5, a2, 0 +4022a58d: c02530 sub a2, a5, a3 +4022a590: 479296 bltz a2, 4022aa0d +4022a593: 161c62 l16ui a6, a12, 44 +4022a596: 251b addi.n a2, a5, 1 +4022a598: c02230 sub a2, a2, a3 +4022a59b: c02260 sub a2, a2, a6 +4022a59e: 0212a6 blti a2, 1, 4022a5a4 +4022a5a1: 011a06 j 4022aa0d +4022a5a4: 021537 beq a5, a3, 4022a5aa +4022a5a7: 009d46 j 4022a820 +4022a5aa: ff05d1 l32r a13, 4022a1c0 +4022a5ad: 190c movi.n a9, 1 +4022a5af: 4d78 l32i.n a7, a13, 16 +4022a5b1: 0d0722 l8ui a2, a7, 13 +4022a5b4: 0c0732 l8ui a3, a7, 12 +4022a5b7: 112280 slli a2, a2, 8 +4022a5ba: 202230 or a2, a2, a3 +4022a5bd: 413820 srli a3, a2, 8 +4022a5c0: 115280 slli a5, a2, 8 +4022a5c3: 205530 or a5, a5, a3 +4022a5c6: f48050 extui a8, a5, 0, 16 +4022a5c9: 145080 extui a5, a8, 0, 2 +4022a5cc: 030c movi.n a3, 0 +4022a5ce: 933950 movnez a3, a9, a5 +4022a5d1: 061d52 l16ui a5, a13, 12 +4022a5d4: 335a add.n a3, a3, a5 +4022a5d6: f43030 extui a3, a3, 0, 16 +4022a5d9: 005e32 s16i a3, a14, 0 +4022a5dc: 49b637 bgeu a6, a3, 4022a629 +4022a5df: 196807 bbci a8, 0, 4022a5fc +4022a5e2: e33c movi.n a3, 62 +4022a5e4: 105830 and a5, a8, a3 +4022a5e7: fef731 l32r a3, 4022a1c4 +4022a5ea: 115580 slli a5, a5, 8 +4022a5ed: 102230 and a2, a2, a3 +4022a5f0: 202520 or a2, a5, a2 +4022a5f3: 0c4722 s8i a2, a7, 12 +4022a5f6: 412820 srli a2, a2, 8 +4022a5f9: 0d4722 s8i a2, a7, 13 +4022a5fc: 065d62 s16i a6, a13, 12 +4022a5ff: 0d0722 l8ui a2, a7, 13 +4022a602: 046217 bbci a2, 1, 4022a60a +4022a605: 260b addi.n a2, a6, -1 +4022a607: 065d22 s16i a2, a13, 12 +4022a60a: 061d32 l16ui a3, a13, 12 +4022a60d: 1d28 l32i.n a2, a13, 4 +4022a60f: fe98c5 call0 40228f9c +4022a612: 4d28 l32i.n a2, a13, 16 +4022a614: 150c movi.n a5, 1 +4022a616: 0d0222 l8ui a2, a2, 13 +4022a619: 143020 extui a3, a2, 0, 2 +4022a61c: 020c movi.n a2, 0 +4022a61e: 932530 movnez a2, a5, a3 +4022a621: 061d32 l16ui a3, a13, 12 +4022a624: 223a add.n a2, a2, a3 +4022a626: 005e22 s16i a2, a14, 0 +4022a629: 202cf2 l32i a15, a12, 128 +4022a62c: 0e8f16 beqz a15, 4022a718 +4022a62f: 4d28 l32i.n a2, a13, 16 +4022a631: 0d0222 l8ui a2, a2, 13 +4022a634: 106207 bbci a2, 0, 4022a648 +4022a637: 202c22 l32i a2, a12, 128 +4022a63a: 0da216 beqz a2, 4022a718 +4022a63d: 0238 l32i.n a3, a2, 0 +4022a63f: 206c32 s32i a3, a12, 128 +4022a642: ff1f05 call0 40229834 +4022a645: fffb86 j 4022a637 +4022a648: 02a052 movi a5, 2 +4022a64b: 00a162 movi a6, 0x100 +4022a64e: 042f82 l32i a8, a15, 16 +4022a651: fea731 l32r a3, 4022a0f0 +4022a654: 0408b2 l8ui a11, a8, 4 +4022a657: 002392 l32i a9, a3, 0 +4022a65a: 050832 l8ui a3, a8, 5 +4022a65d: 070822 l8ui a2, a8, 7 +4022a660: 113380 slli a3, a3, 8 +4022a663: 20a3b0 or a10, a3, a11 +4022a666: 060832 l8ui a3, a8, 6 +4022a669: 001e72 l16ui a7, a14, 0 +4022a66c: 113300 slli a3, a3, 16 +4022a66f: 2033a0 or a3, a3, a10 +4022a672: 012280 slli a2, a2, 24 +4022a675: 202230 or a2, a2, a3 +4022a678: 061f32 l16ui a3, a15, 12 +4022a67b: 779a add.n a7, a7, a9 +4022a67d: c03730 sub a3, a7, a3 +4022a680: c03320 sub a3, a3, a2 +4022a683: 052396 bltz a3, 4022a6d9 +4022a686: 0d0822 l8ui a2, a8, 13 +4022a689: 2a6207 bbci a2, 0, 4022a6b7 +4022a68c: 4d78 l32i.n a7, a13, 16 +4022a68e: 0d0722 l8ui a2, a7, 13 +4022a691: 0c0732 l8ui a3, a7, 12 +4022a694: 112280 slli a2, a2, 8 +4022a697: 202230 or a2, a2, a3 +4022a69a: 413820 srli a3, a2, 8 +4022a69d: 168357 bany a3, a5, 4022a6b7 +4022a6a0: 202260 or a2, a2, a6 +4022a6a3: f42020 extui a2, a2, 0, 16 +4022a6a6: 0c4722 s8i a2, a7, 12 +4022a6a9: 412820 srli a2, a2, 8 +4022a6ac: 0d4722 s8i a2, a7, 13 +4022a6af: 061d22 l16ui a2, a13, 12 +4022a6b2: 221b addi.n a2, a2, 1 +4022a6b4: 005e22 s16i a2, a14, 0 +4022a6b7: 0f38 l32i.n a3, a15, 0 +4022a6b9: 0f2d mov.n a2, a15 +4022a6bb: 0139 s32i.n a3, a1, 0 +4022a6bd: 1159 s32i.n a5, a1, 4 +4022a6bf: 2169 s32i.n a6, a1, 8 +4022a6c1: ff1705 call0 40229834 +4022a6c4: 0138 l32i.n a3, a1, 0 +4022a6c6: 1158 l32i.n a5, a1, 4 +4022a6c8: 2168 l32i.n a6, a1, 8 +4022a6ca: 33cc bnez.n a3, 4022a6d1 +4022a6cc: 0f0c movi.n a15, 0 +4022a6ce: 0010c6 j 4022a715 +4022a6d1: 03fd mov.n a15, a3 +4022a6d3: ffddc6 j 4022a64e +4022a6d6: 000000 ill +4022a6d9: c07720 sub a7, a7, a2 +4022a6dc: 3517a6 blti a7, 1, 4022a715 +4022a6df: c02290 sub a2, a2, a9 +4022a6e2: f42020 extui a2, a2, 0, 16 +4022a6e5: 4d38 l32i.n a3, a13, 16 +4022a6e7: 065d22 s16i a2, a13, 12 +4022a6ea: 0d0332 l8ui a3, a3, 13 +4022a6ed: 046317 bbci a3, 1, 4022a6f5 +4022a6f0: 220b addi.n a2, a2, -1 +4022a6f2: 065d22 s16i a2, a13, 12 +4022a6f5: 061d32 l16ui a3, a13, 12 +4022a6f8: 1d28 l32i.n a2, a13, 4 +4022a6fa: fe8a05 call0 40228f9c +4022a6fd: 4d28 l32i.n a2, a13, 16 +4022a6ff: 150c movi.n a5, 1 +4022a701: 0d0222 l8ui a2, a2, 13 +4022a704: 143020 extui a3, a2, 0, 2 +4022a707: 020c movi.n a2, 0 +4022a709: 932530 movnez a2, a5, a3 +4022a70c: 061d32 l16ui a3, a13, 12 +4022a70f: 802230 add a2, a2, a3 +4022a712: 005e22 s16i a2, a14, 0 +4022a715: 206cf2 s32i a15, a12, 128 +4022a718: fe7641 l32r a4, 4022a0f0 +4022a71b: 001e52 l16ui a5, a14, 0 +4022a71e: 161c22 l16ui a2, a12, 44 +4022a721: 0438 l32i.n a3, a4, 0 +4022a723: c02250 sub a2, a2, a5 +4022a726: 335a add.n a3, a3, a5 +4022a728: ac39 s32i.n a3, a12, 40 +4022a72a: 165c22 s16i a2, a12, 44 +4022a72d: 0c2d mov.n a2, a12 +4022a72f: ff0585 call0 40229788 +4022a732: 1d28 l32i.n a2, a13, 4 +4022a734: 041232 l16ui a3, a2, 8 +4022a737: 738c beqz.n a3, 4022a742 +4022a739: fea331 l32r a3, 4022a1c8 +4022a73c: 0329 s32i.n a2, a3, 0 +4022a73e: 020c movi.n a2, 0 +4022a740: 1d29 s32i.n a2, a13, 4 +4022a742: 4d28 l32i.n a2, a13, 16 +4022a744: 0d0222 l8ui a2, a2, 13 +4022a747: 0e6207 bbci a2, 0, 4022a759 +4022a74a: fea031 l32r a3, 4022a1cc +4022a74d: 20a022 movi a2, 32 +4022a750: 000352 l8ui a5, a3, 0 +4022a753: 202520 or a2, a5, a2 +4022a756: 004322 s8i a2, a3, 0 +4022a759: 01a0e2 movi a14, 1 +4022a75c: 00a0d2 movi a13, 0 +4022a75f: 202cf2 l32i a15, a12, 128 +4022a762: 09bf16 beqz a15, 4022a801 +4022a765: 4f78 l32i.n a7, a15, 16 +4022a767: 050732 l8ui a3, a7, 5 +4022a76a: 040762 l8ui a6, a7, 4 +4022a76d: 060722 l8ui a2, a7, 6 +4022a770: 113380 slli a3, a3, 8 +4022a773: 112200 slli a2, a2, 16 +4022a776: 205360 or a5, a3, a6 +4022a779: 203250 or a3, a2, a5 +4022a77c: 070722 l8ui a2, a7, 7 +4022a77f: 012280 slli a2, a2, 24 +4022a782: 202230 or a2, a2, a3 +4022a785: ac38 l32i.n a3, a12, 40 +4022a787: 769237 bne a2, a3, 4022a801 +4022a78a: fe5931 l32r a3, 4022a0f0 +4022a78d: 0d4d mov.n a4, a13 +4022a78f: 0329 s32i.n a2, a3, 0 +4022a791: 0d0732 l8ui a3, a7, 13 +4022a794: 061f52 l16ui a5, a15, 12 +4022a797: 143030 extui a3, a3, 0, 2 +4022a79a: 934e30 movnez a4, a14, a3 +4022a79d: 743040 extui a3, a4, 0, 8 +4022a7a0: 653a add.n a6, a5, a3 +4022a7a2: 262a add.n a2, a6, a2 +4022a7a4: ac29 s32i.n a2, a12, 40 +4022a7a6: 161c22 l16ui a2, a12, 44 +4022a7a9: c02250 sub a2, a2, a5 +4022a7ac: c03230 sub a3, a2, a3 +4022a7af: 165c32 s16i a3, a12, 44 +4022a7b2: 0c2d mov.n a2, a12 +4022a7b4: fefd05 call0 40229788 +4022a7b7: 1f38 l32i.n a3, a15, 4 +4022a7b9: 041322 l16ui a2, a3, 8 +4022a7bc: 129c beqz.n a2, 4022a7d1 +4022a7be: fe8251 l32r a5, 4022a1c8 +4022a7c1: 0528 l32i.n a2, a5, 0 +4022a7c3: 628c beqz.n a2, 4022a7cd +4022a7c5: fe8385 call0 40229000 +4022a7c8: 0000c6 j 4022a7cf +4022a7cb: 390000 excw +4022a7ce: 1fd905 call0 4024a560 <_irom0_text_end+0x199e4> +4022a7d1: 4f28 l32i.n a2, a15, 16 +4022a7d3: 0d0222 l8ui a2, a2, 13 +4022a7d6: 176207 bbci a2, 0, 4022a7f1 +4022a7d9: fe7c31 l32r a3, 4022a1cc +4022a7dc: 022c movi.n a2, 32 +4022a7de: 000352 l8ui a5, a3, 0 +4022a7e1: 202520 or a2, a5, a2 +4022a7e4: 004322 s8i a2, a3, 0 +4022a7e7: 4c28 l32i.n a2, a12, 16 +4022a7e9: 044266 bnei a2, 4, 4022a7f1 +4022a7ec: 07a022 movi a2, 7 +4022a7ef: 4c29 s32i.n a2, a12, 16 +4022a7f1: 0f28 l32i.n a2, a15, 0 +4022a7f3: 206c22 s32i a2, a12, 128 +4022a7f6: 0f2d mov.n a2, a15 +4022a7f8: ff0385 call0 40229834 +4022a7fb: ffd806 j 4022a75f +4022a7fe: 000000 ill +4022a801: 240c32 l8ui a3, a12, 36 +4022a804: 0c6307 bbci a3, 0, 4022a814 +4022a807: e27c movi.n a2, -2 +4022a809: 102320 and a2, a3, a2 +4022a80c: 250c movi.n a5, 2 +4022a80e: 202250 or a2, a2, a5 +4022a811: 000106 j 4022a819 +4022a814: 120c movi.n a2, 1 +4022a816: 202320 or a2, a3, a2 +4022a819: 244c22 s8i a2, a12, 36 +4022a81c: 008d06 j 4022aa54 +4022a81f: 2cc000 excw +4022a822: 040520 extui a0, a2, 5, 1 +4022a825: 2cd201 l32r a0, 401f5b70 <_lit4_end+0xef844> +4022a828: cd5620 excw +4022a82b: 652100 extui a2, a0, 17, 7 +4022a82e: fe .byte 0xfe +4022a82f: ff5c45 call0 40229df4 +4022a832: 206c22 s32i a2, a12, 128 +4022a835: 0086c6 j 4022aa54 +4022a838: 2d2100 excw +4022a83b: fe .byte 0xfe +4022a83c: 00a0f2 movi a15, 0 +4022a83f: 002272 l32i a7, a2, 0 +4022a842: ffc792 addi a9, a7, -1 +4022a845: a71b addi.n a10, a7, 1 +4022a847: 4d88 l32i.n a8, a13, 16 +4022a849: 050832 l8ui a3, a8, 5 +4022a84c: 040862 l8ui a6, a8, 4 +4022a84f: 060822 l8ui a2, a8, 6 +4022a852: 113380 slli a3, a3, 8 +4022a855: 112200 slli a2, a2, 16 +4022a858: 205360 or a5, a3, a6 +4022a85b: 203250 or a3, a2, a5 +4022a85e: 070822 l8ui a2, a8, 7 +4022a861: 012280 slli a2, a2, 24 +4022a864: 202230 or a2, a2, a3 +4022a867: 1d9277 bne a2, a7, 4022a888 +4022a86a: fe5521 l32r a2, 4022a1c0 +4022a86d: 061d52 l16ui a5, a13, 12 +4022a870: 061232 l16ui a3, a2, 12 +4022a873: 023537 bltu a5, a3, 4022a879 +4022a876: 007686 j 4022aa54 +4022a879: ff5785 call0 40229df4 +4022a87c: 1d4216 beqz a2, 4022aa54 +4022a87f: 6f9c beqz.n a15, 4022a899 +4022a881: 0f29 s32i.n a2, a15, 0 +4022a883: 000546 j 4022a89c +4022a886: dc0000 excw +4022a889: 5f .byte 0x5f +4022a88a: c03720 sub a3, a7, a2 +4022a88d: 0963d6 bgez a3, 4022a927 +4022a890: fe4c21 l32r a2, 4022a1c0 +4022a893: ff5605 call0 40229df4 +4022a896: 1ba216 beqz a2, 4022aa54 +4022a899: 206c22 s32i a2, a12, 128 +4022a89c: 0d3d mov.n a3, a13 +4022a89e: 001fc6 j 4022a921 +4022a8a1: 042f32 l32i a3, a15, 16 +4022a8a4: 050352 l8ui a5, a3, 5 +4022a8a7: 0403b2 l8ui a11, a3, 4 +4022a8aa: 115580 slli a5, a5, 8 +4022a8ad: 2065b0 or a6, a5, a11 +4022a8b0: 060352 l8ui a5, a3, 6 +4022a8b3: 070332 l8ui a3, a3, 7 +4022a8b6: 115500 slli a5, a5, 16 +4022a8b9: 205560 or a5, a5, a6 +4022a8bc: 013380 slli a3, a3, 24 +4022a8bf: 203350 or a3, a3, a5 +4022a8c2: c03930 sub a3, a9, a3 +4022a8c5: 05e396 bltz a3, 4022a927 +4022a8c8: c03a20 sub a3, a10, a2 +4022a8cb: 5813e6 bgei a3, 1, 4022a927 +4022a8ce: fe3c21 l32r a2, 4022a1c0 +4022a8d1: ff5205 call0 40229df4 +4022a8d4: 20e220 or a14, a2, a2 +4022a8d7: 179216 beqz a2, 4022aa54 +4022a8da: 4f68 l32i.n a6, a15, 16 +4022a8dc: 050642 l8ui a4, a6, 5 +4022a8df: 040652 l8ui a5, a6, 4 +4022a8e2: 060622 l8ui a2, a6, 6 +4022a8e5: 114480 slli a4, a4, 8 +4022a8e8: 203450 or a3, a4, a5 +4022a8eb: 112200 slli a2, a2, 16 +4022a8ee: 204230 or a4, a2, a3 +4022a8f1: 070622 l8ui a2, a6, 7 +4022a8f4: 012280 slli a2, a2, 24 +4022a8f7: 202240 or a2, a2, a4 +4022a8fa: fdfd41 l32r a4, 4022a0f0 +4022a8fd: 0438 l32i.n a3, a4, 0 +4022a8ff: 061f42 l16ui a4, a15, 12 +4022a902: c04430 sub a4, a4, a3 +4022a905: 804420 add a4, a4, a2 +4022a908: 0d14a6 blti a4, 1, 4022a919 +4022a90b: c03320 sub a3, a3, a2 +4022a90e: f43030 extui a3, a3, 0, 16 +4022a911: 1f28 l32i.n a2, a15, 4 +4022a913: 065f32 s16i a3, a15, 12 +4022a916: fe6845 call0 40228f9c +4022a919: 0fe9 s32i.n a14, a15, 0 +4022a91b: 203dd0 or a3, a13, a13 +4022a91e: 202ee0 or a2, a14, a14 +4022a921: ff7d05 call0 4022a0f4 +4022a924: 004b06 j 4022aa54 +4022a927: 0d38 l32i.n a3, a13, 0 +4022a929: 0dfd mov.n a15, a13 +4022a92b: 638c beqz.n a3, 4022a935 +4022a92d: 03dd mov.n a13, a3 +4022a92f: ffc506 j 4022a847 +4022a932: 000000 ill +4022a935: c02720 sub a2, a7, a2 +4022a938: 0212e6 bgei a2, 1, 4022a93e +4022a93b: 004546 j 4022aa54 +4022a93e: 0d0822 l8ui a2, a8, 13 +4022a941: 026207 bbci a2, 0, 4022a947 +4022a944: 004306 j 4022aa54 +4022a947: fe1e21 l32r a2, 4022a1c0 +4022a94a: ff4a85 call0 40229df4 +4022a94d: 0d29 s32i.n a2, a13, 0 +4022a94f: 101216 beqz a2, 4022aa54 +4022a952: 4d78 l32i.n a7, a13, 16 +4022a954: fde741 l32r a4, 4022a0f0 +4022a957: 050752 l8ui a5, a7, 5 +4022a95a: 040762 l8ui a6, a7, 4 +4022a95d: 060722 l8ui a2, a7, 6 +4022a960: 115580 slli a5, a5, 8 +4022a963: 203560 or a3, a5, a6 +4022a966: 112200 slli a2, a2, 16 +4022a969: 205230 or a5, a2, a3 +4022a96c: 070722 l8ui a2, a7, 7 +4022a96f: 0438 l32i.n a3, a4, 0 +4022a971: 012280 slli a2, a2, 24 +4022a974: 202250 or a2, a2, a5 +4022a977: 061d52 l16ui a5, a13, 12 +4022a97a: c05530 sub a5, a5, a3 +4022a97d: 552a add.n a5, a5, a2 +4022a97f: 0d15a6 blti a5, 1, 4022a990 +4022a982: c03320 sub a3, a3, a2 +4022a985: f43030 extui a3, a3, 0, 16 +4022a988: 1d28 l32i.n a2, a13, 4 +4022a98a: 065d32 s16i a3, a13, 12 +4022a98d: fe60c5 call0 40228f9c +4022a990: fdd821 l32r a2, 4022a0f0 +4022a993: ac38 l32i.n a3, a12, 40 +4022a995: 0278 l32i.n a7, a2, 0 +4022a997: 161c42 l16ui a4, a12, 44 +4022a99a: 001e22 l16ui a2, a14, 0 +4022a99d: 343a add.n a3, a4, a3 +4022a99f: 227a add.n a2, a2, a7 +4022a9a1: 023327 bltu a3, a2, 4022a9a7 +4022a9a4: 002b06 j 4022aa54 +4022a9a7: 0d58 l32i.n a5, a13, 0 +4022a9a9: 4588 l32i.n a8, a5, 16 +4022a9ab: 0d0822 l8ui a2, a8, 13 +4022a9ae: 0c0842 l8ui a4, a8, 12 +4022a9b1: 112280 slli a2, a2, 8 +4022a9b4: 202240 or a2, a2, a4 +4022a9b7: 116280 slli a6, a2, 8 +4022a9ba: 414820 srli a4, a2, 8 +4022a9bd: 204640 or a4, a6, a4 +4022a9c0: f44040 extui a4, a4, 0, 16 +4022a9c3: 196407 bbci a4, 0, 4022a9e0 +4022a9c6: e63c movi.n a6, 62 +4022a9c8: 104460 and a4, a4, a6 +4022a9cb: 116480 slli a6, a4, 8 +4022a9ce: fdfd41 l32r a4, 4022a1c4 +4022a9d1: 102240 and a2, a2, a4 +4022a9d4: 202620 or a2, a6, a2 +4022a9d7: 0c4822 s8i a2, a8, 12 +4022a9da: 412820 srli a2, a2, 8 +4022a9dd: 0d4822 s8i a2, a8, 13 +4022a9e0: c03370 sub a3, a3, a7 +4022a9e3: f43030 extui a3, a3, 0, 16 +4022a9e6: 012522 l32i a2, a5, 4 +4022a9e9: 065532 s16i a3, a5, 12 +4022a9ec: fe5ac5 call0 40228f9c +4022a9ef: 002d42 l32i a4, a13, 0 +4022a9f2: 01a052 movi a5, 1 +4022a9f5: 4428 l32i.n a2, a4, 16 +4022a9f7: 0d0222 l8ui a2, a2, 13 +4022a9fa: 143020 extui a3, a2, 0, 2 +4022a9fd: 020c movi.n a2, 0 +4022a9ff: 932530 movnez a2, a5, a3 +4022aa02: 061432 l16ui a3, a4, 12 +4022aa05: 223a add.n a2, a2, a3 +4022aa07: 005e22 s16i a2, a14, 0 +4022aa0a: 001186 j 4022aa54 +4022aa0d: 0c2d mov.n a2, a12 +4022aa0f: 00e545 call0 4022b864 +4022aa12: 000f86 j 4022aa54 +4022aa15: 000000 ill +4022aa18: fdb631 l32r a3, 4022a0f0 +4022aa1b: 0328 l32i.n a2, a3, 0 +4022aa1d: c03250 sub a3, a2, a5 +4022aa20: 00d396 bltz a3, 4022aa31 +4022aa23: 221b addi.n a2, a2, 1 +4022aa25: 161c32 l16ui a3, a12, 44 +4022aa28: c02250 sub a2, a2, a5 +4022aa2b: c02230 sub a2, a2, a3 +4022aa2e: 2212a6 blti a2, 1, 4022aa54 +4022aa31: 240c32 l8ui a3, a12, 36 +4022aa34: 220c movi.n a2, 2 +4022aa36: ff7706 j 4022a816 +4022aa39: 020c movi.n a2, 0 +4022aa3b: 544c22 s8i a2, a12, 84 +4022aa3e: fe63c6 j 4022a3d1 +4022aa41: f27c movi.n a2, -1 +4022aa43: 000046 j 4022aa48 +4022aa46: 020c movi.n a2, 0 +4022aa48: 1d5c22 s16i a2, a12, 58 +4022aa4b: 020c movi.n a2, 0 +4022aa4d: 384c22 s8i a2, a12, 56 +4022aa50: fe5f46 j 4022a3d1 +4022aa53: b10800 excw +4022aa56: a1c8 l32i.n a12, a1, 40 +4022aa58: 91d8 l32i.n a13, a1, 36 +4022aa5a: 81e8 l32i.n a14, a1, 32 +4022aa5c: 71f8 l32i.n a15, a1, 28 +4022aa5e: 30c112 addi a1, a1, 48 +4022aa61: f00d ret.n +4022aa63: d53100 extui a3, a0, 17, 14 +4022aa66: 38fd excw +4022aa68: 034203 excw +4022aa6b: 720c movi.n a2, 7 +4022aa6d: 4014c3 excw +4022aa70: b64144 excw +4022aa73: 425f64 excw +4022aa76: e0fbc4 excw +4022aa79: 401144 excw +4022aa7c: 32f440 excw +4022aa7f: 8200a0 mull a0, a0, a10 +4022aa82: 3ab3a5 excw +4022aa85: 065267 bbc a2, a6, 4022aa8f +4022aa88: 152600 extui a2, a0, 22, 2 +4022aa8b: 1608 l32i.n a0, a6, 4 +4022aa8d: 260455 excw +4022aa90: 860925 excw +4022aa93: 000c movi.n a0, 0 +4022aa95: 331b addi.n a3, a3, 1 +4022aa97: 000d06 j 4022aacf +4022aa9a: 520000 excw +4022aa9d: 660106 j 402442a5 <_irom0_text_end+0x13729> +4022aaa0: 3b3245 call0 40265dc8 <_irom0_text_end+0x3524c> +4022aaa3: a54753 excw +4022aaa6: 522d excw +4022aaa8: 620206 j 402432b4 <_irom0_text_end+0x12738> +4022aaab: 800306 j 4020aabb +4022aaae: 501155 excw +4022aab1: 0b2056 bnez a0, 4022ab67 +4022aab4: 606065 excw +4022aab7: a592f4 excw +4022aaba: 3867b4 excw +4022aabd: 059d01 l32r a0, 401ec134 <_lit4_end+0xe5e08> +4022aac0: 005292 s16i a9, a2, 0 +4022aac3: 334b addi.n a3, a3, 4 +4022aac5: 000186 j 4022aacf +4022aac8: 010652 l8ui a5, a6, 1 +4022aacb: 658c beqz.n a5, 4022aad5 +4022aacd: 335a add.n a3, a3, a5 +4022aacf: f43030 extui a3, a3, 0, 16 +4022aad2: ae3347 bltu a3, a4, 4022aa84 +4022aad5: f00d ret.n +4022aad7: e77c00 excw +4022aada: fe .byte 0xfe +4022aadb: 3f .byte 0x3f +4022aadc: fe8863 excw +4022aadf: 3f .byte 0x3f + +4022aae0 : +4022aae0: c0c112 addi a1, a1, -64 +4022aae3: 0d61d2 s32i a13, a1, 52 +4022aae6: 20d220 or a13, a2, a2 +4022aae9: 012222 l32i a2, a2, 4 +4022aaec: e1c9 s32i.n a12, a1, 56 +4022aaee: b1f9 s32i.n a15, a1, 44 +4022aaf0: f109 s32i.n a0, a1, 60 +4022aaf2: c1e9 s32i.n a14, a1, 48 +4022aaf4: 03fd mov.n a15, a3 +4022aaf6: 000232 l8ui a3, a2, 0 +4022aaf9: fdafc1 l32r a12, 4022a1b8 +4022aafc: 343030 extui a3, a3, 0, 4 +4022aaff: 1133e0 slli a3, a3, 2 +4022ab02: 223a add.n a2, a2, a3 +4022ab04: 0c29 s32i.n a2, a12, 0 +4022ab06: 603030 neg a3, a3 +4022ab09: 0d2d mov.n a2, a13 +4022ab0b: fe20c5 call0 40228d18 +4022ab0e: 62cc bnez.n a2, 4022ab18 +4022ab10: 041d22 l16ui a2, a13, 8 +4022ab13: 331c movi.n a3, 19 +4022ab15: 073327 bltu a3, a2, 4022ab20 +4022ab18: 0d2d mov.n a2, a13 +4022ab1a: fe2845 call0 40228da0 +4022ab1d: 024446 j 4022b432 +4022ab20: f5b2e1 l32r a14, 402281e8 +4022ab23: 203ff0 or a3, a15, a15 +4022ab26: 0e28 l32i.n a2, a14, 0 +4022ab28: fdc045 call0 40228730 +4022ab2b: 0e4d mov.n a4, a14 +4022ab2d: fe7256 bnez a2, 4022ab18 +4022ab30: 0e28 l32i.n a2, a14, 0 +4022ab32: f0a032 movi a3, 240 +4022ab35: 102320 and a2, a3, a2 +4022ab38: e0a032 movi a3, 224 +4022ab3b: d91237 beq a2, a3, 4022ab18 +4022ab3e: 041d62 l16ui a6, a13, 8 +4022ab41: f5aa31 l32r a3, 402281ec +4022ab44: 650c movi.n a5, 6 +4022ab46: 0d2d mov.n a2, a13 +4022ab48: 05bac5 call0 402306f8 +4022ab4b: fc9256 bnez a2, 4022ab18 +4022ab4e: 0c28 l32i.n a2, a12, 0 +4022ab50: 0c0232 l8ui a3, a2, 12 +4022ab53: 0d2d mov.n a2, a13 +4022ab55: 413430 srli a3, a3, 4 +4022ab58: 0133e0 slli a3, a3, 18 +4022ab5b: 603030 neg a3, a3 +4022ab5e: 313030 srai a3, a3, 16 +4022ab61: fe1b45 call0 40228d18 +4022ab64: fb0256 bnez a2, 4022ab18 +4022ab67: 0c48 l32i.n a4, a12, 0 +4022ab69: 5961a1 l32r a10, 402010f0 +4022ab6c: 010422 l8ui a2, a4, 1 +4022ab6f: 000432 l8ui a3, a4, 0 +4022ab72: 112280 slli a2, a2, 8 +4022ab75: 202230 or a2, a2, a3 +4022ab78: 117280 slli a7, a2, 8 +4022ab7b: 412820 srli a2, a2, 8 +4022ab7e: 207720 or a7, a7, a2 +4022ab81: f47070 extui a7, a7, 0, 16 +4022ab84: 412870 srli a2, a7, 8 +4022ab87: 014422 s8i a2, a4, 1 +4022ab8a: 030422 l8ui a2, a4, 3 +4022ab8d: 020432 l8ui a3, a4, 2 +4022ab90: 112280 slli a2, a2, 8 +4022ab93: 202230 or a2, a2, a3 +4022ab96: 116280 slli a6, a2, 8 +4022ab99: 412820 srli a2, a2, 8 +4022ab9c: 206620 or a6, a6, a2 +4022ab9f: f46060 extui a6, a6, 0, 16 +4022aba2: 412860 srli a2, a6, 8 +4022aba5: 034422 s8i a2, a4, 3 +4022aba8: 050422 l8ui a2, a4, 5 +4022abab: 040482 l8ui a8, a4, 4 +4022abae: 060452 l8ui a5, a4, 6 +4022abb1: 112280 slli a2, a2, 8 +4022abb4: 203280 or a3, a2, a8 +4022abb7: 115500 slli a5, a5, 16 +4022abba: 202530 or a2, a5, a3 +4022abbd: 070452 l8ui a5, a4, 7 +4022abc0: 004472 s8i a7, a4, 0 +4022abc3: 015580 slli a5, a5, 24 +4022abc6: 205520 or a5, a5, a2 +4022abc9: 752850 extui a2, a5, 24, 8 +4022abcc: 013580 slli a3, a5, 24 +4022abcf: 203320 or a3, a3, a2 +4022abd2: 1025a0 and a2, a5, a10 +4022abd5: 112280 slli a2, a2, 8 +4022abd8: 415850 srli a5, a5, 8 +4022abdb: 1055a0 and a5, a5, a10 +4022abde: 203320 or a3, a3, a2 +4022abe1: 203350 or a3, a3, a5 +4022abe4: 742830 extui a2, a3, 8, 8 +4022abe7: 054422 s8i a2, a4, 5 +4022abea: 752030 extui a2, a3, 16, 8 +4022abed: 064422 s8i a2, a4, 6 +4022abf0: 752830 extui a2, a3, 24, 8 +4022abf3: 074422 s8i a2, a4, 7 +4022abf6: fd3e21 l32r a2, 4022a0f0 +4022abf9: 024462 s8i a6, a4, 2 +4022abfc: 0239 s32i.n a3, a2, 0 +4022abfe: 090482 l8ui a8, a4, 9 +4022ac01: 080422 l8ui a2, a4, 8 +4022ac04: 0a0452 l8ui a5, a4, 10 +4022ac07: 118880 slli a8, a8, 8 +4022ac0a: 209820 or a9, a8, a2 +4022ac0d: 115500 slli a5, a5, 16 +4022ac10: 208590 or a8, a5, a9 +4022ac13: 0b0452 l8ui a5, a4, 11 +4022ac16: 044432 s8i a3, a4, 4 +4022ac19: 015580 slli a5, a5, 24 +4022ac1c: 205580 or a5, a5, a8 +4022ac1f: 018580 slli a8, a5, 24 +4022ac22: 752850 extui a2, a5, 24, 8 +4022ac25: 202820 or a2, a8, a2 +4022ac28: 1085a0 and a8, a5, a10 +4022ac2b: 118880 slli a8, a8, 8 +4022ac2e: 415850 srli a5, a5, 8 +4022ac31: 1055a0 and a5, a5, a10 +4022ac34: 202280 or a2, a2, a8 +4022ac37: 202250 or a2, a2, a5 +4022ac3a: 745820 extui a5, a2, 8, 8 +4022ac3d: 094452 s8i a5, a4, 9 +4022ac40: 755020 extui a5, a2, 16, 8 +4022ac43: 0a4452 s8i a5, a4, 10 +4022ac46: 755820 extui a5, a2, 24, 8 +4022ac49: 0b4452 s8i a5, a4, 11 +4022ac4c: fd5a51 l32r a5, 4022a1b4 +4022ac4f: 084422 s8i a2, a4, 8 +4022ac52: 0529 s32i.n a2, a5, 0 +4022ac54: 0f0482 l8ui a8, a4, 15 +4022ac57: 0e0492 l8ui a9, a4, 14 +4022ac5a: 118880 slli a8, a8, 8 +4022ac5d: 208890 or a8, a8, a9 +4022ac60: 115880 slli a5, a8, 8 +4022ac63: 418880 srli a8, a8, 8 +4022ac66: 205580 or a5, a5, a8 +4022ac69: f45050 extui a5, a5, 0, 16 +4022ac6c: 0e4452 s8i a5, a4, 14 +4022ac6f: 415850 srli a5, a5, 8 +4022ac72: 0f4452 s8i a5, a4, 15 +4022ac75: 0d0452 l8ui a5, a4, 13 +4022ac78: 0c0482 l8ui a8, a4, 12 +4022ac7b: 115580 slli a5, a5, 8 +4022ac7e: 205580 or a5, a5, a8 +4022ac81: 415850 srli a5, a5, 8 +4022ac84: fd4b81 l32r a8, 4022a1b0 +4022ac87: 1159 s32i.n a5, a1, 4 +4022ac89: 745050 extui a5, a5, 0, 8 +4022ac8c: 549050 extui a9, a5, 0, 6 +4022ac8f: 5b2db1 l32r a11, 40201944 +4022ac92: 004892 s8i a9, a8, 0 +4022ac95: 0a0c movi.n a10, 0 +4022ac97: 149050 extui a9, a5, 0, 2 +4022ac9a: 1c0c movi.n a12, 1 +4022ac9c: 83ca90 moveqz a12, a10, a9 +4022ac9f: 0b98 l32i.n a9, a11, 0 +4022aca1: f552b1 l32r a11, 402281ec +4022aca4: 041d82 l16ui a8, a13, 8 +4022aca7: 0be8 l32i.n a14, a11, 0 +4022aca9: f54ff1 l32r a15, 402281e8 +4022acac: c8ca add.n a12, a8, a12 +4022acae: 5189 s32i.n a8, a1, 20 +4022acb0: 21e9 s32i.n a14, a1, 8 +4022acb2: fd4281 l32r a8, 4022a1bc +4022acb5: 0fe8 l32i.n a14, a15, 0 +4022acb7: f4c0c0 extui a12, a12, 0, 16 +4022acba: 01e9 s32i.n a14, a1, 0 +4022acbc: 0058c2 s16i a12, a8, 0 +4022acbf: 09ed mov.n a14, a9 +4022acc1: 0ebc beqz.n a14, 4022acf5 +4022acc3: 111eb2 l16ui a11, a14, 34 +4022acc6: 249b77 bne a11, a7, 4022acee +4022acc9: 101eb2 l16ui a11, a14, 32 +4022accc: 1e9b67 bne a11, a6, 4022acee +4022accf: 1e88 l32i.n a8, a14, 4 +4022acd1: 21b8 l32i.n a11, a1, 8 +4022acd3: 1798b7 bne a8, a11, 4022acee +4022acd6: 0e88 l32i.n a8, a14, 0 +4022acd8: 01b8 l32i.n a11, a1, 0 +4022acda: 1098b7 bne a8, a11, 4022acee +4022acdd: 0c4a16 beqz a10, 4022ada5 +4022ace0: 3e28 l32i.n a2, a14, 12 +4022ace2: 3a29 s32i.n a2, a10, 12 +4022ace4: 5b1821 l32r a2, 40201944 +4022ace7: 3e99 s32i.n a9, a14, 12 +4022ace9: 02e9 s32i.n a14, a2, 0 +4022aceb: 002d86 j 4022ada5 +4022acee: 0ead mov.n a10, a14 +4022acf0: 3ee8 l32i.n a14, a14, 12 +4022acf2: fff2c6 j 4022acc1 +4022acf5: 5b1541 l32r a4, 4020194c +4022acf8: 0448 l32i.n a4, a4, 0 +4022acfa: 05f416 beqz a4, 4022ad5d +4022acfd: 111482 l16ui a8, a4, 34 +4022ad00: 549877 bne a8, a7, 4022ad58 +4022ad03: 101482 l16ui a8, a4, 32 +4022ad06: 4e9867 bne a8, a6, 4022ad58 +4022ad09: 1488 l32i.n a8, a4, 4 +4022ad0b: 21e8 l32i.n a14, a1, 8 +4022ad0d: 479e87 bne a14, a8, 4022ad58 +4022ad10: 0488 l32i.n a8, a4, 0 +4022ad12: 01a8 l32i.n a10, a1, 0 +4022ad14: 409a87 bne a10, a8, 4022ad58 +4022ad17: 026527 bbci a5, 2, 4022ad1d +4022ad1a: ff7e86 j 4022ab18 +4022ad1d: 176517 bbci a5, 1, 4022ad38 +4022ad20: a458 l32i.n a5, a4, 40 +4022ad22: c08350 sub a8, a3, a5 +4022ad25: 01b896 bltz a8, 4022ad44 +4022ad28: 161482 l16ui a8, a4, 44 +4022ad2b: 585a add.n a5, a8, a5 +4022ad2d: c05350 sub a5, a3, a5 +4022ad30: 1015e6 bgei a5, 1, 4022ad44 +4022ad33: 001746 j 4022ad94 +4022ad36: 070000 excw +4022ad39: 210865 excw +4022ad3c: 22f015 excw +4022ad3f: 220022 l8ui a2, a0, 34 +4022ad42: 160d64 excw +4022ad45: dd0c movi.n a13, 13 +4022ad47: 240432 l8ui a3, a4, 36 +4022ad4a: 220c movi.n a2, 2 +4022ad4c: 202320 or a2, a3, a2 +4022ad4f: 244422 s8i a2, a4, 36 +4022ad52: 042d mov.n a2, a4 +4022ad54: 000b86 j 4022ad86 +4022ad57: 344800 extui a4, a0, 8, 4 +4022ad5a: ffe706 j 4022acfa +4022ad5d: 5afe41 l32r a4, 40201958 +4022ad60: 0488 l32i.n a8, a4, 0 +4022ad62: 040c movi.n a4, 0 +4022ad64: 08ed mov.n a14, a8 +4022ad66: 2eac beqz.n a14, 4022ad8c +4022ad68: 101ea2 l16ui a10, a14, 32 +4022ad6b: 0d9a67 bne a10, a6, 4022ad7c +4022ad6e: 0ea8 l32i.n a10, a14, 0 +4022ad70: 0021b2 l32i a11, a1, 0 +4022ad73: 029ba7 bne a11, a10, 4022ad79 +4022ad76: 017286 j 4022b344 +4022ad79: 5c7a16 beqz a10, 4022b344 +4022ad7c: 0e4d mov.n a4, a14 +4022ad7e: 3ee8 l32i.n a14, a14, 12 +4022ad80: fff886 j 4022ad66 +4022ad83: 0c2d00 excw +4022ad86: 010645 call0 4022bdec +4022ad89: ff62c6 j 4022ab18 +4022ad8c: 1198 l32i.n a9, a1, 4 +4022ad8e: 026927 bbci a9, 2, 4022ad94 +4022ad91: ff60c6 j 4022ab18 +4022ad94: f51651 l32r a5, 402281ec +4022ad97: f51441 l32r a4, 402281e8 +4022ad9a: 3c3a add.n a3, a12, a3 +4022ad9c: 00d7c5 call0 4022bb1c +4022ad9f: ff5d46 j 4022ab18 +4022ada2: 000000 ill +4022ada5: fd0621 l32r a2, 4022a1c0 +4022ada8: 51a8 l32i.n a10, a1, 20 +4022adaa: 030c movi.n a3, 0 +4022adac: 0239 s32i.n a3, a2, 0 +4022adae: 4249 s32i.n a4, a2, 16 +4022adb0: 0652a2 s16i a10, a2, 12 +4022adb3: 12d9 s32i.n a13, a2, 4 +4022adb5: fd05c1 l32r a12, 4022a1cc +4022adb8: fd0421 l32r a2, 4022a1c8 +4022adbb: 212e42 l32i a4, a14, 132 +4022adbe: 0239 s32i.n a3, a2, 0 +4022adc0: 004c32 s8i a3, a12, 0 +4022adc3: 2e1437 beq a4, a3, 4022adf5 +4022adc6: 232e62 l32i a6, a14, 140 +4022adc9: 050c movi.n a5, 0 +4022adcb: 0e3d mov.n a3, a14 +4022adcd: 668c beqz.n a6, 4022add7 +4022adcf: 6e28 l32i.n a2, a14, 24 +4022add1: 0006c0 callx0 a6 +4022add4: 000106 j 4022addc +4022add7: 052d mov.n a2, a5 +4022add9: feb905 call0 4022996c +4022addc: 42cc bnez.n a2, 4022ade4 +4022adde: 216e22 s32i a2, a14, 132 +4022ade1: 000406 j 4022adf5 +4022ade4: 837c movi.n a3, -8 +4022ade6: 029237 bne a2, a3, 4022adec +4022ade9: ff4ac6 j 4022ab18 +4022adec: fcf421 l32r a2, 4022a1bc +4022adef: 001222 l16ui a2, a2, 0 +4022adf2: d22256 bnez a2, 4022ab18 +4022adf5: fceed1 l32r a13, 4022a1b0 +4022adf8: ff3821 l32r a2, 4022aad8 +4022adfb: 000d62 l8ui a6, a13, 0 +4022adfe: 02e9 s32i.n a14, a2, 0 +4022ae00: 316627 bbci a6, 2, 4022ae35 +4022ae03: 4e28 l32i.n a2, a14, 16 +4022ae05: 102266 bnei a2, 2, 4022ae19 +4022ae08: fceb21 l32r a2, 4022a1b4 +4022ae0b: 172e32 l32i a3, a14, 92 +4022ae0e: 0228 l32i.n a2, a2, 0 +4022ae10: 029327 bne a3, a2, 4022ae16 +4022ae13: 018146 j 4022b41c +4022ae16: 00f9c6 j 4022b201 +4022ae19: fcb521 l32r a2, 4022a0f0 +4022ae1c: ae38 l32i.n a3, a14, 40 +4022ae1e: 0228 l32i.n a2, a2, 0 +4022ae20: c02230 sub a2, a2, a3 +4022ae23: 3da296 bltz a2, 4022b201 +4022ae26: 161e32 l16ui a3, a14, 44 +4022ae29: c02230 sub a2, a2, a3 +4022ae2c: 0212e6 bgei a2, 1, 4022ae32 +4022ae2f: 017a46 j 4022b41c +4022ae32: 00f2c6 j 4022b201 +4022ae35: 220c movi.n a2, 2 +4022ae37: 104620 and a4, a6, a2 +4022ae3a: 240e52 l8ui a5, a14, 36 +4022ae3d: c48c beqz.n a4, 4022ae4d +4022ae3f: 4e38 l32i.n a3, a14, 16 +4022ae41: 202520 or a2, a5, a2 +4022ae44: fec332 addi a3, a3, -2 +4022ae47: 0223b6 bltui a3, 2, 4022ae4d +4022ae4a: 004e86 j 4022af88 +4022ae4d: 07e547 bbsi a5, 4, 4022ae58 +4022ae50: efd021 l32r a2, 40226d90 +4022ae53: 0228 l32i.n a2, a2, 0 +4022ae55: 0d6e22 s32i a2, a14, 52 +4022ae58: 020c movi.n a2, 0 +4022ae5a: ad4e22 s8i a2, a14, 173 +4022ae5d: 3cce22 addi a2, a14, 60 +4022ae60: 4149 s32i.n a4, a1, 16 +4022ae62: 036162 s32i a6, a1, 12 +4022ae65: ffbfc5 call0 4022aa64 +4022ae68: 4e28 l32i.n a2, a14, 16 +4022ae6a: 4148 l32i.n a4, a1, 16 +4022ae6c: 3168 l32i.n a6, a1, 12 +4022ae6e: 025266 bnei a2, 5, 4022ae74 +4022ae71: 009046 j 4022b0b6 +4022ae74: 1162f6 bgeui a2, 6, 4022ae89 +4022ae77: 023266 bnei a2, 3, 4022ae7d +4022ae7a: 0058c6 j 4022afe1 +4022ae7d: 0242b6 bltui a2, 4, 4022ae83 +4022ae80: 008506 j 4022b098 +4022ae83: 1f2226 beqi a2, 2, 4022aea6 +4022ae86: 00ddc6 j 4022b201 +4022ae89: 027266 bnei a2, 7, 4022ae8f +4022ae8c: 008206 j 4022b098 +4022ae8f: 0272f6 bgeui a2, 7, 4022ae95 +4022ae92: 00a786 j 4022b134 +4022ae95: 028266 bnei a2, 8, 4022ae9b +4022ae98: 00b606 j 4022b174 +4022ae9b: 930c movi.n a3, 9 +4022ae9d: 029237 bne a2, a3, 4022aea3 +4022aea0: 00cec6 j 4022b1df +4022aea3: 00d686 j 4022b201 +4022aea6: 221c movi.n a2, 18 +4022aea8: 102620 and a2, a6, a2 +4022aeab: 231c movi.n a3, 18 +4022aead: 021237 beq a2, a3, 4022aeb3 +4022aeb0: 003c06 j 4022afa4 +4022aeb3: 1f2e22 l32i a2, a14, 124 +4022aeb6: 4278 l32i.n a7, a2, 16 +4022aeb8: 050732 l8ui a3, a7, 5 +4022aebb: 040752 l8ui a5, a7, 4 +4022aebe: 060722 l8ui a2, a7, 6 +4022aec1: 113380 slli a3, a3, 8 +4022aec4: 204350 or a4, a3, a5 +4022aec7: 112200 slli a2, a2, 16 +4022aeca: 203240 or a3, a2, a4 +4022aecd: 070722 l8ui a2, a7, 7 +4022aed0: 012280 slli a2, a2, 24 +4022aed3: 202230 or a2, a2, a3 +4022aed6: 014280 slli a4, a2, 24 +4022aed9: 753820 extui a3, a2, 24, 8 +4022aedc: 205430 or a5, a4, a3 +4022aedf: 588431 l32r a3, 402010f0 +4022aee2: 104230 and a4, a2, a3 +4022aee5: 412820 srli a2, a2, 8 +4022aee8: 102230 and a2, a2, a3 +4022aeeb: 114480 slli a4, a4, 8 +4022aeee: fcb131 l32r a3, 4022a1b4 +4022aef1: 204540 or a4, a5, a4 +4022aef4: 202420 or a2, a4, a2 +4022aef7: 0338 l32i.n a3, a3, 0 +4022aef9: 221b addi.n a2, a2, 1 +4022aefb: 021237 beq a2, a3, 4022af01 +4022aefe: 002886 j 4022afa4 +4022af01: 391e32 l16ui a3, a14, 114 +4022af04: fc7b51 l32r a5, 4022a0f0 +4022af07: 331b addi.n a3, a3, 1 +4022af09: 395e32 s16i a3, a14, 114 +4022af0c: 146e22 s32i a2, a14, 80 +4022af0f: 0538 l32i.n a3, a5, 0 +4022af11: fca921 l32r a2, 4022a1b8 +4022af14: 431b addi.n a4, a3, 1 +4022af16: 0228 l32i.n a2, a2, 0 +4022af18: ae49 s32i.n a4, a14, 40 +4022af1a: ce49 s32i.n a4, a14, 48 +4022af1c: 0e0242 l8ui a4, a2, 14 +4022af1f: 0f0222 l8ui a2, a2, 15 +4022af22: 330b addi.n a3, a3, -1 +4022af24: 112280 slli a2, a2, 8 +4022af27: 202240 or a2, a2, a4 +4022af2a: 305e22 s16i a2, a14, 96 +4022af2d: 420c movi.n a2, 4 +4022af2f: 196e32 s32i a3, a14, 100 +4022af32: 4e29 s32i.n a2, a14, 16 +4022af34: 3e2a add.n a3, a14, a2 +4022af36: 1e1e22 l16ui a2, a14, 60 +4022af39: ff0785 call0 40229fb4 +4022af3c: a03220 addx4 a3, a2, a2 +4022af3f: 1133f0 slli a3, a3, 1 +4022af42: 2c5e32 s16i a3, a14, 88 +4022af45: 2b1e32 l16ui a3, a14, 86 +4022af48: 1e5e22 s16i a2, a14, 60 +4022af4b: 051366 bnei a3, 1, 4022af54 +4022af4e: 1122f0 slli a2, a2, 1 +4022af51: f42020 extui a2, a2, 0, 16 +4022af54: 2b5e22 s16i a2, a14, 86 +4022af57: 3a1e22 l16ui a2, a14, 116 +4022af5a: 220b addi.n a2, a2, -1 +4022af5c: 3a5e22 s16i a2, a14, 116 +4022af5f: 1f2e22 l32i a2, a14, 124 +4022af62: 0238 l32i.n a3, a2, 0 +4022af64: 1f6e32 s32i a3, a14, 124 +4022af67: 33cc bnez.n a3, 4022af6e +4022af69: f37c movi.n a3, -1 +4022af6b: 000046 j 4022af70 +4022af6e: 030c movi.n a3, 0 +4022af70: 1d5e32 s16i a3, a14, 58 +4022af73: 030c movi.n a3, 0 +4022af75: 4e4e32 s8i a3, a14, 78 +4022af78: fe8b85 call0 40229834 +4022af7b: 242e52 l32i a5, a14, 144 +4022af7e: c5cc bnez.n a5, 4022af8e +4022af80: 240e32 l8ui a3, a14, 36 +4022af83: 220c movi.n a2, 2 +4022af85: 202320 or a2, a3, a2 +4022af88: 244e22 s8i a2, a14, 36 +4022af8b: 009c86 j 4022b201 +4022af8e: 6e28 l32i.n a2, a14, 24 +4022af90: 0e3d mov.n a3, a14 +4022af92: 00a042 movi a4, 0 +4022af95: 0005c0 callx0 a5 +4022af98: 837c movi.n a3, -8 +4022af9a: 029237 bne a2, a3, 4022afa0 +4022af9d: 00dc46 j 4022b312 +4022afa0: fff706 j 4022af80 +4022afa3: e64700 excw +4022afa6: 958602 excw +4022afa9: 832100 moveqz a2, a1, a0 +4022afac: 81fc bnez.n a1, 4022afe8 +4022afae: 28fc83 excw +4022afb1: 4fa102 movi a0, 0x14f +4022afb4: 72fc bnez.n a2, 4022afef +4022afb6: 420002 l8ui a0, a0, 66 +4022afb9: 620102 l8ui a0, a1, 98 +4022afbc: 220202 l8ui a0, a2, 34 +4022afbf: 920302 l8ui a0, a3, 146 +4022afc2: 0018 l32i.n a1, a0, 0 +4022afc4: 0a38 l32i.n a3, a10, 0 +4022afc6: fc7bb1 l32r a11, 4022a1b4 +4022afc9: 114480 slli a4, a4, 8 +4022afcc: 112280 slli a2, a2, 8 +4022afcf: 207470 or a7, a4, a7 +4022afd2: 206260 or a6, a2, a6 +4022afd5: f48551 l32r a5, 402281ec +4022afd8: 0f4d mov.n a4, a15 +4022afda: 393a add.n a3, a9, a3 +4022afdc: 0b28 l32i.n a2, a11, 0 +4022afde: 0024c6 j 4022b075 +4022afe1: 02e647 bbsi a6, 4, 4022afe7 +4022afe4: 002506 j 4022b07c +4022afe7: fc7321 l32r a2, 4022a1b4 +4022afea: 142e42 l32i a4, a14, 80 +4022afed: 0228 l32i.n a2, a2, 0 +4022afef: 320b addi.n a3, a2, -1 +4022aff1: c03340 sub a3, a3, a4 +4022aff4: 04e396 bltz a3, 4022b046 +4022aff7: 172e32 l32i a3, a14, 92 +4022affa: c03230 sub a3, a2, a3 +4022affd: 4513e6 bgei a3, 1, 4022b046 +4022b000: 420c movi.n a2, 4 +4022b002: 7e58 l32i.n a5, a14, 28 +4022b004: 4e29 s32i.n a2, a14, 16 +4022b006: 280516 beqz a5, 4022b28a +4022b009: 6e28 l32i.n a2, a14, 24 +4022b00b: 040c movi.n a4, 0 +4022b00d: 0e3d mov.n a3, a14 +4022b00f: 0005c0 callx0 a5 +4022b012: a28c beqz.n a2, 4022b020 +4022b014: 837c movi.n a3, -8 +4022b016: 021237 beq a2, a3, 4022b01c +4022b019: 009b46 j 4022b28a +4022b01c: 00bc86 j 4022b312 +4022b01f: 0e2d00 excw +4022b022: 2b1ed2 l16ui a13, a14, 86 +4022b025: ff1a85 call0 4022a1d0 +4022b028: 381e22 l16ui a2, a14, 112 +4022b02b: 005216 beqz a2, 4022b034 +4022b02e: ffc222 addi a2, a2, -1 +4022b031: 385e22 s16i a2, a14, 112 +4022b034: 1e1e22 l16ui a2, a14, 60 +4022b037: 051d66 bnei a13, 1, 4022b040 +4022b03a: 1122f0 slli a2, a2, 1 +4022b03d: f42020 extui a2, a2, 0, 16 +4022b040: 2b5e22 s16i a2, a14, 86 +4022b043: 001586 j 4022b09d +4022b046: fc5c31 l32r a3, 4022a1b8 +4022b049: fc2981 l32r a8, 4022a0f0 +4022b04c: 0338 l32i.n a3, a3, 0 +4022b04e: 000372 l8ui a7, a3, 0 +4022b051: 010352 l8ui a5, a3, 1 +4022b054: 020362 l8ui a6, a3, 2 +4022b057: 030342 l8ui a4, a3, 3 +4022b05a: fc5831 l32r a3, 4022a1bc +4022b05d: 115580 slli a5, a5, 8 +4022b060: 001392 l16ui a9, a3, 0 +4022b063: 0838 l32i.n a3, a8, 0 +4022b065: 114480 slli a4, a4, 8 +4022b068: 207570 or a7, a5, a7 +4022b06b: f46051 l32r a5, 402281ec +4022b06e: 206460 or a6, a4, a6 +4022b071: 393a add.n a3, a9, a3 +4022b073: 0f4d mov.n a4, a15 +4022b075: 00aa45 call0 4022bb1c +4022b078: 006146 j 4022b201 +4022b07b: 141600 extui a1, a0, 6, 2 +4022b07e: 3118 l32i.n a1, a1, 12 +4022b080: fc1c movi.n a12, 31 +4022b082: ae28 l32i.n a2, a14, 40 +4022b084: 0338 l32i.n a3, a3, 0 +4022b086: 220b addi.n a2, a2, -1 +4022b088: 021237 beq a2, a3, 4022b08e +4022b08b: 005c86 j 4022b201 +4022b08e: 202ee0 or a2, a14, a14 +4022b091: 0085c5 call0 4022b8f0 +4022b094: 005a46 j 4022b201 +4022b097: 0e2d00 excw +4022b09a: ff1345 call0 4022a1d0 +4022b09d: 000c22 l8ui a2, a12, 0 +4022b0a0: 02e257 bbsi a2, 5, 4022b0a6 +4022b0a3: 005686 j 4022b201 +4022b0a6: 240e32 l8ui a3, a14, 36 +4022b0a9: 220c movi.n a2, 2 +4022b0ab: 202320 or a2, a3, a2 +4022b0ae: 244e22 s8i a2, a14, 36 +4022b0b1: 720c movi.n a2, 7 +4022b0b3: 0016c6 j 4022b112 +4022b0b6: 0e2d mov.n a2, a14 +4022b0b8: ff1145 call0 4022a1d0 +4022b0bb: 000c22 l8ui a2, a12, 0 +4022b0be: 031c movi.n a3, 16 +4022b0c0: 546257 bbci a2, 5, 4022b118 +4022b0c3: 000d22 l8ui a2, a13, 0 +4022b0c6: 240e42 l8ui a4, a14, 36 +4022b0c9: 3b0237 bnone a2, a3, 4022b108 +4022b0cc: fc3a21 l32r a2, 4022a1b4 +4022b0cf: 172e32 l32i a3, a14, 92 +4022b0d2: 0228 l32i.n a2, a2, 0 +4022b0d4: 309327 bne a3, a2, 4022b108 +4022b0d7: 230c movi.n a3, 2 +4022b0d9: 202430 or a2, a4, a3 +4022b0dc: 244e22 s8i a2, a14, 36 +4022b0df: 0e2d mov.n a2, a14 +4022b0e1: fe7a05 call0 40229884 +4022b0e4: 5a1831 l32r a3, 40201944 +4022b0e7: 0328 l32i.n a2, a3, 0 +4022b0e9: 029e27 bne a14, a2, 4022b0ef +4022b0ec: 002b46 j 4022b19d +4022b0ef: 5a1631 l32r a3, 40201948 +4022b0f2: 040c movi.n a4, 0 +4022b0f4: 0329 s32i.n a2, a3, 0 +4022b0f6: 0cb216 beqz a2, 4022b1c5 +4022b0f9: 3258 l32i.n a5, a2, 12 +4022b0fb: 029e57 bne a14, a5, 4022b101 +4022b0fe: 002b06 j 4022b1ae +4022b101: 140c movi.n a4, 1 +4022b103: 052d mov.n a2, a5 +4022b105: fffb46 j 4022b0f6 +4022b108: 220c movi.n a2, 2 +4022b10a: 202420 or a2, a4, a2 +4022b10d: 244e22 s8i a2, a14, 36 +4022b110: 820c movi.n a2, 8 +4022b112: 4e29 s32i.n a2, a14, 16 +4022b114: 003a46 j 4022b201 +4022b117: 0d2200 excw +4022b11a: 823700 mull a3, a7, a0 +4022b11d: 37c602 addi a0, a6, 55 +4022b120: 242100 extui a2, a0, 1, 3 +4022b123: 32fc bnez.n a2, 4022b15a +4022b125: 2e .byte 0x2e +4022b126: 022817 blt a8, a1, 4022b12c +4022b129: 021327 beq a3, a2, 4022b12f +4022b12c: 003446 j 4022b201 +4022b12f: 620c movi.n a2, 6 +4022b131: fff746 j 4022b112 +4022b134: 202ee0 or a2, a14, a14 +4022b137: ff0985 call0 4022a1d0 +4022b13a: 000c22 l8ui a2, a12, 0 +4022b13d: 02e257 bbsi a2, 5, 4022b143 +4022b140: 002f46 j 4022b201 +4022b143: 240e32 l8ui a3, a14, 36 +4022b146: 02a022 movi a2, 2 +4022b149: 202320 or a2, a3, a2 +4022b14c: 244e22 s8i a2, a14, 36 +4022b14f: 202ee0 or a2, a14, a14 +4022b152: fe7305 call0 40229884 +4022b155: 59fb31 l32r a3, 40201944 +4022b158: 0328 l32i.n a2, a3, 0 +4022b15a: 3f1e27 beq a14, a2, 4022b19d +4022b15d: 59fa31 l32r a3, 40201948 +4022b160: 040c movi.n a4, 0 +4022b162: 0329 s32i.n a2, a3, 0 +4022b164: 05d216 beqz a2, 4022b1c5 +4022b167: 3258 l32i.n a5, a2, 12 +4022b169: 411e57 beq a14, a5, 4022b1ae +4022b16c: 140c movi.n a4, 1 +4022b16e: 052d mov.n a2, a5 +4022b170: fffc06 j 4022b164 +4022b173: 2ee000 excw +4022b176: 058520 extui a8, a2, 21, 1 +4022b179: ff .byte 0xff +4022b17a: 000d22 l8ui a2, a13, 0 +4022b17d: 02e247 bbsi a2, 4, 4022b183 +4022b180: 001f46 j 4022b201 +4022b183: fc0c21 l32r a2, 4022a1b4 +4022b186: 172e32 l32i a3, a14, 92 +4022b189: 002222 l32i a2, a2, 0 +4022b18c: 719327 bne a3, a2, 4022b201 +4022b18f: 202ee0 or a2, a14, a14 +4022b192: fe6f05 call0 40229884 +4022b195: 59eb31 l32r a3, 40201944 +4022b198: 0328 l32i.n a2, a3, 0 +4022b19a: 069e27 bne a14, a2, 4022b1a4 +4022b19d: 3228 l32i.n a2, a2, 12 +4022b19f: 000906 j 4022b1c7 +4022b1a2: 310000 srai a0, a0, 16 +4022b1a5: 59e9 s32i.n a14, a9, 20 +4022b1a7: 040c movi.n a4, 0 +4022b1a9: 0329 s32i.n a2, a3, 0 +4022b1ab: 0004c6 j 4022b1c2 +4022b1ae: 048c beqz.n a4, 4022b1b2 +4022b1b0: 0329 s32i.n a2, a3, 0 +4022b1b2: 3e38 l32i.n a3, a14, 12 +4022b1b4: 3239 s32i.n a3, a2, 12 +4022b1b6: 0003c6 j 4022b1c9 +4022b1b9: 3258 l32i.n a5, a2, 12 +4022b1bb: ef1e57 beq a14, a5, 4022b1ae +4022b1be: 140c movi.n a4, 1 +4022b1c0: 052d mov.n a2, a5 +4022b1c2: ff3256 bnez a2, 4022b1b9 +4022b1c5: 048c beqz.n a4, 4022b1c9 +4022b1c7: 0329 s32i.n a2, a3, 0 +4022b1c9: 0aa022 movi a2, 10 +4022b1cc: 046e22 s32i a2, a14, 16 +4022b1cf: 59df21 l32r a2, 4020194c +4022b1d2: 002232 l32i a3, a2, 0 +4022b1d5: 02e9 s32i.n a14, a2, 0 +4022b1d7: 3e39 s32i.n a3, a14, 12 +4022b1d9: 012f85 call0 4022c4d4 +4022b1dc: 000846 j 4022b201 +4022b1df: 0e2d mov.n a2, a14 +4022b1e1: fefec5 call0 4022a1d0 +4022b1e4: 000d22 l8ui a2, a13, 0 +4022b1e7: 166247 bbci a2, 4, 4022b201 +4022b1ea: fbf221 l32r a2, 4022a1b4 +4022b1ed: 172e32 l32i a3, a14, 92 +4022b1f0: 0228 l32i.n a2, a2, 0 +4022b1f2: 0b9327 bne a3, a2, 4022b201 +4022b1f5: 000c32 l8ui a3, a12, 0 +4022b1f8: 10a022 movi a2, 16 +4022b1fb: 202320 or a2, a3, a2 +4022b1fe: 004c22 s8i a2, a12, 0 +4022b201: 000c32 l8ui a3, a12, 0 +4022b204: 1a6337 bbci a3, 3, 4022b222 +4022b207: 262e42 l32i a4, a14, 152 +4022b20a: 648c beqz.n a4, 4022b214 +4022b20c: 6e28 l32i.n a2, a14, 24 +4022b20e: f7af32 movi a3, -9 +4022b211: 0004c0 callx0 a4 +4022b214: 59cc21 l32r a2, 40201944 +4022b217: 0e3d mov.n a3, a14 +4022b219: fe6bc5 call0 402298d8 +4022b21c: 5fa142 movi a4, 0x15f +4022b21f: 000846 j 4022b244 +4022b222: 021c movi.n a2, 16 +4022b224: 2d0327 bnone a3, a2, 4022b255 +4022b227: 240e32 l8ui a3, a14, 36 +4022b22a: 0b8327 bany a3, a2, 4022b239 +4022b22d: 262e42 l32i a4, a14, 152 +4022b230: 548c beqz.n a4, 4022b239 +4022b232: 6e28 l32i.n a2, a14, 24 +4022b234: 637c movi.n a3, -10 +4022b236: 0004c0 callx0 a4 +4022b239: 59c221 l32r a2, 40201944 +4022b23c: 0e3d mov.n a3, a14 +4022b23e: fe6985 call0 402298d8 +4022b241: 6aa142 movi a4, 0x16a +4022b244: fe2631 l32r a3, 4022aadc +4022b247: 0e2d mov.n a2, a14 +4022b249: 58af01 l32r a0, 40201508 +4022b24c: 0000c0 callx0 a0 +4022b24f: 002fc6 j 4022b312 +4022b252: 000000 ill +4022b255: 381e42 l16ui a4, a14, 112 +4022b258: 84cc bnez.n a4, 4022b264 +4022b25a: fbdbd1 l32r a13, 4022a1c8 +4022b25d: 0d48 l32i.n a4, a13, 0 +4022b25f: 94dc bnez.n a4, 4022b27c +4022b261: 001ac6 j 4022b2d0 +4022b264: 222e52 l32i a5, a14, 136 +4022b267: fef516 beqz a5, 4022b25a +4022b26a: 6e28 l32i.n a2, a14, 24 +4022b26c: 0e3d mov.n a3, a14 +4022b26e: 0005c0 callx0 a5 +4022b271: 837c movi.n a3, -8 +4022b273: 029237 bne a2, a3, 4022b279 +4022b276: 002606 j 4022b312 +4022b279: fff746 j 4022b25a +4022b27c: 240e22 l8ui a2, a14, 36 +4022b27f: 126247 bbci a2, 4, 4022b295 +4022b282: 042d mov.n a2, a4 +4022b284: 201110 or a1, a1, a1 +4022b287: fdb185 call0 40228da0 +4022b28a: 0e2d mov.n a2, a14 +4022b28c: feb505 call0 40229de0 +4022b28f: 001fc6 j 4022b312 +4022b292: 000000 ill +4022b295: fbc621 l32r a2, 4022a1b0 +4022b298: 000222 l8ui a2, a2, 0 +4022b29b: 0a6237 bbci a2, 3, 4022b2a9 +4022b29e: 0d0432 l8ui a3, a4, 13 +4022b2a1: 120c movi.n a2, 1 +4022b2a3: 202320 or a2, a3, a2 +4022b2a6: 0d4422 s8i a2, a4, 13 +4022b2a9: 232e62 l32i a6, a14, 140 +4022b2ac: 050c movi.n a5, 0 +4022b2ae: 0e3d mov.n a3, a14 +4022b2b0: 868c beqz.n a6, 4022b2bc +4022b2b2: 062e22 l32i a2, a14, 24 +4022b2b5: 0006c0 callx0 a6 +4022b2b8: 000186 j 4022b2c2 +4022b2bb: 255000 extui a5, a0, 16, 3 +4022b2be: 6ac520 excw +4022b2c1: fe .byte 0xfe +4022b2c2: f8af32 movi a3, -8 +4022b2c5: 491237 beq a2, a3, 4022b312 +4022b2c8: 004216 beqz a2, 4022b2d0 +4022b2cb: 0d28 l32i.n a2, a13, 0 +4022b2cd: 216e22 s32i a2, a14, 132 +4022b2d0: 000c22 l8ui a2, a12, 0 +4022b2d3: 12e257 bbsi a2, 5, 4022b2e9 +4022b2d6: fe0021 l32r a2, 4022aad8 +4022b2d9: 00a032 movi a3, 0 +4022b2dc: 006232 s32i a3, a2, 0 +4022b2df: 202ee0 or a2, a14, a14 +4022b2e2: 00b085 call0 4022bdec +4022b2e5: 000a46 j 4022b312 +4022b2e8: 953100 extui a3, a0, 17, 10 +4022b2eb: 2259 s32i.n a5, a2, 8 +4022b2ed: 1e .byte 0x1e +4022b2ee: 20c016 beqz a0, 4022b4fe +4022b2f1: 033800 excw +4022b2f4: 041237 beq a2, a3, 4022b2fc +4022b2f7: 221b addi.n a2, a2, 1 +4022b2f9: 165e22 s16i a2, a14, 44 +4022b2fc: 232e62 l32i a6, a14, 140 +4022b2ff: fd3616 beqz a6, 4022b2d6 +4022b302: 050c movi.n a5, 0 +4022b304: 6e28 l32i.n a2, a14, 24 +4022b306: 0e3d mov.n a3, a14 +4022b308: 054d mov.n a4, a5 +4022b30a: 0006c0 callx0 a6 +4022b30d: 837c movi.n a3, -8 +4022b30f: c39237 bne a2, a3, 4022b2d6 +4022b312: fdf121 l32r a2, 4022aad8 +4022b315: 030c movi.n a3, 0 +4022b317: 0239 s32i.n a3, a2, 0 +4022b319: fba941 l32r a4, 4022a1c0 +4022b31c: fbab21 l32r a2, 4022a1c8 +4022b31f: 03cd mov.n a12, a3 +4022b321: 0239 s32i.n a3, a2, 0 +4022b323: 1428 l32i.n a2, a4, 4 +4022b325: 20d440 or a13, a4, a4 +4022b328: 041237 beq a2, a3, 4022b330 +4022b32b: fda745 call0 40228da0 +4022b32e: 1dc9 s32i.n a12, a13, 4 +4022b330: f56f45 call0 40220a28 +4022b333: 0222b6 bltui a2, 2, 4022b339 +4022b336: 003e06 j 4022b432 +4022b339: 020c movi.n a2, 0 +4022b33b: fe0685 call0 402293a4 +4022b33e: 003c06 j 4022b432 +4022b341: 000000 ill +4022b344: 948c beqz.n a4, 4022b351 +4022b346: 3ea8 l32i.n a10, a14, 12 +4022b348: 34a9 s32i.n a10, a4, 12 +4022b34a: 598341 l32r a4, 40201958 +4022b34d: 3e89 s32i.n a8, a14, 12 +4022b34f: 04e9 s32i.n a14, a4, 0 +4022b351: 026547 bbci a5, 4, 4022b357 +4022b354: fe8f06 j 4022ad94 +4022b357: 020c movi.n a2, 0 +4022b359: 02e517 bbsi a5, 1, 4022b35f +4022b35c: fdee06 j 4022ab18 +4022b35f: e98c beqz.n a9, 4022b371 +4022b361: 4938 l32i.n a3, a9, 16 +4022b363: 054366 bnei a3, 4, 4022b36c +4022b366: 01c222 addi a2, a2, 1 +4022b369: 742020 extui a2, a2, 0, 8 +4022b36c: 3998 l32i.n a9, a9, 12 +4022b36e: fffb46 j 4022b35f +4022b371: ee8631 l32r a3, 40226d8c +4022b374: 0020c0 memw +4022b377: 0338 l32i.n a3, a3, 0 +4022b379: 029237 bne a2, a3, 4022b37f +4022b37c: fde606 j 4022ab18 +4022b37f: 140e22 l8ui a2, a14, 20 +4022b382: fead85 call0 40229e5c +4022b385: 02cd mov.n a12, a2 +4022b387: 12cc bnez.n a2, 4022b38c +4022b389: fde2c6 j 4022ab18 +4022b38c: 0f28 l32i.n a2, a15, 0 +4022b38e: f39731 l32r a3, 402281ec +4022b391: 0c29 s32i.n a2, a12, 0 +4022b393: 101e22 l16ui a2, a14, 32 +4022b396: 105c22 s16i a2, a12, 32 +4022b399: 0328 l32i.n a2, a3, 0 +4022b39b: 1c29 s32i.n a2, a12, 4 +4022b39d: fb8621 l32r a2, 4022a1b8 +4022b3a0: 0238 l32i.n a3, a2, 0 +4022b3a2: 010322 l8ui a2, a3, 1 +4022b3a5: 000342 l8ui a4, a3, 0 +4022b3a8: 112280 slli a2, a2, 8 +4022b3ab: 202240 or a2, a2, a4 +4022b3ae: fb5041 l32r a4, 4022a0f0 +4022b3b1: 115c22 s16i a2, a12, 34 +4022b3b4: 320c movi.n a2, 3 +4022b3b6: 4c29 s32i.n a2, a12, 16 +4022b3b8: 0428 l32i.n a2, a4, 0 +4022b3ba: 421b addi.n a4, a2, 1 +4022b3bc: ac49 s32i.n a4, a12, 40 +4022b3be: cc49 s32i.n a4, a12, 48 +4022b3c0: 220b addi.n a2, a2, -1 +4022b3c2: 0e0342 l8ui a4, a3, 14 +4022b3c5: 0f0332 l8ui a3, a3, 15 +4022b3c8: 196c22 s32i a2, a12, 100 +4022b3cb: 6e28 l32i.n a2, a14, 24 +4022b3cd: 113380 slli a3, a3, 8 +4022b3d0: 6c29 s32i.n a2, a12, 24 +4022b3d2: 7e28 l32i.n a2, a14, 28 +4022b3d4: 203340 or a3, a3, a4 +4022b3d7: 7c29 s32i.n a2, a12, 28 +4022b3d9: 305c32 s16i a3, a12, 96 +4022b3dc: 2c5c32 s16i a3, a12, 88 +4022b3df: 080e32 l8ui a3, a14, 8 +4022b3e2: 8caf22 movi a2, -116 +4022b3e5: 102320 and a2, a3, a2 +4022b3e8: 084c22 s8i a2, a12, 8 +4022b3eb: 595621 l32r a2, 40201944 +4022b3ee: 0238 l32i.n a3, a2, 0 +4022b3f0: 02c9 s32i.n a12, a2, 0 +4022b3f2: 3c39 s32i.n a3, a12, 12 +4022b3f4: 010dc5 call0 4022c4d4 +4022b3f7: 3ccc22 addi a2, a12, 60 +4022b3fa: ff6685 call0 4022aa64 +4022b3fd: 1e1c22 l16ui a2, a12, 60 +4022b400: 3c4b addi.n a3, a12, 4 +4022b402: febb05 call0 40229fb4 +4022b405: 1e5c22 s16i a2, a12, 60 +4022b408: 231c movi.n a3, 18 +4022b40a: 0c2d mov.n a2, a12 +4022b40c: 006045 call0 4022ba14 +4022b40f: 971216 beqz a2, 4022ad84 +4022b412: 030c movi.n a3, 0 +4022b414: 0c2d mov.n a2, a12 +4022b416: fe9245 call0 40229d3c +4022b419: fdbec6 j 4022ab18 +4022b41c: 000c32 l8ui a3, a12, 0 +4022b41f: 820c movi.n a2, 8 +4022b421: 202320 or a2, a3, a2 +4022b424: 240e32 l8ui a3, a14, 36 +4022b427: 004c22 s8i a2, a12, 0 +4022b42a: e27c movi.n a2, -2 +4022b42c: 102320 and a2, a3, a2 +4022b42f: fed546 j 4022af88 +4022b432: f108 l32i.n a0, a1, 60 +4022b434: e1c8 l32i.n a12, a1, 56 +4022b436: d1d8 l32i.n a13, a1, 52 +4022b438: c1e8 l32i.n a14, a1, 48 +4022b43a: b1f8 l32i.n a15, a1, 44 +4022b43c: 40c112 addi a1, a1, 64 +4022b43f: f00d ret.n +4022b441: 000000 ill +4022b444: fe8863 excw +4022b447: 3f .byte 0x3f +4022b448: d0c112 addi a1, a1, -48 +4022b44b: 0761f2 s32i a15, a1, 28 +4022b44e: 20f220 or a15, a2, a2 +4022b451: 02a022 movi a2, 2 +4022b454: 038d mov.n a8, a3 +4022b456: 102620 and a2, a6, a2 +4022b459: c30c movi.n a3, 12 +4022b45b: 932320 movnez a2, a3, a2 +4022b45e: 81e9 s32i.n a14, a1, 32 +4022b460: 04e060 extui a14, a6, 0, 1 +4022b463: a0ee20 addx4 a14, a14, a2 +4022b466: f1eb21 l32r a2, 40227c14 +4022b469: fff631 l32r a3, 4022b444 +4022b46c: 4228 l32i.n a2, a2, 16 +4022b46e: 91d9 s32i.n a13, a1, 36 +4022b470: 0149 s32i.n a4, a1, 0 +4022b472: 05dd mov.n a13, a5 +4022b474: a6a042 movi a4, 166 +4022b477: 050c movi.n a5, 0 +4022b479: a1c9 s32i.n a12, a1, 40 +4022b47b: 2169 s32i.n a6, a1, 8 +4022b47d: 1189 s32i.n a8, a1, 4 +4022b47f: b109 s32i.n a0, a1, 44 +4022b481: 582001 l32r a0, 40201504 +4022b484: 0000c0 callx0 a0 +4022b487: 02cd mov.n a12, a2 +4022b489: 2168 l32i.n a6, a1, 8 +4022b48b: 1188 l32i.n a8, a1, 4 +4022b48d: 72cc bnez.n a2, 4022b498 +4022b48f: 082d mov.n a2, a8 +4022b491: fd90c5 call0 40228da0 +4022b494: 000886 j 4022b4ba +4022b497: 426200 excw +4022b49a: 0e .byte 0xe +4022b49b: 00a022 movi a2, 0 +4022b49e: 006c22 s32i a2, a12, 0 +4022b4a1: 041822 l16ui a2, a8, 8 +4022b4a4: 1c89 s32i.n a8, a12, 4 +4022b4a6: c022e0 sub a2, a2, a14 +4022b4a9: 065c22 s16i a2, a12, 12 +4022b4ac: 431c movi.n a3, 20 +4022b4ae: 082d mov.n a2, a8 +4022b4b0: fd8645 call0 40228d18 +4022b4b3: 928c beqz.n a2, 4022b4c0 +4022b4b5: 0c2d mov.n a2, a12 +4022b4b7: fe37c5 call0 40229834 +4022b4ba: 020c movi.n a2, 0 +4022b4bc: 002546 j 4022b555 +4022b4bf: 1f4200 excw +4022b4c2: 1c2810 excw +4022b4c5: 113480 slli a3, a4, 8 +4022b4c8: 1228 l32i.n a2, a2, 4 +4022b4ca: 414840 srli a4, a4, 8 +4022b4cd: 111f62 l16ui a6, a15, 34 +4022b4d0: 203340 or a3, a3, a4 +4022b4d3: 4c29 s32i.n a2, a12, 16 +4022b4d5: f43030 extui a3, a3, 0, 16 +4022b4d8: 004232 s8i a3, a2, 0 +4022b4db: 114680 slli a4, a6, 8 +4022b4de: 413830 srli a3, a3, 8 +4022b4e1: 416860 srli a6, a6, 8 +4022b4e4: 014232 s8i a3, a2, 1 +4022b4e7: 015d80 slli a5, a13, 24 +4022b4ea: 7538d0 extui a3, a13, 24, 8 +4022b4ed: 204460 or a4, a4, a6 +4022b4f0: f44040 extui a4, a4, 0, 16 +4022b4f3: 205530 or a5, a5, a3 +4022b4f6: 56fe31 l32r a3, 402010f0 +4022b4f9: 024242 s8i a4, a2, 2 +4022b4fc: 414840 srli a4, a4, 8 +4022b4ff: 034242 s8i a4, a2, 3 +4022b502: 104d30 and a4, a13, a3 +4022b505: 4178d0 srli a7, a13, 8 +4022b508: 114480 slli a4, a4, 8 +4022b50b: 103730 and a3, a7, a3 +4022b50e: 205540 or a5, a5, a4 +4022b511: 205530 or a5, a5, a3 +4022b514: 743850 extui a3, a5, 8, 8 +4022b517: 054232 s8i a3, a2, 5 +4022b51a: 74e2e0 extui a14, a14, 2, 8 +4022b51d: 753050 extui a3, a5, 16, 8 +4022b520: 064232 s8i a3, a2, 6 +4022b523: ee5b addi.n a14, a14, 5 +4022b525: 0138 l32i.n a3, a1, 0 +4022b527: 11ee40 slli a14, a14, 12 +4022b52a: 20de30 or a13, a14, a3 +4022b52d: 113d80 slli a3, a13, 8 +4022b530: 21d8d0 srai a13, a13, 8 +4022b533: 20d3d0 or a13, a3, a13 +4022b536: f4d0d0 extui a13, a13, 0, 16 +4022b539: 044252 s8i a5, a2, 4 +4022b53c: 0c42d2 s8i a13, a2, 12 +4022b53f: 030c movi.n a3, 0 +4022b541: 755850 extui a5, a5, 24, 8 +4022b544: 41d8d0 srli a13, a13, 8 +4022b547: 074252 s8i a5, a2, 7 +4022b54a: 0d42d2 s8i a13, a2, 13 +4022b54d: 124232 s8i a3, a2, 18 +4022b550: 134232 s8i a3, a2, 19 +4022b553: 0c2d mov.n a2, a12 +4022b555: b108 l32i.n a0, a1, 44 +4022b557: a1c8 l32i.n a12, a1, 40 +4022b559: 91d8 l32i.n a13, a1, 36 +4022b55b: 81e8 l32i.n a14, a1, 32 +4022b55d: 71f8 l32i.n a15, a1, 28 +4022b55f: 30c112 addi a1, a1, 48 +4022b562: f00d ret.n +4022b564: f0c112 addi a1, a1, -16 +4022b567: 14c332 addi a3, a3, 20 +4022b56a: 0261c2 s32i a12, a1, 8 +4022b56d: 0161d2 s32i a13, a1, 4 +4022b570: 20c220 or a12, a2, a2 +4022b573: 04dd mov.n a13, a4 +4022b575: f43030 extui a3, a3, 0, 16 +4022b578: 040c movi.n a4, 0 +4022b57a: 120c movi.n a2, 1 +4022b57c: 3109 s32i.n a0, a1, 12 +4022b57e: fd8945 call0 40228e14 +4022b581: 0af216 beqz a2, 4022b634 +4022b584: 101c52 l16ui a5, a12, 32 +4022b587: 1238 l32i.n a3, a2, 4 +4022b589: 114580 slli a4, a5, 8 +4022b58c: 415850 srli a5, a5, 8 +4022b58f: 204450 or a4, a4, a5 +4022b592: f44040 extui a4, a4, 0, 16 +4022b595: 111c52 l16ui a5, a12, 34 +4022b598: 004342 s8i a4, a3, 0 +4022b59b: 414840 srli a4, a4, 8 +4022b59e: 014342 s8i a4, a3, 1 +4022b5a1: 114580 slli a4, a5, 8 +4022b5a4: 415850 srli a5, a5, 8 +4022b5a7: 204450 or a4, a4, a5 +4022b5aa: f44040 extui a4, a4, 0, 16 +4022b5ad: 024342 s8i a4, a3, 2 +4022b5b0: 414840 srli a4, a4, 8 +4022b5b3: ac68 l32i.n a6, a12, 40 +4022b5b5: 034342 s8i a4, a3, 3 +4022b5b8: 7448d0 extui a4, a13, 8, 8 +4022b5bb: 054342 s8i a4, a3, 5 +4022b5be: 56cc51 l32r a5, 402010f0 +4022b5c1: 7540d0 extui a4, a13, 16, 8 +4022b5c4: 017680 slli a7, a6, 24 +4022b5c7: 064342 s8i a4, a3, 6 +4022b5ca: 754860 extui a4, a6, 24, 8 +4022b5cd: 204740 or a4, a7, a4 +4022b5d0: 107650 and a7, a6, a5 +4022b5d3: 117780 slli a7, a7, 8 +4022b5d6: 207470 or a7, a4, a7 +4022b5d9: 414860 srli a4, a6, 8 +4022b5dc: 105450 and a5, a4, a5 +4022b5df: 204750 or a4, a7, a5 +4022b5e2: 745840 extui a5, a4, 8, 8 +4022b5e5: 084342 s8i a4, a3, 8 +4022b5e8: 094352 s8i a5, a3, 9 +4022b5eb: 755040 extui a5, a4, 16, 8 +4022b5ee: 754840 extui a4, a4, 24, 8 +4022b5f1: 0a4352 s8i a5, a3, 10 +4022b5f4: 0b4342 s8i a4, a3, 11 +4022b5f7: 171c52 l16ui a5, a12, 46 +4022b5fa: 045c movi.n a4, 80 +4022b5fc: 0c4342 s8i a4, a3, 12 +4022b5ff: 041c movi.n a4, 16 +4022b601: 0d4342 s8i a4, a3, 13 +4022b604: 117580 slli a7, a5, 8 +4022b607: 414850 srli a4, a5, 8 +4022b60a: 204740 or a4, a7, a4 +4022b60d: f44040 extui a4, a4, 0, 16 +4022b610: 0e4342 s8i a4, a3, 14 +4022b613: 414840 srli a4, a4, 8 +4022b616: 0443d2 s8i a13, a3, 4 +4022b619: 0f4342 s8i a4, a3, 15 +4022b61c: 75d8d0 extui a13, a13, 24, 8 +4022b61f: 040c movi.n a4, 0 +4022b621: 0743d2 s8i a13, a3, 7 +4022b624: 104342 s8i a4, a3, 16 +4022b627: 114342 s8i a4, a3, 17 +4022b62a: 124342 s8i a4, a3, 18 +4022b62d: 134342 s8i a4, a3, 19 +4022b630: 656a add.n a6, a5, a6 +4022b632: cc69 s32i.n a6, a12, 48 +4022b634: 3108 l32i.n a0, a1, 12 +4022b636: 21c8 l32i.n a12, a1, 8 +4022b638: 11d8 l32i.n a13, a1, 4 +4022b63a: 10c112 addi a1, a1, 16 +4022b63d: f00d ret.n + ... + +4022b640 : +4022b640: b0c112 addi a1, a1, -80 +4022b643: 745050 extui a5, a5, 0, 8 +4022b646: 1261c2 s32i a12, a1, 72 +4022b649: 136102 s32i a0, a1, 76 +4022b64c: 1161d2 s32i a13, a1, 68 +4022b64f: 1061e2 s32i a14, a1, 64 +4022b652: f1f9 s32i.n a15, a1, 60 +4022b654: 2139 s32i.n a3, a1, 8 +4022b656: 4159 s32i.n a5, a1, 16 +4022b658: 02cd mov.n a12, a2 +4022b65a: f49040 extui a9, a4, 0, 16 +4022b65d: 427c movi.n a2, -12 +4022b65f: 1ee316 beqz a3, 4022b851 +4022b662: 4c38 l32i.n a3, a12, 16 +4022b664: fec322 addi a2, a3, -2 +4022b667: 0732b6 bltui a2, 3, 4022b672 +4022b66a: 527c movi.n a2, -11 +4022b66c: 027326 beqi a3, 7, 4022b672 +4022b66f: 007786 j 4022b851 +4022b672: e9bc beqz.n a9, 4022b6b4 +4022b674: 391c22 l16ui a2, a12, 114 +4022b677: 0eb297 bgeu a2, a9, 4022b689 +4022b67a: 240c32 l8ui a3, a12, 36 +4022b67d: 80af22 movi a2, -128 +4022b680: 202320 or a2, a3, a2 +4022b683: 244c22 s8i a2, a12, 36 +4022b686: 000906 j 4022b6ae +4022b689: 3a1c22 l16ui a2, a12, 116 +4022b68c: ea82f6 bgeui a2, 8, 4022b67a +4022b68f: 000846 j 4022b6b4 +4022b692: d20000 excw +4022b695: 3b1c movi.n a11, 19 +4022b697: fdac beqz.n a13, 4022b6ca +4022b699: 097d mov.n a7, a9 +4022b69b: 01bd97 bgeu a13, a9, 4022b6a0 +4022b69e: 0d7d mov.n a7, a13 +4022b6a0: f4f070 extui a15, a7, 0, 16 +4022b6a3: c0ddf0 sub a13, a13, a15 +4022b6a6: f4d0d0 extui a13, a13, 0, 16 +4022b6a9: 085d mov.n a5, a8 +4022b6ab: 1eb9f7 bgeu a9, a15, 4022b6cd +4022b6ae: f27c movi.n a2, -1 +4022b6b0: 006746 j 4022b851 +4022b6b3: 1c2200 excw +4022b6b6: 823a add.n a8, a2, a3 +4022b6b8: 1e2c movi.n a14, 33 +4022b6ba: 0129 s32i.n a2, a1, 0 +4022b6bc: 188816 beqz a8, 4022b848 +4022b6bf: 0858 l32i.n a5, a8, 0 +4022b6c1: fcf516 beqz a5, 4022b694 +4022b6c4: 058d mov.n a8, a5 +4022b6c6: fffd46 j 4022b6bf +4022b6c9: a0f200 addx4 a15, a2, a0 +4022b6cc: 0e0c00 excw +4022b6cf: 0fbd mov.n a11, a15 +4022b6d1: 31e9 s32i.n a14, a1, 12 +4022b6d3: 023b97 bltu a11, a9, 4022b6d9 +4022b6d6: 002d86 j 4022b790 +4022b6d9: c029b0 sub a2, a9, a11 +4022b6dc: 1e1c32 l16ui a3, a12, 60 +4022b6df: 025d mov.n a5, a2 +4022b6e1: f42020 extui a2, a2, 0, 16 +4022b6e4: 01b327 bgeu a3, a2, 4022b6e9 +4022b6e7: 035d mov.n a5, a3 +4022b6e9: f42050 extui a2, a5, 0, 16 +4022b6ec: 00a042 movi a4, 0 +4022b6ef: 1129 s32i.n a2, a1, 4 +4022b6f1: 042d mov.n a2, a4 +4022b6f3: 6159 s32i.n a5, a1, 24 +4022b6f5: 8189 s32i.n a8, a1, 32 +4022b6f7: 9199 s32i.n a9, a1, 36 +4022b6f9: 71b9 s32i.n a11, a1, 28 +4022b6fb: fd7185 call0 40228e14 +4022b6fe: 02ad mov.n a10, a2 +4022b700: 6158 l32i.n a5, a1, 24 +4022b702: 8188 l32i.n a8, a1, 32 +4022b704: 9198 l32i.n a9, a1, 36 +4022b706: 71b8 l32i.n a11, a1, 28 +4022b708: 125216 beqz a2, 4022b831 +4022b70b: 0512d2 l16ui a13, a2, 10 +4022b70e: 045252 s16i a5, a2, 8 +4022b711: 055252 s16i a5, a2, 10 +4022b714: 1138 l32i.n a3, a1, 4 +4022b716: 2128 l32i.n a2, a1, 8 +4022b718: 034d mov.n a4, a3 +4022b71a: c0dd30 sub a13, a13, a3 +4022b71d: 32ba add.n a3, a2, a11 +4022b71f: 1a28 l32i.n a2, a10, 4 +4022b721: 8189 s32i.n a8, a1, 32 +4022b723: 9199 s32i.n a9, a1, 36 +4022b725: 71b9 s32i.n a11, a1, 28 +4022b727: 51a9 s32i.n a10, a1, 20 +4022b729: 563a01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022b72c: 0000c0 callx0 a0 +4022b72f: 51a8 l32i.n a10, a1, 20 +4022b731: f4d0d0 extui a13, a13, 0, 16 +4022b734: 0a2d mov.n a2, a10 +4022b736: fd8b45 call0 40228fec +4022b739: 0138 l32i.n a3, a1, 0 +4022b73b: 8188 l32i.n a8, a1, 32 +4022b73d: 232a add.n a2, a3, a2 +4022b73f: f42020 extui a2, a2, 0, 16 +4022b742: 0129 s32i.n a2, a1, 0 +4022b744: 830c movi.n a3, 8 +4022b746: 9198 l32i.n a9, a1, 36 +4022b748: 51a8 l32i.n a10, a1, 20 +4022b74a: 71b8 l32i.n a11, a1, 28 +4022b74c: 08b327 bgeu a3, a2, 4022b758 +4022b74f: 0a2d mov.n a2, a10 +4022b751: fd64c5 call0 40228da0 +4022b754: 003646 j 4022b831 +4022b757: 2c5200 excw +4022b75a: 0c1b addi.n a0, a12, 1 +4022b75c: 5b5a06 j 402424c8 <_irom0_text_end+0x1194c> +4022b75f: 064d mov.n a4, a6 +4022b761: 0a3d mov.n a3, a10 +4022b763: 0c2d mov.n a2, a12 +4022b765: 8189 s32i.n a8, a1, 32 +4022b767: 9199 s32i.n a9, a1, 36 +4022b769: 71b9 s32i.n a11, a1, 28 +4022b76b: ffcdc5 call0 4022b448 +4022b76e: 025d mov.n a5, a2 +4022b770: 8188 l32i.n a8, a1, 32 +4022b772: 9198 l32i.n a9, a1, 36 +4022b774: 71b8 l32i.n a11, a1, 28 +4022b776: 0b7216 beqz a2, 4022b831 +4022b779: 5e8c beqz.n a14, 4022b782 +4022b77b: 3128 l32i.n a2, a1, 12 +4022b77d: 0259 s32i.n a5, a2, 0 +4022b77f: 000046 j 4022b784 +4022b782: 02ed mov.n a14, a2 +4022b784: 1138 l32i.n a3, a1, 4 +4022b786: 3159 s32i.n a5, a1, 12 +4022b788: bb3a add.n a11, a11, a3 +4022b78a: f4b0b0 extui a11, a11, 0, 16 +4022b78d: ffd086 j 4022b6d3 +4022b790: 045f16 beqz a15, 4022b7d9 +4022b793: 1868 l32i.n a6, a8, 4 +4022b795: 86bc beqz.n a6, 4022b7d1 +4022b797: 041622 l16ui a2, a6, 8 +4022b79a: 2f2a add.n a2, a15, a2 +4022b79c: 045622 s16i a2, a6, 8 +4022b79f: 0628 l32i.n a2, a6, 0 +4022b7a1: 72ec bnez.n a2, 4022b7cc +4022b7a3: 051622 l16ui a2, a6, 10 +4022b7a6: 16a8 l32i.n a10, a6, 4 +4022b7a8: 2138 l32i.n a3, a1, 8 +4022b7aa: 0f4d mov.n a4, a15 +4022b7ac: 2a2a add.n a2, a10, a2 +4022b7ae: 6159 s32i.n a5, a1, 24 +4022b7b0: 5169 s32i.n a6, a1, 20 +4022b7b2: 8189 s32i.n a8, a1, 32 +4022b7b4: 9199 s32i.n a9, a1, 36 +4022b7b6: 561701 l32r a0, 40201014 <_irom0_text_start+0x4> +4022b7b9: 0000c0 callx0 a0 +4022b7bc: 5168 l32i.n a6, a1, 20 +4022b7be: 9198 l32i.n a9, a1, 36 +4022b7c0: 051622 l16ui a2, a6, 10 +4022b7c3: 8188 l32i.n a8, a1, 32 +4022b7c5: 2f2a add.n a2, a15, a2 +4022b7c7: 6158 l32i.n a5, a1, 24 +4022b7c9: 055622 s16i a2, a6, 10 +4022b7cc: 0668 l32i.n a6, a6, 0 +4022b7ce: fff0c6 j 4022b795 +4022b7d1: 061822 l16ui a2, a8, 12 +4022b7d4: 7f2a add.n a7, a15, a2 +4022b7d6: 065872 s16i a7, a8, 12 +4022b7d9: 3b5cd2 s16i a13, a12, 118 +4022b7dc: 48cc bnez.n a8, 4022b7e4 +4022b7de: 1e6ce2 s32i a14, a12, 120 +4022b7e1: 000046 j 4022b7e6 +4022b7e4: 08e9 s32i.n a14, a8, 0 +4022b7e6: 1b2c22 l32i a2, a12, 108 +4022b7e9: 229a add.n a2, a2, a9 +4022b7eb: 1b6c22 s32i a2, a12, 108 +4022b7ee: 391c22 l16ui a2, a12, 114 +4022b7f1: c09290 sub a9, a2, a9 +4022b7f4: 0128 l32i.n a2, a1, 0 +4022b7f6: 395c92 s16i a9, a12, 114 +4022b7f9: 3a5c22 s16i a2, a12, 116 +4022b7fc: 020c movi.n a2, 0 +4022b7fe: 4f1527 beq a5, a2, 4022b851 +4022b801: 4548 l32i.n a4, a5, 16 +4022b803: 4a1427 beq a4, a2, 4022b851 +4022b806: 4138 l32i.n a3, a1, 16 +4022b808: 45e317 bbsi a3, 1, 4022b851 +4022b80b: 0d0422 l8ui a2, a4, 13 +4022b80e: 0c0432 l8ui a3, a4, 12 +4022b811: 112280 slli a2, a2, 8 +4022b814: 202230 or a2, a2, a3 +4022b817: 87c331 l32r a3, 4020d724 +4022b81a: 202230 or a2, a2, a3 +4022b81d: f42020 extui a2, a2, 0, 16 +4022b820: 0c4422 s8i a2, a4, 12 +4022b823: 412820 srli a2, a2, 8 +4022b826: 0d4422 s8i a2, a4, 13 +4022b829: 020c movi.n a2, 0 +4022b82b: 000886 j 4022b851 +4022b82e: 000000 ill +4022b831: 240c32 l8ui a3, a12, 36 +4022b834: 80af22 movi a2, -128 +4022b837: 202320 or a2, a3, a2 +4022b83a: 244c22 s8i a2, a12, 36 +4022b83d: e6de16 beqz a14, 4022b6ae +4022b840: 0e2d mov.n a2, a14 +4022b842: fe0205 call0 40229864 +4022b845: ff9946 j 4022b6ae +4022b848: 050c movi.n a5, 0 +4022b84a: 05dd mov.n a13, a5 +4022b84c: 05fd mov.n a15, a5 +4022b84e: ff9ec6 j 4022b6cd +4022b851: 132102 l32i a0, a1, 76 +4022b854: 1221c2 l32i a12, a1, 72 +4022b857: 1121d2 l32i a13, a1, 68 +4022b85a: 1021e2 l32i a14, a1, 64 +4022b85d: f1f8 l32i.n a15, a1, 60 +4022b85f: 50c112 addi a1, a1, 80 +4022b862: f00d ret.n + +4022b864 : +4022b864: e0c112 addi a1, a1, -32 +4022b867: 61c9 s32i.n a12, a1, 24 +4022b869: 02cd mov.n a12, a2 +4022b86b: 172222 l32i a2, a2, 92 +4022b86e: 562041 l32r a4, 402010f0 +4022b871: 753820 extui a3, a2, 24, 8 +4022b874: 015280 slli a5, a2, 24 +4022b877: 205530 or a5, a5, a3 +4022b87a: 103240 and a3, a2, a4 +4022b87d: 113380 slli a3, a3, 8 +4022b880: 412820 srli a2, a2, 8 +4022b883: 203530 or a3, a5, a3 +4022b886: 104240 and a4, a2, a4 +4022b889: 204340 or a4, a3, a4 +4022b88c: 0c2d mov.n a2, a12 +4022b88e: 030c movi.n a3, 0 +4022b890: 51d9 s32i.n a13, a1, 20 +4022b892: 7109 s32i.n a0, a1, 28 +4022b894: 41e9 s32i.n a14, a1, 16 +4022b896: 31f9 s32i.n a15, a1, 12 +4022b898: ffcc85 call0 4022b564 +4022b89b: 02dd mov.n a13, a2 +4022b89d: e27c movi.n a2, -2 +4022b89f: 03dd16 beqz a13, 4022b8e0 +4022b8a2: 240c32 l8ui a3, a12, 36 +4022b8a5: c27c movi.n a2, -4 +4022b8a7: 102320 and a2, a3, a2 +4022b8aa: 1df8 l32i.n a15, a13, 4 +4022b8ac: 244c22 s8i a2, a12, 36 +4022b8af: ec4b addi.n a14, a12, 4 +4022b8b1: 041d62 l16ui a6, a13, 8 +4022b8b4: 650c movi.n a5, 6 +4022b8b6: 0e4d mov.n a4, a14 +4022b8b8: 0c3d mov.n a3, a12 +4022b8ba: 0d2d mov.n a2, a13 +4022b8bc: 04e385 call0 402306f8 +4022b8bf: 104f22 s8i a2, a15, 16 +4022b8c2: f42820 extui a2, a2, 8, 16 +4022b8c5: 114f22 s8i a2, a15, 17 +4022b8c8: 090c62 l8ui a6, a12, 9 +4022b8cb: 0a0c52 l8ui a5, a12, 10 +4022b8ce: 670c movi.n a7, 6 +4022b8d0: 0e4d mov.n a4, a14 +4022b8d2: 0c3d mov.n a3, a12 +4022b8d4: 0d2d mov.n a2, a13 +4022b8d6: fcdb05 call0 40228688 +4022b8d9: 0d2d mov.n a2, a13 +4022b8db: fd4c45 call0 40228da0 +4022b8de: 020c movi.n a2, 0 +4022b8e0: 7108 l32i.n a0, a1, 28 +4022b8e2: 61c8 l32i.n a12, a1, 24 +4022b8e4: 51d8 l32i.n a13, a1, 20 +4022b8e6: 41e8 l32i.n a14, a1, 16 +4022b8e8: 31f8 l32i.n a15, a1, 12 +4022b8ea: 20c112 addi a1, a1, 32 +4022b8ed: f00d ret.n + ... + +4022b8f0 : +4022b8f0: f0c112 addi a1, a1, -16 +4022b8f3: 1f2262 l32i a6, a2, 124 +4022b8f6: 31c9 s32i.n a12, a1, 12 +4022b8f8: 0ad616 beqz a6, 4022b9a9 +4022b8fb: 0638 l32i.n a3, a6, 0 +4022b8fd: 1e2272 l32i a7, a2, 120 +4022b900: 55fc91 l32r a9, 402010f0 +4022b903: 1f6232 s32i a3, a2, 124 +4022b906: 78c2a2 addi a10, a2, 120 +4022b909: 084716 beqz a7, 4022b991 +4022b90c: 47b8 l32i.n a11, a7, 16 +4022b90e: 46c8 l32i.n a12, a6, 16 +4022b910: 050b42 l8ui a4, a11, 5 +4022b913: 040b82 l8ui a8, a11, 4 +4022b916: 060b32 l8ui a3, a11, 6 +4022b919: 114480 slli a4, a4, 8 +4022b91c: 205480 or a5, a4, a8 +4022b91f: 113300 slli a3, a3, 16 +4022b922: 204350 or a4, a3, a5 +4022b925: 050c82 l8ui a8, a12, 5 +4022b928: 070b32 l8ui a3, a11, 7 +4022b92b: 060c52 l8ui a5, a12, 6 +4022b92e: 040cb2 l8ui a11, a12, 4 +4022b931: 118880 slli a8, a8, 8 +4022b934: 013380 slli a3, a3, 24 +4022b937: 203340 or a3, a3, a4 +4022b93a: 115500 slli a5, a5, 16 +4022b93d: 2048b0 or a4, a8, a11 +4022b940: 208540 or a8, a5, a4 +4022b943: 070c52 l8ui a5, a12, 7 +4022b946: 754830 extui a4, a3, 24, 8 +4022b949: 015580 slli a5, a5, 24 +4022b94c: 205580 or a5, a5, a8 +4022b94f: 018380 slli a8, a3, 24 +4022b952: 208840 or a8, a8, a4 +4022b955: 104390 and a4, a3, a9 +4022b958: 114480 slli a4, a4, 8 +4022b95b: 413830 srli a3, a3, 8 +4022b95e: 204840 or a4, a8, a4 +4022b961: 103390 and a3, a3, a9 +4022b964: 018580 slli a8, a5, 24 +4022b967: 203430 or a3, a4, a3 +4022b96a: 754850 extui a4, a5, 24, 8 +4022b96d: 204840 or a4, a8, a4 +4022b970: 108590 and a8, a5, a9 +4022b973: 118880 slli a8, a8, 8 +4022b976: 415850 srli a5, a5, 8 +4022b979: 204480 or a4, a4, a8 +4022b97c: 105590 and a5, a5, a9 +4022b97f: 204450 or a4, a4, a5 +4022b982: c04340 sub a4, a3, a4 +4022b985: 0084d6 bgez a4, 4022b991 +4022b988: 07ad mov.n a10, a7 +4022b98a: 0778 l32i.n a7, a7, 0 +4022b98c: ffde46 j 4022b909 +4022b98f: 790000 excw +4022b992: 0a6906 j 4022e33a +4022b995: 0638 l32i.n a3, a6, 0 +4022b997: 13cc bnez.n a3, 4022b99c +4022b999: 3b5232 s16i a3, a2, 118 +4022b99c: 4e0232 l8ui a3, a2, 78 +4022b99f: 331b addi.n a3, a3, 1 +4022b9a1: 4e4232 s8i a3, a2, 78 +4022b9a4: 030c movi.n a3, 0 +4022b9a6: 106232 s32i a3, a2, 64 +4022b9a9: 31c8 l32i.n a12, a1, 12 +4022b9ab: 10c112 addi a1, a1, 16 +4022b9ae: f00d ret.n + +4022b9b0 : +4022b9b0: f0c112 addi a1, a1, -16 +4022b9b3: 21c9 s32i.n a12, a1, 8 +4022b9b5: 02cd mov.n a12, a2 +4022b9b7: 1f2222 l32i a2, a2, 124 +4022b9ba: 036102 s32i a0, a1, 12 +4022b9bd: 049216 beqz a2, 4022ba0a +4022b9c0: 240c22 l8ui a2, a12, 36 +4022b9c3: 43e227 bbsi a2, 2, 4022ba0a +4022b9c6: 202cc0 or a2, a12, a12 +4022b9c9: fff245 call0 4022b8f0 +4022b9cc: 2b1c22 l16ui a2, a12, 86 +4022b9cf: 301c32 l16ui a3, a12, 96 +4022b9d2: 0ab327 bgeu a3, a2, 4022b9e0 +4022b9d5: 413130 srli a3, a3, 1 +4022b9d8: 2c5c32 s16i a3, a12, 88 +4022b9db: 0001c6 j 4022b9e6 +4022b9de: 200000 or a0, a0, a0 +4022b9e1: 224121 l32r a2, 401f42e8 <_lit4_end+0xedfbc> +4022b9e4: 2c5c movi.n a12, 82 +4022b9e6: 1e1c32 l16ui a3, a12, 60 +4022b9e9: 2c1c42 l16ui a4, a12, 88 +4022b9ec: 1123f0 slli a2, a3, 1 +4022b9ef: 02a427 bge a4, a2, 4022b9f5 +4022b9f2: 2c5c22 s16i a2, a12, 88 +4022b9f5: 232a add.n a2, a3, a2 +4022b9f7: 2c1c32 l16ui a3, a12, 88 +4022b9fa: 223a add.n a2, a2, a3 +4022b9fc: 240c32 l8ui a3, a12, 36 +4022b9ff: 2b5c22 s16i a2, a12, 86 +4022ba02: 420c movi.n a2, 4 +4022ba04: 202320 or a2, a3, a2 +4022ba07: 244c22 s8i a2, a12, 36 +4022ba0a: 3108 l32i.n a0, a1, 12 +4022ba0c: 21c8 l32i.n a12, a1, 8 +4022ba0e: 10c112 addi a1, a1, 16 +4022ba11: f00d ret.n + ... + +4022ba14 : +4022ba14: e0c112 addi a1, a1, -32 +4022ba17: 61c9 s32i.n a12, a1, 24 +4022ba19: 02cd mov.n a12, a2 +4022ba1b: 3a1222 l16ui a2, a2, 116 +4022ba1e: 51d9 s32i.n a13, a1, 20 +4022ba20: 31f9 s32i.n a15, a1, 12 +4022ba22: 7109 s32i.n a0, a1, 28 +4022ba24: 74f030 extui a15, a3, 0, 8 +4022ba27: 41e9 s32i.n a14, a1, 16 +4022ba29: 14d0f0 extui a13, a15, 0, 2 +4022ba2c: 3482f6 bgeui a2, 8, 4022ba64 +4022ba2f: 230c movi.n a3, 2 +4022ba31: 103f30 and a3, a15, a3 +4022ba34: 120c movi.n a2, 1 +4022ba36: 0e0c movi.n a14, 0 +4022ba38: 391c42 l16ui a4, a12, 114 +4022ba3b: 93e230 movnez a14, a2, a3 +4022ba3e: 420c movi.n a2, 4 +4022ba40: 933230 movnez a3, a2, a3 +4022ba43: 74e0e0 extui a14, a14, 0, 8 +4022ba46: f27c movi.n a2, -1 +4022ba48: 078416 beqz a4, 4022bac4 +4022ba4b: 040c movi.n a4, 0 +4022ba4d: 042d mov.n a2, a4 +4022ba4f: fd3c45 call0 40228e14 +4022ba52: e28c beqz.n a2, 4022ba64 +4022ba54: 1b2c52 l32i a5, a12, 108 +4022ba57: 023d mov.n a3, a2 +4022ba59: 0e6d mov.n a6, a14 +4022ba5b: 0f4d mov.n a4, a15 +4022ba5d: 0c2d mov.n a2, a12 +4022ba5f: ff9e85 call0 4022b448 +4022ba62: f2cc bnez.n a2, 4022ba75 +4022ba64: 240c32 l8ui a3, a12, 36 +4022ba67: 80af22 movi a2, -128 +4022ba6a: 202320 or a2, a3, a2 +4022ba6d: 244c22 s8i a2, a12, 36 +4022ba70: f27c movi.n a2, -1 +4022ba72: 001386 j 4022bac4 +4022ba75: 1e2c32 l32i a3, a12, 120 +4022ba78: 43cc bnez.n a3, 4022ba80 +4022ba7a: 1e6c22 s32i a2, a12, 120 +4022ba7d: 000286 j 4022ba8b +4022ba80: 0348 l32i.n a4, a3, 0 +4022ba82: 348c beqz.n a4, 4022ba89 +4022ba84: 043d mov.n a3, a4 +4022ba86: fffd86 j 4022ba80 +4022ba89: 0329 s32i.n a2, a3, 0 +4022ba8b: 030c movi.n a3, 0 +4022ba8d: 3b5c32 s16i a3, a12, 118 +4022ba90: 0d9c beqz.n a13, 4022baa4 +4022ba92: 1b2c32 l32i a3, a12, 108 +4022ba95: 01c332 addi a3, a3, 1 +4022ba98: 1b6c32 s32i a3, a12, 108 +4022ba9b: 391c32 l16ui a3, a12, 114 +4022ba9e: ffc332 addi a3, a3, -1 +4022baa1: 395c32 s16i a3, a12, 114 +4022baa4: 0a6f07 bbci a15, 0, 4022bab2 +4022baa7: 240c42 l8ui a4, a12, 36 +4022baaa: 032c movi.n a3, 32 +4022baac: 203430 or a3, a4, a3 +4022baaf: 244c32 s8i a3, a12, 36 +4022bab2: 012222 l32i a2, a2, 4 +4022bab5: fd5345 call0 40228fec +4022bab8: 3a1c32 l16ui a3, a12, 116 +4022babb: 802230 add a2, a2, a3 +4022babe: 3a5c22 s16i a2, a12, 116 +4022bac1: 00a022 movi a2, 0 +4022bac4: 7108 l32i.n a0, a1, 28 +4022bac6: 61c8 l32i.n a12, a1, 24 +4022bac8: 51d8 l32i.n a13, a1, 20 +4022baca: 41e8 l32i.n a14, a1, 16 +4022bacc: 31f8 l32i.n a15, a1, 12 +4022bace: 20c112 addi a1, a1, 32 +4022bad1: f00d ret.n + ... + +4022bad4 : +4022bad4: f0c112 addi a1, a1, -16 +4022bad7: 1e2232 l32i a3, a2, 120 +4022bada: 3109 s32i.n a0, a1, 12 +4022badc: 03bc beqz.n a3, 4022bb10 +4022bade: 0348 l32i.n a4, a3, 0 +4022bae0: 448c beqz.n a4, 4022bae8 +4022bae2: 043d mov.n a3, a4 +4022bae4: fffd86 j 4022bade +4022bae7: 433800 excw +4022baea: 0d0342 l8ui a4, a3, 13 +4022baed: 0c0352 l8ui a5, a3, 12 +4022baf0: 114480 slli a4, a4, 8 +4022baf3: 204450 or a4, a4, a5 +4022baf6: 245840 extui a5, a4, 8, 3 +4022baf9: 35dc bnez.n a5, 4022bb10 +4022bafb: 00a122 movi a2, 0x100 +4022bafe: 202420 or a2, a4, a2 +4022bb01: 0c4322 s8i a2, a3, 12 +4022bb04: 412820 srli a2, a2, 8 +4022bb07: 0d4322 s8i a2, a3, 13 +4022bb0a: 020c movi.n a2, 0 +4022bb0c: 000146 j 4022bb15 +4022bb0f: 130c00 excw +4022bb12: fff005 call0 4022ba14 +4022bb15: 3108 l32i.n a0, a1, 12 +4022bb17: 10c112 addi a1, a1, 16 +4022bb1a: f00d ret.n + +4022bb1c : +4022bb1c: d0c112 addi a1, a1, -48 +4022bb1f: 039d mov.n a9, a3 +4022bb21: f46060 extui a6, a6, 0, 16 +4022bb24: f47070 extui a7, a7, 0, 16 +4022bb27: 91d9 s32i.n a13, a1, 36 +4022bb29: 0149 s32i.n a4, a1, 0 +4022bb2b: 02dd mov.n a13, a2 +4022bb2d: 040c movi.n a4, 0 +4022bb2f: 431c movi.n a3, 20 +4022bb31: 120c movi.n a2, 1 +4022bb33: 81e9 s32i.n a14, a1, 32 +4022bb35: 71f9 s32i.n a15, a1, 28 +4022bb37: 2169 s32i.n a6, a1, 8 +4022bb39: 3179 s32i.n a7, a1, 12 +4022bb3b: 1199 s32i.n a9, a1, 4 +4022bb3d: b109 s32i.n a0, a1, 44 +4022bb3f: a1c9 s32i.n a12, a1, 40 +4022bb41: 05fd mov.n a15, a5 +4022bb43: fd2d05 call0 40228e14 +4022bb46: 02ed mov.n a14, a2 +4022bb48: 2168 l32i.n a6, a1, 8 +4022bb4a: 3178 l32i.n a7, a1, 12 +4022bb4c: 1198 l32i.n a9, a1, 4 +4022bb4e: 0f6216 beqz a2, 4022bc48 +4022bb51: 12c8 l32i.n a12, a2, 4 +4022bb53: 112680 slli a2, a6, 8 +4022bb56: 416860 srli a6, a6, 8 +4022bb59: 206260 or a6, a2, a6 +4022bb5c: 112780 slli a2, a7, 8 +4022bb5f: 417870 srli a7, a7, 8 +4022bb62: 013d80 slli a3, a13, 24 +4022bb65: 207270 or a7, a2, a7 +4022bb68: 7528d0 extui a2, a13, 24, 8 +4022bb6b: 204320 or a4, a3, a2 +4022bb6e: 556021 l32r a2, 402010f0 +4022bb71: f46060 extui a6, a6, 0, 16 +4022bb74: 103d20 and a3, a13, a2 +4022bb77: 113380 slli a3, a3, 8 +4022bb7a: 41d8d0 srli a13, a13, 8 +4022bb7d: 203430 or a3, a4, a3 +4022bb80: 10dd20 and a13, a13, a2 +4022bb83: 20d3d0 or a13, a3, a13 +4022bb86: 7438d0 extui a3, a13, 8, 8 +4022bb89: 054c32 s8i a3, a12, 5 +4022bb8c: 7530d0 extui a3, a13, 16, 8 +4022bb8f: 064c32 s8i a3, a12, 6 +4022bb92: 014980 slli a4, a9, 24 +4022bb95: 753890 extui a3, a9, 24, 8 +4022bb98: 204430 or a4, a4, a3 +4022bb9b: 103920 and a3, a9, a2 +4022bb9e: 113380 slli a3, a3, 8 +4022bba1: 419890 srli a9, a9, 8 +4022bba4: 203430 or a3, a4, a3 +4022bba7: 102920 and a2, a9, a2 +4022bbaa: 209320 or a9, a3, a2 +4022bbad: 742890 extui a2, a9, 8, 8 +4022bbb0: 094c22 s8i a2, a12, 9 +4022bbb3: 752090 extui a2, a9, 16, 8 +4022bbb6: 0a4c22 s8i a2, a12, 10 +4022bbb9: 025c movi.n a2, 80 +4022bbbb: 0c4c22 s8i a2, a12, 12 +4022bbbe: 421c movi.n a2, 20 +4022bbc0: 0d4c22 s8i a2, a12, 13 +4022bbc3: 575f21 l32r a2, 40201940 +4022bbc6: 004c62 s8i a6, a12, 0 +4022bbc9: 0020c0 memw +4022bbcc: 0238 l32i.n a3, a2, 0 +4022bbce: 0020c0 memw +4022bbd1: 0228 l32i.n a2, a2, 0 +4022bbd3: 416860 srli a6, a6, 8 +4022bbd6: 744820 extui a4, a2, 8, 8 +4022bbd9: 112380 slli a2, a3, 8 +4022bbdc: 202420 or a2, a4, a2 +4022bbdf: f47070 extui a7, a7, 0, 16 +4022bbe2: 044cd2 s8i a13, a12, 4 +4022bbe5: f42020 extui a2, a2, 0, 16 +4022bbe8: 75d8d0 extui a13, a13, 24, 8 +4022bbeb: 014c62 s8i a6, a12, 1 +4022bbee: 024c72 s8i a7, a12, 2 +4022bbf1: 074cd2 s8i a13, a12, 7 +4022bbf4: 417870 srli a7, a7, 8 +4022bbf7: 0d0c movi.n a13, 0 +4022bbf9: 084c92 s8i a9, a12, 8 +4022bbfc: 0e4c22 s8i a2, a12, 14 +4022bbff: 759890 extui a9, a9, 24, 8 +4022bc02: 412820 srli a2, a2, 8 +4022bc05: 041e62 l16ui a6, a14, 8 +4022bc08: 0138 l32i.n a3, a1, 0 +4022bc0a: 034c72 s8i a7, a12, 3 +4022bc0d: 0b4c92 s8i a9, a12, 11 +4022bc10: 0f4c22 s8i a2, a12, 15 +4022bc13: 650c movi.n a5, 6 +4022bc15: 204ff0 or a4, a15, a15 +4022bc18: 104cd2 s8i a13, a12, 16 +4022bc1b: 114cd2 s8i a13, a12, 17 +4022bc1e: 124cd2 s8i a13, a12, 18 +4022bc21: 134cd2 s8i a13, a12, 19 +4022bc24: 202ee0 or a2, a14, a14 +4022bc27: 04ad05 call0 402306f8 +4022bc2a: 104c22 s8i a2, a12, 16 +4022bc2d: 0138 l32i.n a3, a1, 0 +4022bc2f: f42820 extui a2, a2, 8, 16 +4022bc32: 114c22 s8i a2, a12, 17 +4022bc35: 670c movi.n a7, 6 +4022bc37: 0d6d mov.n a6, a13 +4022bc39: 80a052 movi a5, 128 +4022bc3c: 0f4d mov.n a4, a15 +4022bc3e: 0e2d mov.n a2, a14 +4022bc40: fca445 call0 40228688 +4022bc43: 0e2d mov.n a2, a14 +4022bc45: fd1585 call0 40228da0 +4022bc48: b108 l32i.n a0, a1, 44 +4022bc4a: a1c8 l32i.n a12, a1, 40 +4022bc4c: 91d8 l32i.n a13, a1, 36 +4022bc4e: 81e8 l32i.n a14, a1, 32 +4022bc50: 71f8 l32i.n a15, a1, 28 +4022bc52: 30c112 addi a1, a1, 48 +4022bc55: f00d ret.n + ... + +4022bc58 : +4022bc58: e0c112 addi a1, a1, -32 +4022bc5b: 0561d2 s32i a13, a1, 20 +4022bc5e: 02dd mov.n a13, a2 +4022bc60: 172222 l32i a2, a2, 92 +4022bc63: 552341 l32r a4, 402010f0 +4022bc66: 220b addi.n a2, a2, -1 +4022bc68: 753820 extui a3, a2, 24, 8 +4022bc6b: 015280 slli a5, a2, 24 +4022bc6e: 205530 or a5, a5, a3 +4022bc71: 103240 and a3, a2, a4 +4022bc74: 113380 slli a3, a3, 8 +4022bc77: 412820 srli a2, a2, 8 +4022bc7a: 203530 or a3, a5, a3 +4022bc7d: 104240 and a4, a2, a4 +4022bc80: 204340 or a4, a3, a4 +4022bc83: 0d2d mov.n a2, a13 +4022bc85: 030c movi.n a3, 0 +4022bc87: 61c9 s32i.n a12, a1, 24 +4022bc89: 7109 s32i.n a0, a1, 28 +4022bc8b: 41e9 s32i.n a14, a1, 16 +4022bc8d: 31f9 s32i.n a15, a1, 12 +4022bc8f: ff8d45 call0 4022b564 +4022bc92: 02cd mov.n a12, a2 +4022bc94: c2ac beqz.n a2, 4022bcc4 +4022bc96: ed4b addi.n a14, a13, 4 +4022bc98: 041262 l16ui a6, a2, 8 +4022bc9b: 12f8 l32i.n a15, a2, 4 +4022bc9d: 650c movi.n a5, 6 +4022bc9f: 0e4d mov.n a4, a14 +4022bca1: 0d3d mov.n a3, a13 +4022bca3: 04a545 call0 402306f8 +4022bca6: 104f22 s8i a2, a15, 16 +4022bca9: f42820 extui a2, a2, 8, 16 +4022bcac: 114f22 s8i a2, a15, 17 +4022bcaf: 0a0d52 l8ui a5, a13, 10 +4022bcb2: 670c movi.n a7, 6 +4022bcb4: 060c movi.n a6, 0 +4022bcb6: 0e4d mov.n a4, a14 +4022bcb8: 0d3d mov.n a3, a13 +4022bcba: 0c2d mov.n a2, a12 +4022bcbc: fc9c85 call0 40228688 +4022bcbf: 0c2d mov.n a2, a12 +4022bcc1: fd0dc5 call0 40228da0 +4022bcc4: 7108 l32i.n a0, a1, 28 +4022bcc6: 61c8 l32i.n a12, a1, 24 +4022bcc8: 51d8 l32i.n a13, a1, 20 +4022bcca: 41e8 l32i.n a14, a1, 16 +4022bccc: 31f8 l32i.n a15, a1, 12 +4022bcce: 20c112 addi a1, a1, 32 +4022bcd1: f00d ret.n +4022bcd3: 110000 slli a0, a0, 16 + ... + +4022bcd8 : +4022bcd8: d0c112 addi a1, a1, -48 +4022bcdb: 1f2262 l32i a6, a2, 124 +4022bcde: 91d9 s32i.n a13, a1, 36 +4022bce0: b109 s32i.n a0, a1, 44 +4022bce2: a1c9 s32i.n a12, a1, 40 +4022bce4: 81e9 s32i.n a14, a1, 32 +4022bce6: 71f9 s32i.n a15, a1, 28 +4022bce8: 02dd mov.n a13, a2 +4022bcea: a6cc bnez.n a6, 4022bcf8 +4022bcec: 1e2262 l32i a6, a2, 120 +4022bcef: 0e5616 beqz a6, 4022bdd8 +4022bcf2: 0c0c movi.n a12, 0 +4022bcf4: 0003c6 j 4022bd07 +4022bcf7: 162800 excw +4022bcfa: 1228 l32i.n a2, a2, 4 +4022bcfc: 0e02c2 l8ui a12, a2, 14 +4022bcff: 34c0c0 extui a12, a12, 0, 4 +4022bd02: 11cce0 slli a12, a12, 2 +4022bd05: cceb addi.n a12, a12, 14 +4022bd07: 4688 l32i.n a8, a6, 16 +4022bd09: 020c movi.n a2, 0 +4022bd0b: 0d0832 l8ui a3, a8, 13 +4022bd0e: 025d mov.n a5, a2 +4022bd10: 095327 bbc a3, a2, 4022bd1d +4022bd13: 061652 l16ui a5, a6, 12 +4022bd16: 130c movi.n a3, 1 +4022bd18: 832350 moveqz a2, a3, a5 +4022bd1b: 025d mov.n a5, a2 +4022bd1d: 050822 l8ui a2, a8, 5 +4022bd20: 040872 l8ui a7, a8, 4 +4022bd23: 112280 slli a2, a2, 8 +4022bd26: 203270 or a3, a2, a7 +4022bd29: 060822 l8ui a2, a8, 6 +4022bd2c: 070842 l8ui a4, a8, 7 +4022bd2f: 112200 slli a2, a2, 16 +4022bd32: 202230 or a2, a2, a3 +4022bd35: 014480 slli a4, a4, 24 +4022bd38: 130c movi.n a3, 1 +4022bd3a: 204420 or a4, a4, a2 +4022bd3d: 303530 xor a3, a5, a3 +4022bd40: 0d2d mov.n a2, a13 +4022bd42: 0159 s32i.n a5, a1, 0 +4022bd44: 1169 s32i.n a6, a1, 4 +4022bd46: ff81c5 call0 4022b564 +4022bd49: 02ed mov.n a14, a2 +4022bd4b: 0158 l32i.n a5, a1, 0 +4022bd4d: 1168 l32i.n a6, a1, 4 +4022bd4f: 085216 beqz a2, 4022bdd8 +4022bd52: 12f8 l32i.n a15, a2, 4 +4022bd54: 55ac beqz.n a5, 4022bd7d +4022bd56: 0d0f22 l8ui a2, a15, 13 +4022bd59: 0c0f32 l8ui a3, a15, 12 +4022bd5c: 112280 slli a2, a2, 8 +4022bd5f: 202230 or a2, a2, a3 +4022bd62: f91831 l32r a3, 4022a1c4 +4022bd65: 102230 and a2, a2, a3 +4022bd68: ffdb31 l32r a3, 4022bcd4 +4022bd6b: 202230 or a2, a2, a3 +4022bd6e: f42020 extui a2, a2, 0, 16 +4022bd71: 0c4f22 s8i a2, a15, 12 +4022bd74: 412820 srli a2, a2, 8 +4022bd77: 0d4f22 s8i a2, a15, 13 +4022bd7a: 000b06 j 4022bdaa +4022bd7d: 1628 l32i.n a2, a6, 4 +4022bd7f: 1f2d52 l32i a5, a13, 124 +4022bd82: 1248 l32i.n a4, a2, 4 +4022bd84: 14cf32 addi a3, a15, 20 +4022bd87: b5cc bnez.n a5, 4022bd96 +4022bd89: 0c0452 l8ui a5, a4, 12 +4022bd8c: 415450 srli a5, a5, 4 +4022bd8f: 1155e0 slli a5, a5, 2 +4022bd92: 000386 j 4022bda4 +4022bd95: 44ca00 extui a12, a0, 10, 5 +4022bd98: 0c0452 l8ui a5, a4, 12 +4022bd9b: 415450 srli a5, a5, 4 +4022bd9e: a055c0 addx4 a5, a5, a12 +4022bda1: f45050 extui a5, a5, 0, 16 +4022bda4: 01a042 movi a4, 1 +4022bda7: fd3845 call0 4022912c +4022bdaa: cd4b addi.n a12, a13, 4 +4022bdac: 041e62 l16ui a6, a14, 8 +4022bdaf: 650c movi.n a5, 6 +4022bdb1: 0c4d mov.n a4, a12 +4022bdb3: 0d3d mov.n a3, a13 +4022bdb5: 0e2d mov.n a2, a14 +4022bdb7: 049405 call0 402306f8 +4022bdba: 104f22 s8i a2, a15, 16 +4022bdbd: f42820 extui a2, a2, 8, 16 +4022bdc0: 114f22 s8i a2, a15, 17 +4022bdc3: 0a0d52 l8ui a5, a13, 10 +4022bdc6: 670c movi.n a7, 6 +4022bdc8: 060c movi.n a6, 0 +4022bdca: 0c4d mov.n a4, a12 +4022bdcc: 0d3d mov.n a3, a13 +4022bdce: 0e2d mov.n a2, a14 +4022bdd0: fc8b45 call0 40228688 +4022bdd3: 0e2d mov.n a2, a14 +4022bdd5: fcfc85 call0 40228da0 +4022bdd8: b108 l32i.n a0, a1, 44 +4022bdda: a1c8 l32i.n a12, a1, 40 +4022bddc: 91d8 l32i.n a13, a1, 36 +4022bdde: 81e8 l32i.n a14, a1, 32 +4022bde0: 71f8 l32i.n a15, a1, 28 +4022bde2: 30c112 addi a1, a1, 48 +4022bde5: f00d ret.n +4022bde7: 040200 extui a0, a0, 2, 1 +4022bdea: 05 .byte 0x5 +4022bdeb: b4 .byte 0xb4 + +4022bdec : +4022bdec: d0c112 addi a1, a1, -48 +4022bdef: a1c9 s32i.n a12, a1, 40 +4022bdf1: 02cd mov.n a12, a2 +4022bdf3: fb3921 l32r a2, 4022aad8 +4022bdf6: b109 s32i.n a0, a1, 44 +4022bdf8: 0238 l32i.n a3, a2, 0 +4022bdfa: 91d9 s32i.n a13, a1, 36 +4022bdfc: 81e9 s32i.n a14, a1, 32 +4022bdfe: 71f9 s32i.n a15, a1, 28 +4022be00: 020c movi.n a2, 0 +4022be02: 0293c7 bne a3, a12, 4022be08 +4022be05: 0102c6 j 4022c214 +4022be08: 301c22 l16ui a2, a12, 96 +4022be0b: 2b1cd2 l16ui a13, a12, 86 +4022be0e: f44020 extui a4, a2, 0, 16 +4022be11: f430d0 extui a3, a13, 0, 16 +4022be14: 01b437 bgeu a4, a3, 4022be19 +4022be17: 02dd mov.n a13, a2 +4022be19: f4d0d0 extui a13, a13, 0, 16 +4022be1c: 240c22 l8ui a2, a12, 36 +4022be1f: 01d9 s32i.n a13, a1, 0 +4022be21: 1e2ce2 l32i a14, a12, 120 +4022be24: 586217 bbci a2, 1, 4022be80 +4022be27: 04be16 beqz a14, 4022be76 +4022be2a: 4e68 l32i.n a6, a14, 16 +4022be2c: 050632 l8ui a3, a6, 5 +4022be2f: 040652 l8ui a5, a6, 4 +4022be32: 060622 l8ui a2, a6, 6 +4022be35: 113380 slli a3, a3, 8 +4022be38: 204350 or a4, a3, a5 +4022be3b: 112200 slli a2, a2, 16 +4022be3e: 203240 or a3, a2, a4 +4022be41: 070622 l8ui a2, a6, 7 +4022be44: 012280 slli a2, a2, 24 +4022be47: 202230 or a2, a2, a3 +4022be4a: 014280 slli a4, a2, 24 +4022be4d: 753820 extui a3, a2, 24, 8 +4022be50: 205430 or a5, a4, a3 +4022be53: 54a731 l32r a3, 402010f0 +4022be56: 104230 and a4, a2, a3 +4022be59: 114480 slli a4, a4, 8 +4022be5c: 412820 srli a2, a2, 8 +4022be5f: 204540 or a4, a5, a4 +4022be62: 102230 and a2, a2, a3 +4022be65: 202420 or a2, a4, a2 +4022be68: 061e32 l16ui a3, a14, 12 +4022be6b: 142c42 l32i a4, a12, 80 +4022be6e: c03340 sub a3, a3, a4 +4022be71: 223a add.n a2, a2, a3 +4022be73: 09bd27 bgeu a13, a2, 4022be80 +4022be76: 0c2d mov.n a2, a12 +4022be78: ff9e85 call0 4022b864 +4022be7b: 00e546 j 4022c214 +4022be7e: f20000 excw +4022be81: 1f2c movi.n a15, 33 +4022be83: 225f16 beqz a15, 4022c0ac +4022be86: 0f28 l32i.n a2, a15, 0 +4022be88: 220216 beqz a2, 4022c0ac +4022be8b: 02fd mov.n a15, a2 +4022be8d: fffd46 j 4022be86 +4022be90: 4e68 l32i.n a6, a14, 16 +4022be92: 050632 l8ui a3, a6, 5 +4022be95: 040652 l8ui a5, a6, 4 +4022be98: 060622 l8ui a2, a6, 6 +4022be9b: 113380 slli a3, a3, 8 +4022be9e: 204350 or a4, a3, a5 +4022bea1: 112200 slli a2, a2, 16 +4022bea4: 203240 or a3, a2, a4 +4022bea7: 070622 l8ui a2, a6, 7 +4022beaa: 549151 l32r a5, 402010f0 +4022bead: 012280 slli a2, a2, 24 +4022beb0: 202230 or a2, a2, a3 +4022beb3: 753820 extui a3, a2, 24, 8 +4022beb6: 014280 slli a4, a2, 24 +4022beb9: 204430 or a4, a4, a3 +4022bebc: 103250 and a3, a2, a5 +4022bebf: 113380 slli a3, a3, 8 +4022bec2: 412820 srli a2, a2, 8 +4022bec5: 203430 or a3, a4, a3 +4022bec8: 102250 and a2, a2, a5 +4022becb: 202320 or a2, a3, a2 +4022bece: 142c42 l32i a4, a12, 80 +4022bed1: 061e32 l16ui a3, a14, 12 +4022bed4: c03340 sub a3, a3, a4 +4022bed7: 223a add.n a2, a2, a3 +4022bed9: 0138 l32i.n a3, a1, 0 +4022bedb: 02b327 bgeu a3, a2, 4022bee1 +4022bede: 00aec6 j 4022c19d +4022bee1: 1e28 l32i.n a2, a14, 4 +4022bee3: 071222 l16ui a2, a2, 14 +4022bee6: 0222b6 bltui a2, 2, 4022beec +4022bee9: 00ac06 j 4022c19d +4022beec: 0d0622 l8ui a2, a6, 13 +4022beef: 0c0632 l8ui a3, a6, 12 +4022bef2: 112280 slli a2, a2, 8 +4022bef5: 202230 or a2, a2, a3 +4022bef8: 1f2c32 l32i a3, a12, 124 +4022befb: 1b5356 bnez a3, 4022c0b4 +4022befe: 0e38 l32i.n a3, a14, 0 +4022bf00: 1e6c32 s32i a3, a12, 120 +4022bf03: 4c38 l32i.n a3, a12, 16 +4022bf05: 1d2326 beqi a3, 2, 4022bf26 +4022bf08: 602631 l32r a3, 40203fa0 +4022bf0b: 202230 or a2, a2, a3 +4022bf0e: f42020 extui a2, a2, 0, 16 +4022bf11: 0c4622 s8i a2, a6, 12 +4022bf14: 412820 srli a2, a2, 8 +4022bf17: 0d4622 s8i a2, a6, 13 +4022bf1a: 240c32 l8ui a3, a12, 36 +4022bf1d: fcaf22 movi a2, -4 +4022bf20: 102320 and a2, a3, a2 +4022bf23: 244c22 s8i a2, a12, 36 +4022bf26: ac58 l32i.n a5, a12, 40 +4022bf28: 547231 l32r a3, 402010f0 +4022bf2b: 016580 slli a6, a5, 24 +4022bf2e: 752850 extui a2, a5, 24, 8 +4022bf31: 202620 or a2, a6, a2 +4022bf34: 106530 and a6, a5, a3 +4022bf37: 116680 slli a6, a6, 8 +4022bf3a: 206260 or a6, a2, a6 +4022bf3d: 412850 srli a2, a5, 8 +4022bf40: 103230 and a3, a2, a3 +4022bf43: 4e48 l32i.n a4, a14, 16 +4022bf45: 202630 or a2, a6, a3 +4022bf48: 743820 extui a3, a2, 8, 8 +4022bf4b: 094432 s8i a3, a4, 9 +4022bf4e: 753020 extui a3, a2, 16, 8 +4022bf51: 0a4432 s8i a3, a4, 10 +4022bf54: 171c32 l16ui a3, a12, 46 +4022bf57: 084422 s8i a2, a4, 8 +4022bf5a: 752820 extui a2, a2, 24, 8 +4022bf5d: 0b4422 s8i a2, a4, 11 +4022bf60: 116380 slli a6, a3, 8 +4022bf63: 412830 srli a2, a3, 8 +4022bf66: 202620 or a2, a6, a2 +4022bf69: f42020 extui a2, a2, 0, 16 +4022bf6c: 0e4422 s8i a2, a4, 14 +4022bf6f: 412820 srli a2, a2, 8 +4022bf72: 0f4422 s8i a2, a4, 15 +4022bf75: 535a add.n a5, a3, a5 +4022bf77: cc59 s32i.n a5, a12, 48 +4022bf79: 0e0e22 l8ui a2, a14, 14 +4022bf7c: 056207 bbci a2, 0, 4022bf85 +4022bf7f: ff9a21 l32r a2, 4022bde8 +4022bf82: 056422 s32i a2, a4, 20 +4022bf85: 1d9c22 l16si a2, a12, 58 +4022bf88: 040266 bnei a2, -1, 4022bf90 +4022bf8b: 020c movi.n a2, 0 +4022bf8d: 1d5c22 s16i a2, a12, 58 +4022bf90: 0c28 l32i.n a2, a12, 0 +4022bf92: dc4b addi.n a13, a12, 4 +4022bf94: 141216 beqz a2, 4022c0d9 +4022bf97: 102c22 l32i a2, a12, 64 +4022bf9a: 4e78 l32i.n a7, a14, 16 +4022bf9c: 046256 bnez a2, 4022bfe6 +4022bf9f: eb7c21 l32r a2, 40226d90 +4022bfa2: 0228 l32i.n a2, a2, 0 +4022bfa4: 106c22 s32i a2, a12, 64 +4022bfa7: 050742 l8ui a4, a7, 5 +4022bfaa: 040722 l8ui a2, a7, 4 +4022bfad: 060732 l8ui a3, a7, 6 +4022bfb0: 114480 slli a4, a4, 8 +4022bfb3: 205420 or a5, a4, a2 +4022bfb6: 113300 slli a3, a3, 16 +4022bfb9: 204350 or a4, a3, a5 +4022bfbc: 070732 l8ui a3, a7, 7 +4022bfbf: 013380 slli a3, a3, 24 +4022bfc2: 203340 or a3, a3, a4 +4022bfc5: 014380 slli a4, a3, 24 +4022bfc8: 752830 extui a2, a3, 24, 8 +4022bfcb: 205420 or a5, a4, a2 +4022bfce: 544821 l32r a2, 402010f0 +4022bfd1: 104320 and a4, a3, a2 +4022bfd4: 114480 slli a4, a4, 8 +4022bfd7: 413830 srli a3, a3, 8 +4022bfda: 204540 or a4, a5, a4 +4022bfdd: 102320 and a2, a3, a2 +4022bfe0: 202420 or a2, a4, a2 +4022bfe3: 116c22 s32i a2, a12, 68 +4022bfe6: 012e22 l32i a2, a14, 4 +4022bfe9: 06a052 movi a5, 6 +4022bfec: 1268 l32i.n a6, a2, 4 +4022bfee: 051232 l16ui a3, a2, 10 +4022bff1: c06760 sub a6, a7, a6 +4022bff4: f46060 extui a6, a6, 0, 16 +4022bff7: c03360 sub a3, a3, a6 +4022bffa: 055232 s16i a3, a2, 10 +4022bffd: 041232 l16ui a3, a2, 8 +4022c000: 1279 s32i.n a7, a2, 4 +4022c002: c06360 sub a6, a3, a6 +4022c005: f46060 extui a6, a6, 0, 16 +4022c008: 045262 s16i a6, a2, 8 +4022c00b: 030c movi.n a3, 0 +4022c00d: 104732 s8i a3, a7, 16 +4022c010: 114732 s8i a3, a7, 17 +4022c013: 0d4d mov.n a4, a13 +4022c015: 0c3d mov.n a3, a12 +4022c017: 016172 s32i a7, a1, 4 +4022c01a: 046dc5 call0 402306f8 +4022c01d: 1178 l32i.n a7, a1, 4 +4022c01f: 0d4d mov.n a4, a13 +4022c021: 104722 s8i a2, a7, 16 +4022c024: f42820 extui a2, a2, 8, 16 +4022c027: 114722 s8i a2, a7, 17 +4022c02a: 090c62 l8ui a6, a12, 9 +4022c02d: 0a0c52 l8ui a5, a12, 10 +4022c030: 1e28 l32i.n a2, a14, 4 +4022c032: 670c movi.n a7, 6 +4022c034: 0c3d mov.n a3, a12 +4022c036: fc6505 call0 40228688 +4022c039: 4e58 l32i.n a5, a14, 16 +4022c03b: 050542 l8ui a4, a5, 5 +4022c03e: 040562 l8ui a6, a5, 4 +4022c041: 060522 l8ui a2, a5, 6 +4022c044: 114480 slli a4, a4, 8 +4022c047: 203460 or a3, a4, a6 +4022c04a: 112200 slli a2, a2, 16 +4022c04d: 204230 or a4, a2, a3 +4022c050: 070522 l8ui a2, a5, 7 +4022c053: 542761 l32r a6, 402010f0 +4022c056: 012280 slli a2, a2, 24 +4022c059: 202240 or a2, a2, a4 +4022c05c: 014280 slli a4, a2, 24 +4022c05f: 753820 extui a3, a2, 24, 8 +4022c062: 203430 or a3, a4, a3 +4022c065: 104260 and a4, a2, a6 +4022c068: 114480 slli a4, a4, 8 +4022c06b: 412820 srli a2, a2, 8 +4022c06e: 102260 and a2, a2, a6 +4022c071: 204340 or a4, a3, a4 +4022c074: 203420 or a3, a4, a2 +4022c077: 0d0522 l8ui a2, a5, 13 +4022c07a: 040c movi.n a4, 0 +4022c07c: 142020 extui a2, a2, 0, 2 +4022c07f: 150c movi.n a5, 1 +4022c081: 835420 moveqz a5, a4, a2 +4022c084: 052d mov.n a2, a5 +4022c086: 061e52 l16ui a5, a14, 12 +4022c089: 225a add.n a2, a2, a5 +4022c08b: 172c52 l32i a5, a12, 92 +4022c08e: 623a add.n a6, a2, a3 +4022c090: c05560 sub a5, a5, a6 +4022c093: 02a547 bge a5, a4, 4022c099 +4022c096: 176c62 s32i a6, a12, 92 +4022c099: 0ec216 beqz a2, 4022c189 +4022c09c: 0e49 s32i.n a4, a14, 0 +4022c09e: 1f2c42 l32i a4, a12, 124 +4022c0a1: 047456 bnez a4, 4022c0ec +4022c0a4: 1f6ce2 s32i a14, a12, 124 +4022c0a7: 0efd mov.n a15, a14 +4022c0a9: 1e2ce2 l32i a14, a12, 120 +4022c0ac: 0ede16 beqz a14, 4022c19d +4022c0af: ff7746 j 4022be90 +4022c0b2: 420000 excw +4022c0b5: 240c movi.n a4, 2 +4022c0b7: 434c movi.n a3, 68 +4022c0b9: 020437 bnone a4, a3, 4022c0bf +4022c0bc: ff8f86 j 4022befe +4022c0bf: 1e2c32 l32i a3, a12, 120 +4022c0c2: 0ce316 beqz a3, 4022c194 +4022c0c5: 0358 l32i.n a5, a3, 0 +4022c0c7: e33556 bnez a5, 4022befe +4022c0ca: 061352 l16ui a5, a3, 12 +4022c0cd: 1e1c32 l16ui a3, a12, 60 +4022c0d0: 02b537 bgeu a5, a3, 4022c0d6 +4022c0d3: 002f46 j 4022c194 +4022c0d6: ff8906 j 4022befe +4022c0d9: 202dd0 or a2, a13, a13 +4022c0dc: fc09c5 call0 4022817c +4022c0df: f56216 beqz a2, 4022c039 +4022c0e2: 012222 l32i a2, a2, 4 +4022c0e5: 006c22 s32i a2, a12, 0 +4022c0e8: ffaac6 j 4022bf97 +4022c0eb: 4fa800 excw +4022c0ee: 050a52 l8ui a5, a10, 5 +4022c0f1: 040a72 l8ui a7, a10, 4 +4022c0f4: 060a22 l8ui a2, a10, 6 +4022c0f7: 115580 slli a5, a5, 8 +4022c0fa: 206570 or a6, a5, a7 +4022c0fd: 112200 slli a2, a2, 16 +4022c100: 205260 or a5, a2, a6 +4022c103: 070a22 l8ui a2, a10, 7 +4022c106: 53fa71 l32r a7, 402010f0 +4022c109: 012280 slli a2, a2, 24 +4022c10c: 202250 or a2, a2, a5 +4022c10f: 755820 extui a5, a2, 24, 8 +4022c112: 016280 slli a6, a2, 24 +4022c115: 206650 or a6, a6, a5 +4022c118: 105270 and a5, a2, a7 +4022c11b: 115580 slli a5, a5, 8 +4022c11e: 206650 or a6, a6, a5 +4022c121: 415820 srli a5, a2, 8 +4022c124: 102570 and a2, a5, a7 +4022c127: 202620 or a2, a6, a2 +4022c12a: c02320 sub a2, a3, a2 +4022c12d: 7ccc52 addi a5, a12, 124 +4022c130: 076d mov.n a6, a7 +4022c132: 04e2d6 bgez a2, 4022c184 +4022c135: 4428 l32i.n a2, a4, 16 +4022c137: 050272 l8ui a7, a2, 5 +4022c13a: 0402b2 l8ui a11, a2, 4 +4022c13d: 117780 slli a7, a7, 8 +4022c140: 20a7b0 or a10, a7, a11 +4022c143: 060272 l8ui a7, a2, 6 +4022c146: 070222 l8ui a2, a2, 7 +4022c149: 117700 slli a7, a7, 16 +4022c14c: 2077a0 or a7, a7, a10 +4022c14f: 012280 slli a2, a2, 24 +4022c152: 202270 or a2, a2, a7 +4022c155: 757820 extui a7, a2, 24, 8 +4022c158: 01a280 slli a10, a2, 24 +4022c15b: 20aa70 or a10, a10, a7 +4022c15e: 107260 and a7, a2, a6 +4022c161: 117780 slli a7, a7, 8 +4022c164: 412820 srli a2, a2, 8 +4022c167: 207a70 or a7, a10, a7 +4022c16a: 102260 and a2, a2, a6 +4022c16d: 202720 or a2, a7, a2 +4022c170: c02230 sub a2, a2, a3 +4022c173: 0062d6 bgez a2, 4022c17d +4022c176: 045d mov.n a5, a4 +4022c178: 0448 l32i.n a4, a4, 0 +4022c17a: fb7456 bnez a4, 4022c135 +4022c17d: 0e49 s32i.n a4, a14, 0 +4022c17f: 05e9 s32i.n a14, a5, 0 +4022c181: 000246 j 4022c18e +4022c184: 0fe9 s32i.n a14, a15, 0 +4022c186: ffc746 j 4022c0a7 +4022c189: 0e2d mov.n a2, a14 +4022c18b: fd6a85 call0 40229834 +4022c18e: 0fed mov.n a14, a15 +4022c190: ffc4c6 j 4022c0a7 +4022c193: af3200 excw +4022c196: 0437a0 extui a3, a10, 7, 1 +4022c199: 580602 l8ui a0, a6, 88 +4022c19c: ff .byte 0xff +4022c19d: 1e2c22 l32i a2, a12, 120 +4022c1a0: 12cc bnez.n a2, 4022c1a5 +4022c1a2: 3b5c22 s16i a2, a12, 118 +4022c1a5: 060e16 beqz a14, 4022c209 +4022c1a8: ac0c22 l8ui a2, a12, 172 +4022c1ab: 05a256 bnez a2, 4022c209 +4022c1ae: 4e68 l32i.n a6, a14, 16 +4022c1b0: 050632 l8ui a3, a6, 5 +4022c1b3: 040652 l8ui a5, a6, 4 +4022c1b6: 060622 l8ui a2, a6, 6 +4022c1b9: 113380 slli a3, a3, 8 +4022c1bc: 204350 or a4, a3, a5 +4022c1bf: 112200 slli a2, a2, 16 +4022c1c2: 203240 or a3, a2, a4 +4022c1c5: 070622 l8ui a2, a6, 7 +4022c1c8: 012280 slli a2, a2, 24 +4022c1cb: 202230 or a2, a2, a3 +4022c1ce: 014280 slli a4, a2, 24 +4022c1d1: 753820 extui a3, a2, 24, 8 +4022c1d4: 205430 or a5, a4, a3 +4022c1d7: 53c631 l32r a3, 402010f0 +4022c1da: 104230 and a4, a2, a3 +4022c1dd: 114480 slli a4, a4, 8 +4022c1e0: 412820 srli a2, a2, 8 +4022c1e3: 204540 or a4, a5, a4 +4022c1e6: 102230 and a2, a2, a3 +4022c1e9: 202420 or a2, a4, a2 +4022c1ec: 061e32 l16ui a3, a14, 12 +4022c1ef: 142c42 l32i a4, a12, 80 +4022c1f2: c03340 sub a3, a3, a4 +4022c1f5: 223a add.n a2, a2, a3 +4022c1f7: 301c32 l16ui a3, a12, 96 +4022c1fa: 0bb327 bgeu a3, a2, 4022c209 +4022c1fd: 00a022 movi a2, 0 +4022c200: 2a6c22 s32i a2, a12, 168 +4022c203: 01a022 movi a2, 1 +4022c206: ac4c22 s8i a2, a12, 172 +4022c209: 240c22 l8ui a2, a12, 36 +4022c20c: 642020 extui a2, a2, 0, 7 +4022c20f: 244c22 s8i a2, a12, 36 +4022c212: 020c movi.n a2, 0 +4022c214: b108 l32i.n a0, a1, 44 +4022c216: a1c8 l32i.n a12, a1, 40 +4022c218: 91d8 l32i.n a13, a1, 36 +4022c21a: 81e8 l32i.n a14, a1, 32 +4022c21c: 71f8 l32i.n a15, a1, 28 +4022c21e: 30c112 addi a1, a1, 48 +4022c221: f00d ret.n + ... + +4022c224 : +4022c224: f0c112 addi a1, a1, -16 +4022c227: 1f2232 l32i a3, a2, 124 +4022c22a: 3109 s32i.n a0, a1, 12 +4022c22c: 060316 beqz a3, 4022c290 +4022c22f: 040c movi.n a4, 0 +4022c231: 160c movi.n a6, 1 +4022c233: 068d mov.n a8, a6 +4022c235: 045d mov.n a5, a4 +4022c237: 049d mov.n a9, a4 +4022c239: 047d mov.n a7, a4 +4022c23b: 04ad mov.n a10, a4 +4022c23d: 13b8 l32i.n a11, a3, 4 +4022c23f: 4bb8 l32i.n a11, a11, 16 +4022c241: 4b9c beqz.n a11, 4022c259 +4022c243: 38cc bnez.n a8, 4022c24a +4022c245: 0939 s32i.n a3, a9, 0 +4022c247: 000046 j 4022c24c +4022c24a: 037d mov.n a7, a3 +4022c24c: 0388 l32i.n a8, a3, 0 +4022c24e: 039d mov.n a9, a3 +4022c250: 03a9 s32i.n a10, a3, 0 +4022c252: 083d mov.n a3, a8 +4022c254: 080c movi.n a8, 0 +4022c256: 0004c6 j 4022c26d +4022c259: 46cc bnez.n a6, 4022c261 +4022c25b: 0439 s32i.n a3, a4, 0 +4022c25d: 000086 j 4022c263 +4022c260: 035d00 excw +4022c263: 0368 l32i.n a6, a3, 0 +4022c265: 034d mov.n a4, a3 +4022c267: 03a9 s32i.n a10, a3, 0 +4022c269: 063d mov.n a3, a6 +4022c26b: 060c movi.n a6, 0 +4022c26d: fcc356 bnez a3, 4022c23d +4022c270: 958c beqz.n a5, 4022c27d +4022c272: 748c beqz.n a4, 4022c27d +4022c274: 1e2232 l32i a3, a2, 120 +4022c277: 006432 s32i a3, a4, 0 +4022c27a: 1e6252 s32i a5, a2, 120 +4022c27d: 4e0232 l8ui a3, a2, 78 +4022c280: 1f6272 s32i a7, a2, 124 +4022c283: 331b addi.n a3, a3, 1 +4022c285: 4e4232 s8i a3, a2, 78 +4022c288: 030c movi.n a3, 0 +4022c28a: 106232 s32i a3, a2, 64 +4022c28d: ffb5c5 call0 4022bdec +4022c290: 3108 l32i.n a0, a1, 12 +4022c292: 10c112 addi a1, a1, 16 +4022c295: f00d ret.n +4022c297: 886300 excw +4022c29a: fe .byte 0xfe +4022c29b: 3f .byte 0x3f +4022c29c: d918 l32i.n a1, a9, 52 +4022c29e: fe .byte 0xfe +4022c29f: 3f .byte 0x3f + +4022c2a0 : +4022c2a0: f0c112 addi a1, a1, -16 +4022c2a3: 21c9 s32i.n a12, a1, 8 +4022c2a5: 02cd mov.n a12, a2 +4022c2a7: ee5b21 l32r a2, 40227c14 +4022c2aa: 01e9 s32i.n a14, a1, 0 +4022c2ac: 7228 l32i.n a2, a2, 28 +4022c2ae: 03ed mov.n a14, a3 +4022c2b0: fffa31 l32r a3, 4022c298 +4022c2b3: 11d9 s32i.n a13, a1, 4 +4022c2b5: 050c movi.n a5, 0 +4022c2b7: 04dd mov.n a13, a4 +4022c2b9: 28a142 movi a4, 0x128 +4022c2bc: 3109 s32i.n a0, a1, 12 +4022c2be: 549101 l32r a0, 40201504 +4022c2c1: 0000c0 callx0 a0 +4022c2c4: 041216 beqz a2, 4022c309 +4022c2c7: fff541 l32r a4, 4022c29c +4022c2ca: 030c movi.n a3, 0 +4022c2cc: 0239 s32i.n a3, a2, 0 +4022c2ce: 0438 l32i.n a3, a4, 0 +4022c2d0: 22e9 s32i.n a14, a2, 8 +4022c2d2: 32d9 s32i.n a13, a2, 12 +4022c2d4: 12c9 s32i.n a12, a2, 4 +4022c2d6: a38c beqz.n a3, 4022c2e4 +4022c2d8: 1358 l32i.n a5, a3, 4 +4022c2da: 12bc57 bgeu a12, a5, 4022c2f0 +4022c2dd: c055c0 sub a5, a5, a12 +4022c2e0: 1359 s32i.n a5, a3, 4 +4022c2e2: 0239 s32i.n a3, a2, 0 +4022c2e4: 0429 s32i.n a2, a4, 0 +4022c2e6: 0007c6 j 4022c309 +4022c2e9: 1468 l32i.n a6, a4, 4 +4022c2eb: 113567 bltu a5, a6, 4022c300 +4022c2ee: 043d mov.n a3, a4 +4022c2f0: 1248 l32i.n a4, a2, 4 +4022c2f2: 1358 l32i.n a5, a3, 4 +4022c2f4: c05450 sub a5, a4, a5 +4022c2f7: 0348 l32i.n a4, a3, 0 +4022c2f9: 1259 s32i.n a5, a2, 4 +4022c2fb: 648c beqz.n a4, 4022c305 +4022c2fd: fffa06 j 4022c2e9 +4022c300: c05650 sub a5, a6, a5 +4022c303: 1459 s32i.n a5, a4, 4 +4022c305: 0249 s32i.n a4, a2, 0 +4022c307: 0329 s32i.n a2, a3, 0 +4022c309: 3108 l32i.n a0, a1, 12 +4022c30b: 21c8 l32i.n a12, a1, 8 +4022c30d: 11d8 l32i.n a13, a1, 4 +4022c30f: 01e8 l32i.n a14, a1, 0 +4022c311: 10c112 addi a1, a1, 16 +4022c314: f00d ret.n +4022c316: d00000 subx2 a0, a0, a0 +4022c319: 4022c3 excw +4022c31c: c398 l32i.n a9, a3, 48 +4022c31e: 144022 s8i a2, a0, 20 +4022c321: fed9 s32i.n a13, a14, 60 +4022c323: 3f .byte 0x3f + +4022c324 : +4022c324: fffd31 l32r a3, 4022c318 +4022c327: 5eeb21 l32r a2, 40203ed4 +4022c32a: f0c112 addi a1, a1, -16 +4022c32d: 00a042 movi a4, 0 +4022c330: 3109 s32i.n a0, a1, 12 +4022c332: 0261c2 s32i a12, a1, 8 +4022c335: fff685 call0 4022c2a0 +4022c338: 938a21 l32r a2, 40211160 +4022c33b: 0c0c movi.n a12, 0 +4022c33d: 0020c0 memw +4022c340: 02c9 s32i.n a12, a2, 0 +4022c342: 55fd31 l32r a3, 40201b38 +4022c345: 55fd21 l32r a2, 40201b3c +4022c348: 0c4d mov.n a4, a12 +4022c34a: fff545 call0 4022c2a0 +4022c34d: 55f131 l32r a3, 40201b14 +4022c350: 204cc0 or a4, a12, a12 +4022c353: f4a122 movi a2, 0x1f4 +4022c356: fff485 call0 4022c2a0 +4022c359: 55e531 l32r a3, 40201af0 +4022c35c: 204cc0 or a4, a12, a12 +4022c35f: 64a022 movi a2, 100 +4022c362: fff3c5 call0 4022c2a0 +4022c365: 55d931 l32r a3, 40201acc +4022c368: 204cc0 or a4, a12, a12 +4022c36b: e8a322 movi a2, 0x3e8 +4022c36e: fff305 call0 4022c2a0 +4022c371: ffea31 l32r a3, 4022c31c +4022c374: 0c4d mov.n a4, a12 +4022c376: 7da022 movi a2, 125 +4022c379: fff245 call0 4022c2a0 +4022c37c: 580221 l32r a2, 40202384 +4022c37f: 3108 l32i.n a0, a1, 12 +4022c381: 0020c0 memw +4022c384: 0238 l32i.n a3, a2, 0 +4022c386: ffe621 l32r a2, 4022c320 +4022c389: 21c8 l32i.n a12, a1, 8 +4022c38b: 0239 s32i.n a3, a2, 0 +4022c38d: 10c112 addi a1, a1, 16 +4022c390: f00d ret.n +4022c392: 100000 and a0, a0, a0 +4022c395: fed9 s32i.n a13, a14, 60 +4022c397: 3f .byte 0x3f +4022c398: f0c112 addi a1, a1, -16 +4022c39b: 3109 s32i.n a0, a1, 12 +4022c39d: fd9785 call0 40229d18 +4022c3a0: 556921 l32r a2, 40201944 +4022c3a3: 0228 l32i.n a2, a2, 0 +4022c3a5: 008256 bnez a2, 4022c3b1 +4022c3a8: 556921 l32r a2, 4020194c +4022c3ab: 002222 l32i a2, a2, 0 +4022c3ae: 00e216 beqz a2, 4022c3c0 +4022c3b1: ffda31 l32r a3, 4022c31c +4022c3b4: 040c movi.n a4, 0 +4022c3b6: 7da022 movi a2, 125 +4022c3b9: ffee45 call0 4022c2a0 +4022c3bc: 0001c6 j 4022c3c7 +4022c3bf: f52100 extui a2, a0, 17, 16 +4022c3c2: ff .byte 0xff +4022c3c3: 030c movi.n a3, 0 +4022c3c5: 0239 s32i.n a3, a2, 0 +4022c3c7: 3108 l32i.n a0, a1, 12 +4022c3c9: 10c112 addi a1, a1, 16 +4022c3cc: f00d ret.n +4022c3ce: 120000 excw +4022c3d1: 09f0c1 l32r a12, 401eeb94 <_lit4_end+0xe8868> +4022c3d4: 64c531 l32r a3, 402056e8 +4022c3d7: 31fb addi.n a3, a1, 15 +4022c3d9: 21ffd0 srai a15, a13, 15 +4022c3dc: be .byte 0xbe +4022c3dd: 5e .byte 0x5e +4022c3de: 00a042 movi a4, 0 +4022c3e1: ffebc5 call0 4022c2a0 +4022c3e4: 3108 l32i.n a0, a1, 12 +4022c3e6: 10c112 addi a1, a1, 16 +4022c3e9: f00d ret.n + ... + +4022c3ec : +4022c3ec: ffac41 l32r a4, 4022c29c +4022c3ef: f0c112 addi a1, a1, -16 +4022c3f2: 027d mov.n a7, a2 +4022c3f4: 0428 l32i.n a2, a4, 0 +4022c3f6: 3109 s32i.n a0, a1, 12 +4022c3f8: 045d mov.n a5, a4 +4022c3fa: 060c movi.n a6, 0 +4022c3fc: 92bc beqz.n a2, 4022c439 +4022c3fe: 2288 l32i.n a8, a2, 8 +4022c400: 0248 l32i.n a4, a2, 0 +4022c402: 2a9877 bne a8, a7, 4022c430 +4022c405: 3288 l32i.n a8, a2, 12 +4022c407: 259837 bne a8, a3, 4022c430 +4022c40a: 46cc bnez.n a6, 4022c412 +4022c40c: 0549 s32i.n a4, a5, 0 +4022c40e: 000086 j 4022c414 +4022c411: 064900 excw +4022c414: 0238 l32i.n a3, a2, 0 +4022c416: 638c beqz.n a3, 4022c420 +4022c418: 1358 l32i.n a5, a3, 4 +4022c41a: 1248 l32i.n a4, a2, 4 +4022c41c: 454a add.n a4, a5, a4 +4022c41e: 1349 s32i.n a4, a3, 4 +4022c420: ff9e31 l32r a3, 4022c298 +4022c423: 6fa142 movi a4, 0x16f +4022c426: 543801 l32r a0, 40201508 +4022c429: 0000c0 callx0 a0 +4022c42c: 000246 j 4022c439 +4022c42f: 026d00 excw +4022c432: 348c beqz.n a4, 4022c439 +4022c434: 042d mov.n a2, a4 +4022c436: fff106 j 4022c3fe +4022c439: 3108 l32i.n a0, a1, 12 +4022c43b: 10c112 addi a1, a1, 16 +4022c43e: f00d ret.n + +4022c440 : +4022c440: d0c112 addi a1, a1, -48 +4022c443: 57d021 l32r a2, 40202384 +4022c446: a1c9 s32i.n a12, a1, 40 +4022c448: ff95c1 l32r a12, 4022c29c +4022c44b: 91d9 s32i.n a13, a1, 36 +4022c44d: 0020c0 memw +4022c450: 02d8 l32i.n a13, a2, 0 +4022c452: 0c28 l32i.n a2, a12, 0 +4022c454: b109 s32i.n a0, a1, 44 +4022c456: 81e9 s32i.n a14, a1, 32 +4022c458: 71f9 s32i.n a15, a1, 28 +4022c45a: 056216 beqz a2, 4022c4b4 +4022c45d: 5e9c21 l32r a2, 40203ed0 +4022c460: ffb0e1 l32r a14, 4022c320 +4022c463: 000222 l8ui a2, a2, 0 +4022c466: 62cc bnez.n a2, 4022c470 +4022c468: 0e28 l32i.n a2, a14, 0 +4022c46a: 5e9a31 l32r a3, 40203ed4 +4022c46d: 000106 j 4022c475 +4022c470: 0e28 l32i.n a2, a14, 0 +4022c472: 38a132 movi a3, 0x138 +4022c475: c02d20 sub a2, a13, a2 +4022c478: 569501 l32r a0, 40201ecc +4022c47b: 0000c0 callx0 a0 +4022c47e: 02fd mov.n a15, a2 +4022c480: 0c28 l32i.n a2, a12, 0 +4022c482: 1238 l32i.n a3, a2, 4 +4022c484: 2c3f37 bltu a15, a3, 4022c4b4 +4022c487: c0ff30 sub a15, a15, a3 +4022c48a: 0238 l32i.n a3, a2, 0 +4022c48c: 2258 l32i.n a5, a2, 8 +4022c48e: 0c39 s32i.n a3, a12, 0 +4022c490: 3268 l32i.n a6, a2, 12 +4022c492: ff8131 l32r a3, 4022c298 +4022c495: 0ed9 s32i.n a13, a14, 0 +4022c497: a2a142 movi a4, 0x1a2 +4022c49a: 0159 s32i.n a5, a1, 0 +4022c49c: 1169 s32i.n a6, a1, 4 +4022c49e: 541a01 l32r a0, 40201508 +4022c4a1: 0000c0 callx0 a0 +4022c4a4: 0158 l32i.n a5, a1, 0 +4022c4a6: 1168 l32i.n a6, a1, 4 +4022c4a8: fd4516 beqz a5, 4022c480 +4022c4ab: 062d mov.n a2, a6 +4022c4ad: 0005c0 callx0 a5 +4022c4b0: fff306 j 4022c480 +4022c4b3: b10800 excw +4022c4b6: a1c8 l32i.n a12, a1, 40 +4022c4b8: 91d8 l32i.n a13, a1, 36 +4022c4ba: 81e8 l32i.n a14, a1, 32 +4022c4bc: 71f8 l32i.n a15, a1, 28 +4022c4be: 30c112 addi a1, a1, 48 +4022c4c1: f00d ret.n + ... + +4022c4c4 : +4022c4c4: 57b021 l32r a2, 40202384 +4022c4c7: 0020c0 memw +4022c4ca: 0238 l32i.n a3, a2, 0 +4022c4cc: ff9521 l32r a2, 4022c320 +4022c4cf: 0239 s32i.n a3, a2, 0 +4022c4d1: f00d ret.n + ... + +4022c4d4 : +4022c4d4: ffb021 l32r a2, 4022c394 +4022c4d7: f0c112 addi a1, a1, -16 +4022c4da: 0238 l32i.n a3, a2, 0 +4022c4dc: 3109 s32i.n a0, a1, 12 +4022c4de: b3dc bnez.n a3, 4022c4fd +4022c4e0: 551931 l32r a3, 40201944 +4022c4e3: 0338 l32i.n a3, a3, 0 +4022c4e5: 53cc bnez.n a3, 4022c4ee +4022c4e7: 551931 l32r a3, 4020194c +4022c4ea: 0338 l32i.n a3, a3, 0 +4022c4ec: d38c beqz.n a3, 4022c4fd +4022c4ee: 130c movi.n a3, 1 +4022c4f0: 0239 s32i.n a3, a2, 0 +4022c4f2: ff8a31 l32r a3, 4022c31c +4022c4f5: 040c movi.n a4, 0 +4022c4f7: 7da022 movi a2, 125 +4022c4fa: ffda45 call0 4022c2a0 +4022c4fd: 3108 l32i.n a0, a1, 12 +4022c4ff: 10c112 addi a1, a1, 16 +4022c502: f00d ret.n +4022c504: fe8863 excw +4022c507: 3f .byte 0x3f + +4022c508 : +4022c508: edc321 l32r a2, 40227c14 +4022c50b: fffe31 l32r a3, 4022c504 +4022c50e: 1228 l32i.n a2, a2, 4 +4022c510: f0c112 addi a1, a1, -16 +4022c513: 050c movi.n a5, 0 +4022c515: b0a342 movi a4, 0x3b0 +4022c518: 21c9 s32i.n a12, a1, 8 +4022c51a: 3109 s32i.n a0, a1, 12 +4022c51c: 53fa01 l32r a0, 40201504 +4022c51f: 0000c0 callx0 a0 +4022c522: 02cd mov.n a12, a2 +4022c524: e28c beqz.n a2, 4022c536 +4022c526: 442c movi.n a4, 36 +4022c528: 030c movi.n a3, 0 +4022c52a: 52b901 l32r a0, 40201010 <_irom0_text_start> +4022c52d: 0000c0 callx0 a0 +4022c530: 80af22 movi a2, -128 +4022c533: 0a4c22 s8i a2, a12, 10 +4022c536: 3108 l32i.n a0, a1, 12 +4022c538: 0c2d mov.n a2, a12 +4022c53a: 21c8 l32i.n a12, a1, 8 +4022c53c: 10c112 addi a1, a1, 16 +4022c53f: f00d ret.n +4022c541: 000000 ill +4022c544: fee780 excw +4022c547: 3f .byte 0x3f + +4022c548 : +4022c548: ffff41 l32r a4, 4022c544 +4022c54b: f0c112 addi a1, a1, -16 +4022c54e: 0438 l32i.n a3, a4, 0 +4022c550: 3109 s32i.n a0, a1, 12 +4022c552: 0e9327 bne a3, a2, 4022c564 +4022c555: 3338 l32i.n a3, a3, 12 +4022c557: 0439 s32i.n a3, a4, 0 +4022c559: 000646 j 4022c576 +4022c55c: 480000 excw +4022c55f: 84cc33 excw +4022c562: 3338 l32i.n a3, a3, 12 +4022c564: ff6356 bnez a3, 4022c55e +4022c567: 0002c6 j 4022c576 +4022c56a: 470000 excw +4022c56d: 48f292 excw +4022c570: 334932 s8i a3, a9, 51 +4022c573: fffac6 j 4022c562 +4022c576: ffe331 l32r a3, 4022c504 +4022c579: a1a342 movi a4, 0x3a1 +4022c57c: 53e301 l32r a0, 40201508 +4022c57f: 0000c0 callx0 a0 +4022c582: 3108 l32i.n a0, a1, 12 +4022c584: 10c112 addi a1, a1, 16 +4022c587: f00d ret.n +4022c589: 000000 ill + +4022c58c : +4022c58c: ffee71 l32r a7, 4022c544 +4022c58f: 090c movi.n a9, 0 +4022c591: 0788 l32i.n a8, a7, 0 +4022c593: 160c movi.n a6, 1 +4022c595: 936930 movnez a6, a9, a3 +4022c598: f44040 extui a4, a4, 0, 16 +4022c59b: 085d mov.n a5, a8 +4022c59d: 746060 extui a6, a6, 0, 8 +4022c5a0: 95ac beqz.n a5, 4022c5cd +4022c5a2: 201527 beq a5, a2, 4022c5c6 +4022c5a5: 0915a2 l16ui a10, a5, 18 +4022c5a8: 1c9a47 bne a10, a4, 4022c5c8 +4022c5ab: 35cc bnez.n a5, 4022c5b2 +4022c5ad: 337c movi.n a3, -13 +4022c5af: 001546 j 4022c608 +4022c5b2: 05b8 l32i.n a11, a5, 0 +4022c5b4: ff5b16 beqz a11, 4022c5ad +4022c5b7: ff2656 bnez a6, 4022c5ad +4022c5ba: 03a8 l32i.n a10, a3, 0 +4022c5bc: feda16 beqz a10, 4022c5ad +4022c5bf: ea1ba7 beq a11, a10, 4022c5ad +4022c5c2: 000086 j 4022c5c8 +4022c5c5: 190c00 excw +4022c5c8: 3558 l32i.n a5, a5, 12 +4022c5ca: fff486 j 4022c5a0 +4022c5cd: 011357 beq a3, a5, 4022c5d2 +4022c5d0: 0358 l32i.n a5, a3, 0 +4022c5d2: 0259 s32i.n a5, a2, 0 +4022c5d4: 44ec bnez.n a4, 4022c5fc +4022c5d6: 5e7241 l32r a4, 40203fa0 +4022c5d9: d28861 l32r a6, 40220ffc +4022c5dc: 083d mov.n a3, a8 +4022c5de: 739c beqz.n a3, 4022c5f9 +4022c5e0: 546a add.n a5, a4, a6 +4022c5e2: 359c beqz.n a5, 4022c5f9 +4022c5e4: 091352 l16ui a5, a3, 18 +4022c5e7: 099547 bne a5, a4, 4022c5f4 +4022c5ea: 441b addi.n a4, a4, 1 +4022c5ec: f44040 extui a4, a4, 0, 16 +4022c5ef: 083d mov.n a3, a8 +4022c5f1: fffa46 j 4022c5de +4022c5f4: 3338 l32i.n a3, a3, 12 +4022c5f6: fff906 j 4022c5de +4022c5f9: fb0356 bnez a3, 4022c5ad +4022c5fc: 095242 s16i a4, a2, 18 +4022c5ff: 030c movi.n a3, 0 +4022c601: 039937 bne a9, a3, 4022c608 +4022c604: 3289 s32i.n a8, a2, 12 +4022c606: 0729 s32i.n a2, a7, 0 +4022c608: 032d mov.n a2, a3 +4022c60a: f00d ret.n + +4022c60c : +4022c60c: f0c112 addi a1, a1, -16 +4022c60f: 21c9 s32i.n a12, a1, 8 +4022c611: 02cd mov.n a12, a2 +4022c613: 091222 l16ui a2, a2, 18 +4022c616: 11d9 s32i.n a13, a1, 4 +4022c618: 01e9 s32i.n a14, a1, 0 +4022c61a: 3109 s32i.n a0, a1, 12 +4022c61c: 03dd mov.n a13, a3 +4022c61e: f4e040 extui a14, a4, 0, 16 +4022c621: 728c beqz.n a2, 4022c62c +4022c623: 020c movi.n a2, 0 +4022c625: 3d9c beqz.n a13, 4022c63c +4022c627: 0d28 l32i.n a2, a13, 0 +4022c629: 0003c6 j 4022c63c +4022c62c: 040c movi.n a4, 0 +4022c62e: 0c3d mov.n a3, a12 +4022c630: 0c2d mov.n a2, a12 +4022c632: fff585 call0 4022c58c +4022c635: b2ec bnez.n a2, 4022c664 +4022c637: fffa06 j 4022c623 +4022c63a: 320000 excw +4022c63d: 100c movi.n a0, 1 +4022c63f: 1c29 s32i.n a2, a12, 4 +4022c641: 420c movi.n a2, 4 +4022c643: 202320 or a2, a3, a2 +4022c646: 104c22 s8i a2, a12, 16 +4022c649: ffbe21 l32r a2, 4022c544 +4022c64c: 0a5ce2 s16i a14, a12, 20 +4022c64f: 0248 l32i.n a4, a2, 0 +4022c651: 043d mov.n a3, a4 +4022c653: 738c beqz.n a3, 4022c65e +4022c655: 0913c7 beq a3, a12, 4022c662 +4022c658: 3338 l32i.n a3, a3, 12 +4022c65a: fffd46 j 4022c653 +4022c65d: 3c4900 excw +4022c660: 02c9 s32i.n a12, a2, 0 +4022c662: 020c movi.n a2, 0 +4022c664: 3108 l32i.n a0, a1, 12 +4022c666: 21c8 l32i.n a12, a1, 8 +4022c668: 11d8 l32i.n a13, a1, 4 +4022c66a: 01e8 l32i.n a14, a1, 0 +4022c66c: 10c112 addi a1, a1, 16 +4022c66f: f00d ret.n +4022c671: 000000 ill + +4022c674 : +4022c674: 030c movi.n a3, 0 +4022c676: 100242 l8ui a4, a2, 16 +4022c679: 1239 s32i.n a3, a2, 4 +4022c67b: 0a5232 s16i a3, a2, 20 +4022c67e: b37c movi.n a3, -5 +4022c680: 103430 and a3, a4, a3 +4022c683: 104232 s8i a3, a2, 16 +4022c686: f00d ret.n + +4022c688 : +4022c688: 7239 s32i.n a3, a2, 28 +4022c68a: 8249 s32i.n a4, a2, 32 +4022c68c: f00d ret.n + ... + +4022c690 : +4022c690: c0c112 addi a1, a1, -64 +4022c693: b1f9 s32i.n a15, a1, 44 +4022c695: 02fd mov.n a15, a2 +4022c697: 091222 l16ui a2, a2, 18 +4022c69a: e1c9 s32i.n a12, a1, 56 +4022c69c: d1d9 s32i.n a13, a1, 52 +4022c69e: f109 s32i.n a0, a1, 60 +4022c6a0: c1e9 s32i.n a14, a1, 48 +4022c6a2: 4149 s32i.n a4, a1, 16 +4022c6a4: 5169 s32i.n a6, a1, 20 +4022c6a6: 03dd mov.n a13, a3 +4022c6a8: f4c050 extui a12, a5, 0, 16 +4022c6ab: d28c beqz.n a2, 4022c6bc +4022c6ad: 830c movi.n a3, 8 +4022c6af: 0d2d mov.n a2, a13 +4022c6b1: fc6645 call0 40228d18 +4022c6b4: 0ded mov.n a14, a13 +4022c6b6: 22bc beqz.n a2, 4022c6ec +4022c6b8: 000486 j 4022c6ce +4022c6bb: 040c00 extui a0, a0, 12, 1 +4022c6be: 0f3d mov.n a3, a15 +4022c6c0: 0f2d mov.n a2, a15 +4022c6c2: ffec85 call0 4022c58c +4022c6c5: 0ff256 bnez a2, 4022c7c8 +4022c6c8: fff846 j 4022c6ad +4022c6cb: 000000 ill +4022c6ce: 00a042 movi a4, 0 +4022c6d1: 08a032 movi a3, 8 +4022c6d4: 120c movi.n a2, 1 +4022c6d6: fc73c5 call0 40228e14 +4022c6d9: 02ed mov.n a14, a2 +4022c6db: f27c movi.n a2, -1 +4022c6dd: 0e7e16 beqz a14, 4022c7c8 +4022c6e0: 041d22 l16ui a2, a13, 8 +4022c6e3: 528c beqz.n a2, 4022c6ec +4022c6e5: 0d3d mov.n a3, a13 +4022c6e7: 0e2d mov.n a2, a14 +4022c6e9: fc9305 call0 4022901c +4022c6ec: 091f32 l16ui a3, a15, 18 +4022c6ef: 1e98 l32i.n a9, a14, 4 +4022c6f1: 112380 slli a2, a3, 8 +4022c6f4: 413830 srli a3, a3, 8 +4022c6f7: 202230 or a2, a2, a3 +4022c6fa: f42020 extui a2, a2, 0, 16 +4022c6fd: 004922 s8i a2, a9, 0 +4022c700: 412820 srli a2, a2, 8 +4022c703: 4138 l32i.n a3, a1, 16 +4022c705: 014922 s8i a2, a9, 1 +4022c708: 112c80 slli a2, a12, 8 +4022c70b: 41c8c0 srli a12, a12, 8 +4022c70e: 20c2c0 or a12, a2, a12 +4022c711: 020c movi.n a2, 0 +4022c713: f4c0c0 extui a12, a12, 0, 16 +4022c716: 064922 s8i a2, a9, 6 +4022c719: 074922 s8i a2, a9, 7 +4022c71c: 0328 l32i.n a2, a3, 0 +4022c71e: 0249c2 s8i a12, a9, 2 +4022c721: f0a032 movi a3, 240 +4022c724: 41c8c0 srli a12, a12, 8 +4022c727: 102320 and a2, a3, a2 +4022c72a: 0349c2 s8i a12, a9, 3 +4022c72d: e0a032 movi a3, 224 +4022c730: 109237 bne a2, a3, 4022c744 +4022c733: 100f22 l8ui a2, a15, 16 +4022c736: 0a6237 bbci a2, 3, 4022c744 +4022c739: 0d0e32 l8ui a3, a14, 13 +4022c73c: 420c movi.n a2, 4 +4022c73e: 202320 or a2, a3, a2 +4022c741: 0d4e22 s8i a2, a14, 13 +4022c744: 0f28 l32i.n a2, a15, 0 +4022c746: 0fcd mov.n a12, a15 +4022c748: 5148 l32i.n a4, a1, 20 +4022c74a: 42cc bnez.n a2, 4022c752 +4022c74c: c44b addi.n a12, a4, 4 +4022c74e: 0005c6 j 4022c769 +4022c751: 243200 extui a3, a0, 2, 3 +4022c754: 123701 l32r a0, 401f1030 <_lit4_end+0xead04> +4022c757: af2210 excw +4022c75a: d7fa add.n a13, a7, a15 +4022c75c: 1e .byte 0x1e +4022c75d: e069 s32i.n a6, a0, 56 +4022c75f: 2e .byte 0x2e +4022c760: 63c520 excw +4022c763: 7cfc bnez.n a12, 4022c79e +4022c765: 1786a2 excw +4022c768: 1e6200 excw +4022c76b: 368004 excw +4022c76e: 286011 l32r a1, 401f68f0 <_lit4_end+0xf05c4> +4022c771: 232041 l32r a4, 401f53f4 <_lit4_end+0xef0c8> +4022c774: 202020 or a2, a0, a2 +4022c777: 4922f4 excw +4022c77a: 282004 excw +4022c77d: 492241 l32r a4, 401fec08 <_lit4_end+0xf88dc> +4022c780: 0f2205 call0 4023b9a4 <_irom0_text_end+0xae28> +4022c783: e20710 excw +4022c786: 1f .byte 0x1f +4022c787: 042142 l32i a4, a1, 16 +4022c78a: 0c3d mov.n a3, a12 +4022c78c: 151c movi.n a5, 17 +4022c78e: 0e2d mov.n a2, a14 +4022c790: 066192 s32i a9, a1, 24 +4022c793: 03f645 call0 402306f8 +4022c796: 561531 l32r a3, 40201fec +4022c799: 6198 l32i.n a9, a1, 24 +4022c79b: 832320 moveqz a2, a3, a2 +4022c79e: 064922 s8i a2, a9, 6 +4022c7a1: f42820 extui a2, a2, 8, 16 +4022c7a4: 074922 s8i a2, a9, 7 +4022c7a7: 5128 l32i.n a2, a1, 20 +4022c7a9: 090f62 l8ui a6, a15, 9 +4022c7ac: 0a0f52 l8ui a5, a15, 10 +4022c7af: 4148 l32i.n a4, a1, 16 +4022c7b1: 0129 s32i.n a2, a1, 0 +4022c7b3: 0c3d mov.n a3, a12 +4022c7b5: 171c movi.n a7, 17 +4022c7b7: 0e2d mov.n a2, a14 +4022c7b9: fbea85 call0 40228664 +4022c7bc: 02cd mov.n a12, a2 +4022c7be: 061ed7 beq a14, a13, 4022c7c8 +4022c7c1: 0e2d mov.n a2, a14 +4022c7c3: fc5dc5 call0 40228da0 +4022c7c6: 0c2d mov.n a2, a12 +4022c7c8: f108 l32i.n a0, a1, 60 +4022c7ca: e1c8 l32i.n a12, a1, 56 +4022c7cc: d1d8 l32i.n a13, a1, 52 +4022c7ce: c1e8 l32i.n a14, a1, 48 +4022c7d0: b1f8 l32i.n a15, a1, 44 +4022c7d2: 40c112 addi a1, a1, 64 +4022c7d5: f00d ret.n + ... + +4022c7d8 : +4022c7d8: e0c112 addi a1, a1, -32 +4022c7db: 61c9 s32i.n a12, a1, 24 +4022c7dd: 02cd mov.n a12, a2 +4022c7df: 0428 l32i.n a2, a4, 0 +4022c7e1: f0a062 movi a6, 240 +4022c7e4: 106620 and a6, a6, a2 +4022c7e7: e0a022 movi a2, 224 +4022c7ea: c02620 sub a2, a6, a2 +4022c7ed: 51d9 s32i.n a13, a1, 20 +4022c7ef: f4d050 extui a13, a5, 0, 16 +4022c7f2: 18cc52 addi a5, a12, 24 +4022c7f5: 935420 movnez a5, a4, a2 +4022c7f8: 052d mov.n a2, a5 +4022c7fa: 0139 s32i.n a3, a1, 0 +4022c7fc: 1149 s32i.n a4, a1, 4 +4022c7fe: 7109 s32i.n a0, a1, 28 +4022c800: fb9785 call0 4022817c +4022c803: 026d mov.n a6, a2 +4022c805: 0138 l32i.n a3, a1, 0 +4022c807: c27c movi.n a2, -4 +4022c809: 1148 l32i.n a4, a1, 4 +4022c80b: 568c beqz.n a6, 4022c814 +4022c80d: 0d5d mov.n a5, a13 +4022c80f: 0c2d mov.n a2, a12 +4022c811: ffe7c5 call0 4022c690 +4022c814: 7108 l32i.n a0, a1, 28 +4022c816: 61c8 l32i.n a12, a1, 24 +4022c818: 51d8 l32i.n a13, a1, 20 +4022c81a: 20c112 addi a1, a1, 32 +4022c81d: f00d ret.n + ... + +4022c820 : +4022c820: 0a1252 l16ui a5, a2, 20 +4022c823: f0c112 addi a1, a1, -16 +4022c826: 424b addi.n a4, a2, 4 +4022c828: 3109 s32i.n a0, a1, 12 +4022c82a: fffac5 call0 4022c7d8 +4022c82d: 3108 l32i.n a0, a1, 12 +4022c82f: 10c112 addi a1, a1, 16 +4022c832: f00d ret.n + +4022c834 : +4022c834: d0c112 addi a1, a1, -48 +4022c837: 71f9 s32i.n a15, a1, 28 +4022c839: 02fd mov.n a15, a2 +4022c83b: 1228 l32i.n a2, a2, 4 +4022c83d: b109 s32i.n a0, a1, 44 +4022c83f: a1c9 s32i.n a12, a1, 40 +4022c841: 91d9 s32i.n a13, a1, 36 +4022c843: 81e9 s32i.n a14, a1, 32 +4022c845: 0139 s32i.n a3, a1, 0 +4022c847: 000232 l8ui a3, a2, 0 +4022c84a: 1129 s32i.n a2, a1, 4 +4022c84c: 343030 extui a3, a3, 0, 4 +4022c84f: 232b addi.n a2, a3, 2 +4022c851: 041f42 l16ui a4, a15, 8 +4022c854: 1122e0 slli a2, a2, 2 +4022c857: 0f2427 blt a4, a2, 4022c86a +4022c85a: 0133e0 slli a3, a3, 18 +4022c85d: 603030 neg a3, a3 +4022c860: 313030 srai a3, a3, 16 +4022c863: 0f2d mov.n a2, a15 +4022c865: fc4b05 call0 40228d18 +4022c868: 928c beqz.n a2, 4022c875 +4022c86a: 0f2d mov.n a2, a15 +4022c86c: fc5305 call0 40228da0 +4022c86f: 0063c6 j 4022ca02 +4022c872: 000000 ill +4022c875: ee5cc1 l32r a12, 402281e8 +4022c878: 012f42 l32i a4, a15, 4 +4022c87b: 002132 l32i a3, a1, 0 +4022c87e: 002c22 l32i a2, a12, 0 +4022c881: 2149 s32i.n a4, a1, 8 +4022c883: fbeac5 call0 40228730 +4022c886: 2148 l32i.n a4, a1, 8 +4022c888: 02ed mov.n a14, a2 +4022c88a: 010422 l8ui a2, a4, 1 +4022c88d: 000432 l8ui a3, a4, 0 +4022c890: 112280 slli a2, a2, 8 +4022c893: 202230 or a2, a2, a3 +4022c896: 11d280 slli a13, a2, 8 +4022c899: 412820 srli a2, a2, 8 +4022c89c: 20dd20 or a13, a13, a2 +4022c89f: 030422 l8ui a2, a4, 3 +4022c8a2: 020462 l8ui a6, a4, 2 +4022c8a5: 112280 slli a2, a2, 8 +4022c8a8: 202260 or a2, a2, a6 +4022c8ab: 113280 slli a3, a2, 8 +4022c8ae: 412820 srli a2, a2, 8 +4022c8b1: 203320 or a3, a3, a2 +4022c8b4: f43030 extui a3, a3, 0, 16 +4022c8b7: 424c movi.n a2, 68 +4022c8b9: f4d0d0 extui a13, a13, 0, 16 +4022c8bc: 364c movi.n a6, 67 +4022c8be: 1e9327 bne a3, a2, 4022c8e0 +4022c8c1: 021d67 beq a13, a6, 4022c8c7 +4022c8c4: 002686 j 4022c962 +4022c8c7: 0158 l32i.n a5, a1, 0 +4022c8c9: 8528 l32i.n a2, a5, 32 +4022c8cb: 093216 beqz a2, 4022c962 +4022c8ce: 1228 l32i.n a2, a2, 4 +4022c8d0: 08e216 beqz a2, 4022c962 +4022c8d3: 1238 l32i.n a3, a2, 4 +4022c8d5: 124316 beqz a3, 4022c9fd +4022c8d8: ee4561 l32r a6, 402281ec +4022c8db: 0668 l32i.n a6, a6, 0 +4022c8dd: 0004c6 j 4022c8f4 +4022c8e0: 199367 bne a3, a6, 4022c8fd +4022c8e3: 7b9d27 bne a13, a2, 4022c962 +4022c8e6: 0158 l32i.n a5, a1, 0 +4022c8e8: 9528 l32i.n a2, a5, 36 +4022c8ea: 074216 beqz a2, 4022c962 +4022c8ed: 0238 l32i.n a3, a2, 0 +4022c8ef: 10a316 beqz a3, 4022c9fd +4022c8f2: 0c68 l32i.n a6, a12, 0 +4022c8f4: 029367 bne a3, a6, 4022c8fa +4022c8f7: 004086 j 4022c9fd +4022c8fa: 001906 j 4022c962 +4022c8fd: ff1121 l32r a2, 4022c544 +4022c900: 0ca8 l32i.n a10, a12, 0 +4022c902: 0298 l32i.n a9, a2, 0 +4022c904: f0a022 movi a2, 240 +4022c907: 0c0c movi.n a12, 0 +4022c909: 20af62 movi a6, -224 +4022c90c: 102a20 and a2, a10, a2 +4022c90f: 226a add.n a2, a2, a6 +4022c911: 0c5d mov.n a5, a12 +4022c913: 160c movi.n a6, 1 +4022c915: 835620 moveqz a5, a6, a2 +4022c918: ee3521 l32r a2, 402281ec +4022c91b: 836ce0 moveqz a6, a12, a14 +4022c91e: 205560 or a5, a5, a6 +4022c921: 0278 l32i.n a7, a2, 0 +4022c923: 0c6d mov.n a6, a12 +4022c925: 092d mov.n a2, a9 +4022c927: 4b0c movi.n a11, 4 +4022c929: 32bc beqz.n a2, 4022c960 +4022c92b: 091282 l16ui a8, a2, 18 +4022c92e: 279837 bne a8, a3, 4022c959 +4022c931: 0288 l32i.n a8, a2, 0 +4022c933: 1ecc bnez.n a14, 4022c938 +4022c935: 004816 beqz a8, 4022c93d +4022c938: 0118a7 beq a8, a10, 4022c93d +4022c93b: a59c beqz.n a5, 4022c959 +4022c93d: 7ccc bnez.n a12, 4022c948 +4022c93f: 100282 l8ui a8, a2, 16 +4022c942: 1088b0 and a8, a8, a11 +4022c945: 83c280 moveqz a12, a2, a8 +4022c948: 0a1282 l16ui a8, a2, 20 +4022c94b: 0a98d7 bne a8, a13, 4022c959 +4022c94e: 1288 l32i.n a8, a2, 4 +4022c950: 09c816 beqz a8, 4022c9f0 +4022c953: 029877 bne a8, a7, 4022c959 +4022c956: 002586 j 4022c9f0 +4022c959: 026d mov.n a6, a2 +4022c95b: 3228 l32i.n a2, a2, 12 +4022c95d: fff206 j 4022c929 +4022c960: 0cdc bnez.n a12, 4022c974 +4022c962: 0158 l32i.n a5, a1, 0 +4022c964: ee2121 l32r a2, 402281e8 +4022c967: 1538 l32i.n a3, a5, 4 +4022c969: 002222 l32i a2, a2, 0 +4022c96c: 021327 beq a3, a2, 4022c972 +4022c96f: ffbdc6 j 4022c86a +4022c972: 0c0c movi.n a12, 0 +4022c974: 070422 l8ui a2, a4, 7 +4022c977: 060432 l8ui a3, a4, 6 +4022c97a: 112280 slli a2, a2, 8 +4022c97d: 202230 or a2, a2, a3 +4022c980: 014216 beqz a2, 4022c998 +4022c983: 041f62 l16ui a6, a15, 8 +4022c986: ee1841 l32r a4, 402281e8 +4022c989: ee1831 l32r a3, 402281ec +4022c98c: 11a052 movi a5, 17 +4022c98f: 202ff0 or a2, a15, a15 +4022c992: 03d645 call0 402306f8 +4022c995: ed1256 bnez a2, 4022c86a +4022c998: 837c movi.n a3, -8 +4022c99a: 0f2d mov.n a2, a15 +4022c99c: fc3785 call0 40228d18 +4022c99f: ec7256 bnez a2, 4022c86a +4022c9a2: 6c9c beqz.n a12, 4022c9bc +4022c9a4: 7c78 l32i.n a7, a12, 28 +4022c9a6: ec0716 beqz a7, 4022c86a +4022c9a9: ee1051 l32r a5, 402281ec +4022c9ac: 8c28 l32i.n a2, a12, 32 +4022c9ae: 0d6d mov.n a6, a13 +4022c9b0: 0f4d mov.n a4, a15 +4022c9b2: 203cc0 or a3, a12, a12 +4022c9b5: 0007c0 callx0 a7 +4022c9b8: 001186 j 4022ca02 +4022c9bb: ae5600 excw +4022c9be: 21ea add.n a2, a1, a14 +4022c9c0: ee0a add.n a14, a14, a0 +4022c9c2: f0a032 movi a3, 240 +4022c9c5: 0228 l32i.n a2, a2, 0 +4022c9c7: 102320 and a2, a3, a2 +4022c9ca: e0a032 movi a3, 224 +4022c9cd: 029237 bne a2, a3, 4022c9d3 +4022c9d0: ffa586 j 4022c86a +4022c9d3: 1128 l32i.n a2, a1, 4 +4022c9d5: 000232 l8ui a3, a2, 0 +4022c9d8: 0f2d mov.n a2, a15 +4022c9da: 343030 extui a3, a3, 0, 4 +4022c9dd: 1133e0 slli a3, a3, 2 +4022c9e0: 338b addi.n a3, a3, 8 +4022c9e2: fc3345 call0 40228d18 +4022c9e5: 330c movi.n a3, 3 +4022c9e7: 0f2d mov.n a2, a15 +4022c9e9: 016b05 call0 4022e09c +4022c9ec: ff9e86 j 4022c86a +4022c9ef: 968c00 excw +4022c9f2: 3238 l32i.n a3, a2, 12 +4022c9f4: 3639 s32i.n a3, a6, 12 +4022c9f6: fed331 l32r a3, 4022c544 +4022c9f9: 3299 s32i.n a9, a2, 12 +4022c9fb: 0329 s32i.n a2, a3, 0 +4022c9fd: 02cd mov.n a12, a2 +4022c9ff: ffdc46 j 4022c974 +4022ca02: b108 l32i.n a0, a1, 44 +4022ca04: a1c8 l32i.n a12, a1, 40 +4022ca06: 91d8 l32i.n a13, a1, 36 +4022ca08: 81e8 l32i.n a14, a1, 32 +4022ca0a: 71f8 l32i.n a15, a1, 28 +4022ca0c: 30c112 addi a1, a1, 48 +4022ca0f: f00d ret.n +4022ca11: 000000 ill + +4022ca14 : +4022ca14: 0248 l32i.n a4, a2, 0 +4022ca16: 749c beqz.n a4, 4022ca31 +4022ca18: 099437 bne a4, a3, 4022ca25 +4022ca1b: 4438 l32i.n a3, a4, 16 +4022ca1d: 0239 s32i.n a3, a2, 0 +4022ca1f: f00d ret.n +4022ca21: 4448 l32i.n a4, a4, 16 +4022ca23: a48c beqz.n a4, 4022ca31 +4022ca25: 4428 l32i.n a2, a4, 16 +4022ca27: f69327 bne a3, a2, 4022ca21 +4022ca2a: 4328 l32i.n a2, a3, 16 +4022ca2c: 4429 s32i.n a2, a4, 16 +4022ca2e: fffbc6 j 4022ca21 +4022ca31: f00d ret.n + ... + +4022ca34 : +4022ca34: f0c112 addi a1, a1, -16 +4022ca37: 11d9 s32i.n a13, a1, 4 +4022ca39: 02dd mov.n a13, a2 +4022ca3b: 0328 l32i.n a2, a3, 0 +4022ca3d: 21c9 s32i.n a12, a1, 8 +4022ca3f: 0d29 s32i.n a2, a13, 0 +4022ca41: 1328 l32i.n a2, a3, 4 +4022ca43: 3109 s32i.n a0, a1, 12 +4022ca45: 1d29 s32i.n a2, a13, 4 +4022ca47: 0328 l32i.n a2, a3, 0 +4022ca49: 03cd mov.n a12, a3 +4022ca4b: 4ab266 bnei a2, 16, 4022ca99 +4022ca4e: 2338 l32i.n a3, a3, 8 +4022ca50: 2d28 l32i.n a2, a13, 8 +4022ca52: 0338 l32i.n a3, a3, 0 +4022ca54: 440c movi.n a4, 4 +4022ca56: 0239 s32i.n a3, a2, 0 +4022ca58: 2c38 l32i.n a3, a12, 8 +4022ca5a: 2d28 l32i.n a2, a13, 8 +4022ca5c: 1338 l32i.n a3, a3, 4 +4022ca5e: 1239 s32i.n a3, a2, 4 +4022ca60: 2c38 l32i.n a3, a12, 8 +4022ca62: 2d28 l32i.n a2, a13, 8 +4022ca64: 33cb addi.n a3, a3, 12 +4022ca66: 22cb addi.n a2, a2, 12 +4022ca68: 516b01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022ca6b: 0000c0 callx0 a0 +4022ca6e: 2c38 l32i.n a3, a12, 8 +4022ca70: 2d28 l32i.n a2, a13, 8 +4022ca72: 338b addi.n a3, a3, 8 +4022ca74: 440c movi.n a4, 4 +4022ca76: 228b addi.n a2, a2, 8 +4022ca78: 516701 l32r a0, 40201014 <_irom0_text_start+0x4> +4022ca7b: 0000c0 callx0 a0 +4022ca7e: 2c38 l32i.n a3, a12, 8 +4022ca80: 2d28 l32i.n a2, a13, 8 +4022ca82: 4338 l32i.n a3, a3, 16 +4022ca84: 4239 s32i.n a3, a2, 16 +4022ca86: 2c38 l32i.n a3, a12, 8 +4022ca88: 2d28 l32i.n a2, a13, 8 +4022ca8a: 5338 l32i.n a3, a3, 20 +4022ca8c: 5239 s32i.n a3, a2, 20 +4022ca8e: 2c38 l32i.n a3, a12, 8 +4022ca90: 2d28 l32i.n a2, a13, 8 +4022ca92: 6338 l32i.n a3, a3, 24 +4022ca94: 6239 s32i.n a3, a2, 24 +4022ca96: 000bc6 j 4022cac9 +4022ca99: 2338 l32i.n a3, a3, 8 +4022ca9b: 2d28 l32i.n a2, a13, 8 +4022ca9d: 0338 l32i.n a3, a3, 0 +4022ca9f: 440c movi.n a4, 4 +4022caa1: 0239 s32i.n a3, a2, 0 +4022caa3: 2c38 l32i.n a3, a12, 8 +4022caa5: 2d28 l32i.n a2, a13, 8 +4022caa7: 1338 l32i.n a3, a3, 4 +4022caa9: 1239 s32i.n a3, a2, 4 +4022caab: 2c38 l32i.n a3, a12, 8 +4022caad: 2d28 l32i.n a2, a13, 8 +4022caaf: 33cb addi.n a3, a3, 12 +4022cab1: 22cb addi.n a2, a2, 12 +4022cab3: 515801 l32r a0, 40201014 <_irom0_text_start+0x4> +4022cab6: 0000c0 callx0 a0 +4022cab9: 2c38 l32i.n a3, a12, 8 +4022cabb: 2d28 l32i.n a2, a13, 8 +4022cabd: 440c movi.n a4, 4 +4022cabf: 338b addi.n a3, a3, 8 +4022cac1: 228b addi.n a2, a2, 8 +4022cac3: 515401 l32r a0, 40201014 <_irom0_text_start+0x4> +4022cac6: 0000c0 callx0 a0 +4022cac9: 3c28 l32i.n a2, a12, 12 +4022cacb: 3108 l32i.n a0, a1, 12 +4022cacd: 3d29 s32i.n a2, a13, 12 +4022cacf: 4c28 l32i.n a2, a12, 16 +4022cad1: 4d29 s32i.n a2, a13, 16 +4022cad3: 140c22 l8ui a2, a12, 20 +4022cad6: 144d22 s8i a2, a13, 20 +4022cad9: 6c28 l32i.n a2, a12, 24 +4022cadb: 21c8 l32i.n a12, a1, 8 +4022cadd: 6d29 s32i.n a2, a13, 24 +4022cadf: 11d8 l32i.n a13, a1, 4 +4022cae1: 10c112 addi a1, a1, 16 +4022cae4: f00d ret.n + ... + +4022cae8 : +4022cae8: 0248 l32i.n a4, a2, 0 +4022caea: 34cc bnez.n a4, 4022caf1 +4022caec: 0239 s32i.n a3, a2, 0 +4022caee: 000346 j 4022caff +4022caf1: 172422 l32i a2, a4, 92 +4022caf4: 428c beqz.n a2, 4022cafc +4022caf6: 024d mov.n a4, a2 +4022caf8: fffd46 j 4022caf1 +4022cafb: 643200 extui a3, a0, 2, 7 +4022cafe: 020c17 bnone a12, a1, 4022cb04 +4022cb01: 176322 s32i a2, a3, 92 +4022cb04: f00d ret.n + ... + +4022cb08 : +4022cb08: 0248 l32i.n a4, a2, 0 +4022cb0a: e49c beqz.n a4, 4022cb2c +4022cb0c: 0d9437 bne a4, a3, 4022cb1d +4022cb0f: 172432 l32i a3, a4, 92 +4022cb12: 0239 s32i.n a3, a2, 0 +4022cb14: f00d ret.n +4022cb16: 420000 excw +4022cb19: 8c1724 excw +4022cb1c: 2422d4 excw +4022cb1f: 932717 blt a7, a1, 4022cab6 +4022cb22: 2322f4 excw +4022cb25: 642217 blt a2, a1, 4022cb8d +4022cb28: fac617 bnall a6, a1, 4022cb26 +4022cb2b: ff .byte 0xff +4022cb2c: f00d ret.n + ... + +4022cb30 : +4022cb30: 0248 l32i.n a4, a2, 0 +4022cb32: 34cc bnez.n a4, 4022cb39 +4022cb34: 0239 s32i.n a3, a2, 0 +4022cb36: 000286 j 4022cb44 +4022cb39: 4428 l32i.n a2, a4, 16 +4022cb3b: 328c beqz.n a2, 4022cb42 +4022cb3d: 024d mov.n a4, a2 +4022cb3f: fffd86 j 4022cb39 +4022cb42: 4439 s32i.n a3, a4, 16 +4022cb44: 020c movi.n a2, 0 +4022cb46: 4329 s32i.n a2, a3, 16 +4022cb48: f00d ret.n + ... + +4022cb4c : +4022cb4c: 026d mov.n a6, a2 +4022cb4e: 020c movi.n a2, 0 +4022cb50: 5a1627 beq a6, a2, 4022cbae +4022cb53: e7f521 l32r a2, 40226b28 +4022cb56: 0248 l32i.n a4, a2, 0 +4022cb58: 045d mov.n a5, a4 +4022cb5a: 259c beqz.n a5, 4022cb70 +4022cb5c: 0528 l32i.n a2, a5, 0 +4022cb5e: 069627 bne a6, a2, 4022cb68 +4022cb61: 0359 s32i.n a5, a3, 0 +4022cb63: 000e86 j 4022cba1 +4022cb66: 520000 excw +4022cb69: c61725 excw +4022cb6c: fffa add.n a15, a15, a15 +4022cb6e: 210000 srai a0, a0, 0 +4022cb71: 58e703 excw +4022cb74: 008602 excw +4022cb77: 255200 extui a5, a0, 18, 3 +4022cb7a: d5ac17 bge a12, a1, 4022cb53 +4022cb7d: 0528 l32i.n a2, a5, 0 +4022cb7f: f59627 bne a6, a2, 4022cb78 +4022cb82: 2658 l32i.n a5, a6, 8 +4022cb84: 020c movi.n a2, 0 +4022cb86: 241527 beq a5, a2, 4022cbae +4022cb89: 3568 l32i.n a6, a5, 12 +4022cb8b: 1f1627 beq a6, a2, 4022cbae +4022cb8e: 0558 l32i.n a5, a5, 0 +4022cb90: 1a1527 beq a5, a2, 4022cbae +4022cb93: 549c beqz.n a4, 4022cbac +4022cb95: 3428 l32i.n a2, a4, 12 +4022cb97: 0a9627 bne a6, a2, 4022cba5 +4022cb9a: 2428 l32i.n a2, a4, 8 +4022cb9c: 059527 bne a5, a2, 4022cba5 +4022cb9f: 0349 s32i.n a4, a3, 0 +4022cba1: 120c movi.n a2, 1 +4022cba3: f00d ret.n +4022cba5: 172442 l32i a4, a4, 92 +4022cba8: fff9c6 j 4022cb93 +4022cbab: 020c00 excw +4022cbae: f00d ret.n + +4022cbb0 : +4022cbb0: e0c112 addi a1, a1, -32 +4022cbb3: 61c9 s32i.n a12, a1, 24 +4022cbb5: 7109 s32i.n a0, a1, 28 +4022cbb7: 02cd mov.n a12, a2 +4022cbb9: 51d9 s32i.n a13, a1, 20 +4022cbbb: 41e9 s32i.n a14, a1, 16 +4022cbbd: f4a022 movi a2, 244 +4022cbc0: 0bac16 beqz a12, 4022cc7e +4022cbc3: 0c38 l32i.n a3, a12, 0 +4022cbc5: 02b326 beqi a3, 16, 4022cbcb +4022cbc8: 002c86 j 4022cc7e +4022cbcb: e7d7d1 l32r a13, 40226b28 +4022cbce: 020c movi.n a2, 0 +4022cbd0: 0d38 l32i.n a3, a13, 0 +4022cbd2: 639c beqz.n a3, 4022cbec +4022cbd4: 0348 l32i.n a4, a3, 0 +4022cbd6: a48c beqz.n a4, 4022cbe4 +4022cbd8: 002442 l32i a4, a4, 0 +4022cbdb: 05b466 bnei a4, 16, 4022cbe4 +4022cbde: 01c222 addi a2, a2, 1 +4022cbe1: 742020 extui a2, a2, 0, 8 +4022cbe4: 172332 l32i a3, a3, 92 +4022cbe7: fff9c6 j 4022cbd2 +4022cbea: 310000 srai a0, a0, 16 +4022cbed: e868 l32i.n a6, a8, 56 +4022cbef: 0020c0 memw +4022cbf2: 0338 l32i.n a3, a3, 0 +4022cbf4: 743030 extui a3, a3, 0, 8 +4022cbf7: 053237 bltu a2, a3, 4022cc00 +4022cbfa: f1a022 movi a2, 241 +4022cbfd: 001f46 j 4022cc7e +4022cc00: 201110 or a1, a1, a1 +4022cc03: e4df85 call0 402119fc +4022cc06: 121266 bnei a2, 1, 4022cc1c +4022cc09: 013d mov.n a3, a1 +4022cc0b: 020c movi.n a2, 0 +4022cc0d: e6b345 call0 40213744 +4022cc10: 0128 l32i.n a2, a1, 0 +4022cc12: 03f256 bnez a2, 4022cc55 +4022cc15: fca022 movi a2, 252 +4022cc18: 001886 j 4022cc7e +4022cc1b: ddc500 excw +4022cc1e: 2266e4 excw +4022cc21: 013d06 j 4022d119 +4022cc24: 120c movi.n a2, 1 +4022cc26: fff8c6 j 4022cc0d +4022cc29: e4dd05 call0 402119fc +4022cc2c: 253266 bnei a2, 3, 4022cc55 +4022cc2f: 022c22 l32i a2, a12, 8 +4022cc32: 013d mov.n a3, a1 +4022cc34: 32e8 l32i.n a14, a2, 12 +4022cc36: 01a022 movi a2, 1 +4022cc39: e6b085 call0 40213744 +4022cc3c: 0128 l32i.n a2, a1, 0 +4022cc3e: 11ee80 slli a14, a14, 8 +4022cc41: 112280 slli a2, a2, 8 +4022cc44: 0129 s32i.n a2, a1, 0 +4022cc46: 0b1e27 beq a14, a2, 4022cc55 +4022cc49: e5eb85 call0 40212b04 +4022cc4c: b95226 beqi a2, 5, 4022cc09 +4022cc4f: fc2216 beqz a2, 4022cc15 +4022cc52: 000946 j 4022cc7b +4022cc55: 0d28 l32i.n a2, a13, 0 +4022cc57: b29c beqz.n a2, 4022cc76 +4022cc59: 0238 l32i.n a3, a2, 0 +4022cc5b: 139c beqz.n a3, 4022cc70 +4022cc5d: 0348 l32i.n a4, a3, 0 +4022cc5f: 0db466 bnei a4, 16, 4022cc70 +4022cc62: 2c48 l32i.n a4, a12, 8 +4022cc64: 2338 l32i.n a3, a3, 8 +4022cc66: 1448 l32i.n a4, a4, 4 +4022cc68: 1338 l32i.n a3, a3, 4 +4022cc6a: 029437 bne a4, a3, 4022cc70 +4022cc6d: ffe246 j 4022cbfa +4022cc70: 172222 l32i a2, a2, 92 +4022cc73: fff806 j 4022cc57 +4022cc76: 0c2d mov.n a2, a12 +4022cc78: faa685 call0 402276e4 +4022cc7b: 742020 extui a2, a2, 0, 8 +4022cc7e: 7108 l32i.n a0, a1, 28 +4022cc80: 61c8 l32i.n a12, a1, 24 +4022cc82: 51d8 l32i.n a13, a1, 20 +4022cc84: 41e8 l32i.n a14, a1, 16 +4022cc86: 20c112 addi a1, a1, 32 +4022cc89: f00d ret.n + ... + +4022cc8c : +4022cc8c: f0c112 addi a1, a1, -16 +4022cc8f: 3109 s32i.n a0, a1, 12 +4022cc91: f4a032 movi a3, 244 +4022cc94: 42bc beqz.n a2, 4022cccc +4022cc96: 0248 l32i.n a4, a2, 0 +4022cc98: 30c466 bnei a4, 32, 4022cccc +4022cc9b: e7a331 l32r a3, 40226b28 +4022cc9e: 0338 l32i.n a3, a3, 0 +4022cca0: c39c beqz.n a3, 4022ccc0 +4022cca2: 0348 l32i.n a4, a3, 0 +4022cca4: 049c beqz.n a4, 4022ccb8 +4022cca6: 0458 l32i.n a5, a4, 0 +4022cca8: 0cc566 bnei a5, 32, 4022ccb8 +4022ccab: 2258 l32i.n a5, a2, 8 +4022ccad: 2448 l32i.n a4, a4, 8 +4022ccaf: 012552 l32i a5, a5, 4 +4022ccb2: 012442 l32i a4, a4, 4 +4022ccb5: 101547 beq a5, a4, 4022ccc9 +4022ccb8: 172332 l32i a3, a3, 92 +4022ccbb: fff846 j 4022cca0 +4022ccbe: 450000 extui a0, a0, 16, 5 +4022ccc1: 0119 s32i.n a1, a1, 0 +4022ccc3: 743020 extui a3, a2, 0, 8 +4022ccc6: 000086 j 4022cccc +4022ccc9: f1a032 movi a3, 241 +4022cccc: 3108 l32i.n a0, a1, 12 +4022ccce: 032d mov.n a2, a3 +4022ccd0: 10c112 addi a1, a1, 16 +4022ccd3: f00d ret.n +4022ccd5: 000000 ill +4022ccd8: fe8863 excw +4022ccdb: 3f .byte 0x3f + +4022ccdc : +4022ccdc: e0c112 addi a1, a1, -32 +4022ccdf: 51d9 s32i.n a13, a1, 20 +4022cce1: 03dd mov.n a13, a3 +4022cce3: 030c movi.n a3, 0 +4022cce5: 61c9 s32i.n a12, a1, 24 +4022cce7: 41e9 s32i.n a14, a1, 16 +4022cce9: 02cd mov.n a12, a2 +4022cceb: f4e040 extui a14, a4, 0, 16 +4022ccee: 120c movi.n a2, 1 +4022ccf0: 034d mov.n a4, a3 +4022ccf2: 8342d0 moveqz a4, a2, a13 +4022ccf5: 9323e0 movnez a2, a3, a14 +4022ccf8: 7109 s32i.n a0, a1, 28 +4022ccfa: 0139 s32i.n a3, a1, 0 +4022ccfc: 202420 or a2, a4, a2 +4022ccff: 021237 beq a2, a3, 4022cd05 +4022cd02: 002ac6 j 4022cdb1 +4022cd05: 029c37 bne a12, a3, 4022cd0b +4022cd08: 002946 j 4022cdb1 +4022cd0b: 013d mov.n a3, a1 +4022cd0d: 202cc0 or a2, a12, a12 +4022cd10: ffe385 call0 4022cb4c +4022cd13: 09a216 beqz a2, 4022cdb1 +4022cd16: 420c movi.n a2, 4 +4022cd18: 0c48 l32i.n a4, a12, 0 +4022cd1a: 1c29 s32i.n a2, a12, 4 +4022cd1c: 023d mov.n a3, a2 +4022cd1e: 12b426 beqi a4, 16, 4022cd34 +4022cd21: 02c426 beqi a4, 32, 4022cd27 +4022cd24: 002246 j 4022cdb1 +4022cd27: 0128 l32i.n a2, a1, 0 +4022cd29: 0e4d mov.n a4, a14 +4022cd2b: 0d3d mov.n a3, a13 +4022cd2d: 00f945 call0 4022dcc4 +4022cd30: 001dc6 j 4022cdab +4022cd33: 012800 slli a2, a8, 32 +4022cd36: 480242 l8ui a4, a2, 72 +4022cd39: 074416 beqz a4, 4022cdb1 +4022cd3c: 132242 l32i a4, a2, 76 +4022cd3f: 1d8347 bany a3, a4, 4022cd60 +4022cd42: 6248 l32i.n a4, a2, 24 +4022cd44: 030c movi.n a3, 0 +4022cd46: a48c beqz.n a4, 4022cd54 +4022cd48: 331b addi.n a3, a3, 1 +4022cd4a: 4448 l32i.n a4, a4, 16 +4022cd4c: 743030 extui a3, a3, 0, 8 +4022cd4f: fffcc6 j 4022cd46 +4022cd52: 420000 excw +4022cd55: 223002 excw +4022cd58: 47f9a0 excw +4022cd5b: 8656b3 excw +4022cd5e: 280002 l8ui a0, a0, 40 +4022cd61: 123212 excw +4022cd64: 223a add.n a2, a2, a3 +4022cd66: f6f9a0 excw +4022cd69: 314883 excw +4022cd6c: ffdb addi.n a15, a15, 13 +4022cd6e: 8fa142 movi a4, 0x18f +4022cd71: 421c movi.n a2, 20 +4022cd73: 54b701 l32r a0, 40202050 +4022cd76: 0000c0 callx0 a0 +4022cd79: 02cd mov.n a12, a2 +4022cd7b: ffa022 movi a2, 255 +4022cd7e: 2cbc beqz.n a12, 4022cdb4 +4022cd80: 0128 l32i.n a2, a1, 0 +4022cd82: 0c3d mov.n a3, a12 +4022cd84: 18c222 addi a2, a2, 24 +4022cd87: 0cd9 s32i.n a13, a12, 0 +4022cd89: 1cd9 s32i.n a13, a12, 4 +4022cd8b: 045ce2 s16i a14, a12, 8 +4022cd8e: 055ce2 s16i a14, a12, 10 +4022cd91: ffd9c5 call0 4022cb30 +4022cd94: 0128 l32i.n a2, a1, 0 +4022cd96: 7238 l32i.n a3, a2, 28 +4022cd98: 13cc bnez.n a3, 4022cd9d +4022cd9a: 0762c2 s32i a12, a2, 28 +4022cd9d: 132232 l32i a3, a2, 76 +4022cda0: 046327 bbci a3, 2, 4022cda8 +4022cda3: 030c movi.n a3, 0 +4022cda5: 484232 s8i a3, a2, 72 +4022cda8: fa4f85 call0 402272a4 +4022cdab: 742020 extui a2, a2, 0, 8 +4022cdae: 000086 j 4022cdb4 +4022cdb1: f4a022 movi a2, 244 +4022cdb4: 7108 l32i.n a0, a1, 28 +4022cdb6: 61c8 l32i.n a12, a1, 24 +4022cdb8: 51d8 l32i.n a13, a1, 20 +4022cdba: 41e8 l32i.n a14, a1, 16 +4022cdbc: 20c112 addi a1, a1, 32 +4022cdbf: f00d ret.n +4022cdc1: 000000 ill + +4022cdc4 : +4022cdc4: e0c112 addi a1, a1, -32 +4022cdc7: 51d9 s32i.n a13, a1, 20 +4022cdc9: 03dd mov.n a13, a3 +4022cdcb: 030c movi.n a3, 0 +4022cdcd: 61c9 s32i.n a12, a1, 24 +4022cdcf: 41e9 s32i.n a14, a1, 16 +4022cdd1: 04cd mov.n a12, a4 +4022cdd3: 02ed mov.n a14, a2 +4022cdd5: 034d mov.n a4, a3 +4022cdd7: 120c movi.n a2, 1 +4022cdd9: 8342d0 moveqz a4, a2, a13 +4022cddc: 9323c0 movnez a2, a3, a12 +4022cddf: 7109 s32i.n a0, a1, 28 +4022cde1: 0139 s32i.n a3, a1, 0 +4022cde3: 202420 or a2, a4, a2 +4022cde6: 029237 bne a2, a3, 4022cdec +4022cde9: 059e37 bne a14, a3, 4022cdf2 +4022cdec: 447c movi.n a4, -12 +4022cdee: 001346 j 4022ce3f +4022cdf1: 311000 srai a1, a0, 16 +4022cdf4: 2ee020 excw +4022cdf7: d50520 extui a0, a2, 21, 14 +4022cdfa: ff .byte 0xff +4022cdfb: fed216 beqz a2, 4022cdec +4022cdfe: 002e22 l32i a2, a14, 0 +4022ce01: e7b266 bnei a2, 16, 4022cdec +4022ce04: 0128 l32i.n a2, a1, 0 +4022ce06: f47c movi.n a4, -1 +4022ce08: 1a2222 l32i a2, a2, 104 +4022ce0b: 02bc beqz.n a2, 4022ce3f +4022ce0d: 009245 call0 4022d734 +4022ce10: 040c movi.n a4, 0 +4022ce12: 291247 beq a2, a4, 4022ce3f +4022ce15: 01b2c7 bgeu a2, a12, 4022ce1a +4022ce18: 02cd mov.n a12, a2 +4022ce1a: 002122 l32i a2, a1, 0 +4022ce1d: 204cc0 or a4, a12, a12 +4022ce20: 1a2232 l32i a3, a2, 104 +4022ce23: 0d2d mov.n a2, a13 +4022ce25: 00b845 call0 4022d9ac +4022ce28: 0128 l32i.n a2, a1, 0 +4022ce2a: 1228 l32i.n a2, a2, 4 +4022ce2c: 928c beqz.n a2, 4022ce39 +4022ce2e: 4238 l32i.n a3, a2, 16 +4022ce30: 054366 bnei a3, 4, 4022ce39 +4022ce33: f430c0 extui a3, a12, 0, 16 +4022ce36: fc9a05 call0 402297d8 +4022ce39: 11cc00 slli a12, a12, 16 +4022ce3c: 3140c0 srai a4, a12, 16 +4022ce3f: 7108 l32i.n a0, a1, 28 +4022ce41: 042d mov.n a2, a4 +4022ce43: 61c8 l32i.n a12, a1, 24 +4022ce45: 51d8 l32i.n a13, a1, 20 +4022ce47: 41e8 l32i.n a14, a1, 16 +4022ce49: 20c112 addi a1, a1, 32 +4022ce4c: f00d ret.n + ... + +4022ce50 : +4022ce50: e0c112 addi a1, a1, -32 +4022ce53: 61c9 s32i.n a12, a1, 24 +4022ce55: 02cd mov.n a12, a2 +4022ce57: 020c movi.n a2, 0 +4022ce59: 7109 s32i.n a0, a1, 28 +4022ce5b: 0129 s32i.n a2, a1, 0 +4022ce5d: 049c27 bne a12, a2, 4022ce65 +4022ce60: 427c movi.n a2, -12 +4022ce62: 000906 j 4022ce8a +4022ce65: 013d mov.n a3, a1 +4022ce67: 0c2d mov.n a2, a12 +4022ce69: ffce05 call0 4022cb4c +4022ce6c: ff0216 beqz a2, 4022ce60 +4022ce6f: 0c28 l32i.n a2, a12, 0 +4022ce71: ebb266 bnei a2, 16, 4022ce60 +4022ce74: 0128 l32i.n a2, a1, 0 +4022ce76: 1a2232 l32i a3, a2, 104 +4022ce79: 020c movi.n a2, 0 +4022ce7b: 0b1327 beq a3, a2, 4022ce8a +4022ce7e: 202330 or a2, a3, a3 +4022ce81: 008b05 call0 4022d734 +4022ce84: 112200 slli a2, a2, 16 +4022ce87: 312020 srai a2, a2, 16 +4022ce8a: 7108 l32i.n a0, a1, 28 +4022ce8c: 61c8 l32i.n a12, a1, 24 +4022ce8e: 20c112 addi a1, a1, 32 +4022ce91: f00d ret.n + ... + +4022ce94 : +4022ce94: e0c112 addi a1, a1, -32 +4022ce97: 51d9 s32i.n a13, a1, 20 +4022ce99: 03dd mov.n a13, a3 +4022ce9b: 030c movi.n a3, 0 +4022ce9d: 61c9 s32i.n a12, a1, 24 +4022ce9f: 41e9 s32i.n a14, a1, 16 +4022cea1: 02cd mov.n a12, a2 +4022cea3: f4e040 extui a14, a4, 0, 16 +4022cea6: 120c movi.n a2, 1 +4022cea8: 034d mov.n a4, a3 +4022ceaa: 8342d0 moveqz a4, a2, a13 +4022cead: 9323e0 movnez a2, a3, a14 +4022ceb0: 7109 s32i.n a0, a1, 28 +4022ceb2: 0139 s32i.n a3, a1, 0 +4022ceb4: 202420 or a2, a4, a2 +4022ceb7: 029237 bne a2, a3, 4022cebd +4022ceba: 049c37 bne a12, a3, 4022cec2 +4022cebd: 427c movi.n a2, -12 +4022cebf: 000806 j 4022cee3 +4022cec2: 203110 or a3, a1, a1 +4022cec5: 202cc0 or a2, a12, a12 +4022cec8: ffc805 call0 4022cb4c +4022cecb: fee216 beqz a2, 4022cebd +4022cece: 002c22 l32i a2, a12, 0 +4022ced1: e8c266 bnei a2, 32, 4022cebd +4022ced4: 0128 l32i.n a2, a1, 0 +4022ced6: 0e4d mov.n a4, a14 +4022ced8: 0d3d mov.n a3, a13 +4022ceda: 00c4c5 call0 4022db28 +4022cedd: 112200 slli a2, a2, 16 +4022cee0: 312020 srai a2, a2, 16 +4022cee3: 7108 l32i.n a0, a1, 28 +4022cee5: 61c8 l32i.n a12, a1, 24 +4022cee7: 51d8 l32i.n a13, a1, 20 +4022cee9: 41e8 l32i.n a14, a1, 16 +4022ceeb: 20c112 addi a1, a1, 32 +4022ceee: f00d ret.n + +4022cef0 : +4022cef0: 529421 l32r a2, 40201940 +4022cef3: f0c112 addi a1, a1, -16 +4022cef6: 0020c0 memw +4022cef9: 0228 l32i.n a2, a2, 0 +4022cefb: b4a532 movi a3, 0x5b4 +4022cefe: 3109 s32i.n a0, a1, 12 +4022cf00: 53f301 l32r a0, 40201ecc +4022cf03: 0000c0 callx0 a0 +4022cf06: 3108 l32i.n a0, a1, 12 +4022cf08: 742020 extui a2, a2, 0, 8 +4022cf0b: 10c112 addi a1, a1, 16 +4022cf0e: f00d ret.n + +4022cf10 : +4022cf10: 744020 extui a4, a2, 0, 8 +4022cf13: 340b addi.n a3, a4, -1 +4022cf15: 743030 extui a3, a3, 0, 8 +4022cf18: e50c movi.n a5, 14 +4022cf1a: f4a022 movi a2, 244 +4022cf1d: 0f3537 bltu a5, a3, 4022cf30 +4022cf20: b4a532 movi a3, 0x5b4 +4022cf23: 822430 mull a2, a4, a3 +4022cf26: 528631 l32r a3, 40201940 +4022cf29: 0020c0 memw +4022cf2c: 0329 s32i.n a2, a3, 0 +4022cf2e: 020c movi.n a2, 0 +4022cf30: f00d ret.n + ... + +4022cf34 : +4022cf34: b4a522 movi a2, 0x5b4 +4022cf37: f00d ret.n +4022cf39: 000000 ill + +4022cf3c : +4022cf3c: e79421 l32r a2, 40226d8c +4022cf3f: 0020c0 memw +4022cf42: 0228 l32i.n a2, a2, 0 +4022cf44: 742020 extui a2, a2, 0, 8 +4022cf47: f00d ret.n +4022cf49: 000000 ill + +4022cf4c : +4022cf4c: 744020 extui a4, a2, 0, 8 +4022cf4f: 340b addi.n a3, a4, -1 +4022cf51: 743030 extui a3, a3, 0, 8 +4022cf54: e50c movi.n a5, 14 +4022cf56: f4a022 movi a2, 244 +4022cf59: 093537 bltu a5, a3, 4022cf66 +4022cf5c: e78c21 l32r a2, 40226d8c +4022cf5f: 0020c0 memw +4022cf62: 0249 s32i.n a4, a2, 0 +4022cf64: 020c movi.n a2, 0 +4022cf66: f00d ret.n + +4022cf68 : +4022cf68: e64221 l32r a2, 40226870 +4022cf6b: 0020c0 memw +4022cf6e: 0228 l32i.n a2, a2, 0 +4022cf70: 742020 extui a2, a2, 0, 8 +4022cf73: f00d ret.n +4022cf75: 000000 ill + +4022cf78 : +4022cf78: 744020 extui a4, a2, 0, 8 +4022cf7b: 340b addi.n a3, a4, -1 +4022cf7d: 743030 extui a3, a3, 0, 8 +4022cf80: b50c movi.n a5, 11 +4022cf82: f4a022 movi a2, 244 +4022cf85: 093537 bltu a5, a3, 4022cf92 +4022cf88: e63a21 l32r a2, 40226870 +4022cf8b: 0020c0 memw +4022cf8e: 0249 s32i.n a4, a2, 0 +4022cf90: 020c movi.n a2, 0 +4022cf92: f00d ret.n + +4022cf94 : +4022cf94: e63621 l32r a2, 4022686c +4022cf97: 0020c0 memw +4022cf9a: 0228 l32i.n a2, a2, 0 +4022cf9c: 742020 extui a2, a2, 0, 8 +4022cf9f: f00d ret.n +4022cfa1: 000000 ill + +4022cfa4 : +4022cfa4: 744020 extui a4, a2, 0, 8 +4022cfa7: 340b addi.n a3, a4, -1 +4022cfa9: 743030 extui a3, a3, 0, 8 +4022cfac: b50c movi.n a5, 11 +4022cfae: f4a022 movi a2, 244 +4022cfb1: 093537 bltu a5, a3, 4022cfbe +4022cfb4: e62e21 l32r a2, 4022686c +4022cfb7: 0020c0 memw +4022cfba: 0249 s32i.n a4, a2, 0 +4022cfbc: 020c movi.n a2, 0 +4022cfbe: f00d ret.n + +4022cfc0 : +4022cfc0: 024d mov.n a4, a2 +4022cfc2: f4a022 movi a2, 244 +4022cfc5: f49c beqz.n a4, 4022cfe8 +4022cfc7: 0438 l32i.n a3, a4, 0 +4022cfc9: 1bc326 beqi a3, 32, 4022cfe8 +4022cfcc: e5ec21 l32r a2, 4022677c +4022cfcf: 0238 l32i.n a3, a2, 0 +4022cfd1: 039c beqz.n a3, 4022cfe5 +4022cfd3: 0328 l32i.n a2, a3, 0 +4022cfd5: 049427 bne a4, a2, 4022cfdd +4022cfd8: 500322 l8ui a2, a3, 80 +4022cfdb: f00d ret.n +4022cfdd: 172332 l32i a3, a3, 92 +4022cfe0: fffb46 j 4022cfd1 +4022cfe3: 220000 excw +4022cfe6: 0df4a0 excw +4022cfe9: 0000f0 excw + +4022cfec : +4022cfec: 025d mov.n a5, a2 +4022cfee: 743030 extui a3, a3, 0, 8 +4022cff1: f4a022 movi a2, 244 +4022cff4: d5ac beqz.n a5, 4022d025 +4022cff6: e76521 l32r a2, 40226d8c +4022cff9: 0020c0 memw +4022cffc: 0248 l32i.n a4, a2, 0 +4022cffe: f4a022 movi a2, 244 +4022d001: 203437 bltu a4, a3, 4022d025 +4022d004: 0548 l32i.n a4, a5, 0 +4022d006: 1bc426 beqi a4, 32, 4022d025 +4022d009: e5dc21 l32r a2, 4022677c +4022d00c: 0248 l32i.n a4, a2, 0 +4022d00e: 049c beqz.n a4, 4022d022 +4022d010: 0428 l32i.n a2, a4, 0 +4022d012: 069527 bne a5, a2, 4022d01c +4022d015: 504432 s8i a3, a4, 80 +4022d018: 020c movi.n a2, 0 +4022d01a: f00d ret.n +4022d01c: 172442 l32i a4, a4, 92 +4022d01f: fffac6 j 4022d00e +4022d022: f4a022 movi a2, 244 +4022d025: f00d ret.n + ... + +4022d028 : +4022d028: 743030 extui a3, a3, 0, 8 +4022d02b: 52ac beqz.n a2, 4022d054 +4022d02d: 840c movi.n a4, 8 +4022d02f: 213437 bltu a4, a3, 4022d054 +4022d032: e6bd41 l32r a4, 40226b28 +4022d035: 0448 l32i.n a4, a4, 0 +4022d037: 949c beqz.n a4, 4022d054 +4022d039: 0458 l32i.n a5, a4, 0 +4022d03b: 0d9257 bne a2, a5, 4022d04c +4022d03e: a58c beqz.n a5, 4022d04c +4022d040: 0258 l32i.n a5, a2, 0 +4022d042: 06b566 bnei a5, 16, 4022d04c +4022d045: 304432 s8i a3, a4, 48 +4022d048: 020c movi.n a2, 0 +4022d04a: f00d ret.n +4022d04c: 172442 l32i a4, a4, 92 +4022d04f: fff906 j 4022d037 +4022d052: 220000 excw +4022d055: 0df4a0 excw +4022d058: 0000f0 excw + ... + +4022d05c : +4022d05c: 024d mov.n a4, a2 +4022d05e: f4a022 movi a2, 244 +4022d061: 348c beqz.n a4, 4022d068 +4022d063: 4439 s32i.n a3, a4, 16 +4022d065: 00a022 movi a2, 0 +4022d068: f00d ret.n + ... + +4022d06c : +4022d06c: 024d mov.n a4, a2 +4022d06e: f4a022 movi a2, 244 +4022d071: b48c beqz.n a4, 4022d080 +4022d073: 2458 l32i.n a5, a4, 8 +4022d075: 758c beqz.n a5, 4022d080 +4022d077: 0448 l32i.n a4, a4, 0 +4022d079: 03c426 beqi a4, 32, 4022d080 +4022d07c: 7539 s32i.n a3, a5, 28 +4022d07e: 020c movi.n a2, 0 +4022d080: f00d ret.n + ... + +4022d084 : +4022d084: 024d mov.n a4, a2 +4022d086: f4a022 movi a2, 244 +4022d089: 448c beqz.n a4, 4022d091 +4022d08b: 2428 l32i.n a2, a4, 8 +4022d08d: 4239 s32i.n a3, a2, 16 +4022d08f: 020c movi.n a2, 0 +4022d091: f00d ret.n + ... + +4022d094 : +4022d094: 024d mov.n a4, a2 +4022d096: f4a022 movi a2, 244 +4022d099: 348c beqz.n a4, 4022d0a0 +4022d09b: 3439 s32i.n a3, a4, 12 +4022d09d: 00a022 movi a2, 0 +4022d0a0: f00d ret.n + ... + +4022d0a4 : +4022d0a4: 024d mov.n a4, a2 +4022d0a6: f4a022 movi a2, 244 +4022d0a9: 448c beqz.n a4, 4022d0b1 +4022d0ab: 2428 l32i.n a2, a4, 8 +4022d0ad: 5239 s32i.n a3, a2, 20 +4022d0af: 020c movi.n a2, 0 +4022d0b1: f00d ret.n + ... + +4022d0b4 : +4022d0b4: 024d mov.n a4, a2 +4022d0b6: f4a022 movi a2, 244 +4022d0b9: 448c beqz.n a4, 4022d0c1 +4022d0bb: 2428 l32i.n a2, a4, 8 +4022d0bd: 6239 s32i.n a3, a2, 24 +4022d0bf: 020c movi.n a2, 0 +4022d0c1: f00d ret.n +4022d0c3: e78400 excw +4022d0c6: fe .byte 0xfe +4022d0c7: 3f .byte 0x3f + +4022d0c8 : +4022d0c8: e0c112 addi a1, a1, -32 +4022d0cb: 51d9 s32i.n a13, a1, 20 +4022d0cd: 41e9 s32i.n a14, a1, 16 +4022d0cf: 7109 s32i.n a0, a1, 28 +4022d0d1: 61c9 s32i.n a12, a1, 24 +4022d0d3: 31f9 s32i.n a15, a1, 12 +4022d0d5: 02dd mov.n a13, a2 +4022d0d7: 20e330 or a14, a3, a3 +4022d0da: 42cc bnez.n a2, 4022d0e2 +4022d0dc: f4a022 movi a2, 244 +4022d0df: 002886 j 4022d185 +4022d0e2: fff8f1 l32r a15, 4022d0c4 +4022d0e5: b4a042 movi a4, 180 +4022d0e8: 030c movi.n a3, 0 +4022d0ea: 0f2d mov.n a2, a15 +4022d0ec: 4fc901 l32r a0, 40201010 <_irom0_text_start> +4022d0ef: 0000c0 callx0 a0 +4022d0f2: 020c movi.n a2, 0 +4022d0f4: 144d22 s8i a2, a13, 20 +4022d0f7: e68c21 l32r a2, 40226b28 +4022d0fa: 02c8 l32i.n a12, a2, 0 +4022d0fc: 0d28 l32i.n a2, a13, 0 +4022d0fe: 0fb226 beqi a2, 16, 4022d111 +4022d101: 73c226 beqi a2, 32, 4022d178 +4022d104: 001cc6 j 4022d17b +4022d107: 2c2200 excw +4022d10a: 1d2715 excw +4022d10d: c20a add.n a12, a2, a0 +4022d10f: 172c movi.n a7, 33 +4022d111: ff3c56 bnez a12, 4022d108 +4022d114: 0018c6 j 4022d17b +4022d117: 320000 excw +4022d11a: 140d excw +4022d11c: 440c movi.n a4, 4 +4022d11e: 903330 addx2 a3, a3, a3 +4022d121: a023f0 addx4 a2, a3, a15 +4022d124: 0c38 l32i.n a3, a12, 0 +4022d126: 1338 l32i.n a3, a3, 4 +4022d128: 0239 s32i.n a3, a2, 0 +4022d12a: 2c38 l32i.n a3, a12, 8 +4022d12c: 1239 s32i.n a3, a2, 4 +4022d12e: 3ccb addi.n a3, a12, 12 +4022d130: 228b addi.n a2, a2, 8 +4022d132: 4fb801 l32r a0, 40201014 <_irom0_text_start+0x4> +4022d135: 0000c0 callx0 a0 +4022d138: 640c22 l8ui a2, a12, 100 +4022d13b: fcf256 bnez a2, 4022d10e +4022d13e: 140d22 l8ui a2, a13, 20 +4022d141: 221b addi.n a2, a2, 1 +4022d143: 144d22 s8i a2, a13, 20 +4022d146: fff106 j 4022d10e +4022d149: 0c2800 excw +4022d14c: 259d27 bne a13, a2, 4022d175 +4022d14f: 140d32 l8ui a3, a13, 20 +4022d152: 440c movi.n a4, 4 +4022d154: 903330 addx2 a3, a3, a3 +4022d157: a023f0 addx4 a2, a3, a15 +4022d15a: 1d38 l32i.n a3, a13, 4 +4022d15c: 0239 s32i.n a3, a2, 0 +4022d15e: 2c38 l32i.n a3, a12, 8 +4022d160: 1239 s32i.n a3, a2, 4 +4022d162: 3ccb addi.n a3, a12, 12 +4022d164: 08c222 addi a2, a2, 8 +4022d167: 4fab01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022d16a: 0000c0 callx0 a0 +4022d16d: 140d22 l8ui a2, a13, 20 +4022d170: 221b addi.n a2, a2, 1 +4022d172: 144d22 s8i a2, a13, 20 +4022d175: 172cc2 l32i a12, a12, 92 +4022d178: fcec56 bnez a12, 4022d14a +4022d17b: 0ef9 s32i.n a15, a14, 0 +4022d17d: 140d22 l8ui a2, a13, 20 +4022d180: f58216 beqz a2, 4022d0dc +4022d183: 020c movi.n a2, 0 +4022d185: 7108 l32i.n a0, a1, 28 +4022d187: 61c8 l32i.n a12, a1, 24 +4022d189: 51d8 l32i.n a13, a1, 20 +4022d18b: 41e8 l32i.n a14, a1, 16 +4022d18d: 31f8 l32i.n a15, a1, 12 +4022d18f: 20c112 addi a1, a1, 32 +4022d192: f00d ret.n + +4022d194 : +4022d194: f0c112 addi a1, a1, -16 +4022d197: 3109 s32i.n a0, a1, 12 +4022d199: f4a032 movi a3, 244 +4022d19c: 42bc beqz.n a2, 4022d1d4 +4022d19e: 0248 l32i.n a4, a2, 0 +4022d1a0: 30b466 bnei a4, 16, 4022d1d4 +4022d1a3: e66131 l32r a3, 40226b28 +4022d1a6: 0338 l32i.n a3, a3, 0 +4022d1a8: c39c beqz.n a3, 4022d1c8 +4022d1aa: 0348 l32i.n a4, a3, 0 +4022d1ac: 049c beqz.n a4, 4022d1c0 +4022d1ae: 0458 l32i.n a5, a4, 0 +4022d1b0: 0cb566 bnei a5, 16, 4022d1c0 +4022d1b3: 2258 l32i.n a5, a2, 8 +4022d1b5: 2448 l32i.n a4, a4, 8 +4022d1b7: 012552 l32i a5, a5, 4 +4022d1ba: 012442 l32i a4, a4, 4 +4022d1bd: 101547 beq a5, a4, 4022d1d1 +4022d1c0: 172332 l32i a3, a3, 92 +4022d1c3: fff846 j 4022d1a8 +4022d1c6: 050000 extui a0, a0, 16, 1 +4022d1c9: 5e .byte 0x5e +4022d1ca: 20fa add.n a2, a0, a15 +4022d1cc: 867430 excw +4022d1cf: 320000 excw +4022d1d2: 08f1a0 excw +4022d1d5: 032d31 l32r a3, 401ede8c <_lit4_end+0xe7b60> +4022d1d8: 10c112 addi a1, a1, 16 +4022d1db: f00d ret.n +4022d1dd: 000000 ill + +4022d1e0 : +4022d1e0: e0c112 addi a1, a1, -32 +4022d1e3: 61c9 s32i.n a12, a1, 24 +4022d1e5: 03cd mov.n a12, a3 +4022d1e7: 030c movi.n a3, 0 +4022d1e9: 7109 s32i.n a0, a1, 28 +4022d1eb: 0139 s32i.n a3, a1, 0 +4022d1ed: 744040 extui a4, a4, 0, 8 +4022d1f0: 0c1237 beq a2, a3, 4022d200 +4022d1f3: 0924f6 bgeui a4, 2, 4022d200 +4022d1f6: 0c1426 beqi a4, 1, 4022d206 +4022d1f9: e56031 l32r a3, 4022677c +4022d1fc: 0338 l32i.n a3, a3, 0 +4022d1fe: 33dc bnez.n a3, 4022d215 +4022d200: f4a022 movi a2, 244 +4022d203: 000806 j 4022d227 +4022d206: 013d mov.n a3, a1 +4022d208: ff9405 call0 4022cb4c +4022d20b: ff1216 beqz a2, 4022d200 +4022d20e: 0128 l32i.n a2, a1, 0 +4022d210: a2c9 s32i.n a12, a2, 40 +4022d212: 000186 j 4022d21c +4022d215: 0348 l32i.n a4, a3, 0 +4022d217: 069247 bne a2, a4, 4022d221 +4022d21a: a3c9 s32i.n a12, a3, 40 +4022d21c: 020c movi.n a2, 0 +4022d21e: 000146 j 4022d227 +4022d221: 172332 l32i a3, a3, 92 +4022d224: fff586 j 4022d1fe +4022d227: 7108 l32i.n a0, a1, 28 +4022d229: 61c8 l32i.n a12, a1, 24 +4022d22b: 20c112 addi a1, a1, 32 +4022d22e: f00d ret.n + +4022d230 : +4022d230: e0c112 addi a1, a1, -32 +4022d233: 61c9 s32i.n a12, a1, 24 +4022d235: 02cd mov.n a12, a2 +4022d237: 020c movi.n a2, 0 +4022d239: 7109 s32i.n a0, a1, 28 +4022d23b: 0129 s32i.n a2, a1, 0 +4022d23d: 059c27 bne a12, a2, 4022d246 +4022d240: f4a022 movi a2, 244 +4022d243: 000ac6 j 4022d272 +4022d246: 0c28 l32i.n a2, a12, 0 +4022d248: f4b266 bnei a2, 16, 4022d240 +4022d24b: 203110 or a3, a1, a1 +4022d24e: 202cc0 or a2, a12, a12 +4022d251: ff8f85 call0 4022cb4c +4022d254: fe8216 beqz a2, 4022d240 +4022d257: 0148 l32i.n a4, a1, 0 +4022d259: 152422 l32i a2, a4, 84 +4022d25c: 62cc bnez.n a2, 4022d266 +4022d25e: 1c38 l32i.n a3, a12, 4 +4022d260: fba022 movi a2, 251 +4022d263: 0b6326 beqi a3, 6, 4022d272 +4022d266: 202440 or a2, a4, a4 +4022d269: 00a032 movi a3, 0 +4022d26c: fa14c5 call0 402273bc +4022d26f: 00a022 movi a2, 0 +4022d272: 7108 l32i.n a0, a1, 28 +4022d274: 61c8 l32i.n a12, a1, 24 +4022d276: 20c112 addi a1, a1, 32 +4022d279: f00d ret.n + ... + +4022d27c : +4022d27c: e0c112 addi a1, a1, -32 +4022d27f: 61c9 s32i.n a12, a1, 24 +4022d281: 02cd mov.n a12, a2 +4022d283: 020c movi.n a2, 0 +4022d285: 7109 s32i.n a0, a1, 28 +4022d287: 0129 s32i.n a2, a1, 0 +4022d289: 059c27 bne a12, a2, 4022d292 +4022d28c: f4a022 movi a2, 244 +4022d28f: 000846 j 4022d2b4 +4022d292: 0c28 l32i.n a2, a12, 0 +4022d294: f4b266 bnei a2, 16, 4022d28c +4022d297: 013d mov.n a3, a1 +4022d299: 202cc0 or a2, a12, a12 +4022d29c: ff8ac5 call0 4022cb4c +4022d29f: fe9216 beqz a2, 4022d28c +4022d2a2: 1c38 l32i.n a3, a12, 4 +4022d2a4: fba022 movi a2, 251 +4022d2a7: 096326 beqi a3, 6, 4022d2b4 +4022d2aa: 0128 l32i.n a2, a1, 0 +4022d2ac: 01a032 movi a3, 1 +4022d2af: fa10c5 call0 402273bc +4022d2b2: 020c movi.n a2, 0 +4022d2b4: 7108 l32i.n a0, a1, 28 +4022d2b6: 61c8 l32i.n a12, a1, 24 +4022d2b8: 20c112 addi a1, a1, 32 +4022d2bb: f00d ret.n +4022d2bd: 000000 ill + +4022d2c0 : +4022d2c0: e0c112 addi a1, a1, -32 +4022d2c3: 51d9 s32i.n a13, a1, 20 +4022d2c5: 02dd mov.n a13, a2 +4022d2c7: 020c movi.n a2, 0 +4022d2c9: 61c9 s32i.n a12, a1, 24 +4022d2cb: 7109 s32i.n a0, a1, 28 +4022d2cd: 0129 s32i.n a2, a1, 0 +4022d2cf: 20c330 or a12, a3, a3 +4022d2d2: 021d27 beq a13, a2, 4022d2d8 +4022d2d5: 059327 bne a3, a2, 4022d2de +4022d2d8: f4a022 movi a2, 244 +4022d2db: 001a46 j 4022d348 +4022d2de: 0d28 l32i.n a2, a13, 0 +4022d2e0: f4b266 bnei a2, 16, 4022d2d8 +4022d2e3: 013d mov.n a3, a1 +4022d2e5: 0d2d mov.n a2, a13 +4022d2e7: ff8645 call0 4022cb4c +4022d2ea: 42bc beqz.n a2, 4022d322 +4022d2ec: 0138 l32i.n a3, a1, 0 +4022d2ee: 1328 l32i.n a2, a3, 4 +4022d2f0: fe4216 beqz a2, 4022d2d8 +4022d2f3: a248 l32i.n a4, a2, 40 +4022d2f5: 34c332 addi a3, a3, 52 +4022d2f8: 3349 s32i.n a4, a3, 12 +4022d2fa: 172242 l32i a4, a2, 92 +4022d2fd: 2349 s32i.n a4, a3, 8 +4022d2ff: 391242 l16ui a4, a2, 114 +4022d302: 3a1222 l16ui a2, a2, 116 +4022d305: 015342 s16i a4, a3, 2 +4022d308: 840c movi.n a4, 8 +4022d30a: 035342 s16i a4, a3, 6 +4022d30d: c04420 sub a4, a4, a2 +4022d310: 025342 s16i a4, a3, 4 +4022d313: 0c2d mov.n a2, a12 +4022d315: 441c movi.n a4, 20 +4022d317: 4f3f01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022d31a: 0000c0 callx0 a0 +4022d31d: 020c movi.n a2, 0 +4022d31f: 000946 j 4022d348 +4022d322: 1d28 l32i.n a2, a13, 4 +4022d324: 928c beqz.n a2, 4022d331 +4022d326: 441c movi.n a4, 20 +4022d328: e72c31 l32r a3, 40226fd8 +4022d32b: 076226 beqi a2, 6, 4022d336 +4022d32e: 000446 j 4022d343 +4022d331: e72831 l32r a3, 40226fd4 +4022d334: 441c movi.n a4, 20 +4022d336: 0c2d mov.n a2, a12 +4022d338: 4f3701 l32r a0, 40201014 <_irom0_text_start+0x4> +4022d33b: 0000c0 callx0 a0 +4022d33e: 020c movi.n a2, 0 +4022d340: 000046 j 4022d345 +4022d343: 427c movi.n a2, -12 +4022d345: 742020 extui a2, a2, 0, 8 +4022d348: 7108 l32i.n a0, a1, 28 +4022d34a: 61c8 l32i.n a12, a1, 24 +4022d34c: 51d8 l32i.n a13, a1, 20 +4022d34e: 20c112 addi a1, a1, 32 +4022d351: f00d ret.n + ... + +4022d354 : +4022d354: e0c112 addi a1, a1, -32 +4022d357: 61c9 s32i.n a12, a1, 24 +4022d359: 74c030 extui a12, a3, 0, 8 +4022d35c: 030c movi.n a3, 0 +4022d35e: 7109 s32i.n a0, a1, 28 +4022d360: 0139 s32i.n a3, a1, 0 +4022d362: 059237 bne a2, a3, 4022d36b +4022d365: f4a022 movi a2, 244 +4022d368: 000f06 j 4022d3a8 +4022d36b: 0238 l32i.n a3, a2, 0 +4022d36d: f4b366 bnei a3, 16, 4022d365 +4022d370: 013d mov.n a3, a1 +4022d372: ff7d85 call0 4022cb4c +4022d375: fec216 beqz a2, 4022d365 +4022d378: 0148 l32i.n a4, a1, 0 +4022d37a: 132432 l32i a3, a4, 76 +4022d37d: 1428 l32i.n a2, a4, 4 +4022d37f: 203c30 or a3, a12, a3 +4022d382: 136432 s32i a3, a4, 76 +4022d385: d29c beqz.n a2, 4022d3a6 +4022d387: 0a6317 bbci a3, 1, 4022d395 +4022d38a: 240252 l8ui a5, a2, 36 +4022d38d: 034c movi.n a3, 64 +4022d38f: 203530 or a3, a5, a3 +4022d392: 244232 s8i a3, a2, 36 +4022d395: 132432 l32i a3, a4, 76 +4022d398: 0a6337 bbci a3, 3, 4022d3a6 +4022d39b: 080242 l8ui a4, a2, 8 +4022d39e: 830c movi.n a3, 8 +4022d3a0: 203430 or a3, a4, a3 +4022d3a3: 084232 s8i a3, a2, 8 +4022d3a6: 020c movi.n a2, 0 +4022d3a8: 7108 l32i.n a0, a1, 28 +4022d3aa: 61c8 l32i.n a12, a1, 24 +4022d3ac: 20c112 addi a1, a1, 32 +4022d3af: f00d ret.n +4022d3b1: 000000 ill + +4022d3b4 : +4022d3b4: e0c112 addi a1, a1, -32 +4022d3b7: 61c9 s32i.n a12, a1, 24 +4022d3b9: 74c030 extui a12, a3, 0, 8 +4022d3bc: 030c movi.n a3, 0 +4022d3be: 7109 s32i.n a0, a1, 28 +4022d3c0: 0139 s32i.n a3, a1, 0 +4022d3c2: 089237 bne a2, a3, 4022d3ce +4022d3c5: f4a022 movi a2, 244 +4022d3c8: 001146 j 4022d411 +4022d3cb: 000000 ill +4022d3ce: 0238 l32i.n a3, a2, 0 +4022d3d0: f1b366 bnei a3, 16, 4022d3c5 +4022d3d3: 013d mov.n a3, a1 +4022d3d5: ff7745 call0 4022cb4c +4022d3d8: fe9216 beqz a2, 4022d3c5 +4022d3db: 0148 l32i.n a4, a1, 0 +4022d3dd: f37c movi.n a3, -1 +4022d3df: 132422 l32i a2, a4, 76 +4022d3e2: 3033c0 xor a3, a3, a12 +4022d3e5: 103320 and a3, a3, a2 +4022d3e8: 1428 l32i.n a2, a4, 4 +4022d3ea: 136432 s32i a3, a4, 76 +4022d3ed: e29c beqz.n a2, 4022d40f +4022d3ef: 0ae337 bbsi a3, 3, 4022d3fd +4022d3f2: 080252 l8ui a5, a2, 8 +4022d3f5: 737c movi.n a3, -9 +4022d3f7: 103530 and a3, a5, a3 +4022d3fa: 084232 s8i a3, a2, 8 +4022d3fd: 132432 l32i a3, a4, 76 +4022d400: 0be317 bbsi a3, 1, 4022d40f +4022d403: 240242 l8ui a4, a2, 36 +4022d406: bfaf32 movi a3, -65 +4022d409: 103430 and a3, a4, a3 +4022d40c: 244232 s8i a3, a2, 36 +4022d40f: 020c movi.n a2, 0 +4022d411: 7108 l32i.n a0, a1, 28 +4022d413: 61c8 l32i.n a12, a1, 24 +4022d415: 20c112 addi a1, a1, 32 +4022d418: f00d ret.n + ... + +4022d41c : +4022d41c: e0c112 addi a1, a1, -32 +4022d41f: 51d9 s32i.n a13, a1, 20 +4022d421: 74d030 extui a13, a3, 0, 8 +4022d424: 030c movi.n a3, 0 +4022d426: 61c9 s32i.n a12, a1, 24 +4022d428: 7109 s32i.n a0, a1, 28 +4022d42a: 0139 s32i.n a3, a1, 0 +4022d42c: 04cd mov.n a12, a4 +4022d42e: 5f1237 beq a2, a3, 4022d491 +4022d431: 5c1437 beq a4, a3, 4022d491 +4022d434: 002232 l32i a3, a2, 0 +4022d437: 56b366 bnei a3, 16, 4022d491 +4022d43a: 203110 or a3, a1, a1 +4022d43d: ff70c5 call0 4022cb4c +4022d440: 04d216 beqz a2, 4022d491 +4022d443: 0128 l32i.n a2, a1, 0 +4022d445: 132232 l32i a3, a2, 76 +4022d448: 456337 bbci a3, 3, 4022d491 +4022d44b: 1238 l32i.n a3, a2, 4 +4022d44d: 020c movi.n a2, 0 +4022d44f: 411327 beq a3, a2, 4022d494 +4022d452: 221d26 beqi a13, 1, 4022d478 +4022d455: 0b1d27 beq a13, a2, 4022d464 +4022d458: 352d66 bnei a13, 2, 4022d491 +4022d45b: 0c28 l32i.n a2, a12, 0 +4022d45d: 296322 s32i a2, a3, 164 +4022d460: 000946 j 4022d489 +4022d463: 0c4800 excw +4022d466: 1124b0 slli a2, a4, 5 +4022d469: c02240 sub a2, a2, a4 +4022d46c: a02240 addx4 a2, a2, a4 +4022d46f: 1122d0 slli a2, a2, 3 +4022d472: 276322 s32i a2, a3, 156 +4022d475: 000406 j 4022d489 +4022d478: 0c48 l32i.n a4, a12, 0 +4022d47a: 1124b0 slli a2, a4, 5 +4022d47d: c02240 sub a2, a2, a4 +4022d480: a02240 addx4 a2, a2, a4 +4022d483: 1122d0 slli a2, a2, 3 +4022d486: 286322 s32i a2, a3, 160 +4022d489: 020c movi.n a2, 0 +4022d48b: 000146 j 4022d494 +4022d48e: 000000 ill +4022d491: f4a022 movi a2, 244 +4022d494: 7108 l32i.n a0, a1, 28 +4022d496: 61c8 l32i.n a12, a1, 24 +4022d498: 51d8 l32i.n a13, a1, 20 +4022d49a: 20c112 addi a1, a1, 32 +4022d49d: f00d ret.n + ... + +4022d4a0 : +4022d4a0: e0c112 addi a1, a1, -32 +4022d4a3: 51d9 s32i.n a13, a1, 20 +4022d4a5: 74d030 extui a13, a3, 0, 8 +4022d4a8: 030c movi.n a3, 0 +4022d4aa: 61c9 s32i.n a12, a1, 24 +4022d4ac: 7109 s32i.n a0, a1, 28 +4022d4ae: 0139 s32i.n a3, a1, 0 +4022d4b0: 04cd mov.n a12, a4 +4022d4b2: 4b1237 beq a2, a3, 4022d501 +4022d4b5: 481437 beq a4, a3, 4022d501 +4022d4b8: 0238 l32i.n a3, a2, 0 +4022d4ba: 43b366 bnei a3, 16, 4022d501 +4022d4bd: 013d mov.n a3, a1 +4022d4bf: ff68c5 call0 4022cb4c +4022d4c2: b2bc beqz.n a2, 4022d501 +4022d4c4: 0128 l32i.n a2, a1, 0 +4022d4c6: 132232 l32i a3, a2, 76 +4022d4c9: 346337 bbci a3, 3, 4022d501 +4022d4cc: 1248 l32i.n a4, a2, 4 +4022d4ce: 020c movi.n a2, 0 +4022d4d0: 301427 beq a4, a2, 4022d504 +4022d4d3: 161d26 beqi a13, 1, 4022d4ed +4022d4d6: 0a1d27 beq a13, a2, 4022d4e4 +4022d4d9: 242d66 bnei a13, 2, 4022d501 +4022d4dc: 292422 l32i a2, a4, 164 +4022d4df: 000586 j 4022d4f9 +4022d4e2: 320000 excw +4022d4e5: 22e8a3 excw +4022d4e8: 462724 excw +4022d4eb: 220001 l32r a0, 401f5cec <_lit4_end+0xef9c0> +4022d4ee: 322824 excw +4022d4f1: 01e8a3 excw +4022d4f4: c05276 excw +4022d4f7: 290000 excw +4022d4fa: 0c0c movi.n a12, 0 +4022d4fc: 00c602 addi a0, a6, 0 +4022d4ff: 220000 excw +4022d502: 08f4a0 excw +4022d505: 61c871 l32r a7, 40205c28 +4022d508: 51d8 l32i.n a13, a1, 20 +4022d50a: 20c112 addi a1, a1, 32 +4022d50d: f00d ret.n + ... + +4022d510 : +4022d510: e0c112 addi a1, a1, -32 +4022d513: 030c movi.n a3, 0 +4022d515: 7109 s32i.n a0, a1, 28 +4022d517: 0139 s32i.n a3, a1, 0 +4022d519: 059237 bne a2, a3, 4022d522 +4022d51c: f4a022 movi a2, 244 +4022d51f: 0007c6 j 4022d542 +4022d522: 0238 l32i.n a3, a2, 0 +4022d524: 08c326 beqi a3, 32, 4022d530 +4022d527: f97d45 call0 40226cfc +4022d52a: 742020 extui a2, a2, 0, 8 +4022d52d: 000446 j 4022d542 +4022d530: 203110 or a3, a1, a1 +4022d533: ff6185 call0 4022cb4c +4022d536: fe2216 beqz a2, 4022d51c +4022d539: 002122 l32i a2, a1, 0 +4022d53c: 008d45 call0 4022de14 +4022d53f: 00a022 movi a2, 0 +4022d542: 7108 l32i.n a0, a1, 28 +4022d544: 20c112 addi a1, a1, 32 +4022d547: f00d ret.n +4022d549: 000000 ill +4022d54c: 00c350 excw +4022d54f: d91c00 excw +4022d552: fe .byte 0xfe +4022d553: 3f .byte 0x3f + +4022d554 : +4022d554: f0c112 addi a1, a1, -16 +4022d557: 21c9 s32i.n a12, a1, 8 +4022d559: fffdc1 l32r a12, 4022d550 +4022d55c: 0161d2 s32i a13, a1, 4 +4022d55f: 036102 s32i a0, a1, 12 +4022d562: ffa3d2 movi a13, 0x3ff +4022d565: 201110 or a1, a1, a1 +4022d568: e21485 call0 4020f6b4 +4022d56b: fff831 l32r a3, 4022d54c +4022d56e: 50dc01 l32r a0, 402018e0 +4022d571: 0000c0 callx0 a0 +4022d574: 023d27 bltu a13, a2, 4022d57a +4022d577: 04d222 addmi a2, a2, 0x400 +4022d57a: 0c48 l32i.n a4, a12, 0 +4022d57c: e51247 beq a2, a4, 4022d565 +4022d57f: 3108 l32i.n a0, a1, 12 +4022d581: 0c29 s32i.n a2, a12, 0 +4022d583: 11d8 l32i.n a13, a1, 4 +4022d585: 21c8 l32i.n a12, a1, 8 +4022d587: 10c112 addi a1, a1, 16 +4022d58a: f00d ret.n + +4022d58c : +4022d58c: 206330 or a6, a3, a3 +4022d58f: f0c112 addi a1, a1, -16 +4022d592: 203440 or a3, a4, a4 +4022d595: 204550 or a4, a5, a5 +4022d598: 025d mov.n a5, a2 +4022d59a: 062d mov.n a2, a6 +4022d59c: 3109 s32i.n a0, a1, 12 +4022d59e: f90385 call0 402265d8 +4022d5a1: 3108 l32i.n a0, a1, 12 +4022d5a3: 10c112 addi a1, a1, 16 +4022d5a6: f00d ret.n + +4022d5a8 : +4022d5a8: e0c112 addi a1, a1, -32 +4022d5ab: dc2b41 l32r a4, 40224658 +4022d5ae: 0661c2 s32i a12, a1, 24 +4022d5b1: 076102 s32i a0, a1, 28 +4022d5b4: 150c movi.n a5, 1 +4022d5b6: 004452 s8i a5, a4, 0 +4022d5b9: 742020 extui a2, a2, 0, 8 +4022d5bc: 04cd mov.n a12, a4 +4022d5be: a3dc bnez.n a3, 4022d5dc +4022d5c0: e3e221 l32r a2, 40226548 +4022d5c3: 013d mov.n a3, a1 +4022d5c5: 0129 s32i.n a2, a1, 0 +4022d5c7: 00a022 movi a2, 0 +4022d5ca: f8f5c5 call0 40226528 +4022d5cd: 120c movi.n a2, 1 +4022d5cf: 013d mov.n a3, a1 +4022d5d1: f8f545 call0 40226528 +4022d5d4: 020c movi.n a2, 0 +4022d5d6: 004c22 s8i a2, a12, 0 +4022d5d9: 000086 j 4022d5df +4022d5dc: f8f485 call0 40226528 +4022d5df: 072102 l32i a0, a1, 28 +4022d5e2: 0621c2 l32i a12, a1, 24 +4022d5e5: 20c112 addi a1, a1, 32 +4022d5e8: 000080 ret + ... + +4022d5ec : +4022d5ec: f0c112 addi a1, a1, -16 +4022d5ef: 742020 extui a2, a2, 0, 8 +4022d5f2: 036102 s32i a0, a1, 12 +4022d5f5: f8f985 call0 40226590 +4022d5f8: 032102 l32i a0, a1, 12 +4022d5fb: 10c112 addi a1, a1, 16 +4022d5fe: 000080 ret +4022d601: 000000 ill +4022d604: 8898 l32i.n a9, a8, 32 +4022d606: fe .byte 0xfe +4022d607: 3f .byte 0x3f +4022d608: 2305f4 excw +4022d60b: c11240 mul16u a1, a2, a4 +4022d60e: 21c9f0 srai a12, a15, 9 +4022d611: 02c8 l32i.n a12, a2, 0 +4022d613: 3109 s32i.n a0, a1, 12 +4022d615: 0833c7 bltu a3, a12, 4022d621 +4022d618: 032242 l32i a4, a2, 12 +4022d61b: 802c40 add a2, a12, a4 +4022d61e: 133327 bltu a3, a2, 4022d635 +4022d621: fff831 l32r a3, 4022d604 +4022d624: fff921 l32r a2, 4022d608 +4022d627: 76a042 movi a4, 118 +4022d62a: 528801 l32r a0, 4020204c +4022d62d: 0000c0 callx0 a0 +4022d630: 020c movi.n a2, 0 +4022d632: 000386 j 4022d644 +4022d635: 231b addi.n a2, a3, 1 +4022d637: c022c0 sub a2, a2, a12 +4022d63a: 043d mov.n a3, a4 +4022d63c: 50a901 l32r a0, 402018e0 +4022d63f: 0000c0 callx0 a0 +4022d642: 2c2a add.n a2, a12, a2 +4022d644: 3108 l32i.n a0, a1, 12 +4022d646: 21c8 l32i.n a12, a1, 8 +4022d648: 10c112 addi a1, a1, 16 +4022d64b: f00d ret.n +4022d64d: 000000 ill +4022d650: fe8863 excw +4022d653: 3f .byte 0x3f + +4022d654 : +4022d654: f0c112 addi a1, a1, -16 +4022d657: 11d9 s32i.n a13, a1, 4 +4022d659: fffdd1 l32r a13, 4022d650 +4022d65c: 01e9 s32i.n a14, a1, 0 +4022d65e: d41c movi.n a4, 29 +4022d660: 02ed mov.n a14, a2 +4022d662: 0d3d mov.n a3, a13 +4022d664: 021c movi.n a2, 16 +4022d666: 21c9 s32i.n a12, a1, 8 +4022d668: 3109 s32i.n a0, a1, 12 +4022d66a: 527901 l32r a0, 40202050 +4022d66d: 0000c0 callx0 a0 +4022d670: 02cd mov.n a12, a2 +4022d672: 020c movi.n a2, 0 +4022d674: 281c27 beq a12, a2, 4022d6a0 +4022d677: 2e1b addi.n a2, a14, 1 +4022d679: 3c29 s32i.n a2, a12, 12 +4022d67b: 042c movi.n a4, 32 +4022d67d: 0d3d mov.n a3, a13 +4022d67f: 527401 l32r a0, 40202050 +4022d682: 0000c0 callx0 a0 +4022d685: 0c29 s32i.n a2, a12, 0 +4022d687: 728c beqz.n a2, 4022d692 +4022d689: 2c29 s32i.n a2, a12, 8 +4022d68b: 1c29 s32i.n a2, a12, 4 +4022d68d: 0c2d mov.n a2, a12 +4022d68f: 000346 j 4022d6a0 +4022d692: 0c2d mov.n a2, a12 +4022d694: 442c movi.n a4, 36 +4022d696: 0d3d mov.n a3, a13 +4022d698: 4f9c01 l32r a0, 40201508 +4022d69b: 0000c0 callx0 a0 +4022d69e: 020c movi.n a2, 0 +4022d6a0: 3108 l32i.n a0, a1, 12 +4022d6a2: 21c8 l32i.n a12, a1, 8 +4022d6a4: 11d8 l32i.n a13, a1, 4 +4022d6a6: 01e8 l32i.n a14, a1, 0 +4022d6a8: 10c112 addi a1, a1, 16 +4022d6ab: f00d ret.n +4022d6ad: 000000 ill + +4022d6b0 : +4022d6b0: 3228 l32i.n a2, a2, 12 +4022d6b2: f00d ret.n + +4022d6b4 : +4022d6b4: 0238 l32i.n a3, a2, 0 +4022d6b6: 2239 s32i.n a3, a2, 8 +4022d6b8: 1239 s32i.n a3, a2, 4 +4022d6ba: f00d ret.n +4022d6bc: fe88c5 call0 4022bf4c +4022d6bf: 3f .byte 0x3f +4022d6c0: 05fc bnez.n a5, 4022d6f4 +4022d6c2: 23 .byte 0x23 +4022d6c3: 40 .byte 0x40 + +4022d6c4 : +4022d6c4: f0c112 addi a1, a1, -16 +4022d6c7: 21c9 s32i.n a12, a1, 8 +4022d6c9: 3109 s32i.n a0, a1, 12 +4022d6cb: 11d9 s32i.n a13, a1, 4 +4022d6cd: 02cd mov.n a12, a2 +4022d6cf: 228c beqz.n a2, 4022d6d5 +4022d6d1: 0228 l32i.n a2, a2, 0 +4022d6d3: 22dc bnez.n a2, 4022d6e9 +4022d6d5: fff931 l32r a3, 4022d6bc +4022d6d8: fffa21 l32r a2, 4022d6c0 +4022d6db: 3aa042 movi a4, 58 +4022d6de: 525b01 l32r a0, 4020204c +4022d6e1: 0000c0 callx0 a0 +4022d6e4: 000806 j 4022d708 +4022d6e7: d10000 mul16s a0, a0, a0 +4022d6ea: ffd9 s32i.n a13, a15, 60 +4022d6ec: 0228 l32i.n a2, a2, 0 +4022d6ee: b43c movi.n a4, 59 +4022d6f0: 0d3d mov.n a3, a13 +4022d6f2: 4f8501 l32r a0, 40201508 +4022d6f5: 0000c0 callx0 a0 +4022d6f8: 0c28 l32i.n a2, a12, 0 +4022d6fa: c43c movi.n a4, 60 +4022d6fc: 0d3d mov.n a3, a13 +4022d6fe: 4f8201 l32r a0, 40201508 +4022d701: 0000c0 callx0 a0 +4022d704: 020c movi.n a2, 0 +4022d706: 0c29 s32i.n a2, a12, 0 +4022d708: 3108 l32i.n a0, a1, 12 +4022d70a: 21c8 l32i.n a12, a1, 8 +4022d70c: 11d8 l32i.n a13, a1, 4 +4022d70e: 10c112 addi a1, a1, 16 +4022d711: f00d ret.n + ... + +4022d714 : +4022d714: 3228 l32i.n a2, a2, 12 +4022d716: 220b addi.n a2, a2, -1 +4022d718: f00d ret.n + ... + +4022d71c : +4022d71c: 1268 l32i.n a6, a2, 4 +4022d71e: 2258 l32i.n a5, a2, 8 +4022d720: 023d mov.n a3, a2 +4022d722: c04560 sub a4, a5, a6 +4022d725: 240b addi.n a2, a4, -1 +4022d727: 053657 bltu a6, a5, 4022d730 +4022d72a: 3328 l32i.n a2, a3, 12 +4022d72c: 220b addi.n a2, a2, -1 +4022d72e: 224a add.n a2, a2, a4 +4022d730: f00d ret.n + ... + +4022d734 : +4022d734: f0c112 addi a1, a1, -16 +4022d737: 3109 s32i.n a0, a1, 12 +4022d739: 21c9 s32i.n a12, a1, 8 +4022d73b: 02cd mov.n a12, a2 +4022d73d: fffdc5 call0 4022d71c +4022d740: 3c38 l32i.n a3, a12, 12 +4022d742: 3108 l32i.n a0, a1, 12 +4022d744: 330b addi.n a3, a3, -1 +4022d746: c02320 sub a2, a3, a2 +4022d749: 21c8 l32i.n a12, a1, 8 +4022d74b: 10c112 addi a1, a1, 16 +4022d74e: f00d ret.n + +4022d750 : +4022d750: f0c112 addi a1, a1, -16 +4022d753: 3109 s32i.n a0, a1, 12 +4022d755: fffc45 call0 4022d71c +4022d758: 030c movi.n a3, 0 +4022d75a: 140c movi.n a4, 1 +4022d75c: 3108 l32i.n a0, a1, 12 +4022d75e: 833420 moveqz a3, a4, a2 +4022d761: 032d mov.n a2, a3 +4022d763: 10c112 addi a1, a1, 16 +4022d766: f00d ret.n + +4022d768 : +4022d768: f0c112 addi a1, a1, -16 +4022d76b: 3109 s32i.n a0, a1, 12 +4022d76d: 21c9 s32i.n a12, a1, 8 +4022d76f: 02cd mov.n a12, a2 +4022d771: fffa85 call0 4022d71c +4022d774: 3c38 l32i.n a3, a12, 12 +4022d776: 3108 l32i.n a0, a1, 12 +4022d778: 330b addi.n a3, a3, -1 +4022d77a: c03320 sub a3, a3, a2 +4022d77d: 140c movi.n a4, 1 +4022d77f: 020c movi.n a2, 0 +4022d781: 832430 moveqz a2, a4, a3 +4022d784: 21c8 l32i.n a12, a1, 8 +4022d786: 10c112 addi a1, a1, 16 +4022d789: f00d ret.n + ... + +4022d78c : +4022d78c: 2228 l32i.n a2, a2, 8 +4022d78e: f00d ret.n + +4022d790 : +4022d790: 1228 l32i.n a2, a2, 4 +4022d792: f00d ret.n +4022d794: fe88b5 excw +4022d797: 3f .byte 0x3f +4022d798: 05ec bnez.n a5, 4022d7bc +4022d79a: 844023 excw +4022d79d: 401060 excw + +4022d7a0 : +4022d7a0: c0c112 addi a1, a1, -64 +4022d7a3: e1c9 s32i.n a12, a1, 56 +4022d7a5: c1e9 s32i.n a14, a1, 48 +4022d7a7: 02c8 l32i.n a12, a2, 0 +4022d7a9: 02ed mov.n a14, a2 +4022d7ab: 3228 l32i.n a2, a2, 12 +4022d7ad: 2139 s32i.n a3, a1, 8 +4022d7af: 1129 s32i.n a2, a1, 4 +4022d7b1: 3c2a add.n a3, a12, a2 +4022d7b3: 0e2d mov.n a2, a14 +4022d7b5: d1d9 s32i.n a13, a1, 52 +4022d7b7: b1f9 s32i.n a15, a1, 44 +4022d7b9: f109 s32i.n a0, a1, 60 +4022d7bb: 04dd mov.n a13, a4 +4022d7bd: 0139 s32i.n a3, a1, 0 +4022d7bf: fff745 call0 4022d734 +4022d7c2: 02fd mov.n a15, a2 +4022d7c4: 59bdf7 bgeu a13, a15, 4022d821 +4022d7c7: 2e28 l32i.n a2, a14, 8 +4022d7c9: 1138 l32i.n a3, a1, 4 +4022d7cb: c022c0 sub a2, a2, a12 +4022d7ce: 22da add.n a2, a2, a13 +4022d7d0: 504401 l32r a0, 402018e0 +4022d7d3: 0000c0 callx0 a0 +4022d7d6: 9c2a add.n a9, a12, a2 +4022d7d8: 0128 l32i.n a2, a1, 0 +4022d7da: 133927 bltu a9, a2, 4022d7f1 +4022d7dd: ffed31 l32r a3, 4022d794 +4022d7e0: ffee21 l32r a2, 4022d798 +4022d7e3: 83a042 movi a4, 131 +4022d7e6: 521901 l32r a0, 4020204c +4022d7e9: 0000c0 callx0 a0 +4022d7ec: 020c movi.n a2, 0 +4022d7ee: 000c46 j 4022d823 +4022d7f1: 0138 l32i.n a3, a1, 0 +4022d7f3: c07fd0 sub a7, a15, a13 +4022d7f6: c02390 sub a2, a3, a9 +4022d7f9: 01b277 bgeu a2, a7, 4022d7fe +4022d7fc: 027d mov.n a7, a2 +4022d7fe: 2138 l32i.n a3, a1, 8 +4022d800: 074d mov.n a4, a7 +4022d802: 092d mov.n a2, a9 +4022d804: 4179 s32i.n a7, a1, 16 +4022d806: 3199 s32i.n a9, a1, 12 +4022d808: ffe501 l32r a0, 4022d79c +4022d80b: 0000c0 callx0 a0 +4022d80e: 4178 l32i.n a7, a1, 16 +4022d810: 3198 l32i.n a9, a1, 12 +4022d812: 628c beqz.n a2, 4022d81c +4022d814: c02290 sub a2, a2, a9 +4022d817: 22da add.n a2, a2, a13 +4022d819: 000186 j 4022d823 +4022d81c: dd7a add.n a13, a13, a7 +4022d81e: ffe886 j 4022d7c4 +4022d821: 0f2d mov.n a2, a15 +4022d823: f108 l32i.n a0, a1, 60 +4022d825: e1c8 l32i.n a12, a1, 56 +4022d827: d1d8 l32i.n a13, a1, 52 +4022d829: c1e8 l32i.n a14, a1, 48 +4022d82b: b1f8 l32i.n a15, a1, 44 +4022d82d: 40c112 addi a1, a1, 64 +4022d830: f00d ret.n +4022d832: a60000 excw +4022d835: fe88 l32i.n a8, a14, 60 +4022d837: 3f .byte 0x3f +4022d838: 2305e4 excw +4022d83b: 05dc40 extui a13, a4, 28, 1 +4022d83e: 23 .byte 0x23 +4022d83f: 40 .byte 0x40 + +4022d840 : +4022d840: d0c112 addi a1, a1, -48 +4022d843: a1c9 s32i.n a12, a1, 40 +4022d845: 02cd mov.n a12, a2 +4022d847: 81e9 s32i.n a14, a1, 32 +4022d849: 3228 l32i.n a2, a2, 12 +4022d84b: 0ce8 l32i.n a14, a12, 0 +4022d84d: 91d9 s32i.n a13, a1, 36 +4022d84f: 71f9 s32i.n a15, a1, 28 +4022d851: b109 s32i.n a0, a1, 44 +4022d853: 03fd mov.n a15, a3 +4022d855: ee2a add.n a14, a14, a2 +4022d857: 20d440 or a13, a4, a4 +4022d85a: 02b247 bgeu a2, a4, 4022d860 +4022d85d: 20d220 or a13, a2, a2 +4022d860: 0c2d mov.n a2, a12 +4022d862: ffeb85 call0 4022d71c +4022d865: 027d mov.n a7, a2 +4022d867: 060c movi.n a6, 0 +4022d869: 4516d7 beq a6, a13, 4022d8b2 +4022d86c: 1c28 l32i.n a2, a12, 4 +4022d86e: 0b32e7 bltu a2, a14, 4022d87d +4022d871: 96a042 movi a4, 150 +4022d874: fff031 l32r a3, 4022d834 +4022d877: fff021 l32r a2, 4022d838 +4022d87a: 001506 j 4022d8d2 +4022d87d: c03e20 sub a3, a14, a2 +4022d880: c05d60 sub a5, a13, a6 +4022d883: 01b357 bgeu a3, a5, 4022d888 +4022d886: 035d mov.n a5, a3 +4022d888: 054d mov.n a4, a5 +4022d88a: 0f3d mov.n a3, a15 +4022d88c: 2159 s32i.n a5, a1, 8 +4022d88e: 0169 s32i.n a6, a1, 0 +4022d890: 1179 s32i.n a7, a1, 4 +4022d892: 4ddf01 l32r a0, 40201010 <_irom0_text_start> +4022d895: 0000c0 callx0 a0 +4022d898: 1c28 l32i.n a2, a12, 4 +4022d89a: 2158 l32i.n a5, a1, 8 +4022d89c: 0168 l32i.n a6, a1, 0 +4022d89e: 225a add.n a2, a2, a5 +4022d8a0: 1c29 s32i.n a2, a12, 4 +4022d8a2: 665a add.n a6, a6, a5 +4022d8a4: 1178 l32i.n a7, a1, 4 +4022d8a6: bf9e27 bne a14, a2, 4022d869 +4022d8a9: 0c28 l32i.n a2, a12, 0 +4022d8ab: 1c29 s32i.n a2, a12, 4 +4022d8ad: ffee06 j 4022d869 +4022d8b0: 3d0000 excw +4022d8b3: d70d excw +4022d8b5: 3822b7 blt a2, a11, 4022d8f1 +4022d8b8: 2d1c movi.n a13, 18 +4022d8ba: 050c movi.n a5, 0 +4022d8bc: 29ffd5 excw +4022d8bf: 2d2c movi.n a13, 34 +4022d8c1: c50c movi.n a5, 12 +4022d8c3: ffe8 l32i.n a14, a15, 60 +4022d8c5: 0d3d mov.n a3, a13 +4022d8c7: f2cc bnez.n a2, 4022d8da +4022d8c9: ffda31 l32r a3, 4022d834 +4022d8cc: ffdc21 l32r a2, 4022d83c +4022d8cf: a2a042 movi a4, 162 +4022d8d2: 51de01 l32r a0, 4020204c +4022d8d5: 0000c0 callx0 a0 +4022d8d8: 030c movi.n a3, 0 +4022d8da: b108 l32i.n a0, a1, 44 +4022d8dc: 032d mov.n a2, a3 +4022d8de: a1c8 l32i.n a12, a1, 40 +4022d8e0: 91d8 l32i.n a13, a1, 36 +4022d8e2: 81e8 l32i.n a14, a1, 32 +4022d8e4: 71f8 l32i.n a15, a1, 28 +4022d8e6: 30c112 addi a1, a1, 48 +4022d8e9: f00d ret.n +4022d8eb: 888400 excw +4022d8ee: fe .byte 0xfe +4022d8ef: 3f .byte 0x3f +4022d8f0: 2305d4 excw +4022d8f3: 05cc40 extui a12, a4, 28, 1 +4022d8f6: 23 .byte 0x23 +4022d8f7: 40 .byte 0x40 + +4022d8f8 : +4022d8f8: d0c112 addi a1, a1, -48 +4022d8fb: a1c9 s32i.n a12, a1, 40 +4022d8fd: 81e9 s32i.n a14, a1, 32 +4022d8ff: 02cd mov.n a12, a2 +4022d901: 02e8 l32i.n a14, a2, 0 +4022d903: 3228 l32i.n a2, a2, 12 +4022d905: 91d9 s32i.n a13, a1, 36 +4022d907: ee2a add.n a14, a14, a2 +4022d909: 0c2d mov.n a2, a12 +4022d90b: 71f9 s32i.n a15, a1, 28 +4022d90d: b109 s32i.n a0, a1, 44 +4022d90f: 006132 s32i a3, a1, 0 +4022d912: 20f440 or a15, a4, a4 +4022d915: ffe045 call0 4022d71c +4022d918: 027d mov.n a7, a2 +4022d91a: 0d0c movi.n a13, 0 +4022d91c: 441df7 beq a13, a15, 4022d964 +4022d91f: 1c28 l32i.n a2, a12, 4 +4022d921: 0c32e7 bltu a2, a14, 4022d931 +4022d924: b1a042 movi a4, 177 +4022d927: fff131 l32r a3, 4022d8ec +4022d92a: fff121 l32r a2, 4022d8f0 +4022d92d: 0013c6 j 4022d980 +4022d930: 3e2000 excw +4022d933: 5fd0c0 excw +4022d936: b357c0 movgez a5, a7, a12 +4022d939: 035d01 l32r a0, 401ee6b0 <_lit4_end+0xe8384> +4022d93c: 0168 l32i.n a6, a1, 0 +4022d93e: 054d mov.n a4, a5 +4022d940: 36da add.n a3, a6, a13 +4022d942: 2159 s32i.n a5, a1, 8 +4022d944: 1179 s32i.n a7, a1, 4 +4022d946: 4db301 l32r a0, 40201014 <_irom0_text_start+0x4> +4022d949: 0000c0 callx0 a0 +4022d94c: 1c28 l32i.n a2, a12, 4 +4022d94e: 2158 l32i.n a5, a1, 8 +4022d950: 1178 l32i.n a7, a1, 4 +4022d952: 225a add.n a2, a2, a5 +4022d954: 1c29 s32i.n a2, a12, 4 +4022d956: dd5a add.n a13, a13, a5 +4022d958: c09e27 bne a14, a2, 4022d91c +4022d95b: 0c28 l32i.n a2, a12, 0 +4022d95d: 1c29 s32i.n a2, a12, 4 +4022d95f: ffee46 j 4022d91c +4022d962: f70000 excw +4022d965: 3824b7 blt a4, a11, 4022d9a1 +4022d968: 2d1c movi.n a13, 18 +4022d96a: 050c movi.n a5, 0 +4022d96c: ffca add.n a15, a15, a12 +4022d96e: 2c29 s32i.n a2, a12, 8 +4022d970: 0c2d mov.n a2, a12 +4022d972: ffddc5 call0 4022d750 +4022d975: 32dc bnez.n a2, 4022d98c +4022d977: ffdd31 l32r a3, 4022d8ec +4022d97a: ffde21 l32r a2, 4022d8f4 +4022d97d: bda042 movi a4, 189 +4022d980: 51b301 l32r a0, 4020204c +4022d983: 0000c0 callx0 a0 +4022d986: 020c movi.n a2, 0 +4022d988: 000086 j 4022d98e +4022d98b: 1c2800 excw +4022d98e: b108 l32i.n a0, a1, 44 +4022d990: a1c8 l32i.n a12, a1, 40 +4022d992: 91d8 l32i.n a13, a1, 36 +4022d994: 81e8 l32i.n a14, a1, 32 +4022d996: 71f8 l32i.n a15, a1, 28 +4022d998: 30c112 addi a1, a1, 48 +4022d99b: f00d ret.n +4022d99d: 000000 ill +4022d9a0: fe8870 excw +4022d9a3: 3f .byte 0x3f +4022d9a4: 2305c4 excw +4022d9a7: 05bc40 extui a11, a4, 28, 1 +4022d9aa: 23 .byte 0x23 +4022d9ab: 40 .byte 0x40 + +4022d9ac : +4022d9ac: d0c112 addi a1, a1, -48 +4022d9af: 71f9 s32i.n a15, a1, 28 +4022d9b1: 02fd mov.n a15, a2 +4022d9b3: 032d mov.n a2, a3 +4022d9b5: a1c9 s32i.n a12, a1, 40 +4022d9b7: 91d9 s32i.n a13, a1, 36 +4022d9b9: 81e9 s32i.n a14, a1, 32 +4022d9bb: b109 s32i.n a0, a1, 44 +4022d9bd: 03cd mov.n a12, a3 +4022d9bf: 20d440 or a13, a4, a4 +4022d9c2: ffd705 call0 4022d734 +4022d9c5: 02ed mov.n a14, a2 +4022d9c7: 020c movi.n a2, 0 +4022d9c9: 6f3ed7 bltu a14, a13, 4022da3c +4022d9cc: 0c68 l32i.n a6, a12, 0 +4022d9ce: 3c28 l32i.n a2, a12, 12 +4022d9d0: 050c movi.n a5, 0 +4022d9d2: 662a add.n a6, a6, a2 +4022d9d4: 4415d7 beq a5, a13, 4022da1c +4022d9d7: 2c38 l32i.n a3, a12, 8 +4022d9d9: 0c3367 bltu a3, a6, 4022d9e9 +4022d9dc: d0a042 movi a4, 208 +4022d9df: fff031 l32r a3, 4022d9a0 +4022d9e2: fff021 l32r a2, 4022d9a4 +4022d9e5: 001186 j 4022da2f +4022d9e8: 263000 excw +4022d9eb: 7d50c0 excw +4022d9ee: b277c0 excw +4022d9f1: 027d01 l32r a0, 401ee3e8 <_lit4_end+0xe80bc> +4022d9f4: 074d mov.n a4, a7 +4022d9f6: 2f5a add.n a2, a15, a5 +4022d9f8: 0159 s32i.n a5, a1, 0 +4022d9fa: 1169 s32i.n a6, a1, 4 +4022d9fc: 2179 s32i.n a7, a1, 8 +4022d9fe: 4d8501 l32r a0, 40201014 <_irom0_text_start+0x4> +4022da01: 0000c0 callx0 a0 +4022da04: 2c28 l32i.n a2, a12, 8 +4022da06: 2178 l32i.n a7, a1, 8 +4022da08: 0158 l32i.n a5, a1, 0 +4022da0a: 227a add.n a2, a2, a7 +4022da0c: 1168 l32i.n a6, a1, 4 +4022da0e: 2c29 s32i.n a2, a12, 8 +4022da10: 557a add.n a5, a5, a7 +4022da12: be9627 bne a6, a2, 4022d9d4 +4022da15: 0c28 l32i.n a2, a12, 0 +4022da17: 2c29 s32i.n a2, a12, 8 +4022da19: ffedc6 j 4022d9d4 +4022da1c: 0c2d mov.n a2, a12 +4022da1e: ffd145 call0 4022d734 +4022da21: 2d2a add.n a2, a13, a2 +4022da23: 131e27 beq a14, a2, 4022da3a +4022da26: ffde31 l32r a3, 4022d9a0 +4022da29: ffdf21 l32r a2, 4022d9a8 +4022da2c: daa042 movi a4, 218 +4022da2f: 518701 l32r a0, 4020204c +4022da32: 0000c0 callx0 a0 +4022da35: 020c movi.n a2, 0 +4022da37: 000046 j 4022da3c +4022da3a: 2c28 l32i.n a2, a12, 8 +4022da3c: b108 l32i.n a0, a1, 44 +4022da3e: a1c8 l32i.n a12, a1, 40 +4022da40: 91d8 l32i.n a13, a1, 36 +4022da42: 81e8 l32i.n a14, a1, 32 +4022da44: 71f8 l32i.n a15, a1, 28 +4022da46: 30c112 addi a1, a1, 48 +4022da49: f00d ret.n +4022da4b: 886300 excw +4022da4e: fe .byte 0xfe +4022da4f: 3f .byte 0x3f +4022da50: c0c112 addi a1, a1, -64 +4022da53: e1c9 s32i.n a12, a1, 56 +4022da55: d1d9 s32i.n a13, a1, 52 +4022da57: c1e9 s32i.n a14, a1, 48 +4022da59: b1f9 s32i.n a15, a1, 44 +4022da5b: f109 s32i.n a0, a1, 60 +4022da5d: 02cd mov.n a12, a2 +4022da5f: 000522 l8ui a2, a5, 0 +4022da62: f46060 extui a6, a6, 0, 16 +4022da65: 0c4c22 s8i a2, a12, 12 +4022da68: 010522 l8ui a2, a5, 1 +4022da6b: 03fd mov.n a15, a3 +4022da6d: 0d4c22 s8i a2, a12, 13 +4022da70: 020522 l8ui a2, a5, 2 +4022da73: 04dd mov.n a13, a4 +4022da75: 0e4c22 s8i a2, a12, 14 +4022da78: 030522 l8ui a2, a5, 3 +4022da7b: 2c69 s32i.n a6, a12, 8 +4022da7d: 0f4c22 s8i a2, a12, 15 +4022da80: 1c39 s32i.n a3, a12, 4 +4022da82: 20e550 or a14, a5, a5 +4022da85: e3f745 call0 402119fc +4022da88: 121226 beqi a2, 1, 4022da9e +4022da8b: 013d mov.n a3, a1 +4022da8d: 120c movi.n a2, 1 +4022da8f: e5cb45 call0 40213744 +4022da92: 0e38 l32i.n a3, a14, 0 +4022da94: 0128 l32i.n a2, a1, 0 +4022da96: 302320 xor a2, a3, a2 +4022da99: 1138 l32i.n a3, a1, 4 +4022da9b: 060237 bnone a2, a3, 4022daa5 +4022da9e: 013d mov.n a3, a1 +4022daa0: 020c movi.n a2, 0 +4022daa2: e5ca05 call0 40213744 +4022daa5: 0c28 l32i.n a2, a12, 0 +4022daa7: 000132 l8ui a3, a1, 0 +4022daaa: 2228 l32i.n a2, a2, 8 +4022daac: 084232 s8i a3, a2, 8 +4022daaf: 0c28 l32i.n a2, a12, 0 +4022dab1: 010132 l8ui a3, a1, 1 +4022dab4: 2228 l32i.n a2, a2, 8 +4022dab6: 094232 s8i a3, a2, 9 +4022dab9: 0c28 l32i.n a2, a12, 0 +4022dabb: 020132 l8ui a3, a1, 2 +4022dabe: 2228 l32i.n a2, a2, 8 +4022dac0: 0a4232 s8i a3, a2, 10 +4022dac3: 0c28 l32i.n a2, a12, 0 +4022dac5: 030132 l8ui a3, a1, 3 +4022dac8: 2228 l32i.n a2, a2, 8 +4022daca: 0b4232 s8i a3, a2, 11 +4022dacd: 048d16 beqz a13, 4022db19 +4022dad0: 041d22 l16ui a2, a13, 8 +4022dad3: ffde31 l32r a3, 4022da4c +4022dad6: 45a142 movi a4, 0x145 +4022dad9: 221b addi.n a2, a2, 1 +4022dadb: 515d01 l32r a0, 40202050 +4022dade: 0000c0 callx0 a0 +4022dae1: 041d42 l16ui a4, a13, 8 +4022dae4: 023d mov.n a3, a2 +4022dae6: 050c movi.n a5, 0 +4022dae8: 02ed mov.n a14, a2 +4022daea: 0d2d mov.n a2, a13 +4022daec: fb63c5 call0 4022912c +4022daef: 024d mov.n a4, a2 +4022daf1: 1cf9 s32i.n a15, a12, 4 +4022daf3: 0d2d mov.n a2, a13 +4022daf5: 4149 s32i.n a4, a1, 16 +4022daf7: fb2a85 call0 40228da0 +4022dafa: 4148 l32i.n a4, a1, 16 +4022dafc: ffd4d1 l32r a13, 4022da4c +4022daff: 948c beqz.n a4, 4022db0c +4022db01: 0c28 l32i.n a2, a12, 0 +4022db03: 3258 l32i.n a5, a2, 12 +4022db05: 358c beqz.n a5, 4022db0c +4022db07: 0e3d mov.n a3, a14 +4022db09: 0005c0 callx0 a5 +4022db0c: 4ea142 movi a4, 0x14e +4022db0f: 0d3d mov.n a3, a13 +4022db11: 0e2d mov.n a2, a14 +4022db13: 4e7d01 l32r a0, 40201508 +4022db16: 0000c0 callx0 a0 +4022db19: f108 l32i.n a0, a1, 60 +4022db1b: e1c8 l32i.n a12, a1, 56 +4022db1d: d1d8 l32i.n a13, a1, 52 +4022db1f: c1e8 l32i.n a14, a1, 48 +4022db21: b1f8 l32i.n a15, a1, 44 +4022db23: 40c112 addi a1, a1, 64 +4022db26: f00d ret.n + +4022db28 : +4022db28: 1288 l32i.n a8, a2, 4 +4022db2a: b0c112 addi a1, a1, -80 +4022db2d: f44040 extui a4, a4, 0, 16 +4022db30: 1161d2 s32i a13, a1, 68 +4022db33: 1061e2 s32i a14, a1, 64 +4022db36: 136102 s32i a0, a1, 76 +4022db39: 1261c2 s32i a12, a1, 72 +4022db3c: f1f9 s32i.n a15, a1, 60 +4022db3e: 8139 s32i.n a3, a1, 32 +4022db40: 5149 s32i.n a4, a1, 20 +4022db42: 6189 s32i.n a8, a1, 24 +4022db44: 02dd mov.n a13, a2 +4022db46: 02e8 l32i.n a14, a2, 0 +4022db48: 48cc bnez.n a8, 4022db50 +4022db4a: 427c movi.n a2, -12 +4022db4c: 004946 j 4022dc75 +4022db4f: 818800 src a8, a8, a0 +4022db52: ff4816 beqz a8, 4022db4a +4022db55: 5188 l32i.n a8, a1, 20 +4022db57: fef816 beqz a8, 4022db4a +4022db5a: c0a532 movi a3, 0x5c0 +4022db5d: 082d mov.n a2, a8 +4022db5f: 02b387 bgeu a3, a8, 4022db65 +4022db62: c0a522 movi a2, 0x5c0 +4022db65: 00a042 movi a4, 0 +4022db68: f4f020 extui a15, a2, 0, 16 +4022db6b: 203ff0 or a3, a15, a15 +4022db6e: 202440 or a2, a4, a4 +4022db71: fb2a05 call0 40228e14 +4022db74: 02cd mov.n a12, a2 +4022db76: 0c4d mov.n a4, a12 +4022db78: f27c movi.n a2, -1 +4022db7a: 050c movi.n a5, 0 +4022db7c: 0f5c16 beqz a12, 4022dc75 +4022db7f: 1478 l32i.n a7, a4, 4 +4022db81: 052d mov.n a2, a5 +4022db83: c03250 sub a3, a2, a5 +4022db86: 051462 l16ui a6, a4, 10 +4022db89: f43030 extui a3, a3, 0, 16 +4022db8c: 14b367 bgeu a3, a6, 4022dba4 +4022db8f: 8188 l32i.n a8, a1, 32 +4022db91: 621b addi.n a6, a2, 1 +4022db93: 282a add.n a2, a8, a2 +4022db95: 000222 l8ui a2, a2, 0 +4022db98: 373a add.n a3, a7, a3 +4022db9a: 004322 s8i a2, a3, 0 +4022db9d: f42060 extui a2, a6, 0, 16 +4022dba0: fff7c6 j 4022db83 +4022dba3: 044800 extui a4, a0, 8, 1 +4022dba6: 448c beqz.n a4, 4022dbae +4022dba8: 025d mov.n a5, a2 +4022dbaa: fff446 j 4022db7f +4022dbad: 2e2800 excw +4022dbb0: 0288 l32i.n a8, a2, 0 +4022dbb2: 3228 l32i.n a2, a2, 12 +4022dbb4: 9189 s32i.n a8, a1, 36 +4022dbb6: 0129 s32i.n a2, a1, 0 +4022dbb8: 020c movi.n a2, 0 +4022dbba: e6eb45 call0 40214a70 +4022dbbd: 02ed mov.n a14, a2 +4022dbbf: 120c movi.n a2, 1 +4022dbc1: e6eac5 call0 40214a70 +4022dbc4: 4129 s32i.n a2, a1, 16 +4022dbc6: e3e345 call0 402119fc +4022dbc9: 603266 bnei a2, 3, 4022dc2d +4022dbcc: 900c21 l32r a2, 40211bfc +4022dbcf: 000222 l8ui a2, a2, 0 +4022dbd2: 573266 bnei a2, 3, 4022dc2d +4022dbd5: 054e16 beqz a14, 4022dc2d +4022dbd8: 4188 l32i.n a8, a1, 16 +4022dbda: 04f816 beqz a8, 4022dc2d +4022dbdd: 390e22 l8ui a2, a14, 57 +4022dbe0: 496207 bbci a2, 0, 4022dc2d +4022dbe3: 390822 l8ui a2, a8, 57 +4022dbe6: 436207 bbci a2, 0, 4022dc2d +4022dbe9: 0128 l32i.n a2, a1, 0 +4022dbeb: 0e3d mov.n a3, a14 +4022dbed: fab405 call0 40228730 +4022dbf0: 039216 beqz a2, 4022dc2d +4022dbf3: 4138 l32i.n a3, a1, 16 +4022dbf5: 0128 l32i.n a2, a1, 0 +4022dbf7: fab385 call0 40228730 +4022dbfa: 02f216 beqz a2, 4022dc2d +4022dbfd: 040c movi.n a4, 0 +4022dbff: 0f3d mov.n a3, a15 +4022dc01: 042d mov.n a2, a4 +4022dc03: fb2105 call0 40228e14 +4022dc06: 0c3d mov.n a3, a12 +4022dc08: 7129 s32i.n a2, a1, 28 +4022dc0a: fb4645 call0 40229070 +4022dc0d: f39256 bnez a2, 4022db4a +4022dc10: 0e2d mov.n a2, a14 +4022dc12: faec05 call0 40228ad4 +4022dc15: 9188 l32i.n a8, a1, 36 +4022dc17: 7138 l32i.n a3, a1, 28 +4022dc19: 6128 l32i.n a2, a1, 24 +4022dc1b: f45080 extui a5, a8, 0, 16 +4022dc1e: 014d mov.n a4, a1 +4022dc20: febb45 call0 4022c7d8 +4022dc23: 7128 l32i.n a2, a1, 28 +4022dc25: fb1785 call0 40228da0 +4022dc28: 4128 l32i.n a2, a1, 16 +4022dc2a: faea85 call0 40228ad4 +4022dc2d: 092182 l32i a8, a1, 36 +4022dc30: 062122 l32i a2, a1, 24 +4022dc33: f45080 extui a5, a8, 0, 16 +4022dc36: 014d mov.n a4, a1 +4022dc38: 0c3d mov.n a3, a12 +4022dc3a: feb9c5 call0 4022c7d8 +4022dc3d: 02ed mov.n a14, a2 +4022dc3f: 071c22 l16ui a2, a12, 14 +4022dc42: 82ac beqz.n a2, 4022dc6e +4022dc44: 0c2d mov.n a2, a12 +4022dc46: fb1585 call0 40228da0 +4022dc49: 8188 l32i.n a8, a1, 32 +4022dc4b: 264de2 s8i a14, a13, 38 +4022dc4e: 28fa add.n a2, a8, a15 +4022dc50: 5188 l32i.n a8, a1, 20 +4022dc52: 8d29 s32i.n a2, a13, 32 +4022dc54: c028f0 sub a2, a8, a15 +4022dc57: 125d22 s16i a2, a13, 36 +4022dc5a: 030c movi.n a3, 0 +4022dc5c: 0d2d mov.n a2, a13 +4022dc5e: 000285 call0 4022dc88 +4022dc61: 227c movi.n a2, -14 +4022dc63: 0e1ee6 bgei a14, 1, 4022dc75 +4022dc66: 0e2d mov.n a2, a14 +4022dc68: 000246 j 4022dc75 +4022dc6b: 000000 ill +4022dc6e: 0c2d mov.n a2, a12 +4022dc70: fb12c5 call0 40228da0 +4022dc73: c27c movi.n a2, -4 +4022dc75: 132102 l32i a0, a1, 76 +4022dc78: 1221c2 l32i a12, a1, 72 +4022dc7b: 1121d2 l32i a13, a1, 68 +4022dc7e: 1021e2 l32i a14, a1, 64 +4022dc81: f1f8 l32i.n a15, a1, 60 +4022dc83: 50c112 addi a1, a1, 80 +4022dc86: f00d ret.n +4022dc88: f0c112 addi a1, a1, -16 +4022dc8b: 3109 s32i.n a0, a1, 12 +4022dc8d: c2ac beqz.n a2, 4022dcbd +4022dc8f: 121242 l16ui a4, a2, 36 +4022dc92: 74dc bnez.n a4, 4022dcad +4022dc94: 0238 l32i.n a3, a2, 0 +4022dc96: 340c movi.n a4, 3 +4022dc98: 1349 s32i.n a4, a3, 4 +4022dc9a: 260222 l8ui a2, a2, 38 +4022dc9d: c2dc bnez.n a2, 4022dcbd +4022dc9f: 4348 l32i.n a4, a3, 16 +4022dca1: 849c beqz.n a4, 4022dcbd +4022dca3: 032d mov.n a2, a3 +4022dca5: 0004c0 callx0 a4 +4022dca8: 000446 j 4022dcbd +4022dcab: 660000 excw +4022dcae: 380713 excw +4022dcb1: 010582 l8ui a8, a5, 1 +4022dcb4: 010600 slli a0, a6, 32 +4022dcb7: 823800 mull a3, a8, a0 +4022dcba: ffe6c5 call0 4022db28 +4022dcbd: 3108 l32i.n a0, a1, 12 +4022dcbf: 10c112 addi a1, a1, 16 +4022dcc2: f00d ret.n + +4022dcc4 : +4022dcc4: c0c112 addi a1, a1, -64 +4022dcc7: d1d9 s32i.n a13, a1, 52 +4022dcc9: f44040 extui a4, a4, 0, 16 +4022dccc: 12d8 l32i.n a13, a2, 4 +4022dcce: c1e9 s32i.n a14, a1, 48 +4022dcd0: f109 s32i.n a0, a1, 60 +4022dcd2: e1c9 s32i.n a12, a1, 56 +4022dcd4: b1f9 s32i.n a15, a1, 44 +4022dcd6: 4139 s32i.n a3, a1, 16 +4022dcd8: 2149 s32i.n a4, a1, 8 +4022dcda: 02ed mov.n a14, a2 +4022dcdc: 4dcc bnez.n a13, 4022dce4 +4022dcde: 427c movi.n a2, -12 +4022dce0: 004846 j 4022de05 +4022dce3: 418800 srli a8, a0, 8 +4022dce6: ff4816 beqz a8, 4022dcde +4022dce9: 2188 l32i.n a8, a1, 8 +4022dceb: fef816 beqz a8, 4022dcde +4022dcee: c0a532 movi a3, 0x5c0 +4022dcf1: 082d mov.n a2, a8 +4022dcf3: 02b387 bgeu a3, a8, 4022dcf9 +4022dcf6: c0a522 movi a2, 0x5c0 +4022dcf9: 00a042 movi a4, 0 +4022dcfc: f4f020 extui a15, a2, 0, 16 +4022dcff: 203ff0 or a3, a15, a15 +4022dd02: 202440 or a2, a4, a4 +4022dd05: fb10c5 call0 40228e14 +4022dd08: 02cd mov.n a12, a2 +4022dd0a: 0c4d mov.n a4, a12 +4022dd0c: f27c movi.n a2, -1 +4022dd0e: 050c movi.n a5, 0 +4022dd10: 0f1c16 beqz a12, 4022de05 +4022dd13: 1478 l32i.n a7, a4, 4 +4022dd15: 052d mov.n a2, a5 +4022dd17: c03250 sub a3, a2, a5 +4022dd1a: 051462 l16ui a6, a4, 10 +4022dd1d: f43030 extui a3, a3, 0, 16 +4022dd20: 13b367 bgeu a3, a6, 4022dd37 +4022dd23: 4188 l32i.n a8, a1, 16 +4022dd25: 621b addi.n a6, a2, 1 +4022dd27: 282a add.n a2, a8, a2 +4022dd29: 000222 l8ui a2, a2, 0 +4022dd2c: 373a add.n a3, a7, a3 +4022dd2e: 004322 s8i a2, a3, 0 +4022dd31: f42060 extui a2, a6, 0, 16 +4022dd34: fff7c6 j 4022dd17 +4022dd37: 0448 l32i.n a4, a4, 0 +4022dd39: 548c beqz.n a4, 4022dd42 +4022dd3b: 025d mov.n a5, a2 +4022dd3d: fff486 j 4022dd13 +4022dd40: 280000 excw +4022dd43: 0e .byte 0xe +4022dd44: 2238 l32i.n a3, a2, 8 +4022dd46: 0338 l32i.n a3, a3, 0 +4022dd48: 0a5d32 s16i a3, a13, 20 +4022dd4b: 2228 l32i.n a2, a2, 8 +4022dd4d: 3228 l32i.n a2, a2, 12 +4022dd4f: 1d29 s32i.n a2, a13, 4 +4022dd51: 020c movi.n a2, 0 +4022dd53: e6d1c5 call0 40214a70 +4022dd56: 0129 s32i.n a2, a1, 0 +4022dd58: 120c movi.n a2, 1 +4022dd5a: e6d145 call0 40214a70 +4022dd5d: 1129 s32i.n a2, a1, 4 +4022dd5f: e3c9c5 call0 402119fc +4022dd62: 603266 bnei a2, 3, 4022ddc6 +4022dd65: 8fa521 l32r a2, 40211bfc +4022dd68: 000222 l8ui a2, a2, 0 +4022dd6b: 573266 bnei a2, 3, 4022ddc6 +4022dd6e: 0188 l32i.n a8, a1, 0 +4022dd70: 052816 beqz a8, 4022ddc6 +4022dd73: 1188 l32i.n a8, a1, 4 +4022dd75: 04d816 beqz a8, 4022ddc6 +4022dd78: 0188 l32i.n a8, a1, 0 +4022dd7a: 390822 l8ui a2, a8, 57 +4022dd7d: 456207 bbci a2, 0, 4022ddc6 +4022dd80: 1188 l32i.n a8, a1, 4 +4022dd82: 390822 l8ui a2, a8, 57 +4022dd85: 3d6207 bbci a2, 0, 4022ddc6 +4022dd88: 0138 l32i.n a3, a1, 0 +4022dd8a: 1d28 l32i.n a2, a13, 4 +4022dd8c: fa9a05 call0 40228730 +4022dd8f: 033216 beqz a2, 4022ddc6 +4022dd92: 1138 l32i.n a3, a1, 4 +4022dd94: 1d28 l32i.n a2, a13, 4 +4022dd96: fa9985 call0 40228730 +4022dd99: 92ac beqz.n a2, 4022ddc6 +4022dd9b: 040c movi.n a4, 0 +4022dd9d: 0f3d mov.n a3, a15 +4022dd9f: 202440 or a2, a4, a4 +4022dda2: fb0705 call0 40228e14 +4022dda5: 0c3d mov.n a3, a12 +4022dda7: 036122 s32i a2, a1, 12 +4022ddaa: fb2c45 call0 40229070 +4022ddad: f2d256 bnez a2, 4022dcde +4022ddb0: 0128 l32i.n a2, a1, 0 +4022ddb2: fad205 call0 40228ad4 +4022ddb5: 3138 l32i.n a3, a1, 12 +4022ddb7: 0d2d mov.n a2, a13 +4022ddb9: fea645 call0 4022c820 +4022ddbc: 3128 l32i.n a2, a1, 12 +4022ddbe: fafe05 call0 40228da0 +4022ddc1: 1128 l32i.n a2, a1, 4 +4022ddc3: fad105 call0 40228ad4 +4022ddc6: 202dd0 or a2, a13, a13 +4022ddc9: 203cc0 or a3, a12, a12 +4022ddcc: fea505 call0 4022c820 +4022ddcf: 20d220 or a13, a2, a2 +4022ddd2: 071c22 l16ui a2, a12, 14 +4022ddd5: 52ac beqz.n a2, 4022ddfe +4022ddd7: 0c2d mov.n a2, a12 +4022ddd9: fafc45 call0 40228da0 +4022dddc: 4188 l32i.n a8, a1, 16 +4022ddde: 264ed2 s8i a13, a14, 38 +4022dde1: 28fa add.n a2, a8, a15 +4022dde3: 2188 l32i.n a8, a1, 8 +4022dde5: 8e29 s32i.n a2, a14, 32 +4022dde7: c028f0 sub a2, a8, a15 +4022ddea: 125e22 s16i a2, a14, 36 +4022dded: 130c movi.n a3, 1 +4022ddef: 0e2d mov.n a2, a14 +4022ddf1: ffe945 call0 4022dc88 +4022ddf4: 227c movi.n a2, -14 +4022ddf6: 0b1de6 bgei a13, 1, 4022de05 +4022ddf9: 0d2d mov.n a2, a13 +4022ddfb: 000186 j 4022de05 +4022ddfe: 0c2d mov.n a2, a12 +4022de00: faf9c5 call0 40228da0 +4022de03: c27c movi.n a2, -4 +4022de05: f108 l32i.n a0, a1, 60 +4022de07: e1c8 l32i.n a12, a1, 56 +4022de09: d1d8 l32i.n a13, a1, 52 +4022de0b: c1e8 l32i.n a14, a1, 48 +4022de0d: b1f8 l32i.n a15, a1, 44 +4022de0f: 40c112 addi a1, a1, 64 +4022de12: f00d ret.n + +4022de14 : +4022de14: f0c112 addi a1, a1, -16 +4022de17: 0261c2 s32i a12, a1, 8 +4022de1a: 3109 s32i.n a0, a1, 12 +4022de1c: 11d9 s32i.n a13, a1, 4 +4022de1e: 02cd mov.n a12, a2 +4022de20: 022216 beqz a2, 4022de46 +4022de23: 12d8 l32i.n a13, a2, 4 +4022de25: 202dd0 or a2, a13, a13 +4022de28: fe8485 call0 4022c674 +4022de2b: 0d2d mov.n a2, a13 +4022de2d: fe7185 call0 4022c548 +4022de30: e33e21 l32r a2, 40226b28 +4022de33: 0c3d mov.n a3, a12 +4022de35: fecd05 call0 4022cb08 +4022de38: ff0531 l32r a3, 4022da4c +4022de3b: 68a142 movi a4, 0x168 +4022de3e: 0c2d mov.n a2, a12 +4022de40: 4db201 l32r a0, 40201508 +4022de43: 0000c0 callx0 a0 +4022de46: 3108 l32i.n a0, a1, 12 +4022de48: 21c8 l32i.n a12, a1, 8 +4022de4a: 11d8 l32i.n a13, a1, 4 +4022de4c: 10c112 addi a1, a1, 16 +4022de4f: f00d ret.n +4022de51: 000000 ill +4022de54: 22da50 excw +4022de57: 40 .byte 0x40 + +4022de58 : +4022de58: f0c112 addi a1, a1, -16 +4022de5b: 11d9 s32i.n a13, a1, 4 +4022de5d: 01e9 s32i.n a14, a1, 0 +4022de5f: 3109 s32i.n a0, a1, 12 +4022de61: 21c9 s32i.n a12, a1, 8 +4022de63: 02ed mov.n a14, a2 +4022de65: fe6a05 call0 4022c508 +4022de68: 02dd mov.n a13, a2 +4022de6a: ffa022 movi a2, 255 +4022de6d: 047d16 beqz a13, 4022deb8 +4022de70: fef731 l32r a3, 4022da4c +4022de73: 7ca142 movi a4, 0x17c +4022de76: 6ca022 movi a2, 108 +4022de79: 507501 l32r a0, 40202050 +4022de7c: 0000c0 callx0 a0 +4022de7f: 02cd mov.n a12, a2 +4022de81: 92cc bnez.n a2, 4022de8e +4022de83: 0d2d mov.n a2, a13 +4022de85: fe6c05 call0 4022c548 +4022de88: ffa022 movi a2, 255 +4022de8b: 000a46 j 4022deb8 +4022de8e: 203220 or a3, a2, a2 +4022de91: 12d9 s32i.n a13, a2, 4 +4022de93: 0062e2 s32i a14, a2, 0 +4022de96: e32421 l32r a2, 40226b28 +4022de99: fec4c5 call0 4022cae8 +4022de9c: 0c28 l32i.n a2, a12, 0 +4022de9e: da3a31 l32r a3, 40224788 +4022dea1: 2228 l32i.n a2, a2, 8 +4022dea3: 021242 l16ui a4, a2, 4 +4022dea6: 202dd0 or a2, a13, a13 +4022dea9: fe6e05 call0 4022c58c +4022deac: ffea31 l32r a3, 4022de54 +4022deaf: 0d2d mov.n a2, a13 +4022deb1: 0c4d mov.n a4, a12 +4022deb3: fe7d45 call0 4022c688 +4022deb6: 020c movi.n a2, 0 +4022deb8: 3108 l32i.n a0, a1, 12 +4022deba: 21c8 l32i.n a12, a1, 8 +4022debc: 11d8 l32i.n a13, a1, 4 +4022debe: 01e8 l32i.n a14, a1, 0 +4022dec0: 10c112 addi a1, a1, 16 +4022dec3: f00d ret.n +4022dec5: 000000 ill + +4022dec8 : +4022dec8: f0c112 addi a1, a1, -16 +4022decb: 3109 s32i.n a0, a1, 12 +4022decd: 007045 call0 4022e5d4 +4022ded0: 030c movi.n a3, 0 +4022ded2: 140c movi.n a4, 1 +4022ded4: 933420 movnez a3, a4, a2 +4022ded7: 3108 l32i.n a0, a1, 12 +4022ded9: 602030 neg a2, a3 +4022dedc: 742020 extui a2, a2, 0, 8 +4022dedf: 10c112 addi a1, a1, 16 +4022dee2: f00d ret.n + +4022dee4 : +4022dee4: f0c112 addi a1, a1, -16 +4022dee7: 3109 s32i.n a0, a1, 12 +4022dee9: 0062c5 call0 4022e518 +4022deec: 030c movi.n a3, 0 +4022deee: 140c movi.n a4, 1 +4022def0: 933420 movnez a3, a4, a2 +4022def3: 3108 l32i.n a0, a1, 12 +4022def5: 602030 neg a2, a3 +4022def8: 742020 extui a2, a2, 0, 8 +4022defb: 10c112 addi a1, a1, 16 +4022defe: f00d ret.n + +4022df00 : +4022df00: c0c112 addi a1, a1, -64 +4022df03: 0c61e2 s32i a14, a1, 48 +4022df06: 0122e2 l32i a14, a2, 4 +4022df09: 0e61c2 s32i a12, a1, 56 +4022df0c: b1f9 s32i.n a15, a1, 44 +4022df0e: f109 s32i.n a0, a1, 60 +4022df10: d1d9 s32i.n a13, a1, 52 +4022df12: 000ed2 l8ui a13, a14, 0 +4022df15: 02cd mov.n a12, a2 +4022df17: 34d0d0 extui a13, a13, 0, 4 +4022df1a: 11dde0 slli a13, a13, 2 +4022df1d: 6020d0 neg a2, a13 +4022df20: 03fd mov.n a15, a3 +4022df22: 5129 s32i.n a2, a1, 20 +4022df24: 023d mov.n a3, a2 +4022df26: 0c2d mov.n a2, a12 +4022df28: 41d9 s32i.n a13, a1, 16 +4022df2a: fadec5 call0 40228d18 +4022df2d: 156256 bnez a2, 4022e087 +4022df30: 041c22 l16ui a2, a12, 8 +4022df33: 0242f6 bgeui a2, 4, 4022df39 +4022df36: 005346 j 4022e087 +4022df39: 1c58 l32i.n a5, a12, 4 +4022df3b: 000522 l8ui a2, a5, 0 +4022df3e: 063226 beqi a2, 3, 4022df48 +4022df41: 248226 beqi a2, 8, 4022df69 +4022df44: 004fc6 j 4022e087 +4022df47: 052200 extui a2, a0, 18, 1 +4022df4a: 328006 j 4023a94e <_irom0_text_end+0x9dd2> +4022df4d: 052211 l32r a1, 401ef3d8 <_lit4_end+0xe90ac> +4022df50: 232007 blt a0, a0, 4022df77 +4022df53: f21620 excw +4022df56: 1f3212 excw +4022df59: 2718 l32i.n a1, a7, 8 +4022df5b: 860293 excw +4022df5e: 0049 s32i.n a4, a0, 0 +4022df60: 185f22 s16i a2, a15, 48 +4022df63: 004806 j 4022e087 +4022df66: 000000 ill +4022df69: e89f31 l32r a3, 402281e8 +4022df6c: 03d8 l32i.n a13, a3, 0 +4022df6e: 0f3d mov.n a3, a15 +4022df70: 0d2d mov.n a2, a13 +4022df72: fa7bc5 call0 40228730 +4022df75: f0a032 movi a3, 240 +4022df78: 105d30 and a5, a13, a3 +4022df7b: 20af32 movi a3, -224 +4022df7e: 353a add.n a3, a5, a3 +4022df80: 103316 beqz a3, 4022e087 +4022df83: 100256 bnez a2, 4022e087 +4022df86: 041c22 l16ui a2, a12, 8 +4022df89: 0282f6 bgeui a2, 8, 4022df8f +4022df8c: 003dc6 j 4022e087 +4022df8f: 0c2d mov.n a2, a12 +4022df91: 026f45 call0 40230688 +4022df94: 0ef256 bnez a2, 4022e087 +4022df97: 232c movi.n a3, 34 +4022df99: 0c2d mov.n a2, a12 +4022df9b: fad7c5 call0 40228d18 +4022df9e: 037216 beqz a2, 4022dfd9 +4022dfa1: 4138 l32i.n a3, a1, 16 +4022dfa3: 0c2d mov.n a2, a12 +4022dfa5: fad705 call0 40228d18 +4022dfa8: 0db256 bnez a2, 4022e087 +4022dfab: 041c32 l16ui a3, a12, 8 +4022dfae: 040c movi.n a4, 0 +4022dfb0: 220c movi.n a2, 2 +4022dfb2: fae605 call0 40228e14 +4022dfb5: 02dd mov.n a13, a2 +4022dfb7: 0cc216 beqz a2, 4022e087 +4022dfba: 0c3d mov.n a3, a12 +4022dfbc: fb0b05 call0 40229070 +4022dfbf: 0c4256 bnez a2, 4022e087 +4022dfc2: 5138 l32i.n a3, a1, 20 +4022dfc4: 0d2d mov.n a2, a13 +4022dfc6: 012de2 l32i a14, a13, 4 +4022dfc9: fad4c5 call0 40228d18 +4022dfcc: 0b7256 bnez a2, 4022e087 +4022dfcf: 0c2d mov.n a2, a12 +4022dfd1: fadcc5 call0 40228da0 +4022dfd4: 0dcd mov.n a12, a13 +4022dfd6: 0002c6 j 4022dfe5 +4022dfd9: deaf32 movi a3, -34 +4022dfdc: 202cc0 or a2, a12, a12 +4022dfdf: fad385 call0 40228d18 +4022dfe2: 0a1256 bnez a2, 4022e087 +4022dfe5: e88031 l32r a3, 402281e8 +4022dfe8: 012c52 l32i a5, a12, 4 +4022dfeb: 002322 l32i a2, a3, 0 +4022dfee: 743820 extui a3, a2, 8, 8 +4022dff1: 0c4e22 s8i a2, a14, 12 +4022dff4: 0d4e32 s8i a3, a14, 13 +4022dff7: 753020 extui a3, a2, 16, 8 +4022dffa: 752820 extui a2, a2, 24, 8 +4022dffd: 0f4e22 s8i a2, a14, 15 +4022e000: e87b21 l32r a2, 402281ec +4022e003: 0e4e32 s8i a3, a14, 14 +4022e006: 0228 l32i.n a2, a2, 0 +4022e008: 743820 extui a3, a2, 8, 8 +4022e00b: 104e22 s8i a2, a14, 16 +4022e00e: 114e32 s8i a3, a14, 17 +4022e011: 753020 extui a3, a2, 16, 8 +4022e014: 752820 extui a2, a2, 24, 8 +4022e017: 134e22 s8i a2, a14, 19 +4022e01a: 124e32 s8i a3, a14, 18 +4022e01d: 020c movi.n a2, 0 +4022e01f: 004522 s8i a2, a5, 0 +4022e022: 030522 l8ui a2, a5, 3 +4022e025: 020532 l8ui a3, a5, 2 +4022e028: 112280 slli a2, a2, 8 +4022e02b: 202230 or a2, a2, a3 +4022e02e: 637c movi.n a3, -10 +4022e030: f43030 extui a3, a3, 0, 16 +4022e033: 07b327 bgeu a3, a2, 4022e03e +4022e036: 229b addi.n a2, a2, 9 +4022e038: 000106 j 4022e040 +4022e03b: 000000 ill +4022e03e: 228b addi.n a2, a2, 8 +4022e040: f42020 extui a2, a2, 0, 16 +4022e043: 024522 s8i a2, a5, 2 +4022e046: 412820 srli a2, a2, 8 +4022e049: 034522 s8i a2, a5, 3 +4022e04c: 80af22 movi a2, -128 +4022e04f: 084e22 s8i a2, a14, 8 +4022e052: 020c movi.n a2, 0 +4022e054: 0a4e22 s8i a2, a14, 10 +4022e057: 0b4e22 s8i a2, a14, 11 +4022e05a: 431c movi.n a3, 20 +4022e05c: 202ee0 or a2, a14, a14 +4022e05f: 0260c5 call0 4023066c +4022e062: 0a4e22 s8i a2, a14, 10 +4022e065: 4138 l32i.n a3, a1, 16 +4022e067: f42820 extui a2, a2, 8, 16 +4022e06a: 0b4e22 s8i a2, a14, 11 +4022e06d: 0c2d mov.n a2, a12 +4022e06f: faca85 call0 40228d18 +4022e072: 12dc bnez.n a2, 4022e087 +4022e074: 060c movi.n a6, 0 +4022e076: e85c31 l32r a3, 402281e8 +4022e079: 01f9 s32i.n a15, a1, 0 +4022e07b: 170c movi.n a7, 1 +4022e07d: 80a052 movi a5, 128 +4022e080: 064d mov.n a4, a6 +4022e082: 0c2d mov.n a2, a12 +4022e084: fa5dc5 call0 40228664 +4022e087: 0c2d mov.n a2, a12 +4022e089: fad145 call0 40228da0 +4022e08c: f108 l32i.n a0, a1, 60 +4022e08e: e1c8 l32i.n a12, a1, 56 +4022e090: d1d8 l32i.n a13, a1, 52 +4022e092: c1e8 l32i.n a14, a1, 48 +4022e094: b1f8 l32i.n a15, a1, 44 +4022e096: 40c112 addi a1, a1, 64 +4022e099: f00d ret.n + ... + +4022e09c : +4022e09c: c0c112 addi a1, a1, -64 +4022e09f: 025d mov.n a5, a2 +4022e0a1: d1d9 s32i.n a13, a1, 52 +4022e0a3: 040c movi.n a4, 0 +4022e0a5: 74d030 extui a13, a3, 0, 8 +4022e0a8: 120c movi.n a2, 1 +4022e0aa: 432c movi.n a3, 36 +4022e0ac: c1e9 s32i.n a14, a1, 48 +4022e0ae: 4159 s32i.n a5, a1, 16 +4022e0b0: f109 s32i.n a0, a1, 60 +4022e0b2: e1c9 s32i.n a12, a1, 56 +4022e0b4: 0b61f2 s32i a15, a1, 44 +4022e0b7: fad5c5 call0 40228e14 +4022e0ba: 02ed mov.n a14, a2 +4022e0bc: 4158 l32i.n a5, a1, 16 +4022e0be: 073216 beqz a2, 4022e135 +4022e0c1: 12c8 l32i.n a12, a2, 4 +4022e0c3: 320c movi.n a2, 3 +4022e0c5: 15f8 l32i.n a15, a5, 4 +4022e0c7: 014cd2 s8i a13, a12, 1 +4022e0ca: 004c22 s8i a2, a12, 0 +4022e0cd: 1e28 l32i.n a2, a14, 4 +4022e0cf: 0d0c movi.n a13, 0 +4022e0d1: 1538 l32i.n a3, a5, 4 +4022e0d3: c41c movi.n a4, 28 +4022e0d5: 044cd2 s8i a13, a12, 4 +4022e0d8: 054cd2 s8i a13, a12, 5 +4022e0db: 064cd2 s8i a13, a12, 6 +4022e0de: 074cd2 s8i a13, a12, 7 +4022e0e1: 228b addi.n a2, a2, 8 +4022e0e3: 4bcc01 l32r a0, 40201014 <_irom0_text_start+0x4> +4022e0e6: 0000c0 callx0 a0 +4022e0e9: 051e32 l16ui a3, a14, 10 +4022e0ec: 024cd2 s8i a13, a12, 2 +4022e0ef: 034cd2 s8i a13, a12, 3 +4022e0f2: 0c2d mov.n a2, a12 +4022e0f4: 025745 call0 4023066c +4022e0f7: 024c22 s8i a2, a12, 2 +4022e0fa: f42820 extui a2, a2, 8, 16 +4022e0fd: 034c22 s8i a2, a12, 3 +4022e100: 0d0f32 l8ui a3, a15, 13 +4022e103: 0c0f52 l8ui a5, a15, 12 +4022e106: 0e0f22 l8ui a2, a15, 14 +4022e109: 113380 slli a3, a3, 8 +4022e10c: 204350 or a4, a3, a5 +4022e10f: 112200 slli a2, a2, 16 +4022e112: 203240 or a3, a2, a4 +4022e115: 0f0f22 l8ui a2, a15, 15 +4022e118: 170c movi.n a7, 1 +4022e11a: 012280 slli a2, a2, 24 +4022e11d: 202230 or a2, a2, a3 +4022e120: 0129 s32i.n a2, a1, 0 +4022e122: 0d6d mov.n a6, a13 +4022e124: 80a052 movi a5, 128 +4022e127: 014d mov.n a4, a1 +4022e129: 0d3d mov.n a3, a13 +4022e12b: 0e2d mov.n a2, a14 +4022e12d: fa5585 call0 40228688 +4022e130: 0e2d mov.n a2, a14 +4022e132: fac6c5 call0 40228da0 +4022e135: f108 l32i.n a0, a1, 60 +4022e137: e1c8 l32i.n a12, a1, 56 +4022e139: d1d8 l32i.n a13, a1, 52 +4022e13b: c1e8 l32i.n a14, a1, 48 +4022e13d: b1f8 l32i.n a15, a1, 44 +4022e13f: 40c112 addi a1, a1, 64 +4022e142: f00d ret.n +4022e144: d928 l32i.n a2, a9, 52 +4022e146: fe .byte 0xfe +4022e147: 3f .byte 0x3f +4022e148: b0c112 addi a1, a1, -80 +4022e14b: 1161d2 s32i a13, a1, 68 +4022e14e: 20d220 or a13, a2, a2 +4022e151: d98d21 l32r a2, 40224788 +4022e154: 00a042 movi a4, 0 +4022e157: 002222 l32i a2, a2, 0 +4022e15a: f1f9 s32i.n a15, a1, 60 +4022e15c: 5129 s32i.n a2, a1, 20 +4022e15e: 03fd mov.n a15, a3 +4022e160: 042d mov.n a2, a4 +4022e162: 830c movi.n a3, 8 +4022e164: 1061e2 s32i a14, a1, 64 +4022e167: 136102 s32i a0, a1, 76 +4022e16a: 1261c2 s32i a12, a1, 72 +4022e16d: faca45 call0 40228e14 +4022e170: 02ed mov.n a14, a2 +4022e172: 0aa216 beqz a2, 4022e220 +4022e175: 12c8 l32i.n a12, a2, 4 +4022e177: 1d28 l32i.n a2, a13, 4 +4022e179: 1228 l32i.n a2, a2, 4 +4022e17b: 5129 s32i.n a2, a1, 20 +4022e17d: 621c movi.n a2, 22 +4022e17f: 239f27 bne a15, a2, 4022e1a6 +4022e182: 080d22 l8ui a2, a13, 8 +4022e185: 4d8b addi.n a4, a13, 8 +4022e187: 044c22 s8i a2, a12, 4 +4022e18a: 090d22 l8ui a2, a13, 9 +4022e18d: 054c22 s8i a2, a12, 5 +4022e190: 0a0d22 l8ui a2, a13, 10 +4022e193: 064c22 s8i a2, a12, 6 +4022e196: 0b0d22 l8ui a2, a13, 11 +4022e199: 074c22 s8i a2, a12, 7 +4022e19c: 120c movi.n a2, 1 +4022e19e: 0c4d22 s8i a2, a13, 12 +4022e1a1: 0008c6 j 4022e1c8 +4022e1a4: 1c0000 excw +4022e1a7: 040c72 l8ui a7, a12, 4 +4022e1aa: 1a9f27 bne a15, a2, 4022e1c8 +4022e1ad: 080d22 l8ui a2, a13, 8 +4022e1b0: ffe541 l32r a4, 4022e144 +4022e1b3: 044c22 s8i a2, a12, 4 +4022e1b6: 090d22 l8ui a2, a13, 9 +4022e1b9: 054c22 s8i a2, a12, 5 +4022e1bc: 0a0d22 l8ui a2, a13, 10 +4022e1bf: 064c22 s8i a2, a12, 6 +4022e1c2: 0b0d22 l8ui a2, a13, 11 +4022e1c5: 074c22 s8i a2, a12, 7 +4022e1c8: eacf22 addi a2, a15, -22 +4022e1cb: 742020 extui a2, a2, 0, 8 +4022e1ce: 4922f6 bgeui a2, 2, 4022e21b +4022e1d1: 004cf2 s8i a15, a12, 0 +4022e1d4: 00a022 movi a2, 0 +4022e1d7: 0f0c movi.n a15, 0 +4022e1d9: 014c22 s8i a2, a12, 1 +4022e1dc: 024cf2 s8i a15, a12, 2 +4022e1df: 034cf2 s8i a15, a12, 3 +4022e1e2: 830c movi.n a3, 8 +4022e1e4: 0c2d mov.n a2, a12 +4022e1e6: 8149 s32i.n a4, a1, 32 +4022e1e8: 024805 call0 4023066c +4022e1eb: 024c22 s8i a2, a12, 2 +4022e1ee: f42820 extui a2, a2, 8, 16 +4022e1f1: 034c22 s8i a2, a12, 3 +4022e1f4: 94a432 movi a3, 0x494 +4022e1f7: 1d28 l32i.n a2, a13, 4 +4022e1f9: 085132 s16i a3, a1, 16 +4022e1fc: 430c movi.n a3, 4 +4022e1fe: 2139 s32i.n a3, a1, 8 +4022e200: 8148 l32i.n a4, a1, 32 +4022e202: 10c132 addi a3, a1, 16 +4022e205: 1139 s32i.n a3, a1, 4 +4022e207: 0129 s32i.n a2, a1, 0 +4022e209: 270c movi.n a7, 2 +4022e20b: 0f6d mov.n a6, a15 +4022e20d: 150c movi.n a5, 1 +4022e20f: 14c132 addi a3, a1, 20 +4022e212: 202ee0 or a2, a14, a14 +4022e215: 0951f2 s16i a15, a1, 18 +4022e218: fa2305 call0 4022844c +4022e21b: 0e2d mov.n a2, a14 +4022e21d: fab805 call0 40228da0 +4022e220: 132102 l32i a0, a1, 76 +4022e223: 1221c2 l32i a12, a1, 72 +4022e226: 1121d2 l32i a13, a1, 68 +4022e229: 1021e2 l32i a14, a1, 64 +4022e22c: f1f8 l32i.n a15, a1, 60 +4022e22e: 50c112 addi a1, a1, 80 +4022e231: f00d ret.n +4022e233: c11200 mul16u a1, a2, a0 +4022e236: 21c9f0 srai a12, a15, 9 +4022e239: 11d9 s32i.n a13, a1, 4 +4022e23b: 3109 s32i.n a0, a1, 12 +4022e23d: 02cd mov.n a12, a2 +4022e23f: 0d0222 l8ui a2, a2, 13 +4022e242: 20d330 or a13, a3, a3 +4022e245: 0b2226 beqi a2, 2, 4022e254 +4022e248: 221266 bnei a2, 1, 4022e26e +4022e24b: 071c22 l16ui a2, a12, 14 +4022e24e: 002216 beqz a2, 4022e254 +4022e251: 19b327 bgeu a3, a2, 4022e26e +4022e254: 120c movi.n a2, 1 +4022e256: 0c2db6 bltui a13, 2, 4022e266 +4022e259: e14485 call0 4020f6a4 +4022e25c: 3d0b addi.n a3, a13, -1 +4022e25e: 7adb01 l32r a0, 4020cdcc <__wpa_send_eapol+0x390> +4022e261: 0000c0 callx0 a0 +4022e264: 221b addi.n a2, a2, 1 +4022e266: 075c22 s16i a2, a12, 14 +4022e269: 120c movi.n a2, 1 +4022e26b: 0d4c22 s8i a2, a12, 13 +4022e26e: 3108 l32i.n a0, a1, 12 +4022e270: 21c8 l32i.n a12, a1, 8 +4022e272: 11d8 l32i.n a13, a1, 4 +4022e274: 10c112 addi a1, a1, 16 +4022e277: f00d ret.n +4022e279: 000000 ill +4022e27c: d92c movi.n a9, 45 +4022e27e: fe .byte 0xfe +4022e27f: 3f .byte 0x3f +4022e280: 0000e0 excw +4022e283: 00e001 l32r a0, 401ee604 <_lit4_end+0xe82d8> +4022e286: 00 .byte 00 +4022e287: 02 .byte 0x2 + +4022e288 : +4022e288: fffe31 l32r a3, 4022e280 +4022e28b: fffc21 l32r a2, 4022e27c +4022e28e: 0239 s32i.n a3, a2, 0 +4022e290: fffd31 l32r a3, 4022e284 +4022e293: ffac21 l32r a2, 4022e144 +4022e296: 0239 s32i.n a3, a2, 0 +4022e298: f00d ret.n +4022e29a: 300000 xor a0, a0, a0 +4022e29d: fed9 s32i.n a13, a14, 60 +4022e29f: 3f .byte 0x3f +4022e2a0: fe8863 excw +4022e2a3: 3f .byte 0x3f + +4022e2a4 : +4022e2a4: d0c112 addi a1, a1, -48 +4022e2a7: 91d9 s32i.n a13, a1, 36 +4022e2a9: fffcd1 l32r a13, 4022e29c +4022e2ac: a1c9 s32i.n a12, a1, 40 +4022e2ae: 0dc8 l32i.n a12, a13, 0 +4022e2b0: 81e9 s32i.n a14, a1, 32 +4022e2b2: 71f9 s32i.n a15, a1, 28 +4022e2b4: b109 s32i.n a0, a1, 44 +4022e2b6: 02fd mov.n a15, a2 +4022e2b8: 0e0c movi.n a14, 0 +4022e2ba: 042c16 beqz a12, 4022e300 +4022e2bd: 1c28 l32i.n a2, a12, 4 +4022e2bf: 0c58 l32i.n a5, a12, 0 +4022e2c1: 3392f7 bne a2, a15, 4022e2f8 +4022e2c4: 0d28 l32i.n a2, a13, 0 +4022e2c6: 029c27 bne a12, a2, 4022e2cc +4022e2c9: 006d52 s32i a5, a13, 0 +4022e2cc: 0e8c beqz.n a14, 4022e2d0 +4022e2ce: 0e59 s32i.n a5, a14, 0 +4022e2d0: 102f62 l32i a6, a15, 64 +4022e2d3: d68c beqz.n a6, 4022e2e4 +4022e2d5: 0159 s32i.n a5, a1, 0 +4022e2d7: 040c movi.n a4, 0 +4022e2d9: 08cc32 addi a3, a12, 8 +4022e2dc: 202ff0 or a2, a15, a15 +4022e2df: 0006c0 callx0 a6 +4022e2e2: 0158 l32i.n a5, a1, 0 +4022e2e4: ffef31 l32r a3, 4022e2a0 +4022e2e7: 0c2d mov.n a2, a12 +4022e2e9: 10a142 movi a4, 0x110 +4022e2ec: 0159 s32i.n a5, a1, 0 +4022e2ee: 4c8601 l32r a0, 40201508 +4022e2f1: 0000c0 callx0 a0 +4022e2f4: 0158 l32i.n a5, a1, 0 +4022e2f6: 0ecd mov.n a12, a14 +4022e2f8: 0ced mov.n a14, a12 +4022e2fa: 05cd mov.n a12, a5 +4022e2fc: ffee86 j 4022e2ba +4022e2ff: b10800 excw +4022e302: 020c movi.n a2, 0 +4022e304: a1c8 l32i.n a12, a1, 40 +4022e306: 91d8 l32i.n a13, a1, 36 +4022e308: 81e8 l32i.n a14, a1, 32 +4022e30a: 71f8 l32i.n a15, a1, 28 +4022e30c: 30c112 addi a1, a1, 48 +4022e30f: f00d ret.n +4022e311: 000000 ill + +4022e314 : +4022e314: f0c112 addi a1, a1, -16 +4022e317: 11d9 s32i.n a13, a1, 4 +4022e319: 02dd mov.n a13, a2 +4022e31b: ffe021 l32r a2, 4022e29c +4022e31e: 21c9 s32i.n a12, a1, 8 +4022e320: 02c8 l32i.n a12, a2, 0 +4022e322: 3109 s32i.n a0, a1, 12 +4022e324: 0c9c beqz.n a12, 4022e338 +4022e326: 1c28 l32i.n a2, a12, 4 +4022e328: 0692d7 bne a2, a13, 4022e332 +4022e32b: 530c movi.n a3, 5 +4022e32d: 0c2d mov.n a2, a12 +4022e32f: fff045 call0 4022e234 +4022e332: 0cc8 l32i.n a12, a12, 0 +4022e334: fffb06 j 4022e324 +4022e337: 310800 srai a0, a0, 24 +4022e33a: 21c8 l32i.n a12, a1, 8 +4022e33c: 11d8 l32i.n a13, a1, 4 +4022e33e: 10c112 addi a1, a1, 16 +4022e341: f00d ret.n + ... + +4022e344 : +4022e344: ffd641 l32r a4, 4022e29c +4022e347: 0448 l32i.n a4, a4, 0 +4022e349: f48c beqz.n a4, 4022e35c +4022e34b: 1458 l32i.n a5, a4, 4 +4022e34d: f69527 bne a5, a2, 4022e347 +4022e350: 2468 l32i.n a6, a4, 8 +4022e352: 0358 l32i.n a5, a3, 0 +4022e354: ef9657 bne a6, a5, 4022e347 +4022e357: 042d mov.n a2, a4 +4022e359: f00d ret.n +4022e35b: 020c00 excw +4022e35e: f00d ret.n +4022e360: f0c112 addi a1, a1, -16 +4022e363: 21c9 s32i.n a12, a1, 8 +4022e365: 11d9 s32i.n a13, a1, 4 +4022e367: 3109 s32i.n a0, a1, 12 +4022e369: 02dd mov.n a13, a2 +4022e36b: 20c330 or a12, a3, a3 +4022e36e: fffd45 call0 4022e344 +4022e371: b2fc bnez.n a2, 4022e3b0 +4022e373: e62821 l32r a2, 40227c14 +4022e376: ffca31 l32r a3, 4022e2a0 +4022e379: 6228 l32i.n a2, a2, 24 +4022e37b: 050c movi.n a5, 0 +4022e37d: 61a142 movi a4, 0x161 +4022e380: 4c6101 l32r a0, 40201504 +4022e383: 0000c0 callx0 a0 +4022e386: 023d mov.n a3, a2 +4022e388: 020c movi.n a2, 0 +4022e38a: 221327 beq a3, a2, 4022e3b0 +4022e38d: 13d9 s32i.n a13, a3, 4 +4022e38f: 021c27 beq a12, a2, 4022e395 +4022e392: 002c22 l32i a2, a12, 0 +4022e395: 2329 s32i.n a2, a3, 8 +4022e397: 020c movi.n a2, 0 +4022e399: 075322 s16i a2, a3, 14 +4022e39c: 0d4322 s8i a2, a3, 13 +4022e39f: 0c4322 s8i a2, a3, 12 +4022e3a2: 104322 s8i a2, a3, 16 +4022e3a5: ffbd21 l32r a2, 4022e29c +4022e3a8: 0248 l32i.n a4, a2, 0 +4022e3aa: 0239 s32i.n a3, a2, 0 +4022e3ac: 0349 s32i.n a4, a3, 0 +4022e3ae: 032d mov.n a2, a3 +4022e3b0: 3108 l32i.n a0, a1, 12 +4022e3b2: 21c8 l32i.n a12, a1, 8 +4022e3b4: 11d8 l32i.n a13, a1, 4 +4022e3b6: 10c112 addi a1, a1, 16 +4022e3b9: f00d ret.n + ... + +4022e3bc : +4022e3bc: f0c112 addi a1, a1, -16 +4022e3bf: 21c9 s32i.n a12, a1, 8 +4022e3c1: ffaec1 l32r a12, 4022e27c +4022e3c4: 11d9 s32i.n a13, a1, 4 +4022e3c6: 0c3d mov.n a3, a12 +4022e3c8: 036102 s32i a0, a1, 12 +4022e3cb: 02dd mov.n a13, a2 +4022e3cd: fff905 call0 4022e360 +4022e3d0: 0c3d mov.n a3, a12 +4022e3d2: f47c movi.n a4, -1 +4022e3d4: c29c beqz.n a2, 4022e3f4 +4022e3d6: 240c movi.n a4, 2 +4022e3d8: 0d4242 s8i a4, a2, 13 +4022e3db: 100242 l8ui a4, a2, 16 +4022e3de: 441b addi.n a4, a4, 1 +4022e3e0: 104242 s8i a4, a2, 16 +4022e3e3: 102d52 l32i a5, a13, 64 +4022e3e6: 040c movi.n a4, 0 +4022e3e8: 081547 beq a5, a4, 4022e3f4 +4022e3eb: 140c movi.n a4, 1 +4022e3ed: 0d2d mov.n a2, a13 +4022e3ef: 0005c0 callx0 a5 +4022e3f2: 040c movi.n a4, 0 +4022e3f4: 3108 l32i.n a0, a1, 12 +4022e3f6: 042d mov.n a2, a4 +4022e3f8: 21c8 l32i.n a12, a1, 8 +4022e3fa: 11d8 l32i.n a13, a1, 4 +4022e3fc: 10c112 addi a1, a1, 16 +4022e3ff: f00d ret.n +4022e401: 000000 ill + +4022e404 : +4022e404: c0c112 addi a1, a1, -64 +4022e407: d1d9 s32i.n a13, a1, 52 +4022e409: 02dd mov.n a13, a2 +4022e40b: 1228 l32i.n a2, a2, 4 +4022e40d: c1e9 s32i.n a14, a1, 48 +4022e40f: b1f9 s32i.n a15, a1, 44 +4022e411: f109 s32i.n a0, a1, 60 +4022e413: e1c9 s32i.n a12, a1, 56 +4022e415: 03ed mov.n a14, a3 +4022e417: 000232 l8ui a3, a2, 0 +4022e41a: 0d2d mov.n a2, a13 +4022e41c: 343030 extui a3, a3, 0, 4 +4022e41f: 0133e0 slli a3, a3, 18 +4022e422: 603030 neg a3, a3 +4022e425: 313030 srai a3, a3, 16 +4022e428: 04fd mov.n a15, a4 +4022e42a: fa8ec5 call0 40228d18 +4022e42d: 0cb256 bnez a2, 4022e4fc +4022e430: 051d32 l16ui a3, a13, 10 +4022e433: 0283f6 bgeui a3, 8, 4022e439 +4022e436: 003086 j 4022e4fc +4022e439: 1dc8 l32i.n a12, a13, 4 +4022e43b: 0c2d mov.n a2, a12 +4022e43d: 0222c5 call0 4023066c +4022e440: 0b8256 bnez a2, 4022e4fc +4022e443: 203ff0 or a3, a15, a15 +4022e446: 202ee0 or a2, a14, a14 +4022e449: ffef85 call0 4022e344 +4022e44c: 0ac216 beqz a2, 4022e4fc +4022e44f: 000c32 l8ui a3, a12, 0 +4022e452: 141c movi.n a4, 17 +4022e454: 0a1347 beq a3, a4, 4022e462 +4022e457: 641c movi.n a4, 22 +4022e459: 029347 bne a3, a4, 4022e45f +4022e45c: 002246 j 4022e4e9 +4022e45f: 002646 j 4022e4fc +4022e462: 0f88 l32i.n a8, a15, 0 +4022e464: ff86f1 l32r a15, 4022e27c +4022e467: 040c42 l8ui a4, a12, 4 +4022e46a: 0f78 l32i.n a7, a15, 0 +4022e46c: 050c32 l8ui a3, a12, 5 +4022e46f: 060c92 l8ui a9, a12, 6 +4022e472: 070c62 l8ui a6, a12, 7 +4022e475: 449877 bne a8, a7, 4022e4bd +4022e478: 115380 slli a5, a3, 8 +4022e47b: 11a900 slli a10, a9, 16 +4022e47e: 205540 or a5, a5, a4 +4022e481: 205a50 or a5, a10, a5 +4022e484: 01a680 slli a10, a6, 24 +4022e487: 205a50 or a5, a10, a5 +4022e48a: f5ec bnez.n a5, 4022e4bd +4022e48c: 010c22 l8ui a2, a12, 1 +4022e48f: 005256 bnez a2, 4022e498 +4022e492: 0aa022 movi a2, 10 +4022e495: 014c22 s8i a2, a12, 1 +4022e498: ff8121 l32r a2, 4022e29c +4022e49b: 0248 l32i.n a4, a2, 0 +4022e49d: 05b416 beqz a4, 4022e4fc +4022e4a0: 1428 l32i.n a2, a4, 4 +4022e4a2: 129e27 bne a14, a2, 4022e4b8 +4022e4a5: 2438 l32i.n a3, a4, 8 +4022e4a7: 0f28 l32i.n a2, a15, 0 +4022e4a9: 0b1327 beq a3, a2, 4022e4b8 +4022e4ac: 010c32 l8ui a3, a12, 1 +4022e4af: 042d mov.n a2, a4 +4022e4b1: 4149 s32i.n a4, a1, 16 +4022e4b3: ffd805 call0 4022e234 +4022e4b6: 4148 l32i.n a4, a1, 16 +4022e4b8: 0448 l32i.n a4, a4, 0 +4022e4ba: fff7c6 j 4022e49d +4022e4bd: 113380 slli a3, a3, 8 +4022e4c0: 204340 or a4, a3, a4 +4022e4c3: 113900 slli a3, a9, 16 +4022e4c6: 204340 or a4, a3, a4 +4022e4c9: 013680 slli a3, a6, 24 +4022e4cc: 203340 or a3, a3, a4 +4022e4cf: 93ac beqz.n a3, 4022e4fc +4022e4d1: 0b9877 bne a8, a7, 4022e4e0 +4022e4d4: 0139 s32i.n a3, a1, 0 +4022e4d6: 0e2d mov.n a2, a14 +4022e4d8: 203110 or a3, a1, a1 +4022e4db: ffe685 call0 4022e344 +4022e4de: a29c beqz.n a2, 4022e4fc +4022e4e0: 010c32 l8ui a3, a12, 1 +4022e4e3: ffd505 call0 4022e234 +4022e4e6: 000486 j 4022e4fc +4022e4e9: 0d0232 l8ui a3, a2, 13 +4022e4ec: 0c1366 bnei a3, 1, 4022e4fc +4022e4ef: 030c movi.n a3, 0 +4022e4f1: 240c movi.n a4, 2 +4022e4f3: 075232 s16i a3, a2, 14 +4022e4f6: 0d4242 s8i a4, a2, 13 +4022e4f9: 0c4232 s8i a3, a2, 12 +4022e4fc: 202dd0 or a2, a13, a13 +4022e4ff: fa8a05 call0 40228da0 +4022e502: 0f2102 l32i a0, a1, 60 +4022e505: 0e21c2 l32i a12, a1, 56 +4022e508: d1d8 l32i.n a13, a1, 52 +4022e50a: c1e8 l32i.n a14, a1, 48 +4022e50c: b1f8 l32i.n a15, a1, 44 +4022e50e: 40c112 addi a1, a1, 64 +4022e511: f00d ret.n +4022e513: 000300 excw +4022e516: 00 .byte 00 +4022e517: 80 .byte 0x80 + +4022e518 : +4022e518: e0c112 addi a1, a1, -32 +4022e51b: 0348 l32i.n a4, a3, 0 +4022e51d: 61c9 s32i.n a12, a1, 24 +4022e51f: 03cd mov.n a12, a3 +4022e521: f0a032 movi a3, 240 +4022e524: 51d9 s32i.n a13, a1, 20 +4022e526: 7109 s32i.n a0, a1, 28 +4022e528: 41e9 s32i.n a14, a1, 16 +4022e52a: 31f9 s32i.n a15, a1, 12 +4022e52c: 103430 and a3, a4, a3 +4022e52f: e0a052 movi a5, 224 +4022e532: 02dd mov.n a13, a2 +4022e534: a27c movi.n a2, -6 +4022e536: 021357 beq a3, a5, 4022e53c +4022e539: 002146 j 4022e5c2 +4022e53c: ff5021 l32r a2, 4022e27c +4022e53f: 0238 l32i.n a3, a2, 0 +4022e541: a27c movi.n a2, -6 +4022e543: 7b1437 beq a4, a3, 4022e5c2 +4022e546: da9e21 l32r a2, 40224fc0 +4022e549: 02e8 l32i.n a14, a2, 0 +4022e54b: a27c movi.n a2, -6 +4022e54d: 071e16 beqz a14, 4022e5c2 +4022e550: 390e32 l8ui a3, a14, 57 +4022e553: 013380 slli a3, a3, 24 +4022e556: 0603d6 bgez a3, 4022e5ba +4022e559: 8d8c beqz.n a13, 4022e565 +4022e55b: 0d38 l32i.n a3, a13, 0 +4022e55d: 438c beqz.n a3, 4022e565 +4022e55f: 012e42 l32i a4, a14, 4 +4022e562: 549347 bne a3, a4, 4022e5ba +4022e565: 0c3d mov.n a3, a12 +4022e567: 0e2d mov.n a2, a14 +4022e569: ffdf45 call0 4022e360 +4022e56c: 02fd mov.n a15, a2 +4022e56e: 04e216 beqz a2, 4022e5c0 +4022e571: 0d0222 l8ui a2, a2, 13 +4022e574: 82fc bnez.n a2, 4022e5b0 +4022e576: 100f22 l8ui a2, a15, 16 +4022e579: c2cc bnez.n a2, 4022e589 +4022e57b: 102e52 l32i a5, a14, 64 +4022e57e: 758c beqz.n a5, 4022e589 +4022e580: 140c movi.n a4, 1 +4022e582: 0c3d mov.n a3, a12 +4022e584: 0e2d mov.n a2, a14 +4022e586: 0005c0 callx0 a5 +4022e589: 631c movi.n a3, 22 +4022e58b: 0f2d mov.n a2, a15 +4022e58d: ffbb85 call0 4022e148 +4022e590: e11105 call0 4020f6a4 +4022e593: ffe031 l32r a3, 4022e514 +4022e596: 102230 and a2, a2, a3 +4022e599: 0092d6 bgez a2, 4022e5a6 +4022e59c: 220b addi.n a2, a2, -1 +4022e59e: c37c movi.n a3, -4 +4022e5a0: 202230 or a2, a2, a3 +4022e5a3: 01c222 addi a2, a2, 1 +4022e5a6: 221b addi.n a2, a2, 1 +4022e5a8: 075f22 s16i a2, a15, 14 +4022e5ab: 120c movi.n a2, 1 +4022e5ad: 0d4f22 s8i a2, a15, 13 +4022e5b0: 100f22 l8ui a2, a15, 16 +4022e5b3: 221b addi.n a2, a2, 1 +4022e5b5: 104f22 s8i a2, a15, 16 +4022e5b8: 020c movi.n a2, 0 +4022e5ba: 0ee8 l32i.n a14, a14, 0 +4022e5bc: ffe346 j 4022e54d +4022e5bf: f27c00 excw +4022e5c2: 7108 l32i.n a0, a1, 28 +4022e5c4: 61c8 l32i.n a12, a1, 24 +4022e5c6: 51d8 l32i.n a13, a1, 20 +4022e5c8: 41e8 l32i.n a14, a1, 16 +4022e5ca: 31f8 l32i.n a15, a1, 12 +4022e5cc: 20c112 addi a1, a1, 32 +4022e5cf: f00d ret.n +4022e5d1: 000000 ill + +4022e5d4 : +4022e5d4: d0c112 addi a1, a1, -48 +4022e5d7: 0348 l32i.n a4, a3, 0 +4022e5d9: 91d9 s32i.n a13, a1, 36 +4022e5db: 03dd mov.n a13, a3 +4022e5dd: f0a032 movi a3, 240 +4022e5e0: 0129 s32i.n a2, a1, 0 +4022e5e2: b109 s32i.n a0, a1, 44 +4022e5e4: a1c9 s32i.n a12, a1, 40 +4022e5e6: 81e9 s32i.n a14, a1, 32 +4022e5e8: 71f9 s32i.n a15, a1, 28 +4022e5ea: 103430 and a3, a4, a3 +4022e5ed: e0a052 movi a5, 224 +4022e5f0: a27c movi.n a2, -6 +4022e5f2: 021357 beq a3, a5, 4022e5f8 +4022e5f5: 0026c6 j 4022e694 +4022e5f8: ff2121 l32r a2, 4022e27c +4022e5fb: 0238 l32i.n a3, a2, 0 +4022e5fd: a27c movi.n a2, -6 +4022e5ff: 029437 bne a4, a3, 4022e605 +4022e602: 002386 j 4022e694 +4022e605: da6e21 l32r a2, 40224fc0 +4022e608: af7c movi.n a15, -6 +4022e60a: 02e8 l32i.n a14, a2, 0 +4022e60c: 082e16 beqz a14, 4022e692 +4022e60f: 390e22 l8ui a2, a14, 57 +4022e612: 012280 slli a2, a2, 24 +4022e615: 0732d6 bgez a2, 4022e68c +4022e618: 0128 l32i.n a2, a1, 0 +4022e61a: 828c beqz.n a2, 4022e626 +4022e61c: 0228 l32i.n a2, a2, 0 +4022e61e: 428c beqz.n a2, 4022e626 +4022e620: 012e32 l32i a3, a14, 4 +4022e623: 659237 bne a2, a3, 4022e68c +4022e626: 0d3d mov.n a3, a13 +4022e628: 202ee0 or a2, a14, a14 +4022e62b: ffd185 call0 4022e344 +4022e62e: 02cd mov.n a12, a2 +4022e630: 058216 beqz a2, 4022e68c +4022e633: 100222 l8ui a2, a2, 16 +4022e636: 4b22f6 bgeui a2, 2, 4022e685 +4022e639: 0c0c22 l8ui a2, a12, 12 +4022e63c: 528c beqz.n a2, 4022e645 +4022e63e: 731c movi.n a3, 23 +4022e640: 0c2d mov.n a2, a12 +4022e642: ffb045 call0 4022e148 +4022e645: 102e62 l32i a6, a14, 64 +4022e648: 868c beqz.n a6, 4022e654 +4022e64a: 040c movi.n a4, 0 +4022e64c: 0d3d mov.n a3, a13 +4022e64e: 202ee0 or a2, a14, a14 +4022e651: 0006c0 callx0 a6 +4022e654: ff1231 l32r a3, 4022e29c +4022e657: 0328 l32i.n a2, a3, 0 +4022e659: 099c27 bne a12, a2, 4022e666 +4022e65c: 0c28 l32i.n a2, a12, 0 +4022e65e: 0329 s32i.n a2, a3, 0 +4022e660: 000346 j 4022e671 +4022e663: 032d00 excw +4022e666: 728c beqz.n a2, 4022e671 +4022e668: 0238 l32i.n a3, a2, 0 +4022e66a: f69c37 bne a12, a3, 4022e664 +4022e66d: 0c38 l32i.n a3, a12, 0 +4022e66f: 0239 s32i.n a3, a2, 0 +4022e671: ff0b31 l32r a3, 4022e2a0 +4022e674: 91a142 movi a4, 0x191 +4022e677: 202cc0 or a2, a12, a12 +4022e67a: 4ba301 l32r a0, 40201508 +4022e67d: 0000c0 callx0 a0 +4022e680: 000186 j 4022e68a +4022e683: 0b0000 excw +4022e686: 4c2222 l32i a2, a2, 0x130 +4022e689: 0f0c10 excw +4022e68c: 0ee8 l32i.n a14, a14, 0 +4022e68e: ffde86 j 4022e60c +4022e691: 0f2d00 excw +4022e694: b108 l32i.n a0, a1, 44 +4022e696: a1c8 l32i.n a12, a1, 40 +4022e698: 91d8 l32i.n a13, a1, 36 +4022e69a: 81e8 l32i.n a14, a1, 32 +4022e69c: 71f8 l32i.n a15, a1, 28 +4022e69e: 30c112 addi a1, a1, 48 +4022e6a1: f00d ret.n + ... + +4022e6a4 : +4022e6a4: fefe21 l32r a2, 4022e29c +4022e6a7: f0c112 addi a1, a1, -16 +4022e6aa: 21c9 s32i.n a12, a1, 8 +4022e6ac: 02c8 l32i.n a12, a2, 0 +4022e6ae: 3109 s32i.n a0, a1, 12 +4022e6b0: 0cac beqz.n a12, 4022e6d4 +4022e6b2: 071c22 l16ui a2, a12, 14 +4022e6b5: 529c beqz.n a2, 4022e6ce +4022e6b7: 220b addi.n a2, a2, -1 +4022e6b9: f42020 extui a2, a2, 0, 16 +4022e6bc: 075c22 s16i a2, a12, 14 +4022e6bf: b2cc bnez.n a2, 4022e6ce +4022e6c1: 0d0c22 l8ui a2, a12, 13 +4022e6c4: 061266 bnei a2, 1, 4022e6ce +4022e6c7: 631c movi.n a3, 22 +4022e6c9: 0c2d mov.n a2, a12 +4022e6cb: ffa7c5 call0 4022e148 +4022e6ce: 0cc8 l32i.n a12, a12, 0 +4022e6d0: fff706 j 4022e6b0 +4022e6d3: 310800 srai a0, a0, 24 +4022e6d6: 21c8 l32i.n a12, a1, 8 +4022e6d8: 10c112 addi a1, a1, 16 +4022e6db: f00d ret.n +4022e6dd: 000000 ill +4022e6e0: e0c112 addi a1, a1, -32 +4022e6e3: 51d9 s32i.n a13, a1, 20 +4022e6e5: 41e9 s32i.n a14, a1, 16 +4022e6e7: 7109 s32i.n a0, a1, 28 +4022e6e9: 61c9 s32i.n a12, a1, 24 +4022e6eb: 02dd mov.n a13, a2 +4022e6ed: 04ed mov.n a14, a4 +4022e6ef: 0223e7 blt a3, a14, 4022e6f5 +4022e6f2: 002386 j 4022e784 +4022e6f5: 902330 addx2 a2, a3, a3 +4022e6f8: a022d0 addx4 a2, a2, a13 +4022e6fb: 0248 l32i.n a4, a2, 0 +4022e6fd: 1268 l32i.n a6, a2, 4 +4022e6ff: 2228 l32i.n a2, a2, 8 +4022e701: 0149 s32i.n a4, a1, 0 +4022e703: 1169 s32i.n a6, a1, 4 +4022e705: 2129 s32i.n a2, a1, 8 +4022e707: 0e4d mov.n a4, a14 +4022e709: 20c330 or a12, a3, a3 +4022e70c: 902440 addx2 a2, a4, a4 +4022e70f: a022d0 addx4 a2, a2, a13 +4022e712: 1fac47 bge a12, a4, 4022e735 +4022e715: 025d mov.n a5, a2 +4022e717: f4c222 addi a2, a2, -12 +4022e71a: 4278 l32i.n a7, a2, 16 +4022e71c: 35b677 bgeu a6, a7, 4022e755 +4022e71f: 440b addi.n a4, a4, -1 +4022e721: fffb46 j 4022e712 +4022e724: 027d mov.n a7, a2 +4022e726: 22cb addi.n a2, a2, 12 +4022e728: f8c282 addi a8, a2, -8 +4022e72b: 0888 l32i.n a8, a8, 0 +4022e72d: 41b867 bgeu a8, a6, 4022e772 +4022e730: cc1b addi.n a12, a12, 1 +4022e732: ee2c47 blt a12, a4, 4022e724 +4022e735: d394c7 bne a4, a12, 4022e70c +4022e738: 0148 l32i.n a4, a1, 0 +4022e73a: 902cc0 addx2 a2, a12, a12 +4022e73d: a022d0 addx4 a2, a2, a13 +4022e740: 0249 s32i.n a4, a2, 0 +4022e742: 2148 l32i.n a4, a1, 8 +4022e744: 1269 s32i.n a6, a2, 4 +4022e746: 2249 s32i.n a4, a2, 8 +4022e748: 4c0b addi.n a4, a12, -1 +4022e74a: 202dd0 or a2, a13, a13 +4022e74d: fff905 call0 4022e6e0 +4022e750: 3c1b addi.n a3, a12, 1 +4022e752: ffe646 j 4022e6ef +4022e755: 902cc0 addx2 a2, a12, a12 +4022e758: 0588 l32i.n a8, a5, 0 +4022e75a: 1122e0 slli a2, a2, 2 +4022e75d: 7d2a add.n a7, a13, a2 +4022e75f: 1598 l32i.n a9, a5, 4 +4022e761: 0789 s32i.n a8, a7, 0 +4022e763: 2588 l32i.n a8, a5, 8 +4022e765: 22cb addi.n a2, a2, 12 +4022e767: 1799 s32i.n a9, a7, 4 +4022e769: 2789 s32i.n a8, a7, 8 +4022e76b: cc1b addi.n a12, a12, 1 +4022e76d: 2d2a add.n a2, a13, a2 +4022e76f: ffefc6 j 4022e732 +4022e772: 0728 l32i.n a2, a7, 0 +4022e774: 1788 l32i.n a8, a7, 4 +4022e776: 0529 s32i.n a2, a5, 0 +4022e778: 2728 l32i.n a2, a7, 8 +4022e77a: 440b addi.n a4, a4, -1 +4022e77c: 1589 s32i.n a8, a5, 4 +4022e77e: 2529 s32i.n a2, a5, 8 +4022e780: ffec46 j 4022e735 +4022e783: 710800 excw +4022e786: 61c8 l32i.n a12, a1, 24 +4022e788: 51d8 l32i.n a13, a1, 20 +4022e78a: 41e8 l32i.n a14, a1, 16 +4022e78c: 20c112 addi a1, a1, 32 +4022e78f: f00d ret.n +4022e791: 000000 ill +4022e794: fedbf0 excw +4022e797: 3f .byte 0x3f +4022e798: dbec bnez.n a11, 4022e7c9 +4022e79a: fe .byte 0xfe +4022e79b: 3f .byte 0x3f +4022e79c: fedbf4 excw +4022e79f: 3f .byte 0x3f + +4022e7a0 : +4022e7a0: fffd21 l32r a2, 4022e794 +4022e7a3: f0c112 addi a1, a1, -16 +4022e7a6: 0238 l32i.n a3, a2, 0 +4022e7a8: 11d9 s32i.n a13, a1, 4 +4022e7aa: 3109 s32i.n a0, a1, 12 +4022e7ac: 21c9 s32i.n a12, a1, 8 +4022e7ae: 02dd mov.n a13, a2 +4022e7b0: 43cc bnez.n a3, 4022e7b8 +4022e7b2: 020c movi.n a2, 0 +4022e7b4: 001246 j 4022e801 +4022e7b7: f82100 excw +4022e7ba: ff .byte 0xff +4022e7bb: 000222 l8ui a2, a2, 0 +4022e7be: ff0216 beqz a2, 4022e7b2 +4022e7c1: fff621 l32r a2, 4022e79c +4022e7c4: 002232 l32i a3, a2, 0 +4022e7c7: 20c220 or a12, a2, a2 +4022e7ca: fe4316 beqz a3, 4022e7b2 +4022e7cd: e1eb05 call0 40210680 +4022e7d0: 03a032 movi a3, 3 +4022e7d3: 240c movi.n a4, 2 +4022e7d5: 834320 moveqz a4, a3, a2 +4022e7d8: 0d58 l32i.n a5, a13, 0 +4022e7da: 0c38 l32i.n a3, a12, 0 +4022e7dc: 042d mov.n a2, a4 +4022e7de: 040c movi.n a4, 0 +4022e7e0: ce1457 beq a4, a5, 4022e7b2 +4022e7e3: 036d mov.n a6, a3 +4022e7e5: 33cb addi.n a3, a3, 12 +4022e7e7: f4c372 addi a7, a3, -12 +4022e7ea: 0778 l32i.n a7, a7, 0 +4022e7ec: 0c9277 bne a2, a7, 4022e7fc +4022e7ef: 2628 l32i.n a2, a6, 8 +4022e7f1: 549331 l32r a3, 40203a40 +4022e7f4: 09b327 bgeu a3, a2, 4022e801 +4022e7f7: 032d mov.n a2, a3 +4022e7f9: 000106 j 4022e801 +4022e7fc: 441b addi.n a4, a4, 1 +4022e7fe: fff786 j 4022e7e0 +4022e801: 3108 l32i.n a0, a1, 12 +4022e803: 21c8 l32i.n a12, a1, 8 +4022e805: 11d8 l32i.n a13, a1, 4 +4022e807: 10c112 addi a1, a1, 16 +4022e80a: f00d ret.n + +4022e80c : +4022e80c: 027d mov.n a7, a2 +4022e80e: ffe121 l32r a2, 4022e794 +4022e811: 0268 l32i.n a6, a2, 0 +4022e813: 43bc beqz.n a3, 4022e84b +4022e815: 26bc beqz.n a6, 4022e84b +4022e817: ffe021 l32r a2, 4022e798 +4022e81a: 000222 l8ui a2, a2, 0 +4022e81d: c2ac beqz.n a2, 4022e84d +4022e81f: ffdf21 l32r a2, 4022e79c +4022e822: 0248 l32i.n a4, a2, 0 +4022e824: 020c movi.n a2, 0 +4022e826: 231427 beq a4, a2, 4022e84d +4022e829: 205220 or a5, a2, a2 +4022e82c: 042d mov.n a2, a4 +4022e82e: 44cb addi.n a4, a4, 12 +4022e830: f4c482 addi a8, a4, -12 +4022e833: 0888 l32i.n a8, a8, 0 +4022e835: 0d9877 bne a8, a7, 4022e846 +4022e838: 1248 l32i.n a4, a2, 4 +4022e83a: 2228 l32i.n a2, a2, 8 +4022e83c: 0379 s32i.n a7, a3, 0 +4022e83e: 2329 s32i.n a2, a3, 8 +4022e840: 1349 s32i.n a4, a3, 4 +4022e842: 120c movi.n a2, 1 +4022e844: f00d ret.n +4022e846: 551b addi.n a5, a5, 1 +4022e848: e09657 bne a6, a5, 4022e82c +4022e84b: 020c movi.n a2, 0 +4022e84d: f00d ret.n +4022e84f: 0b0200 excw +4022e852: 334023 excw +4022e855: 230b addi.n a2, a3, -1 +4022e857: dbe840 excw +4022e85a: fe .byte 0xfe +4022e85b: 3f .byte 0x3f +4022e85c: 081000 excw +4022e85f: dbe400 excw +4022e862: fe .byte 0xfe +4022e863: 3f .byte 0x3f +4022e864: 0fd000 excw +4022e867: d00000 subx2 a0, a0, a0 +4022e86a: 1f .byte 0x1f +4022e86b: d00000 subx2 a0, a0, a0 +4022e86e: 3f .byte 0x3f +4022e86f: 100000 and a0, a0, a0 +4022e872: 2b0010 excw +4022e875: 230b addi.n a2, a3, -1 +4022e877: d00040 subx2 a0, a0, a4 +4022e87a: 7f .byte 0x7f +4022e87b: d00000 subx2 a0, a0, a0 +4022e87e: ff .byte 0xff +4022e87f: 0b2300 excw +4022e882: db4023 excw +4022e885: 230a add.n a2, a3, a0 +4022e887: 0ac440 excw +4022e88a: ad4023 excw +4022e88d: 230a add.n a2, a3, a0 +4022e88f: dc3840 excw +4022e892: fe .byte 0xfe +4022e893: 3f .byte 0x3f +4022e894: dc1c movi.n a12, 29 +4022e896: fe .byte 0xfe +4022e897: 3f .byte 0x3f +4022e898: 8e .byte 0x8e +4022e899: 230a add.n a2, a3, a0 +4022e89b: 0a7f40 excw +4022e89e: 704023 excw +4022e8a1: 230a add.n a2, a3, a0 +4022e8a3: 0a6140 excw +4022e8a6: 574023 excw +4022e8a9: 230a add.n a2, a3, a0 +4022e8ab: 0b3b40 excw +4022e8ae: 3b4023 excw +4022e8b1: 230a add.n a2, a3, a0 +4022e8b3: 0a0640 excw +4022e8b6: c44023 excw +4022e8b9: 2309 s32i.n a0, a3, 8 +4022e8bb: 099440 excw +4022e8be: f64023 excw +4022e8c1: 230a add.n a2, a3, a0 +4022e8c3: 1f5840 excw +4022e8c6: 10 .byte 0x10 +4022e8c7: 40 .byte 0x40 + +4022e8c8 : +4022e8c8: c0c112 addi a1, a1, -64 +4022e8cb: e1c9 s32i.n a12, a1, 56 +4022e8cd: d1d9 s32i.n a13, a1, 52 +4022e8cf: c1e9 s32i.n a14, a1, 48 +4022e8d1: 03dd mov.n a13, a3 +4022e8d3: 02ed mov.n a14, a2 +4022e8d5: 04cd mov.n a12, a4 +4022e8d7: 013d mov.n a3, a1 +4022e8d9: 440c movi.n a4, 4 +4022e8db: 020c movi.n a2, 0 +4022e8dd: 0b61f2 s32i a15, a1, 44 +4022e8e0: 0f6102 s32i a0, a1, 60 +4022e8e3: 873701 l32r a0, 402105c0 +4022e8e6: 0000c0 callx0 a0 +4022e8e9: 0148 l32i.n a4, a1, 0 +4022e8eb: 1f0c movi.n a15, 1 +4022e8ed: 354c40 extui a4, a4, 28, 4 +4022e8f0: 0c14c7 beq a4, a12, 4022e900 +4022e8f3: ffd721 l32r a2, 4022e850 +4022e8f6: 0c3d mov.n a3, a12 +4022e8f8: 4dd501 l32r a0, 4020204c +4022e8fb: 0000c0 callx0 a0 +4022e8fe: 0f0c movi.n a15, 0 +4022e900: 545c26 beqi a12, 5, 4022e958 +4022e903: 1d6cf6 bgeui a12, 6, 4022e924 +4022e906: 362c26 beqi a12, 2, 4022e940 +4022e909: 0b3cf6 bgeui a12, 3, 4022e918 +4022e90c: ffd221 l32r a2, 4022e854 +4022e90f: 021c66 bnei a12, 1, 4022e915 +4022e912: 002086 j 4022e998 +4022e915: 001f06 j 4022e995 +4022e918: 343c26 beqi a12, 3, 4022e950 +4022e91b: 764c66 bnei a12, 4, 4022e995 +4022e91e: ffcf31 l32r a3, 4022e85c +4022e921: 001186 j 4022e96b +4022e924: 507c26 beqi a12, 7, 4022e978 +4022e927: 3d7cb6 bltui a12, 7, 4022e968 +4022e92a: 528c26 beqi a12, 8, 4022e980 +4022e92d: 920c movi.n a2, 9 +4022e92f: 629c27 bne a12, a2, 4022e995 +4022e932: ffcf31 l32r a3, 4022e870 +4022e935: ffc821 l32r a2, 4022e858 +4022e938: 0239 s32i.n a3, a2, 0 +4022e93a: ffd031 l32r a3, 4022e87c +4022e93d: 001286 j 4022e98b +4022e940: ffc731 l32r a3, 4022e85c +4022e943: ffc521 l32r a2, 4022e858 +4022e946: 0239 s32i.n a3, a2, 0 +4022e948: ffc731 l32r a3, 4022e864 +4022e94b: 000f06 j 4022e98b +4022e94e: 310000 srai a0, a0, 16 +4022e951: 06ffc3 excw +4022e954: 000001 l32r a0, 401ee954 <_lit4_end+0xe8628> +4022e957: c63100 excw +4022e95a: ff .byte 0xff +4022e95b: ffbf21 l32r a2, 4022e858 +4022e95e: 0239 s32i.n a3, a2, 0 +4022e960: ffc231 l32r a3, 4022e868 +4022e963: 000906 j 4022e98b +4022e966: 310000 srai a0, a0, 16 +4022e969: 21ffc2 excw +4022e96c: ffbb addi.n a15, a15, 11 +4022e96e: 0239 s32i.n a3, a2, 0 +4022e970: ffbf31 l32r a3, 4022e86c +4022e973: 000506 j 4022e98b +4022e976: 210000 srai a0, a0, 0 +4022e979: bf .byte 0xbf +4022e97a: ff .byte 0xff +4022e97b: 000646 j 4022e998 +4022e97e: 310000 srai a0, a0, 16 +4022e981: ffbc beqz.n a15, 4022e9c4 +4022e983: ffb521 l32r a2, 4022e858 +4022e986: 0239 s32i.n a3, a2, 0 +4022e988: ffbc31 l32r a3, 4022e878 +4022e98b: ffb521 l32r a2, 4022e860 +4022e98e: 0239 s32i.n a3, a2, 0 +4022e990: 0005c6 j 4022e9ab +4022e993: 210000 srai a0, a0, 0 +4022e996: ffba add.n a15, a15, a11 +4022e998: 4dad01 l32r a0, 4020204c +4022e99b: 0000c0 callx0 a0 +4022e99e: ffc821 l32r a2, 4022e8c0 +4022e9a1: 0c3d mov.n a3, a12 +4022e9a3: 4daa01 l32r a0, 4020204c +4022e9a6: 0000c0 callx0 a0 +4022e9a9: 0f0c movi.n a15, 0 +4022e9ab: ff7ac1 l32r a12, 4022e794 +4022e9ae: ff7b21 l32r a2, 4022e79c +4022e9b1: 0cd9 s32i.n a13, a12, 0 +4022e9b3: 0d0c movi.n a13, 0 +4022e9b5: 02e9 s32i.n a14, a2, 0 +4022e9b7: 0ded mov.n a14, a13 +4022e9b9: 0c28 l32i.n a2, a12, 0 +4022e9bb: 023e27 bltu a14, a2, 4022e9c1 +4022e9be: 005cc6 j 4022eb35 +4022e9c1: ff7631 l32r a3, 4022e79c +4022e9c4: 902ee0 addx2 a2, a14, a14 +4022e9c7: 1172e0 slli a7, a2, 2 +4022e9ca: 0328 l32i.n a2, a3, 0 +4022e9cc: 227a add.n a2, a2, a7 +4022e9ce: 2248 l32i.n a4, a2, 8 +4022e9d0: b43040 extui a3, a4, 0, 12 +4022e9d3: 63cc bnez.n a3, 4022e9dd +4022e9d5: 1238 l32i.n a3, a2, 4 +4022e9d7: b43030 extui a3, a3, 0, 12 +4022e9da: 012316 beqz a3, 4022e9f0 +4022e9dd: 1258 l32i.n a5, a2, 4 +4022e9df: 0238 l32i.n a3, a2, 0 +4022e9e1: ffa821 l32r a2, 4022e884 +4022e9e4: 4179 s32i.n a7, a1, 16 +4022e9e6: 4d9901 l32r a0, 4020204c +4022e9e9: 0000c0 callx0 a0 +4022e9ec: 4178 l32i.n a7, a1, 16 +4022e9ee: 0f0c movi.n a15, 0 +4022e9f0: ff6b51 l32r a5, 4022e79c +4022e9f3: 0528 l32i.n a2, a5, 0 +4022e9f5: 227a add.n a2, a2, a7 +4022e9f7: 0248 l32i.n a4, a2, 0 +4022e9f9: 643426 beqi a4, 3, 4022ea61 +4022e9fc: 0844f6 bgeui a4, 4, 4022ea08 +4022e9ff: 1c1426 beqi a4, 1, 4022ea1f +4022ea02: 3b2426 beqi a4, 2, 4022ea41 +4022ea05: 004606 j 4022eb21 +4022ea08: 2238 l32i.n a3, a2, 8 +4022ea0a: 876651 l32r a5, 402107a4 +4022ea0d: 025466 bnei a4, 5, 4022ea13 +4022ea10: 002a86 j 4022eabe +4022ea13: 7f54b6 bltui a4, 5, 4022ea96 +4022ea16: 026466 bnei a4, 6, 4022ea1c +4022ea19: 0032c6 j 4022eae8 +4022ea1c: 004046 j 4022eb21 +4022ea1f: 1238 l32i.n a3, a2, 4 +4022ea21: 93cc bnez.n a3, 4022ea2e +4022ea23: 2228 l32i.n a2, a2, 8 +4022ea25: f0d222 addmi a2, a2, 0xfffff000 +4022ea28: 93f320 movnez a15, a3, a2 +4022ea2b: 000046 j 4022ea30 +4022ea2e: 0f0c movi.n a15, 0 +4022ea30: 0430d0 extui a3, a13, 0, 1 +4022ea33: 020c movi.n a2, 0 +4022ea35: 93f230 movnez a15, a2, a3 +4022ea38: 120c movi.n a2, 1 +4022ea3a: 20dd20 or a13, a13, a2 +4022ea3d: 003bc6 j 4022eb30 +4022ea40: 124800 excw +4022ea43: 555731 l32r a3, 40203fa0 +4022ea46: 079437 bne a4, a3, 4022ea51 +4022ea49: 2228 l32i.n a2, a2, 8 +4022ea4b: 53fd31 l32r a3, 40203a40 +4022ea4e: 0ab327 bgeu a3, a2, 4022ea5c +4022ea51: ff8d21 l32r a2, 4022e888 +4022ea54: 0f0c movi.n a15, 0 +4022ea56: 4d7d01 l32r a0, 4020204c +4022ea59: 0000c0 callx0 a0 +4022ea5c: 220c movi.n a2, 2 +4022ea5e: 000806 j 4022ea82 +4022ea61: ff7d51 l32r a5, 4022e858 +4022ea64: 1248 l32i.n a4, a2, 4 +4022ea66: 0538 l32i.n a3, a5, 0 +4022ea68: 089437 bne a4, a3, 4022ea74 +4022ea6b: 022222 l32i a2, a2, 8 +4022ea6e: 53f431 l32r a3, 40203a40 +4022ea71: 0bb327 bgeu a3, a2, 4022ea80 +4022ea74: ff8621 l32r a2, 4022e88c +4022ea77: 00a0f2 movi a15, 0 +4022ea7a: 4d7401 l32r a0, 4020204c +4022ea7d: 0000c0 callx0 a0 +4022ea80: 420c movi.n a2, 4 +4022ea82: 104d20 and a4, a13, a2 +4022ea85: 030c movi.n a3, 0 +4022ea87: 206d20 or a6, a13, a2 +4022ea8a: 93f340 movnez a15, a3, a4 +4022ea8d: 74d060 extui a13, a6, 0, 8 +4022ea90: 002706 j 4022eb30 +4022ea93: 000000 ill +4022ea96: 040c movi.n a4, 0 +4022ea98: f0d332 addmi a3, a3, 0xfffff000 +4022ea9b: 93f430 movnez a15, a4, a3 +4022ea9e: 830c movi.n a3, 8 +4022eaa0: 107d30 and a7, a13, a3 +4022eaa3: 206d30 or a6, a13, a3 +4022eaa6: 0538 l32i.n a3, a5, 0 +4022eaa8: 1228 l32i.n a2, a2, 4 +4022eaaa: 3338 l32i.n a3, a3, 12 +4022eaac: 93f470 movnez a15, a4, a7 +4022eaaf: 74d060 extui a13, a6, 0, 8 +4022eab2: 4d0601 l32r a0, 40201ecc +4022eab5: 0000c0 callx0 a0 +4022eab8: ff7631 l32r a3, 4022e890 +4022eabb: 000906 j 4022eae3 +4022eabe: 040c movi.n a4, 0 +4022eac0: f0d332 addmi a3, a3, 0xfffff000 +4022eac3: 93f430 movnez a15, a4, a3 +4022eac6: 031c movi.n a3, 16 +4022eac8: 107d30 and a7, a13, a3 +4022eacb: 206d30 or a6, a13, a3 +4022eace: 0538 l32i.n a3, a5, 0 +4022ead0: 1228 l32i.n a2, a2, 4 +4022ead2: 3338 l32i.n a3, a3, 12 +4022ead4: 93f470 movnez a15, a4, a7 +4022ead7: 74d060 extui a13, a6, 0, 8 +4022eada: 4cfc01 l32r a0, 40201ecc +4022eadd: 0000c0 callx0 a0 +4022eae0: ff6d31 l32r a3, 4022e894 +4022eae3: 0329 s32i.n a2, a3, 0 +4022eae5: 0011c6 j 4022eb30 +4022eae8: 040c movi.n a4, 0 +4022eaea: 022c movi.n a2, 32 +4022eaec: d0d332 addmi a3, a3, 0xffffd000 +4022eaef: 93f430 movnez a15, a4, a3 +4022eaf2: 206d20 or a6, a13, a2 +4022eaf5: 103d20 and a3, a13, a2 +4022eaf8: 0528 l32i.n a2, a5, 0 +4022eafa: 93f430 movnez a15, a4, a3 +4022eafd: 3238 l32i.n a3, a2, 12 +4022eaff: ff5821 l32r a2, 4022e860 +4022eb02: 74d060 extui a13, a6, 0, 8 +4022eb05: 0228 l32i.n a2, a2, 0 +4022eb07: 4cf101 l32r a0, 40201ecc +4022eb0a: 0000c0 callx0 a0 +4022eb0d: 8a2531 l32r a3, 402113a4 +4022eb10: 0338 l32i.n a3, a3, 0 +4022eb12: 1a1237 beq a2, a3, 4022eb30 +4022eb15: ff6021 l32r a2, 4022e898 +4022eb18: 4d4d01 l32r a0, 4020204c +4022eb1b: 0000c0 callx0 a0 +4022eb1e: 0002c6 j 4022eb2d +4022eb21: 872031 l32r a3, 402107a4 +4022eb24: 2228 l32i.n a2, a2, 8 +4022eb26: 0338 l32i.n a3, a3, 0 +4022eb28: 1338 l32i.n a3, a3, 4 +4022eb2a: 02b327 bgeu a3, a2, 4022eb30 +4022eb2d: 00a0f2 movi a15, 0 +4022eb30: ee1b addi.n a14, a14, 1 +4022eb32: ffa0c6 j 4022e9b9 +4022eb35: 0ded07 bbsi a13, 0, 4022eb46 +4022eb38: ff5921 l32r a2, 4022e89c +4022eb3b: 4d4401 l32r a0, 4020204c +4022eb3e: 0000c0 callx0 a0 +4022eb41: 120c movi.n a2, 1 +4022eb43: 20dd20 or a13, a13, a2 +4022eb46: 2e0c movi.n a14, 2 +4022eb48: 0e8de7 bany a13, a14, 4022eb5a +4022eb4b: ff5521 l32r a2, 4022e8a0 +4022eb4e: 4d3f01 l32r a0, 4020204c +4022eb51: 0000c0 callx0 a0 +4022eb54: 206de0 or a6, a13, a14 +4022eb57: 74d060 extui a13, a6, 0, 8 +4022eb5a: 4e0c movi.n a14, 4 +4022eb5c: 0e8de7 bany a13, a14, 4022eb6e +4022eb5f: ff5121 l32r a2, 4022e8a4 +4022eb62: 4d3a01 l32r a0, 4020204c +4022eb65: 0000c0 callx0 a0 +4022eb68: 206de0 or a6, a13, a14 +4022eb6b: 74d060 extui a13, a6, 0, 8 +4022eb6e: f23c movi.n a2, 63 +4022eb70: 0c1d27 beq a13, a2, 4022eb80 +4022eb73: ff4d21 l32r a2, 4022e8a8 +4022eb76: 0d3d mov.n a3, a13 +4022eb78: 4d3501 l32r a0, 4020204c +4022eb7b: 0000c0 callx0 a0 +4022eb7e: 0f0c movi.n a15, 0 +4022eb80: 0c28 l32i.n a2, a12, 0 +4022eb82: ff4a31 l32r a3, 4022e8ac +4022eb85: 902220 addx2 a2, a2, a2 +4022eb88: 21a142 movi a4, 0x121 +4022eb8b: 1122e0 slli a2, a2, 2 +4022eb8e: 4d3001 l32r a0, 40202050 +4022eb91: 0000c0 callx0 a0 +4022eb94: 02ed mov.n a14, a2 +4022eb96: 020c movi.n a2, 0 +4022eb98: 029e27 bne a14, a2, 4022eb9e +4022eb9b: 002e46 j 4022ec58 +4022eb9e: feff21 l32r a2, 4022e79c +4022eba1: 0c48 l32i.n a4, a12, 0 +4022eba3: 002232 l32i a3, a2, 0 +4022eba6: 904440 addx2 a4, a4, a4 +4022eba9: 1144e0 slli a4, a4, 2 +4022ebac: 0e2d mov.n a2, a14 +4022ebae: 491901 l32r a0, 40201014 <_irom0_text_start+0x4> +4022ebb1: 0000c0 callx0 a0 +4022ebb4: 0c48 l32i.n a4, a12, 0 +4022ebb6: 030c movi.n a3, 0 +4022ebb8: ffc442 addi a4, a4, -1 +4022ebbb: 0e2d mov.n a2, a14 +4022ebbd: ffb205 call0 4022e6e0 +4022ebc0: 0e9d mov.n a9, a14 +4022ebc2: 0d0c movi.n a13, 0 +4022ebc4: 0c28 l32i.n a2, a12, 0 +4022ebc6: 320b addi.n a3, a2, -1 +4022ebc8: 3cbd37 bgeu a13, a3, 4022ec08 +4022ebcb: 2928 l32i.n a2, a9, 8 +4022ebcd: 12dc bnez.n a2, 4022ebe2 +4022ebcf: 1938 l32i.n a3, a9, 4 +4022ebd1: ff3721 l32r a2, 4022e8b0 +4022ebd4: 040c movi.n a4, 0 +4022ebd6: 4199 s32i.n a9, a1, 16 +4022ebd8: 4d1d01 l32r a0, 4020204c +4022ebdb: 0000c0 callx0 a0 +4022ebde: 4198 l32i.n a9, a1, 16 +4022ebe0: 0f0c movi.n a15, 0 +4022ebe2: 1958 l32i.n a5, a9, 4 +4022ebe4: 2968 l32i.n a6, a9, 8 +4022ebe6: 4978 l32i.n a7, a9, 16 +4022ebe8: 256a add.n a2, a5, a6 +4022ebea: dd1b addi.n a13, a13, 1 +4022ebec: 12b727 bgeu a7, a2, 4022ec02 +4022ebef: 3948 l32i.n a4, a9, 12 +4022ebf1: 0938 l32i.n a3, a9, 0 +4022ebf3: ff3021 l32r a2, 4022e8b4 +4022ebf6: 4199 s32i.n a9, a1, 16 +4022ebf8: 4d1501 l32r a0, 4020204c +4022ebfb: 0000c0 callx0 a0 +4022ebfe: 4198 l32i.n a9, a1, 16 +4022ec00: 0f0c movi.n a15, 0 +4022ec02: 99cb addi.n a9, a9, 12 +4022ec04: ffef06 j 4022ebc4 +4022ec07: 222000 excw +4022ec0a: e63190 excw +4022ec0d: 22e086 j 40237793 <_irom0_text_end+0x6c17> +4022ec10: c222a0 excw +4022ec13: 0338f4 excw +4022ec16: 1248 l32i.n a4, a2, 4 +4022ec18: 2228 l32i.n a2, a2, 8 +4022ec1a: 1338 l32i.n a3, a3, 4 +4022ec1c: 242a add.n a2, a4, a2 +4022ec1e: 24b327 bgeu a3, a2, 4022ec46 +4022ec21: ff2521 l32r a2, 4022e8b8 +4022ec24: 0f0c movi.n a15, 0 +4022ec26: 4d0901 l32r a0, 4020204c +4022ec29: 0000c0 callx0 a0 +4022ec2c: 0c28 l32i.n a2, a12, 0 +4022ec2e: 902220 addx2 a2, a2, a2 +4022ec31: a022e0 addx4 a2, a2, a14 +4022ec34: f4c222 addi a2, a2, -12 +4022ec37: 2258 l32i.n a5, a2, 8 +4022ec39: 1248 l32i.n a4, a2, 4 +4022ec3b: 0238 l32i.n a3, a2, 0 +4022ec3d: ff1f21 l32r a2, 4022e8bc +4022ec40: 4d0301 l32r a0, 4020204c +4022ec43: 0000c0 callx0 a0 +4022ec46: 0e2d mov.n a2, a14 +4022ec48: ff1f01 l32r a0, 4022e8c4 +4022ec4b: 0000c0 callx0 a0 +4022ec4e: fed221 l32r a2, 4022e798 +4022ec51: 130c movi.n a3, 1 +4022ec53: 004232 s8i a3, a2, 0 +4022ec56: 0f2d mov.n a2, a15 +4022ec58: f108 l32i.n a0, a1, 60 +4022ec5a: e1c8 l32i.n a12, a1, 56 +4022ec5c: d1d8 l32i.n a13, a1, 52 +4022ec5e: c1e8 l32i.n a14, a1, 48 +4022ec60: b1f8 l32i.n a15, a1, 44 +4022ec62: 40c112 addi a1, a1, 64 +4022ec65: f00d ret.n +4022ec67: 6e .byte 0x6e +4022ec68: 646565 excw +4022ec6b: 6f6220 excw +4022ec6e: 6f .byte 0x6f +4022ec6f: 312074 excw +4022ec72: 2e .byte 0x2e +4022ec73: 0a2b34 excw +4022ec76: 797300 excw +4022ec79: 657473 excw +4022ec7c: 206d excw +4022ec7e: 726170 excw +4022ec81: 206d61 l32r a6, 401f6e38 <_lit4_end+0xf0b0c> +4022ec84: 727265 excw +4022ec87: 6f .byte 0x6f +4022ec88: 202c72 l32i a7, a12, 128 +4022ec8b: 657375 excw +4022ec8e: 616c20 excw +4022ec91: 207473 excw +4022ec94: 766173 excw +4022ec97: 206465 excw +4022ec9a: 726170 excw +4022ec9d: 216d61 l32r a6, 401f7254 <_lit4_end+0xf0f28> +4022eca0: 000a add.n a0, a0, a0 +4022eca2: 796870 excw +4022eca5: 657620 extui a7, a2, 22, 7 +4022eca8: 203a72 excw +4022ecab: 5f6425 excw +4022ecae: 2c6425 excw +4022ecb1: 707020 excw +4022ecb4: 657620 extui a7, a2, 22, 7 +4022ecb7: 203a72 excw +4022ecba: 2e6425 excw +4022ecbd: 0a6425 excw +4022ecc0: 000a add.n a0, a0, a0 +4022ecc2: 530a add.n a5, a3, a0 +4022ecc4: 204b44 excw +4022ecc7: 726576 excw +4022ecca: 203a add.n a2, a0, a3 +4022eccc: 207325 excw +4022eccf: 6d6f63 excw +4022ecd2: 6c6970 excw +4022ecd5: 206465 excw +4022ecd8: 412040 srli a2, a4, 0 +4022ecdb: 207270 or a7, a2, a7 +4022ecde: 203620 or a3, a6, a2 +4022ece1: 323032 excw +4022ece4: 302033 excw +4022ece7: 303a33 excw +4022ecea: 303a36 excw +4022eced: 000a33 excw +4022ecf0: 665f77 bbc a15, a7, 4022ed5a +4022ecf3: 616c movi.n a1, -26 +4022ecf5: 0a6873 excw +4022ecf8: 667200 excw +4022ecfb: 315b addi.n a3, a1, 5 +4022ecfd: 5d3431 l32r a3, 402061d0 +4022ed00: 203a20 or a3, a10, a2 +4022ed03: 323025 excw +4022ed06: 0a78 l32i.n a7, a10, 0 +4022ed08: 667200 excw +4022ed0b: 315b addi.n a3, a1, 5 +4022ed0d: 5d3331 l32r a3, 402061dc +4022ed10: 203a20 or a3, a10, a2 +4022ed13: 323025 excw +4022ed16: 0a78 l32i.n a7, a10, 0 +4022ed18: 667200 excw +4022ed1b: 315b addi.n a3, a1, 5 +4022ed1d: 5d3231 l32r a3, 402061e8 +4022ed20: 203a20 or a3, a10, a2 +4022ed23: 323025 excw +4022ed26: 0a78 l32i.n a7, a10, 0 +4022ed28: 726600 excw +4022ed2b: 207165 excw +4022ed2e: 617274 excw +4022ed31: 206563 excw +4022ed34: 616e65 excw +4022ed37: 656c62 s32i a6, a12, 0x194 +4022ed3a: 642520 extui a2, a2, 5, 7 +4022ed3d: 000a add.n a0, a0, a0 +4022ed3f: 206672 s32i a7, a6, 128 +4022ed42: 6c6163 excw +4022ed45: 657320 extui a7, a2, 19, 7 +4022ed48: 6f7463 excw +4022ed4b: 203a72 excw +4022ed4e: 0a6425 excw +4022ed51: 667200 excw +4022ed54: 5f .byte 0x5f +4022ed55: 6c6163 excw +4022ed58: 305b addi.n a3, a0, 5 +4022ed5a: 205d excw +4022ed5c: 303d21 l32r a2, 401fae50 <_lit4_end+0xf4b24> +4022ed5f: 3078 l32i.n a7, a0, 12 +4022ed61: 692c35 excw +4022ed64: 302073 excw +4022ed67: 2578 l32i.n a7, a5, 8 +4022ed69: 583230 excw +4022ed6c: 000a add.n a0, a0, a0 +4022ed6e: 6f4c movi.n a15, 70 +4022ed70: 0a6461 l32r a6, 401f1700 <_lit4_end+0xeb3d4> +4022ed73: 654300 extui a4, a0, 19, 7 +4022ed76: 000a add.n a0, a0, a0 +4022ed78: 636142 s32i a4, a1, 0x18c +4022ed7b: 756b addi.n a7, a5, 6 +4022ed7d: 642070 extui a2, a7, 0, 7 +4022ed80: 616665 excw +4022ed83: 746c75 excw +4022ed86: 642520 extui a2, a2, 5, 7 +4022ed89: 000a add.n a0, a0, a0 +4022ed8b: 636142 s32i a4, a1, 0x18c +4022ed8e: 756b addi.n a7, a5, 6 +4022ed90: 000a70 excw +4022ed93: 637065 excw +4022ed96: 303d31 l32r a3, 401fae8c <_lit4_end+0xf4b60> +4022ed99: 2578 l32i.n a7, a5, 8 +4022ed9b: 783830 excw +4022ed9e: 202c movi.n a0, 34 +4022eda0: 637065 excw +4022eda3: 303d32 excw +4022eda6: 2578 l32i.n a7, a5, 8 +4022eda8: 783830 excw +4022edab: 202c movi.n a0, 34 +4022edad: 637065 excw +4022edb0: 303d33 excw +4022edb3: 2578 l32i.n a7, a5, 8 +4022edb5: 783830 excw +4022edb8: 202c movi.n a0, 34 +4022edba: 637865 excw +4022edbd: 646176 excw +4022edc0: 3d7264 excw +4022edc3: 257830 extui a7, a3, 24, 3 +4022edc6: 783830 excw +4022edc9: 202c movi.n a0, 34 +4022edcb: 706564 excw +4022edce: 303d63 excw +4022edd1: 2578 l32i.n a7, a5, 8 +4022edd3: 783830 excw +4022edd6: 000a add.n a0, a0, a0 +4022edd8: 000a add.n a0, a0, a0 +4022edda: 5328 l32i.n a2, a3, 20 +4022eddc: 726f74 excw +4022eddf: 725065 excw +4022ede2: 6f .byte 0x6f +4022ede3: 6968 l32i.n a6, a9, 24 +4022ede5: 746962 s32i a6, a9, 0x1d0 +4022ede8: 436465 excw +4022edeb: 737561 l32r a6, 4020bbc0 +4022edee: 3a2965 excw +4022edf1: 000a add.n a0, a0, a0 +4022edf3: 4c28 l32i.n a2, a12, 16 +4022edf5: 6f .byte 0x6f +4022edf6: 506461 l32r a6, 40202f88 +4022edf9: 686f72 s32i a7, a15, 0x1a0 +4022edfc: 6269 s32i.n a6, a2, 24 +4022edfe: 7469 s32i.n a6, a4, 28 +4022ee00: 436465 excw +4022ee03: 737561 l32r a6, 4020bbd8 +4022ee06: 3a2965 excw +4022ee09: 000a add.n a0, a0, a0 +4022ee0b: 4c28 l32i.n a2, a12, 16 +4022ee0d: 6f .byte 0x6f +4022ee0e: 536461 l32r a6, 40203ba0 +4022ee11: 726f74 excw +4022ee14: 725065 excw +4022ee17: 7669 s32i.n a6, a6, 28 +4022ee19: 6c69 s32i.n a6, a12, 24 +4022ee1b: 656765 excw +4022ee1e: 756143 excw +4022ee21: 296573 excw +4022ee24: 0a3a add.n a0, a10, a3 +4022ee26: 4c2800 excw +4022ee29: 6f .byte 0x6f +4022ee2a: 536461 l32r a6, 40203bbc +4022ee2d: 726f74 excw +4022ee30: 4c5465 excw +4022ee33: 754d42 s8i a4, a13, 117 +4022ee36: 746c movi.n a4, -25 +4022ee38: 4869 s32i.n a6, a8, 16 +4022ee3a: 7469 s32i.n a6, a4, 28 +4022ee3c: 756143 excw +4022ee3f: 296573 excw +4022ee42: 0a3a add.n a0, a10, a3 +4022ee44: 4c2800 excw +4022ee47: 6f .byte 0x6f +4022ee48: 536461 l32r a6, 40203bd8 +4022ee4b: 726f74 excw +4022ee4e: 4c5465 excw +4022ee51: 694d42 s8i a4, a13, 105 +4022ee54: 437373 excw +4022ee57: 737561 l32r a6, 4020bc2c +4022ee5a: 3a2965 excw +4022ee5d: 000a add.n a0, a0, a0 +4022ee5f: 4928 l32i.n a2, a9, 16 +4022ee61: 6e .byte 0x6e +4022ee62: 467473 excw +4022ee65: 637465 excw +4022ee68: 5068 l32i.n a6, a0, 20 +4022ee6a: 686f72 s32i a7, a15, 0x1a0 +4022ee6d: 6269 s32i.n a6, a2, 24 +4022ee6f: 7469 s32i.n a6, a4, 28 +4022ee71: 436465 excw +4022ee74: 737561 l32r a6, 4020bc48 +4022ee77: 3a2965 excw +4022ee7a: 000a add.n a0, a0, a0 +4022ee7c: 4928 l32i.n a2, a9, 16 +4022ee7e: 6e .byte 0x6e +4022ee7f: 467473 excw +4022ee82: 637465 excw +4022ee85: 5068 l32i.n a6, a0, 20 +4022ee87: 766972 s32i a7, a9, 0x1d8 +4022ee8a: 6c69 s32i.n a6, a12, 24 +4022ee8c: 656765 excw +4022ee8f: 756143 excw +4022ee92: 296573 excw +4022ee95: 0a3a add.n a0, a10, a3 +4022ee97: 492800 excw +4022ee9a: 6e .byte 0x6e +4022ee9b: 547473 excw +4022ee9e: 424c movi.n a2, 68 +4022eea0: 754d excw +4022eea2: 746c movi.n a4, -25 +4022eea4: 4869 s32i.n a6, a8, 16 +4022eea6: 7469 s32i.n a6, a4, 28 +4022eea8: 756143 excw +4022eeab: 296573 excw +4022eeae: 0a3a add.n a0, a10, a3 +4022eeb0: 492800 excw +4022eeb3: 6e .byte 0x6e +4022eeb4: 547473 excw +4022eeb7: 424c movi.n a2, 68 +4022eeb9: 694d excw +4022eebb: 437373 excw +4022eebe: 737561 l32r a6, 4020bc94 +4022eec1: 3a2965 excw +4022eec4: 000a add.n a0, a0, a0 +4022eec6: 4c28 l32i.n a2, a12, 16 +4022eec8: 6f .byte 0x6f +4022eec9: 536461 l32r a6, 40203c5c +4022eecc: 726f74 excw +4022eecf: 495065 excw +4022eed2: 644146 j 40247fdb <_irom0_text_end+0x1745f> +4022eed5: 457264 excw +4022eed8: 6f7272 excw +4022eedb: 614372 s8i a7, a3, 97 +4022eede: 657375 excw +4022eee1: 3a29 s32i.n a2, a10, 12 +4022eee3: 000a add.n a0, a0, a0 +4022eee5: 4928 l32i.n a2, a9, 16 +4022eee7: 6e .byte 0x6e +4022eee8: 727473 excw +4022eeeb: 464950 excw +4022eeee: 646441 l32r a4, 40208080 +4022eef1: 724572 s8i a7, a5, 114 +4022eef4: 726f72 s32i a7, a15, 0x1c8 +4022eef7: 756143 excw +4022eefa: 296573 excw +4022eefd: 0a3a add.n a0, a10, a3 +4022eeff: 4c2800 excw +4022ef02: 6f .byte 0x6f +4022ef03: 536461 l32r a6, 40203c94 +4022ef06: 726f74 excw +4022ef09: 495065 excw +4022ef0c: 614446 j 40247421 <_irom0_text_end+0x168a5> +4022ef0f: 456174 excw +4022ef12: 6f7272 excw +4022ef15: 614372 s8i a7, a3, 97 +4022ef18: 657375 excw +4022ef1b: 3a29 s32i.n a2, a10, 12 +4022ef1d: 000a add.n a0, a0, a0 +4022ef1f: 4928 l32i.n a2, a9, 16 +4022ef21: 6e .byte 0x6e +4022ef22: 727473 excw +4022ef25: 464950 excw +4022ef28: 746144 excw +4022ef2b: 724561 l32r a6, 4020b840 +4022ef2e: 726f72 s32i a7, a15, 0x1c8 +4022ef31: 756143 excw +4022ef34: 296573 excw +4022ef37: 0a3a add.n a0, a10, a3 +4022ef39: 4c2800 excw +4022ef3c: 6f .byte 0x6f +4022ef3d: 536461 l32r a6, 40203cd0 +4022ef40: 726f74 excw +4022ef43: 6c4165 excw +4022ef46: 6769 s32i.n a6, a7, 24 +4022ef48: 6e .byte 0x6e +4022ef49: 656d excw +4022ef4b: 6e .byte 0x6e +4022ef4c: 614374 excw +4022ef4f: 657375 excw +4022ef52: 3a29 s32i.n a2, a10, 12 +4022ef54: 000a add.n a0, a0, a0 +4022ef56: 5028 l32i.n a2, a0, 20 +4022ef58: 766972 s32i a7, a9, 0x1d8 +4022ef5b: 6c69 s32i.n a6, a12, 24 +4022ef5d: 656765 excw +4022ef60: 614364 excw +4022ef63: 657375 excw +4022ef66: 3a29 s32i.n a2, a10, 12 +4022ef68: 000a add.n a0, a0, a0 +4022ef6a: 4928 l32i.n a2, a9, 16 +4022ef6c: 6e .byte 0x6e +4022ef6d: 676574 excw +4022ef70: 447265 excw +4022ef73: 7669 s32i.n a6, a6, 28 +4022ef75: 6469 s32i.n a6, a4, 24 +4022ef77: 794265 excw +4022ef7a: 655a add.n a6, a5, a5 +4022ef7c: 436f72 s32i a7, a15, 0x10c +4022ef7f: 737561 l32r a6, 4020bd54 +4022ef82: 3a2965 excw +4022ef85: 000a add.n a0, a0, a0 +4022ef87: 4128 l32i.n a2, a1, 16 +4022ef89: 6c6c movi.n a12, -26 +4022ef8b: 6f .byte 0x6f +4022ef8c: 614363 excw +4022ef8f: 657375 excw +4022ef92: 3a29 s32i.n a2, a10, 12 +4022ef94: 000a add.n a0, a0, a0 +4022ef96: 4c28 l32i.n a2, a12, 16 +4022ef98: 657665 excw +4022ef9b: 316c movi.n a1, -29 +4022ef9d: 6e49 s32i.n a4, a14, 24 +4022ef9f: 726574 excw +4022efa2: 707572 excw +4022efa5: 614374 excw +4022efa8: 657375 excw +4022efab: 3a29 s32i.n a2, a10, 12 +4022efad: 000a add.n a0, a0, a0 +4022efaf: 4c28 l32i.n a2, a12, 16 +4022efb1: 6f .byte 0x6f +4022efb2: 536461 l32r a6, 40203d44 +4022efb5: 726f74 excw +4022efb8: 724565 excw +4022efbb: 726f72 s32i a7, a15, 0x1c8 +4022efbe: 756143 excw +4022efc1: 296573 excw +4022efc4: 0a3a add.n a0, a10, a3 +4022efc6: 492800 excw +4022efc9: 6e .byte 0x6e +4022efca: 727473 excw +4022efcd: 746375 excw +4022efd0: 6f69 s32i.n a6, a15, 24 +4022efd2: 6e .byte 0x6e +4022efd3: 746552 s32i a5, a5, 0x1d0 +4022efd6: 456863 excw +4022efd9: 6f7272 excw +4022efdc: 614372 s8i a7, a3, 97 +4022efdf: 657375 excw +4022efe2: 3a29 s32i.n a2, a10, 12 +4022efe4: 000a add.n a0, a0, a0 +4022efe6: 5328 l32i.n a2, a3, 20 +4022efe8: 7379 s32i.n a7, a3, 28 +4022efea: 6c6163 excw +4022efed: 436c movi.n a3, -28 +4022efef: 737561 l32r a6, 4020bdc4 +4022eff2: 3a2965 excw +4022eff5: 000a add.n a0, a0, a0 +4022eff7: 4928 l32i.n a2, a9, 16 +4022eff9: 6c6c movi.n a12, -26 +4022effb: 616765 excw +4022effe: 496c movi.n a9, -28 +4022f000: 6e .byte 0x6e +4022f001: 727473 excw +4022f004: 746375 excw +4022f007: 6f69 s32i.n a6, a15, 24 +4022f009: 6e .byte 0x6e +4022f00a: 756143 excw +4022f00d: 296573 excw +4022f010: 0a3a add.n a0, a10, a3 +4022f012: 614600 excw +4022f015: 6c6174 excw +4022f018: 786520 excw +4022f01b: 706563 excw +4022f01e: 6f6974 excw +4022f021: 6e .byte 0x6e +4022f022: 642520 extui a2, a2, 5, 7 +4022f025: 732500 excw +4022f028: 752520 extui a2, a2, 21, 8 +4022f02b: 000a add.n a0, a0, a0 +4022f02d: 6f4d excw +4022f02f: 000a add.n a0, a0, a0 +4022f031: 6c4d excw +4022f033: 000a add.n a0, a0, a0 +4022f035: 642556 bnez a5, 4022f67b +4022f038: 000a add.n a0, a0, a0 +4022f03a: 684d excw +4022f03c: 000a add.n a0, a0, a0 +4022f03e: 706d65 excw +4022f041: 207974 excw +4022f044: 6f .byte 0x6f +4022f045: 0a7074 excw +4022f048: 694600 excw +4022f04b: 776d72 s32i a7, a13, 0x1dc +4022f04e: 657261 l32r a6, 40208618 +4022f051: 4e4f20 excw +4022f054: 594c movi.n a9, 69 +4022f056: 757320 extui a7, a2, 19, 8 +4022f059: 6f7070 excw +4022f05c: 737472 excw +4022f05f: 534520 excw +4022f062: 323850 excw +4022f065: 213636 excw +4022f068: 0a2121 l32r a2, 401f18ec <_lit4_end+0xeb5c0> +4022f06b: 706100 excw +4022f06e: 6d5f70 excw +4022f071: 6e6961 l32r a6, 4020aa18 +4022f074: 2e .byte 0x2e +4022f075: 650063 excw +4022f078: 3a7272 excw +4022f07b: 6f7020 excw +4022f07e: 207473 excw +4022f081: 697270 excw +4022f084: 6f .byte 0x6f +4022f085: 203c20 or a3, a12, a2 +4022f088: 0a6425 excw +4022f08b: 726500 excw +4022f08e: 203a72 excw +4022f091: 736174 excw +4022f094: 206b addi.n a2, a0, 6 +4022f096: 657571 l32r a7, 4020866c +4022f099: 206575 excw +4022f09c: 727265 excw +4022f09f: 6f .byte 0x6f +4022f0a0: 000a72 l8ui a7, a10, 0 +4022f0a3: 727265 excw +4022f0a6: 203a add.n a2, a0, a3 +4022f0a8: 736174 excw +4022f0ab: 206b addi.n a2, a0, 6 +4022f0ad: 697270 excw +4022f0b0: 6f .byte 0x6f +4022f0b1: 203c20 or a3, a12, a2 +4022f0b4: 0a6425 excw +4022f0b7: 756e00 extui a6, a0, 30, 8 +4022f0ba: 6c6c movi.n a12, -26 +4022f0bc: 6f6320 excw +4022f0bf: 746e75 excw +4022f0c2: 0a7972 excw +4022f0c5: 756300 extui a6, a0, 19, 8 +4022f0c8: 657272 excw +4022f0cb: 6e .byte 0x6e +4022f0cc: 725f74 excw +4022f0cf: 6f .byte 0x6f +4022f0d0: 657475 excw +4022f0d3: 695f72 s16i a7, a15, 210 +4022f0d6: 692064 excw +4022f0d9: 252073 excw +4022f0dc: 000a64 excw +4022f0df: 636573 excw +4022f0e2: 782520 excw +4022f0e5: 726520 excw +4022f0e8: 726f72 s32i a7, a15, 0x1c8 +4022f0eb: 000a add.n a0, a0, a0 +4022f0ed: 525b addi.n a5, a2, 5 +4022f0ef: 005d mov.n a5, a0 +4022f0f1: 575b addi.n a5, a7, 5 +4022f0f3: 005d mov.n a5, a0 +4022f0f5: 455b addi.n a4, a5, 5 +4022f0f7: 005d mov.n a5, a0 +4022f0f9: 727265 excw +4022f0fc: 6f .byte 0x6f +4022f0fd: 702072 l32i a7, a0, 0x1c0 +4022f100: 617261 l32r a6, 402076c8 +4022f103: 656d excw +4022f105: 726574 excw +4022f108: 000a add.n a0, a0, a0 +4022f10a: 6568 l32i.n a6, a5, 24 +4022f10c: 207061 l32r a6, 401f72cc <_lit4_end+0xf0fa0> +4022f10f: 203a20 or a3, a10, a2 +4022f112: 257830 extui a7, a3, 24, 3 +4022f115: 2078 l32i.n a7, a0, 8 +4022f117: 7e .byte 0x7e +4022f118: 783020 excw +4022f11b: 2c7825 excw +4022f11e: 656c20 extui a6, a2, 28, 7 +4022f121: 6e .byte 0x6e +4022f122: 203a add.n a2, a0, a3 +4022f124: 0a6425 excw +4022f127: 736200 excw +4022f12a: 202073 excw +4022f12d: 203a20 or a3, a10, a2 +4022f130: 257830 extui a7, a3, 24, 3 +4022f133: 2078 l32i.n a7, a0, 8 +4022f135: 7e .byte 0x7e +4022f136: 783020 excw +4022f139: 2c7825 excw +4022f13c: 656c20 extui a6, a2, 28, 7 +4022f13f: 6e .byte 0x6e +4022f140: 203a add.n a2, a0, a3 +4022f142: 0a6425 excw +4022f145: 6f7200 excw +4022f148: 746164 excw +4022f14b: 203a61 l32r a6, 401f7234 <_lit4_end+0xf0f08> +4022f14e: 257830 extui a7, a3, 24, 3 +4022f151: 2078 l32i.n a7, a0, 8 +4022f153: 7e .byte 0x7e +4022f154: 783020 excw +4022f157: 2c7825 excw +4022f15a: 656c20 extui a6, a2, 28, 7 +4022f15d: 6e .byte 0x6e +4022f15e: 203a add.n a2, a0, a3 +4022f160: 0a6425 excw +4022f163: 616400 excw +4022f166: 206174 excw +4022f169: 203a20 or a3, a10, a2 +4022f16c: 257830 extui a7, a3, 24, 3 +4022f16f: 2078 l32i.n a7, a0, 8 +4022f171: 7e .byte 0x7e +4022f172: 783020 excw +4022f175: 2c7825 excw +4022f178: 656c20 extui a6, a2, 28, 7 +4022f17b: 6e .byte 0x6e +4022f17c: 203a add.n a2, a0, a3 +4022f17e: 0a6425 excw +4022f181: 000a00 excw +4022f184: 7069 s32i.n a6, a0, 28 +4022f186: 253a add.n a2, a5, a3 +4022f188: 252e64 excw +4022f18b: 252e64 excw +4022f18e: 252e64 excw +4022f191: 6d2c64 excw +4022f194: 6b7361 l32r a6, 40209f60 +4022f197: 253a add.n a2, a5, a3 +4022f199: 252e64 excw +4022f19c: 252e64 excw +4022f19f: 252e64 excw +4022f1a2: 672c64 excw +4022f1a5: 253a77 bltu a10, a7, 4022f1ce +4022f1a8: 252e64 excw +4022f1ab: 252e64 excw +4022f1ae: 252e64 excw +4022f1b1: 640064 excw +4022f1b4: 706565 excw +4022f1b7: 6c7320 excw +4022f1ba: 706565 excw +4022f1bd: 6f7420 excw +4022f1c0: 6f .byte 0x6f +4022f1c1: 6f6c20 excw +4022f1c4: 6e .byte 0x6e +4022f1c5: 000a67 bnone a10, a6, 4022f1c9 +4022f1c8: 656564 excw +4022f1cb: 732070 excw +4022f1ce: 656c movi.n a5, -26 +4022f1d0: 207065 excw +4022f1d3: 6f6f74 excw +4022f1d6: 6f6c20 excw +4022f1d9: 6e .byte 0x6e +4022f1da: 000a67 bnone a10, a6, 4022f1de +4022f1dd: 746e65 excw +4022f1e0: 207265 excw +4022f1e3: 656564 excw +4022f1e6: 732070 excw +4022f1e9: 656c movi.n a5, -26 +4022f1eb: 0a7065 excw +4022f1ee: 0a3200 excw +4022f1f1: 0a3100 excw +4022f1f4: 0a3100 excw +4022f1f7: 0a3200 excw +4022f1fa: 0a3200 excw +4022f1fd: 0a3100 excw +4022f200: 657200 extui a7, a0, 18, 7 +4022f203: 6f6f62 s32i a6, a15, 0x1bc +4022f206: 742074 excw +4022f209: 6f .byte 0x6f +4022f20a: 737520 excw +4022f20d: 660065 excw +4022f210: 616c movi.n a1, -26 +4022f212: 206873 excw +4022f215: 616572 s32i a7, a5, 0x184 +4022f218: 652064 excw +4022f21b: 2c7272 excw +4022f21e: 642520 extui a2, a2, 5, 7 +4022f221: 000a add.n a0, a0, a0 +4022f223: 616c66 bnei a12, 6, 4022f288 +4022f226: 206873 excw +4022f229: 616572 s32i a7, a5, 0x184 +4022f22c: 652064 excw +4022f22f: 2c7272 excw +4022f232: 642520 extui a2, a2, 5, 7 +4022f235: 000a add.n a0, a0, a0 +4022f237: 727265 excw +4022f23a: 6f .byte 0x6f +4022f23b: 6d2072 l32i a7, a0, 0x1b4 +4022f23e: 696761 l32r a6, 402097dc +4022f241: 0a2163 excw +4022f244: 726500 excw +4022f247: 726f72 s32i a7, a15, 0x1c8 +4022f24a: 616d20 excw +4022f24d: 636967 bbci a9, 6, 4022f2b4 +4022f250: 000a21 l32r a2, 401ef278 <_lit4_end+0xe8f4c> +4022f253: 746567 bbci a5, 6, 4022f2cb +4022f256: 726920 excw +4022f259: 6f .byte 0x6f +4022f25a: 306d excw +4022f25c: 726520 excw +4022f25f: 726f72 s32i a7, a15, 0x1c8 +4022f262: 000a add.n a0, a0, a0 +4022f264: 746567 bbci a5, 6, 4022f2dc +4022f267: 6c6620 excw +4022f26a: 687361 l32r a6, 40209438 +4022f26d: 656c20 extui a6, a2, 28, 7 +4022f270: 6e .byte 0x6e +4022f271: 726520 excw +4022f274: 726f72 s32i a7, a15, 0x1c8 +4022f277: 000a add.n a0, a0, a0 +4022f279: 726177 bbci a1, 7, 4022f2ef +4022f27c: 6e .byte 0x6e +4022f27d: 203a add.n a2, a0, a3 +4022f27f: 6e6177 bbci a1, 7, 4022f2f1 +4022f282: 742074 excw +4022f285: 6f .byte 0x6f +4022f286: 726520 excw +4022f289: 657361 l32r a6, 40208858 +4022f28c: 726520 excw +4022f28f: 726f72 s32i a7, a15, 0x1c8 +4022f292: 657320 extui a7, a2, 19, 7 +4022f295: 252063 excw +4022f298: 0a2164 excw +4022f29b: 656700 extui a6, a0, 23, 7 +4022f29e: 622074 excw +4022f2a1: 6e69 s32i.n a6, a14, 24 +4022f2a3: 757320 extui a7, a2, 19, 8 +4022f2a6: 6c6d excw +4022f2a8: 206e65 excw +4022f2ab: 696166 bnei a1, 6, 4022f318 +4022f2ae: 656c movi.n a5, -26 +4022f2b0: 000a64 excw +4022f2b3: 6e6f64 excw +4022f2b6: 207427 bbci a4, 18, 4022f2da +4022f2b9: 707573 excw +4022f2bc: 726f70 excw +4022f2bf: 646574 excw +4022f2c2: 797420 excw +4022f2c5: 2e6570 excw +4022f2c8: 000a add.n a0, a0, a0 +4022f2ca: 626572 s32i a7, a5, 0x188 +4022f2cd: 6f .byte 0x6f +4022f2ce: 6f .byte 0x6f +4022f2cf: 742074 excw +4022f2d2: 6f .byte 0x6f +4022f2d3: 737520 excw +4022f2d6: 742065 excw +4022f2d9: 747365 excw +4022f2dc: 696220 excw +4022f2df: 6e .byte 0x6e +4022f2e0: 204020 or a4, a0, a2 +4022f2e3: 0a7825 excw +4022f2e6: 657400 extui a7, a0, 20, 7 +4022f2e9: 207473 excw +4022f2ec: 726c61 l32r a6, 4020bc9c +4022f2ef: 646165 excw +4022f2f2: 2079 s32i.n a7, a0, 8 +4022f2f4: 736170 excw +4022f2f7: 646573 excw +4022f2fa: 2e .byte 0x2e +4022f2fb: 000a add.n a0, a0, a0 +4022f2fd: 736572 s32i a7, a5, 0x1cc +4022f300: 726174 excw +4022f303: 742074 excw +4022f306: 6f .byte 0x6f +4022f307: 737520 excw +4022f30a: 752065 excw +4022f30d: 726573 excw +4022f310: 696220 excw +4022f313: 6e .byte 0x6e +4022f314: 204020 or a4, a0, a2 +4022f317: 0a7825 excw +4022f31a: 6f6400 excw +4022f31d: 6e .byte 0x6e +4022f31e: 207427 bbci a4, 18, 4022f342 +4022f321: 707573 excw +4022f324: 726f70 excw +4022f327: 646574 excw +4022f32a: 6c6620 excw +4022f32d: 687361 l32r a6, 402094fc +4022f330: 616d20 excw +4022f333: 0a2e70 excw +4022f336: 616600 excw +4022f339: 6c69 s32i.n a6, a12, 24 +4022f33b: 3a6465 excw +4022f33e: 656e20 extui a6, a2, 30, 7 +4022f341: 206465 excw +4022f344: 6f6f62 s32i a6, a15, 0x1bc +4022f347: 3e2074 excw +4022f34a: 203d excw +4022f34c: 332e31 l32r a3, 401fc004 <_lit4_end+0xf5cd8> +4022f34f: 000a add.n a0, a0, a0 +4022f351: 464544 excw +4022f354: 525245 call0 4028187c <_irom0_text_end+0x50d00> +4022f357: 204445 call0 4024f79c <_irom0_text_end+0x1ec20> +4022f35a: 4e5546 j 40242cb3 <_irom0_text_end+0x12137> +4022f35d: 4e2043 excw +4022f360: 424d55 excw +4022f363: 205245 call0 4024f888 <_irom0_text_end+0x1ed0c> +4022f366: 5349 s32i.n a4, a3, 20 +4022f368: 494220 excw +4022f36b: 454747 ball a7, a4, 4022f3b4 +4022f36e: 542052 l32i a5, a0, 0x150 +4022f371: 4148 l32i.n a4, a1, 16 +4022f373: 4e .byte 0x4e +4022f374: 303120 xor a3, a1, a2 +4022f377: 000a add.n a0, a0, a0 + +4022f379 : +4022f379: 5345 2d50 3025 5832 3025 5832 3025 5832 ESP-%02X%02X%02X +4022f389: 7500 6573 5f72 6e69 6574 6672 6361 2e65 .user_interface. +4022f399: 0063 6974 656d 3a34 3025 5838 000a 6974 c.time4:%08X..ti +4022f3a9: 656d 3a33 3025 5838 000a 6974 656d 3a32 me3:%08X..time2: +4022f3b9: 3025 5838 000a 6974 656d 3a31 3025 5838 %08X..time1:%08X +4022f3c9: 000a 7265 3372 652c 6378 6565 2064 616d ..err3,exceed ma +4022f3d9: 2078 6974 656d 7620 6c61 6575 000a 6974 x time value..ti +4022f3e9: 656d 3a30 3025 5838 000a 7265 3272 652c me0:%08X..err2,e +4022f3f9: 6378 6565 2064 616d 2078 6974 656d 7620 xceed max time v +4022f409: 6c61 6575 000a 7265 3172 652c 6378 6565 alue..err1,excee +4022f419: 2064 616d 2078 6974 656d 7620 6c61 6575 d max time value +4022f429: 000a 6974 656d 3a72 7025 6320 2062 7369 ..timer:%p cb is +4022f439: 6e20 6c75 0a6c 7400 6d69 3665 253a 3830 null..time6:%08 +4022f449: 0a58 7400 6d69 3565 253a 3830 0a58 7400 X..time5:%08X..t +4022f459: 6d69 3565 3a79 7025 252c 0a70 7400 6d69 ime5y:%p,%p..tim +4022f469: 3565 3a78 3025 5838 252c 3830 0a58 7400 e5x:%08X,%08X..t +4022f479: 6d69 3765 253a 3830 0a58 7400 6d69 3965 ime7:%08X..time9 +4022f489: 253a 3830 0a58 7400 6d69 3865 253a 3830 :%08X..time8:%08 +4022f499: 0a58 2900 000a 7069 253a 2e64 6425 252e X..)..ip:%d.%d.% +4022f4a9: 2e64 6425 6d2c 7361 3a6b 6425 252e 2e64 d.%d,mask:%d.%d. +4022f4b9: 6425 252e 2c64 7767 253a 2e64 6425 252e %d.%d,gw:%d.%d.% +4022f4c9: 2e64 6425 6400 6368 2070 6573 7672 7265 d.%d.dhcp server +4022f4d9: 7320 6174 7472 283a 6500 6761 656c 6c5f start:(.eagle_l +4022f4e9: 6977 5f70 6669 632e 6500 6761 656c 6c5f wip_if.c.eagle_l +4022f4f9: 6269 632e 2d00 2d2d 2d2d 2d2d 462d 6572 ib.c.--------Fre +4022f509: 2065 6425 2d2d 2d2d 2d2d 2d2d 0a0a 4600 e %d--------...F +4022f519: 253a 0973 3a4c 7525 6d09 6c61 6f6c 2063 :%s.L:%u.malloc +4022f529: 6425 4009 2520 0a78 2d00 2d2d 2d2d 2d2d %d.@ %x..------- +4022f539: 532d 6f68 2077 614d 6c6c 636f 2d2d 2d2d -Show Malloc---- +4022f549: 2d2d 2d2d 000a 7375 7265 615f 7070 4700 ----..user_app.G +4022f559: 3244 5135 3233 2043 6f43 666e 6769 5120 D25Q32C Config Q +4022f569: 6f69 4d20 646f 2065 6146 6c69 000a 4447 io Mode Fail..GD +4022f579: 3532 3351 4332 4320 6e6f 6966 2067 6951 25Q32C Config Qi +4022f589: 206f 6f4d 6564 4f20 0a4b 5200 2044 4144 o Mode OK..RD DA +4022f599: 4154 303a 2558 0a58 4700 3244 5135 3233 TA:0X%X..GD25Q32 +4022f5a9: 2043 6c41 6172 7964 5120 6f69 4d20 646f C Alrady Qio Mod +4022f5b9: 0a65 7300 6970 665f 616c 6873 725f 6165 e..spi_flash_rea +4022f5c9: 5f64 7473 7461 7375 6520 7272 000a 4951 d_status err..QI +4022f5d9: 204f 4e49 5449 4520 5252 2121 000a 4951 O INIT ERR!!..QI +4022f5e9: 204f 4e49 5449 4f20 214b 000a 6c46 7361 O INIT OK!..Flas +4022f5f9: 2068 7369 6120 726c 6165 7964 5120 4f49 h is already QIO +4022f609: 0a21 5b00 5245 5d52 6f4e 2074 6f6b 776e !..[ERR]Not konw +4022f619: 4720 3244 5135 3233 2043 7473 7461 7375 GD25Q32C status +4022f629: 6920 7864 2520 0a64 0020 455b 5252 4e5d idx %d. .[ERR]N +4022f639: 746f 6b20 6e6f 2077 4447 3532 3351 4332 ot konw GD25Q32C +4022f649: 7320 6174 7574 2073 6469 2078 6425 200a status idx %d. +4022f659: 0000 0000 0000 6500 7272 726f 203a 6c70 .......error: pl +4022f669: 5f6c 6163 206c 7865 6563 6465 2073 6d32 l_cal exceeds 2m +4022f679: 2173 2121 000a 7300 7465 6320 6168 6e6e s!!!...set chann +4022f689: 6c65 6920 206e 6c73 6565 2070 6f6d 6564 el in sleep mode +4022f699: 202c 6166 6c69 6120 646e 6520 6978 0a74 , fail and exit. +4022f6a9: 0000 0000 0000 2500 2c64 0020 0000 2500 .......%d, ....% +4022f6b9: 2c64 0020 0000 2500 2c64 2520 2c64 0020 d, ....%d, %d, . +4022f6c9: 0000 0000 0000 2500 2c64 2520 2c64 0020 .......%d, %d, . +4022f6d9: 0000 0000 0000 2500 2c64 2520 2c64 0020 .......%d, %d, . +4022f6e9: 0000 0000 0000 2500 2c64 0020 0000 0000 .......%d, ..... +4022f6f9: 0000 0000 0000 7300 7465 725f 5f78 6167 .......set_rx_ga +4022f709: 6e69 203a 6672 7874 253d 2c78 7220 7266 in: rftx=%x, rfr +4022f719: 3d78 2578 2c78 6120 7474 253d 2c64 7420 x=x%x, att=%d, t +4022f729: 6278 3d62 7830 7825 202c 6262 7872 3d31 xbb=0x%x, bbrx1= +4022f739: 7830 7825 202c 6262 7872 3d32 7830 7825 0x%x, bbrx2=0x%x +4022f749: 202c 6474 3a63 6425 252c 0a64 0000 0000 , tdc:%d,%d..... +4022f759: 0000 0000 0000 6b00 253d 3a64 7420 746f .......k=%d: tot +4022f769: 6c61 705f 7277 253d 646c 202c 616d 3d78 al_pwr=%ld, max= +4022f779: 6c25 2c64 7220 7466 3278 303d 2578 2c78 %ld, rftx2=0x%x, +4022f789: 7420 6e6f 5f65 7461 6574 3d6e 6425 000a tone_atten=%d.. +4022f799: 0000 0000 0000 2500 5f64 6425 255f 0a64 .......%d_%d_%d. +4022f7a9: 0000 0000 0000 7200 6978 5f71 6572 3a67 .......rxiq_reg: +4022f7b9: 6920 253d 2c64 6120 6d5f 7369 253d 2c64 i=%d, a_mis=%d, +4022f7c9: 7020 6d5f 7369 253d 0a64 0000 0000 0000 p_mis=%d....... +4022f7d9: 0000 0000 0000 6900 646e 7865 203a 6425 .......index: %d +4022f7e9: 7620 6c61 6575 203a 7830 7825 3020 2578 value: 0x%x 0x% +4022f7f9: 2078 7830 7825 3020 2578 0a78 0000 0000 x 0x%x 0x%x..... +4022f809: 0000 0000 0000 0a00 0000 0000 0000 0000 ................ +4022f819: 0000 0000 0000 4200 3a4b 6425 252c 2c64 .......BK:%d,%d, +4022f829: 6425 252c 2c64 7830 7825 000a 0000 0000 %d,%d,0x%x...... +4022f839: 0000 0000 0000 7400 6478 3a63 6425 252c .......txdc:%d,% +4022f849: 0a64 0000 0000 6400 7062 253a 2c64 2520 d......dbp:%d, % +4022f859: 2c78 2520 2c64 2520 2c64 2520 2c64 2520 x, %d, %d, %d, % +4022f869: 0a64 0000 0000 7000 7968 765f 7265 6973 d......phy_versi +4022f879: 6e6f 203a 6425 252e 2c64 2520 2c73 2520 on: %d.%d, %s, % +4022f889: 2c73 2520 2c73 4e20 4e4f 534f 000a 0000 s, %s, NONOS.... +4022f899: 0000 0000 0000 7000 7968 765f 7265 6973 .......phy_versi +4022f8a9: 6e6f 203a 6425 202c 7325 202c 7325 202c on: %d, %s, %s, +4022f8b9: 7325 000a 0000 7000 7261 6d61 665f 616c %s.....param_fla +4022f8c9: 3d67 7830 7825 000a 0000 0000 0000 0000 g=0x%x.......... +4022f8d9: 0000 0000 0000 7000 7968 635f 6168 6e6e .......phy_chann +4022f8e9: 6c65 6e5f 6d75 253d 2c64 2520 2c64 2520 el_num=%d, %d, % +4022f8f9: 2c64 2520 2c64 2520 2c64 3020 2578 2c78 d, %d, %d, 0x%x, +4022f909: 2520 2c64 2520 0a64 0000 0000 0000 0000 %d, %d......... +4022f919: 0000 0000 0000 7200 5f63 6163 3a6c 7220 .......rc_cal: r +4022f929: 5f78 6966 746c 645f 6163 3d70 6425 202c x_filt_dcap=%d, +4022f939: 7874 665f 6c69 5f74 6364 7061 253d 0a64 tx_filt_dcap=%d. +4022f949: 0000 0000 0000 7600 6464 3333 253d 2c64 .......vdd33=%d, +4022f959: 7420 6d65 5f70 6f63 6564 253d 2c64 6f20 temp_code=%d, o +4022f969: 6666 6573 3d74 6425 000a 0000 0000 0000 ffset=%d........ +4022f979: 0000 0000 0000 6300 6c61 725f 5f66 6e61 .......cal_rf_an +4022f989: 5f61 6167 6e69 202c 6672 675f 6961 3d6e a_gain, rf_gain= +4022f999: 7830 7825 202c 6e61 5f61 6167 6e69 303d 0x%x, ana_gain=0 +4022f9a9: 2578 0a78 0000 5200 5f58 4f4e 5349 4645 x%x....RX_NOISEF +4022f9b9: 4f4c 524f 202c 6425 000a 0000 0000 0000 LOOR, %d........ +4022f9c9: 0000 0000 0000 7200 5f78 6f6e 7369 3d65 .......rx_noise= +4022f9d9: 6425 202c 6f6c 706f 6e5f 696f 6573 6c66 %d, loop_noisefl +4022f9e9: 6f6f 3d72 6425 000a 0000 0000 0000 0000 oor=%d.......... +4022f9f9: 0000 0000 0000 5400 4358 5041 202c 2500 .......TXCAP, .% +4022fa09: 2c64 0020 0000 0a00 0000 0000 0000 0000 d, ............. +4022fa19: 0000 0000 0000 5400 5f58 4f50 4557 5f52 .......TX_POWER_ +4022fa29: 4142 4b43 464f 2c46 0020 0000 0000 0000 BACKOFF, ....... +4022fa39: 0000 0000 0000 2500 2c64 0020 0000 0a00 .......%d, ..... +4022fa49: 0000 0000 0000 5400 5f58 5750 4352 5254 .......TX_PWRCTR +4022fa59: 5f4c 5441 4554 2c4e 0020 0000 0000 0000 L_ATTEN, ....... +4022fa69: 0000 0000 0000 2500 2c64 0020 0000 0a00 .......%d, ..... +4022fa79: 0000 0000 0000 5400 4958 2c51 2520 2c64 .......TXIQ, %d, +4022fa89: 2520 0a64 0000 5400 4458 2c43 0020 0000 %d....TXDC, ... +4022fa99: 0000 0000 0000 2500 2c64 2520 3b64 0020 .......%d, %d; . +4022faa9: 0000 0000 0000 0a00 0000 0000 0000 5200 ...............R +4022fab9: 4958 2c51 0020 2500 2c64 2520 3b64 0020 XIQ, ..%d, %d; . +4022fac9: 0000 0000 0000 0a00 0000 0000 0000 5200 ...............R +4022fad9: 4458 2c43 0020 2500 2c64 2520 2c64 2520 XDC, ..%d, %d, % +4022fae9: 2c64 2520 3b64 0020 0000 0000 0000 0000 d, %d; ......... +4022faf9: 0000 0000 0000 0a00 0000 0000 0000 0000 ................ +4022fb09: 0000 0000 0000 2500 6433 252c 6433 203b .......%3d,%3d; +4022fb19: 0000 0000 0000 7400 6978 5f71 6167 6e69 .......txiq_gain +4022fb29: 253d 2c64 7420 6978 5f71 6870 7361 3d65 =%d, txiq_phase= +4022fb39: 6425 000a 0000 3100 742c 7261 6567 5f74 %d.....1,target_ +4022fb49: 6f70 6577 2c72 6425 202c 5f70 7265 6f72 power,%d, p_erro +4022fb59: 2c72 6425 202c 6f63 7272 6365 5f74 2c76 r,%d, correct_v, +4022fb69: 6425 202c 7265 6f72 5f72 6361 7563 2c6d %d, error_accum, +4022fb79: 2520 2c64 7420 746f 705f 252c 2c64 6320 %d, tot_p,%d, c +4022fb89: 616f 7474 252c 2c64 6120 7474 252c 2c64 oatt,%d, att,%d, +4022fb99: 7220 5f66 2c67 7825 202c 7874 5f71 6172 rf_g,%x, txq_ra +4022fba9: 6574 252c 2c64 6320 6168 2c6e 6425 202c te,%d, chan,%d, +4022fbb9: 6172 6574 615f 7474 252c 0a64 0000 0000 rate_att,%d..... +4022fbc9: 0000 0000 0000 3200 742c 7261 6567 5f74 .......2,target_ +4022fbd9: 6f70 6577 2c72 6425 202c 5f70 7265 6f72 power,%d, p_erro +4022fbe9: 2c72 6425 202c 6f63 7272 6365 5f74 2c76 r,%d, correct_v, +4022fbf9: 6425 202c 7265 6f72 5f72 6361 7563 2c6d %d, error_accum, +4022fc09: 2520 2c64 7420 746f 705f 252c 2c64 6320 %d, tot_p,%d, c +4022fc19: 616f 7474 252c 2c64 6120 7474 252c 2c64 oatt,%d, att,%d, +4022fc29: 7220 5f66 2c67 7825 202c 7874 5f71 6172 rf_g,%x, txq_ra +4022fc39: 6574 252c 2c64 6320 6168 2c6e 6425 202c te,%d, chan,%d, +4022fc49: 6172 6574 615f 7474 252c 0a64 0000 0000 rate_att,%d..... +4022fc59: 0000 0000 0000 6e00 6d75 6b5f 253d 2c64 .......num_k=%d, +4022fc69: 7020 776f 7265 6f5f 7475 253d 0a64 0000 power_out=%d... +4022fc79: 0000 0000 0000 7200 6765 695f 253d 2c64 .......reg_i=%d, +4022fc89: 6920 646e 7461 3d61 6425 000a 0000 0000 indata=%d...... +4022fc99: 0000 0000 0000 6900 253d 3230 2064 6120 .......i=%02d a +4022fca9: 6363 253d 3330 2064 7420 7467 253d 3330 cc=%03d tgt=%03 +4022fcb9: 2064 6520 7272 253d 3330 2064 7320 7265 d err=%03d ser +4022fcc9: 253d 3330 2064 7461 3d74 3025 6433 000a =%03d att=%03d.. +4022fcd9: 0000 0000 0000 7200 6978 5f71 6567 5f74 .......rxiq_get_ +4022fce9: 696d 3a73 7420 746f 6c61 705f 7277 253d mis: total_pwr=% +4022fcf9: 2c64 2520 2d64 6425 202c d, %d-%d, . + +4022fd04 : +4022fd04: f00d ret.n + ... + +4022fd08 : +4022fd08: f00d ret.n + ... + +4022fd0c : +4022fd0c: 020c movi.n a2, 0 +4022fd0e: f00d ret.n +4022fd10: 616e65 excw +4022fd13: 626c movi.n a2, -26 +4022fd15: 000a65 excw +4022fd18: 736964 excw +4022fd1b: 626c61 l32r a6, 402086cc +4022fd1e: 000a65 excw +4022fd21: 6e .byte 0x6e +4022fd22: 206c75 excw +4022fd25: 6f6d excw +4022fd27: 2c6564 excw +4022fd2a: 706620 excw +4022fd2d: 206d excw +4022fd2f: 747561 l32r a6, 4020cf04 <__wpa_send_eapol+0x4c8> +4022fd32: 6f .byte 0x6f +4022fd33: 6c7320 excw +4022fd36: 706565 excw +4022fd39: 657320 extui a7, a2, 19, 7 +4022fd3c: 003a74 excw +4022fd3f: 696c movi.n a9, -26 +4022fd41: 5f7473 excw +4022fd44: 6e .byte 0x6e +4022fd45: 6c6c75 excw +4022fd48: 000a add.n a0, a0, a0 +4022fd4a: 6d7066 bnei a0, 7, 4022fdbb +4022fd4d: 706f20 excw +4022fd50: 2c6e65 excw +4022fd53: 707974 excw +4022fd56: 253a65 excw +4022fd59: 252064 excw +4022fd5c: 000a64 excw +4022fd5f: 6d7066 bnei a0, 7, 4022fdd0 +4022fd62: 6c6320 excw +4022fd65: 6f .byte 0x6f +4022fd66: 206573 excw +4022fd69: 206425 excw +4022fd6c: 000a add.n a0, a0, a0 +4022fd6e: 000a add.n a0, a0, a0 +4022fd70: 742c movi.n a4, 39 +4022fd72: 7079 s32i.n a7, a0, 28 +4022fd74: 203a65 excw +4022fd77: 006425 excw +4022fd7a: 726f66 bnei a15, 6, 4022fdf0 +4022fd7d: 206563 excw +4022fd80: 706c73 excw +4022fd83: 6e6520 excw +4022fd86: 6c6261 l32r a6, 4020af10 +4022fd89: 660065 excw +4022fd8c: 6f .byte 0x6f +4022fd8d: 656372 s32i a7, a3, 0x194 +4022fd90: 6c7320 excw +4022fd93: 642070 extui a2, a7, 0, 7 +4022fd96: 7369 s32i.n a6, a3, 28 +4022fd98: 6c6261 l32r a6, 4020af20 +4022fd9b: 750065 excw +4022fd9e: 0a6c73 excw +4022fda1: 6c7300 excw +4022fda4: 000a add.n a0, a0, a0 +4022fda6: 696c movi.n a9, -26 +4022fda8: 5f7473 excw +4022fdab: 6e .byte 0x6e +4022fdac: 6c6c75 excw +4022fdaf: 000a add.n a0, a0, a0 +4022fdb1: 6e .byte 0x6e +4022fdb2: 6f .byte 0x6f +4022fdb3: 4d4954 excw +4022fdb6: 0a2121 l32r a2, 401f263c <_lit4_end+0xec310> +4022fdb9: 6d7000 excw +4022fdbc: 706f20 excw +4022fdbf: 2c6e65 excw +4022fdc2: 707974 excw +4022fdc5: 253a65 excw +4022fdc8: 252064 excw +4022fdcb: 000a64 excw +4022fdce: 206d70 or a6, a13, a7 +4022fdd1: 6f6c63 excw +4022fdd4: 206573 excw +4022fdd7: 0a6425 excw +4022fdda: 667200 excw +4022fddd: 6c6320 excw +4022fde0: 6f .byte 0x6f +4022fde1: 2c6573 excw +4022fde4: 6e .byte 0x6e +4022fde5: 6c6c75 excw +4022fde8: 746164 excw +4022fdeb: 665f61 l32r a6, 40209768 +4022fdee: 736c61 l32r a6, 4020cba0 <__wpa_send_eapol+0x164> +4022fdf1: 720065 excw +4022fdf4: 632066 bnei a0, 2, 4022fe5b +4022fdf7: 6f6c movi.n a15, -26 +4022fdf9: 2c6573 excw +4022fdfc: 6e .byte 0x6e +4022fdfd: 6c6c75 excw +4022fe00: 746164 excw +4022fe03: 745f61 l32r a6, 4020cf80 <__wpa_send_eapol+0x544> +4022fe06: 657275 excw +4022fe09: 6d7000 excw +4022fe0c: 617720 excw +4022fe0f: 656b addi.n a6, a5, 6 +4022fe11: 207075 excw +4022fe14: 3a7473 excw +4022fe17: 642520 extui a2, a2, 5, 7 +4022fe1a: 202c movi.n a0, 34 +4022fe1c: 756163 excw +4022fe1f: 3a6573 excw +4022fe22: 642520 extui a2, a2, 5, 7 +4022fe25: 000a add.n a0, a0, a0 +4022fe27: 000a add.n a0, a0, a0 +4022fe29: 742c movi.n a4, 39 +4022fe2b: 7079 s32i.n a7, a0, 28 +4022fe2d: 203a65 excw +4022fe30: 006425 excw +4022fe33: 656c73 excw +4022fe36: 207065 excw +4022fe39: 616e65 excw +4022fe3c: 656c62 s32i a6, a12, 0x194 +4022fe3f: 6c7300 excw +4022fe42: 706565 excw +4022fe45: 696420 excw +4022fe48: 626173 excw +4022fe4b: 656c movi.n a5, -26 +4022fe4d: 6e7500 excw +4022fe50: 746e63 excw +4022fe53: 000a20 excw +4022fe56: 746e63 excw +4022fe59: 000a20 excw +4022fe5c: 6e6362 s32i a6, a3, 0x1b8 +4022fe5f: 642520 extui a2, a2, 5, 7 +4022fe62: 000a add.n a0, a0, a0 +4022fe64: 646961 l32r a6, 40209008 +4022fe67: 642520 extui a2, a2, 5, 7 +4022fe6a: 000a add.n a0, a0, a0 +4022fe6c: 646461 l32r a6, 40208ffc +4022fe6f: 666920 excw +4022fe72: 0a6425 excw +4022fe75: 686300 excw +4022fe78: 692067 blt a0, a6, 4022fee5 +4022fe7b: 642566 bnei a5, 2, 4022fee3 +4022fe7e: 000a add.n a0, a0, a0 +4022fe80: 6c6564 excw +4022fe83: 666920 excw +4022fe86: 0a6425 excw +4022fe89: 747300 extui a7, a0, 3, 8 +4022fe8c: 742061 l32r a6, 4020cf0c <__wpa_send_eapol+0x4d0> +4022fe8f: 636172 s32i a7, a1, 0x18c +4022fe92: 252065 excw +4022fe95: 000a64 excw +4022fe98: 617473 excw +4022fe9b: 637320 excw +4022fe9e: 206e61 l32r a6, 401f8058 <_lit4_end+0xf1d2c> +4022fea1: 617274 excw +4022fea4: 206563 excw +4022fea7: 0a6425 excw +4022feaa: 6d4c00 excw +4022fead: 546361 l32r a6, 4020503c +4022feb0: 4278 l32i.n a7, a2, 16 +4022feb2: 6b6c movi.n a11, -26 +4022feb4: 253a add.n a2, a5, a3 +4022feb6: 000a64 excw +4022feb9: 6d4c movi.n a13, 70 +4022febb: 526361 l32r a6, 40204848 +4022febe: 4278 l32i.n a7, a2, 16 +4022fec0: 6b6c movi.n a11, -26 +4022fec2: 253a add.n a2, a5, a3 +4022fec4: 000a64 excw +4022fec7: 2e7070 excw +4022feca: 650063 excw +4022fecd: 5f6673 excw +4022fed0: 667562 excw +4022fed3: 2e .byte 0x2e +4022fed4: 740063 excw +4022fed7: 2078 l32i.n a7, a0, 8 +4022fed9: 727265 excw +4022fedc: 6f .byte 0x6f +4022fedd: 302072 l32i a7, a0, 192 +4022fee0: 2578 l32i.n a7, a5, 8 +4022fee2: 0a78 l32i.n a7, a10, 0 +4022fee4: 787400 excw +4022fee7: 747220 extui a7, a2, 2, 8 +4022feea: 652073 excw +4022feed: 6f7272 excw +4022fef0: 302072 l32i a7, a0, 192 +4022fef3: 2578 l32i.n a7, a5, 8 +4022fef5: 0a78 l32i.n a7, a10, 0 +4022fef7: 6d7200 excw +4022fefa: 696d20 excw +4022fefd: 000a73 excw +4022ff00: 206d72 s32i a7, a13, 128 +4022ff03: 0a6425 excw +4022ff06: 646100 extui a6, a0, 1, 7 +4022ff09: 252064 excw +4022ff0c: 000a64 excw +4022ff0f: 646461 l32r a6, 402090a0 +4022ff12: 696d20 excw +4022ff15: 616d73 excw +4022ff18: 686374 excw +4022ff1b: 000a add.n a0, a0, a0 +4022ff1d: 3d3d excw +4022ff1f: 0a6c64 excw +4022ff22: 647700 extui a7, a0, 7, 7 +4022ff25: 2e7665 excw +4022ff28: 000063 excw +4022ff2b: 000a00 excw +4022ff2e: 2528 l32i.n a2, a5, 8 +4022ff30: 783230 excw +4022ff33: 253a add.n a2, a5, a3 +4022ff35: 783230 excw +4022ff38: 253a add.n a2, a5, a3 +4022ff3a: 783230 excw +4022ff3d: 253a add.n a2, a5, a3 +4022ff3f: 783230 excw +4022ff42: 253a add.n a2, a5, a3 +4022ff44: 783230 excw +4022ff47: 253a add.n a2, a5, a3 +4022ff49: 783230 excw +4022ff4c: 0029 s32i.n a2, a0, 0 +4022ff4e: 666f73 excw +4022ff51: 504174 excw +4022ff54: 2b2000 excw +4022ff57: 280020 excw +4022ff5a: 323025 excw +4022ff5d: 3a78 l32i.n a7, a10, 12 +4022ff5f: 323025 excw +4022ff62: 3a78 l32i.n a7, a10, 12 +4022ff64: 323025 excw +4022ff67: 3a78 l32i.n a7, a10, 12 +4022ff69: 323025 excw +4022ff6c: 3a78 l32i.n a7, a10, 12 +4022ff6e: 323025 excw +4022ff71: 3a78 l32i.n a7, a10, 12 +4022ff73: 323025 excw +4022ff76: 2978 l32i.n a7, a9, 8 +4022ff78: 747300 extui a7, a0, 3, 8 +4022ff7b: 6e0061 l32r a6, 4020b77c +4022ff7e: 6c6c75 excw +4022ff81: 6f6d00 excw +4022ff84: 206564 excw +4022ff87: 203a add.n a2, a0, a3 +4022ff89: 000000 ill + +4022ff8c : +4022ff8c: 000001 040000 690000 656565 323038 2e3131 ........ieee8021 +4022ff9c: 632e31 6f6e00 756220 662066 20726f 6f7270 1.c.no buf for p +4022ffac: 626f72 202c65 206569 6e656c 642520 61000a robe, ie len %d. +4022ffbc: 706100 727420 656361 642520 61000a 662070 .ap trace %d..ap +4022ffcc: 726620 207165 6d756a 203070 206f74 0a6425 freq jump0 to % +4022ffdc: 000a64 656569 303865 313132 6f685f 617473 d..ieee80211_hos +4022ffec: 706174 00632e 0c0000 000000 000000 000000 tap.c........... + ... +4023000c: 00157c 020400 df028b 007f00 000000 2af800 |............... +4023001c: 002af8 030400 d50396 007500 000000 03e800 .*........u..... +4023002c: 0003e8 000000 3a0082 013a01 000000 07d000 ........:.:..... +4023003c: 0007d0 010400 020184 00a201 000001 177000 ................ +4023004c: 001770 0b0000 3c040c 003c00 000001 2ee000 p.......<.<..... +4023005c: 002ee0 0a0000 300618 003000 000001 5dc000 ........0.0..... +4023006c: 005dc0 090000 2c0830 002c00 000001 bb8000 .]....0.,.,..... +4023007c: 00bb80 080000 2c0860 002c00 000001 d2f000 ......`.,.,..... +4023008c: 00d2f0 0c0000 2c086c 002c00 000001 232800 ......l.,.,..... +4023009c: 002328 0f0000 3c0412 003c00 000001 465000 (#......<.<..... +402300ac: 004650 0e0000 300624 003000 000001 8ca000 PF....$.0.0..... +402300bc: 008ca0 0d0000 2c0848 002c00 000004 000000 ......H.,.,..... + ... +402300e0: 00157c 020400 df018b 007f00 000000 2af800 |............... +402300f0: 002af8 030400 d50196 007500 000000 03e800 .*........u..... +40230100: 0003e8 000000 3a0082 013a01 000000 07d000 ........:.:..... +40230110: 0007d0 010400 020184 00a201 000000 000000 ................ + ... +4023019c: 5f7061 736f6c 000a73 766e49 696c61 572064 ap_loss..Invalid +402301ac: 455720 6b2050 207965 0a7325 676200 73000a WEP key %s..bg. +402301bc: 637300 646e61 656e6f 66000a 257220 202c64 .scandone..f r%d +402301cc: 00202c 302066 00202c 2d2066 303032 00202c , .f 0, .f -200, +402301dc: 690020 656565 323038 5f3131 616373 632e6e .ieee80211_scan +402301ec: 00632e 6f6270 000a0d 656569 303865 313132 .c.pbo...ieee802 +402301fc: 5f3131 706e69 2e7475 6e0063 62206f 206675 11_input.c.no bu +4023020c: 662066 20726f 746361 6e6f69 726620 656d61 f for action fra +4023021c: 0a656d 747300 697461 3a6e6f 302520 3a7832 me..station: %02 +4023022c: 253a78 783230 30253a 3a7832 323025 253a78 x:%02x:%02x:%02x +4023023c: 30253a 3a7832 323025 6a2078 6e696f 41202c :%02x:%02x join, +4023024c: 494120 3d2044 642520 65000a 207272 726c61 AID = %d..err a +4023025c: 65726c 796461 736120 636f73 646569 000a21 lready associed! +4023026c: 6d000a 207861 6e6f63 63656e 6f6974 0a216e ..max connection +4023027c: 000a21 78616d 6f6320 656e6e 697463 216e6f !..max connectio +4023028c: 0a216e 747300 697461 3a6e6f 302520 3a7832 n!..station: %02 +4023029c: 253a78 783230 30253a 3a7832 323025 253a78 x:%02x:%02x:%02x +402302ac: 30253a 3a7832 323025 6c2078 766165 202c65 :%02x:%02x leave +402302bc: 41202c 204449 25203d 000a64 5f7061 6f7270 , AID = %d..ap_p +402302cc: 626f72 735f65 646e65 766f20 2c7265 657220 robe_send over, +402302dc: 736572 772074 696669 747320 757461 742073 rest wifi status +402302ec: 6f7420 696420 736173 636f73 62000a 5f6e63 to disassoc..bc +402302fc: 745f6e 6f6d69 2c7475 5f7061 6f7270 5f6562 n_timout,ap_prob +4023030c: 735f65 646e65 74735f 747261 73000a 746977 e_send_start..sw +4023031c: 637469 742068 63206f 6e6168 6c656e 642520 itch to channel +4023032c: 0a6425 6f6e00 732520 6f6620 646e75 72202c %d..no %s found, +4023033c: 657220 6e6f63 63656e 612074 657466 312072 reconnect after +4023034c: 733120 72000a 6f6365 656e6e 0a7463 745300 1s..reconnect.. +4023035c: 617453 6f6974 73206e 706f74 73202c 706f74 Station stop, st +4023036c: 20706f 616373 000a6e 5f6c77 786e63 00632e op scan..wl_cnx. +4023037c: 690063 656565 323038 5f3131 746361 6e6f69 c.ieee80211_acti +4023038c: 5f6e6f 6e6576 726f64 70735f 5f6365 747461 on_vendor_spec_a +4023039c: 617474 206863 676572 747369 207265 636572 ttach register r +402303ac: 766365 616320 206c6c 636162 65206b 6f7272 ecv call back er +402303bc: 726f72 56000a 444e45 20524f 544341 4e4f49 ror..VENDOR ACTI +402303cc: 3a4e4f 797420 206570 736964 74616d 206863 ON: type dismatc +402303dc: 252068 560064 444e45 20524f 544341 4e4f49 h %d.VENDOR ACTI +402303ec: 3a4e4f 6e7520 6f6e6b 206e77 206569 707974 ON: unknown ie t +402303fc: 657079 56000a 444e45 20524f 544341 4e4f49 ype..VENDOR ACTI +4023040c: 3a4e4f 656c20 65206e 6f7272 732072 706574 ON: len error st +4023041c: 327065 25203a 560064 444e45 20524f 544341 ep2: %d.VENDOR A +4023042c: 495443 3a4e4f 656c20 65206e 6f7272 732072 CTION: len error +4023043c: 747320 317065 25203a 000a64 617473 3a6574 step1: %d..stat +4023044c: 203a65 206425 203e2d 206425 782528 000a29 e: %d -> %d (%x) +4023045c: 69000a 656565 323038 5f3131 617473 00632e ..ieee80211_sta. +4023046c: 000063 c... + +40230470 : +40230470: 000003 000800 080000 000000 000000 ba9800 ................ +40230480: 20ba98 bb1040 444020 504348 697420 6f656d .. @.. @DHCP tim +40230490: 756f65 000a74 640000 706368 735f73 726174 eout....dhcps_st +402304a0: 747261 3a2928 6f6320 646c75 6f6e20 6f2074 art(): could not +402304b0: 626f20 696174 70206e 0a6263 000000 826300 obtain pcb..... +402304c0: 538263 736563 6f6370 5f6e6e 706374 65645f c.Scespconn_tcp_ +402304d0: 6c6564 657465 642520 25202c 000a64 726500 delete %d, %d... +402304e0: 727265 6e6920 6f6820 207473 6e6f63 63656e err in host conn +402304f0: 746365 206465 732528 000a29 636552 6f4876 ected (%s)..Recv +40230500: 6c6f48 202c64 207942 736570 6f6370 2c6e6e Hold, By pespcon +40230510: 662c6e 646e69 6f6320 5f6e6e 67736d 616620 n,find conn_msg +40230520: 696166 000a6c 520000 766365 6c6f48 202c64 fail....RecvHold +40230530: 42202c 702079 707365 6e6f63 662c6e 646e69 , By pespconn,fi +40230540: 20646e 6e6f63 6d5f6e 206773 696166 000a6c nd conn_msg fail +40230550: 00000a 706900 6f725f 657475 252072 252064 ....ip_router %d +40230560: 702520 00000a %p..... + +40230568 : +40230568: ffffff .... + +4023056c : +4023056c: 000000 .... + +40230570 : +40230570: 00001c 002400 b00000 000000 000024 001400 ....$.......$... +40230580: 000014 000800 140000 000000 000010 001400 ................ +40230590: 000014 060000 ........ + +40230598 : +40230598: fee76c e7743f 643ffe 3ffee7 fee778 l..?t..?d..?x..? + +402305a8 : +402305a8: 0c0603 603018 ....0`x + +402305af : +402305af: 030201 060504 070707 070707 732507 642520 .............%s +402305bf: 0a6425 250000 252073 000a64 732500 642520 %d...%s %d...%s +402305cf: 0a6425 250000 252073 000a64 732500 642520 %d...%s %d...%s +402305df: 0a6425 250000 252073 000a64 732500 642520 %d...%s %d...%s +402305ef: 0a6425 250000 252073 000a64 732500 642520 %d...%s %d...%s +402305ff: 0a6425 0c0000 c11204 5142f0 4f3000 443031 %d........BQ.0O1 +4023060f: c04430 045020 00b4d6 42858c 0b0002 414233 0D. P......B...3 +4023061f: 014142 0c221b 23a604 12620e c33200 446afe BA.."...#.b..2.. +4023062f: 2b446a fbc622 0000ff 051366 000222 004122 jD+".....f..".." +4023063f: 220041 4a0011 204042 4040f5 424af4 f52040 A."..JB@ .@@.JB@ +4023064f: 40f520 4af440 a58c22 113280 742820 202320 .@@.J"...2. (t +4023065f: 202023 20f420 12f420 0d10c1 # . ...... + +4023066c : +4023066c: f0c112 addi a1, a1, -16 +4023066f: f43030 extui a3, a3, 0, 16 +40230672: 036102 s32i a0, a1, 12 +40230675: fff8c5 call0 40230604 +40230678: f37c movi.n a3, -1 +4023067a: 3108 l32i.n a0, a1, 12 +4023067c: 302320 xor a2, a3, a2 +4023067f: f42020 extui a2, a2, 0, 16 +40230682: 10c112 addi a1, a1, 16 +40230685: f00d ret.n + ... + +40230688 : +40230688: e0c112 addi a1, a1, -32 +4023068b: 51d9 s32i.n a13, a1, 20 +4023068d: 0d0c movi.n a13, 0 +4023068f: 61c9 s32i.n a12, a1, 24 +40230691: 41e9 s32i.n a14, a1, 16 +40230693: 31f9 s32i.n a15, a1, 12 +40230695: 7109 s32i.n a0, a1, 28 +40230697: 02ed mov.n a14, a2 +40230699: 0dcd mov.n a12, a13 +4023069b: 01a0f2 movi a15, 1 +4023069e: eeac beqz.n a14, 402306d0 +402306a0: 051e32 l16ui a3, a14, 10 +402306a3: 1e28 l32i.n a2, a14, 4 +402306a5: fff5c5 call0 40230604 +402306a8: 22ca add.n a2, a2, a12 +402306aa: f53020 extui a3, a2, 16, 16 +402306ad: f4c020 extui a12, a2, 0, 16 +402306b0: 051e22 l16ui a2, a14, 10 +402306b3: c3ca add.n a12, a3, a12 +402306b5: 116207 bbci a2, 0, 402306ca +402306b8: 112c80 slli a2, a12, 8 +402306bb: 74c8c0 extui a12, a12, 8, 8 +402306be: c0dfd0 sub a13, a15, a13 +402306c1: 20c2c0 or a12, a2, a12 +402306c4: 74d0d0 extui a13, a13, 0, 8 +402306c7: f4c0c0 extui a12, a12, 0, 16 +402306ca: 0ee8 l32i.n a14, a14, 0 +402306cc: fff386 j 4023069e +402306cf: ad8c00 excw +402306d2: 112c80 slli a2, a12, 8 +402306d5: 74c8c0 extui a12, a12, 8, 8 +402306d8: 20c2c0 or a12, a2, a12 +402306db: f4c0c0 extui a12, a12, 0, 16 +402306de: f27c movi.n a2, -1 +402306e0: 7108 l32i.n a0, a1, 28 +402306e2: 3022c0 xor a2, a2, a12 +402306e5: f42020 extui a2, a2, 0, 16 +402306e8: 61c8 l32i.n a12, a1, 24 +402306ea: 51d8 l32i.n a13, a1, 20 +402306ec: 41e8 l32i.n a14, a1, 16 +402306ee: 31f8 l32i.n a15, a1, 12 +402306f0: 20c112 addi a1, a1, 32 +402306f3: f00d ret.n +402306f5: 000000 ill + +402306f8 : +402306f8: d0c112 addi a1, a1, -48 +402306fb: 71f9 s32i.n a15, a1, 28 +402306fd: 0f0c movi.n a15, 0 +402306ff: a1c9 s32i.n a12, a1, 40 +40230701: 91d9 s32i.n a13, a1, 36 +40230703: 81e9 s32i.n a14, a1, 32 +40230705: b109 s32i.n a0, a1, 44 +40230707: 74e050 extui a14, a5, 0, 8 +4023070a: 027d mov.n a7, a2 +4023070c: 038d mov.n a8, a3 +4023070e: f4d060 extui a13, a6, 0, 16 +40230711: 0fcd mov.n a12, a15 +40230713: 150c movi.n a5, 1 +40230715: f7bc beqz.n a7, 40230758 +40230717: 051732 l16ui a3, a7, 10 +4023071a: 1728 l32i.n a2, a7, 4 +4023071c: 2149 s32i.n a4, a1, 8 +4023071e: 3159 s32i.n a5, a1, 12 +40230720: 006172 s32i a7, a1, 0 +40230723: 1189 s32i.n a8, a1, 4 +40230725: ffedc5 call0 40230604 +40230728: 0178 l32i.n a7, a1, 0 +4023072a: 22ca add.n a2, a2, a12 +4023072c: f53020 extui a3, a2, 16, 16 +4023072f: f4c020 extui a12, a2, 0, 16 +40230732: 051722 l16ui a2, a7, 10 +40230735: c3ca add.n a12, a3, a12 +40230737: 2148 l32i.n a4, a1, 8 +40230739: 3158 l32i.n a5, a1, 12 +4023073b: 1188 l32i.n a8, a1, 4 +4023073d: 116207 bbci a2, 0, 40230752 +40230740: 112c80 slli a2, a12, 8 +40230743: 74c8c0 extui a12, a12, 8, 8 +40230746: c0f5f0 sub a15, a5, a15 +40230749: 20c2c0 or a12, a2, a12 +4023074c: 74f0f0 extui a15, a15, 0, 8 +4023074f: f4c0c0 extui a12, a12, 0, 16 +40230752: 0778 l32i.n a7, a7, 0 +40230754: ffef46 j 40230715 +40230757: af8c00 excw +4023075a: 112c80 slli a2, a12, 8 +4023075d: 74c8c0 extui a12, a12, 8, 8 +40230760: 20c2c0 or a12, a2, a12 +40230763: f4c0c0 extui a12, a12, 0, 16 +40230766: 0868 l32i.n a6, a8, 0 +40230768: 0438 l32i.n a3, a4, 0 +4023076a: f42060 extui a2, a6, 0, 16 +4023076d: f56060 extui a6, a6, 16, 16 +40230770: 626a add.n a6, a2, a6 +40230772: f42030 extui a2, a3, 0, 16 +40230775: 262a add.n a2, a6, a2 +40230777: f53030 extui a3, a3, 16, 16 +4023077a: 223a add.n a2, a2, a3 +4023077c: 4168d0 srli a6, a13, 8 +4023077f: 113d80 slli a3, a13, 8 +40230782: 206360 or a6, a3, a6 +40230785: f46060 extui a6, a6, 0, 16 +40230788: d26a add.n a13, a2, a6 +4023078a: 112e80 slli a2, a14, 8 +4023078d: 2d2a add.n a2, a13, a2 +4023078f: 22ca add.n a2, a2, a12 +40230791: f53020 extui a3, a2, 16, 16 +40230794: f4c020 extui a12, a2, 0, 16 +40230797: c3ca add.n a12, a3, a12 +40230799: f520c0 extui a2, a12, 16, 16 +4023079c: f4c0c0 extui a12, a12, 0, 16 +4023079f: c2ca add.n a12, a2, a12 +402307a1: b108 l32i.n a0, a1, 44 +402307a3: f27c movi.n a2, -1 +402307a5: 3022c0 xor a2, a2, a12 +402307a8: f42020 extui a2, a2, 0, 16 +402307ab: a1c8 l32i.n a12, a1, 40 +402307ad: 91d8 l32i.n a13, a1, 36 +402307af: 81e8 l32i.n a14, a1, 32 +402307b1: 71f8 l32i.n a15, a1, 28 +402307b3: 30c112 addi a1, a1, 48 +402307b6: f00d ret.n + +402307b8 : +402307b8: c0c112 addi a1, a1, -64 +402307bb: b1f9 s32i.n a15, a1, 44 +402307bd: 74f050 extui a15, a5, 0, 8 +402307c0: 050c movi.n a5, 0 +402307c2: e1c9 s32i.n a12, a1, 56 +402307c4: d1d9 s32i.n a13, a1, 52 +402307c6: f109 s32i.n a0, a1, 60 +402307c8: c1e9 s32i.n a14, a1, 48 +402307ca: 028d mov.n a8, a2 +402307cc: 039d mov.n a9, a3 +402307ce: f4d060 extui a13, a6, 0, 16 +402307d1: f47070 extui a7, a7, 0, 16 +402307d4: 05cd mov.n a12, a5 +402307d6: 05a816 beqz a8, 40230834 +402307d9: 057716 beqz a7, 40230834 +402307dc: 051822 l16ui a2, a8, 10 +402307df: 07ed mov.n a14, a7 +402307e1: 01b277 bgeu a2, a7, 402307e6 +402307e4: 02ed mov.n a14, a2 +402307e6: 1828 l32i.n a2, a8, 4 +402307e8: f4e0e0 extui a14, a14, 0, 16 +402307eb: 0e3d mov.n a3, a14 +402307ed: 3149 s32i.n a4, a1, 12 +402307ef: 0159 s32i.n a5, a1, 0 +402307f1: 4179 s32i.n a7, a1, 16 +402307f3: 1189 s32i.n a8, a1, 4 +402307f5: 2199 s32i.n a9, a1, 8 +402307f7: ffe0c5 call0 40230604 +402307fa: 1188 l32i.n a8, a1, 4 +402307fc: 22ca add.n a2, a2, a12 +402307fe: 4178 l32i.n a7, a1, 16 +40230800: f53020 extui a3, a2, 16, 16 +40230803: f4c020 extui a12, a2, 0, 16 +40230806: 051822 l16ui a2, a8, 10 +40230809: c0e7e0 sub a14, a7, a14 +4023080c: f470e0 extui a7, a14, 0, 16 +4023080f: c3ca add.n a12, a3, a12 +40230811: 3148 l32i.n a4, a1, 12 +40230813: 0158 l32i.n a5, a1, 0 +40230815: 2198 l32i.n a9, a1, 8 +40230817: 136207 bbci a2, 0, 4023082e +4023081a: 120c movi.n a2, 1 +4023081c: c05250 sub a5, a2, a5 +4023081f: 112c80 slli a2, a12, 8 +40230822: 74c8c0 extui a12, a12, 8, 8 +40230825: 20c2c0 or a12, a2, a12 +40230828: 745050 extui a5, a5, 0, 8 +4023082b: f4c0c0 extui a12, a12, 0, 16 +4023082e: 0888 l32i.n a8, a8, 0 +40230830: ffe886 j 402307d6 +40230833: a58c00 extui a8, a0, 28, 11 +40230836: 112c80 slli a2, a12, 8 +40230839: 74c8c0 extui a12, a12, 8, 8 +4023083c: 20c2c0 or a12, a2, a12 +4023083f: f4c0c0 extui a12, a12, 0, 16 +40230842: 0958 l32i.n a5, a9, 0 +40230844: 0438 l32i.n a3, a4, 0 +40230846: f42050 extui a2, a5, 0, 16 +40230849: f55050 extui a5, a5, 16, 16 +4023084c: 525a add.n a5, a2, a5 +4023084e: f42030 extui a2, a3, 0, 16 +40230851: 252a add.n a2, a5, a2 +40230853: f53030 extui a3, a3, 16, 16 +40230856: 223a add.n a2, a2, a3 +40230858: 4168d0 srli a6, a13, 8 +4023085b: 113d80 slli a3, a13, 8 +4023085e: 206360 or a6, a3, a6 +40230861: f46060 extui a6, a6, 0, 16 +40230864: d26a add.n a13, a2, a6 +40230866: 112f80 slli a2, a15, 8 +40230869: 2d2a add.n a2, a13, a2 +4023086b: 22ca add.n a2, a2, a12 +4023086d: f53020 extui a3, a2, 16, 16 +40230870: f4c020 extui a12, a2, 0, 16 +40230873: c3ca add.n a12, a3, a12 +40230875: f520c0 extui a2, a12, 16, 16 +40230878: f4c0c0 extui a12, a12, 0, 16 +4023087b: c2ca add.n a12, a2, a12 +4023087d: f108 l32i.n a0, a1, 60 +4023087f: f27c movi.n a2, -1 +40230881: 3022c0 xor a2, a2, a12 +40230884: f42020 extui a2, a2, 0, 16 +40230887: e1c8 l32i.n a12, a1, 56 +40230889: d1d8 l32i.n a13, a1, 52 +4023088b: c1e8 l32i.n a14, a1, 48 +4023088d: b1f8 l32i.n a15, a1, 44 +4023088f: 40c112 addi a1, a1, 64 +40230892: f00d ret.n +40230894: 617077 bbci a0, 23, 402308f9 +40230897: 5f .byte 0x5f +40230898: 747561 l32r a6, 4020da6c +4023089b: 5f68 l32i.n a6, a15, 20 +4023089d: 6569 s32i.n a6, a5, 24 +4023089f: 2e .byte 0x2e +402308a0: 470063 excw +402308a3: 756f72 s32i a7, a15, 0x1d4 +402308a6: 6b2070 excw +402308a9: 207965 excw +402308ac: 707865 excw +402308af: 736e61 l32r a6, 4020d668 +402308b2: 6f69 s32i.n a6, a15, 24 +402308b4: 6e .byte 0x6e +402308b5: 615000 excw +402308b8: 7269 s32i.n a6, a2, 28 +402308ba: 736977 bbci a9, 7, 40230931 +402308bd: 6b2065 excw +402308c0: 207965 excw +402308c3: 707865 excw +402308c6: 736e61 l32r a6, 4020d680 +402308c9: 6f69 s32i.n a6, a15, 24 +402308cb: 6e .byte 0x6e +402308cc: 6e4900 excw +402308cf: 7469 s32i.n a6, a4, 28 +402308d1: 6f4320 excw +402308d4: 746e75 excw +402308d7: 007265 excw +402308da: 617077 bbci a0, 23, 4023093f +402308dd: 5f .byte 0x5f +402308de: 747561 l32r a6, 4020dab4 +402308e1: 2e68 l32i.n a6, a14, 8 +402308e3: 630063 excw +402308e6: 6f .byte 0x6f +402308e7: 6d6d excw +402308e9: 6f .byte 0x6f +402308ea: 6e .byte 0x6e +402308eb: 2e .byte 0x2e +402308ec: 610063 excw +402308ef: 635f70 excw +402308f2: 6f .byte 0x6f +402308f3: 6e .byte 0x6e +402308f4: 676966 bnei a9, 6, 4023095f +402308f7: 2e .byte 0x2e +402308f8: 500063 excw +402308fb: 726961 l32r a6, 4020d2a0 +402308fe: 736977 bbci a9, 7, 40230975 +40230901: 6b2065 excw +40230904: 207965 excw +40230907: 707865 excw +4023090a: 736e61 l32r a6, 4020d6c4 +4023090d: 6f69 s32i.n a6, a15, 24 +4023090f: 6e .byte 0x6e +40230910: 000000 ill +40230913: 000800 excw +40230916: 060000 excw +40230919: 000000 ill +4023091c: 000006 j 40230920 +4023091f: 4d5000 excw +40230922: 204b addi.n a2, a0, 4 +40230924: 4e .byte 0x4e +40230925: 656d61 l32r a6, 40209edc +40230928: 686300 excw +4023092b: 6b6365 excw +4023092e: 6f7920 excw +40230931: 207275 excw +40230934: 617473 excw +40230937: 636974 excw +4023093a: 706920 excw +4023093d: 000a21 l32r a2, 401f0968 <_lit4_end+0xea63c> +40230940: 636864 excw +40230943: 632070 excw +40230946: 696c movi.n a9, -26 +40230948: 746e65 excw +4023094b: 747320 extui a7, a2, 3, 8 +4023094e: 747261 l32r a6, 4020db18 +40230951: 2e .byte 0x2e +40230952: 2e .byte 0x2e +40230953: 2e .byte 0x2e +40230954: 000a add.n a0, a0, a0 +40230956: 630a add.n a6, a3, a0 +40230958: 6f .byte 0x6f +40230959: 6e .byte 0x6e +4023095a: 6e .byte 0x6e +4023095b: 746365 excw +4023095e: 206465 excw +40230961: 746977 bbci a9, 7, 402309d9 +40230964: 2068 l32i.n a6, a0, 8 +40230966: 2c7325 excw +40230969: 686320 excw +4023096c: 6e6e61 l32r a6, 4020c324 +4023096f: 206c65 excw +40230972: 0a6425 excw +40230975: 707700 excw +40230978: 6d5f61 l32r a6, 4020bef4 +4023097b: 6e6961 l32r a6, 4020c320 +4023097e: 2e .byte 0x2e +4023097f: 610063 excw +40230982: 2d7365 excw +40230985: 6e69 s32i.n a6, a14, 24 +40230987: 726574 excw +4023098a: 6e .byte 0x6e +4023098b: 2d6c61 l32r a6, 401fbf3c <_lit4_end+0xf5c10> +4023098e: 636e65 excw +40230991: 2e .byte 0x2e +40230992: 700063 excw +40230995: 656c movi.n a5, -26 +40230997: 657361 l32r a6, 40209f64 +4023099a: 686320 excw +4023099d: 6b6365 excw +402309a0: 617020 excw +402309a3: 697472 excw +402309a6: 6f6974 excw +402309a9: 6e .byte 0x6e +402309aa: 797420 excw +402309ad: 206570 or a6, a5, a7 +402309b0: 206425 excw +402309b3: 646461 l32r a6, 40209b44 +402309b6: 253a72 excw +402309b9: 2078 l32i.n a7, a0, 8 +402309bb: 656c movi.n a5, -26 +402309bd: 6e .byte 0x6e +402309be: 253a add.n a2, a5, a3 +402309c0: 0d78 l32i.n a7, a13, 0 +402309c2: 000a add.n a0, a0, a0 +402309c4: 2d2d excw +402309c6: 202d excw +402309c8: 656854 excw +402309cb: 617020 excw +402309ce: 697472 excw +402309d1: 6f6974 excw +402309d4: 6e .byte 0x6e +402309d5: 617420 excw +402309d8: 656c62 s32i a6, a12, 0x194 +402309db: 697320 excw +402309de: 657a add.n a6, a5, a7 +402309e0: 736920 excw +402309e3: 616c20 excw +402309e6: 656772 s32i a7, a7, 0x194 +402309e9: 742072 l32i a7, a0, 0x1d0 +402309ec: 6168 l32i.n a6, a1, 24 +402309ee: 6e .byte 0x6e +402309ef: 6c6620 excw +402309f2: 687361 l32r a6, 4020abc0 +402309f5: 697320 excw +402309f8: 657a add.n a6, a5, a7 +402309fa: 783020 excw +402309fd: 207825 excw +40230a00: 2d2d excw +40230a02: 0d2d mov.n a2, a13 +40230a04: 000a add.n a0, a0, a0 +40230a06: 252070 extui a2, a7, 16, 3 +40230a09: 612064 excw +40230a0c: 6e .byte 0x6e +40230a0d: 702064 excw +40230a10: 642520 extui a2, a2, 5, 7 +40230a13: 6f6320 excw +40230a16: 726576 excw +40230a19: 3a6465 excw +40230a1c: 646120 extui a6, a2, 1, 7 +40230a1f: 3a7264 excw +40230a22: 257830 extui a7, a3, 24, 3 +40230a25: 2078 l32i.n a7, a0, 8 +40230a27: 202b addi.n a2, a0, 2 +40230a29: 656c movi.n a5, -26 +40230a2b: 6e .byte 0x6e +40230a2c: 303a add.n a3, a0, a3 +40230a2e: 2578 l32i.n a7, a5, 8 +40230a30: 2078 l32i.n a7, a0, 8 +40230a32: 3e .byte 0x3e +40230a33: 783020 excw +40230a36: 0d7825 excw +40230a39: 000a add.n a0, a0, a0 +40230a3b: 726170 excw +40230a3e: 746974 excw +40230a41: 6f69 s32i.n a6, a15, 24 +40230a43: 6e .byte 0x6e +40230a44: 783020 excw +40230a47: 207825 excw +40230a4a: 7a6973 excw +40230a4d: 692065 excw +40230a50: 252073 excw +40230a53: 0a0d64 excw +40230a56: 636e00 excw +40230a59: 6b68 l32i.n a6, a11, 24 +40230a5b: 253a add.n a2, a5, a3 +40230a5d: 0d78 l32i.n a7, a13, 0 +40230a5f: 000a add.n a0, a0, a0 +40230a61: 6f .byte 0x6f +40230a62: 326174 excw +40230a65: 6f6e20 excw +40230a68: 732074 excw +40230a6b: 0d7465 excw +40230a6e: 000a add.n a0, a0, a0 +40230a70: 6f .byte 0x6f +40230a71: 316174 excw +40230a74: 6f6e20 excw +40230a77: 732074 excw +40230a7a: 0d7465 excw +40230a7d: 000a add.n a0, a0, a0 +40230a7f: 6f6f62 s32i a6, a15, 0x1bc +40230a82: 6e2074 excw +40230a85: 6f .byte 0x6f +40230a86: 732074 excw +40230a89: 0d7465 excw +40230a8c: 000a add.n a0, a0, a0 +40230a8e: 737973 excw +40230a91: 6d6574 excw +40230a94: 617020 excw +40230a97: 6d6172 s32i a7, a1, 0x1b4 +40230a9a: 617020 excw +40230a9d: 697472 excw +40230aa0: 6f6974 excw +40230aa3: 6e .byte 0x6e +40230aa4: 726520 excw +40230aa7: 726f72 s32i a7, a15, 0x1c8 +40230aaa: 0a0d mov.n a0, a10 +40230aac: 746f00 extui a6, a0, 15, 8 +40230aaf: 203261 l32r a6, 401f8b78 <_lit4_end+0xf284c> +40230ab2: 726170 excw +40230ab5: 746974 excw +40230ab8: 6f69 s32i.n a6, a15, 24 +40230aba: 6e .byte 0x6e +40230abb: 726520 excw +40230abe: 726f72 s32i a7, a15, 0x1c8 +40230ac1: 0a0d mov.n a0, a10 +40230ac3: 746f00 extui a6, a0, 15, 8 +40230ac6: 203161 l32r a6, 401f8b8c <_lit4_end+0xf2860> +40230ac9: 726170 excw +40230acc: 746974 excw +40230acf: 6f69 s32i.n a6, a15, 24 +40230ad1: 6e .byte 0x6e +40230ad2: 726520 excw +40230ad5: 726f72 s32i a7, a15, 0x1c8 +40230ad8: 0a0d mov.n a0, a10 +40230ada: 207000 or a7, a0, a0 +40230add: 206425 excw +40230ae0: 7a6973 excw +40230ae3: 302065 excw +40230ae6: 2578 l32i.n a7, a5, 8 +40230ae8: 2078 l32i.n a7, a0, 8 +40230aea: 302c movi.n a0, 35 +40230aec: 2578 l32i.n a7, a5, 8 +40230aee: 2078 l32i.n a7, a0, 8 +40230af0: 727265 excw +40230af3: 0a0d mov.n a0, a10 +40230af5: 616d00 excw +40230af8: 252070 extui a2, a7, 16, 3 +40230afb: 652064 excw +40230afe: 0a7272 excw +40230b01: 696d00 excw +40230b04: 616d73 excw +40230b07: 686374 excw +40230b0a: 616d20 excw +40230b0d: 252070 extui a2, a7, 16, 3 +40230b10: 732c64 excw +40230b13: 5f6970 excw +40230b16: 7a6973 excw +40230b19: 6d5f65 excw +40230b1c: 207061 l32r a6, 401f8cdc <_lit4_end+0xf29b0> +40230b1f: 0a6425 excw +40230b22: 6d6500 excw +40230b25: 677061 l32r a6, 4020a8e8 +40230b28: 0a0d mov.n a0, a10 +40230b2a: 6d6500 excw +40230b2d: 377061 l32r a6, 401fe8f0 <_lit4_end+0xf85c4> +40230b30: 0a0d mov.n a0, a10 +40230b32: 6d6500 excw +40230b35: 317061 l32r a6, 401fd0f8 <_lit4_end+0xf6dcc> +40230b38: 0a0d mov.n a0, a10 +40230b3a: 706100 excw +40230b3d: 705f70 excw +40230b40: 747261 l32r a6, 4020dd08 +40230b43: 7469 s32i.n a6, a4, 28 +40230b45: 6f69 s32i.n a6, a15, 24 +40230b47: 6e .byte 0x6e +40230b48: 2e .byte 0x2e +40230b49: 000063 excw + +40230b4c : +40230b4c: 000002 000800 0c0000 000000 000008 b6d000 ................ +40230b5c: 20b6d0 b75840 .. @X. @ + +40230b64 : +40230b64: 000001 000400 040000 000000 000000 bbd800 ................ +40230b74: 20bbd8 bc3040 .. @0. @ + +Disassembly of section .text: + +40100000 <_stext>: +40100000: 100000 and a0, a0, a0 +40100003: 40 .byte 0x40 + +40100004 : +40100004: ffff21 l32r a2, 40100000 <_stext> +40100007: 13e720 wsr.vecbase a2 +4010000a: 015985 call0 401015a4 +4010000d: 000000 ill + +40100010 <_DebugExceptionVector>: +40100010: 007200 waiti 2 +40100013: fffe46 j 40100010 <_DebugExceptionVector> + ... + +40100020 <_NMIExceptionVector>: +40100020: 13d300 wsr.excsave3 a0 +40100023: 000785 call0 4010009c <_NMILevelVector> + ... + +40100030 <_KernelExceptionVector>: +40100030: 004100 break 1, 0 +40100033: fffe46 j 40100030 <_KernelExceptionVector> + ... + +40100050 <_UserExceptionVector>: +40100050: 13d100 wsr.excsave1 a0 +40100053: 001085 call0 4010015c <_UserExceptionVector_1> + ... + +40100070 <_DoubleExceptionVector>: +40100070: 004140 break 1, 4 +40100073: fffe46 j 40100070 <_DoubleExceptionVector> + ... +4010008e: 600000 neg a0, a0 +40100091: fe89 s32i.n a8, a14, 60 +40100093: 3f .byte 0x3f +40100094: fe8000 excw +40100097: 3f .byte 0x3f +40100098: 04ec bnez.n a4, 401000bc <_NMILevelVector+0x20> +4010009a: 10 .byte 0x10 +4010009b: 40 .byte 0x40 + +4010009c <_NMILevelVector>: +4010009c: fffd01 l32r a0, 40100090 <_DoubleExceptionVector+0x20> +4010009f: a029 s32i.n a2, a0, 40 +401000a1: fffc21 l32r a2, 40100094 <_DoubleExceptionVector+0x24> +401000a4: 9019 s32i.n a1, a0, 36 +401000a6: 0228 l32i.n a2, a2, 0 +401000a8: b039 s32i.n a3, a0, 44 +401000aa: 61d320 xsr.excsave3 a2 +401000ad: c049 s32i.n a4, a0, 48 +401000af: 8029 s32i.n a2, a0, 32 +401000b1: 03b130 rsr.epc1 a3 +401000b4: 03e840 rsr.exccause a4 +401000b7: 3039 s32i.n a3, a0, 12 +401000b9: 4049 s32i.n a4, a0, 16 +401000bb: 03ee30 rsr.excvaddr a3 +401000be: 5039 s32i.n a3, a0, 20 +401000c0: 03d140 rsr.excsave1 a4 +401000c3: 6049 s32i.n a4, a0, 24 +401000c5: d059 s32i.n a5, a0, 52 +401000c7: e069 s32i.n a6, a0, 56 +401000c9: f079 s32i.n a7, a0, 60 +401000cb: 106082 s32i a8, a0, 64 +401000ce: 116092 s32i a9, a0, 68 +401000d1: 1260a2 s32i a10, a0, 72 +401000d4: 1360b2 s32i a11, a0, 76 +401000d7: 1460c2 s32i a12, a0, 80 +401000da: 1560d2 s32i a13, a0, 84 +401000dd: 1660e2 s32i a14, a0, 88 +401000e0: 1760f2 s32i a15, a0, 92 +401000e3: ffeb11 l32r a1, 40100090 <_DoubleExceptionVector+0x20> +401000e6: 000c movi.n a0, 0 +401000e8: 322c movi.n a2, 35 +401000ea: 13e620 wsr.ps a2 +401000ed: 002010 rsync +401000f0: 0303e0 rsr.sar a14 +401000f3: 01e9 s32i.n a14, a1, 0 +401000f5: ffe8d1 l32r a13, 40100098 <_DoubleExceptionVector+0x28> +401000f8: 000dc0 callx0 a13 +401000fb: 01f8 l32i.n a15, a1, 0 +401000fd: 1303f0 wsr.sar a15 +40100100: 323c movi.n a2, 51 +40100102: 13e620 wsr.ps a2 +40100105: 002010 rsync +40100108: c148 l32i.n a4, a1, 48 +4010010a: d158 l32i.n a5, a1, 52 +4010010c: e168 l32i.n a6, a1, 56 +4010010e: f178 l32i.n a7, a1, 60 +40100110: 102182 l32i a8, a1, 64 +40100113: 112192 l32i a9, a1, 68 +40100116: 1221a2 l32i a10, a1, 72 +40100119: 1321b2 l32i a11, a1, 76 +4010011c: 1421c2 l32i a12, a1, 80 +4010011f: 1521d2 l32i a13, a1, 84 +40100122: 1621e2 l32i a14, a1, 88 +40100125: 1721f2 l32i a15, a1, 92 +40100128: 3128 l32i.n a2, a1, 12 +4010012a: 4138 l32i.n a3, a1, 16 +4010012c: 13b120 wsr.epc1 a2 +4010012f: 13e830 wsr.exccause a3 +40100132: 5128 l32i.n a2, a1, 20 +40100134: 13ee20 wsr.excvaddr a2 +40100137: 6138 l32i.n a3, a1, 24 +40100139: 13d130 wsr.excsave1 a3 +4010013c: 8108 l32i.n a0, a1, 32 +4010013e: 030330 rsr.sar a3 +40100141: ffa322 movi a2, 0x3ff +40100144: 0122c0 slli a2, a2, 20 +40100147: 130330 wsr.sar a3 +4010014a: f30c movi.n a3, 15 +4010014c: 0239 s32i.n a3, a2, 0 +4010014e: a128 l32i.n a2, a1, 40 +40100150: b138 l32i.n a3, a1, 44 +40100152: 9118 l32i.n a1, a1, 36 +40100154: 003310 rfi 3 +40100157: c00000 sub a0, a0, a0 +4010015a: ff .byte 0xff +4010015b: 3f .byte 0x3f + +4010015c <_UserExceptionVector_1>: +4010015c: 03d100 rsr.excsave1 a0 +4010015f: ffd112 addmi a1, a1, 0xffffff00 +40100162: 5129 s32i.n a2, a1, 20 +40100164: 6139 s32i.n a3, a1, 24 +40100166: fffc31 l32r a3, 40100158 <_NMILevelVector+0xbc> +40100169: 03e820 rsr.exccause a2 +4010016c: a03230 addx4 a3, a2, a3 +4010016f: 0338 l32i.n a3, a3, 0 +40100171: 7149 s32i.n a4, a1, 28 +40100173: 0003a0 jx a3 +40100176: 000000 ill +40100179: bfe000 excw +4010017c: 4b1c movi.n a11, 20 +4010017e: cc4000 excw +40100181: 400024 excw +40100184: fffd51 l32r a5, 40100178 <_UserExceptionVector_1+0x1c> +40100187: c0c112 addi a1, a1, -64 +4010018a: 013d mov.n a3, a1 +4010018c: 442c movi.n a4, 36 +4010018e: 225a add.n a2, a2, a5 +40100190: f109 s32i.n a0, a1, 60 +40100192: fffa01 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100195: 0000c0 callx0 a0 +40100198: 012d mov.n a2, a1 +4010019a: fff901 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +4010019d: 0000c0 callx0 a0 +401001a0: f108 l32i.n a0, a1, 60 +401001a2: 40c112 addi a1, a1, 64 +401001a5: f00d ret.n +401001a7: 001c00 excw +401001aa: a06000 addx4 a6, a0, a0 +401001ad: 000186 j 401001b7 <_UserExceptionVector_1+0x5b> +401001b0: 000000 ill +401001b3: c11260 mul16u a1, a2, a6 +401001b6: 21c9f0 srai a12, a15, 9 +401001b9: 11d9 s32i.n a13, a1, 4 +401001bb: 3109 s32i.n a0, a1, 12 +401001bd: 02cd mov.n a12, a2 +401001bf: 015845 call0 40101744 +401001c2: 02dd mov.n a13, a2 +401001c4: fff931 l32r a3, 401001a8 <_UserExceptionVector_1+0x4c> +401001c7: 0020c0 memw +401001ca: 0328 l32i.n a2, a3, 0 +401001cc: 7da032 movi a3, 125 +401001cf: 752020 extui a2, a2, 16, 8 +401001d2: 0eb327 bgeu a3, a2, 401001e4 <_UserExceptionVector_1+0x88> +401001d5: 0156c5 call0 40101744 +401001d8: fff531 l32r a3, 401001ac <_UserExceptionVector_1+0x50> +401001db: c022d0 sub a2, a2, a13 +401001de: 0a3327 bltu a3, a2, 401001ec <_UserExceptionVector_1+0x90> +401001e1: fff7c6 j 401001c4 <_UserExceptionVector_1+0x68> +401001e4: fff321 l32r a2, 401001b0 <_UserExceptionVector_1+0x54> +401001e7: 0020c0 memw +401001ea: 02c9 s32i.n a12, a2, 0 +401001ec: 3108 l32i.n a0, a1, 12 +401001ee: 020c movi.n a2, 0 +401001f0: 21c8 l32i.n a12, a1, 8 +401001f2: 11d8 l32i.n a13, a1, 4 +401001f4: 10c112 addi a1, a1, 16 +401001f7: f00d ret.n +401001f9: 000000 ill +401001fc: f0c112 addi a1, a1, -16 +401001ff: 3109 s32i.n a0, a1, 12 +40100201: 742020 extui a2, a2, 0, 8 +40100204: 099266 bnei a2, 10, 40100211 <_UserExceptionVector_1+0xb5> +40100207: d20c movi.n a2, 13 +40100209: fffa85 call0 401001b4 <_UserExceptionVector_1+0x58> +4010020c: a20c movi.n a2, 10 +4010020e: 000106 j 40100216 <_UserExceptionVector_1+0xba> +40100211: d30c movi.n a3, 13 +40100213: 021237 beq a2, a3, 40100219 <_UserExceptionVector_1+0xbd> +40100216: fff9c5 call0 401001b4 <_UserExceptionVector_1+0x58> +40100219: 3108 l32i.n a0, a1, 12 +4010021b: 10c112 addi a1, a1, 16 +4010021e: f00d ret.n +40100220: 000730 excw +40100223: 60 .byte 0x60 + +40100224 : +40100224: b0c112 addi a1, a1, -80 +40100227: 136102 s32i a0, a1, 76 +4010022a: 1261c2 s32i a12, a1, 72 +4010022d: 1161d2 s32i a13, a1, 68 +40100230: 1061e2 s32i a14, a1, 64 +40100233: 0f61f2 s32i a15, a1, 60 +40100236: 03e860 rsr.exccause a6 +40100239: 03b150 rsr.epc1 a5 +4010023c: 03b2f0 rsr.epc2 a15 +4010023f: 03b3e0 rsr.epc3 a14 +40100242: 03eed0 rsr.excvaddr a13 +40100245: 03c0c0 rsr.depc a12 +40100248: 1ca042 movi a4, 28 +4010024b: 013d mov.n a3, a1 +4010024d: 020c movi.n a2, 0 +4010024f: 9159 s32i.n a5, a1, 36 +40100251: 086162 s32i a6, a1, 32 +40100254: 016385 call0 40101890 +40100257: fff231 l32r a3, 40100220 <_UserExceptionVector_1+0xc4> +4010025a: 120c movi.n a2, 1 +4010025c: 0020c0 memw +4010025f: 0329 s32i.n a2, a3, 0 +40100261: 8168 l32i.n a6, a1, 32 +40100263: 9158 l32i.n a5, a1, 36 +40100265: 0129 s32i.n a2, a1, 0 +40100267: 013d mov.n a3, a1 +40100269: c41c movi.n a4, 28 +4010026b: 020c movi.n a2, 0 +4010026d: 31f9 s32i.n a15, a1, 12 +4010026f: 41e9 s32i.n a14, a1, 16 +40100271: 51d9 s32i.n a13, a1, 20 +40100273: 61c9 s32i.n a12, a1, 24 +40100275: 1169 s32i.n a6, a1, 4 +40100277: 2159 s32i.n a5, a1, 8 +40100279: 014f05 call0 4010176c +4010027c: 132102 l32i a0, a1, 76 +4010027f: 1221c2 l32i a12, a1, 72 +40100282: 1121d2 l32i a13, a1, 68 +40100285: 1021e2 l32i a14, a1, 64 +40100288: f1f8 l32i.n a15, a1, 60 +4010028a: 50c112 addi a1, a1, 80 +4010028d: f00d ret.n +4010028f: 803800 add a3, a8, a0 +40100292: fe .byte 0xfe +40100293: 3f .byte 0x3f +40100294: 4678 l32i.n a7, a6, 16 +40100296: 00 .byte 00 +40100297: 40 .byte 0x40 + +40100298 : +40100298: f0c112 addi a1, a1, -16 +4010029b: 3109 s32i.n a0, a1, 12 +4010029d: 05d8c5 call0 4010602c +401002a0: 220b addi.n a2, a2, -1 +401002a2: 030c movi.n a3, 0 +401002a4: 140c movi.n a4, 1 +401002a6: 834320 moveqz a4, a3, a2 +401002a9: fff921 l32r a2, 40100290 +401002ac: 744040 extui a4, a4, 0, 8 +401002af: 000222 l8ui a2, a2, 0 +401002b2: 0a1237 beq a2, a3, 401002c0 +401002b5: 111266 bnei a2, 1, 401002ca +401002b8: 030c movi.n a3, 0 +401002ba: 120c movi.n a2, 1 +401002bc: 000106 j 401002c4 +401002bf: 030c00 excw +401002c2: 032d mov.n a2, a3 +401002c4: fff401 l32r a0, 40100294 +401002c7: 0000c0 callx0 a0 +401002ca: 3108 l32i.n a0, a1, 12 +401002cc: 10c112 addi a1, a1, 16 +401002cf: f00d ret.n +401002d1: 000000 ill +401002d4: ffc714 excw +401002d7: 3f .byte 0x3f +401002d8: 22f013 excw +401002db: eff740 excw +401002de: e64022 s8i a2, a0, 230 +401002e1: ef .byte 0xef +401002e2: c74022 s8i a2, a0, 199 +401002e5: ef .byte 0xef +401002e6: af4022 s8i a2, a0, 175 +401002e9: ef .byte 0xef +401002ea: 964022 s8i a2, a0, 150 +401002ed: ef .byte 0xef +401002ee: 874022 s8i a2, a0, 135 +401002f1: ef .byte 0xef +401002f2: 6a4022 s8i a2, a0, 106 +401002f5: ef .byte 0xef +401002f6: 564022 s8i a2, a0, 86 +401002f9: ef .byte 0xef +401002fa: 3a4022 s8i a2, a0, 58 +401002fd: ef .byte 0xef +401002fe: 1f4022 s8i a2, a0, 31 +40100301: ef .byte 0xef +40100302: 004022 s8i a2, a0, 0 +40100305: ef .byte 0xef +40100306: e54022 s8i a2, a0, 229 +40100309: ee .byte 0xee +4010030a: c64022 s8i a2, a0, 198 +4010030d: ee .byte 0xee +4010030e: b14022 s8i a2, a0, 177 +40100311: ee .byte 0xee +40100312: 984022 s8i a2, a0, 152 +40100315: ee .byte 0xee +40100316: 7c4022 s8i a2, a0, 124 +40100319: ee .byte 0xee +4010031a: 5f4022 s8i a2, a0, 95 +4010031d: ee .byte 0xee +4010031e: 454022 s8i a2, a0, 69 +40100321: ee .byte 0xee +40100322: 274022 s8i a2, a0, 39 +40100325: ee .byte 0xee +40100326: 0b4022 s8i a2, a0, 11 +40100329: ee .byte 0xee +4010032a: f34022 s8i a2, a0, 243 +4010032d: 22ed excw +4010032f: edda40 excw +40100332: d84022 s8i a2, a0, 216 +40100335: 22ed excw +40100337: ed9340 excw +4010033a: 744022 s8i a2, a0, 116 +4010033d: 0f .byte 0xf +4010033e: 8c4000 excw +40100341: 400044 excw +40100344: 214410 srai a4, a1, 4 +40100347: c11240 mul16u a1, a2, a4 +4010034a: 6102b0 excw +4010034d: 61c213 excw +40100350: 61d212 addmi a1, a2, 0x6100 +40100353: 61e211 l32r a1, 400d8adc <__floatsidf+0xca7ec> +40100356: f1f910 excw +40100359: fff801 l32r a0, 4010033c +4010035c: 0000c0 callx0 a0 +4010035f: ffdd21 l32r a2, 401002d4 +40100362: 0228 l32i.n a2, a2, 0 +40100364: fff701 l32r a0, 40100340 +40100367: 0000c0 callx0 a0 +4010036a: fff2c5 call0 40100298 +4010036d: 03e8c0 rsr.exccause a12 +40100370: 03b1f0 rsr.epc1 a15 +40100373: 03b2e0 rsr.epc2 a14 +40100376: 03b3d0 rsr.epc3 a13 +40100379: 03ee20 rsr.excvaddr a2 +4010037c: 8129 s32i.n a2, a1, 32 +4010037e: 03c020 rsr.depc a2 +40100381: 9129 s32i.n a2, a1, 36 +40100383: ffd521 l32r a2, 401002d8 +40100386: 203cc0 or a3, a12, a12 +40100389: 012485 call0 401015d4 +4010038c: d20c movi.n a2, 13 +4010038e: 029c27 bne a12, a2, 40100394 +40100391: 0033c6 j 40100464 +40100394: 6432c7 bltu a2, a12, 401003fc +40100397: ffd521 l32r a2, 401002ec +4010039a: 024c66 bnei a12, 4, 401003a0 +4010039d: 003ec6 j 4010049c +401003a0: 245cf6 bgeui a12, 5, 401003c8 +401003a3: ffcf21 l32r a2, 401002e0 +401003a6: 021c66 bnei a12, 1, 401003ac +401003a9: 003bc6 j 4010049c +401003ac: ffcc21 l32r a2, 401002dc +401003af: 0e9c16 beqz a12, 4010049c +401003b2: ffcc21 l32r a2, 401002e4 +401003b5: 022c66 bnei a12, 2, 401003bb +401003b8: 003806 j 4010049c +401003bb: ffcb21 l32r a2, 401002e8 +401003be: 023c66 bnei a12, 3, 401003c4 +401003c1: 0035c6 j 4010049c +401003c4: 003446 j 40100499 +401003c7: cc2100 excw +401003ca: ff .byte 0xff +401003cb: 028c66 bnei a12, 8, 401003d1 +401003ce: 003286 j 4010049c +401003d1: 820c movi.n a2, 8 +401003d3: 1432c7 bltu a2, a12, 401003eb +401003d6: ffc621 l32r a2, 401002f0 +401003d9: 025c66 bnei a12, 5, 401003df +401003dc: 002f06 j 4010049c +401003df: ffc521 l32r a2, 401002f4 +401003e2: 026c66 bnei a12, 6, 401003e8 +401003e5: 002cc6 j 4010049c +401003e8: 002b46 j 40100499 +401003eb: 920c movi.n a2, 9 +401003ed: 6b1c27 beq a12, a2, 4010045c +401003f0: ffc421 l32r a2, 40100300 +401003f3: 02ac66 bnei a12, 12, 401003f9 +401003f6: 002886 j 4010049c +401003f9: 002706 j 40100499 +401003fc: 421c movi.n a2, 20 +401003fe: 7a1c27 beq a12, a2, 4010047c +40100401: 2d32c7 bltu a2, a12, 40100432 +40100404: ffc321 l32r a2, 40100310 +40100407: 02bc66 bnei a12, 16, 4010040d +4010040a: 002386 j 4010049c +4010040d: 021c movi.n a2, 16 +4010040f: 0f32c7 bltu a2, a12, 40100422 +40100412: e20c movi.n a2, 14 +40100414: 541c27 beq a12, a2, 4010046c +40100417: f20c movi.n a2, 15 +40100419: 7c9c27 bne a12, a2, 40100499 +4010041c: ffbc21 l32r a2, 4010030c +4010041f: 001e46 j 4010049c +40100422: 121c movi.n a2, 17 +40100424: 4c1c27 beq a12, a2, 40100474 +40100427: 221c movi.n a2, 18 +40100429: 6c9c27 bne a12, a2, 40100499 +4010042c: ffbb21 l32r a2, 40100318 +4010042f: 001a46 j 4010049c +40100432: a21c movi.n a2, 26 +40100434: 521c27 beq a12, a2, 4010048a +40100437: 0f32c7 bltu a2, a12, 4010044a +4010043a: 821c movi.n a2, 24 +4010043c: 441c27 beq a12, a2, 40100484 +4010043f: 921c movi.n a2, 25 +40100441: 549c27 bne a12, a2, 40100499 +40100444: ffb821 l32r a2, 40100324 +40100447: 001446 j 4010049c +4010044a: c21c movi.n a2, 28 +4010044c: 401c27 beq a12, a2, 40100490 +4010044f: d21c movi.n a2, 29 +40100451: 449c27 bne a12, a2, 40100499 +40100454: ffb721 l32r a2, 40100330 +40100457: 001046 j 4010049c +4010045a: 210000 srai a0, a0, 0 +4010045d: ffa8 l32i.n a10, a15, 60 +4010045f: 000e46 j 4010049c +40100462: 210000 srai a0, a0, 0 +40100465: ffa8 l32i.n a10, a15, 60 +40100467: 000c46 j 4010049c +4010046a: 210000 srai a0, a0, 0 +4010046d: 46ffa7 bbsi a15, 26, 401004b7 +40100470: 000a add.n a0, a0, a0 +40100472: 210000 srai a0, a0, 0 +40100475: ffa8 l32i.n a10, a15, 60 +40100477: 000846 j 4010049c +4010047a: 210000 srai a0, a0, 0 +4010047d: ffa8 l32i.n a10, a15, 60 +4010047f: 000646 j 4010049c +40100482: 210000 srai a0, a0, 0 +40100485: 46ffa7 bbsi a15, 26, 401004cf +40100488: 210004 excw +4010048b: c6ffa7 bbsi a15, 26, 40100455 +4010048e: 210002 l8ui a0, a0, 33 +40100491: 46ffa7 bbsi a15, 26, 401004db +40100494: 000001 l32r a0, 400c0494 <__floatsidf+0xb21a4> +40100497: 210000 srai a0, a0, 0 +4010049a: 45ffa6 blti a15, 0x100, 401004e3 +4010049d: 720113 excw +401004a0: 680921 l32r a2, 400da4c4 <__floatsidf+0xcc1d4> +401004a3: a52181 l32r a8, 400e9928 <__floatsidf+0xdb638> +401004a6: ff .byte 0xff +401004a7: 0d5d mov.n a5, a13 +401004a9: 0e4d mov.n a4, a14 +401004ab: 0f3d mov.n a3, a15 +401004ad: 011245 call0 401015d4 +401004b0: ff5c31 l32r a3, 40100220 <_UserExceptionVector_1+0xc4> +401004b3: 220c movi.n a2, 2 +401004b5: 0020c0 memw +401004b8: 0329 s32i.n a2, a3, 0 +401004ba: 0129 s32i.n a2, a1, 0 +401004bc: 8128 l32i.n a2, a1, 32 +401004be: c41c movi.n a4, 28 +401004c0: 5129 s32i.n a2, a1, 20 +401004c2: 9128 l32i.n a2, a1, 36 +401004c4: 013d mov.n a3, a1 +401004c6: 6129 s32i.n a2, a1, 24 +401004c8: 020c movi.n a2, 0 +401004ca: 11c9 s32i.n a12, a1, 4 +401004cc: 21f9 s32i.n a15, a1, 8 +401004ce: 31e9 s32i.n a14, a1, 12 +401004d0: 41d9 s32i.n a13, a1, 16 +401004d2: 012985 call0 4010176c +401004d5: ff9b01 l32r a0, 40100344 +401004d8: 0000c0 callx0 a0 +401004db: ffff06 j 401004db +401004de: 000000 ill +401004e1: 3ff000 excw +401004e4: fe8be0 excw +401004e7: 3f .byte 0x3f +401004e8: 060c movi.n a6, 0 +401004ea: 00 .byte 00 +401004eb: 60 .byte 0x60 + +401004ec : +401004ec: f0c112 addi a1, a1, -16 +401004ef: fffc31 l32r a3, 401004e0 +401004f2: 3109 s32i.n a0, a1, 12 +401004f4: 056c movi.n a5, -32 +401004f6: e40c movi.n a4, 14 +401004f8: 0020c0 memw +401004fb: 0328 l32i.n a2, a3, 0 +401004fd: 102250 and a2, a2, a5 +40100500: 202240 or a2, a2, a4 +40100503: 0020c0 memw +40100506: 0329 s32i.n a2, a3, 0 +40100508: 0020c0 memw +4010050b: 0328 l32i.n a2, a3, 0 +4010050d: e7e207 bbsi a2, 0, 401004f8 +40100510: fff521 l32r a2, 401004e4 +40100513: 0228 l32i.n a2, a2, 0 +40100515: 128c beqz.n a2, 4010051a +40100517: 0002c0 callx0 a2 +4010051a: 08a022 movi a2, 8 +4010051d: 05b7c5 call0 4010609c +40100520: fff231 l32r a3, 401004e8 +40100523: feaf22 movi a2, -2 +40100526: 0020c0 memw +40100529: 002342 l32i a4, a3, 0 +4010052c: 3108 l32i.n a0, a1, 12 +4010052e: 102420 and a2, a4, a2 +40100531: 0020c0 memw +40100534: 0329 s32i.n a2, a3, 0 +40100536: 10c112 addi a1, a1, 16 +40100539: f00d ret.n +4010053b: 100000 and a0, a0, a0 +4010053e: 000000 ill +40100541: 000810 excw +40100544: fe88e0 excw +40100547: 3f .byte 0x3f +40100548: 0318 l32i.n a1, a3, 0 +4010054a: fc6000 excw +4010054d: 401001 l32r a0, 400d0590 <__floatsidf+0xc22a0> +40100550: 021c movi.n a2, 16 +40100552: cc6000 excw +40100555: 000014 excw +40100558: 000000 ill +4010055b: 0f .byte 0xf +4010055c: 080000 excw +4010055f: 000000 ill +40100562: 000004 excw +40100565: 001000 excw +40100568: 200000 or a0, a0, a0 +4010056b: 000000 ill +4010056e: 000040 excw +40100571: 008000 excw +40100574: 000000 ill +40100577: 020801 l32r a0, 400c0d98 <__floatsidf+0xb2aa8> +4010057a: 286000 excw +4010057d: 3ff000 excw +40100580: 000800 excw +40100583: efff60 excw +40100586: ff .byte 0xff +40100587: ff .byte 0xff +40100588: fff000 excw +4010058b: ff .byte 0xff +4010058c: fe8040 excw +4010058f: 3f .byte 0x3f +40100590: 0014a4 excw +40100593: 000000 ill +40100596: 00f000 excw +40100599: b00000 addx8 a0, a0, a0 +4010059c: ff .byte 0xff +4010059d: ff .byte 0xff +4010059e: ff .byte 0xff +4010059f: ef .byte 0xef +401005a0: 000000 ill +401005a3: 0000e0 excw +401005a6: 678000 excw +401005a9: 22ec bnez.n a2, 401005cf +401005ab: 85f840 extui a15, a4, 24, 9 +401005ae: fe .byte 0xfe +401005af: 3f .byte 0x3f +401005b0: 000000 ill +401005b3: 1010d0 and a1, a0, a13 +401005b6: 104020 and a4, a0, a2 +401005b9: 402010 excw +401005bc: 0014c4 excw +401005bf: 100800 and a0, a8, a0 +401005c2: 0008 l32i.n a0, a0, 0 +401005c4: 081010 excw +401005c7: 101800 and a1, a8, a0 +401005ca: 0008 l32i.n a0, a0, 0 +401005cc: 860c movi.n a6, 8 +401005ce: fe .byte 0xfe +401005cf: 3f .byte 0x3f +401005d0: 8619 s32i.n a1, a6, 32 +401005d2: fe .byte 0xfe +401005d3: 3f .byte 0x3f +401005d4: ff .byte 0xff +401005d5: 0f .byte 0xf +401005d6: 140000 extui a0, a0, 0, 2 +401005d9: 0009 s32i.n a0, a0, 0 +401005db: 000060 excw +401005de: 803000 add a3, a0, a0 +401005e1: ff .byte 0xff +401005e2: 0f .byte 0xf +401005e3: 000000 ill +401005e6: 784000 excw +401005e9: fee8 l32i.n a14, a14, 60 +401005eb: 3f .byte 0x3f +401005ec: 55aa add.n a5, a5, a10 +401005ee: 55aa add.n a5, a5, a10 +401005f0: 55ab addi.n a5, a5, 10 +401005f2: 55aa add.n a5, a5, a10 +401005f4: 22ec77 bbsi a12, 7, 4010061a +401005f7: e13040 excw +401005fa: fe .byte 0xfe +401005fb: 3f .byte 0x3f +401005fc: 0348 l32i.n a4, a3, 0 +401005fe: 544010 extui a4, a1, 0, 6 +40100601: 101d excw +40100603: 005c40 excw +40100606: 583ff0 excw +40100609: 3ff000 excw +4010060c: f00054 excw +4010060f: 3f .byte 0x3f +40100610: f00050 subx8 a0, a0, a5 +40100613: 3f .byte 0x3f +40100614: f049 s32i.n a4, a0, 60 +40100616: 3e4022 s8i a2, a0, 62 +40100619: 4022f0 excw +4010061c: dbf8 l32i.n a15, a11, 52 +4010061e: fe .byte 0xfe +4010061f: 3f .byte 0x3f +40100620: f03a add.n a15, a0, a3 +40100622: 354022 s8i a2, a0, 53 +40100625: 4022f0 excw +40100628: 22f031 l32r a3, 400c91e8 <__floatsidf+0xbaef8> +4010062b: df2440 excw +4010062e: fe .byte 0xfe +4010062f: 3f .byte 0x3f +40100630: f02d break.n 0 +40100632: c24022 s8i a2, a0, 194 +40100635: 3ffee5 excw +40100638: fedc16 beqz a12, 40100629 +4010063b: 3f .byte 0x3f +4010063c: ed8b addi.n a14, a13, 8 +4010063e: 784022 s8i a2, a0, 120 +40100641: 22ed excw +40100643: ed7440 excw +40100646: 6e4022 s8i a2, a0, 110 +40100649: 22ed excw +4010064b: dc1040 excw +4010064e: fe .byte 0xfe +4010064f: 3f .byte 0x3f +40100650: 04a8c0 extui a10, a12, 8, 1 +40100653: ffff01 l32r a0, 40100650 +40100656: ff .byte 0xff +40100657: dc3600 excw +4010065a: fe .byte 0xfe +4010065b: 3f .byte 0x3f +4010065c: 22c440 excw +4010065f: dc2040 excw +40100662: fe .byte 0xfe +40100663: 3f .byte 0x3f +40100664: e9fc bnez.n a9, 401006a6 +40100666: ff .byte 0xff +40100667: ff .byte 0xff +40100668: fee204 excw +4010066b: 3f .byte 0x3f +4010066c: e13c movi.n a1, 62 +4010066e: fe .byte 0xfe +4010066f: 3f .byte 0x3f +40100670: fee167 bbsi a1, 6, 40100672 +40100673: 3f .byte 0x3f +40100674: ff0000 excw +40100677: 0f1c00 excw +4010067a: 346000 extui a6, a0, 0, 4 +4010067d: 0008 l32i.n a0, a0, 0 +4010067f: 083860 excw +40100682: 6c6000 excw +40100685: 4022f0 excw +40100688: fedc44 excw +4010068b: 3f .byte 0x3f +4010068c: dc1c movi.n a12, 29 +4010068e: fe .byte 0xfe +4010068f: 3f .byte 0x3f +40100690: dc38 l32i.n a3, a12, 52 +40100692: fe .byte 0xfe +40100693: 3f .byte 0x3f +40100694: fe8b80 excw +40100697: 3f .byte 0x3f +40100698: 22ed52 excw +4010069b: 271040 excw +4010069e: dc0000 excw +401006a1: fe8b addi.n a15, a14, 8 +401006a3: 3f .byte 0x3f +401006a4: 8628 l32i.n a2, a6, 32 +401006a6: fe .byte 0xfe +401006a7: 3f .byte 0x3f +401006a8: 22f026 beqi a0, 0x100, 401006ce +401006ab: 54d040 extui a13, a4, 0, 6 +401006ae: 3f4010 excw +401006b1: 22ed excw +401006b3: ed2940 excw +401006b6: 194022 s8i a2, a0, 25 +401006b9: 22ed excw +401006bb: ed0940 excw +401006be: f94022 s8i a2, a0, 249 +401006c1: 22ec bnez.n a2, 401006e7 +401006c3: ecf040 excw +401006c6: c04022 s8i a2, a0, 192 +401006c9: 3ffe83 excw +401006cc: 22ecc2 excw +401006cf: 107c40 and a7, a12, a4 +401006d2: f86000 excw +401006d5: 600011 l32r a1, 400d86d8 <__floatsidf+0xca3e8> +401006d8: 22eca2 excw +401006db: 107840 and a7, a8, a4 +401006de: e66000 excw +401006e1: ce .byte 0xce +401006e2: fe .byte 0xfe +401006e3: 3f .byte 0x3f +401006e4: fecee4 excw +401006e7: 3f .byte 0x3f +401006e8: fedc34 excw +401006eb: 3f .byte 0x3f +401006ec: fedc40 excw +401006ef: 3f .byte 0x3f +401006f0: fee524 excw +401006f3: 3f .byte 0x3f +401006f4: fee124 excw +401006f7: 3f .byte 0x3f +401006f8: 0014e0 excw +401006fb: 14e400 extui a14, a0, 4, 2 +401006fe: ec0000 excw +40100701: 000014 excw +40100704: 14e8 l32i.n a14, a4, 4 +40100706: f00000 subx8 a0, a0, a0 +40100709: 000014 excw +4010070c: 242c movi.n a4, 34 +4010070e: 1c4000 excw +40100711: 4000e2 l8ui a14, a0, 64 +40100714: 004a00 break 10, 0 +40100717: 4a4c40 excw +4010071a: 7c4000 excw +4010071d: 402111 l32r a1, 400d07a4 <__floatsidf+0xc24b4> +40100720: 0018b4 excw +40100723: 045440 extui a5, a4, 4, 1 +40100726: cc4000 excw +40100729: 21da add.n a2, a1, a13 +4010072b: 548840 extui a8, a4, 8, 6 +4010072e: a84021 l32r a2, 400ea830 <__floatsidf+0xdc540> +40100731: de .byte 0xde +40100732: 484000 excw +40100735: 402117 blt a1, a1, 40100779 +40100738: 0258 l32i.n a5, a2, 0 +4010073a: bc4021 l32r a2, 400ef83c <__floatsidf+0xe154c> +4010073d: 212c movi.n a1, 34 +4010073f: 478040 excw +40100742: 384021 l32r a2, 400ce844 <__floatsidf+0xc0554> +40100745: 402281 l32r a8, 400d07d0 <__floatsidf+0xc24e0> +40100748: 786c movi.n a8, -25 +4010074a: d84022 s8i a2, a0, 216 +4010074d: 2138 l32i.n a3, a1, 8 +4010074f: 2b9440 excw +40100752: 684021 l32r a2, 400da854 <__floatsidf+0xcc564> +40100755: 2f .byte 0x2f +40100756: e84022 s8i a2, a0, 232 +40100759: 002a add.n a0, a0, a2 +4010075b: 127440 excw +4010075e: f04021 l32r a2, 400fc860 <__floatsidf+0xee570> +40100761: 402145 call0 40140978 <_lit4_end+0x3a64c> +40100764: 0368 l32i.n a6, a3, 0 +40100766: e04021 l32r a2, 400f8868 <__floatsidf+0xea578> +40100769: 400025 excw +4010076c: 0018a4 excw +4010076f: 028440 excw +40100772: 684021 l32r a2, 400da874 <__floatsidf+0xcc584> +40100775: 4021a7 blt a1, a10, 401007b9 +40100778: 9edc bnez.n a14, 40100795 +4010077a: 244021 l32r a2, 400c987c <__floatsidf+0xbb58c> +4010077d: 9f .byte 0x9f +4010077e: cc4021 l32r a2, 400f3880 <__floatsidf+0xe5590> +40100781: 2e .byte 0x2e +40100782: 3c4000 excw +40100785: 4021a0 excw +40100788: 0108 l32i.n a0, a1, 0 +4010078a: 644021 l32r a2, 400d988c <__floatsidf+0xcb59c> +4010078d: 402155 excw +40100790: 5bec bnez.n a11, 401007b9 +40100792: 044020 extui a4, a2, 0, 1 +40100795: 402227 blt a2, a2, 401007d9 +40100798: 2235d4 excw +4010079b: 134440 excw +4010079e: 284022 s8i a2, a0, 40 +401007a1: 1f .byte 0x1f +401007a2: 884020 excw +401007a5: 0f .byte 0xf +401007a6: a84000 excw +401007a9: 0f .byte 0xf +401007aa: 604000 neg a4, a0 +401007ad: 4021f5 excw +401007b0: 21e764 excw +401007b3: 554c40 extui a4, a4, 28, 6 +401007b6: 284021 l32r a2, 400ca8b8 <__floatsidf+0xbc5c8> +401007b9: 402094 excw +401007bc: 223930 excw +401007bf: 9f5c40 excw +401007c2: b84021 l32r a2, 400ee8c4 <__floatsidf+0xe05d4> +401007c5: 402111 l32r a1, 400d084c <__floatsidf+0xc255c> +401007c8: 6408 l32i.n a0, a4, 24 +401007ca: 684021 l32r a2, 400da8cc <__floatsidf+0xcc5dc> +401007cd: 402101 l32r a0, 400d0854 <__floatsidf+0xc2564> +401007d0: 215430 srai a5, a3, 4 +401007d3: 205440 or a5, a4, a4 +401007d6: 2c4020 excw +401007d9: 4020b4 excw +401007dc: 52a8 l32i.n a10, a2, 20 +401007de: d44020 extui a4, a2, 0, 14 +401007e1: 228a add.n a2, a2, a8 +401007e3: 259840 extui a9, a4, 24, 3 +401007e6: fc4021 l32r a2, 400ff8e8 <__floatsidf+0xf15f8> +401007e9: 402127 blt a1, a2, 4010082d +401007ec: ffc791 l32r a9, 40100708 +401007ef: e0c112 addi a1, a1, -32 +401007f2: ff5521 l32r a2, 40100548 +401007f5: 7109 s32i.n a0, a1, 28 +401007f7: 61c9 s32i.n a12, a1, 24 +401007f9: 51d9 s32i.n a13, a1, 20 +401007fb: 31f9 s32i.n a15, a1, 12 +401007fd: 41e9 s32i.n a14, a1, 16 +401007ff: c01190 sub a1, a1, a9 +40100802: 0020c0 memw +40100805: 02d8 l32i.n a13, a2, 0 +40100807: 02d9c5 call0 401035a4 +4010080a: ff50f1 l32r a15, 4010054c +4010080d: 25d0d0 extui a13, a13, 16, 3 +40100810: 0f2d mov.n a2, a15 +40100812: ffbe01 l32r a0, 4010070c +40100815: 0000c0 callx0 a0 +40100818: ff4e31 l32r a3, 40100550 +4010081b: ff4ec1 l32r a12, 40100554 +4010081e: 0020c0 memw +40100821: 0348 l32i.n a4, a3, 0 +40100823: 022c movi.n a2, 32 +40100825: 202420 or a2, a4, a2 +40100828: 0020c0 memw +4010082b: 0329 s32i.n a2, a3, 0 +4010082d: 440c movi.n a4, 4 +4010082f: 31ca add.n a3, a1, a12 +40100831: 020c movi.n a2, 0 +40100833: fe5201 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100836: 0000c0 callx0 a0 +40100839: 220c movi.n a2, 2 +4010083b: 295d26 beqi a13, 5, 40100868 +4010083e: ff4531 l32r a3, 40100554 +40100841: 213a add.n a2, a1, a3 +40100843: 0228 l32i.n a2, a2, 0 +40100845: 352820 extui a2, a2, 24, 4 +40100848: 0532e6 bgei a2, 3, 40100851 +4010084b: 222b addi.n a2, a2, 2 +4010084d: 0005c6 j 40100868 +40100850: 402100 ssa8l a1 +40100853: ff .byte 0xff +40100854: ff4131 l32r a3, 40100558 +40100857: 212a add.n a2, a1, a2 +40100859: 0228 l32i.n a2, a2, 0 +4010085b: 240c movi.n a4, 2 +4010085d: 102230 and a2, a2, a3 +40100860: c03230 sub a3, a2, a3 +40100863: 120c movi.n a2, 1 +40100865: 932430 movnez a2, a4, a3 +40100868: ff3b31 l32r a3, 40100554 +4010086b: fe9ae1 l32r a14, 401002d4 +4010086e: 313a add.n a3, a1, a3 +40100870: 0338 l32i.n a3, a3, 0 +40100872: 353c30 extui a3, a3, 28, 4 +40100875: 5b4326 beqi a3, 4, 401008d4 +40100878: 1553f6 bgeui a3, 5, 40100891 +4010087b: fe8541 l32r a4, 40100290 +4010087e: 3b1326 beqi a3, 1, 401008bd +40100881: 03bc beqz.n a3, 401008b5 +40100883: 452326 beqi a3, 2, 401008cc +40100886: 643366 bnei a3, 3, 401008ee +40100889: 0e38 l32i.n a3, a14, 0 +4010088b: ff3751 l32r a5, 40100568 +4010088e: 000c06 j 401008c2 +40100891: 597326 beqi a3, 7, 401008ee +40100894: 0d83f6 bgeui a3, 8, 401008a5 +40100897: 415326 beqi a3, 5, 401008dc +4010089a: 506366 bnei a3, 6, 401008ee +4010089d: 0e38 l32i.n a3, a14, 0 +4010089f: ff3341 l32r a4, 4010056c +401008a2: 0010c6 j 401008e9 +401008a5: 3b8326 beqi a3, 8, 401008e4 +401008a8: 940c movi.n a4, 9 +401008aa: 409347 bne a3, a4, 401008ee +401008ad: 0e38 l32i.n a3, a14, 0 +401008af: ff3141 l32r a4, 40100574 +401008b2: 000cc6 j 401008e9 +401008b5: 0e38 l32i.n a3, a14, 0 +401008b7: ff2951 l32r a5, 4010055c +401008ba: 000106 j 401008c2 +401008bd: 0e38 l32i.n a3, a14, 0 +401008bf: ff2851 l32r a5, 40100560 +401008c2: 1359 s32i.n a5, a3, 4 +401008c4: 030c movi.n a3, 0 +401008c6: 004432 s8i a3, a4, 0 +401008c9: 000c06 j 401008fd +401008cc: 0e38 l32i.n a3, a14, 0 +401008ce: ff2551 l32r a5, 40100564 +401008d1: fffb46 j 401008c2 +401008d4: 0e38 l32i.n a3, a14, 0 +401008d6: ff2541 l32r a4, 4010056c +401008d9: 000586 j 401008f3 +401008dc: 0e38 l32i.n a3, a14, 0 +401008de: ff2241 l32r a4, 40100568 +401008e1: 000106 j 401008e9 +401008e4: 0e38 l32i.n a3, a14, 0 +401008e6: ff2241 l32r a4, 40100570 +401008e9: 1349 s32i.n a4, a3, 4 +401008eb: 000386 j 401008fd +401008ee: 0e38 l32i.n a3, a14, 0 +401008f0: ff1b41 l32r a4, 4010055c +401008f3: 1349 s32i.n a4, a3, 4 +401008f5: fe6631 l32r a3, 40100290 +401008f8: 040c movi.n a4, 0 +401008fa: 004342 s8i a4, a3, 0 +401008fd: 341266 bnei a2, 1, 40100935 +40100900: ff1e41 l32r a4, 40100578 +40100903: ff0e21 l32r a2, 4010053c +40100906: 0020c0 memw +40100909: 0438 l32i.n a3, a4, 0 +4010090b: 203320 or a3, a3, a2 +4010090e: 0020c0 memw +40100911: 0439 s32i.n a3, a4, 0 +40100913: ff1a31 l32r a3, 4010057c +40100916: 0020c0 memw +40100919: 0348 l32i.n a4, a3, 0 +4010091b: ff1931 l32r a3, 40100580 +4010091e: 0020c0 memw +40100921: 0358 l32i.n a5, a3, 0 +40100923: 056417 bbci a4, 1, 4010092c +40100926: 00a242 movi a4, 0x200 +40100929: 000086 j 4010092f +4010092c: 00a142 movi a4, 0x100 +4010092f: 204540 or a4, a5, a4 +40100932: 001146 j 4010097b +40100935: 420b addi.n a4, a2, -1 +40100937: 212120 srai a2, a2, 1 +4010093a: 220b addi.n a2, a2, -1 +4010093c: 113480 slli a3, a4, 8 +4010093f: 1122c0 slli a2, a2, 4 +40100942: 223a add.n a2, a2, a3 +40100944: 224a add.n a2, a2, a4 +40100946: ff0c41 l32r a4, 40100578 +40100949: ff0e31 l32r a3, 40100584 +4010094c: 0020c0 memw +4010094f: 0458 l32i.n a5, a4, 0 +40100951: 103530 and a3, a5, a3 +40100954: 0020c0 memw +40100957: 0439 s32i.n a3, a4, 0 +40100959: ff0831 l32r a3, 4010057c +4010095c: 0020c0 memw +4010095f: 0348 l32i.n a4, a3, 0 +40100961: ff0731 l32r a3, 40100580 +40100964: 0020c0 memw +40100967: 0358 l32i.n a5, a3, 0 +40100969: 086417 bbci a4, 1, 40100975 +4010096c: ffad42 movi a4, 0xfffffdff +4010096f: 000146 j 40100978 +40100972: 000000 ill +40100975: ffae42 movi a4, 0xfffffeff +40100978: 104540 and a4, a5, a4 +4010097b: 0020c0 memw +4010097e: 0349 s32i.n a4, a3, 0 +40100980: fefe41 l32r a4, 40100578 +40100983: ff0131 l32r a3, 40100588 +40100986: 0020c0 memw +40100989: 0458 l32i.n a5, a4, 0 +4010098b: 103530 and a3, a5, a3 +4010098e: 202320 or a2, a3, a2 +40100991: 0020c0 memw +40100994: 0429 s32i.n a2, a4, 0 +40100996: 0e28 l32i.n a2, a14, 0 +40100998: 32c8 l32i.n a12, a2, 12 +4010099a: 1228 l32i.n a2, a2, 4 +4010099c: 0c3d mov.n a3, a12 +4010099e: ff5c01 l32r a0, 40100710 +401009a1: 0000c0 callx0 a0 +401009a4: fdc2f2 addi a15, a2, -3 +401009a7: fefa31 l32r a3, 40100590 +401009aa: 220b addi.n a2, a2, -1 +401009ac: fef8d1 l32r a13, 4010058c +401009af: 8222c0 mull a2, a2, a12 +401009b2: 042c movi.n a4, 32 +401009b4: 313a add.n a3, a1, a3 +401009b6: 0df9 s32i.n a15, a13, 0 +401009b8: 14d1c2 addmi a12, a1, 0x1400 +401009bb: fdf001 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +401009be: 0000c0 callx0 a0 +401009c1: a40c22 l8ui a2, a12, 164 +401009c4: 428c beqz.n a2, 401009cc +401009c6: 01a022 movi a2, 1 +401009c9: a44c22 s8i a2, a12, 164 +401009cc: 0e38 l32i.n a3, a14, 0 +401009ce: a40c22 l8ui a2, a12, 164 +401009d1: 032352 l32i a5, a3, 12 +401009d4: 8022f0 add a2, a2, a15 +401009d7: 10d1d2 addmi a13, a1, 0x1000 +401009da: 822250 mull a2, a2, a5 +401009dd: a4a442 movi a4, 0x4a4 +401009e0: 0d3d mov.n a3, a13 +401009e2: fde601 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +401009e5: 0000c0 callx0 a0 +401009e8: a40c22 l8ui a2, a12, 164 +401009eb: ff4451 l32r a5, 401006fc +401009ee: a032c0 addx4 a3, a2, a12 +401009f1: a022c0 addx4 a2, a2, a12 +401009f4: 2c2222 l32i a2, a2, 176 +401009f7: ff4041 l32r a4, 401006f8 +401009fa: 551a add.n a5, a5, a1 +401009fc: 2e2332 l32i a3, a3, 184 +401009ff: 0529 s32i.n a2, a5, 0 +40100a01: 0d28 l32i.n a2, a13, 0 +40100a03: 804410 add a4, a4, a1 +40100a06: 0439 s32i.n a3, a4, 0 +40100a08: 443820 extui a3, a2, 8, 5 +40100a0b: 144020 extui a4, a2, 0, 2 +40100a0e: 412220 srli a2, a2, 2 +40100a11: 04e020 extui a14, a2, 0, 1 +40100a14: 081426 beqi a4, 1, 40100a20 +40100a17: 01a0e2 movi a14, 1 +40100a1a: 3022e0 xor a2, a2, a14 +40100a1d: 10e2e0 and a14, a2, a14 +40100a20: fecd21 l32r a2, 40100554 +40100a23: fedc51 l32r a5, 40100594 +40100a26: 212a add.n a2, a1, a2 +40100a28: 0248 l32i.n a4, a2, 0 +40100a2a: fedc21 l32r a2, 4010059c +40100a2d: 106450 and a6, a4, a5 +40100a30: feda51 l32r a5, 40100598 +40100a33: 565a add.n a5, a6, a5 +40100a35: 0c0527 bnone a5, a2, 40100a45 +40100a38: feda21 l32r a2, 401005a0 +40100a3b: 104420 and a4, a4, a2 +40100a3e: fed921 l32r a2, 401005a4 +40100a41: 242a add.n a2, a4, a2 +40100a43: 52ec bnez.n a2, 40100a6c +40100a45: fcc332 addi a3, a3, -4 +40100a48: 743030 extui a3, a3, 0, 8 +40100a4b: b21c movi.n a2, 27 +40100a4d: 0f3237 bltu a2, a3, 40100a60 +40100a50: fe1021 l32r a2, 40100290 +40100a53: 030c movi.n a3, 0 +40100a55: 0e8c beqz.n a14, 40100a59 +40100a57: 130c movi.n a3, 1 +40100a59: 004232 s8i a3, a2, 0 +40100a5c: 000306 j 40100a6c +40100a5f: d22100 excw +40100a62: fe .byte 0xfe +40100a63: ff7205 call0 40100184 <_UserExceptionVector_1+0x28> +40100a66: ffff06 j 40100a66 +40100a69: 000000 ill +40100a6c: 055f85 call0 40106068 +40100a6f: 212216 beqz a2, 40100c85 +40100a72: fece21 l32r a2, 401005ac +40100a75: fdc201 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40100a78: 0000c0 callx0 a0 +40100a7b: 021e26 beqi a14, 1, 40100a81 +40100a7e: 0080c6 j 40100c85 +40100a81: feb421 l32r a2, 40100554 +40100a84: 802120 add a2, a1, a2 +40100a87: 002232 l32i a3, a2, 0 +40100a8a: fec221 l32r a2, 40100594 +40100a8d: 103320 and a3, a3, a2 +40100a90: fec821 l32r a2, 401005b0 +40100a93: 802320 add a2, a3, a2 +40100a96: fec131 l32r a3, 4010059c +40100a99: 020237 bnone a2, a3, 40100a9f +40100a9c: 007946 j 40100c85 +40100a9f: fec621 l32r a2, 401005b8 +40100aa2: fec431 l32r a3, 401005b4 +40100aa5: 021327 beq a3, a2, 40100aab +40100aa8: 007646 j 40100c85 +40100aab: fec4e1 l32r a14, 401005bc +40100aae: fea421 l32r a2, 40100540 +40100ab1: e1ea add.n a14, a1, a14 +40100ab3: 0e3d mov.n a3, a14 +40100ab5: 840c movi.n a4, 8 +40100ab7: fdb101 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100aba: 0000c0 callx0 a0 +40100abd: 000e32 l8ui a3, a14, 0 +40100ac0: eaa022 movi a2, 234 +40100ac3: 051327 beq a3, a2, 40100acc +40100ac6: 0e0c movi.n a14, 0 +40100ac8: 001e46 j 40100b45 +40100acb: bd2100 excw +40100ace: fe .byte 0xfe +40100acf: 840c movi.n a4, 8 +40100ad1: 013d mov.n a3, a1 +40100ad3: fdaa01 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100ad6: 0000c0 callx0 a0 +40100ad9: feb821 l32r a2, 401005bc +40100adc: 11f8 l32i.n a15, a1, 4 +40100ade: e12a add.n a14, a1, a2 +40100ae0: feb921 l32r a2, 401005c4 +40100ae3: 0e3d mov.n a3, a14 +40100ae5: 840c movi.n a4, 8 +40100ae7: 802f20 add a2, a15, a2 +40100aea: fda401 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100aed: 0000c0 callx0 a0 +40100af0: 000e32 l8ui a3, a14, 0 +40100af3: e9a022 movi a2, 233 +40100af6: cc9327 bne a3, a2, 40100ac6 +40100af9: feb361 l32r a6, 401005c8 +40100afc: feb051 l32r a5, 401005bc +40100aff: 6f6a add.n a6, a15, a6 +40100b01: 18cfe2 addi a14, a15, 24 +40100b04: 515a add.n a5, a1, a5 +40100b06: 0f0c movi.n a15, 0 +40100b08: 010522 l8ui a2, a5, 1 +40100b0b: 36bf27 bgeu a15, a2, 40100b45 +40100b0e: fefc71 l32r a7, 40100700 +40100b11: 840c movi.n a4, 8 +40100b13: 771a add.n a7, a7, a1 +40100b15: 0759 s32i.n a5, a7, 0 +40100b17: fefb71 l32r a7, 40100704 +40100b1a: 013d mov.n a3, a1 +40100b1c: 771a add.n a7, a7, a1 +40100b1e: 062d mov.n a2, a6 +40100b20: 0769 s32i.n a6, a7, 0 +40100b22: fd9601 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100b25: 0000c0 callx0 a0 +40100b28: fef731 l32r a3, 40100704 +40100b2b: 1128 l32i.n a2, a1, 4 +40100b2d: 331a add.n a3, a3, a1 +40100b2f: fef441 l32r a4, 40100700 +40100b32: 0368 l32i.n a6, a3, 0 +40100b34: 228b addi.n a2, a2, 8 +40100b36: 441a add.n a4, a4, a1 +40100b38: 662a add.n a6, a6, a2 +40100b3a: ee2a add.n a14, a14, a2 +40100b3c: ff1b addi.n a15, a15, 1 +40100b3e: 0458 l32i.n a5, a4, 0 +40100b40: fff106 j 40100b08 +40100b43: 210000 srai a0, a0, 0 +40100b46: 3dfea1 l32r a10, 400d0340 <__floatsidf+0xc2050> +40100b49: 0e .byte 0xe +40100b4a: fd8d01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40100b4d: 0000c0 callx0 a0 +40100b50: f20c movi.n a2, 15 +40100b52: c022e0 sub a2, a2, a14 +40100b55: 342020 extui a2, a2, 0, 4 +40100b58: ee5b addi.n a14, a14, 5 +40100b5a: e2ea add.n a14, a2, a14 +40100b5c: fe8221 l32r a2, 40100564 +40100b5f: 02b2e7 bgeu a2, a14, 40100b65 +40100b62: 00a0e2 movi a14, 0 +40100b65: fe9a21 l32r a2, 401005d0 +40100b68: 0e3d mov.n a3, a14 +40100b6a: fd8501 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40100b6d: 0000c0 callx0 a0 +40100b70: fe9931 l32r a3, 401005d4 +40100b73: 01a142 movi a4, 0x101 +40100b76: 3e3a add.n a3, a14, a3 +40100b78: 213c30 srai a3, a3, 12 +40100b7b: f34a add.n a15, a3, a4 +40100b7d: 28a4f7 bge a4, a15, 40100ba9 +40100b80: fe9651 l32r a5, 401005d8 +40100b83: fee061 l32r a6, 40100704 +40100b86: 73a022 movi a2, 115 +40100b89: 0020c0 memw +40100b8c: 0529 s32i.n a2, a5, 0 +40100b8e: 661a add.n a6, a6, a1 +40100b90: 202440 or a2, a4, a4 +40100b93: 006642 s32i a4, a6, 0 +40100b96: fedf01 l32r a0, 40100714 +40100b99: 0000c0 callx0 a0 +40100b9c: feda71 l32r a7, 40100704 +40100b9f: 771a add.n a7, a7, a1 +40100ba1: 0748 l32i.n a4, a7, 0 +40100ba3: 441b addi.n a4, a4, 1 +40100ba5: fff506 j 40100b7d +40100ba8: 65f100 extui a15, a0, 17, 7 +40100bab: fe .byte 0xfe +40100bac: 301ea6 blti a14, 1, 40100be0 +40100baf: fe6341 l32r a4, 4010053c +40100bb2: 013d mov.n a3, a1 +40100bb4: 0f2d mov.n a2, a15 +40100bb6: fd7101 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100bb9: 0000c0 callx0 a0 +40100bbc: fe6851 l32r a5, 4010055c +40100bbf: fe5f41 l32r a4, 4010053c +40100bc2: 013d mov.n a3, a1 +40100bc4: 2f5a add.n a2, a15, a5 +40100bc6: fed401 l32r a0, 40100718 +40100bc9: 0000c0 callx0 a0 +40100bcc: fe8321 l32r a2, 401005d8 +40100bcf: 73a032 movi a3, 115 +40100bd2: 10dff2 addmi a15, a15, 0x1000 +40100bd5: f0dee2 addmi a14, a14, 0xfffff000 +40100bd8: 0020c0 memw +40100bdb: 0239 s32i.n a3, a2, 0 +40100bdd: fff2c6 j 40100bac +40100be0: 054845 call0 40106068 +40100be3: 292226 beqi a2, 2, 40100c10 +40100be6: fe5541 l32r a4, 4010053c +40100be9: 203110 or a3, a1, a1 +40100bec: 00a022 movi a2, 0 +40100bef: fd6301 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100bf2: 0000c0 callx0 a0 +40100bf5: 002132 l32i a3, a1, 0 +40100bf8: fe6721 l32r a2, 40100594 +40100bfb: 102320 and a2, a3, a2 +40100bfe: fe7731 l32r a3, 401005dc +40100c01: 539237 bne a2, a3, 40100c58 +40100c04: 030122 l8ui a2, a1, 3 +40100c07: 343020 extui a3, a2, 0, 4 +40100c0a: 025c movi.n a2, 80 +40100c0c: 0015c6 j 40100c67 +40100c0f: 4bf100 excw +40100c12: fe .byte 0xfe +40100c13: fda0e2 movi a14, 253 +40100c16: fe7271 l32r a7, 401005e0 +40100c19: feba51 l32r a5, 40100704 +40100c1c: 6e7a add.n a6, a14, a7 +40100c1e: 116640 slli a6, a6, 12 +40100c21: 551a add.n a5, a5, a1 +40100c23: 0569 s32i.n a6, a5, 0 +40100c25: 0f4d mov.n a4, a15 +40100c27: 013d mov.n a3, a1 +40100c29: 062d mov.n a2, a6 +40100c2b: fd5401 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +40100c2e: 0000c0 callx0 a0 +40100c31: 0e2d mov.n a2, a14 +40100c33: feb801 l32r a0, 40100714 +40100c36: 0000c0 callx0 a0 +40100c39: feb271 l32r a7, 40100704 +40100c3c: fe4821 l32r a2, 4010055c +40100c3f: 771a add.n a7, a7, a1 +40100c41: 0768 l32i.n a6, a7, 0 +40100c43: 0f4d mov.n a4, a15 +40100c45: 013d mov.n a3, a1 +40100c47: 262a add.n a2, a6, a2 +40100c49: ee1b addi.n a14, a14, 1 +40100c4b: feb301 l32r a0, 40100718 +40100c4e: 0000c0 callx0 a0 +40100c51: c1fe66 bnei a14, 0x100, 40100c16 +40100c54: ffe386 j 40100be6 +40100c57: 633100 excw +40100c5a: fe .byte 0xfe +40100c5b: 0e9237 bne a2, a3, 40100c6d +40100c5e: 030122 l8ui a2, a1, 3 +40100c61: 343020 extui a3, a2, 0, 4 +40100c64: 60a022 movi a2, 96 +40100c67: 202320 or a2, a3, a2 +40100c6a: 034122 s8i a2, a1, 3 +40100c6d: 020c movi.n a2, 0 +40100c6f: fea901 l32r a0, 40100714 +40100c72: 0000c0 callx0 a0 +40100c75: fe3141 l32r a4, 4010053c +40100c78: 013d mov.n a3, a1 +40100c7a: 020c movi.n a2, 0 +40100c7c: fea701 l32r a0, 40100718 +40100c7f: 0000c0 callx0 a0 +40100c82: 00a805 call0 40101704 +40100c85: ff6105 call0 40100298 +40100c88: fe2f21 l32r a2, 40100544 +40100c8b: fe5731 l32r a3, 401005e8 +40100c8e: 040c movi.n a4, 0 +40100c90: 08b237 bgeu a2, a3, 40100c9c +40100c93: 004242 s8i a4, a2, 0 +40100c96: 221b addi.n a2, a2, 1 +40100c98: fffd06 j 40100c90 +40100c9b: 2c2100 excw +40100c9e: fe .byte 0xfe +40100c9f: fe9b01 l32r a0, 4010070c +40100ca2: 0000c0 callx0 a0 +40100ca5: 2a2c22 l32i a2, a12, 168 +40100ca8: fe5131 l32r a3, 401005ec +40100cab: 3a9237 bne a2, a3, 40100ce9 +40100cae: 302c32 l32i a3, a12, 192 +40100cb1: fe4f21 l32r a2, 401005f0 +40100cb4: 802320 add a2, a3, a2 +40100cb7: 002216 beqz a2, 40100cbd +40100cba: 0a0366 bnei a3, -1, 40100cc8 +40100cbd: fe8f21 l32r a2, 401006fc +40100cc0: 221a add.n a2, a2, a1 +40100cc2: 002222 l32i a2, a2, 0 +40100cc5: 09c226 beqi a2, 32, 40100cd2 +40100cc8: fe4b21 l32r a2, 401005f4 +40100ccb: 009085 call0 401015d4 +40100cce: 000686 j 40100cec +40100cd1: 032c00 excw +40100cd4: 0d2d mov.n a2, a13 +40100cd6: fe9101 l32r a0, 4010071c +40100cd9: 0000c0 callx0 a0 +40100cdc: fe8731 l32r a3, 401006f8 +40100cdf: 331a add.n a3, a3, a1 +40100ce1: 0338 l32i.n a3, a3, 0 +40100ce3: e19327 bne a3, a2, 40100cc8 +40100ce6: 000086 j 40100cec +40100ce9: db0266 bnei a2, -1, 40100cc8 +40100cec: 0d28 l32i.n a2, a13, 0 +40100cee: 02e237 bbsi a2, 3, 40100cf4 +40100cf1: 01e205 call0 40102b14 +40100cf4: fe41c1 l32r a12, 401005f8 +40100cf7: a4a442 movi a4, 0x4a4 +40100cfa: 0d3d mov.n a3, a13 +40100cfc: 0c2d mov.n a2, a12 +40100cfe: fe8801 l32r a0, 40100720 +40100d01: 0000c0 callx0 a0 +40100d04: fe3ed1 l32r a13, 401005fc +40100d07: 920c movi.n a2, 9 +40100d09: 0d3d mov.n a3, a13 +40100d0b: fe8601 l32r a0, 40100724 +40100d0e: 0000c0 callx0 a0 +40100d11: 0d3d mov.n a3, a13 +40100d13: 020c movi.n a2, 0 +40100d15: fe8301 l32r a0, 40100724 +40100d18: 0000c0 callx0 a0 +40100d1b: 0d3d mov.n a3, a13 +40100d1d: 220c movi.n a2, 2 +40100d1f: fe8101 l32r a0, 40100724 +40100d22: 0000c0 callx0 a0 +40100d25: fe3631 l32r a3, 40100600 +40100d28: 320c movi.n a2, 3 +40100d2a: fe7e01 l32r a0, 40100724 +40100d2d: 0000c0 callx0 a0 +40100d30: 0d3d mov.n a3, a13 +40100d32: 1ca022 movi a2, 28 +40100d35: fe7b01 l32r a0, 40100724 +40100d38: 0000c0 callx0 a0 +40100d3b: 0d3d mov.n a3, a13 +40100d3d: d21c movi.n a2, 29 +40100d3f: fe7901 l32r a0, 40100724 +40100d42: 0000c0 callx0 a0 +40100d45: 0d3d mov.n a3, a13 +40100d47: 08a022 movi a2, 8 +40100d4a: fe7601 l32r a0, 40100724 +40100d4d: 0000c0 callx0 a0 +40100d50: fe7601 l32r a0, 40100728 +40100d53: 0000c0 callx0 a0 +40100d56: fe7501 l32r a0, 4010072c +40100d59: 0000c0 callx0 a0 +40100d5c: fe2b31 l32r a3, 40100608 +40100d5f: fe2921 l32r a2, 40100604 +40100d62: 0020c0 memw +40100d65: 0228 l32i.n a2, a2, 0 +40100d67: 0020c0 memw +40100d6a: 0368 l32i.n a6, a3, 0 +40100d6c: fe2831 l32r a3, 4010060c +40100d6f: 0020c0 memw +40100d72: 0358 l32i.n a5, a3, 0 +40100d74: fe2731 l32r a3, 40100610 +40100d77: 0020c0 memw +40100d7a: 03f8 l32i.n a15, a3, 0 +40100d7c: 043c60 extui a3, a6, 12, 1 +40100d7f: 09e6f7 bbsi a6, 15, 40100d8c +40100d82: fe2421 l32r a2, 40100614 +40100d85: ff3fc5 call0 40100184 <_UserExceptionVector_1+0x28> +40100d88: ffff06 j 40100d88 +40100d8b: 45f000 extui a15, a0, 16, 5 +40100d8e: a4cc20 extui a12, a2, 12, 11 +40100d91: fe2121 l32r a2, 40100618 +40100d94: ff3ec5 call0 40100184 <_UserExceptionVector_1+0x28> +40100d97: ffff06 j 40100d97 +40100d9a: 000000 ill +40100d9d: fe1fc1 l32r a12, 4010061c +40100da0: 414850 srli a4, a5, 8 +40100da3: 214c42 s8i a4, a12, 33 +40100da6: 7548f0 extui a4, a15, 24, 8 +40100da9: 224c52 s8i a5, a12, 34 +40100dac: 234c42 s8i a4, a12, 35 +40100daf: fe50d1 l32r a13, 401006f0 +40100db2: fe20e1 l32r a14, 40100634 +40100db5: 03dc bnez.n a3, 40100dc9 +40100db7: 821c movi.n a2, 24 +40100db9: 1e4c22 s8i a2, a12, 30 +40100dbc: e27c movi.n a2, -2 +40100dbe: 1f4c22 s8i a2, a12, 31 +40100dc1: 423c movi.n a2, 52 +40100dc3: 204c22 s8i a2, a12, 32 +40100dc6: 002cc6 j 40100e7d +40100dc9: 744820 extui a4, a2, 8, 8 +40100dcc: 1f4c42 s8i a4, a12, 31 +40100dcf: 014142 s8i a4, a1, 1 +40100dd2: fe4b41 l32r a4, 40100700 +40100dd5: 753020 extui a3, a2, 16, 8 +40100dd8: fe4b71 l32r a7, 40100704 +40100ddb: 742020 extui a2, a2, 0, 8 +40100dde: 1e4c32 s8i a3, a12, 30 +40100de1: 204c22 s8i a2, a12, 32 +40100de4: 004122 s8i a2, a1, 0 +40100de7: 024132 s8i a3, a1, 2 +40100dea: 804410 add a4, a4, a1 +40100ded: 006452 s32i a5, a4, 0 +40100df0: 771a add.n a7, a7, a1 +40100df2: 330c movi.n a3, 3 +40100df4: 0769 s32i.n a6, a7, 0 +40100df6: 202110 or a2, a1, a1 +40100df9: 052345 call0 40106030 +40100dfc: fe4231 l32r a3, 40100704 +40100dff: fe4041 l32r a4, 40100700 +40100e02: 331a add.n a3, a3, a1 +40100e04: 0368 l32i.n a6, a3, 0 +40100e06: 441a add.n a4, a4, a1 +40100e08: 753860 extui a3, a6, 24, 8 +40100e0b: 0458 l32i.n a5, a4, 0 +40100e0d: 0b1327 beq a3, a2, 40100e1c +40100e10: fe0421 l32r a2, 40100620 +40100e13: ff7c movi.n a15, -1 +40100e15: 007bc5 call0 401015d4 +40100e18: 001606 j 40100e74 +40100e1b: 3a6100 excw +40100e1e: fe .byte 0xfe +40100e1f: fe3871 l32r a7, 40100700 +40100e22: 154850 extui a4, a5, 24, 2 +40100e25: 806610 add a6, a6, a1 +40100e28: 0649 s32i.n a4, a6, 0 +40100e2a: 771a add.n a7, a7, a1 +40100e2c: fdfe21 l32r a2, 40100624 +40100e2f: 043d mov.n a3, a4 +40100e31: 0759 s32i.n a5, a7, 0 +40100e33: 007a05 call0 401015d4 +40100e36: fe3321 l32r a2, 40100704 +40100e39: fe3131 l32r a3, 40100700 +40100e3c: 221a add.n a2, a2, a1 +40100e3e: 0248 l32i.n a4, a2, 0 +40100e40: 331a add.n a3, a3, a1 +40100e42: 0358 l32i.n a5, a3, 0 +40100e44: 54bc beqz.n a4, 40100e7d +40100e46: 230c22 l8ui a2, a12, 35 +40100e49: 430c movi.n a3, 4 +40100e4b: 004122 s8i a2, a1, 0 +40100e4e: 220c22 l8ui a2, a12, 34 +40100e51: 75f0f0 extui a15, a15, 16, 8 +40100e54: 014122 s8i a2, a1, 1 +40100e57: 210c22 l8ui a2, a12, 33 +40100e5a: 024122 s8i a2, a1, 2 +40100e5d: f52050 extui a2, a5, 16, 16 +40100e60: 034122 s8i a2, a1, 3 +40100e63: 012d mov.n a2, a1 +40100e65: 051c85 call0 40106030 +40100e68: 111f27 beq a15, a2, 40100e7d +40100e6b: fdef21 l32r a2, 40100628 +40100e6e: feaff2 movi a15, -2 +40100e71: 007605 call0 401015d4 +40100e74: 9e0d22 l8ui a2, a13, 158 +40100e77: 31e207 bbsi a2, 0, 40100eac +40100e7a: 0018c6 j 40100ee1 +40100e7d: fdec21 l32r a2, 40100630 +40100e80: 007505 call0 401015d4 +40100e83: fded21 l32r a2, 40100638 +40100e86: 06a042 movi a4, 6 +40100e89: 203ee0 or a3, a14, a14 +40100e8c: fe2901 l32r a0, 40100730 +40100e8f: 0000c0 callx0 a0 +40100e92: 077216 beqz a2, 40100f0d +40100e95: fde831 l32r a3, 40100638 +40100e98: 06a042 movi a4, 6 +40100e9b: 0e2d mov.n a2, a14 +40100e9d: fe2001 l32r a0, 40100720 +40100ea0: 0000c0 callx0 a0 +40100ea3: fde621 l32r a2, 4010063c +40100ea6: 0072c5 call0 401015d4 +40100ea9: 000ac6 j 40100ed8 +40100eac: 100f66 bnei a15, -1, 40100ec0 +40100eaf: c25c movi.n a2, 92 +40100eb1: 1e4c22 s8i a2, a12, 30 +40100eb4: cfaf22 movi a2, -49 +40100eb7: 1f4c22 s8i a2, a12, 31 +40100eba: 7fa022 movi a2, 127 +40100ebd: 204c22 s8i a2, a12, 32 +40100ec0: fdde31 l32r a3, 40100638 +40100ec3: 06a042 movi a4, 6 +40100ec6: 202ee0 or a2, a14, a14 +40100ec9: fe1501 l32r a0, 40100720 +40100ecc: 0000c0 callx0 a0 +40100ecf: fddc21 l32r a2, 40100640 +40100ed2: 203ff0 or a3, a15, a15 +40100ed5: 006fc5 call0 401015d4 +40100ed8: fe1701 l32r a0, 40100734 +40100edb: 0000c0 callx0 a0 +40100ede: 000ac6 j 40100f0d +40100ee1: fdd521 l32r a2, 40100638 +40100ee4: 640c movi.n a4, 6 +40100ee6: 0e3d mov.n a3, a14 +40100ee8: fe1201 l32r a0, 40100730 +40100eeb: 0000c0 callx0 a0 +40100eee: 62cc bnez.n a2, 40100ef8 +40100ef0: fdd521 l32r a2, 40100644 +40100ef3: 0004c6 j 40100f0a +40100ef6: 210000 srai a0, a0, 0 +40100ef9: 42fdd0 excw +40100efc: e006a0 subx4 a0, a6, a10 +40100eff: 3e .byte 0x3e +40100f00: 070120 excw +40100f03: fe .byte 0xfe +40100f04: 0000c0 callx0 a0 +40100f07: fdd021 l32r a2, 40100648 +40100f0a: 006c85 call0 401015d4 +40100f0d: fdca21 l32r a2, 40100638 +40100f10: fe0a01 l32r a0, 40100738 +40100f13: 0000c0 callx0 a0 +40100f16: fdc831 l32r a3, 40100638 +40100f19: fdcc21 l32r a2, 4010064c +40100f1c: fe0801 l32r a0, 4010073c +40100f1f: 0000c0 callx0 a0 +40100f22: fdcc31 l32r a3, 40100654 +40100f25: fdca21 l32r a2, 40100650 +40100f28: 1c39 s32i.n a3, a12, 4 +40100f2a: 0c29 s32i.n a2, a12, 0 +40100f2c: 2c29 s32i.n a2, a12, 8 +40100f2e: fe0401 l32r a0, 40100740 +40100f31: 0000c0 callx0 a0 +40100f34: fe0401 l32r a0, 40100744 +40100f37: 0000c0 callx0 a0 +40100f3a: fe0301 l32r a0, 40100748 +40100f3d: 0000c0 callx0 a0 +40100f40: fdc6c1 l32r a12, 40100658 +40100f43: fdc7e1 l32r a14, 40100660 +40100f46: 921c movi.n a2, 25 +40100f48: fdc531 l32r a3, 4010065c +40100f4b: 005c22 s16i a2, a12, 0 +40100f4e: 040c movi.n a4, 0 +40100f50: 0e2d mov.n a2, a14 +40100f52: 051185 call0 4010606c +40100f55: fdb541 l32r a4, 4010062c +40100f58: 0c0c movi.n a12, 0 +40100f5a: 02d422 addmi a2, a4, 0x200 +40100f5d: 140232 l8ui a3, a2, 20 +40100f60: ffa022 movi a2, 255 +40100f63: 0a9327 bne a3, a2, 40100f71 +40100f66: fde351 l32r a5, 401006f4 +40100f69: 220c movi.n a2, 2 +40100f6b: 144522 s8i a2, a5, 20 +40100f6e: 01a0c2 movi a12, 1 +40100f71: fdf601 l32r a0, 4010074c +40100f74: 0000c0 callx0 a0 +40100f77: fdb021 l32r a2, 40100638 +40100f7a: fdf501 l32r a0, 40100750 +40100f7d: 0000c0 callx0 a0 +40100f80: fdab61 l32r a6, 4010062c +40100f83: c30c movi.n a3, 12 +40100f85: 03d6e2 addmi a14, a6, 0x300 +40100f88: 410e22 l8ui a2, a14, 65 +40100f8b: 220b addi.n a2, a2, -1 +40100f8d: 742020 extui a2, a2, 0, 8 +40100f90: 04b327 bgeu a3, a2, 40100f98 +40100f93: 120c movi.n a2, 1 +40100f95: 414e22 s8i a2, a14, 65 +40100f98: fda571 l32r a7, 4010062c +40100f9b: fdb231 l32r a3, 40100664 +40100f9e: 05d7f2 addmi a15, a7, 0x500 +40100fa1: 3c1f22 l16ui a2, a15, 120 +40100fa4: f43030 extui a3, a3, 0, 16 +40100fa7: 9cc222 addi a2, a2, -100 +40100faa: f42020 extui a2, a2, 0, 16 +40100fad: 05b327 bgeu a3, a2, 40100fb6 +40100fb0: 64a022 movi a2, 100 +40100fb3: 3c5f22 s16i a2, a15, 120 +40100fb6: 3c1f22 l16ui a2, a15, 120 +40100fb9: 64a032 movi a3, 100 +40100fbc: fdd501 l32r a0, 40100710 +40100fbf: 0000c0 callx0 a0 +40100fc2: f42020 extui a2, a2, 0, 16 +40100fc5: a02220 addx4 a2, a2, a2 +40100fc8: a02220 addx4 a2, a2, a2 +40100fcb: 112240 slli a2, a2, 12 +40100fce: fde101 l32r a0, 40100754 +40100fd1: 0000c0 callx0 a0 +40100fd4: 420e22 l8ui a2, a14, 66 +40100fd7: 0252f6 bgeui a2, 5, 40100fdd +40100fda: 0f1266 bnei a2, 1, 40100fed +40100fdd: 020c movi.n a2, 0 +40100fdf: 424e22 s8i a2, a14, 66 +40100fe2: fda121 l32r a2, 40100668 +40100fe5: 034c movi.n a3, 64 +40100fe7: fddc01 l32r a0, 40100758 +40100fea: 0000c0 callx0 a0 +40100fed: 430e22 l8ui a2, a14, 67 +40100ff0: 0422b6 bltui a2, 2, 40100ff8 +40100ff3: 020c movi.n a2, 0 +40100ff5: 434e22 s8i a2, a14, 67 +40100ff8: 440e22 l8ui a2, a14, 68 +40100ffb: 830c movi.n a3, 8 +40100ffd: 04b327 bgeu a3, a2, 40101005 +40101000: 420c movi.n a2, 4 +40101002: 444e22 s8i a2, a14, 68 +40101005: fd8931 l32r a3, 4010062c +40101008: 862322 l32i a2, a3, 0x218 +4010100b: 160266 bnei a2, -1, 40101025 +4010100e: fd9721 l32r a2, 4010066c +40101011: 432c movi.n a3, 36 +40101013: fdd101 l32r a0, 40100758 +40101016: 0000c0 callx0 a0 +40101019: fd9521 l32r a2, 40100670 +4010101c: 40a032 movi a3, 64 +4010101f: fdce01 l32r a0, 40100758 +40101022: 0000c0 callx0 a0 +40101025: fdb341 l32r a4, 401006f4 +40101028: b50422 l8ui a2, a4, 181 +4010102b: 0522b6 bltui a2, 2, 40101034 +4010102e: 00a022 movi a2, 0 +40101031: b54422 s8i a2, a4, 181 +40101034: fdb051 l32r a5, 401006f4 +40101037: 020c movi.n a2, 0 +40101039: 206f22 s32i a2, a15, 128 +4010103c: 1f6f22 s32i a2, a15, 124 +4010103f: 154522 s8i a2, a5, 21 +40101042: 480e22 l8ui a2, a14, 72 +40101045: 0462b6 bltui a2, 6, 4010104d +40101048: 120c movi.n a2, 1 +4010104a: 484e22 s8i a2, a14, 72 +4010104d: 142f22 l32i a2, a15, 80 +40101050: ffc222 addi a2, a2, -1 +40101053: 0532b6 bltui a2, 3, 4010105c +40101056: 03a022 movi a2, 3 +40101059: 146f22 s32i a2, a15, 80 +4010105c: a40d22 l8ui a2, a13, 164 +4010105f: 012280 slli a2, a2, 24 +40101062: 312820 srai a2, a2, 24 +40101065: 050266 bnei a2, -1, 4010106e +40101068: 81af22 movi a2, -127 +4010106b: a44d22 s8i a2, a13, 164 +4010106e: a50d32 l8ui a3, a13, 165 +40101071: ffa022 movi a2, 255 +40101074: 049327 bne a3, a2, 4010107c +40101077: 020c movi.n a2, 0 +40101079: a54d22 s8i a2, a13, 165 +4010107c: 111c66 bnei a12, 1, 40101091 +4010107f: fd4361 l32r a6, 4010058c +40101082: fd5d31 l32r a3, 401005f8 +40101085: 001622 l16ui a2, a6, 0 +40101088: a4a442 movi a4, 0x4a4 +4010108b: fdb401 l32r a0, 4010075c +4010108e: 0000c0 callx0 a0 +40101091: fd3a21 l32r a2, 4010057c +40101094: 0020c0 memw +40101097: 0228 l32i.n a2, a2, 0 +40101099: 086207 bbci a2, 0, 401010a5 +4010109c: fdb101 l32r a0, 40100760 +4010109f: 0000c0 callx0 a0 +401010a2: 000146 j 401010ab +401010a5: fdaf01 l32r a0, 40100764 +401010a8: 0000c0 callx0 a0 +401010ab: fc3f41 l32r a4, 401001a8 <_UserExceptionVector_1+0x4c> +401010ae: fd7121 l32r a2, 40100674 +401010b1: 0020c0 memw +401010b4: 002432 l32i a3, a4, 0 +401010b7: f68327 bany a3, a2, 401010b1 +401010ba: fd6f41 l32r a4, 40100678 +401010bd: fd6d21 l32r a2, 40100674 +401010c0: 0020c0 memw +401010c3: 0438 l32i.n a3, a4, 0 +401010c5: f78327 bany a3, a2, 401010c0 +401010c8: fd6d41 l32r a4, 4010067c +401010cb: ffae22 movi a2, 0xfffffeff +401010ce: 0020c0 memw +401010d1: 0438 l32i.n a3, a4, 0 +401010d3: fd6cc1 l32r a12, 40100684 +401010d6: 103320 and a3, a3, a2 +401010d9: 0020c0 memw +401010dc: 0439 s32i.n a3, a4, 0 +401010de: fd6831 l32r a3, 40100680 +401010e1: 0020c0 memw +401010e4: 0348 l32i.n a4, a3, 0 +401010e6: 102420 and a2, a4, a2 +401010e9: 0020c0 memw +401010ec: 0329 s32i.n a2, a3, 0 +401010ee: fc4c21 l32r a2, 40100220 <_UserExceptionVector_1+0xc4> +401010f1: 0c3d mov.n a3, a12 +401010f3: 0020c0 memw +401010f6: 02e8 l32i.n a14, a2, 0 +401010f8: 82a442 movi a4, 0x482 +401010fb: c21c movi.n a2, 28 +401010fd: 0113c5 call0 4010223c +40101100: fd7f71 l32r a7, 401006fc +40101103: fd61d1 l32r a13, 40100688 +40101106: 771a add.n a7, a7, a1 +40101108: 0729 s32i.n a2, a7, 0 +4010110a: c41c movi.n a4, 28 +4010110c: 203dd0 or a3, a13, a13 +4010110f: 00a022 movi a2, 0 +40101112: 0077c5 call0 40101890 +40101115: 20cdd0 or a12, a13, a13 +40101118: 04de56 bnez a14, 40101169 +4010111b: fd9301 l32r a0, 40100768 +4010111e: 0000c0 callx0 a0 +40101121: 0f1266 bnei a2, 1, 40101134 +40101124: c41c movi.n a4, 28 +40101126: 030c movi.n a3, 0 +40101128: 0c2d mov.n a2, a12 +4010112a: fd9001 l32r a0, 4010076c +4010112d: 0000c0 callx0 a0 +40101130: 000e06 j 4010116c +40101133: 8d0100 excw +40101136: c0fd excw +40101138: 660000 excw +4010113b: 281f22 l16ui a2, a15, 80 +4010113e: 660d excw +40101140: 280752 l8ui a5, a7, 40 +40101143: cc2d excw +40101145: 5d2822 l32i a2, a8, 0x174 +40101148: 02ac beqz.n a2, 4010116c +4010114a: c41c movi.n a4, 28 +4010114c: 030c movi.n a3, 0 +4010114e: 0c2d mov.n a2, a12 +40101150: fd8701 l32r a0, 4010076c +40101153: 0000c0 callx0 a0 +40101156: 620c movi.n a2, 6 +40101158: 0c29 s32i.n a2, a12, 0 +4010115a: 000386 j 4010116c +4010115d: fd8201 l32r a0, 40100768 +40101160: 0000c0 callx0 a0 +40101163: 000146 j 4010116c +40101166: 000000 ill +40101169: b77ef6 bgeui a14, 7, 40101124 +4010116c: c41c movi.n a4, 28 +4010116e: 0c3d mov.n a3, a12 +40101170: 020c movi.n a2, 0 +40101172: 005f85 call0 4010176c +40101175: fd4331 l32r a3, 40100684 +40101178: 9ba442 movi a4, 0x49b +4010117b: f4a222 movi a2, 0x2f4 +4010117e: 010bc5 call0 4010223c +40101181: fc5461 l32r a6, 401002d4 +40101184: 02ed mov.n a14, a2 +40101186: 0628 l32i.n a2, a6, 0 +40101188: 80a042 movi a4, 128 +4010118b: 3258 l32i.n a5, a2, 12 +4010118d: fd3f21 l32r a2, 4010068c +40101190: 0e3d mov.n a3, a14 +40101192: 0228 l32i.n a2, a2, 0 +40101194: 80a0d2 movi a13, 128 +40101197: 822520 mull a2, a5, a2 +4010119a: fd5a51 l32r a5, 40100704 +4010119d: deda add.n a13, a14, a13 +4010119f: 551a add.n a5, a5, a1 +401011a1: 0569 s32i.n a6, a5, 0 +401011a3: 017005 call0 401028a4 +401011a6: fd5771 l32r a7, 40100704 +401011a9: 74a242 movi a4, 0x274 +401011ac: 771a add.n a7, a7, a1 +401011ae: 0768 l32i.n a6, a7, 0 +401011b0: 0d3d mov.n a3, a13 +401011b2: 0628 l32i.n a2, a6, 0 +401011b4: 3258 l32i.n a5, a2, 12 +401011b6: fd3621 l32r a2, 40100690 +401011b9: 0228 l32i.n a2, a2, 0 +401011bb: 822520 mull a2, a5, a2 +401011be: 016e45 call0 401028a4 +401011c1: fd3431 l32r a3, 40100694 +401011c4: 01de22 addmi a2, a14, 0x100 +401011c7: 0329 s32i.n a2, a3, 0 +401011c9: 0d2d mov.n a2, a13 +401011cb: fd6901 l32r a0, 40100770 +401011ce: 0000c0 callx0 a0 +401011d1: fd4941 l32r a4, 401006f8 +401011d4: 160c movi.n a6, 1 +401011d6: 441a add.n a4, a4, a1 +401011d8: 0469 s32i.n a6, a4, 0 +401011da: fd2e51 l32r a5, 40100694 +401011dd: 92dc bnez.n a2, 401011fa +401011df: 0528 l32i.n a2, a5, 0 +401011e1: 064d mov.n a4, a6 +401011e3: 7da032 movi a3, 125 +401011e6: fd6301 l32r a0, 40100774 +401011e9: 0000c0 callx0 a0 +401011ec: fd4371 l32r a7, 401006f8 +401011ef: 030c movi.n a3, 0 +401011f1: 140c movi.n a4, 1 +401011f3: 933420 movnez a3, a4, a2 +401011f6: 771a add.n a7, a7, a1 +401011f8: 0739 s32i.n a3, a7, 0 +401011fa: 0c28 l32i.n a2, a12, 0 +401011fc: 075226 beqi a2, 5, 40101207 +401011ff: 120c movi.n a2, 1 +40101201: fd5d01 l32r a0, 40100778 +40101204: 0000c0 callx0 a0 +40101207: 0c28 l32i.n a2, a12, 0 +40101209: 125226 beqi a2, 5, 4010121f +4010120c: fd3b21 l32r a2, 401006f8 +4010120f: 221a add.n a2, a2, a1 +40101211: 0228 l32i.n a2, a2, 0 +40101213: 081226 beqi a2, 1, 4010121f +40101216: 202dd0 or a2, a13, a13 +40101219: fd5801 l32r a0, 4010077c +4010121c: 0000c0 callx0 a0 +4010121f: 000e32 l8ui a3, a14, 0 +40101222: 175326 beqi a3, 5, 4010123d +40101225: fd1c21 l32r a2, 40100698 +40101228: 003a85 call0 401015d4 +4010122b: fd1c21 l32r a2, 4010069c +4010122e: fd5401 l32r a0, 40100780 +40101231: 0000c0 callx0 a0 +40101234: fc4401 l32r a0, 40100344 +40101237: 0000c0 callx0 a0 +4010123a: 005b06 j 401013aa +4010123d: fd1831 l32r a3, 401006a0 +40101240: 710e22 l8ui a2, a14, 113 +40101243: 000332 l8ui a3, a3, 0 +40101246: 062356 bnez a3, 401012ac +40101249: 700e32 l8ui a3, a14, 112 +4010124c: 145326 beqi a3, 5, 40101264 +4010124f: 5263b6 bltui a3, 6, 401012a5 +40101252: 940c movi.n a4, 9 +40101254: 291347 beq a3, a4, 40101281 +40101257: b40c movi.n a4, 11 +40101259: 351347 beq a3, a4, 40101292 +4010125c: 187326 beqi a3, 7, 40101278 +4010125f: 001086 j 401012a5 +40101262: 800000 add a0, a0, a0 +40101265: 960122 l8ui a2, a1, 150 +40101268: 2002d2 l8ui a13, a2, 32 +4010126b: 3128 l32i.n a2, a1, 12 +4010126d: 0272a6 blti a2, 7, 40101273 +40101270: 002786 j 40101312 +40101273: 000986 j 4010129d +40101276: 800000 add a0, a0, a0 +40101279: 960122 l8ui a2, a1, 150 +4010127c: c60932 l8ui a3, a9, 198 +4010127f: 800006 j 400e1283 <__floatsidf+0xd2f93> +40101282: 960122 l8ui a2, a1, 150 +40101285: 200102 l8ui a0, a1, 32 +40101288: 3128 l32i.n a2, a1, 12 +4010128a: 0f72a6 blti a2, 7, 4010129d +4010128d: 520c movi.n a2, 5 +4010128f: 001f06 j 4010130f +40101292: 012280 slli a2, a2, 24 +40101295: 0042d6 bgez a2, 4010129d +40101298: 720c movi.n a2, 7 +4010129a: 001c46 j 4010130f +4010129d: 020c movi.n a2, 0 +4010129f: 704e22 s8i a2, a14, 112 +401012a2: 001806 j 40101306 +401012a5: 020c movi.n a2, 0 +401012a7: 001906 j 4010130f +401012aa: 660000 excw +401012ad: 326213 excw +401012b0: 0e .byte 0xe +401012b1: 532670 excw +401012b4: 63b612 excw +401012b7: 940c53 excw +401012ba: 261347 beq a3, a4, 401012e4 +401012bd: b40c movi.n a4, 11 +401012bf: 361347 beq a3, a4, 401012f9 +401012c2: 137326 beqi a3, 7, 401012d9 +401012c5: 0010c6 j 4010130c +401012c8: 012280 slli a2, a2, 24 +401012cb: 01b296 bltz a2, 401012ea +401012ce: 312820 srai a2, a2, 24 +401012d1: 2a72a6 blti a2, 7, 401012ff +401012d4: 920c movi.n a2, 9 +401012d6: 000d46 j 4010130f +401012d9: 012280 slli a2, a2, 24 +401012dc: 01f2d6 bgez a2, 401012ff +401012df: 0001c6 j 401012ea +401012e2: 800000 add a0, a0, a0 +401012e5: d60122 l8ui a2, a1, 214 +401012e8: 0c0052 l8ui a5, a0, 12 +401012eb: 07c6b2 addi a11, a6, 7 +401012ee: 200000 or a0, a0, a0 +401012f1: 3128 l32i.n a2, a1, 12 +401012f3: 1b72e6 bgei a2, 7, 40101312 +401012f6: 000146 j 401012ff +401012f9: 012280 slli a2, a2, 24 +401012fc: 012296 bltz a2, 40101312 +401012ff: 320c movi.n a2, 3 +40101301: 704e22 s8i a2, a14, 112 +40101304: 020c movi.n a2, 0 +40101306: 714e22 s8i a2, a14, 113 +40101309: 000146 j 40101312 +4010130c: 03a022 movi a2, 3 +4010130f: 704e22 s8i a2, a14, 112 +40101312: 202ee0 or a2, a14, a14 +40101315: fd1b01 l32r a0, 40100784 +40101318: 0000c0 callx0 a0 +4010131b: 00e216 beqz a2, 4010132d +4010131e: fce131 l32r a3, 401006a4 +40101321: fce121 l32r a2, 401006a8 +40101324: 3aa142 movi a4, 0x13a +40101327: 002ac5 call0 401015d4 +4010132a: ffff06 j 4010132a +4010132d: 2ca432 movi a3, 0x42c +40101330: 020c movi.n a2, 0 +40101332: fd1501 l32r a0, 40100788 +40101335: 0000c0 callx0 a0 +40101338: 2ca432 movi a3, 0x42c +4010133b: 01a022 movi a2, 1 +4010133e: fd1201 l32r a0, 40100788 +40101341: 0000c0 callx0 a0 +40101344: fd1201 l32r a0, 4010078c +40101347: 0000c0 callx0 a0 +4010134a: 142f22 l32i a2, a15, 80 +4010134d: fd1001 l32r a0, 40100790 +40101350: 0000c0 callx0 a0 +40101353: fd1001 l32r a0, 40100794 +40101356: 0000c0 callx0 a0 +40101359: fcb721 l32r a2, 40100638 +4010135c: fd0f01 l32r a0, 40100798 +4010135f: 0000c0 callx0 a0 +40101362: fd0e01 l32r a0, 4010079c +40101365: 0000c0 callx0 a0 +40101368: fcb431 l32r a3, 40100638 +4010136b: fcb021 l32r a2, 4010062c +4010136e: fd0c01 l32r a0, 401007a0 +40101371: 0000c0 callx0 a0 +40101374: 040c movi.n a4, 0 +40101376: fccd31 l32r a3, 401006ac +40101379: 042d mov.n a2, a4 +4010137b: fd0a01 l32r a0, 401007a4 +4010137e: 0000c0 callx0 a0 +40101381: 120c movi.n a2, 1 +40101383: fd0901 l32r a0, 401007a8 +40101386: 0000c0 callx0 a0 +40101389: fd0801 l32r a0, 401007ac +4010138c: 0000c0 callx0 a0 +4010138f: fd0801 l32r a0, 401007b0 +40101392: 0000c0 callx0 a0 +40101395: fd0701 l32r a0, 401007b4 +40101398: 0000c0 callx0 a0 +4010139b: fca421 l32r a2, 4010062c +4010139e: fd0601 l32r a0, 401007b8 +401013a1: 0000c0 callx0 a0 +401013a4: fd0601 l32r a0, 401007bc +401013a7: 0000c0 callx0 a0 +401013aa: fca031 l32r a3, 4010062c +401013ad: 020c movi.n a2, 0 +401013af: 01d3c2 addmi a12, a3, 0x100 +401013b2: df4c22 s8i a2, a12, 223 +401013b5: 700e32 l8ui a3, a14, 112 +401013b8: 520c movi.n a2, 5 +401013ba: 102320 and a2, a3, a2 +401013bd: 021266 bnei a2, 1, 401013c3 +401013c0: df4c22 s8i a2, a12, 223 +401013c3: fcb3f1 l32r a15, 40100690 +401013c6: fcba21 l32r a2, 401006b0 +401013c9: 0f38 l32i.n a3, a15, 0 +401013cb: 002085 call0 401015d4 +401013ce: fcb421 l32r a2, 401006a0 +401013d1: 000232 l8ui a3, a2, 0 +401013d4: fcb821 l32r a2, 401006b4 +401013d7: 001fc5 call0 401015d4 +401013da: 700e32 l8ui a3, a14, 112 +401013dd: fcb621 l32r a2, 401006b8 +401013e0: 001f05 call0 401015d4 +401013e3: 710e32 l8ui a3, a14, 113 +401013e6: fcb521 l32r a2, 401006bc +401013e9: 001e85 call0 401015d4 +401013ec: 720e32 l8ui a3, a14, 114 +401013ef: fcb421 l32r a2, 401006c0 +401013f2: 001e05 call0 401015d4 +401013f5: fcc041 l32r a4, 401006f8 +401013f8: 441a add.n a4, a4, a1 +401013fa: 002442 l32i a4, a4, 0 +401013fd: 040416 beqz a4, 40101441 +40101400: fca221 l32r a2, 40100688 +40101403: 0228 l32i.n a2, a2, 0 +40101405: 0b5266 bnei a2, 5, 40101414 +40101408: fcd801 l32r a0, 40100768 +4010140b: 0000c0 callx0 a0 +4010140e: 0b1226 beqi a2, 1, 4010141d +40101411: 000b06 j 40101441 +40101414: fcd501 l32r a0, 40100768 +40101417: 0000c0 callx0 a0 +4010141a: ea2266 bnei a2, 2, 40101408 +4010141d: fca921 l32r a2, 401006c4 +40101420: 001b05 call0 401015d4 +40101423: 0d2d mov.n a2, a13 +40101425: fce601 l32r a0, 401007c0 +40101428: 0000c0 callx0 a0 +4010142b: fbaa21 l32r a2, 401002d4 +4010142e: 74a252 movi a5, 0x274 +40101431: 0228 l32i.n a2, a2, 0 +40101433: 204dd0 or a4, a13, a13 +40101436: 032232 l32i a3, a2, 12 +40101439: 0f28 l32i.n a2, a15, 0 +4010143b: fce201 l32r a0, 401007c4 +4010143e: 0000c0 callx0 a0 +40101441: fc9031 l32r a3, 40100684 +40101444: 46a542 movi a4, 0x546 +40101447: 0e2d mov.n a2, a14 +40101449: 00a845 call0 40101ed0 +4010144c: fc9f31 l32r a3, 401006c8 +4010144f: fc9f21 l32r a2, 401006cc +40101452: 001805 call0 401015d4 +40101455: fc9e21 l32r a2, 401006d0 +40101458: 0020c0 memw +4010145b: 0238 l32i.n a3, a2, 0 +4010145d: 0020c0 memw +40101460: 0248 l32i.n a4, a2, 0 +40101462: fc9c21 l32r a2, 401006d4 +40101465: 354c40 extui a4, a4, 28, 4 +40101468: 0020c0 memw +4010146b: 0258 l32i.n a5, a2, 0 +4010146d: 0020c0 memw +40101470: 0268 l32i.n a6, a2, 0 +40101472: fc9921 l32r a2, 401006d8 +40101475: 746060 extui a6, a6, 0, 8 +40101478: 745850 extui a5, a5, 8, 8 +4010147b: b53030 extui a3, a3, 16, 12 +4010147e: 001545 call0 401015d4 +40101481: df0c22 l8ui a2, a12, 223 +40101484: 406207 bbci a2, 0, 401014c8 +40101487: fc8021 l32r a2, 40100688 +4010148a: fc95d1 l32r a13, 401006e0 +4010148d: 0238 l32i.n a3, a2, 0 +4010148f: fc9321 l32r a2, 401006dc +40101492: 205366 bnei a3, 5, 401014b6 +40101495: 0020c0 memw +40101498: 0238 l32i.n a3, a2, 0 +4010149a: 120c movi.n a2, 1 +4010149c: 313030 srai a3, a3, 16 +4010149f: 005d32 s16i a3, a13, 0 +401014a2: fcc901 l32r a0, 401007c8 +401014a5: 0000c0 callx0 a0 +401014a8: 001d32 l16ui a3, a13, 0 +401014ab: fc8e21 l32r a2, 401006e4 +401014ae: 005232 s16i a3, a2, 0 +401014b1: 0004c6 j 401014c8 +401014b4: 0c0000 excw +401014b7: 5d3203 excw +401014ba: 20c000 or a12, a0, a0 +401014bd: 023800 excw +401014c0: f43030 extui a3, a3, 0, 16 +401014c3: 0020c0 memw +401014c6: 0239 s32i.n a3, a2, 0 +401014c8: fc8d51 l32r a5, 401006fc +401014cb: c41c movi.n a4, 28 +401014cd: 551a add.n a5, a5, a1 +401014cf: 0538 l32i.n a3, a5, 0 +401014d1: 020c movi.n a2, 0 +401014d3: 002985 call0 4010176c +401014d6: fc8961 l32r a6, 401006fc +401014d9: fc6a31 l32r a3, 40100684 +401014dc: 661a add.n a6, a6, a1 +401014de: 002622 l32i a2, a6, 0 +401014e1: 7ca542 movi a4, 0x57c +401014e4: 009e85 call0 40101ed0 +401014e7: 120c movi.n a2, 1 +401014e9: fcb801 l32r a0, 401007cc +401014ec: 0000c0 callx0 a0 +401014ef: fcb801 l32r a0, 401007d0 +401014f2: 0000c0 callx0 a0 +401014f5: fc5a21 l32r a2, 40100660 +401014f8: 005c05 call0 40101abc +401014fb: fc5771 l32r a7, 40100658 +401014fe: 150c movi.n a5, 1 +40101500: 001732 l16ui a3, a7, 0 +40101503: fc5721 l32r a2, 40100660 +40101506: 204550 or a4, a5, a5 +40101509: 006405 call0 40101b4c +4010150c: fc3321 l32r a2, 401005d8 +4010150f: 73a032 movi a3, 115 +40101512: 0020c0 memw +40101515: 0239 s32i.n a3, a2, 0 +40101517: fc7421 l32r a2, 401006e8 +4010151a: 130c movi.n a3, 1 +4010151c: 004232 s8i a3, a2, 0 +4010151f: fc7521 l32r a2, 401006f4 +40101522: 1402d2 l8ui a13, a2, 20 +40101525: 202dd0 or a2, a13, a13 +40101528: fcab01 l32r a0, 401007d4 +4010152b: 0000c0 callx0 a0 +4010152e: d27c movi.n a2, -3 +40101530: 102d20 and a2, a13, a2 +40101533: 051266 bnei a2, 1, 4010153c +40101536: fca801 l32r a0, 401007d8 +40101539: 0000c0 callx0 a0 +4010153c: fecd22 addi a2, a13, -2 +4010153f: 742020 extui a2, a2, 0, 8 +40101542: 1b22f6 bgeui a2, 2, 40101561 +40101545: 0b2d66 bnei a13, 2, 40101554 +40101548: de0c22 l8ui a2, a12, 222 +4010154b: 052266 bnei a2, 2, 40101554 +4010154e: 120c movi.n a2, 1 +40101550: 000086 j 40101556 +40101553: 020c00 excw +40101556: fca101 l32r a0, 401007dc +40101559: 0000c0 callx0 a0 +4010155c: 000446 j 40101571 +4010155f: 660000 excw +40101562: 0c1d mov.n a1, a12 +40101564: fc3231 l32r a3, 4010062c +40101567: 4328 l32i.n a2, a3, 16 +40101569: 0228 l32i.n a2, a2, 0 +4010156b: fc9d01 l32r a0, 401007e0 +4010156e: 0000c0 callx0 a0 +40101571: fc9c01 l32r a0, 401007e4 +40101574: 0000c0 callx0 a0 +40101577: 051266 bnei a2, 1, 40101580 +4010157a: fc9b01 l32r a0, 401007e8 +4010157d: 0000c0 callx0 a0 +40101580: fc5b21 l32r a2, 401006ec +40101583: 002222 l32i a2, a2, 0 +40101586: 002216 beqz a2, 4010158c +40101589: 0002c0 callx0 a2 +4010158c: fc5f91 l32r a9, 40100708 +4010158f: 119a add.n a1, a1, a9 +40101591: 7108 l32i.n a0, a1, 28 +40101593: 61c8 l32i.n a12, a1, 24 +40101595: 51d8 l32i.n a13, a1, 20 +40101597: 41e8 l32i.n a14, a1, 16 +40101599: 31f8 l32i.n a15, a1, 12 +4010159b: 20c112 addi a1, a1, 32 +4010159e: f00d ret.n +401015a0: 000e04 excw +401015a3: 40 .byte 0x40 + +401015a4 : +401015a4: f0c112 addi a1, a1, -16 +401015a7: 3109 s32i.n a0, a1, 12 +401015a9: ff2405 call0 401007ec +401015ac: fffd01 l32r a0, 401015a0 +401015af: 0000c0 callx0 a0 +401015b2: 3108 l32i.n a0, a1, 12 +401015b4: 10c112 addi a1, a1, 16 +401015b7: f00d ret.n +401015b9: 000000 ill +401015bc: fe8046 j 40100fc1 +401015bf: 3f .byte 0x3f +401015c0: 200000 or a0, a0, a0 +401015c3: f38a40 excw +401015c6: a04022 s8i a2, a0, 160 +401015c9: 001d mov.n a1, a0 +401015cb: 2ac840 excw +401015ce: 004000 break 0, 0 +401015d1: 1f .byte 0x1f +401015d2: 00 .byte 00 +401015d3: 40 .byte 0x40 + +401015d4 : +401015d4: a0a092 movi a9, 160 +401015d7: c01190 sub a1, a1, a9 +401015da: 2361f2 s32i a15, a1, 140 +401015dd: 20f220 or a15, a2, a2 +401015e0: fff721 l32r a2, 401015bc +401015e3: 276102 s32i a0, a1, 156 +401015e6: 2661c2 s32i a12, a1, 152 +401015e9: 2561d2 s32i a13, a1, 148 +401015ec: 2461e2 s32i a14, a1, 144 +401015ef: 156132 s32i a3, a1, 84 +401015f2: 166142 s32i a4, a1, 88 +401015f5: 176152 s32i a5, a1, 92 +401015f8: 186162 s32i a6, a1, 96 +401015fb: 196172 s32i a7, a1, 100 +401015fe: 000222 l8ui a2, a2, 0 +40101601: 021226 beqi a2, 1, 40101607 +40101604: 003606 j 401016e0 +40101607: ffee21 l32r a2, 401015c0 +4010160a: 80a042 movi a4, 128 +4010160d: 103f20 and a3, a15, a2 +40101610: 50c1d2 addi a13, a1, 80 +40101613: 80e140 add a14, a1, a4 +40101616: 021327 beq a3, a2, 4010161c +40101619: 002b06 j 401016c9 +4010161c: 0f2d mov.n a2, a15 +4010161e: ffeb01 l32r a0, 401015cc +40101621: 0000c0 callx0 a0 +40101624: c20b addi.n a12, a2, -1 +40101626: 222b addi.n a2, a2, 2 +40101628: a3c2c0 movltz a12, a2, a12 +4010162b: 21c2c0 srai a12, a12, 2 +4010162e: cc1b addi.n a12, a12, 1 +40101630: 11cce0 slli a12, a12, 2 +40101633: f4c0c0 extui a12, a12, 0, 16 +40101636: 6c1b addi.n a6, a12, 1 +40101638: 062d mov.n a2, a6 +4010163a: 1d6162 s32i a6, a1, 116 +4010163d: 04a3c5 call0 4010607c +40101640: 1c6122 s32i a2, a1, 112 +40101643: 0092c5 call0 40101f70 +40101646: 1c2132 l32i a3, a1, 112 +40101649: 1d2162 l32i a6, a1, 116 +4010164c: 15b237 bgeu a2, a3, 40101665 +4010164f: 034c movi.n a3, 64 +40101651: 0c2d mov.n a2, a12 +40101653: 01b3c7 bgeu a3, a12, 40101658 +40101656: 024c movi.n a2, 64 +40101658: f4c020 extui a12, a2, 0, 16 +4010165b: 190c movi.n a9, 1 +4010165d: 018d mov.n a8, a1 +4010165f: 0004c6 j 40101676 +40101662: 000000 ill +40101665: ffd731 l32r a3, 401015c4 +40101668: 050c movi.n a5, 0 +4010166a: 72a042 movi a4, 114 +4010166d: 062d mov.n a2, a6 +4010166f: 00a285 call0 40102098 +40101672: 028d mov.n a8, a2 +40101674: 090c movi.n a9, 0 +40101676: 0c4d mov.n a4, a12 +40101678: 0f3d mov.n a3, a15 +4010167a: 082d mov.n a2, a8 +4010167c: 1d6192 s32i a9, a1, 116 +4010167f: 1c6182 s32i a8, a1, 112 +40101682: fc2701 l32r a0, 40100720 +40101685: 0000c0 callx0 a0 +40101688: 1c2182 l32i a8, a1, 112 +4010168b: 020c movi.n a2, 0 +4010168d: c8ca add.n a12, a8, a12 +4010168f: 004c22 s8i a2, a12, 0 +40101692: ffcd21 l32r a2, 401015c8 +40101695: 460c movi.n a6, 4 +40101697: 083d mov.n a3, a8 +40101699: 0e4d mov.n a4, a14 +4010169b: 0d5d mov.n a5, a13 +4010169d: 1c6182 s32i a8, a1, 112 +401016a0: 1261d2 s32i a13, a1, 72 +401016a3: 1161e2 s32i a14, a1, 68 +401016a6: 136162 s32i a6, a1, 76 +401016a9: ffc901 l32r a0, 401015d0 +401016ac: 0000c0 callx0 a0 +401016af: 1d2192 l32i a9, a1, 116 +401016b2: 1c2182 l32i a8, a1, 112 +401016b5: 027956 bnez a9, 401016e0 +401016b8: ffc331 l32r a3, 401015c4 +401016bb: 81a042 movi a4, 129 +401016be: 202880 or a2, a8, a8 +401016c1: 0080c5 call0 40101ed0 +401016c4: 000606 j 401016e0 +401016c7: 210000 srai a0, a0, 0 +401016ca: bf .byte 0xbf +401016cb: ff .byte 0xff +401016cc: 460c movi.n a6, 4 +401016ce: 0e4d mov.n a4, a14 +401016d0: 0d5d mov.n a5, a13 +401016d2: 0f3d mov.n a3, a15 +401016d4: 11d9 s32i.n a13, a1, 4 +401016d6: 01e9 s32i.n a14, a1, 0 +401016d8: 2169 s32i.n a6, a1, 8 +401016da: ffbd01 l32r a0, 401015d0 +401016dd: 0000c0 callx0 a0 +401016e0: 272102 l32i a0, a1, 156 +401016e3: a0a092 movi a9, 160 +401016e6: 2621c2 l32i a12, a1, 152 +401016e9: 2521d2 l32i a13, a1, 148 +401016ec: 2421e2 l32i a14, a1, 144 +401016ef: 2321f2 l32i a15, a1, 140 +401016f2: 119a add.n a1, a1, a9 +401016f4: f00d ret.n +401016f6: 240000 extui a0, a0, 0, 3 +401016f9: 3ff000 excw +401016fc: 0047f0 break 7, 15 +401016ff: 008040 excw +40101702: 00 .byte 00 +40101703: 40 .byte 0x40 + +40101704 : +40101704: faf421 l32r a2, 401002d4 +40101707: f0c112 addi a1, a1, -16 +4010170a: 0228 l32i.n a2, a2, 0 +4010170c: 3109 s32i.n a0, a1, 12 +4010170e: fb0c01 l32r a0, 40100340 +40101711: 0000c0 callx0 a0 +40101714: fffa01 l32r a0, 401016fc +40101717: 0000c0 callx0 a0 +4010171a: fff731 l32r a3, 401016f8 +4010171d: 726c movi.n a2, -25 +4010171f: 0020c0 memw +40101722: 0348 l32i.n a4, a3, 0 +40101724: 102420 and a2, a4, a2 +40101727: 0020c0 memw +4010172a: 0329 s32i.n a2, a3, 0 +4010172c: fff501 l32r a0, 40101700 +4010172f: 0000c0 callx0 a0 +40101732: 3108 l32i.n a0, a1, 12 +40101734: 10c112 addi a1, a1, 16 +40101737: f00d ret.n +40101739: 000000 ill +4010173c: f20c00 excw +4010173f: 3f .byte 0x3f +40101740: fecd34 excw +40101743: 3f .byte 0x3f + +40101744 : +40101744: fffe21 l32r a2, 4010173c +40101747: 0020c0 memw +4010174a: 0238 l32i.n a3, a2, 0 +4010174c: fffd21 l32r a2, 40101740 +4010174f: 0228 l32i.n a2, a2, 0 +40101751: 232a add.n a2, a3, a2 +40101753: f00d ret.n +40101755: 000000 ill + +40101758 : +40101758: f0c112 addi a1, a1, -16 +4010175b: 3109 s32i.n a0, a1, 12 +4010175d: 008105 call0 40101f70 +40101760: 3108 l32i.n a0, a1, 12 +40101762: 10c112 addi a1, a1, 16 +40101765: f00d ret.n +40101767: 044000 extui a4, a0, 0, 1 +4010176a: 00 .byte 00 +4010176b: 18 .byte 0x18 + +4010176c : +4010176c: 747020 extui a7, a2, 0, 8 +4010176f: bfa022 movi a2, 191 +40101772: f44040 extui a4, a4, 0, 16 +40101775: 553277 bltu a2, a7, 401017ce +40101778: 052316 beqz a3, 401017ce +4010177b: 145030 extui a5, a3, 0, 2 +4010177e: 020c movi.n a2, 0 +40101780: 4c9527 bne a5, a2, 401017d0 +40101783: c0a052 movi a5, 192 +40101786: c05570 sub a5, a5, a7 +40101789: 1155e0 slli a5, a5, 2 +4010178c: 402547 blt a5, a4, 401017d0 +4010178f: 142040 extui a2, a4, 0, 2 +40101792: a28c beqz.n a2, 401017a0 +40101794: 414240 srli a4, a4, 2 +40101797: 01c442 addi a4, a4, 1 +4010179a: 1144e0 slli a4, a4, 2 +4010179d: f44040 extui a4, a4, 0, 16 +401017a0: fff281 l32r a8, 40101768 +401017a3: 414240 srli a4, a4, 2 +401017a6: 050c movi.n a5, 0 +401017a8: f42050 extui a2, a5, 0, 16 +401017ab: 1bb247 bgeu a2, a4, 401017ca +401017ae: 657a add.n a6, a5, a7 +401017b0: a02230 addx4 a2, a2, a3 +401017b3: 668a add.n a6, a6, a8 +401017b5: 0020c0 memw +401017b8: 0228 l32i.n a2, a2, 0 +401017ba: 1166e0 slli a6, a6, 2 +401017bd: 551b addi.n a5, a5, 1 +401017bf: 0020c0 memw +401017c2: 0629 s32i.n a2, a6, 0 +401017c4: 745050 extui a5, a5, 0, 8 +401017c7: fff746 j 401017a8 +401017ca: 120c movi.n a2, 1 +401017cc: f00d ret.n +401017ce: 020c movi.n a2, 0 +401017d0: f00d ret.n +401017d2: 000000 ill +401017d5: 600002 l8ui a0, a0, 96 +401017d8: 000830 excw +401017db: 080060 excw +401017de: 080000 excw +401017e1: 600007 bnone a0, a0, 40101845 +401017e4: 004cd0 break 12, 13 +401017e7: 40 .byte 0x40 + +401017e8 : +401017e8: d0c112 addi a1, a1, -48 +401017eb: b109 s32i.n a0, a1, 44 +401017ed: a1c9 s32i.n a12, a1, 40 +401017ef: fad301 l32r a0, 4010033c +401017f2: 0000c0 callx0 a0 +401017f5: fab721 l32r a2, 401002d4 +401017f8: 0228 l32i.n a2, a2, 0 +401017fa: fad101 l32r a0, 40100340 +401017fd: 0000c0 callx0 a0 +40101800: ffbf01 l32r a0, 401016fc +40101803: 0000c0 callx0 a0 +40101806: fff321 l32r a2, 401017d4 +40101809: fb5731 l32r a3, 40100568 +4010180c: 0020c0 memw +4010180f: 0239 s32i.n a3, a2, 0 +40101811: 0020c0 memw +40101814: 002232 l32i a3, a2, 0 +40101817: ff6356 bnez a3, 40101811 +4010181a: ffef41 l32r a4, 401017d8 +4010181d: cfae22 movi a2, 0xfffffecf +40101820: 0020c0 memw +40101823: 002432 l32i a3, a4, 0 +40101826: ffedc1 l32r a12, 401017dc +40101829: 103320 and a3, a3, a2 +4010182c: 30a022 movi a2, 48 +4010182f: 050c movi.n a5, 0 +40101831: 202320 or a2, a3, a2 +40101834: 0020c0 memw +40101837: 0429 s32i.n a2, a4, 0 +40101839: 053d mov.n a3, a5 +4010183b: 0c4d mov.n a4, a12 +4010183d: 0c2d mov.n a2, a12 +4010183f: ffe901 l32r a0, 401017e4 +40101842: 0000c0 callx0 a0 +40101845: 421c movi.n a2, 20 +40101847: fbce01 l32r a0, 40100780 +4010184a: 0000c0 callx0 a0 +4010184d: 040c movi.n a4, 0 +4010184f: 0c5d mov.n a5, a12 +40101851: 043d mov.n a3, a4 +40101853: 042d mov.n a2, a4 +40101855: ffe301 l32r a0, 401017e4 +40101858: 0000c0 callx0 a0 +4010185b: c41c movi.n a4, 28 +4010185d: 030c movi.n a3, 0 +4010185f: 012d mov.n a2, a1 +40101861: fbc201 l32r a0, 4010076c +40101864: 0000c0 callx0 a0 +40101867: fa6e31 l32r a3, 40100220 <_UserExceptionVector_1+0xc4> +4010186a: 520c movi.n a2, 5 +4010186c: 0020c0 memw +4010186f: 0329 s32i.n a2, a3, 0 +40101871: 0129 s32i.n a2, a1, 0 +40101873: 013d mov.n a3, a1 +40101875: c41c movi.n a4, 28 +40101877: 020c movi.n a2, 0 +40101879: ffef05 call0 4010176c +4010187c: fb3a31 l32r a3, 40100564 +4010187f: ffd821 l32r a2, 401017e0 +40101882: b108 l32i.n a0, a1, 44 +40101884: a1c8 l32i.n a12, a1, 40 +40101886: 0020c0 memw +40101889: 0239 s32i.n a3, a2, 0 +4010188b: 30c112 addi a1, a1, 48 +4010188e: f00d ret.n + +40101890 : +40101890: 747020 extui a7, a2, 0, 8 +40101893: bfa022 movi a2, 191 +40101896: f44040 extui a4, a4, 0, 16 +40101899: 553277 bltu a2, a7, 401018f2 +4010189c: 052316 beqz a3, 401018f2 +4010189f: 145030 extui a5, a3, 0, 2 +401018a2: 020c movi.n a2, 0 +401018a4: 4c9527 bne a5, a2, 401018f4 +401018a7: c0a052 movi a5, 192 +401018aa: c05570 sub a5, a5, a7 +401018ad: 1155e0 slli a5, a5, 2 +401018b0: 402547 blt a5, a4, 401018f4 +401018b3: 142040 extui a2, a4, 0, 2 +401018b6: a28c beqz.n a2, 401018c4 +401018b8: 414240 srli a4, a4, 2 +401018bb: 01c442 addi a4, a4, 1 +401018be: 1144e0 slli a4, a4, 2 +401018c1: f44040 extui a4, a4, 0, 16 +401018c4: ffa981 l32r a8, 40101768 +401018c7: 414240 srli a4, a4, 2 +401018ca: 050c movi.n a5, 0 +401018cc: f42050 extui a2, a5, 0, 16 +401018cf: 1bb247 bgeu a2, a4, 401018ee +401018d2: 657a add.n a6, a5, a7 +401018d4: 668a add.n a6, a6, a8 +401018d6: 1166e0 slli a6, a6, 2 +401018d9: 0020c0 memw +401018dc: 0668 l32i.n a6, a6, 0 +401018de: a02230 addx4 a2, a2, a3 +401018e1: 551b addi.n a5, a5, 1 +401018e3: 0020c0 memw +401018e6: 0269 s32i.n a6, a2, 0 +401018e8: 745050 extui a5, a5, 0, 8 +401018eb: fff746 j 401018cc +401018ee: 120c movi.n a2, 1 +401018f0: f00d ret.n +401018f2: 020c movi.n a2, 0 +401018f4: f00d ret.n +401018f6: 280000 excw +401018f9: fe8d excw +401018fb: 3f .byte 0x3f +401018fc: 22f490 excw +401018ff: 062440 excw +40101902: 846000 extui a6, a0, 0, 9 +40101905: 4022f4 excw +40101908: 000630 excw +4010190b: c11260 mul16u a1, a2, a6 +4010190e: 61c2f0 xsr.eps2 a15 +40101911: c22002 l32i a0, a0, 0x308 +40101914: f82120 excw +40101917: ff .byte 0xff +40101918: 11d9 s32i.n a13, a1, 4 +4010191a: 3109 s32i.n a0, a1, 12 +4010191c: 000232 l8ui a3, a2, 0 +4010191f: 02dd mov.n a13, a2 +40101921: 638c beqz.n a3, 4010192b +40101923: fff621 l32r a2, 401018fc +40101926: 0c3d mov.n a3, a12 +40101928: ffca85 call0 401015d4 +4010192b: fff521 l32r a2, 40101900 +4010192e: 0020c0 memw +40101931: 0238 l32i.n a3, a2, 0 +40101933: c03c30 sub a3, a12, a3 +40101936: 1613e6 bgei a3, 1, 40101950 +40101939: 0020c0 memw +4010193c: 02c8 l32i.n a12, a2, 0 +4010193e: 000d22 l8ui a2, a13, 0 +40101941: 50ccc2 addi a12, a12, 80 +40101944: 008216 beqz a2, 40101950 +40101947: ffef21 l32r a2, 40101904 +4010194a: 203cc0 or a3, a12, a12 +4010194d: ffc845 call0 401015d4 +40101950: ffee21 l32r a2, 40101908 +40101953: 3108 l32i.n a0, a1, 12 +40101955: 0020c0 memw +40101958: 02c9 s32i.n a12, a2, 0 +4010195a: 11d8 l32i.n a13, a1, 4 +4010195c: 21c8 l32i.n a12, a1, 8 +4010195e: 10c112 addi a1, a1, 16 +40101961: f00d ret.n +40101963: 803900 add a3, a9, a0 +40101966: fe .byte 0xfe +40101967: 3f .byte 0x3f +40101968: f478 l32i.n a7, a4, 60 +4010196a: 124022 s8i a2, a0, 18 +4010196d: c2f0c1 l32r a12, 400f2530 <__floatsidf+0xe4240> +40101970: 200261 l32r a6, 400c9978 <__floatsidf+0xbb688> +40101973: 2120c2 l32i a12, a0, 132 +40101976: e2ffe2 excw +40101979: c00061 l32r a6, 400f197c <__floatsidf+0xe368c> +4010197c: e80020 excw +4010197f: f92102 l32i a0, a1, 0x3e4 +40101982: ff .byte 0xff +40101983: 11d9 s32i.n a13, a1, 4 +40101985: 3109 s32i.n a0, a1, 12 +40101987: 000222 l8ui a2, a2, 0 +4010198a: 00a532 movi a3, 0x500 +4010198d: 0d5c movi.n a13, 80 +4010198f: 83d320 moveqz a13, a3, a2 +40101992: ffd921 l32r a2, 401018f8 +40101995: 000222 l8ui a2, a2, 0 +40101998: 628c beqz.n a2, 401019a2 +4010199a: fff321 l32r a2, 40101968 +4010199d: 0c3d mov.n a3, a12 +4010199f: ffc345 call0 401015d4 +401019a2: 2dea add.n a2, a13, a14 +401019a4: c03c20 sub a3, a12, a2 +401019a7: 0f13e6 bgei a3, 1, 401019ba +401019aa: c0ece0 sub a14, a12, a14 +401019ad: 0b1ea6 blti a14, 1, 401019bc +401019b0: 40cc22 addi a2, a12, 64 +401019b3: 2d2a add.n a2, a13, a2 +401019b5: 0000c6 j 401019bc +401019b8: 2d0000 excw +401019bb: c50c movi.n a5, 12 +401019bd: 02fff4 excw +401019c0: c20321 l32r a2, 400f21cc <__floatsidf+0xe3edc> +401019c3: d20221 l32r a2, 400f61cc <__floatsidf+0xe7edc> +401019c6: e80121 l32r a2, 400fb9cc <__floatsidf+0xed6dc> +401019c9: c11201 l32r a0, 400f1e14 <__floatsidf+0xe3b24> +401019cc: f00d10 subx8 a0, a13, a1 +401019cf: 8d0400 excw +401019d2: fe .byte 0xfe +401019d3: 3f .byte 0x3f +401019d4: 22f466 bnei a4, 0x100, 401019fa +401019d7: f45840 extui a5, a4, 8, 16 +401019da: 4c4022 s8i a2, a0, 76 +401019dd: 4022f4 excw +401019e0: 22f440 excw +401019e3: 862c40 excw +401019e6: fe .byte 0xfe +401019e7: 3f .byte 0x3f +401019e8: fe8630 excw +401019eb: 3f .byte 0x3f +401019ec: e0c112 addi a1, a1, -32 +401019ef: 51d9 s32i.n a13, a1, 20 +401019f1: 02dd mov.n a13, a2 +401019f3: fff721 l32r a2, 401019d0 +401019f6: 31f9 s32i.n a15, a1, 12 +401019f8: 02f8 l32i.n a15, a2, 0 +401019fa: 61c9 s32i.n a12, a1, 24 +401019fc: 41e9 s32i.n a14, a1, 16 +401019fe: 7109 s32i.n a0, a1, 28 +40101a00: 03cd mov.n a12, a3 +40101a02: 0e0c movi.n a14, 0 +40101a04: 0fac beqz.n a15, 40101a28 +40101a06: ffbc31 l32r a3, 401018f8 +40101a09: 000322 l8ui a2, a3, 0 +40101a0c: 828c beqz.n a2, 40101a18 +40101a0e: 1f48 l32i.n a4, a15, 4 +40101a10: fff121 l32r a2, 401019d4 +40101a13: 0d3d mov.n a3, a13 +40101a15: ffbbc5 call0 401015d4 +40101a18: 1f28 l32i.n a2, a15, 4 +40101a1a: c02d20 sub a2, a13, a2 +40101a1d: 0712a6 blti a2, 1, 40101a28 +40101a20: 0fed mov.n a14, a15 +40101a22: 0ff8 l32i.n a15, a15, 0 +40101a24: fff706 j 40101a04 +40101a27: b43100 extui a3, a0, 1, 12 +40101a2a: ff .byte 0xff +40101a2b: 000322 l8ui a2, a3, 0 +40101a2e: 00a216 beqz a2, 40101a3c +40101a31: ffe921 l32r a2, 401019d8 +40101a34: 204ff0 or a4, a15, a15 +40101a37: 0e3d mov.n a3, a14 +40101a39: ffb985 call0 401015d4 +40101a3c: ffaf31 l32r a3, 401018f8 +40101a3f: 000322 l8ui a2, a3, 0 +40101a42: 628c beqz.n a2, 40101a4c +40101a44: ffe621 l32r a2, 401019dc +40101a47: 0d3d mov.n a3, a13 +40101a49: ffb885 call0 401015d4 +40101a4c: 0cf9 s32i.n a15, a12, 0 +40101a4e: 1cd9 s32i.n a13, a12, 4 +40101a50: 4e8c beqz.n a14, 40101a58 +40101a52: 0ec9 s32i.n a12, a14, 0 +40101a54: 000706 j 40101a74 +40101a57: de2100 excw +40101a5a: ff .byte 0xff +40101a5b: ffa731 l32r a3, 401018f8 +40101a5e: 0062c2 s32i a12, a2, 0 +40101a61: 000322 l8ui a2, a3, 0 +40101a64: 007216 beqz a2, 40101a6f +40101a67: ffde21 l32r a2, 401019e0 +40101a6a: 0d3d mov.n a3, a13 +40101a6c: ffb645 call0 401015d4 +40101a6f: 0d2d mov.n a2, a13 +40101a71: ffef85 call0 4010196c +40101a74: 0c28 l32i.n a2, a12, 0 +40101a76: 129c27 bne a12, a2, 40101a8c +40101a79: ffda31 l32r a3, 401019e4 +40101a7c: ffdb21 l32r a2, 401019e8 +40101a7f: dea042 movi a4, 222 +40101a82: f9bf01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40101a85: 0000c0 callx0 a0 +40101a88: ffff06 j 40101a88 +40101a8b: 710800 excw +40101a8e: 61c8 l32i.n a12, a1, 24 +40101a90: 51d8 l32i.n a13, a1, 20 +40101a92: 41e8 l32i.n a14, a1, 16 +40101a94: 31f8 l32i.n a15, a1, 12 +40101a96: 20c112 addi a1, a1, 32 +40101a99: f00d ret.n +40101a9b: 0e2400 excw +40101a9e: 0c4000 excw +40101aa1: c11204 excw +40101aa4: 043df0 extui a3, a15, 13, 1 +40101aa7: f21c movi.n a2, 31 +40101aa9: 3109 s32i.n a0, a1, 12 +40101aab: fffc01 l32r a0, 40101a9c +40101aae: 0000c0 callx0 a0 +40101ab1: 3108 l32i.n a0, a1, 12 +40101ab3: 10c112 addi a1, a1, 16 +40101ab6: f00d ret.n +40101ab8: 000f80 ret +40101abb: 40 .byte 0x40 + +40101abc : +40101abc: f0c112 addi a1, a1, -16 +40101abf: 21c9 s32i.n a12, a1, 8 +40101ac1: 3109 s32i.n a0, a1, 12 +40101ac3: 20c220 or a12, a2, a2 +40101ac6: fa1d01 l32r a0, 4010033c +40101ac9: 0000c0 callx0 a0 +40101acc: ffc131 l32r a3, 401019d0 +40101acf: 040c movi.n a4, 0 +40101ad1: 0328 l32i.n a2, a3, 0 +40101ad3: f28c beqz.n a2, 40101ae6 +40101ad5: 0712c7 beq a2, a12, 40101ae0 +40101ad8: 024d mov.n a4, a2 +40101ada: 0228 l32i.n a2, a2, 0 +40101adc: fffcc6 j 40101ad3 +40101adf: 0c2800 excw +40101ae2: 749c beqz.n a4, 40101afd +40101ae4: 0429 s32i.n a2, a4, 0 +40101ae6: f27c movi.n a2, -1 +40101ae8: 0c29 s32i.n a2, a12, 0 +40101aea: 020c movi.n a2, 0 +40101aec: 2c29 s32i.n a2, a12, 8 +40101aee: fff201 l32r a0, 40101ab8 +40101af1: 0000c0 callx0 a0 +40101af4: 3108 l32i.n a0, a1, 12 +40101af6: 21c8 l32i.n a12, a1, 8 +40101af8: 10c112 addi a1, a1, 16 +40101afb: f00d ret.n +40101afd: 0329 s32i.n a2, a3, 0 +40101aff: fe3216 beqz a2, 40101ae6 +40101b02: 1228 l32i.n a2, a2, 4 +40101b04: ffe645 call0 4010196c +40101b07: fff6c6 j 40101ae6 +40101b0a: 2b0000 excw +40101b0d: 4022f4 excw +40101b10: 0689d0 excw +40101b13: f40f00 extui a0, a0, 15, 16 +40101b16: 594022 s8i a2, a0, 89 +40101b19: 198a57 bany a10, a5, 40101b36 +40101b1c: 22f3f3 excw +40101b1f: f3e740 excw +40101b22: 404022 s8i a2, a0, 64 +40101b25: 4c4b addi.n a4, a12, 4 +40101b27: 424000 excw +40101b2a: 0f .byte 0xf +40101b2b: d7a300 excw +40101b2e: 0068 l32i.n a6, a0, 0 +40101b30: f3cb addi.n a15, a3, 12 +40101b32: bf4022 s8i a2, a0, 191 +40101b35: 4022f3 excw +40101b38: af .byte 0xaf +40101b39: 000035 excw +40101b3c: 04c4b4 excw +40101b3f: f3b300 excw +40101b42: a74022 s8i a2, a0, 167 +40101b45: 4022f3 excw +40101b48: f39b addi.n a15, a3, 9 +40101b4a: 22 .byte 0x22 +40101b4b: 40 .byte 0x40 + +40101b4c : +40101b4c: d0c112 addi a1, a1, -48 +40101b4f: 0961d2 s32i a13, a1, 36 +40101b52: 744040 extui a4, a4, 0, 8 +40101b55: 20d220 or a13, a2, a2 +40101b58: 002222 l32i a2, a2, 0 +40101b5b: a1c9 s32i.n a12, a1, 40 +40101b5d: 81e9 s32i.n a14, a1, 32 +40101b5f: b109 s32i.n a0, a1, 44 +40101b61: 71f9 s32i.n a15, a1, 28 +40101b63: 0149 s32i.n a4, a1, 0 +40101b65: 03cd mov.n a12, a3 +40101b67: 74e050 extui a14, a5, 0, 8 +40101b6a: 040226 beqi a2, -1, 40101b72 +40101b6d: 0d2d mov.n a2, a13 +40101b6f: fff4c5 call0 40101abc +40101b72: 032d22 l32i a2, a13, 12 +40101b75: 00b256 bnez a2, 40101b84 +40101b78: ffe521 l32r a2, 40101b0c +40101b7b: 203dd0 or a3, a13, a13 +40101b7e: ffa545 call0 401015d4 +40101b81: 004a86 j 40101caf +40101b84: ff7821 l32r a2, 40101964 +40101b87: 000222 l8ui a2, a2, 0 +40101b8a: 073256 bnez a2, 40101c01 +40101b8d: 1a1e66 bnei a14, 1, 40101bab +40101b90: ffe021 l32r a2, 40101b10 +40101b93: 05b2c7 bgeu a2, a12, 40101b9c +40101b96: ffdf21 l32r a2, 40101b14 +40101b99: 001b46 j 40101c0a +40101b9c: 112cb0 slli a2, a12, 5 +40101b9f: c022c0 sub a2, a2, a12 +40101ba2: a0c2c0 addx4 a12, a2, a12 +40101ba5: 11ccd0 slli a12, a12, 3 +40101ba8: 000346 j 40101bb9 +40101bab: ffdb21 l32r a2, 40101b18 +40101bae: 07b2c7 bgeu a2, a12, 40101bb9 +40101bb1: ffda21 l32r a2, 40101b1c +40101bb4: 001486 j 40101c0a +40101bb7: 210000 srai a0, a0, 0 +40101bba: 4f .byte 0x4f +40101bbb: ff .byte 0xff +40101bbc: 000222 l8ui a2, a2, 0 +40101bbf: 008216 beqz a2, 40101bcb +40101bc2: ffd721 l32r a2, 40101b20 +40101bc5: 203cc0 or a3, a12, a12 +40101bc8: ffa085 call0 401015d4 +40101bcb: 005c56 bnez a12, 40101bd4 +40101bce: 0f0c movi.n a15, 0 +40101bd0: 0023c6 j 40101c63 +40101bd3: a32200 movltz a2, a2, a0 +40101bd6: c75a add.n a12, a7, a5 +40101bd8: c012b2 l16ui a11, a2, 0x180 +40101bdb: c04142 s8i a4, a1, 192 +40101bde: 4014c0 excw +40101be1: c0a044 excw +40101be4: a0cc bnez.n a0, 40101bf2 +40101be6: a0f4c0 addx4 a15, a4, a12 +40101be9: 001d86 j 40101c63 +40101bec: cd2100 excw +40101bef: ff .byte 0xff +40101bf0: ffce31 l32r a3, 40101b28 +40101bf3: 822c20 mull a2, a12, a2 +40101bf6: fac601 l32r a0, 40100710 +40101bf9: 0000c0 callx0 a0 +40101bfc: 02fd mov.n a15, a2 +40101bfe: 001846 j 40101c63 +40101c01: ffca21 l32r a2, 40101b2c +40101c04: 09b2c7 bgeu a2, a12, 40101c11 +40101c07: ffca21 l32r a2, 40101b30 +40101c0a: ff9c85 call0 401015d4 +40101c0d: 002786 j 40101caf +40101c10: 39e100 excw +40101c13: ff .byte 0xff +40101c14: 000e22 l8ui a2, a14, 0 +40101c17: 08e216 beqz a2, 40101ca9 +40101c1a: ffc621 l32r a2, 40101b34 +40101c1d: 0c3d mov.n a3, a12 +40101c1f: 0f0c movi.n a15, 0 +40101c21: ff9b05 call0 401015d4 +40101c24: 2e1cf7 beq a12, a15, 40101c56 +40101c27: ffc421 l32r a2, 40101b38 +40101c2a: 17b2c7 bgeu a2, a12, 40101c45 +40101c2d: 4142c0 srli a4, a12, 2 +40101c30: e2a422 movi a2, 0x4e2 +40101c33: 14c0c0 extui a12, a12, 0, 2 +40101c36: 823420 mull a3, a4, a2 +40101c39: a02cc0 addx4 a2, a12, a12 +40101c3c: f0c2c0 subx8 a12, a2, a12 +40101c3f: b0fc30 addx8 a15, a12, a3 +40101c42: 000406 j 40101c56 +40101c45: ffbd21 l32r a2, 40101b3c +40101c48: e8a332 movi a3, 0x3e8 +40101c4b: 822c20 mull a2, a12, a2 +40101c4e: fab001 l32r a0, 40100710 +40101c51: 0000c0 callx0 a0 +40101c54: 02fd mov.n a15, a2 +40101c56: 000e22 l8ui a2, a14, 0 +40101c59: 628c beqz.n a2, 40101c63 +40101c5b: ffb921 l32r a2, 40101b40 +40101c5e: 0f3d mov.n a3, a15 +40101c60: ff9705 call0 401015d4 +40101c63: 0128 l32i.n a2, a1, 0 +40101c65: 028c beqz.n a2, 40101c69 +40101c67: 2df9 s32i.n a15, a13, 8 +40101c69: f9b401 l32r a0, 4010033c +40101c6c: 0000c0 callx0 a0 +40101c6f: ff2421 l32r a2, 40101900 +40101c72: 0020c0 memw +40101c75: 0022c2 l32i a12, a2, 0 +40101c78: ff2021 l32r a2, 401018f8 +40101c7b: 000232 l8ui a3, a2, 0 +40101c7e: 02ed mov.n a14, a2 +40101c80: 638c beqz.n a3, 40101c8a +40101c82: ffb021 l32r a2, 40101b44 +40101c85: 0c3d mov.n a3, a12 +40101c87: ff94c5 call0 401015d4 +40101c8a: 000e22 l8ui a2, a14, 0 +40101c8d: cfca add.n a12, a15, a12 +40101c8f: 628c beqz.n a2, 40101c99 +40101c91: ffad21 l32r a2, 40101b48 +40101c94: 0c3d mov.n a3, a12 +40101c96: ff93c5 call0 401015d4 +40101c99: 0d3d mov.n a3, a13 +40101c9b: 0c2d mov.n a2, a12 +40101c9d: ffd4c5 call0 401019ec +40101ca0: ff8601 l32r a0, 40101ab8 +40101ca3: 0000c0 callx0 a0 +40101ca6: 000146 j 40101caf +40101ca9: f7ac56 bnez a12, 40101c27 +40101cac: ffc786 j 40101bce +40101caf: b108 l32i.n a0, a1, 44 +40101cb1: a1c8 l32i.n a12, a1, 40 +40101cb3: 91d8 l32i.n a13, a1, 36 +40101cb5: 81e8 l32i.n a14, a1, 32 +40101cb7: 71f8 l32i.n a15, a1, 28 +40101cb9: 30c112 addi a1, a1, 48 +40101cbc: f00d ret.n +40101cbe: 880000 excw +40101cc1: 402023 excw +40101cc4: 228e14 excw +40101cc7: 907040 addx2 a7, a0, a4 +40101cca: a04022 s8i a2, a0, 160 +40101ccd: 228d excw +40101ccf: c11240 mul16u a1, a2, a4 +40101cd2: 31f9e0 srai a15, a14, 25 +40101cd5: 02fd mov.n a15, a2 +40101cd7: 0328 l32i.n a2, a3, 0 +40101cd9: 51d9 s32i.n a13, a1, 20 +40101cdb: 7109 s32i.n a0, a1, 28 +40101cdd: 61c9 s32i.n a12, a1, 24 +40101cdf: 41e9 s32i.n a14, a1, 16 +40101ce1: 03dd mov.n a13, a3 +40101ce3: b2cc bnez.n a2, 40101cf2 +40101ce5: 0f2d mov.n a2, a15 +40101ce7: fff601 l32r a0, 40101cc0 +40101cea: 0000c0 callx0 a0 +40101ced: 02ed mov.n a14, a2 +40101cef: 000bc6 j 40101d22 +40101cf2: 040c movi.n a4, 0 +40101cf4: 041332 l16ui a3, a3, 8 +40101cf7: 202440 or a2, a4, a4 +40101cfa: fff201 l32r a0, 40101cc4 +40101cfd: 0000c0 callx0 a0 +40101d00: 02cd mov.n a12, a2 +40101d02: fe7c movi.n a14, -1 +40101d04: a29c beqz.n a2, 40101d22 +40101d06: 0d3d mov.n a3, a13 +40101d08: fff001 l32r a0, 40101cc8 +40101d0b: 0000c0 callx0 a0 +40101d0e: 0c3d mov.n a3, a12 +40101d10: 0f2d mov.n a2, a15 +40101d12: ffeb01 l32r a0, 40101cc0 +40101d15: 0000c0 callx0 a0 +40101d18: 02ed mov.n a14, a2 +40101d1a: 0c2d mov.n a2, a12 +40101d1c: ffec01 l32r a0, 40101ccc +40101d1f: 0000c0 callx0 a0 +40101d22: 7108 l32i.n a0, a1, 28 +40101d24: 0e2d mov.n a2, a14 +40101d26: 61c8 l32i.n a12, a1, 24 +40101d28: 51d8 l32i.n a13, a1, 20 +40101d2a: 41e8 l32i.n a14, a1, 16 +40101d2c: 31f8 l32i.n a15, a1, 12 +40101d2e: 20c112 addi a1, a1, 32 +40101d31: f00d ret.n +40101d33: ffff00 excw +40101d36: 0f0000 excw +40101d39: 0000f0 excw +40101d3c: 0f .byte 0xf +40101d3d: 000070 excw +40101d40: 001002 l16ui a0, a0, 0 +40101d43: 400200 ssr a2 +40101d46: 020000 excw +40101d49: 000050 excw +40101d4c: 009002 l16si a0, a0, 0 +40101d4f: 000000 ill +40101d52: ff .byte 0xff +40101d53: ff .byte 0xff + +40101d54 : +40101d54: 0278 l32i.n a7, a2, 0 +40101d56: 03ee90 rsr.excvaddr a9 +40101d59: c47c movi.n a4, -4 +40101d5b: 104470 and a4, a4, a7 +40101d5e: 0458 l32i.n a5, a4, 0 +40101d60: 1468 l32i.n a6, a4, 4 +40101d62: 402700 ssa8l a7 +40101d65: 817650 src a7, a6, a5 +40101d68: fff461 l32r a6, 40101d38 +40101d6b: 106760 and a6, a7, a6 +40101d6e: 1e2626 beqi a6, 2, 40101d90 +40101d71: fff251 l32r a5, 40101d3c +40101d74: fff331 l32r a3, 40101d40 +40101d77: 105750 and a5, a7, a5 +40101d7a: 1a1537 beq a5, a3, 40101d98 +40101d7d: fff131 l32r a3, 40101d44 +40101d80: 1c1637 beq a6, a3, 40101da0 +40101d83: fff131 l32r a3, 40101d48 +40101d86: 1e1637 beq a6, a3, 40101da8 +40101d89: 004110 break 1, 1 +40101d8c: ffff06 j 40101d8c +40101d8f: a03200 addx4 a3, a2, a0 +40101d92: ff .byte 0xff +40101d93: 000106 j 40101d9b +40101d96: 310000 srai a0, a0, 16 +40101d99: 0cffe7 bbsi a15, 30, 40101da9 +40101d9c: 030605 call0 40104e00 +40101d9f: a03200 addx4 a3, a2, a0 +40101da2: ff .byte 0xff +40101da3: 000106 j 40101dab +40101da6: 310000 srai a0, a0, 16 +40101da9: 0cffe3 excw +40101dac: 747015 excw +40101daf: 172634 excw +40101db2: 870bd5 excw +40101db5: 040c movi.n a4, 0 +40101db7: 934870 movnez a4, a8, a7 +40101dba: c87c movi.n a8, -4 +40101dbc: 047d mov.n a7, a4 +40101dbe: 108980 and a8, a9, a8 +40101dc1: 144090 extui a4, a9, 0, 2 +40101dc4: 08a8 l32i.n a10, a8, 0 +40101dc6: 774b addi.n a7, a7, 4 +40101dc8: 1144d0 slli a4, a4, 3 +40101dcb: e5dc bnez.n a5, 40101ded +40101dcd: 400400 ssr a4 +40101dd0: 9140a0 srl a4, a10 +40101dd3: 103340 and a3, a3, a4 +40101dd6: ffdd41 l32r a4, 40101d4c +40101dd9: 089647 bne a6, a4, 40101de5 +40101ddc: 0563f7 bbci a3, 15, 40101de5 +40101ddf: ffdc41 l32r a4, 40101d50 +40101de2: 203340 or a3, a3, a4 +40101de5: a07720 addx4 a7, a7, a2 +40101de8: 0739 s32i.n a3, a7, 0 +40101dea: 000806 j 40101e0e +40101ded: 401400 ssl a4 +40101df0: a16300 sll a6, a3 +40101df3: f57c movi.n a5, -1 +40101df5: a07720 addx4 a7, a7, a2 +40101df8: 305560 xor a5, a5, a6 +40101dfb: 0768 l32i.n a6, a7, 0 +40101dfd: 1055a0 and a5, a5, a10 +40101e00: 103360 and a3, a3, a6 +40101e03: 401400 ssl a4 +40101e06: a14300 sll a4, a3 +40101e09: 204450 or a4, a4, a5 +40101e0c: 0849 s32i.n a4, a8, 0 +40101e0e: 0238 l32i.n a3, a2, 0 +40101e10: 333b addi.n a3, a3, 3 +40101e12: 0239 s32i.n a3, a2, 0 +40101e14: f00d ret.n +40101e16: 740000 extui a0, a0, 0, 8 +40101e19: fe8d excw +40101e1b: 3f .byte 0x3f +40101e1c: fe8d70 excw +40101e1f: 3f .byte 0x3f +40101e20: fffe31 l32r a3, 40101e18 +40101e23: 0358 l32i.n a5, a3, 0 +40101e25: 05b527 bgeu a5, a2, 40101e2e +40101e28: 053d mov.n a3, a5 +40101e2a: fffd46 j 40101e23 +40101e2d: 134800 excw +40101e30: 634a add.n a6, a3, a4 +40101e32: 079267 bne a2, a6, 40101e3d +40101e35: 1228 l32i.n a2, a2, 4 +40101e37: 424a add.n a4, a2, a4 +40101e39: 1349 s32i.n a4, a3, 4 +40101e3b: 032d mov.n a2, a3 +40101e3d: 1268 l32i.n a6, a2, 4 +40101e3f: 426a add.n a4, a2, a6 +40101e41: 149547 bne a5, a4, 40101e59 +40101e44: fff651 l32r a5, 40101e1c +40101e47: 0558 l32i.n a5, a5, 0 +40101e49: 071457 beq a4, a5, 40101e54 +40101e4c: 1458 l32i.n a5, a4, 4 +40101e4e: 0448 l32i.n a4, a4, 0 +40101e50: 656a add.n a6, a5, a6 +40101e52: 1269 s32i.n a6, a2, 4 +40101e54: 0249 s32i.n a4, a2, 0 +40101e56: 000046 j 40101e5b +40101e59: 0259 s32i.n a5, a2, 0 +40101e5b: 011237 beq a2, a3, 40101e60 +40101e5e: 0329 s32i.n a2, a3, 0 +40101e60: f00d ret.n +40101e62: 600000 neg a0, a0 +40101e65: fe8d excw +40101e67: 3f .byte 0x3f +40101e68: 8d5c movi.n a13, 88 +40101e6a: fe .byte 0xfe +40101e6b: 3f .byte 0x3f + +40101e6c : +40101e6c: fffe41 l32r a4, 40101e64 +40101e6f: 0438 l32i.n a3, a4, 0 +40101e71: 07b327 bgeu a3, a2, 40101e7c +40101e74: 438c beqz.n a3, 40101e7c +40101e76: 034d mov.n a4, a3 +40101e78: fffcc6 j 40101e6f +40101e7b: 023900 excw +40101e7e: fffa31 l32r a3, 40101e68 +40101e81: 0429 s32i.n a2, a4, 0 +40101e83: 1248 l32i.n a4, a2, 4 +40101e85: 0328 l32i.n a2, a3, 0 +40101e87: 242a add.n a2, a4, a2 +40101e89: 0329 s32i.n a2, a3, 0 +40101e8b: f00d ret.n +40101e8d: 000000 ill + +40101e90 : +40101e90: fff531 l32r a3, 40101e64 +40101e93: 0348 l32i.n a4, a3, 0 +40101e95: 139427 bne a4, a2, 40101eac +40101e98: 0248 l32i.n a4, a2, 0 +40101e9a: 1228 l32i.n a2, a2, 4 +40101e9c: 0349 s32i.n a4, a3, 0 +40101e9e: fff241 l32r a4, 40101e68 +40101ea1: 0438 l32i.n a3, a4, 0 +40101ea3: c02320 sub a2, a3, a2 +40101ea6: 0429 s32i.n a2, a4, 0 +40101ea8: 020c movi.n a2, 0 +40101eaa: f00d ret.n +40101eac: 448c beqz.n a4, 40101eb4 +40101eae: 043d mov.n a3, a4 +40101eb0: fff7c6 j 40101e93 +40101eb3: 021600 excw +40101eb6: fe .byte 0xfe +40101eb7: f27c movi.n a2, -1 +40101eb9: f00d ret.n +40101ebb: 8d5000 excw +40101ebe: fe .byte 0xfe +40101ebf: 3f .byte 0x3f +40101ec0: fe8681 l32r a8, 401018d8 +40101ec3: 3f .byte 0x3f +40101ec4: fe8637 bany a6, a3, 40101ec6 +40101ec7: 3f .byte 0x3f +40101ec8: fe8650 excw +40101ecb: 3f .byte 0x3f +40101ecc: 8d58 l32i.n a5, a13, 32 +40101ece: fe .byte 0xfe +40101ecf: 3f .byte 0x3f + +40101ed0 : +40101ed0: f0c112 addi a1, a1, -16 +40101ed3: 01e9 s32i.n a14, a1, 0 +40101ed5: 3109 s32i.n a0, a1, 12 +40101ed7: 21c9 s32i.n a12, a1, 8 +40101ed9: 11d9 s32i.n a13, a1, 4 +40101edb: 02ed mov.n a14, a2 +40101edd: 065216 beqz a2, 40101f46 +40101ee0: f0c2c2 addi a12, a2, -16 +40101ee3: fff621 l32r a2, 40101ebc +40101ee6: 1c48 l32i.n a4, a12, 4 +40101ee8: 0238 l32i.n a3, a2, 0 +40101eea: 02dd mov.n a13, a2 +40101eec: 0e8437 bany a4, a3, 40101efe +40101eef: fff431 l32r a3, 40101ec0 +40101ef2: fff421 l32r a2, 40101ec4 +40101ef5: 05a242 movi a4, 0x205 +40101ef8: f8a201 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40101efb: 0000c0 callx0 a0 +40101efe: 1c28 l32i.n a2, a12, 4 +40101f00: 0d38 l32i.n a3, a13, 0 +40101f02: 400237 bnone a2, a3, 40101f46 +40101f05: f47c movi.n a4, -1 +40101f07: 303430 xor a3, a4, a3 +40101f0a: 102320 and a2, a3, a2 +40101f0d: 1c29 s32i.n a2, a12, 4 +40101f0f: f90b01 l32r a0, 4010033c +40101f12: 0000c0 callx0 a0 +40101f15: 0c2d mov.n a2, a12 +40101f17: fff785 call0 40101e90 +40101f1a: 00f2d6 bgez a2, 40101f2d +40101f1d: ffea21 l32r a2, 40101ec8 +40101f20: 0e3d mov.n a3, a14 +40101f22: f89701 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40101f25: 0000c0 callx0 a0 +40101f28: 000506 j 40101f40 +40101f2b: 310000 srai a0, a0, 16 +40101f2e: 42ffe7 bbsi a15, 30, 40101f74 +40101f31: 012c movi.n a1, 32 +40101f33: 002322 l32i a2, a3, 0 +40101f36: 802420 add a2, a4, a2 +40101f39: 0329 s32i.n a2, a3, 0 +40101f3b: 0c2d mov.n a2, a12 +40101f3d: ffee05 call0 40101e20 +40101f40: fede01 l32r a0, 40101ab8 +40101f43: 0000c0 callx0 a0 +40101f46: 3108 l32i.n a0, a1, 12 +40101f48: 21c8 l32i.n a12, a1, 8 +40101f4a: 11d8 l32i.n a13, a1, 4 +40101f4c: 01e8 l32i.n a14, a1, 0 +40101f4e: 10c112 addi a1, a1, 16 +40101f51: f00d ret.n +40101f53: f54f00 extui a4, a0, 31, 16 +40101f56: 22 .byte 0x22 +40101f57: 40 .byte 0x40 + +40101f58 : +40101f58: ffff31 l32r a3, 40101f54 +40101f5b: f0c112 addi a1, a1, -16 +40101f5e: 00a042 movi a4, 0 +40101f61: 036102 s32i a0, a1, 12 +40101f64: fff685 call0 40101ed0 +40101f67: 032102 l32i a0, a1, 12 +40101f6a: 10c112 addi a1, a1, 16 +40101f6d: f00d ret.n + ... + +40101f70 : +40101f70: ffd721 l32r a2, 40101ecc +40101f73: 0228 l32i.n a2, a2, 0 +40101f75: f00d ret.n +40101f77: 866a00 excw +40101f7a: fe .byte 0xfe +40101f7b: 3f .byte 0x3f +40101f7c: fe8d54 excw +40101f7f: 3f .byte 0x3f + +40101f80 : +40101f80: ffa761 l32r a6, 40101e1c +40101f83: d0c112 addi a1, a1, -48 +40101f86: 0129 s32i.n a2, a1, 0 +40101f88: 0628 l32i.n a2, a6, 0 +40101f8a: b109 s32i.n a0, a1, 44 +40101f8c: a1c9 s32i.n a12, a1, 40 +40101f8e: 91d9 s32i.n a13, a1, 36 +40101f90: 81e9 s32i.n a14, a1, 32 +40101f92: 71f9 s32i.n a15, a1, 28 +40101f94: 012216 beqz a2, 40101faa +40101f97: fff831 l32r a3, 40101f78 +40101f9a: ffca21 l32r a2, 40101ec4 +40101f9d: 21a342 movi a4, 0x321 +40101fa0: 1169 s32i.n a6, a1, 4 +40101fa2: f87701 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40101fa5: 0000c0 callx0 a0 +40101fa8: 1168 l32i.n a6, a1, 4 +40101faa: 0d0c movi.n a13, 0 +40101fac: 0128 l32i.n a2, a1, 0 +40101fae: 0dcd mov.n a12, a13 +40101fb0: 12e8 l32i.n a14, a2, 4 +40101fb2: 083e16 beqz a14, 40102039 +40101fb5: 02f8 l32i.n a15, a2, 0 +40101fb7: 2420f0 extui a2, a15, 0, 3 +40101fba: c28c beqz.n a2, 40101fca +40101fbc: 3f7b addi.n a3, a15, 7 +40101fbe: 827c movi.n a2, -8 +40101fc0: 103320 and a3, a3, a2 +40101fc3: eefa add.n a14, a14, a15 +40101fc5: c0ee30 sub a14, a14, a3 +40101fc8: 03fd mov.n a15, a3 +40101fca: bdcc bnez.n a13, 40101fd9 +40101fcc: ff9321 l32r a2, 40101e18 +40101fcf: 030c movi.n a3, 0 +40101fd1: 02f9 s32i.n a15, a2, 0 +40101fd3: 1239 s32i.n a3, a2, 4 +40101fd5: 000c06 j 40102009 +40101fd8: 062800 excw +40101fdb: 12dc bnez.n a2, 40101ff0 +40101fdd: ffe631 l32r a3, 40101f78 +40101fe0: ffb921 l32r a2, 40101ec4 +40101fe3: 42a342 movi a4, 0x342 +40101fe6: 1169 s32i.n a6, a1, 4 +40101fe8: f86601 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40101feb: 0000c0 callx0 a0 +40101fee: 1168 l32i.n a6, a1, 4 +40101ff0: 0628 l32i.n a2, a6, 0 +40101ff2: 1332f7 bltu a2, a15, 40102009 +40101ff5: ffe031 l32r a3, 40101f78 +40101ff8: ffb321 l32r a2, 40101ec4 +40101ffb: 45a342 movi a4, 0x345 +40101ffe: 1169 s32i.n a6, a1, 4 +40102000: f86001 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40102003: 0000c0 callx0 a0 +40102006: 012162 l32i a6, a1, 4 +40102009: 2efa add.n a2, a14, a15 +4010200b: 837c movi.n a3, -8 +4010200d: f0c222 addi a2, a2, -16 +40102010: 102230 and a2, a2, a3 +40102013: 030c movi.n a3, 0 +40102015: 1239 s32i.n a3, a2, 4 +40102017: 0239 s32i.n a3, a2, 0 +40102019: 0648 l32i.n a4, a6, 0 +4010201b: c032f0 sub a3, a2, a15 +4010201e: 0629 s32i.n a2, a6, 0 +40102020: 1f39 s32i.n a3, a15, 4 +40102022: 0f29 s32i.n a2, a15, 0 +40102024: 048c beqz.n a4, 40102028 +40102026: 04f9 s32i.n a15, a4, 0 +40102028: cc3a add.n a12, a12, a3 +4010202a: 5d1b addi.n a5, a13, 1 +4010202c: 0138 l32i.n a3, a1, 0 +4010202e: 74d050 extui a13, a5, 0, 8 +40102031: b02d30 addx8 a2, a13, a3 +40102034: ffde06 j 40101fb0 +40102037: 210000 srai a0, a0, 0 +4010203a: c9ffd0 excw +4010203d: a32102 l32i a0, a1, 0x28c +40102040: ff .byte 0xff +40102041: 02c9 s32i.n a12, a2, 0 +40102043: dccc bnez.n a12, 40102054 +40102045: ffcc31 l32r a3, 40101f78 +40102048: ff9f21 l32r a2, 40101ec4 +4010204b: 6ea342 movi a4, 0x36e +4010204e: f84c01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40102051: 0000c0 callx0 a0 +40102054: f95431 l32r a3, 401005a4 +40102057: ff9921 l32r a2, 40101ebc +4010205a: b108 l32i.n a0, a1, 44 +4010205c: 0239 s32i.n a3, a2, 0 +4010205e: ff8131 l32r a3, 40101e64 +40102061: 020c movi.n a2, 0 +40102063: 0329 s32i.n a2, a3, 0 +40102065: 1329 s32i.n a2, a3, 4 +40102067: ff8031 l32r a3, 40101e68 +4010206a: a1c8 l32i.n a12, a1, 40 +4010206c: 91d8 l32i.n a13, a1, 36 +4010206e: 81e8 l32i.n a14, a1, 32 +40102070: 71f8 l32i.n a15, a1, 28 +40102072: 0329 s32i.n a2, a3, 0 +40102074: 30c112 addi a1, a1, 48 +40102077: f00d ret.n +40102079: 000000 ill +4010207c: fe8d34 excw +4010207f: 3f .byte 0x3f +40102080: 8d38 l32i.n a3, a13, 32 +40102082: fe .byte 0xfe +40102083: 3f .byte 0x3f +40102084: e878 l32i.n a7, a8, 56 +40102086: fe .byte 0xfe +40102087: 3f .byte 0x3f +40102088: 632c movi.n a3, 38 +4010208a: 004010 break 0, 1 +4010208d: 4010c0 excw +40102090: 868b addi.n a8, a6, 8 +40102092: fe .byte 0xfe +40102093: 3f .byte 0x3f +40102094: fe8662 excw +40102097: 3f .byte 0x3f + +40102098 : +40102098: c0c112 addi a1, a1, -64 +4010209b: 0b61f2 s32i a15, a1, 44 +4010209e: 20f220 or a15, a2, a2 +401020a1: fff621 l32r a2, 4010207c +401020a4: d1d9 s32i.n a13, a1, 52 +401020a6: c1e9 s32i.n a14, a1, 48 +401020a8: f109 s32i.n a0, a1, 60 +401020aa: e1c9 s32i.n a12, a1, 56 +401020ac: 0139 s32i.n a3, a1, 0 +401020ae: 000232 l8ui a3, a2, 0 +401020b1: 1149 s32i.n a4, a1, 4 +401020b3: 74d050 extui a13, a5, 0, 8 +401020b6: 02ed mov.n a14, a2 +401020b8: d3ec bnez.n a3, 401020e9 +401020ba: fff231 l32r a3, 40102084 +401020bd: f82621 l32r a2, 40100158 <_NMILevelVector+0xbc> +401020c0: fff0c1 l32r a12, 40102080 +401020c3: c02230 sub a2, a2, a3 +401020c6: 0c39 s32i.n a3, a12, 0 +401020c8: 1c29 s32i.n a2, a12, 4 +401020ca: 03f605 call0 4010602c +401020cd: 0c3d mov.n a3, a12 +401020cf: 0c1266 bnei a2, 1, 401020df +401020d2: ffed41 l32r a4, 40102088 +401020d5: ffed21 l32r a2, 4010208c +401020d8: 2c49 s32i.n a4, a12, 8 +401020da: c02240 sub a2, a2, a4 +401020dd: 3c29 s32i.n a2, a12, 12 +401020df: 120c movi.n a2, 1 +401020e1: 004e22 s8i a2, a14, 0 +401020e4: 032d mov.n a2, a3 +401020e6: ffe985 call0 40101f80 +401020e9: ff4cc1 l32r a12, 40101e1c +401020ec: 002c22 l32i a2, a12, 0 +401020ef: d2cc bnez.n a2, 40102100 +401020f1: ffe731 l32r a3, 40102090 +401020f4: ff7421 l32r a2, 40101ec4 +401020f7: 50a142 movi a4, 0x150 +401020fa: f82101 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401020fd: 0000c0 callx0 a0 +40102100: f88f01 l32r a0, 4010033c +40102103: 0000c0 callx0 a0 +40102106: ff6d21 l32r a2, 40101ebc +40102109: 0e0c movi.n a14, 0 +4010210b: 0288 l32i.n a8, a2, 0 +4010210d: 0208f7 bnone a8, a15, 40102113 +40102110: 003206 j 401021dc +40102113: 029fe7 bne a15, a14, 40102119 +40102116: 003086 j 401021dc +40102119: 10cff2 addi a15, a15, 16 +4010211c: 2420f0 extui a2, a15, 0, 3 +4010211f: 0612e7 beq a2, a14, 40102129 +40102122: 827c movi.n a2, -8 +40102124: 106f20 and a6, a15, a2 +40102127: f68b addi.n a15, a6, 8 +40102129: 0e0c movi.n a14, 0 +4010212b: 029fe7 bne a15, a14, 40102131 +4010212e: 002a86 j 401021dc +40102131: ff6671 l32r a7, 40101ecc +40102134: 0758 l32i.n a5, a7, 0 +40102136: 02b5f7 bgeu a5, a15, 4010213c +40102139: 0027c6 j 401021dc +4010213c: ff3741 l32r a4, 40101e18 +4010213f: f929a1 l32r a10, 401005e4 +40102142: 0438 l32i.n a3, a4, 0 +40102144: 042d mov.n a2, a4 +40102146: 231d66 bnei a13, 1, 4010216d +40102149: 0298 l32i.n a9, a2, 0 +4010214b: b98c beqz.n a9, 4010215a +4010214d: 04ba97 bgeu a10, a9, 40102155 +40102150: 19b8 l32i.n a11, a9, 4 +40102152: 093fb7 bltu a15, a11, 4010215f +40102155: 092d mov.n a2, a9 +40102157: fffb86 j 40102149 +4010215a: 042d mov.n a2, a4 +4010215c: 000346 j 4010216d +4010215f: 093d mov.n a3, a9 +40102161: 000206 j 4010216d +40102164: 034800 excw +40102167: 748c beqz.n a4, 40102172 +40102169: 032d mov.n a2, a3 +4010216b: 043d mov.n a3, a4 +4010216d: 1348 l32i.n a4, a3, 4 +4010216f: f234f7 bltu a4, a15, 40102165 +40102172: 6dcc bnez.n a13, 4010217c +40102174: f91c41 l32r a4, 401005e4 +40102177: 01b437 bgeu a4, a3, 4010217c +4010217a: 0c38 l32i.n a3, a12, 0 +4010217c: 002c92 l32i a9, a12, 0 +4010217f: 00a0e2 movi a14, 0 +40102182: 561397 beq a3, a9, 401021dc +40102185: 002392 l32i a9, a3, 0 +40102188: 0248 l32i.n a4, a2, 0 +4010218a: 0299 s32i.n a9, a2, 0 +4010218c: 1398 l32i.n a9, a3, 4 +4010218e: 022c movi.n a2, 32 +40102190: c099f0 sub a9, a9, a15 +40102193: 10c4e2 addi a14, a4, 16 +40102196: 18b297 bgeu a2, a9, 401021b2 +40102199: 23fa add.n a2, a3, a15 +4010219b: 1299 s32i.n a9, a2, 4 +4010219d: 13f9 s32i.n a15, a3, 4 +4010219f: 2139 s32i.n a3, a1, 8 +401021a1: 4159 s32i.n a5, a1, 16 +401021a3: 5179 s32i.n a7, a1, 20 +401021a5: 3189 s32i.n a8, a1, 12 +401021a7: ffc785 call0 40101e20 +401021aa: 3188 l32i.n a8, a1, 12 +401021ac: 5178 l32i.n a7, a1, 20 +401021ae: 4158 l32i.n a5, a1, 16 +401021b0: 2138 l32i.n a3, a1, 8 +401021b2: 1398 l32i.n a9, a3, 4 +401021b4: c02590 sub a2, a5, a9 +401021b7: ff7151 l32r a5, 40101f7c +401021ba: 006722 s32i a2, a7, 0 +401021bd: 002572 l32i a7, a5, 0 +401021c0: 01b277 bgeu a2, a7, 401021c5 +401021c3: 0529 s32i.n a2, a5, 0 +401021c5: 020c movi.n a2, 0 +401021c7: 0329 s32i.n a2, a3, 0 +401021c9: 0128 l32i.n a2, a1, 0 +401021cb: 208890 or a8, a8, a9 +401021ce: 2329 s32i.n a2, a3, 8 +401021d0: 1128 l32i.n a2, a1, 4 +401021d2: 1389 s32i.n a8, a3, 4 +401021d4: 3329 s32i.n a2, a3, 12 +401021d6: 202330 or a2, a3, a3 +401021d9: ffc905 call0 40101e6c +401021dc: fe3701 l32r a0, 40101ab8 +401021df: 0000c0 callx0 a0 +401021e2: aecc bnez.n a14, 401021f0 +401021e4: ffac21 l32r a2, 40102094 +401021e7: 203ff0 or a3, a15, a15 +401021ea: f7e501 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401021ed: 0000c0 callx0 a0 +401021f0: f108 l32i.n a0, a1, 60 +401021f2: 0e2d mov.n a2, a14 +401021f4: e1c8 l32i.n a12, a1, 56 +401021f6: d1d8 l32i.n a13, a1, 52 +401021f8: c1e8 l32i.n a14, a1, 48 +401021fa: b1f8 l32i.n a15, a1, 44 +401021fc: 40c112 addi a1, a1, 64 +401021ff: f00d ret.n +40102201: 000000 ill + +40102204 : +40102204: f0c112 addi a1, a1, -16 +40102207: 0161d2 s32i a13, a1, 4 +4010220a: 82d230 mull a13, a2, a3 +4010220d: 206440 or a6, a4, a4 +40102210: 203660 or a3, a6, a6 +40102213: 054d mov.n a4, a5 +40102215: 0d2d mov.n a2, a13 +40102217: 050c movi.n a5, 0 +40102219: 21c9 s32i.n a12, a1, 8 +4010221b: 3109 s32i.n a0, a1, 12 +4010221d: ffe785 call0 40102098 +40102220: 02cd mov.n a12, a2 +40102222: 828c beqz.n a2, 4010222e +40102224: 0d4d mov.n a4, a13 +40102226: 030c movi.n a3, 0 +40102228: f95101 l32r a0, 4010076c +4010222b: 0000c0 callx0 a0 +4010222e: 3108 l32i.n a0, a1, 12 +40102230: 0c2d mov.n a2, a12 +40102232: 11d8 l32i.n a13, a1, 4 +40102234: 21c8 l32i.n a12, a1, 8 +40102236: 10c112 addi a1, a1, 16 +40102239: f00d ret.n + ... + +4010223c : +4010223c: f0c112 addi a1, a1, -16 +4010223f: 045d mov.n a5, a4 +40102241: 034d mov.n a4, a3 +40102243: 023d mov.n a3, a2 +40102245: 120c movi.n a2, 1 +40102247: 3109 s32i.n a0, a1, 12 +40102249: fffb85 call0 40102204 +4010224c: 3108 l32i.n a0, a1, 12 +4010224e: 10c112 addi a1, a1, 16 +40102251: f00d ret.n +40102253: 000c00 excw +40102256: f83ff0 excw +40102259: 600002 l8ui a0, a0, 96 +4010225c: ff .byte 0xff +4010225d: ff .byte 0xff +4010225e: fffd excw + +40102260 : +40102260: fffd31 l32r a3, 40102254 +40102263: ffae22 movi a2, 0xfffffeff +40102266: 0020c0 memw +40102269: 002342 l32i a4, a3, 0 +4010226c: 102420 and a2, a4, a2 +4010226f: 0020c0 memw +40102272: 006322 s32i a2, a3, 0 +40102275: fff831 l32r a3, 40102258 +40102278: 0020c0 memw +4010227b: 0328 l32i.n a2, a3, 0 +4010227d: ff7256 bnez a2, 40102278 +40102280: f8be31 l32r a3, 40100578 +40102283: fff621 l32r a2, 4010225c +40102286: 0020c0 memw +40102289: 0348 l32i.n a4, a3, 0 +4010228b: 102420 and a2, a4, a2 +4010228e: 0020c0 memw +40102291: 0329 s32i.n a2, a3, 0 +40102293: f00d ret.n +40102295: 000000 ill +40102298: 020000 excw + ... + +4010229c : +4010229c: f8b731 l32r a3, 40100578 +4010229f: fffe21 l32r a2, 40102298 +401022a2: 0020c0 memw +401022a5: 0348 l32i.n a4, a3, 0 +401022a7: 202420 or a2, a4, a2 +401022aa: 0020c0 memw +401022ad: 0329 s32i.n a2, a3, 0 +401022af: ffe931 l32r a3, 40102254 +401022b2: 00a122 movi a2, 0x100 +401022b5: 0020c0 memw +401022b8: 0348 l32i.n a4, a3, 0 +401022ba: 202420 or a2, a4, a2 +401022bd: 0020c0 memw +401022c0: 0329 s32i.n a2, a3, 0 +401022c2: f00d ret.n +401022c4: 000240 excw +401022c7: 000060 excw +401022ca: 00 .byte 00 +401022cb: 10 .byte 0x10 + +401022cc : +401022cc: f0c112 addi a1, a1, -16 +401022cf: 3109 s32i.n a0, a1, 12 +401022d1: 21c9 s32i.n a12, a1, 8 +401022d3: fd0a01 l32r a0, 401016fc +401022d6: 0000c0 callx0 a0 +401022d9: f7fe21 l32r a2, 401002d4 +401022dc: 0228 l32i.n a2, a2, 0 +401022de: f81801 l32r a0, 40100340 +401022e1: 0000c0 callx0 a0 +401022e4: fff821 l32r a2, 401022c4 +401022e7: 030c movi.n a3, 0 +401022e9: 0020c0 memw +401022ec: 0239 s32i.n a3, a2, 0 +401022ee: fff641 l32r a4, 401022c8 +401022f1: fd3831 l32r a3, 401017d4 +401022f4: 0020c0 memw +401022f7: 0349 s32i.n a4, a3, 0 +401022f9: 0020c0 memw +401022fc: 002342 l32i a4, a3, 0 +401022ff: ff6456 bnez a4, 401022f9 +40102302: 0020c0 memw +40102305: 0022c2 l32i a12, a2, 0 +40102308: fdf8c5 call0 40100298 +4010230b: f8d221 l32r a2, 40100654 +4010230e: 032102 l32i a0, a1, 12 +40102311: 102c20 and a2, a12, a2 +40102314: 21c8 l32i.n a12, a1, 8 +40102316: 10c112 addi a1, a1, 16 +40102319: f00d ret.n +4010231b: 43c800 excw +4010231e: 00 .byte 00 +4010231f: 40 .byte 0x40 + +40102320 : +40102320: e0c112 addi a1, a1, -32 +40102323: 076102 s32i a0, a1, 28 +40102326: 0661c2 s32i a12, a1, 24 +40102329: 20c220 or a12, a2, a2 +4010232c: fff305 call0 40102260 +4010232f: f7e921 l32r a2, 401002d4 +40102332: 0c3d mov.n a3, a12 +40102334: 0228 l32i.n a2, a2, 0 +40102336: fff901 l32r a0, 4010231c +40102339: 0000c0 callx0 a0 +4010233c: 0129 s32i.n a2, a1, 0 +4010233e: fff5c5 call0 4010229c +40102341: 7108 l32i.n a0, a1, 28 +40102343: 0128 l32i.n a2, a1, 0 +40102345: 61c8 l32i.n a12, a1, 24 +40102347: 20c112 addi a1, a1, 32 +4010234a: f00d ret.n +4010234c: 09ac beqz.n a9, 40102370 +4010234e: 3c4022 s8i a2, a0, 60 +40102351: 400044 excw +40102354: 004400 break 4, 0 +40102357: 40 .byte 0x40 + +40102358 : +40102358: f0c112 addi a1, a1, -16 +4010235b: 036102 s32i a0, a1, 12 +4010235e: 0261c2 s32i a12, a1, 8 +40102361: 0161d2 s32i a13, a1, 4 +40102364: 02dd mov.n a13, a2 +40102366: fff901 l32r a0, 4010234c +40102369: 0000c0 callx0 a0 +4010236c: ffef05 call0 40102260 +4010236f: f7d9c1 l32r a12, 401002d4 +40102372: 0c28 l32i.n a2, a12, 0 +40102374: f7f301 l32r a0, 40100340 +40102377: 0000c0 callx0 a0 +4010237a: 0c28 l32i.n a2, a12, 0 +4010237c: fff501 l32r a0, 40102350 +4010237f: 0000c0 callx0 a0 +40102382: 428c beqz.n a2, 4010238a +40102384: 120c movi.n a2, 1 +40102386: 000686 j 401023a4 +40102389: 0c2800 excw +4010238c: 0d3d mov.n a3, a13 +4010238e: fff101 l32r a0, 40102354 +40102391: 0000c0 callx0 a0 +40102394: fec256 bnez a2, 40102384 +40102397: 0c28 l32i.n a2, a12, 0 +40102399: f7e901 l32r a0, 40100340 +4010239c: 0000c0 callx0 a0 +4010239f: ffefc5 call0 4010229c +401023a2: 020c movi.n a2, 0 +401023a4: 3108 l32i.n a0, a1, 12 +401023a6: 21c8 l32i.n a12, a1, 8 +401023a8: 11d8 l32i.n a13, a1, 4 +401023aa: 10c112 addi a1, a1, 16 +401023ad: f00d ret.n +401023af: 021800 excw +401023b2: 306000 xor a6, a0, a0 +401023b5: 880000 excw +401023b8: ff .byte 0xff +401023b9: bf .byte 0xbf +401023ba: 6f .byte 0x6f +401023bb: fe .byte 0xfe +401023bc: 0070c7 bbci a0, 28, 401023c0 +401023bf: 020400 excw +401023c2: 336000 excw +401023c5: 4022f6 bgeui a2, 2, 40102409 +401023c8: 000000 ill +401023cb: 022470 excw +401023ce: ff6000 excw +401023d1: ff .byte 0xff +401023d2: ff .byte 0xff +401023d3: fffff7 bbsi a15, 31, 401023d6 +401023d6: ff .byte 0xff +401023d7: df .byte 0xdf +401023d8: ff .byte 0xff +401023d9: ff .byte 0xff +401023da: ff .byte 0xff +401023db: bf .byte 0xbf +401023dc: 000220 excw +401023df: 60 .byte 0x60 + +401023e0 : +401023e0: c0c112 addi a1, a1, -64 +401023e3: f109 s32i.n a0, a1, 60 +401023e5: e1c9 s32i.n a12, a1, 56 +401023e7: d1d9 s32i.n a13, a1, 52 +401023e9: c1e9 s32i.n a14, a1, 48 +401023eb: b1f9 s32i.n a15, a1, 44 +401023ed: 4129 s32i.n a2, a1, 16 +401023ef: ffe705 call0 40102260 +401023f2: f7b8c1 l32r a12, 401002d4 +401023f5: 0c28 l32i.n a2, a12, 0 +401023f7: f7d201 l32r a0, 40100340 +401023fa: 0000c0 callx0 a0 +401023fd: f85441 l32r a4, 40100550 +40102400: f86061 l32r a6, 40100580 +40102403: f85d51 l32r a5, 40100578 +40102406: ffea21 l32r a2, 401023b0 +40102409: 0020c0 memw +4010240c: 06f8 l32i.n a15, a6, 0 +4010240e: 0020c0 memw +40102411: 02d8 l32i.n a13, a2, 0 +40102413: 0020c0 memw +40102416: 05e8 l32i.n a14, a5, 0 +40102418: 0020c0 memw +4010241b: 0428 l32i.n a2, a4, 0 +4010241d: 0020c0 memw +40102420: 0478 l32i.n a7, a4, 0 +40102422: 0129 s32i.n a2, a1, 0 +40102424: f86021 l32r a2, 401005a4 +40102427: 202720 or a2, a7, a2 +4010242a: 0020c0 memw +4010242d: 0429 s32i.n a2, a4, 0 +4010242f: 0c28 l32i.n a2, a12, 0 +40102431: 3149 s32i.n a4, a1, 12 +40102433: 2159 s32i.n a5, a1, 8 +40102435: 1169 s32i.n a6, a1, 4 +40102437: ffc601 l32r a0, 40102350 +4010243a: 0000c0 callx0 a0 +4010243d: 1168 l32i.n a6, a1, 4 +4010243f: ffae22 movi a2, 0xfffffeff +40102442: 0020c0 memw +40102445: 0678 l32i.n a7, a6, 0 +40102447: 3148 l32i.n a4, a1, 12 +40102449: 102720 and a2, a7, a2 +4010244c: 0020c0 memw +4010244f: 0629 s32i.n a2, a6, 0 +40102451: 0020c0 memw +40102454: 0468 l32i.n a6, a4, 0 +40102456: ffd721 l32r a2, 401023b4 +40102459: 2158 l32i.n a5, a1, 8 +4010245b: 202620 or a2, a6, a2 +4010245e: 0020c0 memw +40102461: 0429 s32i.n a2, a4, 0 +40102463: 0020c0 memw +40102466: 0468 l32i.n a6, a4, 0 +40102468: b27c movi.n a2, -5 +4010246a: 102620 and a2, a6, a2 +4010246d: 0020c0 memw +40102470: 0429 s32i.n a2, a4, 0 +40102472: 0020c0 memw +40102475: 0548 l32i.n a4, a5, 0 +40102477: ffd021 l32r a2, 401023b8 +4010247a: 4138 l32i.n a3, a1, 16 +4010247c: 102420 and a2, a4, a2 +4010247f: 0020c0 memw +40102482: 0529 s32i.n a2, a5, 0 +40102484: ffcb41 l32r a4, 401023b0 +40102487: ffcd21 l32r a2, 401023bc +4010248a: 0020c0 memw +4010248d: 0429 s32i.n a2, a4, 0 +4010248f: ffcc21 l32r a2, 401023c0 +40102492: 040c movi.n a4, 0 +40102494: 0020c0 memw +40102497: 0249 s32i.n a4, a2, 0 +40102499: 520c movi.n a2, 5 +4010249b: 121347 beq a3, a4, 401024b1 +4010249e: 523c movi.n a2, 53 +401024a0: 0d1326 beqi a3, 1, 401024b1 +401024a3: 521c movi.n a2, 21 +401024a5: 082326 beqi a3, 2, 401024b1 +401024a8: ffc721 l32r a2, 401023c4 +401024ab: ff1285 call0 401015d4 +401024ae: 00a022 movi a2, 0 +401024b1: ffc531 l32r a3, 401023c8 +401024b4: 202230 or a2, a2, a3 +401024b7: ffc531 l32r a3, 401023cc +401024ba: 0020c0 memw +401024bd: 0329 s32i.n a2, a3, 0 +401024bf: f82421 l32r a2, 40100550 +401024c2: ffc331 l32r a3, 401023d0 +401024c5: 0020c0 memw +401024c8: 0248 l32i.n a4, a2, 0 +401024ca: 103430 and a3, a4, a3 +401024cd: 0020c0 memw +401024d0: 0239 s32i.n a3, a2, 0 +401024d2: 0020c0 memw +401024d5: 0248 l32i.n a4, a2, 0 +401024d7: ff7c31 l32r a3, 401022c8 +401024da: 203430 or a3, a4, a3 +401024dd: 0020c0 memw +401024e0: 0239 s32i.n a3, a2, 0 +401024e2: 0020c0 memw +401024e5: 0248 l32i.n a4, a2, 0 +401024e7: ffbb31 l32r a3, 401023d4 +401024ea: 103430 and a3, a4, a3 +401024ed: 0020c0 memw +401024f0: 0239 s32i.n a3, a2, 0 +401024f2: 0020c0 memw +401024f5: 0248 l32i.n a4, a2, 0 +401024f7: ffb831 l32r a3, 401023d8 +401024fa: 103430 and a3, a4, a3 +401024fd: 0020c0 memw +40102500: 0239 s32i.n a3, a2, 0 +40102502: ffb621 l32r a2, 401023dc +40102505: 00a732 movi a3, 0x700 +40102508: 0020c0 memw +4010250b: 0239 s32i.n a3, a2, 0 +4010250d: fcb121 l32r a2, 401017d4 +40102510: f81431 l32r a3, 40100560 +40102513: 0020c0 memw +40102516: 0248 l32i.n a4, a2, 0 +40102518: 204430 or a4, a4, a3 +4010251b: 0020c0 memw +4010251e: 0249 s32i.n a4, a2, 0 +40102520: 0020c0 memw +40102523: 002242 l32i a4, a2, 0 +40102526: f68437 bany a4, a3, 40102520 +40102529: ff6621 l32r a2, 401022c4 +4010252c: 002142 l32i a4, a1, 0 +4010252f: 0020c0 memw +40102532: 002232 l32i a3, a2, 0 +40102535: f81221 l32r a2, 40100580 +40102538: 0020c0 memw +4010253b: 02f9 s32i.n a15, a2, 0 +4010253d: f80e21 l32r a2, 40100578 +40102540: 0020c0 memw +40102543: 02e9 s32i.n a14, a2, 0 +40102545: ff9a21 l32r a2, 401023b0 +40102548: 0020c0 memw +4010254b: 02d9 s32i.n a13, a2, 0 +4010254d: f80021 l32r a2, 40100550 +40102550: 0020c0 memw +40102553: 0249 s32i.n a4, a2, 0 +40102555: 0c28 l32i.n a2, a12, 0 +40102557: 4139 s32i.n a3, a1, 16 +40102559: f77901 l32r a0, 40100340 +4010255c: 0000c0 callx0 a0 +4010255f: ffd3c5 call0 4010229c +40102562: 4138 l32i.n a3, a1, 16 +40102564: f108 l32i.n a0, a1, 60 +40102566: 742030 extui a2, a3, 0, 8 +40102569: e1c8 l32i.n a12, a1, 56 +4010256b: d1d8 l32i.n a13, a1, 52 +4010256d: c1e8 l32i.n a14, a1, 48 +4010256f: b1f8 l32i.n a15, a1, 44 +40102571: 40c112 addi a1, a1, 64 +40102574: f00d ret.n +40102576: 430000 excw +40102579: 000030 excw +4010257c: f60c movi.n a6, 15 +4010257e: 004022 s8i a2, a0, 0 +40102581: 080000 excw +40102584: 0e0000 excw + ... + +40102588 : +40102588: c0c112 addi a1, a1, -64 +4010258b: f109 s32i.n a0, a1, 60 +4010258d: e1c9 s32i.n a12, a1, 56 +4010258f: d1d9 s32i.n a13, a1, 52 +40102591: c1e9 s32i.n a14, a1, 48 +40102593: b1f9 s32i.n a15, a1, 44 +40102595: 5129 s32i.n a2, a1, 20 +40102597: 74f030 extui a15, a3, 0, 8 +4010259a: ffcc45 call0 40102260 +4010259d: f74dc1 l32r a12, 401002d4 +401025a0: 0c28 l32i.n a2, a12, 0 +401025a2: f76701 l32r a0, 40100340 +401025a5: 0000c0 callx0 a0 +401025a8: f7f661 l32r a6, 40100580 +401025ab: ff8121 l32r a2, 401023b0 +401025ae: 0020c0 memw +401025b1: 06e8 l32i.n a14, a6, 0 +401025b3: f7e731 l32r a3, 40100550 +401025b6: 0020c0 memw +401025b9: 0228 l32i.n a2, a2, 0 +401025bb: f7ef51 l32r a5, 40100578 +401025be: 0129 s32i.n a2, a1, 0 +401025c0: 0020c0 memw +401025c3: 05d8 l32i.n a13, a5, 0 +401025c5: 0020c0 memw +401025c8: 0328 l32i.n a2, a3, 0 +401025ca: 0020c0 memw +401025cd: 0378 l32i.n a7, a3, 0 +401025cf: 1129 s32i.n a2, a1, 4 +401025d1: f7f421 l32r a2, 401005a4 +401025d4: 202720 or a2, a7, a2 +401025d7: 0020c0 memw +401025da: 0329 s32i.n a2, a3, 0 +401025dc: 0c28 l32i.n a2, a12, 0 +401025de: 4139 s32i.n a3, a1, 16 +401025e0: 3159 s32i.n a5, a1, 12 +401025e2: 2169 s32i.n a6, a1, 8 +401025e4: ff5b01 l32r a0, 40102350 +401025e7: 0000c0 callx0 a0 +401025ea: 2168 l32i.n a6, a1, 8 +401025ec: ffae22 movi a2, 0xfffffeff +401025ef: 0020c0 memw +401025f2: 0678 l32i.n a7, a6, 0 +401025f4: 4138 l32i.n a3, a1, 16 +401025f6: 102720 and a2, a7, a2 +401025f9: 0020c0 memw +401025fc: 0629 s32i.n a2, a6, 0 +401025fe: 0020c0 memw +40102601: 0368 l32i.n a6, a3, 0 +40102603: ff6c21 l32r a2, 401023b4 +40102606: 3158 l32i.n a5, a1, 12 +40102608: 202620 or a2, a6, a2 +4010260b: 0020c0 memw +4010260e: 0329 s32i.n a2, a3, 0 +40102610: 0020c0 memw +40102613: 0368 l32i.n a6, a3, 0 +40102615: b27c movi.n a2, -5 +40102617: 102620 and a2, a6, a2 +4010261a: 0020c0 memw +4010261d: 0329 s32i.n a2, a3, 0 +4010261f: 0020c0 memw +40102622: 0538 l32i.n a3, a5, 0 +40102624: ff6521 l32r a2, 401023b8 +40102627: 5148 l32i.n a4, a1, 20 +40102629: 102320 and a2, a3, a2 +4010262c: 0020c0 memw +4010262f: 0529 s32i.n a2, a5, 0 +40102631: ff5f31 l32r a3, 401023b0 +40102634: ffd121 l32r a2, 40102578 +40102637: 0020c0 memw +4010263a: 0329 s32i.n a2, a3, 0 +4010263c: ff6121 l32r a2, 401023c0 +4010263f: 030c movi.n a3, 0 +40102641: 0020c0 memw +40102644: 0239 s32i.n a3, a2, 0 +40102646: 120c movi.n a2, 1 +40102648: 121437 beq a4, a3, 4010265e +4010264b: 123c movi.n a2, 49 +4010264d: 0d1426 beqi a4, 1, 4010265e +40102650: 11a022 movi a2, 17 +40102653: 072426 beqi a4, 2, 4010265e +40102656: ffc921 l32r a2, 4010257c +40102659: fef785 call0 401015d4 +4010265c: 020c movi.n a2, 0 +4010265e: ff5a31 l32r a3, 401023c8 +40102661: 202230 or a2, a2, a3 +40102664: ff5a31 l32r a3, 401023cc +40102667: 0020c0 memw +4010266a: 0329 s32i.n a2, a3, 0 +4010266c: f7b921 l32r a2, 40100550 +4010266f: ffc431 l32r a3, 40102580 +40102672: 0020c0 memw +40102675: 0248 l32i.n a4, a2, 0 +40102677: 203430 or a3, a4, a3 +4010267a: 0020c0 memw +4010267d: 0239 s32i.n a3, a2, 0 +4010267f: 0020c0 memw +40102682: 0248 l32i.n a4, a2, 0 +40102684: f7c631 l32r a3, 4010059c +40102687: 103430 and a3, a4, a3 +4010268a: 0020c0 memw +4010268d: 0239 s32i.n a3, a2, 0 +4010268f: 0020c0 memw +40102692: 0248 l32i.n a4, a2, 0 +40102694: ff5031 l32r a3, 401023d4 +40102697: 103430 and a3, a4, a3 +4010269a: 0020c0 memw +4010269d: 0239 s32i.n a3, a2, 0 +4010269f: 0020c0 memw +401026a2: 0248 l32i.n a4, a2, 0 +401026a4: ff4d31 l32r a3, 401023d8 +401026a7: 103430 and a3, a4, a3 +401026aa: 0020c0 memw +401026ad: 0239 s32i.n a3, a2, 0 +401026af: ffb531 l32r a3, 40102584 +401026b2: ff4a21 l32r a2, 401023dc +401026b5: 0020c0 memw +401026b8: 0239 s32i.n a3, a2, 0 +401026ba: ff0221 l32r a2, 401022c4 +401026bd: f7a831 l32r a3, 40100560 +401026c0: 0020c0 memw +401026c3: 02f9 s32i.n a15, a2, 0 +401026c5: fc4321 l32r a2, 401017d4 +401026c8: 0020c0 memw +401026cb: 0248 l32i.n a4, a2, 0 +401026cd: 204430 or a4, a4, a3 +401026d0: 0020c0 memw +401026d3: 0249 s32i.n a4, a2, 0 +401026d5: 0020c0 memw +401026d8: 002242 l32i a4, a2, 0 +401026db: f68437 bany a4, a3, 401026d5 +401026de: f7a821 l32r a2, 40100580 +401026e1: 002132 l32i a3, a1, 0 +401026e4: 0020c0 memw +401026e7: 0062e2 s32i a14, a2, 0 +401026ea: f7a321 l32r a2, 40100578 +401026ed: 0020c0 memw +401026f0: 02d9 s32i.n a13, a2, 0 +401026f2: ff2f21 l32r a2, 401023b0 +401026f5: 0020c0 memw +401026f8: 0239 s32i.n a3, a2, 0 +401026fa: 1138 l32i.n a3, a1, 4 +401026fc: f79521 l32r a2, 40100550 +401026ff: 0020c0 memw +40102702: 0239 s32i.n a3, a2, 0 +40102704: 0c28 l32i.n a2, a12, 0 +40102706: f70e01 l32r a0, 40100340 +40102709: 0000c0 callx0 a0 +4010270c: ffb8c5 call0 4010229c +4010270f: f108 l32i.n a0, a1, 60 +40102711: e1c8 l32i.n a12, a1, 56 +40102713: d1d8 l32i.n a13, a1, 52 +40102715: c1e8 l32i.n a14, a1, 48 +40102717: b1f8 l32i.n a15, a1, 44 +40102719: 40c112 addi a1, a1, 64 +4010271c: f00d ret.n +4010271e: 380000 excw +40102721: bf .byte 0xbf +40102722: ffe9 s32i.n a14, a15, 60 +40102724: 407c movi.n a0, -12 +40102726: 830000 moveqz a0, a0, a0 +40102729: bf .byte 0xbf + ... + +4010272c : +4010272c: e0c112 addi a1, a1, -32 +4010272f: 7109 s32i.n a0, a1, 28 +40102731: ffb985 call0 401022cc +40102734: 030c movi.n a3, 0 +40102736: 745020 extui a5, a2, 0, 8 +40102739: 63af42 movi a4, -157 +4010273c: 0139 s32i.n a3, a1, 0 +4010273e: 454a add.n a4, a5, a4 +40102740: 061437 beq a4, a3, 4010274a +40102743: 3eaf32 movi a3, -194 +40102746: 353a add.n a3, a5, a3 +40102748: 93dc bnez.n a3, 40102765 +4010274a: 202110 or a2, a1, a1 +4010274d: ffbd05 call0 40102320 +40102750: 062256 bnez a2, 401027b6 +40102753: 002122 l32i a2, a1, 0 +40102756: 3ca032 movi a3, 60 +40102759: 590237 bnone a2, a3, 401027b6 +4010275c: c3a032 movi a3, 195 +4010275f: 000886 j 40102785 +40102762: 000000 ill +40102765: ffee31 l32r a3, 40102720 +40102768: 802230 add a2, a2, a3 +4010276b: febc31 l32r a3, 4010225c +4010276e: 1e8237 bany a2, a3, 40102790 +40102771: 202110 or a2, a1, a1 +40102774: ffba85 call0 40102320 +40102777: 03b256 bnez a2, 401027b6 +4010277a: 0128 l32i.n a2, a1, 0 +4010277c: 7ca032 movi a3, 124 +4010277f: 330237 bnone a2, a3, 401027b6 +40102782: 83a032 movi a3, 131 +40102785: 103230 and a3, a2, a3 +40102788: 020c movi.n a2, 0 +4010278a: ffdfc5 call0 40102588 +4010278d: 000946 j 401027b6 +40102790: 202110 or a2, a1, a1 +40102793: ffb8c5 call0 40102320 +40102796: c2dc bnez.n a2, 401027b6 +40102798: 120c movi.n a2, 1 +4010279a: ffc445 call0 401023e0 +4010279d: 0138 l32i.n a3, a1, 0 +4010279f: 112280 slli a2, a2, 8 +401027a2: 202230 or a2, a2, a3 +401027a5: ffdf31 l32r a3, 40102724 +401027a8: 0a0237 bnone a2, a3, 401027b6 +401027ab: ffdf31 l32r a3, 40102728 +401027ae: 102230 and a2, a2, a3 +401027b1: 0129 s32i.n a2, a1, 0 +401027b3: ffba45 call0 40102358 +401027b6: 7108 l32i.n a0, a1, 28 +401027b8: 20c112 addi a1, a1, 32 +401027bb: f00d ret.n +401027bd: 000000 ill +401027c0: fe8cf4 excw +401027c3: 3f .byte 0x3f +401027c4: 07ac beqz.n a7, 401027e8 +401027c6: 21 .byte 0x21 +401027c7: 40 .byte 0x40 + +401027c8 : +401027c8: f0c112 addi a1, a1, -16 +401027cb: 0261c2 s32i a12, a1, 8 +401027ce: f4c020 extui a12, a2, 0, 16 +401027d1: fffb21 l32r a2, 401027c0 +401027d4: 3109 s32i.n a0, a1, 12 +401027d6: 000222 l8ui a2, a2, 0 +401027d9: 1f1226 beqi a2, 1, 401027fc +401027dc: fff4c5 call0 4010272c +401027df: fedb01 l32r a0, 4010234c +401027e2: 0000c0 callx0 a0 +401027e5: ffa785 call0 40102260 +401027e8: 202cc0 or a2, a12, a12 +401027eb: f7ca01 l32r a0, 40100714 +401027ee: 0000c0 callx0 a0 +401027f1: 02cd mov.n a12, a2 +401027f3: ffaa85 call0 4010229c +401027f6: 0c2d mov.n a2, a12 +401027f8: 000346 j 40102809 +401027fb: 0c2d00 excw +401027fe: fff101 l32r a0, 401027c4 +40102801: 0000c0 callx0 a0 +40102804: fd4256 bnez a2, 401027dc +40102807: 120c movi.n a2, 1 +40102809: 3108 l32i.n a0, a1, 12 +4010280b: 21c8 l32i.n a12, a1, 8 +4010280d: 10c112 addi a1, a1, 16 +40102810: f00d ret.n +40102812: c00000 sub a0, a0, a0 +40102815: 400044 excw + +40102818 : +40102818: f0c112 addi a1, a1, -16 +4010281b: 3109 s32i.n a0, a1, 12 +4010281d: 21c9 s32i.n a12, a1, 8 +4010281f: 11d9 s32i.n a13, a1, 4 +40102821: ffa3c5 call0 40102260 +40102824: f6acc1 l32r a12, 401002d4 +40102827: 0c28 l32i.n a2, a12, 0 +40102829: fffa01 l32r a0, 40102814 +4010282c: 0000c0 callx0 a0 +4010282f: 20d220 or a13, a2, a2 +40102832: 002c22 l32i a2, a12, 0 +40102835: f6c201 l32r a0, 40100340 +40102838: 0000c0 callx0 a0 +4010283b: ffa605 call0 4010229c +4010283e: 3108 l32i.n a0, a1, 12 +40102840: 0d2d mov.n a2, a13 +40102842: 21c8 l32i.n a12, a1, 8 +40102844: 11d8 l32i.n a13, a1, 4 +40102846: 10c112 addi a1, a1, 16 +40102849: f00d ret.n + ... + +4010284c : +4010284c: f0c112 addi a1, a1, -16 +4010284f: 21c9 s32i.n a12, a1, 8 +40102851: 11d9 s32i.n a13, a1, 4 +40102853: 01e9 s32i.n a14, a1, 0 +40102855: 3109 s32i.n a0, a1, 12 +40102857: 02dd mov.n a13, a2 +40102859: 03ed mov.n a14, a3 +4010285b: 04cd mov.n a12, a4 +4010285d: 120c movi.n a2, 1 +4010285f: d3ac beqz.n a3, 40102890 +40102861: ffec85 call0 4010272c +40102864: 1420c0 extui a2, a12, 0, 2 +40102867: 628c beqz.n a2, 40102871 +40102869: 41c2c0 srli a12, a12, 2 +4010286c: cc1b addi.n a12, a12, 1 +4010286e: 11cce0 slli a12, a12, 2 +40102871: feb601 l32r a0, 4010234c +40102874: 0000c0 callx0 a0 +40102877: ff9e85 call0 40102260 +4010287a: 204cc0 or a4, a12, a12 +4010287d: 203ee0 or a3, a14, a14 +40102880: 202dd0 or a2, a13, a13 +40102883: f7a501 l32r a0, 40100718 +40102886: 0000c0 callx0 a0 +40102889: 02cd mov.n a12, a2 +4010288b: ffa105 call0 4010229c +4010288e: 0c2d mov.n a2, a12 +40102890: 3108 l32i.n a0, a1, 12 +40102892: 21c8 l32i.n a12, a1, 8 +40102894: 11d8 l32i.n a13, a1, 4 +40102896: 01e8 l32i.n a14, a1, 0 +40102898: 10c112 addi a1, a1, 16 +4010289b: f00d ret.n +4010289d: 000000 ill +401028a0: fedd74 excw +401028a3: 3f .byte 0x3f + +401028a4 : +401028a4: e0c112 addi a1, a1, -32 +401028a7: 0661c2 s32i a12, a1, 24 +401028aa: 076102 s32i a0, a1, 28 +401028ad: 02cd mov.n a12, a2 +401028af: 120c movi.n a2, 1 +401028b1: 13bc beqz.n a3, 401028e6 +401028b3: fffb21 l32r a2, 401028a0 +401028b6: 0268 l32i.n a6, a2, 0 +401028b8: c6dc bnez.n a6, 401028d8 +401028ba: 0139 s32i.n a3, a1, 0 +401028bc: 1149 s32i.n a4, a1, 4 +401028be: ff9a05 call0 40102260 +401028c1: 1148 l32i.n a4, a1, 4 +401028c3: 0138 l32i.n a3, a1, 0 +401028c5: 0c2d mov.n a2, a12 +401028c7: f62d01 l32r a0, 4010017c <_UserExceptionVector_1+0x20> +401028ca: 0000c0 callx0 a0 +401028cd: 02cd mov.n a12, a2 +401028cf: ff9cc5 call0 4010229c +401028d2: 0c2d mov.n a2, a12 +401028d4: 000386 j 401028e6 +401028d7: 7f2100 excw +401028da: 045df6 bgeui a13, 5, 401028e2 +401028dd: 0228 l32i.n a2, a2, 0 +401028df: 034d mov.n a4, a3 +401028e1: 0c3d mov.n a3, a12 +401028e3: 0006c0 callx0 a6 +401028e6: 7108 l32i.n a0, a1, 28 +401028e8: 61c8 l32i.n a12, a1, 24 +401028ea: 20c112 addi a1, a1, 32 +401028ed: f00d ret.n +401028ef: f5f500 extui a15, a0, 21, 16 +401028f2: 014022 s8i a2, a0, 1 +401028f5: 700000 excw +401028f8: 22f5e7 bbsi a5, 30, 4010291e +401028fb: f5d740 extui a13, a4, 23, 16 +401028fe: bc4022 s8i a2, a0, 188 +40102901: 4022f5 excw + +40102904 : +40102904: c0c112 addi a1, a1, -64 +40102907: 00a022 movi a2, 0 +4010290a: 006122 s32i a2, a1, 0 +4010290d: 202110 or a2, a1, a1 +40102910: f109 s32i.n a0, a1, 60 +40102912: e1c9 s32i.n a12, a1, 56 +40102914: d1d9 s32i.n a13, a1, 52 +40102916: c1e9 s32i.n a14, a1, 48 +40102918: b1f9 s32i.n a15, a1, 44 +4010291a: ffa045 call0 40102320 +4010291d: b2cc bnez.n a2, 4010292c +4010291f: 0128 l32i.n a2, a1, 0 +40102921: 076267 bbci a2, 6, 4010292c +40102924: fff321 l32r a2, 401028f0 +40102927: 005486 j 40102a7d +4010292a: 050000 extui a0, a0, 16, 1 +4010292d: e1ff93 excw +40102930: f669 s32i.n a6, a6, 60 +40102932: 002e22 l32i a2, a14, 0 +40102935: f68201 l32r a0, 40100340 +40102938: 0000c0 callx0 a0 +4010293b: f70f31 l32r a3, 40100578 +4010293e: f710d1 l32r a13, 40100580 +40102941: fe9b21 l32r a2, 401023b0 +40102944: f703c1 l32r a12, 40100550 +40102947: 0020c0 memw +4010294a: 002d72 l32i a7, a13, 0 +4010294d: 0020c0 memw +40102950: 002252 l32i a5, a2, 0 +40102953: 0020c0 memw +40102956: 0368 l32i.n a6, a3, 0 +40102958: 0e28 l32i.n a2, a14, 0 +4010295a: 0020c0 memw +4010295d: 0cf8 l32i.n a15, a12, 0 +4010295f: 7139 s32i.n a3, a1, 28 +40102961: 5159 s32i.n a5, a1, 20 +40102963: 6169 s32i.n a6, a1, 24 +40102965: 4179 s32i.n a7, a1, 16 +40102967: fe7a01 l32r a0, 40102350 +4010296a: 0000c0 callx0 a0 +4010296d: 0020c0 memw +40102970: 0d88 l32i.n a8, a13, 0 +40102972: ffae22 movi a2, 0xfffffeff +40102975: 102820 and a2, a8, a2 +40102978: 0020c0 memw +4010297b: 0d29 s32i.n a2, a13, 0 +4010297d: 0020c0 memw +40102980: 0c88 l32i.n a8, a12, 0 +40102982: fe8c21 l32r a2, 401023b4 +40102985: 7138 l32i.n a3, a1, 28 +40102987: 202820 or a2, a8, a2 +4010298a: 0020c0 memw +4010298d: 0c29 s32i.n a2, a12, 0 +4010298f: 0020c0 memw +40102992: 0c88 l32i.n a8, a12, 0 +40102994: b27c movi.n a2, -5 +40102996: 102820 and a2, a8, a2 +40102999: 0020c0 memw +4010299c: 0c29 s32i.n a2, a12, 0 +4010299e: 0020c0 memw +401029a1: 0388 l32i.n a8, a3, 0 +401029a3: fe8521 l32r a2, 401023b8 +401029a6: 102820 and a2, a8, a2 +401029a9: 0020c0 memw +401029ac: 0329 s32i.n a2, a3, 0 +401029ae: fef221 l32r a2, 40102578 +401029b1: fe7f31 l32r a3, 401023b0 +401029b4: 0020c0 memw +401029b7: 0329 s32i.n a2, a3, 0 +401029b9: fe8121 l32r a2, 401023c0 +401029bc: 030c movi.n a3, 0 +401029be: 0020c0 memw +401029c1: 0239 s32i.n a3, a2, 0 +401029c3: ffcc31 l32r a3, 401028f4 +401029c6: fe8121 l32r a2, 401023cc +401029c9: 0020c0 memw +401029cc: 0239 s32i.n a3, a2, 0 +401029ce: 0020c0 memw +401029d1: 0c38 l32i.n a3, a12, 0 +401029d3: feeb21 l32r a2, 40102580 +401029d6: 202320 or a2, a3, a2 +401029d9: 0020c0 memw +401029dc: 0c29 s32i.n a2, a12, 0 +401029de: 0020c0 memw +401029e1: 0c38 l32i.n a3, a12, 0 +401029e3: f6ee21 l32r a2, 4010059c +401029e6: 102320 and a2, a3, a2 +401029e9: 0020c0 memw +401029ec: 0c29 s32i.n a2, a12, 0 +401029ee: 0020c0 memw +401029f1: 0c38 l32i.n a3, a12, 0 +401029f3: fe7821 l32r a2, 401023d4 +401029f6: 102320 and a2, a3, a2 +401029f9: 0020c0 memw +401029fc: 0c29 s32i.n a2, a12, 0 +401029fe: 0020c0 memw +40102a01: 0c38 l32i.n a3, a12, 0 +40102a03: fe7521 l32r a2, 401023d8 +40102a06: 102320 and a2, a3, a2 +40102a09: 0020c0 memw +40102a0c: 0c29 s32i.n a2, a12, 0 +40102a0e: fedd31 l32r a3, 40102584 +40102a11: fe7221 l32r a2, 401023dc +40102a14: 4178 l32i.n a7, a1, 16 +40102a16: 0020c0 memw +40102a19: 0239 s32i.n a3, a2, 0 +40102a1b: fe2a21 l32r a2, 401022c4 +40102a1e: 034c movi.n a3, 64 +40102a20: 0020c0 memw +40102a23: 0239 s32i.n a3, a2, 0 +40102a25: fb6b21 l32r a2, 401017d4 +40102a28: f6ce31 l32r a3, 40100560 +40102a2b: 0020c0 memw +40102a2e: 0288 l32i.n a8, a2, 0 +40102a30: 6168 l32i.n a6, a1, 24 +40102a32: 208830 or a8, a8, a3 +40102a35: 5158 l32i.n a5, a1, 20 +40102a37: 0020c0 memw +40102a3a: 0289 s32i.n a8, a2, 0 +40102a3c: 0020c0 memw +40102a3f: 002282 l32i a8, a2, 0 +40102a42: f68837 bany a8, a3, 40102a3c +40102a45: f6cc21 l32r a2, 40100578 +40102a48: 0020c0 memw +40102a4b: 0d79 s32i.n a7, a13, 0 +40102a4d: 0020c0 memw +40102a50: 0269 s32i.n a6, a2, 0 +40102a52: fe5721 l32r a2, 401023b0 +40102a55: 0020c0 memw +40102a58: 0259 s32i.n a5, a2, 0 +40102a5a: f6bd21 l32r a2, 40100550 +40102a5d: 0020c0 memw +40102a60: 02f9 s32i.n a15, a2, 0 +40102a62: 0e28 l32i.n a2, a14, 0 +40102a64: f63701 l32r a0, 40100340 +40102a67: 0000c0 callx0 a0 +40102a6a: ff8305 call0 4010229c +40102a6d: 202110 or a2, a1, a1 +40102a70: ff8ac5 call0 40102320 +40102a73: 42dc bnez.n a2, 40102a8b +40102a75: 0128 l32i.n a2, a1, 0 +40102a77: 0a6267 bbci a2, 6, 40102a85 +40102a7a: ff9f21 l32r a2, 401028f8 +40102a7d: feb545 call0 401015d4 +40102a80: 120c movi.n a2, 1 +40102a82: 000386 j 40102a94 +40102a85: ff9d21 l32r a2, 401028fc +40102a88: 000086 j 40102a8e +40102a8b: ff9d21 l32r a2, 40102900 +40102a8e: feb445 call0 401015d4 +40102a91: 00a022 movi a2, 0 +40102a94: 0f2102 l32i a0, a1, 60 +40102a97: 0e21c2 l32i a12, a1, 56 +40102a9a: d1d8 l32i.n a13, a1, 52 +40102a9c: c1e8 l32i.n a14, a1, 48 +40102a9e: b1f8 l32i.n a15, a1, 44 +40102aa0: 40c112 addi a1, a1, 64 +40102aa3: f00d ret.n +40102aa5: 000000 ill +40102aa8: 22f5a2 excw +40102aab: f59440 extui a9, a4, 20, 16 +40102aae: 774022 s8i a2, a0, 119 +40102ab1: 4022f5 excw +40102ab4: f558 l32i.n a5, a5, 60 +40102ab6: 22 .byte 0x22 +40102ab7: 40 .byte 0x40 + +40102ab8 : +40102ab8: f0c112 addi a1, a1, -16 +40102abb: 120c movi.n a2, 1 +40102abd: 3109 s32i.n a0, a1, 12 +40102abf: 21c9 s32i.n a12, a1, 8 +40102ac1: ff91c5 call0 401023e0 +40102ac4: 056217 bbci a2, 1, 40102acd +40102ac7: fff821 l32r a2, 40102aa8 +40102aca: 000806 j 40102aee +40102acd: 023d mov.n a3, a2 +40102acf: fff721 l32r a2, 40102aac +40102ad2: 2c0c movi.n a12, 2 +40102ad4: feafc5 call0 401015d4 +40102ad7: 230c movi.n a3, 2 +40102ad9: 120c movi.n a2, 1 +40102adb: ffaac5 call0 40102588 +40102ade: 120c movi.n a2, 1 +40102ae0: ff8fc5 call0 401023e0 +40102ae3: 1022c0 and a2, a2, a12 +40102ae6: 74c020 extui a12, a2, 0, 8 +40102ae9: bc8c beqz.n a12, 40102af8 +40102aeb: fff121 l32r a2, 40102ab0 +40102aee: feae45 call0 401015d4 +40102af1: 1c0c movi.n a12, 1 +40102af3: 0001c6 j 40102afe +40102af6: 210000 srai a0, a0, 0 +40102af9: ef .byte 0xef +40102afa: ff .byte 0xff +40102afb: fead85 call0 401015d4 +40102afe: 032102 l32i a0, a1, 12 +40102b01: 202cc0 or a2, a12, a12 +40102b04: 0221c2 l32i a12, a1, 8 +40102b07: 10c112 addi a1, a1, 16 +40102b0a: f00d ret.n +40102b0c: ff .byte 0xff +40102b0d: 9f .byte 0x9f +40102b0e: 6f .byte 0x6f +40102b0f: fe .byte 0xfe +40102b10: 002000 isync +40102b13: 01 .byte 0x1 + +40102b14 : +40102b14: f0c112 addi a1, a1, -16 +40102b17: 3109 s32i.n a0, a1, 12 +40102b19: ff7b05 call0 401022cc +40102b1c: 745020 extui a5, a2, 0, 8 +40102b1f: 63af42 movi a4, -157 +40102b22: 454a add.n a4, a5, a4 +40102b24: 548c beqz.n a4, 40102b2d +40102b26: 3eaf32 movi a3, -194 +40102b29: 353a add.n a3, a5, a3 +40102b2b: 63cc bnez.n a3, 40102b35 +40102b2d: ffdd45 call0 40102904 +40102b30: 000546 j 40102b49 +40102b33: 310000 srai a0, a0, 16 +40102b36: 30f6c7 bbsi a6, 28, 40102b6a +40102b39: 311022 l16ui a2, a0, 98 +40102b3c: fef9 s32i.n a15, a14, 60 +40102b3e: 223a add.n a2, a2, a3 +40102b40: fdc731 l32r a3, 4010225c +40102b43: 098237 bany a2, a3, 40102b50 +40102b46: fff705 call0 40102ab8 +40102b49: 091226 beqi a2, 1, 40102b56 +40102b4c: 000b06 j 40102b7c +40102b4f: cc4500 excw +40102b52: ff .byte 0xff +40102b53: 025256 bnez a2, 40102b7c +40102b56: f68821 l32r a2, 40100578 +40102b59: ffec31 l32r a3, 40102b0c +40102b5c: 0020c0 memw +40102b5f: 002242 l32i a4, a2, 0 +40102b62: 103430 and a3, a4, a3 +40102b65: 0020c0 memw +40102b68: 006232 s32i a3, a2, 0 +40102b6b: 0020c0 memw +40102b6e: 002242 l32i a4, a2, 0 +40102b71: ffe731 l32r a3, 40102b10 +40102b74: 203430 or a3, a4, a3 +40102b77: 0020c0 memw +40102b7a: 0239 s32i.n a3, a2, 0 +40102b7c: 3108 l32i.n a0, a1, 12 +40102b7e: 10c112 addi a1, a1, 16 +40102b81: f00d ret.n +40102b83: 8d9c00 excw +40102b86: fe .byte 0xfe +40102b87: 3f .byte 0x3f + +40102b88 : + LCD->reset_SIG(LCD_RS); + LCD->reset_SIG(LCD_E); +} + +void lcd_write_4bit_data(uint8_t data) +{ +40102b88: f0c112 addi a1, a1, -16 +40102b8b: 21c9 s32i.n a12, a1, 8 + LCD->set_SIG(LCD_E); +40102b8d: fffdc1 l32r a12, 40102b84 +{ +40102b90: 11d9 s32i.n a13, a1, 4 +40102b92: 02dd mov.n a13, a2 + LCD->set_SIG(LCD_E); +40102b94: 0c28 l32i.n a2, a12, 0 +{ +40102b96: 3109 s32i.n a0, a1, 12 + LCD->set_SIG(LCD_E); +40102b98: 5238 l32i.n a3, a2, 20 +40102b9a: 02a022 movi a2, 2 +40102b9d: 0003c0 callx0 a3 + data &= 0x0F; + LCD->write_data(data); +40102ba0: 0c28 l32i.n a2, a12, 0 +40102ba2: 3238 l32i.n a3, a2, 12 +40102ba4: 0d2d mov.n a2, a13 +40102ba6: 0003c0 callx0 a3 + LCD->reset_SIG(LCD_E); +40102ba9: 0c28 l32i.n a2, a12, 0 +40102bab: 6238 l32i.n a3, a2, 24 +40102bad: 220c movi.n a2, 2 +40102baf: 0003c0 callx0 a3 +} +40102bb2: 3108 l32i.n a0, a1, 12 +40102bb4: 21c8 l32i.n a12, a1, 8 +40102bb6: 11d8 l32i.n a13, a1, 4 +40102bb8: 10c112 addi a1, a1, 16 +40102bbb: f00d ret.n +40102bbd: 000000 ill + +40102bc0 : + LCD->set_SIG(LCD_RS); + lcd_write_byte(data); +} + +void lcd_write_byte(uint8_t byte) +{ +40102bc0: f0c112 addi a1, a1, -16 +40102bc3: 21c9 s32i.n a12, a1, 8 +40102bc5: 02cd mov.n a12, a2 +#if USE_RW_PIN == ON + LCD->reset_SIG(LCD_RW); +#endif + lcd_write_4bit_data((byte) >> 4); +40102bc7: 412420 srli a2, a2, 4 +{ +40102bca: 3109 s32i.n a0, a1, 12 + lcd_write_4bit_data((byte) >> 4); +40102bcc: fffb85 call0 40102b88 + lcd_write_4bit_data((byte) & 0x0F); +40102bcf: 3420c0 extui a2, a12, 0, 4 +40102bd2: fffb45 call0 40102b88 + } + LCD->reset_SIG(LCD_RW); + LCD->set_data_pins_as_outputs(); + +#else + LCD->delay_us(120); +40102bd5: ffeb21 l32r a2, 40102b84 +40102bd8: 0228 l32i.n a2, a2, 0 +40102bda: 7238 l32i.n a3, a2, 28 +40102bdc: 78a022 movi a2, 120 +40102bdf: 0003c0 callx0 a3 +#endif +} +40102be2: 3108 l32i.n a0, a1, 12 +40102be4: 21c8 l32i.n a12, a1, 8 +40102be6: 10c112 addi a1, a1, 16 +40102be9: f00d ret.n + ... + +40102bec : +{ +40102bec: f0c112 addi a1, a1, -16 +40102bef: 0261c2 s32i a12, a1, 8 +40102bf2: 20c220 or a12, a2, a2 + LCD->reset_SIG(LCD_RS); +40102bf5: ffe321 l32r a2, 40102b84 +{ +40102bf8: 036102 s32i a0, a1, 12 + LCD->reset_SIG(LCD_RS); +40102bfb: 0228 l32i.n a2, a2, 0 +40102bfd: 6238 l32i.n a3, a2, 24 +40102bff: 020c movi.n a2, 0 +40102c01: 0003c0 callx0 a3 + lcd_write_byte(cmd); +40102c04: 0c2d mov.n a2, a12 +40102c06: fffb85 call0 40102bc0 +} +40102c09: 3108 l32i.n a0, a1, 12 +40102c0b: 21c8 l32i.n a12, a1, 8 +40102c0d: 10c112 addi a1, a1, 16 +40102c10: f00d ret.n + ... + +40102c14 : +{ +40102c14: f0c112 addi a1, a1, -16 +40102c17: 0261c2 s32i a12, a1, 8 +40102c1a: 20c220 or a12, a2, a2 + LCD->set_SIG(LCD_RS); +40102c1d: ffd921 l32r a2, 40102b84 +{ +40102c20: 036102 s32i a0, a1, 12 + LCD->set_SIG(LCD_RS); +40102c23: 0228 l32i.n a2, a2, 0 +40102c25: 5238 l32i.n a3, a2, 20 +40102c27: 020c movi.n a2, 0 +40102c29: 0003c0 callx0 a3 + lcd_write_byte(data); +40102c2c: 0c2d mov.n a2, a12 +40102c2e: fff905 call0 40102bc0 +} +40102c31: 3108 l32i.n a0, a1, 12 +40102c33: 21c8 l32i.n a12, a1, 8 +40102c35: 10c112 addi a1, a1, 16 +40102c38: f00d ret.n +40102c3a: a00000 addx4 a0, a0, a0 +40102c3d: fe8d excw +40102c3f: 3f .byte 0x3f +40102c40: fe8de3 excw +40102c43: 3f .byte 0x3f +40102c44: fe8dc4 excw +40102c47: 3f .byte 0x3f + +40102c48 : +#endif + +#if LCD_BUFFERING==ON +static void check_lcd_buf_possition_ptr_overflow(void) +{ + if(++lcd_buf_position_ptr>&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]) +40102c48: fffd31 l32r a3, 40102c3c +40102c4b: fffd41 l32r a4, 40102c40 +40102c4e: 0328 l32i.n a2, a3, 0 +40102c50: 221b addi.n a2, a2, 1 +40102c52: 033427 bltu a4, a2, 40102c59 + { + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; +40102c55: 0329 s32i.n a2, a3, 0 + } +} +40102c57: f00d ret.n + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; +40102c59: fffa21 l32r a2, 40102c44 +40102c5c: fffd46 j 40102c55 +40102c5f: 8da400 excw +40102c62: fe .byte 0xfe +40102c63: 3f .byte 0x3f + +40102c64 : +{ + for(uint8_t y=0;y +40102c67: fff731 l32r a3, 40102c44 +{ +40102c6a: 00a022 movi a2, 0 + prev_lcd_buffer[y][x]=lcd_buffer[y][x]; +40102c6d: 623a add.n a6, a2, a3 +40102c6f: 000662 l8ui a6, a6, 0 +40102c72: 524a add.n a5, a2, a4 +40102c74: 004562 s8i a6, a5, 0 + for(uint8_t x=0;x + prev_lcd_buffer[y][x]=lcd_buffer[y][x]; +40102c7c: 632a add.n a6, a3, a2 +40102c7e: 000662 l8ui a6, a6, 0 +40102c81: 542a add.n a5, a4, a2 +40102c83: 004562 s8i a6, a5, 0 + for(uint8_t x=0;x + } + } +} +40102c8b: f00d ret.n +40102c8d: 000000 ill + +40102c90 : +} + +void lcd_enable_backlight(void) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + LCD->set_SIG(LCD_BCKL); +40102c90: ffbd21 l32r a2, 40102b84 +{ +40102c93: f0c112 addi a1, a1, -16 + LCD->set_SIG(LCD_BCKL); +40102c96: 0228 l32i.n a2, a2, 0 +{ +40102c98: 3109 s32i.n a0, a1, 12 + LCD->set_SIG(LCD_BCKL); +40102c9a: 5238 l32i.n a3, a2, 20 +40102c9c: 320c movi.n a2, 3 +40102c9e: 0003c0 callx0 a3 +#else + LCD->reset_SIG(LCD_BCKL); +#endif +} +40102ca1: 3108 l32i.n a0, a1, 12 +40102ca3: 10c112 addi a1, a1, 16 +40102ca6: f00d ret.n + +40102ca8 : + +void lcd_disable_backlight(void) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + LCD->reset_SIG(LCD_BCKL); +40102ca8: ffb721 l32r a2, 40102b84 +{ +40102cab: f0c112 addi a1, a1, -16 + LCD->reset_SIG(LCD_BCKL); +40102cae: 0228 l32i.n a2, a2, 0 +{ +40102cb0: 3109 s32i.n a0, a1, 12 + LCD->reset_SIG(LCD_BCKL); +40102cb2: 6238 l32i.n a3, a2, 24 +40102cb4: 320c movi.n a2, 3 +40102cb6: 0003c0 callx0 a3 +#else + LCD->set_SIG(LCD_BCKL); +#endif +} +40102cb9: 3108 l32i.n a0, a1, 12 +40102cbb: 10c112 addi a1, a1, 16 +40102cbe: f00d ret.n +40102cc0: 001324 excw + ... + +40102cc4 : +/** + * @brief Function that clears the LCD screen and sets the cursor on the position of the first character in the first line of the LCD + * screen. + */ +void lcd_cls(void) +{ +40102cc4: f0c112 addi a1, a1, -16 + lcd_write_cmd(LCDC_CLS); +40102cc7: 01a022 movi a2, 1 +{ +40102cca: 036102 s32i a0, a1, 12 + lcd_write_cmd(LCDC_CLS); +40102ccd: fff1c5 call0 40102bec +#if USE_RW_PIN == OFF + LCD->delay_us(4900); +40102cd0: ffad21 l32r a2, 40102b84 +40102cd3: 002222 l32i a2, a2, 0 +40102cd6: 7238 l32i.n a3, a2, 28 +40102cd8: fffa21 l32r a2, 40102cc0 +40102cdb: 0003c0 callx0 a3 +#endif +} +40102cde: 3108 l32i.n a0, a1, 12 +40102ce0: 10c112 addi a1, a1, 16 +40102ce3: f00d ret.n +40102ce5: 000000 ill + +40102ce8 : +/** + * @brief Function for printing/writing the string on the LCD screen starting from the current LCD cursor position. + * @param str string that should be printed/written on the LCD screen + */ +void lcd_str(const char *str) +{ +40102ce8: f0c112 addi a1, a1, -16 +40102ceb: 21c9 s32i.n a12, a1, 8 +40102ced: 3109 s32i.n a0, a1, 12 +40102cef: 02cd mov.n a12, a2 + register char znak; + while ((znak = *(str++))) +40102cf1: 000c22 l8ui a2, a12, 0 +40102cf4: 82cc bnez.n a2, 40102d00 + { + lcd_write_data((uint8_t)(znak)); + } +} +40102cf6: 3108 l32i.n a0, a1, 12 +40102cf8: 21c8 l32i.n a12, a1, 8 +40102cfa: 10c112 addi a1, a1, 16 +40102cfd: f00d ret.n +40102cff: cc1b00 excw + lcd_write_data((uint8_t)(znak)); +40102d02: fff105 call0 40102c14 +40102d05: fffa06 j 40102cf1 + +40102d08 : + * @brief Function that moves LCD cursor to a specific position located under the x and y coordinate + * @param y LCD row/line number. Defined enum value LINE_1, LINE_2,... etc. + * @param x LCD column number. Defined enum value C1, C2, C3,... etc. + */ +void lcd_locate(enum LCD_LINES y, enum LCD_COLUMNS x) +{ +40102d08: f0c112 addi a1, a1, -16 +40102d0b: 3109 s32i.n a0, a1, 12 + switch (y) +40102d0d: 328c beqz.n a2, 40102d14 +40102d0f: 011266 bnei a2, 1, 40102d14 + y = LCD_LINE1_ADR; + break; + +#if (LCD_Y > 1) + case 1: + y = LCD_LINE2_ADR; +40102d12: 024c movi.n a2, 64 + break; +#endif + default: + break; + } + lcd_write_cmd((uint8_t)(LCDC_SET_DDRAM + y + x)); +40102d14: 80c332 addi a3, a3, -128 +40102d17: 802320 add a2, a3, a2 +40102d1a: 742020 extui a2, a2, 0, 8 +40102d1d: ffecc5 call0 40102bec +} +40102d20: 032102 l32i a0, a1, 12 +40102d23: 10c112 addi a1, a1, 16 +40102d26: 000080 ret +40102d29: 000000 ill +40102d2c: 8d9b addi.n a8, a13, 9 +40102d2e: fe .byte 0xfe +40102d2f: 3f .byte 0x3f + +40102d30 : + * @brief Function that puts spaces(0x32) in the whole LCD buffer and sets the cursor on the position of the first character in the first line of the LCD + * buffer. + */ +void lcd_buf_cls(void) +{ + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) +40102d30: ffc531 l32r a3, 40102c44 +40102d33: 020c movi.n a2, 0 + { + *lcd_buf_position_ptr=' '; +40102d35: 20a052 movi a5, 32 +40102d38: 432a add.n a4, a3, a2 +40102d3a: 004452 s8i a5, a4, 0 + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) +40102d3d: 221b addi.n a2, a2, 1 +40102d3f: f5c266 bnei a2, 32, 40102d38 + } + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; +40102d42: ffbe21 l32r a2, 40102c3c +40102d45: 0239 s32i.n a3, a2, 0 + LCD_UPDATE_EVENT=true; +40102d47: fff921 l32r a2, 40102d2c +40102d4a: 130c movi.n a3, 1 +40102d4c: 004232 s8i a3, a2, 0 +} +40102d4f: f00d ret.n +40102d51: 000000 ill +40102d54: 3a98 l32i.n a9, a10, 12 +40102d56: 940000 extui a0, a0, 0, 10 +40102d59: 000011 l32r a1, 400c2d5c <__floatsidf+0xb4a6c> + +40102d5c : +{ +40102d5c: f0c112 addi a1, a1, -16 +40102d5f: 3109 s32i.n a0, a1, 12 +40102d61: 21c9 s32i.n a12, a1, 8 + LCD = LCD_IO_driver_interface_get(); +40102d63: 003b85 call0 4010311c +40102d66: ff87c1 l32r a12, 40102b84 +40102d69: 006c22 s32i a2, a12, 0 + LCD->init_LCD_pins(); +40102d6c: 0228 l32i.n a2, a2, 0 +40102d6e: 0002c0 callx0 a2 + lcd_disable_backlight(); +40102d71: fff345 call0 40102ca8 + LCD->set_SIG(LCD_E); +40102d74: 0c28 l32i.n a2, a12, 0 +40102d76: 052232 l32i a3, a2, 20 +40102d79: 02a022 movi a2, 2 +40102d7c: 0003c0 callx0 a3 + LCD->set_SIG(LCD_RS); +40102d7f: 0c28 l32i.n a2, a12, 0 +40102d81: 5238 l32i.n a3, a2, 20 +40102d83: 020c movi.n a2, 0 +40102d85: 0003c0 callx0 a3 + LCD->delay_us(15000); +40102d88: 0c28 l32i.n a2, a12, 0 +40102d8a: 7238 l32i.n a3, a2, 28 +40102d8c: fff221 l32r a2, 40102d54 +40102d8f: 0003c0 callx0 a3 + LCD->reset_SIG(LCD_RS); +40102d92: 0c28 l32i.n a2, a12, 0 +40102d94: 6238 l32i.n a3, a2, 24 +40102d96: 020c movi.n a2, 0 +40102d98: 0003c0 callx0 a3 + LCD->reset_SIG(LCD_E); +40102d9b: 0c28 l32i.n a2, a12, 0 +40102d9d: 6238 l32i.n a3, a2, 24 +40102d9f: 220c movi.n a2, 2 +40102da1: 0003c0 callx0 a3 + lcd_write_4bit_data(0x03); +40102da4: 320c movi.n a2, 3 +40102da6: ffde05 call0 40102b88 + LCD->delay_us(4500); +40102da9: 0c28 l32i.n a2, a12, 0 +40102dab: 7238 l32i.n a3, a2, 28 +40102dad: ffea21 l32r a2, 40102d58 +40102db0: 0003c0 callx0 a3 + lcd_write_4bit_data(0x03); +40102db3: 320c movi.n a2, 3 +40102db5: ffdd05 call0 40102b88 + LCD->delay_us(110); +40102db8: 0c28 l32i.n a2, a12, 0 +40102dba: 7238 l32i.n a3, a2, 28 +40102dbc: 6ea022 movi a2, 110 +40102dbf: 0003c0 callx0 a3 + lcd_write_4bit_data(0x03); +40102dc2: 320c movi.n a2, 3 +40102dc4: ffdc05 call0 40102b88 + LCD->delay_us(110); +40102dc7: 0c28 l32i.n a2, a12, 0 +40102dc9: 7238 l32i.n a3, a2, 28 +40102dcb: 6ea022 movi a2, 110 +40102dce: 0003c0 callx0 a3 + lcd_write_4bit_data(0x02); +40102dd1: 220c movi.n a2, 2 +40102dd3: ffdb45 call0 40102b88 + LCD->delay_us(110); +40102dd6: 0c28 l32i.n a2, a12, 0 +40102dd8: 7238 l32i.n a3, a2, 28 +40102dda: 6ea022 movi a2, 110 +40102ddd: 0003c0 callx0 a3 + lcd_write_cmd(LCDC_FUNC | LCDC_FUNC4B | LCDC_FUNC2L | LCDC_FUNC5x7); +40102de0: 822c movi.n a2, 40 +40102de2: ffe085 call0 40102bec + lcd_write_cmd(LCDC_ONOFF | LCDC_CURSOROFF | LCDC_DISPLAYON); +40102de5: c20c movi.n a2, 12 +40102de7: ffe045 call0 40102bec + lcd_cls(); +40102dea: ffed85 call0 40102cc4 + lcd_write_cmd(LCDC_ENTRY_MODE | LCDC_ENTRYR); +40102ded: 620c movi.n a2, 6 +40102def: ffdfc5 call0 40102bec + lcd_buf_cls(); +40102df2: fff3c5 call0 40102d30 + copy_lcd_buf_2_prev_lcd_buf(); +40102df5: ffe6c5 call0 40102c64 + LCD_UPDATE_EVENT=false; +40102df8: ffcd21 l32r a2, 40102d2c +} +40102dfb: 3108 l32i.n a0, a1, 12 + LCD_UPDATE_EVENT=false; +40102dfd: 030c movi.n a3, 0 +} +40102dff: 21c8 l32i.n a12, a1, 8 + LCD_UPDATE_EVENT=false; +40102e01: 004232 s8i a3, a2, 0 +} +40102e04: 10c112 addi a1, a1, 16 +40102e07: f00d ret.n +40102e09: 000000 ill + +40102e0c : + * @note For user-defined char, place CGRAM_char_index (Position/address of the character in CGRAM of the LCD where + * defined char was written). + */ +void lcd_buf_char(const char c) +{ + *lcd_buf_position_ptr=c; +40102e0c: ff8c31 l32r a3, 40102c3c +{ +40102e0f: f0c112 addi a1, a1, -16 + *lcd_buf_position_ptr=c; +40102e12: 0338 l32i.n a3, a3, 0 +{ +40102e14: 3109 s32i.n a0, a1, 12 + *lcd_buf_position_ptr=c; +40102e16: 004322 s8i a2, a3, 0 + check_lcd_buf_possition_ptr_overflow(); +40102e19: ffe2c5 call0 40102c48 + LCD_UPDATE_EVENT=true; +40102e1c: ffc421 l32r a2, 40102d2c +} +40102e1f: 3108 l32i.n a0, a1, 12 + LCD_UPDATE_EVENT=true; +40102e21: 130c movi.n a3, 1 +40102e23: 004232 s8i a3, a2, 0 +} +40102e26: 10c112 addi a1, a1, 16 +40102e29: f00d ret.n + ... + +40102e2c : + * @param y LCD row/line number. Defined enum value LINE_1, LINE_2,... etc. + * @param x LCD column number. Defined enum value C1, C2, C3,... etc. + */ +void lcd_buf_locate(enum LCD_LINES y, enum LCD_COLUMNS x) +{ + lcd_buf_position_ptr=&lcd_buffer[y][x]; +40102e2c: 1122c0 slli a2, a2, 4 +40102e2f: 223a add.n a2, a2, a3 +40102e31: ff8431 l32r a3, 40102c44 +40102e34: 223a add.n a2, a2, a3 +40102e36: ff8131 l32r a3, 40102c3c +40102e39: 0329 s32i.n a2, a3, 0 +} +40102e3b: f00d ret.n +40102e3d: 000000 ill + +40102e40 : +/** + * @brief Function for placing the string in the LCD buffer starts from the current LCD buffer position pointer. + * @param str string that should be placed in the LCD buffer + */ +void lcd_buf_str(const char *str) +{ +40102e40: f0c112 addi a1, a1, -16 +40102e43: 11d9 s32i.n a13, a1, 4 + while (*str) + { + *(lcd_buf_position_ptr)=*(str++); +40102e45: ff7dd1 l32r a13, 40102c3c +{ +40102e48: 21c9 s32i.n a12, a1, 8 +40102e4a: 3109 s32i.n a0, a1, 12 +40102e4c: 02cd mov.n a12, a2 + while (*str) +40102e4e: 000c22 l8ui a2, a12, 0 +40102e51: 12dc bnez.n a2, 40102e66 + check_lcd_buf_possition_ptr_overflow(); + } + LCD_UPDATE_EVENT=true; +40102e53: ffb621 l32r a2, 40102d2c +} +40102e56: 3108 l32i.n a0, a1, 12 + LCD_UPDATE_EVENT=true; +40102e58: 130c movi.n a3, 1 +} +40102e5a: 21c8 l32i.n a12, a1, 8 +40102e5c: 11d8 l32i.n a13, a1, 4 + LCD_UPDATE_EVENT=true; +40102e5e: 004232 s8i a3, a2, 0 +} +40102e61: 10c112 addi a1, a1, 16 +40102e64: f00d ret.n + *(lcd_buf_position_ptr)=*(str++); +40102e66: 0d38 l32i.n a3, a13, 0 +40102e68: cc1b addi.n a12, a12, 1 +40102e6a: 004322 s8i a2, a3, 0 + check_lcd_buf_possition_ptr_overflow(); +40102e6d: ffdd85 call0 40102c48 +40102e70: fff686 j 40102e4e + ... + +40102e74 : +/** + * @brief Function that prints on the LCD screen the content of The LCD buffer. + * The function sets also The LCD buffer position pointer to the First line's first character. + */ +void lcd_update(void) +{ +40102e74: d0c112 addi a1, a1, -48 +40102e77: 81e9 s32i.n a14, a1, 32 + uint8_t lcd_cursor_position=0; + uint8_t lcd_line=0; + uint8_t missed_char_counter_in_LCD_line=0; + const lcd_pos_t *prev_lcd_buff_pos_ptr=&prev_lcd_buffer[LINE_1][C1]; + + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) +40102e79: ff7221 l32r a2, 40102c44 +40102e7c: ff70e1 l32r a14, 40102c3c +{ +40102e7f: a1c9 s32i.n a12, a1, 40 +40102e81: 91d9 s32i.n a13, a1, 36 +40102e83: 71f9 s32i.n a15, a1, 28 +40102e85: b109 s32i.n a0, a1, 44 + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) +40102e87: 0e29 s32i.n a2, a14, 0 + const lcd_pos_t *prev_lcd_buff_pos_ptr=&prev_lcd_buffer[LINE_1][C1]; +40102e89: ff75d1 l32r a13, 40102c60 + uint8_t missed_char_counter_in_LCD_line=0; +40102e8c: 020c movi.n a2, 0 + uint8_t lcd_line=0; +40102e8e: 02fd mov.n a15, a2 + uint8_t lcd_cursor_position=0; +40102e90: 024d mov.n a4, a2 + lcd_write_data(data); +40102e92: 02cd mov.n a12, a2 + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) +40102e94: 0e38 l32i.n a3, a14, 0 +40102e96: ff6a51 l32r a5, 40102c40 +40102e99: 20b537 bgeu a5, a3, 40102ebd + write_lcd_buf_2_lcd(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line,prev_lcd_buff_pos_ptr); + update_lcd_curosr_possition(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line); + prev_lcd_buff_pos_ptr++; + } + + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; +40102e9c: ff6a21 l32r a2, 40102c44 +40102e9f: 0e29 s32i.n a2, a14, 0 + copy_lcd_buf_2_prev_lcd_buf(); +40102ea1: ffdc05 call0 40102c64 + LCD_UPDATE_EVENT=false; +40102ea4: ffa221 l32r a2, 40102d2c +} +40102ea7: b108 l32i.n a0, a1, 44 + LCD_UPDATE_EVENT=false; +40102ea9: 030c movi.n a3, 0 +} +40102eab: a1c8 l32i.n a12, a1, 40 +40102ead: 91d8 l32i.n a13, a1, 36 +40102eaf: 81e8 l32i.n a14, a1, 32 +40102eb1: 71f8 l32i.n a15, a1, 28 + LCD_UPDATE_EVENT=false; +40102eb3: 004232 s8i a3, a2, 0 +} +40102eb6: 30c112 addi a1, a1, 48 +40102eb9: f00d ret.n +40102ebb: 620000 excw + if(*lcd_buf_position_ptr!=*prev_lcd_buff_pos_ptr) +40102ebe: 000d mov.n a0, a0 +40102ec0: 000332 l8ui a3, a3, 0 +40102ec3: 491637 beq a6, a3, 40102f10 + if (*missed_char_counter_in_LCD_line!=0) +40102ec6: 928c beqz.n a2, 40102ed3 + lcd_locate(*lcd_line,*lcd_cursor_position); +40102ec8: 043d mov.n a3, a4 +40102eca: 0f2d mov.n a2, a15 +40102ecc: 0149 s32i.n a4, a1, 0 +40102ece: ffe385 call0 40102d08 +40102ed1: 0148 l32i.n a4, a1, 0 + lcd_char(*lcd_buf_position_ptr); +40102ed3: 0e28 l32i.n a2, a14, 0 + lcd_write_data(data); +40102ed5: 000222 l8ui a2, a2, 0 +40102ed8: 006142 s32i a4, a1, 0 +40102edb: ffd385 call0 40102c14 +40102ede: 0148 l32i.n a4, a1, 0 +40102ee0: 0c2d mov.n a2, a12 + if((++(*lcd_cursor_position))>=LCD_X) +40102ee2: 441b addi.n a4, a4, 1 +40102ee4: 744040 extui a4, a4, 0, 8 +40102ee7: f30c movi.n a3, 15 +40102ee9: 17b347 bgeu a3, a4, 40102f04 + (*lcd_line)++; +40102eec: ff1b addi.n a15, a15, 1 +40102eee: 74f0f0 extui a15, a15, 0, 8 + if(*lcd_line==LCD_Y) +40102ef1: 012f66 bnei a15, 2, 40102ef6 + *lcd_line=LINE_1; +40102ef4: 0cfd mov.n a15, a12 + lcd_locate(*lcd_line,*lcd_cursor_position); +40102ef6: 202ff0 or a2, a15, a15 +40102ef9: 203cc0 or a3, a12, a12 +40102efc: ffe085 call0 40102d08 + *missed_char_counter_in_LCD_line=0; +40102eff: 202cc0 or a2, a12, a12 + *lcd_cursor_position=0; +40102f02: 040c movi.n a4, 0 + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) +40102f04: 0e38 l32i.n a3, a14, 0 + prev_lcd_buff_pos_ptr++; +40102f06: dd1b addi.n a13, a13, 1 + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) +40102f08: 331b addi.n a3, a3, 1 +40102f0a: 0e39 s32i.n a3, a14, 0 +40102f0c: ffe106 j 40102e94 +40102f0f: 221b00 excw + (*missed_char_counter_in_LCD_line)++; +40102f12: 742020 extui a2, a2, 0, 8 +40102f15: fff246 j 40102ee2 + +40102f18 : + break; + } +} + +static void wraper_delay_us(uint32_t delay_us) +{ +40102f18: f0c112 addi a1, a1, -16 + // ToDo update wraper + os_delay_us((uint16_t)(delay_us)); +40102f1b: f42020 extui a2, a2, 0, 16 +{ +40102f1e: 3109 s32i.n a0, a1, 12 + os_delay_us((uint16_t)(delay_us)); +40102f20: f61801 l32r a0, 40100780 +40102f23: 0000c0 callx0 a0 +} +40102f26: 3108 l32i.n a0, a1, 12 +40102f28: 10c112 addi a1, a1, 16 +40102f2b: f00d ret.n +40102f2d: 000000 ill + +40102f30 : +{ +40102f30: f0c112 addi a1, a1, -16 +40102f33: 3109 s32i.n a0, a1, 12 + switch (LCD_SIG) +40102f35: 112226 beqi a2, 2, 40102f4a +40102f38: 203226 beqi a2, 3, 40102f5c + gpio_output_set(0,LCD_RS_PIN,LCD_RS_PIN, 0); +40102f3b: 050c movi.n a5, 0 +40102f3d: 840c movi.n a4, 8 + switch (LCD_SIG) +40102f3f: b28c beqz.n a2, 40102f4e +} +40102f41: 3108 l32i.n a0, a1, 12 +40102f43: 10c112 addi a1, a1, 16 +40102f46: f00d ret.n +40102f48: 0c0000 excw + gpio_output_set(0,LCD_E_PIN,LCD_E_PIN, 0); +40102f4b: 240c05 call0 4012700c <_lit4_end+0x20ce0> + gpio_output_set(0,LCD_BCKL_PIN,LCD_BCKL_PIN,0); +40102f4e: 043d mov.n a3, a4 +40102f50: 052d mov.n a2, a5 +40102f52: fa2401 l32r a0, 401017e4 +40102f55: 0000c0 callx0 a0 +} +40102f58: fff946 j 40102f41 +40102f5b: 050c00 extui a0, a0, 28, 1 + gpio_output_set(0,LCD_BCKL_PIN,LCD_BCKL_PIN,0); +40102f5e: 041c movi.n a4, 16 +40102f60: fffa86 j 40102f4e + ... + +40102f64 : +{ +40102f64: f0c112 addi a1, a1, -16 +40102f67: 3109 s32i.n a0, a1, 12 + switch (LCD_SIG) +40102f69: 112226 beqi a2, 2, 40102f7e +40102f6c: 203226 beqi a2, 3, 40102f90 + gpio_output_set(LCD_RS_PIN,0,LCD_RS_PIN, 0); +40102f6f: 050c movi.n a5, 0 +40102f71: 840c movi.n a4, 8 + switch (LCD_SIG) +40102f73: b28c beqz.n a2, 40102f82 +} +40102f75: 3108 l32i.n a0, a1, 12 +40102f77: 10c112 addi a1, a1, 16 +40102f7a: f00d ret.n +40102f7c: 0c0000 excw + gpio_output_set(LCD_E_PIN,0,LCD_E_PIN, 0); +40102f7f: 240c05 call0 40127040 <_lit4_end+0x20d14> + gpio_output_set(LCD_BCKL_PIN,0,LCD_BCKL_PIN, 0); +40102f82: 053d mov.n a3, a5 +40102f84: 042d mov.n a2, a4 +40102f86: fa1701 l32r a0, 401017e4 +40102f89: 0000c0 callx0 a0 +} +40102f8c: fff946 j 40102f75 +40102f8f: 050c00 extui a0, a0, 28, 1 + gpio_output_set(LCD_BCKL_PIN,0,LCD_BCKL_PIN, 0); +40102f92: 041c movi.n a4, 16 +40102f94: fffa86 j 40102f82 +40102f97: 400000 ssr a0 +40102f9a: 000000 ill +40102f9d: 000020 excw +40102fa0: 008000 excw + ... + +40102fa4 : +{ +40102fa4: f0c112 addi a1, a1, -16 +40102fa7: 21c9 s32i.n a12, a1, 8 +40102fa9: 74c020 extui a12, a2, 0, 8 +40102fac: fffb21 l32r a2, 40102f98 + gpio_output_set(LCD_D4_PIN,0,LCD_D4_PIN, 0); +40102faf: 050c movi.n a5, 0 +{ +40102fb1: 3109 s32i.n a0, a1, 12 + gpio_output_set(LCD_D4_PIN,0,LCD_D4_PIN, 0); +40102fb3: 024d mov.n a4, a2 +40102fb5: 053d mov.n a3, a5 + if ((data & LCD_D4_MASK)) +40102fb7: 05ec07 bbsi a12, 0, 40102fc0 + gpio_output_set(0,LCD_D4_PIN,LCD_D4_PIN, 0); +40102fba: 203220 or a3, a2, a2 +40102fbd: 202550 or a2, a5, a5 +40102fc0: fa0901 l32r a0, 401017e4 +40102fc3: 0000c0 callx0 a0 + if ((data & LCD_D5_MASK)) +40102fc6: f55d21 l32r a2, 4010053c + gpio_output_set(LCD_D5_PIN,0,LCD_D5_PIN, 0); +40102fc9: 050c movi.n a5, 0 +40102fcb: 024d mov.n a4, a2 +40102fcd: 053d mov.n a3, a5 + if ((data & LCD_D5_MASK)) +40102fcf: 05ec17 bbsi a12, 1, 40102fd8 + gpio_output_set(0,LCD_D5_PIN,LCD_D5_PIN, 0); +40102fd2: 203220 or a3, a2, a2 +40102fd5: 202550 or a2, a5, a5 +40102fd8: fa0301 l32r a0, 401017e4 +40102fdb: 0000c0 callx0 a0 + if ((data & LCD_D6_MASK)) +40102fde: ffef21 l32r a2, 40102f9c + gpio_output_set(LCD_D6_PIN,0,LCD_D6_PIN, 0); +40102fe1: 050c movi.n a5, 0 +40102fe3: 024d mov.n a4, a2 +40102fe5: 053d mov.n a3, a5 + if ((data & LCD_D6_MASK)) +40102fe7: 05ec27 bbsi a12, 2, 40102ff0 + gpio_output_set(0,LCD_D6_PIN,LCD_D6_PIN, 0); +40102fea: 203220 or a3, a2, a2 +40102fed: 202550 or a2, a5, a5 +40102ff0: f9fd01 l32r a0, 401017e4 +40102ff3: 0000c0 callx0 a0 + if ((data & LCD_D7_MASK)) +40102ff6: ffea21 l32r a2, 40102fa0 + gpio_output_set(LCD_D7_PIN,0,LCD_D7_PIN, 0); +40102ff9: 050c movi.n a5, 0 +40102ffb: 024d mov.n a4, a2 +40102ffd: 053d mov.n a3, a5 + if ((data & LCD_D7_MASK)) +40102fff: 05ec37 bbsi a12, 3, 40103008 + gpio_output_set(0,LCD_D7_PIN,LCD_D7_PIN, 0); +40103002: 203220 or a3, a2, a2 +40103005: 202550 or a2, a5, a5 +40103008: f9f701 l32r a0, 401017e4 +4010300b: 0000c0 callx0 a0 +} +4010300e: 3108 l32i.n a0, a1, 12 +40103010: 21c8 l32i.n a12, a1, 8 +40103012: 10c112 addi a1, a1, 16 +40103015: f00d ret.n +40103017: f00000 subx8 a0, a0, a0 + ... + +4010301c : + gpio_output_set( +4010301c: 040c movi.n a4, 0 +4010301e: fffe51 l32r a5, 40103018 +{ +40103021: f0c112 addi a1, a1, -16 + gpio_output_set( +40103024: 043d mov.n a3, a4 +40103026: 042d mov.n a2, a4 +{ +40103028: 3109 s32i.n a0, a1, 12 + gpio_output_set( +4010302a: f9ee01 l32r a0, 401017e4 +4010302d: 0000c0 callx0 a0 +} +40103030: 3108 l32i.n a0, a1, 12 +40103032: 10c112 addi a1, a1, 16 +40103035: f00d ret.n + ... + +40103038 : + gpio_output_set( +40103038: fff831 l32r a3, 40103018 +4010303b: 050c movi.n a5, 0 +{ +4010303d: f0c112 addi a1, a1, -16 + gpio_output_set( +40103040: 034d mov.n a4, a3 +40103042: 052d mov.n a2, a5 +{ +40103044: 3109 s32i.n a0, a1, 12 + gpio_output_set( +40103046: f9e701 l32r a0, 401017e4 +40103049: 0000c0 callx0 a0 +} +4010304c: 3108 l32i.n a0, a1, 12 +4010304e: 10c112 addi a1, a1, 16 +40103051: f00d ret.n +40103053: 081400 excw +40103056: 186000 excw +40103059: 0008 l32i.n a0, a0, 0 +4010305b: 080c60 excw +4010305e: 046000 extui a6, a0, 0, 1 +40103061: 0008 l32i.n a0, a0, 0 +40103063: 080860 excw +40103066: 106000 and a6, a0, a0 +40103069: 0008 l32i.n a0, a0, 0 +4010306b: 083c60 excw +4010306e: 1a6000 excw +40103071: 0000f0 excw + +40103074 : + PIN_FUNC_SELECT(LCD_RS_MUX,LCD_RS_FUNC); +40103074: fff851 l32r a5, 40103054 +40103077: cfae22 movi a2, 0xfffffecf +4010307a: 0020c0 memw +4010307d: 0548 l32i.n a4, a5, 0 +4010307f: 033c movi.n a3, 48 +{ +40103081: f0c112 addi a1, a1, -16 + PIN_FUNC_SELECT(LCD_RS_MUX,LCD_RS_FUNC); +40103084: 104420 and a4, a4, a2 +{ +40103087: 3109 s32i.n a0, a1, 12 + PIN_FUNC_SELECT(LCD_RS_MUX,LCD_RS_FUNC); +40103089: 204430 or a4, a4, a3 +4010308c: 0020c0 memw +4010308f: 0549 s32i.n a4, a5, 0 + PIN_FUNC_SELECT(LCD_E_MUX,LCD_E_FUNC); +40103091: fff151 l32r a5, 40103058 +40103094: 0020c0 memw +40103097: 0548 l32i.n a4, a5, 0 +40103099: 104420 and a4, a4, a2 +4010309c: 204430 or a4, a4, a3 +4010309f: 0020c0 memw +401030a2: 0549 s32i.n a4, a5, 0 + PIN_FUNC_SELECT(LCD_D4_MUX,LCD_D4_FUNC); +401030a4: ffee51 l32r a5, 4010305c +401030a7: 0020c0 memw +401030aa: 0548 l32i.n a4, a5, 0 +401030ac: 104420 and a4, a4, a2 +401030af: 204430 or a4, a4, a3 +401030b2: 0020c0 memw +401030b5: 0549 s32i.n a4, a5, 0 + PIN_FUNC_SELECT(LCD_D5_MUX,LCD_D5_FUNC); +401030b7: ffea51 l32r a5, 40103060 +401030ba: 0020c0 memw +401030bd: 0548 l32i.n a4, a5, 0 +401030bf: 104420 and a4, a4, a2 +401030c2: 204430 or a4, a4, a3 +401030c5: 0020c0 memw +401030c8: 0549 s32i.n a4, a5, 0 + PIN_FUNC_SELECT(LCD_D6_MUX,LCD_D6_FUNC); +401030ca: ffe651 l32r a5, 40103064 +401030cd: 0020c0 memw +401030d0: 0548 l32i.n a4, a5, 0 +401030d2: 104420 and a4, a4, a2 +401030d5: 204430 or a4, a4, a3 +401030d8: 0020c0 memw +401030db: 0549 s32i.n a4, a5, 0 + PIN_FUNC_SELECT(LCD_D7_MUX,LCD_D7_FUNC); +401030dd: ffe251 l32r a5, 40103068 +401030e0: 0020c0 memw +401030e3: 0548 l32i.n a4, a5, 0 +401030e5: 104420 and a4, a4, a2 +401030e8: 203430 or a3, a4, a3 + PIN_FUNC_SELECT(LCD_BCKL_MUX,LCD_BCKL_FUNC); +401030eb: ffe041 l32r a4, 4010306c + PIN_FUNC_SELECT(LCD_D7_MUX,LCD_D7_FUNC); +401030ee: 0020c0 memw +401030f1: 0539 s32i.n a3, a5, 0 + PIN_FUNC_SELECT(LCD_BCKL_MUX,LCD_BCKL_FUNC); +401030f3: 0020c0 memw +401030f6: 0438 l32i.n a3, a4, 0 + gpio_output_set(0, +401030f8: 050c movi.n a5, 0 + PIN_FUNC_SELECT(LCD_BCKL_MUX,LCD_BCKL_FUNC); +401030fa: 102320 and a2, a3, a2 + gpio_output_set(0, +401030fd: ffdc31 l32r a3, 40103070 + PIN_FUNC_SELECT(LCD_BCKL_MUX,LCD_BCKL_FUNC); +40103100: 0020c0 memw +40103103: 0429 s32i.n a2, a4, 0 + gpio_output_set(0, +40103105: 034d mov.n a4, a3 +40103107: 202550 or a2, a5, a5 +4010310a: f9b601 l32r a0, 401017e4 +4010310d: 0000c0 callx0 a0 +} +40103110: 3108 l32i.n a0, a1, 12 +40103112: 10c112 addi a1, a1, 16 +40103115: f00d ret.n +40103117: 875c00 excw +4010311a: fe .byte 0xfe +4010311b: 3f .byte 0x3f + +4010311c : +} +4010311c: ffff21 l32r a2, 40103118 +4010311f: f00d ret.n +40103121: 000000 ill +40103124: fe8aa0 excw +40103127: 3f .byte 0x3f +40103128: 54e8 l32i.n a14, a4, 20 +4010312a: 21 .byte 0x21 +4010312b: 40 .byte 0x40 + +4010312c : +4010312c: 030c movi.n a3, 0 +4010312e: f0c112 addi a1, a1, -16 +40103131: 025d mov.n a5, a2 +40103133: 0109 s32i.n a0, a1, 0 +40103135: fffb01 l32r a0, 40103124 +40103138: 120c movi.n a2, 1 +4010313a: 0059 s32i.n a5, a0, 0 +4010313c: fffb01 l32r a0, 40103128 +4010313f: 0000c0 callx0 a0 +40103142: 0108 l32i.n a0, a1, 0 +40103144: 10c112 addi a1, a1, 16 +40103147: f00d ret.n +40103149: 000000 ill + +4010314c : +4010314c: fff631 l32r a3, 40103124 +4010314f: 0329 s32i.n a2, a3, 0 +40103151: f00d ret.n + ... + +40103154 : +40103154: f0c112 addi a1, a1, -16 +40103157: 0109 s32i.n a0, a1, 0 +40103159: fff201 l32r a0, 40103124 +4010315c: 0008 l32i.n a0, a0, 0 +4010315e: 1008 l32i.n a0, a0, 4 +40103160: 0000c0 callx0 a0 +40103163: 020c movi.n a2, 0 +40103165: 0108 l32i.n a0, a1, 0 +40103167: 10c112 addi a1, a1, 16 +4010316a: f00d ret.n +4010316c: f20a00 excw +4010316f: 3f .byte 0x3f + +40103170 : +40103170: ffff21 l32r a2, 4010316c +40103173: 0020c0 memw +40103176: 802222 l32i a2, a2, 0x200 +40103179: f00d ret.n +4010317b: 8ab800 excw +4010317e: fe .byte 0xfe +4010317f: 3f .byte 0x3f + +40103180 : +40103180: 415230 srli a5, a3, 2 +40103183: f0c112 addi a1, a1, -16 +40103186: 016d mov.n a6, a1 +40103188: 905550 addx2 a5, a5, a5 +4010318b: 1109 s32i.n a0, a1, 4 +4010318d: 000c movi.n a0, 0 +4010318f: 406a add.n a4, a0, a6 +40103191: 350a add.n a3, a5, a0 +40103193: 323a add.n a3, a2, a3 +40103195: 001b addi.n a0, a0, 1 +40103197: 000332 l8ui a3, a3, 0 +4010319a: 004432 s8i a3, a4, 0 +4010319d: 010080 slli a0, a0, 24 +401031a0: 310800 srai a0, a0, 24 +401031a3: e83066 bnei a0, 3, 4010318f +401031a6: 6ba022 movi a2, 107 +401031a9: 230c movi.n a3, 2 +401031ab: 140c movi.n a4, 1 +401031ad: 064c movi.n a6, 64 +401031af: fff301 l32r a0, 4010317c +401031b2: 000152 l8ui a5, a1, 0 +401031b5: 0008 l32i.n a0, a0, 0 +401031b7: 015580 slli a5, a5, 24 +401031ba: 315850 srai a5, a5, 24 +401031bd: 205560 or a5, a5, a6 +401031c0: 262002 l32i a0, a0, 152 +401031c3: 745050 extui a5, a5, 0, 8 +401031c6: 0000c0 callx0 a0 +401031c9: 6ba022 movi a2, 107 +401031cc: 230c movi.n a3, 2 +401031ce: 240c movi.n a4, 2 +401031d0: 010152 l8ui a5, a1, 1 +401031d3: ffea01 l32r a0, 4010317c +401031d6: 020162 l8ui a6, a1, 2 +401031d9: 0008 l32i.n a0, a0, 0 +401031db: 016680 slli a6, a6, 24 +401031de: 015580 slli a5, a5, 24 +401031e1: 315850 srai a5, a5, 24 +401031e4: 316860 srai a6, a6, 24 +401031e7: 262002 l32i a0, a0, 152 +401031ea: 1166c0 slli a6, a6, 4 +401031ed: 205560 or a5, a5, a6 +401031f0: 745050 extui a5, a5, 0, 8 +401031f3: 0000c0 callx0 a0 +401031f6: 1108 l32i.n a0, a1, 4 +401031f8: 10c112 addi a1, a1, 16 +401031fb: f00d ret.n +401031fd: 000000 ill +40103200: 009a00 excw +40103203: 0fff60 excw +40103206: 00fff0 excw +40103209: 000b40 excw + +4010320c : +4010320c: fffd71 l32r a7, 40103200 +4010320f: fffd61 l32r a6, 40103204 +40103212: f4d351 l32r a5, 40100560 +40103215: 42ac beqz.n a2, 4010323d +40103217: 119340 slli a9, a3, 12 +4010321a: 0020c0 memw +4010321d: 592782 l32i a8, a7, 0x164 +40103220: 108860 and a8, a8, a6 +40103223: 208890 or a8, a8, a9 +40103226: 0020c0 memw +40103229: 596782 s32i a8, a7, 0x164 +4010322c: 0020c0 memw +4010322f: da2742 l32i a4, a7, 0x368 +40103232: 204450 or a4, a4, a5 +40103235: 0020c0 memw +40103238: da6742 s32i a4, a7, 0x368 +4010323b: f00d ret.n +4010323d: fff241 l32r a4, 40103208 +40103240: 0020c0 memw +40103243: 592732 l32i a3, a7, 0x164 +40103246: 103360 and a3, a3, a6 +40103249: 203340 or a3, a3, a4 +4010324c: 0020c0 memw +4010324f: 596732 s32i a3, a7, 0x164 +40103252: 0020c0 memw +40103255: da2722 l32i a2, a7, 0x368 +40103258: 202250 or a2, a2, a5 +4010325b: 0020c0 memw +4010325e: da6722 s32i a2, a7, 0x368 +40103261: f00d ret.n +40103263: ffff00 excw +40103266: 0f .byte 0xf +40103267: ff .byte 0xff +40103268: ff .byte 0xff +40103269: ff .byte 0xff +4010326a: ff .byte 0xff +4010326b: 000003 excw +4010326e: 000030 excw +40103271: d80000 excw +40103274: ff .byte 0xff +40103275: ff .byte 0xff +40103276: 7f .byte 0x7f +40103277: fe .byte 0xfe + +40103278 : +40103278: fffb41 l32r a4, 40103264 +4010327b: f0c112 addi a1, a1, -16 +4010327e: 0109 s32i.n a0, a1, 0 +40103280: 11c9 s32i.n a12, a1, 4 +40103282: fff901 l32r a0, 40103268 +40103285: f953c1 l32r a12, 401017d4 +40103288: f2dc bnez.n a2, 401032ab +4010328a: 0020c0 memw +4010328d: e52c32 l32i a3, a12, 0x394 +40103290: 103340 and a3, a3, a4 +40103293: 0020c0 memw +40103296: e56c32 s32i a3, a12, 0x394 +40103299: 0020c0 memw +4010329c: e52c22 l32i a2, a12, 0x394 +4010329f: 102200 and a2, a2, a0 +401032a2: 0020c0 memw +401032a5: e56c22 s32i a2, a12, 0x394 +401032a8: 000a46 j 401032d5 +401032ab: fff071 l32r a7, 4010326c +401032ae: 0020c0 memw +401032b1: e52c62 l32i a6, a12, 0x394 +401032b4: 106640 and a6, a6, a4 +401032b7: 206670 or a6, a6, a7 +401032ba: 0020c0 memw +401032bd: e56c62 s32i a6, a12, 0x394 +401032c0: ffec61 l32r a6, 40103270 +401032c3: 0020c0 memw +401032c6: e52c52 l32i a5, a12, 0x394 +401032c9: 105500 and a5, a5, a0 +401032cc: 205560 or a5, a5, a6 +401032cf: 0020c0 memw +401032d2: e56c52 s32i a5, a12, 0x394 +401032d5: f4a681 l32r a8, 40100570 +401032d8: ffe791 l32r a9, 40103274 +401032db: 0020c0 memw +401032de: fa2c72 l32i a7, a12, 0x3e8 +401032e1: 107790 and a7, a7, a9 +401032e4: 207780 or a7, a7, a8 +401032e7: 0020c0 memw +401032ea: fa6c72 s32i a7, a12, 0x3e8 +401032ed: 120c movi.n a2, 1 +401032ef: f52401 l32r a0, 40100780 +401032f2: 0000c0 callx0 a0 +401032f5: 0020c0 memw +401032f8: ffdfb1 l32r a11, 40103274 +401032fb: fa2ca2 l32i a10, a12, 0x3e8 +401032fe: 10aab0 and a10, a10, a11 +40103301: 0020c0 memw +40103304: fa6ca2 s32i a10, a12, 0x3e8 +40103307: 11c8 l32i.n a12, a1, 4 +40103309: 0108 l32i.n a0, a1, 0 +4010330b: 10c112 addi a1, a1, 16 +4010330e: f00d ret.n +40103310: effe00 excw +40103313: 3f .byte 0x3f +40103314: ff .byte 0xff +40103315: ff .byte 0xff +40103316: 00fc70 excw +40103319: 500000 excw +4010331c: 000600 excw +4010331f: 8aa660 excw +40103322: fe .byte 0xfe +40103323: 3f .byte 0x3f + +40103324 : +40103324: 04a022 movi a2, 4 +40103327: f0c112 addi a1, a1, -16 +4010332a: 006102 s32i a0, a1, 0 +4010332d: 0055c5 call0 4010388c +40103330: 00a022 movi a2, 0 +40103333: fff445 call0 40103278 +40103336: 62a022 movi a2, 98 +40103339: ff9001 l32r a0, 4010317c +4010333c: 130c movi.n a3, 1 +4010333e: 0008 l32i.n a0, a0, 0 +40103340: 340c movi.n a4, 3 +40103342: 262002 l32i a0, a0, 152 +40103345: 150c movi.n a5, 1 +40103347: 0000c0 callx0 a0 +4010334a: db7c movi.n a11, -3 +4010334c: fff171 l32r a7, 40103310 +4010334f: ff87a1 l32r a10, 4010316c +40103352: 0020c0 memw +40103355: 9c2a92 l32i a9, a10, 0x270 +40103358: 1099b0 and a9, a9, a11 +4010335b: 0020c0 memw +4010335e: 9c6a92 s32i a9, a10, 0x270 +40103361: ffec81 l32r a8, 40103314 +40103364: 0020c0 memw +40103367: 862762 l32i a6, a7, 0x218 +4010336a: 106680 and a6, a6, a8 +4010336d: 0020c0 memw +40103370: 866762 s32i a6, a7, 0x218 +40103373: ffe941 l32r a4, 40103318 +40103376: ffe951 l32r a5, 4010331c +40103379: 0020c0 memw +4010337c: 446542 s32i a4, a5, 0x110 +4010337f: ffe831 l32r a3, 40103320 +40103382: 120c movi.n a2, 1 +40103384: 0108 l32i.n a0, a1, 0 +40103386: 10c112 addi a1, a1, 16 +40103389: 004322 s8i a2, a3, 0 +4010338c: f00d ret.n +4010338e: 2c0000 excw +40103391: 3ffe80 excw +40103394: c818 l32i.n a1, a8, 48 +40103396: d44021 l32r a2, 400f8498 <__floatsidf+0xea1a8> +40103399: 4021b3 excw + +4010339c : +4010339c: 140c movi.n a4, 1 +4010339e: f51c movi.n a5, 31 +401033a0: 080c movi.n a8, 0 +401033a2: 38a192 movi a9, 0x138 +401033a5: fffa61 l32r a6, 40103390 +401033a8: c0c112 addi a1, a1, -64 +401033ab: 61c9 s32i.n a12, a1, 24 +401033ad: 71d9 s32i.n a13, a1, 28 +401033af: 81e9 s32i.n a14, a1, 32 +401033b1: 91f9 s32i.n a15, a1, 36 +401033b3: 10c172 addi a7, a1, 16 +401033b6: c129 s32i.n a2, a1, 48 +401033b8: 5109 s32i.n a0, a1, 20 +401033ba: 024c movi.n a2, 64 +401033bc: c138 l32i.n a3, a1, 48 +401033be: 000662 l8ui a6, a6, 0 +401033c1: 0199 s32i.n a9, a1, 0 +401033c3: 1189 s32i.n a8, a1, 4 +401033c5: 016680 slli a6, a6, 24 +401033c8: 316860 srai a6, a6, 24 +401033cb: fff201 l32r a0, 40103394 +401033ce: 0000c0 callx0 a0 +401033d1: 0e0c movi.n a14, 0 +401033d3: 000c movi.n a0, 0 +401033d5: 6fa0f2 movi a15, 111 +401033d8: 100182 l8ui a8, a1, 16 +401033db: c178 l32i.n a7, a1, 48 +401033dd: 0b0c movi.n a11, 0 +401033df: d1b9 s32i.n a11, a1, 52 +401033e1: 050792 l8ui a9, a7, 5 +401033e4: 018880 slli a8, a8, 24 +401033e7: 000772 l8ui a7, a7, 0 +401033ea: 318880 srai a8, a8, 24 +401033ed: 1fc882 addi a8, a8, 31 +401033f0: c07790 sub a7, a7, a9 +401033f3: 104182 s8i a8, a1, 16 +401033f6: 117700 slli a7, a7, 16 +401033f9: 317070 srai a7, a7, 16 +401033fc: e179 s32i.n a7, a1, 56 +401033fe: 1177f0 slli a7, a7, 1 +40103401: f9c782 addi a8, a7, -7 +40103404: b189 s32i.n a8, a1, 44 +40103406: f8c772 addi a7, a7, -8 +40103409: 117700 slli a7, a7, 16 +4010340c: 317070 srai a7, a7, 16 +4010340f: a179 s32i.n a7, a1, 40 +40103411: 0f6d mov.n a6, a15 +40103413: 100122 l8ui a2, a1, 16 +40103416: e1c8 l32i.n a12, a1, 56 +40103418: 012280 slli a2, a2, 24 +4010341b: 312820 srai a2, a2, 24 +4010341e: 220a add.n a2, a2, a0 +40103420: 104122 s8i a2, a1, 16 +40103423: 0f0d mov.n a0, a15 +40103425: 012280 slli a2, a2, 24 +40103428: 312820 srai a2, a2, 24 +4010342b: cc2a add.n a12, a12, a2 +4010342d: 01cc80 slli a12, a12, 24 +40103430: 31c8c0 srai a12, a12, 24 +40103433: 012f27 blt a15, a2, 40103438 +40103436: 026d mov.n a6, a2 +40103438: 104162 s8i a6, a1, 16 +4010343b: 012680 slli a2, a6, 24 +4010343e: 312820 srai a2, a2, 24 +40103441: 012fc7 blt a15, a12, 40103446 +40103444: 0c0d mov.n a0, a12 +40103446: 01c080 slli a12, a0, 24 +40103449: 31c8c0 srai a12, a12, 24 +4010344c: ffd301 l32r a0, 40103398 +4010344f: 0000c0 callx0 a0 +40103452: 02dd mov.n a13, a2 +40103454: 0c2d mov.n a2, a12 +40103456: ffd001 l32r a0, 40103398 +40103459: 0000c0 callx0 a0 +4010345c: b138 l32i.n a3, a1, 44 +4010345e: c06d20 sub a6, a13, a2 +40103461: 110600 slli a0, a6, 16 +40103464: 310000 srai a0, a0, 16 +40103467: 052037 blt a0, a3, 40103470 +4010346a: a8a032 movi a3, 168 +4010346d: 4ca3d7 bge a3, a13, 401034bd +40103470: ee8c beqz.n a14, 40103482 +40103472: d148 l32i.n a4, a1, 52 +40103474: a158 l32i.n a5, a1, 40 +40103476: 082407 blt a4, a0, 40103482 +40103479: 052057 blt a0, a5, 40103482 +4010347c: a8a072 movi a7, 168 +4010347f: 3aa7d7 bge a7, a13, 401034bd +40103482: 085c movi.n a8, 80 +40103484: 352287 blt a2, a8, 401034bd +40103487: 321cf7 beq a12, a15, 401034bd +4010348a: 112600 slli a2, a6, 16 +4010348d: e178 l32i.n a7, a1, 56 +4010348f: 901b addi.n a9, a0, 1 +40103491: 802b addi.n a8, a0, 2 +40103493: ee1b addi.n a14, a14, 1 +40103495: 74e0e0 extui a14, a14, 0, 8 +40103498: b38990 movgez a8, a9, a9 +4010349b: 218180 srai a8, a8, 1 +4010349e: 290c movi.n a9, 2 +401034a0: 090d mov.n a0, a9 +401034a2: c07780 sub a7, a7, a8 +401034a5: 770b addi.n a7, a7, -1 +401034a7: 017780 slli a7, a7, 24 +401034aa: 317870 srai a7, a7, 24 +401034ad: 0127a6 blti a7, 2, 401034b2 +401034b0: 070d mov.n a0, a7 +401034b2: f6cea2 addi a10, a14, -10 +401034b5: 312020 srai a2, a2, 16 +401034b8: d129 s32i.n a2, a1, 52 +401034ba: f53a56 bnez a10, 40103411 +401034bd: c108 l32i.n a0, a1, 48 +401034bf: 61c8 l32i.n a12, a1, 24 +401034c1: 000002 l8ui a0, a0, 0 +401034c4: 91f8 l32i.n a15, a1, 36 +401034c6: 1130f0 slli a3, a0, 1 +401034c9: 1fad37 bge a13, a3, 401034ec +401034cc: ce9c beqz.n a14, 401034ec +401034ce: d020d0 subx2 a2, a0, a13 +401034d1: 321b addi.n a3, a2, 1 +401034d3: 222b addi.n a2, a2, 2 +401034d5: b32330 movgez a2, a3, a3 +401034d8: 212120 srai a2, a2, 1 +401034db: 112200 slli a2, a2, 16 +401034de: 312020 srai a2, a2, 16 +401034e1: 71d8 l32i.n a13, a1, 28 +401034e3: 81e8 l32i.n a14, a1, 32 +401034e5: 5108 l32i.n a0, a1, 20 +401034e7: 40c112 addi a1, a1, 64 +401034ea: f00d ret.n +401034ec: 020c movi.n a2, 0 +401034ee: fffbc6 j 401034e1 +401034f1: 000000 ill + +401034f4 : +401034f4: 160c movi.n a6, 1 +401034f6: 530b addi.n a5, a3, -1 +401034f8: f0c112 addi a1, a1, -16 +401034fb: 0109 s32i.n a0, a1, 0 +401034fd: 401500 ssl a5 +40103500: 020d mov.n a0, a2 +40103502: a14600 sll a4, a6 +40103505: 0e2247 blt a2, a4, 40103517 +40103508: 401300 ssl a3 +4010350b: a10600 sll a0, a6 +4010350e: c00200 sub a0, a2, a0 +40103511: 110000 slli a0, a0, 16 +40103514: 310000 srai a0, a0, 16 +40103517: 002d mov.n a2, a0 +40103519: 0108 l32i.n a0, a1, 0 +4010351b: 10c112 addi a1, a1, 16 +4010351e: f00d ret.n +40103520: 009600 excw +40103523: fe0060 excw +40103526: ff3ff1 l32r a15, 40103224 +40103529: 7f .byte 0x7f +4010352a: c40000 extui a0, a0, 0, 13 +4010352d: fe8b addi.n a15, a14, 8 +4010352f: 3f .byte 0x3f + +40103530 : +40103530: f0c112 addi a1, a1, -16 +40103533: 0109 s32i.n a0, a1, 0 +40103535: 11c9 s32i.n a12, a1, 4 +40103537: fffb21 l32r a2, 40103524 +4010353a: fff9c1 l32r a12, 40103520 +4010353d: f00c movi.n a0, 15 +4010353f: 0020c0 memw +40103542: 8f2222 l32i a2, a2, 0x23c +40103545: 352020 extui a2, a2, 16, 4 +40103548: 2a82f6 bgeui a2, 8, 40103576 +4010354b: 0020c0 memw +4010354e: 802c22 l32i a2, a12, 0x200 +40103551: 1b6207 bbci a2, 0, 40103570 +40103554: 742820 extui a2, a2, 8, 8 +40103557: 830c movi.n a3, 8 +40103559: fff985 call0 401034f4 +4010355c: f00c movi.n a0, 15 +4010355e: 6ba032 movi a3, 107 +40103561: d12230 mul16s a2, a2, a3 +40103564: 212620 srai a2, a2, 6 +40103567: 112200 slli a2, a2, 16 +4010356a: 312020 srai a2, a2, 16 +4010356d: 000206 j 40103579 +40103570: ffee21 l32r a2, 40103528 +40103573: 000086 j 40103579 +40103576: ffec21 l32r a2, 40103528 +40103579: 0020c0 memw +4010357c: b72c52 l32i a5, a12, 0x2dc +4010357f: 205500 or a5, a5, a0 +40103582: 0020c0 memw +40103585: ffe941 l32r a4, 4010352c +40103588: b76c52 s32i a5, a12, 0x2dc +4010358b: 0108 l32i.n a0, a1, 0 +4010358d: 11c8 l32i.n a12, a1, 4 +4010358f: 10c112 addi a1, a1, 16 +40103592: 055422 s16i a2, a4, 10 +40103595: f00d ret.n +40103597: 0a0000 excw +4010359a: 686000 excw +4010359d: e690a5 excw +401035a0: b4d027 bbs a0, a2, 40103558 +401035a3: ea .byte 0xea + +401035a4 : +401035a4: ff1721 l32r a2, 40103200 +401035a7: 180c movi.n a8, 1 +401035a9: fffb51 l32r a5, 40103598 +401035ac: 0020c0 memw +401035af: d22572 l32i a7, a5, 0x348 +401035b2: 207780 or a7, a7, a8 +401035b5: 0020c0 memw +401035b8: d26572 s32i a7, a5, 0x348 +401035bb: e67c movi.n a6, -2 +401035bd: 0020c0 memw +401035c0: d22542 l32i a4, a5, 0x348 +401035c3: 104460 and a4, a4, a6 +401035c6: 0020c0 memw +401035c9: d26542 s32i a4, a5, 0x348 +401035cc: ff5131 l32r a3, 40103310 +401035cf: 0020c0 memw +401035d2: 962332 l32i a3, a3, 0x258 +401035d5: a40c movi.n a4, 10 +401035d7: 343c30 extui a3, a3, 12, 4 +401035da: 103340 and a3, a3, a4 +401035dd: 0b9366 bnei a3, 10, 401035ec +401035e0: ffef91 l32r a9, 4010359c +401035e3: 0020c0 memw +401035e6: dd6292 s32i a9, a2, 0x374 +401035e9: 000206 j 401035f5 +401035ec: ffeda1 l32r a10, 401035a0 +401035ef: 0020c0 memw +401035f2: dd62a2 s32i a10, a2, 0x374 +401035f5: ffca21 l32r a2, 40103520 +401035f8: 0020c0 memw +401035fb: 802222 l32i a2, a2, 0x200 +401035fe: c52020 extui a2, a2, 16, 13 +40103601: f00d ret.n + ... + +40103604 : +40103604: f0c112 addi a1, a1, -16 +40103607: 006102 s32i a0, a1, 0 +4010360a: f83c01 l32r a0, 401016fc +4010360d: 0000c0 callx0 a0 +40103610: fff905 call0 401035a4 +40103613: fcc845 call0 40100298 +40103616: 002102 l32i a0, a1, 0 +40103619: 10c112 addi a1, a1, 16 +4010361c: 000080 ret +4010361f: 8bd400 excw +40103622: fe .byte 0xfe +40103623: 3f .byte 0x3f + +40103624 : +40103624: 01a172 movi a7, 0x101 +40103627: f86b51 l32r a5, 401017d4 +4010362a: 0020c0 memw +4010362d: 5b6572 s32i a7, a5, 0x16c +40103630: f3dd61 l32r a6, 401005a4 +40103633: 0020c0 memw +40103636: 5b2542 l32i a4, a5, 0x16c +40103639: 204460 or a4, a4, a6 +4010363c: 0020c0 memw +4010363f: 5b6542 s32i a4, a5, 0x16c +40103642: fff731 l32r a3, 40103620 +40103645: 120c movi.n a2, 1 +40103647: 014322 s8i a2, a3, 1 +4010364a: f00d ret.n +4010364c: ff .byte 0xff +4010364d: ff .byte 0xff +4010364e: ff .byte 0xff +4010364f: 0f .byte 0xf +40103650: 8b28 l32i.n a2, a11, 32 +40103652: fe .byte 0xfe +40103653: 3f .byte 0x3f +40103654: fe84d0 excw +40103657: 3f .byte 0x3f + +40103658 : +40103658: fff231 l32r a3, 40103620 +4010365b: f0c112 addi a1, a1, -16 +4010365e: 21d9 s32i.n a13, a1, 8 +40103660: 11c9 s32i.n a12, a1, 4 +40103662: 0109 s32i.n a0, a1, 0 +40103664: 02cd mov.n a12, a2 +40103666: 010302 l8ui a0, a3, 1 +40103669: f85ad1 l32r a13, 401017d4 +4010366c: 90dc bnez.n a0, 40103689 +4010366e: 01a152 movi a5, 0x101 +40103671: 0020c0 memw +40103674: 5b6d52 s32i a5, a13, 0x16c +40103677: f3cb41 l32r a4, 401005a4 +4010367a: 0020c0 memw +4010367d: 5b2d22 l32i a2, a13, 0x16c +40103680: 202240 or a2, a2, a4 +40103683: 0020c0 memw +40103686: 5b6d22 s32i a2, a13, 0x16c +40103689: a20c movi.n a2, 10 +4010368b: f43d01 l32r a0, 40100780 +4010368e: 0000c0 callx0 a0 +40103691: ffe301 l32r a0, 40103620 +40103694: 0020c0 memw +40103697: 5c2d62 l32i a6, a13, 0x170 +4010369a: 008696 bltz a6, 401036a6 +4010369d: 0020c0 memw +401036a0: 5c2d72 l32i a7, a13, 0x170 +401036a3: ff67d6 bgez a7, 4010369d +401036a6: ffe941 l32r a4, 4010364c +401036a9: 0020c0 memw +401036ac: 5c2d22 l32i a2, a13, 0x170 +401036af: 080c movi.n a8, 0 +401036b1: ffe731 l32r a3, 40103650 +401036b4: 014082 s8i a8, a0, 1 +401036b7: 000332 l8ui a3, a3, 0 +401036ba: 102240 and a2, a2, a4 +401036bd: 0c33f6 bgeui a3, 3, 401036cd +401036c0: ffe541 l32r a4, 40103654 +401036c3: 1133e0 slli a3, a3, 2 +401036c6: 334a add.n a3, a3, a4 +401036c8: 0338 l32i.n a3, a3, 0 +401036ca: 000046 j 401036cf +401036cd: 832c movi.n a3, 40 +401036cf: 1122c0 slli a2, a2, 4 +401036d2: f40f01 l32r a0, 40100710 +401036d5: 0000c0 callx0 a0 +401036d8: 21d8 l32i.n a13, a1, 8 +401036da: 12ac beqz.n a2, 401036ff +401036dc: 1c08 l32i.n a0, a12, 4 +401036de: b09c beqz.n a0, 401036fd +401036e0: ffa152 movi a5, 0x1ff +401036e3: 05b027 bgeu a0, a2, 401036ec +401036e6: c03200 sub a3, a2, a0 +401036e9: 000086 j 401036ef +401036ec: c03020 sub a3, a0, a2 +401036ef: 0c3537 bltu a5, a3, 401036ff +401036f2: a03220 addx4 a3, a2, a2 +401036f5: 902000 addx2 a2, a0, a0 +401036f8: 223a add.n a2, a2, a3 +401036fa: 412320 srli a2, a2, 3 +401036fd: 1c29 s32i.n a2, a12, 4 +401036ff: 11c8 l32i.n a12, a1, 4 +40103701: 0108 l32i.n a0, a1, 0 +40103703: 10c112 addi a1, a1, 16 +40103706: f00d ret.n +40103708: 8b98 l32i.n a9, a11, 32 +4010370a: fe .byte 0xfe +4010370b: 3f .byte 0x3f +4010370c: 8b99 s32i.n a9, a11, 32 +4010370e: fe .byte 0xfe +4010370f: 3f .byte 0x3f +40103710: ff .byte 0xff +40103711: ff .byte 0xff +40103712: fffff0 excw +40103715: cf .byte 0xcf +40103716: ff .byte 0xff +40103717: ff .byte 0xff +40103718: 21d3b4 excw +4010371b: 40 .byte 0x40 + +4010371c : +4010371c: ffc141 l32r a4, 40103620 +4010371f: f0c112 addi a1, a1, -16 +40103722: 2109 s32i.n a0, a1, 8 +40103724: 011462 l16ui a6, a4, 2 +40103727: 0169 s32i.n a6, a1, 0 +40103729: fe1d51 l32r a5, 40102fa0 +4010372c: fef901 l32r a0, 40103310 +4010372f: 0020c0 memw +40103732: 962032 l32i a3, a0, 0x258 +40103735: 103350 and a3, a3, a5 +40103738: 413f30 srli a3, a3, 15 +4010373b: 1139 s32i.n a3, a1, 4 +4010373d: 0b1226 beqi a2, 1, 4010374c +40103740: 082226 beqi a2, 2, 4010374c +40103743: 120c movi.n a2, 1 +40103745: 2108 l32i.n a0, a1, 8 +40103747: 10c112 addi a1, a1, 16 +4010374a: f00d ret.n +4010374c: fff301 l32r a0, 40103718 +4010374f: 0000c0 callx0 a0 +40103752: feef41 l32r a4, 40103310 +40103755: ffec81 l32r a8, 40103708 +40103758: ffb201 l32r a0, 40103620 +4010375b: 000882 l8ui a8, a8, 0 +4010375e: 000072 l8ui a7, a0, 0 +40103761: 054022 s8i a2, a0, 5 +40103764: 107780 and a7, a7, a8 +40103767: 207270 or a7, a2, a7 +4010376a: 044072 s8i a7, a0, 4 +4010376d: 747070 extui a7, a7, 0, 8 +40103770: fcf756 bnez a7, 40103743 +40103773: fb7c movi.n a11, -1 +40103775: ffe661 l32r a6, 40103710 +40103778: ffe531 l32r a3, 4010370c +4010377b: 120c movi.n a2, 1 +4010377d: 004322 s8i a2, a3, 0 +40103780: ffe571 l32r a7, 40103714 +40103783: c0afa2 movi a10, -64 +40103786: fee521 l32r a2, 4010331c +40103789: 0020c0 memw +4010378c: 1198 l32i.n a9, a1, 4 +4010378e: 4962b2 s32i a11, a2, 0x124 +40103791: 461966 bnei a9, 1, 401037db +40103794: 0188 l32i.n a8, a1, 0 +40103796: 345080 extui a5, a8, 0, 4 +40103799: 115500 slli a5, a5, 16 +4010379c: 0020c0 memw +4010379f: 822432 l32i a3, a4, 0x208 +401037a2: 103360 and a3, a3, a6 +401037a5: 203350 or a3, a3, a5 +401037a8: 0020c0 memw +401037ab: 826432 s32i a3, a4, 0x208 +401037ae: 14b480 extui a11, a8, 4, 2 +401037b1: 11bb40 slli a11, a11, 12 +401037b4: 0020c0 memw +401037b7: 822492 l32i a9, a4, 0x208 +401037ba: 109970 and a9, a9, a7 +401037bd: 2099b0 or a9, a9, a11 +401037c0: 0020c0 memw +401037c3: 826492 s32i a9, a4, 0x208 +401037c6: 548680 extui a8, a8, 6, 6 +401037c9: 0020c0 memw +401037cc: 872452 l32i a5, a4, 0x21c +401037cf: 1055a0 and a5, a5, a10 +401037d2: 205580 or a5, a5, a8 +401037d5: 0020c0 memw +401037d8: 876452 s32i a5, a4, 0x21c +401037db: ff6f91 l32r a9, 40103598 +401037de: f36181 l32r a8, 40100564 +401037e1: 0020c0 memw +401037e4: 422252 l32i a5, a2, 0x108 +401037e7: 205580 or a5, a5, a8 +401037ea: 0020c0 memw +401037ed: 426252 s32i a5, a2, 0x108 +401037f0: 8b0c movi.n a11, 8 +401037f2: 337c movi.n a3, -13 +401037f4: 0020c0 memw +401037f7: d02982 l32i a8, a9, 0x340 +401037fa: 108830 and a8, a8, a3 +401037fd: 2088b0 or a8, a8, a11 +40103800: 0020c0 memw +40103803: 64a052 movi a5, 100 +40103806: d06982 s32i a8, a9, 0x340 +40103809: 1198 l32i.n a9, a1, 4 +4010380b: 550b addi.n a5, a5, -1 +4010380d: fa0566 bnei a5, -1, 4010380b +40103810: 511966 bnei a9, 1, 40103865 +40103813: 0020c0 memw +40103816: 4a22b2 l32i a11, a2, 0x128 +40103819: 14b0b0 extui a11, a11, 0, 2 +4010381c: abcc bnez.n a11, 4010382a +4010381e: 0020c0 memw +40103821: 4a2232 l32i a3, a2, 0x128 +40103824: 143030 extui a3, a3, 0, 2 +40103827: ff3316 beqz a3, 4010381e +4010382a: 0020c0 memw +4010382d: 822432 l32i a3, a4, 0x208 +40103830: 103360 and a3, a3, a6 +40103833: 0020c0 memw +40103836: 826432 s32i a3, a4, 0x208 +40103839: 0020c0 memw +4010383c: 8224b2 l32i a11, a4, 0x208 +4010383f: 10bb70 and a11, a11, a7 +40103842: 0020c0 memw +40103845: 8264b2 s32i a11, a4, 0x208 +40103848: 0020c0 memw +4010384b: 872492 l32i a9, a4, 0x21c +4010384e: 1099a0 and a9, a9, a10 +40103851: 0020c0 memw +40103854: 876492 s32i a9, a4, 0x21c +40103857: 280c movi.n a8, 2 +40103859: 0020c0 memw +4010385c: 4a2252 l32i a5, a2, 0x128 +4010385f: 105580 and a5, a5, a8 +40103862: 064052 s8i a5, a0, 6 +40103865: 020c movi.n a2, 0 +40103867: ffb686 j 40103745 +4010386a: ff0000 excw +4010386d: ff .byte 0xff +4010386e: 3f .byte 0x3f +4010386f: ff .byte 0xff +40103870: 218374 excw +40103873: d38040 excw +40103876: e04021 l32r a2, 400fb978 <__floatsidf+0xed688> +40103879: 4021d2 l32i a13, a1, 0x100 +4010387c: d32c movi.n a3, 45 +4010387e: 384021 l32r a2, 400d1980 <__floatsidf+0xc3690> +40103881: 4021d6 bgez a1, 40103c87 +40103884: 21d4c4 excw +40103887: d5e040 extui a14, a4, 16, 14 +4010388a: 21 .byte 0x21 +4010388b: 40 .byte 0x40 + +4010388c : +4010388c: 030c movi.n a3, 0 +4010388e: f0c112 addi a1, a1, -16 +40103891: 11c9 s32i.n a12, a1, 4 +40103893: 0109 s32i.n a0, a1, 0 +40103895: 02cd mov.n a12, a2 +40103897: ff6201 l32r a0, 40103620 +4010389a: 120c movi.n a2, 1 +4010389c: 074022 s8i a2, a0, 7 +4010389f: fff401 l32r a0, 40103870 +401038a2: 0000c0 callx0 a0 +401038a5: fb3641 l32r a4, 40102580 +401038a8: fe5631 l32r a3, 40103200 +401038ab: 0020c0 memw +401038ae: 422322 l32i a2, a3, 0x108 +401038b1: 202240 or a2, a2, a4 +401038b4: 0020c0 memw +401038b7: 426322 s32i a2, a3, 0x108 +401038ba: ffee01 l32r a0, 40103874 +401038bd: 0000c0 callx0 a0 +401038c0: 234c26 beqi a12, 4, 401038e7 +401038c3: fe9761 l32r a6, 40103320 +401038c6: 150c movi.n a5, 1 +401038c8: 004652 s8i a5, a6, 0 +401038cb: 0a1c66 bnei a12, 1, 401038d9 +401038ce: 0c2d mov.n a2, a12 +401038d0: ffea01 l32r a0, 40103878 +401038d3: 0000c0 callx0 a0 +401038d6: 000346 j 401038e7 +401038d9: 022c26 beqi a12, 2, 401038df +401038dc: 078c66 bnei a12, 8, 401038e7 +401038df: 0c2d mov.n a2, a12 +401038e1: ffe601 l32r a0, 4010387c +401038e4: 0000c0 callx0 a0 +401038e7: f32861 l32r a6, 40100588 +401038ea: 250c movi.n a5, 2 +401038ec: fe2081 l32r a8, 4010316c +401038ef: 0020c0 memw +401038f2: 852842 l32i a4, a8, 0x214 +401038f5: 104460 and a4, a4, a6 +401038f8: 204450 or a4, a4, a5 +401038fb: 0020c0 memw +401038fe: 856842 s32i a4, a8, 0x214 +40103901: fab531 l32r a3, 401023d8 +40103904: 0020c0 memw +40103907: 852822 l32i a2, a8, 0x214 +4010390a: 102230 and a2, a2, a3 +4010390d: 0020c0 memw +40103910: 856822 s32i a2, a8, 0x214 +40103913: f32401 l32r a0, 401005a4 +40103916: 0020c0 memw +40103919: 8528b2 l32i a11, a8, 0x214 +4010391c: 20bb00 or a11, a11, a0 +4010391f: 0020c0 memw +40103922: 8568b2 s32i a11, a8, 0x214 +40103925: ffd1a1 l32r a10, 4010386c +40103928: f31291 l32r a9, 40100570 +4010392b: 0020c0 memw +4010392e: 9d2872 l32i a7, a8, 0x274 +40103931: 1077a0 and a7, a7, a10 +40103934: 207790 or a7, a7, a9 +40103937: 0020c0 memw +4010393a: 9d6872 s32i a7, a8, 0x274 +4010393d: ffd001 l32r a0, 40103880 +40103940: 0000c0 callx0 a0 +40103943: ffd001 l32r a0, 40103884 +40103946: 0000c0 callx0 a0 +40103949: ffcf01 l32r a0, 40103888 +4010394c: 0000c0 callx0 a0 +4010394f: fe7151 l32r a5, 40103314 +40103952: fe6f01 l32r a0, 40103310 +40103955: 598c66 bnei a12, 8, 401039b2 +40103958: ff3e71 l32r a7, 40103650 +4010395b: 470772 l8ui a7, a7, 71 +4010395e: ffa082 movi a8, 255 +40103961: 3e9787 bne a7, a8, 401039a3 +40103964: f79c31 l32r a3, 401017d4 +40103967: 0020c0 memw +4010396a: e52322 l32i a2, a3, 0x394 +4010396d: 140c movi.n a4, 1 +4010396f: 202240 or a2, a2, a4 +40103972: 0020c0 memw +40103975: 240c movi.n a4, 2 +40103977: fe0101 l32r a0, 4010317c +4010397a: e56322 s32i a2, a3, 0x394 +4010397d: 0008 l32i.n a0, a0, 0 +4010397f: 620c movi.n a2, 6 +40103981: 2b2002 l32i a0, a0, 172 +40103984: 130c movi.n a3, 1 +40103986: 0000c0 callx0 a0 +40103989: e87c movi.n a8, -2 +4010398b: fe6251 l32r a5, 40103314 +4010398e: fe6001 l32r a0, 40103310 +40103991: 0020c0 memw +40103994: f79071 l32r a7, 401017d4 +40103997: e52762 l32i a6, a7, 0x394 +4010399a: 106680 and a6, a6, a8 +4010399d: 0020c0 memw +401039a0: e56762 s32i a6, a7, 0x394 +401039a3: 0020c0 memw +401039a6: 862092 l32i a9, a0, 0x218 +401039a9: 109950 and a9, a9, a5 +401039ac: 0020c0 memw +401039af: 866092 s32i a9, a0, 0x218 +401039b2: 022c26 beqi a12, 2, 401039b8 +401039b5: 0e1c66 bnei a12, 1, 401039c7 +401039b8: 0020c0 memw +401039bb: 8620a2 l32i a10, a0, 0x218 +401039be: 10aa50 and a10, a10, a5 +401039c1: 0020c0 memw +401039c4: 8660a2 s32i a10, a0, 0x218 +401039c7: 11c8 l32i.n a12, a1, 4 +401039c9: 0108 l32i.n a0, a1, 0 +401039cb: 10c112 addi a1, a1, 16 +401039ce: f00d ret.n + +401039d0 : +401039d0: fe5041 l32r a4, 40103310 +401039d3: 129c beqz.n a2, 401039e8 +401039d5: 767c movi.n a6, -9 +401039d7: 0020c0 memw +401039da: 862452 l32i a5, a4, 0x218 +401039dd: 105560 and a5, a5, a6 +401039e0: 0020c0 memw +401039e3: 866452 s32i a5, a4, 0x218 +401039e6: f00d ret.n +401039e8: 830c movi.n a3, 8 +401039ea: 0020c0 memw +401039ed: 862422 l32i a2, a4, 0x218 +401039f0: 202230 or a2, a2, a3 +401039f3: 0020c0 memw +401039f6: 866422 s32i a2, a4, 0x218 +401039f9: f00d ret.n +401039fb: 8eb800 excw +401039fe: fe .byte 0xfe +401039ff: 3f .byte 0x3f +40103a00: ffff71 l32r a7, 401039fc +40103a03: 1182b0 slli a8, a2, 5 +40103a06: 878a add.n a8, a7, a8 +40103a08: 264832 s8i a3, a8, 38 +40103a0b: 321b addi.n a3, a2, 1 +40103a0d: 1133b0 slli a3, a3, 5 +40103a10: 373a add.n a3, a7, a3 +40103a12: 254842 s8i a4, a8, 37 +40103a15: 040c movi.n a4, 0 +40103a17: a06670 addx4 a6, a6, a7 +40103a1a: 084342 s8i a4, a3, 8 +40103a1d: 130c movi.n a3, 1 +40103a1f: 401200 ssl a2 +40103a22: a12300 sll a2, a3 +40103a25: 1638 l32i.n a3, a6, 4 +40103a27: 244852 s8i a5, a8, 36 +40103a2a: 203320 or a3, a3, a2 +40103a2d: 1639 s32i.n a3, a6, 4 +40103a2f: 0738 l32i.n a3, a7, 0 +40103a31: 202320 or a2, a3, a2 +40103a34: 0729 s32i.n a2, a7, 0 +40103a36: f00d ret.n +40103a38: fff171 l32r a7, 401039fc +40103a3b: 056d mov.n a6, a5 +40103a3d: a05570 addx4 a5, a5, a7 +40103a40: f0c112 addi a1, a1, -16 +40103a43: 15a8 l32i.n a10, a5, 4 +40103a45: 3109 s32i.n a0, a1, 12 +40103a47: 21c9 s32i.n a12, a1, 8 +40103a49: 11d9 s32i.n a13, a1, 4 +40103a4b: 0788 l32i.n a8, a7, 0 +40103a4d: 079d mov.n a9, a7 +40103a4f: fb7c movi.n a11, -1 +40103a51: 170c movi.n a7, 1 +40103a53: daec bnez.n a10, 40103a84 +40103a55: 596a add.n a5, a9, a6 +40103a57: 1405c2 l8ui a12, a5, 20 +40103a5a: 4ed8c7 bbs a8, a12, 40103aac +40103a5d: 045d mov.n a5, a4 +40103a5f: 034d mov.n a4, a3 +40103a61: 023d mov.n a3, a2 +40103a63: 0c2d mov.n a2, a12 +40103a65: fff985 call0 40103a00 +40103a68: 003006 j 40103b2c +40103a6b: b00000 addx8 a0, a0, a0 +40103a6e: 115c movi.n a1, 81 +40103a70: d95a add.n a13, a9, a5 +40103a72: 240dd2 l8ui a13, a13, 36 +40103a75: 201d47 beq a13, a4, 40103a99 +40103a78: 401c00 ssl a12 +40103a7b: a1c700 sll a12, a7 +40103a7e: 30cbc0 xor a12, a11, a12 +40103a81: 10aac0 and a10, a10, a12 +40103a84: 60c0a0 neg a12, a10 +40103a87: 10cca0 and a12, a12, a10 +40103a8a: 40fcc0 nsau a12, a12 +40103a8d: 60c0c0 neg a12, a12 +40103a90: 1fccc2 addi a12, a12, 31 +40103a93: d60c66 bnei a12, -1, 40103a6d +40103a96: 000486 j 40103aac +40103a99: d95a add.n a13, a9, a5 +40103a9b: 250dd2 l8ui a13, a13, 37 +40103a9e: d69d37 bne a13, a3, 40103a78 +40103aa1: 595a add.n a5, a9, a5 +40103aa3: 260552 l8ui a5, a5, 38 +40103aa6: ce9527 bne a5, a2, 40103a78 +40103aa9: 001f06 j 40103b29 +40103aac: 350c movi.n a5, 3 +40103aae: ffa072 movi a7, 255 +40103ab1: 205850 or a5, a8, a5 +40103ab4: 305570 xor a5, a5, a7 +40103ab7: 796a add.n a7, a9, a6 +40103ab9: 140792 l8ui a9, a7, 20 +40103abc: 170c movi.n a7, 1 +40103abe: 401900 ssl a9 +40103ac1: a17700 sll a7, a7 +40103ac4: 770b addi.n a7, a7, -1 +40103ac6: 107750 and a7, a7, a5 +40103ac9: 30c570 xor a12, a5, a7 +40103acc: f91c movi.n a9, 31 +40103ace: 40f770 nsau a7, a7 +40103ad1: c05970 sub a5, a9, a7 +40103ad4: 0a0566 bnei a5, -1, 40103ae2 +40103ad7: 40fc50 nsau a5, a12 +40103ada: c05950 sub a5, a9, a5 +40103add: 8c0c movi.n a12, 8 +40103adf: 490526 beqi a5, -1, 40103b2c +40103ae2: 170c movi.n a7, 1 +40103ae4: 401500 ssl a5 +40103ae7: a17700 sll a7, a7 +40103aea: 770b addi.n a7, a7, -1 +40103aec: 107780 and a7, a7, a8 +40103aef: 308870 xor a8, a8, a7 +40103af2: fc1c movi.n a12, 31 +40103af4: 40f770 nsau a7, a7 +40103af7: c07c70 sub a7, a12, a7 +40103afa: 0b0726 beqi a7, -1, 40103b09 +40103afd: c51b addi.n a12, a5, 1 +40103aff: cc7a add.n a12, a12, a7 +40103b01: 21c1c0 srai a12, a12, 1 +40103b04: 000586 j 40103b1e +40103b07: 800000 add a0, a0, a0 +40103b0a: 40f8 l32i.n a15, a0, 16 +40103b0c: c0cc80 sub a12, a12, a8 +40103b0f: 06c552 addi a5, a5, 6 +40103b12: 80cc50 add a12, a12, a5 +40103b15: 21c1c0 srai a12, a12, 1 +40103b18: 028ca6 blti a12, 8, 40103b1e +40103b1b: faccc2 addi a12, a12, -6 +40103b1e: 045d mov.n a5, a4 +40103b20: 034d mov.n a4, a3 +40103b22: 023d mov.n a3, a2 +40103b24: 0c2d mov.n a2, a12 +40103b26: ffed85 call0 40103a00 +40103b29: 74c0c0 extui a12, a12, 0, 8 +40103b2c: 3108 l32i.n a0, a1, 12 +40103b2e: 0c2d mov.n a2, a12 +40103b30: 11d8 l32i.n a13, a1, 4 +40103b32: 21c8 l32i.n a12, a1, 8 +40103b34: 10c112 addi a1, a1, 16 +40103b37: f00d ret.n +40103b39: 000000 ill +40103b3c: d0c112 addi a1, a1, -48 +40103b3f: 91d9 s32i.n a13, a1, 36 +40103b41: ffaed1 l32r a13, 401039fc +40103b44: 81e9 s32i.n a14, a1, 32 +40103b46: 11e2b0 slli a14, a2, 5 +40103b49: a1c9 s32i.n a12, a1, 40 +40103b4b: b109 s32i.n a0, a1, 44 +40103b4d: 71f9 s32i.n a15, a1, 28 +40103b4f: 02cd mov.n a12, a2 +40103b51: 2dea add.n a2, a13, a14 +40103b53: 240232 l8ui a3, a2, 36 +40103b56: 039c beqz.n a3, 40103b6a +40103b58: 0e3326 beqi a3, 3, 40103b6a +40103b5b: 320c movi.n a2, 3 +40103b5d: 0b3327 bltu a3, a2, 40103b6c +40103b60: 120c movi.n a2, 1 +40103b62: 0663b6 bltui a3, 6, 40103b6c +40103b65: 020c movi.n a2, 0 +40103b67: 000046 j 40103b6c +40103b6a: 220c movi.n a2, 2 +40103b6c: 005a05 call0 40104110 +40103b6f: 0129 s32i.n a2, a1, 0 +40103b71: 2dea add.n a2, a13, a14 +40103b73: 210222 l8ui a2, a2, 33 +40103b76: 007216 beqz a2, 40103b81 +40103b79: 020c movi.n a2, 0 +40103b7b: 001086 j 40103bc1 +40103b7e: 000000 ill +40103b81: cc1b addi.n a12, a12, 1 +40103b83: 11ccb0 slli a12, a12, 5 +40103b86: cdca add.n a12, a13, a12 +40103b88: 3c28 l32i.n a2, a12, 12 +40103b8a: 10cef2 addi a15, a14, 16 +40103b8d: fdfa add.n a15, a13, a15 +40103b8f: e2ec bnez.n a2, 40103bc1 +40103b91: 2dea add.n a2, a13, a14 +40103b93: 62c8 l32i.n a12, a2, 24 +40103b95: fe0c16 beqz a12, 40103b79 +40103b98: 8c28 l32i.n a2, a12, 32 +40103b9a: 3dea add.n a3, a13, a14 +40103b9c: 6329 s32i.n a2, a3, 24 +40103b9e: 42cc bnez.n a2, 40103ba6 +40103ba0: 032d mov.n a2, a3 +40103ba2: 3f8b addi.n a3, a15, 8 +40103ba4: 7239 s32i.n a3, a2, 28 +40103ba6: 00a022 movi a2, 0 +40103ba9: 086c22 s32i a2, a12, 32 +40103bac: 0c2d mov.n a2, a12 +40103bae: 007785 call0 40104328 +40103bb1: a28c beqz.n a2, 40103bbf +40103bb3: 0128 l32i.n a2, a1, 0 +40103bb5: 040c movi.n a4, 0 +40103bb7: 0c3d mov.n a3, a12 +40103bb9: 0055c5 call0 40104118 +40103bbc: fff446 j 40103b91 +40103bbf: 0c2d mov.n a2, a12 +40103bc1: b108 l32i.n a0, a1, 44 +40103bc3: a1c8 l32i.n a12, a1, 40 +40103bc5: 91d8 l32i.n a13, a1, 36 +40103bc7: 81e8 l32i.n a14, a1, 32 +40103bc9: 71f8 l32i.n a15, a1, 28 +40103bcb: 30c112 addi a1, a1, 48 +40103bce: f00d ret.n +40103bd0: 08ed mov.n a14, a8 +40103bd2: a40000 extui a0, a0, 0, 11 +40103bd5: 3ffe87 bbsi a14, 24, 40103c18 +40103bd8: fe8630 excw +40103bdb: 3f .byte 0x3f + +40103bdc : +40103bdc: f0c112 addi a1, a1, -16 +40103bdf: 036102 s32i a0, a1, 12 +40103be2: 012256 bnez a2, 40103bf8 +40103be5: fffa41 l32r a4, 40103bd0 +40103be8: fffb31 l32r a3, 40103bd4 +40103beb: fffb21 l32r a2, 40103bd8 +40103bee: f16401 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40103bf1: 0000c0 callx0 a0 +40103bf4: ffff06 j 40103bf4 +40103bf7: 030c00 excw +40103bfa: 8239 s32i.n a3, a2, 32 +40103bfc: ff8031 l32r a3, 401039fc +40103bff: 3108 l32i.n a0, a1, 12 +40103c01: 4b2342 l32i a4, a3, 0x12c +40103c04: 10c112 addi a1, a1, 16 +40103c07: 0429 s32i.n a2, a4, 0 +40103c09: 20c222 addi a2, a2, 32 +40103c0c: 4b6322 s32i a2, a3, 0x12c +40103c0f: f00d ret.n +40103c11: 000000 ill + +40103c14 : +40103c14: 030c movi.n a3, 0 +40103c16: 8239 s32i.n a3, a2, 32 +40103c18: ff7931 l32r a3, 401039fc +40103c1b: 4d2342 l32i a4, a3, 0x134 +40103c1e: 0429 s32i.n a2, a4, 0 +40103c20: 20c222 addi a2, a2, 32 +40103c23: 4d6322 s32i a2, a3, 0x134 +40103c26: f00d ret.n +40103c28: fe9134 excw +40103c2b: 3f .byte 0x3f +40103c2c: fe8eb2 excw +40103c2f: 3f .byte 0x3f +40103c30: fe8eb3 excw +40103c33: 3f .byte 0x3f + +40103c34 : +40103c34: f0c112 addi a1, a1, -16 +40103c37: 21c9 s32i.n a12, a1, 8 +40103c39: 11d9 s32i.n a13, a1, 4 +40103c3b: 3109 s32i.n a0, a1, 12 +40103c3d: 02dd mov.n a13, a2 +40103c3f: 0061e2 s32i a14, a1, 0 +40103c42: f1be01 l32r a0, 4010033c +40103c45: 0000c0 callx0 a0 +40103c48: fff8c1 l32r a12, 40103c28 +40103c4b: 2cda add.n a2, a12, a13 +40103c4d: 000222 l8ui a2, a2, 0 +40103c50: a28c beqz.n a2, 40103c5e +40103c52: f79901 l32r a0, 40101ab8 +40103c55: 0000c0 callx0 a0 +40103c58: 020c movi.n a2, 0 +40103c5a: 001686 j 40103cb8 +40103c5d: 2cd000 excw +40103c60: a0e280 addx4 a14, a2, a8 +40103c63: 42e201 l32r a0, 400d47ec <__floatsidf+0xc64fc> +40103c66: 940100 extui a0, a0, 1, 10 +40103c69: 00c0f7 bnall a0, a15, 40103c6d +40103c6c: ad6600 excw +40103c6f: ef2105 call0 400f2e80 <__floatsidf+0xe4b90> +40103c72: ff .byte 0xff +40103c73: 0042e2 s8i a14, a2, 0 +40103c76: 040c movi.n a4, 0 +40103c78: 0d3d mov.n a3, a13 +40103c7a: 022c movi.n a2, 32 +40103c7c: f78801 l32r a0, 40101a9c +40103c7f: 0000c0 callx0 a0 +40103c82: 02ed mov.n a14, a2 +40103c84: 020c movi.n a2, 0 +40103c86: 2e1e27 beq a14, a2, 40103cb8 +40103c89: 202ee0 or a2, a14, a14 +40103c8c: 28ad66 bnei a13, 12, 40103cb8 +40103c8f: f1ab01 l32r a0, 4010033c +40103c92: 0000c0 callx0 a0 +40103c95: 0c0c22 l8ui a2, a12, 12 +40103c98: 030c movi.n a3, 0 +40103c9a: 220b addi.n a2, a2, -1 +40103c9c: 0c4c22 s8i a2, a12, 12 +40103c9f: ffe421 l32r a2, 40103c30 +40103ca2: 004232 s8i a3, a2, 0 +40103ca5: f24c21 l32r a2, 401005d8 +40103ca8: 73a032 movi a3, 115 +40103cab: 0020c0 memw +40103cae: 0239 s32i.n a3, a2, 0 +40103cb0: f78201 l32r a0, 40101ab8 +40103cb3: 0000c0 callx0 a0 +40103cb6: 0e2d mov.n a2, a14 +40103cb8: 3108 l32i.n a0, a1, 12 +40103cba: 21c8 l32i.n a12, a1, 8 +40103cbc: 11d8 l32i.n a13, a1, 4 +40103cbe: 01e8 l32i.n a14, a1, 0 +40103cc0: 10c112 addi a1, a1, 16 +40103cc3: f00d ret.n +40103cc5: 000000 ill +40103cc8: 806c movi.n a0, -24 +40103cca: fe .byte 0xfe +40103ccb: 3f .byte 0x3f + +40103ccc : +40103ccc: f0c112 addi a1, a1, -16 +40103ccf: ffd821 l32r a2, 40103c30 +40103cd2: 21c9 s32i.n a12, a1, 8 +40103cd4: 3109 s32i.n a0, a1, 12 +40103cd6: 11d9 s32i.n a13, a1, 4 +40103cd8: 000232 l8ui a3, a2, 0 +40103cdb: 02cd mov.n a12, a2 +40103cdd: f15021 l32r a2, 40100220 <_UserExceptionVector_1+0xc4> +40103ce0: 241366 bnei a3, 1, 40103d08 +40103ce3: 330c movi.n a3, 3 +40103ce5: 0020c0 memw +40103ce8: 0239 s32i.n a3, a2, 0 +40103cea: f19401 l32r a0, 4010033c +40103ced: 0000c0 callx0 a0 +40103cf0: f17921 l32r a2, 401002d4 +40103cf3: 0228 l32i.n a2, a2, 0 +40103cf5: f19201 l32r a0, 40100340 +40103cf8: 0000c0 callx0 a0 +40103cfb: fc59c5 call0 40100298 +40103cfe: f19101 l32r a0, 40100344 +40103d01: 0000c0 callx0 a0 +40103d04: 000646 j 40103d21 +40103d07: a0d200 addx4 a13, a2, a0 +40103d0a: 20c001 l32r a0, 400cc00c <__floatsidf+0xbdd1c> +40103d0d: 62d200 excw +40103d10: ed2100 excw +40103d13: ff .byte 0xff +40103d14: 0228 l32i.n a2, a2, 0 +40103d16: 013cc5 call0 401050e4 +40103d19: c20c movi.n a2, 12 +40103d1b: 004cd2 s8i a13, a12, 0 +40103d1e: fff145 call0 40103c34 +40103d21: 3108 l32i.n a0, a1, 12 +40103d23: 21c8 l32i.n a12, a1, 8 +40103d25: 11d8 l32i.n a13, a1, 4 +40103d27: 10c112 addi a1, a1, 16 +40103d2a: f00d ret.n +40103d2c: feaf42 movi a4, -2 +40103d2f: 401200 ssl a2 +40103d32: 812440 src a2, a4, a4 +40103d35: ff3141 l32r a4, 401039fc +40103d38: f0c112 addi a1, a1, -16 +40103d3b: a03340 addx4 a3, a3, a4 +40103d3e: 012352 l32i a5, a3, 4 +40103d41: 036102 s32i a0, a1, 12 +40103d44: 105520 and a5, a5, a2 +40103d47: 1359 s32i.n a5, a3, 4 +40103d49: 0438 l32i.n a3, a4, 0 +40103d4b: 102320 and a2, a3, a2 +40103d4e: 0429 s32i.n a2, a4, 0 +40103d50: 820c movi.n a2, 8 +40103d52: ffee05 call0 40103c34 +40103d55: 3108 l32i.n a0, a1, 12 +40103d57: 10c112 addi a1, a1, 16 +40103d5a: f00d ret.n + +40103d5c : +40103d5c: d0c112 addi a1, a1, -48 +40103d5f: b109 s32i.n a0, a1, 44 +40103d61: 81e9 s32i.n a14, a1, 32 +40103d63: a1c9 s32i.n a12, a1, 40 +40103d65: 91d9 s32i.n a13, a1, 36 +40103d67: 0761f2 s32i a15, a1, 28 +40103d6a: 74e020 extui a14, a2, 0, 8 +40103d6d: f17301 l32r a0, 4010033c +40103d70: 0000c0 callx0 a0 +40103d73: 0038c5 call0 40104100 +40103d76: b2cc bnez.n a2, 40103d85 +40103d78: f75001 l32r a0, 40101ab8 +40103d7b: 0000c0 callx0 a0 +40103d7e: f27c movi.n a2, -1 +40103d80: 006486 j 40103f16 +40103d83: c10000 mul16u a0, a0, a0 +40103d86: ff1d excw +40103d88: 11fee0 slli a15, a14, 2 +40103d8b: 802ce0 add a2, a12, a14 +40103d8e: 1402d2 l8ui a13, a2, 20 +40103d91: 802cf0 add a2, a12, a15 +40103d94: 012222 l32i a2, a2, 4 +40103d97: 7752d7 bbc a2, a13, 40103e12 +40103d9a: 2d1b addi.n a2, a13, 1 +40103d9c: 1132b0 slli a3, a2, 5 +40103d9f: 3c3a add.n a3, a12, a3 +40103da1: 080332 l8ui a3, a3, 8 +40103da4: 06a316 beqz a3, 40103e12 +40103da7: 1132b0 slli a3, a2, 5 +40103daa: 3c3a add.n a3, a12, a3 +40103dac: 040c movi.n a4, 0 +40103dae: 084342 s8i a4, a3, 8 +40103db1: 113db0 slli a3, a13, 5 +40103db4: 3c3a add.n a3, a12, a3 +40103db6: 6338 l32i.n a3, a3, 24 +40103db8: e3cc bnez.n a3, 40103dca +40103dba: 1122b0 slli a2, a2, 5 +40103dbd: 2c2a add.n a2, a12, a2 +40103dbf: 3228 l32i.n a2, a2, 12 +40103dc1: 52cc bnez.n a2, 40103dca +40103dc3: 0e3d mov.n a3, a14 +40103dc5: 0d2d mov.n a2, a13 +40103dc7: fff645 call0 40103d2c +40103dca: 2cfa add.n a2, a12, a15 +40103dcc: 1238 l32i.n a3, a2, 4 +40103dce: 040316 beqz a3, 40103e12 +40103dd1: 120c movi.n a2, 1 +40103dd3: 401d00 ssl a13 +40103dd6: a12200 sll a2, a2 +40103dd9: 420b addi.n a4, a2, -1 +40103ddb: 104430 and a4, a4, a3 +40103dde: f57c movi.n a5, -1 +40103de0: 302520 xor a2, a5, a2 +40103de3: 303340 xor a3, a3, a4 +40103de6: 103230 and a3, a2, a3 +40103de9: 602030 neg a2, a3 +40103dec: 102230 and a2, a2, a3 +40103def: 40f220 nsau a2, a2 +40103df2: 602020 neg a2, a2 +40103df5: 1fc222 addi a2, a2, 31 +40103df8: 119257 bne a2, a5, 40103e0d +40103dfb: 602040 neg a2, a4 +40103dfe: 102240 and a2, a2, a4 +40103e01: 40f220 nsau a2, a2 +40103e04: 602020 neg a2, a2 +40103e07: 1fc222 addi a2, a2, 31 +40103e0a: 040226 beqi a2, -1, 40103e12 +40103e0d: 3cea add.n a3, a12, a14 +40103e0f: 144322 s8i a2, a3, 20 +40103e12: 2cea add.n a2, a12, a14 +40103e14: 1402d2 l8ui a13, a2, 20 +40103e17: 9e9c beqz.n a14, 40103e34 +40103e19: fcfa add.n a15, a12, a15 +40103e1b: 120c movi.n a2, 1 +40103e1d: 1f38 l32i.n a3, a15, 4 +40103e1f: 401d00 ssl a13 +40103e22: a1f200 sll a15, a2 +40103e25: ff0b addi.n a15, a15, -1 +40103e27: 10ff30 and a15, a15, a3 +40103e2a: 3033f0 xor a3, a3, a15 +40103e2d: 024d mov.n a4, a2 +40103e2f: f57c movi.n a5, -1 +40103e31: 001246 j 40103e7e +40103e34: 012c22 l32i a2, a12, 4 +40103e37: 0d52d7 bbc a2, a13, 40103e48 +40103e3a: 01cd22 addi a2, a13, 1 +40103e3d: 1122b0 slli a2, a2, 5 +40103e40: 2c2a add.n a2, a12, a2 +40103e42: 080222 l8ui a2, a2, 8 +40103e45: d01226 beqi a2, 1, 40103e19 +40103e48: 020c movi.n a2, 0 +40103e4a: ffcf05 call0 40103b3c +40103e4d: 098256 bnez a2, 40103ee9 +40103e50: 120c movi.n a2, 1 +40103e52: ffce85 call0 40103b3c +40103e55: 090256 bnez a2, 40103ee9 +40103e58: ffef46 j 40103e19 +40103e5b: 2dd000 excw +40103e5e: 613220 excw +40103e61: 614201 l32r a0, 400dc36c <__floatsidf+0xce07c> +40103e64: 015902 s16i a0, a9, 2 +40103e67: ffcd45 call0 40103b3c +40103e6a: 1138 l32i.n a3, a1, 4 +40103e6c: 2148 l32i.n a4, a1, 8 +40103e6e: 0158 l32i.n a5, a1, 0 +40103e70: 42ec bnez.n a2, 40103e98 +40103e72: 401d00 ssl a13 +40103e75: a12400 sll a2, a4 +40103e78: 302520 xor a2, a5, a2 +40103e7b: 103320 and a3, a3, a2 +40103e7e: 602030 neg a2, a3 +40103e81: 102230 and a2, a2, a3 +40103e84: 40f220 nsau a2, a2 +40103e87: 602020 neg a2, a2 +40103e8a: 1fc2d2 addi a13, a2, 31 +40103e8d: cb0d66 bnei a13, -1, 40103e5c +40103e90: 130c movi.n a3, 1 +40103e92: f47c movi.n a4, -1 +40103e94: 000d06 j 40103ecc +40103e97: 3cea00 excw +40103e9a: 1443d2 s8i a13, a3, 20 +40103e9d: dd1b addi.n a13, a13, 1 +40103e9f: 11ddb0 slli a13, a13, 5 +40103ea2: dcda add.n a13, a12, a13 +40103ea4: 130c movi.n a3, 1 +40103ea6: 084d32 s8i a3, a13, 8 +40103ea9: 000f06 j 40103ee9 +40103eac: 2dd000 excw +40103eaf: 613220 excw +40103eb2: 614201 l32r a0, 400dc3bc <__floatsidf+0xce0cc> +40103eb5: c84502 s8i a0, a5, 200 +40103eb8: ff .byte 0xff +40103eb9: 1138 l32i.n a3, a1, 4 +40103ebb: 2148 l32i.n a4, a1, 8 +40103ebd: fd7256 bnez a2, 40103e98 +40103ec0: 401d00 ssl a13 +40103ec3: a12300 sll a2, a3 +40103ec6: 302420 xor a2, a4, a2 +40103ec9: 10ff20 and a15, a15, a2 +40103ecc: 6020f0 neg a2, a15 +40103ecf: 1022f0 and a2, a2, a15 +40103ed2: 40f220 nsau a2, a2 +40103ed5: 602020 neg a2, a2 +40103ed8: 1fc2d2 addi a13, a2, 31 +40103edb: ce0d66 bnei a13, -1, 40103ead +40103ede: f6f601 l32r a0, 40101ab8 +40103ee1: 0000c0 callx0 a0 +40103ee4: e27c movi.n a2, -2 +40103ee6: 000b06 j 40103f16 +40103ee9: 02dd mov.n a13, a2 +40103eeb: 9228 l32i.n a2, a2, 36 +40103eed: 0228 l32i.n a2, a2, 0 +40103eef: 1172d7 bbci a2, 29, 40103f04 +40103ef2: 5a2c22 l32i a2, a12, 0x168 +40103ef5: ffc222 addi a2, a2, -1 +40103ef8: 5a6c22 s32i a2, a12, 0x168 +40103efb: 592c22 l32i a2, a12, 0x164 +40103efe: 01c222 addi a2, a2, 1 +40103f01: 596c22 s32i a2, a12, 0x164 +40103f04: f6ed01 l32r a0, 40101ab8 +40103f07: 0000c0 callx0 a0 +40103f0a: 202dd0 or a2, a13, a13 +40103f0d: 203ee0 or a3, a14, a14 +40103f10: 004645 call0 40104378 +40103f13: 00a022 movi a2, 0 +40103f16: b108 l32i.n a0, a1, 44 +40103f18: a1c8 l32i.n a12, a1, 40 +40103f1a: 91d8 l32i.n a13, a1, 36 +40103f1c: 81e8 l32i.n a14, a1, 32 +40103f1e: 71f8 l32i.n a15, a1, 28 +40103f20: 30c112 addi a1, a1, 48 +40103f23: f00d ret.n +40103f25: 000000 ill + +40103f28 : +40103f28: f0c112 addi a1, a1, -16 +40103f2b: 036102 s32i a0, a1, 12 +40103f2e: 092232 l32i a3, a2, 36 +40103f31: 040c movi.n a4, 0 +40103f33: 4349 s32i.n a4, a3, 16 +40103f35: 440c movi.n a4, 4 +40103f37: 0f4342 s8i a4, a3, 15 +40103f3a: ffca05 call0 40103bdc +40103f3d: 420c movi.n a2, 4 +40103f3f: ffcf45 call0 40103c34 +40103f42: 3108 l32i.n a0, a1, 12 +40103f44: 10c112 addi a1, a1, 16 +40103f47: f00d ret.n +40103f49: 000000 ill +40103f4c: 8058 l32i.n a5, a0, 32 +40103f4e: fe .byte 0xfe +40103f4f: 3f .byte 0x3f + +40103f50 : +40103f50: 745020 extui a5, a2, 0, 8 +40103f53: fffe21 l32r a2, 40103f4c +40103f56: f0c112 addi a1, a1, -16 +40103f59: 0228 l32i.n a2, a2, 0 +40103f5b: 3109 s32i.n a0, a1, 12 +40103f5d: 0b0262 l8ui a6, a2, 11 +40103f60: f71c movi.n a7, 31 +40103f62: 120c movi.n a2, 1 +40103f64: 083767 bltu a7, a6, 40103f70 +40103f67: 202550 or a2, a5, a5 +40103f6a: f6cc01 l32r a0, 40101a9c +40103f6d: 0000c0 callx0 a0 +40103f70: 3108 l32i.n a0, a1, 12 +40103f72: 10c112 addi a1, a1, 16 +40103f75: f00d ret.n + ... + +40103f78 : +40103f78: e0c112 addi a1, a1, -32 +40103f7b: 41e9 s32i.n a14, a1, 16 +40103f7d: 742020 extui a2, a2, 0, 8 +40103f80: f4e030 extui a14, a3, 0, 16 +40103f83: fe9e31 l32r a3, 401039fc +40103f86: 61c9 s32i.n a12, a1, 24 +40103f88: 11c2b0 slli a12, a2, 5 +40103f8b: 51d9 s32i.n a13, a1, 20 +40103f8d: 31f9 s32i.n a15, a1, 12 +40103f8f: 23ca add.n a2, a3, a12 +40103f91: 7109 s32i.n a0, a1, 28 +40103f93: f4d040 extui a13, a4, 0, 16 +40103f96: 270242 l8ui a4, a2, 39 +40103f99: 03fd mov.n a15, a3 +40103f9b: 0e2d mov.n a2, a14 +40103f9d: f4fc bnez.n a4, 40103fe0 +40103f9f: f0e701 l32r a0, 4010033c +40103fa2: 0000c0 callx0 a0 +40103fa5: cfca add.n a12, a15, a12 +40103fa7: 6c28 l32i.n a2, a12, 24 +40103fa9: f16d51 l32r a5, 40100560 +40103fac: 828c beqz.n a2, 40103fb8 +40103fae: 9248 l32i.n a4, a2, 36 +40103fb0: 0438 l32i.n a3, a4, 0 +40103fb2: 413630 srli a3, a3, 6 +40103fb5: 0b0357 bnone a3, a5, 40103fc4 +40103fb8: f6c001 l32r a0, 40101ab8 +40103fbb: 0000c0 callx0 a0 +40103fbe: 0e2d mov.n a2, a14 +40103fc0: 000706 j 40103fe0 +40103fc3: 143200 extui a3, a0, 2, 2 +40103fc6: ee3a05 call0 400f2368 <__floatsidf+0xe4078> +40103fc9: f4e0e0 extui a14, a14, 0, 16 +40103fcc: 0a3ed7 bltu a14, a13, 40103fda +40103fcf: f6ba01 l32r a0, 40101ab8 +40103fd2: 0000c0 callx0 a0 +40103fd5: 0d2d mov.n a2, a13 +40103fd7: 000146 j 40103fe0 +40103fda: 8228 l32i.n a2, a2, 32 +40103fdc: fff306 j 40103fac +40103fdf: 710800 excw +40103fe2: 61c8 l32i.n a12, a1, 24 +40103fe4: 51d8 l32i.n a13, a1, 20 +40103fe6: 41e8 l32i.n a14, a1, 16 +40103fe8: 31f8 l32i.n a15, a1, 12 +40103fea: 20c112 addi a1, a1, 32 +40103fed: f00d ret.n +40103fef: ffff00 excw +40103ff2: 7f .byte 0x7f + ... + +40103ff4 : +40103ff4: f0c112 addi a1, a1, -16 +40103ff7: 11d9 s32i.n a13, a1, 4 +40103ff9: 3109 s32i.n a0, a1, 12 +40103ffb: 21c9 s32i.n a12, a1, 8 +40103ffd: 92c8 l32i.n a12, a2, 36 +40103fff: 02dd mov.n a13, a2 +40104001: 002c32 l32i a3, a12, 0 +40104004: 413630 srli a3, a3, 6 +40104007: 097337 bbci a3, 19, 40104014 +4010400a: 080c22 l8ui a2, a12, 8 +4010400d: 01e3c5 call0 40105e4c +40104010: 000386 j 40104022 +40104013: a44200 extui a4, a0, 2, 11 +40104016: 020c02 l8ui a0, a12, 2 +40104019: 088347 bany a3, a4, 40104025 +4010401c: 080c22 l8ui a2, a12, 8 +4010401f: 01da85 call0 40105dc8 +40104022: 842020 extui a2, a2, 0, 9 +40104025: 1c48 l32i.n a4, a12, 4 +40104027: fff231 l32r a3, 40103ff0 +4010402a: 012290 slli a2, a2, 23 +4010402d: 103430 and a3, a4, a3 +40104030: 202320 or a2, a3, a2 +40104033: 1c29 s32i.n a2, a12, 4 +40104035: 9dc8 l32i.n a12, a13, 36 +40104037: 0a1d22 l16ui a2, a13, 20 +4010403a: 0b1d32 l16ui a3, a13, 22 +4010403d: 1c48 l32i.n a4, a12, 4 +4010403f: 332a add.n a3, a3, a2 +40104041: 080c22 l8ui a2, a12, 8 +40104044: 854740 extui a4, a4, 23, 9 +40104047: f43030 extui a3, a3, 0, 16 +4010404a: 01d945 call0 40105de0 +4010404d: 3108 l32i.n a0, a1, 12 +4010404f: 055c22 s16i a2, a12, 10 +40104052: 11d8 l32i.n a13, a1, 4 +40104054: 21c8 l32i.n a12, a1, 8 +40104056: 10c112 addi a1, a1, 16 +40104059: f00d ret.n +4010405b: 917000 srl a7, a0 +4010405e: fe .byte 0xfe +4010405f: 3f .byte 0x3f +40104060: 916c movi.n a1, -23 +40104062: fe .byte 0xfe +40104063: 3f .byte 0x3f + +40104064 : +40104064: f0c112 addi a1, a1, -16 +40104067: 0261c2 s32i a12, a1, 8 +4010406a: 3109 s32i.n a0, a1, 12 +4010406c: 00a0c2 movi a12, 0 +4010406f: 2e8266 bnei a2, 8, 401040a1 +40104072: f0b201 l32r a0, 4010033c +40104075: 0000c0 callx0 a0 +40104078: fff921 l32r a2, 4010405c +4010407b: 42c8 l32i.n a12, a2, 16 +4010407d: 9ccc bnez.n a12, 4010408a +4010407f: f68e01 l32r a0, 40101ab8 +40104082: 0000c0 callx0 a0 +40104085: 000606 j 401040a1 +40104088: 380000 excw +4010408b: 398c beqz.n a9, 40104092 +4010408d: 020c42 l8ui a4, a12, 2 +40104090: 8c29 s32i.n a2, a12, 32 +40104092: f68901 l32r a0, 40101ab8 +40104095: 0000c0 callx0 a0 +40104098: fff231 l32r a3, 40104060 +4010409b: 0328 l32i.n a2, a3, 0 +4010409d: 220b addi.n a2, a2, -1 +4010409f: 0329 s32i.n a2, a3, 0 +401040a1: 3108 l32i.n a0, a1, 12 +401040a3: 0c2d mov.n a2, a12 +401040a5: 21c8 l32i.n a12, a1, 8 +401040a7: 10c112 addi a1, a1, 16 +401040aa: f00d ret.n +401040ac: 0008 l32i.n a0, a0, 0 +401040ae: f00040 subx8 a0, a0, a4 +401040b1: fe9a add.n a15, a14, a9 +401040b3: 3f .byte 0x3f +401040b4: f0c112 addi a1, a1, -16 +401040b7: 21c9 s32i.n a12, a1, 8 +401040b9: 11d9 s32i.n a13, a1, 4 +401040bb: 02cd mov.n a12, a2 +401040bd: 03dd mov.n a13, a3 +401040bf: 3109 s32i.n a0, a1, 12 +401040c1: ffb185 call0 40103bdc +401040c4: 9c38 l32i.n a3, a12, 36 +401040c6: 0328 l32i.n a2, a3, 0 +401040c8: 414620 srli a4, a2, 6 +401040cb: fff821 l32r a2, 401040ac +401040ce: 102420 and a2, a4, a2 +401040d1: 048266 bnei a2, 8, 401040d9 +401040d4: 7c28 l32i.n a2, a12, 28 +401040d6: 00ad45 call0 40104bac +401040d9: 04a022 movi a2, 4 +401040dc: ffb545 call0 40103c34 +401040df: 011d16 beqz a13, 401040f4 +401040e2: fff321 l32r a2, 401040b0 +401040e5: 0b0222 l8ui a2, a2, 11 +401040e8: 82cc bnez.n a2, 401040f4 +401040ea: 9c28 l32i.n a2, a12, 36 +401040ec: 1228 l32i.n a2, a2, 4 +401040ee: 252420 extui a2, a2, 20, 3 +401040f1: ffb405 call0 40103c34 +401040f4: 3108 l32i.n a0, a1, 12 +401040f6: 21c8 l32i.n a12, a1, 8 +401040f8: 11d8 l32i.n a13, a1, 4 +401040fa: 10c112 addi a1, a1, 16 +401040fd: f00d ret.n + ... + +40104100 : +40104100: ffec21 l32r a2, 401040b0 +40104103: 140c movi.n a4, 1 +40104105: 0b0232 l8ui a3, a2, 11 +40104108: 020c movi.n a2, 0 +4010410a: 832430 moveqz a2, a4, a3 +4010410d: f00d ret.n + ... + +40104110 : +40104110: ffe821 l32r a2, 401040b0 +40104113: f00d ret.n +40104115: 000000 ill + +40104118 : +40104118: f0c112 addi a1, a1, -16 +4010411b: 3109 s32i.n a0, a1, 12 +4010411d: 032d mov.n a2, a3 +4010411f: 9338 l32i.n a3, a3, 36 +40104121: 450c movi.n a5, 4 +40104123: 0f4352 s8i a5, a3, 15 +40104126: 743040 extui a3, a4, 0, 8 +40104129: fff885 call0 401040b4 +4010412c: 3108 l32i.n a0, a1, 12 +4010412e: 10c112 addi a1, a1, 16 +40104131: f00d ret.n + ... + +40104134 : +40104134: f0c112 addi a1, a1, -16 +40104137: 3109 s32i.n a0, a1, 12 +40104139: 032d mov.n a2, a3 +4010413b: 9338 l32i.n a3, a3, 36 +4010413d: 150c movi.n a5, 1 +4010413f: 0f4352 s8i a5, a3, 15 +40104142: 743040 extui a3, a4, 0, 8 +40104145: fff6c5 call0 401040b4 +40104148: 3108 l32i.n a0, a1, 12 +4010414a: 10c112 addi a1, a1, 16 +4010414d: f00d ret.n +4010414f: 87b600 excw +40104152: fe .byte 0xfe +40104153: 3f .byte 0x3f +40104154: fe8630 excw +40104157: 3f .byte 0x3f +40104158: 480000 excw + ... + +4010415c : +4010415c: 747020 extui a7, a2, 0, 8 +4010415f: ffd421 l32r a2, 401040b0 +40104162: f0c112 addi a1, a1, -16 +40104165: 0238 l32i.n a3, a2, 0 +40104167: 036102 s32i a0, a1, 12 +4010416a: 012356 bnez a3, 40104180 +4010416d: fff831 l32r a3, 40104150 +40104170: fff921 l32r a2, 40104154 +40104173: 16a142 movi a4, 0x116 +40104176: f00201 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40104179: 0000c0 callx0 a0 +4010417c: ffff06 j 4010417c +4010417f: 024200 excw +40104182: 260b addi.n a2, a6, -1 +40104184: 311124 excw +40104187: 21fff2 excw +4010418a: 42fff2 excw +4010418d: 0117a1 l32r a10, 400c45ec <__floatsidf+0xb62fc> +40104190: effc bnez.n a15, 401041d2 +40104192: 0000c0 callx0 a0 +40104195: ffff06 j 40104195 +40104198: 9358 l32i.n a5, a3, 36 +4010419a: 02a462 movi a6, 0x402 +4010419d: 0548 l32i.n a4, a5, 0 +4010419f: 414640 srli a4, a4, 6 +401041a2: 0b8467 bany a4, a6, 401041b1 +401041a5: ffec61 l32r a6, 40104158 +401041a8: f0f181 l32r a8, 4010056c +401041ab: 106460 and a6, a4, a6 +401041ae: 169687 bne a6, a8, 401041c8 +401041b1: 070242 l8ui a4, a2, 7 +401041b4: 064242 s8i a4, a2, 6 +401041b7: 040c movi.n a4, 0 +401041b9: 094242 s8i a4, a2, 9 +401041bc: 0a4242 s8i a4, a2, 10 +401041bf: 7fa042 movi a4, 127 +401041c2: 094542 s8i a4, a5, 9 +401041c5: 0007c6 j 401041e8 +401041c8: 060c movi.n a6, 0 +401041ca: 0be487 bbsi a4, 8, 401041d9 +401041cd: 070242 l8ui a4, a2, 7 +401041d0: 094262 s8i a6, a2, 9 +401041d3: 064242 s8i a4, a2, 6 +401041d6: 0002c6 j 401041e5 +401041d9: 070242 l8ui a4, a2, 7 +401041dc: 094262 s8i a6, a2, 9 +401041df: 064242 s8i a4, a2, 6 +401041e2: 0a4262 s8i a6, a2, 10 +401041e5: 094572 s8i a7, a5, 9 +401041e8: 00a042 movi a4, 0 +401041eb: 0b4242 s8i a4, a2, 11 +401041ee: 01a042 movi a4, 1 +401041f1: fff405 call0 40104134 +401041f4: 032102 l32i a0, a1, 12 +401041f7: 10c112 addi a1, a1, 16 +401041fa: f00d ret.n +401041fc: f20cc0 excw +401041ff: 3f .byte 0x3f +40104200: ff .byte 0xff +40104201: ff .byte 0xff +40104202: 74f000 extui a15, a0, 0, 8 +40104205: f20c movi.n a2, 15 +40104207: 3f .byte 0x3f +40104208: 000000 ill +4010420b: 0dc4c0 excw +4010420e: ff3ff2 excw +40104211: ff .byte 0xff +40104212: ff .byte 0xff +40104213: 3f .byte 0x3f +40104214: ff .byte 0xff +40104215: ff .byte 0xff +40104216: ff .byte 0xff +40104217: 7f .byte 0x7f + +40104218 : +40104218: fff921 l32r a2, 401041fc +4010421b: e0c112 addi a1, a1, -32 +4010421e: 41e9 s32i.n a14, a1, 16 +40104220: fff831 l32r a3, 40104200 +40104223: 0020c0 memw +40104226: 02e8 l32i.n a14, a2, 0 +40104228: 0020c0 memw +4010422b: 0248 l32i.n a4, a2, 0 +4010422d: 61c9 s32i.n a12, a1, 24 +4010422f: 7109 s32i.n a0, a1, 28 +40104231: 51d9 s32i.n a13, a1, 20 +40104233: 31f9 s32i.n a15, a1, 12 +40104235: 103430 and a3, a4, a3 +40104238: b5e0e0 extui a14, a14, 16, 12 +4010423b: 0020c0 memw +4010423e: 0239 s32i.n a3, a2, 0 +40104240: fff1c1 l32r a12, 40104204 +40104243: 0b9e16 beqz a14, 40104300 +40104246: 6020e0 neg a2, a14 +40104249: 1022e0 and a2, a2, a14 +4010424c: 40f220 nsau a2, a2 +4010424f: 602020 neg a2, a2 +40104252: 1fc2d2 addi a13, a2, 31 +40104255: 020d66 bnei a13, -1, 4010425b +40104258: 002906 j 40104300 +4010425b: 0d2d mov.n a2, a13 +4010425d: ffeb05 call0 40104110 +40104260: 02fd mov.n a15, a2 +40104262: f03601 l32r a0, 4010033c +40104265: 0000c0 callx0 a0 +40104268: ffe831 l32r a3, 40104208 +4010426b: 0020c0 memw +4010426e: 0c28 l32i.n a2, a12, 0 +40104270: 202230 or a2, a2, a3 +40104273: 0020c0 memw +40104276: 0c29 s32i.n a2, a12, 0 +40104278: f61001 l32r a0, 40101ab8 +4010427b: 0000c0 callx0 a0 +4010427e: 222c movi.n a2, 34 +40104280: f14001 l32r a0, 40100780 +40104283: 0000c0 callx0 a0 +40104286: f02d01 l32r a0, 4010033c +40104289: 0000c0 callx0 a0 +4010428c: ffe031 l32r a3, 4010420c +4010428f: 112de0 slli a2, a13, 2 +40104292: c02d20 sub a2, a13, a2 +40104295: b02230 addx8 a2, a2, a3 +40104298: 0020c0 memw +4010429b: 0248 l32i.n a4, a2, 0 +4010429d: f84e31 l32r a3, 401023d8 +401042a0: 103430 and a3, a4, a3 +401042a3: 0020c0 memw +401042a6: 0239 s32i.n a3, a2, 0 +401042a8: 0020c0 memw +401042ab: 0c48 l32i.n a4, a12, 0 +401042ad: ffd831 l32r a3, 40104210 +401042b0: 103430 and a3, a4, a3 +401042b3: 0020c0 memw +401042b6: 0c39 s32i.n a3, a12, 0 +401042b8: 0020c0 memw +401042bb: 0238 l32i.n a3, a2, 0 +401042bd: 00f3d6 bgez a3, 401042d0 +401042c0: 0020c0 memw +401042c3: 0248 l32i.n a4, a2, 0 +401042c5: ffd331 l32r a3, 40104214 +401042c8: 103430 and a3, a4, a3 +401042cb: 0020c0 memw +401042ce: 0239 s32i.n a3, a2, 0 +401042d0: 00a022 movi a2, 0 +401042d3: 0b4f22 s8i a2, a15, 11 +401042d6: 002f22 l32i a2, a15, 0 +401042d9: 00b216 beqz a2, 401042e8 +401042dc: 9238 l32i.n a3, a2, 36 +401042de: 640c movi.n a4, 6 +401042e0: 0f4342 s8i a4, a3, 15 +401042e3: 130c movi.n a3, 1 +401042e5: ffdcc5 call0 401040b4 +401042e8: 020c movi.n a2, 0 +401042ea: 0f29 s32i.n a2, a15, 0 +401042ec: f5f301 l32r a0, 40101ab8 +401042ef: 0000c0 callx0 a0 +401042f2: e27c movi.n a2, -2 +401042f4: 401d00 ssl a13 +401042f7: 812220 src a2, a2, a2 +401042fa: 10ee20 and a14, a14, a2 +401042fd: ffd146 j 40104246 +40104300: 7108 l32i.n a0, a1, 28 +40104302: 61c8 l32i.n a12, a1, 24 +40104304: 51d8 l32i.n a13, a1, 20 +40104306: 41e8 l32i.n a14, a1, 16 +40104308: 31f8 l32i.n a15, a1, 12 +4010430a: 20c112 addi a1, a1, 32 +4010430d: f00d ret.n + ... + +40104310 : +40104310: f0c112 addi a1, a1, -16 +40104313: 0ea022 movi a2, 14 +40104316: 036102 s32i a0, a1, 12 +40104319: ff9185 call0 40103c34 +4010431c: 032102 l32i a0, a1, 12 +4010431f: 10c112 addi a1, a1, 16 +40104322: f00d ret.n +40104324: fedec4 excw +40104327: 3f .byte 0x3f + +40104328 : +40104328: 9228 l32i.n a2, a2, 36 +4010432a: f50431 l32r a3, 4010173c +4010432d: 6248 l32i.n a4, a2, 24 +4010432f: 0020c0 memw +40104332: 0338 l32i.n a3, a3, 0 +40104334: fffc21 l32r a2, 40104324 +40104337: c04340 sub a4, a3, a4 +4010433a: 0238 l32i.n a3, a2, 0 +4010433c: 120c movi.n a2, 1 +4010433e: fbc332 addi a3, a3, -5 +40104341: 113360 slli a3, a3, 10 +40104344: 013347 bltu a3, a4, 40104349 +40104347: 020c movi.n a2, 0 +40104349: 042020 extui a2, a2, 0, 1 +4010434c: f00d ret.n +4010434e: 000000 ill +40104351: 102000 and a2, a0, a0 +40104354: ff .byte 0xff +40104355: ef .byte 0xef +40104356: ff .byte 0xff +40104357: 3fff03 excw +4010435a: fffff0 excw +4010435d: ffffc0 excw +40104360: f20dd4 excw +40104363: 3f .byte 0x3f +40104364: ff .byte 0xff +40104365: ff .byte 0xff +40104366: d00003 excw +40104369: f20d ret.n +4010436b: 3f .byte 0x3f +4010436c: 0dc8 l32i.n a12, a13, 0 +4010436e: cc3ff2 excw +40104371: f20d ret.n +40104373: 3f .byte 0x3f +40104374: f20e44 excw +40104377: 3f .byte 0x3f + +40104378 : +40104378: d0c112 addi a1, a1, -48 +4010437b: a1c9 s32i.n a12, a1, 40 +4010437d: ff4cc1 l32r a12, 401040b0 +40104380: 71f9 s32i.n a15, a1, 28 +40104382: b109 s32i.n a0, a1, 44 +40104384: 91d9 s32i.n a13, a1, 36 +40104386: 81e9 s32i.n a14, a1, 32 +40104388: 0b0c62 l8ui a6, a12, 11 +4010438b: 02fd mov.n a15, a2 +4010438d: 020c movi.n a2, 0 +4010438f: 130c movi.n a3, 1 +40104391: 024d mov.n a4, a2 +40104393: fdc682 addi a8, a6, -3 +40104396: 934360 movnez a4, a3, a6 +40104399: 833280 moveqz a3, a2, a8 +4010439c: 102430 and a2, a4, a3 +4010439f: 154626 beqi a6, 4, 401043b8 +401043a2: 012216 beqz a2, 401043b8 +401043a5: ff6a31 l32r a3, 40104150 +401043a8: ff6b21 l32r a2, 40104154 +401043ab: 97a242 movi a4, 0x297 +401043ae: ef7401 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401043b1: 0000c0 callx0 a0 +401043b4: ffff06 j 401043b4 +401043b7: 466600 excw +401043ba: 2819 s32i.n a1, a8, 8 +401043bc: f70c movi.n a7, 15 +401043be: c60292 l8ui a9, a2, 198 +401043c1: 9f .byte 0x9f +401043c2: 633100 excw +401043c5: ff .byte 0xff +401043c6: ff6321 l32r a2, 40104154 +401043c9: 9aa242 movi a4, 0x29a +401043cc: ef6d01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401043cf: 0000c0 callx0 a0 +401043d2: ffff06 j 401043d2 +401043d5: 0cf9 s32i.n a15, a12, 0 +401043d7: 1fdc bnez.n a15, 401043ec +401043d9: ff5d31 l32r a3, 40104150 +401043dc: ff5e21 l32r a2, 40104154 +401043df: 9fa242 movi a4, 0x29f +401043e2: ef6701 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401043e5: 0000c0 callx0 a0 +401043e8: ffff06 j 401043e8 +401043eb: 1f3200 excw +401043ee: d20a add.n a13, a2, a0 +401043f0: 1f .byte 0x1f +401043f1: e10b addi.n a14, a1, -1 +401043f3: ffcc bnez.n a15, 40104406 +401043f5: dd3a add.n a13, a13, a3 +401043f7: 051e32 l16ui a3, a14, 10 +401043fa: 22a3d7 bge a3, a13, 40104420 +401043fd: 9f78 l32i.n a7, a15, 36 +401043ff: 0738 l32i.n a3, a7, 0 +40104401: 413630 srli a3, a3, 6 +40104404: 18e317 bbsi a3, 1, 40104420 +40104407: ffd341 l32r a4, 40104354 +4010440a: 00a152 movi a5, 0x100 +4010440d: 103340 and a3, a3, a4 +40104410: 203350 or a3, a3, a5 +40104413: 1143a0 slli a4, a3, 6 +40104416: 0738 l32i.n a3, a7, 0 +40104418: 543030 extui a3, a3, 0, 6 +4010441b: 203340 or a3, a3, a4 +4010441e: 0739 s32i.n a3, a7, 0 +40104420: 9f78 l32i.n a7, a15, 36 +40104422: 0758 l32i.n a5, a7, 0 +40104424: 414650 srli a4, a5, 6 +40104427: 397527 bbci a5, 18, 40104464 +4010442a: 68fc bnez.n a8, 40104464 +4010442c: 1788 l32i.n a8, a7, 4 +4010442e: 343480 extui a3, a8, 4, 4 +40104431: 2f33a6 blti a3, 3, 40104464 +40104434: ffc831 l32r a3, 40104354 +40104437: 00a152 movi a5, 0x100 +4010443a: 103430 and a3, a4, a3 +4010443d: 203350 or a3, a3, a5 +40104440: 1143a0 slli a4, a3, 6 +40104443: 0738 l32i.n a3, a7, 0 +40104445: 543030 extui a3, a3, 0, 6 +40104448: 203340 or a3, a3, a4 +4010444b: 0739 s32i.n a3, a7, 0 +4010444d: ffc231 l32r a3, 40104358 +40104450: 544880 extui a4, a8, 8, 6 +40104453: 114420 slli a4, a4, 14 +40104456: 103830 and a3, a8, a3 +40104459: 203340 or a3, a3, a4 +4010445c: ffc041 l32r a4, 4010435c +4010445f: 103340 and a3, a3, a4 +40104462: 1739 s32i.n a3, a7, 4 +40104464: 1738 l32i.n a3, a7, 4 +40104466: 4f58 l32i.n a5, a15, 16 +40104468: 853730 extui a3, a3, 23, 9 +4010446b: f4d0d0 extui a13, a13, 0, 16 +4010446e: f48030 extui a8, a3, 0, 16 +40104471: 132626 beqi a6, 2, 40104488 +40104474: 029c beqz.n a2, 40104488 +40104476: ff3631 l32r a3, 40104150 +40104479: ff3621 l32r a2, 40104154 +4010447c: aaa042 movi a4, 170 +4010447f: ef4001 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40104482: 0000c0 callx0 a0 +40104485: ffff06 j 40104485 +40104488: 071c22 l16ui a2, a12, 14 +4010448b: 05a216 beqz a2, 401044e9 +4010448e: 015532 s16i a3, a5, 2 +40104491: 9f28 l32i.n a2, a15, 36 +40104493: 02a432 movi a3, 0x402 +40104496: 0228 l32i.n a2, a2, 0 +40104498: 414620 srli a4, a2, 6 +4010449b: 228437 bany a4, a3, 401044c1 +4010449e: ff2e31 l32r a3, 40104158 +401044a1: 103430 and a3, a4, a3 +401044a4: f03241 l32r a4, 4010056c +401044a7: 161347 beq a3, a4, 401044c1 +401044aa: 071c42 l16ui a4, a12, 14 +401044ad: 083d mov.n a3, a8 +401044af: 342220 extui a2, a2, 2, 4 +401044b2: 1159 s32i.n a5, a1, 4 +401044b4: 006182 s32i a8, a1, 0 +401044b7: ffac05 call0 40103f78 +401044ba: 1158 l32i.n a5, a1, 4 +401044bc: 0188 l32i.n a8, a1, 0 +401044be: 015522 s16i a2, a5, 2 +401044c1: 011522 l16ui a2, a5, 2 +401044c4: 19b827 bgeu a8, a2, 401044e1 +401044c7: 065c22 s16i a2, a12, 12 +401044ca: 092f22 l32i a2, a15, 36 +401044cd: 002232 l32i a3, a2, 0 +401044d0: 2063e7 bbci a3, 14, 401044f4 +401044d3: 080222 l8ui a2, a2, 8 +401044d6: 016152 s32i a5, a1, 4 +401044d9: 018ec5 call0 40105dc8 +401044dc: 1158 l32i.n a5, a1, 4 +401044de: 000486 j 401044f4 +401044e1: 020c movi.n a2, 0 +401044e3: 065c22 s16i a2, a12, 12 +401044e6: 000286 j 401044f4 +401044e9: 080722 l8ui a2, a7, 8 +401044ec: f40c movi.n a4, 15 +401044ee: 02b427 bgeu a4, a2, 401044f4 +401044f1: 015532 s16i a3, a5, 2 +401044f4: 9f78 l32i.n a7, a15, 36 +401044f6: 02a422 movi a2, 0x402 +401044f9: 0748 l32i.n a4, a7, 0 +401044fb: 030c movi.n a3, 0 +401044fd: 416640 srli a6, a4, 6 +40104500: 1d8627 bany a6, a2, 40104521 +40104503: ff1521 l32r a2, 40104158 +40104506: f01941 l32r a4, 4010056c +40104509: 102620 and a2, a6, a2 +4010450c: 111247 beq a2, a4, 40104521 +4010450f: 330c movi.n a3, 3 +40104511: 0cf647 bbsi a6, 20, 40104521 +40104514: f01231 l32r a3, 4010055c +40104517: 240c movi.n a4, 2 +40104519: 102630 and a2, a6, a3 +4010451c: 130c movi.n a3, 1 +4010451e: 933420 movnez a3, a4, a2 +40104521: f48621 l32r a2, 4010173c +40104524: 6788 l32i.n a8, a7, 24 +40104526: 0020c0 memw +40104529: 0228 l32i.n a2, a2, 0 +4010452b: 002e42 l32i a4, a14, 0 +4010452e: c02280 sub a2, a2, a8 +40104531: 412a20 srli a2, a2, 10 +40104534: c02420 sub a2, a4, a2 +40104537: 02b427 bgeu a4, a2, 4010453d +4010453a: 05a022 movi a2, 5 +4010453d: 040c42 l8ui a4, a12, 4 +40104540: b42020 extui a2, a2, 0, 12 +40104543: 1184e0 slli a8, a4, 2 +40104546: c04480 sub a4, a4, a8 +40104549: ff8581 l32r a8, 40104360 +4010454c: 112240 slli a2, a2, 12 +4010454f: b04480 addx8 a4, a4, a8 +40104552: 0020c0 memw +40104555: 0429 s32i.n a2, a4, 0 +40104557: 040c22 l8ui a2, a12, 4 +4010455a: ff2c91 l32r a9, 4010420c +4010455d: 1142e0 slli a4, a2, 2 +40104560: c02240 sub a2, a2, a4 +40104563: b09290 addx8 a9, a2, a9 +40104566: f000a1 l32r a10, 40100568 +40104569: ff7921 l32r a2, 40104350 +4010456c: 044960 extui a4, a6, 9, 1 +4010456f: 00a182 movi a8, 0x100 +40104572: 93a240 movnez a10, a2, a4 +40104575: 01b380 slli a11, a3, 24 +40104578: 104680 and a4, a6, a8 +4010457b: 069c32 l16si a3, a12, 12 +4010457e: f80081 l32r a8, 40102580 +40104581: 020c movi.n a2, 0 +40104583: 838240 moveqz a8, a2, a4 +40104586: 080742 l8ui a4, a7, 8 +40104589: 0713e6 bgei a3, 1, 40104594 +4010458c: f30c movi.n a3, 15 +4010458e: 023347 bltu a3, a4, 40104594 +40104591: eff621 l32r a2, 4010056c +40104594: 1fe8 l32i.n a14, a15, 4 +40104596: ff7331 l32r a3, 40104364 +40104599: 103e30 and a3, a14, a3 +4010459c: 2033b0 or a3, a3, a11 +4010459f: 2033a0 or a3, a3, a10 +401045a2: 203380 or a3, a3, a8 +401045a5: 202320 or a2, a3, a2 +401045a8: 0020c0 memw +401045ab: 0929 s32i.n a2, a9, 0 +401045ad: 040c22 l8ui a2, a12, 4 +401045b0: 1132e0 slli a3, a2, 2 +401045b3: c02230 sub a2, a2, a3 +401045b6: ff6c31 l32r a3, 40104368 +401045b9: b02230 addx8 a2, a2, a3 +401045bc: 011532 l16ui a3, a5, 2 +401045bf: efed51 l32r a5, 40100574 +401045c2: 113300 slli a3, a3, 16 +401045c5: 0020c0 memw +401045c8: 0239 s32i.n a3, a2, 0 +401045ca: 040c22 l8ui a2, a12, 4 +401045cd: 1182e0 slli a8, a2, 2 +401045d0: c02280 sub a2, a2, a8 +401045d3: ff6681 l32r a8, 4010436c +401045d6: b08280 addx8 a8, a2, a8 +401045d9: f20c movi.n a2, 15 +401045db: 013247 bltu a2, a4, 401045e0 +401045de: 050c movi.n a5, 0 +401045e0: 0c0722 l8ui a2, a7, 12 +401045e3: 113440 slli a3, a4, 12 +401045e6: f43030 extui a3, a3, 0, 16 +401045e9: 112200 slli a2, a2, 16 +401045ec: 202230 or a2, a2, a3 +401045ef: b430d0 extui a3, a13, 0, 12 +401045f2: 202230 or a2, a2, a3 +401045f5: 205250 or a5, a2, a5 +401045f8: 0020c0 memw +401045fb: 0859 s32i.n a5, a8, 0 +401045fd: f20c movi.n a2, 15 +401045ff: 40b247 bgeu a2, a4, 40104643 +40104602: 040c22 l8ui a2, a12, 4 +40104605: 11dd80 slli a13, a13, 8 +40104608: 1152e0 slli a5, a2, 2 +4010460b: c02250 sub a2, a2, a5 +4010460e: ff5851 l32r a5, 40104370 +40104611: 87a072 movi a7, 135 +40104614: b05250 addx8 a5, a2, a5 +40104617: 242040 extui a2, a4, 0, 3 +4010461a: 20d2d0 or a13, a2, a13 +4010461d: 721c movi.n a2, 23 +4010461f: 022247 blt a2, a4, 40104625 +40104622: 07a072 movi a7, 7 +40104625: efd141 l32r a4, 4010056c +40104628: 00a022 movi a2, 0 +4010462b: 104640 and a4, a6, a4 +4010462e: 08a032 movi a3, 8 +40104631: 833240 moveqz a3, a2, a4 +40104634: 202730 or a2, a7, a3 +40104637: 012280 slli a2, a2, 24 +4010463a: 2022d0 or a2, a2, a13 +4010463d: 0020c0 memw +40104640: 006522 s32i a2, a5, 0 +40104643: ff4c21 l32r a2, 40104374 +40104646: 130c movi.n a3, 1 +40104648: 0020c0 memw +4010464b: 0248 l32i.n a4, a2, 0 +4010464d: 060c22 l8ui a2, a12, 6 +40104650: 0b4c32 s8i a3, a12, 11 +40104653: 401200 ssl a2 +40104656: a12300 sll a2, a3 +40104659: 220b addi.n a2, a2, -1 +4010465b: 104240 and a4, a2, a4 +4010465e: 050c32 l8ui a3, a12, 5 +40104661: 040c22 l8ui a2, a12, 4 +40104664: f44040 extui a4, a4, 0, 16 +40104667: 00ae85 call0 40105150 +4010466a: b108 l32i.n a0, a1, 44 +4010466c: a1c8 l32i.n a12, a1, 40 +4010466e: 91d8 l32i.n a13, a1, 36 +40104670: 81e8 l32i.n a14, a1, 32 +40104672: 71f8 l32i.n a15, a1, 28 +40104674: 30c112 addi a1, a1, 48 +40104677: f00d ret.n +40104679: 000000 ill +4010467c: f0c112 addi a1, a1, -16 +4010467f: 0261c2 s32i a12, a1, 8 +40104682: fe8bc1 l32r a12, 401040b0 +40104685: 036102 s32i a0, a1, 12 +40104688: 00a022 movi a2, 0 +4010468b: 0b4c22 s8i a2, a12, 11 +4010468e: 0c28 l32i.n a2, a12, 0 +40104690: 9228 l32i.n a2, a2, 36 +40104692: 0095c5 call0 40104ff0 +40104695: 02dc bnez.n a2, 401046a9 +40104697: 0c28 l32i.n a2, a12, 0 +40104699: ff2241 l32r a4, 40104324 +4010469c: 9258 l32i.n a5, a2, 36 +4010469e: 090462 l8ui a6, a4, 9 +401046a1: 1538 l32i.n a3, a5, 4 +401046a3: 547830 extui a7, a3, 8, 6 +401046a6: 0a3767 bltu a7, a6, 401046b4 +401046a9: 0c28 l32i.n a2, a12, 0 +401046ab: 240c movi.n a4, 2 +401046ad: 9238 l32i.n a3, a2, 36 +401046af: 000746 j 401046d0 +401046b2: 420000 excw +401046b5: 300804 excw +401046b8: 3e .byte 0x3e +401046b9: 334754 excw +401046bc: 330c07 bnone a12, a0, 401046f3 +401046bf: 0f4532 s8i a3, a5, 15 +401046c2: 000346 j 401046d3 +401046c5: ffc605 call0 40104328 +401046c8: 229c beqz.n a2, 401046de +401046ca: 0c28 l32i.n a2, a12, 0 +401046cc: 540c movi.n a4, 5 +401046ce: 9238 l32i.n a3, a2, 36 +401046d0: 0f4342 s8i a4, a3, 15 +401046d3: 130c movi.n a3, 1 +401046d5: ff9dc5 call0 401040b4 +401046d8: 000a06 j 40104704 +401046db: 000000 ill +401046de: 002c22 l32i a2, a12, 0 +401046e1: 08a032 movi a3, 8 +401046e4: 4248 l32i.n a4, a2, 16 +401046e6: 010452 l8ui a5, a4, 1 +401046e9: 203530 or a3, a5, a3 +401046ec: 014432 s8i a3, a4, 1 +401046ef: 330c movi.n a3, 3 +401046f1: 0b4c32 s8i a3, a12, 11 +401046f4: 9238 l32i.n a3, a2, 36 +401046f6: 072222 l32i a2, a2, 28 +401046f9: 008705 call0 40104f6c +401046fc: 040c32 l8ui a3, a12, 4 +401046ff: 0c28 l32i.n a2, a12, 0 +40104701: ffc745 call0 40104378 +40104704: 3108 l32i.n a0, a1, 12 +40104706: 21c8 l32i.n a12, a1, 8 +40104708: 10c112 addi a1, a1, 16 +4010470b: f00d ret.n +4010470d: 000000 ill +40104710: f0c112 addi a1, a1, -16 +40104713: fe6721 l32r a2, 401040b0 +40104716: ff0341 l32r a4, 40104324 +40104719: 3109 s32i.n a0, a1, 12 +4010471b: 0a0232 l8ui a3, a2, 10 +4010471e: 080442 l8ui a4, a4, 8 +40104721: 04b347 bgeu a3, a4, 40104729 +40104724: 331b addi.n a3, a3, 1 +40104726: 0a4232 s8i a3, a2, 10 +40104729: 0a0232 l8ui a3, a2, 10 +4010472c: 0db347 bgeu a3, a4, 4010473d +4010472f: 060232 l8ui a3, a2, 6 +40104732: 080242 l8ui a4, a2, 8 +40104735: 0ab347 bgeu a3, a4, 40104743 +40104738: 331b addi.n a3, a3, 1 +4010473a: 000086 j 40104740 +4010473d: 070232 l8ui a3, a2, 7 +40104740: 064232 s8i a3, a2, 6 +40104743: 0238 l32i.n a3, a2, 0 +40104745: 9368 l32i.n a6, a3, 36 +40104747: ff0431 l32r a3, 40104358 +4010474a: 1658 l32i.n a5, a6, 4 +4010474c: 544e50 extui a4, a5, 14, 6 +4010474f: 441b addi.n a4, a4, 1 +40104751: 544040 extui a4, a4, 0, 6 +40104754: 114420 slli a4, a4, 14 +40104757: 103530 and a3, a5, a3 +4010475a: 203340 or a3, a3, a4 +4010475d: 344430 extui a4, a3, 4, 4 +40104760: 441b addi.n a4, a4, 1 +40104762: 344040 extui a4, a4, 0, 4 +40104765: 0faf52 movi a5, -241 +40104768: 1144c0 slli a4, a4, 4 +4010476b: 103350 and a3, a3, a5 +4010476e: 203340 or a3, a3, a4 +40104771: 1639 s32i.n a3, a6, 4 +40104773: 0b0222 l8ui a2, a2, 11 +40104776: 220b addi.n a2, a2, -1 +40104778: 742020 extui a2, a2, 0, 8 +4010477b: 1122b6 bltui a2, 2, 40104790 +4010477e: fe7431 l32r a3, 40104150 +40104781: fe7421 l32r a2, 40104154 +40104784: 07a242 movi a4, 0x207 +40104787: ee7e01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +4010478a: 0000c0 callx0 a0 +4010478d: ffff06 j 4010478d +40104790: ffee85 call0 4010467c +40104793: 3108 l32i.n a0, a1, 12 +40104795: 10c112 addi a1, a1, 16 +40104798: f00d ret.n +4010479a: 120000 excw +4010479d: 09f0c1 l32r a12, 400c6f60 <__floatsidf+0xb8c70> +401047a0: 02dc31 l32r a3, 400c5310 <__floatsidf+0xb7020> +401047a3: fe6b31 l32r a3, 40104150 +401047a6: fe6b21 l32r a2, 40104154 +401047a9: d4a142 movi a4, 0x1d4 +401047ac: ee7501 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401047af: 0000c0 callx0 a0 +401047b2: ffff06 j 401047b2 +401047b5: fe3e41 l32r a4, 401040b0 +401047b8: fedb61 l32r a6, 40104324 +401047bb: 090452 l8ui a5, a4, 9 +401047be: 090662 l8ui a6, a6, 9 +401047c1: 04b567 bgeu a5, a6, 401047c9 +401047c4: 551b addi.n a5, a5, 1 +401047c6: 094452 s8i a5, a4, 9 +401047c9: 090452 l8ui a5, a4, 9 +401047cc: 0db567 bgeu a5, a6, 401047dd +401047cf: 060452 l8ui a5, a4, 6 +401047d2: 080462 l8ui a6, a4, 8 +401047d5: 0ab567 bgeu a5, a6, 401047e3 +401047d8: 551b addi.n a5, a5, 1 +401047da: 000086 j 401047e0 +401047dd: 070452 l8ui a5, a4, 7 +401047e0: 064452 s8i a5, a4, 6 +401047e3: 9268 l32i.n a6, a2, 36 +401047e5: fedd21 l32r a2, 4010435c +401047e8: 1678 l32i.n a7, a6, 4 +401047ea: 545870 extui a5, a7, 8, 6 +401047ed: 551b addi.n a5, a5, 1 +401047ef: 545050 extui a5, a5, 0, 6 +401047f2: 114580 slli a4, a5, 8 +401047f5: 102720 and a2, a7, a2 +401047f8: 202240 or a2, a2, a4 +401047fb: 1629 s32i.n a2, a6, 4 +401047fd: 438c beqz.n a3, 40104805 +401047ff: 343420 extui a3, a2, 4, 4 +40104802: 16a357 bge a3, a5, 4010481c +40104805: 343420 extui a3, a2, 4, 4 +40104808: 01c332 addi a3, a3, 1 +4010480b: 343030 extui a3, a3, 0, 4 +4010480e: 0faf42 movi a4, -241 +40104811: 1133c0 slli a3, a3, 4 +40104814: 102240 and a2, a2, a4 +40104817: 202230 or a2, a2, a3 +4010481a: 1629 s32i.n a2, a6, 4 +4010481c: ffe5c5 call0 4010467c +4010481f: 3108 l32i.n a0, a1, 12 +40104821: 10c112 addi a1, a1, 16 +40104824: f00d ret.n + ... + +40104828 : +40104828: fe2231 l32r a3, 401040b0 +4010482b: f0c112 addi a1, a1, -16 +4010482e: 0328 l32i.n a2, a3, 0 +40104830: 3109 s32i.n a0, a1, 12 +40104832: 012256 bnez a2, 40104848 +40104835: fe4631 l32r a3, 40104150 +40104838: fe4721 l32r a2, 40104154 +4010483b: 21a242 movi a4, 0x221 +4010483e: ee5001 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40104841: 0000c0 callx0 a0 +40104844: ffff06 j 40104844 +40104847: 224200 excw +4010484a: 4209 s32i.n a0, a2, 16 +4010484c: e70024 excw +4010484f: 221264 excw +40104852: 220703 excw +40104855: 220643 excw +40104858: 2200a0 excw +4010485b: 050943 excw +4010485e: ffeb addi.n a15, a15, 14 +40104860: 000186 j 4010486a +40104863: a03200 addx4 a3, a2, a0 +40104866: f34500 excw +40104869: ff .byte 0xff +4010486a: 032102 l32i a0, a1, 12 +4010486d: 10c112 addi a1, a1, 16 +40104870: 000080 ret +40104873: fed600 excw +40104876: 22 .byte 0x22 +40104877: 40 .byte 0x40 + +40104878 : +40104878: f0c112 addi a1, a1, -16 +4010487b: 743020 extui a3, a2, 0, 8 +4010487e: 3109 s32i.n a0, a1, 12 +40104880: 121c movi.n a2, 17 +40104882: 0b3237 bltu a2, a3, 40104891 +40104885: 20b3f6 bgeui a3, 16, 401048a9 +40104888: 141326 beqi a3, 1, 401048a0 +4010488b: 113326 beqi a3, 3, 401048a0 +4010488e: 000c86 j 401048c4 +40104891: 40af22 movi a2, -192 +40104894: 232a add.n a2, a3, a2 +40104896: 140c movi.n a4, 1 +40104898: 283427 bltu a4, a2, 401048c4 +4010489b: 000286 j 401048a9 +4010489e: 450000 extui a0, a0, 16, 5 +401048a1: fff8 l32i.n a15, a15, 60 +401048a3: 000e06 j 401048df +401048a6: 000000 ill +401048a9: fe0121 l32r a2, 401040b0 +401048ac: 030c movi.n a3, 0 +401048ae: 0b4232 s8i a3, a2, 11 +401048b1: 0228 l32i.n a2, a2, 0 +401048b3: 740c movi.n a4, 7 +401048b5: 9238 l32i.n a3, a2, 36 +401048b7: 0f4342 s8i a4, a3, 15 +401048ba: 01a032 movi a3, 1 +401048bd: ff7f45 call0 401040b4 +401048c0: 0006c6 j 401048df +401048c3: ec2100 excw +401048c6: ff .byte 0xff +401048c7: fcd0c5 call0 401015d4 +401048ca: fe2131 l32r a3, 40104150 +401048cd: fe2121 l32r a2, 40104154 +401048d0: 60a242 movi a4, 0x260 +401048d3: ee2b01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401048d6: 0000c0 callx0 a0 +401048d9: ffff06 j 401048d9 +401048dc: 000000 ill +401048df: 3108 l32i.n a0, a1, 12 +401048e1: 10c112 addi a1, a1, 16 +401048e4: f00d ret.n + ... + +401048e8 : +401048e8: f0c112 addi a1, a1, -16 +401048eb: 3109 s32i.n a0, a1, 12 +401048ed: 742020 extui a2, a2, 0, 8 +401048f0: 1182b6 bltui a2, 8, 40104905 +401048f3: fe1731 l32r a3, 40104150 +401048f6: fe1721 l32r a2, 40104154 +401048f9: afa142 movi a4, 0x1af +401048fc: ee2101 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401048ff: 0000c0 callx0 a0 +40104902: ffff06 j 40104902 +40104905: fdea31 l32r a3, 401040b0 +40104908: 0328 l32i.n a2, a3, 0 +4010490a: 044216 beqz a2, 40104952 +4010490d: 0b0332 l8ui a3, a3, 11 +40104910: 121326 beqi a3, 1, 40104926 +40104913: fe0f31 l32r a3, 40104150 +40104916: fe0f21 l32r a2, 40104154 +40104919: b8a142 movi a4, 0x1b8 +4010491c: ee1901 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +4010491f: 0000c0 callx0 a0 +40104922: ffff06 j 40104922 +40104925: 923800 excw +40104928: 00a342 movi a4, 0x300 +4010492b: 0338 l32i.n a3, a3, 0 +4010492d: 413630 srli a3, a3, 6 +40104930: 108347 bany a3, a4, 40104944 +40104933: 0b1242 l16ui a4, a2, 22 +40104936: 0a1232 l16ui a3, a2, 20 +40104939: 343a add.n a3, a4, a3 +4010493b: fe7a41 l32r a4, 40104324 +4010493e: 051442 l16ui a4, a4, 10 +40104941: 072437 blt a4, a3, 4010494c +40104944: 130c movi.n a3, 1 +40104946: ffe545 call0 4010479c +40104949: 000146 j 40104952 +4010494c: 201110 or a1, a1, a1 +4010494f: ffdc05 call0 40104710 +40104952: 3108 l32i.n a0, a1, 12 +40104954: 10c112 addi a1, a1, 16 +40104957: f00d ret.n +40104959: 000000 ill + +4010495c : +4010495c: e0c112 addi a1, a1, -32 +4010495f: 0561d2 s32i a13, a1, 20 +40104962: 41e9 s32i.n a14, a1, 16 +40104964: 31f9 s32i.n a15, a1, 12 +40104966: 076102 s32i a0, a1, 28 +40104969: 61c9 s32i.n a12, a1, 24 +4010496b: 008545 call0 401051c0 +4010496e: 02dd mov.n a13, a2 +40104970: 1e0c movi.n a14, 1 +40104972: ff7c movi.n a15, -1 +40104974: c2ac beqz.n a2, 401049a4 +40104976: 6020d0 neg a2, a13 +40104979: 1022d0 and a2, a2, a13 +4010497c: 40f220 nsau a2, a2 +4010497f: 602020 neg a2, a2 +40104982: 1fc2c2 addi a12, a2, 31 +40104985: 180c26 beqi a12, -1, 401049a1 +40104988: 0c2d mov.n a2, a12 +4010498a: 0081c5 call0 401051a8 +4010498d: 0c2d mov.n a2, a12 +4010498f: fff585 call0 401048e8 +40104992: 401c00 ssl a12 +40104995: a12e00 sll a2, a14 +40104998: 302f20 xor a2, a15, a2 +4010499b: 10dd20 and a13, a13, a2 +4010499e: fff506 j 40104976 +401049a1: 0082c5 call0 401051d0 +401049a4: 072102 l32i a0, a1, 28 +401049a7: 0621c2 l32i a12, a1, 24 +401049aa: 0521d2 l32i a13, a1, 20 +401049ad: 41e8 l32i.n a14, a1, 16 +401049af: 31f8 l32i.n a15, a1, 12 +401049b1: 20c112 addi a1, a1, 32 +401049b4: f00d ret.n + ... + +401049b8 : +401049b8: fdbe21 l32r a2, 401040b0 +401049bb: f0c112 addi a1, a1, -16 +401049be: 002222 l32i a2, a2, 0 +401049c1: 01a032 movi a3, 1 +401049c4: 036102 s32i a0, a1, 12 +401049c7: ffdd45 call0 4010479c +401049ca: 3108 l32i.n a0, a1, 12 +401049cc: 10c112 addi a1, a1, 16 +401049cf: f00d ret.n +401049d1: 000000 ill +401049d4: 22fee5 excw +401049d7: 40 .byte 0x40 + +401049d8 : +401049d8: f0c112 addi a1, a1, -16 +401049db: 743020 extui a3, a2, 0, 8 +401049de: 3109 s32i.n a0, a1, 12 +401049e0: 121c movi.n a2, 17 +401049e2: 0b3237 bltu a2, a3, 401049f1 +401049e5: 1cb3f6 bgeui a3, 16, 40104a05 +401049e8: 101326 beqi a3, 1, 401049fc +401049eb: 0d3326 beqi a3, 3, 401049fc +401049ee: 000b46 j 40104a1f +401049f1: c0a022 movi a2, 192 +401049f4: 0d1327 beq a3, a2, 40104a05 +401049f7: 000906 j 40104a1f +401049fa: 850000 extui a0, a0, 16, 9 +401049fd: fffb addi.n a15, a15, 15 +401049ff: 000dc6 j 40104a3a +40104a02: 000000 ill +40104a05: fdaa21 l32r a2, 401040b0 +40104a08: 030c movi.n a3, 0 +40104a0a: 0b4232 s8i a3, a2, 11 +40104a0d: 0228 l32i.n a2, a2, 0 +40104a0f: 740c movi.n a4, 7 +40104a11: 9238 l32i.n a3, a2, 36 +40104a13: 0f4342 s8i a4, a3, 15 +40104a16: 01a032 movi a3, 1 +40104a19: ff6985 call0 401040b4 +40104a1c: 000686 j 40104a3a +40104a1f: ffed21 l32r a2, 401049d4 +40104a22: fcbb05 call0 401015d4 +40104a25: fdca31 l32r a3, 40104150 +40104a28: fdcb21 l32r a2, 40104154 +40104a2b: 43a242 movi a4, 0x243 +40104a2e: edd401 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40104a31: 0000c0 callx0 a0 +40104a34: ffff06 j 40104a34 +40104a37: 000000 ill +40104a3a: 3108 l32i.n a0, a1, 12 +40104a3c: 10c112 addi a1, a1, 16 +40104a3f: f00d ret.n +40104a41: 000000 ill + +40104a44 : +40104a44: f0c112 addi a1, a1, -16 +40104a47: 036102 s32i a0, a1, 12 +40104a4a: ff1c85 call0 40103c14 +40104a4d: 05a022 movi a2, 5 +40104a50: ff1e05 call0 40103c34 +40104a53: 032102 l32i a0, a1, 12 +40104a56: 10c112 addi a1, a1, 16 +40104a59: f00d ret.n + ... + +40104a5c : +40104a5c: fd9531 l32r a3, 401040b0 +40104a5f: 728c beqz.n a2, 40104a6a +40104a61: 6328 l32i.n a2, a3, 24 +40104a63: 221b addi.n a2, a2, 1 +40104a65: 6329 s32i.n a2, a3, 24 +40104a67: 000146 j 40104a70 +40104a6a: 5328 l32i.n a2, a3, 20 +40104a6c: 221b addi.n a2, a2, 1 +40104a6e: 5329 s32i.n a2, a3, 20 +40104a70: 220c movi.n a2, 2 +40104a72: 0b4322 s8i a2, a3, 11 +40104a75: f00d ret.n +40104a77: 87fc00 excw +40104a7a: fe .byte 0xfe +40104a7b: 3f .byte 0x3f +40104a7c: 743020 extui a3, a2, 0, 8 +40104a7f: f40c movi.n a4, 15 +40104a81: ffa022 movi a2, 255 +40104a84: 083437 bltu a4, a3, 40104a90 +40104a87: fffc21 l32r a2, 40104a78 +40104a8a: 803230 add a3, a2, a3 +40104a8d: 000322 l8ui a2, a3, 0 +40104a90: f00d ret.n +40104a92: f40000 extui a0, a0, 0, 16 +40104a95: 3ffe87 bbsi a14, 24, 40104ad8 +40104a98: 743020 extui a3, a2, 0, 8 +40104a9b: ffa022 movi a2, 255 +40104a9e: 0783f6 bgeui a3, 8, 40104aa9 +40104aa1: fffc21 l32r a2, 40104a94 +40104aa4: 323a add.n a3, a2, a3 +40104aa6: 000322 l8ui a2, a3, 0 +40104aa9: f00d ret.n +40104aab: a12000 sll a2, a0 +40104aae: 8c0007 bnone a0, a0, 40104a3e +40104ab1: 3ffe82 excw +40104ab4: 27bc beqz.n a7, 40104aea +40104ab6: 124022 s8i a2, a0, 18 +40104ab9: c9f0c1 l32r a12, 400f727c <__floatsidf+0xe8f8c> +40104abc: 02cd21 l32r a2, 400c55f0 <__floatsidf+0xb7300> +40104abf: 182222 l32i a2, a2, 96 +40104ac2: 11d9 s32i.n a13, a1, 4 +40104ac4: 030c movi.n a3, 0 +40104ac6: 3109 s32i.n a0, a1, 12 +40104ac8: 0b4232 s8i a3, a2, 11 +40104acb: fff821 l32r a2, 40104aac +40104ace: 174c32 s8i a3, a12, 23 +40104ad1: 166c22 s32i a2, a12, 88 +40104ad4: 020c movi.n a2, 0 +40104ad6: ac29 s32i.n a2, a12, 40 +40104ad8: 9c29 s32i.n a2, a12, 36 +40104ada: ec29 s32i.n a2, a12, 56 +40104adc: 164c22 s8i a2, a12, 22 +40104adf: eed321 l32r a2, 4010062c +40104ae2: 064c32 s8i a3, a12, 6 +40104ae5: 01d222 addmi a2, a2, 0x100 +40104ae8: 770cd2 l8ui a13, a12, 119 +40104aeb: fe0222 l8ui a2, a2, 254 +40104aee: 1a52d7 bbc a2, a13, 40104b0c +40104af1: 790c32 l8ui a3, a12, 121 +40104af4: 5c0c22 l8ui a2, a12, 92 +40104af7: ffef01 l32r a0, 40104ab4 +40104afa: 0000c0 callx0 a0 +40104afd: 9022d0 addx2 a2, a2, a13 +40104b00: ffecd1 l32r a13, 40104ab0 +40104b03: 9022d0 addx2 a2, a2, a13 +40104b06: 010222 l8ui a2, a2, 1 +40104b09: 000886 j 40104b2f +40104b0c: 020c22 l8ui a2, a12, 2 +40104b0f: 931c movi.n a3, 25 +40104b11: 012280 slli a2, a2, 24 +40104b14: 312820 srai a2, a2, 24 +40104b17: 112327 blt a3, a2, 40104b2c +40104b1a: 030c22 l8ui a2, a12, 3 +40104b1d: 012280 slli a2, a2, 24 +40104b20: 312820 srai a2, a2, 24 +40104b23: 052327 blt a3, a2, 40104b2c +40104b26: 050c22 l8ui a2, a12, 5 +40104b29: 000086 j 40104b2f +40104b2c: 780c22 l8ui a2, a12, 120 +40104b2f: 182c32 l32i a3, a12, 96 +40104b32: 0a0342 l8ui a4, a3, 10 +40104b35: 07a427 bge a4, a2, 40104b40 +40104b38: 33cb addi.n a3, a3, 12 +40104b3a: 186c32 s32i a3, a12, 96 +40104b3d: 0002c6 j 40104b4c +40104b40: 1a2c32 l32i a3, a12, 104 +40104b43: 902220 addx2 a2, a2, a2 +40104b46: a02230 addx4 a2, a2, a3 +40104b49: 186c22 s32i a2, a12, 96 +40104b4c: f2fc21 l32r a2, 4010173c +40104b4f: 3108 l32i.n a0, a1, 12 +40104b51: 0020c0 memw +40104b54: 0228 l32i.n a2, a2, 0 +40104b56: 11d8 l32i.n a13, a1, 4 +40104b58: bc29 s32i.n a2, a12, 44 +40104b5a: 21c8 l32i.n a12, a1, 8 +40104b5c: 10c112 addi a1, a1, 16 +40104b5f: f00d ret.n +40104b61: 000000 ill +40104b64: 182242 l32i a4, a2, 96 +40104b67: a258 l32i.n a5, a2, 40 +40104b69: f0c112 addi a1, a1, -16 +40104b6c: 3109 s32i.n a0, a1, 12 +40104b6e: 010462 l8ui a6, a4, 1 +40104b71: 551b addi.n a5, a5, 1 +40104b73: a259 s32i.n a5, a2, 40 +40104b75: 9248 l32i.n a4, a2, 36 +40104b77: 053637 bltu a6, a3, 40104b80 +40104b7a: 441b addi.n a4, a4, 1 +40104b7c: 000086 j 40104b82 +40104b7f: 442b00 extui a2, a0, 11, 5 +40104b82: 443a add.n a4, a4, a3 +40104b84: 9249 s32i.n a4, a2, 36 +40104b86: 0763b6 bltui a3, 6, 40104b91 +40104b89: 060232 l8ui a3, a2, 6 +40104b8c: 331b addi.n a3, a3, 1 +40104b8e: 000106 j 40104b96 +40104b91: 0433f6 bgeui a3, 3, 40104b99 +40104b94: 030c movi.n a3, 0 +40104b96: 064232 s8i a3, a2, 6 +40104b99: 060232 l8ui a3, a2, 6 +40104b9c: a40c movi.n a4, 10 +40104b9e: 02b437 bgeu a4, a3, 40104ba4 +40104ba1: fff145 call0 40104ab8 +40104ba4: 3108 l32i.n a0, a1, 12 +40104ba6: 10c112 addi a1, a1, 16 +40104ba9: f00d ret.n + ... + +40104bac : +40104bac: f0c112 addi a1, a1, -16 +40104baf: 3109 s32i.n a0, a1, 12 +40104bb1: 095216 beqz a2, 40104c4a +40104bb4: 182252 l32i a5, a2, 96 +40104bb7: 08f516 beqz a5, 40104c4a +40104bba: 7348 l32i.n a4, a3, 28 +40104bbc: 021547 beq a5, a4, 40104bc2 +40104bbf: 0021c6 j 40104c4a +40104bc2: e248 l32i.n a4, a2, 56 +40104bc4: 441b addi.n a4, a4, 1 +40104bc6: e249 s32i.n a4, a2, 56 +40104bc8: 0f0342 l8ui a4, a3, 15 +40104bcb: 691466 bnei a4, 1, 40104c38 +40104bce: 5248 l32i.n a4, a2, 20 +40104bd0: 5ce427 bbsi a4, 2, 40104c30 +40104bd3: 090372 l8ui a7, a3, 9 +40104bd6: 7fa052 movi a5, 127 +40104bd9: 014780 slli a4, a7, 24 +40104bdc: 316840 srai a6, a4, 24 +40104bdf: 4d1657 beq a6, a5, 40104c30 +40104be2: 000262 l8ui a6, a2, 0 +40104be5: 7fa082 movi a8, 127 +40104be8: 016680 slli a6, a6, 24 +40104beb: 319860 srai a9, a6, 24 +40104bee: 050c movi.n a5, 0 +40104bf0: 081987 beq a9, a8, 40104bfc +40104bf3: 314840 srai a4, a4, 24 +40104bf6: 805940 add a5, a9, a4 +40104bf9: 745150 extui a5, a5, 1, 8 +40104bfc: 010242 l8ui a4, a2, 1 +40104bff: 004272 s8i a7, a2, 0 +40104c02: 014480 slli a4, a4, 24 +40104c05: 317840 srai a7, a4, 24 +40104c08: 7fa062 movi a6, 127 +40104c0b: 745050 extui a5, a5, 0, 8 +40104c0e: 1b1767 beq a7, a6, 40104c2d +40104c11: 015580 slli a5, a5, 24 +40104c14: 315850 srai a5, a5, 24 +40104c17: 904770 addx2 a4, a7, a7 +40104c1a: 445a add.n a4, a4, a5 +40104c1c: 543b addi.n a5, a4, 3 +40104c1e: a34540 movltz a4, a5, a4 +40104c21: 214240 srai a4, a4, 2 +40104c24: 014242 s8i a4, a2, 1 +40104c27: 000146 j 40104c30 +40104c2a: 000000 ill +40104c2d: 014252 s8i a5, a2, 1 +40104c30: 1338 l32i.n a3, a3, 4 +40104c32: 343430 extui a3, a3, 4, 4 +40104c35: 0002c6 j 40104c44 +40104c38: fec442 addi a4, a4, -2 +40104c3b: 744040 extui a4, a4, 0, 8 +40104c3e: 0824f6 bgeui a4, 2, 40104c4a +40104c41: 080532 l8ui a3, a5, 8 +40104c44: 201110 or a1, a1, a1 +40104c47: fff1c5 call0 40104b64 +40104c4a: 3108 l32i.n a0, a1, 12 +40104c4c: 10c112 addi a1, a1, 16 +40104c4f: f00d ret.n +40104c51: 000000 ill +40104c54: fe8154 excw +40104c57: 3f .byte 0x3f +40104c58: fe8094 excw +40104c5b: 3f .byte 0x3f +40104c5c: fe80f4 excw +40104c5f: 3f .byte 0x3f +40104c60: 000002 l8ui a0, a0, 0 +40104c63: 869f02 l16si a0, a15, 0x10c +40104c66: 0c0001 l32r a0, 400c7c68 <__floatsidf+0xb9978> +40104c69: fe9b addi.n a15, a14, 9 +40104c6b: 3f .byte 0x3f +40104c6c: 3d0900 excw +40104c6f: 080000 excw +40104c72: 800020 add a0, a0, a2 +40104c75: 3ffe82 excw +40104c78: ff1d excw +40104c7a: 22 .byte 0x22 +40104c7b: 40 .byte 0x40 + +40104c7c : +40104c7c: d0c112 addi a1, a1, -48 +40104c7f: a1c9 s32i.n a12, a1, 40 +40104c81: 91d9 s32i.n a13, a1, 36 +40104c83: 02cd mov.n a12, a2 +40104c85: b109 s32i.n a0, a1, 44 +40104c87: 81e9 s32i.n a14, a1, 32 +40104c89: 71f9 s32i.n a15, a1, 28 +40104c8b: 03dd mov.n a13, a3 +40104c8d: 002322 l32i a2, a3, 0 +40104c90: 004c16 beqz a12, 40104c98 +40104c93: 182c62 l32i a6, a12, 96 +40104c96: 66fc bnez.n a6, 40104cd0 +40104c98: 056207 bbci a2, 0, 40104ca1 +40104c9b: fff021 l32r a2, 40104c5c +40104c9e: 009506 j 40104ef6 +40104ca1: ee6231 l32r a3, 4010062c +40104ca4: 01d332 addmi a3, a3, 0x100 +40104ca7: f90342 l8ui a4, a3, 249 +40104caa: ffeb31 l32r a3, 40104c58 +40104cad: 191466 bnei a4, 1, 40104cca +40104cb0: ffec41 l32r a4, 40104c60 +40104cb3: 412620 srli a2, a2, 6 +40104cb6: 108247 bany a2, a4, 40104cca +40104cb9: ffe631 l32r a3, 40104c54 +40104cbc: ac8c beqz.n a12, 40104cca +40104cbe: 172c22 l32i a2, a12, 92 +40104cc1: ffe531 l32r a3, 40104c58 +40104cc4: ffe441 l32r a4, 40104c54 +40104cc7: 933420 movnez a3, a4, a2 +40104cca: 7d39 s32i.n a3, a13, 28 +40104ccc: 008a46 j 40104ef9 +40104ccf: 262000 excw +40104cd2: 622741 l32r a4, 400dd570 <__floatsidf+0xcf280> +40104cd5: e02106 j 400fcd5d <__floatsidf+0xeea6d> +40104cd8: ff .byte 0xff +40104cd9: 008646 j 40104ef6 +40104cdc: 621700 excw +40104cdf: 2c2205 call0 40130f00 <_lit4_end+0x2abd4> +40104ce2: c619 s32i.n a1, a6, 48 +40104ce4: 370083 excw +40104ce7: c602e2 l8ui a14, a2, 198 +40104cea: 007d mov.n a7, a0 +40104cec: f29421 l32r a2, 4010173c +40104cef: dc48 l32i.n a4, a12, 52 +40104cf1: 0020c0 memw +40104cf4: 02f8 l32i.n a15, a2, 0 +40104cf6: c03f40 sub a3, a15, a4 +40104cf9: ffc322 addi a2, a3, -1 +40104cfc: 023f47 bltu a15, a4, 40104d02 +40104cff: 202330 or a2, a3, a3 +40104d02: 9c38 l32i.n a3, a12, 36 +40104d04: 1c8316 beqz a3, 40104ed0 +40104d07: ec48 l32i.n a4, a12, 56 +40104d09: 63a072 movi a7, 99 +40104d0c: 083747 bltu a7, a4, 40104d18 +40104d0f: ffd541 l32r a4, 40104c64 +40104d12: 023427 bltu a4, a2, 40104d18 +40104d15: 006dc6 j 40104ed0 +40104d18: ffd421 l32r a2, 40104c68 +40104d1b: dcf9 s32i.n a15, a12, 52 +40104d1d: 02e8 l32i.n a14, a2, 0 +40104d1f: ee1b addi.n a14, a14, 1 +40104d21: 02e9 s32i.n a14, a2, 0 +40104d23: ac28 l32i.n a2, a12, 40 +40104d25: 2169 s32i.n a6, a1, 8 +40104d27: 112290 slli a2, a2, 7 +40104d2a: ee7901 l32r a0, 40100710 +40104d2d: 0000c0 callx0 a0 +40104d30: 744020 extui a4, a2, 0, 8 +40104d33: 170c72 l8ui a7, a12, 23 +40104d36: 164c42 s8i a4, a12, 22 +40104d39: 2168 l32i.n a6, a1, 8 +40104d3b: 069716 beqz a7, 40104da8 +40104d3e: 744020 extui a4, a2, 0, 8 +40104d41: 447a add.n a4, a4, a7 +40104d43: cc38 l32i.n a3, a12, 48 +40104d45: 214140 srai a4, a4, 1 +40104d48: c02f30 sub a2, a15, a3 +40104d4b: 174c42 s8i a4, a12, 23 +40104d4e: 720b addi.n a7, a2, -1 +40104d50: 013f37 bltu a15, a3, 40104d55 +40104d53: 027d mov.n a7, a2 +40104d55: 000632 l8ui a3, a6, 0 +40104d58: 010c22 l8ui a2, a12, 1 +40104d5b: 0149 s32i.n a4, a1, 0 +40104d5d: 2169 s32i.n a6, a1, 8 +40104d5f: 1179 s32i.n a7, a1, 4 +40104d61: 013405 call0 401060a4 +40104d64: 2168 l32i.n a6, a1, 8 +40104d66: 742120 extui a2, a2, 1, 8 +40104d69: 090682 l8ui a8, a6, 9 +40104d6c: 0148 l32i.n a4, a1, 0 +40104d6e: 1178 l32i.n a7, a1, 4 +40104d70: a95c movi.n a9, 90 +40104d72: 688c beqz.n a8, 40104d7c +40104d74: 034c movi.n a3, 64 +40104d76: 0f3387 bltu a3, a8, 40104d89 +40104d79: 64a092 movi a9, 100 +40104d7c: c09920 sub a9, a9, a2 +40104d7f: 130c movi.n a3, 1 +40104d81: 1b3947 bltu a9, a4, 40104da0 +40104d84: 030c movi.n a3, 0 +40104d86: 000586 j 40104da0 +40104d89: 6ea092 movi a9, 110 +40104d8c: c09920 sub a9, a9, a2 +40104d8f: 030c movi.n a3, 0 +40104d91: 0bb947 bgeu a9, a4, 40104da0 +40104d94: 982b addi.n a9, a8, 2 +40104d96: c09920 sub a9, a9, a2 +40104d99: 130c movi.n a3, 1 +40104d9b: 013947 bltu a9, a4, 40104da0 +40104d9e: 030c movi.n a3, 0 +40104da0: 743030 extui a3, a3, 0, 8 +40104da3: 93ec bnez.n a3, 40104dd0 +40104da5: 000b46 j 40104dd6 +40104da8: 090632 l8ui a3, a6, 9 +40104dab: 80a052 movi a5, 128 +40104dae: 903330 addx2 a3, a3, a3 +40104db1: 335a add.n a3, a3, a5 +40104db3: 213230 srai a3, a3, 2 +40104db6: 745030 extui a5, a3, 0, 8 +40104db9: 174c52 s8i a5, a12, 23 +40104dbc: 023547 bltu a5, a4, 40104dc2 +40104dbf: 003046 j 40104e84 +40104dc2: 742020 extui a2, a2, 0, 8 +40104dc5: 323a add.n a3, a2, a3 +40104dc7: 213130 srai a3, a3, 1 +40104dca: 174c32 s8i a3, a12, 23 +40104dcd: 002cc6 j 40104e84 +40104dd0: 162c32 l32i a3, a12, 88 +40104dd3: 433377 bltu a3, a7, 40104e1a +40104dd6: 0b0672 l8ui a7, a6, 11 +40104dd9: 043070 extui a3, a7, 0, 1 +40104ddc: 43cc bnez.n a3, 40104de4 +40104dde: 14e0e0 extui a14, a14, 0, 2 +40104de1: 09fe56 bnez a14, 40104e84 +40104de4: c02820 sub a2, a8, a2 +40104de7: 19a427 bge a4, a2, 40104e04 +40104dea: 15e316 beqz a3, 40104f4c +40104ded: 162c22 l32i a2, a12, 88 +40104df0: ff9f31 l32r a3, 40104c6c +40104df3: 02b327 bgeu a3, a2, 40104df9 +40104df6: 005486 j 40104f4c +40104df9: 1122f0 slli a2, a2, 1 +40104dfc: 166c22 s32i a2, a12, 88 +40104dff: 005246 j 40104f4c +40104e02: 160000 excw +40104e05: 7c07c3 excw +40104e08: 2720e2 l32i a14, a0, 156 +40104e0b: 462210 excw +40104e0e: 210b addi.n a2, a1, -1 +40104e10: 22ff27 bbsi a15, 18, 40104e36 +40104e13: 166c movi.n a6, -31 +40104e15: 001ac6 j 40104e84 +40104e18: 0c0000 excw +40104e1b: 242103 excw +40104e1e: ff .byte 0xff +40104e1f: 0b4632 s8i a3, a6, 11 +40104e22: 166c22 s32i a2, a12, 88 +40104e25: 020c movi.n a2, 0 +40104e27: ac29 s32i.n a2, a12, 40 +40104e29: 9c29 s32i.n a2, a12, 36 +40104e2b: ec29 s32i.n a2, a12, 56 +40104e2d: 164c22 s8i a2, a12, 22 +40104e30: edff21 l32r a2, 4010062c +40104e33: 174c32 s8i a3, a12, 23 +40104e36: 064c32 s8i a3, a12, 6 +40104e39: 01d222 addmi a2, a2, 0x100 +40104e3c: 770ce2 l8ui a14, a12, 119 +40104e3f: fe0222 l8ui a2, a2, 254 +40104e42: 02d2e7 bbs a2, a14, 40104e48 +40104e45: 003f06 j 40104f45 +40104e48: 790c32 l8ui a3, a12, 121 +40104e4b: 5c0c22 l8ui a2, a12, 92 +40104e4e: ff1901 l32r a0, 40104ab4 +40104e51: 0000c0 callx0 a0 +40104e54: ff1731 l32r a3, 40104ab0 +40104e57: 9022e0 addx2 a2, a2, a14 +40104e5a: 902230 addx2 a2, a2, a3 +40104e5d: 000232 l8ui a3, a2, 0 +40104e60: 182c22 l32i a2, a12, 96 +40104e63: 0a0242 l8ui a4, a2, 10 +40104e66: 1ab347 bgeu a3, a4, 40104e84 +40104e69: f4c222 addi a2, a2, -12 +40104e6c: 186c22 s32i a2, a12, 96 +40104e6f: 0b0242 l8ui a4, a2, 11 +40104e72: 130c movi.n a3, 1 +40104e74: 203430 or a3, a4, a3 +40104e77: 0b4232 s8i a3, a2, 11 +40104e7a: f23021 l32r a2, 4010173c +40104e7d: 0020c0 memw +40104e80: 0228 l32i.n a2, a2, 0 +40104e82: cc29 s32i.n a2, a12, 48 +40104e84: 182c22 l32i a2, a12, 96 +40104e87: 790c32 l8ui a3, a12, 121 +40104e8a: 0a02e2 l8ui a14, a2, 10 +40104e8d: 5c0c22 l8ui a2, a12, 92 +40104e90: ff0901 l32r a0, 40104ab4 +40104e93: 0000c0 callx0 a0 +40104e96: 770c42 l8ui a4, a12, 119 +40104e99: 1122f0 slli a2, a2, 1 +40104e9c: ff0551 l32r a5, 40104ab0 +40104e9f: 324a add.n a3, a2, a4 +40104ea1: 903350 addx2 a3, a3, a5 +40104ea4: 000332 l8ui a3, a3, 0 +40104ea7: 113e37 bltu a14, a3, 40104ebc +40104eaa: 424a add.n a4, a2, a4 +40104eac: 90f450 addx2 a15, a4, a5 +40104eaf: 010f22 l8ui a2, a15, 1 +40104eb2: 0e3d mov.n a3, a14 +40104eb4: 01b2e7 bgeu a2, a14, 40104eb9 +40104eb7: 023d mov.n a3, a2 +40104eb9: 743030 extui a3, a3, 0, 8 +40104ebc: 1a2c22 l32i a2, a12, 104 +40104ebf: 903330 addx2 a3, a3, a3 +40104ec2: a03320 addx4 a3, a3, a2 +40104ec5: 020c movi.n a2, 0 +40104ec7: 186c32 s32i a3, a12, 96 +40104eca: ac29 s32i.n a2, a12, 40 +40104ecc: 9c29 s32i.n a2, a12, 36 +40104ece: ec29 s32i.n a2, a12, 56 +40104ed0: ed9b21 l32r a2, 4010053c +40104ed3: 0d38 l32i.n a3, a13, 0 +40104ed5: 1122a0 slli a2, a2, 6 +40104ed8: 202320 or a2, a3, a2 +40104edb: 0d29 s32i.n a2, a13, 0 +40104edd: 182c22 l32i a2, a12, 96 +40104ee0: 000486 j 40104ef6 +40104ee3: 633100 excw +40104ee6: ff .byte 0xff +40104ee7: 028237 bany a2, a3, 40104eed +40104eea: ff7c86 j 40104ce0 +40104eed: 172c22 l32i a2, a12, 92 +40104ef0: dec216 beqz a2, 40104ce0 +40104ef3: ff6021 l32r a2, 40104c74 +40104ef6: 076d22 s32i a2, a13, 28 +40104ef9: 072d22 l32i a2, a13, 28 +40104efc: 005256 bnez a2, 40104f05 +40104eff: ff5e21 l32r a2, 40104c78 +40104f02: fc6d05 call0 401015d4 +40104f05: 0d38 l32i.n a3, a13, 0 +40104f07: 6c8c beqz.n a12, 40104f11 +40104f09: 5c28 l32i.n a2, a12, 20 +40104f0b: 026267 bbci a2, 6, 40104f11 +40104f0e: 1ee397 bbsi a3, 9, 40104f30 +40104f11: edc621 l32r a2, 4010062c +40104f14: 043130 extui a3, a3, 1, 1 +40104f17: 01d222 addmi a2, a2, 0x100 +40104f1a: fa0242 l8ui a4, a2, 250 +40104f1d: 055437 bbc a4, a3, 40104f26 +40104f20: fb0222 l8ui a2, a2, 251 +40104f23: 000306 j 40104f33 +40104f26: 7d28 l32i.n a2, a13, 28 +40104f28: 000222 l8ui a2, a2, 0 +40104f2b: 000106 j 40104f33 +40104f2e: 220000 excw +40104f31: 070c movi.n a7, 0 +40104f33: b108 l32i.n a0, a1, 44 +40104f35: 084d22 s8i a2, a13, 8 +40104f38: a1c8 l32i.n a12, a1, 40 +40104f3a: 91d8 l32i.n a13, a1, 36 +40104f3c: 81e8 l32i.n a14, a1, 32 +40104f3e: 71f8 l32i.n a15, a1, 28 +40104f40: 30c112 addi a1, a1, 48 +40104f43: f00d ret.n +40104f45: 040c32 l8ui a3, a12, 4 +40104f48: ffc506 j 40104e60 +40104f4b: 2c3200 excw +40104f4e: 300b addi.n a3, a0, -1 +40104f50: 2f .byte 0x2f +40104f51: 4220c0 excw +40104f54: bf3720 excw +40104f57: c24202 s8i a0, a2, 194 +40104f5a: ff .byte 0xff +40104f5b: ec9421 l32r a2, 401001ac <_UserExceptionVector_1+0x50> +40104f5e: 023247 bltu a2, a4, 40104f64 +40104f61: ffc7c6 j 40104e84 +40104f64: 0c2d mov.n a2, a12 +40104f66: ffb505 call0 40104ab8 +40104f69: ffc5c6 j 40104e84 + +40104f6c : +40104f6c: 0348 l32i.n a4, a3, 0 +40104f6e: 419640 srli a9, a4, 6 +40104f71: 79f967 bbsi a9, 22, 40104fee +40104f74: 7378 l32i.n a7, a3, 28 +40104f76: 13a8 l32i.n a10, a3, 4 +40104f78: 050c movi.n a5, 0 +40104f7a: 34a4a0 extui a10, a10, 4, 4 +40104f7d: 871b addi.n a8, a7, 1 +40104f7f: 056d mov.n a6, a5 +40104f81: 0008b2 l8ui a11, a8, 0 +40104f84: 8066b0 add a6, a6, a11 +40104f87: 746060 extui a6, a6, 0, 8 +40104f8a: 44aa67 bge a10, a6, 40104fd2 +40104f8d: 008216 beqz a2, 40104f99 +40104f90: 052262 l32i a6, a2, 20 +40104f93: 026667 bbci a6, 6, 40104f99 +40104f96: 2fe937 bbsi a9, 3, 40104fc9 +40104f99: eda421 l32r a2, 4010062c +40104f9c: 044140 extui a4, a4, 1, 1 +40104f9f: 01d222 addmi a2, a2, 0x100 +40104fa2: fa0222 l8ui a2, a2, 250 +40104fa5: 0b5247 bbc a2, a4, 40104fb4 +40104fa8: eda121 l32r a2, 4010062c +40104fab: 01d222 addmi a2, a2, 0x100 +40104fae: fb0222 l8ui a2, a2, 251 +40104fb1: 000d86 j 40104feb +40104fb4: fcdc21 l32r a2, 40104324 +40104fb7: 080222 l8ui a2, a2, 8 +40104fba: fec222 addi a2, a2, -2 +40104fbd: 27aa27 bge a10, a2, 40104fe8 +40104fc0: 905570 addx2 a5, a5, a7 +40104fc3: 000522 l8ui a2, a5, 0 +40104fc6: 000846 j 40104feb +40104fc9: 070222 l8ui a2, a2, 7 +40104fcc: 0006c6 j 40104feb +40104fcf: 000000 ill +40104fd2: 551b addi.n a5, a5, 1 +40104fd4: 882b addi.n a8, a8, 2 +40104fd6: a74566 bnei a5, 4, 40104f81 +40104fd9: ed9421 l32r a2, 4010062c +40104fdc: 044140 extui a4, a4, 1, 1 +40104fdf: 01d222 addmi a2, a2, 0x100 +40104fe2: fa0222 l8ui a2, a2, 250 +40104fe5: bfd247 bbs a2, a4, 40104fa8 +40104fe8: 060722 l8ui a2, a7, 6 +40104feb: 084322 s8i a2, a3, 8 +40104fee: f00d ret.n + +40104ff0 : +40104ff0: 1238 l32i.n a3, a2, 4 +40104ff2: fccc21 l32r a2, 40104324 +40104ff5: 343430 extui a3, a3, 4, 4 +40104ff8: 080242 l8ui a4, a2, 8 +40104ffb: 01a022 movi a2, 1 +40104ffe: 02a347 bge a3, a4, 40105004 +40105001: 00a022 movi a2, 0 +40105004: 042020 extui a2, a2, 0, 1 +40105007: f00d ret.n +40105009: 000000 ill +4010500c: fedee4 excw +4010500f: 3f .byte 0x3f +40105010: defc bnez.n a14, 40105051 +40105012: fe .byte 0xfe +40105013: 3f .byte 0x3f +40105014: 0008 l32i.n a0, a0, 0 +40105016: a83ff2 excw +40105019: f20c movi.n a2, 15 +4010501b: 3f .byte 0x3f +4010501c: 0cac beqz.n a12, 40105040 +4010501e: 413ff2 excw +40105021: fffb addi.n a15, a15, 15 +40105023: 001452 l16ui a5, a4, 0 +40105026: c02520 sub a2, a5, a2 +40105029: f42020 extui a2, a2, 0, 16 +4010502c: 005422 s16i a2, a4, 0 +4010502f: 0a22b6 bltui a2, 2, 4010503d +40105032: 2328 l32i.n a2, a3, 8 +40105034: 2429 s32i.n a2, a4, 8 +40105036: 020c movi.n a2, 0 +40105038: 2329 s32i.n a2, a3, 8 +4010503a: 000f86 j 4010507c +4010503d: 050c movi.n a5, 0 +4010503f: 0f1266 bnei a2, 1, 40105052 +40105042: 2328 l32i.n a2, a3, 8 +40105044: 2429 s32i.n a2, a4, 8 +40105046: 2359 s32i.n a5, a3, 8 +40105048: 3428 l32i.n a2, a4, 12 +4010504a: fff131 l32r a3, 40105010 +4010504d: 2239 s32i.n a3, a2, 8 +4010504f: 000a46 j 4010507c +40105052: 4428 l32i.n a2, a4, 16 +40105054: 5468 l32i.n a6, a4, 20 +40105056: 011472 l16ui a7, a4, 2 +40105059: 2429 s32i.n a2, a4, 8 +4010505b: 4459 s32i.n a5, a4, 16 +4010505d: 3469 s32i.n a6, a4, 12 +4010505f: 056452 s32i a5, a4, 20 +40105062: 005472 s16i a7, a4, 0 +40105065: 015452 s16i a5, a4, 2 +40105068: 041766 bnei a7, 1, 40105070 +4010506b: ffe951 l32r a5, 40105010 +4010506e: 2659 s32i.n a5, a6, 8 +40105070: 050c movi.n a5, 0 +40105072: 2359 s32i.n a5, a3, 8 +40105074: ffe831 l32r a3, 40105014 +40105077: 0020c0 memw +4010507a: 0329 s32i.n a2, a3, 0 +4010507c: 001432 l16ui a3, a4, 0 +4010507f: 011422 l16ui a2, a4, 2 +40105082: 232a add.n a2, a3, a2 +40105084: 2222e6 bgei a2, 2, 401050aa +40105087: ffe441 l32r a4, 40105018 +4010508a: f97021 l32r a2, 4010364c +4010508d: 0020c0 memw +40105090: 0438 l32i.n a3, a4, 0 +40105092: 103320 and a3, a3, a2 +40105095: 0020c0 memw +40105098: 0439 s32i.n a3, a4, 0 +4010509a: ffe031 l32r a3, 4010501c +4010509d: 0020c0 memw +401050a0: 0348 l32i.n a4, a3, 0 +401050a2: 102420 and a2, a4, a2 +401050a5: 0020c0 memw +401050a8: 0329 s32i.n a2, a3, 0 +401050aa: f00d ret.n +401050ac: 1058 l32i.n a5, a0, 4 +401050ae: 703ff2 excw +401050b1: 9f .byte 0x9f +401050b2: fe .byte 0xfe +401050b3: 3f .byte 0x3f + +401050b4 : +401050b4: fffe41 l32r a4, 401050ac +401050b7: ed3b31 l32r a3, 401005a4 +401050ba: 0020c0 memw +401050bd: 0458 l32i.n a5, a4, 0 +401050bf: 203530 or a3, a5, a3 +401050c2: 0020c0 memw +401050c5: 0439 s32i.n a3, a4, 0 +401050c7: fffa31 l32r a3, 401050b0 +401050ca: 1329 s32i.n a2, a3, 4 +401050cc: f00d ret.n +401050ce: 4c0000 excw +401050d1: 3ff210 excw +401050d4: 1048 l32i.n a4, a0, 4 +401050d6: cc3ff2 excw +401050d9: 3ff210 excw +401050dc: f210d0 excw +401050df: 3f .byte 0x3f +401050e0: 10c8 l32i.n a12, a0, 4 +401050e2: f2 .byte 0xf2 +401050e3: 3f .byte 0x3f + +401050e4 : +401050e4: f0c112 addi a1, a1, -16 +401050e7: 21c9 s32i.n a12, a1, 8 +401050e9: 3109 s32i.n a0, a1, 12 +401050eb: 20c220 or a12, a2, a2 +401050ee: ec9301 l32r a0, 4010033c +401050f1: 0000c0 callx0 a0 +401050f4: fff731 l32r a3, 401050d0 +401050f7: fff721 l32r a2, 401050d4 +401050fa: 0020c0 memw +401050fd: 0358 l32i.n a5, a3, 0 +401050ff: 0020c0 memw +40105102: 0248 l32i.n a4, a2, 0 +40105104: 0020c0 memw +40105107: 0338 l32i.n a3, a3, 0 +40105109: 041537 beq a5, a3, 40105111 +4010510c: 0020c0 memw +4010510f: 0248 l32i.n a4, a2, 0 +40105111: 24ca add.n a2, a4, a12 +40105113: 013427 bltu a4, a2, 40105118 +40105116: 331b addi.n a3, a3, 1 +40105118: fff041 l32r a4, 401050d8 +4010511b: 0020c0 memw +4010511e: 0429 s32i.n a2, a4, 0 +40105120: ffef21 l32r a2, 401050dc +40105123: 0020c0 memw +40105126: 0239 s32i.n a3, a2, 0 +40105128: ffee31 l32r a3, 401050e0 +4010512b: ed1e21 l32r a2, 401005a4 +4010512e: 0020c0 memw +40105131: 0348 l32i.n a4, a3, 0 +40105133: 202420 or a2, a4, a2 +40105136: 0020c0 memw +40105139: 0329 s32i.n a2, a3, 0 +4010513b: f25f01 l32r a0, 40101ab8 +4010513e: 0000c0 callx0 a0 +40105141: 3108 l32i.n a0, a1, 12 +40105143: 21c8 l32i.n a12, a1, 8 +40105145: 10c112 addi a1, a1, 16 +40105148: f00d ret.n +4010514a: c00000 sub a0, a0, a0 +4010514d: f20d ret.n +4010514f: 3f .byte 0x3f + +40105150 : +40105150: 742020 extui a2, a2, 0, 8 +40105153: 1132e0 slli a3, a2, 2 +40105156: c02230 sub a2, a2, a3 +40105159: fffc31 l32r a3, 4010514c +4010515c: 1122d0 slli a2, a2, 3 +4010515f: 944040 extui a4, a4, 0, 10 +40105162: 323a add.n a3, a2, a3 +40105164: 114440 slli a4, a4, 12 +40105167: 0020c0 memw +4010516a: 0349 s32i.n a4, a3, 0 +4010516c: fc2831 l32r a3, 4010420c +4010516f: 223a add.n a2, a2, a3 +40105171: 0020c0 memw +40105174: 0248 l32i.n a4, a2, 0 +40105176: fc2431 l32r a3, 40104208 +40105179: 203430 or a3, a4, a3 +4010517c: 0020c0 memw +4010517f: 0239 s32i.n a3, a2, 0 +40105181: f00d ret.n + ... + +40105184 : +40105184: 742020 extui a2, a2, 0, 8 +40105187: 1132e0 slli a3, a2, 2 +4010518a: c02230 sub a2, a2, a3 +4010518d: fc1f31 l32r a3, 4010420c +40105190: b02230 addx8 a2, a2, a3 +40105193: 0020c0 memw +40105196: 0248 l32i.n a4, a2, 0 +40105198: fc1e31 l32r a3, 40104210 +4010519b: 103430 and a3, a4, a3 +4010519e: 0020c0 memw +401051a1: 0239 s32i.n a3, a2, 0 +401051a3: f00d ret.n +401051a5: 000000 ill + +401051a8 : +401051a8: f0c112 addi a1, a1, -16 +401051ab: 742020 extui a2, a2, 0, 8 +401051ae: 036102 s32i a0, a1, 12 +401051b1: fffd05 call0 40105184 +401051b4: 032102 l32i a0, a1, 12 +401051b7: 10c112 addi a1, a1, 16 +401051ba: 000080 ret +401051bd: 000000 ill + +401051c0 : +401051c0: fc0f21 l32r a2, 401041fc +401051c3: 0020c0 memw +401051c6: 0228 l32i.n a2, a2, 0 +401051c8: b42020 extui a2, a2, 0, 12 +401051cb: f00d ret.n +401051cd: 000000 ill + +401051d0 : +401051d0: fc0b31 l32r a3, 401041fc +401051d3: eced21 l32r a2, 40100588 +401051d6: 0020c0 memw +401051d9: 0348 l32i.n a4, a3, 0 +401051db: 102420 and a2, a4, a2 +401051de: 0020c0 memw +401051e1: 0329 s32i.n a2, a3, 0 +401051e3: f00d ret.n +401051e5: 000000 ill +401051e8: ff .byte 0xff +401051e9: 0f .byte 0xf +401051ea: 0cff00 excw +401051ed: fe88 l32i.n a8, a14, 60 +401051ef: 3f .byte 0x3f +401051f0: fe8630 excw +401051f3: 3f .byte 0x3f + +401051f4 : +401051f4: f0c112 addi a1, a1, -16 +401051f7: 21c9 s32i.n a12, a1, 8 +401051f9: 01e9 s32i.n a14, a1, 0 +401051fb: f4c040 extui a12, a4, 0, 16 +401051fe: 03ed mov.n a14, a3 +40105200: f47641 l32r a4, 401023d8 +40105203: ece831 l32r a3, 401005a4 +40105206: f47381 l32r a8, 401023d4 +40105209: fff791 l32r a9, 401051e8 +4010520c: 11d9 s32i.n a13, a1, 4 +4010520e: 025d mov.n a5, a2 +40105210: 02dd mov.n a13, a2 +40105212: 3109 s32i.n a0, a1, 12 +40105214: 020c movi.n a2, 0 +40105216: 04b516 beqz a5, 40105265 +40105219: 0020c0 memw +4010521c: 0568 l32i.n a6, a5, 0 +4010521e: 221b addi.n a2, a2, 1 +40105220: 206630 or a6, a6, a3 +40105223: 0020c0 memw +40105226: 0569 s32i.n a6, a5, 0 +40105228: 0020c0 memw +4010522b: 0568 l32i.n a6, a5, 0 +4010522d: f42020 extui a2, a2, 0, 16 +40105230: 106640 and a6, a6, a4 +40105233: 0020c0 memw +40105236: 0569 s32i.n a6, a5, 0 +40105238: 0020c0 memw +4010523b: 0568 l32i.n a6, a5, 0 +4010523d: 106680 and a6, a6, a8 +40105240: 0020c0 memw +40105243: 0569 s32i.n a6, a5, 0 +40105245: 0020c0 memw +40105248: 0568 l32i.n a6, a5, 0 +4010524a: b46060 extui a6, a6, 0, 12 +4010524d: 117640 slli a7, a6, 12 +40105250: 0020c0 memw +40105253: 0568 l32i.n a6, a5, 0 +40105255: 106690 and a6, a6, a9 +40105258: 206670 or a6, a6, a7 +4010525b: 0020c0 memw +4010525e: 0569 s32i.n a6, a5, 0 +40105260: 2558 l32i.n a5, a5, 8 +40105262: ffec06 j 40105216 +40105265: 1312c7 beq a2, a12, 4010527c +40105268: ffe131 l32r a3, 401051ec +4010526b: ffe121 l32r a2, 401051f0 +4010526e: 14a642 movi a4, 0x614 +40105271: ebc301 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105274: 0000c0 callx0 a0 +40105277: ffff06 j 40105277 +4010527a: 010000 slli a0, a0, 32 +4010527d: c0ec30 sub a14, a12, a3 +40105280: 510000 excw +40105283: 42ff62 excw +40105286: dc0015 excw +40105289: 622184 excw +4010528c: ff .byte 0xff +4010528d: 25d9 s32i.n a13, a5, 8 +4010528f: 0020c0 memw +40105292: 02d9 s32i.n a13, a2, 0 +40105294: 0055c2 s16i a12, a5, 0 +40105297: 35e9 s32i.n a14, a5, 12 +40105299: 331c66 bnei a12, 1, 401052d0 +4010529c: ff5d21 l32r a2, 40105010 +4010529f: 2e29 s32i.n a2, a14, 8 +401052a1: 000ac6 j 401052d0 +401052a4: 1d1466 bnei a4, 1, 401052c5 +401052a7: 4528 l32i.n a2, a5, 16 +401052a9: 52cc bnez.n a2, 401052b2 +401052ab: 45d9 s32i.n a13, a5, 16 +401052ad: 55e9 s32i.n a14, a5, 20 +401052af: 000286 j 401052bd +401052b2: 5528 l32i.n a2, a5, 20 +401052b4: 011542 l16ui a4, a5, 2 +401052b7: 22d9 s32i.n a13, a2, 8 +401052b9: 55e9 s32i.n a14, a5, 20 +401052bb: cc4a add.n a12, a12, a4 +401052bd: 0155c2 s16i a12, a5, 2 +401052c0: 000306 j 401052d0 +401052c3: 280000 excw +401052c6: 4c4a35 excw +401052c9: 22d9 s32i.n a13, a2, 8 +401052cb: 005542 s16i a4, a5, 0 +401052ce: 35e9 s32i.n a14, a5, 12 +401052d0: 001532 l16ui a3, a5, 0 +401052d3: 011522 l16ui a2, a5, 2 +401052d6: 232a add.n a2, a3, a2 +401052d8: 3022a6 blti a2, 2, 4010530c +401052db: ff4f51 l32r a5, 40105018 +401052de: f8db21 l32r a2, 4010364c +401052e1: 0020c0 memw +401052e4: 0538 l32i.n a3, a5, 0 +401052e6: 104320 and a4, a3, a2 +401052e9: f3f731 l32r a3, 401022c8 +401052ec: 203430 or a3, a4, a3 +401052ef: ff4b41 l32r a4, 4010501c +401052f2: 0020c0 memw +401052f5: 0539 s32i.n a3, a5, 0 +401052f7: 0020c0 memw +401052fa: 002432 l32i a3, a4, 0 +401052fd: 102320 and a2, a3, a2 +40105300: f80631 l32r a3, 40103318 +40105303: 202230 or a2, a2, a3 +40105306: 0020c0 memw +40105309: 006422 s32i a2, a4, 0 +4010530c: f1eb01 l32r a0, 40101ab8 +4010530f: 0000c0 callx0 a0 +40105312: 3108 l32i.n a0, a1, 12 +40105314: 21c8 l32i.n a12, a1, 8 +40105316: 11d8 l32i.n a13, a1, 4 +40105318: 01e8 l32i.n a14, a1, 0 +4010531a: 10c112 addi a1, a1, 16 +4010531d: f00d ret.n +4010531f: c11200 mul16u a1, a2, a0 +40105322: 61c2f0 xsr.eps2 a15 +40105325: c22002 l32i a0, a0, 0x308 +40105328: 382120 excw +4010532b: ff .byte 0xff +4010532c: 11d9 s32i.n a13, a1, 4 +4010532e: 03dd mov.n a13, a3 +40105330: 01e9 s32i.n a14, a1, 0 +40105332: 0c3d mov.n a3, a12 +40105334: 22e8 l32i.n a14, a2, 8 +40105336: 0d2d mov.n a2, a13 +40105338: 3109 s32i.n a0, a1, 12 +4010533a: ffce45 call0 40105020 +4010533d: 0d4d mov.n a4, a13 +4010533f: 0c3d mov.n a3, a12 +40105341: 0e2d mov.n a2, a14 +40105343: ffeb05 call0 401051f4 +40105346: 3108 l32i.n a0, a1, 12 +40105348: 21c8 l32i.n a12, a1, 8 +4010534a: 11d8 l32i.n a13, a1, 4 +4010534c: 01e8 l32i.n a14, a1, 0 +4010534e: 10c112 addi a1, a1, 16 +40105351: f00d ret.n +40105353: 000c00 excw +40105356: f2 .byte 0xf2 +40105357: 3f .byte 0x3f + +40105358 : +40105358: f0c112 addi a1, a1, -16 +4010535b: 21c9 s32i.n a12, a1, 8 +4010535d: 11d9 s32i.n a13, a1, 4 +4010535f: 01e9 s32i.n a14, a1, 0 +40105361: 02cd mov.n a12, a2 +40105363: 03dd mov.n a13, a3 +40105365: f4e040 extui a14, a4, 0, 16 +40105368: 025d mov.n a5, a2 +4010536a: f41b31 l32r a3, 401023d8 +4010536d: ec8d21 l32r a2, 401005a4 +40105370: f41941 l32r a4, 401023d4 +40105373: ff9d91 l32r a9, 401051e8 +40105376: 3109 s32i.n a0, a1, 12 +40105378: 080c movi.n a8, 0 +4010537a: 04b516 beqz a5, 401053c9 +4010537d: 0020c0 memw +40105380: 0568 l32i.n a6, a5, 0 +40105382: 881b addi.n a8, a8, 1 +40105384: 206620 or a6, a6, a2 +40105387: 0020c0 memw +4010538a: 0569 s32i.n a6, a5, 0 +4010538c: 0020c0 memw +4010538f: 0568 l32i.n a6, a5, 0 +40105391: f48080 extui a8, a8, 0, 16 +40105394: 106630 and a6, a6, a3 +40105397: 0020c0 memw +4010539a: 0569 s32i.n a6, a5, 0 +4010539c: 0020c0 memw +4010539f: 0568 l32i.n a6, a5, 0 +401053a1: 106640 and a6, a6, a4 +401053a4: 0020c0 memw +401053a7: 0569 s32i.n a6, a5, 0 +401053a9: 0020c0 memw +401053ac: 0568 l32i.n a6, a5, 0 +401053ae: b46060 extui a6, a6, 0, 12 +401053b1: 117640 slli a7, a6, 12 +401053b4: 0020c0 memw +401053b7: 0568 l32i.n a6, a5, 0 +401053b9: 106690 and a6, a6, a9 +401053bc: 206670 or a6, a6, a7 +401053bf: 0020c0 memw +401053c2: 0569 s32i.n a6, a5, 0 +401053c4: 2558 l32i.n a5, a5, 8 +401053c6: ffec06 j 4010537a +401053c9: 1318e7 beq a8, a14, 401053e0 +401053cc: ff8831 l32r a3, 401051ec +401053cf: ff8821 l32r a2, 401051f0 +401053d2: 5ea642 movi a4, 0x65e +401053d5: eb6a01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401053d8: 0000c0 callx0 a0 +401053db: ffff06 j 401053db +401053de: 010000 slli a0, a0, 32 +401053e1: c0ebd7 bbsi a11, 13, 401053a5 +401053e4: 510000 excw +401053e7: ff09 s32i.n a0, a15, 60 +401053e9: c528 l32i.n a2, a5, 48 +401053eb: 528c beqz.n a2, 401053f4 +401053ed: d528 l32i.n a2, a5, 52 +401053ef: 22c9 s32i.n a12, a2, 8 +401053f1: 000246 j 401053fe +401053f4: ffd821 l32r a2, 40105354 +401053f7: c5c9 s32i.n a12, a5, 48 +401053f9: 0020c0 memw +401053fc: 02c9 s32i.n a12, a2, 0 +401053fe: 040522 l8ui a2, a5, 4 +40105401: d5d9 s32i.n a13, a5, 52 +40105403: 4e2a add.n a4, a14, a2 +40105405: 044542 s8i a4, a5, 4 +40105408: f1ac01 l32r a0, 40101ab8 +4010540b: 0000c0 callx0 a0 +4010540e: 3108 l32i.n a0, a1, 12 +40105410: 21c8 l32i.n a12, a1, 8 +40105412: 11d8 l32i.n a13, a1, 4 +40105414: 01e8 l32i.n a14, a1, 0 +40105416: 10c112 addi a1, a1, 16 +40105419: f00d ret.n +4010541b: 322000 excw +4010541e: fb4120 excw +40105421: fe .byte 0xfe +40105422: f0c112 addi a1, a1, -16 +40105425: 022352 l32i a5, a3, 8 +40105428: 036102 s32i a0, a1, 12 +4010542b: c428 l32i.n a2, a4, 48 +4010542d: c459 s32i.n a5, a4, 48 +4010542f: 050c movi.n a5, 0 +40105431: 2359 s32i.n a5, a3, 8 +40105433: 040452 l8ui a5, a4, 4 +40105436: 550b addi.n a5, a5, -1 +40105438: 044452 s8i a5, a4, 4 +4010543b: 140c movi.n a4, 1 +4010543d: fff185 call0 40105358 +40105440: 3108 l32i.n a0, a1, 12 +40105442: 10c112 addi a1, a1, 16 +40105445: f00d ret.n +40105447: 0c1800 excw +4010544a: 203ff2 excw +4010544d: f20c movi.n a2, 15 +4010544f: 3f .byte 0x3f +40105450: f20c84 excw +40105453: 3f .byte 0x3f +40105454: f20c24 excw +40105457: 3f .byte 0x3f +40105458: 10fc bnez.n a0, 4010548d +4010545a: 1c3ff2 excw +4010545d: f20c movi.n a2, 15 +4010545f: 3f .byte 0x3f +40105460: f201d4 excw +40105463: 3f .byte 0x3f +40105464: f20c70 excw +40105467: 3f .byte 0x3f +40105468: 0038 l32i.n a3, a0, 0 +4010546a: 4e3ff2 excw +4010546d: 0008 l32i.n a0, a0, 0 +4010546f: ff2300 excw +40105472: 554022 s8i a2, a0, 85 +40105475: 0008 l32i.n a0, a0, 0 +40105477: c00000 sub a0, a0, a0 +4010547a: 5a0000 excw +4010547d: 0008 l32i.n a0, a0, 0 +4010547f: 086000 excw +40105482: 120000 excw +40105485: 0008 l32i.n a0, a0, 0 +40105487: 081900 excw +4010548a: 1d0000 excw +4010548d: 0008 l32i.n a0, a0, 0 +4010548f: 082300 excw +40105492: 1c0000 excw +40105495: 3ff200 excw +40105498: f20014 excw +4010549b: 3f .byte 0x3f +4010549c: 0018 l32i.n a1, a0, 0 +4010549e: cf3ff2 excw +401054a1: 0008 l32i.n a0, a0, 0 +401054a3: 092900 excw +401054a6: 2c0000 excw +401054a9: 0009 s32i.n a0, a0, 0 +401054ab: 82a500 mull a10, a5, a0 +401054ae: fe .byte 0xfe +401054af: 3f .byte 0x3f +401054b0: 000000 ill +401054b3: cd30a0 excw +401054b6: fe .byte 0xfe +401054b7: 3f .byte 0x3f +401054b8: 0f0000 excw +401054bb: 0e0400 excw +401054be: 103ff2 excw +401054c1: fe88 l32i.n a8, a14, 60 +401054c3: 3f .byte 0x3f +401054c4: 0e .byte 0xe +401054c5: 0009 s32i.n a0, a0, 0 +401054c7: 091000 excw +401054ca: b40000 extui a0, a0, 0, 12 +401054cd: 400031 l32r a3, 400d54d0 <__floatsidf+0xc71e0> + +401054d0 : +401054d0: ffde21 l32r a2, 40105448 +401054d3: b0c112 addi a1, a1, -80 +401054d6: 0020c0 memw +401054d9: 0238 l32i.n a3, a2, 0 +401054db: 136102 s32i a0, a1, 76 +401054de: 6139 s32i.n a3, a1, 24 +401054e0: ffdb31 l32r a3, 4010544c +401054e3: 1261c2 s32i a12, a1, 72 +401054e6: 0020c0 memw +401054e9: 0338 l32i.n a3, a3, 0 +401054eb: 1161d2 s32i a13, a1, 68 +401054ee: 0139 s32i.n a3, a1, 0 +401054f0: ffd831 l32r a3, 40105450 +401054f3: 1061e2 s32i a14, a1, 64 +401054f6: 0020c0 memw +401054f9: 0338 l32i.n a3, a3, 0 +401054fb: f1f9 s32i.n a15, a1, 60 +401054fd: 4139 s32i.n a3, a1, 16 +401054ff: 030c movi.n a3, 0 +40105501: 0020c0 memw +40105504: 0239 s32i.n a3, a2, 0 +40105506: 0148 l32i.n a4, a1, 0 +40105508: ffd321 l32r a2, 40105454 +4010550b: 0020c0 memw +4010550e: 0249 s32i.n a4, a2, 0 +40105510: 029437 bne a4, a3, 40105516 +40105513: 017446 j 40105ae8 +40105516: 1474c7 bbci a4, 28, 4010552e +40105519: ff3431 l32r a3, 401051ec +4010551c: ff3521 l32r a2, 401051f0 +4010551f: 8aa442 movi a4, 0x48a +40105522: eb1701 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105525: 0000c0 callx0 a0 +40105528: ffff06 j 40105528 +4010552b: 000000 ill +4010552e: 0158 l32i.n a5, a1, 0 +40105530: 0975b7 bbci a5, 27, 4010553d +40105533: fedf21 l32r a2, 401050b0 +40105536: 0228 l32i.n a2, a2, 0 +40105538: 128c beqz.n a2, 4010553d +4010553a: 0002c0 callx0 a2 +4010553d: 0128 l32i.n a2, a1, 0 +4010553f: 0972a7 bbci a2, 26, 4010554c +40105542: fedb21 l32r a2, 401050b0 +40105545: 1228 l32i.n a2, a2, 4 +40105547: 128c beqz.n a2, 4010554c +40105549: 0002c0 callx0 a2 +4010554c: 0138 l32i.n a3, a1, 0 +4010554e: c20c movi.n a2, 12 +40105550: 102320 and a2, a3, a2 +40105553: 028226 beqi a2, 8, 40105559 +40105556: 0047c6 j 40105679 +40105559: ffbf21 l32r a2, 40105458 +4010555c: f07851 l32r a5, 4010173c +4010555f: 0020c0 memw +40105562: 0248 l32i.n a4, a2, 0 +40105564: ffbe61 l32r a6, 4010545c +40105567: d31c movi.n a3, 29 +40105569: 470c movi.n a7, 4 +4010556b: 0020c0 memw +4010556e: 0528 l32i.n a2, a5, 0 +40105570: c02240 sub a2, a2, a4 +40105573: 0d3327 bltu a3, a2, 40105584 +40105576: 0020c0 memw +40105579: 0628 l32i.n a2, a6, 0 +4010557b: 020277 bnone a2, a7, 40105581 +4010557e: 007186 j 40105748 +40105581: fff986 j 4010556b +40105584: ffb721 l32r a2, 40105460 +40105587: 0020c0 memw +4010558a: 0228 l32i.n a2, a2, 0 +4010558c: 742820 extui a2, a2, 8, 8 +4010558f: 0282f6 bgeui a2, 8, 40105595 +40105592: 006c86 j 40105748 +40105595: ffb331 l32r a3, 40105464 +40105598: d27c movi.n a2, -3 +4010559a: 0020c0 memw +4010559d: 0348 l32i.n a4, a3, 0 +4010559f: 102420 and a2, a4, a2 +401055a2: ffae41 l32r a4, 4010545c +401055a5: 0020c0 memw +401055a8: 0329 s32i.n a2, a3, 0 +401055aa: 04a022 movi a2, 4 +401055ad: 0020c0 memw +401055b0: 002432 l32i a3, a4, 0 +401055b3: f60327 bnone a3, a2, 401055ad +401055b6: ffa721 l32r a2, 40105454 +401055b9: 04a032 movi a3, 4 +401055bc: 0020c0 memw +401055bf: 0239 s32i.n a3, a2, 0 +401055c1: ffa921 l32r a2, 40105468 +401055c4: d33c movi.n a3, 61 +401055c6: 0020c0 memw +401055c9: 0228 l32i.n a2, a2, 0 +401055cb: bec222 addi a2, a2, -66 +401055ce: 742020 extui a2, a2, 0, 8 +401055d1: 023327 bltu a3, a2, 401055d7 +401055d4: 002306 j 40105664 +401055d7: fe8d21 l32r a2, 4010500c +401055da: ffa5c1 l32r a12, 40105470 +401055dd: 2228 l32i.n a2, a2, 8 +401055df: ffa341 l32r a4, 4010546c +401055e2: 12f8 l32i.n a15, a2, 4 +401055e4: 050c movi.n a5, 0 +401055e6: 0c3d mov.n a3, a12 +401055e8: c20c movi.n a2, 12 +401055ea: fcaac5 call0 40102098 +401055ed: 02dd mov.n a13, a2 +401055ef: 071216 beqz a2, 40105664 +401055f2: c40c movi.n a4, 12 +401055f4: 0f3d mov.n a3, a15 +401055f6: ec4a01 l32r a0, 40100720 +401055f9: 0000c0 callx0 a0 +401055fc: 008a85 call0 40105ea8 +401055ff: 12dc bnez.n a2, 40105614 +40105601: ff9c41 l32r a4, 40105474 +40105604: fefa31 l32r a3, 401051ec +40105607: fefa21 l32r a2, 401051f0 +4010560a: eadd01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +4010560d: 0000c0 callx0 a0 +40105610: ffff06 j 40105610 +40105613: 022200 excw +40105616: 2d4806 j 40110b3a <_lit4_end+0xa80e> +40105619: 342020 extui a2, a2, 0, 4 +4010561c: 113200 slli a3, a2, 16 +4010561f: f83c21 l32r a2, 40103710 +40105622: 102420 and a2, a4, a2 +40105625: 202230 or a2, a2, a3 +40105628: 2d29 s32i.n a2, a13, 8 +4010562a: 0d38 l32i.n a3, a13, 0 +4010562c: ff9321 l32r a2, 40105478 +4010562f: 120327 bnone a3, a2, 40105645 +40105632: 1d28 l32i.n a2, a13, 4 +40105634: 05e277 bbsi a2, 7, 4010563d +40105637: 643020 extui a3, a2, 0, 7 +4010563a: 0783a6 blti a3, 8, 40105645 +4010563d: 642020 extui a2, a2, 0, 7 +40105640: f31c movi.n a3, 31 +40105642: 06a327 bge a3, a2, 4010564c +40105645: ff8d41 l32r a4, 4010547c +40105648: 000446 j 4010565d +4010564b: 4dd000 excw +4010564e: a03220 addx4 a3, a2, a2 +40105651: 2c09 s32i.n a0, a12, 8 +40105653: 8f8502 excw +40105656: fe .byte 0xfe +40105657: 091266 bnei a2, 1, 40105664 +4010565a: ff8941 l32r a4, 40105480 +4010565d: 0c3d mov.n a3, a12 +4010565f: 0d2d mov.n a2, a13 +40105661: fc86c5 call0 40101ed0 +40105664: ff8031 l32r a3, 40105464 +40105667: 220c movi.n a2, 2 +40105669: 0020c0 memw +4010566c: 0348 l32i.n a4, a3, 0 +4010566e: 202420 or a2, a4, a2 +40105671: 0020c0 memw +40105674: 0329 s32i.n a2, a3, 0 +40105676: 003386 j 40105748 +40105679: 002142 l32i a4, a1, 0 +4010567c: 04a122 movi a2, 0x104 +4010567f: 102420 and a2, a4, a2 +40105682: 024226 beqi a2, 4, 40105688 +40105685: 002fc6 j 40105748 +40105688: ff7821 l32r a2, 40105468 +4010568b: 3da032 movi a3, 61 +4010568e: 0020c0 memw +40105691: 0228 l32i.n a2, a2, 0 +40105693: bec222 addi a2, a2, -66 +40105696: 742020 extui a2, a2, 0, 8 +40105699: 023327 bltu a3, a2, 4010569f +4010569c: 002a06 j 40105748 +4010569f: fe5b21 l32r a2, 4010500c +401056a2: 2228 l32i.n a2, a2, 8 +401056a4: 12f8 l32i.n a15, a2, 4 +401056a6: ff7421 l32r a2, 40105478 +401056a9: 0f38 l32i.n a3, a15, 0 +401056ab: 028327 bany a3, a2, 401056b1 +401056ae: 002586 j 40105748 +401056b1: 1f28 l32i.n a2, a15, 4 +401056b3: 0be277 bbsi a2, 7, 401056c2 +401056b6: 643020 extui a3, a2, 0, 7 +401056b9: 0583e6 bgei a3, 8, 401056c2 +401056bc: 02f2e7 bbsi a2, 30, 401056c2 +401056bf: 002146 j 40105748 +401056c2: ff6bc1 l32r a12, 40105470 +401056c5: ff6f41 l32r a4, 40105484 +401056c8: 050c movi.n a5, 0 +401056ca: 0c3d mov.n a3, a12 +401056cc: c20c movi.n a2, 12 +401056ce: fc9c85 call0 40102098 +401056d1: 02dd mov.n a13, a2 +401056d3: 071216 beqz a2, 40105748 +401056d6: c40c movi.n a4, 12 +401056d8: 0f3d mov.n a3, a15 +401056da: ec1101 l32r a0, 40100720 +401056dd: 0000c0 callx0 a0 +401056e0: 007c45 call0 40105ea8 +401056e3: 12dc bnez.n a2, 401056f8 +401056e5: ff6841 l32r a4, 40105488 +401056e8: fec131 l32r a3, 401051ec +401056eb: fec121 l32r a2, 401051f0 +401056ee: eaa401 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401056f1: 0000c0 callx0 a0 +401056f4: ffff06 j 401056f4 +401056f7: 022200 excw +401056fa: 2d4806 j 40110c1e <_lit4_end+0xa8f2> +401056fd: 342020 extui a2, a2, 0, 4 +40105700: 113200 slli a3, a2, 16 +40105703: f80321 l32r a2, 40103710 +40105706: 102420 and a2, a4, a2 +40105709: 202230 or a2, a2, a3 +4010570c: 2d29 s32i.n a2, a13, 8 +4010570e: 0d38 l32i.n a3, a13, 0 +40105710: ff5a21 l32r a2, 40105478 +40105713: 150327 bnone a3, a2, 4010572c +40105716: 1d28 l32i.n a2, a13, 4 +40105718: 08e277 bbsi a2, 7, 40105724 +4010571b: 643020 extui a3, a2, 0, 7 +4010571e: 0283e6 bgei a3, 8, 40105724 +40105721: 0772e7 bbci a2, 30, 4010572c +40105724: 642020 extui a2, a2, 0, 7 +40105727: f31c movi.n a3, 31 +40105729: 05a327 bge a3, a2, 40105732 +4010572c: ff5841 l32r a4, 4010548c +4010572f: 000386 j 40105741 +40105732: 0d4d mov.n a4, a13 +40105734: 930c movi.n a3, 9 +40105736: 022c movi.n a2, 32 +40105738: fe8145 call0 40103f50 +4010573b: 091266 bnei a2, 1, 40105748 +4010573e: ff5441 l32r a4, 40105490 +40105741: 0c3d mov.n a3, a12 +40105743: 0d2d mov.n a2, a13 +40105745: fc7885 call0 40101ed0 +40105748: 0158 l32i.n a5, a1, 0 +4010574a: 02e587 bbsi a5, 8, 40105750 +4010574d: 00b6c6 j 40105a2c +40105750: fe2ff1 l32r a15, 4010500c +40105753: ff5021 l32r a2, 40105494 +40105756: 050f52 l8ui a5, a15, 5 +40105759: 0020c0 memw +4010575c: 0228 l32i.n a2, a2, 0 +4010575e: ff3e31 l32r a3, 40105458 +40105761: ff4d41 l32r a4, 40105498 +40105764: ff4e21 l32r a2, 4010549c +40105767: 24d516 beqz a5, 401059b8 +4010576a: 0020c0 memw +4010576d: 0448 l32i.n a4, a4, 0 +4010576f: 0020c0 memw +40105772: 0338 l32i.n a3, a3, 0 +40105774: 3149 s32i.n a4, a1, 12 +40105776: 0020c0 memw +40105779: 0228 l32i.n a2, a2, 0 +4010577b: 14dc bnez.n a4, 40105790 +4010577d: fe9b31 l32r a3, 401051ec +40105780: fe9c21 l32r a2, 401051f0 +40105783: cfa442 movi a4, 0x4cf +40105786: ea7e01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105789: 0000c0 callx0 a0 +4010578c: ffff06 j 4010578c +4010578f: 313800 srai a3, a0, 24 +40105792: 2328 l32i.n a2, a3, 8 +40105794: 02dc bnez.n a2, 401057a8 +40105796: fe9531 l32r a3, 401051ec +40105799: fe9521 l32r a2, 401051f0 +4010579c: d0a442 movi a4, 0x4d0 +4010579f: ea7801 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401057a2: 0000c0 callx0 a0 +401057a5: ffff06 j 401057a5 +401057a8: 3148 l32i.n a4, a1, 12 +401057aa: 0020c0 memw +401057ad: 0428 l32i.n a2, a4, 0 +401057af: 11f2e7 bbsi a2, 30, 401057c4 +401057b2: fe8e31 l32r a3, 401051ec +401057b5: fe8e21 l32r a2, 401051f0 +401057b8: d1a442 movi a4, 0x4d1 +401057bb: ea7101 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401057be: 0000c0 callx0 a0 +401057c1: ffff06 j 401057c1 +401057c4: 2fe8 l32i.n a14, a15, 8 +401057c6: 262e16 beqz a14, 40105a2c +401057c9: 0020c0 memw +401057cc: 0e28 l32i.n a2, a14, 0 +401057ce: 06f2e7 bbsi a2, 30, 401057d8 +401057d1: 2ee8 l32i.n a14, a14, 8 +401057d3: fffc86 j 401057c9 +401057d6: 510000 excw +401057d9: fe0d ret.n +401057db: f36931 l32r a3, 40102580 +401057de: 25c8 l32i.n a12, a5, 8 +401057e0: 140c movi.n a4, 1 +401057e2: 1cf8 l32i.n a15, a12, 4 +401057e4: 1149 s32i.n a4, a1, 4 +401057e6: 2fcb addi.n a2, a15, 12 +401057e8: 2129 s32i.n a2, a1, 8 +401057ea: 1f28 l32i.n a2, a15, 4 +401057ec: 102230 and a2, a2, a3 +401057ef: 0020c0 memw +401057f2: 0c38 l32i.n a3, a12, 0 +401057f4: 0df3e7 bbsi a3, 30, 40105805 +401057f7: 1158 l32i.n a5, a1, 4 +401057f9: 2cc8 l32i.n a12, a12, 8 +401057fb: d51b addi.n a13, a5, 1 +401057fd: f4d0d0 extui a13, a13, 0, 16 +40105800: 11d9 s32i.n a13, a1, 4 +40105802: fffa46 j 401057ef +40105805: ff1a31 l32r a3, 40105470 +40105808: 115216 beqz a2, 40105921 +4010580b: fe0021 l32r a2, 4010500c +4010580e: ff2441 l32r a4, 401054a0 +40105811: c228 l32i.n a2, a2, 48 +40105813: 050c movi.n a5, 0 +40105815: 5129 s32i.n a2, a1, 20 +40105817: 090f22 l8ui a2, a15, 9 +4010581a: 220b addi.n a2, a2, -1 +4010581c: a02220 addx4 a2, a2, a2 +4010581f: 1122f0 slli a2, a2, 1 +40105822: 3cc222 addi a2, a2, 60 +40105825: fc8705 call0 40102098 +40105828: 02dd mov.n a13, a2 +4010582a: 12dc bnez.n a2, 4010583f +4010582c: 1138 l32i.n a3, a1, 4 +4010582e: 202cc0 or a2, a12, a12 +40105831: ffaec5 call0 40105320 +40105834: fdf621 l32r a2, 4010500c +40105837: c228 l32i.n a2, a2, 48 +40105839: ffbe05 call0 4010541c +4010583c: 005b46 j 401059ad +4010583f: 0f3d mov.n a3, a15 +40105841: 3ca042 movi a4, 60 +40105844: ebb701 l32r a0, 40100720 +40105847: 0000c0 callx0 a0 +4010584a: 5138 l32i.n a3, a1, 20 +4010584c: 020c movi.n a2, 0 +4010584e: 1378 l32i.n a7, a3, 4 +40105850: 185d22 s16i a2, a13, 48 +40105853: 32cd82 addi a8, a13, 50 +40105856: b91c movi.n a9, 27 +40105858: 5148 l32i.n a4, a1, 20 +4010585a: 0020c0 memw +4010585d: 0428 l32i.n a2, a4, 0 +4010585f: 012432 l32i a3, a4, 4 +40105862: b42c20 extui a2, a2, 12, 12 +40105865: 802320 add a2, a3, a2 +40105868: 023727 bltu a7, a2, 4010586e +4010586b: 0026c6 j 4010590a +4010586e: 181d32 l16ui a3, a13, 48 +40105871: 090f22 l8ui a2, a15, 9 +40105874: 023327 bltu a3, a2, 4010587a +40105877: 0023c6 j 4010590a +4010587a: 000742 l8ui a4, a7, 0 +4010587d: 1fc422 addi a2, a4, 31 +40105880: 742020 extui a2, a2, 0, 8 +40105883: 02b927 bgeu a9, a2, 40105889 +40105886: 07a456 bnez a4, 40105904 +40105889: fde041 l32r a4, 4010500c +4010588c: 2158 l32i.n a5, a1, 8 +4010588e: 24a8 l32i.n a10, a4, 8 +40105890: 18c542 addi a4, a5, 24 +40105893: 0020c0 memw +40105896: 0a28 l32i.n a2, a10, 0 +40105898: 1aa8 l32i.n a10, a10, 4 +4010589a: b42020 extui a2, a2, 0, 12 +4010589d: 2a2a add.n a2, a10, a2 +4010589f: 67b427 bgeu a4, a2, 4010590a +401058a2: 0728 l32i.n a2, a7, 0 +401058a4: 331b addi.n a3, a3, 1 +401058a6: 185d32 s16i a3, a13, 48 +401058a9: b42820 extui a2, a2, 8, 12 +401058ac: 005822 s16i a2, a8, 0 +401058af: 0b1522 l16ui a2, a5, 22 +401058b2: 10c532 addi a3, a5, 16 +401058b5: 015822 s16i a2, a8, 2 +401058b8: 640c movi.n a4, 6 +401058ba: 284b addi.n a2, a8, 4 +401058bc: 7179 s32i.n a7, a1, 28 +401058be: 096192 s32i a9, a1, 36 +401058c1: 086182 s32i a8, a1, 32 +401058c4: eb9701 l32r a0, 40100720 +401058c7: 0000c0 callx0 a0 +401058ca: 2128 l32i.n a2, a1, 8 +401058cc: ca1c movi.n a10, 28 +401058ce: 010242 l8ui a4, a2, 1 +401058d1: 8188 l32i.n a8, a1, 32 +401058d3: 143040 extui a3, a4, 0, 2 +401058d6: fdc322 addi a2, a3, -3 +401058d9: 232c movi.n a3, 34 +401058db: 933a20 movnez a3, a10, a2 +401058de: 232b addi.n a2, a3, 2 +401058e0: 014480 slli a4, a4, 24 +401058e3: 336b addi.n a3, a3, 6 +401058e5: 88ab addi.n a8, a8, 10 +401058e7: a32340 movltz a2, a3, a4 +401058ea: 430c movi.n a3, 4 +401058ec: 086182 s32i a8, a1, 32 +401058ef: fef701 l32r a0, 401054cc +401058f2: 0000c0 callx0 a0 +401058f5: 2138 l32i.n a3, a1, 8 +401058f7: f42020 extui a2, a2, 0, 16 +401058fa: 332a add.n a3, a3, a2 +401058fc: 9198 l32i.n a9, a1, 36 +401058fe: 8188 l32i.n a8, a1, 32 +40105900: 7178 l32i.n a7, a1, 28 +40105902: 2139 s32i.n a3, a1, 8 +40105904: 774b addi.n a7, a7, 4 +40105906: ffd386 j 40105858 +40105909: 213200 srai a3, a0, 2 +4010590c: 2cc001 l32r a0, 400d0c0c <__floatsidf+0xc291c> +4010590f: a0c520 addx4 a12, a5, a2 +40105912: ff .byte 0xff +40105913: fdbe21 l32r a2, 4010500c +40105916: 0c2222 l32i a2, a2, 48 +40105919: ffb005 call0 4010541c +4010591c: 001206 j 40105968 +4010591f: 220000 excw +40105922: 0f .byte 0xf +40105923: 200c movi.n a0, 2 +40105925: 563420 excw +40105928: 411da2 l16ui a10, a13, 130 +4010592b: 0cfee6 bgei a14, 0x100, 4010593b +4010592e: a02205 call0 400a5b50 <__floatsidf+0x97860> +40105931: 764580 excw +40105934: ddfc bnez.n a13, 40105975 +40105936: b21602 l16ui a0, a6, 0x164 +40105939: 421d excw +4010593b: 3d80a0 excw +4010593e: 0f .byte 0xf +4010593f: 0d2d mov.n a2, a13 +40105941: eb7701 l32r a0, 40100720 +40105944: 0000c0 callx0 a0 +40105947: 120c movi.n a2, 1 +40105949: 0f38 l32i.n a3, a15, 0 +4010594b: fecb41 l32r a4, 40105478 +4010594e: 3e5d22 s16i a2, a13, 124 +40105951: b52030 extui a2, a3, 16, 12 +40105954: 040347 bnone a3, a4, 4010595c +40105957: 1f28 l32i.n a2, a15, 4 +40105959: f42820 extui a2, a2, 8, 16 +4010595c: 3f5d22 s16i a2, a13, 126 +4010595f: 012132 l32i a3, a1, 4 +40105962: 202cc0 or a2, a12, a12 +40105965: ff9b85 call0 40105320 +40105968: 0053c5 call0 40105ea8 +4010596b: 12dc bnez.n a2, 40105980 +4010596d: fecd41 l32r a4, 401054a4 +40105970: fe1f31 l32r a3, 401051ec +40105973: fe1f21 l32r a2, 401051f0 +40105976: ea0201 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105979: 0000c0 callx0 a0 +4010597c: ffff06 j 4010597c +4010597f: 022200 excw +40105982: 2d4806 j 40110ea6 <_lit4_end+0xab7a> +40105985: 342020 extui a2, a2, 0, 4 +40105988: 113200 slli a3, a2, 16 +4010598b: f76121 l32r a2, 40103710 +4010598e: 102420 and a2, a4, a2 +40105991: 202230 or a2, a2, a3 +40105994: 2d29 s32i.n a2, a13, 8 +40105996: 0d4d mov.n a4, a13 +40105998: 930c movi.n a3, 9 +4010599a: 022c movi.n a2, 32 +4010599c: fe5b05 call0 40103f50 +4010599f: 0a1266 bnei a2, 1, 401059ad +401059a2: fec141 l32r a4, 401054a8 +401059a5: feb231 l32r a3, 40105470 +401059a8: 0d2d mov.n a2, a13 +401059aa: fc5245 call0 40101ed0 +401059ad: 3158 l32i.n a5, a1, 12 +401059af: 791e57 beq a14, a5, 40105a2c +401059b2: 2ee8 l32i.n a14, a14, 8 +401059b4: ff8386 j 401057c6 +401059b7: 20c000 or a12, a0, a0 +401059ba: 04c800 extui a12, a0, 8, 1 +401059bd: 0020c0 memw +401059c0: 0338 l32i.n a3, a3, 0 +401059c2: 0020c0 memw +401059c5: 0228 l32i.n a2, a2, 0 +401059c7: 026132 s32i a3, a1, 8 +401059ca: 013c56 bnez a12, 401059e1 +401059cd: fe0731 l32r a3, 401051ec +401059d0: fe0821 l32r a2, 401051f0 +401059d3: f1a442 movi a4, 0x4f1 +401059d6: e9ea01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401059d9: 0000c0 callx0 a0 +401059dc: ffff06 j 401059dc +401059df: 280000 excw +401059e2: dc2c movi.n a12, 45 +401059e4: 013112 excw +401059e7: fe .byte 0xfe +401059e8: fe0221 l32r a2, 401051f0 +401059eb: f2a442 movi a4, 0x4f2 +401059ee: e9e401 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +401059f1: 0000c0 callx0 a0 +401059f4: ffff06 j 401059f4 +401059f7: 2f4800 excw +401059fa: 1149 s32i.n a4, a1, 4 +401059fc: 11d8 l32i.n a13, a1, 4 +401059fe: 130c movi.n a3, 1 +40105a00: 5d9c beqz.n a13, 40105a19 +40105a02: 0020c0 memw +40105a05: 0d58 l32i.n a5, a13, 0 +40105a07: 2d28 l32i.n a2, a13, 8 +40105a09: 0275e7 bbci a5, 30, 40105a0f +40105a0c: 005306 j 40105b5c +40105a0f: 331b addi.n a3, a3, 1 +40105a11: 02dd mov.n a13, a2 +40105a13: 743030 extui a3, a3, 0, 8 +40105a16: fff986 j 40105a00 +40105a19: 0223f6 bgeui a3, 2, 40105a1f +40105a1c: 00dd06 j 40105d94 +40105a1f: 0020c0 memw +40105a22: 0c28 l32i.n a2, a12, 0 +40105a24: 0472e7 bbci a2, 30, 40105a2c +40105a27: 0c2d mov.n a2, a12 +40105a29: ff8f45 call0 40105320 +40105a2c: fea321 l32r a2, 401054b8 +40105a2f: 0158 l32i.n a5, a1, 0 +40105a31: 028527 bany a5, a2, 40105a37 +40105a34: 002546 j 40105acd +40105a37: 02f537 bbsi a5, 19, 40105a3d +40105a3a: 0023c6 j 40105acd +40105a3d: 042132 l32i a3, a1, 16 +40105a40: 342c30 extui a2, a3, 12, 4 +40105a43: 1582b6 bltui a2, 8, 40105a5c +40105a46: 129226 beqi a2, 10, 40105a5c +40105a49: fde831 l32r a3, 401051ec +40105a4c: fde921 l32r a2, 401051f0 +40105a4f: 47a442 movi a4, 0x447 +40105a52: e9cb01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105a55: 0000c0 callx0 a0 +40105a58: ffff06 j 40105a58 +40105a5b: 982100 excw +40105a5e: fe .byte 0xfe +40105a5f: 4148 l32i.n a4, a1, 16 +40105a61: 0020c0 memw +40105a64: 0228 l32i.n a2, a2, 0 +40105a66: 35cc40 extui a12, a4, 28, 4 +40105a69: 7fa0d2 movi a13, 127 +40105a6c: 027287 bbci a2, 24, 40105a72 +40105a6f: 75d020 extui a13, a2, 16, 8 +40105a72: 202cc0 or a2, a12, a12 +40105a75: fefe45 call0 40104a5c +40105a78: 2b2c26 beqi a12, 2, 40105aa7 +40105a7b: 113cf6 bgeui a12, 3, 40105a90 +40105a7e: 01ac16 beqz a12, 40105a9c +40105a81: 341c66 bnei a12, 1, 40105ab9 +40105a84: 4158 l32i.n a5, a1, 16 +40105a86: 752050 extui a2, a5, 16, 8 +40105a89: fef4c5 call0 401049d8 +40105a8c: 000f46 j 40105acd +40105a8f: 4c2600 excw +40105a92: 6619 s32i.n a1, a6, 24 +40105a94: 225c movi.n a2, 82 +40105a96: fed905 call0 40104828 +40105a99: 000c06 j 40105acd +40105a9c: 0d2d mov.n a2, a13 +40105a9e: fe6bc5 call0 4010415c +40105aa1: 000a06 j 40105acd +40105aa4: 000000 ill +40105aa7: fef105 call0 401049b8 +40105aaa: 0007c6 j 40105acd +40105aad: 4138 l32i.n a3, a1, 16 +40105aaf: 752030 extui a2, a3, 16, 8 +40105ab2: fedc45 call0 40104878 +40105ab5: 000506 j 40105acd +40105ab8: cc3100 excw +40105abb: 21fd excw +40105abd: fdcd excw +40105abf: 69a442 movi a4, 0x469 +40105ac2: e9af01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105ac5: 0000c0 callx0 a0 +40105ac8: ffff06 j 40105ac8 +40105acb: 420000 excw +40105ace: d70021 l32r a2, 400fb6d0 <__floatsidf+0xed3e0> +40105ad1: c50274 excw +40105ad4: 52fe83 excw +40105ad7: 470021 l32r a2, 400d76d8 <__floatsidf+0xc93e8> +40105ada: 210b75 excw +40105add: fe79 s32i.n a7, a14, 60 +40105adf: e9a801 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105ae2: 0000c0 callx0 a0 +40105ae5: fee745 call0 4010495c +40105ae8: 6138 l32i.n a3, a1, 24 +40105aea: fe5721 l32r a2, 40105448 +40105aed: 132102 l32i a0, a1, 76 +40105af0: 1221c2 l32i a12, a1, 72 +40105af3: 1121d2 l32i a13, a1, 68 +40105af6: 1021e2 l32i a14, a1, 64 +40105af9: f1f8 l32i.n a15, a1, 60 +40105afb: 0020c0 memw +40105afe: 0239 s32i.n a3, a2, 0 +40105b00: 50c112 addi a1, a1, 80 +40105b03: f00d ret.n +40105b05: fe7041 l32r a4, 401054c8 +40105b08: 00a052 movi a5, 0 +40105b0b: 3ca022 movi a2, 60 +40105b0e: fc5885 call0 40102098 +40105b11: 20d220 or a13, a2, a2 +40105b14: 82cc bnez.n a2, 40105b20 +40105b16: 1138 l32i.n a3, a1, 4 +40105b18: 0c2d mov.n a2, a12 +40105b1a: ff8045 call0 40105320 +40105b1d: ffa306 j 401059ad +40105b20: c43c movi.n a4, 60 +40105b22: 0f3d mov.n a3, a15 +40105b24: 0d2d mov.n a2, a13 +40105b26: eafe01 l32r a0, 40100720 +40105b29: 0000c0 callx0 a0 +40105b2c: 120c movi.n a2, 1 +40105b2e: 0f38 l32i.n a3, a15, 0 +40105b30: fe5241 l32r a4, 40105478 +40105b33: 185d22 s16i a2, a13, 48 +40105b36: b52030 extui a2, a3, 16, 12 +40105b39: 040347 bnone a3, a4, 40105b41 +40105b3c: 1f28 l32i.n a2, a15, 4 +40105b3e: f42820 extui a2, a2, 8, 16 +40105b41: 195d22 s16i a2, a13, 50 +40105b44: 111f22 l16ui a2, a15, 34 +40105b47: 640c movi.n a4, 6 +40105b49: 1a5d22 s16i a2, a13, 52 +40105b4c: 1ccf32 addi a3, a15, 28 +40105b4f: 36cd22 addi a2, a13, 54 +40105b52: eaf301 l32r a0, 40100720 +40105b55: 0000c0 callx0 a0 +40105b58: ff80c6 j 4010595f +40105b5b: 612200 excw +40105b5e: 23b601 l32r a0, 400cea38 <__floatsidf+0xc0748> +40105b61: 780602 l8ui a0, a6, 120 +40105b64: 2f2200 excw +40105b67: 863102 excw +40105b6a: 2252f2 s16i a15, a2, 68 +40105b6d: 152801 l32r a0, 400cb010 <__floatsidf+0xbcd20> +40105b70: 8159 s32i.n a5, a1, 32 +40105b72: 102230 and a2, a2, a3 +40105b75: 3129 s32i.n a2, a1, 12 +40105b77: 003305 call0 40105ea8 +40105b7a: 02ed mov.n a14, a2 +40105b7c: 8158 l32i.n a5, a1, 32 +40105b7e: 012256 bnez a2, 40105b94 +40105b81: fd9a31 l32r a3, 401051ec +40105b84: fd9b21 l32r a2, 401051f0 +40105b87: 7ea142 movi a4, 0x17e +40105b8a: e97d01 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105b8d: 0000c0 callx0 a0 +40105b90: ffff06 j 40105b90 +40105b93: 022200 excw +40105b96: 256806 j 4010f13a <_lit4_end+0x8e0e> +40105b99: 342020 extui a2, a2, 0, 4 +40105b9c: 113200 slli a3, a2, 16 +40105b9f: f6dc21 l32r a2, 40103710 +40105ba2: a7af72 movi a7, -89 +40105ba5: 102620 and a2, a6, a2 +40105ba8: 202230 or a2, a2, a3 +40105bab: 2529 s32i.n a2, a5, 8 +40105bad: 000522 l8ui a2, a5, 0 +40105bb0: 061532 l16ui a3, a5, 12 +40105bb3: 012280 slli a2, a2, 24 +40105bb6: 312820 srai a2, a2, 24 +40105bb9: f65b61 l32r a6, 40103528 +40105bbc: 392277 blt a2, a7, 40105bf9 +40105bbf: fe3b21 l32r a2, 401054ac +40105bc2: 000222 l8ui a2, a2, 0 +40105bc5: 301266 bnei a2, 1, 40105bf9 +40105bc8: 7139 s32i.n a3, a1, 28 +40105bca: 086152 s32i a5, a1, 32 +40105bcd: fd9605 call0 40103530 +40105bd0: 116200 slli a6, a2, 16 +40105bd3: 2ba172 movi a7, 0x12b +40105bd6: f42020 extui a2, a2, 0, 16 +40105bd9: 727a add.n a7, a2, a7 +40105bdb: f47070 extui a7, a7, 0, 16 +40105bde: 56a282 movi a8, 0x256 +40105be1: 316060 srai a6, a6, 16 +40105be4: 7138 l32i.n a3, a1, 28 +40105be6: 8158 l32i.n a5, a1, 32 +40105be8: 0d3877 bltu a8, a7, 40105bf9 +40105beb: eabe61 l32r a6, 401006e4 +40105bee: 001672 l16ui a7, a6, 0 +40105bf1: 627a add.n a6, a2, a7 +40105bf3: 116600 slli a6, a6, 16 +40105bf6: 316060 srai a6, a6, 16 +40105bf9: 3148 l32i.n a4, a1, 12 +40105bfb: 070c movi.n a7, 0 +40105bfd: 120c movi.n a2, 1 +40105bff: 021477 beq a4, a7, 40105c05 +40105c02: 003cc6 j 40105cf9 +40105c05: 0588 l32i.n a8, a5, 0 +40105c07: ea7521 l32r a2, 401005dc +40105c0a: 6a0827 bnone a8, a2, 40105c78 +40105c0d: 347030 extui a7, a3, 0, 4 +40105c10: 344726 beqi a7, 4, 40105c48 +40105c13: 4d8726 beqi a7, 8, 40105c64 +40105c16: 0ca756 bnez a7, 40105ce4 +40105c19: f0a052 movi a5, 240 +40105c1c: 103350 and a3, a3, a5 +40105c1f: 02e326 beqi a3, 128, 40105c25 +40105c22: 003186 j 40105cec +40105c25: f5bc31 l32r a3, 40103318 +40105c28: 102830 and a2, a8, a3 +40105c2b: 029237 bne a2, a3, 40105c31 +40105c2e: 002186 j 40105cb8 +40105c31: fe1f21 l32r a2, 401054b0 +40105c34: e95f31 l32r a3, 401001b0 <_UserExceptionVector_1+0x54> +40105c37: 102820 and a2, a8, a2 +40105c3a: 223a add.n a2, a2, a3 +40105c3c: 140c movi.n a4, 1 +40105c3e: 030c movi.n a3, 0 +40105c40: 834320 moveqz a4, a3, a2 +40105c43: 042d mov.n a2, a4 +40105c45: 001ec6 j 40105cc4 +40105c48: f0a022 movi a2, 240 +40105c4b: 103320 and a3, a3, a2 +40105c4e: a0a052 movi a5, 160 +40105c51: 070c movi.n a7, 0 +40105c53: c09350 sub a9, a3, a5 +40105c56: 072d mov.n a2, a7 +40105c58: 150c movi.n a5, 1 +40105c5a: 837790 moveqz a7, a7, a9 +40105c5d: 932590 movnez a2, a5, a9 +40105c60: 002546 j 40105cf9 +40105c63: 255000 extui a5, a0, 16, 3 +40105c66: 616220 excw +40105c69: 670507 bnone a5, a0, 40105cd4 +40105c6c: a07200 addx4 a7, a2, a0 +40105c6f: 072d00 excw +40105c72: 7168 l32i.n a6, a1, 28 +40105c74: 002046 j 40105cf9 +40105c77: 642100 extui a2, a0, 1, 7 +40105c7a: 27f9 s32i.n a15, a7, 8 +40105c7c: 4d08 l32i.n a0, a13, 16 +40105c7e: 345030 extui a5, a3, 0, 4 +40105c81: 059c beqz.n a5, 40105c95 +40105c83: 070c movi.n a7, 0 +40105c85: 072d mov.n a2, a7 +40105c87: f8c582 addi a8, a5, -8 +40105c8a: 130c movi.n a3, 1 +40105c8c: 837780 moveqz a7, a7, a8 +40105c8f: 932380 movnez a2, a3, a8 +40105c92: 0018c6 j 40105cf9 +40105c95: 742030 extui a2, a3, 0, 8 +40105c98: 1ce226 beqi a2, 128, 40105cb8 +40105c9b: 80a032 movi a3, 128 +40105c9e: 063327 bltu a3, a2, 40105ca8 +40105ca1: 47d226 beqi a2, 64, 40105cec +40105ca4: 001346 j 40105cf5 +40105ca7: a03200 addx4 a3, a2, a0 +40105caa: 1237d0 excw +40105cad: 323d excw +40105caf: 37e0a0 excw +40105cb2: 064092 s8i a9, a0, 6 +40105cb5: 000d mov.n a0, a0 +40105cb7: 2dc000 excw +40105cba: 030cc0 excw +40105cbd: 150c movi.n a5, 1 +40105cbf: 835320 moveqz a5, a3, a2 +40105cc2: 052d mov.n a2, a5 +40105cc4: 742020 extui a2, a2, 0, 8 +40105cc7: 170c movi.n a7, 1 +40105cc9: 000b06 j 40105cf9 +40105ccc: ea5821 l32r a2, 4010062c +40105ccf: 070c movi.n a7, 0 +40105cd1: 01d222 addmi a2, a2, 0x100 +40105cd4: de0222 l8ui a2, a2, 222 +40105cd7: 130c movi.n a3, 1 +40105cd9: 220b addi.n a2, a2, -1 +40105cdb: 833720 moveqz a3, a7, a2 +40105cde: 742030 extui a2, a3, 0, 8 +40105ce1: 000506 j 40105cf9 +40105ce4: 070c movi.n a7, 0 +40105ce6: 120c movi.n a2, 1 +40105ce8: 000346 j 40105cf9 +40105ceb: 170c00 excw +40105cee: 020c movi.n a2, 0 +40105cf0: 000146 j 40105cf9 +40105cf3: 0c0000 excw +40105cf6: 072d17 blt a13, a1, 40105d01 +40105cf9: fcc451 l32r a5, 4010500c +40105cfc: 001582 l16ui a8, a5, 0 +40105cff: 011532 l16ui a3, a5, 2 +40105d02: 383a add.n a3, a8, a3 +40105d04: 0423e6 bgei a3, 2, 40105d0c +40105d07: 140c movi.n a4, 1 +40105d09: 832470 moveqz a2, a4, a7 +40105d0c: fdea31 l32r a3, 401054b4 +40105d0f: 000332 l8ui a3, a3, 0 +40105d12: 2e1326 beqi a3, 1, 40105d44 +40105d15: 2be207 bbsi a2, 0, 40105d44 +40105d18: 0020c0 memw +40105d1b: 0d28 l32i.n a2, a13, 0 +40105d1d: b42c20 extui a2, a2, 12, 12 +40105d20: 02dc bnez.n a2, 40105d34 +40105d22: fd3231 l32r a3, 401051ec +40105d25: fd3221 l32r a2, 401051f0 +40105d28: 62a242 movi a4, 0x262 +40105d2b: e91501 l32r a0, 40100180 <_UserExceptionVector_1+0x24> +40105d2e: 0000c0 callx0 a0 +40105d31: ffff06 j 40105d31 +40105d34: 08a022 movi a2, 8 +40105d37: 076162 s32i a6, a1, 28 +40105d3a: fe3285 call0 40104064 +40105d3d: 205220 or a5, a2, a2 +40105d40: 7168 l32i.n a6, a1, 28 +40105d42: 82cc bnez.n a2, 40105d4e +40105d44: 130c movi.n a3, 1 +40105d46: 0d2d mov.n a2, a13 +40105d48: ff5d45 call0 40105320 +40105d4b: 000e46 j 40105d88 +40105d4e: 9228 l32i.n a2, a2, 36 +40105d50: 2148 l32i.n a4, a1, 8 +40105d52: 22e9 s32i.n a14, a2, 8 +40105d54: 1249 s32i.n a4, a2, 4 +40105d56: 2f28 l32i.n a2, a15, 8 +40105d58: 130c movi.n a3, 1 +40105d5a: 1529 s32i.n a2, a5, 4 +40105d5c: 1228 l32i.n a2, a2, 4 +40105d5e: 25d9 s32i.n a13, a5, 8 +40105d60: 4529 s32i.n a2, a5, 16 +40105d62: 065532 s16i a3, a5, 12 +40105d65: 0020c0 memw +40105d68: 0d38 l32i.n a3, a13, 0 +40105d6a: f19b21 l32r a2, 401023d8 +40105d6d: 102320 and a2, a3, a2 +40105d70: 0020c0 memw +40105d73: 0d29 s32i.n a2, a13, 0 +40105d75: 0c5562 s16i a6, a5, 24 +40105d78: 120c movi.n a2, 1 +40105d7a: 0d3d mov.n a3, a13 +40105d7c: 8159 s32i.n a5, a1, 32 +40105d7e: ff2a05 call0 40105020 +40105d81: 8158 l32i.n a5, a1, 32 +40105d83: 052d mov.n a2, a5 +40105d85: fecbc5 call0 40104a44 +40105d88: 029cd7 bne a12, a13, 40105d8e +40105d8b: ff2746 j 40105a2c +40105d8e: 11e8 l32i.n a14, a1, 4 +40105d90: ff1a06 j 401059fc +40105d93: 11e900 slli a14, a9, 16 +40105d96: ff72c6 j 40105b65 +40105d99: 000000 ill +40105d9c: f20004 excw +40105d9f: 3f .byte 0x3f + +40105da0 : +40105da0: ffff31 l32r a3, 40105d9c +40105da3: f91c21 l32r a2, 40104214 +40105da6: 0020c0 memw +40105da9: 0348 l32i.n a4, a3, 0 +40105dab: 102420 and a2, a4, a2 +40105dae: 0020c0 memw +40105db1: 0329 s32i.n a2, a3, 0 +40105db3: fdc021 l32r a2, 401054b4 +40105db6: 130c movi.n a3, 1 +40105db8: 004232 s8i a3, a2, 0 +40105dbb: f00d ret.n +40105dbd: 000000 ill +40105dc0: 8818 l32i.n a1, a8, 32 +40105dc2: fe .byte 0xfe +40105dc3: 3f .byte 0x3f +40105dc4: cd38 l32i.n a3, a13, 48 +40105dc6: fe .byte 0xfe +40105dc7: 3f .byte 0x3f + +40105dc8 : +40105dc8: ffff31 l32r a3, 40105dc4 +40105dcb: 742020 extui a2, a2, 0, 8 +40105dce: b02230 addx8 a2, a2, a3 +40105dd1: 050222 l8ui a2, a2, 5 +40105dd4: fffb31 l32r a3, 40105dc0 +40105dd7: 902230 addx2 a2, a2, a3 +40105dda: 001222 l16ui a2, a2, 0 +40105ddd: f00d ret.n + ... + +40105de0 : +40105de0: f43030 extui a3, a3, 0, 16 +40105de3: 747020 extui a7, a2, 0, 8 +40105de6: f44040 extui a4, a4, 0, 16 +40105de9: 1153d0 slli a5, a3, 3 +40105dec: 4587f6 bgeui a7, 8, 40105e35 +40105def: a60c movi.n a6, 10 +40105df1: c0a032 movi a3, 192 +40105df4: 0257b6 bltui a7, 5, 40105dfa +40105df7: 60a032 movi a3, 96 +40105dfa: 646a add.n a6, a4, a6 +40105dfc: f42030 extui a2, a3, 0, 16 +40105dff: f46060 extui a6, a6, 0, 16 +40105e02: f45050 extui a5, a5, 0, 16 +40105e05: 0587b6 bltui a7, 8, 40105e0e +40105e08: 16c552 addi a5, a5, 22 +40105e0b: f45050 extui a5, a5, 0, 16 +40105e0e: ffed31 l32r a3, 40105dc4 +40105e11: b03730 addx8 a3, a7, a3 +40105e14: 0338 l32i.n a3, a3, 0 +40105e16: 823530 mull a3, a5, a3 +40105e19: f95251 l32r a5, 40104364 +40105e1c: 335a add.n a3, a3, a5 +40105e1e: d53230 extui a3, a3, 18, 14 +40105e21: 0787b6 bltui a7, 8, 40105e2c +40105e24: 333b addi.n a3, a3, 3 +40105e26: fcaf42 movi a4, -4 +40105e29: 103340 and a3, a3, a4 +40105e2c: 226a add.n a2, a2, a6 +40105e2e: 223a add.n a2, a2, a3 +40105e30: f42020 extui a2, a2, 0, 16 +40105e33: f00d ret.n +40105e35: f20c movi.n a2, 15 +40105e37: 061c movi.n a6, 16 +40105e39: 431c movi.n a3, 20 +40105e3b: bbb277 bgeu a2, a7, 40105dfa +40105e3e: 10c462 addi a6, a4, 16 +40105e41: f46060 extui a6, a6, 0, 16 +40105e44: f45050 extui a5, a5, 0, 16 +40105e47: 422c movi.n a2, 36 +40105e49: ffeec6 j 40105e08 + +40105e4c : +40105e4c: ffde31 l32r a3, 40105dc4 +40105e4f: 742020 extui a2, a2, 0, 8 +40105e52: b02230 addx8 a2, a2, a3 +40105e55: 050252 l8ui a5, a2, 5 +40105e58: 0e85f6 bgeui a5, 8, 40105e6a +40105e5b: a40c movi.n a4, 10 +40105e5d: c0a022 movi a2, 192 +40105e60: 1155b6 bltui a5, 5, 40105e75 +40105e63: 60a022 movi a2, 96 +40105e66: 0002c6 j 40105e75 +40105e69: f60c00 excw +40105e6c: 041c movi.n a4, 16 +40105e6e: 422c movi.n a2, 36 +40105e70: 013657 bltu a6, a5, 40105e75 +40105e73: 421c movi.n a2, 20 +40105e75: 442a add.n a4, a4, a2 +40105e77: 00a162 movi a6, 0x100 +40105e7a: 0285b6 bltui a5, 8, 40105e80 +40105e7d: 16a162 movi a6, 0x116 +40105e80: b03530 addx8 a3, a5, a3 +40105e83: 0328 l32i.n a2, a3, 0 +40105e85: f93731 l32r a3, 40104364 +40105e88: 822620 mull a2, a6, a2 +40105e8b: 323a add.n a3, a2, a3 +40105e8d: d52230 extui a2, a3, 18, 14 +40105e90: 0685b6 bltui a5, 8, 40105e9a +40105e93: 323b addi.n a3, a2, 3 +40105e95: c27c movi.n a2, -4 +40105e97: 102320 and a2, a3, a2 +40105e9a: 242a add.n a2, a4, a2 +40105e9c: f42020 extui a2, a2, 0, 16 +40105e9f: f00d ret.n +40105ea1: 000000 ill +40105ea4: ce78 l32i.n a7, a14, 48 +40105ea6: fe .byte 0xfe +40105ea7: 3f .byte 0x3f + +40105ea8 : +40105ea8: ffff21 l32r a2, 40105ea4 +40105eab: 132222 l32i a2, a2, 76 +40105eae: f00d ret.n +40105eb0: 800000 add a0, a0, a0 +40105eb3: 7f .byte 0x7f + +40105eb4 <__divsf3_aux>: +40105eb4: 1133f0 slli a3, a3, 1 +40105eb7: 413130 srli a3, a3, 1 +40105eba: 339c beqz.n a3, 40105ed1 <__divsf3_aux+0x1d> +40105ebc: 40f3a0 nsau a10, a3 +40105ebf: f8caa2 addi a10, a10, -8 +40105ec2: 401a00 ssl a10 +40105ec5: a13300 sll a3, a3 +40105ec8: 190c movi.n a9, 1 +40105eca: c099a0 sub a9, a9, a10 +40105ecd: 001d06 j 40105f45 <__divsf3+0x15> +40105ed0: 42f000 excw +40105ed3: 414011 l32r a1, 400d63d4 <__floatsidf+0xc80e4> +40105ed6: 2f7041 l32r a4, 400d1c98 <__floatsidf+0xc39a8> +40105ed9: 221005 call0 40127fdc <_lit4_end+0x21cb0> +40105edc: 226001 l32r a0, 400ce85c <__floatsidf+0xc056c> +40105edf: 44cc20 extui a12, a2, 12, 5 +40105ee2: e9a241 l32r a4, 4010056c +40105ee5: 202240 or a2, a2, a4 +40105ee8: f00d ret.n +40105eea: f00000 subx8 a0, a0, a0 +40105eed: 201122 l16ui a2, a1, 64 +40105ef0: 9c4121 l32r a2, 400ecff4 <__floatsidf+0xded04> +40105ef3: f2a022 movi a2, 242 +40105ef6: caa240 excw +40105ef9: 00f8 l32i.n a15, a0, 0 +40105efb: 401a add.n a4, a0, a1 +40105efd: a12200 sll a2, a2 +40105f00: 180c movi.n a8, 1 +40105f02: c088a0 sub a8, a8, a10 +40105f05: 000fc6 j 40105f48 <__divsf3+0x18> +40105f08: 052f70 extui a2, a7, 31, 1 +40105f0b: 012210 slli a2, a2, 31 +40105f0e: f00d ret.n +40105f10: 057f30 extui a7, a3, 31, 1 +40105f13: 017710 slli a7, a7, 31 +40105f16: 302270 xor a2, a2, a7 +40105f19: 05c367 bnall a3, a6, 40105f22 <__divsf3_aux+0x6e> +40105f1c: e99441 l32r a4, 4010056c +40105f1f: 202240 or a2, a2, a4 +40105f22: f00d ret.n +40105f24: 118370 slli a8, a3, 9 +40105f27: fdd816 beqz a8, 40105f08 <__divsf3_aux+0x54> +40105f2a: 032d mov.n a2, a3 +40105f2c: f00d ret.n + ... + +40105f30 <__divsf3>: +40105f30: ffe061 l32r a6, 40105eb0 +40105f33: 307230 xor a7, a2, a3 +40105f36: d64267 ball a2, a6, 40105f10 <__divsf3_aux+0x5c> +40105f39: e74367 ball a3, a6, 40105f24 <__divsf3_aux+0x70> +40105f3c: 758720 extui a8, a2, 23, 8 +40105f3f: 759730 extui a9, a3, 23, 8 +40105f42: f6e916 beqz a9, 40105eb4 <__divsf3_aux> +40105f45: fa3816 beqz a8, 40105eec <__divsf3_aux+0x38> +40105f48: c08890 sub a8, a8, a9 +40105f4b: e9c2a1 l32r a10, 40100654 +40105f4e: 202260 or a2, a2, a6 +40105f51: 1022a0 and a2, a2, a10 +40105f54: 203360 or a3, a3, a6 +40105f57: 1033a0 and a3, a3, a10 +40105f5a: 043327 bltu a3, a2, 40105f62 <__divsf3+0x32> +40105f5d: 1122f0 slli a2, a2, 1 +40105f60: 880b addi.n a8, a8, -1 +40105f62: c02230 sub a2, a2, a3 +40105f65: 1122f0 slli a2, a2, 1 +40105f68: 1a0c movi.n a10, 1 +40105f6a: 17a092 movi a9, 23 +40105f6d: 11aaf0 slli a10, a10, 1 +40105f70: 043237 bltu a2, a3, 40105f78 <__divsf3+0x48> +40105f73: aa1b addi.n a10, a10, 1 +40105f75: c02230 sub a2, a2, a3 +40105f78: 1122f0 slli a2, a2, 1 +40105f7b: 990b addi.n a9, a9, -1 +40105f7d: fec956 bnez a9, 40105f6d <__divsf3+0x3d> +40105f80: 7ec882 addi a8, a8, 126 +40105f83: fea042 movi a4, 254 +40105f86: 17b847 bgeu a8, a4, 40105fa1 <__divsf3+0x71> +40105f89: 043237 bltu a2, a3, 40105f91 <__divsf3+0x61> +40105f8c: aa1b addi.n a10, a10, 1 +40105f8e: 1a1237 beq a2, a3, 40105fac <__divsf3+0x7c> +40105f91: 018890 slli a8, a8, 23 +40105f94: 2a8a add.n a2, a10, a8 +40105f96: 057f70 extui a7, a7, 31, 1 +40105f99: 017710 slli a7, a7, 31 +40105f9c: 202270 or a2, a2, a7 +40105f9f: f00d ret.n +40105fa1: 010896 bltz a8, 40105fb5 <__divsf3+0x85> +40105fa4: 841b addi.n a8, a4, 1 +40105fa6: 012890 slli a2, a8, 23 +40105fa9: fffa46 j 40105f96 <__divsf3+0x66> +40105fac: 41a1a0 srli a10, a10, 1 +40105faf: 11aaf0 slli a10, a10, 1 +40105fb2: fff6c6 j 40105f91 <__divsf3+0x61> +40105fb5: 608080 neg a8, a8 +40105fb8: 400800 ssr a8 +40105fbb: 22c8f6 bgeui a8, 32, 40105fe1 <__divsf3+0xb1> +40105fbe: a16a00 sll a6, a10 +40105fc1: 91a0a0 srl a10, a10 +40105fc4: 080c movi.n a8, 0 +40105fc6: 328c beqz.n a2, 40105fcd <__divsf3+0x9d> +40105fc8: 190c movi.n a9, 1 +40105fca: 206690 or a6, a6, a9 +40105fcd: fc06d6 bgez a6, 40105f91 <__divsf3+0x61> +40105fd0: aa1b addi.n a10, a10, 1 +40105fd2: 1166f0 slli a6, a6, 1 +40105fd5: fb8656 bnez a6, 40105f91 <__divsf3+0x61> +40105fd8: 41a1a0 srli a10, a10, 1 +40105fdb: 11aaf0 slli a10, a10, 1 +40105fde: ffebc6 j 40105f91 <__divsf3+0x61> +40105fe1: 052f70 extui a2, a7, 31, 1 +40105fe4: 012210 slli a2, a2, 31 +40105fe7: f00d ret.n +40105fe9: 000000 ill + +40105fec <__fixsfsi>: +40105fec: ffb161 l32r a6, 40105eb0 +40105fef: 224267 ball a2, a6, 40106015 <__fixsfsi+0x29> +40105ff2: 754720 extui a4, a2, 23, 8 +40105ff5: 82c442 addi a4, a4, -126 +40105ff8: 20c4e6 bgei a4, 32, 4010601c <__fixsfsi+0x30> +40105ffb: 2914a6 blti a4, 1, 40106028 <__fixsfsi+0x3c> +40105ffe: 207260 or a7, a2, a6 +40106001: 115780 slli a5, a7, 8 +40106004: 401400 ssl a4 +40106007: 915050 srl a5, a5 +4010600a: 602050 neg a2, a5 +4010600d: b32570 movgez a2, a5, a7 +40106010: f00d ret.n +40106012: 000000 ill +40106015: 114270 slli a4, a2, 9 +40106018: 048c beqz.n a4, 4010601c <__fixsfsi+0x30> +4010601a: 020c movi.n a2, 0 +4010601c: 114680 slli a4, a6, 8 +4010601f: 540b addi.n a5, a4, -1 +40106021: b34520 movgez a4, a5, a2 +40106024: 042d mov.n a2, a4 +40106026: f00d ret.n +40106028: 020c movi.n a2, 0 +4010602a: f00d ret.n + +4010602c : +4010602c: 020c movi.n a2, 0 +4010602e: f00d ret.n + +40106030 : +40106030: 803230 add a3, a2, a3 +40106033: 040c movi.n a4, 0 +40106035: 8caf72 movi a7, -116 +40106038: 261237 beq a2, a3, 40106062 +4010603b: 000252 l8ui a5, a2, 0 +4010603e: 08a062 movi a6, 8 +40106041: 304450 xor a4, a4, a5 +40106044: 048040 extui a8, a4, 0, 1 +40106047: 415140 srli a5, a4, 1 +4010604a: 744050 extui a4, a5, 0, 8 +4010604d: 488c beqz.n a8, 40106055 +4010604f: 304470 xor a4, a4, a7 +40106052: 744040 extui a4, a4, 0, 8 +40106055: 660b addi.n a6, a6, -1 +40106057: 746060 extui a6, a6, 0, 8 +4010605a: fe6656 bnez a6, 40106044 +4010605d: 221b addi.n a2, a2, 1 +4010605f: fff546 j 40106038 +40106062: 042d mov.n a2, a4 +40106064: f00d ret.n + ... + +40106068 : +40106068: 020c movi.n a2, 0 +4010606a: f00d ret.n + +4010606c : +4010606c: f57c movi.n a5, -1 +4010606e: 0259 s32i.n a5, a2, 0 +40106070: 050c movi.n a5, 0 +40106072: 1259 s32i.n a5, a2, 4 +40106074: 2259 s32i.n a5, a2, 8 +40106076: 3239 s32i.n a3, a2, 12 +40106078: 4249 s32i.n a4, a2, 16 +4010607a: f00d ret.n + +4010607c : +4010607c: f00d ret.n + ... + +40106080 : +} +40106080: f00d ret.n + ... + +40106084 : +40106084: 743030 extui a3, a3, 0, 8 +40106087: 424a add.n a4, a2, a4 +40106089: 0001c6 j 40106094 +4010608c: 000252 l8ui a5, a2, 0 +4010608f: 061537 beq a5, a3, 40106099 +40106092: 221b addi.n a2, a2, 1 +40106094: f49247 bne a2, a4, 4010608c +40106097: 020c movi.n a2, 0 +40106099: f00d ret.n + ... + +4010609c : +4010609c: 13e320 wsr.intclear a2 +4010609f: f00d ret.n +401060a1: 000000 ill +401060a4: 02b366 bnei a3, 16, 401060aa +401060a7: 005646 j 40106204 +401060aa: 051c movi.n a5, 16 +401060ac: 663537 bltu a5, a3, 40106116 +401060af: 028366 bnei a3, 8, 401060b5 +401060b2: 003686 j 40106190 +401060b5: 850c movi.n a5, 8 +401060b7: 2e3537 bltu a5, a3, 401060e9 +401060ba: 023366 bnei a3, 3, 401060c0 +401060bd: 005ac6 j 4010622c +401060c0: 1043f6 bgeui a3, 4, 401060d4 +401060c3: 021366 bnei a3, 1, 401060c9 +401060c6: 0061c6 j 40106251 +401060c9: 022366 bnei a3, 2, 401060cf +401060cc: 005c06 j 40106240 +401060cf: 006646 j 4010626c +401060d2: 660000 excw +401060d5: 460263 excw +401060d8: 0059 s32i.n a5, a0, 0 +401060da: 0273b6 bltui a3, 7, 401060e0 +401060dd: 0052c6 j 4010622c +401060e0: 025366 bnei a3, 5, 401060e6 +401060e3: 005a86 j 40106251 +401060e6: 006086 j 4010626c +401060e9: 02a366 bnei a3, 12, 401060ef +401060ec: 002246 j 40106179 +401060ef: c40c movi.n a4, 12 +401060f1: 103437 bltu a4, a3, 40106105 +401060f4: 029366 bnei a3, 10, 401060fa +401060f7: 003d46 j 401061f0 +401060fa: a40c movi.n a4, 10 +401060fc: 02b437 bgeu a4, a3, 40106102 +401060ff: 004046 j 40106204 +40106102: 002e86 j 401061c0 +40106105: e40c movi.n a4, 14 +40106107: 029347 bne a3, a4, 4010610d +4010610a: 003286 j 401061d8 +4010610d: 02b437 bgeu a4, a3, 40106113 +40106110: 004106 j 40106218 +40106113: 002446 j 401061a8 +40106116: 851c movi.n a5, 24 +40106118: 029357 bne a3, a5, 4010611e +4010611b: 003946 j 40106204 +4010611e: 1a3537 bltu a5, a3, 4010613c +40106121: 441c movi.n a4, 20 +40106123: 029347 bne a3, a4, 40106129 +40106126: 001f86 j 401061a8 +40106129: 043437 bltu a4, a3, 40106131 +4010612c: 241c movi.n a4, 18 +4010612e: 000506 j 40106146 +40106131: 641c movi.n a4, 22 +40106133: 421347 beq a3, a4, 40106179 +40106136: 283437 bltu a4, a3, 40106162 +40106139: 0014c6 j 40106190 +4010613c: c51c movi.n a5, 28 +4010613e: 661357 beq a3, a5, 401061a8 +40106141: 0d3537 bltu a5, a3, 40106152 +40106144: a41c movi.n a4, 26 +40106146: 029347 bne a3, a4, 4010614c +40106149: 0022c6 j 401061d8 +4010614c: 703437 bltu a4, a3, 401061c0 +4010614f: 002746 j 401061f0 +40106152: e51c movi.n a5, 30 +40106154: 211357 beq a3, a5, 40106179 +40106157: 353357 bltu a3, a5, 40106190 +4010615a: f51c movi.n a5, 31 +4010615c: 021357 beq a3, a5, 40106162 +4010615f: 004246 j 4010626c +40106162: dec242 addi a4, a2, -34 +40106165: 744040 extui a4, a4, 0, 8 +40106168: dca052 movi a5, 220 +4010616b: 030c movi.n a3, 0 +4010616d: 02b547 bgeu a5, a4, 40106173 +40106170: 004106 j 40106278 +40106173: dfc242 addi a4, a2, -33 +40106176: 003a46 j 40106263 +40106179: e2c242 addi a4, a2, -30 +4010617c: 744040 extui a4, a4, 0, 8 +4010617f: e0a052 movi a5, 224 +40106182: 030c movi.n a3, 0 +40106184: 02b547 bgeu a5, a4, 4010618a +40106187: 003b46 j 40106278 +4010618a: e3c242 addi a4, a2, -29 +4010618d: 003486 j 40106263 +40106190: e5c242 addi a4, a2, -27 +40106193: 744040 extui a4, a4, 0, 8 +40106196: e3a052 movi a5, 227 +40106199: 030c movi.n a3, 0 +4010619b: 02b547 bgeu a5, a4, 401061a1 +4010619e: 003586 j 40106278 +401061a1: e6c242 addi a4, a2, -26 +401061a4: 002ec6 j 40106263 +401061a7: c24200 excw +401061aa: 40ea add.n a4, a0, a14 +401061ac: 527440 excw +401061af: 0ce8a0 excw +401061b2: b54703 excw +401061b5: 2f8602 excw +401061b8: c24200 excw +401061bb: c6eb addi.n a12, a6, 14 +401061bd: 0028 l32i.n a2, a0, 0 +401061bf: c24200 excw +401061c2: ef .byte 0xef +401061c3: 744040 extui a4, a4, 0, 8 +401061c6: eda052 movi a5, 237 +401061c9: 030c movi.n a3, 0 +401061cb: 02b547 bgeu a5, a4, 401061d1 +401061ce: 002986 j 40106278 +401061d1: f0c242 addi a4, a2, -16 +401061d4: 0022c6 j 40106263 +401061d7: c24200 excw +401061da: 4040f2 s8i a15, a0, 64 +401061dd: a05274 excw +401061e0: 030cf0 excw +401061e3: 02b547 bgeu a5, a4, 401061e9 +401061e6: 002386 j 40106278 +401061e9: f3c242 addi a4, a2, -13 +401061ec: 001cc6 j 40106263 +401061ef: c24200 excw +401061f2: 4040f4 excw +401061f5: a05274 excw +401061f8: 030cf2 l8ui a15, a12, 3 +401061fb: 793547 bltu a5, a4, 40106278 +401061fe: f5c242 addi a4, a2, -11 +40106201: 001786 j 40106263 +40106204: f7c242 addi a4, a2, -9 +40106207: 744040 extui a4, a4, 0, 8 +4010620a: f5a052 movi a5, 245 +4010620d: 030c movi.n a3, 0 +4010620f: 653547 bltu a5, a4, 40106278 +40106212: f8c242 addi a4, a2, -8 +40106215: 001286 j 40106263 +40106218: f6c242 addi a4, a2, -10 +4010621b: 744040 extui a4, a4, 0, 8 +4010621e: f4a052 movi a5, 244 +40106221: 030c movi.n a3, 0 +40106223: 513547 bltu a5, a4, 40106278 +40106226: f7c242 addi a4, a2, -9 +40106229: 000d86 j 40106263 +4010622c: f1c242 addi a4, a2, -15 +4010622f: 744040 extui a4, a4, 0, 8 +40106232: efa052 movi a5, 239 +40106235: 030c movi.n a3, 0 +40106237: 3d3547 bltu a5, a4, 40106278 +4010623a: f2c242 addi a4, a2, -14 +4010623d: 000886 j 40106263 +40106240: f4c232 addi a3, a2, -12 +40106243: 743030 extui a3, a3, 0, 8 +40106246: f2a042 movi a4, 242 +40106249: b1b437 bgeu a4, a3, 401061fe +4010624c: 030c movi.n a3, 0 +4010624e: 000986 j 40106278 +40106251: f5c242 addi a4, a2, -11 +40106254: 744040 extui a4, a4, 0, 8 +40106257: f3a052 movi a5, 243 +4010625a: 00a032 movi a3, 0 +4010625d: 173547 bltu a5, a4, 40106278 +40106260: f6c242 addi a4, a2, -10 +40106263: 214140 srai a4, a4, 1 +40106266: 904440 addx2 a4, a4, a4 +40106269: 744040 extui a4, a4, 0, 8 +4010626c: 022c movi.n a2, 32 +4010626e: 043d mov.n a3, a4 +40106270: 01b247 bgeu a2, a4, 40106275 +40106273: 032c movi.n a3, 32 +40106275: 743030 extui a3, a3, 0, 8 +40106278: 032d mov.n a2, a3 +4010627a: f00d ret.n + +4010627c : +4010627c: 000352 l8ui a5, a3, 0 +4010627f: 055216 beqz a2, 401062d8 +40106282: 5238 l32i.n a3, a2, 20 +40106284: 50e307 bbsi a3, 0, 401062d8 +40106287: 020242 l8ui a4, a2, 2 +4010628a: 7fa032 movi a3, 127 +4010628d: 014480 slli a4, a4, 24 +40106290: 316840 srai a6, a4, 24 +40106293: 121637 beq a6, a3, 401062a9 +40106296: 014580 slli a4, a5, 24 +40106299: 314840 srai a4, a4, 24 +4010629c: 464a add.n a4, a6, a4 +4010629e: 744140 extui a4, a4, 1, 8 +401062a1: 024252 s8i a5, a2, 2 +401062a4: 045d mov.n a5, a4 +401062a6: 000106 j 401062ae +401062a9: 024252 s8i a5, a2, 2 +401062ac: 040c movi.n a4, 0 +401062ae: 030232 l8ui a3, a2, 3 +401062b1: 7fa062 movi a6, 127 +401062b4: 013380 slli a3, a3, 24 +401062b7: 317830 srai a7, a3, 24 +401062ba: 171767 beq a7, a6, 401062d5 +401062bd: 014480 slli a4, a4, 24 +401062c0: 314840 srai a4, a4, 24 +401062c3: 903770 addx2 a3, a7, a7 +401062c6: 334a add.n a3, a3, a4 +401062c8: 433b addi.n a4, a3, 3 +401062ca: a33430 movltz a3, a4, a3 +401062cd: 213230 srai a3, a3, 2 +401062d0: 034232 s8i a3, a2, 3 +401062d3: f00d ret.n +401062d5: 034252 s8i a5, a2, 3 +401062d8: f00d ret.n + ... + +401062dc : +401062dc: f00d ret.n + ... + +401062e0 <__modsi3>: +401062e0: 027d mov.n a7, a2 +401062e2: 602120 abs a2, a2 +401062e5: 603130 abs a3, a3 +401062e8: 3023b6 bltui a3, 2, 4010631c <__modsi3+0x3c> +401062eb: 40f250 nsau a5, a2 +401062ee: 40f340 nsau a4, a3 +401062f1: 17b547 bgeu a5, a4, 4010630c <__modsi3+0x2c> +401062f4: c04450 sub a4, a4, a5 +401062f7: 401400 ssl a4 +401062fa: a13300 sll a3, a3 +401062fd: 023237 bltu a2, a3, 40106303 <__modsi3+0x23> +40106300: c02230 sub a2, a2, a3 +40106303: 413130 srli a3, a3, 1 +40106306: ffc442 addi a4, a4, -1 +40106309: ff0456 bnez a4, 401062fd <__modsi3+0x1d> +4010630c: 023237 bltu a2, a3, 40106312 <__modsi3+0x32> +4010630f: c02230 sub a2, a2, a3 +40106312: 0027d6 bgez a7, 40106318 <__modsi3+0x38> +40106315: 602020 neg a2, a2 +40106318: f00d ret.n +4010631a: cc0000 excw +4010631d: 000053 excw +40106320: 494400 excw +40106323: 0c3056 bnez a0, 401063ea <_lit4_end+0xbe> +40106326: f00d02 l8ui a0, a13, 240 diff --git a/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.bin b/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.bin new file mode 100644 index 0000000..301ea9c Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.bin differ diff --git a/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.dump b/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.dump new file mode 100644 index 0000000..819e5f9 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/bin/upgrade/user1.4096.new.6.dump @@ -0,0 +1,18264 @@ + +.output/eagle/debug/image/eagle.app.v6.out: file format elf32-xtensa-le +.output/eagle/debug/image/eagle.app.v6.out +architecture: xtensa, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x40100004 + +Xtensa header: + +Machine = Base +Insn tables = true +Literal tables = true + +Program Header: + LOAD off 0x000000d4 vaddr 0x00000000 paddr 0x00000000 align 2**12 + filesz 0x00000000 memsz 0x00000000 flags --- + LOAD off 0x00001000 vaddr 0x3ffe8000 paddr 0x3ffe8000 align 2**12 + filesz 0x000008dc memsz 0x000008dc flags rw- + LOAD off 0x000018e0 vaddr 0x3ffe88e0 paddr 0x3ffe88e0 align 2**12 + filesz 0x00000000 memsz 0x00005f98 flags rw- + LOAD off 0x00002000 vaddr 0x40100000 paddr 0x40100000 align 2**12 + filesz 0x00006329 memsz 0x00006329 flags r-x + LOAD off 0x00009010 vaddr 0x40201010 paddr 0x40201010 align 2**12 + filesz 0x0002fb6c memsz 0x0002fb6c flags r-x + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .data 000003b2 3ffe8000 3ffe8000 00001000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 1 .rodata 0000051c 3ffe83c0 3ffe83c0 000013c0 2**4 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 2 .bss 00005f98 3ffe88e0 3ffe88e0 000018e0 2**4 + ALLOC + 3 .irom0.text 0002fb6c 40201010 40201010 00009010 2**4 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 4 .text 00006329 40100000 40100000 00002000 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 5 .xtensa.info 00000038 00000000 00000000 00038b7c 2**0 + CONTENTS, READONLY + 6 .comment 000002a8 00000000 00000000 00038bb4 2**0 + CONTENTS, READONLY + 7 .debug_frame 0000062c 00000000 00000000 00038e5c 2**2 + CONTENTS, READONLY, DEBUGGING + 8 .debug_info 000047dd 00000000 00000000 00039488 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_abbrev 00000cca 00000000 00000000 0003dc65 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_loc 00000e09 00000000 00000000 0003e92f 2**0 + CONTENTS, READONLY, DEBUGGING + 11 .debug_aranges 00000260 00000000 00000000 0003f738 2**3 + CONTENTS, READONLY, DEBUGGING + 12 .debug_ranges 00000290 00000000 00000000 0003f998 2**0 + CONTENTS, READONLY, DEBUGGING + 13 .debug_line 000028cd 00000000 00000000 0003fc28 2**0 + CONTENTS, READONLY, DEBUGGING + 14 .debug_str 00001148 00000000 00000000 000424f5 2**0 + CONTENTS, READONLY, DEBUGGING +SYMBOL TABLE: +3ffe8000 l d .data 00000000 .data +3ffe83c0 l d .rodata 00000000 .rodata +3ffe88e0 l d .bss 00000000 .bss +40201010 l d .irom0.text 00000000 .irom0.text +40100000 l d .text 00000000 .text +00000000 l d .xtensa.info 00000000 .xtensa.info +00000000 l d .comment 00000000 .comment +00000000 l d .debug_frame 00000000 .debug_frame +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_loc 00000000 .debug_loc +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_ranges 00000000 .debug_ranges +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_str 00000000 .debug_str +00000000 l df *ABS* 00000000 ctype_.c +00000000 l df *ABS* 00000000 user_main.c +3ffe8048 l O .data 00000001 blink_cnt$3072 +3ffe8d84 l O .bss 00000014 lcd_shift_timer +00000000 l df *ABS* 00000000 partitions.c +3ffe8714 l O .rodata 00000048 at_partition_table +00000000 l df *ABS* 00000000 LCD_IO_driver_interface.c +40106080 l F .text 00000002 get_LCD_DATA_PINS_state +40102f18 l F .text 00000015 wraper_delay_us +40102f30 l F .text 00000033 LCD_reset_SIG +40102f64 l F .text 00000033 LCD_set_SIG +40102fa4 l F .text 00000073 set_LCD_DATA_PINS_state +4010301c l F .text 0000001b set_LCD_DATA_PINS_as_inputs +40103038 l F .text 0000001b set_LCD_DATA_PINS_as_outputs +40103074 l F .text 000000a3 init_LCD_data_and_SIG_pins +3ffe875c l O .rodata 00000020 LCD_IO_driver +00000000 l df *ABS* 00000000 lcd_hd44780.c +3ffe8d9c l O .bss 00000004 LCD +40102b88 l F .text 00000035 lcd_write_4bit_data +40102bc0 l F .text 0000002b lcd_write_byte +40102bec l F .text 00000026 lcd_write_cmd +40102c14 l F .text 00000026 lcd_write_data +3ffe8da0 l O .bss 00000004 lcd_buf_position_ptr +3ffe8dc4 l O .bss 00000020 lcd_buffer +40102c48 l F .text 00000017 check_lcd_buf_possition_ptr_overflow +3ffe8da4 l O .bss 00000020 prev_lcd_buffer +40102c64 l F .text 00000029 copy_lcd_buf_2_prev_lcd_buf +00000000 l df *ABS* 00000000 _divsf3.o +40105eb4 l .text 00000000 __divsf3_aux +00000000 l df *ABS* 00000000 memchr.c +00000000 l df *ABS* 00000000 int_asm--set_intclear.o +00000000 l *ABS* 00000000 .callsz +00000000 l *ABS* 00000000 .locsz +3ffedbf8 g O .bss 00000024 info +3ffee74c g O .bss 00000004 current_iphdr_src +40205ebc g F .irom0.text 00000031 chm_check_same_channel +4020158c g F .irom0.text 0000002b aes_encrypt_deinit +4021b2bc g F .irom0.text 00000115 cal_rf_ana_gain +4021103c g F .irom0.text 00000007 system_init_done_cb +4023066c g F .irom0.text 0000001b inet_chksum +4022949c g F .irom0.text 0000000e raw_bind +4022fd08 g F .irom0.text 00000002 chip_v6_get_sense +4021fed4 g F .irom0.text 00000018 pm_force_scan_unlock +4020db8c g F .irom0.text 00000098 wpa_get_ntp_timestamp +40228f9c g F .irom0.text 0000004d pbuf_realloc +3ffe8045 g O .data 00000001 dhcps_flag +40220da4 g F .irom0.text 00000008 freq_change_sta_scan_force_enable +40102204 g F .text 00000037 pvPortCalloc +40220dac g F .irom0.text 00000066 freq_changle_sta_scan_do_cb +40212024 g F .irom0.text 00000141 system_upgrade_reboot +40229e3c g F .irom0.text 00000013 tcp_next_iss +40214080 g F .irom0.text 0000000f wifi_unregister_rfid_locp_recv_cb +40205bec g F .irom0.text 00000031 ieee80211_phy_init +4021bbe0 g F .irom0.text 000001c2 rc_cal +40222d08 g F .irom0.text 00000049 rc_get_sta_trc +4022e314 g F .irom0.text 0000002f igmp_report_groups +3ffedc1c g O .bss 00000004 system_phy_init_sector +40229788 g F .irom0.text 0000004e tcp_update_rcv_ann_wnd +40102ca8 g F .text 00000018 lcd_disable_backlight +40217a60 g F .irom0.text 00000164 tx_cap_init +3ffecee2 g O .bss 00000001 auth_type +40222f30 g F .irom0.text 00000015 wDev_Enable_Beacon_Tsf +3ffece48 g O .bss 00000004 APRecvBcnStartTick +40105150 g F .text 00000033 wDev_EnableTransmit +40102e40 g F .text 00000033 lcd_buf_str +4000ba48 g *ABS* 00000000 sha1_prf +40201dd0 g F .irom0.text 00000053 ieee80211_regdomain_is_active_scan +40102cc4 g F .text 00000021 lcd_cls +40101f70 g F .text 00000007 xPortGetFreeHeapSize +3ffee75c g O .bss 00000004 netif_list +40224c18 g F .irom0.text 00000026 dhcp_cleanup +40205aa8 g F .irom0.text 000000b9 ieee80211_mesh_quick_get +40201f28 g F .irom0.text 000000c3 ieee80211_ifattach +40225558 g F .irom0.text 00000027 node_remove_from_list +40215488 g F .irom0.text 00000027 user_pre_init +4020f5d0 g F .irom0.text 00000070 rsn_pmkid +4020c98c g F .irom0.text 00000076 wpa_auth_sta_init +4021e644 g F .irom0.text 000000c4 wifi_fpm_set_sleep_type +3ffecee6 g O .bss 00000002 TestStaFreqCalValInput +401017e8 g F .text 000000a8 system_deep_sleep_local_2 +4020772c g F .irom0.text 0000011f set_rate_limit +4022bb1c g F .irom0.text 0000013b tcp_rst +40105184 g F .text 00000021 wDev_DisableTransmit +4022d4a0 g F .irom0.text 0000006f espconn_get_keepalive +402292fc g F .irom0.text 0000005b pbuf_memfind +4000ce60 g *ABS* 00000000 __divdi3 +40212878 g F .irom0.text 000000b5 wifi_station_disconnect +40209f58 g F .irom0.text 00000077 cnx_node_alloc +40213f10 g F .irom0.text 0000001e wifi_get_user_fixed_rate +40101890 g F .text 00000066 system_rtc_mem_read +402105bc w F .irom0.text 00000002 system_restart_hook +4000a2cc g *ABS* 00000000 hmac_md5 +402108a8 g F .irom0.text 00000225 get_flash_bin_len +4021e8c8 g F .irom0.text 00000002 pm_idle_sleep +40222b24 g F .irom0.text 00000047 rcAttach +3ffe88dc g *ABS* 00000000 _bss_table_end +3ffe805d g O .data 00000001 test_freq_val_first +40211764 g F .irom0.text 0000007b system_param_load +4022cb30 g F .irom0.text 0000001a espconn_pbuf_create +40227ad0 g F .irom0.text 000000cd etharp_request +4021b6c0 g F .irom0.text 00000099 txiq_get_mis_pwr +402152ec g F .irom0.text 00000137 lcd_update_cb +40216594 g F .irom0.text 00000055 chip_v6_set_chan_wakeup_exit +3ffe8b7e g O .bss 00000001 rxmax_ext_level +4022526c g F .irom0.text 000000ba dhcp_start +40220bb0 g F .irom0.text 00000049 reset_noise_timer +40217a08 g F .irom0.text 0000002c stop_dig_rx +40207924 g F .irom0.text 00000394 ieee80211_parse_beacon +402186c8 g F .irom0.text 0000004f target_power_backoff +4021a8e4 g F .irom0.text 00000014 phy_get_freq_param +3ffe8be6 g O .bss 00000001 open_signaling_measurement +40212f28 g F .irom0.text 000000eb wifi_softap_deauth +40229624 g F .irom0.text 00000005 tcp_err +4023056c g O .irom0.text 00000004 ip_addr_any +40212284 g F .irom0.text 0000009a wifi_station_get_ap_info +402306f8 g F .irom0.text 000000c0 inet_chksum_pseudo +fffff00f g *ABS* 00000000 _memmap_cacheattr_unused_mask +40224ce8 g F .irom0.text 00000049 dhcp_network_changed +40101b4c g F .text 00000172 ets_timer_arm_new +4022c548 g F .irom0.text 00000041 udp_remove +40217420 g F .irom0.text 00000153 gen_rx_gain_table +4021078c g F .irom0.text 0000000c spi_flash_erase_protect_disable +40219824 g F .irom0.text 0000004f tx_cont_dis +4020a5a8 g F .irom0.text 00000039 ieee80211_action_vendor_spec_attach +4020b930 g F .irom0.text 00000004 ieee80211_setup_rateset +4021a808 g F .irom0.text 00000033 phy_set_rx11b_reg +40225a38 g F .irom0.text 00000007 wifi_softap_get_dhcps_lease_time +40228664 g F .irom0.text 00000023 ip_output_if +3ffe8b80 g O .bss 00000004 phy_rx_gain_dc_table +402227d8 g F .irom0.text 00000128 rc_set_rate_limit_id +4021dacc g F .irom0.text 000000ff sleep_reset_analog_rtcreg_8266 +402132a8 g F .irom0.text 0000010f wifi_set_phy_mode +402130b0 g F .irom0.text 0000000a wifi_unregister_user_ie_manufacturer_recv_cb +40212268 g F .irom0.text 00000011 wifi_station_get_config_default +3ffe8eb4 g O .bss 00000001 dbg_stop_hw_wdt +4021e530 g F .irom0.text 00000098 fpm_do_sleep +4022cfec g F .irom0.text 0000003b espconn_tcp_set_max_con_allow +40219db8 g F .irom0.text 000000e4 reduce_current_init +40210284 g F .irom0.text 000000a4 flash_data_check +4021b22c g F .irom0.text 0000008b get_sar_dout +4020fbf0 g F .irom0.text 0000009b wpa_sm_alloc_eapol +4010632c g *ABS* 00000000 _lit4_end +40230b4c g O .irom0.text 00000018 tkip +40228da0 g F .irom0.text 00000073 pbuf_free +4022960c g F .irom0.text 00000005 tcp_recv +40105f30 g F .text 00000000 .hidden __divsf3 +3ffe8058 g O .data 00000004 tcb +00000110 g *ABS* 00000000 _memmap_cacheattr_wt_base +40229000 g F .irom0.text 0000001c pbuf_cat +3ffe8d9a g O .bss 00000001 j +402100ec g F .irom0.text 00000004 wpa_sm_mlme_setprotection +3ffe8bb8 g O .bss 00000008 noise_array +4020b848 g F .irom0.text 00000034 ieee80211_find_channel +3ffe8364 g O .data 00000020 rate_11b_rate2_rateid_table +4022d028 g F .irom0.text 00000031 espconn_tcp_set_buf_count +40102d08 g F .text 00000021 lcd_locate +4000e04c g *ABS* 00000000 memmove +40228688 g F .irom0.text 00000047 ip_output +402280f8 g F .irom0.text 00000039 etharp_cleanup_netif +4022d8f8 g F .irom0.text 000000a5 ringbuf_memcpy_into +4021ec28 g F .irom0.text 00000033 pm_set_gpio_wakeup_pin +40210208 g F .irom0.text 0000004d user_uart_wait_tx_fifo_empty +40106329 g *ABS* 00000000 _text_end +401022cc g F .text 0000004f spi_flash_get_id +4020f760 g F .irom0.text 00000147 ppInstallKey +40213c2c g F .irom0.text 00000011 wifi_softap_set_config_current +4022c7d8 g F .irom0.text 00000047 udp_sendto +40215ecc g F .irom0.text 000000c5 ram_rfpll_set_freq +3ffedc20 g O .bss 00000014 check_timeouts_timer +3ffe82b4 g O .data 00000058 rate_11n_rate2_rateid_table +4022cf10 g F .irom0.text 00000022 espconn_tcp_set_wnd +4020dd2c g F .irom0.text 00000022 wpa_parse_wpa_ie +3ffedc3c g O .bss 00000001 cpu_overclock +401004ec g F .text 0000004f NMI_Handler +4022cc8c g F .irom0.text 00000049 espconn_create +4021f34c g F .irom0.text 00000008 pm_set_sleep_level +40215e34 g F .irom0.text 00000058 wait_rfpll_cal_end +40228994 g F .irom0.text 0000001a ipaddr_addr +3ffe8b8c g O .bss 00000004 tx_data2 +40105fec g F .text 00000000 .hidden __fixsfsi +40106068 w F .text 00000004 system_correct_flash_map +40209164 g F .irom0.text 00000216 cnx_start_handoff_cb +4022bc58 g F .irom0.text 0000007b tcp_keepalive +4020b824 g F .irom0.text 00000021 ieee80211_regdomain_attach +40227a24 g F .irom0.text 00000056 etharp_tmr +4022d2c0 g F .irom0.text 00000093 espconn_get_packet_info +4021a430 g F .irom0.text 0000002c set_rf_gain_stage10 +402203c4 g F .irom0.text 00000012 ic_set_opmode +400018a4 g *ABS* 00000000 ets_memset +4010632c g *ABS* 00000000 _lit4_start +40229e5c g F .irom0.text 00000143 tcp_alloc +40206078 g F .irom0.text 0000003d ieee80211_node_pwrsave +40201b70 g F .irom0.text 00000030 ieee80211_rfid_locp_recv_open +40206b44 g F .irom0.text 0000000a scan_set_desChan +4021f364 g F .irom0.text 00000008 pm_get_listen_interval +40225998 g F .irom0.text 0000003f wifi_softap_set_dhcps_offer_option +40000dc0 g *ABS* 00000000 ets_set_idle_cb +4022c690 g F .irom0.text 00000147 udp_sendto_if +40213f04 g F .irom0.text 0000000b wifi_enable_6m_rate +402182a8 g F .irom0.text 00000052 ram_set_noise_floor +3ffecf0c g O .bss 00000001 no_ap_found_index +402081c8 g F .irom0.text 00000046 ieee80211_add_ie_vendor_esp_ssid +4020fd00 g F .irom0.text 0000023c wpa_gen_wpa_ie +40218274 g F .irom0.text 0000002e get_noisefloor_sat +40216550 g F .irom0.text 0000003c chip_v6_set_chan_wakeup +3ffe803b g O .data 00000001 reconnect_internal +40219570 g F .irom0.text 0000020c phy_gpio_cfg +4022d78c g F .irom0.text 00000004 ringbuf_tail +3ffe8bb2 g O .bss 00000002 phy_txpwr_diff_flash +40229604 g F .irom0.text 00000004 tcp_arg +4022c324 g F .irom0.text 0000006e sys_timeouts_init +4022d6b4 g F .irom0.text 00000008 ringbuf_reset +40213890 g F .irom0.text 00000042 wifi_get_macaddr +40009410 g *ABS* 00000000 aes_unwrap +40220fbc g F .irom0.text 0000003d freq_change_check_scan_work +4022080c g F .irom0.text 00000024 ic_get_rssi +3ffee764 g O .bss 00000004 tcp_active_pcbs +4021ff24 g F .irom0.text 00000016 pm_assoc_parse +4020beb8 g F .irom0.text 00000069 wpa_add_kde +40213dc0 g F .irom0.text 00000011 wifi_softap_get_config_default +40220c50 g F .irom0.text 00000025 pp_try_enable_idle_timer +3ffedee4 g O .bss 00000040 wDevCtrl +4022d7a0 g F .irom0.text 00000092 ringbuf_findchr +3ffee780 g O .bss 00000004 udp_pcbs +4022d6c4 g F .irom0.text 0000004f ringbuf_free +4020dd50 g F .irom0.text 00000147 wpa_supplicant_parse_ies +3ffe8bae g O .bss 00000001 wakeup_rf_flag +3ffece5b g O .bss 00000001 BcnEb_update +40220004 g F .irom0.text 00000300 pm_onBcnRx +4021a69c g F .irom0.text 00000025 phy_set_most_tpw +4021573c g F .irom0.text 00000064 ram_pbus_xpd_tx_on +40214050 g F .irom0.text 0000000f wifi_rfid_locp_recv_open +402209ac g F .irom0.text 00000015 system_soft_wdt_feed +40229a1c g F .irom0.text 00000053 tcp_shutdown +402209f0 g F .irom0.text 00000033 pp_soft_wdt_restart +40227ea8 g F .irom0.text 0000024f ethernet_input +40102b14 w F .text 0000006f user_spi_flash_dio_to_qio_pre_init +40206ddc g F .irom0.text 000001cf scan_profile_check +40106329 g .text 00000000 _etext +40201d90 g F .irom0.text 00000012 ieee80211_regdomain_min_chan +4020988c g F .irom0.text 0000001f cnx_auth_timeout +40209bf4 g F .irom0.text 0000014d cnx_update_bss_more +40226d94 g F .irom0.text 0000012a espconn_kill_oldest_pcb +40102358 g F .text 00000057 spi_flash_write_status +402179c4 g F .irom0.text 0000003e start_dig_rx +40102e74 g F .text 000000a4 lcd_update +40210c74 g F .irom0.text 00000016 system_get_cpu_freq +40002ae8 g *ABS* 00000000 ets_bzero +4020fffc g F .irom0.text 00000070 rsn_cipher_put_suites +40218258 g F .irom0.text 0000001c ram_get_noisefloor +40205ba8 g F .irom0.text 00000044 ieee80211_setup_ratetable +3ffecf0d g O .bss 00000001 reconnect_flag +4020b99c g F .irom0.text 0000005f cnx_rc_update_rssi +40228d90 g F .irom0.text 0000000c pbuf_ref +3ffe8bd9 g O .bss 00000001 SDIO_slp_reject +4022d790 g F .irom0.text 00000004 ringbuf_head +3ffe8bda g O .bss 00000001 hardware_reject +4022d06c g F .irom0.text 00000016 espconn_regist_write_finish +4021e7e4 g F .irom0.text 00000017 fpm_rf_is_closed +4022fd0c g F .irom0.text 00000004 chip_v6_unset_chanfreq +40228be4 g F .irom0.text 0000000c netif_set_netmask +4021a7a4 g F .irom0.text 0000005d phy_after_init_enrx +4022996c g F .irom0.text 00000035 tcp_recv_null +3ffe8aa6 g O .bss 00000001 sleep_mode_flag +3ffee750 g O .bss 00000004 current_netif +402125bc g F .irom0.text 000000a7 wifi_station_set_auto_connect +40202794 g F .irom0.text 000000fa ieee80211_send_setup +402227bc g F .irom0.text 00000018 phytype2mode +4022e5d4 g F .irom0.text 000000cf igmp_leavegroup +4000c268 g *ABS* 00000000 __subsf3 +40103ccc g F .text 00000060 pp_soft_wdt_feed_local +3ffe8b98 g O .bss 00000001 periodic_cal_flag +4022ba14 g F .irom0.text 000000bf tcp_enqueue_flags +40104110 g F .text 00000005 GetAccess +40222dec g F .irom0.text 00000029 rc_only_sta_trc +4022ce50 g F .irom0.text 00000043 espconn_recved_len +4021f3c0 g F .irom0.text 000000d7 pm_open +4021ec7c g F .irom0.text 00000007 LightSleepWakedCbSetFunc +40226f58 g F .irom0.text 0000007b espconn_tcp_memp_free +4010314c g F .text 00000007 register_get_phy_addr +40201e78 g F .irom0.text 00000027 ieee80211_freedom_init +40229948 g F .irom0.text 00000024 tcp_close +4020def4 g F .irom0.text 00000061 hostapd_get_psk +402297d8 g F .irom0.text 00000059 tcp_recved +40202388 g F .irom0.text 0000040c ieee80211_output_pbuf +402204d4 g F .irom0.text 00000010 ic_set_gtk_alg +40100298 g F .text 00000039 Cache_Read_Enable_New +40229884 g F .irom0.text 00000053 tcp_pcb_purge +402124a8 g F .irom0.text 00000019 wifi_station_set_config +40212770 g F .irom0.text 0000008c wifi_station_save_bssid +402184d0 g F .irom0.text 000001f6 noise_init +402203dc g F .irom0.text 00000058 ic_enable_interface +40214654 g F .irom0.text 00000005 system_get_sdk_version +40219fc4 g F .irom0.text 00000063 phy_get_romfunc_addr +4020d728 g F .irom0.text 000003a1 wpa_receive +40225890 g F .irom0.text 0000003d wifi_softap_get_dhcps_lease +40220958 g F .irom0.text 0000002b PPWdtReset +40217954 g F .irom0.text 0000006f do_noisefloor +3ffe8e6a g O .bss 00000002 PktNumInOneChk +3ffe8e7c g O .bss 00000028 buffed_eb_arr +402105e4 g F .irom0.text 0000000b system_get_boot_version +40228a88 g F .irom0.text 00000014 ipaddr_ntoa +40211b10 g F .irom0.text 00000045 wifi_softap_dhcps_stop +40212b04 g F .irom0.text 0000002f wifi_station_get_connect_status +4022d230 g F .irom0.text 0000004b espconn_disconnect +40220484 g F .irom0.text 0000001e ic_is_pure_sta +40101abc g F .text 0000004e ets_timer_disarm +4021d3b4 g F .irom0.text 00000074 pm_sdio_nidle +402305a8 g O .irom0.text 00000007 tcp_persist_backoff +4021871c g F .irom0.text 00000077 sdt_on_noise_start +40214164 g F .irom0.text 00000042 system_os_task +3ffe8ac4 g O .bss 00000064 chip6_sleep_params +4020dacc g F .irom0.text 00000040 resend_eapol_handle +4021a8f8 g F .irom0.text 00000039 chan14_mic_enable +40216f4c g F .irom0.text 0000002e rtc_mem_backup +4000df48 g *ABS* 00000000 memcpy +4020f4f0 g F .irom0.text 000000d2 wpa_pmk_to_ptk +3ffee768 g O .bss 00000004 tcp_ticks +40216f7c g F .irom0.text 00000030 rtc_mem_recovery +3ffee76c g O .bss 00000004 tcp_listen_pcbs +4021e764 g F .irom0.text 00000060 fpm_attach +40004400 g *ABS* 00000000 SPI_write_status +40103f78 g F .text 00000077 ppCalTxop +4000242c g *ABS* 00000000 ets_install_putc1 +4021fefc g F .irom0.text 00000028 pm_allow_tx +40206598 g F .irom0.text 00000049 scan_build_chan_list +40212934 g F .irom0.text 0000014b wifi_station_ap_change +4022c224 g F .irom0.text 00000073 tcp_rexmit_rto +4020ca04 g F .irom0.text 0000002d wpa_auth_sta_deinit +40105358 g F .text 000000c3 wDev_AppendRxAmpduLensBlocks +40210168 g F .irom0.text 00000097 wdt_init +4020462c g F .irom0.text 00000c4f hostap_input +40217574 g F .irom0.text 0000006e pbus_set_rxbbgain +4000e2f0 g *ABS* 00000000 __floatsidf +4020fbb4 g F .irom0.text 0000003b wpa_attach +3ffe88dc g *ABS* 00000000 _rodata_end +40229fa0 g F .irom0.text 00000011 tcp_new +4022c674 g F .irom0.text 00000014 udp_disconnect +4022912c g F .irom0.text 0000008e pbuf_copy_partial +3ffe8eb5 g O .bss 00000001 dbg_stop_sw_wdt +4021a8dc g F .irom0.text 00000008 phy_get_rxnf_param +4010627c g F .text 0000005e rcUpdateRxDone +40101d54 g F .text 000000c2 load_non_32_wide_handler +4022e344 g F .irom0.text 0000001c igmp_lookfor_group +4020db44 g F .irom0.text 0000003d hexstr2bin +402149fc g F .irom0.text 00000074 eagle_lwip_if_free +401049b8 g F .text 00000019 lmacProcessCtsTimeout +3ffe8bc8 g O .bss 00000002 phy_tx_power_out +4022c2a0 g F .irom0.text 00000076 sys_timeout +4021e878 g F .irom0.text 0000000a fpm_is_open +4021117c g F .irom0.text 0000001a system_get_checksum +40101ed0 g F .text 00000083 vPortFree +3ffe8bd4 g O .bss 00000001 periodic_cal_sat +40224ef0 g F .irom0.text 000000cd dhcp_release +40211074 g F .irom0.text 00000014 system_get_data_of_array_16 +3ffe8bad g O .bss 00000001 chan14_mic_flag +402295f0 g F .irom0.text 00000011 raw_send +402063e0 g F .irom0.text 00000035 scan_cancel +402098ac g F .irom0.text 0000001f cnx_assoc_timeout +40230688 g F .irom0.text 0000006d inet_chksum_pbuf +402080dc g F .irom0.text 0000003e ieee80211_add_ie_vendor_esp_head +402291bc g F .irom0.text 00000067 pbuf_take +3ffe8bd0 g O .bss 00000001 tx_pwctrl_pk_num +400025e0 g *ABS* 00000000 rtc_get_reset_reason +40100224 g F .text 0000006b wdt_feed +402022c0 g F .irom0.text 00000077 ieee80211_crypto_decap +3ffe8d9b g O .bss 00000001 LCD_UPDATE_EVENT +40220e34 g F .irom0.text 00000186 freq_change_check_scan_done +3ffee754 g O .bss 00000004 current_iphdr_dest +3ffe8aa8 g O .bss 00000002 vga_lna_dcap +4021c62c g F .irom0.text 00000026 ram_get_bb_atten +4000e21c g *ABS* 00000000 __udivsi3 +402238c4 g F .irom0.text 00000034 wDev_Crypto_Conf +402212d0 g F .irom0.text 00000047 ppGetTxQFirstAvail_Locked +4022209c g F .irom0.text 000000c9 HdlAllBuffedEb +4022df00 g F .irom0.text 0000019b icmp_input +4021d3ac g F .irom0.text 00000002 pm_prepare_to_sleep +40103324 g F .text 0000006a phy_close_rf +4010606c g F .text 00000010 ets_timer_setfn +3ffe8ea7 g O .bss 00000001 idle_timer_reopen_flag +40203600 g F .irom0.text 00000123 ieee80211_send_proberesp +40103f28 g F .text 00000021 ppDiscardMPDU +40213014 g F .irom0.text 00000015 wifi_softap_get_beacon_only_mode +40217bc4 g F .irom0.text 00000020 target_power_add_backoff +40204378 g F .irom0.text 00000014 freqcal_scan_done +40004a00 g *ABS* 00000000 SPIEraseSector +40228b78 g F .irom0.text 0000006b netif_add +401028a4 g F .text 0000004b spi_flash_read +40103278 g F .text 00000098 sleep_set_rxpbus +3ffe8cf3 g O .bss 00000001 status_led_output_level +4021ff3c g F .irom0.text 0000001d pm_set_addr +40209478 g F .irom0.text 00000147 cnx_sta_connect_cmd +3ffe88e0 g *ABS* 00000000 _bss_start +4021ec84 g F .irom0.text 0000000a pm_is_open +3ffe8b9c g O .bss 00000004 test_print_time +402286d4 g F .irom0.text 0000005b ip_router +4010312c g F .text 0000001d register_phy_ops +40229864 g F .irom0.text 0000001d tcp_segs_free +4022e3bc g F .irom0.text 00000045 igmp_start +40211164 g F .irom0.text 0000000f wifi_station_dhcpc_set_maxtry +40214ca8 g F .irom0.text 00000029 skip_atoi +4022d27c g F .irom0.text 00000041 espconn_abort +40210b4c g F .irom0.text 0000002b spi_flash_erase_protect_enable +40104bac g F .text 000000a5 rcUpdateTxDone +3ffe88d2 g *ABS* 00000000 __XT_EXCEPTION_DESCS__ +4022d0c8 g F .irom0.text 000000cc espconn_get_connection_info +40222ff0 g F .irom0.text 0000001a wDevForceAck6M +40218d04 g F .irom0.text 00000223 phy_dig_spur_prot +40219078 g F .irom0.text 00000406 phy_bb_rx_cfg +40222d54 g F .irom0.text 0000007b rc_get_trc +3ffe8047 g O .data 00000001 default_hostname +40228adc g F .irom0.text 00000063 netif_set_ipaddr +4021d010 g F .irom0.text 0000007c dpd_mem_write +22222112 g *ABS* 00000000 _memmap_cacheattr_wb_allvalid +4022cfc0 g F .irom0.text 0000002a espconn_tcp_get_max_con_allow +402087f8 g F .irom0.text 0000004f ieee80211_ht_node_init +40217a34 g F .irom0.text 00000022 chip_v6_set_chanfreq +3ffe8aa7 g O .bss 00000001 tout_dis_txpwr_track +4020f738 g F .irom0.text 00000022 dhcp_bind_check +402124f4 g F .irom0.text 00000016 wifi_station_get_current_ap_id +4021d380 g F .irom0.text 0000002c pm_set_pll_xtal_wait_time +40201ea0 g F .irom0.text 0000001c ieee80211_user_ie_init +4021feec g F .irom0.text 0000000f pm_scan_unlocked +40215fa0 g F .irom0.text 0000028b ram_set_channel_freq +40002ab8 g *ABS* 00000000 ets_strncmp +4021b0a4 g F .irom0.text 00000069 set_txdc_pbus +40104100 g F .text 0000000f lmacIsIdle +4022b640 g F .irom0.text 00000224 tcp_write +40208aa0 g F .irom0.text 000000bb ieee80211_setup_htrates +402107ac g F .irom0.text 000000af spi_flash_erase_sector_check +3ffecf04 g O .bss 00000004 max_11g_rate +4021e800 g F .irom0.text 00000075 wifi_fpm_close +3ffe8029 g O .data 00000001 phy_in_most_power_bk +4022cf78 g F .irom0.text 0000001c espconn_tcp_set_max_retran +40202d7c g F .irom0.text 00000047 ieee80211_getcapinfo +40100000 g *ABS* 00000000 _text_start +40227a7c g F .irom0.text 0000004f etharp_find_addr +40202dd8 g F .irom0.text 00000571 ieee80211_send_mgmt +40104f6c g F .text 00000084 rcGetRate +40102904 g F .text 000001a1 spi_flash_issi_enable_QIO_mode +40002ac8 g *ABS* 00000000 ets_strlen +4021da78 g F .irom0.text 0000001f sleep_opt_8266 +40210ad8 g F .irom0.text 00000072 system_get_current_sumlength +402203b4 g F .irom0.text 0000000d ic_get_addr +40208924 g F .irom0.text 0000017c ieee80211_ht_updateparams +3ffe8aa5 g O .bss 00000001 or_pll_cap_last +4020b49c g F .irom0.text 0000003d wifi_station_stop +40222f7c g F .irom0.text 0000002f wDev_Reset_TBTT +40220778 g F .irom0.text 00000059 ic_set_key +3ffedd70 g O .bss 00000004 hostname +40223230 g F .irom0.text 0000002b wDev_SetRxPolicy +40211050 g F .irom0.text 00000024 system_get_data_of_array_8 +40100004 g F .text 00000000 call_user_start +4020784c g F .irom0.text 00000013 clean_rate_set +3ffed338 g O .bss 00000001 manual_set_flag +00000110 g *ABS* 00000000 _memmap_cacheattr_wb_base +4022962c g F .irom0.text 00000080 tcp_bind +3ffe8030 g O .data 00000004 chip_version +40229de0 g F .irom0.text 00000011 tcp_abort +40105da0 g F .text 0000001d wDevDisableRx +4021ec90 g F .irom0.text 00000041 pm_get_idle_wait_time +4021266c g F .irom0.text 000000f9 wifi_station_save_pmk2cache +4010609c g F .text 00000000 xthal_set_intclear +40216474 g F .irom0.text 000000db chip_v6_set_chan +402207f4 g F .irom0.text 00000015 ic_remove_key +3ffe8bdb g O .bss 00000001 sleep_wake_bbpll +4000ba28 g *ABS* 00000000 hmac_sha1 +40102818 g F .text 00000033 spi_flash_enable_qmode +40104064 g F .text 00000048 esf_rx_buf_alloc +402265d8 g F .irom0.text 00000115 dns_gethostbyname +40205d54 g F .irom0.text 00000085 chm_init +3ffe8bdc g O .bss 00000001 freq_trace_enable +40210f30 g F .irom0.text 0000000a system_get_rtc_time +40212598 g F .irom0.text 00000015 wifi_station_get_auto_connect +402100f0 g F .irom0.text 00000004 wpa_sm_get_beacon_ie +40206440 g F .irom0.text 0000000a scan_remove_bssid +40225594 g F .irom0.text 00000181 dhcps_start +40222174 g F .irom0.text 0000033c esf_buf_alloc +40205c40 g F .irom0.text 00000033 chm_end_op +3ffe8e6e g O .bss 00000002 TestStaFreqCalValFilter +3ffe8bd6 g O .bss 00000002 lslp_mem_opt_8266 +402135f4 g F .irom0.text 0000005d wifi_promiscuous_set_mac +3ffecee3 g O .bss 00000001 freq_change_check_softap_link_enable +4020f4b0 g F .irom0.text 0000003f wpa_compare_rsn_ie +4021d864 g F .irom0.text 00000212 pm_wakeup_init +40208bc8 g F .irom0.text 00000034 ieee80211_add_htinfo_vendor +4000d770 g *ABS* 00000000 __umoddi3 +4021d7fc g F .irom0.text 00000055 pm_unmask_bt +402294c4 g F .irom0.text 000000a7 raw_sendto +fffff22f g *ABS* 00000000 _memmap_cacheattr_bp_strict +4020fce4 g F .irom0.text 0000001c inc_byte_array +40216f44 g F .irom0.text 00000002 ram_tx_mac_disable +402130a0 g F .irom0.text 00000010 wifi_register_user_ie_manufacturer_recv_cb +4021f214 g F .irom0.text 00000017 pm_rf_is_closed +4021d08c g F .irom0.text 00000034 pm_usec2rtc +40227490 g F .irom0.text 00000046 espconn_lock_recv +40104c7c g F .text 000002f0 rcGetSched +4021e5cc g F .irom0.text 00000067 wifi_fpm_open +4020dea0 g F .irom0.text 00000052 hostapd_setup_wpa_psk +4020a9f0 g F .irom0.text 000000e7 sta_rx_eapol +3ffe8abc g O .bss 00000004 rxiq_compute_num +4022d05c g F .irom0.text 0000000e espconn_regist_sentcb +40212cbc g F .irom0.text 0000005c wifi_softap_cacl_mac +40219f24 g F .irom0.text 00000036 write_data_to_rtc +402119fc g F .irom0.text 00000011 wifi_get_opmode +4020644c g F .irom0.text 00000008 scan_hidden_ssid +3ffe8bac g O .bss 00000001 chan14_mic_en +4000d310 g *ABS* 00000000 __udivdi3 +40226c98 g F .irom0.text 0000005d espconn_kill_pcb +40201ba4 g F .irom0.text 00000015 ieee80211_rfid_locp_recv_close +4022e7a0 g F .irom0.text 0000006c system_partition_get_ota_partition_size +40225230 g F .irom0.text 00000036 dhcp_stop +40213c18 g F .irom0.text 00000011 wifi_softap_set_config +40218f28 g F .irom0.text 0000004b chip_v6_rxmax_ext_dig +402276e4 g F .irom0.text 000000c1 espconn_tcp_client +40214780 g F .irom0.text 0000006e ets_timer_init +4021d6d8 g F .irom0.text 00000113 pm_set_wakeup_btco +4000e2e8 g *ABS* 00000000 __floatunsidf +4020b934 g F .irom0.text 00000013 ieee80211_ht_node_cleanup +40220ba0 g F .irom0.text 0000000f pp_noise_test +40229070 g F .irom0.text 000000bb pbuf_copy +4010284c g F .text 00000051 spi_flash_write +4022b8f0 g F .irom0.text 000000c0 tcp_rexmit +3ffe8060 g O .data 00000002 NoiseTimerInterval +40102098 g F .text 00000169 pvPortMalloc +3ffedc40 g O .bss 00000004 done_cb +2222211f g *ABS* 00000000 _memmap_cacheattr_wt_trapnull +3ffe8bca g O .bss 00000002 phy_tx_pwr_error +3ffe8ab8 g O .bss 00000004 g_phyFuns +402052a8 g F .irom0.text 00000158 wifi_softap_start +4021f4b0 g F .irom0.text 00000015 pm_disable_active_timer +4022dec8 g F .irom0.text 0000001c espconn_igmp_leave +40104828 g F .text 0000004b lmacProcessAckTimeout +4021f4c8 g F .irom0.text 0000001c pm_enable_active_timer +4021302c g F .irom0.text 00000071 wifi_softap_set_beacon_only_mode +3ffe805e g O .data 00000002 sleep_start_wait_time +40103154 g F .text 00000018 phy_change_channel +4021f498 g F .irom0.text 00000012 pm_incr_active_cnt +4022cdc4 g F .irom0.text 0000008a espconn_recv +4022e518 g F .irom0.text 000000b9 igmp_joingroup +4021f560 g F .irom0.text 000000ff pm_attach +4021324c g F .irom0.text 00000044 wifi_get_user_ie +40100030 g .text 00000000 _KernelExceptionVector +4020b880 g F .irom0.text 00000002 ieee80211_tx_mgt_cb +4020ffd0 g F .irom0.text 0000002a wpa_cipher_to_alg +4022ff8c g O .irom0.text 00000008 ieee80211_opcap +4022e2a4 g F .irom0.text 0000006d igmp_stop +402277ac g F .irom0.text 000000b7 espconn_tcp_server +3fffccf0 g *ABS* 00000000 Te0 +4020b9fc g F .irom0.text 00000011 cnx_rc_update_age +40208210 g F .irom0.text 00000055 ieee80211_add_ie_vendor_esp_manufacturer +40228bfc g F .irom0.text 0000003b netif_set_up +40205e98 g F .irom0.text 00000024 chm_return_home_channel +3ffe8d28 g O .bss 00000001 dbg_timer_flag +3ffedc44 g O .bss 0000001c rst_if +40215688 g F .irom0.text 000000b3 ram_pbus_debugmode +40000f98 g *ABS* 00000000 ets_isr_mask +4022fd04 g F .irom0.text 00000002 chip_v6_set_sense +3ffedd74 g O .bss 00000004 flash_read +3ff00000 g *ABS* 00000000 _dport0_literal_start +4010495c g F .text 0000005a lmacProcessCollisions +4020dc28 g F .irom0.text 00000103 wpa_config_parse_string +402143a0 g F .irom0.text 00000047 system_deep_sleep_instant +3ffe8ba2 g O .bss 00000001 phy_set_most_tpw_index +4021ec5c g F .irom0.text 0000000d pm_clear_gpio_wakeup_pin +3ffe8ea5 g O .bss 00000001 total_buffed_eb_num +40002f0c g *ABS* 00000000 ets_get_cpu_frequency +40230598 g O .irom0.text 00000010 tcp_pcb_lists +402207d4 g F .irom0.text 00000020 ic_get_key +4010009c g .text 00000000 _NMILevelVector +40004a4c g *ABS* 00000000 SPIWrite +40220a40 g F .irom0.text 0000001e TxNodeNum +4022ca34 g F .irom0.text 000000b2 espconn_copy_partial +3ffe8039 g O .data 00000001 timer2_ms_flag +3ffee878 g *ABS* 00000000 _bss_end +4021373c g F .irom0.text 00000007 wifi_set_promiscuous_rx_cb +4021d0c4 g F .irom0.text 00000052 pm_usec2rtc_64 +4022876c g F .irom0.text 00000045 ip4_addr_netmask_valid +40212a84 g F .irom0.text 0000007d wifi_station_dhcpc_event +3ffee770 g O .bss 00000004 tcp_tmp_pcb +3ffe8e68 g O .bss 00000002 pktnum_sta_freqcal +40212e04 g F .irom0.text 0000009a wifi_softap_get_station_info +3ffed924 g O .bss 00000004 plink_active +40210680 g F .irom0.text 0000003e system_upgrade_userbin_check +4022ca14 g F .irom0.text 0000001f espconn_pbuf_delete +4020f9e8 g F .irom0.text 000001a0 eagle_auth_done +402133d0 g F .irom0.text 0000001b wifi_set_sleep_type +4020a0ec g F .irom0.text 000000fd cnx_node_leave +402273e4 g F .irom0.text 00000045 espconn_recv_hold +40214a70 g F .irom0.text 00000020 eagle_lwip_getif +4022cae8 g F .irom0.text 0000001e espconn_list_creat +3ffecee0 g O .bss 00000002 scannum +402095c8 g F .irom0.text 00000069 cnx_connect_timeout +3ffe8baf g O .bss 00000001 phy_rx_gain_dc_flag +402116d4 g F .irom0.text 00000074 system_restore +4020b678 g F .irom0.text 00000056 ieee80211_recv_action +402064f4 g F .irom0.text 0000009f scan_prefer_chan +40214410 g F .irom0.text 000000d1 system_restart_local +4021f338 g F .irom0.text 00000012 pm_get_sleep_type +40225a40 g F .irom0.text 000000a8 wifi_softap_dhcps_client_leave +4000ccb8 g *ABS* 00000000 __fixdfsi +40213404 g F .irom0.text 00000017 wifi_set_listen_interval +4020c8b4 g F .irom0.text 000000d7 wpa_init +40205b64 g F .irom0.text 00000037 ieee80211_mesh_quick_ie_add +3ffe8e78 g O .bss 00000002 AvgFreqOffsetInOneChk +3ffe82a4 g O .data 00000001 TmpSTAAPCloseAP +3ffe8bc4 g O .bss 00000004 check_result +3ffee878 g *ABS* 00000000 _heap_start +40004b1c g *ABS* 00000000 SPIRead +4022d58c g F .irom0.text 0000001c espconn_gethostbyname +40216cf0 g F .irom0.text 00000131 phy_get_check_flag +3ffe8ba0 g O .bss 00000001 phy_in_vdd33_offset +4020150c g F .irom0.text 00000061 aes_encrypt_init +40210b7c g F .irom0.text 00000016 system_deep_sleep_set_option +4022d750 g F .irom0.text 00000018 ringbuf_is_full +402104ec g F .irom0.text 0000003e system_adc_read +4022bad4 g F .irom0.text 00000048 tcp_send_fin +40102260 g F .text 00000035 Cache_Read_Disable_2 +4021c660 g F .irom0.text 000001b2 ram_rfcal_txcap +40210bd8 g F .irom0.text 00000015 system_phy_set_rfoption +4022bdec g F .irom0.text 00000437 tcp_output +40213f84 g F .irom0.text 0000002f wifi_set_user_rate_limit +40210638 g F .irom0.text 00000046 system_upgrade_userbin_set +40001da0 g *ABS* 00000000 ets_write_char +4020f998 g F .irom0.text 00000031 wpa_config_bss +40213f30 g F .irom0.text 00000022 wifi_set_user_fixed_rate +40211274 g F .irom0.text 0000012d system_param_save_with_protect +40201da4 g F .irom0.text 0000002b ieee80211_regdomain_chan_in_range +4020e52c g F .irom0.text 00000277 eapol_txcb +22222222 g *ABS* 00000000 _memmap_cacheattr_bp_allvalid +401048e8 g F .text 00000071 lmacProcessCollision +4022320c g F .irom0.text 00000022 wDev_ClearBssid +3ffe8000 g .data 00000000 _Pri_3_HandlerAddress +40212bf8 g F .irom0.text 0000001f wifi_station_get_hostname +3ffe8eb0 g O .bss 00000001 pend_flag_noise_check +402225ec g F .irom0.text 000000dd esf_buf_setup +3ffe8e64 g O .bss 00000002 avg_freqoffset_sta_freqcal +4021a404 g F .irom0.text 00000002 app_test_code +22222112 g *ABS* 00000000 _memmap_cacheattr_wt_allvalid +3ffee77c g O .bss 00000004 tcp_input_pcb +4022786c g F .irom0.text 0000001c espconn_init +3ffedec4 g O .bss 00000020 lmacConfMib +4022956c g F .irom0.text 00000081 raw_input +4010607c g F .text 00000002 xPortWantedSizeAlign +4020b948 g F .irom0.text 00000052 ieee80211_setup_basic_htrates +40201bbc g F .irom0.text 0000001d ieee80211_rfid_locp_recv_reset +40219aa0 g F .irom0.text 00000055 periodic_cal_top +3ffe88d2 g *ABS* 00000000 __XT_EXCEPTION_DESCS_END__ +4022b864 g F .irom0.text 0000008b tcp_send_empty_ack +40203ee0 g F .irom0.text 00000081 hostap_handle_timer +40215040 g F .irom0.text 000000cc ets_sprintf +40203a48 g F .irom0.text 00000418 ieee80211_beacon_alloc +40226528 g F .irom0.text 0000001f dns_setserver +3ffee688 g O .bss 00000014 sta_con_timer +4022b9b0 g F .irom0.text 00000063 tcp_rexmit_fast +40213dac g F .irom0.text 00000011 wifi_softap_get_config +3ffe830c g O .data 00000058 rate_11g_rate2_rateid_table +40203360 g F .irom0.text 0000029c ieee80211_alloc_proberesp +4000e268 g *ABS* 00000000 __umodsi3 +40220d48 g F .irom0.text 00000057 ppRecycleRxPkt +4020b42c g F .irom0.text 0000006d wifi_station_start +402100c8 g F .irom0.text 00000004 eloop_register_timeout +4022158c g F .irom0.text 000000b5 ppCheckTxIdle +3ffee5d8 g O .bss 00000014 ApFreqCalTimer +402104dc g F .irom0.text 0000000f system_pp_recycle_rx_pkt +402287b8 g F .irom0.text 000001db ipaddr_aton +4020ffa4 g F .irom0.text 0000002a wpa_cipher_key_len +40215018 g F .irom0.text 0000001b ets_vsprintf +40223a34 g F .irom0.text 00000043 wdev_set_sniffer_addr +3ffe8b94 g O .bss 00000004 tx_data4 +40218304 g F .irom0.text 00000041 ram_start_noisefloor +40228730 g F .irom0.text 0000003b ip4_addr_isbroadcast +402230d4 g F .irom0.text 00000022 wDev_EnableUcRx +4021dbd4 g F .irom0.text 000001ae change_bbpll160_sleep +3ff00000 g *ABS* 00000000 _dport0_rodata_start +40212254 g F .irom0.text 00000011 wifi_station_get_config +3ff00000 g *ABS* 00000000 _dport0_data_start +40228ad4 g F .irom0.text 00000007 netif_set_default +4022c688 g F .irom0.text 00000006 udp_recv +401051f4 g F .text 0000012b wDev_AppendRxBlocks +4022d3b4 g F .irom0.text 00000066 espconn_clear_opt +4021fec0 g F .irom0.text 0000000f pm_try_scan_unlock +4021cc10 g F .irom0.text 000001a1 ram_rxiq_cover_mg_mp +40209748 g F .irom0.text 00000141 cnx_sta_scan_cmd +402074f4 g F .irom0.text 0000005f ieee80211_deliver_data +4022e80c g F .irom0.text 00000043 system_partition_get_item +4021a9a4 g F .irom0.text 00000211 phy_wakeup_rf +4021253c g F .irom0.text 00000059 wifi_station_scan +40230b7c g *ABS* 00000000 _irom0_text_end +40223374 g F .irom0.text 00000086 wDev_remove_KeyEntry +40000e04 g *ABS* 00000000 ets_run +3ffe8044 g O .data 00000001 dhcpc_flag +4010415c g F .text 000000a0 lmacProcessTxSuccess +4021cdb4 g F .irom0.text 00000213 ram_rfcal_rxiq +4021d32c g F .irom0.text 0000004b pm_sleep_opt_bb_on +40222f68 g F .irom0.text 00000007 wDev_Set_Beacon_Int +40215564 g F .irom0.text 00000016 phy_disable_agc +40228c38 g F .irom0.text 00000025 netif_set_down +40222784 g F .irom0.text 00000024 lmac_print_ac_status +40228e14 g F .irom0.text 00000185 pbuf_alloc +40228cbc g F .irom0.text 0000004b netif_set_link_up +40215c94 g F .irom0.text 00000132 ram_ana_inf_gating_en +40205850 g F .irom0.text 00000257 wifi_softap_stop +40202ae0 g F .irom0.text 00000047 ieee80211_add_xrates +40216864 g F .irom0.text 0000004c low_power_set +40216244 g F .irom0.text 000001bd chip_60_set_channel +40213484 g F .irom0.text 0000000f wifi_get_listen_interval +4020a404 g F .irom0.text 00000021 get_iav_key +40220e14 g F .irom0.text 0000001a freq_change_check_scan_start +40219ef8 g F .irom0.text 00000029 deep_sleep_set_option +402010f4 g F .irom0.text 0000040c rijndaelEncrypt +4020bc50 g F .irom0.text 0000011c wpa_write_rsn_ie +4021e71c g F .irom0.text 0000003b fpm_auto_sleep_set_in_null_mode +3ffe8d99 g O .bss 00000001 i +40214070 g F .irom0.text 0000000f wifi_register_rfid_locp_recv_cb +3ffe8cf4 g O .bss 00000001 protect_flag +40209fd0 g F .irom0.text 000000a0 cnx_node_remove +40203724 g F .irom0.text 00000035 ieee80211_alloc_deauth +40102ce8 g F .text 00000020 lcd_str +40220cec g F .irom0.text 00000028 ppRegisterTxCallback +4022d6b0 g F .irom0.text 00000004 ringbuf_buffer_size +3ffedd78 g O .bss 00000100 pmc +4021a03c g F .irom0.text 000003c8 register_chipv6_phy +4022d1e0 g F .irom0.text 00000050 espconn_regist_time +3ffede78 g O .bss 00000020 if_ctrl +40215dc8 g F .irom0.text 00000067 ram_restart_cal +40215534 g F .irom0.text 00000016 phy_delete_channel +40215594 g F .irom0.text 00000016 phy_set_sense +40106084 g F .text 00000017 memchr +4021a768 g F .irom0.text 0000003a phy_check_data_table +40230568 g O .irom0.text 00000004 ip_addr_broadcast +3ffece5a g O .bss 00000001 PendFreeBcnEb +40222bac g F .irom0.text 000000d9 rc_enable_trc +4021b444 g F .irom0.text 000001b3 tx_pwr_backoff +4020ba7c g F .irom0.text 00000017 ieee80211_set_shortslottime +40220434 g F .irom0.text 00000011 ic_interface_enabled +40218f9c g F .irom0.text 00000059 dig_11b_filt_sel +40230570 g O .irom0.text 00000028 memp_sizes +40209b18 g F .irom0.text 00000059 cnx_rc_update_state_metric +3ffe8b88 g O .bss 00000004 tx_data1 +4020db0c g F .irom0.text 00000038 hex2byte +4021058c g F .irom0.text 0000002e system_get_vdd33 +40215928 g F .irom0.text 00000029 ram_chip_v6_rx_init +4020f6b4 g F .irom0.text 0000000f os_random +4020aafc g F .irom0.text 00000927 sta_input +4022dee4 g F .irom0.text 0000001c espconn_igmp_join +4022c60c g F .irom0.text 00000065 udp_connect +3ffecf08 g O .bss 00000004 max_11n_rate +40205d1c g F .irom0.text 00000033 chm_set_current_channel +40000f74 g *ABS* 00000000 ets_intr_lock +4021a730 g F .irom0.text 00000014 phy_get_rand +401023e0 g F .text 00000196 flash_gd25q32c_read_status +3ffee758 g O .bss 00000004 current_header +3ffe8e6c g O .bss 00000001 test_freq_val_force_flag +402130e4 g F .irom0.text 00000168 wifi_set_user_ie +4022cf68 g F .irom0.text 0000000d espconn_tcp_get_max_retran +4022d9ac g F .irom0.text 0000009f ringbuf_memcpy_from +40222b90 g F .irom0.text 00000014 trc_onScanDone +40222760 g F .irom0.text 0000001f lmacSetRetryLimit +3ffedc60 g O .bss 00000100 event_TaskQueue +4021557c g F .irom0.text 00000016 phy_initialize_bb +40203878 g F .irom0.text 000001c5 ieee80211_freedom_output +402155b0 g F .irom0.text 000000c6 ram_pbus_set_rxgain +40210ba8 g F .irom0.text 00000015 system_phy_set_max_tpw +402204c4 g F .irom0.text 00000010 ic_set_ptk_alg +40228b40 g F .irom0.text 00000034 netif_set_addr +40224d34 g F .irom0.text 000000a5 dhcp_arp_reply +4020f928 g F .irom0.text 00000037 wpa_deauth_disaonnect +40104ff0 g F .text 00000019 rcReachRetryLimit +4021de30 g F .irom0.text 0000000f rtc_set_cpu_80m +40213420 g F .irom0.text 00000025 wifi_enable_gpio_wakeup +4020200c g F .irom0.text 00000012 esp_random +4022935c g F .irom0.text 00000048 pbuf_strstr +40211048 g F .irom0.text 00000005 system_get_rst_info +3ffe8000 g *ABS* 00000000 _data_start +4010176c g F .text 00000066 system_rtc_mem_write +40002ecc g *ABS* 00000000 ets_delay_us +40000dd0 g *ABS* 00000000 ets_task +40210d20 g F .irom0.text 00000014 system_relative_time +4020e4a0 g F .irom0.text 0000003b wpa_register +40220a94 g F .irom0.text 0000010b pp_enable_noise_timer +40000f80 g *ABS* 00000000 ets_intr_unlock +4020ba94 g F .irom0.text 00000002 ieee80211_wme_updateparams +40213290 g F .irom0.text 0000000b wifi_get_phy_mode +3ffee784 g O .bss 000000b4 premot +3ffede98 g O .bss 00000001 interface_mask +401051d0 g F .text 00000015 wDev_ClearTxqCollisions +4021e4dc g F .irom0.text 0000004d wifi_fpm_do_wakeup +4022bcd8 g F .irom0.text 0000010f tcp_zero_window_probe +40207654 g F .irom0.text 00000081 ieee80211_setup_phy_mode +40207dc4 g F .irom0.text 000000ef ieee80211_parse_rsn +40226590 g F .irom0.text 00000017 dns_getserver +40215a10 g F .irom0.text 000001b9 readvdd33 +40220a28 g F .irom0.text 00000017 RxNodeNum +4021517c g F .irom0.text 000000cd ets_snprintf +40211158 g F .irom0.text 00000008 wifi_softap_dhcps_status +4000e2ac g *ABS* 00000000 __floatsisf +40215960 g F .irom0.text 000000a8 tsen_meas +402146ac g F .irom0.text 000000a9 ets_timer_handler_isr +4022516c g F .irom0.text 000000c2 dhcp_fine_tmr +3ffee6a0 g O .bss 0000000a dhcp_rx_options_given +4022d654 g F .irom0.text 00000059 ringbuf_new +402209c8 g F .irom0.text 00000028 pp_soft_wdt_stop +40222c88 g F .irom0.text 00000008 rc_get_mask +4021b128 g F .irom0.text 00000104 correct_rf_ana_gain +40211cc0 g F .irom0.text 00000011 wifi_get_opmode_default +3ffede9c g O .bss 00000014 DefFreqCalTimer +3ffe8d98 g O .bss 00000001 shift_str_state_machine +3ffe82a5 g O .data 00000001 TestStaFreqCalValOK +4021f354 g F .irom0.text 00000008 pm_get_sleep_level +40225aec g F .irom0.text 0000023b wifi_softap_dhcps_client_update +3ffe8b7b g O .bss 00000001 txbk_dpdby_flag +4000bfa8 g *ABS* 00000000 strncmp +402257a4 g F .irom0.text 000000ea wifi_softap_set_dhcps_lease +40004e90 g *ABS* 00000000 gpio_pin_wakeup_enable +2222211f g *ABS* 00000000 _memmap_cacheattr_wba_trapnull +40214cd8 g F .irom0.text 00000340 ets_vsnprintf +402289b0 g F .irom0.text 000000d1 ipaddr_ntoa_r +4021a854 g F .irom0.text 0000003a phy_debug_print +3ffedd60 g O .bss 00000004 promiscuous_cb +401054d0 g F .text 000008c9 wDev_ProcessFiq +4020bf24 g F .irom0.text 00000137 wpa_validate_wpa_ie +4022e404 g F .irom0.text 0000010f igmp_input +402265a8 g F .irom0.text 00000029 dns_tmr +4021e7c4 g F .irom0.text 0000001f fpm_allow_tx +4021344c g F .irom0.text 00000015 wifi_disable_gpio_wakeup +4010272c g F .text 00000091 spi_flash_check_wr_protect +402276b4 g F .irom0.text 00000025 espconn_unlock_recv +3ffee774 g O .bss 00000004 tcp_bound_pcbs +40209a68 g F .irom0.text 000000ad cnx_bss_alloc +4021f35c g F .irom0.text 00000008 pm_set_listen_interval +4021f520 g F .irom0.text 00000010 pm_enable_gpio_wakeup +3ffedf24 g O .bss 000006b4 g_ic +4021d638 g F .irom0.text 000000a0 pm_set_sleep_btco +40229834 g F .irom0.text 0000002d tcp_seg_free +4021ed20 g F .irom0.text 00000027 pm_get_ck170_period +40210c90 g F .irom0.text 0000002d system_overclock +40212c28 g F .irom0.text 00000093 wifi_station_set_hostname +40229288 g F .irom0.text 00000073 pbuf_memcmp +4022098c g F .irom0.text 00000020 pp_soft_wdt_init +40217bf0 g F .irom0.text 0000018a tx_pwctrl_init_cal +4010388c g F .text 00000144 pm_set_sleep_mode +402124c4 g F .irom0.text 00000019 wifi_station_set_config_current +fffff11f g *ABS* 00000000 _memmap_cacheattr_wb_strict +40102ab8 g F .text 00000054 flash_gd25q32c_enable_QIO_mode +4022d194 g F .irom0.text 00000049 espconn_accept +4021d548 g F .irom0.text 00000093 pm_set_wakeup_mac +40102e0c g F .text 0000001f lcd_buf_char +4021a6e4 g F .irom0.text 00000015 phy_vdd33_set_tpw +40201ed0 g F .irom0.text 0000004f ieee80211_mhz2ieee +4010371c g F .text 0000014e pm_goto_sleep +40000454 g *ABS* 00000000 _xtos_set_exception_handler +3ffe83c0 g O .rodata 00000013 SDK_VERSION +40206468 g F .irom0.text 00000060 scan_add_probe_ssid +4020b4e0 g F .irom0.text 00000025 ieee80211_proto_attach +40207860 g F .irom0.text 00000072 ieee80211_setup_rates +3ffe805c g O .data 00000001 CanDoFreqCal +40222e3c g F .irom0.text 000000ea wDev_Option_Init +40229fe8 g F .irom0.text 00000105 tcp_connect +4020a440 g F .irom0.text 0000015d ieee80211_recv_action_vendor_spec +40214090 g F .irom0.text 0000003a wifi_status_led_install +402307b8 g F .irom0.text 000000dc inet_chksum_pseudo_partial +4022d0a4 g F .irom0.text 0000000f espconn_regist_reconcb +400018d4 g *ABS* 00000000 ets_memcmp +402062ac g F .irom0.text 00000134 freq_changle_scan_start +402140f4 g F .irom0.text 00000014 wifi_set_status_led_output_level +402064c8 g F .irom0.text 00000022 scan_remove_probe_ssid +4020b5b0 g F .irom0.text 00000038 ieee80211_send_action_register +4021d480 g F .irom0.text 00000034 pm_open_rf +40222f4c g F .irom0.text 00000015 wDev_Disable_Beacon_Tsf +3ffe8bce g O .bss 00000002 phy_meas_freq_offset +40211748 g F .irom0.text 0000001b system_save_sys_param +40213fc0 g F .irom0.text 00000017 wifi_set_user_limit_rate_mask +4021ecd4 g F .irom0.text 0000000f pm_is_gpio_int_trig +402168b4 g F .irom0.text 000001a1 test_tout +4022db28 g F .irom0.text 00000160 espconn_udp_sendto +3ffece59 g O .bss 00000001 BcnWithMcastSendStart +4021ece8 g F .irom0.text 00000033 pm_rtc_clock_cali_proc +40217060 g F .irom0.text 000003b8 set_rx_gain_cal_iq +40104a44 g F .text 00000017 lmacRxDone +4000dea8 g *ABS* 00000000 memcmp +40219f5c g F .irom0.text 00000030 get_data_from_rtc +4022cf3c g F .irom0.text 0000000d espconn_tcp_get_max_con +40205cd0 g F .irom0.text 00000047 chm_acquire_lock +40222fb0 g F .irom0.text 00000033 wDev_Get_Next_TBTT +4021483c g F .irom0.text 000001bf eagle_lwip_if_alloc +4020811c g F .irom0.text 00000067 ieee80211_add_ie_vendor_esp_simple_pair +4021f370 g F .irom0.text 00000002 pm_suspend +4020f2b4 g F .irom0.text 000001a4 wpa_parse_wpa_ie_wpa +3ffedc34 g O .bss 00000001 user_init_flag +3ffe8aac g O .bss 00000003 rfpll_sdm_reg +4022cfa4 g F .irom0.text 0000001c espconn_tcp_set_max_syn +40208bac g F .irom0.text 0000001b ieee80211_add_htinfo +3ffe83b2 g *ABS* 00000000 _data_end +40228d08 g F .irom0.text 00000010 netif_set_link_down +3ffe8050 g O .data 00000004 demo_tekst +40210780 g F .irom0.text 00000008 system_upgrade_flag_check +40224de0 g F .irom0.text 0000010e dhcp_renew +4020d6b0 g F .irom0.text 0000006d wpa_auth_sta_associated +40210bf0 g F .irom0.text 00000015 system_phy_set_powerup_option +40208850 g F .irom0.text 000000bb ieee80211_parse_htcap +40216620 g F .irom0.text 0000023d chip_v6_rf_init +4022cb4c g F .irom0.text 00000064 espconn_find_connection +4000cb94 g *ABS* 00000000 __divdf3 +402078d8 g F .irom0.text 00000037 ieee80211_alloc_challenge +40201e5c g F .irom0.text 00000015 ieee80211_rate_ref_init +40201cfc g F .irom0.text 00000032 ieee80211_regdomain_get_country +4022302c g F .irom0.text 000000a5 wDev_SetMacAddress +3ffe88d2 g *ABS* 00000000 __XT_EXCEPTION_TABLE__ +40229fb4 g F .irom0.text 00000032 tcp_eff_send_mss +401051a8 g F .text 00000015 wDev_ProcessCollision +40225720 g F .irom0.text 00000084 dhcps_stop +402138d8 g F .irom0.text 0000005c wifi_softap_set_default_ssid +40209bc4 g F .irom0.text 0000002f cnx_update_bss +40222dd0 g F .irom0.text 0000001c rc_get_trc_by_index +40220714 g F .irom0.text 00000062 ic_bss_info_update +402135c0 g F .irom0.text 00000033 wifi_get_country +40221344 g F .irom0.text 000000d5 pp_attach +402273bc g F .irom0.text 00000024 espconn_tcp_disconnect +40227430 g F .irom0.text 0000005f espconn_recv_unhold +4000c8f0 g *ABS* 00000000 __muldf3 +402204a4 g F .irom0.text 00000010 ic_get_ptk_alg +40102e2c g F .text 00000011 lcd_buf_locate +3ffe8d00 g O .bss 00000001 deep_sleep_flag +3ffee6d4 g O .bss 00000078 espconn_TaskQueue +400060ec g F *ABS* 00000000 rom_chip_v5_enable_cca +40209380 g F .irom0.text 000000a3 cnx_csa_fn +40210bc0 g F .irom0.text 00000015 system_phy_set_tpw_via_vdd33 +4022d510 g F .irom0.text 00000039 espconn_delete +4022c4c4 g F .irom0.text 0000000f sys_restart_timeouts +40101e6c g F .text 00000021 prvInsertBlockIntoUsedList +402133b8 g F .irom0.text 0000000a wifi_enable_signaling_measurement +40224c40 g F .irom0.text 000000a7 dhcp_inform +40223268 g F .irom0.text 00000078 wDev_Is_Mac_Key_Exist +40104378 g F .text 00000301 lmacTxFrame +4020a650 g F .irom0.text 0000039d ieee80211_sta_new_state +40207eb4 g F .irom0.text 0000018a ieee80211_match_security +3ffe802c g O .data 00000001 rfcal_bb_atten_init +402294ac g F .irom0.text 0000000e raw_connect +40209634 g F .irom0.text 00000041 cnx_handshake_timeout +402133ec g F .irom0.text 00000017 wifi_set_sleep_level +40212edc g F .irom0.text 00000047 wifi_softap_get_station_num +402271d0 g F .irom0.text 000000d1 espconn_tcp_sent +40201018 g F .irom0.text 000000cb aes_wrap +40210368 g F .irom0.text 00000033 system_uart_de_swap +4020b87c g F .irom0.text 00000002 ieee80211_crypto_attach +40202b30 g F .irom0.text 0000024c ieee80211_send_probereq +4021b114 g F .irom0.text 00000013 get_rf_gain_qdb +4021ddbc g F .irom0.text 00000072 set_crystal_uart +4021879c g F .irom0.text 00000180 chip_v6_set_chan_rx_cmp +402111b8 g F .irom0.text 000000a5 wifi_param_save_protect_with_check +4021c204 g F .irom0.text 0000006b tx_pwctrl_bg_init +4021a408 g F .irom0.text 00000024 set_dpd_bypass +40219890 g F .irom0.text 00000131 chip_v6_initialize_bb +402015bc g F .irom0.text 00000315 rijndaelKeySetupEnc +40216a5c g F .irom0.text 00000273 phy_adc_read_fast +3ffe8e74 g O .bss 00000004 AllFreqOffsetInOneChk +fffff11f g *ABS* 00000000 _memmap_cacheattr_wt_strict +4022d714 g F .irom0.text 00000006 ringbuf_capacity +4021f1f8 g F .irom0.text 00000019 pm_set_sleep_time +4021bebc g F .irom0.text 00000048 get_pwctrl_correct +4000e190 g *ABS* 00000000 memset +40210610 g F .irom0.text 00000026 system_get_boot_mode +40216e2c g F .irom0.text 00000111 phy_get_vdd33 +4020a200 g F .irom0.text 000001ff cnx_node_join +4021ac5c g F .irom0.text 000002b8 phy_init_print +4021b008 g F .irom0.text 00000099 set_rfanagain_dc_reg +4021d2a0 g F .irom0.text 00000039 get_chip_version +40102d5c g F .text 000000ad lcd_init +4020bd70 g F .irom0.text 00000145 wpa_auth_gen_wpa_ie +4010602c w F .text 00000004 user_iram_memory_is_enabled +40220840 g F .irom0.text 0000001d pp_tx_idle_timeout +4020fb88 g F .irom0.text 0000000f wpa_neg_complete +4021f8c0 g F .irom0.text 000000d2 pm_shutdown +4021197c g F .irom0.text 00000014 wifi_set_opmode_current +4021d124 g F .irom0.text 00000023 pm_set_sleep_cycles +40000e24 g *ABS* 00000000 ets_post +40210b94 g F .irom0.text 00000014 system_phy_temperature_alert +40215148 g F .irom0.text 00000019 ets_strchr +402043b8 g F .irom0.text 0000023c ieee80211_hostap_attach +3ffee860 g O .bss 00000014 resend_eapol +40101e90 g F .text 0000002b prvRemoveBlockFromUsedList +4022d084 g F .irom0.text 0000000f espconn_regist_connectcb +402232e4 g F .irom0.text 00000071 wDev_Get_KeyEntry +4021ec70 g F .irom0.text 00000007 StopLightSleepSetFunc +402157a8 g F .irom0.text 0000006d set_rf_freq_offset +3ffee69c g O .bss 00000001 backup_ni_connect_status +4022e09c g F .irom0.text 000000a8 icmp_dest_unreach +3ff00000 g *ABS* 00000000 _dport0_rodata_end +40100010 g .text 00000000 _DebugExceptionVector +40216fac g F .irom0.text 000000a3 set_cal_rxdc +40215164 g F .irom0.text 00000016 bit_popcount +40229614 g F .irom0.text 00000005 tcp_sent +4021e530 g F .irom0.text 00000098 wifi_fpm_do_sleep +40223400 g F .irom0.text 00000137 wDev_Insert_KeyEntry +40002f04 g *ABS* 00000000 ets_update_cpu_frequency +40229264 g F .irom0.text 00000023 pbuf_get_at +40100020 g .text 00000000 _NMIExceptionVector +40105ea8 g F .text 00000008 chm_get_current_channel +4000cd5c g *ABS* 00000000 __truncdfsf2 +4020a070 g F .irom0.text 00000071 cnx_node_search +401050e4 g F .text 00000066 wDev_MacTim1Arm +3ffecf00 g O .bss 00000004 max_11b_rate +40103bdc g F .text 00000035 ppEnqueueTxDone +40229408 g F .irom0.text 0000004f raw_new +4010223c g F .text 00000017 pvPortZalloc +40213fe8 g F .irom0.text 0000000a wifi_unregister_send_pkt_freedom_cb +4021a934 g F .irom0.text 0000005f chan14_mic_cfg +402209ac g F .irom0.text 00000015 pp_soft_wdt_feed +40214b00 g F .irom0.text 00000043 divide +3ffe8aa4 g O .bss 00000001 rfpll_unlock +40225528 g F .irom0.text 00000030 node_insert_to_list +40212b94 g F .irom0.text 00000061 wifi_station_set_default_hostname +4022d5ec g F .irom0.text 00000015 espconn_dns_getserver +402259d8 g F .irom0.text 00000031 wifi_softap_set_dhcps_lease_time +40101704 g F .text 00000035 system_restart_core +40201e24 g F .irom0.text 00000037 ieee80211_freedom_inside_cb +3ffe8028 g O .data 00000001 phy_in_most_power +40201bfc g F .irom0.text 00000010 register_ieee80211_rfid_locp_recv_cb +40213654 g F .irom0.text 000000e3 wifi_promiscuous_enable +4021a4d4 g F .irom0.text 000000af get_phy_target_power +40106030 g F .text 00000036 esp_crc8 +4021d448 g F .irom0.text 00000038 pm_wait4wakeup +40207cb8 g F .irom0.text 00000109 ieee80211_parse_wpa +40219784 g F .irom0.text 0000009e tx_cont_en +40210d04 g F .irom0.text 00000015 system_timer_reinit +402230fc g F .irom0.text 00000022 wDev_DisableUcRx +40223930 g F .irom0.text 0000001d wDevEnableRx +4021e800 g F .irom0.text 00000075 fpm_close +40210d40 g F .irom0.text 00000113 system_station_got_ip_set +4021ff5c g F .irom0.text 0000002a pm_sleep_for +3ffe8006 g O .data 00000002 tx_rf_ana_gain +4021e71c g F .irom0.text 0000003b wifi_fpm_auto_sleep_set_in_null_mode +40205ef0 g F .irom0.text 00000021 ieee80211_psq_init +402209c8 g F .irom0.text 00000028 system_soft_wdt_stop +4021af34 g F .irom0.text 00000011 dcoindex2txbbgain +4000dc88 g *ABS* 00000000 __divsi3 +40229458 g F .irom0.text 00000041 raw_remove +402099e8 g F .irom0.text 0000007b cnx_remove_rc +40220448 g F .irom0.text 00000039 ic_disable_interface +4020b640 g F .irom0.text 00000032 ieee80211_recv_action_register +4000b840 g *ABS* 00000000 pbkdf2_sha1 +3ffe8cf0 g O .bss 00000001 default_interface +4021052c g F .irom0.text 0000005d system_adc_read_fast +3ffe8ba1 g O .bss 00000001 phy_set_most_tpw_disbg +4000c3dc g *ABS* 00000000 __mulsf3 +4021b764 g F .irom0.text 0000020b txiq_cover +3ffecefc g O .bss 00000001 connect_scan_flag +402105c4 g F .irom0.text 0000001d system_get_flash_size_map +4020f8a8 g F .irom0.text 00000029 ppGetKey +401015a4 g F .text 00000015 call_user_start_local +402235d4 g F .irom0.text 000002a5 wDev_Initialize +4022c58c g F .irom0.text 00000080 udp_bind +40209e5c g F .irom0.text 000000fb cnx_sta_associated +40229d18 g F .irom0.text 00000023 tcp_tmr +40004678 g *ABS* 00000000 Cache_Read_Enable +40227c18 g F .irom0.text 00000195 etharp_query +40213dd4 g F .irom0.text 00000130 wifi_set_macaddr +40001f00 g *ABS* 00000000 ets_vprintf +402127fc g F .irom0.text 00000079 wifi_station_connect +3ffe8ab0 g O .bss 00000002 pll_cap_m +40228138 g F .irom0.text 00000041 lwip_init +4020f6a4 g F .irom0.text 0000000f r_rand +40104118 g F .text 0000001b lmacDiscardAgedMSDU +40216408 g F .irom0.text 00000058 chip_v6_set_chan_offset +4022de14 g F .irom0.text 0000003d espconn_udp_disconnect +402204e4 g F .irom0.text 00000010 ic_interface_is_p2p +4022cef0 g F .irom0.text 00000020 espconn_tcp_get_wnd +3ffe83a4 g O .data 00000004 dhcps_lease_time +4021c45c g F .irom0.text 000001cd ram_cal_tos_v60 +40227db4 g F .irom0.text 000000f3 etharp_output +4020b884 g F .irom0.text 00000016 ieee80211_phy_type_get +402076e4 g F .irom0.text 0000002a check_max_11bg_rate +40205fc8 g F .irom0.text 000000ad pwrsave_flushq +40212b34 g F .irom0.text 00000012 wifi_station_set_reconnect_policy +40223a84 g F .irom0.text 000000ce wdev_exit_sniffer +400043c8 g *ABS* 00000000 SPI_read_status +402140cc g F .irom0.text 00000027 wifi_status_led_uninstall +3fffc714 g *ABS* 00000000 flashchip +400038a4 g *ABS* 00000000 uart_buff_switch +40202054 g F .irom0.text 00000206 wifi_mode_set +40101f80 g F .text 000000f9 vPortDefineHeapRegions +401034f4 g F .text 0000002c unsign_to_sign +40208184 g F .irom0.text 00000044 ieee80211_add_ie_vendor_esp_freq_annon +3ffe8ac0 g O .bss 00000001 rx_table_renew_en +3ffe8ba8 g O .bss 00000004 adc_rand_noise +4021d14c g F .irom0.text 0000011a pm_sleep_opt +40213474 g F .irom0.text 0000000f wifi_get_sleep_level +40213f54 g F .irom0.text 00000030 wifi_set_user_sup_rate +40210258 w F .irom0.text 00000002 wifi_set_backup_mac +40219480 g F .irom0.text 0000001b uart_wait_idle +3ffee838 g O .bss 00000028 pktinfo +402154b4 g F .irom0.text 0000001c rf_init +40222b7c g F .irom0.text 00000014 trc_onScanStart +40214668 g F .irom0.text 0000002d ets_timer_done +40211b58 g F .irom0.text 0000005f wifi_station_dhcpc_start +40003a14 g *ABS* 00000000 Uart_Init +3ffe8bcc g O .bss 00000001 tx_pwctrl_track_num +4021891c g F .irom0.text 0000005c chip_v6_set_chan_misc +40206920 g F .irom0.text 0000012b scan_start +40103624 g F .text 00000028 pm_rtc_clock_cali_trig +4021d118 g F .irom0.text 00000008 pm_rtc2usec +402189a8 g F .irom0.text 00000359 phy_dig_spur_set +4021510c g F .irom0.text 0000001b ets_strcat +4022e288 g F .irom0.text 00000012 igmp_init +40228bf0 g F .irom0.text 0000000c netif_set_gw +40228fec g F .irom0.text 00000012 pbuf_clen +402226d0 g F .irom0.text 0000002b lmacInitAc +40103ff4 g F .text 00000067 ppCalFrameTimes +40211bb8 g F .irom0.text 00000041 wifi_station_dhcpc_stop +3ffecee4 g O .bss 00000002 TestStaFreqCalValDev +40102588 g F .text 00000196 flash_gd25q32c_write_status +40211088 g F .irom0.text 000000cb system_get_string_from_flash +3ffecf10 g O .bss 00000004 g_cnx_probe_rc_list_cb +402100cc g F .irom0.text 0000001d wpa_sm_deauthenticate +4010229c g F .text 00000028 Cache_Read_Enable_2 +40209d44 g F .irom0.text 00000108 cnx_sta_leave +40102320 g F .text 0000002c spi_flash_read_status +40229780 g F .irom0.text 00000005 tcp_setprio +4021a460 g F .irom0.text 00000071 get_vdd33_offset +40220d14 g F .irom0.text 0000002b ppUnregisterTxCallback +4020641c g F .irom0.text 00000023 scan_add_bssid +402199fc g F .irom0.text 000000a4 bbpll_cal +4020755c g F .irom0.text 000000f2 ieee80211_decap +40215518 g F .irom0.text 0000001c RFChannelSel +4022c820 g F .irom0.text 00000014 udp_send +4020c06c g F .irom0.text 00000147 wpa_parse_kde_ies +40105dc8 g F .text 00000017 RC_GetAckTime +40229224 g F .irom0.text 0000003e pbuf_coalesce +402294bc g F .irom0.text 00000006 raw_recv +4010311c g F .text 00000005 LCD_IO_driver_interface_get +40218f74 g F .irom0.text 0000001d chip_v6_rxmax_ext +40228c60 g F .irom0.text 0000005a netif_remove +3ffe8bcd g O .bss 00000001 rxiq_cover_fail_num +4022d094 g F .irom0.text 0000000e espconn_regist_recvcb +4021f504 g F .irom0.text 0000001b pm_keep_active_enable +4020f720 g F .irom0.text 00000018 wpa_config_assoc_ie +3ffe8b84 g O .bss 00000004 rx_gain_swp_step +40229a78 g F .irom0.text 0000029c tcp_slowtmr +4022d734 g F .irom0.text 0000001c ringbuf_bytes_used +40225a0c g F .irom0.text 0000002a wifi_softap_reset_dhcps_lease_time +4020e470 g F .irom0.text 0000002e wpa_sm_set_state +4021f4e4 g F .irom0.text 0000001f pm_keep_active_disable +40230470 g O .irom0.text 00000018 ccmp +40211968 g F .irom0.text 00000014 wifi_set_opmode +401035a4 g F .text 0000005f phy_get_bb_evm +40211e88 g F .irom0.text 00000179 system_restart_enhance +402060bc g F .irom0.text 00000045 ieee80211_getmgtframe +3ffe8b7d g O .bss 00000001 sw_scan_mode +402106c0 g F .irom0.text 000000a8 system_get_userbin_addr +40222704 g F .irom0.text 0000005b lmacInit +40226ec0 g F .irom0.text 00000097 espconn_find_current_pcb +40213fb4 g F .irom0.text 0000000b wifi_get_user_limit_rate_mask +2222211f g *ABS* 00000000 _memmap_cacheattr_wb_trapnull +4020e348 g F .irom0.text 00000123 wpa_set_bss +40212d20 g F .irom0.text 000000da wifi_softap_set_station_info +40202a90 g F .irom0.text 0000004f ieee80211_add_rates +402103a0 g F .irom0.text 00000012 system_set_os_print +4021006c g F .irom0.text 00000054 wpa_cipher_put_suites +40201bdc g F .irom0.text 0000001d ieee80211_rfid_locp_recv +4020e318 g F .irom0.text 00000015 wpa_set_profile +4021d4c4 g F .irom0.text 00000083 pm_sleep_set_mac +40220c28 g F .irom0.text 00000027 pp_enable_idle_timer +40103180 g F .text 0000007d set_txcap_reg +4020f644 g F .irom0.text 0000005e wpa_cipher_to_suite +402224b0 g F .irom0.text 00000120 esf_buf_recycle +40226cfc g F .irom0.text 0000008a espconn_tcp_delete +402175f4 g F .irom0.text 0000035f set_rx_gain_testchip_50 +3ffecd34 g O .bss 00000004 WdevTimOffSet +4020ba10 g F .irom0.text 0000006a ieee80211_parse_wmeparams +4020f960 g F .irom0.text 00000035 wpa_config_profile +3ffe88d4 g *ABS* 00000000 _bss_table_start +4021cfc8 g F .irom0.text 00000045 dpd_scale_set +40229608 g F .irom0.text 00000004 tcp_accept +40215bd8 g F .irom0.text 000000ba txpwr_offset +40201d30 g F .irom0.text 00000044 ieee80211_add_countryie +40206b64 g F .irom0.text 00000049 scan_connect_state +40220a64 g F .irom0.text 00000015 pp_disable_noise_timer +3ffe8b78 g O .bss 00000002 phy_freq_offset +3ffee5ec g O .bss 0000009c gScanStruct +4020e7d0 g F .irom0.text 00000887 wpa_sm_rx_eapol +4000443c g *ABS* 00000000 SPI_write_enable +400024cc g *ABS* 00000000 ets_printf +4000448c g *ABS* 00000000 Wait_SPI_Idle +4021b978 g F .irom0.text 00000265 ram_rfcal_txiq +4022d840 g F .irom0.text 000000ab ringbuf_memset +4020f6c4 g F .irom0.text 00000059 os_get_random +4021d268 g F .irom0.text 0000002e pm_wakeup_opt +40104878 g F .text 0000006e lmacProcessTxError +401027c8 g F .text 0000004a spi_flash_erase_sector +40210860 g F .irom0.text 0000003b get_irom0_bin_len +401049d8 g F .text 00000069 lmacProcessTxRtsError +40103c14 g F .text 00000014 ppEnqueueRxq +400047f0 g *ABS* 00000000 Cache_Read_Disable +3ffe8b28 g O .bss 00000050 chip6_phy_init_ctrl +40201ff0 g F .irom0.text 00000012 ieee80211_chan2ieee +400044c0 g *ABS* 00000000 Enable_QMode +40210cc0 g F .irom0.text 0000003d system_restoreclock +40102c90 g F .text 00000018 lcd_enable_backlight +40105de0 g F .text 0000006c RC_GetCtsTime +4022dcc4 g F .irom0.text 00000150 espconn_udp_sent +4021bf10 g F .irom0.text 000002f4 tx_pwctrl_cal +40210f54 g F .irom0.text 000000e1 system_mktime +40000f88 g *ABS* 00000000 ets_isr_attach +4021abc8 g F .irom0.text 00000023 phy_version_print +4021c338 g F .irom0.text 00000063 read_sar_dout +402209f0 g F .irom0.text 00000033 system_soft_wdt_restart +4022d5a8 g F .irom0.text 00000043 espconn_dns_setserver +40220c7c g F .irom0.text 0000006b ppPeocessRxPktHdr +4021fe94 g F .irom0.text 0000002a pm_scan_lock +4022d71c g F .irom0.text 00000016 ringbuf_bytes_free +40004cf0 g *ABS* 00000000 gpio_input_get +40202890 g F .irom0.text 000000d2 ieee80211_mgmt_output +402124e0 g F .irom0.text 00000013 wifi_station_restore_config +3ffedc36 g O .bss 00000002 lwip_timer_interval +3ffecefd g O .bss 00000001 rate_number +40205e6c g F .irom0.text 0000002b chm_start_op +402105f0 g F .irom0.text 0000001f system_get_test_result +3ff00000 g *ABS* 00000000 _dport0_data_end +4022395c g F .irom0.text 000000d6 wdev_go_sniffer +402134ac g F .irom0.text 00000054 wifi_set_channel +401015d4 g F .text 00000122 os_printf_plus +4021c280 g F .irom0.text 000000b5 tx_pwctrl_background +40213744 g F .irom0.text 0000007f wifi_get_ip_info +40210108 g F .irom0.text 00000043 uart_div_modify +3ffee778 g O .bss 00000004 tcp_tw_pcbs +4021d2e0 g F .irom0.text 0000004b pm_sleep_opt_bb_off +3ffedd64 g O .bss 00000004 event_cb +4022cf4c g F .irom0.text 0000001c espconn_tcp_set_max_con +40102d30 g F .text 00000021 lcd_buf_cls +40103170 g F .text 0000000b phy_get_mactime +4021a890 g F .irom0.text 0000004c phy_get_txpwr_param +402100c4 g F .irom0.text 00000004 eloop_cancel_timeout +40220834 g F .irom0.text 0000000a DefFreqCalTimerCB +4022c834 g F .irom0.text 000001dd udp_input +401050b4 g F .text 0000001a wDev_MacTim1SetFunc +4021b634 g F .irom0.text 00000083 ram_set_txbb_atten +40104134 g F .text 0000001b lmacRecycleMPDU +402100f4 g F .irom0.text 00000002 wpa_sm_disassociate +3ffe8b90 g O .bss 00000004 tx_data3 +3ffe83c0 g *ABS* 00000000 _rodata_start +40100070 g .text 00000000 _DoubleExceptionVector +40005050 g *ABS* 00000000 lldesc_num2link +40216f40 g F .irom0.text 00000002 ram_tx_mac_enable +40206b50 g F .irom0.text 00000007 scan_get_type +400031b4 g *ABS* 00000000 roundup2 +4010015c g .text 00000000 _UserExceptionVector_1 +4022cbb0 g F .irom0.text 000000db espconn_connect +40201010 g *ABS* 00000000 _irom0_text_start +4020b5ec g F .irom0.text 00000048 ieee80211_send_action +4021ff88 g F .irom0.text 00000055 pm_post +40228a9c g F .irom0.text 00000002 netif_init +402258d0 g F .irom0.text 000000c5 dhcps_coarse_tmr +40223bbc g F .irom0.text 00000229 RC_SetBasicRate +402123b8 g F .irom0.text 000000ed wifi_station_save_ap_channel +40103d5c g F .text 000001c9 ppProcessTxQ +40213494 g F .irom0.text 00000016 wifi_get_channel +4021076c g F .irom0.text 00000012 system_upgrade_flag_set +4021af18 g F .irom0.text 00000016 txbbgain2dcoindex +40222ce8 g F .irom0.text 0000001e rc_disable_trc_by_interface +40219ea0 g F .irom0.text 00000039 rtc_mem_check +400018b4 g *ABS* 00000000 ets_memcpy +4022817c g F .irom0.text 0000006c ip_route +3ffe802a g O .data 00000001 chan14_mic_most_power +4021e4dc g F .irom0.text 0000004d fpm_do_wakeup +40218124 g F .irom0.text 00000132 tx_pwctrl_init +40215430 g F .irom0.text 0000004e user_init +4021f244 g F .irom0.text 000000f3 pm_set_sleep_type_from_upper +402296b0 g F .irom0.text 000000cf tcp_listen_with_backlog +4022cf34 g F .irom0.text 00000005 espconn_tcp_get_mss +40214118 g F .irom0.text 00000043 wifi_set_event_handler_cb +40210c10 g F .irom0.text 0000005d system_update_cpu_freq +4022387c g F .irom0.text 00000042 wDev_remove_KeyEntry_all_cnx +40228d18 g F .irom0.text 00000078 pbuf_header +3ffe806c g O .data 00000004 soft_wdt_interval +3ffee760 g O .bss 00000004 netif_default +4022de58 g F .irom0.text 0000006d espconn_udp_server +40104a5c g F .text 0000001b lmac_set_status +402298d8 g F .irom0.text 0000006d tcp_pcb_remove +40000fa8 g *ABS* 00000000 ets_isr_unmask +3ffed920 g O .bss 00000004 pserver_list +402154d0 g F .irom0.text 00000016 bb_init +40205f14 g F .irom0.text 00000046 ieee80211_set_tim +3ffe8ba4 g O .bss 00000001 phy_set_most_tpw_flag +3ffe8e66 g O .bss 00000002 all_freqoffset_sta_freqcal +4021581c g F .irom0.text 00000107 chip_v6_rxmax_ext_ana +4022ccdc g F .irom0.text 000000e5 espconn_sent +40211c38 g F .irom0.text 00000085 wifi_set_broadcast_if +402098cc g F .irom0.text 00000059 cnx_rc_search +4022901c g F .irom0.text 0000001a pbuf_chain +40212324 g F .irom0.text 00000086 wifi_station_ap_number_set +4020375c g F .irom0.text 00000115 ieee80211_send_deauth +40229d3c g F .irom0.text 000000a3 tcp_abandon +40212b48 g F .irom0.text 00000008 wifi_station_get_reconnect_policy +3ffe8ba3 g O .bss 00000001 set_most_tpw +4022c4d4 g F .irom0.text 00000030 tcp_timer_needed +3ffe8e60 g O .bss 00000004 pmdofreqcal +2222211f g *ABS* 00000000 _memmap_cacheattr_wbna_trapnull +4000e2a4 g *ABS* 00000000 __floatunsisf +40224bec g F .irom0.text 00000026 dhcp_set_struct +402299a4 g F .irom0.text 00000075 tcp_fasttmr +4021b3d4 g F .irom0.text 0000006d meas_tone_pwr_db +4020b8c8 g F .irom0.text 00000020 scan_check_hidden +40222c98 g F .irom0.text 00000050 rc_disable_trc +40208044 g F .irom0.text 00000093 ieee80211_parse_action +40210f1c g F .irom0.text 0000000f system_rtc_clock_cali_proc +4021bdac g F .irom0.text 0000010d get_target_power_offset +401062e0 g F .text 00000049 .hidden __modsi3 +4021da98 g F .irom0.text 00000029 sleep_opt_bb_on_8266 +3ffe8034 g O .data 00000004 __ctype_ptr__ +3ffedd68 g O .bss 00000004 debug_timer +40002a88 g *ABS* 00000000 ets_strcpy +402204b4 g F .irom0.text 00000010 ic_get_gtk_alg +3ffe8be7 g O .bss 00000001 OpmodChgIsOnGoing +40217d80 g F .irom0.text 0000025a tx_atten_set_interp +40210e84 g F .irom0.text 00000055 system_print_meminfo +4022d768 g F .irom0.text 00000023 ringbuf_is_empty +40211c04 g F .irom0.text 0000002f wifi_get_broadcast_if +40217fdc g F .irom0.text 00000144 check_tx_pwr_cal +40209998 g F .irom0.text 00000050 cnx_remove_all_rc +3ffecee8 g O .bss 00000001 FreqCalCntForScan +40222b78 g F .irom0.text 00000002 trc_onDisconnect +40219edc g F .irom0.text 0000001a phy_afterwake_set_rfoption +3ffee6ac g O .bss 00000028 dhcp_rx_options_val +4020b50c g F .irom0.text 00000097 ieee80211_mlme_connect_bss +40209428 g F .irom0.text 0000003f cnx_attach +4000b8b4 g *ABS* 00000000 hmac_sha1_vector +4021dd84 g F .irom0.text 00000030 change_bbpll160 +40201c20 g F .irom0.text 000000d5 ieee80211_regdomain_update +4021b5f8 g F .irom0.text 0000003a get_fcc_1m2m_pwr_offset +40209928 g F .irom0.text 00000070 cnx_add_rc +402137c4 g F .irom0.text 0000004d wifi_softap_dhcps_start +2222222f g *ABS* 00000000 _memmap_cacheattr_bp_trapnull +4020ca3c g F .irom0.text 0000038c __wpa_send_eapol +3ffe84f7 g O .rodata 00000101 _ctype_ +4021f66c g F .irom0.text 0000019f pm_send_nullfunc +3ffe8040 g O .data 00000004 system_param_sector_start +40211a14 g F .irom0.text 00000056 system_restart +4022d0b4 g F .irom0.text 0000000f espconn_regist_disconcb +3ffe8bd5 g O .bss 00000001 rtc_cali_trig_en +40219d14 g F .irom0.text 0000009c ant_switch_init +40215260 g F .irom0.text 0000005e lcd_blink_cb +40222b70 g F .irom0.text 00000005 rcGetTrc +401062dc g F .text 00000002 rcUpdateDataRxDone +4022e6a4 g F .irom0.text 00000039 igmp_tmr +4021ca54 g F .irom0.text 000001bc ram_rxiq_get_mis +3ffedeb0 g O .bss 00000014 freq_change_sta_scan +40206460 g F .irom0.text 00000007 scan_set_pas_duration +4021af4c g F .irom0.text 000000b4 init_cal_dcoffset +402194b8 g F .irom0.text 000000a6 phy_pbus_soc_cfg +4021554c g F .irom0.text 00000016 phy_enable_agc +4000c4c4 g *ABS* 00000000 __fixunssfsi +40101758 g F .text 0000000f system_get_free_heap_size +40006b08 g *ABS* 00000000 phy_get_romfuncs +40214060 g F .irom0.text 0000000f wifi_rfid_locp_recv_close +40210edc g F .irom0.text 0000003f system_get_chip_id +40224fc4 g F .irom0.text 000001a1 dhcp_coarse_tmr +4020f114 g F .irom0.text 0000019f wpa_parse_wpa_ie_rsn +40213fd8 g F .irom0.text 00000010 wifi_register_send_pkt_freedom_cb +40229df4 g F .irom0.text 00000041 tcp_seg_copy +40223140 g F .irom0.text 000000c9 wDev_SetBssid +4020f460 g F .irom0.text 0000004f wpa_eapol_key_mic +40000650 g *ABS* 00000000 __muldi3 +4021e884 g F .irom0.text 00000007 wifi_fpm_set_wakeup_cb +3ffece45 g O .bss 00000001 ap_freq_force_to_scan +40100050 g .text 00000000 _UserExceptionVector +3ffedd6c g O .bss 00000004 debug_timerfn +4022f379 g O .irom0.text 00000011 default_ssid +4021e758 g F .irom0.text 00000008 get_fpm_auto_sleep_flag +40100000 g .text 00000000 _stext +4021a584 g F .irom0.text 00000117 set_most_pwr_reg +4022d554 g F .irom0.text 00000038 espconn_port +4022961c g F .irom0.text 00000008 tcp_poll +40202964 g F .irom0.text 0000012a ieee80211_send_nulldata +4000bf4c g *ABS* 00000000 strlen +3ffe804c g O .data 00000004 demo_title +4021c818 g F .irom0.text 00000232 ram_rfcal_pwrctrl +4021e708 g F .irom0.text 00000008 wifi_fpm_get_sleep_type +40226550 g F .irom0.text 0000003d dns_init +3ffe8e70 g O .bss 00000002 PktsNumInOneChk +4020225c g F .irom0.text 00000062 ieee80211_crypto_encap +40208b5c g F .irom0.text 0000001b ieee80211_add_htcap +40219874 g F .irom0.text 00000018 tx_cont_cfg +4022c508 g F .irom0.text 00000039 udp_new +402238f8 g F .irom0.text 00000035 wDev_Crypto_Disable +3ffe803c g O .data 00000004 bin_sum_len +402205fc g F .irom0.text 0000010a ic_set_sta +40220c04 g F .irom0.text 00000024 pp_disable_idle_timer +3ffe8b99 g O .bss 00000001 bbpll_cal_flag +4021a6c4 g F .irom0.text 0000001d phy_get_most_tpw +40219b04 g F .irom0.text 000001f1 register_chipv6_phy_init_param +3fffd0f0 g *ABS* 00000000 rcons +40211a7c g F .irom0.text 00000093 system_deep_sleep +40205c90 g F .irom0.text 0000003d chm_cancel_op +3ffe8bd8 g O .bss 00000001 software_slp_reject +40210260 g F .irom0.text 00000008 system_phy_freq_trace_enable +40212ea4 g F .irom0.text 00000035 wifi_softap_free_station_info +400060d0 g F *ABS* 00000000 rom_chip_v5_disable_cca +40211174 g F .irom0.text 00000008 wifi_station_dhcpc_status +40221574 g F .irom0.text 0000000f ppProcessWaitQ +4021250c g F .irom0.text 0000002e wifi_station_ap_check +3ffe886a g O .rodata 00000006 ethbroadcast +3ffe8b9a g O .bss 00000001 init_rf_no_cal +402305af g O .irom0.text 0000000d tcp_backoff +401051c0 g F .text 0000000d wDev_GetTxqCollisions +3ffece58 g O .bss 00000001 BcnWithMcastSendCnt +40103658 g F .text 000000b0 pm_rtc_clock_cali +4021d428 g F .irom0.text 0000001d chg_lslp_mem_opt_8266 +402100c0 g F .irom0.text 00000004 os_get_time +4020b8e8 g F .irom0.text 00000048 ieee80211_is_support_rate +4021a6fc g F .irom0.text 0000002f get_adc_rand +402133c4 g F .irom0.text 0000000a wifi_disable_signaling_measurement +402199c4 g F .irom0.text 00000038 periodic_cal +4022844c g F .irom0.text 00000217 ip_output_if_opt +40205f5c g F .irom0.text 0000006b ieee80211_pwrsave +40103530 g F .text 00000067 phy_get_bb_freqoffset +4022cf94 g F .irom0.text 0000000d espconn_tcp_get_max_syn +40103f50 g F .text 00000027 pp_post2 +401039d0 g F .text 0000002b clockgate_watchdog +3ffe8d04 g O .bss 00000004 timer_list +40104328 g F .text 00000026 lmacMSDUAged +00000220 g *ABS* 00000000 _memmap_cacheattr_bp_base +40208d34 g F .irom0.text 0000004f cnx_sta_connect_led_timer_cb +4010339c g F .text 00000155 tx_pwr_backoff_old +4021e708 g F .irom0.text 00000008 fpm_get_slp_type +4021a83c g F .irom0.text 0000000b phy_set_powerup_option +4021e5cc g F .irom0.text 00000067 fpm_open +40105e4c g F .text 00000055 RC_GetBlockAckTime +4021c39c g F .irom0.text 000000af ram_get_fm_sar_dout +40230b64 g O .irom0.text 00000018 wep +40101744 g F .text 00000011 system_get_time +40216cd0 g F .irom0.text 00000017 check_data_flag +40213578 g F .irom0.text 00000041 wifi_set_country +4020a5e4 g F .irom0.text 0000005d sta_status_set +4000dd68 g *ABS* 00000000 rc4_skip +402293a4 g F .irom0.text 00000059 pbuf_free_ooseq_new +40213814 g F .irom0.text 00000079 wifi_set_ip_info +4021f378 g F .irom0.text 00000040 pm_reset_idle_sleep +3ffe8eb1 g O .bss 00000001 pend_flag_periodic_cal +4022d354 g F .irom0.text 0000005d espconn_set_opt +40208b78 g F .irom0.text 00000034 ieee80211_add_htcap_vendor +4022d41c g F .irom0.text 00000083 espconn_set_keepalive +4022e8c8 g F .irom0.text 0000039f system_partition_table_regist +4020d1e4 g F .irom0.text 00000047 wpa_remove_ptk +40213464 g F .irom0.text 0000000f wifi_get_sleep_type +4021834c g F .irom0.text 0000001c read_hw_noisefloor +40218374 g F .irom0.text 00000152 noise_check_loop +40104310 g F .text 00000014 lmacProcessAllTxTimeout +40103c34 g F .text 00000091 pp_post +4021f36c g F .irom0.text 00000002 uart_tx_flush +4022ce94 g F .irom0.text 0000005c espconn_sendto +4022c3ec g F .irom0.text 00000054 sys_untimeout +4022aae0 g F .irom0.text 00000961 tcp_input +40220508 g F .irom0.text 000000f0 ic_set_vif +4021e884 g F .irom0.text 00000007 fpm_set_wakeup_cb +40004f40 g *ABS* 00000000 lldesc_build_chain +4000c180 g *ABS* 00000000 __addsf3 +40104218 g F .text 000000f7 lmacProcessTxTimeout +4022ccdc g F .irom0.text 000000e5 espconn_send +3ffe8b7a g O .bss 00000001 do_pwctrl_flag +40004cd0 g *ABS* 00000000 gpio_output_set +402281fc g F .irom0.text 0000024b ip_input +3ff00000 g *ABS* 00000000 _dport0_literal_end +40222928 g F .irom0.text 000001f3 rcUpdatePhyMode +402087b0 g F .irom0.text 00000044 ieee80211_ht_attach +40103604 g F .text 0000001b fix_cache_bug +4021fd18 g F .irom0.text 00000017 pm_is_waked +40213ff4 g F .irom0.text 00000059 wifi_send_pkt_freedom +40206244 g F .irom0.text 00000052 ieee80211_scan_attach +3ffe8864 g O .rodata 00000006 ethzero +4022cb08 g F .irom0.text 00000026 espconn_list_delete +402272a4 g F .irom0.text 0000004f espconn_tcp_write +40212b50 g F .irom0.text 00000033 wifi_station_get_rssi +3ffedc38 g O .bss 00000004 system_rf_cal_sector +3ffe8bb0 g O .bss 00000001 dpd_bypass_original +402145f0 g F .irom0.text 0000005f system_uart_swap +4022c440 g F .irom0.text 00000083 sys_check_timeouts +40206fc0 g F .irom0.text 000003bd scan_parse_beacon +40201d74 g F .irom0.text 0000001c ieee80211_regdomain_max_chan +40002a98 g *ABS* 00000000 ets_strncpy +4010320c g F .text 00000057 set_cca +4021e644 g F .irom0.text 000000c4 fpm_set_type_from_upper +40201c0c g F .irom0.text 0000000a unregister_ieee80211_rfid_locp_recv_cb +40206454 g F .irom0.text 00000009 scan_set_act_duration +40228aa0 g F .irom0.text 00000031 netif_find +40101f58 g F .text 00000017 free +4021d5e0 g F .irom0.text 00000057 pm_check_mac_idle +402154e8 g F .irom0.text 00000030 phy_init +40215128 g F .irom0.text 00000020 ets_strrchr +4021a744 g F .irom0.text 00000023 phy_tx_pwctrl_cali +40201570 g F .irom0.text 00000019 aes_encrypt +40213504 g F .irom0.text 00000073 wifi_adjust_ap_chan +40229038 g F .irom0.text 00000037 pbuf_dechain +40004ed4 g *ABS* 00000000 gpio_pin_wakeup_disable +40221c98 g F .irom0.text 00000400 ppTxPkt +40205c24 g F .irom0.text 00000011 chm_release_lock + + +Contents of section .data: + 3ffe8000 00000000 5500f00b 20662140 347a2140 ....U... f!@4z!@ + 3ffe8010 74642140 0cfd2240 ec600040 d0600040 td!@.."@.`.@.`.@ + 3ffe8020 90982140 04fd2240 4e4e3400 3c000000 ..!@.."@NN4.<... + 3ffe8030 ffffffff f784fe3f ff010101 ffffffff .......?........ + 3ffe8040 ff000000 01010101 06000000 d383fe3f ...............? + 3ffe8050 9886fe3f 02020000 b0dcff3f 0101f000 ...?.......?.... + 3ffe8060 64000000 c0270900 17000000 c0c62d00 d....'........-. + 3ffe8070 07020602 05020005 0b400000 06020502 .........@...... + 3ffe8080 00020005 0b390000 05020002 00020005 .....9.......... + 3ffe8090 0b390000 00020002 00020005 0b000000 .9.............. + 3ffe80a0 0c020802 0b020005 0b720000 08020d02 .........r...... + 3ffe80b0 0b020005 0b650000 0d020902 0b020005 .....e.......... + 3ffe80c0 0b5c0000 09020e02 0b020005 0b580000 .\...........X.. + 3ffe80d0 0e020a02 0b020005 0b520000 0a020f02 .........R...... + 3ffe80e0 0b020b05 0b4b0000 0f020b02 0b020b05 .....K.......... + 3ffe80f0 0b380000 0b020b02 0b020b05 0b400000 .8...........@.. + 3ffe8100 0c020802 0b020005 0b720000 08020d02 .........r...... + 3ffe8110 0b020005 0b650000 0d020902 0b020005 .....e.......... + 3ffe8120 0b5c0000 09020e02 0b020005 0b580000 .\...........X.. + 3ffe8130 0e020a02 0b020005 0b520000 0a020b02 .........R...... + 3ffe8140 05020005 0b4b0000 0f020b02 05020005 .....K.......... + 3ffe8150 0b380000 0b020502 00020005 0b400000 .8...........@.. + 3ffe8160 06020502 00020005 0b390000 05020002 .........9...... + 3ffe8170 00020005 0b390000 00020002 00020005 .....9.......... + 3ffe8180 0b000000 1f021602 0b020005 0b720000 .............r.. + 3ffe8190 17021502 0b020005 0b720000 16021402 .........r...... + 3ffe81a0 0b020005 0b720000 15021302 0b020005 .....r.......... + 3ffe81b0 0b600000 14021202 0b020005 0b550000 .`...........U.. + 3ffe81c0 13021202 0b020005 0b4b0000 12021102 .........K...... + 3ffe81d0 10020b05 0b400000 11021002 0b020b05 .....@.......... + 3ffe81e0 0b3b0000 10020b02 0b020b05 0b320000 .;...........2.. + 3ffe81f0 1f021602 0b020005 0b720000 17021502 .........r...... + 3ffe8200 0b020005 0b720000 16021402 0b020005 .....r.......... + 3ffe8210 0b720000 15021302 0b020005 0b600000 .r...........`.. + 3ffe8220 14021202 0b020005 0b550000 13021202 .........U...... + 3ffe8230 0b020005 0b4b0000 12021102 0b020005 .....K.......... + 3ffe8240 0b400000 11020b02 05020005 0b3b0000 .@...........;.. + 3ffe8250 10020b02 05020005 0b320000 06020502 .........2...... + 3ffe8260 00020005 0b390000 05020002 00020005 .....9.......... + 3ffe8270 0b390000 00020002 00020005 0b000000 .9.............. + 3ffe8280 0b020b02 0b020005 0b000000 00030003 ................ + 3ffe8290 000a000a 000b000b 00070007 00080008 ................ + 3ffe82a0 00900100 01010102 03040506 0708090a ................ + 3ffe82b0 0b0c0d0e 48000000 01000000 41000000 ....H.......A... + 3ffe82c0 02000000 39000000 03000000 2b000000 ....9.......+... + 3ffe82d0 04000000 1c000000 05000000 15000000 ................ + 3ffe82e0 06000000 0e000000 07000000 07000000 ................ + 3ffe82f0 08000000 8b000000 09000000 84000000 ................ + 3ffe8300 0a000000 82000000 0b000000 36000000 ............6... + 3ffe8310 00000000 30000000 01000000 24000000 ....0.......$... + 3ffe8320 02000000 18000000 03000000 12000000 ................ + 3ffe8330 04000000 0c000000 05000000 09000000 ................ + 3ffe8340 06000000 06000000 07000000 8b000000 ................ + 3ffe8350 08000000 84000000 09000000 82000000 ................ + 3ffe8360 0a000000 82000000 03000000 84000000 ................ + 3ffe8370 02000000 8b000000 01000000 96000000 ................ + 3ffe8380 00000000 04000000 d4bb2040 d4bb2040 .......... @.. @ + 3ffe8390 d4bb2040 d0bb2040 d0bb2040 d0bb2040 .. @.. @.. @.. @ + 3ffe83a0 d0bb2040 78000000 ff000000 6e190000 .. @x.......n... + 3ffe83b0 0004 .. +Contents of section .rodata: + 3ffe83c0 332e302e 362d6465 76283037 32373535 3.0.6-dev(072755 + 3ffe83d0 6329004c 43442048 44343437 38302044 c).LCD HD44780 D + 3ffe83e0 656d6f00 00000000 00000000 00000000 emo............. + 3ffe83f0 00002042 00008043 00000000 00000000 .. B...C........ + 3ffe8400 6c097109 76097b09 80098509 8a098f09 l.q.v.{......... + 3ffe8410 94099909 9e09a309 a8090000 00000000 ................ + 3ffe8420 e102b402 87025a02 2e020202 d601aa01 ......Z......... + 3ffe8430 7e015301 2701fc00 d1000000 00000000 ~.S.'........... + 3ffe8440 01060b00 00000000 00000000 00000000 ................ + 3ffe8450 00030303 03010303 03030200 00000000 ................ + 3ffe8460 06010b00 00000000 00002041 00000000 .......... A.... + 3ffe8470 00000004 00200024 0028002c 00300034 ..... .$.(.,.0.4 + 3ffe8480 00400060 00640068 00700074 0078007c .@.`.d.h.p.t.x.| + 3ffe8490 00010101 01010101 01010101 01010201 ................ + 3ffe84a0 03000000 00000000 00000000 00000000 ................ + 3ffe84b0 04101214 00000000 0e0a0807 06050000 ................ + 3ffe84c0 070f0700 00000000 00000000 00000000 ................ + 3ffe84d0 28000000 1a000000 18000000 64000002 (...........d... + 3ffe84e0 040b1600 07010e02 15031c04 2b053906 ............+.9. + 3ffe84f0 41074802 040b1600 20202020 20202020 A.H..... + 3ffe8500 20282828 28282020 20202020 20202020 ((((( + 3ffe8510 20202020 20202020 88101010 10101010 ........ + 3ffe8520 10101010 10101010 04040404 04040404 ................ + 3ffe8530 04041010 10101010 10414141 41414101 .........AAAAAA. + 3ffe8540 01010101 01010101 01010101 01010101 ................ + 3ffe8550 01010110 10101010 10424242 42424202 .........BBBBBB. + 3ffe8560 02020202 02020202 02020202 02020202 ................ + 3ffe8570 02020210 10101020 00000000 00000000 ....... ........ + 3ffe8580 00000000 00000000 00000000 00000000 ................ + 3ffe8590 00000000 00000000 00000000 00000000 ................ + 3ffe85a0 00000000 00000000 00000000 00000000 ................ + 3ffe85b0 00000000 00000000 00000000 00000000 ................ + 3ffe85c0 00000000 00000000 00000000 00000000 ................ + 3ffe85d0 00000000 00000000 00000000 00000000 ................ + 3ffe85e0 00000000 00000000 00000000 00000000 ................ + 3ffe85f0 00000000 00000000 636f7272 65637420 ........correct + 3ffe8600 666c6173 68206d61 700d0a00 62696e20 flash map...bin + 3ffe8610 6c656e20 25640d0a 00746f74 616c206c len %d...total l + 3ffe8620 656e2025 640d0a00 6d616900 74696d00 en %d...mai.tim. + 3ffe8630 25732025 750a0025 73202564 206c696e %s %u..%s %d lin + 3ffe8640 65206173 73657274 20666169 6c0d0a00 e assert fail... + 3ffe8650 25782061 6c726561 64792066 72656564 %x already freed + 3ffe8660 0a00453a 4d202564 0a007650 6f727444 ..E:M %d..vPortD + 3ffe8670 6566696e 65486561 70526567 696f6e73 efineHeapRegions + 3ffe8680 0076506f 72744672 65650070 76506f72 .vPortFree.pvPor + 3ffe8690 744d616c 6c6f6300 436f6e67 72617475 tMalloc.Congratu + 3ffe86a0 6c617469 6f6e2c20 796f7520 68617665 lation, you have + 3ffe86b0 206a7573 74207275 6e204c43 44206465 just run LCD de + 3ffe86c0 6d6f2065 78616d70 6c65206f 6e204553 mo example on ES + 3ffe86d0 50383236 36207573 696e6720 45535038 P8266 using ESP8 + 3ffe86e0 3236204e 4f4e4f53 2053444b 00737973 26 NONOS SDK.sys + 3ffe86f0 74656d5f 70617274 6974696f 6e5f7461 tem_partition_ta + 3ffe8700 626c655f 72656769 73742066 61696c0d ble_regist fail. + 3ffe8710 0a000000 01000000 00000000 00100000 ................ + 3ffe8720 02000000 00100000 00a00600 03000000 ................ + 3ffe8730 00101000 00a00600 04000000 00b03f00 ..............?. + 3ffe8740 00100000 05000000 00c03f00 00100000 ..........?..... + 3ffe8750 06000000 00d03f00 00300000 74301040 ......?..0..t0.@ + 3ffe8760 38301040 1c301040 a42f1040 80601040 80.@.0.@./.@.`.@ + 3ffe8770 642f1040 302f1040 182f1040 36333565 d/.@0/.@./.@635e + 3ffe8780 36666300 46656220 32302032 30323000 6fc.Feb 20 2020. + 3ffe8790 31363a31 383a3038 00000000 66706d00 16:18:08....fpm. + 3ffe87a0 18fe3400 70700008 100c7062 3a307825 ..4.pp....pb:0x% + 3ffe87b0 3038780d 0a006d61 63006163 3a25642c 08x...mac.ac:%d, + 3ffe87c0 2073743a 25642c20 6661696c 20636e74 st:%d, fail cnt + 3ffe87d0 3a202564 2c207375 63636573 7320636e : %d, success cn + 3ffe87e0 743a2025 642c2074 78206672 616d653a t: %d, tx frame: + 3ffe87f0 25780a00 03020100 ff020100 0a0908ff %x.............. + 3ffe8800 ff0908ff 01030507 00020406 64657600 ............dev. + 3ffe8810 453a2063 6f6c0a00 3a010201 df00d500 E: col..:....... + 3ffe8820 3a01a200 7f007500 2c002c00 30003c00 :.....u.,.,.0.<. + 3ffe8830 2c002c00 30003c00 3c003000 30002c00 ,.,.0.<.<.0.0.,. + 3ffe8840 2c002c00 2c002c00 3c003000 30002c00 ,.,.,.,.<.0.0.,. + 3ffe8850 2c002c00 2c002c00 dd070050 f2020001 ,.,.,.,....P.... + 3ffe8860 002c0100 00000000 0000ffff ffffffff .,.............. + 3ffe8870 72696e67 6275665f 6d656d63 70795f66 ringbuf_memcpy_f + 3ffe8880 726f6d00 72696e67 6275665f 6d656d63 rom.ringbuf_memc + 3ffe8890 70795f69 6e746f00 72696e67 6275665f py_into.ringbuf_ + 3ffe88a0 6e657874 70007269 6e676275 665f6d65 nextp.ringbuf_me + 3ffe88b0 6d736574 0072696e 67627566 5f66696e mset.ringbuf_fin + 3ffe88c0 64636872 0072696e 67627566 5f667265 dchr.ringbuf_fre + 3ffe88d0 65000000 e088fe3f 78e8fe3f e......?x..? +Contents of section .irom0.text: + 40201010 a4180040 b4180040 12c1c0d9 d1e9c1f9 ...@...@........ + 40201020 b1dd02fd 042d05ed 030c8432 a0a609f1 .....-.....2.... + 40201030 c9e150c5 2001f6ff c000003d 0fd04e11 ..P. ......=..N. + 40201040 22cc0801 f4ffc000 001c032d 0dc54b00 "..........-..K. + 40201050 fd027cf2 16cf07e0 80740c05 0c670c1d ..|......t...g.. + 40201060 c02db029 41d72e57 0c843d0c 2d017951 .-.)A..W..=.-.yQ + 40201070 89715961 01e8ffc0 00000c84 38414a21 .qYa........8AJ! + 40201080 01e5ffc0 00004d01 3d012d0f 054e000c ......M.=.-..N.. + 40201090 843d012d 0c01dfff c0000058 61220c07 .=.-.......Xa".. + 402010a0 da352023 30224c07 0c842841 4a3101d9 .5 #0"L...(AJ1.. + 402010b0 ffc00000 1bdd8871 78515861 06e8ff00 .......qxQXa.... + 402010c0 80558072 c7ff5050 745617f9 f02f20c5 .U.r..PPtV.../ . + 402010d0 4b000c02 08f1c8e1 d8d1e8c1 f8b112c1 K............... + 402010e0 400df000 f0ccff3f 000000ff 0000ff00 @......?........ + 402010f0 00ff0000 12c1e0c9 71d961e9 51f94168 ........q.a.Q.Ah + 40201100 02b20403 72040060 bb306204 01807701 ....r..`.0b...w. + 40201110 70bb3000 6611606b 30b20402 a2040780 p.0.f.`k0....... + 40201120 bb11b0b6 30681272 040460aa 30620405 ....0h.r..`.0b.. + 40201130 80770170 aa300066 11606a30 a2040692 .w.p.0.f.`j0.... + 40201140 040b80aa 11a0a630 68227204 08609930 .......0h"r..`.0 + 40201150 62040980 77017099 30006611 60693092 b...w.p.0.f.`i0. + 40201160 040a7204 0f809911 90963068 3282040c ..r.......0h2... + 40201170 60773062 040d8088 01807730 00661160 `w0b......w0.f.` + 40201180 67307204 0ec1d7ff 30312180 77113901 g0r.....01!.w.9. + 40201190 ed037076 30dd023d 0cb04875 c044a068 ..pv0..=..Hu.D.h + 402011a0 04484d0b ee404630 706074c0 66a06806 .HM..@F0p`t.f.h. + 402011b0 10484060 66816064 30a04075 c044a088 .H@`f.`d0.@u.D.. + 402011c0 04004840 80888180 46309068 74c066a0 ..H@....F0.ht.f. + 402011d0 8806b060 74104040 80888180 8430a048 ...`t.@@.....0.H + 402011e0 75c044a0 f804485d c066a040 4f30f806 u.D...H].f.@O0.. + 402011f0 104840f0 6f8160f4 30904075 c044a068 .H@.o.`.0.@u.D.h + 40201200 04004840 60668160 4f307068 74c066a0 ..H@`f.`O0pht.f. + 40201210 68061040 40606681 60643090 4875c044 h..@@`f.`d0.Hu.D + 40201220 a0f80448 6d909074 40ff30a0 4074c044 ...Hm..t@.0.@t.D + 40201230 a04804c0 99a01048 40404481 40ff3070 .H.....H@@D.@.0p + 40201240 4075c044 a0480470 78750048 40404481 @u.D.H.pxu.H@@D. + 40201250 40ff30b0 4874c044 a04804c0 77a01040 @.0.Ht.D.H..w..@ + 40201260 40404481 404f30f8 07787db0 b075707f @@D.@O0..x}..up. + 40201270 30f809c0 bba01048 40f0ff81 f07730f8 0......H@....w0. + 40201280 0ba0a874 c0aaa000 4840f0ff 81f0f730 ...t....H@.....0 + 40201290 780ad2cd 20104040 70778170 7f309d03 x... .@@pw.p.0.. + 402012a0 80a87516 fe0f30aa a0a80a98 0d909a30 ..u...0........0 + 402012b0 70a07430 aaa0a80a 104840a0 aa81a0a9 p.t0.....H@..... + 402012c0 30609075 3099a0b8 09004840 b0bb81b0 0`.u0.....H@.... + 402012d0 9a3040a8 7430aaa0 b80a80a0 74104040 .0@.t0......t.@@ + 402012e0 b0bb81b0 b9306098 753099a0 f809981d .....0`.u0...... + 402012f0 30aaa090 9f30f80a 104840f0 af81a0f9 0....0...H@..... + 40201300 30409075 3099a0a8 09004840 a0aa81a0 0@.u0.....H@.... + 40201310 9f3070a8 7430aaa0 a80a1040 40a0aa81 .0p.t0.....@@... + 40201320 a0a93040 98753099 a0f80998 2d404074 ..0@.u0.....-@@t + 40201330 90ff3060 90743099 a0980930 44a01048 ..0`.t0....0D..H + 40201340 40909981 90ff3070 90753099 a0980970 @.....0p.u0....p + 40201350 78750048 40909981 90ff3080 98743099 xu.H@.....0..t0. + 40201360 a0980930 77a01040 40909981 909f30f8 ...0w..@@.....0. + 40201370 07783d80 8075707f 30f80430 88a01048 .x=..up.0..0...H + 40201380 40f0ff81 f07730f8 08606874 004840f0 @....w0..`ht.H@. + 40201390 ff813066 a0f0f730 78061040 40707781 ..0f...0x..@@pw. + 402013a0 707f3086 7cffb801 90aaa0b0 3b113a22 p.0.|.......;.:" + 402013b0 380ab14d ff803311 b0d31060 30759033 8..M..3....`0u.3 + 402013c0 a0a14aff 3803c802 a0331030 3d30c0c3 ..J.8....3.0=0.. + 402013d0 30403874 9033a0d8 033145ff 30dd10d0 0@8t.3...1E.0... + 402013e0 dc3070c0 7490cca0 c20c01c0 cd30c0d8 .0p.t........0.. + 402013f0 75d24500 c0d0f5d2 4501c245 03c0d841 u.E.....E..E...A + 40201400 60c87590 cca0c80c d2450280 cc11b0dc `.u......E...... + 40201410 1040c075 90cca0c8 0ca0cc10 c0cd30d8 .@.u..........0. + 40201420 12d0cc30 70d87490 dda0d80d 30dd10d0 ...0p.t.....0... + 40201430 dc3080c0 7490cca0 c20c01c0 cd30c0d8 .0..t........0.. + 40201440 75d24504 c0d0f5d2 4505c245 07c0d841 u.E.....E..E...A + 40201450 40c87590 cca0c80c d2450680 cc11b0dc @.u......E...... + 40201460 1070c075 90cca0c8 0c707875 a0cc10c0 .p.u.....pxu.... + 40201470 cd30d822 9077a0d0 cc3080d8 7490dda0 .0.".w...0..t... + 40201480 d80d7807 30dd10d0 dc3060c0 7490cca0 ..x.0....0`.t... + 40201490 c20c0180 8075c0cd 30c0d875 d24508c0 .....u..0..u.E.. + 402014a0 d0f5d245 09807711 c0d84190 88a0d245 ...E..w...A....E + 402014b0 0ac2450b b0b71078 08606874 2832a0a7 ..E....x.`ht(2.. + 402014c0 109066a0 a0ab3020 aa304040 74280690 ..f...0 .0@@t(.. + 402014d0 94a03032 10220901 303a3020 33303028 ..02."..0:0 300( + 402014e0 7522450c 3020f522 450d3028 41c871d8 u"E.0 ."E.0(A.q. + 402014f0 61e851f8 4122450e 32450f12 c1200df0 a.Q.A"E.2E... .. + 40201500 81092340 98201040 d01e1040 12c1e0d2 ..#@. .@...@.... + 40201510 6105d1fb ffe26104 f26103ed 02fd030c a.....a..a...... + 40201520 0542a073 3d0d22a0 f4c96109 7101f5ff .B.s=."...a.q... + 40201530 c00000cd 020c0227 1c23d04f 113d0e2d .......'.#.O.=.- + 40201540 0c850700 d612012d 0c42a078 3d0d01ee .......-.B.x=... + 40201550 ffc00000 0c020601 00226c3c 2d0c0871 ........."l<-..q + 40201560 c861d851 e841f831 12c1200d f0000000 .a.Q.A.1.. ..... + 40201570 40542030 43203222 3c12c1f0 02610345 @T 0C 2"<....a.E + 40201580 b7ff0831 12c1100d f0000000 12c1f042 ...1...........B + 40201590 a0f40c03 0931c921 cd02019d fec00000 .....1.!........ + 402015a0 31d8ff2d 0c42a08a 01d8ffc0 00000831 1..-.B.........1 + 402015b0 c82112c1 100df000 f0d0ff3f 12c1f0c9 .!.........?.... + 402015c0 31d921e9 11f90152 03008065 01520301 1.!....R...e.R.. + 402015d0 00551150 56306203 03606530 52030280 .U.PV0b..`e0R... + 402015e0 55115056 30590252 03048065 01520305 U.PV0Y.R...e.R.. + 402015f0 00551150 56306203 07606530 52030680 .U.PV0b..`e0R... + 40201600 55115056 30591252 03088065 01520309 U.PV0Y.R...e.R.. + 40201610 00551150 56306203 0b606530 52030a80 .U.PV0b..`e0R... + 40201620 55115056 30592252 030c8065 0152030d U.PV0Y"R...e.R.. + 40201630 00551150 56306203 0f606530 52030e80 .U.PV0b..`e0R... + 40201640 55115056 30593266 e47d62a0 a071daff U.PV0Y2f.}b..q.. + 40201650 51a5fea1 a7fe91a5 fe81a3fe 6a62b832 Q...........jb.2 + 40201660 4802b030 745033a0 3803a033 10403330 H..0tP3.8..3.@30 + 40201670 b0487450 44a04804 90441040 3330b048 .HtPD.H..D.@30.H + 40201680 755044a0 42040140 33304207 001b7780 uPD.B..@30B...w. + 40201690 44014033 30b04075 5044a048 04804411 D.@30.@uPD.H..D. + 402016a0 80441040 33304812 39424033 30482239 .D.@30H.9B@30H"9 + 402016b0 52403330 3962303b 30397222 c2106792 R@309b0;09r"..g. + 402016c0 9c0ca3c6 7e000000 52031080 65015203 ....~...R...e.R. + 402016d0 11005511 50563062 03136065 30520312 ..U.PV0b..`e0R.. + 402016e0 80551150 56305942 52031480 65015203 .U.PV0YBR...e.R. + 402016f0 15005511 50563062 03176065 30520316 ..U.PV0b..`e0R.. + 40201700 80551150 56305952 52a0c057 14028622 .U.PV0YRR..W..." + 40201710 0062a0a8 71a9ff51 73fe8175 fe9173fe .b..q..Qs..u..s. + 40201720 a172fe6a 62b85248 02b03074 5033a038 .r.jb.RH..0tP3.8 + 40201730 03803310 403330b0 48745044 a0480490 ..3.@30.HtPD.H.. + 40201740 44104033 30b04875 5044a042 04014033 D.@30.HuPD.B..@3 + 40201750 30420700 1b778044 01404330 b0307550 0B...w.D.@C0.0uP + 40201760 33a03803 803311a0 33103034 30481239 3.8..3..3.040H.9 + 40201770 62403330 48223972 40333048 32398240 b@30H"9r@30H29.@ + 40201780 33303992 67920246 4d004842 22c21840 309.g..FM.HB"..@ + 40201790 33303942 303b3039 5206e2ff 52031880 309B0;09R...R... + 402017a0 65015203 19005511 50563062 031b6065 e.R...U.PV0b..`e + 402017b0 3052031a 80551150 56305962 52031c80 0R...U.PV0YbR... + 402017c0 65015203 1d005511 50563062 031f3203 e.R...U.PV0b..2. + 402017d0 1e605530 80331130 35303972 7cf326f4 .`U0.3.0509r|.&. + 402017e0 02463700 4140fec1 42fe82a0 c09172ff .F7.A@..B.....r. + 402017f0 d13efee1 3efe8a82 7d04fd0c 5872a802 .>..>...}...Xr.. + 40201800 50307440 33a03803 b139fec0 3310a0a3 P0t@3.8..9..3... + 40201810 30503874 4033a038 03b06310 603a3050 0P8t@3.8..c.`:0P + 40201820 68754066 a0a20601 b130fea0 3330a209 hu@f.....0..30.. + 40201830 001b9980 6a0160a3 30503075 4033a038 ....j.`.0P0u@3.8 + 40201840 03803311 b0631060 3a306812 39826033 ..3..c.`:0h.9.`3 + 40201850 30682239 92603330 683239a2 60333039 0h"9.`30h29.`309 + 40201860 b2871255 30687570 66a0a806 30607570 ...U0hupf...0`up + 40201870 66a06806 80aa11d0 aa10e066 10606a30 f.h........f.`j0 + 40201880 a842a0a6 30306874 7066a068 06303074 .B..00htpf.h.00t + 40201890 7033a0f0 6610606a 30a20301 3852a066 p3..f.`j0...8R.f + 402018a0 3069c230 66303862 69d23066 30605530 0i.0f08bi.0f0`U0 + 402018b0 69e259f2 22c22046 d0ff0ce3 86000000 i.Y.". F........ + 402018c0 0cc32d03 c831d821 e811f801 12c1100d ..-..1.!........ + 402018d0 f0000000 ff7f0000 b083fe3f 98052340 ...........?..#@ + 402018e0 68e20040 12c1f0c9 21c1fbff d9110261 h..@....!......a + 402018f0 03d2a3ff c5db0d31 f7ff2020 f401f8ff .......1.. .... + 40201900 c0000020 20f4225c 00273d05 22d20422 ... ."\.'=.".." + 40201910 5c00221c 0051f1ff 0c035a43 48044804 \."..Q....ZCH.H. + 40201920 8cc46214 102716cb 483486fc ff000000 ..b..'..H4...... + 40201930 4b3366b3 e40831c8 21d81112 c1100df0 K3f...1.!....... + 40201940 f0110060 64e7fe3f 70e7fe3f 78e7fe3f ...`d..?p..?x..? + 40201950 74e7fe3f 6388fe3f 6ce7fe3f 12c1f0c9 t..?c..?l..?.... + 40201960 210931d9 11cd0228 4216c307 66120286 !.1....(B...f... + 40201970 3800322c 21ccc331 f2ff421c 16c02000 8.2,!..1..B... . + 40201980 38033714 63322c0a 721c1162 1c10222c 8.7.c2,.r..b..", + 40201990 1752cc04 4d0c4518 2a2d0c85 ee2731e9 .R..M.E.*-...'1. + 402019a0 ff280327 9c05283c 86080000 31e7ff0c .(.'..(<....1... + 402019b0 0429039c 52583257 9c0a8c04 2903383c .)..RX2W....).8< + 402019c0 3932c602 000c142d 0586f9ff 8c142263 92.....-......"c + 402019d0 0022a00a 226c0421 ddff3222 00c90239 .".."l.!..2"...9 + 402019e0 3c05af2a 0c020635 00662202 462100f6 <..*...5.f".F!.. + 402019f0 32099cb2 26125d06 2c000000 664202c6 2...&.].,...fB.. + 40201a00 2000f642 02461f00 66720246 22004626 ..B.F..fr.F".F& + 40201a10 00221c10 bc4231ce ff280327 9c05283c ."...B1..(.'..(< + 40201a20 86080000 31c9ff0c 0429039c 52583257 ....1....)..RX2W + 40201a30 9c0a8c04 2903383c 39328602 000c142d ....).8<92.....- + 40201a40 0586f9ff 8c042903 0c02293c 42a0c286 ......)...)..o... + 40202080 21e9ff01 f2ffc000 00466c00 21e7ff01 !........Fl.!... + 40202090 efffc000 0021e5ff 72022262 02215202 .....!..r."b.!R. + 402020a0 2042021f 32021e22 02232901 21e1ff01 B..2..".#).!... + 402020b0 e7ffc000 00d1abfe 284d8c32 0c1c8620 ........(M.2... + 402020c0 00c1dcff 42a2393d 0c22a290 01e1ffc0 ....B.9=."...... + 402020d0 00005d02 294d0c02 fd0c20c2 20271563 ..].)M.... . '.c + 402020e0 22653222 651132dd 0622632c 42a240f0 "e2"e.2.."c,B.@. + 402020f0 3f2022a1 34526104 01d6ffc0 00005841 ? ".4Ra.......XA + 40202100 22652528 4d522225 c7152931 cbff0c64 "e%(MR"%..)1...d + 40202110 50252001 c0fbc000 00284dc2 2225c5ee P% ......(M."%.. + 40202120 ff2020b4 225c5e28 4d222225 22125e16 . ."\^(M""%".^. + 40202130 62fe86e1 ff42a249 3d0f0c0c 01f3fcc0 b....B.I=....... + 40202140 0000c94d 661e2928 5d16320f e1baff22 ...Mf.)(].2...." + 40202150 222642a2 533d0e01 ecfcc000 00285d42 "&B.S=.......(]B + 40202160 a2543d0e 01e9fcc0 00000c02 295d8633 .T=.........)].3 + 40202170 0021b2ff 01b6ffc0 00004600 000c1c21 .!........F....! + 40202180 b0ff01b2 ffc00000 21a9ff72 021c6202 ........!..r..b. + 40202190 1b52021a 42021932 02182202 1d290121 .R..B..2.."..).! + 402021a0 a9ff01aa ffc00000 d16ffe28 5d56f205 .........o.(]V.. + 402021b0 f1a1ff42 a2603d0f 22a29001 a5ffc000 ...B.`=."....... + 402021c0 00295d5d 02165204 0c122265 3242a266 .)]]..R..."e2B.f + 402021d0 3d0f22a1 34594101 9effc000 00584122 =.".4YA......XA" + 402021e0 6526285d 5222269c 153193ff 42a00650 e&(]R"&..1..B..P + 402021f0 25200188 fbc00000 06050000 42a26c3d % ..........B.l= + 40202200 0f0c0c01 c1fcc000 00c95d46 00000c0c ..........]F.... + 40202210 662e2c28 4dac72e1 87ff2222 2542a277 f.,(M.r...""%B.w + 40202220 3d0e01b9 fcc00000 284d42a2 783d0e01 =.......(MB.x=.. + 40202230 b6fcc000 000c0229 4dc60000 00000c1c .......)M....... + 40202240 2182ff01 82ffc000 0008f12d 0cd8d1c8 !..........-.... + 40202250 e1e8c1f8 b112c140 0df00000 489312c1 .......@....H... + 40202260 f0222224 48040931 c921513e fe22d201 .""$H..1.!Q>.".. + 40202270 77641522 02094d02 b622040b 42404074 wd."..M.."..B@@t + 40202280 5022a0c2 22638602 00420208 5024a0c2 P".."c...B..P$.. + 40202290 22630c04 cc5c0c02 46060000 00222c25 "c...\..F....",% + 402022a0 1622ffa0 44115842 4040742d 0cc00500 ."..D.XB@@t-.... + 402022b0 1622fe2d 0c0831c8 2112c110 0df00000 .".-..1.!....... + 402022c0 62130b52 130a12c1 f05a5609 31c9211c b..R.....ZV.1.!. + 402022d0 f6572604 0c020615 00581322 22245815 .W&......X.""$X. + 402022e0 62050407 66264a55 52050357 65155056 b...f&JUR..We.PV + 402022f0 415a2252 a10b5a22 22020052 a0ff5792 AZ"R..Z""..R..W. + 40202300 11c6f3ff 22d20122 02094601 0022d201 ....".."..F..".. + 40202310 22020851 14fe5022 a0c22263 164cfb22 "..Q..P".."c.L." + 40202320 2c255852 2d0cc005 001672fa 2d0c0831 ,%XR-.....r.-..1 + 40202330 c82112c1 100df000 12c1f042 1300c921 .!.........B...! + 40202340 cd032b33 0931d911 dd020132 fbc00000 ..+3.1.....2.... + 40202350 221c0008 312a2dc8 21d81112 c1100df0 "...1*-.!....... + 40202360 72770000 8e88ffff fff0ffff ffff8fff rw.............. + 40202370 000cf23f 00000080 00000040 ffffffdf ...?.......@.... + 40202380 ff0f00ff 24060060 12c1b0e2 6110e872 ....$..`....a..r + 40202390 02611322 2e11c261 12d26111 f9f13951 .a."...a..a...9Q + 402023a0 265202c6 20001603 082851c8 12222e32 &R.. ....(Q..".2 + 402023b0 cc62d22e 24860200 0000c02c 2005cb07 .b..$......, ... + 402023c0 20d22022 0c002020 04226107 16ad0522 . ".. ."a...." + 402023d0 1d0dcc32 282d17f2 50220c0d 320c0c80 ...2(-..P"..2... + 402023e0 22113022 2080c211 20284120 cc2000cc ".0" ... (A . .. + 402023f0 1121dbff c0c03120 3c8042a0 010c0230 .!....1 <.B....0 + 40202400 2483320d 18202074 8c334793 1c9c9228 $.2.. t.3G....( + 40202410 51d26e24 0c040c13 85d51ffd 0221d1ff Q.n$.........!.. + 40202420 cccf279c 04285185 97260c12 46d40000 ..'..(Q..&..F... + 40202430 279c1428 9f32a100 48023034 20390232 '..(.2..H.04 9.2 + 40202440 2e32cc23 0c833942 380e281f 422e2439 .2.#..9B8.(.B.$9 + 40202450 81381249 412d010c e4c20ec8 01eefac0 .8.IA-.......... + 40202460 0000881f 721f0b28 18804c01 eb323918 ....r..(..L..29. + 40202470 32c7f232 5f0b4991 661c1132 01000763 2..2_.I.f..2...c + 40202480 0b489f32 a0809804 30392039 04384148 .H.2....09 9.8AH + 40202490 230c0339 611c8317 641d389f 0c443803 #..9a...d.8..D8. + 402024a0 0c093036 41404310 0c134039 93396192 ..06A@C...@9.9a. + 402024b0 a01832a0 1a403993 325f0a6b 32391872 ..2..@9.2_.k29.r + 402024c0 c7fa725f 0b32afaa 32420732 42060c33 ..r_.2..2B.2B..3 + 402024d0 3242080c 03324209 32420a32 420b3201 2B...2B.2B.2B.2. + 402024e0 0c484132 420c3201 0d0c0832 420d2824 .HA2B.2....2B.($ + 402024f0 87522222 2e144762 1c289f28 02876209 .R""..Gb.(.(..b. + 40202500 281f2812 22020e37 e20bf03f 20e02e20 (.(."..7...? .. + 40202510 85d4ff20 8220281f 4891c812 0c0372cc ... . (.H.....r. + 40202520 e8791279 4f0c8222 470022cc ea325200 .y.yO.."G."..2R. + 40202530 402831bc f2261202 8643000c 22224701 @(1..&...C..""G. + 40202540 0c643d01 22ccec79 a189b101 b2fac000 .d=."..y........ + 40202550 0028810c 6432c233 22ccf201 aefac000 .(..d2.3"....... + 40202560 000c644a 3122ccf8 01abfac0 000088b1 ..dJ1".......... + 40202570 78a1060d 00000c12 38412247 010c6422 x.......8A"G..d" + 40202580 ccec79a1 89b101a3 fac00000 0c644a31 ..y..........dJ1 + 40202590 22ccf201 a0fac000 000c643d 0122ccf8 ".........d=.".. + 402025a0 019dfac0 000078a1 88b1289f 28026772 ......x...(.(.gr + 402025b0 0b320701 22a02020 23202247 0138618c .2..". # "G.8a. + 402025c0 930c02c0 20002242 00f04100 4841c2cc .... ."B..A.HA.. + 402025d0 fe22145e 1b323254 5ec02211 225c00c1 .".^.22T^."."\.. + 402025e0 61fd16a8 04320701 4c022023 20224701 a....2..L. # "G. + 402025f0 489f4c02 38042023 20290428 5c321800 H.L.8. # ).(\2.. + 40202600 279e0c22 af802023 2022440c c6000000 '..".. # "D..... + 40202610 32440c22 28257834 22020020 20348032 2D."(%x4".. 4.2 + 40202620 112151ff 20271030 22202934 06030000 .!Q. '.0" )4.... + 40202630 389f214d ff483320 24102933 320c7c28 8.!M.H3 $.)32.|( + 40202640 9f324208 162fde06 03000c13 2d0f05e6 .2B../......-... + 40202650 1f4675ff 00000038 9f0c8428 03785320 .Fu....8...(.xS + 40202660 86414048 20a04411 20205440 22202903 .A@H .D. T@" ). + 40202670 28718c72 0c144027 20860100 0022affe (q.r..@' ....".. + 40202680 20271092 2c042263 05904ec0 0c020c17 '..,."c..N..... + 40202690 40728370 7074971e 02220d1a 98134133 @r.ppt..."....A3 + 402026a0 fff07711 4049107c 09909410 0c644049 ..w.@I.|.....d@I + 402026b0 20491341 2fff9803 c0200048 0449637c I.A/.... .H.Ic| + 402026c0 c4404910 70442049 03321d0d 8c8317e8 .@I.pD I.2...... + 402026d0 06c56f20 c6000000 22a00022 6f07422f ..o ....".."o.B/ + 402026e0 01321f0b 221f0ac0 20007804 2a233121 .2.."... .x.*#1! + 402026f0 ff2020b4 303720c0 20003904 c0200078 . .07 . .9.. .x + 40202700 04311dff 303720c0 20003904 c0200078 .1..07 . .9.. .x + 40202710 04311aff 303710c0 20003904 c0200078 .1..07.. .9.. .x + 40202720 04403211 2117ff20 27103022 20c02000 .@2.!.. '.0" . . + 40202730 2904289f 280287e2 04285145 6526282d ).(.(....(QEe&(- + 40202740 47620f22 2e326612 093d0f2d 0dc58003 Gb.".2f..=.-.... + 40202750 c60a0085 760316b2 00f02f20 85531f56 ....v...../ .S.V + 40202760 e2018603 000c0229 8f222c74 52cf20f9 .......).",tR. . + 40202770 02526c74 2104ffc0 20002802 226c4e0c .Rlt!... .(."lN. + 40202780 02022113 c22112d2 2111e221 10f8f112 ..!..!..!..!.... + 40202790 c1500df0 12c1d0c9 a1c843d9 91e981f9 .P........C..... + 402027a0 7109b169 010cc6dd 03f22224 3202c859 q..i......"$2..Y + 402027b0 11424c00 604410ed 07668458 80330130 .BL.`D...f.X.3.0 + 402027c0 3831ac63 66137e0c 223d0722 4c010c64 81.cf.~."=."L..d + 402027d0 4b2c0110 fac00000 38c10c64 ab2c010d K,......8..d.,.. + 402027e0 fac00000 0c643801 46140000 cc1ff222 .....d8.F......" + 402027f0 250c1238 c1224c01 0c644b2c 0106fac0 %..8."L..dK,.... + 40202800 00003801 0c64ab2c 0103fac0 00000c64 ..8..d.,.......d + 40202810 3d0ec609 00cc3fcc 13f22225 0c02224c =.....?..."%.."L + 40202820 010c643d 0e4b2c01 fbf9c000 0038010c ..d=.K,......8.. + 40202830 64ab2c01 f8f9c000 0038c10c 6422cc10 d.,......8..d".. + 40202840 01f5f9c0 00000c02 225c0128 11f05290 ........"\.(..R. + 40202850 22154e1b 3232554e c0221122 5c0b220e ".N.22UN."."\.". + 40202860 0007620f 389d22a4 024803a0 22112024 ..b.8."..H..". $ + 40202870 20226300 21bcfc08 b132027d 289dc8a1 "c.!....2.}(... + 40202880 d891e881 f8713242 0812c130 0df00000 .....q2B...0.... + 40202890 12c1e072 2224c961 0971d951 cd036802 ...r"$.a.q.Q..h. + 402028a0 16170b16 e60a8813 52130b32 130ac020 ........R..2... + 402028b0 0098083a 3551affe 3030b450 5920c020 ...:5Q..00.PY . + 402028c0 005908c0 20009808 51acfe62 c6335059 .Y.. ...Q..b.3PY + 402028d0 20c02000 5908c020 00980851 a8fe5059 . .Y.. ...Q..PY + 402028e0 10c02000 5908c020 00980840 531131a4 .. .Y.. ...@S.1. + 402028f0 fe303910 503320c0 20003908 322232d8 .09.P3 . .9.2"2. + 40202900 4ccc3379 01860300 32170d52 c2483030 L.3y....2..R.H00 + 40202910 d4626100 30758352 a010c03c 2045e7ff .ba.0u.R...< E.. + 40202920 289c2802 67620a32 0d014c02 20232022 (.(.gb.2..L. # " + 40202930 4d018558 038c722d 0cc5351f c6050000 M..X..r-..5..... + 40202940 0c03398c 3188fc42 2374c904 c2cc20c2 ..9.1..B#t.... . + 40202950 63744600 000c1208 71c861d8 5112c120 ctF.....q.a.Q.. + 40202960 0df00000 12c1b0d2 6111f9f1 6802fd02 ........a...h... + 40202970 d222240c 02026113 c26112e2 61102941 ."$...a..a..a.)A + 40202980 27160227 9d040c12 c63b0022 2d02e2a0 '..'.....;."-... + 40202990 42202e10 1c831cae 20e3830c 043d0e22 B ...... ....=." + 402029a0 c1106981 457103cd 02688116 72fde252 ..i.Eq...h..r..R + 402029b0 0ae84228 2dd90172 cf4862c6 33176221 ..B(-..r.Hb.3.b! + 402029c0 42a0c83d 0c2d0f0c 0585dcff 0c03324e B..=.-........2N + 402029d0 18220d89 2c042024 93224e18 324e1946 ."..,. $."N.2N.F + 402029e0 030052a0 1042a048 3d0cf02f 2045daff ..R..B.H=../ E.. + 402029f0 282d4762 0a320e01 1c022023 20224e01 (-Gb.2.... # "N. + 40202a00 e159fc0c 02584e0c 14503fc0 30428340 .Y...XN..P?.0B.@ + 40202a10 4074571f 02220d1a 589c3154 fe6815f0 @tW.."..X.1T.h.. + 40202a20 44113036 107c0660 63100c63 30362039 D.06.|.`c..c06 9 + 40202a30 15314ffe 6805c020 00380339 657cc330 .1O.h.. .8.9e|.0 + 40202a40 36104033 20390532 1d0d8ca3 380577e3 6.@3 9.2....8.w. + 40202a50 06c53720 c6000000 22a00022 6c07c545 ..7 ....".."l..E + 40202a60 038c722d 0c05231f c6030000 0c03398c ..r-..#.......9. + 40202a70 322e74c9 03c2cc20 c26e7402 2113c221 2.t.... .nt.!..! + 40202a80 12d22111 e22110f8 f112c150 0df00000 ..!..!.....P.... + 40202a90 5135fc12 c1f00931 c921d911 52d50142 Q5.....1.!..R..B + 40202aa0 05fdc205 fcc0c4c0 e68c081b cca61c23 ...............# + 40202ab0 86000000 0c8c0c14 424200c2 42012bd2 ........BB..B.+. + 40202ac0 2205fc1b 332a334d 0cd02d20 0152f9c0 "...3*3M..- .R.. + 40202ad0 0000ca2d 0831c821 d81112c1 100df000 ...-.1.!........ + 40202ae0 5121fc12 c1f00931 c921d911 52d50142 Q!.....1.!..R..B + 40202af0 05fdc205 fcc0c4c0 a68c20c2 ccf93c24 .......... ...<$ + 40202b00 424200c2 42012bd2 2205fc4d 0c2a339b BB..B.+."..M.*3. + 40202b10 33d02d20 0140f9c0 0000ca2d 0831c821 3.- .@.....-.1.! + 40202b20 d81112c1 100df000 a0ff2240 50dffe3f .........."@P..? + 40202b30 12c1a0c2 6116c10b fc220160 49a1484c ....a....".`I.HL + 40202b40 e26114f2 61130261 17d26115 29c122dc .a..a..a..a.).". + 40202b50 0159b149 815202fc 4202fdfd 06399150 .Y.I.R..B....9.P + 40202b60 64c070e0 74e67608 22c6250c 03c60300 d.p.t.v.".%..... + 40202b70 002cc20c 03267607 5024c032 c2fb2cc2 .,...&v.P$.2..,. + 40202b80 422c4f2a 230c0337 14023214 00422c54 B,O*#..7..2..B,T + 40202b90 2a230c03 37140232 14002a33 222c560c *#..7..2..*3",V. + 40202ba0 0d1cb420 4d833a24 322c5ad7 130b4223 ... M.:$2,Z...B# + 40202bb0 01d71405 d20308d2 cd0a2add 222c788c ..........*.",x. + 40202bc0 b228028c 72c00200 42a00b26 12010c04 .(..r...B..&.... + 40202bd0 d0448032 a01822c1 10054e03 20d220dc .D.2.."...N. . . + 40202be0 72222c4f 0c033712 02321200 21cfff01 r",O..7..2..!... + 40202bf0 17fdc000 000c1246 5b001c82 225d0a28 .......F[..."].( + 40202c00 410c0332 4200e242 012b528c ee2d054d A..2B..B.+R..-.M + 40202c10 0e3d0f59 d101fff8 c0000058 d1f1c3ff .=.Y.......X.... + 40202c20 ea253d0f 294185e6 ff3d0f29 4105ebff .%=.)A...=.)A... + 40202c30 322c4f29 41164300 c56fff29 41322c54 2,O)A.C..o.)A2,T + 40202c40 8c532841 056fff29 41222c56 8c522841 .S(A.o.)A",V.R(A + 40202c50 05f10229 41322c5a 9c134813 8cd45203 ...)A2,Z..H...R. + 40202c60 08222104 32c30185 5a052261 04222c78 ."!.2...Z."a.",x + 40202c70 16e20122 22001682 01c00200 6612120c ..."".......f... + 40202c80 03284139 017d030c 165d034d 03c54805 .(A9.}...].M..H. + 40202c90 2941481d 321d0a28 1458413a 222055c0 )AH.2..(.XA:" U. + 40202ca0 5020f422 5d0bc020 00680451 b2fd2a23 P ."].. .h.Q..*# + 40202cb0 505620c0 20005904 c0200068 0451aefd PV . .Y.. .h.Q.. + 40202cc0 2020b450 5620c020 005904c0 20006804 .PV . .Y.. .h. + 40202cd0 51abfd40 32115056 10c02000 5904c020 Q..@2.PV.. .Y.. + 40202ce0 00580421 a7fd2025 10302220 c0200029 .X.!.. %.0" . .) + 40202cf0 0428b178 a1290168 9128811c 054c043d .(.x.).h.(...L.= + 40202d00 0d05a9ff 389d5199 fd480378 13406641 ....8.Q..H.x.@fA + 40202d10 1c025057 10202620 7c07a022 11707510 ..PW. & |..".pu. + 40202d20 4040540c 75204420 50572021 91fd5913 @@T.u D PW !..Y. + 40202d30 c0200028 027cc549 03504410 29634903 . .(.|.I.PD.)cI. + 40202d40 0c0217e6 02850820 226d0722 0c7d322d ....... "m.".}2- + 40202d50 0942210c 2243080c 12001440 0022a129 .B!."C.....@.".) + 40202d60 432d0d45 f31e0c02 022117c2 2116d221 C-.E.....!..!..! + 40202d70 15e22114 f2211312 c1600df0 6d022179 ..!..!...`..m.!y + 40202d80 fb58520c 02322532 0b430c13 40329330 .XR..2%2.C..@2.0 + 40202d90 20f43225 14476305 42a01040 22204806 .2%.Gc.B..@" H. + 40202da0 27730877 640552a0 20502220 a7630552 's.wd.R. P" .c.R + 40202db0 a4005022 20876408 e7730532 a1003022 ..P" .d..s.2..0" + 40202dc0 200df000 1080ffff 40e1fe3f 5888fe3f .......@..?X..? + 40202dd0 24e1fe3f 24e4fe3f 12c1c0f9 b1f22224 $..?$..?......"$ + 40202de0 d9d1e9c1 09f1c9e1 3941ed02 dd040c12 ........9A...... + 40202df0 166f543c 02279302 86e30037 221166b3 .oT<.'.....7".f. + 40202e00 0246e100 66c30286 580016f3 15c64901 .F..f...X.....I. + 40202e10 384122a0 b0271314 22a0c027 93028645 8A"..'.."..'...E + 40202e20 0022a0a0 27930286 1f018642 014030f4 ."..'......B.@0. + 40202e30 40603122 c3fe0c04 5d04f622 07222e17 @`1"....]..".".. + 40202e40 0c152054 832d05e6 331ddca5 0c076613 .. T.-..3.....f. + 40202e50 183144fb 0c0432d3 0272033c 32c7fe0c .1D...2..r.<2... + 40202e60 17307493 86000000 0c1732a0 0152a000 .0t.......2..R.. + 40202e70 60538350 521042a0 880c6250 42831cc3 `S.PR.B...bPB... + 40202e80 1c825032 832d0159 71696172 6105c522 ..P2.-.Yqiara.." + 40202e90 03cd0258 71686178 5116b249 1c82225c ...XqhaxQ..I.."\ + 40202ea0 0a280172 5200d252 01625202 16250841 .(.rR..R.bR..%.A + 40202eb0 c5ff322e 17425203 42a0808b 220155f8 ..2..BR.B...".U. + 40202ec0 c0000038 1c22a088 225c0b28 1322c21c ...8.".."\.(.".. + 40202ed0 29133d0c 2d0e4538 ff481c38 1432c3e8 ).=.-.E8.H.8.2.. + 40202ee0 3914394c 389cbcb2 58034c04 40452049 9.9L8...X.L.@E I + 40202ef0 03411cfb 52120048 54479e0b 42af8040 .A..R..HTG..B..@ + 40202f00 45204243 0c860000 52430c22 22255833 E BC....RC.""%X3 + 40202f10 22020020 20348042 112113fd 20251040 ".. 4.B.!.. %.@ + 40202f20 2220c601 00483321 10fd2024 10293346 " ...H3!.. $.)3F + 40202f30 e5000c62 46e30000 42a00232 a0181021 ...bF...B..2...! + 40202f40 20851703 cd0216e2 3e1c8222 5c0a2801 .......>.."\.(. + 40202f50 d252000c 22225c0b 222e2627 9f0286d9 .R..""\.".&'.... + 40202f60 00382f7c e2202310 292f86d6 00d1fdfa .8/|. #.)/...... + 40202f70 22dd0142 02fd3202 fc3064c0 e6760822 "..B..2..0d..v." + 40202f80 c62f0c05 46030000 3c620c05 26760530 ./..F....... + 40203000 40329348 7d222f26 27740948 02776404 @2.H}"/&'t.H.wd. + 40203010 2c044033 20280242 a0c04052 10471508 ,.@3 (.B..@R.G.. + 40203020 42a48040 22104792 0a288de7 620522a4 B..@".G..(..b.". + 40203030 00203320 28013252 00321f0e 3252014b . 3 (.2R.2..2R.K + 40203040 22384129 0166c311 0c643d0f 01f2f7c0 "8A).f...d=..... + 40203050 00002801 22c20622 61002221 00522d86 ..(.".."a."!.R-. + 40203060 32a00032 42005242 012b629c 453156ff 2..2B.RB.+b.E1V. + 40203070 4d052d06 59716261 0601e6f7 c0000068 M.-.Yqba.......h + 40203080 61587131 aafe5a26 290145a0 ff6d0229 aXq1..Z&).E..m.) + 40203090 0122dd05 32221f9c 53214eff 22222066 ."..2"..S!N."" f + 402030a0 120d322d 558c732d 06c528ff c61b0000 ..2-U.s-..(..... + 402030b0 4148ff32 043d22c3 fc202074 b6220266 AH.2.=".. t.".f + 402030c0 7325522d 539cf542 05032b35 2d062b44 s%R-S..B..+5-.+D + 402030d0 59716961 01d0f7c0 00005871 68612205 Yqia......Xqha". + 402030e0 032b2220 26802901 213aff32 023d22c3 .+" &.).!:.2.=". + 402030f0 fe202074 b6220266 6326522d 52ac0542 . t.".fc&R-R..B + 40203100 05036801 2b352d06 2b445971 696101c1 ..h.+5-.+DYqia.. + 40203110 f7c00000 58716861 2205032b 222a2629 ....Xqha"..+"*&) + 40203120 013182fe 22210085 9bff412a ff226100 .1.."!....A*."a. + 40203130 32241037 730f322e 1442a0c0 3704063d 2$.7s.2..B..7..= + 40203140 0e85a105 29015801 3121ff0c 942d0559 ....).X.1!...-.Y + 40203150 7101b0f7 c0000058 71411eff 9b253224 q......XqA...%2$ + 40203160 102901c7 7311322e 1442a0c0 370408e0 .)..s.2..B..7... + 40203170 3e2045a0 05226100 322d508c 53280185 > E.."a.2-P.S(.. + 40203180 1bff2901 322d5cc6 3e002176 fa42d201 ..).2-\.>.!v.B.. + 40203190 3204fd52 04fc5063 c0e67608 9b260c04 2..R..Pc..v..&.. + 402031a0 06040000 001c020c 04267607 5023c042 .........&v.P#.B + 402031b0 c2fb1c02 2a24416b fa0c0532 24515713 ....*$Ak...2$QW. + 402031c0 02521300 4168fa22 c2563224 5d0c0447 .R..Ah.".V2$]..G + 402031d0 13096813 47160442 0308ab44 20258040 ..h.G..B...D %.@ + 402031e0 42801c83 2d0145ed 02cd0216 9214315d B...-.E.......1] + 402031f0 fa1c8222 5c0a22d3 03220241 32a0800b ..."\."..".A2... + 40203200 224158fa 20229030 22a02a24 4b22c5b6 "AX. ".0".*$K".. + 40203210 ff380122 5300d253 014b2329 01cc4d22 .8."S..S.K#)..M" + 40203220 1f0d2253 02d141fe 6b233d0d 29010586 .."S..A.k#=.)... + 40203230 ff3d0d29 01858aff 382f42a0 c0290130 .=.)....8/B..).0 + 40203240 341066d3 0d3d0e45 91053d0e 2901c595 4.f..=.E..=.)... + 40203250 05290128 2f32a0c0 20231037 92102221 .).(/2.. #.7.."! + 40203260 003d0e45 91053d0e 2901c595 05290121 .=.E..=.)....).! + 40203270 3dfa3222 51167300 222100c5 0bff2901 =.2"Q.s."!....). + 40203280 4139fa32 245d8ce3 48138ca4 52030828 A9.2$]..H...R..( + 40203290 011b33c5 f7042901 381c221c 0a38132a ..3...).8."..8.* + 402032a0 33280130 22c0c606 0042a002 32a0182d 3(.0"....B..2..- + 402032b0 0185e002 cd0216e2 071c8222 5c0a2801 ..........."\.(. + 402032c0 d252000c 22225c0b d127fa0c 14284de0 .R..""\..'...(M. + 402032d0 32c00c02 30249338 9c4124fc 58136803 2...0$.8.A$.X.h. + 402032e0 4045107c 05505410 0c744045 20491341 @E.|.PT..t@E I.A + 402032f0 20fc2020 74c02000 4804f052 1149637c . t. .H..R.Ic| + 40203300 c4404610 50442049 03421f0d 16c40032 .@F.PD I.B.....2 + 40203310 230077e3 0685ab1f c6000000 22a00022 #.w.........".." + 40203320 6c07320d 7d222c09 48413242 083d0c2d l.2.}",.HA2B.=.- + 40203330 0ec555ff 86000000 0c1208f1 c8e1d8d1 ..U............. + 40203340 e8c1f8b1 12c1400d f0000000 38cefe3f ......@.....8..? + 40203350 e4e1fe3f 80080000 e6cefe3f 00000700 ...?.......?.... + 40203360 12c1a0c2 6116c1ff f9d26115 026117e2 ....a.....a..a.. + 40203370 6114f261 13dd0222 dc03f202 4139a10b a..a..."....A9.. + 40203380 fff0f074 f05f11fa 2532a080 3022a0ca ...t._..%2..0".. + 40203390 224b2222 6d355991 52dc0172 05fd8205 "K""m5Y.R..r.... + 402033a0 fc298180 97c0422c af0ca5e6 790252c9 .)....B,....y.R. + 402033b0 0322a090 2a4422dc 02620208 0c530c02 ."..*D"..b...S.. + 402033c0 0b666032 936d034a 355d02a6 89058027 .f`2.m.J5].....' + 402033d0 c052c2fb 222c503a 360c0667 12026212 .R..",P:6..g..b. + 402033e0 003a2532 2c56522c 5b0c0e1c b4304e83 .:%2,VR,[....0N. + 402033f0 2a263d0e e7150968 15e71604 320508ab *&=....h....2... + 40203400 332ae422 2c788ce2 28028ca2 39b1c002 3*.",x..(...9... + 40203410 000cb438 b1267201 0c04eae3 21ccff4a ...8.&r.....!..J + 40203420 4e49021c 8322c110 05c902ed 020c0227 NI...".........' + 40203430 9e02866c 001c8222 5e0a2841 0c840c03 ...l..."^.(A.... + 40203440 01f4f6c0 000022dc 05384122 123c2253 ......"..8A".<"S + 40203450 04ab2329 41288139 b10592ff 38b1522c ..#)A(.9....8.R, + 40203460 af225305 cb232941 0c022243 0c52430d ."S..#)A.."C.RC. + 40203470 eb639c35 31b7ff4d 052d0659 b169c101 .c.51..M.-.Y.i.. + 40203480 e5f6c000 0068c158 b131a8fd 5a262941 .....h.X.1..Z&)A + 40203490 c55fff58 9141afff faf5c0ff a0322f21 ._.X.A.......2/! + 402034a0 51a3fd29 41403310 fd054713 261b3239 Q..)A@3...G.&.29 + 402034b0 410c3332 42002841 1b323941 0c133242 A.32B.(A.29A..2B + 402034c0 0038411b 23294128 8139b145 b2fe3221 .8A.#)A(.9.E..2! + 402034d0 0b224300 313ffe22 03086612 28220309 ."C.1?."..f.(".. + 402034e0 ac222841 2c533242 000c3332 42014138 ."(A,S2B..32B.A8 + 402034f0 fe0c1332 42023204 0a324203 32040932 ...2B.2..2B.2..2 + 40203500 42045b22 29412841 3d0c4582 fe3d0f29 B.[")A(A=.E..=.) + 40203510 41c55cff 3191ff29 41529300 42a0ff0c A.\.1..)AR..B... + 40203520 13cc250c 043d0450 50f485c5 04322d33 ..%..=.PP....2-3 + 40203530 29419cf3 48633224 14168301 42241501 )A..Hc2$....B$.. + 40203540 b5f6c000 00222d33 38412862 22221520 ....."-38A(b"". + 40203550 23802261 04222d35 38022180 ff27031d #."a."-58.!..'.. + 40203560 58a12615 18222d14 32a0c027 030f2841 X.&.."-.2..'..(A + 40203570 3d0d855e 053d0d29 41056305 2941322c =..^.=.)A.c.)A2, + 40203580 508c5328 4105dbfe 2941222c 568c5228 P.S(A...)A",V.R( + 40203590 41055d02 2941322c 5b9c0348 138cc452 A.].)A2,[..H...R + 402035a0 03082841 32c30185 c6042261 04222c78 ..(A2....."a.",x + 402035b0 16e20122 22001682 01c00200 6672120c ..."".......fr.. + 402035c0 04284149 017d046d 045d040c 13c5b404 .(AI.}.m.]...... + 402035d0 29411c82 225e0a28 1e281232 c2182841 )A.."^.(.(.2..(A + 402035e0 3022c022 5e0b2d0e 022117c2 2116d221 0"."^.-..!..!..! + 402035f0 15e22114 f2211312 c1600df0 10000002 ..!..!...`...... + 40203600 12c1c030 73204034 20c9e1d9 d1e9c1f9 ...0s @4 ....... + 40203610 b109f1f8 02dd0272 610445d4 ffcd020c .......ra.E..... + 40203620 1e784116 b20e4812 32120b22 120ac020 .xA...H.2.."... + 40203630 0058042a 23314ffb 2020b430 3520c020 .X.*#1O. .05 . + 40203640 003904c0 20005804 314cfb62 cf333035 .9.. .X.1L.b.305 + 40203650 20c02000 3904c020 00580431 48fb3035 . .9.. .X.1H.05 + 40203660 10c02000 3904c020 00580440 32112144 .. .9.. .X.@2.!D + 40203670 fb202510 302220c0 20002904 69011c05 . %.0" . .).i... + 40203680 5c043d0c 2d0dc510 ff489c31 38fb7814 \.=.-....H.18.x. + 40203690 2138fb30 37107c07 7073100c 73303720 !8.07.|.ps..s07 + 402036a0 622d2439 14c02000 28028804 296431d3 b-$9.. .(...)d1. + 402036b0 ff7ce280 56412028 100c2770 22203035 .|..VA (..'p" 05 + 402036c0 20a03311 20205430 22202904 77850422 .3. T0" ).w.." + 402036d0 160dcc32 0c024601 00202074 056f1f22 ...2..F.. t.o." + 402036e0 6c07857d 02ed028c 922d0cc5 5a1eed02 l..}.....-..Z... + 402036f0 86070000 2116ff42 a1002222 0032a006 ....!..B.."".2.. + 40203700 27240942 a0400c43 2724010c 532d0c05 '$.B.@.C'$..S-.. + 40203710 da1e08f1 2d0ec8e1 d8d1e8c1 f8b112c1 ....-........... + 40203720 400df000 12c1e0c9 611c8340 c0f42d01 @.......a..@..-. + 40203730 0c240971 4598029c 5238011c 84c25300 .$.qE...R8....S. + 40203740 42520a48 12481440 33c032c3 ea32520b BR.H.H.@3.2..2R. + 40203750 0871c861 12c1200d f0000000 12c1d040 .q.a.. ........@ + 40203760 40f4c261 0ad26109 e981f971 09b1dd02 @..a..a....q.... + 40203770 fd03e802 c5faffcd 020c1216 3c0e481c ............<.H. + 40203780 321c0b22 1c0ac020 0058042a 2331f9fa 2.."... .X.*#1.. + 40203790 2020b430 3520c020 003904c0 20005804 .05 . .9.. .X. + 402037a0 31f6fa62 ce333035 20c02000 3904c020 1..b.305 . .9.. + 402037b0 00580431 f2fa7d0f 303510c0 20003904 .X.1..}.05.. .9. + 402037c0 c0200058 04403211 21eefa20 25103022 . .X.@2.!.. %.0" + 402037d0 20c02000 29046901 1c0542a0 c03d0c2d . .).i...B..=.- + 402037e0 0d05fbfe 389c1c02 48036813 40564120 ....8...H.h.@VA + 402037f0 2520a022 11405054 20252051 dcfa722d % .".@PT % Q..r- + 40203800 24505610 7c066065 100c7550 56205913 $PV.|.`e..uPV Y. + 40203810 51d8fa29 03c02000 58055963 7ce55022 Q..).. .X.Yc|.P" + 40203820 100c2550 22202903 77e4068c 3722170d ..%P" ).w...7".. + 40203830 cc320c02 46010020 20744559 1f226c07 .2..F.. tEY."l. + 40203840 85670216 9200c02c 20c5441e 86040000 .g....., .D..... + 40203850 0c03398c 31c4f842 2374c904 c2cc20c2 ..9.1..B#t.... . + 40203860 637408b1 c8a1d891 e881f871 12c1300d ct.........q..0. + 40203870 f0000000 ffff7f00 12c1c050 50745941 ...........PPtYA + 40203880 51b9f8c9 e1d9d1e9 c109f1f9 b1d2d501 Q............... + 40203890 8d03320d ffed02cd 047cc216 f3180c12 ..2......|...... + 402038a0 0c031c74 803283c7 b4010c02 20232007 ...t.2...... # . + 402038b0 6202865d 0022a578 c7a20246 5b007208 b..].".x...F[.r. + 402038c0 00920801 0cc37c04 30371040 47107ce2 ......|.07.@G.|. + 402038d0 676902c6 55002683 12561315 6c022027 gi..U.&..V..l. ' + 402038e0 1026d207 7ce226e4 02465000 c04c2032 .&..|.&..FP..L 2 + 402038f0 a0001021 20895159 61057c02 fd028851 ...! .QYa.|....Q + 40203900 7cf2168f 1278014d 0c3d082d 07795101 |....x.M.=.-.yQ. + 40203910 c1f5c000 00280138 1fcac21c 82225f0a .....(.8....."_. + 40203920 2813c901 22c21820 ccc0c0c0 f4c25f0b (...".. ......_. + 40203930 c0200048 03218ffa c2cc1820 2420c020 . .H.!..... $ . + 40203940 002903c0 20004803 218cfac0 c0b42024 .).. .H.!..... $ + 40203950 20c02000 2903c020 00480321 88fa2024 . .).. .H.!.. $ + 40203960 10c02000 29034186 fa402c11 c02000c8 .. .).A..@,.. .. + 40203970 0340cc10 20cc20c0 2000c903 58617851 .@.. . . ...XaxQ + 40203980 3845e793 06222325 86020000 48550c02 8E..."#%....HU.. + 40203990 479e0222 2e264841 9c449c22 42125e0b G..".&HA.D."B.^. + 402039a0 44c04411 42570b42 125e42c4 0142525e D.D.BW.B.^B..BR^ + 402039b0 22070407 620f489f 22a40288 04a02211 "...b.H.".....". + 402039c0 20282022 6400422f 0922057d 52240122 ( "d.B/.".}R$." + 402039d0 44082166 fae033c0 20251052 aff05022 D.!f..3. %.R..P" + 402039e0 100c7550 22205162 fa2914c0 20005805 ..uP" Qb.).. .X. + 402039f0 59645217 01719fff 90550170 22105022 YdR..q...U.p".P" + 40203a00 2029140c 050c1278 04302583 f032117c ).....x.0%..2.| + 40203a10 c2202710 30222029 0422a100 2944597f . '.0" )."..)DY. + 40203a20 2d0f524d ff05271e 86000000 7cd208f1 -.RM..'.....|... + 40203a30 c8e1d8d1 e8c1f8b1 12c1400d f0000000 ..........@..... + 40203a40 00001000 10008000 12c1a0c2 6116c145 ............a..E + 40203a50 f8d26115 e2611402 6117f261 13dd0222 ..a..a..a..a..." + 40203a60 dc014202 fd8202fc ed038094 c0522caf ..B..........R,. + 40203a70 0ca7e679 0272c903 22dc02a2 020832a0 ...y.r..".....2. + 40203a80 a33a350c 06661a0b 6202090c 5a0c0260 .:5..f..b...Z..` + 40203a90 a2836d0a 3a370c07 a6890580 44c072c4 ..m.:7......D.r. + 40203aa0 fb3a2632 2c560c0f 1cb62a27 306f834d .:&2,V....*'0o.M + 40203ab0 0f2af622 2c789b55 3045938c f228028c .*.",x.U0E...(.. + 40203ac0 b249d1c0 02000cb3 42210d26 72010c03 .I......B!.&r... + 40203ad0 faf4222c 593aff4d 0f8c9238 128c5342 ..",Y:.M...8..SB + 40203ae0 0208ab44 fa4432a0 1822c11c c55c0229 ...D.D2.."...\.) + 40203af0 8138810c 02279302 06d4001c 8222530a .8...'......."S. + 40203b00 f2dc0322 0f4132a0 800b2220 2074f042 ...".A2..." t.B + 40203b10 1129912a 243022a0 2a2c5871 4b2249b1 .).*$0".*,XqK"I. + 40203b20 29a1226d 353c440c 032d0e52 610d0138 )."m5 + 40203c10 6612200c 52224400 0c422244 010c230c f. .R"D..B"D..#. + 40203c20 02224402 22440422 44053244 030c126b ."D."D."D.2D...k + 40203c30 44225e0c 5167fc49 5e220508 66122122 D"^.Qg.I^"..f.!" + 40203c40 05099cb2 2c522244 000c3222 44010c12 ....,R"D..2"D... + 40203c50 22440222 050a2244 03220509 2244045b "D.".."D.".."D.[ + 40203c60 443d0c2d 04850cfe 58b14891 4a35c033 D=.-....X.H.J5.3 + 40203c70 a0322321 42a0c040 53104715 0842a480 .2#!B..@S.G..B.. + 40203c80 40331047 9327297e 2ca33242 000c1332 @3.G.')~,.2B...2 + 40203c90 4201587c 316bff0c 06304510 0c234036 B.X|1k...0E..#@6 + 40203ca0 83577504 0c444033 20324202 3b223d0f .Wu..D@3 2B.;"=. + 40203cb0 c5e2fe31 a9fd42a0 ff529300 0c13cc25 ...1..B..R.....% + 40203cc0 0c043d04 29ce5050 f4854b04 322c59fd ..=.).PP..K.2,Y. + 40203cd0 029c0342 230116b4 00520308 32c30105 ...B#....R..2... + 40203ce0 530420f2 20222d33 9cc22862 3222149c S. . "-3..(b2".. + 40203cf0 53422215 f02f2001 c7f4c000 00222d33 SB"../ ......"-3 + 40203d00 28622222 1520ff80 222d3538 022193fd (b"". .."-58.!.. + 40203d10 27030f3d 0d2d0f45 e404298e 3d0dc5e8 '..=.-.E..).=... + 40203d20 04fd0222 2c569c12 2d0f85e3 01422caf ...",V..-....B,. + 40203d30 3188fd40 40740549 04fd0222 2c789cc2 1..@@t.I...",x.. + 40203d40 28021682 01c00200 6672120c 042d0f49 (.......fr...-.I + 40203d50 017d046d 045d040c 13053c04 fd025221 .}.m.]....<...R! + 40203d60 08222e05 3815202f c0225e0d 48132215 ."..8. /."^.H.". + 40203d70 0a2a4440 ffc0f0f0 f4f2550b c0200058 .*D@......U.. .X + 40203d80 03417cf9 faf24045 20c02000 4903c020 .A|...@E . .I.. + 40203d90 00580341 79f9f0f0 b4404520 c0200049 .X.Ay....@E . .I + 40203da0 03c02000 58034175 f9402f11 404510c0 .. .X.Au.@/.@E.. + 40203db0 20004903 c02000f8 034171f9 40ff1020 .I.. ...Aq.@.. + 40203dc0 ff20c020 00f90322 2d26319b f80c6422 . . ..."-&1...d" + 40203dd0 6d2422c1 16018ff4 c0000032 c11022a0 m$"........2..". + 40203de0 01c5aa0f 22c11038 816d0229 0172c116 ...."..8.m.).r.. + 40203df0 1c0542a0 802d0dc5 99fe3881 715cf928 ..B..-....8.q\.( + 40203e00 937ce588 12680270 78107c08 8087100c .|...h.px.|..... + 40203e10 77604641 70782050 66103155 f90c2579 w`FApx Pf.1U..%y + 40203e20 12505620 c0200038 03590258 8139620c .PV . .8.Y.X.9b. + 40203e30 0339751c 03394231 03ff3034 20a04311 .9u..9B1..04 .C. + 40203e40 38023030 54403320 39022d05 022117c2 8.00T@3 9.-..!.. + 40203e50 2116d221 15e22114 f2211312 c1600df0 !..!..!..!...`.. + 40203e60 e801cb22 4202013d 020c02b6 442b2b63 ..."B..=....D++c + 40203e70 52030232 03032206 02803311 50432000 R..2.."...3.PC . + 40203e80 22114032 20220603 0c148022 01302220 ".@2 ".....".0" + 40203e90 31f4ff3a 320c0230 24830df0 14084000 1..:2..0$.....@. + 40203ea0 ec53ac32 52020171 fdff3d02 1c662043 .S.2R..q..=..f C + 40203eb0 c057a410 42030240 40644736 0b1b3347 .W..B..@@dG6..3G + 40203ec0 570606fa ff0c120d f00c020d f0000000 W............... + 40203ed0 3980fe3f 88130000 df930400 00a00f00 9..?............ + 40203ee0 12c1f0c9 21cd0221 27f90931 c0200048 ....!..!'..1. .H + 40203ef0 0221f7ff d911e901 32020022 2c49cc63 .!......2..",I.c + 40203f00 31f5ff06 01000000 32a13820 24c001ef 1.......2.8 $... + 40203f10 f7c00000 31f1ff27 b32ed112 f742a004 ....1..'.....B.. + 40203f20 285d32a0 a0e22224 c26224c5 eafe285d (]2..."$.b$...(] + 40203f30 0c2432a0 c005eafe 222d05c0 3c20e262 .$2....."-..< .b + 40203f40 24851a06 86020000 0031e4ff c02c2085 $........1..., . + 40203f50 07020221 03c22102 d811e801 12c1100d ...!..!......... + 40203f60 f0000000 44cefe3f ffefffff 45cefe3f ....D..?....E..? + 40203f70 a582fe3f caff2240 e4cefe3f 6c8efe3f ...?.."@...?l..? + 40203f80 3ccefe3f d8e5fe3f 708efe3f 5d80fe3f <..?...?p..?]..? + 40203f90 6e8efe3f 788efe3f bdff2240 78100060 n..?x..?.."@x..` + 40203fa0 00100000 a0e0fe3f 78432040 748efe3f .......?xC @t..? + 40203fb0 48cefe3f a85e1040 4c1b1040 bc1a1040 H..?.^.@L..@...@ + 40203fc0 12c1e0d9 51f93109 71c961e9 4101f9ff ....Q.1.q.a.A... + 40203fd0 c00000f1 e4ffdd02 220f0016 92340c02 ........"....4.. + 40203fe0 224f0021 e0f67cd3 42d20252 0414c1df "O.!..|.B..R.... + 40203ff0 ff303510 e1e3ff66 137a2842 3202d222 .05....f.z(B2.." + 40204000 a0fb2023 1066126c 31d8f621 d7ffc020 .. #.f.l1..!... + 40204010 00480320 2410c020 00290322 0c006612 .H. $.. .)."..f. + 40204020 30f1cdfc 31d3ff0c 02224300 329f0021 0...1...."C.2..! + 40204030 d1ff0106 f8c00000 329f0022 0d06853c ........2.."...< + 40204040 1221cdff 321f0041 caff3252 000c1222 .!..2..A..2R..." + 40204050 440031ca ff0c0222 4300224c 00224e00 D.1...."C."L."N. + 40204060 319dff21 c8ff0c15 0c0401d3 ffc00000 1..!............ + 40204070 86bc0000 0021c4ff 32120016 c31321c3 .....!..2.....!. + 40204080 ff41c3ff 32020066 130d51c2 ff321500 .A..2..f..Q..2.. + 40204090 3254000c 03324200 21b9ff32 02005673 2T...2B.!..2..Vs + 402040a0 0531bcff 22930032 94002022 903b5330 .1.."..2.. ".;S0 + 402040b0 35a33b52 2025a330 32212022 212a2300 5.;R %.02! "!*#. + 402040c0 22112020 31225400 41acff32 94003022 ". 1"T.A..2..0" + 402040d0 c02c8327 a30d31a0 fc221300 22c22886 .,.'..1.."..".(. + 402040e0 19000000 32afd837 22028630 00319afc ....2..7"..0.1.. + 402040f0 22130022 c2d8c613 0051a6ff 0c033242 "..".....Q....2B + 40204100 00229400 3295003b 52303390 2025a33b ."..2..;R03. %.; + 40204110 533035a3 30322120 22213022 80002211 S05.02! "!0"..". + 40204120 20203122 54004194 ff329400 5c043032 1"T.A..2..\.02 + 40204130 c032c328 37b47832 a02801b7 f6c00000 .2.(7.x2.(...... + 40204140 2022a031 85fcd022 114183fc 22530052 ".1...".A.."S.R + 40204150 940022ae c0fd0427 a502225f 00229f00 .."....'.."_.".. + 40204160 a6120522 a000225f 005181ff 22a00022 ...".."_.Q..".." + 40204170 4500329f 002188ff 01b5f7c0 0000329f E.2..!........2. + 40204180 00220d06 05281222 9f00317b ff4178ff ."...(."..1{.Ax. + 40204190 22530032 a0013244 004180ff 002211c0 "S.2..2D.A...".. + 402041a0 20003224 003030f4 202320c0 20002904 .2$.00. # . .). + 402041b0 0c02224c 00224e00 46460026 3502c637 .."L."N.FF.&5..7 + 402041c0 00220400 56920d22 0e000cc3 22c20120 ."..V.."....".. + 402041d0 2074224e 0001c2f5 c0000020 2074ec22 t"N....... t." + 402041e0 0c1e2166 ffe24c00 c162ffe2 42000c02 ..!f..L..b..B... + 402041f0 224c0022 0d060c03 e24f00c5 20120c03 "L.".....O.. ... + 40204200 860a0000 66125422 0c006612 4e215bff ....f.T"..f.N![. + 40204210 0c23c157 ff324200 0c02224c 00220d06 .#.W.2B..."L.".. + 40204220 32af380c 1ee24f00 c51d1232 af382152 2.8...O....2.8!R + 40204230 ffe24c00 32520031 4cf62159 ffc02000 ..L.2R.1L.!Y.. . + 40204240 48035158 ff202420 4158ffc0 20002903 H.QX. $ AX.. .). + 40204250 0c3322a1 0f856c02 461e0000 220c0066 .3"...l.F..."..f + 40204260 12723141 f62140ff c0200048 03f140ff .r1A.!@.. .H..@. + 40204270 202410c0 20002903 22a00022 4c00c136 $.. .).".."L..6 + 40204280 fc224e00 224f0032 9c00220d 06851712 ."N."O.2.."..... + 40204290 213aff32 1c003252 000c1222 4f00c60c !:.2..2R..."O... + 402042a0 002136ff 0c0ff242 00212bfc 5131ff32 .!6....B.!+.Q1.2 + 402042b0 9200220d 06f24500 c5141241 27fc212e .."...E....A'.!. + 402042c0 ff321400 512bff32 52000c12 224500f2 .2..Q+.2R..."E.. + 402042d0 4c00f24e 00312fff 0c022253 002133ff L..N.1/..."S.!3. + 402042e0 0c0c4129 ffc26200 2127ffc2 54000133 ..A)..b.!'..T..3 + 402042f0 ffc00000 31f8fe21 23ff4d0c 0c15012e ....1..!#.M..... + 40204300 ffc00000 211bf8c0 20003802 2129ff39 ....!... .8.!).9 + 40204310 023115f6 2123ffc0 20004803 202420c0 .1..!#.. .H. $ . + 40204320 20002903 860f0000 2117ff01 24ffc000 .).....!...$... + 40204330 002114ff 0c0432a3 e80c1501 1fffc000 .!....2......... + 40204340 003109f6 2109ffc0 20004803 202410c0 .1..!... .H. $.. + 40204350 20002903 2107f8c0 20003802 c0200028 .).!... .8.. .( + 40204360 020c1222 4f000871 c861d851 e841f831 ..."O..q.a.Q.A.1 + 40204370 12c1200d f0000000 12c1f022 a0000261 .. ........"...a + 40204380 03c5c3ff 02210312 c1100df0 dfff2240 .....!........"@ + 40204390 04e2fe3f 18542040 5ccefe3f 50cefe3f ...?.T @\..?P..? + 402043a0 4ccefe3f 64cefe3f 3c552040 54cefe3f L..?d..? @ ...!....P.. + 40204620 0050f202 00000100 240e0040 92a0c090 .P......$..@.... + 40204630 11c0d261 2df2612b d843fd02 28023261 ...a-.a+.C..(.2a + 40204640 1822611b 280d0261 2f2030b5 32611931 ."a.(..a/ 0.2a.1 + 40204650 e9ffc261 2ee2612c 42611f52 61213702 ...a..a,Ba.Ra!7. + 40204660 07281d20 28f42261 19422119 0cf24732 .(. (."a.B!...G2 + 40204670 02c68902 52211828 15e81222 0e002261 ....R!.(...".."a + 40204680 1c202014 8c128684 02220e01 32211c20 . ......"..2!. + 40204690 20140ccc 7c052261 1dc0c310 50631066 ...|."a....Pc.f + 402046a0 8c1c6632 19220e04 07621c22 21195221 ..f2."...b."!.R! + 402046b0 1f32c2fc 42c5a02d 0e0552fd 46740252 .2..B..-..R.Ft.R + 402046c0 211d5625 00664c04 4b5e8603 00322119 !.V%.fL.K^...2!. + 402046d0 22a01737 3202c66d 0252ce10 52611a52 "..72..m.R..Ra.R + 402046e0 ce0a2d05 62612452 611e4598 057d0262 ..-.ba$Ra.E..}.b + 402046f0 212456b2 07668c1c 2150f645 9705cc32 !$V..f..!P.E...2 + 40204700 0c8cc662 0232211e 226f240c 642d0fc5 ...b.2!."o$.d-.. + 40204710 04ffc65e 02320d08 8c8322af 0b2a238c ...^.2...."..*#. + 40204720 12065b02 3145f622 211a42a0 06626124 ..[.1E."!.B..ba$ + 40204730 013bf5c0 00006221 24567201 213ff662 .;....b!$Vr.!?.b + 40204740 6124c592 05207220 6221240c 05567205 a$... r b!$..Vr. + 40204750 464f0200 22211b0c 6432c233 22211a62 FO.."!..d2.3"!.b + 40204760 6124012e f5c00000 62212416 d2fcc647 a$......b!$....G + 40204770 02320d08 16a30022 af0b2023 808c1286 .2.....".. #.... + 40204780 43022100 f7c02000 28022267 49cccc22 C.!... .(."gI.." + 40204790 af500c15 20268052 612016d2 0022d701 .P.. &.Ra ...".. + 402047a0 0c033242 0a52a001 52612022 c6c00c03 ..2B.R..Ra ".... + 402047b0 0c1d20d3 83726f24 d0d07437 9c1a379d .. ..ro$..t7..7. + 402047c0 17522121 22211c52 4fc02762 02c64600 .R!!"!.RO.'b..F. + 402047d0 564d0446 45000000 0052211b 22211a42 VM.FE....R!."!.B + 402047e0 a00632c5 33626124 72612301 0cf5c000 ..2.3ba$ra#..... + 402047f0 00622124 72212316 62fc310f f622211a .b!$r!#.b.1.."!. + 40204800 0c640106 f5c00000 62212472 21238c12 .d......b!$r!#.. + 40204810 461f0286 eaff0000 320e0022 a08c2023 F.......2..".. # + 40204820 1032a088 1c0d3792 15220e01 20201466 .2....7..".. .f + 40204830 3206d20e 1ec60000 00d20e18 d0d03452 2.............4R + 40204840 1e0b8c7c 22212056 7208c61e 0022a0d0 ...|"! Vr....".. + 40204850 27966022 0e0182ce 18204604 22ce2040 '.`"..... F.". @ + 40204860 28838b32 422119e0 33c037a4 02c61502 (..2B!..3.7..... + 40204870 42020032 a07f3794 ca315fff 0c3422c2 B..2..7..1_..4". + 40204880 01526122 62612472 612301e4 f4c00000 .Ra"ba$ra#...... + 40204890 52212262 21247221 235672fa 32211e0c R!"b!$r!#Vr.2!.. + 402048a0 6422cf48 62612401 dbf1c000 00622124 d".Hba$......b!$ + 402048b0 06970000 22a0b027 9689222f 26271783 ...."..'.."/&'.. + 402048c0 22d70122 020a56a2 f770dd90 525d5f46 ".."..V..p..R]_F + 402048d0 0600220e 013762f0 702d9022 125f2025 .."..7b.p-."._ % + 402048e0 c0e61202 46ea0186 f7ff0000 32211e0c ....F.......2!.. + 402048f0 6422cf48 62612472 612301c6 f1c00000 d".Hba$ra#...... + 40204900 62212472 2123664c 02c6af01 268c0516 b!$r!#fL....&... + 40204910 dc1fc6de 01d20e01 1c83d0d0 1422cdfd .............".. + 40204920 1ced20d3 93320e00 22a08c20 231042a0 .. ..2..".. #.B. + 40204930 884022c0 2b3d4221 1920d383 522118d0 .@".+=B!. ..R!.. + 40204940 30f422c4 fc3022c0 32550a22 550b5221 0."..0".2U."U.R! + 40204950 1d261502 066affd7 a4028668 ff22170d .&...j.....h.".. + 40204960 0c7432a0 a0165268 320e0128 27202330 .t2...Rh2..(' #0 + 40204970 4762101c 02203310 70272072 6123856f Gb... 3.p' ra#.o + 40204980 01722123 220e0167 622a222f 1447e202 .r!#"..gb*"/.G.. + 40204990 065bff32 21184d0d 2d0f7261 230592fd .[.2!.M.-.ra#... + 402049a0 72212316 92d5320e 0122afbf 20231022 r!#...2..".. #." + 402049b0 4e014603 00222118 38122212 0a48132a N.F.."!.8."..H.* + 402049c0 24291342 21192221 183d0ed0 5d207261 $).B!."!.=..] ra + 402049d0 2385b802 32211c22 611822a0 70202310 #...2!."a.".p #. + 402049e0 72212366 d20286a8 01422118 16746a28 r!#f.....B!..tj( + 402049f0 14e81228 2707e22c 22071866 125d320e ...('..,"..f.]2. + 40204a00 0d420e0c 21fefe80 33114033 202020f4 .B..!...3.@3 . + 40204a10 27130286 9e012221 18322f24 52120b22 '....."!.2/$R.." + 40204a20 2f33c608 00320e0d 420e0c21 f4fe8033 /3...2..B..!...3 + 40204a30 11403320 2020f427 9321222f 3316b201 .@3 .'.!"/3... + 40204a40 32211852 130b322f 24322341 22220652 2!.R..2/$2#A"".R + 40204a50 c5f242ce 0e05cd08 468d0100 220e0007 ..B.....F..."... + 40204a60 62165221 1842a000 32150b22 a003453a b.R!.B..2.."..E: + 40204a70 2420d220 dc924612 0022211b 0c6432c2 $ . ..F.."!..d2. + 40204a80 332d0e01 66f4c000 005652fd c60c0000 3-..f....VR..... + 40204a90 00322118 28134213 0b381228 1d015df1 .2!.(.B..8.(..]. + 40204aa0 c0000022 1d073d0d 0b22225d 0722211b ..."..=..""]."!. + 40204ab0 458dfd66 120c221d 071b2222 5d072d0d E..f.."...""].-. + 40204ac0 c52d2422 0e000762 2e522118 42a00232 .-$"...b.R!.B..2 + 40204ad0 150b22a0 03c53324 42211838 14381339 .."...3$B!.8.8.9 + 40204ae0 12290449 420c034d 021cd201 cffec000 .).IB..M........ + 40204af0 000c8286 db010000 52211b0c 6432c533 ........R!..d2.3 + 40204b00 2d0e0146 f4c00000 16d2fb86 60010000 -..F........`... + 40204b10 420e011c 83404014 22c4fd1c e4204393 B....@@.".... C. + 40204b20 320e0022 a08c2023 1072a088 2b347022 2..".. #.r..+4p" + 40204b30 c0204383 52211922 21184030 f432520a . C.R!."!.@0.2R. + 40204b40 22c5fc30 22c03221 1822530b 1c725732 "..0".2!."S..rW2 + 40204b50 02c65c01 52211d56 d556220e 0a076202 ..\.R!.V.V"...b. + 40204b60 06590122 0e016762 3a22af30 2a26bc22 .Y."..gb:".0*&." + 40204b70 22a0b027 16028653 01222f14 47e20246 "..'...S."/.G..F + 40204b80 51012d0f 62612485 73fd6221 24167253 Q.-.ba$.s.b!$.rS + 40204b90 32211828 13322201 22afbf42 03012024 2!.(.2"."..B.. $ + 40204ba0 10224301 42211838 0f2814d2 140b2812 ."C.B!.8.(....(. + 40204bb0 c22f2482 c218da58 22611952 611c26e6 ./$....X"a.Ra.&. + 40204bc0 6222a080 67322066 c602c6e1 002c0267 b"..g2 f.....,.g + 40204bd0 320516f6 37c63b01 26d6715c 02271602 2...7.;.&.q\.'.. + 40204be0 0639010c 14460f00 22a0b027 96028699 .9...F.."..'.... + 40204bf0 0067320b 22a0a027 960286e7 00c63101 .g2."..'......1. + 40204c00 22a0c027 960286e4 0022a0d0 27160246 "..'....."..'..F + 40204c10 2d015221 1c322119 4d08f02f 2085a506 -.R!.2!.M../ ... + 40204c20 06290100 0c0421cf f3287220 27042612 .)....!..(r '.&. + 40204c30 0a52c6b0 0c0cc795 02061501 52211f22 .R..........R!." + 40204c40 21183d01 c5cd0246 1f010000 00222f11 !.=....F....."/. + 40204c50 26520246 1c010c02 22611aed 02dd029d &R.F...."a...... + 40204c60 02c2a0dd 32211c80 23c0e622 02c62b00 ....2!..#.."..+. + 40204c70 6208011b 36272302 06130122 08002612 b...6'#...."..&. + 40204c80 0e164204 3c233712 0bc7120f 86210000 ..B.<#7......!.. + 40204c90 dd080620 00ed08c6 1e000000 b6462e32 ... .........F.2 + 40204ca0 08035208 02220804 80331100 22115043 ..R.."...3..".PC + 40204cb0 20403220 22080580 22013022 203150fe @2 "...".0" 1P. + 40204cc0 37920a82 611a0613 009d08c6 11002d08 7...a.........-. + 40204cd0 62612482 61229261 238518ff 62212482 ba$.a".a#...b!$. + 40204ce0 21229221 23acd221 9ff3a222 5eac5a42 !".!#..!..."^.ZB + 40204cf0 211f2221 1962c6f8 72c4a0ab 587b48ab !."!.b..r...X{H. + 40204d00 32826122 92612360 607422a0 01c00a00 2.a".a#``t"..... + 40204d10 82212292 21232208 012b222a 88c6d0ff .!".!#"..+"*.... + 40204d20 164d3a32 0d010cf2 37b20246 e6008cae .M:2....7..F.... + 40204d30 420e0130 22c047a2 02c6e200 16893842 B..0".G.......8B + 40204d40 09012c02 47b20246 df00c186 f322dc03 ..,.G..F.....".. + 40204d50 22024366 120516e4 36460200 cc64287c ".Cf....6F...d(| + 40204d60 b7f224c6 0900222c af271402 06d60031 ..$...",.'.....1 + 40204d70 78f92b29 92612301 a9f3c000 00922123 x.+).a#.......!# + 40204d80 564234c6 f5ff0000 22090116 9233222f VB4....."....3"/ + 40204d90 26226f24 211cfe28 02163206 411bfe31 &"o$!..(..2.A..1 + 40204da0 7bfd2cc2 01abf4c0 00005d02 7178fd16 {.,.......].qx.. + 40204db0 d2044221 1f0c7669 0222c4a0 29152221 ..B!..vi."..)."! + 40204dc0 190c6432 c20a22c5 08726123 52612262 ..d2.."..ra#Ra"b + 40204dd0 61240190 f0c00000 52212262 21244d05 a$......R!"b!$M. + 40204de0 6036201c 520110fe c0000052 21227221 `6 .R......R!"r! + 40204df0 238cb241 06fe3d07 2d0501c3 f1c00000 #..A..=.-....... + 40204e00 222c5616 52037cf3 3241004d 010c032b ",V.R.|.2A.M...+ + 40204e10 2245c900 220100b6 22053221 1a16732a "E.."...".2!..s* + 40204e20 3d0e2d0d 8507ff52 21190c03 0c142043 =.-....R!..... C + 40204e30 83ab352d 0f857cfe 06a30000 3d0e2d0d ..5-..|.....=.-. + 40204e40 c505ff0c 0c0c1420 4c832221 19ab322d ....... L."!..2- + 40204e50 0fc57afe 468e0000 222f1126 52028699 ..z.F..."/.&R... + 40204e60 00522119 0c6432c3 3322c510 016cf3c0 .R!..d2.3"...l.. + 40204e70 00005622 25e66d02 06930041 3af32221 ..V"%.m....A:."! + 40204e80 19422407 32120c22 120da774 02c68d00 .B$.2.."...t.... + 40204e90 422f2642 6f2456e3 22320f54 66231d22 B/&Bo$V."2.Tf#." + 40204ea0 2f171622 223139fd 42a632c2 a0000196 /..""19.B.2..... + 40204eb0 f1c00000 c26f1786 75000000 00261202 .....o..u....&.. + 40204ec0 0681000c 2432a0b0 2d0fc5f0 fd322119 ....$2..-....2!. + 40204ed0 abc32d0c 851905dd 02cc822d 0c850705 ..-........-.... + 40204ee0 dd021622 1e22dd01 0c130c64 32420a3d ...".".....d2B.= + 40204ef0 0c2d0d01 48f0c000 0022a0e0 0c032a2d .-..H...."....*- + 40204f00 c2a110c5 fe00cacd 2d0c012c fcc00000 ........-..,.... + 40204f10 31c0fd4d 0d2d0c01 27fdc000 000c154d 1..M.-..'......M + 40204f20 0532a7d0 2d0c0124 fcc00000 482d21b9 .2..-..$....H-!. + 40204f30 fd203420 392d320f 5426330b 31b7fd30 . 4 9-2.T&3.1..0 + 40204f40 3420392d 06600000 6ce33034 10202320 4 9-.`..l.04. # + 40204f50 292d865c 00222f11 26520246 5a005221 )-.\."/.&R.FZ.R! + 40204f60 190c6432 c33322c5 10626124 012cf3c0 ..d2.3"..ba$.,.. + 40204f70 00006221 2456f214 66c6103c 0222611e ..b!$V..f..<."a. + 40204f80 0c92d722 02c64f00 c6450000 1c033261 ..."..O..E....2a + 40204f90 1ee64d02 064c0046 b0000000 222f1126 ..M..L.F...."/.& + 40204fa0 52028648 00522119 42a00632 c33322c5 R..H.R!.B..2.3". + 40204fb0 04011af3 c0000056 d210e62d 02c64100 .......V...-..A. + 40204fc0 c03c202d 0f451205 063f0000 22a0a027 .< -.E...?.."..' + 40204fd0 1602c62e 00322118 d22f2428 1338128c .....2!../$(.8.. + 40204fe0 6d221d0d 2020d4cc e20c7432 a0c02d0f m".. ....t2..-. + 40204ff0 45defd86 26000000 00321301 3030d437 E...&....2..00.7 + 40205000 1202c622 00e22d3b 56fe00f0 2f204595 ..."..-;V.../ E. + 40205010 fd0c032d 0dc5ef00 461d0032 a0e03a3d ...-....F..2..:= + 40205020 28030b22 2903ccc2 32a0ec3a 3d0c0449 (..")...2..:=..I + 40205030 13490306 0100388e 326d3b32 a0ec3a3d .I....8.2m;2..:= + 40205040 48230b44 49239c42 42211821 76fd3894 H#.DI#.BB!.!v.8. + 40205050 a0221148 03202420 29030602 000032a0 .".H. $ ).....2. + 40205060 002d0d05 eb0045e5 008c722d 0e85c21c .-....E...r-.... + 40205070 46070000 5221180c 02298521 baf23222 F...R!...).!..2" + 40205080 74590332 c5203262 74060100 2221188c tY.2. 2bt..."!.. + 40205090 42222118 05cb1b2d 0c067200 c2a0ff86 B"!....-..r..... + 402050a0 fbff0032 2119e2c3 220c0dd2 611bd261 ...2!..."...a..a + 402050b0 1ad2611d 32211ce0 23c0e622 02c62200 ..a.2!..#.."..". + 402050c0 620e011b 36272304 0c0cc6f0 ff220e00 b...6'#......".. + 402050d0 2cd44712 30273410 16120652 211a0b22 ,.G.0'4....R!.." + 402050e0 205e8352 611a8615 003c2337 121132a0 ^.Ra....<#7..2. + 402050f0 dd371216 3c033792 02063700 06100000 .7..<.7...7..... + 40205100 e2611b46 0e00dd0e 060d00f6 4602c644 .a.F........F..D + 40205110 002b2e42 0201720e 02320202 80441100 .+.B..r..2...D.. + 40205120 33117054 20504320 32020380 33014033 3.pT PC 2...3.@3 + 40205130 20413afd 47930286 2700862e 00e2611d A:.G...'.....a. + 40205140 220e012b 222aee46 daff0000 42211a16 "..+"*.F....B!.. + 40205150 54f73204 0122a00f 37b20246 daff5221 T.2.."..7..F..R! + 40205160 1b16b500 42050130 22c047a2 02c6d5ff ....B..0".G..... + 40205170 22211d16 12f52202 012c0327 b30286d1 "!...."..,.'.... + 40205180 ff9c7d22 0d0032a0 dd3032c0 1ca51ce2 ..}"..2..02..... + 40205190 420d0130 259327b4 02c6caff 32211a42 B..0%.'.....2!.B + 402051a0 211b52a0 0fc02c20 456b0220 30747762 !.R..., Ek. 0twb + 402051b0 02c6c4ff 216cf222 22075762 072cf237 ....!l."".Wb.,.7 + 402051c0 320286c0 ff222f26 42211e22 6f243d0c 2...."/&B!."o$=. + 402051d0 2d0fc502 05c6bbff 003cd267 a20286d7 -........<.g.... + 402051e0 ff2b6660 4074424c 243d0e22 cc270189 .+f`@tBL$=.".'.. + 402051f0 efc00000 06d2ff00 b6662932 02015202 .........f)2..R. + 40205200 00803311 50432032 02022202 03003311 ..3.PC 2.."...3. + 40205210 40332080 22013022 203101fd 37920522 @3 .".0" 1..7.." + 40205220 0e0616a2 f1e02e20 62612485 c3fe6221 ....... ba$...b! + 40205230 2416b2f0 214cf2a2 225e162a f042211f $...!L.."^.*.B!. + 40205240 22211962 c6f872c4 a032c20a 60607452 "!.b..r..2..``tR + 40205250 ce0a7b4e 0c32c00a 00c6b8ff 422119e2 ..{N.2......B!.. + 40205260 c41cc690 ff02212f 92a0c0c2 212ed221 ......!/....!..! + 40205270 2de2212c f2212b9a 110df000 60cefe3f -.!,.!+.....`..? + 40205280 10dcfe3f 983a0000 940cf23f 5bcefe3f ...?.:.....?[..? + 40205290 c03f2040 a482fe3f a05d1040 cc2e0040 .? @...?.].@...@ + 402052a0 740f0040 800f0040 12c1e0d9 51d12df2 t..@...@....Q.-. + 402052b0 e941e85d f9310971 20f074c9 610c0227 .A.].1.q .t.a..' + 402052c0 9e02c64a 00322e34 0c128773 02064800 ...J.2.4...s..H. + 402052d0 21ebff42 02000764 0b0c2330 34203242 !..B...d..#04 2B + 402052e0 00864200 00c1e6ff 0c153d05 0c064d0c ..B.......=...M. + 402052f0 2d054521 1b3d0cdc ef280ecc 92414bf3 -.E!.=...(...AK. + 40205300 e02e2085 530f290e 222e0005 8f23222e .. .S.)."....#". + 40205310 00057c23 c60b0000 0001dfff c0000021 ..|#...........! + 40205320 d9ff01de ffc00000 31d8ff22 affec020 ........1.."... + 40205330 00422300 202410c0 20002903 855319cc .B#. $.. .)..S.. + 40205340 12852819 c5711b45 6b0c6632 0b222d04 ..(..q.Ek.f2."-. + 40205350 16520022 2211f622 3a22dd03 c2024101 .R.""..":"....A. + 40205360 d0ffc000 000bccc0 c07422a0 80c0cc90 .........t"..... + 40205370 20cca0ca cd222d4b 4bccc712 0721c3ff ...."-KK....!.. + 40205380 0c133242 00c26d4b 01c7ffc0 0000c02c ..2B..mK......., + 40205390 20859800 568f0322 dd012202 df07622f ...V..".."...b/ + 402053a0 c1f9fa31 bbff42a0 002d0c01 02fcc000 ...1..B..-...... + 402053b0 0021ecfa 0c133242 002d0c01 00fbc000 .!....2B.-...... + 402053c0 000c150c 0432a3e8 2d0c01fb fac00000 .....2..-....... + 402053d0 22a00105 d01dd02d 20c5fdfe 21aeff0c "......- ...!... + 402053e0 03324200 320ed30c 12202320 224ed30c .2B.2.... # "N.. + 402053f0 120871c8 61d851e8 41f83112 c1200df0 ..q.a.Q.A.1.. .. + 40205400 59cefe3f 58cefe3f 40cefe3f c0270900 Y..?X..?@..?.'.. + 40205410 48f4ffff 5acefe3f 12c1f021 98ffc921 H...Z..?...!...! + 40205420 0931d911 e9014202 007ce330 34103242 .1....B..|.04.2B + 40205430 003198ff cd023203 0056b309 c1caf1d1 .1....2..V...... + 40205440 dbfbc2dc 01220cde 26220445 b61d290d ....."..&".E..). + 40205450 e1d5fb2d 0e01d9fa c0000038 0de02e20 ...-.......8... + 40205460 0c1542a0 0001d4fa c0000021 e5ff2202 ..B........!..". + 40205470 009c4231 e4ff2203 001b2220 20742243 ..B1.."..." t"C + 40205480 00b62204 0c0245c1 1c220cde 26220286 .."...E.."..&".. + 40205490 1e00453e 19164207 c1dcff0c 13280c1b ..E>..B......(.. + 402054a0 22290c2d 03c5ec12 380d21d8 ff0187f2 ").-....8.!..... + 402054b0 c0000038 0c273308 0c02455e 140c0229 ...8.'3...E^...) + 402054c0 0c380db0 23113022 c03022a0 31d1ff30 .8..#.0".0".1..0 + 402054d0 22b0c505 19060d00 21cfff32 a0013242 ".......!..2..2B + 402054e0 0022a001 45bb1c32 0c001763 1f22affd ."..E..2...c.".. + 402054f0 20231022 4c00219b f122d201 2202de66 #."L.!..".."..f + 40205500 22050c12 86000000 0c02c5d9 ff0831c8 ".............1. + 40205510 21d811e8 0112c110 0df00000 00000001 !............... + 40205520 00e1fe3f a58efe3f 6188fe3f 00b00400 ...?...?a..?.... + 40205530 dc84fe3f 00900100 d04c0040 12c190f2 ...?.....L.@.... + 40205540 6117f152 ffc2611a e2611802 611bd261 a..R..a..a..a..a + 40205550 19220f00 c184f1e1 90fb2612 0b22dc02 ."........&..".. + 40205560 22020826 12024627 000c0222 4f00280e "..&..F'..."O.(. + 40205570 38924803 0c434056 41e7e50c 41e8ff0c 8.H..C@VA...A... + 40205580 63404510 0c054035 8345f21c 285c3d01 c@E...@5.E..(\=. + 40205590 454bfe31 82fb48c1 290e2842 42630032 EK.1..H.).(BBc.2 + 402055a0 210322c2 182023c0 322caf30 22c0317c !.".. #.2,.0".1| + 402055b0 fb224300 22dc0122 02de2622 02c59b1d ."C.".."..&".... + 402055c0 85430c66 3209284c 8c422222 11f62236 .C.f2.(L.B"".."6 + 402055d0 22dc03d2 02410132 ffc00000 0bddd0d0 "....A.2........ + 402055e0 7422a080 d0dd9020 dda0dadc 222c4b4b t"..... ....",KK + 402055f0 ddd71204 0c12224f 00d26c4b 012affc0 ......"O..lK.*.. + 40205600 00002d0d 45710028 0e16c21c f842622c ..-.Eq.(.....Bb, + 40205610 af22cf18 22611021 62fb385c 22020032 .".."a.!b.8\"..2 + 40205620 23266a62 22611122 2110d2dc 026a6222 #&jb"a."!....jb" + 40205630 135e0b22 c0221122 5f0b2213 5e1b2222 .^."."."_.".^."" + 40205640 535e220d 1566123f 820d170c 17220d16 S^"..f.?.....".. + 40205650 70381030 37300012 400047a1 00124000 p8.070..@.G...@. + 40205660 33a10c05 00124000 28a16261 13726112 3.....@.(.ba.ra. + 40205670 01b2ffc0 0000220d 17722112 20200420 ......"..r!. . + 40205680 2730224d 17622113 31a6ff5b 2642a001 '0"M.b!.1..[&B.. + 40205690 62611301 60eec000 00622113 220602cc ba..`....b!."... + 402056a0 12220603 0b222246 02219eff 3155ff22 ."...""F.!..1U." + 402056b0 02004206 048c920c 12224300 20242046 ..B......"C. $ F + 402056c0 040022a0 00224300 314fff22 430032af ..".."C.1O."C.2. + 402056d0 fe302410 22460422 2c561662 047cf332 .0$."F.",V.b.|.2 + 402056e0 41004d01 0c032b22 c53b0032 010022cf A.M...+".;.2..". + 402056f0 200c2466 2315318c ff0146ee c0000021 .$f#.1...F....! + 40205700 8bff4586 1d22a12c 86040000 3189ff01 ..E..".,....1... + 40205710 41eec000 002187ff c5841d22 a06431ad A....!.....".d1. + 40205720 f522533c 322caf22 21113a32 2221100b ."S<2,."!.:2"!.. + 40205730 33303280 222c4b32 6112458b fc322112 302.",K2a.E..2!. + 40205740 22430022 2c4b858a fc32dc03 22434121 "C.",K...2.."CA! + 40205750 08f3380e c0200028 02389342 a0ff2963 ..8.. .(.8.B..)c + 40205760 296f0c02 297f21fc f60c1522 9200cc32 )o..).!...."...2 + 40205770 0c044054 203109fb 2020f438 03224309 ..@T 1.. .8."C. + 40205780 20284152 43074243 0822430a c5720016 (ARC.BC."C..r.. + 40205790 620431ba fe0c1242 03002024 20224300 b.1....B.. $ "C. + 402057a0 222c569c 927cf332 41004d01 0c032b22 ",V..|.2A.M...+" + 402057b0 452f0022 01006632 06c5c5ff 061b0000 E/."..f2........ + 402057c0 280e454d 1c220d08 66126022 0d0916a2 (.EM."..f.`".... + 402057d0 050b2222 4d098614 00d1f2fa c2dc01d0 ..""M........... + 402057e0 2d2001f6 f9c00000 220cdee1 f0fa2622 - ......".....&" + 402057f0 05c57b1d 226e0038 0e2d0d0c 1542a000 ..{."n.8.-...B.. + 40205800 01eef9c0 0000220c de66221f 8506199c ......"..f"..... + 40205810 920c132d 03c5b512 380eb023 113022c0 ...-....8..#.0". + 40205820 3022a031 fbfe3022 b045d018 02211bc2 0".1..0".E...!.. + 40205830 211ad221 19e22118 f2211712 c1700df0 !..!..!..!...p.. + 40205840 6080fe3f 780d0000 7d0d0000 60e8fe3f `..?x...}...`..? + 40205850 12c1d0d2 6109d1c3 f0c9a1c8 5df97109 ....a.......].q. + 40205860 b120f074 e9810c02 279c0246 8a00322c . .t....'..F..2, + 40205870 340c1287 f3028687 00ed0256 af0522dd 4..........V..". + 40205880 03220244 1b22e722 3ec05ea0 222526ac .".D.".">.^."%&. + 40205890 d2622c24 0c44226c 2432a0a0 2d0c5261 .b,$.D"l$2..-.Ra + 402058a0 01626100 0553fd32 a0c00c24 2d0c8552 .ba..S.2...$-..R + 402058b0 fd680158 11626c24 3225262d 0cc58204 .h.X.bl$2%&-.... + 402058c0 1beee0e0 7446edff 222c00c5 3623c02c ....tF..",..6#., + 402058d0 2085120f 460d0000 00016ffe c0000021 ...F.....o....! + 402058e0 69fe016e fec00000 3168fe22 a001c020 i..n....1h."... + 402058f0 00422300 202420c0 20002903 85f7188c .B#. $ . .)..... + 40205900 12c5ef18 21cfff22 1200452a 1b2161fe ....!.."..E*.!a. + 40205910 32a00132 420021a3 fa01a8f9 c0000031 2..2B.!........1 + 40205920 58fe0c05 0c2422a0 0185de1a 0c12c5f4 X....$"......... + 40205930 1d222d65 9c0241c3 ff3194fa 01f3eec0 ."-e..A..1...... + 40205940 000022a0 00226d65 222d668c f241beff ..".."me"-f..A.. + 40205950 318ffa01 edeec000 000c0222 6d660c06 1.........."mf.. + 40205960 0c154d06 3d062d05 c5b91a0c 042d040c ..M.=.-......-.. + 40205970 13c58b1d 0c124578 1dec3f22 dd012202 ......Ex..?"..". + 40205980 df07621b 2180f901 8df9c000 003176f0 ..b.!........1v. + 40205990 2176f9c0 20004803 202410c0 20002903 !v.. .H. $.. .). + 402059a0 d85d6cf2 322d1420 2310226d 140c0222 .]l.2-. #."m..." + 402059b0 4d54222d 260c0339 22222d33 37920286 MT"-&..9""-37... + 402059c0 26002862 22221437 120b3170 fa42a1ac &.(b"".7..1p.B.. + 402059d0 01ceeec0 0000222d 33286228 028ca231 ......"-3(b(...1 + 402059e0 6bfa42a1 b001c8ee c0000022 2d332862 k.B........"-3(b + 402059f0 8ca23166 fa42a1b4 01c4eec0 0000222d ..1f.B........"- + 40205a00 33281228 e28ca231 61fa42a1 b801beee 3(.(...1a.B..... + 40205a10 c0000022 2d332812 28f216b2 00315bfa ..."-3(.(....1[. + 40205a20 42a1bc01 b9eec000 00222d33 281216b2 B........"-3(... + 40205a30 003156fa 42a1c001 b4eec000 00222d33 .1V.B........"-3 + 40205a40 9c023152 fa42a1c4 01b0eec0 000022a0 ..1R.B........". + 40205a50 00226d33 217eff01 59f9c000 002107fe ."m3!~..Y....!.. + 40205a60 22020007 e224214c fa28029c c2389248 "....$!L.(...8.H + 40205a70 030c4340 5641e7e5 0e41a8fe 32a00640 ..C@VA...A..2..@ + 40205a80 451052a0 00403583 45a21c32 0cd37ce2 E.R..@5.E..2..|. + 40205a90 20231022 4cd30c12 08b1c8a1 d891e881 #."L........... + 40205aa0 f87112c1 300df000 5d022d04 412ef012 .q..0...].-.A... + 40205ab0 c1f06224 56093130 30747cf4 16860916 ..b$V.100t|..... + 40205ac0 d50816a2 0826535b f6631d26 2347f633 .....&S[.c.&#G.3 + 40205ad0 0bbcb366 137f0c64 8b354618 0026333b ...f...d.5F..&3; + 40205ae0 66437232 05108617 00268345 0c843734 fCr2.....&.E..74 + 40205af0 0b266337 66735e32 05138612 00269339 .&c7fs^2.....&.9 + 40205b00 b6932e0c b447934d 32051a46 0e000000 .....G.M2..F.... + 40205b10 32050746 0c003205 0ec60a00 32050f46 2..F..2.....2..F + 40205b20 09000000 32051146 07000000 32051246 ....2..F....2..F + 40205b30 05000c24 32c51406 01000c24 32c51801 ...$2......$2... + 40205b40 35edc000 00860000 3242000c 04c60100 5.......2B...... + 40205b50 7ce48600 00007cd4 08312d04 12c1100d |.....|..1-..... + 40205b60 f0000000 12c1f0d9 110931dd 02c9210c ..........1...!. + 40205b70 02271d1b 21fcef32 22560c02 271310c2 .'..!..2"V..'... + 40205b80 13002d0d 4d0c2b33 0123edc0 0000ca2d ..-.M.+3.#.....- + 40205b90 0831c821 d81112c1 100df000 c8002340 .1.!..........#@ + 40205ba0 f4ff2240 24e0fe3f 41ffff0c 055244fc .."@$..?A....RD. + 40205bb0 31edef66 120a0c32 2244fd21 f8ffc601 1..f...2"D.!.... + 40205bc0 000cb222 44fd21f6 ff520200 0c045243 ..."D.!..R....RC + 40205bd0 2c22c21e 1b3357b4 10620200 1b446243 ,"...3W..b...DbC + 40205be0 2c404074 22c21046 faff0df0 12c1f0c9 ,@@t"..F........ + 40205bf0 210931cd 0205fbff 21dbef32 a003261c !.1.....!..2..&. + 40205c00 0232a00c 32427c0c 0332427d 32427e0c .2..2B|..2B}2B~. + 40205c10 4332427f 0831c821 12c1100d f0000000 C2B..1.!........ + 40205c20 78cefe3f 21ffff0c 03398239 72324250 x..?!....9.9r2BP + 40205c30 3242510d f0000000 7ccefe3f e82a0040 2BQ.....|..?.*.@ + 40205c40 12c1f0c9 21c1f6ff d911e901 d86ced02 ....!........l.. + 40205c50 21faff1c 83093101 f9ffc000 008c5d28 !.....1.......]( + 40205c60 4c3d0ec0 0d000831 c821d811 e80112c1 L=.....1.!...... + 40205c70 100df000 12c1f022 a0000261 0305fcff ......."...a.... + 40205c80 02210312 c1100df0 9ccefe3f b0cefe3f .!.........?...? + 40205c90 12c1f0c2 6102c1e2 ff026103 222c0116 ....a.....a.",.. + 40205ca0 620121f9 ff01c5f8 c0000021 f8ff01c3 b.!........!.... + 40205cb0 f8c00000 0c4285f8 ff487c8c 54288c0c .....B...H|.T(.. + 40205cc0 43c00400 0831c821 12c1100d f0000000 C....1.!........ + 40205cd0 12c1e0c2 6106c1d2 ffd26105 e26104f9 ....a.....a..a.. + 40205ce0 31097120 d074220c 50fd03ed 048c9232 1.q .t".P......2 + 40205cf0 0c510c32 d7331085 f9ff0c12 224c50d2 .Q.2.3......"LP. + 40205d00 4c51f97c e98c0c02 0871c861 d851e841 LQ.|.....q.a.Q.A + 40205d10 f83112c1 200df000 54311040 12c1f0c9 .1.. ...T1.@.... + 40205d20 21cd0222 12020c04 32a00102 610301fa !.."....2...a... + 40205d30 ffc00000 015bfdc0 000021b9 ffc26213 .....[....!...b. + 40205d40 0159fdc0 00000831 c82112c1 100df000 .Y.....1.!...... + 40205d50 745c2040 3184ef12 c1f0c921 d9110931 t\ @1......!...1 + 40205d60 dd0222d3 02220214 0c0c2612 0b32d303 ..".."....&..2.. + 40205d70 c20341c2 ccffc0c0 7421a9ff c0cc90d2 ..A.....t!...... + 40205d80 62000147 fdc00000 22a08020 cca0cacd b..G....".. .... + 40205d90 222d4b4b ccc71207 213dfd0c 13324200 "-KK....!=...2B. + 40205da0 c26d4b01 40fdc000 00c02c20 c5f6ffc1 .mK.@....., .... + 40205db0 e8ff21b5 ffc03c20 42a00001 7ef9c000 ..!...< B...~... + 40205dc0 0021b2ff 3d0c0c14 017bf9c0 00000831 .!..=....{.....1 + 40205dd0 c821d811 12c1100d f0000000 12c1f0c2 .!.............. + 40205de0 6102c18f ffd26101 322c1322 2c014213 a.....a.2,.",.B. + 40205df0 02321202 e9010931 d85ce84c 371402c5 .2.....1.\.L7... + 40205e00 f1ff8c7d 32a000e0 2e20c00d 00282cdc ...}2.... ...(,. + 40205e10 32283cec e22188ff 1c830188 ffc00000 2(<..!.......... + 40205e20 860e0000 0000383c 37b219d1 97ff2d0d ......8<7.....-. + 40205e30 0163f8c0 0000382c 0c150c04 d02d2001 .c....8,.....- . + 40205e40 5ef8c000 00d191ff 2d0d015c f8c00000 ^.......-..\.... + 40205e50 383c0c15 0c042d0d 0158f8c0 00000831 8<....-..X.....1 + 40205e60 c821d811 e80112c1 100df000 816dff12 .!...........m.. + 40205e70 c1f0a228 01026103 2092200c 32ccfa99 ...(..a. . .2... + 40205e80 18392849 38595869 68794805 f5ff0c02 .9(I8YXihyH..... + 40205e90 083112c1 100df000 2133ef31 61ff2222 .1......!3.1a."" + 40205ea0 4b322313 12c1f042 13023212 02093137 K2#....B..2...17 + 40205eb0 140285e6 ff083112 c1100df0 212aef12 ......1.....!*.. + 40205ec0 c1f02222 4b026103 c2610245 12fc20c2 ..""K.a..a.E.. . + 40205ed0 202153ff 22221385 11fc0831 20ccc00c !S."".....1 ... + 40205ee0 130c02c0 2383c821 12c1100d f0000000 ....#..!........ + 40205ef0 12c1f00c 440c0309 31c92120 c2200144 ....D...1.! . .D + 40205f00 ecc00000 08310ca2 291cc821 12c1100d .....1..)..!.... + 40205f10 f0000000 42120d21 82fd4063 a42a6672 ....B..!..@c.*fr + 40205f20 06004050 24000540 7080b180 80043028 ..@P$..@p.....0( + 40205f30 c00c140c 09209493 2d093718 1a001540 ..... ..-.7....@ + 40205f40 0044a18c 63704420 46020000 007cf340 .D..cpD F....|.@ + 40205f50 43307044 10424600 0df00000 12c1f0c2 C0pD.BF......... + 40205f60 610230c3 2032a0e0 3a524805 58150931 a.0. 2..:RH.X..1 + 40205f70 5724193a 2238221b 33392222 2c0005e2 W$.:"8".39"",... + 40205f80 220c132d 0c85521c 0c13860b 0032223c "..-..R......2"< + 40205f90 cc63c262 3bc60000 0000c983 52a0ec5a .c.b;.......R..Z + 40205fa0 5268250c 03398c1b 66c91569 251b4442 Rh%..9..f..i%.DB + 40205fb0 62386614 060c13c5 f5ff0c03 08312d03 b8f..........1-. + 40205fc0 c82112c1 100df000 12c1d0d2 610920d2 .!..........a. . + 40205fd0 2022223b e98109b1 c9a1f971 ed0316b2 "";.......q.... + 40205fe0 07c2a0ec cacdf80c 164f0628 8f226100 .........O.(."a. + 40205ff0 ec1e85ec ff8c722d 0fc5c91b 060e0000 ......r-........ + 40206000 0c02298f 21d8ee42 cf203222 74f90342 ..).!..B. 2"t..B + 40206010 62748608 00261e11 21d6f038 9fc02000 bt...&..!..8.. . + 40206020 28023863 3022c0e7 323b222f 0005d722 (.8c0"..2;"/..." + 40206030 32a0012d 0f85471c 22a0e02a 2d38020b 2..-..G."..*-8.. + 40206040 33390228 2c0b2229 2c280129 0c46e5ff 39.(,."),(.).F.. + 40206050 22a0ec2a 2d0c0339 12390239 2222a0e0 "..*-..9.9.9"".. + 40206060 2add0c02 290d08b1 c8a1d891 e881f871 *...)..........q + 40206070 12c1300d f0000000 12c1f0c9 210931cd ..0.........!.1. + 40206080 0248228c 931c0330 2420292c 06070000 .H"....0$ ),.... + 40206090 22afef20 2410226c 020c032d 0c45e7ff ".. $."l...-.E.. + 402060a0 222c388c 520c032d 0cc5f1ff 0831c821 ",8.R..-.....1.! + 402060b0 12c1100d f0000000 b4310040 12c1f0c9 .........1.@.... + 402060c0 21cd03d9 110c43dd 024a2c09 3101faff !.....C..J,.1... + 402060d0 c0000042 a1000c63 2734094c 040c4327 ...B...c'4.L..C' + 402060e0 340232a0 054d020c 0285081c 8c623812 4.2..M.......b8. + 402060f0 3813cac3 c90d0831 c821d811 12c1100d 8......1.!...... + 40206100 f0000000 ece5fe3f 12c1e0c9 61c1fdff .......?....a... + 40206110 0971420c 467c7330 44100c23 30342032 .qB.F|s0D..#04 2 + 40206120 4c46380c e7630246 29003802 97630246 LF8..c.F).8..c.F + 40206130 27002202 0685c9fb 1642090c 02224c92 '."......B..."L. + 40206140 222c00d7 620522a0 01224c92 2186ee0c ",..b.".."L.!... + 40206150 05284238 02220c92 f622142a 4c420490 .(B8."...".*LB.. + 40206160 1b626060 74dcf42d 060c1546 faff0000 .b``t..-...F.... + 40206170 16c50586 02000000 00261428 220c921b .........&.("... + 40206180 22224c92 06120000 8c15224c 926624e8 ""L......."L.f$. + 40206190 41aaef0c 120c0729 016d075d 0432c333 A......).m.].2.3 + 402061a0 2d07c608 00d06211 2a46c044 a0722412 -.....b.*F.D.r$. + 402061b0 1687fc6d 0441a0ef 0c122901 70707462 ...m.A....).pptb + 402061c0 c64c5d04 32c3330c 024596fc 06ebff00 .L].2.3..E...... + 402061d0 0871c861 12c1200d f0000000 de012340 .q.a.. .......#@ + 402061e0 12c1f0d9 11d15fee 0931c921 e901c22d ......_..1.!...- + 402061f0 5facfc22 2c00226d 5f565200 216af722 _..",."m_VR.!j." + 40206200 6d6028fc e1f6ff8c 9242a446 3d0e01be m`(......B.F=... + 40206210 ecc00000 42a4473d 0e2d0c01 bbecc000 ....B.G=.-...... + 40206220 0046f2ff 0831c821 d811e801 12c1100d .F...1.!........ + 40206230 f0000000 b8682040 f0e5fe3f a8682040 .....h @...?.h @ + 40206240 04e6fe3f 12c1f0c9 21cd0221 aeff0931 ...?....!..!...1 + 40206250 291c7cf3 32429332 a07839c2 39d232a1 ).|.2B.2.x9.9.2. + 40206260 6839e231 f4ff21f4 ff0c0401 52f8c000 h9.1..!.....R... + 40206270 0021f3ff 31f2ff42 a000014e f8c00000 .!..1..B...N.... + 40206280 0c02226c 73083122 a1cc2a2c 226c74c8 .."ls.1"..*,"lt. + 40206290 2112c110 0df00000 e8cefe3f e3cefe3f !..........?...? + 402062a0 d5012340 cf012340 c7012340 12c1d0c2 ..#@..#@..#@.... + 402062b0 610ac12c eed26109 e2610809 b1f97120 a..,..a..a....q + 402062c0 e07422dc 015d033d 044202df dd0207e4 .t"..].=.B...... + 402062d0 02063f00 663e1521 25f72202 0026120c ..?.f>.!%."..&.. + 402062e0 21eeff0c 04424200 2d0585b2 1a22dc02 !....BB.-....".. + 402062f0 32021466 33112202 0016b200 21e8ff22 2..f3.".....!.." + 40206300 02006612 02063200 284c2202 d2665202 ..f...2.(L"..fR. + 40206310 862c0022 0ddf07e2 02462a00 45a81a66 .,.".....F*.E..f + 40206320 12020628 002111f7 22020066 12020625 ...(.!.."..f...% + 40206330 000120f7 c00000c1 d8fffd02 220c0031 .. ........."..1 + 40206340 0ff7d105 f4b62218 0c222243 0022af38 ......"..""C.".8 + 40206350 225d0021 d3ff013d efc00000 0c028610 "].!...=........ + 40206360 0066121b 21d0ff32 61000138 efc00000 .f..!..2a..8.... + 40206370 38010c12 2243000c 02225d00 86070000 8..."C..."]..... + 40206380 22a00022 43002105 f7c02000 32220021 ".."C.!... .2".! + 40206390 c6ff3030 31325d00 012defc0 0000220c ..0012]..-....". + 402063a0 0022c201 224c00c1 f2f60c02 224c0032 .".."L......"L.2 + 402063b0 9d00220f 06050510 21f0f632 1d003252 ..".....!..2..2R + 402063c0 000c1222 4c00663e 0721b3ff 0c033242 ..."L.f>.!....2B + 402063d0 0008b1c8 a1d891e8 81f87112 c1300df0 ..........q..0.. + 402063e0 12c1f021 48ff0931 32024607 631f0c03 ...!H..12.F.c... + 402063f0 32424632 42471011 204589ff 2191ff01 2BF2BG.. E..!... + 40206400 eff6c000 00218cff 01edf6c0 00000831 .....!.........1 + 40206410 12c1100d f0000000 80e6fe3f 3d0221fe ...........?=.!. + 40206420 ff12c1f0 42a00602 610301fa eac00000 ....B...a....... + 40206430 2135ff0c 1332429a 083112c1 100df000 !5...2B..1...... + 40206440 2131ff0c 0332429a 0df00000 312eff22 !1...2B.....1.." + 40206450 439b0df0 412cff29 d439c40d f0000000 C...A,.).9...... + 40206460 3129ff29 e30df000 12c1d0d9 91f97109 1).)..........q. + 40206470 b1c9a1e9 8120d074 6d034040 7450f074 ..... .tm.@@tP.t + 40206480 f63d35e1 20ff661f 2ad0cdb0 e0cc11ca .=5. .f.*....... + 40206490 2ec2c24c 4262122c 032d0c49 11626100 ...LBb.,.-.I.ba. + 402064a0 01e7fdc0 00006801 48113d06 2d0c01d9 ......h.H.=.-... + 402064b0 eac00000 dadef24d 9008b1c8 a1d891e8 .......M........ + 402064c0 81f87112 c1300df0 202074f6 3219410d ..q..0.. t.2.A. + 402064d0 ff32a090 2a543a35 2022b00c 05524300 .2..*T:5 "...RC. + 402064e0 4022a00c 03326212 0df00000 90e10040 @"...2b........@ + 402064f0 a8bf0040 12c1b0d2 61112c14 dd020c03 ...@....a.,..... + 40206500 2d010261 13c26112 e26110f2 610f01f7 -..a..a..a..a... + 40206510 ffc00000 9c6df193 ed0c0ced 0f060100 .....m.......... + 40206520 1bccc0c0 7422de03 22024827 3c060c12 ....t"..".H'<... + 40206530 06130000 00f65cf5 2c140c03 10212001 ......\.,....! . + 40206540 b4eac000 00222fd3 1b22b622 0e22a350 ....."/..".".".P + 40206550 2a3f2c04 2d0101af eac00000 2d010194 *?,.-.......-... + 40206560 f7c00000 4d023d01 2d0d01e1 ffc00000 ....M.=.-....... + 40206570 f2cf6456 92facace e2a6a7ea cc220c00 ..dV.........".. + 40206580 022113c2 2112d221 11e22110 f8f112c1 .!..!..!..!..... + 40206590 500df000 a682fe3f 30307417 722a0ce2 P......?00t.r*.. + 402065a0 3732390b 2341fbff 2020749c 122a540b 729.#A.. t..*T. + 402065b0 65620600 0b226245 00202074 c6faff00 eb..."bE. t.... + 402065c0 32440086 05000000 0031f2ff 0c020ce4 2D.......1...... + 402065d0 1b222020 74224300 1b334792 f20c020d ." t"C..3G..... + 402065e0 f0000000 bd012340 fccefe3f c8952040 ......#@...?.. @ + 402065f0 12c1d0d9 91d15bed 09b1284d c9a12901 ......[...(M..). + 40206600 281de981 f971c1bf fe220244 ed032911 (....q...".D..). + 40206610 380c21f4 ff3921f8 fc018cee c0000031 8.!..9!........1 + 40206620 52ed6cf2 c0200048 03202410 c0200029 R.l.. .H. $.. .) + 40206630 034586ff c55eff42 0c467ca2 2024100c .E...^.B.F|. $.. + 40206640 03224c46 21fdfe39 0c324c47 3931015b ."LF!..9.2LG91.[ + 40206650 f6c00000 383139fc 38012223 1166520c ....819.8."#.fR. + 40206660 280d0c03 4222ed0c 22c60100 0042a000 (...B".."....B.. + 40206670 3d042d04 85bb1c1c 4322a100 85f1ff22 =.-.....C"....." + 40206680 dd013202 df4d0207 631a2811 66321521 ..2..M..c.(.f2.! + 40206690 37f62202 0026120c 38212d0e 42610345 7."..&..8!-.Ba.E + 402066a0 791a4221 0316bf08 2204df07 62153811 y.B!...."...b.8. + 402066b0 66331021 2ef62202 00261207 2d0ec56e f3.!.."..&..-..n + 402066c0 1a860600 222c1031 37f63792 0c0c0222 ....",.17.7...." + 402066d0 4c9b3d0e 222d5f46 00003d0e c00f0005 L.=."-_F..=..... + 402066e0 b0ff21c1 ff320200 26130a28 4d2202d0 ..!..2..&..(M".. + 402066f0 26326d46 0f00fcae 32a00032 42002221 &2mF....2..2B."! + 40206700 00e2c204 2d0e012d f6c00000 38012843 ....-..-....8.(C + 40206710 ccb231b6 ff0c042d 0e0126f7 c0000085 ..1....-..&..... + 40206720 420c6612 0e0c150c 0432a064 2d0e0122 B.f......2.d-.." + 40206730 f6c00000 0c22224c 44052c0b 66321601 .....""LD.,.f2.. + 40206740 1df6c000 00858afb d2dd0332 0d413712 ...........2.A7. + 40206750 040c0245 7d0cc552 188cb285 77198601 ...E}..R....w... + 40206760 00169ef9 06f3ff00 08b1c8a1 d891e881 ................ + 40206770 f87112c1 300df000 786a2040 08612040 .q..0...xj @.a @ + 40206780 12c1d0c9 a1c15ffe f97109b1 d991e981 ......_..q...... + 40206790 220c9332 a0ff0c0f 371210f1 f2ec2022 "..2....7..... " + 402067a0 9032a080 3022a0fa 22f2c204 0cd5220c .2..0"..".....". + 402067b0 4527b502 06350031 77ff61ea ec2a23d2 E'...5.1w.a..*#. + 402067c0 0200e2a0 800bddf0 3d11da23 e0e2a022 ........=..#..." + 402067d0 d6012202 356aee4b ee4d0626 1211da23 ..".5j.K.M.&...# + 402067e0 4022a022 22212020 14263228 06150000 @".""! .&2(.... + 402067f0 d0238060 22a02202 8a326100 62610259 .#.`"."..2a.ba.Y + 40206800 31691105 5afb3801 48215831 6811bc22 1i..Z.8.H!X1h.." + 40206810 86f2ff00 00280cb7 62056226 4b671e23 .....(..b.b&Kg.# + 40206820 f76202f7 9e1d07f2 0f520c45 1b55524c .b.......R.E.URL + 40206830 45e7621b 460c0000 00da6340 66a06226 E.b.F.....c@f.b& + 40206840 219766e4 220c451b 22224c45 86d7ff00 !.f.".E.""LE.... + 40206850 d0d38040 dda0220d 8a4557fb 16920032 ...@.."..EW....2 + 40206860 2c0d48cc c6010000 00322c0e 30432052 ,.H......2,.0C R + 40206870 0c4622a0 08202520 61c0ff51 c0ff224c .F".. % a..Q.."L + 40206880 467d0e2d 0e455eff 46020000 32a00030 F}.-.E^.F...2..0 + 40206890 2320c5d5 ff02210b c8a1d891 e881f871 # ....!........q + 402068a0 12c1300d f0000000 12c1f009 3105edff ..0.........1... + 402068b0 083112c1 100df000 12c1f021 12fe0931 .1.........!...1 + 402068c0 32024607 63330ca4 4703140c 04215afe 2.F.c3..G....!Z. + 402068d0 52a00140 342001b8 f5c00000 86060000 R..@4 .......... + 402068e0 38029763 0e38b221 54fe0c15 0c0401b2 8..c.8.!T....... + 402068f0 f5c00000 10112085 e8ff0831 12c1100d ...... ....1.... + 40206900 f0000000 cccefe3f 4c6a2040 f8cefe3f .......?Lj @...? + 40206910 f4cefe3f f0cefe3f eccefe3f f0652040 ...?...?...?.e @ + 40206920 12c1d0c2 610ac1f7 ffd991dd 022d0c09 ....a........-.. + 40206930 b1e981f9 715901fd 0430e074 01a0f5c0 ....qY...0.t.... + 40206940 000031f1 ff42a000 c02c2001 9af6c000 ..1..B..., ..... + 40206950 00053318 16020405 3c19fc72 0c128562 ..3.....<..r...b + 40206960 192d0c01 96f5c000 0021e8ff 3801d902 .-.......!..8... + 40206970 21e8ff0c 15e24200 21e7ff0c 04f90221 !.....B.!......! + 40206980 e6ff3902 0ca32d0c 018cf5c0 00007cf3 ..9...-.......|. + 40206990 86290000 00c54f19 85e21756 2200c5b3 .)....O....V"... + 402069a0 17c170ec 284c3202 d0661311 31d6fd32 ..p.(L2..f..1..2 + 402069b0 03460763 08310cff 42a00142 43004b22 .F.c.1..B..BC.K" + 402069c0 017ff5c0 0000284c 3109ff0c 044b2201 ......(L1....K". + 402069d0 79f6c000 0085a0ff 31d1ff0c 042d0e05 y.......1....-.. + 402069e0 2fff7cf3 26325248 013d0f2d 0ec58bff /.|.&2RH.=.-.... + 402069f0 315eec1c 02c02000 48032024 20c02000 1^.... .H. $ . . + 40206a00 290321c0 fd3801e2 42443262 100c13f9 ).!..8..BD2b.... + 40206a10 f2d90232 4246c7ed 0a0c0387 ed023202 ...2BF........2. + 40206a20 93324245 857bff22 2c0032a0 00222200 .2BE.{.",.2.."". + 40206a30 1762062d 0305e8ff 0c0308b1 2d03c8a1 .b.-........-... + 40206a40 d891e881 f87112c1 300df000 21b3ff12 .....q..0...!... + 40206a50 c1f05222 0021afff 02610342 220021ac ..R".!...a.B".!. + 40206a60 ff320200 21aaff28 0245ebff 083112c1 .2..!..(.E...1.. + 40206a70 100df000 f0e0fe3f 12c1f0c9 21c1a1fd .......?....!... + 40206a80 0931d911 e901220c 4642aff7 37e20417 .1....".FB..7... + 40206a90 62077cd4 40221022 4c46d132 ec22dd06 b.|.@"."LF.2.".. + 40206aa0 2202acdc 22220c46 27620d22 0c47cc72 "..."".F'b.".G.r + 40206ab0 0c032d03 86070000 0016f301 21dffd01 ..-.........!... + 40206ac0 3ff5c000 00320c46 22affb20 2310224c ?....2.F".. #."L + 40206ad0 4632a001 0c0285b1 ff061600 222c0087 F2..........",.. + 40206ae0 623921d5 fde2a000 0135f5c0 0000853a b9!......5.....: + 40206af0 ff21d3fd 52a0010c 041ce301 2ff5c000 .!..R......./... + 40206b00 00c1dcff 222d73ac a2388232 6d735623 ...."-s..8.2msV# + 40206b10 00c26d74 e9820518 1bc6f9ff 97e20821 ..mt...........! + 40206b20 c6fd0126 f5c00000 280d2802 07e20246 ...&....(.(....F + 40206b30 dfff4536 ff0831c8 21d811e8 0112c110 ..E6..1.!....... + 40206b40 0df00000 3170fd0b 22224393 0df00000 ....1p..""C..... + 40206b50 216dfd28 020df000 ffbfffff b9012340 !m.(..........#@ + 40206b60 00400000 12c1f0c2 6102c222 000c1209 .@......a..".... + 40206b70 3185a11a 31fceb48 73dcf221 f7ff2024 1...1..Hs..!.. $ + 40206b80 10226307 21f6ff01 31edc000 000c054d ."c.!...1......M + 40206b90 050c332d 0c85d8ff 06020000 21f1ff20 ..3-........!.. + 40206ba0 24202973 0831c821 12c1100d f0000000 $ )s.1.!........ + 40206bb0 e0cefe3f 982a0040 12c1b0c2 6112c187 ...?.*.@....a... + 40206bc0 fd404074 f9f12981 4991fd03 42a49b3d .@@t..).I...B..= + 40206bd0 0c5c02d2 6111e261 10026113 50d52001 .\..a..a..a.P. . + 40206be0 1cedc000 00ed0216 521c222f 14acb242 ........R."/...B + 40206bf0 a4a23d0c 1cb20116 edc00000 29feccf2 ..=.........)... + 40206c00 42a4a43d 0c2d0e01 40eac000 00c66700 B..=.-..@.....g. + 40206c10 00322f14 1cb401ff e8c00000 220f5442 .2/.........".TB + 40206c20 a006224e 40222108 32c20a4b 2e01f9e8 .."N@"!.2..K.... + 40206c30 c0000028 9f05c904 66120622 4e340605 ...(....f.."N4.. + 40206c40 00000c02 224e3438 9fab2e42 03012b33 ...."N48...B..+3 + 40206c50 01d9ffc0 0000289f 22020122 4e2a220f ......(.".."N*". + 40206c60 04d25e1b 224e2b28 910c0d22 4e2c221f ..^."N+(..."N,". + 40206c70 2bcd0d22 5e1c28df d7121d32 02014d01 +.."^.(....2..M. + 40206c80 2b33850a 072811c8 0105c104 d831226e +3...(.......1"n + 40206c90 11282185 c004226e 1228efac 12320201 .(!..."n.(...2.. + 40206ca0 4d0132c3 02450807 2801d831 20cc2028 M.2..E..(..1 . ( + 40206cb0 1185be04 226e1122 210205be 04226e12 ...."n."!...."n. + 40206cc0 7cd2278d 32261c23 e62c048c ccc60c00 |.'.2&.#.,...... + 40206cd0 262c1d66 3c2d0c42 86090022 1f034762 &,.f<-.B..."..Gb + 40206ce0 040c12c6 06000c02 86050000 0c220604 .............".. + 40206cf0 000c32c6 02000000 661d08c0 c0148c2c ..2.....f......, + 40206d00 0c5229ce 222f138c 92322e13 0c822023 .R)."/...2.... # + 40206d10 20226e13 48af0c72 16540438 bf160304 "n.H..r.T.8.... + 40206d20 722f1082 04016d04 0c0392a0 820c2a0c r/....m.......*. + 40206d30 1b4026c0 87a21d22 06029792 06b03320 .@&...."......3 + 40206d40 06030000 202064a0 c32022c2 f4203c83 .... d.. ".. <. + 40206d50 1b66c6f6 ff0c2220 23208c37 0c622023 .f...." # .7.b # + 40206d60 20622e13 7ce42030 04406610 3066200c b..|. 0.@f.0f . + 40206d70 23306620 2022047c b4001340 0032a140 #0f ".|...@.2.@ + 40206d80 26103022 20226e13 0146f9c0 00000c02 &.0" "n..F...... + 40206d90 290e2174 eb322260 e2630031 85ffe262 ).!t.2"`.c.1...b + 40206da0 60221300 22c20122 5300013e f9c00000 `"..".."S..>.... + 40206db0 022113c2 2112d221 11e22110 f8f112c1 .!..!..!..!..... + 40206dc0 500df000 dae1fe3f e2cefe3f 67e1fe3f P......?...?g..? + 40206dd0 a5012340 c9e1fe3f 24e5fe3f 12c1d0e2 ..#@...?$..?.... + 40206de0 6108e160 ebc2610a f2610709 b1d991fd a..`..a..a...... + 40206df0 03320e18 cd020c12 66230246 6700d89f .2......f#.Fg... + 40206e00 2d0d45ac 048cc2d2 de02220d b5261223 -.E......."..&.# + 40206e10 460c0000 00422e86 220d0127 1402c658 F....B.."..'...X + 40206e20 0021e9ef 2b3d017d ebc00000 56521506 .!..+=.}....VR.. + 40206e30 f5ff0000 21e4ff0c 6432cc10 0178ebc0 ....!...d2...x.. + 40206e40 000056f2 13221f03 17620286 4d00484e ..V.."...b..M.HN + 40206e50 2204d266 620df02f 20850501 20207446 "..fb../ ... tF + 40206e60 4e000000 322414c1 d8ff22af ef202310 N...2$....".. #. + 40206e70 22641432 0c0022a0 01224d3c 224d3d22 "d.2..".."M<"M=" + 40206e80 a000224d 3e224d3f 224d4022 4d41c023 .."M>"M?"M@"MA.# + 40206e90 11303034 30222020 207438ef 224c009c .0040" t8."L.. + 40206ea0 b3322414 1c022023 20226414 2d0f45f1 .2$... # "d.-.E. + 40206eb0 00320c00 7c022033 100c3206 3000322f .2..|. 3..2.0.2/ + 40206ec0 0d160302 32241422 a0102023 20226414 ....2$.".. # "d. + 40206ed0 2d0f45de 00320c00 7c022033 100c2206 -.E..2..|. 3..". + 40206ee0 27000000 00421f03 31bcff47 e4028626 '....B..1..G...& + 40206ef0 002203a6 66120286 220021b4 ff012cf5 ."..f...".!...,. + 40206f00 c0000022 610021b1 ff103120 85d10620 ..."a.!...1 ... + 40206f10 f22031ae ffdc1221 aeff014c ecc00000 . 1....!...L.... + 40206f20 284e0c23 3242d286 16002801 6652060c (N.#2B....(.fR.. + 40206f30 72060200 00000cd3 3792040c 82224d3e r.......7...."M> + 40206f40 d1a5ff1c 032d0d01 3dfbc000 0048013d .....-..=....H.= + 40206f50 0f2d0d01 30e8c000 0031a0fc 42a42af0 .-..0....1..B.*. + 40206f60 2f200169 e9c00000 384e1c02 42231420 / .i....8N..B#. + 40206f70 24202263 14320c00 7c022033 100c1220 $ "c.2..|. 3... + 40206f80 23204604 000c0246 04000000 3203a626 # F....F....2..& + 40206f90 13f27c03 30221022 4c000c12 08b1c8a1 ..|.0"."L....... + 40206fa0 d891e881 f87112c1 300df000 5ce6fe3f .....q..0...\..? + 40206fb0 e68bfe3f 34e6fe3f 9c012340 b82a0040 ...?4..?..#@.*.@ + 40206fc0 12c190c2 611ad261 19e26118 f2611702 ....a..a..a..a.. + 40206fd0 611bdd02 2892c14b fcf82228 4d404074 a...(..K.."(M@@t + 40206fe0 22020049 f129c180 22012028 3129e122 "..I.)..". (1)." + 40206ff0 0c9bed03 56d20022 2309c58c 04661204 ....V.."#....f.. + 40207000 0c0346d8 00420e04 2d0f4261 1005fefa ..F..B..-.Ba.... + 40207010 4221107c f3271402 c6d20028 1d281229 B!.|.'.....(.(.) + 40207020 d128fc16 9205222c 10163205 31ceea28 .(....",..2.1..( + 40207030 d152235f ab629cf5 3d0622c5 0442a006 .R#_.b..=."..B.. + 40207040 52611062 611101f5 eac00000 52211062 Ra.ba.......R!.b + 40207050 2111aca2 580506f7 ff220c46 07622022 !...X....".F.b " + 40207060 0c912612 0206a600 322e0922 0c9a4203 ..&.....2.."..B. + 40207070 01261202 069c0022 2c1b4792 02c69300 .&.....",.G..... + 40207080 31b9ea22 d3012202 de661202 06dcff22 1..".."..f....." + 40207090 237a8c72 38028c33 2d0ec003 0051b1ea #z.r8..3-....Q.. + 402070a0 22258616 a21a289e 16521a22 0c446632 "%....(..R.".Df2 + 402070b0 02066700 58d152c5 102d0559 c1c58002 ..g.X.R..-.Y.... + 402070c0 dd028ce2 2142ff01 baf4c000 00e61247 ....!B.........G + 402070d0 46130000 389e51a3 ea420301 22258647 F...8.Q..B.."%.G + 402070e0 120e31a0 ea22d302 2202b5dc 32065800 ..1..".."...2.X. + 402070f0 002135ef 2b3301c9 eac00000 1642fcc6 .!5.+3.......B.. + 40207100 f7ff38c1 2130ff42 a00601c4 eac00000 ..8.!0.B........ + 40207110 1602fb86 4e000000 221e0347 e202c64b ....N..."..G...K + 40207120 0048f128 d13d0e45 cbff16a2 12389e2d .H.(.=.E.....8.- + 40207130 01420301 2b33019f fec00000 289e58e1 .B..+3......(.X. + 40207140 2202010c 032a2152 c5a03242 0059e156 "....*!R..2B.Y.V + 40207150 5d07211d ff3d0542 020028c1 40403485 ].!..=.B..(.@@4. + 40207160 90020c03 dd023792 02867e00 32a13401 ......7...~.2.4. + 40207170 b3fac000 00320f08 0c822023 20224f08 .....2.... # "O. + 40207180 f26d2685 6c0038e1 0c242d0d c580040c .m&.l.8..$-..... + 40207190 040ca32d 0d059802 0c040c53 2d0dc585 ...-.......S-... + 402071a0 0448d13d 0e2d0dc5 a10248f1 2d0d3d0e .H.=.-....H.-.=. + 402071b0 05a40221 7fff2202 008c322d 0dc55600 ...!.."...2-..V. + 402071c0 2d0d4576 02061200 f26d2605 680038e1 -.Ev.....m&.h.8. + 402071d0 0c242d0d 457c040c 140c632d 0d859302 .$-.E|....c-.... + 402071e0 2d0d0c04 0c534581 04286e8c a2320202 -....SE..(n..2.. + 402071f0 324d2322 0203224d 2242210f d02d203d 2M#".."M"B!..- = + 40207200 0e059f02 216bff22 02008c32 2d0dc551 ....!k."...2-..Q + 40207210 003154ea 22d30222 02b59c82 38c121e9 .1T.".."....8.!. + 40207220 fe0c6401 7eeac000 00cc9232 0c460c42 ..d.~......2.F.B + 40207230 20232022 4c46280c a7620a32 0c460c42 # "LF(..b.2.F.B + 40207240 20232022 4c46320d 060c4220 2320224d # "LF2...B # "M + 40207250 06d158ff 46120000 165dff21 57ff017b ..X.F....].!W..{ + 40207260 ebc00000 5140ea28 45222211 5692002d ....Q@.(E"".V..- + 40207270 0d457702 06010000 00c55f0b 320d0622 .Ew......._.2.." + 40207280 affb2023 10224d06 c58b0b66 12c28533 .. #."M....f...3 + 40207290 0206efff 389edc23 c2cc24c7 9d028657 ....8..#..$....W + 402072a0 ff422c12 1604ff46 faff0000 22030127 .B,....F...."..' + 402072b0 94e52b33 22cc4c01 59eac000 003d0256 ..+3".L.Y....=.V + 402072c0 52fd420f 080c4220 2420224f 08862500 R.B...B $ "O..%. + 402072d0 2137ff2b 33626111 0139ffc0 00006221 !7.+3ba..9....b! + 402072e0 1156b2d9 c6070000 222c1b47 12028663 .V......",.G...c + 402072f0 ff212eff 2b330131 ffc00000 86050000 .!..+3.1........ + 40207300 00220c9a 66124121 44fc42a0 06603620 ."..f.A!D.B..`6 + 40207310 0143eac0 00005662 d652210c 28d142c5 .C....Vb.R!.(.B. + 40207320 a0804401 621f0252 9d0c4048 313d0e85 ..D.b..R..@H1=.. + 40207330 88ff280c a7e20246 51ff320c 460c4220 ..(....FQ.2.F.B + 40207340 2320224c 46c64dff 0052210c 621f0242 # "LF.M..R!.b..B + 40207350 c5a08044 01529d0c 22210d40 4831e03e ...D.R.."!.@H1.> + 40207360 204585ff 0646ff02 211b2d03 c2211ad2 E...F..!.-..!.. + 40207370 2119e221 18f22117 12c1700d f0000000 !..!..!...p..... + 40207380 e801cbfe 4202013d 020c02b6 442b2b63 ....B..=....D++c + 40207390 52030232 03032206 02803311 50432000 R..2.."...3.PC . + 402073a0 22114032 20220603 0c148022 01302220 ".@2 ".....".0" + 402073b0 31f4ff3a 320c0230 24830df0 0050f200 1..:2..0$....P.. + 402073c0 0050f204 0050f205 52020172 02004202 .P...P..R..r..B. + 402073d0 02805511 00441170 65206054 20420203 ..U..D.pe `T B.. + 402073e0 0c128044 01504420 518ef457 143e4735 ...D.PD Q..W.>G5 + 402073f0 1251f2ff 0c025714 332188f4 27141506 .Q....W.3!..'... + 40207400 0a000000 51efff0c 32571420 21eeff27 ....Q...2W. !..' + 40207410 140b4605 000c629c 230c5246 01000c62 ..F...b.#.RF...b + 40207420 8c930cd2 2243000c 620df02c 020df000 ...."C..b..,.... + 40207430 000fac02 000fac00 000fac01 000fac04 ................ + 40207440 000fac05 000fac03 52020172 02004202 ........R..r..B. + 40207450 02805511 00441170 65206054 20420203 ..U..D.pe `T B.. + 40207460 0c128044 01504420 51f2ff57 14464735 ...D.PD Q..W.FG5 + 40207470 1251f0ff 0c025714 3b21efff 27141d06 .Q....W.;!..'... + 40207480 0c000000 51eeff0c 32571428 21edff27 ....Q...2W.(!..' + 40207490 141331ec ff0c2237 141a4605 000c629c ..1..."7..F...b. + 402074a0 230c5246 01000c62 8c930cd2 2243000c #.RF...b...."C.. + 402074b0 620df02c 020df000 42020162 02003202 b..,....B..b..2. + 402074c0 02804411 00331160 54205043 20320203 ..D..3.`T PC 2.. + 402074d0 0c128033 01403320 41d8ff47 130d21d4 ...3.@3 A..G..!. + 402074e0 ff0c0420 33c022a0 02302493 0df00000 ... 3."..0$..... + 402074f0 ef012340 12c1f028 02c92109 31d91122 ..#@...(..!.1.." + 40207500 0239cd03 47e20c16 d3033023 20858319 .9..G.....0# ... + 40207510 060d0000 32130b42 a00222a0 03458f21 ....2..B.."..E.! + 40207520 dd02281c 4d0d2812 0c03291d d90cc94d ..(.M.(...)....M + 40207530 1cc2013d f4c00000 8cc221ed ff01c3ea ...=......!..... + 40207540 c000002d 0d858521 0831c821 d81112c1 ...-...!.1.!.... + 40207550 100df000 800cffff 7fc8ffff 12c1d0d9 ................ + 40207560 9109b1dd 02c9a140 40f4eb25 27b40a2d .......@@..%'..- + 40207570 0d457d19 0c024632 00004d05 2d0101a5 .E}...F2..M.-... + 40207580 e6c00000 581d22a0 aac81532 0c002793 ....X."....2..'. + 40207590 5f320c01 27935922 0c026632 53220c03 _2..'.Y"..f2S".. + 402075a0 56d20422 0c045672 04220c05 56120422 V.."..Vr."..V.." + 402075b0 0c07320c 06802211 30222031 e6ff3a32 ..2...".0" 1..:2 + 402075c0 acd331e5 ff3a22ac 62221d0b 42ccfa49 ..1..:".b"..B..I + 402075d0 156b2222 5d0b220c 07320c06 80221130 .k""]."..2...".0 + 402075e0 2220224c 06202841 224c07cd 04460300 " "L. (A"L...F.. + 402075f0 0022ccf2 2915221d 0beb2222 5d0b2201 ."..)."...""].". + 40207600 01202014 2612209c 52662234 0c644b31 . .&. .Rf"4.dK1 + 40207610 2d0c0180 e6c00000 0c6432c1 10060600 -........d2..... + 40207620 0c644b31 46010000 0c6432c1 102d0c01 .dK1F....d2..-.. + 40207630 79e6c000 000c64ab 314a2c01 76e6c000 y.....d.1J,.v... + 40207640 002d0d08 b1c8a1d8 9112c130 0df00000 .-.........0.... + 40207650 df84fe3f 12c1f030 30741622 078c330c ...?...00t."..3. + 40207660 33861100 31fbff42 03005203 01424100 3...1..B..R..BA. + 40207670 42030232 03034241 02420267 52410132 B..2..BA.B.gRA.2 + 40207680 4103f654 233d024a 42371417 6203680c A..T#=.JB7..b.h. + 40207690 05606064 5a717207 0067172d 1b556645 .``dZqr..g.-.UfE + 402076a0 f2060100 0c134600 000c2332 4225312d ......F...#2B%1- + 402076b0 e9420225 32d30532 231447b3 06324226 .B.%2..2#.G..2B& + 402076c0 06030000 42422646 01001b33 46eeff00 ....BB&F...3F... + 402076d0 12c1100d f0000000 00cffe3f 04cffe3f ...........?...? + 402076e0 fdcefe3f 20207432 a08127b3 0631faff ...? t2..'..1.. + 402076f0 86010000 31faff20 21414803 27b40129 ....1.. !AH.'..) + 40207700 0331f7ff 2203001b 22224300 0df00000 .1.."...""C..... + 40207710 6483fe3f 8483fe3f 0c83fe3f 6483fe3f d..?...?...?d..? + 40207720 08cffe3f b482fe3f 0c83fe3f 12c1e0f9 ...?...?...?.... + 40207730 31fd0221 0ce90971 c961d951 e94122d2 1..!...q.a.Q.A". + 40207740 0132a001 3242fe22 0f266612 26c1f0ff .2..2B.".&f.&... + 40207750 d1f1ffe1 e1ff322c 00222e00 27930c32 ......2,."..'..2 + 40207760 a000420c 040c352d 03c5061b 8bccc79d ..B...5-........ + 40207770 e4c63100 d1daff66 224d280d 0c932733 ..1....f"M(...'3 + 40207780 2221d5ff 380222a0 96279317 42a00052 "!..8."..'..B..R + 40207790 a0034034 202d0405 041b0c12 224f2646 ..@4 -......"O&F + 402077a0 26000000 c1ddffe1 ddff322c 00222d00 &.........2,."-. + 402077b0 27930c42 0c0452a0 0a0c030c 1285011b '..B..R......... + 402077c0 8bccc79e e4c61c00 51d6ff28 0d48050c ........Q..(.H.. + 402077d0 93ed0547 b2314733 0a21bfff 380222a0 ...G.1G3.!..8.". + 402077e0 962713a7 c1d0ffd1 d0ff322c 00222e00 .'........2,.".. + 402077f0 27930c42 0c0452a0 0b0c030c 2285fd1a '..B..R....."... + 40207800 8bccc79d e4c60c00 27330d21 b3ff3802 ........'3.!..8. + 40207810 22a09627 930286dc ffc1bfff 0c2e380c "..'..........8. + 40207820 280d2793 0e420c04 0ca50c03 0c1285fa (.'..B.......... + 40207830 1ae24f26 21baff8b ccc792e1 0871c861 ..O&!........q.a + 40207840 d851e841 f83112c1 200df000 31a4ff0c .Q.A.1.. ...1... + 40207850 02290331 b3ff2903 31a0ff29 030df000 .).1..).1..).... + 40207860 12c1d0d2 6109e261 08f971dd 02ed03fd ....a..a..q..... + 40207870 040c031c 0422c267 c9a10261 0b01e4e5 .....".g...a.... + 40207880 c00000c1 b8e831b7 e822032c 303cc027 ......1..".,0<.' + 40207890 a32e720c 2d3d0f4d 072d0e79 01850404 ..r.-=.M.-.y.... + 402078a0 78019c62 320d671b 23202074 224d673a x..b2.g.# t"Mg: + 402078b0 3d724368 2a2d2202 6785e2ff 1bcc06f1 =rCh*-".g....... + 402078c0 ff08b10c 02c8a1d8 91e881f8 7112c130 ............q..0 + 402078d0 0df00000 f5012340 12c1f0c9 21cd0222 ......#@....!.." + 402078e0 22170931 56420131 fbff52a0 0042a247 "..1VB.1..R..B.G + 402078f0 22a08001 04e7c000 00226c17 322c1708 "........"l.2,.. + 40207900 310c020c 14302493 c82112c1 100df000 1....0$..!...... + 40207910 18fe3403 18fe34dd 18fe3405 00904c33 ..4...4...4...L3 + 40207920 00904c34 12c1c0c9 e1cd0228 12e9c1e8 ..L4.......(.... + 40207930 12d9d1ab 2ef9b109 f1290329 01221c0b .........).).".. + 40207940 f2ce18dd 032a3f39 21594132 a00b4040 .....*?9!YA2..@@ + 40207950 74272304 0c12c6d3 0032a058 d02d2042 t'#......2.X.- B + 40207960 610501b6 f8c00000 2801f97d 290d221e a.......(..}).". + 40207970 10f2ce24 225d0522 1e11225d 03289c28 ...$"].".."].(.( + 40207980 22c566fa 38212020 74224d05 224d0448 ".f.8! t"M."M.H + 40207990 51f023c0 295d0c23 0c024032 83f94d39 Q.#.)].#..@2..M9 + 402079a0 31291138 21f023c0 e6220246 4e00e20f 1).8!.#..".FN... + 402079b0 011b3e27 a39d220f 002c5337 12652733 ..>'.."..,S7.e'3 + 402079c0 22263267 f6420d16 92042612 02064300 "&2g.B....&...C. + 402079d0 f9adc641 0026525c 26720286 3f00f98d ...A.&R\&r..?... + 402079e0 463e0000 3c033712 6f27330f 2ca33712 F>..<.7.o'3.,.7. + 402079f0 522cd337 92020638 00063800 3cd33712 R,.7...8..8.<.7. + 40207a00 5e32a0dd 37125e3c 23371202 463300f9 ^2..7.^<#7..F3.. + 40207a10 bd063200 28115632 0c0c13f9 9d391186 ..2.(.V2.....9.. + 40207a20 2e000000 f26d1286 2c000000 220f0222 .....m..,...".." + 40207a30 4d04c629 00284cf9 6d202fc0 224d0c86 M..).(L.m /."M.. + 40207a40 26000000 261e0286 2400320f 0222a100 &...&...$.2..".. + 40207a50 20232022 5d04c620 00f9ed86 1f000000 # "].. ........ + 40207a60 f26d1186 1d00f64e 02465500 2b2f4202 .m.....N.FU.+/B. + 40207a70 01720f02 32020280 44110033 11705420 .r..2...D..3.pT + 40207a80 50432032 02038033 01403320 41e4f247 PC 2...3.@3 A..G + 40207a90 1302c63c 00f9dd86 10000000 b64e0246 ...<.........N.F + 40207aa0 500031cc ec222310 c77231b6 4e2e320f P.1.."#..r1.N.2. + 40207ab0 03520f02 220f0480 33110022 11504320 .R.."...3..".PC + 40207ac0 40322022 0f058022 01302220 3194ff37 @2 "...".0" 1..7 + 40207ad0 1202865e 00222d10 cc12f26d 10220f01 ...^."-....m.".. + 40207ae0 2b222aff c6aeff00 28ad0c03 37121d52 +"*.....(...7..R + 40207af0 02010cf2 57b2010c 2348bd8c e40cf242 ....W...#H.....B + 40207b00 04015022 c047a204 0c422033 20289d8c ..P".G...B 3 (.. + 40207b10 62220201 2c0427b4 040c8220 3320420d b"..,.'.... 3 B. + 40207b20 04220d05 2714042c 02203320 288d8ca2 ."..'..,. 3 (... + 40207b30 220201f6 320522a0 00226d08 222d109c "...2.".."m."-.. + 40207b40 92520201 22020042 a0dd4042 c01ca61c .R.."..B..@B.... + 40207b50 e2402693 27b5040c 02226d10 422d112d .@&.'...."m.B-.- + 40207b60 03164414 22040052 040142a0 dd4022c0 ..D."..R..B..@". + 40207b70 1c661ca4 2046932d 03473502 464a000c .f.. F.-.G5.FJ.. + 40207b80 02226d11 2d03c647 00f66e02 063b0042 ."m.-..G..n..;.B + 40207b90 02017202 00320202 80441100 33117054 ..r..2...D..3.pT + 40207ba0 20504320 32020380 33014033 20419cf2 PC 2...3.@3 A.. + 40207bb0 471302c6 2f00220f 06661202 462c0016 G.../."..f..F,.. + 40207bc0 e20a2d0f c57bff8c 72f26d14 46c3ff00 ..-..{..r.m.F... + 40207bd0 0000f02f 20c57aff 1602ec22 cf07226d .../ .z....".."m + 40207be0 0906beff 320f0352 0f02220f 04803311 ....2..R.."...3. + 40207bf0 00221150 43204032 20220f05 80220130 .".PC @2 "...".0 + 40207c00 22203143 ff37120f 3143ff37 121e3142 " 1C.7..1C.7..1B + 40207c10 ff37124b 86a2ff00 220f0a32 0f098022 .7.K...."..2..." + 40207c20 11302220 225d2b86 acff0000 0021cde7 .0" "]+......!.. + 40207c30 a2225e16 6aea2841 62cef872 c2a03801 ."^.j.(Ab..r..8. + 40207c40 28316060 74ab5f7b 4fc00a00 46a3ff00 (1``t._{O...F... + 40207c50 3134ff37 1202c6a0 ff222d11 069eff00 14.7....."-..... + 40207c60 220f0726 1202c69c ff0c1222 4d54c69a "..&......."MT.. + 40207c70 fff9fd86 99fff64e 0246d1ff 32020152 .......N.F..2..R + 40207c80 02008033 11504320 32020222 02030033 ...3.PC 2.."...3 + 40207c90 11403320 80220130 222031c9 fd371202 .@3 .".0" 1..7.. + 40207ca0 86c7fff2 6d13c68c ff08f1c8 e1d8d1e8 ....m........... + 40207cb0 c1f8b112 c1400df0 12c1c0d9 d10c03d8 .....@.......... + 40207cc0 d209f1c9 e1e9c1f9 b1324100 cc5d0c02 .........2A..].. + 40207cd0 86370000 00220d07 320d0680 22112023 .7..."..2...". # + 40207ce0 20e20d01 6612e6f1 9fe70c32 f2df0222 ...f......2..." + 40207cf0 4f3c3d01 8b2d056d ff224f40 320d0dc2 O<=..-.m."O@2... + 40207d00 0d0c8033 1130cc20 e2cef40c 04e02f31 ...3.0. ....../1 + 40207d10 e022c0d6 6202c7b4 23d024a0 3d01eb22 ."..b...#.$.=.." + 40207d20 4941456a ff320f3e 4841f623 02224f3e IAEj.2.>HA.#."O> + 40207d30 1b44e2ce fc4040f4 46f4ff00 00a61e8d .D...@@.F....... + 40207d40 d03ca082 030fa135 f2802811 82030eb1 .<.....5..(..... + 40207d50 34f22088 2032c310 e2cefe0c 020c290c 4. . 2........). + 40207d60 3ce04f31 e044c0d6 640387b2 33520301 <.O1.D..d...3R.. + 40207d70 72030042 03028055 11004411 70652060 r..B...U..D.pe ` + 40207d80 54204203 03804401 504420a7 141db794 T B...D.PD ..... + 40207d90 02c24f3d 1b224b33 e2cefc20 20f4c6ef ..O=."K3... ... + 40207da0 ff7cf2e0 2230202f 05460100 924f3d46 .|.."0 /.F...O=F + 40207db0 f8ff08f1 c8e1d8d1 e8c1f8b1 12c1400d ..............@. + 40207dc0 f0000000 12c1c0c9 e10c03c8 e209f1d9 ................ + 40207dd0 d1e9c1f9 b1324100 cc4c0c02 06310000 .....2A..L...1.. + 40207de0 d20c0122 a009d7a2 f0220c03 320c0280 ..."....."..2... + 40207df0 22112023 206612e1 e15be722 a003e2de ". # f...[.".... + 40207e00 02224e3c 3d014b2c c563ff22 4e40420c ."N<=.K,.c."N@B. + 40207e10 09d2cdf8 80241142 0c080c0f 204420ab .....$.B.... D . + 40207e20 cc47bf24 a62d213d 012d0c42 61068561 .G.$.-!=.-.Ba..a + 40207e30 ff320e3e 4861f623 02224e3e 1bffd2cd .2.>Ha.#."N>.... + 40207e40 fc4bccf0 f0f4c6f5 ffa61d8d 320c01d2 .K..........2... + 40207e50 cdfe8023 11320c00 0c0f2033 202bcc0c ...#.2.... 3 +.. + 40207e60 540c4522 a001e62d 0222a000 20207437 T.E"...-.".. t7 + 40207e70 bf3116e2 02c02c20 32610449 61595185 .1...., 2a.IaYQ. + 40207e80 63ff3841 48615851 66120552 4e3d4601 c.8AHaXQf..RN=F. + 40207e90 00662202 424e3d1b ff4bccd2 cdfcf0f0 .f".BN=..K...... + 40207ea0 f486efff 08f1c8e1 d8d1e8c1 f8b112c1 ................ + 40207eb0 400df000 312ce712 c1d009b1 c9a1d991 @...1,.......... + 40207ec0 e981f971 32d30242 033d52c4 fc505074 ...q2..B.=R..PPt + 40207ed0 b6251852 c4f95050 74b6350f 52c4fe50 .%.R..PPt.5.R..P + 40207ee0 5074f625 02c63200 46310000 c8e2cc3c Pt.%..2.F1.....< + 40207ef0 0c02464e 00e20c01 b62ef422 0c03420c ..FN......."..B. + 40207f00 02802211 20242066 12e542ce fe404074 ..". $ f..B..@@t + 40207f10 22cc04b6 44d9d203 4032a000 8552ff27 "...D...@2...R.' + 40207f20 9dcd22ce fa202074 b622c432 0c09e2ce ..".. t.".2.... + 40207f30 f8802311 320c08e0 e0742033 20003311 ..#.2....t 3 .3. + 40207f40 30d031d0 f0f4abcc 0c04b64e a2f71413 0.1........N.... + 40207f50 0c032d0c 4901054f ff48011b 444040f4 ..-.I..O.H..D@@. + 40207f60 46faff00 a03d11d0 33c0e033 a0303074 F....=..3..3.00t + 40207f70 c0cfa066 130286dd ff420c01 80241142 ...f.....B...$.B + 40207f80 0c002044 2022c3fe 32c3fd30 30742020 .. D "..2..00t + 40207f90 74f63302 06d6ff0c 038cf247 b30d22c2 t.3........G..". + 40207fa0 fc1b3320 20743030 f406fbff 0c12461f ..3 t00......F. + 40207fb0 0066644c c2220d16 5cf3220c 07420c06 .fdL."..\."..B.. + 40207fc0 80221120 24202612 02c6c8ff d2034022 .". $ &.......@" + 40207fd0 cc080c03 053fff27 1d0286c4 ffd20c0d .....?.'........ + 40207fe0 0c0e802d 11d20c0c ebcc20dd 20d71ebb ...-...... . ... + 40207ff0 2d0c0c03 1bee053d ffe0e0f4 4bccc6fa -......=....K... + 40208000 ff221203 47621432 033e0c12 32c3f930 ."..Gb.2.>..2..0 + 40208010 3074b623 160c0246 04000000 216bfb0c 0t.#...F....!k.. + 40208020 14220200 2030340c 02302483 20207408 .".. 04..0$. t. + 40208030 b1c8a1d8 91e881f8 7112c130 0df00000 ........q..0.... + 40208040 70042340 5d022813 12c1f048 12c921c2 p.#@].(....H..!. + 40208050 130bd911 0931ab24 d2c418f6 2c047cf3 .....1.$....,.|. + 40208060 86190032 04016763 0631f5ff 38133add ...2..gc.1..8.:. + 40208070 620d0042 a07f0c03 47164e32 2524cca3 b..B....G.N2%$.. + 40208080 220d0026 32152672 33c60e00 0c6401e3 "..&2.&r3....d.. + 40208090 e6c00000 5662fc46 f9ff0000 220d0126 ....Vb.F...."..& + 402080a0 12078c42 26220c46 07000c82 c7b2ae46 ...B&".F.......F + 402080b0 05000000 b66ca646 03000000 00220d01 .....l.F.....".. + 402080c0 8c126612 02262c95 0c030831 2d03c821 ..f..&,....1-..! + 402080d0 d81112c1 100df000 a087fe3f 12c1f0c9 ...........?.... + 402080e0 21e901cd 0230e074 22afdd31 fbffd911 !....0.t"..1.... + 402080f0 224c0040 d074524c 012b2c0c 34093101 "L.@.tRL.+,.4.1. + 40208100 c5e3c000 000831e2 4c05d24c 067b2cd8 ......1.L..L.{,. + 40208110 11c821e8 0112c110 0df00000 12c1d0d9 ..!............. + 40208120 91d20130 e981ed07 5070749b 5d309074 ...0....Ppt.]0.t + 40208130 40807450 50740c14 0c53c9a1 f971cd02 @.tPPt...S...q.. + 40208140 60f07479 21891199 0109b105 f9ff9801 `.ty!........... + 40208150 88117821 924c0782 4c08724c 09f24c0a ..x!.L..L.rL..L. + 40208160 8cce8cad 4d0d3d0e bb2c01aa e3c00000 ....M.=..,...... + 40208170 08b1bb2d 2a2cd891 c8a1e881 f87112c1 ...-*,.......q.. + 40208180 300df000 12c1e0d2 6105e261 04f26103 0.......a..a..a. + 40208190 40e07430 f07450d0 f40c140c 950c3309 @.t0.tP.......3. + 402081a0 71c961cd 0245f3ff 0871d24c 09d0d841 q.a..E...q.L...A + 402081b0 f24c07e2 4c08d24c 0abb2cd8 51c861e8 .L..L..L..,.Q.a. + 402081c0 41f83112 c1200df0 12c1f0c2 610240c0 A.1.. ......a.@. + 402081d0 7452cc07 e2610050 5074ed03 0c140c63 tR...a.PPt.....c + 402081e0 0931d911 dd0245ef ff0c0222 4d07c24d .1....E...."M..M + 402081f0 084d0c3d 0e9b2d01 87e3c000 0008319b .M.=..-.......1. + 40208200 2c2a2dc8 21d811e8 0112c110 0df00000 ,*-.!........... + 40208210 12c1e0c2 610650c0 7452cc08 e26104f9 ....a.P.tR...a.. + 40208220 31ed04fd 030c1432 a0dd5050 74d95109 1......2..PPt.Q. + 40208230 71dd0285 eaff0c34 3d0f7b2d 0176e3c0 q......4=.{-.v.. + 40208240 00008ccc 8cae4d0c 3d0eab2d 0172e3c0 ......M.=..-.r.. + 40208250 00000871 ab2c2a2d c861d851 e841f831 ...q.,*-.a.Q.A.1 + 40208260 12c1200d f0000000 07022340 12c1c0d9 .. .......#@.... + 40208270 d1e9c1f9 b1ed0209 f1c9e16d 03fd04dd ...........m.... + 40208280 050c1216 1e14322e 2416b313 0c941c83 ......2.$....... + 40208290 2d016941 45e2fdcd 02684116 e2112801 -.iAE....hA...(. + 402082a0 1b323901 62420028 011b3239 01f24200 .29.bB.(..29..B. + 402082b0 28011b32 3901321d 00324200 661f1828 (..29.2..2B.f..( + 402082c0 01321d01 32420022 1d013801 20284122 .2..2B."..8. (A" + 402082d0 43012801 2b222901 2801321d 02324200 C.(.+").(.2..2B. + 402082e0 221d0238 01202841 22430128 012b3239 "..8. (A"C.(.+29 + 402082f0 01321d03 32420222 1d033801 20284122 .2..2B."..8. (A" + 40208300 43012801 2b323901 dc5f321d 04324202 C.(.+29.._2..2B. + 40208310 221d0438 01202841 22430128 012b2229 "..8. (A"C.(.+") + 40208320 0122a018 225c0a22 2c01422c 09281251 .".."\.",.B,.(.Q + 40208330 0de632c2 1828010c 073022c0 3804225c ..2..(...0".8."\ + 40208340 0b306641 1c022026 20a02211 30305420 .0fA.. & .".00T + 40208350 33202845 0c18e022 c0208783 98148020 3 (E...". ..... + 40208360 748102e8 39048089 107c0990 98100c78 t...9....|.....x + 40208370 80892089 1481fee7 7cc9c020 00880890 .. .....|.. .... + 40208380 33108964 f0821180 33203904 322e24dd 3..d....3 9.2.$. + 40208390 0532130d 77130a17 e60745a3 1a297c86 .2..w.....E..)|. + 402083a0 0000726c 07320d7d 222c0942 a0d03242 ..rl.2.}",.B..2B + 402083b0 08c03c20 2d0e854d fac60200 0021aaff ..< -..M.....!.. + 402083c0 0123e7c0 00000c12 08f1c8e1 d8d1e8c1 .#.............. + 402083d0 f8b112c1 400df000 12c1e009 710c1316 ....@.......q... + 402083e0 12065222 2416b505 52040332 04044204 ..R"$...R..2..B. + 402083f0 02803311 42510042 22143035 20305234 ..3.BQ.B".05 0R4 + 40208400 303641a7 641141d7 e542d405 42241057 06A.d.A..B..B$.W + 40208410 74050c04 c6000000 42a00142 5101a033 t.......B..BQ..3 + 40208420 1142a002 e0551140 33203035 20325102 .B...U.@3 05 2Q. + 40208430 32a00032 51033251 045d010c 330c14c5 2..2Q.2Q.]..3... + 40208440 1a030c03 08712d03 12c1200d f0000000 .....q-... ..... + 40208450 00000600 12c1f0d9 111c64dd 030c0309 ..........d..... + 40208460 31c921cd 0201eae2 c0000022 2d3505b8 1.!........"-5.. + 40208470 f9224c00 21bce522 d2052222 10d77204 ."L.!.."..""..r. + 40208480 0c824600 000c0222 4c01222d 35280217 ..F...."L."-5(.. + 40208490 7209320c 010c1246 02000000 27720a32 r.2....F....'r.2 + 402084a0 0c010c32 20232022 4c01222d 35380221 ...2 # "L."-58.! + 402084b0 e8ff2703 0a320c01 0c422023 20224c01 ..'..2...B # "L. + 402084c0 220ddd52 a0e0224c 026b7c4d 0d5a5d0c "..R.."L.k|M.Z]. + 402084d0 18220500 d034c027 a32b3204 e1306741 ."...4.'.+2..0gA + 402084e0 3020649c a662c281 9c562023 212a2762 0 d..b...V #!*'b + 402084f0 02003030 24001340 0038a160 33203242 ..00$..@.8.`3 2B + 40208500 001b4486 f2ff0831 22cc16d8 11c82112 ..D....1".....!. + 40208510 c1100df0 00000400 00003000 0000c000 ..........0..... + 40208520 00000200 fffff8ff 12c1d0d9 91d18de5 ................ + 40208530 f97162dd 05721622 422610fd 0209b16c .qb..r."B&.....l + 40208540 e2c9a1e9 818d0320 27103774 0b922d75 ....... '.7t..-u + 40208550 31f1ff30 3920326d 7531efff 37040b92 1..09 2mu1..7... + 40208560 2d753130 f0303920 326d7531 ecff3704 -u10.09 2mu1..7. + 40208570 0b922d75 31ebff30 3920326d 75922832 ..-u1..09 2mu.(2 + 40208580 32283556 79096cce e0e71087 7405e2a0 2(5Vy.l.....t... + 40208590 02e0e220 9208dac2 16239070 14c02014 ... .....#.p.. . + 402085a0 77a2017d 0222a01c 90a241c0 b24120aa w..}."....A..A . + 402085b0 101cc220 cc1020bb 10204220 c0c221a7 ... .. .. B ..!. + 402085c0 ab0540c9 10c0c221 2189e627 13662223 ..@....!!..'.f"# + 402085d0 0041d4ff 32130240 221041d1 ff626102 .A..2..@".A..ba. + 402085e0 4042202d 0d791189 01c52503 31ceff68 @B -.y....%.1..h + 402085f0 21781188 01fcc222 28354802 30341041 !x....."(5H.04.A + 40208600 c5ff4043 20321202 2d0dc523 03682178 ..@C 2..-..#.h!x + 40208610 11ec027c d220ee10 46060000 00004803 ...|. ..F.....H. + 40208620 318cff0c 2ee0e220 378405e2 afece0e7 1...... 7....... + 40208630 100c0c7d 0c222610 2c03303e 20a7f205 ...}."&.,.0> ... + 40208640 32afdf30 3e10b772 074c0220 232017e3 2..0>..r.L. # .. + 40208650 0522afbf 202310e0 cc1170cc 20224f00 .".. #....p. "O. + 40208660 c24f0220 28413bcf 224f010c 031c742d .O. (A;."O....t- + 40208670 0c692101 67e2c000 00682122 dd013206 .i!.g....h!"..2. + 40208680 4a0c1932 42d93206 4b3242d8 0c034202 J..2B.2.K2B...B. + 40208690 d8d04411 47a31b30 43213070 244a4c00 ..D.G..0C!0p$JL. + 402086a0 17400089 a1720400 1b337078 20724400 .@...r...3px rD. + 402086b0 86f6ff32 26108773 10322d75 67730a42 ...2&..s.2-ugs.B + 402086c0 0f070c13 30342032 4f07322d 7557f310 ....04 2O.2-uW.. + 402086d0 3202d922 02d83712 02c62100 0c128626 2.."..7...!....& + 402086e0 003202d8 f6230832 02d8f633 28c61100 .2...#.2...3(... + 402086f0 320f072c 140c192c 78407024 00174000 2..,...,x@p$..@. + 40208700 79a13037 201b4430 30748794 eb324f07 y.07 .D00t...2O. + 40208710 c6f4ff00 00002c73 0c1a3c59 30432130 ......,s..&. + 40208880 0a522214 4c044045 20426214 42030352 .R".L.@E Bb.B..R + 40208890 03028044 11404520 42526c42 0304d1a0 ...D.@E BRlB.... + 402088a0 fb4242da e2030531 e8ff0c0c 1c042d01 .BB....1......-. + 402088b0 c90d01e6 ffc00000 518afb2d 0c420500 ........Q..-.B.. + 402088c0 6d0c32a0 ff275e09 1b442030 74404074 m.2..'^..D 0t@@t + 402088d0 0c161b22 6682ed8c 16424500 8033010c ..."f....BE..3.. + 402088e0 02303831 f042114a 51520500 5793094a .081.B.JQR..W..J + 402088f0 41220401 290d0601 001b2266 82e50871 A"..)....."f...q + 40208900 c861d851 e84112c1 200df000 00300000 .a.Q.A.. ....0.. + 40208910 ffdfffff ffcfffff ff7ffeff 00800000 ................ + 40208920 00000800 12c1d0c9 a1d991f9 71cd0209 ............q... + 40208930 b1e981dd 0485f1ff 518be40c c2f2d505 ........Q....... + 40208940 321f2227 032e421c 6c322c14 2024108c 2."'..B.l2,. $.. + 40208950 a2664217 21eeff20 23200605 0021ecff .fB.!.. # ...!.. + 40208960 4190ed20 23104022 20460100 21eaff20 A.. #.@" F..!.. + 40208970 2310226c 14322c14 21e8ff42 1c6c2023 #."l.2,.!..B.l # + 40208980 10226c14 57640e32 2f10a773 0831e3ff ."l.Wd.2/..s.1.. + 40208990 30222022 6c146764 11222f10 b7720b32 0" "l.gd."/..r.2 + 402089a0 2c142120 ef202320 226c1422 0d0042a0 ,.! . # "l."..B. + 402089b0 dd4022c0 4b3d20d3 83220d02 e1d9ff22 .@".K= .."....." + 402089c0 4cdb220d 030c0620 2014224c dc320d04 L.".... ."L.2.. + 402089d0 30301432 4cdd320d 06303064 324cde42 00.2L.2..00d2L.B + 402089e0 2f10e034 10e10fef 30e68332 0d032763 /..4....0..2..'c + 402089f0 16877413 26120d31 c7fe22c2 fd20e383 ..t.&..1..".. .. + 40208a00 06010000 00e1c6fe 322c3541 c6fe2803 ........2,5A..(. + 40208a10 402210e0 22204042 102903e0 44204712 @".." @B.)..D G. + 40208a20 37321302 2d055901 c5e10258 01dcf221 72..-.Y....X...! + 40208a30 88fe270e 23322c35 21bbfe48 03321302 ..'.#2,5!..H.2.. + 40208a40 20241041 f8ee4042 202d05c5 df028c72 $.A..@B -.....r + 40208a50 322c3527 1302226c 35222c35 2c843802 2,5'.."l5",5,.8. + 40208a60 217cfe20 33101c42 30249322 4cdf220d !|. 3..B0$."L.". + 40208a70 03422c14 37621022 2f10d772 0a3138f8 .B,.7b."/..r.18. + 40208a80 302420c6 01000000 2134f820 241008b1 0$ .....!4. $... + 40208a90 226c14d8 91c8a1e8 81f87112 c1300df0 "l........q..0.. + 40208aa0 12c1d0c9 a1cd0331 2fe4d991 e981f971 .......1/......q + 40208ab0 09b15d02 22d30122 02d94223 75d0e211 ..].".."..B#u... + 40208ac0 fd030c0d 7774102c 6db6320b 22c2fd32 ....wt.,m.2."..2 + 40208ad0 a04cd2a0 3420d393 22a0e02a 2542a080 .L..4 .."..*%B.. + 40208ae0 0c035901 014be1c0 00005801 16ac0522 ..Y..K....X...." + 40208af0 0c0042a0 dd4b3c40 22c020c3 83622f75 ..B..K<@". ..b/u + 40208b00 2187f20c 03206610 22a0e02a 251cf752 !.... f."..*%..R + 40208b10 a07f82a0 20304321 404c8092 04053040 .... 0C!@L....0@ + 40208b20 24475920 42020057 141f3727 02e7a314 $GY B..W..7'.... + 40208b30 66c3018c e637a802 372d091b 94924200 f....7..7-....B. + 40208b40 4a423244 011b3357 93ca08b1 0c02c8a1 JB2D..3W........ + 40208b50 d891e881 f87112c1 300df000 12c1f009 .....q..0....... + 40208b60 312cd442 42001ca4 4242012b 22859bff 1,.BB...BB.+"... + 40208b70 083112c1 100df000 12c1f002 610342af .1..........a.B. + 40208b80 dd424200 42a01e42 420142a0 00424202 .BB.B..BB.B..BB. + 40208b90 42af9042 42034cc4 4242043c 34424205 B..BB.L.BB.<4BB. + 40208ba0 6b224598 ff083112 c1100df0 12c1f009 k"E...1......... + 40208bb0 313cd442 42001c64 4242012b 224589ff 1<.BB..dBB.+"E.. + 40208bc0 083112c1 100df000 12c1f002 610342af .1..........a.B. + 40208bd0 dd424200 42a01a42 420142a0 00424202 .BB.B..BB.B..BB. + 40208be0 42af9042 42034cc4 4242043c 44424205 B..BB.L.BB.f + 40208eb0 7236e1c8 f7d2a005 52a00172 a00862c1 r6......R..r..b. + 40208ec0 100c043d 0c2d05d9 21d911e9 01058906 ...=.-..!....... + 40208ed0 0c620c15 2921d911 e9010c87 62c1104d .b..)!......b..M + 40208ee0 053d0c2d 05c60d00 0066823e e1baf7d2 .=.-.....f.>.... + 40208ef0 a0050cdf 0c8762c1 100c150c 043d0cd9 ......b......=.. + 40208f00 21f911e9 01d02d20 4585060c 620c1529 !.....- E...b..) + 40208f10 21f911e9 010c8762 c1104d05 3d0c2d0d !......b..M.=.-. + 40208f20 c5830622 dc010c43 32420945 c2fd2133 ..."...C2B.E..!3 + 40208f30 ff31c1ff 4222ee8c a45804cc d5421402 .1..B"...X...B.. + 40208f40 cc840604 000c04c6 02000000 22d20322 ............".." + 40208f50 02c4cc62 0c140c15 86010000 52a00042 ...b........R..B + 40208f60 a001c02c 20455a02 08f1c8e1 d8d1e8c1 ..., EZ......... + 40208f70 f8b112c1 400df000 f384fe3f 31ffff12 ....@......?1... + 40208f80 c1f04203 00520301 42410042 03023203 ..B..R..BA.B..2. + 40208f90 03424102 32410332 02015241 010c04f6 .BA.2A.2..RA.... + 40208fa0 532a3a32 27131a52 020242a0 00505064 S*:2'..R..B..PPd + 40208fb0 4a616206 0057160f 1b446644 f20c0486 Jab..W...DfD.... + 40208fc0 02000c14 46010000 1b2286f5 ff2d0412 ....F...."...-.. + 40208fd0 c1100df0 9ce6fe3f 14cffe3f 80932040 .......?...?.. @ + 40208fe0 3c8e2040 12c1d0e9 81e104ff c9a1cd02 <. @............ + 40208ff0 222eed09 b1d26109 f2610716 2204c792 ".....a..a.."... + 40209000 3fd22c26 01ecebc0 0000271d 1601a4f0 ?.,&......'..... + 40209010 c00000f1 d4e2d2df 02220d14 26322986 ........."..&2). + 40209020 24000000 322ef022 a1402023 20226ef0 $...2..".@ # "n. + 40209030 31e9ff21 cce23203 00284232 42d2861b 1..!..2..(B2B... + 40209040 00568cfc 0c12863c 00220d00 16520622 .V.....<."...R." + 40209050 0d082612 5f322c26 390101d6 ebc00000 ..&._2,&9....... + 40209060 38012713 4f0c1222 4d080c32 224d0922 8.'.O.."M..2"M." + 40209070 2c26c26f 8185f7f8 224d0a01 8af0c000 ,&.o...."M...... + 40209080 00e1d5ff 2d0e01cd ebc00000 31d4ff4d ....-.......1..M + 40209090 0c2d0e01 c8ecc000 00220d09 321c0e1b .-......."..2... + 402090a0 22303282 0c150c04 2d0e01c3 ebc00000 "02.....-....... + 402090b0 0c028621 00017bf0 c000000c 02225c0d ...!..{......"\. + 402090c0 85f4f820 20b4225c 5e1632ff 22dc0132 ... ."\^.2."..2 + 402090d0 a0043242 080172f0 c0000022 2c26322f ..2B..r....",&2/ + 402090e0 4b271307 316af00c 14424300 226f4b01 K'..1j...BC."oK. + 402090f0 6df0c000 0021a3e4 d22c26c0 20002222 m....!...,&. ."" + 40209100 00226eef 01acebc0 0000271d 22d1b4ff ."n.......'."... + 40209110 4d0c3d0d 0c3285bb fc5d0d56 52f20c04 M.=..2...].VR... + 40209120 222c267d 0c6d0d3d 0405d4fc 46020000 ",&}.m.=....F... + 40209130 32a000c0 2c2045d0 ff22a002 08b1c8a1 2..., E.."...... + 40209140 d891e881 f87112c1 300df000 0ccffe3f .....q..0......? + 40209150 75032340 ff00ff00 30032340 f4110060 u.#@....0.#@...` + 40209160 28d2fe3f 92a0b090 11c00261 2bc2612a (..?.......a+.a* + 40209170 d26129e2 6128f261 2756731e c17ae251 .a).a(.a'Vs..z.Q + 40209180 9ffe284c 38052261 211c020c 0e202320 ..(L8."a!.... # + 40209190 2905fd0e e26120dd 0531f1ff 2203b127 )....a ..1.."..' + 402091a0 bf4b32a0 e83a2fd0 22a06812 22dc0222 .K2..:/.".h.".." + 402091b0 02b5dc72 2d066261 2345a4ff 32212062 ...r-.ba#E..2! b + 402091c0 212327b3 1fed0622 6120c605 0021fdf6 !#'...."a ...!.. + 402091d0 3d060c64 62612301 91e2c000 00622123 =..dba#......b!# + 402091e0 8cc286f3 ff1b7f70 f074c6ea ff006d0e .......p.t....m. + 402091f0 8c860c0e f2a0e84d 0e864700 31d4ff22 .......M..G.1.." + 40209200 03001b22 20207422 43006652 142d0145 ..." t"C.fR.-.E + 40209210 04092201 61661209 0c022241 612d0145 ..".af...."Aa-.E + 40209220 2a0921f8 ec280216 a205e1c9 ff42a1f9 *.!..(.......B.. + 40209230 3d0e2cc2 0187e3c0 0000dd02 1652040c =.,..........R.. + 40209240 12290d22 afc9224d 2b0c640c 0322cd25 .).".."M+.d..".% + 40209250 0170dfc0 000031dc e62c044b 2d016ddf .p....1..,.K-.m. + 40209260 c0000022 2c864d0d 224d2432 a0c91c52 ...",.M."M$2...R + 40209270 01eeecc0 00008cb2 42a2043d 0e2d0d01 ........B..=.-.. + 40209280 a2e0c000 00284c31 b3ff4222 34378402 .....(L1..B"47.. + 40209290 06340022 02d22622 160c3285 3401858a .4."..&"..2.4... + 402092a0 0966120b 31c9e621 acff0168 e3c00000 .f..1..!...h.... + 402092b0 31ddec21 aaffc020 003902c5 88092612 1..!... .9....&. + 402092c0 02c62700 2221214b c22d0c01 3cebc000 ..'."!!K.-..<... + 402092d0 0031c6f4 2d0c0c04 0137ecc0 00000c15 .1..-....7...... + 402092e0 0c0432a3 e82d0c01 34ebc000 00c61c00 ..2..-..4....... + 402092f0 fa2ed022 a0281227 161b32a1 34426122 ...".(.'..2.4Ba" + 40209300 62612301 4ef2c000 00fa2e42 2122d022 ba#.N......B!"." + 40209310 a0622123 49121bee e0e07431 91ff2203 .b!#I.....t1..". + 40209320 b1273ecb 0c122243 b1384c62 6de94203 .'>..."C.8Lbm.B. + 40209330 d2663407 2243d20c 022243d1 60262045 .f4."C..."C.`& E + 40209340 caff56f2 00322d00 6cf22023 10290d46 ..V..2-.l. #.).F + 40209350 04000000 0066120b 322df022 a1402023 .....f..2-.".@ # + 40209360 20226df0 02212b92 a0b0c221 2ad22129 "m..!+....!*.!) + 40209370 e22128f2 21279a11 0df00000 1a032340 .!(.!'........#@ + 40209380 12c1f0d9 11d1f7e1 c921e901 026103c2 .........!...a.. + 40209390 dd0220e2 20320c0a 21f9ff01 2ce3c000 .. . 2..!...,... + 402093a0 008c8e2d 0ec5c3ff 46180000 0042a000 ...-....F....B.. + 402093b0 4034200c 328591fc 0c135662 05220c0a @4 .2.....Vb.".. + 402093c0 32a0800b 22202290 3022a00c 072a2d6d 2..." ".0"...*-m + 402093d0 075d074d 073d074b 2205a9fc ecd201b0 .].M.=.K"....... + 402093e0 efc00000 220c0a32 a0800b22 20229030 ...."..2..." ".0 + 402093f0 22a02a2d 322d4b4b 22271307 31a4ef0c ".*-2-KK"'..1... + 40209400 14424300 226d4b01 a7efc000 000c0222 .BC."mK........" + 40209410 4c080c03 08312d03 c821d811 e80112c1 L....1-..!...... + 40209420 100df000 749b2040 12c1f0c9 21c1f3fd ....t. @....!... + 40209430 d91132a3 c8dd022d 0c093101 00f2c000 ..2....-..1..... + 40209440 00380c0c 22c90d20 2320290c c2dc030c .8..".. # )..... + 40209450 f2224cb0 21f4ff0c 03058917 0831c821 ."L.!........1.! + 40209460 d81112c1 100df000 00840000 88e6fe3f ...............? + 40209470 348d2040 64912040 12c1d0e9 81e1b9e1 4. @d. @........ + 40209480 d991f971 09b1c9a1 fd02222e 8530d074 ...q......"..0.t + 40209490 2020f432 a1013792 26c1f4ff c02c2001 .2..7.&...., . + 402094a0 c7eac000 0031f2ff 0c042d0c 01c2ebc0 .....1....-..... + 402094b0 00000c15 4d053c23 2d0c01bf eac00000 ....M.<#-....... + 402094c0 31aae11c 02c02000 48032024 20c02000 1..... .H. $ . . + 402094d0 2903220f a98cc242 a0aa4a4f 0c030c22 )."....B..JO..." + 402094e0 06020000 0042a000 3d042d04 05d41905 .....B..=.-..... + 402094f0 f5fcc2a5 0f8c7dd0 2d208564 fdc1daff ......}.- .d.... + 40209500 d1bffd28 1d076208 213bec20 cc204603 ...(..b.!;. . F. + 40209510 00420f0c 52a00132 cf100c02 85f4fcf7 .B..R..2........ + 40209520 ec4cf2de 02320fa4 39014586 f8380127 .L...2..9.E..8.' + 40209530 2312320f a43901c5 83f83801 373205f2 #.2..9....8.72.. + 40209540 0fa40602 002120e6 85fafc20 f0740584 .....! .... .t.. + 40209550 f827af0b 8583f820 f0740602 00000000 .'..... .t...... + 40209560 0581f8f7 32ed21ee fbf03f20 8502fd22 ....2.!...? ..." + 40209570 2e043198 fe4202d2 42430042 02d10c13 ..1..B..BC.B.... + 40209580 cc143242 d2422214 3242d032 afbf3034 ..2B.B".2B.2..04 + 40209590 10326214 322d0022 a0102023 20290d0c .2b.2-.".. # ).. + 402095a0 0285eafc 41b4ff2d 0c0c050c 230537fd ....A..-....#.7. + 402095b0 08b1c8a1 d891e881 f87112c1 300df000 .........q..0... + 402095c0 51032340 0dcffe3f 12c1f0c9 21c165e1 Q.#@...?....!.e. + 402095d0 21fcffd9 11d84c09 31019ce2 c0000032 !.....L.1......2 + 402095e0 2d112d0c 9c43c1f7 ff0c130c 04324c00 -.-..C.......2L. + 402095f0 403420c5 050122a0 00224c00 21d8fec0 @4 ...".."L.!... + 40209600 20004802 c0200038 024040f5 30507421 .H.. .8.@@.0Pt! + 40209610 0afe6614 0842a00d 30307457 b4010c03 ..f..B..00tW.... + 40209620 45e5ff02 2103c221 02d22101 12c1100d E...!..!..!..... + 40209630 f0000000 12c1f0c9 21c14ae1 093122dc ........!.J..1". + 40209640 013202de 6643110c 033242de 222c798c .2..fC...2B.",y. + 40209650 62283216 2200c002 0042a002 0c032d0c b(2."....B....-. + 40209660 c5fe0045 4e096612 02c5f5ff 0831c821 ...EN.f......1.! + 40209670 12c1100d f0000000 048e2040 c8022340 .......... @..#@ + 40209680 12c1f0c9 21c137e1 0931222c 0442a000 ....!.7..1",.B.. + 40209690 32024022 c218fc63 31f8ff01 46ebc000 2.@"...c1...F... + 402096a0 00284c22 c2180145 eac00000 284c0c15 .(L"...E....(L.. + 402096b0 32222422 c2184213 0ec03411 4033c000 2"$"..B...4.@3.. + 402096c0 15400033 a10c0401 3ceac000 00461a00 .@.3....<....F.. + 402096d0 f6531131 cbfd0137 ebc00000 456affc6 .S.1...7....Ej.. + 402096e0 15000000 0031e4ff 0133ebc0 000021e3 .....1...3....!. + 402096f0 ff0156e2 c000000c 140c032d 0c05f500 ..V........-.... + 40209700 2181f222 02460762 13284c0c 333242d0 !..".F.b.(L.32B. + 40209710 3242d20c 033242d1 86070000 00222c04 2B...2B......",. + 40209720 32a00032 42d03242 d23242d1 85410966 2..2B.2B.2B..A.f + 40209730 120721c1 fd0c0305 d4ff0831 c82112c1 ..!........1.!.. + 40209740 100df000 5c032340 12c1d0c9 a1cd0221 ....\.#@.......! + 40209750 05e1e981 2842f971 09b1d991 222234ed ....(B.q....""4. + 40209760 0340f420 97f20c21 f7ff0138 e2c00000 .@. ...!...8.... + 40209770 86410000 22a00005 d5fc568c 0242a000 .A..".....V..B.. + 40209780 0c253d04 0c1205ce fc45cbfc 0c02c5cb .%=......E...... + 40209790 fc0c043d 042d0485 a9195d0f 4d0e0c33 ...=.-....].M..3 + 402097a0 22a10f06 3400d80c 9c2d2d0d 0101ebc0 "...4....--..... + 402097b0 00000c15 2040743d 0d2d05c6 01000c04 .... @t=.-...... + 402097c0 0c253d04 0c1205ca fc281c8c 62c5c4fc .%=......(..b... + 402097d0 06010000 0085c6fc 220c0842 a00c32c2 ........"..B..2. + 402097e0 ff303074 d2a10f37 34058535 fdd14bfc .00t...74..5..K. + 402097f0 220c098c 320c1286 000022a0 00c5c4fc "...2....."..... + 40209800 222c0356 e20021d4 f4385c20 dd10ac03 ",.V..!..8\ .... + 40209810 284c8608 00661213 21d2f420 dd20284c (L...f..!.. . (L + 40209820 cc1222a1 6885c3fc c6030000 21cbf420 ..".h.......!.. + 40209830 dd1032a0 7822a03c 85c1fcf7 ed30280c ..2.x".<.....0(. + 40209840 05cbfc20 3074cd02 3901c0c0 740554f8 ... 0t..9...t.T. + 40209850 380127ac 088553f8 20307486 02003261 8.'...S. 0t...2a + 40209860 000551f8 38013732 eb212dfb 85d2fc5d ..Q.8.72.!-....] + 40209870 0f4d0e0c 332d0d85 0afd08b1 c8a1d891 .M..3-.......... + 40209880 e881f871 12c1300d f0000000 21b6e012 ...q..0.....!... + 40209890 c1f00c24 0c030931 45db00c5 2a096612 ...$...1E...*.f. + 402098a0 0245d2ff 083112c1 100df000 21aee012 .E...1......!... + 402098b0 c1f00c44 0c030931 45d900c5 28096612 ...D...1E...(.f. + 402098c0 0245d0ff 083112c1 100df000 12c1e0d9 .E...1.......... + 402098d0 51e941f9 310971c9 61fd020c 0de2a0e8 Q.A.1.q.a....... + 402098e0 31c7fc41 c6fc22d3 033202b1 37bd24ea 1..A.."..2..7.$. + 402098f0 2d4022a0 c812cc6c 1bddd0d0 74c6f7ff -@"....l....t... + 40209900 0c643d0f 2d0c01c5 e0c00000 5682fe2d .d=.-.......V..- + 40209910 0c460000 0c020871 c861d851 e841f831 .F.....q.a.Q.A.1 + 40209920 12c1200d f0000000 31b5fc42 a0ff62d3 .. .....1..B..b. + 40209930 035206b1 f6355c26 25053035 a0461200 .R...5\&%.05.F.. + 40209940 7223e942 22267227 2677940a 0c2482a0 r#.B"&r'&w...$.. + 40209950 e792a0e8 86030072 23ea7227 26471724 .......r#.r'&G.$ + 40209960 2263eb86 0900a624 168a7430 77a0a817 "c.....$..t0w... + 40209970 9a743077 a00b44a9 17404074 86f9ff00 .t0w..D..@@t.... + 40209980 0c144600 000c2430 34a02263 e91b5552 ..F...$04."c..UR + 40209990 46b10c04 2d040df0 12c1e0e9 41e197fc F...-.......A... + 402099a0 c961f931 0971d951 0c0cf2de 03320fb1 .a.1.q.Q.....2.. + 402099b0 dd0e37bc 1e22a0e8 2a2cd0d2 a0281d32 ..7.."..*,...(.2 + 402099c0 a134019e f0c00000 0c021bcc 291dc0c0 .4..........)... + 402099d0 7406f6ff 0c03324f b10871c8 61d851e8 t.....2O..q.a.Q. + 402099e0 41f83112 c1200df0 3185fc12 c1e0d951 A.1.. ..1......Q + 402099f0 f9310971 c961e261 04d2d303 520db142 .1.q.a.a....R..B + 40209a00 a00030f3 2040c074 57bc4862 23e9ed04 ..0. @.tW.Hb#... + 40209a10 4b331b44 2796ed32 a1340188 f0c00000 K3.D'..2.4...... + 40209a20 32a0e83a ee0c02f0 eea0291e 220db152 2..:......)."..R + 40209a30 a0e90b22 20207422 4db127bc 165a4cf0 ..." t"M.'..ZL. + 40209a40 44a06814 3a4cf044 a01bcc69 14c0c074 D.h.:L.D...i...t + 40209a50 86f9ff00 0871c861 d851e841 f83112c1 .....q.a.Q.A.1.. + 40209a60 200df000 30cffe3f 213fe012 c1d022d2 ...0..?!?....". + 40209a70 0609b1c9 a1d991e9 81f97162 02a45d02 ..........qb..]. + 40209a80 80660160 68314040 740c0267 23773205 .f.`h1@@t..g#w2. + 40209a90 a5373471 f15afc32 a134522f edd1f1ff .74q.Z.2.4R/.... + 40209aa0 ed027cf4 cd023063 20302e82 2a2f2822 ..|...0c 0..*/(" + 40209ab0 cc92602e 82202f80 221206ac 72d7151b ..`.. /."...r... + 40209ac0 2d0d3921 49015911 69314513 ff480138 -.9!I.Y.i1E..H.8 + 40209ad0 21581168 3147b203 4d02cd0d 1bee3add !X.h1G..M.....:. + 40209ae0 663ec546 0000cd0d 280ccc32 221c028c f>.F....(..2"... + 40209af0 622d0c10 112005ef ff320c06 0c122023 b-... ...2.... # + 40209b00 20224c06 2d0c08b1 c8a1d891 e881f871 "L.-..........q + 40209b10 12c1300d f0000000 12c1f009 31661407 ..0.........1f.. + 40209b20 4202934a 33460000 cc143242 93320293 B..J3F....2B.2.. + 40209b30 803301d6 530032a0 00324293 3130fc42 .3..S.2..2B.10.B + 40209b40 a00f5223 ed0ca650 32c03046 93320293 ..R#...P2.0F.2.. + 40209b50 80330130 383137a4 02424293 320293cc .3.0817..BB.2... + 40209b60 73571205 10112005 e8ff0831 12c1100d sW.... ....1.... + 40209b70 f0000000 12c1f0c2 610220c2 20222204 ........a. . "". + 40209b80 093122c2 1045d4ff 9c52389c 32030f66 .1"..E...R8.2..f + 40209b90 13070c53 32429586 01000c14 7cd385f7 ...S2B......|... + 40209ba0 ff850bff 0c031662 00850eff 86010000 .......b........ + 40209bb0 30232085 14ff0221 03c22102 12c1100d 0# ....!..!..... + 40209bc0 f0000000 12c1f0d9 11dd0332 c4100c64 ...........2...d + 40209bd0 0931c921 cd02010f ddc00000 48bd38ad .1.!........H.8. + 40209be0 22cc670c f585d401 0831c821 d81112c1 ".g......1.!.... + 40209bf0 100df000 12c1f0c9 21cd0221 00fce901 ........!..!.... + 40209c00 e222edd9 11c02ec0 dd030c1e 0c0320e3 ."............ . + 40209c10 93221d05 321c0e02 61034040 74e0e074 ."..2...a.@@t..t + 40209c20 27130222 5c0eccf4 286d16b2 00320202 '.."\...(m...2.. + 40209c30 324c2322 0203224c 22221d04 322d0722 2L#".."L""..2-." + 40209c40 5c1042a0 0822cc10 01f3dcc0 0000321d \.B.."........2. + 40209c50 03221c0f 202330a7 620e16be 0022a400 .".. #0.b....".. + 40209c60 20331021 c0df45e1 01221d03 225c0f21 3.!..E..".."\.! + 40209c70 d0f42202 0016b201 422d0b38 ad0c052d ..".....B-.8...- + 40209c80 0cc5bdfd 222d100c 030c1420 3493c02c ...."-..... 4.., + 40209c90 20059cfd 322d0f16 d3012d0c 05d70120 ...2-....-.... + 40209ca0 3f312023 c0d6f201 16ce0132 cc77c02c ?1 #.......2.w., + 40209cb0 2005de01 06040000 220c778c 921c9322 .......".w...." + 40209cc0 cc7701de efc00000 322d082d 0c05f5f7 .w......2-.-.... + 40209cd0 48bd38ad 0c052d0c 45b8fd28 adc529ff H.8...-.E..(..). + 40209ce0 8c520c12 46020000 00455a09 2612f20c .R..F....EZ.&... + 40209cf0 2285effb 48bd38ad 0c052d0c 05b6fd28 "...H.8...-....( + 40209d00 ad8527ff 8c320c12 86000022 a002c5ed ..'..2.....".... + 40209d10 fb322d10 16c30142 2d119c64 2192df52 .2-....B-..d!..R + 40209d20 d2055225 1037750b 22220452 2c265262 ..R%.7u."".R,&Rb + 40209d30 3505bffe 0831c821 d811e801 12c1100d 5....1.!........ + 40209d40 f0000000 12c1c0c9 e1cd03d9 d1e9c1f9 ................ + 40209d50 b109f1ed 02d802c5 7815f21c 0d9c9f2d ........x......- + 40209d60 0c05b201 0c087d02 89118901 f060b45d ......}......`.] + 40209d70 084d0c3d 082d0845 88162d0d 85eb1e22 .M.=.-.E..-...." + 40209d80 0d393762 0e2d0d85 161b2d0d 054a1b2d .97b.-....-..J.- + 40209d90 0d45e81a 0c0ff91d f92df93d 2d0fc5ad .E.......-.=-... + 40209da0 1962dc01 d170df22 060831e9 fcd022a0 .b...p."..1...". + 40209db0 22226342 a5126941 01d4ddc0 00006841 ""cB..iA......hA + 40209dc0 31e4fc22 060822c2 60d022a0 f932222d 1.."..".`."..2"- + 40209dd0 6330f320 16d20042 a51601cb ddc00000 c0. ...B........ + 40209de0 0c02226d 63222d64 8ce242a5 1b3d0f01 .."mc"-d..B..=.. + 40209df0 c6ddc000 000c0222 6d640c04 3d042d04 ......."md..=.-. + 40209e00 c54219d1 7efb0c22 320c0629 0d270313 .B..~.."2..).'.. + 40209e10 7cd22023 10224c06 0c147c93 2d0c85cf |. #."L...|.-... + 40209e20 ffc26dee c02c2005 bcff422c 0232a000 ..m.., ...B,.2.. + 40209e30 7ce2326d ed202410 08f1292c 326e24c8 |.2m. $...),2n$. + 40209e40 e1d8d1e8 c1f8b112 c1400df0 34962040 .........@..4. @ + 40209e50 409c0000 30750000 10270000 12c1d0f9 @...0u...'...... + 40209e60 71f2130d d991dd02 2d0309b1 c9a1e981 q.......-....... + 40209e70 0c0ced03 f0f0b4c5 a0017d02 5d0c6d0f ..........}.].m. + 40209e80 4d0e0c13 c911c901 2d0c0577 16456715 M.......-..w.Eg. + 40209e90 222e26e2 cd183202 0621e2e9 4bdd2023 ".&...2..!..K. # + 40209ea0 2031aefc c0200029 032d0e01 44e8c000 1... .).-..D... + 40209eb0 0031f1fd 4d0c2d0e 013fe9c0 00002d0d .1..M.-..?....-. + 40209ec0 013fe8c0 000031e1 ff4d0cd0 2d200139 .?....1..M..- .9 + 40209ed0 e9c00000 c124df22 dc053222 1f9cf322 .....$."..2"..." + 40209ee0 22206612 1a31daff 2d0d0c15 0c040132 " f..1..-......2 + 40209ef0 e8c00000 222c7a16 d2042832 060c0000 ....",z...(2.... + 40209f00 22dc0222 023d6642 2f222c79 bc822822 "..".=fB/",y..(" + 40209f10 bc42c002 000c150c 0432a3e8 ec0231cd .B.......2....1. + 40209f20 ff2d0d01 25e8c000 00222c79 9c822812 .-..%....",y..(. + 40209f30 9c42c002 00c60300 0031c7ff 0c150c04 .B.......1...... + 40209f40 2d0d011d e8c00000 08b1c8a1 d891e881 -............... + 40209f50 f87112c1 300df000 12c1e0f9 31fd0221 .q..0.......1..! + 40209f60 01dfc961 e9410971 d951e852 22d20322 ...a.A.q.Q.R".." + 40209f70 02440c1c 22c201c7 2241e03c a0322326 .D.."..."A.<.2#& + 40209f80 fc033173 fc42a5de 22a13401 31e0c000 ..1s.B..".4.1... + 40209f90 00e0eca0 226e26dd 02ac1222 d2017bcc ...."n&...."..{. + 40209fa0 c2420822 2e260c64 3d0f011a dcc00000 .B.".&.d=....... + 40209fb0 86020000 1bccc0c0 7486eeff 0c0d0871 ........t......q + 40209fc0 2d0dc861 d851e841 f83112c1 200df000 -..a.Q.A.1.. ... + 40209fd0 12c1d0c2 610ac1e3 ded991e9 8109b1f9 ....a........... + 40209fe0 71dd0222 dc033202 44e85c1b 330c1227 q.."..2.D.\.3..' + 40209ff0 236ef2c2 24e04fa0 4824d794 5bc2dd01 #n..$.O.H$..[... + 4020a000 220c08e0 ffa02b22 85361922 2d41459f ".....+".6."-AE. + 4020a010 02220c08 31d4de42 a5f53022 a0222263 ."..1..B..0".""c + 4020a020 314cfc01 39ddc000 00220c08 31cede22 1L..9...."..1.." + 4020a030 c2600c06 30c2a069 3c0c13d0 2d206261 .`..0..i<...- ba + 4020a040 0045f8fb 3143fc42 a5f82d0d 012fddc0 .E..1C.B..-../.. + 4020a050 00006801 692fc601 001b2220 207446e3 ..h.i/...." tF. + 4020a060 ff08b1c8 a1d891e8 81f87112 c1300df0 ..........q..0.. + 4020a070 6d0221bc de12c1d0 d9915852 0c0dc9a1 m.!.......XR.... + 4020a080 f97109b1 e981cd0d fd0222df 03220244 .q........"..".D + 4020a090 1b22c722 3a220600 076205d2 25268609 .".":"...b..%&.. + 4020a0a0 00e2cc24 502ea038 229cb32d 060c6459 ...$P..8"..-..dY + 4020a0b0 01691101 dadec000 00580168 11cc7250 .i.......X.h..rP + 4020a0c0 eea0d82e 06020000 1bccc0c0 7446eeff ............tF.. + 4020a0d0 08b12d0d c8a1d891 e881f871 12c1300d ..-........q..0. + 4020a0e0 f0000000 90022340 7f022340 12c1d0d9 ......#@..#@.... + 4020a0f0 91dd0222 a1102a23 c9a109b1 e981f971 ..."..*#.......q + 4020a100 cd0301ae e7c00000 222d2627 9c020632 ........"-&'...2 + 4020a110 00221c0d 2020d4ac 12291122 0c05720c .".. ...)."..r. + 4020a120 04290162 0c03520c 02420c01 320c0021 .).b..R..B..2..! + 4020a130 edff01c6 dfc00000 46020000 21ebff01 ........F...!... + 4020a140 c3dfc000 00221c0d 16620821 2ee92802 ....."...b.!..(. + 4020a150 164204e1 fffb42a6 393d0e2c c201bcdf .B....B.9=.,.... + 4020a160 c00000dd 02acf20c 6ff9024d 0f3d0c4b ........o..M.=.K + 4020a170 2201a8db c0000022 1c0d4d0d 224d0a3d "......"..M."M.= + 4020a180 0f1c5201 29e9c000 008cb242 a6403d0e ..R.)......B.@=. + 4020a190 2d0d01dd dcc00000 e21c0d2d 0c456e01 -..........-.En. + 4020a1a0 0c0de0e0 b47d024d 0c3d0dd9 11d9016d .....}.M.=.....m + 4020a1b0 0e5d0e0c 12454416 321c0d41 6ade7ce2 .]...ED.2..Aj.|. + 4020a1c0 00134020 32812214 ed202310 2254edd2 ..@ 2.".. #."T.. + 4020a1d0 5c0d2d0c 10112085 dfff08b1 c8a1d891 \.-... ......... + 4020a1e0 e881f871 12c1300d f0000000 6e022340 ...q..0.....n.#@ + 4020a1f0 57022340 00c0ffff 20022340 8483fe3f W.#@.... .#@...? + 4020a200 12c1c0c9 e1cd0331 8cdfd9d1 e9c1dd02 .......1........ + 4020a210 ed042d0c 0c6409f1 f2610b01 80dec000 ..-..d...a...... + 4020a220 00dc421c 143d0e2d 0dc5baf8 21f0ff01 ..B..=.-....!... + 4020a230 87dfc000 00060800 00214ade 421c0d32 .........!J.B..2 + 4020a240 12ed4753 1d21eaff 0181dfc0 000042a0 ..GS.!........B. + 4020a250 11e03e20 2d0d05b8 f83d0c2d 0dc5e8ff ..> -....=.-.... + 4020a260 06630056 f40442d2 03620444 0c1ff726 .c.V..B..b.D...& + 4020a270 dcf04044 4753091b fff0f0f4 86fbff00 ..@DGS.......... + 4020a280 0051dcff 0c180014 400048a1 505f2030 .Q......@.H.P_ 0 + 4020a290 3420525c 0d3252ed 2d0c8941 455e0188 4 R\.2R.-..AE^.. + 4020a2a0 410c0339 1139017d 026d0f5d 0f4d0c3d A..9.9.}.m.].M.= + 4020a2b0 082d0885 3416221c 0d420c01 2020d429 .-..4."..B.. .) + 4020a2c0 11220c05 320c0029 01720c04 620c0352 ."..2..).r..b..R + 4020a2d0 0c0221c9 ff015ddf c0000021 c8ff0c13 ..!...]....!.... + 4020a2e0 42020030 34203242 0031c6e8 48031624 B..04 2B.1..H..$ + 4020a2f0 063197fb 42a6e82c c20155df c00000fd .1..B..,..U..... + 4020a300 0216f204 0c52290f 3d0c0c64 22cf0401 .....R).=..d"... + 4020a310 41dbc000 00221c0d 31b9ff22 4f0a2203 A...."..1.."O.". + 4020a320 00276214 4d0f0c53 1c5201bf e8c00000 .'b.M..S.R...... + 4020a330 42a6f0dc 12c60600 0021b2e8 322200f0 B........!..2".. + 4020a340 2f20c003 0042a6f4 3182fbf0 2f20016e / ...B..1.../ .n + 4020a350 dcc00000 21aaff32 02000c42 20231017 ....!..2...B #.. + 4020a360 630a31a6 ff224300 86b8ff00 0031a3ff c.1.."C......1.. + 4020a370 0c642243 00222d24 3d0c0126 dbc00000 .d"C."-$=..&.... + 4020a380 321c0d22 2d240c04 32520d3d 0e2d0d85 2.."-$..2R.=.-.. + 4020a390 a4f8222d 2432a0ff 0c64011d dbc00000 .."-$2...d...... + 4020a3a0 222d240c 0332520d 222d3316 12042862 "-$..2R."-3...(b + 4020a3b0 2812dc22 222d3332 2c412862 052f030c (..""-32,A(b./.. + 4020a3c0 12224c18 060a0000 222c4185 6302222d ."L.....",A.c."- + 4020a3d0 333d0c28 62455b02 226c419c 12622d33 3=.(bE[."lA..b-3 + 4020a3e0 3d02520c 24286642 cc2785b3 011632fc =.R.$(fB.'....2. + 4020a3f0 08f1c8e1 d8d1e8c1 f8b112c1 400df000 ............@... + 4020a400 f4d2fe3f 12c1f009 318cf2f6 230d41fc ...?....1...#.A. + 4020a410 ff4033a0 3803c003 00460000 0c020831 .@3.8....F.....1 + 4020a420 12c1100d f0000000 24042340 01042340 ........$.#@..#@ + 4020a430 f0d2fe3f e1032340 c1032340 fcd2fe3f ...?..#@..#@...? + 4020a440 12c1c0d9 d1f9b109 f1c9e1e9 c1fd0442 ...............B + 4020a450 03014c0d 3941d0d4 10f055c0 9c0d21f8 ..L.9A....U...!. + 4020a460 f6781238 223a77fb 7757b708 86050000 .x.8":w.wW...... + 4020a470 0cf25732 1721ecff 3d0501f4 dec00000 ..W2.!..=....... + 4020a480 7cf38641 0000c812 8bcc4600 000c8cca |..A......F..... + 4020a490 cf0c828c ad31eaf6 78132823 2a2722c2 .....1..x.(#*'". + 4020a4a0 08320c01 2b732a27 27b50e21 e0ff01e7 .2..+s*''..!.... + 4020a4b0 dec00000 7ce38634 00000c05 571d0421 ....|..4....W..! + 4020a4c0 e0f65812 5a5f4be5 37e42521 d9ff0c44 ..X.Z_K.7.%!...D + 4020a4d0 3d0e01d0 dac00000 220c0526 42270c1e =......."..&B'.. + 4020a4e0 26522421 d4ff01d9 dec00000 7cd38626 &R$!........|..& + 4020a4f0 0021cfff 3d0e0c44 01c9ddc0 00006c23 .!..=..D......l# + 4020a500 16820806 f1ff0c0e 28410c64 ab321021 ........(A.d.2.! + 4020a510 2001c0da c0000016 2d053d0e 2d0145ee .......-.=.-.E. + 4020a520 ffbcc232 2225bc73 420f037c d357645b ...2"%.sB..|.Wd[ + 4020a530 320f0152 0f068043 11320f04 00331130 2..R...C.2...3.0 + 4020a540 3420420f 00404320 320f0580 33013044 4 B..@C 2...3.0D + 4020a550 20320f07 49128033 11303520 3922c602 2..I..3.05 9".. + 4020a560 00320c05 21b5ff01 b9dec000 0021b3ff .2..!........!.. + 4020a570 0c0320ee a0580e37 1511420c 013d0c2b .. ..X.7..B..=.+ + 4020a580 44404074 102120c0 05000c03 08f12d03 D@@t.! .......-. + 4020a590 c8e1d8d1 e8c1f8b1 12c1400d f0000000 ..........@..... + 4020a5a0 40a42040 7e032340 41feff12 c1f00c03 @. @~.#@A....... + 4020a5b0 22a07fc9 21093185 0801cd02 16820021 "...!.1........! + 4020a5c0 f9ff01a2 dec00000 2167dd0c 0332627d ........!g...2b} + 4020a5d0 22d20132 42f80831 2d0cc821 12c1100d "..2B..1-..!.... + 4020a5e0 f0000000 3160dd20 20743843 4203d027 ....1`. t8CB..' + 4020a5f0 14026614 3c5203d2 42c5fe40 4074f634 ..f. -..>.).- + 4020b460 0d057504 0c060c13 5d064d0e 2d068509 ..u.....].M.-... + 4020b470 150c0205 c6170c02 320cd322 4cd0224c ........2.."L."L + 4020b480 d10c2220 2320224c d322a001 0831c821 .." # "L."...1.! + 4020b490 d811e801 12c1100d f0000000 21b2d912 ............!... + 4020b4a0 c1f03222 04026103 0c022713 24422334 ..2"..a...'.$B#4 + 4020b4b0 0c129774 1c4203d3 0c022243 d02243d1 ...t.B...."C."C. + 4020b4c0 7cd22024 102243d3 c53a070c 02c5c217 |. $."C..:...... + 4020b4d0 0c120831 12c1100d f0000000 80b82040 ...1.......... @ + 4020b4e0 12c1f002 610332a0 01422207 39323109 ....a.2..B".921. + 4020b4f0 f4303420 397221f9 ff0c2305 7f150831 .04 9r!...#....1 + 4020b500 12c1100d f0000000 8c982040 12c1e0d2 .......... @.... + 4020b510 6105d194 d9c26106 c22d04e9 41f93109 a.....a..-..A.1. + 4020b520 7140f074 226c243d 020c6422 cc4850e0 q@.t"l$=..d".HP. + 4020b530 7401b8d6 c00000dc ff8cbe0c 3432a0c0 t...........42.. + 4020b540 2d0c4589 f7c60400 42a00832 a0a0c02c -.E.....B..2..., + 4020b550 204588f7 42a000c6 02008c6e 42a0b00c E..B......nB... + 4020b560 23c60000 2c040c33 d02d2045 0eff4bcc #...,..3.- E..K. + 4020b570 2d0c0192 e2c00000 31e4ff2d 0c0c0401 -.......1..-.... + 4020b580 8de3c000 002d0c0c 150c0432 a3e8018a .....-.....2.... + 4020b590 e2c00000 0871c861 d851e841 f83112c1 .....q.a.Q.A.1.. + 4020b5a0 200df000 9c83fe3f 9883fe3f 9483fe3f ......?...?...? + 4020b5b0 26721852 a07f5712 1f663227 7cf2f623 &r.R..W..f2'|..# + 4020b5c0 2421f8ff 2033a049 03060200 7cf2dc43 $!.. 3.I....|..C + 4020b5d0 21f6ff49 020c020d f07cf2cc 7321f3ff !..I.....|..s!.. + 4020b5e0 c6fbff00 7cf20df0 d0bb2040 12c1f009 ....|..... @.... + 4020b5f0 317d0226 731922a0 7f61fbff 27131d66 1}.&s."..a..'..f + 4020b600 3321f624 1e61e7ff 6064a068 06c60400 3!.$.a..`d.h.... + 4020b610 61f6ff21 e5ff8c84 06020000 00cc3421 a..!..........4! + 4020b620 e3ff6802 0c128c37 2d07c006 00083112 ..h....7-.....1. + 4020b630 c1100df0 9083fe3f 8c83fe3f 8883fe3f .......?...?...? + 4020b640 26721252 a07f5712 1a663221 7cf2dce3 &r.R..W..f2!|... + 4020b650 21f9ff86 01007cf2 dc4321f7 ff49020c !.....|..C!..I.. + 4020b660 020df000 7cf2cc63 21f5ff86 fbff7cf2 ....|..c!.....|. + 4020b670 0df00000 d4bb2040 12c1f072 03010931 ...... @...r...1 + 4020b680 6d046767 06616ef2 68166a64 72060026 m.gg.an.h.jdr..& + 4020b690 771682a0 7f87171f 66372572 060161f5 w.......f7%r..a. + 4020b6a0 ffdcf761 e4ff4604 00720601 61f2ffdc ...a..F..r..a... + 4020b6b0 1761e1ff c6000000 61e1ff68 06c60000 .a......a..h.... + 4020b6c0 0061ecff c0060008 3112c110 0df00000 .a......1....... + 4020b6d0 5125d940 40746875 0c05a7f6 7678132c Q%.@@thu....vx., + 4020b6e0 06581782 c5f88917 72130b8b 7772530b .X......r...wrS. + 4020b6f0 32028d72 c5f93248 00303064 60332032 2..r..2H.00d`3 2 + 4020b700 47007222 2332c5fa 72430060 642032c5 G.r"#2..rC.`d 2. + 4020b710 fb624300 42124732 c5fc4243 0042028f .bC.B.G2..BC.B.. + 4020b720 32c5fd42 43004222 2432c5fe 42430032 2..BC.B"$2..BC.2 + 4020b730 22240b55 30384132 45006222 23322224 "$.U08A2E.b"#2"$ + 4020b740 1b460c15 67340252 a0003a35 42622332 .F..g4.R..:5Bb#2 + 4020b750 62240c15 2d050df0 881312c1 f06818c9 b$..-........h.. + 4020b760 314a7652 07039d02 0c0257e5 02462a00 1JvR......W..F*. + 4020b770 21fdd858 720c02a7 75020627 00520600 !..Xr...u..'.R.. + 4020b780 22a08c20 251052a0 881c0a57 92142206 ".. %.R....W..". + 4020b790 01202014 663205a2 061e8600 00a20618 . .f2.......... + 4020b7a0 a0a03452 07002207 04805511 002211b2 ..4R.."...U..".. + 4020b7b0 07022055 20220705 c20707b0 55208022 .. U "......U ." + 4020b7c0 0190aab0 20b52080 2c11c207 06722a01 .... . .,....r*. + 4020b7d0 20cc2052 2a026607 0226051f b7970522 . R*.f..&....." + 4020b7e0 a000c715 34707bc0 22a00177 3b0222a0 ....4p{."..w;.". + 4020b7f0 00505cc0 2055c00c 02f7e51d b91ac92a .P\. U.........* + 4020b800 52292528 152a444a 46491848 252a2442 R)%(.*DJFI.H%*$B + 4020b810 130b2024 c022530b 0c12c831 12c1100d .. $."S....1.... + 4020b820 f0000000 22d2014c 330c1432 42304ce3 ...."..L3..2B0L. + 4020b830 32423142 42330c03 0cd43242 32424234 2B1BB3....2B2BB4 + 4020b840 3242350d f0000000 62a08472 22206a62 2B5.....b..r" jb + 4020b850 0c0577a5 22821602 37981488 0687040f ..w."...7....... + 4020b860 32a08050 55903055 a05a224b 220df000 2..PU.0U.Z"K"... + 4020b870 1b55cb66 86f6ff00 0c020df0 0df00000 .U.f............ + 4020b880 0df00000 3202260c 0226130b 22c3fd0c ....2.&..&.."... + 4020b890 140c3320 43832d04 0df00000 3d020c42 ..3 C.-.....=..B + 4020b8a0 2683220c 8237220c 0c022613 180c3226 &."..7"...&...2& + 4020b8b0 23138603 000c1226 e30b0c22 26f3060c #......&..."&... + 4020b8c0 52269301 0c620df0 3202010c 149c333a R&...b..2.....3: + 4020b8d0 3237120d 1b224202 011644ff 0c048600 27..."B...D..... + 4020b8e0 00000c14 2d040df0 4040749c 92720201 ....-...@@t..r.. + 4020b8f0 6d022056 c077a50f 5206021b 66505430 m. V.w..R...fPT0 + 4020b900 505064ac 5546faff 0c022713 20620301 PPd.UF....'. b.. + 4020b910 5d033025 c067a20f 2205021b 55202430 ].0%.g.."...U $0 + 4020b920 2020648c 5246faff 0c020df0 0c120df0 d.RF.......... + 4020b930 0c020df0 0c034222 1432526c 32afbf30 ......B".2Rl2..0 + 4020b940 34103262 140df000 42030062 a0dd7202 4.2b....B..b..r. + 4020b950 e04b5360 44c04035 83bcb742 a00082af .KS`D.@5...B.... + 4020b960 8092a07f 4053215a 53620508 40502457 ....@S!ZSb..@P$W + 4020b970 561d5d02 86040000 006205e1 60a06447 V.]......b..`.dG + 4020b980 9a058066 206245e1 1b552065 c07726e8 ...f bE..U e.w&. + 4020b990 1b449794 ce0df000 0df00000 32429252 .D..........2B.R + 4020b9a0 02909ca4 16e50480 45014048 31406490 ........E.@H1@d. + 4020b9b0 4046a030 33903a34 fb433034 a3303421 @F.03.:4.C04.04! + 4020b9c0 bc254202 91cc7450 53c05050 74860800 .%B...tPS.PPt... + 4020b9d0 80550180 44015058 31404831 5053c040 .U..D.PX1@H1PS.@ + 4020b9e0 44a0f044 11505590 405590fb 455054a3 D..D.PU.@U..EPT. + 4020b9f0 50547452 42913242 900df000 16840066 PTtRB.2B.......f + 4020ba00 14084202 95403380 3242950d f0000000 ..B..@3.2B...... + 4020ba10 5203011c 767cf457 b65b5203 08720277 R...v|.W.[R..r.w + 4020ba20 5060340c 0467174d 42af8040 45106242 P`4..g.MB..@E.bB + 4020ba30 7742420c 52c30a22 c27832c3 1a62a010 wBB.R..".x2..b.. + 4020ba40 42050060 44104044 21424200 42050040 B..`D.@D!BB.B..@ + 4020ba50 40344242 01420501 40403442 42024205 @4BB.B..@@4BB.B. + 4020ba60 01404441 42420342 05024b55 4242046b .@DABB.B..KUBB.k + 4020ba70 223795cb 0c142d04 0df00000 48728c73 "7....-.....Hr.s + 4020ba80 32a40030 34204601 0032abff 30341039 2..04 F..2..04.9 + 4020ba90 720df000 0df00000 68134040 7458160c r.......h.@@tX.. + 4020baa0 1872c5f8 79166213 0b8b6662 530b9222 .r..y.b...fbS.." + 4020bab0 23622224 1b399733 0282a000 6a683262 #b"$.9.3....jh2b + 4020bac0 23626224 32470032 222362c5 f9303841 #bb$2G.2"#b..08A + 4020bad0 32460032 c5fa0c06 6243002c 0362c5fb 2F.2....bC.,.b.. + 4020bae0 30442042 46004212 4732c5fc 42430042 0D BF.B.G2..BC.B + 4020baf0 028f32c5 fd424300 42222432 c5fe4243 ..2..BC.B"$2..BC + 4020bb00 00222224 0b552028 41224500 0c120df0 .""$.U (A"E..... + 4020bb10 881312c1 f06818c9 314ac652 0c030c07 .....h..1J.R.... + 4020bb20 57e50246 27007206 0052a08c 50571072 W..F'.r..R..PW.r + 4020bb30 a0881c09 77951652 06015050 14663507 ....w..R..PP.f5. + 4020bb40 92061e06 01000000 92061890 9034520c .............4R. + 4020bb50 01a20c00 80751152 0c04b20c 07005511 .....u.R......U. + 4020bb60 50572072 0c05a055 20807701 2099b070 PW r...U .w. ..p + 4020bb70 a520805b 117819b2 0c0650bb 20582966 . .[.x....P. X)f + 4020bb80 07022605 1aa79702 b7153670 7ac00c1c ..&.......6pz... + 4020bb90 773a010c 0c505bc0 c055c00c 07f7e523 w:...P[..U.....# + 4020bba0 a919b929 5222250c 1728152a 444a4649 ...)R"%..(.*DJFI + 4020bbb0 1848252a 2442130b 2024c022 530b8600 .H%*$B.. $."S... + 4020bbc0 00000c07 2d07c831 12c1100d f0000000 ....-..1........ + 4020bbd0 7cf20df0 7cf20df0 0c054040 74571349 |...|.....@@tW.I + 4020bbe0 68130c18 581672c5 fc791662 130b4b66 h...X.r..y.b..Kf + 4020bbf0 62530b92 22236222 241b3997 33010c08 bS.."#b"$.9.3... + 4020bc00 6a683262 23626224 3030f562 c5fe3246 jh2b#bb$00.b..2F + 4020bc10 00322223 62c5fd30 38413246 00222223 .2"#b..08A2F.""# + 4020bc20 0b552247 00424500 0c152d05 0df00000 .U"G.BE...-..... + 4020bc30 52222568 13281578 162a444a 47491648 R"%h.(.x.*DJGI.H + 4020bc40 252a2442 130b2024 c022530b 0c120df0 %*$B.. $."S..... + 4020bc50 12c1d0c2 610ad261 09e26108 f97109b1 ....a..a..a..q.. + 4020bc60 fd023c02 2243000c 02224303 0c122243 ..<."C..."C..."C + 4020bc70 02cd0338 3f0c22dd 04ed0585 9c03cc32 ...8?."........2 + 4020bc80 7cf2c635 00203875 324c0420 30f5324c |..5. 8u2L. 0.2L + 4020bc90 05203841 224c0732 4c06ab4c 388f2d04 . 8A"L.2L..L8.-. + 4020bca0 49018535 04480140 32a01622 fd204874 I..5.H.@2..". Ht + 4020bcb0 424c0922 4c08581f 0c042b23 4755180c BL."L.X...+#GU.. + 4020bcc0 02224302 0cf22243 0322afac 2243040c ."C..."C.".."C.. + 4020bcd0 12224305 0c146b23 581f1765 1b0c0552 ."C...k#X..e...R + 4020bce0 42000cf5 52420152 afac5242 020c2552 B...RB.R..RB..%R + 4020bcf0 42031b44 4b220601 001634f8 0c140c05 B..DK"....4..... + 4020bd00 52430142 4300489f 0c030c15 40359348 RC.BC.H.....@5.H + 4020bd10 bf3030f4 8c4442a2 00403320 48cf8c34 .00..DB..@3 H..4 + 4020bd20 0cc44033 20304841 42420132 42002bf2 ..@3 0HABB.2B.+. + 4020bd30 ac0ef2c2 14dadcf7 bd0286d0 ff0c0332 ...............2 + 4020bd40 42030c13 3242021c 043d0e22 c20401b1 B...2B...=.".... + 4020bd50 d4c00000 c02fc032 c2fe324c 0108b1c8 ...../.2..2L.... + 4020bd60 a1d891e8 81f87112 c1300df0 94082340 ......q..0....#@ + 4020bd70 92a09090 11c0d261 2120d220 22220102 .......a! . "".. + 4020bd80 6123c261 22e26120 17621610 31200c05 a#.a".a .b..1 .. + 4020bd90 42a0804b 2d85ebff 3d022ac1 d6420046 B..K-...=.*..B.F + 4020bda0 3f00cd01 281d07e2 02c62c00 22afdd22 ?...(.....,.".." + 4020bdb0 4c005c02 0c03224c 037c2232 4c02224c L.\..."L.|"2L."L + 4020bdc0 04324c07 0c12384d 224c0522 4c060c12 .2L...8M"L."L... + 4020bdd0 05870316 720c2038 75324c08 2030f532 ....r. 8u2L. 0.2 + 4020bde0 4c092038 41324c0a ebec383d 224c0b2d L. 8A2L...8="L.- + 4020bdf0 0e852704 16620a20 4874582d e032a042 ..'..b. HtX-.2.B + 4020be00 4c0d224c 0c0c022b 43275517 2243025c L."L...+C'U."C.\ + 4020be10 02224303 7c222243 040c1222 430542c3 ."C.|""C..."C.B. + 4020be20 0622a001 17651d0c 05524400 5c055244 ."...e...RD.\.RD + 4020be30 017c2552 44020c25 5244031b 224b44c6 .|%RD..%RD.."KD. + 4020be40 01000000 00165205 0c120c05 22430052 ......R....."C.R + 4020be50 4301c034 c022c3fe 224c0196 1304cd04 C..4.".."L...... + 4020be60 e1c3ff22 2d1442a1 4e3d0e01 a7d5c000 ..."-.B.N=...... + 4020be70 0010ccc0 0c0542a1 4fe03e20 c02c2001 ......B.O.> ., . + 4020be80 a1d5c000 00226d14 9c223d01 4d0c0161 ....."m.."=.M..a + 4020be90 d4c00000 0c03c26d 15c60000 00007cf3 .......m......|. + 4020bea0 02212392 a0902d03 c22122d2 2121e221 .!#...-..!".!!.! + 4020beb0 209a110d f0000000 12c1e0c9 61d951e9 ...........a.Q. + 4020bec0 41f93109 718d0442 afdd4242 004b475a A.1.q..B..BB.KGZ + 4020bed0 44424201 30487542 42023040 f5424203 DBB.0HuBB.0@.BB. + 4020bee0 6bc23048 41424204 324205dd 052d0cfd k.0HABB.2B...-.. + 4020bef0 064d053d 0870e720 dacc0146 d4c00000 .M.=.p. ...F.... + 4020bf00 8ccf2d0c 4d0e3d0f 0143d4c0 0000eacc ..-.M.=..C...... + 4020bf10 08712d0c d851c861 e841f831 12c1200d .q-..Q.a.A.1.. . + 4020bf20 f0000000 12c1b0c2 6112d261 11f9f102 ........a..a.... + 4020bf30 6113e261 107d02cd 03fd04dd 05165210 a..a.}........R. + 4020bf40 1623108c 14564500 0c12863e 00e20400 .#...VE....>.... + 4020bf50 32a00122 ced0e2a0 0220e393 38170ca2 2.."..... ..8... + 4020bf60 378e0246 38007991 4d013d05 2d0f662e 7..F8.y.M.=.-.f. + 4020bf70 12051a03 38112981 0c22856c 0338210c ....8.)..".l.8!. + 4020bf80 22860400 c5320332 21012261 0822a001 "....2.2!."a.".. + 4020bf90 056b0338 210c12c5 6a032881 78915662 .k.8!...j.(.x.Vb + 4020bfa0 fa384748 210c2237 14028626 00282738 .8GH!."7...&.('8 + 4020bfb0 31203310 0c4216e3 080c1207 e3010c22 1 3..B........." + 4020bfc0 226c6528 11662e04 38974600 00383730 "le(.f..8.F..870 + 4020bfd0 32100c32 1603070c 82278307 4c022783 2..2.....'..L.'. + 4020bfe0 0222a002 226c6432 0f003c02 2793040c .".."ld2..<.'... + 4020bff0 22460000 0c12226c 63222c61 9c92322c "F...."lc",a..2, + 4020c000 62d73314 222c614d 0d3d0f01 02d4c000 b.3.",aM.=...... + 4020c010 000c02d2 6c62860b 00e154ff 42a273e0 ....lb....T.B.s. + 4020c020 3e200139 d5c00000 0c0542a2 743d0ed0 > .9......B.t=.. + 4020c030 2d200134 d5c00000 226c6156 52fc0c62 - .4...."laVR..b + 4020c040 06010000 00000c52 022113c2 2112d221 .......R.!..!..! + 4020c050 11e22110 f8f112c1 500df000 01f25000 ..!.....P.....P. + 4020c060 04ac0f00 01ac0f00 03ac0f00 12c1f0c9 ................ + 4020c070 21cd04d9 11e901dd 03ed020c 032c442d !............,D- + 4020c080 0c026103 01e3d3c0 00000b3d 81f6ff91 ..a........=.... + 4020c090 f6ffb1f3 ffda5e2d 0e62a0dd 3a3e3c07 ......^-.b..:><. + 4020c0a0 1c3a1b42 57340246 3e00d202 00679d0b .:.BW4.F>....g.. + 4020c0b0 37920246 3b004202 0116740e 4202012b 7..F;.B...t.B..+ + 4020c0c0 e4eae2e7 b5020635 00779d0b 292c4202 .......5.w..),B. + 4020c0d0 012b4449 3cc62e00 671d0246 2d001624 .+DI<...g..F-..$ + 4020c0e0 0cb6643b e20202d2 020380ee 0100dd11 ..d;............ + 4020c0f0 d0de20e2 0205e0ed 20d20204 80dd11d0 .. ..... ....... + 4020c100 de20e1d6 ffe79d17 d2020666 1d11d202 . .........f.... + 4020c110 07ccbd29 0c420201 2b44491c 061d0000 ...).B..+DI..... + 4020c120 5bd257bd 2b47ba28 42020280 d4014202 [.W.+G.(B.....B. + 4020c130 03004411 404d20d2 0205d0d4 20420204 ..D.@M ..... B.. + 4020c140 80441140 4d20b794 0a6b4249 4cc61000 .D.@M ...kBIL... + 4020c150 00b6743f 42020280 d4014202 03004411 ..t?B.....B...D. + 4020c160 404d20d2 0205d0d4 20420204 80441140 @M ..... B...D.@ + 4020c170 4d208794 0f6b4249 5c420201 42c4fc49 M ...kBI\B..B..I + 4020c180 6cc60300 0097940b 6b42497c 42020142 l.......kBI|B..B + 4020c190 c4fc498c 4202012b 444a22c6 c0ff7cf2 ..I.B..+DJ"...|. + 4020c1a0 86000000 0c020831 c821d811 e80112c1 .......1.!...... + 4020c1b0 100df000 38d9fe3f 34d9fe3f da082340 ....8..?4..?..#@ + 4020c1c0 12c1f0c9 210931d9 11cd02ac 22322267 ....!.1....."2"g + 4020c1d0 0cf23732 1b21f7ff 0c042023 a0490241 ..72.!.... #.I.A + 4020c1e0 f6ff7ce2 00134020 32812804 20231029 ..|...@ 2.(. #.) + 4020c1f0 04222c12 8cc2381c 28330b22 293322a0 .",...8.(3.")3". + 4020c200 00226c12 d1eeff22 2c5b3d0d 42a2cc01 ."l....",[=.B... + 4020c210 bed4c000 00222c61 d03d2042 a2cd01ba .....",a.= B.... + 4020c220 d4c00000 3d0d2d0c 42a2ce01 b7d4c000 ....=.-.B....... + 4020c230 000831c8 21d81112 c1100df0 cd082340 ..1.!.........#@ + 4020c240 48ba0040 12c180c2 611e3261 18cd0222 H..@....a.2a..." + 4020c250 c3482c03 02611fc5 4603d642 007cf206 .H,..a..F..B.|.. + 4020c260 160042a0 0632cc58 22c13001 6ad3c000 ..B..2.X".0.j... + 4020c270 0022c136 45910132 c16042a0 0422c13e .".6E..2.`B..".> + 4020c280 0165d3c0 000032a0 2022c110 45430396 .e....2. "..EC.. + 4020c290 a2fc21ea ff1c0432 c142c5de 04722118 ..!....2.B...r!. + 4020c2a0 2c033901 72c7241c 2652c130 42c14222 ,.9.r.$.&R.0B.B" + 4020c2b0 c11001e3 ffc00000 202f3102 211f92a0 ........ /1.!... + 4020c2c0 80c2211e 9a110df0 a2082340 92a0a090 ..!.......#@.... + 4020c2d0 11c0e261 24e2a0a8 eae3c261 26c2c324 ...a$......a&..$ + 4020c2e0 5d02d261 252c04dd 032d0e3d 0c026127 ]..a%,...-.=..a' + 4020c2f0 52611cf2 61230147 d3c00000 2d0c2c03 Ra..a#.G....-.,. + 4020c300 059e0321 f1ff32c1 4e1c84c5 d7045221 ...!..2.N.....R! + 4020c310 1c0c6432 c55822c1 10f85dc8 6d013dd3 ..d2.X"...].m.=. + 4020c320 c0000042 a020e03e 2022c116 013ad3c0 ...B. .> "...:.. + 4020c330 000022c1 36c2cc02 058501b0 cc11cacd ..".6........... + 4020c340 1c0322c1 3ec53703 8bcc20ef 31f9017d ..".>.7... .1..} + 4020c350 0c52c110 42c14e2c 0322cd48 3ce601b8 .R..B.N,.".H<... + 4020c360 ffc00000 7cf30221 27203eb3 92a0a02d ....|..!' >....- + 4020c370 03c22126 d22125e2 2124f221 239a110d ..!&.!%.!$.!#... + 4020c380 f0000000 12c1c0e9 c1f9b1ed 0309f1c9 ................ + 4020c390 e1d9d132 a0627d02 fd047cf2 47b362c2 ...2.b}...|.G.b. + 4020c3a0 0e05d2ce 51802c11 c20e061c 0420cc20 ....Q.,...... . + 4020c3b0 3d0d2d01 72610401 17d3c000 001c040c =.-.ra.......... + 4020c3c0 032d0d01 13d3c000 007841c0 30246d0d .-.......xA.0$m. + 4020c3d0 5d0f4d0e 70272085 08037cfc dc423d0d ].M.p' ...|..B=. + 4020c3e0 1c042d01 010ed6c0 00000c03 0c1c20c3 ..-........... . + 4020c3f0 83c0c060 1c043d01 2d0d0106 d3c00000 ...`..=.-....... + 4020c400 2d0c08f1 c8e1d8d1 e8c1f8b1 12c1400d -.............@. + 4020c410 f0000000 12c1f0c9 21d911e9 010931ed ........!.....1. + 4020c420 03cd02d2 c230282c cc420c02 06060000 .....0(,.B...... + 4020c430 0c843d0c 2d0e01f9 d5c00000 8c62cbcc ..=.-........b.. + 4020c440 d79ce2c6 f8ff0c12 0831c821 d811e801 .........1.!.... + 4020c450 12c1100d f0000000 12c1e0c9 61d951e9 ............a.Q. + 4020c460 41f93109 71dd03cd 02e2c230 0c0f282c A.1.q......0..(, + 4020c470 9c42cc3d f92c8603 000c843d 0c2d0d01 .B.=.,.....=.-.. + 4020c480 e7d5c000 0016b2fe cbcce79c e00871c8 ..............q. + 4020c490 61d851e8 41f83112 c1200df0 4c0b2340 a.Q.A.1.. ..L.#@ + 4020c4a0 640b2340 12c1a0d2 6115e261 14f26113 d.#@....a..a..a. + 4020c4b0 026117c2 611620d2 20220300 42610c62 .a..a. . "..Ba.b + 4020c4c0 610ded03 fd050762 1b403074 2d0e2bc3 a......b.@0t-.+. + 4020c4d0 39e1c5b9 fd38e122 d2011b33 c0c07432 9....8."...3..t2 + 4020c4e0 42090609 007cb220 2d106612 0a28c19b B....|. -.f..(.. + 4020c4f0 c2c0c074 06070000 30232045 b7fd22d2 ...t....0# E..". + 4020c500 01c20208 c2cc01c0 c074cc6d 1b2c452e .........t.m.,E. + 4020c510 14863400 662d251c 843d0f22 c11001bd ..4.f-%..=.".... + 4020c520 d2c00000 0c8432cf 1822c120 01bad2c0 ......2..". .... + 4020c530 00000c84 32cf1022 c1288601 0048d13d ....2..".(...H.= + 4020c540 0f22c110 01b4d2c0 000028d1 1bfc48c1 ."........(...H. + 4020c550 29015d0e 3d0d72c1 106d0f22 a0018521 ).].=.r..m."...! + 4020c560 143180d5 0bec30cc a0222c62 c114ff8c .1....0..",b.... + 4020c570 a242a0c4 c03c2001 e4d3c000 003d0c0c .B...< ......=.. + 4020c580 0542a0c6 22a09801 dfd3c000 00cd0221 .B.."..........! + 4020c590 75d520ee a0c26e63 16bc042d 0c32a098 u. ...nc...-.2.. + 4020c5a0 01a7e5c0 00000c02 7cf41c15 c032b049 ........|....2.I + 4020c5b0 1349231b 225792f3 662d1421 b8ff226c .I#."W..f-.!.."l + 4020c5c0 250c1222 6c230c02 226c2446 05000000 %.."l#.."l$F.... + 4020c5d0 219cee26 3d0a7cb2 20dd1066 1d0521b0 !..&=.|. ..f..!. + 4020c5e0 ff226c25 f25c0002 21170c02 c22116d2 ."l%.\..!....!.. + 4020c5f0 2115e221 14f22113 12c1600d f0000000 !..!..!...`..... + 4020c600 12c1f002 6103c261 0230c320 059c0348 ....a..a.0. ...H + 4020c610 6c685c2b 54b05511 5a5c3187 d68b5545 lh\+T.U.Z\1...UE + 4020c620 e8ff0831 202f31c8 2112c110 0df00000 ...1 /1.!....... + 4020c630 12c1f0d2 6101dd02 222333c9 210931cd ....a..."#3.!.1. + 4020c640 03dcb20c 12226333 0c022263 342d0d45 ....."c3.."c4-.E + 4020c650 bfff3d0c 2d0d45c7 ff284d3d 0c05faff ..=.-.E..(M=.... + 4020c660 0831c821 d81112c1 100df000 413ed512 .1.!........A>.. + 4020c670 c1f04224 05026103 52243330 43203d02 ..B$..a.R$30C =. + 4020c680 28150587 01083112 c1100df0 b6082340 (.....1.......#@ + 4020c690 70d62040 92a0a090 11c0c261 26d26125 p. @.......a&.a% + 4020c6a0 f2612342 d2010261 27e26124 20c22032 .a#B...a'.a$ . 2 + 4020c6b0 047422a0 08294c0c 12203320 0c0d22af .t"..)L.. 3 ..". + 4020c6c0 bf202310 d9ecf2a0 8c224474 fa2c2261 . #......"Dt.,"a + 4020c6d0 1c222c65 8bfc455b 039c023d 0d2d0fc5 .",e..E[...=.-.. + 4020c6e0 f8ffdd02 16420b46 01000000 00d2211c .....B.F......!. + 4020c6f0 e22c644c 0322cefe e2a03020 e38321e3 .,dL."....0 ..!. + 4020c700 ff42a018 32c15005 9804222c 6532af7f .B..2.P...",e2.. + 4020c710 22c2800c 08302210 580c0c13 203893e9 "....0".X... 8.. + 4020c720 2122cc6c e2c11039 31290172 cc4c6d0f !".l...91).r.Lm. + 4020c730 52c55842 c1502c03 2d0de911 82611d05 R.XB.P,.-....a.. + 4020c740 db02422c 5c322c5b 2d0e85c3 ff82211d ..B,\2,[-.....!. + 4020c750 8ca2222c 65455303 16020486 dcff380c ..",eES.......8. + 4020c760 21ccff82 6c664d0c 85950322 2c65c551 !...lfM....",e.Q + 4020c770 038cd222 a08c2c04 3d0d2a2c 0126d2c0 ..."..,.=.*,.&.. + 4020c780 00000c1d 22a0acd2 6c1142a0 40e03e20 ...."...l.B.@.> + 4020c790 202c8001 20d2c000 00d26c3b 02212792 ,.. .....l;.!'. + 4020c7a0 a0a0c221 26d22125 e22124f2 21239a11 ...!&.!%.!$.!#.. + 4020c7b0 0df00000 12c1f0e2 610020e2 20222302 ........a. . "#. + 4020c7c0 c9210931 d911cd03 ac420c03 326c3232 .!.1.....B..2l22 + 4020c7d0 6c114c04 22cc6801 0ed2c000 000c1229 l.L.".h........) + 4020c7e0 6c0c2229 7c3d0c2d 0e05aeff 06170000 l.")|=.-........ + 4020c7f0 222311dc 92288316 12050c12 226c320c "#...(......"l2. + 4020c800 22226c11 284ec03c 2045dfff 060f0000 ""l.(N.< E...... + 4020c810 66222c22 2c041622 0322a001 386c226c f",",.."."..8l"l + 4020c820 32226c11 287c0c0d 397c296c d94c3d0c 2"l.(|..9|)l.L=. + 4020c830 2d0e85a9 ff283cd7 1211d93c 06030000 -....(<....<.... + 4020c840 66120828 331612fb c6f1ff00 0831c821 f..(3........1.! + 4020c850 d811e801 12c1100d f0000000 60c82040 ............`. @ + 4020c860 12c1e0c9 61c802d9 51e941f9 310971dd ....a...Q.A.1.q. + 4020c870 020c1e0c 0f9c8ce9 4cd02d20 f26c32c0 ........L.- .l2. + 4020c880 3c2005f3 ff222c32 56d2fec2 2c00c6f8 < ...",2V...,... + 4020c890 ff222d05 16c20062 a00041f0 ff5d0d3d ."-....b..A..].= + 4020c8a0 06458203 0871c861 d851e841 f83112c1 .E...q.a.Q.A.1.. + 4020c8b0 200df000 12c1e0e2 6104e140 fed951f9 .......a..@..Q. + 4020c8c0 31dd03fd 0242a1f4 3d0e22a0 60c96109 1....B..=.".`.a. + 4020c8d0 7101dfd5 c00000cd 020c0227 9c028626 q..........'...& + 4020c8e0 000c643d 0f22cc58 01cbd1c0 00004cc4 ..d=.".X......L. + 4020c8f0 3d0d4b2c 01c8d1c0 00002d0c 0547ff42 =.K,......-..G.B + 4020c900 a1fd56a2 063d0e42 a1bd22a0 d401d0d5 ..V..=.B.."..... + 4020c910 c000000c 03dd0237 123d0c1f f982284c .......7.=....(L + 4020c920 05680329 5d3d0d2d 0c8591ff d622013d .h.)]=.-.....".= + 4020c930 0e42a1d4 2d0d01f4 d2c00000 0c038605 .B..-........... + 4020c940 00003d0d 2d0cf92d 85e6ff0c 02292d3d ..=.-..-.....)-= + 4020c950 0d2d0c05 e6ff3d0d 390c2d0c 56c30122 .-....=.9.-.V.." + 4020c960 2c1442a2 033d0e01 e8d2c000 0042a204 ,.B..=.......B.. + 4020c970 2d0c3d0e 01e5d2c0 00000c02 0871c861 -.=..........q.a + 4020c980 d851e841 f83112c1 200df000 12c1f0e9 .Q.A.1.. ....... + 4020c990 01ed0331 0afed911 42a288dd 0222a1a0 ...1....B....".. + 4020c9a0 c9210931 01abd5c0 0000cd02 0c02271c .!.1..........'. + 4020c9b0 430c643d 0e8b2c01 97d1c000 0031fefd C.d=..,......1.. + 4020c9c0 280d4803 291cd26c 0022a000 2754081b (.H.)..l."..'T.. + 4020c9d0 2266b2f7 c6060000 51f7fd50 52a0c905 "f......Q..PR... + 4020c9e0 0c150012 400055a1 40452020 20744903 ....@.U.@E tI. + 4020c9f0 226c672d 0c0831c8 21d811e8 0112c110 "lg-..1.!....... + 4020ca00 0df00000 12c1f009 319cd232 225d1763 ........1..2"].c + 4020ca10 1222d201 4202740c 43303420 324274c6 ."..B.t.C04 2Bt. + 4020ca20 01000000 10112085 79ff0831 12c1100d ...... .y..1.... + 4020ca30 f0000000 07000080 68dd0040 12c1908d ........h..@.... + 4020ca40 0222211f d26119e2 61180261 1bc2611a ."!..a..a..a..a. + 4020ca50 f2611759 f179b1dd 039d04ed 06ccf222 .a.Y.y........." + 4020ca60 23640c24 22c2fe32 a0012034 9332611f #d.$"..2.. 4.2a. + 4020ca70 32211f42 211e32c3 fe39d10c 120c0340 2!.B!.2..9.....@ + 4020ca80 23832020 7429c128 d10c8550 5910f622 #. t).(...PY.." + 4020ca90 2f38c1ac a321e7ff 42211c20 2410d682 /8...!..B!. $... + 4020caa0 000b227c 83302220 1b222991 8c520c83 .."|.0" .")..R.. + 4020cab0 2033c039 91389142 211c8b23 4af28601 3.9.8.B!..#J... + 4020cac0 000c02f2 211c2991 32cf6339 a128a131 ....!.).2.c9.(.1 + 4020cad0 bbfd42a5 72526112 82611092 6111015c ..B.rRa..a..a..\ + 4020cae0 d5c00000 cd025221 12822110 92211116 ......R!..!..!.. + 4020caf0 122c48a1 28b84040 f432c4fc 224c0030 .,H.(.@@.2.."L.0 + 4020cb00 30f40c32 224c0180 23112020 f4303841 0..2"L..#. .08A + 4020cb10 30222022 4c022028 41224c03 222d6349 0" "L. (A"L."-cI + 4020cb20 e132c2fe 0c2422a0 fe302483 224c0422 .2...$"..0$."L." + 4020cb30 211f3221 1e909220 9981222d 638cc347 !.2!... .."-c..G + 4020cb40 920a2117 dd204920 4981c603 0026220c ..!.. I I....&". + 4020cb50 22211d38 81c02211 20332039 81488140 "!.8..". 3 9.H.@ + 4020cb60 2874224c 05424c06 8c45322d 64460000 (t"L.BL..E2-dF.. + 4020cb70 38482d03 326110c5 42032028 74224c07 8H-.2a..B. (t"L. + 4020cb80 3221102d 03c54103 224c0828 81d76207 2!.-..A."L.(..b. + 4020cb90 0c02224c 07224c08 52a11462 a0f05a5d .."L."L.R..b..Z] + 4020cba0 6a6d2825 3d052955 0c84cb25 52611262 jm(%=.)U...%Ra.b + 4020cbb0 61100118 d1c00000 52211262 211052c5 a.......R!.b!.R. + 4020cbc0 f45796dd 52a0fc5a 5d502520 32a00852 .W..R..Z]P% 2..R + 4020cbd0 61120511 03522112 0c843d05 9b2c010d a....R!...=..,.. + 4020cbe0 d1c00000 0c12226d 418cce2c 04e03e20 ......"mA..,..> + 4020cbf0 22cc1101 08d1c000 0038f18c 930c8422 "........8....." + 4020cc00 cc410104 d1c00000 48b10c03 0c124023 .A......H.....@# + 4020cc10 8332211e 202074dc d39cb242 211c38b1 .2!. t....B!.8. + 4020cc20 22cc6301 fcd0c000 0042211c 40287422 ".c......B!.@(t" + 4020cc30 4c61424c 62c63b00 38c116a3 0e16720e LaBLb.;.8.....r. + 4020cc40 315ffd42 a59e2d0f 0102d5c0 0000ed02 1_.B..-......... + 4020cc50 42a5a016 12154221 1c38b101 eed0c000 B.....B!.8...... + 4020cc60 0042211c 38914a2e 8c4332af dd324200 .B!.8.J..C2..2B. + 4020cc70 42210df6 243622cf ff32cff8 3032a322 B!..$6"..2..02." + 4020cc80 a0bc52cc 63e04e20 3033212a 2d8538f4 ..R.c.N 03!*-.8. + 4020cc90 16d20731 4afd42a5 b02d0c01 1bd2c000 ...1J.B..-...... + 4020cca0 0042a5b1 3146fd2d 0e464000 00381d52 .B..1F.-.F@..8.R + 4020ccb0 cc311c04 2d0532c3 34526112 01d6d0c0 .1..-.2.4Ra..... + 4020ccc0 0000281d 2c0322c2 24850103 5221121c ..(.,.".$...R!.. + 4020ccd0 043d052d 0101cfd0 c000001c 0432a0bc .=.-.........2.. + 4020cce0 3a3d4a21 01ccd0c0 000052cc 634d0f3d :=J!......R.cM.= + 4020ccf0 0e502520 52611201 c7d0c000 00522112 .P% Ra.......R!. + 4020cd00 6d0f42a1 0032a020 10212001 4bffc000 m.B..2. .! .K... + 4020cd10 00f02874 312afd22 4c61f24c 6242a5c0 ..(t1*."La.LbB.. + 4020cd20 2d0e01f9 d1c00000 28818762 1a222d3b -.......(..b."-; + 4020cd30 42a5c816 120722a0 ac58a132 211f62cc B....."..X.2!.b. + 4020cd40 514d0c2a 2d857102 2187d30c 04285232 QM.*-.q.!....(R2 + 4020cd50 a1002802 29810c32 850b1cf8 12ed020c ..(.)..2........ + 4020cd60 648b3d2d 0f01abd0 c0000028 810c6432 d.=-.......(..d2 + 4020cd70 c2334a2f 01a8d0c0 000022af 88224f0c .3J/......".."O. + 4020cd80 22af8e22 4f0d281e 48a13d0c 22c20e01 ".."O.(.H.=."... + 4020cd90 a1d0c000 0038e1eb 23225e05 222108e0 .....8..#"^."!.. + 4020cda0 3e20455e f542a5d3 3105fdc0 2c2001d6 > E^.B..1..., .. + 4020cdb0 d1c00000 02211bc2 211ad221 19e22118 .....!..!..!..!. + 4020cdc0 f2211712 c1700df0 ccda2040 e0621040 .!...p.... @.b.@ + 4020cdd0 12c1c0c9 e1d9d1f9 b10c8d09 f1e9c1fd ................ + 4020cde0 02cd03d0 d41016b3 090c0229 31222112 ...........)1"!. + 4020cdf0 49412921 222111e2 a3e82911 22211029 IA)!"!....)."!.) + 4020ce00 012d0f85 c3ff38bc 28cc8221 04d02393 .-....8.(..!..#. + 4020ce10 66120e32 2f111683 0032a1f4 e2a064d0 f..2/....2....d. + 4020ce20 e3838c7d 66120587 e802226c 6632a3e8 ...}f....."lf2.. + 4020ce30 2d0e01e6 ffc00000 b0d21120 ddc020dd -.......... .. . + 4020ce40 a032a3e8 2d0e0174 d3c00000 4111fed0 .2..-..t....A... + 4020ce50 dd115d0f d03d20c0 6c20c526 03d17be2 ..]..= .l .&..{. + 4020ce60 2d0d0156 dcc00000 422c6731 d7ff2d0d -..V....B,g1..-. + 4020ce70 0151ddc0 00000c15 0c0432a3 e82d0d01 .Q........2..-.. + 4020ce80 4edcc000 0008f1c8 e1d8d1e8 c1f8b112 N............... + 4020ce90 c1400df0 a1400000 12c1c0c2 610e32d2 .@...@......a.2. + 4020cea0 0102610f 42037420 c2200c12 20242022 ..a.B.t . .. $ " + 4020ceb0 43740c72 294c0c02 226c5829 dc28bc1b Ct.r)L.."lX).(.. + 4020cec0 2229bce6 5273322c 630c027d 02662351 ")..Rs2,c..}.f#Q + 4020ced0 322c6541 f0ff4703 4822afdd 2241101c 2,eA..G.H".."A.. + 4020cee0 42224111 0c022241 120cf222 411322af B"A..."A..."A.". + 4020cef0 ac224114 0c4272c3 80224115 22af7f20 ."A..Br.."A.".. + 4020cf00 27100c03 480c0c17 20739322 a08c2a2c '...H... s."..*, + 4020cf10 62c1168b 5c42c458 2c03456b 021c6272 b...\B.X,.Ek..br + 4020cf20 c11052a0 00226100 222c0059 21591162 ..R.."a.",.Y!Y.b + 4020cf30 cc4c42a0 883d0c85 e9ff08f1 c8e112c1 .LB..=.......... + 4020cf40 400df000 5b080000 9e080000 12c180d2 @...[........... + 4020cf50 611de261 1c32d201 02611fc2 611ef261 a..a.2...a..a..a + 4020cf60 1b420374 ed02d812 0c122024 20224374 .B.t...... $ "Ct + 4020cf70 0ca2294e 0c0229de 28be1b22 29bea652 ..)N..).(..")..R + 4020cf80 02c64a00 0c030c84 22c13001 21d0c000 ..J.....".0.!... + 4020cf90 00280e32 2e636222 14b22215 66132028 .(.2.cb"..".f. ( + 4020cfa0 1217626c 2206012b 22b7a264 4206003c ..bl"..+"..dB..< + 4020cfb0 0337945c 2a66b206 012bbb86 14000000 .7.\*f...+...... + 4020cfc0 66234dc2 2d062222 12c2cc02 b0cc11c0 f#M.-.""........ + 4020cfd0 cd808bcc 785d9ce2 3d0722c1 10626113 ....x]..=."..ba. + 4020cfe0 726115b2 6114c56d 02622113 722115b2 ra..a..m.b!.r!.. + 4020cff0 211496a2 0bc2c110 d86d0c1f 22c130d2 !........m..".0. + 4020d000 6110f261 11226112 9cac8b27 ba228605 a..a."a....'.".. + 4020d010 00222e5d 0c0f2025 04226111 f261107d .".].. %."a..a.} + 4020d020 0fcd0ff2 61122d0b 41c7ff31 64fc0c05 ....a.-.A..1d... + 4020d030 626113b2 61147261 150132d1 c00000dd ba..a.ra..2..... + 4020d040 02622113 b2211416 52064d0b 3d0601f1 .b!..!..R.M.=... + 4020d050 cfc00000 b2211472 2115ba2d 9c9c4221 .....!.r!..-..B! + 4020d060 106d0c40 30143241 380c0332 413931fd .m.@0.2A8..2A91. + 4020d070 fb0c2542 c13805e4 fe322110 c80e3911 ..%B.8...2!...9. + 4020d080 d022c032 21112901 52211222 a1c842a3 .".2!.).R!."..B. + 4020d090 c8304283 f9213d0e 2d0c7d0d 62ce4c05 .0B..!=.-.}.b.L. + 4020d0a0 d3ff41a9 ff3145fc 2d0d0117 d1c00000 ..A..1E.-....... + 4020d0b0 02211f92 a080c221 1ed2211d e2211cf2 .!.....!..!..!.. + 4020d0c0 211b9a11 0df00000 83090000 98090000 !............... + 4020d0d0 12c1a0d2 6115e261 1432d201 026117c2 ....a..a.2...a.. + 4020d0e0 6116f261 13420374 dd02e812 0c122024 a..a.B.t...... $ + 4020d0f0 20224374 0c12295d 28cd1b22 226d0ca6 "Ct..)](..""m.. + 4020d100 5202c630 00322d63 22a00066 1302226d R..0.2-c"..f.."m + 4020d110 5729dd0c 840c0322 c13001bd cfc00000 W).....".0...... + 4020d120 c86e280d 2bccb0cc 11222212 cace8bcc .n(.+....""..... + 4020d130 8cc2385e 22c110c5 580296b2 08c2c110 ..8^"...X....... + 4020d140 322d6328 5e662337 41e0ff31 1cfc0c05 2-c(^f#7A..1.... + 4020d150 8b2201ec d0c00000 fd0216b2 06286e78 ."...........(nx + 4020d160 5e202014 22413831 bffb0c02 2241396d ^ ."A81...."A9m + 4020d170 0c0c2542 c138f02f 20c5d3fe 86010000 ..%B.8./ ....... + 4020d180 202c80c0 fc2032a0 01392138 6e422d3e ,... 2..9!8nB-> + 4020d190 3911f032 c0880d39 0122a380 32a3c040 9..2...9."..2..@ + 4020d1a0 238362a0 a84d027d 0f2d086a 6e52c130 #.b..M.}.-.jnR.0 + 4020d1b0 3d0dc5c1 ff222d63 66220d41 c4ff31ff =...."-cf".A..1. + 4020d1c0 fb2d0f01 d1d0c000 00022117 c22116d2 .-........!..!.. + 4020d1d0 2115e221 14f22113 12c1600d f0000000 !..!..!...`..... + 4020d1e0 90d62040 12c1f002 6103c261 02d9110c .. @....a..a.... + 4020d1f0 0cdd02c2 623b22a0 ac3d0c4c 04202d80 ....b;"..=.L. -. + 4020d200 0184cfc0 00006d0c 5d0c4d0c 8b3d2d0c ......m.].M..=-. + 4020d210 0529ff38 0d21f2ff c26d3c4d 0d45ea02 .).8.!...m-.E.. + 4020d280 08310c02 29bcc821 12c1100d f0000000 .1..)..!........ + 4020d290 12c1e0c9 610971d9 51e941f9 31cd02cc ....a.q.Q.A.1... + 4020d2a0 520c02c6 ed000000 22225d17 e2f2d2dc R.......""]..... + 4020d2b0 01320d74 0c222023 20e2a0cc 224d74ea .2.t." # ..."Mt. + 4020d2c0 ec222c5d 27621d32 0d7422af fd202310 .",]'b.2.t".. #. + 4020d2d0 224d7422 2c5d2762 c7c02c20 05eefe22 "Mt",]'b.., ..." + 4020d2e0 a00106de 00320d74 7ce22023 10224d74 .....2.t|. #."Mt + 4020d2f0 280c0c04 38024263 32386c47 13028635 (...8.Bc28lG...5 + 4020d300 0038ac56 d311387c 56530b38 8cac8332 .8.V..8|VS.8...2 + 4020d310 0d740c12 20232022 4d740c32 294c22a0 .t.. # "Mt.2)L". + 4020d320 ac4c040c 032a2c01 3acfc000 000c0222 .L...*,.:......" + 4020d330 6c3b298c 46820000 00389cac 93420d74 l;).F....8...B.t + 4020d340 32a00130 3420324d 7432a004 394c322c 2..04 2Mt2..9L2, + 4020d350 01c52dff 2c0322cc 4c853602 56121e0c ..-.,.".L.6.V... + 4020d360 02299c06 43000000 322c588c 932d0c85 .)..C...2,X..-.. + 4020d370 b2ffc672 00000000 384c6653 02c62800 ...r....8LfS..(. + 4020d380 f6631526 2351f633 06261334 466c0000 .c.&#Q.3.&.4Fl.. + 4020d390 2633a926 4349c669 00668302 462f000c &3.&CI.i.f..F/.. + 4020d3a0 8237320b 26637266 73020623 00066400 .72.&crfs..#..d. + 4020d3b0 0c922793 02c66000 66930246 3300c65f ..'...`.f..F3.._ + 4020d3c0 00320d74 0c122023 20224d74 0c22294c .2.t.. # "Mt.")L + 4020d3d0 0c02297c 465a0000 2d0c05e5 ff065800 ..)|FZ..-.....X. + 4020d3e0 222c6585 8a021672 15320d74 22a00120 ",e....r.2.t".. + 4020d3f0 2320224d 7422a006 294c0c03 8b2cc526 # "Mt"..)L...,.& + 4020d400 ff8cd23d 0222a08c 2c042a2c 0102cfc0 ...=."..,.*,.... + 4020d410 00000c02 226c6086 49000c03 8b2cc524 ...."l`.I....,.$ + 4020d420 ff5682f4 320d740c 12202320 224d740c .V..2.t.. # "Mt. + 4020d430 12294c0c 0229ac86 410028ec 9c02222c .)L..)..A.(...", + 4020d440 10ccb228 fc167200 2d0c8524 ff063c00 ...(..r.-..$..<. + 4020d450 28bce652 ce28dc56 22f1c638 00222c11 (..R.(.V"..8.",. + 4020d460 9c42320d 740c1220 2320224d 740c9229 .B2.t.. # "Mt..) + 4020d470 4c0c0229 bc063200 28ec1672 fd222c10 L..)..2.(..r.",. + 4020d480 5612fd28 fc56f2fb 46f2ff00 222c5d67 V..(.V..F...",]g + 4020d490 e2b528ec 16820922 2c105622 0928fc16 ..(....",.V".(.. + 4020d4a0 d208222c 11167208 320d740c 12202320 ..",..r.2.t.. # + 4020d4b0 224d740c b2294c0c 0229ec22 2c3e1622 "Mt..)L..).",>." + 4020d4c0 04222c64 85b002fd 02222c64 45ad026d .",d.....",dE..m + 4020d4d0 025d0e0c 048b3c2d 0f85fcfe 56120638 .]....<-....V..8 + 4020d4e0 0c0c1222 6c3c2883 9c82f13d ff4d0cf0 ..."l<(....=.M.. + 4020d4f0 2f2005bd 02280c6d 0c5d0228 824d0f0c / ...(.m.].(.M.. + 4020d500 0345bc02 322c630c 12279307 226c5706 .E..2,c..'.."lW. + 4020d510 01000000 226c5921 93d10c13 28522222 ...."lY!....(R"" + 4020d520 24482230 34203922 0c033242 18060400 $H"04 9"..2B.... + 4020d530 28bca652 02c6baff 28dc8c32 2d0cc5a0 (..R....(..2-... + 4020d540 ff222c5d 27620206 5fff386c cc43222c .",]'b.._.8l.C", + 4020d550 5a167202 420d740c 12202420 224d740c Z.r.B.t.. $ "Mt. + 4020d560 02295c27 130a320d 747ce220 2310224d .)\'..2.t|. #."M + 4020d570 740c0229 cc226c5a 062f0000 285c2612 t..)."lZ./..(\&. + 4020d580 2e8cf266 22028626 00663202 06250046 ...f"..&.f2..%.F + 4020d590 29000000 222c12cc d2222c63 26120246 )...",...",c&..F + 4020d5a0 2500222c 5716f208 2d0c45b2 ffc62100 %.",W...-.E...!. + 4020d5b0 28ecbcb2 222c10fc 6228fcfc 22222c11 (...",..b(.."",. + 4020d5c0 acd2320d 740c1220 2320224d 740c2229 ..2.t.. # "Mt.") + 4020d5d0 5c0c0229 ec222c12 8c62381c 28330b22 \..).",..b8.(3." + 4020d5e0 29330c02 226c1229 cc0c1222 6c598611 )3.."l.)..."lY.. + 4020d5f0 0028cca6 5227320d 740c1220 2320224d .(..R'2.t.. # "M + 4020d600 740c3229 5c222c12 8c62381c 28330b22 t.2)\",..b8.(3." + 4020d610 29330c02 226c120c 1229ac46 060028dc )3.."l...).F..(. + 4020d620 46e0ff00 320d7422 a0012023 20224d74 F...2.t".. # "Mt + 4020d630 22a00022 6c0529cc 222c5d27 62024621 ".."l.).",]'b.F! + 4020d640 ff280c38 1cc516ff 222c5d07 6202c61b .(.8....",].b... + 4020d650 ff280c28 02222232 5652c606 1aff0871 .(.(.""2VR.....q + 4020d660 c861d851 e841f831 12c1200d f0000000 .a.Q.A.1.. ..... + 4020d670 12c1f002 61033023 2032a000 3262660c ....a.0# 2..2bf. + 4020d680 1339d2c5 c0ff0831 12c1100d f0000000 .9.....1........ + 4020d690 12c1f009 312d038c 830c1332 62580c03 ....1-.....2bX.. + 4020d6a0 32623bc5 beff0831 12c1100d f0000000 2b;....1........ + 4020d6b0 12c1f0c9 214d0209 31d911cd 037cf216 ....!M..1....|.. + 4020d6c0 f4042814 16820416 53042223 5d376217 ..(.....S."#]7b. + 4020d6d0 22a0fc3c 040c0320 2c80014d cec00000 "..<... ,..M.... + 4020d6e0 0c12299c 06080000 32d30142 03740c82 ..).....2..B.t.. + 4020d6f0 20242022 43740c1d d96c2d0c 05b9ffd7 $ "Ct...l-..... + 4020d700 120f0c02 296cd98c 2d0c45b8 ff460000 ....)l..-.E..F.. + 4020d710 7cf20831 c821d811 12c1100d f0000000 |..1.!.......... + 4020d720 00280000 00080000 12c190e2 6118f261 .(..........a..a + 4020d730 1702611b c2611ad2 611929e1 59d1fd03 ..a..a..a.).Y... + 4020d740 ed0416f2 3638120c 040c1230 42833d04 ....68.....0B.=. + 4020d750 42a06257 b4010c02 20232007 6202c6d4 B.bW.... # .b... + 4020d760 00160f35 c20e0532 0e62802c 11c20e06 ...5...2.b.,.... + 4020d770 20cc2022 0e618022 11203320 39c138d1 . ".a.". 3 9.8. + 4020d780 48c122c3 9d47b202 46ca0032 2f63220e H."..G..F..2/c". + 4020d790 0466230f 26221532 af023a22 56523186 .f#.&".2..:"VR1. + 4020d7a0 02000000 32a0fe37 1202c6c1 0021dcff ....2..7.....!.. + 4020d7b0 203c1020 20f42793 0ec02a04 0c430c6d <. .'...*..C.m + 4020d7c0 20d38346 12000000 d7ec150c 3db7ec17 ..F........=... + 4020d7d0 0c2d376c 1258c10c 020c1d50 d2938601 .-7l.X.....P.... + 4020d7e0 000c5d46 0a000000 222f640c 0542c2f8 ..]F...."/d..B.. + 4020d7f0 0c163d05 4036834d 0332c2c0 2d053026 ..=.@6.M.2..-.0& + 4020d800 83202420 571208c0 20242622 0206a900 . $ W... $&".... + 4020d810 21c5ff20 2c1029f1 9ce2222f 60acb232 !.. ,.)..."/`..2 + 4020d820 a1750c84 303f8022 ce0901fc d0c00000 .u..0?."........ + 4020d830 e6120286 9f008604 00009b5e 22a0fc3d ...........^"..= + 4020d840 05202f80 526110c5 bcfe9c62 262d0286 . /.Ra.....b&-.. + 4020d850 8900285f 26120286 9600222f 3b164225 ..(_&....."/;.B% + 4020d860 06290000 56dd2452 a12c5a5f 3221102d .)..V.$R.,Z_2!.- + 4020d870 05526111 c5b9fe52 211116f2 22284f26 .Ra....R!..."(O& + 4020d880 9202c689 0042a020 32ce1122 cf6c01e3 .....B. 2..".l.. + 4020d890 d0c00000 52211116 222132df 01420374 ....R!.."!2..B.t + 4020d8a0 4c022024 20224374 3221102d 0585bafe L. $ "Ct2!.-.... + 4020d8b0 322f0422 c3f9b622 02c67100 222f0122 2/."..."..q."/." + 4020d8c0 223456f2 1e32210c 4d0122ce 63c579fe "4V..2!.M.".c.y. + 4020d8d0 96121e58 216831cc 25580168 11322f63 ...X!h1.%X.h.2/c + 4020d8e0 0c026623 13222f65 32afdf22 c2e03032 ..f#."/e2.."..02 + 4020d8f0 100c1422 a0003024 83322f61 16531b42 ..."..0$.2/a.S.B + 4020d900 2f62c5ba 0156c21a 776c0286 690087ec /b...V..wl..i... + 4020d910 02066800 0c02226f 11222f3b 16820a22 ..h..."o."/;..." + 4020d920 2f5d6762 02c62700 22a0ac48 d13d0e2a /]gb..'."..H.=.* + 4020d930 2f05a5fe 56d2170c 1538e121 55fb526f /...V....8.!U.Ro + 4020d940 114d0f52 6111c577 0221c0df 019cd9c0 .M.Ra..w.!...... + 4020d950 00000c02 48f1226f 66522111 27146d22 ....H."ofR!.'.m" + 4020d960 2f1116f2 1422a175 526f600c 849b3e20 /....".uRo`...> + 4020d970 2f8001a8 cdc00000 666d0286 4d00a76c /.......fm..M..l + 4020d980 0f0c1222 6f580c02 226f3b06 1d000000 ..."oX.."o;..... + 4020d990 0037ecec 58c15665 0132210e 21b0fb42 .7..X.Ve.2!.!..B + 4020d9a0 a0000572 0228e10c 0345ebfe c6140000 ...r.(...E...... + 4020d9b0 32210c10 412022ce 63056bfe 5692fd22 2!..A ".c.k.V.." + 4020d9c0 2107fcd2 46f4ff00 28f15672 0e22a0fc !...F...(.Vr.".. + 4020d9d0 202f8032 ce092261 0cc5a7fe 22a12c3c /.2.."a....".,< + 4020d9e0 04ccbd38 c12a2f01 8bcdc000 00c60200 ...8.*/......... + 4020d9f0 32a00020 2f800186 cdc00000 28c10c03 2.. /.......(... + 4020da00 45a5fed1 eef9222f 5b42a502 3d0d01be E....."/[B..=... + 4020da10 cec00000 28d10c05 42a5033d 0d01b9ce ....(...B..=.... + 4020da20 c0000022 6f5b16b2 0848d13d 0e0179cd ..."o[...H.=..y. + 4020da30 c0000028 d142df01 52047422 6f5cc029 ...(.B..R.t"o\.) + 4020da40 04b03211 22afdf20 25103022 20224474 ..2.".. %.0" "Dt + 4020da50 48f10c12 0c0329ef c0c30440 2383226f H.....)....@#."o + 4020da60 10c9ff2c 0432ce11 22cf6c01 6acdc000 ...,.2..".l.j... + 4020da70 002d0fc5 81ffc60e 00f63d24 160de306 .-........=$.... + 4020da80 04000000 222f5d20 26046612 27669324 ...."/] &.f.'f.$ + 4020da90 068aff26 1d02869b ff284f66 9216066e ...&.....(Of...n + 4020daa0 ff22cdfc b6320246 97ffc601 00322110 ."...2.F.....2!. + 4020dab0 2d050596 fe02211b c2211ad2 2119e221 -.....!..!..!..! + 4020dac0 18f22117 12c1700d f0000000 12c1f002 ..!...p......... + 4020dad0 610332a0 0f27332c 31b8f932 23002753 a.2..'3,1..2#.'S + 4020dae0 2331b4f9 3022a028 029c820c 0342d201 #1..0".(.....B.. + 4020daf0 32626652 04740c13 39d27cd3 30351032 2bfR.t..9.|.05.2 + 4020db00 4474c578 ff083112 c1100df0 12c1f0c2 Dt.x..1......... + 4020db10 6102d261 010931dd 02220200 451902cd a..a..1.."..E... + 4020db20 027cf296 2c01220d 01851802 3d027cf2 .|..,.".....=.|. + 4020db30 965300c0 cc11302c 200831c8 21d81112 .S....0, .1.!... + 4020db40 c1100df0 12c1f0c2 6102d261 01e26100 ........a..a..a. + 4020db50 0931dd02 cd034ae3 e71c112d 0dc5faff .1....J....-.... + 4020db60 96e20022 4c002bdd 1bcc86fa ff0c0246 ..."L.+........F + 4020db70 00007cf2 0831c821 d811e801 12c1100d ..|..1.!........ + 4020db80 f0000000 807eaa83 c7100000 12c1d0e9 .....~.......... + 4020db90 81ed022d 0109b1c9 a1d26109 f2610705 ...-......a..a.. + 4020dba0 52023801 21f8fff1 f8ff2a23 3811d14f R.8.!.....*#8..O + 4020dbb0 cdf0f382 30c541c0 ffc03039 4130ffc0 ....0.A...09A0.. + 4020dbc0 c14ccd80 32012048 75304420 d0321030 .L..2. Hu0D .2.0 + 4020dbd0 3841c022 10303420 80221120 23202921 8A.".04 .". # )! + 4020dbe0 8b310c44 2d0e010b cdc00000 f0387580 .1.D-........8u. + 4020dbf0 2f01d0df 10202320 c0cf10d0 d841d0d2 /.... # .....A.. + 4020dc00 200c4480 cc11c0cd 208b314a 2ec92101 .D..... .1J..!. + 4020dc10 01cdc000 0008b1c8 a1d891e8 81f87112 ..............q. + 4020dc20 c1300df0 e5082340 12c1d0d9 91e98109 .0....#@........ + 4020dc30 b1c9a1f9 71dd0332 0200ed02 2c222793 ....q..2....,"'. + 4020dc40 502d0e01 dbd9c000 00667211 e2ce0132 P-.......fr....2 + 4020dc50 a022e02e 20054d07 16020bc6 03002d0e .".. .M.......-. + 4020dc60 01d4d9c0 00000cf3 3712e0c6 0800e022 ........7......" + 4020dc70 c031ecff 290d0c05 42a07b22 c2010121 .1..)...B.{"...! + 4020dc80 cec00000 cd020c02 279c0246 23000609 ........'..F#... + 4020dc90 00002d0e 01c7d9c0 00007c73 30321066 ..-.......|s02.f + 4020dca0 532b31e0 ff290d0c 0542a086 1b220115 S+1..)...B...".. + 4020dcb0 cec00000 cd02480d 3d0e2d0c 01d6ccc0 ......H.=.-..... + 4020dcc0 0000280d 0c032a2c 324200c6 12006cf3 ..(...*,2B....l. + 4020dcd0 30321066 933520f1 4131d2ff 0c0542a0 02.f.5 .A1....B. + 4020dce0 8b1b2f01 08cec000 00cd0251 ceff9ca2 ../........Q.... + 4020dcf0 3d024d0f 2d0e5901 85e4ff58 019c0242 =.M.-.Y....X...B + 4020dd00 a08f3d05 2d0c0100 cec00000 0c028602 ..=.-........... + 4020dd10 00fa2c0c 03324200 f90d2d0c 08b1c8a1 ..,..2B...-..... + 4020dd20 d891e881 f87112c1 300df000 12c1f002 .....q..0....... + 4020dd30 610316e3 00620200 52a03057 9605453d a....b..R.0W..E= + 4020dd40 01860000 c5560108 3112c110 0df00000 .....V..1....... + 4020dd50 12c1f0c9 21cd04d9 11e901dd 03ed020c ....!........... + 4020dd60 032c442d 0c026103 01aaccc0 00000b3d .,D-..a........= + 4020dd70 81bdf891 bdf8b1ba f8da5e2d 0e62a0dd ..........^-.b.. + 4020dd80 3a3e3c07 1c3a1b42 57340246 3e00d202 :><..:.BW4.F>... + 4020dd90 00679d0b 37920246 3b004202 0116740e .g..7..F;.B...t. + 4020dda0 4202012b e4eae2e7 b5020635 00779d0b B..+.......5.w.. + 4020ddb0 292c4202 012b4449 3cc62e00 671d0246 ),B..+DI<...g..F + 4020ddc0 2d001624 0cb6643b e20202d2 020380ee -..$..d;........ + 4020ddd0 0100dd11 d0de20e2 0205e0ed 20d20204 ...... ..... ... + 4020dde0 80dd11d0 de20e19d f8e79d17 d2020666 ..... .........f + 4020ddf0 1d11d202 07ccbd29 0c420201 2b44491c .......).B..+DI. + 4020de00 061d0000 5bd257bd 2b47ba28 42020280 ....[.W.+G.(B... + 4020de10 d4014202 03004411 404d20d2 0205d0d4 ..B...D.@M ..... + 4020de20 20420204 80441140 4d20b794 0a6b4249 B...D.@M ...kBI + 4020de30 4cc61000 00b6743f 42020280 d4014202 L.....t?B.....B. + 4020de40 03004411 404d20d2 0205d0d4 20420204 ..D.@M ..... B.. + 4020de50 80441140 4d208794 0f6b4249 5c420201 .D.@M ...kBI\B.. + 4020de60 42c4fc49 6cc60300 0097940b 6b42497c B..Il.......kBI| + 4020de70 42020142 c4fc498c 4202012b 444a22c6 B..B..I.B..+DJ". + 4020de80 c0ff7cf2 86000000 0c020831 c821d811 ..|........1.!.. + 4020de90 e80112c1 100df000 ee082340 45e2fe3f ..........#@E..? + 4020dea0 12c1f038 f2c92109 31cd020c 02271338 ...8..!.1....'.8 + 4020deb0 28ececb2 31f9ff42 a1223c02 0165d0c0 (...1..B."<..e.. + 4020dec0 00003d02 29ec7cf2 9cd328fc 0139d9c0 ..=.).|...(..9.. + 4020ded0 000028ec 31f2ff2c 048b2201 4eccc000 ..(.1..,..".N... + 4020dee0 0028ec0c 1339120c 020831c8 2112c110 .(...9....1.!... + 4020def0 0df00000 12c1d0d9 91e9816d 030c0e0c ...........m.... + 4020df00 13d8e2f9 7109b1c9 a15d0440 e383fd03 ....q....].@.... + 4020df10 bc0d8bcd ac0e281d 8c422d0c 86090000 ......(..B-..... + 4020df20 3d060c64 22cd2859 11690101 3ccfc000 =..d".(Y.i..<... + 4020df30 00581168 011612fe c0c5c0c0 ef83d80d .X.h............ + 4020df40 06f3ff00 0c0208b1 c8a1d891 e881f871 ...............q + 4020df50 12c1300d f0000000 94d9fe3f 12c1c0c9 ..0........?.... + 4020df60 e1d9d1e9 c109f1f9 b1dd06cd 028d03ad ................ + 4020df70 04ed056d 07662309 22211266 c2030c02 ...m.f#."!.f.... + 4020df80 290c0c0f 892c3d0a f91c0c64 cb2c6261 )....,=....d.,ba + 4020df90 06826104 a2610501 1fccc000 00422112 ..a..a.......B!. + 4020dfa0 322111e9 5cd96c22 cc26011a ccc00000 2!..\.l".&...... + 4020dfb0 222113a8 51292122 21128841 29112221 "!..Q)!"!..A)."! + 4020dfc0 11722110 290121e4 ff6861b2 22825d0d .r!.).!..ha.".]. + 4020dfd0 4d0e2d08 3d0ac00b 0008f12d 0fc8e1d8 M.-.=......-.... + 4020dfe0 d1e8c1f8 b112c140 0df00000 18dbfe3f .......@.......? + 4020dff0 60dbfe3f 12c1e0c9 61d951cd 02dd032d `..?....a.Q....- + 4020e000 0132a008 0971010d dfc00000 21d3ff51 .2...q......!..Q + 4020e010 f8ff3222 53c2cc3d 32c3fe21 f4ff30c1 ..2"S..=2..!..0. + 4020e020 833d0cd0 25830c84 01fbcbc0 00000871 .=..%..........q + 4020e030 c861d851 12c1200d f0000000 bcdbfe3f .a.Q.. ........? + 4020e040 ccdbfe3f d4dbfe3f dadafe3f 44dbfe3f ...?...?...?D..? + 4020e050 12c1c0c9 e1c1c0ff 31f9ff22 2c4209f1 ........1..",B.. + 4020e060 6d036622 2b42a010 40218001 eacbc000 m.f"+B..@!...... + 4020e070 0031f3ff 42a00822 c12001e6 cbc00000 .1..B..". ...... + 4020e080 31f1ff0c 8422c128 01e3cbc0 000062c1 1....".(......b. + 4020e090 10522c89 322c4152 6c7e5931 71d5ff41 .R,.2,ARl~Y1q..A + 4020e0a0 eaff21ea ff661310 322c9269 11392132 ..!..f..2,.i.9!2 + 4020e0b0 2c880c16 39014604 00322c92 62610132 ,...9.F..2,.ba.2 + 4020e0c0 6102322c 88326100 622c8732 2c86c5e8 a.2,.2a.b,.2,... + 4020e0d0 ff08f120 2f31c8e1 12c1400d f0000000 ... /1....@..... + 4020e0e0 12c1c0c9 e1d9d1e9 c1f9b109 f1dd028d ................ + 4020e0f0 03220501 320500fd 06202320 3205029d ."..2.... # 2... + 4020e100 04302220 320503cd 05302220 320504ed .0" 2....0" 2... + 4020e110 07302220 32050562 21103022 20202074 .0" 2..b!.0" t + 4020e120 56d20422 dd013202 47420246 52a14630 V.."..2.GB.FR.F0 + 4020e130 44203202 485a5d30 44203202 49304420 D 2.HZ]0D 2.I0D + 4020e140 32024a30 44203202 4b302420 202074dc 2.J0D 2.K0$ t. + 4020e150 e23d052d 050c6459 41697189 51926106 .=.-..dYAiq.Q.a. + 4020e160 01adcbc0 00005841 98618851 687150c5 ......XA.a.QhqP. + 4020e170 20561606 0ce40c03 10212001 a5cbc000 V.......! ..... + 4020e180 003d0c0c 642d0101 a3cbc000 000c6432 .=..d-........d2 + 4020e190 a1403a3d 4a21019f cbc00000 2118d9eb .@:=J!......!... + 4020e1a0 3e225106 222d7fc8 12325205 bc4c1031 >"Q."-...2R..L.1 + 4020e1b0 2042a00e c02c2001 97cbc000 003d0f4d B..., ......=.M + 4020e1c0 0eeb2c01 94cbc000 00322d80 222d7fc0 ..,......2-."-.. + 4020e1d0 03008603 00005d0e 4d0f3d09 2d080528 ......].M.=.-..( + 4020e1e0 0116f2f8 08f1c8e1 d8d1e8c1 f8b112c1 ................ + 4020e1f0 400df000 00090000 12c1b0d2 6111dd02 @...........a... + 4020e200 222243e2 61109d03 8d040261 13c26112 ""C.a......a..a. + 4020e210 f9f142c2 e032afdf 0c3e3704 1522c280 ..B..2...>7..".. + 4020e220 32af7f37 020ce22d 410c1322 cef80c2e 2..7...-A..".... + 4020e230 20e39332 a1460c64 3a3d22c1 10899199 ..2.F.d:="..... + 4020e240 810174cb c0000072 c11862c1 1c5cf50c ..t....r..b..\.. + 4020e250 040c332d 0d859901 fd028891 988116e2 ..3-............ + 4020e260 08322d53 286142c3 fe0c2532 a0fe4035 .2-S(aB...%2..@5 + 4020e270 83324200 c12cfd32 2d29c0ce 208c43c1 .2B..,.2-).. .C. + 4020e280 ddffc0ce 208c4932 a60030cc 208c380c .... .I2..0. .8. + 4020e290 8330cc20 62a0fc52 a000606d 80c03821 .0. b..R..`m..8! + 4020e2a0 52420352 42043242 01c24202 0c843d06 RB.RB.2B..B...=. + 4020e2b0 5b225991 69810157 cbc00000 68810c83 ["Y.i..W....h... + 4020e2c0 2d0605a2 01386158 9122a100 52435d52 -....8aX."..RC]R + 4020e2d0 435e202c 1032c34d 0c0c20c3 937871c9 C^ ,.2.M.. ..xq. + 4020e2e0 016d0f52 c1104d0e 32cd242d 0d05dfff .m.R..M.2.$-.... + 4020e2f0 022113c2 2112d221 11e22110 f8f112c1 .!..!..!..!..... + 4020e300 500df000 12c1f00c 140c0309 3185eeff P...........1... + 4020e310 083112c1 100df000 4110ff30 30742264 .1......A..00t"d + 4020e320 530c1226 43010c22 2264430d f0000000 S..&C..""dC..... + 4020e330 84dafe3f d4dafe3f 7ad9fe3f 78d9fe3f ...?...?z..?x..? + 4020e340 a8e1fe3f 40b80040 12c1d0c9 a1e981c1 ...?@..@........ + 4020e350 02ff0c1e 09b1d991 f9718d02 00154000 .........q....@. + 4020e360 5ea10c0d 00144000 4ea121f1 ff7d0352 ^.....@.N.!..}.R + 4020e370 6c42426c 41d26c3e 0c843d0d fd067911 lBBlA.l>..=...y. + 4020e380 82610001 23cbc000 0022dc02 d2424e88 .a..#...."...BN. + 4020e390 0121e8ff 80382042 a006d26c 4fe26c3b .!...8 B...lO.l; + 4020e3a0 011dcbc0 00007811 2128ff3d 070c6401 ......x.!(.=..d. + 4020e3b0 19cbc000 0021e0ff 1c83226c 4c222c53 .....!...."lL",S + 4020e3c0 e712011c 63326c4d 422c4d31 dcff522c ....c2lMB,M1..R, + 4020e3d0 81202074 c0050042 2c4d322c 4cc02c20 . t...B,M2,L., + 4020e3e0 c5910116 5f07f02f 2001f1d7 c00000f1 ...._../ ....... + 4020e3f0 ddcde2df 02220e42 169204d1 74e2d02d .....".B....t..- + 4020e400 2001ebd7 c0000031 ceff66d2 0a2c042d ......1..f..,.- + 4020e410 0d0573ff 46090000 39014587 02855a12 ..s.F...9.E...Z. + 4020e420 380151df d66d0342 2f863167 d22c072d 8.Q..m.B/.1g.,.- + 4020e430 0d01c4ff c0000085 5b124588 020c0222 ........[.E...." + 4020e440 4e428522 04222c43 26120c31 bdff2c04 NB.".",C&..1..,. + 4020e450 2d0c01f0 cac00000 2c02298c 08b1c8a1 -.......,.)..... + 4020e460 d891e881 f87112c1 300df000 b0dafe3f .....q..0......? + 4020e470 12c1f0d9 11dd0221 b8fec921 32225409 .......!...!2"T. + 4020e480 3120c220 66930821 f9ff01cc d6c00000 1 . f..!........ + 4020e490 0831d26c 54c821d8 1112c110 0df00000 .1.lT.!......... + 4020e4a0 21aefe12 c1f00261 03326280 32210482 !......a.2b.2!.. + 4020e4b0 d2013262 8532a000 0c194262 81526282 ..2b.2....Bb.Rb. + 4020e4c0 62628372 62843262 7e0c1292 48383248 bb.rb.2b~...H82H + 4020e4d0 64c5f9ff 083112c1 100df000 12c1f0d2 d....1.......... + 4020e4e0 610120d2 200c9209 31c921e9 0130e320 a. . ...1.!..0. + 4020e4f0 c5f7ffc1 99fe222c 85c00200 2d0c8c7e ......",....-..~ + 4020e500 0c150c34 3d0d45be 010831c8 21d811e8 ...4=.E...1.!... + 4020e510 0112c110 0df00000 fcdafe3f d8d9fe3f ...........?...? + 4020e520 04e32040 01000080 a8de0040 318ecd92 .. @.......@1... + 4020e530 a0909011 c0384302 6123c261 22d26121 .....8C.a#.a".a! + 4020e540 e26120f2 611f1633 24322311 26530286 .a .a..3$2#.&S.. + 4020e550 8e00c181 fed80222 2c546682 02c63600 .......",Tf...6. + 4020e560 0cb33792 02468500 26720286 8700220d ..7..F..&r....". + 4020e570 0d67e202 46850022 dc02e212 2622dc01 .g..F.."....&".. + 4020e580 320264fd 02161306 676e5e22 2c412622 2.d.....gn^",A&" + 4020e590 0826820c 26125246 7b000c23 2c02c600 .&..&.RF{..#,... + 4020e5a0 000c331c 020c5442 6c7e2921 21dcff49 ..3...TBl~)!!..I + 4020e5b0 3129110c 82290171 8dfe41a3 fe21d6ff 1)...).q..A..!.. + 4020e5c0 62a00152 a0004599 ff96b21b 222c4f9c b..R..E.....",O. + 4020e5d0 7221d3ff 0c043d0c 85ae010c 0641d0ff r!....=......A.. + 4020e5e0 222c4f5d 0c3d0605 ae010c82 05e8ff22 ",O].=........." + 4020e5f0 2c929cf2 220f64cc d232a200 2193fe30 ,...".d..2..!..0 + 4020e600 3e1085ed ff060300 45a4ff0c 13dcb286 >.......E....... + 4020e610 f9ff0000 00976e0c 0c15318b fe4d05c0 ......n...1..M.. + 4020e620 2c2085ac 010c0222 4f640c03 420d0d22 , ....."Od..B.." + 4020e630 afbf3030 74202410 064e0000 220d0d80 ..00t $..N.."... + 4020e640 2201d672 1422dc02 f2122622 2c92cc42 "..r."....&",..B + 4020e650 0c134645 000032a0 002c0422 c11001a3 ..FE..2..,.".... + 4020e660 dfc00000 3176fe22 2c4230e3 2066222b ....1v.",B0. f"+ + 4020e670 42a01022 c1300167 cac00000 3171fe0c B..".0.g....1q.. + 4020e680 8422c140 0164cac0 0000316e fe42a008 .".@.d....1n.B.. + 4020e690 22c14801 60cac000 00e2c130 222c8962 ".H.`......0",.b + 4020e6a0 c1102261 00822c83 722c9252 c15842c1 .."a..,.r,.R.XB. + 4020e6b0 5032c15c 22c160c0 0800ece2 220160ec P2.\".`.....".`. + 4020e6c0 92322c86 22211727 9321315f fe42a006 .2,."!.'.!1_.B.. + 4020e6d0 22c15001 95ffc000 00ccf242 2c9232c1 ".P........B,.2. + 4020e6e0 102d0e01 91ffc000 00164206 222c894d .-........B.",.M + 4020e6f0 0c1b3221 8cff2023 10d69200 0b227ce3 ..2!.. #....."|. + 4020e700 30222022 c2012901 82248372 249262c1 0" "..)..$.r$.b. + 4020e710 1052c158 42c15032 c15c22c1 60c00800 .R.XB.P2.\".`... + 4020e720 56e20322 0160fc82 322c8622 21172793 V..".`..2,."!.'. + 4020e730 303145fe 0c6422c1 50017bff c00000dc 01E..d".P.{..... + 4020e740 f2422c92 32c1102d 0e0177ff c00000cc .B,.2..-..w..... + 4020e750 f232a200 213dfe30 3f1005d8 ff0c0306 .2..!=.0?....... + 4020e760 0200c58e ff5672ee 46f9ff22 0d0d3030 .....Vr.F.."..00 + 4020e770 74202064 224d0d9c 230c1346 00000ce3 t d"M..#..F.... + 4020e780 2d0c8594 01060100 0c1386a7 ff022123 -.............!# + 4020e790 92a090c2 2122d221 21e22120 f2211f9a ....!".!!.! .!.. + 4020e7a0 110df000 80200000 f8d9fe3f b8d9fe3f ..... .....?...? + 4020e7b0 c8d9fe3f acdbfe3f b4dbfe3f 40dafe3f ...?...?...?@..? + 4020e7c0 fa082340 60dafe3f 90dafe3f 10940040 ..#@`..?...?...@ + 4020e7d0 92a09090 11c0c261 22026123 cd03d261 .......a".a#...a + 4020e7e0 21e26120 f2611f32 a0620c02 47330286 !.a .a.2.b..G3.. + 4020e7f0 13024b2c 22611622 0c02320c 03802211 ..K,"a."..2...". + 4020e800 30322032 61154b33 32611832 0c010c02 02 2a.K32a.2.... + 4020e810 26330286 0a022221 1542c4fc 27b40246 &3...."!.B..'..F + 4020e820 45013221 155ce237 32028642 01320c04 E.2!.\.72..B.2.. + 4020e830 22af022a 23167200 0c022623 02060002 "..*#.r...&#.... + 4020e840 d20c0580 2d11d20c 0620dd20 d0402422 ....-.... . .@$" + 4020e850 c4ff4261 142020f4 b6220246 4d0181be ..Ba. ..".FM... + 4020e860 fd222841 80f82066 82112624 0e222842 ."(A.. f..&$."(B + 4020e870 66820246 4701376d 02c64501 222f3ecc f..FG.7m..E."/>. + 4020e880 a221c8ff 278d0246 42014606 0031a8fe .!..'..FB.F..1.. + 4020e890 42a00822 cc0901e1 ccc00000 e6120246 B.."...........F + 4020e8a0 3c01c6f6 ff0000b7 6d028639 0122a100 <.......m..9.".. + 4020e8b0 202d1022 6117dcb2 e20c6132 2115802e -."a.....a2!... + 4020e8c0 11e20c62 20ee2022 c3a15d0e e7b20246 ...b . "..]....F + 4020e8d0 30018616 001c04e2 cc513d0e 4a2101cd 0........Q=.J!.. + 4020e8e0 c9c00000 222f2a16 22451c04 32a000e0 ...."/*."E..2... + 4020e8f0 2e2001c7 c9c00000 52211832 211421aa . ......R!.2!.!. + 4020e900 ff6d0e4d 0c85b500 1c043d0e 4a2101c3 .m.M......=.J!.. + 4020e910 ccc00000 31a5ff56 2242226f 2a0c1222 ....1..V"B"o*.." + 4020e920 6f2921a2 ff4c0401 bbc9c000 00460f01 o)!..L.......F.. + 4020e930 222f5326 22020626 00c7ed02 86240022 "/S&"..&.....$." + 4020e940 2f2916e2 44422114 6614341c 0432cc31 /)..DB!.f.4..2.1 + 4020e950 4a2101b0 c9c00000 3196ff1c 0422c120 J!......1....". + 4020e960 01adc9c0 00006d0e 52cc6342 a1002c03 ......m.R.cB..,. + 4020e970 22c11001 31f8c000 00169204 06050100 "...1........... + 4020e980 e0202456 d240e2ce f862cc6b 72cc63e0 . $V.@...b.kr.c. + 4020e990 e0f42187 ff5d064d 07e03341 62611972 ..!..].M..3Aba.r + 4020e9a0 611a018a ffc00000 62211972 211a5622 a.......b!.r!.V" + 4020e9b0 3e4d0e3d 062d0701 97c9c000 00e02841 >M.=.-........(A + 4020e9c0 224c61e2 4c62520c 61802511 520c6220 "La.LbR.a.%.R.b + 4020e9d0 552037ed 02c64700 3c02270d 02c6ec00 U 7...G.<.'..... + 4020e9e0 22211716 e20b0c72 45a8ffd2 0c05320c "!.....rE.....2. + 4020e9f0 62802d11 d20c0642 c11020dd 20220c61 b.-....B.. . ".a + 4020ea00 80221120 332022cc 634534ff 28911652 .". 3 ".cE4.(..R + 4020ea10 00c7ed02 86ea0022 2f55cc82 222f56cc ......."/U.."/V. + 4020ea20 322d0fc5 6c012841 ec122861 8c525861 2-..l.(A..(a.RXa + 4020ea30 fc158614 00222f55 cc42222f 5616d2fe ....."/U.B"/V... + 4020ea40 1c132d0f c56a01c6 dd000000 00322f55 ..-..j.......2/U + 4020ea50 16a3fd48 51522f57 5794e401 70ccc000 ...HQR/WW...p... + 4020ea60 0006f6ff 00322f56 9cc3222f 4342afdf .....2/V.."/CB.. + 4020ea70 22c2e040 42100c16 0c024026 83687142 "..@B.....@&.hqB + 4020ea80 2f58c5a2 005672fb 222f5326 1202c6c1 /X...Vr."/S&.... + 4020ea90 00286116 2230222f 5656c22f 222f4556 .(a."0"/VV./"/EV + 4020eaa0 d2f9c6bc 0032df02 22034e1b 22202074 .....2..".N." t + 4020eab0 22434eb6 420922a0 0fc5e600 06b50000 "CN.B."......... + 4020eac0 22a006c5 9aff42a0 240c0322 c1100150 ".....B.$.."...P + 4020ead0 c9c00000 222f5366 2214220c 61320c62 ...."/Sf".".a2.b + 4020eae0 80221120 332042c1 1022cc63 0526ff28 .". 3 B..".c.&.( + 4020eaf0 8f567240 86b20000 222117cc 520c1286 .Vr@...."!..R... + 4020eb00 4f010000 e12cff0c 033c442d 0e526119 O....,...."! + 4020ec90 1632a000 c535ff22 df02d252 2672c110 .2...5."...R&r.. + 4020eca0 62c1345c f50c040c 332d0f45 f400ed02 b.4\....3-.E.... + 4020ecb0 16e21032 2f7f22af 8042030d 0c262024 ...2/."..B...& $ + 4020ecc0 2022430d 522f5328 4142c5fe 32a0fe40 "C.R/S(AB..2..@ + 4020ecd0 36833242 003c0330 dd103221 14d0d320 6.2B.<.0..2!... + 4020ece0 0c333242 01d24202 67950a0c 03324203 .32B..B.g....2B. + 4020ecf0 32420486 030042a0 0232cc07 22c20301 2B....B..2.."... + 4020ed00 c5c8c000 0028419b 3c0c845b 2201c1c8 .....(A.<..["... + 4020ed10 c0000028 410c0332 425d3242 5e78d122 ...(A..2B]2B^x." + 4020ed20 c24d2901 51c9fc42 211431a0 fe6d0e2d .M).Q..B!.1..m.- + 4020ed30 0fc53aff 4671ff00 0c02c6c0 00222f29 ..:.Fq......."/) + 4020ed40 1602051c 040c03e0 2e2001b1 c8c00000 ......... ...... + 4020ed50 32211452 21182195 fe4d0c6d 0e057000 2!.R!.!..M.m..p. + 4020ed60 1c043d0e 4a2101ad cbc00000 ec429bec ..=.J!.......B.. + 4020ed70 2170fd3d 0e42a008 01a7c8c0 00000c12 !p.=.B.......... + 4020ed80 226f3e21 91fe0c84 3d0e01a2 c8c00000 "o>!....=....... + 4020ed90 06c9fe00 7cf2c6a9 00218afe 42a02032 ....|....!..B. 2 + 4020eda0 cc11019e cbc00000 dc62220c 07320c08 .........b"..2.. + 4020edb0 80221120 2320322f 41262310 66831026 .". # 2/A&#.f..& + 4020edc0 b20d0c13 2d0f4530 01064cff 0066c2f1 ....-.E0..L..f.. + 4020edd0 22211632 a001326f 3b8521ff 22df02d2 "!.2..2o;.!."... + 4020ede0 522622a0 00226f92 2891dc72 72c13462 R&".."o.(..rr.4b + 4020edf0 c14c5cf5 0c040c33 2d0f45df 00ed0216 .L\....3-.E..... + 4020ee00 f2fb061f 00222116 32a00085 1eff5221 ....."!.2.....R! + 4020ee10 092168fe e8a13c44 0c035261 19017cc8 .!h....A.."!..!I.).91 + 4020ef50 388f711a fe613cfc 51f7fcf0 2f2042c1 8.q..a<.Q.../ B. + 4020ef60 34926119 85580092 211922df 01e26f2a 4.a..X..!."...o* + 4020ef70 e24264e2 2f4c926f 29d22f4d 162ee452 .Bd./L.o)./M...R + 4020ef80 cd5f62c1 4c72c134 5050f40c 040c332d ._b.Lr.4PP....3- + 4020ef90 0fc5c500 6d021682 e2522f53 28d142c5 ....m....R/S(.B. + 4020efa0 fe32a0fe 0c274037 83324200 4221140c .2...'@7.2B.B!.. + 4020efb0 13324201 0c833034 20324202 77950a0c .2B...04 2B.w... + 4020efc0 03324203 32420446 04000c24 7b3c3b22 .2B.2B.F...${<;" + 4020efd0 62611901 10c8c000 00622119 28d19b3c ba.......b!.(..< + 4020efe0 0c845b22 62611901 0bc8c000 0028d1d0 ..["ba.......(.. + 4020eff0 38743242 5dd2425e 4d0d3d0e 22c25f01 8t2B].B^M.=."._. + 4020f000 05c8c000 0028d131 edfd2c04 22c20d01 .....(.1..,."... + 4020f010 01c8c000 0028d142 211422c2 4d722113 .....(.B!.".Mr!. + 4020f020 62211951 09fc31e0 fd29012d 0f050bff b!.Q..1..).-.... + 4020f030 32211521 e4fd2c04 01f7c7c0 0000c6ae 2!.!..,......... + 4020f040 fe022123 92a090c2 2122d221 21e22120 ..!#....!".!!.! + 4020f050 f2211f9a 110df000 00ac0f00 02ac0f00 .!.............. + 4020f060 05ac0f00 32020080 43013202 01003311 ....2...C.2...3. + 4020f070 30342042 02032202 02403320 80221141 04 B.."..@3 .".A + 4020f080 f6ff2033 200c1247 132641f6 f322a080 .. 3 ..G.&A..".. + 4020f090 47131d41 f2ff0c22 47131541 f1f30c82 G..A..."G..A.... + 4020f0a0 47130d21 efff0c04 2033c022 a1003024 G..!.... 3."..0$ + 4020f0b0 930df000 00f25000 02f25000 04f25000 ......P...P...P. + 4020f0c0 05f25000 32020080 43013202 01003311 ..P.2...C.2...3. + 4020f0d0 30342042 02032202 02403320 80221141 04 B.."..@3 .".A + 4020f0e0 f5ff2033 200c1247 132641dc f322a080 .. 3 ..G.&A..".. + 4020f0f0 47131d41 f1ff0c22 47131541 f0ff0c82 G..A..."G..A.... + 4020f100 47130d21 efff0c04 2033c022 a1003024 G..!.... 3."..0$ + 4020f110 930df000 12c1d0e9 81ed04c9 a1d991cd ................ + 4020f120 02dd032c 040c032d 0e09b1f9 7101b8c7 ...,...-....q... + 4020f130 c000000c 22290e0c 82291e29 2e0c1229 ....")...).)...) + 4020f140 3e0c0229 4e296e29 5e297e7c f2f64d02 >..)N)n)^)~|..M. + 4020f150 06540042 0c003c03 7ce23714 02c65000 .T.B..<.|.7...P. + 4020f160 420c012a 3d371402 064e0032 0c038023 B..*=7...N.2...# + 4020f170 11320c02 2033207c e2261302 064900d2 .2.. 3 |.&...I.. + 4020f180 cdfc4b2c a64d0dc5 edff292e 32cdfce6 ..K,.M....).2... + 4020f190 230e8614 007cd2a6 1d028641 00464000 #....|.....A.F@. + 4020f1a0 0022a000 226e01f2 0c09d2cd fa802f11 .".."n......../. + 4020f1b0 f20c08c2 cc0a20ff 207cc216 5f0ee03f ...... . |.._..? + 4020f1c0 110c0437 ad028636 002d0c49 0145e9ff ...7...6.-.I.E.. + 4020f1d0 381e4801 20232029 1e1b444b cc32cdfc 8.H. # )..DK.2.. + 4020f1e0 f7a409dd 0306f8ff 7cb2061d 00a6236f ........|.....#o + 4020f1f0 0c02293e 520c012b 4c802511 520c0032 ..)>R..+L.%.R..2 + 4020f200 cdfa2055 207ca216 9509e065 1167a302 .. U |.....e.g.. + 4020f210 0624000c 067193f3 8191ff0c 29ad0622 .$...q......).." + 4020f220 040080b2 01220401 00221120 2b20b204 ....."...". + .. + 4020f230 03b0b220 22040280 2211202b 200c1b77 ... "...". + ..w + 4020f240 12078022 c0bd0a20 b983283e 1b66b022 ..."... ..(>.f." + 4020f250 20293e4b 4422c3fc 57a60c3d 0286efff )>KD"..W..=.... + 4020f260 7c922613 3e460e00 a6223622 04015204 |.&.>F..."6"..R. + 4020f270 00802211 20252029 4e0c02a6 83252204 ..". % )N....%". + 4020f280 03520402 80221120 2520295e 32c3f8c0 .R...". % )^2... + 4020f290 22114b44 27a3080c 02295e7c 72c60000 ".KD'....)^|r... + 4020f2a0 496e0c02 08b1c8a1 d891e881 f87112c1 In...........q.. + 4020f2b0 300df000 12c1d0e9 81ed04c9 a1d991cd 0............... + 4020f2c0 02dd032c 040c032d 0e09b1f9 710150c7 ...,...-....q.P. + 4020f2d0 c000000c 120c2329 0e293e0c 02294e29 ......#).)>..)N) + 4020f2e0 6e295e29 7e391e39 2e7cf2f6 8d02c655 n)^)~9.9.|.....U + 4020f2f0 00420c00 32a0dd7c e2371402 46520042 .B..2..|.7..FR.B + 4020f300 0c012a3d 37140286 4f00220c 024153f3 ..*=7...O."..AS. + 4020f310 80320122 0c030022 11202320 320c0530 .2."...". # 2..0 + 4020f320 3220220c 04802211 2033207c e2471302 2 "...". 3 |.G.. + 4020f330 46450032 0c078023 11320c06 2033207c FE.2...#.2.. 3 | + 4020f340 e2261302 464000d2 cdf88b2c a64d0d45 .&..F@.....,.M.E + 4020f350 d7ff292e 32cdfce6 230e8614 007cd2a6 ..).2...#....|.. + 4020f360 1d02c638 00863700 0022a000 226e01f2 ...8..7..".."n.. + 4020f370 0c0dd2cd fa802f11 f20c0cc2 cc0e20ff ....../....... . + 4020f380 207cc216 2f0ce03f 110c0437 ad02c62d |../..?...7...- + 4020f390 002d0c49 01c5d2ff 381e4801 20232029 .-.I....8.H. # ) + 4020f3a0 1e1b444b cc32cdfc f7a409dd 0306f8ff ..DK.2.......... + 4020f3b0 7cb2061e 00a62373 0c02293e 320c01d2 |.....#s..)>2... + 4020f3c0 cdfa8023 11320c00 2bcc2033 207ca216 ...#.2..+. 3 |.. + 4020f3d0 6307e043 11472d70 0c045120 f36136ff c..C.G-p..Q .a6. + 4020f3e0 7135ff1c 08409420 220c0080 a201220c q5...@. ".....". + 4020f3f0 01002211 202a20a2 0c03a0a2 20220c02 ..". * ..... ".. + 4020f400 80221120 2a200c1a 57120c0c 2a671207 .". * ..W...*g.. + 4020f410 7022c0ad 0920a883 283e1b44 a0222029 p"... ..(>.D." ) + 4020f420 3e4bccd2 cdfc3724 bec60100 7c922613 >K....7$....|.&. + 4020f430 17860400 0c02a62d 0f220c01 320c0080 .......-."..2... + 4020f440 22112023 20294e0c 0208b1c8 a1d891e8 ". # )N......... + 4020f450 81f87112 c1300df0 cca20040 28ba0040 ..q..0.....@(..@ + 4020f460 12c1d0d9 9109b1c9 a1dd0626 13052623 ...........&..&# + 4020f470 10c60a00 1c0301f8 ffc00000 cd020608 ................ + 4020f480 00006d01 1c0301f5 ffc00000 cd02cce2 ..m............. + 4020f490 1c043d01 2d0d01df c6c00000 86000000 ..=.-........... + 4020f4a0 7cfc08b1 2d0cd891 c8a112c1 300df000 |...-.......0... + 4020f4b0 0c080c19 ad032d08 7d08a029 8312c1f0 ......-.}..).... + 4020f4c0 50798360 64c07072 20093160 89833d05 Py.`d.pr .1`..=. + 4020f4d0 7cf287b7 12a02a20 01d1c9c0 00000c03 |.....* ........ + 4020f4e0 0c142034 93302060 083112c1 100df000 .. 4.0 `.1...... + 4020f4f0 92a09090 11c0f261 1f226118 326119fd .......a."a.2a.. + 4020f500 043d060c 642d05c2 6122d261 21e26120 .=..d-..a".a!.a + 4020f510 026123dd 05ed0670 c72001c0 c9c00000 .a#....p. ...... + 4020f520 0c64d632 013d0d22 c11001ba c6c00000 .d.2.=."........ + 4020f530 0c643d0e 06040000 003d0e22 c11001b5 .d=......=.".... + 4020f540 c6c00000 0c643d0d 22c11601 b2c6c000 .....d=."....... + 4020f550 00322124 2c042d0c 01b1c9c0 00002c04 .2!$,.-.......,. + 4020f560 d642013d 0c22c11c 01abc6c0 00002c04 .B.=."........,. + 4020f570 32212446 04000000 32212422 c11c01a5 2!$F....2!$".... + 4020f580 c6c00000 2c043d0c 22c13c01 a2c6c000 ....,.=.".<..... + 4020f590 00222126 72212529 01322119 22211852 ."!&r!%).2!."!.R + 4020f5a0 c1104d0f 4cc60126 f3c00000 02212392 ..M.L..&.....!#. + 4020f5b0 a090c221 22d22121 e22120f2 211f9a11 ...!".!!.! .!... + 4020f5c0 0df00000 20092340 14092340 b4b80040 .... .#@..#@...@ + 4020f5d0 12c190c2 611ae261 18c2c120 20e22021 ....a..a... . ! + 4020f5e0 f9ff4074 20f26117 42a00cfd 033d0c02 ..@t .a.B....=.. + 4020f5f0 611bd261 19526111 dd067261 1085a801 a..a.Ra...ra.... + 4020f600 72211052 211161f0 ff79c159 d17d0152 r!.R!.a..y.Y.}.R + 4020f610 c12c3d0f 0c342d0e c9b101ec ffc00000 .,=..4-......... + 4020f620 3d012d0d 1c04017b c6c00000 02211bc2 =.-....{.....!.. + 4020f630 211ad221 19e22118 f2211712 c1700df0 !..!..!..!...p.. + 4020f640 08ac0f00 4d023763 0b22c2fe 4185f231 ....M.7c."..A..1 + 4020f650 9bfe4611 0021faff 67e34417 630d22c4 ..F..!..g.D.c.". + 4020f660 fe3195fe 417efe06 0c000000 87630c22 .1..A~.......c." + 4020f670 c4fe3193 fe417afe c6070000 77630d22 ..1..Az.....wc." + 4020f680 c4fe3176 f24177f2 c6030000 000c0227 ..1v.Aw........' + 4020f690 530d22c4 fe3187fe 4170fe20 43932d04 S."..1..Ap. C.-. + 4020f6a0 0df00000 12c1f009 3145080b 083112c1 ........1E...1.. + 4020f6b0 100df000 12c1f009 3145070b 083112c1 ........1E...1.. + 4020f6c0 100df000 12c1e0c2 6106c2c3 03c0c241 ........a......A + 4020f6d0 d26105e9 41f93109 71ed02fd 0320cca0 .a..A.1.q.... .. + 4020f6e0 dd02d71c 2685040b 5d0d0c04 e035c0f7 ....&...]....5.. + 4020f6f0 33054bdd 86faff00 00044020 30913245 3.K.......@ 0.2E + 4020f700 008b441b 5566c4e3 86f9ff00 08710c02 ..D.Uf.......q.. + 4020f710 c861d851 e841f831 12c1200d f0000000 .a.Q.A.1.. ..... + 4020f720 20207451 10c96612 06326552 c6000000 tQ..f..2eR.... + 4020f730 32655342 53000df0 210bc938 424203d2 2eSBS...!..8BB.. + 4020f740 26541422 d2022202 3e22c2f9 202074f6 &T."..".>".. t. + 4020f750 220522a0 022243d2 0df00000 76092340 ".".."C.....v.#@ + 4020f760 12c1b0c2 6112c221 16d26111 e2611002 ....a..!..a..a.. + 4020f770 6113f9f1 6951dd02 5d037221 14e1f9c8 a...iQ..].r!.... + 4020f780 a64c0246 1e00284e 32af0122 2224f2d2 .L.F..(N2..""$.. + 4020f790 01620f09 ca223a36 8c136616 040c0646 .b...":6..f....F + 4020f7a0 00000c16 32a10b62 4f093a22 62420022 ....2..bO.:"bB." + 4020f7b0 0f094971 2b225961 798185bb 13620f09 ..Iq+"Yay....b.. + 4020f7c0 22211578 81586148 7129012b 663d0d0c "!.x.XaHq).+f=.. + 4020f7d0 0245fa10 620f0962 c660e026 a0f83256 .E..b..b.`.&..2V + 4020f7e0 2f0631de ff0c055c 2422a098 69610145 /.1....\$"..ia.E + 4020f7f0 c7c00000 6861fd02 e0e6a029 3e461000 ....ha.....)>F.. + 4020f800 2221151b 6c29013d 0d0c02c5 f6100b2c "!..l).=......., + 4020f810 2941e02c a0222262 f1d1ff16 92005cf4 )A.,.""b......\. + 4020f820 3d0f0139 c7c00000 3d0f0c05 42a06222 =..9....=...B.b" + 4020f830 a0980134 c7c00000 fd022841 e0e2a0f2 ...4......(A.... + 4020f840 6e6316ef 042d0f32 a09801fc d8c00000 nc...-.2........ + 4020f850 0c0242af ff52a011 f032b049 1349231b ..B..R...2.I.I#. + 4020f860 225792f3 210ef326 2d1121f5 e1263d0b "W..!..&-.!..&=. + 4020f870 22affb20 dd10661d 052109f3 226f251b ".. ..f..!.."o%. + 4020f880 cc22a08c 3851c25f 000c8420 2f8001e1 ."..8Q._... /... + 4020f890 c5c00000 022113c2 2112d221 11e22110 .....!..!..!..!. + 4020f8a0 f8f112c1 500df000 12c1e040 94205045 ....P......@. PE + 4020f8b0 20522108 09718d02 7cf2e645 0c79012d R!..q..|..E.y.- + 4020f8c0 087d062b 655d09c5 f0100871 12c1200d .}.+e].....q.. . + 4020f8d0 f0000000 12c1f0d2 6101d1a2 c8c26102 ........a.....a. + 4020f8e0 20c07428 4d4d0c32 a0c00261 03854ef3 .t(MM.2...a..N. + 4020f8f0 80cc1142 a0c0404c 202d0d0c 2305d5fa ...B..@L -..#... + 4020f900 0831c821 d81112c1 100df000 3196c812 .1.!........1... + 4020f910 c1f04223 04203220 22240009 3185a6f2 ..B#. 2 "$..1... + 4020f920 083112c1 100df000 12c1f0d2 6101d18d .1..........a... + 4020f930 c8c26102 20c07428 4d4d0c32 a0c00261 ..a. .t(MM.2...a + 4020f940 034549f3 80cc1142 a0c0404c 202d0d0c .EI....B..@L -.. + 4020f950 03c5cffa 0831c821 d81112c1 100df000 .....1.!........ + 4020f960 12c1f022 d2020261 0332023d 22c3fe20 ..."...a.2.=".. + 4020f970 2074b622 02666304 0c124603 0022c3fc t.".fc...F..".. + 4020f980 202074b6 22026673 040c22c5 98fe0831 t.".fs.."....1 + 4020f990 12c1100d f0000000 62a20c12 c1e072d2 ........b.....r. + 4020f9a0 02606280 22220402 61075207 4042073e .`b.""..a.R.@B.> + 4020f9b0 28027867 22c23379 0172c610 62c63785 (.xg".3y.r..b.7. + 4020f9c0 98fe0871 12c1200d f0000000 56092340 ...q.. .....V.#@ + 4020f9d0 38f72040 4480fe3f 40092340 0cdcfe3f 8. @D..?@.#@...? + 4020f9e0 08dcfe3f 29092340 12c1c0d9 d1d15dc8 ...?).#@......]. + 4020f9f0 c9e1c84d 09f1222c 24e9c138 22f9b107 ...M..",$..8"... + 4020fa00 6302c65c 00222226 f1f0cc42 020621ef c..\.""&...B..!. + 4020fa10 ff3d0f01 8ec9c000 00e2dd05 222e1f16 .=.........."... + 4020fa20 5200222e 20261229 4bfc2d0f 0164d1c0 R.". &.)K.-..d.. + 4020fa30 000031e7 ff42a000 f02f2001 5ed2c000 ..1..B.../ .^... + 4020fa40 003110d6 0c1542a0 00f02f20 015bd1c0 .1....B.../ .[.. + 4020fa50 0000284d 0c033242 d122dd02 2202b526 ..(M..2B.".."..& + 4020fa60 1210322c 2421d7dc 0c64016a c5c00000 ..2,$!...d.j.... + 4020fa70 c5cf0222 2c240c0f 482232a0 01303420 ...",$..H"2..04 + 4020fa80 f2421832 6202222c 24222226 22020685 .B.2b.",$""&"... + 4020fa90 920221ae e5f24200 21dbd228 0216a206 ..!...B.!..(.... + 4020faa0 312fff42 a1362cc2 016ac9c0 0000fd02 1/.B.6,..j...... + 4020fab0 512bff16 42050c06 31c4cc69 022c044b Q+..B...1..i.,.K + 4020fac0 22595169 410153c5 c0000022 2d860c64 "YQiA.S...."-..d + 4020fad0 224f2432 cc4822cf 25014ec5 c0000022 "O$2.H".%.N...." + 4020fae0 2c244d0f 22222622 0206224f 2b68411c ,$M.""&".."O+hA. + 4020faf0 52603620 01cdd2c0 00005851 8cb242a1 R`6 ......XQ..B. + 4020fb00 3f3d052d 0f0180c6 c000000c 6245adfa ?=.-........bE.. + 4020fb10 280c2202 3937e260 21afff22 02009ca2 (.".97.`!..".... + 4020fb20 222e1f8c 42222e20 26124d21 abff0147 "...B". &.M!...G + 4020fb30 c9c00000 280c4573 15060f00 213cc922 ....(.Es....!<." + 4020fb40 2203aca2 2d010cc3 013dd8c0 000051a3 "...-....=....Q. + 4020fb50 ff41a3ff 3134ee28 0c45fe18 280cc509 .A..14.(.E..(... + 4020fb60 198b4132 c1041021 20451d01 46020000 ..A2...! E..F... + 4020fb70 219dff01 36c9c000 0008f1c8 e1d8d1e8 !...6........... + 4020fb80 c1f8b112 c1400df0 12c1f009 3185e5ff .....@......1... + 4020fb90 083112c1 100df000 d4f82040 a8f82040 .1........ @.. @ + 4020fba0 60f72040 20f72040 0cf92040 88fb2040 `. @ . @.. @.. @ + 4020fbb0 2ce52040 12c1e032 a17c0971 0c083a32 ,. @...2.|.q..:2 + 4020fbc0 82625f32 626021f9 ff71f3ff 61f4ff51 .b_2b`!..q..a..Q + 4020fbd0 f4ff41f4 ff31f4ff 29018028 20058cfe ..A..1..)..( ... + 4020fbe0 21f4ff0c 33451011 087112c1 200df000 !...3E...q.. ... + 4020fbf0 12c1d040 8420d261 09f26107 dd07fd02 ...@. .a..a..... + 4020fc00 3070740c 0432a100 0c32c9a1 e9817901 0pt..2...2....y. + 4020fc10 891109b1 cd0650e0 f4851f19 78018811 ......P.....x... + 4020fc20 cc520c02 06150000 00226f7f 28124b3e .R......."o.(.K> + 4020fc30 390cebc2 16acfef2 df01320f 384d0e32 9.........2.8M.2 + 4020fc40 420e802e 112030f4 e0284120 2320224c B.... 0..(A # "L + 4020fc50 02202841 724c0122 4c034bfc 8cc83d08 . (ArL."L.K...=. + 4020fc60 2d0f01ec c4c00000 86020000 0c032d0f -.............-. + 4020fc70 01e8c4c0 00002d0c 8c0df90d 08b1c8a1 ......-......... + 4020fc80 d891e881 f87112c1 300df000 0c050c16 .....q..0....... + 4020fc90 42c2fe3d 05403683 4d037d05 32c2c030 B..=.@6.M.}.2..0 + 4020fca0 768332d2 ff2d0570 44203026 83402220 v.2..-.pD 0&.@" + 4020fcb0 0df00000 32c2d04d 020c9530 20742735 ....2..M...0 t'5 + 4020fcc0 032d030d f022c49f 202074f6 620522c4 .-...".. t.b.". + 4020fcd0 a90df000 32c4bf30 30747cf2 f6630222 ....2..00t|..c." + 4020fce0 c4c90df0 0b333a32 2043c096 f4004203 .....3:2 C....B. + 4020fcf0 000b331b 44404074 42430116 94fe0df0 ..3.D@@tBC...... + 4020fd00 82225362 22415222 42722243 26280246 ."Sb"AR"Br"C&(.F + 4020fd10 430022a0 15473203 7cf20df0 3c022243 C."..G2.|...<."C + 4020fd20 000c140c 02224303 42430266 85122243 ....."C.BC.f.."C + 4020fd30 040cf222 430522af ac224306 0c424610 ..."C.".."C..BF. + 4020fd40 00662513 2243040c f2224305 22afac22 .f%."C..."C.".." + 4020fd50 43060c22 c60a0000 66f51422 43040cf2 C.."....f.."C... + 4020fd60 22430522 afac2243 060c5206 05000000 "C.".."C..R..... + 4020fd70 66e5a422 43040cf2 22430522 afac2243 f.."C..."C.".."C + 4020fd80 060c1222 43070c12 2243080c 02224309 ..."C..."C..."C. + 4020fd90 66861422 430a0cf2 22430b22 afac2243 f.."C..."C.".."C + 4020fda0 0c0c4246 0b000000 66261422 430a0cf2 ..BF....f&."C... + 4020fdb0 22430b22 afac2243 0c0c2246 05000000 "C.".."C.."F.... + 4020fdc0 26160246 d4ff0cf4 42430b42 afac2243 &..F....BC.B.."C + 4020fdd0 0a42430c 22430d0c 1222430e 0c022243 .BC."C..."C..."C + 4020fde0 0f661713 2243100c f2224311 22afac22 .f.."C..."C.".." + 4020fdf0 43120c12 86050000 26270246 c6ff2243 C.......&'.F.."C + 4020fe00 100cf222 431122af ac224312 0c222243 ..."C.".."C..""C + 4020fe10 130c0222 43152243 141c441c 62864500 ..."C."C..D.b.E. + 4020fe20 1c724732 02c6bbff 22afdd7c 28224300 .rG2...."..|("C. + 4020fe30 5c040c02 8243040c 18224302 42430382 \....C..."C.BC.. + 4020fe40 43052243 07824306 66851022 43087c22 C."C..C.f.."C.|" + 4020fe50 22430a42 43090c42 860f0000 66251022 "C.BC..B....f%." + 4020fe60 43087c22 22430a42 43090c22 860a0000 C.|""C.BC..".... + 4020fe70 66f51122 43085c02 2243097c 2222430a f.."C.\."C.|""C. + 4020fe80 0c520605 0026e502 06a3ff22 43085c02 .R...&....."C.\. + 4020fe90 2243097c 2222430a 0c122243 0b0c1222 "C.|""C..."C..." + 4020fea0 430c0c02 22430d66 86112243 0e5c0222 C..."C.f.."C.\." + 4020feb0 430f7c22 2243100c 42c60900 66261122 C.|""C..B...f&." + 4020fec0 430e5c02 22430f7c 22224310 0c228604 C.\."C.|""C..".. + 4020fed0 00261602 0690ff5c 0442430f 7c242243 .&.....\.BC.|$"C + 4020fee0 0e424310 2243110c 12224312 0c022243 .BC."C..."C..."C + 4020fef0 13661713 2243145c 02224315 7c222243 .f.."C.\."C.|""C + 4020ff00 160c1246 0a000000 66271122 43145c02 ...F....f'."C.\. + 4020ff10 2243157c 22224316 0c228604 0026b702 "C.|""C.."...&.. + 4020ff20 067dff5c 04424315 7c242243 14424316 .}.\.BC.|$"C.BC. + 4020ff30 2243171c 641c8242 43010df0 2682150c "C..d..BC...&... + 4020ff40 87272707 262220c6 14000000 26e23c26 .''.&" .....&.<& + 4020ff50 f2260612 0066b345 0cf247a2 400c6229 .&...f.E..G.@.b) + 4020ff60 050c3246 0c000000 66c3321c f247a22d ..2F....f.2..G.- + 4020ff70 0c622905 0c228607 0032c3f3 dce30cc2 .b).."...2...... + 4020ff80 47a21a0c 0229050c 52c60200 66530ea6 G....)..R...fS.. + 4020ff90 540b0c02 29050c12 29060c02 0df07cf2 T...)...).....|. + 4020ffa0 0df00000 26d2204c 0327230b 2c032622 ....&. L.'#.,.&" + 4020ffb0 18268213 86020000 0c5326e2 0c0cd326 .&.......S&....& + 4020ffc0 f2070c03 86000000 1c032d03 0df00000 ..........-..... + 4020ffd0 0c9326d2 204c0327 230d0c23 3712160c ..&. L.'#..#7... + 4020ffe0 33268211 06030000 26e20266 f2050c63 3&......&..f...c + 4020fff0 86000000 0c032d03 0df00000 0c043763 ......-.......7c + 40210000 16424200 0cf44242 0142afac 4242020c .BB...BB.B..BB.. + 40210010 44424203 4b220c14 6763180c 05524200 DBB.K"..gc...RB. + 40210020 0cf55242 0152afac 5242020c 85524203 ..RB.R..RB...RB. + 40210030 1b444b22 1763180c 05524200 0cf55242 .DK".c...RB...RB + 40210040 0152afac 5242020c 25524203 1b444b22 .R..RB..%RB..DK" + 40210050 0763140c f50c0352 420152af ac324200 .c.....RB.R..2B. + 40210060 52420232 42031b44 2d040df0 0c043763 RB.2B..D-.....7c + 40210070 16424200 5c044242 017c2442 42020c44 .BB.\.BB.|$BB..D + 40210080 4242034b 2242a001 1763180c 05524200 BB.K"B...c...RB. + 40210090 5c055242 017c2552 42020c25 5242031b \.RB.|%RB..%RB.. + 402100a0 4422c204 0763145c 050c0352 42017c25 D"...c.\...RB.|% + 402100b0 32420052 42023242 0342c401 2d040df0 2B.RB.2B.B..-... + 402100c0 0c020df0 0c020df0 0c020df0 12c1f042 ...............B + 402100d0 22540931 303074b6 54074222 842d03c0 "T.100t.T.B".-.. + 402100e0 04000831 12c1100d f0000000 0c020df0 ...1............ + 402100f0 0c020df0 0df00000 14000060 ffff0f00 ...........`.... + 40210100 20000060 fffff9ff 202074c0 42112024 ..`.... t.B. $ + 40210110 c051faff 41f9ff80 22114a42 503310c0 .Q..A...".JBP3.. + 40210120 20003904 31f7ff3a 22c02000 480231c8 .9.1..:". .H.1. + 40210130 e0303420 c0200039 02c02000 480231f1 .04 . .9.. .H.1. + 40210140 ff303410 c0200039 020df000 00090060 .04.. .9.......` + 40210150 24021040 0400f03f 04090060 08090060 $..@...?...`...` + 40210160 880f0040 a80f0040 12c1f009 31c92120 ...@...@....1.! + 40210170 207416a2 07c1f5ff 7ce2c020 00380c0c t......|.. .8.. + 40210180 04202310 31f3ffc0 2000290c 0c8201f4 . #.1... .)..... + 40210190 ffc00000 41f0ff0c 12c02000 38042033 ....A..... .8. 3 + 402101a0 20c02000 390431ec ff0cb4c0 20004903 . .9.1..... .I. + 402101b0 31ebff0c d4c02000 4903c020 00480c3c 1..... .I.. .H.< + 402101c0 83303420 c0200039 0cc02000 480c7c93 .04 . .9.. .H.|. + 402101d0 303410c0 2000390c c0200032 2c002023 04.. .9.. .2,. # + 402101e0 20c02000 226c0022 a10001de ffc00000 . ."l."........ + 402101f0 85791002 2103c221 0212c110 80000000 .y..!..!........ + 40210200 1c000060 44171040 12c1f0c9 21d911e2 ...`D..@....!... + 40210210 610020d0 74026103 30c32001 faffc000 a. .t.a.0. ..... + 40210220 00ed02c0 2d11d022 c0d1f5ff 802211da ....-..".....".. + 40210230 d2c02000 280d31ad c337020b 01f2ffc0 .. .(.1..7...... + 40210240 0000e022 c027bce8 0831c821 d811e801 ...".'...1.!.... + 40210250 12c1100d f0000000 0df00000 dc8bfe3f ...............? + 40210260 31ffff22 43000df0 5800f03f 5400f03f 1.."C...X..?T..? + 40210270 00f00000 ffffff0f 5000f03f 5c00f03f ........P..?\..? + 40210280 ffffff00 31f9ff12 c180c020 00480331 ....1...... .H.1 + 40210290 f7ff7d01 c0200058 0331f5ff 30341041 ..}.. .X.1..04.A + 402102a0 f5ff0033 11404510 40432031 f3ff518e ...3.@E.@C 1..Q. + 402102b0 c3c02000 680331f1 ff506610 c0200038 .. .h.1..Pf.. .8 + 402102c0 0351efff 50331030 362062a0 80606280 .Q..P3.06 b..`b. + 402102d0 52020380 85015202 02005511 50582082 R.....R...U.PX . + 402102e0 02008085 20520201 4b228055 11505820 .... R..K".U.PX + 402102f0 59074b77 2796d832 61190c03 4261182d Y.Kw'..2a...Ba.- + 40210300 0342a068 3a515805 4b335a22 4793f47c .B.h:QX.K3Z"G..| + 40210310 f3202330 32211a0c 142033c0 92a0800c . #02!... 3..... + 40210320 02302493 9a110df0 d6100000 8af32240 .0$..........."@ + 40210330 12c1f0c9 21c81221 b3d00931 38029c4c ....!..!...18..L + 40210340 1623012d 0cc00300 41f8ff31 f8ff2d0c .#.-....A..1..-. + 40210350 016ec4c0 00000831 c82112c1 100df000 .n.....1.!...... + 40210360 20a10700 2800f03f 12c1f0c9 21c1fcff ...(..?....!... + 40210370 0c023d0c 093105e9 ff3d0c0c 1285e8ff ..=..1...=...... + 40210380 31f9ff7c b2c02000 48030831 202410c8 1..|.. .H..1 $.. + 40210390 21c02000 290312c1 100df000 4680fe3f !. .).......F..? + 402103a0 2030740c 140c0230 249331fc ff224300 0t....0$.1.."C. + 402103b0 0df00000 f58bfe3f e4442140 f88bfe3f .......?.D!@...? + 402103c0 f48bfe3f e88bfe3f 51f32240 e98bfe3f ...?...?Q."@...? + 402103d0 ea8bfe3f 12c1f0c2 61020261 03d911e9 ...?....a..a.... + 402103e0 0120c220 c53d0ecc 12050f0e 45890ecc . . .=......E... + 402103f0 620c02c6 28000000 0021eeff 320200dd b...(....!..2... + 40210400 02dc2321 eeff31ec ff0c0401 eacfc000 ..#!..1......... + 40210410 0022a001 224d0005 900fd1e9 ff8c4222 .".."M........B" + 40210420 0d006612 cb220d00 5652020c 1285b50f ..f.."..VR...... + 40210430 e1e3ffe0 2e2001e1 cec00000 2d0e0c15 ..... ......-... + 40210440 42a00032 a00a01dc cec00000 0c12224d B..2.........."M + 40210450 0021dcff 32020020 d22032c3 01303074 .!..2.. . 2..00t + 40210460 3242000c a237b20d 21d8ff01 f8c6c000 2B...7..!....... + 40210470 000ca222 4d0021d5 ff0ca432 0200220d ..."M.!....2..". + 40210480 002a2331 d3ff27a4 072a2322 c2f5c600 .*#1..'..*#".... + 40210490 002a230b 22c24200 7cf20831 c821d811 .*#.".B.|..1.!.. + 402104a0 e80112c1 100df000 37f32240 21aec512 ........7."@!... + 402104b0 c1f00931 3222831c b4303844 32c31d30 ...12"...08D2..0 + 402104c0 30440c12 37b40a21 f8ff01e0 c6c00000 0D..7..!........ + 402104d0 0c020831 12c1100d f0000000 12c1f009 ...1............ + 402104e0 31458610 083112c1 100df000 12c1f00c 1E...1.......... + 402104f0 02093105 3c0641bd c62030f4 47132120 ..1.<.A.. 0.G.! + 40210500 20f42022 900cb3e0 221101c3 c5c00000 . "...."....... + 40210510 2020f442 a4003d02 27b40232 a4003030 .B..=.'..2..00 + 40210520 f408312d 0312c110 0df00000 12c1f0d9 ..1-............ + 40210530 1130d0f4 c9213d0d cd024040 74e90102 .0...!=...@@t... + 40210540 6103c0dd 90455106 e2a400d7 1c2d421c a....EQ......-B. + 40210550 0021a6c6 27141c40 24900cb3 e0221101 .!..'..@$....".. + 40210560 aec5c000 002020f4 20422027 be0242a4 ..... . B '..B. + 40210570 004040f4 425c002b cc86f3ff 0831c821 .@@.B\.+.....1.! + 40210580 d811e801 12c1100d f0000000 12c1f009 ................ + 40210590 31858906 4196c620 30f44713 132020f4 1...A.. 0.G.. . + 402105a0 2022900c b3e02211 019cc5c0 00002030 "...."....... 0 + 402105b0 f408312d 0312c110 0df00000 0df00000 ..1-............ + 402105c0 a4281040 12c1e03d 010c840c 02097101 .(.@...=......q. + 402105d0 fcffc000 00280108 71202c35 12c1200d .....(..q ,5.. . + 402105e0 f0000000 2160c522 22832028 440df000 ....!`."". (D... + 402105f0 12c1f009 3145ebff 32a0ff8c 722159c5 ....1E..2...r!Y. + 40210600 32228330 3d040831 2d0312c1 100df000 2".0=..1-....... + 40210610 3155c50c 12422383 404844a6 341522d3 1U...B#.@HD.4.". + 40210620 0242020d 1cf54040 440c1257 14052223 .B....@@D..W.."# + 40210630 83202f04 0df00000 20307421 4ac54222 . /..... 0t!J.B" + 40210640 830c0240 4844f623 3251e1c9 26240542 ...@HD.#2Q..&$.B + 40210650 c4e12794 1342050c 7c023030 34202410 ..'..B..|.004 $. + 40210660 30322032 450c0604 00421506 7cc23030 02 2E....B..|.00 + 40210670 14202410 30322032 55060c12 0df00000 . $.02 2U....... + 40210680 2139c532 22832222 83303844 42c3e18c !9.2"."".08DB... + 40210690 14662310 2020340b 320c140c 02302483 .f#. 4.2....0$. + 402106a0 2020740d f0203014 20224166 13052020 t.. 0. "Af.. + 402106b0 040df000 0c133022 30302210 0df00000 ......0"00"..... + 402106c0 12c1f0d9 11d127c5 0931c921 e901d2dd ......'..1.!.... + 402106d0 02320d0d 22af8027 8332220d 0c276214 .2.."..'.2"..'b. + 402106e0 220d1332 0d1100c2 11220d12 80221120 "..2....."...". + 402106f0 2c204604 00220d10 320d0e00 c211220d , F.."..2.....". + 40210700 0f802211 202c2030 22204613 0045ebff ..". , 0" F..E.. + 40210710 ed02c5f6 ffdc3222 0d0dc121 ce202044 ......2"...!. D + 40210720 32c2e10c 02302c93 c60b0000 e020740c 2....0,...... t. + 40210730 93273323 0c130012 400033a1 42a360c2 .'3#....@.3.B.`. + 40210740 a1014783 121cc447 830a4c13 20c38346 ..G....G..L. ..F + 40210750 01000000 00c2a081 402c1108 31c821d8 ........@,..1.!. + 40210760 11e80112 c1100df0 f18cfe3f 2030740c ...........? 0t. + 40210770 02f63307 21fdff32 42000c12 0df00000 ..3.!..2B....... + 40210780 21faff22 02000df0 f48cfe3f 21ffff0c !..".......?!... + 40210790 03324200 0c120df0 3c80fe3f 9cf22240 .2B.....<..?.."@ + 402107a0 ff0f0000 14c7ff3f 79f22240 12c1f0c9 .......?y."@.... + 402107b0 21026103 d2610120 c0f485e0 ff31e9c4 !.a..a. .....1.. + 402107c0 20207432 23833038 44662302 861f0032 t2#.08Df#....2 + 402107d0 c3e11683 0732c2fe 303074d2 a081b633 .....2..00t....3 + 402107e0 0e22c2fb 202074d2 a101b622 02d2a041 .".. t...."...A + 402107f0 c5e8ff0c 1320d383 21e8ff28 0266020d ..... ..!..(.f.. + 40210800 21e7ff01 12c6c000 00c60e00 000031e4 !.............1. + 40210810 ff2040b4 3a322023 a3202c21 8c041b22 . @.:2 #. ,!..." + 40210820 c73202d7 bc1621df ff280238 32281201 .2....!..(.82(.. + 40210830 a7c5c000 0027bc04 0c12562c 0121daff .....'....V,.!.. + 40210840 3d0c0102 c6c00000 0c028600 00000c12 =............... + 40210850 0831c821 d81112c1 100df000 45f22240 .1.!........E."@ + 40210860 12c1e01c 043d0102 61070155 ffc00000 .....=..a..U.... + 40210870 42010032 a0e90c02 37141832 110022a4 B..2....7..2..". + 40210880 ea279304 28318602 0021f4ff 01f0c5c0 .'..(1...!...... + 40210890 00007cf2 087112c1 200df000 37f22240 ..|..q.. ...7."@ + 402108a0 23f22240 0ff22240 12c1b01c 043d01f9 #."@.."@.....=.. + 402108b0 f1026113 c26112d2 6111e261 10fd0201 ..a..a..a..a.... + 402108c0 40ffc000 0056721c 32010022 a0e9e201 @....Vr.2..".... + 402108d0 0127130b 21f2ff01 ddc5c000 00c66b00 .'..!.........k. + 402108e0 c8311c04 3d014a2f c9810135 ffc00000 .1..=.J/...5.... + 402108f0 56c219f2 cf208d01 d2a0ef0c 0716fe14 V.... .......... + 40210900 1c027032 c0303074 373c4c30 20149c62 ..p2.00t7.R.#.. + 40210da0 00008cb2 42a5c83d 0f2d0e01 d7c1c000 ....B..=.-...... + 40210db0 00220c0f 320c0472 0c08620c 07520c06 ."..2..r..b..R.. + 40210dc0 420c0529 61220c0e 2951220c 0d294122 B..)a"..)Q"..)A" + 40210dd0 0c0c2931 220c0b29 21220c0a 2911220c ..)1"..)!"..).". + 40210de0 09226100 21d4ff01 99c4c000 0021d2ff ."a.!........!.. + 40210df0 0197c4c0 0000284d 32a00532 42d23242 ......(M2..2B.2B + 40210e00 d0222d85 32a10120 20f43792 362197e1 ."-.2.. .7.6!.. + 40210e10 d2dd0201 6accc000 0021c8ff 0c146202 ....j....!....b. + 40210e20 00220d16 40361030 34300012 400033a1 ."..@6.040..@.3. + 40210e30 00124000 44a10c05 00124000 26a101be ..@.D.....@.&... + 40210e40 d1c00000 08f1c8e1 d8d1e8c1 f8b112c1 ................ + 40210e50 400df000 b283fe3f 0080fe3f 64f12240 @......?...?d."@ + 40210e60 dc88fe3f c083fe3f 46f12240 78e8fe3f ...?...?F."@x..? + 40210e70 e088fe3f 28f12240 00c0ff3f 78e8fe3f ...?(."@...?x..? + 40210e80 0af12240 41f4ff31 f4ff21f4 ff12c1f0 .."@A..1..!..... + 40210e90 3054c002 6103016d c4c00000 41f1ff31 0T..a..m....A..1 + 40210ea0 f1ff21f1 ff3054c0 0169c4c0 000041ef ..!..0T..i....A. + 40210eb0 ff31efff 21f0ff30 54c00164 c4c00000 .1..!..0T..d.... + 40210ec0 41eeff31 eeff21ee ff3054c0 0160c4c0 A..1..!..0T..`.. + 40210ed0 00000831 12c1100d f0000000 3122c332 ...1........1".2 + 40210ee0 d3062203 9e07621b 21e1fcc0 20003802 .."...b.!... .8. + 40210ef0 21e2fc30 30f4c020 00280280 33112028 !..00.. .(..3. ( + 40210f00 75460400 2203a100 42112203 a23203a3 uF.."...B."..2.. + 40210f10 80221120 24203022 200df000 12c1f009 .". $ 0" ....... + 40210f20 3145dc0d 083112c1 100df000 1c070060 1E...1.........` + 40210f30 21ffffc0 20002802 0df00000 18000000 !... .(......... + 40210f40 00000000 3c000000 80bfb186 f1ffffff ....<........... + 40210f50 50060040 12c1d0c9 a1d991e9 81f971dd P..@..........q. + 40210f60 0509b169 0152c3fe cd02fd04 ed07e615 ...i.R.......... + 40210f70 03ab530b c2c04241 32a1902d 0c426102 ..S...BA2..-.Ba. + 40210f80 591101d2 c3c00000 48215811 2a24faf2 Y.......H!X.*$.. + 40210f90 50259050 22f0c022 110cc350 22c001cb P%.P".."...P"... + 40210fa0 c3c00000 2aff32a0 642d0c01 c8c3c000 ....*.2.d-...... + 40210fb0 00c03cb0 c033b030 33a0204f c03a2432 ..<..3.03. O.:$2 + 40210fc0 a0014732 0232a000 41ddff51 ddff01e0 ..G2.2..A..Q.... + 40210fd0 ffc00000 dad20c16 273d010c 0641d9ff ........'=...A.. + 40210fe0 51d8ff3a 362d0d01 daffc000 0048010c Q..:6-.......H.. + 40210ff0 164ac227 3c010c06 41d3ff51 d1ff3a36 .J.'<...A..Q..:6 + 40211000 2d0c01d3 ffc00000 6d0221cf ff0c142a -.......m.!....* + 40211010 5ee73501 0c045a26 42c4f10c 15673201 ^.5...Z&B....g2. + 40211020 0c0508b1 4a333a35 c8a1d891 e881f871 ....J3:5.......q + 40211030 12c1300d f0000000 40dcfe3f 31ffff29 ..0.....@..?1..) + 40211040 030df000 44dcfe3f 21ffff0d f0000000 ....D..?!....... + 40211050 2040143a 347cc530 42415022 102024a0 @.:4|.0BAP". $. + 40211060 280212c1 f0303014 29013a31 22030012 (....00.).:1"... + 40211070 c1100df0 20239012 c1f02020 14102290 .... #.... ..". + 40211080 22120012 c1100df0 12c1b07c c63b5260 "..........|.;R` + 40211090 5510e261 10ed0360 32103072 c0404074 U..a...`2.0r.@@t + 402110a0 c26112d2 6111f9f1 0c0c20f5 c0dd022d .a..a..... ....- + 402110b0 05796139 71498159 a1699102 6113c901 .ya9qI.Y.i..a... + 402110c0 01bcccc0 0000fa22 2020f429 41488178 ......." .)AH.x + 402110d0 4168912d 0c387158 a147b763 7a2560c2 Ah.-.8qX.G.cz%`. + 402110e0 10c022c0 2951d020 149cb20c 44102120 ..".)Q. ....D.! + 402110f0 01c9bfc0 00007861 4d0f7031 80e02e20 ......xaM.p1... + 40211100 01c5bfc0 000058a1 504cc03d 05fa2e01 ......X.PL.=.... + 40211110 c1bfc000 0078519c a70c443d 0c2d0101 .....xQ...D=.-.. + 40211120 bdbfc000 00d02cc0 48513d01 202e8001 ......,.HQ=. ... + 40211130 b9bfc000 0078410c 027aee22 4e000c12 .....xA..z."N... + 40211140 022113c2 2112d221 11e22110 f8f112c1 .!..!..!..!..... + 40211150 500df000 4580fe3f 21ffff22 02000df0 P...E..?!..".... + 40211160 e0110060 31ffff20 2074c020 0029030c ...`1.. t. .).. + 40211170 120df000 2118fa22 02000df0 3030f43a ....!.."....00.: + 40211180 3242a0ef 37120a52 02001b22 50443046 2B..7..R..."PD0F + 40211190 fcff2d04 0df00000 19080000 f5f02240 ..-..........."@ + 402111a0 f1f02240 edf02240 dff02240 34080000 .."@.."@.."@4... + 402111b0 c8271040 4c281040 12c1d0d9 91f97149 .'.@L(.@......qI + 402111c0 0150f0f4 dd0341f4 ff3158fc e981ed02 .P....A..1X..... + 402111d0 2d0fc9a1 09b1019e c3c00000 cd0216c2 -............... + 402111e0 06d0de82 2d0e01f2 ffc00000 8c5221eb ....-........R!. + 402111f0 ff460400 0038014d 0f2d0d01 eeffc000 .F...8.M.-...... + 40211200 008cb221 e7ff0191 c3c00000 86080000 ...!............ + 40211210 4d0f3d0c 2d0d01ea fcc00000 8c4221e1 M.=.-........B!. + 40211220 ff46f8ff 38014d0f 2d0c017c c2c00000 .F..8.M.-..|.... + 40211230 8cc221dd ff3d0e01 85c3c000 00c6e8ff ..!..=.......... + 40211240 41dbff31 3afc2d0c 01b0c0c0 000008b1 A..1:.-......... + 40211250 c8a1d891 e881f871 12c1300d f0000000 .......q..0..... + 40211260 4a080000 52080000 55080000 aa55aa55 J...R...U....U.U + 40211270 55aa55aa 12c1b020 20f4d261 11f9f102 U.U.... ..a.... + 40211280 6113c261 12e26110 2981fd03 40d0f4cc a..a..a.)...@... + 40211290 330c02c6 3d00c143 fd280c28 32d732f0 3...=..C.(.(2.2. + 402112a0 68812c04 2b666022 823d0162 610901c4 h.,.+f`".=.ba... + 402112b0 fcc00000 220100cc 320c1246 00000c02 ...."...2..F.... + 402112c0 e11bfc41 e7ff2241 000c053d 0ed02d20 ...A.."A...=..- + 402112d0 018dc0c0 00005d02 1652fb32 01000c14 ......]..R.2.... + 402112e0 0c023024 83688138 0c6a2268 334d0d60 ..0$.h.8.j"h3M.` + 402112f0 22823d05 59a101b2 fcc00000 58a14d0d ".=.Y.......X.M. + 40211300 2d053d0f 0146c2c0 000058a1 dc1241d5 -.=..F....X...A. + 40211310 ff3d0e50 2520017c c0c00000 061b0000 .=.P% .|........ + 40211320 0041d1ff 2d053d0e 0178c0c0 0000380c .A..-.=..x....8. + 40211330 22010068 8138336a 225d0d4d 0f85e7ff "..h.83j"].M.... + 40211340 381121ca ff279311 387121c9 ff279309 8.!..'..8q!..'.. + 40211350 28211b22 06010000 00000c12 292121c3 (!."........)!!. + 40211360 ffd20100 291121c2 ff2c0e29 71102da0 ....).!..,.)q.-. + 40211370 e9323d0e 2d0f45e0 ff10dda0 295d280c .2=.-.E.....)](. + 40211380 5d0e3832 28911041 20c5e2ff 0c120221 ].82(..A ......! + 40211390 13c22112 d22111e2 2110f8f1 12c1500d ..!..!..!.....P. + 402113a0 f0000000 4080fe3f 12c1c0c9 e1d9d1e9 ....@..?........ + 402113b0 c109f1f9 b1ed0222 d2014242 3d2d03dd ......."..BB=-.. + 402113c0 04cd0352 610301fa cbc00000 e03d1139 ...Ra........=.9 + 402113d0 11da3330 33a042a1 40e033a0 4a332c04 ..303.B.@.3.J3,. + 402113e0 27b4012d 04481129 03daf4f0 ffa0e0ff '..-.H.)........ + 402113f0 1122a140 2a2f2a2e 2c043d0c 4b220105 .".@*/*.,.=.K".. + 40211400 bfc00000 22cc2029 0122a160 2a2f3801 ....". ).".`*/8. + 40211410 2a2e4c04 22c20401 ffbec000 00f2ce10 *.L."........... + 40211420 3d0c2c04 2d0f01fd c1c00000 32ce3739 =.,.-.......2.79 + 40211430 2152cd1f fc523801 28214c04 594101f7 !R...R8.(!L.YA.. + 40211440 c1c00000 5841ec32 b025112a 2e320204 ....XA.2.%.*.2.. + 40211450 22a0ff27 1329b035 113a3e2c 044b3322 "..'.).5.:>,.K3" + 40211460 ce7801ec bec00000 0c020605 00b02511 .x............%. + 40211470 2a2e2c04 32a0ff22 c20401e5 bec00000 *.,.2.."........ + 40211480 0c124811 224e36da 242022a0 e022a022 ..H."N6.$ ".."." + 40211490 22502c04 293e3d0c f02f2001 debec000 "P,.)>=../ ..... + 402114a0 00380128 214c0401 dbbec000 00415dcc .8.(!L.......A]. + 402114b0 212bdf0c 03324e77 c0200049 02420c61 !+...2Nw. .I.B.a + 402114c0 d02d1166 143ed0d2 c0da4e0c 1322a348 .-.f.>....N..".H + 402114d0 324ea92a 24324200 22cc62fd 023d0222 2N.*$2B.".b..=." + 402114e0 a0aa0c64 202e8001 cbbec000 0022a340 ...d ........".@ + 402114f0 2addda2e 0c643d0f 9b2201c6 bec00000 *....d=.."...... + 40211500 86040000 00d0d2c0 dade22a3 48324ea9 ..........".H2N. + 40211510 20dd8032 4d00320c 6822de04 80430196 ..2M.2.h"...C.. + 40211520 240032af 81324298 322c1bb6 430232a0 $.2..2B.2,..C.2. + 40211530 00324299 320c700c 150b430c 03403583 .2B.2.p...C..@5. + 40211540 32429a32 0c713242 a0283157 920d2195 2B.2.q2B.(1W..!. + 40211550 ff42a4a4 2212003d 0e85d1ff 220c6008 .B.."..=....".`. + 40211560 f1224e98 c8e1d8d1 e8c1f8b1 12c1400d ."N...........@. + 40211570 f0000000 e58bfe3f 12c1d0d9 91e981f9 .......?........ + 40211580 7109b1c9 a1ed0222 d201fd03 c2023c32 q......"......<2 + 40211590 c3205d04 29010c0d 3911c73d 02463400 . ].)...9..=.F4. + 402115a0 b65d02c6 3200e08d 11da2832 a1402022 .]..2.....(2.@ " + 402115b0 a03022a0 2a2e2c04 3d0f4b22 59318921 .0".*.,.=.K"Y1.! + 402115c0 0197c1c0 00005831 882156c2 09da8880 ......X1.!V..... + 402115d0 88a022a1 602028a0 2a2e3811 4c044b22 ..".` (.*.8.L.K" + 402115e0 018fc1c0 00005831 56e20722 0f612612 ......X1V..".a&. + 402115f0 0e320f68 22de0480 3301d6e3 02860800 .2.h"...3....... + 40211600 d03df022 a3402a23 2a2e0c64 32cf629b .=.".@*#*..d2.b. + 40211610 22593101 82c1c000 00583116 22fd0612 "Y1......X1."... + 40211620 00000042 02988044 0147933d 42029932 ...B...D.G.=B..2 + 40211630 2f1b3794 3442029a 320f7037 942b3202 /.7.4B..2.p7.+2. + 40211640 a0220f71 279322d0 2df02a3e 22a3482a .".q'.".-.*>".H* + 40211650 23220200 66120522 0f616612 0c38014d #"..f..".af..8.M + 40211660 0d22033d d7922946 15001b6d 60d074c6 .".=..)F...m`.t. + 40211670 c9ff22a1 442a2e32 a00062a0 ff304074 ..".D*.2..b..0@t + 40211680 c7b41882 02004d03 22c26432 c3016798 ......M.".d2..g. + 40211690 eb3d0f2d 0e05d1ff 06090000 c79420d1 .=.-.......... . + 402116a0 b5ff220d 00c79204 0c02224d 00420d00 .."......."M.B.. + 402116b0 2d0ef03f 2005cfff 220d001b 22224d00 -..? ..."...""M. + 402116c0 08b1c8a1 d891e881 f87112c1 300df000 .........q..0... + 402116d0 c2e5fe3f 12c1f0d9 11d114fb 0c0542a1 ...?..........B. + 402116e0 d13d0d22 a4a4c921 09310186 bfc00000 .=."...!.1...... + 402116f0 cd021672 0442a4a4 32a0ff01 45bec000 ...r.B..2...E... + 40211700 0031cddd 42a008c0 2c200142 bec00000 .1..B..., .B.... + 40211710 31f0ff22 a4920c64 202c8001 3ebec000 1.."...d ,..>... + 40211720 002120ff 42a4a422 1200c03c 2045b4ff .! .B.."...< E.. + 40211730 42a1dd3d 0d2d0c01 74bfc000 000831c8 B..=.-..t.....1. + 40211740 21d81112 c1100df0 2117ff31 bbdd2212 !.......!..1..". + 40211750 0012c1f0 42a4a409 3185b1ff 083112c1 ....B...1....1.. + 40211760 100df000 12c1b0c2 6112e261 10f9f120 ........a..a... + 40211770 c0f40261 13d26111 0c02fd04 30e0f450 ...a..a.....0..P + 40211780 50f42714 46d107fc 5a3e280d 68320c02 P.'.F...Z>(.h2.. + 40211790 3736382b 2c602282 2c043d01 59810188 768+,`".,.=.Y... + 402117a0 fbc00000 22010058 818c320c 12224100 ...."..X..2.."A. + 402117b0 2201004d 05cac228 0d3d0f22 2203202c "..M...(.=."". , + 402117c0 82e02280 017ffbc0 00000c12 022113c2 .."..........!.. + 402117d0 2112d221 11e22110 f8f112c1 500df000 !..!..!.....P... + 402117e0 0f8cfe3f 0e8cfe3f e78bfe3f 34dcfe3f ...?...?...?4..? + 402117f0 12c1d0c9 a109b1d9 91e981f9 713911cd ............q9.. + 40211800 02b64204 0c0c8652 0021d6c0 32d20132 ..B....R.!..2..2 + 40211810 03de56e3 fe0c52c5 bbfe6602 1321f0ff ..V...R...f..!.. + 40211820 3811c242 0021efff 32420046 42000000 8..B.!..2B.FB... + 40211830 00d1befa 0c0542a7 c53d0d22 a4a40131 ......B..=."...1 + 40211840 bfc00000 ed0216a2 fbf1d6fe 4d02221f ............M.". + 40211850 0052a4a4 0c03c5f0 ff51c2c0 22d50252 .R.......Q.."..R + 40211860 0214dd02 5901571c 5bc24214 21dfff0c ....Y.W.[.B.!... + 40211870 13324200 31deff32 03006613 3cf62c04 .2B.1..2..f.<.,. + 40211880 0c02c5fc f37cdff0 fc10cc1f c5c0f92d .....|.........- + 40211890 0c057cf0 661f0245 b9f922cc fe202074 ..|.f..E..".. t + 402118a0 f622090c 0205a0f3 86030000 00661c09 ."...........f.. + 402118b0 31adc028 432802c5 211751cb ff0c02c2 1..(C(..!.Q..... + 402118c0 4d142245 00281166 1219220e 08c71213 M."E.(.f.."..... + 402118d0 51b5fec2 4e082215 0042a4a4 3d0e4599 Q...N."..B..=.E. + 402118e0 ffc24d14 3192fa2d 0e42a7de 0107bfc0 ..M.1..-.B...... + 402118f0 00002144 cb2802bc b2318cfa 42a7e222 ..!D.(...1..B.." + 40211900 a02c01d3 c1c00000 ed02ac82 58010c83 .,..........X... + 40211910 39025242 04220d14 4d0e224e 0522a015 9.RB."..M."N.".. + 40211920 0142cbc0 00008cc2 3181fa42 a7ea2d0e .B......1..B..-. + 40211930 01f6bec0 00008c3c 0c1c8605 0085e10c .......<........ + 40211940 cd026612 f222a002 85cf0c05 c80c2149 ..f.."........!I + 40211950 fac5bd0c 08b12d0c d891c8a1 e881f871 ......-........q + 40211960 12c1300d f0000000 12c1f00c 13202074 ..0.......... t + 40211970 0931c5e7 ff083112 c1100df0 12c1f00c .1....1......... + 40211980 03202074 093185e6 ff083112 c1100df0 . t.1....1..... + 40211990 12c1f0e9 010931c9 21d911ed 0226122c ......1.!....&., + 402119a0 3163fa0c 0542a721 22a4a401 d6bec000 1c...B.!"....... + 402119b0 00cd020c 02271c35 3d02217a fe52a4a4 .....'.5=.!z.R.. + 402119c0 2212004d 0cc5d9ff 06010000 00c11add "..M............ + 402119d0 d20c08b6 4d02d2a0 022d0d26 1e0f3153 ....M....-.&..1S + 402119e0 fa2d0c42 a72b01c8 bec00000 2d0d0831 .-.B.+......-..1 + 402119f0 c821d811 e80112c1 100df000 12c1f00c .!.............. + 40211a00 120931c5 f8ff0831 12c1100d f0000000 ..1....1........ + 40211a10 10442140 12c1f0c9 21093105 feffcd02 .D!@....!.1..... + 40211a20 22a0fd20 2c106612 0205a7f9 c2ccfec0 ".. ,.f......... + 40211a30 c074f62c 040c0285 e1f3c18c de2d0c01 .t.,.........-.. + 40211a40 5fc9c000 0031f2ff 2d0c0c04 015acac0 _....1..-....Z.. + 40211a50 00002d0c 0c150c04 32a06401 57c9c000 ..-.....2.d.W... + 40211a60 000831c8 2112c110 0df00000 f88cfe3f ..1.!..........? + 40211a70 b3f12240 008dfe3f fc412140 12c1e009 .."@...?.A!@.... + 40211a80 713911c9 61290145 f7ffcd02 85250d68 q9..a).E.....%.h + 40211a90 0178114d 023d072d 0685620b 41f4ff29 .x.M.=.-..b.A..) + 40211aa0 043914cc 13d60201 21f2ff01 68c1c000 .9......!...h... + 40211ab0 000c02c6 13000000 0021eeff 32a00132 .........!..2..2 + 40211ac0 420022a0 fd202c10 66120205 9df9c2cc B.".. ,.f....... + 40211ad0 fec0c074 f62c0522 a00045d7 f3c163de ...t.,."..E...c. + 40211ae0 2d0c0136 c9c00000 31e4ff0c 042d0c01 -..6....1....-.. + 40211af0 31cac000 002d0c0c 150c0432 a064012e 1....-.....2.d.. + 40211b00 c9c00000 0c120871 c86112c1 200df000 .......q.a.. ... + 40211b10 12c1f002 6103c261 0205eeff 3d020c02 ....a..a....=... + 40211b20 b6232821 10c022d2 013202de 0c022793 .#(!.."..2....'. + 40211b30 1a22a001 85f302c1 87fd8c72 220c0066 .".........r"..f + 40211b40 1202c5bd 130c0222 4c000c12 0831c821 ......."L....1.! + 40211b50 12c1100d f0000000 12c1f002 6103c261 ............a..a + 40211b60 0285e9ff 32a0fd37 82060c02 860f0000 ....2..7........ + 40211b70 0021fcbf 22d20122 02de56c2 fe05ef02 .!..".."..V..... + 40211b80 c195f7cc 920c1222 4c000c12 86070000 ......."L....... + 40211b90 320c0056 e3fe3202 390763e8 0c033912 2..V..2.9.c...9. + 40211ba0 39223262 03456c13 56e2fb86 f5ff0831 9"2b.El.V......1 + 40211bb0 c82112c1 100df000 12c1f009 31c921c5 .!..........1.!. + 40211bc0 e3ff32a0 fd302210 ac4221e6 bf22d201 ..2..0"..B!..".. + 40211bd0 3202de0c 02279317 45e902c1 7ef78c72 2....'..E...~..r + 40211be0 320c0066 13028564 130c0222 4c000c12 2..f...d..."L... + 40211bf0 0831c821 12c1100d f0000000 f08cfe3f .1.!...........? + 40211c00 60e7fe3f 12c1f002 610305df ff66321b `..?....a....f2. + 40211c10 21fbff22 02005622 0145e502 31f9ff42 !.."..V".E..1..B + 40211c20 a0013803 3032c00c 22302483 083112c1 ..8.02.."0$..1.. + 40211c30 100df000 f9f02240 20207412 c1f00b32 ......"@ t....2 + 40211c40 0931c261 02303074 b6330d21 faff01ff .1.a.00t.3.!.... + 40211c50 c0c00000 c6090000 0031e8ff 0c044243 .........1....BC + 40211c60 0030c320 26221d26 323e05d9 ff661208 .0. &".&2>...f.. + 40211c70 21bdbf28 42c60500 0005d8ff 2632f00c !..(B.......&2.. + 40211c80 02c60b00 0045d7ff 66221121 b6bf2852 .....E..f".!..(R + 40211c90 16b2fe28 02c5e316 86050000 00c5d5ff ...(............ + 40211ca0 2632e706 f6ff0000 0005d5ff 6632cf22 &2..........f2." + 40211cb0 4c000c12 0831c821 12c1100d f0000000 L....1.!........ + 40211cc0 12c1f00c 02093185 ccff0831 12c1100d ......1....1.... + 40211cd0 f0000000 6e090000 3ce1fe3f 8d090000 ....n...<..?.... + 40211ce0 7c8cfe3f 0d8cfe3f ec090000 f3090000 |..?...?........ + 40211cf0 12c1e0c9 61d95109 71dd03e9 41f931cd ....a.Q.q...A.1. + 40211d00 0285cfff 32a0fd37 0201cc3c 0c020651 ....2..7...<...Q + 40211d10 00262d02 063100d1 85f941ee ff0c053d .&-..1....A....= + 40211d20 0d22a4a4 01f8bdc0 0000cd02 0c12164c .".............L + 40211d30 12d19cfd 52a4a422 1d004d0c 0c0345a2 ....R.."..M...E. + 40211d40 ffcbfc42 a0a432a0 ff2d0f01 b1bcc000 ...B..2..-...... + 40211d50 00e1e1ff 42a0a432 a0ff2d0e 01adbcc0 ....B..2..-..... + 40211d60 00003180 bf2d0e42 238630e3 20660413 ..1..-.B#.0. f.. + 40211d70 32a02401 b2cfc000 002114d4 4c0301af 2.$......!..L... + 40211d80 cfc00000 22de0232 02b5b623 040c0332 ...."..2...#...2 + 40211d90 42b5283c 6602152c 43f02f20 01a8cfc0 B.( "............ + 40211e20 ee4d0221 60fd52a4 a4221200 32a00045 .M.!`.R.."..2..E + 40211e30 93ff0c14 c03c202d 0dc573ff 41acff3d .....< -..s.A..= + 40211e40 0e2d0d01 b1bdc000 0021fbdb 42a0003d .-.......!..B..= + 40211e50 0c4572ff 0c120871 c861d851 e841f831 .Er....q.a.Q.A.1 + 40211e60 12c1200d f0000000 000000f0 000000d0 .. ............. + 40211e70 ffffffef 1bf32240 fdf22240 e7f22240 ......"@.."@.."@ + 40211e80 caf22240 b3f22240 12c1c0c9 e1c127f9 .."@.."@......'. + 40211e90 d9d1f9b1 0c05dd03 20f07442 a2523d0c ........ .tB.R=. + 40211ea0 22a4a4e9 c102610f 0197bdc0 00000c05 ".....a......... + 40211eb0 ed025792 02c64d00 613bfd4d 02221600 ..W...M.a;.M.".. + 40211ec0 52a4a432 a000c589 ff055efe 5d02dc32 R..2......^.]..2 + 40211ed0 42a25b3d 0c2d0e52 6104018b bdc00000 B.[=.-.Ra....... + 40211ee0 58418642 00564f08 0c843d01 22a00001 XA.B.VO...=."... + 40211ef0 b4f9c000 00480121 dcff31dc ff202410 .....H.!..1.. $. + 40211f00 51dcff3a 22570214 37041121 daff014f Q..:"W..7..!...O + 40211f10 c0c00000 42a26946 1a000000 00057afe ....B.iF......z. + 40211f20 fd0221d5 ff3d0d01 49c0c000 00220e01 ..!..=..I....".. + 40211f30 320e0020 2064224e 010c4220 2320224e 2.. d"N..B # "N + 40211f40 00d020f5 224e07d0 2841224e 06f020f5 .. ."N..(A"N.. . + 40211f50 224e0451 14fdf028 41224e03 f24e02d2 "N.Q...(A"N..N.. + 40211f60 4e0542a4 a43d0e22 15000616 00661f6f N.B..=.".....f.o + 40211f70 c567fe20 2074dcb2 21c1ff01 34c0c000 .g. t..!...4... + 40211f80 0042a27e 3d0c2d0e 0160bdc0 00000c05 .B.~=.-..`...... + 40211f90 06170000 0021baff 3d0d012c c0c00000 .....!..=..,.... + 40211fa0 320e0122 afbf2023 10224e01 d020f522 2..".. #."N.. ." + 40211fb0 4e0461fc fcd02841 224e03d2 4e022216 N.a...(A"N..N.". + 40211fc0 0042a4a4 3d0ec52a ff85a4ff 42a2913d .B..=..*....B..= + 40211fd0 0c2d0e01 4dbdc000 000c1546 04000000 .-..M......F.... + 40211fe0 21a9ff01 1ac0c000 0042a28e 06e5ff00 !........B...... + 40211ff0 08f12d05 c8e1d8d1 e8c1f8b1 12c1400d ..-...........@. + 40212000 f0000000 01f22240 fef12240 fbf12240 ......"@.."@.."@ + 40212010 0080ffff f8f12240 f5f12240 f2f12240 ......"@.."@.."@ + 40212020 eff12240 12c1e0e9 41e1c0f8 0c0542a4 .."@....A.....B. + 40212030 6e3d0e22 a4a4c961 0971d261 05f26103 n=."...a.q.a..a. + 40212040 0131bdc0 0000cd02 0c02279c 02464100 .1........'..FA. + 40212050 f1d5fc3d 02221f00 52a4a4c0 4c204570 ...=."..R...L Ep + 40212060 ff21c0be d2228321 c0f9d0d8 44220200 .!...".!....D".. + 40212070 2622112d 0c42a478 3d0e0123 bdc00000 &".-.B.x=..#.... + 40212080 0c020634 0021dfff 01f1bfc0 0000262d ...4.!........&- + 40212090 04d2cde1 fc8d280c 20203466 121521da ......(. 4f..!. + 402120a0 ff01eabf c0000032 0c007c02 202310c6 .......2..|. #.. + 402120b0 05000000 21d6ff01 e5bfc000 00320c00 ....!........2.. + 402120c0 7c022033 100c1220 2320224c 00461900 |. 3... # "L.F.. + 402120d0 321c0021 cfff2023 20225c00 380c3020 2..!.. # "\.8.0 + 402120e0 1427e314 66120521 cbff8600 0021caff .'..f..!.....!.. + 402120f0 01d7bfc0 0000060c 00661213 21c8ff01 .........f..!... + 40212100 d3bfc000 00321c00 7cc22023 10860500 .....2..|. #.... + 40212110 21c4ff01 cebfc000 00321c00 7cc22033 !........2..|. 3 + 40212120 1022a001 20232022 5c00321c 0022a004 .".. # "\.2..".. + 40212130 20232022 5c00221f 0042a4a4 c03c2045 # "\."..B...< E + 40212140 13ffc02c 2042a49d e03e2001 efbcc000 ..., B...> ..... + 40212150 00058cff 0c120871 c861d851 e841f831 .......q.a.Q.A.1 + 40212160 12c1200d f0000000 99080000 b1080000 .. ............. + 40212170 12c1e0d9 51e94109 71c961f9 31dd02ed ....Q.A.q.a.1... + 40212180 03564200 0c02862e 0026132c 41f7ff31 .VB......&.,A..1 + 40212190 67f80c05 22a4a401 dbbcc000 00cd0216 g..."........... + 402121a0 12fe2042 20217ffc 52a4a422 120032a0 .. B !..R.."..2. + 402121b0 00055bff 06010000 00c11fdb 283cf2cc ..[.........(<.. + 402121c0 37660214 2c43cb2c 019dcec0 00004c03 7f..,C.,......L. + 402121d0 f02f2001 9acec000 00220ca9 b622040c ./ ......"...".. + 402121e0 02224ca9 2c0432cc 102d0d01 8abbc000 ."L.,.2..-...... + 402121f0 0042a040 f03f2022 cd200186 bbc00000 .B.@.? ". ...... + 40212200 220ca932 a0aa224d 6142a006 303c8022 "..2.."MaB..0<." + 40212210 cd620180 bbc00000 22dc0422 029a0c14 .b......"..".... + 40212220 0b320c02 30248322 4d70471e 0e41cfff .2..0$."MpG..A.. + 40212230 313ff8c0 2c2001b4 bcc00000 220c9822 1?.., ......".." + 40212240 4d600c12 0871c861 d851e841 f83112c1 M`...q.a.Q.A.1.. + 40212250 200df000 12c1f00c 13093145 f1ff0831 .........1E...1 + 40212260 12c1100d f0000000 12c1f00c 03093105 ..............1. + 40212270 f0ff0831 12c1100d f0000000 74e2fe3f ...1........t..? + 40212280 79e4fe3f 12c1d0e9 81f9710c 0ef1fbff y..?......q..... + 40212290 51fcffc9 a109b1d9 916d02cd 0e72a0ff Q........m...r.. + 402122a0 3131be22 d3032202 4827be60 f65e5d22 11."..".H'.`.^]" + 402122b0 0f007712 4ac0dcf0 c0dda060 dda02c04 ..w.J......`..,. + 402122c0 3d0f2d0d 69117921 59010152 bbc00000 =.-.i.y!Y..R.... + 402122d0 4c0432cf 2022cd20 014fbbc0 00005801 L.2. ". .O....X. + 402122e0 0c643d05 22cd6201 4bbbc000 0058011b .d=.".b.K....X.. + 402122f0 cc0b2522 0200c0c0 74224d61 78216811 ..%"....t"Max!h. + 40212300 1beee0e0 74f2cf64 7b5586e4 ff08b12d ....t..d{U.....- + 40212310 0cd891c8 a1e881f8 7112c130 0df00000 ........q..0.... + 40212320 f4080000 12c1e0f9 31097120 f074c961 ........1.q .t.a + 40212330 d951e261 04456cff 0b3f3030 74b65304 .Q.a.El..?00t.S. + 40212340 0c024615 0032a0fd 3702f4d1 f8f741f4 ..F..2..7.....A. + 40212350 ff0c053d 0d22a4a4 016bbcc0 0000cd02 ...=."...k...... + 40212360 16c2fde1 10fc4d02 221e0032 a00052a4 ......M."..2..R. + 40212370 a4053fff 22dc0132 023cf713 0ef2423c ..?."..2.<....B< + 40212380 221e0042 a4a4c03c 2085eefe 419aef2d "..B...< ...A..- + 40212390 0c3d0d01 5dbcc000 000c1208 71c861d8 .=..].......q.a. + 402123a0 51e841f8 3112c120 0df00000 3a80fe3f Q.A.1.. ....:..? + 402123b0 17090000 23090000 12c1d0d9 9120d074 ....#........ .t + 402123c0 21e9bdc9 a1e98109 b1f97132 d203f203 !.........q2.... + 402123d0 4822d202 e1aaffd2 42a40c0c c0307439 H"......B....0t9 + 402123e0 01f7b337 3179c22c 042d0e01 0cbec000 ...71y.,.-...... + 402123f0 00dcf231 76d24c04 22ce2001 08bec000 ...1v.L.". ..... + 40212400 00ccf221 73c2ca32 22a4a72a 23d24200 ...!s..2"..*#.B. + 40212410 06020000 1bcce2ce 64c6efff 21e4ff22 ........d...!.." + 40212420 02006612 70d1c1f7 41e2ff0c 053d0d22 ..f.p...A....=." + 40212430 a4a40134 bcc00000 ed021682 05d1d9fb ...4............ + 40212440 4d02221d 0052a4a4 0c038531 ff3122fe M."..R.....1.1". + 40212450 42a0a422 ce0c01ef bac00000 2801f7b2 B.."........(... + 40212460 1b315bc2 c0c074ca 2332a4a7 3a223202 .1[...t.#2..:"2. + 40212470 00c0ce80 22a49b20 cc80324c 00221d00 ....".. ..2L.".. + 40212480 42a4a43d 0ec5defe 41cbff31 a8f72d0e B..=....A..1..-. + 40212490 011ebcc0 000008b1 c8a1d891 e881f871 ...............q + 402124a0 12c1300d f0000000 12c1f031 c0ff0931 ..0........1...1 + 402124b0 0c144243 000c1385 83ff0831 12c1100d ..BC.......1.... + 402124c0 f0000000 12c1f031 b9ff0931 0c044243 .......1...1..BC + 402124d0 000c03c5 81ff0831 12c1100d f0000000 .......1........ + 402124e0 12c1f00c 230c0209 314580ff 083112c1 ....#...1E...1.. + 402124f0 100df000 219cbd32 a0ff22d2 03220249 ....!..2.."..".I + 40212500 0c043032 c0302483 0df00000 415cff20 ..02.0$.....A\. + 40212510 20740c03 52a0c862 a0ff27a3 0f5a4450 t..R..b..'..ZDP + 40212520 74c07207 00679709 2b3306fb ff271305 t.r..g..+3...'.. + 40212530 0df00c12 0df00c02 0df00000 12c1e0c9 ................ + 40212540 61c188bd d951e941 0971e84c dd023901 a....Q.A.q.L..9. + 40212550 854aff42 a0fd3801 47022aac 7ec2dc01 .J.B..8.G.*.~... + 40212560 420cde0c 0227941f 2192d10c 04425200 B....'..!....BR. + 40212570 21e5ce0c 14424247 418bc62d 0d851cf7 !....BBGA..-.... + 40212580 0c128600 00000c02 0871c861 d851e841 .........q.a.Q.A + 40212590 12c1200d f0000000 2173bd22 d2052202 .. .....!s."..". + 402125a0 4c803201 8c030c12 2020740d f0000000 L.2..... t..... + 402125b0 820a0000 8b0a0000 980a0000 12c1e0d9 ................ + 402125c0 51d15af7 41fbffe9 410c0520 e0743d0d Q.Z.A...A.. .t=. + 402125d0 22a4a4c9 610971f2 610301ca bbc00000 "...a.q.a....... + 402125e0 cd020c02 271c6cf1 6ffb3d02 221f0052 ....'.l.o.=."..R + 402125f0 a4a4c04c 20c516ff 0540ff32 a0fd3702 ...L ....@.2..7. + 40212600 16f62e13 2158bd22 d2053202 4ce7131c ....!X."..2.L... + 40212610 e2424c86 05000000 41e7ff2d 0c3d0d01 .BL.....A..-.=.. + 40212620 babbc000 000c0246 0a000000 0022dc03 .......F.....".. + 40212630 320240e7 130ee242 40221f00 42a4a4c0 2.@....B@"..B... + 40212640 3c2005c3 fe41dcff 2d0c3d0d 01afbbc0 < ...A..-.=..... + 40212650 00000c12 0871c861 d851e841 f83112c1 .....q.a.Q.A.1.. + 40212660 200df000 af0a0000 bd0a0000 313ebd12 ...........1>.. + 40212670 c1d0c9a1 d991e981 09b1f971 22d30322 ...........q".." + 40212680 0248d1fe fee1d1d1 29010c0c 4801c0f0 .H......)...H... + 40212690 7447bf43 31cdc12c 042d0d01 60bdc000 tG.C1..,.-..`... + 402126a0 00ecb24c 043d0e22 cd20015c bdc00000 ...L.=.". .\.... + 402126b0 dcc222cc 1f312bbd b022112a 2352a210 .."..1+..".*#R.. + 402126c0 3120ef2c 045a2201 53bac000 00c60100 1 .,.Z".S....... + 402126d0 1bccd2cd 64c6ecff 2135ff22 02006612 ....d...!5."..f. + 402126e0 74e112f7 41e0ff0c 053d0e22 a4a40185 t...A....=.".... + 402126f0 bbc00000 dd0216c2 05e12afb 4d02221e ..........*.M.". + 40212700 0052a4a4 0c03c505 ff3173fd 42a0a422 .R.......1s.B.." + 40212710 cd0c0140 bac00000 280127bf 1fc02074 ...@....(.'... t + 40212720 4111bd22 c21fb022 112a3452 a2102a2d A.."...".*4R..*- + 40212730 2c045a33 22c20401 37bac000 00221e00 ,.Z3"...7....".. + 40212740 42a4a43d 0dc5b2fe 41c8ff31 f8f62d0d B..=....A..1..-. + 40212750 016ebbc0 000008b1 c8a1d891 e881f871 .n.............q + 40212760 12c1300d f0000000 c50a0000 d10a0000 ..0............. + 40212770 12c1e021 0eff0971 c961d951 e941f931 ...!...q.a.Q.A.1 + 40212780 22020066 1266d1e9 f641f7ff 0c053d0d "..f.f...A....=. + 40212790 22a4a401 5cbbc000 0020c220 16d204e1 "...\.... . .... + 402127a0 01fb2042 20221e00 52a4a432 a00045fb .. B "..R..2..E. + 402127b0 fe52a0aa 5afc3183 d10c64f0 2f200117 .R..Z.1...d./ .. + 402127c0 bdc00000 3180d19c 520c64f0 2f200111 ....1...R.d./ .. + 402127d0 bac00000 221e0042 a4a4c03c 2045a9fe ...."..B...< E.. + 402127e0 41e3ff3d 0d2d0c01 48bbc000 000871c8 A..=.-..H.....q. + 402127f0 61d851e8 41f83112 c1200df0 12c1f0c9 a.Q.A.1.. ...... + 40212800 21c1d8bc d9110931 d84c051f ff32a0fd !......1.L...2.. + 40212810 37025416 1d0522dc 013202de 22a00027 7.T..."..2.."..' + 40212820 934722a0 02c5bafd 26023728 4c0c0332 .G".....&.7(L..2 + 40212830 42d03242 d1222c86 1b22b622 252147da B.2B.",.."."%!G. + 40212840 c0200048 02c02000 38024040 f5305074 . .H.. .8.@@.0Pt + 40212850 217ad966 14070cd4 30307457 b4010c03 !z.f....00tW.... + 40212860 45c1f60c 12460000 0c020831 c821d811 E....F.....1.!.. + 40212870 12c1100d f0000000 12c1f0c9 21c1b9bc ............!... + 40212880 d9110931 d84c4517 ff4d020c 02279d02 ...1.LE..M...'.. + 40212890 86230022 dc013202 de0c0227 13020620 .#."..2....'... + 402128a0 0032a0fd 37840821 d0fb2202 00161207 .2..7..!.."..... + 402128b0 0c1205b2 fd260267 284c0c03 3242d032 .....&.g(L..2B.2 + 402128c0 42d23242 d1216bfc 220200cc 923155c7 B.2B.!k."....1U. + 402128d0 2123dac0 20003902 45b0f322 2c043222 !#.. .9.E..",.2" + 402128e0 1116c300 0c043d04 2d0c45d6 f7460500 ......=.-.E..F.. + 402128f0 0022c204 01b2c5c0 0000222c 0422c218 ."........",.".. + 40212900 01afc5c0 0000284c 22223497 f2112d0d ......(L""4...-. + 40212910 850e020c 065d064d 063d062d 0685be0d .....].M.=.-.... + 40212920 0c120831 c821d811 12c1100d f0000000 ...1.!.......... + 40212930 c6f02240 12c1d0d9 91d18abc c9a1f971 .."@...........q + 40212940 09b1e261 08f2dd03 20c074e2 0f48c50a ...a.... .t..H.. + 40212950 ff32a0fd 37820246 4400e73c 02c64200 .2..7..FD..<..B. + 40212960 22dd0132 02de5623 102d0e32 6100c5b9 "..2..V#.-.2a... + 40212970 ff3801e7 3c02063d 0016120f e0ec11ca .8..<..=........ + 40212980 2e52dd02 2022a042 a1505022 a04a2242 .R.. ".B.PP".J"B + 40212990 020022a0 ff279402 86340021 e5ff3d0c .."..'...4.!..=. + 402129a0 590101aa bdc00000 220f490c 135801c7 Y.......".I..X.. + 402129b0 9202062e 00caeee0 eea0e0ee 11ea2d22 ..............-" + 402129c0 22d332a1 403a3ec2 4f49226d 86f2a210 ".2.@:>.OI"m.... + 402129d0 3a3d21fd c02c04fa 33590101 8eb9c000 :=!..,..3Y...... + 402129e0 0032a160 3a3e3a3d 21f9d04c 04fa3301 .2.`:>:=!..L..3. + 402129f0 89b9c000 0058010c 0232cc1f 224583b0 .....X...2.."E.. + 40212a00 23112a25 42021022 a0ff2714 1cb03311 #.*%B.."..'...3. + 40212a10 3a3d214b ee2c04fa 33590101 7eb9c000 :=!K.,..3Y..~... + 40212a20 000c0258 01c60000 00000c12 22454231 ...X........"EB1 + 40212a30 fdc621ca d9c0ccf0 c0200039 02ca3522 ..!...... .9..5" + 40212a40 a3542a23 22020032 a3403acc 2245b5ca .T*#"..2.@:."E.. + 40212a50 dd32a215 21dcd03a 3d0c6401 6eb9c000 .2..!..:=.d.n... + 40212a60 0045e1ff 45d9ff0c 13460000 0c0308b1 .E..E....F...... + 40212a70 2d03c8a1 d891e881 f87112c1 300df000 -........q..0... + 40212a80 3b80fe3f 21e0c612 c1f02802 0931c921 ;..?!.....(..1.! + 40212a90 d911e901 16d2040c 0245fd01 cd028c62 .........E.....b + 40212aa0 c578122d 0c051712 d121f642 a6eb3d0d .x.-.....!.B..=. + 40212ab0 2cc20167 bdc00000 cd02ac72 0c4ee902 ,..g.......r.N.. + 40212ac0 0cc3ea22 015eccc0 00004d0c 3d0e1c52 ...".^....M.=..R + 40212ad0 01d6c6c0 00008cb2 42a6f23d 0d2d0c01 ........B..=.-.. + 40212ae0 8abac000 0021e6ff 22020066 120585d8 .....!.."..f.... + 40212af0 ff85d0ff 0831c821 d811e801 12c1100d .....1.!........ + 40212b00 f0000000 12c1f0c9 21c116bc d9110931 ........!......1 + 40212b10 d84c85ee fe32a0fd 3702098c 6d284c22 .L...2..7...m(L" + 40212b20 02d28600 0022a0ff 0831c821 d81112c1 ....."...1.!.... + 40212b30 100df000 2030740c 02f62307 21d1ff32 .... 0t...#.!..2 + 40212b40 42000c12 0df00000 21ceff22 02000df0 B.......!..".... + 40212b50 12c1f002 610345ea fe32a0fd 30321022 ....a.E..2..02." + 40212b60 a01f6613 1621ffbb 3222041c f28cb332 ..f..!..2".....2 + 40212b70 23248c63 0c0245c9 0d202074 083112c1 #$.c..E.. t.1.. + 40212b80 100df000 70ddfe3f 720b0000 760b0000 ....p..?r...v... + 40212b90 79f32240 12c1d0c9 a1c1faff d991dd02 y."@............ + 40212ba0 280ce981 09b1e1e1 f516e200 41f7ff3d (...........A..= + 40212bb0 0e0155ba c000000c 02290c41 f4ff0c15 ..U......).A.... + 40212bc0 3d0e2c02 0150bac0 0000290c 9c8221f0 =.,..P....)...!. + 40212bd0 ff1c443d 01054bfe 620d0552 0d04420d ..D=..K.b..R..B. + 40212be0 03280c3d 01854502 08b1c8a1 d891e881 .(.=..E......... + 40212bf0 12c1300d f0000000 12c1f009 31c5dffe ..0.........1... + 40212c00 32a0fd30 32100c02 66130421 deff2802 2..02...f..!..(. + 40212c10 083112c1 100df000 4780fe3f a20b0000 .1......G..?.... + 40212c20 a60b0000 882a0040 12c1e0d9 510971c9 .....*.@....Q.q. + 40212c30 61e941f9 31dd02cc 520c0246 1b000000 a.A.1...R..F.... + 40212c40 01dcc5c0 0000ed02 2c02e732 ebc5dafe ........,..2.... + 40212c50 32a0fd30 22106612 df21efff c1caff0c 2..0".f..!...... + 40212c60 03324200 222c00f1 b1f58ce2 41ecfff0 .2B.",......A... + 40212c70 3f200125 bac00000 0c02290c 41e9ff0c ? .%......).A... + 40212c80 053d0f22 ce01011f bac00000 290c1672 .=."........)..r + 40212c90 fa0c02c5 dd01ed02 280c3d0d 01e2ffc0 ........(.=..... + 40212ca0 00000c12 8c4e280c 29be0c12 0871c861 .....N(.)....q.a + 40212cb0 d851e841 f83112c1 200df000 12c1e0d9 .Q.A.1.. ....... + 40212cc0 51e94109 71c961f9 31dd02ed 03bc12ac Q.A.q.a.1....... + 40212cd0 f30c6401 d0b8c000 000c0c0c 2f220e00 ..d........./".. + 40212ce0 0c64f032 20e02c11 20233022 4d003d0e .d.2 .,. #0"M.=. + 40212cf0 2d0d01b2 d0c00000 ccb21bcc 66dcdd06 -...........f... + 40212d00 01000c02 4600000c 120871c8 61d851e8 ....F.....q.a.Q. + 40212d10 41f83112 c1200df0 0f0d0000 180d0000 A.1.. .......... + 40212d20 12c1d029 01218fbb c9a15852 e981f971 ...).!....XR...q + 40212d30 09b1d991 ed030c1c fd0222df 03220244 .........."..".D + 40212d40 1b22c7a2 02062800 502ca032 222616f3 ."....(.P,.2"&.. + 40212d50 0828010c 64526101 01b1bbc0 00005811 .(..dRa.......X. + 40212d60 56d20750 cca0222c 26380e32 624a2125 V..P..",&8.2bJ!% + 40212d70 c6280216 5206f16d f541e7ff 3d0f2cc2 .(..R..m.A..=.,. + 40212d80 01b4bcc0 0000dd02 1602050c 974b6279 .............Kby + 40212d90 021c032d 06726102 62610101 a8cbc000 ...-.ra.ba...... + 40212da0 00222c26 38012212 0d0c6422 4d106221 .",&8."...d"M.b! + 40212db0 01602620 0198b8c0 0000280e 4d0d293d .`& ......(.M.)= + 40212dc0 78211c52 70372001 18c6c000 008cb241 x!.Rp7 ........A + 40212dd0 d3ff3d0f 2d0d01cc b9c00000 0c124602 ..=.-.........F. + 40212de0 001b2c20 c07406d4 ff0c0208 b1c8a1d8 .., .t.......... + 40212df0 91e881f8 7112c130 0df00000 a8e0fe3f ....q..0.......? + 40212e00 360d0000 12c1d0c9 a1c156bb 09b1285c 6.........V...(\ + 40212e10 d991e981 f9712261 0005befe 380116b3 .....q"a....8... + 40212e20 06b62268 0c02226c 6121f4ff 0c1e226c .."h.."la!...."l + 40212e30 6222dc03 2202441b 22e72220 280120de b"..".D."." (. . + 40212e40 a0222d26 bcd22222 4abc8241 edff3137 ."-&..""J..A..17 + 40212e50 f51c0201 7fbcc000 00fd02cc 52222c61 ............R",a + 40212e60 c60a0000 322d260c 644b2201 6ab8c000 ....2-&.dK".j... + 40212e70 00222d26 22224a29 3f0c0229 0f222c62 ."-&""J)?..).",b + 40212e80 f902f26c 621beee0 e074c6e8 ff0c0208 ...lb....t...... + 40212e90 b1c8a1d8 91e881f8 7112c130 0df00000 ........q..0.... + 40212ea0 4d0d0000 12c1f0c9 21c12ebb 0931222c M.......!....1", + 40212eb0 619cb238 02326c61 cc4331d0 ff326c62 a..8.2la.C1..2lb + 40212ec0 41f8ff31 1af50190 b9c00000 86f7ff00 A..1............ + 40212ed0 0831c821 12c1100d f0000000 12c1f0c9 .1.!............ + 40212ee0 21c120bb d911d85c 093105b1 feac5db6 !. ....\.1....]. + 40212ef0 2223c2dc 03420c44 0c021b44 0c133724 "#...B.D...D..7$ + 40212f00 16d053a0 5225268c 351b2220 20741b33 ..S.R%&.5." t.3 + 40212f10 303074c6 f9ff0c02 0831c821 d81112c1 00t......1.!.... + 40212f20 100df000 24e2fe3f 12c1d0d9 91d10dbb ....$..?........ + 40212f30 c9a1e981 09b1f971 ed02c85d c5abfef6 .......q...].... + 40212f40 2202062f 00169c0b d2dd0132 0dde0c02 "../.......2.... + 40212f50 27130246 2b00222c 26d22c24 226c2456 '..F+.",&.,$"l$V + 40212f60 3e040c1f 1c0672cc 4831eeff 2203441b >.....r.H1..".D. + 40212f70 22f72248 c02fa032 22269cf3 28232786 "."H./.2"&..(#'. + 40212f80 1b2d070c 64690179 110122b8 c000000c .-..di.y.."..... + 40212f90 2432a0c0 2d0c05e4 ef781168 011b5f50 $2..-....x.h.._P + 40212fa0 f074c6f0 ff000c64 3d0e22cc 480119b8 .t.....d=.".H... + 40212fb0 c000000c 2432a0c0 2d0cc5e1 efd26c24 ....$2..-.....l$ + 40212fc0 0c1d31d8 ff220344 1b22d722 2ec0fda0 ..1..".D.".".... + 40212fd0 322f269c d356de00 322f262d 0cc510f7 2/&..V..2/&-.... + 40212fe0 06040000 00000c64 e02e2001 0cbbc000 .......d.. ..... + 40212ff0 001632fe 1bddd0d0 7446f1ff 0c128600 ..2.....tF...... + 40213000 00000c02 08b1c8a1 d891e881 f87112c1 .............q.. + 40213010 300df000 21d4ba0c 1422d201 2202de32 0...!....".."..2 + 40213020 c2fe0c02 3024830d f0000000 12c1f0c9 ....0$.......... + 40213030 21093120 c074459c fe0c0366 225321eb !.1 .tE....f"S!. + 40213040 f9220200 3792140c 13165c04 21c6ba0c ."..7.....\.!... + 40213050 2322d201 3242de46 0d000000 21d2ca32 #"..2B.F....!..2 + 40213060 a0014202 de164c01 26242632 a0023242 ..B...L.&$&2..2B + 40213070 de0c02c5 7df20c12 46040000 00161401 ....}...F....... + 40213080 32a00032 42de0c12 457cf20c 028521f2 2..2B...E|....!. + 40213090 0c130831 2d03c821 12c1100d f0000000 ...1-..!........ + 402130a0 3d027cf2 8c6321af ba32625e 0c020df0 =.|..c!..2b^.... + 402130b0 21adba0c 0332625e 0df00000 98e0fe3f !....2b^.......? + 402130c0 8ce0fe3f 94e0fe3f 90e0fe3f 88e0fe3f ...?...?...?...? + 402130d0 f00d0000 f40d0000 f60d0000 ff0d0000 ................ + 402130e0 000e0000 12c1d039 0159110c 05d991f9 .......9.Y...... + 402130f0 71202074 40f07460 d0740c14 3d056801 q t@.t`.t..=.h. + 40213100 20349309 b1c9a1e9 81303074 60459347 4.......00t`E.G + 40213110 8324f65f 21481157 9401dc93 9cc20b2d .$._!H.W.......- + 40213120 20207432 a0f62733 0de1e7ff 262f0246 t2..'3....&/.F + 40213130 3600280e 1682060c 02064000 c1e3ff66 6.(.......@....f + 40213140 2f42280c ac122812 d179f48c 9241e3ff /B(...(..y...A.. + 40213150 3d0d01ed b8c00000 280c41e1 ff3d0d01 =.......(.A..=.. + 40213160 eab8c000 000c0229 0cdc3f21 a0f92202 .......)..?!..". + 40213170 0066120b 3146c80c 14424300 462f0000 .f..1F...BC.F/.. + 40213180 0c12c62d 00f63f08 c1ceff26 1fb3c627 ...-..?....&...' + 40213190 00c1ccff 263faac1 c9ff264f a4062400 ....&?....&O..$. + 402131a0 c163f441 cbff0c05 3d0c0cc2 01d6b8c0 .c.A....=....... + 402131b0 0000290e 16f2f7f2 4200880e 41c6ff3d ..).....B...A..= + 402131c0 0c0c052d 0d892101 cfb8c000 00882129 ...-..!.......!) + 402131d0 18280e38 1256f300 41c0ffc0 3c2001ca .(.8.V..A...< .. + 402131e0 b8c00000 c6d3ff00 38010c34 1b220189 ........8..4.".. + 402131f0 b7c00000 280e3811 28124d0d 0186b7c0 ....(.8.(.M..... + 40213200 0000280e d2420886 d7ff0000 f63f0ce1 ..(..B.......?.. + 40213210 acff661f 0246c6ff c6060000 e1aaff66 ..f..F.........f + 40213220 3f0206c3 ffe1a5ff 664f02c6 c0ff4601 ?.......fO....F. + 40213230 00c1a6ff 86c2ffe1 a5ff06bd ff08b1c8 ................ + 40213240 a1d891e8 81f87112 c1300df0 20207426 ......q..0.. t& + 40213250 2229f632 0e9cb266 12312142 ba22225a ").2...f.1!B.""Z + 40213260 0df00000 26321c66 4221213e ba22225d ....&2.fB!!>.""] + 40213270 0df00000 213cba22 22590df0 213aba22 ....!<.""Y..!:." + 40213280 225b0df0 2138ba22 225c0df0 0c020df0 "[..!8.""\...... + 40213290 2135ba22 d2052222 140df000 370e0000 !5."..""....7... + 402132a0 3e0e0000 690e0000 12c1d0e9 81e11ff4 >...i........... + 402132b0 41fbffd9 910c05dd 023d0e22 a4a4c9a1 A........=.".... + 402132c0 09b1f971 0190b8c0 0000cd02 0c02279c ...q..........'. + 402132d0 02c63400 f134f820 3220221f 0052a4a4 ..4..4. 2 "..R.. + 402132e0 c04c2005 48fe0b2d f6320c21 1eba32d2 .L .H..-.2.!..2. + 402132f0 013203de ed029c23 41eaff31 0cf42d0c .2.....#A..1..-. + 40213300 0182b8c0 00000c02 06270000 22d20532 .........'.."..2 + 40213310 2214379d 02c61f00 f901056e fe5801fd ".7........n.X.. + 40213320 0221acbe 3d0cd262 14221500 d26cd142 .!..=..b."...l.B + 40213330 a4a405f4 fd212df9 32020066 1307c515 .....!-.2..f.... + 40213340 f80c02c5 50f22d0d 058af231 a2be0c02 ....P.-....1.... + 40213350 22631022 6ccd663d 042d0e45 45f53123 "c."l.f=.-.EE.1# + 40213360 f9220300 66123022 a0fd202f 10661205 ."..f.0".. /.f.. + 40213370 850bf885 48ff22cf fe202074 f622090c ....H.".. t.".. + 40213380 0245f2f1 06040000 00661f0b 222e0416 .E.......f.."... + 40213390 52002222 00c57315 41c3ff31 e4f32d0c R.""..s.A..1..-. + 402133a0 015ab8c0 00000c12 08b1c8a1 d891e881 .Z.............. + 402133b0 f87112c1 300df000 21fece0c 13324200 .q..0...!....2B. + 402133c0 0df00000 21fbce0c 03324200 0df00000 ....!....2B..... + 402133d0 12c1f002 610332a0 00f63205 45e60b32 ....a.2...2.E..2 + 402133e0 a0010831 2d0312c1 100df000 12c1f020 ...1-.......... + 402133f0 20740261 0345f50b 02210322 a00112c1 t.a.E...!.".... + 40213400 100df000 12c1f020 20740261 03c5f40b ....... t.a.... + 40213410 02210322 a00112c1 100df000 904e0040 .!.".........N.@ + 40213420 12c1f009 31c921d9 11cd02dd 0301fbff ....1.!......... + 40213430 c000003d 0d2d0c05 7f0b0831 c821d811 ...=.-.....1.!.. + 40213440 12c1100d f0000000 d44e0040 12c1f009 .........N.@.... + 40213450 3101fdff c0000045 800b0831 12c1100d 1......E...1.... + 40213460 f0000000 12c1f009 31c5ec0b 083112c1 ........1....1.. + 40213470 100df000 12c1f009 3185ed0b 083112c1 ........1....1.. + 40213480 100df000 12c1f009 3185ed0b 083112c1 ........1....1.. + 40213490 100df000 12c1f002 610301c6 c2c00000 ........a....... + 402134a0 08312202 0612c110 0df00000 12c1f0c9 .1"............. + 402134b0 21093120 c074c58b ee0c03c7 32360178 !.1 .t......26.x + 402134c0 c7c00000 0bcc22a0 80c0cc90 20cca021 ......"..... ..! + 402134d0 a5b92acc 32224b4b ccc71308 316cc742 ..*.2"KK....1l.B + 402134e0 a0014243 00c2624b 016fc7c0 00002d0c ..BC..bK.o....-. + 402134f0 8582f20c 1308312d 03c82112 c1100df0 ......1-..!..... + 40213500 a8dffe3f 12c1f0c9 21c196b9 0931d911 ...?....!....1.. + 40213510 22dc0132 02332202 342a3322 dc034202 "..2.3".4*3"..B. + 40213520 41372445 32a00132 4241054d fe662208 A7$E2..2BA.M.f". + 40213530 285cccf2 860c0000 00054cfe 2632f0c6 (\........L.&2.. + 40213540 09000000 000156c7 c0000022 2c4bd1ec ......V....",K.. + 40213550 ffd71207 214ec70c 13324200 d26c4b01 ....!N...2B..lK. + 40213560 51c7c000 002d0d45 7bf20831 0c12c821 Q....-.E{..1...! + 40213570 d81112c1 100df000 12c1f03d 0209310c ...........=..1. + 40213580 0227132d 42030327 14272203 04ac122a .'.-B..'.'"....* + 40213590 440cf522 a0004725 1821d7b9 42a00601 D.."..G%.!..B... + 402135a0 9db6c000 002139c7 0c133242 0045f5ff .....!9...2B.E.. + 402135b0 0c120831 12c1100d f0000000 b8f02240 ...1.........."@ + 402135c0 12c1f0c9 210931cd 02ccc221 fcff019f ....!.1....!.... + 402135d0 bac00000 0c020604 000572ee 3d020c64 ..........r.=..d + 402135e0 2d0c018c b6c00000 0c120831 c82112c1 -..........1.!.. + 402135f0 100df000 415cb912 c1f00261 03c26102 ....A\.....a..a. + 40213600 42d401c2 04de661c 3a4157b9 52a001c0 B.....f.:AW.R... + 40213610 20003804 505320c0 20005904 c0200038 .8.PS . .Y.. .8 + 40213620 040c2550 5320c020 005904c0 20003804 ..%PS . .Y.. .8. + 40213630 0c455053 20c02000 59043d02 0c02c59e .EPS . .Y.=..... + 40213640 0f460000 0c0c0831 2d0cc821 12c1100d .F.....1-..!.... + 40213650 f0000000 12c1f0c9 210931d9 1120c074 ........!.1.. .t + 40213660 8539fe31 62f83203 0016830b 26120286 .9.1b.2.....&... + 40213670 2c00d13c b9d2dd01 220dde66 3202c628 ,..<...."..f2..( + 40213680 0016cc04 66120246 2800c51e ff0102c7 ....f..F(....... + 40213690 c0000021 35b97ce3 c0200048 02303410 ...!5.|.. .H.04. + 402136a0 c0200039 02c02000 48027cd3 303410c0 . .9.. .H.|.04.. + 402136b0 20003902 c0200048 027cb330 3410c020 .9.. .H.|.04.. + 402136c0 0039020c 12224dde 05291045 26100616 .9..."M..).E&... + 402136d0 00165205 01f1c6c0 0000853a 102122b9 ..R........:.!". + 402136e0 c2a001c0 20003802 c03320c0 20003902 .... .8..3 . .9. + 402136f0 c0200048 020c2330 3420c020 003902c0 . .H..#04 . .9.. + 40213700 20004802 0c433034 20c02000 39023146 .H..C04 . .9.1F + 40213710 df22a000 45910f22 a000224d de052110 ."..E..".."M..!. + 40213720 2d0c8601 000c0246 00000c12 0831c821 -......F.....1.! + 40213730 d81112c1 100df000 60ddfe3f 31ffff29 ........`..?1..) + 40213740 030df000 12c1f0c2 6102d261 01026103 ........a..a..a. + 40213750 20d074cd 03f62d5d 16a3052d 0d053101 .t...-]...-..1. + 40213760 9c123202 3907630c 3812390c 38222832 ..2.9.c.8.9.8"(2 + 40213770 391c0608 00ec4d21 97f02202 00661208 9.....M!.."..f.. + 40213780 0c02290c 291c0603 002128ba 3832390c ..).)....!(.829. + 40213790 38422852 391c292c 0c128606 00216df6 8B(R9.),.....!m. + 402137a0 22020026 12d92121 ba380239 0c381228 "..&..!!.8.9.8.( + 402137b0 22391cc6 f7ff0c02 0831c821 d81112c1 "9.......1.!.... + 402137c0 100df000 12c1e002 6107c261 06c522fe ........a..a..". + 402137d0 3d020c02 b6233021 e3b822d2 013202de =....#0!.."..2.. + 402137e0 0c022793 2222a001 452801c1 5af68cf2 ..'.""..E(..Z... + 402137f0 220c00cc a23d010c 1285f4ff 2d0145d9 "....=......-.E. + 40213800 110c1222 4c000c12 0871c861 12c1200d ..."L....q.a.. . + 40213810 f0000000 12c1e0c2 61060261 0720c074 ........a..a. .t + 40213820 160301f6 2c0d2d0c 39014524 013801ec ....,.-.9.E$.8.. + 40213830 1c060100 0c040612 004166f0 42040026 .........Af.B..& + 40213840 14f15803 41fab959 34581359 44582359 ..X.A..Y4X.YDX#Y + 40213850 54860600 4140f642 04002614 d6522300 T...A@.B..&..R#. + 40213860 41f3b952 64005223 01591458 2359240c A..Rd.R#.Y.X#Y$. + 40213870 148cd252 02390765 084b438b 53052c15 ...R.9.e.KC.S.,. + 40213880 0c140871 2d04c861 12c1200d f0000000 ...q-..a.. ..... + 40213890 12c1f0c9 21d91109 3120d074 cd03f62d ....!...1 .t...- + 402138a0 23ac032d 0d851c01 0c6432c2 33cc7231 #..-.....d2.3.r1 + 402138b0 74c6562d 0031dcde 2d0c01d6 b5c00000 t.V-.1..-....... + 402138c0 0c124600 000c0208 31c821d8 1112c110 ..F.....1.!..... + 402138d0 0df00000 e0e1fe3f 12c1d032 c1140c12 .......?...2.... + 402138e0 c9a109b1 85faffc1 9fb8222c af26020b ..........",.&.. + 402138f0 22dc0232 02c022a0 ff27932c 21a5fc1c "..2.."..'.,!... + 40213900 44103120 0578fd21 f3ff32a0 2401cbc8 D.1 .x.!..2.$... + 40213910 c0000062 01195201 18420117 218dbe3d ...b..R..B..!..= + 40213920 01c57101 0ca2226c af08b10c 12c8a112 ..q..."l........ + 40213930 c1300df0 12c1d0d9 91dd0222 a0b44921 .0........."..I! + 40213940 2a2d2c04 c9a1f971 cd030261 0be98122 *-,....q...a..." + 40213950 610001b2 b8c00000 f2cc208c 620c1e46 a......... .b..F + 40213960 19000000 0022a0d4 4c043d0f 2a2d01ab ....."..L.=.*-.. + 40213970 b8c00000 5652fe22 dd014202 36322c19 ....VR."..B.62,. + 40213980 3714180c 0ee7943f 32c3fee2 a001b633 7......?2......3 + 40213990 02e2a000 e0e07446 0b000000 42023532 ......tF....B.52 + 402139a0 0c613794 20420238 320c6937 94173202 .a7. B.82.i7..2. + 402139b0 37220c68 27930e22 dd033212 36221c35 7".h'.."..2.6".5 + 402139c0 27930246 60000c0e 222c19f6 220e321c '..F`...",..".2. + 402139d0 002186b9 27933805 f0ff8616 002d0f01 .!..'.8......-.. + 402139e0 74c2c000 00e68204 0c020657 00f02f20 t..........W../ + 402139f0 0170c2c0 000032a0 3f27a3d1 32a11542 .p....2.?'..2..B + 40213a00 a0203a3d 2d0fc513 fa2602db 86efff00 . :=-....&...... + 40213a10 220c60cc 922d0c01 66c2c000 00202074 ".`..-..f.... t + 40213a20 2c032733 02203220 2801326d 2c2c04c0 ,.'3. 2 (.2m,,.. + 40213a30 3c200178 b5c00000 22a0d42a 2d3d0f4c < .x...."..*-=.L + 40213a40 04291101 74b5c000 000c02f2 dd01224f .)..t........."O + 40213a50 14222c19 f6620266 12010c02 224f3622 .",..b.f...."O6" + 40213a60 0c610534 eecc6285 32ee0601 00000022 .a.4..b.2......" + 40213a70 0c61224f 35220c68 b622010c 02224f37 .a"O5".h."..."O7 + 40213a80 220c6932 a00827b3 0222a008 224f3852 ".i2..'..".."O8R + 40213a90 1c354116 dc32c59c 3030f440 40f422dd .5A..2..00.@@.". + 40213aa0 0337b408 32a06432 52368600 00525236 .7..2.d2R6...RR6 + 40213ab0 32210256 a3012212 3632a064 0104b9c0 2!.V..".62.d.... + 40213ac0 00002020 f42022a0 2022a040 22118549 .. . ". ".@"..I + 40213ad0 0f222c19 b6223228 110135c2 c000003c .",.."2(..5....< + 40213ae0 f3272325 076e2285 1afdc5ed 0c512cc1 .'#%.n"......Q,. + 40213af0 422d2c38 0162a115 28112c07 6a6d0111 B-,8.b..(.,.jm.. + 40213b00 eac00000 85ee0c85 1bfd2821 66121021 ..........(!f..! + 40213b10 25f642a4 a4221200 3d0d8575 fdc60900 %.B.."..=..u.... + 40213b20 32210256 1302210f b838529c 9322d201 2!.V..!..8R..".. + 40213b30 2202decc 9285d1f1 0c02c576 f1c60100 "..........v.... + 40213b40 21d3c50c 13324200 0c1208b1 c8a1d891 !....2B......... + 40213b50 e881f871 12c1300d f0000000 108cfe3f ...q..0........? + 40213b60 0c8cfe3f e60c0000 ed0c0000 12c1f0c9 ...?............ + 40213b70 21cd02d9 110931e2 610030d3 20c5e7fd !.....1.a.0. ... + 40213b80 8cdcb622 0b21f7b7 22d20122 02de6612 ...".!..".."..f. + 40213b90 040c0246 1c000c62 8583fc66 021a21ef ...F...b...f..!. + 40213ba0 ff42a06c 3d0c011b b5c00000 21edffd2 .B.l=.......!... + 40213bb0 42000c12 06140000 00661d40 e1dcf141 B........f.@...A + 40213bc0 e9ff0c05 e03e2022 a4a4014e b6c00000 .....> "...N.... + 40213bd0 dd0216b2 fb4d0221 f3f552a4 a4221200 .....M.!..R..".. + 40213be0 32a00005 b8fd0c14 3d0cd02d 2045d4ff 2.......=..- E.. + 40213bf0 41deff3d 0e2d0d01 44b6c000 00218ed4 A..=.-..D....!.. + 40213c00 0c04c03c 20c5d2ff 0831c821 d811e801 ...< ....1.!.... + 40213c10 12c1100d f0000000 12c1f00c 130931c5 ..............1. + 40213c20 f4ff0831 12c1100d f0000000 12c1f00c ...1............ + 40213c30 03093185 f3ff0831 12c1100d f0000000 ..1....1........ + 40213c40 fa0b0000 3a0c0000 12c1b0d2 6111f9f1 ....:.......a... + 40213c50 026113c2 6112e261 10dd02fd 03564200 .a..a..a.....VB. + 40213c60 0c02864c 0026132a 41f6ff31 b0f10c05 ...L.&.*A..1.... + 40213c70 22a4a401 24b6c000 00cd0216 12fe2042 "...$......... B + 40213c80 2021c8f5 52a4a422 120032a0 0045adfd !..R.."..2..E.. + 40213c90 860000c1 69d4e2dc 01220e36 f6520266 ....i....".6.R.f + 40213ca0 12150c02 226d1922 a0d44c03 2a2c01e3 ...."m."..L.*,.. + 40213cb0 c7c00000 c6000000 226d1922 2c2c2602 ........"m.",,&. + 40213cc0 08320cb4 22a0ff27 933621b1 fb1c443d .2.."..'.6!...D= + 40213cd0 01453bfd 32c1140c 1245bbff 22a0b02c .E;.2....E..".., + 40213ce0 432a2c01 d6c7c000 00620119 52011842 C*,......b..R..B + 40213cf0 011722a0 b43d012a 2c453401 0ca2226c .."..=.*,E4..."l + 40213d00 2c32a0b4 2c043a3c d02d2001 c2b4c000 ,2..,.:<.- ..... + 40213d10 0032a0d4 4c043a3c 22cd2001 beb4c000 .2..L.:<". ..... + 40213d20 00222c2c 1cf40b32 37b4010c 02224d60 .",,...27...."M` + 40213d30 320e3539 81c503ee 38813732 04220e35 2.59....8.72.".5 + 40213d40 cc020c12 224d6122 0e37b622 0222a000 ...."Ma".7.".".. + 40213d50 224d6822 0e380c83 27b3010c 82224d69 "Mh".8..'...."Mi + 40213d60 22dc0342 12363161 db22c49c 2020f430 "..B.61a.".. .0 + 40213d70 30f427b3 0a22a064 225d3506 01000000 0.'..".d"]5..... + 40213d80 425d350c 12271f0f 41afff31 68f12d0c B]5..'..A..1h.-. + 40213d90 01deb5c0 00000c12 022113c2 2112d221 .........!..!..! + 40213da0 11e22110 f8f112c1 500df000 12c1f00c ..!.....P....... + 40213db0 13093145 e9ff0831 12c1100d f0000000 ..1E...1........ + 40213dc0 12c1f00c 03093105 e8ff0831 12c1100d ......1....1.... + 40213dd0 f0000000 12c1e0c9 61d951f9 310971e9 ........a.Q.1.q. + 40213de0 41cd0320 f07445c1 fddd028c 7cf62f05 A.. .tE.....|./. + 40213df0 220c0007 62050c0c c63d0000 2d0f05c7 "...b....=..-... + 40213e00 00ed0256 ef0622a0 fd20dd10 166dfef1 ...V..".. ...m.. + 40213e10 86dd0c64 3d0c2d0f 0181b7c0 000016f2 ...d=.-......... + 40213e20 0c261d27 0c643d0c 2d0f017a b4c00000 .&.'.d=.-..z.... + 40213e30 acce0c64 3d0c22ce 330176b4 c00000c5 ...d=.".3.v..... + 40213e40 65f7855e f7459bfe 46290000 210dc50c e..^.E..F)..!... + 40213e50 643d0c01 72b7c000 001692f9 06f1ff00 d=..r........... + 40213e60 216efbc2 0200261c 02062100 2d0f45d2 !n....&...!.-.E. + 40213e70 fe861f00 0045b8fd 661202c6 ddfff100 .....E..f....... + 40213e80 c50c643d 0c2d0f01 65b7c000 00160206 ..d=.-..e....... + 40213e90 d2cdfed0 d074b62d 120c643d 0c2d0f01 .....t.-..d=.-.. + 40213ea0 5db4c000 00dc6e86 11000000 215fdd0c ].....n.....!_.. + 40213eb0 643d0c01 5ab7c000 001692f3 46f6ff42 d=..Z.......F..B + 40213ec0 a006c03c 2022ce33 0153b4c0 00002125 ...< ".3.S....!% + 40213ed0 b722d201 2202de66 220a22a0 010597f1 .".."..f"."..... + 40213ee0 0c120602 0022a000 4596f122 a000853b ....."..E.."...; + 40213ef0 f10c1c08 712d0cd8 51c861e8 41f83112 ....q-..Q.a.A.1. + 40213f00 c1200df0 3118b732 d3012243 f90df000 . ..1..2.."C.... + 40213f10 9c629c43 4114b742 d4015204 fb524300 .b.CA..B..R..RC. + 40213f20 3204fa32 42000c02 0df07cf2 0df00000 2..2B.....|..... + 40213f30 3030741c f4205074 7cf23734 127ce2f6 00t.. Pt|.74.|.. + 40213f40 450d4108 b70c0242 d4013244 fb5244fa E.A....B..2D.RD. + 40213f50 0df00000 4104b70c 3752d405 52251420 ....A...7R..R%. + 40213f60 20740b65 3030740c b5605783 27331037 t.e00t..`W.'3.7 + 40213f70 350d42d4 012244fc 3244fd0c 020df000 5.B.."D.2D...... + 40213f80 7cf20df0 12c1f002 61032020 74303074 |.......a. t00t + 40213f90 40407450 507462a0 00f6320d 85830e32 @@tPPtb...2....2 + 40213fa0 a0000c16 20639360 60740831 2d0612c1 .... c.``t.1-... + 40213fb0 100df000 21ecb622 d2012202 fe0df000 ....!..".."..... + 40213fc0 2040747c c30c0237 840a31e6 b60c1232 @t|...7..1....2 + 40213fd0 d3014243 fe0df000 3d027cf2 8c6321e1 ..BC....=.|..c!. + 40213fe0 b632627b 0c020df0 21dfb60c 0332627b .2b{....!....2b{ + 40213ff0 0df00000 12c1f0c9 21d911e9 010931cd ........!.....1. + 40214000 02dd0340 e074459f fd26120c ace2f642 ...@.tE..&.....B + 40214010 2c21d4b6 68524601 0021d2b6 62220422 ,!..hRF..!..b"." + 40214020 aff616a6 014d0d3d 0c5d0e2d 068584ef .....M.=.].-.... + 40214030 0c030c14 20349330 20608600 00007c62 .... 4.0 `....|b + 40214040 0831c821 d811e801 12c1100d f0000000 .1.!............ + 40214050 12c1f009 3185b1ed 083112c1 100df000 ....1....1...... + 40214060 12c1f009 31c5b3ed 083112c1 100df000 ....1....1...... + 40214070 12c1f009 3145b8ed 083112c1 100df000 ....1E...1...... + 40214080 12c1f009 3145b8ed 083112c1 100df000 ....1E...1...... + 40214090 51b5b60c 1652d502 22451662 45156245 Q....R.."E.bE.bE + 402140a0 17404074 0c455054 10c02000 6803e055 .@@t.EPT.. .h..U + 402140b0 11404014 40452022 aecfc044 11202610 .@@.@E "...D. &. + 402140c0 204420c0 20004903 0df00000 21a6b612 D . .I.....!... + 402140d0 c1f00931 22d20232 02156613 0e32a000 ...1"..2..f..2.. + 402140e0 32421521 e2d401b5 bfc00000 083112c1 2B.!.........1.. + 402140f0 100df000 2020740b 320c140c 02302483 .... t.2....0$. + 40214100 310ff322 43000df0 e48bfe3f 60dcfe3f 1.."C......?`..? + 40214110 30032140 d00d0040 12c1f0e9 01ed0221 0.!@...@.......! + 40214120 faffc921 d9110931 320200cd 02d135c1 ...!...12.....5. + 40214130 dc8321f7 ff41f5ff 2c051c53 01f6ffc0 ..!..A..,..S.... + 40214140 00000c12 e90d224c 00460000 e90d0831 ......"L.F.....1 + 40214150 c821d811 e80112c1 100df000 a3f02240 .!............"@ + 40214160 8cf02240 12c1f009 31303074 505074b6 .."@....100tPPt. + 40214170 330d21fa ff0c3301 b5b7c000 00060300 3.!...3......... + 40214180 8c04ccc5 21f7ff01 b1b7c000 000c0206 ....!........... + 40214190 03002b33 30307401 dfffc000 000c1208 ..+300t......... + 402141a0 3112c110 0df00000 ddf12240 e00df23f 1........."@...? + 402141b0 33330000 00070060 44070060 0c070060 33.....`D..`...` + 402141c0 10000100 48070060 ff01ffff 00fc0000 ....H..`........ + 402141d0 10070060 04070060 18070060 08070060 ...`...`...`...` + 402141e0 9c070060 a0070060 c8400600 0000f03f ...`...`.@.....? + 402141f0 40070060 980f0040 e8171040 21ebff12 @..`...@...@!... + 40214200 c1f00931 c921d911 0191b7c0 0000215a ...1.!........!Z + 40214210 f2220200 05ce0531 e6ff21e4 ffc02000 .".....1..!... . + 40214220 39021c42 011ec4c0 0000c14d f00c02c0 9..B.......M.... + 40214230 3c2045fd fb3d0c0c 12c5fcfb c1deff0c < E..=.......... + 40214240 05c02000 590cc020 00380c21 43cad1db .. .Y.. .8.!C... + 40214250 ff202310 c0200029 0cc02000 380c3c02 . #.. .).. .8.<. + 40214260 202320c0 2000290c 21d4ff0c 43c02000 # . .).!...C. . + 40214270 390221d3 ff31d4ff c0200029 0d21d1ff 9.!..1... .).!.. + 40214280 c0200048 02304410 31d1ff30 3420c020 . .H.0D.1..04 . + 40214290 003902c0 20004802 32ae0030 441032a0 .9.. .H.2..0D.2. + 402142a0 80303420 c0200039 0221c9ff c0200059 .04 . .9.!... .Y + 402142b0 02211ef3 c0200038 0222a088 2a2331c5 .!... .8."..*#1. + 402142c0 ffc02000 290321c4 ff0c83c0 20003902 .. .).!..... .9. + 402142d0 31dcbd21 c2ffc020 00390222 a0c801ef 1..!... .9.".... + 402142e0 c3c00000 51bfff31 bfff1c16 c0200069 ....Q..1..... .i + 402142f0 050c3421 bdffc020 004903c0 2000290d ..4!... .I.. .). + 40214300 c0200078 0c22afcf 202710c0 2000290c . .x.".. '.. .). + 40214310 c0200069 05c02000 4903318e ef7ce2c0 . .i.. .I.1..|.. + 40214320 20004803 202410c0 20002903 22a10001 .H. $.. .)."... + 40214330 b1ffc000 0031adff 6c0542a0 0ec02000 .....1..l.B... . + 40214340 28035022 10402220 c0200029 03c02000 (.P".@" . .).. . + 40214350 280307e2 e721a6ff 7cf3c1c4 f5c02000 (....!..|..... . + 40214360 39022195 ff2c03c0 20003902 381c280c 9.!..,.. .9.8.(. + 40214370 05db0838 1c280c30 22203197 ff8c020c ...8.(.0" 1..... + 40214380 82c02000 2903019c ffc00000 08310c12 .. .)........1.. + 40214390 c821d811 12c1100d f0000000 c8f12240 .!............"@ + 402143a0 12c1f002 6103c261 02d911cd 0230d320 ....a..a.....0. + 402143b0 45930a4d 023d0d2d 0c85d008 41acf529 E..M.=.-....A..) + 402143c0 043914cc 13d60201 21f5ff01 20b7c000 .9......!... ... + 402143d0 000c0246 01000000 0005e2ff 0831c821 ...F.........1.! + 402143e0 d81112c1 100df000 1800f03f ff00ffff ...........?.... + 402143f0 30070060 00750000 ff8affff 480d0060 0..`.u......H..` + 40214400 d0391040 90181040 6c171040 04171040 .9.@...@l..@...@ + 40214410 12c1d00c 4209b1c9 a185fbfb 6602150c ....B.......f... + 40214420 0201f7ff c0000031 f1ff21ef ffc02000 .......1..!... . + 40214430 3902c504 091cc43d 010c0201 f2ffc000 9......=........ + 40214440 00280122 c2feb622 231cc40c 032d0101 .(."..."#....-.. + 40214450 f0b2c000 0031e6ff 0c42c020 00290329 .....1...B. .).) + 40214460 011cc43d 010c0201 e8ffc000 00102120 ...=..........! + 40214470 8514fcc1 bbef0c02 3d0cc5d8 fb3d0c22 ........=....=." + 40214480 a00145d8 fb05eefb 0186c3c0 000021d6 ..E...........!. + 40214490 ff31d8ff c0200048 02303420 c0200039 .1... .H.04 . .9 + 402144a0 02c02000 480231d4 ff303410 c0200039 .. .H.1..04.. .9 + 402144b0 0221d2ff 0c23c020 00480230 3420c020 .!...#. .H.04 . + 402144c0 003902c0 20004802 7cd33034 10c02000 .9.. .H.|.04.. . + 402144d0 390201ce ffc00000 08b1c8a1 12c1300d 9.............0. + 402144e0 f0000000 12c1f0c9 21c1b5ef d9110261 ........!......a + 402144f0 03e26100 0c02d1b3 ef224c00 220d00ed ..a......"L."... + 40214500 0d165204 05810bbc 92e1b0ef 31b1ef22 ..R.........1.." + 40214510 0e002a23 22020026 324ef642 0e261242 ..*#"..&2N.B.&.B + 40214520 66226c85 2dfe8619 00000000 265251b6 f"l.-.......&RQ. + 40214530 52466662 5a218afd 32020021 88fdc562 RFfbZ!..2..!...b + 40214540 ffc61200 c5730a16 e2fb220e 00d19bef .....s...."..... + 40214550 56d2052d 0d0199be c000000c 02c61d00 V..-............ + 40214560 00000045 31fe8609 0021def5 32020021 ...E1....!..2..! + 40214570 dcf5c577 fdc60500 0045e9ff 06040000 ...w.....E...... + 40214580 002198f4 32020021 96f42202 000526fd .!..2..!.."...&. + 40214590 220d000b 22224d00 220e001b 22202074 "...""M."..." t + 402145a0 224e0026 920286d4 ff0c0222 4e0086d2 "N.&......."N... + 402145b0 ff05210a 56220045 f2090c12 859c0b2d ..!.V".E.......- + 402145c0 0d017ebe c00000d0 2d200c15 0c040ca3 ..~.....- ...... + 402145d0 017abec0 00000c12 224c0008 31c821d8 .z......"L..1.!. + 402145e0 11e80112 c1100df0 08080060 10080060 ...........`...` + 402145f0 12c1f0c9 21c15aef 0c023d0c 093185c0 ....!.Z...=..1.. + 40214600 fb3d0c0c 1205c0fb 51f8ff42 aecfc020 .=......Q..B... + 40214610 00280532 a1004022 10302220 c0200029 .(.2..@".0" . .) + 40214620 0521f2ff 0831c020 005802c8 21404510 .!...1. .X..!@E. + 40214630 303420c0 20003902 314bef0c 42c02000 04 . .9.1K..B. . + 40214640 480312c1 10202420 c0200029 030df000 H.... $ . .).... + 40214650 c083fe3f 21ffff0d f0000000 2c86fe3f ...?!.......,..? + 40214660 3086fe3f cc240040 12c1f038 02093126 0..?.$.@...8..1& + 40214670 031131fa ff21faff 42a11b01 faffc000 ..1..!..B....... + 40214680 0006ffff 08310c03 39123922 39323942 .....1..9.9"929B + 40214690 12c1100d f0000000 68ddfe3f 6cddfe3f ........h..?l..? + 402146a0 048dfe3f ec191040 6c191040 12c1f0d9 ...?...@l..@.... + 402146b0 11e90109 31c92101 fac2c000 002131b7 ....1.!......!1. + 402146c0 d1f8ffc0 20004802 212ab7c0 2000e802 .... .H.!*.. ... + 402146d0 c80d16cc 06281c40 32c0e613 5e31eeff .....(.@2...^1.. + 402146e0 583cc903 31eeff59 03380c39 0d7cf339 X<..1..Y.8.9.|.9 + 402146f0 0c382cac 53511eb7 61e3c2c0 20005805 .8,.SQ..a... .X. + 40214700 e055c057 b6073a34 06010000 00003a32 .U.W..:4......:2 + 40214710 391c281c 3d0c01e3 ffc00000 01e2c2c0 9.(.=........... + 40214720 0000284c 383cc003 0001ddc2 c0000021 ..(L8<.........! + 40214730 15b7c020 00480246 e5ff0000 01dbffc0 ... .H.F........ + 40214740 000001d8 c2c00000 0831c821 d811e801 .........1.!.... + 40214750 12c1100d f0000000 12c1f028 020931cc ...........(..1. + 40214760 1285f4ff 083112c1 100df000 a01a1040 .....1.........@ + 40214770 088dfe3f 58472140 30060060 20060060 ...?XG!@0..` ..` + 40214780 12c1f021 c7ff0931 c921d911 0c0c31f7 ...!...1.!....1. + 40214790 ff4d0cc9 020ca201 72eec000 00316dee .M......r....1m. + 402147a0 0c4dc020 002803d0 2220c020 00290322 .M. .(.." . .)." + 402147b0 a400016c eec00000 21efff41 edff5d0d ...l....!..A..]. + 402147c0 1cf30154 fec00000 21ecff32 a088c020 ...T....!..2... + 402147d0 00c90221 4bf10831 c0200039 0221e7ff ...!K..1. .9.!.. + 402147e0 d811c020 00c902c8 2112c110 0df00000 ... ....!....... + 402147f0 0c633242 3232a5dc 32521832 afb23242 .c2B22..2R.2..2B + 40214800 390c020d f0000000 e2f42240 b47d2240 9........."@.}"@ + 40214810 d01c1040 842a2140 308dfe3f c84a2140 ...@.*!@0..?.J!@ + 40214820 f0472140 a87e2240 2c8dfe3f 904a2140 .G!@.~"@,..?.J!@ + 40214830 cef42240 9ff42240 9cf42240 12c1a0f2 .."@.."@.."@.... + 40214840 6113f802 d26115e2 61140261 17c26116 a....a..a..a..a. + 40214850 39c1dd02 ed04dc6f 31ecff0c 0542a0c0 9......o1....B.. + 40214860 22a04401 28b3c000 00290dcd 02164217 ".D.(....)....B. + 40214870 222d3256 520121e8 f8220200 66120428 "-2VR.!.."..f..( + 40214880 c10531fe 21c0f828 02860000 22a00022 ..1.!..(....".." + 40214890 6c0b22a0 65224c3a 22a07722 4c3b21db l.".e"L:".w"L;!. + 402148a0 ff32210c 295c21da ffd97c29 6c0c6422 .2!.)\!...|)l.d" + 402148b0 cc3301d8 b1c00000 222d3256 b20621d5 .3......"-2V..!. + 402148c0 ff29ac05 8bfc6612 080c0229 a1299146 .)....f....).).F + 402148d0 0200280e 29a1281e 2991282e 61cfff29 ..(.).(.).(.a..) + 402148e0 812806ed 06564201 31c8ff52 a00042a0 .(...VB.1..R..B. + 402148f0 f222a050 0104b3c0 0000226e 00480e21 .".P......"n.H.! + 40214900 c7ff0ca5 1cc30103 fec00000 21c6ff71 ............!..q + 40214910 c4ff2901 6d0d52c1 2042c124 32c1282d ..).m.R. B.$2.(- + 40214920 0c452514 fd0cc62e 0000280e 52c12029 .E%.......(.R. ) + 40214930 a1281e42 c1242991 282e32c1 2829812d .(.B.$).(.2.().- + 40214940 0cc51f14 61b9ff28 06fd06dc 2231aeff ....a..(...."1.. + 40214950 0c0542a1 0022a050 01ebb2c0 0000226f ..B..".P......"o + 40214960 00480f21 b2ff0ca5 1cd301ea fdc00000 .H.!............ + 40214970 21adff71 abff2901 6d0d52c1 2042c124 !..q..).m.R. B.$ + 40214980 32c1282d 0c051f14 21f3f1fd 0c220200 2.(-....!....".. + 40214990 1612052d 0ec5bf10 21a6ff01 acb5c000 ...-....!....... + 402149a0 00220123 72012429 61220122 62012b29 .".#r.$)a"."b.+) + 402149b0 51220121 52012a29 41220120 42012929 Q".!R.*)A". B.)) + 402149c0 31220127 32012829 21220126 29112201 1".'2.()!".&).". + 402149d0 25290121 98ff019d b5c00000 2197ff01 %).!........!... + 402149e0 9bb5c000 00022117 2d0fc221 16d22115 ......!.-..!..!. + 402149f0 e22114f2 211312c1 600df000 12c1f0c2 .!..!...`....... + 40214a00 610220c2 20222232 026103d9 11dc3228 a. . ""2.a....2( + 40214a10 0cc52414 3181ff42 a11c2803 dd03ec22 ..$.1..B..(...." + 40214a20 460b0000 21ccf122 02001622 0005cf10 F...!.."...".... + 40214a30 222c00c5 2214317c ff222300 dd0316f2 ",..".1|."#..... + 40214a40 0042a127 3171ff01 b0b2c000 000c0229 .B.'1q.........) + 40214a50 0d280c8c e2316cff 42a12d01 abb2c000 .(...1l.B.-..... + 40214a60 000c0229 0c0831c8 21d81112 c1100df0 ...)..1.!....... + 40214a70 202074cc 62213bb4 3842c601 0066120d t.b!;.8B...f.. + 40214a80 2139b438 520c0227 13032803 0df00df0 !9.8R..'..(..... + 40214a90 12c1f0c9 21cd020c 12093145 fdff380c ....!.....1E..8. + 40214aa0 dca38ca2 48423d02 281cc004 00460300 ....HB=.(....F.. + 40214ab0 c22c0122 2c040529 0c2d0c45 2e140831 .,.",..).-.E...1 + 40214ac0 c82112c1 100df000 12c1f0c9 21cd020c .!..........!... + 40214ad0 020931c5 f9ff380c dca38ca2 48423d02 ..1...8.....HB=. + 40214ae0 281cc004 00460300 c22c0122 2c048525 (....F...,.",..% + 40214af0 0c2d0cc5 2a140831 c82112c1 100df000 .-..*..1.!...... + 40214b00 12c1f0c9 21d91109 31e901dd 02c80266 ....!...1......f + 40214b10 93192d0c 0173b3c0 0000ed02 0ca32d0c ..-..s........-. + 40214b20 01ebb4c0 0000290d 06020000 c0e034c0 ......).......4. + 40214b30 c441c902 08312d0e c821d811 e80112c1 .A...1-..!...... + 40214b40 100df000 5cd8ff3f 48d8ff3f 12c1b0c2 ....\..?H..?.... + 40214b50 6112f9f1 cd02fd03 21fbff31 fbff7086 a.......!..1..p. + 40214b60 04d26111 80238302 6113e261 104941dd ..a..#..a..a.IA. + 40214b70 078d0247 670522af fe20d710 d040042c ...Gg.".. ...@., + 40214b80 023c0340 23934d02 0c0e176d 1f2841e7 .<.@#.M....m.(A. + 40214b90 a2092020 6029412c de060400 2cbe27ed .. `)A,....,.'. + 40214ba0 0b0c8ee0 2d100c03 2c0e20e3 8328410c ....-...,. ..(A. + 40214bb0 07cc823c 02224100 0c13060c 0028413d ...<."A......(A= + 40214bc0 07ac923d 0522c110 49715981 69917951 ...=."..IqY.i.yQ + 40214bd0 8961c5f2 ff886178 512a2822 02007a31 .a....axQ*("..z1 + 40214be0 2243001b 77689158 81487186 f3ff1c12 "C..wh.X.Hq..... + 40214bf0 3066c027 8d318cae 602f3160 22c0202f 0f.'.1..`/1`". / + 40214c00 052066c0 2d0c2c07 2056c05a 5ca6150b . f.-.,. V.Z\... + 40214c10 273f0272 42001b22 06fbff00 0c056056 '?.rB.."......`V + 40214c20 b30b665a cc5066c0 8c8ec73f 04e24c00 ..fZ.Pf....?..L. + 40214c30 0b661bcc 2d0c47ed 1f2056c0 505c80a6 .f..-.G.. V.P\.. + 40214c40 150a273f 02424200 1b22c6fa ff0c0460 ..'?.BB..".....` + 40214c50 46b30b66 4acc4066 c02d034d 0c0b2226 F..fJ.@f.-.M.."& + 40214c60 020f473f 072a5152 05005244 001b4486 ..G?.*QR..RD..D. + 40214c70 faff3a2c 3d022c05 3046c04a 42a6140b ..:,=.,.0F.JB... + 40214c80 373f0252 43001b33 06fbff00 0c030221 7?.RC..3.......! + 40214c90 136063a3 6a22c221 12d22111 e22110f8 .`c.j".!..!..!.. + 40214ca0 f112c150 0df00000 5d020c96 0c024805 ...P....].....H. + 40214cb0 32040032 c3d03030 74373612 1b343905 2..2..00t76..49. + 40214cc0 2032a022 04002033 9022c3d0 86f7ff0d 2.".. 3."...... + 40214cd0 f0000000 70d8ff3f 12c1b00b 33e26110 ....p..?....3.a. + 40214ce0 f9f10261 13c26112 d2611129 61490159 ...a..a..a.)aI.Y + 40214cf0 11692179 31594169 513af2ed 0727bf01 .i!y1YAiQ:...'.. + 40214d00 7cffd861 28012202 0016722e 2c533792 |..a(."...r.,S7. + 40214d10 120c0c2c da2cbb3c 072c040c 850c461c ...,.,.<.,....F. + 40214d20 09460400 d7bf0246 8600c684 00b79217 .F.....F........ + 40214d30 60cc20c0 c0743801 1b232901 220301a7 `. ..t8..#)."... + 40214d40 92ea90cc 2086faff 66c20550 cc2046f8 .... ...f..P. F. + 40214d50 ff2c3887 920540cc 2086f5ff 7792080c .,8...@. ...w... + 40214d60 1220cc20 c6f2ff00 42c2d040 40740c95 . . ....B..@@t.. + 40214d70 4735092d 0105f3ff 6d02060d 002ca47c G5.-....m....,.| + 40214d80 f647922d 2b333901 4b2e1c83 27a30ce7 .G.-+39.K...'... + 40214d90 23012c42 ed023841 06010000 3851ed02 #.,B..8A....8Q.. + 40214da0 2a2322c2 fc6802d6 76001c02 60606020 *#"..h..v...``` + 40214db0 cc202801 7cb43202 0052a068 40431057 . (.|.2..R.h@C.W + 40214dc0 94061b22 29014600 000c0328 0142a069 ...").F....(.B.i + 40214dd0 22020047 9202865e 00273427 5c844792 "..G...^.'4'\.G. + 40214de0 02065900 27340a2c 53379202 06530086 ..Y.'4.,S7...S.. + 40214df0 5a0042a0 63471241 42a06447 92028654 Z.B.cG.AB.dG...T + 40214e00 00065600 42a07347 9202c61f 00273414 ..V.B.sG.....'4. + 40214e10 42a06f47 9202c65a 0032a070 37920246 B.oG...Z.2.p7..F + 40214e20 3c00c64d 0042a075 47920246 540042a0 <..M.B.uG..FT.B. + 40214e30 78471202 464900c6 44002c02 47ec100b xG..FI..D.,.G... + 40214e40 66a6160b d73f0222 4d001bdd c6fbff00 f....?."M....... + 40214e50 4b2e1c83 27a30ce7 23012c42 ed023841 K...'...#.,B..8A + 40214e60 06010000 3851ed02 2a2322c2 fc220200 ....8Q..*#"..".. + 40214e70 d73f0222 4d001b2d 2c030b66 e6160246 .?."M..-,..f...F + 40214e80 5900273f 02324200 1b2206fb ff4b2e1c Y.'?.2B.."...K.. + 40214e90 8327a30b e723012c 42ed0238 41c60000 .'...#.,B..8A... + 40214ea0 3851ed02 2a2322c2 fc380221 8aff6981 8Q..*#"..8.!..i. + 40214eb0 3032832d 03397101 3ebdc000 004d0238 02.-.9q.>....M.8 + 40214ec0 7168812c 0547ec11 0b661b26 27a40ad7 qh.,.G...f.&'... + 40214ed0 3f02524d 001bdd46 fbff2d0d d052c047 ?.RM...F..-..R.G + 40214ee0 a50f273f 05520300 5242001b 221b3346 ..'?.R..RB..".3F + 40214ef0 faff0c02 4024b32a dd2d0d2c 052036c0 ....@$.*.-.,. 6. + 40214f00 3a3d3724 02c63700 273f0252 42001b22 :=7$..7.'?.RB.." + 40214f10 46faff00 6606060c 1220cc20 0c864b9e F...f.... . ..K. + 40214f20 1c832851 97a306e7 23012c49 28419a22 ..(Q....#.,I(A." + 40214f30 22c2fc7d 0c1c0548 02862700 d73f042c "..}...H..'..?., + 40214f40 52224d00 1b2d8627 004c0220 cc201c05 R"M..-.'.L. . .. + 40214f50 c60c0000 0c2220cc 20c60800 00d73f04 ....." . .....?. + 40214f60 2c52224d 0038011b 2d420300 8c94273f ,R"M.8..-B....'? + 40214f70 02424d01 2b2d861b 000b3339 01c61900 .BM.+-....39.... + 40214f80 0ca54600 000c8542 a06c4b9e 1c824793 ..F....B.lK...G. + 40214f90 0a385197 a23be722 36460c00 72a0681c .8Q..;."6F..r.h. + 40214fa0 84779321 385197a2 06e72401 2c493841 .w.!8Q....$.,I8A + 40214fb0 9a3332c3 fc280320 40f4176c 1b004211 .32..(. @..l..B. + 40214fc0 40403186 04003851 97a206e7 24012c49 @@1...8Q....$.,I + 40214fd0 38419a33 32c3fc48 037d0c3d 0f2d0d99 8A.32..H.}.=.-.. + 40214fe0 7185b6ff 9871ed09 3801dd02 1b333901 q....q..8....39. + 40214ff0 0644ff00 d73f0522 4d008600 00224f00 .D...?."M...."O. + 40215000 88610221 13802dc0 c22112d2 2111e221 .a.!..-..!..!..! + 40215010 10f8f112 c1500df0 8d0512c1 e07d065d .....P.......}.] + 40215020 046d084d 037cf309 71c5caff 087112c1 .m.M.|..q....q.. + 40215030 200df000 00002040 f2f42240 58171040 ..... @.."@X..@ + 40215040 92a0a090 11c02261 1c21faff d26125e2 ......"a.!...a%. + 40215050 61240261 27ed03c2 6126f261 23426116 a$.a'...a&.a#Ba. + 40215060 52611762 61187261 19203310 0c0d2793 Ra.ba.ra. 3...'. + 40215070 532d0e01 cfbcc000 003b227c d330c210 S-.......;"|.0.. + 40215080 4c12c732 0a4c1c0c 0dfd0186 07000000 L..2.L.......... + 40215090 01ebffc0 000027bc eb31e7ff 0c0542a1 ......'..1....B. + 402150a0 d32d0c01 18b1c000 00fd020c 1d0b4c3d .-............L= + 402150b0 0e2d0f01 d8afc000 00c0cf80 22a00022 .-..........".." + 402150c0 4c00f0ef 2022a080 2a412221 1c52c150 L... "..*A"!.R.P + 402150d0 0c86e03e 20526112 42611162 611385f3 ...> Ra.Ba.ba... + 402150e0 ffcd0266 1d0d31d4 ff42a1e5 2d0e0106 ...f..1..B..-... + 402150f0 b1c00000 02212792 a0a02d0c d22125c2 .....!'...-..!%. + 40215100 2126e221 24f22123 9a110df0 4d025204 !&.!$.!#....M.R. + 40215110 008c351b 4446fdff 5203001b 33524400 ..5.DF..R...3RD. + 40215120 1b445625 ff0df000 4d025204 008c351b .DV%....M.R...5. + 40215130 4446fdff 0b442734 0a520400 3795f42d DF...D'4.R..7..- + 40215140 040df000 0c020df0 30307442 02008c84 ........00tB.... + 40215150 4713041b 2286fcff 0df00c04 3024930d G...".......0$.. + 40215160 f0000000 0c038cc2 2040044a 33303074 ........ @.J300t + 40215170 202141c6 fbff2d03 0df00000 92a0a090 !A...-......... + 40215180 11c02261 1c21abff d26125e2 6124f261 .."a.!...a%.a$.a + 40215190 23ed0302 6127c261 26526117 62611872 #...a'.a&Ra.ba.r + 402151a0 61192034 10fd040c 0d279354 2d040180 a. 4.....'.T-... + 402151b0 bcc00000 3b227cd3 30c2104c 12c73208 ....;"|.0..L..2. + 402151c0 4c1c0c0d 5d010607 00019cff c0000027 L...]..........' + 402151d0 bced3199 ff0c0542 a2372d0c 01cab0c0 ..1....B.7-..... + 402151e0 00005d02 0c1d0b4c 3d0f2d05 52611d01 ..]....L=.-.Ra.. + 402151f0 89afc000 0052211d 0c02cac5 224c00fd .....R!....."L.. + 40215200 0522a080 2a512221 1c62c150 0cc74d0f ."..*Q"!.b.P..M. + 40215210 3d0e6261 12526111 726113c5 abffcd02 =.ba.Ra.ra...... + 40215220 661d0d31 85ff42a2 492d0f01 b7b0c000 f..1..B.I-...... + 40215230 00022127 92a0a02d 0cd22125 c22126e2 ..!'...-..!%.!&. + 40215240 2124f221 239a110d f0000000 4880fe3f !$.!#.......H..? + 40215250 848dfe3f ec522140 a82c1040 902c1040 ...?.R!@.,.@.,.@ + 40215260 12c1f0c2 6102c1f9 ff026103 220c0007 ....a.....a."... + 40215270 e24201f9 ffc00000 220c000b 22202074 .B......"..." t + 40215280 224c00ec 52c1f2ff 2d0c014c bbc00000 "L..R...-..L.... + 40215290 31f1ff0c 042d0c01 47bcc000 000c154d 1....-..G......M + 402152a0 0532a12c 2d0c0144 bbc00000 0831c821 .2.,-..D.....1.! + 402152b0 12c1100d f001e9ff c0000046 eeff0000 ...........F.... + 402152c0 988dfe3f 4c80fe3f 998dfe3f 5080fe3f ...?L..?...?P..? + 402152d0 9a8dfe3f 302d1040 402e1040 742e1040 ...?0-.@@..@t..@ + 402152e0 2c2e1040 0c2e1040 4cbf0040 12c1d0c9 ,..@...@L..@.... + 402152f0 a1c1f3ff 09b1d991 e981f971 220c0026 ...........q"..& + 40215300 123a9c22 0c036622 02062400 66320286 .:."..f"..$.f2.. + 40215310 2500324c 00461700 01efffc0 000021e9 %.2L.F........!. + 40215320 ff280201 edffc000 0001ecff c0000021 .(.............! + 40215330 e6ff0cf3 32420022 a001224c 00d1e2ff ....2B.".."L.... + 40215340 21e3ff32 0d00f802 22a00101 e5ffc000 !..2...."....... + 40215350 000c0e1c 03220d00 2023c027 2e2601df .....".. #.'.&.. + 40215360 ffc00000 220d000b 22202074 224d00cc ...."..." t"M.. + 40215370 320c2222 4c0008b1 c8a1d891 e881f871 2.""L..........q + 40215380 12c1300d f0ea2f22 02001bee 390101d5 ..0.../"....9... + 40215390 ffc00000 e0e07438 0106eeff 0021ccff ......t8.....!.. + 402153a0 32420022 a003224c 0021c8ff 0c03f802 2B.".."L.!...... + 402153b0 0c1201cb ffc00000 d1c4ff0c 02224d00 ............."M. + 402153c0 0c030cfe 220d0027 be2601c4 ffc00000 ...."..'.&...... + 402153d0 21c0ff31 beffd202 001bddd0 d074d242 !..1.........t.B + 402153e0 00280301 c1ffc000 00d7b289 0c0246e0 .(............F. + 402153f0 ff51b7ff 2a2f4205 004a2222 0200dc33 .Q..*/B..J""...3 + 40215400 9c1201b8 ffc00000 0c03220d 001b2222 .........."..."" + 40215410 4d0086eb ff2c0201 b3ffc000 0032a0ff M....,.......2.. + 40215420 86f9ff00 60522140 5c2d1040 e82c1040 ....`R!@\-.@.,.@ + 40215430 12c1f009 31c92101 fcffc000 000187ff ....1.!......... + 40215440 c0000021 a0ff2802 01f9ffc0 0000c180 ...!..(......... + 40215450 ff2d0c01 dabac000 0031f2ff 2d0c0c04 .-.......1..-... + 40215460 01d5bbc0 00000c15 2d0c4d05 32a1f401 ........-.M.2... + 40215470 d2bac000 000831c8 2112c110 0df00000 ......1.!....... + 40215480 1487fe3f ed86fe3f 42a00621 fdff12c1 ...?...?B..!.... + 40215490 f0403420 02610305 4319cca2 21faff01 .@4 .a..C...!... + 402154a0 ebb2c000 0006ffff 083112c1 100df000 .........1...... + 402154b0 a08afe3f 12c1f009 0101fdff 08008042 ...?...........B + 402154c0 01080040 2831c000 00080112 c1100df0 ...@(1.......... + 402154d0 12c1f009 0101f6ff 08000860 c0000008 ...........`.... + 402154e0 0112c110 0df00000 12c1f0c9 110901cd ................ + 402154f0 0301efff 80320108 00302831 08003d0c .....2...0(1..=. + 40215500 c0000001 ebff0800 2d0c0860 c811c000 ........-..`.... + 40215510 00080112 c1100df0 12c1f009 0101e4ff ................ + 40215520 08008032 01082030 2831c000 00080112 ...2.. 0(1...... + 40215530 c1100df0 12c1f009 0101ddff 08000830 ...............0 + 40215540 c0000008 0112c110 0df00000 12c1f009 ................ + 40215550 0101d7ff 08000840 c0000008 0112c110 .......@........ + 40215560 0df00000 12c1f009 0101d1ff 08000850 ...............P + 40215570 c0000008 0112c110 0df00000 12c1f009 ................ + 40215580 0101cbff 08000860 c0000008 0112c110 .......`........ + 40215590 0df00000 12c1f009 0101c5ff 08000870 ...............p + 402155a0 c0000008 0112c110 0df00000 b88afe3f ...............? + 402155b0 0c2312c1 e0c931d9 41d1fcff 0921080d .#....1.A....!.. + 402155c0 cd020220 2c0c32c0 00000c13 080d2901 ... ,.2.......). + 402155d0 02202c0c 22c00000 0c13c049 04080dc0 . ,."......I.... + 402155e0 5804c066 042911c0 77040c32 e07711d0 X..f.)..w..2.w.. + 402155f0 6611f055 1102202b 50442070 6620c053 f..U.. +PD pf .S + 40215600 04c07404 a05511b0 77117055 20c07504 ..t..U..w.pU .u. + 40215610 c0771170 55206055 20504420 4040f4c0 .w.pU `U PD @@.. + 40215620 00000c32 0c23080d 480152a1 c7504410 ...2.#..H.R..PD. + 40215630 02202bc0 5024d055 11504420 4040f4c0 . +.P$.U.PD @@.. + 40215640 00000c22 0c1352a1 85080d48 11d84150 ..."..R....H..AP + 40215650 4410c05b 3402202b d0551150 4420c05a D..[4. +.U.PD .Z + 40215660 04c831f0 55115044 204040f4 c0000008 ..1.U.PD @@..... + 40215670 2112c120 0df00000 000af23f 00020060 !.. .......?...` + 40215680 00000008 009a0060 12c1e0d9 21e93109 .......`....!.1. + 40215690 01c911f9 414d00f1 f8ffc1f8 ffc02000 ....AM........ . + 402156a0 222ce507 e241c020 00522f9c 176538d1 ",...A. .R/..e8. + 402156b0 bfff080d 02201dc0 00000c52 01f8bec0 ..... .....R.... + 402156c0 0000e2a1 84080d0c 2202202c 0c13c000 ........". ,.... + 402156d0 00e7c2f0 080d0c32 02202c0c 23c00000 .......2. ,.#... + 402156e0 0c633022 106662dc 91e6ff81 e6ffc020 .c0".fb........ + 402156f0 00722842 907720c0 20007268 42c02000 .r(B.w . .rhB. . + 40215700 522ce50c 16605520 c0200052 6ce5c020 R,...`U . .Rl.. + 40215710 00422f9c 0119b317 6411c020 00a22ce8 .B/.....d.. ..,. + 40215720 e7fa08c0 2000b22c e8070bf6 c811d821 .... ..,.......! + 40215730 e831f841 080112c1 200df000 0c1342a0 .1.A.... .....B. + 40215740 8112c1f0 c911d921 d199ff09 01080dcd .......!........ + 40215750 0202202b 0c22c000 000c7208 0d0c1302 .. +."....r..... + 40215760 202bc045 41c00000 c0404408 0d0c0202 +.EA....@D..... + 40215770 202b0c13 c000000c 12080d0c 1302202b +............ + + 40215780 42a07fc0 00000c62 0c1342a0 7f080dc8 B......b..B..... + 40215790 1102202b d821c000 00080112 c1100df0 .. +.!.......... + 402157a0 0000f000 ffff0fff 12c1e029 11392109 ...........).9!. + 402157b0 41493141 fbff017d ff31b0ff c0200022 AI1A...}.1... ." + 402157c0 23f24022 20c02000 08000220 372263f2 #.@" . .... 7"c. + 402157d0 c0000028 21381148 315d0105 6f000173 ...(!8.H1]..o..s + 402157e0 ff080002 20382d01 c0000001 70ff0800 .... 8-.....p... + 402157f0 022036c0 0000c563 0041eaff c0200031 . 6....c.A... .1 + 40215800 9fff2223 f2402210 c0200022 63f20841 .."#.@".. ."c..A + 40215810 12c1200d f0000000 a48afe3f 0c130c54 .. ........?...T + 40215820 0c750c06 12c1e0c9 11d921e9 31f941f1 .u........!.1.A. + 40215830 5fff0901 080fed02 02202522 a062c000 _........ %".b.. + 40215840 000c0cdd 0232aeac 20229030 22b032a0 .....2.. ".0".2. + 40215850 e301f1b0 c0000000 52110cf4 0d045050 ........R.....PP + 40215860 312d0c50 25b3e6b2 010d0232 a0cfd02d 1-.P%......2...- + 40215870 90d022f0 22c21d00 d011d0d0 3101e6b0 ..".".......1... + 40215880 c0000000 42110cf3 0d034040 3140c4b3 ....B.....@@1@.. + 40215890 e6bc010d 0c00c011 c0c031b6 3e080c80 ..........1.>... + 402158a0 a68d017c 800add0c 44080fd0 20344c03 ...|....D... 4L. + 402158b0 d1daff30 22200c03 20507422 4d040220 ...0" .. Pt"M.. + 402158c0 2622a064 c000004c 00b62e08 0c82a68c &".d...L........ + 402158d0 017c822a cc22a064 0c030c74 c0503400 .|.*.".d...t.P4. + 402158e0 5520080f 524d0502 20265050 74c00000 U ..RM.. &PPt... + 402158f0 c811d821 780ff841 7227268c ee22a061 ...!x..Ar'&..".a + 40215900 0c130c54 52a0efc0 07000603 0022a061 ...TR........".a + 40215910 0c130c54 52a0e0c0 0700e831 080112c1 ...TR......1.... + 40215920 200df000 7e8bfe3f 22a06112 c1f00901 ...~..?".a..... + 40215930 011fff0c 1308000c 84022026 1c15c000 .......... &.... + 40215940 0021f8ff 22020045 edff0801 12c1100d .!.."..E........ + 40215950 f0000000 000a0060 00002000 ffff7fff .......`.. ..... + 40215960 12c1f009 0172afdf 21fbffc0 20006222 .....r..!... .b" + 40215970 d4706610 c0200062 62d451f7 ffc02000 .pf.. .bb.Q... . + 40215980 4222d750 4420c020 004262d7 31f4ffc0 B".PD . .Bb.1... + 40215990 20000222 d7300010 c0200002 62d722a0 ..".0... ..b.". + 402159a0 c8013ebe c0000022 a06c0c23 0c0401ff ..>....".l.#.... + 402159b0 fe0c6508 000c6602 20270c07 c0000022 ..e...f. '....." + 402159c0 a06c0c23 0c0401f9 fe0c6508 000c6602 .l.#......e...f. + 402159d0 20270c17 c000002c 04c02000 31deff22 '.....,.. .1.." + 402159e0 23d44022 20c02000 0c240c75 0c0601ef #.@" . ..$.u.... + 402159f0 fe2263d4 080022a0 6c022025 0c23c000 ."c...".l. %.#.. + 40215a00 00080112 c1100df0 00008000 ffffdfff ................ + 40215a10 12c1d0d9 81e99109 61c971f9 a1c117ff ........a.q..... + 40215a20 fd028cf2 0c12c020 00022ce5 200020c0 ....... ..,. . . + 40215a30 2000026c e5d1ddfe 022d0022 a0060220 ..l.....-."... + 40215a40 2c32a001 c000000c 230c940c 250c0608 ,2......#...%... + 40215a50 0ded0202 202522a0 6bc00000 0c230c04 .... %".k....#.. + 40215a60 0c550c56 080d2951 02202522 a06cc000 .U.V..)Q. %".l.. + 40215a70 000c1308 0d29410c 240c6240 4e200220 .....)A.$.b@N . + 40215a80 2b4040f4 c0000022 a06b0c23 0c940c75 +@@....".k.#...u + 40215a90 080d0c76 0220270c 17c00000 22a06b0c ...v. '.....".k. + 40215aa0 230c940c 25080d0c 06022027 0c07c000 #...%..... '.... + 40215ab0 0022a06c 0c230c04 0c55080d 0c560220 .".l.#...U...V. + 40215ac0 270c17c0 00000c20 71d0ff21 a2ffc020 '...... q..!... + 40215ad0 006222d7 706620c0 20006262 d751cbff .b".pf . .bb.Q.. + 40215ae0 c0200042 22d75044 10c02000 4262d7c0 . .B".PD.. .Bb.. + 40215af0 20003222 d4303825 8ca3c020 008222d4 .2".08%... ..". + 40215b00 80882556 38ff7cdb c02000a2 22d4b0aa ..%V8.|.. .."... + 40215b10 10c02000 a262d4c0 20009222 d4009920 .. ..b.. .."... + 40215b20 c0200092 62d41c92 01ddbdc0 00002d01 . ..b.........-. + 40215b30 4580060c 000c0c2d 011b4020 30903213 E......-..@ 0.2. + 40215b40 00400074 cac3c0c0 f46680ec 0c620c13 .@.t.....f...b.. + 40215b50 080d4d0e 02202be8 41c00000 22a06b0c ..M.. +.A...".k. + 40215b60 230c940c 75080d0c 76022027 0c07c000 #...u...v. '.... + 40215b70 00785122 a06b0c23 0c94080d 0c250220 .xQ".k.#.....%. + 40215b80 270c06c0 00007d0e 22a06c0c 230c0408 '.....}.".l.#... + 40215b90 0d0c5502 20270c56 c000009c 2f7ce4c0 ..U. '.V..../|.. + 40215ba0 200031b6 fe2223e5 402210c0 20002263 .1.."#.@".. ."c + 40215bb0 e50861d8 81e89160 2c11f8a1 c87122d2 ..a....`,....q". + 40215bc0 08202cf4 12c1300d f0000000 288bfe3f . ,...0.....(..? + 40215bd0 330d0000 c48afe3f 12c1e0c9 312911d9 3......?....1).. + 40215be0 41d1faff 0921020d 4722a0ff 2790090c A....!..G"..'... + 40215bf0 12c5e1ff cd020606 001c1307 b3102c44 ..............,D + 40215c00 07340bc2 a066c0c0 c1c0c0f4 860000c1 .4...f.......... + 40215c10 f0ff01ef ff0c0207 3c02c60c 000163fe ........<.....c. + 40215c20 08002d0c 08e00c33 c0000001 60fe0c33 ..-....3....`..3 + 40215c30 08002901 08e021e6 ffc00000 3d022801 ..)...!.....=.(. + 40215c40 3022c0f0 22110022 11202031 2b222022 0".."..". 1+" " + 40215c50 210c0038 1151dfff 2a230022 11202031 !..8.Q..*#.". 1 + 40215c60 5a601b70 da404204 14700074 4a424246 Z`.p.@B..p.tJBBF + 40215c70 326660eb d841006c 1102af81 c8310722 2f`..A.l.....1." + 40215c80 010d0200 70740821 7a666265 1512c120 ....pt.!zfbe... + 40215c90 0df00000 12c1e009 113901c9 21d931e9 .........9..!.1. + 40215ca0 41dd02ed 04c141fe 16420c22 a0770c03 A.....A..B.".w.. + 40215cb0 1cc40c05 080c0c06 0220270c 07c00000 ......... '..... + 40215cc0 22a0770c 03080c1c a4022026 2c85c000 ".w....... &,... + 40215cd0 0022a077 0c03080c 1ca40220 263c85c0 .".w....... &<.. + 40215ce0 000022a0 770c0308 0c1ca402 20261c85 ..".w....... &.. + 40215cf0 c0000022 a0770c03 080c1ca4 0220263c ...".w....... &< + 40215d00 85c00000 22a0770c 030c0408 0c580102 ....".w......X.. + 40215d10 2026505c 74c00000 22a0770c 030c1408 &P\t...".w..... + 40215d20 0c580102 20265054 74c00000 22a0770c .X.. &PTt...".w. + 40215d30 03080c0c 44022026 e05074c0 000022a0 ....D. &.Pt...". + 40215d40 770c0308 0c0c3402 2026e058 74c00000 w.....4. &.Xt... + 40215d50 22a0770c 030c2458 01080ce0 6035c066 ".w...$X....`5.f + 40215d60 11022026 50503460 55205050 74c00000 .. &PP4`U PPt... + 40215d70 0cf40c35 0c36d030 040c1208 0c0c0e02 ...5.6.0........ + 40215d80 202730e2 837d0e22 a0770c03 c000007d '0..}.".w.....} + 40215d90 0e22a077 0c031c84 080c0c05 0220270c .".w......... '. + 40215da0 06c00000 22a0770c 031cc40c 050c06e8 ....".w......... + 40215db0 417d0d08 0cc82102 2027d831 c0000008 A}....!. '.1.... + 40215dc0 1112c120 0df00000 22a0620c 130c040c ... ....".b..... + 40215dd0 6512c1f0 c911c1f5 fd090108 0c0c6602 e.............f. + 40215de0 20270c17 c0000022 a0620c13 0c040c55 '.....".b.....U + 40215df0 080c0c56 0220270c 07c00000 22a0620c ...V. '.....".b. + 40215e00 130c040c 55080c0c 56022027 0c17c000 ....U...V. '.... + 40215e10 0022a062 0c130c04 0c650c66 080c0c07 .".b.....e.f.... + 40215e20 022027c8 11c00000 080112c1 100df000 . '............. + 40215e30 60f62240 12c1e009 01d921e9 31c911f9 `."@......!.1... + 40215e40 410c0cf2 a063e2a0 64d1d8fd 1c420113 A....c..d....B.. + 40215e50 bdc00000 22a0620c 130c7408 0d0c7502 ....".b...t...u. + 40215e60 20250c76 c00000dc 22f79c08 21f1ff01 %.v...."...!... + 40215e70 77b0c000 001bccc0 c074e79c cec811d8 w........t...... + 40215e80 21e831f8 41080112 c1200df0 00002042 !.1.A.... .... B + 40215e90 0000c041 0000d041 00008043 00000840 ...A...A...C...@ + 40215ea0 00008044 000000c2 e8e20040 94cb0040 ...D.......@...@ + 40215eb0 5ccd0040 dcc30040 305f1040 80c10040 \..@...@0_.@...@ + 40215ec0 c4c40040 ace20040 68c20040 12c1e0d9 ...@...@h..@.... + 40215ed0 310911c9 21e941cd 05e1ecff 8cd32613 1...!.A.......&. + 40215ee0 08662308 e1ebff86 0000e1ea ffd1eaff .f#............. + 40215ef0 6022112a 24e02211 01ecffc0 000051e7 `".*$.".......Q. + 40215f00 ff0c0401 eaffc000 0001e9ff c0000029 ...............) + 40215f10 0131e3ff 2d0e01e7 ffc00000 3d022801 .1..-.......=.(. + 40215f20 01e6ffc0 000031df ff01e4ff c00000ed ......1......... + 40215f30 0201e3ff c0000022 4c002020 7401e1ff ......."L. t... + 40215f40 c000003d 022d0e01 e0ffc000 003d0d01 ...=.-.......=.. + 40215f50 d9ffc000 00ed0201 daffc000 00224c01 ............."L. + 40215f60 20207401 d8ffc000 003d022d 0e01d6ff t......=.-.... + 40215f70 c000003d 0d01cfff c00000d8 31e84101 ...=........1.A. + 40215f80 d0ffc000 00224c02 0811c821 12c1200d ....."L....!.. . + 40215f90 f0000000 0083fe3f 1c602140 f3602140 .......?.`!@.`!@ + 40215fa0 12c1e0d9 31e94109 11c921f9 51cd02fd ....1.A...!.Q... + 40215fb0 04017efd ed03d1b1 fd31f9fd c0200022 ..~......1... ." + 40215fc0 2df23022 20c02000 08000220 37226df2 -.0" . .... 7"m. + 40215fd0 c000000b 5c0cc457 340d01ee fff0dc11 ....\..W4....... + 40215fe0 0addd21d 7f860000 d1b5af56 7f05f62e ...........V.... + 40215ff0 543cb00b 2e56720d 42afb7b2 af83a2a0 T<...Vr.B....... + 40216000 765ce35c d95cc75c b80ce557 3c028653 v\.\.\.\...W<..S + 40216010 0021e1ff c06c902a 66a00600 06500086 .!...l.*f....P.. + 40216020 47008652 00467d00 c6790006 76000653 G..R.F}..y..v..S + 40216030 00867200 466e0046 6a00c666 00866200 ..r.Fn.Fj..f..b. + 40216040 065f0086 5b002d0d 3d0e4d0f 5d01c5e7 ._..[.-.=.M.]... + 40216050 ff01defe 3200490c e407631b 479c184d ....2.I...c.G..M + 40216060 0f3d0e5d 0122004b d2004a80 02110add .=.].".K..J..... + 40216070 d0d0f42d 0d45e5ff c14dfd08 0ce17ffd ...-.E...M...... + 40216080 0220382d 01c00000 080c0220 36c00000 . 8-....... 6... + 40216090 2201208c 12c5d9ff 2d0d81c2 fd41defd ". .....-....A.. + 402160a0 c0200072 2ef28077 10c02000 0811c821 . .r...w.. ....! + 402160b0 d831726e f2f851e8 41320102 52010162 .1rn..Q.A2..R..b + 402160c0 01006244 08524409 32440a12 c1200df0 ..bD.RD.2D... .. + 402160d0 32a066b2 af9172af bb6c691c 183c043c 2.f...r..li..<.< + 402160e0 1a3c220c e557bc34 51adffc0 6c905a66 .<"..W.4Q...l.Zf + 402160f0 a0060086 0900060f 00c60900 862600c6 .............&.. + 40216100 2600062a 00460800 06110046 11004625 &..*.F.....F..F% + 40216110 00c61000 061d0046 1d008605 004d0282 .......F.....M.. + 40216120 afccbd08 7d080d0b ad043d07 4d0a0241 ....}.....=.M..A + 40216130 01060100 4d023241 010d0342 41000602 ....M.2A...BA... + 40216140 00824100 22afb122 41010241 0206c0ff ..A.".."A..A.... + 40216150 8d03bd08 3d089d0b 4d0a9241 0106f6ff ....=...M..A.... + 40216160 0d0a62a0 625cf772 41006241 0146f6ff ..b.b\.rA.bA.F.. + 40216170 82410002 afdf7c29 924101c6 f2ff7241 .A....|).A....rA + 40216180 0002a06f 7c9aa241 0146efff 7d080d07 ...o|..A.F..}... + 40216190 3d074d02 02410186 e7ff3d07 9d037d03 =.M..A....=...}. + 402161a0 0d09ad04 86e0ff3d 079d0346 eaff7d08 .......=...F..}. + 402161b0 0d0706dd ff324100 22afc46c c086e1ff .....2A."..l.... + 402161c0 324100b2 41014c80 86dfff32 410002af 2A..A.L....2A... + 402161d0 a44c1bb2 410106dc ff0c0002 41013241 .L..A.......A.2A + 402161e0 0046d9ff 0d083d09 22afbe22 410106fb .F....=.".."A... + 402161f0 ff924100 02a07c02 41010d04 86d2ff92 ..A...|.A....... + 40216200 41001c34 c6fbff72 41004241 0102afcb A..4...rA.BA.... + 40216210 86cdff72 4100a241 012c70c6 caff0d0b ...rA..A.,p..... + 40216220 7241003c 43324101 86c7ff00 00feef3f rA..f.( + 40217470 b1606831 27ad33a0 7074cca7 820d0180 .`h1'.3.pt...... + 40217480 88018088 31872622 d8a11b00 a020742a ....1.&"..... t* + 40217490 ff000074 0addf06c c080e601 a20d00e0 ...t...l........ + 402174a0 e83180aa 01a0a831 a7aec009 c11c8aa7 .1.....1........ + 402174b0 2e0d62ce e80cfe80 66016068 31860a00 ..b.....f.`h1... + 402174c0 2d0e0c63 01d5a9c0 00000d02 0c632d0e -..c.........c-. + 402174d0 0010400c 1e00eea1 0beee0e0 f4013bd6 ..@...........;. + 402174e0 c0000008 c1806201 606831c0 a004a656 ......b.`h1....V + 402174f0 040c5686 00006060 f4690128 715881c0 ..V...``.i.(qX.. + 40217500 b1215050 90521500 20bba050 9eb09a96 .!PP.R.. ..P.... + 40217510 076c0b78 0b009911 9a97990b 46000099 .l.x........F... + 40217520 0bb89109 c19cab21 bcff3d0c 6d0e7801 .......!..=.m.x. + 40217530 c00a1100 00409040 9101c4aa c0000008 .....@.@........ + 40217540 c168010c f2279e02 26561e38 611bcc80 .h...'..&V.8a... + 40217550 cc01c0c8 31303cc0 56b3efc8 21d831e8 ....10<.V...!.1. + 40217560 41f85108 1112c140 0df0d1ac ffc24d00 A.Q....@......M. + 40217570 c6f9ff00 12c1f0c9 110901cd 021c7027 ..............p' + 40217580 201d1c12 c72212e6 ac094c00 e66c130c ...."....L..l.. + 40217590 00860300 02a06006 020002a0 70860000 ......`.....p... + 402175a0 02a07821 02f80040 f408020c 1302202b ..x!...@...... + + 402175b0 0c32c000 002d0c0c 630104d6 c000000c .2...-..c....... + 402175c0 23c8110c 65d04211 01f9f70c 32080050 #...e.B.....2..P + 402175d0 44200220 2b4040f4 c0000008 0112c110 D . +@@......... + 402175e0 0df00000 00000300 a00f0000 fffffcff ................ + 402175f0 009e0060 9d0512c1 a009b129 81397149 ...`.......).9qI + 40217600 61f9f1d9 d1e9e1c9 c1ed07c2 a1e0dd06 a............... + 40217610 61e7f7f1 1cf84206 08926111 cc848803 a.....B...a..... + 40217620 39718080 05562824 41efff31 14f8c020 9q...V($A..1... + 40217630 002223f2 402220c0 20002263 f2c02000 ."#.@" . ."c.. . + 40217640 01dbf708 00022028 c26f1ac0 000022a0 ...... (.o....". + 40217650 770c0301 d6f71c24 08000c75 0220250c w......$...u. %. + 40217660 06c00000 0c031c84 0c5501d0 f70c5608 .........U....V. + 40217670 00299102 202522a0 77c00000 0c031c84 .).. %".w....... + 40217680 0c550c56 01caf70c 07080029 a1022027 .U.V.......).. ' + 40217690 22a077c0 000022a0 770c031c 2401c3f7 ".w...".w...$... + 402176a0 0c750800 0c060220 270c07c0 00004861 .u..... '.....Ha + 402176b0 16ed111c 750c0a0c 17b2adec 0c0c2201 ....u.........". + 402176c0 68226110 c06141e0 66a06806 076c0560 h"a..aA.f.h..l.` + 402176d0 60e58600 006060e4 60280460 84046033 `....``.`(.`..`3 + 402176e0 04609604 8a336085 049a8860 99049a22 .`...3`....`..." + 402176f0 6097049a 221cd98a 223a220c 480d0820 `..."...":".H.. + 40217700 20746080 24f65201 0d020030 740d0930 t`.$.R....0t..0 + 40217710 33908033 903030f4 3739010d 030000f4 3..3.00.79...... + 40217720 000040a0 809107e8 7c4030b0 b0338007 ..@.....|@0..3.. + 40217730 b5020624 00026114 326112a2 611307e0 ...$..a.2a..a... + 40217740 786020b4 85e6fd21 a8ff32c1 100197f7 x` ....!..2..... + 40217750 42a00a02 20005221 1002203b 0c06c000 B... .R!.. ;.... + 40217760 00022114 a22113b2 adec4861 1c750c17 ..!..!....Ha.u.. + 40217770 62910922 91088291 0b32910a 80808430 b..".....2.....0 + 40217780 30842020 84606084 70661170 22113022 0. .``.pf.p".0" + 40217790 20322112 80662022 63856263 86001040 2!..f "c.bc...@ + 402177a0 0087a180 aa201bcc c0c074c0 9dc0c061 ..... ....t....a + 402177b0 41e066a0 5629f1c6 05006223 84222383 A.f.V)....b#."#. + 402177c0 226385c6 f4ff6223 79626385 62237ac6 "c....b#ybc.b#z. + 402177d0 f1ff7871 78078881 07f7189c 580c020c ..xqx.......X... + 402177e0 83422111 58616201 60720164 92016899 .B!.Xab.`r.d..h. + 402177f0 01c586ff 517effc0 200041a0 f73224f2 ....Q~.. .A..2$. + 40217800 503310c0 20000c55 0c560c12 78a13264 P3.. ..U.V..x.2d + 40217810 f20166f7 0c031c84 08007072 93022027 ..f.......pr.. ' + 40217820 22a077c0 00007891 22a0770c 03015ff7 ".w...x.".w..._. + 40217830 1c240800 0c750220 270c06c0 0000015b .$...u. '......[ + 40217840 f7080002 2032c000 000158f7 08000220 .... 2....X.... + 40217850 31c00000 0156f708 0002202f c0000038 1....V.... /...8 + 40217860 714170b3 28034022 20290316 5d0da160 qAp.(.@" )..]..` + 40217870 ff08610c 0cc06141 e066a068 06076c05 ..a...aA.f.h..l. + 40217880 6060e586 00006060 e41cdb60 48046074 ``....``...`H.`t + 40217890 04605304 6086047a 55607504 8a776089 .`S.`..zU`u..w`. + 402178a0 048a4460 87048a44 7a445a44 0c472d07 ..D`...DzDZD.G-. + 402178b0 60502440 4074f654 012d0420 30742d0b `P$@@t.T.-. 0t-. + 402178c0 30439050 44904040 f4473b01 2d0420b0 0C.PD.@@.G;.-. . + 402178d0 f400bbb0 b2dbfeb2 cbec422b 86b22b85 ..........B+..+. + 402178e0 40808440 4984b070 84b05984 c0200080 @..@I..p..Y.. .. + 402178f0 5511f096 015a991c e5526f1a b0b174ba U....Z...Ro...t. + 40217900 99a05ca0 c0200010 7701a044 017a4472 ..\.. ..w..D.zDr + 40217910 21119905 70739072 17003088 117070a4 !...ps.r..0..pp. + 40217920 8077a07a 44c02000 72a1e072 6f1ac020 .w.zD. .r..ro.. + 40217930 0049051b ccc0c074 c07dc0c0 6141e066 .I.....t.}..aA.f + 40217940 a05667f3 c8c1d8d1 e8e1f8f1 08b112c1 .Vg............. + 40217950 600df000 12c1e009 112901d9 31e941c9 `........)..1.A. + 40217960 21ed05c1 48f7d144 f7c02000 022c5849 !...H..D.. ..,XI + 40217970 5117600e c0200022 2d804022 c027bee8 Q.`.. ."-.@".'.. + 40217980 c60a002d 030145b6 c0000001 08f70800 ...-..E......... + 40217990 02201928 01c00000 0851c020 00222c58 . .(.....Q. .",X + 402179a0 17621ac0 2000322d 800033c0 37beea0c .b.. .2-..3.7... + 402179b0 12c821d8 31e84108 1112c120 0df00c02 ..!.1.A.... .... + 402179c0 46fbff00 910efb31 2ff7c020 00822342 F......1/.. ..#B + 402179d0 908810c0 20008263 420c17c0 20006223 .... ..cB... .b# + 402179e0 58706620 c0200062 63587ce5 c0200042 Xpf . .bcX|.. .B + 402179f0 23585044 10c02000 426358c0 200029b3 #XPD.. .BcX. .). + 40217a00 0df00000 fffff7ff 411ff7c0 2000711c ........A... .q. + 40217a10 f728b4c0 20006224 42706620 c0200062 .(.. .b$Bpf . .b + 40217a20 644251f8 ffc02000 38b45033 10c02000 dBQ... .8.P3.. . + 40217a30 39b40df0 12c1f002 610001dc f6022000 9.......a..... . + 40217a40 02201132 a080c000 0085a2fe 22a00008 . .2........"... + 40217a50 0112c110 0df00000 4084fe3f 2c80fe3f ........@..?,..? + 40217a60 12c1d0d2 6108e261 09c971c1 d0f60961 ....a..a..q....a + 40217a70 083cf9a1 00220556 b212080c 022028c0 .<...".V..... (. + 40217a80 0000080c 0220300c 12c00000 d164fe22 ..... 0......d." + 40217a90 1d012020 b445cafd 221d0132 c1100c14 .. .E.."..2.... + 40217aa0 05600308 0c08600c 02c00000 0c0d0c3e .`....`........> + 40217ab0 81b7fa89 51f2c8e0 f63d0a01 e7ff0a0d ....Q....=...... + 40217ac0 02000046 00000ce0 f06f2072 a064529c ...F.....o r.dR. + 40217ad0 60320c70 42a00180 20012028 3149010c `2.pB... . (1I.. + 40217ae0 040576fe fcad4c02 42a1380c 0371dbff ..v...L.B.8..q.. + 40217af0 3cc63c05 52411262 47001cf5 3cc672c1 <.<.RA.bG...<.r. + 40217b00 13391149 0132c112 0c14c5d0 04020113 .9.I.2.......... + 40217b10 81d3ff80 00010008 3102c01f 024800c6 ........1....H.. + 40217b20 020001ce ff020000 80000100 083122a0 .............1". + 40217b30 4042a002 52a00000 3074d06d 90785169 @B..R...0t.m.xQi + 40217b40 b17a66c5 b1040bee 08b11bdd fa008200 .zf............. + 40217b50 20d0d074 dc782200 21320022 ccf2ccd3 ..t.x".!2.".... + 40217b60 0c340c75 0cf66240 20524021 42402256 .4.u..b@ R@!B@"V + 40217b70 5ef40c0d fa0d1bdd e20026e2 4029d0d0 ^.........&.@).. + 40217b80 74663def 080c0220 32c00000 080c0220 tf=.... 2...... + 40217b90 31c00000 080c0220 2fd15ec2 c0000008 1...... /.^..... + 40217ba0 3cd00020 093cd881 e891f8a1 b7f00b21 <.. .<.........! + 40217bb0 77fa320c 3c0176fa c00000c8 71086112 w.2.<.v.....q.a. + 40217bc0 c1300df0 1c874727 017d040c 044a621b .0....G'.}...Jb. + 40217bd0 844a5352 05008040 747055c0 52460066 .JSR...@tpU.RF.f + 40217be0 64ea0df0 f68afe3f d083fe3f 00000020 d......?...?... + 40217bf0 72a06442 a00112c1 c0c2610a 0991f9d1 r.dB......a..... + 40217c00 e9c1d9b1 ed03dd02 f169f680 22012028 .........i..". ( + 40217c10 31cb6f52 9f60320f 7049010c 044562fe 1.oR.`2.pI...Eb. + 40217c20 215bfa3d 0d015afa c0000052 0fc2cc45 ![.=..Z....R...E + 40217c30 666d0285 6803f1eb ff661e2f 0c0c0c06 fm..h....f./.... + 40217c40 6981f02f 2032c110 857f0302 2108c0c2 i../ 2......!... + 40217c50 8000cc11 c0c031cc 42220110 56f20f1b ......1.B"..V... + 40217c60 00000074 09816620 d8463d00 0c0c3d0f ...t..f .F=...=. + 40217c70 22c1184d 0cc5f4ff 0b3df14c f60ca2cb "..M.....=.L.... + 40217c80 0f37320a 21d9ff2a 2d22027f 4600000c .72.!..*-"..F... + 40217c90 3200d290 c25d0666 1e2c4178 f672afff 2....].f.,Ax.r.. + 40217ca0 d06211c0 50740016 4062a0ff 0055a100 .b..Pt..@b...U.. + 40217cb0 66a17066 30c02000 3224ff60 33105033 f.pf0. .2$.`3.P3 + 40217cc0 20c02000 3264ff32 c11842a0 0652a01f . .2d.2..B..R.. + 40217cd0 e1c1f782 a13820c2 907160ff 4c026207 .....8 ..q`.L.b. + 40217ce0 00f0cc11 80660160 683162c6 fa624700 .....f.`h1b..bG. + 40217cf0 89018066 010c0779 11606831 72ce387a ...f...y.`h1r.8z + 40217d00 7c45b104 520f3f02 0f3eea2c 32023842 |E..R.?..>.,2.8B + 40217d10 023d2202 39804401 80330150 00c04b00 .=".9.D..3.P..K. + 40217d20 30383151 4eff4048 31802201 42c42542 081QN.@H1.".B.%B + 40217d30 45002028 313022c0 27a00941 acff383f E. (10".'..A..8? + 40217d40 40332039 3fc8a1e8 c1089152 9d06d8b1 @3 9?......R.... + 40217d50 a655040c 16624fc3 f8d112c1 400df066 .U...bO.....@..f + 40217d60 20121b0c 2bcc00c0 b3c0c121 00cc11c0 ...+......!.... + 40217d70 c03106be ff0c0cc6 bcff0000 428bfe3f .1..........B..? + 40217d80 12c1c0d9 51e961f9 71c94109 310107f6 ....Q.a.q.A.1... + 40217d90 cd022200 ad39c1cc 42857e02 0104f60c .."..9..B.~..... + 40217da0 0fd18cf7 0c6ec06c a00b4c52 ccfa5981 .....n.l..LR..Y. + 40217db0 49b162c6 c96921f6 7c2d0c53 28b1420d I.b..i!.|-.S(.B. + 40217dc0 3e520d38 59a18044 01805501 50583140 >R.8Y..D..U.PX1@ + 40217dd0 48315044 c0402282 0190a7c0 000058a1 H1PD.@".......X. + 40217de0 01f3f55a 22061800 f6ac2d0c 53288142 ...Z".....-.S(.B + 40217df0 0d44520d 3e599180 44018055 01505831 .DR.>Y..D..U.PX1 + 40217e00 40483150 44c04022 820183a7 c0000058 @H1PD.@".......X + 40217e10 9101e6f5 5a22c60b 00220d4a 0cd68022 ....Z"...".J..." + 40217e20 01202831 c7362142 0d444911 80440140 . (1.6!B.DI..D.@ + 40217e30 48314042 c028211c 63402282 0177a7c0 H1@B.(!.c@"..w.. + 40217e40 00005811 01daf55a 221bdd0b ee78c162 ..X....Z"....x.b + 40217e50 00687a7f 8066011b ff606831 2a666247 .hz..f...`h1*fbG + 40217e60 00562ef5 8200a992 00c42618 2b261928 .V........&.+&.( + 40217e70 0c05d2af 8021c1ff 32a00542 210cc221 .....!..2..B!..! + 40217e80 04e861f8 716d0dd2 403d5240 5ed85145 ..a.qm..@=R@^.QE + 40217e90 7a030831 12c1400d f0a200a0 e200a4dc z..1..@......... + 40217ea0 5ab63c02 86470021 4bf72202 3a0c1580 Z.<..G.!K.".:... + 40217eb0 d201d0d8 3106efff c73e61f1 46f7d200 ....1....>a.F... + 40217ec0 a2faddd2 0d38f200 a580dd01 d0d83166 .....8........1f + 40217ed0 1f45c1b6 f50c5322 0c4ac20c 44802201 .E....S".J..D.". + 40217ee0 20283180 cc01c0c8 31c022c0 202e8201 (1.....1.". ... + 40217ef0 4aa7c000 002a3c80 330128b1 303831d0 J....*<.3.(.081. + 40217f00 33c03022 823d0e01 44a7c000 0001a7f5 3.0".=..D....... + 40217f10 2add80dd 01d0d831 0c15c6d5 ff2200a3 *......1.....".. + 40217f20 0cff20ff c0f72c4a f12bf7d2 00a1fadd .. ...,J.+...... + 40217f30 d20d4a32 00a580dd 01d0d831 6613d8f2 ..J2.......1f... + 40217f40 005080ff 01f0f831 f6ac2f21 98f50c83 .P.....1../!.... + 40217f50 22024ae0 33c08022 01202831 2901202f ".J.3..". (1). / + 40217f60 c0302282 0c53012c a7c00000 08012a00 .0"..S.,......*. + 40217f70 c60a000c 05d2af80 46beff21 8cf50c33 ........F..!...3 + 40217f80 220256e0 33c08022 01202831 f022c030 ".V.3..". (1.".0 + 40217f90 22822022 a01c6301 20a7c000 002a0f0c ". "..c. ....*.. + 40217fa0 e3802001 202831c0 33c0d022 c0302282 .. . (1.3..".0". + 40217fb0 3d0e0119 a7c00000 017df52a dd80dd01 =........}.*.... + 40217fc0 d0d83146 d4ffb69c 082102f7 22024686 ..1F.....!..".F. + 40217fd0 b6ffd2af 800c0586 a6ff0000 20503412 ............ P4. + 40217fe0 c1d0c931 39114901 d941e951 f9610921 ...19.I..A.Q.a.! + 40217ff0 20f40401 6ef52029 24f0ff90 02103350 ...n. )$.....3P + 40218000 ff9000e4 04005034 e0ee9000 092450ee ......P4.....$P. + 40218010 90f0eec0 e0ee1127 a0080c0f dd020981 .......'........ + 40218020 4601000c 1fdd0029 815881cd 05d7a520 F......).X..... + 40218030 c020748c 9fc50d03 2aee0602 00000000 . t.....*....... + 40218040 050d0320 eec01bcc 80cc01c0 c831d72c ... .........1., + 40218050 de0c0c0c 0d0c0009 8121def6 f811c00c .........!...... + 40218060 90fafcf2 0f002000 9002003d 80ff01f0 ...... ....=.... + 40218070 f8318000 01000831 00ffc080 ff0102c2 .1.....1........ + 40218080 f40800f0 f8310800 2d0fc000 0027ad13 .....1..-....'.. + 40218090 0147f508 002d0f08 00f981c0 000080d2 .G...-.......... + 402180a0 01d0d831 1bcc80cc 01c0c831 664ca90c ...1.......1fL.. + 402180b0 0cf8810c 0dd971fa ee0c0d21 c6f6013b ......q....!...; + 402180c0 f5f80108 00f0fc90 202c9022 9206f29f ........ ,.".... + 402180d0 00080020 ffc080ff 01f0f831 2d0fc000 ... .......1-... + 402180e0 0027ad13 0132f508 002d0f08 00f971c0 .'...2...-....q. + 402180f0 000080d2 01d0d831 1bcc80cc 01c0c831 .......1.......1 + 40218100 664cb708 21c831f1 29f5d871 d24ffbe2 fL..!.1.)..q.O.. + 40218110 4ffad841 e851f861 12c1300d f0000000 O..A.Q.a..0..... + 40218120 6084fe3f 3d0212c1 c0c9a1e9 c1f9d109 `..?=........... + 40218130 91d9b1d1 1ef501b9 fc483d22 1d334044 .........H=".3@D + 40218140 0556940d 5d01cbed 0c0c2981 fd038b31 .V..].....)....1 + 40218150 304c90e0 2c90c00c 90e00090 22920622 0L..,.......".." + 40218160 54000200 3d502c80 024200c2 cc01c0c0 T...=P,..B...... + 40218170 74664cdb 080d0220 28c00000 080d0220 tfL.... (...... + 40218180 300c12c0 000021a5 fc221201 2020b4c5 0.....!..".. .. + 40218190 5afd32c1 1021a1fc 0c142212 0145f002 Z.2..!...."..E.. + 402181a0 080d0860 0c02c000 000c0cf6 3c0a21dc ...`........<.!. + 402181b0 ff2a2c22 02004600 000ce23d 0f05a3ff .*,"..F....=.... + 402181c0 1bccc0c0 74663ce2 0c0cf29d 0ef25d0f ....tf<.......]. + 402181d0 ea0c1bcc f20044f2 404ac0c0 74666cef ......D.@J..tfl. + 402181e0 080d0220 32c881c0 0000080d 022031c0 ... 2........ 1. + 402181f0 0000080d 02202fc0 00003111 ae283d0c ..... /...1..(=. + 40218200 04424d69 424d6842 5d2e424d 6a302220 .BMiBMhB].BMj0" + 40218210 293d3d01 2d0c8b41 05dcff86 060032c1 )==.-..A......2. + 40218220 1042a000 00502022 550185e7 02217bfc .B...P "U....!{. + 40218230 32c11022 120105dd 02c8a1e8 c1383df8 2..".........8=. + 40218240 d1b7f308 220d3c32 c11845b3 ffd8b108 ....".<2..E..... + 40218250 9112c140 0df00000 210bf5c0 20002222 ...@....!... ."" + 40218260 592024b5 1b222021 4122d2f8 00221120 Y $.." !A"...". + 40218270 20310df0 12c1f009 0101ccf4 080008a0 1.............. + 40218280 c0000052 aeac02ae 78072201 0d022d05 ...R....x."...-. + 40218290 0725012d 00080100 22112020 3112c110 .%.-....". 1... + 402182a0 0df00000 fd7ffdff 7cda41f6 f4c02000 ........|.A... . + 402182b0 922458a0 9910c020 00926458 1ba22b82 .$X.... ..dX..+. + 402182c0 a08ab380 812192ae 0082d802 808084c0 .....!.......... + 402182d0 20007224 59907710 807720c0 20007264 .r$Y.w..w . .rd + 402182e0 5961f0ff 0c25c020 00322458 60331050 Ya...%. .2$X`3.P + 402182f0 3320c020 00326458 0df00000 00f0ffff 3 . .2dX........ + 40218300 02800200 71e0f4c0 20003227 5882a1a0 ....q... .2'X... + 40218310 17e32f20 9024a1f9 ff709911 c0200062 ../ .$...p... .b + 40218320 2759a066 10906620 806620c0 20006267 'Y.f..f .f . .bg + 40218330 5951f3ff c0200042 27585044 20c02000 YQ... .B'XPD . . + 40218340 4267580d f0000000 01f0ffff 31ffff21 BgX.........1..! + 40218350 b8f7c020 00222289 2020b43a 22202141 ... ."". .:" !A + 40218360 00221120 20310df0 fff1ffff c08bfe3f .". 1.........? + 40218370 188bfe3f 61fdff42 a20012c1 f00901c9 ...?a..B........ + 40218380 11d92151 c0f4dd02 c189f4c0 20002225 ..!Q........ ."% + 40218390 59602210 402220c0 20002265 590c52c0 Y`".@" . ."eY.R. + 402183a0 20000225 58000f41 20001026 500c080c ..%X..A ..&P... + 402183b0 0220192d 0dc00000 86050001 ecff2210 . .-..........". + 402183c0 00c02000 42255817 641df692 1f1b2222 .. .B%X.d....."" + 402183d0 5000d821 422c1b21 e6ffc811 9b32c5b6 P..!B,.!.....2.. + 402183e0 fe080112 c1100df0 3931b692 0522aeb0 ........91...".. + 402183f0 c6020008 0c08a0c0 00003831 01dcff42 ..........81...B + 40218400 ae6c27a4 6c521000 72aeacf6 951462ae .l'.lR..r.....b. + 40218410 78672201 6d022d07 6727012d 06002211 xg".m.-.g'.-..". + 40218420 20203162 9c3227a6 64604690 4a2242c2 1b.2'.d`F.J"B. + 40218430 fe1b2240 24b32022 21006211 60603162 .."@$. "!.b.``1b + 40218440 5c32720c c522ae7c 16170567 a2352a46 \2r..".|...g.5*F + 40218450 1b244024 b3202121 00221120 2031225c .$@$. !!.". 1"\ + 40218460 1d060900 0c058c83 8c65080c 022016c0 .........e... .. + 40218470 0000080c 0220192d 0dc00000 01bcff0c ..... .-........ + 40218480 0286d2ff 2d06625c 1d0c15c6 f5ff67a2 ....-.b\......g. + 40218490 b042c6f0 47a21b22 c6f4c6e6 ff229c1d .B..G..".....".. + 402184a0 8b526725 0572c2f8 77a6b82d 06625c1d .Rg%.r..w..-.b\. + 402184b0 46f5ff20 22902a26 42c2fe1b 224024b3 F.. ".*&B..."@$. + 402184c0 20222186 dcff0000 b88bfe3f ffffffbf "!........?.... + 402184d0 8d0212c1 c00951d9 71e981f9 91c961f2 ......Q.q.....a. + 402184e0 ac00c2a0 c9ed03d1 31f43d04 42211098 ........1.=.B!.. + 402184f0 0d080492 29160005 0556c018 22ae7c69 ....)....V..".|i + 40218500 11490189 d139c159 b1c00900 92ae7cc0 .I...9.Y......|. + 40218510 2000a15c f438daf0 3310c033 20c02000 ..\.8..3..3 . . + 40218520 39dac020 0008da7c e2200010 c0200009 9.. ...|. ... .. + 40218530 dac02000 82aeac01 e4ffa22a 580c0bb9 .. ........*X... + 40218540 a1925d1d 48a11b54 00649082 56005040 ..].H..T.d..V.P@ + 40218550 7449a166 44edc020 00914af4 38b93921 tI.fD.. ..J.8.9! + 40218560 c0200022 29c82931 c02000f2 29d0f941 . .").)1. ..)..A + 40218570 c02000b8 b97cecc0 bb10c020 00b9b9a1 . ...|..... .... + 40218580 d3ffc020 008229c8 a08810c0 20008269 ... ..)..... ..i + 40218590 c8c139f4 0c0779a1 c02000f2 2c804221 ..9...y.. ..,.B! + 402185a0 0a22a00e 4034a042 c4fd32c3 01402393 ."..@4.B..2..@#. + 402185b0 80220120 2831c5eb fdc02000 0132f4d8 .". (1.... ..2.. + 402185c0 a1422058 acde01c0 ff0c0c00 dd904d0f .B X..........M. + 402185d0 28d138c1 58b1c537 ffdc2285 c9ff329d (.8.X..7.."...2. + 402185e0 001bcc37 a202225d 00c0c074 c79ede01 ...7.."]...t.... + 402185f0 25f4c121 f4c02000 28d07ce3 302210c0 %..!.. .(.|.0".. + 40218600 2000d8a1 29d01bfd f0d074d9 a1664d87 ...).....t..fM. + 40218610 c0200061 1cf48821 89b6c020 00783172 . .a...!... .x1r + 40218620 66c8c020 00584148 115266d0 bc8401a6 f.. .XAH.Rf..... + 40218630 ff22afd8 0c0999a1 38a148a1 0033901b ."......8.H..3.. + 40218640 54504074 32930049 a137a201 3d020023 TP@t2..I.7..=..# + 40218650 11202031 6644e031 d5f30803 22531d02 . 1fD.1...."S.. + 40218660 2016c000 00060200 51d1f342 ae7c4255 .......Q..B.|BU + 40218670 1d9801a1 b9f48809 71cdf3a0 88208909 ........q.... .. + 40218680 62971d62 5732460b 00229d1d c00900c0 b..bW2F.."...... + 40218690 2000b1fc f308dbf0 0010c000 20c02000 ........... . . + 402186a0 09dbc020 00d8db7c eee0dd10 c02000d9 ... ...|..... .. + 402186b0 dbc02000 b22b58c8 61d871e8 81f89108 .. ..+X.a.q..... + 402186c0 5112c140 0df00000 12c1f0c2 61031031 Q..@........a..1 + 402186d0 2020c220 21b6f309 2122023c 056aff01 . !...!".<.j.. + 402186e0 b3f30c02 5d011b62 5a423204 00602074 ....]..bZB2..` t + 402186f0 ca333244 006662ed 21a1fd0c 534d01c8 .32D.fb.!...SM.. + 40218700 3162003d 52005e80 66016068 3145f202 1b.=R.^.f.`h1E.. + 40218710 082112c1 100df000 10f82240 7d0212c1 .!........"@}... + 40218720 e0390121 fdff0911 c921d931 cd05dd04 .9.!.....!.1.... + 40218730 79410146 a6c00000 0841c020 00280dc7 yA.F.....A. .(.. + 40218740 92f72d00 01d6b2c0 00000801 0c5421cd ..-..........T!. + 40218750 f3c02000 32225830 3f414033 10665313 .. .2"X0?A@3.fS. + 40218760 7cd5c020 00422258 504410c0 20004262 |.. .B"XPD.. .Bb + 40218770 58460100 c0200062 2258718c f3c82178 XF... .b"Xq...!x + 40218780 07d83172 27190020 74c00700 081112c1 ..1r'.. t....... + 40218790 200df000 6484fe3f ff03fcff 41feff12 ...d..?....A... + 402187a0 c1e0e951 d9410921 c9310180 f3cd02dd ...Q.A.!.1...... + 402187b0 030cd232 04023241 02e20072 42140042 ...2..2A...rB..B + 402187c0 510080ee 01e0e831 e67c230c 534d0042 Q......1.|#.SM.B + 402187d0 04710b2c 80440140 48314911 404ec040 .q.,.D.@H1I.@N.@ + 402187e0 2282e811 010da5c0 00002aee 46080032 ".........*.F..2 + 402187f0 00738033 01303831 e033c0c7 a2024642 .s.3.081.3....FB + 40218800 0022ccfa 2023820c 530103a5 c000002a .".. #..S......* + 40218810 ee661d0a 7cadd241 00d24102 c6080032 .f..|..A..A....2 + 40218820 cdfe5693 0b0161f3 32007432 41002200 ..V...a.2.t2A.". + 40218830 75224101 02007602 4102d201 0180dd01 u"A...v.A....... + 40218840 d0d831e6 7c2c3201 000b2c80 33013038 ..1.|,2...,.3.08 + 40218850 31803301 30383130 3dc03022 820c5301 1.3.0810=.0"..S. + 40218860 eea4c000 00020100 80000100 08312a00 .............1*. + 40218870 06080002 01020cd2 80000100 0831d000 .............1.. + 40218880 c0c72275 0c5322cc fa202082 01e3a4c0 .."u.S".. ..... + 40218890 0000da02 a1c1ff0a 9e417af3 90907460 .........Az...t` + 402188a0 9911c020 008224da a0881090 8820c020 ... ..$...... . + 402188b0 008264da 0c17c020 0068d470 6620c020 ..d.... .h.pf . + 402188c0 0069d47c e5c02000 38d45033 10c02000 .i.|.. .8.P3.. . + 402188d0 39d4c831 d841e851 082112c1 200df0a2 9..1.A.Q.!.. ... + 402188e0 cdfd564a f50131f3 32007732 41002200 ..VJ..1.2.w2A.". + 402188f0 78224101 02007906 cfff0c53 22ccfe20 x"A...y....S".. + 40218900 208201c5 a4c00000 86e1ff22 ccfe2023 ..........".. # + 40218910 820c5301 c1a4c000 0086bcff 12c1f009 ..S............. + 40218920 310122f3 08302921 27701221 20f33821 1."..0)!'p.! .8! + 40218930 22c22c30 30740116 f7c00000 2821314e ".,00t......(!1N + 40218940 f3c02000 32239c17 63262020 743d0105 .. .2#..c& t=.. + 40218950 43ff2116 f32202c6 85610021 14f30802 C.!.."...a.!.... + 40218960 02201622 921dc000 001ce201 4cb2c000 . ."........L... + 40218970 00083112 c1100df0 6884fe3f c05d0000 ..1.....h..?.].. + 40218980 00002440 99994940 9a999999 9999e940 ..$@..I@.......@ + 40218990 000000c0 a4e20040 ec5f1040 f0e20040 .......@._.@...@ + 402189a0 f0c80040 b8cc0040 12c1b0e9 d1f9e129 ...@...@.......) + 402189b0 71d9c1c9 b1c1fdf2 09a1020c 70dd03cc q...........p... + 402189c0 302c8e46 04006610 041cae46 020032c0 0,.F..f....F..2. + 402189d0 fe1c822c 8e30e283 2d0d3d0e 01fcd0c0 ...,.0..-.=..... + 402189e0 0000e692 1a2d0d3d 0e018ba4 c0000020 .....-.=....... + 402189f0 0e82d000 c00000a0 f0201129 61460800 ......... .)aF.. + 40218a00 203ec0e6 93172d0d 3d0e0183 a4c00000 >....-.=....... + 40218a10 1b02000e 82d000c0 0000a046 f6ff0c02 ...........F.... + 40218a20 2961320c 7c220c9a 16230839 51f20c7b )a2.|"...#.9Q..{ + 40218a30 8022112a ff165f07 2d037c6e d0ee82d0 .".*.._.-.|n.... + 40218a40 22c13033 a0f03311 29f13261 123d0f01 ".03..3.).2a.=.. + 40218a50 dfd0c000 00022112 48f10722 02065400 ......!.H.."..T. + 40218a60 2d043d0f 016da4c0 00000116 f5c00000 -.=..m.......... + 40218a70 29212d0f 0114f5c0 0000fd02 285101c5 )!-.........(Q.. + 40218a80 ffc00000 3d022d0f 010cf5c0 00003d02 ....=.-.......=. + 40218a90 28210108 f5c00000 f1b8ff38 0f0105f5 (!.........8.... + 40218aa0 c0000001 bdffc000 002afe86 01000c0f .........*...... + 40218ab0 7c6ed0ee 82020c97 f2611316 10080941 |n.......a.....A + 40218ac0 220c9bf2 0c968022 112aff16 1f073d0f "......".*....=. + 40218ad0 d020c122 611000d0 a0f0dd11 01bcd0c0 . ."a........... + 40218ae0 00000221 10d72202 8647003d 0f2d0001 ...!.."..G.=.-.. + 40218af0 4aa4c000 0001f3f4 c0000029 31d8412d J..........)1.A- + 40218b00 0f01f0f4 c00000fd 022d0d01 a2ffc000 .........-...... + 40218b10 003d02d8 312d0f01 e8f4c000 003d022d .=..1-.......=.- + 40218b20 0d01e4f4 c0000031 94ff3803 01e2f4c0 .......1..8..... + 40218b30 00000199 ffc00000 f221132a 3e060100 .........!.*>... + 40218b40 f221130c 03326111 080cd21c 4e0800da .!...2a.....N... + 40218b50 ded2dd5e d2cdc02d 0dc00000 0188ff0c ...^...-........ + 40218b60 0342a064 472201dd 03580c22 1c4f5805 .B.dG"...X.".OX. + 40218b70 2aee0aee 2d0ec005 00022111 3871621c *...-.....!.8qb. + 40218b80 3f0b3300 03406060 b1076602 56af1542 ?.3..@``..f.V..B + 40218b90 1c4c0003 404040b1 07640256 d01556fd .L..@@@..d.V..V. + 40218ba0 0b52a064 5722010c 0ec861e0 ce93462c .R.dW"....a...F, + 40218bb0 00206fc0 07260206 4d002d04 3d0f0116 . o..&..M.-.=... + 40218bc0 a4c00000 1b2201bf f4c00000 29012d0f ....."......).-. + 40218bd0 01bdf4c0 00002911 2851016e ffc00000 ......).(Q.n.... + 40218be0 3d02f801 281101b4 f4c00000 3d022d0f =...(.......=.-. + 40218bf0 01b1f4c0 00003160 ff380301 aef4c000 ......1`.8...... + 40218c00 000165ff c0000086 a7ff204f c0d72402 ..e....... O..$. + 40218c10 0638003d 0f2d0001 00a4c000 001b2201 .8.=.-........". + 40218c20 a9f4c000 00dd022d 0f01a6f4 c00000fd .......-........ + 40218c30 02284101 58ffc000 003d022d 0f019ef4 .(A.X....=.-.... + 40218c40 c000003d 022d0d01 9bf4c000 00314aff ...=.-.......1J. + 40218c50 38030198 f4c00000 0150ffc0 000086b5 8........P...... + 40218c60 ffcd0de1 47ff0c0d 2d0c014c ffc00000 ....G...-..L.... + 40218c70 29913981 5144ff41 44ff0149 ffc00000 ).9.QD.AD..I.... + 40218c80 5d0e4d0d 018af4c0 00000146 ffc00000 ].M........F.... + 40218c90 3881513e fffd0241 3cff2891 0141ffc0 8.Q>...A<.(..A.. + 40218ca0 00004d0d 5d0e0181 f4c00000 d161f501 ..M.]........a.. + 40218cb0 3dffc000 007136ff 5111ddf0 60945052 =....q6.Q...`.PR + 40218cc0 10c06601 2d0cc020 00422da8 70441060 ..f.-.. .B-.pD.` + 40218cd0 44205044 20c02000 c8b1e8d1 426da8f8 D PD . .....Bm.. + 40218ce0 e1d8c108 a112c150 0df0cd0f c6dcff0c .......P........ + 40218cf0 0f0670ff f221130c 030692ff cd0046d8 ..p..!........F. + 40218d00 ff000000 12c1f0c9 110901cc 520c0c0c ............R... + 40218d10 00060e00 e6120246 6e0032a0 64b0c211 .......Fn.2.d... + 40218d20 2d0c01bd a3c00000 0d020ca3 2d0c80c0 -...........-... + 40218d30 01c0c831 01b9a3c0 00000ca3 0124d0c0 ...1.........$.. + 40218d40 0000a622 02867000 0c10c6ff ffe61c05 ..."..p......... + 40218d50 004121c6 01000b2c 00124000 40a12134 .A!....,..@.@.!4 + 40218d60 f5c02000 4262b562 cc1e0c05 00164000 .. .Bb.b......@. + 40218d70 30a1c035 b3c02000 3262a7e6 1c050041 0..5.. .2b.....A + 40218d80 21c60100 0b7c0017 400040a1 c020000c !....|..@.@.. .. + 40218d90 064262ec a2cc1e0c 09001a40 0080a1c0 .Bb........@.... + 40218da0 89b3c020 008262a1 26101466 20040c85 ... ..b.&..f ... + 40218db0 86030032 c0fd0cab 5d06305b 83460000 ...2....].0[.F.. + 40218dc0 0c25a6bc 0d6c0440 4c900014 400045a1 .%...l.@L...@.E. + 40218dd0 4600000c 04c02000 4262a37c 0ba61c10 F..... .Bb.|.... + 40218de0 e6bc0d7c e7707c90 00174000 75a1c601 ...|.p|...@.u... + 40218df0 000c0850 7221c078 93c02000 6c1a7262 ...Pr!.x.. .l.rb + 40218e00 a28120f2 c7ab10d6 dc001ce9 909c9000 .. ............. + 40218e10 19400075 a1460000 0c077c19 c0200072 .@.u.F....|.. .r + 40218e20 68c3c7aa 1097ac0d 3cc3303c 90001340 h.......<.0<...@ + 40218e30 0045a146 00000c04 c0200042 68c22610 .E.F..... .Bh.&. + 40218e40 14662004 0c408603 0052c0fd 0c540d06 .f ..@...R...T.. + 40218e50 50048346 00000c10 a6bc0d6c 06606c90 P..F.......l.`l. + 40218e60 00164000 40a14600 000c04c0 20004262 ..@.@.F..... .Bb + 40218e70 efa61c10 e6bc0d7c e7707c90 00174000 .......|.p|...@. + 40218e80 50a1c601 000c0800 5221c058 93c02000 P.......R!.X.. . + 40218e90 5262eec7 ab10d6dc 001cebb0 bc90001b Rb.............. + 40218ea0 400050a1 4600000c 05c02000 5262ebc7 @.P.F..... .Rb.. + 40218eb0 aa1097ac 0d3cc330 3c900013 400000a1 .....<.0<...@... + 40218ec0 4600000c 00c02000 c8110262 ea080112 F..... ....b.... + 40218ed0 c1100df0 d652e732 a064b0c2 112d0c01 .....R.2.d...-.. + 40218ee0 4ea3c000 000d020c a32d0c0b c080cc01 N........-...... + 40218ef0 c0c83101 49a3c000 000ca301 b4cfc000 ..1.I........... + 40218f00 007c8337 a2110c10 4690ff0c 30e68202 .|.7....F...0... + 40218f10 468eff0c 20068dff 0c307ce4 47a20286 F... ....0|.G... + 40218f20 8aff0c20 4689ff00 12c1f009 0101d3f1 ... F........... + 40218f30 dc221c04 c0200032 20e44033 20c02000 ."... .2 .@3 . . + 40218f40 3260e406 04006cf6 c0200052 20e46055 2`....l.. .R .`U + 40218f50 10c02000 5260e441 95f18032 0122043c .. .R`.A...2.".< + 40218f60 30383180 22012028 310583ff 080112c1 081.". (1....... + 40218f70 100df000 12c1f0c2 61010261 0020c220 ........a..a. . + 40218f80 8589fc2d 0cc81105 faff0801 12c1100d ...-............ + 40218f90 f0000000 efcfffff 00200000 51feff41 ......... ..Q..A + 40218fa0 b9f1c020 00322481 503310c0 20003264 ... .2$.P3.. .2d + 40218fb0 81661212 1c07c020 00622481 706620c0 .f..... .b$.pf . + 40218fc0 20006264 810df066 221391f5 abc02000 .bd...f"..... . + 40218fd0 82248190 8820c020 00826481 0df06632 .$... . ..d...f2 + 40218fe0 11b1edff c02000a2 2481b0aa 20c02000 ..... ..$... . . + 40218ff0 a264810d f0000000 00140000 ffff7f80 .d.............. + 40219000 81bc1409 9841c65a ffffff7f ffff00fc .....A.Z........ + 40219010 00009001 fffffffb 00000018 ffffff80 ................ + 40219020 ff0ff0ff 00200200 a60f0000 0000c0ff ..... .......... + 40219030 54583800 00ff0ff0 e600200b 3ff0ffdf TX8....... .?... + 40219040 400c0020 ffff80ff 00001300 3ff0ffff @.. ........?... + 40219050 800d0000 000000fc 2401fe03 000000b0 ........$....... + 40219060 00000004 ffff0bff 00002400 83008000 ..........$..... + 40219070 fff7ffff 7084fe3f 62af8031 e8f88166 ....p..?b..1...f + 40219080 f521ddff 12c1c009 c1d9e1c9 d1e9f1c1 .!.............. + 40219090 47f1e167 f4d17bf1 c02000b2 2d5820bb G..g..{.. ..-X . + 402190a0 20c02000 b26d58c0 2000a22d 4380aa20 . ..mX. ..-C.. + 402190b0 c02000a2 6d4391d1 ffc02000 722dd090 . ..mC.... .r-.. + 402190c0 77108077 20c02000 726dd051 cdffc020 w..w . .rm.Q... + 402190d0 00526d5b 41ccffc0 2000426d 5a21caff .Rm[A... .BmZ!.. + 402190e0 c02000b2 2d5420bb 10c02000 b26d54c0 . ..-T ... ..mT. + 402190f0 200092a1 90a22dc6 c0200092 6dc671c4 .....-.. ..m.q. + 40219100 ff81c2ff c0200052 2ebb8055 10705520 ..... .R...U.pU + 40219110 c0200052 6ebb41bf ffc02000 222ee240 . .Rn.A... ."..@ + 40219120 2210c020 00226ee2 b20300b2 cbf1c020 ".. ."n........ + 40219130 00a22d52 60aa10b0 aa20c020 00a26d52 ..-R`.... . ..mR + 40219140 81b6ff91 4fdcc020 00722d4a 90771080 ....O.. .r-J.w.. + 40219150 7720c020 00726d4a 51b1ffc0 200048dd w . .rmJQ... .H. + 40219160 504410c0 200049dd 220cbc2c e4076214 PD.. .I."..,..b. + 40219170 c0200032 2d516033 10403320 c0200032 . .2-Q`3.@3 . .2 + 40219180 6d51c604 002c65c0 2000422d 51604410 mQ...,e. .B-Q`D. + 40219190 504420c0 2000426d 5172afc0 1c168136 PD . .BmQr.....6 + 402191a0 f1c02000 522ddc70 55106055 20c02000 .. .R-.pU.`U . . + 402191b0 526ddc41 f7fdc020 00322ea8 403320c0 Rm.A... .2..@3 . + 402191c0 2000326e a82196ff 0197ffc0 2000b22d .2n.!...... ..- + 402191d0 5920bb10 00bb20c0 2000b26d 59a147fc Y .... . ..mY.G. + 402191e0 9192ffc0 2000722d 59a07710 907720c0 .... .r-Y.w..w . + 402191f0 2000726d 59618dff 518effc0 2000422d .rmYa..Q... .B- + 40219200 57604410 504420c0 2000426d 573189ff W`D.PD . .BmW1.. + 40219210 218affc0 2000022d 54300010 200020c0 !... ..-T0.. . . + 40219220 2000026d 54c02000 a2a080b2 2dc6c020 ..mT. .....-.. + 40219230 00a26dc6 0c49c020 00722dc4 907720c0 ..m..I. .r-..w . + 40219240 2000726d c4617dff 517effc0 2000422d .rm.a}.Q~.. .B- + 40219250 dc604410 504420c0 2000426d dc3179ff .`D.PD . .Bm.1y. + 40219260 217affc0 2000022d c9300010 200020c0 !z.. ..-.0.. . . + 40219270 2000026d c9b175ff a176ffc0 2000922d ..m..u..v.. ..- + 40219280 56b09910 a09920c0 2000926d 567171ff V..... . ..mVqq. + 40219290 6172ffc0 2000522d d3705510 605520c0 ar.. .R-.pU.`U . + 402192a0 2000526d d341f3db 316dffc0 2000222d .Rm.A..1m.. ."- + 402192b0 c8402210 302220c0 2000226d c80168ff .@".0" . ."m..h. + 402192c0 c02000b2 2ee200bb 20c02000 b26ee2a1 . ...... . ..n.. + 402192d0 65ff9165 ffc02000 72289ca0 77109077 e..e.. .r(..w..w + 402192e0 20c02000 72689c61 2ea2c020 00522dd1 . .rh.a... .R-. + 402192f0 605510c0 2000526d d1220cc6 85c2ff08 `U.. .Rm."...... + 40219300 0c08300c 02c00000 a2afcf2c 0931dbf0 ..0........,.1.. + 40219310 61c7f301 23ddc020 00822e8e a0881090 a...#.. ........ + 40219320 8820c020 00826e8e c0200051 50ff722d . . ..n.. .QP.r- + 40219330 92c02000 526d920c 64c02000 222d9340 .. .Rm..d. ."-.@ + 40219340 2220c020 00226d93 c0200002 6dc7c020 " . ."m.. ..m.. + 40219350 00b22dc7 00bb20c0 2000b26d c7a144ff ..-... . ..m..D. + 40219360 c0200098 ada09910 c0200099 ad7c980c . ....... ...|.. + 40219370 27c02000 52268980 55107055 20c02000 '. .R&..U.pU . . + 40219380 5266897c e4c02000 2223f040 2210c020 Rf.|.. ."#.@".. + 40219390 00080c02 20282263 f0c00000 d120f80c .... ("c..... .. + 402193a0 12080c0c 1302202b 0cc4c000 00220c08 ...... +.....".. + 402193b0 9cb20c22 080c0c13 02202b42 a184c000 ..."..... +B.... + 402193c0 000c3208 0c0c2302 202b0c64 c0000008 ..2...#. +.d.... + 402193d0 0c02202f c0000022 0c089cf2 22c11031 .. /..."...."..1 + 402193e0 25ff2c04 011abdc0 0000222c 3232a07f %.,.......",22.. + 402193f0 42c11052 2c331c06 0c074502 fe0c120c B..R,3....E..... + 40219400 08620d00 722c3231 f3f142d7 0152c316 .b..r,21..B..R.. + 40219410 1b668901 89118921 60607485 1dfe0c1d .f.....!``t..... + 40219420 780c920c bc722726 07692422 a0770c03 x....r'&.i$".w.. + 40219430 1c2452a0 d8c00700 22a0770c 031c840c .$R.....".w..... + 40219440 15080c0c 16022027 0c17c000 00060300 ...... '........ + 40219450 22a0770c 031c2452 a0e8c007 00c02000 ".w...$R...... . + 40219460 222e98d0 2220c020 00c8d122 6e98d8e1 "..." . ..."n... + 40219470 0c22e8f1 45b2ff08 c112c140 0df00000 ."..E......@.... + 40219480 12c1f002 610045ee 0522a064 0184afc0 ....a.E..".d.... + 40219490 00000221 0012c110 80000000 ffff1ff0 ...!............ + 402194a0 00008001 ffffff1f ff3fe0ff 00401f00 .........?...@.. + 402194b0 ffff00ff 0000ab00 b1f9ffa1 f9ff316f ..............1o + 402194c0 f0c02000 2223e6b0 2210a022 20c02000 .. ."#..".." . . + 402194d0 2263e6c0 20009223 e7b09910 a09920c0 "c.. ..#...... . + 402194e0 20009263 e781efff 712afdc0 20006223 ..c....q*.. .b# + 402194f0 e5806610 706620c0 20006263 e551eaff ..f.pf . .bc.Q.. + 40219500 41ebffc0 20002223 e6502210 402220c0 A... ."#.P".@" . + 40219510 20002263 e6b1e6ff a1e7ffc0 20009223 ."c........ ..# + 40219520 e8b09910 a09920c0 20009263 e881afeb ...... . ..c.... + 40219530 72a100c0 20006223 f2806610 706620c0 r... .b#..f.pf . + 40219540 20006263 f252af80 4c74c020 002223e6 .bc.R..Lt. ."#. + 40219550 50221040 2220c020 002263e6 0df00000 P".@" . ."c..... + 40219560 00000e01 00000d01 0000de03 0000ed03 ................ + 40219570 12c1f041 0ef00901 02049531 1df46620 ...A.......1..f + 40219580 1762af94 52a069c0 20002223 68602210 .b..R.i. ."#h`". + 40219590 502220c0 20002263 682c0702 049262ae P" . ."ch,....b. + 402195a0 cf261026 26302326 40202650 1d020494 .&.&&0#&@ &P.... + 402195b0 82c0fd56 280cc020 0092238d 60991070 ...V(.. ..#.`..p + 402195c0 9920c020 0092638d 86290051 2cf00c08 . . ..c..).Q,... + 402195d0 0ba0162a 10b2c0fc 16cb0f22 c0fd1682 ...*.......".... + 402195e0 1592c0fb 16291502 ae0f3c05 c0200022 .....)....<.. ." + 402195f0 23820022 10502220 c0200022 6382c020 #..".P" . ."c.. + 40219600 00b22383 00bb1050 bb20c020 00b26383 ..#....P. . ..c. + 40219610 a20493b6 2a26c020 00822385 60881070 ....*&. ..#.`..p + 40219620 8820c020 00826385 c0200052 238d6055 . . ..c.. .R#.`U + 40219630 10705520 c0200052 638d0608 00c02000 .pU . .Rc..... . + 40219640 a2238560 aa1050aa 20c02000 a26385c0 .#.`..P. . ..c.. + 40219650 20009223 8d609910 c0200092 638d0204 ..#.`... ..c... + 40219660 920bb016 cb0822c0 fd166208 26402126 ......"...b.&@!& + 40219670 501e0801 12c1100d f06620f5 c0200042 P........f .. .B + 40219680 23856044 10704420 c0200042 638506f8 #.`D.pD . .Bc... + 40219690 ff020493 66101e0c 020c130c 140c0501 ....f........... + 402196a0 a6afc000 000c820c 030c840c 0501a2af ................ + 402196b0 c00000c6 eeff5680 fb0c120c 030c140c ......V......... + 402196c0 05019daf c000000c 020c830c 840c0501 ................ + 402196d0 9aafc000 0046e6ff 02049366 30028620 .....F.....f0.. + 402196e0 0026507f b6206a81 9effc020 00826540 .&P.. j.... ..e@ + 402196f0 c6bcff02 04936610 1e0c120c 030c140c ......f......... + 40219700 05018daf c000000c 020c830c 840c0501 ................ + 40219710 8aafc000 0046d6ff 5660f50c 020c130c .....F..V`...... + 40219720 140c0501 85afc000 000c820c 030c840c ................ + 40219730 050181af c00000c6 cdff0204 9326302f .............&0/ + 40219740 26502cb6 20149187 ffc02000 92654006 &P,. ..... ..e@. + 40219750 a5ffc020 00826540 c6a2ffc0 20008265 ... ..e@.... ..e + 40219760 4086a0ff a181ffc0 2000a265 40869dff @....... ..e@... + 40219770 b17fffc0 2000b265 40869aff 803fe00f .... ..e@....?.. + 40219780 ffffcfff 12c1f009 010188ef 2200c456 ............"..V + 40219790 320822a0 6608000c 33022024 0c14c000 2.".f...3. $.... + 402197a0 003182ef 22633421 b5efc020 005222e5 .1.."c4!... .R". + 402197b0 526335c0 20004222 e6426336 c020000c Rc5. .B".Bc6. .. + 402197c0 140c550c 063cc722 22e72263 37080322 ..U..<.""."c7.." + 402197d0 a0660220 270c33c0 00000174 ef21e7ff .f. '.3....t.!.. + 402197e0 c0200071 a6efb227 e720bb20 c02000b2 . .q...'. . . .. + 402197f0 67e7a1a0 dac02000 9227e6a0 9920c020 g..... ..'... . + 40219800 009267e6 81dfffc0 20006227 e5806610 ..g..... .b'..f. + 40219810 c0200062 67e50c13 3240c408 0112c110 . .bg...2@...... + 40219820 0df00000 12c1f009 010160ef 2200c466 ..........`."..f + 40219830 123422a0 660c335d 0008050c 14022026 .4".f.3]...... & + 40219840 5205d0c0 00000159 ef318cef 522035c0 R......Y.1..R 5. + 40219850 20005263 e5422036 c0200042 63e62220 .Rc.B 6. .Bc." + 40219860 37c02000 2263e70c 066240c4 080112c1 7. ."c...b@..... + 40219870 100df000 12c1f009 01661205 45f0ff86 .........f..E... + 40219880 000005fa ff080112 c1100df0 00780000 .............x.. + 40219890 12c1e002 6104c951 2165f2c1 44efc020 ....a..Q!e..D.. + 402198a0 00422297 c0200032 2296c020 00104840 .B".. .2".. ..H@ + 402198b0 0c130c74 5c15080c 22229702 202622a0 ...t\..."".. &". + 402198c0 61c00000 05bfff22 a0770c03 1c040c05 a......".w...... + 402198d0 080c0c06 0220270c 17c00000 05300231 ..... '......0.1 + 402198e0 bdf02d03 4b334566 01483c67 f40e0c02 ..-.K3Ef.H...... + 4021a270 6eff222c 3232a07d 0c14024c e2854e00 n.",22.}...L..N. + 4021a280 0c10cc52 383c0773 010c0002 4c0851fa ...R8<.s....L.Q. + 4021a290 ecc02000 52258048 e159518c 4485b1ff .. .R%.H.YQ.D... + 4021a2a0 06020021 c3fe0163 ffc00000 c0200071 ...!...c..... .q + 4021a2b0 f2ec8851 72278062 0c088077 c0726c39 ...Qr'.b...w.rl9 + 4021a2c0 8c96222c 3232a07d 0c04c549 00820f00 ..",22.}...I.... + 4021a2d0 66181698 3cb7f94c 22010080 22012028 f...<..L"...". ( + 4021a2e0 310519fc 460f0000 000038e1 fc532139 1...F.....8..S!9 + 4021a2f0 ee0c0432 c25345c5 fc4d0222 6c1b211c ...2.SE..M."l.!. + 4021a300 f89b3285 c4fc5811 c0200052 6d984821 ..2...X.. .Rm.H! + 4021a310 c0200042 6d990c02 45b8ff71 b9f0683c . .Bm...E..q..h< + 4021a320 70662069 3c9141ff c0200082 2d9f8080 pf i<.A.. ..-... + 4021a330 f4908820 c0200082 6d9fdc0e 98d19090 ... . ..m....... + 4021a340 748c9928 6122d201 22c28005 c1ff51cd t..(a"..".....Q. + 4021a350 ec020cab 3133fb66 301a620c aa406611 ....13.f0.b..@f. + 4021a360 c0200042 25593044 10604420 c0200042 . .B%Y0D.`D . .B + 4021a370 6559020c ab664029 a20caa40 aa11c020 eY...f@)...@... + 4021a380 00922559 309910a0 9920c020 00926559 ..%Y0.... . ..eY + 4021a390 8161b8c0 20007225 da807720 c0200072 .a.. .r%..w . .r + 4021a3a0 65dab20c ac662b0b d12ff0e1 2ff0c020 e....f+../../.. + 4021a3b0 00d26e80 083cb770 070c1201 1fffc000 ..n..<.p........ + 4021a3c0 00c881d8 91220f00 e8a1cc12 857f0028 .....".........( + 4021a3d0 410c1408 71424f00 f8b112c1 400df01b A...qBO.....@... + 4021a3e0 333030f4 467eff48 c11694e7 52ae8061 300.F~.H....R..a + 4021a3f0 5aed693c 525c1dc6 9aff0c1f 1b333030 Z.i.|.-........... + 4021b180 742000c0 024e0080 00010008 31a6101f t ...N......1... + 4021b190 667ce0a6 1019f69d 1602c0f8 2bddd0d0 f|..........+... + 4021b1a0 74024e00 80000100 0831a610 02b69de8 t.N......1...... + 4021b1b0 c0ec1108 01c811fb eee0e074 b0ee11b6 ...........t.... + 4021b1c0 6d04abdd d0d074ea ede25f00 d821e831 m.....t..._..!.1 + 4021b1d0 f84112c1 200df077 62d5b67d 16d2cdfe .A.. ..wb..}.... + 4021b1e0 8b20224e 00d0d074 80020100 08317762 . "N...t.....1wb + 4021b1f0 02f67de8 d680fbb6 2c1d0bcc c0c0742d ..}.....,.....t- + 4021b200 0c05f1ff 320e002a 23224e00 80020100 ....2..*#"N..... + 4021b210 08317762 02661ce1 d640f966 6d91d2cd .1wb.f...@.fm... + 4021b220 fe8b2022 4e00d0d0 74c6e0ff 12c1e029 .. "N...t......) + 4021b230 4109712d 01051001 0c335211 03b21102 A.q-.....3R..... + 4021b240 821101a2 11077211 06921105 62110401 ......r.....b... + 4021b250 d7e80c04 2d040800 9a66aa77 ba8808e0 ....-....f.w.... + 4021b260 8a557077 90606690 7066c070 55d00055 .Upw.`f.pf.pU..U + 4021b270 11006611 60603150 50315025 b36046b3 ..f.``1PP1P%.`F. + 4021b280 00441100 22112020 31404031 4951c000 .D..". 1@@1IQ.. + 4021b290 0001c6e8 0c330800 296108e0 2851c000 .....3..)a..(Q.. + 4021b2a0 00386108 712033c0 284112c1 203a2200 .8a.q 3.(A.. :". + 4021b2b0 22112020 310df000 f00b0000 3cc231fe ". 1.......<.1. + 4021b2c0 ff12c1d0 f9a1c971 0961e991 d9810c0e .......q.a...... + 4021b2d0 d1b7e801 40eac11c fff1e0f1 325c0022 ....@.......2\." + 4021b2e0 4f000200 37024110 0c720c13 080d421c O...7.A..r....B. + 4021b2f0 0002202b 404541c0 00000c02 0c13080d .. +@EA......... + 4021b300 421c0002 202b4040 44c00000 221c0032 B... +@@D..."..2 + 4021b310 c1120c14 c5d8ff4c 0232c110 0c141cf5 .......L.2...... + 4021b320 0c07620f 0082a138 89017911 80660160 ..b....8..y..f.` + 4021b330 683172c1 14054e01 3201142c 40803301 h1r...N.2..,@.3. + 4021b340 30383192 c31f924f 0037202e a6a32b22 081....O.7 ...+" + 4021b350 1c0032c1 120c14e8 91f8a185 d4ffd11d ..2............. + 4021b360 ea221c00 32c11205 caff0861 421c0042 ."..2......aB..B + 4021b370 5d2dc871 d88112c1 300df022 c1141c85 ]-.q....0..".... + 4021b380 3055c052 41143d0c c5d9ff0c 720c1308 0U.RA.=.....r... + 4021b390 0d421c00 02202b40 4541c000 000c020c .B... +@EA...... + 4021b3a0 13080d42 1c000220 2b404044 c000003c ...B... +@@D...< + 4021b3b0 76720114 1bee80ee 01807701 e0e83152 vr........w...1R + 4021b3c0 cefe7078 317066c0 624f0056 95f146df ..px1pf.bO.V..F. + 4021b3d0 ff000000 0c050c06 0c072040 740c0312 .......... @t... + 4021b3e0 c1e0c951 d9610941 e9713921 3911e16f ...Q.a.A.q9!9..o + 4021b3f0 e8390108 0e0c1202 201a4c03 c000000c .9...... .L..... + 4021b400 0d0c0c08 0e08b022 a138c000 001bddca .......".8...... + 4021b410 c200cc11 c0c03166 2de80c12 080ed861 ......1f-......a + 4021b420 02201be8 71c00000 2b3c5b2c 0841c851 . ..q...+<[,.A.Q + 4021b430 3023b312 c1202022 21002211 2020310d 0#... "!.". 1. + 4021b440 f0000000 4cc412c1 c0c981e9 a13951d9 ....L........9Q. + 4021b450 910971f9 b1020200 2961f0f0 1100ff11 ..q.....)a...... + 4021b460 f0f03107 b4090c1d 3c200241 10c60100 ..1.....< .A.... + 4021b470 0c0d22c0 e6224110 4c0232c1 100c141c ..".."A.L.2..... + 4021b480 f582a138 c176f10c 07620c00 79118901 ...8.v...b..y... + 4021b490 72c11180 66016068 31c53701 0c0e02a0 r...f.`h1.7..... + 4021b4a0 6f0c0622 01110c05 59d18022 01202831 o.."....Y..". (1 + 4021b4b0 22c21f80 b201224c 00224111 b0b831c2 "....."L."A...1. + 4021b4c0 cbe680cc 01c0c831 9d002d06 c02cb380 .......1..-..,.. + 4021b4d0 c201c0c8 31b72001 9d0b9241 112d0c45 ....1. ....A.-.E + 4021b4e0 efff3201 1129c180 23012028 3145eeff ..2..)..#. (1E.. + 4021b4f0 02a06f0c 062cc798 c12cb8dc 4e20a9c0 ..o..,...,..N .. + 4021b500 00aa11a0 a031f7a9 12a7a70f cced0c1d .....1.......... + 4021b510 06020020 a9c000aa 11a0a031 8c9da7a8 ... .......1.... + 4021b520 05a72707 f729010c 0da7a702 167d08b8 ..'..).......}.. + 4021b530 d1a72b05 a7a80216 cd07f729 02566d07 ..+........).Vm. + 4021b540 5c0327a3 71420111 80440140 48310714 \.'.qB...D.@H1.. + 4021b550 65162c06 bc1ddc9e 3c05a7a5 15f029c0 e.,.....<.....). + 4021b560 1bb220b2 b3b0b121 0bbb80bb 01b0b831 .. ....!.......1 + 4021b570 0601007c cbf029c0 f03b1127 a30c0b42 ...|..)..;.'...B + 4021b580 4024b320 b1214600 000c2b2d 061bee00 @$. .!F...+-.... + 4021b590 3a11bacc 80cc0130 3031e0e0 7452cef6 :......001..tR.. + 4021b5a0 d02383c0 c831b2cc 1a29d1b2 411180bb .#...1...)..A... + 4021b5b0 01b0b831 5605f10c 102851c8 81d891e8 ...1V....(Q..... + 4021b5c0 a13c0fa7 2f010c00 02420008 61020000 .<../....B..a... + 4021b5d0 f8b1f020 1127a915 9020d01b 322b2230 ... .'... ..2+"0 + 4021b5e0 23b32021 21002211 20203146 00000c02 #. !!.". 1F.... + 4021b5f0 087112c1 400df000 8ca22623 0c263309 .q..@.....&#.&3. + 4021b600 26630626 73030c02 0df02170 e94171e9 &c.&s.....!p.Aq. + 4021b610 32023842 04302202 37804401 80330130 2.8B.0".7.D..3.0 + 4021b620 38314048 31802201 202831e6 74d92d03 81@H1.". (1.t.-. + 4021b630 0df00000 12c1d009 11396169 712901d9 .........9aiq).. + 4021b640 31e941f9 51c921fd 040c0ce1 0ce81c8d 1.A.Q.!......... + 4021b650 2d0c3801 457500fa 02020000 48618000 -.8.Eu......Ha.. + 4021b660 01000831 f68c044a 40060200 58714d05 ...1...J@...XqM. + 4021b670 07a5014d 0002af00 e03ca040 80604d0d ...M.....<.@.`M. + 4021b680 80880180 8831872d 014d0840 5074c020 .....1.-.M.@Pt. + 4021b690 002223c1 00221050 2220c020 002263c1 ."#..".P" . ."c. + 4021b6a0 1bccc0c0 74d79ca7 c821d831 e841f851 ....t....!.1.A.Q + 4021b6b0 081112c1 300df000 00002c00 fffffff0 ....0.....,..... + 4021b6c0 60820191 e9d912c1 f0307060 70707469 `........0p`ppti + 4021b6d0 110921c9 315901cd 0251e8e7 01b4e761 ..!.1Y...Q.....a + 4021b6e0 f6ff6077 11606420 c0200022 25ee9022 ..`w.`d . ."%.." + 4021b6f0 10802220 70222060 2220c020 000ca308 .." p" `" . .... + 4021b700 002265ee 02201c0c 42c00000 d05c11c0 ."e.. ..B....\.. + 4021b710 70040c16 88010c04 22580070 46835044 p......."X.pF.PD + 4021b720 2051e6ff 804401c0 200031d4 e72223ee Q...D.. .1.."#. + 4021b730 50221040 2220c020 00c83101 9ce72263 P".@" . ..1..."c + 4021b740 ee08000c 4202201c 0ca3c000 00981108 ....B. ......... + 4021b750 21225900 12c1100d f0000000 c48bfe3f !"Y............? + 4021b760 10fb2240 8d030c09 0c0a12c1 c029d159 .."@.........).Y + 4021b770 e169b109 31d951e9 61c941f9 71cd040c .i..1.Q.a.A.q... + 4021b780 0f0c0e0c 0da99199 a1891102 c2f40000 ................ + 4021b790 7409c1f6 4d420c13 48e10184 e7e02ed1 t...MB..H....... + 4021b7a0 22d20108 0022c280 20282129 81022042 "....".. (!).. B + 4021b7b0 fa22f881 80220120 2831c000 000c0348 ."...". (1.....H + 4021b7c0 e1f0f2c0 017ae72d 0e080080 ff010220 .....z.-....... + 4021b7d0 42f0f831 c00000ed 020c1238 c148115d B..1.......8.H.] + 4021b7e0 012b61c5 edff9291 01029100 3d0997a0 .+a.........=... + 4021b7f0 013d0000 29c00c14 30348350 22110106 .=..)...04.P"... + 4021b800 99c00000 58e122c2 10202521 224c008c ....X.".. %!"L.. + 4021b810 75d65f00 20306032 4c000c02 38d14811 u._. 0`2L...8.H. + 4021b820 5d012b61 85e9ff32 91014291 003024c0 ].+a...2..B..0$. + 4021b830 4a334022 110c1400 33113030 31303483 J3@"....3.00104. + 4021b840 01f698c0 000058e1 02c21000 0521024c ......X......!.L + 4021b850 018c7577 6e050000 60024c01 220c0080 ..uwn...`.L."... + 4021b860 22012028 31f63d14 20ffc000 eec080ee ". (1.=. ....... + 4021b870 0180ff01 f0f831e0 e8310622 00389158 ......1..1.".8.X + 4021b880 a13a405a 620149e7 80660180 44014038 .:@Zb.I..f..D.@8 + 4021b890 31605831 080059a1 08003991 c00000e6 1`X1..Y...9..... + 4021b8a0 22150142 e7220c01 08008022 01080020 "..B."....."... + 4021b8b0 2831c000 00a62277 666d4a28 a1013be7 (1...."wfmJ(..;. + 4021b8c0 38910800 2b332b22 20222130 32213921 8...+3+" "!02!9! + 4021b8d0 080020ff c030eec0 80ee0180 ff01f0f8 .. ..0.......... + 4021b8e0 31e0e831 c00000e6 520e0130 e7080008 1..1....R..0.... + 4021b8f0 002821c0 0000a652 0c3198ff 41a7f528 .(!....R.1..A..( + 4021b900 03402220 290358b1 9c952195 ff420c01 .@" ).X...!..B.. + 4021b910 320c0080 44018033 01303831 40483101 2...D..3.081@H1. + 4021b920 cb99c000 001bddd0 d07452cd f95625e6 .........tR..V%. + 4021b930 0c1348e1 011ee7d8 51080080 2f010220 ..H.....Q.../.. + 4021b940 42202831 c0000048 e10118e7 0c030800 B (1...H........ + 4021b950 802e0102 20422028 31c00000 0831e24c .... B (1....1.L + 4021b960 01f24c00 e861f871 c84112c1 400df000 ..L..a.q.A..@... + 4021b970 20fb2240 ffff00e0 30932012 c1c0c261 ."@....0. ....a + 4021b980 09f2610c 69314921 0981d9a1 e9b1dd02 ..a.i1I!........ + 4021b990 ed070802 99110001 05567018 22a0770c .........Vp.".w. + 4021b9a0 031c04c1 02e70c06 080cfd05 0220250c ............. %. + 4021b9b0 05c00000 0c030cf4 0c650c66 080c2951 .........e.f..)Q + 4021b9c0 02202522 a077c000 000c030c 940c750c . %".w........u. + 4021b9d0 06080c29 61022025 22a077c0 0000080c ...)a. %".w..... + 4021b9e0 02202829 71c00000 080c0220 300c12c0 . ()q...... 0... + 4021b9f0 00002821 45d4f928 213d010c 14456aff ..(!E..(!=...Ej. + 4021ba00 080c0860 0c02c000 00080c08 f00c12c0 ...`............ + 4021ba10 000022a0 770c030c 940c7508 0c0c0602 ..".w.....u..... + 4021ba20 20270c07 c0000022 a0770c03 1c040c25 '.....".w.....% + 4021ba30 080c0c26 0220270c 17c00000 28317201 ...&. '.....(1r. + 4021ba40 443d0f2b 41f20140 5d0e6d0f 45d1ff08 D=.+A..@].m.E... + 4021ba50 0c02201b 0c12c000 0022a077 0c031c04 .. ......".w.... + 4021ba60 0c050c06 080c7851 02202779 41c00000 ......xQ. 'yA... + 4021ba70 786122a0 770c030c f4080c0c 65022027 xa".w.......e. ' + 4021ba80 0c66c000 00787122 a0770c03 0c94080c .f...xq".w...... + 4021ba90 0c750220 270c06c0 000022a0 770c031c .u. '.....".w... + 4021baa0 040c2508 0c0c2602 20270c07 c000000c ..%...&. '...... + 4021bab0 f2420102 7c108044 01404831 0724010d .B..|..D.@H1.$.. + 4021bac0 04420103 0722012d 006c1022 41028044 .B...".-.l."A..D + 4021bad0 01803201 30383140 48311cf2 0724010d ..2.081@H1...$.. + 4021bae0 04072201 2d002241 03804201 4048318c ..".-."A..B.@H1. + 4021baf0 ee58418c a5303060 32410280 33013038 .XA..00`2A..3.08 + 4021bb00 318cdf21 9bff0151 99c00000 42010332 1..!...Q....B..2 + 4021bb10 01023057 0480e301 e0e83116 6508e2c3 ..0W......1.e... + 4021bb20 20062000 c21300c0 e84180cc 01c0c831 . ......A.....1 + 4021bb30 61d5e680 ae01b1ab eee09c01 b09920e1 a............. . + 4021bb40 bce9b18c ffc02000 822e98b0 8810a088 ...... ......... + 4021bb50 20908820 c0200082 6e982c07 c0200058 .. . ..n.,.. .X + 4021bb60 a6705520 c0200059 a67c040c 23c02000 .pU . .Y.|..#. . + 4021bb70 222e8f40 22103022 20c02000 226e8f02 "..@".0" . ."n.. + 4021bb80 ae0e0c1f c02000d2 2e9900dd 10f0dd20 ..... ......... + 4021bb90 c02000c8 91d26e99 f8c1d8a1 e8b10881 . ....n......... + 4021bba0 12c1400d f080f401 f0f83177 6402f2c4 ..@.......1wd... + 4021bbb0 40080c80 cf010220 2ac0c831 c0000031 @...... *..1...1 + 4021bbc0 58b2280d 804f0180 5e114048 31504420 X.(..O..^.@H1PD + 4021bbd0 58113022 20425500 290d86d4 ff000000 X.0" BU.)....... + 4021bbe0 12c1e0e9 31d921c9 11f941f1 fae70901 ....1.!...A..... + 4021bbf0 080fc16e e677f035 22a06a0c 230c040c ...n.w.5".j.#... + 4021bc00 55080c0c 46022027 0c07c000 0091efe7 U...F. '........ + 4021bc10 a80c2209 00a22a27 16620522 a06a0c23 .."...*'.b.".j.# + 4021bc20 0c440c75 0c460c17 c00a00c6 1400d20f .D.u.F.......... + 4021bc30 2c22a061 0c130c24 52a0a008 0c505d20 ,".a...$R....P] + 4021bc40 02202650 5074c000 0022a066 0c330c14 . &PPt...".f.3.. + 4021bc50 d821e831 4c06080c 520f2dc8 11f84160 .!.1L...R.-...A` + 4021bc60 55200220 26505074 c0000008 0112c120 U . &PPt....... + 4021bc70 0df022a0 6a0c230c 440c750c 460c27c0 ..".j.#.D.u.F.'. + 4021bc80 0a0022a0 680c330c 140c0508 0c0c0602 ..".h.3......... + 4021bc90 20270c17 c0000022 a06a0c23 0c640c45 '.....".j.#.d.E + 4021bca0 080c0c06 0220270c 87c00000 22a06a0c ..... '.....".j. + 4021bcb0 230c440c 05080c0c 06022027 0c17c000 #.D....... '.... + 4021bcc0 0022a06a 0c230c34 0c65080c 0c660220 .".j.#.4.e...f. + 4021bcd0 270c17c0 000022a0 6a0c230c 440c3508 '.....".j.#.D.5. + 4021bce0 0c0c3602 20270c07 c0000022 a06a0c23 ..6. '.....".j.# + 4021bcf0 0c440c35 080c0c36 0220270c 17c00000 .D.5...6. '..... + 4021bd00 22a06401 66a5c000 0022a06a 0c230c54 ".d.f....".j.#.T + 4021bd10 080c0c55 0220250c 06c00000 0c330c14 ...U. %......3.. + 4021bd20 0c050c06 0c07080c ed020220 2722a068 ........... '".h + 4021bd30 c0000001 a6e74189 fe620000 b63e043c ......A..b...>.< + 4021bd40 c2e7b209 51f6a538 04503320 3904bca6 ....Q..8.P3 9... + 4021bd50 1ce3c02e 1122c2d9 01b097c0 0000dd02 .....".......... + 4021bd60 d24f2c0c 93e02ef0 e0221120 20f40157 .O,......". ..W + 4021bd70 98c00000 5125e748 0f203074 2b333032 ....Q%.H. 0t+302 + 4021bd80 21324f2d 50442049 0f06a9ff 1c43e02e !2O-PD I.....C.. + 4021bd90 a0e02290 22c2f201 a097c000 00dd0246 .."."..........F + 4021bda0 efff0000 ddbd2140 a28bfe3f 12c1f0d9 ......!@...?.... + 4021bdb0 21c91109 01cd020c 102186e7 dd032202 !........!....". + 4021bdc0 523d0c20 20930583 ff0182e7 6180e7f6 R=. .......a... + 4021bdd0 bc3a41f4 ffc03c90 4a33a003 00862800 .:A...<.J3....(. + 4021bde0 c6270006 33004632 00862500 c6240006 .'..3.F2..%..$.. + 4021bdf0 3000462f 00062d00 c62a0086 2800c621 0.F/..-..*..(..! + 4021be00 00862500 46230006 2100c61e 00da3c32 ..%.F#..!.....<2 + 4021be10 d3ff3203 f0020030 f68c0b42 06405604 ..2....0...B.@V. + 4021be20 05320d00 86120080 00010008 31261017 .2..........1&.. + 4021be30 0cb22710 410cd447 104272c0 f2520613 ..'.A..G.Br..R.. + 4021be40 0c007005 83860000 02061030 207407b2 ..p........0 t.. + 4021be50 05820639 2628010d 02c81121 d3ffd821 ...9&(.....!...! + 4021be60 22020000 007407b2 012d0008 0112c110 "....t...-...... + 4021be70 0df03a32 c6ebff02 061146f3 ff020612 ..:2......F..... + 4021be80 c6f1ff32 0642c6e2 ff320d00 46e1ff32 ...2.B...2..F..2 + 4021be90 0d02c6df ff320d04 46deff32 0d06c6dc .....2..F..2.... + 4021bea0 ff320d01 46dbff32 0d03c6d9 ff320d05 .2..F..2.....2.. + 4021beb0 46d8ff32 0641c6d6 ff000000 2b648293 F..2.A......+d.. + 4021bec0 00000440 8090b190 88c00016 408a8200 ...@........@... + 4021bed0 25a10088 11808031 82530027 28142048 %......1.S.'(. H + 4021bee0 c0502060 80220120 28314253 000df00c .P `.". (1BS.... + 4021bef0 020df020 40608724 f52a4880 25012028 ... @`.$.*H.%. ( + 4021bf00 3146f9ff 40fb2240 f30f0000 d0fb2240 1F..@."@......"@ + 4021bf10 12c1a0d2 6112f261 14026110 29e159f1 ....a..a..a.).Y. + 4021bf20 626116c2 6111e261 13ed03c1 8ae6c020 ba..a..a....... + 4021bf30 0022a138 c22cd849 d1c0c845 c52efff1 .".8.,.I...E.... + 4021bf40 07fedd02 225f02f6 8c0a7cf2 202c3020 ...."_....|. ,0 + 4021bf50 20244600 002d0c3d 0e05e5ff 38e12c09 $F..-.=....8.,. + 4021bf60 3a222261 15220200 6c00e022 11202dc0 :""a."..l..". -. + 4021bf70 00221120 2031225f 03072201 0d02420f .". 1"_.."...B. + 4021bf80 08072901 9d000029 11202031 f64419e6 ..)....). 1.D.. + 4021bf90 1202c696 00200221 0a0200d2 21d0d060 ..... .!....!..` + 4021bfa0 80dd01d0 d8318602 0038d10c 440c25c5 .....1...8..D.%. + 4021bfb0 f0ffdd02 e108e732 2116a61d 0f220e5d .......2!....".] + 4021bfc0 1c308022 01202831 27a0010c 0d01defb .0.". (1'....... + 4021bfd0 1653065d 0d720e5d 429f0382 0e5c68d1 .S.].r.]B....\h. + 4021bfe0 32211562 96003203 00808801 80883189 2!.b..2.......1. + 4021bff0 0121c4ff 80770170 7831c020 00819fe5 .!...w.px1. .... + 4021c000 b228d8ad 0080bb01 b0b831b9 11a21a00 .(........1..... + 4021c010 a921c931 920e3080 99019098 31994180 .!.1..0.....1.A. + 4021c020 8ca0c020 008228c1 80880180 88318951 ... ..(......1.Q + 4021c030 010798c0 000001c4 fb88f116 e819c9c1 ................ + 4021c040 169d19c2 a07f0c02 fd0d420e 5c2c4380 ..........B.\,C. + 4021c050 44014048 31205290 1b22e055 9052053d D.@H1 R..".U.R.= + 4021c060 20207480 55015058 3157ac01 5d0c80c5 t.U.PX1W..]... + 4021c070 01c0c831 6642ddca c4d02cc0 80220120 ...1fB....,..". + 4021c080 283127a3 08621000 52a3e467 350be6a2 (1'..b..R..g5... + 4021c090 75821000 719dff87 376c31ab fb1c8920 u...q...7l1.... + 4021c0a0 99c09241 2022c120 c507ff02 0e5e4201 ...A ". .....^B. + 4021c0b0 20320e5d c05dc052 c5188033 01804401 2.].].R...3..D. + 4021c0c0 80000100 08314048 31303831 4025c050 .....1@H1081@%.P + 4021c0d0 44c02a33 2a00024e 5e324e5d 4aff32c1 D.*3*..N^2N]J.2. + 4021c0e0 220c0421 99fb80ff 01f0f831 22120045 "..!.......1"..E + 4021c0f0 fbfe2195 fb32c122 221200c5 f0fe0192 ..!..2.""....... + 4021c100 fb321000 325e2dd6 df004c64 f05cc080 .2..2^-...Ld.\.. + 4021c110 55015058 3157a414 e61f0286 2f00f06c U.PX1W....../..l + 4021c120 c0806601 606831e6 a602c62b 00220e30 ..f.`h1....+.".0 + 4021c130 32c12892 0e5c720e 5e820e5d 80770180 2.(..\r.^..].w.. + 4021c140 88018099 01909831 80883170 7831f077 .......1..1px1.w + 4021c150 80f08880 f099c092 4e5c824e 5d724e5e ........N\.N]rN^ + 4021c160 c5c1fb21 83f0422e 189b3205 defa8221 ...!..B...2....! + 4021c170 16168806 2166ff72 0e5d820e 5c68d132 ....!f.r.]..\h.2 + 4021c180 21154176 fd320300 42940362 96008088 !.Av.2..B..b.... + 4021c190 01808831 89015d0d 80770170 7831c020 ...1..]..w.px1. + 4021c1a0 00a136e5 98c1f22a d8c167fb 80ff01f0 ..6....*..g..... + 4021c1b0 f831f911 c21c0099 31c921b2 0e3080bb .1......1.!..0.. + 4021c1c0 01b0b831 b941a099 a0c02000 9229c180 ...1.A.... ..).. + 4021c1d0 99019098 31995101 9d97c000 00c22111 ....1.Q.......!. + 4021c1e0 d22112e2 2113f221 14022110 12c1600d .!..!..!..!...`. + 4021c1f0 f07c0777 a2082002 210002c0 8666ff0c .|.w.. .!....f.. + 4021c200 0dc66bff 4102e67c e631d2e5 c0200022 ..k.A..|.1... ." + 4021c210 23d74022 10c02000 2263d7b1 d0e5c020 #.@".. ."c..... + 4021c220 00a223d7 b0aa10c0 2000a263 d7c02000 ..#..... ..c.. . + 4021c230 9223d460 9910c020 009263d4 0c28c020 .#.`... ..c..(. + 4021c240 007223d8 807720c0 20007263 d8c02000 .r#..w . .rc.. . + 4021c250 5223d860 5510c020 005263d8 0c14c020 R#.`U.. .Rc.... + 4021c260 002223d8 402220c0 20002263 d80df000 ."#.@" . ."c.... + 4021c270 a18bfe3f a78afe3f a08bfe3f 148bfe3f ...?...?...?...? + 4021c280 12c1e002 61040151 e6420043 52003d40 ....a..Q.B.CR.=@ + 4021c290 40045684 09565509 61f6ff71 f6ff6206 @.V..VU.a..q..b. + 4021c2a0 00720700 56660856 3708012c fd52a000 .r..Vf.V7..,.R.. + 4021c2b0 61a9e5c0 20008226 d4f7f842 c0200022 a... ..&...B. ." + 4021c2c0 61039226 d4392190 9825fc19 31ebff32 a..&.9!..%..1..2 + 4021c2d0 03002d01 80330130 3831851f fe2d0131 ..-..3.081...-.1 + 4021c2e0 a7ee41e6 ff583168 2145c2ff 211cfd02 ..A..X1h!E..!... + 4021c2f0 02081c34 07340a1b 50524208 86000052 ...4.4..PRB....R + 4021c300 500205f0 ff2133e6 01a9e422 025e0220 P....!3....".^. + 4021c310 00802201 02200020 2831c000 00a6820d ..".. . (1...... + 4021c320 312de622 a0002243 5e0c0245 77fd0841 1-.".."C^..Ew..A + 4021c330 12c1200d f0000000 91c8e90c 0b8185e5 .. ............. + 4021c340 12c1f0c9 110901d9 210c00d2 a0ff7cfc ........!.....|. + 4021c350 8060a020 70905d0d ad0bc020 0032a117 .`. p.].... .2.. + 4021c360 6226e01b 00000074 c0663060 407442c4 b&.....t.f0`@tB. + 4021c370 eb6060a4 62570040 a4b330aa 82903610 .``.bW.@..0...6. + 4021c380 a0a821a7 2d015d0a 3a353257 006680bf ..!.-.].:52W.f.. + 4021c390 c811d821 080112c1 100df000 12c1e009 ...!............ + 4021c3a0 61294139 51c9717c d4c16ae5 c0200032 a)A9Q.q|..j.. .2 + 4021c3b0 2cd44033 10c02000 326cd40c 22c02000 ,.@3.. .2l..". . + 4021c3c0 022cd420 0020c020 001c9202 6cd401b3 .,. . . ....l... + 4021c3d0 a3c00000 0c75c020 00622cd4 60687567 .....u. .b,.`hug + 4021c3e0 050bc020 00722cd4 70782556 37ffc841 ... .r,.px%V7..A + 4021c3f0 2d0145f4 ff021103 42110232 11018211 -.E.....B..2.... + 4021c400 07521105 22110472 11065a22 8a774a33 .R.."..r..Z".wJ3 + 4021c410 3a007077 90202290 2020f470 60f4f080 :.pw. ". .p`... + 4021c420 118080f4 67380570 70d04600 000c0772 ....g8.pp.F....r + 4021c430 5c000851 c8716732 056022c0 4600000c \..Q.qg2.`".F... + 4021c440 02225000 086112c1 200df000 f13c1101 ."P..a.. ....<.. + 4021c450 f33c1101 f03c1101 ffff0300 3040f412 .<...<......0@.. + 4021c460 c1d0c941 e961f971 59b16921 0c13d951 ...A.a.qY.i!...Q + 4021c470 d14fe409 31080d29 1102202b 0c02c000 .O..1..).. +.... + 4021c480 0028b1c1 34e51642 111ccf4c 0e4c0d0c .(..4..B...L.L.. + 4021c490 080c090c 0ab2c2fc b981a901 999189a1 ................ + 4021c4a0 0143e40c 1208000c 2302202b e040f4c0 .C......#. +.@.. + 4021c4b0 0000013e e40c0208 000c2302 202bd040 ...>......#. +.@ + 4021c4c0 f4c00000 c0200031 e1ff326c d3c02000 ..... .1..2l.. . + 4021c4d0 21e0ff22 6cd30c22 0171a3c0 000032a0 !.."l..".q....2. + 4021c4e0 7f0801c0 2000422c d387f408 c0200052 .... .B,..... .R + 4021c4f0 2cd38775 f6c02000 622cd30c 17606f05 ,..u.. .b,...`o. + 4021c500 706630c0 2000a19c 97822cd3 0c09a088 pf0. .....,..... + 4021c510 10809783 9c268d03 dadf00dd 11d0d031 .....&.........1 + 4021c520 d723018d 0ddd0846 0300f02d c00c0d00 .#.....F...-.... + 4021c530 22112020 3120d2b3 48819c29 8d03eaef ". 1 ..H..).... + 4021c540 00ee11e0 e031e723 018d0eed 08460300 .....1.#.....F.. + 4021c550 f02ec00c 0e002211 20203120 e2b362cf ......". 1 ..b. + 4021c560 fef05121 1b550c1f 80550150 583160f5 ..Q!.U...U.PX1`. + 4021c570 93472017 689188a1 ea76da98 00991100 .G .h....v...... + 4021c580 77117060 31908031 89a16991 88b11b00 w.p`1..1..i..... + 4021c590 00007409 010088c0 5648f0c6 01000c02 ..t.....VH...... + 4021c5a0 0c033991 29a10c12 0c23f891 d100e42b ..9.)....#.....+ + 4021c5b0 ff080df0 42f40220 2bf0f221 c000000c ....B.. +..!.... + 4021c5c0 020c23e8 a1080d2b eee042f4 02202be0 ..#....+..B.. +. + 4021c5d0 e221c000 000c1208 0d0c1302 202b42a0 .!.......... +B. + 4021c5e0 7fc00000 419cffc0 20002811 3821426c ....A... .(.8!Bl + 4021c5f0 d3e24300 f243019c f29197ff e07e0170 ..C..C.......~.p + 4021c600 8f01610b e7c02000 52269990 55108055 ..a... .R&..U..U + 4021c610 20705520 c0200052 6699c841 d851e861 pU . .Rf..A.Q.a + 4021c620 f8710831 12c1300d f0000000 0c048b52 .q.1..0........R + 4021c630 22a07f30 55e00055 11505031 5045b300 "..0U..U.PP1PE.. + 4021c640 44114030 31e6e301 2d038022 01202831 D.@01...-..". (1 + 4021c650 0df00000 c084fe3f 60fc2240 80fc2240 .......?`."@.."@ + 4021c660 0c0712c1 c0e971f9 81d96109 41c95169 ......q...a.A.Qi + 4021c670 9149d159 f10c940c 750c06cd 0301cbe3 .I.Y....u....... + 4021c680 dd020800 22a07702 20270c03 c000004d ....".w. '.....M + 4021c690 0c3d0d0c 050c0601 c5e30c02 29012911 .=..........).). + 4021c6a0 29210800 0c070220 1a0c12c0 00000c0c )!..... ........ + 4021c6b0 0c3559b1 49a10c0d 0c0fa891 0c09f63c .5Y.I..........< + 4021c6c0 0981e4ff 8a8c8208 0089a1b8 a1caaaa9 ................ + 4021c6d0 c1924a00 1bbbb9e1 bcac261c 1d662c53 ..J.......&..f,S + 4021c6e0 22a06b0c 230c2401 b1e30c65 08000c46 ".k.#.$....e...F + 4021c6f0 0220277d 0dc00000 060e0022 a06b0c23 . '}.......".k.# + 4021c700 0c2401aa e30c3508 000c0602 20277d0d .$....5..... '}. + 4021c710 c0000046 070022a0 6b0c230c 140c350c ...F..".k.#...5. + 4021c720 0601a2e3 0c170800 707d9002 20277070 ........p}.. 'pp + 4021c730 74c00000 019ee308 0028d102 201c0ca3 t........(.. ... + 4021c740 c00000ed 0228f18c b221c3ff 3d0d4d0e .....(...!..=.M. + 4021c750 013f96c0 0000e7af 0efd0e48 c10c1330 .?.........H...0 + 4021c760 3d90c03d 93324400 48e11bdd d0d074d0 =..=.2D.H.....t. + 4021c770 44c05624 f6e8f18c ee21b8ff 48c13d0c D.V$.....!..H.=. + 4021c780 42040001 3296c000 00ac2c26 1c65662c B...2.....,&.ef, + 4021c790 3822a06b 0c230c24 0c650184 e30c4608 8".k.#.$.e....F. + 4021c7a0 0078c102 20277207 00c00000 86060022 .x.. 'r........" + 4021c7b0 a06b0c23 0c140c35 017de30c 06080078 .k.#...5.}.....x + 4021c7c0 c1022027 720700c0 000028b1 1bccc0c0 .. 'r.....(..... + 4021c7d0 740b2229 b156d2ed 0175e308 0002201b t.").V...u.... . + 4021c7e0 0c12c000 00c851d8 61e871f8 81084112 ......Q.a.q...A. + 4021c7f0 c1400df0 22a06b0c 230c240c 35016be3 .@..".k.#.$.5.k. + 4021c800 0c060800 78c10220 27720700 c00000c6 ....x.. 'r...... + 4021c810 edff0000 a0fc2240 12c1a0c9 81d991e9 ......"@........ + 4021c820 a1f9b142 61167961 59c139d1 62611109 ...Ba.yaY.9.ba.. + 4021c830 710c0601 e6e40b34 39413050 7482003d q......49A0Pt..= + 4021c840 80330130 38318056 8359e132 611257a3 .3.081.V.Y.2a.W. + 4021c850 02c65e00 2261100c 0ea2a064 42611679 ..^."a.....dBa.y + 4021c860 61b21130 c20164c9 f1b26115 08d14221 a..0..d...a...B! + 4021c870 1258410a 04620000 62611357 a40df200 .XA..b..ba.W.... + 4021c880 0160ffc0 faee00ee 11e0e031 0c0f0c20 .`.........1... + 4021c890 b22111c1 46e3eabb 00bb11b0 b031b7aa .!..F........1.. + 4021c8a0 07d2a064 09514602 00c140e3 09510c0d ...d.QF...@..Q.. + 4021c8b0 b0dbb30c 12322110 d040740c 050c0669 .....2!..@t....i + 4021c8c0 01691169 21080c0c 0702201a 0c06c000 .i.i!..... ..... + 4021c8d0 000c2201 72a2c000 00080c08 b0222115 ..".r........"!. + 4021c8e0 c0000008 0c226114 08b02221 15c00000 ....."a..."!.... + 4021c8f0 a2a0641c 86b22113 5221140c 042a5500 ..d...!.R!...*U. + 4021c900 55116c82 0d025050 314b5550 53210055 U.l...PP1KUPS!.U + 4021c910 11505031 5045b300 44114040 31b0b4c0 .PP1PE..D.@@1... + 4021c920 00bb11b0 b031272b 010d0bbd 0678f107 .....1'+.....x.. + 4021c930 2601bd00 00cb11c0 c0319c57 d90121b5 &........1.W..!. + 4021c940 ff3d0f52 21136d0c 7d0e01c0 95c00000 .=.R!.m.}....... + 4021c950 a2a064cc 1ce61f42 660c0608 5126103a ..d....Bf...Q&.: + 4021c960 bc70cc1d 963c03a7 9d02e61c 2d0d0c1b .p...<......-... + 4021c970 ff80ff01 f0f83142 cff6e63c 127ce337 ......1B...<.|.7 + 4021c980 2c0dea9c 00e911e0 e0315624 f0860200 ,........1V$.... + 4021c990 c0922190 9cc09a9e 06fafff2 21122861 ..!.........!.(a + 4021c9a0 c8c10221 12c0cdc0 2a0080bc 01b0b831 ...!....*......1 + 4021c9b0 c240000b 2f6c8c80 220120f8 31c7ab04 .@../l..". .1... + 4021c9c0 6c8dd240 0008e1f2 6112072f 02c6a6ff l..@....a../.... + 4021c9d0 017fe43c 23786142 21166207 007a5480 ...<#xaB!.b..zT. + 4021c9e0 660152c5 8022057f 60683180 22012028 f.R.."..`h1.". ( + 4021c9f0 316062c0 67a30562 c2ce6247 0082003d 1`b.g..b..bG...= + 4021ca00 aca8a624 28284161 73e40c00 6a448204 ...$((Aas...jD.. + 4021ca10 316a9092 09323205 7f9088c0 8a337a80 1j...22......3z. + 4021ca20 3248001b 00800001 00083107 92df01df 2H........1..... + 4021ca30 e2080002 201b0c12 c00000c8 81d891e8 .... ........... + 4021ca40 a1f8b108 7112c160 0df00000 e0fc2240 ....q..`......"@ + 4021ca50 60ce0040 12c1a0c9 91d9a1e9 b1098152 `..@...........R + 4021ca60 611469d1 f9c1f2c2 fe6104e3 c02000d2 a.i......a... .. + 4021ca70 26e0000f 40d0d0b1 c02000e2 26e3000f &...@.... ..&... + 4021ca80 40e0e0b1 e0bdc0c0 20008226 e2000f40 @....... ..&...@ + 4021ca90 8080b1c0 20007911 98d1000f 400226e1 .... .y.....@.&. + 4021caa0 eadd2d0d 0000b190 95300aa8 8000c0cd ..-......0...... + 4021cab0 00408330 971807cd 0a2d0bad 00bd0d29 .@.0.....-.....) + 4021cac0 f1c0df31 4d02b261 13a26112 f901205f ...1M..a..a... _ + 4021cad0 3159e13d 05011ed1 c000005d 0d4d0ced 1Y.=.......].M.. + 4021cae0 0329313d 0d2d0c01 1ad1c000 00022113 .)1=.-........!. + 4021caf0 a221120c 043afe0c 1b38310c 052ae3e0 .!...:...81..*.. + 4021cb00 5b8337be 011bfff0 4b835704 03ed0b0c [.7.....K.W..... + 4021cb10 0fa26111 38e128f1 4d000951 a06f3100 ..a.8.(.M..Q.o1. + 4021cb20 5f315941 62611001 0ad1c000 00522110 _1YAba.......R!. + 4021cb30 42211139 6129713d 0d2d0c01 05d1c000 B!.9a)q=.-...... + 4021cb40 00086198 713000c0 20a9c0a7 b9010b00 ..a.q0.. ....... + 4021cb50 702a115d 0f4d0e10 4740a030 8101bcff p*.].M..G@.0.... + 4021cb60 c0000038 11804201 58d14048 311b4440 ...8..B.X.@H1.D@ + 4021cb70 41214020 60502483 58414851 22430029 A!@ `P$.XAHQ"C.) + 4021cb80 213d0d2d 0c01f2d0 c0000052 21104221 !=.-.......R!.B! + 4021cb90 11dd03cd 0238e128 f101edd0 c000003a .....8.(.......: + 4021cba0 0d2a2cd2 2114c7b2 011b004d 0e5d0f10 .*,.!......M.].. + 4021cbb0 4740c811 20308170 221101a5 ffc00000 G@.. 0.p"....... + 4021cbc0 52016080 62016068 311b6660 61216000 R.`.b.`h1.f`a!`. + 4021cbd0 60d00683 024c01ac 65219cff c0200031 `....L..e!... .1 + 4021cbe0 a7e24801 80500150 58310004 403223f9 ..H..P.PX1..@2#. + 4021cbf0 48213030 b1804401 40483101 1495c000 H!00..D.@H1..... + 4021cc00 00c891d8 a1e8b1f8 c1088112 c1600df0 .............`.. + 4021cc10 9d0312c1 b0797149 51526111 09816261 .....yqIQRa...ba + 4021cc20 12226110 f9c1d9a1 e9b1c991 0c0e0c0c ."a............. + 4021cc30 d15fe2f2 01549961 0c226d05 62411022 ._...T.a."m.bA." + 4021cc40 61130221 100c1252 21125241 11001040 a..!...R!.RA...@ + 4021cc50 0022a102 015809e1 2020f429 d132c110 ."...X.. .).2.. + 4021cc60 0c145d0f 080dc02c d122d201 22c28002 ..]....,.".."... + 4021cc70 203e2028 2129f120 2ec08022 01202831 > (!). ...". (1 + 4021cc80 c0000032 c1110c04 5d0f080d ed020220 ...2....]...... + 4021cc90 3e2d0cc0 000038d1 080dcd02 08d00c12 >-....8......... + 4021cca0 c0000022 21103861 52011182 21116201 ..."!.8aR...!.b. + 4021ccb0 100c1980 66c08221 12606993 62411080 ....f..!.`i.bA.. + 4021ccc0 55c088e1 50599352 41118901 080d4851 U...PY.RA.....HQ + 4021ccd0 02201272 c112c000 0028f102 01122a2e . .r.....(....*. + 4021cce0 80e00102 0113e0e8 312aee80 000180ee ........1*...... + 4021ccf0 01e0e831 00083100 ccc0080d 80cc0108 ...1..1......... + 4021cd00 c0c0c831 c0000032 21130b33 32611356 ...1...2!..32a.V + 4021cd10 a3f42201 12080d80 22010800 202831c0 .."....."... (1. + 4021cd20 0000e652 12220113 080d8022 01080020 ...R."....."... + 4021cd30 2831c000 00a65214 4189fa61 89a73804 (1....R.A..a..8. + 4021cd40 52040960 33201b55 52440939 040cf27c R..`3 .URD.9...| + 4021cd50 10072e01 0d0e0722 012d006c 1080e201 .......".-.l.... + 4021cd60 e0e8311c f2072c01 0d0c0722 012d0032 ..1...,....".-.2 + 4021cd70 c1100c14 5d0f80c2 01080dc0 c8310220 ....]........1. + 4021cd80 3e2d0ec0 00002d0c 32c1110c 045d0f08 >-....-.2....].. + 4021cd90 0dd8a102 203ef8c1 c0000008 81387122 .... >.......8q" + 4021cda0 2114e243 00c24200 e8b1c891 12c1500d !..C..B.......P. + 4021cdb0 f0000000 9d0512c1 b0d9f1e2 611079a1 ............a.y. + 4021cdc0 0c05f261 1109d1c9 e1497129 51396122 ...a.....Iq)Q9a" + 4021cdd0 a0770c03 1c04c1f5 e1926112 080cfd06 .w........a..... + 4021cde0 0220250c 06c00000 0c030cf4 0c650c66 . %..........e.f + 4021cdf0 080ced02 02202522 a077c000 000c031c ..... %".w...... + 4021ce00 840c550c 56080cdd 02022025 22a077c0 ..U.V..... %".w. + 4021ce10 00000c03 1c840c35 0c36080c 29b10220 .......5.6..).. + 4021ce20 2522a077 c000000c 030c940c 750c0608 %".w........u... + 4021ce30 0c29c102 202522a0 77c00000 080c2991 .).. %".w.....). + 4021ce40 0220100c 12c00000 0c12d0d2 93e0e293 . .............. + 4021ce50 e24110d2 41118ccf 080c22c1 10022045 .A..A....."... E + 4021ce60 32c111c0 000022a0 770c031c 040c2508 2.....".w.....%. + 4021ce70 0c0c2602 20270c17 c0000022 a0770c03 ..&. '.....".w.. + 4021ce80 1c840c75 080c0c17 92011082 0111909e ...u............ + 4021ce90 c0808dc0 80879390 97939241 10824111 ...........A..A. + 4021cea0 0220270c 76c00000 080c0220 142871c0 . '.v...... .(q. + 4021ceb0 00000c05 0c060c07 4d020c03 39213911 ........M...9!9. + 4021cec0 3901080c 0c120220 1a3861c0 00002851 9...... .8a...(Q + 4021ced0 72c11398 a158b142 01113201 1068c10c r....X.B..2..h.. + 4021cee0 1a606a93 f911505a 93598199 21790108 .`j...PZ.Y..!y.. + 4021cef0 0cfd0602 204372c1 12c00000 080c0220 .... Cr........ + 4021cf00 1b0c12c0 000022a0 770c031c 040c050c ......".w....... + 4021cf10 06080c7d 0e022027 e881c000 007d0d22 ...}.. '.....}." + 4021cf20 a0770c03 0cf4080c 0c650220 270c66c0 .w.......e. '.f. + 4021cf30 00007d0e 22a0770c 031c840c 55080c0c ..}.".w.....U... + 4021cf40 56022027 d891c000 007d0f22 a0770c03 V. '.....}.".w.. + 4021cf50 1c84080c 0c350220 270c36c0 00007d0d .....5. '.6...}. + 4021cf60 22a0770c 030c9408 0c0c7502 20270c06 ".w.......u. '.. + 4021cf70 c0000022 a0770c03 1c840c75 080c0c76 ...".w.....u...v + 4021cf80 0220270c 07c00000 22a0770c 031c040c . '.....".w..... + 4021cf90 25080c0c 26022027 0c07c000 00d22112 %...&. '......!. + 4021cfa0 0c02e221 10080cf2 21110220 10c8e1c0 ...!....!.. .... + 4021cfb0 00003201 1208d132 4d002201 13224d01 ..2....2M.".."M. + 4021cfc0 d8f112c1 500df000 12c1f009 0151abe1 ....P........Q.. + 4021cfd0 c0200022 a0770c03 0c845225 d861fde2 . .".w....R%.a.. + 4021cfe0 0173e162 06530800 50506080 55010220 .s.b.S..PP`.U.. + 4021cff0 26505831 80660160 68316055 c052c5e8 &PX1.f.`h1`U.R.. + 4021d000 505074c0 00000801 12c1100d f0000000 PPt............. + 4021d010 5d0312c1 f00c0309 01e931d9 21c911dd ].........1.!... + 4021d020 04c162e1 ed02080c 22a07702 20261cb4 ..b.....".w. &.. + 4021d030 c0000022 a0770c03 080c0c54 022026e0 ...".w.....T. &. + 4021d040 5474c000 00e05034 22a07708 0c0c0302 Tt....P4".w..... + 4021d050 20260c64 c0000022 a0770c03 0cf40c45 &.d...".w.....E + 4021d060 080c505d 20022026 505074c0 000022a0 ..P] . &PPt...". + 4021d070 770c030c f4e8315d 0d080cc8 11022026 w.....1]...... & + 4021d080 d821c000 00080112 c1100df0 12c1f009 .!.............. + 4021d090 01cc930c 53018d93 c0000086 06000117 ....S........... + 4021d0a0 cc27b00b 018a93c0 00004022 11060200 .'........@".... + 4021d0b0 40221101 8693c000 00080112 c1100df0 @".............. + 4021d0c0 10d30040 12c1f009 01ccb40c 050c5401 ...@..........T. + 4021d0d0 fcffc000 00860d00 0c007cf9 8108cc0c ..........|..... + 4021d0e0 05873307 87930227 b9010c10 9c0001f4 ..3....'........ + 4021d0f0 ffc00000 10444020 33814022 11860300 .....D@ 3.@".... + 4021d100 10444020 33814022 1101edff c0000008 .D@ 3.@"........ + 4021d110 0112c110 0df00000 30228220 2c410df0 ........0". ,A.. + 4021d120 d48bfe3f 5133e5c0 20004225 474a42c0 ...?Q3.. .B%GJB. + 4021d130 200061fb ff426541 31679b0c 15273301 .a..BeA1g...'3. + 4021d140 0c055246 000df000 00000050 12c1f0d9 ..RF.......P.... + 4021d150 31590109 11019de2 c9210200 25c124e5 1Y.......!..%.$. + 4021d160 dc207cc5 c0200032 2c595033 10c02000 . |.. .2,YP3.. . + 4021d170 326c5986 07006610 072c0660 4420c604 2lY...f..,.`D .. + 4021d180 00662010 0c38c020 00722c59 807720c0 .f ..8. .r,Y.w . + 4021d190 2000726c 590c03d1 05e1c020 00326c50 .rlY...... .2lP + 4021d1a0 c0200022 6c51c020 0022a077 2c85080d . ."lQ. .".w,... + 4021d1b0 426c4002 20261cc4 c0000051 0ce94119 Bl@. &.....Q..A. + 4021d1c0 9d312ee1 c0200022 23f25022 10402220 .1... ."#.P".@" + 4021d1d0 c0200022 63f20c12 0131a0c0 000022a0 . ."c....1....". + 4021d1e0 770c0308 0d1cc402 20260c85 c0000051 w....... &.....Q + 4021d1f0 01e54105 e2c02000 3121e122 23fa5022 ..A... .1!."#.P" + 4021d200 10402220 c020000c 340c1522 63fa080d .@" . ..4.."c... + 4021d210 22a06202 20260c13 c0000068 0131caff ".b. &.....h.1.. + 4021d220 66863122 a06c0c23 0c040c05 080d0c06 f.1".l.#........ + 4021d230 0220270c 07c00000 22a0650c 43080d0c . '.....".e.C... + 4021d240 04022026 0c65c000 002199e5 c0200022 .. &.e...!... ." + 4021d250 6c444601 00c02000 326c44c8 21d83108 lDF... .2lD.!.1. + 4021d260 1112c110 0df00000 82afc051 e1e4c020 ...........Q... + 4021d270 00722546 80771020 7720c020 00726546 .r%F.w. w . .reF + 4021d280 7ce6c020 0042256a 60441030 4420c020 |.. .B%j`D.0D . + 4021d290 0042656a 0df00000 3080fe3f 0000000f .Bej....0..?.... + 4021d2a0 61feff28 06660225 519dad41 fcff21df a..(.f.%Q..A..!. + 4021d2b0 e3c02000 32229650 3310303f 4166130f .. .2".P3.0?Af.. + 4021d2c0 c0200022 22954022 10202875 29060df0 . ."".@". (u)... + 4021d2d0 c0200022 229706fb ff000000 50008000 . ."".......P... + 4021d2e0 12c1f0c9 110901cd 0245fbff 26220e5d .........E..&".] + 4021d2f0 0c0c420c 0341f9ff 05e5ffc6 08000133 ..B..A.........3 + 4021d300 e2020044 66200e5d 0c0c420c 0341f3ff ...Df .]..B..A.. + 4021d310 85e3ffc6 02005d0c 0c420c03 41bbe1c5 ......]..B..A... + 4021d320 e2ffc811 080112c1 100df000 12c1f0c9 ................ + 4021d330 110901cd 0285f6ff 26220e5d 0c0c020c ........&".].... + 4021d340 0341e6ff 45e0ffc6 08000120 e2020044 .A..E...... ...D + 4021d350 66200e5d 0c0c020c 0341e0ff c5deffc6 f .].....A...... + 4021d360 02005d0c 0c020c03 41a8e105 deffc811 ..].....A....... + 4021d370 080112c1 100df000 3c200300 64800c00 ........< ..d... + 4021d380 12c1f009 0185f1ff 019ae426 12118ce2 ...........&.... + 4021d390 21faffc0 20002260 43080112 c1100df0 !... ."`C....... + 4021d3a0 31f7ffc0 20003260 4306fbff 0df00000 1... .2`C....... + 4021d3b0 11200000 71d1b581 9de3c020 00622886 . ..q...... .b(. + 4021d3c0 21afe070 6610c020 00222246 71f9ff27 !..pf.. .""Fq..' + 4021d3d0 72515160 e1c02000 92255677 19030c12 rQQ`.. ..%Vw.... + 4021d3e0 0df0c020 0022254f 20a21566 3aef20b4 ... ."%O ..f:. . + 4021d3f0 25662be9 20378592 a07f3789 e0c02000 %f+. 7....7... . + 4021d400 22254f20 42156634 d420a425 662ace20 "%O B.f4. .%f*. + 4021d410 b785b789 c8c02000 22255677 92bfc020 ...... ."%Vw... + 4021d420 00626886 0c020df0 20503440 70543060 .bh..... P4@pT0` + 4021d430 14c06611 a0771160 55206139 ff705520 ..f..w.`U a9.pU + 4021d440 5256010d f0000000 26120266 222f5134 RV......&..f"/Q4 + 4021d450 ff220504 ec622166 e4c02000 32224a30 ."...b!f.. .2"J0 + 4021d460 3014cca3 c0200042 224a4040 141634ff 0.... .B"J@@..4. + 4021d470 0c27c020 0062224a 70661062 45060df0 .'. .b"Jpf.bE... + 4021d480 8145f531 7ee0615a e4c02000 8266440c .E.1~.aZ.. ..fD. + 4021d490 07c02000 72665151 21a0c020 00526640 .. .rfQQ!.. .Rf@ + 4021d4a0 4153e8c0 20002223 f2402210 c0200022 AS.. ."#.@".. ." + 4021d4b0 63f20df0 00fef13f ffff3fff fffffffc c......?..?..... + 4021d4c0 ffffff3f a13bdb31 fbff616b e0c02000 ...?.;.1..ak.. . + 4021d4d0 a266f891 f9ff814c e1c02000 72269d90 .f.....L.. .r&.. + 4021d4e0 77108077 20c02000 72669d51 f4ff4144 w..w . .rf.Q..AD + 4021d4f0 e4c02000 22269d50 22104022 20c02000 .. ."&.P".@" . . + 4021d500 22669db1 44e4a1b9 e9c02000 92269db0 "f..D..... ..&.. + 4021d510 9910a099 20c02000 92669d81 e9ff7195 .... . ..f....q. + 4021d520 93c02000 52269d80 55107055 20c02000 .. .R&..U.pU . . + 4021d530 52669d41 b5eec020 00222381 402210c0 Rf.A... ."#.@".. + 4021d540 20002263 810df000 41a1e112 c1f0c911 ."c....A....... + 4021d550 09010204 22c148e0 26107626 30732640 ....".H.&.v&0s&@ + 4021d560 7026506d 0c00c020 00026cf8 01d5ff31 p&Pm... ..l....1 + 4021d570 d1ffc020 00b22c9d 00bb10c0 2000b26c ... ..,..... ..l + 4021d580 9da124e4 c0200092 2c9da099 10c02000 ..$.. ..,..... . + 4021d590 926c9d81 caffc020 00722c9d 807710c0 .l..... .r,..w.. + 4021d5a0 2000726c 9d61c4ff c0200052 2c9d6055 .rl.a... .R,.`U + 4021d5b0 10c02000 526c9d41 6f93c020 00222381 .. .Rl.Ao.. ."#. + 4021d5c0 402220c0 20002263 81c81108 0112c110 @" . ."c........ + 4021d5d0 0df02204 23452200 06e4ff00 87130000 ..".#E"......... + 4021d5e0 1c4212c1 e0c911d9 21e931f9 41090101 .B......!.1.A... + 4021d5f0 2b9fc000 000c0ce1 f9ffd19b e3f1adff +............... + 4021d600 c0200002 2d840000 34cc90c0 2000222f . ..-...4... ."/ + 4021d610 f4202c34 9c020c22 01219fc0 00003d0c . ,4...".!....=. + 4021d620 1bccc0c0 f437bed7 c811d821 e831f841 .....7.....!.1.A + 4021d630 080112c1 200df000 12c1f031 64e10901 .... ......1d... + 4021d640 02032242 aecf2610 0f26300c 26400926 .."B..&..&0.&@.& + 4021d650 50060801 12c1100d f03c0621 e5e3c020 P........<.!... + 4021d660 00522285 40551060 5520c020 00526285 .R".@U.`U . .Rb. + 4021d670 c0200002 228d4000 10c02000 02628d02 . ..".@... ..b.. + 4021d680 03222610 2d26302a 26400266 50c36203 ."&.-&0*&@.fP.b. + 4021d690 23b626bd 0c020c13 0c140c05 01a79fc0 #.&............. + 4021d6a0 00000c82 0c030c84 0c0501a3 9fc00000 ................ + 4021d6b0 86e7ff72 0323b627 980c120c 030c140c ...r.#.'........ + 4021d6c0 05019d9f c000000c 020c830c 840c0501 ................ + 4021d6d0 9a9fc000 0046deff 12c1f031 3ce10901 .....F.....1<... + 4021d6e0 02032252 aecf2610 0f26300c 26400926 .."R..&..&0.&@.& + 4021d6f0 50060801 12c1100d f0220323 01bde3b6 P........".#.... + 4021d700 22282c06 c0200072 20855077 10607720 "(,.. .r .Pw.`w + 4021d710 c0200072 6085c020 0042208d 50441060 . .r`.. .B .PD.` + 4021d720 4420c020 0042608d 8608003c 0ac02000 D . .B`....<.. . + 4021d730 92208550 9910a099 20c02000 926085c0 . .P.... . ..`.. + 4021d740 20008220 8d508810 c0200082 608d0203 .. .P... ..`... + 4021d750 2226104f 26304c26 40026650 94020323 "&.O&0L&@.fP...# + 4021d760 66101e0c 020c130c 140c0501 739fc000 f...........s... + 4021d770 000c820c 030c840c 05016f9f c00000c6 ..........o..... + 4021d780 dbff56c0 f60c120c 030c140c 05016a9f ..V...........j. + 4021d790 c000000c 020c830c 840c0501 679fc000 ............g... + 4021d7a0 0046d3ff 02032366 101e0c12 0c030c14 .F....#f........ + 4021d7b0 0c050161 9fc00000 0c020c83 0c840c05 ...a............ + 4021d7c0 015e9fc0 000006ca ff5650f2 0c020c13 .^.......VP..... + 4021d7d0 0c140c05 01599fc0 00000c82 0c030c84 .....Y.......... + 4021d7e0 0c050155 9fc00000 86c1ff00 60360040 ...U........`6.@ + 4021d7f0 10110040 50150040 30330040 419fdf9c ...@P..@03.@A... + 4021d800 82261220 26222826 32302642 38665208 .&. &"(&20&B8fR. + 4021d810 21f7ffc0 20002264 f80df00c 03c02000 !... ."d...... . + 4021d820 3264f80d f05162da c0200052 64f80df0 2d...Qb.. .Rd... + 4021d830 61f0ffc0 20006264 f80df071 eeffc020 a... .bd...q... + 4021d840 007264f8 0df081ec ffc02000 8264f80d .rd....... ..d.. + 4021d850 f0000000 ff0f0080 988bfe3f a68afe3f ...........?...? + 4021d860 7a8bfe3f 12c1e0e9 310901f9 41d921c9 z..?....1...A.!. + 4021d870 11dd03cd 02f12afe 26220266 1219566d ......*.&".f..Vm + 4021d880 01220f07 9c02320f 04ccb342 0f06cc64 ."....2....B...d + 4021d890 054f000c 05524f07 7c3b0c4a 5164e291 .O...RO.|;.JQd.. + 4021d8a0 2de0c020 008229d0 b08810a0 8820c020 -.. ..)...... . + 4021d8b0 008269d0 716398c0 20006225 86706620 ..i.qc.. .b%.pf + 4021d8c0 c0200062 6586261c 05262c02 668c1101 . .be.&..&,.f... + 4021d8d0 55e5c020 00e22586 00ee20c0 2000e265 U.. ..%... . ..e + 4021d8e0 8641dcff e146e301 64dfc020 00426085 .A...F..d.. .B`. + 4021d8f0 31f2fec0 20002220 9d302210 c0200022 1... ." .0".. ." + 4021d900 609d261c 08262c05 268c0286 1f000c02 `.&..&,.&....... + 4021d910 01caf1c0 000022a0 620124df 0c130800 ......".b.$..... + 4021d920 0c340220 2652a0f1 c0000022 a062011f .4. &R.....".b.. + 4021d930 df0c1308 000cb402 202652a0 80c00000 ........ &R..... + 4021d940 c5b3ff22 a0650119 df0c4308 000c0402 ...".e....C..... + 4021d950 202652a0 c6c00000 22a06c0c 230c0401 &R.....".l.#... + 4021d960 13df0c05 08000c06 0220270c 17c00000 ......... '..... + 4021d970 3199e041 43df2803 40222029 034502fd 1..AC.(.@" ).E.. + 4021d980 6195e058 06013cdf e0551059 06813ddf a..X..<..U.Y..=. + 4021d990 c0200022 2842e022 10c02000 2268420c . ."(B.".. ."hB. + 4021d9a0 1bc02000 a22858b0 aa20c020 00a26858 .. ..(X.. . ..hX + 4021d9b0 7ce9c020 00722858 907710c0 20007268 |.. .r(X.w.. .rh + 4021d9c0 58c02000 62209c17 663b0c22 01349ec0 X. .b ..f;.".4.. + 4021d9d0 000082a0 f162ac00 c0200041 2adf78d4 .....b... .A*.x. + 4021d9e0 60771080 7720c020 0079d452 a0f0c020 `w..w . .y.R... + 4021d9f0 0038d460 33105033 20c02000 39d40c22 .8.`3.P3 . .9.." + 4021da00 01279ec0 000045cf fc817f91 290885cc .'....E.....)... + 4021da10 ff45b3ff dc8d920f 05dc3901 8fffa200 .E........9..... + 4021da20 00661a0b b20f0066 1b05262c 19261c16 .f.....f..&,.&.. + 4021da30 0801e831 d18aff0c 0cf841c2 4d00c811 ...1......A.M... + 4021da40 d82112c1 200df022 a000e160 e0224000 .!.. .."...`."@. + 4021da50 e20e4322 4f0017ee d622a004 0185e2c0 ..C"O...."...... + 4021da60 0000217f ff220200 85f5fb22 a0040c03 ..!..".....".... + 4021da70 05dfff46 eeff0000 0c0651dd e2c02000 ...F......Q... . + 4021da80 626550c0 20002265 51c02000 426540c0 beP. ."eQ. .Be@. + 4021da90 20003265 440df000 12c1f009 010580ff .2eD........... + 4021daa0 26220c0c 020c0341 0dfec5fc ff460200 &".....A.....F.. + 4021dab0 0c020c03 41d5df05 fcff0801 12c1100d ....A........... + 4021dac0 f0000000 20203020 00005020 12c1f0c9 .... 0 ..P .... + 4021dad0 1109017c f0c1c6e2 c0200002 6c4985fb ...|..... ..lI.. + 4021dae0 ff0c820c 030578ff 4589ff22 a3e84563 ......x.E.."..Ec + 4021daf0 ff31d397 c0200022 2c423022 20c02000 .1... .",B0" . . + 4021db00 226c420c 220594ff 01bce20c 040c75c0 "lB.".........u. + 4021db10 2000026c 40b122cb c02000b2 6c41c020 ..l@.".. ..lA. + 4021db20 00426c42 a1b1d9c0 2000a26c 4391ced0 .BlB.... ..lC... + 4021db30 c0200092 6c440c48 c0200082 6c46c020 . ..lD.H. ..lF. + 4021db40 00426c48 c0200042 6c50c020 00426c51 .BlH. .BlP. .BlQ + 4021db50 71ddffc0 2000726c 5261dbff c0200062 q... .rlRa... .b + 4021db60 6c53c020 00426c56 c0200052 6c57c020 lS. .BlV. .RlW. + 4021db70 00526c58 c0200042 6c59c020 00426c5a .RlX. .BlY. .BlZ + 4021db80 c0200042 6c5dc020 00426c60 c0200042 . .Bl]. .Bl`. .B + 4021db90 6c64c020 00426c65 c0200042 6c66c020 ld. .Ble. .Blf. + 4021dba0 00426c67 c0200042 6c68c020 00426c6a .Blg. .Blh. .Blj + 4021dbb0 c0200042 6c6bc020 00426c6c c0200042 . .Blk. .Bll. .B + 4021dbc0 6c6dc811 080112c1 100df000 70008000 lm..........p... + 4021dbd0 00000d00 12c1e002 6102d261 04c9317c ........a..a..1| + 4021dbe0 f2c183e2 d172dec0 20000c23 0c840c05 .....r.. ..#.... + 4021dbf0 080d226c 49022026 22a06ac0 00000c03 .."lI. &".j..... + 4021dc00 c0200032 6c430c32 8551ffc0 20000c08 . .2lC.2.Q.. ... + 4021dc10 826c50c0 2000826c 517ce7c0 2000622c .lP. ..lQ|.. .b, + 4021dc20 6a706610 c0200062 6c6ac020 00522c40 jpf.. .blj. .R,@ + 4021dc30 590141e6 ffc02000 426c400c 820c0385 Y.A... .Bl@..... + 4021dc40 62ffa17f 9701e1df c0200092 2c420200 b........ ..,B.. + 4021dc50 00a09920 99116610 2622a067 0c43080d ... ..f.&".g.C.. + 4021dc60 0c140220 2652a088 c0000022 a0670c43 ... &R.....".g.C + 4021dc70 080d0c24 02202652 a091c000 00c60500 ...$. &R........ + 4021dc80 66201422 a0670c43 0c240c75 080d0c56 f .".g.C.$.u...V + 4021dc90 0220270c 27c00000 21cddf98 0d22024c . '.'...!....".L + 4021dca0 92292720 20146612 1222a067 0c430c44 .)' .f..".g.C.D + 4021dcb0 0c450c06 1c47c009 00c60300 22a0670c .E...G......".g. + 4021dcc0 430c440c 450c061c 37c00900 31c0df32 C.D.E...7...1..2 + 4021dcd0 034c080d 07634a30 51044158 e121bcff .L...cJ0Q.AX.!.. + 4021dce0 02201f50 24933d02 0c12c000 0022a077 . .P$.=......".w + 4021dcf0 0c031cc4 0c65080d 0c660220 270c17c0 .....e...f. '... + 4021dd00 000022a0 770c031c c40c5508 0d0c5602 ..".w.....U...V. + 4021dd10 20270c17 c000000c 5201609d c00000c6 '......R.`..... + 4021dd20 0f0022a0 7732a000 42a00f52 a0030c36 ..".w2..B..R...6 + 4021dd30 0220270c 17c00000 22a0770c 031c840c . '.....".w..... + 4021dd40 05080d0c 06022027 0c17c000 0022a077 ...... '.....".w + 4021dd50 0c031cc4 0c05080d 0c060220 270c07c0 ........... '... + 4021dd60 0000d801 c0200028 11226c42 0c12856d ..... .(."lB...m + 4021dd70 ffc02000 d26c4008 21c831d8 4112c120 .. ..l@.!.1.A.. + 4021dd80 0df00000 12c1f009 014551ff 0190df32 .........EQ....2 + 4021dd90 00000200 449c4366 100885e3 ff060300 ....D.Cf........ + 4021dda0 000000cc 60261204 8c1285e2 ff080112 ....`&.......... + 4021ddb0 c1100df0 143a0040 a4380040 12c1f009 .....:.@.8.@.... + 4021ddc0 010182df 4184df22 00004804 cc423200 ....A.."..H..B2. + 4021ddd0 4c076352 b7f44f7c 380c8761 dedec020 L.cR..O|8..a... + 4021dde0 005226d0 80551070 5520c020 005266d0 .R&..U.pU . .Rf. + 4021ddf0 05deff01 22dec020 00922046 277927c0 ....".. .. F'y'. + 4021de00 2000a220 46a0ad25 662a1bb1 f9e1c020 .. F..%f*..... + 4021de10 00b22b88 876b0f0c 1201e6ff c000000c ..+..k.......... + 4021de20 1201e5ff c0000008 0112c110 0df00000 ................ + 4021de30 12c1f009 0145f8ff 080112c1 100df000 .....E.......... + 4021de40 5480fe3f e88dfe3f b18efe3f b08efe3f T..?...?...?...? + 4021de50 12c1f021 fbff0931 c9212202 00661258 ...!...1.!"..f.X + 4021de60 c1f9ff22 0c2cf622 100c030c 22459fff ...".,."...."E.. + 4021de70 0c22224c 2c860200 000032a0 0122a002 .""L,.....2..".. + 4021de80 059eff01 089dc000 000c0201 5dd9c000 ............]... + 4021de90 00c5b502 220c2d66 1239315b cbc02000 ....".-f.91[.. . + 4021dea0 48032024 20c02000 22630022 a0a00157 H. $ . ."c."...W + 4021deb0 cbc00000 06070000 00662217 22a00101 .........f"."... + 4021dec0 50d9c000 000c030c 828599ff 0c02014c P..............L + 4021ded0 d9c00000 21ddff32 02006613 090c0332 ....!..2..f....2 + 4021dee0 42000c02 85bbfb21 d9ff3202 0066130b B......!..2..f.. + 4021def0 0c033242 000c132d 038547fa 0831c821 ..2B...-..G..1.! + 4021df00 12c1100d f0000000 12c1f009 3105f4ff ............1... + 4021df10 21cdff51 15e93842 d7631142 12084035 !..Q..8B.c.B..@5 + 4021df20 1042a600 40332006 02000000 00321208 .B..@3 ......2.. + 4021df30 30351032 5208c563 03083112 c1100df0 05.2R..c..1..... + 4021df40 9c87fe3f 3086fe3f e48dfe3f 21beff12 ...?0..?...?!... + 4021df50 c1f00931 38422162 d4202310 32a40037 ...18B!b. #.2..7 + 4021df60 121231f7 ff21f7ff 42a19a01 bed9c000 ..1..!..B....... + 4021df70 0006ffff 0005f9ff 21f4ff28 028c12c0 ........!..(.... + 4021df80 02000831 12c1100d f0000000 002e0000 ...1............ + 4021df90 00220000 feffff0f afd2ffff aed2ff0f .".............. + 4021dfa0 20dcfe3f 3ffd2240 b80b0000 16f4ffff ..??."@........ + 4021dfb0 d4170000 008efe3f 28070060 1c371040 .......?(..`.7.@ + 4021dfc0 c00d0040 12c1d0d9 9109b1c9 a1e26108 ...@..........a. + 4021dfd0 f97101b4 9cc00000 619bff21 ecff3226 .q......a..!..2& + 4021dfe0 0460d620 20231031 eaff3712 1331d4ff .`. #.1..7..1.. + 4021dff0 21d5ff42 a263019b d9c00000 06ffff00 !..B.c.......... + 4021e000 0005c800 9c1231ce ff21ceff 42a26401 ......1..!..B.d. + 4021e010 95d9c000 0006ffff 00c84d21 769920cc ..........M!v. . + 4021e020 1056fc47 0c124556 03661202 061d0121 .V.G..EV.f.....! + 4021e030 d090485d c0200038 0231d6ff e18ec847 ..H]. .8.1.....G + 4021e040 331ec020 00280238 2d22c264 3022c00c 3.. .(.8-".d0".. + 4021e050 0e47b20c 21c7903a 34c02000 e802e0e3 .G..!..:4. ..... + 4021e060 c021cdff 31ceff2a 2e27b302 06ff0032 .!..1..*.'.....2 + 4021e070 1d0821bd 97202310 225d0821 7ec8279e ..!.. #."].!~.'. + 4021e080 0b321d08 21c79720 2320225d 08220d2e .2..!.. # "].".. + 4021e090 26120206 1f00c59c 02f1c1ff 2d0f01c7 &...........-... + 4021e0a0 97c00000 284dc7e2 3c217dd9 4802acb4 ....(M...".,V..!. + 4021e3b0 ca380dc0 20004802 222d0120 24c085d5 .8.. .H."-. $... + 4021e3c0 fe31eb8f c0200048 03382d40 33c04153 .1... .H.8-@3.AS + 4021e3d0 ca2a2338 042a3339 0431bd96 520300e0 .*#8.*39.1..R... + 4021e3e0 32112a43 8c45f024 11204541 383d3a24 2.*C.E.$. EA8=:$ + 4021e3f0 31e3d8c0 20002903 21f0fec0 20002802 1... .).!... .(. + 4021e400 203014dc 2331cefe 21cffe42 a17f0195 0..#1..!..B.... + 4021e410 d8c00000 06ffff00 00076207 216fd7c0 ..........b.!o.. + 4021e420 20002802 384d212e d3202310 32a40037 .(.8M!.. #.2..7 + 4021e430 121231c3 fe21c3fe 42a18a01 8ad8c000 ..1..!..B....... + 4021e440 0006ffff 0005acff d1d6fe2d 0d01db96 ...........-.... + 4021e450 c00000c1 d5fe0c15 2d0d4d05 3d0c01d6 ........-.M.=... + 4021e460 96c00000 2d0c8574 02c60a00 284d41be ....-..t....(MA. + 4021e470 e7d76210 321d0830 241032a6 00302220 ..b.2..0$.2..0" + 4021e480 c6010000 00221d08 20241022 5d080c03 .....".. $."]... + 4021e490 2d0301cb fec00000 21acfe22 22001622 -.......!.."".." + 4021e4a0 00c00200 017f9bc0 00002189 9631b2d8 ..........!..1.. + 4021e4b0 42020021 b48fc020 0028028c 5422c250 B..!... .(..T".P + 4021e4c0 c6000000 22d20508 b1c8a1d8 91e881f8 ...."........... + 4021e4d0 71c02000 290312c1 300df000 12c1f021 q. .)...0......! + 4021e4e0 59fec921 09313842 20c220d7 63314579 Y..!.18B . .c1Ey + 4021e4f0 00ecb221 53fe2202 00662223 384c21f8 ...!S."..f"#8L!. + 4021e500 d2202310 32a40037 92150c03 2d0301ac . #.2..7....-... + 4021e510 fec00000 21a8fe01 a996c000 00859eff ....!........... + 4021e520 0831c821 12c1100d f0000000 c4df2140 .1.!..........!@ + 4021e530 12c1f002 6103d261 01c921dd 02c54bf3 ....a..a..!...K. + 4021e540 854bf39c 22317efe 217ffe42 a2fc0145 .K.."1~.!..B...E + 4021e550 d8c00000 06ffff00 00857200 9c023178 ..........r...1x + 4021e560 fe2178fe 42a2fd01 3fd8c000 0006ffff .!x.B...?....... + 4021e570 c135fe22 a0fe384c d7634121 d9d242a6 .5."..8L.cA!..B. + 4021e580 00203310 22a0ff47 9332320c 2e0c0227 . 3."..G.22....' + 4021e590 132a2177 8f0c03c0 20002802 d95c292c .*!w.... .(..\), + 4021e5a0 21e3ff01 87fec000 00321c08 216fe720 !........2..!o. + 4021e5b0 331022a2 00202320 225c080c 020831c8 3.".. # "\....1. + 4021e5c0 21d81112 c1100df0 4afd2240 12c1f0c2 !.......J."@.... + 4021e5d0 6102c11c fed26101 0931284c d16fead7 a.....a..1(L.o.. + 4021e5e0 8245056a 008c1285 2d01221c 080c0320 .E.j....-.".... + 4021e5f0 2d20225c 082d0301 72fec000 00484c32 - "\.-..r....HL2 + 4021e600 0c2e21f1 ff404924 01918ec0 0000384c ..!..@I$......8L + 4021e610 21b4d227 8311321c 082153e7 20331022 !..'..2..!S. 3." + 4021e620 a6002023 20225c08 0831c821 d81112c1 .. # "\..1.!.... + 4021e630 100df000 8bfd2240 7afd2240 70fd2240 ......"@z."@p."@ + 4021e640 6efd2240 12c1e0d9 510971c9 61e941f9 n."@....Q.q.a.A. + 4021e650 3120d074 eccdc152 fec02c20 015896c0 1 .t...R.., .X.. + 4021e660 00000c15 2d0c4d05 1c930153 96c00000 ....-.M....S.... + 4021e670 21f5fd0c 0332422e 21efff01 748ec000 !....2B.!...t... + 4021e680 00c61a00 21edff01 718ec000 000b2d20 ....!...q.....- + 4021e690 2074f622 5ac1ebfd 220c2ed7 1245e140 t."Z..."....E.@ + 4021e6a0 fe2d0e66 1d1d0145 96c00000 f13ffe0c .-.f...E.....?.. + 4021e6b0 152d0e4d 053d0f01 4096c000 002d0fc6 .-.M.=..@....-.. + 4021e6c0 06000000 013e96c0 000052a0 01e02e20 .....>....R.... + 4021e6d0 5045201c 93013896 c0000022 a064054d PE ...8....".d.M + 4021e6e0 02d24c2e 320c2e21 d5ff0158 8ec00000 ..L.2..!...X.... + 4021e6f0 21d4ff01 568ec000 000871c8 61d851e8 !...V.....q.a.Q. + 4021e700 41f83112 c1200df0 21cffd22 022e0df0 A.1.. ..!..".... + 4021e710 21fd2240 18fd2240 10fd2240 12c1f0c9 !."@.."@.."@.... + 4021e720 2120c074 21fbff02 61030148 8ec00000 ! .t!...a..H.... + 4021e730 21c5fdcc 9c0c0332 422f21f6 ffc60100 !......2B/!..... + 4021e740 0c133242 2f21f4ff 01418ec0 00000831 ..2B/!...A.....1 + 4021e750 c82112c1 100df000 21bbfd22 022f0df0 .!......!.."./.. + 4021e760 4cdf2140 12c1f0c9 21c1b6fd 0931d911 L.!@....!....1.. + 4021e770 e901321c 080c420c 1d202320 d022207c ..2...B.. # ." | + 4021e780 d3302210 0c833022 20225c08 31f5ff21 .0"...0" "\.1..! + 4021e790 09fe0c2e 42a000e2 4c2c0106 97c00000 ....B...L,...... + 4021e7a0 0c02224c 2d321c08 215aa8e2 4c2e2023 .."L-2..!Z..L. # + 4021e7b0 10225c08 d24c1208 31c821d8 11e80112 ."\..L..1.!..... + 4021e7c0 c1100df0 21a0fd0c 04384221 45d20c15 ....!....8B!E... + 4021e7d0 20331022 d3fa6d04 20658330 45834026 3."..m. e.0E.@& + 4021e7e0 200df000 2198fd0c 14384221 3dd22023 ...!....8B!=. # + 4021e7f0 1032d2fc 0c023024 830df000 5ffd2240 .2....0$...._."@ + 4021e800 12c1f0c9 21c18ffd 0931284c d7625c0c ....!....1(L.b\. + 4021e810 032d0301 ebfdc000 002189fd 22020066 .-.......!.."..f + 4021e820 221105fc ff16b200 21e3fd01 e495c000 ".......!....... + 4021e830 00456dff 384c21f1 ff303924 01048ec0 .Em.8L!..09$.... + 4021e840 0000321c 082132a8 20331022 ae3f2023 ..2..!2. 3.".? # + 4021e850 10225c08 0c02292c 384c2121 d227030b ."\...),8L!!.'.. + 4021e860 321c0821 c1e62023 10225c08 0831c821 2..!.. #."\..1.! + 4021e870 12c1100d f0000000 2173fd28 42202d04 ........!s.(B -. + 4021e880 0df00000 31b1fd29 030df000 78ddfe3f ....1..)....x..? + 4021e890 31ffff0c 02420332 27142821 b58e5203 1....B.2'.(!..R. + 4021e8a0 41c02000 48022853 4042c028 b3205582 A. .H.(S@B.(. U. + 4021e8b0 0c024735 0e222313 5213142a 352d0447 ..G5."#.R..*5-.G + 4021e8c0 33010c02 0df00000 0df00000 e0ddfe3f 3..............? + 4021e8d0 ccddfe3f 12c1e0c9 6121a58e c1ecffd9 ...?....a!...... + 4021e8e0 510971e9 41f931c0 2000d802 321c1821 Q.q.A.1. ...2..! + 4021e8f0 9ee62033 10218bbb 20232022 5c18220c .. 3.!.. # "\.". + 4021e900 32164209 0c04a86c 584c785c 620c4138 2.B....lXLx\b.A8 + 4021e910 bc8d042d 04bd049d 04f2a064 d0e5c0e7 ...-.......d.... + 4021e920 b32b3ae5 30a682e0 b7c0b7ba 04aa7722 .+:.0.........w" + 4021e930 a0011b99 f7990ccc 260c186d 08cc3331 ........&..m..31 + 4021e940 fd9a0c14 ad050c1b 5d0e86f3 ff008c2b ........]......+ + 4021e950 a96c594c 8c02795c 8c18624c 418c0439 .lYL..y\..bLA..9 + 4021e960 bc21daff 019695c0 0000e1d9 ff2d0e01 .!...........-.. + 4021e970 9395c000 00384c22 2c142a23 d0d2c022 .....8L",.*#..." + 4021e980 2c1332a3 e8202dc0 01518dc0 00003d02 ,.2.. -..Q....=. + 4021e990 0c150c04 2d0e0607 0021ccff 018895c0 ....-....!...... + 4021e9a0 0000c1cb ff2d0c01 8595c000 000c150c .....-.......... + 4021e9b0 0432a069 2d0c0180 95c00000 0871c861 .2.i-........q.a + 4021e9c0 d851e841 f83112c1 200df000 f4ddfe3f .Q.A.1.. ......? + 4021e9d0 12c1f0c9 21c1fdff 09312d0c 017895c0 ....!....1-..x.. + 4021e9e0 00002d0c 0c150c04 3c730173 95c00000 ..-..... # F..fS.|. #0 + 4021ec50 32243e20 23102264 3e0df000 210cff0c 2$> #."d>...!... + 4021ec60 0332623f 32623e0d f0000000 248efe3f .2b?2b>.....$..? + 4021ec70 31ffff29 030df000 208efe3f 31ffff29 1..).... ..?1..) + 4021ec80 030df000 2102ff28 c2202d04 0df00000 ....!..(. -..... + 4021ec90 12c1f021 fefe0261 03220243 85060420 ...!...a.".C... + 4021eca0 322022a0 f0161302 3203011c a5804301 2 ".....2.....C. + 4021ecb0 4048315c 02472511 32c3ef30 307442a0 @H1\.G%.2..00tB. + 4021ecc0 6d22a0f0 37340222 a0a00831 12c1100d m"..74."...1.... + 4021ecd0 f0000000 40223030 32100c14 0c023024 ....@"002.....0$ + 4021ece0 930df000 58361040 2131da12 c1f02802 ....X6.@!1....(. + 4021ecf0 c921c1e6 fe09310c 05622226 591c0c84 .!....1..b"&Y... + 4021ed00 0c2322a0 6ac00600 2d0c01f6 ffc00000 .#".j...-....... + 4021ed10 0831281c c82112c1 100df000 1d8efe3f .1(..!.........? + 4021ed20 12c1f021 feffc921 09313202 00cd02cc ...!...!.12..... + 4021ed30 6345fbff 0c12224c 0021d4fe 08312812 cE...."L.!...1(. + 4021ed40 c82112c1 100df000 40420f00 001e0000 .!......@B...... + 4021ed50 a6fd2240 44defe3f f04c0040 12c1e0c9 .."@D..?.L.@.... + 4021ed60 610971d9 51e26104 f931014e 99c00000 a.q.Q.a..1.N.... + 4021ed70 c1c7fe31 f6ff222c 0c419fe8 30321047 ...1..",.A..02.G + 4021ed80 9305320c 36164301 d7621131 4cff214c ..2.6.C..b.1L.!L + 4021ed90 ff42a562 0134d6c0 000006ff ff311596 .B.b.4.......1.. + 4021eda0 370202c6 a9000c12 057e0266 120206a7 7........~.f.... + 4021edb0 0028cc07 6202c69f 00d1e3ff 220ce2e1 .(..b......."... + 4021edc0 0fff6612 4e2136d6 4802ac64 21419432 ..f.N!6.H..d!A.2 + 4021edd0 0200e02d 11da5216 5300f025 11205541 ...-..R.S..%. UA + 4021ede0 21698dc0 20003802 3a253814 27b30d0c !i.. .8.:%8.'... + 4021edf0 22860200 21d7ff01 958cc000 000c1222 "...!.........." + 4021ee00 4e0001d5 ffc00000 322c3e30 2230322c N.......2,>0"02, + 4021ee10 3f370204 0c22224e 002194ff 280216a2 ?7...""N.!..(... + 4021ee20 00c00200 6612040c 22224e00 220e0026 ....f...""N."..& + 4021ee30 1202c654 0085eeff 222c1342 2c0132a0 ...T....",.B,.2. + 4021ee40 00202dc0 c527fe31 4a8dc020 00f22300 . -..'.1J.. ..#. + 4021ee50 32a12c27 33028649 00216bc7 c0200028 2.,'3..I.!k.. .( + 4021ee60 02076204 0c124600 000c0222 4ce1220c ..b...F...."L.". + 4021ee70 e166121b 3165c77c e2c02000 42230020 .f..1e.|.. .B#. + 4021ee80 2410c020 00226300 5c020160 c7c00000 $.. ."c.\..`.... + 4021ee90 45b3010c 12015ad5 c000000c 220174dd E.....Z.....".t. + 4021eea0 c0000045 e4ff222c 13481c20 2dc00c03 ...E..",.H. -... + 4021eeb0 0521fedd 02212e8d 481cc020 0028020c .!...!..H.. .(.. + 4021eec0 03f022c0 c51ffe32 aed4fd02 3add01f4 .."....2....:... + 4021eed0 98c00000 32a3e83a 3fd73302 46540038 ....2..:?.3.FT.8 + 4021eee0 cc0c04f0 2dc04753 048523fe 0c8438cc ....-.GS..#...8. + 4021eef0 1763041c 02204420 0c422023 10202420 .c... D .B #. $ + 4021ef00 30330445 36fe38cc 2176d042 a4002023 03.E6.8.!v.B.. # + 4021ef10 10471214 07631131 e9fe21e9 fe42a124 .G...c.1..!..B.$ + 4021ef20 01d1d5c0 000006ff ff321c18 210fe520 .........2..!.. + 4021ef30 231032a6 00303220 22ae3f20 2310225c #.2..02 ".? #."\ + 4021ef40 1821fac7 c0200022 2200226c 0721088d .!... .""."l.!.. + 4021ef50 c0200022 2200298c 210b8dc0 20002802 . ."".).!... .(. + 4021ef60 299c0c22 224ce00c 220114fc c0000020 )..""L.."...... + 4021ef70 2074224c e056b210 0c22c54c fec64000 t"L.V...".L..@. + 4021ef80 01c998c0 0000c62d 00262202 062d0022 .......-.&"..-." + 4021ef90 2c1320dd c021f68c c02000f8 023c22d7 ,. ..!... ...<". + 4021efa0 3202c626 000c1201 16d5c000 000c8201 2..&............ + 4021efb0 30ddc000 000c0201 12d5c000 0021ec8c 0............!.. + 4021efc0 d2cdcec0 20002802 f0f2c021 f9fb202f .... .(....!.. / + 4021efd0 80d7b25c 2160ff01 f993c000 0032a3e8 ...\!`.......2.. + 4021efe0 f02dc001 ba8bc000 003d0221 5aff0c04 .-.......=.!Z... + 4021eff0 0c1501f1 93c00000 38cc2139 d042a400 ........8.!9.B.. + 4021f000 20231047 12150763 1231acfe 21adfe42 #.G...c.1..!..B + 4021f010 a25b0194 d5c00000 06ffff00 321c1821 .[..........2..! + 4021f020 d2e42033 1022a600 20232022 5c188614 .. 3.".. # "\... + 4021f030 00c59cff 46020000 004585ff dd0256a2 ....F....E....V. + 4021f040 d70589ff 0c032d03 01defbc0 00000194 ......-......... + 4021f050 98c00000 219f9331 c8d54202 0021c98c ....!..1..B..!.. + 4021f060 c0200028 028c4422 c2508600 0022d205 . .(..D".P...".. + 4021f070 0871c861 d851e841 f831c020 00290312 .q.a.Q.A.1. .).. + 4021f080 c1200df0 220e0066 12b9220c e056f206 . .."..f.."..V.. + 4021f090 21a7c732 2c01c020 00422200 222c0720 !..2,.. .B".",. + 4021f0a0 24c04507 fe31b28c c0200048 03388c40 $.E..1... .H.8.@ + 4021f0b0 33c02a23 383c4119 c72a3339 3c38042a 3.*#8....!...7.. + 4021f2d0 15f25200 4d052d0e 3d0f0137 93c00000 ..R.M.-.=..7.... + 4021f2e0 2d0f4608 00013593 c0000031 d0ff22a0 -.F...5....1..". + 4021f2f0 1952a001 22530050 45202d0e 1c93012e .R.."S.PE -..... + 4021f300 93c00000 22a06485 8a01d24c e2320ce2 ....".d....L.2.. + 4021f310 21cbff01 4e8bc000 00860000 d24ce321 !...N........L.! + 4021f320 c8ff014a 8bc00000 0871c861 d851e841 ...J.....q.a.Q.A + 4021f330 f83112c1 200df000 2155fd42 02e43d02 .1.. ...!U.B..=. + 4021f340 0c026614 022203e2 0df00000 3150fd22 ..f.."......1P." + 4021f350 43e50df0 214efd22 02e50df0 314cfd22 C...!N."....1L." + 4021f360 43400df0 214afd22 02400df0 0df00000 C@..!J.".@...... + 4021f370 0df00000 1cdefe3f 12c1f0c9 21d911c1 .......?....!... + 4021f380 fdffd142 fd09310c 02224d34 2d0c010b ...B..1.."M4-... + 4021f390 93c00000 28cdd7e2 13c58e03 ccd20c15 ....(........... + 4021f3a0 0c0432a1 f42d0c01 0493c000 000831c8 ..2..-........1. + 4021f3b0 21d81112 c1100df0 bafd2240 bcddfe3f !........."@...? + 4021f3c0 12c1f0c2 6102c131 fdd26101 0931e261 ....a..1..a..1.a + 4021f3d0 0020d074 28ccd762 02462b00 8549ff8c . .t(..b.F+..I.. + 4021f3e0 12c541ff 2d0d0592 03ed0216 b209321c ..A.-.........2. + 4021f3f0 1821e9e6 20232022 5c1821de ff01ef92 .!.. # "\.!..... + 4021f400 c0000048 cc320ce2 21ecff40 4924010f ...H.2..!..@I$.. + 4021f410 8bc00000 38cc2132 cf204310 ccc4321c ....8.!2. C...2. + 4021f420 18302220 225c18c6 07000000 21effd27 .0" "\......!..' + 4021f430 14170763 1431a1fd 21a2fd42 a3a10189 ...c.1..!..B.... + 4021f440 d4c00000 06ffff00 00000c03 2d0301dc ............-... + 4021f450 fac00000 221e100c 64225c25 21d8ff32 ...."...d"\%!..2 + 4021f460 ce1ad24c 4301eb86 c0000032 1c180c12 ...LC......2.... + 4021f470 20232022 5c1821be 8bc02000 2802292c # "\.!... .(.), + 4021f480 0c02293c c5770105 7a010831 c821d811 ..)<.w..z..1.!.. + 4021f490 e80112c1 100df000 21fdfc38 f21b4349 ........!..8..CI + 4021f4a0 f2cc342b 3332620f 0df00000 30defe3f ..4+32b.....0..? + 4021f4b0 21ffff12 c1f00931 01c192c0 00000831 !......1.......1 + 4021f4c0 12c1100d f0000000 3164aa21 f8ff12c1 ........1d.!.... + 4021f4d0 f00c150c 04093101 b892c000 00083112 ......1.......1. + 4021f4e0 c1100df0 12c1f0c9 21c1e8fc 09310c02 ........!....1.. + 4021f4f0 224c3ac5 fbff0831 0c0229fc c82112c1 "L:....1..)..!.. + 4021f500 100df000 12c1f021 e1fc0931 32a00132 .......!...12..2 + 4021f510 423ac5f9 ff05fbff 083112c1 100df000 B:.......1...... + 4021f520 31dbfc2c 02421318 20242022 53180df0 1..,.B.. $ "S... + 4021f530 98eb2140 c4090000 28230000 08fc2140 ..!@....(#....!@ + 4021f540 3cfb2140 acf92140 60fa2140 d0e92140 <.!@..!@`.!@..!@ + 4021f550 c8e82140 04032240 288efe3f 38fd2140 ..!@.."@(..?8.!@ + 4021f560 12c1f0c9 21c1c9fc 0931d911 e901321c ....!....1....2. + 4021f570 180c4220 23207ce4 4022107c d3303210 ..B # |.@".|.02. + 4021f580 0c822023 20225c18 31eaff21 f2fd0c2d .. # "\.1..!...- + 4021f590 0c04d24c e0018793 c000000c 02224ce1 ...L........."L. + 4021f5a0 224ce322 4ce5224c 3221e2ff 421c1822 "L."L."L2!..B.." + 4021f5b0 5c140c33 217dfa32 4c4032af df304410 \..3!}.2L@2..0D. + 4021f5c0 226c1331 d3a421dc ff303410 226c1421 "l.1..!..04."l.! + 4021f5d0 dbffd24c e20c1e0c 0d325c18 0c53e24c ...L.....2\..S.L + 4021f5e0 e4d9fcd2 4c3a4570 0121d5ff 0c63c56f ....L:Ep.!...c.o + 4021f5f0 0131d4ff 21b7fcd0 4d20016e 93c00000 .1..!...M .n.... + 4021f600 31d2ff21 b2fc4d0d 016b93c0 000031cf 1..!..M..k....1. + 4021f610 ff21eefc 4d0d0167 93c00000 31cdff21 .!..M..g....1..! + 4021f620 55ff4d0d 016493c0 000031ca ff219fff U.M..d....1..!.. + 4021f630 4d0d0160 93c00000 41c8ff21 c8ff0c35 M..`....A..!...5 + 4021f640 32a01401 b4d2c000 000561ff e24c3585 2.........a..L5. + 4021f650 d2ff0831 c821d811 e80112c1 100df000 ...1.!.......... + 4021f660 0c080000 00800100 f7ffff03 12c1b0e2 ................ + 4021f670 611020e0 740c02d2 61110261 13c26112 a. .t...a..a..a. + 4021f680 f9f130d0 74294127 1d393180 fc220337 ..0.t)A'.91..".7 + 4021f690 8c520c24 0c020604 00220338 0c04cc62 .R.$.....".8...b + 4021f6a0 28c3f762 0e42a002 0c12e042 93424339 (..b.B.....B.BC9 + 4021f6b0 86500000 0c122243 368c4e22 43378600 .P...."C6.N"C7.. + 4021f6c0 00224338 42a00032 a01822c1 10c59ee6 ."C8B..2.."..... + 4021f6d0 20c220dc 1241e2ff 31f9fc21 f9fc01e1 . ..A..1..!.... + 4021f6e0 d3c00000 06ffff00 28121c83 f8122d0f ........(.....-. + 4021f6f0 015399c0 00001c82 225c0a0c 02225c0b .S......"\..."\. + 4021f700 281c311c 8bc02000 48023034 20c02000 (.1... .H.04 . . + 4021f710 3902c020 00480231 188b3034 20c02000 9.. .H.1..04 . . + 4021f720 3902c020 00480231 158b3034 10c02000 9.. .H.1..04.. . + 4021f730 3902c020 00480231 128b3044 1031c9ff 9.. .H.1..0D.1.. + 4021f740 303420c0 20003902 21078988 420c0289 04 . .9.!...B... + 4021f750 8105c600 711aff88 816d020c 054c843d ....q....m...L.= + 4021f760 0c2d0879 01c502e3 21028b48 9cc02000 .-.y....!..H.. . + 4021f770 28023814 296421fd 8a580420 23107c03 (.8.)d!..X. #.|. + 4021f780 3032100c 62202320 31b8ff29 14502641 02..b # 1..).P&A + 4021f790 303210a0 33115020 54302220 313cfc29 02..3.P T0" 1<.) + 4021f7a0 04320343 7cd53030 04f03311 50221030 .2.C|.00..3.P".0 + 4021f7b0 22202904 0c02297c 271d3427 1e13320f " )...)|'.4'..2. + 4021f7c0 011c0220 2320224f 01289c2c 033942c6 ... # "O.(.,.9B. + 4021f7d0 00004c02 2944d17d fcd02d20 01f891c0 ..L.)D.}..- .... + 4021f7e0 00000c15 0c043c73 2d0d01f3 91c00000 ......o.."O... + 402201d0 ff3188ff 520f00e1 d7fe9ce5 2203001b .1..R......."... + 402201e0 22202074 224300b6 22460c02 22430021 " t"C.."F.."C.! + 402201f0 82ff32a5 14325200 460d0000 22430022 ..2..2R.F..."C." + 40220200 0e00317e ffac3222 03001b22 20207422 ..1~..2"..." t" + 40220210 43009cb2 22a00022 43004261 0205a7fe C...".."C.Ba.... + 40220220 3176ff48 21225300 46010000 0c022243 1v.H!"S.F....."C + 40220230 000c0222 4f00224e 000c02ec 64220ce5 ..."O."N....d".. + 40220240 dc42320d 03220c42 2023c10c f327a30f .B2..".B #...'.. + 40220250 0c02224c 42c60100 320c4086 f9ff0000 .."LB...2.@..... + 40220260 220c421b 22224c42 28cc2029 24264221 ".B.""LB(. )$&B! + 40220270 f6520826 12672622 50461c00 266275b6 .R.&.g&"PF..&bu. + 40220280 723856f4 0645c6ff 16920645 9c00c618 r8V..E.....E.... + 40220290 00001664 008557ff 46160000 28ccc7e2 ...d..W.F...(... + 402202a0 138585ff 46130000 00220c33 32a0fb22 ....F....".32.." + 402202b0 c2fc3782 3f0590fe 460e0016 a4fe2183 ..7.?...F.....!. + 402202c0 f9013e8f c00000c6 0200ac74 0c032d03 ..>........t..-. + 402202d0 013cf7c0 000028cc c7e2b986 05009c34 .<....(........4 + 402202e0 28ccc7e2 af220c37 5692fa86 01008c34 (....".7V......4 + 402202f0 0c1245c9 ff08b1c8 a1d891e8 81f87112 ..E...........q. + 40220300 c1300df0 12c1f0c9 21c160f9 02610322 .0......!.`..a." + 40220310 0c3a6612 328519ff 28fcec32 28ccd762 .:f.2...(..2(..b + 40220320 04220ce2 cc820c03 2d030534 ff060100 ."......-..4.... + 40220330 0c1245c5 ff220c3a 66120cc5 18ff8601 ..E..".:f....... + 40220340 000c0229 fc06fbff 0831c821 12c1100d ...).....1.!.... + 40220350 f0000000 12c1f002 610305a9 02f62202 ........a.....". + 40220360 c505ff02 210312c1 10800000 78defe3f ....!.......x..? + 40220370 12c1f0c2 610220c2 2021fa85 02610322 ....a. . !...a." + 40220380 d2012202 f8dc3231 f9ffc02c 112a230c .."...21...,.*#. + 40220390 0332420d 32420e2d 0cc55503 c03c2042 .2B.2B.-..U..< B + 402203a0 a00022a0 0185e802 0831c821 12c1100d .."......1.!.... + 402203b0 f0000000 31eeff20 2074c022 112a230d ....1.. t.".*#. + 402203c0 f0000000 20207451 e9ffc022 112a2539 .... tQ...".*%9 + 402203d0 2242420c 0df00000 98defe3f 12c1e0d9 "BB........?.... + 402203e0 51f93120 d074fd04 41e1ffc9 61c0cd11 Q.1 .t..A...a... + 402203f0 4acc2d0c 0c640971 e94150e0 74010583 J.-..d.q.AP.t... + 40220400 c0000041 f5ff0c12 32040000 1d400022 ...A....2....@." + 40220410 a1302220 f92ce24c 0c202074 22440045 .0" .,.L. t"D.E + 40220420 d4f40871 202074c8 61d851e8 41f83112 ...q t.a.Q.A.1. + 40220430 c1200df0 31e9ff32 03000002 40302091 . ..1..2....@0 . + 40220440 2020040d f0000000 12c1f0c9 21c1e2ff ..........!... + 40220450 0931420c 00202074 2754107c e3001240 .1B.. t'T.|...@ + 40220460 30338130 3410324c 00c58702 220c0045 03.04.2L...."..E + 40220470 cff40221 03202074 c2210212 c1108000 ...!. t.!...... + 40220480 00000000 20207441 b9ffc032 113a2458 .... tA...2.:$X + 40220490 220c0226 15093a34 32030c0c 14302483 "..&..:42....0$. + 402204a0 0df00000 31b2ff20 2074c022 112a2322 ....1.. t.".*#" + 402204b0 020d0df0 31aeff20 2074c022 112a2322 ....1.. t.".*#" + 402204c0 020e0df0 20207441 a9ffc022 112a2432 .... tA...".*$2 + 402204d0 420d0df0 20207441 a5ffc022 112a2432 B... tA...".*$2 + 402204e0 420e0df0 31a2ff20 2074c022 112a2322 B...1.. t.".*#" + 402204f0 020c0df0 76fe2240 6cfe2240 80fe2240 ....v."@l."@.."@ + 40220500 488efe3f 54032240 12c1e0c9 61d951e9 H..?T."@....a.Q. + 40220510 41f93109 71303074 fd04dd05 20c07460 A.1.q00t.... .t` + 40220520 e0746623 1a21f3ff 3d0c01c8 86c00000 .tf#.!..=....... + 40220530 218fffc0 cc11cac2 d92ce24c 0c061500 !........,.L.... + 40220540 66132d21 edffc03c 2001c086 c00000f0 f.-!...< ....... + 40220550 3f20c02c 2045ad02 5d0e4d0d 3d0f2d0c ? ., E..].M.=.-. + 40220560 85e7ff66 1202853c 032d0c45 e0ffc608 ...f...<.-.E.... + 40220570 0021e2ff 3d0c01b5 86c00000 0c042d04 .!..=.........-. + 40220580 3d0cc5ca 022d0c05 ecffcc72 014393c0 =....-.....r.C.. + 40220590 00000594 ffc1daff 2d0c0188 8ec00000 ........-....... + 402205a0 21718522 d2012202 de56a203 31d6ff42 !q.".."..V..1..B + 402205b0 a0002d0c 01808fc0 00000583 02dd0296 ..-............. + 402205c0 02012020 74c5ebff 8c722183 ff220200 .. t....r!..".. + 402205d0 17620d2d 0c01798e c0000045 2eff4601 .b.-..y....E..F. + 402205e0 00d02d20 85ddfe02 2107c221 06d851e8 ..- ....!..!..Q. + 402205f0 41f83112 c1200df0 64fe2240 12c1d0d2 A.1.. ..d."@.... + 40220600 6109e261 08f97109 b1c9a130 e0748d04 a..a..q....0.t.. + 40220610 20d07450 407460f0 f4161e04 3d085d0f .tP@t`.....=.]. + 40220620 2d0d7901 455802cd 0221f3ff 3d0f0187 -.y.EX...!..=... + 40220630 86c00000 7801acbc 314dffc0 2d112a23 ....x...1M..-.*# + 40220640 f2020c72 6c170116 93c00000 4d0f0c03 ...rl.......M... + 40220650 2d0c452d 02011393 c0000086 01003d08 -.E-..........=. + 40220660 2d0d4563 02313f85 0c1c22d3 0542221f -.Ec.1?..."..B". + 40220670 16f400c2 22200c04 22ccfe0c 1c20c493 ...." ..".... .. + 40220680 c0c074f1 9fff3901 2d0f014c 8ec00000 ..t...9.-..L.... + 40220690 380116ec 0322d301 2202defc 52c57402 8....".."...R.t. + 402206a0 96020120 2074c5dd ff8c7221 4bff2202 ... t....r!K.". + 402206b0 00176210 2d0f0141 8ec00000 0520ff46 ..b.-..A..... .F + 402206c0 04000000 0031e4a5 0c150c04 2d0f013a .....1......-..: + 402206d0 8ec00000 661d1f01 f292c000 0021bc89 ....f........!.. + 402206e0 3202008c 3e1b33c6 00008c33 0b333242 2...>.3....3.32B + 402206f0 0001ec92 c0000008 b1c8a1d8 91e881f8 ................ + 40220700 7112c130 0df00000 5cfe2240 56fe2240 q..0....\."@V."@ + 40220710 4efe2240 12c1f0c2 61020261 034040f4 N."@....a..a.@@. + 40220720 50c52020 20746624 1f8ca54d 033d020c P. tf$...M.=.. + 40220730 22c5af02 86000085 c3ff21f3 ff3d0c01 ".........!..=.. + 40220740 4386c000 00060900 00661414 30432020 C........f..0C + 40220750 322022a0 0285ad02 21edff06 02000000 2 ".....!....... + 40220760 00c5c0ff 21ebff01 3986c000 000831c8 ....!...9.....1. + 40220770 2112c110 0df00000 12c1e0c9 61d95130 !...........a.Q0 + 40220780 c07420d0 7431f9fe c02d1109 71606074 .t .t1...-..q``t + 40220790 40407482 01202a23 b66605c2 420d8604 @@t.. *#.f..B... + 402207a0 00cccc0c 0332420d 32420e46 01000000 .....2B.2B.F.... + 402207b0 00c2420e 826100d0 3d202d0c 05c4023d ..B..a..= -....= + 402207c0 0c2d0d05 10030871 c861d851 12c1200d .-.....q.a.Q.. . + 402207d0 f0000000 12c1e030 83203201 20606074 .......0. 2. ``t + 402207e0 32610020 32202d08 097185af 02087112 2a. 2 -..q....q. + 402207f0 c1200df0 12c1f020 20740261 0345b702 . ..... t.a.E.. + 40220800 02210312 c1108000 00000000 12c1f020 .!............. + 40220810 20740261 03c55302 20322022 a01f8c73 t.a..S. 2 "...s + 40220820 22030322 c2a02020 74083112 c1100df0 "..".. t.1..... + 40220830 5c80fe3f 21ffff0c 13324200 0df00000 \..?!....2B..... + 40220840 12c1f021 30960931 22024607 e2070c02 ...!0..1".F..... + 40220850 10112045 73ff0831 12c1100d f0000000 .. Es..1........ + 40220860 a087fe3f 12c1d0c9 a1d99139 0109b1e9 ...?.......9.... + 40220870 81f97140 25c00cb3 dd0560c6 20272305 ..q@%.....`. '#. + 40220880 0c22862c 0000cbe4 0c02f2a0 dde03dc0 .".,..........=. + 40220890 e6230246 2800420e 011b6437 a6e1320e .#.F(.B...d7..2. + 402208a0 00263350 f7136556 2308662c 7f31ad84 .&3P..eV#.f,.1.. + 402208b0 22d30222 02b5ccf2 31ab8442 0e012223 ".."....1..B.."# + 402208c0 86479217 86060000 0028010c 6432c210 .G.......(..d2.. + 402208d0 213d9901 d284c000 0016b2fd 0c028615 !=.............. + 402208e0 00002139 892b3e01 cd84c000 0056b2fe ..!9.+>......V.. + 402208f0 0c12c60d 00661c34 01af8dc0 0000320e .....f.4......2. + 40220900 02220206 2793d446 f9ff0000 00661c1c ."..'..F.....f.. + 40220910 b634dc31 d3ff0c34 2b2e01c0 84c00000 .4.1...4+....... + 40220920 0c030c14 20349330 20748602 00320e01 .... 4.0 t...2.. + 40220930 2b333aee 46d5ff00 08b1c8a1 d891e881 +3:.F........... + 40220940 f87112c1 300df000 14090060 b38efe3f .q..0......`...? + 40220950 6c80fe3f e4501040 12c1f021 fbff0931 l..?.P.@...!...1 + 40220960 32a073c0 20003902 21f9ff0c 03324200 2.s. .9.!....2B. + 40220970 21f8ff22 220001f7 ffc00000 083112c1 !..""........1.. + 40220980 100df000 cc3c1040 b4501040 21feff12 .....<.@.P.@!... + 40220990 c1f00931 01fdffc0 000021ed ff280201 ...1......!..(.. + 402209a0 edffc000 00083112 c1100df0 21e8ff0c ......1.....!... + 402209b0 03324200 21e5ff32 a073c020 0039020d .2B.!..2.s. .9.. + 402209c0 f0000000 801d2c04 12c1f021 dfff0931 ......,....!...1 + 402209d0 32a073c0 20003902 21ddff0c 03324200 2.s. .9.!....2B. + 402209e0 21f9ff01 dcffc000 00083112 c1100df0 !.........1..... + 402209f0 21e5ff12 c1f00931 01e4ffc0 000021d4 !......1......!. + 40220a00 ff280201 d4ffc000 0021d0ff 0c033242 .(.......!....2B + 40220a10 00083121 cdff32a0 73c02000 390212c1 ..1!..2.s. .9... + 40220a20 100df000 e4defe3f 31ffff0c 62420305 .......?1...bB.. + 40220a30 cc944203 00220302 2a242020 740df000 ..B.."..*$ t... + 40220a40 21f9ff42 02053d02 0c52cce4 38a30c02 !..B..=..R..8... + 40220a50 8c831b22 20207438 23c6fcff 0df00000 ..." t8#....... + 40220a60 4491fe3f 21ffff12 c1f00931 01548dc0 D..?!......1.T.. + 40220a70 00000831 12c1100d f0000000 a88efe3f ...1...........? + 40220a80 b9fe2240 abfe2240 6880fe3f ac8efe3f .."@.."@h..?...? + 40220a90 6480fe3f 12c1d0d2 6109d1f1 ff02610b d..?....a.....a. + 40220aa0 d02d20c9 a1e981f9 7101448d c0000045 .- .....q.D....E + 40220ab0 76fe8cb2 21e6f40c 13324200 06040000 v...!....2B..... + 40220ac0 0005d2fd 56c2fe32 a0013023 20458af7 ....V..2..0# E.. + 40220ad0 21d5ffc2 02003202 023accc0 c07405f6 !.....2..:...t.. + 40220ae0 ffdd0241 e6fff156 93b62c0b b622080c ...A...V..,..".. + 40220af0 02224400 c60f0000 e2040032 1f001bee ."D........2.... + 40220b00 e0e074e2 440022a3 e8490101 4384c000 ..t.D."..I..C... + 40220b10 00480127 2e200c02 224400f6 2c0a21d8 .H.'. .."D..,.!. + 40220b20 ff3d0c01 4a85c000 00f62d0a 21d6ff3d .=..J.....-.!..= + 40220b30 0d014685 c0000045 81f731d3 ffc1d3ff ..F....E..1..... + 40220b40 2b222022 21224300 e80c21d1 ff1bee32 +" "!"C...!....2 + 40220b50 1f002802 e90c01dd 84c00000 273e1e0c ..(.........'>.. + 40220b60 02290c05 6bfe8cb2 21b8f40c 13324200 .)..k...!....2B. + 40220b70 86020000 00c5c6fd 56c2fe45 f2f8321f ........V..E..2. + 40220b80 0021b7ff 52a00142 a000010b 8dc00000 .!..R..B........ + 40220b90 08b1c8a1 d891e881 f87112c1 300df000 .........q..0... + 40220ba0 12c1f009 31c5eeff 083112c1 100df000 ....1....1...... + 40220bb0 12c1f0e9 0120e0f4 21b5ff09 31c921d9 ..... ..!...1.!. + 40220bc0 110c0cc2 6200d1a6 ff21acff c24200d0 ....b....!...B.. + 40220bd0 2d2001fa 8cc00000 211a934d 0ce25200 - ......!..M..R. + 40220be0 3d0e2d0d 0c1501f4 8cc00000 0831c821 =.-..........1.! + 40220bf0 d811e801 12c1100d f0000000 a68efe3f ...............? + 40220c00 5891fe3f 12c1f021 fdff0931 32020066 X..?...!...12..f + 40220c10 130532a0 00324200 21faff01 e88cc000 ..2..2B.!....... + 40220c20 00083112 c1100df0 12c1f021 f4ff0931 ..1........!...1 + 40220c30 0c133242 0021f0fc 0c153212 0021f0ff ..2B.!....2..!.. + 40220c40 0c0401dd 8cc00000 083112c1 100df000 .........1...... + 40220c50 21ebff12 c1f00931 32020021 76f98c43 !......12..!v..C + 40220c60 32020066 13070c03 324200c5 fbff0831 2..f....2B.....1 + 40220c70 12c1100d f0000000 c7fe2240 12c1f0c9 .........."@.... + 40220c80 21cd0221 adca0931 48021624 04380c21 !..!...1H..$.8.! + 40220c90 598e2703 0f281c0c c377e224 205064e6 Y.'..(...w.$ Pd. + 40220ca0 851ee7f2 1b220c0c 32a08020 20348cf2 ....."..2.. 4.. + 40220cb0 321c180b 333033a0 f0331132 c33c3030 2...303..3.2.<00 + 40220cc0 f4220c00 22c2a022 4c00c02c 20c00400 ."..".."L.., ... + 40220cd0 31eaff2d 0c42a173 010c82c0 00000831 1..-.B.s.......1 + 40220ce0 c82112c1 100df000 b88efe3f 51ffff0c .!.........?Q... + 40220cf0 14303074 72254e00 13400064 a18d022d .00tr%N..@.d...- + 40220d00 0467870d 60672050 33a06265 4e82634f .g..`g P3.beN.cO + 40220d10 0c020df0 41f5ff20 30745224 4e0c1200 ....A.. 0tR$N... + 40220d20 13400062 a1570614 7cf26062 3032c34c .@.b.W..|.`b02.L + 40220d30 50561040 33a00c02 52644e29 330df000 PV.@3...RdN)3... + 40220d40 50500040 f4511040 12c1f0c9 21cd0238 PP.@.Q.@....!..8 + 40220d50 4c281209 31391238 9c380347 e309421c L(..19.8.8.G..B. + 40220d60 06382c86 08000000 321c0632 c3ff3030 .8,.....2..2..00 + 40220d70 f401f3ff c0000032 a0003262 02421c06 .......2..2b.B.. + 40220d80 3d020b44 281c4040 f401eeff c000002d =..D(.@@.......- + 40220d90 0c0c83c5 71010831 c82112c1 100df000 ....q..1.!...... + 40220da0 b0defe3f 21ffff22 020b0df0 12c1e0c9 ...?!.."........ + 40220db0 6109713d 02c1faff eca2229c 00cc4222 a.q=......"...B" + 40220dc0 0c0b2612 43222c04 31778c37 920f22a0 ..&.C",.1w.7..". + 40220dd0 008567e5 222c0448 3c0c03c6 0700483c ..g.",.H<.....H< + 40220de0 0c030608 0000222c 04416e8c 47921422 ......",.An.G.." + 40220df0 a0003261 004565e5 284c483c 38012802 ..2a.Ee.(LH<8.(. + 40220e00 86000000 483cc004 000871c8 6112c120 ....H<....q.a.. + 40220e10 0df00000 41e3ff0c 05525400 5254010c ....A....RT.RT.. + 40220e20 0559140c 1552440a 29343944 0df00000 .Y...RD.)49D.... + 40220e30 98fe2240 12c1d0c9 a1d991e9 81f97109 .."@..........q. + 40220e40 b1fd0322 6100015b 8cc00000 c1d5ff4d ..."a..[.......M + 40220e50 020c0222 4c0a5801 d1468ce1 478c5625 ..."L.X..F..G.V% + 40220e60 12214083 38423203 d2665302 06450022 .!@.8B2..fS..E." + 40220e70 d2023202 14663308 2202008c 82c64000 ..2..f3.".....@. + 40220e80 00261302 063f0022 9c001632 080c0222 .&...?."...2..." + 40220e90 4c0b213a 8c0c0362 0200325c 04513c8c L.!:...b..2\.Q<. + 40220ea0 f12e898c 16324200 229c0122 5f002255 .....2B.".."_."U + 40220eb0 00529f00 22aec027 a502225f 00229f00 .R.."..'.."_.".. + 40220ec0 a6120522 a000225f 0022a000 224d0032 ...".."_.".."M.2 + 40220ed0 9f0021d7 ff426100 015d84c0 00004221 ..!..Ba..]....B! + 40220ee0 00329f00 22040605 52f50c13 412c8c32 .2.."...R...A,.2 + 40220ef0 4d00229f 00c02000 3804225e 003030f4 M."... .8."^.00. + 40220f00 00221120 2320c020 00290406 27000000 .". # . .)..'... + 40220f10 00221c04 22c20100 22112020 31225c04 .".."...". 1"\. + 40220f20 66122821 168c52a0 01524200 22a00022 f.(!..R..RB.".." + 40220f30 4d002204 060c0359 01c54cf5 58010c02 M."....Y..L.X... + 40220f40 225e0052 4d00524c 0b060a00 66223421 "^.RM.RL....f"4! + 40220f50 0b8c32a0 02324200 22a00022 4d002204 ..2..2B.".."M.". + 40220f60 0632af38 054af522 af38225e 000c1222 .2.8.J.".8"^..." + 40220f70 4d00224c 0b584c48 3c0c332d 0f059ae5 M."L.XLH<.3-.... + 40220f80 c6090000 22a00022 4c0b22a0 00225c04 ....".."L.".."\. + 40220f90 c1f28822 4d00329c 00220406 8546f522 ..."M.2.."...F." + 40220fa0 1c00225e 0022a001 224d0008 b1c8a1d8 .."^.".."M...... + 40220fb0 91e881f8 7112c130 0df00000 12c1f0c9 ....q..0........ + 40220fc0 21c177ff 0931320c 0a002211 20203166 !.w..12...". 1f + 40220fd0 131d321c 00481c1b 33003311 3030314a ..2..H..3.3.001J + 40220fe0 22325c00 226c0101 0c83c000 00225c01 "2\."l......."\. + 40220ff0 0831c821 12c1100d f0000000 0180ffff .1.!............ + 40221000 688efe3f 668efe3f 648efe3f 8afe2240 h..?f..?d..?.."@ + 40221010 9cdefe3f 34082240 12c1e0d9 519d0309 ...?4."@....Q... + 40221020 713d04c9 614d05e9 415d06f9 315c06d2 q=..aM..A]..1\.. + 40221030 920c6797 0b61cd8b 62060016 66088603 ..g..a..b...f... + 40221040 0066e70b 6157ff62 060a6616 02c69900 .f..aW.b..f..... + 40221050 81c5820c 1a62d802 c206140c 060bbcb0 .....b.......... + 40221060 6a837cda a0ac1060 6074661a 11822804 j.|....``tf...(. + 40221070 a208d282 a0fb808a 10261848 56560468 .........&.HVV.h + 40221080 09d7f604 72c7b0fc a70c1685 7dff2612 ....r.......}.&. + 40221090 02068700 21daff2a 2d164221 21bb8b41 ....!..*-.B!!..A + 402210a0 c38b3212 001b3330 30f43252 0028042a ..2...300.2R.(.* + 402210b0 2d290401 d982c000 0031b68b 22530086 -).......1.."S.. + 402210c0 7b000000 00610382 679d0246 77006134 {....a..g..Fw.a4 + 402210d0 ff62060a 66161462 a0018578 ff261202 .b..f..b...x.&.. + 402210e0 0672002d 0d45edff 06700000 0c264577 .r.-.E...p...&Ew + 402210f0 ff261202 066d0001 af8bc000 00c1c0ff .&...m.......... + 40221100 e1c1ff32 1c00fd02 221e001b 33202d80 ...2...."...3 -. + 40221110 00331100 22113030 31202031 325c0022 .3..".001 12\." + 40221120 5e0001bd 82c00000 d1c2fd00 221131b6 ^...........".1. + 40221130 ff202031 420d0022 530016e4 1631938b . 1B.."S....1.. + 40221140 41948b52 03006615 0a225400 0c022243 A..R..f.."T..."C + 40221150 00064100 318a8be1 888b6203 005d03f0 ..A.1.....b..].. + 40221160 321156b6 04529400 2a233b32 3b652023 2.V..R..*#;2;e # + 40221170 a35056a3 50522120 22212a25 329e0000 .PV.PR! "!*%2... + 40221180 22112020 31225400 3022c02c 8327a30b ". 1"T.0".,.'.. + 40221190 31728822 130022c2 28061600 32afd837 1r."..".(...2..7 + 402211a0 2202c62c 00316c88 22130022 c2d8c610 "..,.1l."..".... + 402211b0 000c0662 45005294 002a233b 323b6520 ...bE.R..*#;2;e + 402211c0 23a35056 a3505221 2022212a 25002211 #.PV.PR! "!*%.". + 402211d0 329e0020 20313032 c0225400 32c3285c 2.. 102."T.2.(\ + 402211e0 0437b474 2c83018c 82c00000 2022a031 .7.t,....... ".1 + 402211f0 5a88d022 11415888 22530052 940022ae Z..".AX."S.R..". + 40221200 c0cd0427 a502225c 00229c00 a6120522 ...'.."\."....." + 40221210 a000225c 0031568b 22a00022 4300329c .."\.1V.".."C.2. + 40221220 00217aff 018a83c0 0000329c 00220f06 .!z.......2..".. + 40221230 451df541 4f8b32a0 01324400 41588b22 E..AO.2..2D.AX." + 40221240 9c00c020 00322400 225e0030 30f40022 ... .2$."^.00.." + 40221250 11202320 c0200029 0422a000 3169ff22 . # . .)."..1i." + 40221260 4d0022a0 00225300 4167ff31 67ff2254 M.".."S.Ag.1g."T + 40221270 00225300 c5a0fd16 a200215a fb0c9339 ."S.......!Z...9 + 40221280 02c60900 00c162ff 2d0c014c 8bc00000 ......b.-..L.... + 40221290 3161ff0c 042d0c01 478cc000 000c150c 1a...-..G....... + 402212a0 0432a3e8 2d0c0144 8bc00000 0c02c603 .2..-..D........ + 402212b0 000c1286 02000000 61878167 1ded4685 ........a..g..F. + 402212c0 ff0871c8 61d851e8 41f83112 c1200df0 ..q.a.Q.A.1.. .. + 402212d0 12c1f009 31c921d9 11202074 f6822831 ....1.!.. t..(1 + 402212e0 82feb0c2 11ca2322 0227dd03 dc82cacd ......#".'...... + 402212f0 01ec8fc0 0000c86c 01eb8fc0 00008c6c .......l.......l + 40221300 222c0928 02877201 0c0c0831 2d0cd811 ",.(..r....1-... + 40221310 c82112c1 100df000 d08efe3f d08ffe3f .!.........?...? + 40221320 d88ffe3f e08ffe3f e88ffe3f f8110060 ...?...?...?...` + 40221330 020a0000 2490fe3f 6c162240 40082240 ....$..?l."@@."@ + 40221340 a00b2240 12c1f021 f4ff0931 c9210c83 .."@...!...1.!.. + 40221350 0c040b33 49022912 42420f30 307422c2 ...3I.).BB.00t". + 40221360 2056d3fe 2161fe0c 73324224 3242440c V..!a..s2B$2BD. + 40221370 23324214 0c333242 150c5332 42160c63 #2B..32B..S2B..c + 40221380 32421731 e6ff0c0c 32624731 e5ff0c14 2B.1....2bG1.... + 40221390 32624931 e4ff4242 2732624b 31e3ff42 2bI1..BB'2bK1..B + 402213a0 4247c902 32624dc9 1231e1ff c922c932 BG..2bM..1...".2 + 402213b0 c942c262 46c26248 c2624ac2 624c21db .B.bF.bH.bJ.bL!. + 402213c0 ffc02000 39024522 0141daff 21dbff2c .. .9.E".A..!.., + 402213d0 252c0301 50cbc000 0031d8ff 2109fec0 %,..P....1..!... + 402213e0 4c2001f4 8bc00000 21f9d131 a9fd4202 L ......!..1..B. + 402213f0 6a210690 c7140521 98a22024 82290331 j!.....!.. $.).1 + 40221400 d0ff2197 fd0c0401 eb8bc000 004568ff ..!..........Eh. + 40221410 0831c821 12c1100d f0000000 5d8efe3f .1.!........]..? + 40221420 383a1040 343c1040 12c1d021 fcffd991 8:.@4<.@...!.... + 40221430 e98109b1 c9a1f971 c20200d2 afff0c0e .......q........ + 40221440 0538fd56 22004509 fd2d0c05 abfe1662 .8.V".E..-.....b + 40221450 0e01938f c0000021 24fef802 01928fc0 .......!$....... + 40221460 00000c32 202f2032 a0ff3792 02c63100 ...2 / 2..7...1. + 40221470 311efe72 cc223027 b0f82216 9f0b7d02 1..r."0'.."...}. + 40221480 8b22e927 2937dd07 288f32cf 20291128 .".')7..(.2. ).( + 40221490 7fe98f39 01cc8228 9f280220 2104060f ...9...(.(. !... + 402214a0 00017f8f c0000028 9f387f48 12280232 .......(.8.H.(.2 + 402214b0 03764054 25202104 40403401 d9ffc000 .v@T% !.@@4..... + 402214c0 00292101 788fc000 00282166 820f283d .)!.x....(!f..(= + 402214d0 e98ff902 2801293d 46150000 0000489f ....(.)=F.....H. + 402214e0 20203458 04e03211 22afc320 25103022 4X..2.".. %.0" + 402214f0 20290401 6b8fc000 00289f31 fbfd2802 )..k....(.1..(. + 40221500 e98f2022 34b02211 2a232872 f902289f .. "4.".*#(r..(. + 40221510 28022022 34b02211 2a233801 39720161 (. "4.".*#8.9r.a + 40221520 8fc00000 289f2812 20242501 beffc000 ....(.(. $%..... + 40221530 00f81156 1ff5dd0c 1bccc0c0 7431b7ff ...V........t1.. + 40221540 22ccfe20 ce832203 00c71202 06bcff26 ".. .."........& + 40221550 0d0f1bdd d0d074d2 4300662d 040c0222 ......t.C.f-..." + 40221560 430008b1 c8a1d891 e881f871 12c1300d C..........q..0. + 40221570 f0000000 12c1f009 31c5eaff 083112c1 ........1....1.. + 40221580 100df000 00411040 2c3d1040 12c1f0c9 .....A.@,=.@.... + 40221590 210931d2 610120c0 74165c00 01418fc0 !.1.a. .t.\..A.. + 402215a0 00000c4d 01f8ffc0 000016c2 070bddd0 ...M............ + 402215b0 d07456ed fed1ccfd 380d3020 60302210 .tV.....8.0 `0". + 402215c0 20f24020 206022c2 1f3d0d26 023ab052 .@ `"..=.&.:.R + 402215d0 115a4348 64561405 1b42b044 114a4348 .ZCHdV...B.D.JCH + 402215e0 34565404 5a334203 249c1426 340f0c33 4VT.Z3B.$..&4..3 + 402215f0 37340c0c 13b66407 0c038600 00000c23 74....d........# + 40221600 01e2ffc0 000086eb ff286ddc b228eddc .........(m..(.. + 40221610 72222d46 dc22222d 48ccd227 1c170121 r"-F.""-H..'...! + 40221620 8fc00000 0c020603 00000c12 8c6c011d .............l.. + 40221630 8fc00000 0c120831 c821d811 12c1100d .......1.!...... + 40221640 f0000000 b28efe3f b58efe3f b48efe3f .......?...?...? + 40221650 3491fe3f 5c8efe3f 000000a0 6a8efe3f 4..?\..?....j..? + 40221660 18421040 5c3d1040 7c621040 12c1c0d9 .B.@\=.@|b.@.... + 40221670 d1d1f4ff c9e109f1 e2610cf2 610b20c2 .........a..a. . + 40221680 20220d00 66123401 068fc000 0021eeff "..f.4......!.. + 40221690 220200cc 6221adfc 0c033242 0021ebff "...b!....2B.!.. + 402216a0 220200cc a221a8fc 32a073c0 20003262 "....!..2.s. .2b + 402216b0 000c0222 4d0001fb 8ec00000 280c0c93 ..."M.......(... + 402216c0 37920286 2c012733 2b664202 062900f6 7...,.'3+fB..).. + 402216d0 4202c621 00665202 468e0026 8202865f B..!.fR.F..&..._ + 402216e0 0131dbff 22030822 c2ff2243 0885d3ff .1.."..".."C.... + 402216f0 065b0100 0066a202 4621010c c3273325 .[...f..F!...'3% + 40221700 66920246 14010cb3 37120246 540101e4 f..F....7..FT... + 40221710 8ec00000 31cfff28 0c2a2332 02000b33 ....1..(.*#2...3 + 40221720 32420086 27010cd3 37920286 28010ce3 2B..'...7...(... + 40221730 37120246 4a0101da 8ec00000 280c31c4 7..FJ.......(.1. + 40221740 ff2a2332 02000b33 32420001 d68ec000 .*#2...32B...... + 40221750 0001c3ff c0000046 41010000 0031bcff .......FA....1.. + 40221760 2a334203 000b4442 430001be ffc00000 *3B...DBC....... + 40221770 063b0100 01cb8ec0 0000280c 31b5ff0c .;........(.1... + 40221780 0c2a2332 0200c0dc 200b3332 420001c5 .*#2.... .32B... + 40221790 8ec00000 01c38ec0 00004153 fde2244a ..........AS..$J + 402217a0 fd048cfe 288e2264 4acc4221 defe2264 ....(."dJ.B!.."d + 402217b0 4b0c0559 8e01bb8e c0000016 1e12289e K..Y..........(. + 402217c0 0c175842 7cf85020 60502210 20f24020 ..XB|.P `P". .@ + 402217d0 206032c2 1f260330 222f4e37 521af023 `2..&.0"/N7R..# + 402217e0 a092224f 39215931 79418951 2d0ec009 .."O9!Y1yA.Q-... + 402217f0 00885178 41583138 21001340 0027a120 ..QxAX18!..@.'. + 40221800 28302055 1046efff 00389e28 03c7f234 (0 U.F...8.(...4 + 40221810 21d5800c 1622d201 5202de22 c5fe0c55 !...."..R.."...U + 40221820 20568361 8cff2813 32060020 24343a22 V.a..(.2.. $4:" + 40221830 20207422 46005732 0b0c0222 46000c03 t"F.W2..."F... + 40221840 0c12c5a3 fa389e58 03502641 37620c17 .....8.X.P&A7b.. + 40221850 e5093203 0f0c150b 3330c583 d7621028 ..2.....30...b.( + 40221860 0e32020c cc033942 4553070c 1dc60700 .2....9BES...... + 40221870 e7e20e87 f211f7e2 14577202 06c5ff46 .........Wr....F + 40221880 03000c4d 06020000 0c6d8600 00000c5d ...M.....m.....] + 40221890 289e2802 d7723d22 1e0b582e 22c2fc22 (.(..r="..X.".." + 402218a0 5e0bc020 002805c0 20006805 202cb422 ^.. .(.. .h. ,." + 402218b0 c2fc2020 b4403211 21b28220 26103022 .. .@2.!.. &.0" + 402218c0 20c02000 290521d3 8e320200 1643ec32 . .).!..2...C.2 + 402218d0 a0003242 003d0d2d 0e45bd00 06adff00 ..2B.=.-.E...... + 402218e0 661c0510 112005bb fd8531ff 22a001c5 f.... ....1."... + 402218f0 c9ffccb2 0542fe8c 62055ffe 8c128532 .....B..b._....2 + 40221900 ff219880 3872e7e3 02c6d400 28124525 .!..8r......(.E% + 40221910 e5c6d200 0001628e c0000031 4dff280c ......b....1M.(. + 40221920 2a233202 0032c3ff 32420001 5e8ec000 *#2..2..2B..^... + 40221930 00015b8e c0000021 ecfcd222 4c8cfd38 ..[....!..."L..8 + 40221940 8d32624c cc433178 fe32624d 0c02298d .2bL.C1x.2bM..). + 40221950 01558ec0 0000166d 30c84d28 1dcb4c49 .U.....m0.M(..LI + 40221960 12220c0c 0cc33032 10e147fc 39117c03 ."....02..G.9.|. + 40221970 30321022 0e003901 80220120 2831a612 02."..9..". (1.. + 40221980 0e492185 9cf62b22 20222122 4e004821 .I!...+" "!"N.H! + 40221990 780ce131 ff21eced e0e71027 07090c22 x..1.!.....'..." + 402219a0 0c03e023 83860100 0c220c13 e0239361 ...#....."...#.a + 402219b0 7d90ed02 5206df50 50045060 748c9631 }...R..PP.P`t..1 + 402219c0 27ff2213 001b2222 53002811 66821645 '."...""S.(.f..E + 402219d0 23ff4534 fe16420b 0551fe16 e20a8524 #.E4..B..Q.....$ + 402219e0 ff062a00 00003221 0156030a 220c0d82 ..*...2!.V.."... + 402219f0 a0182020 1432c2fd 1ce23028 93820c0c .. .2....0(.... + 40221a00 32a08c30 381092a0 889033c0 2b823028 2..08.....3.+.0( + 40221a10 8320f0f4 21f88a70 30b52707 04781c70 . ..!..p0.'..x.p + 40221a20 38f4f0f3 c0f2cffc 280182cc 24f0f0f4 8.......(...$... + 40221a30 faf866e2 349c665d 0872a080 6d0f3d0c ..f.4.f].r..m.=. + 40221a40 2d0d8951 055dff88 51661202 06400022 -..Q.]..Qf...@." + 40221a50 cc168951 4550fe88 51bc024d 0f3d082d ...QEP..Q..M.=.- + 40221a60 0d055afe 46090000 00003801 22c3b0dc ..Z.F.....8."... + 40221a70 a29c855c 076d0f5d 083d0cd0 2d208559 ...\.m.].=..- .Y + 40221a80 ff661202 06320042 a0504261 00662e02 .f...2.B.PBa.f.. + 40221a90 862700f2 cc163d0f 2d0e852b 01297d3d .'....=.-..+.)}= + 40221aa0 0c01f1fe c0000022 0c003b22 224c002d ......."..;""L.- + 40221ab0 0e059dfe 581156d5 0516a205 320c0d1c ....X.V.....2... + 40221ac0 84303014 22c3fd1c e3203493 420c0c22 .00.".... 4.B.." + 40221ad0 a08c2024 1052a088 5022c02b 43203483 .. $.R..P".+C 4. + 40221ae0 51c58a28 0c3040f4 2030b557 0204281c Q..(.0@. 0.W..(. + 40221af0 2038f440 33c032c3 fc680122 cc243030 8.@3.2..h.".$00 + 40221b00 f43a3226 b6043c04 47960b85 41fe8c52 .:2&..<.G...A..R + 40221b10 3d0f2d0e 4542fe22 0c0d6762 14220c10 =.-.EB."..gb.".. + 40221b20 0762082d 0ec598fe 86010000 e02e2045 .b.-.......... E + 40221b30 97fe222c 003184ed 37820246 300096e2 ..",.1..7..F0... + 40221b40 0b320c08 16630c22 af0b2023 8016d20b .2...c.".. #.... + 40221b50 2d0d451f ff0676ff 01d28dc0 0000280c -.E...v.......(. + 40221b60 31bcfe2a 23320200 0b333242 0001cd8d 1..*#2...32B.... + 40221b70 c00000c5 9afd8639 00281c05 10ff8637 .......9.(.....7 + 40221b80 0001c78d c0000031 b2fe280c 2a233202 .......1..(.*#2. + 40221b90 000b3332 4200220d 00661228 21abfe22 ..32B."..f.(!.." + 40221ba0 0200cc72 216afb32 a0003242 0021a7fe ...r!j.2..2B.!.. + 40221bb0 220200cc 922164fb 32a073c0 20003902 "....!d.2.s. .9. + 40221bc0 0c02224d 0001b78d c0000046 24000000 .."M.......F$... + 40221bd0 0001b38d c0000031 9efe280c 2a233202 .......1..(.*#2. + 40221be0 000b3332 420001af 8dc00000 21de7f22 ..32B.......!.." + 40221bf0 227a16a2 06281216 5206c002 00c61700 "z...(..R....... + 40221c00 41e98f32 04de6613 2306cdff 0000222d A..2..f.#....."- + 40221c10 0461d47f 42020022 26048044 0152a000 .a..B.."&..D.R.. + 40221c20 4048313d 0d45ede8 4641ff00 00318afe @H1=.E..FA...1.. + 40221c30 37820246 c6ff2197 8d220200 66120246 7..F..!.."..f..F + 40221c40 c3ff222d 0461c77f 42020022 26058044 .."-.a..B.."&..D + 40221c50 0152a000 4048313d 0d059de2 4634ff00 .R..@H1=....F4.. + 40221c60 08f1c8e1 d8d1e8c1 f8b112c1 400df000 ............@... + 40221c70 a487fe3f 3086fe3f a787fe3f 490b0000 ...?0..?...?I... + 40221c80 ff0ff8ff a48efe3f 7c8efe3f 283f1040 .......?|..?(?.@ + 40221c90 7c4c1040 f43f1040 12c1e0c9 610971d9 |L.@.?.@....a.q. + 40221ca0 51e941f9 314892cd 02381430 20349c42 Q.A.1H...8.0 4.B + 40221cb0 2632125d 020c3227 250d0c12 a665080c &2.]..2'%....e.. + 40221cc0 02c60000 00000c22 30342537 121331e8 ......."04%7..1. + 40221cd0 ff21e8ff 42a26101 63cac000 0006ffff .!..B.a.c....... + 40221ce0 0000684c 22060407 62093804 22a08020 ..hL"...b.8.".. + 40221cf0 23202904 7206000c c57c0350 57103037 # ).r....|.PW.07 + 40221d00 10280466 852a2036 41505320 a0551120 .(.f.* 6APS .U. + 40221d10 20545022 2052a070 29045057 1066d543 TP" R.p).PW.f.C + 40221d20 2152f620 2310a032 11280420 2054460b !R. #..2.(. TF. + 40221d30 00ecf566 e311d772 2a31ebfb 22235a1b ...f...r*1.."#Z. + 40221d40 2222635a 06070000 66d31820 264117e2 ""cZ....f.. &A.. + 40221d50 123174ae 30222038 04a02211 30305420 .1t.0" 8..".00T + 40221d60 23202904 58045026 4151ea99 5052108c # ).X.P&AQ..PR.. + 40221d70 b5281c38 1222160b 20244122 43033834 .(.8.".. $A"C.84 + 40221d80 687c3038 3432c3ff 30307422 a004f633 h|0842..00t"...3 + 40221d90 0721b9ff 3a322203 00882c72 1c0bc020 .!..:2"...,r... + 40221da0 00380820 20f47a72 303cb42a 237070f4 .8. .zr0<.*#pp. + 40221db0 725c0b20 20b44032 11c02000 98082170 r\. .@2.. ...!p + 40221dc0 81202910 302220c0 20002908 16850716 . ).0" . .)..... + 40221dd0 9608381c 2186d7c0 20005803 202520c0 ..8.!... .X. % . + 40221de0 20002903 4834211c d3202410 42d2fd16 .).H4!.. $.B... + 40221df0 54011622 0141a1ff 319eff21 9eff0119 T..".A..1..!.... + 40221e00 cac00000 06ffff00 4813313c d9580422 ........H.1<.X." + 40221e10 c7fc2020 b4303510 20332039 04520674 .. .05. 3 9.R.t + 40221e20 3b620c03 57a60520 25c02032 64402311 ;b..W.. %. 2d@#. + 40221e30 58043193 ff303510 20332021 51de2033 X.1..05. 3 !Q. 3 + 40221e40 10390446 0c000000 c0200038 08214a81 .9.F..... .8.!J. + 40221e50 202320c0 20002908 06070000 01118dc0 # . .)......... + 40221e60 00002d0c 018affc0 0000010e 8dc00000 ..-............. + 40221e70 0c12c684 00000000 010a8dc0 0000322c ..............2, + 40221e80 09222c07 0183ffc0 00000106 8dc00000 .",............. + 40221e90 2d0c0180 ffc00000 213681d8 4cc02000 -.......!6..L. . + 40221ea0 3802222c 09396205 58fff20d 000cc220 8.",.9b.X...... + 40221eb0 ff100591 fccc1245 62fc289c 38522802 .......Eb.(.8R(. + 40221ec0 07630e31 508d3203 00f62305 17620286 .c.1P.2...#..b.. + 40221ed0 5700322c 07d184fb e2cc2056 630497e2 W.2,...... Vc... + 40221ee0 63202104 4501fe32 2c0956a2 00284342 c !.E..2,.V..(CB + 40221ef0 afdf22c2 e0478241 580322af c3504104 .."..G.AX."..PA. + 40221f00 e0441120 25104022 20290348 13211781 .D. %.@" ).H.!.. + 40221f10 2024107c 04404210 0c722024 202913c6 $.|.@B..r $ ).. + 40221f20 29000000 00202104 16cf0105 fdfd56b2 ).... !.......V. + 40221f30 04222c09 22220037 72420c12 8504fe46 .",."".7rB.....F + 40221f40 31000000 00202104 05fbfd16 b2fe422c 1.... !.......B, + 40221f50 0922afc3 52240050 3104e033 11202510 ."..R$.P1..3. %. + 40221f60 30222022 64003814 21018120 23107c03 0" "d.8.!.. #.|. + 40221f70 3032100c 72202320 29140613 0001c88c 02..r # )....... + 40221f80 c0000028 9c387c48 12280232 03764054 ...(.8|H.(.2.v@T + 40221f90 25202104 40403401 22fdc000 00fd0201 % !.@@4."....... + 40221fa0 c18cc000 00268f5f 289c2802 202104c5 .....&._(.(. !.. + 40221fb0 f4fd1642 f8489cf0 f034e02f 11f80432 ...B.H...4./...2 + 40221fc0 afc330ff 1020ff20 f90401b5 8cc00000 ..0.. . ........ + 40221fd0 0c02298c 289c2802 202234b0 22112a2d ..).(.(. "4.".*- + 40221fe0 2872c902 289c2802 202234b0 22112add (r..(.(. "4.".*. + 40221ff0 e97d01ac 8cc00000 289c2812 20242501 .}......(.(. $%. + 40222000 09fdc000 00062000 389c0c02 3803298c ...... .8...8.). + 40222010 30310432 c322d033 b03833c9 03389c38 01.2.".3.83..8.8 + 40222020 03303104 32c322d0 d3b0e93d 46160000 .01.2."....=F... + 40222030 00313c8d 220300dd 031b2220 20742243 .1<."....." t"C + 40222040 000ca327 b31e0196 8cc00000 2d0c010f ...'........-... + 40222050 ffc00000 01948cc0 0000220d 000b2222 .........."..."" + 40222060 4d008682 ff2107ff 4108ff32 02000c95 M....!..A..2.... + 40222070 4043a01b 33303074 c9043242 004d020c @C..300t..2B.M.. + 40222080 0237b504 2244000c 020871c8 61d851e8 .7.."D....q.a.Q. + 40222090 41f83112 c1200df0 7a8efe3f 12c1f0c9 A.1.. ..z..?.... + 402220a0 21d911c1 fdffd11f 8de90109 3120e074 !...........1 .t + 402220b0 220d0016 120a56ee 0531f3fe 220c0030 ".....V..1.."..0 + 402220c0 22a02802 38925833 0c435058 340b5550 ".(.8.X3.CPX4.UP + 402220d0 5074f635 0731e8fe 5a533205 003040f4 Pt.5.1..ZS2..0@. + 402220e0 32120b58 224033c0 32520bc0 20003805 2..X"@3.2R.. .8. + 402220f0 c0200062 2500303c b44033c0 3030b440 . .b%.0<.@3.00.@ + 40222100 4311319f 80303610 403320c0 20003265 C.1..06.@3 . .2e + 40222110 0045b8ff 06080000 661e1c01 618cc000 .E......f...a... + 40222120 0031d9fe 220c0030 22a02802 01d8fec0 .1.."..0".(..... + 40222130 0000015c 8cc00000 220c000c 931b2220 ...\...."....." + 40222140 2074224c 0027b304 0c02224c 00220d00 t"L.'...."L.".. + 40222150 0b22224d 00c6d5ff 0831c821 d811e801 .""M.....1.!.... + 40222160 12c1100d f0000000 7091fe3f aa87fe3f ........p..?...? + 40222170 ccfe2240 12c1e0c9 61d95109 71e941f9 .."@....a.Q.q.A. + 40222180 31dd02cd 0466136b 16820601 458cc000 1....f.k....E... + 40222190 0021f5ff c802cc8c 01438cc0 0000067f .!.......C...... + 402221a0 0000388c 39020c02 298c013e 8cc00000 ..8.9...)..>.... + 402221b0 217280d7 b20d21ed ff3d0d01 2ac9c000 !r....!..=..*... + 402221c0 00467600 289c2c04 0c030191 7bc00000 .Fv.(.,.....{... + 402221d0 d90c220d 0ccc02c9 4d281d38 1c291322 ..".....M(.8.)." + 402221e0 c2dc294c 221d0538 9c225c0b 4803216a ..)L"..8."\.H.!j + 402221f0 db86a800 26430286 4200e1dd ff42a170 ....&C..B....B.p + 40222200 0c053d0e 2c8201bf 7cc00000 dd02215a ..=.,...|.....!Z + 40222210 8042a173 d7b20246 5e00160d 1842a179 .B.s...F^....B.y + 40222220 3d0e0c05 22a00c01 b77cc000 0041a4ec =..."....|...A.. + 40222230 291d0b32 37b41631 508027b3 0a42a17c )..27..1P.'..B.| + 40222240 3d0e01b1 7cc00000 42a17e46 5100292d =...|...B.~FQ.)- + 40222250 22a00122 5d0642a1 84e03e20 22a02001 ".."].B...> ". . + 40222260 7c7fc000 004196ec 299d0b32 37b42831 |....A..)..27.(1 + 40222270 428027b3 0a42a187 3d0e01a3 7cc00000 B.'..B..=...|... + 40222280 281d42a1 893d0e01 a07cc000 000c0cc9 (.B..=...|...... + 40222290 1d42a18b 866f0000 2c040c03 015d7bc0 .B...o..,....]{. + 402222a0 0000389d 212f9248 03a02211 20242029 ..8.!/.H..". $ ) + 402222b0 0342a191 3d0e0c05 2d0c0192 7cc00000 .B..=...-...|... + 402222c0 4180ec29 4d0b3237 34028665 00312a80 A..)M.274..e.1*. + 402222d0 27b30a42 a1943d0e 018c7cc0 0000289d '..B..=...|...(. + 402222e0 42a196e0 3e200188 7cc00000 0c0c281d B...> ..|.....(. + 402222f0 42a198c9 9d3d0e01 847cc000 0042a19a B....=...|...B.. + 40222300 c91d0654 00665337 01e68bc0 00002196 ...T.fS7......!. + 40222310 ffc82216 1ce8388c 0c0dd98c 392201e1 .."...8.....9".. + 40222320 8bc00000 289c2c04 3d0d0139 7bc00000 ....(.,.=..9{... + 40222330 281c384c 3912389c 21799948 03865500 (.8L9.8.!y.H..U. + 40222340 26630286 4900e18a ff42a1bd 0c053d0e &c..I....B....=. + 40222350 2c82016c 7cc00000 dd022107 8042a1c0 ,..l|.....!..B.. + 40222360 d73230bc 7d42a1c5 3d0e0c05 22a00c01 .20.}B..=..."... + 40222370 657cc000 004152ec 291d0b32 37b42631 e|...AR.)..27.&1 + 40222380 fe7f27b3 0b42a1c8 e03e2001 5f7cc000 ..'..B...> ._|.. + 40222390 0042a1ca 3d0e2d0d 015c7cc0 00000c0c .B..=.-..\|..... + 402223a0 c63e0000 0000292d 0c12225d 0642a1d0 .>....)-.."].B.. + 402223b0 3d0e0c05 22a02001 537cc000 004140ec =...". .S|...A@. + 402223c0 299d0b32 37b42731 ec7f27b3 0a42a1d3 )..27.'1..'..B.. + 402223d0 3d0e014d 7cc00000 281d42a1 d53d0e01 =..M|...(.B..=.. + 402223e0 4a7cc000 000c0cc9 1d42a1d7 8619002c J|.......B....., + 402223f0 0432a000 01077bc0 0000389d f1488c28 .2....{...8..H.( + 40222400 03a0ff11 f0222029 0342a1dd 3d0e0c05 ....." ).B..=... + 40222410 2d0c013c 7cc00000 412aec29 4d0b3237 -..<|...A*.)M.27 + 40222420 b44127bf 0a42a1e0 3d0e0137 7cc00000 .A'..B..=..7|... + 40222430 289d42a1 e23d0e01 347cc000 000c0c22 (.B..=..4|....." + 40222440 2d0142a1 e4c26d09 e03e2001 2f7cc000 -.B...m..> ./|.. + 40222450 0042a1e6 c91d3d0e 2d0d012b 7cc00000 .B....=.-..+|... + 40222460 c60e0000 381dcd0d 2913460c 00267302 ....8...).F..&s. + 40222470 86caff01 8b8bc000 00213bff c832166c .........!;..2.l + 40222480 d1388c39 320c0222 6c080186 8bc00000 .8.92.."l....... + 40222490 389c2131 cd4803a0 22112024 20290308 8.!1.H..". $ ).. + 402224a0 712d0cd8 51c861e8 41f83112 c1200df0 q-..Q.a.A.1.. .. + 402224b0 12c1f0c9 210931cd 02d9110b 23f62220 ....!.1.....#." + 402224c0 289c0c03 2c0401d2 7ac00000 01758bc0 (...,...z....u.. + 402224d0 00002125 ff3802c9 02398c06 38000000 ..!%.8...9..8... + 402224e0 00664334 d123ff28 1c42a21e 3d0d0106 .fC4.#.(.B..=... + 402224f0 7cc00000 289c42a2 203d0d01 037cc000 |...(.B. =...|.. + 40222500 00222c04 42a221d0 3d2001ff 7bc00000 .",.B.!.= ..{... + 40222510 42a22206 16000000 00665320 289c0c03 B."......fS (... + 40222520 2c0401bb 7ac00000 015e8bc0 0000210e ,...z....^....!. + 40222530 ff3822c9 22398c06 21000000 0066633c .8"."9..!....fc< + 40222540 d10cff28 1c42a233 d03d2001 ef7bc000 ...(.B.3.= ..{.. + 40222550 00289c42 a2353d0d 01ec7bc0 0000284c .(.B.5=...{...(L + 40222560 42a236d0 3d2001e8 7bc00000 42a2373d B.6.= ..{...B.7= + 40222570 0d2d0c01 e57bc000 00061200 00667320 .-...{.......fs + 40222580 289c0c03 2c0401a2 7ac00000 01458bc0 (...,...z....E.. + 40222590 000021f5 fe3832c9 32398c06 08000000 ..!..82.29...... + 402225a0 00668320 289c0c03 0cc40199 7ac00000 .f. (.......z... + 402225b0 013c8bc0 000021ec fe3842c9 42398c01 .<....!..8B.B9.. + 402225c0 398bc000 000831c8 21d81112 c1100df0 9.....1.!....... + 402225d0 1096fe3f 8491fe3f 9098fe3f c492fe3f ...?...?...?...? + 402225e0 0494fe3f a494fe3f bc95fe3f 12c1d0f9 ...?...?...?.... + 402225f0 71f1f7ff c9a1c1f7 ffd991e9 8109b15c q..............\ + 40222600 4ded0f0c 153107f9 525c0628 a3da3239 M....1..R\.(..29 + 40222610 1c392c28 120c1329 4cf99cc0 2c205261 .9,(...)L..., Ra + 40222620 00c5e8ff d2cdf47c 42c2cc28 f2cf2058 .......|B..(.. X + 40222630 01279dd0 d1e9ffc1 e9fff2a0 0042a040 .'...........B.@ + 40222640 c0200028 0d312dd7 30221040 2220c020 . .(.1-.0".@" . + 40222650 00290d0c 12225c06 cb2d294c 22df012a .)..."\..-)L"..* + 40222660 2ed91cd9 2c299c0c 532d0c42 6100f2cf ....,)..S-.Ba... + 40222670 20c5e3ff c2cc28d2 cd4c4801 66ffc0d1 .....(..LH.f... + 40222680 d8ff0c0c 22dc022a 2e299d0c 732d0dc2 ...."..*.)..s-.. + 40222690 cc20c5e1 ffd2cd28 66ece8d1 d2fff1d2 . .....(f....... + 402226a0 ff0c0c5c 4efa2c29 9d0c83d0 2d20c2cc ...\N.,)....- .. + 402226b0 0cc5dfff d2cd28e7 9cea08b1 c8a1d891 ......(......... + 402226c0 e881f871 12c1300d f0000000 f09afe3f ...q..0........? + 402226d0 71ffff40 40742247 040c0222 47092247 q..@@t"G..."G."G + 402226e0 0a22470b 0c023247 05424707 52470842 ."G...2G.BG.RG.B + 402226f0 47066257 07295729 670df000 c4defe3f G.bW.)W)g......? + 40222700 2a090000 12c1f0c2 6102c1fc ff026103 *.......a.....a. + 40222710 22a10029 0c22a200 291c0cb2 224c0922 "..)."..)..."L." + 40222720 4c080c92 225c0821 f6ff0c24 225c0622 L..."\.!...$"\." + 40222730 5c0522a1 5f225c0c 211ab83d 04225c0d \."._"\.!..=."\. + 40222740 62a5e00c 3522a000 45f8ff22 1c0c0c13 b...5"..E..".... + 40222750 85460105 3d000831 c82112c1 100df000 .F..=..1.!...... + 40222760 2020741c 43273309 f652080c 52c60000 t.C'3..R..R... + 40222770 00001c42 31e2ff22 43092243 080df000 ...B1.."C."C.... + 40222780 ba87fe3f 21d2ff12 c1f00931 78026852 ...?!......1x.hR + 40222790 58624202 0b320204 21faff01 b2c7c000 XbB..2..!....... + 402227a0 00083112 c1100df0 0c043714 0c42420a ..1.......7..BB. + 402227b0 1b444040 74cb22c6 fbff0df0 2040740c .D@@t."..... @t. + 402227c0 22303074 27b4012d 048c538c 342b2220 "00t'..-..S.4+" + 402227d0 20740df0 8c82fe3f 30307420 60744040 t.....?00t `t@@ + 402227e0 74505074 7cf2b623 02464400 262678f6 tPPt|..#.FD.&&x. + 402227f0 36099c56 26164046 3f000000 66360246 6..V&.@F?...f6.F + 40222800 24006646 02c62c00 063b0022 af012a64 $.fF..,..;."..*d + 40222810 dc462a25 dc0221ef ff203390 0c022243 .F*%..!.. 3..."C + 40222820 000c32c6 2b000000 47b50246 3300b645 ..2.+...G..F3..E + 40222830 02c63100 062c0000 22af012a 64dc462a ..1..,.."..*d.F* + 40222840 25dc0221 e4ff2b33 2033900c 02224300 %..!..+3 3..."C. + 40222850 0ca20620 0047b502 0628000c a22b3357 ... .G...(...+3W + 40222860 32028620 00c62400 22af012a 64dc462a 2.. ..$."..*d.F* + 40222870 25dc0221 d8ff4b33 2033900c 02224300 %..!..K3 3..."C. + 40222880 0cb20614 00473573 0cb24b33 57b25846 .....G5s..K3W.XF + 40222890 1a000000 22af012a 64dc462a 25dc0221 ...."..*d.F*%..! + 402228a0 cdff6b33 2033900c 02224300 0c720609 ..k3 3..."C..r.. + 402228b0 00473547 6b33b685 2ec60f00 22af012a .G5Gk3......"..* + 402228c0 64dc762a 25dc3221 c3ff8b33 2033900c d.v*%.2!...3 3.. + 402228d0 02224300 0c822243 01c60500 47351c22 ."C..."C....G5." + 402228e0 a0085732 16203380 21bbff20 33904243 ..W2. 3.!.. 3.BC + 402228f0 00524301 0c020df0 7ce20df0 7cf20df0 .RC.....|...|... + 40222900 8481fe3f f081fe3f f480fe3f 5481fe3f ...?...?...?T..? + 40222910 a080fe3f 0081fe3f 7c4a1040 7080fe3f ...?...?|J.@p..? + 40222920 984a1040 9480fe3f 12c1e0c9 61d95109 .J.@...?....a.Q. + 40222930 71e941f9 31305074 cd025242 15222217 q.A.10Pt..RB."". + 40222940 40d07466 12028622 0016c211 26220c26 @.tf..."....&".& + 40222950 3202c658 000c0e46 04000000 3195910c 2..X...F....1... + 40222960 04320300 0c1e30e4 83e0e074 31919132 .2....0....t1..2 + 40222970 030016e3 0531e2ff f1e3ff0c b4d0f393 .....1.......... + 40222980 6d040c83 d0639332 4c788035 01f26c1a m....c.2Lx.5..l. + 40222990 e24c0462 4c053058 3157a41c 4d051c05 .L.bL.0X1W..M... + 402229a0 47a51a1c 5547a51b 1ca547a5 1b1cd547 G...UG....G....G + 402229b0 a51b3d04 2c14c617 000cbec6 17000c7e ..=.,..........~ + 402229c0 86160000 0c5e0615 000c4ec6 13000c3e .....^....N....> + 402229d0 86120000 31cffff1 cfff0cae d0f3930c ....1........... + 402229e0 03324c04 4d0e0c73 d0439342 4c0541ca .2L.M..s.C.BL.A. + 402229f0 ff324c78 80350142 6c1bf26c 1a304831 .2Lx.5.Bl..l.0H1 + 40222a00 0cb547a5 181c050c 5e47a511 1c550c3e ..G.....^G...U.> + 40222a10 47a50a3d 040c0e1c d4372401 0c2e8c3d G..=.....7$....= + 40222a20 b68e010c 7e3d0d20 207405d9 ff420c77 ....~=. t...B.w + 40222a30 5169fff0 22114a32 50339032 0300373e Qi..".J2P3.2..7> + 40222a40 124a4250 44902204 013d0ee7 b2022032 .JBPD."..=.... 2 + 40222a50 20303074 303390f0 33a0326c 1821aaff 00t03..3.2l.!.. + 40222a60 31abffd0 2383861b 000c032d 03c5d4ff 1...#......-.... + 40222a70 420c7751 58fff022 114a3250 33903203 B.wQX..".J2P3.2. + 40222a80 00f6430c 4a425044 90320401 b633010c ..C.JBPD.2...3.. + 40222a90 3321a2ff 30339020 33a0226c 1a0c0222 3!..03. 3."l..." + 40222aa0 4c040c32 224c0522 4c78219d ff326c18 L..2"L."Lx!..2l. + 40222ab0 226c1b21 9cff8607 002198ff 0c03324c "l.!.....!....2L + 40222ac0 040c3322 6c1a324c 052196ff 324c7831 ..3"l.2L.!..2Lx1 + 40222ad0 94ff226c 18326c1b 226c1922 2c18d24c .."l.2l."l.",..L + 40222ae0 790c0332 420b211e b6087122 6c160c02 y..2B.!...q"l... + 40222af0 29ac299c 29ec224c 1622a07f 324c1732 ).).)."L."..2L.2 + 40222b00 4c06224c 00224c01 224c0222 4c03d851 L."L."L."L."L..Q + 40222b10 c861e841 f83112c1 200df000 129bfe3f .a.A.1.. ......? + 40222b20 109bfe3f 12c1f031 fdff0931 22a00022 ...?...1...1".." + 40222b30 430031fb ff224300 22430121 72ff32a0 C.1.."C."C.!r.2. + 40222b40 0c45c6ff 216fff0c 93c5c5ff 2172ff0c .E..!o......!r.. + 40222b50 b345c5ff 216fff0c 83c5c4ff 2170ff0c .E..!o......!p.. + 40222b60 4345c4ff 083112c1 100df000 149bfe3f CE...1.........? + 40222b70 21ffff0d f0000000 0df00000 8ce24202 !.............B. + 40222b80 140c1330 44200c43 30342032 42140df0 ...0D .C04 2B... + 40222b90 8ce24202 147ce330 44107cb3 30341032 ..B..|.0D.|.04.2 + 40222ba0 42140df0 0fff2240 07ff2240 12c1d0f9 B....."@.."@.... + 40222bb0 715050f4 40f07471 edff91d8 ff5921b0 qPP.@.tq.....Y!. + 40222bc0 5f11c9a1 d991e981 09b1f0c5 c070cca0 _............p.. + 40222bd0 20e07422 0900c901 3911cd07 dd09f752 .t"....9......R + 40222be0 3431cfff ea232202 00f7d20f 21eeff01 41...#".....!... + 40222bf0 177dc000 000c02c6 1e000000 f025c070 .}...........%.p + 40222c00 22a03811 0c6422c2 1a593101 047cc000 ".8..d"..Y1..|.. + 40222c10 00583156 52fd0c12 320d0000 1f400022 .X1VR...2....@." + 40222c20 a1202074 30322032 4d0031bd ffead332 . t02 2M.1....2 + 40222c30 0d003022 20224d00 280132a0 7c526103 ..0" "M.(.2.|Ra. + 40222c40 01ff8bc0 00005831 3821f025 c0e05211 ......X18!.%..R. + 40222c50 5a2c3252 103811e2 4277f242 7642a006 Z,2R.8..Bw.BvB.. + 40222c60 22c21a01 ec78c000 0021cfff 3d0f01f7 "....x...!..=... + 40222c70 7cc00000 280108b1 c8a1d891 e881f871 |...(..........q + 40222c80 12c1300d f0000000 21a5ff22 02000df0 ..0.....!..".... + 40222c90 00ff2240 f8fe2240 51a2ff12 c1f02020 .."@.."@Q..... + 40222ca0 74093140 30742a45 62040037 56297ce5 t.1@0t*Eb..7V)|. + 40222cb0 00134050 55815050 74506610 62440041 ..@PU.PPtPf.bD.A + 40222cc0 97ff2204 00205510 21f2ff52 440001df ..".. U.!..RD... + 40222cd0 7cc00000 46020000 21efff01 dc7cc000 |...F...!....|.. + 40222ce0 00083112 c1100df0 318eff41 8cff2020 ..1.....1..A.. + 40222cf0 742a2352 02003204 00303530 3244000c t*#R..2..0502D.. + 40222d00 03324200 0df00000 12c1f0d9 11d184ff .2B............. + 40222d10 c92120c0 740931ca 2d220200 4544f20c .! .t.1.-"..ED.. + 40222d20 0366121f cacd320c 00302060 30221020 .f....2..0 `0". + 40222d30 f2402020 6022c21f b0321120 23c0318b .@ `"...2. #.1. + 40222d40 ff3032a0 08312d03 c821d811 12c1100d .02..1-..!...... + 40222d50 f0000000 12c1d0d9 91dd0331 71ff2020 ...........1q. + 40222d60 7409b1c9 a1e981f9 712a23f2 02000c16 t.......q*#..... + 40222d70 f03060f0 331030f3 40303060 c2c31f26 .0`.3.0.@00`...& + 40222d80 0c3b317a ffb0ec11 c02ec030 22a00c64 .;1z.......0"..d + 40222d90 3d0d22c2 1a690101 a17bc000 006801cc =."..i...{...h.. + 40222da0 a23172ff c0cec030 2ca08604 00001c40 .1r....0,......@ + 40222db0 0036a17c fc303c30 30ff1046 ecff0c02 .6.|.0<00..F.... + 40222dc0 08b1c8a1 d891e881 f87112c1 300df000 .........q..0... + 40222dd0 20407421 52ff3202 000c0247 530bb034 @t!R.2....GS..4 + 40222de0 114023c0 3162ff30 22a00df0 12c1f021 .@#.1b.0"......! + 40222df0 4bff0931 220200c5 36f27cf3 66120c21 K..1"...6.|.f..! + 40222e00 48ff0c03 2202000c 14203483 08312d03 H...".... 4..1-. + 40222e10 12c1100d f0000000 880cf23f 00a08480 ...........?.... + 40222e20 f7bfdfff 900cf23f 080ef23f 680cf23f .......?...?h..? + 40222e30 6c0cf23f 00160000 140cf23f 21f7ff31 l..?.......?!..1 + 40222e40 f7ffc020 00480230 3420c020 003902c0 ... .H.04 . .9.. + 40222e50 20004802 31f3ff30 3410c020 00390231 .H.1..04.. .9.1 + 40222e60 f1ff0c82 c0200048 03202420 c0200029 ..... .H. $ . .) + 40222e70 03310589 0c32c020 00480320 2420c020 .1...2. .H. $ . + 40222e80 00290331 e9ff22af 0fc02000 48032024 .).1.."... .H. $ + 40222e90 1041e6ff c0200029 03c02000 5804c020 .A... .).. .X.. + 40222ea0 00280431 83d92020 f522c212 20207430 .(.1.. .".. t0 + 40222eb0 35100022 11302220 c0200029 0421dcff 5..".0" . .).!.. + 40222ec0 32af00c0 20004802 3044101c 63303420 2... .H.0D..c04 + 40222ed0 c0200039 02c02000 48023144 c5304410 . .9.. .H.1D.0D. + 40222ee0 31d5ff30 3420c020 00390221 d3ff3103 1..04 . .9.!..1. + 40222ef0 d5c02000 48023044 1032a0f0 303420c0 .. .H.0D.2..04 . + 40222f00 20003902 c0200048 02311a7d 303420c0 .9.. .H.1.}04 . + 40222f10 20003902 c0200048 0231177d 303420c0 .9.. .H.1.}04 . + 40222f20 20003902 0df00000 5810f23f 000000c4 .9.....X..?.... + 40222f30 31feff21 feffc020 00480320 2420c020 1..!... .H. $ . + 40222f40 0029030d f0000000 ffffff3b 31f7ff21 .).........;1..! + 40222f50 feffc020 00480320 2410c020 0029030d ... .H. $.. .).. + 40222f60 f0000000 a082fe3f 31ffff29 030df000 .......?1..).... + 40222f70 789ffe3f 5c10f23f 6010f23f 12c1f002 x..?\..?`..?.... + 40222f80 610385fc ff059dfd 31faff22 a0002263 a.......1..".."c + 40222f90 0031f8ff c0200029 0331f7ff c0200029 .1... .).1... .) + 40222fa0 03c5f8ff 083112c1 100df000 4810f23f .....1......H..? + 40222fb0 21edff12 c1f03802 41eeff61 fcff0931 !.....8.A..a...1 + 40222fc0 28042a23 2904c020 00580650 22c02733 (.*#).. .X.P".'3 + 40222fd0 ee32a3e8 01be7bc0 00000831 1b2212c1 .2....{....1.".. + 40222fe0 100df000 0c04f23f 000b0700 070c0700 .......?........ + 40222ff0 20207431 fcff8c62 21fcff06 01000000 t1...b!....... + 40223000 21fbffc0 20002903 0df00000 480cf23f !... .).....H..? + 40223010 4c0cf23f 580cf23f 5c0cf23f 500cf23f L..?X..?\..?P..? + 40223020 540cf23f 600cf23f 640cf23f 20207442 T..?`..?d..? tB + 40223030 03005203 01720302 620303fc d2805511 ..R..r..b.....U. + 40223040 40552000 47115024 20804601 20442021 @U .G.P$ .F. D ! + 40223050 efffc020 00490222 03054203 04802211 ... .I."..B...". + 40223060 31ecff40 2220c020 00290321 eaff7cf3 1..@" . .).!..|. + 40223070 c0200039 0221e8ff c60e0000 80251140 . .9.!.......%.@ + 40223080 42200027 11402220 80460120 442021e3 B .'.@" .F. D !. + 40223090 ffc02000 49022203 05420304 80221131 .. .I."..B...".1 + 402230a0 e0ff4022 20c02000 290321de ff7cf3c0 ..@" . .).!..|.. + 402230b0 20003902 21ddff31 cd7bc020 003902c0 .9.!..1.{. .9.. + 402230c0 20004802 31588530 3420c020 0039020d .H.1X.04 . .9.. + 402230d0 f0000000 20207431 5385cc62 21cfff06 .... t1S..b!... + 402230e0 01000000 21d1ffc0 20004802 303420c0 ....!... .H.04 . + 402230f0 20003902 0df00000 fffffeff 20207431 .9......... t1 + 40223100 feffcc62 21c5ff06 01000000 21c7ffc0 ...b!.......!... + 40223110 20004802 303410c0 20003902 0df00000 .H.04.. .9..... + 40223120 3c0cf23f 280cf23f 2c0cf23f 380cf23f <..?(..?,..?8..? + 40223130 440cf23f 300cf23f 340cf23f 400cf23f D..?0..?4..?@..? + 40223140 20207441 edff5612 0571f5ff c0200028 tA..V..q... .( + 40223150 07404210 c0200049 07420301 62030022 .@B.. .I.B..b.." + 40223160 03028044 11002211 60542050 42202203 ...D..".`T PB ". + 40223170 03802201 40222041 ebffc020 00290422 ..".@" A... .)." + 40223180 03054203 04802211 31e8ff40 2220c020 ..B...".1..@" . + 40223190 0029037c f321e5ff 86130071 e5ffc020 .).|.!.....q... + 402231a0 00280740 4210c020 00490742 03016203 .(.@B.. .I.B..b. + 402231b0 00220302 80441100 22116054 20504220 ."...D..".`T PB + 402231c0 22030380 22014022 2041daff c0200029 "...".@" A... .) + 402231d0 04220305 42030480 221131d7 ff402220 ."..B...".1..@" + 402231e0 c0200029 0321d5ff 7cf3c020 00390221 . .).!..|.. .9.! + 402231f0 7f7bc020 002907c0 20003807 210a8520 .{. .).. .8.!.. + 40223200 2320c020 0029070d f0000000 20207431 # . .)...... t1 + 40223210 baffcc62 21c3ff06 01000000 21c5ffc0 ...b!.......!... + 40223220 20004802 303410c0 20003902 0df00000 .H.04.. .9..... + 40223230 12c1f05d 02093130 20745665 00c5fcff ...]..10 tVe.... + 40223240 06040000 317d7b26 15066625 068c343d ....1}{&..f%..4= + 40223250 04c5eeff 083112c1 100df000 0c08f23f .....1.........? + 40223260 0014f23f 0414f23f 12c1d0d9 91dd0221 ...?...?.......! + 40223270 fbffe981 c02000e8 02c9a1f9 7109b130 ..... ......q..0 + 40223280 f320c2a0 00c7de0b 1bcc1c92 279cf50c . ..........'... + 40223290 02060f00 c02ca041 f2ffd032 114a23c0 .....,.A...2.J#. + 402232a0 20002802 290121ef ff2a23c0 20003802 .(.).!..*#. .8. + 402232b0 c0200028 02325102 202e15f7 92c90c64 . .(.2Q. ......d + 402232c0 103120d0 2d200155 7ac00000 5682fb0c .1 .- .Uz...V... + 402232d0 1208b1c8 a1d891e8 81f87112 c1300df0 ..........q..0.. + 402232e0 0814f23f 6066a081 deffd066 118a86c0 ...?`f.....f.... + 402232f0 20009808 81dcff12 c1f08a86 c0200088 ............ .. + 40223300 08093190 a8419245 00a24501 90a0f590 ..1..A.E..E..... + 40223310 98759245 03809841 824504a2 45029245 .u.E...A.E..E..E + 40223320 05805805 52430080 3e153904 80322580 ..X.RC..>.9..2%. + 40223330 80156618 04661301 0c533902 31e9ff48 ..f..f...S9.1..H + 40223340 413a3670 27200133 77c00000 08310c02 A:6p' .3w....1.. + 40223350 12c1100d f0000000 0c14f23f 1014f23f ...........?...? + 40223360 1414f23f 1814f23f 1c14f23f 2014f23f ...?...?...? ..? + 40223370 2414f23f 51baff7c e3c02000 48050012 $..?Q..|.. .H... + 40223380 40303381 40331020 22a041b5 ffd02211 @03.@3. ".A...". + 40223390 c0200039 054a420c 03c02000 390441b1 . .9.JB... .9.A. + 402233a0 ff4a42c0 20003904 41ceff4a 42c02000 .JB. .9.A..JB. . + 402233b0 390441e9 ff4a42c0 20003904 41e8ff4a 9.A..JB. .9.A..J + 402233c0 42c02000 390441e6 ff4a42c0 20003904 B. .9.A..JB. .9. + 402233d0 41e5ff4a 42c02000 390441e3 ff4a42c0 A..JB. .9.A..JB. + 402233e0 20003904 41e2ff4a 42c02000 390441e0 .9.A..JB. .9.A. + 402233f0 ff4a22c0 20003902 0df00000 7c14f23f .J". .9.....|..? + 40223400 12c1c0d9 d1e9c109 f1c9e1f9 b120d074 ............. .t + 40223410 30e07422 05023205 03002211 8033012a 0.t"..2..."..3.* + 40223420 33220501 82050580 22112a23 3205003a 3"......".*#2..: + 40223430 32802811 8205048a 82265d11 0c050c7c 2.(......&]....| + 40223440 261d120c 2ce6660d 0c6c0602 00000c15 &...,.f..l...... + 40223450 50d520c2 a0070c1f b62e010c 0f0c12e6 P. ............. + 40223460 26010c02 20ff10f0 f0749c6f 22a00100 &... ....t.o"... + 40223470 16400092 a121bb79 22227d20 291092a0 .@...!.y""} )... + 40223480 0320c993 66262c21 ddffc020 00280220 . ..f&,!... .(. + 40223490 2e154792 1e0c3239 01493159 21694179 ..G...29.I1Y!iAy + 402234a0 51891105 edff8811 78516841 58214221 Q.......xQhAX!B! + 402234b0 03322100 6026a091 6affd022 119a92c0 .2!.`&..j..".... + 402234c0 20003909 e0900480 99012044 014a498a .9....... D.JI. + 402234d0 44005511 d0d0245a 543162ff e0dd01da D.U...$ZT1b..... + 402234e0 d5b0cc01 3a32515d ffcacdc0 2000c903 ....:2Q].... ... + 402234f0 c0200048 050c1300 16400063 a1603420 . .H.....@.c.`4 + 40223500 c0200039 058cff31 47f5cbee 30eea032 . .9...1G...0..2 + 40223510 2e026063 20626e02 5172ff42 21103d07 ..`c bn.Qr.B!.=. + 40223520 5a2201bc 76c00000 08f1c8e1 d8d1e8c1 Z"..v........... + 40223530 f8b112c1 400df000 180cf23f 240cf23f ....@......?$..? + 40223540 0008f23f 0408f23f 0808f23f 98250000 ...?...?...?.%.. + 40223550 50a7fe3f e8ccfe3f f0defe3f ecdefe3f P..?...?...?...? + 40223560 efbeadde 7c9ffe3f 9c9ffe3f 10dffe3f ....|..?...?...? + 40223570 0cdffe3f 08dffe3f fc9ffe3f fca6fe3f ...?...?...?...? + 40223580 18dffe3f 14dffe3f 8000f23f 7c00f23f ...?...?...?|..? + 40223590 8800f23f 8400f23f 0000f23f 0800f23f ...?...?...?...? + 402235a0 fcdefe3f 0c00f23f 1000f23f 0004f23f ...?...?...?...? + 402235b0 10325076 0404f23f bbbbbbbb 0804f23f .2Pv...?.......? + 402235c0 00039f2c 7801f23f 0400f23f 30cdfe3f ...,x..?...?0..? + 402235d0 404f0040 12c1c021 d8ff09f1 c9e1d9d1 @O.@...!........ + 402235e0 0c0ce9c1 f9b1c020 00c90221 d4ff7cf3 ....... ...!..|. + 402235f0 c0200039 024584ff 21fbcf31 d1ffd18e . .9.E..!..1.... + 40223600 7ac02000 290331cf ff0c6ec0 20002903 z. .).1...n. .). + 40223610 7d0d6d0c 5d0d4d0c 3d0ce901 0c3205de }.m.].M.=....2.. + 40223620 ff0c167d 0d5d0d4d 0c3d06e2 610022a0 ...}.].M.=..a.". + 40223630 03c5dcff 21c5ffd1 c6ffc020 00c90221 ....!...... ...! + 40223640 c6ffc1c4 ff291121 c5ff51c0 ff29010c .....).!..Q..).. + 40223650 1762a644 4c832d0c 4d0d01dd ffc00000 .b.DL.-.M....... + 40223660 21f1f471 26d33822 a1467b61 bdffe252 !..q&.8".F{a...R + 40223670 009d0ced 0d16f304 c0200058 035050b4 ......... .X.PP. + 40223680 52c5fc50 20b4c020 00580370 55102055 R..P .. .X.pU. U + 40223690 20c02000 5903c020 00280320 20b44042 . .Y.. .(. .@B + 402236a0 11c02000 2803a022 10402220 4813c020 .. .(..".@" H.. + 402236b0 00290369 04c02000 28032020 b42a2469 .).i.. .(. .*$i + 402236c0 02382386 ebff0000 21a9ff41 a6ff2911 .8#.....!..A..). + 402236d0 21a8ff0c 07290121 a4ff0c46 2c0532a0 !....).!...F,.2. + 402236e0 60994101 bbffc000 0021a2ff c1cef40c `.A......!...... + 402236f0 0fc02000 386c297c 2101d30c 0d203310 .. .8l)|!.... 3. + 40223700 0c422023 20c02000 296cc020 00386c21 .B # . .)l. .8l! + 40223710 197bd25c 01202320 c0200029 6cc02000 .{.\. # . .)l. . + 40223720 386c216a d3f98c20 2310c020 00296cc0 8l!j... #.. .)l. + 40223730 2000286c 31127b41 90ff3022 10c02000 .(l1.{A..0".. . + 40223740 296c218f ff0c1729 11218eff 62a10029 )l!....).!..b..) + 40223750 01218aff 52a70032 a054019d ffc00000 .!..R..2.T...... + 40223760 0c72224c 04984121 88ff4184 ffc02000 .r"L..A!..A... . + 40223770 99022176 ff32af00 2a8e2184 ffc02000 ..!v.2..*.!... . + 40223780 89022183 ffc02000 4902217b ffe2d207 ..!... .I.!{.... + 40223790 2181ffc0 2000e902 2180ffc0 20004802 !... ...!... .H. + 402237a0 303410c0 20003902 482c317c ffc02000 04.. .9.H,1|.. . + 402237b0 4903317c ff417aff c0200049 03317aff I.1|.Az.. .I.1z. + 402237c0 d24c05c0 2000f903 c0200038 0241eb7a .L.. .... .8.A.z + 402237d0 40d310c0 2000d902 3176ff21 74ffc020 @... ...1v.!t.. + 402237e0 00390221 75ff3173 ffc02000 29033173 .9.!u.1s.. .).1s + 402237f0 ffc02000 290321dc 7832a707 c0200048 .. .).!.x2... .H + 40223800 02303420 c0200039 02c02000 48026cf3 .04 . .9.. .H.l. + 40223810 303410c0 20003902 c0200048 0231d281 04.. .9.. .H.1.. + 40223820 303410c0 20003902 2d0f059e ff0c12c5 04.. .9.-....... + 40223830 9dff3163 ff2140ff c0200039 023161ff ..1c.!@.. .9.1a. + 40223840 0c22c020 00480320 2420c020 00290331 .". .H. $ . .).1 + 40223850 5eff21ed d5c02000 48032024 10c02000 ^.!... .H. $.. . + 40223860 2903215a ff0c1332 420008f1 c8e1d8d1 ).!Z...2B....... + 40223870 e8c1f8b1 12c1400d f0000000 31ba7812 ......@.....1.x. + 40223880 c1f03223 7dd9117c fd30dd30 3166f420 ..2#}..|.0.01f. + 40223890 20743022 a028e2c9 21e90109 3120dd10 t0".(..!...1 .. + 402238a0 0c0c1c9e c75d042d 0c85acff 1bcce79c .....].-........ + 402238b0 f20831c8 21d811e8 0112c110 0df00000 ..1.!........... + 402238c0 03030300 20207430 307451fd ff7cb4cc .... t00tQ..|.. + 402238d0 52211bff c6000000 211bffc0 20005902 R!......!... .Y. + 402238e0 40431066 140fc020 00480231 4bcb3034 @C.f... .H.1K.04 + 402238f0 20c02000 39020df0 314bf420 20743032 . .9...1K. t02 + 40223900 a048e331 38cfcc42 210eff86 0000210d .H.18..B!.....!. + 40223910 ff5152fe c0200039 02c02000 38057cf2 .QR.. .9.. .8.|. + 40223920 40223030 2210c020 0029050d f0000000 @"00".. .)...... + 40223930 3126ff21 907ac020 00480320 2420c020 1&.!.z. .H. $ . + 40223940 00290321 22ff0c03 3242000d f0000000 .).!"...2B...... + 40223950 00000003 449d0060 ffffffdb 12c1f021 ....D..`.......! + 40223960 31f40931 0c133242 0538c221 0effc020 1..1..2B.8.!... + 40223970 00390231 29fd21e7 92c02000 48032024 .9.1).!... .H. $ + 40223980 20c02000 290321ee fe41f1ff c0200038 . .).!..A... .8 + 40223990 02403320 c0200039 02c02000 580231d6 .@3 . .9.. .X.1. + 402239a0 fd305510 c0200059 0221e6fe c0200058 .0U.. .Y.!... .X + 402239b0 02404520 c0200049 02c02000 48023034 .@E . .I.. .H.04 + 402239c0 10c02000 39022193 fd0c03c0 20003902 .. .9.!..... .9. + 402239d0 4192fd21 1483c020 00290441 d4fdc020 A..!... .).A... + 402239e0 00390431 cffdc020 00290331 d3fe0cc2 .9.1... .).1.... + 402239f0 c0200048 03202420 c0200029 0331d5ff . .H. $ . .).1.. + 40223a00 21d6ffc0 20004803 202410c0 20002903 !... .H. $.. .). + 40223a10 211d8601 2286c000 00311b86 7ce2c020 !..."....1..|.. + 40223a20 00480308 31202410 c0200029 0312c110 .H..1 $.. .).... + 40223a30 0df00000 314d7812 c1f0c020 0058030c ....1Mx.... .X.. + 40223a40 14093140 4520c020 004903c0 20005803 ..1@E . .I.. .X. + 40223a50 0c244045 20c02000 4903c020 0058030c .$@E . .I.. .X.. + 40223a60 44404520 c0200049 033d020c 02c55bff D@E . .I.=....[. + 40223a70 083112c1 100df000 00000024 ffff0100 .1.........$.... + 40223a80 fffffbff 21e8f332 02051623 0c41fe85 ....!..2...#.A.. + 40223a90 0c13c020 00580430 3520c020 00390441 ... .X.05 . .9.A + 40223aa0 adff31f5 ffc02000 58043035 20c02000 ..1... .X.05 . . + 40223ab0 390441a1 fe7c33c0 20005804 303510c0 9.A..|3. .X.05.. + 40223ac0 20003904 4154fd7c f3c02000 390451eb .9.AT.|.. .9.Q. + 40223ad0 ff4151fd c0200059 044194fd 5178e6c0 .AQ.. .Y.A..Qx.. + 40223ae0 20003904 41427931 8efdc020 00490331 .9.ABy1... .I.1 + 40223af0 94fec020 00480350 4410c020 004903c0 ... .H.PD.. .I.. + 40223b00 20006803 41c88240 6620c020 00690331 .h.A..@f . .i.1 + 40223b10 8dfec020 00680350 5610c020 005903c0 ... .h.PV.. .Y.. + 40223b20 20005803 404520c0 20004903 41bbfc31 .X.@E . .I.A..1 + 40223b30 d4ffc020 00580430 3510c020 00390431 ... .X.05.. .9.1 + 40223b40 99fe4197 fec02000 490332a0 00324205 ..A... .I.2..2B. + 40223b50 0df00000 38cdfe3f 2eba0000 175d0000 ....8..?.....].. + 40223b60 aaaa0000 c7710000 55550000 e3380000 .....q..UU...8.. + 40223b70 aa2a0000 711c0000 55150000 f6120000 .*..q...U....... + 40223b80 899d0000 c44e0000 83340000 62270000 .....N...4..b'.. + 40223b90 411a0000 b1130000 81110000 c00f0000 A............... + 40223ba0 c88d0000 e4460000 422f0000 72230000 .....F..B/..r#.. + 40223bb0 a1170000 b9110000 2d0e0000 42a15f20 ........-...B._ + 40223bc0 20f44022 1052a15f 30307441 e2ff5712 .@".R._00tA..W. + 40223bd0 02467800 3150920c 0251dfff 39042244 .Fx.1P...Q..9."D + 40223be0 04224405 22440639 84224426 314d920c ."D."D.9."D&1M.. + 40223bf0 1222442e 22440c22 440d2244 0e59c40c ."D."D."D."D.Y.. + 40223c00 22594451 d6ff0c56 0c480c79 39a43924 "YDQ...V.H.y9.9$ + 40223c10 2244360c 63224414 22441522 44160c32 "D6.c"D."D."D..2 + 40223c20 59e49244 3c92443d 22443e82 44248244 Y..D<.D="D>.D$.D + 40223c30 2562442c 62442d32 44343244 35596422 %bD,bD-2D42D5Yd" + 40223c40 441c2244 1d22441e 21c6ffa1 caff2264 D."D."D.!....."d + 40223c50 1621c4ff 0ca52264 1e21c3ff 0cb72264 .!...."d.!...."d + 40223c60 1421c2ff 72445c22 641c21c1 ff72445d .!..rD\"d.!..rD] + 40223c70 2264120c 9272447c 72447d52 44545244 "d...rD|rD}RDTRD + 40223c80 55524474 524475a2 641a8244 5e82447e URDtRDu.d..D^.D~ + 40223c90 62445662 44762244 4c22444d 32444e22 bDVbDv"DL"DM2DN" + 40223ca0 446c2244 6d32446e 92444692 446691b4 Dl"Dm2Dn.DF.Df.. + 40223cb0 ffa1b1ff 92642091 b3ffa264 10926422 .....d ....d..d" + 40223cc0 91b2ffa1 aeff9264 2491b0ff a2641892 .......d$....d.. + 40223cd0 642691af ff724484 72448552 448c5244 d&...rD.rD.RD.RD + 40223ce0 8d524494 52449592 64282244 44224445 .RD.RD..d("DD"DE + 40223cf0 22446422 44658244 8662448e 62449622 "Dd"De.D.bD.bD." + 40223d00 449c2244 9d32449e 2244a491 a2ff7244 D."D.2D."D....rD + 40223d10 c492642a 7244c591 a0ff71a2 ff92642c ..d*rD....q...d, + 40223d20 a1a0ff91 9eff7264 32719fff 2244a532 ......rd2q.."D.2 + 40223d30 44a62244 ac2244ad 3244ae22 44b42244 D."D."D.2D."D."D + 40223d40 b53244b6 92642e22 44bc2244 bd3244be .2D..d."D."D.2D. + 40223d50 a2643082 44c65244 cc5244cd 6244ce72 .d0.D.RD.RD.bD.r + 40223d60 64345244 d45244d5 6244d651 90ff2244 d4RD.RD.bD.Q.."D + 40223d70 dc526436 518fff22 44dd5264 38518dff .Rd6Q.."D.Rd8Q.. + 40223d80 3244de52 643a518c ff2244e4 2244e532 2D.Rd:Q.."D."D.2 + 40223d90 44e62244 ec2244ed 3244ee92 643c2244 D."D."D.2D..d<"D + 40223da0 f42244f5 3244f652 643e2244 fc2244fd ."D.2D.Rd>"D."D. + 40223db0 3244fe86 0a000b23 0c050c43 2035930c 2D.....#...C 5.. + 40223dc0 12202320 22445c22 447c2244 540c3220 . # "D\"D|"DT.2 + 40223dd0 33203244 7432444c 32446c32 44443244 3 2Dt2DL2Dl2DD2D + 40223de0 640c020d f0000000 42020c37 140d3242 d.......B..7..2B + 40223df0 0c0c0332 420d32a0 0032520d 0df00000 ...2B.2..2R..... + 40223e00 12c1f0c2 6102c222 08d26101 0c83dd02 ....a.."..a..... + 40223e10 2d0c0931 05fdff32 cc2c2d0d 0c0485df -..1...2.,-..... + 40223e20 03220c0d 1b22224c 0d08310c 12225c0d ."...""L..1.."\. + 40223e30 d811c821 12c1100d f0000000 52120c68 ...!........R..h + 40223e40 521b7572 520c5a56 3245f032 120c5852 R.urR.ZV2E.2..XR + 40223e50 1b636252 0c3a3542 43f00df0 42120c58 .cbR.:5BC...B..X + 40223e60 521b6462 520c4a45 3244f00d f0000000 R.dbR.JE2D...... + 40223e70 42120c58 521b6462 520c4a45 30584152 B..XR.dbR.JE0XAR + 40223e80 44f04212 0c58521b 6462520c 4a453244 D.B..XR.dbR.JE2D + 40223e90 f00df000 42120c58 521b6462 520c4a45 ....B..XR.dbR.JE + 40223ea0 30587552 44f04212 0c58521b 644a5541 0XuRD.B..XR.dJUA + 40223eb0 8f746252 0c404310 4040f542 45f04212 .tbR.@C.@@.BE.B. + 40223ec0 0c58521b 644a5541 8a746252 0c404310 .XR.dJUA.tbR.@C. + 40223ed0 40484142 45f04212 0c58521b 6462520c @HABE.B..XR.dbR. + 40223ee0 4a453244 f00df000 12c1f0c2 61020261 JE2D........a..a + 40223ef0 0320c220 8cc22842 16220045 ea040c02 . . ..(B.".E.... + 40223f00 294c295c 0831c821 12c1100d f0000000 )L)\.1.!........ + 40223f10 acd23212 0c48521b 5352520c 3a347cf4 ..2..HR.SRR.:4|. + 40223f20 4243f052 a0f04c34 0c063212 0c373410 BC.R..L4..2..74. + 40223f30 78521b83 3a378252 0c5a3362 430006fa xR..:7.R.Z3bC... + 40223f40 ff0df000 2cd3fe3f 28d3fe3f 12c1e0f9 ....,..?(..?.... + 40223f50 31f1fcff c961d951 e9410971 ed02220f 1....a.Q.A.q..". + 40223f60 00cd03dd 04dc42c5 74eb31f7 ff0c1429 ......B.t.1....) + 40223f70 03320f00 22a00030 2483224f 0022aff4 .2.."..0$."O.".. + 40223f80 166e1722 affa160c 170c0432 a1342d04 .n.".......2.4-. + 40223f90 05e8043d 02294c7c f216d315 263d1022 ...=.)L|....&=." + 40223fa0 0c0df1e9 ffcc32c5 70eb290f 280f290c ......2.p.).(.). + 40223fb0 284c3812 0c12395c 22430038 5c224301 (L8...9\"C.8\"C. + 40223fc0 285c320e 32324202 285c0c03 32420358 (\2.22B.(\..2B.X + 40223fd0 0c285c80 45015038 75303420 41457440 .(\.E.P8u04 AEt@ + 40223fe0 65108066 11505841 40451060 33204033 e..f.PXA@E.`3 @3 + 40223ff0 20304874 32420442 42053040 75303875 0Ht2B.BB.0@u08u + 40224000 3242070c 03424206 32420832 42093242 2B...BB.2B.2B.2B + 40224010 0a32420b 32420c32 420d3242 0e32420f .2B.2B.2B.2B.2B. + 40224020 42a0fb32 cdfc4703 0e663d23 320c0c32 B..2..G..f=#2..2 + 40224030 c3fc3030 74f62317 320e0432 420c320e ..00t.#.2..2B.2. + 40224040 0532420d 320e0632 420e320e 0732420f .2B.2..2B.2..2B. + 40224050 0c033242 10324211 32421232 42133242 ..2B.2B.2B.2B.2B + 40224060 14324215 32421632 42173242 18324219 .2B.2B.2B.2B.2B. + 40224070 32421a32 421b22ce 33620e32 3050f448 2B.2B.".3b.20P.H + 40224080 5c67b509 f6650652 02008600 00000c05 \g...e.R........ + 40224090 3a445244 1c1b331b 2266b3dc 0c022042 :DRD..3."f.... B + 402240a0 20385c2a 3342432c 1b2266d2 f30c024d 8\*3BC,."f....M + 402240b0 02385c2a 3342436c 1b2266e2 f3285c42 .8\*3BCl."f..(\B + 402240c0 af824242 ed32a063 5c344242 ee3242ec ..BB.2.c\4BB.2B. + 402240d0 3242ef0c 02225c0c 4c440c02 385c2a33 2B..."\.LD..8\*3 + 402240e0 2243f01b 224792f3 0c143c53 2d0cc5d4 "C.."G.......... + 40224bf0 21cd03d9 114c44dd 020c032d 0c093101 !....LD....-..1. + 40224c00 0471c000 000831c9 8dc821d8 1112c110 .q....1...!..... + 40224c10 0df00000 6388fe3f 12c1f0c9 21cd0228 ....c..?....!..( + 40224c20 8209318c e231fbff 42a29601 3772c000 ..1..1..B...7r.. + 40224c30 000c0229 8c0831c8 2112c110 0df00000 ...)..1.!....... + 40224c40 12c1a0d2 61150261 17c26116 dd021672 ....a..a..a....r + 40224c50 084c440c 032d0101 ee70c000 002d010c .LD..-...p...-.. + 40224c60 834518ff 288d8c22 c812dcfc 85890720 .E..(.."....... + 40224c70 c2201632 06320208 2261012c 02202320 . .2.2.."a.,. # + 40224c80 31c2fe22 4c084c44 2d0c0590 070c843d 1.."L.LD-......= + 40224c90 012d0d85 2bff5682 030c243c 932d01c5 .-..+.V...$<.-.. + 40224ca0 19ff321d 182d0185 1cff2d01 0526ff32 ..2..-....-..&.2 + 40224cb0 110c22a0 f02a3328 413030f4 c52d0441 .."..*3(A00..-.A + 40224cc0 14fd3841 6d0d4c35 2d0c459c 072d0185 ..8Am.L5-.E..-.. + 40224cd0 21ff2811 8c120587 07022117 c22116d2 !.(.......!..!.. + 40224ce0 211512c1 600df000 12c1f0d9 11d882c9 !...`........... + 40224cf0 210931cd 02acdd22 0d0cf662 07f63207 !.1...."...b..2. + 40224d00 ac228605 00669213 2d0cc5f2 030c0222 ."...f..-......" + 40224d10 4d0dc02c 20c573ff 86020000 0c02224d M.., .s......."M + 40224d20 0d2d0c45 3fff0831 c821d811 12c1100d .-.E?..1.!...... + 40224d30 f0000000 12c1f0d9 110931c9 21dd0216 ..........1.!... + 40224d40 b208c882 166c0822 0c0c2682 02461f00 .....l."..&..F.. + 40224d50 380328bc 2793760c c32d0cc5 08ff0c44 8.(.'.v..-.....D + 40224d60 3d0c2d0d 451eff56 62050c44 3c232d0c =.-.E..Vb..D<#-. + 40224d70 850cff28 bc804201 20387530 542031dc ...(..B. 8u0T 1. + 40224d80 70304210 80441120 28414045 20303210 p0B..D. (A@E 02. + 40224d90 3034202d 0cc50fff 2d0c4517 ff321c0c 04 -....-.E..2.. + 40224da0 22a0f02a 33284c30 30f4051f 0441d8fc "..*3(L00....A.. + 40224db0 384c281c 6d0d52a0 43458d07 2d0c8512 8L(.m.R.CE..-... + 40224dc0 ff220c0d 1b22224c 0d1c4222 5c0d0831 ."...""L..B"\..1 + 40224dd0 c821d811 12c1100d f0000000 204e0000 .!.......... N.. + 40224de0 12c1e0c9 61c882e9 410c53ed 022d0c09 ....a...A.S..-.. + 40224df0 71d951f2 610305ff fe0c343d 0c2d0ec5 q.Q.a.....4=.-.. + 40224e00 14ffdd02 56020a0c 243c932d 0cc502ff ....V...$<.-.... + 40224e10 321e182d 0c8505ff f8beccbf 21bcfcf8 2..-........!... + 40224e20 02568f05 060a0000 002d0f01 617dc000 .V.......-..a}.. + 40224e30 00203074 1643fe4d 032d0c0c c3c5fffe . 0t.C.M.-...... + 40224e40 320f0016 53fd2d0c 1bff0501 ffc6fbff 2...S.-......... + 40224e50 c02c20c5 0bff321c 0c22a0f0 20338028 ., ...2..".. 3.( + 40224e60 4c3030f4 45130438 4c281c6d 0e4c3542 L00.E..8L(.m.L5B + 40224e70 cc28c581 072d0c05 07ff860a 002d0f01 .(...-.......-.. + 40224e80 4c7dc000 0021a3fc 4802a614 c2404074 L}...!..H....@@t + 40224e90 3cc3c02c 2045fafe 320f0016 13fb2d0c <.., E..2.....-. + 40224ea0 1bff85fb fec6fbff 420c0d22 a00942c4 ........B.."..B. + 40224eb0 01403074 324c0d41 c9ff3732 0eb02311 .@0t2L.A..72..#. + 40224ec0 3022c030 42a0c044 114040f4 22a1f332 0".0B..D.@@."..2 + 40224ed0 a1f42a24 015173c0 00000871 225c0de8 ..*$.Qs....q"\.. + 40224ee0 412d0dc8 61d851f8 3112c120 0df00000 A-..a.Q.1.. .... + 40224ef0 12c1f0c9 21c882d9 110931e9 01dd027c ....!.....1....| + 40224f00 4216bc0a 0c032d0c c5edfe0c 0229ac29 B.....-......).) + 40224f10 bc29cc29 dc226c10 29fc29ec 225c1322 .).)."l.).)."\." + 40224f20 5c12225c 11225c10 0c743d0c d02d20c5 \."\."\..t=..- . + 40224f30 01ffed02 ec622d0c 45fdfe32 1c0c22a0 .....b-.E..2..". + 40224f40 f02a3328 4c3030f4 05050438 4c281c6d .*3(L00....8L(.m + 40224f50 0d4c3542 cc288573 072d0cc5 f8fe420c .L5B.(.s.-....B. + 40224f60 0d0c921b 44403074 324c0d41 bb933732 ....D@0t2L.A..72 + 40224f70 0eb02311 3022c030 42a0d044 114040f4 ..#.0".0B..D.@@. + 40224f80 22a1f32a 2432a1f4 012473c0 0000225c "..*$2...$s..."\ + 40224f90 0d2d0d45 ca03c1fc fd2d0d3d 0cc5b303 .-.E.....-.=.... + 40224fa0 3d0c2d0d 85c4032d 0d3d0c85 c3032d0e =.-....-.=....-. + 40224fb0 0831c821 d811e801 12c1100d f0000000 .1.!............ + 40224fc0 5ce7fe3f 21ffff12 c1e0d951 d802e941 \..?!......Q...A + 40224fd0 0971c961 f9317cbe 16ad17c8 8d160c17 .q.a.1|......... + 40224fe0 320c0c16 a316421c 139cb422 1c1222c2 2.....B...."..". + 40224ff0 012020f4 225c1227 940dd02d 2005efff . ."\.'...- ... + 40225000 2d0d4511 ff065200 221c1116 52110b42 -.E...R."...R..B + 40225010 425c1126 12028642 00e02310 26120526 B\.&...B..#.&..& + 40225020 9302c64a 000c432d 0cc5dbfe 0c343d0c ...J..C-.....4=. + 40225030 2d0d85f1 fe56f209 0c243c93 2d0cc5df -....V...$<.-... + 40225040 fe321d18 2d0c85e2 fef8bdcc af212ffc .2..-........!/. + 40225050 f802567f 05c60900 002d0f01 d57cc000 ..V......-...|.. + 40225060 00203074 1653fe4d 032d0c0c c3c5dcfe . 0t.S.M.-...... + 40225070 320f0016 63fd2d0c 1bff05de fec6fbff 2...c.-......... + 40225080 c02c20c5 e8fe321c 0c22a0f0 20338028 ., ...2..".. 3.( + 40225090 4c3030f4 45f00341 1efc384c 281c6d0d L00.E..A..8L(.m. + 402250a0 4c35c55e 072d0c05 e4fe860a 002d0f01 L5.^.-.......-.. + 402250b0 c07cc000 002117fc 4802a614 c2404074 .|...!..H....@@t + 402250c0 3cc3c02c 2045d7fe 320f0016 13fb2d0c <.., E..2.....-. + 402250d0 1bff85d8 fec6fbff 420c0d22 a00942c4 ........B.."..B. + 402250e0 01403074 324c0d41 5c933732 0eb02311 .@0t2L.A\.72..#. + 402250f0 3022c030 42a0d044 114040f4 22a1f332 0".0B..D.@@."..2 + 40225100 a1f42a24 01c572c0 0000225c 0d321c12 ..*$..r..."\.2.. + 40225110 221c1330 22c0a622 37202121 225c1186 "..0".."7 !!"\.. + 40225120 0b000000 221c10ac 620b4242 5c106612 ...."...b.BB\.f. + 40225130 1fe02310 26120266 93162d0d 05caff22 ..#.&..f..-...." + 40225140 1c0f321c 123022c0 a6220520 2121225c ..2..0"..". !!"\ + 40225150 10d80d46 a0ff0871 c861d851 e841f831 ...F...q.a.Q.A.1 + 40225160 12c1200d f0000000 88042340 2195ff12 .. .......#@!... + 40225170 c1f0c921 d911c802 d1faafe9 0109310c ...!..........1. + 40225180 0e16cc09 288c1622 09c02000 380dac33 ....(..".. .8..3 + 40225190 32020c26 531ec020 00380d42 020d3734 2..&S.. .8.B..74 + 402251a0 1321f1ff 01aa73c0 000028ac 161207c0 .!....s...(..... + 402251b0 0200c61a 0032120d b623080b 3332520d .....2...#..32R. + 402251c0 06160000 66135432 020ce252 0d26a346 ....f.T2...R.&.F + 402251d0 26634366 13152202 0df66207 2d0c850a &cCf.."...b.-... + 402251e0 ffc60d00 2d0c85d0 ff860a00 66831522 ....-.......f.." + 402251f0 020df622 072d0c85 c0fe8607 002d0c45 ...".-.......-.E + 40225200 32ff8605 00663313 22020df6 2208c02c 2....f3."...".., + 40225210 200524ff 0601002d 0cc5effe c80cc6d7 .$....-........ + 40225220 ff0831c8 21d811e8 0112c110 0df00000 ..1.!........... + 40225230 12c1f002 6103c261 02160202 4202397c ....a..a....B.9| + 40225240 73303410 c8823242 399c0c28 1c8c5285 s04...2B9..(..R. + 40225250 2f070c02 291c0c03 2d0cc5b8 fe0831c8 /...)...-.....1. + 40225260 2112c110 0df00000 8c472240 12c1f0c9 !........G"@.... + 40225270 210931d9 11e901cd 02564200 7c42c625 !.1......VB.|B.% + 40225280 00320239 d8827c72 20231022 4c395763 .2.9..|r #."L9Wc + 40225290 ea221c18 32a23f27 b36bdc8d 315efe0c ."..2.?'.k..1^.. + 402252a0 0542a2c2 4c420197 70c00000 dd021642 .B..LB..p......B + 402252b0 05298c86 0100281d 8c12c528 074c440c .)....(....(.LD. + 402252c0 032d0d01 536fc000 00c52307 291dbc42 .-..So....#.)..B + 402252d0 4202082c 03303420 324208e1 2bfd281d B..,.04 2B..+.(. + 402252e0 4c443d0e 452a0728 1d4c343d 0ec53107 LD=.E*.(.L4=..1. + 402252f0 281d31dd ff4d0c05 39072d0c 85e1fe8c (.1..M..9.-..... + 40225300 922d0cc5 f2ff7cf2 46030000 320c390c .-....|.F...2.9. + 40225310 82202320 224c390c 020831c8 21d811e8 . # "L9...1.!... + 40225320 0112c110 0df00000 4cd3fe3f 63825363 ........L..?c.Sc + 40225330 12c1e0c9 61cd0221 fcff0971 28020c44 ....a..!...q(..D + 40225340 29110c22 224c000c 12224c01 0c62224c )..""L..."L..b"L + 40225350 020c0222 4c030c02 225c0422 a0804031 ..."L..."\."..@1 + 40225360 80225c05 22cc1001 2b6fc000 000c440c ."\."...+o....D. + 40225370 03cb2c01 276fc000 000c440c 0322cc14 ..,.'o....D..".. + 40225380 01246fc0 00000c44 32a00022 cc180120 .$o....D2.."... + 40225390 6fc00000 4c040c03 22cc2c01 1d6fc000 o...L...".,..o.. + 402253a0 0042a080 32a00022 cc6c0119 6fc00000 .B..2..".l..o... + 402253b0 22a0ec20 cc8042a1 380c03c0 2c200114 ".. ..B.8..., .. + 402253c0 6fc00000 21daff3d 0129010c 442d0c01 o...!..=.)..D-.. + 402253d0 116fc000 000871c8 6112c120 0df00000 .o....q.a.. .... + 402253e0 50d3fe3f a483fe3f a883fe3f 12c1c0c9 P..?...?...?.... + 402253f0 e1cd0221 fbff0c44 38020c12 224c007c ...!...D8..."L.| + 40225400 f2224c02 224c0322 4c040c02 224c053c ."L."L."L..."L.< + 40225410 32224c06 21f4ff42 4c015802 d9d1c025 2"L.!..BL.X....% + 40225420 115022c0 e0221120 5875e9c1 f9b130e0 .P"..". Xu....0. + 40225430 7530f874 30d87542 4c07424c 0d304074 u0.t0.uBL.BL.0@t + 40225440 31eaff09 f1524c08 2050f552 4c09224c 1....RL. P.RL."L + 40225450 0b205841 3203003c 62224c0c 524c0a42 . XA2... + 40225c70 02295e46 2500ac29 e809285e 66125a38 .)^F%..)..(^f.Z8 + 40225c80 410c6422 ce0401e3 6cc00000 21d6fd28 A.d"....l...!..( + 40225c90 02d94e29 3e0c0229 5e461d00 c1a0fe42 ..N)>..)^F.....B + 40225ca0 a4843d0c 1c828991 01ea70c0 00008891 ..=.......p..... + 40225cb0 ed028c38 28080601 00661f10 2801290e ...8(....f..(.). + 40225cc0 280e3851 42a48e27 33054604 0042a48a (.8QB..'3.F..B.. + 40225cd0 3d0c2d0e 010d6ec0 00000c02 060d0038 =.-...n........8 + 40225ce0 4142a006 4b2e01cb 6cc00000 21befdd9 AB..K...l...!... + 40225cf0 4e28020c 0d293e3d 0cd95e42 a4950c82 N(...)>=..^B.... + 40225d00 01d470c0 0000e902 d9123d02 2183fe85 ..p.......=.!... + 40225d10 81ff280e 022113c2 2112d221 11e22110 ..(..!..!..!..!. + 40225d20 f8f112c1 500df000 c0042340 12c1b0d2 ....P.....#@.... + 40225d30 61110261 13c26112 e26110f9 f1dd0416 a..a..a..a...... + 40225d40 142de176 fe42a269 3d0e22a2 2401c070 .-.v.B.i=.".$..p + 40225d50 c00000cd 02cc722d 0d450403 06ad0000 ......r-.E...... + 40225d60 e21d0448 1d0c0232 1d0537b2 122a3452 ...H...2..7..*4R + 40225d70 03002a3c 1b225243 002020f4 c6f9ff00 ..*<."RC. ..... + 40225d80 380d5643 0522af10 2aee31e7 ff22a0ec 8.VC."..*.1..".. + 40225d90 0c442a2c e0e0f401 a16fc000 0056020c .D*,.....o...V.. + 40225da0 0c44cb3c 4a21019b 6cc00000 f2cc1c32 .D..&2kfB..<.f.. + 40225e90 c02c20c5 49ff22a0 35224cf0 22a00122 ., .I.".5"L.".." + 40225ea0 4cf10c22 224cf222 a0f32a2c c553ff0c L..""L."..*,.S.. + 40225eb0 047cf332 42002d04 32a22485 f502ed02 .|.2B.-.2.$..... + 40225ec0 4d020c05 1692f978 142d0550 32c06214 M......x.-.P2.b. + 40225ed0 053030f4 67b3111b 622a2c22 02003a37 .00.g...b*,"..:7 + 40225ee0 22430060 20f446f8 ff480416 d40e5d02 "C.` .F..H....]. + 40225ef0 c6f4ff2d 0c8543ff 3c52224c f00c1222 ...-..C.03.p3 + 402260f0 b0320300 dd072623 02466c00 a20203fa .2....&#.Fl..... + 40226100 3e3033f0 7033b0a0 a034a243 05320205 >03.p3...4.C.2.. + 40226110 42020480 33114033 20420207 92020680 B...3.@3 B...... + 40226120 44119044 20806411 40484140 66204202 D..D .d.@HA@f B. + 40226130 027cf940 49304097 040c1b0c 04a04b93 .|.@I0@.......K. + 40226140 90442060 70f45644 16804311 30384130 .D `p.VD..C.08A0 + 40226150 34200033 11303031 b71302c6 5300face 4 .3.001....S... + 40226160 c0ccf0d0 ccb00c33 324c00cb 22cbcc3d .......32L.."..= + 40226170 029d0c52 afc062a0 c0420300 1ba35034 ...R..b..B....P4 + 40226180 10679302 0654003d 0abc74b2 0900a203 .g...T.=..t..... + 40226190 00a71b23 fa2e2022 f0d022b0 62224416 ...#.. "..".b"D. + 402261a0 360ffa2e 2022f0d0 22b04222 450c032d 6... "..".B"E..- + 402261b0 0cc00600 86370000 0b441b33 1b994040 .....7...D.3..@@ + 402261c0 7406f1ff 4203001b 9956c4fa 06420000 t...B....V...B.. + 402261d0 00802311 30384130 22202020 f4ab220b ..#.08A0" ..". + 402261e0 672a2a60 70f416a7 fa797199 8185e3ff g**`p....yq..... + 402261f0 ad023d02 0ca42d01 a9610186 6bc00000 ..=...-..a..k... + 40226200 28015195 ff321104 78719881 a8615792 (.Q..2..xq...aW. + 40226210 bf9793bc 48118034 01402875 20232031 ....H..4.@(u # 1 + 40226220 b46b3064 10806611 40484130 34106022 .k0d..f.@HA04.`" + 40226230 20302220 fa3e3033 f0d033b0 29233187 0" .>03..3.)#1. + 40226240 ff27b309 fa2e2022 f0d022b0 3922fa6e .'.... "..".9".n + 40226250 6066f0d0 661192d6 019a9dcb 992d090c `f..f........-.. + 40226260 44ab3a69 61998101 6b6bc000 00686198 D.:ia...kk...ha. + 40226270 816a6d62 26449c06 fa2e2022 f0d022b0 .jmb&D.... "..". + 40226280 4222453d 092d0cc0 0600fa2e 2022f0d0 B"E=.-...... ".. + 40226290 22b02822 dc62fa5e 5055f0d0 75b00c02 ".(".b.^PU..u... + 402262a0 82a11022 47008a77 22a00022 67002221 ..."G..w".."g."! + 402262b0 04c5ae02 22210531 64ff42a3 6101926c ...."!.1d.B.a..l + 402262c0 c0000002 2113c221 12d22111 e22110f2 ....!..!..!..!.. + 402262d0 210f12c1 500df000 7971c5d4 ff4b2292 !...P...yq...K". + 402262e0 a4007871 86bfff00 64d3fe3f d0d7fe3f ..xq....d..?...? + 402262f0 12c1c002 610fc261 0ed9d1e9 c1f9b1cd ....a..a........ + 40226300 03ed0429 41c53ae9 f152ff20 20f50c04 ...)A.:..R. ... + 40226310 225f0032 a1104024 2085af02 5d0fdd02 "_.2..@$ ...]... + 40226320 7cff16a2 0bf8120c c42d0f0c 03595101 |........-...YQ. + 40226330 386bc000 0058510b cc421500 ea448024 8k...XQ..B...D.$ + 40226340 11404874 40222020 20f4224f 00202841 .@Ht@" ."O. (A + 40226350 224f010c 12224f02 0c02224f 040c1222 "O..."O..."O..." + 40226360 4f05cbff 1bcc1bef 0c02320c 0042c3d2 O.........2..B.. + 40226370 9c048ce3 1b22324e 00202074 1bee1bcc ....."2N. t.... + 40226380 86f9ff00 224f0022 0c008c32 fd0e86f4 ...."O."...2.... + 40226390 ff224e00 22a1000c 44225100 2251013d ."N."...D"Q."Q.= + 402263a0 0122ce01 011c6bc0 0000381d 5bee303e ."....k...8.[.0> + 402263b0 c03030f4 d02d2045 be0221cb ff3841c1 .00..- E..!..8A. + 402263c0 cbff20e3 a0280c3c 543d0e05 2406280c .. ..(..S.... + 40226920 26331006 14000000 2673190c 9447133b &3......&s...G.; + 40226930 c6100000 31ceff42 044ec020 00380337 ....1..B.N. .8.7 + 40226940 9411060b 0031caff 42044ec0 20003223 .....1..B.N. .2# + 40226950 00371417 7c838606 0031c5ff 42044ec0 .7..|....1..B.N. + 40226960 20003803 3794ec7c d3c60100 7c638600 .8.7..|....|c.. + 40226970 00007c53 3242264d 020c1322 a01a012a ..|S2B&M..."...* + 40226980 77c00000 083112c1 100df000 6c732240 w....1......ls"@ + 40226990 5c6a2240 6388fe3f e0042340 12c1f0c9 \j"@c..?..#@.... + 402269a0 21d911e9 010931dd 02cd03ed 04560409 !.....1......V.. + 402269b0 28020c33 39120c02 224d2622 1c10c91d (..39..."M&".... + 402269c0 294d280c 3d0d295d 221c1129 2d220c04 )M(.=.)]"..)-".. + 402269d0 224d0c22 0c05224d 0d220c06 224d0e22 "M.".."M.".."M." + 402269e0 0c07224d 0f0c1222 4d482d0c 45c10231 .."M..."MH-.E..1 + 402269f0 e7ff2d0c c5c10231 7eff2d0c c5c00232 ..-....1~.-....2 + 40226a00 0c244c02 20232022 4c24280d 0c138561 .$L. # "L$(....a + 40226a10 06280d38 2238438c 13c00300 222d1347 .(.8"8C....."-.G + 40226a20 620a31db ff2d0c10 112005be 02222d13 b.1..-... ..."-. + 40226a30 37621932 0c080c82 20232022 4c08c602 7b.2.... # "L... + 40226a40 0031d4ff 21d5ff01 816dc000 0008312d .1..!....m....1- + 40226a50 0ec821d8 11e80112 c1100df0 12c1e0e9 ..!............. + 40226a60 41ed03c9 613d02cd 022d0ed9 51f93109 A...a=...-..Q.1. + 40226a70 71dd04fd 05c5b802 222c1a8c 52ac0f46 q.......",..R..F + 40226a80 23000000 21af6bc0 20002222 0045bc06 #...!.k. ."".E.. + 40226a90 20322022 6c1a22af ff165307 46f7ff00 2 "l."...S.F... + 40226aa0 000c0229 bc271d4f 421d0532 2d01222c ...).'.OB..2-.", + 40226ab0 1a45e406 56020222 2c1a85c7 06204220 .E..V..",.... B + 40226ac0 280c0c53 39125832 e91c9ca5 4040f40c (..S9.X2....@@.. + 40226ad0 03c00500 06040000 2d0d452c 02d80d56 ........-.E,...V + 40226ae0 5dfc46f4 ff000000 284e6642 22280c0c ].F.....(NfB"(.. + 40226af0 33391246 06000000 222c150c 04e03e20 39.F....",....> + 40226b00 8c72c02c 20c5beff 0601002d 0c45ceff .r., ......-.E.. + 40226b10 0c020871 c861d851 e841f831 12c1200d ...q.a.Q.A.1.. . + 40226b20 f0000000 00692240 24d9fe3f 90732240 .....i"@$..?.s"@ + 40226b30 80672240 12c1c0e9 c1ed020c 02d9d129 .g"@...........) + 40226b40 0109f1c9 e1f9b1dd 037c4216 5e13382e .........|B.^.8. + 40226b50 1603130c 032d0dc5 aa0231f2 ff2d0d45 .....-....1..-.E + 40226b60 ac023d01 0c04e02e 20c55506 2d0ec20e ..=..... .U.-... + 40226b70 14c54406 80220120 38317c12 379c0246 ..D..". 81|.7..F + 40226b80 4000f184 ff42a56d 3d0f22a0 6c01306d @....B.m=.".l.0m + 40226b90 c00000cd 023d022d 0d85a602 cc5c7cf2 .....=.-.....\|. + 40226ba0 06380000 0021e0ff 3d0cc5f3 050c1222 .8...!..=......" + 40226bb0 4c51e26c 1542a577 3d0f1cc2 01256dc0 LQ.l.B.w=....%m. + 40226bc0 0000290c 5d021642 fd42a57a 3d0f2c02 ..).]..B.B.z=.,. + 40226bd0 52610401 1f6dc000 00584129 25280c28 Ra...m...XA)%(.( + 40226be0 221692fb 221d11d9 1c292c22 0d040c44 "..."....),"...D + 40226bf0 224c0c22 0d05cb3c 224c0d22 0d06224c "L."...<"L.".."L + 40226c00 0e220d07 224c0f0c 12224c48 282e22c2 .".."L..."LH(.". + 40226c10 0c010069 c0000032 1d11282e 39020c32 ...i...2..(.9..2 + 40226c20 291e280c 3d0ec5e0 0531c0ff d02d2045 ).(.=....1...- E + 40226c30 9e0231af fe2d0d45 9d0231bd ff0c442d ..1..-.E..1...D- + 40226c40 0d859d02 320d244c 02202320 224d2428 ....2.$L. # "M$( + 40226c50 0c0c1345 3d06280c 38223843 8c13c003 ...E=.(.8"8C.... + 40226c60 00222c13 47620731 4aff2d0d c5990232 .",.Gb.1J.-....2 + 40226c70 2c130c02 37630c32 0d080c82 20232022 ,...7c.2.... # " + 40226c80 4d080c02 08f1c8e1 d8d1e8c1 f8b112c1 M............... + 40226c90 400df000 a4052340 12c1d0d9 91d10f6b @.....#@.......k + 40226ca0 09b1c9a1 e26108f9 712050f4 f81dc80f .....a..q P..... + 40226cb0 ac5c221c 10e83c57 92353d0c 2d0f5261 .\".......B.. E..a.j + 40226e20 480dc806 0c035d06 9c8c284c 22c2fbf6 H.....]...(L"... + 40226e30 220b28dc 2024c037 32033d02 ed0cc83c ".(. $.72.=....< + 40226e40 06f9ff00 16de0150 2520e03e 20591169 .......P% .> Y.i + 40226e50 0145a802 31d0fe5c 842d0e01 ab69c000 .E..1..\.-...i.. + 40226e60 00680158 11280668 0d0c040c 979c4238 .h.X.(.h......B8 + 40226e70 4277930b 38d23036 c0473303 4d03cd02 Bw..8.06.G3.M... + 40226e80 2832c6f9 ff9c9c3d 0c2d05c5 a40231c1 (2.....=.-....1. + 40226e90 fe42a069 2d0c019c 69c00000 86000000 .B.i-...i....... + 40226ea0 cc030c02 31b9ff4b fff71302 86bdff08 ....1..K........ + 40226eb0 b1c8a1d8 91e881f8 7112c130 0df00000 ........q..0.... + 40226ec0 72221552 12086852 32120448 3256f704 r".R..hR2..H2V.. + 40226ed0 8c06cc25 28120df0 219b6a28 029cb272 ...%(...!.j(...r + 40226ee0 12113797 0f781277 940a7212 10579704 ..7..x.w..r..W.. + 40226ef0 78027716 5f283286 f8ff0000 21946a28 x.w._(2.....!.j( + 40226f00 029c9272 12113797 0f781277 940a7212 ...r..7..x.w..r. + 40226f10 10579704 78027716 3b283286 f8ff0df0 .W..x.w.;(2..... + 40226f20 1604fb16 d3fa2187 6a28028c e2521211 ......!.j(...R.. + 40226f30 37950458 1257141c 283246fb ff21836a 7..X.W..(2F..!.j + 40226f40 28028cf2 52121137 95055222 01571404 (...R..7..R".W.. + 40226f50 283206fb ff0df000 12c1f0c2 61020261 (2..........a..a + 40226f60 03d26101 e901cd02 16a20522 22134762 ..a........"".Gb + 40226f70 0721edfe 3d0c05b9 05220c51 d186fe66 .!..=....".Q...f + 40226f80 122a280c 8ce22822 8ca242a0 f0d03d20 .*(...("..B...= + 40226f90 015e69c0 0000280c 0c0ee922 280c42a0 .^i...(...."(.B. + 40226fa0 f3d03d20 015969c0 0000e26c 00222c1a ..= .Yi....l.",. + 40226fb0 16520022 cc68c570 0642a0fa 3d0d2d0c .R.".h.p.B..=.-. + 40226fc0 015269c0 00000831 c821d811 e80112c1 .Ri....1.!...... + 40226fd0 100df000 4ce8fe3f 38e8fe3f 31d3fe12 ....L..?8..?1... + 40226fe0 c1d04803 c9a15d02 c81209b1 d991e981 ..H...]......... + 40226ff0 f9712d03 16841cc7 14054224 17c6fcff .q-.......B$.... + 40227000 38056643 12280c16 521b3822 387316e3 8.fC.(..R.8"8s.. + 40227010 1ac00300 066a0000 26730286 3100322c .....j..&s..1.2, + 40227020 1347e309 3d0c05ae 05c60100 000022a0 .G..=.........". + 40227030 01224c64 c5d5ff32 2c00d22c 1516c304 ."Ld...2,..,.... + 40227040 160d0128 238cd228 2d8c922d 0d459e05 ...(#..(-..-.E.. + 40227050 86000000 dd032d0c 45e6ffed 02acc222 ......-.E......" + 40227060 2c130762 1821396a 0c0f5802 9cd53215 ,..b.!9j..X...2. + 40227070 10221e10 27930246 4200464f 000032a0 ."..'..FB.FO..2. + 40227080 002d0e05 58020c03 2d0e8559 02e86cf2 .-..X...-..Y..l. + 40227090 cc189cfe 684e3d0e f02f2069 11459705 ....hN=../ i.E.. + 402270a0 313dfe2d 0e42a17e 011869c0 00006811 1=.-.B.~..i...h. + 402270b0 ed0606f7 ffe1c8ff 1c432d0e 01e07ac0 .........C-...z. + 402270c0 00001c44 32cc34e0 2e2001d2 67c00000 ...D2.4.. ..g... + 402270d0 282d8c72 38628c33 2d0dc003 002d0c85 (-.r8b.3-....-.. + 402270e0 e7ff8636 00261302 06350032 2c1347e3 ...6.&...5.2,.G. + 402270f0 0a3d0c45 a1050602 00000000 22a00122 .=.E........".." + 40227100 4c6405c9 ff322c00 d22c15e2 0c261603 Ld...2,..,...&.. + 40227110 018cbd28 238c922d 0d859105 86000000 ...(#..-........ + 40227120 dd03f86c 62cc18ac 2f784f2d 063d0f69 ...lb.../xO-.=.i + 40227130 11790105 8e053117 fe2d0f42 a12001f2 .y....1..-.B. .. + 40227140 68c00000 78016811 fd0746f6 fff1a1ff h...x.h...F..... + 40227150 1c432d0f 01ba7ac0 00001c44 32cc34f0 .C-...z....D2.4. + 40227160 2f2001ac 67c00000 161df728 2d16c2f6 / ..g......(-... + 40227170 48521674 f6803e01 3038312d 0dc00400 HR.t..>.081-.... + 40227180 46d6ff00 50252052 6100856f 02522100 F...P% Ra..o.R!. + 40227190 28358c3f 293f0601 0031ec69 29037835 (5.?)?...1.i).x5 + 402271a0 31fdfd2d 0542a16a 790101d7 68c00000 1..-.B.jy...h... + 402271b0 78015d0f fd055d07 06acff78 35c6fcff x.]...]....x5... + 402271c0 08b1c8a1 d891e881 f87112c1 300df000 .........q..0... + 402271d0 12c1d06d 030c03d9 91f971dd 0240f0f4 ...m......q..@.. + 402271e0 0c124d03 604283f0 239309b1 c9a1e981 ..M.`B..#....... + 402271f0 20242037 12028625 00379d02 062400e8 $ 7...%.7...$.. + 40227200 1df0cf20 221e39f7 b20220c2 20221e1e ... ".9... . ".. + 40227210 c0c0f4f0 2211c7a2 0220c0f4 222d130c ....".... .."-.. + 40227220 430c1527 83010c05 603620c0 4c20e02e C..'....`6 .L .. + 40227230 206901c5 40046801 660210f6 3c0a0bcc i..@.h.f...<... + 40227240 c0c0f446 01000000 00c0c141 66020256 ...F.......Af..V + 40227250 9cfc56c2 03222d07 c06680c0 cfc0c252 ..V.."-..f.....R + 40227260 0469122d 0e45b804 322d13cd 02276321 .i.-.E..2-...'c! + 40227270 287d3212 042d0cdc 730c1222 4d484d0d (}2..-..s.."MHM. + 40227280 0c431ca2 01e974c0 00002d0c 86000000 .C....t...-..... + 40227290 7c4208b1 c8a1d891 e881f871 12c1300d |B.........q..0. + 402272a0 f0000000 12c1f0d9 11d812c9 210931cd ............!.1. + 402272b0 02220d24 67621832 1d3a7cf2 f6832846 .".$gb.2.:|...(F + 402272c0 0300287c 9ce24212 04ccc428 42226c07 ..(|..B....(B"l. + 402272d0 221d3956 b2fe8603 0038122d 0c05efff ".9V.....8.-.... + 402272e0 cc4286fa ff000c02 0831c821 d81112c1 .B.......1.!.... + 402272f0 100df000 12c1e0d9 51dd02e9 41f93109 ........Q...A.1. + 40227300 71c9610c 0fc5f9ff e2cd18c8 6d169c04 q.a.........m... + 40227310 221c062a fff0f0f4 221c05f2 5c06273f "..*...."...\.'? + 40227320 383d0c2d 0ec56e05 221c05f2 1c063199 8=.-..n.".....1. + 40227330 fd20ffc0 225d1a42 a35f2d0c 017368c0 . .."].B._-..sh. + 40227340 0000280d 0c333912 322204f0 f0f41623 ..(..39.2".....# + 40227350 00c00300 f25d1a06 ecff0871 c861d851 .....].....q.a.Q + 40227360 e841f831 12c1200d f0000000 12c1f058 .A.1.. ........X + 40227370 62093139 12321506 4040f43a 34325506 b.19.2..@@.:42U. + 40227380 42521a05 f7ff0831 0c0212c1 100df000 BR.....1........ + 40227390 12c1f058 620931c9 21391232 15064040 ...Xb.1.!9.2..@@ + 402273a0 f40c0cc9 b23a3432 55064252 1a45f4ff .....:42U.BR.E.. + 402273b0 08312d0c c82112c1 100df000 12c1f009 .1-..!.......... + 402273c0 31304074 9c123222 158c7338 124532ff 10@t..2"..s8.E2. + 402273d0 46010000 3812c541 ff083112 c1100df0 F...8..A..1..... + 402273e0 28052340 12c1e00c 03390109 7132a0f4 (.#@.....9..q2.. + 402273f0 acc21031 20457505 26120e21 f9ff0113 ...1 Eu.&..!.... + 40227400 6bc00000 32a0f446 05002801 0c034202 k...2..F..(...B. + 40227410 6037940b 0c133242 600c0332 52310c03 `7....2B`..2R1.. + 40227420 08712d03 12c1200d f0000000 fc042340 .q-... .......#@ + 40227430 12c1e0c2 610620c2 2022a000 29010971 ....a. . "..)..q + 40227440 22a0f416 fc033d01 2d0c0570 0526120f ".....=.-..p.&.. + 40227450 21f7ff01 fe6ac000 0022a0f4 86090000 !....j..."...... + 40227460 42210022 a0003204 60661319 222c0066 B!."..2.`f..",.f + 40227470 b2073214 31281405 36022801 0c033252 ..2.1(..6.(...2R + 40227480 31324260 0c020871 c86112c1 200df000 12B`...q.a.. ... + 40227490 12c1f0c9 210931cd 0222a0f4 acdc380c ....!.1.."....8. + 402274a0 ac933833 0c022793 23222c1a 8c92280c ..83..'.#",...(. + 402274b0 05f3ff20 2074c604 00212169 c0200028 ... t...!!i. .( + 402274c0 02051906 226c1a56 32fe22a0 ff0831c8 ...."l.V2."...1. + 402274d0 2112c110 0df00000 12c1d0d9 91dd03f9 !............... + 402274e0 713d02fd 022d0dc9 a109b1e9 81cd0459 q=...-.........Y + 402274f0 01051102 2d0f85f9 ff9cbc22 0f60ccb2 ....-......".`.. + 40227500 321c042d 0d052d02 06030000 00321f31 2..-..-......2.1 + 40227510 221c042a 23225f31 280fed0c 283216a2 "..*#"_1(...(2.. + 40227520 06280156 e20716bc 07221c04 0c053119 .(.V....."....1. + 40227530 fd59bf42 a4981b22 591101c5 6ac00000 .Y.B..."Y...j... + 40227540 5811421c 043d02ed 022d0c05 be014d02 X.B..=...-....M. + 40227550 2d0c4911 85840148 11610efd 9cc4280f -.I....H.a....(. + 40227560 0c533912 5832d91f 69113d0e c0050028 .S9.X2..i.=....( + 40227570 4d681166 4205280f 0c333912 42a4a83d Mh.fB.(..39.B..= + 40227580 062d0e01 e167c000 00060600 165e0142 .-...g.......^.B + 40227590 1e05322e 01222f1a c535062d 0e058001 ..2.."/..5.-.... + 402275a0 e80e86f9 ff2801cc 92cc7c0c 043d0d2d .....(....|..=.- + 402275b0 0f0514ff 08b10c02 c8a1d891 e881f871 ...............q + 402275c0 12c1300d f0000000 12c1d0d9 91dd03f9 ..0............. + 402275d0 713d02fd 022d0dc9 a109b1e9 81cd0459 q=...-.........Y + 402275e0 01050202 2d0f85ea ff9cbc22 0f60ccb2 ....-......".`.. + 402275f0 321c042d 0d051e02 06030000 00321f31 2..-.........2.1 + 40227600 221c042a 23225f31 280fed0c 28321662 "..*#"_1(...(2.b + 40227610 06280156 a207167c 07221c04 31defc42 .(.V...|."..1..B + 40227620 a3051b22 018b6ac0 0000421c 043d020c ..."..j...B..=.. + 40227630 05ed022d 0c45af01 4d022d0c 49110576 ...-.E..M.-.I..v + 40227640 01481161 d4fc9ce4 280f0c53 39125832 .H.a....(..S9.X2 + 40227650 d91f6911 3d0ec005 00284d68 11664207 ..i.=....(Mh.fB. + 40227660 222f000c 33326201 42a3153d 062d0e01 "/..32b.B..=.-.. + 40227670 a667c000 00060600 165e0142 1e05322e .g.......^.B..2. + 40227680 01222f1a 0527062d 0e457101 e80e86f9 ."/..'.-.Eq..... + 40227690 ff2801cc 92cc7c0c 043d0d2d 0f4515ff .(....|..=.-.E.. + 402276a0 08b10c02 c8a1d891 e881f871 12c1300d ...........q..0. + 402276b0 f0000000 12c1f009 3132a0f4 9c022802 ........12....(. + 402276c0 8cc24832 32a00037 140545d6 ff203074 ..H22..7..E.. 0t + 402276d0 08312d03 12c1100d f0000000 74682240 .1-.........th"@ + 402276e0 9c692240 12c1d0d9 91d1aafc e98142a4 .i"@..........B. + 402276f0 0fed023d 0d22a06c c9a1f971 09b10154 ...=.".l...q...T + 40227700 6ac00000 cd02f2a0 ff167208 282e2832 j.........r.(.(2 + 40227710 2901c588 02dd0242 a41f16b2 062102fd )......B.....!.. + 40227720 3d0c453c 053d0cd0 2d2085ed 0131ebff =.E<.=..- ...1.. + 40227730 2d0d05ef 010c0222 6c15e90c 0c12291e -......"l.....). + 40227740 d91c282e 3111f442 12022d0d c5ed010c ..(.1..B..-..... + 40227750 22224c51 280c51e2 ff222202 3d014212 ""LQ(.Q.."".=.B. + 40227760 00d02d20 05880220 f074803f 01f24c26 ..- ... .t.?..L& + 40227770 3038317c c421ecfc 4793183d 0c853805 081|.!..G..=..8. + 40227780 221d1045 51ff42a4 403182fc 2d0c015e "..EQ.B.@1..-..^ + 40227790 67c00000 08b12d0f c8a1d891 e881f871 g.....-........q + 402277a0 12c1300d f0000000 346b2240 12c1d0d9 ..0.....4k"@.... + 402277b0 91d178fc e98142a5 b8ed023d 0d22a06c ..x...B....=.".l + 402277c0 c9a109b1 f9710122 6ac00000 cd0222a0 .....q."j.....". + 402277d0 ff16fc07 857c02fd 0242a5c1 16720628 .....|...B...r.( + 402277e0 2e31e9f3 4212022d 0f05e401 32a0ff2d .1..B..-....2..- + 402277f0 0fc5eb01 4d0216b2 0321e0fb 3d0c4901 ....M....!..=.I. + 40227800 452e0521 62fd4801 c0200028 02426c15 E..!b.H.. .(.Bl. + 40227810 224c500c a229ace9 0c0c2229 1e3d0e2d "LP..)....").=.- + 40227820 04490105 de014801 31e0ff2d 0485dd01 .I....H.1..-.... + 40227830 0c028607 0042a5da d03d20f0 2f200132 .....B...= ./ .2 + 40227840 67c00000 42a5db2d 0c3d0d01 2f67c000 g...B..-.=../g.. + 40227850 0022a0ff 08b1c8a1 d891e881 f87112c1 ."...........q.. + 40227860 300df000 d4e6fe3f dc6f2240 41feff21 0......?.o"@A..! + 40227870 feff12c1 f00cf51c a3093101 26b2c000 ..........1.&... + 40227880 00083112 c1100df0 d8d7fe3f 6388fe3f ..1........?c..? + 40227890 12c1d0e9 81f971e1 fcfff0f2 11c9a1cd ......q......... + 402278a0 022a2fe0 22b0d991 d80209b1 ac6d580d .*/."........mX. + 402278b0 281d5261 00854e01 31f5ff2d 0d42a0a5 (.Ra..N.1..-.B.. + 402278c0 011267c0 00005801 dd055605 feca2fe0 ..g...X...V.../. + 402278d0 22b00c03 3902cacf e0ccb00c 02224c14 "...9........"L. + 402278e0 08b1c8a1 d891e881 f87112c1 300df000 .........q..0... + 402278f0 12c1e00c 090ca871 e4ffc961 d951f931 .......q...a.Q.1 + 40227900 dd020971 e941fd09 2d094d09 ad0880c8 ...q.A..-.M..... + 40227910 2080b820 62071466 9a07cc46 40a07446 .. b..f...F@.tF + 40227920 0900ac26 8cdd580d e817e795 07402074 ...&..X......@ t + 40227930 06240000 00520715 66167c68 0716b606 .$...R..f.|h.... + 40227940 97350440 80749d05 1b444040 7472c718 .5.@.t...D@@tr.. + 40227950 6694c022 a0ff17e3 6a669a07 07636446 f.."....jf...cdF + 40227960 02000000 a0c07486 07000000 269c05c0 ......t.....&... + 40227970 c0748603 00b0c074 669b0822 a0ff2698 .t.....tf.."..&. + 40227980 4280c074 2d0c85f0 ff41bfff f02c118c B..t-....A...,.. + 40227990 7d580dca 324033b0 5913ca22 4022b00c }X..2@3.Y.."@".. + 402279a0 03324215 c0207446 06000000 27359840 .2B.. tF....'5.@ + 402279b0 b0742d05 06e4ff00 f7358c40 c074fd05 .t-......5.@.t.. + 402279c0 06e1ff00 0871c861 d851e841 f83112c1 .....q.a.Q.A.1.. + 402279d0 200df000 12c1e0c9 61c813d9 51e941dd .......a...Q.A. + 402279e0 02f931ed 03fd043d 050c642d 0c097101 ..1....=..d-..q. + 402279f0 8965c000 000c643d 0f4a2c01 8665c000 .e....d=.J,..e.. + 40227a00 000c8222 4c0c486d 0c02224c 0d3d0e2d ..."L.Hm.."L.=.- + 40227a10 0dc00400 0871c861 d851e841 f83112c1 .....q.a.Q.A.1.. + 40227a20 200df000 12c1e0c9 61c197ff d951e941 .......a....Q.A + 40227a30 f9310971 0c0de2a0 eff2a002 320c14ac .1.q........2... + 40227a40 03220c15 1b222020 74224c15 273e0566 ."..." t"L.'>.f + 40227a50 130ab622 0d2d0d85 e3ff4601 00663302 ...".-....F..f3. + 40227a60 f24c141b ddc2cc18 669dd008 71c861d8 .L......f...q.a. + 40227a70 51e841f8 3112c120 0df00000 12c1f02d Q.A.1.. .......- + 40227a80 030c23c9 21d91109 31dd0450 c52005e6 ..#.!...1..P. .. + 40227a90 ff204074 80340122 a0ff9623 02303831 . @t.4."...#.081 + 40227aa0 617afff0 53113a75 6077b072 0714b627 az..S.:u`w.r...' + 40227ab0 0e3a3560 33b08b23 290d4b33 390c2d04 .:5`3..#).K39.-. + 40227ac0 0831c821 d81112c1 100df000 6488fe3f .1.!........d..? + 40227ad0 12c1d0d9 91f971d2 c233fd02 4b223911 ......q..3..K"9. + 40227ae0 29010c04 2ca30c32 e98109b1 c9a14532 )...,..2......E2 + 40227af0 01ed027c f2165e09 c81e0c07 0c18724c ...|..^.......rL + 40227b00 14824c15 0c643d0d 22cc1679 21893101 ..L..d=."..y!.1. + 40227b10 4165c000 0031edff 0c6422cc 20013d65 Ae...1...d". .=e + 40227b20 c0000031 45690c64 2d0c013a 65c00000 ...1Ei.d-..:e... + 40227b30 0c644a2c 3d0d0137 65c00000 38010c44 .dJ,=..7e...8..D + 40227b40 22cc1c01 3465c000 00381142 a00422cc "...4e...8.B..". + 40227b50 26013065 c000000c 63782188 31324c12 &.0e....cx!.12L. + 40227b60 0c43324c 130c8222 4c10224c 0c486f0c .C2L..."L."L.Ho. + 40227b70 62724c0e 824c0f72 4c11224c 0d3d0ef0 brL..L.rL."L.=.. + 40227b80 2f20c004 00cd022d 0e452101 2d0c08b1 / .....-.E!.-... + 40227b90 c8a1d891 e881f871 12c1300d f0000000 .......q..0..... + 40227ba0 12c1d0e9 815138ff f0e411f9 71fd024a .....Q8.....q..J + 40227bb0 2ec9a1d9 9109b150 22b02202 146d03cd .......P"."..m.. + 40227bc0 04dd0566 22294a2e 5022b022 021532a0 ...f")J.P"."..2. + 40227bd0 e327b31b 4a3e5033 b04b332d 0f690105 .'..J>P3.K3-.i.. + 40227be0 efff6801 cc82ca2e d022b00c 33324214 ..h......"..32B. + 40227bf0 caced05c b042cf33 2d0f8b55 3d0645dd ...\.B.3-..U=.E. + 40227c00 ff08b1c8 a1d891e8 81f87112 c1300df0 ..........q..0.. + 40227c10 d4d7fe3f 70052340 12c1d030 7320f261 ...?p.#@...0s .a + 40227c20 0720f220 22c23329 0128073d 0fc9a179 . . ".3).(.=...y + 40227c30 1109b1d9 91e981cd 0445af00 7c437811 .........E..|Cx. + 40227c40 56821548 0722a0f0 20341022 af202a23 V..H.".. 4.". *# + 40227c50 16820916 54090c13 2d0745c9 ff204074 ....T...-.E.. @t + 40227c60 80640178 11603831 96061360 d8313106 .d.x.`81...`.11. + 40227c70 fff0ed11 da2e3022 b0220214 cc82da2e ......0"."...... + 40227c80 3022b00c 13324214 3100ffda 2e3022b0 0"...2B.1....0". + 40227c90 22021426 1201dc2c 3d072d0f 491105e3 "..&...,=.-.I... + 40227ca0 ff3d0248 11163c0f 86000000 7cf251f6 .=.H..<.....|.Q. + 40227cb0 feda3e50 33b05203 14b62515 21d5ff8b ..>P3.R...%.!... + 40227cc0 53424200 48013d0c 2d0f85d0 ff3d0246 SBB.H.=.-....=.F + 40227cd0 32003d02 2d0c2615 02c62f00 9c123202 2.=.-.&.../...2. + 40227ce0 0c261302 46230028 02c6fbff 7c43862a .&..F#.(....|C.* + 40227cf0 00c02c20 85090116 fc0921c6 fff1e3fe .., ......!..... + 40227d00 22220552 a00042a4 733d0f01 fe65c000 "".R..B.s=...e.. + 40227d10 00167205 0c033902 31dcfeda 4e3044b0 ..r...9.1...N0D. + 40227d20 c912c804 0c145d0c bc0c3805 8c531b44 ......]...8..S.D + 40227d30 5d0306fd ff2905b6 346121d3 fedaee20 ]....)..4a!.... + 40227d40 deb0280c 290d222c 01450501 42a48b3d ..(.).",.E..B..= + 40227d50 0f2d0c01 ed65c000 00460200 51cbfeda .-...e...F..Q... + 40227d60 ee50deb0 290d0c03 060c0000 2d0c0503 .P..).......-... + 40227d70 01460900 00321204 42a00022 a0034509 .F...2..B.."..E. + 40227d80 01fd029c 323d0c2d 0f452e01 8c422d0f ....2=.-.E...B-. + 40227d90 86f6ff00 cd0f06d8 ff007cf3 08b12d03 ..........|...-. + 40227da0 c8a1d891 e881f871 12c1300d f0000000 .......q..0..... + 40227db0 a9fe0000 12c1e0e9 41ed03c9 610ce3cd ........A...a... + 40227dc0 022d0ed9 510971dd 04c5f400 7ce35662 .-..Q.q.....|.Vb + 40227dd0 0c280d3d 0c859500 56d20a28 0d32a0f0 .(.=....V..(.2.. + 40227de0 30321042 a0e04793 280c1222 41000c02 02.B..G.(.."A... + 40227df0 2241015c e2224102 220d015d 01202064 "A.\."A."..]. d + 40227e00 22410322 0d022241 04220d03 22410546 "A.".."A.".."A.F + 40227e10 1e00381c 482c3032 30470313 31e5ff20 ..8.H,020G..1.. + 40227e20 20f43712 0a283cd2 cc0c32af fc167206 .7..(<...2...r. + 40227e30 6178ff21 95fe4206 00f03411 4a532055 ax.!..B...4.JS U + 40227e40 b0520514 b6250e40 33802033 b0522d00 .R...%.@3. 3.R-. + 40227e50 32230137 151242a0 00320214 b6231458 2#.7..B..2...#.X + 40227e60 0d381237 950d4246 003d0e2d 0c05d3ff .8.7..BF.=.-.... + 40227e70 86080000 1b4422c2 186694dc 4d0e3d0d .....D"..f..M.=. + 40227e80 2d0c45d9 ff460300 00516b68 42cc333d -.E..F...QkhB.3= + 40227e90 0e2d0c05 b4ff3d02 08712d03 c861d851 .-....=..q-..a.Q + 40227ea0 e84112c1 200df000 12c1a042 1205c261 .A.. ......B...a + 40227eb0 16d26115 026117dd 02e26114 f261130c ..a..a....a..a.. + 40227ec0 e2cd0347 32028684 00e81d22 0e0d320e ...G2......"..2. + 40227ed0 0c802211 30222026 820a32a6 08371223 ..".0" &..2..7.# + 40227ee0 067e0000 00220c39 57e20246 7b0032af .~...".9W..F{.2. + 40227ef0 f2d02d20 05e20056 121e3d0c 2d0dc52f ..- ...V..=.-../ + 40227f00 00067700 220c3957 e2028673 0022cc33 ..w.".9W...s.".3 + 40227f10 29512c92 47320246 7000220e 0f320e0e )Q,.G2.Fp."..2.. + 40227f20 80221130 222026f2 02c66b00 220e1226 .".0" &...k."..& + 40227f30 62028669 00220e13 26420246 6700220e b..i."..&B.Fg.". + 40227f40 11320e10 80221130 22202682 02c66200 .2...".0" &...b. + 40227f50 0c4432ce 1c4a2132 6106012e 64c00000 .D2..J!2a...d... + 40227f60 22ce263d 0229810c 442d0101 2a64c000 ".&=.)..D-..*d.. + 40227f70 004b3c0c 04281c39 91497147 120e3801 .K<..(.9.IqG..8. + 40227f80 2033c00c 12302493 20207429 7122ce16 3...0$. t)q".. + 40227f90 38712941 0c2f0c12 30f29322 2101ec32 8q)A./..0.."!..2 + 40227fa0 220e1532 0e148022 11302220 66f20286 "..2...".0" f... + 40227fb0 2a0032a2 00371202 0648004b 312d0c45 *.2..7...H.K1-.E + 40227fc0 d7fc8645 00c03c20 45760056 12fd2221 ...E..< Ev.V.."! + 40227fd0 0132a0f0 20231032 a0e03712 c23d0f4b .2.. #.2..7..=.K + 40227fe0 21c590ff 80220196 52fb2088 31f09811 !...."..R. .1... + 40227ff0 8a79f125 fed07711 7aff0c22 3841224f .y.%..w.z.."8A"O + 40228000 140c648b 2f79c189 a199b101 0264c000 ..d./y.......d.. + 40228010 000c0222 4f1598b1 78c188a1 311bfe7a ..."O...x...1..z + 40228020 23280216 92f78a49 3034b048 02f81249 #(.....I04.H...I + 40228030 033116fe 42a1ff79 c189a192 610b0132 .1..B..y....a..2 + 40228040 65c00000 58414851 3d0f2d0c 4598ff2d e...XAHQ=.-.E..- + 40228050 0fc5d400 98b188a1 78c186ef ff222107 ........x...."!. + 40228060 16820722 a002224e 150c0f38 612881f2 ...".."N...8a(.. + 40228070 4e140c44 01e863c0 00003891 28610c44 N..D..c...8.(a.D + 40228080 01e563c0 00003841 0c6422ce 2001e163 ..c...8A.d". ..c + 40228090 c0000038 410c642d 0e01de63 c0000038 ...8A.d-...c...8 + 402280a0 5128410c 6401db63 c000000c 6438514a Q(A.d..c....d8QJ + 402280b0 2e01d863 c0000032 1d044d0f 0c3245d5 ...c...2..M..2E. + 402280c0 00ed02f7 1205d03d 2045fa00 422c06e0 .......= E..B,.. + 402280d0 3e202d0c c004002d 0e45cc00 2d0d05cc > -....-.E..-... + 402280e0 00022117 0c02c221 16d22115 e22114f2 ..!....!..!..!.. + 402280f0 211312c1 600df000 12c1f0d9 11d1e2fd !...`........... + 40228100 c921e901 02610320 e220c2a0 00220d14 .!...a. . ...".. + 40228110 8c82284d e792042d 0c4577ff 1bccd2cd ..(M...-.Ew..... + 40228120 18669ce8 0831c821 d811e801 12c1100d .f...1.!........ + 40228130 f0000000 d0160000 12c1f021 14fb0931 ...........!...1 + 40228140 0c53c020 00390231 fbff21fd 65c02000 .S. .9.1..!.e. . + 40228150 390221c7 f90cc3c0 20003902 21c4f90c 9.!..... .9.!... + 40228160 63c02000 39024593 00c51106 053efe45 c. .9.E......>.E + 40228170 1b040831 12c1100d f0000000 12c1f0d9 ...1............ + 40228180 11dd0221 8ff3c921 c8020931 2d0c9ce2 ...!...!...1-... + 40228190 32023907 630b480d 38123034 30482247 2.9.c.H.8.040H"G + 402281a0 033a2802 86f9ff00 220c3907 e207c80c .:(.....".9..... + 402281b0 564cff06 0500222d 00c03c20 05570056 VL...."-..< .W.V + 402281c0 b2fec58a ec271c14 86f8ff21 8da62802 .....'.....!..(. + 402281d0 8c923202 390c0430 30043024 830831c8 ..2.9..00.0$..1. + 402281e0 21d81112 c1100df0 54e7fe3f 4ce7fe3f !.......T..?L..? + 402281f0 00440000 50e7fe3f 58e7fe3f 12c1d0e9 .D..P..?X..?.... + 40228200 81e812c9 a1f97109 b1d991cd 02220e01 ......q......".. + 40228210 5d03320e 00802211 30222080 f2112028 ].2...".0" ... ( + 40228220 4120ff20 f0f0f4f0 2c412642 072d0c05 A . ....,A&B.-.. + 40228230 b7000680 00220e03 320e0280 22113022 ....."..2...".0" + 40228240 2080d211 20284120 dd20f0f8 34221c05 ... (A . ..4".. + 40228250 e0ff11d0 d0f4f732 d3221c04 d732cdf0 .......2."...2.. + 40228260 3f202d0e 52610245 400856f2 fb3d0d2d ? -.Ra.E@.V..=.- + 40228270 0c85d200 320e1172 0e10220e 12803311 ....2..r.."...3. + 40228280 70632000 22116032 20220e13 d1d7ff80 pc .".`2 "...... + 40228290 22013022 20290d62 0e0d820e 0c320e0e ".0" ).b.....2.. + 402282a0 80661100 33118076 20706320 320e0f41 .f..3..v pc 2..A + 402282b0 cfff8033 01603320 390432a0 f0302210 ...3.`3 9.2..0". + 402282c0 32a0e058 21379219 22053980 2201d672 2..X!7..".9."..r + 402282d0 052d053d 0dc50606 582116b2 046d0586 .-.=....X!...m.. + 402282e0 48006d05 0c172206 3907e209 acd72134 H.m...".9.....!4 + 402282f0 f3680206 0a003226 0116f3fe 222d0027 .h....2&...."-.' + 40228300 9302c63f 00603620 59216911 79010542 ...?.`6 Y!i.y..B + 40228310 00582168 11780156 a20e86f3 ff680657 .X!h.x.V.....h.W + 40228320 96016805 0c077796 bc320e09 1c122713 ..h...w..2....'. + 40228330 02463300 fafe220f 03320f02 80221130 .F3..."..2...".0 + 40228340 222031ab ff371202 862d006d 0516c6ed " 1..7...-.m.... + 40228350 220e0632 0e072020 54803311 30222056 "..2.. T.3.0" V + 40228360 a2ec21a5 fff1a3ff e2620052 6f003d05 ..!......b.Ro.=. + 40228370 2d0c5261 02451f01 582156e2 06220e09 -.Ra.E..X!V..".. + 40228380 262233f6 320d6612 3a3d052d 0c05b705 &"3.2.f.:=.-.... + 40228390 06160000 2662121c 13379227 3d05c02c ....&b...7.'=.., + 402283a0 20054904 06110000 00003d05 2d0c0573 .I.......=.-..s + 402283b0 02c60d00 0000004d 0d3d052d 0c450406 .......M.=.-.E.. + 402283c0 060a0000 222d0050 35204536 00dc5228 ...."-.P5 E6..R( + 402283d0 0d32a0f0 20231032 a0e03712 08e91c0c .2.. #.2..7..... + 402283e0 232d0c85 cb05c02c 20459b00 3183ff22 #-....., E..1.." + 402283f0 a0002263 00317dff 290f2903 290d060d .."c.1}.).).)... + 40228400 000062a0 003179ff 22230016 e2f35035 ..b..1y."#....P5 + 40228410 20592169 11853100 58216811 56d2e031 Y!i..1.X!h.V..1 + 40228420 73ff2803 32a0f020 231032a0 e0379202 s.(.2.. #.2..7.. + 40228430 467eff86 c5ff08b1 0c02c8a1 d891e881 F~.............. + 40228440 f87112c1 300df000 c8d8fe3f 12c1b060 .q..0......?...` + 40228450 60745050 74707074 e26110f9 f1697102 `tPPtppt.a...iq. + 40228460 6113c261 12d26111 39515961 7941fd02 a..a..a.9QYayA.. + 40228470 ed046211 2c16541a 1616063b 567cc220 ..b.,.T....;V|. + 40228480 551050c0 f4003c11 3030312d 0f6981d2 U.P...<.001-.i.. + 40228490 cc144588 00d0d0f4 68818c32 7ce2866b ..E.....h..2|..k + 402284a0 00281f32 21154d06 698101da 62c00000 .(.2!.M.i...b... + 402284b0 6881c7b6 0e281f60 4cc00c03 6a2201d4 h....(.`L...j".. + 402284c0 62c00000 0c02c051 414d0257 a214381f b......QAM.W..8. + 402284d0 30329032 13001b22 3a4446fb ffd2a014 02.2...":DF..... + 402284e0 42a00032 a0142d0f 4981c582 00488156 B..2..-.I....H.V + 402284f0 92fa281f 58616841 52420862 4209780e ..(.XahARB.bB.x. + 40228500 51987970 38746871 32421170 38753242 Q.yp8thq2B.p8u2B + 40228510 13a0dd11 50362030 dd20803d 11d0d874 ....P6 0. .=...t + 40228520 d0332062 1f043030 f4305841 d1c7ff52 .3 b..00.0XA...R + 40228530 42018056 11606841 605520a2 1d005050 B..V.`hA`U ...PP + 40228540 f4506841 7080f580 ba117242 10624203 .PhAp.....rB.bB. + 40228550 7070f4a0 6841606b 208a7760 60f45242 pp..hA`k .w``.RB + 40228560 025a5760 b8416242 046a6558 41b24205 .ZW`.AbB.jeXA.B. + 40228570 80b51158 610c0950 bb20ba66 4a461baa ...Xa..P. .fJF.. + 40228580 68413242 00824212 92420692 4207a25d hA2B..B..B..B..] + 40228590 004a3366 66064c04 4242064a 3348518c .J3ff.L.BB.J3HQ. + 402285a0 244804dc 94522114 42050442 420c4205 $H...R!.B..BB.B. + 402285b0 0542420d 42050642 420e4205 07460400 .BB.B..BB.B..F.. + 402285c0 40587452 420d4050 7542420c 52420e40 @XtRB.@PuBB.RB.@ + 402285d0 48755202 0d42420f 72020c42 020e8055 HuR..BB.r..B...U + 402285e0 11004411 70652060 54204202 0f804401 ..D.pe `T B...D. + 402285f0 50442040 50f44040 f54a453a 343040f5 PD @P.@@.JE:40@. + 40228600 3030f43a 343040f5 4a337cf4 30343030 00.:40@.J3|.0400 + 40228610 30f43242 0a303841 32420bc6 08006812 0.2B.08A2B....h. + 40228620 ed013206 11520610 22061280 33110022 ..2..R.."...3.." + 40228630 11504320 40322022 06138022 01302220 .PC @2 "...".0" + 40228640 29016221 144d0e58 563d0f2d 06c00500 ).b!.M.XV=.-.... + 40228650 022113c2 2112d221 11e22110 f8f112c1 .!..!..!..!..... + 40228660 500df000 12c1e00c 08892189 11888170 P.........!....p + 40228670 70748901 60607450 50740261 07c5dcff pt..``tPPt.a.... + 40228680 087112c1 200df000 12c1c0c9 e1cd022d .q.. ..........- + 40228690 04d9d1e9 c1f9b139 41495109 f150d074 .......9AIQ..P.t + 402286a0 60e07470 f07445ad ff8d0238 417cc248 `.tp.tE....8A|.H + 402286b0 518cb889 017d0f6d 0e5d0d2d 0c45faff Q....}.m.].-.E.. + 402286c0 08f1c8e1 d8d1e8c1 f8b112c1 400df000 ............@... + 402286d0 54052340 12c1f08d 022139f2 0931c921 T.#@.....!9..1.! + 402286e0 28029cb2 42023907 64f57812 58086822 (...B.9.d.x.X.h" + 402286f0 50573067 052f4803 40473067 042786f7 PW0g./H.@G0g.'.. + 40228700 ff313fa5 2803cd03 9ca23202 39076313 .1?.(.....2.9.c. + 40228710 4d0221ef ff32a0c7 014d66c0 0000280c M.!..2...Mf...(. + 40228720 86000000 0c020831 c82112c1 100df000 .......1.!...... + 40228730 0b527cd6 4d020c12 57362d52 03390c22 .R|.M...W6-R.9." + 40228740 202510ac 2258130c 0257141c 38235054 %.."X...W..8#PT + 40228750 30378514 7cf23022 30204410 2044c00c 07..|.0"0 D. D.. + 40228760 130c0240 23832020 740df000 80420120 ...@#. t....B. + 40228770 38753054 20315e62 30421080 44112028 8u0T 1^b0B..D. ( + 40228780 41404520 30321030 242031fa 6642a020 A@E 02.0$ 1.fB. + 40228790 3702120b 44303141 5644ff86 02000000 7...D01AVD...... + 402287a0 27830930 31415663 ff0c120d f00c020d '..01AVc........ + 402287b0 f0000000 3480fe3f 12c1b0d2 6111f9f1 ....4..?....a... + 402287c0 026113c2 6112e261 104d02c2 020021f9 .a..a..a.M....!. + 402287d0 ff7d0328 02dd0129 410c4f92 a0615841 .}.(...)A.O..aXA + 402287e0 0c48ca25 22020187 82020664 003c020c .H.%"......d.<.. + 402287f0 ae279c1d c2040152 afdf503c 105c881b .'.....R..P<.\.. + 40228800 24879309 c204021c 0e2b44c6 00004d02 $........+D...M. + 40228810 0c8e3d0e 7cf24961 79719981 01ac65c0 ..=.|.Iayq....e. + 40228820 00006d02 3d0e7cf2 6951012d 64c00000 ..m.=.|.iQ.-d... + 40228830 48616851 78719881 1b440c03 4c1a5841 HahQxq...D..L.XA + 40228840 0bb4ca85 5208010c 4887051f 52ccd050 ....R...H...R..P + 40228850 507437b6 02464900 67930557 a2020647 Pt7..FI.g..W...G + 40228860 00e03382 ca3332c3 d0060f00 66be414c ..3..32.....f.AL + 40228870 4887053c 505014b2 c5fea08a 20b08983 H...f..U.PV .D.@E + 40228950 4033200c 12ac7780 43013028 75205420 @3 ...w.C.0(u T + 40228960 21e46120 43108044 11303841 20331040 !.a C..D.08A 3.@ + 40228970 45203034 2039070c 12c60000 00000c02 E 04 9.......... + 40228980 022113c2 2112d221 11e22110 f8f112c1 .!..!..!..!..... + 40228990 500df000 12c1e03d 010971c5 e1ff4801 P......=..q...H. + 402289a0 7cf30871 2034932d 0312c120 0df00000 |..q 4.-... .... + 402289b0 280212c1 b0d26111 e26110f9 f1026113 (.....a..a....a. + 402289c0 c26112dd 0329016d 030c4e0c 0f5d0192 .a...).m..N..].. + 402289d0 a0ff72a0 2ea20500 0c0c0ca3 2d0a4971 ..r.........-.Iq + 402289e0 59516961 79919981 a94101bd 63c00000 YQiay....A..c... + 402289f0 a84120b0 740ca32d 0ab94101 3465c000 .A .t..-..A.4e.. + 40228a00 00b8414b 81b2cb30 ca38b243 0020a074 ..AK...0.8.C. .t + 40228a10 1b2c2020 74487158 51686178 9198818c ., tHqXQhax.... + 40228a20 3acd02c6 ecff0c02 2245003d 0660ffc0 :......."E.=.`.. + 40228a30 3a2f971c 180b6c60 607447a2 2e4b81ca :/....l``tG..K.. + 40228a40 c8220c00 cd062243 001b3346 f8ff1bf2 ."...."C..3F.... + 40228a50 47a2180b ee724300 e0e0741b 631b5556 G....rC...t.c.UV + 40228a60 2ef70c02 2243002d 0d460000 0c020221 ...."C.-.F.....! + 40228a70 13c22112 d22111e2 2110f8f1 12c1500d ..!..!..!.....P. + 40228a80 f0000000 cad8fe3f 31ffff12 c1f01c04 .......?1....... + 40228a90 0931c5f1 ff083112 c1100df0 0df00000 .1....1......... + 40228aa0 0c033712 27420202 3146f142 c4d04040 ..7.'B..1F.B..@@ + 40228ab0 7438039c 6352033c 4795f562 02005203 t8..cR. + 40228e50 0656ce0f 862e0000 263e0866 4e02c63b .V......&>.fN..; + 40228e60 00c64800 216cfbe1 cdff2892 0c0542a1 ..H.!l....(...B. + 40228e70 293d0e22 610001a3 61c00000 cd021662 )=."a...a......b + 40228e80 100c3222 4c0c0c02 290cda2c 7cc322c2 ..2"L...)..,|.". + 40228e90 17302210 3bdd291c 30dd1022 a5ecf25c .0".;.).0.."...\ + 40228ea0 04d0d2c0 d7af02f0 df200c12 d25c0522 ......... ...\." + 40228eb0 5c07d0df c00c37fd 0c0c08e6 1d02862d \.....7........- + 40228ec0 0028010c 0542a14a 3d0e7911 82610201 .(...B.J=.y..a.. + 40228ed0 8d61c000 00781188 21cc722d 0c05ecff .a...x..!.r-.... + 40228ee0 06290000 0c033902 72420c82 420d290f .)....9.rB..B.). + 40228ef0 d2520442 a5ec3d0d d7a4013d 0442c214 .R.B..=....=.B.. + 40228f00 49120c14 32520542 520730dd c0fd0206 I...2R.BR.0..... + 40228f10 eaff7cce 72cd173b 2fe07710 e0221031 ..|.r..;/.w..".1 + 40228f20 9fff0c05 42a16e20 27800176 61c00000 ....B.n '..va... + 40228f30 cd021622 05da2222 c217e022 10291c0c ..."..""...".).. + 40228f40 02f25c04 f25c0529 0c224c0c 294c8609 ..\..\.)."L.)L.. + 40228f50 002130fb 3192ff28 8252a000 42a18401 .!0.1..(.R..B... + 40228f60 6961c000 00cd029c d20c0229 1cf25c04 ia.........)..\. + 40228f70 f25c0529 0ce24c0c 0c12225c 070c0222 .\.)..L..."\..." + 40228f80 4c0d2d0c 86000000 0c0208b1 c8a1d891 L.-............. + 40228f90 e881f871 12c1300d f0000000 12c1f062 ...q..0........b + 40228fa0 1204c921 3030f409 31cd024d 0367b32f ...!00..1..M.g./ + 40228fb0 521c0528 0c47b518 5044c052 1c044040 R..(.G..PD.R..@@ + 40228fc0 f46055c0 5a53525c 04cd0246 f8ff0000 .`U.ZSR\...F.... + 40228fd0 00425c05 425c048c 1245dcff 0c02290c .B\.B\...E....). + 40228fe0 0831c821 12c1100d f0000000 4d020c02 .1.!........M... + 40228ff0 8c841b32 30207448 04c6fcff 0df00000 ...20 tH........ + 40229000 9c629c43 52120442 13046802 4a454252 .b.CR..B..h.JEBR + 40229010 048c362d 06c6faff 39020df0 12c1f009 ..6-....9....... + 40229020 31c921cd 0385fdff 2d0c45d6 ff0831c8 1.!.....-.E...1. + 40229030 2112c110 0df00000 12c1f0c9 21c80209 !...........!... + 40229040 31564c00 0c020607 00421205 32120440 1VL......B..2..@ + 40229050 33c0325c 040c0339 02425204 2d0c05d4 3.2\...9.BR.-... + 40229060 ff56f2fd 2d0c0831 c82112c1 100df000 .V..-..1.!...... + 40229070 12c1d0c9 a1d99109 b1e981f9 71cd02dd ............q... + 40229080 0316b208 16830842 12043213 047c4237 .......B..2..|B7 + 40229090 b4028621 000c0fed 0f321c05 221d05e0 ...!.....2.."... + 402290a0 33c0f022 c03050f4 27230220 50f4381d 3..".0P.'#. P.8. + 402290b0 281c4d05 fa33e022 80526100 01d65fc0 (.M..3.".Ra..._. + 402290c0 00005801 221c055a ee5affe0 e0f4f0f0 ..X."..Z.Z...... + 402290d0 f4e79203 c80c0c0e 221d0527 3f05d80d ........"..'?... + 402290e0 9c4d0c0f 321d0522 1d042793 03280dec .M..2.."..'..(.. + 402290f0 22164cfa 06010000 9cec0c0f 321c0522 ".L.........2.." + 40229100 1c042793 03280ccc a256cdf8 86020000 ..'..(...V...... + 40229110 7c428601 007ca246 00000c02 08b1c8a1 |B...|.F........ + 40229120 d891e881 f87112c1 300df000 12c1d0e9 .....q..0....... + 40229130 8109b1c9 a1d991f9 71ed026d 034070f4 ........q..m.@p. + 40229140 5050f416 23060c0c fd0c16b2 05163705 PP..#.........7. + 40229150 160e058c d5321e05 37350830 55c05050 .....2..75.0U.PP + 40229160 f4860e00 221e05dd 075022c0 2020f477 ...."....P". .w + 40229170 b201dd02 381ed0d0 f4fa264d 0d5a3369 ....8.....&M.Z3i + 40229180 01791101 a45fc000 007811da ccdaff68 .y..._...x.....h + 40229190 01d0d7c0 c0c0f4f0 f0f4d070 f40c05e8 ...........p.... + 402291a0 0e06eaff 2d0c4600 000c0208 b1c8a1d8 ....-.F......... + 402291b0 91e881f8 7112c130 0df00000 12c1d0c9 ....q..0........ + 402291c0 a1d99109 b1e981f9 71dd025d 0340c0f4 ........q..].@.. + 402291d0 8c02cc33 0c02860e 00321204 0c0f7c42 ...3.....2....|B + 402291e0 c7333016 dcfe221d 05ed0cc7 b201ed02 .30..."......... + 402291f0 e0e0f428 1dfa354d 0e5901e0 ccc00185 ...(..5M.Y...... + 40229200 5fc00000 eaffc0c0 f4f0f0f4 d80d5801 _.............X. + 40229210 c6f3ff00 08b1c8a1 d891e881 f87112c1 .............q.. + 40229220 300df000 12c1f0d9 11dd022d 03380d09 0..........-.8.. + 40229230 31c921cc 632d0d06 07000000 00321d04 1.!.c-.......2.. + 40229240 42a00005 bdffcd02 1692fe3d 0d05e2ff B..........=.... + 40229250 2d0dc5b4 ff2d0c08 31c821d8 1112c110 -....-..1.!..... + 40229260 0df00000 3030f48c f2421205 47330e40 ....00...B..G3.@ + 40229270 33c03030 f4280206 fbff0c02 0df02812 3.00.(........(. + 40229280 3a322203 000df000 12c1d0e9 81f97109 :2"...........q. + 40229290 b1c9a1d9 91fd0230 e0f45050 f4168f04 .......0..PP.... + 402292a0 221f0527 3e0b20ee c0e0e0f4 f80fc6fa "..'>. ......... + 402292b0 ff000c0d d0c0f4d7 1529ca3e 3030f42d .........).>00.- + 402292c0 0f490159 11c5f9ff 48011b3d dad4620d .I.Y....H..=..b. + 402292d0 00581127 16071b2c 2020f446 0300dd03 .X.'..., .F.... + 402292e0 06f4ff00 0c028600 00214063 08b1c8a1 .........!@c.... + 402292f0 d891e881 f87112c1 300df000 12c1d06d .....q..0......m + 40229300 03321204 c9a1e981 50c0f440 e0f4d991 .2......P..@.... + 40229310 f971e0d3 c009b1ea 4cfd02d0 d0f42133 .q......L.....!3 + 40229320 63472323 c73d184d 065d0e3d 0c2d0f69 cG##.=.M.].=.-.i + 40229330 0145f5ff 68018cc2 2accc0c0 f4c6f8ff .E..h...*....... + 40229340 212b6346 00002d0c 08b1c8a1 d891e881 !+cF..-......... + 40229350 f87112c1 300df000 feff0000 12c1e0c9 .q..0........... + 40229360 61d95109 71dd02c1 2163cc33 2d0cc609 a.Q.q...!c.3-... + 40229370 00220300 1642ff22 1d04c712 ee2d0332 ."...B.".....-.2 + 40229380 6100010b 6cc00000 41f4ff38 012734db a...l...A..8.'4. + 40229390 4d020c05 2d0d45f6 ff0871c8 61d85112 M...-.E...q.a.Q. + 402293a0 c1200df0 21686112 c1f0c261 02c22200 . ..!ha....a..". + 402293b0 e2610009 31d9110c 0ebc3cd2 2c20ac9d .a..1.....<., .. + 402293c0 280dcca2 2d0dc546 00e26c20 c6060000 (...-..F..l .... + 402293d0 d03d2022 23004222 00cc94e9 03454500 .= "#.B".....EE. + 402293e0 d26c2006 01003d02 c6f9ffc8 3c06f2ff .l ...=.....<... + 402293f0 0831c821 d811e801 12c1100d f0000000 .1.!............ + 40229400 6388fe3f dcd8fe3f 12c1f0d9 1120d074 c..?...?..... .t + 40229410 2101fa31 fbff2802 0c0542a1 59c26102 !..1..(...B.Y.a. + 40229420 09310138 60c00000 cd029cc2 32a00042 .1.8`.......2..B + 40229430 a01c01f7 5ec00000 22af8022 4c0a21f1 ....^...".."L.!. + 40229440 ffd24c10 3802c902 393c0831 2d0cd811 ..L.8...9<.1-... + 40229450 c82112c1 100df000 41ebff12 c1f03804 .!......A.....8. + 40229460 09312793 0e383339 04460600 00004833 .1'..839.F....H3 + 40229470 cc843833 5663ffc6 02000000 4792f248 ..83Vc......G..H + 40229480 324933c6 faff31de ff42a145 011f60c0 2I3...1..B.E..`. + 40229490 00000831 12c1100d f0000000 0c044713 ...1..........G. + 402294a0 02422300 49020c02 0df00000 0c044713 .B#.I.........G. + 402294b0 02422300 49120c02 0df00000 39524962 .B#.I.......9RIb + 402294c0 0df00000 12c1d0d2 610930d3 20e9811c ........a.0. ... + 402294d0 43ed022d 0df97109 b1c9a140 f4208583 C..-..q....@. .. + 402294e0 ffac520c 043d040c 128592ff cd02cc32 ..R..=.........2 + 402294f0 7cf28619 00221d04 16d201d0 3d20c02c |...."......= ., + 40229500 2085b1ff 46040000 000032af ecd02d20 ...F.....2...- + 40229510 4580ff56 92fdd0cd 20f02f20 c5c5fe56 E..V.... ./ ...V + 40229520 e2007cc2 d71c342d 0c4587ff 7cc2860a ..|...4-.E..|... + 40229530 003d0e8c 3e480e56 14004b32 720e1062 .=..>H.V..K2r..b + 40229540 0e09520e 0af04f20 2261002d 0c4511ff ..R...O "a.-.E.. + 40229550 ed02d71c 062d0c85 84ff2d0e 08b1c8a1 .....-....-..... + 40229560 d891e881 f87112c1 300df000 12c1d0d9 .....q..0....... + 40229570 91e981d1 a4ffed02 2812c9a1 f97109b1 ........(....q.. + 40229580 0c037202 09c80dfd 0356f304 16cc0422 ..r......V....." + 40229590 0c100c03 77923c28 0c371209 3113fb48 ....w.<(.7..1..H + 402295a0 030c0347 922d685c 0c033716 26286c51 ...G.-h\..7.&(lQ + 402295b0 0ffb3d0c 7901e04e 20c00600 0c037801 ..=.y..N .....x. + 402295c0 3712100c 0e0c13e7 1f09283c 293f280d 7.........(<)?(. + 402295d0 c90d293c fd0cc83c 46ebff00 08b12d03 ..)<....3)3F..A?_"d../ + 40229c50 01721e11 621e1032 2e0a222e 174b5e4d .r..b..2.."..K^M + 40229c60 0e85eb01 422e268c 54286e7c 83c00400 ....B.&.T(n|.... + 40229c70 31395f2d 0e42a3bc f83e0123 5ec00000 19_-.B...>.#^... + 40229c80 e801860b 00220e38 320e391b 22202074 .....".82.9." t + 40229c90 224e38f8 3e37321b 0c02422e 25224e38 "N8.>72...B.%"N8 + 40229ca0 cc642d0e 45140246 0200286e 3d0ec004 .d-.E..F..(n=... + 40229cb0 0016d2fe e901ed0f c676ff00 d1245f58 .........v...$_X + 40229cc0 0d160504 38d5280c 3022c032 a1e027b3 ....8.(.0".2..'. + 40229cd0 2e2d0559 21c5baff 58212835 8c4e293e .-.Y!...X!(5.N)> + 40229ce0 86000000 290d311b 5f2d0542 a3eef835 ....).1._-.B...5 + 40229cf0 01065ec0 00005d0e ed055d0f 46f0ff00 ..^...]...].F... + 40229d00 f83586fc ff08b1c8 a1d891e8 81f87112 .5............q. + 40229d10 c1300df0 e0d8fe3f 12c1f009 3145c8ff .0.....?....1E.. + 40229d20 31fdff22 03001b22 20207422 43000762 1.."..." t"C..b + 40229d30 0245d4ff 083112c1 100df000 12c1c0c9 .E...1.......... + 40229d40 e1cd0228 42f9b109 f1d9d1e9 c130f320 ...(B........0. + 40229d50 66920e21 fe5ec03c 20c5b7ff 42a16746 f..!.^.< ...B.gF + 40229d60 1800222c 173d0c29 41280ce8 ac290128 ..",.=.)A(...).( + 40229d70 1cd22c26 2911221c 10295122 1c112961 ..,&)."..)Q"..)a + 40229d80 222c0622 610721ef 5ec5b4ff 222c1f8c ",."a.!.^...",.. + 40229d90 1205adff 222c1e8c 1285acff 222c208c ....",......", . + 40229da0 1205acff 160f0172 21066221 0528414b .......r!.b!.(AK + 40229db0 514d013d 0e45d601 8c5d2871 7c83c00d QM.=.E...](q|... + 40229dc0 0042a184 31e45ec0 2c2001cf 5dc00000 .B..1.^., ..]... + 40229dd0 08f1c8e1 d8d1e8c1 f8b112c1 400df000 ............@... + 40229de0 12c1f00c 13093145 f5ff0831 12c1100d ......1E...1.... + 40229df0 f0000000 12c1f0d2 610120d2 202185f7 ........a. . !.. + 40229e00 31d55e22 22040c05 42a458c9 21093101 1.^""...B.X.!.1. + 40229e10 bd5dc000 00cd028c d21c443d 0d017d5c .]........D=..}\ + 40229e20 c0000028 1c85f6fe 08312d0c d811c821 ...(.....1-....! + 40229e30 12c1100d f0000000 ac83fe3f 31ffff41 ...........?1..A + 40229e40 d4f32803 48044a22 16a2ff29 030df000 ..(.H.J"...).... + 40229e50 680b0000 6c992240 c0d40100 12c1d0f9 h...l."@........ + 40229e60 7120f074 216cf7c9 a1c1ba5e 28220c05 q .t!l.....^(".. + 40229e70 42a4bd3d 0cd991e9 8109b122 610001a1 B..=......."a... + 40229e80 5dc00000 ed02d1c2 f356f207 21b05e0c ]........V..!.^. + 40229e90 05680d38 022d059c 1348d340 46c05734 .h.8.-...H.@F.W4 + 40229ea0 035d042d 03383306 fbff0000 8c1205f3 .].-.83......... + 40229eb0 ff28010c 0542a4c4 3d0c0192 5dc00000 .(...B..=...]... + 40229ec0 ed025662 04219f5e 0c05880d 380272a0 ..Vb.!.^....8.r. + 40229ed0 7f2d059c a3620314 67371067 3f0d48d3 .-...b..g7.g?.H. + 40229ee0 4048c057 34057d06 5d042d03 383346f8 @H.W4.}.].-.83F. + 40229ef0 ff8c12c5 eeff2801 0c0542a4 cac03c20 ......(...B...< + 40229f00 01815dc0 000020e2 20161208 42a0b00c ..]... . ...B... + 40229f10 032d0e01 3f5cc000 0021cdff f24e1422 .-..?\...!...N." + 40229f20 5e392187 5e0c0cc0 20003802 c0200028 ^9!.^... .8.. .( + 40229f30 02c25e3a 225e1722 af80224e 0a22a218 ..^:"^.".."N.".. + 40229f40 225e1e0c 42225e26 225e257c f2225e1d "^..B"^&"^%|."^. + 40229f50 0c12325e 16c24e09 c25e2422 5e2bc5ed ..2^..N..^$"^+.. + 40229f60 ff226e1a 226e1722 6e14226e 1b280dc2 ."n."n."n."n.(.. + 40229f70 4e3829de 21b8ffc2 4ead226e 2321b6ff N8).!...N."n#!.. + 40229f80 226e2721 b57f226e 280c9222 6e2908b1 "n'!.."n(.."n).. + 40229f90 2d0ec8a1 d891e881 f87112c1 300df000 -........q..0... + 40229fa0 12c1f04c 02093145 ebff0831 12c1100d ...L..1E...1.... + 40229fb0 f0000000 12c1f0c9 2120c0f4 2d030931 ........! ..-..1 + 40229fc0 851bfe9c 42221218 8cf222c2 d83d0220 ....B"...."..=. + 40229fd0 20f427bc 02c03c20 30c0f408 312d0cc8 .'...< 0...1-.. + 40229fe0 2112c110 0df00000 12c1e0f2 610330f3 !...........a.0. + 40229ff0 203842c9 61e94109 71d951cd 02ed0540 8B.a.A.q.Q....@ + 4022a000 40f47c12 56630d7c a2161f0d 280f425c @.|.Vc.|....(.B\ + 4022a010 11291c28 0cccf222 cc040516 fe3d027c .).(...".....=.| + 4022a020 c216930b 2813290c d21c1056 5d00458b ....(.)....V].E. + 4022a030 d7225c10 45e0ff22 6c170b22 226c1422 ."\.E.."l..""l." + 4022a040 6c1b213f 5e0c03c0 20004802 39ac425c l.!?^... .H.9.B\ + 4022a050 16c02000 4802c020 00280239 cc225c30 .. .H.. .(.9."\0 + 4022a060 22a21822 5c1e3d0f 425c1722 a21845f4 ".."\.=.B\."..E. + 4022a070 ff225c1e 2022a00c 13f02211 325c2b22 ."\. "....".2\+" + 4022a080 5c2ce26c 240c232d 0c859801 56e2040c \,.l$.#-....V... + 4022a090 22294cbc 2d312e5e 2803279c 06283c06 ")L.-1.^(.'..(<. + 4022a0a0 09000000 31295e0c 0429039c 62583257 ....1)^..)..bX2W + 4022a0b0 9c0a8c04 2903383c 3932c602 000c142d ....).8<92.....- + 4022a0c0 0586f9ff 008c0429 03211e5e 322200c2 .......).!.^2".. + 4022a0d0 6200393c c53f022d 0c05d101 0c020871 b.9<.?.-.......q + 4022a0e0 c861d851 e841f831 12c1200d f0000000 .a.Q.A.1.. ..... + 4022a0f0 f4d8fe3f 12c1e0d2 610520d2 20222204 ...?....a. . "". + 4022a100 c961e941 0971f931 22020dcd 03e2a100 .a.A.q.1"....... + 4022a110 07626e2d 03c574ff 0c0cc61f 00822c04 .bn-..t.......,. + 4022a120 21f4ff42 08053222 00620804 22080680 !..B..2".b.."... + 4022a130 44110022 11605420 50422022 0807721d D..".`T PB "..r. + 4022a140 06802201 40222042 1c063077 804047c0 ..".@" B..0w.@G. + 4022a150 2044c096 24032208 0d07621c 484d2204 D..$."...b.HM". + 4022a160 0d32040c 80221130 2220e022 202020f4 .2...".0" ." . + 4022a170 22440c20 28412244 0df80c2d 0c456bff "D. (A"D...-.Ek. + 4022a180 cd0f9c7c 46e5ff00 002077c0 a6170d30 ...|F.... w....0 + 4022a190 32c03030 f4281d32 5d0605e0 fe0871c9 2.00.(.2].....q. + 4022a1a0 0de841c8 61d851f8 3112c120 0df00000 ..A.a.Q.1.. .... + 4022a1b0 ecd8fe3f f0d8fe3f f8d8fe3f ead8fe3f ...?...?...?...? + 4022a1c0 fcd8fe3f ffc0ffff e4d8fe3f e8d8fe3f ...?.......?...? + 4022a1d0 12c1d0c9 a1cd0221 f6ff09b1 d991e981 .......!........ + 4022a1e0 f9712202 0047e202 06bc0041 c1ff322c .q"..G.....A..2, + 4022a1f0 19522400 721c3022 2c1a5083 c0206780 .R$.r.0",.P.. g. + 4022a200 d1edff96 38025793 07380d30 32c09683 ....8.W..8.02... + 4022a210 01380d37 923b21e8 ff280232 020e2202 .8.7.;!..(.2..". + 4022a220 0f802211 30222027 b72721e3 ff280232 ..".0" '.'!..(.2 + 4022a230 020e2202 0f526c19 80221130 2220380d .."..Rl..".0" 8. + 4022a240 225c3032 6c1a8c82 220cac8c 320c0222 "\02l..."...2.." + 4022a250 4cac580d 222c1420 25c0e612 5f0c0332 L.X.",. %..._..2 + 4022a260 5c3831d6 ff321300 8c13c6f2 01521c30 \81..2.......R.0 + 4022a270 322c1a3a 35371602 46ef0132 1c1df763 2,.:57..F..2...c + 4022a280 0206ed01 56127b22 0c541b22 20207422 ....V.{".T." t" + 4022a290 4c54b642 16321c2b 221c1e2a 232020f4 LT.B.2.+"..*# . + 4022a2a0 27330286 4a00225c 2b064900 26320286 '3..J."\+.I.&2.. + 4022a2b0 47002d0c 856f0186 45000000 00322c17 G.-..o..E....2,. + 4022a2c0 3035c0a6 13028640 00620c24 27660d7c 05.....@.b.$'f.| + 4022a2d0 b3303610 324c2432 1c2c325c 2b321c24 .06.2L$2.,2\+2.$ + 4022a2e0 621c2500 33113033 316a3332 5c26321c b.%.3.031j32\&2. + 4022a2f0 392020f4 225c383a 220c0722 5c39284c 9 ."\8:".."\9(L + 4022a300 724c4e72 4c54526c 14b64228 e21c2b22 rLNrLTRl..B(..+" + 4022a310 1c2c27be 06221c1e 86030000 221c1e3d .,'.."......"..= + 4022a320 0e202282 013d5ec0 00002a2e 2020f427 . "..=^...*. .' + 4022a330 be02225c 2b0c1fe2 2c1f163e 70784e41 .."\+...,..>pxNA + 4022a340 6c5b3207 05820704 22070680 33118053 l[2....."...3..S + 4022a350 20002211 50322022 07078022 01302220 .".P2 "...".0" + 4022a360 20387580 52013055 20403210 80331120 8u.R.0U @2..3. + 4022a370 28413035 20402210 20232038 0d0c0530 (A05 @". # 8...0 + 4022a380 22c03207 0d303014 305f9332 1e063a35 ".2..00.0_.2..:5 + 4022a390 3a22a612 0246ab01 280e226c 1f281ec5 :"...F..(."l.(.. + 4022a3a0 c4fe221c 388cb238 4e32030d 0763040b ..".8..8N2...c.. + 4022a3b0 22225c38 222e0145 c3fe321c 3a2023c0 ""\8"..E..2.: #. + 4022a3c0 225c3ae0 2e20c546 ff86daff 0c02225c "\:.. .F......"\ + 4022a3d0 38f2a001 e22c1e16 5e09622e 0431445b 8....,..^.b..1D[ + 4022a3e0 52060592 06042206 06805511 90852000 R....."...U... . + 4022a3f0 22118052 20220607 722d0080 22015022 "..R "..r-..".P" + 4022a400 20205875 80820150 88203052 10805511 Xu...P. 0R..U. + 4022a410 20284150 58203022 10202520 52060d20 (APX 0". % R.. + 4022a420 27c05060 140c0560 5f93621e 066a5550 '.P`...`_.b..jUP + 4022a430 22c096a2 03222c17 2077c0e6 1731280e "....",. w...1(. + 4022a440 226c1e28 1e45bafe 221c388c b2584e52 "l.(.E..".8..XNR + 4022a450 050d0765 040b2222 5c38281e c5b8fe52 ...e..""\8(....R + 4022a460 1c3a2025 c0225c3a 2d0e853c ffc6d8ff .: %."\:-..<.... + 4022a470 222c1016 5206522c 11380d30 55c0d6a5 ",..R.R,.8.0U... + 4022a480 053143f2 621c2438 03006611 2033c060 .1C.b.$8..f. 3.` + 4022a490 23312023 c0605031 2020f45a 32003311 #1 #.`P1 .Z2.3. + 4022a4a0 00621130 30316060 31325c24 d6860020 .b.001``12\$... + 4022a4b0 20600022 11206031 521c2530 33210055 `.". `1R.%03!.U + 4022a4c0 11502031 50523150 52c06a65 6060f43a .P 1PR1PR.je``.: + 4022a4d0 360c0262 5c25325c 26226c10 e138ff58 6..b\%2\&"l..8.X + 4022a4e0 ac721e00 16075341 02ff2804 2035c00b .r....SA..(. 5.. + 4022a4f0 63960608 1b652066 c07066c0 e61675d1 c....e f.pf...u. + 4022a500 30ff5d03 281d6212 0537a628 6212040c 0.].(.b..7.(b... + 4022a510 073036c0 3030f462 120557a6 0e325204 .06.00.b..W..2R. + 4022a520 72520560 55c02802 c6faff00 50306046 rR.`U.(.....P0`F + 4022a530 01000000 00303060 00331130 3031857d .....00`.3.001.} + 4022a540 fe31ebfe 222c0a52 2300321d 0641e8fe .1..",.R#.2..A.. + 4022a550 30358020 33c0325d 06384d20 58742904 05. 3.2].8M Xt). + 4022a560 22430452 43052050 75202875 52430622 "C.RC. Pu (uRC." + 4022a570 43070604 005022c0 d6a20032 0c240c22 C....P"....2.$." + 4022a580 20232022 4c2421da fe38ac58 023025c0 # "L$!..8.X.0%. + 4022a590 96924762 1c161b25 3022c060 22c0a612 ..Gb...%0".`"... + 4022a5a0 02061a01 37150246 9d00d105 ff0c1978 ....7..F.......x + 4022a5b0 4d22070d 32070c80 22113022 20203841 M"..2...".0" 8A + 4022a5c0 80521130 55205080 f4805014 0c035039 .R.0U P...P...P9 + 4022a5d0 93521d06 5a333030 f4325e00 37b64907 .R..Z300.2^.7.I. + 4022a5e0 68193ce3 30581031 f7fe8055 11302210 h.<.0X.1...U.0". + 4022a5f0 20252022 470c2028 4122470d 625d0622 % "G. (A"G.b]." + 4022a600 070d1762 040b2622 5d06321d 06281dc5 ...b..&"].2..(.. + 4022a610 98fe284d 0c152202 0d203014 0c023025 ..(M..".. 0...0% + 4022a620 93321d06 3a22225e 00f22c20 168f0e28 .2..:""^.., ...( + 4022a630 4d22020d 07621022 2c2016a2 0d380232 M"...b.", ...8.2 + 4022a640 6c20051f ff86fbff 52a00262 a100822f l ......R..b.../ + 4022a650 0431a7fe b2080492 23003208 05220807 .1......#.2..".. + 4022a660 803311b0 a3203208 06721e00 003311a0 .3... 2..r...3.. + 4022a670 33208022 01302220 321f069a 773037c0 3 .".0" 2...w07. + 4022a680 2033c096 23052208 0d07622a 784d2207 3..#."...b*xM". + 4022a690 0d32070c 80221130 22202038 41578316 .2...".0" 8AW.. + 4022a6a0 60222020 20f42247 0c202841 22470d22 `" ."G. (A"G." + 4022a6b0 1d061b22 225e0038 0f2d0f39 01591169 ...""^.8.-.9.Y.i + 4022a6c0 210517ff 38015811 6821cc33 0c0fc610 !...8.X.h!.3.... + 4022a6d0 00fd03c6 ddff0000 002077c0 a6173590 ......... w...5. + 4022a6e0 22c02020 f4384d22 5d063203 0d176304 ". .8M"].2...c. + 4022a6f0 0b22225d 06321d06 281d058a fe284d0c .""].2..(....(M. + 4022a700 1522020d 2030140c 02302593 321d0630 .".. 0...0%.2..0 + 4022a710 2280225e 00f26c20 4176fe52 1e00221c "."^..l Av.R..". + 4022a720 16380450 22c05a33 39ac225c 162d0c85 .8.P".Z39."\.-.. + 4022a730 05ff281d 3212048c 7331a3fe 29030c02 ..(.2...s1..)... + 4022a740 291d284d 22020d07 620e31a0 fe22a020 ).(M"...b.1..". + 4022a750 52030020 25202243 00e2a001 d2a000f2 R.. % "C........ + 4022a760 2c2016bf 09784f32 07056207 04220706 , ...xO2..b..".. + 4022a770 80331100 22116053 20503220 22070780 .3..".`S P2 "... + 4022a780 22013022 2038ac37 92763159 fe4d0d29 ".0" 8.7.v1Y.M.) + 4022a790 0332070d 521f0630 3014304e 93403074 .2..R..00.0N.@0t + 4022a7a0 3a652a26 29ac221c 165022c0 3032c032 :e*&)."..P".02.2 + 4022a7b0 5c162d0c 05fdfe38 1f221304 9c125182 \.-....8."....Q. + 4022a7c0 fe28058c 628583fe c6000000 003905d9 .(..b........9.. + 4022a7d0 1f284f22 020d0762 17317cfe 2c025203 .(O"...b.1|.,.R. + 4022a7e0 00202520 22430028 4c664204 22a00729 . % "C.(LfB."..) + 4022a7f0 4c280f22 6c202d0f 8503ff06 d8ff0000 L(."l -......... + 4022a800 00320c24 07630c7c e2202310 0c255022 .2.$.c.|. #..%P" + 4022a810 20060100 0c122023 20224c24 068d0000 ..... # "L$.... + 4022a820 c02c2005 0401d22c 2056cd00 2165fe45 ., ...., V..!e.E + 4022a830 5cff226c 20c68600 00212dfe f2a00072 \."l ....!-....r + 4022a840 220092c7 ff1ba788 4d320805 62080422 ".......M2..b.." + 4022a850 08068033 11002211 60532050 32202208 ...3..".`S P2 ". + 4022a860 07802201 30222077 921d2155 fe521d06 ..".0" w..!U.R.. + 4022a870 32120637 35028676 008557ff 16421d9c 2..75..v..W..B.. + 4022a880 6f290f46 05000000 dc5f2037 c0d66309 o).F....._ 7..c. + 4022a890 214cfe05 56ff16a2 1b226c20 3d0dc61f !L..V...."l =... + 4022a8a0 00322f04 520305b2 03048055 11b06520 .2/.R......U..e + 4022a8b0 52030632 03070055 11605520 80330150 R..2...U.`U .3.P + 4022a8c0 33203039 c096e305 203ac0e6 1358213c 3 09.... :...X!< + 4022a8d0 fe0552ff 20e22016 9217684f 42060552 ..R. . ...hOB..R + 4022a8e0 06042206 06804411 50342000 22113042 .."...D.P4 .".0B + 4022a8f0 20220607 80220140 222041fd fd380442 "...".@" A..8.B + 4022a900 1f063044 c0204480 a6140d20 33c03030 ..0D. D.... 3.00 + 4022a910 f4281f32 5f064568 fee90fd0 3d20e02e .(.2_.Eh....= .. + 4022a920 20057dff 064b0038 0dfd0d8c 63dd0306 .}..K.8....c... + 4022a930 c5ff0000 002027c0 e6120246 45002208 ..... '....FE.". + 4022a940 0d076202 06430021 1efe854a ff290d16 ..b..C.!...J.).. + 4022a950 1210784d 41e7fd52 07056207 04220706 ..xMA..R..b..".. + 4022a960 80551160 35200022 11305220 22070738 .U.`5 .".0R "..8 + 4022a970 04802201 50222052 1d063055 c02a55a6 ..".P" R..0U.*U. + 4022a980 150d2033 c03030f4 281d325d 06c560fe .. 3.00.(.2]..`. + 4022a990 21d8fd38 ac780242 1c16221e 003a347a !..8.x.B.."..:4z + 4022a9a0 22273302 062b0058 0d884522 080d4208 "'3..+.X..E"..B. + 4022a9b0 0c802211 40222080 62112048 41404620 ..".@" .b. HA@F + 4022a9c0 4040f407 64193ce6 60441080 641141fd @@..d.<.`D..d.A. + 4022a9d0 fd402210 20262022 480c2028 4122480d .@". & "H. (A"H. + 4022a9e0 7033c030 30f42225 01325506 c55afe42 p3.00."%.2U..Z.B + 4022a9f0 2d0052a0 01284422 020d2030 140c0230 -.R..(D".. 0...0 + 4022aa00 25933214 063a2222 5e008611 002d0c45 %.2..:""^....-.E + 4022aa10 e500860f 00000000 31b6fd28 035032c0 ........1..(.P2. + 4022aa20 96d3001b 22321c16 5022c030 22c0a612 ...."2..P".0"... + 4022aa30 22320c24 0c220677 ff0c0222 4c54c663 "2.$.".w..."LT.c + 4022aa40 fe7cf246 00000c02 225c1d0c 02224c38 .|.F...."\..."L8 + 4022aa50 465ffe00 08b1c8a1 d891e881 f87112c1 F_...........q.. + 4022aa60 300df000 31d5fd38 0342030c 72c31440 0...1..8.B..r..@ + 4022aa70 4441b664 5f42c4fb e0441140 40f432a0 DA.d_B...D.@@.2. + 4022aa80 0082a5b3 3a675206 00261508 16550426 ....:gR..&...U.& + 4022aa90 2509860c 001b3306 0d000000 52060166 %.....3.....R..f + 4022aaa0 45323b53 47a52d52 06026206 03805511 E2;SG.-R..b...U. + 4022aab0 5056200b 656060f4 92a5b467 38019d05 PV .e``....g8... + 4022aac0 9252004b 33860100 5206018c 655a3330 .R.K3...R...eZ30 + 4022aad0 30f44733 ae0df000 7ce7fe3f 6388fe3f 0.G3....|..?c..? + 4022aae0 12c1c0d2 610d20d2 20222201 c9e1f9b1 ....a. . ""..... + 4022aaf0 09f1e9c1 fd033202 00c1affd 303034e0 ......2.....004. + 4022ab00 33113a22 290c3030 602d0dc5 20fecc62 3.:").00`-.. ..b + 4022ab10 221d041c 33273307 2d0d4528 fe464402 "...3'3.-.E(.FD. + 4022ab20 e1b2f5f0 3f20280e 45c0fd4d 0e5672fe ....? (.E..M.Vr. + 4022ab30 280e32a0 f0202310 32a0e037 12d9621d (.2.. #.2..7..b. + 4022ab40 0431aaf5 0c652d0d c5ba0556 92fc280c .1...e-....V..(. + 4022ab50 32020c2d 0d303441 e0330130 30603030 2..-.04A.3.00`00 + 4022ab60 31451bfe 5602fb48 0ca16159 22040132 1E..V..H..aY"..2 + 4022ab70 04008022 11302220 80721120 28412077 ...".0" .r. (A w + 4022ab80 207070f4 70284122 44012204 03320402 pp.p(A"D."..2.. + 4022ab90 80221130 22208062 11202841 20662060 .".0" .b. (A f ` + 4022aba0 60f46028 41224403 22040582 04045204 `.`(A"D.".....R. + 4022abb0 06802211 80322000 55113025 20520407 .."..2 .U.0% R.. + 4022abc0 72440080 55012055 20502875 80350120 rD..U. U P(u.5. + 4022abd0 3320a025 10802211 505841a0 55102033 3 .%..".PXA.U. 3 + 4022abe0 20503320 30287422 44053020 75224406 P3 0(t"D.0 u"D. + 4022abf0 30287522 4407213e fd624402 39028204 0(u"D.!>.bD.9... + 4022ac00 09220408 52040a80 88112098 20005511 ."..R..... . .U. + 4022ac10 90852052 040b3244 04805501 80552080 .. R..2D..U..U . + 4022ac20 85015028 75202820 a0851080 88115058 ..P(u ( ......PX + 4022ac30 41a05510 80222050 22202058 74524409 A.U.." P" XtRD. + 4022ac40 20507552 440a2058 7552440b 515afd22 PuRD. XuRD.QZ." + 4022ac50 44082905 82040f92 040e8088 11908820 D.)............ + 4022ac60 80581180 88418055 205050f4 52440e50 .X...A.U PP.RD.P + 4022ac70 58415244 0f52040d 82040c80 55118055 XARD.R......U..U + 4022ac80 20505841 814bfd59 11505074 509054b1 PXA.K.Y.PPtP.T. + 4022ac90 2d5b9248 000c0a50 90140c1c 90ca8398 -[.H...P........ + 4022aca0 0bb152f5 821d04e8 0bf14ff5 cac88951 ..R.......O....Q + 4022acb0 e9218142 fde80fc0 c0f4e901 c25800ed .!.B.........X.. + 4022acc0 09bc0eb2 1e11779b 24b21e10 679b1e88 ......w.$...g... + 4022acd0 1eb821b7 9817880e b801b798 10164a0c ..!...........J. + 4022ace0 283e293a 21185b99 3ee90286 2d00ad0e (>):!.[.>...-... + 4022acf0 e83ec6f2 ff41155b 480416f4 05821411 .>...A.[H....... + 4022ad00 77985482 14106798 4e8814e8 21879e47 w.T...g.N...!..G + 4022ad10 8804a801 879a4027 6502867e ff176517 ......@'e..~..e. + 4022ad20 58a45083 c096b801 8214165a 585053c0 X.P........ZXPS. + 4022ad30 e6151046 17000000 07650821 15f02222 ...F.....e.!.."" + 4022ad40 0022640d 160cdd32 04240c22 20232022 ."d....2.$." # " + 4022ad50 44242d04 860b0000 483406e7 ff41fe5a D$-.....H4...A.Z + 4022ad60 88040c04 ed08ac2e a21e1067 9a0da80e ...........g.... + 4022ad70 b22100a7 9b028672 01167a5c 4d0ee83e .!.....r..z\M..> + 4022ad80 86f8ff00 2d0c4506 01c662ff 98112769 ....-.E...b...'i + 4022ad90 02c660ff 5116f541 14f53a3c c5d70046 ..`.Q..A..:<...F + 4022ada0 5dff0000 002106fd a8510c03 39024942 ]....!...Q..9.IB + 4022adb0 a25206d9 12c105fd 2104fd42 2e213902 .R......!..B.!9. + 4022adc0 324c0037 142e622e 230c053d 0e8c6628 2L.7..b.#..=..f( + 4022add0 6ec00600 0601002d 0505b9fe cc42226e n......-.....B"n + 4022ade0 21060400 7c833792 02c64aff 21f4fc22 !...|.7...J.!.." + 4022adf0 12005622 d2d1eefc 2138ff62 0d00e902 ..V"....!8.b.... + 4022ae00 27663128 4e662210 21ebfc32 2e172802 'f1(Nf".!..2..(. + 4022ae10 27930246 8101c6f9 0021b5fc 38ae2802 '..F.....!..8.(. + 4022ae20 3022c096 a23d321e 163022c0 e6120246 0"...=2..0"....F + 4022ae30 7a01c6f2 000c2220 4610520e 248cc438 z....." F.R.$..8 + 4022ae40 4e202520 32c3feb6 2302864e 0047e507 N % 2...#..N.G.. + 4022ae50 21d0ef28 02226e0d 0c02224e ad22ce3c !..(."n..."N.".< + 4022ae60 49416261 03c5bfff 284e4841 68316652 IAba....(NHAh1fR + 4022ae70 02469000 f6621166 3202c658 00b64202 .F...b.f2..X..B. + 4022ae80 06850026 221fc6dd 00667202 068200f6 ...&"....fr..... + 4022ae90 720286a7 00668202 06b6000c 93379202 r....f.......7.. + 4022aea0 c6ce0086 d6001c22 2026101c 23371202 ......." &..#7.. + 4022aeb0 063c0022 2e1f7842 32070552 07042207 .<."..xB2..R..". + 4022aec0 06803311 50432000 22114032 20220707 ..3.PC .".@2 ".. + 4022aed0 80220130 22208042 01203875 30542031 .".0" .B. 8u0T 1 + 4022aee0 84583042 10202841 30221080 441131b1 .X0B. (A0"..D.1. + 4022aef0 fc404520 20242038 031b2237 12028628 .@E $ 8.."7...( + 4022af00 00321e39 517bfc1b 33325e39 226e1438 .2.9Q{..32^9"n.8 + 4022af10 0521a9fc 1b432802 49ae49ce 42020e22 .!...C(.I.I.B.." + 4022af20 020f0b33 80221140 2220225e 300c4232 ...3.".@" "^0.B2 + 4022af30 6e19294e 2a3e221e 1e8507ff 2032a0f0 n.)N*>"..... 2.. + 4022af40 3311325e 2c321e2b 225e1e66 1305f022 3.2^,2.+"^.f..." + 4022af50 112020f4 225e2b22 1e3a0b22 225e3a22 . ."^+".:.""^:" + 4022af60 2e1f3802 326e1fcc 337cf346 00000c03 ..8.2n..3|.F.... + 4022af70 325e1d0c 03324e4e 858bfe52 2e24ccc5 2^...2NN...R.$.. + 4022af80 320e240c 22202320 224e2486 9c00286e 2.$." # "N$...(n + 4022af90 3d0e42a0 00c00500 7c833792 0246dc00 =.B.....|.7..F.. + 4022afa0 06f7ff00 47e60286 95002183 fc8183fc ....G.....!..... + 4022afb0 2802a14f fc720200 42020162 02022202 (..O.r..B..b..". + 4022afc0 03921800 380ab17b fc804411 80221170 ....8..{..D..".p + 4022afd0 74206062 205185f4 4d0f3a39 280bc624 t `b Q..M.:9(..$ + 4022afe0 0047e602 06250021 73fc422e 1428020b .G...%.!s.B..(.. + 4022aff0 324033c0 96e30432 2e173032 c0e61345 2@3....2..02...E + 4022b000 0c42587e 294e1605 28286e0c 043d0ec0 .BX~)N..((n..=.. + 4022b010 05008ca2 7c833712 02469b00 86bc0000 ....|.7..F...... + 4022b020 2d0ed21e 2b851aff 221e3816 520022c2 -...+...".8.R.". + 4022b030 ff225e38 221e1e66 1d05f022 112020f4 ."^8"..f...". . + 4022b040 225e2b86 1500315c fc8129fc 38037203 "^+...1\..).8.r. + 4022b050 00520301 62030242 03033158 fc805511 .R..b..B..1X..U. + 4022b060 92130038 08804411 70752051 60f46064 ...8..D.pu Q`.`d + 4022b070 203a394d 0f45aa00 46610000 16141831 :9M.E..Fa.....1 + 4022b080 1cfc28ae 38030b22 37120286 5c00e02e ..(.8.."7...\... + 4022b090 20c58500 465a0000 2d0e4513 ff220c00 ...FZ..-.E..".. + 4022b0a0 57e20286 5600320e 240c2220 2320224e W...V.2.$." # "N + 4022b0b0 240c72c6 16002d0e 4511ff22 0c001c03 $.r...-.E..".... + 4022b0c0 57625422 0d00420e 2437023b 213afc32 WbT"..B.$7.;!:.2 + 4022b0d0 2e172802 2793300c 23302420 224e242d ..(.'.0.#0$ "N$- + 4022b0e0 0e057afe 31185a28 03279e02 462b0031 ..z.1.Z(.'..F+.1 + 4022b0f0 165a0c04 290316b2 0c583257 9e02062b .Z..)....X2W...+ + 4022b100 000c142d 0546fbff 0c222024 20224e24 ...-.F..." $ "N$ + 4022b110 0c82294e 463a0000 220d0037 8202c637 ..)NF:.."..7...7 + 4022b120 002124fc 322e1728 02271302 4634000c .!$.2..(.'..F4.. + 4022b130 6246f7ff e02e2085 09ff220c 0057e202 bF.... ..."..W.. + 4022b140 462f0032 0e2422a0 02202320 224e24e0 F/.2.$".. # "N$. + 4022b150 2e200573 fe31fb59 2803271e 3f31fa59 . .s.1.Y(.'.?1.Y + 4022b160 0c042903 16d20558 32571e41 0c142d05 ..)....X2W.A..-. + 4022b170 06fcff00 e02e2085 05ff220d 0047e202 ...... ..."..G.. + 4022b180 461f0021 0cfc322e 17222200 279371e0 F..!..2.."".'.q. + 4022b190 2e20056f fe31eb59 2803279e 06283206 . .o.1.Y(.'..(2. + 4022b1a0 09000000 31e9590c 042903c6 04008c04 ....1.Y..)...... + 4022b1b0 2903383e 3932c603 00583257 1eef0c14 ).8>92...X2W.... + 4022b1c0 2d055632 ff8c0429 0322a00a 226e0421 -.V2...).".."n.! + 4022b1d0 df593222 00e90239 3e852f01 4608002d .Y2"...9>./.F..- + 4022b1e0 0ec5fefe 220d0047 621621f2 fb322e17 ...."..Gb.!..2.. + 4022b1f0 28022793 0b320c00 22a01020 2320224c (.'..2..".. # "L + 4022b200 00320c00 37631a42 2e268c64 286e32af .2..7c.B.&.d(n2. + 4022b210 f7c00400 21cc593d 0ec56bfe 42a15f46 ....!.Y=..k.B._F + 4022b220 08001c02 27032d32 0e242783 0b422e26 ....'.-2.$'..B.& + 4022b230 8c54286e 7c63c004 0021c259 3d0e8569 .T(n|c...!.Y=..i + 4022b240 fe42a16a 3126fe2d 0e01af58 c00000c6 .B.j1&.-...X.... + 4022b250 2f000000 00421e38 cc84d1db fb480ddc /....B.8.....H.. + 4022b260 94c61a00 522e2216 f5fe286e 3d0ec005 ....R."...(n=... + 4022b270 007c8337 92020626 0046f7ff 220e2447 .|.7...&.F..".$G + 4022b280 62122d04 10112085 b1fd2d0e 05b5fec6 b.-... ...-..... + 4022b290 1f000000 0021c6fb 22020037 620a3204 .....!.."..7b.2. + 4022b2a0 0d0c1220 23202244 0d622e23 0c053d0e ... # "D.b.#..=. + 4022b2b0 8c86222e 06c00600 86010000 502520c5 ..".........P% . + 4022b2c0 6afe32af f8371249 16420028 0d226e21 j.2..7.I.B.(."n! + 4022b2d0 220c0057 e2122100 fe32a000 326200e0 "..W..!..2..2b.. + 4022b2e0 2e2085b0 00460a00 00319559 221e16c0 . ...F...1.Y"... + 4022b2f0 20003803 3712041b 22225e16 622e2316 .8.7...""^.b.#. + 4022b300 36fd0c05 286e3d0e 4d05c006 007c8337 6...(n=.M....|.7 + 4022b310 92c321f1 fd0c0339 0241a9fb 21abfbcd ..!....9.A..!... + 4022b320 03390228 1440d420 37120445 a7fdc91d .9.(.@. 7..E.... + 4022b330 456ff5b6 2202063e 000c0285 06fe063c Eo.."..>.......< + 4022b340 00000000 8c94a83e a9344183 59893ee9 .......>.4A.Y.>. + 4022b350 04476502 068ffe0c 0217e502 06eefd8c .Ge............. + 4022b360 e9384966 430522c2 01202074 983946fb .8IfC.".. t.9F. + 4022b370 ff3186ee c0200038 03379202 06e6fd22 .1... .8.7....." + 4022b380 0e1485ad fecd02cc 12c6e2fd 280f3197 ............(.1. + 4022b390 f3290c22 1e10225c 10280329 1c2186fb .).".."\.(.).!.. + 4022b3a0 38022203 01420300 80221140 22204150 8."..B...".@" AP + 4022b3b0 fb225c11 0c32294c 28041b42 49ac49cc ."\..2)L(..BI.I. + 4022b3c0 0b224203 0e32030f 226c1928 6e803311 ."B..2.."l.(n.3. + 4022b3d0 296c287e 40332029 7c325c30 325c2c32 )l(~@3 )|2\02\,2 + 4022b3e0 0e0822af 8c202310 224c0821 56593802 ..".. #."L.!VY8. + 4022b3f0 c902393c c50d0122 cc3c8566 ff221c1e ..9<...".<.f.".. + 4022b400 4b3c05bb fe225c1e 1c232d0c 45600016 K<..."\..#-.E`.. + 4022b410 12970c03 2d0c4592 fec6befd 320c000c ....-.E.....2... + 4022b420 82202320 320e2422 4c007ce2 20231046 . # 2.$"L.|. #.F + 4022b430 d5fe08f1 c8e1d8d1 e8c1f8b1 12c1400d ..............@. + 4022b440 f0000000 6388fe3f 12c1d0f2 610720f2 ....c..?....a. . + 4022b450 2022a002 8d032026 100cc320 2393e981 ".... &... #... + 4022b460 60e00420 eea021eb f131f6ff 2842d991 `.. ..!..1..(B.. + 4022b470 4901dd05 42a0a60c 05c9a169 21891109 I...B......i!... + 4022b480 b1012058 c00000cd 02682188 11cc722d .. X.....h!...r- + 4022b490 08c590fd 86080000 62420e22 a000226c ........bB.".."l + 4022b4a0 00221804 891ce022 c0225c06 1c432d08 ."....."."\..C-. + 4022b4b0 4586fd8c 922d0cc5 37fe0c02 46250000 E....-..7...F%.. + 4022b4c0 421f1028 1c803411 28124048 41621f11 B..(..4.(.@HAb.. + 4022b4d0 40332029 4c3030f4 32420080 46113038 @3 )L00.2B..F.08 + 4022b4e0 41606841 32420180 5d01d038 75604420 A`hA2B..]..8u`D + 4022b4f0 4040f430 552031fe 56424202 40484142 @@.0U 1.VBB.@HAB + 4022b500 4203304d 10d07841 80441130 37104055 B.0M..xA.D.07.@U + 4022b510 20305520 50387432 4205e0e2 74503075 0U P8t2B...tP0u + 4022b520 3242065b ee380140 ee1130de 20803d11 2B.[.8.@..0. .=. + 4022b530 d0d821d0 d320d0d0 f4524204 d2420c0c ..!.. ...RB..B.. + 4022b540 03505875 d0d84152 4207d242 0d324212 .PXu..ARB..B.2B. + 4022b550 3242132d 0c08b1c8 a1d891e8 81f87112 2B.-..........q. + 4022b560 c1300df0 12c1f032 c314c261 02d26101 .0.....2...a..a. + 4022b570 20c220dd 043030f4 0c040c12 09314589 . ..00......1E. + 4022b580 fd16f20a 521c1038 12804511 50584150 ....R..8..E.PXAP + 4022b590 44204040 f4521c11 42430040 48414243 D @@.R..BC.@HABC + 4022b5a0 01804511 50584150 44204040 f4424302 ..E.PXAPD @@.BC. + 4022b5b0 40484168 ac424303 d0487442 430551cc @HAh.BC..HtBC.Q. + 4022b5c0 56d04075 80760142 43066048 75404720 V.@u.v.BC.`Hu@G + 4022b5d0 50761080 77117074 20604841 50541050 Pv..w.pt `HAPT.P + 4022b5e0 47204058 74424308 52430940 50754048 G @XtBC.RC.@Pu@H + 4022b5f0 7552430a 42430b52 1c175c04 42430c1c uRC.BC.R..\.BC.. + 4022b600 0442430d 80751150 48414047 204040f4 .BC..u.PHA@G @@. + 4022b610 42430e40 4841d243 0442430f d0d8750c BC.@HA.C.BC...u. + 4022b620 04d24307 42431042 43114243 12424313 ..C.BC.BC.BC.BC. + 4022b630 6a6569cc 0831c821 d81112c1 100df000 jei..1.!........ + 4022b640 12c1b050 5074c261 12026113 d26111e2 ...PPt.a..a..a.. + 4022b650 6110f9f1 39215941 cd024090 f47c4216 a...9!YA..@..|B. + 4022b660 e31e384c 22c3feb6 32077c52 26730286 ..8L"...2.|R&s.. + 4022b670 7700bce9 221c3997 b20e320c 2422af80 w...".9...2.$".. + 4022b680 20232022 4c240609 00221c3a f682ea46 # "L$...".:...F + 4022b690 08000000 d21c3bac fd7d0997 bd017d0d ......;..}....}. + 4022b6a0 70f0f4f0 ddc0d0d0 f45d08f7 b91e7cf2 p........]....|. + 4022b6b0 46670000 221c3a82 2c1e2901 16881858 Fg..".:.,.)....X + 4022b6c0 0816f5fc 8d0546fd ff00f2a0 000c0ebd ......F......... + 4022b6d0 0fe93197 3b02862d 00b029c0 321c1e5d ..1.;..-..).2..] + 4022b6e0 022020f4 27b3015d 035020f4 42a00029 . .'..].P .B..) + 4022b6f0 112d0459 61898199 91b97185 71fdad02 .-.Ya.....q.q... + 4022b700 58618881 9891b871 165212d2 12055252 Xa.....q.R....RR + 4022b710 04525205 38112821 4d0330dd c0ba3228 .RR.8.(!M.0...2( + 4022b720 1a898199 91b971a9 51013a56 c00000a8 ......q.Q.:V.... + 4022b730 51d0d0f4 2d0a458b fd380188 812a2320 Q...-.E..8...*# + 4022b740 20f42901 0c839891 a851b871 27b3082d .)......Q.q'..- + 4022b750 0ac564fd 46360000 522c1b0c 065a5b4d ..d.F6..R,...Z[M + 4022b760 063d0a2d 0c898199 91b971c5 cdff5d02 .=.-......q...]. + 4022b770 88819891 b8711672 0b8c5e28 31590246 .....q.r..^(1Y.F + 4022b780 0000ed02 38115931 3abbb0b0 f486d0ff ....8.Y1:....... + 4022b790 165f0468 18bc8622 16042a2f 22560428 ._.h..."..*/"V.( + 4022b7a0 06ec7222 1605a816 38214d0f 2a2a5961 ..r"....8!M.**Ya + 4022b7b0 69518981 99910117 56c00000 68519891 iQ......V...hQ.. + 4022b7c0 22160588 812a2f58 61225605 6806c6f0 "....*/Xa"V.h... + 4022b7d0 ff221806 2a7f7258 06d25c3b cc48e26c ."..*.rX..\;.H.l + 4022b7e0 1e460000 e908222c 1b9a2222 6c1b221c .F....",..""l.". + 4022b7f0 399092c0 2801925c 39225c3a 0c022715 9...(..\9"\:..'. + 4022b800 4f484527 144a3841 17e34522 040d3204 OHE'.J8A..E"..2. + 4022b810 0c802211 30222031 c3873022 202020f4 ..".0" 1..0" . + 4022b820 22440c20 28412244 0d0c0286 08000000 "D. (A"D........ + 4022b830 00320c24 22af8020 2320224c 2416dee6 .2.$".. # "L$... + 4022b840 2d0e0502 fe4699ff 0c05dd05 fd05c69e -....F.......... + 4022b850 ff022113 c22112d2 2111e221 10f8f112 ..!..!..!..!.... + 4022b860 c1500df0 12c1e0c9 61cd0222 22174120 .P......a.."".A + 4022b870 56203875 80520130 55204032 10803311 V 8u.R.0U @2..3. + 4022b880 20284130 35204042 10404320 2d0c0c03 (A05 @B.@C -... + 4022b890 d9510971 e941f931 85ccffdd 027ce216 .Q.q.A.1.....|.. + 4022b8a0 dd03320c 247cc220 2310f81d 224c244b ..2.$|. #..."L$K + 4022b8b0 ec621d04 0c654d0e 3d0c2d0d 85e30422 .b...eM.=.-...." + 4022b8c0 4f102028 f4224f11 620c0952 0c0a0c67 O. (."O.b..R...g + 4022b8d0 4d0e3d0c 2d0d05db fc2d0d45 4cfd0c02 M.=.-....-.EL... + 4022b8e0 0871c861 d851e841 f83112c1 200df000 .q.a.Q.A.1.. ... + 4022b8f0 12c1f062 221fc931 16d60a38 0672221e ...b"..1...8.r". + 4022b900 91fc5532 621fa2c2 78164708 b847c846 ..U2b...x.G..G.F + 4022b910 420b0582 0b04320b 06804411 80542000 B.....2...D..T . + 4022b920 33115043 20820c05 320b0752 0c06b20c 3.PC ...2..R.... + 4022b930 04808811 80330140 33200055 11b04820 .....3.@3 .U..H + 4022b940 40852052 0c073048 75805501 80552080 @. R..0Hu.U..U . + 4022b950 83014088 20904310 80441130 38414048 ..@. .C..D.08A@H + 4022b960 20903310 80850130 34205048 75404820 .3....04 PHu@H + 4022b970 90851080 88115058 41804420 90551050 ......PXA.D .U.P + 4022b980 44204043 c0d68400 ad077807 46deff00 D @C......x.F... + 4022b990 00790669 0a3806cc 1332523b 32024e1b .y.i.8...2R;2.N. + 4022b9a0 3332424e 0c033262 10c83112 c1100df0 32BN..2b..1..... + 4022b9b0 12c1f0c9 21cd0222 221f0261 03169204 ....!..""..a.... + 4022b9c0 220c2427 e243c02c 2045f2ff 221c2b32 ".$'.C., E..".+2 + 4022b9d0 1c3027b3 0a303141 325c2cc6 01000000 .0'..01A2\,..... + 4022b9e0 20214122 5c2c321c 1e421c2c f0231127 !A"\,2..B.,.#.' + 4022b9f0 a402225c 2c2a2332 1c2c3a22 320c2422 .."\,*#2.,:"2.$" + 4022ba00 5c2b0c42 20232022 4c240831 c82112c1 \+.B # "L$.1.!.. + 4022ba10 100df000 12c1e0c9 61cd0222 123ad951 ........a..".:.Q + 4022ba20 f9310971 30f074e9 41f0d014 f682340c .1.q0.t.A.....4. + 4022ba30 23303f10 0c120c0e 421c3930 e2930c42 #0?.....B.90...B + 4022ba40 303293e0 e0747cf2 1684070c 042d0445 02...t|......-.E + 4022ba50 3cfd8ce2 522c1b3d 026d0e4d 0f2d0c85 <...R,.=.m.M.-.. + 4022ba60 9effccf2 320c2422 af802023 20224c24 ....2.$".. # "L$ + 4022ba70 7cf28613 00322c1e cc43226c 1e860200 |....2,..C"l.... + 4022ba80 48038c34 3d0486fd ff29030c 03325c3b H..4=....)...2\; + 4022ba90 9c0d322c 1b32c301 326c1b32 1c3932c3 ..2,.2..2l.2.92. + 4022baa0 ff325c39 076f0a42 0c242c03 30342032 .2\9.o.B.$,.04 2 + 4022bab0 4c242222 014553fd 321c3a30 2280225c L$"".ES.2.:0"."\ + 4022bac0 3a22a000 0871c861 d851e841 f83112c1 :"...q.a.Q.A.1.. + 4022bad0 200df000 12c1f032 221e0931 bc034803 ......2"..1..H. + 4022bae0 8c443d04 86fdff00 38434203 0d52030c .D=.....8CB..R.. + 4022baf0 80441150 44204058 24dc3522 a1002024 .D.PD @X$.5".. $ + 4022bb00 2022430c 20284122 430d0c02 46010000 "C. (A"C...F... + 4022bb10 0c1305f0 ff083112 c1100df0 12c1d09d ......1......... + 4022bb20 036060f4 7070f4d9 914901dd 020c041c .``.pp...I...... + 4022bb30 430c12e9 81f97169 21793199 1109b1c9 C.....qi!y1..... + 4022bb40 a1fd0505 2dfded02 68217831 98111662 ....-...h!x1...b + 4022bb50 0fc81280 26116068 41606220 80271170 ....&.`hA`b .'.p + 4022bb60 7841803d 01707220 d0287520 43202160 xA.=.pr .(u C !` + 4022bb70 556060f4 203d1080 3311d0d8 41303420 U``. =..3...A04 + 4022bb80 20dd10d0 d320d038 74324c05 d0307532 .... .8t2L..0u2 + 4022bb90 4c068049 01903875 30442020 39108033 L..I..8u0D 9..3 + 4022bba0 11909841 30342020 29102093 20902874 ...A04 ). . .(t + 4022bbb0 224c0990 2075224c 0a5c0222 4c0c1c42 "L.. u"L.\."L..B + 4022bbc0 224c0d21 5f57624c 00c02000 3802c020 "L.!_WbL.. .8.. + 4022bbd0 00280260 68412048 74802311 20242070 .(.`hA Ht.#. $ p + 4022bbe0 70f4d24c 042020f4 d0d87562 4c01724c p..L. ...ubL.rL + 4022bbf0 02d24c07 7078410c 0d924c08 224c0e90 ..L.pxA...L."L.. + 4022bc00 98752028 41621e04 3801724c 03924c0b .u (Ab..8.rL..L. + 4022bc10 224c0f0c 65f04f20 d24c10d2 4c11d24c "L..e.O .L..L..L + 4022bc20 12d24c13 e02e2005 ad04224c 10380120 ..L... ..."L.8. + 4022bc30 28f4224c 110c676d 0d52a080 4d0f2d0e (."L..gm.R..M.-. + 4022bc40 45a4fc2d 0e8515fd 08b1c8a1 d891e881 E..-............ + 4022bc50 f87112c1 300df000 12c1e0d2 6105dd02 .q..0.......a... + 4022bc60 22221741 23550b22 20387580 52013055 "".A#U." 8u.R.0U + 4022bc70 20403210 80331120 28413035 20404210 @2..3. (A05 @B. + 4022bc80 4043202d 0d0c03c9 610971e9 41f93145 @C -....a.q.A.1E + 4022bc90 8dffcd02 acc24bed 621204f8 120c654d ......K.b.....eM + 4022bca0 0e3d0d45 a504224f 102028f4 224f1152 .=.E.."O. (."O.R + 4022bcb0 0d0a0c67 0c064d0e 3d0d2d0c 859cfc2d ...g..M.=.-....- + 4022bcc0 0cc50dfd 0871c861 d851e841 f83112c1 .....q.a.Q.A.1.. + 4022bcd0 200df000 00110000 12c1d062 221fd991 ..........b"... + 4022bce0 09b1c9a1 e981f971 dd02cca6 62221e16 .......q....b".. + 4022bcf0 560e0c0c c6030000 28162812 c2020ec0 V.......(.(..... + 4022bd00 c034e0cc 11ebcc88 460c0232 080d5d02 .4......F..2..]. + 4022bd10 27530952 16060c13 5023835d 02220805 'S.R....P#.].".. + 4022bd20 72080480 22117032 20220806 42080700 r...".p2 "..B... + 4022bd30 22113022 20804401 0c132044 20303530 ".0" .D... D 050 + 4022bd40 2d0d5901 6911c581 ffed0258 01681116 -.Y.i......X.h.. + 4022bd50 5208f812 ac55220f 0d320f0c 80221130 R....U"..2...".0 + 4022bd60 22203118 f9302210 31dbff30 22202020 " 1..0".1..0" + 4022bd70 f4224f0c 20284122 4f0d060b 00281652 ."O. (A"O....(.R + 4022bd80 2d1f4812 32cf14cc b552040c 505441e0 -.H.2....R..PTA. + 4022bd90 55118603 0000ca44 52040c50 5441c055 U......DR..PTA.U + 4022bda0 a05050f4 42a00145 38fd4bcd 621e040c .PP.B..E8.K.b... + 4022bdb0 654d0c3d 0d2d0e05 9404224f 102028f4 eM.=.-...."O. (. + 4022bdc0 224f1152 0d0a0c67 0c064d0c 3d0d2d0e "O.R...g..M.=.-. + 4022bdd0 458bfc2d 0e85fcfc 08b1c8a1 d891e881 E..-............ + 4022bde0 f87112c1 300df000 020405b4 12c1d0c9 .q..0........... + 4022bdf0 a1cd0221 39fb09b1 3802d991 e981f971 ...!9...8......q + 4022be00 0c02c793 02c60201 221c30d2 1c2b2040 ........".0..+ @ + 4022be10 f4d030f4 37b401dd 02d0d0f4 220c24d9 ..0.7.......".$. + 4022be20 01e22c1e 17625816 be04684e 32060552 ..,..bX...hN2..R + 4022be30 06042206 06803311 50432000 22114032 .."...3.PC .".@2 + 4022be40 20220607 80220130 22208042 01203875 "...".0" .B. 8u + 4022be50 30542031 a7543042 10804411 20284140 0T 1.T0B..D. (A@ + 4022be60 45203022 10202420 321e0642 2c144033 E 0". $ 2..B,.@3 + 4022be70 c03a2227 bd092d0c 859eff46 e5000000 .:"'..-....F.... + 4022be80 f22c1f16 5f22280f 160222fd 0246fdff .,.._"(..."..F.. + 4022be90 684e3206 05520604 22060680 33115043 hN2..R.."...3.PC + 4022bea0 20002211 40322022 06075191 54802201 .".@2 "..Q.T.". + 4022beb0 30222020 38758042 01304420 50321080 0" 8u.B.0D P2.. + 4022bec0 33112028 41303420 50221020 2320422c 3. (A04 P". # B, + 4022bed0 14321e06 4033c03a 22380127 b302c6ae .2..@3.:"8.'.... + 4022bee0 00281e22 1207b622 0206ac00 22060d32 .(."..."...."..2 + 4022bef0 060c8022 11302220 322c1f56 531b380e ...".0" 2,.VS.8. + 4022bf00 326c1e38 4c26231d 31266030 22202020 2l.8L&#.1&`0" + 4022bf10 f422460c 20284122 460d320c 2422affc ."F. (A"F.2.$".. + 4022bf20 20231022 4c2458ac 31725480 65015028 #."L$X.1rT.e.P( + 4022bf30 75202620 30651080 66116062 20502841 u & 0e..f.`b P(A + 4022bf40 30321048 4e302620 20387432 44092030 02.HN0& 8t2D. 0 + 4022bf50 7532440a 321c1722 44082028 7522440b u2D.2.."D. (u"D. + 4022bf60 80631130 28412026 202020f4 22440e20 .c.0(A & ."D. + 4022bf70 28412244 0f5a5359 cc220e0e 07620521 (A"D.ZSY."...b.! + 4022bf80 9aff2264 05229c1d 6602040c 02225c1d .."d."..f...."\. + 4022bf90 280c4bdc 16121422 2c10784e 56620421 (.K....",.xNVb.! + 4022bfa0 7ceb2802 226c1042 07052207 04320706 |.(."l.B.."..2.. + 4022bfb0 80441120 54200033 11504320 32070780 .D. T .3.PC 2... + 4022bfc0 33014033 20804301 30287520 54202148 3.@3 .C.0(u T !H + 4022bfd0 54204310 80441130 38414045 20202310 T C..D.08A@E #. + 4022bfe0 20242022 6c11222e 0152a006 68123212 $ "l."..R..h.2. + 4022bff0 056067c0 6060f460 33c03252 05321204 .`g.``.`3.2R.2.. + 4022c000 79126063 c06060f4 6252040c 03324710 y.`c.``.bR...2G. + 4022c010 3247114d 0d3d0c72 6101c56d 0478114d 2G.M.=.ra..m.x.M + 4022c020 0d224710 2028f422 4711620c 09520c0a ."G. (."G.b..R.. + 4022c030 281e0c67 3d0c0565 fc584e42 05056205 (..g=..e.XNB..b. + 4022c040 04220506 80441160 34200022 11304220 ."...D.`4 .".0B + 4022c050 22050761 27548022 01402220 80420120 "..a'T.".@" .B. + 4022c060 38753034 20604210 80441120 28416022 8u04 `B..D. (A`" + 4022c070 10404320 20342022 050d0c04 2020140c .@C 4 ".... .. + 4022c080 15205483 2d05521e 065a2252 2c173a62 . T.-.R..Z"R,.:b + 4022c090 6055c047 a502626c 1716c20e 490e422c `U.G..bl....I.B, + 4022c0a0 1f567404 e26c1ffd 0ee22c1e 16de0e46 .Vt..l....,....F + 4022c0b0 77ff0000 420c244c 43370402 868fff32 w...B.$LC7.....2 + 4022c0c0 2c1e16e3 0c580356 35e35213 06321c1e ,....X.V5.R..2.. + 4022c0d0 37b50246 2f000689 ffd02d20 c509fc16 7..F/.....- .... + 4022c0e0 62f52222 01226c00 c6aaff00 a84f520a b.""."l......OR. + 4022c0f0 05720a04 220a0680 55117065 20002211 .r.."...U.pe .". + 4022c100 60522022 0a0771fa 53802201 50222020 `R "..q.S.".P" + 4022c110 58758062 01506620 70521080 55115066 Xu.b.Pf pR..U.Pf + 4022c120 20205841 70251020 26202023 c052cc7c XAp%. & #.R.| + 4022c130 6d07d6e2 04284472 0205b202 04807711 m....(Dr......w. + 4022c140 b0a72072 02062202 07007711 a0772080 .. r.."...w..w . + 4022c150 22017022 20207875 80a20170 aa206072 ".p" xu...p. `r + 4022c160 10807711 20284170 7a206022 10202720 ..w. (Apz `". ' + 4022c170 3022c0d6 62005d04 48045674 fb490ee9 0"..b.].H.Vt.I.. + 4022c180 05460200 e90f46c7 ff2d0e85 6afded0f .F....F..-..j... + 4022c190 c6c4ff00 32afa037 04020658 ff222c1e ....2..7...X.",. + 4022c1a0 cc12225c 3b160e06 220cac56 a205684e .."\;..."..V..hN + 4022c1b0 32060552 06042206 06803311 50432000 2..R.."...3.PC . + 4022c1c0 22114032 20220607 80220130 22208042 ".@2 "...".0" .B + 4022c1d0 01203875 30542031 c6533042 10804411 . 8u0T 1.S0B..D. + 4022c1e0 20284140 45203022 10202420 321e0642 (A@E 0". $ 2..B + 4022c1f0 2c144033 c03a2232 1c3027b3 0b22a000 ,.@3.:"2.0'..".. + 4022c200 226c2a22 a001224c ac220c24 20206422 "l*".."L.".$ d" + 4022c210 4c240c02 08b1c8a1 d891e881 f87112c1 L$...........q.. + 4022c220 300df000 12c1f032 221f0931 1603060c 0......2"..1.... + 4022c230 040c168d 065d049d 047d04ad 04b813b8 .....]...}...... + 4022c240 4b9c4bcc 38390946 00007d03 88039d03 K.K.89.F..}..... + 4022c250 a9033d08 0c08c604 00cc4639 04860000 ..=.......F9.... + 4022c260 005d0368 034d03a9 033d060c 0656c3fc .].h.M...=...V.. + 4022c270 8c958c74 32221e32 64005262 1e32024e ...t2".2d.Rb.2.N + 4022c280 72621f1b 3332424e 0c033262 10c5b5ff rb..32BN..2b.... + 4022c290 083112c1 100df000 6388fe3f 18d9fe3f .1......c..?...? + 4022c2a0 12c1f0c9 21cd0221 5beee901 2872ed03 ....!..![...(r.. + 4022c2b0 31faffd9 110c05dd 0442a128 09310191 1........B.(.1.. + 4022c2c0 54c00000 16120441 f5ff0c03 39023804 T......A....9.8. + 4022c2d0 e922d932 c9128ca3 581357bc 12c055c0 .".2....X.W...U. + 4022c2e0 59133902 2904c607 00681467 35113d04 Y.9.)....h.g5.=. + 4022c2f0 48125813 5054c048 0359128c 6406faff H.X.PT.H.Y..d... + 4022c300 5056c059 14490229 030831c8 21d811e8 PV.Y.I.)..1.!... + 4022c310 0112c110 0df00000 d0c32240 98c32240 .........."@.."@ + 4022c320 14d9fe3f 31fdff21 eb5e12c1 f042a000 ...?1..!.^...B.. + 4022c330 0931c261 0285f6ff 218a930c 0cc02000 .1.a....!..... . + 4022c340 c90231fd 5521fd55 4d0c45f5 ff31f155 ..1.U!.UM.E..1.U + 4022c350 c04c2022 a1f485f4 ff31e555 c04c2022 .L ".....1.U.L " + 4022c360 a064c5f3 ff31d955 c04c2022 a3e805f3 .d...1.U.L ".... + 4022c370 ff31eaff 4d0c22a0 7d45f2ff 21025808 .1..M.".}E..!.X. + 4022c380 31c02000 380221e6 ffc82139 0212c110 1. .8.!...!9.... + 4022c390 0df00000 10d9fe3f 12c1f009 318597fd .......?....1... + 4022c3a0 21695528 02568200 21695522 220016e2 !iU(.V..!iU""... + 4022c3b0 0031daff 0c0422a0 7d45eeff c6010000 .1....".}E...... + 4022c3c0 21f5ff0c 03390208 3112c110 0df00000 !....9..1....... + 4022c3d0 12c1f009 31c564fb 31d0ff21 be5e42a0 ....1.d.1..!.^B. + 4022c3e0 00c5ebff 083112c1 100df000 41acff12 .....1......A... + 4022c3f0 c1f07d02 28040931 5d040c06 bc928822 ..}.(..1]......" + 4022c400 48027798 2a883237 9825cc46 49058600 H.w.*.27.%.FI... + 4022c410 00004906 38028c63 58134812 4a454913 ..I.8..cX.H.JEI. + 4022c420 319eff42 a16f0138 54c00000 46020000 1..B.o.8T...F... + 4022c430 6d028c34 2d0406f1 ff083112 c1100df0 m..4-.....1..... + 4022c440 12c1d021 d057c9a1 c195ffd9 91c02000 ...!.W........ . + 4022c450 d802280c 09b1e981 f9711662 05219c5e ..(......q.b.!.^ + 4022c460 e1b0ff22 0200cc62 280e319a 5e060100 ..."...b(.1.^... + 4022c470 280e32a1 38202dc0 019556c0 0000fd02 (.2.8 -...V..... + 4022c480 280c3812 373f2c30 ffc03802 5822390c (.8.7?,0..8.X"9. + 4022c490 68323181 ffd90e42 a1a25901 6911011a h21....B..Y.i... + 4022c4a0 54c00000 58016811 1645fd2d 06c00500 T...X.h..E.-.... + 4022c4b0 06f3ff00 08b1c8a1 d891e881 f87112c1 .............q.. + 4022c4c0 300df000 21b057c0 20003802 2195ff39 0...!.W. .8.!..9 + 4022c4d0 020df000 21b0ff12 c1f03802 0931dcb3 ....!.....8..1.. + 4022c4e0 31195538 03cc5331 19553803 8cd30c13 1.U8..S1.U8..... + 4022c4f0 3902318a ff0c0422 a07d45da ff083112 9.1....".}E...1. + 4022c500 c1100df0 6388fe3f 21c3ed31 feff2812 ....c..?!..1..(. + 4022c510 12c1f00c 0542a3b0 c9210931 01fa53c0 .....B...!.1..S. + 4022c520 0000cd02 8ce22c44 0c0301b9 52c00000 ......,D....R... + 4022c530 22af8022 4c0a0831 2d0cc821 12c1100d ".."L..1-..!.... + 4022c540 f0000000 80e7fe3f 41ffff12 c1f03804 .......?A.....8. + 4022c550 09312793 0e383339 04460600 00004833 .1'..839.F....H3 + 4022c560 cc843833 5663ffc6 02000000 4792f248 ..83Vc......G..H + 4022c570 324933c6 faff31e3 ff42a3a1 01e353c0 2I3...1..B....S. + 4022c580 00000831 12c1100d f0000000 71eeff0c ...1........q... + 4022c590 0988070c 16306993 4040f45d 08606074 .....0i.@@.].``t + 4022c5a0 ac952715 20a21509 479a1ccc 357c3346 ..'. ...G...5|3F + 4022c5b0 1500b805 165bff56 26ffa803 16dafea7 .....[.V&....... + 4022c5c0 1bea8600 00000c19 583586f4 ff571301 ........X5...W.. + 4022c5d0 58035902 ec444172 5e6188d2 3d089c73 X.Y..DAr^a..=..s + 4022c5e0 6a549c35 52130947 95091b44 4040f43d jT.5R..G...D@@.= + 4022c5f0 0846faff 383306f9 ff5603fb 4252090c .F..83...V..BR.. + 4022c600 03379903 89322907 2d030df0 12c1f0c9 .7...2).-....... + 4022c610 21cd0222 1209d911 e9010931 dd0340e0 !..".......1..@. + 4022c620 f48c720c 029c3d28 0dc60300 0c043d0c ..r...=(......=. + 4022c630 2d0c85f5 ffecb206 faff0000 320c1029 -...........2..) + 4022c640 1c0c4220 2320224c 1021beff e25c0a48 ..B # "L.!...\.H + 4022c650 023d048c 73c71309 383346fd ff00493c .=..s...83F...I< + 4022c660 c9020c02 0831c821 d811e801 12c1100d .....1.!........ + 4022c670 f0000000 0c034202 10391232 520a7cb3 ......B..9.2R.|. + 4022c680 30341032 42100df0 39724982 0df00000 04.2B...9rI..... + 4022c690 12c1c0f9 b1fd0222 1209c9e1 d9d109f1 ......."........ + 4022c6a0 e9c14941 6951dd03 50c0f48c d20c832d ..IAiQ..P......- + 4022c6b0 0d4566fc ed0dbc22 86040000 0c043d0f .Ef...."......=. + 4022c6c0 2d0f85ec ff56f20f 46f8ff00 000042a0 -....V..F.....B. + 4022c6d0 0032a008 0c12c573 fced027c f2167e0e .2.....s...|..~. + 4022c6e0 221d048c 523d0d2d 0e0593fc 321f0998 "...R=.-....2... + 4022c6f0 1e802311 30384130 22202020 f4224900 ..#.08A0" ."I. + 4022c700 20284138 41224901 802c11c0 c841c0c2 (A8A"I..,...A.. + 4022c710 200c02c0 c0f42249 06224907 2803c249 ....."I."I.(..I + 4022c720 0232a0f0 c0c84120 2310c249 0332a0e0 .2....A #..I.2.. + 4022c730 37921022 0f103762 0a320e0d 0c422023 7.."..7b.2...B # + 4022c740 20224e0d 280fcd0f 4851cc42 4bc4c605 "N.(...HQ.BK... + 4022c750 00003224 01371210 22affad7 1e69e02e ..2$.7.."....i.. + 4022c760 20c563fc 7ca28617 00621e04 80361160 .c.|....b...6.` + 4022c770 28412023 202020f4 22490420 28412249 (A # ."I. (A"I + 4022c780 05220f10 07e21f42 21043d0c 1c152d0e .".....B!.=...-. + 4022c790 92610645 f6033115 56986120 23832249 .a.E..1.V.a #."I + 4022c7a0 062028f4 22490728 51620f09 520f0a48 . (."I.(Qb..R..H + 4022c7b0 4129013d 0c1c172d 0e85eafb cd02d71e A).=...-........ + 4022c7c0 062d0ec5 5dfc2d0c 08f1c8e1 d8d1e8c1 .-..].-......... + 4022c7d0 f8b112c1 400df000 12c1e0c9 61cd0228 ....@.......a..( + 4022c7e0 0462a0f0 20661022 a0e02026 c0d95150 .b.. f.".. &..QP + 4022c7f0 d0f452cc 18205493 2d053901 49110971 ..R.. T.-.9.I..q + 4022c800 8597fb6d 0238017c c248118c 565d0d2d ...m.8.|.H..V].- + 4022c810 0cc5e7ff 0871c861 d85112c1 200df000 .....q.a.Q.. ... + 4022c820 52120a12 c1f04b42 0931c5fa ff083112 R.....KB.1....1. + 4022c830 c1100df0 12c1d0f9 71fd0228 1209b1c9 ........q..(.... + 4022c840 a1d991e9 81390132 02002911 3030342b .....9.2..).004+ + 4022c850 23421f04 e0221127 240fe033 01303060 #B...".'$..3.00` + 4022c860 3030312d 0f054bfc 8c922d0f 0553fcc6 001-..K...-..S.. + 4022c870 63000000 00c15cee 422f0132 2100222c c.....\.B/.2!.", + 4022c880 004921c5 eafb4821 ed022204 01320400 .I!...H!.."..2.. + 4022c890 80221130 222080d2 11202841 20dd2022 .".0" ... (A . " + 4022c8a0 04036204 02802211 60222080 32112028 ..b...".`" .2. ( + 4022c8b0 41203320 3030f44c 42d0d0f4 4c362793 A 3 00.LB...L6'. + 4022c8c0 1e671d02 86260058 01288516 32092812 .g...&.X.(..2.(. + 4022c8d0 16e20838 12164312 6145ee68 06c60400 ...8..C.aE.h.... + 4022c8e0 67931927 9d7b5801 28951642 07380216 g..'.{X.(..B.8.. + 4022c8f0 a310680c 67930286 40000619 002111ff ..h.g...@....!.. + 4022c900 a80c9802 22a0f00c 0c62af20 202a106a ...."....b. *.j + 4022c910 225d0c0c 16205683 2135eee0 6c836055 "]... V.!5..l.`U + 4022c920 2078026d 0c2d090c 4bbc3282 12093798 x.m.-..K.2...7. + 4022c930 278802cc 1e164800 a718019c a5cc7c82 '.....H.......|. + 4022c940 0210b088 1080c283 82120ad7 980a8812 ................ + 4022c950 16c80977 98028625 006d0228 3206f2ff ...w...%.m.(2... + 4022c960 dc0c5801 2121ee38 15222200 271302c6 ..X.!!.8."".'... + 4022c970 bdff0c0c 22040732 04068022 11302220 ...."..2...".0" + 4022c980 16420162 1f044118 ee3118ee 52a011f0 .B.b..A..1..R... + 4022c990 2f2045d6 035612ed 7c832d0f 8537fc56 / E..V..|.-..7.V + 4022c9a0 72ec9c6c 787c1607 ec5110ee 288c6d0d r..lx|...Q..(.m. + 4022c9b0 4d0fc03c 20c00700 86110000 56aeea21 M..< .......V..! + 4022c9c0 0aee32a0 f0280220 231032a0 e0379202 ..2..(. #.2..7.. + 4022c9d0 86a5ff28 11320200 2d0f3030 34e03311 ...(.2..-.004.3. + 4022c9e0 8b334533 fc0c332d 0f056b01 869eff00 .3E3..3-..k..... + 4022c9f0 8c963832 393631d3 fe993229 03cd0246 ..82961...2)...F + 4022ca00 dcff08b1 c8a1d891 e881f871 12c1300d ...........q..0. + 4022ca10 f0000000 48029c74 37940938 4439020d ....H..t7..8D9.. + 4022ca20 f048448c a4284427 93f62843 2944c6fb .HD..(D'..(C)D.. + 4022ca30 ff0df000 12c1f0d9 11dd0228 03c92129 ...........(..!) + 4022ca40 0d281309 31291d28 03cd0366 b24a3823 .(..1).(...f.J8# + 4022ca50 282d3803 0c443902 382c282d 38133912 (-8..D9.8,(-8.9. + 4022ca60 382c282d cb33cb22 016b51c0 0000382c 8,(-.3.".kQ...8, + 4022ca70 282d8b33 0c448b22 016751c0 0000382c (-.3.D.".gQ...8, + 4022ca80 282d3843 3942382c 282d3853 3952382c (-8C9B8,(-8S9R8, + 4022ca90 282d3863 3962c60b 00382328 2d38030c (-8c9b...8#(-8.. + 4022caa0 44390238 2c282d38 13391238 2c282dcb D9.8,(-8.9.8,(-. + 4022cab0 33cb2201 5851c000 00382c28 2d0c448b 3.".XQ...8,(-.D. + 4022cac0 338b2201 5451c000 00283c08 31293d28 3.".TQ...(<.1)=( + 4022cad0 4c294d22 0c14224d 14286cc8 21296dd8 L)M".."M.(l.!)m. + 4022cae0 1112c110 0df00000 4802cc34 39024603 ........H..49.F. + 4022caf0 00222417 8c424d02 46fdff00 3264170c ."$..BM.F...2d.. + 4022cb00 02226317 0df00000 48029ce4 37940d32 ."c.....H...7..2 + 4022cb10 24173902 0df00000 4224178c d4222417 $.9.....B$..."$. + 4022cb20 2793f422 23172264 17c6faff 0df00000 '.."#."d........ + 4022cb30 4802cc34 39028602 0028448c 324d0286 H..49....(D.2M.. + 4022cb40 fdff3944 0c022943 0df00000 6d020c02 ..9D..)C....m... + 4022cb50 27165a21 f5e74802 5d049c25 28052796 '.Z!..H.]..%(.'. + 4022cb60 06590386 0e000000 522517c6 faff0000 .Y......R%...... + 4022cb70 2103e758 02860000 522517ac d5280527 !..X....R%...(.' + 4022cb80 96f55826 0c022715 24683527 161f5805 ..X&..'.$h5'..X. + 4022cb90 27151a9c 54283427 960a2824 27950549 '...T(4'..($'..I + 4022cba0 030c120d f0422417 c6f9ff00 0c020df0 .....B$......... + 4022cbb0 12c1e0c9 610971cd 02d951e9 4122a0f4 ....a.q...Q.A".. + 4022cbc0 16ac0b38 0c26b302 862c00d1 d7e70c02 ...8.&...,...... + 4022cbd0 380d9c63 48038ca4 42240066 b40522c2 8..cH...B$.f..". + 4022cbe0 01202074 322317c6 f9ff0000 3168e8c0 . t2#......1h.. + 4022cbf0 20003803 30307437 320522a0 f1461f00 .8.00t72."..F.. + 4022cc00 10112085 dfe46612 123d010c 0245b3e6 .. ...f..=...E.. + 4022cc10 280156f2 0322a0fc 86180000 c5dde466 (.V..".........f + 4022cc20 22063d01 0c12c6f8 ff05dde4 66322522 ".=.........f2%" + 4022cc30 2c023d01 e83222a0 0185b0e6 280180ee ,.=..2".....(... + 4022cc40 11802211 2901271e 0b85ebe5 2652b916 ..".).'.....&R.. + 4022cc50 22fc4609 00280d9c b238029c 13480366 ".F..(...8...H.f + 4022cc60 b40d482c 38234814 38133794 0246e2ff ..H,8#H.8.7..F.. + 4022cc70 22221706 f8ff2d0c 85a6fa20 20740871 ""....-.... t.q + 4022cc80 c861d851 e84112c1 200df000 12c1f009 .a.Q.A.. ....... + 4022cc90 3132a0f4 bc424802 66c43031 a3e73803 12...BH.f.01..8. + 4022cca0 9cc34803 9c045804 66c50c58 22482452 ..H...X.f..X"H$R + 4022ccb0 25014224 01471510 32231746 f8ff0000 %.B$.G..2#.F.... + 4022ccc0 45190120 30748600 0032a0f1 08312d03 E.. 0t...2...1-. + 4022ccd0 12c1100d f0000000 6388fe3f 12c1e0d9 ........c..?.... + 4022cce0 51dd030c 03c961e9 41cd0240 e0f40c12 Q.....a.A..@.... + 4022ccf0 4d03d042 83e02393 09713901 20242037 M..B..#..q9. $ 7 + 4022cd00 1202c62a 00379c02 4629003d 01c02c20 ...*.7..F).=.., + 4022cd10 85e3ff16 a2090c42 480c291c 3d0226b4 .......BH.).=.&. + 4022cd20 1226c402 46220028 014d0e3d 0d45f900 .&..F".(.M.=.E.. + 4022cd30 c61d0000 28014202 48164407 42221347 ....(.B.H.D.B".G + 4022cd40 831d4862 0c038ca4 1b334844 303074c6 ..Hb.....3HD00t. + 4022cd50 fcff0000 42023022 a0f947b3 56860200 ....B.0"..G.V... + 4022cd60 28123212 3a22a0f9 f6834831 dbff42a1 (.2.:"....H1..B. + 4022cd70 8f1c4201 b754c000 00cd0222 a0ffbc2c ..B..T....."..., + 4022cd80 28013d0c 22c218d9 0cd91ce2 5c04e25c (.=.".......\..\ + 4022cd90 05c5d9ff 28013872 cc13c262 07322213 ....(.8r...b.2". + 4022cda0 2763040c 03324248 854ffa20 20748600 'c...2BH.O. t.. + 4022cdb0 0022a0f4 0871c861 d851e841 12c1200d ."...q.a.Q.A.. . + 4022cdc0 f0000000 12c1e0d9 51dd030c 03c961e9 ........Q.....a. + 4022cdd0 41cd04ed 024d030c 12d04283 c0239309 A....M....B..#.. + 4022cde0 71390120 24203792 02379e05 7c444613 q9. $ 7..7..|DF. + 4022cdf0 00001031 20e02e20 05d5ff16 d2fe222e ...1 .. ......". + 4022ce00 0066b2e7 28017cf4 22221abc 02459200 .f..(.|.""...E.. + 4022ce10 0c044712 29c7b201 cd022221 00c04c20 ..G.)....."!..L + 4022ce20 32221a2d 0d45b800 28012812 8c923842 2".-.E..(.(...8B + 4022ce30 664305c0 30f4059a fc00cc11 c0403108 fC..0........@1. + 4022ce40 712d04c8 61d851e8 4112c120 0df00000 q-..a.Q.A.. .... + 4022ce50 12c1e0c9 61cd020c 02097129 01279c04 ....a.....q).'.. + 4022ce60 7c420609 003d012d 0c05ceff 1602ff28 |B...=.-.......( + 4022ce70 0c66b2eb 28013222 1a0c0227 130b3023 .f..(.2"...'..0# + 4022ce80 20058b00 00221120 20310871 c86112c1 ....". 1.q.a.. + 4022ce90 200df000 12c1e0d9 51dd030c 03c961e9 .......Q.....a. + 4022cea0 41cd0240 e0f40c12 4d03d042 83e02393 A..@....M..B..#. + 4022ceb0 09713901 20242037 9202379c 047c4206 .q9. $ 7..7..|B. + 4022cec0 08001031 20c02c20 05c8ff16 e2fe222c ...1 ., ......", + 4022ced0 0066c2e8 28014d0e 3d0dc5c4 00002211 .f..(.M.=.....". + 4022cee0 20203108 71c861d8 51e84112 c1200df0 1.q.a.Q.A.. .. + 4022cef0 21945212 c1f0c020 00280232 a5b40931 !.R.... .(.2...1 + 4022cf00 01f353c0 00000831 20207412 c1100df0 ..S....1 t..... + 4022cf10 2040740b 34303074 0ce522a0 f437350f @t.400t.."..75. + 4022cf20 32a5b430 24823186 52c02000 29030c02 2..0$.1.R. .)... + 4022cf30 0df00000 22a5b40d f0000000 2194e7c0 ....".......!... + 4022cf40 20002802 2020740d f0000000 2040740b .(. t..... @t. + 4022cf50 34303074 0ce522a0 f4373509 218ce7c0 400t.."..75.!... + 4022cf60 20004902 0c020df0 2142e6c0 20002802 .I.....!B.. .(. + 4022cf70 2020740d f0000000 2040740b 34303074 t..... @t.400t + 4022cf80 0cb522a0 f4373509 213ae6c0 20004902 .."..75.!:.. .I. + 4022cf90 0c020df0 2136e6c0 20002802 2020740d ....!6.. .(. t. + 4022cfa0 f0000000 2040740b 34303074 0cb522a0 .... @t.400t..". + 4022cfb0 f4373509 212ee6c0 20004902 0c020df0 .75.!... .I..... + 4022cfc0 4d0222a0 f49cf438 0426c31b 21ece538 M."....8.&..!..8 + 4022cfd0 029c0328 03279404 2203500d f0322317 ...(.'..".P..2#. + 4022cfe0 46fbff00 0022a0f4 0df00000 5d023030 F...."......].00 + 4022cff0 7422a0f4 acd52165 e7c02000 480222a0 t"....!e.. .H.". + 4022d000 f4373420 480526c4 1b21dce5 48029c04 .74 H.&..!..H... + 4022d010 28042795 06324450 0c020df0 422417c6 (.'..2DP....B$.. + 4022d020 faff22a0 f40df000 303074ac 520c8437 ..".....00t.R..7 + 4022d030 342141bd e648049c 94580457 920d8ca5 4!A..H...X.W.... + 4022d040 580266b5 06324430 0c020df0 42241706 X.f..2D0....B$.. + 4022d050 f9ff0000 22a0f40d f0000000 4d0222a0 ....".......M.". + 4022d060 f48c3439 4422a000 0df00000 4d0222a0 ..49D"......M.". + 4022d070 f48cb458 248c7548 0426c403 39750c02 ...X$.uH.&..9u.. + 4022d080 0df00000 4d0222a0 f48c4428 2439420c ....M."...D($9B. + 4022d090 020df000 4d0222a0 f48c3439 3422a000 ....M."...494".. + 4022d0a0 0df00000 4d0222a0 f48c4428 2439520c ....M."...D($9R. + 4022d0b0 020df000 4d0222a0 f48c4428 2439620c ....M."...D($9b. + 4022d0c0 020df000 84e7fe3f 12c1e0d9 51e94109 .......?....Q.A. + 4022d0d0 71c961f9 31dd0230 e320cc42 22a0f486 q.a.1..0. .B"... + 4022d0e0 2800f1f8 ff42a0b4 0c032d0f 01c94fc0 (....B....-...O. + 4022d0f0 00000c02 224d1421 8ce6c802 280d26b2 ...."M.!....(.&. + 4022d100 0f26c273 c61c0000 222c1527 1d0ac22c .&.s....",.'..., + 4022d110 17563cff c6180000 00320d14 0c443033 .V<......2...D03 + 4022d120 90f023a0 380c3813 3902382c 3912cb3c ..#.8.8.9.8,9..< + 4022d130 8b2201b8 4fc00000 220c6456 f2fc220d ."..O...".dV..". + 4022d140 141b2222 4d1406f1 ff00280c 279d2532 ..""M.....(.'.%2 + 4022d150 0d140c44 303390f0 23a0381d 3902382c ...D03..#.8.9.8, + 4022d160 3912cb3c 22c20801 ab4fc000 00220d14 9..<"....O...".. + 4022d170 1b22224d 14c22c17 56ecfcf9 0e220d14 .""M..,.V....".. + 4022d180 1682f50c 020871c8 61d851e8 41f83112 ......q.a.Q.A.1. + 4022d190 c1200df0 12c1f009 3132a0f4 bc424802 . ......12...BH. + 4022d1a0 66b43031 61e63803 9cc34803 9c045804 f.01a.8...H...X. + 4022d1b0 66b50c58 22482452 25014224 01471510 f..X"H$R%.B$.G.. + 4022d1c0 32231746 f8ff0000 055efa20 30748600 2#.F.....^. 0t.. + 4022d1d0 0032a0f1 08312d03 12c1100d f0000000 .2...1-......... + 4022d1e0 12c1e0c9 61cd030c 03097139 01404074 ....a.....q9.@@t + 4022d1f0 37120cf6 24092614 0c3160e5 3803dc33 7...$.&..1`.8..3 + 4022d200 22a0f406 08003d01 0594ff16 12ff2801 ".....=.......(. + 4022d210 c9a28601 00480347 9206c9a3 0c024601 .....H.G......F. + 4022d220 00322317 86f5ff08 71c86112 c1200df0 .2#.....q.a.. .. + 4022d230 12c1e0c9 61cd020c 02097129 01279c05 ....a.....q).'.. + 4022d240 22a0f4c6 0a00280c 66b2f410 3120c02c ".....(.f...1 ., + 4022d250 20858fff 1682fe48 01222415 cc62381c ......H."$..b8. + 4022d260 22a0fb26 630b4024 2032a000 c514fa22 "..&c.@$ 2....." + 4022d270 a0000871 c86112c1 200df000 12c1e0c9 ...q.a.. ....... + 4022d280 61cd020c 02097129 01279c05 22a0f446 a.....q).'.."..F + 4022d290 0800280c 66b2f43d 01c02c20 c58aff16 ..(.f..=.., .... + 4022d2a0 92fe381c 22a0fb26 63092801 32a001c5 ..8."..&c.(.2... + 4022d2b0 10fa0c02 0871c861 12c1200d f0000000 .....q.a.. ..... + 4022d2c0 12c1e0d9 51dd020c 02c96109 71290130 ....Q.....a.q).0 + 4022d2d0 c320271d 02279305 22a0f446 1a00280d . '..'.."..F..(. + 4022d2e0 66b2f43d 012d0d45 86ffbc42 38012813 f..=.-.E...B8.(. + 4022d2f0 1642fe48 a232c334 49334222 17492342 .B.H.2.4I3B".I#B + 4022d300 12392212 3a425301 0c844253 032044c0 .9".:BS...BS. D. + 4022d310 4253022d 0c1c4401 3f4fc000 000c0246 BS.-..D.?O.....F + 4022d320 0900281d 8c921c44 312ce726 62074604 ..(....D1,.&b.F. + 4022d330 003128e7 1c442d0c 01374fc0 00000c02 .1(..D-..7O..... + 4022d340 4600007c 42202074 0871c861 d85112c1 F..|B t.q.a.Q.. + 4022d350 200df000 12c1e0c9 6130c074 0c030971 .......a0.t...q + 4022d360 39013792 0522a0f4 060f0038 0266b3f4 9.7..".....8.f.. + 4022d370 3d01857d ff16c2fe 48013224 13281430 =..}....H.2$.(.0 + 4022d380 3c203264 139cd217 630a5202 244c0330 < 2d....c.R.$L.0 + 4022d390 35203242 24322413 37630a42 02080c83 5 2B$2$.7c.B.... + 4022d3a0 30342032 42080c02 0871c861 12c1200d 04 2B....q.a.. . + 4022d3b0 f0000000 12c1e0c9 6130c074 0c030971 ........a0.t...q + 4022d3c0 39013792 0822a0f4 46110000 00003802 9.7.."..F.....8. + 4022d3d0 66b3f13d 014577ff 1692fe48 017cf322 f..=.Ew....H.|." + 4022d3e0 2413c033 30203310 28143264 139ce237 $..30 3.(.2d...7 + 4022d3f0 e30a5202 087c7330 35103242 08322413 ..R..|s05.2B.2$. + 4022d400 17e30b42 022432af bf303410 3242240c ...B.$2..04.2B$. + 4022d410 020871c8 6112c120 0df00000 12c1e0d9 ..q.a.. ........ + 4022d420 5130d074 0c03c961 09713901 cd043712 Q0.t...a.q9...7. + 4022d430 5f37145c 32220066 b3561031 20c570ff _7.\2".f.V.1 .p. + 4022d440 16d20428 01322213 37634538 120c0227 ...(.2".7cE8...' + 4022d450 1341261d 22271d0b 662d3528 0c226329 .A&."'..f-5(."c) + 4022d460 46090000 480cb024 114022c0 4022a0d0 F...H..$.@".@".. + 4022d470 22112263 27060400 480cb024 114022c0 "."c'...H..$.@". + 4022d480 4022a0d0 22112263 280c0246 01000000 @".."."c(..F.... + 4022d490 0022a0f4 0871c861 d85112c1 200df000 ."...q.a.Q.. ... + 4022d4a0 12c1e0d9 5130d074 0c03c961 09713901 ....Q0.t...a.q9. + 4022d4b0 cd043712 4b371448 380266b3 433d01c5 ..7.K7.H8.f.C=.. + 4022d4c0 68ffbcb2 28013222 13376334 48120c02 h...(.2".7c4H... + 4022d4d0 27143026 1d16271d 0a662d24 22242986 '.0&..'..f-$"$). + 4022d4e0 05000000 32a3e822 24274601 00222428 ....2.."$'F.."$( + 4022d4f0 32a3e801 7652c000 00290c0c 02c60000 2...vR...)...... + 4022d500 0022a0f4 0871c861 d85112c1 200df000 ."...q.a.Q.. ... + 4022d510 12c1e00c 03097139 01379205 22a0f4c6 ......q9.7.."... + 4022d520 07003802 26c30845 7df92020 74460400 ..8.&..E}. tF.. + 4022d530 10312085 61ff1622 fe222100 458d0022 .1 .a.."."!.E.." + 4022d540 a0000871 12c1200d f0000000 50c30000 ...q.. .....P... + 4022d550 1cd9fe3f 12c1f0c9 21c1fdff d2610102 ...?....!....a.. + 4022d560 6103d2a3 ff101120 8514e231 f8ff01dc a...... ...1.... + 4022d570 50c00000 273d0222 d204480c 4712e508 P...'=."..H.G... + 4022d580 31290cd8 11c82112 c1100df0 30632012 1)....!.....0c . + 4022d590 c1f04034 20504520 5d022d06 09318503 ..@4 PE ].-..1.. + 4022d5a0 f9083112 c1100df0 12c1e041 2bdcc261 ..1........A+..a + 4022d5b0 06026107 0c155244 00202074 cd04dca3 ..a...RD. t.... + 4022d5c0 21e2e33d 01290122 a000c5f5 f80c123d !..=.).".......= + 4022d5d0 0145f5f8 0c02224c 00860000 85f4f802 .E...."L........ + 4022d5e0 2107c221 0612c120 80000000 12c1f020 !..!... ....... + 4022d5f0 20740261 0385f9f8 02210312 c1108000 t.a.....!...... + 4022d600 00000000 9888fe3f f4052340 12c1f0c9 .......?..#@.... + 4022d610 21c80209 31c73308 42220340 2c802733 !...1.3.B".@,.'3 + 4022d620 1331f8ff 21f9ff42 a0760188 52c00000 .1..!..B.v..R... + 4022d630 0c028603 001b23c0 22c03d04 01a950c0 ......#.".=...P. + 4022d640 00002a2c 0831c821 12c1100d f0000000 ..*,.1.!........ + 4022d650 6388fe3f 12c1f0d9 11d1fdff e9011cd4 c..?............ + 4022d660 ed023d0d 1c02c921 09310179 52c00000 ..=....!.1.yR... + 4022d670 cd020c02 271c281b 2e293c2c 043d0d01 ....'.(..)<,.=.. + 4022d680 7452c000 00290c8c 72292c29 1c2d0c46 tR...)..r),).-.F + 4022d690 03002d0c 2c443d0d 019c4fc0 00000c02 ..-.,D=...O..... + 4022d6a0 0831c821 d811e801 12c1100d f0000000 .1.!............ + 4022d6b0 28320df0 38023922 39120df0 c588fe3f (2..8.9"9......? + 4022d6c0 fc052340 12c1f0c9 210931d9 11cd028c ..#@....!.1..... + 4022d6d0 222802dc 2231f9ff 21faff42 a03a015b "(.."1..!..B.:.[ + 4022d6e0 52c00000 06080000 00d1d9ff 28023cb4 R...........(.<. + 4022d6f0 3d0d0185 4fc00000 280c3cc4 3d0d0182 =...O...(.<.=... + 4022d700 4fc00000 0c02290c 0831c821 d81112c1 O.....)..1.!.... + 4022d710 100df000 28320b22 0df00000 68125822 ....(2."....h.X" + 4022d720 3d026045 c00b2457 36052833 0b224a22 =.`E..$W6.(3."J" + 4022d730 0df00000 12c1f009 31c921cd 02c5fdff ........1.!..... + 4022d740 383c0831 0b332023 c0c82112 c1100df0 8<.1.3 #..!..... + 4022d750 12c1f009 3145fcff 0c030c14 08312034 ....1E.......1 4 + 4022d760 832d0312 c1100df0 12c1f009 31c921cd .-..........1.!. + 4022d770 0285faff 383c0831 0b332033 c00c140c ....8<.1.3 3.... + 4022d780 02302483 c82112c1 100df000 28220df0 .0$..!......(".. + 4022d790 28120df0 b588fe3f ec052340 84601040 (......?..#@.`.@ + 4022d7a0 12c1c0c9 e1e9c1c8 02ed0228 32392129 ...........(29!) + 4022d7b0 112a3c2d 0ed9d1f9 b109f1dd 04390145 .*<-.........9.E + 4022d7c0 f7fffd02 f7bd5928 2e3811c0 22c0da22 ......Y(.8..".." + 4022d7d0 014450c0 00002a9c 28012739 1331edff .DP...*.(.'9.1.. + 4022d7e0 21eeff42 a0830119 52c00000 0c02460c !..B....R.....F. + 4022d7f0 003801d0 7fc09023 c077b201 7d023821 .8.....#.w..}.8! + 4022d800 4d072d09 79419931 01e5ffc0 00007841 M.-.yA.1......xA + 4022d810 98318c62 9022c0da 22860100 7add86e8 .1.b.".."...z... + 4022d820 ff2d0f08 f1c8e1d8 d1e8c1f8 b112c140 .-.............@ + 4022d830 0df00000 a688fe3f e4052340 dc052340 .......?..#@..#@ + 4022d840 12c1d0c9 a1cd02e9 812832e8 0cd991f9 .........(2..... + 4022d850 7109b1fd 032aee40 d42047b2 0220d220 q....*.@. G.. . + 4022d860 2d0c85eb ff7d020c 06d71645 281ce732 -....}.....E(..2 + 4022d870 0b42a096 31f0ff21 f0ff0615 00203ec0 .B..1..!..... >. + 4022d880 605dc057 b3015d03 4d053d0f 59216901 `].W..].M.=.Y!i. + 4022d890 791101df 4dc00000 281c5821 68015a22 y...M...(.X!h.Z" + 4022d8a0 291c5a66 7811279e bf280c29 1c06eeff ).Zfx.'..(.).... + 4022d8b0 00003d0d d7b72238 1c2d0c05 d5ff292c ..=..."8.-....), + 4022d8c0 2d0cc5e8 ff3d0dcc f231daff 21dcff42 -....=...1..!..B + 4022d8d0 a0a201de 51c00000 0c0308b1 2d03c8a1 ....Q.......-... + 4022d8e0 d891e881 f87112c1 300df000 8488fe3f .....q..0......? + 4022d8f0 d4052340 cc052340 12c1d0c9 a1e981cd ..#@..#@........ + 4022d900 02e80228 32d9912a ee2d0cf9 7109b132 ...(2..*.-..q..2 + 4022d910 610040f4 2045e0ff 7d020c0d f71d4428 a.@. E..}.....D( + 4022d920 1ce7320c 42a0b131 f1ff21f1 ffc61300 ..2.B..1..!..... + 4022d930 00203ec0 d05fc057 b3015d03 68014d05 . >.._.W..].h.M. + 4022d940 da365921 791101b3 4dc00000 281c5821 .6Y!y...M...(.X! + 4022d950 78115a22 291c5add 279ec028 0c291c46 x.Z").Z.'..(.).F + 4022d960 eeff0000 f7b72438 1c2d0c05 caff292c ......$8.-....), + 4022d970 2d0cc5dd ffdc3231 ddff21de ff42a0bd -.....21..!..B.. + 4022d980 01b351c0 00000c02 86000000 281c08b1 ..Q.........(... + 4022d990 c8a1d891 e881f871 12c1300d f0000000 .......q..0..... + 4022d9a0 7088fe3f c4052340 bc052340 12c1d0f9 p..?..#@..#@.... + 4022d9b0 71fd022d 03c9a1d9 91e98109 b1cd0340 q..-...........@ + 4022d9c0 d42005d7 ffed020c 02d73e6f 680c283c . ........>oh.(< + 4022d9d0 0c052a66 d7154438 2c67330c 42a0d031 ..*f..D8,g3.B..1 + 4022d9e0 f0ff21f0 ff861100 003026c0 507dc077 ..!......0&.P}.w + 4022d9f0 b2017d02 4d075a2f 59016911 79210185 ..}.M.Z/Y.i.y!.. + 4022da00 4dc00000 282c7821 58017a22 6811292c M...(,x!X.z"h.), + 4022da10 7a552796 be280c29 2cc6edff 2d0c45d1 zU'..(.),...-.E. + 4022da20 ff2a2d27 1e1331de ff21dfff 42a0da01 .*-'..1..!..B... + 4022da30 8751c000 000c0246 0000282c 08b1c8a1 .Q.....F..(,.... + 4022da40 d891e881 f87112c1 300df000 6388fe3f .....q..0...c..? + 4022da50 12c1c0c9 e1d9d1e9 c1f9b109 f1cd0222 ..............." + 4022da60 05006060 f4224c0c 220501fd 03224c0d ..``."L."...."L. + 4022da70 220502dd 04224c0e 22050369 2c224c0f "...."L."..i,"L. + 4022da80 391c50e5 2045f7e3 2612123d 010c1245 9.P. E..&..=...E + 4022da90 cbe5380e 28012023 30381137 02063d01 ..8.(. #08.7..=. + 4022daa0 0c0205ca e5280c32 01002822 32420828 .....(.2..("2B.( + 4022dab0 0c320101 28223242 09280c32 01022822 .2..("2B.(.2..(" + 4022dac0 32420a28 0c320103 28223242 0b168d04 2B.(.2..("2B.... + 4022dad0 221d0431 deff42a1 451b2201 5d51c000 "..1..B.E.".]Q.. + 4022dae0 00421d04 3d020c05 ed022d0d c563fb4d .B..=.....-..c.M + 4022daf0 02f91c2d 0d494185 2afb4841 d1d4ff8c ...-.IA.*.HA.... + 4022db00 94280c58 328c353d 0ec00500 42a14e3d .(.X2.5=....B.N= + 4022db10 0d2d0e01 7d4ec000 0008f1c8 e1d8d1e8 .-..}N.......... + 4022db20 c1f8b112 c1400df0 881212c1 b04040f4 .....@.......@@. + 4022db30 d26111e2 61100261 13c26112 f9f13981 .a..a..a..a...9. + 4022db40 49518961 dd02e802 cc487c42 46490000 IQ.a.....H|BFI.. + 4022db50 88811648 ff885116 f8fe32a5 c02d0887 ...H..Q...2..-.. + 4022db60 b30222a5 c042a000 20f0f4f0 3f204024 .."..B.. ...? @$ + 4022db70 20052afb cd024d0c 7cf20c05 165c0f78 .*...M.|....\.x + 4022db80 142d0550 32c06214 053030f4 67b31488 .-.P2.b..00.g... + 4022db90 811b622a 28220200 3a372243 006020f4 ..b*("..:7"C.` . + 4022dba0 c6f7ff00 48048c44 5d0246f4 ff00282e ....H..D].F...(. + 4022dbb0 88022832 89912901 0c0245eb e6ed020c ..(2..)...E..... + 4022dbc0 12c5eae6 294145e3 e3663260 210c9022 ....)AE..f2`!.." + 4022dbd0 02006632 57164e05 884116f8 04220e39 ..f2W.N..A...".9 + 4022dbe0 07624922 08390762 4328013d 0e05b4fa .bI".9.bC(.=.... + 4022dbf0 16920338 41280185 b3fa16f2 020c043d ...8A(.........= + 4022dc00 0f2d0405 21fb3d0c 29714546 fb5692f3 .-..!.=.)qEF.V.. + 4022dc10 2d0e05ec fa889138 71286180 50f44d01 -......8q(a.P.M. + 4022dc20 45bbfe28 718517fb 284185ea fa822109 E..(q...(A....!. + 4022dc30 22210680 50f44d01 3d0cc5b9 feed0222 "!..P.M.=......" + 4022dc40 1c07ac82 2d0c8515 fb8881e2 4d26fa28 ....-.......M&.( + 4022dc50 8851298d f028c022 5d120c03 2d0d8502 .Q)..(."]...-... + 4022dc60 007c22e6 1e0e2d0e 46020000 00002d0c .|"...-.F.....-. + 4022dc70 c512fb7c c2022113 c22112d2 2111e221 ...|..!..!..!..! + 4022dc80 10f8f112 c1500df0 12c1f009 31acc242 .....P......1..B + 4022dc90 1212dc74 38020c34 49132202 26dcc248 ...t8..4I.".&..H + 4022dca0 439c842d 03c00400 46040000 00661307 C..-....F....f.. + 4022dcb0 38820501 00060100 3882c5e6 ff083112 8.......8.....1. + 4022dcc0 c1100df0 12c1c0d9 d14040f4 d812e9c1 .........@@..... + 4022dcd0 09f1c9e1 f9b13941 4921ed02 cc4d7c42 ......9AI!...M|B + 4022dce0 46480000 88411648 ff882116 f8fe32a5 FH...A.H..!...2. + 4022dcf0 c02d0887 b30222a5 c042a000 20f0f4f0 .-...."..B.. ... + 4022dd00 3f204024 20c510fb cd024d0c 7cf20c05 ? @$ .....M.|... + 4022dd10 161c0f78 142d0550 32c06214 053030f4 ...x.-.P2.b..00. + 4022dd20 67b31388 411b622a 28220200 3a372243 g...A.b*("..:7"C + 4022dd30 006020f4 c6f7ff48 048c545d 0286f4ff .` ....H..T].... + 4022dd40 0000280e 38223803 325d0a28 22283229 ..(.8"8.2].("(2) + 4022dd50 1d0c02c5 d1e62901 0c1245d1 e62911c5 ......)...E..).. + 4022dd60 c9e36632 6021a58f 22020066 32578801 ..f2`!.."..f2W.. + 4022dd70 16280588 1116d804 88012208 39076245 .(........".9.bE + 4022dd80 88112208 3907623d 3801281d 059afa16 ..".9.b=8.(..... + 4022dd90 32033811 281d8599 faac920c 043d0f40 2.8.(........=.@ + 4022dda0 24200507 fb3d0c22 6103452c fb56d2f2 $ ...=."a.E,.V.. + 4022ddb0 280105d2 fa38312d 0d45a6fe 283105fe (....81-.E..(1.. + 4022ddc0 fa281105 d1fad02d 20c03c20 05a5fe20 .(.....- .< ... + 4022ddd0 d220221c 07ac522d 0c45fcfa 8841d24e . "...R-.E...A.N + 4022dde0 26fa2888 21298ef0 28c0225e 120c132d &.(.!)..(."^...- + 4022ddf0 0e45e9ff 7c22e61d 0b2d0d86 01002d0c .E..|"...-....-. + 4022de00 c5f9fa7c c208f1c8 e1d8d1e8 c1f8b112 ...|............ + 4022de10 c1400df0 12c1f0c2 61020931 d911cd02 .@......a..1.... + 4022de20 162202d8 12d02d20 8584fe2d 0d8571fe ."....- ...-..q. + 4022de30 213ee33d 0c05cdfe 3105ff42 a1682d0c !>.=....1..B.h-. + 4022de40 01b24dc0 00000831 c821d811 12c1100d ..M....1.!...... + 4022de50 f0000000 50da2240 12c1f0d9 11e90109 ....P."@........ + 4022de60 31c921ed 02056afe dd0222a0 ff167d04 1.!...j..."...}. + 4022de70 31f7fe42 a17c22a0 6c017550 c00000cd 1..B.|".l.uP.... + 4022de80 02cc922d 0d056cfe 22a0ff46 0a002032 ...-..l."..F.. 2 + 4022de90 20d912e2 62002124 e3c5c4fe 280c313a ...b.!$....(.1: + 4022dea0 da282242 1202d02d 20056efe 31eaff2d .("B...- .n.1..- + 4022deb0 0d4d0c45 7dfe0c02 0831c821 d811e801 .M.E}....1.!.... + 4022dec0 12c1100d f0000000 12c1f009 31457000 ............1Ep. + 4022ded0 0c030c14 20349308 31302060 20207412 .... 4..10 ` t. + 4022dee0 c1100df0 12c1f009 31c56200 0c030c14 ........1.b..... + 4022def0 20349308 31302060 20207412 c1100df0 4..10 ` t..... + 4022df00 12c1c0e2 610ce222 01c2610e f9b109f1 ....a.."..a..... + 4022df10 d9d1d20e 00cd02d0 d034e0dd 11d02060 .........4.... ` + 4022df20 fd032951 3d022d0c d941c5de fa566215 ..)Q=.-..A...Vb. + 4022df30 221c04f6 42024653 00581c22 05002632 "...B.FS.X."..&2 + 4022df40 06268224 c64f0000 22050680 32112205 .&.$.O.."...2.". + 4022df50 07202320 16f21232 1f182793 02864900 . # ...2..'...I. + 4022df60 225f1806 48000000 00319fe8 d8033d0f "_..H....1....=. + 4022df70 2d0dc57b fa32a0f0 305d1032 af203a35 -..{.2..0].2. :5 + 4022df80 16331056 0210221c 04f68202 c63d002d .3.V.."......=.- + 4022df90 0c456f02 56f20e2c 232d0cc5 d7fa1672 .Eo.V..,#-.....r + 4022dfa0 0338412d 0c05d7fa 56b20d32 1c040c04 .8A-....V..2.... + 4022dfb0 0c2205e6 fadd0216 c20c3d0c 050bfb56 ."........=....V + 4022dfc0 420c3851 2d0de22d 01c5d4fa 56720b2d B.8Q-..-....Vr.- + 4022dfd0 0cc5dcfa cd0dc602 0032afde c02c2085 .........2..., . + 4022dfe0 d3fa5612 0a3180e8 522c0122 23002038 ..V..1..R,."#. 8 + 4022dff0 74224e0c 324e0d20 30752028 75224e0f t"N.2N. 0u (u"N. + 4022e000 217be832 4e0e2802 20387422 4e10324e !{.2N.(. 8t"N.2N + 4022e010 11203075 20287522 4e13324e 120c0222 . 0u (u"N.2N..." + 4022e020 45002205 03320502 80221130 22207c63 E."..2...".0" |c + 4022e030 3030f427 b3079b22 06010000 00008b22 00.'..."......." + 4022e040 2020f422 45022028 41224503 22af8022 ."E. (A"E.".." + 4022e050 4e080c02 224e0a22 4e0b1c43 e02e20c5 N..."N."N..C.. . + 4022e060 6002224e 0a384120 28f4224e 0b2d0c85 `."N.8A (."N.-.. + 4022e070 cafadc12 0c06315c e8f9010c 1752a080 ......1\.....R.. + 4022e080 4d062d0c c55dfa2d 0c45d1fa 08f1c8e1 M.-..].-.E...... + 4022e090 d8d1e8c1 f8b112c1 400df000 12c1c05d ........@......] + 4022e0a0 02d9d10c 0430d074 0c122c43 e9c15941 .....0.t..,C..YA + 4022e0b0 09f1c9e1 f2610bc5 d5faed02 58411632 .....a......XA.2 + 4022e0c0 07c8120c 32f815d2 4c01224c 00281e0c ....2...L."L.(.. + 4022e0d0 0d38151c c4d24c04 d24c05d2 4c06d24c .8....L..L..L..L + 4022e0e0 078b2201 cc4bc000 00321e05 d24c02d2 .."..K...2...L.. + 4022e0f0 4c032d0c 45570222 4c022028 f4224c03 L.-.EW."L. (."L. + 4022e100 320f0d52 0f0c220f 0e803311 50432000 2..R.."...3.PC . + 4022e110 22114032 20220f0f 0c178022 01302220 ".@2 ".....".0" + 4022e120 29016d0d 52a0804d 013d0d2d 0e8555fa ).m.R..M.=.-..U. + 4022e130 2d0ec5c6 fa08f1c8 e1d8d1e8 c1f8b112 -............... + 4022e140 c1400df0 28d9fe3f 12c1b0d2 611120d2 .@..(..?....a. . + 4022e150 20218dd9 42a00022 2200f9f1 2951fd03 !..B..""...)Q.. + 4022e160 2d040c83 e2611002 6113c261 1245cafa -....a..a..a.E.. + 4022e170 ed0216a2 0ac81228 1d281229 511c6227 .......(.(.)Q.b' + 4022e180 9f23220d 088b4d22 4c04220d 09224c05 .#"...M"L.".."L. + 4022e190 220d0a22 4c06220d 0b224c07 0c12224d ".."L.".."L..."M + 4022e1a0 0cc60800 00001c72 0c04279f 1a220d08 .......r..'..".. + 4022e1b0 41e5ff22 4c04220d 09224c05 220d0a22 A.."L.".."L.".." + 4022e1c0 4c06220d 0b224c07 22cfea20 2074f622 L.".."L.".. t." + 4022e1d0 49f24c00 22a0000c 0f224c01 f24c02f2 I.L."...."L..L.. + 4022e1e0 4c030c83 2d0c4981 05480222 4c022028 L...-.I..H."L. ( + 4022e1f0 f4224c03 32a49428 1d325108 0c433921 ."L.2..(.2Q..C9! + 4022e200 488132c1 10391129 010c276d 0f0c1532 H.2..9.)..'m...2 + 4022e210 c114e02e 20f25109 0523fa2d 0e05b8fa .... .Q..#.-.... + 4022e220 022113c2 2112d221 11e22110 f8f112c1 .!..!..!..!..... + 4022e230 500df000 12c1f0c9 21d91109 31cd0222 P.......!...1.." + 4022e240 020d30d3 2026220b 66122222 1c071622 ..0. &".f.""..." + 4022e250 0027b319 0c12b62d 0c8544e1 0b3d01db .'.....-..D..=.. + 4022e260 7ac00000 1b22225c 070c1222 4c0d0831 z....""\..."L..1 + 4022e270 c821d811 12c1100d f0000000 2cd9fe3f .!..........,..? + 4022e280 e0000001 e0000002 31feff21 fcff3902 ........1..!..9. + 4022e290 31fdff21 acff3902 0df00000 30d9fe3f 1..!..9.....0..? + 4022e2a0 6388fe3f 12c1d0d9 91d1fcff c9a1c80d c..?............ + 4022e2b0 e981f971 09b1fd02 0c0e162c 04281c58 ...q.......,.(.X + 4022e2c0 0cf79233 280d279c 02526d00 8c0e590e ...3(.'..Rm...Y. + 4022e2d0 622f108c d659010c 0432cc08 f02f20c0 b/...Y...2.../ . + 4022e2e0 06005801 31efff2d 0c42a110 59010186 ..X.1..-.B..Y... + 4022e2f0 4cc00000 5801cd0e ed0ccd05 86eeff00 L...X........... + 4022e300 08b10c02 c8a1d891 e881f871 12c1300d ...........q..0. + 4022e310 f0000000 12c1f0d9 11dd0221 e0ffc921 ...........!...! + 4022e320 c8020931 9c0c281c d792060c 532d0c45 ...1..(.....S-.E + 4022e330 f0ffc80c 06fbff00 0831c821 d81112c1 .........1.!.... + 4022e340 100df000 41d6ff48 048cf458 142795f6 ....A..H...X.'.. + 4022e350 68245803 5796ef2d 040df000 0c020df0 h$X.W..-........ + 4022e360 12c1f0c9 21d91109 31dd0230 c32045fd ....!...1..0. E. + 4022e370 fffcb221 28e631ca ff28620c 0542a161 ...!(.1..(b..B.a + 4022e380 01614cc0 00003d02 0c022713 22d91327 .aL...=...'."..' + 4022e390 1c02222c 0029230c 02225307 22430d22 ..",.)#.."S."C." + 4022e3a0 430c2243 1021bdff 48023902 49032d03 C."C.!..H.9.I.-. + 4022e3b0 0831c821 d81112c1 100df000 12c1f0c9 .1.!............ + 4022e3c0 21c1aeff d9113d0c 026103dd 0205f9ff !.....=..a...... + 4022e3d0 3d0c7cf4 9cc20c24 42420d42 02101b44 =.|....$BB.B...D + 4022e3e0 42421052 2d100c04 4715080c 142d0dc0 BB.R-...G....-.. + 4022e3f0 05000c04 08312d04 c821d811 12c1100d .....1-..!...... + 4022e400 f0000000 12c1c0d9 d1dd0228 12e9c1f9 ...........(.... + 4022e410 b109f1c9 e1ed0332 02002d0d 303034e0 .......2..-.004. + 4022e420 33013030 60303031 fd04c58e fa56b20c 3.00`001.....V.. + 4022e430 321d05f6 83028630 00c81d2d 0cc52202 2......0...-..". + 4022e440 56820bf0 3f20e02e 2085efff 16c20a32 V...? .. ......2 + 4022e450 0c001c14 47130a1c 64479302 46220046 ....G...dG..F".F + 4022e460 2600880f f186ff42 0c04780f 320c0592 &......B..x.2... + 4022e470 0c06620c 07779844 80531100 a9114055 ..b..w.D.S....@U + 4022e480 20505a20 80a60150 5a20ecf5 220c0156 PZ ...PZ .."..V + 4022e490 520022a0 0a224c01 2181ff48 0216b405 R.".."L.!..H.... + 4022e4a0 2814279e 12382428 0f27130b 320c012d (.'..8$(.'..2..- + 4022e4b0 04494105 d8ff4841 4804c6f7 ff803311 .IA...HAH.....3. + 4022e4c0 40432000 39114043 20803601 403320ac @C .9.@C .6.@3 . + 4022e4d0 9377980b 39012d0e 10312085 e6ff9ca2 .w..9.-..1 ..... + 4022e4e0 320c0105 d5ff8604 0032020d 66130c0c 2........2..f... + 4022e4f0 030c2432 52074242 0d32420c d02d2005 ..$2R.BB.2B..- . + 4022e500 8afa0221 0fc2210e d8d1e8c1 f8b112c1 ...!..!......... + 4022e510 400df000 03000080 12c1e048 03c961cd @..........H..a. + 4022e520 0332a0f0 d9510971 e941f931 30341052 .2...Q.q.A.104.R + 4022e530 a0e0dd02 7ca25713 02462100 2150ff38 ....|.W..F!.!P.8 + 4022e540 027ca237 147b219e dae8027c a2161e07 .|.7.{!....|.... + 4022e550 320e3980 3301d603 068c8d38 0d8c4342 2.9.3......8..CB + 4022e560 2e014793 543d0c2d 0e45dfff fd0216e2 ..G.T=.-.E...... + 4022e570 0422020d fc82220f 10ccc252 2e108c75 ."...."....R...u + 4022e580 0c143d0c 2d0ec005 001c632d 0f85bbff ..=.-.....c-.... + 4022e590 0511e131 e0ff3022 10d69200 0b227cc3 ...1..0"....."|. + 4022e5a0 30222022 c2011b22 225f070c 12224f0d 0" "...""_..."O. + 4022e5b0 220f101b 22224f10 0c02e80e 46e3ff00 "...""O.....F... + 4022e5c0 7cf20871 c861d851 e841f831 12c1200d |..q.a.Q.A.1.. . + 4022e5d0 f0000000 12c1d048 03d991dd 0332a0f0 .......H.....2.. + 4022e5e0 290109b1 c9a1e981 f9713034 1052a0e0 )........q04.R.. + 4022e5f0 7ca25713 02c62600 2121ff38 027ca237 |.W...&.!!.8.|.7 + 4022e600 94028623 00216eda 7cafe802 162e0822 ...#.!n.|......" + 4022e610 0e398022 01d63207 28018c82 28028c42 .9."..2.(...(..B + 4022e620 322e0137 92653d0d e02e2085 d1ffcd02 2..7.e=... ..... + 4022e630 16820522 0210f622 4b220c0c 8c521c73 ..."..."K"...R.s + 4022e640 2d0c45b0 ff622e10 8c860c04 3d0de02e -.E..b......=... + 4022e650 20c00600 3112ff28 03279c09 280c2903 ...1..(.'..(.). + 4022e660 46030000 2d038c72 3802379c f6380c39 F...-..r8.7..8.9 + 4022e670 02310bff 42a191c0 2c2001a3 4bc00000 .1..B..., ..K... + 4022e680 86010000 000b2222 4c100c0f e80e86de ......""L....... + 4022e690 ff002d0f 08b1c8a1 d891e881 f87112c1 ..-..........q.. + 4022e6a0 300df000 21fefe12 c1f0c921 c8020931 0...!......!...1 + 4022e6b0 ac0c221c 079c520b 222020f4 225c07cc .."...R." ."\.. + 4022e6c0 b2220c0d 6612061c 632d0cc5 a7ffc80c ."..f...c-...... + 4022e6d0 06f7ff00 0831c821 12c1100d f0000000 .....1.!........ + 4022e6e0 12c1e0d9 51e94109 71c961dd 02ed04e7 ....Q.A.q.a..... + 4022e6f0 23028623 00302390 d022a048 02681228 #..#.0#..".H.h.( + 4022e700 22490169 1129214d 0e30c320 402490d0 "I.i.)!M.0. @$.. + 4022e710 22a047ac 1f5d0222 c2f47842 77b6350b ".G..]."..xBw.5. + 4022e720 4446fbff 7d02cb22 82c2f888 0867b841 DF..}..".....g.A + 4022e730 1bcc472c eec794d3 4801c02c 90d022a0 ..G,....H..,..". + 4022e740 49024821 69124922 0b4cd02d 2005f9ff I.H!i.I".L.- ... + 4022e750 1b3c46e6 ffc02c90 8805e022 112a7d98 ...\ + 4022e9c0 003176ff e02e90e0 72112803 7a224822 .1v.....r.(.z"H" + 4022e9d0 4030b4cc 63381230 30b41623 01581238 @0..c8.00..#.X.8 + 4022e9e0 0221a8ff 79410199 4dc00000 78410c0f .!..yA..M...xA.. + 4022e9f0 516bff28 057a2248 02263464 f6440826 Qk.(.z"H.&4d.D.& + 4022ea00 141c2624 3b064600 38225166 87665402 ..&$;.F.8"Qf.fT. + 4022ea10 862a00b6 547f6664 02c63200 46400038 .*..T.fd..2.F@.8 + 4022ea20 12cc9328 2222d2f0 20f39346 00000c0f ...("".. ..F.... + 4022ea30 d030040c 0230f293 0c1220dd 20c63b00 .0...0.... . .;. + 4022ea40 00481231 57553794 07282231 fd5327b3 .H.1WU7..("1.S'. + 4022ea50 0a218dff 0c0f017d 4dc00000 0c220608 .!.....}M....".. + 4022ea60 00517dff 48123805 37940822 220231f4 .Q}.H.8.7.."".1. + 4022ea70 5327b30b 2186fff2 a0000174 4dc00000 S'..!......tM... + 4022ea80 0c42204d 100c0320 6d2040f3 9360d074 .B M... m @..`.t + 4022ea90 06270000 00000c04 32d3f030 f4930c83 .'......2..0.... + 4022eaa0 307d1030 6d203805 28123833 70f49360 0}.0m 8.(.83p..` + 4022eab0 d0740106 4dc00000 3176ff06 09000c04 .t..M...1v...... + 4022eac0 32d3f030 f4931c03 307d1030 6d203805 2..0....0}.0m 8. + 4022ead0 28123833 70f49360 d07401fc 4cc00000 (.83p..`.t..L... + 4022eae0 316dff29 03c61100 0c042c02 32d3d030 1m.)......,.2..0 + 4022eaf0 f493206d 20203d10 280530f4 93383221 .. m =.(.0..82! + 4022eb00 58ff60d0 74280201 f14cc000 0031258a X.`.t(...L...1%. + 4022eb10 38033712 1a2160ff 014d4dc0 0000c602 8.7..!`..MM..... + 4022eb20 00312087 28223803 381327b3 02f2a000 .1 .("8.8.'..... + 4022eb30 1beec6a0 ff07ed0d 2159ff01 444dc000 ........!Y..DM.. + 4022eb40 000c1220 dd200c2e e78d0e21 55ff013f ... . .....!U..? + 4022eb50 4dc00000 e06d2060 d0740c4e e78d0e21 M....m `.t.N...! + 4022eb60 51ff013a 4dc00000 e06d2060 d0743cf2 Q..:M....m `.t<. + 4022eb70 271d0c21 4dff3d0d 01354dc0 00000c0f '..!M.=..5M..... + 4022eb80 280c314a ff202290 42a121e0 22110130 (.1J. ".B.!."..0 + 4022eb90 4dc00000 ed020c02 279e0246 2e0021ff M.......'..F..!. + 4022eba0 fe480c32 22004044 90e04411 2d0e0119 .H.2".@D..D.-... + 4022ebb0 49c00000 480c0c03 42c4ff2d 0e05b2ff I...H...B..-.... + 4022ebc0 9d0e0c0d 280c0b32 37bd3c28 29dc1238 ....(..27.<()..8 + 4022ebd0 192137ff 0c049941 011d4dc0 00009841 .!7....A..M....A + 4022ebe0 0c0f5819 68297849 6a251bdd 27b71248 ..X.h)xIj%..'..H + 4022ebf0 39380921 30ff9941 01154dc0 00009841 98.!0..A..M....A + 4022ec00 0c0fcb99 06efff00 20229031 e686e022 ........ ".1..." + 4022ec10 a022c2f4 38034812 28223813 2a2427b3 ."..8.H.("8.*$'. + 4022ec20 242125ff 0c0f0109 4dc00000 280c2022 $!%.....M...(. " + 4022ec30 90e022a0 22c2f458 22481238 02211fff .."."..X"H.8.!.. + 4022ec40 01034dc0 00002d0e 011fffc0 000021d2 ..M...-.......!. + 4022ec50 fe0c1332 42002d0f 08f1c8e1 d8d1e8c1 ...2B.-......... + 4022ec60 f8b112c1 400df06e 65656420 626f6f74 ....@..need boot + 4022ec70 20312e34 2b0a0073 79737465 6d207061 1.4+..system pa + 4022ec80 72616d20 6572726f 722c2075 7365206c ram error, use l + 4022ec90 61737420 73617665 64207061 72616d21 ast saved param! + 4022eca0 0a007068 79207665 723a2025 645f2564 ..phy ver: %d_%d + 4022ecb0 2c207070 20766572 3a202564 2e25640a , pp ver: %d.%d. + 4022ecc0 0a000a53 444b2076 65723a20 25732063 ...SDK ver: %s c + 4022ecd0 6f6d7069 6c656420 40204170 72202036 ompiled @ Apr 6 + 4022ece0 20323032 33203033 3a30363a 30330a00 2023 03:06:03.. + 4022ecf0 775f666c 6173680a 0072665b 3131345d w_flash..rf[114] + 4022ed00 203a2025 3032780a 0072665b 3131335d : %02x..rf[113] + 4022ed10 203a2025 3032780a 0072665b 3131325d : %02x..rf[112] + 4022ed20 203a2025 3032780a 00667265 71207472 : %02x..freq tr + 4022ed30 61636520 656e6162 6c652025 640a0072 ace enable %d..r + 4022ed40 66206361 6c207365 63746f72 3a202564 f cal sector: %d + 4022ed50 0a007266 5f63616c 5b305d20 213d3078 ..rf_cal[0] !=0x + 4022ed60 30352c69 73203078 25303258 0a004c6f 05,is 0x%02X..Lo + 4022ed70 61640a00 43650a00 4261636b 75702064 ad..Ce..Backup d + 4022ed80 65666175 6c742025 640a0042 61636b75 efault %d..Backu + 4022ed90 700a0065 7063313d 30782530 38782c20 p..epc1=0x%08x, + 4022eda0 65706332 3d307825 3038782c 20657063 epc2=0x%08x, epc + 4022edb0 333d3078 25303878 2c206578 63766164 3=0x%08x, excvad + 4022edc0 64723d30 78253038 782c2064 6570633d dr=0x%08x, depc= + 4022edd0 30782530 38780a00 0a002853 746f7265 0x%08x....(Store + 4022ede0 50726f68 69626974 65644361 75736529 ProhibitedCause) + 4022edf0 3a0a0028 4c6f6164 50726f68 69626974 :..(LoadProhibit + 4022ee00 65644361 75736529 3a0a0028 4c6f6164 edCause):..(Load + 4022ee10 53746f72 65507269 76696c65 67654361 StorePrivilegeCa + 4022ee20 75736529 3a0a0028 4c6f6164 53746f72 use):..(LoadStor + 4022ee30 65544c42 4d756c74 69486974 43617573 eTLBMultiHitCaus + 4022ee40 65293a0a 00284c6f 61645374 6f726554 e):..(LoadStoreT + 4022ee50 4c424d69 73734361 75736529 3a0a0028 LBMissCause):..( + 4022ee60 496e7374 46657463 6850726f 68696269 InstFetchProhibi + 4022ee70 74656443 61757365 293a0a00 28496e73 tedCause):..(Ins + 4022ee80 74466574 63685072 6976696c 65676543 tFetchPrivilegeC + 4022ee90 61757365 293a0a00 28496e73 74544c42 ause):..(InstTLB + 4022eea0 4d756c74 69486974 43617573 65293a0a MultiHitCause):. + 4022eeb0 0028496e 7374544c 424d6973 73436175 .(InstTLBMissCau + 4022eec0 7365293a 0a00284c 6f616453 746f7265 se):..(LoadStore + 4022eed0 50494641 64647245 72726f72 43617573 PIFAddrErrorCaus + 4022eee0 65293a0a 0028496e 73747250 49464164 e):..(InstrPIFAd + 4022eef0 64724572 726f7243 61757365 293a0a00 drErrorCause):.. + 4022ef00 284c6f61 6453746f 72655049 46446174 (LoadStorePIFDat + 4022ef10 61457272 6f724361 75736529 3a0a0028 aErrorCause):..( + 4022ef20 496e7374 72504946 44617461 4572726f InstrPIFDataErro + 4022ef30 72436175 7365293a 0a00284c 6f616453 rCause):..(LoadS + 4022ef40 746f7265 416c6967 6e6d656e 74436175 toreAlignmentCau + 4022ef50 7365293a 0a002850 72697669 6c656765 se):..(Privilege + 4022ef60 64436175 7365293a 0a002849 6e746567 dCause):..(Integ + 4022ef70 65724469 76696465 42795a65 726f4361 erDivideByZeroCa + 4022ef80 75736529 3a0a0028 416c6c6f 63436175 use):..(AllocCau + 4022ef90 7365293a 0a00284c 6576656c 31496e74 se):..(Level1Int + 4022efa0 65727275 70744361 75736529 3a0a0028 erruptCause):..( + 4022efb0 4c6f6164 53746f72 65457272 6f724361 LoadStoreErrorCa + 4022efc0 75736529 3a0a0028 496e7374 72756374 use):..(Instruct + 4022efd0 696f6e52 65746368 4572726f 72436175 ionRetchErrorCau + 4022efe0 7365293a 0a002853 79736361 6c6c4361 se):..(SyscallCa + 4022eff0 75736529 3a0a0028 496c6c65 67616c49 use):..(IllegalI + 4022f000 6e737472 75637469 6f6e4361 75736529 nstructionCause) + 4022f010 3a0a0046 6174616c 20657863 65707469 :..Fatal excepti + 4022f020 6f6e2025 64002573 2025750a 004d6f0a on %d.%s %u..Mo. + 4022f030 004d6c0a 00562564 0a004d68 0a00656d .Ml..V%d..Mh..em + 4022f040 70747920 6f74700a 00466972 6d776172 pty otp..Firmwar + 4022f050 65204f4e 4c592073 7570706f 72747320 e ONLY supports + 4022f060 45535038 32363621 21210a00 6170705f ESP8266!!!..app_ + 4022f070 6d61696e 2e630065 72723a20 706f7374 main.c.err: post + 4022f080 20707269 6f203c20 25640a00 6572723a prio < %d..err: + 4022f090 20746173 6b207175 65756520 6572726f task queue erro + 4022f0a0 720a0065 72723a20 7461736b 20707269 r..err: task pri + 4022f0b0 6f203c20 25640a00 6e756c6c 20636f75 o < %d..null cou + 4022f0c0 6e747279 0a006375 7272656e 745f726f ntry..current_ro + 4022f0d0 75746572 5f696420 69732025 640a0073 uter_id is %d..s + 4022f0e0 65632025 78206572 726f720a 005b525d ec %x error..[R] + 4022f0f0 005b575d 005b455d 00657272 6f722070 .[W].[E].error p + 4022f100 6172616d 65746572 0a006865 61702020 arameter..heap + 4022f110 3a203078 2578207e 20307825 782c206c : 0x%x ~ 0x%x, l + 4022f120 656e3a20 25640a00 62737320 20203a20 en: %d..bss : + 4022f130 30782578 207e2030 7825782c 206c656e 0x%x ~ 0x%x, len + 4022f140 3a202564 0a00726f 64617461 3a203078 : %d..rodata: 0x + 4022f150 2578207e 20307825 782c206c 656e3a20 %x ~ 0x%x, len: + 4022f160 25640a00 64617461 20203a20 30782578 %d..data : 0x%x + 4022f170 207e2030 7825782c 206c656e 3a202564 ~ 0x%x, len: %d + 4022f180 0a000a00 69703a25 642e2564 2e25642e ....ip:%d.%d.%d. + 4022f190 25642c6d 61736b3a 25642e25 642e2564 %d,mask:%d.%d.%d + 4022f1a0 2e25642c 67773a25 642e2564 2e25642e .%d,gw:%d.%d.%d. + 4022f1b0 25640064 65657020 736c6565 7020746f %d.deep sleep to + 4022f1c0 6f206c6f 6e670a00 64656570 20736c65 o long..deep sle + 4022f1d0 65702074 6f6f206c 6f6e670a 00656e74 ep too long..ent + 4022f1e0 65722064 65657020 736c6565 700a0032 er deep sleep..2 + 4022f1f0 0a00310a 00310a00 320a0032 0a00310a ..1..1..2..2..1. + 4022f200 00726562 6f6f7420 746f2075 73650066 .reboot to use.f + 4022f210 6c617368 20726561 64206572 722c2025 lash read err, % + 4022f220 640a0066 6c617368 20726561 64206572 d..flash read er + 4022f230 722c2025 640a0065 72726f72 206d6167 r, %d..error mag + 4022f240 6963210a 00657272 6f72206d 61676963 ic!..error magic + 4022f250 210a0067 65742069 726f6d30 20657272 !..get irom0 err + 4022f260 6f720a00 67657420 666c6173 68206c65 or..get flash le + 4022f270 6e206572 726f720a 00776172 6e3a2077 n error..warn: w + 4022f280 616e7420 746f2065 72617365 20657272 ant to erase err + 4022f290 6f722073 65632025 64210a00 67657420 or sec %d!..get + 4022f2a0 62696e20 73756d6c 656e2066 61696c65 bin sumlen faile + 4022f2b0 640a0064 6f6e2774 20737570 706f7274 d..don't support + 4022f2c0 65642074 7970652e 0a007265 626f6f74 ed type...reboot + 4022f2d0 20746f20 75736520 74657374 2062696e to use test bin + 4022f2e0 20402025 780a0074 65737420 616c7265 @ %x..test alre + 4022f2f0 61647920 70617373 65642e0a 00726573 ady passed...res + 4022f300 74617274 20746f20 75736520 75736572 tart to use user + 4022f310 2062696e 20402025 780a0064 6f6e2774 bin @ %x..don't + 4022f320 20737570 706f7274 65642066 6c617368 supported flash + 4022f330 206d6170 2e0a0066 61696c65 643a206e map...failed: n + 4022f340 65656420 626f6f74 203e3d20 312e330a eed boot >= 1.3. + 4022f350 00444546 45525245 44204655 4e43204e .DEFERRED FUNC N + 4022f360 554d4245 52204953 20424947 47455220 UMBER IS BIGGER + 4022f370 5448414e 2031300a 00455350 2d253032 THAN 10..ESP-%02 + 4022f380 58253032 58253032 58007573 65725f69 X%02X%02X.user_i + 4022f390 6e746572 66616365 2e630074 696d6534 nterface.c.time4 + 4022f3a0 3a253038 580a0074 696d6533 3a253038 :%08X..time3:%08 + 4022f3b0 580a0074 696d6532 3a253038 580a0074 X..time2:%08X..t + 4022f3c0 696d6531 3a253038 580a0065 7272332c ime1:%08X..err3, + 4022f3d0 65786365 6564206d 61782074 696d6520 exceed max time + 4022f3e0 76616c75 650a0074 696d6530 3a253038 value..time0:%08 + 4022f3f0 580a0065 7272322c 65786365 6564206d X..err2,exceed m + 4022f400 61782074 696d6520 76616c75 650a0065 ax time value..e + 4022f410 7272312c 65786365 6564206d 61782074 rr1,exceed max t + 4022f420 696d6520 76616c75 650a0074 696d6572 ime value..timer + 4022f430 3a257020 63622069 73206e75 6c6c0a00 :%p cb is null.. + 4022f440 74696d65 363a2530 38580a00 74696d65 time6:%08X..time + 4022f450 353a2530 38580a00 74696d65 35793a25 5:%08X..time5y:% + 4022f460 702c2570 0a007469 6d653578 3a253038 p,%p..time5x:%08 + 4022f470 582c2530 38580a00 74696d65 373a2530 X,%08X..time7:%0 + 4022f480 38580a00 74696d65 393a2530 38580a00 8X..time9:%08X.. + 4022f490 74696d65 383a2530 38580a00 290a0069 time8:%08X..)..i + 4022f4a0 703a2564 2e25642e 25642e25 642c6d61 p:%d.%d.%d.%d,ma + 4022f4b0 736b3a25 642e2564 2e25642e 25642c67 sk:%d.%d.%d.%d,g + 4022f4c0 773a2564 2e25642e 25642e25 64006468 w:%d.%d.%d.%d.dh + 4022f4d0 63702073 65727665 72207374 6172743a cp server start: + 4022f4e0 28006561 676c655f 6c776970 5f69662e (.eagle_lwip_if. + 4022f4f0 63006561 676c655f 6c69622e 63002d2d c.eagle_lib.c.-- + 4022f500 2d2d2d2d 2d2d4672 65652025 642d2d2d ------Free %d--- + 4022f510 2d2d2d2d 2d0a0a00 463a2573 094c3a25 -----...F:%s.L:% + 4022f520 75096d61 6c6c6f63 20256409 40202578 u.malloc %d.@ %x + 4022f530 0a002d2d 2d2d2d2d 2d2d5368 6f77204d ..--------Show M + 4022f540 616c6c6f 632d2d2d 2d2d2d2d 2d0a0075 alloc--------..u + 4022f550 7365725f 61707000 47443235 51333243 ser_app.GD25Q32C + 4022f560 20436f6e 66696720 51696f20 4d6f6465 Config Qio Mode + 4022f570 20466169 6c0a0047 44323551 33324320 Fail..GD25Q32C + 4022f580 436f6e66 69672051 696f204d 6f646520 Config Qio Mode + 4022f590 4f4b0a00 52442044 4154413a 30582558 OK..RD DATA:0X%X + 4022f5a0 0a004744 32355133 32432041 6c726164 ..GD25Q32C Alrad + 4022f5b0 79205169 6f204d6f 64650a00 7370695f y Qio Mode..spi_ + 4022f5c0 666c6173 685f7265 61645f73 74617475 flash_read_statu + 4022f5d0 73206572 720a0051 494f2049 4e495420 s err..QIO INIT + 4022f5e0 45525221 210a0051 494f2049 4e495420 ERR!!..QIO INIT + 4022f5f0 4f4b210a 00466c61 73682069 7320616c OK!..Flash is al + 4022f600 72656164 79205149 4f210a00 5b455252 ready QIO!..[ERR + 4022f610 5d4e6f74 206b6f6e 77204744 32355133 ]Not konw GD25Q3 + 4022f620 32432073 74617475 73206964 78202564 2C status idx %d + 4022f630 0a20005b 4552525d 4e6f7420 6b6f6e77 . .[ERR]Not konw + 4022f640 20474432 35513332 43207374 61747573 GD25Q32C status + 4022f650 20696478 2025640a 20000000 00000000 idx %d. ....... + 4022f660 6572726f 723a2070 6c6c5f63 616c2065 error: pll_cal e + 4022f670 78636565 64732032 6d732121 210a0000 xceeds 2ms!!!... + 4022f680 73657420 6368616e 6e656c20 696e2073 set channel in s + 4022f690 6c656570 206d6f64 652c2066 61696c20 leep mode, fail + 4022f6a0 616e6420 65786974 0a000000 00000000 and exit........ + 4022f6b0 25642c20 00000000 25642c20 00000000 %d, ....%d, .... + 4022f6c0 25642c20 25642c20 00000000 00000000 %d, %d, ........ + 4022f6d0 25642c20 25642c20 00000000 00000000 %d, %d, ........ + 4022f6e0 25642c20 25642c20 00000000 00000000 %d, %d, ........ + 4022f6f0 25642c20 00000000 00000000 00000000 %d, ............ + 4022f700 7365745f 72785f67 61696e3a 20726674 set_rx_gain: rft + 4022f710 783d2578 2c207266 72783d78 25782c20 x=%x, rfrx=x%x, + 4022f720 6174743d 25642c20 74786262 3d307825 att=%d, txbb=0x% + 4022f730 782c2062 62727831 3d307825 782c2062 x, bbrx1=0x%x, b + 4022f740 62727832 3d307825 782c2074 64633a25 brx2=0x%x, tdc:% + 4022f750 642c2564 0a000000 00000000 00000000 d,%d............ + 4022f760 6b3d2564 3a20746f 74616c5f 7077723d k=%d: total_pwr= + 4022f770 256c642c 206d6178 3d256c64 2c207266 %ld, max=%ld, rf + 4022f780 7478323d 30782578 2c20746f 6e655f61 tx2=0x%x, tone_a + 4022f790 7474656e 3d25640a 00000000 00000000 tten=%d......... + 4022f7a0 25645f25 645f2564 0a000000 00000000 %d_%d_%d........ + 4022f7b0 72786971 5f726567 3a20693d 25642c20 rxiq_reg: i=%d, + 4022f7c0 615f6d69 733d2564 2c20705f 6d69733d a_mis=%d, p_mis= + 4022f7d0 25640a00 00000000 00000000 00000000 %d.............. + 4022f7e0 696e6465 783a2025 64207661 6c75653a index: %d value: + 4022f7f0 20307825 78203078 25782030 78257820 0x%x 0x%x 0x%x + 4022f800 30782578 0a000000 00000000 00000000 0x%x............ + 4022f810 0a000000 00000000 00000000 00000000 ................ + 4022f820 424b3a25 642c2564 2c25642c 25642c30 BK:%d,%d,%d,%d,0 + 4022f830 7825780a 00000000 00000000 00000000 x%x............. + 4022f840 74786463 3a25642c 25640a00 00000000 txdc:%d,%d...... + 4022f850 6462703a 25642c20 25782c20 25642c20 dbp:%d, %x, %d, + 4022f860 25642c20 25642c20 25640a00 00000000 %d, %d, %d...... + 4022f870 7068795f 76657273 696f6e3a 2025642e phy_version: %d. + 4022f880 25642c20 25732c20 25732c20 25732c20 %d, %s, %s, %s, + 4022f890 4e4f4e4f 530a0000 00000000 00000000 NONOS........... + 4022f8a0 7068795f 76657273 696f6e3a 2025642c phy_version: %d, + 4022f8b0 2025732c 2025732c 2025730a 00000000 %s, %s, %s..... + 4022f8c0 70617261 6d5f666c 61673d30 7825780a param_flag=0x%x. + 4022f8d0 00000000 00000000 00000000 00000000 ................ + 4022f8e0 7068795f 6368616e 6e656c5f 6e756d3d phy_channel_num= + 4022f8f0 25642c20 25642c20 25642c20 25642c20 %d, %d, %d, %d, + 4022f900 25642c20 30782578 2c202564 2c202564 %d, 0x%x, %d, %d + 4022f910 0a000000 00000000 00000000 00000000 ................ + 4022f920 72635f63 616c3a20 72785f66 696c745f rc_cal: rx_filt_ + 4022f930 64636170 3d25642c 2074785f 66696c74 dcap=%d, tx_filt + 4022f940 5f646361 703d2564 0a000000 00000000 _dcap=%d........ + 4022f950 76646433 333d2564 2c207465 6d705f63 vdd33=%d, temp_c + 4022f960 6f64653d 25642c20 6f666673 65743d25 ode=%d, offset=% + 4022f970 640a0000 00000000 00000000 00000000 d............... + 4022f980 63616c5f 72665f61 6e615f67 61696e2c cal_rf_ana_gain, + 4022f990 2072665f 6761696e 3d307825 782c2061 rf_gain=0x%x, a + 4022f9a0 6e615f67 61696e3d 30782578 0a000000 na_gain=0x%x.... + 4022f9b0 52585f4e 4f495345 464c4f4f 522c2025 RX_NOISEFLOOR, % + 4022f9c0 640a0000 00000000 00000000 00000000 d............... + 4022f9d0 72785f6e 6f697365 3d25642c 206c6f6f rx_noise=%d, loo + 4022f9e0 705f6e6f 69736566 6c6f6f72 3d25640a p_noisefloor=%d. + 4022f9f0 00000000 00000000 00000000 00000000 ................ + 4022fa00 54584341 502c2000 25642c20 00000000 TXCAP, .%d, .... + 4022fa10 0a000000 00000000 00000000 00000000 ................ + 4022fa20 54585f50 4f574552 5f424143 4b4f4646 TX_POWER_BACKOFF + 4022fa30 2c200000 00000000 00000000 00000000 , .............. + 4022fa40 25642c20 00000000 0a000000 00000000 %d, ............ + 4022fa50 54585f50 57524354 524c5f41 5454454e TX_PWRCTRL_ATTEN + 4022fa60 2c200000 00000000 00000000 00000000 , .............. + 4022fa70 25642c20 00000000 0a000000 00000000 %d, ............ + 4022fa80 54584951 2c202564 2c202564 0a000000 TXIQ, %d, %d.... + 4022fa90 54584443 2c200000 00000000 00000000 TXDC, .......... + 4022faa0 25642c20 25643b20 00000000 00000000 %d, %d; ........ + 4022fab0 0a000000 00000000 52584951 2c200000 ........RXIQ, .. + 4022fac0 25642c20 25643b20 00000000 00000000 %d, %d; ........ + 4022fad0 0a000000 00000000 52584443 2c200000 ........RXDC, .. + 4022fae0 25642c20 25642c20 25642c20 25643b20 %d, %d, %d, %d; + 4022faf0 00000000 00000000 00000000 00000000 ................ + 4022fb00 0a000000 00000000 00000000 00000000 ................ + 4022fb10 2533642c 2533643b 20000000 00000000 %3d,%3d; ....... + 4022fb20 74786971 5f676169 6e3d2564 2c207478 txiq_gain=%d, tx + 4022fb30 69715f70 68617365 3d25640a 00000000 iq_phase=%d..... + 4022fb40 312c7461 72676574 5f706f77 65722c25 1,target_power,% + 4022fb50 642c2070 5f657272 6f722c25 642c2063 d, p_error,%d, c + 4022fb60 6f727265 63745f76 2c25642c 20657272 orrect_v,%d, err + 4022fb70 6f725f61 6363756d 2c202564 2c20746f or_accum, %d, to + 4022fb80 745f702c 25642c20 636f6174 742c2564 t_p,%d, coatt,%d + 4022fb90 2c206174 742c2564 2c207266 5f672c25 , att,%d, rf_g,% + 4022fba0 782c2074 78715f72 6174652c 25642c20 x, txq_rate,%d, + 4022fbb0 6368616e 2c25642c 20726174 655f6174 chan,%d, rate_at + 4022fbc0 742c2564 0a000000 00000000 00000000 t,%d............ + 4022fbd0 322c7461 72676574 5f706f77 65722c25 2,target_power,% + 4022fbe0 642c2070 5f657272 6f722c25 642c2063 d, p_error,%d, c + 4022fbf0 6f727265 63745f76 2c25642c 20657272 orrect_v,%d, err + 4022fc00 6f725f61 6363756d 2c202564 2c20746f or_accum, %d, to + 4022fc10 745f702c 25642c20 636f6174 742c2564 t_p,%d, coatt,%d + 4022fc20 2c206174 742c2564 2c207266 5f672c25 , att,%d, rf_g,% + 4022fc30 782c2074 78715f72 6174652c 25642c20 x, txq_rate,%d, + 4022fc40 6368616e 2c25642c 20726174 655f6174 chan,%d, rate_at + 4022fc50 742c2564 0a000000 00000000 00000000 t,%d............ + 4022fc60 6e756d5f 6b3d2564 2c20706f 7765725f num_k=%d, power_ + 4022fc70 6f75743d 25640a00 00000000 00000000 out=%d.......... + 4022fc80 7265675f 693d2564 2c20696e 64617461 reg_i=%d, indata + 4022fc90 3d25640a 00000000 00000000 00000000 =%d............. + 4022fca0 693d2530 32642020 6163633d 25303364 i=%02d acc=%03d + 4022fcb0 20207467 743d2530 33642020 6572723d tgt=%03d err= + 4022fcc0 25303364 20207365 723d2530 33642061 %03d ser=%03d a + 4022fcd0 74743d25 3033640a 00000000 00000000 tt=%03d......... + 4022fce0 72786971 5f676574 5f6d6973 3a20746f rxiq_get_mis: to + 4022fcf0 74616c5f 7077723d 25642c20 25642d25 tal_pwr=%d, %d-% + 4022fd00 642c2000 0df00000 0df00000 0c020df0 d, ............. + 4022fd10 656e616c 62650a00 64697361 6c62650a enalbe..disalbe. + 4022fd20 006e756c 206d6f64 652c2066 706d2061 .nul mode, fpm a + 4022fd30 75746f20 736c6565 70207365 743a006c uto sleep set:.l + 4022fd40 6973745f 6e756c6c 0a006670 6d206f70 ist_null..fpm op + 4022fd50 656e2c74 7970653a 25642025 640a0066 en,type:%d %d..f + 4022fd60 706d2063 6c6f7365 20256420 0a000a00 pm close %d .... + 4022fd70 2c747970 653a2025 6400666f 72636520 ,type: %d.force + 4022fd80 736c7020 656e6162 6c650066 6f726365 slp enable.force + 4022fd90 20736c70 20646973 61626c65 0075736c slp disable.usl + 4022fda0 0a00736c 0a006c69 73745f6e 756c6c0a ..sl..list_null. + 4022fdb0 006e6f54 494d2121 0a00706d 206f7065 .noTIM!!..pm ope + 4022fdc0 6e2c7479 70653a25 64202564 0a00706d n,type:%d %d..pm + 4022fdd0 20636c6f 73652025 640a0072 6620636c close %d..rf cl + 4022fde0 6f73652c 6e756c6c 64617461 5f66616c ose,nulldata_fal + 4022fdf0 73650072 6620636c 6f73652c 6e756c6c se.rf close,null + 4022fe00 64617461 5f747572 6500706d 2077616b data_ture.pm wak + 4022fe10 65757020 73743a20 25642c20 63617573 eup st: %d, caus + 4022fe20 653a2025 640a000a 002c7479 70653a20 e: %d....,type: + 4022fe30 25640073 6c656570 20656e61 626c6500 %d.sleep enable. + 4022fe40 736c6565 70206469 7361626c 6500756e sleep disable.un + 4022fe50 636e7420 0a00636e 74200a00 62636e20 cnt ..cnt ..bcn + 4022fe60 25640a00 61696420 25640a00 61646420 %d..aid %d..add + 4022fe70 69662564 0a006368 67206966 25640a00 if%d..chg if%d.. + 4022fe80 64656c20 69662564 0a007374 61207472 del if%d..sta tr + 4022fe90 61636520 25640a00 73746120 7363616e ace %d..sta scan + 4022fea0 20747261 63652025 640a004c 6d616354 trace %d..LmacT + 4022feb0 78426c6b 3a25640a 004c6d61 63527842 xBlk:%d..LmacRxB + 4022fec0 6c6b3a25 640a0070 702e6300 6573665f lk:%d..pp.c.esf_ + 4022fed0 6275662e 63007478 20657272 6f722030 buf.c.tx error 0 + 4022fee0 7825780a 00747820 72747320 6572726f x%x..tx rts erro + 4022fef0 72203078 25780a00 726d206d 69730a00 r 0x%x..rm mis.. + 4022ff00 726d2025 640a0061 64642025 640a0061 rm %d..add %d..a + 4022ff10 6464206d 69736d61 7463680a 003d3d64 dd mismatch..==d + 4022ff20 6c0a0077 6465762e 63000000 0a002825 l..wdev.c.....(% + 4022ff30 3032783a 25303278 3a253032 783a2530 02x:%02x:%02x:%0 + 4022ff40 32783a25 3032783a 25303278 2900736f 2x:%02x:%02x).so + 4022ff50 66744150 00202b20 00282530 32783a25 ftAP. + .(%02x:% + 4022ff60 3032783a 25303278 3a253032 783a2530 02x:%02x:%02x:%0 + 4022ff70 32783a25 30327829 00737461 006e756c 2x:%02x).sta.nul + 4022ff80 6c006d6f 6465203a 20000000 01000000 l.mode : ....... + 4022ff90 00040000 69656565 38303231 312e6300 ....ieee80211.c. + 4022ffa0 6e6f2062 75662066 6f722070 726f6265 no buf for probe + 4022ffb0 2c206965 206c656e 2025640a 00617020 , ie len %d..ap + 4022ffc0 74726163 65202564 0a006170 20667265 trace %d..ap fre + 4022ffd0 71206a75 6d703020 746f2025 640a0069 q jump0 to %d..i + 4022ffe0 65656538 30323131 5f686f73 7461702e eee80211_hostap. + 4022fff0 63000000 0c000000 00000000 00000000 c............... + 40230000 00000000 00000000 00000000 7c150000 ............|... + 40230010 04028b02 df007f00 00000000 f82a0000 .............*.. + 40230020 04039603 d5007500 00000000 e8030000 ......u......... + 40230030 00008200 3a013a01 00000000 d0070000 ....:.:......... + 40230040 04018401 0201a200 01000000 70170000 ............p... + 40230050 000b0c04 3c003c00 01000000 e02e0000 ....<.<......... + 40230060 000a1806 30003000 01000000 c05d0000 ....0.0......].. + 40230070 00093008 2c002c00 01000000 80bb0000 ..0.,.,......... + 40230080 00086008 2c002c00 01000000 f0d20000 ..`.,.,......... + 40230090 000c6c08 2c002c00 01000000 28230000 ..l.,.,.....(#.. + 402300a0 000f1204 3c003c00 01000000 50460000 ....<.<.....PF.. + 402300b0 000e2406 30003000 01000000 a08c0000 ..$.0.0......... + 402300c0 000d4808 2c002c00 04000000 00000000 ..H.,.,......... + 402300d0 00000000 00000000 00000000 00000000 ................ + 402300e0 7c150000 04028b01 df007f00 00000000 |............... + 402300f0 f82a0000 04039601 d5007500 00000000 .*........u..... + 40230100 e8030000 00008200 3a013a01 00000000 ........:.:..... + 40230110 d0070000 04018401 0201a200 00000000 ................ + 40230120 00000000 00000000 00000000 00000000 ................ + 40230130 00000000 00000000 00000000 00000000 ................ + 40230140 00000000 00000000 00000000 00000000 ................ + 40230150 00000000 00000000 00000000 00000000 ................ + 40230160 00000000 00000000 00000000 00000000 ................ + 40230170 00000000 00000000 00000000 00000000 ................ + 40230180 00000000 00000000 00000000 00000000 ................ + 40230190 00000000 00000000 00000000 61705f6c ............ap_l + 402301a0 6f73730a 00496e76 616c6964 20574550 oss..Invalid WEP + 402301b0 206b6579 2025730a 0062670a 00736361 key %s..bg..sca + 402301c0 6e646f6e 650a0066 20722564 2c200066 ndone..f r%d, .f + 402301d0 20302c20 0066202d 3230302c 20006965 0, .f -200, .ie + 402301e0 65653830 3231315f 7363616e 2e630070 ee80211_scan.c.p + 402301f0 626f0d0a 00696565 65383032 31315f69 bo...ieee80211_i + 40230200 6e707574 2e63006e 6f206275 6620666f nput.c.no buf fo + 40230210 72206163 74696f6e 20667261 6d650a00 r action frame.. + 40230220 73746174 696f6e3a 20253032 783a2530 station: %02x:%0 + 40230230 32783a25 3032783a 25303278 3a253032 2x:%02x:%02x:%02 + 40230240 783a2530 3278206a 6f696e2c 20414944 x:%02x join, AID + 40230250 203d2025 640a0065 72722061 6c726561 = %d..err alrea + 40230260 64792061 73736f63 69656421 0a006d61 dy associed!..ma + 40230270 7820636f 6e6e6563 74696f6e 210a006d x connection!..m + 40230280 61782063 6f6e6e65 6374696f 6e210a00 ax connection!.. + 40230290 73746174 696f6e3a 20253032 783a2530 station: %02x:%0 + 402302a0 32783a25 3032783a 25303278 3a253032 2x:%02x:%02x:%02 + 402302b0 783a2530 3278206c 65617665 2c204149 x:%02x leave, AI + 402302c0 44203d20 25640a00 61705f70 726f6265 D = %d..ap_probe + 402302d0 5f73656e 64206f76 65722c20 72657374 _send over, rest + 402302e0 20776966 69207374 61747573 20746f20 wifi status to + 402302f0 64697361 73736f63 0a006263 6e5f7469 disassoc..bcn_ti + 40230300 6d6f7574 2c61705f 70726f62 655f7365 mout,ap_probe_se + 40230310 6e645f73 74617274 0a007377 69746368 nd_start..switch + 40230320 20746f20 6368616e 6e656c20 25640a00 to channel %d.. + 40230330 6e6f2025 7320666f 756e642c 20726563 no %s found, rec + 40230340 6f6e6e65 63742061 66746572 2031730a onnect after 1s. + 40230350 00726563 6f6e6e65 63740a00 53746174 .reconnect..Stat + 40230360 696f6e20 73746f70 2c207374 6f702073 ion stop, stop s + 40230370 63616e0a 00776c5f 636e782e 63006965 can..wl_cnx.c.ie + 40230380 65653830 3231315f 61637469 6f6e5f76 ee80211_action_v + 40230390 656e646f 725f7370 65635f61 74746163 endor_spec_attac + 402303a0 68207265 67697374 65722072 65637620 h register recv + 402303b0 63616c6c 20626163 6b206572 726f720a call back error. + 402303c0 0056454e 444f5220 41435449 4f4e3a20 .VENDOR ACTION: + 402303d0 74797065 20646973 6d617463 68202564 type dismatch %d + 402303e0 0056454e 444f5220 41435449 4f4e3a20 .VENDOR ACTION: + 402303f0 756e6b6e 6f776e20 69652074 7970650a unknown ie type. + 40230400 0056454e 444f5220 41435449 4f4e3a20 .VENDOR ACTION: + 40230410 6c656e20 6572726f 72207374 6570323a len error step2: + 40230420 20256400 56454e44 4f522041 4354494f %d.VENDOR ACTIO + 40230430 4e3a206c 656e2065 72726f72 20737465 N: len error ste + 40230440 70313a20 25640a00 73746174 653a2025 p1: %d..state: % + 40230450 64202d3e 20256420 28257829 0a006965 d -> %d (%x)..ie + 40230460 65653830 3231315f 7374612e 63000000 ee80211_sta.c... + 40230470 03000000 08000000 08000000 00000000 ................ + 40230480 98ba2040 10bb2040 44484350 2074696d .. @.. @DHCP tim + 40230490 656f7574 0a000000 64686370 735f7374 eout....dhcps_st + 402304a0 61727428 293a2063 6f756c64 206e6f74 art(): could not + 402304b0 206f6274 61696e20 7063620a 00000000 obtain pcb..... + 402304c0 63825363 65737063 6f6e6e5f 7463705f c.Scespconn_tcp_ + 402304d0 64656c65 74652025 642c2025 640a0000 delete %d, %d... + 402304e0 65727220 696e2068 6f737420 636f6e6e err in host conn + 402304f0 65637465 64202825 73290a00 52656376 ected (%s)..Recv + 40230500 486f6c64 2c204279 20706573 70636f6e Hold, By pespcon + 40230510 6e2c6669 6e642063 6f6e6e5f 6d736720 n,find conn_msg + 40230520 6661696c 0a000000 52656376 486f6c64 fail....RecvHold + 40230530 2c204279 20706573 70636f6e 6e2c6669 , By pespconn,fi + 40230540 6e642063 6f6e6e5f 6d736720 6661696c nd conn_msg fail + 40230550 0a000000 69705f72 6f757465 72202564 ....ip_router %d + 40230560 2025700a 00000000 ffffffff 00000000 %p............. + 40230570 1c000000 24000000 b0000000 24000000 ....$.......$... + 40230580 14000000 08000000 14000000 10000000 ................ + 40230590 14000000 00060000 6ce7fe3f 74e7fe3f ........l..?t..? + 402305a0 64e7fe3f 78e7fe3f 03060c18 30607801 d..?x..?....0`x. + 402305b0 02030405 06070707 07070707 25732025 ............%s % + 402305c0 640a0000 25732025 640a0000 25732025 d...%s %d...%s % + 402305d0 640a0000 25732025 640a0000 25732025 d...%s %d...%s % + 402305e0 640a0000 25732025 640a0000 25732025 d...%s %d...%s % + 402305f0 640a0000 25732025 640a0000 25732025 d...%s %d...%s % + 40230600 640a0000 0c0412c1 f0425100 304f3130 d........BQ.0O10 + 40230610 44c02050 04d6b400 8c854202 000b3342 D. P......B...3B + 40230620 41011b22 0c04a623 0e621200 32c3fe6a A.."...#.b..2..j + 40230630 442b22c6 fbff0000 66130522 02002241 D+".....f..".."A + 40230640 00221100 4a424020 f54040f4 4a424020 ."..JB@ .@@.JB@ + 40230650 f54040f4 4a228ca5 80321120 28742023 .@@.J"...2. (t # + 40230660 202020f4 2020f412 c1100df0 12c1f030 . .........0 + 40230670 30f40261 03c5f8ff 7cf30831 20233020 0..a....|..1 #0 + 40230680 20f412c1 100df000 12c1e0d9 510c0dc9 ...........Q... + 40230690 61e941f9 310971ed 02cd0df2 a001acee a.A.1.q......... + 402306a0 321e0528 1ec5f5ff ca222030 f520c0f4 2..(....." 0. .. + 402306b0 221e05ca c3076211 802c11c0 c874d0df ".....b..,...t.. + 402306c0 c0c0c220 d0d074c0 c0f4e80e 86f3ff00 ... ..t......... + 402306d0 8cad802c 11c0c874 c0c220c0 c0f47cf2 ...,...t.. ...|. + 402306e0 0871c022 302020f4 c861d851 e841f831 .q."0 ..a.Q.A.1 + 402306f0 12c1200d f0000000 12c1d0f9 710c0fc9 .. .........q... + 40230700 a1d991e9 8109b150 e0747d02 8d0360d0 .......P.t}...`. + 40230710 f4cd0f0c 15bcf732 17052817 49215931 .......2..(.I!Y1 + 40230720 72610089 11c5edff 7801ca22 2030f520 ra......x.." 0. + 40230730 c0f42217 05cac348 21583188 11076211 .."....H!X1...b. + 40230740 802c11c0 c874f0f5 c0c0c220 f0f074c0 .,...t..... ..t. + 40230750 c0f47807 46efff00 8caf802c 11c0c874 ..x.F......,...t + 40230760 c0c220c0 c0f46808 38046020 f46060f5 .. ...h.8.` .``. + 40230770 6a623020 f42a2630 30f53a22 d0684180 jb0 .*&00.:".hA. + 40230780 3d116063 206060f4 6ad2802e 112a2dca =.`c ``.j....*-. + 40230790 222030f5 20c0f4ca c3c020f5 c0c0f4ca " 0. ..... ..... + 402307a0 c208b17c f2c02230 2020f4c8 a1d891e8 ...|.."0 ...... + 402307b0 81f87112 c1300df0 12c1c0f9 b150f074 ..q..0.......P.t + 402307c0 0c05c9e1 d9d109f1 e9c18d02 9d0360d0 ..............`. + 402307d0 f47070f4 cd0516a8 05167705 221805ed .pp.......w."... + 402307e0 0777b201 ed022818 e0e0f43d 0e493159 .w....(....=.I1Y + 402307f0 01794189 119921c5 e0ff8811 ca227841 .yA...!......"xA + 40230800 2030f520 c0f42218 05e0e7c0 e070f4ca 0. .."......p.. + 40230810 c3483158 01982107 62130c12 5052c080 .H1X..!.b...PR.. + 40230820 2c11c0c8 74c0c220 505074c0 c0f48808 ,...t.. PPt..... + 40230830 86e8ff00 8ca5802c 11c0c874 c0c220c0 .......,...t.. . + 40230840 c0f45809 38045020 f45050f5 5a523020 ..X.8.P .PP.ZR0 + 40230850 f42a2530 30f53a22 d0684180 3d116063 .*%00.:".hA.=.`c + 40230860 206060f4 6ad2802f 112a2dca 222030f5 ``.j../.*-." 0. + 40230870 20c0f4ca c3c020f5 c0c0f4ca c208f17c ..... ........| + 40230880 f2c02230 2020f4c8 e1d8d1e8 c1f8b112 .."0 .......... + 40230890 c1400df0 7770615f 61757468 5f69652e .@..wpa_auth_ie. + 402308a0 63004772 6f757020 6b657920 65787061 c.Group key expa + 402308b0 6e73696f 6e005061 69727769 7365206b nsion.Pairwise k + 402308c0 65792065 7870616e 73696f6e 00496e69 ey expansion.Ini + 402308d0 7420436f 756e7465 72007770 615f6175 t Counter.wpa_au + 402308e0 74682e63 00636f6d 6d6f6e2e 63006170 th.c.common.c.ap + 402308f0 5f636f6e 6669672e 63005061 69727769 _config.c.Pairwi + 40230900 7365206b 65792065 7870616e 73696f6e se key expansion + 40230910 00000000 08000000 06000000 06000000 ................ + 40230920 504d4b20 4e616d65 00636865 636b2079 PMK Name.check y + 40230930 6f757220 73746174 69632069 70210a00 our static ip!.. + 40230940 64686370 20636c69 656e7420 73746172 dhcp client star + 40230950 742e2e2e 0a000a63 6f6e6e65 63746564 t......connected + 40230960 20776974 68202573 2c206368 616e6e65 with %s, channe + 40230970 6c202564 0a007770 615f6d61 696e2e63 l %d..wpa_main.c + 40230980 00616573 2d696e74 65726e61 6c2d656e .aes-internal-en + 40230990 632e6300 706c6561 73652063 6865636b c.c.please check + 402309a0 20706172 74697469 6f6e2074 79706520 partition type + 402309b0 25642061 6464723a 2578206c 656e3a25 %d addr:%x len:% + 402309c0 780d0a00 2d2d2d20 54686520 70617274 x...--- The part + 402309d0 6974696f 6e207461 626c6520 73697a65 ition table size + 402309e0 20697320 6c617267 65722074 68616e20 is larger than + 402309f0 666c6173 68207369 7a652030 78257820 flash size 0x%x + 40230a00 2d2d2d0d 0a007020 25642061 6e642070 ---...p %d and p + 40230a10 20256420 636f7665 7265643a 20616464 %d covered: add + 40230a20 723a3078 2578202b 206c656e 3a307825 r:0x%x + len:0x% + 40230a30 78203e20 30782578 0d0a0070 61727469 x > 0x%x...parti + 40230a40 74696f6e 20307825 78207369 7a652069 tion 0x%x size i + 40230a50 73202564 0d0a006e 63686b3a 25780d0a s %d...nchk:%x.. + 40230a60 006f7461 32206e6f 74207365 740d0a00 .ota2 not set... + 40230a70 6f746131 206e6f74 20736574 0d0a0062 ota1 not set...b + 40230a80 6f6f7420 6e6f7420 7365740d 0a007379 oot not set...sy + 40230a90 7374656d 20706172 616d2070 61727469 stem param parti + 40230aa0 74696f6e 20657272 6f720d0a 006f7461 tion error...ota + 40230ab0 32207061 72746974 696f6e20 6572726f 2 partition erro + 40230ac0 720d0a00 6f746131 20706172 74697469 r...ota1 partiti + 40230ad0 6f6e2065 72726f72 0d0a0070 20256420 on error...p %d + 40230ae0 73697a65 20307825 78202c30 78257820 size 0x%x ,0x%x + 40230af0 6572720d 0a006d61 70202564 20657272 err...map %d err + 40230b00 0a006d69 736d6174 6368206d 61702025 ..mismatch map % + 40230b10 642c7370 695f7369 7a655f6d 61702025 d,spi_size_map % + 40230b20 640a0065 6d617067 0d0a0065 6d617037 d..emapg...emap7 + 40230b30 0d0a0065 6d617031 0d0a0061 70705f70 ...emap1...app_p + 40230b40 61727469 74696f6e 2e630000 02000000 artition.c...... + 40230b50 08000000 0c000000 08000000 d0b62040 .............. @ + 40230b60 58b72040 01000000 04000000 04000000 X. @............ + 40230b70 00000000 d8bb2040 30bc2040 ...... @0. @ +Contents of section .text: + 40100000 00001040 21ffff20 e7138559 01000000 ...@!.. ...Y.... + 40100010 00720046 feff0000 00000000 00000000 .r.F............ + 40100020 00d31385 07000000 00000000 00000000 ................ + 40100030 00410046 feff0000 00000000 00000000 .A.F............ + 40100040 00000000 00000000 00000000 00000000 ................ + 40100050 00d11385 10000000 00000000 00000000 ................ + 40100060 00000000 00000000 00000000 00000000 ................ + 40100070 40410046 feff0000 00000000 00000000 @A.F............ + 40100080 00000000 00000000 00000000 00000000 ................ + 40100090 6089fe3f 0080fe3f ec041040 01fdff29 `..?...?...@...) + 401000a0 a021fcff 19902802 39b020d3 6149c029 .!....(.9. .aI.) + 401000b0 8030b103 40e80339 30494030 ee033950 .0..@..90I@0..9P + 401000c0 40d10349 6059d069 e079f082 60109260 @..I`Y.i.y..`..` + 401000d0 11a26012 b26013c2 6014d260 15e26016 ..`..`..`..`..`. + 401000e0 f2601711 ebff0c00 2c3220e6 13102000 .`......,2 ... . + 401000f0 e00303e9 01d1e8ff c00d00f8 01f00313 ................ + 40100100 3c3220e6 13102000 48c158d1 68e178f1 <2 ... .H.X.h.x. + 40100110 82211092 2111a221 12b22113 c22114d2 .!..!..!..!..!.. + 40100120 2115e221 16f22117 28313841 20b11330 !..!..!.(18A ..0 + 40100130 e8132851 20ee1338 6130d113 08813003 ..(Q ..8a0....0. + 40100140 0322a3ff c0220130 03130cf3 390228a1 ."...".0....9.(. + 40100150 38b11891 10330000 00c0ff3f 00d10312 8....3.....?.... + 40100160 d1ff2951 396131fc ff20e803 3032a038 ..)Q9a1.. ..02.8 + 40100170 034971a0 03000000 0000e0bf 1c4b0040 .Iq..........K.@ + 40100180 cc240040 51fdff12 c1c03d01 2c445a22 .$.@Q.....=.,DZ" + 40100190 09f101fa ffc00000 2d0101f9 ffc00000 ........-....... + 401001a0 08f112c1 400df000 1c000060 a0860100 ....@......`.... + 401001b0 00000060 12c1f0c9 21d91109 31cd0245 ...`....!...1..E + 401001c0 5801dd02 31f9ffc0 20002803 32a07d20 X...1... .(.2.} + 401001d0 207527b3 0ec55601 31f5ffd0 22c02733 u'...V.1...".'3 + 401001e0 0ac6f7ff 21f3ffc0 2000c902 08310c02 ....!... ....1.. + 401001f0 c821d811 12c1100d f0000000 12c1f009 .!.............. + 40100200 31202074 6692090c d285faff 0ca20601 1 tf........... + 40100210 000cd337 1202c5f9 ff083112 c1100df0 ...7......1..... + 40100220 30070060 12c1b002 6113c261 12d26111 0..`....a..a..a. + 40100230 e26110f2 610f60e8 0350b103 f0b203e0 .a..a.`..P...... + 40100240 b303d0ee 03c0c003 42a01c3d 010c0259 ........B..=...Y + 40100250 91626108 85630131 f2ff0c12 c0200029 .ba..c.1..... .) + 40100260 03688158 9129013d 011cc40c 02f931e9 .h.X.).=......1. + 40100270 41d951c9 61691159 21054f01 022113c2 A.Q.ai.Y!.O..!.. + 40100280 2112d221 11e22110 f8f112c1 500df000 !..!..!.....P... + 40100290 3880fe3f 78460040 12c1f009 31c5d805 8..?xF.@....1... + 401002a0 0b220c03 0c142043 8321f9ff 40407422 .".... C.!..@@t" + 401002b0 02003712 0a661211 0c030c12 06010000 ..7..f.......... + 401002c0 0c032d03 01f4ffc0 00000831 12c1100d ..-........1.... + 401002d0 f0000000 14c7ff3f 13f02240 f7ef2240 .......?.."@.."@ + 401002e0 e6ef2240 c7ef2240 afef2240 96ef2240 .."@.."@.."@.."@ + 401002f0 87ef2240 6aef2240 56ef2240 3aef2240 .."@j."@V."@:."@ + 40100300 1fef2240 00ef2240 e5ee2240 c6ee2240 .."@.."@.."@.."@ + 40100310 b1ee2240 98ee2240 7cee2240 5fee2240 .."@.."@|."@_."@ + 40100320 45ee2240 27ee2240 0bee2240 f3ed2240 E."@'."@.."@.."@ + 40100330 daed2240 d8ed2240 93ed2240 740f0040 .."@.."@.."@t..@ + 40100340 8c440040 10442140 12c1b002 6113c261 .D.@.D!@....a..a + 40100350 12d26111 e26110f9 f101f8ff c0000021 ..a..a.........! + 40100360 ddff2802 01f7ffc0 0000c5f2 ffc0e803 ..(............. + 40100370 f0b103e0 b203d0b3 0320ee03 298120c0 ......... ..). . + 40100380 03299121 d5ffc03c 20852401 0cd2279c .).!...< .$...'. + 40100390 02c63300 c7326421 d5ff664c 02c63e00 ..3..2d!..fL..>. + 401003a0 f65c2421 cfff661c 02c63b00 21ccff16 .\$!..f...;.!... + 401003b0 9c0e21cc ff662c02 06380021 cbff663c ..!..f,..8.!..f< + 401003c0 02c63500 46340000 21ccff66 8c028632 ..5.F4..!..f...2 + 401003d0 000c82c7 321421c6 ff665c02 062f0021 ....2.!..f\../.! + 401003e0 c5ff666c 02c62c00 462b000c 92271c6b ..fl..,.F+...'.k + 401003f0 21c4ff66 ac028628 00062700 1c42271c !..f...(..'..B'. + 40100400 7ac7322d 21c3ff66 bc028623 001c02c7 z.2-!..f...#.... + 40100410 320f0ce2 271c540c f2279c7c 21bcff46 2...'.T..'.|!..F + 40100420 1e001c12 271c4c1c 22279c6c 21bbff46 ....'.L."'.l!..F + 40100430 1a001ca2 271c52c7 320f1c82 271c441c ....'.R.2...'.D. + 40100440 92279c54 21b8ff46 14001cc2 271c401c .'.T!..F....'.@. + 40100450 d2279c44 21b7ff46 10000000 21a8ff46 .'.D!..F....!..F + 40100460 0e000000 21a8ff46 0c000000 21a7ff46 ....!..F....!..F + 40100470 0a000000 21a8ff46 08000000 21a8ff46 ....!..F....!..F + 40100480 06000000 21a7ff46 040021a7 ffc60200 ....!..F..!..... + 40100490 21a7ff46 01000000 0021a6ff 45130172 !..F.....!..E..r + 401004a0 21096881 21a5ff5d 0d4d0e3d 0f451201 !.h.!..].M.=.E.. + 401004b0 315cff0c 22c02000 29032901 28811cc4 1\..". .).).(... + 401004c0 29512891 3d012961 0c02c911 f921e931 )Q(.=.)a.....!.1 + 401004d0 d9418529 01019bff c0000006 ffff0000 .A.)............ + 401004e0 0000f03f e08bfe3f 0c060060 12c1f031 ...?...?...`...1 + 401004f0 fcff0931 6c050ce4 c0200028 03502210 ...1l.... .(.P". + 40100500 402220c0 20002903 c0200028 0307e2e7 @" . .).. .(.... + 40100510 21f5ff28 028c12c0 020022a0 08c5b705 !..(......"..... + 40100520 31f2ff22 affec020 00422300 08312024 1.."... .B#..1 $ + 40100530 10c02000 290312c1 100df000 00100000 .. .)........... + 40100540 00100800 e088fe3f 18030060 fc011040 .......?...`...@ + 40100550 1c020060 cc140000 0000000f 00000800 ...`............ + 40100560 00000400 00001000 00002000 00004000 .......... ...@. + 40100570 00008000 00000001 08020060 2800f03f ...........`(..? + 40100580 00080060 ffefffff 00f0ffff 4080fe3f ...`........@..? + 40100590 a4140000 000000f0 000000b0 ffffffef ................ + 401005a0 000000e0 00000080 67ec2240 f885fe3f ........g."@...? + 401005b0 000000d0 10102040 10102040 c4140000 ...... @.. @.... + 401005c0 08100800 10100800 18100800 0c86fe3f ...............? + 401005d0 1986fe3f ff0f0000 14090060 00000030 ...?.......`...0 + 401005e0 80ff0f00 00000040 78e8fe3f aa55aa55 .......@x..?.U.U + 401005f0 ab55aa55 77ec2240 30e1fe3f 48031040 .U.Uw."@0..?H..@ + 40100600 541d1040 5c00f03f 5800f03f 5400f03f T..@\..?X..?T..? + 40100610 5000f03f 49f02240 3ef02240 f8dbfe3f P..?I."@>."@...? + 40100620 3af02240 35f02240 31f02240 24dffe3f :."@5."@1."@$..? + 40100630 2df02240 c2e5fe3f 16dcfe3f 8bed2240 -."@...?...?.."@ + 40100640 78ed2240 74ed2240 6eed2240 10dcfe3f x."@t."@n."@...? + 40100650 c0a80401 ffffff00 36dcfe3f 40c42240 ........6..?@."@ + 40100660 20dcfe3f fce9ffff 04e2fe3f 3ce1fe3f ..?.......?<..? + 40100670 67e1fe3f 0000ff00 1c0f0060 34080060 g..?.......`4..` + 40100680 38080060 6cf02240 44dcfe3f 1cdcfe3f 8..`l."@D..?...? + 40100690 38dcfe3f 808bfe3f 52ed2240 10270000 8..?...?R."@.'.. + 401006a0 dc8bfe3f 2886fe3f 26f02240 d0541040 ...?(..?&."@.T.@ + 401006b0 3fed2240 29ed2240 19ed2240 09ed2240 ?."@)."@.."@.."@ + 401006c0 f9ec2240 f0ec2240 c083fe3f c2ec2240 .."@.."@...?.."@ + 401006d0 7c100060 f8110060 a2ec2240 78100060 |..`...`.."@x..` + 401006e0 e6cefe3f e4cefe3f 34dcfe3f 40dcfe3f ...?...?4..?@..? + 401006f0 24e5fe3f 24e1fe3f e0140000 e4140000 $..?$..?........ + 40100700 ec140000 e8140000 f0140000 2c240040 ............,$.@ + 40100710 1ce20040 004a0040 4c4a0040 7c112140 ...@.J.@LJ.@|.!@ + 40100720 b4180040 54040040 ccda2140 88542140 ...@T..@..!@.T!@ + 40100730 a8de0040 48172140 58022140 bc2c2140 ...@H.!@X.!@.,!@ + 40100740 80472140 38812240 6c782240 d8382140 .G!@8."@lx"@.8!@ + 40100750 942b2140 682f2240 e82a0040 74122140 .+!@h/"@.*.@t.!@ + 40100760 f0452140 68032140 e0250040 a4180040 .E!@h.!@.%.@...@ + 40100770 84022140 68a72140 dc9e2140 249f2140 ..!@h.!@..!@$.!@ + 40100780 cc2e0040 3ca02140 08012140 64552140 ...@<.!@..!@dU!@ + 40100790 ec5b2040 04272240 d4352240 44132240 .[ @.'"@.5"@D."@ + 401007a0 281f2040 880f0040 a80f0040 60f52140 (. @...@...@`.!@ + 401007b0 64e72140 4c552140 28942040 30392240 d.!@LU!@(. @09"@ + 401007c0 5c9f2140 b8112140 08642140 68012140 \.!@..!@.d!@h.!@ + 401007d0 30542140 54202040 2cb42040 a8522040 0T!@T @,. @.R @ + 401007e0 d48a2240 98252140 fc272140 91c7ff12 .."@.%!@.'!@.... + 401007f0 c1e02155 ff0971c9 61d951f9 31e94190 ..!U..q.a.Q.1.A. + 40100800 11c0c020 00d802c5 d902f150 ffd0d025 ... .......P...% + 40100810 2d0f01be ffc00000 314effc1 4effc020 -.......1N..N.. + 40100820 0048032c 02202420 c0200029 030c44ca .H.,. $ . .)..D. + 40100830 310c0201 52fec000 000c2226 5d293145 1...R....."&])1E + 40100840 ff3a2128 02202835 e632052b 22c60500 .:!(. (5.2.+"... + 40100850 002140ff 3141ff2a 2128020c 24302210 .!@.1A.*!(..$0". + 40100860 3032c00c 12302493 313bffe1 9afe3a31 02...0$.1;....:1 + 40100870 3803303c 3526435b f6531541 85fe2613 8.0<5&C[.S.A..&. + 40100880 3bbc0326 23456633 64380e51 37ff060c ;..&#Ef3d8.Q7... + 40100890 00267359 f6830d26 53416663 50380e41 .&sY...&SAfcP8.A + 401008a0 33ffc610 0026833b 0c944793 40380e41 3....&.;..G.@8.A + 401008b0 31ffc60c 00380e51 29ff0601 00380e51 1....8.Q)....8.Q + 401008c0 28ff5913 0c033244 00060c00 380e5125 (.Y...2D....8.Q% + 401008d0 ff46fbff 380e4125 ff860500 380e4122 .F..8.A%....8.A" + 401008e0 ff060100 380e4122 ff491386 0300380e ....8.A".I....8. + 401008f0 411bff49 133166fe 0c044243 00661234 A..I.1f...BC.f.4 + 40100900 411eff21 0effc020 00380420 3320c020 A..!... .8. 3 . + 40100910 00390431 1affc020 00480331 19ffc020 .9.1... .H.1... + 40100920 00580317 640542a2 00860000 42a10040 .X..d.B.....B..@ + 40100930 45204611 000b4220 21210b22 803411c0 E F...B !!.".4.. + 40100940 22113a22 4a22410c ff310eff c0200058 ".:"J"A..1... .X + 40100950 04303510 c0200039 043108ff c0200048 .05.. .9.1... .H + 40100960 033107ff c0200058 03176408 42adff46 .1... .X..d.B..F + 40100970 01000000 0042aeff 404510c0 20004903 .....B..@E.. .I. + 40100980 41fefe31 01ffc020 00580430 35102023 A..1... .X.05. # + 40100990 20c02000 2904280e c8322812 3d0c015c . .).(..2(.=..\ + 401009a0 ffc00000 f2c2fd31 fafe0b22 d1f8fec0 .......1...".... + 401009b0 22822c04 3a31f90d c2d11401 f0fdc000 ".,.:1.......... + 401009c0 00220ca4 8c4222a0 01224ca4 380e220c ."...B".."L.8.". + 401009d0 a4522303 f02280d2 d1105022 8242a4a4 .R#.."....P".B.. + 401009e0 3d0d01e6 fdc00000 220ca451 44ffc032 =......."..QD..2 + 401009f0 a0c022a0 22222c41 40ff1a55 32232e29 .."."",A@..U2#.) + 40100a00 05280d10 44803904 20384420 40142022 .(..D.9. 8D @. " + 40100a10 4120e004 261408e2 a001e022 30e0e210 A ..&......"0... + 40100a20 21cdfe51 dcfe2a21 480221dc fe506410 !..Q..*!H.!..Pd. + 40100a30 51dafe5a 5627050c 21dafe20 441021d9 Q..ZV'..!.. D.!. + 40100a40 fe2a24ec 5232c3fc 3030741c b237320f .*$.R2..00t..72. + 40100a50 2110fe0c 038c0e0c 13324200 06030000 !........2B..... + 40100a60 21d2fe05 72ff06ff ff000000 855f0516 !...r........_.. + 40100a70 222121ce fe01c2fd c0000026 1e02c680 "!!........&.... + 40100a80 0021b4fe 20218032 220021c2 fe203310 .!.. !.2".!.. 3. + 40100a90 21c8fe20 238031c1 fe370202 46790021 !.. #.1..7..Fy.! + 40100aa0 c6fe31c4 fe271302 467600e1 c4fe21a4 ..1..'..Fv....!. + 40100ab0 feeae13d 0e0c8401 b1fdc000 00320e00 ...=.........2.. + 40100ac0 22a0ea27 13050c0e 461e0000 21bdfe0c "..'....F...!... + 40100ad0 843d0101 aafdc000 0021b8fe f8112ae1 .=.......!....*. + 40100ae0 21b9fe3d 0e0c8420 2f8001a4 fdc00000 !..=... /....... + 40100af0 320e0022 a0e92793 cc61b3fe 51b0fe6a 2.."..'..a..Q..j + 40100b00 6fe2cf18 5a510c0f 22050127 bf3671fc o...ZQ.."..'.6q. + 40100b10 fe0c841a 77590771 fbfe3d01 1a772d06 ....wY.q..=..w-. + 40100b20 69070196 fdc00000 31f7fe28 111a3341 i.......1..(..3A + 40100b30 f4fe6803 8b221a44 2a662aee 1bff5804 ..h..".D*f*...X. + 40100b40 06f1ff00 0021a1fe 3d0e018d fdc00000 .....!..=....... + 40100b50 0cf2e022 c0202034 5beeeae2 2182fee7 ...". 4[...!... + 40100b60 b202e2a0 00219afe 3d0e0185 fdc00000 .....!..=....... + 40100b70 3199fe42 a1013a3e 303c214a f3f7a428 1..B..:>0...=...... + 40100d10 003d0d0c 020183fe c000003d 0d0c2201 .=.........=..". + 40100d20 81fec000 003136fe 0c32017e fec00000 .....16..2.~.... + 40100d30 3d0d22a0 1c017bfe c000003d 0d1cd201 =."...{....=.... + 40100d40 79fec000 003d0d22 a0080176 fec00000 y....=."...v.... + 40100d50 0176fec0 00000175 fec00000 312bfe21 .v.....u....1+.! + 40100d60 29fec020 002802c0 20006803 3128fec0 ).. .(.. .h.1(.. + 40100d70 20005803 3127fec0 2000f803 603c04f7 .X.1'.. ...`<.. + 40100d80 e6092124 fec53fff 06ffff00 f04520cc ..!$..?......E . + 40100d90 a42121fe c53eff06 ffff0000 00c11ffe .!!..>.......... + 40100da0 50484142 4c21f048 75524c22 424c23d1 PHABL!.HuRL"BL#. + 40100db0 50fee120 fedc031c 82224c1e 7ce2224c P.. ....."L.|."L + 40100dc0 1f3c4222 4c20c62c 00204874 424c1f42 . .).. + 40100e90 00001672 0731e8fd 42a0062d 0e0120fe ...r.1..B..-.. . + 40100ea0 c0000021 e6fdc572 00c60a00 660f105c ...!...r....f..\ + 40100eb0 c2224c1e 22afcf22 4c1f22a0 7f224c20 ."L.".."L.".."L + 40100ec0 31defd42 a006e02e 200115fe c0000021 1..B.... ......! + 40100ed0 dcfdf03f 20c56f00 0117fec0 0000c60a ...? .o......... + 40100ee0 0021d5fd 0c643d0e 0112fec0 0000cc62 .!...d=........b + 40100ef0 21d5fdc6 04000000 21d0fd42 a006e03e !.......!..B...> + 40100f00 200107fe c0000021 d0fd856c 0021cafd ......!...l.!.. + 40100f10 010afec0 000031c8 fd21ccfd 0108fec0 ......1..!...... + 40100f20 000031cc fd21cafd 391c290c 292c0104 ..1..!..9.).),.. + 40100f30 fec00000 0104fec0 00000103 fec00000 ................ + 40100f40 c1c6fde1 c7fd1c92 31c5fd22 5c000c04 ........1.."\... + 40100f50 2d0e8511 0541b5fd 0c0c22d4 02320214 -....A...."..2.. + 40100f60 22a0ff27 930a51e3 fd0c2222 4514c2a0 "..'..Q...""E... + 40100f70 0101f6fd c0000021 b0fd01f5 fdc00000 .......!........ + 40100f80 61abfd0c c3e2d603 220e410b 22202074 a.......".A." t + 40100f90 27b3040c 12224e41 71a5fd31 b2fdf2d7 '...."NAq..1.... + 40100fa0 05221f3c 3030f422 c29c2020 f427b305 .".<00.".. .'.. + 40100fb0 22a06422 5f3c221f 3c32a064 01d5fdc0 ".d"_<".<2.d.... + 40100fc0 00002020 f42022a0 2022a040 221101e1 .. . ". ".@"... + 40100fd0 fdc00000 220e42f6 52026612 0f0c0222 ....".B.R.f...." + 40100fe0 4e4221a1 fd4c0301 dcfdc000 00220e43 NB!..L.......".C + 40100ff0 b622040c 02224e43 220e440c 8327b304 ."..."NC".D..'.. + 40101000 0c42224e 443189fd 22238666 02162197 .B"ND1.."#.f..!. + 40101010 fd2c4301 d1fdc000 002195fd 32a04001 .,C......!..2.@. + 40101020 cefdc000 0041b3fd 2204b5b6 220522a0 .....A.."...".". + 40101030 002244b5 51b0fd0c 02226f20 226f1f22 ."D.Q...."o "o." + 40101040 4515220e 48b66204 0c12224e 48222f14 E.".H.b..."NH"/. + 40101050 22c2ffb6 320522a0 03226f14 220da480 "...2.".."o."... + 40101060 22012028 31660205 22af8122 4da4320d ". (1f..".."M.2. + 40101070 a522a0ff 2793040c 02224da5 661c1161 ."..'...."M.f..a + 40101080 43fd315d fd221600 42a4a401 b4fdc000 C.1]."..B....... + 40101090 00213afd c0200028 02076208 01b1fdc0 .!:.. .(..b..... + 401010a0 00004601 0001affd c0000041 3ffc2171 ..F........A?.!q + 401010b0 fdc02000 32240027 83f6416f fd216dfd .. .2$.'..Ao.!m. + 401010c0 c0200038 042783f7 416dfd22 aeffc020 . .8.'..Am."... + 401010d0 003804c1 6cfd2033 10c02000 39043168 .8..l. 3.. .9.1h + 401010e0 fdc02000 48032024 10c02000 2903214c .. .H. $.. .).!L + 401010f0 fc3d0cc0 2000e802 42a4821c c2c51301 .=.. ...B....... + 40101100 717ffdd1 61fd1a77 29071cc4 d03d2022 q...a..w)....= " + 40101110 a000c577 00d0cd20 56de0401 93fdc000 ...w... V....... + 40101120 0066120f 1cc40c03 2d0c0190 fdc00000 .f......-....... + 40101130 060e0000 018dfdc0 00006622 1f280d66 ..........f".(.f + 40101140 5207282d cc22285d ac021cc4 0c032d0c R.(-."(]......-. + 40101150 0187fdc0 00000c62 290c8603 000182fd .......b)....... + 40101160 c0000046 01000000 00f67eb7 1cc43d0c ...F......~...=. + 40101170 0c02855f 003143fd 42a49b22 a2f4c50b ..._.1C.B..".... + 40101180 016154fc ed022806 42a08058 32213ffd .aT...(.B..X2!?. + 40101190 3d0e2802 d2a08020 2582515a fddade1a =.(.... %.QZ.... + 401011a0 55690505 70017157 fd42a274 1a776807 Ui..p.qW.B.t.wh. + 401011b0 3d0d2806 58322136 fd280220 2582456e =.(.X2!6.(. %.En + 401011c0 013134fd 22de0129 032d0d01 69fdc000 .14."..).-..i... + 401011d0 004149fd 0c161a44 6904512e fddc9228 .AI....Di.Q....( + 401011e0 054d0632 a07d0163 fdc00000 7143fd0c .M.2.}.c....qC.. + 401011f0 030c1420 34931a77 3907280c 2652070c ... 4..w9.(.&R.. + 40101200 12015dfd c0000028 0c265212 213bfd1a ..]....(.&R.!;.. + 40101210 22280226 1208d02d 200158fd c0000032 "(.&...- .X....2 + 40101220 0e002653 17211cfd 853a0021 1cfd0154 ..&S.!...:.!...T + 40101230 fdc00000 0144fcc0 0000065b 003118fd .....D.....[.1.. + 40101240 220e7132 03005623 06320e70 265314b6 ".q2..V#.2.p&S.. + 40101250 63520c94 4713290c b4471335 26731886 cR..G.)..G.5&s.. + 40101260 10000000 80220196 d2022028 31a67202 .....".... (1.r. + 40101270 86270086 09000000 80220196 3209c606 .'......."..2... + 40101280 00802201 96020120 2831a672 0f0c5206 ..".... (1.r..R. + 40101290 1f008022 01d64200 0c72461c 000c0222 ..."..B..rF...." + 401012a0 4e700618 000c0206 19000000 66136232 Np..........f.b2 + 401012b0 0e702653 12b66353 0c944713 260cb447 .p&S..cS..G.&..G + 401012c0 13362673 13c61000 80220196 b2012028 .6&s.....".... ( + 401012d0 31a6722a 0c92460d 00802201 d6f201c6 1.r*..F..."..... + 401012e0 01000000 802201d6 52000cb2 c6070000 ....."..R....... + 401012f0 202831e6 721b4601 00802201 9622010c (1.r.F..."..".. + 40101300 32224e70 0c02224e 71460100 22a00322 2"Np.."NqF..".." + 40101310 4e70e02e 20011bfd c0000016 e20031e1 Np.. .........1. + 40101320 fc21e1fc 42a13ac5 2a0006ff ff32a42c .!..B.:.*....2., + 40101330 0c020115 fdc00000 32a42c22 a0010112 ........2.,".... + 40101340 fdc00000 0112fdc0 0000222f 140110fd .........."/.... + 40101350 c0000001 10fdc000 0021b7fc 010ffdc0 .........!...... + 40101360 0000010e fdc00000 31b4fc21 b0fc010c ........1..!.... + 40101370 fdc00000 0c0431cd fc2d0401 0afdc000 ......1..-...... + 40101380 000c1201 09fdc000 000108fd c0000001 ................ + 40101390 08fdc000 000107fd c0000021 a4fc0106 ...........!.... + 401013a0 fdc00000 0106fdc0 000031a0 fc0c02c2 ..........1..... + 401013b0 d301224c df320e70 0c522023 10661202 .."L.2.p.R #.f.. + 401013c0 224cdff1 b3fc21ba fc380f85 200021b4 "L....!..8.. .!. + 401013d0 fc320200 21b8fcc5 1f00320e 7021b6fc .2..!.....2.p!.. + 401013e0 051f0032 0e7121b5 fc851e00 320e7221 ...2.q!.....2.r! + 401013f0 b4fc051e 0041c0fc 1a444224 00160404 .....A...DB$.... + 40101400 21a2fc28 0266520b 01d8fcc0 00002612 !..(.fR.......&. + 40101410 0b060b00 01d5fcc0 00006622 ea21a9fc ..........f".!.. + 40101420 051b002d 0d01e6fc c0000021 aafb52a2 ...-.......!..R. + 40101430 742802d0 4d203222 03280f01 e2fcc000 t(..M 2".(...... + 40101440 003190fc 42a5462d 0e45a800 319ffc21 .1..B.F-.E..1..! + 40101450 9ffc0518 00219efc c0200038 02c02000 .....!... .8.. . + 40101460 4802219c fc404c35 c0200058 02c02000 H.!..@L5. .X.. . + 40101470 68022199 fc606074 50587430 30b54515 h.!..``tPXt00.E. + 40101480 00220cdf 07624021 80fcd195 fc380221 ."...b@!.....8.! + 40101490 93fc6653 20c02000 38020c12 30303132 ..fS . .8...0012 + 401014a0 5d0001c9 fcc00000 321d0021 8efc3252 ].......2..!..2R + 401014b0 00c60400 00000c03 325d00c0 20003802 ........2].. .8. + 401014c0 3030f4c0 20003902 518dfc1c c41a5538 00.. .9.Q.....U8 + 401014d0 050c0285 29006189 fc316afc 1a662226 ....).a..1j..f"& + 401014e0 0042a57c 859e000c 1201b8fc c0000001 .B.|............ + 401014f0 b8fcc000 00215afc 055c0071 57fc0c15 .....!Z..\.qW... + 40101500 32170021 57fc5045 20056400 2133fc32 2..!W.PE .d.!3.2 + 40101510 a073c020 00390221 74fc0c13 32420021 .s. .9.!t...2B.! + 40101520 75fcd202 14d02d20 01abfcc0 00007cd2 u.....- ......|. + 40101530 202d1066 120501a8 fcc00000 22cdfe20 -.f........".. + 40101540 2074f622 1b662d0b 220cde66 22050c12 t.".f-."..f"... + 40101550 86000000 0c0201a1 fcc00000 46040000 ............F... + 40101560 00661d0c 3132fc28 43280201 9dfcc000 .f..12.(C(...... + 40101570 00019cfc c0000066 1205019b fcc00000 .......f........ + 40101580 215bfc22 22001622 00c00200 915ffc9a ![."".."....._.. + 40101590 110871c8 61d851e8 41f83112 c1200df0 ..q.a.Q.A.1.. .. + 401015a0 040e0040 12c1f009 310524ff 01fdffc0 ...@....1.$..... + 401015b0 00000831 12c1100d f0000000 4680fe3f ...1........F..? + 401015c0 00002040 8af32240 a01d0040 c82a0040 .. @.."@...@.*.@ + 401015d0 001f0040 92a0a090 11c0f261 2320f220 ...@.......a# . + 401015e0 21f7ff02 6127c261 26d26125 e2612432 !...a'.a&.a%.a$2 + 401015f0 61154261 16526117 62611872 61192202 a.Ba.Ra.ba.ra.". + 40101600 00261202 06360021 eeff42a0 80203f10 .&...6.!..B.. ?. + 40101610 d2c15040 e1802713 02062b00 2d0f01eb ..P@..'...+.-... + 40101620 ffc00000 0bc22b22 c0c2a3c0 c2211bcc ......+".....!.. + 40101630 e0cc11c0 c0f41b6c 2d066261 1dc5a304 .......l-.ba.... + 40101640 22611cc5 92003221 1c62211d 37b2154c "a....2!.b!.7..L + 40101650 032d0cc7 b3014c02 20c0f40c 198d01c6 .-....L. ....... + 40101660 04000000 0031d7ff 0c0542a0 722d0685 .....1....B.r-.. + 40101670 a2008d02 0c094d0c 3d0f2d08 92611d82 ......M.=.-..a.. + 40101680 611c0127 fcc00000 82211c0c 02cac822 a..'.....!....." + 40101690 4c0021cd ff0c463d 084d0e5d 0d82611c L.!...F=.M.]..a. + 401016a0 d26112e2 61116261 1301c9ff c0000092 .a..a.ba........ + 401016b0 211d8221 1c567902 31c3ff42 a0818028 !..!.Vy.1..B...( + 401016c0 20c58000 06060000 0021bfff 0c464d0e ........!...FM. + 401016d0 5d0d3d0f d911e901 692101bd ffc00000 ].=.....i!...... + 401016e0 02212792 a0a0c221 26d22125 e22124f2 .!'....!&.!%.!$. + 401016f0 21239a11 0df00000 2400f03f f0470040 !#......$..?.G.@ + 40101700 80000040 21f4fa12 c1f02802 0931010c ...@!.....(..1.. + 40101710 fbc00000 01faffc0 000031f7 ff6c72c0 ..........1..lr. + 40101720 20004803 202410c0 20002903 01f5ffc0 .H. $.. .)..... + 40101730 00000831 12c1100d f0000000 000cf23f ...1...........? + 40101740 34cdfe3f 21feffc0 20003802 21fdff28 4..?!... .8.!..( + 40101750 022a230d f0000000 12c1f009 31058100 .*#.........1... + 40101760 083112c1 100df000 40040018 20707422 .1......@... pt" + 40101770 a0bf4040 f4773255 16230530 50140c02 ..@@.w2U.#.0P... + 40101780 27954c52 a0c07055 c0e05511 47254040 '.LR..pU..U.G%@@ + 40101790 20148ca2 40424142 c401e044 114040f4 ...@BAB...D.@@. + 401017a0 81f2ff40 42410c05 5020f447 b21b7a65 ...@BA..P .G..ze + 401017b0 3022a08a 66c02000 2802e066 111b55c0 0"..f. .(..f..U. + 401017c0 20002906 50507446 f7ff0c12 0df00c02 .).PPtF........ + 401017d0 0df00000 00020060 30080060 00080000 .......`0..`.... + 401017e0 08070060 d04c0040 12c1d009 b1c9a101 ...`.L.@........ + 401017f0 d3fac000 0021b7fa 280201d1 fac00000 .....!..(....... + 40101800 01bfffc0 000021f3 ff3157fb c0200039 ......!..1W.. .9 + 40101810 02c02000 32220056 63ff41ef ff22aecf .. .2".Vc.A..".. + 40101820 c0200032 2400c1ed ff203310 22a0300c . .2$.... 3.".0. + 40101830 05202320 c0200029 043d054d 0c2d0c01 . # . .).=.M.-.. + 40101840 e9ffc000 001c4201 cefbc000 000c045d ......B........] + 40101850 0c3d042d 0401e3ff c000001c c40c032d .=.-...........- + 40101860 0101c2fb c0000031 6efa0c52 c0200029 .......1n..R. .) + 40101870 0329013d 011cc40c 0205efff 313afb21 .).=........1:.! + 40101880 d8ff08b1 c8a1c020 00390212 c1300df0 ....... .9...0.. + 40101890 20707422 a0bf4040 f4773255 16230530 pt"..@@.w2U.#.0 + 401018a0 50140c02 27954c52 a0c07055 c0e05511 P...'.LR..pU..U. + 401018b0 47254040 20148ca2 40424142 c401e044 G%@@ ...@BAB...D + 401018c0 114040f4 81a9ff40 42410c05 5020f447 .@@....@BA..P .G + 401018d0 b21b7a65 8a66e066 11c02000 68063022 ..ze.f.f.. .h.0" + 401018e0 a01b55c0 20006902 50507446 f7ff0c12 ..U. .i.PPtF.... + 401018f0 0df00c02 0df00000 288dfe3f 90f42240 ........(..?.."@ + 40101900 24060060 84f42240 30060060 12c1f0c2 $..`.."@0..`.... + 40101910 610220c2 2021f8ff d9110931 320200dd a. . !.....12... + 40101920 028c6321 f6ff3d0c 85caff21 f5ffc020 ..c!..=....!... + 40101930 00380230 3cc0e613 16c02000 c802220d .8.0<..... ...". + 40101940 00c2cc50 16820021 efffc03c 2045c8ff ...P...!...< E.. + 40101950 21eeff08 31c02000 c902d811 c82112c1 !...1. ......!.. + 40101960 100df000 3980fe3f 78f42240 12c1f0c2 ....9..?x."@.... + 40101970 610220c2 2021e2ff e26100c0 2000e802 a. . !...a.. ... + 40101980 21f9ffd9 11093122 020032a5 005c0d20 !.....1"..2..\. + 40101990 d38321d9 ff220200 8c6221f3 ff3d0c45 ..!.."...b!..=.E + 401019a0 c3ffea2d 203cc0e6 130fe0ec c0a61e0b ...- <.......... + 401019b0 22cc402a 2dc60000 00002d0c c5f4ff02 ".@*-.....-..... + 401019c0 2103c221 02d22101 e80112c1 100df000 !..!..!......... + 401019d0 048dfe3f 66f42240 58f42240 4cf42240 ...?f."@X."@L."@ + 401019e0 40f42240 2c86fe3f 3086fe3f 12c1e0d9 @."@,..?0..?.... + 401019f0 51dd0221 f7fff931 f802c961 e9410971 Q..!...1...a.A.q + 40101a00 cd030c0e ac0f31bc ff220300 8c82481f ......1.."....H. + 40101a10 21f1ff3d 0dc5bbff 281f202d c0a61207 !..=....(. -.... + 40101a20 ed0ff80f 06f7ff00 31b4ff22 030016a2 ........1..".... + 40101a30 0021e9ff f04f203d 0e85b9ff 31afff22 .!...O =....1.." + 40101a40 03008c62 21e6ff3d 0d85b8ff f90cd91c ...b!..=........ + 40101a50 8c4ec90e 06070000 21deff31 a7ffc262 .N......!..1...b + 40101a60 00220300 16720021 deff3d0d 45b6ff2d ."...r.!..=.E..- + 40101a70 0d85efff 280c279c 1231daff 21dbff42 ....(.'..1..!..B + 40101a80 a0de01bf f9c00000 06ffff00 0871c861 .............q.a + 40101a90 d851e841 f83112c1 200df000 240e0040 .Q.A.1.. ...$..@ + 40101aa0 0c0412c1 f03d041c f2093101 fcffc000 .....=....1..... + 40101ab0 00083112 c1100df0 800f0040 12c1f0c9 ..1........@.... + 40101ac0 21093120 c220011d fac00000 31c1ff0c !.1 . ......1... + 40101ad0 0428038c f2c71207 4d022802 c6fcff00 .(......M.(..... + 40101ae0 280c9c74 29047cf2 290c0c02 292c01f2 (..t).|.)...),.. + 40101af0 ffc00000 0831c821 12c1100d f0290316 .....1.!.....).. + 40101b00 32fe2812 45e6ffc6 f6ff0000 2bf42240 2.(.E.......+."@ + 40101b10 d0890600 0ff42240 59578a19 f3f32240 ......"@YW...."@ + 40101b20 e7f32240 404b4c00 40420f00 a3d76800 .."@@KL.@B....h. + 40101b30 cbf32240 bff32240 af350000 b4c40400 .."@.."@.5...... + 40101b40 b3f32240 a7f32240 9bf32240 12c1d0d2 .."@.."@.."@.... + 40101b50 61094040 7420d220 222200c9 a1e98109 a.@@t . ""...... + 40101b60 b1f97149 01cd0350 e0742602 042d0dc5 ..qI...P.t&..-.. + 40101b70 f4ff222d 0356b200 21e5ffd0 3d2045a5 .."-.V..!...= E. + 40101b80 ff864a00 2178ff22 02005632 07661e1a ..J.!x."..V2.f.. + 40101b90 21e0ffc7 b20521df ff461b00 b02c11c0 !.....!..F...,.. + 40101ba0 22c0c0c2 a0d0cc11 46030021 dbffc7b2 ".......F..!.... + 40101bb0 0721daff 86140000 00214fff 22020016 .!.......!O."... + 40101bc0 820021d7 ffc03c20 85a0ff56 5c000c0f ..!...< ...V\... + 40101bd0 c6230000 22a35ac7 b212c042 41c0c014 .#..".Z....BA... + 40101be0 4044a0c0 cca0c0f4 a0861d00 0021cdff @D...........!.. + 40101bf0 31ceff20 2c8201c6 fac00000 fd024618 1.. ,.........F. + 40101c00 0021caff c7b20921 caff859c ff862700 .!.....!......'. + 40101c10 00e139ff 220e0016 e20821c6 ff3d0c0c ..9.".....!..=.. + 40101c20 0f059bff f71c2e21 c4ffc7b2 17c04241 .......!......BA + 40101c30 22a4e2c0 c0142034 82c02ca0 c0c2f030 "..... 4..,....0 + 40101c40 fcb00604 0021bdff 32a3e820 2c8201b0 .....!..2.. ,... + 40101c50 fac00000 fd02220e 008c6221 b9ff3d0f ......"...b!..=. + 40101c60 0597ff28 018c02f9 2d01b4f9 c0000021 ...(....-......! + 40101c70 24ffc020 00c22200 2120ff32 0200ed02 $.. ..".! .2.... + 40101c80 8c6321b0 ff3d0cc5 94ff220e 00cacf8c .c!..=...."..... + 40101c90 6221adff 3d0cc593 ff3d0d2d 0cc5d4ff b!..=....=.-.... + 40101ca0 0186ffc0 00004601 0056acf7 86c7ff08 ......F..V...... + 40101cb0 b1c8a1d8 91e881f8 7112c130 0df00000 ........q..0.... + 40101cc0 88232040 148e2240 70902240 a08d2240 .# @.."@p."@.."@ + 40101cd0 12c1e0f9 31fd0228 03d95109 71c961e9 ....1..(..Q.q.a. + 40101ce0 41dd03cc b22d0f01 f6ffc000 00ed02c6 A....-.......... + 40101cf0 0b000c04 32130440 242001f2 ffc00000 ....2..@$ ...... + 40101d00 cd027cfe 9ca23d0d 01f0ffc0 00003d0c ..|...=.......=. + 40101d10 2d0f01eb ffc00000 ed022d0c 01ecffc0 -.........-..... + 40101d20 00000871 2d0ec861 d851e841 f83112c1 ...q-..a.Q.A.1.. + 40101d30 200df000 ffff0000 0ff00000 0f700000 ............p.. + 40101d40 02100000 02400000 02500000 02900000 .....@...P...... + 40101d50 0000ffff 780290ee 037cc470 44105804 ....x....|.pD.X. + 40101d60 68140027 40507681 61f4ff60 67102626 h..'@Pv.a..`g.&& + 40101d70 1e51f2ff 31f3ff50 57103715 1a31f1ff .Q..1..PW.7..1.. + 40101d80 37161c31 f1ff3716 1e104100 06ffff00 7..1..7...A..... + 40101d90 32a0ff06 01000000 31e7ff0c 05060300 2.......1....... + 40101da0 32a0ff06 01000000 31e3ff0c 15707434 2.......1....pt4 + 40101db0 2617d50b 870c0470 48937cc8 7d048089 &......pH.|.}... + 40101dc0 10904014 a8084b77 d04411dc e5000440 ..@...Kw.D.....@ + 40101dd0 a0409140 331041dd ff479608 f7630541 .@.@3.A..G...c.A + 40101de0 dcff4033 202077a0 39070608 00001440 ..@3 w.9......@ + 40101df0 0063a17c f52077a0 60553068 07a05510 .c.|. w.`U0h..U. + 40101e00 60331000 14400043 a1504420 49083802 `3...@.C.PD I.8. + 40101e10 3b333902 0df00000 748dfe3f 708dfe3f ;39.....t..?p..? + 40101e20 31feff58 0327b505 3d0546fd ff004813 1..X.'..=.F...H. + 40101e30 4a636792 0728124a 4249132d 0368126a Jcg..(.JBI.-.h.j + 40101e40 42479514 51f6ff58 05571407 58144804 BG..Q..X.W..X.H. + 40101e50 6a656912 49024600 00590237 12012903 jei.I.F..Y.7..). + 40101e60 0df00000 608dfe3f 5c8dfe3f 41feff38 ....`..?\..?A..8 + 40101e70 0427b307 8c434d03 c6fcff00 390231fa .'...CM.....9.1. + 40101e80 ff290448 1228032a 2429030d f0000000 .).H.(.*$)...... + 40101e90 31f5ff48 03279413 48022812 490341f2 1..H.'..H.(.I.A. + 40101ea0 ff380420 23c02904 0c020df0 8c443d04 .8. #.)......D=. + 40101eb0 c6f7ff00 1602fe7c f20df000 508dfe3f .......|....P..? + 40101ec0 8186fe3f 3786fe3f 5086fe3f 588dfe3f ...?7..?P..?X..? + 40101ed0 12c1f0e9 010931c9 21d911ed 02165206 ......1.!.....R. + 40101ee0 c2c2f021 f6ff481c 3802dd02 37840e31 ...!..H.8...7..1 + 40101ef0 f4ff21f4 ff42a205 01a2f8c0 0000281c ..!..B........(. + 40101f00 380d3702 407cf430 34302023 10291c01 8.7.@|.040 #.).. + 40101f10 0bf9c000 002d0c85 f7ffd6f2 0021eaff .....-.......!.. + 40101f20 3d0e0197 f8c00000 06050000 0031e7ff =............1.. + 40101f30 422c0122 23002024 8029032d 0c05eeff B,."#. $.).-.... + 40101f40 01defec0 00000831 c821d811 e80112c1 .......1.!...... + 40101f50 100df000 4ff52240 31ffff12 c1f042a0 ....O."@1.....B. + 40101f60 00026103 85f6ff02 210312c1 100df000 ..a.....!....... + 40101f70 21d7ff28 020df000 6a86fe3f 548dfe3f !..(....j..?T..? + 40101f80 61a7ff12 c1d02901 280609b1 c9a1d991 a.....).(....... + 40101f90 e981f971 16220131 f8ff21ca ff42a321 ...q.".1..!..B.! + 40101fa0 69110177 f8c00000 68110c0d 2801cd0d i..w....h...(... + 40101fb0 e812163e 08f802f0 20248cc2 7b3f7c82 ...>.... $..{?|. + 40101fc0 203310fa ee30eec0 fd03ccbd 2193ff0c 3...0......!... + 40101fd0 03f90239 12060c00 002806dc 1231e6ff ...9.....(...1.. + 40101fe0 21b9ff42 a3426911 0166f8c0 00006811 !..B.Bi..f....h. + 40101ff0 2806f732 1331e0ff 21b3ff42 a3456911 (..2.1..!..B.Ei. + 40102000 0160f8c0 00006221 01fa2e7c 8322c2f0 .`....b!...|.".. + 40102010 3022100c 03391239 024806f0 32c02906 0"...9.9.H..2.). + 40102020 391f290f 8c04f904 3acc1b5d 380150d0 9.).....:..]8.P. + 40102030 74302db0 06deff00 0021d0ff c90221a3 t0-......!....!. + 40102040 ffc902cc dc31ccff 219fff42 a36e014c .....1..!..B.n.L + 40102050 f8c00000 3154f921 99ff08b1 39023181 ....1T.!....9.1. + 40102060 ff0c0229 03291331 80ffc8a1 d891e881 ...).).1........ + 40102070 f8712903 12c1300d f0000000 348dfe3f .q)...0.....4..? + 40102080 388dfe3f 78e8fe3f 2c631040 00c01040 8..?x..?,c.@...@ + 40102090 8b86fe3f 6286fe3f 12c1c0f2 610b20f2 ...?b..?....a. . + 401020a0 2021f6ff d9d1e9c1 09f1c9e1 39013202 !..........9.2. + 401020b0 00491150 d074ed02 ecd331f2 ff2126f8 .I.P.t....1..!&. + 401020c0 c1f0ff30 22c0390c 291c05f6 033d0c66 ...0".9.)....=.f + 401020d0 120c41ed ff21edff 492c4022 c0293c0c ..A..!..I,@".)<. + 401020e0 12224e00 2d0385e9 ffc14cff 222c00cc ."N.-.....L.",.. + 401020f0 d231e7ff 2174ff42 a1500121 f8c00000 .1..!t.B.P.!.... + 40102100 018ff8c0 0000216d ff0c0e88 02f70802 ......!m........ + 40102110 063200e7 9f028630 00f2cf10 f02024e7 .2.....0..... $. + 40102120 12067c82 206f108b f60c0ee7 9f02862a ..|. o.........* + 40102130 007166ff 5807f7b5 02c62700 4137ffa1 .qf.X.....'.A7.. + 40102140 29f93804 2d04661d 2398028c b997ba04 ).8.-.f.#....... + 40102150 b819b73f 092d0986 fbff2d04 4603003d ...?.-....-.F..= + 40102160 09060200 0048038c 742d033d 044813f7 .....H..t-.=.H.. + 40102170 34f2cc6d 411cf937 b401380c 922c00e2 4..mA..7..8..,.. + 40102180 a0009713 56922300 48029902 98132c02 ....V.#.H.....,. + 40102190 f099c0e2 c41097b2 18fa2399 12f91339 ..........#....9 + 401021a0 21594179 51893185 c7ff8831 78515841 !YAyQ.1....1xQXA + 401021b0 38219813 9025c051 71ff2267 00722500 8!...%.Qq."g.r%. + 401021c0 77b20129 050c0229 03280190 88202923 w..)...).(... )# + 401021d0 28118913 29333023 2005c9ff 0137fec0 (...)30# ....7.. + 401021e0 0000ccae 21acfff0 3f2001e5 f7c00000 ....!...? ...... + 401021f0 08f12d0e c8e1d8d1 e8c1f8b1 12c1400d ..-...........@. + 40102200 f0000000 12c1f0d2 610130d2 82406420 ........a.0..@d + 40102210 6036204d 052d0d0c 05c92109 3185e7ff `6 M.-....!.1... + 40102220 cd028c82 4d0d0c03 0151f9c0 00000831 ....M....Q.....1 + 40102230 2d0cd811 c82112c1 100df000 12c1f05d -....!.........] + 40102240 044d033d 020c1209 3185fbff 083112c1 .M.=....1....1.. + 40102250 100df000 0c00f03f f8020060 fffffdff .......?...`.... + 40102260 31fdff22 aeffc020 00422300 202410c0 1.."... .B#. $.. + 40102270 20002263 0031f8ff c0200028 035672ff ."c.1... .(.Vr. + 40102280 31bef821 f6ffc020 00480320 2410c020 1..!... .H. $.. + 40102290 0029030d f0000000 00000200 31b7f821 .)..........1..! + 401022a0 feffc020 00480320 2420c020 00290331 ... .H. $ . .).1 + 401022b0 e9ff22a1 00c02000 48032024 20c02000 .."... .H. $ . . + 401022c0 29030df0 40020060 00000010 12c1f009 )...@..`........ + 401022d0 31c92101 0afdc000 0021fef7 28020118 1.!......!..(... + 401022e0 f8c00000 21f8ff0c 03c02000 390241f6 ....!..... .9.A. + 401022f0 ff3138fd c0200049 03c02000 42230056 .18.. .I.. .B#.V + 40102300 64ffc020 00c22200 c5f8fd21 d2f80221 d.. .."....!...! + 40102310 03202c10 c82112c1 100df000 c8430040 . ,..!.......C.@ + 40102320 12c1e002 6107c261 0620c220 05f3ff21 ....a..a. . ...! + 40102330 e9f73d0c 280201f9 ffc00000 2901c5f5 ..=.(.......)... + 40102340 ff087128 01c86112 c1200df0 ac092240 ..q(..a.. ...."@ + 40102350 3c440040 00440040 12c1f002 6103c261 :5...! ... + 40102750 56220622 210032a0 3c370259 32a0c386 V"."!.2.<7.Y2... + 40102760 08000000 0031eeff 30228031 bcfe3782 .....1..0".1..7. + 40102770 1e102120 85baff56 b2032801 32a07c37 ..! ...V..(.2.|7 + 40102780 023332a0 83303210 0c02c5df ff460900 .32..02......F.. + 40102790 102120c5 b8ffdcc2 0c1245c4 ff380180 .! .......E..8.. + 401027a0 22113022 2031dfff 37020a31 dfff3022 ".0" 1..7..1..0" + 401027b0 10290145 baff0871 12c1200d f0000000 .).E...q.. ..... + 401027c0 f48cfe3f ac072140 12c1f0c2 610220c0 ...?..!@....a. . + 401027d0 f421fbff 09312202 0026121f c5f4ff01 .!...1"..&...... + 401027e0 dbfec000 0085a7ff c02c2001 caf7c000 ........., ..... + 401027f0 00cd0285 aaff2d0c 46030000 2d0c01f1 ......-.F...-... + 40102800 ffc00000 5642fd0c 120831c8 2112c110 ....VB....1.!... + 40102810 0df00000 c0440040 12c1f009 31c921d9 .....D.@....1.!. + 40102820 11c5a3ff c1acf628 0c01faff c0000020 .......(....... + 40102830 d220222c 0001c2f6 c0000005 a6ff0831 . ",...........1 + 40102840 2d0dc821 d81112c1 100df000 12c1f0c9 -..!............ + 40102850 21d911e9 010931dd 02ed03cd 040c12ac !.....1......... + 40102860 d385ecff c020148c 62c0c241 1bcce0cc ..... ..b..A.... + 40102870 1101b6fe c0000085 9effc04c 20e03e20 ...........L .> + 40102880 d02d2001 a5f7c000 00cd0205 a1ff2d0c .- ...........-. + 40102890 0831c821 d811e801 12c1100d f0000000 .1.!............ + 401028a0 74ddfe3f 12c1e0c2 61060261 07cd020c t..?....a..a.... + 401028b0 12bc1321 fbff6802 dcc63901 4911059a ...!..h...9.I... + 401028c0 ff481138 012d0c01 2df6c000 00cd02c5 .H.8.-..-....... + 401028d0 9cff2d0c 86030000 217ff65d 0428024d ..-.....!..].(.M + 401028e0 033d0cc0 06000871 c86112c1 200df000 .=.....q.a.. ... + 401028f0 f5f52240 01000070 e7f52240 d7f52240 .."@...p.."@.."@ + 40102900 bcf52240 12c1c022 a0002261 00102120 .."@...".."a..! + 40102910 09f1c9e1 d9d1e9c1 f9b145a0 ffccb228 ..........E....( + 40102920 01676207 21f3ff86 54000000 0593ffe1 .gb.!...T....... + 40102930 69f6222e 000182f6 c0000031 0ff7d110 i."........1.... + 40102940 f7219bfe c103f7c0 2000722d 00c02000 .!...... .r-.. . + 40102950 522200c0 20006803 280ec020 00f80c39 R".. .h.(.. ...9 + 40102960 71595169 61794101 7afec000 00c02000 qYQiayA.z..... . + 40102970 880d22ae ff202810 c0200029 0dc02000 ..".. (.. .).. . + 40102980 880c218c fe387120 2820c020 00290cc0 ..!..8q ( . .).. + 40102990 2000880c 7cb22028 10c02000 290cc020 ...|. (.. .).. + 401029a0 00880321 85fe2028 10c02000 290321f2 ...!.. (.. .).!. + 401029b0 fe317ffe c0200029 032181fe 0c03c020 .1... .).!..... + 401029c0 00390231 ccff2181 fec02000 3902c020 .9.1..!... .9.. + 401029d0 00380c21 ebfe2023 20c02000 290cc020 .8.!.. # . .).. + 401029e0 00380c21 eef62023 10c02000 290cc020 .8.!.. #.. .).. + 401029f0 00380c21 78fe2023 10c02000 290cc020 .8.!x. #.. .).. + 40102a00 00380c21 75fe2023 10c02000 290c31dd .8.!u. #.. .).1. + 40102a10 fe2172fe 7841c020 00390221 2afe4c03 .!r.xA. .9.!*.L. + 40102a20 c0200039 02216bfb 31cef6c0 20008802 . .9.!k.1... ... + 40102a30 68613088 205851c0 20008902 c0200082 ha0. XQ. .... .. + 40102a40 22003788 f621ccf6 c0200079 0dc02000 ".7..!... .y.. . + 40102a50 69022157 fec02000 590221bd f6c02000 i.!W.. .Y.!... . + 40102a60 f902280e 0137f6c0 00000583 ff102120 ..(..7........! + 40102a70 c58affdc 42280167 620a219f ff45b5fe ....B(.gb.!..E.. + 40102a80 0c128603 00219dff 86000021 9dff45b4 .....!.....!..E. + 40102a90 fe22a000 02210fc2 210ed8d1 e8c1f8b1 ."...!..!....... + 40102aa0 12c1400d f0000000 a2f52240 94f52240 ..@......."@.."@ + 40102ab0 77f52240 58f52240 12c1f00c 120931c9 w."@X."@......1. + 40102ac0 21c591ff 17620521 f8ff0608 003d0221 !....b.!.....=.! + 40102ad0 f7ff0c2c c5affe0c 230c12c5 aaff0c12 ...,....#....... + 40102ae0 c58fffc0 221020c0 748cbc21 f1ff45ae ....". .t..!..E. + 40102af0 fe0c1cc6 01000000 21efff85 adfe0221 ........!......! + 40102b00 03c02c20 c2210212 c1100df0 ff9f6ffe .., .!........o. + 40102b10 00200001 12c1f009 31057bff 20507442 . ......1.{. PtB + 40102b20 af634a45 8c5432af 3e3a35cc 6345ddff .cJE.T2.>:5.cE.. + 40102b30 46050000 0031c7f6 30221031 f9fe3a22 F....1..0".1..:" + 40102b40 31c7fd37 820905f7 ff261209 060b0000 1..7.....&...... + 40102b50 45ccff56 52022188 f631ecff c0200042 E..VR.!..1... .B + 40102b60 22003034 10c02000 326200c0 20004222 ".04.. .2b.. .B" + 40102b70 0031e7ff 303420c0 20003902 083112c1 .1..04 . .9..1.. + 40102b80 100df000 9c8dfe3f 12c1f0c9 21c1fdff .......?....!... + 40102b90 d911dd02 280c0931 385222a0 02c00300 ....(..18R"..... + 40102ba0 280c3832 2d0dc003 00280c38 620c22c0 (.82-....(.8b.". + 40102bb0 03000831 c821d811 12c1100d f0000000 ...1.!.......... + 40102bc0 12c1f0c9 21cd0220 24410931 85fbffc0 ....!.. $A.1.... + 40102bd0 203445fb ff21ebff 28023872 22a078c0 4E..!..(.8r".x. + 40102be0 03000831 c82112c1 100df000 12c1f0c2 ...1.!.......... + 40102bf0 610220c2 2021e3ff 02610328 0238620c a. . !...a.(.8b. + 40102c00 02c00300 2d0c85fb ff0831c8 2112c110 ....-.....1.!... + 40102c10 0df00000 12c1f0c2 610220c2 2021d9ff ........a. . !.. + 40102c20 02610328 0238520c 02c00300 2d0c05f9 .a.(.8R.....-... + 40102c30 ff0831c8 2112c110 0df00000 a08dfe3f ..1.!..........? + 40102c40 e38dfe3f c48dfe3f 31fdff41 fdff2803 ...?...?1..A..(. + 40102c50 1b222734 0329030d f021faff 46fdff00 ."'4.)...!..F... + 40102c60 a48dfe3f 41ffff31 f7ff22a0 003a6262 ...?A..1.."..:bb + 40102c70 06004a52 6245001b 2266b2f0 2a636206 ..JRbE.."f..*cb. + 40102c80 002a5462 45001b22 66c2f00d f0000000 .*TbE.."f....... + 40102c90 21bdff12 c1f02802 09313852 0c32c003 !.....(..18R.2.. + 40102ca0 00083112 c1100df0 21b7ff12 c1f02802 ..1.....!.....(. + 40102cb0 09313862 0c32c003 00083112 c1100df0 .18b.2....1..... + 40102cc0 24130000 12c1f022 a0010261 03c5f1ff $......"...a.... + 40102cd0 21adff22 22003872 21faffc0 03000831 !.."".8r!......1 + 40102ce0 12c1100d f0000000 12c1f0c9 210931cd ............!.1. + 40102cf0 02220c00 cc820831 c82112c1 100df000 .".....1.!...... + 40102d00 1bcc05f1 ff06faff 12c1f009 318c3266 ............1.2f + 40102d10 12014c02 32c38020 23802020 74c5ecff ..L.2.. #. t... + 40102d20 02210312 c1108000 00000000 9b8dfe3f .!.............? + 40102d30 31c5ff0c 0252a020 2a435244 001b2266 1....R. *CRD.."f + 40102d40 c2f521be ff390221 f9ff0c13 3242000d ..!..9.!....2B.. + 40102d50 f0000000 983a0000 94110000 12c1f009 .....:.......... + 40102d60 31c92185 3b00c187 ff226c00 2802c002 1.!.;...."l.(... + 40102d70 0045f3ff 280c3222 0522a002 c0030028 .E..(.2".".....( + 40102d80 0c38520c 02c00300 280c3872 21f2ffc0 .8R.....(.8r!... + 40102d90 0300280c 38620c02 c0030028 0c38620c ..(.8b.....(.8b. + 40102da0 22c00300 0c3205de ff280c38 7221eaff "....2...(.8r!.. + 40102db0 c003000c 3205ddff 280c3872 22a06ec0 ....2...(.8r".n. + 40102dc0 03000c32 05dcff28 0c387222 a06ec003 ...2...(.8r".n.. + 40102dd0 000c2245 dbff280c 387222a0 6ec00300 .."E..(.8r".n... + 40102de0 2c8285e0 ff0cc245 e0ff85ed ff0c62c5 ,......E......b. + 40102df0 dfffc5f3 ffc5e6ff 21cdff08 310c03c8 ........!...1... + 40102e00 21324200 12c1100d f0000000 318cff12 !2B.........1... + 40102e10 c1f03803 09312243 00c5e2ff 21c4ff08 ..8..1"C....!... + 40102e20 310c1332 420012c1 100df000 c022113a 1..2B........".: + 40102e30 223184ff 3a223181 ff29030d f0000000 "1..:"1..)...... + 40102e40 12c1f0d9 11d17dff c9210931 cd02220c ......}..!.1..". + 40102e50 00dc1221 b6ff0831 0c13c821 d8113242 ...!...1...!..2B + 40102e60 0012c110 0df0380d 1bcc2243 0085ddff ......8..."C.... + 40102e70 86f6ff00 12c1d0e9 812172ff e170ffc9 .........!r..p.. + 40102e80 a1d991f9 7109b129 0ed175ff 0c02fd02 ....q..)..u..... + 40102e90 4d02cd02 380e516a ff37b520 216aff29 M...8.Qj.7. !j.) + 40102ea0 0e05dcff 21a2ff08 b10c03c8 a1d891e8 ....!........... + 40102eb0 81f87132 420012c1 300df000 00620d00 ..q2B...0....b.. + 40102ec0 32030037 16498c92 3d042d0f 490185e3 2..7.I..=.-.I... + 40102ed0 ff480128 0e220200 42610085 d3ff4801 .H.(."..Ba....H. + 40102ee0 2d0c1b44 4040740c f347b317 1bfff0f0 -..D@@t..G...... + 40102ef0 74662f01 fd0cf02f 20c03c20 85e0ffc0 tf/..../ .< .... + 40102f00 2c200c04 380e1bdd 1b33390e 06e1ff00 , ..8....39..... + 40102f10 1b222020 7446f2ff 12c1f020 20f40931 ." tF..... ..1 + 40102f20 0118f6c0 00000831 12c1100d f0000000 .......1........ + 40102f30 12c1f009 31262211 2632200c 050c848c ....1&".&2 ..... + 40102f40 b2083112 c1100df0 00000c05 0c243d04 ..1..........$=. + 40102f50 2d050124 fac00000 46f9ff00 0c051c04 -..$....F....... + 40102f60 86faff00 12c1f009 31262211 2632200c ........1&".&2 . + 40102f70 050c848c b2083112 c1100df0 00000c05 ......1......... + 40102f80 0c243d05 2d040117 fac00000 46f9ff00 .$=.-.......F... + 40102f90 0c051c04 86faff00 00400000 00200000 .........@... .. + 40102fa0 00800000 12c1f0c9 2120c074 21fbff0c ........! .t!... + 40102fb0 0509314d 023d0507 ec052032 20502520 ..1M.=.... 2 P% + 40102fc0 0109fac0 0000215d f50c054d 023d0517 ......!]...M.=.. + 40102fd0 ec052032 20502520 0103fac0 000021ef .. 2 P% ......!. + 40102fe0 ff0c054d 023d0527 ec052032 20502520 ...M.=.'.. 2 P% + 40102ff0 01fdf9c0 000021ea ff0c054d 023d0537 ......!....M.=.7 + 40103000 ec052032 20502520 01f7f9c0 00000831 .. 2 P% .......1 + 40103010 c82112c1 100df000 00f00000 0c0451fe .!............Q. + 40103020 ff12c1f0 3d042d04 093101ee f9c00000 ....=.-..1...... + 40103030 083112c1 100df000 31f8ff0c 0512c1f0 .1......1....... + 40103040 4d032d05 093101e7 f9c00000 083112c1 M.-..1.......1.. + 40103050 100df000 14080060 18080060 0c080060 .......`...`...` + 40103060 04080060 08080060 10080060 3c080060 ...`...`...`<..` + 40103070 1af00000 51f8ff22 aecfc020 0048053c ....Q.."... .H.< + 40103080 0312c1f0 20441009 31304420 c0200049 .... D..10D . .I + 40103090 0551f1ff c0200048 05204410 304420c0 .Q... .H. D.0D . + 401030a0 20004905 51eeffc0 20004805 20441030 .I.Q... .H. D.0 + 401030b0 4420c020 00490551 eaffc020 00480520 D . .I.Q... .H. + 401030c0 44103044 20c02000 490551e6 ffc02000 D.0D . .I.Q... . + 401030d0 48052044 10304420 c0200049 0551e2ff H. D.0D . .I.Q.. + 401030e0 c0200048 05204410 30342041 e0ffc020 . .H. D.04 A... + 401030f0 003905c0 20003804 0c052023 1031dcff .9.. .8... #.1.. + 40103100 c0200029 044d0350 252001b6 f9c00000 . .).M.P% ...... + 40103110 083112c1 100df000 5c87fe3f 21ffff0d .1......\..?!... + 40103120 f0000000 a08afe3f e8542140 0c0312c1 .......?.T!@.... + 40103130 f05d0209 0101fbff 0c125900 01fbffc0 .]........Y..... + 40103140 00000801 12c1100d f0000000 31f6ff29 ............1..) + 40103150 030df000 12c1f009 0101f2ff 08000810 ................ + 40103160 c000000c 02080112 c1100df0 000af23f ...............? + 40103170 21ffffc0 20002222 800df000 b88afe3f !... ."".......? + 40103180 30524112 c1f06d01 50559009 110c006a 0RA...m.PU.....j + 40103190 400a353a 321b0032 03003244 00800001 @.5:2..2..2D.... + 401031a0 00083166 30e822a0 6b0c230c 144c0601 ..1f0.".k.#..L.. + 401031b0 f3ff5201 00080080 55015058 31605520 ..R.....U.PX1`U + 401031c0 02202650 5074c000 0022a06b 0c230c24 . &PPt...".k.#.$ + 401031d0 52010101 eaff6201 02080080 66018055 R.....b.....f..U + 401031e0 01505831 60683102 2026c066 11605520 .PX1`h1. &.f.`U + 401031f0 505074c0 00000811 12c1100d f0000000 PPt............. + 40103200 009a0060 ff0ff0ff 00400b00 71fdff61 ...`.....@..q..a + 40103210 fdff51d3 f4ac4240 9311c020 00822759 ..Q...B@... ..'Y + 40103220 60881090 8820c020 00826759 c0200042 `.... . ..gY. .B + 40103230 27da5044 20c02000 4267da0d f041f2ff '.PD . .Bg...A.. + 40103240 c0200032 27596033 10403320 c0200032 . .2'Y`3.@3 . .2 + 40103250 6759c020 002227da 502220c0 20002267 gY. ."'.P" . ."g + 40103260 da0df000 ffff0fff ffffff03 00003000 ..............0. + 40103270 000000d8 ffff7ffe 41fbff12 c1f00901 ........A....... + 40103280 c91101f9 ffc153f9 dcf2c020 00322ce5 ......S.... .2,. + 40103290 403310c0 2000326c e5c02000 222ce500 @3.. .2l.. .",.. + 401032a0 2210c020 00226ce5 460a0071 f0ffc020 ".. ."l.F..q... + 401032b0 00622ce5 40661070 6620c020 00626ce5 .b,.@f.pf . .bl. + 401032c0 61ecffc0 2000522c e5005510 605520c0 a... .R,..U.`U . + 401032d0 2000526c e581a6f4 91e7ffc0 2000722c .Rl........ .r, + 401032e0 fa907710 807720c0 2000726c fa0c1201 ..w..w . .rl.... + 401032f0 24f5c000 00c02000 b1dfffa2 2cfab0aa $..... .....,... + 40103300 10c02000 a26cfac8 11080112 c1100df0 .. ..l.......... + 40103310 00feef3f ffff70fc 00000050 00060060 ...?..p....P...` + 40103320 a68afe3f 22a00412 c1f00261 00c55500 ...?"......a..U. + 40103330 22a00045 f4ff22a0 620190ff 0c130800 "..E..".b....... + 40103340 0c340220 260c15c0 00007cdb 71f1ffa1 .4. &.....|.q... + 40103350 87ffc020 00922a9c b09910c0 2000926a ... ..*..... ..j + 40103360 9c81ecff c0200062 27868066 10c02000 ..... .b'..f.. . + 40103370 62678641 e9ff51e9 ffc02000 42654431 bg.A..Q... .BeD1 + 40103380 e8ff0c12 080112c1 10224300 0df00000 ........."C..... + 40103390 2c80fe3f 18c82140 d4b32140 0c141cf5 ,..?..!@..!@.... + 401033a0 0c0892a1 3861faff 12c1c0c9 61d971e9 ....8a......a.q. + 401033b0 81f99172 c11029c1 09514c02 38c16206 ...r..)..QL.8.b. + 401033c0 00990189 11806601 60683101 f2ffc000 ......f.`h1..... + 401033d0 000c0e0c 00f2a06f 82011078 c10c0bb9 .......o...x.... + 401033e0 d1920705 80880172 07008088 3182c81f .......r....1... + 401033f0 9077c082 41100077 11707031 79e1f077 .w..A..w.pp1y..w + 40103400 1182c7f9 89b172c7 f8007711 70703179 ......r...w.pp1y + 40103410 a16d0f22 0110c8e1 80220120 28310a22 .m.".....". (1." + 40103420 2241100d 0f802201 2028312a cc80cc01 "A....". (1*.... + 40103430 c0c83127 2f016d02 62411080 26012028 ..1'/.m.bA..&. ( + 40103440 31c72f01 0d0c80c0 01c0c831 01d3ffc0 1./........1.... + 40103450 0000dd02 2d0c01d0 ffc00000 38b1206d ....-.......8. m + 40103460 c0000611 00003137 200532a0 a8d7a34c ......17 .2....L + 40103470 8cee48d1 58a10724 08572005 72a0a8d7 ..H.X..$.W .r... + 40103480 a73a5c08 872235f7 1c320026 1178e11b .:\.."5..2.&.x.. + 40103490 902b801b eee0e074 9089b380 81210c29 .+.....t.....!.) + 401034a0 0d098077 c00b7780 77017078 31a62701 ...w..w.w.px1.'. + 401034b0 0d07a2ce f6202031 29d1563a f508c1c8 ..... 1).V:.... + 401034c0 61020000 f891f030 1137ad1f 9cced020 a......0.7..... + 401034d0 d01b322b 223023b3 20212100 22112020 ..2+"0#. !!.". + 401034e0 31d871e8 81085112 c1400df0 0c02c6fb 1.q...Q..@...... + 401034f0 ff000000 0c160b53 12c1f009 01001540 .......S.......@ + 40103500 0d020046 a147220e 00134000 06a10002 ...F.G"...@..... + 40103510 c0000011 0000312d 00080112 c1100df0 ......1-........ + 40103520 00960060 00fef13f ff7f0000 c48bfe3f ...`...?.......? + 40103530 12c1f009 01c91121 fbffc1f9 ff0cf0c0 .......!........ + 40103540 20002222 8f202035 f6822ac0 2000222c ."". 5..*. .", + 40103550 8007621b 2028740c 8385f9ff 0cf032a0 ..b. (t.......2. + 40103560 6b3022d1 20262100 22112020 31060200 k0". &!.". 1... + 40103570 21eeff86 000021ec ffc02000 522cb700 !.....!... .R,.. + 40103580 5520c020 0041e9ff 526cb708 01c81112 U . .A..Rl...... + 40103590 c1102254 050df000 000a0060 68a590e6 .."T.......`h... + 401035a0 27d0b4ea 2117ff0c 1851fbff c0200072 '...!....Q... .r + 401035b0 25d28077 20c02000 7265d27c e6c02000 %..w . .re.|.. . + 401035c0 4225d260 4410c020 004265d2 3151ffc0 B%.`D.. .Be.1Q.. + 401035d0 20003223 960ca430 3c344033 1066930b .2#...0<4@3.f.. + 401035e0 91efffc0 20009262 dd060200 a1edffc0 .... ..b........ + 401035f0 2000a262 dd21caff c0200022 22802020 ..b.!... ."". + 40103600 c50df000 12c1f002 6100013c f8c00000 ........a..<.... + 40103610 05f9ff45 c8fc0221 0012c110 80000000 ...E...!........ + 40103620 d48bfe3f 72a10151 6bf8c020 0072655b ...?r..Qk.. .re[ + 40103630 61ddf3c0 20004225 5b604420 c0200042 a... .B%[`D . .B + 40103640 655b31f7 ff0c1222 43010df0 ffffff0f e[1...."C....... + 40103650 288bfe3f d084fe3f 31f2ff12 c1f0d921 (..?...?1......! + 40103660 c9110901 cd020203 01d15af8 dc9052a1 ..........Z...R. + 40103670 01c02000 526d5b41 cbf3c020 00222d5b .. .Rm[A... ."-[ + 40103680 402220c0 2000226d 5b0ca201 3df4c000 @" . ."m[...=... + 40103690 0001e3ff c0200062 2d5c9686 00c02000 ..... .b-\.... . + 401036a0 722d5cd6 67ff41e9 ffc02000 222d5c0c r-\.g.A... ."-\. + 401036b0 0831e7ff 82400132 03004022 10f6330c .1...@.2..@"..3. + 401036c0 41e5ffe0 33114a33 38034600 002c83c0 A...3.J38.F..,.. + 401036d0 2211010f f4c00000 d821ac12 081c9cb0 "........!...... + 401036e0 52a1ff27 b0050032 c0860000 2030c037 R..'...2.... 0.7 + 401036f0 350c2032 a0002090 3a222023 41291cc8 5. 2.. .:" #A).. + 40103700 11080112 c1100df0 988bfe3f 998bfe3f ...........?...? + 40103710 fffff0ff ffcfffff b4d32140 41c1ff12 ..........!@A... + 40103720 c1f00921 62140169 01511dfe 01f9fec0 ...!b..i.Q...... + 40103730 20003220 96503310 303f4139 1126120b .2 .P3.0?A9.&.. + 40103740 2622080c 12082112 c1100df0 01f3ffc0 &"....!......... + 40103750 000041ef fe81ecff 01b2ff82 08007200 ..A...........r. + 40103760 00224005 80771070 72207240 04707074 ."@..w.pr r@.ppt + 40103770 56f7fc7c fb61e6ff 31e5ff0c 12224300 V..|.a..1...."C. + 40103780 71e5ffa2 afc021e5 fec02000 9811b262 q.....!... ....b + 40103790 49661946 88018050 34005511 c0200032 If.F...P4.U.. .2 + 401037a0 24826033 10503320 c0200032 648280b4 $.`3.P3 . .2d... + 401037b0 1440bb11 c0200092 24827099 10b09920 .@... ..$.p.... + 401037c0 c0200092 64828086 54c02000 522487a0 . ..d...T. .R$.. + 401037d0 55108055 20c02000 52648791 6fff8161 U..U . .Rd..o..a + 401037e0 f3c02000 52224280 5520c020 00526242 .. .R"B.U . .RbB + 401037f0 0c8b7c33 c0200082 29d03088 10b08820 ..|3. ..).0.... + 40103800 c0200052 a0648269 d098110b 556605fa . .R.d.i....Uf.. + 40103810 661951c0 2000b222 4ab0b014 ccabc020 f.Q. .."J...... + 40103820 0032224a 30301416 33ffc020 00322482 .2"J00..3.. .2$. + 40103830 603310c0 20003264 82c02000 b2248270 `3.. .2d.. ..$.p + 40103840 bb10c020 00b26482 c0200092 2487a099 ... ..d.. ..$... + 40103850 10c02000 9264870c 28c02000 52224a80 .. ..d..(. .R"J. + 40103860 55105240 060c0286 b6ff0000 ffff3fff U.R@..........?. + 40103870 74832140 80d32140 e0d22140 2cd32140 t.!@..!@..!@,.!@ + 40103880 38d62140 c4d42140 e0d52140 0c0312c1 8.!@..!@..!@.... + 40103890 f0c91109 01cd0201 62ff0c12 22400701 ........b..."@.. + 401038a0 f4ffc000 004136fb 3156fec0 20002223 .....A6.1V.. ."# + 401038b0 42402220 c0200022 634201ee ffc00000 B@" . ."cB...... + 401038c0 264c2361 97fe0c15 52460066 1c0a2d0c &L#a....RF.f..-. + 401038d0 01eaffc0 00004603 00262c02 668c072d ......F..&,.f..- + 401038e0 0c01e6ff c0000061 28f30c25 8120fec0 .......a(..%. .. + 401038f0 20004228 85604410 504420c0 20004268 .B(.`D.PD . .Bh + 40103900 8531b5fa c0200022 28853022 10c02000 .1... ."(.0".. . + 40103910 22688501 24f3c020 00b22885 00bb20c0 "h..$.. ..(... . + 40103920 2000b268 85a1d1ff 9112f3c0 20007228 ..h........ .r( + 40103930 9da07710 907720c0 20007268 9d01d0ff ..w..w . .rh.... + 40103940 c0000001 d0ffc000 0001cfff c0000051 ...............Q + 40103950 71fe016f fe668c59 713eff72 074782a0 q..o.f.Yq>.r.G.. + 40103960 ff87973e 319cf7c0 20002223 e50c1440 ...>1... ."#...@ + 40103970 2220c020 000c2401 01fe2263 e508000c " . ..$..."c.... + 40103980 6202202b 0c13c000 007ce851 62fe0160 b. +.....|.Qb..` + 40103990 fec02000 7190f762 27e58066 10c02000 .. .q..b'..f.. . + 401039a0 6267e5c0 20009220 86509910 c0200092 bg.. .. .P... .. + 401039b0 6086262c 02661c0e c02000a2 208650aa `.&,.f... .. .P. + 401039c0 10c02000 a26086c8 11080112 c1100df0 .. ..`.......... + 401039d0 4150fe9c 127c76c0 20005224 86605510 AP...|v. .R$.`U. + 401039e0 c0200052 64860df0 0c83c020 00222486 . .Rd...... ."$. + 401039f0 302220c0 20002264 860df000 b88efe3f 0" . ."d.......? + 40103a00 71ffffb0 82118a87 3248261b 32b03311 q.......2H&.2.3. + 40103a10 3a374248 250c0470 66a04243 080c1300 :7BH%..pf.BC.... + 40103a20 12400023 a1381652 48242033 20391638 .@.#.8.RH$ 3 9.8 + 40103a30 07202320 29070df0 71f1ff6d 057055a0 . # )...q..m.pU. + 40103a40 12c1f0a8 150931c9 21d91188 079d077c ......1.!......| + 40103a50 fb0c17ec da6a59c2 0514c7d8 4e5d044d .....jY.....N].M + 40103a60 033d022d 0c85f9ff 06300000 00b05c11 .=.-.....0....\. + 40103a70 5ad9d20d 24471d20 001c4000 c7a1c0cb Z...$G. ..@..... + 40103a80 30c0aa10 a0c060a0 cc10c0fc 40c0c060 0.....`.....@..` + 40103a90 c2cc1f66 0cd68604 005ad9d2 0d25379d ...f.....Z...%7. + 40103aa0 d65a5952 05262795 ce061f00 0c3572a0 .ZYR.&'......5r. + 40103ab0 ff505820 7055306a 79920714 0c170019 .PX pU0jy....... + 40103ac0 400077a1 0b775077 1070c530 1cf970f7 @.w..wPw.p.0..p. + 40103ad0 407059c0 66050a50 fc405059 c00c8c26 @pY.f..P.@PY...& + 40103ae0 05490c17 00154000 77a10b77 80771070 .I....@.w..w.w.p + 40103af0 88301cfc 70f74070 7cc02607 0b1bc57a .0..p.@p|.&....z + 40103b00 ccc0c121 86050000 0080f840 80ccc052 ...!.......@...R + 40103b10 c50650cc 80c0c121 a68c02c2 ccfa5d04 ..P....!......]. + 40103b20 4d033d02 2d0c85ed ffc0c074 08312d0c M.=.-......t.1-. + 40103b30 d811c821 12c1100d f0000000 12c1d0d9 ...!............ + 40103b40 91d1aeff e981b0e2 11c9a109 b1f971cd ..............q. + 40103b50 02ea2d32 02249c03 26330e0c 3227330b ..-2.$..&3..2'3. + 40103b60 0c12b663 060c0246 00000c22 055a0029 ...c...F...".Z.) + 40103b70 01ea2d22 02211672 000c0286 10000000 ..-".!.r........ + 40103b80 001bccb0 cc11cacd 283cf2ce 10fafdec ........(<...... + 40103b90 e2ea2dc8 62160cfe 288cea3d 2963cc42 ..-.b...(..=)c.B + 40103ba0 2d038b3f 397222a0 00226c08 2d0c8577 -..?9r".."l.-..w + 40103bb0 008ca228 010c043d 0cc55500 46f4ff2d ...(...=..U.F..- + 40103bc0 0c08b1c8 a1d891e8 81f87112 c1300df0 ..........q..0.. + 40103bd0 ed080000 a487fe3f 3086fe3f 12c1f002 .......?0..?.... + 40103be0 61035622 0141faff 31fbff21 fbff0164 a.V".A..1..!...d + 40103bf0 f1c00000 06ffff00 0c033982 3180ff08 ..........9.1... + 40103c00 3142234b 12c11029 0422c220 22634b0d 1B#K...).". "cK. + 40103c10 f0000000 0c033982 3179ff42 234d2904 ......9.1y.B#M). + 40103c20 22c22022 634d0df0 3491fe3f b28efe3f ". "cM..4..?...? + 40103c30 b38efe3f 12c1f0c9 21d91109 31dd02e2 ...?....!...1... + 40103c40 610001be f1c00000 c1f8ffda 2c220200 a...........,".. + 40103c50 8ca20199 f7c00000 0c028616 0000d02c ..............., + 40103c60 80e2a001 e2420001 94f7c000 0066ad05 .....B.......f.. + 40103c70 21efffe2 42000c04 3d0d2c02 0188f7c0 !...B...=.,..... + 40103c80 0000ed02 0c02271e 2ee02e20 66ad2801 ......'.... f.(. + 40103c90 abf1c000 00220c0c 0c030b22 224c0c21 .....".....""L.! + 40103ca0 e4ff3242 00214cf2 32a073c0 20003902 ..2B.!L.2.s. .9. + 40103cb0 0182f7c0 00002d0e 0831c821 d811e801 ......-..1.!.... + 40103cc0 12c1100d f0000000 6c80fe3f 12c1f021 ........l..?...! + 40103cd0 d8ffc921 0931d911 320200cd 022150f1 ...!.1..2....!P. + 40103ce0 6613240c 33c02000 39020194 f1c00000 f.$.3. .9....... + 40103cf0 2179f128 020192f1 c00000c5 59fc0191 !y.(........Y... + 40103d00 f1c00000 46060000 d2a001c0 2000d262 ....F....... ..b + 40103d10 0021edff 2802c53c 010cc2d2 4c0045f1 .!..(..<....L.E. + 40103d20 ff0831c8 21d81112 c1100df0 42affe00 ..1.!.......B... + 40103d30 12404024 814131ff 12c1f040 33a05223 .@@$.A1....@3.R# + 40103d40 01026103 20551059 13380420 23102904 ..a. U.Y.8. #.). + 40103d50 0c8205ee ff083112 c1100df0 12c1d009 ......1......... + 40103d60 b1e981c9 a1d991f2 610720e0 740173f1 ........a. .t.s. + 40103d70 c00000c5 3800ccb2 0150f7c0 00007cf2 ....8....P....|. + 40103d80 86640000 00c11dff e0fe11e0 2c80d202 .d..........,... + 40103d90 14f02c80 222201d7 52771b2d b032113a ..,.""..Rw.-.2.: + 40103da0 3c320308 16a306b0 32113a3c 0c044243 <2......2.:<..BC + 40103db0 08b03d11 3a3c3863 cce3b022 112a2c28 ..=.:<8c...".*,( + 40103dc0 32cc523d 0e2d0d45 f6fffa2c 38121603 2.R=.-.E...,8... + 40103dd0 040c1200 1d400022 a10b4230 44107cf5 .....@."..B0D.|. + 40103de0 20253040 33303032 10302060 30221020 %0@3002.0 `0". + 40103df0 f2402020 6022c21f 57921140 20604022 .@ `"..W..@ `@" + 40103e00 1020f240 20206022 c21f2602 04ea3c22 . .@ `"..&...<" + 40103e10 4314ea2c d202149c 9efafc0c 12381f00 C..,.........8.. + 40103e20 1d4000f2 a10bff30 ff10f033 304d027c .@.....0...30M.| + 40103e30 f5461200 222c01d7 520d22cd 01b02211 .F..",..R."...". + 40103e40 2a2c2202 082612d0 0c0205cf ff568209 *,"..&.......V.. + 40103e50 0c1285ce ff560209 46efff00 d02d2032 .....V..F....- 2 + 40103e60 61014261 02590145 cdff3811 48215801 a.Ba.Y.E..8.H!X. + 40103e70 ec42001d 400024a1 20253020 33103020 .B..@.$. %0 3.0 + 40103e80 60302210 20f24020 2060d2c2 1f660dcb `0". .@ `...f.. + 40103e90 0c137cf4 060d0000 ea3cd243 141bddb0 ..|......<.C.... + 40103ea0 dd11dadc 0c13324d 08060f00 00d02d20 ......2M......- + 40103eb0 32610142 610245c8 ff381148 215672fd 2a.Ba.E..8.H!Vr. + 40103ec0 001d4000 23a12024 3020ff10 f02060f0 ..@.#. $0 ... `. + 40103ed0 221020f2 40202060 d2c21f66 0dce01f6 ". .@ `...f.... + 40103ee0 f6c00000 7ce2060b 00dd0228 922802d7 ....|......(.(.. + 40103ef0 7211222c 5a22c2ff 226c5a22 2c5922c2 r.",Z".."lZ",Y". + 40103f00 01226c59 01edf6c0 0000d02d 20e03e20 ."lY.......- .> + 40103f10 45460022 a00008b1 c8a1d891 e881f871 EF."...........q + 40103f20 12c1300d f0000000 12c1f002 61033222 ..0.........a.2" + 40103f30 090c0449 430c4442 430f05ca ff0c4245 ...IC.DBC.....BE + 40103f40 cfff0831 12c1100d f0000000 5880fe3f ...1........X..? + 40103f50 20507421 feff12c1 f0280209 3162020b Pt!.....(..1b.. + 40103f60 1cf70c12 67370850 252001cc f6c00000 ....g7.P% ...... + 40103f70 083112c1 100df000 12c1e0e9 41202074 .1..........A t + 40103f80 30e0f431 9efec961 b0c211d9 51f931ca 0..1...a....Q.1. + 40103f90 23097140 d0f44202 27fd032d 0efcf401 #.q@..B.'..-.... + 40103fa0 e7f0c000 00cacf28 6c516df1 8c824892 .......(lQm...H. + 40103fb0 38043036 4157030b 01c0f6c0 00002d0e 8.06AW........-. + 40103fc0 06070000 3214053a eee0e0f4 d73e0a01 ....2..:.....>.. + 40103fd0 baf6c000 002d0d46 01002882 06f3ff00 .....-.F..(..... + 40103fe0 0871c861 d851e841 f83112c1 200df000 .q.a.Q.A.1.. ... + 40103ff0 ffff7f00 12c1f0d9 110931c9 21c892dd ..........1.!... + 40104000 02322c00 30364137 7309220c 08c5e301 .2,.06A7s."..... + 40104010 86030000 42a4020c 02478308 220c0885 ....B....G.."... + 40104020 da012020 84481c31 f2ff9022 01303410 .. .H.1...".04. + 40104030 20232029 1cc89d22 1d0a321d 0b481c2a # )..."..2..H.* + 40104040 33220c08 40478530 30f445d9 01083122 3"..@G.00.E...1" + 40104050 5c05d811 c82112c1 100df000 7091fe3f \....!......p..? + 40104060 6c91fe3f 12c1f0c2 61020931 c2a00066 l..?....a..1...f + 40104070 822e01b2 f0c00000 21f9ffc8 42cc9c01 ........!...B... + 40104080 8ef6c000 00060600 0000388c 39420c02 ..........8.9B.. + 40104090 298c0189 f6c00000 31f2ff28 030b2229 ).......1..(..") + 401040a0 0308312d 0cc82112 c1100df0 08004000 ..1-..!.......@. + 401040b0 f09afe3f 12c1f0c9 21d911cd 02dd0309 ...?....!....... + 401040c0 3185b1ff 389c2803 20464121 f8ff2024 1...8.(. FA!.. $ + 401040d0 10668204 287c45ad 0022a004 45b5ff16 .f..(|E.."..E... + 401040e0 1d0121f3 ff22020b cc82289c 28122024 ..!.."....(.(. $ + 401040f0 2505b4ff 0831c821 d81112c1 100df000 %....1.!........ + 40104100 21ecff0c 1432020b 0c023024 830df000 !....2....0$.... + 40104110 21e8ff0d f0000000 12c1f009 312d0338 !...........1-.8 + 40104120 930c4552 430f4030 7485f8ff 083112c1 ..ERC.@0t....1.. + 40104130 100df000 12c1f009 312d0338 930c1552 ........1-.8...R + 40104140 430f4030 74c5f6ff 083112c1 100df000 C.@0t....1...... + 40104150 b687fe3f 3086fe3f 00004800 20707421 ...?0..?..H. pt! + 40104160 d4ff12c1 f0380202 61035623 0131f8ff .....8..a.V#.1.. + 40104170 21f9ff42 a1160102 f0c00000 06ffff00 !..B............ + 40104180 42020b26 241131f2 ff21f2ff 42a11701 B..&$.1..!..B... + 40104190 fcefc000 0006ffff 589362a4 02480540 ........X.b..H.@ + 401041a0 46416784 0b61ecff 81f1f060 64108796 FAg..a.....`d... + 401041b0 16420207 4242060c 04424209 42420a42 .B..BB...BB.BB.B + 401041c0 a07f4245 09c60700 0c0687e4 0b420207 ..BE.........B.. + 401041d0 62420942 4206c602 00420207 62420942 bB.BB....B..bB.B + 401041e0 42066242 0a724509 42a00042 420b42a0 B.bB.rE.B..BB.B. + 401041f0 0105f4ff 02210312 c1100df0 c00cf23f .....!.........? + 40104200 ffff00f0 740cf23f 000000c0 c40df23f ....t..?.......? + 40104210 ffffff3f ffffff7f 21f9ff12 c1e0e941 ...?....!......A + 40104220 31f8ffc0 2000e802 c0200048 02c96109 1... .... .H..a. + 40104230 71d951f9 31303410 e0e0b5c0 20003902 q.Q.104..... .9. + 40104240 c1f1ff16 9e0be020 60e02210 20f24020 ....... `.". .@ + 40104250 2060d2c2 1f660d02 0629002d 0d05ebff `...f...).-.... + 40104260 fd020136 f0c00000 31e8ffc0 2000280c ...6....1... .(. + 40104270 302220c0 2000290c 0110f6c0 00002c22 0" . .).......," + 40104280 0140f1c0 0000012d f0c00000 31e0ffe0 .@.....-....1... + 40104290 2d11202d c03022b0 c0200048 02314ef8 -. -.0".. .H.1N. + 401042a0 303410c0 20003902 c0200048 0c31d8ff 04.. .9.. .H.1.. + 401042b0 303410c0 2000390c c0200038 02d6f300 04.. .9.. .8.... + 401042c0 c0200048 0231d3ff 303410c0 20003902 . .H.1..04.. .9. + 401042d0 22a00022 4f0b222f 0016b200 38920c64 ".."O."/....8..d + 401042e0 42430f0c 13c5dcff 0c02290f 01f3f5c0 BC........)..... + 401042f0 00007ce2 001d4020 228120ee 1046d1ff ..|...@ ". ..F.. + 40104300 0871c861 d851e841 f83112c1 200df000 .q.a.Q.A.1.. ... + 40104310 12c1f022 a00e0261 038591ff 02210312 ..."...a.....!.. + 40104320 c1100df0 c4defe3f 28923104 f54862c0 .......?(.1..Hb. + 40104330 20003803 21fcff40 43c03802 0c1232c3 .8.!..@C.8...2. + 40104340 fb603311 4733010c 02202004 0df00000 .`3.G3... ..... + 40104350 00002010 ffefff03 ff3ff0ff ffc0ffff .. ......?...... + 40104360 d40df23f ffff0300 d00df23f c80df23f ...?.......?...? + 40104370 cc0df23f 440ef23f 12c1d0c9 a1c14cff ...?D..?......L. + 40104380 f97109b1 d991e981 620c0bfd 020c020c .q......b....... + 40104390 134d0282 c6fd6043 93803283 30241026 .M....`C..2.0$.& + 401043a0 46151622 01316aff 216bff42 a2970174 F..".1j.!k.B...t + 401043b0 efc00000 06ffff00 66461928 0cf79202 ........fF.(.... + 401043c0 c69f0031 63ff2163 ff42a29a 016defc0 ...1c.!c.B...m.. + 401043d0 000006ff fff90cdc 1f315dff 215eff42 .........1].!^.B + 401043e0 a29f0167 efc00000 06ffff00 321f0ad2 ...g........2... + 401043f0 1f0be1cc ff3add32 1e05d7a3 22789f38 .....:.2...."x.8 + 40104400 07303641 17e31841 d3ff52a1 00403310 .06A...A..R..@3. + 40104410 503320a0 43113807 30305440 33203907 P3 .C.8.00T@3 9. + 40104420 789f5807 50464127 7539fc68 88178034 x.X.PFA'u9.h...4 + 40104430 34a6332f 31c8ff52 a1003034 10503320 4.3/1..R..04.P3 + 40104440 a0431138 07303054 40332039 0731c2ff .C.8.00T@3 9.1.. + 40104450 80485420 44113038 10403320 41c0ff40 .HT D.08.@3 A..@ + 40104460 33103917 3817584f 303785d0 d0f43080 3.9.8.XO07....0. + 40104470 f4262613 9c023136 ff2136ff 42a0aa01 .&&...16.!6.B... + 40104480 40efc000 0006ffff 221c0716 a2053255 @.......".....2U + 40104490 01289f32 a4022802 20464137 8422312e .(.2..(. FA7."1. + 401044a0 ff303410 4132f047 1316421c 073d0820 .04.A2.G..B..=. + 401044b0 22345911 82610005 acff5811 88012255 "4Y..a....X..."U + 401044c0 01221501 27b81922 5c06222f 09322200 ."..'.."\."/.2". + 401044d0 e7632022 02085261 01c58e01 58118604 .c "..Ra....X... + 401044e0 000c0222 5c068602 00220708 0cf427b4 ..."\...."....'. + 401044f0 02325501 789f22a4 0248070c 03406641 .2U.x."..H...@fA + 40104500 27861d21 15ff4119 f0202610 4712110c '..!..A.. &.G... + 40104510 3347f60c 3112f00c 24302610 0c132034 3G..1...$0&... 4 + 40104520 932186f4 8867c020 00280242 2e008022 .!...g. .(.B..." + 40104530 c0202a41 2024c027 b40222a0 05420c04 . *A $.'.."..B.. + 40104540 2020b4e0 84118044 c08185ff 40221180 .....D....@".. + 40104550 44b0c020 00290422 0c04912c ffe04211 D.. .)."...,..B. + 40104560 4022c090 92b0a100 f02179ff 60490482 @".......!y.`I.. + 40104570 a10040a2 9380b301 80461032 9c068100 ..@......F.2.... + 40104580 f80c0240 82834207 08e61307 0cf34733 ...@..B.......G3 + 40104590 0221f6ef e81f3173 ff303e10 b03320a0 .!....1s.0>..3 . + 401045a0 33208033 20202320 c0200029 09220c04 3 .3 # . .).".. + 401045b0 e0321130 22c0316c ff3022b0 32150151 .2.0".1l.0".2..Q + 401045c0 edef0033 11c02000 3902220c 04e08211 ...3.. .9."..... + 401045d0 8022c081 66ff8082 b00cf247 32010c05 ."..f......G2... + 401045e0 22070c40 34113030 f4002211 302220d0 "..@4.00..".0" . + 401045f0 30b43022 20505220 c0200059 080cf247 0.0" PR . .Y...G + 40104600 b240220c 0480dd11 e0521150 22c05158 .@"......R.P".QX + 40104610 ff72a087 5052b040 2024d0d2 201c7247 .r..PR.@ $.. .rG + 40104620 220272a0 0741d1ef 22a00040 461032a0 ".r..A.."..@F.2. + 40104630 08403283 30272080 2201d022 20c02000 .@2.0' .".." . . + 40104640 22650021 4cff0c13 c0200048 02220c06 "e.!L.... .H.".. + 40104650 324c0b00 12400023 a10b2240 4210320c 2L...@.#.."@B.2. + 40104660 05220c04 4040f485 ae0008b1 c8a1d891 ."..@@.......... + 40104670 e881f871 12c1300d f0000000 12c1f0c2 ...q..0......... + 40104680 6102c18b fe026103 22a00022 4c0b280c a.....a.".."L.(. + 40104690 2892c595 00dc0228 0c4122ff 58926204 (......(.A".X.b. + 401046a0 09381530 78546737 0a280c0c 24389246 .8.0xTg7.(..$8.F + 401046b0 07000000 42040830 3e544733 070c3332 ....B..0>TG3..32 + 401046c0 450f4603 0005c6ff 9c22280c 0c543892 E.F......"(..T8. + 401046d0 42430f0c 13c59dff 060a0000 0000222c BC............", + 401046e0 0032a008 48425204 01303520 3244010c .2..HBR..05 2D.. + 401046f0 33324c0b 38922222 07058700 320c0428 32L.8.""....2..( + 40104700 0c45c7ff 0831c821 12c1100d f0000000 .E...1.!........ + 40104710 12c1f021 67fe4103 ff093132 020a4204 ...!g.A...12..B. + 40104720 0847b304 1b333242 0a32020a 47b30d32 .G...32B.2..G..2 + 40104730 02064202 0847b30a 1b338600 00320207 ..B..G...3...2.. + 40104740 32420638 02689331 04ff5816 504e541b 2B.8.h.1..X.PNT. + 40104750 44404054 20441130 35104033 20304434 D@@T D.05.@3 0D4 + 40104760 1b444040 3452af0f c0441150 33104033 .D@@4R...D.P3.@3 + 40104770 20391622 020b0b22 202074b6 22113174 9."..." t.".1t + 40104780 fe2174fe 42a20701 7eeec000 0006ffff .!t.B...~....... + 40104790 85eeff08 3112c110 0df00000 12c1f009 ....1........... + 401047a0 31dc0231 6bfe216b fe42a1d4 0175eec0 1..1k.!k.B...u.. + 401047b0 000006ff ff413efe 61dbfe52 04096206 .....A>.a..R..b. + 401047c0 0967b504 1b555244 09520409 67b50d52 .g...URD.R..g..R + 401047d0 04066204 0867b50a 1b558600 00520407 ..b..g...U...R.. + 401047e0 52440668 9221ddfe 78167058 541b5550 RD.h.!..x.pXT.UP + 401047f0 50548045 11202710 40222029 168c4320 PT.E. '.@" )..C + 40104800 343457a3 16203434 32c30130 303442af 44W.. 442..004B. + 40104810 0fc03311 40221030 22202916 c5e5ff08 ..3.@".0" )..... + 40104820 3112c110 0df00000 3122fe12 c1f02803 1.......1"....(. + 40104830 09315622 013146fe 2147fe42 a2210150 .1V".1F.!G.B.!.P + 40104840 eec00000 06ffff00 42220942 2400e764 ........B".B$..d + 40104850 12220307 22430622 a0002243 0905ebff .".."C.".."C.... + 40104860 86010000 32a00045 f3ff0221 0312c110 ....2..E...!.... + 40104870 80000000 d6fe2240 12c1f020 30740931 ......"@... 0t.1 + 40104880 1c123732 0bf6b320 26131426 3311860c ..72... &..&3... + 40104890 0022af40 2a230c14 27342886 02000000 .".@*#..'4(..... + 401048a0 45f8ff06 0e000000 002101fe 0c033242 E........!....2B + 401048b0 0b28020c 74389242 430f32a0 01457fff .(..t8.BC.2..E.. + 401048c0 c6060000 21ecffc5 d0fc3121 fe2121fe ....!.....1!.!!. + 401048d0 42a26001 2beec000 0006ffff 00000008 B.`.+........... + 401048e0 3112c110 0df00000 12c1f009 31202074 1...........1 t + 401048f0 b6821131 17fe2117 fe42a1af 0121eec0 ...1..!..B...!.. + 40104900 000006ff ff31eafd 28031642 0432030b .....1..(..B.2.. + 40104910 26131231 0ffe210f fe42a1b8 0119eec0 &..1..!..B...... + 40104920 000006ff ff003892 42a30038 03303641 ......8.B..8.06A + 40104930 47831042 120b3212 0a3a3441 7afe4214 G..B..2..:4Az.B. + 40104940 05372407 0c1345e5 ff460100 10112005 .7$...E..F.... . + 40104950 dcff0831 12c1100d f0000000 12c1e0d2 ...1............ + 40104960 6105e941 f9310261 07c96145 8500dd02 a..A.1.a..aE.... + 40104970 0c1e7cff acc2d020 60d02210 20f24020 ..|.... `.". .@ + 40104980 2060c2c2 1f260c18 2d0cc581 002d0c85 `...&..-....-.. + 40104990 f5ff001c 40002ea1 202f3020 dd1006f5 ....@... /0 .... + 401049a0 ffc58200 022107c2 2106d221 05e841f8 .....!..!..!..A. + 401049b0 3112c120 0df00000 21befd12 c1f02222 1.. ....!....."" + 401049c0 0032a001 02610345 ddff0831 12c1100d .2...a.E...1.... + 401049d0 f0000000 e5fe2240 12c1f020 30740931 ......"@... 0t.1 + 401049e0 1c123732 0bf6b31c 26131026 330d460b ..72....&..&3.F. + 401049f0 0022a0c0 27130d06 09000000 85fbffc6 ."..'........... + 40104a00 0d000000 0021aafd 0c033242 0b28020c .....!....2B.(.. + 40104a10 74389242 430f32a0 018569ff 86060021 t8.BC.2...i....! + 40104a20 edff05bb fc31cafd 21cbfd42 a24301d4 .....1..!..B.C.. + 40104a30 edc00000 06ffff00 00000831 12c1100d ...........1.... + 40104a40 f0000000 12c1f002 6103851c ff22a005 ........a....".. + 40104a50 051eff02 210312c1 100df000 3195fd8c ....!.......1... + 40104a60 7228631b 22296346 01002853 1b222953 r(c.")cF..(S.")S + 40104a70 0c222243 0b0df000 fc87fe3f 2030740c .""C.......? 0t. + 40104a80 f422a0ff 37340821 fcff3032 80220300 ."..74.!..02.".. + 40104a90 0df00000 f487fe3f 20307422 a0fff683 .......? 0t".... + 40104aa0 0721fcff 3a322203 000df000 20a10700 .!..:2"..... ... + 40104ab0 8c82fe3f bc272240 12c1f0c9 21cd0222 ...?.'"@....!.." + 40104ac0 2218d911 0c030931 32420b21 f8ff324c "......12B.!..2L + 40104ad0 17226c16 0c0229ac 299c29ec 224c1621 ."l...).).)."L.! + 40104ae0 d3ee324c 0622d201 d20c7722 02fed752 ..2L."....w"...R + 40104af0 1a320c79 220c5c01 efffc000 00d02290 .2.y".\.......". + 40104b00 d1ecffd0 22902202 01860800 220c021c ...."."....."... + 40104b10 93802201 20283127 2311220c 03802201 ..". (1'#."...". + 40104b20 20283127 2305220c 05860000 220c7832 (1'#.".....".x2 + 40104b30 2c184203 0a27a407 cb33326c 18c60200 ,.B..'...32l.... + 40104b40 322c1a20 22903022 a0226c18 21fcf208 2,. ".0"."l.!... + 40104b50 31c02000 2802d811 29bcc821 12c1100d 1. .(...)..!.... + 40104b60 f0000000 42221858 a212c1f0 09316204 ....B".X.....1b. + 40104b70 011b5559 a2489237 36051b44 86000000 ..UY.H.76..D.... + 40104b80 2b443a44 4992b663 07320206 1b330601 +D:DI..c.2...3.. + 40104b90 00f63304 0c033242 06320206 0ca437b4 ..3...2B.2....7. + 40104ba0 0245f1ff 083112c1 100df000 12c1f009 .E...1.......... + 40104bb0 31165209 52221816 f5084873 471502c6 1.R.R"....HsG... + 40104bc0 210048e2 1b4449e2 42030f66 14694852 !.H..DI.B..f.iHR + 40104bd0 27e45c72 030952a0 7f804701 40683157 '.\r..R...G.@h1W + 40104be0 164d6202 0082a07f 80660160 98310c05 .Mb......f.`.1.. + 40104bf0 87190840 48314059 80505174 42020172 ...@H1@Y.PQtB..r + 40104c00 42008044 01407831 62a07f50 50746717 B..D.@x1b..PPtg. + 40104c10 1b805501 50583170 47905a44 3b544045 ..U.PX1pG.ZD;T@E + 40104c20 a3404221 42420146 01000000 00524201 .@B!BB.F.....RB. + 40104c30 38133034 34c60200 42c4fe40 4074f624 8.044...B..@@t.$ + 40104c40 08320508 101120c5 f1ff0831 12c1100d .2.... ....1.... + 40104c50 f0000000 5481fe3f 9480fe3f f480fe3f ....T..?...?...? + 40104c60 02000002 9f860100 0c9bfe3f 00093d00 ...........?..=. + 40104c70 00082000 8082fe3f 1dff2240 12c1d0c9 .. ....?.."@.... + 40104c80 a1d991cd 0209b1e9 81f971dd 03222300 ..........q.."#. + 40104c90 164c0062 2c18fc66 07620521 f0ff0695 .L.b,..f.b.!.... + 40104ca0 003162ee 32d30142 03f931eb ff661419 .1b.2..B..1..f.. + 40104cb0 41ecff20 26414782 1031e6ff 8cac222c A.. &AG..1....", + 40104cc0 1731e5ff 41e4ff20 3493397d 468a0000 .1..A.. 4.9}F... + 40104cd0 20264127 620621e0 ff468600 00176205 &A'b.!..F....b. + 40104ce0 222c19c6 830037e2 02c67d00 2194f248 ",....7...}.!..H + 40104cf0 dcc02000 f802403f c022c3ff 473f0230 .. ...@?."..G?.0 + 40104d00 2320389c 16831c48 ec72a063 47370841 # 8....H.r.cG7.A + 40104d10 d5ff2734 02c66d00 21d4fff9 dce8021b ..'4..m.!....... + 40104d20 eee90228 ac692190 22110179 eec00000 ...(.i!."..y.... + 40104d30 20407472 0c17424c 16682116 97062040 @tr..BL.h!... @ + 40104d40 747a4438 cc404121 302fc042 4c170b72 tzD8.@A!0/.BL..r + 40104d50 373f017d 02320600 220c0149 01692179 7?.}.2.."..I.i!y + 40104d60 11053401 68212021 74820609 48017811 ..4.h! !t...H.x. + 40104d70 5ca98c68 4c038733 0f92a064 2099c00c \..hL..3...d ... + 40104d80 1347391b 0c038605 0092a06e 2099c00c .G9........n ... + 40104d90 0347b90b 2b982099 c00c1347 39010c03 .G..+. ....G9... + 40104da0 303074ec 93460b00 32060952 a0803033 00t..F..2..R..03 + 40104db0 905a3330 32213050 74524c17 47350246 .Z302!0PtRL.G5.F + 40104dc0 30002020 743a3230 3121324c 17c62c00 0. t:201!2L..,. + 40104dd0 322c1677 33437206 0b703004 cc43e0e0 2,.w3Cr..p0..C.. + 40104de0 1456fe09 2028c027 a41916e3 15222c16 .V.. (.'.....",. + 40104df0 319fff27 b3028654 00f02211 226c1646 1..'...T.."."l.F + 40104e00 52000000 16c3077c e2202710 22460b21 R......|. '."F.! + 40104e10 27ff226c 16c61a00 00000c03 2124ff32 '."l........!$.2 + 40104e20 460b226c 160c0229 ac299c29 ec224c16 F."l...).).)."L. + 40104e30 21ffed32 4c17324c 0622d201 e20c7722 !..2L.2L."....w" + 40104e40 02fee7d2 02063f00 320c7922 0c5c0119 ......?.2.y".\.. + 40104e50 ffc00000 3117ffe0 22903022 90320200 ....1...".0".2.. + 40104e60 222c1842 020a47b3 1a22c2f4 226c1842 ",.B..G..".."l.B + 40104e70 020b0c13 30342032 420b2130 f2c02000 ....04 2B.!0.. . + 40104e80 280229cc 222c1832 0c79e202 0a220c5c (.).",.2.y...".\ + 40104e90 0109ffc0 0000420c 77f02211 5105ff4a ......B.w.".Q..J + 40104ea0 32503390 32030037 3e114a42 50f49022 2P3.2..7>.JBP.." + 40104eb0 0f013d0e e7b2013d 02303074 222c1a30 ..=....=.00t",.0 + 40104ec0 33902033 a00c0232 6c1829ac 299c29ec 3. 3...2l.).).). + 40104ed0 219bed38 0da02211 20232029 0d222c18 !..8..". # ).",. + 40104ee0 86040000 3163ff37 8202867c ff222c17 ....1c.7...|.",. + 40104ef0 16c2de21 60ff226d 07222d07 56520021 ...!`."m."-.VR.! + 40104f00 5eff056d fc380d8c 6c285c67 620297e3 ^..m.8..l(\gb... + 40104f10 1e21c6ed 30310422 d2014202 fa375405 .!..01."..B..7T. + 40104f20 2202fb06 0300287d 22020006 01000000 ".....(}"....... + 40104f30 220c0708 b1224d08 c8a1d891 e881f871 "...."M........q + 40104f40 12c1300d f0320c04 06c5ff00 322c0b30 ..0..2......2,.0 + 40104f50 2fc02042 2037bf02 42c2ff21 94ec4732 /. B 7..B..!..G2 + 40104f60 02c6c7ff 2d0c05b5 ffc6c5ff 48034096 ....-.......H.@. + 40104f70 4167f979 7873a813 0c05a0a4 341b876d Ag.yxs......4..m + 40104f80 05b20800 b0668060 607467aa 44168200 .....f.``tg.D... + 40104f90 62220567 660237e9 2f21a4ed 40410422 b".gf.7./!..@A." + 40104fa0 d2012202 fa47520b 21a1ed22 d2012202 .."..GR.!.."..". + 40104fb0 fb860d00 21dcfc22 020822c2 fe27aa27 ....!..".."..'.' + 40104fc0 70559022 05004608 00220207 c6060000 pU."..F.."...... + 40104fd0 00001b55 2b886645 a72194ed 40410422 ...U+.fE.!..@A." + 40104fe0 d2012202 fa47d2bf 22070622 43080df0 .."..G..".."C... + 40104ff0 381221cc fc303434 42020822 a00147a3 8.!..044B.."..G. + 40105000 0222a000 2020040d f0000000 e4defe3f .".. .........? + 40105010 fcdefe3f 0800f23f a80cf23f ac0cf23f ...?...?...?...? + 40105020 41fbff52 14002025 c02020f4 225400b6 A..R.. %. ."T.. + 40105030 220a2823 29240c02 2923860f 000c0566 ".(#)$..)#.....f + 40105040 120f2823 29245923 283431f1 ff392246 ..(#)$Y#(41..9"F + 40105050 0a002844 68547214 01292459 44693452 ..(DhTr..)$YDi4R + 40105060 64057254 00525401 66170451 e9ff5926 d.rT.RT.f..Q..Y& + 40105070 0c055923 31e8ffc0 20002903 32140022 ..Y#1... .).2.." + 40105080 14012a23 e6222241 e4ff2170 f9c02000 ..*#.""A..!p.. . + 40105090 38042033 10c02000 390431e0 ffc02000 8. 3.. .9.1... . + 401050a0 48032024 10c02000 29030df0 5810f23f H. $.. .)...X..? + 401050b0 709ffe3f 41feff31 3bedc020 00580430 p..?A..1;.. .X.0 + 401050c0 3520c020 00390431 faff2913 0df00000 5 . .9.1..)..... + 401050d0 4c10f23f 4810f23f cc10f23f d010f23f L..?H..?...?...? + 401050e0 c810f23f 12c1f0c9 21093120 c2200193 ...?....!.1 . .. + 401050f0 ecc00000 31f7ff21 f7ffc020 005803c0 ....1..!... .X.. + 40105100 20004802 c0200038 03371504 c0200048 .H.. .8.7... .H + 40105110 02ca2427 34011b33 41f0ffc0 20002904 ..$'4..3A... .). + 40105120 21efffc0 20003902 31eeff21 1eedc020 !... .9.1..!... + 40105130 00480320 2420c020 00290301 5ff2c000 .H. $ . .).._... + 40105140 000831c8 2112c110 0df00000 c00df23f ..1.!..........? + 40105150 202074e0 32113022 c031fcff d0221140 t.2.0".1...".@ + 40105160 40943a32 404411c0 20004903 3128fc3a @.:2@D.. .I.1(.: + 40105170 22c02000 48023124 fc303420 c0200039 ". .H.1$.04 . .9 + 40105180 020df000 202074e0 32113022 c0311ffc .... t.2.0".1.. + 40105190 3022b0c0 20004802 311efc30 3410c020 0".. .H.1..04.. + 401051a0 0039020d f0000000 12c1f020 20740261 .9......... t.a + 401051b0 0305fdff 02210312 c1108000 00000000 .....!.......... + 401051c0 210ffcc0 20002802 2020b40d f0000000 !... .(. ...... + 401051d0 310bfc21 edecc020 00480320 2410c020 1..!... .H. $.. + 401051e0 0029030d f0000000 ff0f00ff 0c88fe3f .).............? + 401051f0 3086fe3f 12c1f0c9 21e90140 c0f4ed03 0..?....!..@.... + 40105200 4176f431 e8ec8173 f491f7ff d9115d02 Av.1...s......]. + 40105210 dd020931 0c0216b5 04c02000 68051b22 ...1...... .h.." + 40105220 306620c0 20006905 c0200068 052020f4 0f . .i.. .h. . + 40105230 406610c0 20006905 c0200068 05806610 @f.. .i.. .h..f. + 40105240 c0200069 05c02000 68056060 b4407611 . .i.. .h.``.@v. + 40105250 c0200068 05906610 706620c0 20006905 . .h..f.pf . .i. + 40105260 582506ec ffc71213 31e1ff21 e1ff42a6 X%......1..!..B. + 40105270 1401c3eb c0000006 ffff0000 0130ecc0 .............0.. + 40105280 00005162 ff421500 dc842162 ffd925c0 ..Qb.B....!b..%. + 40105290 2000d902 c25500e9 35661c33 215dff29 ....U..5f.3!].) + 401052a0 2ec60a00 66141d28 45cc52d9 45e95586 ....f..(E.R.E.U. + 401052b0 02002855 421501d9 22e9554a ccc25501 ..(UB...".UJ..U. + 401052c0 06030000 0028354a 4cd92242 5500e935 .....(5JL."BU..5 + 401052d0 32150022 15012a23 a6223051 4fff21db 2.."..*#."0QO.!. + 401052e0 f8c02000 38052043 1031f7f3 30342041 .. .8. C.1..04 A + 401052f0 4bffc020 003905c0 20003224 00202310 K.. .9.. .2$. #. + 40105300 3106f830 2220c020 00226400 01ebf1c0 1..0" . ."d..... + 40105310 00000831 c821d811 e80112c1 100df000 ...1.!.......... + 40105320 12c1f0c2 610220c2 202138ff d911dd03 ....a. . !8..... + 40105330 e9013d0c e8222d0d 093145ce ff4d0d3d ..=.."-..1E..M.= + 40105340 0c2d0e05 ebff0831 c821d811 e80112c1 .-.....1.!...... + 40105350 100df000 0c00f23f 12c1f0c9 21d911e9 .......?....!... + 40105360 01cd02dd 0340e0f4 5d02311b f4218dec .....@..].1..!.. + 40105370 4119f491 9dff0931 0c0816b5 04c02000 A......1...... . + 40105380 68051b88 206620c0 20006905 c0200068 h... f . .i.. .h + 40105390 058080f4 306610c0 20006905 c0200068 ....0f.. .i.. .h + 401053a0 05406610 c0200069 05c02000 68056060 .@f.. .i.. .h.`` + 401053b0 b4407611 c0200068 05906610 706620c0 .@v.. .h..f.pf . + 401053c0 20006905 582506ec ffe71813 3188ff21 .i.X%......1..! + 401053d0 88ff42a6 5e016aeb c0000006 ffff0000 ..B.^.j......... + 401053e0 01d7ebc0 00005109 ff28c58c 5228d5c9 ......Q..(..R(.. + 401053f0 22460200 21d8ffc9 c5c02000 c9022205 "F..!..... ...". + 40105400 04d9d52a 4e424504 01acf1c0 00000831 ...*NBE........1 + 40105410 c821d811 e80112c1 100df000 20322041 .!.......... 2 A + 40105420 fbfe12c1 f0522302 02610328 c459c40c .....R#..a.(.Y.. + 40105430 05592352 04040b55 5244040c 1485f1ff .Y#R...URD...... + 40105440 083112c1 100df000 180cf23f 200cf23f .1.........? ..? + 40105450 840cf23f 240cf23f fc10f23f 1c0cf23f ...?$..?...?...? + 40105460 d401f23f 700cf23f 3800f23f 4e080000 ...?p..?8..?N... + 40105470 23ff2240 55080000 00c00000 5a080000 #."@U.......Z... + 40105480 60080000 12080000 19080000 1d080000 `............... + 40105490 23080000 1c00f23f 1400f23f 1800f23f #......?...?...? + 401054a0 cf080000 29090000 2c090000 a582fe3f ....)...,......? + 401054b0 000000a0 30cdfe3f 00000f00 040ef23f ....0..?.......? + 401054c0 1088fe3f 0e090000 10090000 b4310040 ...?.........1.@ + 401054d0 21deff12 c1b0c020 00380202 61133961 !...... .8..a.9a + 401054e0 31dbffc2 6112c020 003803d2 61113901 1...a.. .8..a.9. + 401054f0 31d8ffe2 6110c020 003803f9 f139410c 1...a.. .8...9A. + 40105500 03c02000 39024801 21d3ffc0 20004902 .. .9.H.!... .I. + 40105510 37940246 7401c774 143134ff 2135ff42 7..Ft..t.14.!5.B + 40105520 a48a0117 ebc00000 06ffff00 00005801 ..............X. + 40105530 b7750921 dffe2802 8c12c002 002801a7 .u.!..(......(.. + 40105540 720921db fe28128c 12c00200 38010cc2 r.!..(......8... + 40105550 20231026 8202c647 0021bfff 5178f0c0 #.&...G.!..Qx.. + 40105560 20004802 61beff1c d30c47c0 20002805 .H.a.....G. .(. + 40105570 4022c027 330dc020 00280677 02028671 @".'3.. .(.w...q + 40105580 0086f9ff 21b7ffc0 20002802 202874f6 ....!... .(. (t. + 40105590 8202866c 0031b3ff 7cd2c020 00480320 ...l.1..|.. .H. + 401055a0 241041ae ffc02000 290322a0 04c02000 $.A... .)."... . + 401055b0 32240027 03f621a7 ff32a004 c0200039 2$.'..!..2... .9 + 401055c0 0221a9ff 3cd3c020 00280222 c2be2020 .!..<.. .(.".. + 401055d0 74273302 06230021 8dfec1a5 ff282241 t'3..#.!.....("A + 401055e0 a3fff812 0c053d0c 0cc2c5aa fcdd0216 ......=......... + 401055f0 12070cc4 3d0f014a ecc00000 858a00dc ....=..J........ + 40105600 12419cff 31fafe21 fafe01dd eac00000 .A..1..!........ + 40105610 06ffff00 22020648 2d202034 00321121 ...."..H- 4.2.! + 40105620 3cf82024 10302220 292d380d 2193ff27 <. $.0" )-8.!..' + 40105630 0312281d 77e20520 3064a683 07202064 ..(.w.. 0d... d + 40105640 1cf327a3 06418dff 46040000 d04d2032 ..'..A..F....M 2 + 40105650 a0092c02 858ffe66 12094189 ff3d0c2d ..,....f..A..=.- + 40105660 0dc586fc 3180ff0c 22c02000 48032024 ....1...". .H. $ + 40105670 20c02000 29038633 00422100 22a10420 . .)..3.B!.".. + 40105680 24102642 02c62f00 2178ff32 a03dc020 $.&B../.!x.2.=. + 40105690 00280222 c2be2020 74273302 062a0021 .(.".. t'3..*.! + 401056a0 5bfe2822 f8122174 ff380f27 83028625 [.("..!t.8.'...% + 401056b0 00281f77 e20b2030 64e68305 e7f20246 .(.w.. 0d......F + 401056c0 2100c16b ff416fff 0c053d0c 0cc2859c !..k.Ao...=..... + 401056d0 fcdd0216 12070cc4 3d0f0111 ecc00000 ........=....... + 401056e0 457c00dc 124168ff 31c1fe21 c1fe01a4 E|...Ah.1..!.... + 401056f0 eac00000 06ffff00 22020648 2d202034 ........"..H- 4 + 40105700 00321121 03f82024 10302220 292d380d .2.!.. $.0" )-8. + 40105710 215aff27 0315281d 77e20820 3064e683 !Z.'..(.w.. 0d.. + 40105720 02e77207 2020641c f327a305 4158ff86 ..r. d..'..AX.. + 40105730 03004d0d 0c932c02 4581fe66 12094154 ..M...,.E..f..AT + 40105740 ff3d0c2d 0d8578fc 580187e5 02c6b600 .=.-..x.X....... + 40105750 f12ffe21 50ff520f 05c02000 2802313e ./.!P.R... .(.1> + 40105760 ff414dff 214eff16 d524c020 004804c0 .AM.!N...$. .H.. + 40105770 20003803 4931c020 002802dc 14319bfe .8.I1. .(...1.. + 40105780 219cfe42 a4cf017e eac00000 06ffff00 !..B...~........ + 40105790 38312823 dc023195 fe2195fe 42a4d001 81(#..1..!..B... + 401057a0 78eac000 0006ffff 4831c020 002804e7 x.......H1. .(.. + 401057b0 f211318e fe218efe 42a4d101 71eac000 ..1..!..B...q... + 401057c0 0006ffff e82f162e 26c02000 280ee7f2 ...../..&. .(... + 401057d0 06e82e86 fcff0000 510dfe31 69f3c825 ........Q..1i..% + 401057e0 0c14f81c 4911cb2f 2921281f 302210c0 ....I../)!(.0".. + 401057f0 2000380c e7f30d58 11c82c1b d5d0d0f4 .8....X..,..... + 40105800 d91146fa ff311aff 16521121 00fe4124 ..F..1...R.!..A$ + 40105810 ff28c20c 05295122 0f090b22 2022a0f0 .(...)Q"..." ".. + 40105820 221122c2 3c0587fc dd02dc12 3811c02c ".".<.......8.., + 40105830 20c5aeff 21f6fd28 c205beff 465b003d ...!..(....F[.= + 40105840 0f42a03c 01b7ebc0 00003851 0c027813 .B.<......8Q..x. + 40105850 225d1882 cd321cb9 4851c020 00280432 "]...2..HQ. .(.2 + 40105860 2401202c b4202380 273702c6 2600321d $. ,. #.'7..&.2. + 40105870 18220f09 273302c6 23004207 0022c41f ."..'3..#.B..".. + 40105880 20207427 b90256a4 0741e0fd 5821a824 t'..V..A..X!.$ + 40105890 42c518c0 2000280a a81a2020 b42a2a27 B... .(... .**' + 401058a0 b4672807 1b33325d 182028b4 22580022 .g(..32]. (."X." + 401058b0 150b32c5 10225801 0c644b28 79719261 ..2.."X..dK(yq.a + 401058c0 09826108 0197ebc0 00002821 1cca4202 ..a.......(!..B. + 401058d0 01888140 301422c3 fd2c2320 3a932b23 ...@0."..,# :.+# + 401058e0 8044016b 33ab8840 23a30c43 82610801 .D.k3..@#..C.a.. + 401058f0 f7fec000 00382120 20f42a33 98918881 .....8! .*3.... + 40105900 78713921 4b7786d3 ff003221 01c02c20 xq9!Kw....2!.., + 40105910 c5a0ff21 befd2222 0c05b0ff 06120000 ...!..""........ + 40105920 00220f0c 20203456 a21d41e6 fe0c0522 .".. 4V..A...." + 40105930 a0804576 fcdd0216 b21d42a0 803d0f2d ..Ev......B..=.- + 40105940 0d0177eb c000000c 12380f41 cbfe225d ..w......8.A.."] + 40105950 3e3020b5 47030428 1f2028f4 225d3f32 >0 .G..(. (."]?2 + 40105960 2101c02c 20859bff c55300dc 1241cdfe !.., ....S...A.. + 40105970 311ffe21 1ffe0102 eac00000 06ffff00 1..!............ + 40105980 22020648 2d202034 00321121 61f72024 "..H- 4.2.!a. $ + 40105990 10302220 292d4d0d 0c932c02 055bfe66 .0" )-M...,..[.f + 401059a0 120a41c1 fe31b2fe 2d0d4552 fc583157 ..A..1..-.ER.X1W + 401059b0 1e79e82e 8683ff00 c02000c8 04c02000 .y....... .... . + 401059c0 3803c020 00280232 6102563c 013107fe 8.. .(.2a.V<.1.. + 401059d0 2108fe42 a4f101ea e9c00000 06ffff00 !..B............ + 401059e0 00282cdc 123101fe 2102fe42 a4f201e4 .(,..1..!..B.... + 401059f0 e9c00000 06ffff00 482f4911 d8110c13 ........H/I..... + 40105a00 9c5dc020 00580d28 2de77502 0653001b .]. .X.(-.u..S.. + 40105a10 33dd0230 307486f9 fff62302 06dd00c0 3..00t....#..... + 40105a20 2000280c e772042d 0c458fff 21a3fe58 .(..r.-.E..!..X + 40105a30 01278502 46250037 f502c623 00322104 .'..F%.7...#.2!. + 40105a40 302c34b6 82152692 1231e8fd 21e9fd42 0,4...&..1..!..B + 40105a50 a44701cb e9c00000 06ffff00 2198fe48 .G..........!..H + 40105a60 41c02000 280240cc 35d2a07f 87720220 A. .(.@.5....r. + 40105a70 d075c02c 2045fefe 262c2bf6 3c1116ac .u., E..&,+.<... + 40105a80 01661c34 58415020 75c5f4fe 460f0000 .f.4XAP u...F... + 40105a90 264c1966 5c2205d9 fe060c00 2d0dc56b &L.f\"......-..k + 40105aa0 fe060a00 00000005 f1fec607 00384130 .............8A0 + 40105ab0 207545dc fe060500 0031ccfd 21cdfd42 uE......1..!..B + 40105ac0 a46901af e9c00000 06ffff00 00422100 .i...........B!. + 40105ad0 d77402c5 83fe5221 0047750b 2179fe01 .t....R!.Gu.!y.. + 40105ae0 a8e9c000 0045e7fe 38612157 fe022113 .....E..8a!W..!. + 40105af0 c22112d2 2111e221 10f8f1c0 20003902 .!..!..!.... .9. + 40105b00 12c1500d f04170fe 52a00022 a03c8558 ..P..Ap.R..".<.X + 40105b10 fc20d220 cc823811 2d0c4580 ff06a3ff . . ..8.-.E..... + 40105b20 3cc43d0f 2d0d01fe eac00000 0c12380f <.=.-.........8. + 40105b30 4152fe22 5d183020 b5470304 281f2028 AR."].0 .G..(. ( + 40105b40 f4225d19 221f110c 64225d1a 32cf1c22 ."]."...d"].2.." + 40105b50 cd3601f3 eac00000 c680ff00 226101b6 .6.........."a.. + 40105b60 23020678 00222f02 3186f252 22012815 #..x."/.1..R".(. + 40105b70 59813022 10293105 3300ed02 58815622 Y.0".)1.3...X.V" + 40105b80 01319afd 219bfd42 a17e017d e9c00000 .1..!..B.~.}.... + 40105b90 06ffff00 22020668 25202034 00321121 ...."..h% 4.2.! + 40105ba0 dcf672af a7202610 30222029 25220500 ..r.. &.0" )%".. + 40105bb0 32150680 22012028 31615bf6 77223921 2...". (1a[.w"9! + 40105bc0 3bfe2202 00661230 39715261 080596fd ;."..f.09qRa.... + 40105bd0 00621172 a12b2020 f47a7270 70f482a2 .b.r.+ .zrpp... + 40105be0 56606031 38715881 77380d61 beea7216 V``18qX.w8.a..r. + 40105bf0 007a6200 66116060 3148310c 070c1277 .zb.f.``1H1....w + 40105c00 1402c63c 00880521 75ea2708 6a307034 ...<...!u.'.j0p4 + 40105c10 26473426 874d56a7 0c52a0f0 50331026 &G4&.MV..R..P3.& + 40105c20 e3028631 0031bcf5 30281037 92028621 ...1.1..0(.7...! + 40105c30 00211ffe 315fe920 28103a22 0c140c03 .!..1_. (.:".... + 40105c40 2043832d 04c61e00 22a0f020 331052a0 C.-....".. 3.R. + 40105c50 a00c0750 93c02d07 0c159077 83902593 ...P..-....w..%. + 40105c60 46250000 50252062 61070567 0072a000 F%..P% ba..g.r.. + 40105c70 2d076871 46200000 2164f927 084d3050 -.hqF ..!d.'.M0P + 40105c80 349c050c 072d0782 c5f80c13 80778380 4....-.......w.. + 40105c90 2393c618 00302074 26e21c32 a0802733 #....0 t&..2..'3 + 40105ca0 0626d247 46130000 32a0d037 123d32a0 .&.GF...2..7.=2. + 40105cb0 e0379240 060d0000 c02dc00c 030c1520 .7.@.....-..... + 40105cc0 53832d05 2020740c 17060b00 2158ea0c S.-. t.....!X.. + 40105cd0 0722d201 2202de0c 130b2220 37833020 .".."....." 7.0 + 40105ce0 74060500 0c070c12 46030000 0c170c02 t.......F....... + 40105cf0 46010000 000c172d 0751c4fc 82150032 F......-.Q.....2 + 40105d00 15013a38 e623040c 14702483 31eafd32 ..:8.#...p$.1..2 + 40105d10 03002613 2e07e22b c0200028 0d202cb4 ..&....+. .(. ,. + 40105d20 dc023132 fd2132fd 42a26201 15e9c000 ..12.!2.B.b..... + 40105d30 0006ffff 22a00862 61078532 fe205220 ...."..ba..2. R + 40105d40 6871cc82 0c132d0d 455dff46 0e002892 hq....-.E].F..(. + 40105d50 4821e922 4912282f 0c132915 2812d925 H!."I.(/..).(..% + 40105d60 29453255 06c02000 380d219b f1202310 )E2U.. .8.!.. #. + 40105d70 c0200029 0d62550c 0c123d0d 5981052a . .).bU...=.Y..* + 40105d80 ff58812d 05c5cbfe d79c0246 27ffe811 .X.-.......F'... + 40105d90 061aff00 e911c672 ff000000 0400f23f .......r.......? + 40105da0 31ffff21 1cf9c020 00480320 2410c020 1..!... .H. $.. + 40105db0 00290321 c0fd0c13 3242000d f0000000 .).!....2B...... + 40105dc0 1888fe3f 38cdfe3f 31ffff20 20743022 ...?8..?1.. t0" + 40105dd0 b0220205 31fbff30 22902212 000df000 ."..1..0"."..... + 40105de0 3030f420 70744040 f4d05311 f687450c 00. pt@@..S...E. + 40105df0 a632a0c0 b6570232 a0606a64 3020f460 .2...W.2.`jd0 .` + 40105e00 60f45050 f4b68705 52c51650 50f431ed `.PP....R..PP.1. + 40105e10 ff3037b0 38033035 825152f9 5a333032 .07.8.05.QR.Z302 + 40105e20 d5b68707 3b3342af fc403310 6a223a22 ....;3B..@3.j":" + 40105e30 2020f40d f00cf21c 061c4377 b2bb62c4 ........Cw..b. + 40105e40 106060f4 5050f42c 42c6eeff 31deff20 .``.PP.,B...1.. + 40105e50 20743022 b0520205 f6850e0c a422a0c0 t0".R.......".. + 40105e60 b6551122 a060c602 00000cf6 1c042c42 .U.".`........,B + 40105e70 5736011c 422a4462 a100b685 0262a116 W6..B*Db.....b.. + 40105e80 3035b028 033137f9 2026823a 323022d5 05.(.17. &.:20". + 40105e90 b685063b 327cc220 23102a24 2020f40d ...;2|. #.*$ .. + 40105ea0 f0000000 78cefe3f 21ffff22 22130df0 ....x..?!..""... + 40105eb0 0000807f f0331130 31419c33 a0f340a2 .....3.01A.3..@. + 40105ec0 caf8001a 400033a1 0c19a099 c0061d00 ....@.3......... + 40105ed0 00f04211 40414170 2f051022 01602220 ..B.@AAp/..".`" + 40105ee0 cc4441a2 e9402220 0df00000 f0221120 .DA..@" .....". + 40105ef0 21419c22 a0f240a2 caf8001a 400022a1 !A."..@.....@.". + 40105f00 0c18a088 c0c60f00 702f0510 22010df0 ........p/.."... + 40105f10 307f0510 77017022 3067c305 4194e940 0...w.p"0g..A..@ + 40105f20 22200df0 70831116 d8fd2d03 0df00000 " ..p.....-..... + 40105f30 61e0ff30 72306742 d66743e7 20877530 a..0r0gB.gC. .u0 + 40105f40 977516e9 f61638fa 9088c0a1 c2e96022 .u....8.......`" + 40105f50 20a02210 603320a0 33102733 04f02211 .".`3 .3.'3..". + 40105f60 0b883022 c0f02211 0c1a92a0 17f0aa11 ..0".."......... + 40105f70 3732041b aa3022c0 f022110b 9956c9fe 72...0".."...V.. + 40105f80 82c87e42 a0fe47b8 17373204 1baa3712 ..~B..G..72...7. + 40105f90 1a908801 8a2a707f 05107701 7022200d .....*p...w.p" . + 40105fa0 f0960801 1b849028 0146faff a0a141f0 .......(.F....A. + 40105fb0 aa11c6f6 ff808060 000840f6 c822006a .......`..@..".j + 40105fc0 a1a0a091 0c088c32 0c199066 20d606fc .......2...f ... + 40105fd0 1baaf066 115686fb a0a141f0 aa11c6eb ...f.V....A..... + 40105fe0 ff702f05 1022010d f0000000 61b1ff67 .p/.."......a..g + 40105ff0 42222047 7542c482 e6c420a6 14296072 B" GuB.... ..)`r + 40106000 20805711 00144050 50915020 607025b3 .W...@PP.P `p%. + 40106010 0df00000 00704211 8c040c02 8046110b .....pB......F.. + 40106020 542045b3 2d040df0 0c020df0 0c020df0 T E.-........... + 40106030 3032800c 0472af8c 37122652 020062a0 02...r..7.&R..b. + 40106040 08504430 40800440 51415040 748c4870 .PD0@..@QAP@t.Hp + 40106050 44304040 740b6660 60745666 fe1b2246 D0@@t.f``tVf.."F + 40106060 f5ff2d04 0df00000 0c020df0 7cf55902 ..-.........|.Y. + 40106070 0c055912 59223932 49420df0 0df00000 ..Y.Y"92IB...... + 40106080 0df00000 3030744a 42c60100 52020037 ....00tJB...R..7 + 40106090 15061b22 4792f40c 020df000 20e3130d ..."G....... ... + 401060a0 f0000000 66b30246 56001c05 37356666 ....f..FV...75ff + 401060b0 83028636 000c8537 352e6633 02c65a00 ...6...75.f3..Z. + 401060c0 f6431066 1302c661 00662302 065c0046 .C.f...a.f#..\.F + 401060d0 66000000 66630246 5900b673 02c65200 f...fc.FY..s..R. + 401060e0 66530286 5a008660 0066a302 4622000c fS..Z..`.f..F".. + 401060f0 c4373410 66930246 3d000ca4 37b40246 .74.f..F=...7..F + 40106100 4000862e 000ce447 93028632 0037b402 @......G...2.7.. + 40106110 06410046 24001c85 57930246 39003735 .A.F$...W..F9.75 + 40106120 1a1c4447 9302861f 00373404 1c240605 ..DG.....74..$.. + 40106130 001c6447 13423734 28c61400 1cc55713 ..dG.B74(.....W. + 40106140 6637350d 1ca44793 02c62200 37347046 f75...G...".74pF + 40106150 27001ce5 57132157 33351cf5 57130246 '...W.!W35..W..F + 40106160 420042c2 de404074 52a0dc0c 0347b502 B.B..@@tR....G.. + 40106170 06410042 c2df463a 0042c2e2 40407452 .A.B..F:.B..@@tR + 40106180 a0e00c03 47b50246 3b0042c2 e3863400 ....G..F;.B...4. + 40106190 42c2e540 407452a0 e30c0347 b5028635 B..@@tR....G...5 + 401061a0 0042c2e6 c62e0000 42c2ea40 407452a0 .B......B..@@tR. + 401061b0 e80c0347 b502862f 0042c2eb c6280000 ...G.../.B...(.. + 401061c0 42c2ef40 407452a0 ed0c0347 b5028629 B..@@tR....G...) + 401061d0 0042c2f0 c6220000 42c2f240 407452a0 .B..."..B..@@tR. + 401061e0 f00c0347 b5028623 0042c2f3 c61c0000 ...G...#.B...... + 401061f0 42c2f440 407452a0 f20c0347 357942c2 B..@@tR....G5yB. + 40106200 f5861700 42c2f740 407452a0 f50c0347 ....B..@@tR....G + 40106210 356542c2 f8861200 42c2f640 407452a0 5eB.....B..@@tR. + 40106220 f40c0347 355142c2 f7860d00 42c2f140 ...G5QB.....B..@ + 40106230 407452a0 ef0c0347 353d42c2 f2860800 @tR....G5=B..... + 40106240 32c2f430 307442a0 f237b4b1 0c038609 2..00tB..7...... + 40106250 0042c2f5 40407452 a0f332a0 00473517 .B..@@tR..2..G5. + 40106260 42c2f640 41214044 90404074 2c023d04 B..@A!@D.@@t,.=. + 40106270 47b2012c 03303074 2d030df0 52030016 G..,.00t-...R... + 40106280 52053852 07e35042 020232a0 7f804401 R.8R..PB..2...D. + 40106290 40683137 16128045 01404831 4a464041 @h17...E.@H1JF@A + 401062a0 74524202 5d040601 00524202 0c043202 tRB.]....RB...2. + 401062b0 0362a07f 80330130 78316717 17804401 .b...3.0x1g...D. + 401062c0 40483170 37904a33 3b433034 a3303221 @H1p7.J3;C04.02! + 401062d0 3242030d f0524203 0df00000 0df00000 2B...RB......... + 401062e0 7d022021 60303160 b6233050 f24040f3 }. !`01`.#0P.@@. + 401062f0 4047b517 5044c000 14400033 a1373202 @G..PD...@.3.72. + 40106300 3022c030 314142c4 ff5604ff 37320230 0".01AB..V..72.0 + 40106310 22c0d627 00202060 0df00000 cc530000 "..'. `.....S.. + 40106320 00444956 300c020d f0 .DIV0.... +Contents of section .xtensa.info: + 0000 0c000000 20000000 01000000 5874656e .... .......Xten + 0010 73615f49 6e666f00 5553455f 4142534f sa_Info.USE_ABSO + 0020 4c555445 5f4c4954 4552414c 533d300a LUTE_LITERALS=0. + 0030 4142493d 310a0000 ABI=1... +Contents of section .comment: + 0000 4743433a 20286372 6f737374 6f6f6c2d GCC: (crosstool- + 0010 4e472063 726f7373 746f6f6c 2d6e672d NG crosstool-ng- + 0020 312e3232 2e302d31 30302d67 65353637 1.22.0-100-ge567 + 0030 65633729 20352e32 2e300047 43433a20 ec7) 5.2.0.GCC: + 0040 2863726f 7373746f 6f6c2d4e 47206573 (crosstool-NG es + 0050 702d3230 32307233 2d34392d 67643535 p-2020r3-49-gd55 + 0060 32346331 2920382e 342e3000 4743433a 24c1) 8.4.0.GCC: + 0070 20286372 6f737374 6f6f6c2d 4e472063 (crosstool-NG c + 0080 726f7373 746f6f6c 2d6e672d 312e3232 rosstool-ng-1.22 + 0090 2e302d36 302d6733 37623037 66362920 .0-60-g37b07f6) + 00a0 342e382e 35002358 74656e73 6120436f 4.8.5.#Xtensa Co + 00b0 6d70696c 65722056 65727369 6f6e2031 mpiler Version 1 + 00c0 312e302e 32203a20 20706879 2e632063 1.0.2 : phy.c c + 00d0 6f6d7069 6c656420 77697468 203a202d ompiled with : - + 00e0 4f32202d 67330023 5874656e 73612043 O2 -g3.#Xtensa C + 00f0 6f6d7069 6c657220 56657273 696f6e20 ompiler Version + 0100 31312e30 2e32203a 20207068 795f6368 11.0.2 : phy_ch + 0110 69705f76 365f616e 612e6320 636f6d70 ip_v6_ana.c comp + 0120 696c6564 20776974 68203a20 2d4f3220 iled with : -O2 + 0130 2d673300 23587465 6e736120 436f6d70 -g3.#Xtensa Comp + 0140 696c6572 20566572 73696f6e 2031312e iler Version 11. + 0150 302e3220 3a202070 68795f63 6869705f 0.2 : phy_chip_ + 0160 76362e63 20636f6d 70696c65 64207769 v6.c compiled wi + 0170 7468203a 202d4f32 202d6733 00235874 th : -O2 -g3.#Xt + 0180 656e7361 20436f6d 70696c65 72205665 ensa Compiler Ve + 0190 7273696f 6e203131 2e302e32 203a2020 rsion 11.0.2 : + 01a0 7068795f 63686970 5f76365f 63616c2e phy_chip_v6_cal. + 01b0 6320636f 6d70696c 65642077 69746820 c compiled with + 01c0 3a202d4f 32202d67 33002358 74656e73 : -O2 -g3.#Xtens + 01d0 6120436f 6d70696c 65722056 65727369 a Compiler Versi + 01e0 6f6e2031 312e302e 32203a20 20706879 on 11.0.2 : phy + 01f0 5f636869 705f7636 5f756e75 7365642e _chip_v6_unused. + 0200 6320636f 6d70696c 65642077 69746820 c compiled with + 0210 3a202d4f 32202d67 33002358 74656e73 : -O2 -g3.#Xtens + 0220 6120436f 6d70696c 65722056 65727369 a Compiler Versi + 0230 6f6e2031 312e302e 32203a20 20706879 on 11.0.2 : phy + 0240 5f736c65 65702e63 20636f6d 70696c65 _sleep.c compile + 0250 64207769 7468203a 202d4f32 202d6733 d with : -O2 -g3 + 0260 00235874 656e7361 20436f6d 70696c65 .#Xtensa Compile + 0270 72205665 7273696f 6e203131 2e302e32 r Version 11.0.2 + 0280 203a2020 7274635f 636c6f63 6b2e6320 : rtc_clock.c + 0290 636f6d70 696c6564 20776974 68203a20 compiled with : + 02a0 2d4f3220 2d673300 -O2 -g3. +Contents of section .debug_frame: + 0000 0c000000 ffffffff 0300017c 000c0100 ...........|.... + 0010 24000000 00000000 60522140 5e000000 $.......`R!@^... + 0020 04030000 000e1004 03000000 8c020406 ................ + 0030 00000080 01000000 28000000 00000000 ........(....... + 0040 ec522140 37010000 04030000 000e3004 .R!@7.........0. + 0050 02000000 8c02040b 00000080 018d038e ................ + 0060 048f0500 1c000000 00000000 30542140 ............0T!@ + 0070 4e000000 04030000 000e1004 04000000 N............... + 0080 80018c02 0c000000 ffffffff 0300017c ...............| + 0090 000c0100 1c000000 84000000 88542140 .............T!@ + 00a0 27000000 04090000 000e1004 06000000 '............... + 00b0 80010000 0c000000 ffffffff 0300017c ...............| + 00c0 000c0100 28000000 b4000000 882b1040 ....(........+.@ + 00d0 35000000 04030000 000e1004 02000000 5............... + 00e0 8c020405 0000008d 03040600 00008001 ................ + 00f0 24000000 b4000000 c02b1040 2b000000 $........+.@+... + 0100 04030000 000e1004 02000000 8c020407 ................ + 0110 00000080 01000000 24000000 b4000000 ........$....... + 0120 ec2b1040 26000000 04030000 000e1004 .+.@&........... + 0130 03000000 8c020409 00000080 01000000 ................ + 0140 24000000 b4000000 142c1040 26000000 $........,.@&... + 0150 04030000 000e1004 03000000 8c020409 ................ + 0160 00000080 01000000 0c000000 b4000000 ................ + 0170 482c1040 17000000 0c000000 b4000000 H,.@............ + 0180 642c1040 29000000 28000000 b4000000 d,.@)...(....... + 0190 00000000 00000000 04000000 000e1004 ................ + 01a0 00000000 8c028d03 04000000 0080018e ................ + 01b0 04000000 28000000 b4000000 00000000 ....(........... + 01c0 00000000 04000000 000e1004 00000000 ................ + 01d0 8e040400 0000008c 028d0380 01000000 ................ + 01e0 1c000000 b4000000 902c1040 18000000 .........,.@.... + 01f0 04060000 000e1004 04000000 80010000 ................ + 0200 1c000000 b4000000 a82c1040 18000000 .........,.@.... + 0210 04060000 000e1004 04000000 80010000 ................ + 0220 1c000000 b4000000 c42c1040 21000000 .........,.@!... + 0230 04030000 000e1004 06000000 80010000 ................ + 0240 24000000 b4000000 00000000 00000000 $............... + 0250 04000000 000e1004 00000000 8d030400 ................ + 0260 0000008c 02800100 24000000 b4000000 ........$....... + 0270 00000000 00000000 04000000 000e1004 ................ + 0280 00000000 8c020400 00000080 01000000 ................ + 0290 1c000000 b4000000 00000000 00000000 ................ + 02a0 04000000 000e1004 00000000 80010000 ................ + 02b0 1c000000 b4000000 e82c1040 20000000 .........,.@ ... + 02c0 04030000 000e1004 04000000 8c028001 ................ + 02d0 1c000000 b4000000 00000000 00000000 ................ + 02e0 04000000 000e3004 00000000 80010000 ......0......... + 02f0 1c000000 b4000000 00000000 00000000 ................ + 0300 04000000 000e3004 00000000 80010000 ......0......... + 0310 24000000 b4000000 00000000 00000000 $............... + 0320 04000000 000e8001 04000000 008c0204 ................ + 0330 00000000 80010000 1c000000 b4000000 ................ + 0340 082d1040 21000000 04030000 000e1004 .-.@!........... + 0350 02000000 80010000 1c000000 b4000000 ................ + 0360 00000000 00000000 04000000 000e1004 ................ + 0370 00000000 80010000 1c000000 b4000000 ................ + 0380 00000000 00000000 04000000 000e1004 ................ + 0390 00000000 80010000 1c000000 b4000000 ................ + 03a0 00000000 00000000 04000000 000e1004 ................ + 03b0 00000000 80010000 1c000000 b4000000 ................ + 03c0 00000000 00000000 04000000 000e1004 ................ + 03d0 00000000 80010000 0c000000 b4000000 ................ + 03e0 302d1040 21000000 1c000000 b4000000 0-.@!........... + 03f0 5c2d1040 ad000000 04030000 000e1004 \-.@............ + 0400 04000000 80018c02 1c000000 b4000000 ................ + 0410 0c2e1040 1f000000 04060000 000e1004 ...@............ + 0420 04000000 80010000 0c000000 b4000000 ................ + 0430 2c2e1040 11000000 24000000 b4000000 ,..@....$....... + 0440 402e1040 33000000 04030000 000e1004 @..@3........... + 0450 02000000 8d030407 0000008c 02800100 ................ + 0460 28000000 b4000000 742e1040 a4000000 (.......t..@.... + 0470 04030000 000e3004 05000000 8e04040b ......0......... + 0480 0000008c 028d038f 05800100 1c000000 ................ + 0490 b4000000 00000000 00000000 04000000 ................ + 04a0 000e3004 00000000 80010000 1c000000 ..0............. + 04b0 b4000000 00000000 00000000 04000000 ................ + 04c0 000e3004 00000000 80010000 24000000 ..0.........$... + 04d0 b4000000 00000000 00000000 04000000 ................ + 04e0 000e8001 04000000 008c0204 00000000 ................ + 04f0 80010000 0c000000 ffffffff 0300017c ...............| + 0500 000c0100 0c000000 f4040000 80601040 .............`.@ + 0510 02000000 1c000000 f4040000 182f1040 ............./.@ + 0520 15000000 04030000 000e1004 05000000 ................ + 0530 80010000 1c000000 f4040000 302f1040 ............0/.@ + 0540 33000000 04030000 000e1004 02000000 3............... + 0550 80010000 1c000000 f4040000 642f1040 ............d/.@ + 0560 33000000 04030000 000e1004 02000000 3............... + 0570 80010000 24000000 f4040000 a42f1040 ....$......../.@ + 0580 73000000 04030000 000e1004 02000000 s............... + 0590 8c02040a 00000080 01000000 1c000000 ................ + 05a0 f4040000 1c301040 1b000000 04080000 .....0.@........ + 05b0 000e1004 06000000 80010000 1c000000 ................ + 05c0 f4040000 38301040 1b000000 04080000 ....80.@........ + 05d0 000e1004 06000000 80010000 1c000000 ................ + 05e0 f4040000 74301040 a3000000 04100000 ....t0.@........ + 05f0 000e1004 05000000 80010000 0c000000 ................ + 0600 f4040000 1c311040 05000000 0c000000 .....1.@........ + 0610 ffffffff 0300017c 000c0100 0c000000 .......|........ + 0620 0c060000 84601040 17000000 .....`.@.... +Contents of section .debug_info: + 0000 9c0f0000 04000000 00000401 97040000 ................ + 0010 0c860500 004a0600 00680000 00000000 .....J...h...... + 0020 00000000 00029d0d 0000021c 1d360000 .............6.. + 0030 00032500 00000401 08d50600 00040106 ..%............. + 0040 d7060000 0402079b 07000004 02058d04 ................ + 0050 00000204 0e000002 221d5e00 00000404 ........".^..... + 0060 07bd0100 00050405 696e7400 0408055a ........int....Z + 0070 03000004 0807b301 00000404 048d0100 ................ + 0080 00040804 14040000 027d0000 00032d0e .........}....-. + 0090 94000000 069f0000 00079f00 00000008 ................ + 00a0 0409b300 00001403 2f10f000 00000a82 ......../....... + 00b0 01000003 301bf000 0000000a 12000000 ....0........... + 00c0 03311b52 00000004 0a400200 0003321b .1.R.....@....2. + 00d0 52000000 080ae401 00000333 1bf60000 R..........3.... + 00e0 000c0a04 03000003 341b9f00 00001000 ........4....... + 00f0 0b04a100 00000b04 88000000 02580700 .............X.. + 0100 00033503 a1000000 0408040f 04000002 ..5............. + 0110 1f000000 040b0d65 00000002 db000000 .......e........ + 0120 040c110f 01000004 04055f03 000002bd .........._..... + 0130 07000005 2c0e2701 0000020e 01000005 ....,.'......... + 0140 720e2701 00000c43 06000006 6501175e r.'....C....e..^ + 0150 0000000d 0405a603 75010000 0e0e0300 ........u....... + 0160 0005a80c 46010000 0ea60500 0005a913 ....F........... + 0170 75010000 000f3600 00008501 0000105e u.....6........^ + 0180 00000003 00110805 a309a901 00000a7a ...............z + 0190 01000005 a5076500 0000000a 88020000 ......e......... + 01a0 05aa0553 01000004 0002c403 000005ab ...S............ + 01b0 03850100 0002f102 000005af 1b1b0100 ................ + 01c0 00040407 b8010000 0b04ce01 00000401 ................ + 01d0 08de0600 0003ce01 00000287 03000007 ................ + 01e0 1619c101 0000092e 01000018 072f0840 ............./.@ + 01f0 0200000a 25080000 07311340 02000000 ....%....1.@.... + 0200 125f6b00 07320765 00000004 0aed0500 ._k..2.e........ + 0210 0007320b 65000000 080aa005 00000732 ..2.e..........2 + 0220 14650000 000c0adf 01000007 321b6500 .e..........2.e. + 0230 00001012 5f780007 330b4602 00001400 ...._x..3.F..... + 0240 0b04e601 00000fda 01000056 02000010 ...........V.... + 0250 5e000000 00000916 06000024 073708d9 ^..........$.7.. + 0260 0200000a 5a020000 07390965 00000000 ....Z....9.e.... + 0270 0a930100 00073a09 65000000 040a5f01 ......:.e....._. + 0280 0000073b 09650000 00080ace 02000007 ...;.e.......... + 0290 3c096500 00000c0a 06040000 073d0965 <.e..........=.e + 02a0 00000010 0ac00500 00073e09 65000000 ..........>.e... + 02b0 140a3601 0000073f 09650000 00180a63 ..6....?.e.....c + 02c0 02000007 40096500 00001c0a eb030000 ....@.e......... + 02d0 07410965 00000020 00132f00 00000801 .A.e... ../..... + 02e0 074a081e 0300000a 81070000 074b0a1e .J...........K.. + 02f0 03000000 0aa20600 00074c09 1e030000 ..........L..... + 0300 8014ae07 0000074e 0ada0100 00000114 .......N........ + 0310 fc070000 07510ada 01000004 01000f9f .....Q.......... + 0320 0000002e 03000010 5e000000 1f000972 ........^......r + 0330 0400008c 07550870 0300000a 25080000 .....U.p....%... + 0340 07561270 03000000 0a720200 00075706 .V.p.....r....W. + 0350 65000000 040a2101 00000758 09760300 e.....!....X.v.. + 0360 00080a1a 03000007 59208d03 00008800 ........Y ...... + 0370 0b042e03 00000f86 03000086 03000010 ................ + 0380 5e000000 1f000b04 8c030000 150b04d9 ^............... + 0390 02000009 1c070000 08077508 bb030000 ..........u..... + 03a0 0a680300 00077611 bb030000 000ab707 .h....v......... + 03b0 00000777 06650000 0004000b 04360000 ...w.e.......6.. + 03c0 00093e03 00002007 99083404 0000125f ..>... ...4...._ + 03d0 7000079a 12bb0300 0000125f 7200079b p.........._r... + 03e0 07650000 0004125f 7700079c 07650000 .e....._w....e.. + 03f0 00080a8a 00000007 9d094b00 00000c0a ..........K..... + 0400 ac030000 079e094b 0000000e 125f6266 .......K....._bf + 0410 00079f11 93030000 100a0807 000007a0 ................ + 0420 07650000 00180ae5 0d000007 a2129805 .e.............. + 0430 00001c00 03c10300 0016cf05 0000f007 ................ + 0440 74010898 05000017 91000000 07780107 t............x.. + 0450 65000000 00174b08 0000077d 010bd907 e.....K....}.... + 0460 00000417 d3000000 077d0114 d9070000 .........}...... + 0470 0817ec07 0000077d 011ed907 00000c17 .......}........ + 0480 6d020000 077f0108 65000000 10172a02 m.......e.....*. + 0490 00000781 0109c801 00001417 33030000 ............3... + 04a0 07830107 65000000 1817ca07 00000785 ....e........... + 04b0 01076500 00001c17 6c070000 07860116 ..e.....l....... + 04c0 41090000 20185f6d 70000788 01124709 A... ._mp.....G. + 04d0 00002417 ba030000 078a010a 58090000 ..$.........X... + 04e0 28174b03 0000078c 01076500 00002c17 (.K.......e...,. + 04f0 e5050000 078f0107 65000000 3017cd06 ........e...0... + 0500 00000790 0109c801 00003417 63000000 ..........4.c... + 0510 07920113 5e090000 3817d605 00000793 ....^...8....... + 0520 01106409 00003c17 ca010000 07940109 ..d...<......... + 0530 c8010000 4017d802 00000797 010b7509 ....@.........u. + 0540 00004417 72040000 079b0113 70030000 ..D.r.......p... + 0550 48171b04 0000079c 01122e03 00004c17 H.............L. + 0560 29070000 079f0110 9a070000 d8179c01 )............... + 0570 000007a0 010bd907 0000e417 00000000 ................ + 0580 07a10117 81090000 e8176800 000007a2 ..........h..... + 0590 0109c801 0000ec00 0b043904 000009d7 ..........9..... + 05a0 01000068 07b508e1 06000012 5f700007 ...h........_p.. + 05b0 b612bb03 00000012 5f720007 b7076500 ........_r....e. + 05c0 00000412 5f770007 b8076500 0000080a ...._w....e..... + 05d0 8a000000 07b9094b 0000000c 0aac0300 .......K........ + 05e0 0007ba09 4b000000 0e125f62 660007bb ....K....._bf... + 05f0 11930300 00100a08 07000007 bc076500 ..............e. + 0600 0000180a e50d0000 07bf1298 0500001c ................ + 0610 0a260100 0007c30a 9f000000 200afa00 .&.......... ... + 0620 000007c5 1dff0600 00240a3d 00000007 .........$.=.... + 0630 c71d2907 0000280a 36080000 07ca0d4d ..)...(.6......M + 0640 0700002c 0a2c0300 0007cb09 67070000 ...,.,......g... + 0650 30125f75 620007ce 11930300 0034125f 0._ub........4._ + 0660 75700007 cf12bb03 00003c12 5f757200 up........<._ur. + 0670 07d00765 00000040 0a3c0800 0007d311 ...e...@.<...... + 0680 6d070000 440ac407 000007d4 117d0700 m...D........}.. + 0690 0047125f 6c620007 d7119303 0000480a .G._lb........H. + 06a0 06060000 07da0765 00000050 0afe0100 .......e...P.... + 06b0 0007db0a 2e010000 540a1b06 000007e2 ........T....... + 06c0 0cb50100 00580a7a 04000007 e40ea901 .....X.z........ + 06d0 00005c0a f4070000 07e50965 00000064 ..\........e...d + 06e0 00196500 0000ff06 00000798 05000007 ..e............. + 06f0 9f000000 07c80100 00076500 0000000b ..........e..... + 0700 04e10600 00196500 00002307 00000798 ......e...#..... + 0710 05000007 9f000000 07230700 00076500 .........#....e. + 0720 0000000b 04d50100 000b0405 07000019 ................ + 0730 3a010000 4d070000 07980500 00079f00 :...M........... + 0740 0000073a 01000007 65000000 000b042f ...:....e....../ + 0750 07000019 65000000 67070000 07980500 ....e...g....... + 0760 00079f00 0000000b 04530700 000f3600 .........S....6. + 0770 00007d07 0000105e 00000002 000f3600 ..}....^......6. + 0780 00008d07 0000105e 00000000 000c5801 .......^......X. + 0790 0000071f 011a9e05 00001623 0700000c ...........#.... + 07a0 07230108 d3070000 17250800 00072501 .#.......%....%. + 07b0 11d30700 0000173c 06000007 26010765 .......<....&..e + 07c0 00000004 17140300 00072701 0bd90700 ..........'..... + 07d0 0008000b 049a0700 000b048d 07000016 ................ + 07e0 a1010000 18073f01 08260800 00171a08 ......?..&...... + 07f0 00000740 01122608 00000017 78030000 ...@..&.....x... + 0800 07410112 26080000 06171107 00000742 .A..&..........B + 0810 01124400 00000c17 20080000 07450124 ..D..... ....E.$ + 0820 73000000 10000f44 00000036 08000010 s......D...6.... + 0830 5e000000 020016e4 03000010 07580108 ^............X.. + 0840 7d080000 17400100 00075b01 13400200 }....@....[..@.. + 0850 000017a9 01000007 5c010765 00000004 ........\..e.... + 0860 17900200 00075d01 13400200 0008176e ......]..@.....n + 0870 03000007 5e01147d 0800000c 000b0440 ....^..}.......@ + 0880 02000016 ca050000 50076201 082c0900 ........P.b..,.. + 0890 00173d07 00000765 0109c801 00000017 ..=....e........ + 08a0 a6020000 0766010e a9010000 04174400 .....f........D. + 08b0 00000767 010ea901 00000c17 4a070000 ...g........J... + 08c0 0768010e a9010000 1417f505 00000769 .h.............i + 08d0 01082c09 00001c17 fb060000 076a0107 ..,..........j.. + 08e0 65000000 24170001 0000076b 010ea901 e...$......k.... + 08f0 00002817 e2020000 076c010e a9010000 ..(......l...... + 0900 30177702 0000076d 010ea901 00003817 0.w....m......8. + 0910 9d030000 076e010e a9010000 40179502 .....n......@... + 0920 0000076f 010ea901 00004800 0fce0100 ...o......H..... + 0930 003c0900 00105e00 00000700 1a2b0800 .<....^......+.. + 0940 000b043c 0900000b 04360800 00065809 ...<.....6....X. + 0950 00000798 05000000 0b044d09 00000b04 ..........M..... + 0960 df070000 0b045602 00000675 09000007 ......V....u.... + 0970 65000000 000b047b 0900000b 046a0900 e......{.....j.. + 0980 000b0483 0800001b 42080000 07a50122 ........B......" + 0990 34040000 1bca0000 0007a601 22340400 4..........."4.. + 09a0 001be307 000007a7 01223404 00001bad ........."4..... + 09b0 05000007 0a031898 0500001c a9000000 ................ + 09c0 07045e00 00000827 06da0900 001d9205 ..^....'........ + 09d0 0000001d 99050000 01001cbe 00000007 ................ + 09e0 045e0000 00083006 440a0000 1e433100 .^....0.D....C1. + 09f0 001e4332 00011e43 3300021e 43340003 ..C2...C3...C4.. + 0a00 1e433500 041e4336 00051e43 3700061e .C5...C6...C7... + 0a10 43380007 1e433900 081e4331 3000091e C8...C9...C10... + 0a20 43313100 0a1e4331 32000b1e 43313300 C11...C12...C13. + 0a30 0c1e4331 34000d1e 43313500 0e1e4331 ..C14...C15...C1 + 0a40 36000f00 09210600 00200910 0cba0a00 6....!... ...... + 0a50 000a4804 00000912 18bf0a00 00000a4f ..H............O + 0a60 04000009 1318bf0a 0000040a 56040000 ............V... + 0a70 091418bf 0a000008 0a5d0400 00091518 .........]...... + 0a80 bf0a0000 0c0a6404 00000916 18bf0a00 ......d......... + 0a90 00100a6b 04000009 1718bf0a 0000140a ...k............ + 0aa0 ff050000 091818bf 0a000018 0a0f0600 ................ + 0ab0 00091918 bf0a0000 1c000344 0a00000b ...........D.... + 0ac0 04310000 000f3100 0000d50a 0000105e .1....1........^ + 0ad0 00000007 0003c50a 00001f0c 02000009 ................ + 0ae0 211ad50a 00000820 200e111f 100e031f !...... ....... + 0af0 1e020000 09221ad5 0a000008 02040e11 .....".......... + 0b00 11110e00 1f240200 0009231a d50a0000 .....$....#..... + 0b10 0802040e 100e011e 201f1202 00000924 ........ ......$ + 0b20 1ad50a00 00080c04 060c0404 0e201f06 ............. .. + 0b30 02000009 251ad50a 00000802 040e1010 ....%........... + 0b40 110e201f c8020000 09261ad5 0a000008 .. ......&...... + 0b50 20200e01 0f110f03 1f180200 0009271a ............'. + 0b60 d50a0000 08020416 19111111 001fb203 ................ + 0b70 00000928 1ad50a00 00080000 00060902 ...(............ + 0b80 040f2098 00000009 2d2aba0a 00002152 .. .....-*....!R + 0b90 0000000a 1a119a0b 00000401 02160700 ................ + 0ba0 00220704 5e000000 011f01c8 0b00001d ."..^........... + 0bb0 3a040000 001d7400 0000011d ef010000 :.....t......... + 0bc0 021d3206 00000300 23610700 0001260d ..2.....#a....&. + 0bd0 23070000 05035080 fe3f2335 02000001 #.....P..?#5.... + 0be0 280d2307 00000503 4c80fe3f 246a0001 (.#.....L..?$j.. + 0bf0 2e092500 00000503 9a8dfe3f 24690001 ..%........?$i.. + 0c00 2f092500 00000503 998dfe3f 23e30600 /.%........?#... + 0c10 00013009 25000000 0503988d fe3f25bd ..0.%........?%. + 0c20 06000001 3214fc00 00000503 848dfe3f ....2..........? + 0c30 26b30200 0001860d 01620c00 00277374 &........b...'st + 0c40 72000186 2e230700 0028f603 00000186 r....#...(...... + 0c50 42bb0900 00292a6a 00018a16 25000000 B....)*j....%... + 0c60 00002624 04000001 700d0194 0c000027 ..&$....p......' + 0c70 73747200 01702f23 07000028 f6030000 str..p/#...(.... + 0c80 017043bb 09000020 4d020000 01731125 .pC.... M....s.% + 0c90 00000000 2bfa0200 00016418 30542140 ....+.....d.0T!@ + 0ca0 4e000000 019c1d0d 00002c3d 54214003 N.........,=T!@. + 0cb0 0f00002c 43542140 0f0f0000 2c4e5421 ...,CT!@....,NT! + 0cc0 401b0f00 002d5954 2140270f 0000d90c @....-YT!@'..... + 0cd0 00002e01 52027c00 002d6654 2140330f ....R.|..-fT!@3. + 0ce0 0000fb0c 00002e01 52027c00 2e015305 ........R.|...S. + 0cf0 03605221 402e0154 0130002f 75542140 .`R!@..T.0./uT!@ + 0d00 3f0f0000 2e015202 7c002e01 53030af4 ?.....R.|...S... + 0d10 012e0154 01312e01 55013100 002b7407 ...T.1..U.1..+t. + 0d20 00000151 18605221 405e0000 00019cc7 ...Q.`R!@^...... + 0d30 0d000030 61726700 01512b9f 00000004 ...0arg..Q+..... + 0d40 00000000 00000025 83040000 01531425 .......%.....S.% + 0d50 00000005 034880fe 3f2c7852 21404b0f .....H..?,xR!@K. + 0d60 00002d90 52214027 0f000076 0d00002e ..-.R!@'...v.... + 0d70 0152027c 00002d9d 52214033 0f000098 .R.|..-.R!@3.... + 0d80 0d00002e 0152027c 002e0153 0503ec52 .....R.|...S...R + 0d90 21402e01 54013000 2dac5221 403f0f00 !@..T.0.-.R!@?.. + 0da0 00bd0d00 002e0152 027c002e 0153030a .......R.|...S.. + 0db0 2c012e01 5401312e 01550131 002cbb52 ,...T.1..U.1.,.R + 0dc0 21400f0f 0000002b 8f030000 013518ec !@.....+.....5.. + 0dd0 52214037 01000001 9c030f00 00306172 R!@7.........0ar + 0de0 67000135 2c9f0000 00290000 00250000 g..5,....)...%.. + 0df0 0031300c 00004853 21400700 00000001 .10...HS!@...... + 0e00 4009610e 00003249 0c00004e 0000004a @.a...2I...N...J + 0e10 00000032 3d0c0000 72000000 6e000000 ...2=...r...n... + 0e20 33550c00 00280000 00440e00 0034560c 3U...(...D...4V. + 0e30 00009a00 00009000 00002c94 53214057 ..........,.S!@W + 0e40 0f000000 2d515321 40630f00 00570e00 ....-QS!@c...W.. + 0e50 002e0152 0131002c 64532140 6f0f0000 ...R.1.,dS!@o... + 0e60 0031620c 0000b053 21400540 00000001 .1b....S!@.@.... + 0e70 4709de0e 0000327b 0c0000e0 000000dc G.....2{........ + 0e80 00000032 6f0c0000 04010000 00010000 ...2o........... + 0e90 35400000 0034870c 00002e01 00002201 5@...4........". + 0ea0 00002db8 53214063 0f0000ba 0e00002e ..-.S!@c........ + 0eb0 01520131 2e015301 30002cd0 5321406f .R.1..S.0.,.S!@o + 0ec0 0f00002c 08542140 570f0000 2f1d5421 ...,.T!@W.../.T! + 0ed0 40570f00 002e0152 02082000 00002c1e @W.....R.. ...,. + 0ee0 5321407b 0f00002c 29532140 870f0000 S!@{...,)S!@.... + 0ef0 2c2f5321 406f0f00 002ce953 2140930f ,/S!@o...,.S!@.. + 0f00 00000036 7e030000 7e030000 0a1c0a36 ...6~...~......6 + 0f10 cf030000 cf030000 0a1d0a36 27000000 ...........6'... + 0f20 27000000 0a250a36 69010000 69010000 '....%.6i...i... + 0f30 0b420636 48010000 48010000 0b430636 .B.6H...H....C.6 + 0f40 89070000 89070000 0b410636 04080000 .........A.6.... + 0f50 04080000 0a1e0a36 ed000000 ed000000 .......6........ + 0f60 0a320a36 ae060000 ae060000 0a330a36 .2.6.........3.6 + 0f70 16010000 16010000 0a350a36 06000000 .........5.6.... + 0f80 06000000 0a310a36 31070000 31070000 .....1.61...1... + 0f90 0a340a36 ff030000 ff030000 0c290900 .4.6.........).. + 0fa0 780a0000 0400ff02 00000401 97040000 x............... + 0fb0 0c950a00 004a0600 00880000 00000000 .....J.......... + 0fc0 007d0500 00020108 d5060000 020106d7 .}.............. + 0fd0 06000002 02079b07 00000202 058d0400 ................ + 0fe0 0003040e 00000222 1d4d0000 00020407 .......".M...... + 0ff0 bd010000 04040569 6e740002 08055a03 .......int....Z. + 1000 00000208 07b30100 00020404 8d010000 ................ + 1010 02080414 04000005 04020804 0f040000 ................ + 1020 031f0000 00030b0d 54000000 03db0000 ........T....... + 1030 00030c11 80000000 0204055f 03000003 ..........._.... + 1040 bd070000 042c0e98 00000003 0e010000 .....,.......... + 1050 04720e98 00000006 43060000 05650117 .r......C....e.. + 1060 4d000000 070404a6 03e60000 00080e03 M............... + 1070 000004a8 0cb70000 0008a605 000004a9 ................ + 1080 13e60000 00000925 000000f6 0000000a .......%........ + 1090 4d000000 03000b08 04a3091a 0100000c M............... + 10a0 7a010000 04a50754 00000000 0c880200 z......T........ + 10b0 0004aa05 c4000000 040003c4 03000004 ................ + 10c0 ab03f600 000003f1 02000004 af1b8c00 ................ + 10d0 00000204 07b80100 000d043f 01000002 ...........?.... + 10e0 0108de06 00000e3f 01000003 87030000 .......?........ + 10f0 06161932 0100000f 2e010000 18062f08 ...2........../. + 1100 b1010000 0c250800 00063113 b1010000 .....%....1..... + 1110 00105f6b 00063207 54000000 040ced05 .._k..2.T....... + 1120 00000632 0b540000 00080ca0 05000006 ...2.T.......... + 1130 32145400 00000c0c df010000 06321b54 2.T..........2.T + 1140 00000010 105f7800 06330bb7 01000014 ....._x..3...... + 1150 000d0457 01000009 4b010000 c7010000 ...W....K....... + 1160 0a4d0000 0000000f 16060000 24063708 .M..........$.7. + 1170 4a020000 0c5a0200 00063909 54000000 J....Z....9.T... + 1180 000c9301 0000063a 09540000 00040c5f .......:.T....._ + 1190 01000006 3b095400 0000080c ce020000 ....;.T......... + 11a0 063c0954 0000000c 0c060400 00063d09 .<.T..........=. + 11b0 54000000 100cc005 0000063e 09540000 T..........>.T.. + 11c0 00140c36 01000006 3f095400 0000180c ...6....?.T..... + 11d0 63020000 06400954 0000001c 0ceb0300 c....@.T........ + 11e0 00064109 54000000 2000112f 00000008 ..A.T... ../.... + 11f0 01064a08 8f020000 0c810700 00064b0a ..J...........K. + 1200 8f020000 000ca206 0000064c 098f0200 ...........L.... + 1210 008012ae 07000006 4e0a4b01 00000001 ........N.K..... + 1220 12fc0700 0006510a 4b010000 04010009 ......Q.K....... + 1230 77000000 9f020000 0a4d0000 001f000f w........M...... + 1240 72040000 8c065508 e1020000 0c250800 r.....U......%.. + 1250 00065612 e1020000 000c7202 00000657 ..V.......r....W + 1260 06540000 00040c21 01000006 5809e702 .T.....!....X... + 1270 0000080c 1a030000 065920fe 02000088 .........Y ..... + 1280 000d049f 02000009 f7020000 f7020000 ................ + 1290 0a4d0000 001f000d 04fd0200 00130d04 .M.............. + 12a0 4a020000 0f1c0700 00080675 082c0300 J..........u.,.. + 12b0 000c6803 00000676 112c0300 00000cb7 ..h....v.,...... + 12c0 07000006 77065400 00000400 0d042500 ....w.T.......%. + 12d0 00000f3e 03000020 069908a5 03000010 ...>... ........ + 12e0 5f700006 9a122c03 00000010 5f720006 _p....,....._r.. + 12f0 9b075400 00000410 5f770006 9c075400 ..T....._w....T. + 1300 0000080c 8a000000 069d093a 0000000c ...........:.... + 1310 0cac0300 00069e09 3a000000 0e105f62 ........:....._b + 1320 6600069f 11040300 00100c08 07000006 f............... + 1330 a0075400 0000180c e50d0000 06a21209 ..T............. + 1340 0500001c 000e3203 000014cf 050000f0 ......2......... + 1350 06740108 09050000 15910000 00067801 .t............x. + 1360 07540000 0000154b 08000006 7d010b4a .T.....K....}..J + 1370 07000004 15d30000 00067d01 144a0700 ..........}..J.. + 1380 000815ec 07000006 7d011e4a 0700000c ........}..J.... + 1390 156d0200 00067f01 08540000 0010152a .m.......T.....* + 13a0 02000006 81010939 01000014 15330300 .......9.....3.. + 13b0 00068301 07540000 001815ca 07000006 .....T.......... + 13c0 85010754 0000001c 156c0700 00068601 ...T.....l...... + 13d0 16b20800 0020165f 6d700006 880112b8 ..... ._mp...... + 13e0 08000024 15ba0300 00068a01 0ac90800 ...$............ + 13f0 0028154b 03000006 8c010754 0000002c .(.K.......T..., + 1400 15e50500 00068f01 07540000 003015cd .........T...0.. + 1410 06000006 90010939 01000034 15630000 .......9...4.c.. + 1420 00069201 13cf0800 003815d6 05000006 .........8...... + 1430 930110d5 0800003c 15ca0100 00069401 .......<........ + 1440 09390100 004015d8 02000006 97010be6 .9...@.......... + 1450 08000044 15720400 00069b01 13e10200 ...D.r.......... + 1460 0048151b 04000006 9c01129f 0200004c .H.............L + 1470 15290700 00069f01 100b0700 00d8159c .).............. + 1480 01000006 a0010b4a 070000e4 15000000 .......J........ + 1490 0006a101 17f20800 00e81568 00000006 ...........h.... + 14a0 a2010939 010000ec 000d04aa 0300000f ...9............ + 14b0 d7010000 6806b508 52060000 105f7000 ....h...R...._p. + 14c0 06b6122c 03000000 105f7200 06b70754 ...,....._r....T + 14d0 00000004 105f7700 06b80754 00000008 ....._w....T.... + 14e0 0c8a0000 0006b909 3a000000 0c0cac03 ........:....... + 14f0 000006ba 093a0000 000e105f 62660006 .....:....._bf.. + 1500 bb110403 0000100c 08070000 06bc0754 ...............T + 1510 00000018 0ce50d00 0006bf12 09050000 ................ + 1520 1c0c2601 000006c3 0a770000 00200cfa ..&......w... .. + 1530 00000006 c51d7006 0000240c 3d000000 ......p...$.=... + 1540 06c71d9a 06000028 0c360800 0006ca0d .......(.6...... + 1550 be060000 2c0c2c03 000006cb 09d80600 ....,.,......... + 1560 0030105f 75620006 ce110403 00003410 .0._ub........4. + 1570 5f757000 06cf122c 0300003c 105f7572 _up....,...<._ur + 1580 0006d007 54000000 400c3c08 000006d3 ....T...@.<..... + 1590 11de0600 00440cc4 07000006 d411ee06 .....D.......... + 15a0 00004710 5f6c6200 06d71104 03000048 ..G._lb........H + 15b0 0c060600 0006da07 54000000 500cfe01 ........T...P... + 15c0 000006db 0a9f0000 00540c1b 06000006 .........T...... + 15d0 e20c2601 0000580c 7a040000 06e40e1a ..&...X.z....... + 15e0 0100005c 0cf40700 0006e509 54000000 ...\........T... + 15f0 64001754 00000070 06000018 09050000 d..T...p........ + 1600 18770000 00183901 00001854 00000000 .w....9....T.... + 1610 0d045206 00001754 00000094 06000018 ..R....T........ + 1620 09050000 18770000 00189406 00001854 .....w.........T + 1630 00000000 0d044601 00000d04 76060000 ......F.....v... + 1640 17ab0000 00be0600 00180905 00001877 ...............w + 1650 00000018 ab000000 18540000 00000d04 .........T...... + 1660 a0060000 17540000 00d80600 00180905 .....T.......... + 1670 00001877 00000000 0d04c406 00000925 ...w...........% + 1680 000000ee 0600000a 4d000000 02000925 ........M......% + 1690 000000fe 0600000a 4d000000 00000658 ........M......X + 16a0 01000006 1f011a0f 05000014 23070000 ............#... + 16b0 0c062301 08440700 00152508 00000625 ..#..D....%....% + 16c0 01114407 00000015 3c060000 06260107 ..D.....<....&.. + 16d0 54000000 04151403 00000627 010b4a07 T..........'..J. + 16e0 00000800 0d040b07 00000d04 fe060000 ................ + 16f0 14a10100 0018063f 01089707 0000151a .......?........ + 1700 08000006 40011297 07000000 15780300 ....@........x.. + 1710 00064101 12970700 00061511 07000006 ..A............. + 1720 42011233 0000000c 15200800 00064501 B..3..... ....E. + 1730 24620000 00100009 33000000 a7070000 $b......3....... + 1740 0a4d0000 00020014 e4030000 10065801 .M............X. + 1750 08ee0700 00154001 0000065b 0113b101 ......@....[.... + 1760 00000015 a9010000 065c0107 54000000 .........\..T... + 1770 04159002 0000065d 0113b101 00000815 .......]........ + 1780 6e030000 065e0114 ee070000 0c000d04 n....^.......... + 1790 b1010000 14ca0500 00500662 01089d08 .........P.b.... + 17a0 0000153d 07000006 65010939 01000000 ...=....e..9.... + 17b0 15a60200 00066601 0e1a0100 00041544 ......f........D + 17c0 00000006 67010e1a 0100000c 154a0700 ....g........J.. + 17d0 00066801 0e1a0100 001415f5 05000006 ..h............. + 17e0 6901089d 0800001c 15fb0600 00066a01 i.............j. + 17f0 07540000 00241500 01000006 6b010e1a .T...$......k... + 1800 01000028 15e20200 00066c01 0e1a0100 ...(......l..... + 1810 00301577 02000006 6d010e1a 01000038 .0.w....m......8 + 1820 159d0300 00066e01 0e1a0100 00401595 ......n......@.. + 1830 02000006 6f010e1a 01000048 00093f01 ....o......H..?. + 1840 0000ad08 00000a4d 00000007 00192b08 .......M......+. + 1850 00000d04 ad080000 0d04a707 00001ac9 ................ + 1860 08000018 09050000 000d04be 0800000d ................ + 1870 04500700 000d04c7 0100001a e6080000 .P.............. + 1880 18540000 00000d04 ec080000 0d04db08 .T.............. + 1890 00000d04 f4070000 1b420800 0006a501 .........B...... + 18a0 22a50300 001bca00 000006a6 0122a503 "............".. + 18b0 00001be3 07000006 a70122a5 0300001b .........."..... + 18c0 ad050000 060a0318 09050000 1c07044d ...............M + 18d0 00000007 f5020e9c 0900001d 52080000 ............R... + 18e0 001d9808 0000011d 28090000 021d3f09 ........(.....?. + 18f0 0000031d 80080000 041d150a 0000051d ................ + 1900 06090000 061d8b09 0000071d 3e0a0000 ............>... + 1910 081de708 0000091d 670a0000 0a1da909 ........g....... + 1920 00000b1d d6090000 0c1d5609 00000d1d ..........V..... + 1930 c7080000 641d6b08 00006500 06040a00 ....d.k...e..... + 1940 00070703 032c0900 001e0c07 090309de .....,.......... + 1950 09000015 c8100000 070a0316 9c090000 ................ + 1960 0015900a 0000070b 030e4100 00000415 ..........A..... + 1970 b8070000 070c030e 41000000 0800067a ........A......z + 1980 09000007 0d0303a9 0900000e de090000 ................ + 1990 09eb0900 00000a00 000a4d00 00000500 ..........M..... + 19a0 0ef00900 001fb408 00000131 1f000a00 ...........1.... + 19b0 00050314 87fe3f20 c8090000 013a1888 ......? .....:.. + 19c0 54214027 00000001 9c620a00 00219a54 T!@'.....b...!.T + 19d0 2140620a 00004e0a 00002201 52050314 !@b...N...".R... + 19e0 87fe3f22 01530136 22015401 360023a5 ..?".S.6".T.6.#. + 19f0 5421406f 0a000022 01520503 ed86fe3f T!@o...".R.....? + 1a00 000024a2 0a0000a2 0a000007 19030625 ..$............% + 1a10 2f0a0000 2f0a0000 084d0500 7c1c0000 /.../....M..|... + 1a20 04000505 00000401 97040000 0c4a0d00 .............J.. + 1a30 004a0600 00380100 00000000 000e0700 .J...8.......... + 1a40 0002a900 00000704 44000000 02270644 ........D....'.D + 1a50 00000003 92050000 00039905 00000100 ................ + 1a60 040407bd 01000002 be000000 07044400 ..............D. + 1a70 00000230 06b50000 00054331 00000543 ...0......C1...C + 1a80 32000105 43330002 05433400 03054335 2...C3...C4...C5 + 1a90 00040543 36000505 43370006 05433800 ...C6...C7...C8. + 1aa0 07054339 00080543 31300009 05433131 ..C9...C10...C11 + 1ab0 000a0543 3132000b 05433133 000c0543 ...C12...C13...C + 1ac0 3134000d 05433135 000e0543 3136000f 14...C15...C16.. + 1ad0 00040106 d7060000 069b0d00 00032b18 ..............+. + 1ae0 c8000000 040108d5 06000004 02058d04 ................ + 1af0 00000402 079b0700 00070405 696e7400 ............int. + 1b00 06020e00 00034f19 44000000 0408055a ......O.D......Z + 1b10 03000004 0807b301 0000069d 0d000004 ................ + 1b20 1813bc00 000008fe 00000006 040e0000 ................ + 1b30 043014e4 00000002 410b0000 07044400 .0......A.....D. + 1b40 00000510 0a460100 0003780c 00000003 .....F....x..... + 1b50 7f0c0000 0103120c 00000203 280b0000 ............(... + 1b60 030006e5 0e000005 18145201 00000904 ..........R..... + 1b70 58010000 0a06020d 00000519 14520100 X............R.. + 1b80 0006cc0b 0000051a 14520100 0006cc0e .........R...... + 1b90 0000051b 147d0100 00090483 0100000b .....}.......... + 1ba0 8e010000 0cfe0000 000006e9 0c000005 ................ + 1bb0 1c179a01 00000904 a0010000 0dfe0000 ................ + 1bc0 0006ff0b 0000051d 14b10100 000904b7 ................ + 1bd0 0100000b c2010000 0c1b0100 000006fd ................ + 1be0 0b000005 1e14b101 000006a5 0c000005 ................ + 1bf0 1f14da01 00000904 e0010000 0beb0100 ................ + 1c00 000c0f01 0000000e 9e0e0000 2005210c ............ .!. + 1c10 61020000 0fc80a00 0005232b 46010000 a.........#+F... + 1c20 000ff20a 00000524 2d590100 00040f8c .......$-Y...... + 1c30 0b000005 252c6501 0000080f 5c0d0000 ....%,e.....\... + 1c40 05262271 0100000c 0fe10d00 00052722 .&"q..........'" + 1c50 8e010000 100f280f 00000528 1ca50100 ......(....(.... + 1c60 00140f41 0f000005 291ec201 0000180f ...A....)....... + 1c70 a80f0000 052a19ce 0100001c 0008eb01 .....*.......... + 1c80 00000e21 06000020 06100cdc 0200000f ...!... ........ + 1c90 48040000 061218e1 02000000 0f4f0400 H............O.. + 1ca0 00061318 e1020000 040f5604 00000614 ..........V..... + 1cb0 18e10200 00080f5d 04000006 1518e102 .......]........ + 1cc0 00000c0f 64040000 061618e1 02000010 ....d........... + 1cd0 0f6b0400 00061718 e1020000 140fff05 .k.............. + 1ce0 00000618 18e10200 00180f0f 06000006 ................ + 1cf0 1918e102 00001c00 08660200 0009040a .........f...... + 1d00 01000010 0a010000 f7020000 11440000 .............D.. + 1d10 00070008 e7020000 120c0200 0006211a ..............!. + 1d20 f7020000 0820200e 111f100e 03121e02 ..... ......... + 1d30 00000622 1af70200 00080204 0e111111 ..."............ + 1d40 0e001224 02000006 231af702 00000802 ...$....#....... + 1d50 040e100e 011e2012 12020000 06241af7 ...... ......$.. + 1d60 02000008 0c04060c 04040e20 12060200 ........... .... + 1d70 0006251a f7020000 0802040e 1010110e ..%............. + 1d80 2012c802 00000626 1af70200 00082020 ......&...... + 1d90 0e010f11 0f031218 02000006 271af702 ............'... + 1da0 00000802 04161911 11110012 b2030000 ................ + 1db0 06281af7 02000008 00000006 0902040f .(.............. + 1dc0 13980000 00062d2a dc020000 02c20e00 ......-*........ + 1dd0 00070444 00000007 140acf03 00000396 ...D............ + 1de0 0d000000 03400c00 00010014 52000000 .....@......R... + 1df0 071a11db 03000004 01021607 00000408 ................ + 1e00 040f0400 00150406 1f000000 080b0ddd ................ + 1e10 00000006 db000000 080c11eb 03000004 ................ + 1e20 04055f03 000006bd 07000009 2c0e0304 .._.........,... + 1e30 0000060e 01000009 720e0304 00001643 ........r......C + 1e40 0600000a 65011744 00000017 0409a603 ....e..D........ + 1e50 51040000 180e0300 0009a80c 22040000 Q..........."... + 1e60 18a60500 0009a913 51040000 0010c800 ........Q....... + 1e70 00006104 00001144 00000003 00190809 ..a....D........ + 1e80 a3098504 00000f7a 01000009 a507dd00 .......z........ + 1e90 0000000f 88020000 09aa052f 04000004 .........../.... + 1ea0 0006c403 000009ab 03610400 0006f102 .........a...... + 1eb0 000009af 1bf70300 00040407 b8010000 ................ + 1ec0 06870300 000b1619 9d040000 0e2e0100 ................ + 1ed0 00180b2f 080a0500 000f2508 00000b31 .../......%....1 + 1ee0 130a0500 00001a5f 6b000b32 07dd0000 ......._k..2.... + 1ef0 00040fed 0500000b 320bdd00 0000080f ........2....... + 1f00 a0050000 0b3214dd 0000000c 0fdf0100 .....2.......... + 1f10 000b321b dd000000 101a5f78 000b330b ..2......._x..3. + 1f20 10050000 14000904 b0040000 10a40400 ................ + 1f30 00200500 00114400 00000000 0e160600 . ....D......... + 1f40 00240b37 08a30500 000f5a02 00000b39 .$.7......Z....9 + 1f50 09dd0000 00000f93 0100000b 3a09dd00 ............:... + 1f60 0000040f 5f010000 0b3b09dd 00000008 ...._....;...... + 1f70 0fce0200 000b3c09 dd000000 0c0f0604 ......<......... + 1f80 00000b3d 09dd0000 00100fc0 0500000b ...=............ + 1f90 3e09dd00 0000140f 36010000 0b3f09dd >.......6....?.. + 1fa0 00000018 0f630200 000b4009 dd000000 .....c....@..... + 1fb0 1c0feb03 00000b41 09dd0000 0020001b .......A..... .. + 1fc0 2f000000 08010b4a 08e80500 000f8107 /......J........ + 1fd0 00000b4b 0ae80500 00000fa2 0600000b ...K............ + 1fe0 4c09e805 0000801c ae070000 0b4e0aa4 L............N.. + 1ff0 04000000 011cfc07 00000b51 0aa40400 ...........Q.... + 2000 00040100 10e90300 00f80500 00114400 ..............D. + 2010 00001f00 0e720400 008c0b55 083a0600 .....r.....U.:.. + 2020 000f2508 00000b56 123a0600 00000f72 ..%....V.:.....r + 2030 0200000b 5706dd00 0000040f 21010000 ....W.......!... + 2040 0b580940 06000008 0f1a0300 000b5920 .X.@..........Y + 2050 50060000 88000904 f8050000 10520100 P............R.. + 2060 00500600 00114400 00001f00 0904a305 .P....D......... + 2070 00000e1c 07000008 0b75087e 0600000f .........u.~.... + 2080 68030000 0b76117e 06000000 0fb70700 h....v.~........ + 2090 000b7706 dd000000 04000904 c8000000 ..w............. + 20a0 0e3e0300 00200b99 08f70600 001a5f70 .>... ........_p + 20b0 000b9a12 7e060000 001a5f72 000b9b07 ....~....._r.... + 20c0 dd000000 041a5f77 000b9c07 dd000000 ......_w........ + 20d0 080f8a00 00000b9d 09cf0000 000c0fac ................ + 20e0 0300000b 9e09cf00 00000e1a 5f626600 ............_bf. + 20f0 0b9f1156 06000010 0f080700 000ba007 ...V............ + 2100 dd000000 180fe50d 00000ba2 125b0800 .............[.. + 2110 001c0008 84060000 1dcf0500 00f00b74 ...............t + 2120 01085b08 00001e91 0000000b 780107dd ..[.........x... + 2130 00000000 1e4b0800 000b7d01 0bae0a00 .....K....}..... + 2140 00041ed3 0000000b 7d0114ae 0a000008 ........}....... + 2150 1eec0700 000b7d01 1eae0a00 000c1e6d ......}........m + 2160 0200000b 7f0108dd 00000010 1e2a0200 .............*.. + 2170 000b8101 09c20900 00141e33 0300000b ...........3.... + 2180 830107dd 00000018 1eca0700 000b8501 ................ + 2190 07dd0000 001c1e6c 0700000b 86011616 .......l........ + 21a0 0c000020 1f5f6d70 000b8801 121c0c00 ... ._mp........ + 21b0 00241eba 0300000b 8a010a2d 0c000028 .$.........-...( + 21c0 1e4b0300 000b8c01 07dd0000 002c1ee5 .K...........,.. + 21d0 0500000b 8f0107dd 00000030 1ecd0600 ...........0.... + 21e0 000b9001 09c20900 00341e63 0000000b .........4.c.... + 21f0 92011333 0c000038 1ed60500 000b9301 ...3...8........ + 2200 10390c00 003c1eca 0100000b 940109c2 .9...<.......... + 2210 09000040 1ed80200 000b9701 0b4a0c00 ...@.........J.. + 2220 00441e72 0400000b 9b01133a 06000048 .D.r.......:...H + 2230 1e1b0400 000b9c01 12f80500 004c1e29 .............L.) + 2240 0700000b 9f01106f 0a0000d8 1e9c0100 .......o........ + 2250 000ba001 0bae0a00 00e41e00 0000000b ................ + 2260 a1011756 0c0000e8 1e680000 000ba201 ...V.....h...... + 2270 09c20900 00ec0009 04fc0600 000ed701 ................ + 2280 0000680b b508a409 00001a5f 70000bb6 ..h........_p... + 2290 127e0600 00001a5f 72000bb7 07dd0000 .~....._r....... + 22a0 00041a5f 77000bb8 07dd0000 00080f8a ..._w........... + 22b0 0000000b b909cf00 00000c0f ac030000 ................ + 22c0 0bba09cf 0000000e 1a5f6266 000bbb11 ........._bf.... + 22d0 56060000 100f0807 00000bbc 07dd0000 V............... + 22e0 00180fe5 0d00000b bf125b08 00001c0f ..........[..... + 22f0 26010000 0bc30ae9 03000020 0ffa0000 &.......... .... + 2300 000bc51d d4090000 240f3d00 00000bc7 ........$.=..... + 2310 1dfe0900 00280f36 0800000b ca0d220a .....(.6......". + 2320 00002c0f 2c030000 0bcb093c 0a000030 ..,.,......<...0 + 2330 1a5f7562 000bce11 56060000 341a5f75 ._ub....V...4._u + 2340 70000bcf 127e0600 003c1a5f 7572000b p....~...<._ur.. + 2350 d007dd00 0000400f 3c080000 0bd31142 ......@.<......B + 2360 0a000044 0fc40700 000bd411 520a0000 ...D........R... + 2370 471a5f6c 62000bd7 11560600 00480f06 G._lb....V...H.. + 2380 0600000b da07dd00 0000500f fe010000 ..........P..... + 2390 0bdb0a0a 04000054 0f1b0600 000be20c .......T........ + 23a0 91040000 580f7a04 00000be4 0e850400 ....X.z......... + 23b0 005c0ff4 0700000b e509dd00 00006400 .\............d. + 23c0 20dd0000 00c20900 000c5b08 00000ce9 .........[..... + 23d0 0300000c c2090000 0cdd0000 00000904 ................ + 23e0 c8090000 040108de 06000008 c8090000 ................ + 23f0 0904a409 000020dd 000000f8 0900000c ...... ......... + 2400 5b080000 0ce90300 000cf809 00000cdd [............... + 2410 00000000 0904cf09 00000904 da090000 ................ + 2420 20160400 00220a00 000c5b08 00000ce9 ...."....[..... + 2430 0300000c 16040000 0cdd0000 00000904 ................ + 2440 040a0000 20dd0000 003c0a00 000c5b08 .... ....<....[. + 2450 00000ce9 03000000 0904280a 000010c8 ..........(..... + 2460 00000052 0a000011 44000000 020010c8 ...R....D....... + 2470 00000062 0a000011 44000000 00001658 ...b....D......X + 2480 0100000b 1f011a61 0800001d 23070000 .......a....#... + 2490 0c0b2301 08a80a00 001e2508 00000b25 ..#.......%....% + 24a0 0111a80a 0000001e 3c060000 0b260107 ........<....&.. + 24b0 dd000000 041e1403 00000b27 010bae0a ...........'.... + 24c0 00000800 09046f0a 00000904 620a0000 ......o.....b... + 24d0 1da10100 00180b3f 0108fb0a 00001e1a .......?........ + 24e0 0800000b 400112fb 0a000000 1e780300 ....@........x.. + 24f0 000b4101 12fb0a00 00061e11 0700000b ..A............. + 2500 420112d6 0000000c 1e200800 000b4501 B........ ....E. + 2510 24f70000 00100010 d6000000 0b0b0000 $............... + 2520 11440000 0002001d e4030000 100b5801 .D............X. + 2530 08520b00 001e4001 00000b5b 01130a05 .R....@....[.... + 2540 0000001e a9010000 0b5c0107 dd000000 .........\...... + 2550 041e9002 00000b5d 01130a05 0000081e .......]........ + 2560 6e030000 0b5e0114 520b0000 0c000904 n....^..R....... + 2570 0a050000 1dca0500 00500b62 0108010c .........P.b.... + 2580 00001e3d 0700000b 650109c2 09000000 ...=....e....... + 2590 1ea60200 000b6601 0e850400 00041e44 ......f........D + 25a0 0000000b 67010e85 0400000c 1e4a0700 ....g........J.. + 25b0 000b6801 0e850400 00141ef5 0500000b ..h............. + 25c0 69010801 0c00001c 1efb0600 000b6a01 i.............j. + 25d0 07dd0000 00241e00 0100000b 6b010e85 .....$......k... + 25e0 04000028 1ee20200 000b6c01 0e850400 ...(......l..... + 25f0 00301e77 0200000b 6d010e85 04000038 .0.w....m......8 + 2600 1e9d0300 000b6e01 0e850400 00401e95 ......n......@.. + 2610 0200000b 6f010e85 04000048 0010c809 ....o......H.... + 2620 0000110c 00001144 00000007 00212b08 .......D.....!+. + 2630 00000904 110c0000 09040b0b 00000b2d ...............- + 2640 0c00000c 5b080000 00090422 0c000009 ....[......".... + 2650 04b40a00 00090420 0500000b 4a0c0000 ....... ....J... + 2660 0cdd0000 00000904 500c0000 09043f0c ........P.....?. + 2670 00000904 580b0000 22420800 000ba501 ....X..."B...... + 2680 22f70600 0022ca00 00000ba6 0122f706 "....".......".. + 2690 000022e3 0700000b a70122f7 06000022 .."......."...." + 26a0 ad050000 0b0a0318 5b080000 14b40b00 ........[....... + 26b0 000c670e c2090000 065c0c00 00010e0e ..g......\...... + 26c0 c8090000 089c0c00 0010c809 0000c30c ................ + 26d0 00001144 00000001 11440000 000f0023 ...D.....D.....# + 26e0 360b0000 013d0ead 0c000005 03c48dfe 6....=.......... + 26f0 3f23310b 0000013e 0ead0c00 000503a4 ?#1....>........ + 2700 8dfe3f23 cc0d0000 014013f9 0c000005 ..?#.....@...... + 2710 03a08dfe 3f09049c 0c000024 4c434400 ....?......$LCD. + 2720 01433511 0d000005 039c8dfe 3f090461 .C5.........?..a + 2730 02000025 cf030000 01440605 039b8dfe ...%.....D...... + 2740 3f26180c 0000019c 03060000 00000000 ?&.............. + 2750 0000019c 380e0000 2776616c 00019c03 ....8...'val.... + 2760 16dd0000 00800100 007c0100 0028ae0b .........|...(.. + 2770 0000019c 0323fe00 0000a701 0000a101 .....#.......... + 2780 0000293a 0b000001 a1030a38 0e000002 ..):.......8.... + 2790 91462949 0b000001 a2030a38 0e000003 .F)I.......8.... + 27a0 91a37f29 940e0000 01a3030a 380e0000 ...)........8... + 27b0 0391807f 2a000000 00c91b00 00b40d00 ....*........... + 27c0 002b0152 03f30152 2b015303 91a37f00 .+.R...R+.S..... + 27d0 2a000000 00731900 00d50d00 002b0152 *....s.......+.R + 27e0 0391a37f 2b015302 7c002b01 54027100 ....+.S.|.+.T.q. + 27f0 002a0000 00004f1c 0000f20d 00002b01 .*....O.......+. + 2800 52029146 2b015305 03000000 00002a00 R..F+.S.......*. + 2810 0000004f 1c00000c 0e00002b 01520291 ...O.......+.R.. + 2820 462b0153 02710000 2a000000 004f1c00 F+.S.q..*....O.. + 2830 00270e00 002b0152 0291462b 01530391 .'...+.R..F+.S.. + 2840 a37f002c 00000000 ec100000 2b015202 ...,........+.R. + 2850 91460000 10c80900 00480e00 00114400 .F.......H....D. + 2860 00002200 26bd0c00 00018303 06000000 ..".&........... + 2870 00000000 00019cd3 0e000027 76616c00 ...........'val. + 2880 01830316 dd000000 db010000 d3010000 ................ + 2890 28ae0b00 00018303 23fe0000 00180200 (.......#....... + 28a0 00120200 0028c20e 00000183 0339b003 .....(.......9.. + 28b0 00004c02 00004402 0000293a 0b000001 ..L...D...):.... + 28c0 88030ad3 0e000002 91502a00 0000005b .........P*....[ + 28d0 1c0000c2 0e00002b 01520271 00002c00 .......+.R.q..,. + 28e0 000000ec 1000002b 01520271 00000010 .......+.R.q.... + 28f0 c8090000 e30e0000 11440000 00100026 .........D.....& + 2900 990c0000 01680306 00000000 00000000 .....h.......... + 2910 019c6e0f 00002776 616c0001 680316dd ..n...'val..h... + 2920 0000008e 02000086 02000028 ae0b0000 ...........(.... + 2930 01680323 fe000000 cb020000 c5020000 .h.#............ + 2940 28c20e00 00016803 39b00300 00ff0200 (.....h.9....... + 2950 00f70200 00293a0b 0000016d 030a6e0f .....):....m..n. + 2960 00000291 502a0000 00005b1c 00005d0f ....P*....[...]. + 2970 00002b01 52027100 002c0000 0000ec10 ..+.R.q..,...... + 2980 00002b01 52027100 000010c8 0900007e ..+.R.q........~ + 2990 0f000011 44000000 13002616 01000001 ....D.....&..... + 29a0 4b030674 2e1040a4 00000001 9ce61000 K..t..@......... + 29b0 002d790d 0000014d 030dfe00 00004503 .-y....M......E. + 29c0 00003903 00002df6 03000001 4e030dfe ..9...-.....N... + 29d0 0000009b 03000091 0300002d 390e0000 ...........-9... + 29e0 014f030d fe000000 ef030000 dd030000 .O.............. + 29f0 2d460c00 00015003 16e61000 00650400 -F....P......e.. + 2a00 005f0400 002e9e18 0000bd2e 104002f8 ._...........@.. + 2a10 00000001 54030984 1000002f d3180000 ....T....../.... + 2a20 99040000 93040000 2fc61800 00c80400 ......../....... + 2a30 00c40400 002fb918 0000f404 0000f004 ...../.......... + 2a40 00002fac 18000020 0500001c 0500002e ../.... ........ + 2a50 0f150000 d32e1040 0c180100 0001e001 .......@........ + 2a60 09731000 002f1d15 00004c05 00004805 .s.../....L...H. + 2a70 00003018 01000031 28150000 73050000 ..0....1(...s... + 2a80 6f050000 32de2e10 40c51a00 0000002c o...2...@......, + 2a90 d12e1040 54120000 2b015202 7f000000 ...@T...+.R..... + 2aa0 33e71800 00e22e10 4015e22e 10402200 3.......@....@". + 2ab0 00000155 0309dc10 00002f0f 19000098 ...U....../..... + 2ac0 05000096 0500002f 02190000 b2050000 ......./........ + 2ad0 b0050000 2ff51800 00cc0500 00ca0500 ..../........... + 2ae0 002cff2e 10405412 00002b01 52027f00 .,...@T...+.R... + 2af0 2b015302 7c000000 32a42e10 401d1900 +.S.|...2...@... + 2b00 00000904 a80c0000 26310700 00013d03 ........&1....=. + 2b10 06402e10 40330000 00019c22 11000027 .@..@3....."...' + 2b20 73747200 013d031e f8090000 ea050000 str..=.......... + 2b30 e4050000 32702e10 40601900 000026ae ....2p..@`....&. + 2b40 06000001 3403062c 2e104011 00000001 ....4..,..@..... + 2b50 9c601100 00277900 01340324 25000000 .`...'y..4.$%... + 2b60 17060000 13060000 27780001 3403384b ........'x..4.8K + 2b70 0000003c 06000038 06000000 26ed0000 ...<...8....&... + 2b80 00012803 060c2e10 401f0000 00019c94 ..(.....@....... + 2b90 11000027 63000128 031ecf09 00006106 ...'c..(......a. + 2ba0 00005d06 0000321c 2e104060 19000000 ..]...2...@`.... + 2bb0 34060000 00011803 06302d10 40210000 4........0-.@!.. + 2bc0 00019c26 580b0000 010d0306 00000000 ...&X........... + 2bd0 00000000 019cce11 00002c00 0000000f ..........,..... + 2be0 1b00002b 0152013f 000026da 0c000001 ...+.R.?..&..... + 2bf0 04030600 00000000 00000001 9cf51100 ................ + 2c00 002c0000 00000f1b 00002b01 52013c00 .,........+.R.<. + 2c10 0026be0b 000001fa 02060000 00000000 .&.............. + 2c20 0000019c 1c120000 2c000000 000f1b00 ........,....... + 2c30 002b0152 013e0000 26d10c00 0001ed02 .+.R.>..&....... + 2c40 06000000 00000000 00019c54 1200002a ...........T...* + 2c50 00000000 0f1b0000 46120000 2b015201 ........F...+.R. + 2c60 33003500 0000002b 0152030a 24130000 3.5....+.R..$... + 2c70 26c10d00 0001cd02 06082d10 40210000 &.........-.@!.. + 2c80 00019c9b 12000027 790001cd 02202500 .......'y.... %. + 2c90 00008606 00008206 00002778 0001cd02 ..........'x.... + 2ca0 344b0000 00aa0600 00a40600 0032202d 4K...........2 - + 2cb0 10400f1b 00000026 240c0000 01b10206 .@.....&$....... + 2cc0 00000000 00000000 019cae13 00002776 ..............'v + 2cd0 616c0001 b10212dd 000000dd 060000d9 al.............. + 2ce0 06000028 ae0b0000 01b1021f fe000000 ...(............ + 2cf0 04070000 fe060000 293a0b00 0001b602 ........):...... + 2d00 0a380e00 00029146 29490b00 0001b702 .8.....F)I...... + 2d10 0a380e00 000391a3 7f29940e 000001b8 .8.......)...... + 2d20 020a380e 00000391 807f2a00 000000c9 ..8.......*..... + 2d30 1b00002a 1300002b 015203f3 01522b01 ...*...+.R...R+. + 2d40 530391a3 7f002a00 00000073 1900004b S.....*....s...K + 2d50 1300002b 01520391 a37f2b01 53027c00 ...+.R....+.S.|. + 2d60 2b015402 7100002a 00000000 4f1c0000 +.T.q..*....O... + 2d70 68130000 2b015202 91462b01 53050300 h...+.R..F+.S... + 2d80 00000000 2a000000 004f1c00 00821300 ....*....O...... + 2d90 002b0152 0291462b 01530271 00002a00 .+.R..F+.S.q..*. + 2da0 0000004f 1c00009d 1300002b 01520291 ...O.......+.R.. + 2db0 462b0153 0391a37f 002c0000 0000c414 F+.S.....,...... + 2dc0 00002b01 52029146 000026c9 0c000001 ..+.R..F..&..... + 2dd0 97020600 00000000 00000001 9c391400 .............9.. + 2de0 00277661 6c000197 0212dd00 00003807 .'val.........8. + 2df0 00003007 000028ae 0b000001 97021ffe ..0...(......... + 2e00 00000075 0700006f 07000028 c20e0000 ...u...o...(.... + 2e10 01970235 b0030000 a9070000 a1070000 ...5............ + 2e20 293a0b00 00019c02 0ad30e00 00029150 ):.............P + 2e30 2a000000 005b1c00 00281400 002b0152 *....[...(...+.R + 2e40 02710000 2c000000 00c41400 002b0152 .q..,........+.R + 2e50 02710000 0026b50c 0000017b 02060000 .q...&.....{.... + 2e60 00000000 0000019c c4140000 2776616c ............'val + 2e70 00017b02 12dd0000 00eb0700 00e30700 ..{............. + 2e80 0028ae0b 0000017b 021ffe00 00002808 .(.....{......(. + 2e90 00002208 000028c2 0e000001 7b0235b0 .."...(.....{.5. + 2ea0 0300005c 08000054 08000029 3a0b0000 ...\...T...):... + 2eb0 0180020a 6e0f0000 0291502a 00000000 ....n.....P*.... + 2ec0 5b1c0000 b3140000 2b015202 7100002c [.......+.R.q.., + 2ed0 00000000 c4140000 2b015202 71000000 ........+.R.q... + 2ee0 26270000 00016802 06e82c10 40200000 &'....h...,.@ .. + 2ef0 00019c0f 15000027 73747200 0168021a .......'str..h.. + 2f00 f8090000 a0080000 96080000 2dbd0e00 ............-... + 2f10 00016a02 13c80900 00e70800 00e30800 ..j............. + 2f20 0032052d 1040c51a 00000036 1f0b0000 .2.-.@.....6.... + 2f30 015e0206 01361500 00374300 015e021a .^...6...7C..^.. + 2f40 cf090000 38e60d00 00016002 0dfe0000 ....8.....`..... + 2f50 00002686 0c000001 4b020600 00000000 ..&.....K....... + 2f60 00000001 9cf71500 00288f0c 0000014b .........(.....K + 2f70 0238f715 00000c09 00000609 00002a00 .8............*. + 2f80 000000fd 15000075 1500002b 01520130 .......u...+.R.0 + 2f90 002a0000 0000fd15 00008815 00002b01 .*............+. + 2fa0 52013100 2a000000 00fd1500 009b1500 R.1.*........... + 2fb0 002b0152 0132002a 00000000 fd150000 .+.R.2.*........ + 2fc0 ae150000 2b015201 33002a00 000000fd ....+.R.3.*..... + 2fd0 150000c1 1500002b 01520134 002a0000 .......+.R.4.*.. + 2fe0 0000fd15 0000d415 00002b01 52013500 ..........+.R.5. + 2ff0 2a000000 00fd1500 00e71500 002b0152 *............+.R + 3000 0136002c 00000000 fd150000 2b015201 .6.,........+.R. + 3010 37000009 04dc0200 0026e50a 00000141 7........&.....A + 3020 02060000 00000000 0000019c 82160000 ................ + 3030 28760b00 00014102 210a0100 003c0900 (v....A.!....<.. + 3040 00380900 0028e90a 00000141 0247e102 .8...(.....A.G.. + 3050 00006309 00005d09 00003900 00000000 ..c...]...9..... + 3060 00000068 1600003a 6a000144 0212fe00 ...h...:j..D.... + 3070 00009509 00008f09 00003200 000000c5 ..........2..... + 3080 1a000000 32000000 000f1b00 002c0000 ....2........,.. + 3090 00000f1b 00002b01 52020880 000026c0 ......+.R.....&. + 30a0 0a000001 2f0206c4 2c104021 00000001 ..../...,.@!.... + 30b0 9cba1600 002ad02c 10400f1b 0000ac16 .....*.,.@...... + 30c0 00002b01 52013100 35de2c10 402b0152 ..+.R.1.5.,.@+.R + 30d0 030a2413 00002604 08000001 220206a8 ..$...&....."... + 30e0 2c104018 00000001 9cdd1600 0035b92c ,.@..........5., + 30f0 10402b01 52013300 0026cf03 00000119 .@+.R.3..&...... + 3100 0206902c 10401800 0000019c 00170000 ...,.@.......... + 3110 35a12c10 402b0152 01330000 3b7e0300 5.,.@+.R.3..;~.. + 3120 0001ef01 065c2d10 40ad0000 00019c9e .....\-.@....... + 3130 1800002e c01b0000 5c2d1040 02e00000 ........\-.@.... + 3140 0001f101 05371700 0032662d 1040671c .....7...2f-.@g. + 3150 00000033 b71b0000 742d1040 0a742d10 ...3....t-.@.t-. + 3160 40140000 0001f601 056c1700 003c7f2d @........l...<.- + 3170 10406017 00002b01 52013200 35882d10 .@`...+.R.2.5.-. + 3180 402b0152 01300000 33ae1b00 00922d10 @+.R.0..3.....-. + 3190 4015922d 10401200 000001f8 0105a117 @..-.@.......... + 31a0 00003c9b 2d104095 1700002b 01520130 ..<.-.@....+.R.0 + 31b0 0035a42d 10402b01 52013200 0032742d .5.-.@+.R.2..2t- + 31c0 1040ba16 00003c92 2d1040bb 1700002b .@....<.-.@....+ + 31d0 0152030a 983a002a a92d1040 591b0000 .R...:.*.-.@Y... + 31e0 ce170000 2b015201 33003cb3 2d1040df ....+.R.3.<.-.@. + 31f0 1700002b 0152030a 9411002a b82d1040 ...+.R.....*.-.@ + 3200 591b0000 f2170000 2b015201 33003cc2 Y.......+.R.3.<. + 3210 2d104002 1800002b 01520208 6e002ac7 -.@....+.R..n.*. + 3220 2d104059 1b000015 1800002b 01520133 -.@Y.......+.R.3 + 3230 003cd12d 10402518 00002b01 5202086e .<.-.@%...+.R..n + 3240 002ad62d 1040591b 00003818 00002b01 .*.-.@Y...8...+. + 3250 52013200 3ce02d10 40481800 002b0152 R.2.<.-.@H...+.R + 3260 02086e00 2ae52d10 400f1b00 005c1800 ..n.*.-.@....\.. + 3270 002b0152 02082800 2aea2d10 400f1b00 .+.R..(.*.-.@... + 3280 006f1800 002b0152 013c0032 ed2d1040 .o...+.R.<.2.-.@ + 3290 82160000 2af22d10 400f1b00 008b1800 ....*.-.@....... + 32a0 002b0152 01360032 f52d1040 94110000 .+.R.6.2.-.@.... + 32b0 32f82d10 401d1900 00003d0b 0b000001 2.-.@.....=..... + 32c0 d7010601 e1180000 3e790d00 0001d701 ........>y...... + 32d0 2ae10200 003ef603 000001d7 014ee102 *....>.......N.. + 32e0 00003e39 0e000001 d70162e1 1800003e ..>9......b....> + 32f0 460c0000 01d70194 e6100000 000904fe F............... + 3300 0000003d a50d0000 01c7010d 011d1900 ...=............ + 3310 003e790d 000001c7 0132e118 00003ef6 .>y......2....>. + 3320 03000001 c7014fe1 1800003e 390e0000 ......O....>9... + 3330 01c70162 e1180000 003f0d0e 000001bd ...b.....?...... + 3340 010d642c 10402900 0000019c 60190000 ..d,.@).....`... + 3350 30980000 00407900 01bf0111 fe000000 0....@y......... + 3360 00309800 00003a78 0001c101 15fe0000 .0....:x........ + 3370 00cf0900 00c10900 00000000 41590e00 ............AY.. + 3380 0001b601 0d482c10 40170000 00019c3f .....H,.@......? + 3390 660c0000 01a7010d 00000000 00000000 f............... + 33a0 019c2c1a 0000283a 0b000001 a7012bf8 ..,...(:......+. + 33b0 09000033 0a00002f 0a000028 ae0b0000 ...3.../...(.... + 33c0 01a7013b fe000000 580a0000 540a0000 ...;....X...T... + 33d0 28940e00 0001a701 48c20900 00810a00 (.......H....... + 33e0 00790a00 0042b000 00001a1a 00002da4 .y...B........-. + 33f0 0b000001 ab0111fe 000000bc 0a0000b8 ................ + 3400 0a000030 c8000000 3a740001 ac0116fe ...0....:t...... + 3410 000000e4 0a0000da 0a00002c 00000000 ...........,.... + 3420 4f1c0000 2b015202 7d002b01 53050300 O...+.R.}.+.S... + 3430 00000000 00002c00 00000073 1c00002b ......,....s...+ + 3440 015203f3 01520000 3d7e0e00 00019301 .R...R..=~...... + 3450 0d01621a 00003776 616c0001 930127dd ..b...7val....'. + 3460 0000003e 490b0000 01930132 c2090000 ...>I......2.... + 3470 388d0d00 00019501 0e0f0100 000043d6 8.............C. + 3480 0a000001 a506c02b 10402b00 0000019c .......+.@+..... + 3490 c51a0000 44e00a00 0001a51d fe000000 ....D........... + 34a0 2a0b0000 260b0000 2acf2b10 40591b00 *...&...*.+.@Y.. + 34b0 00a21a00 002b0152 047c0034 25002ad5 .....+.R.|.4%.*. + 34c0 2b104059 1b0000b8 1a00002b 0152047c +.@Y.......+.R.| + 34d0 003f1a00 35e22b10 402b0152 02087800 .?..5.+.@+.R..x. + 34e0 0043580d 0000019f 06142c10 40260000 .CX.......,.@&.. + 34f0 00019c0f 1b000044 e60d0000 019f1dfe .......D........ + 3500 0000004f 0b00004b 0b00003c 2c2c1040 ...O...K...<,,.@ + 3510 fe1a0000 2b015201 30002c31 2c104062 ....+.R.0.,1,.@b + 3520 1a00002b 0152027c 00000043 ef0b0000 ...+.R.|...C.... + 3530 01990dec 2b104026 00000001 9c591b00 ....+.@&.....Y.. + 3540 0045636d 64000199 23fe0000 00740b00 .Ecmd...#....t.. + 3550 00700b00 003c042c 1040481b 00002b01 .p...<.,.@H...+. + 3560 52013000 2c092c10 40621a00 002b0152 R.0.,.,.@b...+.R + 3570 027c0000 00432c0c 00000191 06882b10 .|...C,.......+. + 3580 40350000 00019cae 1b000044 e60d0000 @5.........D.... + 3590 019122fe 0000009b 0b000095 0b00003c .."............< + 35a0 a02b1040 921b0000 2b015201 32003ca9 .+.@....+.R.2.<. + 35b0 2b1040a2 1b00002b 0152027d 000035b2 +.@....+.R.}..5. + 35c0 2b10402b 01520132 00004667 0d000001 +.@+.R.2..Fg.... + 35d0 880d0146 290e0000 017f0d01 46eb0d00 ...F).......F... + 35e0 00017a0d 01472c1a 00000000 00000000 ..z..G,......... + 35f0 0000019c 0d1c0000 2f3a1a00 00cd0b00 ......../:...... + 3600 00c70b00 002f471a 0000fd0b 0000f90b ...../G......... + 3610 00003154 1a000022 0c00001e 0c000032 ..1T...".......2 + 3620 00000000 4f1c0000 00470f15 00000000 ....O....G...... + 3630 00000000 0000019c 4f1c0000 2f1d1500 ........O.../... + 3640 00480c00 00440c00 00312815 00006d0c .H...D...1(...m. + 3650 0000690c 00002c00 000000c5 1a00002b ..i...,........+ + 3660 015206f3 015208ff 1a000048 6f0b0000 .R...R.....Ho... + 3670 6f0b0000 0d220848 420d0000 420d0000 o....".HB...B... + 3680 0ef40548 260d0000 260d0000 052d3248 ...H&...&....-2H + 3690 ff030000 ff030000 0d290900 bb0c0000 .........)...... + 36a0 04006409 00000401 97040000 0cb10f00 ..d............. + 36b0 004a0600 00400200 00000000 00ff1b00 .J...@.......... + 36c0 00020106 d7060000 039b0d00 00022b18 ..............+. + 36d0 38000000 020108d5 06000002 02058d04 8............... + 36e0 00000363 0f000002 39195200 00000202 ...c....9.R..... + 36f0 079b0700 00040405 696e7400 03020e00 ........int..... + 3700 00024f19 6c000000 020407bd 01000002 ..O.l........... + 3710 08055a03 00000208 07b30100 00020804 ..Z............. + 3720 0f040000 0504031f 00000003 0b0d5900 ..............Y. + 3730 000003db 00000003 0c118a00 00000204 ................ + 3740 055f0300 0003bd07 0000042c 0ea20000 ._.........,.... + 3750 00030e01 00000472 0ea20000 00064306 .......r......C. + 3760 00000565 01176c00 00000704 04a603f0 ...e..l......... + 3770 00000008 0e030000 04a80cc1 00000008 ................ + 3780 a6050000 04a913f0 00000000 09380000 .............8.. + 3790 00000100 000a6c00 00000300 0b0804a3 ......l......... + 37a0 09240100 000c7a01 000004a5 07590000 .$....z......Y.. + 37b0 00000c88 02000004 aa05ce00 00000400 ................ + 37c0 03c40300 0004ab03 00010000 03f10200 ................ + 37d0 0004af1b 96000000 020407b8 01000003 ................ + 37e0 87030000 0616193c 0100000d 2e010000 .......<........ + 37f0 18062f08 a9010000 0c250800 00063113 ../......%....1. + 3800 a9010000 000e5f6b 00063207 59000000 ......_k..2.Y... + 3810 040ced05 00000632 0b590000 00080ca0 .......2.Y...... + 3820 05000006 32145900 00000c0c df010000 ....2.Y......... + 3830 06321b59 00000010 0e5f7800 06330baf .2.Y....._x..3.. + 3840 01000014 000f044f 01000009 43010000 .......O....C... + 3850 bf010000 0a6c0000 0000000d 16060000 .....l.......... + 3860 24063708 42020000 0c5a0200 00063909 $.7.B....Z....9. + 3870 59000000 000c9301 0000063a 09590000 Y..........:.Y.. + 3880 00040c5f 01000006 3b095900 0000080c ..._....;.Y..... + 3890 ce020000 063c0959 0000000c 0c060400 .....<.Y........ + 38a0 00063d09 59000000 100cc005 0000063e ..=.Y..........> + 38b0 09590000 00140c36 01000006 3f095900 .Y.....6....?.Y. + 38c0 0000180c 63020000 06400959 0000001c ....c....@.Y.... + 38d0 0ceb0300 00064109 59000000 2000102f ......A.Y... ../ + 38e0 00000008 01064a08 87020000 0c810700 ......J......... + 38f0 00064b0a 87020000 000ca206 0000064c ..K............L + 3900 09870200 008011ae 07000006 4e0a4301 ............N.C. + 3910 00000001 11fc0700 0006510a 43010000 ..........Q.C... + 3920 04010009 88000000 97020000 0a6c0000 .............l.. + 3930 001f000d 72040000 8c065508 d9020000 ....r.....U..... + 3940 0c250800 00065612 d9020000 000c7202 .%....V.......r. + 3950 00000657 06590000 00040c21 01000006 ...W.Y.....!.... + 3960 5809df02 0000080c 1a030000 065920f6 X............Y . + 3970 02000088 000f0497 02000009 ef020000 ................ + 3980 ef020000 0a6c0000 001f000f 04f50200 .....l.......... + 3990 00120f04 42020000 0d1c0700 00080675 ....B..........u + 39a0 08240300 000c6803 00000676 11240300 .$....h....v.$.. + 39b0 00000cb7 07000006 77065900 00000400 ........w.Y..... + 39c0 0f043800 00000d3e 03000020 0699089d ..8....>... .... + 39d0 0300000e 5f700006 9a122403 0000000e ...._p....$..... + 39e0 5f720006 9b075900 0000040e 5f770006 _r....Y....._w.. + 39f0 9c075900 0000080c 8a000000 069d093f ..Y............? + 3a00 0000000c 0cac0300 00069e09 3f000000 ............?... + 3a10 0e0e5f62 6600069f 11fc0200 00100c08 .._bf........... + 3a20 07000006 a0075900 0000180c e50d0000 ......Y......... + 3a30 06a21201 0500001c 00132a03 000014cf ..........*..... + 3a40 050000f0 06740108 01050000 15910000 .....t.......... + 3a50 00067801 07590000 0000154b 08000006 ..x..Y.....K.... + 3a60 7d010b54 07000004 15d30000 00067d01 }..T..........}. + 3a70 14540700 000815ec 07000006 7d011e54 .T..........}..T + 3a80 0700000c 156d0200 00067f01 08590000 .....m.......Y.. + 3a90 0010152a 02000006 81010968 06000014 ...*.......h.... + 3aa0 15330300 00068301 07590000 001815ca .3.......Y...... + 3ab0 07000006 85010759 0000001c 156c0700 .......Y.....l.. + 3ac0 00068601 16bc0800 0020165f 6d700006 ......... ._mp.. + 3ad0 880112c2 08000024 15ba0300 00068a01 .......$........ + 3ae0 0ad30800 0028154b 03000006 8c010759 .....(.K.......Y + 3af0 0000002c 15e50500 00068f01 07590000 ...,.........Y.. + 3b00 003015cd 06000006 90010968 06000034 .0.........h...4 + 3b10 15630000 00069201 13d90800 003815d6 .c...........8.. + 3b20 05000006 930110df 0800003c 15ca0100 ...........<.... + 3b30 00069401 09680600 004015d8 02000006 .....h...@...... + 3b40 97010bf0 08000044 15720400 00069b01 .......D.r...... + 3b50 13d90200 0048151b 04000006 9c011297 .....H.......... + 3b60 0200004c 15290700 00069f01 10150700 ...L.).......... + 3b70 00d8159c 01000006 a0010b54 070000e4 ...........T.... + 3b80 15000000 0006a101 17fc0800 00e81568 ...............h + 3b90 00000006 a2010968 060000ec 000f04a2 .......h........ + 3ba0 0300000d d7010000 6806b508 4a060000 ........h...J... + 3bb0 0e5f7000 06b61224 03000000 0e5f7200 ._p....$....._r. + 3bc0 06b70759 00000004 0e5f7700 06b80759 ...Y....._w....Y + 3bd0 00000008 0c8a0000 0006b909 3f000000 ............?... + 3be0 0c0cac03 000006ba 093f0000 000e0e5f .........?....._ + 3bf0 62660006 bb11fc02 0000100c 08070000 bf.............. + 3c00 06bc0759 00000018 0ce50d00 0006bf12 ...Y............ + 3c10 01050000 1c0c2601 000006c3 0a880000 ......&......... + 3c20 00200cfa 00000006 c51d7a06 0000240c . ........z...$. + 3c30 3d000000 06c71da4 06000028 0c360800 =..........(.6.. + 3c40 0006ca0d c8060000 2c0c2c03 000006cb ........,.,..... + 3c50 09e20600 00300e5f 75620006 ce11fc02 .....0._ub...... + 3c60 0000340e 5f757000 06cf1224 0300003c ..4._up....$...< + 3c70 0e5f7572 0006d007 59000000 400c3c08 ._ur....Y...@.<. + 3c80 000006d3 11e80600 00440cc4 07000006 .........D...... + 3c90 d411f806 0000470e 5f6c6200 06d711fc ......G._lb..... + 3ca0 02000048 0c060600 0006da07 59000000 ...H........Y... + 3cb0 500cfe01 000006db 0aa90000 00540c1b P............T.. + 3cc0 06000006 e20c3001 0000580c 7a040000 ......0...X.z... + 3cd0 06e40e24 0100005c 0cf40700 0006e509 ...$...\........ + 3ce0 59000000 64001759 00000068 06000018 Y...d..Y...h.... + 3cf0 01050000 18880000 00186806 00001859 ..........h....Y + 3d00 00000000 0f046e06 00000201 08de0600 ......n......... + 3d10 00136e06 00000f04 4a060000 17590000 ..n.....J....Y.. + 3d20 009e0600 00180105 00001888 00000018 ................ + 3d30 9e060000 18590000 00000f04 75060000 .....Y......u... + 3d40 0f048006 000017b5 000000c8 06000018 ................ + 3d50 01050000 18880000 0018b500 00001859 ...............Y + 3d60 00000000 0f04aa06 00001759 000000e2 ...........Y.... + 3d70 06000018 01050000 18880000 00000f04 ................ + 3d80 ce060000 09380000 00f80600 000a6c00 .....8........l. + 3d90 00000200 09380000 00080700 000a6c00 .....8........l. + 3da0 00000000 06580100 00061f01 1a070500 .....X.......... + 3db0 00142307 00000c06 2301084e 07000015 ..#.....#..N.... + 3dc0 25080000 06250111 4e070000 00153c06 %....%..N.....<. + 3dd0 00000626 01075900 00000415 14030000 ...&..Y......... + 3de0 0627010b 54070000 08000f04 15070000 .'..T........... + 3df0 0f040807 000014a1 01000018 063f0108 .............?.. + 3e00 a1070000 151a0800 00064001 12a10700 ..........@..... + 3e10 00001578 03000006 410112a1 07000006 ...x....A....... + 3e20 15110700 00064201 12520000 000c1520 ......B..R..... + 3e30 08000006 4501247a 00000010 00095200 ....E.$z......R. + 3e40 0000b107 00000a6c 00000002 0014e403 .......l........ + 3e50 00001006 580108f8 07000015 40010000 ....X.......@... + 3e60 065b0113 a9010000 0015a901 0000065c .[.............\ + 3e70 01075900 00000415 90020000 065d0113 ..Y..........].. + 3e80 a9010000 08156e03 0000065e 0114f807 ......n....^.... + 3e90 00000c00 0f04a901 000014ca 05000050 ...............P + 3ea0 06620108 a7080000 153d0700 00066501 .b.......=....e. + 3eb0 09680600 000015a6 02000006 66010e24 .h..........f..$ + 3ec0 01000004 15440000 00066701 0e240100 .....D....g..$.. + 3ed0 000c154a 07000006 68010e24 01000014 ...J....h..$.... + 3ee0 15f50500 00066901 08a70800 001c15fb ......i......... + 3ef0 06000006 6a010759 00000024 15000100 ....j..Y...$.... + 3f00 00066b01 0e240100 002815e2 02000006 ..k..$...(...... + 3f10 6c010e24 01000030 15770200 00066d01 l..$...0.w....m. + 3f20 0e240100 0038159d 03000006 6e010e24 .$...8......n..$ + 3f30 01000040 15950200 00066f01 0e240100 ...@......o..$.. + 3f40 00480009 6e060000 b7080000 0a6c0000 .H..n........l.. + 3f50 00070019 2b080000 0f04b708 00000f04 ....+........... + 3f60 b1070000 1ad30800 00180105 0000000f ................ + 3f70 04c80800 000f045a 0700000f 04bf0100 .......Z........ + 3f80 001af008 00001859 00000000 0f04f608 .......Y........ + 3f90 00000f04 e5080000 0f04fe07 00001b42 ...............B + 3fa0 08000006 a501229d 0300001b ca000000 ......"......... + 3fb0 06a60122 9d030000 1be30700 0006a701 ..."............ + 3fc0 229d0300 001bad05 0000060a 03180105 "............... + 3fd0 0000039d 0d000007 18132c00 00000365 ..........,....e + 3fe0 0f000007 24144600 00000304 0e000007 ....$.F......... + 3ff0 30146000 00001c41 0b000007 046c0000 0.`....A.....l.. + 4000 0008100a 85090000 1d780c00 00001d7f .........x...... + 4010 0c000001 1d120c00 00021d28 0b000003 ...........(.... + 4020 0003e50e 00000818 14ef0200 0003020d ................ + 4030 00000819 14ef0200 0003cc0b 0000081a ................ + 4040 14ef0200 0003cc0e 0000081b 14b50900 ................ + 4050 000f04bb 0900001a c6090000 18360900 .............6.. + 4060 000003e9 0c000008 1c17d209 00000f04 ................ + 4070 d8090000 1e360900 0003ff0b 0000081d .....6.......... + 4080 14e90900 000f04ef 0900001a fa090000 ................ + 4090 185a0900 000003fd 0b000008 1e14e909 .Z.............. + 40a0 000003a5 0c000008 1f14120a 00000f04 ................ + 40b0 180a0000 1a230a00 00184e09 0000000d .....#....N..... + 40c0 9e0e0000 2008210c 990a0000 0cc80a00 .... .!......... + 40d0 0008232b 85090000 000cf20a 00000824 ..#+...........$ + 40e0 2d910900 00040c8c 0b000008 252c9d09 -...........%,.. + 40f0 0000080c 5c0d0000 082622a9 0900000c ....\....&"..... + 4100 0ce10d00 00082722 c6090000 100c280f ......'"......(. + 4110 00000828 1cdd0900 00140c41 0f000008 ...(.......A.... + 4120 291efa09 0000180c a80f0000 082a1906 )............*.. + 4130 0a00001c 0013230a 00000204 048d0100 ......#......... + 4140 00020804 14040000 1ff40d00 00014634 ..............F4 + 4150 990a0000 05035c87 fe3f20a1 0f000001 ......\..? ..... + 4160 dd0d182f 10401500 0000019c fe0a0000 .../.@.......... + 4170 21a80f00 0001dd26 4e090000 920c0000 !......&N....... + 4180 8e0c0000 22262f10 40a60c00 00230152 ...."&/.@....#.R + 4190 07f30152 0affff1a 0000203d 0f000001 ...R...... =.... + 41a0 c20d302f 10403300 0000019c 3d0b0000 ..0/.@3.....=... + 41b0 216e0f00 0001c228 5a090000 bd0c0000 !n.....(Z....... + 41c0 b30c0000 22582f10 40b20c00 00230152 ...."X/.@....#.R + 41d0 01302301 55013000 0020240f 000001a7 .0#.U.0.. $..... + 41e0 0d642f10 40330000 00019c7c 0b000021 .d/.@3.....|...! + 41f0 6e0f0000 01a7265a 0900000c 0d000002 n.....&Z........ + 4200 0d000022 8c2f1040 b20c0000 23015301 ..."./.@....#.S. + 4210 30230155 01300000 244b0f00 00019910 0#.U.0..$K...... + 4220 36090000 80601040 02000000 019c20cb 6....`.@...... . + 4230 0f000001 7b0da42f 10407300 0000019c ....{../.@s..... + 4240 e10b0000 21e60d00 00017b2d 36090000 ....!.....{-6... + 4250 570d0000 510d0000 25c62f10 40b20c00 W...Q...%./.@... + 4260 0025de2f 1040b20c 000025f6 2f1040b2 .%./.@....%./.@. + 4270 0c000025 0e301040 b20c0000 0020e30f ...%.0.@..... .. + 4280 00000171 0d1c3010 401b0000 00019c18 ...q..0.@....... + 4290 0c000022 30301040 b20c0000 23015201 ..."00.@....#.R. + 42a0 30230153 01302301 54013023 0155030a 0#.S.0#.T.0#.U.. + 42b0 00f00000 20070f00 0001670d 38301040 .... .....g.80.@ + 42c0 1b000000 019c510c 0000224c 301040b2 ......Q..."L0.@. + 42d0 0c000023 01520130 23015303 0a00f023 ...#.R.0#.S....# + 42e0 0154030a 00f02301 55013000 0020760f .T....#.U.0.. v. + 42f0 00000157 0d743010 40a30000 00019c8a ...W.t0.@....... + 4300 0c000022 10311040 b20c0000 23015201 ...".1.@....#.R. + 4310 30230153 030a1af0 23015403 0a1af023 0#.S....#.T....# + 4320 01550130 00002626 0d000001 502ea00c .U.0..&&....P... + 4330 00001c31 10400500 0000019c 0f04990a ...1.@.......... + 4340 00002730 0f000030 0f000009 21062791 ..'0...0....!.'. + 4350 0f000091 0f00000a 460600f0 00000004 ........F....... + 4360 00990b00 0004010d 10000001 5e100000 ............^... + 4370 84601040 17000000 2d210000 020106d7 .`.@....-!...... + 4380 06000002 0108d506 00000202 058d0400 ................ + 4390 00020207 9b070000 03040569 6e740002 ...........int.. + 43a0 0407bd01 00000208 055a0300 00020807 .........Z...... + 43b0 b3010000 0204055f 03000002 0407c410 ......._........ + 43c0 00000404 020407b8 01000002 0108de06 ................ + 43d0 000005ff 0f000002 d6440000 00065710 .........D....W. + 43e0 00000315 67000000 84601040 17000000 ....g....`.@.... + 43f0 019ce100 0000074e 10000001 48e10000 .......N....H... + 4400 00830d00 00086300 01483d00 0000a40d ......c..H=..... + 4410 00000706 10000001 48770000 00c50d00 ........Hw...... + 4420 00097372 6300014d e8000000 f60d0000 ..src..M........ + 4430 0a640001 4e280000 00015300 0b04e700 .d..N(....S..... + 4440 00000c0b 04ee0000 000d2800 00000067 ..........(....g + 4450 00000004 00420c00 0004010d 10000001 .....B.......... + 4460 db100000 e4220000 02cd1000 00012d2a ....."........-* + 4470 00000005 033480fe 3f030430 00000004 .....4..?..0.... + 4480 35000000 050108de 06000006 35000000 5...........5... + 4490 4d000000 074d0000 00000100 050407c4 M....M.......... + 44a0 10000002 40110000 016d6500 00000503 ....@....me..... + 44b0 f784fe3f 043c0000 00000701 00000200 ...?.<.......... + 44c0 8e0c0000 04016a23 0000e062 10402963 ......j#...b.@)c + 44d0 10402f68 6f6d652f 776a672f 5265706f .@/home/wjg/Repo + 44e0 2f657370 2d6f7065 6e2d7364 6b2d3230 /esp-open-sdk-20 + 44f0 31373036 32322f63 726f7373 746f6f6c 170622/crosstool + 4500 2d4e472f 2e627569 6c642f73 72632f67 -NG/.build/src/g + 4510 63632d34 2e382e35 2f6c6962 6763632f cc-4.8.5/libgcc/ + 4520 636f6e66 69672f78 74656e73 612f6c69 config/xtensa/li + 4530 62316675 6e63732e 53002f68 6f6d652f b1funcs.S./home/ + 4540 776a672f 5265706f 2f657370 2d6f7065 wjg/Repo/esp-ope + 4550 6e2d7364 6b2d3230 31373036 32322f63 n-sdk-20170622/c + 4560 726f7373 746f6f6c 2d4e472f 2e627569 rosstool-NG/.bui + 4570 6c642f78 74656e73 612d6c78 3130362d ld/xtensa-lx106- + 4580 656c662f 6275696c 642f6275 696c642d elf/build/build- + 4590 63632d67 63632d66 696e616c 2f787465 cc-gcc-final/xte + 45a0 6e73612d 6c783130 362d656c 662f6c69 nsa-lx106-elf/li + 45b0 62676363 00474e55 20415320 322e3235 bgcc.GNU AS 2.25 + 45c0 2e310001 80080100 000200a2 0c000004 .1.............. + 45d0 018d2400 00b45e10 40e95f10 402f686f ..$...^.@._.@/ho + 45e0 6d652f77 6a672f52 65706f2f 6573702d me/wjg/Repo/esp- + 45f0 6f70656e 2d73646b 2d323031 37303632 open-sdk-2017062 + 4600 322f6372 6f737374 6f6f6c2d 4e472f2e 2/crosstool-NG/. + 4610 6275696c 642f7372 632f6763 632d342e build/src/gcc-4. + 4620 382e352f 6c696267 63632f63 6f6e6669 8.5/libgcc/confi + 4630 672f7874 656e7361 2f696565 65373534 g/xtensa/ieee754 + 4640 2d73662e 53002f68 6f6d652f 776a672f -sf.S./home/wjg/ + 4650 5265706f 2f657370 2d6f7065 6e2d7364 Repo/esp-open-sd + 4660 6b2d3230 31373036 32322f63 726f7373 k-20170622/cross + 4670 746f6f6c 2d4e472f 2e627569 6c642f78 tool-NG/.build/x + 4680 74656e73 612d6c78 3130362d 656c662f tensa-lx106-elf/ + 4690 6275696c 642f6275 696c642d 63632d67 build/build-cc-g + 46a0 63632d66 696e616c 2f787465 6e73612d cc-final/xtensa- + 46b0 6c783130 362d656c 662f6c69 62676363 lx106-elf/libgcc + 46c0 00474e55 20415320 322e3235 2e310001 .GNU AS 2.25.1.. + 46d0 80080100 000200b6 0c000004 01af2700 ..............'. + 46e0 00ec5f10 402c6010 402f686f 6d652f77 .._.@,`.@/home/w + 46f0 6a672f52 65706f2f 6573702d 6f70656e jg/Repo/esp-open + 4700 2d73646b 2d323031 37303632 322f6372 -sdk-20170622/cr + 4710 6f737374 6f6f6c2d 4e472f2e 6275696c osstool-NG/.buil + 4720 642f7372 632f6763 632d342e 382e352f d/src/gcc-4.8.5/ + 4730 6c696267 63632f63 6f6e6669 672f7874 libgcc/config/xt + 4740 656e7361 2f696565 65373534 2d73662e ensa/ieee754-sf. + 4750 53002f68 6f6d652f 776a672f 5265706f S./home/wjg/Repo + 4760 2f657370 2d6f7065 6e2d7364 6b2d3230 /esp-open-sdk-20 + 4770 31373036 32322f63 726f7373 746f6f6c 170622/crosstool + 4780 2d4e472f 2e627569 6c642f78 74656e73 -NG/.build/xtens + 4790 612d6c78 3130362d 656c662f 6275696c a-lx106-elf/buil + 47a0 642f6275 696c642d 63632d67 63632d66 d/build-cc-gcc-f + 47b0 696e616c 2f787465 6e73612d 6c783130 inal/xtensa-lx10 + 47c0 362d656c 662f6c69 62676363 00474e55 6-elf/libgcc.GNU + 47d0 20415320 322e3235 2e310001 80 AS 2.25.1... +Contents of section .debug_abbrev: + 0000 01110125 0e130b03 0e1b0e55 17110110 ...%.......U.... + 0010 17000002 1600030e 3a0b3b0b 390b4913 ........:.;.9.I. + 0020 00000326 00491300 00042400 0b0b3e0b ...&.I....$...>. + 0030 030e0000 0524000b 0b3e0b03 08000006 .....$...>...... + 0040 15012719 01130000 07050049 13000008 ..'........I.... + 0050 0f000b0b 00000913 01030e0b 0b3a0b3b .............:.; + 0060 0b390b01 1300000a 0d00030e 3a0b3b0b .9..........:.;. + 0070 390b4913 380b0000 0b0f000b 0b491300 9.I.8........I.. + 0080 000c1600 030e3a0b 3b05390b 49130000 ......:.;.9.I... + 0090 0d17010b 0b3a0b3b 0b390b01 1300000e .....:.;.9...... + 00a0 0d00030e 3a0b3b0b 390b4913 00000f01 ....:.;.9.I..... + 00b0 01491301 13000010 21004913 2f0b0000 .I......!.I./... + 00c0 1113010b 0b3a0b3b 0b390b01 13000012 .....:.;.9...... + 00d0 0d000308 3a0b3b0b 390b4913 380b0000 ....:.;.9.I.8... + 00e0 13130103 0e0b053a 0b3b0b39 0b011300 .......:.;.9.... + 00f0 00140d00 030e3a0b 3b0b390b 49133805 ......:.;.9.I.8. + 0100 00001515 00271900 00161301 030e0b0b .....'.......... + 0110 3a0b3b05 390b0113 0000170d 00030e3a :.;.9..........: + 0120 0b3b0539 0b491338 0b000018 0d000308 .;.9.I.8........ + 0130 3a0b3b05 390b4913 380b0000 19150127 :.;.9.I.8......' + 0140 19491301 1300001a 1300030e 3c190000 .I..........<... + 0150 1b340003 0e3a0b3b 05390b49 133f193c .4...:.;.9.I.?.< + 0160 1900001c 0401030e 3e0b0b0b 49133a0b ........>...I.:. + 0170 3b0b390b 01130000 1d280003 0e1c0b00 ;.9......(...... + 0180 001e2800 03081c0b 00001f34 00030e3a ..(........4...: + 0190 0b3b0b39 0b49131c 0a000020 3400030e .;.9.I..... 4... + 01a0 3a0b3b0b 390b4913 00002134 00030e3a :.;.9.I...!4...: + 01b0 0b3b0b39 0b49133f 193c1900 00220401 .;.9.I.?.<...".. + 01c0 3e0b0b0b 49133a0b 3b0b390b 01130000 >...I.:.;.9..... + 01d0 23340003 0e3a0b3b 0b390b49 133f1902 #4...:.;.9.I.?.. + 01e0 18000024 34000308 3a0b3b0b 390b4913 ...$4...:.;.9.I. + 01f0 3f190218 00002534 00030e3a 0b3b0b39 ?.....%4...:.;.9 + 0200 0b491302 18000026 2e01030e 3a0b3b0b .I.....&....:.;. + 0210 390b2719 200b0113 00002705 0003083a 9.'. .....'....: + 0220 0b3b0b39 0b491300 00280500 030e3a0b .;.9.I...(....:. + 0230 3b0b390b 49130000 290b0100 002a3400 ;.9.I...)....*4. + 0240 03083a0b 3b0b390b 49130000 2b2e013f ..:.;.9.I...+..? + 0250 19030e3a 0b3b0b39 0b271911 01120640 ...:.;.9.'.....@ + 0260 18974219 01130000 2c898201 00110131 ..B.....,......1 + 0270 1300002d 89820101 11013113 01130000 ...-......1..... + 0280 2e8a8201 00021891 42180000 2f898201 ........B.../... + 0290 01110131 13000030 05000308 3a0b3b0b ...1...0....:.;. + 02a0 390b4913 0217b742 17000031 1d013113 9.I....B...1..1. + 02b0 5201b842 0b551758 0b590b57 0b011300 R..B.U.X.Y.W.... + 02c0 00320500 31130217 b7421700 00330b01 .2..1....B...3.. + 02d0 31135517 01130000 34340031 130217b7 1.U.....44.1.... + 02e0 42170000 350b0155 17000036 2e003f19 B...5..U...6..?. + 02f0 3c196e0e 030e3a0b 3b0b390b 00000001 <.n...:.;.9..... + 0300 1101250e 130b030e 1b0e5517 11011017 ..%.......U..... + 0310 00000224 000b0b3e 0b030e00 00031600 ...$...>........ + 0320 030e3a0b 3b0b390b 49130000 0424000b ..:.;.9.I....$.. + 0330 0b3e0b03 08000005 0f000b0b 00000616 .>.............. + 0340 00030e3a 0b3b0539 0b491300 00071701 ...:.;.9.I...... + 0350 0b0b3a0b 3b0b390b 01130000 080d0003 ..:.;.9......... + 0360 0e3a0b3b 0b390b49 13000009 01014913 .:.;.9.I......I. + 0370 01130000 0a210049 132f0b00 000b1301 .....!.I./...... + 0380 0b0b3a0b 3b0b390b 01130000 0c0d0003 ..:.;.9......... + 0390 0e3a0b3b 0b390b49 13380b00 000d0f00 .:.;.9.I.8...... + 03a0 0b0b4913 00000e26 00491300 000f1301 ..I....&.I...... + 03b0 030e0b0b 3a0b3b0b 390b0113 0000100d ....:.;.9....... + 03c0 0003083a 0b3b0b39 0b491338 0b000011 ...:.;.9.I.8.... + 03d0 1301030e 0b053a0b 3b0b390b 01130000 ......:.;.9..... + 03e0 120d0003 0e3a0b3b 0b390b49 13380500 .....:.;.9.I.8.. + 03f0 00131500 27190000 14130103 0e0b0b3a ....'..........: + 0400 0b3b0539 0b011300 00150d00 030e3a0b .;.9..........:. + 0410 3b05390b 4913380b 0000160d 0003083a ;.9.I.8........: + 0420 0b3b0539 0b491338 0b000017 15012719 .;.9.I.8......'. + 0430 49130113 00001805 00491300 00191300 I........I...... + 0440 030e3c19 00001a15 01271901 1300001b ..<......'...... + 0450 3400030e 3a0b3b05 390b4913 3f193c19 4...:.;.9.I.?.<. + 0460 00001c04 013e0b0b 0b49133a 0b3b0539 .....>...I.:.;.9 + 0470 0b011300 001d2800 030e1c0b 00001e13 ......(......... + 0480 010b0b3a 0b3b0539 0b011300 001f3400 ...:.;.9......4. + 0490 030e3a0b 3b0b390b 49130218 0000202e ..:.;.9.I..... . + 04a0 013f1903 0e3a0b3b 0b390b27 19110112 .?...:.;.9.'.... + 04b0 06401897 42190113 00002189 82010111 .@..B.....!..... + 04c0 01311301 13000022 8a820100 02189142 .1.....".......B + 04d0 18000023 89820101 11013113 0000242e ...#......1...$. + 04e0 003f193c 196e0e03 0e3a0b3b 05390b00 .?.<.n...:.;.9.. + 04f0 00252e00 3f193c19 6e0e030e 3a0b3b0b .%..?.<.n...:.;. + 0500 390b0000 00011101 250e130b 030e1b0e 9.......%....... + 0510 55171101 10170000 02040103 0e3e0b0b U............>.. + 0520 0b49133a 0b3b0b39 0b011300 00032800 .I.:.;.9......(. + 0530 030e1c0b 00000424 000b0b3e 0b030e00 .......$...>.... + 0540 00052800 03081c0b 00000616 00030e3a ..(............: + 0550 0b3b0b39 0b491300 00072400 0b0b3e0b .;.9.I....$...>. + 0560 03080000 08260049 13000009 0f000b0b .....&.I........ + 0570 49130000 0a150027 1900000b 15012719 I......'......'. + 0580 01130000 0c050049 1300000d 15002719 .......I......'. + 0590 49130000 0e130103 0e0b0b3a 0b3b0b39 I..........:.;.9 + 05a0 0b011300 000f0d00 030e3a0b 3b0b390b ..........:.;.9. + 05b0 4913380b 00001001 01491301 13000011 I.8......I...... + 05c0 21004913 2f0b0000 12340003 0e3a0b3b !.I./....4...:.; + 05d0 0b390b49 131c0a00 00133400 030e3a0b .9.I......4...:. + 05e0 3b0b390b 49130000 14340003 0e3a0b3b ;.9.I....4...:.; + 05f0 0b390b49 133f193c 19000015 0f000b0b .9.I.?.<........ + 0600 00001616 00030e3a 0b3b0539 0b491300 .......:.;.9.I.. + 0610 00171701 0b0b3a0b 3b0b390b 01130000 ......:.;.9..... + 0620 180d0003 0e3a0b3b 0b390b49 13000019 .....:.;.9.I.... + 0630 13010b0b 3a0b3b0b 390b0113 00001a0d ....:.;.9....... + 0640 0003083a 0b3b0b39 0b491338 0b00001b ...:.;.9.I.8.... + 0650 1301030e 0b053a0b 3b0b390b 01130000 ......:.;.9..... + 0660 1c0d0003 0e3a0b3b 0b390b49 13380500 .....:.;.9.I.8.. + 0670 001d1301 030e0b0b 3a0b3b05 390b0113 ........:.;.9... + 0680 00001e0d 00030e3a 0b3b0539 0b491338 .......:.;.9.I.8 + 0690 0b00001f 0d000308 3a0b3b05 390b4913 ........:.;.9.I. + 06a0 380b0000 20150127 19491301 13000021 8... ..'.I.....! + 06b0 1300030e 3c190000 22340003 0e3a0b3b ....<..."4...:.; + 06c0 05390b49 133f193c 19000023 3400030e .9.I.?.<...#4... + 06d0 3a0b3b0b 390b4913 02180000 24340003 :.;.9.I.....$4.. + 06e0 083a0b3b 0b390b49 13021800 00253400 .:.;.9.I.....%4. + 06f0 47133a0b 3b0b390b 02180000 262e013f G.:.;.9.....&..? + 0700 19030e3a 0b3b0539 0b271911 01120640 ...:.;.9.'.....@ + 0710 18974219 01130000 27050003 083a0b3b ..B.....'....:.; + 0720 05390b49 130217b7 42170000 28050003 .9.I....B...(... + 0730 0e3a0b3b 05390b49 130217b7 42170000 .:.;.9.I....B... + 0740 29340003 0e3a0b3b 05390b49 13021800 )4...:.;.9.I.... + 0750 002a8982 01011101 31130113 00002b8a .*......1.....+. + 0760 82010002 18914218 00002c89 82010111 ......B...,..... + 0770 01311300 002d3400 030e3a0b 3b05390b .1...-4...:.;.9. + 0780 49130217 b7421700 002e1d01 31135201 I....B......1.R. + 0790 b8420b55 17580b59 05570b01 1300002f .B.U.X.Y.W...../ + 07a0 05003113 0217b742 17000030 0b015517 ..1....B...0..U. + 07b0 00003134 00311302 17b74217 00003289 ..14.1....B...2. + 07c0 82010011 01311300 00331d01 31135201 .....1...3..1.R. + 07d0 b8420b11 01120658 0b590557 0b011300 .B.....X.Y.W.... + 07e0 00342e00 3f19030e 3a0b3b05 390b2719 .4..?...:.;.9.'. + 07f0 11011206 40189742 19000035 89820101 ....@..B...5.... + 0800 11010000 362e013f 19030e3a 0b3b0539 ....6..?...:.;.9 + 0810 0b271920 0b011300 00370500 03083a0b .'. .....7....:. + 0820 3b05390b 49130000 38340003 0e3a0b3b ;.9.I...84...:.; + 0830 05390b49 13000039 0b011101 12060113 .9.I...9........ + 0840 00003a34 0003083a 0b3b0539 0b491302 ..:4...:.;.9.I.. + 0850 17b74217 00003b2e 013f1903 0e3a0b3b ..B...;..?...:.; + 0860 05390b27 19110112 06401896 42190113 .9.'.....@..B... + 0870 00003c89 82010111 01011300 003d2e01 ..<..........=.. + 0880 030e3a0b 3b05390b 2719200b 01130000 ..:.;.9.'. ..... + 0890 3e050003 0e3a0b3b 05390b49 1300003f >....:.;.9.I...? + 08a0 2e01030e 3a0b3b05 390b2719 11011206 ....:.;.9.'..... + 08b0 40189742 19011300 00403400 03083a0b @..B.....@4...:. + 08c0 3b05390b 49131c0b 0000412e 00030e3a ;.9.I.....A....: + 08d0 0b3b0539 0b271911 01120640 18974219 .;.9.'.....@..B. + 08e0 0000420b 01551701 13000043 2e01030e ..B..U.....C.... + 08f0 3a0b3b0b 390b2719 11011206 40189742 :.;.9.'.....@..B + 0900 19011300 00440500 030e3a0b 3b0b390b .....D....:.;.9. + 0910 49130217 b7421700 00450500 03083a0b I....B...E....:. + 0920 3b0b390b 49130217 b7421700 00462e00 ;.9.I....B...F.. + 0930 030e3a0b 3b0b390b 2719200b 0000472e ..:.;.9.'. ...G. + 0940 01311311 01120640 18974219 01130000 .1.....@..B..... + 0950 482e003f 193c196e 0e030e3a 0b3b0b39 H..?.<.n...:.;.9 + 0960 0b000000 01110125 0e130b03 0e1b0e55 .......%.......U + 0970 17110110 17000002 24000b0b 3e0b030e ........$...>... + 0980 00000316 00030e3a 0b3b0b39 0b491300 .......:.;.9.I.. + 0990 00042400 0b0b3e0b 03080000 050f000b ..$...>......... + 09a0 0b000006 1600030e 3a0b3b05 390b4913 ........:.;.9.I. + 09b0 00000717 010b0b3a 0b3b0b39 0b011300 .......:.;.9.... + 09c0 00080d00 030e3a0b 3b0b390b 49130000 ......:.;.9.I... + 09d0 09010149 13011300 000a2100 49132f0b ...I......!.I./. + 09e0 00000b13 010b0b3a 0b3b0b39 0b011300 .......:.;.9.... + 09f0 000c0d00 030e3a0b 3b0b390b 4913380b ......:.;.9.I.8. + 0a00 00000d13 01030e0b 0b3a0b3b 0b390b01 .........:.;.9.. + 0a10 1300000e 0d000308 3a0b3b0b 390b4913 ........:.;.9.I. + 0a20 380b0000 0f0f000b 0b491300 00101301 8........I...... + 0a30 030e0b05 3a0b3b0b 390b0113 0000110d ....:.;.9....... + 0a40 00030e3a 0b3b0b39 0b491338 05000012 ...:.;.9.I.8.... + 0a50 15002719 00001326 00491300 00141301 ..'....&.I...... + 0a60 030e0b0b 3a0b3b05 390b0113 0000150d ....:.;.9....... + 0a70 00030e3a 0b3b0539 0b491338 0b000016 ...:.;.9.I.8.... + 0a80 0d000308 3a0b3b05 390b4913 380b0000 ....:.;.9.I.8... + 0a90 17150127 19491301 13000018 05004913 ...'.I........I. + 0aa0 00001913 00030e3c 1900001a 15012719 .......<......'. + 0ab0 01130000 1b340003 0e3a0b3b 05390b49 .....4...:.;.9.I + 0ac0 133f193c 1900001c 0401030e 3e0b0b0b .?.<........>... + 0ad0 49133a0b 3b0b390b 01130000 1d280003 I.:.;.9......(.. + 0ae0 0e1c0b00 001e1500 27194913 00001f34 ........'.I....4 + 0af0 00030e3a 0b3b0b39 0b491302 18000020 ...:.;.9.I..... + 0b00 2e01030e 3a0b3b0b 390b2719 11011206 ....:.;.9.'..... + 0b10 40189742 19011300 00210500 030e3a0b @..B.....!....:. + 0b20 3b0b390b 49130217 b7421700 00228982 ;.9.I....B...".. + 0b30 01011101 31130000 238a8201 00021891 ....1...#....... + 0b40 42180000 242e0003 0e3a0b3b 0b390b27 B...$....:.;.9.' + 0b50 19491311 01120640 18974219 00002589 .I.....@..B...%. + 0b60 82010011 01311300 00262e00 3f19030e .....1...&..?... + 0b70 3a0b3b0b 390b2719 49131101 12064018 :.;.9.'.I.....@. + 0b80 97421900 00272e00 3f193c19 6e0e030e .B...'..?.<.n... + 0b90 3a0b3b0b 390b0000 00011101 250e130b :.;.9.......%... + 0ba0 030e1101 12061017 00000224 000b0b3e ...........$...> + 0bb0 0b030e00 00032400 0b0b3e0b 03080000 ......$...>..... + 0bc0 040f000b 0b000005 1600030e 3a0b3b0b ............:.;. + 0bd0 49130000 062e013f 19030e3a 0b3b0b27 I......?...:.;.' + 0be0 19491311 01120640 18974219 01130000 .I.....@..B..... + 0bf0 07050003 0e3a0b3b 0b491302 17000008 .....:.;.I...... + 0c00 05000308 3a0b3b0b 49130217 00000934 ....:.;.I......4 + 0c10 0003083a 0b3b0b49 13021700 000a3400 ...:.;.I......4. + 0c20 03083a0b 3b0b4913 02180000 0b0f000b ..:.;.I......... + 0c30 0b491300 000c2600 00000d26 00491300 .I....&....&.I.. + 0c40 00000111 01250e13 0b030e10 17000002 .....%.......... + 0c50 3400030e 3a0b3b0b 49133f19 02180000 4...:.;.I.?..... + 0c60 030f000b 0b491300 00042600 49130000 .....I....&.I... + 0c70 0524000b 0b3e0b03 0e000006 01014913 .$...>........I. + 0c80 01130000 07210049 132f0500 00000111 .....!.I./...... + 0c90 00100611 01120103 081b0825 08130500 ...........%.... + 0ca0 00000111 00100611 01120103 081b0825 ...............% + 0cb0 08130500 00000111 00100611 01120103 ................ + 0cc0 081b0825 08130500 0000 ...%...... +Contents of section .debug_loc: + 0000 00000000 60522140 6f522140 0100526f ....`R!@oR!@..Ro + 0010 522140be 52214004 00f30152 9f000000 R!@.R!@....R.... + 0020 00000000 00000000 00ec5221 40ff5221 ..........R!@.R! + 0030 40010052 ff522140 23542140 0400f301 @..R.R!@#T!@.... + 0040 529f0000 00000000 00000100 00004853 R.............HS + 0050 21406f53 21400200 319f8553 21409d53 !@oS!@..1..S!@.S + 0060 21400200 319f0000 00000000 00000000 !@..1........... + 0070 00004853 21406f53 21400100 5f855321 ..HS!@oS!@.._.S! + 0080 409d5321 4001005f 00000000 00000000 @.S!@.._........ + 0090 02000000 00000000 00005153 21405553 ..........QS!@US + 00a0 21400200 309f5553 21406f53 21400100 !@..0.US!@oS!@.. + 00b0 5e855321 408c5321 4001005e 8c532140 ^.S!@.S!@..^.S!@ + 00c0 97532140 03007e7f 9f975321 409d5321 .S!@..~...S!@.S! + 00d0 4001005e 00000000 00000000 01000000 @..^............ + 00e0 b0532140 e1532140 0200319f f1532140 .S!@.S!@..1..S!@ + 00f0 23542140 0200319f 00000000 00000000 #T!@..1......... + 0100 00000000 b0532140 e1532140 01005ff1 .....S!@.S!@.._. + 0110 53214023 54214001 005f0000 00000000 S!@#T!@.._...... + 0120 00000200 00010100 00000001 0100b053 ...............S + 0130 2140c453 21400200 309fc453 2140ca53 !@.S!@..0..S!@.S + 0140 21400100 53ca5321 40e15321 40020030 !@..S.S!@.S!@..0 + 0150 9ff15321 40075421 40010053 0a542140 ..S!@.T!@..S.T!@ + 0160 15542140 01005315 54214023 54214003 .T!@..S.T!@#T!@. + 0170 0009ff9f 00000000 00000000 00000000 ................ + 0180 00000000 00000000 01005200 00000000 ..........R..... + 0190 00000004 00f30152 9f000000 00000000 .......R........ + 01a0 00000000 00000000 00000000 00000001 ................ + 01b0 00530000 00000000 00000100 5c000000 .S..........\... + 01c0 00000000 000400f3 01539f00 00000000 .........S...... + 01d0 00000000 00000000 00000000 00000000 ................ + 01e0 00000001 00520000 00000000 00000100 .....R.......... + 01f0 55000000 00000000 000400f3 01529f00 U............R.. + 0200 00000000 00000001 00550000 00000000 .........U...... + 0210 00000000 00000000 00000000 00000000 ................ + 0220 01005300 00000000 00000001 00540000 ..S..........T.. + 0230 00000000 00000400 f301539f 00000000 ..........S..... + 0240 00000000 00000000 00000000 00000000 ................ + 0250 00000000 01005400 00000000 00000004 ......T......... + 0260 00f30154 9f000000 00000000 00010054 ...T...........T + 0270 00000000 00000000 0400f301 549f0000 ............T... + 0280 00000000 00000000 00000000 00000000 ................ + 0290 00000000 00000100 52000000 00000000 ........R....... + 02a0 00010055 00000000 00000000 0400f301 ...U............ + 02b0 529f0000 00000000 00000100 55000000 R...........U... + 02c0 00000000 00000000 00000000 00000000 ................ + 02d0 00000001 00530000 00000000 00000100 .....S.......... + 02e0 54000000 00000000 000400f3 01539f00 T............S.. + 02f0 00000000 00000000 00000000 00000000 ................ + 0300 00000000 00000001 00540000 00000000 .........T...... + 0310 00000400 f301549f 00000000 00000000 ......T......... + 0320 01005400 00000000 00000004 00f30154 ..T............T + 0330 9f000000 00000000 00020000 00000000 ................ + 0340 01010000 00742e10 40942e10 40020030 .....t..@...@..0 + 0350 9f942e10 40a32e10 40010054 bd2e1040 ....@...@..T...@ + 0360 d02e1040 010054e7 2e1040ec 2e104001 ...@..T...@...@. + 0370 0054ec2e 1040042f 10400200 309f042f .T...@./.@..0../ + 0380 1040182f 10400100 54000000 00000000 .@./.@..T....... + 0390 00030000 00000000 00000074 2e104094 ...........t..@. + 03a0 2e104002 00309f94 2e1040b3 2e104001 ..@..0....@...@. + 03b0 005fbd2e 1040ee2e 10400100 5fee2e10 ._...@...@.._... + 03c0 40f12e10 4003007f 7f9ff12e 1040182f @...@........@./ + 03d0 10400100 5f000000 00000000 00040000 .@.._........... + 03e0 00000001 00000101 00000000 00000074 ...............t + 03f0 2e104094 2e104002 00309f94 2e10409f ..@...@..0....@. + 0400 2e104001 0052bd2e 1040cc2e 10400100 ..@..R...@...@.. + 0410 52d12e10 40e22e10 40020030 9fe22e10 R...@...@..0.... + 0420 40f12e10 40010052 f12e1040 042f1040 @...@..R...@./.@ + 0430 0200309f 042f1040 122f1040 01005212 ..0../.@./.@..R. + 0440 2f104015 2f104003 00727f9f 152f1040 /.@./.@..r.../.@ + 0450 182f1040 01005200 00000000 00000005 ./.@..R......... + 0460 00000000 00742e10 40942e10 40060003 .....t..@...@... + 0470 a48dfe3f 9f942e10 40af2e10 4001005d ...?....@...@..] + 0480 bd2e1040 182f1040 01005d00 00000000 ...@./.@..]..... + 0490 00000002 00000000 00bd2e10 40082f10 ............@./. + 04a0 4001005d 082f1040 102f1040 03007d7f @..]./.@./.@..}. + 04b0 9f102f10 40182f10 4001005d 00000000 ../.@./.@..].... + 04c0 00000000 01000000 bd2e1040 e22e1040 ...........@...@ + 04d0 0600f2db 29000000 102f1040 182f1040 ....)..../.@./.@ + 04e0 0600f2db 29000000 00000000 00000000 ....)........... + 04f0 01000000 bd2e1040 e22e1040 0600f2c6 .......@...@.... + 0500 29000000 102f1040 182f1040 0600f2c6 )..../.@./.@.... + 0510 29000000 00000000 00000000 01000000 )............... + 0520 bd2e1040 e22e1040 0600f2b1 29000000 ...@...@....)... + 0530 102f1040 182f1040 0600f2b1 29000000 ./.@./.@....)... + 0540 00000000 00000000 01000000 d32e1040 ...............@ + 0550 db2e1040 060003a0 8dfe3f06 db2e1040 ...@......?....@ + 0560 dd2e1040 01005200 00000000 00000003 ...@..R......... + 0570 000000d3 2e1040db 2e104006 0003a08d ......@...@..... + 0580 fe3f06db 2e1040dd 2e104001 00520000 .?....@...@..R.. + 0590 00000000 00000200 e22e1040 042f1040 ...........@./.@ + 05a0 0600f2db 29000000 00000000 00000000 ....)........... + 05b0 0200e22e 1040042f 10400600 f2c62900 .....@./.@....). + 05c0 00000000 00000000 00000200 e22e1040 ...............@ + 05d0 042f1040 0600f2b1 29000000 00000000 ./.@....)....... + 05e0 00000000 00000000 0000402e 10404e2e ..........@..@N. + 05f0 10400100 524e2e10 405c2e10 4001005c .@..RN..@\..@..\ + 0600 662e1040 732e1040 01005c00 00000000 f..@s..@..\..... + 0610 00000000 0000002c 2e10402f 2e104001 .......,..@/..@. + 0620 00522f2e 10403d2e 10400400 f301529f .R/..@=..@....R. + 0630 00000000 00000000 00000000 2c2e1040 ............,..@ + 0640 342e1040 01005334 2e10403d 2e104004 4..@..S4..@=..@. + 0650 00f30153 9f000000 00000000 00000000 ...S............ + 0660 000c2e10 401b2e10 40010052 1b2e1040 ....@...@..R...@ + 0670 2b2e1040 0400f301 529f0000 00000000 +..@....R....... + 0680 00000000 0000082d 1040142d 10400100 .......-.@.-.@.. + 0690 52142d10 401a2d10 40010052 00000000 R.-.@.-.@..R.... + 06a0 00000000 00000000 0000082d 1040172d ...........-.@.- + 06b0 10400100 53172d10 401f2d10 40040073 .@..S.-.@.-.@..s + 06c0 80019f1f 2d104029 2d104004 00f30153 ....-.@)-.@....S + 06d0 9f000000 00000000 00000000 00000000 ................ + 06e0 00000000 00010052 00000000 00000000 .......R........ + 06f0 0400f301 529f0000 00000000 00000000 ....R........... + 0700 00000000 00000000 00000000 01005300 ..............S. + 0710 00000000 00000001 005c0000 00000000 .........\...... + 0720 00000400 f301539f 00000000 00000000 ......S......... + 0730 00000000 00000000 00000000 00000000 ................ + 0740 01005200 00000000 00000001 00550000 ..R..........U.. + 0750 00000000 00000400 f301529f 00000000 ..........R..... + 0760 00000000 01005500 00000000 00000000 ......U......... + 0770 00000000 00000000 00000000 00010053 ...............S + 0780 00000000 00000000 01005400 00000000 ..........T..... + 0790 00000004 00f30153 9f000000 00000000 .......S........ + 07a0 00000000 00000000 00000000 00000000 ................ + 07b0 00010054 00000000 00000000 0400f301 ...T............ + 07c0 549f0000 00000000 00000100 54000000 T...........T... + 07d0 00000000 000400f3 01549f00 00000000 .........T...... + 07e0 00000000 00000000 00000000 00000000 ................ + 07f0 00000001 00520000 00000000 00000100 .....R.......... + 0800 55000000 00000000 000400f3 01529f00 U............R.. + 0810 00000000 00000001 00550000 00000000 .........U...... + 0820 00000000 00000000 00000000 00000000 ................ + 0830 01005300 00000000 00000001 00540000 ..S..........T.. + 0840 00000000 00000400 f301539f 00000000 ..........S..... + 0850 00000000 00000000 00000000 00000000 ................ + 0860 00000000 01005400 00000000 00000004 ......T......... + 0870 00f30154 9f000000 00000000 00010054 ...T...........T + 0880 00000000 00000000 0400f301 549f0000 ............T... + 0890 00000000 00000002 02030300 00000000 ................ + 08a0 e82c1040 f12c1040 010052f1 2c1040f1 .,.@.,.@..R.,.@. + 08b0 2c104001 005cf12c 1040fa2c 10400300 ,.@..\.,.@.,.@.. + 08c0 7c019f00 2d104002 2d104003 007c019f |...-.@.-.@..|.. + 08d0 022d1040 082d1040 01005c00 00000000 .-.@.-.@..\..... + 08e0 00000000 000000f4 2c1040fa 2c104002 ........,.@.,.@. + 08f0 007c00fa 2c104004 2d104001 00520000 .|..,.@.-.@..R.. + 0900 00000000 00000000 00000000 00000000 ................ + 0910 00000000 01005200 00000000 00000001 ......R......... + 0920 005c0000 00000000 00000400 f301529f .\............R. + 0930 00000000 00000000 00000000 00000000 ................ + 0940 00000000 01005200 00000000 00000004 ......R......... + 0950 00f30152 9f000000 00000000 00000000 ...R............ + 0960 00000000 00000000 00000001 00530000 .............S.. + 0970 00000000 00000100 5d000000 00000000 ........]....... + 0980 000400f3 01539f00 00000000 00000002 .....S.......... + 0990 03030000 01000000 00000000 00020030 ...............0 + 09a0 9f000000 00000000 0001005c 00000000 ...........\.... + 09b0 00000000 03007c7f 9f000000 00000000 ......|......... + 09c0 00040000 01010000 00000101 00000064 ...............d + 09d0 2c10406d 2c104002 00309f6d 2c104077 ,.@m,.@..0.m,.@w + 09e0 2c104001 0052772c 1040792c 10400300 ,.@..Rw,.@y,.@.. + 09f0 72019f79 2c10407c 2c104003 0072009f r..y,.@|,.@..r.. + 0a00 7c2c1040 862c1040 03007270 9f862c10 |,.@.,.@..rp..,. + 0a10 40882c10 40030072 719f882c 10408d2c @.,.@..rq..,.@., + 0a20 10400300 72709f00 00000000 00000000 .@..rp.......... + 0a30 00000000 00000000 00000001 00520000 .............R.. + 0a40 00000000 00000400 f301529f 00000000 ..........R..... + 0a50 00000000 00000000 00000000 00000000 ................ + 0a60 01005300 00000000 00000004 00f30153 ..S............S + 0a70 9f000000 00000000 00000000 00000000 ................ + 0a80 00000000 00000000 00010054 00000000 ...........T.... + 0a90 00000000 01005d00 00000000 00000004 ......]......... + 0aa0 00f30154 9f000000 00000000 0001005d ...T...........] + 0ab0 00000000 00000000 00000000 00000000 ................ + 0ac0 00000000 01005c00 00000000 00000001 ......\......... + 0ad0 005c0000 00000000 00000200 00000000 .\.............. + 0ae0 00000000 00000000 00000000 0200309f ..............0. + 0af0 00000000 00000000 01005e00 00000000 ..........^..... + 0b00 00000001 005e0000 00000000 00000300 .....^.......... + 0b10 7e7f9f00 00000000 00000001 005e0000 ~............^.. + 0b20 00000000 00000000 0000c02b 1040ca2b ...........+.@.+ + 0b30 10400100 52ca2b10 40eb2b10 400400f3 .@..R.+.@.+.@... + 0b40 01529f00 00000000 00000000 00000014 .R.............. + 0b50 2c104020 2c104001 0052202c 10403a2c ,.@ ,.@..R ,.@:, + 0b60 10400400 f301529f 00000000 00000000 .@....R......... + 0b70 00000000 ec2b1040 f82b1040 010052f8 .....+.@.+.@..R. + 0b80 2b104012 2c104004 00f30152 9f000000 +.@.,.@....R.... + 0b90 00000000 00000000 01010088 2b104096 ............+.@. + 0ba0 2b104001 0052962b 1040a02b 10400400 +.@..R.+.@.+.@.. + 0bb0 f301529f a02b1040 b82b1040 01005d00 ..R..+.@.+.@..]. + 0bc0 00000000 00000000 00000000 00000000 ................ + 0bd0 00000000 00010052 00000000 00000000 .......R........ + 0be0 01005d00 00000000 00000004 00f30152 ..]............R + 0bf0 9f000000 00000000 00000000 00000000 ................ + 0c00 00000000 00010053 00000000 00000000 .......S........ + 0c10 0400f301 539f0000 00000000 00000200 ....S........... + 0c20 00000000 00000000 00000500 404b241f ............@K$. + 0c30 9f000000 00000000 0001005e 00000000 ...........^.... + 0c40 00000000 00000000 00000000 00000000 ................ + 0c50 01005200 00000000 00000004 00f30152 ..R............R + 0c60 9f000000 00000000 00020000 00000000 ................ + 0c70 00000000 00010052 00000000 00000000 .......R........ + 0c80 0400f301 529f0000 00000000 00000000 ....R........... + 0c90 0000182f 10401e2f 10400100 521e2f10 .../.@./.@..R./. + 0ca0 402d2f10 400400f3 01529f00 00000000 @-/.@....R...... + 0cb0 00000000 00000000 00000000 00302f10 .............0/. + 0cc0 40412f10 40010052 412f1040 4a2f1040 @A/.@..RA/.@J/.@ + 0cd0 0400f301 529f4a2f 1040522f 10400100 ....R.J/.@R/.@.. + 0ce0 52522f10 405c2f10 400400f3 01529f5c RR/.@\/.@....R.\ + 0cf0 2f104063 2f104001 00520000 00000000 /.@c/.@..R...... + 0d00 00000000 00000000 00000000 642f1040 ............d/.@ + 0d10 752f1040 01005275 2f10407e 2f104004 u/.@..Ru/.@~/.@. + 0d20 00f30152 9f7e2f10 40862f10 40010052 ...R.~/.@./.@..R + 0d30 862f1040 902f1040 0400f301 529f902f ./.@./.@....R../ + 0d40 1040972f 10400100 52000000 00000000 .@./.@..R....... + 0d50 00000000 000000a4 2f1040af 2f104001 ......../.@./.@. + 0d60 0052af2f 10401230 10400100 5c123010 .R./.@.0.@..\.0. + 0d70 40173010 400400f3 01529f00 00000000 @.0.@....R...... + 0d80 00000000 00000008 00000001 00520800 .............R.. + 0d90 00001700 00000400 f301529f 00000000 ..........R..... + 0da0 00000000 00000000 03000000 01005303 ..............S. + 0db0 00000017 00000004 00f30153 9f000000 ...........S.... + 0dc0 00000000 00000000 00050000 00010054 ...............T + 0dd0 05000000 08000000 0400f301 549f0800 ............T... + 0de0 00001700 00000600 f3015431 1c9f0000 ..........T1.... + 0df0 00000000 00000000 00001500 00000100 ................ + 0e00 52000000 00000000 00 R........ +Contents of section .debug_aranges: + 0000 2c000000 02000000 00000400 00000000 ,............... + 0010 60522140 5e000000 ec522140 37010000 `R!@^....R!@7... + 0020 30542140 4e000000 00000000 00000000 0T!@N........... + 0030 1c000000 0200a00f 00000400 00000000 ................ + 0040 88542140 27000000 00000000 00000000 .T!@'........... + 0050 14010000 02001c1a 00000400 00000000 ................ + 0060 882b1040 35000000 c02b1040 2b000000 .+.@5....+.@+... + 0070 ec2b1040 26000000 142c1040 26000000 .+.@&....,.@&... + 0080 482c1040 17000000 642c1040 29000000 H,.@....d,.@)... + 0090 00000000 00000000 00000000 00000000 ................ + 00a0 902c1040 18000000 a82c1040 18000000 .,.@.....,.@.... + 00b0 c42c1040 21000000 00000000 00000000 .,.@!........... + 00c0 00000000 00000000 00000000 00000000 ................ + 00d0 e82c1040 20000000 00000000 00000000 .,.@ ........... + 00e0 00000000 00000000 00000000 00000000 ................ + 00f0 082d1040 21000000 00000000 00000000 .-.@!........... + 0100 00000000 00000000 00000000 00000000 ................ + 0110 00000000 00000000 302d1040 21000000 ........0-.@!... + 0120 5c2d1040 ad000000 0c2e1040 1f000000 \-.@.......@.... + 0130 2c2e1040 11000000 402e1040 33000000 ,..@....@..@3... + 0140 742e1040 a4000000 00000000 00000000 t..@............ + 0150 00000000 00000000 00000000 00000000 ................ + 0160 00000000 00000000 5c000000 02009c36 ........\......6 + 0170 00000400 00000000 80601040 02000000 .........`.@.... + 0180 182f1040 15000000 302f1040 33000000 ./.@....0/.@3... + 0190 642f1040 33000000 a42f1040 73000000 d/.@3..../.@s... + 01a0 1c301040 1b000000 38301040 1b000000 .0.@....80.@.... + 01b0 74301040 a3000000 1c311040 05000000 t0.@.....1.@.... + 01c0 00000000 00000000 1c000000 02005b43 ..............[C + 01d0 00000400 00000000 84601040 17000000 .........`.@.... + 01e0 00000000 00000000 14000000 02004f44 ..............OD + 01f0 00000400 00000000 00000000 00000000 ................ + 0200 1c000000 0200ba44 00000400 00000000 .......D........ + 0210 e0621040 49000000 00000000 00000000 .b.@I........... + 0220 1c000000 0200c545 00000400 00000000 .......E........ + 0230 b45e1040 35010000 00000000 00000000 .^.@5........... + 0240 1c000000 0200d146 00000400 00000000 .......F........ + 0250 ec5f1040 40000000 00000000 00000000 ._.@@........... +Contents of section .debug_ranges: + 0000 3d532140 40532140 43532140 46532140 =S!@@S!@CS!@FS!@ + 0010 48532140 6f532140 85532140 9d532140 HS!@oS!@.S!@.S!@ + 0020 00000000 00000000 51532140 5e532140 ........QS!@^S!@ + 0030 85532140 9d532140 00000000 00000000 .S!@.S!@........ + 0040 ac532140 ae532140 b0532140 d3532140 .S!@.S!@.S!@.S!@ + 0050 d6532140 e1532140 f1532140 23542140 .S!@.S!@.S!@#T!@ + 0060 00000000 00000000 60522140 be522140 ........`R!@.R!@ + 0070 ec522140 23542140 30542140 7e542140 .R!@#T!@0T!@~T!@ + 0080 00000000 00000000 88542140 af542140 .........T!@.T!@ + 0090 00000000 00000000 642c1040 6a2c1040 ........d,.@j,.@ + 00a0 6d2c1040 8b2c1040 00000000 00000000 m,.@.,.@........ + 00b0 01000000 01000000 01000000 01000000 ................ + 00c0 00000000 00000000 01000000 01000000 ................ + 00d0 01000000 01000000 00000000 00000000 ................ + 00e0 5c2d1040 5c2d1040 632d1040 6c2d1040 \-.@\-.@c-.@l-.@ + 00f0 00000000 00000000 922e1040 942e1040 ...........@...@ + 0100 bd2e1040 e22e1040 102f1040 182f1040 ...@...@./.@./.@ + 0110 00000000 00000000 922e1040 942e1040 ...........@...@ + 0120 d32e1040 d32e1040 d52e1040 e22e1040 ...@...@...@...@ + 0130 00000000 00000000 882b1040 bd2b1040 .........+.@.+.@ + 0140 c02b1040 eb2b1040 ec2b1040 122c1040 .+.@.+.@.+.@.,.@ + 0150 142c1040 3a2c1040 482c1040 5f2c1040 .,.@:,.@H,.@_,.@ + 0160 642c1040 8d2c1040 01000000 01000000 d,.@.,.@........ + 0170 01000000 01000000 902c1040 a82c1040 .........,.@.,.@ + 0180 a82c1040 c02c1040 c42c1040 e52c1040 .,.@.,.@.,.@.,.@ + 0190 01000000 01000000 01000000 01000000 ................ + 01a0 01000000 01000000 e82c1040 082d1040 .........,.@.-.@ + 01b0 01000000 01000000 01000000 01000000 ................ + 01c0 01000000 01000000 082d1040 292d1040 .........-.@)-.@ + 01d0 01000000 01000000 01000000 01000000 ................ + 01e0 01000000 01000000 01000000 01000000 ................ + 01f0 302d1040 512d1040 5c2d1040 092e1040 0-.@Q-.@\-.@...@ + 0200 0c2e1040 2b2e1040 2c2e1040 3d2e1040 ...@+..@,..@=..@ + 0210 402e1040 732e1040 742e1040 182f1040 @..@s..@t..@./.@ + 0220 01000000 01000000 01000000 01000000 ................ + 0230 01000000 01000000 00000000 00000000 ................ + 0240 80601040 82601040 182f1040 2d2f1040 .`.@.`.@./.@-/.@ + 0250 302f1040 632f1040 642f1040 972f1040 0/.@c/.@d/.@./.@ + 0260 a42f1040 17301040 1c301040 37301040 ./.@.0.@.0.@70.@ + 0270 38301040 53301040 74301040 17311040 80.@S0.@t0.@.1.@ + 0280 1c311040 21311040 00000000 00000000 .1.@!1.@........ +Contents of section .debug_line: + 0000 79050000 02009201 00000101 fb0e0d00 y............... + 0010 01010101 00000001 0000012e 2e2f2e2e ............./.. + 0020 2f696e63 6c756465 00633a5c 6d737973 /include.c:\msys + 0030 33325c78 74656e73 612d6c78 3130362d 32\xtensa-lx106- + 0040 656c665c 7874656e 73612d6c 78313036 elf\xtensa-lx106 + 0050 2d656c66 5c737973 2d696e63 6c756465 -elf\sys-include + 0060 5c737973 00633a5c 6d737973 33325c78 \sys.c:\msys32\x + 0070 74656e73 612d6c78 3130362d 656c665c tensa-lx106-elf\ + 0080 6c69625c 6763635c 7874656e 73612d6c lib\gcc\xtensa-l + 0090 78313036 2d656c66 5c382e34 2e305c69 x106-elf\8.4.0\i + 00a0 6e636c75 6465002e 2e2f696e 636c7564 nclude.../includ + 00b0 6500633a 5c6d7379 7333325c 7874656e e.c:\msys32\xten + 00c0 73612d6c 78313036 2d656c66 5c787465 sa-lx106-elf\xte + 00d0 6e73612d 6c783130 362d656c 665c7379 nsa-lx106-elf\sy + 00e0 732d696e 636c7564 65000075 7365725f s-include..user_ + 00f0 6d61696e 2e630000 0000635f 74797065 main.c....c_type + 0100 732e6800 01000065 74735f73 79732e68 s.h....ets_sys.h + 0110 00010000 6c6f636b 2e680002 00005f74 ....lock.h...._t + 0120 79706573 2e680002 00007374 64646566 ypes.h....stddef + 0130 2e680003 00007265 656e742e 68000200 .h....reent.h... + 0140 006c6364 5f686434 34373830 5f636f6e .lcd_hd44780_con + 0150 6669672e 68000400 006c6364 5f686434 fig.h....lcd_hd4 + 0160 34373830 5f646566 5f636861 722e6800 4780_def_char.h. + 0170 0400006c 63645f68 64343437 38302e68 ...lcd_hd44780.h + 0180 00040000 6f736170 692e6800 01000073 ....osapi.h....s + 0190 7472696e 672e6800 05000000 05010005 tring.h......... + 01a0 02605221 4003d100 01050503 01090000 .`R!@........... + 01b0 01030109 00000105 0106037e 09000001 ...........~.... + 01c0 05170302 09060001 0501037e 09030001 ...........~.... + 01d0 05170302 09030001 05070300 09030001 ................ + 01e0 05090603 02090300 01050503 06090600 ................ + 01f0 01050806 03000900 00010507 03000908 ................ + 0200 00010509 06030209 05000103 01090b00 ................ + 0210 01030109 0d000105 01060302 090f0001 ................ + 0220 05090603 78090900 01050103 5c093700 ....x.......\.7. + 0230 01050503 01090000 01050106 037f0900 ................ + 0240 00010505 03010905 00010501 037f0903 ................ + 0250 00010505 03010908 00010300 09030001 ................ + 0260 05090603 14091300 01052006 03000900 .......... ..... + 0270 00010509 06030109 03000105 01060303 ................ + 0280 09000001 05090603 6b090300 01030109 ........k....... + 0290 06000103 01090b00 01030109 06000105 ................ + 02a0 0b060300 09000001 05090603 01090800 ................ + 02b0 01052006 03000900 00010509 06030209 .. ............. + 02c0 06000106 03c90009 00000103 b77f0903 ................ + 02d0 000103c9 00090300 0103b77f 09030001 ................ + 02e0 050d0603 c6000902 00010509 03030900 ................ + 02f0 00010301 09090001 050e0300 09000001 ................ + 0300 05160603 00090000 01052803 00090200 ..........(..... + 0310 01051d06 03000902 00010528 06030009 ...........(.... + 0320 00000105 09030009 06000106 03040903 ................ + 0330 00010301 09060001 050a0603 00090000 ................ + 0340 01030009 0b000105 090603b2 7f090000 ................ + 0350 01050b06 03000900 00010513 00020401 ................ + 0360 06030009 02000105 2a000204 01060300 ........*....... + 0370 09000001 053b0002 04010307 09020001 .....;.......... + 0380 05010307 09030001 050d0603 3d090f00 ............=... + 0390 01051d06 03000900 0001050d 03000902 ................ + 03a0 0001052f 037e0903 0001050d 03020902 .../.~.......... + 03b0 0001052e 06037e09 08000105 2f060300 ......~...../... + 03c0 09000001 03000903 00010300 09060001 ................ + 03d0 05090603 ba7f0900 0001050a 06030009 ................ + 03e0 00000105 09060301 09060001 05200603 ............. .. + 03f0 00090000 01050906 03020906 00010603 ................ + 0400 2d090300 01035309 02000105 0d060329 -.....S........) + 0410 09020001 05090303 09000001 03010900 ................ + 0420 00010301 09080001 05100603 00090000 ................ + 0430 01051103 7e090800 01050903 02090200 ....~........... + 0440 01051506 03000902 00010517 06030009 ................ + 0450 00000105 09030009 03000106 030c0903 ................ + 0460 00010301 09000001 03010906 0001050a ................ + 0470 06030009 00000105 10034509 03000105 ..........E..... + 0480 0a033b09 03000103 00090b00 01050906 ..;............. + 0490 03450900 00010510 06030009 00000105 .E.............. + 04a0 0b030009 08000105 24000204 01060300 ........$....... + 04b0 09030001 053b0002 04010603 00090000 .....;.......... + 04c0 01050d06 032f0905 00010518 06030009 ...../.......... + 04d0 00000105 15030009 03000105 18030009 ................ + 04e0 02000105 15030009 03000105 26030009 ............&... + 04f0 05000105 11060302 09040001 06030009 ................ + 0500 06000105 2006037c 09020001 05210603 .... ..|.....!.. + 0510 00090000 01051106 0308090b 00010301 ................ + 0520 09000001 051e0603 7f090800 01050106 ................ + 0530 03680913 00010505 03020900 00010501 .h.............. + 0540 06037e09 00000105 05030209 07000106 ..~............. + 0550 03010906 00010301 09060001 0302090b ................ + 0560 00010301 090b0001 0301090d 00010501 ................ + 0570 06030109 0f000109 09000001 018d0100 ................ + 0580 00020008 01000001 01fb0e0d 00010101 ................ + 0590 01000000 01000001 2e2e2f2e 2e2f696e ........../../in + 05a0 636c7564 6500633a 5c6d7379 7333325c clude.c:\msys32\ + 05b0 7874656e 73612d6c 78313036 2d656c66 xtensa-lx106-elf + 05c0 5c787465 6e73612d 6c783130 362d656c \xtensa-lx106-el + 05d0 665c7379 732d696e 636c7564 655c7379 f\sys-include\sy + 05e0 7300633a 5c6d7379 7333325c 7874656e s.c:\msys32\xten + 05f0 73612d6c 78313036 2d656c66 5c6c6962 sa-lx106-elf\lib + 0600 5c676363 5c787465 6e73612d 6c783130 \gcc\xtensa-lx10 + 0610 362d656c 665c382e 342e305c 696e636c 6-elf\8.4.0\incl + 0620 75646500 00706172 74697469 6f6e732e ude..partitions. + 0630 63000000 00635f74 79706573 2e680001 c....c_types.h.. + 0640 00006c6f 636b2e68 00020000 5f747970 ..lock.h...._typ + 0650 65732e68 00020000 73746464 65662e68 es.h....stddef.h + 0660 00030000 7265656e 742e6800 02000075 ....reent.h....u + 0670 7365725f 696e7465 72666163 652e6800 ser_interface.h. + 0680 0100006f 73617069 2e680001 00000005 ...osapi.h...... + 0690 01000502 88542140 033a0105 05030109 .....T!@.:...... + 06a0 00000105 09060300 09000001 0501037f ................ + 06b0 09060001 05090301 09030001 0501037f ................ + 06c0 09030001 05090301 09030001 05070300 ................ + 06d0 09030001 05030603 01090200 01000204 ................ + 06e0 01030109 09000105 0b000204 01030009 ................ + 06f0 00000105 08000204 01030009 00000105 ................ + 0700 01060302 09030001 09070000 0101ed14 ................ + 0710 00000200 f4010000 0101fb0e 0d000101 ................ + 0720 01010000 00010000 012e2e2f 696e636c .........../incl + 0730 75646500 633a5c6d 73797333 325c7874 ude.c:\msys32\xt + 0740 656e7361 2d6c7831 30362d65 6c665c78 ensa-lx106-elf\x + 0750 74656e73 612d6c78 3130362d 656c665c tensa-lx106-elf\ + 0760 7379732d 696e636c 7564655c 6d616368 sys-include\mach + 0770 696e6500 633a5c6d 73797333 325c7874 ine.c:\msys32\xt + 0780 656e7361 2d6c7831 30362d65 6c665c78 ensa-lx106-elf\x + 0790 74656e73 612d6c78 3130362d 656c665c tensa-lx106-elf\ + 07a0 7379732d 696e636c 7564655c 73797300 sys-include\sys. + 07b0 633a5c6d 73797333 325c7874 656e7361 c:\msys32\xtensa + 07c0 2d6c7831 30362d65 6c665c6c 69625c67 -lx106-elf\lib\g + 07d0 63635c78 74656e73 612d6c78 3130362d cc\xtensa-lx106- + 07e0 656c665c 382e342e 305c696e 636c7564 elf\8.4.0\includ + 07f0 6500633a 5c6d7379 7333325c 7874656e e.c:\msys32\xten + 0800 73612d6c 78313036 2d656c66 5c787465 sa-lx106-elf\xte + 0810 6e73612d 6c783130 362d656c 665c7379 nsa-lx106-elf\sy + 0820 732d696e 636c7564 6500006c 63645f68 s-include..lcd_h + 0830 64343437 38302e63 00000000 6c63645f d44780.c....lcd_ + 0840 68643434 3738305f 636f6e66 69672e68 hd44780_config.h + 0850 00010000 5f646566 61756c74 5f747970 ...._default_typ + 0860 65732e68 00020000 5f737464 696e742e es.h...._stdint. + 0870 68000300 006c6364 5f686434 34373830 h....lcd_hd44780 + 0880 5f696e74 65726661 63652e68 00010000 _interface.h.... + 0890 6c63645f 68643434 3738305f 6465665f lcd_hd44780_def_ + 08a0 63686172 2e680001 00006c63 645f6864 char.h....lcd_hd + 08b0 34343738 302e6800 0100006c 6f636b2e 44780.h....lock. + 08c0 68000300 005f7479 7065732e 68000300 h...._types.h... + 08d0 00737464 6465662e 68000400 00726565 .stddef.h....ree + 08e0 6e742e68 00030000 7374646c 69622e68 nt.h....stdlib.h + 08f0 00050000 73747269 6e672e68 00050000 ....string.h.... + 0900 73746469 6f2e6800 05000000 05010005 stdio.h......... + 0910 02882b10 40039101 01050503 01090000 ..+.@........... + 0920 01050106 037f0900 00010508 03010905 ................ + 0930 00010501 037f0903 00010508 03010904 ................ + 0940 00010501 037f0902 00010505 03010902 ................ + 0950 00010603 01090800 01030109 00000105 ................ + 0960 08060300 09000001 05050300 09020001 ................ + 0970 06030109 07000105 08060300 09000001 ................ + 0980 05050300 09020001 05010301 09070001 ................ + 0990 03000906 00010905 00000101 05010005 ................ + 09a0 02c02b10 4003a501 01050503 04090000 ..+.@........... + 09b0 01050106 037c0900 00010505 03040907 .....|.......... + 09c0 00010501 037c0903 00010505 03040902 .....|.......... + 09d0 00010603 01090300 01030d09 06000105 ................ + 09e0 08060300 09000001 05050300 09050001 ................ + 09f0 05010302 09080001 09090000 01010501 ................ + 0a00 000502ec 2b104003 99010105 05030109 ....+.@......... + 0a10 00000105 0106037f 09000001 05080301 ................ + 0a20 09090001 0501037f 09030001 05080301 ................ + 0a30 09030001 05050300 09020001 06030109 ................ + 0a40 07000105 01060301 09050001 09090000 ................ + 0a50 01010501 00050214 2c104003 9f010105 ........,.@..... + 0a60 05030109 00000105 0106037f 09000001 ................ + 0a70 05080301 09090001 0501037f 09030001 ................ + 0a80 05080301 09030001 05050300 09020001 ................ + 0a90 06030109 07000105 01060301 09050001 ................ + 0aa0 09090000 01010501 00050248 2c104003 ...........H,.@. + 0ab0 b6030105 05030109 00000105 08060300 ................ + 0ac0 09000001 05070300 09030001 05080300 ................ + 0ad0 09030001 05070300 09040001 051d0302 ................ + 0ae0 09030001 05010302 09020001 05090603 ................ + 0af0 7e090200 01051d06 03000900 00010906 ~............... + 0b00 00000101 05010005 02642c10 4003bd03 .........d,.@... + 0b10 01050503 01090000 01050903 00090000 ................ + 0b20 01051503 00090000 01051903 02090000 ................ + 0b30 01052206 03020900 00010530 03000903 .."........0.... + 0b40 00010501 037b0903 0001050d 06030509 .....{.......... + 0b50 03000105 30060300 09000001 05220300 ....0........".. + 0b60 09020001 05210603 7e090800 01051903 .....!..~....... + 0b70 00090000 01050906 03000902 0001050d ................ + 0b80 06030209 03000105 30060300 09000001 ........0....... + 0b90 05220300 09020001 05210603 7e090800 .".......!..~... + 0ba0 01051903 00090000 01050906 03000902 ................ + 0bb0 00010501 03050903 00010902 00000101 ................ + 0bc0 05010005 02000000 0003a703 01050503 ................ + 0bd0 01090000 01050106 037f0900 00010300 ................ + 0be0 09000001 05090301 09000001 05210300 .............!.. + 0bf0 09000001 05080300 09000001 05090603 ................ + 0c00 02090000 01051106 03000900 00010509 ................ + 0c10 06030109 00000105 0e030009 00000105 ................ + 0c20 16060300 09000001 051d0002 04010603 ................ + 0c30 00090000 01050900 02040106 03000900 ................ + 0c40 00010002 04010300 09000001 05010305 ................ + 0c50 09000001 03000900 0001050d 00020403 ................ + 0c60 06037d09 00000105 2d000204 0306037e ..}.....-......~ + 0c70 09000001 050d0002 04030302 09000001 ................ + 0c80 052c0002 04030603 7e090000 01052d00 .,......~.....-. + 0c90 02040306 03000900 00010002 04030300 ................ + 0ca0 09000001 09000000 0101050d 00050200 ................ + 0cb0 00000003 92030105 05030209 00000103 ................ + 0cc0 01090000 01050b03 00090000 01050d06 ................ + 0cd0 037d0900 0001050e 03020900 0001050d .}.............. + 0ce0 037e0900 00010300 09000001 05090603 .~.............. + 0cf0 05090000 01050d06 03020900 0001050c ................ + 0d00 037e0900 0001050d 06030609 00000105 .~.............. + 0d10 10060300 09000001 05110603 02090000 ................ + 0d20 01050903 03090000 01051206 03000900 ................ + 0d30 0001050b 06037309 00000105 0106030f ......s......... + 0d40 09000001 03000900 00010300 09000001 ................ + 0d50 09000000 01010501 00050290 2c104003 ............,.@. + 0d60 99040105 05030209 00000105 08060300 ................ + 0d70 09000001 0501037e 09030001 05080302 .......~........ + 0d80 09030001 0501037e 09020001 05050302 .......~........ + 0d90 09020001 05010304 09070001 09070000 ................ + 0da0 01010501 000502a8 2c104003 a2040105 ........,.@..... + 0db0 05030209 00000105 08060300 09000001 ................ + 0dc0 0501037e 09030001 05080302 09030001 ...~............ + 0dd0 0501037e 09020001 05050302 09020001 ...~............ + 0de0 05010304 09070001 09070000 01010501 ................ + 0df0 000502c4 2c104003 af040105 05030109 ....,.@......... + 0e00 00000105 0106037f 09000001 05050301 ................ + 0e10 09030001 0501037f 09030001 05050301 ................ + 0e20 09030001 06030209 03000105 08060300 ................ + 0e30 09000001 05050300 09060001 05010302 ................ + 0e40 09080001 09070000 01010501 00050200 ................ + 0e50 00000003 c1040105 05030109 00000105 ................ + 0e60 0106037f 09000001 05220301 09000001 ........."...... + 0e70 0501037f 09000001 05220301 09000001 ........."...... + 0e80 0501037f 09000001 05050301 09000001 ................ + 0e90 03000900 00010501 037f0900 00010505 ................ + 0ea0 03010900 00010603 01090000 01050a03 ................ + 0eb0 00090000 01051903 00090000 01050900 ................ + 0ec0 02040303 02090000 01052000 02040306 .......... ..... + 0ed0 03000900 00010509 00020403 03000900 ................ + 0ee0 00010002 04030300 09000001 05370002 .............7.. + 0ef0 04030603 7e090000 01051900 02040303 ....~........... + 0f00 00090000 01050500 02040306 03000900 ................ + 0f10 00010603 04090000 01050106 03010900 ................ + 0f20 00010300 09000001 09000000 01010501 ................ + 0f30 00050200 00000003 cb040105 05030109 ................ + 0f40 00000105 0106037f 09000001 05050301 ................ + 0f50 09000001 0501037f 09000001 05050301 ................ + 0f60 09000001 0501037f 09000001 05050301 ................ + 0f70 09000001 06030109 00000103 01090000 ................ + 0f80 01030109 00000103 01090000 01030109 ................ + 0f90 00000103 01090000 01030109 00000105 ................ + 0fa0 01060301 09000001 03000900 00010900 ................ + 0fb0 00000101 05010005 02000000 0003de04 ................ + 0fc0 01050503 01090000 01030109 00000105 ................ + 0fd0 0106037e 09000001 05050302 09000001 ...~............ + 0fe0 0501037e 09000001 05050302 09000001 ...~............ + 0ff0 05010301 09000001 09000000 01010501 ................ + 1000 000502e8 2c104003 e8040106 03000900 ....,.@......... + 1010 00010505 06030109 09000103 01090000 ................ + 1020 01050b03 00090000 01051206 03000900 ................ + 1030 0001050b 03000903 00010501 03040902 ................ + 1040 00010300 09040001 0519037c 09060001 ...........|.... + 1050 05090603 02090200 01060300 09030001 ................ + 1060 09030000 01010501 00050200 00000003 ................ + 1070 fb040105 05030409 00000103 01090000 ................ + 1080 01050106 037b0900 0001050f 03050900 .....{.......... + 1090 00010501 037b0900 0001050f 03050900 .....{.......... + 10a0 00010505 06030109 00000105 0106037a ...............z + 10b0 09000001 05080306 09000001 05090603 ................ + 10c0 01090000 01060300 09000001 03020900 ................ + 10d0 00010505 06030109 00000105 01060302 ................ + 10e0 09000001 05090603 7d090000 01060300 ........}....... + 10f0 09000001 09000000 01010501 00050200 ................ + 1100 00000003 97050105 05030409 00000103 ................ + 1110 01090000 01050106 037b0900 0001050f .........{...... + 1120 03050900 00010501 037b0900 0001050f .........{...... + 1130 03050900 00010505 06030109 00000105 ................ + 1140 0106037a 09000001 05080306 09000001 ...z............ + 1150 05090603 01090000 01060300 09000001 ................ + 1160 03020900 00010505 06030109 00000105 ................ + 1170 01060302 09000001 05090603 7d090000 ............}... + 1180 01060300 09000001 09000000 01010501 ................ + 1190 00050200 00000003 b1050105 05030409 ................ + 11a0 00000103 01090000 01030109 00000103 ................ + 11b0 01090000 01050106 03790900 0001050f .........y...... + 11c0 03070900 00010300 09000001 05050603 ................ + 11d0 01090000 01051706 03000900 00010505 ................ + 11e0 06030109 00000105 12060300 09000001 ................ + 11f0 05050603 02090000 01050106 03750900 .............u.. + 1200 00010505 030b0900 00010603 01090000 ................ + 1210 01030109 00000103 01090000 01030109 ................ + 1220 00000103 01090000 01050106 03020900 ................ + 1230 00010300 09000001 09000000 01010501 ................ + 1240 00050208 2d104003 cd050105 05030109 ....-.@......... + 1250 00000105 0106037f 09000001 05050301 ................ + 1260 09050001 050b0308 09050001 05050603 ................ + 1270 10090200 01051306 03000900 00010300 ................ + 1280 09030001 05050300 09030001 05010301 ................ + 1290 09060001 09090000 01010501 00050200 ................ + 12a0 00000003 ed050105 05030109 00000105 ................ + 12b0 0106037f 09000001 05050301 09000001 ................ + 12c0 0501037f 09000001 05050301 09000001 ................ + 12d0 06030209 00000105 08060300 09000001 ................ + 12e0 05050300 09000001 05010302 09000001 ................ + 12f0 09000000 01010501 00050200 00000003 ................ + 1300 fa050105 05030109 00000105 0106037f ................ + 1310 09000001 05050301 09000001 0501037f ................ + 1320 09000001 05050301 09000001 05010301 ................ + 1330 09000001 09000000 01010501 00050200 ................ + 1340 00000003 84060105 05030109 00000105 ................ + 1350 0106037f 09000001 05050301 09000001 ................ + 1360 0501037f 09000001 05050301 09000001 ................ + 1370 05010301 09000001 09000000 01010501 ................ + 1380 00050200 00000003 8d060105 05030109 ................ + 1390 00000105 0106037f 09000001 05050301 ................ + 13a0 09000001 0501037f 09000001 05050301 ................ + 13b0 09000001 05010301 09000001 09000000 ................ + 13c0 01010501 00050230 2d104003 98060105 .......0-.@..... + 13d0 05030109 00000105 1d060300 09000001 ................ + 13e0 05370603 00090300 01051d06 03000900 .7.............. + 13f0 00010522 03020902 0001050d 00020403 ..."............ + 1400 06030009 03000105 22000204 03060300 ........"....... + 1410 09000001 05800100 02040306 037e0905 .............~.. + 1420 00010537 00020403 03000902 00010505 ...7............ + 1430 00020403 06030009 00000106 03040903 ................ + 1440 00010519 06030009 00000105 05060301 ................ + 1450 09050001 05150603 00090000 01050103 ................ + 1460 01090800 01090200 00010105 01000502 ................ + 1470 5c2d1040 03ef0301 05050301 09000001 \-.@............ + 1480 050d0389 7d090000 01050503 02090000 ....}........... + 1490 01050106 03f40209 00000105 0b038c7d ...............} + 14a0 09070001 05090300 09030001 05050603 ................ + 14b0 f6020906 00010301 09050001 03030903 ................ + 14c0 0001050d 03897d09 00000105 05030209 ......}......... + 14d0 00000105 08060300 09000001 05050300 ................ + 14e0 09020001 06030109 09000105 08060300 ................ + 14f0 09000001 05050300 09020001 0603f502 ................ + 1500 09070001 05080603 00090000 01050503 ................ + 1510 00090200 01060301 09080001 050d0390 ................ + 1520 7d090000 01050503 05090000 01050806 }............... + 1530 03000900 00010505 03000902 00010603 ................ + 1540 01090700 01050806 03000900 00010505 ................ + 1550 03000902 00010603 ec020907 00010301 ................ + 1560 09050001 05080603 00090000 01050503 ................ + 1570 00090200 01060302 09080001 03010905 ................ + 1580 00010508 06030009 00000105 05030009 ................ + 1590 02000106 03020908 00010301 09050001 ................ + 15a0 05080603 00090000 01050503 00090200 ................ + 15b0 01060302 09080001 03010905 00010508 ................ + 15c0 06030009 00000105 05030009 02000106 ................ + 15d0 03020908 00010302 09050001 03020905 ................ + 15e0 00010302 09030001 03040905 00010302 ................ + 15f0 09030001 03020903 00010515 06030009 ................ + 1600 00000105 01030309 03000105 15037d09 ..............}. + 1610 02000105 01030309 02000105 15037d09 ..............}. + 1620 02000105 01030309 03000109 05000001 ................ + 1630 01050100 05020c2e 104003a8 06010505 .........@...... + 1640 03010900 0001051a 06030009 00000105 ................ + 1650 01037f09 03000105 1a030109 03000105 ................ + 1660 01037f09 02000105 1a030109 02000105 ................ + 1670 05060301 09030001 03010903 00010515 ................ + 1680 06030009 00000105 01030109 03000105 ................ + 1690 15037f09 02000105 01030109 05000109 ................ + 16a0 05000001 01050100 05022c2e 104003b4 ..........,..@.. + 16b0 06010505 03010900 0001051a 06030009 ................ + 16c0 00000103 00090300 01030009 05000105 ................ + 16d0 19030009 02000105 01030109 05000109 ................ + 16e0 02000001 01050100 0502402e 104003bd ..........@..@.. + 16f0 06010505 03010900 00010501 06037f09 ................ + 1700 00000105 20030309 05000105 01037d09 .... .........}. + 1710 03000103 00090400 01050b06 03010902 ................ + 1720 0001050c 06030009 00000105 0b030009 ................ + 1730 03000105 05060305 09020001 05150603 ................ + 1740 00090000 01050103 01090300 01051503 ................ + 1750 7f090200 01050103 01090200 01030009 ................ + 1760 02000105 15037f09 02000105 01030109 ................ + 1770 03000105 0906037c 09050001 05200603 .......|..... .. + 1780 00090000 01052603 00090200 01052003 ......&....... . + 1790 00090200 01050906 03010903 00010906 ................ + 17a0 00000101 05010005 02742e10 4003cb06 .........t..@... + 17b0 01050503 01090000 01030109 00000103 ................ + 17c0 01090000 01030109 00000103 02090000 ................ + 17d0 01050106 037a0900 0001051d 03060905 .....z.......... + 17e0 00010501 037a0906 0001051d 03060908 .....z.......... + 17f0 00010516 037e0902 0001050d 037f0903 .....~.......... + 1800 0001037f 09020001 037f0902 00010505 ................ + 1810 03947e09 02000103 00090200 01053700 ..~...........7. + 1820 02040106 03f10109 00000105 4b000204 ............K... + 1830 01060300 09000001 05050002 04010300 ................ + 1840 09020001 06030709 06000105 19060300 ................ + 1850 09000001 03000903 00010505 06030109 ................ + 1860 02000103 01090300 01051506 03000900 ................ + 1870 00010501 03010903 00010515 037f0902 ................ + 1880 00010501 03010902 00010300 09040001 ................ + 1890 0515037f 09040001 05010301 09030001 ................ + 18a0 05090002 04030603 78090700 01050600 ........x....... + 18b0 02040303 837d0900 00010505 00020403 .....}.......... + 18c0 03020900 00010507 00020403 06030009 ................ + 18d0 00000105 09060302 09090001 050c0603 ................ + 18e0 00090000 01050d06 03020902 00010603 ................ + 18f0 00090400 01060301 09050001 06037f09 ................ + 1900 00000105 09060303 09020001 050603fe ................ + 1910 00090000 01050503 02090000 01030109 ................ + 1920 00000105 120603ff 7e090000 01050503 ........~....... + 1930 81010902 00010300 09060001 03000903 ................ + 1940 00010300 09040001 05090603 f4010900 ................ + 1950 0001050d 03f27c09 00000105 05030209 ......|......... + 1960 00000105 09060300 09000001 05070300 ................ + 1970 09050001 05090603 02090500 01030109 ................ + 1980 00000105 14060300 09000001 03000902 ................ + 1990 00010509 06030109 03000103 01090000 ................ + 19a0 01050b06 03000900 00010516 03020903 ................ + 19b0 00010509 06030209 02000105 2906037b ............)..{ + 19c0 09090001 051d037e 09030001 03000902 .......~........ + 19d0 00010509 06038b03 09000001 05940106 ................ + 19e0 037c0900 0001051e 03040902 00010580 .|.............. + 19f0 0106037c 09020001 05940106 03000900 ...|............ + 1a00 00010509 0603927d 09080001 052b0603 .......}.....+.. + 1a10 00090000 01030009 02000103 00090300 ................ + 1a20 01090300 00010105 01000502 00000000 ................ + 1a30 03e80601 05050304 09000001 03010900 ................ + 1a40 00010501 06037b09 00000105 0f030509 ......{......... + 1a50 00000105 01037b09 00000105 0f030509 ......{......... + 1a60 00000105 05060301 09000001 05010603 ................ + 1a70 7a090000 01050803 06090000 01050906 z............... + 1a80 03010900 00010603 00090000 01030209 ................ + 1a90 00000105 05060301 09000001 05010603 ................ + 1aa0 02090000 01050906 037d0900 00010603 .........}...... + 1ab0 00090000 01090000 00010105 01000502 ................ + 1ac0 00000000 03830701 05050304 09000001 ................ + 1ad0 03010900 00010501 06037b09 00000105 ..........{..... + 1ae0 0f030509 00000105 01037b09 00000105 ..........{..... + 1af0 0f030509 00000105 05060301 09000001 ................ + 1b00 05010603 7a090000 01050803 06090000 ....z........... + 1b10 01050906 03010900 00010603 00090000 ................ + 1b20 01030209 00000105 05060301 09000001 ................ + 1b30 05010603 02090000 01050906 037d0900 .............}.. + 1b40 00010603 00090000 01090000 00010105 ................ + 1b50 01000502 00000000 039c0701 05050304 ................ + 1b60 09000001 03010900 00010301 09000001 ................ + 1b70 03010900 00010501 06037909 00000105 ..........y..... + 1b80 0f030709 00000103 00090000 01050506 ................ + 1b90 03010900 00010517 06030009 00000105 ................ + 1ba0 05060301 09000001 05120603 00090000 ................ + 1bb0 01050506 03020900 00010501 06037509 ..............u. + 1bc0 00000105 05030b09 00000106 03010900 ................ + 1bd0 00010301 09000001 03010900 00010301 ................ + 1be0 09000001 03010900 00010501 06030209 ................ + 1bf0 00000103 00090000 01090000 0001012a ...............* + 1c00 05000002 00850100 000101fb 0e0d0001 ................ + 1c10 01010100 00000100 0001633a 5c6d7379 ..........c:\msy + 1c20 7333325c 7874656e 73612d6c 78313036 s32\xtensa-lx106 + 1c30 2d656c66 5c787465 6e73612d 6c783130 -elf\xtensa-lx10 + 1c40 362d656c 665c7379 732d696e 636c7564 6-elf\sys-includ + 1c50 655c6d61 6368696e 6500633a 5c6d7379 e\machine.c:\msy + 1c60 7333325c 7874656e 73612d6c 78313036 s32\xtensa-lx106 + 1c70 2d656c66 5c787465 6e73612d 6c783130 -elf\xtensa-lx10 + 1c80 362d656c 665c7379 732d696e 636c7564 6-elf\sys-includ + 1c90 655c7379 7300633a 5c6d7379 7333325c e\sys.c:\msys32\ + 1ca0 7874656e 73612d6c 78313036 2d656c66 xtensa-lx106-elf + 1cb0 5c6c6962 5c676363 5c787465 6e73612d \lib\gcc\xtensa- + 1cc0 6c783130 362d656c 665c382e 342e305c lx106-elf\8.4.0\ + 1cd0 696e636c 75646500 2e2e2f69 6e636c75 include.../inclu + 1ce0 6465002e 2e2f2e2e 2f696e63 6c756465 de.../../include + 1cf0 00004c43 445f494f 5f647269 7665725f ..LCD_IO_driver_ + 1d00 696e7465 72666163 652e6300 0000005f interface.c...._ + 1d10 64656661 756c745f 74797065 732e6800 default_types.h. + 1d20 0100006c 6f636b2e 68000200 005f7479 ...lock.h...._ty + 1d30 7065732e 68000200 00737464 6465662e pes.h....stddef. + 1d40 68000300 00726565 6e742e68 00020000 h....reent.h.... + 1d50 5f737464 696e742e 68000200 006c6364 _stdint.h....lcd + 1d60 5f686434 34373830 5f696e74 65726661 _hd44780_interfa + 1d70 63652e68 00040000 6f736170 692e6800 ce.h....osapi.h. + 1d80 05000067 70696f2e 68000500 00000501 ...gpio.h....... + 1d90 00050280 60104003 99010103 0b090000 ....`.@......... + 1da0 01090200 00010105 01000502 182f1040 ............./.@ + 1db0 03dd0101 05050302 09000001 05010603 ................ + 1dc0 7e090000 01050503 02090300 01050103 ~............... + 1dd0 7e090300 01050503 02090200 01050103 ~............... + 1de0 01090600 01090700 00010105 01000502 ................ + 1df0 302f1040 03c20101 05050301 09000001 0/.@............ + 1e00 05010603 7f090000 01050503 01090500 ................ + 1e10 01050903 04090600 01050503 7c090400 ............|... + 1e20 01050103 17090200 01050806 03710909 .............q.. + 1e30 00010509 06030a09 04000103 00090400 ................ + 1e40 01060301 09060001 05010603 04090000 ................ + 1e50 01050906 037b0904 00010907 00000101 .....{.......... + 1e60 05010005 02642f10 4003a701 01050503 .....d/.@....... + 1e70 01090000 01050106 037f0900 00010505 ................ + 1e80 03010905 00010509 03040906 00010505 ................ + 1e90 037c0904 00010501 03170902 00010509 .|.............. + 1ea0 06037109 09000106 030a0904 00010300 ..q............. + 1eb0 09040001 06030109 06000105 01060304 ................ + 1ec0 09000001 05090603 7b090400 01090700 ........{....... + 1ed0 00010105 01000502 a42f1040 03fb0001 ........./.@.... + 1ee0 05050301 09000001 05010603 7f090000 ................ + 1ef0 01050903 03090b00 01050103 7d090200 ............}... + 1f00 01050903 03090200 01050803 7e090400 ............~... + 1f10 01050906 03050903 00010505 0302090c ................ + 1f20 00010509 06030209 03000105 08037e09 ..............~. + 1f30 06000105 09060305 09030001 05050302 ................ + 1f40 090c0001 05090603 02090300 01050803 ................ + 1f50 7e090600 01050906 03050903 00010505 ~............... + 1f60 0301090c 00010509 06030209 03000105 ................ + 1f70 08037e09 06000105 09060305 09030001 ..~............. + 1f80 05010603 01090c00 01030009 04000109 ................ + 1f90 05000001 01050100 05021c30 104003f1 ...........0.@.. + 1fa0 00010505 03020900 00010501 06037e09 ..............~. + 1fb0 05000105 05030209 03000105 01037e09 ..............~. + 1fc0 04000105 05030209 02000105 01030509 ................ + 1fd0 06000109 07000001 01050100 05023830 ..............80 + 1fe0 104003e7 00010505 03020900 00010501 .@.............. + 1ff0 06037e09 05000105 05030209 03000105 ..~............. + 2000 01037e09 04000105 05030209 02000105 ..~............. + 2010 01030609 06000109 07000001 01050100 ................ + 2020 05027430 104003d7 00010505 03010900 ..t0.@.......... + 2030 00010300 09000001 05010603 7f090d00 ................ + 2040 01050503 01090300 01050103 7f090300 ................ + 2050 01050503 01090200 01060300 09080001 ................ + 2060 03010900 00010300 09000001 03000913 ................ + 2070 00010301 09000001 03000900 00010300 ................ + 2080 09130001 03010900 00010300 09000001 ................ + 2090 03000913 00010301 09000001 03000900 ................ + 20a0 00010300 09130001 03010900 00010300 ................ + 20b0 09000001 06030109 0e000103 7f090300 ................ + 20c0 01060300 09050001 03010900 00010300 ................ + 20d0 09000001 06030109 05000103 7f090200 ................ + 20e0 01030109 03000103 7f090300 01060300 ................ + 20f0 09050001 03010900 00010501 06030509 ................ + 2100 0b000109 07000001 01050100 05021c31 ...............1 + 2110 104003d0 00010505 03010900 00010501 .@.............. + 2120 06030109 00000109 05000001 01b30100 ................ + 2130 0002006e 01000001 01fb0e0d 00010101 ...n............ + 2140 01000000 01000001 2f686f6d 652f776a ......../home/wj + 2150 672f5265 706f2f65 73702d6f 70656e2d g/Repo/esp-open- + 2160 73646b2d 32303137 30363232 2f63726f sdk-20170622/cro + 2170 7373746f 6f6c2d4e 472f2e62 75696c64 sstool-NG/.build + 2180 2f737263 2f6e6577 6c69622d 322e302e /src/newlib-2.0. + 2190 302f6e65 776c6962 2f6c6962 632f7374 0/newlib/libc/st + 21a0 72696e67 002f686f 6d652f77 6a672f52 ring./home/wjg/R + 21b0 65706f2f 6573702d 6f70656e 2d73646b epo/esp-open-sdk + 21c0 2d323031 37303632 322f6372 6f737374 -20170622/crosst + 21d0 6f6f6c2d 4e472f2e 6275696c 642f7874 ool-NG/.build/xt + 21e0 656e7361 2d6c7831 30362d65 6c662f62 ensa-lx106-elf/b + 21f0 75696c64 746f6f6c 732f6c69 622f6763 uildtools/lib/gc + 2200 632f7874 656e7361 2d6c7831 30362d65 c/xtensa-lx106-e + 2210 6c662f34 2e382e35 2f696e63 6c756465 lf/4.8.5/include + 2220 002f686f 6d652f77 6a672f52 65706f2f ./home/wjg/Repo/ + 2230 6573702d 6f70656e 2d73646b 2d323031 esp-open-sdk-201 + 2240 37303632 322f6372 6f737374 6f6f6c2d 70622/crosstool- + 2250 4e472f2e 6275696c 642f7372 632f6e65 NG/.build/src/ne + 2260 776c6962 2d322e30 2e302f6e 65776c69 wlib-2.0.0/newli + 2270 622f6c69 62632f69 6e636c75 64650000 b/libc/include.. + 2280 6d656d63 68722e63 00010000 73746464 memchr.c....stdd + 2290 65662e68 00020000 73747269 6e672e68 ef.h....string.h + 22a0 00030000 00000502 84601040 03cb0001 .........`.@.... + 22b0 03020900 00010330 09050001 03020903 .......0........ + 22c0 00010302 09060001 00020401 037c0902 .............|.. + 22d0 00010307 09030001 03010902 00010902 ................ + 22e0 00000101 82000000 02007c00 00000101 ..........|..... + 22f0 fb0e0d00 01010101 00000001 0000012f .............../ + 2300 686f6d65 2f776a67 2f526570 6f2f6573 home/wjg/Repo/es + 2310 702d6f70 656e2d73 646b2d32 30313730 p-open-sdk-20170 + 2320 3632322f 63726f73 73746f6f 6c2d4e47 622/crosstool-NG + 2330 2f2e6275 696c642f 7372632f 6e65776c /.build/src/newl + 2340 69622d32 2e302e30 2f6e6577 6c69622f ib-2.0.0/newlib/ + 2350 6c696263 2f696e63 6c756465 00006374 libc/include..ct + 2360 7970652e 68000100 00001f01 00000200 ype.h........... + 2370 7e000000 0101fb0e 0d000101 01010000 ~............... + 2380 00010000 012f686f 6d652f77 6a672f52 ...../home/wjg/R + 2390 65706f2f 6573702d 6f70656e 2d73646b epo/esp-open-sdk + 23a0 2d323031 37303632 322f6372 6f737374 -20170622/crosst + 23b0 6f6f6c2d 4e472f2e 6275696c 642f7372 ool-NG/.build/sr + 23c0 632f6763 632d342e 382e352f 6c696267 c/gcc-4.8.5/libg + 23d0 63632f63 6f6e6669 672f7874 656e7361 cc/config/xtensa + 23e0 00006c69 62316675 6e63732e 53000100 ..lib1funcs.S... + 23f0 00000005 02e06210 4003cc05 01030109 ......b.@....... + 2400 02000103 01090300 01030109 03000103 ................ + 2410 01090300 01030109 03000103 01090300 ................ + 2420 01030209 03000103 01090300 01030109 ................ + 2430 03000103 07090300 01030109 03000103 ................ + 2440 02090300 01030209 03000103 01090300 ................ + 2450 01030509 03000103 01090300 01030209 ................ + 2460 03000103 01090300 01030209 03000103 ................ + 2470 03090400 01030509 02000103 04090700 ................ + 2480 01030209 02000109 02000001 011e0300 ................ + 2490 0002007f 00000001 01fb0e0d 00010101 ................ + 24a0 01000000 01000001 2f686f6d 652f776a ......../home/wj + 24b0 672f5265 706f2f65 73702d6f 70656e2d g/Repo/esp-open- + 24c0 73646b2d 32303137 30363232 2f63726f sdk-20170622/cro + 24d0 7373746f 6f6c2d4e 472f2e62 75696c64 sstool-NG/.build + 24e0 2f737263 2f676363 2d342e38 2e352f6c /src/gcc-4.8.5/l + 24f0 69626763 632f636f 6e666967 2f787465 ibgcc/config/xte + 2500 6e736100 00696565 65373534 2d73662e nsa..ieee754-sf. + 2510 53000100 00000005 02b45e10 4003ac07 S.........^.@... + 2520 01030109 03000103 03090300 01030309 ................ + 2530 02000103 01090300 01030109 03000103 ................ + 2540 01090300 01030109 03000103 01090200 ................ + 2550 01030109 03000103 04090400 01030109 ................ + 2560 03000103 01090300 01030109 03000103 ................ + 2570 01090300 01030109 03000103 01090200 ................ + 2580 01030109 03000103 01090300 01030409 ................ + 2590 04000103 01090300 01030309 03000103 ................ + 25a0 03090200 01030109 03000103 01090300 ................ + 25b0 01030109 03000103 01090300 01030109 ................ + 25c0 02000103 01090300 01030409 03000103 ................ + 25d0 01090300 01030109 03000103 04090200 ................ + 25e0 01030109 03000103 01090300 01030209 ................ + 25f0 03000103 01090300 01030109 03000103 ................ + 2600 01090300 01030409 02000103 01090300 ................ + 2610 01030209 03000103 01090200 01030709 ................ + 2620 04000103 03090300 01030309 03000103 ................ + 2630 01090300 01030309 03000103 01090300 ................ + 2640 01030209 03000103 02090300 01030409 ................ + 2650 03000103 03090300 01030109 03000103 ................ + 2660 01090300 01030109 03000103 01090300 ................ + 2670 01030409 03000103 01090300 01030109 ................ + 2680 03000103 03090200 01030109 03000103 ................ + 2690 03090300 01030309 02000103 06090300 ................ + 26a0 01030309 03000103 03090300 01030109 ................ + 26b0 02000103 03090300 01030309 03000103 ................ + 26c0 01090200 01030709 03000103 04090300 ................ + 26d0 01030109 03000103 04090300 01030109 ................ + 26e0 03000103 01090200 01030409 03000103 ................ + 26f0 01090300 01030409 02000103 01090300 ................ + 2700 01030109 03000103 01090300 01030309 ................ + 2710 02000103 02090300 01030109 02000103 ................ + 2720 01090300 01030409 03000103 01090300 ................ + 2730 01030109 03000103 06090300 01030109 ................ + 2740 03000103 01090300 01030409 03000103 ................ + 2750 01090300 01030309 03000103 03090200 ................ + 2760 01030109 02000103 01090200 01030309 ................ + 2770 03000103 01090300 01030109 02000103 ................ + 2780 01090300 01030109 03000103 01090300 ................ + 2790 01030109 03000103 04090300 01030109 ................ + 27a0 03000103 01090300 01090200 0001011a ................ + 27b0 01000002 007f0000 000101fb 0e0d0001 ................ + 27c0 01010100 00000100 00012f68 6f6d652f ........../home/ + 27d0 776a672f 5265706f 2f657370 2d6f7065 wjg/Repo/esp-ope + 27e0 6e2d7364 6b2d3230 31373036 32322f63 n-sdk-20170622/c + 27f0 726f7373 746f6f6c 2d4e472f 2e627569 rosstool-NG/.bui + 2800 6c642f73 72632f67 63632d34 2e382e35 ld/src/gcc-4.8.5 + 2810 2f6c6962 6763632f 636f6e66 69672f78 /libgcc/config/x + 2820 74656e73 61000069 65656537 35342d73 tensa..ieee754-s + 2830 662e5300 01000000 000502ec 5f104003 f.S........._.@. + 2840 f00a0103 01090300 01030309 03000103 ................ + 2850 01090300 01030109 03000103 01090300 ................ + 2860 01030309 03000103 01090300 01030309 ................ + 2870 03000103 01090300 01030309 03000103 ................ + 2880 01090300 01030109 03000103 04090500 ................ + 2890 01030109 03000103 03090200 01030309 ................ + 28a0 02000103 01090300 01030109 02000103 ................ + 28b0 01090300 01030109 02000103 03090200 ................ + 28c0 01030109 02000109 02000001 01 ............. +Contents of section .debug_str: + 0000 5f6d6973 63006c63 645f6275 665f636c _misc.lcd_buf_cl + 0010 73007469 6d65725f 65787069 7265005f s.timer_expire._ + 0020 6c6f636b 5f74006c 63645f73 7472005f lock_t.lcd_str._ + 0030 6f6e5f65 7869745f 61726773 005f7772 on_exit_args._wr + 0040 69746500 5f776374 6f6d625f 73746174 ite._wctomb_stat + 0050 65004c43 445f5550 44415445 5f455645 e.LCD_UPDATE_EVE + 0060 4e54005f 72343800 5f736967 6e616c5f NT._r48._signal_ + 0070 62756600 736c6964 655f696e 00455453 buf.slide_in.ETS + 0080 54696d65 7246756e 63005f66 6c616773 TimerFunc._flags + 0090 005f6572 726e6f00 6c63645f 63677261 ._errno.lcd_cgra + 00a0 6d5f6261 6e6b5f31 004c4344 5f4c494e m_bank_1.LCD_LIN + 00b0 4553005f 45545354 494d4552 5f004c43 ES._ETSTIMER_.LC + 00c0 445f434f 4c554d4e 53005f5f 73665f66 D_COLUMNS.__sf_f + 00d0 616b655f 7374646f 7574005f 4c4f434b ake_stdout._LOCK + 00e0 5f524543 55525349 56455f54 006c6364 _RECURSIVE_T.lcd + 00f0 5f627566 5f636861 72005f72 65616400 _buf_char._read. + 0100 5f6d6272 6c656e5f 73746174 65005f66 _mbrlen_state._f + 0110 706f735f 74006c63 645f7570 64617465 pos_t.lcd_update + 0120 005f666e 73005f63 6f6f6b69 65005f42 ._fns._cookie._B + 0130 6967696e 74005f5f 746d5f77 64617900 igint.__tm_wday. + 0140 5f726573 756c7400 6574735f 74696d65 _result.ets_time + 0150 725f7365 74666e00 5f5f4649 4c45005f r_setfn.__FILE._ + 0160 5f746d5f 686f7572 00657473 5f74696d _tm_hour.ets_tim + 0170 65725f64 69736172 6d005f5f 636f756e er_disarm.__coun + 0180 74007469 6d65725f 6e657874 00666c6f t.timer_next.flo + 0190 6174005f 5f746d5f 6d696e00 5f5f7366 at.__tm_min.__sf + 01a0 005f7261 6e643438 005f7265 73756c74 ._rand48._result + 01b0 5f6b006c 6f6e6720 6c6f6e67 20756e73 _k.long long uns + 01c0 69676e65 6420696e 74005f61 73637469 igned int._ascti + 01d0 6d655f62 7566005f 5f734649 4c45005f me_buf.__sFILE._ + 01e0 77647300 74696d65 725f6675 6e630073 wds.timer_func.s + 01f0 6c696465 5f6f7574 5f696e69 74005f6f lide_out_init._o + 0200 66667365 7400506f 6c5f6300 506f6c5f ffset.Pol_c.Pol_ + 0210 6500506f 6c5f6c00 506f6c5f 6e00506f e.Pol_l.Pol_n.Po + 0220 6c5f6f00 506f6c5f 73005f65 6d657267 l_o.Pol_s._emerg + 0230 656e6379 0064656d 6f5f7469 746c6500 ency.demo_title. + 0240 74696d65 725f7065 72696f64 00737472 timer_period.str + 0250 5f656e64 5f666c61 67005f5f 746d5f73 _end_flag.__tm_s + 0260 6563005f 5f746d5f 79646179 005f696e ec.__tm_yday._in + 0270 63005f69 6e64005f 6d627372 746f7763 c._ind._mbsrtowc + 0280 735f7374 61746500 5f5f7661 6c756500 s_state.__value. + 0290 5f703573 005f7763 7372746f 6d62735f _p5s._wcsrtombs_ + 02a0 73746174 65005f6d 626c656e 5f737461 state._mblen_sta + 02b0 7465006c 63645f62 75665f73 6c696465 te.lcd_buf_slide + 02c0 5f737472 5f696e00 506f6c5f 61005f5f _str_in.Pol_a.__ + 02d0 746d5f6d 64617900 5f736967 5f66756e tm_mday._sig_fun + 02e0 63005f6d 6272746f 77635f73 74617465 c._mbrtowc_state + 02f0 005f666c 6f636b5f 74007573 65725f69 ._flock_t.user_i + 0300 6e697400 74696d65 725f6172 67005f5f nit.timer_arg.__ + 0310 77636800 5f696f62 73005f6f 6e5f6578 wch._iobs._on_ex + 0320 69745f61 7267735f 70747200 5f636c6f it_args_ptr._clo + 0330 7365005f 5f736469 64696e69 74005f5f se.__sdidinit.__ + 0340 7346494c 455f6661 6b65005f 67616d6d sFILE_fake._gamm + 0350 615f7369 676e6761 6d006c6f 6e67206c a_signgam.long l + 0360 6f6e6720 696e7400 5f626173 65005f66 ong int._base._f + 0370 7265656c 69737400 5f6d756c 74006c63 reelist._mult.lc + 0380 645f696e 6974005f 5f554c6f 6e67006c d_init.__ULong.l + 0390 63645f75 70646174 655f6362 005f7763 cd_update_cb._wc + 03a0 72746f6d 625f7374 61746500 5f66696c rtomb_state._fil + 03b0 65005a6e 5f776f64 79005f5f 636c6561 e.Zn_wody.__clea + 03c0 6e757000 5f6d6273 74617465 5f74006c nup._mbstate_t.l + 03d0 63645f65 6e61626c 655f6261 636b6c69 cd_enable_backli + 03e0 67687400 5f6d7072 6563005f 5f746d5f ght._mprec.__tm_ + 03f0 69736473 74006c63 645f6c69 6e650073 isdst.lcd_line.s + 0400 74726c65 6e005f5f 746d5f6d 6f6e006c trlen.__tm_mon.l + 0410 6f6e6720 646f7562 6c65005f 61746578 ong double._atex + 0420 69743000 6c63645f 6275665f 736c6964 it0.lcd_buf_slid + 0430 655f7374 725f6f75 7400736c 6964655f e_str_out.slide_ + 0440 696e5f69 6e697400 63686172 5f300063 in_init.char_0.c + 0450 6861725f 31006368 61725f32 00636861 har_1.char_2.cha + 0460 725f3300 63686172 5f340063 6861725f r_3.char_4.char_ + 0470 35005f61 74657869 74005f6d 62737461 5._atexit._mbsta + 0480 74650062 6c696e6b 5f636e74 0073686f te.blink_cnt.sho + 0490 72742069 6e740047 4e552043 31372038 rt int.GNU C17 8 + 04a0 2e342e30 202d6d6c 6f6e6763 616c6c73 .4.0 -mlongcalls + 04b0 202d6d74 6578742d 73656374 696f6e2d -mtext-section- + 04c0 6c697465 72616c73 202d6720 2d4f7320 literals -g -Os + 04d0 2d4f7320 2d666e6f 2d696e6c 696e652d -Os -fno-inline- + 04e0 66756e63 74696f6e 73202d66 66756e63 functions -ffunc + 04f0 74696f6e 2d736563 74696f6e 73202d66 tion-sections -f + 0500 64617461 2d736563 74696f6e 73202d66 data-sections -f + 0510 6e6f2d62 75696c74 696e2d70 72696e74 no-builtin-print + 0520 66202d66 6e6f2d6a 756d702d 7461626c f -fno-jump-tabl + 0530 6573202d 666e6f2d 67756573 732d6272 es -fno-guess-br + 0540 616e6368 2d70726f 62616269 6c697479 anch-probability + 0550 202d6672 656f7264 65722d62 6c6f636b -freorder-block + 0560 732d616e 642d7061 72746974 696f6e20 s-and-partition + 0570 2d666e6f 2d637365 2d666f6c 6c6f772d -fno-cse-follow- + 0580 6a756d70 73007573 65725f6d 61696e2e jumps.user_main. + 0590 63004c49 4e455f31 004c494e 455f3200 c.LINE_1.LINE_2. + 05a0 5f736967 6e005f5f 77636862 005f676c _sign.__wchb._gl + 05b0 6f62616c 5f696d70 7572655f 70747200 obal_impure_ptr. + 05c0 5f5f746d 5f796561 72005f6d 6973635f __tm_year._misc_ + 05d0 7265656e 74005f6c 6f63616c 74696d65 reent._localtime + 05e0 5f627566 005f6376 746c656e 005f6d61 _buf._cvtlen._ma + 05f0 78776473 005f6c36 34615f62 75660063 xwds._l64a_buf.c + 0600 6861725f 36005f62 6c6b7369 7a650063 har_6._blksize.c + 0610 6861725f 37005f5f 746d005f 6c6f636b har_7.__tm._lock + 0620 00636861 725f6261 6e6b5f73 74727563 .char_bank_struc + 0630 7400736c 6964655f 6f757400 5f6e696f t.slide_out._nio + 0640 62730077 696e745f 7400443a 5c305f50 bs.wint_t.D:\0_P + 0650 726f6a65 6b74795c 365f4269 626c696f rojekty\6_Biblio + 0660 74656b69 5c4c4344 5f484434 34373830 teki\LCD_HD44780 + 0670 5c657861 6d706c65 735c4553 50383236 \examples\ESP826 + 0680 365f4e4f 4e4f535f 53444b5c 4c43445f 6_NONOS_SDK\LCD_ + 0690 48443434 3738305f 54455354 5c757365 HD44780_TEST\use + 06a0 72005f64 736f5f68 616e646c 65006c63 r._dso_handle.lc + 06b0 645f6275 665f6c6f 63617465 006c6364 d_buf_locate.lcd + 06c0 5f736869 66745f74 696d6572 005f6376 _shift_timer._cv + 06d0 74627566 00756e73 69676e65 64206368 tbuf.unsigned ch + 06e0 61720073 68696674 5f737472 5f737461 ar.shift_str_sta + 06f0 74655f6d 61636869 6e65005f 67657464 te_machine._getd + 0700 6174655f 65727200 5f6c6266 73697a65 ate_err._lbfsize + 0710 005f6164 64005f42 6f6f6c00 5f5f7362 ._add._Bool.__sb + 0720 7566005f 676c7565 005f5f73 676c7565 uf._glue.__sglue + 0730 006c6364 5f627566 5f737472 005f7374 .lcd_buf_str._st + 0740 72746f6b 5f6c6173 74005f6d 62746f77 rtok_last._mbtow + 0750 635f7374 61746500 45545354 696d6572 c_state.ETSTimer + 0760 0064656d 6f5f7465 6b737400 5f6c6f63 .demo_tekst._loc + 0770 616c6500 6c63645f 626c696e 6b5f6362 ale.lcd_blink_cb + 0780 005f666e 61726773 00657473 5f74696d ._fnargs.ets_tim + 0790 65725f61 726d5f6e 65770073 686f7274 er_arm_new.short + 07a0 20756e73 69676e65 6420696e 74005f66 unsigned int._f + 07b0 6e747970 6573005f 73697a65 005f6f66 ntypes._size._of + 07c0 665f7400 5f6e6275 66005f75 6e737065 f_t._nbuf._unspe + 07d0 63696669 65645f6c 6f63616c 655f696e cified_locale_in + 07e0 666f005f 5f73665f 66616b65 5f737464 fo.__sf_fake_std + 07f0 65727200 5f666c61 67733200 5f69735f err._flags2._is_ + 0800 63786100 6c63645f 64697361 626c655f cxa.lcd_disable_ + 0810 6261636b 6c696768 74005f73 65656400 backlight._seed. + 0820 5f72616e 645f6e65 7874005f 5f6c6f63 _rand_next.__loc + 0830 616c655f 74005f73 65656b00 5f756275 ale_t._seek._ubu + 0840 66005f5f 73665f66 616b655f 73746469 f.__sf_fake_stdi + 0850 6e005359 5354454d 5f504152 54495449 n.SYSTEM_PARTITI + 0860 4f4e5f49 4e56414c 49440053 59535445 ON_INVALID.SYSTE + 0870 4d5f5041 52544954 494f4e5f 4d415800 M_PARTITION_MAX. + 0880 53595354 454d5f50 41525449 54494f4e SYSTEM_PARTITION + 0890 5f52465f 43414c00 53595354 454d5f50 _RF_CAL.SYSTEM_P + 08a0 41525449 54494f4e 5f424f4f 544c4f41 ARTITION_BOOTLOA + 08b0 44455200 61745f70 61727469 74696f6e DER.at_partition + 08c0 5f746162 6c650053 59535445 4d5f5041 _table.SYSTEM_PA + 08d0 52544954 494f4e5f 43555354 4f4d4552 RTITION_CUSTOMER + 08e0 5f424547 494e0053 59535445 4d5f5041 _BEGIN.SYSTEM_PA + 08f0 52544954 494f4e5f 53534c5f 434c4945 RTITION_SSL_CLIE + 0900 4e545f43 41005359 5354454d 5f504152 NT_CA.SYSTEM_PAR + 0910 54495449 4f4e5f53 59535445 4d5f5041 TITION_SYSTEM_PA + 0920 52414d45 54455200 53595354 454d5f50 RAMETER.SYSTEM_P + 0930 41525449 54494f4e 5f4f5441 5f310053 ARTITION_OTA_1.S + 0940 59535445 4d5f5041 52544954 494f4e5f YSTEM_PARTITION_ + 0950 4f54415f 32005359 5354454d 5f504152 OTA_2.SYSTEM_PAR + 0960 54495449 4f4e5f57 5041325f 454e5445 TITION_WPA2_ENTE + 0970 52505249 53455f43 41007061 72746974 RPRISE_CA.partit + 0980 696f6e5f 6974656d 5f740053 59535445 ion_item_t.SYSTE + 0990 4d5f5041 52544954 494f4e5f 41545f50 M_PARTITION_AT_P + 09a0 4152414d 45544552 00535953 54454d5f ARAMETER.SYSTEM_ + 09b0 50415254 4954494f 4e5f5353 4c5f5345 PARTITION_SSL_SE + 09c0 52564552 5f434100 75736572 5f707265 RVER_CA.user_pre + 09d0 5f696e69 74005359 5354454d 5f504152 _init.SYSTEM_PAR + 09e0 54495449 4f4e5f57 5041325f 454e5445 TITION_WPA2_ENTE + 09f0 52505249 53455f43 4552545f 50524956 RPRISE_CERT_PRIV + 0a00 4b455900 70617274 6974696f 6e5f7479 KEY.partition_ty + 0a10 70655f74 00535953 54454d5f 50415254 pe_t.SYSTEM_PART + 0a20 4954494f 4e5f5048 595f4441 5441006f ITION_PHY_DATA.o + 0a30 735f7072 696e7466 5f706c75 73005359 s_printf_plus.SY + 0a40 5354454d 5f504152 54495449 4f4e5f53 STEM_PARTITION_S + 0a50 534c5f43 4c49454e 545f4345 52545f50 SL_CLIENT_CERT_P + 0a60 5249564b 45590053 59535445 4d5f5041 RIVKEY.SYSTEM_PA + 0a70 52544954 494f4e5f 53534c5f 53455256 RTITION_SSL_SERV + 0a80 45525f43 4552545f 50524956 4b455900 ER_CERT_PRIVKEY. + 0a90 61646472 00706172 74697469 6f6e732e addr.partitions. + 0aa0 63007379 7374656d 5f706172 74697469 c.system_partiti + 0ab0 6f6e5f74 61626c65 5f726567 69737400 on_table_regist. + 0ac0 6c63645f 636c7300 696e6974 5f4c4344 lcd_cls.init_LCD + 0ad0 5f70696e 73006c63 645f7772 6974655f _pins.lcd_write_ + 0ae0 62797465 006c6364 5f646566 5f636861 byte.lcd_def_cha + 0af0 72007365 745f6461 74615f70 696e735f r.set_data_pins_ + 0b00 61735f6f 75747075 74730077 72697465 as_outputs.write + 0b10 5f6c6364 5f627566 5f325f6c 6364006c _lcd_buf_2_lcd.l + 0b20 63645f63 68617200 4c43445f 42434b4c cd_char.LCD_BCKL + 0b30 00707265 765f6c63 645f6275 66666572 .prev_lcd_buffer + 0b40 006c6364 5f736967 0062696e 5f76616c .lcd_sig.bin_val + 0b50 5f627566 66657200 6c63645f 626c696e _buffer.lcd_blin + 0b60 6b696e67 5f637572 736f725f 6f6e0073 king_cursor_on.s + 0b70 74726361 74004347 52414d5f 62616e6b trcat.CGRAM_bank + 0b80 5f785f63 6861725f 61647200 7365745f _x_char_adr.set_ + 0b90 64617461 5f70696e 735f6173 5f696e70 data_pins_as_inp + 0ba0 75747300 7a65726f 735f7174 79007769 uts.zeros_qty.wi + 0bb0 64746800 7375626f 70746172 67006c63 dth.suboptarg.lc + 0bc0 645f6375 72736f72 5f6f6e00 7365745f d_cursor_on.set_ + 0bd0 4c43445f 64617461 5f70696e 735f6173 LCD_data_pins_as + 0be0 5f696e70 7574735f 66756e63 5f70006c _inputs_func_p.l + 0bf0 63645f77 72697465 5f636d64 00726573 cd_write_cmd.res + 0c00 65745f4c 43445f53 49475f66 756e635f et_LCD_SIG_func_ + 0c10 70004c43 445f4500 6c63645f 6275665f p.LCD_E.lcd_buf_ + 0c20 62696e00 6c63645f 62696e00 6c63645f bin.lcd_bin.lcd_ + 0c30 77726974 655f3462 69745f64 61746100 write_4bit_data. + 0c40 72696768 74007072 65765f6c 63645f62 right.prev_lcd_b + 0c50 7566665f 706f735f 70747200 6c63645f uff_pos_ptr.lcd_ + 0c60 706f735f 74006669 6c6c5f7a 65726f73 pos_t.fill_zeros + 0c70 5f627566 66657200 4c43445f 5253004c _buffer.LCD_RS.L + 0c80 43445f52 57006c63 645f6c6f 61645f63 CD_RW.lcd_load_c + 0c90 6861725f 62616e6b 006c6364 5f627566 har_bank.lcd_buf + 0ca0 5f696e74 0064656c 61795f75 735f6675 _int.delay_us_fu + 0cb0 6e635f70 006c6364 5f696e74 006c6364 nc_p.lcd_int.lcd + 0cc0 5f627566 5f686578 006c6364 5f686578 _buf_hex.lcd_hex + 0cd0 006c6364 5f686f6d 65006c63 645f6375 .lcd_home.lcd_cu + 0ce0 72736f72 5f6f6666 00676574 5f4c4344 rsor_off.get_LCD + 0cf0 5f646174 615f706f 72745f66 756e635f _data_port_func_ + 0d00 70007365 745f4c43 445f6461 74615f70 p.set_LCD_data_p + 0d10 696e735f 61735f6f 75747075 74735f66 ins_as_outputs_f + 0d20 756e635f 70004c43 445f494f 5f647269 unc_p.LCD_IO_dri + 0d30 7665725f 696e7465 72666163 655f6765 ver_interface_ge + 0d40 74007370 72696e74 66006c63 645f6864 t.sprintf.lcd_hd + 0d50 34343738 302e6300 6c63645f 77726974 44780.c.lcd_writ + 0d60 655f6461 7461006c 63645f72 65736574 e_data.lcd_reset + 0d70 5f616c6c 5f534947 006c6364 5f637572 _all_SIG.lcd_cur + 0d80 736f725f 706f7369 74696f6e 00626974 sor_position.bit + 0d90 5f6d6173 6b006c65 6674005f 5f75696e _mask.left.__uin + 0da0 74385f74 00757064 6174655f 6c63645f t8_t.update_lcd_ + 0db0 6375726f 73725f70 6f737369 74696f6e curosr_possition + 0dc0 006c6364 5f6c6f63 61746500 6c63645f .lcd_locate.lcd_ + 0dd0 6275665f 706f7369 74696f6e 5f707472 buf_position_ptr + 0de0 00726561 645f6461 74610072 65676973 .read_data.regis + 0df0 7465725f 4c43445f 494f5f64 72697665 ter_LCD_IO_drive + 0e00 72005f5f 75696e74 33325f74 00636f70 r.__uint32_t.cop + 0e10 795f6c63 645f6275 665f325f 70726576 y_lcd_buf_2_prev + 0e20 5f6c6364 5f627566 006c6364 5f736574 _lcd_buf.lcd_set + 0e30 5f616c6c 5f534947 006d6973 7365645f _all_SIG.missed_ + 0e40 63686172 5f636f75 6e746572 5f696e5f char_counter_in_ + 0e50 4c43445f 6c696e65 00636865 636b5f6c LCD_line.check_l + 0e60 63645f62 75665f70 6f737369 74696f6e cd_buf_possition + 0e70 5f707472 5f6f7665 72666c6f 77006669 _ptr_overflow.fi + 0e80 6c6c5f62 696e5f76 616c7565 5f627566 ll_bin_value_buf + 0e90 66657200 7a65726f 735f6275 66004c43 fer.zeros_buf.LC + 0ea0 445f494f 5f647269 7665725f 696e7465 D_IO_driver_inte + 0eb0 72666163 655f7374 72756374 007a6e61 rface_struct.zna + 0ec0 6b00616c 69676e6d 656e7400 7365745f k.alignment.set_ + 0ed0 4c43445f 64617461 5f706f72 745f6675 LCD_data_port_fu + 0ee0 6e635f70 00696e69 745f4c43 445f6461 nc_p.init_LCD_da + 0ef0 74615f61 6e645f53 49475f70 696e735f ta_and_SIG_pins_ + 0f00 66756e63 5f700073 65745f4c 43445f44 func_p.set_LCD_D + 0f10 4154415f 50494e53 5f61735f 6f757470 ATA_PINS_as_outp + 0f20 75747300 4c43445f 7365745f 53494700 uts.LCD_set_SIG. + 0f30 6574735f 64656c61 795f7573 004c4344 ets_delay_us.LCD + 0f40 5f726573 65745f53 49470067 65745f4c _reset_SIG.get_L + 0f50 43445f44 4154415f 50494e53 5f737461 CD_DATA_PINS_sta + 0f60 7465005f 5f75696e 7431365f 74004c43 te.__uint16_t.LC + 0f70 445f5349 4700696e 69745f4c 43445f64 D_SIG.init_LCD_d + 0f80 6174615f 616e645f 5349475f 70696e73 ata_and_SIG_pins + 0f90 00677069 6f5f6f75 74707574 5f736574 .gpio_output_set + 0fa0 00777261 7065725f 64656c61 795f7573 .wraper_delay_us + 0fb0 004c4344 5f494f5f 64726976 65725f69 .LCD_IO_driver_i + 0fc0 6e746572 66616365 2e630073 65745f4c nterface.c.set_L + 0fd0 43445f44 4154415f 50494e53 5f737461 CD_DATA_PINS_sta + 0fe0 74650073 65745f4c 43445f44 4154415f te.set_LCD_DATA_ + 0ff0 50494e53 5f61735f 696e7075 74730073 PINS_as_inputs.s + 1000 697a655f 74006c65 6e677468 00474e55 ize_t.length.GNU + 1010 20432034 2e382e35 202d6d6c 6f6e6763 C 4.8.5 -mlongc + 1020 616c6c73 202d6720 2d4f7320 2d4f7320 alls -g -Os -Os + 1030 2d666e6f 2d6a756d 702d7461 626c6573 -fno-jump-tables + 1040 202d666e 6f2d6275 696c7469 6e007372 -fno-builtin.sr + 1050 635f766f 6964006d 656d6368 72002f68 c_void.memchr./h + 1060 6f6d652f 776a672f 5265706f 2f657370 ome/wjg/Repo/esp + 1070 2d6f7065 6e2d7364 6b2d3230 31373036 -open-sdk-201706 + 1080 32322f63 726f7373 746f6f6c 2d4e472f 22/crosstool-NG/ + 1090 2e627569 6c642f73 72632f6e 65776c69 .build/src/newli + 10a0 622d322e 302e302f 6e65776c 69622f6c b-2.0.0/newlib/l + 10b0 6962632f 73747269 6e672f6d 656d6368 ibc/string/memch + 10c0 722e6300 73697a65 74797065 005f5f63 r.c.sizetype.__c + 10d0 74797065 5f707472 5f5f002f 686f6d65 type_ptr__./home + 10e0 2f776a67 2f526570 6f2f6573 702d6f70 /wjg/Repo/esp-op + 10f0 656e2d73 646b2d32 30313730 3632322f en-sdk-20170622/ + 1100 63726f73 73746f6f 6c2d4e47 2f2e6275 crosstool-NG/.bu + 1110 696c642f 7372632f 6e65776c 69622d32 ild/src/newlib-2 + 1120 2e302e30 2f6e6577 6c69622f 6c696263 .0.0/newlib/libc + 1130 2f637479 70652f63 74797065 5f2e6300 /ctype/ctype_.c. + 1140 5f637479 70655f00 _ctype_. diff --git "a/examples/ESP8266_NONOS_SDK/documents/CN/Partition Table \350\257\264\346\230\216.md" "b/examples/ESP8266_NONOS_SDK/documents/CN/Partition Table \350\257\264\346\230\216.md" new file mode 100644 index 0000000..cb874f5 --- /dev/null +++ "b/examples/ESP8266_NONOS_SDK/documents/CN/Partition Table \350\257\264\346\230\216.md" @@ -0,0 +1,86 @@ + +## 1. Partition Table 说明 +从 ESP8266\_NonOS\_SDK_V3.0 起,增加了 partition table(参见 `include/user_interface.h` 中 的 `partition_item_t` 结构体),用于管理各个 flash 分区,用户可以自行调整部分 partition 地址及大小。 +使用 partition table 的示例可参考 `ESP8266_NONOS_SDK/examples/IoT_Demo/user/user_main.c`,注意点如下: + +- 用户必须在 `user_pre_init` 中调用 `system_partition_table_regist` 函数注册 partition table: + - `system_partition_table_regist` 注册时,会检查各个 partition 区域是否有覆盖,如果有覆盖,则返回 false,用户应重新调整 partition。 + - `system_partition_table_regist` 第三个参数传递的 map 方式必须和编译烧录时选择的 map 一致,否则将会启动异常,建议可以直接传入宏 `SPI_FLASH_SIZE_MAP`。 +- boot.bin 必须烧录到 0x0,不允许改动。 +- user1.bin 必须烧录到 0x1000,不允许改动。 +- user2.bin: + - 对于 512+512 map,必须烧录到 0x81000; + - 对于 1024+1024 map,必须烧录到 0x101000; + - 不允许改动。 + +ESP8266\_NonOS\_SDK 定义的 partition 类型如下,位于 `include/user_interface.h` 中: + +``` +typedef enum { + SYSTEM_PARTITION_INVALID = 0, + SYSTEM_PARTITION_BOOTLOADER, /* user can't modify this partition address */ + SYSTEM_PARTITION_OTA_1, /* user can't modify this partition address, but can modify its size */ + SYSTEM_PARTITION_OTA_2, /* user can't modify this partition address, but can modify its size */ + SYSTEM_PARTITION_RF_CAL, /* user must define this partition */ + SYSTEM_PARTITION_PHY_DATA, /* user must define this partition */ + SYSTEM_PARTITION_SYSTEM_PARAMETER, /* user must define this partition */ + SYSTEM_PARTITION_AT_PARAMETER, + SYSTEM_PARTITION_SSL_CLIENT_CERT_PRIVKEY, + SYSTEM_PARTITION_SSL_CLIENT_CA, + SYSTEM_PARTITION_SSL_SERVER_CERT_PRIVKEY, + SYSTEM_PARTITION_SSL_SERVER_CA, + SYSTEM_PARTITION_WPA2_ENTERPRISE_CERT_PRIVKEY, + SYSTEM_PARTITION_WPA2_ENTERPRISE_CA, + + SYSTEM_PARTITION_CUSTOMER_BEGIN = 100, /* user can define partition after here */ + SYSTEM_PARTITION_MAX +} partition_type_t; +``` +* `SYSTEM_PARTITION_RF_CAL`、`SYSTEM_PARTITION_PHY_DATA` 和 `SYSTEM_PARTITION_SYSTEM_PARAMETER` 必须在 partition table 中定义,位置可以自己指定。 +* 用户如需增加自定义 partition,从 `SYSTEM_PARTITION_CUSTOMER_BEGIN` 之后增加即可。并且,在应用程序的 partition table 中定义,这样 SDK 检查时,将一并检查自定义的 partition。 + + +## 2. Non-FOTA 应用 +用户如需使用 Non-FOTA 的方式,可以从 `SYSTEM_PARTITION_CUSTOMER_BEGIN` 后面定义 partition,如: + +``` +#define EAGLE_FLASH_BIN_ADDR (SYSTEM_PARTITION_CUSTOMER_BEGIN + 1) +#define EAGLE_IROM0TEXT_BIN_ADDR (SYSTEM_PARTITION_CUSTOMER_BEGIN + 2) + +static const partition_item_t partition_table[] = { + { EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000}, + { EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000}, + { SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR, 0x1000}, + { SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR, 0x1000}, + { SYSTEM_PARTITION_SYSTEM_PARAMETER,SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR, 0x3000}, +}; + +void ICACHE_FLASH_ATTR user_pre_init(void) +{ + if(!system_partition_table_regist(partition_table, sizeof(partition_table)/sizeof(partition_table[0]),SPI_FLASH_SIZE_MAP)) { + os_printf("system_partition_table_regist fail\r\n"); + while(1); + } +} + +``` + +## 3. AT: 512+512 map +受限于 Flash 和 bin 文件的大小,从 ESP8266\_NonOS\_SDK_V3.0 起,AT 默认不再支持 512+512 的 map 方式。 +如果用户需要支持 512+512 map,可以自行修改 AT 应用,调整 partition 分区,方法如下: + +* 删减功能,确保 AT 编译生成的 user.bin 文件大小不能超过 AT 应用中自定义的 `SYSTEM_PARTITION_OTA_SIZE`。例如,由使用 libmbedtls 改为使用 libssl,或者移除 SmartConfig 功能等。 +* 自定义 partition table,例如: + +``` +#define SYSTEM_PARTITION_OTA_SIZE 0x6A000 // 请确保编译生成的 bin 文件不超过此值 +#define SYSTEM_PARTITION_OTA_2_ADDR 0x81000 +#define SYSTEM_PARTITION_RF_CAL_ADDR 0xfb000 +#define SYSTEM_PARTITION_PHY_DATA_ADDR 0xfc000 +#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR 0xfd000 +#define SYSTEM_PARTITION_AT_PARAMETER_ADDR. 0x7d000 +#define SYSTEM_PARTITION_SSL_CLIENT_CERT_PRIVKEY_ADDR 0x7c000 +#define SYSTEM_PARTITION_SSL_CLIENT_CA_ADDR. 0x7b000 +#define SYSTEM_PARTITION_WPA2_ENTERPRISE_CERT_PRIVKEY_ADDR 0x7a000 +#define SYSTEM_PARTITION_WPA2_ENTERPRISE_CA_ADDR 0x79000 +``` diff --git a/examples/ESP8266_NONOS_SDK/documents/EN/ Partition Table.md b/examples/ESP8266_NONOS_SDK/documents/EN/ Partition Table.md new file mode 100644 index 0000000..de67120 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/documents/EN/ Partition Table.md @@ -0,0 +1,84 @@ + +## 1. Partition Table +Partition table is added since ESP8266\_NonOS\_SDK_V3.0, see `partition_item_t` in `include/user_interface.h`. Users can configure the flash partitions in user application, and adjusting some partitions' addresses and sizes according to practical needs. +Users can refer to `ESP8266_NONOS_SDK/examples/IoT_Demo/user/user_main.c` to set partition table. Please note the following items: + +- Call `system_partition_table_regist` in `user_pre_init` to register partition table: + - `system_partition_table_regist` will check if there is any overwrite conflict. If there is, it will return false, and then you need to revise your partition table. + - The 3rd parameter of `system_partition_table_regist` should be the actual flash map corresponding to the one you choose in compiling and downloading. It is suggested that you can use `SPI_FLASH_SIZE_MAP`, which is set by the system while compiling, as the 3rd parameter. +- boot.bin MUST be at address 0x0. +- user1.bin MUST be at address 0x1000. +- user2.bin: + - For 512+512 map, MUST be at address 0x81000. + - For 1024+1024 map, MUST be at address 0x101000. + +Partition types are defined in `ESP8266_NonOS_SDK/include/user_interface.h`: + +``` +typedef enum { + SYSTEM_PARTITION_INVALID = 0, + SYSTEM_PARTITION_BOOTLOADER, /* user can't modify this partition address */ + SYSTEM_PARTITION_OTA_1, /* user can't modify this partition address, but can modify its size */ + SYSTEM_PARTITION_OTA_2, /* user can't modify this partition address, but can modify its size */ + SYSTEM_PARTITION_RF_CAL, /* user must define this partition */ + SYSTEM_PARTITION_PHY_DATA, /* user must define this partition */ + SYSTEM_PARTITION_SYSTEM_PARAMETER, /* user must define this partition */ + SYSTEM_PARTITION_AT_PARAMETER, + SYSTEM_PARTITION_SSL_CLIENT_CERT_PRIVKEY, + SYSTEM_PARTITION_SSL_CLIENT_CA, + SYSTEM_PARTITION_SSL_SERVER_CERT_PRIVKEY, + SYSTEM_PARTITION_SSL_SERVER_CA, + SYSTEM_PARTITION_WPA2_ENTERPRISE_CERT_PRIVKEY, + SYSTEM_PARTITION_WPA2_ENTERPRISE_CA, + + SYSTEM_PARTITION_CUSTOMER_BEGIN = 100, /* user can add user-defined partitions after this item */ + SYSTEM_PARTITION_MAX +} partition_type_t; +``` +* `SYSTEM_PARTITION_RF_CAL`, `SYSTEM_PARTITION_PHY_DATA` and `SYSTEM_PARTITION_SYSTEM_PARAMETER` have to be defined in the partition table in application. User can change their addresses according to practical needs. +* If you need to add user-defined partitions, please add them after `SYSTEM_PARTITION_CUSTOMER_BEGIN`, and then define them in the partition table in application. Then, the system will check all user-defined partitions and original system partitions when start-up. + +## 2. Non-FOTA Map +To use non-FOTA map, users can add user-defined partitions after `SYSTEM_PARTITION_CUSTOMER_BEGIN` as the following example: + +``` +#define EAGLE_FLASH_BIN_ADDR (SYSTEM_PARTITION_CUSTOMER_BEGIN + 1) +#define EAGLE_IROM0TEXT_BIN_ADDR (SYSTEM_PARTITION_CUSTOMER_BEGIN + 2) + +static const partition_item_t partition_table[] = { + { EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000}, + { EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000}, + { SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR, 0x1000}, + { SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR, 0x1000}, + { SYSTEM_PARTITION_SYSTEM_PARAMETER,SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR, 0x3000}, +}; + +void ICACHE_FLASH_ATTR user_pre_init(void) +{ + if(!system_partition_table_regist(partition_table, sizeof(partition_table)/sizeof(partition_table[0]),SPI_FLASH_SIZE_MAP)) { + os_printf("system_partition_table_regist fail\r\n"); + while(1); + } +} + +``` + +## 3. AT: 512+512 map +Limited by the size of the AT bin files, since ESP8266\_NonOS\_SDK_V3.0, `512+512 flash map` is NOT supported in default AT firmware. +But users can try to configure 512+512 map by modifying AT application, adjusting partition table and recompiling it, as following steps: + +* Remove some functions to reduce the size of user.bin which generated by compiling AT application. Please note that the size of user.bin should less than `SYSTEM_PARTITION_OTA_SIZE`. For example, to reduce the bin size, you can change from using libmbedtls to libssl, or remove SmartConfig. +* Configure user-defined partition table: + +``` +#define SYSTEM_PARTITION_OTA_SIZE 0x6A000 // upper limit for user.bin +#define SYSTEM_PARTITION_OTA_2_ADDR 0x81000 +#define SYSTEM_PARTITION_RF_CAL_ADDR 0xfb000 +#define SYSTEM_PARTITION_PHY_DATA_ADDR 0xfc000 +#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR 0xfd000 +#define SYSTEM_PARTITION_AT_PARAMETER_ADDR. 0x7d000 +#define SYSTEM_PARTITION_SSL_CLIENT_CERT_PRIVKEY_ADDR 0x7c000 +#define SYSTEM_PARTITION_SSL_CLIENT_CA_ADDR. 0x7b000 +#define SYSTEM_PARTITION_WPA2_ENTERPRISE_CERT_PRIVKEY_ADDR 0x7a000 +#define SYSTEM_PARTITION_WPA2_ENTERPRISE_CA_ADDR 0x79000 +``` diff --git a/examples/ESP8266_NONOS_SDK/documents/readme.txt b/examples/ESP8266_NONOS_SDK/documents/readme.txt new file mode 100644 index 0000000..caeaadf --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/documents/readme.txt @@ -0,0 +1,2 @@ +SDK Development Guide @ https://espressif.com/sites/default/files/documentation/2a-esp8266-sdk_getting_started_guide_en.pdf +All documentations @ https://espressif.com/en/support/download/documents?keys=&field_type_tid%5B%5D=14 diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/Makefile b/examples/ESP8266_NONOS_SDK/driver_lib/Makefile new file mode 100644 index 0000000..25ee224 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/Makefile @@ -0,0 +1,124 @@ +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of object file images to be generated () +# GEN_BINS - list of binaries to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +TARGET = eagle +#FLAVOR = release +FLAVOR = debug + +#EXTRA_CCFLAGS += -u + +ifndef PDIR # { +GEN_IMAGES= eagle.app.v6.out +GEN_BINS= eagle.app.v6.bin +SPECIAL_MKTARGETS=$(APP_MKTARGETS) +SUBDIRS= \ + user + +endif # } PDIR + +APPDIR = . +LDDIR = ../ld + +CCFLAGS += -Os + +TARGET_LDFLAGS = \ + -nostdlib \ + -Wl,-EL \ + --longcalls \ + --text-section-literals + +ifeq ($(FLAVOR),debug) + TARGET_LDFLAGS += -g -O2 +endif + +ifeq ($(FLAVOR),release) + TARGET_LDFLAGS += -g -O0 +endif + +COMPONENTS_eagle.app.v6 = \ + user/libuser.a + +LINKFLAGS_eagle.app.v6 = \ + -L../lib \ + -nostdlib \ + -T$(LD_FILE) \ + -Wl,--no-check-sections \ + -u call_user_start \ + -Wl,-static \ + -Wl,--start-group \ + -lc \ + -lgcc \ + -lhal \ + -lphy \ + -lpp \ + -lnet80211 \ + -llwip \ + -lwpa \ + -lcrypto \ + -lmain \ + -ljson \ + -lssl \ + -lupgrade \ + -lsmartconfig \ + -lairkiss\ + $(DEP_LIBS_eagle.app.v6) \ + -Wl,--end-group + +DEPENDS_eagle.app.v6 = \ + $(LD_FILE) \ + $(LDDIR)/eagle.rom.addr.v6.ld + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# + +#UNIVERSAL_TARGET_DEFINES = \ + +# Other potential configuration flags include: +# -DTXRX_TXBUF_DEBUG +# -DTXRX_RXBUF_DEBUG +# -DWLAN_CONFIG_CCX +CONFIGURATION_DEFINES = -DICACHE_FLASH + +DEFINES += \ + $(UNIVERSAL_TARGET_DEFINES) \ + $(CONFIGURATION_DEFINES) + +DDEFINES += \ + $(UNIVERSAL_TARGET_DEFINES) \ + $(CONFIGURATION_DEFINES) + + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + +.PHONY: FORCE +FORCE: + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/README.md b/examples/ESP8266_NONOS_SDK/driver_lib/README.md new file mode 100644 index 0000000..c54b736 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/README.md @@ -0,0 +1,22 @@ +# driver_lib +## method 1 +Generate libdriver.a in SDK/lib, in driver_lib folder, run: + + ./make_lib.sh driver + +## method 2 +* STEP 1: + + Copy driver folder to your project sub-folder, such as app folder. Unused drivers can be removed in your project. + +* STEP 2: + + Modify Makefile in app folder. + + 1). Search SUBDIRS, add driver as subdir, such as: + + SUBDIRS = user driver + + 2). Search COMPONENTS_eagle.app.v6, add libdriver.a, such as: + + COMPONENTS_eagle.app.v6 = user/libuser.a driver/libdriver.a \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/Makefile b/examples/ESP8266_NONOS_SDK/driver_lib/driver/Makefile new file mode 100644 index 0000000..38fd29f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/Makefile @@ -0,0 +1,44 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR +GEN_LIBS = libdriver.a +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/gpio16.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/gpio16.c new file mode 100644 index 0000000..1b832d6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/gpio16.c @@ -0,0 +1,66 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "ets_sys.h" +#include "osapi.h" +#include "driver/gpio16.h" + +void ICACHE_FLASH_ATTR +gpio16_output_conf(void) +{ + WRITE_PERI_REG(PAD_XPD_DCDC_CONF, + (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32_t)0x1); // mux configuration for XPD_DCDC to output rtc_gpio0 + + WRITE_PERI_REG(RTC_GPIO_CONF, + (READ_PERI_REG(RTC_GPIO_CONF) & (uint32_t)0xfffffffe) | (uint32_t)0x0); //mux configuration for out enable + + WRITE_PERI_REG(RTC_GPIO_ENABLE, + (READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32_t)0xfffffffe) | (uint32_t)0x1); //out enable +} + +void ICACHE_FLASH_ATTR +gpio16_output_set(uint8_t value) +{ + WRITE_PERI_REG(RTC_GPIO_OUT, + (READ_PERI_REG(RTC_GPIO_OUT) & (uint32_t)0xfffffffe) | (uint32_t)(value & 1)); +} + +void ICACHE_FLASH_ATTR +gpio16_input_conf(void) +{ + WRITE_PERI_REG(PAD_XPD_DCDC_CONF, + (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32_t)0x1); // mux configuration for XPD_DCDC and rtc_gpio0 connection + + WRITE_PERI_REG(RTC_GPIO_CONF, + (READ_PERI_REG(RTC_GPIO_CONF) & (uint32_t)0xfffffffe) | (uint32_t)0x0); //mux configuration for out enable + + WRITE_PERI_REG(RTC_GPIO_ENABLE, + READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32_t)0xfffffffe); //out disable +} + +uint8_t ICACHE_FLASH_ATTR +gpio16_input_get(void) +{ + return (uint8_t)(READ_PERI_REG(RTC_GPIO_IN_DATA) & 1); +} diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/hw_timer.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/hw_timer.c new file mode 100644 index 0000000..245b2c7 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/hw_timer.c @@ -0,0 +1,148 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "ets_sys.h" +#include "os_type.h" +#include "osapi.h" +#include "driver/hw_timer.h" + + +#define US_TO_RTC_TIMER_TICKS(t) \ + ((t) ? \ + (((t) > 0x35A) ? \ + (((t)>>2) * ((APB_CLK_FREQ>>4)/250000) + ((t)&0x3) * ((APB_CLK_FREQ>>4)/1000000)) : \ + (((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \ + 0) + +#define FRC1_ENABLE_TIMER BIT7 +#define FRC1_AUTO_LOAD BIT6 + + +/****************************************************************************** +* FunctionName : hw_timer_arm +* Description : set a trigger timer delay for this timer. +* Parameters : uint32_t val : +in autoload mode + 50 ~ 0x7fffff; for FRC1 source. + 100 ~ 0x7fffff; for NMI source. +in non autoload mode: + 10 ~ 0x7fffff; +* Returns : NONE +*******************************************************************************/ +void hw_timer_arm(uint32_t val) +{ + RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val)); +} + +static void (* user_hw_timer_cb)(void) = NULL; +/****************************************************************************** +* FunctionName : hw_timer_set_func +* Description : set the func, when trigger timer is up. +* Parameters : void (* user_hw_timer_cb_set)(void): + timer callback function, +* Returns : NONE +*******************************************************************************/ +void hw_timer_set_func(void (* user_hw_timer_cb_set)(void)) +{ + user_hw_timer_cb = user_hw_timer_cb_set; +} + +static void hw_timer_isr_cb(void *arg) +{ + if (user_hw_timer_cb != NULL) { + (*(user_hw_timer_cb))(); + } +} + +static void hw_timer_nmi_cb(void) +{ + if (user_hw_timer_cb != NULL) { + (*(user_hw_timer_cb))(); + } +} + +/****************************************************************************** +* FunctionName : hw_timer_init +* Description : initilize the hardware isr timer +* Parameters : +frc1_timer_source_type source_type: + FRC1_SOURCE, timer use frc1 isr as isr source. + NMI_SOURCE, timer use nmi isr as isr source. +uint8_t req: + 0, not autoload, + 1, autoload mode, +* Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR hw_timer_init(frc1_timer_source_type source_type, uint8_t req) +{ + if (req == 1) { + RTC_REG_WRITE(FRC1_CTRL_ADDRESS, + FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); + } else { + RTC_REG_WRITE(FRC1_CTRL_ADDRESS, + DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); + } + + if (source_type == NMI_SOURCE) { + ETS_FRC_TIMER1_NMI_INTR_ATTACH(hw_timer_nmi_cb); + } else { + ETS_FRC_TIMER1_INTR_ATTACH(hw_timer_isr_cb, NULL); + } + + TM1_EDGE_INT_ENABLE(); + ETS_FRC1_INTR_ENABLE(); +} + +//-------------------------------Test Code Below-------------------------------------- +#if 0 +void hw_test_timer_cb(void) +{ + static uint16_t j = 0; + j++; + + if ((WDEV_NOW() - tick_now2) >= 1000000) { + static u32 idx = 1; + tick_now2 = WDEV_NOW(); + os_printf("b%u:%d\n", idx++, j); + j = 0; + } + + //hw_timer_arm(50); +} + +void ICACHE_FLASH_ATTR user_init(void) +{ + hw_timer_init(FRC1_SOURCE, 1); + hw_timer_set_func(hw_test_timer_cb); + hw_timer_arm(100); +} +#endif +/* +NOTE: +1 if use nmi source, for autoload timer , the timer setting val can't be less than 100. +2 if use nmi source, this timer has highest priority, can interrupt other isr. +3 if use frc1 source, this timer can't interrupt other isr. + +*/ + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/i2c_master.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/i2c_master.c new file mode 100644 index 0000000..076d995 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/i2c_master.c @@ -0,0 +1,328 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +#include "ets_sys.h" +#include "osapi.h" +#include "gpio.h" +#include "driver/i2c_master.h" + +LOCAL uint8_t m_nLastSDA; +LOCAL uint8_t m_nLastSCL; + +/****************************************************************************** + * FunctionName : i2c_master_setDC + * Description : Internal used function - + * set i2c SDA and SCL bit value for half clk cycle + * Parameters : uint8_t SDA + * uint8_t SCL + * Returns : NONE +*******************************************************************************/ +LOCAL void ICACHE_FLASH_ATTR +i2c_master_setDC(uint8_t SDA, uint8_t SCL) +{ + SDA &= 0x01; + SCL &= 0x01; + m_nLastSDA = SDA; + m_nLastSCL = SCL; + + if ((0 == SDA) && (0 == SCL)) { + I2C_MASTER_SDA_LOW_SCL_LOW(); + } else if ((0 == SDA) && (1 == SCL)) { + I2C_MASTER_SDA_LOW_SCL_HIGH(); + } else if ((1 == SDA) && (0 == SCL)) { + I2C_MASTER_SDA_HIGH_SCL_LOW(); + } else { + I2C_MASTER_SDA_HIGH_SCL_HIGH(); + } +} + +/****************************************************************************** + * FunctionName : i2c_master_getDC + * Description : Internal used function - + * get i2c SDA bit value + * Parameters : NONE + * Returns : uint8_t - SDA bit value +*******************************************************************************/ +LOCAL uint8_t ICACHE_FLASH_ATTR +i2c_master_getDC(void) +{ + uint8_t sda_out; + sda_out = GPIO_INPUT_GET(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)); + return sda_out; +} + +/****************************************************************************** + * FunctionName : i2c_master_init + * Description : initilize I2C bus to enable i2c operations + * Parameters : NONE + * Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_init(void) +{ + uint8_t i; + + i2c_master_setDC(1, 0); + i2c_master_wait(5); + + // when SCL = 0, toggle SDA to clear up + i2c_master_setDC(0, 0) ; + i2c_master_wait(5); + i2c_master_setDC(1, 0) ; + i2c_master_wait(5); + + // set data_cnt to max value + for (i = 0; i < 28; i++) { + i2c_master_setDC(1, 0); + i2c_master_wait(5); // sda 1, scl 0 + i2c_master_setDC(1, 1); + i2c_master_wait(5); // sda 1, scl 1 + } + + // reset all + i2c_master_stop(); + return; +} + +/****************************************************************************** + * FunctionName : i2c_master_gpio_init + * Description : config SDA and SCL gpio to open-drain output mode, + * mux and gpio num defined in i2c_master.h + * Parameters : NONE + * Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_gpio_init(void) +{ + ETS_GPIO_INTR_DISABLE() ; +// ETS_INTR_LOCK(); + + PIN_FUNC_SELECT(I2C_MASTER_SDA_MUX, I2C_MASTER_SDA_FUNC); + PIN_FUNC_SELECT(I2C_MASTER_SCL_MUX, I2C_MASTER_SCL_FUNC); + + GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain; + GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SDA_GPIO)); + GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain; + GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SCL_GPIO)); + + I2C_MASTER_SDA_HIGH_SCL_HIGH(); + + ETS_GPIO_INTR_ENABLE() ; +// ETS_INTR_UNLOCK(); + + i2c_master_init(); +} + +/****************************************************************************** + * FunctionName : i2c_master_start + * Description : set i2c to send state + * Parameters : NONE + * Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_start(void) +{ + i2c_master_setDC(1, m_nLastSCL); + i2c_master_wait(5); + i2c_master_setDC(1, 1); + i2c_master_wait(5); // sda 1, scl 1 + i2c_master_setDC(0, 1); + i2c_master_wait(5); // sda 0, scl 1 +} + +/****************************************************************************** + * FunctionName : i2c_master_stop + * Description : set i2c to stop sending state + * Parameters : NONE + * Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_stop(void) +{ + i2c_master_wait(5); + + i2c_master_setDC(0, m_nLastSCL); + i2c_master_wait(5); // sda 0 + i2c_master_setDC(0, 1); + i2c_master_wait(5); // sda 0, scl 1 + i2c_master_setDC(1, 1); + i2c_master_wait(5); // sda 1, scl 1 +} + +/****************************************************************************** + * FunctionName : i2c_master_setAck + * Description : set ack to i2c bus as level value + * Parameters : uint8_t level - 0 or 1 + * Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_setAck(uint8_t level) +{ + i2c_master_setDC(m_nLastSDA, 0); + i2c_master_wait(5); + i2c_master_setDC(level, 0); + i2c_master_wait(5); // sda level, scl 0 + i2c_master_setDC(level, 1); + i2c_master_wait(8); // sda level, scl 1 + i2c_master_setDC(level, 0); + i2c_master_wait(5); // sda level, scl 0 + i2c_master_setDC(1, 0); + i2c_master_wait(5); +} + +/****************************************************************************** + * FunctionName : i2c_master_getAck + * Description : confirm if peer send ack + * Parameters : NONE + * Returns : uint8_t - ack value, 0 or 1 +*******************************************************************************/ +uint8_t ICACHE_FLASH_ATTR +i2c_master_getAck(void) +{ + uint8_t retVal; + i2c_master_setDC(m_nLastSDA, 0); + i2c_master_wait(5); + i2c_master_setDC(1, 0); + i2c_master_wait(5); + i2c_master_setDC(1, 1); + i2c_master_wait(5); + + retVal = i2c_master_getDC(); + i2c_master_wait(5); + i2c_master_setDC(1, 0); + i2c_master_wait(5); + + return retVal; +} + +/****************************************************************************** +* FunctionName : i2c_master_checkAck +* Description : get dev response +* Parameters : NONE +* Returns : true : get ack ; false : get nack +*******************************************************************************/ +bool ICACHE_FLASH_ATTR +i2c_master_checkAck(void) +{ + if (i2c_master_getAck()) { + return FALSE; + } else { + return TRUE; + } +} + +/****************************************************************************** +* FunctionName : i2c_master_send_ack +* Description : response ack +* Parameters : NONE +* Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_send_ack(void) +{ + i2c_master_setAck(0x0); +} +/****************************************************************************** +* FunctionName : i2c_master_send_nack +* Description : response nack +* Parameters : NONE +* Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_send_nack(void) +{ + i2c_master_setAck(0x1); +} + +/****************************************************************************** + * FunctionName : i2c_master_readByte + * Description : read Byte from i2c bus + * Parameters : NONE + * Returns : uint8_t - readed value +*******************************************************************************/ +uint8_t ICACHE_FLASH_ATTR +i2c_master_readByte(void) +{ + uint8_t retVal = 0; + uint8_t k, i; + + i2c_master_wait(5); + i2c_master_setDC(m_nLastSDA, 0); + i2c_master_wait(5); // sda 1, scl 0 + + for (i = 0; i < 8; i++) { + i2c_master_wait(5); + i2c_master_setDC(1, 0); + i2c_master_wait(5); // sda 1, scl 0 + i2c_master_setDC(1, 1); + i2c_master_wait(5); // sda 1, scl 1 + + k = i2c_master_getDC(); + i2c_master_wait(5); + + if (i == 7) { + i2c_master_wait(3); //// + } + + k <<= (7 - i); + retVal |= k; + } + + i2c_master_setDC(1, 0); + i2c_master_wait(5); // sda 1, scl 0 + + return retVal; +} + +/****************************************************************************** + * FunctionName : i2c_master_writeByte + * Description : write wrdata value(one byte) into i2c + * Parameters : uint8_t wrdata - write value + * Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +i2c_master_writeByte(uint8_t wrdata) +{ + uint8_t dat; + sint8 i; + + i2c_master_wait(5); + + i2c_master_setDC(m_nLastSDA, 0); + i2c_master_wait(5); + + for (i = 7; i >= 0; i--) { + dat = wrdata >> i; + i2c_master_setDC(dat, 0); + i2c_master_wait(5); + i2c_master_setDC(dat, 1); + i2c_master_wait(5); + + if (i == 0) { + i2c_master_wait(3); //// + } + + i2c_master_setDC(dat, 0); + i2c_master_wait(5); + } +} diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/key.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/key.c new file mode 100644 index 0000000..19ec40c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/key.c @@ -0,0 +1,176 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "ets_sys.h" +#include "os_type.h" +#include "osapi.h" +#include "mem.h" +#include "user_interface.h" +#include "gpio.h" +#include "driver/key.h" + +LOCAL void key_intr_handler(void *arg); + +/****************************************************************************** + * FunctionName : key_init_single + * Description : init single key's gpio and register function + * Parameters : uint8_t gpio_id - which gpio to use + * uint32_t gpio_name - gpio mux name + * uint32_t gpio_func - gpio function + * key_function long_press - long press function, needed to install + * key_function short_press - short press function, needed to install + * Returns : single_key_param - single key parameter, needed by key init +*******************************************************************************/ +struct single_key_param *ICACHE_FLASH_ATTR +key_init_single(uint8_t gpio_id, uint32_t gpio_name, uint8_t gpio_func, key_function long_press, key_function short_press) +{ + struct single_key_param *single_key = (struct single_key_param *)os_zalloc(sizeof(struct single_key_param)); + + single_key->gpio_id = gpio_id; + single_key->gpio_name = gpio_name; + single_key->gpio_func = gpio_func; + single_key->long_press = long_press; + single_key->short_press = short_press; + + return single_key; +} + +/****************************************************************************** + * FunctionName : key_init + * Description : init keys + * Parameters : key_param *keys - keys parameter, which inited by key_init_single + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +key_init(struct keys_param *keys) +{ + uint8_t i; + + ETS_GPIO_INTR_ATTACH(key_intr_handler, keys); + + ETS_GPIO_INTR_DISABLE(); + + for (i = 0; i < keys->key_num; i++) { + keys->single_key[i]->key_level = 1; + + PIN_FUNC_SELECT(keys->single_key[i]->gpio_name, keys->single_key[i]->gpio_func); + + gpio_output_set(0, 0, 0, GPIO_ID_PIN(keys->single_key[i]->gpio_id)); + + gpio_register_set(GPIO_PIN_ADDR(keys->single_key[i]->gpio_id), GPIO_PIN_INT_TYPE_SET(GPIO_PIN_INTR_DISABLE) + | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_DISABLE) + | GPIO_PIN_SOURCE_SET(GPIO_AS_PIN_SOURCE)); + + //clear gpio14 status + GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(keys->single_key[i]->gpio_id)); + + //enable interrupt + gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_NEGEDGE); + } + + ETS_GPIO_INTR_ENABLE(); +} + +/****************************************************************************** + * FunctionName : key_5s_cb + * Description : long press 5s timer callback + * Parameters : single_key_param *single_key - single key parameter + * Returns : none +*******************************************************************************/ +LOCAL void ICACHE_FLASH_ATTR +key_5s_cb(struct single_key_param *single_key) +{ + os_timer_disarm(&single_key->key_5s); + + // low, then restart + if (0 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { + if (single_key->long_press) { + single_key->long_press(); + } + } +} + +/****************************************************************************** + * FunctionName : key_50ms_cb + * Description : 50ms timer callback to check it's a real key push + * Parameters : single_key_param *single_key - single key parameter + * Returns : none +*******************************************************************************/ +LOCAL void ICACHE_FLASH_ATTR +key_50ms_cb(struct single_key_param *single_key) +{ + os_timer_disarm(&single_key->key_50ms); + + // high, then key is up + if (1 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { + os_timer_disarm(&single_key->key_5s); + single_key->key_level = 1; + gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_NEGEDGE); + + if (single_key->short_press) { + single_key->short_press(); + } + } else { + gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_POSEDGE); + } +} + +/****************************************************************************** + * FunctionName : key_intr_handler + * Description : key interrupt handler + * Parameters : key_param *keys - keys parameter, which inited by key_init_single + * Returns : none +*******************************************************************************/ +LOCAL void +key_intr_handler(void *arg) +{ + uint8_t i; + uint32_t gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS); + struct keys_param *keys = (struct keys_param *)arg; + + for (i = 0; i < keys->key_num; i++) { + if (gpio_status & BIT(keys->single_key[i]->gpio_id)) { + //disable interrupt + gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_DISABLE); + + //clear interrupt status + GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status & BIT(keys->single_key[i]->gpio_id)); + + if (keys->single_key[i]->key_level == 1) { + // 5s, restart & enter softap mode + os_timer_disarm(&keys->single_key[i]->key_5s); + os_timer_setfn(&keys->single_key[i]->key_5s, (os_timer_func_t *)key_5s_cb, keys->single_key[i]); + os_timer_arm(&keys->single_key[i]->key_5s, 5000, 0); + keys->single_key[i]->key_level = 0; + gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_POSEDGE); + } else { + // 50ms, check if this is a real key up + os_timer_disarm(&keys->single_key[i]->key_50ms); + os_timer_setfn(&keys->single_key[i]->key_50ms, (os_timer_func_t *)key_50ms_cb, keys->single_key[i]); + os_timer_arm(&keys->single_key[i]->key_50ms, 50, 0); + } + } + } +} + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/sdio_slv.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/sdio_slv.c new file mode 100644 index 0000000..dd90994 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/sdio_slv.c @@ -0,0 +1,458 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "ets_sys.h" +#include "osapi.h" +#include "os_type.h" +//#include "gpio.h" +#include "user_interface.h" +#include "mem.h" +#include "driver/slc_register.h" +#include "driver/sdio_slv.h" + +#define SDIO_TOKEN_SIZE 0 // 4 +#define RX_BUFFER_SIZE 512 +#define RX_BUFFER_NUM 4 + +#define TX_BUFFER_SIZE 512 +#define SLC_INTEREST_EVENT (SLC_TX_EOF_INT_ENA | SLC_RX_EOF_INT_ENA | SLC_RX_UDF_INT_ENA | SLC_TX_DSCR_ERR_INT_ENA) +#define TRIG_TOHOST_INT() SET_PERI_REG_MASK(SLC_INTVEC_TOHOST , BIT0);\ + //CLEAR_PERI_REG_MASK(SLC_INTVEC_TOHOST , BIT0) +struct sdio_queue { + uint32_t blocksize: 12; + uint32_t datalen: 12; + uint32_t unused: 5; + uint32_t sub_sof: 1; + uint32_t eof: 1; + uint32_t owner: 1; + + uint32_t buf_ptr; + uint32_t next_link_ptr; +}; + +struct sdio_slave_status_element { + uint32_t wr_busy: 1; + uint32_t rd_empty : 1; + uint32_t comm_cnt : 3; + uint32_t intr_no : 3; + uint32_t rx_length: 16; + uint32_t res: 8; +}; + +union sdio_slave_status { + struct sdio_slave_status_element elm_value; + uint32_t word_value; +}; + +//uint8_t rx_buffer[RX_BUFFER_NUM][RX_BUFFER_SIZE],tx_buffer[1024]; +uint8_t tx_buffer[TX_BUFFER_SIZE]; + +uint32_t data_len = 0; + +struct sdio_list { + uint8_t buffer[RX_BUFFER_SIZE + SDIO_TOKEN_SIZE]; + uint8_t *tail; + struct sdio_list *next; +}; + +static sdio_recv_data_callback_t sdio_recv_data_callback_ptr = NULL; +struct sdio_list *pHead_ToSend; +struct sdio_list *pTail_ToSend; +struct sdio_list *pHead_Sended; +struct sdio_list *pTail_Sended; + + + +os_event_t *sdioQueue; +struct sdio_queue rx_que, tx_que; + +static bool has_read = 0; + +static void sdio_slave_isr(void *para); +static void tx_buff_handle_done(void); +static void rx_buff_read_done(void); +static void tx_buff_write_done(void); + +static void sdio_try_to_load(void); +static void sdio_read_done_process(void); + +void sdio_slave_init(void) +{ + uint32_t regval = 0; + union sdio_slave_status sdio_sta; + ETS_SDIO_INTR_DISABLE(); + ////reset orginal link + SET_PERI_REG_MASK(SLC_CONF0, SLC_RXLINK_RST | SLC_TXLINK_RST); + CLEAR_PERI_REG_MASK(SLC_CONF0, SLC_RXLINK_RST | SLC_TXLINK_RST); + + os_printf("RX&TX link reset!\n"); + + //set sdio mode + SET_PERI_REG_MASK(SLC_RX_DSCR_CONF, SLC_RX_EOF_MODE | SLC_RX_FILL_MODE); + //clear to host interrupt io signal for preventing from random initial signal. + WRITE_PERI_REG(SLC_HOST_INTR_CLR, 0xffffffff); + //enable 2 events to trigger the to host intr io + SET_PERI_REG_MASK(SLC_HOST_INTR_ENA, SLC_HOST_TOHOST_BIT0_INT_ENA); + ////initialize rx queue information + + has_read = TRUE; + pHead_ToSend = NULL; + + int32_t loop = RX_BUFFER_NUM; + struct sdio_list *p = NULL; + + while (loop--) { + if (pHead_Sended == NULL) { + pHead_Sended = (struct sdio_list *)os_malloc(sizeof(struct sdio_list)); + p = pHead_Sended; + } else { + p->next = (struct sdio_list *)os_malloc(sizeof(struct sdio_list)); + p = p->next; + } + + //os_printf("p:0x%08x\r\n",p); + p->tail = p->buffer + SDIO_TOKEN_SIZE; + p->next = NULL; + } + + pTail_Sended = p; + + rx_que.blocksize = RX_BUFFER_SIZE; + rx_que.datalen = 0; + rx_que.eof = 1; + rx_que.owner = 1; + rx_que.sub_sof = 0; + rx_que.unused = 0; + rx_que.buf_ptr = (uint32_t)pHead_Sended->buffer; + rx_que.next_link_ptr = 0; + + + ////initialize tx queue information + tx_que.blocksize = TX_BUFFER_SIZE; + tx_que.datalen = 0; + tx_que.eof = 0; + tx_que.owner = 1; + tx_que.sub_sof = 0; + tx_que.unused = 0; + tx_que.buf_ptr = (uint32_t)tx_buffer; + tx_que.next_link_ptr = 0; + + ///////link tx&rx queue information address to sdio hardware + CLEAR_PERI_REG_MASK(SLC_RX_LINK, SLC_RXLINK_DESCADDR_MASK); + regval = ((uint32_t)&rx_que); + SET_PERI_REG_MASK(SLC_RX_LINK, regval & SLC_RXLINK_DESCADDR_MASK); + CLEAR_PERI_REG_MASK(SLC_TX_LINK, SLC_TXLINK_DESCADDR_MASK); + regval = ((uint32_t)&tx_que); + SET_PERI_REG_MASK(SLC_TX_LINK, regval & SLC_TXLINK_DESCADDR_MASK); + +#if (SDIO_TOKEN_SIZE == 0) + SET_PERI_REG_MASK(SLC_RX_DSCR_CONF, SLC_TOKEN_NO_REPLACE); +#endif + + /////config sdio_status reg + sdio_sta.elm_value.comm_cnt = 7; + sdio_sta.elm_value.intr_no = INIT_STAGE; + sdio_sta.elm_value.wr_busy = 0; + sdio_sta.elm_value.rd_empty = 1; + sdio_sta.elm_value.rx_length = 0; + sdio_sta.elm_value.res = 0; + SET_PERI_REG_MASK(SLC_TX_LINK, SLC_TXLINK_START); + WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); + + + /////attach isr func to sdio interrupt + ETS_SDIO_INTR_ATTACH(sdio_slave_isr, NULL); + /////enable sdio operation intr + WRITE_PERI_REG(SLC_INT_ENA, SLC_INTEREST_EVENT); + /////clear sdio initial random active intr signal + WRITE_PERI_REG(SLC_INT_CLR, 0xffffffff); + /////enable sdio intr in cpu + ETS_SDIO_INTR_ENABLE(); +} + +static void sdio_slave_isr(void *para) +{ + uint32_t slc_intr_status, postval; + static uint8_t state = 0; + uint16_t rx_len, i; + uint32_t *pword; + union sdio_slave_status sdio_sta; + + slc_intr_status = READ_PERI_REG(SLC_INT_STATUS); + + if (slc_intr_status == 0) { + /* No interested interrupts pending */ + return; + } + + //clear all intrs + WRITE_PERI_REG(SLC_INT_CLR, slc_intr_status); + //os_printf("slc_intr_status:0x%08x\r\n",slc_intr_status); + //process every intr + + //TO HOST DONE + if (slc_intr_status & SLC_RX_EOF_INT_ENA) { + //following code must be called after a data pack has been read + rx_buff_read_done(); + //TRIG_TOHOST_INT(); + //system_os_post(2, 1, 0); + sdio_read_done_process(); + } + + //FROM HOST DONE + if (slc_intr_status & SLC_TX_EOF_INT_ENA) { + //call the following function after host cpu data transmission finished + tx_buff_write_done(); + + //system_os_post(USER_TASK_PRIO_1,SDIO_DATA_ERROR,0); + //os_printf("%d,%s\r\n",tx_que.datalen,tx_que.buf_ptr); + //at_fake_uart_rx((uint8_t*)tx_que.buf_ptr,tx_que.datalen); + if (sdio_recv_data_callback_ptr) { + sdio_recv_data_callback_ptr((uint8_t *)tx_que.buf_ptr, tx_que.datalen); + } + + tx_buff_handle_done(); + TRIG_TOHOST_INT(); + //system_os_post(2, 3, 0); + } + + //TO HOST underflow + if (slc_intr_status & SLC_RX_UDF_INT_ENA) { + } + + //FROM HOST overflow + if (slc_intr_status & SLC_TX_DSCR_ERR_INT_ENA) { + } + + slc_intr_status = READ_PERI_REG(SLC_INT_STATUS); + + if (slc_intr_status) { + WRITE_PERI_REG(SLC_INT_CLR, slc_intr_status); + os_printf("slc_intr_status:0x%08x\r\n", slc_intr_status); + } + +} + +static void rx_buff_read_done(void) +{ + union sdio_slave_status sdio_sta; + /////modify sdio status reg + sdio_sta.word_value = READ_PERI_REG(SLC_HOST_CONF_W2); + sdio_sta.elm_value.comm_cnt++; + sdio_sta.elm_value.rd_empty = 1; + sdio_sta.elm_value.rx_length = 0; + sdio_sta.elm_value.intr_no &= (~RX_AVAILIBLE); + WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register + //os_printf("rx_buff_read_done\r\n"); +} + +static void tx_buff_write_done(void) +{ + union sdio_slave_status sdio_sta; + /////modify sdio status reg + sdio_sta.word_value = READ_PERI_REG(SLC_HOST_CONF_W2); + sdio_sta.elm_value.comm_cnt++; + sdio_sta.elm_value.wr_busy = 1; + sdio_sta.elm_value.intr_no &= (~TX_AVAILIBLE); + WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register +} + +static void tx_buff_handle_done(void) +{ + union sdio_slave_status sdio_sta; + + /////config tx queue information + tx_que.blocksize = TX_BUFFER_SIZE; + tx_que.datalen = 0; + tx_que.eof = 0; + tx_que.owner = 1; + + /////modify sdio status reg + sdio_sta.word_value = READ_PERI_REG(SLC_HOST_CONF_W2); + sdio_sta.elm_value.wr_busy = 0; + sdio_sta.elm_value.intr_no |= TX_AVAILIBLE; + + SET_PERI_REG_MASK(SLC_TX_LINK, SLC_TXLINK_START); //tx buffer is ready for being written + WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register + //*******************************************************************// + +} +static int32_t rx_buff_load_done(uint16_t rx_len) +{ + union sdio_slave_status sdio_sta; + + if (rx_len == 0) { + return 0; + } + + if (rx_len > rx_que.blocksize) { + rx_len = rx_que.blocksize; + } + + //os_memcpy(rx_que.buf_ptr,data,rx_len); + /////config rx queue information + rx_que.blocksize = RX_BUFFER_SIZE; + rx_que.datalen = rx_len + SDIO_TOKEN_SIZE; + rx_que.eof = 1; + rx_que.owner = 1; + + //ETS_SDIO_INTR_DISABLE(); + //available_buffer_amount--; + + /////modify sdio status reg + sdio_sta.word_value = READ_PERI_REG(SLC_HOST_CONF_W2); + sdio_sta.elm_value.rd_empty = 0; + sdio_sta.elm_value.intr_no |= RX_AVAILIBLE; + sdio_sta.elm_value.rx_length = rx_len; + + SET_PERI_REG_MASK(SLC_RX_LINK, SLC_RXLINK_START); //rx buffer is ready for being read + WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register + //ETS_SDIO_INTR_ENABLE(); + //os_printf("rx_buff_load_done(%d,0x%08x):%s\r\n",rx_len,rx_que.buf_ptr,rx_que.buf_ptr); + //os_printf("rx_buff_load_done:%d\r\n",rx_len); + return rx_len; +} + +int32_t ICACHE_FLASH_ATTR sdio_load_data(const uint8_t *data, uint32_t len) +{ + int32_t data_len = 0; + + if (pHead_Sended == NULL) { + os_printf("no buf\r\n"); + return 0; + } + + int32_t left_len = 0; + + while (len) { + left_len = RX_BUFFER_SIZE + SDIO_TOKEN_SIZE - (uint32_t)(pHead_Sended->tail - pHead_Sended->buffer); + + if (len < left_len) { + os_memcpy(pHead_Sended->tail, data, len); + pHead_Sended->tail += len; + len = 0; + data_len += len; + //os_printf(">555:0x%08x,0x%08x\r\n",pHead_Sended->buffer,pHead_Sended->tail); + } else { + os_memcpy(pHead_Sended->tail, data, left_len); + pHead_Sended->tail += left_len; + len -= left_len; + data += left_len; + data_len += left_len; + + if (pHead_ToSend == NULL) { + pTail_ToSend = pHead_Sended; + pHead_ToSend = pTail_ToSend; + } else { + pTail_ToSend->next = pHead_Sended; + pTail_ToSend = pTail_ToSend->next; + } + + pHead_Sended = pHead_Sended->next; + + pTail_ToSend->next = NULL; + + if (pHead_Sended == NULL) { + os_printf("buf full\r\n"); + break; + } + + //os_printf(">666\r\n"); + } + } + + //os_printf(">>pHead_ToSend:0x%08x\r\n",pHead_ToSend); + + if (pHead_ToSend == NULL) { + pTail_ToSend = pHead_Sended; + pHead_ToSend = pTail_ToSend; + + pHead_Sended = pHead_Sended->next; + pTail_ToSend->next = NULL; + //system_os_post(2, 2, 0); + sdio_try_to_load(); + } + + return data_len; +} + +static void sdio_try_to_load(void) +{ + if ((has_read == TRUE) && (pHead_ToSend != NULL)) { + rx_que.buf_ptr = (uint32_t)pHead_ToSend->buffer; + rx_buff_load_done(pHead_ToSend->tail - pHead_ToSend->buffer - SDIO_TOKEN_SIZE); + //pHead_ToSend = pHead_ToSend->next; + has_read = FALSE; + //os_printf("SLC_INT_STATUS:0x%08x\r\n",READ_PERI_REG(SLC_INT_STATUS)); + TRIG_TOHOST_INT(); + } +} + +static void sdio_read_done_process(void) +{ + has_read = TRUE; + + pHead_ToSend->tail = pHead_ToSend->buffer + SDIO_TOKEN_SIZE; + + if (pHead_Sended) { + pTail_Sended->next = pHead_ToSend; + pTail_Sended = pTail_Sended->next; + } else { + pTail_Sended = pHead_ToSend; + pHead_Sended = pTail_Sended; + } + + pHead_ToSend = pHead_ToSend->next; + pTail_Sended->next = NULL; + + //os_printf(">>pHead_ToSend:0x%08x,pHead_Sended:0x%08x,0x%08x,0x%08x\r\n",pHead_ToSend,pHead_Sended,pHead_Sended->buffer,pHead_Sended->tail); + if (pHead_ToSend) { + rx_que.buf_ptr = (uint32_t)pHead_ToSend->buffer; + rx_buff_load_done(pHead_ToSend->tail - pHead_ToSend->buffer - SDIO_TOKEN_SIZE); + has_read = FALSE; + //os_printf("intr trig\r\n"); + //TRIG_TOHOST_INT(); + } else if ((pHead_Sended != NULL) && (pHead_Sended->buffer != (pHead_Sended->tail - SDIO_TOKEN_SIZE))) { + pHead_ToSend = pHead_Sended; + pTail_ToSend = pHead_ToSend; + pHead_Sended = pHead_Sended->next; + pTail_ToSend->next = NULL; + + rx_que.buf_ptr = (uint32_t)pHead_ToSend->buffer; + rx_buff_load_done(pHead_ToSend->tail - pHead_ToSend->buffer - SDIO_TOKEN_SIZE); + has_read = FALSE; + //os_printf("intr trig\r\n"); + //TRIG_TOHOST_INT(); + } + + TRIG_TOHOST_INT(); +} + +bool sdio_register_recv_cb(sdio_recv_data_callback_t cb) +{ + sdio_recv_data_callback_ptr = cb; + + return TRUE; +} + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi.c new file mode 100644 index 0000000..c0d9821 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi.c @@ -0,0 +1,531 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "driver/spi.h" +#include "driver/spi_overlap.h" + +#define CACHE_FLASH_CTRL_REG 0x3ff0000C +#define CACHE_FLUSH_START_BIT BIT0 +#define CACHE_EMPTY_FLAG_BIT BIT1 +/****************************************************************************** + * FunctionName : cache_flush + * Description : clear all the cpu cache data for stability test. +*******************************************************************************/ +void cache_flush(void) +{ + while (READ_PERI_REG(CACHE_FLASH_CTRL_REG)&CACHE_EMPTY_FLAG_BIT) { + CLEAR_PERI_REG_MASK(CACHE_FLASH_CTRL_REG, CACHE_FLUSH_START_BIT); + SET_PERI_REG_MASK(CACHE_FLASH_CTRL_REG, CACHE_FLUSH_START_BIT); + } + + while (!(READ_PERI_REG(CACHE_FLASH_CTRL_REG)&CACHE_EMPTY_FLAG_BIT)); + + CLEAR_PERI_REG_MASK(CACHE_FLASH_CTRL_REG, CACHE_FLUSH_START_BIT); +} +/****************************************************************************** + * FunctionName : spi_master_init + * Description : SPI master initial function for common byte units transmission + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_master_init(uint8_t spi_no) +{ + uint32_t regvalue; + + if (spi_no > 1) { + return; //handle invalid input number + } + + SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP | SPI_CS_HOLD | SPI_USR_COMMAND); + CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE); + + WRITE_PERI_REG(SPI_CLOCK(spi_no), + ((3 & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) | + ((1 & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) | + ((3 & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div +} +/****************************************************************************** + * FunctionName : spi_lcd_9bit_write + * Description : SPI 9bits transmission function for driving LCD TM035PDZV36 + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid + * uint8_t high_bit - first high bit of the data, 0 is for "0",the other value 1-255 is for "1" + * uint8_t low_8bit- the rest 8bits of the data. +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_lcd_9bit_write(uint8_t spi_no, uint8_t high_bit, uint8_t low_8bit) +{ + uint32_t regvalue; + uint8_t bytetemp; + + if (spi_no > 1) { + return; //handle invalid input number + } + + if (high_bit) { + bytetemp = (low_8bit >> 1) | 0x80; + } else { + bytetemp = (low_8bit >> 1) & 0x7f; + } + + regvalue = ((8 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) | ((uint32_t)bytetemp); //configure transmission variable,9bit transmission length and first 8 command bit + + if (low_8bit & 0x01) { + regvalue |= BIT15; //write the 9th bit + } + + while (READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); //waiting for spi module available + + WRITE_PERI_REG(SPI_USER2(spi_no), regvalue); //write command and command length into spi reg + SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); //transmission start +// while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); +} +/****************************************************************************** + * FunctionName : spi_mast_byte_write + * Description : SPI master 1 byte transmission function + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid + * uint8_t data- transmitted data +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_mast_byte_write(uint8_t spi_no, uint8_t data) +{ + uint32_t regvalue; + + if (spi_no > 1) { + return; //handle invalid input number + } + + while (READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); + + CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_MISO); + + //SPI_FLASH_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1, + // bit15-0 is cmd value. + WRITE_PERI_REG(SPI_USER2(spi_no), + ((7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) | ((uint32_t)data)); + SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); + + while (READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); +} + +/****************************************************************************** + * FunctionName : spi_byte_write_espslave + * Description : SPI master 1 byte transmission function for esp8266 slave, + * transmit 1byte data to esp8266 slave buffer needs 16bit transmission , + * first byte is command 0x04 to write slave buffer, second byte is data + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid + * uint8_t data- transmitted data +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_byte_write_espslave(uint8_t spi_no, uint8_t data) +{ + uint32_t regvalue; + + if (spi_no > 1) { + return; //handle invalid input number + } + + while (READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); + + SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); + CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO | SPI_USR_ADDR | SPI_USR_DUMMY); + + //SPI_FLASH_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1, + // bit15-0 is cmd value. + //0x70000000 is for 8bits cmd, 0x04 is eps8266 slave write cmd value + WRITE_PERI_REG(SPI_USER2(spi_no), + ((7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) | 4); + WRITE_PERI_REG(SPI_W0(spi_no), (uint32_t)(data)); + SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); +} +/****************************************************************************** + * FunctionName : spi_byte_read_espslave + * Description : SPI master 1 byte read function for esp8266 slave, + * read 1byte data from esp8266 slave buffer needs 16bit transmission , + * first byte is command 0x06 to read slave buffer, second byte is recieved data + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid + * uint8_t* data- recieved data address +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_byte_read_espslave(uint8_t spi_no, uint8_t *data) +{ + uint32_t regvalue; + + if (spi_no > 1) { + return; //handle invalid input number + } + + while (READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); + + SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO); + CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_ADDR | SPI_USR_DUMMY); + //SPI_FLASH_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1, + // bit15-0 is cmd value. + //0x70000000 is for 8bits cmd, 0x06 is eps8266 slave read cmd value + WRITE_PERI_REG(SPI_USER2(spi_no), + ((7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) | 6); + SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); + + while (READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); + + *data = (uint8_t)(READ_PERI_REG(SPI_W0(spi_no)) & 0xff); +} + +/****************************************************************************** + * FunctionName : spi_slave_init + * Description : SPI slave mode initial funtion, including mode setting, + * IO setting, transmission interrupt opening, interrupt function registration + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid + * uint8_t data_len - read&write data pack length,using byte as unit,the range is 1-32 +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_slave_init(uint8_t spi_no, uint8_t data_len) +{ + uint32_t regvalue; + uint32_t data_bit_len; + + if (spi_no > 1) { + return; //handle invalid input number + } + + if (data_len <= 1) { + data_bit_len = 7; + } else if (data_len >= 32) { + data_bit_len = 0xff; + } else { + data_bit_len = (data_len << 3) - 1; + } + + //clear bit9,bit8 of reg PERIPHS_IO_MUX + //bit9 should be cleared when HSPI clock doesn't equal CPU clock + //bit8 should be cleared when SPI clock doesn't equal CPU clock + ////WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105); //clear bit9//TEST + if (spi_no == SPI) { + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1);//configure io to spi mode + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1);//configure io to spi mode + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1);//configure io to spi mode + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1);//configure io to spi mode + } else if (spi_no == HSPI) { + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);//configure io to spi mode + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);//configure io to spi mode + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);//configure io to spi mode + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);//configure io to spi mode + } + + //regvalue=READ_PERI_REG(SPI_FLASH_SLAVE(spi_no)); + //slave mode,slave use buffers which are register "SPI_FLASH_C0~C15", enable trans done isr + //set bit 30 bit 29 bit9,bit9 is trans done isr mask + SET_PERI_REG_MASK(SPI_SLAVE(spi_no), + SPI_SLAVE_MODE | SPI_SLV_WR_RD_BUF_EN | + SPI_SLV_WR_BUF_DONE_EN | SPI_SLV_RD_BUF_DONE_EN | + SPI_SLV_WR_STA_DONE_EN | SPI_SLV_RD_STA_DONE_EN | + SPI_TRANS_DONE_EN); + //disable general trans intr + //CLEAR_PERI_REG_MASK(SPI_SLAVE(spi_no),SPI_TRANS_DONE_EN); + + CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE);//disable flash operation mode + SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO_HIGHPART); //SLAVE SEND DATA BUFFER IN C8-C15 + + +//////**************RUN WHEN SLAVE RECIEVE*******************/////// + //tow lines below is to configure spi timing. + SET_PERI_REG_MASK(SPI_CTRL2(spi_no), (0x2 & SPI_MOSI_DELAY_NUM) << SPI_MOSI_DELAY_NUM_S) ; //delay num + os_printf("SPI_CTRL2 is %08x\n", READ_PERI_REG(SPI_CTRL2(spi_no))); + WRITE_PERI_REG(SPI_CLOCK(spi_no), 0); + + + +/////***************************************************////// + + //set 8 bit slave command length, because slave must have at least one bit addr, + //8 bit slave+8bit addr, so master device first 2 bytes can be regarded as a command + //and the following bytes are datas, + //32 bytes input wil be stored in SPI_FLASH_C0-C7 + //32 bytes output data should be set to SPI_FLASH_C8-C15 + WRITE_PERI_REG(SPI_USER2(spi_no), (0x7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S); //0x70000000 + + //set 8 bit slave recieve buffer length, the buffer is SPI_FLASH_C0-C7 + //set 8 bit slave status register, which is the low 8 bit of register "SPI_FLASH_STATUS" + SET_PERI_REG_MASK(SPI_SLAVE1(spi_no), ((data_bit_len & SPI_SLV_BUF_BITLEN) << SPI_SLV_BUF_BITLEN_S) | + ((0x7 & SPI_SLV_STATUS_BITLEN) << SPI_SLV_STATUS_BITLEN_S) | + ((0x7 & SPI_SLV_WR_ADDR_BITLEN) << SPI_SLV_WR_ADDR_BITLEN_S) | + ((0x7 & SPI_SLV_RD_ADDR_BITLEN) << SPI_SLV_RD_ADDR_BITLEN_S)); + + SET_PERI_REG_MASK(SPI_PIN(spi_no), BIT19); //BIT19 + + //maybe enable slave transmission liston + SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); + //register level2 isr function, which contains spi, hspi and i2s events + ETS_SPI_INTR_ATTACH(spi_slave_isr_handler, NULL); + //enable level2 isr, which contains spi, hspi and i2s events + ETS_SPI_INTR_ENABLE(); +} + + + + + +/* ============================================================================================= + * code below is for spi slave r/w testcase with 2 r/w state lines connected to the spi master mcu + * replace with your own process functions + * find "add system_os_post here" in spi_slave_isr_handler. + * ============================================================================================= + */ + + + + + + + +#ifdef SPI_SLAVE_DEBUG +/****************************************************************************** +* FunctionName : hspi_master_readwrite_repeat +* Description : SPI master test function for reading and writing esp8266 slave buffer, + the function uses HSPI module +*******************************************************************************/ +os_timer_t timer2; + +void hspi_master_readwrite_repeat(void) +{ + static uint8_t data = 0; + uint8_t temp; + + os_timer_disarm(&timer2); + spi_byte_read_espslave(HSPI, &temp); + + temp++; + spi_byte_write_espslave(HSPI, temp); + os_timer_setfn(&timer2, (os_timer_func_t *)hspi_master_readwrite_repeat, NULL); + os_timer_arm(&timer2, 500, 0); +} +#endif + + +/****************************************************************************** + * FunctionName : spi_slave_isr_handler + * Description : SPI interrupt function, SPI HSPI and I2S interrupt can trig this function + some basic operation like clear isr flag has been done, + and it is availible for adding user coder in the funtion + * Parameters : void *para- function parameter address, which has been registered in function spi_slave_init +*******************************************************************************/ +#include "gpio.h" +#include "user_interface.h" +#include "mem.h" +static uint8_t spi_data[32] = {0}; +static uint8_t idx = 0; +static uint8_t spi_flg = 0; +#define SPI_MISO +#define SPI_QUEUE_LEN 8 +os_event_t *spiQueue; +#define MOSI 0 +#define MISO 1 +#define STATUS_R_IN_WR 2 +#define STATUS_W 3 +#define TR_DONE_ALONE 4 +#define WR_RD 5 +#define DATA_ERROR 6 +#define STATUS_R_IN_RD 7 +//init the two intr line of slave +//gpio0: wr_ready ,and +//gpio2: rd_ready , controlled by slave +void ICACHE_FLASH_ATTR +gpio_init() +{ + + PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2); + //PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO4_U, FUNC_GPIO4); + GPIO_OUTPUT_SET(0, 1); + GPIO_OUTPUT_SET(2, 0); + //GPIO_OUTPUT_SET(4, 1); +} + + + +void spi_slave_isr_handler(void *para) +{ + uint32_t regvalue, calvalue; + static uint8_t state = 0; + uint32_t recv_data, send_data; + + if (READ_PERI_REG(0x3ff00020)&BIT4) { + //following 3 lines is to clear isr signal + CLEAR_PERI_REG_MASK(SPI_SLAVE(SPI), 0x3ff); + } else if (READ_PERI_REG(0x3ff00020)&BIT7) { //bit7 is for hspi isr, + regvalue = READ_PERI_REG(SPI_SLAVE(HSPI)); + CLEAR_PERI_REG_MASK(SPI_SLAVE(HSPI), + SPI_TRANS_DONE_EN | + SPI_SLV_WR_STA_DONE_EN | + SPI_SLV_RD_STA_DONE_EN | + SPI_SLV_WR_BUF_DONE_EN | + SPI_SLV_RD_BUF_DONE_EN); + SET_PERI_REG_MASK(SPI_SLAVE(HSPI), SPI_SYNC_RESET); + CLEAR_PERI_REG_MASK(SPI_SLAVE(HSPI), + SPI_TRANS_DONE | + SPI_SLV_WR_STA_DONE | + SPI_SLV_RD_STA_DONE | + SPI_SLV_WR_BUF_DONE | + SPI_SLV_RD_BUF_DONE); + SET_PERI_REG_MASK(SPI_SLAVE(HSPI), + SPI_TRANS_DONE_EN | + SPI_SLV_WR_STA_DONE_EN | + SPI_SLV_RD_STA_DONE_EN | + SPI_SLV_WR_BUF_DONE_EN | + SPI_SLV_RD_BUF_DONE_EN); + + if (regvalue & SPI_SLV_WR_BUF_DONE) { + GPIO_OUTPUT_SET(0, 0); + idx = 0; + + while (idx < 8) { + recv_data = READ_PERI_REG(SPI_W0(HSPI) + (idx << 2)); + spi_data[idx << 2] = recv_data & 0xff; + spi_data[(idx << 2) + 1] = (recv_data >> 8) & 0xff; + spi_data[(idx << 2) + 2] = (recv_data >> 16) & 0xff; + spi_data[(idx << 2) + 3] = (recv_data >> 24) & 0xff; + idx++; + } + + //add system_os_post here + GPIO_OUTPUT_SET(0, 1); + } + + if (regvalue & SPI_SLV_RD_BUF_DONE) { + //it is necessary to call GPIO_OUTPUT_SET(2, 1), when new data is preped in SPI_W8-15 and needs to be sended. + GPIO_OUTPUT_SET(2, 0); + //add system_os_post here + //system_os_post(USER_TASK_PRIO_1,WR_RD,regvalue); + + } + + } else if (READ_PERI_REG(0x3ff00020)&BIT9) { //bit7 is for i2s isr, + + } +} + + +#ifdef SPI_SLAVE_DEBUG + +void ICACHE_FLASH_ATTR +set_miso_data() +{ + if (GPIO_INPUT_GET(2) == 0) { + WRITE_PERI_REG(SPI_W8(HSPI), 0x05040302); + WRITE_PERI_REG(SPI_W9(HSPI), 0x09080706); + WRITE_PERI_REG(SPI_W10(HSPI), 0x0d0c0b0a); + WRITE_PERI_REG(SPI_W11(HSPI), 0x11100f0e); + + WRITE_PERI_REG(SPI_W12(HSPI), 0x15141312); + WRITE_PERI_REG(SPI_W13(HSPI), 0x19181716); + WRITE_PERI_REG(SPI_W14(HSPI), 0x1d1c1b1a); + WRITE_PERI_REG(SPI_W15(HSPI), 0x21201f1e); + GPIO_OUTPUT_SET(2, 1); + } +} + + + +void ICACHE_FLASH_ATTR +disp_spi_data() +{ + uint8_t i = 0; + + for (i = 0; i < 32; i++) { + os_printf("data %d : 0x%02x\n\r", i, spi_data[i]); + } + + //os_printf("d31:0x%02x\n\r",spi_data[31]); +} + + +void ICACHE_FLASH_ATTR +spi_task(os_event_t *e) +{ + uint8_t data; + + switch (e->sig) { + case MOSI: + disp_spi_data(); + break; + + case STATUS_R_IN_WR : + os_printf("SR ERR in WRPR,Reg:%08x \n", e->par); + break; + + case STATUS_W: + os_printf("SW ERR,Reg:%08x\n", e->par); + break; + + case TR_DONE_ALONE: + os_printf("TD ALO ERR,Reg:%08x\n", e->par); + break; + + case WR_RD: + os_printf("WR&RD ERR,Reg:%08x\n", e->par); + break; + + case DATA_ERROR: + os_printf("Data ERR,Reg:%08x\n", e->par); + break; + + case STATUS_R_IN_RD : + os_printf("SR ERR in RDPR,Reg:%08x\n", e->par); + break; + + default: + break; + } +} + +void ICACHE_FLASH_ATTR +spi_task_init(void) +{ + spiQueue = (os_event_t *)os_malloc(sizeof(os_event_t) * SPI_QUEUE_LEN); + system_os_task(spi_task, USER_TASK_PRIO_1, spiQueue, SPI_QUEUE_LEN); +} + +os_timer_t spi_timer_test; + +void ICACHE_FLASH_ATTR +spi_test_init() +{ + os_printf("spi init\n\r"); + spi_slave_init(HSPI); + os_printf("gpio init\n\r"); + gpio_init(); + os_printf("spi task init \n\r"); + spi_task_init(); +#ifdef SPI_MISO + os_printf("spi miso init\n\r"); + set_miso_data(); +#endif + + //os_timer_disarm(&spi_timer_test); + //os_timer_setfn(&spi_timer_test, (os_timer_func_t *)set_miso_data, NULL);//wjl + //os_timer_arm(&spi_timer_test,50,1); +} + +#endif + + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi_interface.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi_interface.c new file mode 100644 index 0000000..b54ce87 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi_interface.c @@ -0,0 +1,545 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/** + * @file spi_interface.c + * @brief Defines and Macros for the SPI. + */ + +#include "osapi.h" +#include "ets_sys.h" +#include "driver/spi_interface.h" + +//***************************************************************************** +// +// Make sure all of the definitions in this header have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +/** + * @brief Based on pAttr initialize SPI module. + * + */ +void ICACHE_FLASH_ATTR SPIInit(SpiNum spiNum, SpiAttr *pAttr) +{ + if ((spiNum > SpiNum_HSPI) + || (NULL == pAttr)) { + return; + } + + // SPI_CPOL & SPI_CPHA + switch (pAttr->subMode) { + case SpiSubMode_1: + CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE + break; + + case SpiSubMode_2: + SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE + break; + + case SpiSubMode_3: + SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); + break; + + case SpiSubMode_0: + default: + CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); + // To do nothing + break; + } + + // SPI bit order + if (SpiBitOrder_MSBFirst == pAttr->bitOrder) { + CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_WR_BIT_ORDER); + CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_RD_BIT_ORDER); + } else if (SpiBitOrder_LSBFirst == pAttr->bitOrder) { + SET_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_WR_BIT_ORDER); + SET_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_RD_BIT_ORDER); + } else { + // To do nothing + } + + // Disable flash operation mode + // As earlier as better, if not SPI_CTRL2 can not to be set delay cycles. + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_FLASH_MODE); + + // SPI mode type + if (SpiMode_Master == pAttr->mode) { + // SPI mode type + CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), SPI_SLAVE_MODE); + // SPI Send buffer + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO_HIGHPART); // By default slave send buffer C0-C7 + + // SPI Speed + if (1 < (pAttr->speed)) { + uint8_t i, k; + i = (pAttr->speed / 40) ? (pAttr->speed / 40) : 1; + k = pAttr->speed / i; + CLEAR_PERI_REG_MASK(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK); + WRITE_PERI_REG(SPI_CLOCK(spiNum), + (((i - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) | + (((k - 1) & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) | + ((((k + 1) / 2 - 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) | + (((k - 1) & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div + } else { + WRITE_PERI_REG(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK); // 80Mhz speed + } + + // By default format:CMD+ADDR+DATA + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CS_SETUP | SPI_CS_HOLD | SPI_USR_MOSI); + + //delay num + SET_PERI_REG_MASK(SPI_CTRL2(spiNum), ((0x1 & SPI_MISO_DELAY_NUM) << SPI_MISO_DELAY_NUM_S)); + } else if (SpiMode_Slave == pAttr->mode) { + // BIT19 must do + SET_PERI_REG_MASK(SPI_PIN(spiNum), BIT19); + + // SPI mode type + SET_PERI_REG_MASK(SPI_SLAVE(spiNum), SPI_SLAVE_MODE); + // SPI Send buffer + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO_HIGHPART);// By default slave send buffer C8-C15 + + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); + + // If do not set delay cycles, slave not working,master cann't get the data. + SET_PERI_REG_MASK(SPI_CTRL2(spiNum), ((0x1 & SPI_MOSI_DELAY_NUM) << SPI_MOSI_DELAY_NUM_S)); //delay num + // SPI Speed + WRITE_PERI_REG(SPI_CLOCK(spiNum), 0); + + // By default format::CMD(8bits)+ADDR(8bits)+DATA(32bytes). + SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, + 7, SPI_USR_COMMAND_BITLEN_S); + SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_WR_ADDR_BITLEN, + 7, SPI_SLV_WR_ADDR_BITLEN_S); + SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_RD_ADDR_BITLEN, + 7, SPI_SLV_RD_ADDR_BITLEN_S); + SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_BUF_BITLEN, + (32 * 8 - 1), SPI_SLV_BUF_BITLEN_S); + // For 8266 work on slave mode. + SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_STATUS_BITLEN, + 7, SPI_SLV_STATUS_BITLEN_S); + } else { + // To do nothing + } + + //clear Daul or Quad lines transmission mode + CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_QIO_MODE | SPI_DIO_MODE | SPI_DOUT_MODE | SPI_QOUT_MODE); + // Clear the data buffer. + uint8_t i; + uint32_t regAddr = REG_SPI_BASE(spiNum) + 0x40; + + for (i = 0; i < 16; ++i) { + WRITE_PERI_REG(regAddr, 0); + regAddr += 4; + } + +} + +/** + * @brief Set address value by master mode. + * + */ +void ICACHE_FLASH_ATTR SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr) +{ + if (spiNum > SpiNum_HSPI) { + return; + } + + // Set address + WRITE_PERI_REG(SPI_ADDR(spiNum), addr); +} + +/** + * @brief Set command value by master mode. + * + */ +void ICACHE_FLASH_ATTR SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd) +{ + if (spiNum > SpiNum_HSPI) { + return; + } + + // SPI_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1, + // bit15-0 is cmd value. + SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_VALUE, cmd, SPI_USR_COMMAND_VALUE_S); +} + +/** + * @brief Send data to slave. + * + */ +int32_t ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData *pInData) +{ + char idx = 0; + + if ((spiNum > SpiNum_HSPI) + || (NULL == pInData) + || (64 < pInData->dataLen)) { + return -1; + } + + uint32_t *value = pInData->data; + + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + + // Set command by user. + if (pInData->cmdLen != 0) { + // Max command length 16 bits. + SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, + ((pInData->cmdLen << 3) - 1), SPI_USR_COMMAND_BITLEN_S); + // Enable command + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); + // Load command + SPIMasterCfgCmd(spiNum, pInData->cmd); + } else { + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); + SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, + 0, SPI_USR_COMMAND_BITLEN_S); + } + + // Set Address by user. + if (pInData->addrLen == 0) { + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, + 0, SPI_USR_ADDR_BITLEN_S); + } else { + if (NULL == pInData->addr) { + return -1; + } + + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, + ((pInData->addrLen << 3) - 1), SPI_USR_ADDR_BITLEN_S); + // Enable address + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); + // Load address + SPIMasterCfgAddr(spiNum, *pInData->addr); + } + + // Set data by user. + if (pInData->dataLen != 0) { + if (NULL == value) { + return -1; + } + + // Enable MOSI + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); + + // Load send buffer + do { + WRITE_PERI_REG((SPI_W0(spiNum) + (idx << 2)), *value++); + } while (++idx < ((pInData->dataLen / 4) + ((pInData->dataLen % 4) ? 1 : 0))); + + // Set data send buffer length.Max data length 64 bytes. + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, ((pInData->dataLen << 3) - 1), SPI_USR_MOSI_BITLEN_S); + } else { + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, + 0, SPI_USR_MOSI_BITLEN_S); + } + + // Start send data + SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); + + // Wait for transmit done + while (!(READ_PERI_REG(SPI_SLAVE(spiNum))&SPI_TRANS_DONE)); + + CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), SPI_TRANS_DONE); + return 0; +} + +/** + * @brief Receive data from slave. + * + */ +int32_t ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData *pOutData) +{ + char idx = 0; + + if ((spiNum > SpiNum_HSPI) + || (NULL == pOutData)) { + return -1; + } + + uint32_t *value = pOutData->data; + + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + + // Set command by user. + if (pOutData->cmdLen != 0) { + // Max command length 16 bits. + SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, + ((pOutData->cmdLen << 3) - 1), SPI_USR_COMMAND_BITLEN_S); + // Enable command + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); + // Load command + SPIMasterCfgCmd(spiNum, pOutData->cmd); + } else { + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); + SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, + 0, SPI_USR_COMMAND_BITLEN_S); + } + + // Set Address by user. + if (pOutData->addrLen == 0) { + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, + 0, SPI_USR_ADDR_BITLEN_S); + } else { + if (NULL == pOutData->addr) { + return -1; + } + + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, + ((pOutData->addrLen << 3) - 1), SPI_USR_ADDR_BITLEN_S); + // Enable address + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); + // Load address + SPIMasterCfgAddr(spiNum, *pOutData->addr); + } + + // Set data by user. + if (pOutData->dataLen != 0) { + if (NULL == value) { + return -1; + } + + // Clear MOSI enable + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); + // Enable MOSI + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); + // Set data send buffer length.Max data length 64 bytes. + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN, ((pOutData->dataLen << 3) - 1), SPI_USR_MISO_BITLEN_S); + } else { + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN, + 0, SPI_USR_MISO_BITLEN_S); + } + + // Start send data + SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); + + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + + // Read data out + do { + *value++ = READ_PERI_REG(SPI_W0(spiNum) + (idx << 2)); + } while (++idx < ((pOutData->dataLen / 4) + ((pOutData->dataLen % 4) ? 1 : 0))); + + + return 0; +} + +/** + * @brief Load data to send buffer by slave mode. + * + */ +int32_t ICACHE_FLASH_ATTR SPISlaveSendData(SpiNum spiNum, uint32_t *pInData, uint8_t inLen) +{ + if (NULL == pInData) { + return -1; + } + + uint32_t *value = pInData; + char i; + + for (i = 0; i < inLen; ++i) { + WRITE_PERI_REG((SPI_W8(spiNum) + (i << 2)), *value++); + } + + // Enable slave transmission liston + SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); + return 0; +} + +/** + * @brief Configurate slave prepare for receive data. + * + */ +int32_t ICACHE_FLASH_ATTR SPISlaveRecvData(SpiNum spiNum) +{ + if ((spiNum > SpiNum_HSPI)) { + return -1; + } + + // Enable slave transmission liston + SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); + + return 0; +} + +/** + * @brief Send data to slave(ESP8266 register of RD_STATUS or WR_STATUS). + * + */ +void ICACHE_FLASH_ATTR SPIMasterSendStatus(SpiNum spiNum, uint8_t data) +{ + if (spiNum > SpiNum_HSPI) { + return; + } + + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + + // Enable MOSI + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR); + + // 8bits cmd, 0x04 is eps8266 slave write cmd value + WRITE_PERI_REG(SPI_USER2(spiNum), + ((7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) + | MASTER_WRITE_STATUS_TO_SLAVE_CMD); + // Set data send buffer length. + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, + ((sizeof(data) << 3) - 1), SPI_USR_MOSI_BITLEN_S); + + WRITE_PERI_REG(SPI_W0(spiNum), (uint32_t)(data)); + // Start SPI + SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); + +} + +/** + * @brief Receive status register from slave(ESP8266). + * + */ +int32_t ICACHE_FLASH_ATTR SPIMasterRecvStatus(SpiNum spiNum) +{ + if (spiNum > SpiNum_HSPI) { + return -1; + } + + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + + // Enable MISO + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI | SPI_USR_DUMMY | SPI_USR_ADDR); + + // 8bits cmd, 0x06 is eps8266 slave read status cmd value + WRITE_PERI_REG(SPI_USER2(spiNum), + ((7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) + | MASTER_READ_STATUS_FROM_SLAVE_CMD); + // Set revcive buffer length. + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN, + 7, SPI_USR_MISO_BITLEN_S); + + // start spi module. + SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); + + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + + uint8_t data = (uint8_t)(READ_PERI_REG(SPI_W0(spiNum)) & 0xff); + + return (uint8_t)(READ_PERI_REG(SPI_W0(spiNum)) & 0xff); +} + +/** + * @brief Select SPI CS pin. + * + */ +void ICACHE_FLASH_ATTR SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs) +{ + if (spiNum > SpiNum_HSPI) { + return; + } + + // clear select + SET_PERI_REG_BITS(SPI_PIN(spiNum), 3, 0, 0); + SET_PERI_REG_MASK(SPI_PIN(spiNum), pinCs); +} + + +void SPIIntCfg(SpiNum spiNum, SpiIntInfo *pIntInfo) +{ + if ((spiNum > SpiNum_HSPI) + || (NULL == pIntInfo)) { + return; + } + + // Clear the interrupt source and disable all of the interrupt. + CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), 0x3FF); + SPIIntEnable(spiNum, pIntInfo->src); + os_printf("src=%x\r\n,isrFunc=%x", (pIntInfo->src << 5), pIntInfo->isrFunc); + // + ETS_SPI_INTR_ATTACH(pIntInfo->isrFunc, NULL); + // Enable isr + ETS_SPI_INTR_ENABLE(); +} + + +/** + * @brief Enable SPI interrupt source. + * + */ +void ICACHE_FLASH_ATTR SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc) +{ + if (spiNum > SpiNum_HSPI) { + return; + } + + SET_PERI_REG_MASK(SPI_SLAVE(spiNum), (intSrc << 5)); +} + +/** + * @brief Disable SPI interrupt source. + * + */ +void ICACHE_FLASH_ATTR SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc) +{ + if (spiNum > SpiNum_HSPI) { + return; + } + + CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), intSrc); +} + +/** + * @brief Clear all of SPI interrupt source. + * + */ +void ICACHE_FLASH_ATTR SPIIntClear(SpiNum spiNum) +{ + if (spiNum > SpiNum_HSPI) { + return; + } + + CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), SpiIntSrc_TransDone + | SpiIntSrc_WrStaDone + | SpiIntSrc_RdStaDone + | SpiIntSrc_WrBufDone + | SpiIntSrc_RdBufDone); +} + + +#ifdef __cplusplus +} +#endif diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi_overlap.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi_overlap.c new file mode 100644 index 0000000..169fd48 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/spi_overlap.c @@ -0,0 +1,484 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "driver/spi_overlap.h" +#include "driver/spi.h" +#include "gpio.h" + +#define SPI_FLASH_READ_MODE_MASK 0x196000 +#define WAIT_HSPI_IDLE() while(READ_PERI_REG(SPI_EXT2(HSPI))||(READ_PERI_REG(SPI_CMD(HSPI))&0xfffc0000)); +#define CONF_HSPI_CLK_DIV(div) WRITE_PERI_REG(SPI_CLOCK(HSPI), (((div<<1)+1)<<12)+(div<<6)+(div<<1)+1) +#define HSPI_FALLING_EDGE_SAMPLE() SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE) +#define HSPI_RISING_EDGE_SAMPLE() CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE) +#define ACTIVE_HSPI_CS0 CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS0_DIS);\ + SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS1_DIS |SPI_CS2_DIS) +#define ACTIVE_HSPI_CS1 CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS1_DIS);\ + SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS0_DIS |SPI_CS2_DIS) +#define ACTIVE_HSPI_CS2 CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS2_DIS);\ + SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS0_DIS |SPI_CS1_DIS) +#define ENABLE_HSPI_DEV_CS() PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2) +#define DISABLE_HSPI_DEV_CS() GPIO_OUTPUT_SET(15, 1);\ + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_GPIO15) +struct hspi_device_register hspi_dev_reg; +/****************************************************************************** + * FunctionName : hspi_overlap_init + * Description : enable hspi and spi module overlap mode +*******************************************************************************/ +void ICACHE_FLASH_ATTR +hspi_overlap_init(void) +{ + //hspi overlap to spi, two spi masters on cspi + SET_PERI_REG_MASK(HOST_INF_SEL, reg_cspi_overlap); + + //set higher priority for spi than hspi + SET_PERI_REG_MASK(SPI_EXT3(SPI), 0x1); + SET_PERI_REG_MASK(SPI_EXT3(HSPI), 0x3); + SET_PERI_REG_MASK(SPI_USER(HSPI), BIT(5)); +} +/****************************************************************************** + * FunctionName : hspi_overlap_deinit + * Description : recover hspi and spi module from overlap mode +*******************************************************************************/ +void ICACHE_FLASH_ATTR +hspi_overlap_deinit(void) +{ + //hspi overlap to spi, two spi masters on cspi + CLEAR_PERI_REG_MASK(HOST_INF_SEL, reg_cspi_overlap); + + //set higher priority for spi than hspi + CLEAR_PERI_REG_MASK(SPI_EXT3(SPI), 0x1); + CLEAR_PERI_REG_MASK(SPI_EXT3(HSPI), 0x3); + CLEAR_PERI_REG_MASK(SPI_USER(HSPI), BIT(5)); +} + +/****************************************************************************** + * FunctionName : spi_reg_backup + * Description : backup SPI normal operation register value and disable CPU cache to modify some flash registers. + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_reg_backup(uint8_t spi_no, uint32_t *backup_mem) +{ + if (spi_no > 1) { + return; //handle invalid input number + } + + backup_mem[PERIPHS_IO_MUX_BACKUP] = READ_PERI_REG(PERIPHS_IO_MUX); + backup_mem[SPI_USER_BACKUP] = READ_PERI_REG(SPI_USER(spi_no)); + backup_mem[SPI_CTRL_BACKUP] = READ_PERI_REG(SPI_CTRL(spi_no)); + backup_mem[SPI_CLOCK_BACKUP] = READ_PERI_REG(SPI_CLOCK(spi_no)); + backup_mem[SPI_USER1_BACKUP] = READ_PERI_REG(SPI_USER1(spi_no)); + backup_mem[SPI_USER2_BACKUP] = READ_PERI_REG(SPI_USER2(spi_no)); + backup_mem[SPI_CMD_BACKUP] = READ_PERI_REG(SPI_CMD(spi_no)); + backup_mem[SPI_PIN_BACKUP] = READ_PERI_REG(SPI_PIN(spi_no)); + backup_mem[SPI_SLAVE_BACKUP] = READ_PERI_REG(SPI_SLAVE(spi_no)); +} +/****************************************************************************** + * FunctionName : spi_reg_recover + * Description : recover SPI normal operation register value and enable CPU cache. + * Parameters : uint8_t spi_no - SPI module number, Only "SPI" and "HSPI" are valid +*******************************************************************************/ +void ICACHE_FLASH_ATTR +spi_reg_recover(uint8_t spi_no, uint32_t *backup_mem) +{ + if (spi_no > 1) { + return; //handle invalid input number + } + +// WRITE_PERI_REG(PERIPHS_IO_MUX, backup_mem[PERIPHS_IO_MUX_BACKUP]); + WRITE_PERI_REG(SPI_USER(spi_no), backup_mem[SPI_USER_BACKUP]); + WRITE_PERI_REG(SPI_CTRL(spi_no), backup_mem[SPI_CTRL_BACKUP]); + WRITE_PERI_REG(SPI_CLOCK(spi_no), backup_mem[SPI_CLOCK_BACKUP]); + WRITE_PERI_REG(SPI_USER1(spi_no), backup_mem[SPI_USER1_BACKUP]); + WRITE_PERI_REG(SPI_USER2(spi_no), backup_mem[SPI_USER2_BACKUP]); + WRITE_PERI_REG(SPI_CMD(spi_no), backup_mem[SPI_CMD_BACKUP]); + WRITE_PERI_REG(SPI_PIN(spi_no), backup_mem[SPI_PIN_BACKUP]); +// WRITE_PERI_REG(SPI_SLAVE(spi_no), backup_mem[SPI_SLAVE_BACKUP]); +} + +void ICACHE_FLASH_ATTR +hspi_master_dev_init(uint8_t dev_no, uint8_t clk_polar, uint8_t clk_div) +{ + uint32_t regtemp; + + if ((dev_no > 3) || (clk_polar > 1) || (clk_div > 0x1f)) { + os_printf("hspi_master_dev_init parameter is out of range!\n\r"); + return; + } + + WAIT_HSPI_IDLE(); + + if (!hspi_dev_reg.hspi_reg_backup_flag) { + if (READ_PERI_REG(PERIPHS_IO_MUX)&BIT8) { + hspi_dev_reg.spi_io_80m = 1; + SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK); + } else { + hspi_dev_reg.spi_io_80m = 0; + CLEAR_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK); + } + + regtemp = READ_PERI_REG(SPI_CTRL(SPI))&SPI_FLASH_READ_MODE_MASK; + CLEAR_PERI_REG_MASK(SPI_CTRL(HSPI), SPI_FLASH_READ_MODE_MASK); + SET_PERI_REG_MASK(SPI_CTRL(HSPI), regtemp); + spi_reg_backup(HSPI, hspi_dev_reg.hspi_flash_reg_backup); + + spi_master_init(HSPI); + spi_reg_backup(HSPI, hspi_dev_reg.hspi_dev_reg_backup); + + hspi_dev_reg.hspi_reg_backup_flag = 1; + + // spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); + hspi_dev_reg.selected_dev_num = HSPI_IDLE; + } + + hspi_dev_reg.hspi_dev_conf[dev_no].active = 1; + hspi_dev_reg.hspi_dev_conf[dev_no].clk_div = clk_div; + hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar = clk_polar; + + switch (dev_no) { + case HSPI_CS_DEV : + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); + CLEAR_PERI_REG_MASK(PERIPHS_IO_MUX, BIT9); + break; + + case SPI_CS1_DEV : + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_SPI_CS1); + + if (hspi_dev_reg.spi_io_80m) { + os_printf("SPI CS1 device must work at 80Mhz"); + } + + break; + + case SPI_CS2_DEV : + PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_SPI_CS2); + + if (hspi_dev_reg.spi_io_80m) { + os_printf("SPI CS2 device must work at 80Mhz"); + } + + break; + + default: + break; + } +} + +void ICACHE_FLASH_ATTR +hspi_dev_sel(uint8_t dev_no) +{ + uint32_t regval; + + if (dev_no > 3) { + os_printf("hspi_dev_sel parameter is out of range!\n\r"); + return; + } + + if (!hspi_dev_reg.hspi_dev_conf[dev_no].active) { + os_printf("device%d has not been initialized!\n\r", dev_no); + return; + } + + switch (hspi_dev_reg.selected_dev_num) { + case HSPI_CS_DEV: + if ((dev_no == SPI_CS1_DEV) || (dev_no == SPI_CS2_DEV)) { + WAIT_HSPI_IDLE(); + DISABLE_HSPI_DEV_CS(); + hspi_overlap_init(); + + if (hspi_dev_reg.spi_io_80m) { + SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK); + } else { + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + } + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + if (dev_no == SPI_CS1_DEV) { + ACTIVE_HSPI_CS1; + } else { + ACTIVE_HSPI_CS2; + } + } else if (dev_no == SPI_CS0_FLASH) { + WAIT_HSPI_IDLE(); + DISABLE_HSPI_DEV_CS(); + hspi_overlap_init(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); + + if (hspi_dev_reg.spi_io_80m) { + SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK); + } + + HSPI_RISING_EDGE_SAMPLE(); + ACTIVE_HSPI_CS0 ; + } + + break; + + case SPI_CS1_DEV: + if (dev_no == SPI_CS2_DEV) { + WAIT_HSPI_IDLE(); + + if (!hspi_dev_reg.spi_io_80m) { + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + } + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + ACTIVE_HSPI_CS2; + } else if (dev_no == SPI_CS0_FLASH) { + WAIT_HSPI_IDLE(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); + HSPI_RISING_EDGE_SAMPLE(); + ACTIVE_HSPI_CS0; + } else if (dev_no == HSPI_CS_DEV) { + WAIT_HSPI_IDLE(); + ENABLE_HSPI_DEV_CS(); + hspi_overlap_deinit(); + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + ACTIVE_HSPI_CS0; + } + + break; + + case SPI_CS2_DEV: + if (dev_no == SPI_CS1_DEV) { + WAIT_HSPI_IDLE(); + + if (!hspi_dev_reg.spi_io_80m) { + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + } + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + ACTIVE_HSPI_CS1; + } else if (dev_no == SPI_CS0_FLASH) { + WAIT_HSPI_IDLE(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); + HSPI_RISING_EDGE_SAMPLE(); + ACTIVE_HSPI_CS0; + } else if (dev_no == HSPI_CS_DEV) { + WAIT_HSPI_IDLE(); + ENABLE_HSPI_DEV_CS(); + hspi_overlap_deinit(); + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + ACTIVE_HSPI_CS0; + } + + break; + + case SPI_CS0_FLASH: + if ((dev_no == SPI_CS1_DEV) || (dev_no == SPI_CS2_DEV)) { + WAIT_HSPI_IDLE(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); + + if (hspi_dev_reg.spi_io_80m) { + SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK); + } else { + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + } + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + if (dev_no == SPI_CS1_DEV) { + ACTIVE_HSPI_CS1; + } else { + ACTIVE_HSPI_CS2; + } + } else if (dev_no == HSPI_CS_DEV) { + WAIT_HSPI_IDLE(); + ENABLE_HSPI_DEV_CS(); + hspi_overlap_deinit(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + ACTIVE_HSPI_CS0; + } + + break; + + default: + if ((dev_no == SPI_CS1_DEV) || (dev_no == SPI_CS2_DEV)) { + WAIT_HSPI_IDLE(); + DISABLE_HSPI_DEV_CS(); + hspi_overlap_init(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); + + if (hspi_dev_reg.spi_io_80m) { + SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK); + } else { + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + } + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + if (dev_no == SPI_CS1_DEV) { + ACTIVE_HSPI_CS1; + } else { + ACTIVE_HSPI_CS2; + } + } else if (dev_no == SPI_CS0_FLASH) { + WAIT_HSPI_IDLE(); + DISABLE_HSPI_DEV_CS(); + hspi_overlap_init(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); + + if (hspi_dev_reg.spi_io_80m) { + SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK); + } + + HSPI_RISING_EDGE_SAMPLE(); + ACTIVE_HSPI_CS0 ; + } else if (dev_no == HSPI_CS_DEV) { + WAIT_HSPI_IDLE(); + ENABLE_HSPI_DEV_CS(); + hspi_overlap_deinit(); + spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); + CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); + + if (hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) { + HSPI_FALLING_EDGE_SAMPLE(); + } else { + HSPI_RISING_EDGE_SAMPLE(); + } + + ACTIVE_HSPI_CS0; + } + + break; + } + + hspi_dev_reg.selected_dev_num = dev_no; +} + +/****************************************************************************** + * FunctionName : spi_read_data + * Description : use hspi to read flash data for stability test + * Parameters : SpiFlashChip * spi-- flash parameter structure pointer + * uint32_t flash_addr--flash start address + * uint32_t * addr_dest--start address for preped destination memory space + * uint32_t byte_length--length of the data which needs to be read from flash +*******************************************************************************/ +SpiFlashOpResult ICACHE_FLASH_ATTR +hspi_overlap_read_flash_data(SpiFlashChip *spi, uint32_t flash_addr, uint32_t *addr_dest, uint32_t byte_length) +{ + uint32_t temp_addr, reg_tmp; + sint32 temp_length; + uint8_t i; + uint8_t remain_word_num; + + hspi_dev_sel(SPI_CS0_FLASH); + + //address range check + if ((flash_addr + byte_length) > (spi->chip_size)) { + return SPI_FLASH_RESULT_ERR; + } + + temp_addr = flash_addr; + temp_length = byte_length; + + while (temp_length > 0) { + if (temp_length >= SPI_BUFF_BYTE_NUM) { + // reg_tmp=((temp_addr&0xff)<<16)|(temp_addr&0xff00)|((temp_addr&0xff0000)>>16)|(SPI_BUFF_BYTE_NUM << SPI_FLASH_BYTES_LEN); + reg_tmp = temp_addr | (SPI_BUFF_BYTE_NUM << SPI_FLASH_BYTES_LEN) ; + WRITE_PERI_REG(SPI_ADDR(HSPI), reg_tmp); + WRITE_PERI_REG(SPI_CMD(HSPI), SPI_FLASH_READ); + + while (READ_PERI_REG(SPI_CMD(HSPI)) != 0); + + for (i = 0; i < (SPI_BUFF_BYTE_NUM >> 2); i++) { + *addr_dest++ = READ_PERI_REG(SPI_W0(HSPI) + i * 4); + } + + temp_length = temp_length - SPI_BUFF_BYTE_NUM; + temp_addr = temp_addr + SPI_BUFF_BYTE_NUM; + } else { + WRITE_PERI_REG(SPI_ADDR(HSPI), temp_addr | (temp_length << SPI_FLASH_BYTES_LEN)); + WRITE_PERI_REG(SPI_CMD(HSPI), SPI_FLASH_READ); + + while (READ_PERI_REG(SPI_CMD(HSPI)) != 0); + + remain_word_num = (0 == (temp_length & 0x3)) ? (temp_length >> 2) : (temp_length >> 2) + 1; + + for (i = 0; i < remain_word_num; i++) { + *addr_dest++ = READ_PERI_REG(SPI_W0(HSPI) + i * 4); + } + + temp_length = 0; + } + } + + return SPI_FLASH_RESULT_OK; +} + +void ICACHE_FLASH_ATTR +hspi_overlap_flash_init(void) +{ + hspi_master_dev_init(SPI_CS0_FLASH, 0, 0); + + spi_flash_set_read_func(hspi_overlap_read_flash_data); +} diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/driver/uart.c b/examples/ESP8266_NONOS_SDK/driver_lib/driver/uart.c new file mode 100644 index 0000000..935457b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/driver/uart.c @@ -0,0 +1,839 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "ets_sys.h" +#include "osapi.h" +#include "osapi.h" +#include "mem.h" +#include "os_type.h" +#include "user_interface.h" +#include "driver/uart.h" +#include "driver/uart_register.h" + +// UartDev is defined and initialized in rom code. +extern UartDevice UartDev; + +LOCAL struct UartBuffer *pTxBuffer = NULL; +LOCAL struct UartBuffer *pRxBuffer = NULL; + +/*uart demo with a system task, to output what uart receives*/ +/*this is a example to process uart data from task,please change the priority to fit your application task if exists*/ +/*it might conflict with your task, if so,please arrange the priority of different task, or combine it to a different event in the same task. */ +#define uart_recvTaskPrio 0 +#define uart_recvTaskQueueLen 10 +os_event_t uart_recvTaskQueue[uart_recvTaskQueueLen]; + +#define DBG +#define DBG1 uart1_sendStr_no_wait +#define DBG2 os_printf + + +LOCAL void uart0_rx_intr_handler(void *para); + +/****************************************************************************** + * FunctionName : uart_config + * Description : Internal used function + * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled + * UART1 just used for debug output + * Parameters : uart_no, use UART0 or UART1 defined ahead + * Returns : NONE +*******************************************************************************/ +LOCAL void ICACHE_FLASH_ATTR +uart_config(uint8_t uart_no) +{ + if (uart_no == UART1) { + PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); + } else { + /* rcv_buff size if 0x100 */ + ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff)); + PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); +#if UART_HW_RTS + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); //HW FLOW CONTROL RTS PIN +#endif +#if UART_HW_CTS + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_U0CTS); //HW FLOW CONTROL CTS PIN +#endif + } + + uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));//SET BAUDRATE + + WRITE_PERI_REG(UART_CONF0(uart_no), ((UartDev.exist_parity & UART_PARITY_EN_M) << UART_PARITY_EN_S) //SET BIT AND PARITY MODE + | ((UartDev.parity & UART_PARITY_M) << UART_PARITY_S) + | ((UartDev.stop_bits & UART_STOP_BIT_NUM) << UART_STOP_BIT_NUM_S) + | ((UartDev.data_bits & UART_BIT_NUM) << UART_BIT_NUM_S)); + + //clear rx and tx fifo,not ready + SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); //RESET FIFO + CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); + + if (uart_no == UART0) { + //set rx fifo trigger + WRITE_PERI_REG(UART_CONF1(uart_no), + ((100 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | +#if UART_HW_RTS + ((110 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | + UART_RX_FLOW_EN | //enbale rx flow control +#endif + (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | + UART_RX_TOUT_EN | + ((0x10 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S)); //wjl +#if UART_HW_CTS + SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN); //add this sentense to add a tx flow control via MTCK( CTS ) +#endif + SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA | UART_FRM_ERR_INT_ENA); + } else { + WRITE_PERI_REG(UART_CONF1(uart_no), ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)); //TrigLvl default val == 1 + } + + //clear all interrupt + WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); + //enable rx_interrupt + SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_OVF_INT_ENA); +} + +/****************************************************************************** + * FunctionName : uart1_tx_one_char + * Description : Internal used function + * Use uart1 interface to transfer one char + * Parameters : uint8_t TxChar - character to tx + * Returns : OK +*******************************************************************************/ +STATUS uart_tx_one_char(uint8_t uart, uint8_t TxChar) +{ + while (true) { + uint32_t fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S); + + if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { + break; + } + } + + WRITE_PERI_REG(UART_FIFO(uart), TxChar); + return OK; +} + +/****************************************************************************** + * FunctionName : uart1_write_char + * Description : Internal used function + * Do some special deal while tx char is '\r' or '\n' + * Parameters : char c - character to tx + * Returns : NONE +*******************************************************************************/ +LOCAL void ICACHE_FLASH_ATTR +uart1_write_char(char c) +{ + if (c == '\n') { + uart_tx_one_char(UART1, '\r'); + uart_tx_one_char(UART1, '\n'); + } else if (c == '\r') { + + } else { + uart_tx_one_char(UART1, c); + } +} + +//os_printf output to fifo or to the tx buffer +LOCAL void ICACHE_FLASH_ATTR +uart0_write_char_no_wait(char c) +{ +#if UART_BUFF_EN //send to uart0 fifo but do not wait + uint8_t chr; + + if (c == '\n') { + chr = '\r'; + tx_buff_enq(&chr, 1); + chr = '\n'; + tx_buff_enq(&chr, 1); + } else if (c == '\r') { + + } else { + tx_buff_enq(&c, 1); + } + +#else //send to uart tx buffer + + if (c == '\n') { + uart_tx_one_char_no_wait(UART0, '\r'); + uart_tx_one_char_no_wait(UART0, '\n'); + } else if (c == '\r') { + + } else { + uart_tx_one_char_no_wait(UART0, c); + } + +#endif +} + +/****************************************************************************** + * FunctionName : uart0_tx_buffer + * Description : use uart0 to transfer buffer + * Parameters : uint8_t *buf - point to send buffer + * uint16_t len - buffer len + * Returns : +*******************************************************************************/ +void ICACHE_FLASH_ATTR +uart0_tx_buffer(uint8_t *buf, uint16_t len) +{ + uint16_t i; + + for (i = 0; i < len; i++) { + uart_tx_one_char(UART0, buf[i]); + } +} + +/****************************************************************************** + * FunctionName : uart0_sendStr + * Description : use uart0 to transfer buffer + * Parameters : uint8_t *buf - point to send buffer + * uint16_t len - buffer len + * Returns : +*******************************************************************************/ +void ICACHE_FLASH_ATTR +uart0_sendStr(const char *str) +{ + while (*str) { + uart_tx_one_char(UART0, *str++); + } +} +void at_port_print(const char *str) __attribute__((alias("uart0_sendStr"))); +/****************************************************************************** + * FunctionName : uart0_rx_intr_handler + * Description : Internal used function + * UART0 interrupt handler, add self handle code inside + * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg + * Returns : NONE +*******************************************************************************/ +LOCAL void +uart0_rx_intr_handler(void *para) +{ + /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents + * uart1 and uart0 respectively + */ + uint8_t RcvChar; + uint8_t uart_no = UART0;//UartDev.buff_uart_no; + uint8_t fifo_len = 0; + uint8_t buf_idx = 0; + uint8_t temp, cnt; + //RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para; + + /*ATTENTION:*/ + /*IN NON-OS VERSION SDK, DO NOT USE "ICACHE_FLASH_ATTR" FUNCTIONS IN THE WHOLE HANDLER PROCESS*/ + /*ALL THE FUNCTIONS CALLED IN INTERRUPT HANDLER MUST BE DECLARED IN RAM */ + /*IF NOT , POST AN EVENT AND PROCESS IN SYSTEM TASK */ + if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) { + DBG1("FRM_ERR\r\n"); + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR); + } else if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) { + DBG("f"); + uart_rx_intr_disable(UART0); + WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR); + system_os_post(uart_recvTaskPrio, 0, 0); + } else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) { + DBG("t"); + uart_rx_intr_disable(UART0); + WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR); + system_os_post(uart_recvTaskPrio, 0, 0); + } else if (UART_TXFIFO_EMPTY_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_TXFIFO_EMPTY_INT_ST)) { + DBG("e"); + /* to output uart data from uart buffer directly in empty interrupt handler*/ + /*instead of processing in system event, in order not to wait for current task/function to quit */ + /*ATTENTION:*/ + /*IN NON-OS VERSION SDK, DO NOT USE "ICACHE_FLASH_ATTR" FUNCTIONS IN THE WHOLE HANDLER PROCESS*/ + /*ALL THE FUNCTIONS CALLED IN INTERRUPT HANDLER MUST BE DECLARED IN RAM */ + CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); +#if UART_BUFF_EN + tx_start_uart_buffer(UART0); +#endif + //system_os_post(uart_recvTaskPrio, 1, 0); + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_TXFIFO_EMPTY_INT_CLR); + + } else if (UART_RXFIFO_OVF_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_OVF_INT_ST)) { + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_OVF_INT_CLR); + DBG1("RX OVF!!\r\n"); + } + +} + +/****************************************************************************** + * FunctionName : uart_init + * Description : user interface for init uart + * Parameters : UartBautRate uart0_br - uart0 bautrate + * UartBautRate uart1_br - uart1 bautrate + * Returns : NONE +*******************************************************************************/ +#if UART_SELFTEST&UART_BUFF_EN +os_timer_t buff_timer_t; +void ICACHE_FLASH_ATTR +uart_test_rx() +{ + uint8_t uart_buf[128] = {0}; + uint16_t len = 0; + len = rx_buff_deq(uart_buf, 128); + tx_buff_enq(uart_buf, len); +} +#endif + +LOCAL void ICACHE_FLASH_ATTR /////// +uart_recvTask(os_event_t *events) +{ + if (events->sig == 0) { +#if UART_BUFF_EN + Uart_rx_buff_enq(); +#else + uint8_t fifo_len = (READ_PERI_REG(UART_STATUS(UART0)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; + uint8_t d_tmp = 0; + uint8_t idx = 0; + + for (idx = 0; idx < fifo_len; idx++) { + d_tmp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; + uart_tx_one_char(UART0, d_tmp); + } + + WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR | UART_RXFIFO_TOUT_INT_CLR); + uart_rx_intr_enable(UART0); +#endif + } else if (events->sig == 1) { +#if UART_BUFF_EN + //already move uart buffer output to uart empty interrupt + //tx_start_uart_buffer(UART0); +#else + +#endif + } +} + +void ICACHE_FLASH_ATTR +uart_init(UartBautRate uart0_br, UartBautRate uart1_br) +{ + /*this is a example to process uart data from task,please change the priority to fit your application task if exists*/ + system_os_task(uart_recvTask, uart_recvTaskPrio, uart_recvTaskQueue, uart_recvTaskQueueLen); //demo with a task to process the uart data + + UartDev.baut_rate = uart0_br; + uart_config(UART0); + UartDev.baut_rate = uart1_br; + uart_config(UART1); + ETS_UART_INTR_ENABLE(); + +#if UART_BUFF_EN + pTxBuffer = Uart_Buf_Init(UART_TX_BUFFER_SIZE); + pRxBuffer = Uart_Buf_Init(UART_RX_BUFFER_SIZE); +#endif + + + /*option 1: use default print, output from uart0 , will wait some time if fifo is full */ + //do nothing... + + /*option 2: output from uart1,uart1 output will not wait , just for output debug info */ + /*os_printf output uart data via uart1(GPIO2)*/ + //os_install_putc1((void *)uart1_write_char); //use this one to output debug information via uart1 // + + /*option 3: output from uart0 will skip current byte if fifo is full now... */ + /*see uart0_write_char_no_wait:you can output via a buffer or output directly */ + /*os_printf output uart data via uart0 or uart buffer*/ + //os_install_putc1((void *)uart0_write_char_no_wait); //use this to print via uart0 + +#if UART_SELFTEST&UART_BUFF_EN + os_timer_disarm(&buff_timer_t); + os_timer_setfn(&buff_timer_t, uart_test_rx, NULL); //a demo to process the data in uart rx buffer + os_timer_arm(&buff_timer_t, 10, 1); +#endif +} + +void ICACHE_FLASH_ATTR +uart_reattach() +{ + uart_init(BIT_RATE_115200, BIT_RATE_115200); +} + +/****************************************************************************** + * FunctionName : uart_tx_one_char_no_wait + * Description : uart tx a single char without waiting for fifo + * Parameters : uint8_t uart - uart port + * uint8_t TxChar - char to tx + * Returns : STATUS +*******************************************************************************/ +STATUS uart_tx_one_char_no_wait(uint8_t uart, uint8_t TxChar) +{ + uint8_t fifo_cnt = ((READ_PERI_REG(UART_STATUS(uart)) >> UART_TXFIFO_CNT_S)& UART_TXFIFO_CNT); + + if (fifo_cnt < 126) { + WRITE_PERI_REG(UART_FIFO(uart), TxChar); + } + + return OK; +} + +STATUS uart0_tx_one_char_no_wait(uint8_t TxChar) +{ + uint8_t fifo_cnt = ((READ_PERI_REG(UART_STATUS(UART0)) >> UART_TXFIFO_CNT_S)& UART_TXFIFO_CNT); + + if (fifo_cnt < 126) { + WRITE_PERI_REG(UART_FIFO(UART0), TxChar); + } + + return OK; +} + + +/****************************************************************************** + * FunctionName : uart1_sendStr_no_wait + * Description : uart tx a string without waiting for every char, used for print debug info which can be lost + * Parameters : const char *str - string to be sent + * Returns : NONE +*******************************************************************************/ +void uart1_sendStr_no_wait(const char *str) +{ + while (*str) { + uart_tx_one_char_no_wait(UART1, *str++); + } +} + + +#if UART_BUFF_EN +/****************************************************************************** + * FunctionName : Uart_Buf_Init + * Description : tx buffer enqueue: fill a first linked buffer + * Parameters : char *pdata - data point to be enqueue + * Returns : NONE +*******************************************************************************/ +struct UartBuffer *ICACHE_FLASH_ATTR +Uart_Buf_Init(uint32_t buf_size) +{ + uint32_t heap_size = system_get_free_heap_size(); + + if (heap_size <= buf_size) { + DBG1("no buf for uart\n\r"); + return NULL; + } else { + DBG("test heap size: %d\n\r", heap_size); + struct UartBuffer *pBuff = (struct UartBuffer *)os_malloc(sizeof(struct UartBuffer)); + pBuff->UartBuffSize = buf_size; + pBuff->pUartBuff = (uint8_t *)os_malloc(pBuff->UartBuffSize); + pBuff->pInPos = pBuff->pUartBuff; + pBuff->pOutPos = pBuff->pUartBuff; + pBuff->Space = pBuff->UartBuffSize; + pBuff->BuffState = OK; + pBuff->nextBuff = NULL; + pBuff->TcpControl = RUN; + return pBuff; + } +} + + +//copy uart buffer +LOCAL void Uart_Buf_Cpy(struct UartBuffer *pCur, char *pdata, uint16_t data_len) +{ + if (data_len == 0) { + return ; + } + + uint16_t tail_len = pCur->pUartBuff + pCur->UartBuffSize - pCur->pInPos ; + + if (tail_len >= data_len) { //do not need to loop back the queue + os_memcpy(pCur->pInPos, pdata, data_len); + pCur->pInPos += (data_len); + pCur->pInPos = (pCur->pUartBuff + (pCur->pInPos - pCur->pUartBuff) % pCur->UartBuffSize); + pCur->Space -= data_len; + } else { + os_memcpy(pCur->pInPos, pdata, tail_len); + pCur->pInPos += (tail_len); + pCur->pInPos = (pCur->pUartBuff + (pCur->pInPos - pCur->pUartBuff) % pCur->UartBuffSize); + pCur->Space -= tail_len; + os_memcpy(pCur->pInPos, pdata + tail_len, data_len - tail_len); + pCur->pInPos += (data_len - tail_len); + pCur->pInPos = (pCur->pUartBuff + (pCur->pInPos - pCur->pUartBuff) % pCur->UartBuffSize); + pCur->Space -= (data_len - tail_len); + } + +} + +/****************************************************************************** + * FunctionName : uart_buf_free + * Description : deinit of the tx buffer + * Parameters : struct UartBuffer* pTxBuff - tx buffer struct pointer + * Returns : NONE +*******************************************************************************/ +void ICACHE_FLASH_ATTR +uart_buf_free(struct UartBuffer *pBuff) +{ + os_free(pBuff->pUartBuff); + os_free(pBuff); +} + + +//rx buffer dequeue +uint16_t ICACHE_FLASH_ATTR +rx_buff_deq(char *pdata, uint16_t data_len) +{ + uint16_t buf_len = (pRxBuffer->UartBuffSize - pRxBuffer->Space); + uint16_t tail_len = pRxBuffer->pUartBuff + pRxBuffer->UartBuffSize - pRxBuffer->pOutPos ; + uint16_t len_tmp = 0; + len_tmp = ((data_len > buf_len) ? buf_len : data_len); + + if (pRxBuffer->pOutPos <= pRxBuffer->pInPos) { + os_memcpy(pdata, pRxBuffer->pOutPos, len_tmp); + pRxBuffer->pOutPos += len_tmp; + pRxBuffer->Space += len_tmp; + } else { + if (len_tmp > tail_len) { + os_memcpy(pdata, pRxBuffer->pOutPos, tail_len); + pRxBuffer->pOutPos += tail_len; + pRxBuffer->pOutPos = (pRxBuffer->pUartBuff + (pRxBuffer->pOutPos - pRxBuffer->pUartBuff) % pRxBuffer->UartBuffSize); + pRxBuffer->Space += tail_len; + + os_memcpy(pdata + tail_len, pRxBuffer->pOutPos, len_tmp - tail_len); + pRxBuffer->pOutPos += (len_tmp - tail_len); + pRxBuffer->pOutPos = (pRxBuffer->pUartBuff + (pRxBuffer->pOutPos - pRxBuffer->pUartBuff) % pRxBuffer->UartBuffSize); + pRxBuffer->Space += (len_tmp - tail_len); + } else { + //os_printf("case 3 in rx deq\n\r"); + os_memcpy(pdata, pRxBuffer->pOutPos, len_tmp); + pRxBuffer->pOutPos += len_tmp; + pRxBuffer->pOutPos = (pRxBuffer->pUartBuff + (pRxBuffer->pOutPos - pRxBuffer->pUartBuff) % pRxBuffer->UartBuffSize); + pRxBuffer->Space += len_tmp; + } + } + + if (pRxBuffer->Space >= UART_FIFO_LEN) { + uart_rx_intr_enable(UART0); + } + + return len_tmp; +} + + +//move data from uart fifo to rx buffer +void Uart_rx_buff_enq() +{ + uint8_t fifo_len, buf_idx; + uint8_t fifo_data; +#if 1 + fifo_len = (READ_PERI_REG(UART_STATUS(UART0)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; + + if (fifo_len >= pRxBuffer->Space) { + os_printf("buf full!!!\n\r"); + } else { + buf_idx = 0; + + while (buf_idx < fifo_len) { + buf_idx++; + fifo_data = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; + *(pRxBuffer->pInPos++) = fifo_data; + + if (pRxBuffer->pInPos == (pRxBuffer->pUartBuff + pRxBuffer->UartBuffSize)) { + pRxBuffer->pInPos = pRxBuffer->pUartBuff; + } + } + + pRxBuffer->Space -= fifo_len ; + + if (pRxBuffer->Space >= UART_FIFO_LEN) { + //os_printf("after rx enq buf enough\n\r"); + uart_rx_intr_enable(UART0); + } + } + +#endif +} + + +//fill the uart tx buffer +void ICACHE_FLASH_ATTR +tx_buff_enq(char *pdata, uint16_t data_len) +{ + CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); + + if (pTxBuffer == NULL) { + DBG1("\n\rnull, create buffer struct\n\r"); + pTxBuffer = Uart_Buf_Init(UART_TX_BUFFER_SIZE); + + if (pTxBuffer != NULL) { + Uart_Buf_Cpy(pTxBuffer, pdata, data_len); + } else { + DBG1("uart tx MALLOC no buf \n\r"); + } + } else { + if (data_len <= pTxBuffer->Space) { + Uart_Buf_Cpy(pTxBuffer, pdata, data_len); + } else { + DBG1("UART TX BUF FULL!!!!\n\r"); + } + } + +#if 0 + + if (pTxBuffer->Space <= URAT_TX_LOWER_SIZE) { + set_tcp_block(); + } + +#endif + SET_PERI_REG_MASK(UART_CONF1(UART0), (UART_TX_EMPTY_THRESH_VAL & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S); + SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); +} + + + +//-------------------------------- +LOCAL void tx_fifo_insert(struct UartBuffer *pTxBuff, uint8_t data_len, uint8_t uart_no) +{ + uint8_t i; + + for (i = 0; i < data_len; i++) { + WRITE_PERI_REG(UART_FIFO(uart_no), *(pTxBuff->pOutPos++)); + + if (pTxBuff->pOutPos == (pTxBuff->pUartBuff + pTxBuff->UartBuffSize)) { + pTxBuff->pOutPos = pTxBuff->pUartBuff; + } + } + + pTxBuff->pOutPos = (pTxBuff->pUartBuff + (pTxBuff->pOutPos - pTxBuff->pUartBuff) % pTxBuff->UartBuffSize); + pTxBuff->Space += data_len; +} + + +/****************************************************************************** + * FunctionName : tx_start_uart_buffer + * Description : get data from the tx buffer and fill the uart tx fifo, co-work with the uart fifo empty interrupt + * Parameters : uint8_t uart_no - uart port num + * Returns : NONE +*******************************************************************************/ +void tx_start_uart_buffer(uint8_t uart_no) +{ + uint8_t tx_fifo_len = (READ_PERI_REG(UART_STATUS(uart_no)) >> UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT; + uint8_t fifo_remain = UART_FIFO_LEN - tx_fifo_len ; + uint8_t len_tmp; + uint16_t tail_ptx_len, head_ptx_len, data_len; + //struct UartBuffer* pTxBuff = *get_buff_prt(); + + if (pTxBuffer) { + data_len = (pTxBuffer->UartBuffSize - pTxBuffer->Space); + + if (data_len > fifo_remain) { + len_tmp = fifo_remain; + tx_fifo_insert(pTxBuffer, len_tmp, uart_no); + SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); + } else { + len_tmp = data_len; + tx_fifo_insert(pTxBuffer, len_tmp, uart_no); + } + } else { + DBG1("pTxBuff null \n\r"); + } +} + +#endif + + +void uart_rx_intr_disable(uint8_t uart_no) +{ +#if 1 + CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_TOUT_INT_ENA); +#else + ETS_UART_INTR_DISABLE(); +#endif +} + +void uart_rx_intr_enable(uint8_t uart_no) +{ +#if 1 + SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_TOUT_INT_ENA); +#else + ETS_UART_INTR_ENABLE(); +#endif +} + + +//======================================================== +LOCAL void +uart0_write_char(char c) +{ + if (c == '\n') { + uart_tx_one_char(UART0, '\r'); + uart_tx_one_char(UART0, '\n'); + } else if (c == '\r') { + } else { + uart_tx_one_char(UART0, c); + } +} + +void ICACHE_FLASH_ATTR +UART_SetWordLength(uint8_t uart_no, UartBitsNum4Char len) +{ + SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_BIT_NUM, len, UART_BIT_NUM_S); +} + +void ICACHE_FLASH_ATTR +UART_SetStopBits(uint8_t uart_no, UartStopBitsNum bit_num) +{ + SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_STOP_BIT_NUM, bit_num, UART_STOP_BIT_NUM_S); +} + +void ICACHE_FLASH_ATTR +UART_SetLineInverse(uint8_t uart_no, UART_LineLevelInverse inverse_mask) +{ + CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_LINE_INV_MASK); + SET_PERI_REG_MASK(UART_CONF0(uart_no), inverse_mask); +} + +void ICACHE_FLASH_ATTR +UART_SetParity(uint8_t uart_no, UartParityMode Parity_mode) +{ + CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_PARITY | UART_PARITY_EN); + + if (Parity_mode == NONE_BITS) { + } else { + SET_PERI_REG_MASK(UART_CONF0(uart_no), Parity_mode | UART_PARITY_EN); + } +} + +void ICACHE_FLASH_ATTR +UART_SetBaudrate(uint8_t uart_no, uint32_t baud_rate) +{ + uart_div_modify(uart_no, UART_CLK_FREQ / baud_rate); +} + +void ICACHE_FLASH_ATTR +UART_SetFlowCtrl(uint8_t uart_no, UART_HwFlowCtrl flow_ctrl, uint8_t rx_thresh) +{ + if (flow_ctrl & USART_HardwareFlowControl_RTS) { + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); + SET_PERI_REG_BITS(UART_CONF1(uart_no), UART_RX_FLOW_THRHD, rx_thresh, UART_RX_FLOW_THRHD_S); + SET_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); + } else { + CLEAR_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); + } + + if (flow_ctrl & USART_HardwareFlowControl_CTS) { + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_UART0_CTS); + SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN); + } else { + CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN); + } +} + +void ICACHE_FLASH_ATTR +UART_WaitTxFifoEmpty(uint8_t uart_no, uint32_t time_out_us) //do not use if tx flow control enabled +{ + uint32_t t_s = system_get_time(); + + while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S)) { + + if ((system_get_time() - t_s) > time_out_us) { + break; + } + + WRITE_PERI_REG(0X60000914, 0X73);//WTD + + } +} + + +bool ICACHE_FLASH_ATTR +UART_CheckOutputFinished(uint8_t uart_no, uint32_t time_out_us) +{ + uint32_t t_start = system_get_time(); + uint8_t tx_fifo_len; + uint32_t tx_buff_len; + + while (1) { + tx_fifo_len = ((READ_PERI_REG(UART_STATUS(uart_no)) >> UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT); + + if (pTxBuffer) { + tx_buff_len = ((pTxBuffer->UartBuffSize) - (pTxBuffer->Space)); + } else { + tx_buff_len = 0; + } + + if (tx_fifo_len == 0 && tx_buff_len == 0) { + return TRUE; + } + + if (system_get_time() - t_start > time_out_us) { + return FALSE; + } + + WRITE_PERI_REG(0X60000914, 0X73);//WTD + } +} + + +void ICACHE_FLASH_ATTR +UART_ResetFifo(uint8_t uart_no) +{ + SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); + CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); +} + +void ICACHE_FLASH_ATTR +UART_ClearIntrStatus(uint8_t uart_no, uint32_t clr_mask) +{ + WRITE_PERI_REG(UART_INT_CLR(uart_no), clr_mask); +} + +void ICACHE_FLASH_ATTR +UART_SetIntrEna(uint8_t uart_no, uint32_t ena_mask) +{ + SET_PERI_REG_MASK(UART_INT_ENA(uart_no), ena_mask); +} + + +void ICACHE_FLASH_ATTR +UART_SetPrintPort(uint8_t uart_no) +{ + if (uart_no == 1) { + os_install_putc1(uart1_write_char); + } else { + /*option 1: do not wait if uart fifo is full,drop current character*/ + os_install_putc1(uart0_write_char_no_wait); + /*option 2: wait for a while if uart fifo is full*/ + os_install_putc1(uart0_write_char); + } +} + + +//======================================================== + + +/*test code*/ +void ICACHE_FLASH_ATTR +uart_init_2(UartBautRate uart0_br, UartBautRate uart1_br) +{ + // rom use 74880 baut_rate, here reinitialize + UartDev.baut_rate = uart0_br; + UartDev.exist_parity = STICK_PARITY_EN; + UartDev.parity = EVEN_BITS; + UartDev.stop_bits = ONE_STOP_BIT; + UartDev.data_bits = EIGHT_BITS; + + uart_config(UART0); + UartDev.baut_rate = uart1_br; + uart_config(UART1); + ETS_UART_INTR_ENABLE(); + + // install uart1 putc callback + os_install_putc1((void *)uart1_write_char);//print output at UART1 +} + + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/gpio16.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/gpio16.h new file mode 100644 index 0000000..34d0586 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/gpio16.h @@ -0,0 +1,33 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __GPIO16_H__ +#define __GPIO16_H__ +#include "ets_sys.h" +void gpio16_output_conf(void); +void gpio16_output_set(uint8_t value); +void gpio16_input_conf(void); +uint8_t gpio16_input_get(void); + +#endif diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/hw_timer.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/hw_timer.h new file mode 100644 index 0000000..71af723 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/hw_timer.h @@ -0,0 +1,51 @@ + +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +#include "ets_sys.h" +#ifndef __hw_timer_H__ +#define __hw_timer_H__ +//TIMER PREDIVED MODE +typedef enum { + DIVDED_BY_1 = 0, //timer clock + DIVDED_BY_16 = 4, //divided by 16 + DIVDED_BY_256 = 8, //divided by 256 +} time_predived_mode; + +typedef enum { //timer interrupt mode + TM_LEVEL_INT = 1, // level interrupt + TM_EDGE_INT = 0, //edge interrupt +} time_int_mode; + +typedef enum { + FRC1_SOURCE = 0, + NMI_SOURCE = 1, +} frc1_timer_source_type; + + +void hw_timer_init(frc1_timer_source_type source_type, uint8_t req); + +void hw_timer_set_func(void (* user_hw_timer_cb_set)(void)) ; +void hw_timer_arm(uint32_t val) ; + +#endif diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/i2c_master.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/i2c_master.h new file mode 100644 index 0000000..856971f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/i2c_master.h @@ -0,0 +1,82 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __I2C_MASTER_H__ +#define __I2C_MASTER_H__ + +#include "ets_sys.h" +#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U +#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_MTMS_U +#define I2C_MASTER_SDA_GPIO 2 +#define I2C_MASTER_SCL_GPIO 14 +#define I2C_MASTER_SDA_FUNC FUNC_GPIO2 +#define I2C_MASTER_SCL_FUNC FUNC_GPIO14 + +//#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U +//#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO0_U +//#define I2C_MASTER_SDA_GPIO 2 +//#define I2C_MASTER_SCL_GPIO 0 +//#define I2C_MASTER_SDA_FUNC FUNC_GPIO2 +//#define I2C_MASTER_SCL_FUNC FUNC_GPIO0 + +#if 0 +#define I2C_MASTER_GPIO_SET(pin) \ + gpio_output_set(1< + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __KEY_H__ +#define __KEY_H__ +#include "ets_sys.h" +#include "gpio.h" +#include "os_type.h" +typedef void (* key_function)(void); + +struct single_key_param { + uint8_t key_level; + uint8_t gpio_id; + uint8_t gpio_func; + uint32_t gpio_name; + os_timer_t key_5s; + os_timer_t key_50ms; + key_function short_press; + key_function long_press; +}; + +struct keys_param { + uint8_t key_num; + struct single_key_param **single_key; +}; + +struct single_key_param *key_init_single(uint8_t gpio_id, uint32_t gpio_name, uint8_t gpio_func, key_function long_press, key_function short_press); +void key_init(struct keys_param *key); + +#endif diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/sdio_slv.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/sdio_slv.h new file mode 100644 index 0000000..1518360 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/sdio_slv.h @@ -0,0 +1,42 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __SDIO_SLAVE_H__ +#define __SDIO_SLAVE_H__ +#include "ets_sys.h" +#include "c_types.h" + +#include "user_interface.h" + +#define RX_AVAILIBLE 2 +#define TX_AVAILIBLE 1 +#define INIT_STAGE 0 + +void sdio_slave_init(void); + +int32_t sdio_load_data(const uint8_t *data, uint32_t len); +typedef void (*sdio_recv_data_callback_t)(uint8_t *data, uint32_t len); + +bool sdio_register_recv_cb(sdio_recv_data_callback_t cb); +#endif diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/slc_register.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/slc_register.h new file mode 100644 index 0000000..7f292d6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/slc_register.h @@ -0,0 +1,300 @@ +//Generated at 2012-10-23 19:55:03 +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + + +#ifndef SLC_REGISTER_H_ +#define SLC_REGISTER_H_ + +#define REG_SLC_BASE 0x60000B00 +//version value:32'h091700 + +#define SLC_CONF0 (REG_SLC_BASE + 0x0) +#ifndef ESP_MAC_5 +#define SLC_MODE 0x00000003 +#define SLC_MODE_S 12 +#endif +#define SLC_DATA_BURST_EN (BIT(9)) +#define SLC_DSCR_BURST_EN (BIT(8)) +#define SLC_RX_NO_RESTART_CLR (BIT(7)) +#define SLC_RX_AUTO_WRBACK (BIT(6)) +#define SLC_RX_LOOP_TEST (BIT(5)) +#define SLC_TX_LOOP_TEST (BIT(4)) +#define SLC_AHBM_RST (BIT(3)) +#define SLC_AHBM_FIFO_RST (BIT(2)) +#define SLC_RXLINK_RST (BIT(1)) +#define SLC_TXLINK_RST (BIT(0)) + +#define SLC_INT_RAW (REG_SLC_BASE + 0x4) +#define SLC_TX_DSCR_EMPTY_INT_RAW (BIT(21)) +#define SLC_RX_DSCR_ERR_INT_RAW (BIT(20)) +#define SLC_TX_DSCR_ERR_INT_RAW (BIT(19)) +#define SLC_TOHOST_INT_RAW (BIT(18)) +#define SLC_RX_EOF_INT_RAW (BIT(17)) +#define SLC_RX_DONE_INT_RAW (BIT(16)) +#define SLC_TX_EOF_INT_RAW (BIT(15)) +#define SLC_TX_DONE_INT_RAW (BIT(14)) +#define SLC_TOKEN1_1TO0_INT_RAW (BIT(13)) +#define SLC_TOKEN0_1TO0_INT_RAW (BIT(12)) +#define SLC_TX_OVF_INT_RAW (BIT(11)) +#define SLC_RX_UDF_INT_RAW (BIT(10)) +#define SLC_TX_START_INT_RAW (BIT(9)) +#define SLC_RX_START_INT_RAW (BIT(8)) +#define SLC_FRHOST_BIT7_INT_RAW (BIT(7)) +#define SLC_FRHOST_BIT6_INT_RAW (BIT(6)) +#define SLC_FRHOST_BIT5_INT_RAW (BIT(5)) +#define SLC_FRHOST_BIT4_INT_RAW (BIT(4)) +#define SLC_FRHOST_BIT3_INT_RAW (BIT(3)) +#define SLC_FRHOST_BIT2_INT_RAW (BIT(2)) +#define SLC_FRHOST_BIT1_INT_RAW (BIT(1)) +#define SLC_FRHOST_BIT0_INT_RAW (BIT(0)) + +#define SLC_INT_STATUS (REG_SLC_BASE + 0x8) +#define SLC_TX_DSCR_EMPTY_INT_ST (BIT(21)) +#define SLC_RX_DSCR_ERR_INT_ST (BIT(20)) +#define SLC_TX_DSCR_ERR_INT_ST (BIT(19)) +#define SLC_TOHOST_INT_ST (BIT(18)) +#define SLC_RX_EOF_INT_ST (BIT(17)) +#define SLC_RX_DONE_INT_ST (BIT(16)) +#define SLC_TX_EOF_INT_ST (BIT(15)) +#define SLC_TX_DONE_INT_ST (BIT(14)) +#define SLC_TOKEN1_1TO0_INT_ST (BIT(13)) +#define SLC_TOKEN0_1TO0_INT_ST (BIT(12)) +#define SLC_TX_OVF_INT_ST (BIT(11)) +#define SLC_RX_UDF_INT_ST (BIT(10)) +#define SLC_TX_START_INT_ST (BIT(9)) +#define SLC_RX_START_INT_ST (BIT(8)) +#define SLC_FRHOST_BIT7_INT_ST (BIT(7)) +#define SLC_FRHOST_BIT6_INT_ST (BIT(6)) +#define SLC_FRHOST_BIT5_INT_ST (BIT(5)) +#define SLC_FRHOST_BIT4_INT_ST (BIT(4)) +#define SLC_FRHOST_BIT3_INT_ST (BIT(3)) +#define SLC_FRHOST_BIT2_INT_ST (BIT(2)) +#define SLC_FRHOST_BIT1_INT_ST (BIT(1)) +#define SLC_FRHOST_BIT0_INT_ST (BIT(0)) + +#define SLC_INT_ENA (REG_SLC_BASE + 0xC) +#define SLC_TX_DSCR_EMPTY_INT_ENA (BIT(21)) +#define SLC_RX_DSCR_ERR_INT_ENA (BIT(20)) +#define SLC_TX_DSCR_ERR_INT_ENA (BIT(19)) +#define SLC_TOHOST_INT_ENA (BIT(18)) +#define SLC_RX_EOF_INT_ENA (BIT(17)) +#define SLC_RX_DONE_INT_ENA (BIT(16)) +#define SLC_TX_EOF_INT_ENA (BIT(15)) +#define SLC_TX_DONE_INT_ENA (BIT(14)) +#define SLC_TOKEN1_1TO0_INT_ENA (BIT(13)) +#define SLC_TOKEN0_1TO0_INT_ENA (BIT(12)) +#define SLC_TX_OVF_INT_ENA (BIT(11)) +#define SLC_RX_UDF_INT_ENA (BIT(10)) +#define SLC_TX_START_INT_ENA (BIT(9)) +#define SLC_RX_START_INT_ENA (BIT(8)) +#define SLC_FRHOST_BIT7_INT_ENA (BIT(7)) +#define SLC_FRHOST_BIT6_INT_ENA (BIT(6)) +#define SLC_FRHOST_BIT5_INT_ENA (BIT(5)) +#define SLC_FRHOST_BIT4_INT_ENA (BIT(4)) +#define SLC_FRHOST_BIT3_INT_ENA (BIT(3)) +#define SLC_FRHOST_BIT2_INT_ENA (BIT(2)) +#define SLC_FRHOST_BIT1_INT_ENA (BIT(1)) +#define SLC_FRHOST_BIT0_INT_ENA (BIT(0)) + +#define SLC_FRHOST_BIT_INT_ENA_ALL 0xff + +#define SLC_INT_CLR (REG_SLC_BASE + 0x10) +#define SLC_TX_DSCR_EMPTY_INT_CLR (BIT(21)) +#define SLC_RX_DSCR_ERR_INT_CLR (BIT(20)) +#define SLC_TX_DSCR_ERR_INT_CLR (BIT(19)) +#define SLC_TOHOST_INT_CLR (BIT(18)) +#define SLC_RX_EOF_INT_CLR (BIT(17)) +#define SLC_RX_DONE_INT_CLR (BIT(16)) +#define SLC_TX_EOF_INT_CLR (BIT(15)) +#define SLC_TX_DONE_INT_CLR (BIT(14)) +#define SLC_TOKEN1_1TO0_INT_CLR (BIT(13)) +#define SLC_TOKEN0_1TO0_INT_CLR (BIT(12)) +#define SLC_TX_OVF_INT_CLR (BIT(11)) +#define SLC_RX_UDF_INT_CLR (BIT(10)) +#define SLC_TX_START_INT_CLR (BIT(9)) +#define SLC_RX_START_INT_CLR (BIT(8)) +#define SLC_FRHOST_BIT7_INT_CLR (BIT(7)) +#define SLC_FRHOST_BIT6_INT_CLR (BIT(6)) +#define SLC_FRHOST_BIT5_INT_CLR (BIT(5)) +#define SLC_FRHOST_BIT4_INT_CLR (BIT(4)) +#define SLC_FRHOST_BIT3_INT_CLR (BIT(3)) +#define SLC_FRHOST_BIT2_INT_CLR (BIT(2)) +#define SLC_FRHOST_BIT1_INT_CLR (BIT(1)) +#define SLC_FRHOST_BIT0_INT_CLR (BIT(0)) + +#define SLC_RX_STATUS (REG_SLC_BASE + 0x14) +#define SLC_RX_EMPTY (BIT(1)) +#define SLC_RX_FULL (BIT(0)) + +#define SLC_RX_FIFO_PUSH (REG_SLC_BASE + 0x18) +#define SLC_RXFIFO_PUSH (BIT(16)) +#define SLC_RXFIFO_WDATA 0x000001FF +#define SLC_RXFIFO_WDATA_S 0 + +#define SLC_TX_STATUS (REG_SLC_BASE + 0x1C) +#define SLC_TX_EMPTY (BIT(1)) +#define SLC_TX_FULL (BIT(0)) + +#define SLC_TX_FIFO_POP (REG_SLC_BASE + 0x20) +#define SLC_TXFIFO_POP (BIT(16)) +#define SLC_TXFIFO_RDATA 0x000007FF +#define SLC_TXFIFO_RDATA_S 0 + +#define SLC_RX_LINK (REG_SLC_BASE + 0x24) +#define SLC_RXLINK_PARK (BIT(31)) +#define SLC_RXLINK_RESTART (BIT(30)) +#define SLC_RXLINK_START (BIT(29)) +#define SLC_RXLINK_STOP (BIT(28)) +#define SLC_RXLINK_DESCADDR_MASK 0x000FFFFF +#define SLC_RXLINK_ADDR_S 0 + +#define SLC_TX_LINK (REG_SLC_BASE + 0x28) +#define SLC_TXLINK_PARK (BIT(31)) +#define SLC_TXLINK_RESTART (BIT(30)) +#define SLC_TXLINK_START (BIT(29)) +#define SLC_TXLINK_STOP (BIT(28)) +#define SLC_TXLINK_DESCADDR_MASK 0x000FFFFF +#define SLC_TXLINK_ADDR_S 0 + +#define SLC_INTVEC_TOHOST (REG_SLC_BASE + 0x2C) +#define SLC_TOHOST_INTVEC 0x000000FF +#define SLC_TOHOST_INTVEC_S 0 + +#define SLC_TOKEN0 (REG_SLC_BASE + 0x30) +#define SLC_TOKEN0_MASK 0x00000FFF +#define SLC_TOKEN0_S 16 +#define SLC_TOKEN0_LOCAL_INC_MORE (BIT(14)) +#define SLC_TOKEN0_LOCAL_INC (BIT(13)) +#define SLC_TOKEN0_LOCAL_WR (BIT(12)) +#define SLC_TOKEN0_LOCAL_WDATA_MASK 0x00000FFF +#define SLC_TOKEN0_LOCAL_WDATA_S 0 + +#define SLC_TOKEN1 (REG_SLC_BASE + 0x34) +#define SLC_TOKEN1_MASK 0x00000FFF +#define SLC_TOKEN1_S 16 +#define SLC_TOKEN1_LOCAL_INC_MORE (BIT(14)) +#define SLC_TOKEN1_LOCAL_INC (BIT(13)) +#define SLC_TOKEN1_LOCAL_WR (BIT(12)) +#define SLC_TOKEN1_LOCAL_WDATA 0x00000FFF +#define SLC_TOKEN1_LOCAL_WDATA_S 0 + +#define SLC_CONF1 (REG_SLC_BASE + 0x38) +#define SLC_STATE0 (REG_SLC_BASE + 0x3C) +#define SLC_STATE1 (REG_SLC_BASE + 0x40) + +#define SLC_BRIDGE_CONF (REG_SLC_BASE + 0x44) +#ifndef ESP_MAC_5 +#define SLC_TX_PUSH_IDLE_NUM 0x0000FFFF +#define SLC_TX_PUSH_IDLE_NUM_S 16 +#define SLC_TX_DUMMY_MODE (BIT(12)) +#endif +#define SLC_FIFO_MAP_ENA 0x0000000F +#define SLC_FIFO_MAP_ENA_S 8 +#define SLC_TXEOF_ENA 0x0000003F +#define SLC_TXEOF_ENA_S 0 + +#define SLC_RX_EOF_DES_ADDR (REG_SLC_BASE + 0x48) +#define SLC_TX_EOF_DES_ADDR (REG_SLC_BASE + 0x4C) +#define SLC_FROM_HOST_LAST_DESC SLC_TX_EOF_DES_ADDR +#define SLC_TO_HOST_LAST_DESC SLC_RX_EOF_DES_ADDR + +#define SLC_RX_EOF_BFR_DES_ADDR (REG_SLC_BASE + 0x50) +#define SLC_AHB_TEST (REG_SLC_BASE + 0x54) +#define SLC_AHB_TESTADDR 0x00000003 +#define SLC_AHB_TESTADDR_S 4 +#define SLC_AHB_TESTMODE 0x00000007 +#define SLC_AHB_TESTMODE_S 0 + +#define SLC_SDIO_ST (REG_SLC_BASE + 0x58) +#define SLC_BUS_ST 0x00000007 +#define SLC_BUS_ST_S 12 +#define SLC_SDIO_WAKEUP (BIT(8)) +#define SLC_FUNC_ST 0x0000000F +#define SLC_FUNC_ST_S 4 +#define SLC_CMD_ST 0x00000007 +#define SLC_CMD_ST_S 0 + +#define SLC_RX_DSCR_CONF (REG_SLC_BASE + 0x5C) +#ifdef ESP_MAC_5 +#define SLC_INFOR_NO_REPLACE (BIT(9)) +#define SLC_TOKEN_NO_REPLACE (BIT(8)) +#define SLC_POP_IDLE_CNT 0x000000FF +#else +#define SLC_RX_FILL_EN (BIT(20)) +#define SLC_RX_EOF_MODE (BIT(19)) +#define SLC_RX_FILL_MODE (BIT(18)) +#define SLC_INFOR_NO_REPLACE (BIT(17)) +#define SLC_TOKEN_NO_REPLACE (BIT(16)) // +#define SLC_POP_IDLE_CNT 0x0000FFFF +#endif +#define SLC_POP_IDLE_CNT_S 0 + +#define SLC_TXLINK_DSCR (REG_SLC_BASE + 0x60) +#define SLC_TXLINK_DSCR_BF0 (REG_SLC_BASE + 0x64) +#define SLC_TXLINK_DSCR_BF1 (REG_SLC_BASE + 0x68) +#define SLC_RXLINK_DSCR (REG_SLC_BASE + 0x6C) +#define SLC_RXLINK_DSCR_BF0 (REG_SLC_BASE + 0x70) +#define SLC_RXLINK_DSCR_BF1 (REG_SLC_BASE + 0x74) +#define SLC_DATE (REG_SLC_BASE + 0x78) +#define SLC_ID (REG_SLC_BASE + 0x7C) + +#define SLC_HOST_CONF_W0 (REG_SLC_BASE + 0x80 + 0x14) +#define SLC_HOST_CONF_W1 (REG_SLC_BASE + 0x80 + 0x18) +#define SLC_HOST_CONF_W2 (REG_SLC_BASE + 0x80 + 0x20) +#define SLC_HOST_CONF_W3 (REG_SLC_BASE + 0x80 + 0x24) +#define SLC_HOST_CONF_W4 (REG_SLC_BASE + 0x80 + 0x28) + +#define SLC_HOST_INTR_ST (REG_SLC_BASE + 0x80 + 0x1c) +#define SLC_HOST_INTR_CLR (REG_SLC_BASE + 0x80 + 0x30) +#define SLC_HOST_INTR_SOF_BIT (BIT(12)) + +#define SLC_HOST_INTR_ENA (REG_SLC_BASE + 0x80 + 0x34) +#define SLC_RX_NEW_PACKET_INT_ENA (BIT23) +#define SLC_HOST_TOHOST_BIT0_INT_ENA (BIT0) +#define SLC_HOST_CONF_W5 (REG_SLC_BASE + 0x80 + 0x3C) +#define SLC_HOST_INTR_RAW (REG_SLC_BASE + 0x80 + 0x8) +#define SLC_HOST_INTR_ENA_BIT (BIT(23)) +//[15:12]: 0x3ff9xxxx -- 0b01 from_host +// 0x3ffaxxxx -- 0b10 general +// 0x3ffbxxxx -- 0b11 to_host +#define SLC_DATA_ADDR_CLEAR_MASK (~(0xf<<12)) +#define SLC_FROM_HOST_ADDR_MASK (0x1<<12) +#define SLC_TO_HOST_ADDR_MASK (0x3<<12) + +#define SLC_SET_FROM_HOST_ADDR_MASK(v) do { \ + (v) &= SLC_DATA_ADDR_CLEAR_MASK; \ + (v) |= SLC_FROM_HOST_ADDR_MASK; \ + } while(0); + +#define SLC_SET_TO_HOST_ADDR_MASK(v) do { \ + (v) &= SLC_DATA_ADDR_CLEAR_MASK; \ + (v) |= SLC_TO_HOST_ADDR_MASK; \ + } while(0); + + +#define SLC_TX_DESC_DEBUG_REG 0x3ff0002c //[15:0] set to 0xcccc + + +#endif // SLC_REGISTER_H_INCLUDED diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi.h new file mode 100644 index 0000000..3e538ec --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi.h @@ -0,0 +1,74 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef SPI_APP_H +#define SPI_APP_H + +#include "spi_register.h" +#include "ets_sys.h" +#include "osapi.h" +#include "uart.h" +#include "os_type.h" +#include "spi_flash.h" + +#define SPI_FLASH_BYTES_LEN 24 +#define IODATA_START_ADDR BIT0 +#define SPI_BUFF_BYTE_NUM 32 + +/*SPI number define*/ +#define SPI 0 +#define HSPI 1 + +void cache_flush(void); +//spi master init funtion +void spi_master_init(uint8_t spi_no); + +//lcd drive function +void spi_lcd_9bit_write(uint8_t spi_no, uint8_t high_bit, uint8_t low_8bit); +//use spi send 8bit data +void spi_mast_byte_write(uint8_t spi_no, uint8_t data); + +//transmit data to esp8266 slave buffer,which needs 16bit transmission , +//first byte is master command 0x04, second byte is master data +void spi_byte_write_espslave(uint8_t spi_no, uint8_t data); +//read data from esp8266 slave buffer,which needs 16bit transmission , +//first byte is master command 0x06, second byte is to read slave data +void spi_byte_read_espslave(uint8_t spi_no, uint8_t *data); + +//esp8266 slave mode initial +void spi_slave_init(uint8_t spi_no, uint8_t data_len); +//esp8266 slave isr handle funtion,tiggered when any transmission is finished. +//the function is registered in spi_slave_init. +void spi_slave_isr_handler(void *para); + + +//hspi test function, used to test esp8266 spi slave +void hspi_master_readwrite_repeat(void); + + +void spi_test_init(void); + + +#endif + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_interface.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_interface.h new file mode 100644 index 0000000..04005e5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_interface.h @@ -0,0 +1,343 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/** + * @file spi_interface.h + * @brief Defines and Macros for the SPI. + */ +#ifndef __SPI_INTERFACE_H__ +#define __SPI_INTERFACE_H__ + +#include "driver/spi_register.h" +#include "c_types.h" + +//***************************************************************************** +// +// Make sure all of the definitions in this header have a C binding. +// +//***************************************************************************** + +#ifdef __cplusplus +extern "C" +{ +#endif + + +/** + * @brief Defines slave commands. Default value based on slave ESP8266. + */ +#define MASTER_WRITE_DATA_TO_SLAVE_CMD 2 +#define MASTER_READ_DATA_FROM_SLAVE_CMD 3 + +#define MASTER_WRITE_STATUS_TO_SLAVE_CMD 1 +#define MASTER_READ_STATUS_FROM_SLAVE_CMD 4 + +/** + * @brief Support HSPI and SPI module. + * + */ +typedef enum { + SpiNum_SPI = 0, + SpiNum_HSPI = 1, +} SpiNum; + +/** + * @brief The SPI module can work in either master or slave mode. + * + */ +typedef enum { + SpiMode_Master = 0, + SpiMode_Slave = 1, +} SpiMode; + +/** + * @brief SPI sub mode + * + * Support 4 sub modes based on SPI clock polarity and phase. + * SPI_CPOL SPI_CPHA SubMode + * 0 0 0 + * 0 1 1 + * 1 0 2 + * 1 1 3 + */ +typedef enum { + SpiSubMode_0 = 0, + SpiSubMode_1 = 1, + SpiSubMode_2 = 2, + SpiSubMode_3 = 3, +} SpiSubMode; + +/** + * @brief The SPI module working speed. + * + * @attention Max speed 80MHz + * + */ +typedef enum { + SpiSpeed_0_5MHz = 160, + SpiSpeed_1MHz = 80, + SpiSpeed_2MHz = 40, + SpiSpeed_5MHz = 16, + SpiSpeed_8MHz = 10, + SpiSpeed_10MHz = 8, + +} SpiSpeed; + +/** + * @brief The SPI mode working speed. + * + */ +typedef enum { + SpiBitOrder_MSBFirst = 0, + SpiBitOrder_LSBFirst = 1, +} SpiBitOrder; + +// @brief SPI interrupt soource defined. +typedef enum { + SpiIntSrc_TransDone = SPI_TRANS_DONE, + SpiIntSrc_WrStaDone = SPI_SLV_WR_STA_DONE, + SpiIntSrc_RdStaDone = SPI_SLV_RD_STA_DONE, + SpiIntSrc_WrBufDone = SPI_SLV_WR_BUF_DONE, + SpiIntSrc_RdBufDone = SPI_SLV_RD_BUF_DONE, +} SpiIntSrc; + +// @brief SPI CS pin. +typedef enum { + SpiPinCS_0 = 1, + SpiPinCS_1 = 2, + SpiPinCS_2 = 4, +} SpiPinCS; + +#pragma pack (1) + +/** + * @brief SPI attribute + */ +typedef struct { + SpiMode mode; ///< Master or slave mode + SpiSubMode subMode; ///< SPI SPI_CPOL SPI_CPHA mode + SpiSpeed speed; ///< SPI Clock + SpiBitOrder bitOrder; ///< SPI bit order +} SpiAttr; + +/** + * @brief SPI data package + */ +typedef struct { + uint16_t cmd; ///< Command value + uint8_t cmdLen; ///< Command byte length + uint32_t *addr; ///< Point to address value + uint8_t addrLen; ///< Address byte length + uint32_t *data; ///< Point to data buffer + uint8_t dataLen; ///< Data byte length. +} SpiData; + + +/** + * @brief SPI interrupt information + */ +typedef struct { + SpiIntSrc src; ///< Interrupt source + void *isrFunc; ///< SPI interrupt callback function. + +} SpiIntInfo; + +#pragma upack (1) + +/** + * @brief Initialize SPI module. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] pAttr + * Pointer to a struct SpiAttr that indicates SPI working attribution. + * + * @return void. + */ +void SPIInit(SpiNum spiNum, SpiAttr *pAttr); + +/** + * @brief Set slave address value by master. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] addr + * Slave address to be set. + * + * @return void. + */ +void SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr); + +/** + * @brief Set command value by master. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] cmd + * Command will be send to slave. + * + * @return void. + */ +void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd); + +/** + * @brief Send data to slave from master. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] pInData + * Pointer to a strcuture that will be send. + * + * @return int32_t, -1:indicates failure,others indicates success. + */ +int32_t SPIMasterSendData(SpiNum spiNum, SpiData *pInData); + +/** + * @brief Receive data from slave by master. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] pOutData + * Point to data buffer. + * + * @return int32_t, -1:indicates failure,others indicates success. + * + */ +int32_t SPIMasterRecvData(SpiNum spiNum, SpiData *pOutData); + +/** + * @brief Load data to slave send buffer. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] pInData + * Point to data buffer. + * @param [in] inLen + * The number of bytes to be set. + * + * @return int32_t, -1:indicates failure,others indicates success. + */ +int32_t SPISlaveSendData(SpiNum spiNum, uint32_t *pInData, uint8_t inLen); + +/** + * @brief Receive data by slave. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] isrFunc + * isrFunc is a pointer to the function to be called when the SPI interrupt occurs. + * + * @return int32_t, -1:indicates failure,others indicates success. + */ +int32_t SPISlaveRecvData(SpiNum spiNum); + +/** + * @brief Set slave status by master. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] data + * Data will be write to slave SPI_WR_STATUS. + * + * @return void. + * + * @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS. + */ +void SPIMasterSendStatus(SpiNum spiNum, uint8_t data); + +/** + * @brief Get salve status by master. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * + * @return int32_t, -1: indicates failure; other value in slave status. + * + * @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS. + */ +int32_t SPIMasterRecvStatus(SpiNum spiNum); + +/** + * @brief Select SPI CS pin. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] pinCs + * Indicates which SPI pin to choose. + * + * @return void. + */ +void SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs); + +/** + * @brief Set SPI module interrupt source and callback function. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] pIntInfo + * Pointer to a struct SpiIntInfo that indicates SPI interrupt information. + * + * @return void. + */ +void SPIIntCfg(SpiNum spiNum, SpiIntInfo *pIntInfo); + +/** + * @brief Enable SPI module interrupt source. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] intSrc + * Indicates which interrupt source to enable. + * + * @return void. + */ +void SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc); + +/** + * @brief Disable SPI module interrupt source. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * @param [in] intSrc + * Indicates which interrupt source to disable. + * + * @return void. + */ +void SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc); + +/** + * @brief Clear all of spi interrupt. + * + * @param [in] spiNum + * Indicates which submode to be used, SPI or HSPI. + * + * @return void. + */ +void SPIIntClear(SpiNum spiNum); + +#ifdef __cplusplus +} +#endif + +#endif // __SPI_INTERFACE_H__ diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_overlap.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_overlap.h new file mode 100644 index 0000000..705a040 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_overlap.h @@ -0,0 +1,85 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef SPI_OVERLAP_APP_H +#define SPI_OVERLAP_APP_H + +#include "ets_sys.h" +#include "spi_flash.h" +#define HSPI_OVERLAP +//#define NO_HSPI_DEVICE +#define HOST_INF_SEL 0x3ff00028 +#define FUNC_SPI_CS2 1 +#define FUNC_SPI_CS1 1 +#define reg_cspi_overlap (BIT7) + +#define SPI_FLASH_BYTES_LEN 24 +#define IODATA_START_ADDR BIT0 +#define SPI_BUFF_BYTE_NUM 32 + +#define PERIPHS_IO_MUX_BACKUP 0 +#define SPI_USER_BACKUP 1 +#define SPI_CTRL_BACKUP 2 +#define SPI_CLOCK_BACKUP 3 +#define SPI_USER1_BACKUP 4 +#define SPI_USER2_BACKUP 5 +#define SPI_CMD_BACKUP 6 +#define SPI_PIN_BACKUP 7 +#define SPI_SLAVE_BACKUP 8 + +#define HSPI_CS_DEV 0 +#define SPI_CS1_DEV 1 +#define SPI_CS2_DEV 2 +#define SPI_CS0_FLASH 3 +#define HSPI_IDLE 4 + +struct hspi_device_config { + uint8_t active: 1; + uint8_t clk_polar: 1; + uint8_t res: 1; + uint8_t clk_div: 5; +}; + +struct hspi_device_register { + uint32_t hspi_flash_reg_backup[9]; + uint32_t hspi_dev_reg_backup[9]; + struct hspi_device_config hspi_dev_conf[4]; + uint8_t selected_dev_num: 3; + uint8_t spi_io_80m: 1; + uint8_t hspi_reg_backup_flag: 1; + uint8_t res: 3; +}; + +void hspi_overlap_init(void); +void hspi_overlap_deinit(void); +void spi_reg_recover(uint8_t spi_no, uint32_t *backup_mem); +void spi_reg_backup(uint8_t spi_no, uint32_t *backup_mem); + +void hspi_master_dev_init(uint8_t dev_no, uint8_t clk_polar, uint8_t clk_div); +void hspi_dev_sel(uint8_t dev_no); + +void hspi_overlap_flash_init(void); +SpiFlashOpResult hspi_overlap_read_flash_data(SpiFlashChip *spi, uint32_t flash_addr, uint32_t *addr_dest, uint32_t byte_length); + +#endif diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_register.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_register.h new file mode 100644 index 0000000..4f90582 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/spi_register.h @@ -0,0 +1,222 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef SPI_REGISTER_H_INCLUDED +#define SPI_REGISTER_H_INCLUDED + +#define REG_SPI_BASE(i) (0x60000200-i*0x100) +#define SPI_CMD(i) (REG_SPI_BASE(i) + 0x0) + +#define SPI_FLASH_READ BIT31 +#define SPI_FLASH_WREN BIT30 +#define SPI_FLASH_WRDI BIT29 +#define SPI_FLASH_RDID BIT28 +#define SPI_FLASH_RDSR BIT27 +#define SPI_FLASH_WRSR BIT26 +#define SPI_FLASH_PP BIT25 +#define SPI_FLASH_SE BIT24 +#define SPI_FLASH_BE BIT23 +#define SPI_FLASH_CE BIT22 +#define SPI_FLASH_RES BIT20 + +#define SPI_USR (BIT(18)) + +#define SPI_ADDR(i) (REG_SPI_BASE(i) + 0x4) + +#define SPI_CTRL(i) (REG_SPI_BASE(i) + 0x8) +#define SPI_WR_BIT_ORDER (BIT(26)) +#define SPI_RD_BIT_ORDER (BIT(25)) +#define SPI_QIO_MODE (BIT(24)) +#define SPI_DIO_MODE (BIT(23)) +#define SPI_QOUT_MODE (BIT(20)) +#define SPI_DOUT_MODE (BIT(14)) +#define SPI_FASTRD_MODE (BIT(13)) + +#define SPI_CTRL1(i) (REG_SPI_BASE(i) + 0xc) +#define SPI_CS_HOLD_DELAY 0xf +#define SPI_CS_HOLD_DELAY_S 28 +#define SPI_CS_HOLD_DELAY_RES 0xfff +#define SPI_CS_HOLD_DELAY_RES_S 16 + + +#define SPI_RD_STATUS(i) (REG_SPI_BASE(i) + 0x10) + +#define SPI_CTRL2(i) (REG_SPI_BASE(i) + 0x14) + +#define SPI_CS_DELAY_NUM 0x0000000F +#define SPI_CS_DELAY_NUM_S 28 +#define SPI_CS_DELAY_MODE 0x00000003 +#define SPI_CS_DELAY_MODE_S 26 +#define SPI_MOSI_DELAY_NUM 0x00000007 +#define SPI_MOSI_DELAY_NUM_S 23 +#define SPI_MOSI_DELAY_MODE 0x00000003 +#define SPI_MOSI_DELAY_MODE_S 21 +#define SPI_MISO_DELAY_NUM 0x00000007 +#define SPI_MISO_DELAY_NUM_S 18 +#define SPI_MISO_DELAY_MODE 0x00000003 +#define SPI_MISO_DELAY_MODE_S 16 +#define SPI_CLOCK(i) (REG_SPI_BASE(i) + 0x18) +#define SPI_CLK_EQU_SYSCLK (BIT(31)) +#define SPI_CLKDIV_PRE 0x00001FFF +#define SPI_CLKDIV_PRE_S 18 +#define SPI_CLKCNT_N 0x0000003F +#define SPI_CLKCNT_N_S 12 +#define SPI_CLKCNT_H 0x0000003F +#define SPI_CLKCNT_H_S 6 +#define SPI_CLKCNT_L 0x0000003F +#define SPI_CLKCNT_L_S 0 + +#define SPI_USER(i) (REG_SPI_BASE(i) + 0x1C) +#define SPI_USR_COMMAND (BIT(31)) +#define SPI_USR_ADDR (BIT(30)) +#define SPI_USR_DUMMY (BIT(29)) +#define SPI_USR_MISO (BIT(28)) +#define SPI_USR_MOSI (BIT(27)) + +#define SPI_USR_MOSI_HIGHPART (BIT(25)) +#define SPI_USR_MISO_HIGHPART (BIT(24)) + + +#define SPI_SIO (BIT(16)) +#define SPI_FWRITE_QIO (BIT(15)) +#define SPI_FWRITE_DIO (BIT(14)) +#define SPI_FWRITE_QUAD (BIT(13)) +#define SPI_FWRITE_DUAL (BIT(12)) +#define SPI_WR_BYTE_ORDER (BIT(11)) +#define SPI_RD_BYTE_ORDER (BIT(10)) +#define SPI_CK_OUT_EDGE (BIT(7)) +#define SPI_CK_I_EDGE (BIT(6)) +#define SPI_CS_SETUP (BIT(5)) +#define SPI_CS_HOLD (BIT(4)) +#define SPI_FLASH_MODE (BIT(2)) + +#define SPI_USER1(i) (REG_SPI_BASE(i) + 0x20) +#define SPI_USR_ADDR_BITLEN 0x0000003F +#define SPI_USR_ADDR_BITLEN_S 26 +#define SPI_USR_MOSI_BITLEN 0x000001FF +#define SPI_USR_MOSI_BITLEN_S 17 +#define SPI_USR_MISO_BITLEN 0x000001FF +#define SPI_USR_MISO_BITLEN_S 8 + +#define SPI_USR_DUMMY_CYCLELEN 0x000000FF +#define SPI_USR_DUMMY_CYCLELEN_S 0 + +#define SPI_USER2(i) (REG_SPI_BASE(i) + 0x24) +#define SPI_USR_COMMAND_BITLEN 0x0000000F +#define SPI_USR_COMMAND_BITLEN_S 28 +#define SPI_USR_COMMAND_VALUE 0x0000FFFF +#define SPI_USR_COMMAND_VALUE_S 0 + +#define SPI_WR_STATUS(i) (REG_SPI_BASE(i) + 0x28) +#define SPI_PIN(i) (REG_SPI_BASE(i) + 0x2C) +#define SPI_IDLE_EDGE (BIT(29)) +#define SPI_CS2_DIS (BIT(2)) +#define SPI_CS1_DIS (BIT(1)) +#define SPI_CS0_DIS (BIT(0)) + +#define SPI_SLAVE(i) (REG_SPI_BASE(i) + 0x30) +#define SPI_SYNC_RESET (BIT(31)) +#define SPI_SLAVE_MODE (BIT(30)) +#define SPI_SLV_WR_RD_BUF_EN (BIT(29)) +#define SPI_SLV_WR_RD_STA_EN (BIT(28)) +#define SPI_SLV_CMD_DEFINE (BIT(27)) +#define SPI_TRANS_CNT 0x0000000F +#define SPI_TRANS_CNT_S 23 +#define SPI_TRANS_DONE_EN (BIT(9)) +#define SPI_SLV_WR_STA_DONE_EN (BIT(8)) +#define SPI_SLV_RD_STA_DONE_EN (BIT(7)) +#define SPI_SLV_WR_BUF_DONE_EN (BIT(6)) +#define SPI_SLV_RD_BUF_DONE_EN (BIT(5)) + + + +#define SLV_SPI_INT_EN 0x0000001f +#define SLV_SPI_INT_EN_S 5 + +#define SPI_TRANS_DONE (BIT(4)) +#define SPI_SLV_WR_STA_DONE (BIT(3)) +#define SPI_SLV_RD_STA_DONE (BIT(2)) +#define SPI_SLV_WR_BUF_DONE (BIT(1)) +#define SPI_SLV_RD_BUF_DONE (BIT(0)) + +#define SPI_SLAVE1(i) (REG_SPI_BASE(i) + 0x34) +#define SPI_SLV_STATUS_BITLEN 0x0000001F +#define SPI_SLV_STATUS_BITLEN_S 27 +#define SPI_SLV_BUF_BITLEN 0x000001FF +#define SPI_SLV_BUF_BITLEN_S 16 +#define SPI_SLV_RD_ADDR_BITLEN 0x0000003F +#define SPI_SLV_RD_ADDR_BITLEN_S 10 +#define SPI_SLV_WR_ADDR_BITLEN 0x0000003F +#define SPI_SLV_WR_ADDR_BITLEN_S 4 + +#define SPI_SLV_WRSTA_DUMMY_EN (BIT(3)) +#define SPI_SLV_RDSTA_DUMMY_EN (BIT(2)) +#define SPI_SLV_WRBUF_DUMMY_EN (BIT(1)) +#define SPI_SLV_RDBUF_DUMMY_EN (BIT(0)) + + + +#define SPI_SLAVE2(i) (REG_SPI_BASE(i) + 0x38) +#define SPI_SLV_WRBUF_DUMMY_CYCLELEN 0X000000FF +#define SPI_SLV_WRBUF_DUMMY_CYCLELEN_S 24 +#define SPI_SLV_RDBUF_DUMMY_CYCLELEN 0X000000FF +#define SPI_SLV_RDBUF_DUMMY_CYCLELEN_S 16 +#define SPI_SLV_WRSTR_DUMMY_CYCLELEN 0X000000FF +#define SPI_SLV_WRSTR_DUMMY_CYCLELEN_S 8 +#define SPI_SLV_RDSTR_DUMMY_CYCLELEN 0x000000FF +#define SPI_SLV_RDSTR_DUMMY_CYCLELEN_S 0 + +#define SPI_SLAVE3(i) (REG_SPI_BASE(i) + 0x3C) +#define SPI_SLV_WRSTA_CMD_VALUE 0x000000FF +#define SPI_SLV_WRSTA_CMD_VALUE_S 24 +#define SPI_SLV_RDSTA_CMD_VALUE 0x000000FF +#define SPI_SLV_RDSTA_CMD_VALUE_S 16 +#define SPI_SLV_WRBUF_CMD_VALUE 0x000000FF +#define SPI_SLV_WRBUF_CMD_VALUE_S 8 +#define SPI_SLV_RDBUF_CMD_VALUE 0x000000FF +#define SPI_SLV_RDBUF_CMD_VALUE_S 0 + +#define SPI_W0(i) (REG_SPI_BASE(i) +0x40) +#define SPI_W1(i) (REG_SPI_BASE(i) +0x44) +#define SPI_W2(i) (REG_SPI_BASE(i) +0x48) +#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C) +#define SPI_W4(i) (REG_SPI_BASE(i) +0x50) +#define SPI_W5(i) (REG_SPI_BASE(i) +0x54) +#define SPI_W6(i) (REG_SPI_BASE(i) +0x58) +#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C) +#define SPI_W8(i) (REG_SPI_BASE(i) +0x60) +#define SPI_W9(i) (REG_SPI_BASE(i) +0x64) +#define SPI_W10(i) (REG_SPI_BASE(i) +0x68) +#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C) +#define SPI_W12(i) (REG_SPI_BASE(i) +0x70) +#define SPI_W13(i) (REG_SPI_BASE(i) +0x74) +#define SPI_W14(i) (REG_SPI_BASE(i) +0x78) +#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C) + +#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8) + +#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC) +#define SPI_INT_HOLD_ENA 0x00000003 +#define SPI_INT_HOLD_ENA_S 0 +#endif // SPI_REGISTER_H_INCLUDED diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/uart.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/uart.h new file mode 100644 index 0000000..6dd2b6f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/uart.h @@ -0,0 +1,229 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef UART_APP_H +#define UART_APP_H + +#include "uart_register.h" +#include "eagle_soc.h" +#include "c_types.h" + +#define UART_TX_BUFFER_SIZE 256 //Ring buffer length of tx buffer +#define UART_RX_BUFFER_SIZE 256 //Ring buffer length of rx buffer + +#define UART_BUFF_EN 0 //use uart buffer , FOR UART0 +#define UART_SELFTEST 0 //set 1:enable the loop test demo for uart buffer, FOR UART0 + +#define UART_HW_RTS 0 //set 1: enable uart hw flow control RTS, PIN MTDO, FOR UART0 +#define UART_HW_CTS 0 //set1: enable uart hw flow contrl CTS , PIN MTCK, FOR UART0 + + + + +#define UART0 0 +#define UART1 1 + + +typedef enum { + FIVE_BITS = 0x0, + SIX_BITS = 0x1, + SEVEN_BITS = 0x2, + EIGHT_BITS = 0x3 +} UartBitsNum4Char; + +typedef enum { + ONE_STOP_BIT = 0x1, + ONE_HALF_STOP_BIT = 0x2, + TWO_STOP_BIT = 0x3 +} UartStopBitsNum; + +typedef enum { + NONE_BITS = 0x2, + ODD_BITS = 1, + EVEN_BITS = 0 +} UartParityMode; + +typedef enum { + STICK_PARITY_DIS = 0, + STICK_PARITY_EN = 1 +} UartExistParity; + +typedef enum { + UART_None_Inverse = 0x0, + UART_Rxd_Inverse = UART_RXD_INV, + UART_CTS_Inverse = UART_CTS_INV, + UART_Txd_Inverse = UART_TXD_INV, + UART_RTS_Inverse = UART_RTS_INV, +} UART_LineLevelInverse; + + +typedef enum { + BIT_RATE_300 = 300, + BIT_RATE_600 = 600, + BIT_RATE_1200 = 1200, + BIT_RATE_2400 = 2400, + BIT_RATE_4800 = 4800, + BIT_RATE_9600 = 9600, + BIT_RATE_19200 = 19200, + BIT_RATE_38400 = 38400, + BIT_RATE_57600 = 57600, + BIT_RATE_74880 = 74880, + BIT_RATE_115200 = 115200, + BIT_RATE_230400 = 230400, + BIT_RATE_460800 = 460800, + BIT_RATE_921600 = 921600, + BIT_RATE_1843200 = 1843200, + BIT_RATE_3686400 = 3686400, +} UartBautRate; + +typedef enum { + NONE_CTRL, + HARDWARE_CTRL, + XON_XOFF_CTRL +} UartFlowCtrl; + +typedef enum { + USART_HardwareFlowControl_None = 0x0, + USART_HardwareFlowControl_RTS = 0x1, + USART_HardwareFlowControl_CTS = 0x2, + USART_HardwareFlowControl_CTS_RTS = 0x3 +} UART_HwFlowCtrl; + +typedef enum { + EMPTY, + UNDER_WRITE, + WRITE_OVER +} RcvMsgBuffState; + +typedef struct { + uint32_t RcvBuffSize; + uint8_t *pRcvMsgBuff; + uint8_t *pWritePos; + uint8_t *pReadPos; + uint8_t TrigLvl; //JLU: may need to pad + RcvMsgBuffState BuffState; +} RcvMsgBuff; + +typedef struct { + uint32_t TrxBuffSize; + uint8_t *pTrxBuff; +} TrxMsgBuff; + +typedef enum { + BAUD_RATE_DET, + WAIT_SYNC_FRM, + SRCH_MSG_HEAD, + RCV_MSG_BODY, + RCV_ESC_CHAR, +} RcvMsgState; + +typedef struct { + UartBautRate baut_rate; + UartBitsNum4Char data_bits; + UartExistParity exist_parity; + UartParityMode parity; + UartStopBitsNum stop_bits; + UartFlowCtrl flow_ctrl; + RcvMsgBuff rcv_buff; + TrxMsgBuff trx_buff; + RcvMsgState rcv_state; + int32_t received; + int32_t buff_uart_no; //indicate which uart use tx/rx buffer +} UartDevice; + +void uart_init(UartBautRate uart0_br, UartBautRate uart1_br); +void uart0_sendStr(const char *str); + + +/////////////////////////////////////// +#define UART_FIFO_LEN 128 //define the tx fifo length +#define UART_TX_EMPTY_THRESH_VAL 0x10 + + +struct UartBuffer { + uint32_t UartBuffSize; + uint8_t *pUartBuff; + uint8_t *pInPos; + uint8_t *pOutPos; + STATUS BuffState; + uint16_t Space; //remanent space of the buffer + uint8_t TcpControl; + struct UartBuffer *nextBuff; +}; + +struct UartRxBuff { + uint32_t UartRxBuffSize; + uint8_t *pUartRxBuff; + uint8_t *pWritePos; + uint8_t *pReadPos; + STATUS RxBuffState; + uint32_t Space; //remanent space of the buffer +} ; + +typedef enum { + RUN = 0, + BLOCK = 1, +} TCPState; + +//void ICACHE_FLASH_ATTR uart_test_rx(); +STATUS uart_tx_one_char(uint8_t uart, uint8_t TxChar); +STATUS uart_tx_one_char_no_wait(uint8_t uart, uint8_t TxChar); +void uart1_sendStr_no_wait(const char *str); +struct UartBuffer *Uart_Buf_Init(); + + +#if UART_BUFF_EN +LOCAL void Uart_Buf_Cpy(struct UartBuffer *pCur, char *pdata, uint16_t data_len); +void uart_buf_free(struct UartBuffer *pBuff); +void tx_buff_enq(char *pdata, uint16_t data_len); +LOCAL void tx_fifo_insert(struct UartBuffer *pTxBuff, uint8_t data_len, uint8_t uart_no); +void tx_start_uart_buffer(uint8_t uart_no); +uint16_t rx_buff_deq(char *pdata, uint16_t data_len); +void Uart_rx_buff_enq(); +#endif +void uart_rx_intr_enable(uint8_t uart_no); +void uart_rx_intr_disable(uint8_t uart_no); +void uart0_tx_buffer(uint8_t *buf, uint16_t len); + +//============================================== +#define FUNC_UART0_CTS 4 +#define FUNC_U0CTS 4 +#define FUNC_U1TXD_BK 2 +#define UART_LINE_INV_MASK (0x3f<<19) +void UART_SetWordLength(uint8_t uart_no, UartBitsNum4Char len); +void UART_SetStopBits(uint8_t uart_no, UartStopBitsNum bit_num); +void UART_SetLineInverse(uint8_t uart_no, UART_LineLevelInverse inverse_mask); +void UART_SetParity(uint8_t uart_no, UartParityMode Parity_mode); +void UART_SetBaudrate(uint8_t uart_no, uint32_t baud_rate); +void UART_SetFlowCtrl(uint8_t uart_no, UART_HwFlowCtrl flow_ctrl, uint8_t rx_thresh); +void UART_WaitTxFifoEmpty(uint8_t uart_no, uint32_t time_out_us); //do not use if tx flow control enabled +void UART_ResetFifo(uint8_t uart_no); +void UART_ClearIntrStatus(uint8_t uart_no, uint32_t clr_mask); +void UART_SetIntrEna(uint8_t uart_no, uint32_t ena_mask); +void UART_SetPrintPort(uint8_t uart_no); +bool UART_CheckOutputFinished(uint8_t uart_no, uint32_t time_out_us); +//============================================== + +#endif + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/uart_register.h b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/uart_register.h new file mode 100644 index 0000000..fe4e15e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/include/driver/uart_register.h @@ -0,0 +1,159 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef UART_REGISTER_H_ +#define UART_REGISTER_H_ + +#define REG_UART_BASE(i) (0x60000000 + (i)*0xf00) +//version value:32'h062000 + +#define UART_FIFO(i) (REG_UART_BASE(i) + 0x0) +#define UART_RXFIFO_RD_BYTE 0x000000FF +#define UART_RXFIFO_RD_BYTE_S 0 + +#define UART_INT_RAW(i) (REG_UART_BASE(i) + 0x4) +#define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) +#define UART_BRK_DET_INT_RAW (BIT(7)) +#define UART_CTS_CHG_INT_RAW (BIT(6)) +#define UART_DSR_CHG_INT_RAW (BIT(5)) +#define UART_RXFIFO_OVF_INT_RAW (BIT(4)) +#define UART_FRM_ERR_INT_RAW (BIT(3)) +#define UART_PARITY_ERR_INT_RAW (BIT(2)) +#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) +#define UART_RXFIFO_FULL_INT_RAW (BIT(0)) + +#define UART_INT_ST(i) (REG_UART_BASE(i) + 0x8) +#define UART_RXFIFO_TOUT_INT_ST (BIT(8)) +#define UART_BRK_DET_INT_ST (BIT(7)) +#define UART_CTS_CHG_INT_ST (BIT(6)) +#define UART_DSR_CHG_INT_ST (BIT(5)) +#define UART_RXFIFO_OVF_INT_ST (BIT(4)) +#define UART_FRM_ERR_INT_ST (BIT(3)) +#define UART_PARITY_ERR_INT_ST (BIT(2)) +#define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) +#define UART_RXFIFO_FULL_INT_ST (BIT(0)) + +#define UART_INT_ENA(i) (REG_UART_BASE(i) + 0xC) +#define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) +#define UART_BRK_DET_INT_ENA (BIT(7)) +#define UART_CTS_CHG_INT_ENA (BIT(6)) +#define UART_DSR_CHG_INT_ENA (BIT(5)) +#define UART_RXFIFO_OVF_INT_ENA (BIT(4)) +#define UART_FRM_ERR_INT_ENA (BIT(3)) +#define UART_PARITY_ERR_INT_ENA (BIT(2)) +#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) +#define UART_RXFIFO_FULL_INT_ENA (BIT(0)) + +#define UART_INT_CLR(i) (REG_UART_BASE(i) + 0x10) +#define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) +#define UART_BRK_DET_INT_CLR (BIT(7)) +#define UART_CTS_CHG_INT_CLR (BIT(6)) +#define UART_DSR_CHG_INT_CLR (BIT(5)) +#define UART_RXFIFO_OVF_INT_CLR (BIT(4)) +#define UART_FRM_ERR_INT_CLR (BIT(3)) +#define UART_PARITY_ERR_INT_CLR (BIT(2)) +#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) +#define UART_RXFIFO_FULL_INT_CLR (BIT(0)) + +#define UART_CLKDIV(i) (REG_UART_BASE(i) + 0x14) +#define UART_CLKDIV_CNT 0x000FFFFF +#define UART_CLKDIV_S 0 + +#define UART_AUTOBAUD(i) (REG_UART_BASE(i) + 0x18) +#define UART_GLITCH_FILT 0x000000FF +#define UART_GLITCH_FILT_S 8 +#define UART_AUTOBAUD_EN (BIT(0)) + +#define UART_STATUS(i) (REG_UART_BASE(i) + 0x1C) +#define UART_TXD (BIT(31)) +#define UART_RTSN (BIT(30)) +#define UART_DTRN (BIT(29)) +#define UART_TXFIFO_CNT 0x000000FF +#define UART_TXFIFO_CNT_S 16 +#define UART_RXD (BIT(15)) +#define UART_CTSN (BIT(14)) +#define UART_DSRN (BIT(13)) +#define UART_RXFIFO_CNT 0x000000FF +#define UART_RXFIFO_CNT_S 0 + +#define UART_CONF0(i) (REG_UART_BASE(i) + 0x20) +#define UART_DTR_INV (BIT(24)) +#define UART_RTS_INV (BIT(23)) +#define UART_TXD_INV (BIT(22)) +#define UART_DSR_INV (BIT(21)) +#define UART_CTS_INV (BIT(20)) +#define UART_RXD_INV (BIT(19)) +#define UART_TXFIFO_RST (BIT(18)) +#define UART_RXFIFO_RST (BIT(17)) +#define UART_IRDA_EN (BIT(16)) +#define UART_TX_FLOW_EN (BIT(15)) +#define UART_LOOPBACK (BIT(14)) +#define UART_IRDA_RX_INV (BIT(13)) +#define UART_IRDA_TX_INV (BIT(12)) +#define UART_IRDA_WCTL (BIT(11)) +#define UART_IRDA_TX_EN (BIT(10)) +#define UART_IRDA_DPLX (BIT(9)) +#define UART_TXD_BRK (BIT(8)) +#define UART_SW_DTR (BIT(7)) +#define UART_SW_RTS (BIT(6)) +#define UART_STOP_BIT_NUM 0x00000003 +#define UART_STOP_BIT_NUM_S 4 +#define UART_BIT_NUM 0x00000003 +#define UART_BIT_NUM_S 2 +#define UART_PARITY_EN (BIT(1)) +#define UART_PARITY_EN_M 0x00000001 +#define UART_PARITY_EN_S 1 +#define UART_PARITY (BIT(0)) +#define UART_PARITY_M 0x00000001 +#define UART_PARITY_S 0 + +#define UART_CONF1(i) (REG_UART_BASE(i) + 0x24) +#define UART_RX_TOUT_EN (BIT(31)) +#define UART_RX_TOUT_THRHD 0x0000007F +#define UART_RX_TOUT_THRHD_S 24 +#define UART_RX_FLOW_EN (BIT(23)) +#define UART_RX_FLOW_THRHD 0x0000007F +#define UART_RX_FLOW_THRHD_S 16 +#define UART_TXFIFO_EMPTY_THRHD 0x0000007F +#define UART_TXFIFO_EMPTY_THRHD_S 8 +#define UART_RXFIFO_FULL_THRHD 0x0000007F +#define UART_RXFIFO_FULL_THRHD_S 0 + +#define UART_LOWPULSE(i) (REG_UART_BASE(i) + 0x28) +#define UART_LOWPULSE_MIN_CNT 0x000FFFFF +#define UART_LOWPULSE_MIN_CNT_S 0 + +#define UART_HIGHPULSE(i) (REG_UART_BASE(i) + 0x2C) +#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF +#define UART_HIGHPULSE_MIN_CNT_S 0 + +#define UART_PULSE_NUM(i) (REG_UART_BASE(i) + 0x30) +#define UART_PULSE_NUM_CNT 0x0003FF +#define UART_PULSE_NUM_CNT_S 0 + +#define UART_DATE(i) (REG_UART_BASE(i) + 0x78) +#define UART_ID(i) (REG_UART_BASE(i) + 0x7C) + +#endif // UART_REGISTER_H_INCLUDED + diff --git a/examples/ESP8266_NONOS_SDK/driver_lib/make_lib.sh b/examples/ESP8266_NONOS_SDK/driver_lib/make_lib.sh new file mode 100755 index 0000000..d8573b6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/driver_lib/make_lib.sh @@ -0,0 +1,14 @@ +#!/bin/bash -x + +echo "make_lib.sh version 20160307" +echo "" + +touch include/user_config.h + +cd $1 +make clean +make COMPILE=gcc +cp .output/eagle/debug/lib/lib$1.a ../../lib/lib$1.a +xtensa-lx106-elf-strip --strip-unneeded ../../lib/lib$1.a +cd .. +rm include/user_config.h diff --git a/examples/ESP8266_NONOS_SDK/include/airkiss.h b/examples/ESP8266_NONOS_SDK/include/airkiss.h new file mode 100644 index 0000000..4ac0a12 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/airkiss.h @@ -0,0 +1,122 @@ +/* + * airkiss.h + * + * Created on: 2015-1-26 + * Author: peterfan + */ + +#ifndef AIRKISS_H_ +#define AIRKISS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + + +typedef void* (*airkiss_memset_fn) (void* ptr, int value, unsigned int num); +typedef void* (*airkiss_memcpy_fn) (void* dst, const void* src, unsigned int num); +typedef int (*airkiss_memcmp_fn) (const void* ptr1, const void* ptr2, unsigned int num); +typedef int (*airkiss_printf_fn) (const char* format, ...); + + + +typedef struct +{ + airkiss_memset_fn memset; + airkiss_memcpy_fn memcpy; + airkiss_memcmp_fn memcmp; + airkiss_printf_fn printf; + +} airkiss_config_t; + +/** + * @brief Get airkiss lib version. + * + * @attention The lenth of version is unknown + * + * @param null. + * + * @return const char* + */ + +const char* airkiss_version(void); + + +typedef enum +{ + /* the length of the data buffer is lack*/ + AIRKISS_LAN_ERR_OVERFLOW = -5, + + /* Do not support the type of instruction */ + AIRKISS_LAN_ERR_CMD = -4, + + /* Error reading data package */ + AIRKISS_LAN_ERR_PAKE = -3, + + /* Error function passing parameters */ + AIRKISS_LAN_ERR_PARA = -2, + + /* Packet data error */ + AIRKISS_LAN_ERR_PKG = -1, + + /* Message format is correct */ + AIRKISS_LAN_CONTINUE = 0, + + /* Find equipment request packet is received */ + AIRKISS_LAN_SSDP_REQ = 1, + + /* Packet packaging complete */ + AIRKISS_LAN_PAKE_READY = 2 + + +} airkiss_lan_ret_t; + + +typedef enum +{ + AIRKISS_LAN_SSDP_REQ_CMD = 0x1, + AIRKISS_LAN_SSDP_RESP_CMD = 0x1001, + AIRKISS_LAN_SSDP_NOTIFY_CMD = 0x1002 +} airkiss_lan_cmdid_t; + +/** + * @brief Receive UDP packet and input this API for analyzing. + * + * @attention null. + * + * @param const void* body : The start of the UDP message body data pointer. + * @param unsigned short length : the effective length of data. + * @param const airkiss_config_t* config : input struct airkiss_config_t + * + * @return >=0 : succeed (reference airkiss_lan_ret_t) + * @return <0 : error code (reference airkiss_lan_ret_t) + */ + +int airkiss_lan_recv(const void* body, unsigned short length, const airkiss_config_t* config); + + +/** + * @brief Packaging the UDP packet to send. + * + * @attention null. + * + * @param airkiss_lan_cmdid_t ak_lan_cmdid : The packet type. + * @param void* appid : Vendor's Wechat public number id. + * @param void* deviceid : device model id. + * @param void* _datain : the data to be sent. + * @param unsigned short inlength : the lenth of data to be sent. + * @param void* _dataout : Data buffer addr. + * @param unsigned short* outlength : the size of data buffer. + * @param const airkiss_config_t* config : input struct airkiss_config_t + * + * @return >=0 : succeed (reference airkiss_lan_ret_t) + * @return <0 : error code (reference airkiss_lan_ret_t) + */ + +int airkiss_lan_pack(airkiss_lan_cmdid_t ak_lan_cmdid, void* appid, void* deviceid, void* _datain, unsigned short inlength, void* _dataout, unsigned short* outlength, const airkiss_config_t* config); + +#ifdef __cplusplus +} +#endif + +#endif /* AIRKISS_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/include/at_custom.h b/examples/ESP8266_NONOS_SDK/include/at_custom.h new file mode 100755 index 0000000..0cc6b7f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/at_custom.h @@ -0,0 +1,192 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef CUSTOM_AT_H_ +#define CUSTOM_AT_H_ + +#include "c_types.h" + +#define at_port_print_irom_str(str) do { \ + static const uint8 irom_str[] ICACHE_RODATA_ATTR = str; \ + at_port_print(irom_str); \ + } while(0) + +typedef struct +{ + char *at_cmdName; + int8_t at_cmdLen; + void (*at_testCmd)(uint8_t id); + void (*at_queryCmd)(uint8_t id); + void (*at_setupCmd)(uint8_t id, char *pPara); + void (*at_exeCmd)(uint8_t id); +}at_funcationType; + +typedef void (*at_custom_uart_rx_intr)(uint8* data,int32 len); + +typedef void (*at_custom_response_func_type)(const char *str); + +typedef void (*at_fake_uart_tx_func_type)(const uint8*data,uint32 length); + +extern uint8 at_customLinkMax; + +/** + * @brief Response "OK" to uart. + * @param None + * @retval None + */ +void at_response_ok(void); +/** + * @brief Response "ERROR" to uart. + * @param None + * @retval None + */ +void at_response_error(void); +/** + * @brief Response string. + * It is equivalent to at_port_print,if not call at_register_response_func or call at_register_response_func(NULL); + * It will run custom response function,if call at_register_response_func and parameter is not NULL. + * @param string + * @retval None + */ +void at_response(const char *str); +/** + * @brief register custom response function. + * @param response_func: the function that will run when call at_response + * @retval None + */ +void at_register_response_func(at_custom_response_func_type response_func); +/** + * @brief Task of process command or txdata. + * @param custom_at_cmd_array: the array of at cmd that custom defined + * cmd_num : the num of at cmd that custom defined + * @retval None + */ +void at_cmd_array_regist(at_funcationType *custom_at_cmd_array,uint32 cmd_num); +/** + * @brief get digit form at cmd line.the maybe alter pSrc + * @param p_src: at cmd line string + * result:the buffer to be placed result + * err : err num + * @retval TRUE: + * FALSE: + */ +bool at_get_next_int_dec(char **p_src,int*result,int* err); +/** + * @brief get string form at cmd line.the maybe alter pSrc + * @param p_dest: the buffer to be placed result + * p_src: at cmd line string + * max_len :max len of string excepted to get + * @retval None + */ +int32 at_data_str_copy(char *p_dest, char **p_src, int32 max_len); + +/** + * @brief initialize at module + * @param None + * @retval None + */ +void at_init(void); +/** + * @brief print string to at port + * @param string + * @retval None + */ +void at_port_print(const char *str); +/** + * @brief print custom information when AT+GMR + * @param string + * @retval None + */ +void at_set_custom_info(char* info); +/** + * @brief if current at command is processing,you can call at_enter_special_state, + * then if other comamnd coming,it will return busy. + * @param None + * @retval None + */ +void at_enter_special_state(void); +/** + * @brief + * @param None + * @retval None + */ +void at_leave_special_state(void); +/** + * @brief get at version + * @param None + * @retval at version + * bit24~31: at main version + * bit23~16: at sub version + * bit15~8 : at test version + * bit7~0 : customized version + */ +uint32 at_get_version(void); + +/** + * @brief register custom uart rx interrupt function + * @param rx_func: custom uart rx interrupt function. + * If rx_func is non-void,when rx interrupt comming,it will call rx_func(data,len), + * data is the buffer of data,len is the length of data.Otherwise,it will run AT rx function. + * @retval None + */ +void at_register_uart_rx_intr(at_custom_uart_rx_intr rx_func); +/** + * @brief notify at module that has receive data + * @param data: data buffer. + * @param length: data length + * @retval data len,if ok len == length + */ +uint32 at_fake_uart_rx(uint8* data,uint32 length); + +/** + * @brief enable fake uart,and register fake uart tx + * @param enable: enable fake uart. + * @param at_fake_uart_tx_func: + * @retval data len,if ok len == length + */ +bool at_fake_uart_enable(bool enable,at_fake_uart_tx_func_type at_fake_uart_tx_func); + +/** + * @brief set at escape character + * @param ch: escape character. + * @retval TRUE,if set ok,otherwize FALSE. + */ +bool at_set_escape_character(uint8 ch); + +/** + * @brief Enable wpa2 enterprise command + * @ include AT+CWJEAP_DEF, AT+CWJEAP_CUR + * @param None + * @retval TRUE,if set ok,otherwize FALSE. + */ +bool at_cmd_enable_wpa2_enterprise(void); + +/** + * @brief Enable smartconfig command + * @ include AT+CWSTARTSMART, AT+CWSTOPSMART, AT+CWSTARTDISCOVER, AT+CWSTOPDISCOVER + * @param None + * @retval TRUE,if set ok,otherwize FALSE. + */ +bool at_cmd_enable_smartconfig(void); +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/c_types.h b/examples/ESP8266_NONOS_SDK/include/c_types.h new file mode 100755 index 0000000..aeab8de --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/c_types.h @@ -0,0 +1,116 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef _C_TYPES_H_ +#define _C_TYPES_H_ + +typedef unsigned char uint8_t; +typedef signed char sint8_t; +typedef signed char int8_t; +typedef unsigned short uint16_t; +typedef signed short sint16_t; +typedef signed short int16_t; +typedef unsigned int uint32_t; +typedef signed int sint32_t; +typedef signed int int32_t; +typedef signed long long sint64_t; +typedef unsigned long long uint64_t; +typedef unsigned long long u_int64_t; +typedef float real32_t; +typedef double real64_t; + +typedef unsigned char uint8; +typedef unsigned char u8; +typedef signed char sint8; +typedef signed char int8; +typedef signed char s8; +typedef unsigned short uint16; +typedef unsigned short u16; +typedef signed short sint16; +typedef signed short s16; +typedef unsigned int uint32; +typedef unsigned int u_int; +typedef unsigned int u32; +typedef signed int sint32; +typedef signed int s32; +typedef int int32; +typedef signed long long sint64; +typedef unsigned long long uint64; +typedef unsigned long long u64; +typedef float real32; +typedef double real64; + +#define __le16 u16 + +typedef unsigned int size_t; + +#ifndef __packed +#define __packed __attribute__((packed)) +#endif + +#define LOCAL static + +#ifndef NULL +#define NULL (void *)0 +#endif /* NULL */ + +/* probably should not put STATUS here */ +typedef enum { + OK = 0, + FAIL, + PENDING, + BUSY, + CANCEL, +} STATUS; + +#define BIT(nr) (1UL << (nr)) + +#define REG_SET_BIT(_r, _b) (*(volatile uint32_t*)(_r) |= (_b)) +#define REG_CLR_BIT(_r, _b) (*(volatile uint32_t*)(_r) &= ~(_b)) + +#define DMEM_ATTR __attribute__((section(".bss"))) +#define SHMEM_ATTR + +#ifdef ICACHE_FLASH +#define ICACHE_FLASH_ATTR __attribute__((section(".irom0.text"))) +#define ICACHE_RODATA_ATTR __attribute__((section(".irom.text"))) +#else +#define ICACHE_FLASH_ATTR +#define ICACHE_RODATA_ATTR +#endif /* ICACHE_FLASH */ + +#define STORE_ATTR __attribute__((aligned(4))) + +#ifndef __cplusplus +typedef unsigned char bool; +#define BOOL bool +#define true (1) +#define false (0) +#define TRUE true +#define FALSE false + + +#endif /* !__cplusplus */ + +#endif /* _C_TYPES_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/include/eagle_soc.h b/examples/ESP8266_NONOS_SDK/include/eagle_soc.h new file mode 100644 index 0000000..d7015dc --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/eagle_soc.h @@ -0,0 +1,279 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef _EAGLE_SOC_H_ +#define _EAGLE_SOC_H_ + +//Register Bits{{ +#define BIT31 0x80000000 +#define BIT30 0x40000000 +#define BIT29 0x20000000 +#define BIT28 0x10000000 +#define BIT27 0x08000000 +#define BIT26 0x04000000 +#define BIT25 0x02000000 +#define BIT24 0x01000000 +#define BIT23 0x00800000 +#define BIT22 0x00400000 +#define BIT21 0x00200000 +#define BIT20 0x00100000 +#define BIT19 0x00080000 +#define BIT18 0x00040000 +#define BIT17 0x00020000 +#define BIT16 0x00010000 +#define BIT15 0x00008000 +#define BIT14 0x00004000 +#define BIT13 0x00002000 +#define BIT12 0x00001000 +#define BIT11 0x00000800 +#define BIT10 0x00000400 +#define BIT9 0x00000200 +#define BIT8 0x00000100 +#define BIT7 0x00000080 +#define BIT6 0x00000040 +#define BIT5 0x00000020 +#define BIT4 0x00000010 +#define BIT3 0x00000008 +#define BIT2 0x00000004 +#define BIT1 0x00000002 +#define BIT0 0x00000001 +//}} + +//Registers Operation {{ +#define ETS_UNCACHED_ADDR(addr) (addr) +#define ETS_CACHED_ADDR(addr) (addr) + + +#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) +#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val) +#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))) +#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))) +#define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)) +#define SET_PERI_REG_BITS(reg,bit_map,value,shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|((value)<<(shift)) )) +//}} + +//Periheral Clock {{ +#define APB_CLK_FREQ 80*1000000 //unit: Hz +#define UART_CLK_FREQ APB_CLK_FREQ +#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256 +//}} + +//Peripheral device base address define{{ +#define PERIPHS_DPORT_BASEADDR 0x3ff00000 +#define PERIPHS_GPIO_BASEADDR 0x60000300 +#define PERIPHS_TIMER_BASEDDR 0x60000600 +#define PERIPHS_RTC_BASEADDR 0x60000700 +#define PERIPHS_IO_MUX 0x60000800 +//}} + +//Interrupt remap control registers define{{ +#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04) +#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) +#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) +//}} + +//GPIO reg {{ +#define GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + reg) +#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + reg, val) +#define GPIO_OUT_ADDRESS 0x00 +#define GPIO_OUT_W1TS_ADDRESS 0x04 +#define GPIO_OUT_W1TC_ADDRESS 0x08 + +#define GPIO_ENABLE_ADDRESS 0x0c +#define GPIO_ENABLE_W1TS_ADDRESS 0x10 +#define GPIO_ENABLE_W1TC_ADDRESS 0x14 +#define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff + +#define GPIO_IN_ADDRESS 0x18 + +#define GPIO_STATUS_ADDRESS 0x1c +#define GPIO_STATUS_W1TS_ADDRESS 0x20 +#define GPIO_STATUS_W1TC_ADDRESS 0x24 +#define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff + +#define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c +#define RTC_CALIB_START BIT31 //first write to zero, then to one to start +#define RTC_PERIOD_NUM_MASK 0x3ff //max 8ms +#define GPIO_RTC_CALIB_VALUE PERIPHS_GPIO_BASEADDR+0x70 +#define RTC_CALIB_RDY_S 31 //after measure, flag to one, when start from zero to one, turn to zero +#define RTC_CALIB_VALUE_MASK 0xfffff + +#define GPIO_PIN0_ADDRESS 0x28 + +#define GPIO_ID_PIN0 0 +#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n)) +#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15) +#define GPIO_ID_NONE 0xffffffff + +#define GPIO_PIN_COUNT 16 + +#define GPIO_PIN_CONFIG_MSB 12 +#define GPIO_PIN_CONFIG_LSB 11 +#define GPIO_PIN_CONFIG_MASK 0x00001800 +#define GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB) +#define GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK) + +#define GPIO_WAKEUP_ENABLE 1 +#define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE) +#define GPIO_PIN_WAKEUP_ENABLE_MSB 10 +#define GPIO_PIN_WAKEUP_ENABLE_LSB 10 +#define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400 +#define GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB) +#define GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK) + +#define GPIO_PIN_INT_TYPE_MASK 0x380 +#define GPIO_PIN_INT_TYPE_MSB 9 +#define GPIO_PIN_INT_TYPE_LSB 7 +#define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB) +#define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK) + +#define GPIO_PAD_DRIVER_ENABLE 1 +#define GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE) +#define GPIO_PIN_PAD_DRIVER_MSB 2 +#define GPIO_PIN_PAD_DRIVER_LSB 2 +#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004 +#define GPIO_PIN_PAD_DRIVER_GET(x) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB) +#define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK) + +#define GPIO_AS_PIN_SOURCE 0 +#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE) +#define GPIO_PIN_SOURCE_MSB 0 +#define GPIO_PIN_SOURCE_LSB 0 +#define GPIO_PIN_SOURCE_MASK 0x00000001 +#define GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB) +#define GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK) +// }} + +// TIMER reg {{ +#define RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr) +#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val) +#define RTC_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask) +/* Returns the current time according to the timer timer. */ +#define NOW() RTC_REG_READ(FRC2_COUNT_ADDRESS) + +//load initial_value to timer1 +#define FRC1_LOAD_ADDRESS 0x00 + +//timer1's counter value(count from initial_value to 0) +#define FRC1_COUNT_ADDRESS 0x04 + +#define FRC1_CTRL_ADDRESS 0x08 + +//clear timer1's interrupt when write this address +#define FRC1_INT_ADDRESS 0x0c +#define FRC1_INT_CLR_MASK 0x00000001 + +//timer2's counter value(count from initial_value to 0) +#define FRC2_COUNT_ADDRESS 0x24 +// }} + +//RTC reg {{ +#define REG_RTC_BASE PERIPHS_RTC_BASEADDR + +#define RTC_STORE0 (REG_RTC_BASE + 0x030) +#define RTC_STORE1 (REG_RTC_BASE + 0x034) +#define RTC_STORE2 (REG_RTC_BASE + 0x038) +#define RTC_STORE3 (REG_RTC_BASE + 0x03C) + +#define RTC_GPIO_OUT (REG_RTC_BASE + 0x068) +#define RTC_GPIO_ENABLE (REG_RTC_BASE + 0x074) +#define RTC_GPIO_IN_DATA (REG_RTC_BASE + 0x08C) +#define RTC_GPIO_CONF (REG_RTC_BASE + 0x090) +#define PAD_XPD_DCDC_CONF (REG_RTC_BASE + 0x0A0) +//}} + +//PIN Mux reg {{ +#define PERIPHS_IO_MUX_FUNC 0x13 +#define PERIPHS_IO_MUX_FUNC_S 4 +#define PERIPHS_IO_MUX_PULLUP BIT7 +#define PERIPHS_IO_MUX_PULLUP2 BIT6 +#define PERIPHS_IO_MUX_SLEEP_PULLUP BIT3 +#define PERIPHS_IO_MUX_SLEEP_PULLUP2 BIT2 +#define PERIPHS_IO_MUX_SLEEP_OE BIT1 +#define PERIPHS_IO_MUX_OE BIT0 + +#define PERIPHS_IO_MUX_CONF_U (PERIPHS_IO_MUX + 0x00) +#define SPI0_CLK_EQU_SYS_CLK BIT8 +#define SPI1_CLK_EQU_SYS_CLK BIT9 +#define PERIPHS_IO_MUX_MTDI_U (PERIPHS_IO_MUX + 0x04) +#define FUNC_GPIO12 3 +#define PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08) +#define FUNC_GPIO13 3 +#define PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C) +#define FUNC_GPIO14 3 +#define PERIPHS_IO_MUX_MTDO_U (PERIPHS_IO_MUX + 0x10) +#define FUNC_GPIO15 3 +#define FUNC_U0RTS 4 +#define PERIPHS_IO_MUX_U0RXD_U (PERIPHS_IO_MUX + 0x14) +#define FUNC_GPIO3 3 +#define PERIPHS_IO_MUX_U0TXD_U (PERIPHS_IO_MUX + 0x18) +#define FUNC_U0TXD 0 +#define FUNC_GPIO1 3 +#define PERIPHS_IO_MUX_SD_CLK_U (PERIPHS_IO_MUX + 0x1c) +#define FUNC_SDCLK 0 +#define FUNC_SPICLK 1 +#define PERIPHS_IO_MUX_SD_DATA0_U (PERIPHS_IO_MUX + 0x20) +#define FUNC_SDDATA0 0 +#define FUNC_SPIQ 1 +#define FUNC_U1TXD 4 +#define PERIPHS_IO_MUX_SD_DATA1_U (PERIPHS_IO_MUX + 0x24) +#define FUNC_SDDATA1 0 +#define FUNC_SPID 1 +#define FUNC_U1RXD 4 +#define FUNC_SDDATA1_U1RXD 7 +#define PERIPHS_IO_MUX_SD_DATA2_U (PERIPHS_IO_MUX + 0x28) +#define FUNC_SDDATA2 0 +#define FUNC_SPIHD 1 +#define FUNC_GPIO9 3 +#define PERIPHS_IO_MUX_SD_DATA3_U (PERIPHS_IO_MUX + 0x2c) +#define FUNC_SDDATA3 0 +#define FUNC_SPIWP 1 +#define FUNC_GPIO10 3 +#define PERIPHS_IO_MUX_SD_CMD_U (PERIPHS_IO_MUX + 0x30) +#define FUNC_SDCMD 0 +#define FUNC_SPICS0 1 +#define PERIPHS_IO_MUX_GPIO0_U (PERIPHS_IO_MUX + 0x34) +#define FUNC_GPIO0 0 +#define PERIPHS_IO_MUX_GPIO2_U (PERIPHS_IO_MUX + 0x38) +#define FUNC_GPIO2 0 +#define FUNC_U1TXD_BK 2 +#define FUNC_U0TXD_BK 4 +#define PERIPHS_IO_MUX_GPIO4_U (PERIPHS_IO_MUX + 0x3C) +#define FUNC_GPIO4 0 +#define PERIPHS_IO_MUX_GPIO5_U (PERIPHS_IO_MUX + 0x40) +#define FUNC_GPIO5 0 + +#define PIN_PULLUP_DIS(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP) +#define PIN_PULLUP_EN(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP) + +#define PIN_FUNC_SELECT(PIN_NAME, FUNC) do { \ + WRITE_PERI_REG(PIN_NAME, \ + (READ_PERI_REG(PIN_NAME) \ + & (~(PERIPHS_IO_MUX_FUNC< + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __ESPCONN_H__ +#define __ESPCONN_H__ + +typedef sint8 err_t; + +typedef void *espconn_handle; +typedef void (* espconn_connect_callback)(void *arg); +typedef void (* espconn_reconnect_callback)(void *arg, sint8 err); + +/* Definitions for error constants. */ + +#define ESPCONN_OK 0 /* No error, everything OK. */ +#define ESPCONN_MEM -1 /* Out of memory error. */ +#define ESPCONN_TIMEOUT -3 /* Timeout. */ +#define ESPCONN_RTE -4 /* Routing problem. */ +#define ESPCONN_INPROGRESS -5 /* Operation in progress */ +#define ESPCONN_MAXNUM -7 /* Total number exceeds the set maximum*/ + +#define ESPCONN_ABRT -8 /* Connection aborted. */ +#define ESPCONN_RST -9 /* Connection reset. */ +#define ESPCONN_CLSD -10 /* Connection closed. */ +#define ESPCONN_CONN -11 /* Not connected. */ + +#define ESPCONN_ARG -12 /* Illegal argument. */ +#define ESPCONN_IF -14 /* UDP send error */ +#define ESPCONN_ISCONN -15 /* Already connected. */ + +#define ESPCONN_HANDSHAKE -28 /* ssl handshake failed */ +#define ESPCONN_SSL_INVALID_DATA -61 /* ssl application invalid */ + +/** Protocol family and type of the espconn */ +enum espconn_type { + ESPCONN_INVALID = 0, + /* ESPCONN_TCP Group */ + ESPCONN_TCP = 0x10, + /* ESPCONN_UDP Group */ + ESPCONN_UDP = 0x20, +}; + +/** Current state of the espconn. Non-TCP espconn are always in state ESPCONN_NONE! */ +enum espconn_state { + ESPCONN_NONE, + ESPCONN_WAIT, + ESPCONN_LISTEN, + ESPCONN_CONNECT, + ESPCONN_WRITE, + ESPCONN_READ, + ESPCONN_CLOSE +}; + +typedef struct _esp_tcp { + int remote_port; + int local_port; + uint8 local_ip[4]; + uint8 remote_ip[4]; + espconn_connect_callback connect_callback; + espconn_reconnect_callback reconnect_callback; + espconn_connect_callback disconnect_callback; + espconn_connect_callback write_finish_fn; +} esp_tcp; + +typedef struct _esp_udp { + int remote_port; + int local_port; + uint8 local_ip[4]; + uint8 remote_ip[4]; +} esp_udp; + +typedef struct _remot_info{ + enum espconn_state state; + int remote_port; + uint8 remote_ip[4]; +}remot_info; + +/** A callback prototype to inform about events for a espconn */ +typedef void (* espconn_recv_callback)(void *arg, char *pdata, unsigned short len); +typedef void (* espconn_sent_callback)(void *arg); + +/** A espconn descriptor */ +struct espconn { + /** type of the espconn (TCP, UDP) */ + enum espconn_type type; + /** current state of the espconn */ + enum espconn_state state; + union { + esp_tcp *tcp; + esp_udp *udp; + } proto; + /** A callback function that is informed about events for this espconn */ + espconn_recv_callback recv_callback; + espconn_sent_callback sent_callback; + uint8 link_cnt; + void *reverse; +}; + +enum espconn_option{ + ESPCONN_START = 0x00, + ESPCONN_REUSEADDR = 0x01, + ESPCONN_NODELAY = 0x02, + ESPCONN_COPY = 0x04, + ESPCONN_KEEPALIVE = 0x08, + ESPCONN_MANUALRECV = 0x10, + ESPCONN_END +}; + +enum espconn_level{ + ESPCONN_KEEPIDLE, + ESPCONN_KEEPINTVL, + ESPCONN_KEEPCNT +}; + +enum { + ESPCONN_IDLE = 0, + ESPCONN_CLIENT, + ESPCONN_SERVER, + ESPCONN_BOTH, + ESPCONN_MAX +}; + +struct espconn_packet{ + uint16 sent_length; /* sent length successful*/ + uint16 snd_buf_size; /* Available buffer size for sending */ + uint16 snd_queuelen; /* Available buffer space for sending */ + uint16 total_queuelen; /* total Available buffer space for sending */ + uint32 packseqno; /* seqno to be sent */ + uint32 packseq_nxt; /* seqno expected */ + uint32 packnum; +}; + +struct mdns_info { + char *host_name; + char *server_name; + uint16 server_port; + unsigned long ipAddr; + char *txt_data[10]; +}; +/****************************************************************************** + * FunctionName : espconn_connect + * Description : The function given as the connect + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ + +sint8 espconn_connect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_disconnect + * Description : disconnect with host + * Parameters : espconn -- the espconn used to disconnect the connection + * Returns : none +*******************************************************************************/ + +sint8 espconn_disconnect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_delete + * Description : disconnect with host + * Parameters : espconn -- the espconn used to disconnect the connection + * Returns : none +*******************************************************************************/ + +sint8 espconn_delete(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_accept + * Description : The function given as the listen + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ + +sint8 espconn_accept(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_create + * Description : sent data for client or server + * Parameters : espconn -- espconn to the data transmission + * Returns : result +*******************************************************************************/ + +sint8 espconn_create(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_con + * Description : get the number of simulatenously active TCP connections + * Parameters : none + * Returns : none +*******************************************************************************/ + +uint8 espconn_tcp_get_max_con(void); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con + * Description : set the number of simulatenously active TCP connections + * Parameters : num -- total number + * Returns : none +*******************************************************************************/ + +sint8 espconn_tcp_set_max_con(uint8 num); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_con_allow + * Description : get the count of simulatenously active connections on the server + * Parameters : espconn -- espconn to get the count + * Returns : result +*******************************************************************************/ + +sint8 espconn_tcp_get_max_con_allow(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con_allow + * Description : set the count of simulatenously active connections on the server + * Parameters : espconn -- espconn to set the count + * num -- support the connection number + * Returns : result +*******************************************************************************/ + +sint8 espconn_tcp_set_max_con_allow(struct espconn *espconn, uint8 num); + +/****************************************************************************** + * FunctionName : espconn_regist_time + * Description : used to specify the time that should be called when don't recv data + * Parameters : espconn -- the espconn used to the connection + * interval -- the timer when don't recv data + * Returns : none +*******************************************************************************/ + +sint8 espconn_regist_time(struct espconn *espconn, uint32 interval, uint8 type_flag); + +/****************************************************************************** + * FunctionName : espconn_get_connection_info + * Description : used to specify the function that should be called when disconnect + * Parameters : espconn -- espconn to set the err callback + * discon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ + +sint8 espconn_get_connection_info(struct espconn *pespconn, remot_info **pcon_info, uint8 typeflags); + +/****************************************************************************** + * FunctionName : espconn_get_packet_info + * Description : get the packet info with host + * Parameters : espconn -- the espconn used to disconnect the connection + * infoarg -- the packet info + * Returns : the errur code +*******************************************************************************/ + +sint8 espconn_get_packet_info(struct espconn *espconn, struct espconn_packet* infoarg); + +/****************************************************************************** + * FunctionName : espconn_regist_sentcb + * Description : Used to specify the function that should be called when data + * has been successfully delivered to the remote host. + * Parameters : struct espconn *espconn -- espconn to set the sent callback + * espconn_sent_callback sent_cb -- sent callback function to + * call for this espconn when data is successfully sent + * Returns : none +*******************************************************************************/ + +sint8 espconn_regist_sentcb(struct espconn *espconn, espconn_sent_callback sent_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_sentcb + * Description : Used to specify the function that should be called when data + * has been successfully delivered to the remote host. + * Parameters : espconn -- espconn to set the sent callback + * sent_cb -- sent callback function to call for this espconn + * when data is successfully sent + * Returns : none +*******************************************************************************/ + +sint8 espconn_regist_write_finish(struct espconn *espconn, espconn_connect_callback write_finish_fn); + +/****************************************************************************** + * FunctionName : espconn_send + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +sint8 espconn_send(struct espconn *espconn, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_sent + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +sint8 espconn_sent(struct espconn *espconn, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_sendto + * Description : send data for UDP + * Parameters : espconn -- espconn to set for UDP + * psent -- data to send + * length -- length of data to send + * Returns : error +*******************************************************************************/ + +sint16 espconn_sendto(struct espconn *espconn, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_regist_connectcb + * Description : used to specify the function that should be called when + * connects to host. + * Parameters : espconn -- espconn to set the connect callback + * connect_cb -- connected callback function to call when connected + * Returns : none +*******************************************************************************/ + +sint8 espconn_regist_connectcb(struct espconn *espconn, espconn_connect_callback connect_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_recvcb + * Description : used to specify the function that should be called when recv + * data from host. + * Parameters : espconn -- espconn to set the recv callback + * recv_cb -- recv callback function to call when recv data + * Returns : none +*******************************************************************************/ + +sint8 espconn_regist_recvcb(struct espconn *espconn, espconn_recv_callback recv_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_reconcb + * Description : used to specify the function that should be called when connection + * because of err disconnect. + * Parameters : espconn -- espconn to set the err callback + * recon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ + +sint8 espconn_regist_reconcb(struct espconn *espconn, espconn_reconnect_callback recon_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_disconcb + * Description : used to specify the function that should be called when disconnect + * Parameters : espconn -- espconn to set the err callback + * discon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ + +sint8 espconn_regist_disconcb(struct espconn *espconn, espconn_connect_callback discon_cb); + +/****************************************************************************** + * FunctionName : espconn_port + * Description : access port value for client so that we don't end up bouncing + * all connections at the same time . + * Parameters : none + * Returns : access port value +*******************************************************************************/ + +uint32 espconn_port(void); + +/****************************************************************************** + * FunctionName : espconn_set_opt + * Description : access port value for client so that we don't end up bouncing + * all connections at the same time . + * Parameters : none + * Returns : access port value +*******************************************************************************/ + +sint8 espconn_set_opt(struct espconn *espconn, uint8 opt); + +/****************************************************************************** + * FunctionName : espconn_clear_opt + * Description : clear the option for connections so that we don't end up bouncing + * all connections at the same time . + * Parameters : espconn -- the espconn used to set the connection + * opt -- the option for clear + * Returns : the result +*******************************************************************************/ + +sint8 espconn_clear_opt(struct espconn *espconn, uint8 opt); + +/****************************************************************************** + * FunctionName : espconn_set_keepalive + * Description : access level value for connection so that we set the value for + * keep alive + * Parameters : espconn -- the espconn used to set the connection + * level -- the connection's level + * value -- the value of time(s) + * Returns : access port value +*******************************************************************************/ + +sint8 espconn_set_keepalive(struct espconn *espconn, uint8 level, void* optarg); + +/****************************************************************************** + * FunctionName : espconn_get_keepalive + * Description : access level value for connection so that we get the value for + * keep alive + * Parameters : espconn -- the espconn used to get the connection + * level -- the connection's level + * Returns : access keep alive value +*******************************************************************************/ + +sint8 espconn_get_keepalive(struct espconn *espconn, uint8 level, void *optarg); + +/****************************************************************************** + * TypedefName : dns_found_callback + * Description : Callback which is invoked when a hostname is found. + * Parameters : name -- pointer to the name that was looked up. + * ipaddr -- pointer to an ip_addr_t containing the IP address of + * the hostname, or NULL if the name could not be found (or on any + * other error). + * callback_arg -- a user-specified callback argument passed to + * dns_gethostbyname +*******************************************************************************/ + +typedef void (*dns_found_callback)(const char *name, ip_addr_t *ipaddr, void *callback_arg); + +/****************************************************************************** + * FunctionName : espconn_gethostbyname + * Description : Resolve a hostname (string) into an IP address. + * Parameters : pespconn -- espconn to resolve a hostname + * hostname -- the hostname that is to be queried + * addr -- pointer to a ip_addr_t where to store the address if + * it is already cached in the dns_table (only valid if ESPCONN_OK + * is returned!) + * found -- a callback function to be called on success, failure + * or timeout (only if ERR_INPROGRESS is returned!) + * Returns : err_t return code + * - ESPCONN_OK if hostname is a valid IP address string or the host + * name is already in the local names table. + * - ESPCONN_INPROGRESS enqueue a request to be sent to the DNS server + * for resolution if no errors are present. + * - ESPCONN_ARG: dns client not initialized or invalid hostname +*******************************************************************************/ + +err_t espconn_gethostbyname(struct espconn *pespconn, const char *hostname, ip_addr_t *addr, dns_found_callback found); + +/****************************************************************************** + * FunctionName : espconn_abort + * Description : Forcely abort with host + * Parameters : espconn -- the espconn used to connect with the host + * Returns : result +*******************************************************************************/ + +sint8 espconn_abort(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_encry_connect + * Description : The function given as connection + * Parameters : espconn -- the espconn used to connect with the host + * Returns : none +*******************************************************************************/ + +sint8 espconn_secure_connect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_encry_disconnect + * Description : The function given as the disconnection + * Parameters : espconn -- the espconn used to disconnect with the host + * Returns : none +*******************************************************************************/ + +sint8 espconn_secure_disconnect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_secure_send + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +sint8 espconn_secure_send(struct espconn *espconn, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_encry_sent + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +sint8 espconn_secure_sent(struct espconn *espconn, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_secure_set_size + * Description : set the buffer size for client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * size -- buffer size + * Returns : true or false +*******************************************************************************/ + +bool espconn_secure_set_size(uint8 level, uint16 size); + +/****************************************************************************** + * FunctionName : espconn_secure_get_size + * Description : get buffer size for client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : buffer size for client or server +*******************************************************************************/ + +sint16 espconn_secure_get_size(uint8 level); + +/****************************************************************************** + * FunctionName : espconn_secure_ca_enable + * Description : enable the certificate authenticate and set the flash sector + * as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * flash_sector -- flash sector for save certificate + * Returns : result true or false +*******************************************************************************/ + +bool espconn_secure_ca_enable(uint8 level, uint32 flash_sector ); + +/****************************************************************************** + * FunctionName : espconn_secure_ca_disable + * Description : disable the certificate authenticate as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : result true or false +*******************************************************************************/ + +bool espconn_secure_ca_disable(uint8 level); + + +/****************************************************************************** + * FunctionName : espconn_secure_cert_req_enable + * Description : enable the client certificate authenticate and set the flash sector + * as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * flash_sector -- flash sector for save certificate + * Returns : result true or false +*******************************************************************************/ + +bool espconn_secure_cert_req_enable(uint8 level, uint32 flash_sector ); + +/****************************************************************************** + * FunctionName : espconn_secure_ca_disable + * Description : disable the client certificate authenticate as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : result true or false +*******************************************************************************/ + +bool espconn_secure_cert_req_disable(uint8 level); + +/****************************************************************************** + * FunctionName : espconn_secure_set_default_certificate + * Description : Load the certificates in memory depending on compile-time + * and user options. + * Parameters : certificate -- Load the certificate + * length -- Load the certificate length + * Returns : result true or false +*******************************************************************************/ + +bool espconn_secure_set_default_certificate(const uint8* certificate, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_secure_set_default_private_key + * Description : Load the key in memory depending on compile-time + * and user options. + * Parameters : private_key -- Load the key + * length -- Load the key length + * Returns : result true or false +*******************************************************************************/ + +bool espconn_secure_set_default_private_key(const uint8* private_key, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_secure_accept + * Description : The function given as the listen + * Parameters : espconn -- the espconn used to listen the connection + * Returns : result +*******************************************************************************/ + +sint8 espconn_secure_accept(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_secure_accepts + * Description : delete the secure server host + * Parameters : espconn -- the espconn used to listen the connection + * Returns : result +*******************************************************************************/ + +sint8 espconn_secure_delete(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_igmp_join + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +sint8 espconn_igmp_join(ip_addr_t *host_ip, ip_addr_t *multicast_ip); + +/****************************************************************************** + * FunctionName : espconn_igmp_leave + * Description : leave a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +sint8 espconn_igmp_leave(ip_addr_t *host_ip, ip_addr_t *multicast_ip); + +/****************************************************************************** + * FunctionName : espconn_recv_hold + * Description : hold tcp receive + * Parameters : espconn -- espconn to hold + * Returns : none +*******************************************************************************/ +sint8 espconn_recv_hold(struct espconn *pespconn); + +/****************************************************************************** + * FunctionName : espconn_recv_unhold + * Description : unhold tcp receive + * Parameters : espconn -- espconn to unhold + * Returns : none +*******************************************************************************/ +sint8 espconn_recv_unhold(struct espconn *pespconn); + +/****************************************************************************** + * FunctionName : espconn_recved_len + * Description : get TCP readable data bytes + * Parameters : espconn -- espconn to unhold + * Returns : result +*******************************************************************************/ +sint16 espconn_recved_len(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_mdns_init + * Description : register a device with mdns + * Parameters : ipAddr -- the ip address of device + * hostname -- the hostname of device + * Returns : none +*******************************************************************************/ + +void espconn_mdns_init(struct mdns_info *info); +/****************************************************************************** + * FunctionName : espconn_mdns_close + * Description : close a device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ + +void espconn_mdns_close(void); +/****************************************************************************** + * FunctionName : espconn_mdns_server_register + * Description : register a device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ +void espconn_mdns_server_register(void); + +/****************************************************************************** + * FunctionName : espconn_mdns_server_unregister + * Description : unregister a device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ +void espconn_mdns_server_unregister(void); + +/****************************************************************************** + * FunctionName : espconn_mdns_get_servername + * Description : get server name of device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ + +char* espconn_mdns_get_servername(void); +/****************************************************************************** + * FunctionName : espconn_mdns_set_servername + * Description : set server name of device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ +void espconn_mdns_set_servername(const char *name); + +/****************************************************************************** + * FunctionName : espconn_mdns_set_hostname + * Description : set host name of device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ +void espconn_mdns_set_hostname(char *name); + +/****************************************************************************** + * FunctionName : espconn_mdns_get_hostname + * Description : get host name of device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ +char* espconn_mdns_get_hostname(void); + +/****************************************************************************** + * FunctionName : espconn_mdns_disable + * Description : disable a device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ +void espconn_mdns_disable(void); + +/****************************************************************************** + * FunctionName : espconn_mdns_enable + * Description : disable a device with mdns + * Parameters : a + * Returns : none +*******************************************************************************/ +void espconn_mdns_enable(void); +/****************************************************************************** + * FunctionName : espconn_dns_setserver + * Description : Initialize one of the DNS servers. + * Parameters : numdns -- the index of the DNS server to set must + * be < DNS_MAX_SERVERS = 2 + * dnsserver -- IP address of the DNS server to set + * Returns : none +*******************************************************************************/ +void espconn_dns_setserver(uint8 numdns, ip_addr_t *dnsserver); +/****************************************************************************** + * FunctionName : espconn_dns_getserver + * Description : get dns server. + * Parameters : numdns -- the index of the DNS server, must + * be < DNS_MAX_SERVERS = 2 + * Returns : dnsserver -- IP address of the DNS server to set +*******************************************************************************/ +ip_addr_t espconn_dns_getserver(uint8 numdns); +#endif + diff --git a/examples/ESP8266_NONOS_SDK/include/espnow.h b/examples/ESP8266_NONOS_SDK/include/espnow.h new file mode 100644 index 0000000..220412c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/espnow.h @@ -0,0 +1,73 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __ESPNOW_H__ +#define __ESPNOW_H__ + +enum esp_now_role { + ESP_NOW_ROLE_IDLE = 0, + ESP_NOW_ROLE_CONTROLLER, + ESP_NOW_ROLE_SLAVE, + ESP_NOW_ROLE_COMBO, + ESP_NOW_ROLE_MAX, +}; + +typedef void (*esp_now_recv_cb_t)(u8 *mac_addr, u8 *data, u8 len); +typedef void (*esp_now_send_cb_t)(u8 *mac_addr, u8 status); + +int esp_now_init(void); +int esp_now_deinit(void); + +int esp_now_register_send_cb(esp_now_send_cb_t cb); +int esp_now_unregister_send_cb(void); + +int esp_now_register_recv_cb(esp_now_recv_cb_t cb); +int esp_now_unregister_recv_cb(void); + +int esp_now_send(u8 *da, u8 *data, int len); + +int esp_now_add_peer(u8 *mac_addr, u8 role, u8 channel, u8 *key, u8 key_len); +int esp_now_del_peer(u8 *mac_addr); + +int esp_now_set_self_role(u8 role); +int esp_now_get_self_role(void); + +int esp_now_set_peer_role(u8 *mac_addr, u8 role); +int esp_now_get_peer_role(u8 *mac_addr); + +int esp_now_set_peer_channel(u8 *mac_addr, u8 channel); +int esp_now_get_peer_channel(u8 *mac_addr); + +int esp_now_set_peer_key(u8 *mac_addr, u8 *key, u8 key_len); +int esp_now_get_peer_key(u8 *mac_addr, u8 *key, u8 *key_len); + +u8 *esp_now_fetch_peer(bool restart); + +int esp_now_is_peer_exist(u8 *mac_addr); + +int esp_now_get_cnt_info(u8 *all_cnt, u8 *encrypt_cnt); + +int esp_now_set_kok(u8 *key, u8 len); + +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/ets_sys.h b/examples/ESP8266_NONOS_SDK/include/ets_sys.h new file mode 100755 index 0000000..c4bc215 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/ets_sys.h @@ -0,0 +1,132 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef _ETS_SYS_H +#define _ETS_SYS_H + +#include "c_types.h" +#include "eagle_soc.h" + +typedef uint32_t ETSSignal; +typedef uint32_t ETSParam; + +typedef struct ETSEventTag ETSEvent; + +struct ETSEventTag { + ETSSignal sig; + ETSParam par; +}; + +typedef void (*ETSTask)(ETSEvent *e); + +/* timer related */ +typedef uint32_t ETSHandle; +typedef void ETSTimerFunc(void *timer_arg); + +typedef struct _ETSTIMER_ { + struct _ETSTIMER_ *timer_next; + uint32_t timer_expire; + uint32_t timer_period; + ETSTimerFunc *timer_func; + void *timer_arg; +} ETSTimer; + +/* interrupt related */ +#define ETS_SDIO_INUM 1 +#define ETS_SPI_INUM 2 +#define ETS_GPIO_INUM 4 +#define ETS_UART_INUM 5 +#define ETS_UART1_INUM 5 +#define ETS_FRC_TIMER1_INUM 9 /* use edge*/ + +typedef void (* ets_isr_t)(void *); + +void ets_intr_lock(void); +void ets_intr_unlock(void); +void ets_isr_attach(int i, ets_isr_t func, void *arg); +void ets_isr_mask(uint32 mask); +void ets_isr_unmask(uint32 unmask); + +void NmiTimSetFunc(void (*func)(void)); + +#define ETS_INTR_LOCK() \ + ets_intr_lock() + +#define ETS_INTR_UNLOCK() \ + ets_intr_unlock() + +#define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \ + ets_isr_attach(ETS_FRC_TIMER1_INUM, (func), (void *)(arg)) + +#define ETS_FRC_TIMER1_NMI_INTR_ATTACH(func) \ + NmiTimSetFunc(func) + +#define ETS_SDIO_INTR_ATTACH(func, arg)\ + ets_isr_attach(ETS_SDIO_INUM, (func), (void *)(arg)) + +#define ETS_GPIO_INTR_ATTACH(func, arg) \ + ets_isr_attach(ETS_GPIO_INUM, (func), (void *)(arg)) + +#define ETS_UART_INTR_ATTACH(func, arg) \ + ets_isr_attach(ETS_UART_INUM, (func), (void *)(arg)) + +#define ETS_SPI_INTR_ATTACH(func, arg) \ + ets_isr_attach(ETS_SPI_INUM, (func), (void *)(arg)) + +#define ETS_INTR_ENABLE(inum) \ + ets_isr_unmask((1< + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#define GPIO_PIN_ADDR(i) (GPIO_PIN0_ADDRESS + i*4) + +#define GPIO_ID_IS_PIN_REGISTER(reg_id) \ + ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1))) + +#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0) + +typedef enum { + GPIO_PIN_INTR_DISABLE = 0, + GPIO_PIN_INTR_POSEDGE = 1, + GPIO_PIN_INTR_NEGEDGE = 2, + GPIO_PIN_INTR_ANYEDGE = 3, + GPIO_PIN_INTR_LOLEVEL = 4, + GPIO_PIN_INTR_HILEVEL = 5 +} GPIO_INT_TYPE; + +#define GPIO_OUTPUT_SET(gpio_no, bit_value) \ + gpio_output_set((bit_value)<>gpio_no)&BIT0) + +/* GPIO interrupt handler, registered through gpio_intr_handler_register */ +typedef void (* gpio_intr_handler_fn_t)(uint32 intr_mask, void *arg); + + +/* + * Initialize GPIO. This includes reading the GPIO Configuration DataSet + * to initialize "output enables" and pin configurations for each gpio pin. + * Must be called once during startup. + */ +void gpio_init(void); + +/* + * Change GPIO pin output by setting, clearing, or disabling pins. + * In general, it is expected that a bit will be set in at most one + * of these masks. If a bit is clear in all masks, the output state + * remains unchanged. + * + * There is no particular ordering guaranteed; so if the order of + * writes is significant, calling code should divide a single call + * into multiple calls. + */ +void gpio_output_set(uint32 set_mask, + uint32 clear_mask, + uint32 enable_mask, + uint32 disable_mask); + +/* + * Sample the value of GPIO input pins and returns a bitmask. + */ +uint32 gpio_input_get(void); + +/* + * Set the specified GPIO register to the specified value. + * This is a very general and powerful interface that is not + * expected to be used during normal operation. It is intended + * mainly for debug, or for unusual requirements. + */ +void gpio_register_set(uint32 reg_id, uint32 value); + +/* Get the current value of the specified GPIO register. */ +uint32 gpio_register_get(uint32 reg_id); + +/* + * Register an application-specific interrupt handler for GPIO pin + * interrupts. Once the interrupt handler is called, it will not + * be called again until after a call to gpio_intr_ack. Any GPIO + * interrupts that occur during the interim are masked. + * + * The application-specific handler is called with a mask of + * pending GPIO interrupts. After processing pin interrupts, the + * application-specific handler may wish to use gpio_intr_pending + * to check for any additional pending interrupts before it returns. + */ +void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg); + +/* Determine which GPIO interrupts are pending. */ +uint32 gpio_intr_pending(void); + +/* + * Acknowledge GPIO interrupts. + * Intended to be called from the gpio_intr_handler_fn. + */ +void gpio_intr_ack(uint32 ack_mask); + +void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state); + +void gpio_pin_wakeup_disable(); + +void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state); + +#endif // _GPIO_H_ diff --git a/examples/ESP8266_NONOS_SDK/include/ip_addr.h b/examples/ESP8266_NONOS_SDK/include/ip_addr.h new file mode 100644 index 0000000..2f2767e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/ip_addr.h @@ -0,0 +1,87 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __IP_ADDR_H__ +#define __IP_ADDR_H__ + +#include "c_types.h" + +struct ip_addr { + uint32 addr; +}; + +typedef struct ip_addr ip_addr_t; + +struct ip_info { + struct ip_addr ip; + struct ip_addr netmask; + struct ip_addr gw; +}; + +/** + * Determine if two address are on the same network. + * + * @arg addr1 IP address 1 + * @arg addr2 IP address 2 + * @arg mask network identifier mask + * @return !0 if the network identifiers of both address match + */ +#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \ + (mask)->addr) == \ + ((addr2)->addr & \ + (mask)->addr)) + +/** Set an IP address given by the four byte-parts. + Little-endian version that prevents the use of htonl. */ +#define IP4_ADDR(ipaddr, a,b,c,d) \ + (ipaddr)->addr = ((uint32)((d) & 0xff) << 24) | \ + ((uint32)((c) & 0xff) << 16) | \ + ((uint32)((b) & 0xff) << 8) | \ + (uint32)((a) & 0xff) + +#define ip4_addr1(ipaddr) (((uint8*)(ipaddr))[0]) +#define ip4_addr2(ipaddr) (((uint8*)(ipaddr))[1]) +#define ip4_addr3(ipaddr) (((uint8*)(ipaddr))[2]) +#define ip4_addr4(ipaddr) (((uint8*)(ipaddr))[3]) + +#define ip4_addr1_16(ipaddr) ((uint16)ip4_addr1(ipaddr)) +#define ip4_addr2_16(ipaddr) ((uint16)ip4_addr2(ipaddr)) +#define ip4_addr3_16(ipaddr) ((uint16)ip4_addr3(ipaddr)) +#define ip4_addr4_16(ipaddr) ((uint16)ip4_addr4(ipaddr)) + + +/** 255.255.255.255 */ +#define IPADDR_NONE ((uint32)0xffffffffUL) +/** 0.0.0.0 */ +#define IPADDR_ANY ((uint32)0x00000000UL) +uint32 ipaddr_addr(const char *cp); + +#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \ + ip4_addr2_16(ipaddr), \ + ip4_addr3_16(ipaddr), \ + ip4_addr4_16(ipaddr) + +#define IPSTR "%d.%d.%d.%d" + +#endif /* __IP_ADDR_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/include/json/json.h b/examples/ESP8266_NONOS_SDK/include/json/json.h new file mode 100644 index 0000000..2308b5b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/json/json.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2011-2012, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the Contiki operating system. + */ + +/** + * \file + * A few JSON defines used for parsing and generating JSON. + * \author + * Niclas Finne + * Joakim Eriksson + */ + +#ifndef __JSON_H__ +#define __JSON_H__ + +#define JSON_TYPE_ARRAY '[' +#define JSON_TYPE_OBJECT '{' +#define JSON_TYPE_PAIR ':' +#define JSON_TYPE_PAIR_NAME 'N' /* for N:V pairs */ +#define JSON_TYPE_STRING '"' +#define JSON_TYPE_INT 'I' +#define JSON_TYPE_NUMBER '0' +#define JSON_TYPE_ERROR 0 + +/* how should we handle null vs false - both can be 0? */ +#define JSON_TYPE_NULL 'n' +#define JSON_TYPE_TRUE 't' +#define JSON_TYPE_FALSE 'f' + +#define JSON_TYPE_CALLBACK 'C' + +enum { + JSON_ERROR_OK, + JSON_ERROR_SYNTAX, + JSON_ERROR_UNEXPECTED_ARRAY, + JSON_ERROR_UNEXPECTED_END_OF_ARRAY, + JSON_ERROR_UNEXPECTED_OBJECT, + JSON_ERROR_UNEXPECTED_STRING +}; + +#define JSON_CONTENT_TYPE "application/json" + +#endif /* __JSON_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/include/json/jsonparse.h b/examples/ESP8266_NONOS_SDK/include/json/jsonparse.h new file mode 100644 index 0000000..e1cb67a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/json/jsonparse.h @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2011-2012, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the Contiki operating system. + */ + +#ifndef __JSONPARSE_H__ +#define __JSONPARSE_H__ + +#include "c_types.h" +#include "json/json.h" + +#ifdef JSONPARSE_CONF_MAX_DEPTH +#define JSONPARSE_MAX_DEPTH JSONPARSE_CONF_MAX_DEPTH +#else +#define JSONPARSE_MAX_DEPTH 10 +#endif + +struct jsonparse_state { + const char *json; + int pos; + int len; + int depth; + /* for handling atomic values */ + int vstart; + int vlen; + char vtype; + char error; + char stack[JSONPARSE_MAX_DEPTH]; +}; + +/** + * \brief Initialize a JSON parser state. + * \param state A pointer to a JSON parser state + * \param json The string to parse as JSON + * \param len The length of the string to parse + * + * This function initializes a JSON parser state for + * parsing a string as JSON. + */ +void jsonparse_setup(struct jsonparse_state *state, const char *json, + int len); + +/* move to next JSON element */ +int jsonparse_next(struct jsonparse_state *state); + +/* copy the current JSON value into the specified buffer */ +int jsonparse_copy_value(struct jsonparse_state *state, char *buf, + int buf_size); + +/* get the current JSON value parsed as an int */ +int jsonparse_get_value_as_int(struct jsonparse_state *state); + +/* get the current JSON value parsed as a long */ +long jsonparse_get_value_as_long(struct jsonparse_state *state); + +/* get the current JSON value parsed as a unsigned long */ +unsigned long jsonparse_get_value_as_ulong(struct jsonparse_state *state); + +/* get the length of the current JSON value */ +int jsonparse_get_len(struct jsonparse_state *state); + +/* get the type of the current JSON value */ +int jsonparse_get_type(struct jsonparse_state *state); + +/* compare the JSON value with the specified string */ +int jsonparse_strcmp_value(struct jsonparse_state *state, const char *str); + +#endif /* __JSONPARSE_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/include/json/jsontree.h b/examples/ESP8266_NONOS_SDK/include/json/jsontree.h new file mode 100644 index 0000000..0ffe9d1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/json/jsontree.h @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2011-2012, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the Contiki operating system. + */ + +/** + * \file + * JSON output generation + * \author + * Niclas Finne + * Joakim Eriksson + */ + +#ifndef __JSONTREE_H__ +#define __JSONTREE_H__ + +#include "c_types.h" +#include "json/json.h" + +#ifdef JSONTREE_CONF_MAX_DEPTH +#define JSONTREE_MAX_DEPTH JSONTREE_CONF_MAX_DEPTH +#else +#define JSONTREE_MAX_DEPTH 10 +#endif /* JSONTREE_CONF_MAX_DEPTH */ + +struct jsontree_context { + struct jsontree_value *values[JSONTREE_MAX_DEPTH]; + uint16_t index[JSONTREE_MAX_DEPTH]; + int (* putchar)(int); + uint8_t depth; + uint8_t path; + int callback_state; +}; + +struct jsontree_value { + uint8_t type; + /* followed by a value */ +}; + +struct jsontree_string { + uint8_t type; + const char *value; +}; + +struct jsontree_int { + uint8_t type; + int value; +}; + +/* NOTE: the jsontree_callback set will receive a jsonparse state */ +struct jsonparse_state; +struct jsontree_callback { + uint8_t type; + int (* output)(struct jsontree_context *js_ctx); + int (* set)(struct jsontree_context *js_ctx, struct jsonparse_state *parser); +}; + +struct jsontree_pair { + const char *name; + struct jsontree_value *value; +}; + +struct jsontree_object { + uint8_t type; + uint8_t count; + struct jsontree_pair *pairs; +}; + +struct jsontree_array { + uint8_t type; + uint8_t count; + struct jsontree_value **values; +}; + +#define JSONTREE_STRING(text) {JSON_TYPE_STRING, (text)} +#define JSONTREE_PAIR(name, value) {(name), (struct jsontree_value *)(value)} +#define JSONTREE_CALLBACK(output, set) {JSON_TYPE_CALLBACK, (output), (set)} + +#define JSONTREE_OBJECT(name, ...) \ + static struct jsontree_pair jsontree_pair_##name[] = {__VA_ARGS__}; \ + static struct jsontree_object name = { \ + JSON_TYPE_OBJECT, \ + sizeof(jsontree_pair_##name)/sizeof(struct jsontree_pair), \ + jsontree_pair_##name } + +#define JSONTREE_PAIR_ARRAY(value) (struct jsontree_value *)(value) +#define JSONTREE_ARRAY(name, ...) \ + static struct jsontree_value* jsontree_value_##name[] = {__VA_ARGS__}; \ + static struct jsontree_array name = { \ + JSON_TYPE_ARRAY, \ + sizeof(jsontree_value_##name)/sizeof(struct jsontree_value*), \ + jsontree_value_##name } + +#define JSONTREE_OBJECT_EXT(name, ...) \ + static struct jsontree_pair jsontree_pair_##name[] = {__VA_ARGS__}; \ + struct jsontree_object name = { \ + JSON_TYPE_OBJECT, \ + sizeof(jsontree_pair_##name)/sizeof(struct jsontree_pair), \ + jsontree_pair_##name } + +void jsontree_setup(struct jsontree_context *js_ctx, + struct jsontree_value *root, int (* putchar)(int)); +void jsontree_reset(struct jsontree_context *js_ctx); + +const char *jsontree_path_name(const struct jsontree_context *js_ctx, + int depth); + +void jsontree_write_int(const struct jsontree_context *js_ctx, int value); +void jsontree_write_int_array(const struct jsontree_context *js_ctx, const int *text, uint32 length); + +void jsontree_write_atom(const struct jsontree_context *js_ctx, + const char *text); +void jsontree_write_string(const struct jsontree_context *js_ctx, + const char *text); +int jsontree_print_next(struct jsontree_context *js_ctx); +struct jsontree_value *jsontree_find_next(struct jsontree_context *js_ctx, + int type); + +#endif /* __JSONTREE_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/include/mem.h b/examples/ESP8266_NONOS_SDK/include/mem.h new file mode 100755 index 0000000..bd3c592 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/mem.h @@ -0,0 +1,123 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __MEM_H__ +#define __MEM_H__ + +#include + +#include "c_types.h" + +/* Note: check_memleak_debug_enable is a weak function inside SDK. + * please copy following codes to user_main.c. +#include "mem.h" + +bool ICACHE_FLASH_ATTR check_memleak_debug_enable(void) +{ + return MEMLEAK_DEBUG_ENABLE; +} +*/ + +void *pvPortMalloc (size_t sz, const char *, unsigned, bool); +void vPortFree (void *p, const char *, unsigned); +void *pvPortZalloc (size_t sz, const char *, unsigned); +void *pvPortRealloc (void *p, size_t n, const char *, unsigned); +void* pvPortCalloc(size_t count,size_t size,const char *,unsigned); +void* pvPortCallocIram(size_t count,size_t size,const char *,unsigned); +void *pvPortZallocIram (size_t sz, const char *, unsigned); + +#ifndef MEMLEAK_DEBUG +#define MEMLEAK_DEBUG_ENABLE 0 +#define os_free(s) vPortFree(s, "", __LINE__) +#define os_malloc_iram(s) pvPortMalloc(s, "", __LINE__,true) +#define os_malloc_dram(s) pvPortMalloc(s, "", __LINE__,false) +#define os_calloc_iram(l, s) pvPortCallocIram(l, s, "", __LINE__) +#define os_calloc_dram(l, s) pvPortCalloc(l, s, "", __LINE__) +#define os_realloc(p, s) pvPortRealloc(p, s, "", __LINE__) +#define os_zalloc_iram(s) pvPortZallocIram(s, "", __LINE__) +#define os_zalloc_dram(s) pvPortZalloc(s, "", __LINE__) +#else +#define MEMLEAK_DEBUG_ENABLE 1 + +#define os_free(s) \ +do{\ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + vPortFree(s, mem_debug_file, __LINE__);\ +}while(0) + +#define os_malloc_iram(s) \ + ({ \ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + pvPortMalloc(s, mem_debug_file, __LINE__,true); \ + }) + +#define os_malloc_dram(s) \ + ({ \ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + pvPortMalloc(s, mem_debug_file, __LINE__,false); \ + }) + +#define os_calloc_iram(l, s) \ + ({ \ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + pvPortCallocIram(l, s, mem_debug_file, __LINE__); \ + }) + +#define os_calloc_dram(l, s) \ + ({ \ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + pvPortCalloc(l, s, mem_debug_file, __LINE__); \ + }) + +#define os_realloc(p, s) \ + ({ \ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + pvPortRealloc(p, s, mem_debug_file, __LINE__); \ + }) + +#define os_zalloc_iram(s) \ + ({ \ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + pvPortZallocIram(s, mem_debug_file, __LINE__); \ + }) + +#define os_zalloc_dram(s) \ + ({ \ + static const char mem_debug_file[] ICACHE_RODATA_ATTR STORE_ATTR = __FILE__; \ + pvPortZalloc(s, mem_debug_file, __LINE__); \ + }) + +#endif + +#ifdef MEM_DEFAULT_USE_DRAM +#define os_malloc os_malloc_dram +#define os_zalloc os_zalloc_dram +#define os_calloc os_calloc_dram +#else +#define os_malloc os_malloc_iram +#define os_zalloc os_zalloc_iram +#define os_calloc os_calloc_iram +#endif +#endif + diff --git a/examples/ESP8266_NONOS_SDK/include/os_type.h b/examples/ESP8266_NONOS_SDK/include/os_type.h new file mode 100644 index 0000000..9e43472 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/os_type.h @@ -0,0 +1,37 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef _OS_TYPES_H_ +#define _OS_TYPES_H_ + +#include "ets_sys.h" + +#define os_signal_t ETSSignal +#define os_param_t ETSParam +#define os_event_t ETSEvent +#define os_task_t ETSTask +#define os_timer_t ETSTimer +#define os_timer_func_t ETSTimerFunc + +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/osapi.h b/examples/ESP8266_NONOS_SDK/include/osapi.h new file mode 100755 index 0000000..317e907 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/osapi.h @@ -0,0 +1,99 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef _OSAPI_H_ +#define _OSAPI_H_ + +#include +#include "os_type.h" +#include "user_config.h" + +void ets_bzero(void *s, size_t n); +void ets_delay_us(uint32_t us); +void ets_install_putc1(void (*p)(char c)); + +#define os_bzero ets_bzero +#define os_delay_us ets_delay_us +#define os_install_putc1 ets_install_putc1 + +int ets_memcmp(const void *str1, const void *str2, unsigned int nbyte); +void *ets_memcpy(void *dest, const void *src, unsigned int nbyte); +void *ets_memmove(void *dest, const void *src, unsigned int nbyte); +void *ets_memset(void *dest, int val, unsigned int nbyte); + +int ets_strcmp(const char *s1, const char *s2); +char *ets_strcpy(char *s1, const char *s2); +int ets_strlen(const char *s); +int ets_strncmp(const char *s1, const char *s2, unsigned int n); +char *ets_strncpy(char *s1, const char *s2, unsigned int n); +char *ets_strstr(const char *s1, const char *s2); + +#define os_memcmp ets_memcmp +#define os_memcpy ets_memcpy +#define os_memmove ets_memmove +#define os_memset ets_memset +#define os_strcat strcat +#define os_strchr strchr +#define os_strcmp ets_strcmp +#define os_strcpy ets_strcpy +#define os_strlen ets_strlen +#define os_strncmp ets_strncmp +#define os_strncpy ets_strncpy +#define os_strstr ets_strstr + +void ets_timer_arm_new(os_timer_t *ptimer, uint32_t time, bool repeat_flag, bool ms_flag); +void ets_timer_disarm(os_timer_t *ptimer); +void ets_timer_setfn(os_timer_t *ptimer, os_timer_func_t *pfunction, void *parg); + +#ifdef USE_US_TIMER +#define os_timer_arm_us(a, b, c) ets_timer_arm_new(a, b, c, 0) +#endif +#define os_timer_arm(a, b, c) ets_timer_arm_new(a, b, c, 1) +#define os_timer_disarm ets_timer_disarm +#define os_timer_setfn ets_timer_setfn + +int ets_sprintf(char *str, const char *format, ...) __attribute__ ((format (printf, 2, 3))); +int os_printf_plus(const char *format, ...) __attribute__ ((format (printf, 1, 2))); +int ets_snprintf(char *str, unsigned int size, const char *format, ...) __attribute__ ((format (printf, 3, 4))); + +#define os_sprintf_plus ets_sprintf +#define os_sprintf(buf, fmt, ...) os_sprintf_plus(buf, fmt, ##__VA_ARGS__) + +#define os_snprintf_plus ets_snprintf +#define os_snprintf(buf, size, fmt, ...) os_snprintf_plus(buf, size, fmt, ##__VA_ARGS__) + +#ifdef USE_OPTIMIZE_PRINTF +#define os_printf(fmt, ...) do { \ + static const char flash_str[] ICACHE_RODATA_ATTR STORE_ATTR = fmt; \ + os_printf_plus(flash_str, ##__VA_ARGS__); \ + } while(0) +#else +#define os_printf os_printf_plus +#endif + +unsigned long os_random(void); +int os_get_random(unsigned char *buf, size_t len); + +#endif + diff --git a/examples/ESP8266_NONOS_SDK/include/ping.h b/examples/ESP8266_NONOS_SDK/include/ping.h new file mode 100644 index 0000000..6537a7a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/ping.h @@ -0,0 +1,56 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __PING_H__ +#define __PING_H__ + + +typedef void (* ping_recv_function)(void* arg, void *pdata); +typedef void (* ping_sent_function)(void* arg, void *pdata); + +struct ping_option{ + uint32 count; + uint32 ip; + uint32 coarse_time; + ping_recv_function recv_function; + ping_sent_function sent_function; + void* reverse; +}; + +struct ping_resp{ + uint32 total_count; + uint32 resp_time; + uint32 seqno; + uint32 timeout_count; + uint32 bytes; + uint32 total_bytes; + uint32 total_time; + sint8 ping_err; +}; + +bool ping_start(struct ping_option *ping_opt); +bool ping_regist_recv(struct ping_option *ping_opt, ping_recv_function ping_recv); +bool ping_regist_sent(struct ping_option *ping_opt, ping_sent_function ping_sent); + +#endif /* __PING_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/include/pwm.h b/examples/ESP8266_NONOS_SDK/include/pwm.h new file mode 100644 index 0000000..eae782f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/pwm.h @@ -0,0 +1,58 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __PWM_H__ +#define __PWM_H__ + +/*pwm.h: function and macro definition of PWM API , driver level */ +/*user_light.h: user interface for light API, user level*/ +/*user_light_adj: API for color changing and lighting effects, user level*/ + + + /*NOTE!! : DO NOT CHANGE THIS FILE*/ + + /*SUPPORT UP TO 8 PWM CHANNEL*/ +#define PWM_CHANNEL_NUM_MAX 8 + +struct pwm_param { + uint32 period; + uint32 freq; + uint32 duty[PWM_CHANNEL_NUM_MAX]; //PWM_CHANNEL<=8 +}; + + +/* pwm_init should be called only once, for now */ +void pwm_init(uint32 period, uint32 *duty,uint32 pwm_channel_num,uint32 (*pin_info_list)[3]); +void pwm_start(void); + +void pwm_set_duty(uint32 duty, uint8 channel); +uint32 pwm_get_duty(uint8 channel); +void pwm_set_period(uint32 period); +uint32 pwm_get_period(void); + +uint32 get_pwm_version(void); +void set_pwm_debug_en(uint8 print_en); + +#endif + diff --git a/examples/ESP8266_NONOS_SDK/include/queue.h b/examples/ESP8266_NONOS_SDK/include/queue.h new file mode 100644 index 0000000..579e5a8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/queue.h @@ -0,0 +1,236 @@ +/*- + * Copyright (c) 1991, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)queue.h 8.5 (Berkeley) 8/20/94 + * $FreeBSD$ + */ + +#ifndef _SYS_QUEUE_H_ +#define _SYS_QUEUE_H_ + +#define QMD_SAVELINK(name, link) +#define TRASHIT(x) + +/* + * Singly-linked List declarations. + */ +#define SLIST_HEAD(name, type) \ +struct name { \ + struct type *slh_first; /* first element */ \ +} + +#define SLIST_HEAD_INITIALIZER(head) \ + { NULL } + +#define SLIST_ENTRY(type) \ +struct { \ + struct type *sle_next; /* next element */ \ +} + +/* + * Singly-linked List functions. + */ +#define SLIST_EMPTY(head) ((head)->slh_first == NULL) + +#define SLIST_FIRST(head) ((head)->slh_first) + +#define SLIST_FOREACH(var, head, field) \ + for ((var) = SLIST_FIRST((head)); \ + (var); \ + (var) = SLIST_NEXT((var), field)) + +#define SLIST_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = SLIST_FIRST((head)); \ + (var) && ((tvar) = SLIST_NEXT((var), field), 1); \ + (var) = (tvar)) + +#define SLIST_FOREACH_PREVPTR(var, varp, head, field) \ + for ((varp) = &SLIST_FIRST((head)); \ + ((var) = *(varp)) != NULL; \ + (varp) = &SLIST_NEXT((var), field)) + +#define SLIST_INIT(head) do { \ + SLIST_FIRST((head)) = NULL; \ +} while (0) + +#define SLIST_INSERT_AFTER(slistelm, elm, field) do { \ + SLIST_NEXT((elm), field) = SLIST_NEXT((slistelm), field); \ + SLIST_NEXT((slistelm), field) = (elm); \ +} while (0) + +#define SLIST_INSERT_HEAD(head, elm, field) do { \ + SLIST_NEXT((elm), field) = SLIST_FIRST((head)); \ + SLIST_FIRST((head)) = (elm); \ +} while (0) + +#define SLIST_NEXT(elm, field) ((elm)->field.sle_next) + +#define SLIST_REMOVE(head, elm, type, field) do { \ + QMD_SAVELINK(oldnext, (elm)->field.sle_next); \ + if (SLIST_FIRST((head)) == (elm)) { \ + SLIST_REMOVE_HEAD((head), field); \ + } \ + else { \ + struct type *curelm = SLIST_FIRST((head)); \ + while (SLIST_NEXT(curelm, field) != (elm)) \ + curelm = SLIST_NEXT(curelm, field); \ + SLIST_REMOVE_AFTER(curelm, field); \ + } \ + TRASHIT(*oldnext); \ +} while (0) + +#define SLIST_REMOVE_AFTER(elm, field) do { \ + SLIST_NEXT(elm, field) = \ + SLIST_NEXT(SLIST_NEXT(elm, field), field); \ +} while (0) + +#define SLIST_REMOVE_HEAD(head, field) do { \ + SLIST_FIRST((head)) = SLIST_NEXT(SLIST_FIRST((head)), field); \ +} while (0) + +/* + * Singly-linked Tail queue declarations. + */ +#define STAILQ_HEAD(name, type) \ + struct name { \ + struct type *stqh_first;/* first element */ \ + struct type **stqh_last;/* addr of last next element */ \ + } + +#define STAILQ_HEAD_INITIALIZER(head) \ + { NULL, &(head).stqh_first } + +#define STAILQ_ENTRY(type) \ + struct { \ + struct type *stqe_next; /* next element */ \ + } + +/* + * Singly-linked Tail queue functions. + */ +#define STAILQ_CONCAT(head1, head2) do { \ + if (!STAILQ_EMPTY((head2))) { \ + *(head1)->stqh_last = (head2)->stqh_first; \ + (head1)->stqh_last = (head2)->stqh_last; \ + STAILQ_INIT((head2)); \ + } \ + } while (0) + +#define STAILQ_EMPTY(head) ((head)->stqh_first == NULL) + +#define STAILQ_FIRST(head) ((head)->stqh_first) + +#define STAILQ_FOREACH(var, head, field) \ + for((var) = STAILQ_FIRST((head)); \ + (var); \ + (var) = STAILQ_NEXT((var), field)) + + +#define STAILQ_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = STAILQ_FIRST((head)); \ + (var) && ((tvar) = STAILQ_NEXT((var), field), 1); \ + (var) = (tvar)) + +#define STAILQ_INIT(head) do { \ + STAILQ_FIRST((head)) = NULL; \ + (head)->stqh_last = &STAILQ_FIRST((head)); \ + } while (0) + +#define STAILQ_INSERT_AFTER(head, tqelm, elm, field) do { \ + if ((STAILQ_NEXT((elm), field) = STAILQ_NEXT((tqelm), field)) == NULL)\ + (head)->stqh_last = &STAILQ_NEXT((elm), field); \ + STAILQ_NEXT((tqelm), field) = (elm); \ + } while (0) + +#define STAILQ_INSERT_HEAD(head, elm, field) do { \ + if ((STAILQ_NEXT((elm), field) = STAILQ_FIRST((head))) == NULL) \ + (head)->stqh_last = &STAILQ_NEXT((elm), field); \ + STAILQ_FIRST((head)) = (elm); \ + } while (0) + +#define STAILQ_INSERT_TAIL(head, elm, field) do { \ + STAILQ_NEXT((elm), field) = NULL; \ + *(head)->stqh_last = (elm); \ + (head)->stqh_last = &STAILQ_NEXT((elm), field); \ + } while (0) + +#define STAILQ_LAST(head, type, field) \ + (STAILQ_EMPTY((head)) ? \ + NULL : \ + ((struct type *)(void *) \ + ((char *)((head)->stqh_last) - __offsetof(struct type, field)))) + +#define STAILQ_NEXT(elm, field) ((elm)->field.stqe_next) + +#define STAILQ_REMOVE(head, elm, type, field) do { \ + QMD_SAVELINK(oldnext, (elm)->field.stqe_next); \ + if (STAILQ_FIRST((head)) == (elm)) { \ + STAILQ_REMOVE_HEAD((head), field); \ + } \ + else { \ + struct type *curelm = STAILQ_FIRST((head)); \ + while (STAILQ_NEXT(curelm, field) != (elm)) \ + curelm = STAILQ_NEXT(curelm, field); \ + STAILQ_REMOVE_AFTER(head, curelm, field); \ + } \ + TRASHIT(*oldnext); \ + } while (0) + +#define STAILQ_REMOVE_HEAD(head, field) do { \ + if ((STAILQ_FIRST((head)) = \ + STAILQ_NEXT(STAILQ_FIRST((head)), field)) == NULL) \ + (head)->stqh_last = &STAILQ_FIRST((head)); \ + } while (0) + +#define STAILQ_REMOVE_AFTER(head, elm, field) do { \ + if ((STAILQ_NEXT(elm, field) = \ + STAILQ_NEXT(STAILQ_NEXT(elm, field), field)) == NULL) \ + (head)->stqh_last = &STAILQ_NEXT((elm), field); \ + } while (0) + +#define STAILQ_SWAP(head1, head2, type) do { \ + struct type *swap_first = STAILQ_FIRST(head1); \ + struct type **swap_last = (head1)->stqh_last; \ + STAILQ_FIRST(head1) = STAILQ_FIRST(head2); \ + (head1)->stqh_last = (head2)->stqh_last; \ + STAILQ_FIRST(head2) = swap_first; \ + (head2)->stqh_last = swap_last; \ + if (STAILQ_EMPTY(head1)) \ + (head1)->stqh_last = &STAILQ_FIRST(head1); \ + if (STAILQ_EMPTY(head2)) \ + (head2)->stqh_last = &STAILQ_FIRST(head2); \ + } while (0) + +#define STAILQ_INSERT_CHAIN_HEAD(head, elm_chead, elm_ctail, field) do { \ + if ((STAILQ_NEXT(elm_ctail, field) = STAILQ_FIRST(head)) == NULL ) { \ + (head)->stqh_last = &STAILQ_NEXT(elm_ctail, field); \ + } \ + STAILQ_FIRST(head) = (elm_chead); \ + } while (0) + +#endif /* !_SYS_QUEUE_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/include/simple_pair.h b/examples/ESP8266_NONOS_SDK/include/simple_pair.h new file mode 100644 index 0000000..8014809 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/simple_pair.h @@ -0,0 +1,64 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __SIMPLE_PAIR_H__ +#define __SIMPLE_PAIR_H__ + +typedef enum { + SP_ST_STA_FINISH = 0, + SP_ST_AP_FINISH = 0, + SP_ST_AP_RECV_NEG, + SP_ST_STA_AP_REFUSE_NEG, + /* all following is err */ + SP_ST_WAIT_TIMEOUT, + SP_ST_SEND_ERROR, + SP_ST_KEY_INSTALL_ERR, + SP_ST_KEY_OVERLAP_ERR, //means the same macaddr has two different keys + SP_ST_OP_ERROR, + SP_ST_UNKNOWN_ERROR, + SP_ST_MAX, +} SP_ST_t; + + +typedef void (*simple_pair_status_cb_t)(u8 *sa, u8 status); + +int register_simple_pair_status_cb(simple_pair_status_cb_t cb); +void unregister_simple_pair_status_cb(void); + +int simple_pair_init(void); +void simple_pair_deinit(void); + +int simple_pair_state_reset(void); +int simple_pair_ap_enter_announce_mode(void); +int simple_pair_sta_enter_scan_mode(void); + +int simple_pair_sta_start_negotiate(void); +int simple_pair_ap_start_negotiate(void); +int simple_pair_ap_refuse_negotiate(void); + +int simple_pair_set_peer_ref(u8 *peer_mac, u8 *tmp_key, u8 *ex_key); +int simple_pair_get_peer_ref(u8 *peer_mac, u8 *tmp_key, u8 *ex_key); + + +#endif /* __SIMPLE_PAIR_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/include/smartconfig.h b/examples/ESP8266_NONOS_SDK/include/smartconfig.h new file mode 100644 index 0000000..6f3802a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/smartconfig.h @@ -0,0 +1,50 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __SMARTCONFIG_H__ +#define __SMARTCONFIG_H__ + +typedef enum { + SC_STATUS_WAIT = 0, + SC_STATUS_FIND_CHANNEL, + SC_STATUS_GETTING_SSID_PSWD, + SC_STATUS_LINK, + SC_STATUS_LINK_OVER, +} sc_status; + +typedef enum { + SC_TYPE_ESPTOUCH = 0, + SC_TYPE_AIRKISS, + SC_TYPE_ESPTOUCH_AIRKISS, +} sc_type; + +typedef void (*sc_callback_t)(sc_status status, void *pdata); + +const char *smartconfig_get_version(void); +bool smartconfig_start(sc_callback_t cb, ...); +bool smartconfig_stop(void); +bool esptouch_set_timeout(uint8 time_s); //15s~255s, offset:45s +bool smartconfig_set_type(sc_type type); + +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/sntp.h b/examples/ESP8266_NONOS_SDK/include/sntp.h new file mode 100644 index 0000000..db02748 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/sntp.h @@ -0,0 +1,68 @@ +#ifndef __SNTP_H__ +#define __SNTP_H__ + +#include "os_type.h" +#ifdef LWIP_OPEN_SRC +#include "lwip/ip_addr.h" +#else +#include "ip_addr.h" +#endif +/** + * get the seconds since Jan 01, 1970, 00:00 (GMT + 8) + */ +uint32 sntp_get_current_timestamp(); +/** + * get real time (GTM + 8 time zone) + */ +char* sntp_get_real_time(long t); +/** + * SNTP get time_zone default GMT + 8 + */ +sint8 sntp_get_timezone(void); +/** + * SNTP set time_zone (default GMT + 8) + */ +bool sntp_set_timezone(sint8 timezone); +/** + * Initialize this module. + * Send out request instantly or after SNTP_STARTUP_DELAY(_FUNC). + */ +void sntp_init(void); +/** + * Stop this module. + */ +void sntp_stop(void); +/** + * Initialize one of the NTP servers by IP address + * + * @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS + * @param dnsserver IP address of the NTP server to set + */ +void sntp_setserver(unsigned char idx, ip_addr_t *addr); +/** + * Obtain one of the currently configured by IP address (or DHCP) NTP servers + * + * @param numdns the index of the NTP server + * @return IP address of the indexed NTP server or "ip_addr_any" if the NTP + * server has not been configured by address (or at all). + */ +ip_addr_t sntp_getserver(unsigned char idx); +/** + * Initialize one of the NTP servers by name + * + * @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS,now sdk support SNTP_MAX_SERVERS = 3 + * @param dnsserver DNS name of the NTP server to set, to be resolved at contact time + */ +void sntp_setservername(unsigned char idx, char *server); +/** + * Obtain one of the currently configured by name NTP servers. + * + * @param numdns the index of the NTP server + * @return IP address of the indexed NTP server or NULL if the NTP + * server has not been configured by name (or at all) + */ +char *sntp_getservername(unsigned char idx); + +#define sntp_servermode_dhcp(x) + +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/spi_flash.h b/examples/ESP8266_NONOS_SDK/include/spi_flash.h new file mode 100644 index 0000000..2ff4786 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/spi_flash.h @@ -0,0 +1,61 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef SPI_FLASH_H +#define SPI_FLASH_H + +typedef enum { + SPI_FLASH_RESULT_OK, + SPI_FLASH_RESULT_ERR, + SPI_FLASH_RESULT_TIMEOUT +} SpiFlashOpResult; + +typedef struct{ + uint32 deviceId; + uint32 chip_size; // chip size in byte + uint32 block_size; + uint32 sector_size; + uint32 page_size; + uint32 status_mask; +} SpiFlashChip; + +#define SPI_FLASH_SEC_SIZE 4096 + +uint32 spi_flash_get_id(void); +SpiFlashOpResult spi_flash_erase_sector(uint16 sec); +SpiFlashOpResult spi_flash_write(uint32 des_addr, uint32 *src_addr, uint32 size); +SpiFlashOpResult spi_flash_read(uint32 src_addr, uint32 *des_addr, uint32 size); + +typedef SpiFlashOpResult (* user_spi_flash_read)( + SpiFlashChip *spi, + uint32 src_addr, + uint32 *des_addr, + uint32 size); + +void spi_flash_set_read_func(user_spi_flash_read read); + +bool spi_flash_erase_protect_enable(void); +bool spi_flash_erase_protect_disable(void); + +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/upgrade.h b/examples/ESP8266_NONOS_SDK/include/upgrade.h new file mode 100644 index 0000000..e7e6968 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/upgrade.h @@ -0,0 +1,74 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __UPGRADE_H__ +#define __UPGRADE_H__ + +#define SPI_FLASH_SEC_SIZE 4096 +#define LIMIT_ERASE_SIZE 0x10000 + +#define USER_BIN1 0x00 +#define USER_BIN2 0x01 + +#define UPGRADE_FLAG_IDLE 0x00 +#define UPGRADE_FLAG_START 0x01 +#define UPGRADE_FLAG_FINISH 0x02 + +#define UPGRADE_FW_BIN1 0x00 +#define UPGRADE_FW_BIN2 0x01 + +typedef void (*upgrade_states_check_callback)(void * arg); + +//#define UPGRADE_SSL_ENABLE + +struct upgrade_server_info { + uint8 ip[4]; + uint16 port; + + uint8 upgrade_flag; + + uint8 pre_version[16]; + uint8 upgrade_version[16]; + + uint32 check_times; + uint8 *url; + + upgrade_states_check_callback check_cb; + struct espconn *pespconn; +}; + +#define UPGRADE_FLAG_IDLE 0x00 +#define UPGRADE_FLAG_START 0x01 +#define UPGRADE_FLAG_FINISH 0x02 + +void system_upgrade_init(); +void system_upgrade_deinit(); +bool system_upgrade(uint8 *data, uint16 len); + +#ifdef UPGRADE_SSL_ENABLE +bool system_upgrade_start_ssl(struct upgrade_server_info *server); // not supported now +#else +bool system_upgrade_start(struct upgrade_server_info *server); +#endif +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/user_interface.h b/examples/ESP8266_NONOS_SDK/include/user_interface.h new file mode 100755 index 0000000..e4dab9b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/user_interface.h @@ -0,0 +1,816 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __USER_INTERFACE_H__ +#define __USER_INTERFACE_H__ + +#include "os_type.h" +#ifdef LWIP_OPEN_SRC +#include "lwip/ip_addr.h" +#else +#include "ip_addr.h" +#endif + +#include "queue.h" +#include "user_config.h" +#include "spi_flash.h" +#include "gpio.h" + +#ifndef MAC2STR +#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] +#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x" +#endif + +enum rst_reason { + REASON_DEFAULT_RST = 0, + REASON_WDT_RST = 1, + REASON_EXCEPTION_RST = 2, + REASON_SOFT_WDT_RST = 3, + REASON_SOFT_RESTART = 4, + REASON_DEEP_SLEEP_AWAKE = 5, + REASON_EXT_SYS_RST = 6 +}; + +struct rst_info{ + uint32 reason; + uint32 exccause; + uint32 epc1; + uint32 epc2; + uint32 epc3; + uint32 excvaddr; + uint32 depc; +}; + +struct rst_info* system_get_rst_info(void); + +#define UPGRADE_FW_BIN1 0x00 +#define UPGRADE_FW_BIN2 0x01 + +void system_restore(void); +void system_restart(void); + +bool system_deep_sleep_set_option(uint8 option); +bool system_deep_sleep(uint64 time_in_us); +bool system_deep_sleep_instant(uint64 time_in_us); + +uint8 system_upgrade_userbin_check(void); +void system_upgrade_reboot(void); +uint8 system_upgrade_flag_check(); +void system_upgrade_flag_set(uint8 flag); + +void system_timer_reinit(void); +uint32 system_get_time(void); + +/* user task's prio must be 0/1/2 !!!*/ +enum { + USER_TASK_PRIO_0 = 0, + USER_TASK_PRIO_1, + USER_TASK_PRIO_2, + USER_TASK_PRIO_MAX +}; + +bool system_os_task(os_task_t task, uint8 prio, os_event_t *queue, uint8 qlen); +bool system_os_post(uint8 prio, os_signal_t sig, os_param_t par); + +void system_print_meminfo(void); +uint32 system_get_free_heap_size(void); + +void system_set_os_print(uint8 onoff); +uint8 system_get_os_print(); + +uint64 system_mktime(uint32 year, uint32 mon, uint32 day, uint32 hour, uint32 min, uint32 sec); + +uint32 system_get_chip_id(void); + +typedef void (* init_done_cb_t)(void); + +void system_init_done_cb(init_done_cb_t cb); + +uint32 system_rtc_clock_cali_proc(void); +uint32 system_get_rtc_time(void); + +bool system_rtc_mem_read(uint8 src_addr, void *des_addr, uint16 load_size); +bool system_rtc_mem_write(uint8 des_addr, const void *src_addr, uint16 save_size); + +void system_uart_swap(void); +void system_uart_de_swap(void); + +uint16 system_adc_read(void); +void system_adc_read_fast(uint16 *adc_addr, uint16 adc_num, uint8 adc_clk_div); +uint16 system_get_vdd33(void); + +const char *system_get_sdk_version(void); + +#define SYS_BOOT_ENHANCE_MODE 0 +#define SYS_BOOT_NORMAL_MODE 1 + +#define SYS_BOOT_NORMAL_BIN 0 +#define SYS_BOOT_TEST_BIN 1 + +uint8 system_get_boot_version(void); +uint32 system_get_userbin_addr(void); +uint8 system_get_boot_mode(void); +bool system_restart_enhance(uint8 bin_type, uint32 bin_addr); + +#define SYS_CPU_80MHZ 80 +#define SYS_CPU_160MHZ 160 + +bool system_update_cpu_freq(uint8 freq); +uint8 system_get_cpu_freq(void); + +enum flash_size_map { + FLASH_SIZE_4M_MAP_256_256 = 0, /**< Flash size : 4Mbits. Map : 256KBytes + 256KBytes */ + FLASH_SIZE_2M, /**< Flash size : 2Mbits. Map : 256KBytes */ + FLASH_SIZE_8M_MAP_512_512, /**< Flash size : 8Mbits. Map : 512KBytes + 512KBytes */ + FLASH_SIZE_16M_MAP_512_512, /**< Flash size : 16Mbits. Map : 512KBytes + 512KBytes */ + FLASH_SIZE_32M_MAP_512_512, /**< Flash size : 32Mbits. Map : 512KBytes + 512KBytes */ + FLASH_SIZE_16M_MAP_1024_1024, /**< Flash size : 16Mbits. Map : 1024KBytes + 1024KBytes */ + FLASH_SIZE_32M_MAP_1024_1024, /**< Flash size : 32Mbits. Map : 1024KBytes + 1024KBytes */ + FLASH_SIZE_32M_MAP_2048_2048, /**< attention: don't support now ,just compatible for nodemcu; + Flash size : 32Mbits. Map : 2048KBytes + 2048KBytes */ + FLASH_SIZE_64M_MAP_1024_1024, /**< Flash size : 64Mbits. Map : 1024KBytes + 1024KBytes */ + FLASH_SIZE_128M_MAP_1024_1024 /**< Flash size : 128Mbits. Map : 1024KBytes + 1024KBytes */ +}; + +enum flash_size_map system_get_flash_size_map(void); + +void system_phy_set_max_tpw(uint8 max_tpw); +void system_phy_set_tpw_via_vdd33(uint16 vdd33); +void system_phy_set_rfoption(uint8 option); +void system_phy_set_powerup_option(uint8 option); + +bool system_param_save_with_protect(uint16 start_sec, void *param, uint16 len); +bool system_param_load(uint16 start_sec, uint16 offset, void *param, uint16 len); + +void system_soft_wdt_stop(void); +void system_soft_wdt_restart(void); +void system_soft_wdt_feed(void); + +void system_show_malloc(void); + +#define NULL_MODE 0x00 +#define STATION_MODE 0x01 +#define SOFTAP_MODE 0x02 +#define STATIONAP_MODE 0x03 + +typedef enum _auth_mode { + AUTH_OPEN = 0, + AUTH_WEP, + AUTH_WPA_PSK, + AUTH_WPA2_PSK, + AUTH_WPA_WPA2_PSK, + AUTH_MAX +} AUTH_MODE; + +typedef enum _cipher_type { + CIPHER_NONE = 0, + CIPHER_WEP40, + CIPHER_WEP104, + CIPHER_TKIP, + CIPHER_CCMP, + CIPHER_TKIP_CCMP, + CIPHER_UNKNOWN, +} CIPHER_TYPE; + +uint8 wifi_get_opmode(void); +uint8 wifi_get_opmode_default(void); +bool wifi_set_opmode(uint8 opmode); +bool wifi_set_opmode_current(uint8 opmode); +uint8 wifi_get_broadcast_if(void); +bool wifi_set_broadcast_if(uint8 interface); + +struct bss_info { + STAILQ_ENTRY(bss_info) next; + + uint8 bssid[6]; + uint8 ssid[32]; + uint8 ssid_len; + uint8 channel; + sint8 rssi; + AUTH_MODE authmode; + uint8 is_hidden; + sint16 freq_offset; + sint16 freqcal_val; + uint8 *esp_mesh_ie; + uint8 simple_pair; + CIPHER_TYPE pairwise_cipher; + CIPHER_TYPE group_cipher; + uint32_t phy_11b:1; + uint32_t phy_11g:1; + uint32_t phy_11n:1; + uint32_t wps:1; + uint32_t reserved:28; +}; + +typedef struct _scaninfo { + STAILQ_HEAD(, bss_info) *pbss; + struct espconn *pespconn; + uint8 totalpage; + uint8 pagenum; + uint8 page_sn; + uint8 data_cnt; +} scaninfo; + +typedef void (* scan_done_cb_t)(void *arg, STATUS status); + +typedef struct { + int8 rssi; + AUTH_MODE authmode; +} wifi_fast_scan_threshold_t; + +struct station_config { + uint8 ssid[32]; + uint8 password[64]; + uint8 channel; + uint8 bssid_set; // Note: If bssid_set is 1, station will just connect to the router + // with both ssid[] and bssid[] matched. Please check about this. + uint8 bssid[6]; + wifi_fast_scan_threshold_t threshold; + bool open_and_wep_mode_disable; // Can connect to open/wep router by default. If want to connect an open AP, please Do Not set password. + bool all_channel_scan; +}; + +bool wifi_station_get_config(struct station_config *config); +bool wifi_station_get_config_default(struct station_config *config); +bool wifi_station_set_config(struct station_config *config); +bool wifi_station_set_config_current(struct station_config *config); + +bool wifi_station_connect(void); +bool wifi_station_disconnect(void); + +void wifi_enable_signaling_measurement(void); +void wifi_disable_signaling_measurement(void); + +sint8 wifi_station_get_rssi(void); + +typedef enum { + WIFI_SCAN_TYPE_ACTIVE = 0, /**< active scan */ + WIFI_SCAN_TYPE_PASSIVE, /**< passive scan */ +} wifi_scan_type_t; + +/** @brief Range of active scan times per channel */ +typedef struct { + uint32_t min; /**< minimum active scan time per channel, units: millisecond */ + uint32_t max; /**< maximum active scan time per channel, units: millisecond, values above 1500ms may + cause station to disconnect from AP and are not recommended. */ +} wifi_active_scan_time_t; + +/** @brief Aggregate of active & passive scan time per channel */ +typedef union { + wifi_active_scan_time_t active; /**< active scan time per channel, units: millisecond. */ + uint32_t passive; /**< passive scan time per channel, units: millisecond, values above 1500ms may + cause station to disconnect from AP and are not recommended. */ +} wifi_scan_time_t; + +struct scan_config { + uint8 *ssid; // Note: ssid == NULL, don't filter ssid. + uint8 *bssid; // Note: bssid == NULL, don't filter bssid. + uint8 channel; // Note: channel == 0, scan all channels, otherwise scan set channel. + uint8 show_hidden; // Note: show_hidden == 1, can get hidden ssid routers' info. + wifi_scan_type_t scan_type; // scan type, active or passive + wifi_scan_time_t scan_time; // scan time per channel +}; + +bool wifi_station_scan(struct scan_config *config, scan_done_cb_t cb); + +uint8 wifi_station_get_auto_connect(void); +bool wifi_station_set_auto_connect(uint8 set); + +bool wifi_station_set_reconnect_policy(bool set); + +enum { + STATION_IDLE = 0, + STATION_CONNECTING, + STATION_WRONG_PASSWORD, + STATION_NO_AP_FOUND, + STATION_CONNECT_FAIL, + STATION_GOT_IP +}; + +enum dhcp_status { + DHCP_STOPPED, + DHCP_STARTED +}; + +uint8 wifi_station_get_connect_status(void); + +uint8 wifi_station_get_current_ap_id(void); +bool wifi_station_ap_change(uint8 current_ap_id); +bool wifi_station_ap_number_set(uint8 ap_number); +uint8 wifi_station_get_ap_info(struct station_config config[]); + +bool wifi_station_dhcpc_start(void); +bool wifi_station_dhcpc_stop(void); +enum dhcp_status wifi_station_dhcpc_status(void); +bool wifi_station_dhcpc_set_maxtry(uint8 num); + +char* wifi_station_get_hostname(void); +bool wifi_station_set_hostname(char *name); + +int wifi_station_set_cert_key(uint8 *client_cert, int client_cert_len, + uint8 *private_key, int private_key_len, + uint8 *private_key_passwd, int private_key_passwd_len); +void wifi_station_clear_cert_key(void); +int wifi_station_set_username(uint8 *username, int len); +void wifi_station_clear_username(void); + +struct softap_config { + uint8 ssid[32]; + uint8 password[64]; + uint8 ssid_len; // Note: Recommend to set it according to your ssid + uint8 channel; // Note: support 1 ~ 13 + AUTH_MODE authmode; // Note: Don't support AUTH_WEP in softAP mode. + uint8 ssid_hidden; // Note: default 0 + uint8 max_connection; // Note: default 4, max 4 + uint16 beacon_interval; // Note: support 100 ~ 60000 ms, default 100 +}; + +bool wifi_softap_get_config(struct softap_config *config); +bool wifi_softap_get_config_default(struct softap_config *config); +bool wifi_softap_set_config(struct softap_config *config); +bool wifi_softap_set_config_current(struct softap_config *config); + +struct station_info { + STAILQ_ENTRY(station_info) next; + + uint8 bssid[6]; + struct ip_addr ip; +}; + +struct dhcps_lease { + bool enable; + struct ip_addr start_ip; + struct ip_addr end_ip; +}; + +enum dhcps_offer_option{ + OFFER_START = 0x00, + OFFER_ROUTER = 0x01, + OFFER_END +}; + +uint8 wifi_softap_get_station_num(void); +struct station_info * wifi_softap_get_station_info(void); +void wifi_softap_free_station_info(void); + +bool wifi_softap_dhcps_start(void); +bool wifi_softap_dhcps_stop(void); + +bool wifi_softap_set_dhcps_lease(struct dhcps_lease *please); +bool wifi_softap_get_dhcps_lease(struct dhcps_lease *please); +uint32 wifi_softap_get_dhcps_lease_time(void); +bool wifi_softap_set_dhcps_lease_time(uint32 minute); +bool wifi_softap_reset_dhcps_lease_time(void); + +enum dhcp_status wifi_softap_dhcps_status(void); +bool wifi_softap_set_dhcps_offer_option(uint8 level, void* optarg); + +#define STATION_IF 0x00 +#define SOFTAP_IF 0x01 + +bool wifi_get_ip_info(uint8 if_index, struct ip_info *info); +bool wifi_set_ip_info(uint8 if_index, struct ip_info *info); +bool wifi_get_macaddr(uint8 if_index, uint8 *macaddr); +bool wifi_set_macaddr(uint8 if_index, uint8 *macaddr); + +uint8 wifi_get_channel(void); +bool wifi_set_channel(uint8 channel); + +void wifi_status_led_install(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func); +void wifi_status_led_uninstall(); + +/** Get the absolute difference between 2 u32_t values (correcting overflows) + * 'a' is expected to be 'higher' (without overflow) than 'b'. */ +#define ESP_U32_DIFF(a, b) (((a) >= (b)) ? ((a) - (b)) : (((a) + ((b) ^ 0xFFFFFFFF) + 1))) + +void wifi_promiscuous_enable(uint8 promiscuous); + +typedef void (* wifi_promiscuous_cb_t)(uint8 *buf, uint16 len); + +void wifi_set_promiscuous_rx_cb(wifi_promiscuous_cb_t cb); + +void wifi_promiscuous_set_mac(const uint8_t *address); + +enum phy_mode { + PHY_MODE_11B = 1, + PHY_MODE_11G = 2, + PHY_MODE_11N = 3 +}; + +enum phy_mode wifi_get_phy_mode(void); +bool wifi_set_phy_mode(enum phy_mode mode); + +enum sleep_type { + NONE_SLEEP_T = 0, + LIGHT_SLEEP_T, + MODEM_SLEEP_T +}; + +enum sleep_level { + MIN_SLEEP_T, + MAX_SLEEP_T +}; + +bool wifi_set_sleep_type(enum sleep_type type); +enum sleep_type wifi_get_sleep_type(void); +bool wifi_set_sleep_level(enum sleep_level level); +enum sleep_level wifi_get_sleep_level(void); +bool wifi_set_listen_interval(uint8 interval); +uint8 wifi_get_listen_interval(void); + +void wifi_fpm_open(void); +void wifi_fpm_close(void); +void wifi_fpm_do_wakeup(void); +sint8 wifi_fpm_do_sleep(uint32 sleep_time_in_us); +void wifi_fpm_set_sleep_type(enum sleep_type type); +enum sleep_type wifi_fpm_get_sleep_type(void); + +typedef void (*fpm_wakeup_cb)(void); +void wifi_fpm_set_wakeup_cb(fpm_wakeup_cb cb); + +void wifi_fpm_auto_sleep_set_in_null_mode(uint8 req); + +enum { + EVENT_STAMODE_CONNECTED = 0, + EVENT_STAMODE_DISCONNECTED, + EVENT_STAMODE_AUTHMODE_CHANGE, + EVENT_STAMODE_GOT_IP, + EVENT_STAMODE_DHCP_TIMEOUT, + EVENT_SOFTAPMODE_STACONNECTED, + EVENT_SOFTAPMODE_STADISCONNECTED, + EVENT_SOFTAPMODE_PROBEREQRECVED, + EVENT_OPMODE_CHANGED, + EVENT_SOFTAPMODE_DISTRIBUTE_STA_IP, + EVENT_MAX +}; + +enum { + REASON_UNSPECIFIED = 1, + REASON_AUTH_EXPIRE = 2, + REASON_AUTH_LEAVE = 3, + REASON_ASSOC_EXPIRE = 4, + REASON_ASSOC_TOOMANY = 5, + REASON_NOT_AUTHED = 6, + REASON_NOT_ASSOCED = 7, + REASON_ASSOC_LEAVE = 8, + REASON_ASSOC_NOT_AUTHED = 9, + REASON_DISASSOC_PWRCAP_BAD = 10, /* 11h */ + REASON_DISASSOC_SUPCHAN_BAD = 11, /* 11h */ + REASON_IE_INVALID = 13, /* 11i */ + REASON_MIC_FAILURE = 14, /* 11i */ + REASON_4WAY_HANDSHAKE_TIMEOUT = 15, /* 11i */ + REASON_GROUP_KEY_UPDATE_TIMEOUT = 16, /* 11i */ + REASON_IE_IN_4WAY_DIFFERS = 17, /* 11i */ + REASON_GROUP_CIPHER_INVALID = 18, /* 11i */ + REASON_PAIRWISE_CIPHER_INVALID = 19, /* 11i */ + REASON_AKMP_INVALID = 20, /* 11i */ + REASON_UNSUPP_RSN_IE_VERSION = 21, /* 11i */ + REASON_INVALID_RSN_IE_CAP = 22, /* 11i */ + REASON_802_1X_AUTH_FAILED = 23, /* 11i */ + REASON_CIPHER_SUITE_REJECTED = 24, /* 11i */ + + REASON_BEACON_TIMEOUT = 200, + REASON_NO_AP_FOUND = 201, + REASON_AUTH_FAIL = 202, + REASON_ASSOC_FAIL = 203, + REASON_HANDSHAKE_TIMEOUT = 204, +}; + +typedef struct { + uint8 ssid[32]; + uint8 ssid_len; + uint8 bssid[6]; + uint8 channel; +} Event_StaMode_Connected_t; + +typedef struct { + uint8 ssid[32]; + uint8 ssid_len; + uint8 bssid[6]; + uint8 reason; +} Event_StaMode_Disconnected_t; + +typedef struct { + uint8 old_mode; + uint8 new_mode; +} Event_StaMode_AuthMode_Change_t; + +typedef struct { + struct ip_addr ip; + struct ip_addr mask; + struct ip_addr gw; +} Event_StaMode_Got_IP_t; + +typedef struct { + uint8 mac[6]; + uint8 aid; +} Event_SoftAPMode_StaConnected_t; + +typedef struct { + uint8 mac[6]; + struct ip_addr ip; + uint8 aid; +} Event_SoftAPMode_Distribute_Sta_IP_t; + +typedef struct { + uint8 mac[6]; + uint8 aid; +} Event_SoftAPMode_StaDisconnected_t; + +typedef struct { + int rssi; + uint8 mac[6]; +} Event_SoftAPMode_ProbeReqRecved_t; + +typedef struct { + uint8 old_opmode; + uint8 new_opmode; +} Event_OpMode_Change_t; + +typedef union { + Event_StaMode_Connected_t connected; + Event_StaMode_Disconnected_t disconnected; + Event_StaMode_AuthMode_Change_t auth_change; + Event_StaMode_Got_IP_t got_ip; + Event_SoftAPMode_StaConnected_t sta_connected; + Event_SoftAPMode_Distribute_Sta_IP_t distribute_sta_ip; + Event_SoftAPMode_StaDisconnected_t sta_disconnected; + Event_SoftAPMode_ProbeReqRecved_t ap_probereqrecved; + Event_OpMode_Change_t opmode_changed; +} Event_Info_u; + +typedef struct _esp_event { + uint32 event; + Event_Info_u event_info; +} System_Event_t; + +typedef void (* wifi_event_handler_cb_t)(System_Event_t *event); + +void wifi_set_event_handler_cb(wifi_event_handler_cb_t cb); + +typedef enum wps_type { + WPS_TYPE_DISABLE = 0, + WPS_TYPE_PBC, + WPS_TYPE_PIN, + WPS_TYPE_DISPLAY, + WPS_TYPE_MAX, +} WPS_TYPE_t; + +enum wps_cb_status { + WPS_CB_ST_SUCCESS = 0, + WPS_CB_ST_FAILED, + WPS_CB_ST_TIMEOUT, + WPS_CB_ST_WEP, +}; + +bool wifi_wps_enable(WPS_TYPE_t wps_type); +bool wifi_wps_disable(void); +bool wifi_wps_start(void); + +typedef void (*wps_st_cb_t)(int status); +bool wifi_set_wps_cb(wps_st_cb_t cb); + +typedef void (*freedom_outside_cb_t)(uint8 status); +int wifi_register_send_pkt_freedom_cb(freedom_outside_cb_t cb); +void wifi_unregister_send_pkt_freedom_cb(void); +int wifi_send_pkt_freedom(uint8 *buf, int len, bool sys_seq); + +int wifi_rfid_locp_recv_open(void); +void wifi_rfid_locp_recv_close(void); + +typedef void (*rfid_locp_cb_t)(uint8 *frm, int len, int rssi); +int wifi_register_rfid_locp_recv_cb(rfid_locp_cb_t cb); +void wifi_unregister_rfid_locp_recv_cb(void); + +enum FIXED_RATE { + PHY_RATE_48 = 0x8, + PHY_RATE_24 = 0x9, + PHY_RATE_12 = 0xA, + PHY_RATE_6 = 0xB, + PHY_RATE_54 = 0xC, + PHY_RATE_36 = 0xD, + PHY_RATE_18 = 0xE, + PHY_RATE_9 = 0xF, +}; + +#define FIXED_RATE_MASK_NONE 0x00 +#define FIXED_RATE_MASK_STA 0x01 +#define FIXED_RATE_MASK_AP 0x02 +#define FIXED_RATE_MASK_ALL 0x03 + +int wifi_set_user_fixed_rate(uint8 enable_mask, uint8 rate); +int wifi_get_user_fixed_rate(uint8 *enable_mask, uint8 *rate); + +enum support_rate { + RATE_11B5M = 0, + RATE_11B11M = 1, + RATE_11B1M = 2, + RATE_11B2M = 3, + RATE_11G6M = 4, + RATE_11G12M = 5, + RATE_11G24M = 6, + RATE_11G48M = 7, + RATE_11G54M = 8, + RATE_11G9M = 9, + RATE_11G18M = 10, + RATE_11G36M = 11, +}; + +int wifi_set_user_sup_rate(uint8 min, uint8 max); + +enum RATE_11B_ID { + RATE_11B_B11M = 0, + RATE_11B_B5M = 1, + RATE_11B_B2M = 2, + RATE_11B_B1M = 3, +}; + +enum RATE_11G_ID { + RATE_11G_G54M = 0, + RATE_11G_G48M = 1, + RATE_11G_G36M = 2, + RATE_11G_G24M = 3, + RATE_11G_G18M = 4, + RATE_11G_G12M = 5, + RATE_11G_G9M = 6, + RATE_11G_G6M = 7, + RATE_11G_B5M = 8, + RATE_11G_B2M = 9, + RATE_11G_B1M = 10 +}; + +enum RATE_11N_ID { + RATE_11N_MCS7S = 0, + RATE_11N_MCS7 = 1, + RATE_11N_MCS6 = 2, + RATE_11N_MCS5 = 3, + RATE_11N_MCS4 = 4, + RATE_11N_MCS3 = 5, + RATE_11N_MCS2 = 6, + RATE_11N_MCS1 = 7, + RATE_11N_MCS0 = 8, + RATE_11N_B5M = 9, + RATE_11N_B2M = 10, + RATE_11N_B1M = 11 +}; + +#define RC_LIMIT_11B 0 +#define RC_LIMIT_11G 1 +#define RC_LIMIT_11N 2 +#define RC_LIMIT_P2P_11G 3 +#define RC_LIMIT_P2P_11N 4 +#define RC_LIMIT_NUM 5 + +#define LIMIT_RATE_MASK_NONE 0x00 +#define LIMIT_RATE_MASK_STA 0x01 +#define LIMIT_RATE_MASK_AP 0x02 +#define LIMIT_RATE_MASK_ALL 0x03 + +bool wifi_set_user_rate_limit(uint8 mode, uint8 ifidx, uint8 max, uint8 min); +uint8 wifi_get_user_limit_rate_mask(void); +bool wifi_set_user_limit_rate_mask(uint8 enable_mask); + +enum { + USER_IE_BEACON = 0, + USER_IE_PROBE_REQ, + USER_IE_PROBE_RESP, + USER_IE_ASSOC_REQ, + USER_IE_ASSOC_RESP, + USER_IE_MAX +}; + +typedef void (*user_ie_manufacturer_recv_cb_t)(uint8 type, const uint8 sa[6], const uint8 m_oui[3], uint8 *ie, uint8 ie_len, int rssi); + +bool wifi_set_user_ie(bool enable, uint8 *m_oui, uint8 type, uint8 *user_ie, uint8 len); +int wifi_register_user_ie_manufacturer_recv_cb(user_ie_manufacturer_recv_cb_t cb); +void wifi_unregister_user_ie_manufacturer_recv_cb(void); + +void wifi_enable_gpio_wakeup(uint32 i, GPIO_INT_TYPE intr_status); +void wifi_disable_gpio_wakeup(void); + +void uart_div_modify(uint8 uart_no, uint32 DivLatchValue); + +typedef enum { + WIFI_COUNTRY_POLICY_AUTO, /**< Country policy is auto, use the country info of AP to which the station is connected */ + WIFI_COUNTRY_POLICY_MANUAL, /**< Country policy is manual, always use the configured country info */ +} WIFI_COUNTRY_POLICY; + +typedef struct { + char cc[3]; /**< country code string */ + uint8_t schan; /**< start channel */ + uint8_t nchan; /**< total channel number */ + uint8_t policy; /**< country policy */ +} wifi_country_t; + +/** + * @brief configure country info + * + * @attention 1. The default country is {.cc="CN", .schan=1, .nchan=13, policy=WIFI_COUNTRY_POLICY_AUTO} + * @attention 2. When the country policy is WIFI_COUNTRY_POLICY_AUTO, use the country info of AP to which the station is + * connected. E.g. if the configured country info is {.cc="USA", .schan=1, .nchan=11}, the country info of + * the AP to which the station is connected is {.cc="JP", .schan=1, .nchan=14}, then our country info is + * {.cc="JP", .schan=1, .nchan=14}. If the station disconnected from the AP, the country info back to + * {.cc="USA", .schan=1, .nchan=11} again. + * @attention 3. When the country policy is WIFI_COUNTRY_POLICY_MANUAL, always use the configured country info. + * @attention 4. When the country info is changed because of configuration or because the station connects to a different + * external AP, the country IE in probe response/beacon of the soft-AP is changed also. + * @attention 5. The country configuration is not stored into flash + * + * @param wifi_country_t *country: the configured country info + * + * @return true : succeed + * @return false : fail + */ +bool wifi_set_country(wifi_country_t *country); + +/** + * @brief get the current country info + * + * @param wifi_country_t *country: country info + * + * @return true : succeed + * @return false : fail + */ +bool wifi_get_country(wifi_country_t *country); + +typedef enum { + SYSTEM_PARTITION_INVALID = 0, + SYSTEM_PARTITION_BOOTLOADER, /* user can't modify this partition address, but can modify size */ + SYSTEM_PARTITION_OTA_1, /* user can't modify this partition address, but can modify size */ + SYSTEM_PARTITION_OTA_2, /* user can't modify this partition address, but can modify size */ + SYSTEM_PARTITION_RF_CAL, /* user must define this partition */ + SYSTEM_PARTITION_PHY_DATA, /* user must define this partition */ + SYSTEM_PARTITION_SYSTEM_PARAMETER, /* user must define this partition */ + SYSTEM_PARTITION_AT_PARAMETER, + SYSTEM_PARTITION_SSL_CLIENT_CERT_PRIVKEY, + SYSTEM_PARTITION_SSL_CLIENT_CA, + SYSTEM_PARTITION_SSL_SERVER_CERT_PRIVKEY, + SYSTEM_PARTITION_SSL_SERVER_CA, + SYSTEM_PARTITION_WPA2_ENTERPRISE_CERT_PRIVKEY, + SYSTEM_PARTITION_WPA2_ENTERPRISE_CA, + + SYSTEM_PARTITION_CUSTOMER_BEGIN = 100, /* user can define partition after here */ + SYSTEM_PARTITION_MAX +} partition_type_t; + +typedef struct { + partition_type_t type; /* the partition type */ + uint32_t addr; /* the partition address */ + uint32_t size; /* the partition size */ +} partition_item_t; + +/** + * @brief regist partition table information, user MUST call it in user_pre_init() + * + * @param partition_table: the partition table + * @param partition_num: the partition number in partition table + * @param map: the flash map + * + * @return true : succeed + * @return false : fail + */ +bool system_partition_table_regist( + const partition_item_t* partition_table, + uint32_t partition_num, + uint32_t map + ); + +/** + * @brief get ota partition size + * + * @return the size of ota partition + */ +uint32_t system_partition_get_ota_partition_size(void); + +/** + * @brief get partition information + * + * @param type: the partition type + * @param partition_item: the point to store partition information + * + * @return true : succeed + * @return false : fail + */ +bool system_partition_get_item(partition_type_t type, partition_item_t* partition_item); +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/version.h b/examples/ESP8266_NONOS_SDK/include/version.h new file mode 100755 index 0000000..c1559db --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/version.h @@ -0,0 +1,11 @@ +#ifndef ESP_SDK_VERSION_H +#define ESP_SDK_VERSION_H + +#define ESP_SDK_VERSION_MAJOR 3 +#define ESP_SDK_VERSION_MINOR 0 +#define ESP_SDK_VERSION_PATCH 4 + +#define ESP_SDK_VERSION_NUMBER 0x030004 +#define ESP_SDK_VERSION_STRING "3.0.4" + +#endif diff --git a/examples/ESP8266_NONOS_SDK/include/wpa2_enterprise.h b/examples/ESP8266_NONOS_SDK/include/wpa2_enterprise.h new file mode 100644 index 0000000..9bd0ba5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/include/wpa2_enterprise.h @@ -0,0 +1,65 @@ +/* + * ESPRESSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __WPA2_ENTERPRISE_H__ +#define __WPA2_ENTERPRISE_H__ + +typedef long os_time_t; + +struct os_time { + os_time_t sec; + os_time_t usec; +}; + +typedef int (* get_time_func_t)(struct os_time *t); + +int wifi_station_set_wpa2_enterprise_auth(int enable); + +int wifi_station_set_enterprise_cert_key(u8 *client_cert, int client_cert_len, + u8 *private_key, int private_key_len, + u8 *private_key_passwd, int private_key_passwd_len); +void wifi_station_clear_enterprise_cert_key(void); + +int wifi_station_set_enterprise_ca_cert(u8 *ca_cert, int ca_cert_len); +void wifi_station_clear_enterprise_ca_cert(void); + +int wifi_station_set_enterprise_identity(u8 *identity, int len); +void wifi_station_clear_enterprise_identity(void); + +int wifi_station_set_enterprise_username(u8 *username, int len); +void wifi_station_clear_enterprise_username(void); + +int wifi_station_set_enterprise_password(u8 *password, int len); +void wifi_station_clear_enterprise_password(void); + +int wifi_station_set_enterprise_new_password(u8 *new_password, int len); +void wifi_station_clear_enterprise_new_password(void); + +void wifi_station_set_enterprise_disable_time_check(bool disable); +bool wifi_station_get_enterprise_disable_time_check(void); + +void wpa2_enterprise_set_user_get_time(get_time_func_t cb); + + +#endif /* __WPA2_ENTERPRISE_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.ld new file mode 100644 index 0000000..e61baa8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40210000, len = 0x5C000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.1024.app1.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.1024.app1.ld new file mode 100644 index 0000000..30f5e40 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.1024.app1.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40201010, len = 0x6B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.1024.app2.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.1024.app2.ld new file mode 100644 index 0000000..492b3b2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.1024.app2.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40281010, len = 0x6B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.2048.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.2048.ld new file mode 100644 index 0000000..a273ee8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.2048.ld @@ -0,0 +1,230 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40201010, len = 0xE0000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" + diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.512.app1.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.512.app1.ld new file mode 100644 index 0000000..645ee6d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.512.app1.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40201010, len = 0x2B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.512.app2.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.512.app2.ld new file mode 100644 index 0000000..aaa6a75 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.new.512.app2.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40241010, len = 0x2B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.1024.app1.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.1024.app1.ld new file mode 100644 index 0000000..8523411 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.1024.app1.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40211000, len = 0x6B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.1024.app2.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.1024.app2.ld new file mode 100644 index 0000000..628b7c8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.1024.app2.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40291000, len = 0x6B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.512.app1.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.512.app1.ld new file mode 100644 index 0000000..af39727 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.512.app1.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40211000, len = 0x2B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.512.app2.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.512.app2.ld new file mode 100644 index 0000000..a1cf632 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.app.v6.old.512.app2.ld @@ -0,0 +1,229 @@ +/* This linker script generated from xt-genldscripts.tpp for LSP . */ +/* Linker Script for ld -N */ +MEMORY +{ + dport0_0_seg : org = 0x3FF00000, len = 0x10 + dram0_0_seg : org = 0x3FFE8000, len = 0x14000 + iram1_0_seg : org = 0x40100000, len = 0x8000 + irom0_0_seg : org = 0x40251000, len = 0x2B000 +} + +PHDRS +{ + dport0_0_phdr PT_LOAD; + dram0_0_phdr PT_LOAD; + dram0_0_bss_phdr PT_LOAD; + iram1_0_phdr PT_LOAD; + irom0_0_phdr PT_LOAD; +} + + +/* Default entry point: */ +ENTRY(call_user_start) +EXTERN(_DebugExceptionVector) +EXTERN(_DoubleExceptionVector) +EXTERN(_KernelExceptionVector) +EXTERN(_NMIExceptionVector) +EXTERN(_UserExceptionVector) +PROVIDE(_memmap_vecbase_reset = 0x40000000); +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x00000110; +_memmap_cacheattr_wt_base = 0x00000110; +_memmap_cacheattr_bp_base = 0x00000220; +_memmap_cacheattr_unused_mask = 0xFFFFF00F; +_memmap_cacheattr_wb_trapnull = 0x2222211F; +_memmap_cacheattr_wba_trapnull = 0x2222211F; +_memmap_cacheattr_wbna_trapnull = 0x2222211F; +_memmap_cacheattr_wt_trapnull = 0x2222211F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0xFFFFF11F; +_memmap_cacheattr_wt_strict = 0xFFFFF11F; +_memmap_cacheattr_bp_strict = 0xFFFFF22F; +_memmap_cacheattr_wb_allvalid = 0x22222112; +_memmap_cacheattr_wt_allvalid = 0x22222112; +_memmap_cacheattr_bp_allvalid = 0x22222222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); + +SECTIONS +{ + + .dport0.rodata : ALIGN(4) + { + _dport0_rodata_start = ABSOLUTE(.); + *(.dport0.rodata) + *(.dport.rodata) + _dport0_rodata_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.literal : ALIGN(4) + { + _dport0_literal_start = ABSOLUTE(.); + *(.dport0.literal) + *(.dport.literal) + _dport0_literal_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .dport0.data : ALIGN(4) + { + _dport0_data_start = ABSOLUTE(.); + *(.dport0.data) + *(.dport.data) + _dport0_data_end = ABSOLUTE(.); + } >dport0_0_seg :dport0_0_phdr + + .data : ALIGN(4) + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .rodata : ALIGN(4) + { + _rodata_start = ABSOLUTE(.); + *(.sdk.version) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + /* C++ constructor and destructor tables, properly ordered: */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* this table MUST be 4-byte aligned */ + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + _rodata_end = ABSOLUTE(.); + } >dram0_0_seg :dram0_0_phdr + + .bss ALIGN(8) (NOLOAD) : ALIGN(4) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + _heap_start = ABSOLUTE(.); +/* _stack_sentry = ALIGN(0x8); */ + } >dram0_0_seg :dram0_0_bss_phdr +/* __stack = 0x3ffc8000; */ + + .irom0.text : ALIGN(4) + { + _irom0_text_start = ABSOLUTE(.); + + *libat.a:(.literal.* .text.*) + *libcrypto.a:(.literal.* .text.*) + *libespnow.a:(.literal.* .text.*) + *libjson.a:(.literal.* .text.*) + *liblwip.a:(.literal.* .text.*) + *libnet80211.a:(.literal.* .text.*) + *libsmartconfig.a:(.literal.* .text.*) + *libssl.a:(.literal.* .text.*) + *libupgrade.a:(.literal.* .text.*) + *libwpa.a:(.literal.* .text.*) + *libwpa2.a:(.literal.* .text.*) + *libwps.a:(.literal.* .text.*) + + *libmbedtls.a:(.literal.* .text.*) + + *libm.a:(.literal .text .literal.* .text.*) + + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) + _irom0_text_end = ABSOLUTE(.); + } >irom0_0_seg :irom0_0_phdr + + .text : ALIGN(4) + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.UserEnter.text) + . = ALIGN(16); + *(.DebugExceptionVector.text) + . = ALIGN(16); + *(.NMIExceptionVector.text) + . = ALIGN(16); + *(.KernelExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.UserExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN(16); + *(.DoubleExceptionVector.text) + LONG(0) + LONG(0) + LONG(0) + LONG(0) + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } >iram1_0_seg :iram1_0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >iram1_0_seg :iram1_0_phdr +} + +/* get ROM code address */ +INCLUDE "../ld/eagle.rom.addr.v6.ld" diff --git a/examples/ESP8266_NONOS_SDK/ld/eagle.rom.addr.v6.ld b/examples/ESP8266_NONOS_SDK/ld/eagle.rom.addr.v6.ld new file mode 100644 index 0000000..2628776 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/ld/eagle.rom.addr.v6.ld @@ -0,0 +1,350 @@ +PROVIDE ( Cache_Read_Disable = 0x400047f0 ); +PROVIDE ( Cache_Read_Enable = 0x40004678 ); +PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 ); +PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c ); +PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 ); +PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 ); +PROVIDE ( GetUartDevice = 0x40003f4c ); +PROVIDE ( MD5Final = 0x40009900 ); +PROVIDE ( MD5Init = 0x40009818 ); +PROVIDE ( MD5Update = 0x40009834 ); +PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 ); +PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c ); +PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 ); +PROVIDE ( RcvMsg = 0x40003eac ); +PROVIDE ( SHA1Final = 0x4000b648 ); +PROVIDE ( SHA1Init = 0x4000b584 ); +PROVIDE ( SHA1Transform = 0x4000a364 ); +PROVIDE ( SHA1Update = 0x4000b5a8 ); +PROVIDE ( SPI_read_status = 0x400043c8 ); +PROVIDE ( SPI_write_status = 0x40004400 ); +PROVIDE ( SPI_write_enable = 0x4000443c ); +PROVIDE ( Wait_SPI_Idle = 0x4000448c ); +PROVIDE ( Enable_QMode = 0x400044c0 ); +PROVIDE ( SPIEraseArea = 0x40004b44 ); +PROVIDE ( SPIEraseBlock = 0x400049b4 ); +PROVIDE ( SPIEraseChip = 0x40004984 ); +PROVIDE ( SPIEraseSector = 0x40004a00 ); +PROVIDE ( SPILock = 0x400048a8 ); +PROVIDE ( SPIParamCfg = 0x40004c2c ); +PROVIDE ( SPIRead = 0x40004b1c ); +PROVIDE ( SPIReadModeCnfig = 0x400048ec ); +PROVIDE ( SPIUnlock = 0x40004878 ); +PROVIDE ( SPIWrite = 0x40004a4c ); +PROVIDE ( SelectSpiFunction = 0x40003f58 ); +PROVIDE ( SendMsg = 0x40003cf4 ); +PROVIDE ( UartConnCheck = 0x40003230 ); +PROVIDE ( UartConnectProc = 0x400037a0 ); +PROVIDE ( UartDwnLdProc = 0x40003368 ); +PROVIDE ( UartGetCmdLn = 0x40003ef4 ); +PROVIDE ( UartRegReadProc = 0x4000381c ); +PROVIDE ( UartRegWriteProc = 0x400037ac ); +PROVIDE ( UartRxString = 0x40003c30 ); +PROVIDE ( Uart_Init = 0x40003a14 ); +PROVIDE ( _DebugExceptionVector = 0x40000010 ); +PROVIDE ( _DoubleExceptionVector = 0x40000070 ); +PROVIDE ( _KernelExceptionVector = 0x40000030 ); +PROVIDE ( _NMIExceptionVector = 0x40000020 ); +PROVIDE ( _ResetHandler = 0x400000a4 ); +PROVIDE ( _ResetVector = 0x40000080 ); +PROVIDE ( _UserExceptionVector = 0x40000050 ); +PROVIDE ( __adddf3 = 0x4000c538 ); +PROVIDE ( __addsf3 = 0x4000c180 ); +PROVIDE ( __divdf3 = 0x4000cb94 ); +PROVIDE ( __divdi3 = 0x4000ce60 ); +PROVIDE ( __divsi3 = 0x4000dc88 ); +PROVIDE ( __extendsfdf2 = 0x4000cdfc ); +PROVIDE ( __fixdfsi = 0x4000ccb8 ); +PROVIDE ( __fixunsdfsi = 0x4000cd00 ); +PROVIDE ( __fixunssfsi = 0x4000c4c4 ); +PROVIDE ( __floatsidf = 0x4000e2f0 ); +PROVIDE ( __floatsisf = 0x4000e2ac ); +PROVIDE ( __floatunsidf = 0x4000e2e8 ); +PROVIDE ( __floatunsisf = 0x4000e2a4 ); +PROVIDE ( __muldf3 = 0x4000c8f0 ); +PROVIDE ( __muldi3 = 0x40000650 ); +PROVIDE ( __mulsf3 = 0x4000c3dc ); +PROVIDE ( __subdf3 = 0x4000c688 ); +PROVIDE ( __subsf3 = 0x4000c268 ); +PROVIDE ( __truncdfsf2 = 0x4000cd5c ); +PROVIDE ( __udivdi3 = 0x4000d310 ); +PROVIDE ( __udivsi3 = 0x4000e21c ); +PROVIDE ( __umoddi3 = 0x4000d770 ); +PROVIDE ( __umodsi3 = 0x4000e268 ); +PROVIDE ( __umulsidi3 = 0x4000dcf0 ); +PROVIDE ( _rom_store = 0x4000e388 ); +PROVIDE ( _rom_store_table = 0x4000e328 ); +PROVIDE ( _start = 0x4000042c ); +PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 ); +PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 ); +PROVIDE ( _xtos_cause3_handler = 0x40000590 ); +PROVIDE ( _xtos_ints_off = 0x4000bda4 ); +PROVIDE ( _xtos_ints_on = 0x4000bd84 ); +PROVIDE ( _xtos_l1int_handler = 0x4000048c ); +PROVIDE ( _xtos_p_none = 0x4000dbf8 ); +PROVIDE ( _xtos_restore_intlevel = 0x4000056c ); +PROVIDE ( _xtos_return_from_exc = 0x4000dc54 ); +PROVIDE ( _xtos_set_exception_handler = 0x40000454 ); +PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 ); +PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 ); +PROVIDE ( _xtos_set_intlevel = 0x4000dbfc ); +PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 ); +PROVIDE ( _xtos_set_vpri = 0x40000574 ); +PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 ); +PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 ); +PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c ); +PROVIDE ( aes_decrypt = 0x400092d4 ); +PROVIDE ( aes_decrypt_deinit = 0x400092e4 ); +PROVIDE ( aes_decrypt_init = 0x40008ea4 ); +PROVIDE ( aes_unwrap = 0x40009410 ); +PROVIDE ( base64_decode = 0x40009648 ); +PROVIDE ( base64_encode = 0x400094fc ); +PROVIDE ( bzero = 0x4000de84 ); +PROVIDE ( cmd_parse = 0x40000814 ); +PROVIDE ( conv_str_decimal = 0x40000b24 ); +PROVIDE ( conv_str_hex = 0x40000cb8 ); +PROVIDE ( convert_para_str = 0x40000a60 ); +PROVIDE ( dtm_get_intr_mask = 0x400026d0 ); +PROVIDE ( dtm_params_init = 0x4000269c ); +PROVIDE ( dtm_set_intr_mask = 0x400026c8 ); +PROVIDE ( dtm_set_params = 0x400026dc ); +PROVIDE ( eprintf = 0x40001d14 ); +PROVIDE ( eprintf_init_buf = 0x40001cb8 ); +PROVIDE ( eprintf_to_host = 0x40001d48 ); +PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 ); +PROVIDE ( est_reset_printf_buf_len = 0x4000249c ); +PROVIDE ( ets_bzero = 0x40002ae8 ); +PROVIDE ( ets_char2xdigit = 0x40002b74 ); +PROVIDE ( ets_delay_us = 0x40002ecc ); +PROVIDE ( ets_enter_sleep = 0x400027b8 ); +PROVIDE ( ets_external_printf = 0x40002578 ); +PROVIDE ( ets_get_cpu_frequency = 0x40002f0c ); +PROVIDE ( ets_getc = 0x40002bcc ); +PROVIDE ( ets_install_external_printf = 0x40002450 ); +PROVIDE ( ets_install_putc1 = 0x4000242c ); +PROVIDE ( ets_install_putc2 = 0x4000248c ); +PROVIDE ( ets_install_uart_printf = 0x40002438 ); +PROVIDE ( ets_intr_lock = 0x40000f74 ); +PROVIDE ( ets_intr_unlock = 0x40000f80 ); +PROVIDE ( ets_isr_attach = 0x40000f88 ); +PROVIDE ( ets_isr_mask = 0x40000f98 ); +PROVIDE ( ets_isr_unmask = 0x40000fa8 ); +PROVIDE ( ets_memcmp = 0x400018d4 ); +PROVIDE ( ets_memcpy = 0x400018b4 ); +PROVIDE ( ets_memmove = 0x400018c4 ); +PROVIDE ( ets_memset = 0x400018a4 ); +PROVIDE ( ets_post = 0x40000e24 ); +PROVIDE ( ets_printf = 0x400024cc ); +PROVIDE ( ets_putc = 0x40002be8 ); +PROVIDE ( ets_rtc_int_register = 0x40002a40 ); +PROVIDE ( ets_run = 0x40000e04 ); +PROVIDE ( ets_set_idle_cb = 0x40000dc0 ); +PROVIDE ( ets_set_user_start = 0x40000fbc ); +PROVIDE ( ets_str2macaddr = 0x40002af8 ); +PROVIDE ( ets_strcmp = 0x40002aa8 ); +PROVIDE ( ets_strcpy = 0x40002a88 ); +PROVIDE ( ets_strlen = 0x40002ac8 ); +PROVIDE ( ets_strncmp = 0x40002ab8 ); +PROVIDE ( ets_strncpy = 0x40002a98 ); +PROVIDE ( ets_strstr = 0x40002ad8 ); +PROVIDE ( ets_task = 0x40000dd0 ); +PROVIDE ( ets_timer_arm = 0x40002cc4 ); +PROVIDE ( ets_timer_disarm = 0x40002d40 ); +PROVIDE ( ets_timer_done = 0x40002d80 ); +PROVIDE ( ets_timer_handler_isr = 0x40002da8 ); +PROVIDE ( ets_timer_init = 0x40002e68 ); +PROVIDE ( ets_timer_setfn = 0x40002c48 ); +PROVIDE ( ets_uart_printf = 0x40002544 ); +PROVIDE ( ets_update_cpu_frequency = 0x40002f04 ); +PROVIDE ( ets_vprintf = 0x40001f00 ); +PROVIDE ( ets_wdt_disable = 0x400030f0 ); +PROVIDE ( ets_wdt_enable = 0x40002fa0 ); +PROVIDE ( ets_wdt_get_mode = 0x40002f34 ); +PROVIDE ( ets_wdt_init = 0x40003170 ); +PROVIDE ( ets_wdt_restore = 0x40003158 ); +PROVIDE ( ets_write_char = 0x40001da0 ); +PROVIDE ( get_first_seg = 0x4000091c ); +PROVIDE ( gpio_init = 0x40004c50 ); +PROVIDE ( gpio_input_get = 0x40004cf0 ); +PROVIDE ( gpio_intr_ack = 0x40004dcc ); +PROVIDE ( gpio_intr_handler_register = 0x40004e28 ); +PROVIDE ( gpio_intr_pending = 0x40004d88 ); +PROVIDE ( gpio_intr_test = 0x40004efc ); +PROVIDE ( gpio_output_set = 0x40004cd0 ); +PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 ); +PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 ); +PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 ); +PROVIDE ( gpio_register_get = 0x40004d5c ); +PROVIDE ( gpio_register_set = 0x40004d04 ); +PROVIDE ( hmac_md5 = 0x4000a2cc ); +PROVIDE ( hmac_md5_vector = 0x4000a160 ); +PROVIDE ( hmac_sha1 = 0x4000ba28 ); +PROVIDE ( hmac_sha1_vector = 0x4000b8b4 ); +PROVIDE ( lldesc_build_chain = 0x40004f40 ); +PROVIDE ( lldesc_num2link = 0x40005050 ); +PROVIDE ( lldesc_set_owner = 0x4000507c ); +PROVIDE ( main = 0x40000fec ); +PROVIDE ( md5_vector = 0x400097ac ); +PROVIDE ( mem_calloc = 0x40001c2c ); +PROVIDE ( mem_free = 0x400019e0 ); +PROVIDE ( mem_init = 0x40001998 ); +PROVIDE ( mem_malloc = 0x40001b40 ); +PROVIDE ( mem_realloc = 0x40001c6c ); +PROVIDE ( mem_trim = 0x40001a14 ); +PROVIDE ( mem_zalloc = 0x40001c58 ); +PROVIDE ( memcmp = 0x4000dea8 ); +PROVIDE ( memcpy = 0x4000df48 ); +PROVIDE ( memmove = 0x4000e04c ); +PROVIDE ( memset = 0x4000e190 ); +PROVIDE ( multofup = 0x400031c0 ); +PROVIDE ( pbkdf2_sha1 = 0x4000b840 ); +PROVIDE ( phy_get_romfuncs = 0x40006b08 ); +PROVIDE ( rand = 0x40000600 ); +PROVIDE ( rc4_skip = 0x4000dd68 ); +PROVIDE ( recv_packet = 0x40003d08 ); +PROVIDE ( remove_head_space = 0x40000a04 ); +PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 ); +PROVIDE ( rijndaelKeySetupEnc = 0x40009300 ); +PROVIDE ( rom_abs_temp = 0x400060c0 ); +PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 ); +PROVIDE ( rom_cal_tos_v50 = 0x40007a28 ); +PROVIDE ( rom_chip_50_set_channel = 0x40006f84 ); +PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 ); +PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec ); +PROVIDE ( rom_chip_v5_rx_init = 0x4000711c ); +PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c ); +PROVIDE ( rom_chip_v5_tx_init = 0x4000718c ); +PROVIDE ( rom_dc_iq_est = 0x4000615c ); +PROVIDE ( rom_en_pwdet = 0x400061b8 ); +PROVIDE ( rom_get_bb_atten = 0x40006238 ); +PROVIDE ( rom_get_corr_power = 0x40006260 ); +PROVIDE ( rom_get_fm_sar_dout = 0x400062dc ); +PROVIDE ( rom_get_noisefloor = 0x40006394 ); +PROVIDE ( rom_get_power_db = 0x400063b0 ); +PROVIDE ( rom_i2c_readReg = 0x40007268 ); +PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c ); +PROVIDE ( rom_i2c_writeReg = 0x400072d8 ); +PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c ); +PROVIDE ( rom_iq_est_disable = 0x40006400 ); +PROVIDE ( rom_iq_est_enable = 0x40006430 ); +PROVIDE ( rom_linear_to_db = 0x40006484 ); +PROVIDE ( rom_mhz2ieee = 0x400065a4 ); +PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 ); +PROVIDE ( rom_pbus_debugmode = 0x4000737c ); +PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 ); +PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 ); +PROVIDE ( rom_pbus_force_test = 0x4000747c ); +PROVIDE ( rom_pbus_rd = 0x400074d8 ); +PROVIDE ( rom_pbus_set_rxgain = 0x4000754c ); +PROVIDE ( rom_pbus_set_txgain = 0x40007610 ); +PROVIDE ( rom_pbus_workmode = 0x40007648 ); +PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 ); +PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc ); +PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc ); +PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 ); +PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 ); +PROVIDE ( rom_phy_reset_req = 0x40007804 ); +PROVIDE ( rom_restart_cal = 0x4000781c ); +PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 ); +PROVIDE ( rom_rfcal_rxiq = 0x4000804c ); +PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 ); +PROVIDE ( rom_rfcal_txcap = 0x40008388 ); +PROVIDE ( rom_rfcal_txiq = 0x40008610 ); +PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 ); +PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 ); +PROVIDE ( rom_rfpll_reset = 0x40007868 ); +PROVIDE ( rom_rfpll_set_freq = 0x40007968 ); +PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c ); +PROVIDE ( rom_rxiq_get_mis = 0x40006628 ); +PROVIDE ( rom_sar_init = 0x40006738 ); +PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c ); +PROVIDE ( rom_set_channel_freq = 0x40006c50 ); +PROVIDE ( rom_set_loopback_gain = 0x400067c8 ); +PROVIDE ( rom_set_noise_floor = 0x40006830 ); +PROVIDE ( rom_set_rxclk_en = 0x40006550 ); +PROVIDE ( rom_set_txbb_atten = 0x40008c6c ); +PROVIDE ( rom_set_txclk_en = 0x4000650c ); +PROVIDE ( rom_set_txiq_cal = 0x40008d34 ); +PROVIDE ( rom_start_noisefloor = 0x40006874 ); +PROVIDE ( rom_start_tx_tone = 0x400068b4 ); +PROVIDE ( rom_stop_tx_tone = 0x4000698c ); +PROVIDE ( rom_tx_mac_disable = 0x40006a98 ); +PROVIDE ( rom_tx_mac_enable = 0x40006ad4 ); +PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c ); +PROVIDE ( rom_write_rfpll_sdm = 0x400078dc ); +PROVIDE ( roundup2 = 0x400031b4 ); +PROVIDE ( rtc_enter_sleep = 0x40002870 ); +PROVIDE ( rtc_get_reset_reason = 0x400025e0 ); +PROVIDE ( rtc_intr_handler = 0x400029ec ); +PROVIDE ( rtc_set_sleep_mode = 0x40002668 ); +PROVIDE ( save_rxbcn_mactime = 0x400027a4 ); +PROVIDE ( save_tsf_us = 0x400027ac ); +PROVIDE ( send_packet = 0x40003c80 ); +PROVIDE ( sha1_prf = 0x4000ba48 ); +PROVIDE ( sha1_vector = 0x4000a2ec ); +PROVIDE ( sip_alloc_to_host_evt = 0x40005180 ); +PROVIDE ( sip_get_ptr = 0x400058a8 ); +PROVIDE ( sip_get_state = 0x40005668 ); +PROVIDE ( sip_init_attach = 0x4000567c ); +PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c ); +PROVIDE ( sip_install_rx_data_cb = 0x4000545c ); +PROVIDE ( sip_post = 0x400050fc ); +PROVIDE ( sip_post_init = 0x400056c4 ); +PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c ); +PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 ); +PROVIDE ( sip_send = 0x40005808 ); +PROVIDE ( sip_to_host_chain_append = 0x40005864 ); +PROVIDE ( sip_to_host_evt_send_done = 0x40005234 ); +PROVIDE ( slc_add_credits = 0x400060ac ); +PROVIDE ( slc_enable = 0x40005d90 ); +PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 ); +PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 ); +PROVIDE ( slc_init_attach = 0x40005c50 ); +PROVIDE ( slc_init_credit = 0x4000608c ); +PROVIDE ( slc_pause_from_host = 0x40006014 ); +PROVIDE ( slc_reattach = 0x40005c1c ); +PROVIDE ( slc_resume_from_host = 0x4000603c ); +PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 ); +PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 ); +PROVIDE ( slc_send_to_host_chain = 0x40005de4 ); +PROVIDE ( slc_set_host_io_max_window = 0x40006068 ); +PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 ); +PROVIDE ( software_reset = 0x4000264c ); +PROVIDE ( spi_flash_attach = 0x40004644 ); +PROVIDE ( srand = 0x400005f0 ); +PROVIDE ( strcmp = 0x4000bdc8 ); +PROVIDE ( strcpy = 0x4000bec8 ); +PROVIDE ( strlen = 0x4000bf4c ); +PROVIDE ( strncmp = 0x4000bfa8 ); +PROVIDE ( strncpy = 0x4000c0a0 ); +PROVIDE ( strstr = 0x4000e1e0 ); +PROVIDE ( timer_insert = 0x40002c64 ); +PROVIDE ( uartAttach = 0x4000383c ); +PROVIDE ( uart_baudrate_detect = 0x40003924 ); +PROVIDE ( uart_buff_switch = 0x400038a4 ); +PROVIDE ( uart_rx_intr_handler = 0x40003bbc ); +PROVIDE ( uart_rx_one_char = 0x40003b8c ); +PROVIDE ( uart_rx_one_char_block = 0x40003b64 ); +PROVIDE ( uart_rx_readbuff = 0x40003ec8 ); +PROVIDE ( uart_tx_one_char = 0x40003b30 ); +PROVIDE ( wepkey_128 = 0x4000bc40 ); +PROVIDE ( wepkey_64 = 0x4000bb3c ); +PROVIDE ( xthal_bcopy = 0x40000688 ); +PROVIDE ( xthal_copy123 = 0x4000074c ); +PROVIDE ( xthal_get_ccompare = 0x4000dd4c ); +PROVIDE ( xthal_get_ccount = 0x4000dd38 ); +PROVIDE ( xthal_get_interrupt = 0x4000dd58 ); +PROVIDE ( xthal_get_intread = 0x4000dd58 ); +PROVIDE ( xthal_memcpy = 0x400006c4 ); +PROVIDE ( xthal_set_ccompare = 0x4000dd40 ); +PROVIDE ( xthal_set_intclear = 0x4000dd60 ); +PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 ); +PROVIDE ( xthal_window_spill = 0x4000e324 ); +PROVIDE ( xthal_window_spill_nw = 0x4000e320 ); + +PROVIDE ( Te0 = 0x3fffccf0 ); +PROVIDE ( Td0 = 0x3fffd100 ); +PROVIDE ( Td4s = 0x3fffd500); +PROVIDE ( rcons = 0x3fffd0f0); +PROVIDE ( UartDev = 0x3fffde10 ); +PROVIDE ( flashchip = 0x3fffc714); diff --git a/examples/ESP8266_NONOS_SDK/lib/libairkiss.a b/examples/ESP8266_NONOS_SDK/lib/libairkiss.a new file mode 100644 index 0000000..cfdcc84 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libairkiss.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libat.a b/examples/ESP8266_NONOS_SDK/lib/libat.a new file mode 100755 index 0000000..ed147b5 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libat.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libc.a b/examples/ESP8266_NONOS_SDK/lib/libc.a new file mode 100644 index 0000000..fff85ae Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libc.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libcrypto.a b/examples/ESP8266_NONOS_SDK/lib/libcrypto.a new file mode 100755 index 0000000..42f90f1 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libcrypto.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libdriver.a b/examples/ESP8266_NONOS_SDK/lib/libdriver.a new file mode 100644 index 0000000..9ceb9f6 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libdriver.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libespnow.a b/examples/ESP8266_NONOS_SDK/lib/libespnow.a new file mode 100755 index 0000000..fee7e3a Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libespnow.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libgcc.a b/examples/ESP8266_NONOS_SDK/lib/libgcc.a new file mode 100644 index 0000000..121b28d Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libgcc.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libhal.a b/examples/ESP8266_NONOS_SDK/lib/libhal.a new file mode 100644 index 0000000..47a6473 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libhal.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libjson.a b/examples/ESP8266_NONOS_SDK/lib/libjson.a new file mode 100755 index 0000000..23cb93b Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libjson.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/liblwip.a b/examples/ESP8266_NONOS_SDK/lib/liblwip.a new file mode 100755 index 0000000..d2f7a01 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/liblwip.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/liblwip_536.a b/examples/ESP8266_NONOS_SDK/lib/liblwip_536.a new file mode 100644 index 0000000..5ea340b Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/liblwip_536.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libmain.a b/examples/ESP8266_NONOS_SDK/lib/libmain.a new file mode 100755 index 0000000..00431c1 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libmain.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libmbedtls.a b/examples/ESP8266_NONOS_SDK/lib/libmbedtls.a new file mode 100644 index 0000000..993c3f9 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libmbedtls.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libnet80211.a b/examples/ESP8266_NONOS_SDK/lib/libnet80211.a new file mode 100755 index 0000000..a4a0020 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libnet80211.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libphy.a b/examples/ESP8266_NONOS_SDK/lib/libphy.a new file mode 100644 index 0000000..a19fd81 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libphy.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libpp.a b/examples/ESP8266_NONOS_SDK/lib/libpp.a new file mode 100755 index 0000000..08a68bf Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libpp.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libpwm.a b/examples/ESP8266_NONOS_SDK/lib/libpwm.a new file mode 100644 index 0000000..1913f16 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libpwm.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libsmartconfig.a b/examples/ESP8266_NONOS_SDK/lib/libsmartconfig.a new file mode 100755 index 0000000..b896344 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libsmartconfig.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libssl.a b/examples/ESP8266_NONOS_SDK/lib/libssl.a new file mode 100755 index 0000000..fc8af81 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libssl.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libupgrade.a b/examples/ESP8266_NONOS_SDK/lib/libupgrade.a new file mode 100755 index 0000000..0df31b9 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libupgrade.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libwpa.a b/examples/ESP8266_NONOS_SDK/lib/libwpa.a new file mode 100755 index 0000000..2766a88 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libwpa.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libwpa2.a b/examples/ESP8266_NONOS_SDK/lib/libwpa2.a new file mode 100755 index 0000000..c8b8403 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libwpa2.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/libwps.a b/examples/ESP8266_NONOS_SDK/lib/libwps.a new file mode 100755 index 0000000..b5ca286 Binary files /dev/null and b/examples/ESP8266_NONOS_SDK/lib/libwps.a differ diff --git a/examples/ESP8266_NONOS_SDK/lib/readme.md b/examples/ESP8266_NONOS_SDK/lib/readme.md new file mode 100644 index 0000000..8447d99 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/lib/readme.md @@ -0,0 +1,59 @@ +# About libc.a and libgcc.a + +In order to reduce the size of **.text**, we remove the functions which already in rom code. + +The removed functions in libgcc.a: + +``` +__addsubdf3 +__addsubsf3 +__divdf3 +__divdi3 +__divsi3 +__extendsfdf2 +__fixdfsi +__fixunsdfsi +__fixunssfsi +__floatsidf +__floatsisf +__floatunsidf +__floatunsisf +__muldf3 +__muldi3 +__mulsf3 +__truncdfsf2 +__udivdi3 +__udivsi3 +__umoddi3 +__umodsi3 +__umulsidi3 +``` + +The removed functions in libc.a: + +``` +bzero +memcmp +memcpy +memmove +memset +strcmp +strcpy +strlen +strncmp +strncpy +strstr +``` + +## How to remove the functions in those two lib. + +The libc.a in SDK is compiled from newlib v2.0.0, libgcc.a is compiled from gcc v4.8.5. +If you use other version gcc and newlib, you can follow those commands to strip the functions. + +``` +cp $(TOOLCHAIN)/lib/gcc/xtensa-lx106-elf//libgcc.a . +xtensa-lx106-elf-ar -M < strip_libgcc_funcs.txt + +cp $(TOOLCHAIN)/xtensa-lx106-elf/lib/libc.a . +xtensa-lx106-elf-ar -M < strip_libc_funcs.txt +``` \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/lib/strip_libc_funcs.txt b/examples/ESP8266_NONOS_SDK/lib/strip_libc_funcs.txt new file mode 100644 index 0000000..db4e6b2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/lib/strip_libc_funcs.txt @@ -0,0 +1,15 @@ +OPEN libc.a +DELETE lib_a-bzero.o +DELETE lib_a-memcmp.o +DELETE lib_a-memcpy.o +DELETE lib_a-memmove.o +DELETE lib_a-memset.o +DELETE lib_a-rand.o +DELETE lib_a-strcmp.o +DELETE lib_a-strcpy.o +DELETE lib_a-strlen.o +DELETE lib_a-strncmp.o +DELETE lib_a-strncpy.o +DELETE lib_a-strstr.o +SAVE +END \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/lib/strip_libgcc_funcs.txt b/examples/ESP8266_NONOS_SDK/lib/strip_libgcc_funcs.txt new file mode 100644 index 0000000..ab9b506 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/lib/strip_libgcc_funcs.txt @@ -0,0 +1,25 @@ +OPEN libgcc.a +DELETE _addsubdf3.o +DELETE _addsubsf3.o +DELETE _divdf3.o +DELETE _divdi3.o +DELETE _divsi3.o +DELETE _extendsfdf2.o +DELETE _fixdfsi.o +DELETE _fixunsdfsi.o +DELETE _fixunssfsi.o +DELETE _floatsidf.o +DELETE _floatsisf.o +DELETE _floatunsidf.o +DELETE _floatunsisf.o +DELETE _muldf3.o +DELETE _muldi3.o +DELETE _mulsf3.o +DELETE _truncdfsf2.o +DELETE _udivdi3.o +DELETE _udivsi3.o +DELETE _umoddi3.o +DELETE _umodsi3.o +DELETE _umulsidi3.o +SAVE +END \ No newline at end of file diff --git a/examples/ESP8266_NONOS_SDK/third_party/Makefile b/examples/ESP8266_NONOS_SDK/third_party/Makefile new file mode 100644 index 0000000..de2de8d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/Makefile @@ -0,0 +1,126 @@ +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of object file images to be generated () +# GEN_BINS - list of binaries to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +TARGET = eagle +#FLAVOR = release +FLAVOR = debug + +#EXTRA_CCFLAGS += -u + +ifndef PDIR # { +GEN_IMAGES= eagle.app.v6.out +GEN_BINS= eagle.app.v6.bin +SPECIAL_MKTARGETS=$(APP_MKTARGETS) +SUBDIRS= \ + user + +endif # } PDIR + +APPDIR = . +LDDIR = ../ld + +CCFLAGS += -Os + +TARGET_LDFLAGS = \ + -nostdlib \ + -Wl,-EL \ + --longcalls \ + --text-section-literals + +ifeq ($(FLAVOR),debug) + TARGET_LDFLAGS += -g -O2 +endif + +ifeq ($(FLAVOR),release) + TARGET_LDFLAGS += -g -O0 +endif + +COMPONENTS_eagle.app.v6 = \ + user/libuser.a + +LINKFLAGS_eagle.app.v6 = \ + -L../lib \ + -nostdlib \ + -T$(LD_FILE) \ + -Wl,--no-check-sections \ + -u call_user_start \ + -Wl,-static \ + -Wl,--start-group \ + -lc \ + -lgcc \ + -lhal \ + -lphy \ + -lpp \ + -lnet80211 \ + -llwip \ + -lwpa \ + -lcrypto \ + -lmain \ + -ljson \ + -lssl \ + -lupgrade \ + -lsmartconfig \ + -lairkiss\ + $(DEP_LIBS_eagle.app.v6) \ + -Wl,--end-group + +DEPENDS_eagle.app.v6 = \ + $(LD_FILE) \ + $(LDDIR)/eagle.rom.addr.v6.ld + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# + +#UNIVERSAL_TARGET_DEFINES = \ + +# Other potential configuration flags include: +# -DTXRX_TXBUF_DEBUG +# -DTXRX_RXBUF_DEBUG +# -DWLAN_CONFIG_CCX +CONFIGURATION_DEFINES = -DLWIP_OPEN_SRC \ + -DICACHE_FLASH \ + -DUSE_OPTIMIZE_PRINTF + +DEFINES += \ + $(UNIVERSAL_TARGET_DEFINES) \ + $(CONFIGURATION_DEFINES) + +DDEFINES += \ + $(UNIVERSAL_TARGET_DEFINES) \ + $(CONFIGURATION_DEFINES) + + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + +.PHONY: FORCE +FORCE: + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/arch/cc.h b/examples/ESP8266_NONOS_SDK/third_party/include/arch/cc.h new file mode 100644 index 0000000..3633f67 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/arch/cc.h @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2001, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __ARCH_CC_H__ +#define __ARCH_CC_H__ + +//#include +#include "c_types.h" +#include "ets_sys.h" +#include "osapi.h" +#define EFAULT 14 + +//#define LWIP_PROVIDE_ERRNO + +#if (1) +#define BYTE_ORDER LITTLE_ENDIAN +#else +#define BYTE_ORDER BIG_ENDIAN +#endif + + +typedef unsigned char u8_t; +typedef signed char s8_t; +typedef unsigned short u16_t; +typedef signed short s16_t; +typedef unsigned long u32_t; +typedef signed long s32_t; +typedef unsigned long mem_ptr_t; + +#define S16_F "d" +#define U16_F "d" +#define X16_F "x" + +#define S32_F "d" +#define U32_F "d" +#define X32_F "x" + +#define LWIP_ERR_T s32_t + +//#define PACK_STRUCT_FIELD(x) x __attribute__((packed)) +#define PACK_STRUCT_FIELD(x) x +#define PACK_STRUCT_STRUCT __attribute__((packed)) +#define PACK_STRUCT_BEGIN +#define PACK_STRUCT_END + +//#define LWIP_DEBUG + +#ifdef LWIP_DEBUG +#define LWIP_PLATFORM_DIAG(x) os_printf x +#define LWIP_PLATFORM_ASSERT(x) ETS_ASSERT(x) +#else +#define LWIP_PLATFORM_DIAG(x) +#define LWIP_PLATFORM_ASSERT(x) +#endif + +#define SYS_ARCH_DECL_PROTECT(x) +#define SYS_ARCH_PROTECT(x) +#define SYS_ARCH_UNPROTECT(x) + +#define LWIP_PLATFORM_BYTESWAP 1 +#define LWIP_PLATFORM_HTONS(_n) ((u16_t)((((_n) & 0xff) << 8) | (((_n) >> 8) & 0xff))) +#define LWIP_PLATFORM_HTONL(_n) ((u32_t)( (((_n) & 0xff) << 24) | (((_n) & 0xff00) << 8) | (((_n) >> 8) & 0xff00) | (((_n) >> 24) & 0xff) )) + +#if LWIP_RAW +extern u8_t memp_memory_RAW_PCB_base[]; +#endif /* LWIP_RAW */ + +#if LWIP_UDP +extern u8_t memp_memory_UDP_PCB_base[]; +#endif /* LWIP_UDP */ + +#if LWIP_TCP +extern u8_t memp_memory_TCP_PCB_base[]; +extern u8_t memp_memory_TCP_PCB_LISTEN_base[]; +extern u8_t memp_memory_TCP_SEG_base[] SHMEM_ATTR; +#endif /* LWIP_TCP */ + +#if (!NO_SYS || (NO_SYS && !NO_SYS_NO_TIMERS)) /* LWIP_TIMERS */ +extern u8_t memp_memory_SYS_TIMEOUT_base[]; +#endif /* LWIP_TIMERS */ + +extern u8_t memp_memory_PBUF_base[]; +extern u8_t memp_memory_PBUF_POOL_base[]; + + + +#endif /* __ARCH_CC_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/arch/perf.h b/examples/ESP8266_NONOS_SDK/third_party/include/arch/perf.h new file mode 100644 index 0000000..089faca --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/arch/perf.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2001, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __PERF_H__ +#define __PERF_H__ + +#define PERF_START /* null definition */ +#define PERF_STOP(x) /* null definition */ + +#endif /* __PERF_H__ */ diff --git a/hw/STM32F030R8/Core/Inc/main.h b/examples/ESP8266_NONOS_SDK/third_party/include/arch/sys_arch.h similarity index 100% rename from hw/STM32F030R8/Core/Inc/main.h rename to examples/ESP8266_NONOS_SDK/third_party/include/arch/sys_arch.h diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/api.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/api.h new file mode 100644 index 0000000..91b9e5d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/api.h @@ -0,0 +1,284 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_API_H__ +#define __LWIP_API_H__ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/netbuf.h" +#include "lwip/sys.h" +#include "lwip/ip_addr.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Throughout this file, IP addresses and port numbers are expected to be in + * the same byte order as in the corresponding pcb. + */ + +/* Flags for netconn_write (u8_t) */ +#define NETCONN_NOFLAG 0x00 +#define NETCONN_NOCOPY 0x00 /* Only for source code compatibility */ +#define NETCONN_COPY 0x01 +#define NETCONN_MORE 0x02 +#define NETCONN_DONTBLOCK 0x04 + +/* Flags for struct netconn.flags (u8_t) */ +/** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores whether to wake up the original application task + if data couldn't be sent in the first try. */ +#define NETCONN_FLAG_WRITE_DELAYED 0x01 +/** Should this netconn avoid blocking? */ +#define NETCONN_FLAG_NON_BLOCKING 0x02 +/** Was the last connect action a non-blocking one? */ +#define NETCONN_FLAG_IN_NONBLOCKING_CONNECT 0x04 +/** If this is set, a TCP netconn must call netconn_recved() to update + the TCP receive window (done automatically if not set). */ +#define NETCONN_FLAG_NO_AUTO_RECVED 0x08 +/** If a nonblocking write has been rejected before, poll_tcp needs to + check if the netconn is writable again */ +#define NETCONN_FLAG_CHECK_WRITESPACE 0x10 + + +/* Helpers to process several netconn_types by the same code */ +#define NETCONNTYPE_GROUP(t) (t&0xF0) +#define NETCONNTYPE_DATAGRAM(t) (t&0xE0) + +/** Protocol family and type of the netconn */ +enum netconn_type { + NETCONN_INVALID = 0, + /* NETCONN_TCP Group */ + NETCONN_TCP = 0x10, + /* NETCONN_UDP Group */ + NETCONN_UDP = 0x20, + NETCONN_UDPLITE = 0x21, + NETCONN_UDPNOCHKSUM= 0x22, + /* NETCONN_RAW Group */ + NETCONN_RAW = 0x40 +}; + +/** Current state of the netconn. Non-TCP netconns are always + * in state NETCONN_NONE! */ +enum netconn_state { + NETCONN_NONE, + NETCONN_WRITE, + NETCONN_LISTEN, + NETCONN_CONNECT, + NETCONN_CLOSE +}; + +/** Use to inform the callback function about changes */ +enum netconn_evt { + NETCONN_EVT_RCVPLUS, + NETCONN_EVT_RCVMINUS, + NETCONN_EVT_SENDPLUS, + NETCONN_EVT_SENDMINUS, + NETCONN_EVT_ERROR +}; + +#if LWIP_IGMP +/** Used for netconn_join_leave_group() */ +enum netconn_igmp { + NETCONN_JOIN, + NETCONN_LEAVE +}; +#endif /* LWIP_IGMP */ + +/* forward-declare some structs to avoid to include their headers */ +struct ip_pcb; +struct tcp_pcb; +struct udp_pcb; +struct raw_pcb; +struct netconn; +struct api_msg_msg; + +/** A callback prototype to inform about events for a netconn */ +typedef void (* netconn_callback)(struct netconn *, enum netconn_evt, u16_t len); + +/** A netconn descriptor */ +struct netconn { + /** type of the netconn (TCP, UDP or RAW) */ + enum netconn_type type; + /** current state of the netconn */ + enum netconn_state state; + /** the lwIP internal protocol control block */ + union { + struct ip_pcb *ip; + struct tcp_pcb *tcp; + struct udp_pcb *udp; + struct raw_pcb *raw; + } pcb; + /** the last error this netconn had */ + err_t last_err; + /** sem that is used to synchroneously execute functions in the core context */ + sys_sem_t op_completed; + /** mbox where received packets are stored until they are fetched + by the netconn application thread (can grow quite big) */ + sys_mbox_t recvmbox; +#if LWIP_TCP + /** mbox where new connections are stored until processed + by the application thread */ + sys_mbox_t acceptmbox; +#endif /* LWIP_TCP */ + /** only used for socket layer */ +#if LWIP_SOCKET + int socket; +#endif /* LWIP_SOCKET */ +#if LWIP_SO_RCVTIMEO + /** timeout to wait for new data to be received + (or connections to arrive for listening netconns) */ + int recv_timeout; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + /** maximum amount of bytes queued in recvmbox + not used for TCP: adjust TCP_WND instead! */ + int recv_bufsize; + /** number of bytes currently in recvmbox to be received, + tested against recv_bufsize to limit bytes on recvmbox + for UDP and RAW, used for FIONREAD */ + s16_t recv_avail; +#endif /* LWIP_SO_RCVBUF */ + /** flags holding more netconn-internal state, see NETCONN_FLAG_* defines */ + u8_t flags; +#if LWIP_TCP + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores how much is already sent. */ + size_t write_offset; + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores the message. + Also used during connect and close. */ + struct api_msg_msg *current_msg; +#endif /* LWIP_TCP */ + /** A callback function that is informed about events for this netconn */ + netconn_callback callback; +}; + +/** Register an Network connection event */ +#define API_EVENT(c,e,l) if (c->callback) { \ + (*c->callback)(c, e, l); \ + } + +/** Set conn->last_err to err but don't overwrite fatal errors */ +#define NETCONN_SET_SAFE_ERR(conn, err) do { \ + SYS_ARCH_DECL_PROTECT(lev); \ + SYS_ARCH_PROTECT(lev); \ + if (!ERR_IS_FATAL((conn)->last_err)) { \ + (conn)->last_err = err; \ + } \ + SYS_ARCH_UNPROTECT(lev); \ +} while(0); + +/* Network connection functions: */ +#define netconn_new(t) netconn_new_with_proto_and_callback(t, 0, NULL) +#define netconn_new_with_callback(t, c) netconn_new_with_proto_and_callback(t, 0, c) +struct +netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, + netconn_callback callback); +err_t netconn_delete(struct netconn *conn); +/** Get the type of a netconn (as enum netconn_type). */ +#define netconn_type(conn) (conn->type) + +err_t netconn_getaddr(struct netconn *conn, ip_addr_t *addr, + u16_t *port, u8_t local); +#define netconn_peer(c,i,p) netconn_getaddr(c,i,p,0) +#define netconn_addr(c,i,p) netconn_getaddr(c,i,p,1) + +err_t netconn_bind(struct netconn *conn, ip_addr_t *addr, u16_t port); +err_t netconn_connect(struct netconn *conn, ip_addr_t *addr, u16_t port); +err_t netconn_disconnect (struct netconn *conn); +err_t netconn_listen_with_backlog(struct netconn *conn, u8_t backlog); +#define netconn_listen(conn) netconn_listen_with_backlog(conn, TCP_DEFAULT_LISTEN_BACKLOG) +err_t netconn_accept(struct netconn *conn, struct netconn **new_conn); +err_t netconn_recv(struct netconn *conn, struct netbuf **new_buf); +err_t netconn_recv_tcp_pbuf(struct netconn *conn, struct pbuf **new_buf); +void netconn_recved(struct netconn *conn, u32_t length); +err_t netconn_sendto(struct netconn *conn, struct netbuf *buf, + ip_addr_t *addr, u16_t port); +err_t netconn_send(struct netconn *conn, struct netbuf *buf); +err_t netconn_write(struct netconn *conn, const void *dataptr, size_t size, + u8_t apiflags); +err_t netconn_close(struct netconn *conn); +err_t netconn_shutdown(struct netconn *conn, u8_t shut_rx, u8_t shut_tx); + +#if LWIP_IGMP +err_t netconn_join_leave_group(struct netconn *conn, ip_addr_t *multiaddr, + ip_addr_t *netif_addr, enum netconn_igmp join_or_leave); +#endif /* LWIP_IGMP */ +#if LWIP_DNS +err_t netconn_gethostbyname(const char *name, ip_addr_t *addr); +#endif /* LWIP_DNS */ + +#define netconn_err(conn) ((conn)->last_err) +#define netconn_recv_bufsize(conn) ((conn)->recv_bufsize) + +/** Set the blocking status of netconn calls (@todo: write/send is missing) */ +#define netconn_set_nonblocking(conn, val) do { if(val) { \ + (conn)->flags |= NETCONN_FLAG_NON_BLOCKING; \ +} else { \ + (conn)->flags &= ~ NETCONN_FLAG_NON_BLOCKING; }} while(0) +/** Get the blocking status of netconn calls (@todo: write/send is missing) */ +#define netconn_is_nonblocking(conn) (((conn)->flags & NETCONN_FLAG_NON_BLOCKING) != 0) + +/** TCP: Set the no-auto-recved status of netconn calls (see NETCONN_FLAG_NO_AUTO_RECVED) */ +#define netconn_set_noautorecved(conn, val) do { if(val) { \ + (conn)->flags |= NETCONN_FLAG_NO_AUTO_RECVED; \ +} else { \ + (conn)->flags &= ~ NETCONN_FLAG_NO_AUTO_RECVED; }} while(0) +/** TCP: Get the no-auto-recved status of netconn calls (see NETCONN_FLAG_NO_AUTO_RECVED) */ +#define netconn_get_noautorecved(conn) (((conn)->flags & NETCONN_FLAG_NO_AUTO_RECVED) != 0) + +#if LWIP_SO_RCVTIMEO +/** Set the receive timeout in milliseconds */ +#define netconn_set_recvtimeout(conn, timeout) ((conn)->recv_timeout = (timeout)) +/** Get the receive timeout in milliseconds */ +#define netconn_get_recvtimeout(conn) ((conn)->recv_timeout) +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF +/** Set the receive buffer in bytes */ +#define netconn_set_recvbufsize(conn, recvbufsize) ((conn)->recv_bufsize = (recvbufsize)) +/** Get the receive buffer in bytes */ +#define netconn_get_recvbufsize(conn) ((conn)->recv_bufsize) +#endif /* LWIP_SO_RCVBUF*/ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETCONN */ + +#endif /* __LWIP_API_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/api_msg.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/api_msg.h new file mode 100644 index 0000000..f99d8c3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/api_msg.h @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_API_MSG_H__ +#define __LWIP_API_MSG_H__ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/ip_addr.h" +#include "lwip/err.h" +#include "lwip/sys.h" +#include "lwip/igmp.h" +#include "lwip/api.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* For the netconn API, these values are use as a bitmask! */ +#define NETCONN_SHUT_RD 1 +#define NETCONN_SHUT_WR 2 +#define NETCONN_SHUT_RDWR (NETCONN_SHUT_RD | NETCONN_SHUT_WR) + +/* IP addresses and port numbers are expected to be in + * the same byte order as in the corresponding pcb. + */ +/** This struct includes everything that is necessary to execute a function + for a netconn in another thread context (mainly used to process netconns + in the tcpip_thread context to be thread safe). */ +struct api_msg_msg { + /** The netconn which to process - always needed: it includes the semaphore + which is used to block the application thread until the function finished. */ + struct netconn *conn; + /** The return value of the function executed in tcpip_thread. */ + err_t err; + /** Depending on the executed function, one of these union members is used */ + union { + /** used for do_send */ + struct netbuf *b; + /** used for do_newconn */ + struct { + u8_t proto; + } n; + /** used for do_bind and do_connect */ + struct { + ip_addr_t *ipaddr; + u16_t port; + } bc; + /** used for do_getaddr */ + struct { + ip_addr_t *ipaddr; + u16_t *port; + u8_t local; + } ad; + /** used for do_write */ + struct { + const void *dataptr; + size_t len; + u8_t apiflags; + } w; + /** used for do_recv */ + struct { + u32_t len; + } r; + /** used for do_close (/shutdown) */ + struct { + u8_t shut; + } sd; +#if LWIP_IGMP + /** used for do_join_leave_group */ + struct { + ip_addr_t *multiaddr; + ip_addr_t *netif_addr; + enum netconn_igmp join_or_leave; + } jl; +#endif /* LWIP_IGMP */ +#if TCP_LISTEN_BACKLOG + struct { + u8_t backlog; + } lb; +#endif /* TCP_LISTEN_BACKLOG */ + } msg; +}; + +/** This struct contains a function to execute in another thread context and + a struct api_msg_msg that serves as an argument for this function. + This is passed to tcpip_apimsg to execute functions in tcpip_thread context. */ +struct api_msg { + /** function to execute in tcpip_thread context */ + void (* function)(struct api_msg_msg *msg); + /** arguments for this function */ + struct api_msg_msg msg; +}; + +#if LWIP_DNS +/** As do_gethostbyname requires more arguments but doesn't require a netconn, + it has its own struct (to avoid struct api_msg getting bigger than necessary). + do_gethostbyname must be called using tcpip_callback instead of tcpip_apimsg + (see netconn_gethostbyname). */ +struct dns_api_msg { + /** Hostname to query or dotted IP address string */ + const char *name; + /** Rhe resolved address is stored here */ + ip_addr_t *addr; + /** This semaphore is posted when the name is resolved, the application thread + should wait on it. */ + sys_sem_t *sem; + /** Errors are given back here */ + err_t *err; +}; +#endif /* LWIP_DNS */ + +void do_newconn ( struct api_msg_msg *msg); +void do_delconn ( struct api_msg_msg *msg); +void do_bind ( struct api_msg_msg *msg); +void do_connect ( struct api_msg_msg *msg); +void do_disconnect ( struct api_msg_msg *msg); +void do_listen ( struct api_msg_msg *msg); +void do_send ( struct api_msg_msg *msg); +void do_recv ( struct api_msg_msg *msg); +void do_write ( struct api_msg_msg *msg); +void do_getaddr ( struct api_msg_msg *msg); +void do_close ( struct api_msg_msg *msg); +void do_shutdown ( struct api_msg_msg *msg); +#if LWIP_IGMP +void do_join_leave_group( struct api_msg_msg *msg); +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +void do_gethostbyname(void *arg); +#endif /* LWIP_DNS */ + +struct netconn* netconn_alloc(enum netconn_type t, netconn_callback callback); +void netconn_free(struct netconn *conn); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETCONN */ + +#endif /* __LWIP_API_MSG_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/dhcpserver.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/dhcpserver.h new file mode 100644 index 0000000..df21178 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/dhcpserver.h @@ -0,0 +1,115 @@ +#ifndef __DHCPS_H__ +#define __DHCPS_H__ + +#define USE_DNS + +typedef struct dhcps_state{ + sint16_t state; +} dhcps_state; + +// ����dhcpclient�Զ����һ��DHCP msg�ṹ�� +typedef struct dhcps_msg { + uint8_t op, htype, hlen, hops; + uint8_t xid[4]; + uint16_t secs, flags; + uint8_t ciaddr[4]; + uint8_t yiaddr[4]; + uint8_t siaddr[4]; + uint8_t giaddr[4]; + uint8_t chaddr[16]; + uint8_t sname[64]; + uint8_t file[128]; + uint8_t options[312]; +}dhcps_msg; + +#ifndef LWIP_OPEN_SRC +struct dhcps_lease { + bool enable; + struct ip_addr start_ip; + struct ip_addr end_ip; +}; + +enum dhcps_offer_option{ + OFFER_START = 0x00, + OFFER_ROUTER = 0x01, + OFFER_END +}; +#endif + +typedef enum { + DHCPS_TYPE_DYNAMIC, + DHCPS_TYPE_STATIC +} dhcps_type_t; + +typedef enum { + DHCPS_STATE_ONLINE, + DHCPS_STATE_OFFLINE +} dhcps_state_t; + +struct dhcps_pool{ + struct ip_addr ip; + uint8 mac[6]; + uint32 lease_timer; + dhcps_type_t type; + dhcps_state_t state; + +}; + +typedef struct _list_node{ + void *pnode; + struct _list_node *pnext; +}list_node; + +extern uint32 dhcps_lease_time; +#define DHCPS_LEASE_TIMER dhcps_lease_time //0x05A0 +#define DHCPS_MAX_LEASE 0x64 +#define BOOTP_BROADCAST 0x8000 + +#define DHCP_REQUEST 1 +#define DHCP_REPLY 2 +#define DHCP_HTYPE_ETHERNET 1 +#define DHCP_HLEN_ETHERNET 6 +#define DHCP_MSG_LEN 236 + +#define DHCPS_SERVER_PORT 67 +#define DHCPS_CLIENT_PORT 68 + +#define DHCPDISCOVER 1 +#define DHCPOFFER 2 +#define DHCPREQUEST 3 +#define DHCPDECLINE 4 +#define DHCPACK 5 +#define DHCPNAK 6 +#define DHCPRELEASE 7 + +#define DHCP_OPTION_SUBNET_MASK 1 +#define DHCP_OPTION_ROUTER 3 +#define DHCP_OPTION_DNS_SERVER 6 +#define DHCP_OPTION_REQ_IPADDR 50 +#define DHCP_OPTION_LEASE_TIME 51 +#define DHCP_OPTION_MSG_TYPE 53 +#define DHCP_OPTION_SERVER_ID 54 +#define DHCP_OPTION_INTERFACE_MTU 26 +#define DHCP_OPTION_PERFORM_ROUTER_DISCOVERY 31 +#define DHCP_OPTION_BROADCAST_ADDRESS 28 +#define DHCP_OPTION_REQ_LIST 55 +#define DHCP_OPTION_END 255 + +//#define USE_CLASS_B_NET 1 +#define DHCPS_DEBUG 0 +#define MAX_STATION_NUM 8 + +#define DHCPS_STATE_OFFER 1 +#define DHCPS_STATE_DECLINE 2 +#define DHCPS_STATE_ACK 3 +#define DHCPS_STATE_NAK 4 +#define DHCPS_STATE_IDLE 5 +#define DHCPS_STATE_RELEASE 6 + +#define dhcps_router_enabled(offer) ((offer & OFFER_ROUTER) != 0) + +void dhcps_start(struct ip_info *info); +void dhcps_stop(void); + +#endif + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn.h new file mode 100644 index 0000000..728b457 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn.h @@ -0,0 +1,688 @@ +#ifndef __ESPCONN_H__ +#define __ESPCONN_H__ + +#include "lwip/dns.h" +#include "os_type.h" +#include "lwip/app/espconn_buf.h" + +#if 0 +#define espconn_printf(fmt, args...) os_printf(fmt,## args) +#else +#define espconn_printf(fmt, args...) +#endif + + +typedef void *espconn_handle; +typedef void (* espconn_connect_callback)(void *arg); +typedef void (* espconn_reconnect_callback)(void *arg, sint8 err); + +/* Definitions for error constants. */ + +#define ESPCONN_OK 0 /* No error, everything OK. */ +#define ESPCONN_MEM -1 /* Out of memory error. */ +#define ESPCONN_TIMEOUT -3 /* Timeout. */ +#define ESPCONN_RTE -4 /* Routing problem. */ +#define ESPCONN_INPROGRESS -5 /* Operation in progress */ +#define ESPCONN_MAXNUM -7 /* Total number exceeds the set maximum*/ + +#define ESPCONN_ABRT -8 /* Connection aborted. */ +#define ESPCONN_RST -9 /* Connection reset. */ +#define ESPCONN_CLSD -10 /* Connection closed. */ +#define ESPCONN_CONN -11 /* Not connected. */ + +#define ESPCONN_ARG -12 /* Illegal argument. */ +#define ESPCONN_IF -14 /* Low_level error */ +#define ESPCONN_ISCONN -15 /* Already connected. */ +#define ESPCONN_TIME -16 /* Sync Time error */ +#define ESPCONN_NODATA -17 /* No data can be read */ + +#define ESPCONN_HANDSHAKE -28 /* ssl handshake failed */ +#define ESPCONN_RESP_TIMEOUT -29 /* ssl handshake no response*/ +#define ESPCONN_PROTO_MSG -61 /* ssl application invalid */ + +#define ESPCONN_SSL 0x01 +#define ESPCONN_NORM 0x00 + +#define ESPCONN_STA 0x01 +#define ESPCONN_AP 0x02 +#define ESPCONN_AP_STA 0x03 + +#define STA_NETIF 0x00 +#define AP_NETIF 0x01 + +/** Protocol family and type of the espconn */ +enum espconn_type { + ESPCONN_INVALID = 0, + /* ESPCONN_TCP Group */ + ESPCONN_TCP = 0x10, + /* ESPCONN_UDP Group */ + ESPCONN_UDP = 0x20, +}; + +/** Current state of the espconn. Non-TCP espconn are always in state ESPCONN_NONE! */ +enum espconn_state { + ESPCONN_NONE, + ESPCONN_WAIT, + ESPCONN_LISTEN, + ESPCONN_CONNECT, + ESPCONN_WRITE, + ESPCONN_READ, + ESPCONN_CLOSE +}; + +typedef struct _esp_tcp { + int remote_port; + int local_port; + uint8 local_ip[4]; + uint8 remote_ip[4]; + espconn_connect_callback connect_callback; + espconn_reconnect_callback reconnect_callback; + espconn_connect_callback disconnect_callback; + espconn_connect_callback write_finish_fn; +} esp_tcp; + +typedef struct _esp_udp { + int remote_port; + int local_port; + uint8 local_ip[4]; + uint8 remote_ip[4]; +} esp_udp; + +typedef struct _remot_info{ + enum espconn_state state; + int remote_port; + uint8 remote_ip[4]; +}remot_info; + +/** A callback prototype to inform about events for a espconn */ +typedef void (* espconn_recv_callback)(void *arg, char *pdata, unsigned short len); +typedef void (* espconn_sent_callback)(void *arg); + +/** A espconn descriptor */ +struct espconn { + /** type of the espconn (TCP, UDP) */ + enum espconn_type type; + /** current state of the espconn */ + enum espconn_state state; + union { + esp_tcp *tcp; + esp_udp *udp; + } proto; + /** A callback function that is informed about events for this espconn */ + espconn_recv_callback recv_callback; + espconn_sent_callback sent_callback; + uint8 link_cnt; + void *reverse; +}; + +enum espconn_option{ + ESPCONN_START = 0x00, + ESPCONN_REUSEADDR = 0x01, + ESPCONN_NODELAY = 0x02, + ESPCONN_COPY = 0x04, + ESPCONN_KEEPALIVE = 0x08, + ESPCONN_MANUALRECV = 0x10, + ESPCONN_END +}; + +enum espconn_level{ + ESPCONN_KEEPIDLE, + ESPCONN_KEEPINTVL, + ESPCONN_KEEPCNT +}; + +enum espconn_mode{ + ESPCONN_NOMODE, + ESPCONN_TCPSERVER_MODE, + ESPCONN_TCPCLIENT_MODE, + ESPCONN_UDP_MODE, + ESPCONN_NUM_MODE +}; + +struct espconn_packet{ + uint16 sent_length; /* sent length successful*/ + uint16 snd_buf_size; /* Available buffer size for sending */ + uint16 snd_queuelen; /* Available buffer space for sending */ + uint16 total_queuelen; /* total Available buffer space for sending */ + uint32 packseqno; /* seqno to be sent */ + uint32 packseq_nxt; /* seqno expected */ + uint32 packnum; +}; + +typedef struct _espconn_buf{ + uint8 *payload; + uint8 *punsent; + uint16 unsent; + uint16 len; + uint16 tot_len; + struct _espconn_buf *pnext; +} espconn_buf; + +typedef struct _comon_pkt{ + void *pcb; + int remote_port; + uint8 remote_ip[4]; + uint32 local_port; + uint32 local_ip; + espconn_buf *pbuf; + espconn_buf *ptail; + uint8* ptrbuf; + uint16 cntr; + sint8 err; + uint32 timeout; + uint32 recv_check; + uint8 pbuf_num; + struct espconn_packet packet_info; + bool write_flag; + enum espconn_option espconn_opt; +}comon_pkt; + +typedef struct _espconn_msg{ + struct espconn *pespconn; + comon_pkt pcommon; + uint8 count_opt; + uint8 espconn_mode; + sint16_t hs_status; //the status of the handshake + void *preverse; + void *pssl; + struct _espconn_msg *pnext; + +//***********Code for WIFI_BLOCK from upper************** + uint8 recv_hold_flag; + uint16 recv_holded_buf_Len; +//******************************************************* + uint8 close_flag; + ringbuf *readbuf; +}espconn_msg; + +#ifndef _MDNS_INFO +#define _MDNS_INFO +struct mdns_info { + char *host_name; + char *server_name; + uint16 server_port; + unsigned long ipAddr; + char *txt_data[10]; +}; +#endif + +#define linkMax 15 + +#define espconn_delay_disabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_NODELAY) != 0) +#define espconn_delay_enabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_NODELAY) == 0) +#define espconn_reuse_disabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_REUSEADDR) != 0) +#define espconn_copy_disabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_COPY) != 0) +#define espconn_copy_enabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_COPY) == 0) +#define espconn_keepalive_disabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_KEEPALIVE) != 0) +#define espconn_keepalive_enabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_KEEPALIVE) == 0) + +#define espconn_TaskPrio 26 +#define espconn_TaskQueueLen 15 + +enum espconn_sig { + SIG_ESPCONN_NONE, + SIG_ESPCONN_ERRER, + SIG_ESPCONN_LISTEN, + SIG_ESPCONN_CONNECT, + SIG_ESPCONN_WRITE, + SIG_ESPCONN_SEND, + SIG_ESPCONN_READ, + SIG_ESPCONN_CLOSE +}; + +/****************************************************************************** + * FunctionName : espconn_copy_partial + * Description : reconnect with host + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ + +void espconn_copy_partial(struct espconn *pesp_dest, struct espconn *pesp_source); + +/****************************************************************************** + * FunctionName : espconn_copy_partial + * Description : insert the node to the active connection list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ + +void espconn_list_creat(espconn_msg **phead, espconn_msg* pinsert); + +/****************************************************************************** + * FunctionName : espconn_list_delete + * Description : remove the node from the active connection list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ + +void espconn_list_delete(espconn_msg **phead, espconn_msg* pdelete); + +/****************************************************************************** + * FunctionName : espconn_find_connection + * Description : Initialize the server: set up a listening PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build server + * Returns : none + *******************************************************************************/ + +bool espconn_find_connection(struct espconn *pespconn, espconn_msg **pnode); + +/****************************************************************************** + * FunctionName : espconn_get_connection_info + * Description : used to specify the function that should be called when disconnect + * Parameters : espconn -- espconn to set the err callback + * discon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ + +sint8 espconn_get_connection_info(struct espconn *pespconn, remot_info **pcon_info, uint8 typeflags); + +/****************************************************************************** + * FunctionName : espconn_get_packet_info + * Description : get the packet info with host + * Parameters : espconn -- the espconn used to disconnect the connection + * infoarg -- the packet info + * Returns : the errur code +*******************************************************************************/ + +sint8 espconn_get_packet_info(struct espconn *espconn, struct espconn_packet* infoarg); + +/****************************************************************************** + * FunctionName : espconn_connect + * Description : The function given as the connect + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_connect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_disconnect + * Description : disconnect with host + * Parameters : espconn -- the espconn used to disconnect the connection + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_disconnect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_delete + * Description : disconnect with host + * Parameters : espconn -- the espconn used to disconnect the connection + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_delete(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_accept + * Description : The function given as the listen + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_accept(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_create + * Description : sent data for client or server + * Parameters : espconn -- espconn to the data transmission + * Returns : result +*******************************************************************************/ + +extern sint8 espconn_create(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_wnd + * Description : get the window size of simulatenously active TCP connections + * Parameters : none + * Returns : the number of TCP_MSS active TCP connections +*******************************************************************************/ +extern uint8 espconn_tcp_get_wnd(void); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con + * Description : set the window size simulatenously active TCP connections + * Parameters : num -- the number of TCP_MSS + * Returns : ESPCONN_ARG -- Illegal argument + * ESPCONN_OK -- No error +*******************************************************************************/ +extern sint8 espconn_tcp_set_wnd(uint8 num); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_con + * Description : get the number of simulatenously active TCP connections + * Parameters : none + * Returns : none +*******************************************************************************/ + +extern uint8 espconn_tcp_get_max_con(void); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con + * Description : set the number of simulatenously active TCP connections + * Parameters : num -- total number + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_tcp_set_max_con(uint8 num); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_retran + * Description : get the Maximum number of retransmissions of data active TCP connections + * Parameters : none + * Returns : the Maximum number of retransmissions +*******************************************************************************/ +extern uint8 espconn_tcp_get_max_retran(void); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_retran + * Description : set the Maximum number of retransmissions of data active TCP connections + * Parameters : num -- the Maximum number of retransmissions + * Returns : result +*******************************************************************************/ + +extern sint8 espconn_tcp_set_max_retran(uint8 num); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_syn + * Description : get the Maximum number of retransmissions of SYN segments + * Parameters : none + * Returns : the Maximum number of retransmissions +*******************************************************************************/ + +extern uint8 espconn_tcp_get_max_syn(void); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_syn + * Description : set the Maximum number of retransmissions of SYN segments + * Parameters : num -- the Maximum number of retransmissions + * Returns : result +*******************************************************************************/ + +extern sint8 espconn_tcp_set_max_syn(uint8 num); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_con_allow + * Description : get the count of simulatenously active connections on the server + * Parameters : espconn -- espconn to get the count + * Returns : result +*******************************************************************************/ + +extern sint8 espconn_tcp_get_max_con_allow(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con_allow + * Description : set the count of simulatenously active connections on the server + * Parameters : espconn -- espconn to set the count + * Returns : result +*******************************************************************************/ + +extern sint8 espconn_tcp_set_max_con_allow(struct espconn *espconn, uint8 num); + +/****************************************************************************** + * FunctionName : espconn_tcp_set_buf_count + * Description : set the total number of espconn_buf on the unsent lists + * Parameters : espconn -- espconn to set the count + * num -- the total number of espconn_buf + * Returns : result +*******************************************************************************/ + +extern sint8 espconn_tcp_set_buf_count(struct espconn *espconn, uint8 num); + +/****************************************************************************** + * FunctionName : espconn_regist_time + * Description : used to specify the time that should be called when don't recv data + * Parameters : espconn -- the espconn used to the connection + * interval -- the timer when don't recv data + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_regist_time(struct espconn *espconn, uint32 interval, uint8 type_flag); + +/****************************************************************************** + * FunctionName : espconn_regist_sentcb + * Description : Used to specify the function that should be called when data + * has been successfully delivered to the remote host. + * Parameters : struct espconn *espconn -- espconn to set the sent callback + * espconn_sent_callback sent_cb -- sent callback function to + * call for this espconn when data is successfully sent + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_regist_sentcb(struct espconn *espconn, espconn_sent_callback sent_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_sentcb + * Description : Used to specify the function that should be called when data + * has been successfully delivered to the remote host. + * Parameters : espconn -- espconn to set the sent callback + * sent_cb -- sent callback function to call for this espconn + * when data is successfully sent + * Returns : none +*******************************************************************************/ +extern sint8 espconn_regist_write_finish(struct espconn *espconn, espconn_connect_callback write_finish_fn); + +/****************************************************************************** + * FunctionName : espconn_sent + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_sent(struct espconn *espconn, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_regist_connectcb + * Description : used to specify the function that should be called when + * connects to host. + * Parameters : espconn -- espconn to set the connect callback + * connect_cb -- connected callback function to call when connected + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_regist_connectcb(struct espconn *espconn, espconn_connect_callback connect_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_recvcb + * Description : used to specify the function that should be called when recv + * data from host. + * Parameters : espconn -- espconn to set the recv callback + * recv_cb -- recv callback function to call when recv data + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_regist_recvcb(struct espconn *espconn, espconn_recv_callback recv_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_reconcb + * Description : used to specify the function that should be called when connection + * because of err disconnect. + * Parameters : espconn -- espconn to set the err callback + * recon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_regist_reconcb(struct espconn *espconn, espconn_reconnect_callback recon_cb); + +/****************************************************************************** + * FunctionName : espconn_regist_disconcb + * Description : used to specify the function that should be called when disconnect + * Parameters : espconn -- espconn to set the err callback + * discon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_regist_disconcb(struct espconn *espconn, espconn_connect_callback discon_cb); + +/****************************************************************************** + * FunctionName : espconn_port + * Description : access port value for client so that we don't end up bouncing + * all connections at the same time . + * Parameters : none + * Returns : access port value +*******************************************************************************/ + +extern uint32 espconn_port(void); + +/****************************************************************************** + * FunctionName : espconn_set_opt + * Description : access port value for client so that we don't end up bouncing + * all connections at the same time . + * Parameters : none + * Returns : access port value +*******************************************************************************/ +extern sint8 espconn_set_opt(struct espconn *espconn, uint8 opt); + +/****************************************************************************** + * FunctionName : espconn_set_keepalive + * Description : access level value for connection so that we set the value for + * keep alive + * Parameters : espconn -- the espconn used to set the connection + * level -- the connection's level + * value -- the value of time(s) + * Returns : access port value +*******************************************************************************/ +extern sint8 espconn_set_keepalive(struct espconn *espconn, uint8 level, void* optarg); + +/****************************************************************************** + * FunctionName : espconn_get_keepalive + * Description : access level value for connection so that we get the value for + * keep alive + * Parameters : espconn -- the espconn used to get the connection + * level -- the connection's level + * Returns : access keep alive value +*******************************************************************************/ +extern sint8 espconn_get_keepalive(struct espconn *espconn, uint8 level, void *optarg); + +/****************************************************************************** + * FunctionName : espconn_gethostbyname + * Description : Resolve a hostname (string) into an IP address. + * Parameters : pespconn -- espconn to resolve a hostname + * hostname -- the hostname that is to be queried + * addr -- pointer to a ip_addr_t where to store the address if + * it is already cached in the dns_table (only valid if + * ESPCONN_OK is returned!) + * found -- a callback function to be called on success, failure + * or timeout (only if ERR_INPROGRESS is returned!) + * Returns : err_t return code + * - ESPCONN_OK if hostname is a valid IP address string or the host + * name is already in the local names table. + * - ESPCONN_INPROGRESS enqueue a request to be sent to the DNS server + * for resolution if no errors are present. + * - ESPCONN_ARG: dns client not initialized or invalid hostname +*******************************************************************************/ + +extern err_t espconn_gethostbyname(struct espconn *pespconn, const char *name, ip_addr_t *addr, dns_found_callback found); + +/****************************************************************************** + * FunctionName : espconn_igmp_join + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +extern sint8 espconn_igmp_join(ip_addr_t *host_ip, ip_addr_t *multicast_ip); + +/****************************************************************************** + * FunctionName : espconn_igmp_leave + * Description : leave a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +extern sint8 espconn_igmp_leave(ip_addr_t *host_ip, ip_addr_t *multicast_ip); + +/****************************************************************************** + * FunctionName : espconn_mdns_init + * Description : register a device with mdns + * Parameters : ipAddr -- the ip address of device + * hostname -- the hostname of device + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_init(struct mdns_info *info); +/****************************************************************************** + * FunctionName : espconn_mdns_init + * Description : close mdns socket + * Parameters : void + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_close(void); +/****************************************************************************** + * FunctionName : mdns_server_register + * Description : register a server and join a multicast group + * Parameters : none + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_server_register(void); +/****************************************************************************** + * FunctionName : mdns_server_register + * Description : unregister server and leave multicast group + * Parameters : none + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_server_unregister(void); +/****************************************************************************** + * FunctionName : espconn_mdns_get_servername + * Description : get server name + * Parameters : none + * Returns : server name +*******************************************************************************/ +extern char* espconn_mdns_get_servername(void); +/****************************************************************************** + * FunctionName : espconn_mdns_get_servername + * Description : set server name + * Parameters : server name + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_set_servername(const char *name); +/****************************************************************************** + * FunctionName : espconn_mdns_set_hostname + * Description : set host name + * Parameters : host name + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_set_hostname(char *name); +/****************************************************************************** + * FunctionName : espconn_mdns_init + * Description : get host name + * Parameters : void + * Returns : hostname +*******************************************************************************/ +extern char* espconn_mdns_get_hostname(void); +/****************************************************************************** + * FunctionName : espconn_mdns_disable + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_disable(void); +/****************************************************************************** + * FunctionName : espconn_mdns_enable + * Description : enable mdns + * Parameters : void + * Returns : none +*******************************************************************************/ +extern void espconn_mdns_enable(void); +/****************************************************************************** + * FunctionName : espconn_dns_setserver + * Description : Initialize one of the DNS servers. + * Parameters : numdns -- the index of the DNS server to set must + * be < DNS_MAX_SERVERS = 2 + * dnsserver -- IP address of the DNS server to set + * Returns : none +*******************************************************************************/ +extern void espconn_dns_setserver(u8_t numdns, ip_addr_t *dnsserver); +/****************************************************************************** + * FunctionName : espconn_dns_getserver + * Description : get dns server. + * Parameters : numdns -- the index of the DNS server ,must + * be < DNS_MAX_SERVERS = 2 + * Returns : dnsserver -- struct ip_addr_t +*******************************************************************************/ +extern ip_addr_t espconn_dns_getserver(u8_t numdns); +#endif + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_buf.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_buf.h new file mode 100644 index 0000000..8bdfaa1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_buf.h @@ -0,0 +1,60 @@ +/* + * ringbuf.h + * + * Created on: Apr 22, 2016 + * Author: liuhan + */ + +#ifndef _ESPCONN_BUF_H_ +#define _ESPCONN_BUF_H_ + +/* + * ringbuffer.c + * + * Created on: Apr 22, 2016 + * Author: liuhan + */ +#include "c_types.h" + +#include "ets_sys.h" +#include "os_type.h" + +typedef struct ringbuf_t { + uint8_t *buf; + uint8_t *head, *tail; + size_t size; +} ringbuf, *ringbuf_t; + +ringbuf_t ringbuf_new(size_t capacity); + +size_t ringbuf_buffer_size(const struct ringbuf_t *rb); + +void ringbuf_reset(ringbuf_t rb); + +void ringbuf_free(ringbuf_t *rb); + +size_t ringbuf_capacity(const struct ringbuf_t *rb); + +size_t ringbuf_bytes_free(const struct ringbuf_t *rb); + +size_t ringbuf_bytes_used(const struct ringbuf_t *rb); + +int ringbuf_is_full(const struct ringbuf_t *rb); + +int ringbuf_is_empty(const struct ringbuf_t *rb); + +const void* ringbuf_tail(const struct ringbuf_t *rb); + +const void* ringbuf_head(const struct ringbuf_t *rb); + +static uint8_t *ringbuf_nextp(ringbuf_t rb, const uint8_t *p); + +size_t ringbuf_findchr(const struct ringbuf_t *rb, int c, size_t offset); + +size_t ringbuf_memset(ringbuf_t dst, int c, size_t len); + +void *ringbuf_memcpy_into(ringbuf_t dst, const void *src, size_t count); + +void *ringbuf_memcpy_from(void *dst, ringbuf_t src, size_t count); + +#endif /* RINGBUF_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_tcp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_tcp.h new file mode 100644 index 0000000..76e0991 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_tcp.h @@ -0,0 +1,94 @@ +#ifndef __ESPCONN_TCP_H__ +#define __ESPCONN_TCP_H__ + +#ifndef ESPCONN_TCP_DEBUG +#define ESPCONN_TCP_DEBUG LWIP_DBG_OFF +#endif +#include "lwip/app/espconn.h" + +#ifndef ESPCONN_TCP_TIMER +#define ESPCONN_TCP_TIMER 40 +#endif + +#define espconn_keepalive_enable(pcb) ((pcb)->so_options |= SOF_KEEPALIVE) +#define espconn_keepalive_disable(pcb) ((pcb)->so_options &= ~SOF_KEEPALIVE) + +#define espconn_manual_recv_disabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_MANUALRECV) != 0) +#define espconn_manual_recv_enabled(espconn) (((espconn)->pcommon.espconn_opt & ESPCONN_MANUALRECV) == 0) + +extern int ets_task(); +extern int ets_post(); + +/****************************************************************************** + * FunctionName : espconn_pbuf_delete + * Description : remove the node from the active connection list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +extern void ICACHE_FLASH_ATTR espconn_pbuf_delete(espconn_buf **phead, espconn_buf* pdelete); + +/****************************************************************************** + * FunctionName : espconn_tcp_delete + * Description : delete the server: delete a listening PCB and free it + * Parameters : pdeletecon -- the espconn used to delete a server + * Returns : none +*******************************************************************************/ +extern sint8 ICACHE_FLASH_ATTR espconn_tcp_delete(struct espconn *pdeletecon); + +/****************************************************************************** + * FunctionName : espconn_tcp_write + * Description : write the packet which in the active connection's list. + * Parameters : arg -- the node pointer which reverse the packet + * Returns : ESPCONN_MEM: memory error + * ESPCONN_OK:have enough space for write packet +*******************************************************************************/ +extern err_t ICACHE_FLASH_ATTR espconn_tcp_write(void *arg); + +/****************************************************************************** + * FunctionName : espconn_kill_pcb + * Description : kill all the TCP block by port + * Parameters : none + * Returns : none +*******************************************************************************/ +extern void ICACHE_FLASH_ATTR espconn_kill_pcb(u16_t port); + +/****************************************************************************** + * FunctionName : espconn_kill_oldest_pcb + * Description : A oldest incoming connection has been killed. + * Parameters : none + * Returns : none +*******************************************************************************/ + +extern void espconn_kill_oldest_pcb(void); + +/****************************************************************************** + * FunctionName : espconn_tcp_disconnect + * Description : A new incoming connection has been disconnected. + * Parameters : espconn -- the espconn used to disconnect with host + * Returns : none +*******************************************************************************/ + +extern void espconn_tcp_disconnect(espconn_msg *pdiscon,u8 type); + +/****************************************************************************** + * FunctionName : espconn_tcp_client + * Description : Initialize the client: set up a connect PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_tcp_client(struct espconn* espconn); + +/****************************************************************************** + * FunctionName : espconn_tcp_server + * Description : Initialize the server: set up a listening PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build server + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_tcp_server(struct espconn *espconn); + +#endif /* __CLIENT_TCP_H__ */ + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_udp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_udp.h new file mode 100644 index 0000000..cdb312f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/espconn_udp.h @@ -0,0 +1,64 @@ +#ifndef __ESPCONN_UDP_H__ +#define __ESPCONN_UDP_H__ + +#ifndef ESPCONN_UDP_DEBUG +#define ESPCONN_UDP_DEBUG LWIP_DBG_OFF +#endif + +#include "lwip/app/espconn.h" + +/****************************************************************************** + * FunctionName : espconn_udp_client + * Description : Initialize the client: set up a PCB and bind it to the port + * Parameters : pespconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_udp_client(struct espconn *pespconn); + +/****************************************************************************** + * FunctionName : espconn_udp_disconnect + * Description : A new incoming connection has been disconnected. + * Parameters : espconn -- the espconn used to disconnect with host + * Returns : none +*******************************************************************************/ + +extern void espconn_udp_disconnect(espconn_msg *pdiscon); + +/****************************************************************************** + * FunctionName : espconn_udp_server + * Description : Initialize the server: set up a PCB and bind it to the port + * Parameters : pespconn -- the espconn used to build server + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_udp_server(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_udp_sent + * Description : sent data for client or server + * Parameters : void *arg -- client or server to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : none +*******************************************************************************/ + +extern err_t espconn_udp_sent(void *arg, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_udp_sendto + * Description : sent data for UDP + * Parameters : void *arg -- UDP to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : return espconn error code. + * - ESPCONN_OK. Successful. No error occured. + * - ESPCONN_MEM. Out of memory. + * - ESPCONN_RTE. Could not find route to destination address. + * - More errors could be returned by lower protocol layers. +*******************************************************************************/ +extern err_t espconn_udp_sendto(void *arg, uint8 *psent, uint16 length); + +#endif /* __ESPCONN_UDP_H__ */ + + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/ping.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/ping.h new file mode 100644 index 0000000..6d4d175 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/ping.h @@ -0,0 +1,88 @@ +#ifndef __PING_H__ +#define __PING_H__ +#include "lwip/ip_addr.h" +#include "lwip/icmp.h" +/** + * PING_USE_SOCKETS: Set to 1 to use sockets, otherwise the raw api is used + */ +#ifndef PING_USE_SOCKETS +#define PING_USE_SOCKETS LWIP_SOCKET +#endif + +/** + * PING_DEBUG: Enable debugging for PING. + */ +#ifndef PING_DEBUG +#define PING_DEBUG LWIP_DBG_OFF +#endif + +/** ping receive timeout - in milliseconds */ +#ifndef PING_RCV_TIMEO +#define PING_RCV_TIMEO 1000 +#endif + +/** ping delay - in milliseconds */ +#ifndef PING_COARSE +#define PING_COARSE 1000 +#endif + +/** ping identifier - must fit on a u16_t */ +#ifndef PING_ID +#define PING_ID 0xAFAF +#endif + +/** ping additional data size to include in the packet */ +#ifndef PING_DATA_SIZE +#define PING_DATA_SIZE 32 +#endif + +/** ping result action - no default action */ +#ifndef PING_RESULT +#define PING_RESULT(ping_ok) +#endif + +#define DEFAULT_PING_MAX_COUNT 4 +#define PING_TIMEOUT_MS 1000 + +typedef void (* ping_recv_function)(void* arg, void *pdata); +typedef void (* ping_sent_function)(void* arg, void *pdata); + +struct ping_option{ + uint32 count; + uint32 ip; + uint32 coarse_time; + ping_recv_function recv_function; + ping_sent_function sent_function; + void* reverse; +}; + +struct ping_msg{ + struct ping_option *ping_opt; + struct raw_pcb *ping_pcb; + uint32 ping_start; + uint32 ping_sent; + uint32 timeout_count; + uint32 max_count; + uint32 sent_count; + uint32 coarse_time; +}; + +struct ping_resp{ + uint32 total_count; + uint32 resp_time; + uint32 seqno; + uint32 timeout_count; + uint32 bytes; + uint32 total_bytes; + uint32 total_time; + sint8 ping_err; +}; + +bool ping_start(struct ping_option *ping_opt); +bool ping_regist_recv(struct ping_option *ping_opt, ping_recv_function ping_recv); +bool ping_regist_sent(struct ping_option *ping_opt, ping_sent_function ping_sent); + +uint32 system_relative_time(uint32 time); +int system_get_time(void); + +#endif /* __PING_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/time.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/time.h new file mode 100644 index 0000000..738dd0a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/app/time.h @@ -0,0 +1,50 @@ +/* + * time.h + * + * Created on: May 31, 2016 + * Author: liuhan + */ + +#ifndef TIME_H_ +#define TIME_H_ +#include "osapi.h" +#include "os_type.h" +#include "lwip/sntp.h" +#include + +/***************************RTC TIME OPTION***************************************/ +// daylight settings +// Base calculated with value obtained from NTP server (64 bits) +#define sntp_base (*((uint64_t*)RTC_STORE0)) +// Timer value when base was obtained +#define TIM_REF_SET(value) WRITE_PERI_REG(RTC_STORE2, value) +#define TIM_REF_GET() READ_PERI_REG(RTC_STORE2) + +// Setters and getters for CAL, TZ and DST. +#define RTC_CAL_SET(val) do {uint32 value = READ_PERI_REG(RTC_STORE3);\ + value |= ((val) & 0x0000FFFF);\ + WRITE_PERI_REG(RTC_STORE3, value);\ + }while(0) +#define RTC_DST_SET(val) do {uint32 value = READ_PERI_REG(RTC_STORE3);\ + value |= (((val)<<16) & 0x00010000);\ + WRITE_PERI_REG(RTC_STORE3, value);\ + }while(0) +#define RTC_TZ_SET(val) do {uint32 value = READ_PERI_REG(RTC_STORE3);\ + value |= (((val)<<24) & 0xFF000000);\ + WRITE_PERI_REG(RTC_STORE3, value);\ + }while(0) + +#define RTC_CAL_GET() (READ_PERI_REG(RTC_STORE3) & 0x0000FFFF) +#define RTC_DST_GET() ((READ_PERI_REG(RTC_STORE3) & 0x00010000)>>16) +#define RTC_TZ_GET() ((((int)READ_PERI_REG(RTC_STORE3)) & ((int)0xFF000000))>>24) +void system_update_rtc(time_t t, uint32_t us); +time_t sntp_get_rtc_time(sint32_t *us); +int sntp_update_rtc(time_t sec, u32_t us); + +int gettimeofday(struct timeval* t, void* timezone); +void updateTime(uint32 ms); +bool configTime(int timezone, int daylightOffset, char *server1, char *server2, char *server3, bool enable); +time_t time(time_t *t); +unsigned long millis(void); +unsigned long micros(void); +#endif /* TIME_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/arch.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/arch.h new file mode 100644 index 0000000..524af6b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/arch.h @@ -0,0 +1,238 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ARCH_H__ +#define __LWIP_ARCH_H__ + +#ifndef LITTLE_ENDIAN +#define LITTLE_ENDIAN 1234 +#endif + +#ifndef BIG_ENDIAN +#define BIG_ENDIAN 4321 +#endif + +#include "arch/cc.h" + +/** Temporary: define format string for size_t if not defined in cc.h */ +#ifndef SZT_F +#define SZT_F U32_F +#endif /* SZT_F */ +/** Temporary upgrade helper: define format string for u8_t as hex if not + defined in cc.h */ +#ifndef X8_F +#define X8_F "02x" +#endif /* X8_F */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef PACK_STRUCT_BEGIN +#define PACK_STRUCT_BEGIN +#endif /* PACK_STRUCT_BEGIN */ + +#ifndef PACK_STRUCT_END +#define PACK_STRUCT_END +#endif /* PACK_STRUCT_END */ + +#ifndef PACK_STRUCT_FIELD +#define PACK_STRUCT_FIELD(x) x +#endif /* PACK_STRUCT_FIELD */ + + +#ifndef LWIP_UNUSED_ARG +#define LWIP_UNUSED_ARG(x) (void)x +#endif /* LWIP_UNUSED_ARG */ + + +#ifdef LWIP_PROVIDE_ERRNO + +#define EPERM 1 /* Operation not permitted */ +#define ENOENT 2 /* No such file or directory */ +#define ESRCH 3 /* No such process */ +#define EINTR 4 /* Interrupted system call */ +#define EIO 5 /* I/O error */ +#define ENXIO 6 /* No such device or address */ +#define E2BIG 7 /* Arg list too long */ +#define ENOEXEC 8 /* Exec format error */ +#define EBADF 9 /* Bad file number */ +#define ECHILD 10 /* No child processes */ +#define EAGAIN 11 /* Try again */ +#define ENOMEM 12 /* Out of memory */ +#define EACCES 13 /* Permission denied */ +#define EFAULT 14 /* Bad address */ +#define ENOTBLK 15 /* Block device required */ +#define EBUSY 16 /* Device or resource busy */ +#define EEXIST 17 /* File exists */ +#define EXDEV 18 /* Cross-device link */ +#define ENODEV 19 /* No such device */ +#define ENOTDIR 20 /* Not a directory */ +#define EISDIR 21 /* Is a directory */ +#define EINVAL 22 /* Invalid argument */ +#define ENFILE 23 /* File table overflow */ +#define EMFILE 24 /* Too many open files */ +#define ENOTTY 25 /* Not a typewriter */ +#define ETXTBSY 26 /* Text file busy */ +#define EFBIG 27 /* File too large */ +#define ENOSPC 28 /* No space left on device */ +#define ESPIPE 29 /* Illegal seek */ +#define EROFS 30 /* Read-only file system */ +#define EMLINK 31 /* Too many links */ +#define EPIPE 32 /* Broken pipe */ +#define EDOM 33 /* Math argument out of domain of func */ +#define ERANGE 34 /* Math result not representable */ +#define EDEADLK 35 /* Resource deadlock would occur */ +#define ENAMETOOLONG 36 /* File name too long */ +#define ENOLCK 37 /* No record locks available */ +#define ENOSYS 38 /* Function not implemented */ +#define ENOTEMPTY 39 /* Directory not empty */ +#define ELOOP 40 /* Too many symbolic links encountered */ +#define EWOULDBLOCK EAGAIN /* Operation would block */ +#define ENOMSG 42 /* No message of desired type */ +#define EIDRM 43 /* Identifier removed */ +#define ECHRNG 44 /* Channel number out of range */ +#define EL2NSYNC 45 /* Level 2 not synchronized */ +#define EL3HLT 46 /* Level 3 halted */ +#define EL3RST 47 /* Level 3 reset */ +#define ELNRNG 48 /* Link number out of range */ +#define EUNATCH 49 /* Protocol driver not attached */ +#define ENOCSI 50 /* No CSI structure available */ +#define EL2HLT 51 /* Level 2 halted */ +#define EBADE 52 /* Invalid exchange */ +#define EBADR 53 /* Invalid request descriptor */ +#define EXFULL 54 /* Exchange full */ +#define ENOANO 55 /* No anode */ +#define EBADRQC 56 /* Invalid request code */ +#define EBADSLT 57 /* Invalid slot */ + +#define EDEADLOCK EDEADLK + +#define EBFONT 59 /* Bad font file format */ +#define ENOSTR 60 /* Device not a stream */ +#define ENODATA 61 /* No data available */ +#define ETIME 62 /* Timer expired */ +#define ENOSR 63 /* Out of streams resources */ +#define ENONET 64 /* Machine is not on the network */ +#define ENOPKG 65 /* Package not installed */ +#define EREMOTE 66 /* Object is remote */ +#define ENOLINK 67 /* Link has been severed */ +#define EADV 68 /* Advertise error */ +#define ESRMNT 69 /* Srmount error */ +#define ECOMM 70 /* Communication error on send */ +#define EPROTO 71 /* Protocol error */ +#define EMULTIHOP 72 /* Multihop attempted */ +#define EDOTDOT 73 /* RFS specific error */ +#define EBADMSG 74 /* Not a data message */ +#define EOVERFLOW 75 /* Value too large for defined data type */ +#define ENOTUNIQ 76 /* Name not unique on network */ +#define EBADFD 77 /* File descriptor in bad state */ +#define EREMCHG 78 /* Remote address changed */ +#define ELIBACC 79 /* Can not access a needed shared library */ +#define ELIBBAD 80 /* Accessing a corrupted shared library */ +#define ELIBSCN 81 /* .lib section in a.out corrupted */ +#define ELIBMAX 82 /* Attempting to link in too many shared libraries */ +#define ELIBEXEC 83 /* Cannot exec a shared library directly */ +#define EILSEQ 84 /* Illegal byte sequence */ +#define ERESTART 85 /* Interrupted system call should be restarted */ +#define ESTRPIPE 86 /* Streams pipe error */ +#define EUSERS 87 /* Too many users */ +#define ENOTSOCK 88 /* Socket operation on non-socket */ +#define EDESTADDRREQ 89 /* Destination address required */ +#define EMSGSIZE 90 /* Message too long */ +#define EPROTOTYPE 91 /* Protocol wrong type for socket */ +#define ENOPROTOOPT 92 /* Protocol not available */ +#define EPROTONOSUPPORT 93 /* Protocol not supported */ +#define ESOCKTNOSUPPORT 94 /* Socket type not supported */ +#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define EPFNOSUPPORT 96 /* Protocol family not supported */ +#define EAFNOSUPPORT 97 /* Address family not supported by protocol */ +#define EADDRINUSE 98 /* Address already in use */ +#define EADDRNOTAVAIL 99 /* Cannot assign requested address */ +#define ENETDOWN 100 /* Network is down */ +#define ENETUNREACH 101 /* Network is unreachable */ +#define ENETRESET 102 /* Network dropped connection because of reset */ +#define ECONNABORTED 103 /* Software caused connection abort */ +#define ECONNRESET 104 /* Connection reset by peer */ +#define ENOBUFS 105 /* No buffer space available */ +#define EISCONN 106 /* Transport endpoint is already connected */ +#define ENOTCONN 107 /* Transport endpoint is not connected */ +#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ +#define ETOOMANYREFS 109 /* Too many references: cannot splice */ +#define ETIMEDOUT 110 /* Connection timed out */ +#define ECONNREFUSED 111 /* Connection refused */ +#define EHOSTDOWN 112 /* Host is down */ +#define EHOSTUNREACH 113 /* No route to host */ +#define EALREADY 114 /* Operation already in progress */ +#define EINPROGRESS 115 /* Operation now in progress */ +#define ESTALE 116 /* Stale NFS file handle */ +#define EUCLEAN 117 /* Structure needs cleaning */ +#define ENOTNAM 118 /* Not a XENIX named type file */ +#define ENAVAIL 119 /* No XENIX semaphores available */ +#define EISNAM 120 /* Is a named type file */ +#define EREMOTEIO 121 /* Remote I/O error */ +#define EDQUOT 122 /* Quota exceeded */ + +#define ENOMEDIUM 123 /* No medium found */ +#define EMEDIUMTYPE 124 /* Wrong medium type */ + + +#define ENSROK 0 /* DNS server returned answer with no data */ +#define ENSRNODATA 160 /* DNS server returned answer with no data */ +#define ENSRFORMERR 161 /* DNS server claims query was misformatted */ +#define ENSRSERVFAIL 162 /* DNS server returned general failure */ +#define ENSRNOTFOUND 163 /* Domain name not found */ +#define ENSRNOTIMP 164 /* DNS server does not implement requested operation */ +#define ENSRREFUSED 165 /* DNS server refused query */ +#define ENSRBADQUERY 166 /* Misformatted DNS query */ +#define ENSRBADNAME 167 /* Misformatted domain name */ +#define ENSRBADFAMILY 168 /* Unsupported address family */ +#define ENSRBADRESP 169 /* Misformatted DNS reply */ +#define ENSRCONNREFUSED 170 /* Could not contact DNS servers */ +#define ENSRTIMEOUT 171 /* Timeout while contacting DNS servers */ +#define ENSROF 172 /* End of file */ +#define ENSRFILE 173 /* Error reading file */ +#define ENSRNOMEM 174 /* Out of memory */ +#define ENSRDESTRUCTION 175 /* Application terminated lookup */ +#define ENSRQUERYDOMAINTOOLONG 176 /* Domain name is too long */ +#define ENSRCNAMELOOP 177 /* Domain name is too long */ + +#ifndef errno +extern int errno; +#endif + +#endif /* LWIP_PROVIDE_ERRNO */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ARCH_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/autoip.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/autoip.h new file mode 100644 index 0000000..23c264a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/autoip.h @@ -0,0 +1,119 @@ +/** + * @file + * + * AutoIP Automatic LinkLocal IP Configuration + */ + +/* + * + * Copyright (c) 2007 Dominik Spies + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Dominik Spies + * + * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform + * with RFC 3927. + * + * + * Please coordinate changes and requests with Dominik Spies + * + */ + +#ifndef __LWIP_AUTOIP_H__ +#define __LWIP_AUTOIP_H__ + +#include "lwip/opt.h" + +#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netif.h" +#include "lwip/udp.h" +#include "netif/etharp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* AutoIP Timing */ +#define AUTOIP_TMR_INTERVAL 100 +#define AUTOIP_TICKS_PER_SECOND (1000 / AUTOIP_TMR_INTERVAL) + +/* RFC 3927 Constants */ +#define PROBE_WAIT 1 /* second (initial random delay) */ +#define PROBE_MIN 1 /* second (minimum delay till repeated probe) */ +#define PROBE_MAX 2 /* seconds (maximum delay till repeated probe) */ +#define PROBE_NUM 3 /* (number of probe packets) */ +#define ANNOUNCE_NUM 2 /* (number of announcement packets) */ +#define ANNOUNCE_INTERVAL 2 /* seconds (time between announcement packets) */ +#define ANNOUNCE_WAIT 2 /* seconds (delay before announcing) */ +#define MAX_CONFLICTS 10 /* (max conflicts before rate limiting) */ +#define RATE_LIMIT_INTERVAL 60 /* seconds (delay between successive attempts) */ +#define DEFEND_INTERVAL 10 /* seconds (min. wait between defensive ARPs) */ + +/* AutoIP client states */ +#define AUTOIP_STATE_OFF 0 +#define AUTOIP_STATE_PROBING 1 +#define AUTOIP_STATE_ANNOUNCING 2 +#define AUTOIP_STATE_BOUND 3 + +struct autoip +{ + ip_addr_t llipaddr; /* the currently selected, probed, announced or used LL IP-Address */ + u8_t state; /* current AutoIP state machine state */ + u8_t sent_num; /* sent number of probes or announces, dependent on state */ + u16_t ttw; /* ticks to wait, tick is AUTOIP_TMR_INTERVAL long */ + u8_t lastconflict; /* ticks until a conflict can be solved by defending */ + u8_t tried_llipaddr; /* total number of probed/used Link Local IP-Addresses */ +}; + + +/** Init srand, has to be called before entering mainloop */ +void autoip_init(void); + +/** Set a struct autoip allocated by the application to work with */ +void autoip_set_struct(struct netif *netif, struct autoip *autoip); + +/** Start AutoIP client */ +err_t autoip_start(struct netif *netif); + +/** Stop AutoIP client */ +err_t autoip_stop(struct netif *netif); + +/** Handles every incoming ARP Packet, called by etharp_arp_input */ +void autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr); + +/** Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds */ +void autoip_tmr(void); + +/** Handle a possible change in the network configuration */ +void autoip_network_changed(struct netif *netif); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_AUTOIP */ + +#endif /* __LWIP_AUTOIP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/debug.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/debug.h new file mode 100644 index 0000000..d8359ea --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/debug.h @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_DEBUG_H__ +#define __LWIP_DEBUG_H__ + +#include "lwip/arch.h" + +/** lower two bits indicate debug level + * - 0 all + * - 1 warning + * - 2 serious + * - 3 severe + */ +#define LWIP_DBG_LEVEL_ALL 0x00 +#define LWIP_DBG_LEVEL_OFF LWIP_DBG_LEVEL_ALL /* compatibility define only */ +#define LWIP_DBG_LEVEL_WARNING 0x01 /* bad checksums, dropped packets, ... */ +#define LWIP_DBG_LEVEL_SERIOUS 0x02 /* memory allocation failures, ... */ +#define LWIP_DBG_LEVEL_SEVERE 0x03 +#define LWIP_DBG_MASK_LEVEL 0x03 + +/** flag for LWIP_DEBUGF to enable that debug message */ +#define LWIP_DBG_ON 0x80U +/** flag for LWIP_DEBUGF to disable that debug message */ +#define LWIP_DBG_OFF 0x00U + +/** flag for LWIP_DEBUGF indicating a tracing message (to follow program flow) */ +#define LWIP_DBG_TRACE 0x40U +/** flag for LWIP_DEBUGF indicating a state debug message (to follow module states) */ +#define LWIP_DBG_STATE 0x20U +/** flag for LWIP_DEBUGF indicating newly added code, not thoroughly tested yet */ +#define LWIP_DBG_FRESH 0x10U +/** flag for LWIP_DEBUGF to halt after printing this debug message */ +#define LWIP_DBG_HALT 0x08U + +#ifndef LWIP_NOASSERT +#define LWIP_ASSERT(message, assertion) do { if(!(assertion)) \ + LWIP_PLATFORM_ASSERT(message); } while(0) +#else /* LWIP_NOASSERT */ +#define LWIP_ASSERT(message, assertion) +#endif /* LWIP_NOASSERT */ + +/** if "expression" isn't true, then print "message" and execute "handler" expression */ +#ifndef LWIP_ERROR +#define LWIP_ERROR(message, expression, handler) do { if (!(expression)) { \ + LWIP_PLATFORM_ASSERT(message); handler;}} while(0) +#endif /* LWIP_ERROR */ + +#ifdef LWIP_DEBUG +/** print debug message only if debug message type is enabled... + * AND is of correct type AND is at least LWIP_DBG_LEVEL + */ +#define LWIP_DEBUGF(debug, message) do { \ + if ( \ + ((debug) & LWIP_DBG_ON) && \ + ((debug) & LWIP_DBG_TYPES_ON) && \ + ((s16_t)((debug) & LWIP_DBG_MASK_LEVEL) >= LWIP_DBG_MIN_LEVEL)) { \ + LWIP_PLATFORM_DIAG(message); \ + if ((debug) & LWIP_DBG_HALT) { \ + while(1); \ + } \ + } \ + } while(0) + +#else /* LWIP_DEBUG */ +#define LWIP_DEBUGF(debug, message) +#endif /* LWIP_DEBUG */ + +#endif /* __LWIP_DEBUG_H__ */ + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/def.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/def.h new file mode 100644 index 0000000..9b6de6a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/def.h @@ -0,0 +1,127 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_DEF_H__ +#define __LWIP_DEF_H__ + +/* arch.h might define NULL already */ +#include "lwip/arch.h" +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define LWIP_MAX(x , y) (((x) > (y)) ? (x) : (y)) +#define LWIP_MIN(x , y) (((x) < (y)) ? (x) : (y)) + +#ifndef NULL +#define NULL ((void *)0) +#endif + +/** Get the absolute difference between 2 u32_t values (correcting overflows) + * 'a' is expected to be 'higher' (without overflow) than 'b'. */ +#define LWIP_U32_DIFF(a, b) (((a) >= (b)) ? ((a) - (b)) : (((a) + ((b) ^ 0xFFFFFFFF) + 1))) + +/* Endianess-optimized shifting of two u8_t to create one u16_t */ +#if BYTE_ORDER == LITTLE_ENDIAN +#define LWIP_MAKE_U16(a, b) ((a << 8) | b) +#else +#define LWIP_MAKE_U16(a, b) ((b << 8) | a) +#endif + +#ifndef LWIP_PLATFORM_BYTESWAP +#define LWIP_PLATFORM_BYTESWAP 0 +#endif + +#ifndef LWIP_PREFIX_BYTEORDER_FUNCS +/* workaround for naming collisions on some platforms */ + +#ifdef htons +#undef htons +#endif /* htons */ +#ifdef htonl +#undef htonl +#endif /* htonl */ +#ifdef ntohs +#undef ntohs +#endif /* ntohs */ +#ifdef ntohl +#undef ntohl +#endif /* ntohl */ + +#define htons(x) lwip_htons(x) +#define ntohs(x) lwip_ntohs(x) +#define htonl(x) lwip_htonl(x) +#define ntohl(x) lwip_ntohl(x) +#endif /* LWIP_PREFIX_BYTEORDER_FUNCS */ + +#if BYTE_ORDER == BIG_ENDIAN +#define lwip_htons(x) (x) +#define lwip_ntohs(x) (x) +#define lwip_htonl(x) (x) +#define lwip_ntohl(x) (x) +#define PP_HTONS(x) (x) +#define PP_NTOHS(x) (x) +#define PP_HTONL(x) (x) +#define PP_NTOHL(x) (x) +#else /* BYTE_ORDER != BIG_ENDIAN */ +#if LWIP_PLATFORM_BYTESWAP +#define lwip_htons(x) LWIP_PLATFORM_HTONS(x) +#define lwip_ntohs(x) LWIP_PLATFORM_HTONS(x) +#define lwip_htonl(x) LWIP_PLATFORM_HTONL(x) +#define lwip_ntohl(x) LWIP_PLATFORM_HTONL(x) +#else /* LWIP_PLATFORM_BYTESWAP */ +u16_t lwip_htons(u16_t x); +u16_t lwip_ntohs(u16_t x); +u32_t lwip_htonl(u32_t x); +u32_t lwip_ntohl(u32_t x); +#endif /* LWIP_PLATFORM_BYTESWAP */ + +/* These macros should be calculated by the preprocessor and are used + with compile-time constants only (so that there is no little-endian + overhead at runtime). */ +#define PP_HTONS(x) ((((x) & 0xff) << 8) | (((x) & 0xff00) >> 8)) +#define PP_NTOHS(x) PP_HTONS(x) +#define PP_HTONL(x) ((((x) & 0xff) << 24) | \ + (((x) & 0xff00) << 8) | \ + (((x) & 0xff0000UL) >> 8) | \ + (((x) & 0xff000000UL) >> 24)) +#define PP_NTOHL(x) PP_HTONL(x) + +#endif /* BYTE_ORDER == BIG_ENDIAN */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_DEF_H__ */ + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/dhcp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/dhcp.h new file mode 100644 index 0000000..57baab3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/dhcp.h @@ -0,0 +1,258 @@ +/** @file + */ + +#ifndef __LWIP_DHCP_H__ +#define __LWIP_DHCP_H__ + +#include "lwip/opt.h" + +#if LWIP_DHCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netif.h" +#include "lwip/udp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** period (in seconds) of the application calling dhcp_coarse_tmr() */ +#define DHCP_COARSE_TIMER_SECS 60 +/** period (in milliseconds) of the application calling dhcp_coarse_tmr() */ +#define DHCP_COARSE_TIMER_MSECS (DHCP_COARSE_TIMER_SECS * 1000UL) +/** period (in milliseconds) of the application calling dhcp_fine_tmr() */ +#define DHCP_FINE_TIMER_MSECS 500 + +#define DHCP_CHADDR_LEN 16U +#define DHCP_SNAME_LEN 64U +#define DHCP_FILE_LEN 128U + +struct dhcp +{ + /** transaction identifier of last sent request */ + u32_t xid; + /** our connection to the DHCP server */ + struct udp_pcb *pcb; + /** incoming msg */ + struct dhcp_msg *msg_in; + /** current DHCP state machine state */ + u8_t state; + /** retries of current request */ + u8_t tries; +#if LWIP_DHCP_AUTOIP_COOP + u8_t autoip_coop_state; +#endif + u8_t subnet_mask_given; + + struct pbuf *p_out; /* pbuf of outcoming msg */ + struct dhcp_msg *msg_out; /* outgoing msg */ + u16_t options_out_len; /* outgoing msg options length */ + u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */ + u16_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */ + u16_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */ + u16_t t1_renew_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next renew try */ + u16_t t2_rebind_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next rebind try */ + u16_t lease_used; /* #ticks with period DHCP_COARSE_TIMER_SECS since last received DHCP ack */ + u16_t t0_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for lease time */ + ip_addr_t server_ip_addr; /* dhcp server address that offered this lease */ + ip_addr_t offered_ip_addr; + ip_addr_t offered_sn_mask; + ip_addr_t offered_gw_addr; + + u32_t offered_t0_lease; /* lease period (in seconds) */ + u32_t offered_t1_renew; /* recommended renew time (usually 50% of lease period) */ + u32_t offered_t2_rebind; /* recommended rebind time (usually 66% of lease period) */ + /* @todo: LWIP_DHCP_BOOTP_FILE configuration option? + integrate with possible TFTP-client for booting? */ +#define LWIP_DHCP_BOOTP_FILE 0 +#if LWIP_DHCP_BOOTP_FILE + ip_addr_t offered_si_addr; + char boot_file_name[DHCP_FILE_LEN]; +#endif /* LWIP_DHCP_BOOTPFILE */ +}; + +/* MUST be compiled with "pack structs" or equivalent! */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** minimum set of fields of any DHCP message */ +struct dhcp_msg +{ + PACK_STRUCT_FIELD(u8_t op); + PACK_STRUCT_FIELD(u8_t htype); + PACK_STRUCT_FIELD(u8_t hlen); + PACK_STRUCT_FIELD(u8_t hops); + PACK_STRUCT_FIELD(u32_t xid); + PACK_STRUCT_FIELD(u16_t secs); + PACK_STRUCT_FIELD(u16_t flags); + PACK_STRUCT_FIELD(ip_addr_p_t ciaddr); + PACK_STRUCT_FIELD(ip_addr_p_t yiaddr); + PACK_STRUCT_FIELD(ip_addr_p_t siaddr); + PACK_STRUCT_FIELD(ip_addr_p_t giaddr); + PACK_STRUCT_FIELD(u8_t chaddr[DHCP_CHADDR_LEN]); + PACK_STRUCT_FIELD(u8_t sname[DHCP_SNAME_LEN]); + PACK_STRUCT_FIELD(u8_t file[DHCP_FILE_LEN]); + PACK_STRUCT_FIELD(u32_t cookie); +#define DHCP_MIN_OPTIONS_LEN 68U +/** make sure user does not configure this too small */ +#if ((defined(DHCP_OPTIONS_LEN)) && (DHCP_OPTIONS_LEN < DHCP_MIN_OPTIONS_LEN)) +# undef DHCP_OPTIONS_LEN +#endif +/** allow this to be configured in lwipopts.h, but not too small */ +#if (!defined(DHCP_OPTIONS_LEN)) +/** set this to be sufficient for your options in outgoing DHCP msgs */ +# define DHCP_OPTIONS_LEN DHCP_MIN_OPTIONS_LEN +#endif + PACK_STRUCT_FIELD(u8_t options[DHCP_OPTIONS_LEN]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +void dhcp_set_struct(struct netif *netif, struct dhcp *dhcp); +/** Remove a struct dhcp previously set to the netif using dhcp_set_struct() */ +#define dhcp_remove_struct(netif) do { (netif)->dhcp = NULL; } while(0) +void dhcp_cleanup(struct netif *netif); +/** start DHCP configuration */ +err_t dhcp_start(struct netif *netif); +/** enforce early lease renewal (not needed normally)*/ +err_t dhcp_renew(struct netif *netif); +/** release the DHCP lease, usually called before dhcp_stop()*/ +err_t dhcp_release(struct netif *netif); +/** stop DHCP configuration */ +void dhcp_stop(struct netif *netif); +/** inform server of our manual IP address */ +void dhcp_inform(struct netif *netif); +/** Handle a possible change in the network configuration */ +void dhcp_network_changed(struct netif *netif); + +err_t dhcp_set_vendor_class_identifier(uint8_t len, char *str); + +/** if enabled, check whether the offered IP address is not in use, using ARP */ +#if DHCP_DOES_ARP_CHECK +void dhcp_arp_reply(struct netif *netif, ip_addr_t *addr); +#endif + +/** to be called every minute */ +void dhcp_coarse_tmr(void); +/** to be called every half second */ +void dhcp_fine_tmr(void); + +/** DHCP message item offsets and length */ +#define DHCP_OP_OFS 0 +#define DHCP_HTYPE_OFS 1 +#define DHCP_HLEN_OFS 2 +#define DHCP_HOPS_OFS 3 +#define DHCP_XID_OFS 4 +#define DHCP_SECS_OFS 8 +#define DHCP_FLAGS_OFS 10 +#define DHCP_CIADDR_OFS 12 +#define DHCP_YIADDR_OFS 16 +#define DHCP_SIADDR_OFS 20 +#define DHCP_GIADDR_OFS 24 +#define DHCP_CHADDR_OFS 28 +#define DHCP_SNAME_OFS 44 +#define DHCP_FILE_OFS 108 +#define DHCP_MSG_LEN 236 + +#define DHCP_COOKIE_OFS DHCP_MSG_LEN +#define DHCP_OPTIONS_OFS (DHCP_MSG_LEN + 4) + +#define DHCP_CLIENT_PORT 68 +#define DHCP_SERVER_PORT 67 + +/** DHCP client states */ +#define DHCP_OFF 0 +#define DHCP_REQUESTING 1 +#define DHCP_INIT 2 +#define DHCP_REBOOTING 3 +#define DHCP_REBINDING 4 +#define DHCP_RENEWING 5 +#define DHCP_SELECTING 6 +#define DHCP_INFORMING 7 +#define DHCP_CHECKING 8 +#define DHCP_PERMANENT 9 +#define DHCP_BOUND 10 +/** not yet implemented #define DHCP_RELEASING 11 */ +#define DHCP_BACKING_OFF 12 + +/** AUTOIP cooperatation flags */ +#define DHCP_AUTOIP_COOP_STATE_OFF 0 +#define DHCP_AUTOIP_COOP_STATE_ON 1 + +#define DHCP_BOOTREQUEST 1 +#define DHCP_BOOTREPLY 2 + +/** DHCP message types */ +#define DHCP_DISCOVER 1 +#define DHCP_OFFER 2 +#define DHCP_REQUEST 3 +#define DHCP_DECLINE 4 +#define DHCP_ACK 5 +#define DHCP_NAK 6 +#define DHCP_RELEASE 7 +#define DHCP_INFORM 8 + +/** DHCP hardware type, currently only ethernet is supported */ +#define DHCP_HTYPE_ETH 1 + +#define DHCP_MAGIC_COOKIE 0x63825363UL + +/* This is a list of options for BOOTP and DHCP, see RFC 2132 for descriptions */ + +/** BootP options */ +#define DHCP_OPTION_PAD 0 +#define DHCP_OPTION_SUBNET_MASK 1 /* RFC 2132 3.3 */ +#define DHCP_OPTION_ROUTER 3 +#define DHCP_OPTION_DNS_SERVER 6 +#define DHCP_OPTION_HOSTNAME 12 +#define DHCP_OPTION_IP_TTL 23 +#define DHCP_OPTION_MTU 26 +#define DHCP_OPTION_BROADCAST 28 +#define DHCP_OPTION_TCP_TTL 37 +#define DHCP_OPTION_END 255 + +/**add options for support more router by liuHan**/ +#define DHCP_OPTION_DOMAIN_NAME 15 +#define DHCP_OPTION_PRD 31 +#define DHCP_OPTION_STATIC_ROUTER 33 +#define DHCP_OPTION_VSN 43 +#define DHCP_OPTION_NB_TINS 44 +#define DHCP_OPTION_NB_TINT 46 +#define DHCP_OPTION_NB_TIS 47 +#define DHCP_OPTION_CLASSLESS_STATIC_ROUTER 121 +/** DHCP options */ +#define DHCP_OPTION_REQUESTED_IP 50 /* RFC 2132 9.1, requested IP address */ +#define DHCP_OPTION_LEASE_TIME 51 /* RFC 2132 9.2, time in seconds, in 4 bytes */ +#define DHCP_OPTION_OVERLOAD 52 /* RFC2132 9.3, use file and/or sname field for options */ + +#define DHCP_OPTION_MESSAGE_TYPE 53 /* RFC 2132 9.6, important for DHCP */ +#define DHCP_OPTION_MESSAGE_TYPE_LEN 1 + +#define DHCP_OPTION_SERVER_ID 54 /* RFC 2132 9.7, server IP address */ +#define DHCP_OPTION_PARAMETER_REQUEST_LIST 55 /* RFC 2132 9.8, requested option types */ + +#define DHCP_OPTION_MAX_MSG_SIZE 57 /* RFC 2132 9.10, message size accepted >= 576 */ +#define DHCP_OPTION_MAX_MSG_SIZE_LEN 2 + +#define DHCP_OPTION_T1 58 /* T1 renewal time */ +#define DHCP_OPTION_T2 59 /* T2 rebinding time */ +#define DHCP_OPTION_US 60 +#define DHCP_OPTION_CLIENT_ID 61 +#define DHCP_OPTION_TFTP_SERVERNAME 66 +#define DHCP_OPTION_BOOTFILE 67 + +/** possible combinations of overloading the file and sname fields with options */ +#define DHCP_OVERLOAD_NONE 0 +#define DHCP_OVERLOAD_FILE 1 +#define DHCP_OVERLOAD_SNAME 2 +#define DHCP_OVERLOAD_SNAME_FILE 3 + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_DHCP */ + +#endif /*__LWIP_DHCP_H__*/ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/dns.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/dns.h new file mode 100644 index 0000000..6c7d9b0 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/dns.h @@ -0,0 +1,124 @@ +/** + * lwip DNS resolver header file. + + * Author: Jim Pettinato + * April 2007 + + * ported from uIP resolv.c Copyright (c) 2002-2003, Adam Dunkels. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __LWIP_DNS_H__ +#define __LWIP_DNS_H__ + +#include "lwip/opt.h" + +#if LWIP_DNS /* don't build if not configured for use in lwipopts.h */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** DNS timer period */ +#define DNS_TMR_INTERVAL 1000 + +/** DNS field TYPE used for "Resource Records" */ +#define DNS_RRTYPE_A 1 /* a host address */ +#define DNS_RRTYPE_NS 2 /* an authoritative name server */ +#define DNS_RRTYPE_MD 3 /* a mail destination (Obsolete - use MX) */ +#define DNS_RRTYPE_MF 4 /* a mail forwarder (Obsolete - use MX) */ +#define DNS_RRTYPE_CNAME 5 /* the canonical name for an alias */ +#define DNS_RRTYPE_SOA 6 /* marks the start of a zone of authority */ +#define DNS_RRTYPE_MB 7 /* a mailbox domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_MG 8 /* a mail group member (EXPERIMENTAL) */ +#define DNS_RRTYPE_MR 9 /* a mail rename domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_NULL 10 /* a null RR (EXPERIMENTAL) */ +#define DNS_RRTYPE_WKS 11 /* a well known service description */ +#define DNS_RRTYPE_PTR 12 /* a domain name pointer */ +#define DNS_RRTYPE_HINFO 13 /* host information */ +#define DNS_RRTYPE_MINFO 14 /* mailbox or mail list information */ +#define DNS_RRTYPE_MX 15 /* mail exchange */ +#define DNS_RRTYPE_TXT 16 /* text strings */ + +/** DNS field CLASS used for "Resource Records" */ +#define DNS_RRCLASS_IN 1 /* the Internet */ +#define DNS_RRCLASS_CS 2 /* the CSNET class (Obsolete - used only for examples in some obsolete RFCs) */ +#define DNS_RRCLASS_CH 3 /* the CHAOS class */ +#define DNS_RRCLASS_HS 4 /* Hesiod [Dyer 87] */ +#define DNS_RRCLASS_FLUSH 0x800 /* Flush bit */ + +/* The size used for the next line is rather a hack, but it prevents including socket.h in all files + that include memp.h, and that would possibly break portability (since socket.h defines some types + and constants possibly already define by the OS). + Calculation rule: + sizeof(struct addrinfo) + sizeof(struct sockaddr_in) + DNS_MAX_NAME_LENGTH + 1 byte zero-termination */ +#define NETDB_ELEM_SIZE (32 + 16 + DNS_MAX_NAME_LENGTH + 1) + +#if DNS_LOCAL_HOSTLIST +/** struct used for local host-list */ +struct local_hostlist_entry { + /** static hostname */ + const char *name; + /** static host address in network byteorder */ + ip_addr_t addr; + struct local_hostlist_entry *next; +}; +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC +#ifndef DNS_LOCAL_HOSTLIST_MAX_NAMELEN +#define DNS_LOCAL_HOSTLIST_MAX_NAMELEN DNS_MAX_NAME_LENGTH +#endif +#define LOCALHOSTLIST_ELEM_SIZE ((sizeof(struct local_hostlist_entry) + DNS_LOCAL_HOSTLIST_MAX_NAMELEN + 1)) +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ +#endif /* DNS_LOCAL_HOSTLIST */ + +/** Callback which is invoked when a hostname is found. + * A function of this type must be implemented by the application using the DNS resolver. + * @param name pointer to the name that was looked up. + * @param ipaddr pointer to an ip_addr_t containing the IP address of the hostname, + * or NULL if the name could not be found (or on any other error). + * @param callback_arg a user-specified callback argument passed to dns_gethostbyname +*/ +typedef void (*dns_found_callback)(const char *name, ip_addr_t *ipaddr, void *callback_arg); + +void dns_init(void); +void dns_tmr(void); +void dns_setserver(u8_t numdns, ip_addr_t *dnsserver); +ip_addr_t dns_getserver(u8_t numdns); +err_t dns_gethostbyname(const char *hostname, ip_addr_t *addr, + dns_found_callback found, void *callback_arg); + +#if DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC +int dns_local_removehost(const char *hostname, const ip_addr_t *addr); +err_t dns_local_addhost(const char *hostname, const ip_addr_t *addr); +#endif /* DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_DNS */ + +#endif /* __LWIP_DNS_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/err.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/err.h new file mode 100644 index 0000000..cb69a9f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/err.h @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ERR_H__ +#define __LWIP_ERR_H__ + +#include "lwip/opt.h" +#include "lwip/arch.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Define LWIP_ERR_T in cc.h if you want to use + * a different type for your platform (must be signed). */ +#ifdef LWIP_ERR_T +typedef LWIP_ERR_T err_t; +#else /* LWIP_ERR_T */ +typedef s8_t err_t; +#endif /* LWIP_ERR_T*/ + +/* Definitions for error constants. */ + +#define ERR_OK 0 /* No error, everything OK. */ +#define ERR_MEM -1 /* Out of memory error. */ +#define ERR_BUF -2 /* Buffer error. */ +#define ERR_TIMEOUT -3 /* Timeout. */ +#define ERR_RTE -4 /* Routing problem. */ +#define ERR_INPROGRESS -5 /* Operation in progress */ +#define ERR_VAL -6 /* Illegal value. */ +#define ERR_WOULDBLOCK -7 /* Operation would block. */ + +#define ERR_IS_FATAL(e) ((e) < ERR_WOULDBLOCK) + +#define ERR_ABRT -8 /* Connection aborted. */ +#define ERR_RST -9 /* Connection reset. */ +#define ERR_CLSD -10 /* Connection closed. */ +#define ERR_CONN -11 /* Not connected. */ + +#define ERR_ARG -12 /* Illegal argument. */ + +#define ERR_USE -13 /* Address in use. */ + +#define ERR_IF -14 /* Low-level netif error */ +#define ERR_ISCONN -15 /* Already connected. */ + + +#ifdef LWIP_DEBUG +extern const char *lwip_strerr(err_t err)ICACHE_FLASH_ATTR; +#else +#define lwip_strerr(x) "" +#endif /* LWIP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ERR_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/icmp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/icmp.h new file mode 100644 index 0000000..9bcb7bc --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/icmp.h @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ICMP_H__ +#define __LWIP_ICMP_H__ + +#include "lwip/opt.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ICMP_ER 0 /* echo reply */ +#define ICMP_DUR 3 /* destination unreachable */ +#define ICMP_SQ 4 /* source quench */ +#define ICMP_RD 5 /* redirect */ +#define ICMP_ECHO 8 /* echo */ +#define ICMP_TE 11 /* time exceeded */ +#define ICMP_PP 12 /* parameter problem */ +#define ICMP_TS 13 /* timestamp */ +#define ICMP_TSR 14 /* timestamp reply */ +#define ICMP_IRQ 15 /* information request */ +#define ICMP_IR 16 /* information reply */ + +enum icmp_dur_type { + ICMP_DUR_NET = 0, /* net unreachable */ + ICMP_DUR_HOST = 1, /* host unreachable */ + ICMP_DUR_PROTO = 2, /* protocol unreachable */ + ICMP_DUR_PORT = 3, /* port unreachable */ + ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ + ICMP_DUR_SR = 5 /* source route failed */ +}; + +enum icmp_te_type { + ICMP_TE_TTL = 0, /* time to live exceeded in transit */ + ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ +}; + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +/** This is the standard ICMP header only that the u32_t data + * is splitted to two u16_t like ICMP echo needs it. + * This header is also used for other ICMP types that do not + * use the data part. + * ICMPײṹ + * ICMPײкܴԣ + * ýṹͬICMPġ + */ +PACK_STRUCT_BEGIN +struct icmp_echo_hdr { + PACK_STRUCT_FIELD(u8_t type); + PACK_STRUCT_FIELD(u8_t code); + PACK_STRUCT_FIELD(u16_t chksum); + PACK_STRUCT_FIELD(u16_t id); + PACK_STRUCT_FIELD(u16_t seqno); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +//ȡICMPײֶ +#define ICMPH_TYPE(hdr) ((hdr)->type) +#define ICMPH_CODE(hdr) ((hdr)->code) + +/** Combines type and code to an u16_t ICMPײֶдӦֵ*/ +#define ICMPH_TYPE_SET(hdr, t) ((hdr)->type = (t)) +#define ICMPH_CODE_SET(hdr, c) ((hdr)->code = (c)) + + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +void icmp_input(struct pbuf *p, struct netif *inp)ICACHE_FLASH_ATTR; +void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)ICACHE_FLASH_ATTR; +void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)ICACHE_FLASH_ATTR; + +#endif /* LWIP_ICMP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ICMP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/igmp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/igmp.h new file mode 100644 index 0000000..a22262e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/igmp.h @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2002 CITEL Technologies Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS'' + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. +*/ + +#ifndef __LWIP_IGMP_H__ +#define __LWIP_IGMP_H__ + +#include "lwip/opt.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/pbuf.h" + +#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */ + +#ifdef __cplusplus +extern "C" { +#endif + + +/* IGMP timer */ +#define IGMP_TMR_INTERVAL 100 /* Milliseconds */ +#define IGMP_V1_DELAYING_MEMBER_TMR (1000/IGMP_TMR_INTERVAL) +#define IGMP_JOIN_DELAYING_MEMBER_TMR (500 /IGMP_TMR_INTERVAL) + +/* MAC Filter Actions, these are passed to a netif's + * igmp_mac_filter callback function. */ +#define IGMP_DEL_MAC_FILTER 0 +#define IGMP_ADD_MAC_FILTER 1 + + +/** + * igmp group structure - there is + * a list of groups for each interface + * these should really be linked from the interface, but + * if we keep them separate we will not affect the lwip original code + * too much + * + * There will be a group for the all systems group address but this + * will not run the state machine as it is used to kick off reports + * from all the other groups + */ +struct igmp_group { + /** next link */ + struct igmp_group *next; + /** interface on which the group is active */ + struct netif *netif; + /** multicast address */ + ip_addr_t group_address; + /** signifies we were the last person to report */ + u8_t last_reporter_flag; + /** current state of the group */ + u8_t group_state; + /** timer for reporting, negative is OFF */ + u16_t timer; + /** counter of simultaneous uses */ + u8_t use; +}; + +/* Prototypes */ +void igmp_init(void)ICACHE_FLASH_ATTR; +err_t igmp_start(struct netif *netif)ICACHE_FLASH_ATTR; +err_t igmp_stop(struct netif *netif)ICACHE_FLASH_ATTR; +void igmp_report_groups(struct netif *netif)ICACHE_FLASH_ATTR; +struct igmp_group *igmp_lookfor_group(struct netif *ifp, ip_addr_t *addr)ICACHE_FLASH_ATTR; +void igmp_input(struct pbuf *p, struct netif *inp, ip_addr_t *dest)ICACHE_FLASH_ATTR; +err_t igmp_joingroup(ip_addr_t *ifaddr, ip_addr_t *groupaddr)ICACHE_FLASH_ATTR; +err_t igmp_leavegroup(ip_addr_t *ifaddr, ip_addr_t *groupaddr)ICACHE_FLASH_ATTR; +void igmp_tmr(void)ICACHE_FLASH_ATTR; +int r_rand(void); +#define LWIP_RAND() r_rand() +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_IGMP */ + +#endif /* __LWIP_IGMP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/inet.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/inet.h new file mode 100644 index 0000000..7bff49b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/inet.h @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INET_H__ +#define __LWIP_INET_H__ + +#include "lwip/opt.h" +#include "lwip/def.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** For compatibility with BSD code */ +struct in_addr { + u32_t s_addr; +}; + +/** 255.255.255.255 */ +#define INADDR_NONE IPADDR_NONE +/** 127.0.0.1 */ +#define INADDR_LOOPBACK IPADDR_LOOPBACK +/** 0.0.0.0 */ +#define INADDR_ANY IPADDR_ANY +/** 255.255.255.255 */ +#define INADDR_BROADCAST IPADDR_BROADCAST + +/* Definitions of the bits in an Internet address integer. + + On subnets, host and network parts are found according to + the subnet mask, not these masks. */ +#define IN_CLASSA(a) IP_CLASSA(a) +#define IN_CLASSA_NET IP_CLASSA_NET +#define IN_CLASSA_NSHIFT IP_CLASSA_NSHIFT +#define IN_CLASSA_HOST IP_CLASSA_HOST +#define IN_CLASSA_MAX IP_CLASSA_MAX + +#define IN_CLASSB(b) IP_CLASSB(b) +#define IN_CLASSB_NET IP_CLASSB_NET +#define IN_CLASSB_NSHIFT IP_CLASSB_NSHIFT +#define IN_CLASSB_HOST IP_CLASSB_HOST +#define IN_CLASSB_MAX IP_CLASSB_MAX + +#define IN_CLASSC(c) IP_CLASSC(c) +#define IN_CLASSC_NET IP_CLASSC_NET +#define IN_CLASSC_NSHIFT IP_CLASSC_NSHIFT +#define IN_CLASSC_HOST IP_CLASSC_HOST +#define IN_CLASSC_MAX IP_CLASSC_MAX + +#define IN_CLASSD(d) IP_CLASSD(d) +#define IN_CLASSD_NET IP_CLASSD_NET /* These ones aren't really */ +#define IN_CLASSD_NSHIFT IP_CLASSD_NSHIFT /* net and host fields, but */ +#define IN_CLASSD_HOST IP_CLASSD_HOST /* routing needn't know. */ +#define IN_CLASSD_MAX IP_CLASSD_MAX + +#define IN_MULTICAST(a) IP_MULTICAST(a) + +#define IN_EXPERIMENTAL(a) IP_EXPERIMENTAL(a) +#define IN_BADCLASS(a) IP_BADCLASS(a) + +#define IN_LOOPBACKNET IP_LOOPBACKNET + +#define inet_addr_from_ipaddr(target_inaddr, source_ipaddr) ((target_inaddr)->s_addr = ip4_addr_get_u32(source_ipaddr)) +#define inet_addr_to_ipaddr(target_ipaddr, source_inaddr) (ip4_addr_set_u32(target_ipaddr, (source_inaddr)->s_addr)) +/* ATTENTION: the next define only works because both s_addr and ip_addr_t are an u32_t effectively! */ +#define inet_addr_to_ipaddr_p(target_ipaddr_p, source_inaddr) ((target_ipaddr_p) = (ip_addr_t*)&((source_inaddr)->s_addr)) + +/* directly map this to the lwip internal functions */ +#define inet_addr(cp) ipaddr_addr(cp) +#define inet_aton(cp, addr) ipaddr_aton(cp, (ip_addr_t*)addr) +#define inet_ntoa(addr) ipaddr_ntoa((ip_addr_t*)&(addr)) +#define inet_ntoa_r(addr, buf, buflen) ipaddr_ntoa_r((ip_addr_t*)&(addr), buf, buflen) + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INET_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/inet_chksum.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/inet_chksum.h new file mode 100644 index 0000000..41be641 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/inet_chksum.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INET_CHKSUM_H__ +#define __LWIP_INET_CHKSUM_H__ + +#include "lwip/opt.h" + +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +/** Swap the bytes in an u16_t: much like htons() for little-endian */ +#ifndef SWAP_BYTES_IN_WORD +#if LWIP_PLATFORM_BYTESWAP && (BYTE_ORDER == LITTLE_ENDIAN) +/* little endian and PLATFORM_BYTESWAP defined */ +#define SWAP_BYTES_IN_WORD(w) LWIP_PLATFORM_HTONS(w) +#else /* LWIP_PLATFORM_BYTESWAP && (BYTE_ORDER == LITTLE_ENDIAN) */ +/* can't use htons on big endian (or PLATFORM_BYTESWAP not defined)... */ +#define SWAP_BYTES_IN_WORD(w) (((w) & 0xff) << 8) | (((w) & 0xff00) >> 8) +#endif /* LWIP_PLATFORM_BYTESWAP && (BYTE_ORDER == LITTLE_ENDIAN)*/ +#endif /* SWAP_BYTES_IN_WORD */ + +/** Split an u32_t in two u16_ts and add them up */ +#ifndef FOLD_U32T +#define FOLD_U32T(u) (((u) >> 16) + ((u) & 0x0000ffffUL)) +#endif + +#if LWIP_CHECKSUM_ON_COPY +/** Function-like macro: same as MEMCPY but returns the checksum of copied data + as u16_t */ +#ifndef LWIP_CHKSUM_COPY +#define LWIP_CHKSUM_COPY(dst, src, len) lwip_chksum_copy(dst, src, len) +#ifndef LWIP_CHKSUM_COPY_ALGORITHM +#define LWIP_CHKSUM_COPY_ALGORITHM 1 +#endif /* LWIP_CHKSUM_COPY_ALGORITHM */ +#endif /* LWIP_CHKSUM_COPY */ +#else /* LWIP_CHECKSUM_ON_COPY */ +#define LWIP_CHKSUM_COPY_ALGORITHM 0 +#endif /* LWIP_CHECKSUM_ON_COPY */ + +#ifdef __cplusplus +extern "C" { +#endif + +u16_t inet_chksum(void *dataptr, u16_t len)ICACHE_FLASH_ATTR; +u16_t inet_chksum_pbuf(struct pbuf *p)ICACHE_FLASH_ATTR; +u16_t inet_chksum_pseudo(struct pbuf *p, + ip_addr_t *src, ip_addr_t *dest, + u8_t proto, u16_t proto_len)ICACHE_FLASH_ATTR; +u16_t inet_chksum_pseudo_partial(struct pbuf *p, + ip_addr_t *src, ip_addr_t *dest, + u8_t proto, u16_t proto_len, u16_t chksum_len)ICACHE_FLASH_ATTR; +#if LWIP_CHKSUM_COPY_ALGORITHM +u16_t lwip_chksum_copy(void *dst, const void *src, u16_t len)ICACHE_FLASH_ATTR; +#endif /* LWIP_CHKSUM_COPY_ALGORITHM */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INET_H__ */ + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/init.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/init.h new file mode 100644 index 0000000..7a58aec --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/init.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INIT_H__ +#define __LWIP_INIT_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** X.x.x: Major version of the stack */ +#define LWIP_VERSION_MAJOR 1U +/** x.X.x: Minor version of the stack */ +#define LWIP_VERSION_MINOR 4U +/** x.x.X: Revision of the stack */ +#define LWIP_VERSION_REVISION 0U +/** For release candidates, this is set to 1..254 + * For official releases, this is set to 255 (LWIP_RC_RELEASE) + * For development versions (CVS), this is set to 0 (LWIP_RC_DEVELOPMENT) */ +#define LWIP_VERSION_RC 2U + +/** LWIP_VERSION_RC is set to LWIP_RC_RELEASE for official releases */ +#define LWIP_RC_RELEASE 255U +/** LWIP_VERSION_RC is set to LWIP_RC_DEVELOPMENT for CVS versions */ +#define LWIP_RC_DEVELOPMENT 0U + +#define LWIP_VERSION_IS_RELEASE (LWIP_VERSION_RC == LWIP_RC_RELEASE) +#define LWIP_VERSION_IS_DEVELOPMENT (LWIP_VERSION_RC == LWIP_RC_DEVELOPMENT) +#define LWIP_VERSION_IS_RC ((LWIP_VERSION_RC != LWIP_RC_RELEASE) && (LWIP_VERSION_RC != LWIP_RC_DEVELOPMENT)) + +/** Provides the version of the stack */ +#define LWIP_VERSION (LWIP_VERSION_MAJOR << 24 | LWIP_VERSION_MINOR << 16 | \ + LWIP_VERSION_REVISION << 8 | LWIP_VERSION_RC) + +/* Modules initialization */ +void lwip_init(void) ICACHE_FLASH_ATTR; +//void lwip_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INIT_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip.h new file mode 100644 index 0000000..1f361fa --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip.h @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_H__ +#define __LWIP_IP_H__ + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/err.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Currently, the function ip_output_if_opt() is only used with IGMP */ +#define IP_OPTIONS_SEND LWIP_IGMP + +#define IP_HLEN 20 + +#define IP_PROTO_ICMP 1 +#define IP_PROTO_IGMP 2 +#define IP_PROTO_UDP 17 +#define IP_PROTO_UDPLITE 136 +#define IP_PROTO_TCP 6 + +/* This is passed as the destination address to ip_output_if (not + to ip_output), meaning that an IP header already is constructed + in the pbuf. This is used when TCP retransmits. */ +#ifdef IP_HDRINCL +#undef IP_HDRINCL +#endif /* IP_HDRINCL */ +#define IP_HDRINCL NULL + +#if LWIP_NETIF_HWADDRHINT +#define IP_PCB_ADDRHINT ;u8_t addr_hint +#else +#define IP_PCB_ADDRHINT +#endif /* LWIP_NETIF_HWADDRHINT */ + +/* This is the common part of all PCB types. It needs to be at the + beginning of a PCB type definition. It is located here so that + changes to this common part are made in one location instead of + having to change all PCB structs. */ +#define IP_PCB \ + /* ip addresses in network byte order */ \ + ip_addr_t local_ip; \ + ip_addr_t remote_ip; \ + /* Socket options */ \ + u8_t so_options; \ + /* Type Of Service */ \ + u8_t tos; \ + /* Time To Live */ \ + u8_t ttl \ + /* link layer address resolution hint */ \ + IP_PCB_ADDRHINT + +struct ip_pcb { +/* Common members of all PCB types */ + IP_PCB; +}; + +/* + * Option flags per-socket. These are the same like SO_XXX. + */ +/*#define SOF_DEBUG (u8_t)0x01U Unimplemented: turn on debugging info recording */ +#define SOF_ACCEPTCONN (u8_t)0x02U /* socket has had listen() */ +#define SOF_REUSEADDR (u8_t)0x04U /* allow local address reuse */ +#define SOF_KEEPALIVE (u8_t)0x08U /* keep connections alive */ +/*#define SOF_DONTROUTE (u8_t)0x10U Unimplemented: just use interface addresses */ +#define SOF_BROADCAST (u8_t)0x20U /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */ +/*#define SOF_USELOOPBACK (u8_t)0x40U Unimplemented: bypass hardware when possible */ +#define SOF_LINGER (u8_t)0x80U /* linger on close if data present */ +/*#define SOF_OOBINLINE (u16_t)0x0100U Unimplemented: leave received OOB data in line */ +/*#define SOF_REUSEPORT (u16_t)0x0200U Unimplemented: allow local address & port reuse */ + +/* These flags are inherited (e.g. from a listen-pcb to a connection-pcb): */ +#define SOF_INHERITED (SOF_REUSEADDR|SOF_KEEPALIVE|SOF_LINGER/*|SOF_DEBUG|SOF_DONTROUTE|SOF_OOBINLINE*/) + + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_hdr { + /* version / header length / type of service */ + PACK_STRUCT_FIELD(u16_t _v_hl_tos); + /* total length */ + PACK_STRUCT_FIELD(u16_t _len); + /* identification */ + PACK_STRUCT_FIELD(u16_t _id); + /* fragment offset field */ + PACK_STRUCT_FIELD(u16_t _offset); +#define IP_RF 0x8000 /* reserved fragment flag */ +#define IP_DF 0x4000 /* dont fragment flag */ +#define IP_MF 0x2000 /* more fragments flag */ +#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ + /* time to live */ + PACK_STRUCT_FIELD(u8_t _ttl); + /* protocol*/ + PACK_STRUCT_FIELD(u8_t _proto); + /* checksum */ + PACK_STRUCT_FIELD(u16_t _chksum); + /* source and destination IP addresses */ + PACK_STRUCT_FIELD(ip_addr_p_t src); + PACK_STRUCT_FIELD(ip_addr_p_t dest); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define IPH_V(hdr) (ntohs((hdr)->_v_hl_tos) >> 12) +#define IPH_HL(hdr) ((ntohs((hdr)->_v_hl_tos) >> 8) & 0x0f) +#define IPH_TOS(hdr) (ntohs((hdr)->_v_hl_tos) & 0xff) +#define IPH_LEN(hdr) ((hdr)->_len) +#define IPH_ID(hdr) ((hdr)->_id) +#define IPH_OFFSET(hdr) ((hdr)->_offset) +#define IPH_TTL(hdr) ((hdr)->_ttl) +#define IPH_PROTO(hdr) ((hdr)->_proto) +#define IPH_CHKSUM(hdr) ((hdr)->_chksum) + +#define IPH_VHLTOS_SET(hdr, v, hl, tos) (hdr)->_v_hl_tos = (htons(((v) << 12) | ((hl) << 8) | (tos))) +#define IPH_LEN_SET(hdr, len) (hdr)->_len = (len) +#define IPH_ID_SET(hdr, id) (hdr)->_id = (id) +#define IPH_OFFSET_SET(hdr, off) (hdr)->_offset = (off) +#define IPH_TTL_SET(hdr, ttl) (hdr)->_ttl = (u8_t)(ttl) +#define IPH_PROTO_SET(hdr, proto) (hdr)->_proto = (u8_t)(proto) +#define IPH_CHKSUM_SET(hdr, chksum) (hdr)->_chksum = (chksum) + +/** The interface that provided the packet for the current callback invocation. */ +extern struct netif *current_netif; +/** Header of the input packet currently being processed. */ +extern const struct ip_hdr *current_header; +/** Source IP address of current_header */ +extern ip_addr_t current_iphdr_src; +/** Destination IP address of current_header */ +extern ip_addr_t current_iphdr_dest; + +#define ip_init() /* Compatibility define, not init needed. */ +struct netif *ip_route(ip_addr_t *dest)ICACHE_FLASH_ATTR; +struct netif *ip_router(ip_addr_t *dest, ip_addr_t *source); + +err_t ip_input(struct pbuf *p, struct netif *inp)ICACHE_FLASH_ATTR; +err_t ip_output(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, u8_t proto)ICACHE_FLASH_ATTR; +err_t ip_output_if(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, u8_t proto, + struct netif *netif)ICACHE_FLASH_ATTR; +#if LWIP_NETIF_HWADDRHINT +err_t ip_output_hinted(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint)ICACHE_FLASH_ATTR; +#endif /* LWIP_NETIF_HWADDRHINT */ +#if IP_OPTIONS_SEND +err_t ip_output_if_opt(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, + u16_t optlen)ICACHE_FLASH_ATTR; +#endif /* IP_OPTIONS_SEND */ +/** Get the interface that received the current packet. + * This function must only be called from a receive callback (udp_recv, + * raw_recv, tcp_accept). It will return NULL otherwise. */ +#define ip_current_netif() (current_netif) +/** Get the IP header of the current packet. + * This function must only be called from a receive callback (udp_recv, + * raw_recv, tcp_accept). It will return NULL otherwise. */ +#define ip_current_header() (current_header) +/** Source IP address of current_header */ +#define ip_current_src_addr() (¤t_iphdr_src) +/** Destination IP address of current_header */ +#define ip_current_dest_addr() (¤t_iphdr_dest) + +#if IP_DEBUG +void ip_debug_print(struct pbuf *p)ICACHE_FLASH_ATTR; +#else +#define ip_debug_print(p) +#endif /* IP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_H__ */ + + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip_addr.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip_addr.h new file mode 100644 index 0000000..1e46ee5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip_addr.h @@ -0,0 +1,256 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_ADDR_H__ +#define __LWIP_IP_ADDR_H__ + +#include "lwip/opt.h" +#include "lwip/def.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* This is the aligned version of ip_addr_t, + used as local variable, on the stack, etc. */ +struct ip_addr { + u32_t addr; +}; + +/* This is the packed version of ip_addr_t, + used in network headers that are itself packed */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_addr_packed { + PACK_STRUCT_FIELD(u32_t addr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/** ip_addr_t uses a struct for convenience only, so that the same defines can + * operate both on ip_addr_t as well as on ip_addr_p_t. */ +typedef struct ip_addr ip_addr_t; +typedef struct ip_addr_packed ip_addr_p_t; + +/* + * struct ipaddr2 is used in the definition of the ARP packet format in + * order to support compilers that don't have structure packing. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_addr2 { + PACK_STRUCT_FIELD(u16_t addrw[2]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/* Forward declaration to not include netif.h */ +struct netif; + +extern const ip_addr_t ip_addr_any; +extern const ip_addr_t ip_addr_broadcast; + +/** IP_ADDR_ can be used as a fixed IP address + * for the wildcard and the broadcast address + */ +#define IP_ADDR_ANY ((ip_addr_t *)&ip_addr_any) +#define IP_ADDR_BROADCAST ((ip_addr_t *)&ip_addr_broadcast) + +/** 255.255.255.255 */ +#define IPADDR_NONE ((u32_t)0xffffffffUL) +/** 127.0.0.1 */ +#define IPADDR_LOOPBACK ((u32_t)0x7f000001UL) +/** 0.0.0.0 */ +#define IPADDR_ANY ((u32_t)0x00000000UL) +/** 255.255.255.255 */ +#define IPADDR_BROADCAST ((u32_t)0xffffffffUL) + +/* Definitions of the bits in an Internet address integer. + + On subnets, host and network parts are found according to + the subnet mask, not these masks. */ +#define IP_CLASSA(a) ((((u32_t)(a)) & 0x80000000UL) == 0) +#define IP_CLASSA_NET 0xff000000 +#define IP_CLASSA_NSHIFT 24 +#define IP_CLASSA_HOST (0xffffffff & ~IP_CLASSA_NET) +#define IP_CLASSA_MAX 128 + +#define IP_CLASSB(a) ((((u32_t)(a)) & 0xc0000000UL) == 0x80000000UL) +#define IP_CLASSB_NET 0xffff0000 +#define IP_CLASSB_NSHIFT 16 +#define IP_CLASSB_HOST (0xffffffff & ~IP_CLASSB_NET) +#define IP_CLASSB_MAX 65536 + +#define IP_CLASSC(a) ((((u32_t)(a)) & 0xe0000000UL) == 0xc0000000UL) +#define IP_CLASSC_NET 0xffffff00 +#define IP_CLASSC_NSHIFT 8 +#define IP_CLASSC_HOST (0xffffffff & ~IP_CLASSC_NET) + +#define IP_CLASSD(a) (((u32_t)(a) & 0xf0000000UL) == 0xe0000000UL) +#define IP_CLASSD_NET 0xf0000000 /* These ones aren't really */ +#define IP_CLASSD_NSHIFT 28 /* net and host fields, but */ +#define IP_CLASSD_HOST 0x0fffffff /* routing needn't know. */ +#define IP_MULTICAST(a) IP_CLASSD(a) + +#define IP_EXPERIMENTAL(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL) +#define IP_BADCLASS(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL) + +#define IP_LOOPBACKNET 127 /* official! */ + + +#if BYTE_ORDER == BIG_ENDIAN +/** Set an IP address given by the four byte-parts */ +#define IP4_ADDR(ipaddr, a,b,c,d) \ + (ipaddr)->addr = ((u32_t)((a) & 0xff) << 24) | \ + ((u32_t)((b) & 0xff) << 16) | \ + ((u32_t)((c) & 0xff) << 8) | \ + (u32_t)((d) & 0xff) +#else +/** Set an IP address given by the four byte-parts. + Little-endian version that prevents the use of htonl. */ +#define IP4_ADDR(ipaddr, a,b,c,d) \ + (ipaddr)->addr = ((u32_t)((d) & 0xff) << 24) | \ + ((u32_t)((c) & 0xff) << 16) | \ + ((u32_t)((b) & 0xff) << 8) | \ + (u32_t)((a) & 0xff) +#endif + +/** MEMCPY-like copying of IP addresses where addresses are known to be + * 16-bit-aligned if the port is correctly configured (so a port could define + * this to copying 2 u16_t's) - no NULL-pointer-checking needed. */ +#ifndef IPADDR2_COPY +#define IPADDR2_COPY(dest, src) SMEMCPY(dest, src, sizeof(ip_addr_t)) +#endif + +/** Copy IP address - faster than ip_addr_set: no NULL check */ +#define ip_addr_copy(dest, src) ((dest).addr = (src).addr) +/** Safely copy one IP address to another (src may be NULL) */ +#define ip_addr_set(dest, src) ((dest)->addr = \ + ((src) == NULL ? 0 : \ + (src)->addr)) +/** Set complete address to zero */ +#define ip_addr_set_zero(ipaddr) ((ipaddr)->addr = 0) +/** Set address to IPADDR_ANY (no need for htonl()) */ +#define ip_addr_set_any(ipaddr) ((ipaddr)->addr = IPADDR_ANY) +/** Set address to loopback address */ +#define ip_addr_set_loopback(ipaddr) ((ipaddr)->addr = PP_HTONL(IPADDR_LOOPBACK)) +/** Safely copy one IP address to another and change byte order + * from host- to network-order. */ +#define ip_addr_set_hton(dest, src) ((dest)->addr = \ + ((src) == NULL ? 0:\ + htonl((src)->addr))) +/** IPv4 only: set the IP address given as an u32_t */ +#define ip4_addr_set_u32(dest_ipaddr, src_u32) ((dest_ipaddr)->addr = (src_u32)) +/** IPv4 only: get the IP address as an u32_t */ +#define ip4_addr_get_u32(src_ipaddr) ((src_ipaddr)->addr) + +/** Get the network address by combining host address with netmask */ +#define ip_addr_get_network(target, host, netmask) ((target)->addr = ((host)->addr) & ((netmask)->addr)) + +/** + * Determine if two address are on the same network. + * + * @arg addr1 IP address 1 + * @arg addr2 IP address 2 + * @arg mask network identifier mask + * @return !0 if the network identifiers of both address match + */ +#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \ + (mask)->addr) == \ + ((addr2)->addr & \ + (mask)->addr)) +#define ip_addr_cmp(addr1, addr2) ((addr1)->addr == (addr2)->addr) + +#define ip_addr_isany(addr1) ((addr1) == NULL || (addr1)->addr == IPADDR_ANY) + +#define ip_addr_isbroadcast(ipaddr, netif) ip4_addr_isbroadcast((ipaddr)->addr, (netif)) +u8_t ip4_addr_isbroadcast(u32_t addr, const struct netif *netif)ICACHE_FLASH_ATTR; + +#define ip_addr_netmask_valid(netmask) ip4_addr_netmask_valid((netmask)->addr) +u8_t ip4_addr_netmask_valid(u32_t netmask)ICACHE_FLASH_ATTR; + +#define ip_addr_ismulticast(addr1) (((addr1)->addr & PP_HTONL(0xf0000000UL)) == PP_HTONL(0xe0000000UL)) + +#define ip_addr_islinklocal(addr1) (((addr1)->addr & PP_HTONL(0xffff0000UL)) == PP_HTONL(0xa9fe0000UL)) + +#define ip_addr_debug_print(debug, ipaddr) \ + LWIP_DEBUGF(debug, ("%"U16_F".%"U16_F".%"U16_F".%"U16_F, \ + ipaddr != NULL ? ip4_addr1_16(ipaddr) : 0, \ + ipaddr != NULL ? ip4_addr2_16(ipaddr) : 0, \ + ipaddr != NULL ? ip4_addr3_16(ipaddr) : 0, \ + ipaddr != NULL ? ip4_addr4_16(ipaddr) : 0)) + +/* Get one byte from the 4-byte address */ +#define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0]) +#define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1]) +#define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2]) +#define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3]) +/* These are cast to u16_t, with the intent that they are often arguments + * to printf using the U16_F format from cc.h. */ +#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr)) +#define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr)) +#define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr)) +#define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr)) + +/** For backwards compatibility */ +#define ip_ntoa(ipaddr) ipaddr_ntoa(ipaddr) + +u32_t ipaddr_addr(const char *cp)ICACHE_FLASH_ATTR; +int ipaddr_aton(const char *cp, ip_addr_t *addr)ICACHE_FLASH_ATTR; +/** returns ptr to static buffer; not reentrant! */ +char *ipaddr_ntoa(const ip_addr_t *addr)ICACHE_FLASH_ATTR; +char *ipaddr_ntoa_r(const ip_addr_t *addr, char *buf, int buflen)ICACHE_FLASH_ATTR; + +#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \ + ip4_addr2_16(ipaddr), \ + ip4_addr3_16(ipaddr), \ + ip4_addr4_16(ipaddr) + +#define IPSTR "%d.%d.%d.%d" + +struct ip_info { + struct ip_addr ip; + struct ip_addr netmask; + struct ip_addr gw; +}; +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_ADDR_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip_frag.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip_frag.h new file mode 100644 index 0000000..df6db5f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/ip_frag.h @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Jani Monoses + * + */ + +#ifndef __LWIP_IP_FRAG_H__ +#define __LWIP_IP_FRAG_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/ip_addr.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if IP_REASSEMBLY +/* The IP reassembly timer interval in milliseconds. */ +#define IP_TMR_INTERVAL 1000 + +/* IP reassembly helper struct. + * This is exported because memp needs to know the size. + */ +struct ip_reassdata { + struct ip_reassdata *next; + struct pbuf *p; + struct ip_hdr iphdr; + u16_t datagram_len; + u8_t flags; + u8_t timer; +}; + +void ip_reass_init(void)ICACHE_FLASH_ATTR; +void ip_reass_tmr(void)ICACHE_FLASH_ATTR; +struct pbuf * ip_reass(struct pbuf *p)ICACHE_FLASH_ATTR; +#endif /* IP_REASSEMBLY */ + +#if IP_FRAG +#if !IP_FRAG_USES_STATIC_BUF && !LWIP_NETIF_TX_SINGLE_PBUF +/** A custom pbuf that holds a reference to another pbuf, which is freed + * when this custom pbuf is freed. This is used to create a custom PBUF_REF + * that points into the original pbuf. */ +struct pbuf_custom_ref { + /** 'base class' */ + struct pbuf_custom pc; + /** pointer to the original pbuf that is referenced */ + struct pbuf *original; +}; +#endif /* !IP_FRAG_USES_STATIC_BUF && !LWIP_NETIF_TX_SINGLE_PBUF */ + +err_t ip_frag(struct pbuf *p, struct netif *netif, ip_addr_t *dest)ICACHE_FLASH_ATTR; +#endif /* IP_FRAG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_FRAG_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/mdns.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/mdns.h new file mode 100644 index 0000000..f6fd1a8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/mdns.h @@ -0,0 +1,114 @@ +/** + * lwip MDNS resolver header file. + * + * Created on: Jul 29, 2010 + * Author: Daniel Toma + + + * ported from uIP resolv.c Copyright (c) 2002-2003, Adam Dunkels. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __LWIP_MDNS_H__ +#define __LWIP_MDNS_H__ + +#include "lwip/opt.h" + +#if LWIP_MDNS /* don't build if not configured for use in lwipopts.h */ + +/** DNS timer period */ +#define DNS_TMR_INTERVAL 1000 + +/** mDNS Address offset flag*/ +#define DNS_OFFSET_FLAG 0xC0 /* the offset flag in the DNS message */ +#define DNS_DEFAULT_OFFSET 0x0C /* the offset is set at the beginning of the DNS message */ + +#define DNS_IP_ADDR_LEN 4 + + +/** DNS field TYPE used for "Resource Records" */ +#define DNS_RRTYPE_A 1 /* a host address */ +#define DNS_RRTYPE_NS 2 /* an authoritative name server */ +#define DNS_RRTYPE_MD 3 /* a mail destination (Obsolete - use MX) */ +#define DNS_RRTYPE_MF 4 /* a mail forwarder (Obsolete - use MX) */ +#define DNS_RRTYPE_CNAME 5 /* the canonical name for an alias */ +#define DNS_RRTYPE_SOA 6 /* marks the start of a zone of authority */ +#define DNS_RRTYPE_MB 7 /* a mailbox domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_MG 8 /* a mail group member (EXPERIMENTAL) */ +#define DNS_RRTYPE_MR 9 /* a mail rename domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_NULL 10 /* a null RR (EXPERIMENTAL) */ +#define DNS_RRTYPE_WKS 11 /* a well known service description */ +#define DNS_RRTYPE_PTR 12 /* a domain name pointer */ +#define DNS_RRTYPE_HINFO 13 /* host information */ +#define DNS_RRTYPE_MINFO 14 /* mailbox or mail list information */ +#define DNS_RRTYPE_MX 15 /* mail exchange */ +#define DNS_RRTYPE_TXT 16 /* text strings */ +#define DNS_RRTYPE_SRV 33 /* Service record */ +#define DNS_RRTYPE_OPT 41 /* EDNS0 OPT record */ +#define DNS_RRTYPE_TSIG 250 /* Transaction Signature */ +#define DNS_RRTYPE_ANY 255 /*Not a DNS type, but a DNS query type, meaning "all types"*/ + +/* DNS field CLASS used for "Resource Records" */ +#define DNS_RRCLASS_IN 1 /* the Internet */ +#define DNS_RRCLASS_CS 2 /* the CSNET class (Obsolete - used only for examples in some obsolete RFCs) */ +#define DNS_RRCLASS_CH 3 /* the CHAOS class */ +#define DNS_RRCLASS_HS 4 /* Hesiod [Dyer 87] */ +#define DNS_RRCLASS_FLUSH 0x800 /* Flush bit */ +#define DNS_RRCLASS_FLUSH_IN 0x8001/* Flush bit and Internet*/ + +/** Callback which is invoked when a hostname is found. + * A function of this type must be implemented by the application using the DNS resolver. + * @param name pointer to the name that was looked up. + * @param ipaddr pointer to a struct ip_addr containing the IP address of the hostname, + * or NULL if the name could not be found (or on any other error). + * @param callback_arg a user-specified callback argument passed to dns_gethostbyname +*/ +#ifndef _MDNS_INFO +#define _MDNS_INFO +struct mdns_info { + char *host_name; + char *server_name; + uint16 server_port; + unsigned long ipAddr; + char *txt_data[10]; +}; +#endif +void mdns_enable(void); +void mdns_disable(void); +void mdns_init(struct mdns_info *info); +void mdns_close(void); +char* mdns_get_hostname(void); +void mdns_set_hostname(char *name); +void mdns_set_servername(const char *name); +char* mdns_get_servername(void); +void mdns_server_unregister(void); +void mdns_server_register(void) ; +void mdns_tmr(void); +void Delay(unsigned long ulSeconds); + +#endif /* LWIP_DNS */ + +#endif /* __LWIP_DNS_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/mem.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/mem.h new file mode 100755 index 0000000..4b98682 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/mem.h @@ -0,0 +1,175 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_MEM_H__ +#define __LWIP_MEM_H__ + +#include "lwip/opt.h" +//#include "mem_manager.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if MEM_LIBC_MALLOC + +#include /* for size_t */ + +typedef size_t mem_size_t; + +void *pvPortMalloc (size_t sz, const char *, unsigned, bool); +void vPortFree (void *p, const char *, unsigned); +void *pvPortZalloc (size_t sz, const char *, unsigned); +void *pvPortRealloc (void *p, size_t n, const char *, unsigned); +void* pvPortCalloc(size_t count,size_t size,const char *,unsigned); +void* pvPortCallocIram(size_t count,size_t size,const char *,unsigned); +void *pvPortZallocIram (size_t sz, const char *, unsigned); + +/* aliases for C library malloc() */ +#define mem_init() +/* in case C library malloc() needs extra protection, + * allow these defines to be overridden. + */ +#ifndef MEMLEAK_DEBUG +#ifndef mem_free +#define mem_free(s) vPortFree(s, "", __LINE__) +#endif +#ifndef mem_malloc +#define mem_malloc(s) pvPortMalloc(s, "", __LINE__,false) +#endif +#ifndef mem_calloc +#define mem_calloc(l, s) pvPortCalloc(l, s, "", __LINE__) +#endif +#ifndef mem_realloc +#define mem_realloc(p, s) pvPortRealloc(p, s, "", __LINE__) +#endif +#ifndef mem_zalloc +#define mem_zalloc(s) pvPortZalloc(s, "", __LINE__) +#endif +#else +#ifndef mem_free +#define mem_free(s) vPortFree(s, mem_debug_file, __LINE__) +#endif + +#ifndef mem_malloc +#define mem_malloc(s) pvPortMalloc(s, mem_debug_file, __LINE__,false) +#endif +#ifndef mem_calloc +#define mem_calloc(l, s) pvPortCalloc(l, s, mem_debug_file, __LINE__) +#endif +#ifndef mem_realloc +#define mem_realloc(p, s) pvPortRealloc(p, s, mem_debug_file, __LINE__) +#endif +#ifndef mem_zalloc +#define mem_zalloc(s) pvPortZalloc(s, mem_debug_file, __LINE__) +#endif + +#endif + +#ifndef os_malloc +#ifndef MEMLEAK_DEBUG +#define os_malloc(s) pvPortMalloc(s, "", __LINE__,true) +#else +#define os_malloc(s) pvPortMalloc(s, mem_debug_file, __LINE__,true) +#endif +#endif +#ifndef os_realloc +#define os_realloc(p, s) mem_realloc((p), (s)) +#endif +#ifndef os_zalloc +#define os_zalloc(s) mem_zalloc((s)) +#endif +#ifndef os_free +#define os_free(p) mem_free((p)) +#endif + +/* Since there is no C library allocation function to shrink memory without + moving it, define this to nothing. */ +#ifndef mem_trim +#define mem_trim(mem, size) (mem) +#endif +#else /* MEM_LIBC_MALLOC */ + +/* MEM_SIZE would have to be aligned, but using 64000 here instead of + * 65535 leaves some room for alignment... + */ +#if MEM_SIZE > 64000l +typedef u32_t mem_size_t; +#define MEM_SIZE_F U32_F +#else +typedef u16_t mem_size_t; +#define MEM_SIZE_F U16_F +#endif /* MEM_SIZE > 64000 */ + +#if MEM_USE_POOLS +/** mem_init is not used when using pools instead of a heap */ +#define mem_init() +/** mem_trim is not used when using pools instead of a heap: + we can't free part of a pool element and don't want to copy the rest */ +#define mem_trim(mem, size) (mem) +#else /* MEM_USE_POOLS */ +/* lwIP alternative malloc */ +void mem_init(void)ICACHE_FLASH_ATTR; +void *mem_trim(void *mem, mem_size_t size)ICACHE_FLASH_ATTR; +#endif /* MEM_USE_POOLS */ +void *mem_malloc(mem_size_t size)ICACHE_FLASH_ATTR; +void *mem_calloc(mem_size_t count, mem_size_t size)ICACHE_FLASH_ATTR; +void mem_free(void *mem)ICACHE_FLASH_ATTR; +#endif /* MEM_LIBC_MALLOC */ + +/** Calculate memory size for an aligned buffer - returns the next highest + * multiple of MEM_ALIGNMENT (e.g. LWIP_MEM_ALIGN_SIZE(3) and + * LWIP_MEM_ALIGN_SIZE(4) will both yield 4 for MEM_ALIGNMENT == 4). + */ +#ifndef LWIP_MEM_ALIGN_SIZE +#define LWIP_MEM_ALIGN_SIZE(size) (((size) + MEM_ALIGNMENT - 1) & ~(MEM_ALIGNMENT-1)) +#endif + +/** Calculate safe memory size for an aligned buffer when using an unaligned + * type as storage. This includes a safety-margin on (MEM_ALIGNMENT - 1) at the + * start (e.g. if buffer is u8_t[] and actual data will be u32_t*) + */ +#ifndef LWIP_MEM_ALIGN_BUFFER +#define LWIP_MEM_ALIGN_BUFFER(size) (((size) + MEM_ALIGNMENT - 1)) +#endif + +/** Align a memory pointer to the alignment defined by MEM_ALIGNMENT + * so that ADDR % MEM_ALIGNMENT == 0 + */ +#ifndef LWIP_MEM_ALIGN +#define LWIP_MEM_ALIGN(addr) ((void *)(((mem_ptr_t)(addr) + MEM_ALIGNMENT - 1) & ~(mem_ptr_t)(MEM_ALIGNMENT-1))) +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_MEM_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/memp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/memp.h new file mode 100644 index 0000000..6a2127d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/memp.h @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __LWIP_MEMP_H__ +#define __LWIP_MEMP_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Create the list of all memory pools managed by memp. MEMP_MAX represents a NULL pool at the end */ +typedef enum { +#define LWIP_MEMPOOL(name,num,size,desc, attr) MEMP_##name, +#include "lwip/memp_std.h" + MEMP_MAX +} memp_t; + +#if MEM_USE_POOLS +/* Use a helper type to get the start and end of the user "memory pools" for mem_malloc */ +typedef enum { + /* Get the first (via: + MEMP_POOL_HELPER_START = ((u8_t) 1*MEMP_POOL_A + 0*MEMP_POOL_B + 0*MEMP_POOL_C + 0)*/ + MEMP_POOL_HELPER_FIRST = ((u8_t) +#define LWIP_MEMPOOL(name,num,size,desc) +#define LWIP_MALLOC_MEMPOOL_START 1 +#define LWIP_MALLOC_MEMPOOL(num, size) * MEMP_POOL_##size + 0 +#define LWIP_MALLOC_MEMPOOL_END +#include "lwip/memp_std.h" + ) , + /* Get the last (via: + MEMP_POOL_HELPER_END = ((u8_t) 0 + MEMP_POOL_A*0 + MEMP_POOL_B*0 + MEMP_POOL_C*1) */ + MEMP_POOL_HELPER_LAST = ((u8_t) +#define LWIP_MEMPOOL(name,num,size,desc) +#define LWIP_MALLOC_MEMPOOL_START +#define LWIP_MALLOC_MEMPOOL(num, size) 0 + MEMP_POOL_##size * +#define LWIP_MALLOC_MEMPOOL_END 1 +#include "lwip/memp_std.h" + ) +} memp_pool_helper_t; + +/* The actual start and stop values are here (cast them over) + We use this helper type and these defines so we can avoid using const memp_t values */ +#define MEMP_POOL_FIRST ((memp_t) MEMP_POOL_HELPER_FIRST) +#define MEMP_POOL_LAST ((memp_t) MEMP_POOL_HELPER_LAST) +#endif /* MEM_USE_POOLS */ + +#if MEMP_MEM_MALLOC || MEM_USE_POOLS +extern const u32_t memp_sizes[MEMP_MAX]; +#endif /* MEMP_MEM_MALLOC || MEM_USE_POOLS */ + +#if MEMP_MEM_MALLOC + +#include "mem.h" + +#define memp_init() +#define memp_malloc(type) mem_malloc(memp_sizes[type]) +#define memp_free(type, mem) mem_free(mem) + +#else /* MEMP_MEM_MALLOC */ + +#if MEM_USE_POOLS +/** This structure is used to save the pool one element came from. */ +struct memp_malloc_helper +{ + memp_t poolnr; +}; +#endif /* MEM_USE_POOLS */ + +void memp_init(void)ICACHE_FLASH_ATTR; + +#if MEMP_OVERFLOW_CHECK +void *memp_malloc_fn(memp_t type, const char* file, const int line)ICACHE_FLASH_ATTR; +#define memp_malloc(t) memp_malloc_fn((t), __FILE__, __LINE__) +#else +void *memp_malloc(memp_t type)ICACHE_FLASH_ATTR; +#endif +void memp_free(memp_t type, void *mem)ICACHE_FLASH_ATTR; + +#endif /* MEMP_MEM_MALLOC */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_MEMP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/memp_std.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/memp_std.h new file mode 100644 index 0000000..b20a240 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/memp_std.h @@ -0,0 +1,126 @@ +/* + * SETUP: Make sure we define everything we will need. + * + * We have create three types of pools: + * 1) MEMPOOL - standard pools + * 2) MALLOC_MEMPOOL - to be used by mem_malloc in mem.c + * 3) PBUF_MEMPOOL - a mempool of pbuf's, so include space for the pbuf struct + * + * If the include'r doesn't require any special treatment of each of the types + * above, then will declare #2 & #3 to be just standard mempools. + */ +#ifndef LWIP_MALLOC_MEMPOOL +/* This treats "malloc pools" just like any other pool. + The pools are a little bigger to provide 'size' as the amount of user data. */ +#define LWIP_MALLOC_MEMPOOL(num, size) LWIP_MEMPOOL(POOL_##size, num, (size + sizeof(struct memp_malloc_helper)), "MALLOC_"#size, attr) +#define LWIP_MALLOC_MEMPOOL_START +#define LWIP_MALLOC_MEMPOOL_END +#endif /* LWIP_MALLOC_MEMPOOL */ + +#ifndef LWIP_PBUF_MEMPOOL +/* This treats "pbuf pools" just like any other pool. + * Allocates buffers for a pbuf struct AND a payload size */ +#define LWIP_PBUF_MEMPOOL(name, num, payload, desc, attr) LWIP_MEMPOOL(name, num, (MEMP_ALIGN_SIZE(sizeof(struct pbuf)) + MEMP_ALIGN_SIZE(payload)), desc, attr) +#endif /* LWIP_PBUF_MEMPOOL */ + + +/* + * A list of internal pools used by LWIP. + * + * LWIP_MEMPOOL(pool_name, number_elements, element_size, pool_description) + * creates a pool name MEMP_pool_name. description is used in stats.c + */ +#if LWIP_RAW +LWIP_MEMPOOL(RAW_PCB, MEMP_NUM_RAW_PCB, sizeof(struct raw_pcb), "RAW_PCB", DMEM_ATTR) +#endif /* LWIP_RAW */ + +#if LWIP_UDP +LWIP_MEMPOOL(UDP_PCB, MEMP_NUM_UDP_PCB, sizeof(struct udp_pcb), "UDP_PCB", DMEM_ATTR) +#endif /* LWIP_UDP */ + +#if LWIP_TCP +LWIP_MEMPOOL(TCP_PCB, MEMP_NUM_TCP_PCB, sizeof(struct tcp_pcb), "TCP_PCB", DMEM_ATTR) +LWIP_MEMPOOL(TCP_PCB_LISTEN, MEMP_NUM_TCP_PCB_LISTEN, sizeof(struct tcp_pcb_listen), "TCP_PCB_LISTEN", DMEM_ATTR) +LWIP_MEMPOOL(TCP_SEG, MEMP_NUM_TCP_SEG, sizeof(struct tcp_seg), "TCP_SEG", DMEM_ATTR) +#endif /* LWIP_TCP */ + +#if IP_REASSEMBLY +LWIP_MEMPOOL(REASSDATA, MEMP_NUM_REASSDATA, sizeof(struct ip_reassdata), "REASSDATA", DMEM_ATTR) +#endif /* IP_REASSEMBLY */ +#if IP_FRAG && !IP_FRAG_USES_STATIC_BUF && !LWIP_NETIF_TX_SINGLE_PBUF +LWIP_MEMPOOL(FRAG_PBUF, MEMP_NUM_FRAG_PBUF, sizeof(struct pbuf_custom_ref),"FRAG_PBUF", DMEM_ATTR) +#endif /* IP_FRAG && !IP_FRAG_USES_STATIC_BUF && !LWIP_NETIF_TX_SINGLE_PBUF */ + +#if LWIP_NETCONN +LWIP_MEMPOOL(NETBUF, MEMP_NUM_NETBUF, sizeof(struct netbuf), "NETBUF") +LWIP_MEMPOOL(NETCONN, MEMP_NUM_NETCONN, sizeof(struct netconn), "NETCONN") +#endif /* LWIP_NETCONN */ + +#if NO_SYS==0 +LWIP_MEMPOOL(TCPIP_MSG_API, MEMP_NUM_TCPIP_MSG_API, sizeof(struct tcpip_msg), "TCPIP_MSG_API") +#if !LWIP_TCPIP_CORE_LOCKING_INPUT +LWIP_MEMPOOL(TCPIP_MSG_INPKT,MEMP_NUM_TCPIP_MSG_INPKT, sizeof(struct tcpip_msg), "TCPIP_MSG_INPKT") +#endif /* !LWIP_TCPIP_CORE_LOCKING_INPUT */ +#endif /* NO_SYS==0 */ + +#if ARP_QUEUEING +LWIP_MEMPOOL(ARP_QUEUE, MEMP_NUM_ARP_QUEUE, sizeof(struct etharp_q_entry), "ARP_QUEUE", DMEM_ATTR) +#endif /* ARP_QUEUEING */ + +#if LWIP_IGMP +LWIP_MEMPOOL(IGMP_GROUP, MEMP_NUM_IGMP_GROUP, sizeof(struct igmp_group), "IGMP_GROUP", DMEM_ATTR) +#endif /* LWIP_IGMP */ + +#if (!NO_SYS || (NO_SYS && !NO_SYS_NO_TIMERS)) /* LWIP_TIMERS */ +LWIP_MEMPOOL(SYS_TIMEOUT, MEMP_NUM_SYS_TIMEOUT, sizeof(struct sys_timeo), "SYS_TIMEOUT", DMEM_ATTR) +#endif /* LWIP_TIMERS */ + +#if LWIP_SNMP +LWIP_MEMPOOL(SNMP_ROOTNODE, MEMP_NUM_SNMP_ROOTNODE, sizeof(struct mib_list_rootnode), "SNMP_ROOTNODE") +LWIP_MEMPOOL(SNMP_NODE, MEMP_NUM_SNMP_NODE, sizeof(struct mib_list_node), "SNMP_NODE") +LWIP_MEMPOOL(SNMP_VARBIND, MEMP_NUM_SNMP_VARBIND, sizeof(struct snmp_varbind), "SNMP_VARBIND") +LWIP_MEMPOOL(SNMP_VALUE, MEMP_NUM_SNMP_VALUE, SNMP_MAX_VALUE_SIZE, "SNMP_VALUE") +#endif /* LWIP_SNMP */ +#if LWIP_DNS && LWIP_SOCKET +LWIP_MEMPOOL(NETDB, MEMP_NUM_NETDB, NETDB_ELEM_SIZE, "NETDB") +#endif /* LWIP_DNS && LWIP_SOCKET */ +#if LWIP_DNS && DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC +LWIP_MEMPOOL(LOCALHOSTLIST, MEMP_NUM_LOCALHOSTLIST, LOCALHOSTLIST_ELEM_SIZE, "LOCALHOSTLIST") +#endif /* LWIP_DNS && DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ +#if PPP_SUPPORT && PPPOE_SUPPORT +LWIP_MEMPOOL(PPPOE_IF, MEMP_NUM_PPPOE_INTERFACES, sizeof(struct pppoe_softc), "PPPOE_IF") +#endif /* PPP_SUPPORT && PPPOE_SUPPORT */ + +/* + * A list of pools of pbuf's used by LWIP. + * + * LWIP_PBUF_MEMPOOL(pool_name, number_elements, pbuf_payload_size, pool_description) + * creates a pool name MEMP_pool_name. description is used in stats.c + * This allocates enough space for the pbuf struct and a payload. + * (Example: pbuf_payload_size=0 allocates only size for the struct) + */ +LWIP_PBUF_MEMPOOL(PBUF, MEMP_NUM_PBUF, 0, "PBUF_REF/ROM", DMEM_ATTR) + +/* XXX: need to align to 4 byte as memp strcut is 4-byte long. otherwise will crash */ +#define LWIP_MEM_ALIGN4_SIZE(size) (((size) + 4 - 1) & ~(4-1)) + +LWIP_PBUF_MEMPOOL(PBUF_POOL, PBUF_POOL_SIZE, LWIP_MEM_ALIGN4_SIZE(PBUF_POOL_BUFSIZE), "PBUF_POOL", DMEM_ATTR) + + +/* + * Allow for user-defined pools; this must be explicitly set in lwipopts.h + * since the default is to NOT look for lwippools.h + */ +#if MEMP_USE_CUSTOM_POOLS +#include "lwippools.h" +#endif /* MEMP_USE_CUSTOM_POOLS */ + +/* + * REQUIRED CLEANUP: Clear up so we don't get "multiply defined" error later + * (#undef is ignored for something that is not defined) + */ +#undef LWIP_MEMPOOL +#undef LWIP_MALLOC_MEMPOOL +#undef LWIP_MALLOC_MEMPOOL_START +#undef LWIP_MALLOC_MEMPOOL_END +#undef LWIP_PBUF_MEMPOOL diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netbuf.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netbuf.h new file mode 100644 index 0000000..b554a57 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netbuf.h @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_NETBUF_H__ +#define __LWIP_NETBUF_H__ + +#include "lwip/opt.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** This netbuf has dest-addr/port set */ +#define NETBUF_FLAG_DESTADDR 0x01 +/** This netbuf includes a checksum */ +#define NETBUF_FLAG_CHKSUM 0x02 + +struct netbuf { + struct pbuf *p, *ptr; + ip_addr_t addr; + u16_t port; +#if LWIP_NETBUF_RECVINFO || LWIP_CHECKSUM_ON_COPY +#if LWIP_CHECKSUM_ON_COPY + u8_t flags; +#endif /* LWIP_CHECKSUM_ON_COPY */ + u16_t toport_chksum; +#if LWIP_NETBUF_RECVINFO + ip_addr_t toaddr; +#endif /* LWIP_NETBUF_RECVINFO */ +#endif /* LWIP_NETBUF_RECVINFO || LWIP_CHECKSUM_ON_COPY */ +}; + +/* Network buffer functions: */ +struct netbuf * netbuf_new (void)ICACHE_FLASH_ATTR; +void netbuf_delete (struct netbuf *buf)ICACHE_FLASH_ATTR; +void * netbuf_alloc (struct netbuf *buf, u16_t size)ICACHE_FLASH_ATTR; +void netbuf_free (struct netbuf *buf)ICACHE_FLASH_ATTR; +err_t netbuf_ref (struct netbuf *buf, + const void *dataptr, u16_t size)ICACHE_FLASH_ATTR; +void netbuf_chain (struct netbuf *head, + struct netbuf *tail)ICACHE_FLASH_ATTR; + +err_t netbuf_data (struct netbuf *buf, + void **dataptr, u16_t *len)ICACHE_FLASH_ATTR; +s8_t netbuf_next (struct netbuf *buf)ICACHE_FLASH_ATTR; +void netbuf_first (struct netbuf *buf)ICACHE_FLASH_ATTR; + + +#define netbuf_copy_partial(buf, dataptr, len, offset) \ + pbuf_copy_partial((buf)->p, (dataptr), (len), (offset)) +#define netbuf_copy(buf,dataptr,len) netbuf_copy_partial(buf, dataptr, len, 0) +#define netbuf_take(buf, dataptr, len) pbuf_take((buf)->p, dataptr, len) +#define netbuf_len(buf) ((buf)->p->tot_len) +#define netbuf_fromaddr(buf) (&((buf)->addr)) +#define netbuf_set_fromaddr(buf, fromaddr) ip_addr_set((&(buf)->addr), fromaddr) +#define netbuf_fromport(buf) ((buf)->port) +#if LWIP_NETBUF_RECVINFO +#define netbuf_destaddr(buf) (&((buf)->toaddr)) +#define netbuf_set_destaddr(buf, destaddr) ip_addr_set((&(buf)->addr), destaddr) +#define netbuf_destport(buf) (((buf)->flags & NETBUF_FLAG_DESTADDR) ? (buf)->toport_chksum : 0) +#endif /* LWIP_NETBUF_RECVINFO */ +#if LWIP_CHECKSUM_ON_COPY +#define netbuf_set_chksum(buf, chksum) do { (buf)->flags = NETBUF_FLAG_CHKSUM; \ + (buf)->toport_chksum = chksum; } while(0) +#endif /* LWIP_CHECKSUM_ON_COPY */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_NETBUF_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netdb.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netdb.h new file mode 100644 index 0000000..7587e2f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netdb.h @@ -0,0 +1,124 @@ +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt + * + */ +#ifndef __LWIP_NETDB_H__ +#define __LWIP_NETDB_H__ + +#include "lwip/opt.h" + +#if LWIP_DNS && LWIP_SOCKET + +#include /* for size_t */ + +#include "lwip/inet.h" +#include "lwip/sockets.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* some rarely used options */ +#ifndef LWIP_DNS_API_DECLARE_H_ERRNO +#define LWIP_DNS_API_DECLARE_H_ERRNO 1 +#endif + +#ifndef LWIP_DNS_API_DEFINE_ERRORS +#define LWIP_DNS_API_DEFINE_ERRORS 1 +#endif + +#ifndef LWIP_DNS_API_DECLARE_STRUCTS +#define LWIP_DNS_API_DECLARE_STRUCTS 1 +#endif + +#if LWIP_DNS_API_DEFINE_ERRORS +/** Errors used by the DNS API functions, h_errno can be one of them */ +#define EAI_NONAME 200 +#define EAI_SERVICE 201 +#define EAI_FAIL 202 +#define EAI_MEMORY 203 + +#define HOST_NOT_FOUND 210 +#define NO_DATA 211 +#define NO_RECOVERY 212 +#define TRY_AGAIN 213 +#endif /* LWIP_DNS_API_DEFINE_ERRORS */ + +#if LWIP_DNS_API_DECLARE_STRUCTS +struct hostent { + char *h_name; /* Official name of the host. */ + char **h_aliases; /* A pointer to an array of pointers to alternative host names, + terminated by a null pointer. */ + int h_addrtype; /* Address type. */ + int h_length; /* The length, in bytes, of the address. */ + char **h_addr_list; /* A pointer to an array of pointers to network addresses (in + network byte order) for the host, terminated by a null pointer. */ +#define h_addr h_addr_list[0] /* for backward compatibility */ +}; + +struct addrinfo { + int ai_flags; /* Input flags. */ + int ai_family; /* Address family of socket. */ + int ai_socktype; /* Socket type. */ + int ai_protocol; /* Protocol of socket. */ + socklen_t ai_addrlen; /* Length of socket address. */ + struct sockaddr *ai_addr; /* Socket address of socket. */ + char *ai_canonname; /* Canonical name of service location. */ + struct addrinfo *ai_next; /* Pointer to next in list. */ +}; +#endif /* LWIP_DNS_API_DECLARE_STRUCTS */ + +#if LWIP_DNS_API_DECLARE_H_ERRNO +/* application accessable error code set by the DNS API functions */ +extern int h_errno; +#endif /* LWIP_DNS_API_DECLARE_H_ERRNO*/ + +struct hostent *lwip_gethostbyname(const char *name); +int lwip_gethostbyname_r(const char *name, struct hostent *ret, char *buf, + size_t buflen, struct hostent **result, int *h_errnop); +void lwip_freeaddrinfo(struct addrinfo *ai); +int lwip_getaddrinfo(const char *nodename, + const char *servname, + const struct addrinfo *hints, + struct addrinfo **res); + +#if LWIP_COMPAT_SOCKETS +#define gethostbyname(name) lwip_gethostbyname(name) +#define gethostbyname_r(name, ret, buf, buflen, result, h_errnop) \ + lwip_gethostbyname_r(name, ret, buf, buflen, result, h_errnop) +#define freeaddrinfo(addrinfo) lwip_freeaddrinfo(addrinfo) +#define getaddrinfo(nodname, servname, hints, res) \ + lwip_getaddrinfo(nodname, servname, hints, res) +#endif /* LWIP_COMPAT_SOCKETS */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_DNS && LWIP_SOCKET */ + +#endif /* __LWIP_NETDB_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netif.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netif.h new file mode 100644 index 0000000..04e4f7a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netif.h @@ -0,0 +1,320 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_NETIF_H__ +#define __LWIP_NETIF_H__ + +#include "lwip/opt.h" + +#define ENABLE_LOOPBACK (LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF) + +#include "lwip/err.h" + +#include "lwip/ip_addr.h" + +#include "lwip/def.h" +#include "lwip/pbuf.h" +#if LWIP_DHCP +struct dhcp; +#endif +#if LWIP_AUTOIP +struct autoip; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* Throughout this file, IP addresses are expected to be in + * the same byte order as in IP_PCB. */ + +/** must be the maximum of all used hardware address lengths + across all types of interfaces in use */ +#define NETIF_MAX_HWADDR_LEN 6U + +/** Whether the network interface is 'up'. This is + * a software flag used to control whether this network + * interface is enabled and processes traffic. + * It is set by the startup code (for static IP configuration) or + * by dhcp/autoip when an address has been assigned. + */ +#define NETIF_FLAG_UP 0x01U +/** If set, the netif has broadcast capability. + * Set by the netif driver in its init function. */ +#define NETIF_FLAG_BROADCAST 0x02U +/** If set, the netif is one end of a point-to-point connection. + * Set by the netif driver in its init function. */ +#define NETIF_FLAG_POINTTOPOINT 0x04U +/** If set, the interface is configured using DHCP. + * Set by the DHCP code when starting or stopping DHCP. */ +#define NETIF_FLAG_DHCP 0x08U +/** If set, the interface has an active link + * (set by the network interface driver). + * Either set by the netif driver in its init function (if the link + * is up at that time) or at a later point once the link comes up + * (if link detection is supported by the hardware). */ +#define NETIF_FLAG_LINK_UP 0x10U +/** If set, the netif is an ethernet device using ARP. + * Set by the netif driver in its init function. + * Used to check input packet types and use of DHCP. */ +#define NETIF_FLAG_ETHARP 0x20U +/** If set, the netif is an ethernet device. It might not use + * ARP or TCP/IP if it is used for PPPoE only. + */ +#define NETIF_FLAG_ETHERNET 0x40U +/** If set, the netif has IGMP capability. + * Set by the netif driver in its init function. */ +#define NETIF_FLAG_IGMP 0x80U + +/** Function prototype for netif init functions. Set up flags and output/linkoutput + * callback functions in this function. + * + * @param netif The netif to initialize + */ +typedef err_t (*netif_init_fn)(struct netif *netif); +/** Function prototype for netif->input functions. This function is saved as 'input' + * callback function in the netif struct. Call it when a packet has been received. + * + * @param p The received packet, copied into a pbuf + * @param inp The netif which received the packet + */ +typedef err_t (*netif_input_fn)(struct pbuf *p, struct netif *inp); +/** Function prototype for netif->output functions. Called by lwIP when a packet + * shall be sent. For ethernet netif, set this to 'etharp_output' and set + * 'linkoutput'. + * + * @param netif The netif which shall send a packet + * @param p The packet to send (p->payload points to IP header) + * @param ipaddr The IP address to which the packet shall be sent + */ +typedef err_t (*netif_output_fn)(struct netif *netif, struct pbuf *p, + ip_addr_t *ipaddr); +/** Function prototype for netif->linkoutput functions. Only used for ethernet + * netifs. This function is called by ARP when a packet shall be sent. + * + * @param netif The netif which shall send a packet + * @param p The packet to send (raw ethernet packet) + */ +typedef err_t (*netif_linkoutput_fn)(struct netif *netif, struct pbuf *p); +/** Function prototype for netif status- or link-callback functions. */ +typedef void (*netif_status_callback_fn)(struct netif *netif); +/** Function prototype for netif igmp_mac_filter functions */ +typedef err_t (*netif_igmp_mac_filter_fn)(struct netif *netif, + ip_addr_t *group, u8_t action); + +/*add DHCP event processing by LiuHan*/ +typedef void (*dhcp_event_fn)(void); + +/** Generic data structure used for all lwIP network interfaces. + * The following fields should be filled in by the initialization + * function for the device driver: hwaddr_len, hwaddr[], mtu, flags */ +struct netif { + /** pointer to next in linked list */ + struct netif *next; + + /** IP address configuration in network byte order */ + ip_addr_t ip_addr; + ip_addr_t netmask; + ip_addr_t gw; + + /** This function is called by the network device driver + * to pass a packet up the TCP/IP stack. IPݰ*/ + netif_input_fn input; + /** This function is called by the IP module when it wants + * to send a packet on the interface. This function typically + * first resolves the hardware address, then sends the packet. IPݰ*/ + netif_output_fn output; + /** This function is called by the ARP module when it wants + * to send a packet on the interface. This function outputs + * the pbuf as-is on the link medium. ײݰ*/ + netif_linkoutput_fn linkoutput; +#if LWIP_NETIF_STATUS_CALLBACK + /** This function is called when the netif state is set to up or down + */ + netif_status_callback_fn status_callback; +#endif /* LWIP_NETIF_STATUS_CALLBACK */ +#if LWIP_NETIF_LINK_CALLBACK + /** This function is called when the netif link is set to up or down + */ + netif_status_callback_fn link_callback; +#endif /* LWIP_NETIF_LINK_CALLBACK */ + /** This field can be set by the device driver and could point + * to state information for the device. ֶΣָײ豸Ϣ*/ + void *state; +#if LWIP_DHCP + /** the DHCP client state information for this netif */ + struct dhcp *dhcp; + struct udp_pcb *dhcps_pcb; //dhcps + dhcp_event_fn dhcp_event; +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + /** the AutoIP client state information for this netif */ + struct autoip *autoip; +#endif +#if LWIP_NETIF_HOSTNAME + /* the hostname for this netif, NULL is a valid value */ + char* hostname; +#endif /* LWIP_NETIF_HOSTNAME */ + /** maximum transfer unit (in bytes) ýӿݰȣ1500*/ + u16_t mtu; + /** number of bytes used in hwaddrýӿַ */ + u8_t hwaddr_len; + /** link level hardware address of this interface ýӿַ*/ + u8_t hwaddr[NETIF_MAX_HWADDR_LEN]; + /** flags (see NETIF_FLAG_ above) ýӿ״ֶ̬*/ + u8_t flags; + /** descriptive abbreviation ýӿڵ*/ + char name[2]; + /** number of this interface ýӿڵı*/ + u8_t num; +#if LWIP_SNMP + /** link type (from "snmp_ifType" enum from snmp.h) */ + u8_t link_type; + /** (estimate) link speed */ + u32_t link_speed; + /** timestamp at last change made (up/down) */ + u32_t ts; + /** counters */ + u32_t ifinoctets; + u32_t ifinucastpkts; + u32_t ifinnucastpkts; + u32_t ifindiscards; + u32_t ifoutoctets; + u32_t ifoutucastpkts; + u32_t ifoutnucastpkts; + u32_t ifoutdiscards; +#endif /* LWIP_SNMP */ +#if LWIP_IGMP + /** This function could be called to add or delete a entry in the multicast + filter table of the ethernet MAC.*/ + netif_igmp_mac_filter_fn igmp_mac_filter; +#endif /* LWIP_IGMP */ +#if LWIP_NETIF_HWADDRHINT + u8_t *addr_hint; +#endif /* LWIP_NETIF_HWADDRHINT */ +#if ENABLE_LOOPBACK + /* List of packets to be queued for ourselves. ָ͸Լݰpbuf*/ + struct pbuf *loop_first;//һ + struct pbuf *loop_last;//һ +#if LWIP_LOOPBACK_MAX_PBUFS + u16_t loop_cnt_current; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ +#endif /* ENABLE_LOOPBACK */ +}; + +#if LWIP_SNMP +#define NETIF_INIT_SNMP(netif, type, speed) \ + /* use "snmp_ifType" enum from snmp.h for "type", snmp_ifType_ethernet_csmacd by example */ \ + (netif)->link_type = (type); \ + /* your link speed here (units: bits per second) */ \ + (netif)->link_speed = (speed); \ + (netif)->ts = 0; \ + (netif)->ifinoctets = 0; \ + (netif)->ifinucastpkts = 0; \ + (netif)->ifinnucastpkts = 0; \ + (netif)->ifindiscards = 0; \ + (netif)->ifoutoctets = 0; \ + (netif)->ifoutucastpkts = 0; \ + (netif)->ifoutnucastpkts = 0; \ + (netif)->ifoutdiscards = 0 +#else /* LWIP_SNMP */ +#define NETIF_INIT_SNMP(netif, type, speed) +#endif /* LWIP_SNMP */ + + +/** The list of network interfaces. */ +extern struct netif *netif_list; +/** The default network interface. */ +extern struct netif *netif_default; + +void netif_init(void)ICACHE_FLASH_ATTR; + +struct netif *netif_add(struct netif *netif, ip_addr_t *ipaddr, ip_addr_t *netmask, + ip_addr_t *gw, void *state, netif_init_fn init, netif_input_fn input)ICACHE_FLASH_ATTR; + +void +netif_set_addr(struct netif *netif, ip_addr_t *ipaddr, ip_addr_t *netmask, + ip_addr_t *gw)ICACHE_FLASH_ATTR; +void netif_remove(struct netif * netif)ICACHE_FLASH_ATTR; + +/* Returns a network interface given its name. The name is of the form + "et0", where the first two letters are the "name" field in the + netif structure, and the digit is in the num field in the same + structure. */ +struct netif *netif_find(char *name)ICACHE_FLASH_ATTR; + +void netif_set_default(struct netif *netif)ICACHE_FLASH_ATTR; + +void netif_set_ipaddr(struct netif *netif, ip_addr_t *ipaddr)ICACHE_FLASH_ATTR; +void netif_set_netmask(struct netif *netif, ip_addr_t *netmask)ICACHE_FLASH_ATTR; +void netif_set_gw(struct netif *netif, ip_addr_t *gw)ICACHE_FLASH_ATTR; + +void netif_set_up(struct netif *netif)ICACHE_FLASH_ATTR; +void netif_set_down(struct netif *netif)ICACHE_FLASH_ATTR; +/** Ask if an interface is up */ +#define netif_is_up(netif) (((netif)->flags & NETIF_FLAG_UP) ? (u8_t)1 : (u8_t)0) + +#if LWIP_NETIF_STATUS_CALLBACK +void netif_set_status_callback(struct netif *netif, netif_status_callback_fn status_callback)ICACHE_FLASH_ATTR; +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +void netif_set_link_up(struct netif *netif)ICACHE_FLASH_ATTR; +void netif_set_link_down(struct netif *netif)ICACHE_FLASH_ATTR; +/** Ask if a link is up */ +#define netif_is_link_up(netif) (((netif)->flags & NETIF_FLAG_LINK_UP) ? (u8_t)1 : (u8_t)0) + +#if LWIP_NETIF_LINK_CALLBACK +void netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)ICACHE_FLASH_ATTR; +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +#if LWIP_NETIF_HOSTNAME +#define netif_set_hostname(netif, name) do { if((netif) != NULL) { (netif)->hostname = name; }}while(0) +#define netif_get_hostname(netif) (((netif) != NULL) ? ((netif)->hostname) : NULL) +#endif /* LWIP_NETIF_HOSTNAME */ + +#if LWIP_IGMP +#define netif_set_igmp_mac_filter(netif, function) do { if((netif) != NULL) { (netif)->igmp_mac_filter = function; }}while(0) +#define netif_get_igmp_mac_filter(netif) (((netif) != NULL) ? ((netif)->igmp_mac_filter) : NULL) +#endif /* LWIP_IGMP */ + +#if ENABLE_LOOPBACK +err_t netif_loop_output(struct netif *netif, struct pbuf *p, ip_addr_t *dest_ip)ICACHE_FLASH_ATTR; +void netif_poll(struct netif *netif)ICACHE_FLASH_ATTR; +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +void netif_poll_all(void)ICACHE_FLASH_ATTR; +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_NETIF_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netifapi.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netifapi.h new file mode 100644 index 0000000..33318ef --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/netifapi.h @@ -0,0 +1,108 @@ +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#ifndef __LWIP_NETIFAPI_H__ +#define __LWIP_NETIFAPI_H__ + +#include "lwip/opt.h" + +#if LWIP_NETIF_API /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/netif.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef void (*netifapi_void_fn)(struct netif *netif); +typedef err_t (*netifapi_errt_fn)(struct netif *netif); + +struct netifapi_msg_msg { +#if !LWIP_TCPIP_CORE_LOCKING + sys_sem_t sem; +#endif /* !LWIP_TCPIP_CORE_LOCKING */ + err_t err; + struct netif *netif; + union { + struct { + ip_addr_t *ipaddr; + ip_addr_t *netmask; + ip_addr_t *gw; + void *state; + netif_init_fn init; + netif_input_fn input; + } add; + struct { + netifapi_void_fn voidfunc; + netifapi_errt_fn errtfunc; + } common; + } msg; +}; + +struct netifapi_msg { + void (* function)(struct netifapi_msg_msg *msg); + struct netifapi_msg_msg msg; +}; + + +/* API for application */ +err_t netifapi_netif_add ( struct netif *netif, + ip_addr_t *ipaddr, + ip_addr_t *netmask, + ip_addr_t *gw, + void *state, + netif_init_fn init, + netif_input_fn input); + +err_t netifapi_netif_set_addr ( struct netif *netif, + ip_addr_t *ipaddr, + ip_addr_t *netmask, + ip_addr_t *gw ); + +err_t netifapi_netif_common ( struct netif *netif, + netifapi_void_fn voidfunc, + netifapi_errt_fn errtfunc); + +#define netifapi_netif_remove(n) netifapi_netif_common(n, netif_remove, NULL) +#define netifapi_netif_set_up(n) netifapi_netif_common(n, netif_set_up, NULL) +#define netifapi_netif_set_down(n) netifapi_netif_common(n, netif_set_down, NULL) +#define netifapi_netif_set_default(n) netifapi_netif_common(n, netif_set_default, NULL) +#define netifapi_dhcp_start(n) netifapi_netif_common(n, NULL, dhcp_start) +#define netifapi_dhcp_stop(n) netifapi_netif_common(n, dhcp_stop, NULL) +#define netifapi_autoip_start(n) netifapi_netif_common(n, NULL, autoip_start) +#define netifapi_autoip_stop(n) netifapi_netif_common(n, NULL, autoip_stop) + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETIF_API */ + +#endif /* __LWIP_NETIFAPI_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/opt.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/opt.h new file mode 100644 index 0000000..0d2b3fc --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/opt.h @@ -0,0 +1,2043 @@ +/** + * @file + * + * lwIP Options Configuration + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_OPT_H__ +#define __LWIP_OPT_H__ + +/* + * Include user defined options first. Anything not defined in these files + * will be set to standard values. Override anything you dont like! + */ +#include "lwipopts.h" +#include "lwip/debug.h" + +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain + * critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#ifndef SYS_LIGHTWEIGHT_PROT +#define SYS_LIGHTWEIGHT_PROT 0 +#endif + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#ifndef NO_SYS +#define NO_SYS 1 +#endif + +/** + * NO_SYS_NO_TIMERS==1: Drop support for sys_timeout when NO_SYS==1 + * Mainly for compatibility to old versions. + */ +#ifndef NO_SYS_NO_TIMERS +#define NO_SYS_NO_TIMERS 1 +#endif + +/** + * MEMCPY: override this if you have a faster implementation at hand than the + * one included in your C library + */ +#ifndef MEMCPY +#define MEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/** + * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a + * call to memcpy() if the length is known at compile time and is small. + */ +#ifndef SMEMCPY +#define SMEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library + * instead of the lwip internal allocator. Can save code size if you + * already use it. + */ +#ifndef MEM_LIBC_MALLOC +#define MEM_LIBC_MALLOC 0 +#endif + +/** +* MEMP_MEM_MALLOC==1: Use mem_malloc/mem_free instead of the lwip pool allocator. +* Especially useful with MEM_LIBC_MALLOC but handle with care regarding execution +* speed and usage from interrupts! +*/ +#ifndef MEMP_MEM_MALLOC +#define MEMP_MEM_MALLOC 0 +#endif + +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + */ +#ifndef MEM_ALIGNMENT +#define MEM_ALIGNMENT 1 +#endif + +/** + * MEM_SIZE: the size of the heap memory. If the application will send + * a lot of data that needs to be copied, this should be set high. + */ +#ifndef MEM_SIZE +#define MEM_SIZE 1600 +#endif + +/** + * MEMP_SEPARATE_POOLS: if defined to 1, each pool is placed in its own array. + * This can be used to individually change the location of each pool. + * Default is one big array for all pools + */ +#ifndef MEMP_SEPARATE_POOLS +#define MEMP_SEPARATE_POOLS 0 +#endif + +/** + * MEMP_OVERFLOW_CHECK: memp overflow protection reserves a configurable + * amount of bytes before and after each memp element in every pool and fills + * it with a prominent default value. + * MEMP_OVERFLOW_CHECK == 0 no checking + * MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed + * MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time + * memp_malloc() or memp_free() is called (useful but slow!) + */ +#ifndef MEMP_OVERFLOW_CHECK +#define MEMP_OVERFLOW_CHECK 0 +#endif + +/** + * MEMP_SANITY_CHECK==1: run a sanity check after each memp_free() to make + * sure that there are no cycles in the linked lists. + */ +#ifndef MEMP_SANITY_CHECK +#define MEMP_SANITY_CHECK 0 +#endif + +/** + * MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set + * of memory pools of various sizes. When mem_malloc is called, an element of + * the smallest pool that can provide the length needed is returned. + * To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled. + */ +#ifndef MEM_USE_POOLS +#define MEM_USE_POOLS 0 +#endif + +/** + * MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next + * bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more + * reliable. */ +#ifndef MEM_USE_POOLS_TRY_BIGGER_POOL +#define MEM_USE_POOLS_TRY_BIGGER_POOL 0 +#endif + +/** + * MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h + * that defines additional pools beyond the "standard" ones required + * by lwIP. If you set this to 1, you must have lwippools.h in your + * inlude path somewhere. + */ +#ifndef MEMP_USE_CUSTOM_POOLS +#define MEMP_USE_CUSTOM_POOLS 0 +#endif + +/** + * Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from + * interrupt context (or another context that doesn't allow waiting for a + * semaphore). + * If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT, + * while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs + * with each loop so that mem_free can run. + * + * ATTENTION: As you can see from the above description, this leads to dis-/ + * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc + * can need longer. + * + * If you don't want that, at least for NO_SYS=0, you can still use the following + * functions to enqueue a deallocation call which then runs in the tcpip_thread + * context: + * - pbuf_free_callback(p); + * - mem_free_callback(m); + */ +#ifndef LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT +#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0 +#endif + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#ifndef MEMP_NUM_PBUF +#define MEMP_NUM_PBUF 16 +#endif + +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#ifndef MEMP_NUM_RAW_PCB +#define MEMP_NUM_RAW_PCB 4 +#endif + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#ifndef MEMP_NUM_UDP_PCB +#define MEMP_NUM_UDP_PCB 4 +#endif + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB +#define MEMP_NUM_TCP_PCB 5 +#endif + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB_LISTEN +#define MEMP_NUM_TCP_PCB_LISTEN 8 +#endif + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_SEG +#define MEMP_NUM_TCP_SEG 16 +#endif + +/** + * MEMP_NUM_REASSDATA: the number of IP packets simultaneously queued for + * reassembly (whole packets, not fragments!) + */ +#ifndef MEMP_NUM_REASSDATA +#define MEMP_NUM_REASSDATA 5 +#endif + +/** + * MEMP_NUM_FRAG_PBUF: the number of IP fragments simultaneously sent + * (fragments, not whole packets!). + * This is only used with IP_FRAG_USES_STATIC_BUF==0 and + * LWIP_NETIF_TX_SINGLE_PBUF==0 and only has to be > 1 with DMA-enabled MACs + * where the packet is not yet sent when netif->output returns. + */ +#ifndef MEMP_NUM_FRAG_PBUF +#define MEMP_NUM_FRAG_PBUF 15 +#endif + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#ifndef MEMP_NUM_ARP_QUEUE +#define MEMP_NUM_ARP_QUEUE 30 +#endif + +/** + * MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces + * can be members et the same time (one per netif - allsystems group -, plus one + * per netif membership). + * (requires the LWIP_IGMP option) + */ +#ifndef MEMP_NUM_IGMP_GROUP +#define MEMP_NUM_IGMP_GROUP 8 +#endif + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#ifndef MEMP_NUM_SYS_TIMEOUT +#define MEMP_NUM_SYS_TIMEOUT 3 +#endif + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETBUF +#define MEMP_NUM_NETBUF 2 +#endif + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 4 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_API +#define MEMP_NUM_TCPIP_MSG_API 8 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_INPKT +#define MEMP_NUM_TCPIP_MSG_INPKT 8 +#endif + +/** + * MEMP_NUM_SNMP_NODE: the number of leafs in the SNMP tree. + */ +#ifndef MEMP_NUM_SNMP_NODE +#define MEMP_NUM_SNMP_NODE 50 +#endif + +/** + * MEMP_NUM_SNMP_ROOTNODE: the number of branches in the SNMP tree. + * Every branch has one leaf (MEMP_NUM_SNMP_NODE) at least! + */ +#ifndef MEMP_NUM_SNMP_ROOTNODE +#define MEMP_NUM_SNMP_ROOTNODE 30 +#endif + +/** + * MEMP_NUM_SNMP_VARBIND: the number of concurrent requests (does not have to + * be changed normally) - 2 of these are used per request (1 for input, + * 1 for output) + */ +#ifndef MEMP_NUM_SNMP_VARBIND +#define MEMP_NUM_SNMP_VARBIND 2 +#endif + +/** + * MEMP_NUM_SNMP_VALUE: the number of OID or values concurrently used + * (does not have to be changed normally) - 3 of these are used per request + * (1 for the value read and 2 for OIDs - input and output) + */ +#ifndef MEMP_NUM_SNMP_VALUE +#define MEMP_NUM_SNMP_VALUE 3 +#endif + +/** + * MEMP_NUM_NETDB: the number of concurrently running lwip_addrinfo() calls + * (before freeing the corresponding memory using lwip_freeaddrinfo()). + */ +#ifndef MEMP_NUM_NETDB +#define MEMP_NUM_NETDB 1 +#endif + +/** + * MEMP_NUM_LOCALHOSTLIST: the number of host entries in the local host list + * if DNS_LOCAL_HOSTLIST_IS_DYNAMIC==1. + */ +#ifndef MEMP_NUM_LOCALHOSTLIST +#define MEMP_NUM_LOCALHOSTLIST 1 +#endif + +/** + * MEMP_NUM_PPPOE_INTERFACES: the number of concurrently active PPPoE + * interfaces (only used with PPPOE_SUPPORT==1) + */ +#ifndef MEMP_NUM_PPPOE_INTERFACES +#define MEMP_NUM_PPPOE_INTERFACES 1 +#endif + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#ifndef PBUF_POOL_SIZE +#define PBUF_POOL_SIZE 16 +#endif + +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#ifndef LWIP_ARP +#define LWIP_ARP 1 +#endif + +/** + * ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached. + */ +#ifndef ARP_TABLE_SIZE +#define ARP_TABLE_SIZE 10 +#endif + +/** + * ARP_QUEUEING==1: Multiple outgoing packets are queued during hardware address + * resolution. By default, only the most recent packet is queued per IP address. + * This is sufficient for most protocols and mainly reduces TCP connection + * startup time. Set this to 1 if you know your application sends more than one + * packet in a row to an IP address that is not in the ARP cache. + */ +#ifndef ARP_QUEUEING +#define ARP_QUEUEING 0 +#endif + +/** + * ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be + * updated with the source MAC and IP addresses supplied in the packet. + * You may want to disable this if you do not trust LAN peers to have the + * correct addresses, or as a limited approach to attempt to handle + * spoofing. If disabled, lwIP will need to make a new ARP request if + * the peer is not already in the ARP table, adding a little latency. + * The peer *is* in the ARP table if it requested our address before. + * Also notice that this slows down input processing of every IP packet! + */ +#ifndef ETHARP_TRUST_IP_MAC +#define ETHARP_TRUST_IP_MAC 0 +#endif + +/** + * ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header. + * Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check. + * If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted. + * If ETHARP_VLAN_CHECK is not defined, all traffic is accepted. + */ +#ifndef ETHARP_SUPPORT_VLAN +#define ETHARP_SUPPORT_VLAN 0 +#endif + +/** LWIP_ETHERNET==1: enable ethernet support for PPPoE even though ARP + * might be disabled + */ +#ifndef LWIP_ETHERNET +#define LWIP_ETHERNET (LWIP_ARP || PPPOE_SUPPORT) +#endif + +/** ETH_PAD_SIZE: number of bytes added before the ethernet header to ensure + * alignment of payload after that header. Since the header is 14 bytes long, + * without this padding e.g. addresses in the IP header will not be aligned + * on a 32-bit boundary, so setting this to 2 can speed up 32-bit-platforms. + */ +#ifndef ETH_PAD_SIZE +#define ETH_PAD_SIZE 0 +#endif + +/** ETHARP_SUPPORT_STATIC_ENTRIES==1: enable code to support static ARP table + * entries (using etharp_add_static_entry/etharp_remove_static_entry). + */ +#ifndef ETHARP_SUPPORT_STATIC_ENTRIES +#define ETHARP_SUPPORT_STATIC_ENTRIES 0 +#endif + + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#ifndef IP_FORWARD +#define IP_FORWARD 0 +#endif + +/** + * IP_OPTIONS_ALLOWED: Defines the behavior for IP options. + * IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped. + * IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed). + */ +#ifndef IP_OPTIONS_ALLOWED +#define IP_OPTIONS_ALLOWED 1 +#endif + +/** + * IP_REASSEMBLY==1: Reassemble incoming fragmented IP packets. Note that + * this option does not affect outgoing packet sizes, which can be controlled + * via IP_FRAG. + */ +#ifndef IP_REASSEMBLY +#define IP_REASSEMBLY 0 +#endif + +/** + * IP_FRAG==1: Fragment outgoing IP packets if their size exceeds MTU. Note + * that this option does not affect incoming packet sizes, which can be + * controlled via IP_REASSEMBLY. + */ +#ifndef IP_FRAG +#define IP_FRAG 1 +#endif + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#ifndef IP_REASS_MAXAGE +#define IP_REASS_MAXAGE 3 +#endif + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#ifndef IP_REASS_MAX_PBUFS +#define IP_REASS_MAX_PBUFS 10 +#endif + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented (or with LWIP_NETIF_TX_SINGLE_PBUF==1, + * new PBUF_RAM pbufs are used for fragments). + * ATTENTION: IP_FRAG_USES_STATIC_BUF==1 may not be used for DMA-enabled MACs! + */ +#ifndef IP_FRAG_USES_STATIC_BUF +#define IP_FRAG_USES_STATIC_BUF 0 +#endif + +/** + * IP_FRAG_MAX_MTU: Assumed max MTU on any interface for IP frag buffer + * (requires IP_FRAG_USES_STATIC_BUF==1) + */ +#if IP_FRAG_USES_STATIC_BUF && !defined(IP_FRAG_MAX_MTU) +#define IP_FRAG_MAX_MTU 1500 +#endif + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#ifndef IP_DEFAULT_TTL +#define IP_DEFAULT_TTL 255 +#endif + +/** + * IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast + * filter per pcb on udp and raw send operations. To enable broadcast filter + * on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1. + */ +#ifndef IP_SOF_BROADCAST +#define IP_SOF_BROADCAST 0 +#endif + +/** + * IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast + * filter on recv operations. + */ +#ifndef IP_SOF_BROADCAST_RECV +#define IP_SOF_BROADCAST_RECV 0 +#endif + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_ICMP==1: Enable ICMP module inside the IP stack. + * Be careful, disable that make your product non-compliant to RFC1122 + */ +#ifndef LWIP_ICMP +#define LWIP_ICMP 1 +#endif + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#ifndef ICMP_TTL +#define ICMP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only) + */ +#ifndef LWIP_BROADCAST_PING +#define LWIP_BROADCAST_PING 0 +#endif + +/** + * LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only) + */ +#ifndef LWIP_MULTICAST_PING +#define LWIP_MULTICAST_PING 0 +#endif + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef LWIP_RAW +#define LWIP_RAW 1 +#endif + +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef RAW_TTL +#define RAW_TTL (IP_DEFAULT_TTL) +#endif + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * LWIP_DHCP==1: Enable DHCP module. + */ +#ifndef LWIP_DHCP +#define LWIP_DHCP 0 +#endif + +/** + * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address. + */ +#ifndef DHCP_DOES_ARP_CHECK +#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) +#endif + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#ifndef LWIP_AUTOIP +#define LWIP_AUTOIP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on + * the same interface at the same time. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP +#define LWIP_DHCP_AUTOIP_COOP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes + * that should be sent before falling back on AUTOIP. This can be set + * as low as 1 to get an AutoIP address very quickly, but you should + * be prepared to handle a changing IP address when DHCP overrides + * AutoIP. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP_TRIES +#define LWIP_DHCP_AUTOIP_COOP_TRIES 9 +#endif + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_SNMP==1: Turn on SNMP module. UDP must be available for SNMP + * transport. + */ +#ifndef LWIP_SNMP +#define LWIP_SNMP 0 +#endif + +/** + * SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will + * allow. At least one request buffer is required. + * Does not have to be changed unless external MIBs answer request asynchronously + */ +#ifndef SNMP_CONCURRENT_REQUESTS +#define SNMP_CONCURRENT_REQUESTS 1 +#endif + +/** + * SNMP_TRAP_DESTINATIONS: Number of trap destinations. At least one trap + * destination is required + */ +#ifndef SNMP_TRAP_DESTINATIONS +#define SNMP_TRAP_DESTINATIONS 1 +#endif + +/** + * SNMP_PRIVATE_MIB: + * When using a private MIB, you have to create a file 'private_mib.h' that contains + * a 'struct mib_array_node mib_private' which contains your MIB. + */ +#ifndef SNMP_PRIVATE_MIB +#define SNMP_PRIVATE_MIB 0 +#endif + +/** + * Only allow SNMP write actions that are 'safe' (e.g. disabeling netifs is not + * a safe action and disabled when SNMP_SAFE_REQUESTS = 1). + * Unsafe requests are disabled by default! + */ +#ifndef SNMP_SAFE_REQUESTS +#define SNMP_SAFE_REQUESTS 1 +#endif + +/** + * The maximum length of strings used. This affects the size of + * MEMP_SNMP_VALUE elements. + */ +#ifndef SNMP_MAX_OCTET_STRING_LEN +#define SNMP_MAX_OCTET_STRING_LEN 127 +#endif + +/** + * The maximum depth of the SNMP tree. + * With private MIBs enabled, this depends on your MIB! + * This affects the size of MEMP_SNMP_VALUE elements. + */ +#ifndef SNMP_MAX_TREE_DEPTH +#define SNMP_MAX_TREE_DEPTH 15 +#endif + +/** + * The size of the MEMP_SNMP_VALUE elements, normally calculated from + * SNMP_MAX_OCTET_STRING_LEN and SNMP_MAX_TREE_DEPTH. + */ +#ifndef SNMP_MAX_VALUE_SIZE +#define SNMP_MAX_VALUE_SIZE LWIP_MAX((SNMP_MAX_OCTET_STRING_LEN)+1, sizeof(s32_t)*(SNMP_MAX_TREE_DEPTH)) +#endif + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_IGMP==1: Turn on IGMP module. + */ +#ifndef LWIP_IGMP +#define LWIP_IGMP 0 +#endif + +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS + * transport. + */ +#ifndef LWIP_DNS +#define LWIP_DNS 0 +#endif + +/** DNS maximum number of entries to maintain locally. */ +#ifndef DNS_TABLE_SIZE +#define DNS_TABLE_SIZE 4 +#endif + +/** DNS maximum host name length supported in the name table. */ +#ifndef DNS_MAX_NAME_LENGTH +#define DNS_MAX_NAME_LENGTH 256 +#endif + +/** The maximum of DNS servers */ +#ifndef DNS_MAX_SERVERS +#define DNS_MAX_SERVERS 2 +#endif + +/** DNS do a name checking between the query and the response. */ +#ifndef DNS_DOES_NAME_CHECK +#define DNS_DOES_NAME_CHECK 1 +#endif + +/** DNS message max. size. Default value is RFC compliant. */ +#ifndef DNS_MSG_SIZE +#define DNS_MSG_SIZE 512 +#endif + +/** DNS_LOCAL_HOSTLIST: Implements a local host-to-address list. If enabled, + * you have to define + * #define DNS_LOCAL_HOSTLIST_INIT {{"host1", 0x123}, {"host2", 0x234}} + * (an array of structs name/address, where address is an u32_t in network + * byte order). + * + * Instead, you can also use an external function: + * #define DNS_LOOKUP_LOCAL_EXTERN(x) extern u32_t my_lookup_function(const char *name) + * that returns the IP address or INADDR_NONE if not found. + */ +#ifndef DNS_LOCAL_HOSTLIST +#define DNS_LOCAL_HOSTLIST 0 +#endif /* DNS_LOCAL_HOSTLIST */ + +/** If this is turned on, the local host-list can be dynamically changed + * at runtime. */ +#ifndef DNS_LOCAL_HOSTLIST_IS_DYNAMIC +#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0 +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * LWIP_UDP==1: Turn on UDP. + */ +#ifndef LWIP_UDP +#define LWIP_UDP 1 +#endif + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#ifndef LWIP_UDPLITE +#define LWIP_UDPLITE 0 +#endif + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#ifndef UDP_TTL +#define UDP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf. + */ +#ifndef LWIP_NETBUF_RECVINFO +#define LWIP_NETBUF_RECVINFO 0 +#endif + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * LWIP_TCP==1: Turn on TCP. + */ +#ifndef LWIP_TCP +#define LWIP_TCP 1 +#endif + +/** + * TCP_TTL: Default Time-To-Live value. + */ +#ifndef TCP_TTL +#define TCP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * TCP_WND: The size of a TCP window. This must be at least + * (2 * TCP_MSS) for things to work well + */ +#ifndef TCP_WND +#define TCP_WND (4 * TCP_MSS) +#endif + +/** + * TCP_MAXRTX: Maximum number of retransmissions of data segments. + */ +#ifndef TCP_MAXRTX +#define TCP_MAXRTX 12 +#endif + +/** + * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments. + */ +#ifndef TCP_SYNMAXRTX +#define TCP_SYNMAXRTX 6 +#endif + +/** + * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order. + * Define to 0 if your device is low on memory. + */ +#ifndef TCP_QUEUE_OOSEQ +#define TCP_QUEUE_OOSEQ (LWIP_TCP) +#endif + +/** + * TCP_MSS: TCP Maximum segment size. (default is 536, a conservative default, + * you might want to increase this.) + * For the receive side, this MSS is advertised to the remote side + * when opening a connection. For the transmit size, this MSS sets + * an upper limit on the MSS advertised by the remote host. + */ +#ifndef TCP_MSS +#define TCP_MSS 536 +#endif + +/** + * TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really + * sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which + * reflects the available reassembly buffer size at the remote host) and the + * largest size permitted by the IP layer" (RFC 1122) + * Setting this to 1 enables code that checks TCP_MSS against the MTU of the + * netif used for a connection and limits the MSS if it would be too big otherwise. + */ +#ifndef TCP_CALCULATE_EFF_SEND_MSS +#define TCP_CALCULATE_EFF_SEND_MSS 1 +#endif + + +/** + * TCP_SND_BUF: TCP sender buffer space (bytes). + */ +#ifndef TCP_SND_BUF +#define TCP_SND_BUF 256 +#endif + +/** + * TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least + * as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. + */ +#ifndef TCP_SND_QUEUELEN +#define TCP_SND_QUEUELEN ((4 * (TCP_SND_BUF) + (TCP_MSS - 1))/(TCP_MSS)) +#endif + +/** + * TCP_SNDLOWAT: TCP writable space (bytes). This must be less than + * TCP_SND_BUF. It is the amount of space which must be available in the + * TCP snd_buf for select to return writable (combined with TCP_SNDQUEUELOWAT). + */ +#ifndef TCP_SNDLOWAT +#define TCP_SNDLOWAT ((TCP_SND_BUF)/2) +#endif + +/** + * TCP_SNDQUEUELOWAT: TCP writable bufs (pbuf count). This must be grater + * than TCP_SND_QUEUELEN. If the number of pbufs queued on a pcb drops below + * this number, select returns writable (combined with TCP_SNDLOWAT). + */ +#ifndef TCP_SNDQUEUELOWAT +#define TCP_SNDQUEUELOWAT ((TCP_SND_QUEUELEN)/2) +#endif + +/** + * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb. + */ +#ifndef TCP_LISTEN_BACKLOG +#define TCP_LISTEN_BACKLOG 0 +#endif + +/** + * The maximum allowed backlog for TCP listen netconns. + * This backlog is used unless another is explicitly specified. + * 0xff is the maximum (u8_t). + */ +#ifndef TCP_DEFAULT_LISTEN_BACKLOG +#define TCP_DEFAULT_LISTEN_BACKLOG 0xff +#endif + +/** + * TCP_OVERSIZE: The maximum number of bytes that tcp_write may + * allocate ahead of time in an attempt to create shorter pbuf chains + * for transmission. The meaningful range is 0 to TCP_MSS. Some + * suggested values are: + * + * 0: Disable oversized allocation. Each tcp_write() allocates a new + pbuf (old behaviour). + * 1: Allocate size-aligned pbufs with minimal excess. Use this if your + * scatter-gather DMA requires aligned fragments. + * 128: Limit the pbuf/memory overhead to 20%. + * TCP_MSS: Try to create unfragmented TCP packets. + * TCP_MSS/4: Try to create 4 fragments or less per TCP packet. + */ +#ifndef TCP_OVERSIZE +#define TCP_OVERSIZE TCP_MSS +#endif + +/** + * LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option. + */ +#ifndef LWIP_TCP_TIMESTAMPS +#define LWIP_TCP_TIMESTAMPS 0 +#endif + +/** + * TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an + * explicit window update + */ +#ifndef TCP_WND_UPDATE_THRESHOLD +#define TCP_WND_UPDATE_THRESHOLD (TCP_WND / 4) +#endif + +/** + * LWIP_EVENT_API and LWIP_CALLBACK_API: Only one of these should be set to 1. + * LWIP_EVENT_API==1: The user defines lwip_tcp_event() to receive all + * events (accept, sent, etc) that happen in the system. + * LWIP_CALLBACK_API==1: The PCB callback function is called directly + * for the event. + */ +//#ifndef LWIP_EVENT_API +//#define LWIP_EVENT_API 0 +//#define LWIP_CALLBACK_API 1 +//#else +//#define LWIP_EVENT_API 1 +//#define LWIP_CALLBACK_API 0 +//#endif + + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#ifndef PBUF_LINK_HLEN +#define PBUF_LINK_HLEN (14 + ETH_PAD_SIZE) +#endif + +/** + * PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is + * designed to accomodate single full size TCP frame in one pbuf, including + * TCP_MSS, IP header, and link header. + */ +#ifndef PBUF_POOL_BUFSIZE +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#endif + +/* + ------------------------------------------------ + ---------- Network Interfaces options ---------- + ------------------------------------------------ +*/ +/** + * LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname + * field. + */ +#ifndef LWIP_NETIF_HOSTNAME +#define LWIP_NETIF_HOSTNAME 0 +#endif + +/** + * LWIP_NETIF_API==1: Support netif api (in netifapi.c) + */ +#ifndef LWIP_NETIF_API +#define LWIP_NETIF_API 0 +#endif + +/** + * LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface + * changes its up/down status (i.e., due to DHCP IP acquistion) + */ +#ifndef LWIP_NETIF_STATUS_CALLBACK +#define LWIP_NETIF_STATUS_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface + * whenever the link changes (i.e., link down) + */ +#ifndef LWIP_NETIF_LINK_CALLBACK +#define LWIP_NETIF_LINK_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g. table + * indices) in struct netif. TCP and UDP can make use of this to prevent + * scanning the ARP table for every sent packet. While this is faster for big + * ARP tables or many concurrent connections, it might be counterproductive + * if you have a tiny ARP table or if there never are concurrent connections. + */ +#ifndef LWIP_NETIF_HWADDRHINT +#define LWIP_NETIF_HWADDRHINT 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP + * address equal to the netif IP address, looping them back up the stack. + */ +#ifndef LWIP_NETIF_LOOPBACK +#define LWIP_NETIF_LOOPBACK 1 +#endif + +/** + * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback + * sending for each netif (0 = disabled) + */ +#ifndef LWIP_LOOPBACK_MAX_PBUFS +#define LWIP_LOOPBACK_MAX_PBUFS 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in + * the system, as netifs must change how they behave depending on this setting + * for the LWIP_NETIF_LOOPBACK option to work. + * Setting this is needed to avoid reentering non-reentrant functions like + * tcp_input(). + * LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a + * multithreaded environment like tcpip.c. In this case, netif->input() + * is called directly. + * LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup. + * The packets are put on a list and netif_poll() must be called in + * the main application loop. + */ +#ifndef LWIP_NETIF_LOOPBACK_MULTITHREADING +#define LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS) +#endif + +/** + * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data + * to be sent into one single pbuf. This is for compatibility with DMA-enabled + * MACs that do not support scatter-gather. + * Beware that this might involve CPU-memcpy before transmitting that would not + * be needed without this flag! Use this only if you need to! + * + * @todo: TCP and IP-frag do not work with this, yet: + */ +#ifndef LWIP_NETIF_TX_SINGLE_PBUF +#define LWIP_NETIF_TX_SINGLE_PBUF 0 +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_LOOPIF==1: Support loop interface (127.0.0.1) and loopif.c + */ +#ifndef LWIP_HAVE_LOOPIF +#define LWIP_HAVE_LOOPIF 1 +#endif + +/* + ------------------------------------ + ---------- SLIPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_SLIPIF==1: Support slip interface and slipif.c + */ +#ifndef LWIP_HAVE_SLIPIF +#define LWIP_HAVE_SLIPIF 0 +#endif + +/* + ------------------------------------ + ---------- Thread options ---------- + ------------------------------------ +*/ +/** + * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread. + */ +#ifndef TCPIP_THREAD_NAME +#define TCPIP_THREAD_NAME "tcpip_thread" +#endif + +/** + * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_STACKSIZE +#define TCPIP_THREAD_STACKSIZE 0 +#endif + +/** + * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_PRIO +#define TCPIP_THREAD_PRIO 1 +#endif + +/** + * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when tcpip_init is called. + */ +#ifndef TCPIP_MBOX_SIZE +#define TCPIP_MBOX_SIZE 0 +#endif + +/** + * SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread. + */ +#ifndef SLIPIF_THREAD_NAME +#define SLIPIF_THREAD_NAME "slipif_loop" +#endif + +/** + * SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_STACKSIZE +#define SLIPIF_THREAD_STACKSIZE 0 +#endif + +/** + * SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_PRIO +#define SLIPIF_THREAD_PRIO 1 +#endif + +/** + * PPP_THREAD_NAME: The name assigned to the pppInputThread. + */ +#ifndef PPP_THREAD_NAME +#define PPP_THREAD_NAME "pppInputThread" +#endif + +/** + * PPP_THREAD_STACKSIZE: The stack size used by the pppInputThread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_STACKSIZE +#define PPP_THREAD_STACKSIZE 0 +#endif + +/** + * PPP_THREAD_PRIO: The priority assigned to the pppInputThread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_PRIO +#define PPP_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread. + */ +#ifndef DEFAULT_THREAD_NAME +#define DEFAULT_THREAD_NAME "lwIP" +#endif + +/** + * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_STACKSIZE +#define DEFAULT_THREAD_STACKSIZE 0 +#endif + +/** + * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_PRIO +#define DEFAULT_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_RAW_RECVMBOX_SIZE +#define DEFAULT_RAW_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_UDP_RECVMBOX_SIZE +#define DEFAULT_UDP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_TCP_RECVMBOX_SIZE +#define DEFAULT_TCP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections. + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when the acceptmbox is created. + */ +#ifndef DEFAULT_ACCEPTMBOX_SIZE +#define DEFAULT_ACCEPTMBOX_SIZE 0 +#endif + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ +/** + * LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING +#define LWIP_TCPIP_CORE_LOCKING 0 +#endif + +/** + * LWIP_TCPIP_CORE_LOCKING_INPUT: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING_INPUT +#define LWIP_TCPIP_CORE_LOCKING_INPUT 0 +#endif + +/** + * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c) + */ +#ifndef LWIP_NETCONN +#define LWIP_NETCONN 0 +#endif + +/** LWIP_TCPIP_TIMEOUT==1: Enable tcpip_timeout/tcpip_untimeout tod create + * timers running in tcpip_thread from another thread. + */ +#ifndef LWIP_TCPIP_TIMEOUT +#define LWIP_TCPIP_TIMEOUT 1 +#endif + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c) + */ +#ifndef LWIP_SOCKET +#define LWIP_SOCKET 0 +#endif + +/** + * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names. + * (only used if you use sockets.c) + */ +#ifndef LWIP_COMPAT_SOCKETS +#define LWIP_COMPAT_SOCKETS 1 +#endif + +/** + * LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names. + * Disable this option if you use a POSIX operating system that uses the same + * names (read, write & close). (only used if you use sockets.c) + */ +#ifndef LWIP_POSIX_SOCKETS_IO_NAMES +#define LWIP_POSIX_SOCKETS_IO_NAMES 1 +#endif + +/** + * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT + * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set + * in seconds. (does not require sockets.c, and will affect tcp.c) + */ +#ifndef LWIP_TCP_KEEPALIVE +#define LWIP_TCP_KEEPALIVE 0 +#endif + +/** + * LWIP_SO_RCVTIMEO==1: Enable SO_RCVTIMEO processing. + */ +#ifndef LWIP_SO_RCVTIMEO +#define LWIP_SO_RCVTIMEO 0 +#endif + +/** + * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing. + */ +#ifndef LWIP_SO_RCVBUF +#define LWIP_SO_RCVBUF 0 +#endif + +/** + * If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize. + */ +#ifndef RECV_BUFSIZE_DEFAULT +#define RECV_BUFSIZE_DEFAULT INT_MAX +#endif + +/** + * SO_REUSE==1: Enable SO_REUSEADDR option. + */ +#ifndef SO_REUSE +#define SO_REUSE 0 +#endif + +/** + * SO_REUSE_RXTOALL==1: Pass a copy of incoming broadcast/multicast packets + * to all local matches if SO_REUSEADDR is turned on. + * WARNING: Adds a memcpy for every packet if passing to more than one pcb! + */ +#ifndef SO_REUSE_RXTOALL +#define SO_REUSE_RXTOALL 0 +#endif + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#ifndef LWIP_STATS +#define LWIP_STATS 1 +#endif + +#if LWIP_STATS + +/** + * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions. + */ +#ifndef LWIP_STATS_DISPLAY +#define LWIP_STATS_DISPLAY 0 +#endif + +/** + * LINK_STATS==1: Enable link stats. + */ +#ifndef LINK_STATS +#define LINK_STATS 1 +#endif + +/** + * ETHARP_STATS==1: Enable etharp stats. + */ +#ifndef ETHARP_STATS +#define ETHARP_STATS (LWIP_ARP) +#endif + +/** + * IP_STATS==1: Enable IP stats. + */ +#ifndef IP_STATS +#define IP_STATS 1 +#endif + +/** + * IPFRAG_STATS==1: Enable IP fragmentation stats. Default is + * on if using either frag or reass. + */ +#ifndef IPFRAG_STATS +#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +#endif + +/** + * ICMP_STATS==1: Enable ICMP stats. + */ +#ifndef ICMP_STATS +#define ICMP_STATS 1 +#endif + +/** + * IGMP_STATS==1: Enable IGMP stats. + */ +#ifndef IGMP_STATS +#define IGMP_STATS (LWIP_IGMP) +#endif + +/** + * UDP_STATS==1: Enable UDP stats. Default is on if + * UDP enabled, otherwise off. + */ +#ifndef UDP_STATS +#define UDP_STATS (LWIP_UDP) +#endif + +/** + * TCP_STATS==1: Enable TCP stats. Default is on if TCP + * enabled, otherwise off. + */ +#ifndef TCP_STATS +#define TCP_STATS (LWIP_TCP) +#endif + +/** + * MEM_STATS==1: Enable mem.c stats. + */ +#ifndef MEM_STATS +#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0)) +#endif + +/** + * MEMP_STATS==1: Enable memp.c pool stats. + */ +#ifndef MEMP_STATS +#define MEMP_STATS (MEMP_MEM_MALLOC == 0) +#endif + +/** + * SYS_STATS==1: Enable system stats (sem and mbox counts, etc). + */ +#ifndef SYS_STATS +#define SYS_STATS (NO_SYS == 0) +#endif + +#else + +#define LINK_STATS 0 +#define IP_STATS 0 +#define IPFRAG_STATS 0 +#define ICMP_STATS 0 +#define IGMP_STATS 0 +#define UDP_STATS 0 +#define TCP_STATS 0 +#define MEM_STATS 0 +#define MEMP_STATS 0 +#define SYS_STATS 0 +#define LWIP_STATS_DISPLAY 0 + +#endif /* LWIP_STATS */ + +/* + --------------------------------- + ---------- PPP options ---------- + --------------------------------- +*/ +/** + * PPP_SUPPORT==1: Enable PPP. + */ +#ifndef PPP_SUPPORT +#define PPP_SUPPORT 0 +#endif + +/** + * PPPOE_SUPPORT==1: Enable PPP Over Ethernet + */ +#ifndef PPPOE_SUPPORT +#define PPPOE_SUPPORT 0 +#endif + +/** + * PPPOS_SUPPORT==1: Enable PPP Over Serial + */ +#ifndef PPPOS_SUPPORT +#define PPPOS_SUPPORT PPP_SUPPORT +#endif + +#if PPP_SUPPORT + +/** + * NUM_PPP: Max PPP sessions. + */ +#ifndef NUM_PPP +#define NUM_PPP 1 +#endif + +/** + * PAP_SUPPORT==1: Support PAP. + */ +#ifndef PAP_SUPPORT +#define PAP_SUPPORT 0 +#endif + +/** + * CHAP_SUPPORT==1: Support CHAP. + */ +#ifndef CHAP_SUPPORT +#define CHAP_SUPPORT 0 +#endif + +/** + * MSCHAP_SUPPORT==1: Support MSCHAP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef MSCHAP_SUPPORT +#define MSCHAP_SUPPORT 0 +#endif + +/** + * CBCP_SUPPORT==1: Support CBCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CBCP_SUPPORT +#define CBCP_SUPPORT 0 +#endif + +/** + * CCP_SUPPORT==1: Support CCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CCP_SUPPORT +#define CCP_SUPPORT 0 +#endif + +/** + * VJ_SUPPORT==1: Support VJ header compression. + */ +#ifndef VJ_SUPPORT +#define VJ_SUPPORT 0 +#endif + +/** + * MD5_SUPPORT==1: Support MD5 (see also CHAP). + */ +#ifndef MD5_SUPPORT +#define MD5_SUPPORT 0 +#endif + +/* + * Timeouts + */ +#ifndef FSM_DEFTIMEOUT +#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef FSM_DEFMAXTERMREQS +#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXCONFREQS +#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXNAKLOOPS +#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ +#endif + +#ifndef UPAP_DEFTIMEOUT +#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ +#endif + +#ifndef UPAP_DEFREQTIME +#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ +#endif + +#ifndef CHAP_DEFTIMEOUT +#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef CHAP_DEFTRANSMITS +#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ +#endif + +/* Interval in seconds between keepalive echo requests, 0 to disable. */ +#ifndef LCP_ECHOINTERVAL +#define LCP_ECHOINTERVAL 0 +#endif + +/* Number of unanswered echo requests before failure. */ +#ifndef LCP_MAXECHOFAILS +#define LCP_MAXECHOFAILS 3 +#endif + +/* Max Xmit idle time (in jiffies) before resend flag char. */ +#ifndef PPP_MAXIDLEFLAG +#define PPP_MAXIDLEFLAG 100 +#endif + +/* + * Packet sizes + * + * Note - lcp shouldn't be allowed to negotiate stuff outside these + * limits. See lcp.h in the pppd directory. + * (XXX - these constants should simply be shared by lcp.c instead + * of living in lcp.h) + */ +#define PPP_MTU 1500 /* Default MTU (size of Info field) */ +#ifndef PPP_MAXMTU +/* #define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) */ +#define PPP_MAXMTU 1500 /* Largest MTU we allow */ +#endif +#define PPP_MINMTU 64 +#define PPP_MRU 1500 /* default MRU = max length of info field */ +#define PPP_MAXMRU 1500 /* Largest MRU we allow */ +#ifndef PPP_DEFMRU +#define PPP_DEFMRU 296 /* Try for this */ +#endif +#define PPP_MINMRU 128 /* No MRUs below this */ + +#ifndef MAXNAMELEN +#define MAXNAMELEN 256 /* max length of hostname or name for auth */ +#endif +#ifndef MAXSECRETLEN +#define MAXSECRETLEN 256 /* max length of password or secret */ +#endif + +#endif /* PPP_SUPPORT */ + +/* + -------------------------------------- + ---------- Checksum options ---------- + -------------------------------------- +*/ +/** + * CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets. + */ +#ifndef CHECKSUM_GEN_IP +#define CHECKSUM_GEN_IP 1 +#endif + +/** + * CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets. + */ +#ifndef CHECKSUM_GEN_UDP +#define CHECKSUM_GEN_UDP 1 +#endif + +/** + * CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets. + */ +#ifndef CHECKSUM_GEN_TCP +#define CHECKSUM_GEN_TCP 1 +#endif + +/** + * CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets. + */ +#ifndef CHECKSUM_CHECK_IP +#define CHECKSUM_CHECK_IP 1 +#endif + +/** + * CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets. + */ +#ifndef CHECKSUM_CHECK_UDP +#define CHECKSUM_CHECK_UDP 1 +#endif + +/** + * CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets. + */ +#ifndef CHECKSUM_CHECK_TCP +#define CHECKSUM_CHECK_TCP 1 +#endif + +/** + * LWIP_CHECKSUM_ON_COPY==1: Calculate checksum when copying data from + * application buffers to pbufs. + */ +#ifndef LWIP_CHECKSUM_ON_COPY +#define LWIP_CHECKSUM_ON_COPY 0 +#endif + +/* + --------------------------------------- + ---------- Debugging options ---------- + --------------------------------------- +*/ +/** + * LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is + * compared against this value. If it is smaller, then debugging + * messages are written. + */ +#ifndef LWIP_DBG_MIN_LEVEL +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL +#endif + +/** + * LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable + * debug messages of certain types. + */ +#ifndef LWIP_DBG_TYPES_ON +#define LWIP_DBG_TYPES_ON LWIP_DBG_ON +#endif + +/** + * ETHARP_DEBUG: Enable debugging in etharp.c. + */ +#ifndef ETHARP_DEBUG +#define ETHARP_DEBUG LWIP_DBG_OFF +#endif + +/** + * NETIF_DEBUG: Enable debugging in netif.c. + */ +#ifndef NETIF_DEBUG +#define NETIF_DEBUG LWIP_DBG_OFF +#endif + +/** + * PBUF_DEBUG: Enable debugging in pbuf.c. + */ +#ifndef PBUF_DEBUG +#define PBUF_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_LIB_DEBUG: Enable debugging in api_lib.c. + */ +#ifndef API_LIB_DEBUG +#define API_LIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_MSG_DEBUG: Enable debugging in api_msg.c. + */ +#ifndef API_MSG_DEBUG +#define API_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SOCKETS_DEBUG: Enable debugging in sockets.c. + */ +#ifndef SOCKETS_DEBUG +#define SOCKETS_DEBUG LWIP_DBG_OFF +#endif + +/** + * ICMP_DEBUG: Enable debugging in icmp.c. + */ +#ifndef ICMP_DEBUG +#define ICMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IGMP_DEBUG: Enable debugging in igmp.c. + */ +#ifndef IGMP_DEBUG +#define IGMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * INET_DEBUG: Enable debugging in inet.c. + */ +#ifndef INET_DEBUG +#define INET_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_DEBUG: Enable debugging for IP. + */ +#ifndef IP_DEBUG +#define IP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass. + */ +#ifndef IP_REASS_DEBUG +#define IP_REASS_DEBUG LWIP_DBG_OFF +#endif + +/** + * RAW_DEBUG: Enable debugging in raw.c. + */ +#ifndef RAW_DEBUG +#define RAW_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEM_DEBUG: Enable debugging in mem.c. + */ +#ifndef MEM_DEBUG +#define MEM_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEMP_DEBUG: Enable debugging in memp.c. + */ +#ifndef MEMP_DEBUG +#define MEMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SYS_DEBUG: Enable debugging in sys.c. + */ +#ifndef SYS_DEBUG +#define SYS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TIMERS_DEBUG: Enable debugging in timers.c. + */ +#ifndef TIMERS_DEBUG +#define TIMERS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_DEBUG: Enable debugging for TCP. + */ +#ifndef TCP_DEBUG +#define TCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug. + */ +#ifndef TCP_INPUT_DEBUG +#define TCP_INPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit. + */ +#ifndef TCP_FR_DEBUG +#define TCP_FR_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RTO_DEBUG: Enable debugging in TCP for retransmit + * timeout. + */ +#ifndef TCP_RTO_DEBUG +#define TCP_RTO_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_CWND_DEBUG: Enable debugging for TCP congestion window. + */ +#ifndef TCP_CWND_DEBUG +#define TCP_CWND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating. + */ +#ifndef TCP_WND_DEBUG +#define TCP_WND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions. + */ +#ifndef TCP_OUTPUT_DEBUG +#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RST_DEBUG: Enable debugging for TCP with the RST message. + */ +#ifndef TCP_RST_DEBUG +#define TCP_RST_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths. + */ +#ifndef TCP_QLEN_DEBUG +#define TCP_QLEN_DEBUG LWIP_DBG_OFF +#endif + +/** + * UDP_DEBUG: Enable debugging in UDP. + */ +#ifndef UDP_DEBUG +#define UDP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCPIP_DEBUG: Enable debugging in tcpip.c. + */ +#ifndef TCPIP_DEBUG +#define TCPIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * PPP_DEBUG: Enable debugging for PPP. + */ +#ifndef PPP_DEBUG +#define PPP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SLIP_DEBUG: Enable debugging in slipif.c. + */ +#ifndef SLIP_DEBUG +#define SLIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * DHCP_DEBUG: Enable debugging in dhcp.c. + */ +#ifndef DHCP_DEBUG +#define DHCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * AUTOIP_DEBUG: Enable debugging in autoip.c. + */ +#ifndef AUTOIP_DEBUG +#define AUTOIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MSG_DEBUG: Enable debugging for SNMP messages. + */ +#ifndef SNMP_MSG_DEBUG +#define SNMP_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs. + */ +#ifndef SNMP_MIB_DEBUG +#define SNMP_MIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * DNS_DEBUG: Enable debugging for DNS. + */ +#ifndef DNS_DEBUG +#define DNS_DEBUG LWIP_DBG_OFF +#endif + +#endif /* __LWIP_OPT_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/pbuf.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/pbuf.h new file mode 100644 index 0000000..3d24db4 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/pbuf.h @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __LWIP_PBUF_H__ +#define __LWIP_PBUF_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Currently, the pbuf_custom code is only needed for one specific configuration + * of IP_FRAG */ +#define LWIP_SUPPORT_CUSTOM_PBUF (IP_FRAG && !IP_FRAG_USES_STATIC_BUF && !LWIP_NETIF_TX_SINGLE_PBUF) + +#define PBUF_TRANSPORT_HLEN 20 +#define PBUF_IP_HLEN 20 + +typedef enum { + PBUF_TRANSPORT, + PBUF_IP, + PBUF_LINK, + PBUF_RAW +} pbuf_layer; + +typedef enum { + PBUF_RAM, /* pbuf data is stored in RAM */ + PBUF_ROM, /* pbuf data is stored in ROM */ + PBUF_REF, /* pbuf comes from the pbuf pool */ + PBUF_POOL, /* pbuf payload refers to RAM */ +#ifdef EBUF_LWIP + PBUF_ESF_RX /* pbuf payload is from WLAN */ +#endif /* ESF_LWIP */ +} pbuf_type; + + +/** indicates this packet's data should be immediately passed to the application */ +#define PBUF_FLAG_PUSH 0x01U +/** indicates this is a custom pbuf: pbuf_free and pbuf_header handle such a + a pbuf differently */ +#define PBUF_FLAG_IS_CUSTOM 0x02U +/** indicates this pbuf is UDP multicast to be looped back */ +#define PBUF_FLAG_MCASTLOOP 0x04U + +struct pbuf { + /** next pbuf in singly linked pbuf chain */ + struct pbuf *next; + + /** pointer to the actual data in the buffer */ + void *payload; + + /** + * total length of this buffer and all next buffers in chain + * belonging to the same packet. + * + * For non-queue packet chains this is the invariant: + * p->tot_len == p->len + (p->next? p->next->tot_len: 0) + */ + u16_t tot_len; + + /** length of this buffer */ + u16_t len; + + /** pbuf_type as u8_t instead of enum to save space */ + u8_t /*pbuf_type*/ type; + + /** misc flags */ + u8_t flags; + + /** + * the reference count always equals the number of pointers + * that refer to this pbuf. This can be pointers from an application, + * the stack itself, or pbuf->next pointers from a chain. + */ + u16_t ref; + + /* add a pointer for esf_buf */ + void * eb; +}; + +#if LWIP_SUPPORT_CUSTOM_PBUF +/** Prototype for a function to free a custom pbuf */ +typedef void (*pbuf_free_custom_fn)(struct pbuf *p); + +/** A custom pbuf: like a pbuf, but following a function pointer to free it. */ +struct pbuf_custom { + /** The actual pbuf */ + struct pbuf pbuf; + /** This function is called when pbuf_free deallocates this pbuf(_custom) */ + pbuf_free_custom_fn custom_free_function; +}; +#endif /* LWIP_SUPPORT_CUSTOM_PBUF */ + +/* Initializes the pbuf module. This call is empty for now, but may not be in future. */ +#define pbuf_init() + +struct pbuf *pbuf_alloc(pbuf_layer l, u16_t length, pbuf_type type)ICACHE_FLASH_ATTR; +#if LWIP_SUPPORT_CUSTOM_PBUF +struct pbuf *pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, + struct pbuf_custom *p, void *payload_mem, + u16_t payload_mem_len)ICACHE_FLASH_ATTR; +#endif /* LWIP_SUPPORT_CUSTOM_PBUF */ +void pbuf_realloc(struct pbuf *p, u16_t size)ICACHE_FLASH_ATTR; +u8_t pbuf_header(struct pbuf *p, s16_t header_size)ICACHE_FLASH_ATTR; +void pbuf_ref(struct pbuf *p)ICACHE_FLASH_ATTR; +u8_t pbuf_free(struct pbuf *p)ICACHE_FLASH_ATTR; +u8_t pbuf_clen(struct pbuf *p)ICACHE_FLASH_ATTR; +void pbuf_cat(struct pbuf *head, struct pbuf *tail)ICACHE_FLASH_ATTR; +void pbuf_chain(struct pbuf *head, struct pbuf *tail)ICACHE_FLASH_ATTR; +struct pbuf *pbuf_dechain(struct pbuf *p)ICACHE_FLASH_ATTR; +err_t pbuf_copy(struct pbuf *p_to, struct pbuf *p_from)ICACHE_FLASH_ATTR; +u16_t pbuf_copy_partial(struct pbuf *p, void *dataptr, u16_t len, u16_t offset)ICACHE_FLASH_ATTR; +err_t pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len)ICACHE_FLASH_ATTR; +struct pbuf *pbuf_coalesce(struct pbuf *p, pbuf_layer layer)ICACHE_FLASH_ATTR; +#if LWIP_CHECKSUM_ON_COPY +err_t pbuf_fill_chksum(struct pbuf *p, u16_t start_offset, const void *dataptr, + u16_t len, u16_t *chksum)ICACHE_FLASH_ATTR; +#endif /* LWIP_CHECKSUM_ON_COPY */ + +u8_t pbuf_get_at(struct pbuf* p, u16_t offset)ICACHE_FLASH_ATTR; +u16_t pbuf_memcmp(struct pbuf* p, u16_t offset, const void* s2, u16_t n)ICACHE_FLASH_ATTR; +u16_t pbuf_memfind(struct pbuf* p, const void* mem, u16_t mem_len, u16_t start_offset)ICACHE_FLASH_ATTR; +u16_t pbuf_strstr(struct pbuf* p, const char* substr)ICACHE_FLASH_ATTR; + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_PBUF_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/puck_def.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/puck_def.h new file mode 100644 index 0000000..c20027a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/puck_def.h @@ -0,0 +1,44 @@ +/* + * puck_def.h + * + * Created on: Jul 22, 2010 + * Author: dtoma + */ + +#ifndef PUCK_DEF_H_ +#define PUCK_DEF_H_ + + + +#define INSTRUMENT_PORT 8760 + +#define INSTRUMENT_LENGTH 80 + +#define MDNS_NAME_LENGTH 68 //68 + +char* PUCK_SERVICE = NULL; +//#define PUCK_SERVICE "_Escpressif._tcp.local" +#define DNS_SD_SERVICE "_services._dns-sd._udp.local" +#define SERVICE_DESCRIPTION "PUCK PROTOCOL" +#define PUCK_SERVICE_LENGTH 30 + +#define UUID_LEN 16 +#define DS_VERS_LEN 2 +#define DS_SIZE_LEN 2 +#define MAN_ID_LEN 4 +#define MAN_MODEL_LEN 2 +#define MAN_VERS_LEN 2 +#define SER_NUM_LEN 4 +#define NAME_LEN 64 +#define PUCK_DATASHEET_SIZE 96 + +#define UUID_OFFSET 0 +#define DS_VERS_OFFSET UUID_LEN + UUID_OFFSET +#define DS_SIZE_OFFSET DS_VERS_LEN + DS_VERS_OFFSET +#define MAN_ID_OFFSET DS_SIZE_LEN + DS_SIZE_OFFSET +#define MAN_MODEL_OFFSET MAN_ID_LEN + MAN_ID_OFFSET +#define MAN_VERS_OFFSET MAN_MODEL_LEN + MAN_MODEL_OFFSET +#define SER_NUM_OFFSET MAN_VERS_LEN + MAN_VERS_OFFSET +#define NAME_OFFSET SER_NUM_LEN + SER_NUM_OFFSET + +#endif /* __PUCK_DEF_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/raw.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/raw.h new file mode 100644 index 0000000..c9c4087 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/raw.h @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_RAW_H__ +#define __LWIP_RAW_H__ + +#include "lwip/opt.h" + +#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/def.h" +#include "lwip/ip.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct raw_pcb; + +/** Function prototype for raw pcb receive callback functions. + * @param arg user supplied argument (raw_pcb.recv_arg) + * @param pcb the raw_pcb which received data + * @param p the packet buffer that was received + * @param addr the remote IP address from which the packet was received + * @return 1 if the packet was 'eaten' (aka. deleted), + * 0 if the packet lives on + * If returning 1, the callback is responsible for freeing the pbuf + * if it's not used any more. + */ +typedef u8_t (*raw_recv_fn)(void *arg, struct raw_pcb *pcb, struct pbuf *p, + ip_addr_t *addr); + +struct raw_pcb { + /* Common members of all PCB types */ + IP_PCB; + + struct raw_pcb *next; + + u8_t protocol; + + /** receive callback function */ + raw_recv_fn recv; + /* user-supplied argument for the recv callback */ + void *recv_arg; +}; + +/* The following functions is the application layer interface to the + RAW code. */ +struct raw_pcb * raw_new (u8_t proto)ICACHE_FLASH_ATTR; +void raw_remove (struct raw_pcb *pcb)ICACHE_FLASH_ATTR; +err_t raw_bind (struct raw_pcb *pcb, ip_addr_t *ipaddr)ICACHE_FLASH_ATTR; +err_t raw_connect (struct raw_pcb *pcb, ip_addr_t *ipaddr)ICACHE_FLASH_ATTR; + +void raw_recv (struct raw_pcb *pcb, raw_recv_fn recv, void *recv_arg)ICACHE_FLASH_ATTR; +err_t raw_sendto (struct raw_pcb *pcb, struct pbuf *p, ip_addr_t *ipaddr)ICACHE_FLASH_ATTR; +err_t raw_send (struct raw_pcb *pcb, struct pbuf *p); + +/* The following functions are the lower layer interface to RAW. */ +u8_t raw_input (struct pbuf *p, struct netif *inp)ICACHE_FLASH_ATTR; +#define raw_init() /* Compatibility define, not init needed. */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_RAW */ + +#endif /* __LWIP_RAW_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sio.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sio.h new file mode 100644 index 0000000..228c857 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sio.h @@ -0,0 +1,141 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + */ + +/* + * This is the interface to the platform specific serial IO module + * It needs to be implemented by those platforms which need SLIP or PPP + */ + +#ifndef __SIO_H__ +#define __SIO_H__ + +#include "lwip/arch.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* If you want to define sio_fd_t elsewhere or differently, + define this in your cc.h file. */ +#ifndef __sio_fd_t_defined +typedef void * sio_fd_t; +#endif + +/* The following functions can be defined to something else in your cc.h file + or be implemented in your custom sio.c file. */ + +#ifndef sio_open +/** + * Opens a serial device for communication. + * + * @param devnum device number + * @return handle to serial device if successful, NULL otherwise + */ +sio_fd_t sio_open(u8_t devnum)ICACHE_FLASH_ATTR; +#endif + +#ifndef sio_send +/** + * Sends a single character to the serial device. + * + * @param c character to send + * @param fd serial device handle + * + * @note This function will block until the character can be sent. + */ +void sio_send(u8_t c, sio_fd_t fd)ICACHE_FLASH_ATTR; +#endif + +#ifndef sio_recv +/** + * Receives a single character from the serial device. + * + * @param fd serial device handle + * + * @note This function will block until a character is received. + */ +u8_t sio_recv(sio_fd_t fd)ICACHE_FLASH_ATTR; +#endif + +#ifndef sio_read +/** + * Reads from the serial device. + * + * @param fd serial device handle + * @param data pointer to data buffer for receiving + * @param len maximum length (in bytes) of data to receive + * @return number of bytes actually received - may be 0 if aborted by sio_read_abort + * + * @note This function will block until data can be received. The blocking + * can be cancelled by calling sio_read_abort(). + */ +u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len)ICACHE_FLASH_ATTR; +#endif + +#ifndef sio_tryread +/** + * Tries to read from the serial device. Same as sio_read but returns + * immediately if no data is available and never blocks. + * + * @param fd serial device handle + * @param data pointer to data buffer for receiving + * @param len maximum length (in bytes) of data to receive + * @return number of bytes actually received + */ +u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len)ICACHE_FLASH_ATTR; +#endif + +#ifndef sio_write +/** + * Writes to the serial device. + * + * @param fd serial device handle + * @param data pointer to data to send + * @param len length (in bytes) of data to send + * @return number of bytes actually sent + * + * @note This function will block until all data can be sent. + */ +u32_t sio_write(sio_fd_t fd, u8_t *data, u32_t len)ICACHE_FLASH_ATTR; +#endif + +#ifndef sio_read_abort +/** + * Aborts a blocking sio_read() call. + * + * @param fd serial device handle + */ +void sio_read_abort(sio_fd_t fd)ICACHE_FLASH_ATTR; +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __SIO_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp.h new file mode 100644 index 0000000..2ed043d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp.h @@ -0,0 +1,367 @@ +/* + * Copyright (c) 2001, 2002 Leon Woestenberg + * Copyright (c) 2001, 2002 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Leon Woestenberg + * + */ +#ifndef __LWIP_SNMP_H__ +#define __LWIP_SNMP_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#include "lwip/ip_addr.h" + +struct udp_pcb; +struct netif; + +/** + * @see RFC1213, "MIB-II, 6. Definitions" + */ +enum snmp_ifType { + snmp_ifType_other=1, /* none of the following */ + snmp_ifType_regular1822, + snmp_ifType_hdh1822, + snmp_ifType_ddn_x25, + snmp_ifType_rfc877_x25, + snmp_ifType_ethernet_csmacd, + snmp_ifType_iso88023_csmacd, + snmp_ifType_iso88024_tokenBus, + snmp_ifType_iso88025_tokenRing, + snmp_ifType_iso88026_man, + snmp_ifType_starLan, + snmp_ifType_proteon_10Mbit, + snmp_ifType_proteon_80Mbit, + snmp_ifType_hyperchannel, + snmp_ifType_fddi, + snmp_ifType_lapb, + snmp_ifType_sdlc, + snmp_ifType_ds1, /* T-1 */ + snmp_ifType_e1, /* european equiv. of T-1 */ + snmp_ifType_basicISDN, + snmp_ifType_primaryISDN, /* proprietary serial */ + snmp_ifType_propPointToPointSerial, + snmp_ifType_ppp, + snmp_ifType_softwareLoopback, + snmp_ifType_eon, /* CLNP over IP [11] */ + snmp_ifType_ethernet_3Mbit, + snmp_ifType_nsip, /* XNS over IP */ + snmp_ifType_slip, /* generic SLIP */ + snmp_ifType_ultra, /* ULTRA technologies */ + snmp_ifType_ds3, /* T-3 */ + snmp_ifType_sip, /* SMDS */ + snmp_ifType_frame_relay +}; + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +/** SNMP "sysuptime" Interval */ +#define SNMP_SYSUPTIME_INTERVAL 10 + +/** fixed maximum length for object identifier type */ +#define LWIP_SNMP_OBJ_ID_LEN 32 + +/** internal object identifier representation */ +struct snmp_obj_id +{ + u8_t len; + s32_t id[LWIP_SNMP_OBJ_ID_LEN]; +}; + +/* system */ +void snmp_set_sysdesr(u8_t* str, u8_t* len); +void snmp_set_sysobjid(struct snmp_obj_id *oid); +void snmp_get_sysobjid_ptr(struct snmp_obj_id **oid); +void snmp_inc_sysuptime(void); +void snmp_add_sysuptime(u32_t value); +void snmp_get_sysuptime(u32_t *value); +void snmp_set_syscontact(u8_t *ocstr, u8_t *ocstrlen); +void snmp_set_sysname(u8_t *ocstr, u8_t *ocstrlen); +void snmp_set_syslocation(u8_t *ocstr, u8_t *ocstrlen); + +/* network interface */ +void snmp_add_ifinoctets(struct netif *ni, u32_t value); +void snmp_inc_ifinucastpkts(struct netif *ni); +void snmp_inc_ifinnucastpkts(struct netif *ni); +void snmp_inc_ifindiscards(struct netif *ni); +void snmp_add_ifoutoctets(struct netif *ni, u32_t value); +void snmp_inc_ifoutucastpkts(struct netif *ni); +void snmp_inc_ifoutnucastpkts(struct netif *ni); +void snmp_inc_ifoutdiscards(struct netif *ni); +void snmp_inc_iflist(void); +void snmp_dec_iflist(void); + +/* ARP (for atTable and ipNetToMediaTable) */ +void snmp_insert_arpidx_tree(struct netif *ni, ip_addr_t *ip); +void snmp_delete_arpidx_tree(struct netif *ni, ip_addr_t *ip); + +/* IP */ +void snmp_inc_ipinreceives(void); +void snmp_inc_ipinhdrerrors(void); +void snmp_inc_ipinaddrerrors(void); +void snmp_inc_ipforwdatagrams(void); +void snmp_inc_ipinunknownprotos(void); +void snmp_inc_ipindiscards(void); +void snmp_inc_ipindelivers(void); +void snmp_inc_ipoutrequests(void); +void snmp_inc_ipoutdiscards(void); +void snmp_inc_ipoutnoroutes(void); +void snmp_inc_ipreasmreqds(void); +void snmp_inc_ipreasmoks(void); +void snmp_inc_ipreasmfails(void); +void snmp_inc_ipfragoks(void); +void snmp_inc_ipfragfails(void); +void snmp_inc_ipfragcreates(void); +void snmp_inc_iproutingdiscards(void); +void snmp_insert_ipaddridx_tree(struct netif *ni); +void snmp_delete_ipaddridx_tree(struct netif *ni); +void snmp_insert_iprteidx_tree(u8_t dflt, struct netif *ni); +void snmp_delete_iprteidx_tree(u8_t dflt, struct netif *ni); + +/* ICMP */ +void snmp_inc_icmpinmsgs(void); +void snmp_inc_icmpinerrors(void); +void snmp_inc_icmpindestunreachs(void); +void snmp_inc_icmpintimeexcds(void); +void snmp_inc_icmpinparmprobs(void); +void snmp_inc_icmpinsrcquenchs(void); +void snmp_inc_icmpinredirects(void); +void snmp_inc_icmpinechos(void); +void snmp_inc_icmpinechoreps(void); +void snmp_inc_icmpintimestamps(void); +void snmp_inc_icmpintimestampreps(void); +void snmp_inc_icmpinaddrmasks(void); +void snmp_inc_icmpinaddrmaskreps(void); +void snmp_inc_icmpoutmsgs(void); +void snmp_inc_icmpouterrors(void); +void snmp_inc_icmpoutdestunreachs(void); +void snmp_inc_icmpouttimeexcds(void); +void snmp_inc_icmpoutparmprobs(void); +void snmp_inc_icmpoutsrcquenchs(void); +void snmp_inc_icmpoutredirects(void); +void snmp_inc_icmpoutechos(void); +void snmp_inc_icmpoutechoreps(void); +void snmp_inc_icmpouttimestamps(void); +void snmp_inc_icmpouttimestampreps(void); +void snmp_inc_icmpoutaddrmasks(void); +void snmp_inc_icmpoutaddrmaskreps(void); + +/* TCP */ +void snmp_inc_tcpactiveopens(void); +void snmp_inc_tcppassiveopens(void); +void snmp_inc_tcpattemptfails(void); +void snmp_inc_tcpestabresets(void); +void snmp_inc_tcpinsegs(void); +void snmp_inc_tcpoutsegs(void); +void snmp_inc_tcpretranssegs(void); +void snmp_inc_tcpinerrs(void); +void snmp_inc_tcpoutrsts(void); + +/* UDP */ +void snmp_inc_udpindatagrams(void); +void snmp_inc_udpnoports(void); +void snmp_inc_udpinerrors(void); +void snmp_inc_udpoutdatagrams(void); +void snmp_insert_udpidx_tree(struct udp_pcb *pcb); +void snmp_delete_udpidx_tree(struct udp_pcb *pcb); + +/* SNMP */ +void snmp_inc_snmpinpkts(void); +void snmp_inc_snmpoutpkts(void); +void snmp_inc_snmpinbadversions(void); +void snmp_inc_snmpinbadcommunitynames(void); +void snmp_inc_snmpinbadcommunityuses(void); +void snmp_inc_snmpinasnparseerrs(void); +void snmp_inc_snmpintoobigs(void); +void snmp_inc_snmpinnosuchnames(void); +void snmp_inc_snmpinbadvalues(void); +void snmp_inc_snmpinreadonlys(void); +void snmp_inc_snmpingenerrs(void); +void snmp_add_snmpintotalreqvars(u8_t value); +void snmp_add_snmpintotalsetvars(u8_t value); +void snmp_inc_snmpingetrequests(void); +void snmp_inc_snmpingetnexts(void); +void snmp_inc_snmpinsetrequests(void); +void snmp_inc_snmpingetresponses(void); +void snmp_inc_snmpintraps(void); +void snmp_inc_snmpouttoobigs(void); +void snmp_inc_snmpoutnosuchnames(void); +void snmp_inc_snmpoutbadvalues(void); +void snmp_inc_snmpoutgenerrs(void); +void snmp_inc_snmpoutgetrequests(void); +void snmp_inc_snmpoutgetnexts(void); +void snmp_inc_snmpoutsetrequests(void); +void snmp_inc_snmpoutgetresponses(void); +void snmp_inc_snmpouttraps(void); +void snmp_get_snmpgrpid_ptr(struct snmp_obj_id **oid); +void snmp_set_snmpenableauthentraps(u8_t *value); +void snmp_get_snmpenableauthentraps(u8_t *value); + +/* LWIP_SNMP support not available */ +/* define everything to be empty */ +#else + +/* system */ +#define snmp_set_sysdesr(str, len) +#define snmp_set_sysobjid(oid); +#define snmp_get_sysobjid_ptr(oid) +#define snmp_inc_sysuptime() +#define snmp_add_sysuptime(value) +#define snmp_get_sysuptime(value) +#define snmp_set_syscontact(ocstr, ocstrlen); +#define snmp_set_sysname(ocstr, ocstrlen); +#define snmp_set_syslocation(ocstr, ocstrlen); + +/* network interface */ +#define snmp_add_ifinoctets(ni,value) +#define snmp_inc_ifinucastpkts(ni) +#define snmp_inc_ifinnucastpkts(ni) +#define snmp_inc_ifindiscards(ni) +#define snmp_add_ifoutoctets(ni,value) +#define snmp_inc_ifoutucastpkts(ni) +#define snmp_inc_ifoutnucastpkts(ni) +#define snmp_inc_ifoutdiscards(ni) +#define snmp_inc_iflist() +#define snmp_dec_iflist() + +/* ARP */ +#define snmp_insert_arpidx_tree(ni,ip) +#define snmp_delete_arpidx_tree(ni,ip) + +/* IP */ +#define snmp_inc_ipinreceives() +#define snmp_inc_ipinhdrerrors() +#define snmp_inc_ipinaddrerrors() +#define snmp_inc_ipforwdatagrams() +#define snmp_inc_ipinunknownprotos() +#define snmp_inc_ipindiscards() +#define snmp_inc_ipindelivers() +#define snmp_inc_ipoutrequests() +#define snmp_inc_ipoutdiscards() +#define snmp_inc_ipoutnoroutes() +#define snmp_inc_ipreasmreqds() +#define snmp_inc_ipreasmoks() +#define snmp_inc_ipreasmfails() +#define snmp_inc_ipfragoks() +#define snmp_inc_ipfragfails() +#define snmp_inc_ipfragcreates() +#define snmp_inc_iproutingdiscards() +#define snmp_insert_ipaddridx_tree(ni) +#define snmp_delete_ipaddridx_tree(ni) +#define snmp_insert_iprteidx_tree(dflt, ni) +#define snmp_delete_iprteidx_tree(dflt, ni) + +/* ICMP */ +#define snmp_inc_icmpinmsgs() +#define snmp_inc_icmpinerrors() +#define snmp_inc_icmpindestunreachs() +#define snmp_inc_icmpintimeexcds() +#define snmp_inc_icmpinparmprobs() +#define snmp_inc_icmpinsrcquenchs() +#define snmp_inc_icmpinredirects() +#define snmp_inc_icmpinechos() +#define snmp_inc_icmpinechoreps() +#define snmp_inc_icmpintimestamps() +#define snmp_inc_icmpintimestampreps() +#define snmp_inc_icmpinaddrmasks() +#define snmp_inc_icmpinaddrmaskreps() +#define snmp_inc_icmpoutmsgs() +#define snmp_inc_icmpouterrors() +#define snmp_inc_icmpoutdestunreachs() +#define snmp_inc_icmpouttimeexcds() +#define snmp_inc_icmpoutparmprobs() +#define snmp_inc_icmpoutsrcquenchs() +#define snmp_inc_icmpoutredirects() +#define snmp_inc_icmpoutechos() +#define snmp_inc_icmpoutechoreps() +#define snmp_inc_icmpouttimestamps() +#define snmp_inc_icmpouttimestampreps() +#define snmp_inc_icmpoutaddrmasks() +#define snmp_inc_icmpoutaddrmaskreps() +/* TCP */ +#define snmp_inc_tcpactiveopens() +#define snmp_inc_tcppassiveopens() +#define snmp_inc_tcpattemptfails() +#define snmp_inc_tcpestabresets() +#define snmp_inc_tcpinsegs() +#define snmp_inc_tcpoutsegs() +#define snmp_inc_tcpretranssegs() +#define snmp_inc_tcpinerrs() +#define snmp_inc_tcpoutrsts() + +/* UDP */ +#define snmp_inc_udpindatagrams() +#define snmp_inc_udpnoports() +#define snmp_inc_udpinerrors() +#define snmp_inc_udpoutdatagrams() +#define snmp_insert_udpidx_tree(pcb) +#define snmp_delete_udpidx_tree(pcb) + +/* SNMP */ +#define snmp_inc_snmpinpkts() +#define snmp_inc_snmpoutpkts() +#define snmp_inc_snmpinbadversions() +#define snmp_inc_snmpinbadcommunitynames() +#define snmp_inc_snmpinbadcommunityuses() +#define snmp_inc_snmpinasnparseerrs() +#define snmp_inc_snmpintoobigs() +#define snmp_inc_snmpinnosuchnames() +#define snmp_inc_snmpinbadvalues() +#define snmp_inc_snmpinreadonlys() +#define snmp_inc_snmpingenerrs() +#define snmp_add_snmpintotalreqvars(value) +#define snmp_add_snmpintotalsetvars(value) +#define snmp_inc_snmpingetrequests() +#define snmp_inc_snmpingetnexts() +#define snmp_inc_snmpinsetrequests() +#define snmp_inc_snmpingetresponses() +#define snmp_inc_snmpintraps() +#define snmp_inc_snmpouttoobigs() +#define snmp_inc_snmpoutnosuchnames() +#define snmp_inc_snmpoutbadvalues() +#define snmp_inc_snmpoutgenerrs() +#define snmp_inc_snmpoutgetrequests() +#define snmp_inc_snmpoutgetnexts() +#define snmp_inc_snmpoutsetrequests() +#define snmp_inc_snmpoutgetresponses() +#define snmp_inc_snmpouttraps() +#define snmp_get_snmpgrpid_ptr(oid) +#define snmp_set_snmpenableauthentraps(value) +#define snmp_get_snmpenableauthentraps(value) + +#endif /* LWIP_SNMP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_SNMP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_asn1.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_asn1.h new file mode 100644 index 0000000..605fa3f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_asn1.h @@ -0,0 +1,101 @@ +/** + * @file + * Abstract Syntax Notation One (ISO 8824, 8825) codec. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_ASN1_H__ +#define __LWIP_SNMP_ASN1_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/snmp.h" + +#if LWIP_SNMP + +#ifdef __cplusplus +extern "C" { +#endif + +#define SNMP_ASN1_UNIV (0) /* (!0x80 | !0x40) */ +#define SNMP_ASN1_APPLIC (0x40) /* (!0x80 | 0x40) */ +#define SNMP_ASN1_CONTXT (0x80) /* ( 0x80 | !0x40) */ + +#define SNMP_ASN1_CONSTR (0x20) /* ( 0x20) */ +#define SNMP_ASN1_PRIMIT (0) /* (!0x20) */ + +/* universal tags */ +#define SNMP_ASN1_INTEG 2 +#define SNMP_ASN1_OC_STR 4 +#define SNMP_ASN1_NUL 5 +#define SNMP_ASN1_OBJ_ID 6 +#define SNMP_ASN1_SEQ 16 + +/* application specific (SNMP) tags */ +#define SNMP_ASN1_IPADDR 0 /* octet string size(4) */ +#define SNMP_ASN1_COUNTER 1 /* u32_t */ +#define SNMP_ASN1_GAUGE 2 /* u32_t */ +#define SNMP_ASN1_TIMETICKS 3 /* u32_t */ +#define SNMP_ASN1_OPAQUE 4 /* octet string */ + +/* context specific (SNMP) tags */ +#define SNMP_ASN1_PDU_GET_REQ 0 +#define SNMP_ASN1_PDU_GET_NEXT_REQ 1 +#define SNMP_ASN1_PDU_GET_RESP 2 +#define SNMP_ASN1_PDU_SET_REQ 3 +#define SNMP_ASN1_PDU_TRAP 4 + +err_t snmp_asn1_dec_type(struct pbuf *p, u16_t ofs, u8_t *type); +err_t snmp_asn1_dec_length(struct pbuf *p, u16_t ofs, u8_t *octets_used, u16_t *length); +err_t snmp_asn1_dec_u32t(struct pbuf *p, u16_t ofs, u16_t len, u32_t *value); +err_t snmp_asn1_dec_s32t(struct pbuf *p, u16_t ofs, u16_t len, s32_t *value); +err_t snmp_asn1_dec_oid(struct pbuf *p, u16_t ofs, u16_t len, struct snmp_obj_id *oid); +err_t snmp_asn1_dec_raw(struct pbuf *p, u16_t ofs, u16_t len, u16_t raw_len, u8_t *raw); + +void snmp_asn1_enc_length_cnt(u16_t length, u8_t *octets_needed); +void snmp_asn1_enc_u32t_cnt(u32_t value, u16_t *octets_needed); +void snmp_asn1_enc_s32t_cnt(s32_t value, u16_t *octets_needed); +void snmp_asn1_enc_oid_cnt(u8_t ident_len, s32_t *ident, u16_t *octets_needed); +err_t snmp_asn1_enc_type(struct pbuf *p, u16_t ofs, u8_t type); +err_t snmp_asn1_enc_length(struct pbuf *p, u16_t ofs, u16_t length); +err_t snmp_asn1_enc_u32t(struct pbuf *p, u16_t ofs, u16_t octets_needed, u32_t value); +err_t snmp_asn1_enc_s32t(struct pbuf *p, u16_t ofs, u16_t octets_needed, s32_t value); +err_t snmp_asn1_enc_oid(struct pbuf *p, u16_t ofs, u8_t ident_len, s32_t *ident); +err_t snmp_asn1_enc_raw(struct pbuf *p, u16_t ofs, u16_t raw_len, u8_t *raw); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_ASN1_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_msg.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_msg.h new file mode 100644 index 0000000..1183e3a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_msg.h @@ -0,0 +1,315 @@ +/** + * @file + * SNMP Agent message handling structures. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_MSG_H__ +#define __LWIP_SNMP_MSG_H__ + +#include "lwip/opt.h" +#include "lwip/snmp.h" +#include "lwip/snmp_structs.h" +#include "lwip/ip_addr.h" +#include "lwip/err.h" + +#if LWIP_SNMP + +#if SNMP_PRIVATE_MIB +/* When using a private MIB, you have to create a file 'private_mib.h' that contains + * a 'struct mib_array_node mib_private' which contains your MIB. */ +#include "private_mib.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* The listen port of the SNMP agent. Clients have to make their requests to + this port. Most standard clients won't work if you change this! */ +#ifndef SNMP_IN_PORT +#define SNMP_IN_PORT 161 +#endif +/* The remote port the SNMP agent sends traps to. Most standard trap sinks won't + work if you change this! */ +#ifndef SNMP_TRAP_PORT +#define SNMP_TRAP_PORT 162 +#endif + +#define SNMP_ES_NOERROR 0 +#define SNMP_ES_TOOBIG 1 +#define SNMP_ES_NOSUCHNAME 2 +#define SNMP_ES_BADVALUE 3 +#define SNMP_ES_READONLY 4 +#define SNMP_ES_GENERROR 5 + +#define SNMP_GENTRAP_COLDSTART 0 +#define SNMP_GENTRAP_WARMSTART 1 +#define SNMP_GENTRAP_AUTHFAIL 4 +#define SNMP_GENTRAP_ENTERPRISESPC 6 + +struct snmp_varbind +{ + /* next pointer, NULL for last in list */ + struct snmp_varbind *next; + /* previous pointer, NULL for first in list */ + struct snmp_varbind *prev; + + /* object identifier length (in s32_t) */ + u8_t ident_len; + /* object identifier array */ + s32_t *ident; + + /* object value ASN1 type */ + u8_t value_type; + /* object value length (in u8_t) */ + u8_t value_len; + /* object value */ + void *value; + + /* encoding varbind seq length length */ + u8_t seqlenlen; + /* encoding object identifier length length */ + u8_t olenlen; + /* encoding object value length length */ + u8_t vlenlen; + /* encoding varbind seq length */ + u16_t seqlen; + /* encoding object identifier length */ + u16_t olen; + /* encoding object value length */ + u16_t vlen; +}; + +struct snmp_varbind_root +{ + struct snmp_varbind *head; + struct snmp_varbind *tail; + /* number of variable bindings in list */ + u8_t count; + /* encoding varbind-list seq length length */ + u8_t seqlenlen; + /* encoding varbind-list seq length */ + u16_t seqlen; +}; + +/** output response message header length fields */ +struct snmp_resp_header_lengths +{ + /* encoding error-index length length */ + u8_t erridxlenlen; + /* encoding error-status length length */ + u8_t errstatlenlen; + /* encoding request id length length */ + u8_t ridlenlen; + /* encoding pdu length length */ + u8_t pdulenlen; + /* encoding community length length */ + u8_t comlenlen; + /* encoding version length length */ + u8_t verlenlen; + /* encoding sequence length length */ + u8_t seqlenlen; + + /* encoding error-index length */ + u16_t erridxlen; + /* encoding error-status length */ + u16_t errstatlen; + /* encoding request id length */ + u16_t ridlen; + /* encoding pdu length */ + u16_t pdulen; + /* encoding community length */ + u16_t comlen; + /* encoding version length */ + u16_t verlen; + /* encoding sequence length */ + u16_t seqlen; +}; + +/** output response message header length fields */ +struct snmp_trap_header_lengths +{ + /* encoding timestamp length length */ + u8_t tslenlen; + /* encoding specific-trap length length */ + u8_t strplenlen; + /* encoding generic-trap length length */ + u8_t gtrplenlen; + /* encoding agent-addr length length */ + u8_t aaddrlenlen; + /* encoding enterprise-id length length */ + u8_t eidlenlen; + /* encoding pdu length length */ + u8_t pdulenlen; + /* encoding community length length */ + u8_t comlenlen; + /* encoding version length length */ + u8_t verlenlen; + /* encoding sequence length length */ + u8_t seqlenlen; + + /* encoding timestamp length */ + u16_t tslen; + /* encoding specific-trap length */ + u16_t strplen; + /* encoding generic-trap length */ + u16_t gtrplen; + /* encoding agent-addr length */ + u16_t aaddrlen; + /* encoding enterprise-id length */ + u16_t eidlen; + /* encoding pdu length */ + u16_t pdulen; + /* encoding community length */ + u16_t comlen; + /* encoding version length */ + u16_t verlen; + /* encoding sequence length */ + u16_t seqlen; +}; + +/* Accepting new SNMP messages. */ +#define SNMP_MSG_EMPTY 0 +/* Search for matching object for variable binding. */ +#define SNMP_MSG_SEARCH_OBJ 1 +/* Perform SNMP operation on in-memory object. + Pass-through states, for symmetry only. */ +#define SNMP_MSG_INTERNAL_GET_OBJDEF 2 +#define SNMP_MSG_INTERNAL_GET_VALUE 3 +#define SNMP_MSG_INTERNAL_SET_TEST 4 +#define SNMP_MSG_INTERNAL_GET_OBJDEF_S 5 +#define SNMP_MSG_INTERNAL_SET_VALUE 6 +/* Perform SNMP operation on object located externally. + In theory this could be used for building a proxy agent. + Practical use is for an enterprise spc. app. gateway. */ +#define SNMP_MSG_EXTERNAL_GET_OBJDEF 7 +#define SNMP_MSG_EXTERNAL_GET_VALUE 8 +#define SNMP_MSG_EXTERNAL_SET_TEST 9 +#define SNMP_MSG_EXTERNAL_GET_OBJDEF_S 10 +#define SNMP_MSG_EXTERNAL_SET_VALUE 11 + +#define SNMP_COMMUNITY_STR_LEN 64 +struct snmp_msg_pstat +{ + /* lwIP local port (161) binding */ + struct udp_pcb *pcb; + /* source IP address */ + ip_addr_t sip; + /* source UDP port */ + u16_t sp; + /* request type */ + u8_t rt; + /* request ID */ + s32_t rid; + /* error status */ + s32_t error_status; + /* error index */ + s32_t error_index; + /* community name (zero terminated) */ + u8_t community[SNMP_COMMUNITY_STR_LEN + 1]; + /* community string length (exclusive zero term) */ + u8_t com_strlen; + /* one out of MSG_EMPTY, MSG_DEMUX, MSG_INTERNAL, MSG_EXTERNAL_x */ + u8_t state; + /* saved arguments for MSG_EXTERNAL_x */ + struct mib_external_node *ext_mib_node; + struct snmp_name_ptr ext_name_ptr; + struct obj_def ext_object_def; + struct snmp_obj_id ext_oid; + /* index into input variable binding list */ + u8_t vb_idx; + /* ptr into input variable binding list */ + struct snmp_varbind *vb_ptr; + /* list of variable bindings from input */ + struct snmp_varbind_root invb; + /* list of variable bindings to output */ + struct snmp_varbind_root outvb; + /* output response lengths used in ASN encoding */ + struct snmp_resp_header_lengths rhl; +}; + +struct snmp_msg_trap +{ + /* lwIP local port (161) binding */ + struct udp_pcb *pcb; + /* destination IP address in network order */ + ip_addr_t dip; + + /* source enterprise ID (sysObjectID) */ + struct snmp_obj_id *enterprise; + /* source IP address, raw network order format */ + u8_t sip_raw[4]; + /* generic trap code */ + u32_t gen_trap; + /* specific trap code */ + u32_t spc_trap; + /* timestamp */ + u32_t ts; + /* list of variable bindings to output */ + struct snmp_varbind_root outvb; + /* output trap lengths used in ASN encoding */ + struct snmp_trap_header_lengths thl; +}; + +/** Agent Version constant, 0 = v1 oddity */ +extern const s32_t snmp_version; +/** Agent default "public" community string */ +extern const char snmp_publiccommunity[7]; + +extern struct snmp_msg_trap trap_msg; + +/** Agent setup, start listening to port 161. */ +void snmp_init(void); +void snmp_trap_dst_enable(u8_t dst_idx, u8_t enable); +void snmp_trap_dst_ip_set(u8_t dst_idx, ip_addr_t *dst); + +/** Varbind-list functions. */ +struct snmp_varbind* snmp_varbind_alloc(struct snmp_obj_id *oid, u8_t type, u8_t len); +void snmp_varbind_free(struct snmp_varbind *vb); +void snmp_varbind_list_free(struct snmp_varbind_root *root); +void snmp_varbind_tail_add(struct snmp_varbind_root *root, struct snmp_varbind *vb); +struct snmp_varbind* snmp_varbind_tail_remove(struct snmp_varbind_root *root); + +/** Handle an internal (recv) or external (private response) event. */ +void snmp_msg_event(u8_t request_id); +err_t snmp_send_response(struct snmp_msg_pstat *m_stat); +err_t snmp_send_trap(s8_t generic_trap, struct snmp_obj_id *eoid, s32_t specific_trap); +void snmp_coldstart_trap(void); +void snmp_authfail_trap(void); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_MSG_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_structs.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_structs.h new file mode 100644 index 0000000..0d3b46a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/snmp_structs.h @@ -0,0 +1,268 @@ +/** + * @file + * Generic MIB tree structures. + * + * @todo namespace prefixes + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_STRUCTS_H__ +#define __LWIP_SNMP_STRUCTS_H__ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/snmp.h" + +#if SNMP_PRIVATE_MIB +/* When using a private MIB, you have to create a file 'private_mib.h' that contains + * a 'struct mib_array_node mib_private' which contains your MIB. */ +#include "private_mib.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* MIB object instance */ +#define MIB_OBJECT_NONE 0 +#define MIB_OBJECT_SCALAR 1 +#define MIB_OBJECT_TAB 2 + +/* MIB access types */ +#define MIB_ACCESS_READ 1 +#define MIB_ACCESS_WRITE 2 + +/* MIB object access */ +#define MIB_OBJECT_READ_ONLY MIB_ACCESS_READ +#define MIB_OBJECT_READ_WRITE (MIB_ACCESS_READ | MIB_ACCESS_WRITE) +#define MIB_OBJECT_WRITE_ONLY MIB_ACCESS_WRITE +#define MIB_OBJECT_NOT_ACCESSIBLE 0 + +/** object definition returned by (get_object_def)() */ +struct obj_def +{ + /* MIB_OBJECT_NONE (0), MIB_OBJECT_SCALAR (1), MIB_OBJECT_TAB (2) */ + u8_t instance; + /* 0 read-only, 1 read-write, 2 write-only, 3 not-accessible */ + u8_t access; + /* ASN type for this object */ + u8_t asn_type; + /* value length (host length) */ + u16_t v_len; + /* length of instance part of supplied object identifier */ + u8_t id_inst_len; + /* instance part of supplied object identifier */ + s32_t *id_inst_ptr; +}; + +struct snmp_name_ptr +{ + u8_t ident_len; + s32_t *ident; +}; + +/** MIB const scalar (.0) node */ +#define MIB_NODE_SC 0x01 +/** MIB const array node */ +#define MIB_NODE_AR 0x02 +/** MIB array node (mem_malloced from RAM) */ +#define MIB_NODE_RA 0x03 +/** MIB list root node (mem_malloced from RAM) */ +#define MIB_NODE_LR 0x04 +/** MIB node for external objects */ +#define MIB_NODE_EX 0x05 + +/** node "base class" layout, the mandatory fields for a node */ +struct mib_node +{ + /** returns struct obj_def for the given object identifier */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + /** returns object value for the given object identifier, + @note the caller must allocate at least len bytes for the value */ + void (*get_value)(struct obj_def *od, u16_t len, void *value); + /** tests length and/or range BEFORE setting */ + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + /** sets object value, only to be called when set_test() */ + void (*set_value)(struct obj_def *od, u16_t len, void *value); + /** One out of MIB_NODE_AR, MIB_NODE_LR or MIB_NODE_EX */ + u8_t node_type; + /* array or max list length */ + u16_t maxlength; +}; + +/** derived node for scalars .0 index */ +typedef struct mib_node mib_scalar_node; + +/** derived node, points to a fixed size const array + of sub-identifiers plus a 'child' pointer */ +struct mib_array_node +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* additional struct members */ + const s32_t *objid; + struct mib_node* const *nptr; +}; + +/** derived node, points to a fixed size mem_malloced array + of sub-identifiers plus a 'child' pointer */ +struct mib_ram_array_node +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* aditional struct members */ + s32_t *objid; + struct mib_node **nptr; +}; + +struct mib_list_node +{ + struct mib_list_node *prev; + struct mib_list_node *next; + s32_t objid; + struct mib_node *nptr; +}; + +/** derived node, points to a doubly linked list + of sub-identifiers plus a 'child' pointer */ +struct mib_list_rootnode +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* additional struct members */ + struct mib_list_node *head; + struct mib_list_node *tail; + /* counts list nodes in list */ + u16_t count; +}; + +/** derived node, has access functions for mib object in external memory or device + using 'tree_level' and 'idx', with a range 0 .. (level_length() - 1) */ +struct mib_external_node +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* additional struct members */ + /** points to an external (in memory) record of some sort of addressing + information, passed to and interpreted by the funtions below */ + void* addr_inf; + /** tree levels under this node */ + u8_t tree_levels; + /** number of objects at this level */ + u16_t (*level_length)(void* addr_inf, u8_t level); + /** compares object sub identifier with external id + return zero when equal, nonzero when unequal */ + s32_t (*ident_cmp)(void* addr_inf, u8_t level, u16_t idx, s32_t sub_id); + void (*get_objid)(void* addr_inf, u8_t level, u16_t idx, s32_t *sub_id); + + /** async Questions */ + void (*get_object_def_q)(void* addr_inf, u8_t rid, u8_t ident_len, s32_t *ident); + void (*get_value_q)(u8_t rid, struct obj_def *od); + void (*set_test_q)(u8_t rid, struct obj_def *od); + void (*set_value_q)(u8_t rid, struct obj_def *od, u16_t len, void *value); + /** async Answers */ + void (*get_object_def_a)(u8_t rid, u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + u8_t (*set_test_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + void (*set_value_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + /** async Panic Close (agent returns error reply, + e.g. used for external transaction cleanup) */ + void (*get_object_def_pc)(u8_t rid, u8_t ident_len, s32_t *ident); + void (*get_value_pc)(u8_t rid, struct obj_def *od); + void (*set_test_pc)(u8_t rid, struct obj_def *od); + void (*set_value_pc)(u8_t rid, struct obj_def *od); +}; + +/** export MIB tree from mib2.c */ +extern const struct mib_array_node internet; + +/** dummy function pointers for non-leaf MIB nodes from mib2.c */ +void noleafs_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +void noleafs_get_value(struct obj_def *od, u16_t len, void *value); +u8_t noleafs_set_test(struct obj_def *od, u16_t len, void *value); +void noleafs_set_value(struct obj_def *od, u16_t len, void *value); + +void snmp_oidtoip(s32_t *ident, ip_addr_t *ip); +void snmp_iptooid(ip_addr_t *ip, s32_t *ident); +void snmp_ifindextonetif(s32_t ifindex, struct netif **netif); +void snmp_netiftoifindex(struct netif *netif, s32_t *ifidx); + +struct mib_list_node* snmp_mib_ln_alloc(s32_t id); +void snmp_mib_ln_free(struct mib_list_node *ln); +struct mib_list_rootnode* snmp_mib_lrn_alloc(void); +void snmp_mib_lrn_free(struct mib_list_rootnode *lrn); + +s8_t snmp_mib_node_insert(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **insn); +s8_t snmp_mib_node_find(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **fn); +struct mib_list_rootnode *snmp_mib_node_delete(struct mib_list_rootnode *rn, struct mib_list_node *n); + +struct mib_node* snmp_search_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_name_ptr *np); +struct mib_node* snmp_expand_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret); +u8_t snmp_iso_prefix_tst(u8_t ident_len, s32_t *ident); +u8_t snmp_iso_prefix_expand(u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_STRUCTS_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sntp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sntp.h new file mode 100644 index 0000000..d6018ae --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sntp.h @@ -0,0 +1,60 @@ +#ifndef LWIP_SNTP_H +#define LWIP_SNTP_H + +#include "lwip/opt.h" +#include "lwip/ip_addr.h" + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** The maximum number of SNTP servers that can be set */ +#ifndef SNTP_MAX_SERVERS +#define SNTP_MAX_SERVERS 3 +#endif + +/** Set this to 1 to implement the callback function called by dhcp when + * NTP servers are received. */ +#ifndef SNTP_GET_SERVERS_FROM_DHCP +#define SNTP_GET_SERVERS_FROM_DHCP 0//LWIP_DHCP_GET_NTP_SRV +#endif + +/* Set this to 1 to support DNS names (or IP address strings) to set sntp servers */ +#ifndef SNTP_SERVER_DNS +#define SNTP_SERVER_DNS 1 +#endif + +bool sntp_get_timetype(void); +void sntp_set_receive_time_size(void); +/** One server address/name can be defined as default if SNTP_SERVER_DNS == 1: + * #define SNTP_SERVER_ADDRESS "pool.ntp.org" + */ +uint64 sntp_get_current_timestamp(); +char* sntp_get_real_time(long t); + +void sntp_init(void); +void sntp_stop(void); + +sint8 sntp_get_timezone(void); +bool sntp_set_timezone(sint8 timezone); +void sntp_setserver(u8_t idx, ip_addr_t *addr); +ip_addr_t sntp_getserver(u8_t idx); + +#if SNTP_SERVER_DNS +void sntp_setservername(u8_t idx, char *server); +char *sntp_getservername(u8_t idx); +#endif /* SNTP_SERVER_DNS */ + +#if SNTP_GET_SERVERS_FROM_DHCP +void sntp_servermode_dhcp(int set_servers_from_dhcp); +#else /* SNTP_GET_SERVERS_FROM_DHCP */ +#define sntp_servermode_dhcp(x) +#endif /* SNTP_GET_SERVERS_FROM_DHCP */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNTP_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sockets.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sockets.h new file mode 100644 index 0000000..3c8fed2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sockets.h @@ -0,0 +1,376 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + +#ifndef __LWIP_SOCKETS_H__ +#define __LWIP_SOCKETS_H__ + +#include "lwip/opt.h" + +#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/ip_addr.h" +#include "lwip/inet.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* members are in network byte order */ +struct sockaddr_in { + u8_t sin_len; + u8_t sin_family; + u16_t sin_port; + struct in_addr sin_addr; + char sin_zero[8]; +}; + +struct sockaddr { + u8_t sa_len; + u8_t sa_family; + char sa_data[14]; +}; + +#ifndef socklen_t +# define socklen_t u32_t +#endif + +/* Socket protocol types (TCP/UDP/RAW) */ +#define SOCK_STREAM 1 +#define SOCK_DGRAM 2 +#define SOCK_RAW 3 + +/* + * Option flags per-socket. These must match the SOF_ flags in ip.h (checked in init.c) + */ +#define SO_DEBUG 0x0001 /* Unimplemented: turn on debugging info recording */ +#define SO_ACCEPTCONN 0x0002 /* socket has had listen() */ +#define SO_REUSEADDR 0x0004 /* Allow local address reuse */ +#define SO_KEEPALIVE 0x0008 /* keep connections alive */ +#define SO_DONTROUTE 0x0010 /* Unimplemented: just use interface addresses */ +#define SO_BROADCAST 0x0020 /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */ +#define SO_USELOOPBACK 0x0040 /* Unimplemented: bypass hardware when possible */ +#define SO_LINGER 0x0080 /* linger on close if data present */ +#define SO_OOBINLINE 0x0100 /* Unimplemented: leave received OOB data in line */ +#define SO_REUSEPORT 0x0200 /* Unimplemented: allow local address & port reuse */ + +#define SO_DONTLINGER ((int)(~SO_LINGER)) + +/* + * Additional options, not kept in so_options. + */ +#define SO_SNDBUF 0x1001 /* Unimplemented: send buffer size */ +#define SO_RCVBUF 0x1002 /* receive buffer size */ +#define SO_SNDLOWAT 0x1003 /* Unimplemented: send low-water mark */ +#define SO_RCVLOWAT 0x1004 /* Unimplemented: receive low-water mark */ +#define SO_SNDTIMEO 0x1005 /* Unimplemented: send timeout */ +#define SO_RCVTIMEO 0x1006 /* receive timeout */ +#define SO_ERROR 0x1007 /* get error status and clear */ +#define SO_TYPE 0x1008 /* get socket type */ +#define SO_CONTIMEO 0x1009 /* Unimplemented: connect timeout */ +#define SO_NO_CHECK 0x100a /* don't create UDP checksum */ + + +/* + * Structure used for manipulating linger option. + */ +struct linger { + int l_onoff; /* option on/off */ + int l_linger; /* linger time */ +}; + +/* + * Level number for (get/set)sockopt() to apply to socket itself. + */ +#define SOL_SOCKET 0xfff /* options for socket level */ + + +#define AF_UNSPEC 0 +#define AF_INET 2 +#define PF_INET AF_INET +#define PF_UNSPEC AF_UNSPEC + +#define IPPROTO_IP 0 +#define IPPROTO_TCP 6 +#define IPPROTO_UDP 17 +#define IPPROTO_UDPLITE 136 + +/* Flags we can use with send and recv. */ +#define MSG_PEEK 0x01 /* Peeks at an incoming message */ +#define MSG_WAITALL 0x02 /* Unimplemented: Requests that the function block until the full amount of data requested can be returned */ +#define MSG_OOB 0x04 /* Unimplemented: Requests out-of-band data. The significance and semantics of out-of-band data are protocol-specific */ +#define MSG_DONTWAIT 0x08 /* Nonblocking i/o for this operation only */ +#define MSG_MORE 0x10 /* Sender will send more */ + + +/* + * Options for level IPPROTO_IP + */ +#define IP_TOS 1 +#define IP_TTL 2 + +#if LWIP_TCP +/* + * Options for level IPPROTO_TCP + */ +#define TCP_NODELAY 0x01 /* don't delay send to coalesce packets */ +#define TCP_KEEPALIVE 0x02 /* send KEEPALIVE probes when idle for pcb->keep_idle milliseconds */ +#define TCP_KEEPIDLE 0x03 /* set pcb->keep_idle - Same as TCP_KEEPALIVE, but use seconds for get/setsockopt */ +#define TCP_KEEPINTVL 0x04 /* set pcb->keep_intvl - Use seconds for get/setsockopt */ +#define TCP_KEEPCNT 0x05 /* set pcb->keep_cnt - Use number of probes sent for get/setsockopt */ +#endif /* LWIP_TCP */ + +#if LWIP_UDP && LWIP_UDPLITE +/* + * Options for level IPPROTO_UDPLITE + */ +#define UDPLITE_SEND_CSCOV 0x01 /* sender checksum coverage */ +#define UDPLITE_RECV_CSCOV 0x02 /* minimal receiver checksum coverage */ +#endif /* LWIP_UDP && LWIP_UDPLITE*/ + + +#if LWIP_IGMP +/* + * Options and types for UDP multicast traffic handling + */ +#define IP_ADD_MEMBERSHIP 3 +#define IP_DROP_MEMBERSHIP 4 +#define IP_MULTICAST_TTL 5 +#define IP_MULTICAST_IF 6 +#define IP_MULTICAST_LOOP 7 + +typedef struct ip_mreq { + struct in_addr imr_multiaddr; /* IP multicast address of group */ + struct in_addr imr_interface; /* local IP address of interface */ +} ip_mreq; +#endif /* LWIP_IGMP */ + +/* + * The Type of Service provides an indication of the abstract + * parameters of the quality of service desired. These parameters are + * to be used to guide the selection of the actual service parameters + * when transmitting a datagram through a particular network. Several + * networks offer service precedence, which somehow treats high + * precedence traffic as more important than other traffic (generally + * by accepting only traffic above a certain precedence at time of high + * load). The major choice is a three way tradeoff between low-delay, + * high-reliability, and high-throughput. + * The use of the Delay, Throughput, and Reliability indications may + * increase the cost (in some sense) of the service. In many networks + * better performance for one of these parameters is coupled with worse + * performance on another. Except for very unusual cases at most two + * of these three indications should be set. + */ +#define IPTOS_TOS_MASK 0x1E +#define IPTOS_TOS(tos) ((tos) & IPTOS_TOS_MASK) +#define IPTOS_LOWDELAY 0x10 +#define IPTOS_THROUGHPUT 0x08 +#define IPTOS_RELIABILITY 0x04 +#define IPTOS_LOWCOST 0x02 +#define IPTOS_MINCOST IPTOS_LOWCOST + +/* + * The Network Control precedence designation is intended to be used + * within a network only. The actual use and control of that + * designation is up to each network. The Internetwork Control + * designation is intended for use by gateway control originators only. + * If the actual use of these precedence designations is of concern to + * a particular network, it is the responsibility of that network to + * control the access to, and use of, those precedence designations. + */ +#define IPTOS_PREC_MASK 0xe0 +#define IPTOS_PREC(tos) ((tos) & IPTOS_PREC_MASK) +#define IPTOS_PREC_NETCONTROL 0xe0 +#define IPTOS_PREC_INTERNETCONTROL 0xc0 +#define IPTOS_PREC_CRITIC_ECP 0xa0 +#define IPTOS_PREC_FLASHOVERRIDE 0x80 +#define IPTOS_PREC_FLASH 0x60 +#define IPTOS_PREC_IMMEDIATE 0x40 +#define IPTOS_PREC_PRIORITY 0x20 +#define IPTOS_PREC_ROUTINE 0x00 + + +/* + * Commands for ioctlsocket(), taken from the BSD file fcntl.h. + * lwip_ioctl only supports FIONREAD and FIONBIO, for now + * + * Ioctl's have the command encoded in the lower word, + * and the size of any in or out parameters in the upper + * word. The high 2 bits of the upper word are used + * to encode the in/out status of the parameter; for now + * we restrict parameters to at most 128 bytes. + */ +#if !defined(FIONREAD) || !defined(FIONBIO) +#define IOCPARM_MASK 0x7fU /* parameters must be < 128 bytes */ +#define IOC_VOID 0x20000000UL /* no parameters */ +#define IOC_OUT 0x40000000UL /* copy out parameters */ +#define IOC_IN 0x80000000UL /* copy in parameters */ +#define IOC_INOUT (IOC_IN|IOC_OUT) + /* 0x20000000 distinguishes new & + old ioctl's */ +#define _IO(x,y) (IOC_VOID|((x)<<8)|(y)) + +#define _IOR(x,y,t) (IOC_OUT|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) + +#define _IOW(x,y,t) (IOC_IN|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) +#endif /* !defined(FIONREAD) || !defined(FIONBIO) */ + +#ifndef FIONREAD +#define FIONREAD _IOR('f', 127, unsigned long) /* get # bytes to read */ +#endif +#ifndef FIONBIO +#define FIONBIO _IOW('f', 126, unsigned long) /* set/clear non-blocking i/o */ +#endif + +/* Socket I/O Controls: unimplemented */ +#ifndef SIOCSHIWAT +#define SIOCSHIWAT _IOW('s', 0, unsigned long) /* set high watermark */ +#define SIOCGHIWAT _IOR('s', 1, unsigned long) /* get high watermark */ +#define SIOCSLOWAT _IOW('s', 2, unsigned long) /* set low watermark */ +#define SIOCGLOWAT _IOR('s', 3, unsigned long) /* get low watermark */ +#define SIOCATMARK _IOR('s', 7, unsigned long) /* at oob mark? */ +#endif + +/* commands for fnctl */ +#ifndef F_GETFL +#define F_GETFL 3 +#endif +#ifndef F_SETFL +#define F_SETFL 4 +#endif + +/* File status flags and file access modes for fnctl, + these are bits in an int. */ +#ifndef O_NONBLOCK +#define O_NONBLOCK 1 /* nonblocking I/O */ +#endif +#ifndef O_NDELAY +#define O_NDELAY 1 /* same as O_NONBLOCK, for compatibility */ +#endif + +#ifndef SHUT_RD + #define SHUT_RD 0 + #define SHUT_WR 1 + #define SHUT_RDWR 2 +#endif + +/* FD_SET used for lwip_select */ +#ifndef FD_SET + #undef FD_SETSIZE + /* Make FD_SETSIZE match NUM_SOCKETS in socket.c */ + #define FD_SETSIZE MEMP_NUM_NETCONN + #define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7))) + #define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7))) + #define FD_ISSET(n,p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7))) + #define FD_ZERO(p) memset((void*)(p),0,sizeof(*(p))) + + typedef struct fd_set { + unsigned char fd_bits [(FD_SETSIZE+7)/8]; + } fd_set; + +#endif /* FD_SET */ + +/** LWIP_TIMEVAL_PRIVATE: if you want to use the struct timeval provided + * by your system, set this to 0 and include in cc.h */ +#ifndef LWIP_TIMEVAL_PRIVATE +#define LWIP_TIMEVAL_PRIVATE 1 +#endif + +#if LWIP_TIMEVAL_PRIVATE +struct timeval { + long tv_sec; /* seconds */ + long tv_usec; /* and microseconds */ +}; +#endif /* LWIP_TIMEVAL_PRIVATE */ + +void lwip_socket_init(void); + +int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen); +int lwip_bind(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_shutdown(int s, int how); +int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen); +int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen); +int lwip_close(int s); +int lwip_connect(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_listen(int s, int backlog); +int lwip_recv(int s, void *mem, size_t len, int flags); +int lwip_read(int s, void *mem, size_t len); +int lwip_recvfrom(int s, void *mem, size_t len, int flags, + struct sockaddr *from, socklen_t *fromlen); +int lwip_send(int s, const void *dataptr, size_t size, int flags); +int lwip_sendto(int s, const void *dataptr, size_t size, int flags, + const struct sockaddr *to, socklen_t tolen); +int lwip_socket(int domain, int type, int protocol); +int lwip_write(int s, const void *dataptr, size_t size); +int lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, + struct timeval *timeout); +int lwip_ioctl(int s, long cmd, void *argp); +int lwip_fcntl(int s, int cmd, int val); + +#if LWIP_COMPAT_SOCKETS +#define accept(a,b,c) lwip_accept(a,b,c) +#define bind(a,b,c) lwip_bind(a,b,c) +#define shutdown(a,b) lwip_shutdown(a,b) +#define closesocket(s) lwip_close(s) +#define connect(a,b,c) lwip_connect(a,b,c) +#define getsockname(a,b,c) lwip_getsockname(a,b,c) +#define getpeername(a,b,c) lwip_getpeername(a,b,c) +#define setsockopt(a,b,c,d,e) lwip_setsockopt(a,b,c,d,e) +#define getsockopt(a,b,c,d,e) lwip_getsockopt(a,b,c,d,e) +#define listen(a,b) lwip_listen(a,b) +#define recv(a,b,c,d) lwip_recv(a,b,c,d) +#define recvfrom(a,b,c,d,e,f) lwip_recvfrom(a,b,c,d,e,f) +#define send(a,b,c,d) lwip_send(a,b,c,d) +#define sendto(a,b,c,d,e,f) lwip_sendto(a,b,c,d,e,f) +#define socket(a,b,c) lwip_socket(a,b,c) +#define select(a,b,c,d,e) lwip_select(a,b,c,d,e) +#define ioctlsocket(a,b,c) lwip_ioctl(a,b,c) + +#if LWIP_POSIX_SOCKETS_IO_NAMES +#define read(a,b,c) lwip_read(a,b,c) +#define write(a,b,c) lwip_write(a,b,c) +#define close(s) lwip_close(s) +#endif /* LWIP_POSIX_SOCKETS_IO_NAMES */ + +#endif /* LWIP_COMPAT_SOCKETS */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SOCKET */ + +#endif /* __LWIP_SOCKETS_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/stats.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/stats.h new file mode 100644 index 0000000..4388321 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/stats.h @@ -0,0 +1,292 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_STATS_H__ +#define __LWIP_STATS_H__ + +#include "lwip/opt.h" + +#include "lwip/mem.h" +#include "lwip/memp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if LWIP_STATS + +#ifndef LWIP_STATS_LARGE +#define LWIP_STATS_LARGE 0 +#endif + +#if LWIP_STATS_LARGE +#define STAT_COUNTER u32_t +#define STAT_COUNTER_F U32_F +#else +#define STAT_COUNTER u16_t +#define STAT_COUNTER_F U16_F +#endif + +struct stats_proto { + STAT_COUNTER xmit; /* Transmitted packets. */ + STAT_COUNTER recv; /* Received packets. */ + STAT_COUNTER fw; /* Forwarded packets. */ + STAT_COUNTER drop; /* Dropped packets. */ + STAT_COUNTER chkerr; /* Checksum error. */ + STAT_COUNTER lenerr; /* Invalid length error. */ + STAT_COUNTER memerr; /* Out of memory error. */ + STAT_COUNTER rterr; /* Routing error. */ + STAT_COUNTER proterr; /* Protocol error. */ + STAT_COUNTER opterr; /* Error in options. */ + STAT_COUNTER err; /* Misc error. */ + STAT_COUNTER cachehit; +}; + +struct stats_igmp { + STAT_COUNTER xmit; /* Transmitted packets. */ + STAT_COUNTER recv; /* Received packets. */ + STAT_COUNTER drop; /* Dropped packets. */ + STAT_COUNTER chkerr; /* Checksum error. */ + STAT_COUNTER lenerr; /* Invalid length error. */ + STAT_COUNTER memerr; /* Out of memory error. */ + STAT_COUNTER proterr; /* Protocol error. */ + STAT_COUNTER rx_v1; /* Received v1 frames. */ + STAT_COUNTER rx_group; /* Received group-specific queries. */ + STAT_COUNTER rx_general; /* Received general queries. */ + STAT_COUNTER rx_report; /* Received reports. */ + STAT_COUNTER tx_join; /* Sent joins. */ + STAT_COUNTER tx_leave; /* Sent leaves. */ + STAT_COUNTER tx_report; /* Sent reports. */ +}; + +struct stats_mem { +#ifdef LWIP_DEBUG + const char *name; +#endif /* LWIP_DEBUG */ + mem_size_t avail; + mem_size_t used; + mem_size_t max; + STAT_COUNTER err; + STAT_COUNTER illegal; +}; + +struct stats_syselem { + STAT_COUNTER used; + STAT_COUNTER max; + STAT_COUNTER err; +}; + +struct stats_sys { + struct stats_syselem sem; + struct stats_syselem mutex; + struct stats_syselem mbox; +}; + +struct stats_ { +#if LINK_STATS + struct stats_proto link; +#endif +#if ETHARP_STATS + struct stats_proto etharp; +#endif +#if IPFRAG_STATS + struct stats_proto ip_frag; +#endif +#if IP_STATS + struct stats_proto ip; +#endif +#if ICMP_STATS + struct stats_proto icmp; +#endif +#if IGMP_STATS + struct stats_igmp igmp; +#endif +#if UDP_STATS + struct stats_proto udp; +#endif +#if TCP_STATS + struct stats_proto tcp; +#endif +#if MEM_STATS + struct stats_mem mem; +#endif +#if MEMP_STATS + struct stats_mem memp[MEMP_MAX]; +#endif +#if SYS_STATS + struct stats_sys sys; +#endif +}; + +extern struct stats_ lwip_stats; + +void stats_init(void)ICACHE_FLASH_ATTR; + +#define STATS_INC(x) ++lwip_stats.x +#define STATS_DEC(x) --lwip_stats.x +#define STATS_INC_USED(x, y) do { lwip_stats.x.used += y; \ + if (lwip_stats.x.max < lwip_stats.x.used) { \ + lwip_stats.x.max = lwip_stats.x.used; \ + } \ + } while(0) +#else /* LWIP_STATS */ +#define stats_init() +#define STATS_INC(x) +#define STATS_DEC(x) +#define STATS_INC_USED(x) +#endif /* LWIP_STATS */ + +#if TCP_STATS +#define TCP_STATS_INC(x) STATS_INC(x) +#define TCP_STATS_DISPLAY() stats_display_proto(&lwip_stats.tcp, "TCP") +#else +#define TCP_STATS_INC(x) +#define TCP_STATS_DISPLAY() +#endif + +#if UDP_STATS +#define UDP_STATS_INC(x) STATS_INC(x) +#define UDP_STATS_DISPLAY() stats_display_proto(&lwip_stats.udp, "UDP") +#else +#define UDP_STATS_INC(x) +#define UDP_STATS_DISPLAY() +#endif + +#if ICMP_STATS +#define ICMP_STATS_INC(x) STATS_INC(x) +#define ICMP_STATS_DISPLAY() stats_display_proto(&lwip_stats.icmp, "ICMP") +#else +#define ICMP_STATS_INC(x) +#define ICMP_STATS_DISPLAY() +#endif + +#if IGMP_STATS +#define IGMP_STATS_INC(x) STATS_INC(x) +#define IGMP_STATS_DISPLAY() stats_display_igmp(&lwip_stats.igmp) +#else +#define IGMP_STATS_INC(x) +#define IGMP_STATS_DISPLAY() +#endif + +#if IP_STATS +#define IP_STATS_INC(x) STATS_INC(x) +#define IP_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip, "IP") +#else +#define IP_STATS_INC(x) +#define IP_STATS_DISPLAY() +#endif + +#if IPFRAG_STATS +#define IPFRAG_STATS_INC(x) STATS_INC(x) +#define IPFRAG_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip_frag, "IP_FRAG") +#else +#define IPFRAG_STATS_INC(x) +#define IPFRAG_STATS_DISPLAY() +#endif + +#if ETHARP_STATS +#define ETHARP_STATS_INC(x) STATS_INC(x) +#define ETHARP_STATS_DISPLAY() stats_display_proto(&lwip_stats.etharp, "ETHARP") +#else +#define ETHARP_STATS_INC(x) +#define ETHARP_STATS_DISPLAY() +#endif + +#if LINK_STATS +#define LINK_STATS_INC(x) STATS_INC(x) +#define LINK_STATS_DISPLAY() stats_display_proto(&lwip_stats.link, "LINK") +#else +#define LINK_STATS_INC(x) +#define LINK_STATS_DISPLAY() +#endif + +#if MEM_STATS +#define MEM_STATS_AVAIL(x, y) lwip_stats.mem.x = y +#define MEM_STATS_INC(x) STATS_INC(mem.x) +#define MEM_STATS_INC_USED(x, y) STATS_INC_USED(mem, y) +#define MEM_STATS_DEC_USED(x, y) lwip_stats.mem.x -= y +#define MEM_STATS_DISPLAY() stats_display_mem(&lwip_stats.mem, "HEAP") +#else +#define MEM_STATS_AVAIL(x, y) +#define MEM_STATS_INC(x) +#define MEM_STATS_INC_USED(x, y) +#define MEM_STATS_DEC_USED(x, y) +#define MEM_STATS_DISPLAY() +#endif + +#if MEMP_STATS +#define MEMP_STATS_AVAIL(x, i, y) lwip_stats.memp[i].x = y +#define MEMP_STATS_INC(x, i) STATS_INC(memp[i].x) +#define MEMP_STATS_DEC(x, i) STATS_DEC(memp[i].x) +#define MEMP_STATS_INC_USED(x, i) STATS_INC_USED(memp[i], 1) +#define MEMP_STATS_DISPLAY(i) stats_display_memp(&lwip_stats.memp[i], i) +#else +#define MEMP_STATS_AVAIL(x, i, y) +#define MEMP_STATS_INC(x, i) +#define MEMP_STATS_DEC(x, i) +#define MEMP_STATS_INC_USED(x, i) +#define MEMP_STATS_DISPLAY(i) +#endif + +#if SYS_STATS +#define SYS_STATS_INC(x) STATS_INC(sys.x) +#define SYS_STATS_DEC(x) STATS_DEC(sys.x) +#define SYS_STATS_INC_USED(x) STATS_INC_USED(sys.x, 1) +#define SYS_STATS_DISPLAY() stats_display_sys(&lwip_stats.sys) +#else +#define SYS_STATS_INC(x) +#define SYS_STATS_DEC(x) +#define SYS_STATS_INC_USED(x) +#define SYS_STATS_DISPLAY() +#endif + +/* Display of statistics */ +#if LWIP_STATS_DISPLAY +void stats_display(void)ICACHE_FLASH_ATTR; +void stats_display_proto(struct stats_proto *proto, char *name)ICACHE_FLASH_ATTR; +void stats_display_igmp(struct stats_igmp *igmp)ICACHE_FLASH_ATTR; +void stats_display_mem(struct stats_mem *mem, char *name)ICACHE_FLASH_ATTR; +void stats_display_memp(struct stats_mem *mem, int index)ICACHE_FLASH_ATTR; +void stats_display_sys(struct stats_sys *sys)ICACHE_FLASH_ATTR; +#else /* LWIP_STATS_DISPLAY */ +#define stats_display() +#define stats_display_proto(proto, name) +#define stats_display_igmp(igmp) +#define stats_display_mem(mem, name) +#define stats_display_memp(mem, index) +#define stats_display_sys(sys) +#endif /* LWIP_STATS_DISPLAY */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_STATS_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sys.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sys.h new file mode 100644 index 0000000..31a9dea --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/sys.h @@ -0,0 +1,337 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_SYS_H__ +#define __LWIP_SYS_H__ + +#include "lwip/opt.h" + +#include "eagle_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if NO_SYS + +/* For a totally minimal and standalone system, we provide null + definitions of the sys_ functions. */ +typedef u8_t sys_sem_t; +typedef u8_t sys_mutex_t; +typedef u8_t sys_mbox_t; + +#define sys_sem_new(s, c) ERR_OK +#define sys_sem_signal(s) +#define sys_sem_wait(s) +#define sys_arch_sem_wait(s,t) +#define sys_sem_free(s) +#define sys_mutex_new(mu) ERR_OK +#define sys_mutex_lock(mu) +#define sys_mutex_unlock(mu) +#define sys_mutex_free(mu) +#define sys_mbox_new(m, s) ERR_OK +#define sys_mbox_fetch(m,d) +#define sys_mbox_tryfetch(m,d) +#define sys_mbox_post(m,d) +#define sys_mbox_trypost(m,d) +#define sys_mbox_free(m) + +#define sys_thread_new(n,t,a,s,p) + +#define sys_msleep(t) + +#else /* NO_SYS */ + +/** Return code for timeouts from sys_arch_mbox_fetch and sys_arch_sem_wait */ +#define SYS_ARCH_TIMEOUT 0xffffffffUL + +/** sys_mbox_tryfetch() returns SYS_MBOX_EMPTY if appropriate. + * For now we use the same magic value, but we allow this to change in future. + */ +#define SYS_MBOX_EMPTY SYS_ARCH_TIMEOUT + +#include "lwip/err.h" +#include "arch/sys_arch.h" + +/** Function prototype for thread functions */ +typedef void (*lwip_thread_fn)(void *arg); + +/* Function prototypes for functions to be implemented by platform ports + (in sys_arch.c) */ + +/* Mutex functions: */ + +/** Define LWIP_COMPAT_MUTEX if the port has no mutexes and binary semaphores + should be used instead */ +#if LWIP_COMPAT_MUTEX +/* for old ports that don't have mutexes: define them to binary semaphores */ +#define sys_mutex_t sys_sem_t +#define sys_mutex_new(mutex) sys_sem_new(mutex, 1) +#define sys_mutex_lock(mutex) sys_sem_wait(mutex) +#define sys_mutex_unlock(mutex) sys_sem_signal(mutex) +#define sys_mutex_free(mutex) sys_sem_free(mutex) +#define sys_mutex_valid(mutex) sys_sem_valid(mutex) +#define sys_mutex_set_invalid(mutex) sys_sem_set_invalid(mutex) + +#else /* LWIP_COMPAT_MUTEX */ + +/** Create a new mutex + * @param mutex pointer to the mutex to create + * @return a new mutex */ +err_t sys_mutex_new(sys_mutex_t *mutex); +/** Lock a mutex + * @param mutex the mutex to lock */ +void sys_mutex_lock(sys_mutex_t *mutex); +/** Unlock a mutex + * @param mutex the mutex to unlock */ +void sys_mutex_unlock(sys_mutex_t *mutex); +/** Delete a semaphore + * @param mutex the mutex to delete */ +void sys_mutex_free(sys_mutex_t *mutex); +#ifndef sys_mutex_valid +/** Check if a mutex is valid/allocated: return 1 for valid, 0 for invalid */ +int sys_mutex_valid(sys_mutex_t *mutex); +#endif +#ifndef sys_mutex_set_invalid +/** Set a mutex invalid so that sys_mutex_valid returns 0 */ +void sys_mutex_set_invalid(sys_mutex_t *mutex); +#endif +#endif /* LWIP_COMPAT_MUTEX */ + +/* Semaphore functions: */ + +/** Create a new semaphore + * @param sem pointer to the semaphore to create + * @param count initial count of the semaphore + * @return ERR_OK if successful, another err_t otherwise */ +err_t sys_sem_new(sys_sem_t *sem, u8_t count); +/** Signals a semaphore + * @param sem the semaphore to signal */ +void sys_sem_signal(sys_sem_t *sem); +/** Wait for a semaphore for the specified timeout + * @param sem the semaphore to wait for + * @param timeout timeout in milliseconds to wait (0 = wait forever) + * @return time (in milliseconds) waited for the semaphore + * or SYS_ARCH_TIMEOUT on timeout */ +u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout); +/** Delete a semaphore + * @param sem semaphore to delete */ +void sys_sem_free(sys_sem_t *sem); +/** Wait for a semaphore - forever/no timeout */ +#define sys_sem_wait(sem) sys_arch_sem_wait(sem, 0) +#ifndef sys_sem_valid +/** Check if a sempahore is valid/allocated: return 1 for valid, 0 for invalid */ +int sys_sem_valid(sys_sem_t *sem); +#endif +#ifndef sys_sem_set_invalid +/** Set a semaphore invalid so that sys_sem_valid returns 0 */ +void sys_sem_set_invalid(sys_sem_t *sem); +#endif + +/* Time functions. */ +#ifndef sys_msleep +void sys_msleep(u32_t ms); /* only has a (close to) 1 jiffy resolution. */ +#endif + +/* Mailbox functions. */ + +/** Create a new mbox of specified size + * @param mbox pointer to the mbox to create + * @param size (miminum) number of messages in this mbox + * @return ERR_OK if successful, another err_t otherwise */ +err_t sys_mbox_new(sys_mbox_t *mbox, int size); +/** Post a message to an mbox - may not fail + * -> blocks if full, only used from tasks not from ISR + * @param mbox mbox to posts the message + * @param msg message to post (ATTENTION: can be NULL) */ +void sys_mbox_post(sys_mbox_t *mbox, void *msg); +/** Try to post a message to an mbox - may fail if full or ISR + * @param mbox mbox to posts the message + * @param msg message to post (ATTENTION: can be NULL) */ +err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg); +/** Wait for a new message to arrive in the mbox + * @param mbox mbox to get a message from + * @param msg pointer where the message is stored + * @param timeout maximum time (in milliseconds) to wait for a message + * @return time (in milliseconds) waited for a message, may be 0 if not waited + or SYS_ARCH_TIMEOUT on timeout + * The returned time has to be accurate to prevent timer jitter! */ +u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout); +/* Allow port to override with a macro, e.g. special timout for sys_arch_mbox_fetch() */ +#ifndef sys_arch_mbox_tryfetch +/** Wait for a new message to arrive in the mbox + * @param mbox mbox to get a message from + * @param msg pointer where the message is stored + * @param timeout maximum time (in milliseconds) to wait for a message + * @return 0 (milliseconds) if a message has been received + * or SYS_MBOX_EMPTY if the mailbox is empty */ +u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg); +#endif +/** For now, we map straight to sys_arch implementation. */ +#define sys_mbox_tryfetch(mbox, msg) sys_arch_mbox_tryfetch(mbox, msg) +/** Delete an mbox + * @param mbox mbox to delete */ +void sys_mbox_free(sys_mbox_t *mbox); +#define sys_mbox_fetch(mbox, msg) sys_arch_mbox_fetch(mbox, msg, 0) +#ifndef sys_mbox_valid +/** Check if an mbox is valid/allocated: return 1 for valid, 0 for invalid */ +int sys_mbox_valid(sys_mbox_t *mbox); +#endif +#ifndef sys_mbox_set_invalid +/** Set an mbox invalid so that sys_mbox_valid returns 0 */ +void sys_mbox_set_invalid(sys_mbox_t *mbox); +#endif + +/** The only thread function: + * Creates a new thread + * @param name human-readable name for the thread (used for debugging purposes) + * @param thread thread-function + * @param arg parameter passed to 'thread' + * @param stacksize stack size in bytes for the new thread (may be ignored by ports) + * @param prio priority of the new thread (may be ignored by ports) */ +sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg, int stacksize, int prio); + +#endif /* NO_SYS */ + +/* sys_init() must be called before anthing else. */ +void sys_init(void)ICACHE_FLASH_ATTR; + +#ifndef sys_jiffies +/** Ticks/jiffies since power up. */ +u32_t sys_jiffies(void)ICACHE_FLASH_ATTR; +#endif + +/** Returns the current time in milliseconds, + * may be the same as sys_jiffies or at least based on it. */ +static inline u32_t sys_now(void) ICACHE_FLASH_ATTR; +static inline u32_t sys_now(void) +{ + return NOW()/(TIMER_CLK_FREQ/1000); +} + +/* Critical Region Protection */ +/* These functions must be implemented in the sys_arch.c file. + In some implementations they can provide a more light-weight protection + mechanism than using semaphores. Otherwise semaphores can be used for + implementation */ +#ifndef SYS_ARCH_PROTECT +/** SYS_LIGHTWEIGHT_PROT + * define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection + * for certain critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#if SYS_LIGHTWEIGHT_PROT + +/** SYS_ARCH_DECL_PROTECT + * declare a protection variable. This macro will default to defining a variable of + * type sys_prot_t. If a particular port needs a different implementation, then + * this macro may be defined in sys_arch.h. + */ +#define SYS_ARCH_DECL_PROTECT(lev) sys_prot_t lev +/** SYS_ARCH_PROTECT + * Perform a "fast" protect. This could be implemented by + * disabling interrupts for an embedded system or by using a semaphore or + * mutex. The implementation should allow calling SYS_ARCH_PROTECT when + * already protected. The old protection level is returned in the variable + * "lev". This macro will default to calling the sys_arch_protect() function + * which should be implemented in sys_arch.c. If a particular port needs a + * different implementation, then this macro may be defined in sys_arch.h + */ +#define SYS_ARCH_PROTECT(lev) lev = sys_arch_protect() +/** SYS_ARCH_UNPROTECT + * Perform a "fast" set of the protection level to "lev". This could be + * implemented by setting the interrupt level to "lev" within the MACRO or by + * using a semaphore or mutex. This macro will default to calling the + * sys_arch_unprotect() function which should be implemented in + * sys_arch.c. If a particular port needs a different implementation, then + * this macro may be defined in sys_arch.h + */ +#define SYS_ARCH_UNPROTECT(lev) sys_arch_unprotect(lev) +sys_prot_t sys_arch_protect(void)ICACHE_FLASH_ATTR; +void sys_arch_unprotect(sys_prot_t pval)ICACHE_FLASH_ATTR; + +#else + +#define SYS_ARCH_DECL_PROTECT(lev) +#define SYS_ARCH_PROTECT(lev) lev = os_intr_lock() //fix by ives at 2014.3.24 +#define SYS_ARCH_UNPROTECT(lev) lev = os_intr_unlock() + +#endif /* SYS_LIGHTWEIGHT_PROT */ + +#endif /* SYS_ARCH_PROTECT */ + +/* + * Macros to set/get and increase/decrease variables in a thread-safe way. + * Use these for accessing variable that are used from more than one thread. + */ + +#ifndef SYS_ARCH_INC +#define SYS_ARCH_INC(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var += val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_INC */ + +#ifndef SYS_ARCH_DEC +#define SYS_ARCH_DEC(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var -= val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_DEC */ + +#ifndef SYS_ARCH_GET +#define SYS_ARCH_GET(var, ret) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + ret = var; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_GET */ + +#ifndef SYS_ARCH_SET +#define SYS_ARCH_SET(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var = val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_SET */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_SYS_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcp.h new file mode 100644 index 0000000..909ff9b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcp.h @@ -0,0 +1,377 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_TCP_H__ +#define __LWIP_TCP_H__ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/mem.h" +#include "lwip/pbuf.h" +#include "lwip/ip.h" +#include "lwip/icmp.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct tcp_pcb; + +/** Function prototype for tcp accept callback functions. Called when a new + * connection can be accepted on a listening pcb. + * + * @param arg Additional argument to pass to the callback function (@see tcp_arg()) + * @param newpcb The new connection pcb + * @param err An error code if there has been an error accepting. + * Only return ERR_ABRT if you have called tcp_abort from within the + * callback function! + */ +typedef err_t (*tcp_accept_fn)(void *arg, struct tcp_pcb *newpcb, err_t err); + +/** Function prototype for tcp receive callback functions. Called when data has + * been received. + * + * @param arg Additional argument to pass to the callback function (@see tcp_arg()) + * @param tpcb The connection pcb which received data + * @param p The received data (or NULL when the connection has been closed!) + * @param err An error code if there has been an error receiving + * Only return ERR_ABRT if you have called tcp_abort from within the + * callback function! + */ +typedef err_t (*tcp_recv_fn)(void *arg, struct tcp_pcb *tpcb, + struct pbuf *p, err_t err); + +/** Function prototype for tcp sent callback functions. Called when sent data has + * been acknowledged by the remote side. Use it to free corresponding resources. + * This also means that the pcb has now space available to send new data. + * + * @param arg Additional argument to pass to the callback function (@see tcp_arg()) + * @param tpcb The connection pcb for which data has been acknowledged + * @param len The amount of bytes acknowledged + * @return ERR_OK: try to send some data by calling tcp_output + * Only return ERR_ABRT if you have called tcp_abort from within the + * callback function! + */ +typedef err_t (*tcp_sent_fn)(void *arg, struct tcp_pcb *tpcb, + u16_t len); + +/** Function prototype for tcp poll callback functions. Called periodically as + * specified by @see tcp_poll. + * + * @param arg Additional argument to pass to the callback function (@see tcp_arg()) + * @param tpcb tcp pcb + * @return ERR_OK: try to send some data by calling tcp_output + * Only return ERR_ABRT if you have called tcp_abort from within the + * callback function! + */ +typedef err_t (*tcp_poll_fn)(void *arg, struct tcp_pcb *tpcb); + +/** Function prototype for tcp error callback functions. Called when the pcb + * receives a RST or is unexpectedly closed for any other reason. + * + * @note The corresponding pcb is already freed when this callback is called! + * + * @param arg Additional argument to pass to the callback function (@see tcp_arg()) + * @param err Error code to indicate why the pcb has been closed + * ERR_ABRT: aborted through tcp_abort or by a TCP timer + * ERR_RST: the connection was reset by the remote host + */ +typedef void (*tcp_err_fn)(void *arg, err_t err); + +/** Function prototype for tcp connected callback functions. Called when a pcb + * is connected to the remote side after initiating a connection attempt by + * calling tcp_connect(). + * + * @param arg Additional argument to pass to the callback function (@see tcp_arg()) + * @param tpcb The connection pcb which is connected + * @param err An unused error code, always ERR_OK currently ;-) TODO! + * Only return ERR_ABRT if you have called tcp_abort from within the + * callback function! + * + * @note When a connection attempt fails, the error callback is currently called! + */ +typedef err_t (*tcp_connected_fn)(void *arg, struct tcp_pcb *tpcb, err_t err); + +enum tcp_state { + CLOSED = 0, + LISTEN = 1, + SYN_SENT = 2, + SYN_RCVD = 3, + ESTABLISHED = 4, + FIN_WAIT_1 = 5, + FIN_WAIT_2 = 6, + CLOSE_WAIT = 7, + CLOSING = 8, + LAST_ACK = 9, + TIME_WAIT = 10 +}; + +#if LWIP_CALLBACK_API + /* Function to call when a listener has been connected. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb a new tcp_pcb that now is connected + * @param err an error argument (TODO: that is current always ERR_OK?) + * @return ERR_OK: accept the new connection, + * any other err_t abortsthe new connection + */ +#define DEF_ACCEPT_CALLBACK tcp_accept_fn accept; +#else /* LWIP_CALLBACK_API */ +#define DEF_ACCEPT_CALLBACK +#endif /* LWIP_CALLBACK_API */ + +/** + * members common to struct tcp_pcb and struct tcp_listen_pcb + */ +#define TCP_PCB_COMMON(type) \ + type *next; /* for the linked list */ \ + enum tcp_state state; /* TCP state */ \ + u8_t prio; \ + void *callback_arg; \ + /* the accept callback for listen- and normal pcbs, if LWIP_CALLBACK_API */ \ + DEF_ACCEPT_CALLBACK \ + /* ports are in host byte order */ \ + u16_t local_port + + +/* the TCP protocol control block */ +struct tcp_pcb { +/** common PCB members */ + IP_PCB; +/** protocol specific PCB members */ + TCP_PCB_COMMON(struct tcp_pcb); + + /* ports are in host byte order */ + u16_t remote_port; + + u8_t flags; +#define TF_ACK_DELAY ((u8_t)0x01U) /* Delayed ACK. */ +#define TF_ACK_NOW ((u8_t)0x02U) /* Immediate ACK. */ +#define TF_INFR ((u8_t)0x04U) /* In fast recovery. */ +#define TF_TIMESTAMP ((u8_t)0x08U) /* Timestamp option enabled */ +#define TF_RXCLOSED ((u8_t)0x10U) /* rx closed by tcp_shutdown */ +#define TF_FIN ((u8_t)0x20U) /* Connection was closed locally (FIN segment enqueued). */ +#define TF_NODELAY ((u8_t)0x40U) /* Disable Nagle algorithm */ +#define TF_NAGLEMEMERR ((u8_t)0x80U) /* nagle enabled, memerr, try to output to prevent delayed ACK to happen */ + + /* the rest of the fields are in host byte order + as we have to do some math with them */ + /* receiver variables */ + u32_t rcv_nxt; /* next seqno expected */ + u16_t rcv_wnd; /* receiver window available */ + u16_t rcv_ann_wnd; /* receiver window to announce */ + u32_t rcv_ann_right_edge; /* announced right edge of window */ + + /* Timers */ + u32_t tmr; + u8_t polltmr, pollinterval; + + /* Retransmission timer. */ + s16_t rtime; + + u16_t mss; /* maximum segment size */ + + /* RTT (round trip time) estimation variables */ + u32_t rttest; /* RTT estimate in 500ms ticks */ + u32_t rtseq; /* sequence number being timed */ + s16_t sa, sv; /* @todo document this */ + + s16_t rto; /* retransmission time-out */ + u8_t nrtx; /* number of retransmissions */ + + /* fast retransmit/recovery */ + u32_t lastack; /* Highest acknowledged seqno. */ + u8_t dupacks; + + /* congestion avoidance/control variables */ + u16_t cwnd; + u16_t ssthresh; + + /* sender variables */ + u32_t snd_nxt; /* next new seqno to be sent */ + u16_t snd_wnd; /* sender window */ + u32_t snd_wl1, snd_wl2; /* Sequence and acknowledgement numbers of last + window update. */ + u32_t snd_lbb; /* Sequence number of next byte to be buffered. */ + + u16_t acked; + + u16_t snd_buf; /* Available buffer space for sending (in bytes). */ +#define TCP_SNDQUEUELEN_OVERFLOW (0xffff-3) + u16_t snd_queuelen; /* Available buffer space for sending (in tcp_segs). */ + +#if TCP_OVERSIZE + /* Extra bytes available at the end of the last pbuf in unsent. */ + u16_t unsent_oversize; +#endif /* TCP_OVERSIZE */ + + /* These are ordered by sequence number: */ + struct tcp_seg *unsent; /* Unsent (queued) segments. */ + struct tcp_seg *unacked; /* Sent but unacknowledged segments. */ +#if TCP_QUEUE_OOSEQ + struct tcp_seg *ooseq; /* Received out of sequence segments. */ +#endif /* TCP_QUEUE_OOSEQ */ + + struct pbuf *refused_data; /* Data previously received but not yet taken by upper layer */ + +#if LWIP_CALLBACK_API + /* Function to be called when more send buffer space is available. */ + tcp_sent_fn sent; + /* Function to be called when (in-sequence) data has arrived. */ + tcp_recv_fn recv; + /* Function to be called when a connection has been set up. */ + tcp_connected_fn connected; + /* Function which is called periodically. */ + tcp_poll_fn poll; + /* Function to be called whenever a fatal error occurs. */ + tcp_err_fn errf; +#endif /* LWIP_CALLBACK_API */ + +#if LWIP_TCP_TIMESTAMPS + u32_t ts_lastacksent; + u32_t ts_recent; +#endif /* LWIP_TCP_TIMESTAMPS */ + + /* idle time before KEEPALIVE is sent */ + u32_t keep_idle; +#if LWIP_TCP_KEEPALIVE + u32_t keep_intvl; + u32_t keep_cnt; +#endif /* LWIP_TCP_KEEPALIVE */ + + /* Persist timer counter */ + u32_t persist_cnt; + /* Persist timer back-off */ + u8_t persist_backoff; + + /* KEEPALIVE counter */ + u8_t keep_cnt_sent; +}; + +struct tcp_pcb_listen { +/* Common members of all PCB types */ + IP_PCB; +/* Protocol specific PCB members */ + TCP_PCB_COMMON(struct tcp_pcb_listen); + +#if TCP_LISTEN_BACKLOG + u8_t backlog; + u8_t accepts_pending; +#endif /* TCP_LISTEN_BACKLOG */ +}; + +#if LWIP_EVENT_API + +enum lwip_event { + LWIP_EVENT_ACCEPT, + LWIP_EVENT_SENT, + LWIP_EVENT_RECV, + LWIP_EVENT_CONNECTED, + LWIP_EVENT_POLL, + LWIP_EVENT_ERR +}; + +err_t lwip_tcp_event(void *arg, struct tcp_pcb *pcb, + enum lwip_event, + struct pbuf *p, + u16_t size, + err_t err); + +#endif /* LWIP_EVENT_API */ + +/* Application program's interface: */ +struct tcp_pcb * tcp_new (void)ICACHE_FLASH_ATTR; + +void tcp_arg (struct tcp_pcb *pcb, void *arg) ICACHE_FLASH_ATTR; +void tcp_accept (struct tcp_pcb *pcb, tcp_accept_fn accept) ICACHE_FLASH_ATTR; +void tcp_recv (struct tcp_pcb *pcb, tcp_recv_fn recv) ICACHE_FLASH_ATTR; +void tcp_sent (struct tcp_pcb *pcb, tcp_sent_fn sent)ICACHE_FLASH_ATTR; +void tcp_poll (struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval)ICACHE_FLASH_ATTR; +void tcp_err (struct tcp_pcb *pcb, tcp_err_fn err)ICACHE_FLASH_ATTR; + +#define tcp_mss(pcb) (((pcb)->flags & TF_TIMESTAMP) ? ((pcb)->mss - 12) : (pcb)->mss) +#define tcp_sndbuf(pcb) ((pcb)->snd_buf) +#define tcp_sndqueuelen(pcb) ((pcb)->snd_queuelen) +#define tcp_nagle_disable(pcb) ((pcb)->flags |= TF_NODELAY) +#define tcp_nagle_enable(pcb) ((pcb)->flags &= ~TF_NODELAY) +#define tcp_nagle_disabled(pcb) (((pcb)->flags & TF_NODELAY) != 0) + +#if TCP_LISTEN_BACKLOG +#define tcp_accepted(pcb) do { \ + LWIP_ASSERT("pcb->state == LISTEN (called for wrong pcb?)", pcb->state == LISTEN); \ + (((struct tcp_pcb_listen *)(pcb))->accepts_pending--); } while(0) +#else /* TCP_LISTEN_BACKLOG */ +#define tcp_accepted(pcb) LWIP_ASSERT("pcb->state == LISTEN (called for wrong pcb?)", \ + pcb->state == LISTEN) +#endif /* TCP_LISTEN_BACKLOG */ + +void tcp_recved (struct tcp_pcb *pcb, u16_t len)ICACHE_FLASH_ATTR; +err_t tcp_bind (struct tcp_pcb *pcb, ip_addr_t *ipaddr, + u16_t port)ICACHE_FLASH_ATTR; +err_t tcp_connect (struct tcp_pcb *pcb, ip_addr_t *ipaddr, + u16_t port, tcp_connected_fn connected)ICACHE_FLASH_ATTR; + +struct tcp_pcb * tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog)ICACHE_FLASH_ATTR; +#define tcp_listen(pcb) tcp_listen_with_backlog(pcb, TCP_DEFAULT_LISTEN_BACKLOG) + +void tcp_abort (struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +err_t tcp_close (struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +err_t tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx)ICACHE_FLASH_ATTR; + +/* Flags for "apiflags" parameter in tcp_write */ +#define TCP_WRITE_FLAG_COPY 0x01 +#define TCP_WRITE_FLAG_MORE 0x02 + +err_t tcp_write (struct tcp_pcb *pcb, const void *dataptr, u16_t len, + u8_t apiflags)ICACHE_FLASH_ATTR; + +void tcp_setprio (struct tcp_pcb *pcb, u8_t prio)ICACHE_FLASH_ATTR; + +#define TCP_PRIO_MIN 1 +#define TCP_PRIO_NORMAL 64 +#define TCP_PRIO_MAX 127 + +extern err_t tcp_output(struct tcp_pcb *pcb); + + +const char* tcp_debug_state_str(enum tcp_state s)ICACHE_FLASH_ATTR; + + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_TCP */ + +#endif /* __LWIP_TCP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcp_impl.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcp_impl.h new file mode 100644 index 0000000..24ca8bb --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcp_impl.h @@ -0,0 +1,472 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_TCP_IMPL_H__ +#define __LWIP_TCP_IMPL_H__ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/tcp.h" +#include "lwip/sys.h" +#include "lwip/mem.h" +#include "lwip/pbuf.h" +#include "lwip/ip.h" +#include "lwip/icmp.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Functions for interfacing with TCP: */ + +/* Lower layer interface to TCP: */ +#define tcp_init() /* Compatibility define, no init needed. */ +void tcp_tmr (void)ICACHE_FLASH_ATTR; /* Must be called every + TCP_TMR_INTERVAL + ms. (Typically 250 ms). */ +/* It is also possible to call these two functions at the right + intervals (instead of calling tcp_tmr()). */ +void tcp_slowtmr (void)ICACHE_FLASH_ATTR; +void tcp_fasttmr (void)ICACHE_FLASH_ATTR; + + +/* Only used by IP to pass a TCP segment to TCP: */ +void tcp_input (struct pbuf *p, struct netif *inp)ICACHE_FLASH_ATTR; +/* Used within the TCP code only: */ +struct tcp_pcb * tcp_alloc (u8_t prio)ICACHE_FLASH_ATTR; +void tcp_abandon (struct tcp_pcb *pcb, int reset)ICACHE_FLASH_ATTR; +err_t tcp_send_empty_ack(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +void tcp_rexmit (struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +void tcp_rexmit_rto (struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +void tcp_rexmit_fast (struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; + +/** + * This is the Nagle algorithm: try to combine user data to send as few TCP + * segments as possible. Only send if + * - no previously transmitted data on the connection remains unacknowledged or + * - the TF_NODELAY flag is set (nagle algorithm turned off for this pcb) or + * - the only unsent segment is at least pcb->mss bytes long (or there is more + * than one unsent segment - with lwIP, this can happen although unsent->len < mss) + * - or if we are in fast-retransmit (TF_INFR) + */ +#define tcp_do_output_nagle(tpcb) ((((tpcb)->unacked == NULL) || \ + ((tpcb)->flags & (TF_NODELAY | TF_INFR)) || \ + (((tpcb)->unsent != NULL) && (((tpcb)->unsent->next != NULL) || \ + ((tpcb)->unsent->len >= (tpcb)->mss))) \ + ) ? 1 : 0) +#define tcp_output_nagle(tpcb) (tcp_do_output_nagle(tpcb) ? tcp_output(tpcb) : ERR_OK) + + +#define TCP_SEQ_LT(a,b) ((s32_t)((a)-(b)) < 0) +#define TCP_SEQ_LEQ(a,b) ((s32_t)((a)-(b)) <= 0) +#define TCP_SEQ_GT(a,b) ((s32_t)((a)-(b)) > 0) +#define TCP_SEQ_GEQ(a,b) ((s32_t)((a)-(b)) >= 0) +/* is b<=a<=c? */ +#if 0 /* see bug #10548 */ +#define TCP_SEQ_BETWEEN(a,b,c) ((c)-(b) >= (a)-(b)) +#endif +#define TCP_SEQ_BETWEEN(a,b,c) (TCP_SEQ_GEQ(a,b) && TCP_SEQ_LEQ(a,c)) +#define TCP_FIN 0x01U +#define TCP_SYN 0x02U +#define TCP_RST 0x04U +#define TCP_PSH 0x08U +#define TCP_ACK 0x10U +#define TCP_URG 0x20U +#define TCP_ECE 0x40U +#define TCP_CWR 0x80U + +#define TCP_FLAGS 0x3fU + +/* Length of the TCP header, excluding options. */ +#define TCP_HLEN 20 + +#ifndef TCP_TMR_INTERVAL +#define TCP_TMR_INTERVAL 125 /* The TCP timer interval in milliseconds. */ +#endif /* TCP_TMR_INTERVAL */ + +#ifndef TCP_FAST_INTERVAL +#define TCP_FAST_INTERVAL TCP_TMR_INTERVAL /* the fine grained timeout in milliseconds */ +#endif /* TCP_FAST_INTERVAL */ + +#ifndef TCP_SLOW_INTERVAL +#define TCP_SLOW_INTERVAL (2*TCP_TMR_INTERVAL) /* the coarse grained timeout in milliseconds */ +#endif /* TCP_SLOW_INTERVAL */ + +#define TCP_FIN_WAIT_TIMEOUT 20000 /* milliseconds */ +#define TCP_SYN_RCVD_TIMEOUT 20000 /* milliseconds */ + +#define TCP_OOSEQ_TIMEOUT 6U /* x RTO */ + +#ifndef TCP_MSL +#define TCP_MSL 60000UL /* The maximum segment lifetime in milliseconds */ +#endif + +/* Keepalive values, compliant with RFC 1122. Don't change this unless you know what you're doing */ +#ifndef TCP_KEEPIDLE_DEFAULT +#define TCP_KEEPIDLE_DEFAULT 120000UL /* Default KEEPALIVE timer in milliseconds */ +#endif + +#ifndef TCP_KEEPINTVL_DEFAULT +#define TCP_KEEPINTVL_DEFAULT 10000UL /* Default Time between KEEPALIVE probes in milliseconds */ +#endif + +#ifndef TCP_KEEPCNT_DEFAULT +#define TCP_KEEPCNT_DEFAULT 9U /* Default Counter for KEEPALIVE probes */ +#endif + +#define TCP_MAXIDLE TCP_KEEPCNT_DEFAULT * TCP_KEEPINTVL_DEFAULT /* Maximum KEEPALIVE probe time */ + +/* Fields are (of course) in network byte order. + * Some fields are converted to host byte order in tcp_input(). + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct tcp_hdr { + PACK_STRUCT_FIELD(u16_t src); //Դ�˿� + PACK_STRUCT_FIELD(u16_t dest); //Ŀ�Ķ˿� + PACK_STRUCT_FIELD(u32_t seqno); //��� + PACK_STRUCT_FIELD(u32_t ackno); //Ӧ����� + PACK_STRUCT_FIELD(u16_t _hdrlen_rsvd_flags);//�ײ�����+����λ+��־λ + PACK_STRUCT_FIELD(u16_t wnd); //���ڴ�С + PACK_STRUCT_FIELD(u16_t chksum); //У��� + PACK_STRUCT_FIELD(u16_t urgp); //����ָ�� +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define TCPH_OFFSET(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 8) +#define TCPH_HDRLEN(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 12) +#define TCPH_FLAGS(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) & TCP_FLAGS) + +#define TCPH_OFFSET_SET(phdr, offset) (phdr)->_hdrlen_rsvd_flags = htons(((offset) << 8) | TCPH_FLAGS(phdr)) +#define TCPH_HDRLEN_SET(phdr, len) (phdr)->_hdrlen_rsvd_flags = htons(((len) << 12) | TCPH_FLAGS(phdr)) +#define TCPH_FLAGS_SET(phdr, flags) (phdr)->_hdrlen_rsvd_flags = (((phdr)->_hdrlen_rsvd_flags & PP_HTONS((u16_t)(~(u16_t)(TCP_FLAGS)))) | htons(flags)) +#define TCPH_HDRLEN_FLAGS_SET(phdr, len, flags) (phdr)->_hdrlen_rsvd_flags = htons(((len) << 12) | (flags)) + +#define TCPH_SET_FLAG(phdr, flags ) (phdr)->_hdrlen_rsvd_flags = ((phdr)->_hdrlen_rsvd_flags | htons(flags)) +#define TCPH_UNSET_FLAG(phdr, flags) (phdr)->_hdrlen_rsvd_flags = htons(ntohs((phdr)->_hdrlen_rsvd_flags) | (TCPH_FLAGS(phdr) & ~(flags)) ) + +#define TCP_TCPLEN(seg) ((seg)->len + ((TCPH_FLAGS((seg)->tcphdr) & (TCP_FIN | TCP_SYN)) != 0)) + +/** Flags used on input processing, not on pcb->flags +*/ +#define TF_RESET (u8_t)0x08U /* Connection was reset. */ +#define TF_CLOSED (u8_t)0x10U /* Connection was sucessfully closed. */ +#define TF_GOT_FIN (u8_t)0x20U /* Connection was closed by the remote end. */ + + +#if LWIP_EVENT_API + +#define TCP_EVENT_ACCEPT(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_ACCEPT, NULL, 0, err) +#define TCP_EVENT_SENT(pcb,space,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_SENT, NULL, space, ERR_OK) +#define TCP_EVENT_RECV(pcb,p,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_RECV, (p), 0, (err)) +#define TCP_EVENT_CLOSED(pcb,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_RECV, NULL, 0, ERR_OK) +#define TCP_EVENT_CONNECTED(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_CONNECTED, NULL, 0, (err)) +#define TCP_EVENT_POLL(pcb,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_POLL, NULL, 0, ERR_OK) +#define TCP_EVENT_ERR(errf,arg,err) lwip_tcp_event((arg), NULL, \ + LWIP_EVENT_ERR, NULL, 0, (err)) + +#else /* LWIP_EVENT_API */ + +#define TCP_EVENT_ACCEPT(pcb,err,ret) \ + do { \ + if((pcb)->accept != NULL) \ + (ret) = (pcb)->accept((pcb)->callback_arg,(pcb),(err)); \ + else (ret) = ERR_ARG; \ + } while (0) + +#define TCP_EVENT_SENT(pcb,space,ret) \ + do { \ + if((pcb)->sent != NULL) \ + (ret) = (pcb)->sent((pcb)->callback_arg,(pcb),(space)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_RECV(pcb,p,err,ret) \ + do { \ + if((pcb)->recv != NULL) { \ + (ret) = (pcb)->recv((pcb)->callback_arg,(pcb),(p),(err));\ + } else { \ + (ret) = tcp_recv_null(NULL, (pcb), (p), (err)); \ + } \ + } while (0) + +#define TCP_EVENT_CLOSED(pcb,ret) \ + do { \ + if(((pcb)->recv != NULL)) { \ + (ret) = (pcb)->recv((pcb)->callback_arg,(pcb),NULL,ERR_OK);\ + } else { \ + (ret) = ERR_OK; \ + } \ + } while (0) + +#define TCP_EVENT_CONNECTED(pcb,err,ret) \ + do { \ + if((pcb)->connected != NULL) \ + (ret) = (pcb)->connected((pcb)->callback_arg,(pcb),(err)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_POLL(pcb,ret) \ + do { \ + if((pcb)->poll != NULL) \ + (ret) = (pcb)->poll((pcb)->callback_arg,(pcb)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_ERR(errf,arg,err) \ + do { \ + if((errf) != NULL) \ + (errf)((arg),(err)); \ + } while (0) + +#endif /* LWIP_EVENT_API */ + +/** Enabled extra-check for TCP_OVERSIZE if LWIP_DEBUG is enabled */ +#if TCP_OVERSIZE && defined(LWIP_DEBUG) +#define TCP_OVERSIZE_DBGCHECK 1 +#else +#define TCP_OVERSIZE_DBGCHECK 0 +#endif + +/** Don't generate checksum on copy if CHECKSUM_GEN_TCP is disabled */ +#define TCP_CHECKSUM_ON_COPY (LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_TCP) + +/* This structure represents a TCP segment on the unsent, unacked and ooseq queues */ +struct tcp_seg { + struct tcp_seg *next; /* used when putting segements on a queue */ + struct pbuf *p; /* buffer containing data + TCP header */ + void *dataptr; /* pointer to the TCP data in the pbuf */ + u16_t len; /* the TCP length of this segment */ +#if TCP_OVERSIZE_DBGCHECK + u16_t oversize_left; /* Extra bytes available at the end of the last + pbuf in unsent (used for asserting vs. + tcp_pcb.unsent_oversized only) */ +#endif /* TCP_OVERSIZE_DBGCHECK */ +#if TCP_CHECKSUM_ON_COPY + u16_t chksum; + u8_t chksum_swapped; +#endif /* TCP_CHECKSUM_ON_COPY */ + u8_t flags; +#define TF_SEG_OPTS_MSS (u8_t)0x01U /* Include MSS option. */ +#define TF_SEG_OPTS_TS (u8_t)0x02U /* Include timestamp option. */ +#define TF_SEG_DATA_CHECKSUMMED (u8_t)0x04U /* ALL data (not the header) is + checksummed into 'chksum' */ + struct tcp_hdr *tcphdr; /* the TCP header */ +}; + +#define LWIP_TCP_OPT_LENGTH(flags) \ + (flags & TF_SEG_OPTS_MSS ? 4 : 0) + \ + (flags & TF_SEG_OPTS_TS ? 12 : 0) + +/** This returns a TCP header option for MSS in an u32_t */ +#define TCP_BUILD_MSS_OPTION(x) (x) = PP_HTONL(((u32_t)2 << 24) | \ + ((u32_t)4 << 16) | \ + (((u32_t)TCP_MSS / 256) << 8) | \ + (TCP_MSS & 255)) + +/* Global variables: */ +extern struct tcp_pcb *tcp_input_pcb; +extern u32_t tcp_ticks; + +/* The TCP PCB lists. */ +union tcp_listen_pcbs_t { /* List of all TCP PCBs in LISTEN state. */ + struct tcp_pcb_listen *listen_pcbs; + struct tcp_pcb *pcbs; +}; +extern struct tcp_pcb *tcp_bound_pcbs; +extern union tcp_listen_pcbs_t tcp_listen_pcbs; +extern struct tcp_pcb *tcp_active_pcbs; /* List of all TCP PCBs that are in a + state in which they accept or send + data. */ +extern struct tcp_pcb *tcp_tw_pcbs; /* List of all TCP PCBs in TIME-WAIT. */ + +extern struct tcp_pcb *tcp_tmp_pcb; /* Only used for temporary storage. */ + +/* Axioms about the above lists: + 1) Every TCP PCB that is not CLOSED is in one of the lists. + 2) A PCB is only in one of the lists. + 3) All PCBs in the tcp_listen_pcbs list is in LISTEN state. + 4) All PCBs in the tcp_tw_pcbs list is in TIME-WAIT state. +*/ +/* Define two macros, TCP_REG and TCP_RMV that registers a TCP PCB + with a PCB list or removes a PCB from a list, respectively. */ +#ifndef TCP_DEBUG_PCB_LISTS +#define TCP_DEBUG_PCB_LISTS 0 +#endif +#if TCP_DEBUG_PCB_LISTS +#define TCP_REG(pcbs, npcb) do {\ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_REG %p local port %d\n", (npcb), (npcb)->local_port)); \ + for(tcp_tmp_pcb = *(pcbs); \ + tcp_tmp_pcb != NULL; \ + tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + LWIP_ASSERT("TCP_REG: already registered\n", tcp_tmp_pcb != (npcb)); \ + } \ + LWIP_ASSERT("TCP_REG: pcb->state != CLOSED", ((pcbs) == &tcp_bound_pcbs) || ((npcb)->state != CLOSED)); \ + (npcb)->next = *(pcbs); \ + LWIP_ASSERT("TCP_REG: npcb->next != npcb", (npcb)->next != (npcb)); \ + *(pcbs) = (npcb); \ + LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ + tcp_timer_needed(); \ + } while(0) +#define TCP_RMV(pcbs, npcb) do { \ + LWIP_ASSERT("TCP_RMV: pcbs != NULL", *(pcbs) != NULL); \ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removing %p from %p\n", (npcb), *(pcbs))); \ + if(*(pcbs) == (npcb)) { \ + *(pcbs) = (*pcbs)->next; \ + } else for(tcp_tmp_pcb = *(pcbs); tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + if(tcp_tmp_pcb->next == (npcb)) { \ + tcp_tmp_pcb->next = (npcb)->next; \ + break; \ + } \ + } \ + (npcb)->next = NULL; \ + LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removed %p from %p\n", (npcb), *(pcbs))); \ + } while(0) + +#else /* LWIP_DEBUG */ + +#define TCP_REG(pcbs, npcb) \ + do { \ + (npcb)->next = *pcbs; \ + *(pcbs) = (npcb); \ + tcp_timer_needed(); \ + } while (0) + +#define TCP_RMV(pcbs, npcb) \ + do { \ + if(*(pcbs) == (npcb)) { \ + (*(pcbs)) = (*pcbs)->next; \ + } \ + else { \ + for(tcp_tmp_pcb = *pcbs; \ + tcp_tmp_pcb != NULL; \ + tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + if(tcp_tmp_pcb->next == (npcb)) { \ + tcp_tmp_pcb->next = (npcb)->next; \ + break; \ + } \ + } \ + } \ + (npcb)->next = NULL; \ + } while(0) + +#endif /* LWIP_DEBUG */ + + +/* Internal functions: */ +struct tcp_pcb *tcp_pcb_copy(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +void tcp_pcb_purge(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; + +void tcp_segs_free(struct tcp_seg *seg)ICACHE_FLASH_ATTR; +void tcp_seg_free(struct tcp_seg *seg)ICACHE_FLASH_ATTR; +struct tcp_seg *tcp_seg_copy(struct tcp_seg *seg)ICACHE_FLASH_ATTR; + +#define tcp_ack(pcb) \ + do { \ + if((pcb)->flags & TF_ACK_DELAY) { \ + (pcb)->flags &= ~TF_ACK_DELAY; \ + (pcb)->flags |= TF_ACK_NOW; \ + } \ + else { \ + (pcb)->flags |= TF_ACK_DELAY; \ + } \ + } while (0) + +#define tcp_ack_now(pcb) \ + do { \ + (pcb)->flags |= TF_ACK_NOW; \ + } while (0) + +err_t tcp_send_fin(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +err_t tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)ICACHE_FLASH_ATTR; + +void tcp_rexmit_seg(struct tcp_pcb *pcb, struct tcp_seg *seg)ICACHE_FLASH_ATTR; + +void tcp_rst(u32_t seqno, u32_t ackno, + ip_addr_t *local_ip, ip_addr_t *remote_ip, + u16_t local_port, u16_t remote_port)ICACHE_FLASH_ATTR; + +u32_t tcp_next_iss(void)ICACHE_FLASH_ATTR; + +void tcp_keepalive(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +void tcp_zero_window_probe(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; + +#if TCP_CALCULATE_EFF_SEND_MSS +u16_t tcp_eff_send_mss(u16_t sendmss, ip_addr_t *addr)ICACHE_FLASH_ATTR; +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + +#if LWIP_CALLBACK_API +err_t tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)ICACHE_FLASH_ATTR; +#endif /* LWIP_CALLBACK_API */ + +#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG +void tcp_debug_print(struct tcp_hdr *tcphdr)ICACHE_FLASH_ATTR; +void tcp_debug_print_flags(u8_t flags)ICACHE_FLASH_ATTR; +void tcp_debug_print_state(enum tcp_state s)ICACHE_FLASH_ATTR; +void tcp_debug_print_pcbs(void)ICACHE_FLASH_ATTR; +s16_t tcp_pcbs_sane(void)ICACHE_FLASH_ATTR; +#else +# define tcp_debug_print(tcphdr) +# define tcp_debug_print_flags(flags) +# define tcp_debug_print_state(s) +# define tcp_debug_print_pcbs() +# define tcp_pcbs_sane() 1 +#endif /* TCP_DEBUG */ + +/** External function (implemented in timers.c), called when TCP detects + * that a timer is needed (i.e. active- or time-wait-pcb found). */ +void tcp_timer_needed(void)ICACHE_FLASH_ATTR; + + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_TCP */ + +#endif /* __LWIP_TCP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcpip.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcpip.h new file mode 100644 index 0000000..995ba8a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/tcpip.h @@ -0,0 +1,159 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_TCPIP_H__ +#define __LWIP_TCPIP_H__ + +#include "lwip/opt.h" + +#if !NO_SYS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/api_msg.h" +#include "lwip/netifapi.h" +#include "lwip/pbuf.h" +#include "lwip/api.h" +#include "lwip/sys.h" +#include "lwip/timers.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Define this to something that triggers a watchdog. This is called from + * tcpip_thread after processing a message. */ +#ifndef LWIP_TCPIP_THREAD_ALIVE +#define LWIP_TCPIP_THREAD_ALIVE() +#endif + +#if LWIP_TCPIP_CORE_LOCKING +/** The global semaphore to lock the stack. */ +extern sys_mutex_t lock_tcpip_core; +#define LOCK_TCPIP_CORE() sys_mutex_lock(&lock_tcpip_core) +#define UNLOCK_TCPIP_CORE() sys_mutex_unlock(&lock_tcpip_core) +#define TCPIP_APIMSG(m) tcpip_apimsg_lock(m) +#define TCPIP_APIMSG_ACK(m) +#define TCPIP_NETIFAPI(m) tcpip_netifapi_lock(m) +#define TCPIP_NETIFAPI_ACK(m) +#else /* LWIP_TCPIP_CORE_LOCKING */ +#define LOCK_TCPIP_CORE() +#define UNLOCK_TCPIP_CORE() +#define TCPIP_APIMSG(m) tcpip_apimsg(m) +#define TCPIP_APIMSG_ACK(m) sys_sem_signal(&m->conn->op_completed) +#define TCPIP_NETIFAPI(m) tcpip_netifapi(m) +#define TCPIP_NETIFAPI_ACK(m) sys_sem_signal(&m->sem) +#endif /* LWIP_TCPIP_CORE_LOCKING */ + +/** Function prototype for the init_done function passed to tcpip_init */ +typedef void (*tcpip_init_done_fn)(void *arg); +/** Function prototype for functions passed to tcpip_callback() */ +typedef void (*tcpip_callback_fn)(void *ctx); + +void tcpip_init(tcpip_init_done_fn tcpip_init_done, void *arg); + +#if LWIP_NETCONN +err_t tcpip_apimsg(struct api_msg *apimsg); +#if LWIP_TCPIP_CORE_LOCKING +err_t tcpip_apimsg_lock(struct api_msg *apimsg); +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETCONN */ + +err_t tcpip_input(struct pbuf *p, struct netif *inp); + +#if LWIP_NETIF_API +err_t tcpip_netifapi(struct netifapi_msg *netifapimsg); +#if LWIP_TCPIP_CORE_LOCKING +err_t tcpip_netifapi_lock(struct netifapi_msg *netifapimsg); +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETIF_API */ + +err_t tcpip_callback_with_block(tcpip_callback_fn function, void *ctx, u8_t block); +#define tcpip_callback(f, ctx) tcpip_callback_with_block(f, ctx, 1) + +/* free pbufs or heap memory from another context without blocking */ +err_t pbuf_free_callback(struct pbuf *p); +err_t mem_free_callback(void *m); + +#if LWIP_TCPIP_TIMEOUT +err_t tcpip_timeout(u32_t msecs, sys_timeout_handler h, void *arg); +err_t tcpip_untimeout(sys_timeout_handler h, void *arg); +#endif /* LWIP_TCPIP_TIMEOUT */ + +enum tcpip_msg_type { +#if LWIP_NETCONN + TCPIP_MSG_API, +#endif /* LWIP_NETCONN */ + TCPIP_MSG_INPKT, +#if LWIP_NETIF_API + TCPIP_MSG_NETIFAPI, +#endif /* LWIP_NETIF_API */ +#if LWIP_TCPIP_TIMEOUT + TCPIP_MSG_TIMEOUT, + TCPIP_MSG_UNTIMEOUT, +#endif /* LWIP_TCPIP_TIMEOUT */ + TCPIP_MSG_CALLBACK +}; + +struct tcpip_msg { + enum tcpip_msg_type type; + sys_sem_t *sem; + union { +#if LWIP_NETCONN + struct api_msg *apimsg; +#endif /* LWIP_NETCONN */ +#if LWIP_NETIF_API + struct netifapi_msg *netifapimsg; +#endif /* LWIP_NETIF_API */ + struct { + struct pbuf *p; + struct netif *netif; + } inp; + struct { + tcpip_callback_fn function; + void *ctx; + } cb; +#if LWIP_TCPIP_TIMEOUT + struct { + u32_t msecs; + sys_timeout_handler h; + void *arg; + } tmo; +#endif /* LWIP_TCPIP_TIMEOUT */ + } msg; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* !NO_SYS */ + +#endif /* __LWIP_TCPIP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/timers.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/timers.h new file mode 100644 index 0000000..e9db02a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/timers.h @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * Simon Goldschmidt + * + */ +#ifndef __LWIP_TIMERS_H__ +#define __LWIP_TIMERS_H__ + +#include "lwip/opt.h" + +/* Timers are not supported when NO_SYS==1 and NO_SYS_NO_TIMERS==1 */ +#define LWIP_TIMERS (!NO_SYS || (NO_SYS && !NO_SYS_NO_TIMERS)) + +#if LWIP_TIMERS + +#include "lwip/err.h" +#include "lwip/sys.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef LWIP_DEBUG_TIMERNAMES +#ifdef LWIP_DEBUG +#define LWIP_DEBUG_TIMERNAMES SYS_DEBUG +#else /* LWIP_DEBUG */ +#define LWIP_DEBUG_TIMERNAMES 0 +#endif /* LWIP_DEBUG*/ +#endif + +/** Function prototype for a timeout callback function. Register such a function + * using sys_timeout(). + * + * @param arg Additional argument to pass to the function - set up by sys_timeout() + */ +typedef void (* sys_timeout_handler)(void *arg); + +struct sys_timeo { + struct sys_timeo *next; + u32_t time; + sys_timeout_handler h; + void *arg; +#if LWIP_DEBUG_TIMERNAMES + const char* handler_name; +#endif /* LWIP_DEBUG_TIMERNAMES */ +}; + +void sys_timeouts_init(void)ICACHE_FLASH_ATTR; + +#if LWIP_DEBUG_TIMERNAMES +void sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char* handler_name)ICACHE_FLASH_ATTR; +#define sys_timeout(msecs, handler, arg) sys_timeout_debug(msecs, handler, arg, #handler) +#else /* LWIP_DEBUG_TIMERNAMES */ +void sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)ICACHE_FLASH_ATTR; +#endif /* LWIP_DEBUG_TIMERNAMES */ + +void sys_untimeout(sys_timeout_handler handler, void *arg)ICACHE_FLASH_ATTR; +#if NO_SYS +void sys_check_timeouts(void)ICACHE_FLASH_ATTR; +void sys_restart_timeouts(void)ICACHE_FLASH_ATTR; +#else /* NO_SYS */ +void sys_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg); +#endif /* NO_SYS */ + + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_TIMERS */ +#endif /* __LWIP_TIMERS_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwip/udp.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/udp.h new file mode 100644 index 0000000..cb53d33 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwip/udp.h @@ -0,0 +1,171 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_UDP_H__ +#define __LWIP_UDP_H__ + +#include "lwip/opt.h" + +#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/ip_addr.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define UDP_HLEN 8 + +/* Fields are (of course) in network byte order. */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct udp_hdr { + PACK_STRUCT_FIELD(u16_t src); + PACK_STRUCT_FIELD(u16_t dest); /* src/dest UDP ports */ + PACK_STRUCT_FIELD(u16_t len); + PACK_STRUCT_FIELD(u16_t chksum); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define UDP_FLAGS_NOCHKSUM 0x01U +#define UDP_FLAGS_UDPLITE 0x02U +#define UDP_FLAGS_CONNECTED 0x04U +#define UDP_FLAGS_MULTICAST_LOOP 0x08U + +struct udp_pcb; + +/** Function prototype for udp pcb receive callback functions + * addr and port are in same byte order as in the pcb + * The callback is responsible for freeing the pbuf + * if it's not used any more. + * + * ATTENTION: Be aware that 'addr' points into the pbuf 'p' so freeing this pbuf + * makes 'addr' invalid, too. + * + * @param arg user supplied argument (udp_pcb.recv_arg) + * @param pcb the udp_pcb which received data + * @param p the packet buffer that was received + * @param addr the remote IP address from which the packet was received + * @param port the remote port from which the packet was received + */ +typedef void (*udp_recv_fn)(void *arg, struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *addr, u16_t port); + + +struct udp_pcb { +/* Common members of all PCB types */ + IP_PCB; + +/* Protocol specific PCB members */ + + struct udp_pcb *next; + + u8_t flags; + /** ports are in host byte order */ + u16_t local_port, remote_port; + +#if LWIP_IGMP + /** outgoing network interface for multicast packets */ + ip_addr_t multicast_ip; +#endif /* LWIP_IGMP */ + +#if LWIP_UDPLITE + /** used for UDP_LITE only */ + u16_t chksum_len_rx, chksum_len_tx; +#endif /* LWIP_UDPLITE */ + + /** receive callback function */ + udp_recv_fn recv; + /** user-supplied argument for the recv callback */ + void *recv_arg; +}; +/* udp_pcbs export for exernal reference (e.g. SNMP agent) */ +extern struct udp_pcb *udp_pcbs; + +/* The following functions is the application layer interface to the + UDP code. */ +struct udp_pcb * udp_new (void)ICACHE_FLASH_ATTR; +void udp_remove (struct udp_pcb *pcb)ICACHE_FLASH_ATTR; +err_t udp_bind (struct udp_pcb *pcb, ip_addr_t *ipaddr, + u16_t port)ICACHE_FLASH_ATTR; +err_t udp_connect (struct udp_pcb *pcb, ip_addr_t *ipaddr, + u16_t port)ICACHE_FLASH_ATTR; +void udp_disconnect (struct udp_pcb *pcb)ICACHE_FLASH_ATTR; +void udp_recv (struct udp_pcb *pcb, udp_recv_fn recv, + void *recv_arg)ICACHE_FLASH_ATTR; +err_t udp_sendto_if (struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *dst_ip, u16_t dst_port, + struct netif *netif)ICACHE_FLASH_ATTR; +err_t udp_sendto (struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *dst_ip, u16_t dst_port)ICACHE_FLASH_ATTR; +err_t udp_send (struct udp_pcb *pcb, struct pbuf *p)ICACHE_FLASH_ATTR; + +#if LWIP_CHECKSUM_ON_COPY +err_t udp_sendto_if_chksum(struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *dst_ip, u16_t dst_port, + struct netif *netif, u8_t have_chksum, + u16_t chksum)ICACHE_FLASH_ATTR; +err_t udp_sendto_chksum(struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *dst_ip, u16_t dst_port, + u8_t have_chksum, u16_t chksum)ICACHE_FLASH_ATTR; +err_t udp_send_chksum(struct udp_pcb *pcb, struct pbuf *p, + u8_t have_chksum, u16_t chksum)ICACHE_FLASH_ATTR; +#endif /* LWIP_CHECKSUM_ON_COPY */ + +#define udp_flags(pcb) ((pcb)->flags) +#define udp_setflags(pcb, f) ((pcb)->flags = (f)) + +/* The following functions are the lower layer interface to UDP. */ +void udp_input (struct pbuf *p, struct netif *inp)ICACHE_FLASH_ATTR; + +#define udp_init() /* Compatibility define, not init needed. */ + +#if UDP_DEBUG +void udp_debug_print(struct udp_hdr *udphdr)ICACHE_FLASH_ATTR; +#else +#define udp_debug_print(udphdr) +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_UDP */ + +#endif /* __LWIP_UDP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/lwipopts.h b/examples/ESP8266_NONOS_SDK/third_party/include/lwipopts.h new file mode 100644 index 0000000..e77dd40 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/lwipopts.h @@ -0,0 +1,2068 @@ +/** + * @file + * + * lwIP Options Configuration + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIPOPTS_H__ +#define __LWIPOPTS_H__ + +#define ESP_SYSTEM_APP 1 +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain + * critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#ifndef SYS_LIGHTWEIGHT_PROT +#define SYS_LIGHTWEIGHT_PROT 0 +#endif + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#ifndef NO_SYS +#define NO_SYS 1 +#endif + +/** + * NO_SYS_NO_TIMERS==1: Drop support for sys_timeout when NO_SYS==1 + * Mainly for compatibility to old versions. + */ +#ifndef NO_SYS_NO_TIMERS +#define NO_SYS_NO_TIMERS 0 +#endif + +/** + * MEMCPY: override this if you have a faster implementation at hand than the + * one included in your C library + */ +#ifndef MEMCPY +#define MEMCPY(dst,src,len) os_memcpy(dst,src,len) +#endif + +/** + * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a + * call to memcpy() if the length is known at compile time and is small. + */ +#ifndef SMEMCPY +#define SMEMCPY(dst,src,len) os_memcpy(dst,src,len) +#endif + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library + * instead of the lwip internal allocator. Can save code size if you + * already use it. + */ +#ifndef MEM_LIBC_MALLOC +#define MEM_LIBC_MALLOC 1 +#endif + +/** +* MEMP_MEM_MALLOC==1: Use mem_malloc/mem_free instead of the lwip pool allocator. +* Especially useful with MEM_LIBC_MALLOC but handle with care regarding execution +* speed and usage from interrupts! +*/ +#ifndef MEMP_MEM_MALLOC +#define MEMP_MEM_MALLOC 1 +#endif + +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + */ +#ifndef MEM_ALIGNMENT +#define MEM_ALIGNMENT 4 +#endif + +/** + * MEM_SIZE: the size of the heap memory. If the application will send + * a lot of data that needs to be copied, this should be set high. + */ +#ifndef MEM_SIZE +#define MEM_SIZE 16000 +#endif + +/** + * MEMP_SEPARATE_POOLS: if defined to 1, each pool is placed in its own array. + * This can be used to individually change the location of each pool. + * Default is one big array for all pools + */ +#ifndef MEMP_SEPARATE_POOLS +#define MEMP_SEPARATE_POOLS 1 +#endif + +/** + * MEMP_OVERFLOW_CHECK: memp overflow protection reserves a configurable + * amount of bytes before and after each memp element in every pool and fills + * it with a prominent default value. + * MEMP_OVERFLOW_CHECK == 0 no checking + * MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed + * MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time + * memp_malloc() or memp_free() is called (useful but slow!) + */ +#ifndef MEMP_OVERFLOW_CHECK +#define MEMP_OVERFLOW_CHECK 0 +#endif + +/** + * MEMP_SANITY_CHECK==1: run a sanity check after each memp_free() to make + * sure that there are no cycles in the linked lists. + */ +#ifndef MEMP_SANITY_CHECK +#define MEMP_SANITY_CHECK 1 +#endif + +/** + * MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set + * of memory pools of various sizes. When mem_malloc is called, an element of + * the smallest pool that can provide the length needed is returned. + * To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled. + */ +#ifndef MEM_USE_POOLS +#define MEM_USE_POOLS 0 +#endif + +/** + * MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next + * bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more + * reliable. */ +#ifndef MEM_USE_POOLS_TRY_BIGGER_POOL +#define MEM_USE_POOLS_TRY_BIGGER_POOL 0 +#endif + +/** + * MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h + * that defines additional pools beyond the "standard" ones required + * by lwIP. If you set this to 1, you must have lwippools.h in your + * inlude path somewhere. + */ +#ifndef MEMP_USE_CUSTOM_POOLS +#define MEMP_USE_CUSTOM_POOLS 0 +#endif + +/** + * Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from + * interrupt context (or another context that doesn't allow waiting for a + * semaphore). + * If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT, + * while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs + * with each loop so that mem_free can run. + * + * ATTENTION: As you can see from the above description, this leads to dis-/ + * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc + * can need longer. + * + * If you don't want that, at least for NO_SYS=0, you can still use the following + * functions to enqueue a deallocation call which then runs in the tcpip_thread + * context: + * - pbuf_free_callback(p); + * - mem_free_callback(m); + */ +#ifndef LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT +#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0 +#endif + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#ifndef MEMP_NUM_PBUF +#define MEMP_NUM_PBUF 10 +#endif + +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#ifndef MEMP_NUM_RAW_PCB +#define MEMP_NUM_RAW_PCB 4 +#endif + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#ifndef MEMP_NUM_UDP_PCB +#define MEMP_NUM_UDP_PCB 4 +#endif + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB +#define MEMP_NUM_TCP_PCB (*(volatile uint32*)0x600011FC) +#endif + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB_LISTEN +#define MEMP_NUM_TCP_PCB_LISTEN 2 +#endif + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_SEG +#define MEMP_NUM_TCP_SEG 16 +#endif + +/** + * MEMP_NUM_REASSDATA: the number of simultaneously IP packets queued for + * reassembly (whole packets, not fragments!) + */ +#ifndef MEMP_NUM_REASSDATA +#define MEMP_NUM_REASSDATA 0 +#endif + +/** + * MEMP_NUM_FRAG_PBUF: the number of IP fragments simultaneously sent + * (fragments, not whole packets!). + * This is only used with IP_FRAG_USES_STATIC_BUF==0 and + * LWIP_NETIF_TX_SINGLE_PBUF==0 and only has to be > 1 with DMA-enabled MACs + * where the packet is not yet sent when netif->output returns. + */ +#ifndef MEMP_NUM_FRAG_PBUF +#define MEMP_NUM_FRAG_PBUF 0 +#endif + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#ifndef MEMP_NUM_ARP_QUEUE +#define MEMP_NUM_ARP_QUEUE 10 +#endif + +/** + * MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces + * can be members et the same time (one per netif - allsystems group -, plus one + * per netif membership). + * (requires the LWIP_IGMP option) + */ +#ifndef MEMP_NUM_IGMP_GROUP +#define MEMP_NUM_IGMP_GROUP 8 +#endif + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#ifndef MEMP_NUM_SYS_TIMEOUT +#define MEMP_NUM_SYS_TIMEOUT 8 +#endif + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETBUF +#define MEMP_NUM_NETBUF 0 +#endif + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 0 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_API +#define MEMP_NUM_TCPIP_MSG_API 4 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_INPKT +#define MEMP_NUM_TCPIP_MSG_INPKT 4 +#endif + +/** + * MEMP_NUM_SNMP_NODE: the number of leafs in the SNMP tree. + */ +#ifndef MEMP_NUM_SNMP_NODE +#define MEMP_NUM_SNMP_NODE 0 +#endif + +/** + * MEMP_NUM_SNMP_ROOTNODE: the number of branches in the SNMP tree. + * Every branch has one leaf (MEMP_NUM_SNMP_NODE) at least! + */ +#ifndef MEMP_NUM_SNMP_ROOTNODE +#define MEMP_NUM_SNMP_ROOTNODE 0 +#endif + +/** + * MEMP_NUM_SNMP_VARBIND: the number of concurrent requests (does not have to + * be changed normally) - 2 of these are used per request (1 for input, + * 1 for output) + */ +#ifndef MEMP_NUM_SNMP_VARBIND +#define MEMP_NUM_SNMP_VARBIND 0 +#endif + +/** + * MEMP_NUM_SNMP_VALUE: the number of OID or values concurrently used + * (does not have to be changed normally) - 3 of these are used per request + * (1 for the value read and 2 for OIDs - input and output) + */ +#ifndef MEMP_NUM_SNMP_VALUE +#define MEMP_NUM_SNMP_VALUE 0 +#endif + +/** + * MEMP_NUM_NETDB: the number of concurrently running lwip_addrinfo() calls + * (before freeing the corresponding memory using lwip_freeaddrinfo()). + */ +#ifndef MEMP_NUM_NETDB +#define MEMP_NUM_NETDB 0 +#endif + +/** + * MEMP_NUM_LOCALHOSTLIST: the number of host entries in the local host list + * if DNS_LOCAL_HOSTLIST_IS_DYNAMIC==1. + */ +#ifndef MEMP_NUM_LOCALHOSTLIST +#define MEMP_NUM_LOCALHOSTLIST 0 +#endif + +/** + * MEMP_NUM_PPPOE_INTERFACES: the number of concurrently active PPPoE + * interfaces (only used with PPPOE_SUPPORT==1) + */ +#ifndef MEMP_NUM_PPPOE_INTERFACES +#define MEMP_NUM_PPPOE_INTERFACES 0 +#endif + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#ifndef PBUF_POOL_SIZE +#define PBUF_POOL_SIZE 10 +#endif + +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#ifndef LWIP_ARP +#define LWIP_ARP 1 +#endif + +/** + * ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached. + */ +#ifndef ARP_TABLE_SIZE +#define ARP_TABLE_SIZE 10 +#endif + +/** + * ARP_QUEUEING==1: Multiple outgoing packets are queued during hardware address + * resolution. By default, only the most recent packet is queued per IP address. + * This is sufficient for most protocols and mainly reduces TCP connection + * startup time. Set this to 1 if you know your application sends more than one + * packet in a row to an IP address that is not in the ARP cache. + */ +#ifndef ARP_QUEUEING +#define ARP_QUEUEING 1 +#endif + +/** + * ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be + * updated with the source MAC and IP addresses supplied in the packet. + * You may want to disable this if you do not trust LAN peers to have the + * correct addresses, or as a limited approach to attempt to handle + * spoofing. If disabled, lwIP will need to make a new ARP request if + * the peer is not already in the ARP table, adding a little latency. + * The peer *is* in the ARP table if it requested our address before. + * Also notice that this slows down input processing of every IP packet! + */ +#ifndef ETHARP_TRUST_IP_MAC +#define ETHARP_TRUST_IP_MAC 0 +#endif + +/** + * ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header. + * Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check. + * If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted. + * If ETHARP_VLAN_CHECK is not defined, all traffic is accepted. + */ +#ifndef ETHARP_SUPPORT_VLAN +#define ETHARP_SUPPORT_VLAN 0 +#endif + +/** LWIP_ETHERNET==1: enable ethernet support for PPPoE even though ARP + * might be disabled + */ +#ifndef LWIP_ETHERNET +#define LWIP_ETHERNET (LWIP_ARP || PPPOE_SUPPORT) +#endif + +/** ETH_PAD_SIZE: number of bytes added before the ethernet header to ensure + * alignment of payload after that header. Since the header is 14 bytes long, + * without this padding e.g. addresses in the IP header will not be aligned + * on a 32-bit boundary, so setting this to 2 can speed up 32-bit-platforms. + */ +#ifndef ETH_PAD_SIZE +#define ETH_PAD_SIZE 0 +#endif + +/** ETHARP_SUPPORT_STATIC_ENTRIES==1: enable code to support static ARP table + * entries (using etharp_add_static_entry/etharp_remove_static_entry). + */ +#ifndef ETHARP_SUPPORT_STATIC_ENTRIES +#define ETHARP_SUPPORT_STATIC_ENTRIES 0 +#endif + + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#ifndef IP_FORWARD +#define IP_FORWARD 0 +#endif + +/** + * IP_OPTIONS_ALLOWED: Defines the behavior for IP options. + * IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped. + * IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed). + */ +#ifndef IP_OPTIONS_ALLOWED +#define IP_OPTIONS_ALLOWED 1 +#endif + +/** + * IP_REASSEMBLY==1: Reassemble incoming fragmented IP packets. Note that + * this option does not affect outgoing packet sizes, which can be controlled + * via IP_FRAG. + */ +#ifndef IP_REASSEMBLY +#define IP_REASSEMBLY 0 +#endif + +/** + * IP_FRAG==1: Fragment outgoing IP packets if their size exceeds MTU. Note + * that this option does not affect incoming packet sizes, which can be + * controlled via IP_REASSEMBLY. + */ +#ifndef IP_FRAG +#define IP_FRAG 0 +#endif + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#ifndef IP_REASS_MAXAGE +#define IP_REASS_MAXAGE 3 +#endif + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#ifndef IP_REASS_MAX_PBUFS +#define IP_REASS_MAX_PBUFS 10 +#endif + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented (or with LWIP_NETIF_TX_SINGLE_PBUF==1, + * new PBUF_RAM pbufs are used for fragments). + * ATTENTION: IP_FRAG_USES_STATIC_BUF==1 may not be used for DMA-enabled MACs! + */ +#ifndef IP_FRAG_USES_STATIC_BUF +#define IP_FRAG_USES_STATIC_BUF 1 +#endif + +/** + * IP_FRAG_MAX_MTU: Assumed max MTU on any interface for IP frag buffer + * (requires IP_FRAG_USES_STATIC_BUF==1) + */ +#if IP_FRAG_USES_STATIC_BUF && !defined(IP_FRAG_MAX_MTU) +#define IP_FRAG_MAX_MTU 1500 +#endif + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#ifndef IP_DEFAULT_TTL +#define IP_DEFAULT_TTL 128 +#endif + +/** + * IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast + * filter per pcb on udp and raw send operations. To enable broadcast filter + * on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1. + */ +#ifndef IP_SOF_BROADCAST +#define IP_SOF_BROADCAST 0 +#endif + +/** + * IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast + * filter on recv operations. + */ +#ifndef IP_SOF_BROADCAST_RECV +#define IP_SOF_BROADCAST_RECV 0 +#endif + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_ICMP==1: Enable ICMP module inside the IP stack. + * Be careful, disable that make your product non-compliant to RFC1122 + */ +#ifndef LWIP_ICMP +#define LWIP_ICMP 1 +#endif + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#ifndef ICMP_TTL +#define ICMP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only) + */ +#ifndef LWIP_BROADCAST_PING +#define LWIP_BROADCAST_PING 0 +#endif + +/** + * LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only) + */ +#ifndef LWIP_MULTICAST_PING +#define LWIP_MULTICAST_PING 0 +#endif + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef LWIP_RAW +#define LWIP_RAW 1 +#endif + +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef RAW_TTL +#define RAW_TTL (IP_DEFAULT_TTL) +#endif + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * LWIP_DHCP==1: Enable DHCP module. + */ +#ifndef LWIP_DHCP +#define LWIP_DHCP 1 +#endif + +/** + * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address. + */ +#ifndef DHCP_DOES_ARP_CHECK +#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) +#endif + +/** + * DHCP_MAXRTX: Maximum number of retries of current request. + */ +#ifndef DHCP_MAXRTX +#define DHCP_MAXRTX (*(volatile uint32*)0x600011E0) +#endif + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#ifndef LWIP_AUTOIP +#define LWIP_AUTOIP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on + * the same interface at the same time. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP +#define LWIP_DHCP_AUTOIP_COOP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes + * that should be sent before falling back on AUTOIP. This can be set + * as low as 1 to get an AutoIP address very quickly, but you should + * be prepared to handle a changing IP address when DHCP overrides + * AutoIP. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP_TRIES +#define LWIP_DHCP_AUTOIP_COOP_TRIES 9 +#endif + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_SNMP==1: Turn on SNMP module. UDP must be available for SNMP + * transport. + */ +#ifndef LWIP_SNMP +#define LWIP_SNMP 0 +#endif + +/** + * SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will + * allow. At least one request buffer is required. + */ +#ifndef SNMP_CONCURRENT_REQUESTS +#define SNMP_CONCURRENT_REQUESTS 0 +#endif + +/** + * SNMP_TRAP_DESTINATIONS: Number of trap destinations. At least one trap + * destination is required + */ +#ifndef SNMP_TRAP_DESTINATIONS +#define SNMP_TRAP_DESTINATIONS 0 +#endif + +/** + * SNMP_PRIVATE_MIB: + */ +#ifndef SNMP_PRIVATE_MIB +#define SNMP_PRIVATE_MIB 0 +#endif + +/** + * Only allow SNMP write actions that are 'safe' (e.g. disabeling netifs is not + * a safe action and disabled when SNMP_SAFE_REQUESTS = 1). + * Unsafe requests are disabled by default! + */ +#ifndef SNMP_SAFE_REQUESTS +#define SNMP_SAFE_REQUESTS 0 +#endif + +/** + * The maximum length of strings used. This affects the size of + * MEMP_SNMP_VALUE elements. + */ +#ifndef SNMP_MAX_OCTET_STRING_LEN +#define SNMP_MAX_OCTET_STRING_LEN 127 +#endif + +/** + * The maximum depth of the SNMP tree. + * With private MIBs enabled, this depends on your MIB! + * This affects the size of MEMP_SNMP_VALUE elements. + */ +#ifndef SNMP_MAX_TREE_DEPTH +#define SNMP_MAX_TREE_DEPTH 15 +#endif + +/** + * The size of the MEMP_SNMP_VALUE elements, normally calculated from + * SNMP_MAX_OCTET_STRING_LEN and SNMP_MAX_TREE_DEPTH. + */ +#ifndef SNMP_MAX_VALUE_SIZE +#define SNMP_MAX_VALUE_SIZE LWIP_MAX((SNMP_MAX_OCTET_STRING_LEN)+1, sizeof(s32_t)*(SNMP_MAX_TREE_DEPTH)) +#endif + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_IGMP==1: Turn on IGMP module. + */ +#ifndef LWIP_IGMP +#define LWIP_IGMP 1 +#endif +/* + ---------------------------------- + ---------- MDNS options ---------- + ---------------------------------- +*/ +/** + * LWIP_MDNS==1: Turn on MDNS module. + */ +#ifndef LWIP_MDNS +#define LWIP_MDNS 1 +#endif +/* +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS + * transport. + */ +#ifndef LWIP_DNS +#define LWIP_DNS 1 +#endif + +/** DNS maximum number of entries to maintain locally. */ +#ifndef DNS_TABLE_SIZE +#define DNS_TABLE_SIZE 4 +#endif + +/** DNS maximum host name length supported in the name table. */ +#ifndef DNS_MAX_NAME_LENGTH +#define DNS_MAX_NAME_LENGTH 256 +#endif + +/** The maximum of DNS servers */ +#ifndef DNS_MAX_SERVERS +#define DNS_MAX_SERVERS 2 +#endif + +/** DNS do a name checking between the query and the response. */ +#ifndef DNS_DOES_NAME_CHECK +#define DNS_DOES_NAME_CHECK 1 +#endif + +/** DNS message max. size. Default value is RFC compliant. */ +#ifndef DNS_MSG_SIZE +#define DNS_MSG_SIZE 512 +#endif + +/** DNS_LOCAL_HOSTLIST: Implements a local host-to-address list. If enabled, + * you have to define + * #define DNS_LOCAL_HOSTLIST_INIT {{"host1", 0x123}, {"host2", 0x234}} + * (an array of structs name/address, where address is an u32_t in network + * byte order). + * + * Instead, you can also use an external function: + * #define DNS_LOOKUP_LOCAL_EXTERN(x) extern u32_t my_lookup_function(const char *name) + * that returns the IP address or INADDR_NONE if not found. + */ +#ifndef DNS_LOCAL_HOSTLIST +#define DNS_LOCAL_HOSTLIST 0 +#endif /* DNS_LOCAL_HOSTLIST */ + +/** If this is turned on, the local host-list can be dynamically changed + * at runtime. */ +#ifndef DNS_LOCAL_HOSTLIST_IS_DYNAMIC +#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0 +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * LWIP_UDP==1: Turn on UDP. + */ +#ifndef LWIP_UDP +#define LWIP_UDP 1 +#endif + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#ifndef LWIP_UDPLITE +#define LWIP_UDPLITE 0 +#endif + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#ifndef UDP_TTL +#define UDP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf. + */ +#ifndef LWIP_NETBUF_RECVINFO +#define LWIP_NETBUF_RECVINFO 0 +#endif + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * LWIP_TCP==1: Turn on TCP. + */ +#ifndef LWIP_TCP +#define LWIP_TCP 1 +#endif + +/** + * TCP_TTL: Default Time-To-Live value. + */ +#ifndef TCP_TTL +#define TCP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * TCP_MAXRTX: Maximum number of retransmissions of data segments. + */ +#ifndef TCP_MAXRTX +#define TCP_MAXRTX (*(volatile uint32*)0x600011E8) +#endif + +/** + * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments. + */ +#ifndef TCP_SYNMAXRTX +#define TCP_SYNMAXRTX (*(volatile uint32*)0x600011E4) +#endif + +/** + * TCP_MAXRTO: Maximum retransmission timeout of data segments. + */ +#ifndef TCP_MAXRTO +#define TCP_MAXRTO 10 +#endif + +/** + * TCP_MINRTO: Minimum retransmission timeout of data segments. + */ +#ifndef TCP_MINRTO +#define TCP_MINRTO 2 +#endif + +/** + * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order. + * Define to 0 if your device is low on memory. + */ +#ifndef TCP_QUEUE_OOSEQ +#define TCP_QUEUE_OOSEQ 1 +#endif + +#if 1 +/** + * TCP_MSS: TCP Maximum segment size. (default is 536, a conservative default, + * you might want to increase this.) + * For the receive side, this MSS is advertised to the remote side + * when opening a connection. For the transmit size, this MSS sets + * an upper limit on the MSS advertised by the remote host. + */ +#ifndef TCP_MSS +#define TCP_MSS 1460 +#endif +#endif + +/** + * TCP_WND: The size of a TCP window. This must be at least + * (2 * TCP_MSS) for things to work well + */ +#ifndef TCP_WND +#define TCP_WND (*(volatile uint32*)0x600011F0) +#endif + +/** + * TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really + * sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which + * reflects the available reassembly buffer size at the remote host) and the + * largest size permitted by the IP layer" (RFC 1122) + * Setting this to 1 enables code that checks TCP_MSS against the MTU of the + * netif used for a connection and limits the MSS if it would be too big otherwise. + */ +#ifndef TCP_CALCULATE_EFF_SEND_MSS +#define TCP_CALCULATE_EFF_SEND_MSS 1 +#endif + + +/** + * TCP_SND_BUF: TCP sender buffer space (bytes). + */ +#ifndef TCP_SND_BUF +#define TCP_SND_BUF 2 * TCP_MSS +#endif + +/** + * TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least + * as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. + */ +#ifndef TCP_SND_QUEUELEN +#define TCP_SND_QUEUELEN ((4 * (TCP_SND_BUF) + (TCP_MSS - 1))/(TCP_MSS)) +#endif + +/** + * TCP_SNDLOWAT: TCP writable space (bytes). This must be less than + * TCP_SND_BUF. It is the amount of space which must be available in the + * TCP snd_buf for select to return writable (combined with TCP_SNDQUEUELOWAT). + */ +#ifndef TCP_SNDLOWAT +#define TCP_SNDLOWAT ((TCP_SND_BUF)/2) +#endif + +/** + * TCP_SNDQUEUELOWAT: TCP writable bufs (pbuf count). This must be grater + * than TCP_SND_QUEUELEN. If the number of pbufs queued on a pcb drops below + * this number, select returns writable (combined with TCP_SNDLOWAT). + */ +#ifndef TCP_SNDQUEUELOWAT +#define TCP_SNDQUEUELOWAT LWIP_MAX(((TCP_SND_QUEUELEN)/2), 5) +#endif + +/** + * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb. + */ +#ifndef TCP_LISTEN_BACKLOG +#define TCP_LISTEN_BACKLOG 0 +#endif + +/** + * The maximum allowed backlog for TCP listen netconns. + * This backlog is used unless another is explicitly specified. + * 0xff is the maximum (u8_t). + */ +#ifndef TCP_DEFAULT_LISTEN_BACKLOG +#define TCP_DEFAULT_LISTEN_BACKLOG 0xff +#endif + +/** + * TCP_OVERSIZE: The maximum number of bytes that tcp_write may + * allocate ahead of time in an attempt to create shorter pbuf chains + * for transmission. The meaningful range is 0 to TCP_MSS. Some + * suggested values are: + * + * 0: Disable oversized allocation. Each tcp_write() allocates a new + pbuf (old behaviour). + * 1: Allocate size-aligned pbufs with minimal excess. Use this if your + * scatter-gather DMA requires aligned fragments. + * 128: Limit the pbuf/memory overhead to 20%. + * TCP_MSS: Try to create unfragmented TCP packets. + * TCP_MSS/4: Try to create 4 fragments or less per TCP packet. + */ +#ifndef TCP_OVERSIZE +#define TCP_OVERSIZE TCP_MSS +#endif + +/** + * LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option. + */ +#ifndef LWIP_TCP_TIMESTAMPS +#define LWIP_TCP_TIMESTAMPS 0 +#endif + +/** + * TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an + * explicit window update + */ +#ifndef TCP_WND_UPDATE_THRESHOLD +#define TCP_WND_UPDATE_THRESHOLD (TCP_WND / 4) +#endif + +/** + * LWIP_EVENT_API and LWIP_CALLBACK_API: Only one of these should be set to 1. + * LWIP_EVENT_API==1: The user defines lwip_tcp_event() to receive all + * events (accept, sent, etc) that happen in the system. + * LWIP_CALLBACK_API==1: The PCB callback function is called directly + * for the event. + */ +#ifndef LWIP_EVENT_API +#define LWIP_EVENT_API 0 +#define LWIP_CALLBACK_API 1 +#else +#define LWIP_EVENT_API 1 +#define LWIP_CALLBACK_API 0 +#endif + + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#ifndef PBUF_LINK_HLEN +#define PBUF_LINK_HLEN (14 + ETH_PAD_SIZE) +#endif + +/** + * PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is + * designed to accomodate single full size TCP frame in one pbuf, including + * TCP_MSS, IP header, and link header. + */ +#ifndef PBUF_POOL_BUFSIZE +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#endif + +/* + ------------------------------------------------ + ---------- Network Interfaces options ---------- + ------------------------------------------------ +*/ +/** + * LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname + * field. + */ +#ifndef LWIP_NETIF_HOSTNAME +#define LWIP_NETIF_HOSTNAME 1 +#endif + +/** + * LWIP_NETIF_API==1: Support netif api (in netifapi.c) + */ +#ifndef LWIP_NETIF_API +#define LWIP_NETIF_API 0 +#endif + +/** + * LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface + * changes its up/down status (i.e., due to DHCP IP acquistion) + */ +#ifndef LWIP_NETIF_STATUS_CALLBACK +#define LWIP_NETIF_STATUS_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface + * whenever the link changes (i.e., link down) + */ +#ifndef LWIP_NETIF_LINK_CALLBACK +#define LWIP_NETIF_LINK_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g. table + * indices) in struct netif. TCP and UDP can make use of this to prevent + * scanning the ARP table for every sent packet. While this is faster for big + * ARP tables or many concurrent connections, it might be counterproductive + * if you have a tiny ARP table or if there never are concurrent connections. + */ +#ifndef LWIP_NETIF_HWADDRHINT +#define LWIP_NETIF_HWADDRHINT 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP + * address equal to the netif IP address, looping them back up the stack. + */ +#ifndef LWIP_NETIF_LOOPBACK +#define LWIP_NETIF_LOOPBACK 0 +#endif + +/** + * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback + * sending for each netif (0 = disabled) + */ +#ifndef LWIP_LOOPBACK_MAX_PBUFS +#define LWIP_LOOPBACK_MAX_PBUFS 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in + * the system, as netifs must change how they behave depending on this setting + * for the LWIP_NETIF_LOOPBACK option to work. + * Setting this is needed to avoid reentering non-reentrant functions like + * tcp_input(). + * LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a + * multithreaded environment like tcpip.c. In this case, netif->input() + * is called directly. + * LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup. + * The packets are put on a list and netif_poll() must be called in + * the main application loop. + */ +#ifndef LWIP_NETIF_LOOPBACK_MULTITHREADING +#define LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS) +#endif + +/** + * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data + * to be sent into one single pbuf. This is for compatibility with DMA-enabled + * MACs that do not support scatter-gather. + * Beware that this might involve CPU-memcpy before transmitting that would not + * be needed without this flag! Use this only if you need to! + * + * @todo: TCP and IP-frag do not work with this, yet: + */ +#ifndef LWIP_NETIF_TX_SINGLE_PBUF +#define LWIP_NETIF_TX_SINGLE_PBUF 1 +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_LOOPIF==1: Support loop interface (127.0.0.1) and loopif.c + */ +#ifndef LWIP_HAVE_LOOPIF +#define LWIP_HAVE_LOOPIF 0 +#endif + +/* + ------------------------------------ + ---------- SLIPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_SLIPIF==1: Support slip interface and slipif.c + */ +#ifndef LWIP_HAVE_SLIPIF +#define LWIP_HAVE_SLIPIF 0 +#endif + +/* + ------------------------------------ + ---------- Thread options ---------- + ------------------------------------ +*/ +/** + * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread. + */ +#ifndef TCPIP_THREAD_NAME +#define TCPIP_THREAD_NAME "tcpip_thread" +#endif + +/** + * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_STACKSIZE +#define TCPIP_THREAD_STACKSIZE 0 +#endif + +/** + * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_PRIO +#define TCPIP_THREAD_PRIO 1 +#endif + +/** + * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when tcpip_init is called. + */ +#ifndef TCPIP_MBOX_SIZE +#define TCPIP_MBOX_SIZE 0 +#endif + +/** + * SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread. + */ +#ifndef SLIPIF_THREAD_NAME +#define SLIPIF_THREAD_NAME "slipif_loop" +#endif + +/** + * SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_STACKSIZE +#define SLIPIF_THREAD_STACKSIZE 0 +#endif + +/** + * SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_PRIO +#define SLIPIF_THREAD_PRIO 1 +#endif + +/** + * PPP_THREAD_NAME: The name assigned to the pppInputThread. + */ +#ifndef PPP_THREAD_NAME +#define PPP_THREAD_NAME "pppInputThread" +#endif + +/** + * PPP_THREAD_STACKSIZE: The stack size used by the pppInputThread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_STACKSIZE +#define PPP_THREAD_STACKSIZE 0 +#endif + +/** + * PPP_THREAD_PRIO: The priority assigned to the pppInputThread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_PRIO +#define PPP_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread. + */ +#ifndef DEFAULT_THREAD_NAME +#define DEFAULT_THREAD_NAME "lwIP" +#endif + +/** + * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_STACKSIZE +#define DEFAULT_THREAD_STACKSIZE 0 +#endif + +/** + * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_PRIO +#define DEFAULT_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_RAW_RECVMBOX_SIZE +#define DEFAULT_RAW_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_UDP_RECVMBOX_SIZE +#define DEFAULT_UDP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_TCP_RECVMBOX_SIZE +#define DEFAULT_TCP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections. + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when the acceptmbox is created. + */ +#ifndef DEFAULT_ACCEPTMBOX_SIZE +#define DEFAULT_ACCEPTMBOX_SIZE 0 +#endif + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ +/** + * LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING +#define LWIP_TCPIP_CORE_LOCKING 0 +#endif + +/** + * LWIP_TCPIP_CORE_LOCKING_INPUT: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING_INPUT +#define LWIP_TCPIP_CORE_LOCKING_INPUT 0 +#endif + +/** + * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c) + */ +#ifndef LWIP_NETCONN +#define LWIP_NETCONN 0 +#endif + +/** LWIP_TCPIP_TIMEOUT==1: Enable tcpip_timeout/tcpip_untimeout tod create + * timers running in tcpip_thread from another thread. + */ +#ifndef LWIP_TCPIP_TIMEOUT +#define LWIP_TCPIP_TIMEOUT 1 +#endif + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c) + */ +#ifndef LWIP_SOCKET +#define LWIP_SOCKET 0 +#endif + +/** + * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names. + * (only used if you use sockets.c) + */ +#ifndef LWIP_COMPAT_SOCKETS +#define LWIP_COMPAT_SOCKETS 0 +#endif + +/** + * LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names. + * Disable this option if you use a POSIX operating system that uses the same + * names (read, write & close). (only used if you use sockets.c) + */ +#ifndef LWIP_POSIX_SOCKETS_IO_NAMES +#define LWIP_POSIX_SOCKETS_IO_NAMES 0 +#endif + +/** + * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT + * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set + * in seconds. (does not require sockets.c, and will affect tcp.c) + */ +#ifndef LWIP_TCP_KEEPALIVE +#define LWIP_TCP_KEEPALIVE 1 +#endif + +/** + * LWIP_SO_RCVTIMEO==1: Enable SO_RCVTIMEO processing. + */ +#ifndef LWIP_SO_RCVTIMEO +#define LWIP_SO_RCVTIMEO 0 +#endif + +/** + * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing. + */ +#ifndef LWIP_SO_RCVBUF +#define LWIP_SO_RCVBUF 0 +#endif + +/** + * If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize. + */ +#ifndef RECV_BUFSIZE_DEFAULT +#define RECV_BUFSIZE_DEFAULT INT_MAX +#endif + +/** + * SO_REUSE==1: Enable SO_REUSEADDR option. + */ +#ifndef SO_REUSE +#define SO_REUSE 0 +#endif + +/** + * SO_REUSE_RXTOALL==1: Pass a copy of incoming broadcast/multicast packets + * to all local matches if SO_REUSEADDR is turned on. + * WARNING: Adds a memcpy for every packet if passing to more than one pcb! + */ +#ifndef SO_REUSE_RXTOALL +#define SO_REUSE_RXTOALL 0 +#endif + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#ifndef LWIP_STATS +#define LWIP_STATS 0 +#endif + +#if LWIP_STATS + +/** + * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions. + */ +#ifndef LWIP_STATS_DISPLAY +#define LWIP_STATS_DISPLAY 0 +#endif + +/** + * LINK_STATS==1: Enable link stats. + */ +#ifndef LINK_STATS +#define LINK_STATS 1 +#endif + +/** + * ETHARP_STATS==1: Enable etharp stats. + */ +#ifndef ETHARP_STATS +#define ETHARP_STATS (LWIP_ARP) +#endif + +/** + * IP_STATS==1: Enable IP stats. + */ +#ifndef IP_STATS +#define IP_STATS 1 +#endif + +/** + * IPFRAG_STATS==1: Enable IP fragmentation stats. Default is + * on if using either frag or reass. + */ +#ifndef IPFRAG_STATS +#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +#endif + +/** + * ICMP_STATS==1: Enable ICMP stats. + */ +#ifndef ICMP_STATS +#define ICMP_STATS 1 +#endif + +/** + * IGMP_STATS==1: Enable IGMP stats. + */ +#ifndef IGMP_STATS +#define IGMP_STATS (LWIP_IGMP) +#endif + +/** + * UDP_STATS==1: Enable UDP stats. Default is on if + * UDP enabled, otherwise off. + */ +#ifndef UDP_STATS +#define UDP_STATS (LWIP_UDP) +#endif + +/** + * TCP_STATS==1: Enable TCP stats. Default is on if TCP + * enabled, otherwise off. + */ +#ifndef TCP_STATS +#define TCP_STATS (LWIP_TCP) +#endif + +/** + * MEM_STATS==1: Enable mem.c stats. + */ +#ifndef MEM_STATS +#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0)) +#endif + +/** + * MEMP_STATS==1: Enable memp.c pool stats. + */ +#ifndef MEMP_STATS +#define MEMP_STATS (MEMP_MEM_MALLOC == 0) +#endif + +/** + * SYS_STATS==1: Enable system stats (sem and mbox counts, etc). + */ +#ifndef SYS_STATS +#define SYS_STATS (NO_SYS == 0) +#endif + +#else +#define ETHARP_STATS 0 +#define LINK_STATS 0 +#define IP_STATS 0 +#define IPFRAG_STATS 0 +#define ICMP_STATS 0 +#define IGMP_STATS 0 +#define UDP_STATS 0 +#define TCP_STATS 0 +#define MEM_STATS 0 +#define MEMP_STATS 0 +#define SYS_STATS 0 +#define LWIP_STATS_DISPLAY 0 + +#endif /* LWIP_STATS */ + +/* + --------------------------------- + ---------- PPP options ---------- + --------------------------------- +*/ +/** + * PPP_SUPPORT==1: Enable PPP. + */ +#ifndef PPP_SUPPORT +#define PPP_SUPPORT 0 +#endif + +/** + * PPPOE_SUPPORT==1: Enable PPP Over Ethernet + */ +#ifndef PPPOE_SUPPORT +#define PPPOE_SUPPORT 0 +#endif + +/** + * PPPOS_SUPPORT==1: Enable PPP Over Serial + */ +#ifndef PPPOS_SUPPORT +#define PPPOS_SUPPORT PPP_SUPPORT +#endif + +#if PPP_SUPPORT + +/** + * NUM_PPP: Max PPP sessions. + */ +#ifndef NUM_PPP +#define NUM_PPP 1 +#endif + +/** + * PAP_SUPPORT==1: Support PAP. + */ +#ifndef PAP_SUPPORT +#define PAP_SUPPORT 0 +#endif + +/** + * CHAP_SUPPORT==1: Support CHAP. + */ +#ifndef CHAP_SUPPORT +#define CHAP_SUPPORT 0 +#endif + +/** + * MSCHAP_SUPPORT==1: Support MSCHAP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef MSCHAP_SUPPORT +#define MSCHAP_SUPPORT 0 +#endif + +/** + * CBCP_SUPPORT==1: Support CBCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CBCP_SUPPORT +#define CBCP_SUPPORT 0 +#endif + +/** + * CCP_SUPPORT==1: Support CCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CCP_SUPPORT +#define CCP_SUPPORT 0 +#endif + +/** + * VJ_SUPPORT==1: Support VJ header compression. + */ +#ifndef VJ_SUPPORT +#define VJ_SUPPORT 0 +#endif + +/** + * MD5_SUPPORT==1: Support MD5 (see also CHAP). + */ +#ifndef MD5_SUPPORT +#define MD5_SUPPORT 0 +#endif + +/* + * Timeouts + */ +#ifndef FSM_DEFTIMEOUT +#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef FSM_DEFMAXTERMREQS +#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXCONFREQS +#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXNAKLOOPS +#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ +#endif + +#ifndef UPAP_DEFTIMEOUT +#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ +#endif + +#ifndef UPAP_DEFREQTIME +#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ +#endif + +#ifndef CHAP_DEFTIMEOUT +#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef CHAP_DEFTRANSMITS +#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ +#endif + +/* Interval in seconds between keepalive echo requests, 0 to disable. */ +#ifndef LCP_ECHOINTERVAL +#define LCP_ECHOINTERVAL 0 +#endif + +/* Number of unanswered echo requests before failure. */ +#ifndef LCP_MAXECHOFAILS +#define LCP_MAXECHOFAILS 3 +#endif + +/* Max Xmit idle time (in jiffies) before resend flag char. */ +#ifndef PPP_MAXIDLEFLAG +#define PPP_MAXIDLEFLAG 100 +#endif + +/* + * Packet sizes + * + * Note - lcp shouldn't be allowed to negotiate stuff outside these + * limits. See lcp.h in the pppd directory. + * (XXX - these constants should simply be shared by lcp.c instead + * of living in lcp.h) + */ +#define PPP_MTU 1500 /* Default MTU (size of Info field) */ +#ifndef PPP_MAXMTU +/* #define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) */ +#define PPP_MAXMTU 1500 /* Largest MTU we allow */ +#endif +#define PPP_MINMTU 64 +#define PPP_MRU 1500 /* default MRU = max length of info field */ +#define PPP_MAXMRU 1500 /* Largest MRU we allow */ +#ifndef PPP_DEFMRU +#define PPP_DEFMRU 296 /* Try for this */ +#endif +#define PPP_MINMRU 128 /* No MRUs below this */ + +#ifndef MAXNAMELEN +#define MAXNAMELEN 256 /* max length of hostname or name for auth */ +#endif +#ifndef MAXSECRETLEN +#define MAXSECRETLEN 256 /* max length of password or secret */ +#endif + +#endif /* PPP_SUPPORT */ + +/* + -------------------------------------- + ---------- Checksum options ---------- + -------------------------------------- +*/ +/** + * CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets. + */ +#ifndef CHECKSUM_GEN_IP +#define CHECKSUM_GEN_IP 1 +#endif + +/** + * CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets. + */ +#ifndef CHECKSUM_GEN_UDP +#define CHECKSUM_GEN_UDP 1 +#endif + +/** + * CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets. + */ +#ifndef CHECKSUM_GEN_TCP +#define CHECKSUM_GEN_TCP 1 +#endif + +/** + * CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets. + */ +#ifndef CHECKSUM_CHECK_IP +#define CHECKSUM_CHECK_IP 1 +#endif + +/** + * CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets. + */ +#ifndef CHECKSUM_CHECK_UDP +#define CHECKSUM_CHECK_UDP 1 +#endif + +/** + * CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets. + */ +#ifndef CHECKSUM_CHECK_TCP +#define CHECKSUM_CHECK_TCP 1 +#endif + +/** + * LWIP_CHECKSUM_ON_COPY==1: Calculate checksum when copying data from + * application buffers to pbufs. + */ +#ifndef LWIP_CHECKSUM_ON_COPY +#define LWIP_CHECKSUM_ON_COPY 0 +#endif + +/* + --------------------------------------- + ---------- Debugging options ---------- + --------------------------------------- +*/ +/** + * LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is + * compared against this value. If it is smaller, then debugging + * messages are written. + */ +#ifndef LWIP_DBG_MIN_LEVEL +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL +#endif + +/** + * LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable + * debug messages of certain types. + */ +#ifndef LWIP_DBG_TYPES_ON +#define LWIP_DBG_TYPES_ON LWIP_DBG_OFF +#endif + +/** + * ETHARP_DEBUG: Enable debugging in etharp.c. + */ +#ifndef ETHARP_DEBUG +#define ETHARP_DEBUG LWIP_DBG_OFF +#endif + +/** + * NETIF_DEBUG: Enable debugging in netif.c. + */ +#ifndef NETIF_DEBUG +#define NETIF_DEBUG LWIP_DBG_OFF +#endif + +/** + * PBUF_DEBUG: Enable debugging in pbuf.c. + */ +#ifndef PBUF_DEBUG +#define PBUF_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_LIB_DEBUG: Enable debugging in api_lib.c. + */ +#ifndef API_LIB_DEBUG +#define API_LIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_MSG_DEBUG: Enable debugging in api_msg.c. + */ +#ifndef API_MSG_DEBUG +#define API_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SOCKETS_DEBUG: Enable debugging in sockets.c. + */ +#ifndef SOCKETS_DEBUG +#define SOCKETS_DEBUG LWIP_DBG_OFF +#endif + +/** + * ICMP_DEBUG: Enable debugging in icmp.c. + */ +#ifndef ICMP_DEBUG +#define ICMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IGMP_DEBUG: Enable debugging in igmp.c. + */ +#ifndef IGMP_DEBUG +#define IGMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * INET_DEBUG: Enable debugging in inet.c. + */ +#ifndef INET_DEBUG +#define INET_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_DEBUG: Enable debugging for IP. + */ +#ifndef IP_DEBUG +#define IP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass. + */ +#ifndef IP_REASS_DEBUG +#define IP_REASS_DEBUG LWIP_DBG_OFF +#endif + +/** + * RAW_DEBUG: Enable debugging in raw.c. + */ +#ifndef RAW_DEBUG +#define RAW_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEM_DEBUG: Enable debugging in mem.c. + */ +#ifndef MEM_DEBUG +#define MEM_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEMP_DEBUG: Enable debugging in memp.c. + */ +#ifndef MEMP_DEBUG +#define MEMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SYS_DEBUG: Enable debugging in sys.c. + */ +#ifndef SYS_DEBUG +#define SYS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TIMERS_DEBUG: Enable debugging in timers.c. + */ +#ifndef TIMERS_DEBUG +#define TIMERS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_DEBUG: Enable debugging for TCP. + */ +#ifndef TCP_DEBUG +#define TCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug. + */ +#ifndef TCP_INPUT_DEBUG +#define TCP_INPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit. + */ +#ifndef TCP_FR_DEBUG +#define TCP_FR_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RTO_DEBUG: Enable debugging in TCP for retransmit + * timeout. + */ +#ifndef TCP_RTO_DEBUG +#define TCP_RTO_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_CWND_DEBUG: Enable debugging for TCP congestion window. + */ +#ifndef TCP_CWND_DEBUG +#define TCP_CWND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating. + */ +#ifndef TCP_WND_DEBUG +#define TCP_WND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions. + */ +#ifndef TCP_OUTPUT_DEBUG +#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RST_DEBUG: Enable debugging for TCP with the RST message. + */ +#ifndef TCP_RST_DEBUG +#define TCP_RST_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths. + */ +#ifndef TCP_QLEN_DEBUG +#define TCP_QLEN_DEBUG LWIP_DBG_OFF +#endif + +/** + * UDP_DEBUG: Enable debugging in UDP. + */ +#ifndef UDP_DEBUG +#define UDP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCPIP_DEBUG: Enable debugging in tcpip.c. + */ +#ifndef TCPIP_DEBUG +#define TCPIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * PPP_DEBUG: Enable debugging for PPP. + */ +#ifndef PPP_DEBUG +#define PPP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SLIP_DEBUG: Enable debugging in slipif.c. + */ +#ifndef SLIP_DEBUG +#define SLIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * DHCP_DEBUG: Enable debugging in dhcp.c. + */ +#ifndef DHCP_DEBUG +#define DHCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * AUTOIP_DEBUG: Enable debugging in autoip.c. + */ +#ifndef AUTOIP_DEBUG +#define AUTOIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MSG_DEBUG: Enable debugging for SNMP messages. + */ +#ifndef SNMP_MSG_DEBUG +#define SNMP_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs. + */ +#ifndef SNMP_MIB_DEBUG +#define SNMP_MIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * DNS_DEBUG: Enable debugging for DNS. + */ +#ifndef DNS_DEBUG +#define DNS_DEBUG LWIP_DBG_OFF +#endif + +#endif /* __LWIP_OPT_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/aes.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/aes.h new file mode 100644 index 0000000..a36e825 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/aes.h @@ -0,0 +1,297 @@ +/** + * \file aes.h + * + * \brief AES block cipher + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_AES_H +#define MBEDTLS_AES_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +/* padlock.c and aesni.c rely on these values! */ +#define MBEDTLS_AES_ENCRYPT 1 +#define MBEDTLS_AES_DECRYPT 0 + +#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH -0x0020 /**< Invalid key length. */ +#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH -0x0022 /**< Invalid data input length. */ + +#if !defined(MBEDTLS_AES_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief AES context structure + * + * \note buf is able to hold 32 extra bytes, which can be used: + * - for alignment purposes if VIA padlock is used, and/or + * - to simplify key expansion in the 256-bit case by + * generating an extra round key + */ +typedef struct +{ + int nr; /*!< number of rounds */ + uint32_t *rk; /*!< AES round keys */ + uint32_t buf[68]; /*!< unaligned data */ +} +mbedtls_aes_context; + +/** + * \brief Initialize AES context + * + * \param ctx AES context to be initialized + */ +void mbedtls_aes_init( mbedtls_aes_context *ctx ); + +/** + * \brief Clear AES context + * + * \param ctx AES context to be cleared + */ +void mbedtls_aes_free( mbedtls_aes_context *ctx ); + +/** + * \brief AES key schedule (encryption) + * + * \param ctx AES context to be initialized + * \param key encryption key + * \param keybits must be 128, 192 or 256 + * + * \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH + */ +int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ); + +/** + * \brief AES key schedule (decryption) + * + * \param ctx AES context to be initialized + * \param key decryption key + * \param keybits must be 128, 192 or 256 + * + * \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH + */ +int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ); + +/** + * \brief AES-ECB block encryption/decryption + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param input 16-byte input block + * \param output 16-byte output block + * + * \return 0 if successful + */ +int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/** + * \brief AES-CBC buffer encryption/decryption + * Length should be a multiple of the block + * size (16 bytes) + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param length length of the input data + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH + */ +int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +/** + * \brief AES-CFB128 buffer encryption/decryption. + * + * Note: Due to the nature of CFB you should use the same key schedule for + * both encryption and decryption. So a context initialized with + * mbedtls_aes_setkey_enc() for both MBEDTLS_AES_ENCRYPT and MBEDTLS_AES_DECRYPT. + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param length length of the input data + * \param iv_off offset in IV (updated after use) + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful + */ +int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx, + int mode, + size_t length, + size_t *iv_off, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ); + +/** + * \brief AES-CFB8 buffer encryption/decryption. + * + * Note: Due to the nature of CFB you should use the same key schedule for + * both encryption and decryption. So a context initialized with + * mbedtls_aes_setkey_enc() for both MBEDTLS_AES_ENCRYPT and MBEDTLS_AES_DECRYPT. + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param length length of the input data + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful + */ +int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ); +#endif /*MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/** + * \brief AES-CTR buffer encryption/decryption + * + * Warning: You have to keep the maximum use of your counter in mind! + * + * Note: Due to the nature of CTR you should use the same key schedule for + * both encryption and decryption. So a context initialized with + * mbedtls_aes_setkey_enc() for both MBEDTLS_AES_ENCRYPT and MBEDTLS_AES_DECRYPT. + * + * \param ctx AES context + * \param length The length of the data + * \param nc_off The offset in the current stream_block (for resuming + * within current cipher stream). The offset pointer to + * should be 0 at the start of a stream. + * \param nonce_counter The 128-bit nonce and counter. + * \param stream_block The saved stream-block for resuming. Is overwritten + * by the function. + * \param input The input data stream + * \param output The output data stream + * + * \return 0 if successful + */ +int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx, + size_t length, + size_t *nc_off, + unsigned char nonce_counter[16], + unsigned char stream_block[16], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +/** + * \brief Internal AES block encryption function + * (Only exposed to allow overriding it, + * see MBEDTLS_AES_ENCRYPT_ALT) + * + * \param ctx AES context + * \param input Plaintext block + * \param output Output (ciphertext) block + */ +void mbedtls_aes_encrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ); + +/** + * \brief Internal AES block decryption function + * (Only exposed to allow overriding it, + * see MBEDTLS_AES_DECRYPT_ALT) + * + * \param ctx AES context + * \param input Ciphertext block + * \param output Output (plaintext) block + */ +void mbedtls_aes_decrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_AES_ALT */ +#include "aes_alt.h" +#endif /* MBEDTLS_AES_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_aes_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* aes.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/aesni.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/aesni.h new file mode 100644 index 0000000..b1b7f1c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/aesni.h @@ -0,0 +1,111 @@ +/** + * \file aesni.h + * + * \brief AES-NI for hardware AES acceleration on some Intel processors + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_AESNI_H +#define MBEDTLS_AESNI_H + +#include "aes.h" + +#define MBEDTLS_AESNI_AES 0x02000000u +#define MBEDTLS_AESNI_CLMUL 0x00000002u + +#if defined(MBEDTLS_HAVE_ASM) && defined(__GNUC__) && \ + ( defined(__amd64__) || defined(__x86_64__) ) && \ + ! defined(MBEDTLS_HAVE_X86_64) +#define MBEDTLS_HAVE_X86_64 +#endif + +#if defined(MBEDTLS_HAVE_X86_64) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief AES-NI features detection routine + * + * \param what The feature to detect + * (MBEDTLS_AESNI_AES or MBEDTLS_AESNI_CLMUL) + * + * \return 1 if CPU has support for the feature, 0 otherwise + */ +int mbedtls_aesni_has_support( unsigned int what ); + +/** + * \brief AES-NI AES-ECB block en(de)cryption + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param input 16-byte input block + * \param output 16-byte output block + * + * \return 0 on success (cannot fail) + */ +int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ); + +/** + * \brief GCM multiplication: c = a * b in GF(2^128) + * + * \param c Result + * \param a First operand + * \param b Second operand + * + * \note Both operands and result are bit strings interpreted as + * elements of GF(2^128) as per the GCM spec. + */ +void mbedtls_aesni_gcm_mult( unsigned char c[16], + const unsigned char a[16], + const unsigned char b[16] ); + +/** + * \brief Compute decryption round keys from encryption round keys + * + * \param invkey Round keys for the equivalent inverse cipher + * \param fwdkey Original round keys (for encryption) + * \param nr Number of rounds (that is, number of round keys minus one) + */ +void mbedtls_aesni_inverse_key( unsigned char *invkey, + const unsigned char *fwdkey, int nr ); + +/** + * \brief Perform key expansion (for encryption) + * + * \param rk Destination buffer where the round keys are written + * \param key Encryption key + * \param bits Key size in bits (must be 128, 192 or 256) + * + * \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH + */ +int mbedtls_aesni_setkey_enc( unsigned char *rk, + const unsigned char *key, + size_t bits ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_HAVE_X86_64 */ + +#endif /* MBEDTLS_AESNI_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/arc4.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/arc4.h new file mode 100644 index 0000000..5fc5395 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/arc4.h @@ -0,0 +1,113 @@ +/** + * \file arc4.h + * + * \brief The ARCFOUR stream cipher + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ARC4_H +#define MBEDTLS_ARC4_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +#if !defined(MBEDTLS_ARC4_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief ARC4 context structure + */ +typedef struct +{ + int x; /*!< permutation index */ + int y; /*!< permutation index */ + unsigned char m[256]; /*!< permutation table */ +} +mbedtls_arc4_context; + +/** + * \brief Initialize ARC4 context + * + * \param ctx ARC4 context to be initialized + */ +void mbedtls_arc4_init( mbedtls_arc4_context *ctx ); + +/** + * \brief Clear ARC4 context + * + * \param ctx ARC4 context to be cleared + */ +void mbedtls_arc4_free( mbedtls_arc4_context *ctx ); + +/** + * \brief ARC4 key schedule + * + * \param ctx ARC4 context to be setup + * \param key the secret key + * \param keylen length of the key, in bytes + */ +void mbedtls_arc4_setup( mbedtls_arc4_context *ctx, const unsigned char *key, + unsigned int keylen ); + +/** + * \brief ARC4 cipher function + * + * \param ctx ARC4 context + * \param length length of the input data + * \param input buffer holding the input data + * \param output buffer for the output data + * + * \return 0 if successful + */ +int mbedtls_arc4_crypt( mbedtls_arc4_context *ctx, size_t length, const unsigned char *input, + unsigned char *output ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_ARC4_ALT */ +#include "arc4_alt.h" +#endif /* MBEDTLS_ARC4_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_arc4_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* arc4.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/asn1.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/asn1.h new file mode 100644 index 0000000..082832c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/asn1.h @@ -0,0 +1,342 @@ +/** + * \file asn1.h + * + * \brief Generic ASN.1 parsing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ASN1_H +#define MBEDTLS_ASN1_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +#if defined(MBEDTLS_BIGNUM_C) +#include "bignum.h" +#endif + +/** + * \addtogroup asn1_module + * \{ + */ + +/** + * \name ASN1 Error codes + * These error codes are OR'ed to X509 error codes for + * higher error granularity. + * ASN1 is a standard to specify data structures. + * \{ + */ +#define MBEDTLS_ERR_ASN1_OUT_OF_DATA -0x0060 /**< Out of data when parsing an ASN1 data structure. */ +#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG -0x0062 /**< ASN1 tag was of an unexpected value. */ +#define MBEDTLS_ERR_ASN1_INVALID_LENGTH -0x0064 /**< Error when trying to determine the length or invalid length. */ +#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH -0x0066 /**< Actual length differs from expected length. */ +#define MBEDTLS_ERR_ASN1_INVALID_DATA -0x0068 /**< Data is invalid. (not used) */ +#define MBEDTLS_ERR_ASN1_ALLOC_FAILED -0x006A /**< Memory allocation failed */ +#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL -0x006C /**< Buffer too small when writing ASN.1 data structure. */ + +/* \} name */ + +/** + * \name DER constants + * These constants comply with DER encoded the ANS1 type tags. + * DER encoding uses hexadecimal representation. + * An example DER sequence is:\n + * - 0x02 -- tag indicating INTEGER + * - 0x01 -- length in octets + * - 0x05 -- value + * Such sequences are typically read into \c ::mbedtls_x509_buf. + * \{ + */ +#define MBEDTLS_ASN1_BOOLEAN 0x01 +#define MBEDTLS_ASN1_INTEGER 0x02 +#define MBEDTLS_ASN1_BIT_STRING 0x03 +#define MBEDTLS_ASN1_OCTET_STRING 0x04 +#define MBEDTLS_ASN1_NULL 0x05 +#define MBEDTLS_ASN1_OID 0x06 +#define MBEDTLS_ASN1_UTF8_STRING 0x0C +#define MBEDTLS_ASN1_SEQUENCE 0x10 +#define MBEDTLS_ASN1_SET 0x11 +#define MBEDTLS_ASN1_PRINTABLE_STRING 0x13 +#define MBEDTLS_ASN1_T61_STRING 0x14 +#define MBEDTLS_ASN1_IA5_STRING 0x16 +#define MBEDTLS_ASN1_UTC_TIME 0x17 +#define MBEDTLS_ASN1_GENERALIZED_TIME 0x18 +#define MBEDTLS_ASN1_UNIVERSAL_STRING 0x1C +#define MBEDTLS_ASN1_BMP_STRING 0x1E +#define MBEDTLS_ASN1_PRIMITIVE 0x00 +#define MBEDTLS_ASN1_CONSTRUCTED 0x20 +#define MBEDTLS_ASN1_CONTEXT_SPECIFIC 0x80 +/* \} name */ +/* \} addtogroup asn1_module */ + +/** Returns the size of the binary string, without the trailing \\0 */ +#define MBEDTLS_OID_SIZE(x) (sizeof(x) - 1) + +/** + * Compares an mbedtls_asn1_buf structure to a reference OID. + * + * Only works for 'defined' oid_str values (MBEDTLS_OID_HMAC_SHA1), you cannot use a + * 'unsigned char *oid' here! + */ +#define MBEDTLS_OID_CMP(oid_str, oid_buf) \ + ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf)->len ) || \ + memcmp( (oid_str), (oid_buf)->p, (oid_buf)->len) != 0 ) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \name Functions to parse ASN.1 data structures + * \{ + */ + +/** + * Type-length-value structure that allows for ASN1 using DER. + */ +typedef struct mbedtls_asn1_buf +{ + int tag; /**< ASN1 type, e.g. MBEDTLS_ASN1_UTF8_STRING. */ + size_t len; /**< ASN1 length, in octets. */ + unsigned char *p; /**< ASN1 data, e.g. in ASCII. */ +} +mbedtls_asn1_buf; + +/** + * Container for ASN1 bit strings. + */ +typedef struct mbedtls_asn1_bitstring +{ + size_t len; /**< ASN1 length, in octets. */ + unsigned char unused_bits; /**< Number of unused bits at the end of the string */ + unsigned char *p; /**< Raw ASN1 data for the bit string */ +} +mbedtls_asn1_bitstring; + +/** + * Container for a sequence of ASN.1 items + */ +typedef struct mbedtls_asn1_sequence +{ + mbedtls_asn1_buf buf; /**< Buffer containing the given ASN.1 item. */ + struct mbedtls_asn1_sequence *next; /**< The next entry in the sequence. */ +} +mbedtls_asn1_sequence; + +/** + * Container for a sequence or list of 'named' ASN.1 data items + */ +typedef struct mbedtls_asn1_named_data +{ + mbedtls_asn1_buf oid; /**< The object identifier. */ + mbedtls_asn1_buf val; /**< The named value. */ + struct mbedtls_asn1_named_data *next; /**< The next entry in the sequence. */ + unsigned char next_merged; /**< Merge next item into the current one? */ +} +mbedtls_asn1_named_data; + +/** + * \brief Get the length of an ASN.1 element. + * Updates the pointer to immediately behind the length. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param len The variable that will receive the value + * + * \return 0 if successful, MBEDTLS_ERR_ASN1_OUT_OF_DATA on reaching + * end of data, MBEDTLS_ERR_ASN1_INVALID_LENGTH if length is + * unparseable. + */ +int mbedtls_asn1_get_len( unsigned char **p, + const unsigned char *end, + size_t *len ); + +/** + * \brief Get the tag and length of the tag. Check for the requested tag. + * Updates the pointer to immediately behind the tag and length. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param len The variable that will receive the length + * \param tag The expected tag + * + * \return 0 if successful, MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if tag did + * not match requested tag, or another specific ASN.1 error code. + */ +int mbedtls_asn1_get_tag( unsigned char **p, + const unsigned char *end, + size_t *len, int tag ); + +/** + * \brief Retrieve a boolean ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param val The variable that will receive the value + * + * \return 0 if successful or a specific ASN.1 error code. + */ +int mbedtls_asn1_get_bool( unsigned char **p, + const unsigned char *end, + int *val ); + +/** + * \brief Retrieve an integer ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param val The variable that will receive the value + * + * \return 0 if successful or a specific ASN.1 error code. + */ +int mbedtls_asn1_get_int( unsigned char **p, + const unsigned char *end, + int *val ); + +/** + * \brief Retrieve a bitstring ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param bs The variable that will receive the value + * + * \return 0 if successful or a specific ASN.1 error code. + */ +int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end, + mbedtls_asn1_bitstring *bs); + +/** + * \brief Retrieve a bitstring ASN.1 tag without unused bits and its + * value. + * Updates the pointer to the beginning of the bit/octet string. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param len Length of the actual bit/octect string in bytes + * + * \return 0 if successful or a specific ASN.1 error code. + */ +int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end, + size_t *len ); + +/** + * \brief Parses and splits an ASN.1 "SEQUENCE OF " + * Updated the pointer to immediately behind the full sequence tag. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param cur First variable in the chain to fill + * \param tag Type of sequence + * + * \return 0 if successful or a specific ASN.1 error code. + */ +int mbedtls_asn1_get_sequence_of( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_sequence *cur, + int tag); + +#if defined(MBEDTLS_BIGNUM_C) +/** + * \brief Retrieve a MPI value from an integer ASN.1 tag. + * Updates the pointer to immediately behind the full tag. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param X The MPI that will receive the value + * + * \return 0 if successful or a specific ASN.1 or MPI error code. + */ +int mbedtls_asn1_get_mpi( unsigned char **p, + const unsigned char *end, + mbedtls_mpi *X ); +#endif /* MBEDTLS_BIGNUM_C */ + +/** + * \brief Retrieve an AlgorithmIdentifier ASN.1 sequence. + * Updates the pointer to immediately behind the full + * AlgorithmIdentifier. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param alg The buffer to receive the OID + * \param params The buffer to receive the params (if any) + * + * \return 0 if successful or a specific ASN.1 or MPI error code. + */ +int mbedtls_asn1_get_alg( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg, mbedtls_asn1_buf *params ); + +/** + * \brief Retrieve an AlgorithmIdentifier ASN.1 sequence with NULL or no + * params. + * Updates the pointer to immediately behind the full + * AlgorithmIdentifier. + * + * \param p The position in the ASN.1 data + * \param end End of data + * \param alg The buffer to receive the OID + * + * \return 0 if successful or a specific ASN.1 or MPI error code. + */ +int mbedtls_asn1_get_alg_null( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg ); + +/** + * \brief Find a specific named_data entry in a sequence or list based on + * the OID. + * + * \param list The list to seek through + * \param oid The OID to look for + * \param len Size of the OID + * + * \return NULL if not found, or a pointer to the existing entry. + */ +mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( mbedtls_asn1_named_data *list, + const char *oid, size_t len ); + +/** + * \brief Free a mbedtls_asn1_named_data entry + * + * \param entry The named data entry to free + */ +void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *entry ); + +/** + * \brief Free all entries in a mbedtls_asn1_named_data list + * Head will be set to NULL + * + * \param head Pointer to the head of the list of named data entries to free + */ +void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head ); + +#ifdef __cplusplus +} +#endif + +#endif /* asn1.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/asn1write.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/asn1write.h new file mode 100644 index 0000000..73ff32b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/asn1write.h @@ -0,0 +1,239 @@ +/** + * \file asn1write.h + * + * \brief ASN.1 buffer writing functionality + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ASN1_WRITE_H +#define MBEDTLS_ASN1_WRITE_H + +#include "asn1.h" + +#define MBEDTLS_ASN1_CHK_ADD(g, f) do { if( ( ret = f ) < 0 ) return( ret ); else \ + g += ret; } while( 0 ) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Write a length field in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param len the length to write + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_len( unsigned char **p, unsigned char *start, size_t len ); + +/** + * \brief Write a ASN.1 tag in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param tag the tag to write + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_tag( unsigned char **p, unsigned char *start, + unsigned char tag ); + +/** + * \brief Write raw buffer data + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param buf data buffer to write + * \param size length of the data buffer + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_raw_buffer( unsigned char **p, unsigned char *start, + const unsigned char *buf, size_t size ); + +#if defined(MBEDTLS_BIGNUM_C) +/** + * \brief Write a big number (MBEDTLS_ASN1_INTEGER) in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param X the MPI to write + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_mpi( unsigned char **p, unsigned char *start, const mbedtls_mpi *X ); +#endif /* MBEDTLS_BIGNUM_C */ + +/** + * \brief Write a NULL tag (MBEDTLS_ASN1_NULL) with zero data in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_null( unsigned char **p, unsigned char *start ); + +/** + * \brief Write an OID tag (MBEDTLS_ASN1_OID) and data in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param oid the OID to write + * \param oid_len length of the OID + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_oid( unsigned char **p, unsigned char *start, + const char *oid, size_t oid_len ); + +/** + * \brief Write an AlgorithmIdentifier sequence in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param oid the OID of the algorithm + * \param oid_len length of the OID + * \param par_len length of parameters, which must be already written. + * If 0, NULL parameters are added + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_algorithm_identifier( unsigned char **p, unsigned char *start, + const char *oid, size_t oid_len, + size_t par_len ); + +/** + * \brief Write a boolean tag (MBEDTLS_ASN1_BOOLEAN) and value in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param boolean 0 or 1 + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_bool( unsigned char **p, unsigned char *start, int boolean ); + +/** + * \brief Write an int tag (MBEDTLS_ASN1_INTEGER) and value in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param val the integer value + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_int( unsigned char **p, unsigned char *start, int val ); + +/** + * \brief Write a printable string tag (MBEDTLS_ASN1_PRINTABLE_STRING) and + * value in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param text the text to write + * \param text_len length of the text + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_printable_string( unsigned char **p, unsigned char *start, + const char *text, size_t text_len ); + +/** + * \brief Write an IA5 string tag (MBEDTLS_ASN1_IA5_STRING) and + * value in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param text the text to write + * \param text_len length of the text + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_ia5_string( unsigned char **p, unsigned char *start, + const char *text, size_t text_len ); + +/** + * \brief Write a bitstring tag (MBEDTLS_ASN1_BIT_STRING) and + * value in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param buf the bitstring + * \param bits the total number of bits in the bitstring + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_bitstring( unsigned char **p, unsigned char *start, + const unsigned char *buf, size_t bits ); + +/** + * \brief Write an octet string tag (MBEDTLS_ASN1_OCTET_STRING) and + * value in ASN.1 format + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param buf data buffer to write + * \param size length of the data buffer + * + * \return the length written or a negative error code + */ +int mbedtls_asn1_write_octet_string( unsigned char **p, unsigned char *start, + const unsigned char *buf, size_t size ); + +/** + * \brief Create or find a specific named_data entry for writing in a + * sequence or list based on the OID. If not already in there, + * a new entry is added to the head of the list. + * Warning: Destructive behaviour for the val data! + * + * \param list Pointer to the location of the head of the list to seek + * through (will be updated in case of a new entry) + * \param oid The OID to look for + * \param oid_len Size of the OID + * \param val Data to store (can be NULL if you want to fill it by hand) + * \param val_len Minimum length of the data buffer needed + * + * \return NULL if if there was a memory allocation error, or a pointer + * to the new / existing entry. + */ +mbedtls_asn1_named_data *mbedtls_asn1_store_named_data( mbedtls_asn1_named_data **list, + const char *oid, size_t oid_len, + const unsigned char *val, + size_t val_len ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_ASN1_WRITE_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/base64.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/base64.h new file mode 100644 index 0000000..352c652 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/base64.h @@ -0,0 +1,88 @@ +/** + * \file base64.h + * + * \brief RFC 1521 base64 encoding/decoding + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_BASE64_H +#define MBEDTLS_BASE64_H + +#include + +#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL -0x002A /**< Output buffer too small. */ +#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER -0x002C /**< Invalid character in input. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Encode a buffer into base64 format + * + * \param dst destination buffer + * \param dlen size of the destination buffer + * \param olen number of bytes written + * \param src source buffer + * \param slen amount of data to be encoded + * + * \return 0 if successful, or MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL. + * *olen is always updated to reflect the amount + * of data that has (or would have) been written. + * If that length cannot be represented, then no data is + * written to the buffer and *olen is set to the maximum + * length representable as a size_t. + * + * \note Call this function with dlen = 0 to obtain the + * required buffer size in *olen + */ +int mbedtls_base64_encode( unsigned char *dst, size_t dlen, size_t *olen, + const unsigned char *src, size_t slen ); + +/** + * \brief Decode a base64-formatted buffer + * + * \param dst destination buffer (can be NULL for checking size) + * \param dlen size of the destination buffer + * \param olen number of bytes written + * \param src source buffer + * \param slen amount of data to be decoded + * + * \return 0 if successful, MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL, or + * MBEDTLS_ERR_BASE64_INVALID_CHARACTER if the input data is + * not correct. *olen is always updated to reflect the amount + * of data that has (or would have) been written. + * + * \note Call this function with *dst = NULL or dlen = 0 to obtain + * the required buffer size in *olen + */ +int mbedtls_base64_decode( unsigned char *dst, size_t dlen, size_t *olen, + const unsigned char *src, size_t slen ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_base64_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* base64.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/bignum.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/bignum.h new file mode 100644 index 0000000..aa51556 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/bignum.h @@ -0,0 +1,717 @@ +/** + * \file bignum.h + * + * \brief Multi-precision integer library + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_BIGNUM_H +#define MBEDTLS_BIGNUM_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#if defined(MBEDTLS_FS_IO) +#include +#endif + +#define MBEDTLS_ERR_MPI_FILE_IO_ERROR -0x0002 /**< An error occurred while reading from or writing to a file. */ +#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA -0x0004 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_MPI_INVALID_CHARACTER -0x0006 /**< There is an invalid character in the digit string. */ +#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL -0x0008 /**< The buffer is too small to write to. */ +#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE -0x000A /**< The input arguments are negative or result in illegal output. */ +#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO -0x000C /**< The input argument for division is zero, which is not allowed. */ +#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE -0x000E /**< The input arguments are not acceptable. */ +#define MBEDTLS_ERR_MPI_ALLOC_FAILED -0x0010 /**< Memory allocation failed. */ + +#define MBEDTLS_MPI_CHK(f) do { if( ( ret = f ) != 0 ) goto cleanup; } while( 0 ) + +/* + * Maximum size MPIs are allowed to grow to in number of limbs. + */ +#define MBEDTLS_MPI_MAX_LIMBS 10000 + +#if !defined(MBEDTLS_MPI_WINDOW_SIZE) +/* + * Maximum window size used for modular exponentiation. Default: 6 + * Minimum value: 1. Maximum value: 6. + * + * Result is an array of ( 2 << MBEDTLS_MPI_WINDOW_SIZE ) MPIs used + * for the sliding window calculation. (So 64 by default) + * + * Reduction in size, reduces speed. + */ +#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */ +#endif /* !MBEDTLS_MPI_WINDOW_SIZE */ + +#if !defined(MBEDTLS_MPI_MAX_SIZE) +/* + * Maximum size of MPIs allowed in bits and bytes for user-MPIs. + * ( Default: 512 bytes => 4096 bits, Maximum tested: 2048 bytes => 16384 bits ) + * + * Note: Calculations can results temporarily in larger MPIs. So the number + * of limbs required (MBEDTLS_MPI_MAX_LIMBS) is higher. + */ +#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */ +#endif /* !MBEDTLS_MPI_MAX_SIZE */ + +#define MBEDTLS_MPI_MAX_BITS ( 8 * MBEDTLS_MPI_MAX_SIZE ) /**< Maximum number of bits for usable MPIs. */ + +/* + * When reading from files with mbedtls_mpi_read_file() and writing to files with + * mbedtls_mpi_write_file() the buffer should have space + * for a (short) label, the MPI (in the provided radix), the newline + * characters and the '\0'. + * + * By default we assume at least a 10 char label, a minimum radix of 10 + * (decimal) and a maximum of 4096 bit numbers (1234 decimal chars). + * Autosized at compile time for at least a 10 char label, a minimum radix + * of 10 (decimal) for a number of MBEDTLS_MPI_MAX_BITS size. + * + * This used to be statically sized to 1250 for a maximum of 4096 bit + * numbers (1234 decimal chars). + * + * Calculate using the formula: + * MBEDTLS_MPI_RW_BUFFER_SIZE = ceil(MBEDTLS_MPI_MAX_BITS / ln(10) * ln(2)) + + * LabelSize + 6 + */ +#define MBEDTLS_MPI_MAX_BITS_SCALE100 ( 100 * MBEDTLS_MPI_MAX_BITS ) +#define MBEDTLS_LN_2_DIV_LN_10_SCALE100 332 +#define MBEDTLS_MPI_RW_BUFFER_SIZE ( ((MBEDTLS_MPI_MAX_BITS_SCALE100 + MBEDTLS_LN_2_DIV_LN_10_SCALE100 - 1) / MBEDTLS_LN_2_DIV_LN_10_SCALE100) + 10 + 6 ) + +/* + * Define the base integer type, architecture-wise. + * + * 32-bit integers can be forced on 64-bit arches (eg. for testing purposes) + * by defining MBEDTLS_HAVE_INT32 and undefining MBEDTLS_HAVE_ASM + */ +#if ( ! defined(MBEDTLS_HAVE_INT32) && \ + defined(_MSC_VER) && defined(_M_AMD64) ) + #define MBEDTLS_HAVE_INT64 + typedef int64_t mbedtls_mpi_sint; + typedef uint64_t mbedtls_mpi_uint; +#else + #if ( ! defined(MBEDTLS_HAVE_INT32) && \ + defined(__GNUC__) && ( \ + defined(__amd64__) || defined(__x86_64__) || \ + defined(__ppc64__) || defined(__powerpc64__) || \ + defined(__ia64__) || defined(__alpha__) || \ + (defined(__sparc__) && defined(__arch64__)) || \ + defined(__s390x__) || defined(__mips64) ) ) + #define MBEDTLS_HAVE_INT64 + typedef int64_t mbedtls_mpi_sint; + typedef uint64_t mbedtls_mpi_uint; + /* mbedtls_t_udbl defined as 128-bit unsigned int */ + typedef unsigned int mbedtls_t_udbl __attribute__((mode(TI))); + #define MBEDTLS_HAVE_UDBL + #else + #define MBEDTLS_HAVE_INT32 + typedef int32_t mbedtls_mpi_sint; + typedef uint32_t mbedtls_mpi_uint; + typedef uint64_t mbedtls_t_udbl; + #define MBEDTLS_HAVE_UDBL + #endif /* !MBEDTLS_HAVE_INT32 && __GNUC__ && 64-bit platform */ +#endif /* !MBEDTLS_HAVE_INT32 && _MSC_VER && _M_AMD64 */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief MPI structure + */ +typedef struct +{ + int s; /*!< integer sign */ + size_t n; /*!< total # of limbs */ + mbedtls_mpi_uint *p; /*!< pointer to limbs */ +} +mbedtls_mpi; + +/** + * \brief Initialize one MPI (make internal references valid) + * This just makes it ready to be set or freed, + * but does not define a value for the MPI. + * + * \param X One MPI to initialize. + */ +void mbedtls_mpi_init( mbedtls_mpi *X ); + +/** + * \brief Unallocate one MPI + * + * \param X One MPI to unallocate. + */ +void mbedtls_mpi_free( mbedtls_mpi *X ); + +/** + * \brief Enlarge to the specified number of limbs + * + * \param X MPI to grow + * \param nblimbs The target number of limbs + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_grow( mbedtls_mpi *X, size_t nblimbs ); + +/** + * \brief Resize down, keeping at least the specified number of limbs + * + * \param X MPI to shrink + * \param nblimbs The minimum number of limbs to keep + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_shrink( mbedtls_mpi *X, size_t nblimbs ); + +/** + * \brief Copy the contents of Y into X + * + * \param X Destination MPI + * \param Y Source MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_copy( mbedtls_mpi *X, const mbedtls_mpi *Y ); + +/** + * \brief Swap the contents of X and Y + * + * \param X First MPI value + * \param Y Second MPI value + */ +void mbedtls_mpi_swap( mbedtls_mpi *X, mbedtls_mpi *Y ); + +/** + * \brief Safe conditional assignement X = Y if assign is 1 + * + * \param X MPI to conditionally assign to + * \param Y Value to be assigned + * \param assign 1: perform the assignment, 0: keep X's original value + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * + * \note This function is equivalent to + * if( assign ) mbedtls_mpi_copy( X, Y ); + * except that it avoids leaking any information about whether + * the assignment was done or not (the above code may leak + * information through branch prediction and/or memory access + * patterns analysis). + */ +int mbedtls_mpi_safe_cond_assign( mbedtls_mpi *X, const mbedtls_mpi *Y, unsigned char assign ); + +/** + * \brief Safe conditional swap X <-> Y if swap is 1 + * + * \param X First mbedtls_mpi value + * \param Y Second mbedtls_mpi value + * \param assign 1: perform the swap, 0: keep X and Y's original values + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * + * \note This function is equivalent to + * if( assign ) mbedtls_mpi_swap( X, Y ); + * except that it avoids leaking any information about whether + * the assignment was done or not (the above code may leak + * information through branch prediction and/or memory access + * patterns analysis). + */ +int mbedtls_mpi_safe_cond_swap( mbedtls_mpi *X, mbedtls_mpi *Y, unsigned char assign ); + +/** + * \brief Set value from integer + * + * \param X MPI to set + * \param z Value to use + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_lset( mbedtls_mpi *X, mbedtls_mpi_sint z ); + +/** + * \brief Get a specific bit from X + * + * \param X MPI to use + * \param pos Zero-based index of the bit in X + * + * \return Either a 0 or a 1 + */ +int mbedtls_mpi_get_bit( const mbedtls_mpi *X, size_t pos ); + +/** + * \brief Set a bit of X to a specific value of 0 or 1 + * + * \note Will grow X if necessary to set a bit to 1 in a not yet + * existing limb. Will not grow if bit should be set to 0 + * + * \param X MPI to use + * \param pos Zero-based index of the bit in X + * \param val The value to set the bit to (0 or 1) + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_BAD_INPUT_DATA if val is not 0 or 1 + */ +int mbedtls_mpi_set_bit( mbedtls_mpi *X, size_t pos, unsigned char val ); + +/** + * \brief Return the number of zero-bits before the least significant + * '1' bit + * + * Note: Thus also the zero-based index of the least significant '1' bit + * + * \param X MPI to use + */ +size_t mbedtls_mpi_lsb( const mbedtls_mpi *X ); + +/** + * \brief Return the number of bits up to and including the most + * significant '1' bit' + * + * Note: Thus also the one-based index of the most significant '1' bit + * + * \param X MPI to use + */ +size_t mbedtls_mpi_bitlen( const mbedtls_mpi *X ); + +/** + * \brief Return the total size in bytes + * + * \param X MPI to use + */ +size_t mbedtls_mpi_size( const mbedtls_mpi *X ); + +/** + * \brief Import from an ASCII string + * + * \param X Destination MPI + * \param radix Input numeric base + * \param s Null-terminated string buffer + * + * \return 0 if successful, or a MBEDTLS_ERR_MPI_XXX error code + */ +int mbedtls_mpi_read_string( mbedtls_mpi *X, int radix, const char *s ); + +/** + * \brief Export into an ASCII string + * + * \param X Source MPI + * \param radix Output numeric base + * \param buf Buffer to write the string to + * \param buflen Length of buf + * \param olen Length of the string written, including final NUL byte + * + * \return 0 if successful, or a MBEDTLS_ERR_MPI_XXX error code. + * *olen is always updated to reflect the amount + * of data that has (or would have) been written. + * + * \note Call this function with buflen = 0 to obtain the + * minimum required buffer size in *olen. + */ +int mbedtls_mpi_write_string( const mbedtls_mpi *X, int radix, + char *buf, size_t buflen, size_t *olen ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Read X from an opened file + * + * \param X Destination MPI + * \param radix Input numeric base + * \param fin Input file handle + * + * \return 0 if successful, MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if + * the file read buffer is too small or a + * MBEDTLS_ERR_MPI_XXX error code + */ +int mbedtls_mpi_read_file( mbedtls_mpi *X, int radix, FILE *fin ); + +/** + * \brief Write X into an opened file, or stdout if fout is NULL + * + * \param p Prefix, can be NULL + * \param X Source MPI + * \param radix Output numeric base + * \param fout Output file handle (can be NULL) + * + * \return 0 if successful, or a MBEDTLS_ERR_MPI_XXX error code + * + * \note Set fout == NULL to print X on the console. + */ +int mbedtls_mpi_write_file( const char *p, const mbedtls_mpi *X, int radix, FILE *fout ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief Import X from unsigned binary data, big endian + * + * \param X Destination MPI + * \param buf Input buffer + * \param buflen Input buffer size + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf, size_t buflen ); + +/** + * \brief Export X into unsigned binary data, big endian. + * Always fills the whole buffer, which will start with zeros + * if the number is smaller. + * + * \param X Source MPI + * \param buf Output buffer + * \param buflen Output buffer size + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if buf isn't large enough + */ +int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf, size_t buflen ); + +/** + * \brief Left-shift: X <<= count + * + * \param X MPI to shift + * \param count Amount to shift + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_shift_l( mbedtls_mpi *X, size_t count ); + +/** + * \brief Right-shift: X >>= count + * + * \param X MPI to shift + * \param count Amount to shift + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_shift_r( mbedtls_mpi *X, size_t count ); + +/** + * \brief Compare unsigned values + * + * \param X Left-hand MPI + * \param Y Right-hand MPI + * + * \return 1 if |X| is greater than |Y|, + * -1 if |X| is lesser than |Y| or + * 0 if |X| is equal to |Y| + */ +int mbedtls_mpi_cmp_abs( const mbedtls_mpi *X, const mbedtls_mpi *Y ); + +/** + * \brief Compare signed values + * + * \param X Left-hand MPI + * \param Y Right-hand MPI + * + * \return 1 if X is greater than Y, + * -1 if X is lesser than Y or + * 0 if X is equal to Y + */ +int mbedtls_mpi_cmp_mpi( const mbedtls_mpi *X, const mbedtls_mpi *Y ); + +/** + * \brief Compare signed values + * + * \param X Left-hand MPI + * \param z The integer value to compare to + * + * \return 1 if X is greater than z, + * -1 if X is lesser than z or + * 0 if X is equal to z + */ +int mbedtls_mpi_cmp_int( const mbedtls_mpi *X, mbedtls_mpi_sint z ); + +/** + * \brief Unsigned addition: X = |A| + |B| + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_add_abs( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Unsigned subtraction: X = |A| - |B| + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_NEGATIVE_VALUE if B is greater than A + */ +int mbedtls_mpi_sub_abs( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Signed addition: X = A + B + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_add_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Signed subtraction: X = A - B + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_sub_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Signed addition: X = A + b + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param b The integer value to add + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_add_int( mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_sint b ); + +/** + * \brief Signed subtraction: X = A - b + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param b The integer value to subtract + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_sub_int( mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_sint b ); + +/** + * \brief Baseline multiplication: X = A * B + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_mul_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Baseline multiplication: X = A * b + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param b The unsigned integer value to multiply with + * + * \note b is unsigned + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_mul_int( mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_uint b ); + +/** + * \brief Division by mbedtls_mpi: A = Q * B + R + * + * \param Q Destination MPI for the quotient + * \param R Destination MPI for the rest value + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if B == 0 + * + * \note Either Q or R can be NULL. + */ +int mbedtls_mpi_div_mpi( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Division by int: A = Q * b + R + * + * \param Q Destination MPI for the quotient + * \param R Destination MPI for the rest value + * \param A Left-hand MPI + * \param b Integer to divide by + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if b == 0 + * + * \note Either Q or R can be NULL. + */ +int mbedtls_mpi_div_int( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A, mbedtls_mpi_sint b ); + +/** + * \brief Modulo: R = A mod B + * + * \param R Destination MPI for the rest value + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if B == 0, + * MBEDTLS_ERR_MPI_NEGATIVE_VALUE if B < 0 + */ +int mbedtls_mpi_mod_mpi( mbedtls_mpi *R, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Modulo: r = A mod b + * + * \param r Destination mbedtls_mpi_uint + * \param A Left-hand MPI + * \param b Integer to divide by + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if b == 0, + * MBEDTLS_ERR_MPI_NEGATIVE_VALUE if b < 0 + */ +int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A, mbedtls_mpi_sint b ); + +/** + * \brief Sliding-window exponentiation: X = A^E mod N + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param E Exponent MPI + * \param N Modular MPI + * \param _RR Speed-up MPI used for recalculations + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_BAD_INPUT_DATA if N is negative or even or + * if E is negative + * + * \note _RR is used to avoid re-computing R*R mod N across + * multiple calls, which speeds up things a bit. It can + * be set to NULL if the extra performance is unneeded. + */ +int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *E, const mbedtls_mpi *N, mbedtls_mpi *_RR ); + +/** + * \brief Fill an MPI X with size bytes of random + * + * \param X Destination MPI + * \param size Size in bytes + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Greatest common divisor: G = gcd(A, B) + * + * \param G Destination MPI + * \param A Left-hand MPI + * \param B Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_mpi_gcd( mbedtls_mpi *G, const mbedtls_mpi *A, const mbedtls_mpi *B ); + +/** + * \brief Modular inverse: X = A^-1 mod N + * + * \param X Destination MPI + * \param A Left-hand MPI + * \param N Right-hand MPI + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_BAD_INPUT_DATA if N is negative or nil + MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if A has no inverse mod N + */ +int mbedtls_mpi_inv_mod( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *N ); + +/** + * \brief Miller-Rabin primality test + * + * \param X MPI to check + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful (probably prime), + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if X is not prime + */ +int mbedtls_mpi_is_prime( const mbedtls_mpi *X, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Prime number generation + * + * \param X Destination MPI + * \param nbits Required size of X in bits + * ( 3 <= nbits <= MBEDTLS_MPI_MAX_BITS ) + * \param dh_flag If 1, then (X-1)/2 will be prime too + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful (probably prime), + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_MPI_BAD_INPUT_DATA if nbits is < 3 + */ +int mbedtls_mpi_gen_prime( mbedtls_mpi *X, size_t nbits, int dh_flag, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_mpi_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* bignum.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/blowfish.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/blowfish.h new file mode 100644 index 0000000..34626ee --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/blowfish.h @@ -0,0 +1,203 @@ +/** + * \file blowfish.h + * + * \brief Blowfish block cipher + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_BLOWFISH_H +#define MBEDTLS_BLOWFISH_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#define MBEDTLS_BLOWFISH_ENCRYPT 1 +#define MBEDTLS_BLOWFISH_DECRYPT 0 +#define MBEDTLS_BLOWFISH_MAX_KEY_BITS 448 +#define MBEDTLS_BLOWFISH_MIN_KEY_BITS 32 +#define MBEDTLS_BLOWFISH_ROUNDS 16 /**< Rounds to use. When increasing this value, make sure to extend the initialisation vectors */ +#define MBEDTLS_BLOWFISH_BLOCKSIZE 8 /* Blowfish uses 64 bit blocks */ + +#define MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH -0x0016 /**< Invalid key length. */ +#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018 /**< Invalid data input length. */ + +#if !defined(MBEDTLS_BLOWFISH_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Blowfish context structure + */ +typedef struct +{ + uint32_t P[MBEDTLS_BLOWFISH_ROUNDS + 2]; /*!< Blowfish round keys */ + uint32_t S[4][256]; /*!< key dependent S-boxes */ +} +mbedtls_blowfish_context; + +/** + * \brief Initialize Blowfish context + * + * \param ctx Blowfish context to be initialized + */ +void mbedtls_blowfish_init( mbedtls_blowfish_context *ctx ); + +/** + * \brief Clear Blowfish context + * + * \param ctx Blowfish context to be cleared + */ +void mbedtls_blowfish_free( mbedtls_blowfish_context *ctx ); + +/** + * \brief Blowfish key schedule + * + * \param ctx Blowfish context to be initialized + * \param key encryption key + * \param keybits must be between 32 and 448 bits + * + * \return 0 if successful, or MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH + */ +int mbedtls_blowfish_setkey( mbedtls_blowfish_context *ctx, const unsigned char *key, + unsigned int keybits ); + +/** + * \brief Blowfish-ECB block encryption/decryption + * + * \param ctx Blowfish context + * \param mode MBEDTLS_BLOWFISH_ENCRYPT or MBEDTLS_BLOWFISH_DECRYPT + * \param input 8-byte input block + * \param output 8-byte output block + * + * \return 0 if successful + */ +int mbedtls_blowfish_crypt_ecb( mbedtls_blowfish_context *ctx, + int mode, + const unsigned char input[MBEDTLS_BLOWFISH_BLOCKSIZE], + unsigned char output[MBEDTLS_BLOWFISH_BLOCKSIZE] ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/** + * \brief Blowfish-CBC buffer encryption/decryption + * Length should be a multiple of the block + * size (8 bytes) + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx Blowfish context + * \param mode MBEDTLS_BLOWFISH_ENCRYPT or MBEDTLS_BLOWFISH_DECRYPT + * \param length length of the input data + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful, or + * MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH + */ +int mbedtls_blowfish_crypt_cbc( mbedtls_blowfish_context *ctx, + int mode, + size_t length, + unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +/** + * \brief Blowfish CFB buffer encryption/decryption. + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx Blowfish context + * \param mode MBEDTLS_BLOWFISH_ENCRYPT or MBEDTLS_BLOWFISH_DECRYPT + * \param length length of the input data + * \param iv_off offset in IV (updated after use) + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful + */ +int mbedtls_blowfish_crypt_cfb64( mbedtls_blowfish_context *ctx, + int mode, + size_t length, + size_t *iv_off, + unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE], + const unsigned char *input, + unsigned char *output ); +#endif /*MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/** + * \brief Blowfish-CTR buffer encryption/decryption + * + * Warning: You have to keep the maximum use of your counter in mind! + * + * \param ctx Blowfish context + * \param length The length of the data + * \param nc_off The offset in the current stream_block (for resuming + * within current cipher stream). The offset pointer to + * should be 0 at the start of a stream. + * \param nonce_counter The 64-bit nonce and counter. + * \param stream_block The saved stream-block for resuming. Is overwritten + * by the function. + * \param input The input data stream + * \param output The output data stream + * + * \return 0 if successful + */ +int mbedtls_blowfish_crypt_ctr( mbedtls_blowfish_context *ctx, + size_t length, + size_t *nc_off, + unsigned char nonce_counter[MBEDTLS_BLOWFISH_BLOCKSIZE], + unsigned char stream_block[MBEDTLS_BLOWFISH_BLOCKSIZE], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_BLOWFISH_ALT */ +#include "blowfish_alt.h" +#endif /* MBEDTLS_BLOWFISH_ALT */ + +#endif /* blowfish.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/bn_mul.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/bn_mul.h new file mode 100644 index 0000000..5408d41 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/bn_mul.h @@ -0,0 +1,876 @@ +/** + * \file bn_mul.h + * + * \brief Multi-precision integer library + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * Multiply source vector [s] with b, add result + * to destination vector [d] and set carry c. + * + * Currently supports: + * + * . IA-32 (386+) . AMD64 / EM64T + * . IA-32 (SSE2) . Motorola 68000 + * . PowerPC, 32-bit . MicroBlaze + * . PowerPC, 64-bit . TriCore + * . SPARC v8 . ARM v3+ + * . Alpha . MIPS32 + * . C, longlong . C, generic + */ +#ifndef MBEDTLS_BN_MUL_H +#define MBEDTLS_BN_MUL_H + +#include "bignum.h" + +#if defined(MBEDTLS_HAVE_ASM) + +#ifndef asm +#define asm __asm +#endif + +/* armcc5 --gnu defines __GNUC__ but doesn't support GNU's extended asm */ +#if defined(__GNUC__) && \ + ( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 ) +#if defined(__i386__) + +#define MULADDC_INIT \ + asm( \ + "movl %%ebx, %0 \n\t" \ + "movl %5, %%esi \n\t" \ + "movl %6, %%edi \n\t" \ + "movl %7, %%ecx \n\t" \ + "movl %8, %%ebx \n\t" + +#define MULADDC_CORE \ + "lodsl \n\t" \ + "mull %%ebx \n\t" \ + "addl %%ecx, %%eax \n\t" \ + "adcl $0, %%edx \n\t" \ + "addl (%%edi), %%eax \n\t" \ + "adcl $0, %%edx \n\t" \ + "movl %%edx, %%ecx \n\t" \ + "stosl \n\t" + +#if defined(MBEDTLS_HAVE_SSE2) + +#define MULADDC_HUIT \ + "movd %%ecx, %%mm1 \n\t" \ + "movd %%ebx, %%mm0 \n\t" \ + "movd (%%edi), %%mm3 \n\t" \ + "paddq %%mm3, %%mm1 \n\t" \ + "movd (%%esi), %%mm2 \n\t" \ + "pmuludq %%mm0, %%mm2 \n\t" \ + "movd 4(%%esi), %%mm4 \n\t" \ + "pmuludq %%mm0, %%mm4 \n\t" \ + "movd 8(%%esi), %%mm6 \n\t" \ + "pmuludq %%mm0, %%mm6 \n\t" \ + "movd 12(%%esi), %%mm7 \n\t" \ + "pmuludq %%mm0, %%mm7 \n\t" \ + "paddq %%mm2, %%mm1 \n\t" \ + "movd 4(%%edi), %%mm3 \n\t" \ + "paddq %%mm4, %%mm3 \n\t" \ + "movd 8(%%edi), %%mm5 \n\t" \ + "paddq %%mm6, %%mm5 \n\t" \ + "movd 12(%%edi), %%mm4 \n\t" \ + "paddq %%mm4, %%mm7 \n\t" \ + "movd %%mm1, (%%edi) \n\t" \ + "movd 16(%%esi), %%mm2 \n\t" \ + "pmuludq %%mm0, %%mm2 \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "movd 20(%%esi), %%mm4 \n\t" \ + "pmuludq %%mm0, %%mm4 \n\t" \ + "paddq %%mm3, %%mm1 \n\t" \ + "movd 24(%%esi), %%mm6 \n\t" \ + "pmuludq %%mm0, %%mm6 \n\t" \ + "movd %%mm1, 4(%%edi) \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "movd 28(%%esi), %%mm3 \n\t" \ + "pmuludq %%mm0, %%mm3 \n\t" \ + "paddq %%mm5, %%mm1 \n\t" \ + "movd 16(%%edi), %%mm5 \n\t" \ + "paddq %%mm5, %%mm2 \n\t" \ + "movd %%mm1, 8(%%edi) \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "paddq %%mm7, %%mm1 \n\t" \ + "movd 20(%%edi), %%mm5 \n\t" \ + "paddq %%mm5, %%mm4 \n\t" \ + "movd %%mm1, 12(%%edi) \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "paddq %%mm2, %%mm1 \n\t" \ + "movd 24(%%edi), %%mm5 \n\t" \ + "paddq %%mm5, %%mm6 \n\t" \ + "movd %%mm1, 16(%%edi) \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "paddq %%mm4, %%mm1 \n\t" \ + "movd 28(%%edi), %%mm5 \n\t" \ + "paddq %%mm5, %%mm3 \n\t" \ + "movd %%mm1, 20(%%edi) \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "paddq %%mm6, %%mm1 \n\t" \ + "movd %%mm1, 24(%%edi) \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "paddq %%mm3, %%mm1 \n\t" \ + "movd %%mm1, 28(%%edi) \n\t" \ + "addl $32, %%edi \n\t" \ + "addl $32, %%esi \n\t" \ + "psrlq $32, %%mm1 \n\t" \ + "movd %%mm1, %%ecx \n\t" + +#define MULADDC_STOP \ + "emms \n\t" \ + "movl %4, %%ebx \n\t" \ + "movl %%ecx, %1 \n\t" \ + "movl %%edi, %2 \n\t" \ + "movl %%esi, %3 \n\t" \ + : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \ + : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \ + : "eax", "ecx", "edx", "esi", "edi" \ + ); + +#else + +#define MULADDC_STOP \ + "movl %4, %%ebx \n\t" \ + "movl %%ecx, %1 \n\t" \ + "movl %%edi, %2 \n\t" \ + "movl %%esi, %3 \n\t" \ + : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \ + : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \ + : "eax", "ecx", "edx", "esi", "edi" \ + ); +#endif /* SSE2 */ +#endif /* i386 */ + +#if defined(__amd64__) || defined (__x86_64__) + +#define MULADDC_INIT \ + asm( \ + "movq %3, %%rsi \n\t" \ + "movq %4, %%rdi \n\t" \ + "movq %5, %%rcx \n\t" \ + "movq %6, %%rbx \n\t" \ + "xorq %%r8, %%r8 \n\t" + +#define MULADDC_CORE \ + "movq (%%rsi), %%rax \n\t" \ + "mulq %%rbx \n\t" \ + "addq $8, %%rsi \n\t" \ + "addq %%rcx, %%rax \n\t" \ + "movq %%r8, %%rcx \n\t" \ + "adcq $0, %%rdx \n\t" \ + "nop \n\t" \ + "addq %%rax, (%%rdi) \n\t" \ + "adcq %%rdx, %%rcx \n\t" \ + "addq $8, %%rdi \n\t" + +#define MULADDC_STOP \ + "movq %%rcx, %0 \n\t" \ + "movq %%rdi, %1 \n\t" \ + "movq %%rsi, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "rax", "rcx", "rdx", "rbx", "rsi", "rdi", "r8" \ + ); + +#endif /* AMD64 */ + +#if defined(__mc68020__) || defined(__mcpu32__) + +#define MULADDC_INIT \ + asm( \ + "movl %3, %%a2 \n\t" \ + "movl %4, %%a3 \n\t" \ + "movl %5, %%d3 \n\t" \ + "movl %6, %%d2 \n\t" \ + "moveq #0, %%d0 \n\t" + +#define MULADDC_CORE \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d4:%%d1 \n\t" \ + "addl %%d3, %%d1 \n\t" \ + "addxl %%d0, %%d4 \n\t" \ + "moveq #0, %%d3 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "addxl %%d4, %%d3 \n\t" + +#define MULADDC_STOP \ + "movl %%d3, %0 \n\t" \ + "movl %%a3, %1 \n\t" \ + "movl %%a2, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "d0", "d1", "d2", "d3", "d4", "a2", "a3" \ + ); + +#define MULADDC_HUIT \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d4:%%d1 \n\t" \ + "addxl %%d3, %%d1 \n\t" \ + "addxl %%d0, %%d4 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d3:%%d1 \n\t" \ + "addxl %%d4, %%d1 \n\t" \ + "addxl %%d0, %%d3 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d4:%%d1 \n\t" \ + "addxl %%d3, %%d1 \n\t" \ + "addxl %%d0, %%d4 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d3:%%d1 \n\t" \ + "addxl %%d4, %%d1 \n\t" \ + "addxl %%d0, %%d3 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d4:%%d1 \n\t" \ + "addxl %%d3, %%d1 \n\t" \ + "addxl %%d0, %%d4 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d3:%%d1 \n\t" \ + "addxl %%d4, %%d1 \n\t" \ + "addxl %%d0, %%d3 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d4:%%d1 \n\t" \ + "addxl %%d3, %%d1 \n\t" \ + "addxl %%d0, %%d4 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "movel %%a2@+, %%d1 \n\t" \ + "mulul %%d2, %%d3:%%d1 \n\t" \ + "addxl %%d4, %%d1 \n\t" \ + "addxl %%d0, %%d3 \n\t" \ + "addl %%d1, %%a3@+ \n\t" \ + "addxl %%d0, %%d3 \n\t" + +#endif /* MC68000 */ + +#if defined(__powerpc64__) || defined(__ppc64__) + +#if defined(__MACH__) && defined(__APPLE__) + +#define MULADDC_INIT \ + asm( \ + "ld r3, %3 \n\t" \ + "ld r4, %4 \n\t" \ + "ld r5, %5 \n\t" \ + "ld r6, %6 \n\t" \ + "addi r3, r3, -8 \n\t" \ + "addi r4, r4, -8 \n\t" \ + "addic r5, r5, 0 \n\t" + +#define MULADDC_CORE \ + "ldu r7, 8(r3) \n\t" \ + "mulld r8, r7, r6 \n\t" \ + "mulhdu r9, r7, r6 \n\t" \ + "adde r8, r8, r5 \n\t" \ + "ld r7, 8(r4) \n\t" \ + "addze r5, r9 \n\t" \ + "addc r8, r8, r7 \n\t" \ + "stdu r8, 8(r4) \n\t" + +#define MULADDC_STOP \ + "addze r5, r5 \n\t" \ + "addi r4, r4, 8 \n\t" \ + "addi r3, r3, 8 \n\t" \ + "std r5, %0 \n\t" \ + "std r4, %1 \n\t" \ + "std r3, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ + ); + + +#else /* __MACH__ && __APPLE__ */ + +#define MULADDC_INIT \ + asm( \ + "ld %%r3, %3 \n\t" \ + "ld %%r4, %4 \n\t" \ + "ld %%r5, %5 \n\t" \ + "ld %%r6, %6 \n\t" \ + "addi %%r3, %%r3, -8 \n\t" \ + "addi %%r4, %%r4, -8 \n\t" \ + "addic %%r5, %%r5, 0 \n\t" + +#define MULADDC_CORE \ + "ldu %%r7, 8(%%r3) \n\t" \ + "mulld %%r8, %%r7, %%r6 \n\t" \ + "mulhdu %%r9, %%r7, %%r6 \n\t" \ + "adde %%r8, %%r8, %%r5 \n\t" \ + "ld %%r7, 8(%%r4) \n\t" \ + "addze %%r5, %%r9 \n\t" \ + "addc %%r8, %%r8, %%r7 \n\t" \ + "stdu %%r8, 8(%%r4) \n\t" + +#define MULADDC_STOP \ + "addze %%r5, %%r5 \n\t" \ + "addi %%r4, %%r4, 8 \n\t" \ + "addi %%r3, %%r3, 8 \n\t" \ + "std %%r5, %0 \n\t" \ + "std %%r4, %1 \n\t" \ + "std %%r3, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ + ); + +#endif /* __MACH__ && __APPLE__ */ + +#elif defined(__powerpc__) || defined(__ppc__) /* end PPC64/begin PPC32 */ + +#if defined(__MACH__) && defined(__APPLE__) + +#define MULADDC_INIT \ + asm( \ + "lwz r3, %3 \n\t" \ + "lwz r4, %4 \n\t" \ + "lwz r5, %5 \n\t" \ + "lwz r6, %6 \n\t" \ + "addi r3, r3, -4 \n\t" \ + "addi r4, r4, -4 \n\t" \ + "addic r5, r5, 0 \n\t" + +#define MULADDC_CORE \ + "lwzu r7, 4(r3) \n\t" \ + "mullw r8, r7, r6 \n\t" \ + "mulhwu r9, r7, r6 \n\t" \ + "adde r8, r8, r5 \n\t" \ + "lwz r7, 4(r4) \n\t" \ + "addze r5, r9 \n\t" \ + "addc r8, r8, r7 \n\t" \ + "stwu r8, 4(r4) \n\t" + +#define MULADDC_STOP \ + "addze r5, r5 \n\t" \ + "addi r4, r4, 4 \n\t" \ + "addi r3, r3, 4 \n\t" \ + "stw r5, %0 \n\t" \ + "stw r4, %1 \n\t" \ + "stw r3, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ + ); + +#else /* __MACH__ && __APPLE__ */ + +#define MULADDC_INIT \ + asm( \ + "lwz %%r3, %3 \n\t" \ + "lwz %%r4, %4 \n\t" \ + "lwz %%r5, %5 \n\t" \ + "lwz %%r6, %6 \n\t" \ + "addi %%r3, %%r3, -4 \n\t" \ + "addi %%r4, %%r4, -4 \n\t" \ + "addic %%r5, %%r5, 0 \n\t" + +#define MULADDC_CORE \ + "lwzu %%r7, 4(%%r3) \n\t" \ + "mullw %%r8, %%r7, %%r6 \n\t" \ + "mulhwu %%r9, %%r7, %%r6 \n\t" \ + "adde %%r8, %%r8, %%r5 \n\t" \ + "lwz %%r7, 4(%%r4) \n\t" \ + "addze %%r5, %%r9 \n\t" \ + "addc %%r8, %%r8, %%r7 \n\t" \ + "stwu %%r8, 4(%%r4) \n\t" + +#define MULADDC_STOP \ + "addze %%r5, %%r5 \n\t" \ + "addi %%r4, %%r4, 4 \n\t" \ + "addi %%r3, %%r3, 4 \n\t" \ + "stw %%r5, %0 \n\t" \ + "stw %%r4, %1 \n\t" \ + "stw %%r3, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ + ); + +#endif /* __MACH__ && __APPLE__ */ + +#endif /* PPC32 */ + +/* + * The Sparc(64) assembly is reported to be broken. + * Disable it for now, until we're able to fix it. + */ +#if 0 && defined(__sparc__) +#if defined(__sparc64__) + +#define MULADDC_INIT \ + asm( \ + "ldx %3, %%o0 \n\t" \ + "ldx %4, %%o1 \n\t" \ + "ld %5, %%o2 \n\t" \ + "ld %6, %%o3 \n\t" + +#define MULADDC_CORE \ + "ld [%%o0], %%o4 \n\t" \ + "inc 4, %%o0 \n\t" \ + "ld [%%o1], %%o5 \n\t" \ + "umul %%o3, %%o4, %%o4 \n\t" \ + "addcc %%o4, %%o2, %%o4 \n\t" \ + "rd %%y, %%g1 \n\t" \ + "addx %%g1, 0, %%g1 \n\t" \ + "addcc %%o4, %%o5, %%o4 \n\t" \ + "st %%o4, [%%o1] \n\t" \ + "addx %%g1, 0, %%o2 \n\t" \ + "inc 4, %%o1 \n\t" + + #define MULADDC_STOP \ + "st %%o2, %0 \n\t" \ + "stx %%o1, %1 \n\t" \ + "stx %%o0, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "g1", "o0", "o1", "o2", "o3", "o4", \ + "o5" \ + ); + +#else /* __sparc64__ */ + +#define MULADDC_INIT \ + asm( \ + "ld %3, %%o0 \n\t" \ + "ld %4, %%o1 \n\t" \ + "ld %5, %%o2 \n\t" \ + "ld %6, %%o3 \n\t" + +#define MULADDC_CORE \ + "ld [%%o0], %%o4 \n\t" \ + "inc 4, %%o0 \n\t" \ + "ld [%%o1], %%o5 \n\t" \ + "umul %%o3, %%o4, %%o4 \n\t" \ + "addcc %%o4, %%o2, %%o4 \n\t" \ + "rd %%y, %%g1 \n\t" \ + "addx %%g1, 0, %%g1 \n\t" \ + "addcc %%o4, %%o5, %%o4 \n\t" \ + "st %%o4, [%%o1] \n\t" \ + "addx %%g1, 0, %%o2 \n\t" \ + "inc 4, %%o1 \n\t" + +#define MULADDC_STOP \ + "st %%o2, %0 \n\t" \ + "st %%o1, %1 \n\t" \ + "st %%o0, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "g1", "o0", "o1", "o2", "o3", "o4", \ + "o5" \ + ); + +#endif /* __sparc64__ */ +#endif /* __sparc__ */ + +#if defined(__microblaze__) || defined(microblaze) + +#define MULADDC_INIT \ + asm( \ + "lwi r3, %3 \n\t" \ + "lwi r4, %4 \n\t" \ + "lwi r5, %5 \n\t" \ + "lwi r6, %6 \n\t" \ + "andi r7, r6, 0xffff \n\t" \ + "bsrli r6, r6, 16 \n\t" + +#define MULADDC_CORE \ + "lhui r8, r3, 0 \n\t" \ + "addi r3, r3, 2 \n\t" \ + "lhui r9, r3, 0 \n\t" \ + "addi r3, r3, 2 \n\t" \ + "mul r10, r9, r6 \n\t" \ + "mul r11, r8, r7 \n\t" \ + "mul r12, r9, r7 \n\t" \ + "mul r13, r8, r6 \n\t" \ + "bsrli r8, r10, 16 \n\t" \ + "bsrli r9, r11, 16 \n\t" \ + "add r13, r13, r8 \n\t" \ + "add r13, r13, r9 \n\t" \ + "bslli r10, r10, 16 \n\t" \ + "bslli r11, r11, 16 \n\t" \ + "add r12, r12, r10 \n\t" \ + "addc r13, r13, r0 \n\t" \ + "add r12, r12, r11 \n\t" \ + "addc r13, r13, r0 \n\t" \ + "lwi r10, r4, 0 \n\t" \ + "add r12, r12, r10 \n\t" \ + "addc r13, r13, r0 \n\t" \ + "add r12, r12, r5 \n\t" \ + "addc r5, r13, r0 \n\t" \ + "swi r12, r4, 0 \n\t" \ + "addi r4, r4, 4 \n\t" + +#define MULADDC_STOP \ + "swi r5, %0 \n\t" \ + "swi r4, %1 \n\t" \ + "swi r3, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "r3", "r4" "r5", "r6", "r7", "r8", \ + "r9", "r10", "r11", "r12", "r13" \ + ); + +#endif /* MicroBlaze */ + +#if defined(__tricore__) + +#define MULADDC_INIT \ + asm( \ + "ld.a %%a2, %3 \n\t" \ + "ld.a %%a3, %4 \n\t" \ + "ld.w %%d4, %5 \n\t" \ + "ld.w %%d1, %6 \n\t" \ + "xor %%d5, %%d5 \n\t" + +#define MULADDC_CORE \ + "ld.w %%d0, [%%a2+] \n\t" \ + "madd.u %%e2, %%e4, %%d0, %%d1 \n\t" \ + "ld.w %%d0, [%%a3] \n\t" \ + "addx %%d2, %%d2, %%d0 \n\t" \ + "addc %%d3, %%d3, 0 \n\t" \ + "mov %%d4, %%d3 \n\t" \ + "st.w [%%a3+], %%d2 \n\t" + +#define MULADDC_STOP \ + "st.w %0, %%d4 \n\t" \ + "st.a %1, %%a3 \n\t" \ + "st.a %2, %%a2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "d0", "d1", "e2", "d4", "a2", "a3" \ + ); + +#endif /* TriCore */ + +#if defined(__arm__) + +#if defined(__thumb__) && !defined(__thumb2__) + +#define MULADDC_INIT \ + asm( \ + "ldr r0, %3 \n\t" \ + "ldr r1, %4 \n\t" \ + "ldr r2, %5 \n\t" \ + "ldr r3, %6 \n\t" \ + "lsr r7, r3, #16 \n\t" \ + "mov r9, r7 \n\t" \ + "lsl r7, r3, #16 \n\t" \ + "lsr r7, r7, #16 \n\t" \ + "mov r8, r7 \n\t" + +#define MULADDC_CORE \ + "ldmia r0!, {r6} \n\t" \ + "lsr r7, r6, #16 \n\t" \ + "lsl r6, r6, #16 \n\t" \ + "lsr r6, r6, #16 \n\t" \ + "mov r4, r8 \n\t" \ + "mul r4, r6 \n\t" \ + "mov r3, r9 \n\t" \ + "mul r6, r3 \n\t" \ + "mov r5, r9 \n\t" \ + "mul r5, r7 \n\t" \ + "mov r3, r8 \n\t" \ + "mul r7, r3 \n\t" \ + "lsr r3, r6, #16 \n\t" \ + "add r5, r5, r3 \n\t" \ + "lsr r3, r7, #16 \n\t" \ + "add r5, r5, r3 \n\t" \ + "add r4, r4, r2 \n\t" \ + "mov r2, #0 \n\t" \ + "adc r5, r2 \n\t" \ + "lsl r3, r6, #16 \n\t" \ + "add r4, r4, r3 \n\t" \ + "adc r5, r2 \n\t" \ + "lsl r3, r7, #16 \n\t" \ + "add r4, r4, r3 \n\t" \ + "adc r5, r2 \n\t" \ + "ldr r3, [r1] \n\t" \ + "add r4, r4, r3 \n\t" \ + "adc r2, r5 \n\t" \ + "stmia r1!, {r4} \n\t" + +#define MULADDC_STOP \ + "str r2, %0 \n\t" \ + "str r1, %1 \n\t" \ + "str r0, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "r0", "r1", "r2", "r3", "r4", "r5", \ + "r6", "r7", "r8", "r9", "cc" \ + ); + +#else + +#define MULADDC_INIT \ + asm( \ + "ldr r0, %3 \n\t" \ + "ldr r1, %4 \n\t" \ + "ldr r2, %5 \n\t" \ + "ldr r3, %6 \n\t" + +#define MULADDC_CORE \ + "ldr r4, [r0], #4 \n\t" \ + "mov r5, #0 \n\t" \ + "ldr r6, [r1] \n\t" \ + "umlal r2, r5, r3, r4 \n\t" \ + "adds r7, r6, r2 \n\t" \ + "adc r2, r5, #0 \n\t" \ + "str r7, [r1], #4 \n\t" + +#define MULADDC_STOP \ + "str r2, %0 \n\t" \ + "str r1, %1 \n\t" \ + "str r0, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "r0", "r1", "r2", "r3", "r4", "r5", \ + "r6", "r7", "cc" \ + ); + +#endif /* Thumb */ + +#endif /* ARMv3 */ + +#if defined(__alpha__) + +#define MULADDC_INIT \ + asm( \ + "ldq $1, %3 \n\t" \ + "ldq $2, %4 \n\t" \ + "ldq $3, %5 \n\t" \ + "ldq $4, %6 \n\t" + +#define MULADDC_CORE \ + "ldq $6, 0($1) \n\t" \ + "addq $1, 8, $1 \n\t" \ + "mulq $6, $4, $7 \n\t" \ + "umulh $6, $4, $6 \n\t" \ + "addq $7, $3, $7 \n\t" \ + "cmpult $7, $3, $3 \n\t" \ + "ldq $5, 0($2) \n\t" \ + "addq $7, $5, $7 \n\t" \ + "cmpult $7, $5, $5 \n\t" \ + "stq $7, 0($2) \n\t" \ + "addq $2, 8, $2 \n\t" \ + "addq $6, $3, $3 \n\t" \ + "addq $5, $3, $3 \n\t" + +#define MULADDC_STOP \ + "stq $3, %0 \n\t" \ + "stq $2, %1 \n\t" \ + "stq $1, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "$1", "$2", "$3", "$4", "$5", "$6", "$7" \ + ); +#endif /* Alpha */ + +#if defined(__mips__) && !defined(__mips64) + +#define MULADDC_INIT \ + asm( \ + "lw $10, %3 \n\t" \ + "lw $11, %4 \n\t" \ + "lw $12, %5 \n\t" \ + "lw $13, %6 \n\t" + +#define MULADDC_CORE \ + "lw $14, 0($10) \n\t" \ + "multu $13, $14 \n\t" \ + "addi $10, $10, 4 \n\t" \ + "mflo $14 \n\t" \ + "mfhi $9 \n\t" \ + "addu $14, $12, $14 \n\t" \ + "lw $15, 0($11) \n\t" \ + "sltu $12, $14, $12 \n\t" \ + "addu $15, $14, $15 \n\t" \ + "sltu $14, $15, $14 \n\t" \ + "addu $12, $12, $9 \n\t" \ + "sw $15, 0($11) \n\t" \ + "addu $12, $12, $14 \n\t" \ + "addi $11, $11, 4 \n\t" + +#define MULADDC_STOP \ + "sw $12, %0 \n\t" \ + "sw $11, %1 \n\t" \ + "sw $10, %2 \n\t" \ + : "=m" (c), "=m" (d), "=m" (s) \ + : "m" (s), "m" (d), "m" (c), "m" (b) \ + : "$9", "$10", "$11", "$12", "$13", "$14", "$15" \ + ); + +#endif /* MIPS */ +#endif /* GNUC */ + +#if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__) + +#define MULADDC_INIT \ + __asm mov esi, s \ + __asm mov edi, d \ + __asm mov ecx, c \ + __asm mov ebx, b + +#define MULADDC_CORE \ + __asm lodsd \ + __asm mul ebx \ + __asm add eax, ecx \ + __asm adc edx, 0 \ + __asm add eax, [edi] \ + __asm adc edx, 0 \ + __asm mov ecx, edx \ + __asm stosd + +#if defined(MBEDTLS_HAVE_SSE2) + +#define EMIT __asm _emit + +#define MULADDC_HUIT \ + EMIT 0x0F EMIT 0x6E EMIT 0xC9 \ + EMIT 0x0F EMIT 0x6E EMIT 0xC3 \ + EMIT 0x0F EMIT 0x6E EMIT 0x1F \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ + EMIT 0x0F EMIT 0x6E EMIT 0x16 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ + EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x04 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ + EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x08 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ + EMIT 0x0F EMIT 0x6E EMIT 0x7E EMIT 0x0C \ + EMIT 0x0F EMIT 0xF4 EMIT 0xF8 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ + EMIT 0x0F EMIT 0x6E EMIT 0x5F EMIT 0x04 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xDC \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x08 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xEE \ + EMIT 0x0F EMIT 0x6E EMIT 0x67 EMIT 0x0C \ + EMIT 0x0F EMIT 0xD4 EMIT 0xFC \ + EMIT 0x0F EMIT 0x7E EMIT 0x0F \ + EMIT 0x0F EMIT 0x6E EMIT 0x56 EMIT 0x10 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x14 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ + EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x18 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x04 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0x6E EMIT 0x5E EMIT 0x1C \ + EMIT 0x0F EMIT 0xF4 EMIT 0xD8 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCD \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x10 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xD5 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x08 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCF \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x14 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xE5 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x0C \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x18 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xF5 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x10 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCC \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x1C \ + EMIT 0x0F EMIT 0xD4 EMIT 0xDD \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x14 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCE \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x18 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x1C \ + EMIT 0x83 EMIT 0xC7 EMIT 0x20 \ + EMIT 0x83 EMIT 0xC6 EMIT 0x20 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0x7E EMIT 0xC9 + +#define MULADDC_STOP \ + EMIT 0x0F EMIT 0x77 \ + __asm mov c, ecx \ + __asm mov d, edi \ + __asm mov s, esi \ + +#else + +#define MULADDC_STOP \ + __asm mov c, ecx \ + __asm mov d, edi \ + __asm mov s, esi \ + +#endif /* SSE2 */ +#endif /* MSVC */ + +#endif /* MBEDTLS_HAVE_ASM */ + +#if !defined(MULADDC_CORE) +#if defined(MBEDTLS_HAVE_UDBL) + +#define MULADDC_INIT \ +{ \ + mbedtls_t_udbl r; \ + mbedtls_mpi_uint r0, r1; + +#define MULADDC_CORE \ + r = *(s++) * (mbedtls_t_udbl) b; \ + r0 = (mbedtls_mpi_uint) r; \ + r1 = (mbedtls_mpi_uint)( r >> biL ); \ + r0 += c; r1 += (r0 < c); \ + r0 += *d; r1 += (r0 < *d); \ + c = r1; *(d++) = r0; + +#define MULADDC_STOP \ +} + +#else +#define MULADDC_INIT \ +{ \ + mbedtls_mpi_uint s0, s1, b0, b1; \ + mbedtls_mpi_uint r0, r1, rx, ry; \ + b0 = ( b << biH ) >> biH; \ + b1 = ( b >> biH ); + +#define MULADDC_CORE \ + s0 = ( *s << biH ) >> biH; \ + s1 = ( *s >> biH ); s++; \ + rx = s0 * b1; r0 = s0 * b0; \ + ry = s1 * b0; r1 = s1 * b1; \ + r1 += ( rx >> biH ); \ + r1 += ( ry >> biH ); \ + rx <<= biH; ry <<= biH; \ + r0 += rx; r1 += (r0 < rx); \ + r0 += ry; r1 += (r0 < ry); \ + r0 += c; r1 += (r0 < c); \ + r0 += *d; r1 += (r0 < *d); \ + c = r1; *(d++) = r0; + +#define MULADDC_STOP \ +} + +#endif /* C (generic) */ +#endif /* C (longlong) */ + +#endif /* bn_mul.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/camellia.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/camellia.h new file mode 100644 index 0000000..0424d62 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/camellia.h @@ -0,0 +1,235 @@ +/** + * \file camellia.h + * + * \brief Camellia block cipher + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_CAMELLIA_H +#define MBEDTLS_CAMELLIA_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#define MBEDTLS_CAMELLIA_ENCRYPT 1 +#define MBEDTLS_CAMELLIA_DECRYPT 0 + +#define MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH -0x0024 /**< Invalid key length. */ +#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026 /**< Invalid data input length. */ + +#if !defined(MBEDTLS_CAMELLIA_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief CAMELLIA context structure + */ +typedef struct +{ + int nr; /*!< number of rounds */ + uint32_t rk[68]; /*!< CAMELLIA round keys */ +} +mbedtls_camellia_context; + +/** + * \brief Initialize CAMELLIA context + * + * \param ctx CAMELLIA context to be initialized + */ +void mbedtls_camellia_init( mbedtls_camellia_context *ctx ); + +/** + * \brief Clear CAMELLIA context + * + * \param ctx CAMELLIA context to be cleared + */ +void mbedtls_camellia_free( mbedtls_camellia_context *ctx ); + +/** + * \brief CAMELLIA key schedule (encryption) + * + * \param ctx CAMELLIA context to be initialized + * \param key encryption key + * \param keybits must be 128, 192 or 256 + * + * \return 0 if successful, or MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH + */ +int mbedtls_camellia_setkey_enc( mbedtls_camellia_context *ctx, const unsigned char *key, + unsigned int keybits ); + +/** + * \brief CAMELLIA key schedule (decryption) + * + * \param ctx CAMELLIA context to be initialized + * \param key decryption key + * \param keybits must be 128, 192 or 256 + * + * \return 0 if successful, or MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH + */ +int mbedtls_camellia_setkey_dec( mbedtls_camellia_context *ctx, const unsigned char *key, + unsigned int keybits ); + +/** + * \brief CAMELLIA-ECB block encryption/decryption + * + * \param ctx CAMELLIA context + * \param mode MBEDTLS_CAMELLIA_ENCRYPT or MBEDTLS_CAMELLIA_DECRYPT + * \param input 16-byte input block + * \param output 16-byte output block + * + * \return 0 if successful + */ +int mbedtls_camellia_crypt_ecb( mbedtls_camellia_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/** + * \brief CAMELLIA-CBC buffer encryption/decryption + * Length should be a multiple of the block + * size (16 bytes) + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx CAMELLIA context + * \param mode MBEDTLS_CAMELLIA_ENCRYPT or MBEDTLS_CAMELLIA_DECRYPT + * \param length length of the input data + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful, or + * MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH + */ +int mbedtls_camellia_crypt_cbc( mbedtls_camellia_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +/** + * \brief CAMELLIA-CFB128 buffer encryption/decryption + * + * Note: Due to the nature of CFB you should use the same key schedule for + * both encryption and decryption. So a context initialized with + * mbedtls_camellia_setkey_enc() for both MBEDTLS_CAMELLIA_ENCRYPT and CAMELLIE_DECRYPT. + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx CAMELLIA context + * \param mode MBEDTLS_CAMELLIA_ENCRYPT or MBEDTLS_CAMELLIA_DECRYPT + * \param length length of the input data + * \param iv_off offset in IV (updated after use) + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful, or + * MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH + */ +int mbedtls_camellia_crypt_cfb128( mbedtls_camellia_context *ctx, + int mode, + size_t length, + size_t *iv_off, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/** + * \brief CAMELLIA-CTR buffer encryption/decryption + * + * Warning: You have to keep the maximum use of your counter in mind! + * + * Note: Due to the nature of CTR you should use the same key schedule for + * both encryption and decryption. So a context initialized with + * mbedtls_camellia_setkey_enc() for both MBEDTLS_CAMELLIA_ENCRYPT and MBEDTLS_CAMELLIA_DECRYPT. + * + * \param ctx CAMELLIA context + * \param length The length of the data + * \param nc_off The offset in the current stream_block (for resuming + * within current cipher stream). The offset pointer to + * should be 0 at the start of a stream. + * \param nonce_counter The 128-bit nonce and counter. + * \param stream_block The saved stream-block for resuming. Is overwritten + * by the function. + * \param input The input data stream + * \param output The output data stream + * + * \return 0 if successful + */ +int mbedtls_camellia_crypt_ctr( mbedtls_camellia_context *ctx, + size_t length, + size_t *nc_off, + unsigned char nonce_counter[16], + unsigned char stream_block[16], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_CAMELLIA_ALT */ +#include "camellia_alt.h" +#endif /* MBEDTLS_CAMELLIA_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_camellia_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* camellia.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ccm.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ccm.h new file mode 100644 index 0000000..ef75839 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ccm.h @@ -0,0 +1,141 @@ +/** + * \file ccm.h + * + * \brief Counter with CBC-MAC (CCM) for 128-bit block ciphers + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_CCM_H +#define MBEDTLS_CCM_H + +#include "cipher.h" + +#define MBEDTLS_ERR_CCM_BAD_INPUT -0x000D /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_CCM_AUTH_FAILED -0x000F /**< Authenticated decryption failed. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief CCM context structure + */ +typedef struct { + mbedtls_cipher_context_t cipher_ctx; /*!< cipher context used */ +} +mbedtls_ccm_context; + +/** + * \brief Initialize CCM context (just makes references valid) + * Makes the context ready for mbedtls_ccm_setkey() or + * mbedtls_ccm_free(). + * + * \param ctx CCM context to initialize + */ +void mbedtls_ccm_init( mbedtls_ccm_context *ctx ); + +/** + * \brief CCM initialization (encryption and decryption) + * + * \param ctx CCM context to be initialized + * \param cipher cipher to use (a 128-bit block cipher) + * \param key encryption key + * \param keybits key size in bits (must be acceptable by the cipher) + * + * \return 0 if successful, or a cipher specific error code + */ +int mbedtls_ccm_setkey( mbedtls_ccm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits ); + +/** + * \brief Free a CCM context and underlying cipher sub-context + * + * \param ctx CCM context to free + */ +void mbedtls_ccm_free( mbedtls_ccm_context *ctx ); + +/** + * \brief CCM buffer encryption + * + * \param ctx CCM context + * \param length length of the input data in bytes + * \param iv nonce (initialization vector) + * \param iv_len length of IV in bytes + * must be 2, 3, 4, 5, 6, 7 or 8 + * \param add additional data + * \param add_len length of additional data in bytes + * must be less than 2^16 - 2^8 + * \param input buffer holding the input data + * \param output buffer for holding the output data + * must be at least 'length' bytes wide + * \param tag buffer for holding the tag + * \param tag_len length of the tag to generate in bytes + * must be 4, 6, 8, 10, 14 or 16 + * + * \note The tag is written to a separate buffer. To get the tag + * concatenated with the output as in the CCM spec, use + * tag = output + length and make sure the output buffer is + * at least length + tag_len wide. + * + * \return 0 if successful + */ +int mbedtls_ccm_encrypt_and_tag( mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + unsigned char *tag, size_t tag_len ); + +/** + * \brief CCM buffer authenticated decryption + * + * \param ctx CCM context + * \param length length of the input data + * \param iv initialization vector + * \param iv_len length of IV + * \param add additional data + * \param add_len length of additional data + * \param input buffer holding the input data + * \param output buffer for holding the output data + * \param tag buffer holding the tag + * \param tag_len length of the tag + * + * \return 0 if successful and authenticated, + * MBEDTLS_ERR_CCM_AUTH_FAILED if tag does not match + */ +int mbedtls_ccm_auth_decrypt( mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + const unsigned char *tag, size_t tag_len ); + +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_ccm_self_test( int verbose ); +#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_CCM_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/certs.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/certs.h new file mode 100644 index 0000000..6b7e40b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/certs.h @@ -0,0 +1,103 @@ +/** + * \file certs.h + * + * \brief Sample certificates and DHM parameters for testing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_CERTS_H +#define MBEDTLS_CERTS_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MBEDTLS_SELF_TEST) + +#if defined(MBEDTLS_PEM_PARSE_C) +/* Concatenation of all CA certificates in PEM format if available */ +extern const char mbedtls_test_cas_pem[]; +extern const size_t mbedtls_test_cas_pem_len; +#endif + +/* List of all CA certificates, terminated by NULL */ +extern const char * mbedtls_test_cas[]; +extern const size_t mbedtls_test_cas_len[]; + +/* + * Convenience for users who just want a certificate: + * RSA by default, or ECDSA if RSA is not available + */ +extern const char * mbedtls_test_ca_crt; +extern const size_t mbedtls_test_ca_crt_len; +extern const char * mbedtls_test_ca_key; +extern const size_t mbedtls_test_ca_key_len; +extern const char * mbedtls_test_ca_pwd; +extern const size_t mbedtls_test_ca_pwd_len; +extern const char * mbedtls_test_srv_crt; +extern const size_t mbedtls_test_srv_crt_len; +extern const char * mbedtls_test_srv_key; +extern const size_t mbedtls_test_srv_key_len; +extern const char * mbedtls_test_cli_crt; +extern const size_t mbedtls_test_cli_crt_len; +extern const char * mbedtls_test_cli_key; +extern const size_t mbedtls_test_cli_key_len; + +#if defined(MBEDTLS_ECDSA_C) +extern const char mbedtls_test_ca_crt_ec[]; +extern const size_t mbedtls_test_ca_crt_ec_len; +extern const char mbedtls_test_ca_key_ec[]; +extern const size_t mbedtls_test_ca_key_ec_len; +extern const char mbedtls_test_ca_pwd_ec[]; +extern const size_t mbedtls_test_ca_pwd_ec_len; +extern const char mbedtls_test_srv_crt_ec[]; +extern const size_t mbedtls_test_srv_crt_ec_len; +extern const char mbedtls_test_srv_key_ec[]; +extern const size_t mbedtls_test_srv_key_ec_len; +extern const char mbedtls_test_cli_crt_ec[]; +extern const size_t mbedtls_test_cli_crt_ec_len; +extern const char mbedtls_test_cli_key_ec[]; +extern const size_t mbedtls_test_cli_key_ec_len; +#endif + +#if defined(MBEDTLS_RSA_C) +extern const char mbedtls_test_ca_crt_rsa[]; +extern const size_t mbedtls_test_ca_crt_rsa_len; +extern const char mbedtls_test_ca_key_rsa[]; +extern const size_t mbedtls_test_ca_key_rsa_len; +extern const char mbedtls_test_ca_pwd_rsa[]; +extern const size_t mbedtls_test_ca_pwd_rsa_len; +extern const char mbedtls_test_srv_crt_rsa[]; +extern const size_t mbedtls_test_srv_crt_rsa_len; +extern const char mbedtls_test_srv_key_rsa[]; +extern const size_t mbedtls_test_srv_key_rsa_len; +extern const char mbedtls_test_cli_crt_rsa[]; +extern const size_t mbedtls_test_cli_crt_rsa_len; +extern const char mbedtls_test_cli_key_rsa[]; +extern const size_t mbedtls_test_cli_key_rsa_len; +#endif + +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* certs.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/check_config.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/check_config.h new file mode 100644 index 0000000..b6448ec --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/check_config.h @@ -0,0 +1,540 @@ +/** + * \file check_config.h + * + * \brief Consistency checks for configuration options + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * It is recommended to include this file from your config.h + * in order to catch dependency issues early. + */ + +#ifndef MBEDTLS_CHECK_CONFIG_H +#define MBEDTLS_CHECK_CONFIG_H + +/* + * We assume CHAR_BIT is 8 in many places. In practice, this is true on our + * target platforms, so not an issue, but let's just be extra sure. + */ +#include +#if CHAR_BIT != 8 +#error "mbed TLS requires a platform with 8-bit chars" +#endif + +#if defined(_WIN32) +#if !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_C is required on Windows" +#endif + +/* Fix the config here. Not convenient to put an #ifdef _WIN32 in config.h as + * it would confuse config.pl. */ +#if !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && \ + !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) +#define MBEDTLS_PLATFORM_SNPRINTF_ALT +#endif +#endif /* _WIN32 */ + +#if defined(TARGET_LIKE_MBED) && \ + ( defined(MBEDTLS_NET_C) || defined(MBEDTLS_TIMING_C) ) +#error "The NET and TIMING modules are not available for mbed OS - please use the network and timing functions provided by mbed OS" +#endif + +#if defined(MBEDTLS_DEPRECATED_WARNING) && \ + !defined(__GNUC__) && !defined(__clang__) +#error "MBEDTLS_DEPRECATED_WARNING only works with GCC and Clang" +#endif + +#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_HAVE_TIME) +#error "MBEDTLS_HAVE_TIME_DATE without MBEDTLS_HAVE_TIME does not make sense" +#endif + +#if defined(MBEDTLS_AESNI_C) && !defined(MBEDTLS_HAVE_ASM) +#error "MBEDTLS_AESNI_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_CTR_DRBG_C) && !defined(MBEDTLS_AES_C) +#error "MBEDTLS_CTR_DRBG_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_DHM_C) && !defined(MBEDTLS_BIGNUM_C) +#error "MBEDTLS_DHM_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECDH_C) && !defined(MBEDTLS_ECP_C) +#error "MBEDTLS_ECDH_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECDSA_C) && \ + ( !defined(MBEDTLS_ECP_C) || \ + !defined(MBEDTLS_ASN1_PARSE_C) || \ + !defined(MBEDTLS_ASN1_WRITE_C) ) +#error "MBEDTLS_ECDSA_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECJPAKE_C) && \ + ( !defined(MBEDTLS_ECP_C) || !defined(MBEDTLS_MD_C) ) +#error "MBEDTLS_ECJPAKE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) && !defined(MBEDTLS_HMAC_DRBG_C) +#error "MBEDTLS_ECDSA_DETERMINISTIC defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_C) && ( !defined(MBEDTLS_BIGNUM_C) || ( \ + !defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) ) ) +#error "MBEDTLS_ECP_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ENTROPY_C) && (!defined(MBEDTLS_SHA512_C) && \ + !defined(MBEDTLS_SHA256_C)) +#error "MBEDTLS_ENTROPY_C defined, but not all prerequisites" +#endif +#if defined(MBEDTLS_ENTROPY_C) && defined(MBEDTLS_SHA512_C) && \ + defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 64) +#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high" +#endif +#if defined(MBEDTLS_ENTROPY_C) && \ + ( !defined(MBEDTLS_SHA512_C) || defined(MBEDTLS_ENTROPY_FORCE_SHA256) ) \ + && defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 32) +#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high" +#endif +#if defined(MBEDTLS_ENTROPY_C) && \ + defined(MBEDTLS_ENTROPY_FORCE_SHA256) && !defined(MBEDTLS_SHA256_C) +#error "MBEDTLS_ENTROPY_FORCE_SHA256 defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_GCM_C) && ( \ + !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) ) +#error "MBEDTLS_GCM_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_HAVEGE_C) && !defined(MBEDTLS_TIMING_C) +#error "MBEDTLS_HAVEGE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_HMAC_DRBG_C) && !defined(MBEDTLS_MD_C) +#error "MBEDTLS_HMAC_DRBG_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) && !defined(MBEDTLS_DHM_C) +#error "MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) && \ + !defined(MBEDTLS_ECDH_C) +#error "MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \ + ( !defined(MBEDTLS_DHM_C) || !defined(MBEDTLS_RSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) && \ + ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \ + !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \ + ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \ + !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) && \ + ( !defined(MBEDTLS_ECJPAKE_C) || !defined(MBEDTLS_SHA256_C) || \ + !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) ) +#error "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) && \ + ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) ) +#error "MBEDTLS_MEMORY_BUFFER_ALLOC_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PADLOCK_C) && !defined(MBEDTLS_HAVE_ASM) +#error "MBEDTLS_PADLOCK_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PEM_PARSE_C) && !defined(MBEDTLS_BASE64_C) +#error "MBEDTLS_PEM_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PEM_WRITE_C) && !defined(MBEDTLS_BASE64_C) +#error "MBEDTLS_PEM_WRITE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PK_C) && \ + ( !defined(MBEDTLS_RSA_C) && !defined(MBEDTLS_ECP_C) ) +#error "MBEDTLS_PK_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_PK_C) +#error "MBEDTLS_PK_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PK_WRITE_C) && !defined(MBEDTLS_PK_C) +#error "MBEDTLS_PK_WRITE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PKCS11_C) && !defined(MBEDTLS_PK_C) +#error "MBEDTLS_PKCS11_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_EXIT_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_EXIT_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_EXIT_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_EXIT) ||\ + defined(MBEDTLS_PLATFORM_EXIT_ALT) ) +#error "MBEDTLS_PLATFORM_EXIT_MACRO and MBEDTLS_PLATFORM_STD_EXIT/MBEDTLS_PLATFORM_EXIT_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_FPRINTF_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_FPRINTF_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_FPRINTF) ||\ + defined(MBEDTLS_PLATFORM_FPRINTF_ALT) ) +#error "MBEDTLS_PLATFORM_FPRINTF_MACRO and MBEDTLS_PLATFORM_STD_FPRINTF/MBEDTLS_PLATFORM_FPRINTF_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\ + ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) ) +#error "MBEDTLS_PLATFORM_FREE_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\ + defined(MBEDTLS_PLATFORM_STD_FREE) +#error "MBEDTLS_PLATFORM_FREE_MACRO and MBEDTLS_PLATFORM_STD_FREE cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && !defined(MBEDTLS_PLATFORM_CALLOC_MACRO) +#error "MBEDTLS_PLATFORM_CALLOC_MACRO must be defined if MBEDTLS_PLATFORM_FREE_MACRO is" +#endif + +#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\ + ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) ) +#error "MBEDTLS_PLATFORM_CALLOC_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\ + defined(MBEDTLS_PLATFORM_STD_CALLOC) +#error "MBEDTLS_PLATFORM_CALLOC_MACRO and MBEDTLS_PLATFORM_STD_CALLOC cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) && !defined(MBEDTLS_PLATFORM_FREE_MACRO) +#error "MBEDTLS_PLATFORM_FREE_MACRO must be defined if MBEDTLS_PLATFORM_CALLOC_MACRO is" +#endif + +#if defined(MBEDTLS_PLATFORM_MEMORY) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_MEMORY defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_PRINTF_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_PRINTF_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_PRINTF) ||\ + defined(MBEDTLS_PLATFORM_PRINTF_ALT) ) +#error "MBEDTLS_PLATFORM_PRINTF_MACRO and MBEDTLS_PLATFORM_STD_PRINTF/MBEDTLS_PLATFORM_PRINTF_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_SNPRINTF_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_SNPRINTF) ||\ + defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) ) +#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO and MBEDTLS_PLATFORM_STD_SNPRINTF/MBEDTLS_PLATFORM_SNPRINTF_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR) &&\ + !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) +#error "MBEDTLS_PLATFORM_STD_MEM_HDR defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY) +#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY) +#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_FREE) && !defined(MBEDTLS_PLATFORM_MEMORY) +#error "MBEDTLS_PLATFORM_STD_FREE defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_EXIT) &&\ + !defined(MBEDTLS_PLATFORM_EXIT_ALT) +#error "MBEDTLS_PLATFORM_STD_EXIT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_FPRINTF) &&\ + !defined(MBEDTLS_PLATFORM_FPRINTF_ALT) +#error "MBEDTLS_PLATFORM_STD_FPRINTF defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_PRINTF) &&\ + !defined(MBEDTLS_PLATFORM_PRINTF_ALT) +#error "MBEDTLS_PLATFORM_STD_PRINTF defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_SNPRINTF) &&\ + !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) +#error "MBEDTLS_PLATFORM_STD_SNPRINTF defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_BIGNUM_C) || \ + !defined(MBEDTLS_OID_C) ) +#error "MBEDTLS_RSA_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) && \ + ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_PKCS1_V21) ) +#error "MBEDTLS_X509_RSASSA_PSS_SUPPORT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_PROTO_SSL3) && ( !defined(MBEDTLS_MD5_C) || \ + !defined(MBEDTLS_SHA1_C) ) +#error "MBEDTLS_SSL_PROTO_SSL3 defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1) && ( !defined(MBEDTLS_MD5_C) || \ + !defined(MBEDTLS_SHA1_C) ) +#error "MBEDTLS_SSL_PROTO_TLS1 defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) && ( !defined(MBEDTLS_MD5_C) || \ + !defined(MBEDTLS_SHA1_C) ) +#error "MBEDTLS_SSL_PROTO_TLS1_1 defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && ( !defined(MBEDTLS_SHA1_C) && \ + !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) ) +#error "MBEDTLS_SSL_PROTO_TLS1_2 defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_PROTO_DTLS) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_2) +#error "MBEDTLS_SSL_PROTO_DTLS defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_CLI_C) && !defined(MBEDTLS_SSL_TLS_C) +#error "MBEDTLS_SSL_CLI_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) && ( !defined(MBEDTLS_CIPHER_C) || \ + !defined(MBEDTLS_MD_C) ) +#error "MBEDTLS_SSL_TLS_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_SRV_C) && !defined(MBEDTLS_SSL_TLS_C) +#error "MBEDTLS_SSL_SRV_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) && (!defined(MBEDTLS_SSL_PROTO_SSL3) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1) && !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_2)) +#error "MBEDTLS_SSL_TLS_C defined, but no protocols are active" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_SSL3) && \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) && !defined(MBEDTLS_SSL_PROTO_TLS1)) +#error "Illegal protocol selection" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_TLS1) && \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) && !defined(MBEDTLS_SSL_PROTO_TLS1_1)) +#error "Illegal protocol selection" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_SSL3) && \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) && (!defined(MBEDTLS_SSL_PROTO_TLS1) || \ + !defined(MBEDTLS_SSL_PROTO_TLS1_1))) +#error "Illegal protocol selection" +#endif + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && !defined(MBEDTLS_SSL_PROTO_DTLS) +#error "MBEDTLS_SSL_DTLS_HELLO_VERIFY defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE) && \ + !defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) +#error "MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) && \ + ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) ) +#error "MBEDTLS_SSL_DTLS_ANTI_REPLAY defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) && \ + ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) ) +#error "MBEDTLS_SSL_DTLS_BADMAC_LIMIT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_2) +#error "MBEDTLS_SSL_ENCRYPT_THEN_MAC defined, but not all prerequsites" +#endif + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_2) +#error "MBEDTLS_SSL_EXTENDED_MASTER_SECRET defined, but not all prerequsites" +#endif + +#if defined(MBEDTLS_SSL_TICKET_C) && !defined(MBEDTLS_CIPHER_C) +#error "MBEDTLS_SSL_TICKET_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) && \ + !defined(MBEDTLS_SSL_PROTO_SSL3) && !defined(MBEDTLS_SSL_PROTO_TLS1) +#error "MBEDTLS_SSL_CBC_RECORD_SPLITTING defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) && \ + !defined(MBEDTLS_X509_CRT_PARSE_C) +#error "MBEDTLS_SSL_SERVER_NAME_INDICATION defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_THREADING_PTHREAD) +#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL) +#error "MBEDTLS_THREADING_PTHREAD defined, but not all prerequisites" +#endif +#define MBEDTLS_THREADING_IMPL +#endif + +#if defined(MBEDTLS_THREADING_ALT) +#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL) +#error "MBEDTLS_THREADING_ALT defined, but not all prerequisites" +#endif +#define MBEDTLS_THREADING_IMPL +#endif + +#if defined(MBEDTLS_THREADING_C) && !defined(MBEDTLS_THREADING_IMPL) +#error "MBEDTLS_THREADING_C defined, single threading implementation required" +#endif +#undef MBEDTLS_THREADING_IMPL + +#if defined(MBEDTLS_VERSION_FEATURES) && !defined(MBEDTLS_VERSION_C) +#error "MBEDTLS_VERSION_FEATURES defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_USE_C) && ( !defined(MBEDTLS_BIGNUM_C) || \ + !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_PARSE_C) || \ + !defined(MBEDTLS_PK_PARSE_C) ) +#error "MBEDTLS_X509_USE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CREATE_C) && ( !defined(MBEDTLS_BIGNUM_C) || \ + !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_WRITE_C) || \ + !defined(MBEDTLS_PK_WRITE_C) ) +#error "MBEDTLS_X509_CREATE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) ) +#error "MBEDTLS_X509_CRT_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CRL_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) ) +#error "MBEDTLS_X509_CRL_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CSR_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) ) +#error "MBEDTLS_X509_CSR_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CRT_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) ) +#error "MBEDTLS_X509_CRT_WRITE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CSR_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) ) +#error "MBEDTLS_X509_CSR_WRITE_C defined, but not all prerequisites" +#endif + +/* + * Avoid warning from -pedantic. This is a convenient place for this + * workaround since this is included by every single file before the + * #if defined(MBEDTLS_xxx_C) that results in emtpy translation units. + */ +typedef int mbedtls_iso_c_forbids_empty_translation_units; + +#endif /* MBEDTLS_CHECK_CONFIG_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/cipher.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/cipher.h new file mode 100644 index 0000000..70000f5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/cipher.h @@ -0,0 +1,698 @@ +/** + * \file cipher.h + * + * \brief Generic cipher wrapper. + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#ifndef MBEDTLS_CIPHER_H +#define MBEDTLS_CIPHER_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) +#define MBEDTLS_CIPHER_MODE_AEAD +#endif + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#define MBEDTLS_CIPHER_MODE_WITH_PADDING +#endif + +#if defined(MBEDTLS_ARC4_C) +#define MBEDTLS_CIPHER_MODE_STREAM +#endif + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE -0x6080 /**< The selected feature is not available. */ +#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA -0x6100 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED -0x6180 /**< Failed to allocate memory. */ +#define MBEDTLS_ERR_CIPHER_INVALID_PADDING -0x6200 /**< Input data contains invalid padding and is rejected. */ +#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED -0x6280 /**< Decryption of block requires a full block. */ +#define MBEDTLS_ERR_CIPHER_AUTH_FAILED -0x6300 /**< Authentication failed (for AEAD modes). */ + +#define MBEDTLS_CIPHER_VARIABLE_IV_LEN 0x01 /**< Cipher accepts IVs of variable length */ +#define MBEDTLS_CIPHER_VARIABLE_KEY_LEN 0x02 /**< Cipher accepts keys of variable length */ + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + MBEDTLS_CIPHER_ID_NONE = 0, + MBEDTLS_CIPHER_ID_NULL, + MBEDTLS_CIPHER_ID_AES, + MBEDTLS_CIPHER_ID_DES, + MBEDTLS_CIPHER_ID_3DES, + MBEDTLS_CIPHER_ID_CAMELLIA, + MBEDTLS_CIPHER_ID_BLOWFISH, + MBEDTLS_CIPHER_ID_ARC4, +} mbedtls_cipher_id_t; + +typedef enum { + MBEDTLS_CIPHER_NONE = 0, + MBEDTLS_CIPHER_NULL, + MBEDTLS_CIPHER_AES_128_ECB, + MBEDTLS_CIPHER_AES_192_ECB, + MBEDTLS_CIPHER_AES_256_ECB, + MBEDTLS_CIPHER_AES_128_CBC, + MBEDTLS_CIPHER_AES_192_CBC, + MBEDTLS_CIPHER_AES_256_CBC, + MBEDTLS_CIPHER_AES_128_CFB128, + MBEDTLS_CIPHER_AES_192_CFB128, + MBEDTLS_CIPHER_AES_256_CFB128, + MBEDTLS_CIPHER_AES_128_CTR, + MBEDTLS_CIPHER_AES_192_CTR, + MBEDTLS_CIPHER_AES_256_CTR, + MBEDTLS_CIPHER_AES_128_GCM, + MBEDTLS_CIPHER_AES_192_GCM, + MBEDTLS_CIPHER_AES_256_GCM, + MBEDTLS_CIPHER_CAMELLIA_128_ECB, + MBEDTLS_CIPHER_CAMELLIA_192_ECB, + MBEDTLS_CIPHER_CAMELLIA_256_ECB, + MBEDTLS_CIPHER_CAMELLIA_128_CBC, + MBEDTLS_CIPHER_CAMELLIA_192_CBC, + MBEDTLS_CIPHER_CAMELLIA_256_CBC, + MBEDTLS_CIPHER_CAMELLIA_128_CFB128, + MBEDTLS_CIPHER_CAMELLIA_192_CFB128, + MBEDTLS_CIPHER_CAMELLIA_256_CFB128, + MBEDTLS_CIPHER_CAMELLIA_128_CTR, + MBEDTLS_CIPHER_CAMELLIA_192_CTR, + MBEDTLS_CIPHER_CAMELLIA_256_CTR, + MBEDTLS_CIPHER_CAMELLIA_128_GCM, + MBEDTLS_CIPHER_CAMELLIA_192_GCM, + MBEDTLS_CIPHER_CAMELLIA_256_GCM, + MBEDTLS_CIPHER_DES_ECB, + MBEDTLS_CIPHER_DES_CBC, + MBEDTLS_CIPHER_DES_EDE_ECB, + MBEDTLS_CIPHER_DES_EDE_CBC, + MBEDTLS_CIPHER_DES_EDE3_ECB, + MBEDTLS_CIPHER_DES_EDE3_CBC, + MBEDTLS_CIPHER_BLOWFISH_ECB, + MBEDTLS_CIPHER_BLOWFISH_CBC, + MBEDTLS_CIPHER_BLOWFISH_CFB64, + MBEDTLS_CIPHER_BLOWFISH_CTR, + MBEDTLS_CIPHER_ARC4_128, + MBEDTLS_CIPHER_AES_128_CCM, + MBEDTLS_CIPHER_AES_192_CCM, + MBEDTLS_CIPHER_AES_256_CCM, + MBEDTLS_CIPHER_CAMELLIA_128_CCM, + MBEDTLS_CIPHER_CAMELLIA_192_CCM, + MBEDTLS_CIPHER_CAMELLIA_256_CCM, +} mbedtls_cipher_type_t; + +typedef enum { + MBEDTLS_MODE_NONE = 0, + MBEDTLS_MODE_ECB, + MBEDTLS_MODE_CBC, + MBEDTLS_MODE_CFB, + MBEDTLS_MODE_OFB, /* Unused! */ + MBEDTLS_MODE_CTR, + MBEDTLS_MODE_GCM, + MBEDTLS_MODE_STREAM, + MBEDTLS_MODE_CCM, +} mbedtls_cipher_mode_t; + +typedef enum { + MBEDTLS_PADDING_PKCS7 = 0, /**< PKCS7 padding (default) */ + MBEDTLS_PADDING_ONE_AND_ZEROS, /**< ISO/IEC 7816-4 padding */ + MBEDTLS_PADDING_ZEROS_AND_LEN, /**< ANSI X.923 padding */ + MBEDTLS_PADDING_ZEROS, /**< zero padding (not reversible!) */ + MBEDTLS_PADDING_NONE, /**< never pad (full blocks only) */ +} mbedtls_cipher_padding_t; + +typedef enum { + MBEDTLS_OPERATION_NONE = -1, + MBEDTLS_DECRYPT = 0, + MBEDTLS_ENCRYPT, +} mbedtls_operation_t; + +enum { + /** Undefined key length */ + MBEDTLS_KEY_LENGTH_NONE = 0, + /** Key length, in bits (including parity), for DES keys */ + MBEDTLS_KEY_LENGTH_DES = 64, + /** Key length, in bits (including parity), for DES in two key EDE */ + MBEDTLS_KEY_LENGTH_DES_EDE = 128, + /** Key length, in bits (including parity), for DES in three-key EDE */ + MBEDTLS_KEY_LENGTH_DES_EDE3 = 192, +}; + +/** Maximum length of any IV, in bytes */ +#define MBEDTLS_MAX_IV_LENGTH 16 +/** Maximum block size of any cipher, in bytes */ +#define MBEDTLS_MAX_BLOCK_LENGTH 16 + +/** + * Base cipher information (opaque struct). + */ +typedef struct mbedtls_cipher_base_t mbedtls_cipher_base_t; + +/** + * Cipher information. Allows cipher functions to be called in a generic way. + */ +typedef struct { + /** Full cipher identifier (e.g. MBEDTLS_CIPHER_AES_256_CBC) */ + mbedtls_cipher_type_t type; + + /** Cipher mode (e.g. MBEDTLS_MODE_CBC) */ + mbedtls_cipher_mode_t mode; + + /** Cipher key length, in bits (default length for variable sized ciphers) + * (Includes parity bits for ciphers like DES) */ + unsigned int key_bitlen; + + /** Name of the cipher */ + const char * name; + + /** IV/NONCE size, in bytes. + * For cipher that accept many sizes: recommended size */ + unsigned int iv_size; + + /** Flags for variable IV size, variable key size, etc. */ + int flags; + + /** block size, in bytes */ + unsigned int block_size; + + /** Base cipher information and functions */ + const mbedtls_cipher_base_t *base; + +} mbedtls_cipher_info_t; + +/** + * Generic cipher context. + */ +typedef struct { + /** Information about the associated cipher */ + const mbedtls_cipher_info_t *cipher_info; + + /** Key length to use */ + int key_bitlen; + + /** Operation that the context's key has been initialised for */ + mbedtls_operation_t operation; + +#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING) + /** Padding functions to use, if relevant for cipher mode */ + void (*add_padding)( unsigned char *output, size_t olen, size_t data_len ); + int (*get_padding)( unsigned char *input, size_t ilen, size_t *data_len ); +#endif + + /** Buffer for data that hasn't been encrypted yet */ + unsigned char unprocessed_data[MBEDTLS_MAX_BLOCK_LENGTH]; + + /** Number of bytes that still need processing */ + size_t unprocessed_len; + + /** Current IV or NONCE_COUNTER for CTR-mode */ + unsigned char iv[MBEDTLS_MAX_IV_LENGTH]; + + /** IV size in bytes (for ciphers with variable-length IVs) */ + size_t iv_size; + + /** Cipher-specific context */ + void *cipher_ctx; +} mbedtls_cipher_context_t; + +/** + * \brief Returns the list of ciphers supported by the generic cipher module. + * + * \return a statically allocated array of ciphers, the last entry + * is 0. + */ +const int *mbedtls_cipher_list( void ); + +/** + * \brief Returns the cipher information structure associated + * with the given cipher name. + * + * \param cipher_name Name of the cipher to search for. + * + * \return the cipher information structure associated with the + * given cipher_name, or NULL if not found. + */ +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_string( const char *cipher_name ); + +/** + * \brief Returns the cipher information structure associated + * with the given cipher type. + * + * \param cipher_type Type of the cipher to search for. + * + * \return the cipher information structure associated with the + * given cipher_type, or NULL if not found. + */ +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_type( const mbedtls_cipher_type_t cipher_type ); + +/** + * \brief Returns the cipher information structure associated + * with the given cipher id, key size and mode. + * + * \param cipher_id Id of the cipher to search for + * (e.g. MBEDTLS_CIPHER_ID_AES) + * \param key_bitlen Length of the key in bits + * \param mode Cipher mode (e.g. MBEDTLS_MODE_CBC) + * + * \return the cipher information structure associated with the + * given cipher_type, or NULL if not found. + */ +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_values( const mbedtls_cipher_id_t cipher_id, + int key_bitlen, + const mbedtls_cipher_mode_t mode ); + +/** + * \brief Initialize a cipher_context (as NONE) + */ +void mbedtls_cipher_init( mbedtls_cipher_context_t *ctx ); + +/** + * \brief Free and clear the cipher-specific context of ctx. + * Freeing ctx itself remains the responsibility of the + * caller. + */ +void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx ); + +/** + * \brief Initialises and fills the cipher context structure with + * the appropriate values. + * + * \note Currently also clears structure. In future versions you + * will be required to call mbedtls_cipher_init() on the structure + * first. + * + * \param ctx context to initialise. May not be NULL. + * \param cipher_info cipher to use. + * + * \return 0 on success, + * MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on parameter failure, + * MBEDTLS_ERR_CIPHER_ALLOC_FAILED if allocation of the + * cipher-specific context failed. + */ +int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx, const mbedtls_cipher_info_t *cipher_info ); + +/** + * \brief Returns the block size of the given cipher. + * + * \param ctx cipher's context. Must have been initialised. + * + * \return size of the cipher's blocks, or 0 if ctx has not been + * initialised. + */ +static inline unsigned int mbedtls_cipher_get_block_size( const mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return 0; + + return ctx->cipher_info->block_size; +} + +/** + * \brief Returns the mode of operation for the cipher. + * (e.g. MBEDTLS_MODE_CBC) + * + * \param ctx cipher's context. Must have been initialised. + * + * \return mode of operation, or MBEDTLS_MODE_NONE if ctx + * has not been initialised. + */ +static inline mbedtls_cipher_mode_t mbedtls_cipher_get_cipher_mode( const mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return MBEDTLS_MODE_NONE; + + return ctx->cipher_info->mode; +} + +/** + * \brief Returns the size of the cipher's IV/NONCE in bytes. + * + * \param ctx cipher's context. Must have been initialised. + * + * \return If IV has not been set yet: (recommended) IV size + * (0 for ciphers not using IV/NONCE). + * If IV has already been set: actual size. + */ +static inline int mbedtls_cipher_get_iv_size( const mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return 0; + + if( ctx->iv_size != 0 ) + return (int) ctx->iv_size; + + return (int) ctx->cipher_info->iv_size; +} + +/** + * \brief Returns the type of the given cipher. + * + * \param ctx cipher's context. Must have been initialised. + * + * \return type of the cipher, or MBEDTLS_CIPHER_NONE if ctx has + * not been initialised. + */ +static inline mbedtls_cipher_type_t mbedtls_cipher_get_type( const mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return MBEDTLS_CIPHER_NONE; + + return ctx->cipher_info->type; +} + +/** + * \brief Returns the name of the given cipher, as a string. + * + * \param ctx cipher's context. Must have been initialised. + * + * \return name of the cipher, or NULL if ctx was not initialised. + */ +static inline const char *mbedtls_cipher_get_name( const mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return 0; + + return ctx->cipher_info->name; +} + +/** + * \brief Returns the key length of the cipher. + * + * \param ctx cipher's context. Must have been initialised. + * + * \return cipher's key length, in bits, or + * MBEDTLS_KEY_LENGTH_NONE if ctx has not been + * initialised. + */ +static inline int mbedtls_cipher_get_key_bitlen( const mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return MBEDTLS_KEY_LENGTH_NONE; + + return (int) ctx->cipher_info->key_bitlen; +} + +/** + * \brief Returns the operation of the given cipher. + * + * \param ctx cipher's context. Must have been initialised. + * + * \return operation (MBEDTLS_ENCRYPT or MBEDTLS_DECRYPT), + * or MBEDTLS_OPERATION_NONE if ctx has not been + * initialised. + */ +static inline mbedtls_operation_t mbedtls_cipher_get_operation( const mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return MBEDTLS_OPERATION_NONE; + + return ctx->operation; +} + +/** + * \brief Set the key to use with the given context. + * + * \param ctx generic cipher context. May not be NULL. Must have been + * initialised using cipher_context_from_type or + * cipher_context_from_string. + * \param key The key to use. + * \param key_bitlen key length to use, in bits. + * \param operation Operation that the key will be used for, either + * MBEDTLS_ENCRYPT or MBEDTLS_DECRYPT. + * + * \returns 0 on success, MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA if + * parameter verification fails or a cipher specific + * error code. + */ +int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx, const unsigned char *key, + int key_bitlen, const mbedtls_operation_t operation ); + +#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING) +/** + * \brief Set padding mode, for cipher modes that use padding. + * (Default: PKCS7 padding.) + * + * \param ctx generic cipher context + * \param mode padding mode + * + * \returns 0 on success, MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE + * if selected padding mode is not supported, or + * MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA if the cipher mode + * does not support padding. + */ +int mbedtls_cipher_set_padding_mode( mbedtls_cipher_context_t *ctx, mbedtls_cipher_padding_t mode ); +#endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */ + +/** + * \brief Set the initialization vector (IV) or nonce + * + * \param ctx generic cipher context + * \param iv IV to use (or NONCE_COUNTER for CTR-mode ciphers) + * \param iv_len IV length for ciphers with variable-size IV; + * discarded by ciphers with fixed-size IV. + * + * \returns 0 on success, or MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA + * + * \note Some ciphers don't use IVs nor NONCE. For these + * ciphers, this function has no effect. + */ +int mbedtls_cipher_set_iv( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len ); + +/** + * \brief Finish preparation of the given context + * + * \param ctx generic cipher context + * + * \returns 0 on success, MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA + * if parameter verification fails. + */ +int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx ); + +#if defined(MBEDTLS_GCM_C) +/** + * \brief Add additional data (for AEAD ciphers). + * Currently only supported with GCM. + * Must be called exactly once, after mbedtls_cipher_reset(). + * + * \param ctx generic cipher context + * \param ad Additional data to use. + * \param ad_len Length of ad. + * + * \return 0 on success, or a specific error code. + */ +int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx, + const unsigned char *ad, size_t ad_len ); +#endif /* MBEDTLS_GCM_C */ + +/** + * \brief Generic cipher update function. Encrypts/decrypts + * using the given cipher context. Writes as many block + * size'd blocks of data as possible to output. Any data + * that cannot be written immediately will either be added + * to the next block, or flushed when cipher_final is + * called. + * Exception: for MBEDTLS_MODE_ECB, expects single block + * in size (e.g. 16 bytes for AES) + * + * \param ctx generic cipher context + * \param input buffer holding the input data + * \param ilen length of the input data + * \param output buffer for the output data. Should be able to hold at + * least ilen + block_size. Cannot be the same buffer as + * input! + * \param olen length of the output data, will be filled with the + * actual number of bytes written. + * + * \returns 0 on success, MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA if + * parameter verification fails, + * MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE on an + * unsupported mode for a cipher or a cipher specific + * error code. + * + * \note If the underlying cipher is GCM, all calls to this + * function, except the last one before mbedtls_cipher_finish(), + * must have ilen a multiple of the block size. + */ +int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input, + size_t ilen, unsigned char *output, size_t *olen ); + +/** + * \brief Generic cipher finalisation function. If data still + * needs to be flushed from an incomplete block, data + * contained within it will be padded with the size of + * the last block, and written to the output buffer. + * + * \param ctx Generic cipher context + * \param output buffer to write data to. Needs block_size available. + * \param olen length of the data written to the output buffer. + * + * \returns 0 on success, MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA if + * parameter verification fails, + * MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED if decryption + * expected a full block but was not provided one, + * MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding + * while decrypting or a cipher specific error code. + */ +int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx, + unsigned char *output, size_t *olen ); + +#if defined(MBEDTLS_GCM_C) +/** + * \brief Write tag for AEAD ciphers. + * Currently only supported with GCM. + * Must be called after mbedtls_cipher_finish(). + * + * \param ctx Generic cipher context + * \param tag buffer to write the tag + * \param tag_len Length of the tag to write + * + * \return 0 on success, or a specific error code. + */ +int mbedtls_cipher_write_tag( mbedtls_cipher_context_t *ctx, + unsigned char *tag, size_t tag_len ); + +/** + * \brief Check tag for AEAD ciphers. + * Currently only supported with GCM. + * Must be called after mbedtls_cipher_finish(). + * + * \param ctx Generic cipher context + * \param tag Buffer holding the tag + * \param tag_len Length of the tag to check + * + * \return 0 on success, or a specific error code. + */ +int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx, + const unsigned char *tag, size_t tag_len ); +#endif /* MBEDTLS_GCM_C */ + +/** + * \brief Generic all-in-one encryption/decryption + * (for all ciphers except AEAD constructs). + * + * \param ctx generic cipher context + * \param iv IV to use (or NONCE_COUNTER for CTR-mode ciphers) + * \param iv_len IV length for ciphers with variable-size IV; + * discarded by ciphers with fixed-size IV. + * \param input buffer holding the input data + * \param ilen length of the input data + * \param output buffer for the output data. Should be able to hold at + * least ilen + block_size. Cannot be the same buffer as + * input! + * \param olen length of the output data, will be filled with the + * actual number of bytes written. + * + * \note Some ciphers don't use IVs nor NONCE. For these + * ciphers, use iv = NULL and iv_len = 0. + * + * \returns 0 on success, or + * MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA, or + * MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED if decryption + * expected a full block but was not provided one, or + * MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding + * while decrypting, or + * a cipher specific error code. + */ +int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen ); + +#if defined(MBEDTLS_CIPHER_MODE_AEAD) +/** + * \brief Generic autenticated encryption (AEAD ciphers). + * + * \param ctx generic cipher context + * \param iv IV to use (or NONCE_COUNTER for CTR-mode ciphers) + * \param iv_len IV length for ciphers with variable-size IV; + * discarded by ciphers with fixed-size IV. + * \param ad Additional data to authenticate. + * \param ad_len Length of ad. + * \param input buffer holding the input data + * \param ilen length of the input data + * \param output buffer for the output data. + * Should be able to hold at least ilen. + * \param olen length of the output data, will be filled with the + * actual number of bytes written. + * \param tag buffer for the authentication tag + * \param tag_len desired tag length + * + * \returns 0 on success, or + * MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA, or + * a cipher specific error code. + */ +int mbedtls_cipher_auth_encrypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, + unsigned char *tag, size_t tag_len ); + +/** + * \brief Generic autenticated decryption (AEAD ciphers). + * + * \param ctx generic cipher context + * \param iv IV to use (or NONCE_COUNTER for CTR-mode ciphers) + * \param iv_len IV length for ciphers with variable-size IV; + * discarded by ciphers with fixed-size IV. + * \param ad Additional data to be authenticated. + * \param ad_len Length of ad. + * \param input buffer holding the input data + * \param ilen length of the input data + * \param output buffer for the output data. + * Should be able to hold at least ilen. + * \param olen length of the output data, will be filled with the + * actual number of bytes written. + * \param tag buffer holding the authentication tag + * \param tag_len length of the authentication tag + * + * \returns 0 on success, or + * MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA, or + * MBEDTLS_ERR_CIPHER_AUTH_FAILED if data isn't authentic, + * or a cipher specific error code. + * + * \note If the data is not authentic, then the output buffer + * is zeroed out to prevent the unauthentic plaintext to + * be used by mistake, making this interface safer. + */ +int mbedtls_cipher_auth_decrypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, + const unsigned char *tag, size_t tag_len ); +#endif /* MBEDTLS_CIPHER_MODE_AEAD */ + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_CIPHER_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/cipher_internal.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/cipher_internal.h new file mode 100644 index 0000000..6c58bcc --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/cipher_internal.h @@ -0,0 +1,109 @@ +/** + * \file cipher_internal.h + * + * \brief Cipher wrappers. + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_CIPHER_WRAP_H +#define MBEDTLS_CIPHER_WRAP_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "cipher.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Base cipher information. The non-mode specific functions and values. + */ +struct mbedtls_cipher_base_t +{ + /** Base Cipher type (e.g. MBEDTLS_CIPHER_ID_AES) */ + mbedtls_cipher_id_t cipher; + + /** Encrypt using ECB */ + int (*ecb_func)( void *ctx, mbedtls_operation_t mode, + const unsigned char *input, unsigned char *output ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + /** Encrypt using CBC */ + int (*cbc_func)( void *ctx, mbedtls_operation_t mode, size_t length, + unsigned char *iv, const unsigned char *input, + unsigned char *output ); +#endif + +#if defined(MBEDTLS_CIPHER_MODE_CFB) + /** Encrypt using CFB (Full length) */ + int (*cfb_func)( void *ctx, mbedtls_operation_t mode, size_t length, size_t *iv_off, + unsigned char *iv, const unsigned char *input, + unsigned char *output ); +#endif + +#if defined(MBEDTLS_CIPHER_MODE_CTR) + /** Encrypt using CTR */ + int (*ctr_func)( void *ctx, size_t length, size_t *nc_off, + unsigned char *nonce_counter, unsigned char *stream_block, + const unsigned char *input, unsigned char *output ); +#endif + +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + /** Encrypt using STREAM */ + int (*stream_func)( void *ctx, size_t length, + const unsigned char *input, unsigned char *output ); +#endif + + /** Set key for encryption purposes */ + int (*setkey_enc_func)( void *ctx, const unsigned char *key, + unsigned int key_bitlen ); + + /** Set key for decryption purposes */ + int (*setkey_dec_func)( void *ctx, const unsigned char *key, + unsigned int key_bitlen); + + /** Allocate a new context */ + void * (*ctx_alloc_func)( void ); + + /** Free the given context */ + void (*ctx_free_func)( void *ctx ); + +}; + +typedef struct +{ + mbedtls_cipher_type_t type; + const mbedtls_cipher_info_t *info; +} mbedtls_cipher_definition_t; + +extern const mbedtls_cipher_definition_t mbedtls_cipher_definitions[]; + +extern int mbedtls_cipher_supported[]; + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_CIPHER_WRAP_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/compat-1.3.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/compat-1.3.h new file mode 100644 index 0000000..27abbd9 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/compat-1.3.h @@ -0,0 +1,2634 @@ +/** + * \file compat-1.3.h + * + * \brief Compatibility definitions for using mbed TLS with client code written + * for the PolarSSL naming conventions. + * + * \deprecated Use the new names directly instead + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if ! defined(MBEDTLS_DEPRECATED_REMOVED) + +#if defined(MBEDTLS_DEPRECATED_WARNING) +#warning "Including compat-1.3.h is deprecated" +#endif + +#ifndef MBEDTLS_COMPAT13_H +#define MBEDTLS_COMPAT13_H + +/* + * config.h options + */ +#if defined MBEDTLS_AESNI_C +#define POLARSSL_AESNI_C MBEDTLS_AESNI_C +#endif +#if defined MBEDTLS_AES_ALT +#define POLARSSL_AES_ALT MBEDTLS_AES_ALT +#endif +#if defined MBEDTLS_AES_C +#define POLARSSL_AES_C MBEDTLS_AES_C +#endif +#if defined MBEDTLS_AES_ROM_TABLES +#define POLARSSL_AES_ROM_TABLES MBEDTLS_AES_ROM_TABLES +#endif +#if defined MBEDTLS_ARC4_ALT +#define POLARSSL_ARC4_ALT MBEDTLS_ARC4_ALT +#endif +#if defined MBEDTLS_ARC4_C +#define POLARSSL_ARC4_C MBEDTLS_ARC4_C +#endif +#if defined MBEDTLS_ASN1_PARSE_C +#define POLARSSL_ASN1_PARSE_C MBEDTLS_ASN1_PARSE_C +#endif +#if defined MBEDTLS_ASN1_WRITE_C +#define POLARSSL_ASN1_WRITE_C MBEDTLS_ASN1_WRITE_C +#endif +#if defined MBEDTLS_BASE64_C +#define POLARSSL_BASE64_C MBEDTLS_BASE64_C +#endif +#if defined MBEDTLS_BIGNUM_C +#define POLARSSL_BIGNUM_C MBEDTLS_BIGNUM_C +#endif +#if defined MBEDTLS_BLOWFISH_ALT +#define POLARSSL_BLOWFISH_ALT MBEDTLS_BLOWFISH_ALT +#endif +#if defined MBEDTLS_BLOWFISH_C +#define POLARSSL_BLOWFISH_C MBEDTLS_BLOWFISH_C +#endif +#if defined MBEDTLS_CAMELLIA_ALT +#define POLARSSL_CAMELLIA_ALT MBEDTLS_CAMELLIA_ALT +#endif +#if defined MBEDTLS_CAMELLIA_C +#define POLARSSL_CAMELLIA_C MBEDTLS_CAMELLIA_C +#endif +#if defined MBEDTLS_CAMELLIA_SMALL_MEMORY +#define POLARSSL_CAMELLIA_SMALL_MEMORY MBEDTLS_CAMELLIA_SMALL_MEMORY +#endif +#if defined MBEDTLS_CCM_C +#define POLARSSL_CCM_C MBEDTLS_CCM_C +#endif +#if defined MBEDTLS_CERTS_C +#define POLARSSL_CERTS_C MBEDTLS_CERTS_C +#endif +#if defined MBEDTLS_CIPHER_C +#define POLARSSL_CIPHER_C MBEDTLS_CIPHER_C +#endif +#if defined MBEDTLS_CIPHER_MODE_CBC +#define POLARSSL_CIPHER_MODE_CBC MBEDTLS_CIPHER_MODE_CBC +#endif +#if defined MBEDTLS_CIPHER_MODE_CFB +#define POLARSSL_CIPHER_MODE_CFB MBEDTLS_CIPHER_MODE_CFB +#endif +#if defined MBEDTLS_CIPHER_MODE_CTR +#define POLARSSL_CIPHER_MODE_CTR MBEDTLS_CIPHER_MODE_CTR +#endif +#if defined MBEDTLS_CIPHER_NULL_CIPHER +#define POLARSSL_CIPHER_NULL_CIPHER MBEDTLS_CIPHER_NULL_CIPHER +#endif +#if defined MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS +#define POLARSSL_CIPHER_PADDING_ONE_AND_ZEROS MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS +#endif +#if defined MBEDTLS_CIPHER_PADDING_PKCS7 +#define POLARSSL_CIPHER_PADDING_PKCS7 MBEDTLS_CIPHER_PADDING_PKCS7 +#endif +#if defined MBEDTLS_CIPHER_PADDING_ZEROS +#define POLARSSL_CIPHER_PADDING_ZEROS MBEDTLS_CIPHER_PADDING_ZEROS +#endif +#if defined MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN +#define POLARSSL_CIPHER_PADDING_ZEROS_AND_LEN MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN +#endif +#if defined MBEDTLS_CTR_DRBG_C +#define POLARSSL_CTR_DRBG_C MBEDTLS_CTR_DRBG_C +#endif +#if defined MBEDTLS_DEBUG_C +#define POLARSSL_DEBUG_C MBEDTLS_DEBUG_C +#endif +#if defined MBEDTLS_DEPRECATED_REMOVED +#define POLARSSL_DEPRECATED_REMOVED MBEDTLS_DEPRECATED_REMOVED +#endif +#if defined MBEDTLS_DEPRECATED_WARNING +#define POLARSSL_DEPRECATED_WARNING MBEDTLS_DEPRECATED_WARNING +#endif +#if defined MBEDTLS_DES_ALT +#define POLARSSL_DES_ALT MBEDTLS_DES_ALT +#endif +#if defined MBEDTLS_DES_C +#define POLARSSL_DES_C MBEDTLS_DES_C +#endif +#if defined MBEDTLS_DHM_C +#define POLARSSL_DHM_C MBEDTLS_DHM_C +#endif +#if defined MBEDTLS_ECDH_C +#define POLARSSL_ECDH_C MBEDTLS_ECDH_C +#endif +#if defined MBEDTLS_ECDSA_C +#define POLARSSL_ECDSA_C MBEDTLS_ECDSA_C +#endif +#if defined MBEDTLS_ECDSA_DETERMINISTIC +#define POLARSSL_ECDSA_DETERMINISTIC MBEDTLS_ECDSA_DETERMINISTIC +#endif +#if defined MBEDTLS_ECP_C +#define POLARSSL_ECP_C MBEDTLS_ECP_C +#endif +#if defined MBEDTLS_ECP_DP_BP256R1_ENABLED +#define POLARSSL_ECP_DP_BP256R1_ENABLED MBEDTLS_ECP_DP_BP256R1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_BP384R1_ENABLED +#define POLARSSL_ECP_DP_BP384R1_ENABLED MBEDTLS_ECP_DP_BP384R1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_BP512R1_ENABLED +#define POLARSSL_ECP_DP_BP512R1_ENABLED MBEDTLS_ECP_DP_BP512R1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_CURVE25519_ENABLED +#define POLARSSL_ECP_DP_M255_ENABLED MBEDTLS_ECP_DP_CURVE25519_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP192K1_ENABLED +#define POLARSSL_ECP_DP_SECP192K1_ENABLED MBEDTLS_ECP_DP_SECP192K1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP192R1_ENABLED +#define POLARSSL_ECP_DP_SECP192R1_ENABLED MBEDTLS_ECP_DP_SECP192R1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP224K1_ENABLED +#define POLARSSL_ECP_DP_SECP224K1_ENABLED MBEDTLS_ECP_DP_SECP224K1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP224R1_ENABLED +#define POLARSSL_ECP_DP_SECP224R1_ENABLED MBEDTLS_ECP_DP_SECP224R1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP256K1_ENABLED +#define POLARSSL_ECP_DP_SECP256K1_ENABLED MBEDTLS_ECP_DP_SECP256K1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP256R1_ENABLED +#define POLARSSL_ECP_DP_SECP256R1_ENABLED MBEDTLS_ECP_DP_SECP256R1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP384R1_ENABLED +#define POLARSSL_ECP_DP_SECP384R1_ENABLED MBEDTLS_ECP_DP_SECP384R1_ENABLED +#endif +#if defined MBEDTLS_ECP_DP_SECP521R1_ENABLED +#define POLARSSL_ECP_DP_SECP521R1_ENABLED MBEDTLS_ECP_DP_SECP521R1_ENABLED +#endif +#if defined MBEDTLS_ECP_FIXED_POINT_OPTIM +#define POLARSSL_ECP_FIXED_POINT_OPTIM MBEDTLS_ECP_FIXED_POINT_OPTIM +#endif +#if defined MBEDTLS_ECP_MAX_BITS +#define POLARSSL_ECP_MAX_BITS MBEDTLS_ECP_MAX_BITS +#endif +#if defined MBEDTLS_ECP_NIST_OPTIM +#define POLARSSL_ECP_NIST_OPTIM MBEDTLS_ECP_NIST_OPTIM +#endif +#if defined MBEDTLS_ECP_WINDOW_SIZE +#define POLARSSL_ECP_WINDOW_SIZE MBEDTLS_ECP_WINDOW_SIZE +#endif +#if defined MBEDTLS_ENABLE_WEAK_CIPHERSUITES +#define POLARSSL_ENABLE_WEAK_CIPHERSUITES MBEDTLS_ENABLE_WEAK_CIPHERSUITES +#endif +#if defined MBEDTLS_ENTROPY_C +#define POLARSSL_ENTROPY_C MBEDTLS_ENTROPY_C +#endif +#if defined MBEDTLS_ENTROPY_FORCE_SHA256 +#define POLARSSL_ENTROPY_FORCE_SHA256 MBEDTLS_ENTROPY_FORCE_SHA256 +#endif +#if defined MBEDTLS_ERROR_C +#define POLARSSL_ERROR_C MBEDTLS_ERROR_C +#endif +#if defined MBEDTLS_ERROR_STRERROR_BC +#define POLARSSL_ERROR_STRERROR_BC MBEDTLS_ERROR_STRERROR_BC +#endif +#if defined MBEDTLS_ERROR_STRERROR_DUMMY +#define POLARSSL_ERROR_STRERROR_DUMMY MBEDTLS_ERROR_STRERROR_DUMMY +#endif +#if defined MBEDTLS_FS_IO +#define POLARSSL_FS_IO MBEDTLS_FS_IO +#endif +#if defined MBEDTLS_GCM_C +#define POLARSSL_GCM_C MBEDTLS_GCM_C +#endif +#if defined MBEDTLS_GENPRIME +#define POLARSSL_GENPRIME MBEDTLS_GENPRIME +#endif +#if defined MBEDTLS_HAVEGE_C +#define POLARSSL_HAVEGE_C MBEDTLS_HAVEGE_C +#endif +#if defined MBEDTLS_HAVE_ASM +#define POLARSSL_HAVE_ASM MBEDTLS_HAVE_ASM +#endif +#if defined MBEDTLS_HAVE_SSE2 +#define POLARSSL_HAVE_SSE2 MBEDTLS_HAVE_SSE2 +#endif +#if defined MBEDTLS_HAVE_TIME +#define POLARSSL_HAVE_TIME MBEDTLS_HAVE_TIME +#endif +#if defined MBEDTLS_HMAC_DRBG_C +#define POLARSSL_HMAC_DRBG_C MBEDTLS_HMAC_DRBG_C +#endif +#if defined MBEDTLS_HMAC_DRBG_MAX_INPUT +#define POLARSSL_HMAC_DRBG_MAX_INPUT MBEDTLS_HMAC_DRBG_MAX_INPUT +#endif +#if defined MBEDTLS_HMAC_DRBG_MAX_REQUEST +#define POLARSSL_HMAC_DRBG_MAX_REQUEST MBEDTLS_HMAC_DRBG_MAX_REQUEST +#endif +#if defined MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT +#define POLARSSL_HMAC_DRBG_MAX_SEED_INPUT MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT +#endif +#if defined MBEDTLS_HMAC_DRBG_RESEED_INTERVAL +#define POLARSSL_HMAC_DRBG_RESEED_INTERVAL MBEDTLS_HMAC_DRBG_RESEED_INTERVAL +#endif +#if defined MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED +#define POLARSSL_KEY_EXCHANGE_DHE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED +#define POLARSSL_KEY_EXCHANGE_DHE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED +#define POLARSSL_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED +#define POLARSSL_KEY_EXCHANGE_ECDHE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED +#define POLARSSL_KEY_EXCHANGE_ECDHE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED +#define POLARSSL_KEY_EXCHANGE_ECDH_ECDSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED +#define POLARSSL_KEY_EXCHANGE_ECDH_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_PSK_ENABLED +#define POLARSSL_KEY_EXCHANGE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_PSK_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_RSA_ENABLED +#define POLARSSL_KEY_EXCHANGE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_RSA_ENABLED +#endif +#if defined MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED +#define POLARSSL_KEY_EXCHANGE_RSA_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED +#endif +#if defined MBEDTLS_MD2_ALT +#define POLARSSL_MD2_ALT MBEDTLS_MD2_ALT +#endif +#if defined MBEDTLS_MD2_C +#define POLARSSL_MD2_C MBEDTLS_MD2_C +#endif +#if defined MBEDTLS_MD2_PROCESS_ALT +#define POLARSSL_MD2_PROCESS_ALT MBEDTLS_MD2_PROCESS_ALT +#endif +#if defined MBEDTLS_MD4_ALT +#define POLARSSL_MD4_ALT MBEDTLS_MD4_ALT +#endif +#if defined MBEDTLS_MD4_C +#define POLARSSL_MD4_C MBEDTLS_MD4_C +#endif +#if defined MBEDTLS_MD4_PROCESS_ALT +#define POLARSSL_MD4_PROCESS_ALT MBEDTLS_MD4_PROCESS_ALT +#endif +#if defined MBEDTLS_MD5_ALT +#define POLARSSL_MD5_ALT MBEDTLS_MD5_ALT +#endif +#if defined MBEDTLS_MD5_C +#define POLARSSL_MD5_C MBEDTLS_MD5_C +#endif +#if defined MBEDTLS_MD5_PROCESS_ALT +#define POLARSSL_MD5_PROCESS_ALT MBEDTLS_MD5_PROCESS_ALT +#endif +#if defined MBEDTLS_MD_C +#define POLARSSL_MD_C MBEDTLS_MD_C +#endif +#if defined MBEDTLS_MEMORY_ALIGN_MULTIPLE +#define POLARSSL_MEMORY_ALIGN_MULTIPLE MBEDTLS_MEMORY_ALIGN_MULTIPLE +#endif +#if defined MBEDTLS_MEMORY_BACKTRACE +#define POLARSSL_MEMORY_BACKTRACE MBEDTLS_MEMORY_BACKTRACE +#endif +#if defined MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define POLARSSL_MEMORY_BUFFER_ALLOC_C MBEDTLS_MEMORY_BUFFER_ALLOC_C +#endif +#if defined MBEDTLS_MEMORY_C +#define POLARSSL_MEMORY_C MBEDTLS_MEMORY_C +#endif +#if defined MBEDTLS_MEMORY_DEBUG +#define POLARSSL_MEMORY_DEBUG MBEDTLS_MEMORY_DEBUG +#endif +#if defined MBEDTLS_MPI_MAX_SIZE +#define POLARSSL_MPI_MAX_SIZE MBEDTLS_MPI_MAX_SIZE +#endif +#if defined MBEDTLS_MPI_WINDOW_SIZE +#define POLARSSL_MPI_WINDOW_SIZE MBEDTLS_MPI_WINDOW_SIZE +#endif +#if defined MBEDTLS_NET_C +#define POLARSSL_NET_C MBEDTLS_NET_C +#endif +#if defined MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES +#define POLARSSL_NO_DEFAULT_ENTROPY_SOURCES MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES +#endif +#if defined MBEDTLS_NO_PLATFORM_ENTROPY +#define POLARSSL_NO_PLATFORM_ENTROPY MBEDTLS_NO_PLATFORM_ENTROPY +#endif +#if defined MBEDTLS_OID_C +#define POLARSSL_OID_C MBEDTLS_OID_C +#endif +#if defined MBEDTLS_PADLOCK_C +#define POLARSSL_PADLOCK_C MBEDTLS_PADLOCK_C +#endif +#if defined MBEDTLS_PBKDF2_C +#define POLARSSL_PBKDF2_C MBEDTLS_PBKDF2_C +#endif +#if defined MBEDTLS_PEM_PARSE_C +#define POLARSSL_PEM_PARSE_C MBEDTLS_PEM_PARSE_C +#endif +#if defined MBEDTLS_PEM_WRITE_C +#define POLARSSL_PEM_WRITE_C MBEDTLS_PEM_WRITE_C +#endif +#if defined MBEDTLS_PKCS11_C +#define POLARSSL_PKCS11_C MBEDTLS_PKCS11_C +#endif +#if defined MBEDTLS_PKCS12_C +#define POLARSSL_PKCS12_C MBEDTLS_PKCS12_C +#endif +#if defined MBEDTLS_PKCS1_V15 +#define POLARSSL_PKCS1_V15 MBEDTLS_PKCS1_V15 +#endif +#if defined MBEDTLS_PKCS1_V21 +#define POLARSSL_PKCS1_V21 MBEDTLS_PKCS1_V21 +#endif +#if defined MBEDTLS_PKCS5_C +#define POLARSSL_PKCS5_C MBEDTLS_PKCS5_C +#endif +#if defined MBEDTLS_PK_C +#define POLARSSL_PK_C MBEDTLS_PK_C +#endif +#if defined MBEDTLS_PK_PARSE_C +#define POLARSSL_PK_PARSE_C MBEDTLS_PK_PARSE_C +#endif +#if defined MBEDTLS_PK_PARSE_EC_EXTENDED +#define POLARSSL_PK_PARSE_EC_EXTENDED MBEDTLS_PK_PARSE_EC_EXTENDED +#endif +#if defined MBEDTLS_PK_RSA_ALT_SUPPORT +#define POLARSSL_PK_RSA_ALT_SUPPORT MBEDTLS_PK_RSA_ALT_SUPPORT +#endif +#if defined MBEDTLS_PK_WRITE_C +#define POLARSSL_PK_WRITE_C MBEDTLS_PK_WRITE_C +#endif +#if defined MBEDTLS_PLATFORM_C +#define POLARSSL_PLATFORM_C MBEDTLS_PLATFORM_C +#endif +#if defined MBEDTLS_PLATFORM_EXIT_ALT +#define POLARSSL_PLATFORM_EXIT_ALT MBEDTLS_PLATFORM_EXIT_ALT +#endif +#if defined MBEDTLS_PLATFORM_EXIT_MACRO +#define POLARSSL_PLATFORM_EXIT_MACRO MBEDTLS_PLATFORM_EXIT_MACRO +#endif +#if defined MBEDTLS_PLATFORM_FPRINTF_ALT +#define POLARSSL_PLATFORM_FPRINTF_ALT MBEDTLS_PLATFORM_FPRINTF_ALT +#endif +#if defined MBEDTLS_PLATFORM_FPRINTF_MACRO +#define POLARSSL_PLATFORM_FPRINTF_MACRO MBEDTLS_PLATFORM_FPRINTF_MACRO +#endif +#if defined MBEDTLS_PLATFORM_FREE_MACRO +#define POLARSSL_PLATFORM_FREE_MACRO MBEDTLS_PLATFORM_FREE_MACRO +#endif +#if defined MBEDTLS_PLATFORM_MEMORY +#define POLARSSL_PLATFORM_MEMORY MBEDTLS_PLATFORM_MEMORY +#endif +#if defined MBEDTLS_PLATFORM_NO_STD_FUNCTIONS +#define POLARSSL_PLATFORM_NO_STD_FUNCTIONS MBEDTLS_PLATFORM_NO_STD_FUNCTIONS +#endif +#if defined MBEDTLS_PLATFORM_PRINTF_ALT +#define POLARSSL_PLATFORM_PRINTF_ALT MBEDTLS_PLATFORM_PRINTF_ALT +#endif +#if defined MBEDTLS_PLATFORM_PRINTF_MACRO +#define POLARSSL_PLATFORM_PRINTF_MACRO MBEDTLS_PLATFORM_PRINTF_MACRO +#endif +#if defined MBEDTLS_PLATFORM_SNPRINTF_ALT +#define POLARSSL_PLATFORM_SNPRINTF_ALT MBEDTLS_PLATFORM_SNPRINTF_ALT +#endif +#if defined MBEDTLS_PLATFORM_SNPRINTF_MACRO +#define POLARSSL_PLATFORM_SNPRINTF_MACRO MBEDTLS_PLATFORM_SNPRINTF_MACRO +#endif +#if defined MBEDTLS_PLATFORM_STD_EXIT +#define POLARSSL_PLATFORM_STD_EXIT MBEDTLS_PLATFORM_STD_EXIT +#endif +#if defined MBEDTLS_PLATFORM_STD_FPRINTF +#define POLARSSL_PLATFORM_STD_FPRINTF MBEDTLS_PLATFORM_STD_FPRINTF +#endif +#if defined MBEDTLS_PLATFORM_STD_FREE +#define POLARSSL_PLATFORM_STD_FREE MBEDTLS_PLATFORM_STD_FREE +#endif +#if defined MBEDTLS_PLATFORM_STD_MALLOC +#define POLARSSL_PLATFORM_STD_MALLOC MBEDTLS_PLATFORM_STD_MALLOC +#endif +#if defined MBEDTLS_PLATFORM_STD_MEM_HDR +#define POLARSSL_PLATFORM_STD_MEM_HDR MBEDTLS_PLATFORM_STD_MEM_HDR +#endif +#if defined MBEDTLS_PLATFORM_STD_PRINTF +#define POLARSSL_PLATFORM_STD_PRINTF MBEDTLS_PLATFORM_STD_PRINTF +#endif +#if defined MBEDTLS_PLATFORM_STD_SNPRINTF +#define POLARSSL_PLATFORM_STD_SNPRINTF MBEDTLS_PLATFORM_STD_SNPRINTF +#endif +#if defined MBEDTLS_PSK_MAX_LEN +#define POLARSSL_PSK_MAX_LEN MBEDTLS_PSK_MAX_LEN +#endif +#if defined MBEDTLS_REMOVE_ARC4_CIPHERSUITES +#define POLARSSL_REMOVE_ARC4_CIPHERSUITES MBEDTLS_REMOVE_ARC4_CIPHERSUITES +#endif +#if defined MBEDTLS_RIPEMD160_ALT +#define POLARSSL_RIPEMD160_ALT MBEDTLS_RIPEMD160_ALT +#endif +#if defined MBEDTLS_RIPEMD160_C +#define POLARSSL_RIPEMD160_C MBEDTLS_RIPEMD160_C +#endif +#if defined MBEDTLS_RIPEMD160_PROCESS_ALT +#define POLARSSL_RIPEMD160_PROCESS_ALT MBEDTLS_RIPEMD160_PROCESS_ALT +#endif +#if defined MBEDTLS_RSA_C +#define POLARSSL_RSA_C MBEDTLS_RSA_C +#endif +#if defined MBEDTLS_RSA_NO_CRT +#define POLARSSL_RSA_NO_CRT MBEDTLS_RSA_NO_CRT +#endif +#if defined MBEDTLS_SELF_TEST +#define POLARSSL_SELF_TEST MBEDTLS_SELF_TEST +#endif +#if defined MBEDTLS_SHA1_ALT +#define POLARSSL_SHA1_ALT MBEDTLS_SHA1_ALT +#endif +#if defined MBEDTLS_SHA1_C +#define POLARSSL_SHA1_C MBEDTLS_SHA1_C +#endif +#if defined MBEDTLS_SHA1_PROCESS_ALT +#define POLARSSL_SHA1_PROCESS_ALT MBEDTLS_SHA1_PROCESS_ALT +#endif +#if defined MBEDTLS_SHA256_ALT +#define POLARSSL_SHA256_ALT MBEDTLS_SHA256_ALT +#endif +#if defined MBEDTLS_SHA256_C +#define POLARSSL_SHA256_C MBEDTLS_SHA256_C +#endif +#if defined MBEDTLS_SHA256_PROCESS_ALT +#define POLARSSL_SHA256_PROCESS_ALT MBEDTLS_SHA256_PROCESS_ALT +#endif +#if defined MBEDTLS_SHA512_ALT +#define POLARSSL_SHA512_ALT MBEDTLS_SHA512_ALT +#endif +#if defined MBEDTLS_SHA512_C +#define POLARSSL_SHA512_C MBEDTLS_SHA512_C +#endif +#if defined MBEDTLS_SHA512_PROCESS_ALT +#define POLARSSL_SHA512_PROCESS_ALT MBEDTLS_SHA512_PROCESS_ALT +#endif +#if defined MBEDTLS_SSL_AEAD_RANDOM_IV +#define POLARSSL_SSL_AEAD_RANDOM_IV MBEDTLS_SSL_AEAD_RANDOM_IV +#endif +#if defined MBEDTLS_SSL_ALERT_MESSAGES +#define POLARSSL_SSL_ALERT_MESSAGES MBEDTLS_SSL_ALERT_MESSAGES +#endif +#if defined MBEDTLS_SSL_ALL_ALERT_MESSAGES +#define POLARSSL_SSL_ALL_ALERT_MESSAGES MBEDTLS_SSL_ALL_ALERT_MESSAGES +#endif +#if defined MBEDTLS_SSL_ALPN +#define POLARSSL_SSL_ALPN MBEDTLS_SSL_ALPN +#endif +#if defined MBEDTLS_SSL_CACHE_C +#define POLARSSL_SSL_CACHE_C MBEDTLS_SSL_CACHE_C +#endif +#if defined MBEDTLS_SSL_CBC_RECORD_SPLITTING +#define POLARSSL_SSL_CBC_RECORD_SPLITTING MBEDTLS_SSL_CBC_RECORD_SPLITTING +#endif +#if defined MBEDTLS_SSL_CLI_C +#define POLARSSL_SSL_CLI_C MBEDTLS_SSL_CLI_C +#endif +#if defined MBEDTLS_SSL_COOKIE_C +#define POLARSSL_SSL_COOKIE_C MBEDTLS_SSL_COOKIE_C +#endif +#if defined MBEDTLS_SSL_COOKIE_TIMEOUT +#define POLARSSL_SSL_COOKIE_TIMEOUT MBEDTLS_SSL_COOKIE_TIMEOUT +#endif +#if defined MBEDTLS_SSL_DEBUG_ALL +#define POLARSSL_SSL_DEBUG_ALL MBEDTLS_SSL_DEBUG_ALL +#endif +#if defined MBEDTLS_SSL_DISABLE_RENEGOTIATION +#define POLARSSL_SSL_DISABLE_RENEGOTIATION MBEDTLS_SSL_DISABLE_RENEGOTIATION +#endif +#if defined MBEDTLS_SSL_DTLS_ANTI_REPLAY +#define POLARSSL_SSL_DTLS_ANTI_REPLAY MBEDTLS_SSL_DTLS_ANTI_REPLAY +#endif +#if defined MBEDTLS_SSL_DTLS_BADMAC_LIMIT +#define POLARSSL_SSL_DTLS_BADMAC_LIMIT MBEDTLS_SSL_DTLS_BADMAC_LIMIT +#endif +#if defined MBEDTLS_SSL_DTLS_HELLO_VERIFY +#define POLARSSL_SSL_DTLS_HELLO_VERIFY MBEDTLS_SSL_DTLS_HELLO_VERIFY +#endif +#if defined MBEDTLS_SSL_ENCRYPT_THEN_MAC +#define POLARSSL_SSL_ENCRYPT_THEN_MAC MBEDTLS_SSL_ENCRYPT_THEN_MAC +#endif +#if defined MBEDTLS_SSL_EXTENDED_MASTER_SECRET +#define POLARSSL_SSL_EXTENDED_MASTER_SECRET MBEDTLS_SSL_EXTENDED_MASTER_SECRET +#endif +#if defined MBEDTLS_SSL_FALLBACK_SCSV +#define POLARSSL_SSL_FALLBACK_SCSV MBEDTLS_SSL_FALLBACK_SCSV +#endif +#if defined MBEDTLS_SSL_HW_RECORD_ACCEL +#define POLARSSL_SSL_HW_RECORD_ACCEL MBEDTLS_SSL_HW_RECORD_ACCEL +#endif +#if defined MBEDTLS_SSL_MAX_FRAGMENT_LENGTH +#define POLARSSL_SSL_MAX_FRAGMENT_LENGTH MBEDTLS_SSL_MAX_FRAGMENT_LENGTH +#endif +#if defined MBEDTLS_SSL_PROTO_DTLS +#define POLARSSL_SSL_PROTO_DTLS MBEDTLS_SSL_PROTO_DTLS +#endif +#if defined MBEDTLS_SSL_PROTO_SSL3 +#define POLARSSL_SSL_PROTO_SSL3 MBEDTLS_SSL_PROTO_SSL3 +#endif +#if defined MBEDTLS_SSL_PROTO_TLS1 +#define POLARSSL_SSL_PROTO_TLS1 MBEDTLS_SSL_PROTO_TLS1 +#endif +#if defined MBEDTLS_SSL_PROTO_TLS1_1 +#define POLARSSL_SSL_PROTO_TLS1_1 MBEDTLS_SSL_PROTO_TLS1_1 +#endif +#if defined MBEDTLS_SSL_PROTO_TLS1_2 +#define POLARSSL_SSL_PROTO_TLS1_2 MBEDTLS_SSL_PROTO_TLS1_2 +#endif +#if defined MBEDTLS_SSL_RENEGOTIATION +#define POLARSSL_SSL_RENEGOTIATION MBEDTLS_SSL_RENEGOTIATION +#endif +#if defined MBEDTLS_SSL_SERVER_NAME_INDICATION +#define POLARSSL_SSL_SERVER_NAME_INDICATION MBEDTLS_SSL_SERVER_NAME_INDICATION +#endif +#if defined MBEDTLS_SSL_SESSION_TICKETS +#define POLARSSL_SSL_SESSION_TICKETS MBEDTLS_SSL_SESSION_TICKETS +#endif +#if defined MBEDTLS_SSL_SRV_C +#define POLARSSL_SSL_SRV_C MBEDTLS_SSL_SRV_C +#endif +#if defined MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE +#define POLARSSL_SSL_SRV_RESPECT_CLIENT_PREFERENCE MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE +#endif +#if defined MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO +#define POLARSSL_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO +#endif +#if defined MBEDTLS_SSL_TLS_C +#define POLARSSL_SSL_TLS_C MBEDTLS_SSL_TLS_C +#endif +#if defined MBEDTLS_SSL_TRUNCATED_HMAC +#define POLARSSL_SSL_TRUNCATED_HMAC MBEDTLS_SSL_TRUNCATED_HMAC +#endif +#if defined MBEDTLS_THREADING_ALT +#define POLARSSL_THREADING_ALT MBEDTLS_THREADING_ALT +#endif +#if defined MBEDTLS_THREADING_C +#define POLARSSL_THREADING_C MBEDTLS_THREADING_C +#endif +#if defined MBEDTLS_THREADING_PTHREAD +#define POLARSSL_THREADING_PTHREAD MBEDTLS_THREADING_PTHREAD +#endif +#if defined MBEDTLS_TIMING_ALT +#define POLARSSL_TIMING_ALT MBEDTLS_TIMING_ALT +#endif +#if defined MBEDTLS_TIMING_C +#define POLARSSL_TIMING_C MBEDTLS_TIMING_C +#endif +#if defined MBEDTLS_VERSION_C +#define POLARSSL_VERSION_C MBEDTLS_VERSION_C +#endif +#if defined MBEDTLS_VERSION_FEATURES +#define POLARSSL_VERSION_FEATURES MBEDTLS_VERSION_FEATURES +#endif +#if defined MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 +#define POLARSSL_X509_ALLOW_EXTENSIONS_NON_V3 MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 +#endif +#if defined MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION +#define POLARSSL_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION +#endif +#if defined MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE +#define POLARSSL_X509_CHECK_EXTENDED_KEY_USAGE MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE +#endif +#if defined MBEDTLS_X509_CHECK_KEY_USAGE +#define POLARSSL_X509_CHECK_KEY_USAGE MBEDTLS_X509_CHECK_KEY_USAGE +#endif +#if defined MBEDTLS_X509_CREATE_C +#define POLARSSL_X509_CREATE_C MBEDTLS_X509_CREATE_C +#endif +#if defined MBEDTLS_X509_CRL_PARSE_C +#define POLARSSL_X509_CRL_PARSE_C MBEDTLS_X509_CRL_PARSE_C +#endif +#if defined MBEDTLS_X509_CRT_PARSE_C +#define POLARSSL_X509_CRT_PARSE_C MBEDTLS_X509_CRT_PARSE_C +#endif +#if defined MBEDTLS_X509_CRT_WRITE_C +#define POLARSSL_X509_CRT_WRITE_C MBEDTLS_X509_CRT_WRITE_C +#endif +#if defined MBEDTLS_X509_CSR_PARSE_C +#define POLARSSL_X509_CSR_PARSE_C MBEDTLS_X509_CSR_PARSE_C +#endif +#if defined MBEDTLS_X509_CSR_WRITE_C +#define POLARSSL_X509_CSR_WRITE_C MBEDTLS_X509_CSR_WRITE_C +#endif +#if defined MBEDTLS_X509_MAX_INTERMEDIATE_CA +#define POLARSSL_X509_MAX_INTERMEDIATE_CA MBEDTLS_X509_MAX_INTERMEDIATE_CA +#endif +#if defined MBEDTLS_X509_RSASSA_PSS_SUPPORT +#define POLARSSL_X509_RSASSA_PSS_SUPPORT MBEDTLS_X509_RSASSA_PSS_SUPPORT +#endif +#if defined MBEDTLS_X509_USE_C +#define POLARSSL_X509_USE_C MBEDTLS_X509_USE_C +#endif +#if defined MBEDTLS_XTEA_ALT +#define POLARSSL_XTEA_ALT MBEDTLS_XTEA_ALT +#endif +#if defined MBEDTLS_XTEA_C +#define POLARSSL_XTEA_C MBEDTLS_XTEA_C +#endif +#if defined MBEDTLS_ZLIB_SUPPORT +#define POLARSSL_ZLIB_SUPPORT MBEDTLS_ZLIB_SUPPORT +#endif + +/* + * Misc names (macros, types, functions, enum constants...) + */ +#define AES_DECRYPT MBEDTLS_AES_DECRYPT +#define AES_ENCRYPT MBEDTLS_AES_ENCRYPT +#define ASN1_BIT_STRING MBEDTLS_ASN1_BIT_STRING +#define ASN1_BMP_STRING MBEDTLS_ASN1_BMP_STRING +#define ASN1_BOOLEAN MBEDTLS_ASN1_BOOLEAN +#define ASN1_CHK_ADD MBEDTLS_ASN1_CHK_ADD +#define ASN1_CONSTRUCTED MBEDTLS_ASN1_CONSTRUCTED +#define ASN1_CONTEXT_SPECIFIC MBEDTLS_ASN1_CONTEXT_SPECIFIC +#define ASN1_GENERALIZED_TIME MBEDTLS_ASN1_GENERALIZED_TIME +#define ASN1_IA5_STRING MBEDTLS_ASN1_IA5_STRING +#define ASN1_INTEGER MBEDTLS_ASN1_INTEGER +#define ASN1_NULL MBEDTLS_ASN1_NULL +#define ASN1_OCTET_STRING MBEDTLS_ASN1_OCTET_STRING +#define ASN1_OID MBEDTLS_ASN1_OID +#define ASN1_PRIMITIVE MBEDTLS_ASN1_PRIMITIVE +#define ASN1_PRINTABLE_STRING MBEDTLS_ASN1_PRINTABLE_STRING +#define ASN1_SEQUENCE MBEDTLS_ASN1_SEQUENCE +#define ASN1_SET MBEDTLS_ASN1_SET +#define ASN1_T61_STRING MBEDTLS_ASN1_T61_STRING +#define ASN1_UNIVERSAL_STRING MBEDTLS_ASN1_UNIVERSAL_STRING +#define ASN1_UTC_TIME MBEDTLS_ASN1_UTC_TIME +#define ASN1_UTF8_STRING MBEDTLS_ASN1_UTF8_STRING +#define BADCERT_CN_MISMATCH MBEDTLS_X509_BADCERT_CN_MISMATCH +#define BADCERT_EXPIRED MBEDTLS_X509_BADCERT_EXPIRED +#define BADCERT_FUTURE MBEDTLS_X509_BADCERT_FUTURE +#define BADCERT_MISSING MBEDTLS_X509_BADCERT_MISSING +#define BADCERT_NOT_TRUSTED MBEDTLS_X509_BADCERT_NOT_TRUSTED +#define BADCERT_OTHER MBEDTLS_X509_BADCERT_OTHER +#define BADCERT_REVOKED MBEDTLS_X509_BADCERT_REVOKED +#define BADCERT_SKIP_VERIFY MBEDTLS_X509_BADCERT_SKIP_VERIFY +#define BADCRL_EXPIRED MBEDTLS_X509_BADCRL_EXPIRED +#define BADCRL_FUTURE MBEDTLS_X509_BADCRL_FUTURE +#define BADCRL_NOT_TRUSTED MBEDTLS_X509_BADCRL_NOT_TRUSTED +#define BLOWFISH_BLOCKSIZE MBEDTLS_BLOWFISH_BLOCKSIZE +#define BLOWFISH_DECRYPT MBEDTLS_BLOWFISH_DECRYPT +#define BLOWFISH_ENCRYPT MBEDTLS_BLOWFISH_ENCRYPT +#define BLOWFISH_MAX_KEY MBEDTLS_BLOWFISH_MAX_KEY_BITS +#define BLOWFISH_MIN_KEY MBEDTLS_BLOWFISH_MIN_KEY_BITS +#define BLOWFISH_ROUNDS MBEDTLS_BLOWFISH_ROUNDS +#define CAMELLIA_DECRYPT MBEDTLS_CAMELLIA_DECRYPT +#define CAMELLIA_ENCRYPT MBEDTLS_CAMELLIA_ENCRYPT +#define COLLECT_SIZE MBEDTLS_HAVEGE_COLLECT_SIZE +#define CTR_DRBG_BLOCKSIZE MBEDTLS_CTR_DRBG_BLOCKSIZE +#define CTR_DRBG_ENTROPY_LEN MBEDTLS_CTR_DRBG_ENTROPY_LEN +#define CTR_DRBG_KEYBITS MBEDTLS_CTR_DRBG_KEYBITS +#define CTR_DRBG_KEYSIZE MBEDTLS_CTR_DRBG_KEYSIZE +#define CTR_DRBG_MAX_INPUT MBEDTLS_CTR_DRBG_MAX_INPUT +#define CTR_DRBG_MAX_REQUEST MBEDTLS_CTR_DRBG_MAX_REQUEST +#define CTR_DRBG_MAX_SEED_INPUT MBEDTLS_CTR_DRBG_MAX_SEED_INPUT +#define CTR_DRBG_PR_OFF MBEDTLS_CTR_DRBG_PR_OFF +#define CTR_DRBG_PR_ON MBEDTLS_CTR_DRBG_PR_ON +#define CTR_DRBG_RESEED_INTERVAL MBEDTLS_CTR_DRBG_RESEED_INTERVAL +#define CTR_DRBG_SEEDLEN MBEDTLS_CTR_DRBG_SEEDLEN +#define DEPRECATED MBEDTLS_DEPRECATED +#define DES_DECRYPT MBEDTLS_DES_DECRYPT +#define DES_ENCRYPT MBEDTLS_DES_ENCRYPT +#define DES_KEY_SIZE MBEDTLS_DES_KEY_SIZE +#define ENTROPY_BLOCK_SIZE MBEDTLS_ENTROPY_BLOCK_SIZE +#define ENTROPY_MAX_GATHER MBEDTLS_ENTROPY_MAX_GATHER +#define ENTROPY_MAX_SEED_SIZE MBEDTLS_ENTROPY_MAX_SEED_SIZE +#define ENTROPY_MAX_SOURCES MBEDTLS_ENTROPY_MAX_SOURCES +#define ENTROPY_MIN_HARDCLOCK MBEDTLS_ENTROPY_MIN_HARDCLOCK +#define ENTROPY_MIN_HAVEGE MBEDTLS_ENTROPY_MIN_HAVEGE +#define ENTROPY_MIN_PLATFORM MBEDTLS_ENTROPY_MIN_PLATFORM +#define ENTROPY_SOURCE_MANUAL MBEDTLS_ENTROPY_SOURCE_MANUAL +#define EXT_AUTHORITY_KEY_IDENTIFIER MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER +#define EXT_BASIC_CONSTRAINTS MBEDTLS_X509_EXT_BASIC_CONSTRAINTS +#define EXT_CERTIFICATE_POLICIES MBEDTLS_X509_EXT_CERTIFICATE_POLICIES +#define EXT_CRL_DISTRIBUTION_POINTS MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS +#define EXT_EXTENDED_KEY_USAGE MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE +#define EXT_FRESHEST_CRL MBEDTLS_X509_EXT_FRESHEST_CRL +#define EXT_INIHIBIT_ANYPOLICY MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY +#define EXT_ISSUER_ALT_NAME MBEDTLS_X509_EXT_ISSUER_ALT_NAME +#define EXT_KEY_USAGE MBEDTLS_X509_EXT_KEY_USAGE +#define EXT_NAME_CONSTRAINTS MBEDTLS_X509_EXT_NAME_CONSTRAINTS +#define EXT_NS_CERT_TYPE MBEDTLS_X509_EXT_NS_CERT_TYPE +#define EXT_POLICY_CONSTRAINTS MBEDTLS_X509_EXT_POLICY_CONSTRAINTS +#define EXT_POLICY_MAPPINGS MBEDTLS_X509_EXT_POLICY_MAPPINGS +#define EXT_SUBJECT_ALT_NAME MBEDTLS_X509_EXT_SUBJECT_ALT_NAME +#define EXT_SUBJECT_DIRECTORY_ATTRS MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS +#define EXT_SUBJECT_KEY_IDENTIFIER MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER +#define GCM_DECRYPT MBEDTLS_GCM_DECRYPT +#define GCM_ENCRYPT MBEDTLS_GCM_ENCRYPT +#define KU_CRL_SIGN MBEDTLS_X509_KU_CRL_SIGN +#define KU_DATA_ENCIPHERMENT MBEDTLS_X509_KU_DATA_ENCIPHERMENT +#define KU_DIGITAL_SIGNATURE MBEDTLS_X509_KU_DIGITAL_SIGNATURE +#define KU_KEY_AGREEMENT MBEDTLS_X509_KU_KEY_AGREEMENT +#define KU_KEY_CERT_SIGN MBEDTLS_X509_KU_KEY_CERT_SIGN +#define KU_KEY_ENCIPHERMENT MBEDTLS_X509_KU_KEY_ENCIPHERMENT +#define KU_NON_REPUDIATION MBEDTLS_X509_KU_NON_REPUDIATION +#define LN_2_DIV_LN_10_SCALE100 MBEDTLS_LN_2_DIV_LN_10_SCALE100 +#define MD_CONTEXT_T_INIT MBEDTLS_MD_CONTEXT_T_INIT +#define MEMORY_VERIFY_ALLOC MBEDTLS_MEMORY_VERIFY_ALLOC +#define MEMORY_VERIFY_ALWAYS MBEDTLS_MEMORY_VERIFY_ALWAYS +#define MEMORY_VERIFY_FREE MBEDTLS_MEMORY_VERIFY_FREE +#define MEMORY_VERIFY_NONE MBEDTLS_MEMORY_VERIFY_NONE +#define MPI_CHK MBEDTLS_MPI_CHK +#define NET_PROTO_TCP MBEDTLS_NET_PROTO_TCP +#define NET_PROTO_UDP MBEDTLS_NET_PROTO_UDP +#define NS_CERT_TYPE_EMAIL MBEDTLS_X509_NS_CERT_TYPE_EMAIL +#define NS_CERT_TYPE_EMAIL_CA MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA +#define NS_CERT_TYPE_OBJECT_SIGNING MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING +#define NS_CERT_TYPE_OBJECT_SIGNING_CA MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA +#define NS_CERT_TYPE_RESERVED MBEDTLS_X509_NS_CERT_TYPE_RESERVED +#define NS_CERT_TYPE_SSL_CA MBEDTLS_X509_NS_CERT_TYPE_SSL_CA +#define NS_CERT_TYPE_SSL_CLIENT MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT +#define NS_CERT_TYPE_SSL_SERVER MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER +#define OID_ANSI_X9_62 MBEDTLS_OID_ANSI_X9_62 +#define OID_ANSI_X9_62_FIELD_TYPE MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE +#define OID_ANSI_X9_62_PRIME_FIELD MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD +#define OID_ANSI_X9_62_SIG MBEDTLS_OID_ANSI_X9_62_SIG +#define OID_ANSI_X9_62_SIG_SHA2 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 +#define OID_ANY_EXTENDED_KEY_USAGE MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE +#define OID_AT MBEDTLS_OID_AT +#define OID_AT_CN MBEDTLS_OID_AT_CN +#define OID_AT_COUNTRY MBEDTLS_OID_AT_COUNTRY +#define OID_AT_DN_QUALIFIER MBEDTLS_OID_AT_DN_QUALIFIER +#define OID_AT_GENERATION_QUALIFIER MBEDTLS_OID_AT_GENERATION_QUALIFIER +#define OID_AT_GIVEN_NAME MBEDTLS_OID_AT_GIVEN_NAME +#define OID_AT_INITIALS MBEDTLS_OID_AT_INITIALS +#define OID_AT_LOCALITY MBEDTLS_OID_AT_LOCALITY +#define OID_AT_ORGANIZATION MBEDTLS_OID_AT_ORGANIZATION +#define OID_AT_ORG_UNIT MBEDTLS_OID_AT_ORG_UNIT +#define OID_AT_POSTAL_ADDRESS MBEDTLS_OID_AT_POSTAL_ADDRESS +#define OID_AT_POSTAL_CODE MBEDTLS_OID_AT_POSTAL_CODE +#define OID_AT_PSEUDONYM MBEDTLS_OID_AT_PSEUDONYM +#define OID_AT_SERIAL_NUMBER MBEDTLS_OID_AT_SERIAL_NUMBER +#define OID_AT_STATE MBEDTLS_OID_AT_STATE +#define OID_AT_SUR_NAME MBEDTLS_OID_AT_SUR_NAME +#define OID_AT_TITLE MBEDTLS_OID_AT_TITLE +#define OID_AT_UNIQUE_IDENTIFIER MBEDTLS_OID_AT_UNIQUE_IDENTIFIER +#define OID_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER +#define OID_BASIC_CONSTRAINTS MBEDTLS_OID_BASIC_CONSTRAINTS +#define OID_CERTICOM MBEDTLS_OID_CERTICOM +#define OID_CERTIFICATE_POLICIES MBEDTLS_OID_CERTIFICATE_POLICIES +#define OID_CLIENT_AUTH MBEDTLS_OID_CLIENT_AUTH +#define OID_CMP MBEDTLS_OID_CMP +#define OID_CODE_SIGNING MBEDTLS_OID_CODE_SIGNING +#define OID_COUNTRY_US MBEDTLS_OID_COUNTRY_US +#define OID_CRL_DISTRIBUTION_POINTS MBEDTLS_OID_CRL_DISTRIBUTION_POINTS +#define OID_CRL_NUMBER MBEDTLS_OID_CRL_NUMBER +#define OID_DES_CBC MBEDTLS_OID_DES_CBC +#define OID_DES_EDE3_CBC MBEDTLS_OID_DES_EDE3_CBC +#define OID_DIGEST_ALG_MD2 MBEDTLS_OID_DIGEST_ALG_MD2 +#define OID_DIGEST_ALG_MD4 MBEDTLS_OID_DIGEST_ALG_MD4 +#define OID_DIGEST_ALG_MD5 MBEDTLS_OID_DIGEST_ALG_MD5 +#define OID_DIGEST_ALG_SHA1 MBEDTLS_OID_DIGEST_ALG_SHA1 +#define OID_DIGEST_ALG_SHA224 MBEDTLS_OID_DIGEST_ALG_SHA224 +#define OID_DIGEST_ALG_SHA256 MBEDTLS_OID_DIGEST_ALG_SHA256 +#define OID_DIGEST_ALG_SHA384 MBEDTLS_OID_DIGEST_ALG_SHA384 +#define OID_DIGEST_ALG_SHA512 MBEDTLS_OID_DIGEST_ALG_SHA512 +#define OID_DOMAIN_COMPONENT MBEDTLS_OID_DOMAIN_COMPONENT +#define OID_ECDSA_SHA1 MBEDTLS_OID_ECDSA_SHA1 +#define OID_ECDSA_SHA224 MBEDTLS_OID_ECDSA_SHA224 +#define OID_ECDSA_SHA256 MBEDTLS_OID_ECDSA_SHA256 +#define OID_ECDSA_SHA384 MBEDTLS_OID_ECDSA_SHA384 +#define OID_ECDSA_SHA512 MBEDTLS_OID_ECDSA_SHA512 +#define OID_EC_ALG_ECDH MBEDTLS_OID_EC_ALG_ECDH +#define OID_EC_ALG_UNRESTRICTED MBEDTLS_OID_EC_ALG_UNRESTRICTED +#define OID_EC_BRAINPOOL_V1 MBEDTLS_OID_EC_BRAINPOOL_V1 +#define OID_EC_GRP_BP256R1 MBEDTLS_OID_EC_GRP_BP256R1 +#define OID_EC_GRP_BP384R1 MBEDTLS_OID_EC_GRP_BP384R1 +#define OID_EC_GRP_BP512R1 MBEDTLS_OID_EC_GRP_BP512R1 +#define OID_EC_GRP_SECP192K1 MBEDTLS_OID_EC_GRP_SECP192K1 +#define OID_EC_GRP_SECP192R1 MBEDTLS_OID_EC_GRP_SECP192R1 +#define OID_EC_GRP_SECP224K1 MBEDTLS_OID_EC_GRP_SECP224K1 +#define OID_EC_GRP_SECP224R1 MBEDTLS_OID_EC_GRP_SECP224R1 +#define OID_EC_GRP_SECP256K1 MBEDTLS_OID_EC_GRP_SECP256K1 +#define OID_EC_GRP_SECP256R1 MBEDTLS_OID_EC_GRP_SECP256R1 +#define OID_EC_GRP_SECP384R1 MBEDTLS_OID_EC_GRP_SECP384R1 +#define OID_EC_GRP_SECP521R1 MBEDTLS_OID_EC_GRP_SECP521R1 +#define OID_EMAIL_PROTECTION MBEDTLS_OID_EMAIL_PROTECTION +#define OID_EXTENDED_KEY_USAGE MBEDTLS_OID_EXTENDED_KEY_USAGE +#define OID_FRESHEST_CRL MBEDTLS_OID_FRESHEST_CRL +#define OID_GOV MBEDTLS_OID_GOV +#define OID_HMAC_SHA1 MBEDTLS_OID_HMAC_SHA1 +#define OID_ID_CE MBEDTLS_OID_ID_CE +#define OID_INIHIBIT_ANYPOLICY MBEDTLS_OID_INIHIBIT_ANYPOLICY +#define OID_ISO_CCITT_DS MBEDTLS_OID_ISO_CCITT_DS +#define OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ISO_IDENTIFIED_ORG +#define OID_ISO_ITU_COUNTRY MBEDTLS_OID_ISO_ITU_COUNTRY +#define OID_ISO_ITU_US_ORG MBEDTLS_OID_ISO_ITU_US_ORG +#define OID_ISO_MEMBER_BODIES MBEDTLS_OID_ISO_MEMBER_BODIES +#define OID_ISSUER_ALT_NAME MBEDTLS_OID_ISSUER_ALT_NAME +#define OID_KEY_USAGE MBEDTLS_OID_KEY_USAGE +#define OID_KP MBEDTLS_OID_KP +#define OID_MGF1 MBEDTLS_OID_MGF1 +#define OID_NAME_CONSTRAINTS MBEDTLS_OID_NAME_CONSTRAINTS +#define OID_NETSCAPE MBEDTLS_OID_NETSCAPE +#define OID_NS_BASE_URL MBEDTLS_OID_NS_BASE_URL +#define OID_NS_CA_POLICY_URL MBEDTLS_OID_NS_CA_POLICY_URL +#define OID_NS_CA_REVOCATION_URL MBEDTLS_OID_NS_CA_REVOCATION_URL +#define OID_NS_CERT MBEDTLS_OID_NS_CERT +#define OID_NS_CERT_SEQUENCE MBEDTLS_OID_NS_CERT_SEQUENCE +#define OID_NS_CERT_TYPE MBEDTLS_OID_NS_CERT_TYPE +#define OID_NS_COMMENT MBEDTLS_OID_NS_COMMENT +#define OID_NS_DATA_TYPE MBEDTLS_OID_NS_DATA_TYPE +#define OID_NS_RENEWAL_URL MBEDTLS_OID_NS_RENEWAL_URL +#define OID_NS_REVOCATION_URL MBEDTLS_OID_NS_REVOCATION_URL +#define OID_NS_SSL_SERVER_NAME MBEDTLS_OID_NS_SSL_SERVER_NAME +#define OID_OCSP_SIGNING MBEDTLS_OID_OCSP_SIGNING +#define OID_OIW_SECSIG MBEDTLS_OID_OIW_SECSIG +#define OID_OIW_SECSIG_ALG MBEDTLS_OID_OIW_SECSIG_ALG +#define OID_OIW_SECSIG_SHA1 MBEDTLS_OID_OIW_SECSIG_SHA1 +#define OID_ORGANIZATION MBEDTLS_OID_ORGANIZATION +#define OID_ORG_ANSI_X9_62 MBEDTLS_OID_ORG_ANSI_X9_62 +#define OID_ORG_CERTICOM MBEDTLS_OID_ORG_CERTICOM +#define OID_ORG_DOD MBEDTLS_OID_ORG_DOD +#define OID_ORG_GOV MBEDTLS_OID_ORG_GOV +#define OID_ORG_NETSCAPE MBEDTLS_OID_ORG_NETSCAPE +#define OID_ORG_OIW MBEDTLS_OID_ORG_OIW +#define OID_ORG_RSA_DATA_SECURITY MBEDTLS_OID_ORG_RSA_DATA_SECURITY +#define OID_ORG_TELETRUST MBEDTLS_OID_ORG_TELETRUST +#define OID_PKCS MBEDTLS_OID_PKCS +#define OID_PKCS1 MBEDTLS_OID_PKCS1 +#define OID_PKCS12 MBEDTLS_OID_PKCS12 +#define OID_PKCS12_PBE MBEDTLS_OID_PKCS12_PBE +#define OID_PKCS12_PBE_SHA1_DES2_EDE_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC +#define OID_PKCS12_PBE_SHA1_DES3_EDE_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC +#define OID_PKCS12_PBE_SHA1_RC2_128_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC +#define OID_PKCS12_PBE_SHA1_RC2_40_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC +#define OID_PKCS12_PBE_SHA1_RC4_128 MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_128 +#define OID_PKCS12_PBE_SHA1_RC4_40 MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_40 +#define OID_PKCS1_MD2 MBEDTLS_OID_PKCS1_MD2 +#define OID_PKCS1_MD4 MBEDTLS_OID_PKCS1_MD4 +#define OID_PKCS1_MD5 MBEDTLS_OID_PKCS1_MD5 +#define OID_PKCS1_RSA MBEDTLS_OID_PKCS1_RSA +#define OID_PKCS1_SHA1 MBEDTLS_OID_PKCS1_SHA1 +#define OID_PKCS1_SHA224 MBEDTLS_OID_PKCS1_SHA224 +#define OID_PKCS1_SHA256 MBEDTLS_OID_PKCS1_SHA256 +#define OID_PKCS1_SHA384 MBEDTLS_OID_PKCS1_SHA384 +#define OID_PKCS1_SHA512 MBEDTLS_OID_PKCS1_SHA512 +#define OID_PKCS5 MBEDTLS_OID_PKCS5 +#define OID_PKCS5_PBES2 MBEDTLS_OID_PKCS5_PBES2 +#define OID_PKCS5_PBE_MD2_DES_CBC MBEDTLS_OID_PKCS5_PBE_MD2_DES_CBC +#define OID_PKCS5_PBE_MD2_RC2_CBC MBEDTLS_OID_PKCS5_PBE_MD2_RC2_CBC +#define OID_PKCS5_PBE_MD5_DES_CBC MBEDTLS_OID_PKCS5_PBE_MD5_DES_CBC +#define OID_PKCS5_PBE_MD5_RC2_CBC MBEDTLS_OID_PKCS5_PBE_MD5_RC2_CBC +#define OID_PKCS5_PBE_SHA1_DES_CBC MBEDTLS_OID_PKCS5_PBE_SHA1_DES_CBC +#define OID_PKCS5_PBE_SHA1_RC2_CBC MBEDTLS_OID_PKCS5_PBE_SHA1_RC2_CBC +#define OID_PKCS5_PBKDF2 MBEDTLS_OID_PKCS5_PBKDF2 +#define OID_PKCS5_PBMAC1 MBEDTLS_OID_PKCS5_PBMAC1 +#define OID_PKCS9 MBEDTLS_OID_PKCS9 +#define OID_PKCS9_CSR_EXT_REQ MBEDTLS_OID_PKCS9_CSR_EXT_REQ +#define OID_PKCS9_EMAIL MBEDTLS_OID_PKCS9_EMAIL +#define OID_PKIX MBEDTLS_OID_PKIX +#define OID_POLICY_CONSTRAINTS MBEDTLS_OID_POLICY_CONSTRAINTS +#define OID_POLICY_MAPPINGS MBEDTLS_OID_POLICY_MAPPINGS +#define OID_PRIVATE_KEY_USAGE_PERIOD MBEDTLS_OID_PRIVATE_KEY_USAGE_PERIOD +#define OID_RSASSA_PSS MBEDTLS_OID_RSASSA_PSS +#define OID_RSA_COMPANY MBEDTLS_OID_RSA_COMPANY +#define OID_RSA_SHA_OBS MBEDTLS_OID_RSA_SHA_OBS +#define OID_SERVER_AUTH MBEDTLS_OID_SERVER_AUTH +#define OID_SIZE MBEDTLS_OID_SIZE +#define OID_SUBJECT_ALT_NAME MBEDTLS_OID_SUBJECT_ALT_NAME +#define OID_SUBJECT_DIRECTORY_ATTRS MBEDTLS_OID_SUBJECT_DIRECTORY_ATTRS +#define OID_SUBJECT_KEY_IDENTIFIER MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER +#define OID_TELETRUST MBEDTLS_OID_TELETRUST +#define OID_TIME_STAMPING MBEDTLS_OID_TIME_STAMPING +#define PADLOCK_ACE MBEDTLS_PADLOCK_ACE +#define PADLOCK_ALIGN16 MBEDTLS_PADLOCK_ALIGN16 +#define PADLOCK_PHE MBEDTLS_PADLOCK_PHE +#define PADLOCK_PMM MBEDTLS_PADLOCK_PMM +#define PADLOCK_RNG MBEDTLS_PADLOCK_RNG +#define PKCS12_DERIVE_IV MBEDTLS_PKCS12_DERIVE_IV +#define PKCS12_DERIVE_KEY MBEDTLS_PKCS12_DERIVE_KEY +#define PKCS12_DERIVE_MAC_KEY MBEDTLS_PKCS12_DERIVE_MAC_KEY +#define PKCS12_PBE_DECRYPT MBEDTLS_PKCS12_PBE_DECRYPT +#define PKCS12_PBE_ENCRYPT MBEDTLS_PKCS12_PBE_ENCRYPT +#define PKCS5_DECRYPT MBEDTLS_PKCS5_DECRYPT +#define PKCS5_ENCRYPT MBEDTLS_PKCS5_ENCRYPT +#define POLARSSL_AESNI_AES MBEDTLS_AESNI_AES +#define POLARSSL_AESNI_CLMUL MBEDTLS_AESNI_CLMUL +#define POLARSSL_AESNI_H MBEDTLS_AESNI_H +#define POLARSSL_AES_H MBEDTLS_AES_H +#define POLARSSL_ARC4_H MBEDTLS_ARC4_H +#define POLARSSL_ASN1_H MBEDTLS_ASN1_H +#define POLARSSL_ASN1_WRITE_H MBEDTLS_ASN1_WRITE_H +#define POLARSSL_BASE64_H MBEDTLS_BASE64_H +#define POLARSSL_BIGNUM_H MBEDTLS_BIGNUM_H +#define POLARSSL_BLOWFISH_H MBEDTLS_BLOWFISH_H +#define POLARSSL_BN_MUL_H MBEDTLS_BN_MUL_H +#define POLARSSL_CAMELLIA_H MBEDTLS_CAMELLIA_H +#define POLARSSL_CCM_H MBEDTLS_CCM_H +#define POLARSSL_CERTS_H MBEDTLS_CERTS_H +#define POLARSSL_CHECK_CONFIG_H MBEDTLS_CHECK_CONFIG_H +#define POLARSSL_CIPHERSUITE_NODTLS MBEDTLS_CIPHERSUITE_NODTLS +#define POLARSSL_CIPHERSUITE_SHORT_TAG MBEDTLS_CIPHERSUITE_SHORT_TAG +#define POLARSSL_CIPHERSUITE_WEAK MBEDTLS_CIPHERSUITE_WEAK +#define POLARSSL_CIPHER_AES_128_CBC MBEDTLS_CIPHER_AES_128_CBC +#define POLARSSL_CIPHER_AES_128_CCM MBEDTLS_CIPHER_AES_128_CCM +#define POLARSSL_CIPHER_AES_128_CFB128 MBEDTLS_CIPHER_AES_128_CFB128 +#define POLARSSL_CIPHER_AES_128_CTR MBEDTLS_CIPHER_AES_128_CTR +#define POLARSSL_CIPHER_AES_128_ECB MBEDTLS_CIPHER_AES_128_ECB +#define POLARSSL_CIPHER_AES_128_GCM MBEDTLS_CIPHER_AES_128_GCM +#define POLARSSL_CIPHER_AES_192_CBC MBEDTLS_CIPHER_AES_192_CBC +#define POLARSSL_CIPHER_AES_192_CCM MBEDTLS_CIPHER_AES_192_CCM +#define POLARSSL_CIPHER_AES_192_CFB128 MBEDTLS_CIPHER_AES_192_CFB128 +#define POLARSSL_CIPHER_AES_192_CTR MBEDTLS_CIPHER_AES_192_CTR +#define POLARSSL_CIPHER_AES_192_ECB MBEDTLS_CIPHER_AES_192_ECB +#define POLARSSL_CIPHER_AES_192_GCM MBEDTLS_CIPHER_AES_192_GCM +#define POLARSSL_CIPHER_AES_256_CBC MBEDTLS_CIPHER_AES_256_CBC +#define POLARSSL_CIPHER_AES_256_CCM MBEDTLS_CIPHER_AES_256_CCM +#define POLARSSL_CIPHER_AES_256_CFB128 MBEDTLS_CIPHER_AES_256_CFB128 +#define POLARSSL_CIPHER_AES_256_CTR MBEDTLS_CIPHER_AES_256_CTR +#define POLARSSL_CIPHER_AES_256_ECB MBEDTLS_CIPHER_AES_256_ECB +#define POLARSSL_CIPHER_AES_256_GCM MBEDTLS_CIPHER_AES_256_GCM +#define POLARSSL_CIPHER_ARC4_128 MBEDTLS_CIPHER_ARC4_128 +#define POLARSSL_CIPHER_BLOWFISH_CBC MBEDTLS_CIPHER_BLOWFISH_CBC +#define POLARSSL_CIPHER_BLOWFISH_CFB64 MBEDTLS_CIPHER_BLOWFISH_CFB64 +#define POLARSSL_CIPHER_BLOWFISH_CTR MBEDTLS_CIPHER_BLOWFISH_CTR +#define POLARSSL_CIPHER_BLOWFISH_ECB MBEDTLS_CIPHER_BLOWFISH_ECB +#define POLARSSL_CIPHER_CAMELLIA_128_CBC MBEDTLS_CIPHER_CAMELLIA_128_CBC +#define POLARSSL_CIPHER_CAMELLIA_128_CCM MBEDTLS_CIPHER_CAMELLIA_128_CCM +#define POLARSSL_CIPHER_CAMELLIA_128_CFB128 MBEDTLS_CIPHER_CAMELLIA_128_CFB128 +#define POLARSSL_CIPHER_CAMELLIA_128_CTR MBEDTLS_CIPHER_CAMELLIA_128_CTR +#define POLARSSL_CIPHER_CAMELLIA_128_ECB MBEDTLS_CIPHER_CAMELLIA_128_ECB +#define POLARSSL_CIPHER_CAMELLIA_128_GCM MBEDTLS_CIPHER_CAMELLIA_128_GCM +#define POLARSSL_CIPHER_CAMELLIA_192_CBC MBEDTLS_CIPHER_CAMELLIA_192_CBC +#define POLARSSL_CIPHER_CAMELLIA_192_CCM MBEDTLS_CIPHER_CAMELLIA_192_CCM +#define POLARSSL_CIPHER_CAMELLIA_192_CFB128 MBEDTLS_CIPHER_CAMELLIA_192_CFB128 +#define POLARSSL_CIPHER_CAMELLIA_192_CTR MBEDTLS_CIPHER_CAMELLIA_192_CTR +#define POLARSSL_CIPHER_CAMELLIA_192_ECB MBEDTLS_CIPHER_CAMELLIA_192_ECB +#define POLARSSL_CIPHER_CAMELLIA_192_GCM MBEDTLS_CIPHER_CAMELLIA_192_GCM +#define POLARSSL_CIPHER_CAMELLIA_256_CBC MBEDTLS_CIPHER_CAMELLIA_256_CBC +#define POLARSSL_CIPHER_CAMELLIA_256_CCM MBEDTLS_CIPHER_CAMELLIA_256_CCM +#define POLARSSL_CIPHER_CAMELLIA_256_CFB128 MBEDTLS_CIPHER_CAMELLIA_256_CFB128 +#define POLARSSL_CIPHER_CAMELLIA_256_CTR MBEDTLS_CIPHER_CAMELLIA_256_CTR +#define POLARSSL_CIPHER_CAMELLIA_256_ECB MBEDTLS_CIPHER_CAMELLIA_256_ECB +#define POLARSSL_CIPHER_CAMELLIA_256_GCM MBEDTLS_CIPHER_CAMELLIA_256_GCM +#define POLARSSL_CIPHER_DES_CBC MBEDTLS_CIPHER_DES_CBC +#define POLARSSL_CIPHER_DES_ECB MBEDTLS_CIPHER_DES_ECB +#define POLARSSL_CIPHER_DES_EDE3_CBC MBEDTLS_CIPHER_DES_EDE3_CBC +#define POLARSSL_CIPHER_DES_EDE3_ECB MBEDTLS_CIPHER_DES_EDE3_ECB +#define POLARSSL_CIPHER_DES_EDE_CBC MBEDTLS_CIPHER_DES_EDE_CBC +#define POLARSSL_CIPHER_DES_EDE_ECB MBEDTLS_CIPHER_DES_EDE_ECB +#define POLARSSL_CIPHER_H MBEDTLS_CIPHER_H +#define POLARSSL_CIPHER_ID_3DES MBEDTLS_CIPHER_ID_3DES +#define POLARSSL_CIPHER_ID_AES MBEDTLS_CIPHER_ID_AES +#define POLARSSL_CIPHER_ID_ARC4 MBEDTLS_CIPHER_ID_ARC4 +#define POLARSSL_CIPHER_ID_BLOWFISH MBEDTLS_CIPHER_ID_BLOWFISH +#define POLARSSL_CIPHER_ID_CAMELLIA MBEDTLS_CIPHER_ID_CAMELLIA +#define POLARSSL_CIPHER_ID_DES MBEDTLS_CIPHER_ID_DES +#define POLARSSL_CIPHER_ID_NONE MBEDTLS_CIPHER_ID_NONE +#define POLARSSL_CIPHER_ID_NULL MBEDTLS_CIPHER_ID_NULL +#define POLARSSL_CIPHER_MODE_AEAD MBEDTLS_CIPHER_MODE_AEAD +#define POLARSSL_CIPHER_MODE_STREAM MBEDTLS_CIPHER_MODE_STREAM +#define POLARSSL_CIPHER_MODE_WITH_PADDING MBEDTLS_CIPHER_MODE_WITH_PADDING +#define POLARSSL_CIPHER_NONE MBEDTLS_CIPHER_NONE +#define POLARSSL_CIPHER_NULL MBEDTLS_CIPHER_NULL +#define POLARSSL_CIPHER_VARIABLE_IV_LEN MBEDTLS_CIPHER_VARIABLE_IV_LEN +#define POLARSSL_CIPHER_VARIABLE_KEY_LEN MBEDTLS_CIPHER_VARIABLE_KEY_LEN +#define POLARSSL_CIPHER_WRAP_H MBEDTLS_CIPHER_WRAP_H +#define POLARSSL_CONFIG_H MBEDTLS_CONFIG_H +#define POLARSSL_CTR_DRBG_H MBEDTLS_CTR_DRBG_H +#define POLARSSL_DEBUG_H MBEDTLS_DEBUG_H +#define POLARSSL_DEBUG_LOG_FULL MBEDTLS_DEBUG_LOG_FULL +#define POLARSSL_DEBUG_LOG_RAW MBEDTLS_DEBUG_LOG_RAW +#define POLARSSL_DECRYPT MBEDTLS_DECRYPT +#define POLARSSL_DES_H MBEDTLS_DES_H +#define POLARSSL_DHM_H MBEDTLS_DHM_H +#define POLARSSL_DHM_RFC2409_MODP_1024_G MBEDTLS_DHM_RFC2409_MODP_1024_G +#define POLARSSL_DHM_RFC2409_MODP_1024_P MBEDTLS_DHM_RFC2409_MODP_1024_P +#define POLARSSL_DHM_RFC3526_MODP_2048_G MBEDTLS_DHM_RFC3526_MODP_2048_G +#define POLARSSL_DHM_RFC3526_MODP_2048_P MBEDTLS_DHM_RFC3526_MODP_2048_P +#define POLARSSL_DHM_RFC3526_MODP_3072_G MBEDTLS_DHM_RFC3526_MODP_3072_G +#define POLARSSL_DHM_RFC3526_MODP_3072_P MBEDTLS_DHM_RFC3526_MODP_3072_P +#define POLARSSL_DHM_RFC5114_MODP_1024_G MBEDTLS_DHM_RFC5114_MODP_1024_G +#define POLARSSL_DHM_RFC5114_MODP_1024_P MBEDTLS_DHM_RFC5114_MODP_1024_P +#define POLARSSL_DHM_RFC5114_MODP_2048_G MBEDTLS_DHM_RFC5114_MODP_2048_G +#define POLARSSL_DHM_RFC5114_MODP_2048_P MBEDTLS_DHM_RFC5114_MODP_2048_P +#define POLARSSL_ECDH_H MBEDTLS_ECDH_H +#define POLARSSL_ECDH_OURS MBEDTLS_ECDH_OURS +#define POLARSSL_ECDH_THEIRS MBEDTLS_ECDH_THEIRS +#define POLARSSL_ECDSA_H MBEDTLS_ECDSA_H +#define POLARSSL_ECP_DP_BP256R1 MBEDTLS_ECP_DP_BP256R1 +#define POLARSSL_ECP_DP_BP384R1 MBEDTLS_ECP_DP_BP384R1 +#define POLARSSL_ECP_DP_BP512R1 MBEDTLS_ECP_DP_BP512R1 +#define POLARSSL_ECP_DP_M255 MBEDTLS_ECP_DP_CURVE25519 +#define POLARSSL_ECP_DP_MAX MBEDTLS_ECP_DP_MAX +#define POLARSSL_ECP_DP_NONE MBEDTLS_ECP_DP_NONE +#define POLARSSL_ECP_DP_SECP192K1 MBEDTLS_ECP_DP_SECP192K1 +#define POLARSSL_ECP_DP_SECP192R1 MBEDTLS_ECP_DP_SECP192R1 +#define POLARSSL_ECP_DP_SECP224K1 MBEDTLS_ECP_DP_SECP224K1 +#define POLARSSL_ECP_DP_SECP224R1 MBEDTLS_ECP_DP_SECP224R1 +#define POLARSSL_ECP_DP_SECP256K1 MBEDTLS_ECP_DP_SECP256K1 +#define POLARSSL_ECP_DP_SECP256R1 MBEDTLS_ECP_DP_SECP256R1 +#define POLARSSL_ECP_DP_SECP384R1 MBEDTLS_ECP_DP_SECP384R1 +#define POLARSSL_ECP_DP_SECP521R1 MBEDTLS_ECP_DP_SECP521R1 +#define POLARSSL_ECP_H MBEDTLS_ECP_H +#define POLARSSL_ECP_MAX_BYTES MBEDTLS_ECP_MAX_BYTES +#define POLARSSL_ECP_MAX_PT_LEN MBEDTLS_ECP_MAX_PT_LEN +#define POLARSSL_ECP_PF_COMPRESSED MBEDTLS_ECP_PF_COMPRESSED +#define POLARSSL_ECP_PF_UNCOMPRESSED MBEDTLS_ECP_PF_UNCOMPRESSED +#define POLARSSL_ECP_TLS_NAMED_CURVE MBEDTLS_ECP_TLS_NAMED_CURVE +#define POLARSSL_ENCRYPT MBEDTLS_ENCRYPT +#define POLARSSL_ENTROPY_H MBEDTLS_ENTROPY_H +#define POLARSSL_ENTROPY_POLL_H MBEDTLS_ENTROPY_POLL_H +#define POLARSSL_ENTROPY_SHA256_ACCUMULATOR MBEDTLS_ENTROPY_SHA256_ACCUMULATOR +#define POLARSSL_ENTROPY_SHA512_ACCUMULATOR MBEDTLS_ENTROPY_SHA512_ACCUMULATOR +#define POLARSSL_ERROR_H MBEDTLS_ERROR_H +#define POLARSSL_ERR_AES_INVALID_INPUT_LENGTH MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH +#define POLARSSL_ERR_AES_INVALID_KEY_LENGTH MBEDTLS_ERR_AES_INVALID_KEY_LENGTH +#define POLARSSL_ERR_ASN1_BUF_TOO_SMALL MBEDTLS_ERR_ASN1_BUF_TOO_SMALL +#define POLARSSL_ERR_ASN1_INVALID_DATA MBEDTLS_ERR_ASN1_INVALID_DATA +#define POLARSSL_ERR_ASN1_INVALID_LENGTH MBEDTLS_ERR_ASN1_INVALID_LENGTH +#define POLARSSL_ERR_ASN1_LENGTH_MISMATCH MBEDTLS_ERR_ASN1_LENGTH_MISMATCH +#define POLARSSL_ERR_ASN1_MALLOC_FAILED MBEDTLS_ERR_ASN1_ALLOC_FAILED +#define POLARSSL_ERR_ASN1_OUT_OF_DATA MBEDTLS_ERR_ASN1_OUT_OF_DATA +#define POLARSSL_ERR_ASN1_UNEXPECTED_TAG MBEDTLS_ERR_ASN1_UNEXPECTED_TAG +#define POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL +#define POLARSSL_ERR_BASE64_INVALID_CHARACTER MBEDTLS_ERR_BASE64_INVALID_CHARACTER +#define POLARSSL_ERR_BLOWFISH_INVALID_INPUT_LENGTH MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH +#define POLARSSL_ERR_BLOWFISH_INVALID_KEY_LENGTH MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH +#define POLARSSL_ERR_CAMELLIA_INVALID_INPUT_LENGTH MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH +#define POLARSSL_ERR_CAMELLIA_INVALID_KEY_LENGTH MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH +#define POLARSSL_ERR_CCM_AUTH_FAILED MBEDTLS_ERR_CCM_AUTH_FAILED +#define POLARSSL_ERR_CCM_BAD_INPUT MBEDTLS_ERR_CCM_BAD_INPUT +#define POLARSSL_ERR_CIPHER_ALLOC_FAILED MBEDTLS_ERR_CIPHER_ALLOC_FAILED +#define POLARSSL_ERR_CIPHER_AUTH_FAILED MBEDTLS_ERR_CIPHER_AUTH_FAILED +#define POLARSSL_ERR_CIPHER_BAD_INPUT_DATA MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA +#define POLARSSL_ERR_CIPHER_FEATURE_UNAVAILABLE MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_CIPHER_FULL_BLOCK_EXPECTED MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED +#define POLARSSL_ERR_CIPHER_INVALID_PADDING MBEDTLS_ERR_CIPHER_INVALID_PADDING +#define POLARSSL_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED +#define POLARSSL_ERR_CTR_DRBG_FILE_IO_ERROR MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR +#define POLARSSL_ERR_CTR_DRBG_INPUT_TOO_BIG MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG +#define POLARSSL_ERR_CTR_DRBG_REQUEST_TOO_BIG MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG +#define POLARSSL_ERR_DES_INVALID_INPUT_LENGTH MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH +#define POLARSSL_ERR_DHM_BAD_INPUT_DATA MBEDTLS_ERR_DHM_BAD_INPUT_DATA +#define POLARSSL_ERR_DHM_CALC_SECRET_FAILED MBEDTLS_ERR_DHM_CALC_SECRET_FAILED +#define POLARSSL_ERR_DHM_FILE_IO_ERROR MBEDTLS_ERR_DHM_FILE_IO_ERROR +#define POLARSSL_ERR_DHM_INVALID_FORMAT MBEDTLS_ERR_DHM_INVALID_FORMAT +#define POLARSSL_ERR_DHM_MAKE_PARAMS_FAILED MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED +#define POLARSSL_ERR_DHM_MAKE_PUBLIC_FAILED MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED +#define POLARSSL_ERR_DHM_MALLOC_FAILED MBEDTLS_ERR_DHM_ALLOC_FAILED +#define POLARSSL_ERR_DHM_READ_PARAMS_FAILED MBEDTLS_ERR_DHM_READ_PARAMS_FAILED +#define POLARSSL_ERR_DHM_READ_PUBLIC_FAILED MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED +#define POLARSSL_ERR_ECP_BAD_INPUT_DATA MBEDTLS_ERR_ECP_BAD_INPUT_DATA +#define POLARSSL_ERR_ECP_BUFFER_TOO_SMALL MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL +#define POLARSSL_ERR_ECP_FEATURE_UNAVAILABLE MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_ECP_INVALID_KEY MBEDTLS_ERR_ECP_INVALID_KEY +#define POLARSSL_ERR_ECP_MALLOC_FAILED MBEDTLS_ERR_ECP_ALLOC_FAILED +#define POLARSSL_ERR_ECP_RANDOM_FAILED MBEDTLS_ERR_ECP_RANDOM_FAILED +#define POLARSSL_ERR_ECP_SIG_LEN_MISMATCH MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH +#define POLARSSL_ERR_ECP_VERIFY_FAILED MBEDTLS_ERR_ECP_VERIFY_FAILED +#define POLARSSL_ERR_ENTROPY_FILE_IO_ERROR MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR +#define POLARSSL_ERR_ENTROPY_MAX_SOURCES MBEDTLS_ERR_ENTROPY_MAX_SOURCES +#define POLARSSL_ERR_ENTROPY_NO_SOURCES_DEFINED MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED +#define POLARSSL_ERR_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_ENTROPY_SOURCE_FAILED +#define POLARSSL_ERR_GCM_AUTH_FAILED MBEDTLS_ERR_GCM_AUTH_FAILED +#define POLARSSL_ERR_GCM_BAD_INPUT MBEDTLS_ERR_GCM_BAD_INPUT +#define POLARSSL_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED +#define POLARSSL_ERR_HMAC_DRBG_FILE_IO_ERROR MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR +#define POLARSSL_ERR_HMAC_DRBG_INPUT_TOO_BIG MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG +#define POLARSSL_ERR_HMAC_DRBG_REQUEST_TOO_BIG MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG +#define POLARSSL_ERR_MD2_FILE_IO_ERROR MBEDTLS_ERR_MD2_FILE_IO_ERROR +#define POLARSSL_ERR_MD4_FILE_IO_ERROR MBEDTLS_ERR_MD4_FILE_IO_ERROR +#define POLARSSL_ERR_MD5_FILE_IO_ERROR MBEDTLS_ERR_MD5_FILE_IO_ERROR +#define POLARSSL_ERR_MD_ALLOC_FAILED MBEDTLS_ERR_MD_ALLOC_FAILED +#define POLARSSL_ERR_MD_BAD_INPUT_DATA MBEDTLS_ERR_MD_BAD_INPUT_DATA +#define POLARSSL_ERR_MD_FEATURE_UNAVAILABLE MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_MD_FILE_IO_ERROR MBEDTLS_ERR_MD_FILE_IO_ERROR +#define POLARSSL_ERR_MPI_BAD_INPUT_DATA MBEDTLS_ERR_MPI_BAD_INPUT_DATA +#define POLARSSL_ERR_MPI_BUFFER_TOO_SMALL MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL +#define POLARSSL_ERR_MPI_DIVISION_BY_ZERO MBEDTLS_ERR_MPI_DIVISION_BY_ZERO +#define POLARSSL_ERR_MPI_FILE_IO_ERROR MBEDTLS_ERR_MPI_FILE_IO_ERROR +#define POLARSSL_ERR_MPI_INVALID_CHARACTER MBEDTLS_ERR_MPI_INVALID_CHARACTER +#define POLARSSL_ERR_MPI_MALLOC_FAILED MBEDTLS_ERR_MPI_ALLOC_FAILED +#define POLARSSL_ERR_MPI_NEGATIVE_VALUE MBEDTLS_ERR_MPI_NEGATIVE_VALUE +#define POLARSSL_ERR_MPI_NOT_ACCEPTABLE MBEDTLS_ERR_MPI_NOT_ACCEPTABLE +#define POLARSSL_ERR_NET_ACCEPT_FAILED MBEDTLS_ERR_NET_ACCEPT_FAILED +#define POLARSSL_ERR_NET_BIND_FAILED MBEDTLS_ERR_NET_BIND_FAILED +#define POLARSSL_ERR_NET_CONNECT_FAILED MBEDTLS_ERR_NET_CONNECT_FAILED +#define POLARSSL_ERR_NET_CONN_RESET MBEDTLS_ERR_NET_CONN_RESET +#define POLARSSL_ERR_NET_LISTEN_FAILED MBEDTLS_ERR_NET_LISTEN_FAILED +#define POLARSSL_ERR_NET_RECV_FAILED MBEDTLS_ERR_NET_RECV_FAILED +#define POLARSSL_ERR_NET_SEND_FAILED MBEDTLS_ERR_NET_SEND_FAILED +#define POLARSSL_ERR_NET_SOCKET_FAILED MBEDTLS_ERR_NET_SOCKET_FAILED +#define POLARSSL_ERR_NET_TIMEOUT MBEDTLS_ERR_SSL_TIMEOUT +#define POLARSSL_ERR_NET_UNKNOWN_HOST MBEDTLS_ERR_NET_UNKNOWN_HOST +#define POLARSSL_ERR_NET_WANT_READ MBEDTLS_ERR_SSL_WANT_READ +#define POLARSSL_ERR_NET_WANT_WRITE MBEDTLS_ERR_SSL_WANT_WRITE +#define POLARSSL_ERR_OID_BUF_TOO_SMALL MBEDTLS_ERR_OID_BUF_TOO_SMALL +#define POLARSSL_ERR_OID_NOT_FOUND MBEDTLS_ERR_OID_NOT_FOUND +#define POLARSSL_ERR_PADLOCK_DATA_MISALIGNED MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED +#define POLARSSL_ERR_PBKDF2_BAD_INPUT_DATA MBEDTLS_ERR_PBKDF2_BAD_INPUT_DATA +#define POLARSSL_ERR_PEM_BAD_INPUT_DATA MBEDTLS_ERR_PEM_BAD_INPUT_DATA +#define POLARSSL_ERR_PEM_FEATURE_UNAVAILABLE MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_PEM_INVALID_DATA MBEDTLS_ERR_PEM_INVALID_DATA +#define POLARSSL_ERR_PEM_INVALID_ENC_IV MBEDTLS_ERR_PEM_INVALID_ENC_IV +#define POLARSSL_ERR_PEM_MALLOC_FAILED MBEDTLS_ERR_PEM_ALLOC_FAILED +#define POLARSSL_ERR_PEM_NO_HEADER_FOOTER_PRESENT MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT +#define POLARSSL_ERR_PEM_PASSWORD_MISMATCH MBEDTLS_ERR_PEM_PASSWORD_MISMATCH +#define POLARSSL_ERR_PEM_PASSWORD_REQUIRED MBEDTLS_ERR_PEM_PASSWORD_REQUIRED +#define POLARSSL_ERR_PEM_UNKNOWN_ENC_ALG MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG +#define POLARSSL_ERR_PKCS12_BAD_INPUT_DATA MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA +#define POLARSSL_ERR_PKCS12_FEATURE_UNAVAILABLE MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_PKCS12_PASSWORD_MISMATCH MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH +#define POLARSSL_ERR_PKCS12_PBE_INVALID_FORMAT MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT +#define POLARSSL_ERR_PKCS5_BAD_INPUT_DATA MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA +#define POLARSSL_ERR_PKCS5_FEATURE_UNAVAILABLE MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_PKCS5_INVALID_FORMAT MBEDTLS_ERR_PKCS5_INVALID_FORMAT +#define POLARSSL_ERR_PKCS5_PASSWORD_MISMATCH MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH +#define POLARSSL_ERR_PK_BAD_INPUT_DATA MBEDTLS_ERR_PK_BAD_INPUT_DATA +#define POLARSSL_ERR_PK_FEATURE_UNAVAILABLE MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_PK_FILE_IO_ERROR MBEDTLS_ERR_PK_FILE_IO_ERROR +#define POLARSSL_ERR_PK_INVALID_ALG MBEDTLS_ERR_PK_INVALID_ALG +#define POLARSSL_ERR_PK_INVALID_PUBKEY MBEDTLS_ERR_PK_INVALID_PUBKEY +#define POLARSSL_ERR_PK_KEY_INVALID_FORMAT MBEDTLS_ERR_PK_KEY_INVALID_FORMAT +#define POLARSSL_ERR_PK_KEY_INVALID_VERSION MBEDTLS_ERR_PK_KEY_INVALID_VERSION +#define POLARSSL_ERR_PK_MALLOC_FAILED MBEDTLS_ERR_PK_ALLOC_FAILED +#define POLARSSL_ERR_PK_PASSWORD_MISMATCH MBEDTLS_ERR_PK_PASSWORD_MISMATCH +#define POLARSSL_ERR_PK_PASSWORD_REQUIRED MBEDTLS_ERR_PK_PASSWORD_REQUIRED +#define POLARSSL_ERR_PK_SIG_LEN_MISMATCH MBEDTLS_ERR_PK_SIG_LEN_MISMATCH +#define POLARSSL_ERR_PK_TYPE_MISMATCH MBEDTLS_ERR_PK_TYPE_MISMATCH +#define POLARSSL_ERR_PK_UNKNOWN_NAMED_CURVE MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE +#define POLARSSL_ERR_PK_UNKNOWN_PK_ALG MBEDTLS_ERR_PK_UNKNOWN_PK_ALG +#define POLARSSL_ERR_RIPEMD160_FILE_IO_ERROR MBEDTLS_ERR_RIPEMD160_FILE_IO_ERROR +#define POLARSSL_ERR_RSA_BAD_INPUT_DATA MBEDTLS_ERR_RSA_BAD_INPUT_DATA +#define POLARSSL_ERR_RSA_INVALID_PADDING MBEDTLS_ERR_RSA_INVALID_PADDING +#define POLARSSL_ERR_RSA_KEY_CHECK_FAILED MBEDTLS_ERR_RSA_KEY_CHECK_FAILED +#define POLARSSL_ERR_RSA_KEY_GEN_FAILED MBEDTLS_ERR_RSA_KEY_GEN_FAILED +#define POLARSSL_ERR_RSA_OUTPUT_TOO_LARGE MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE +#define POLARSSL_ERR_RSA_PRIVATE_FAILED MBEDTLS_ERR_RSA_PRIVATE_FAILED +#define POLARSSL_ERR_RSA_PUBLIC_FAILED MBEDTLS_ERR_RSA_PUBLIC_FAILED +#define POLARSSL_ERR_RSA_RNG_FAILED MBEDTLS_ERR_RSA_RNG_FAILED +#define POLARSSL_ERR_RSA_VERIFY_FAILED MBEDTLS_ERR_RSA_VERIFY_FAILED +#define POLARSSL_ERR_SHA1_FILE_IO_ERROR MBEDTLS_ERR_SHA1_FILE_IO_ERROR +#define POLARSSL_ERR_SHA256_FILE_IO_ERROR MBEDTLS_ERR_SHA256_FILE_IO_ERROR +#define POLARSSL_ERR_SHA512_FILE_IO_ERROR MBEDTLS_ERR_SHA512_FILE_IO_ERROR +#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE +#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST +#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY +#define POLARSSL_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC +#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_HELLO MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO +#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE +#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS +#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP +#define POLARSSL_ERR_SSL_BAD_HS_FINISHED MBEDTLS_ERR_SSL_BAD_HS_FINISHED +#define POLARSSL_ERR_SSL_BAD_HS_NEW_SESSION_TICKET MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET +#define POLARSSL_ERR_SSL_BAD_HS_PROTOCOL_VERSION MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION +#define POLARSSL_ERR_SSL_BAD_HS_SERVER_HELLO MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO +#define POLARSSL_ERR_SSL_BAD_HS_SERVER_HELLO_DONE MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE +#define POLARSSL_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE +#define POLARSSL_ERR_SSL_BAD_INPUT_DATA MBEDTLS_ERR_SSL_BAD_INPUT_DATA +#define POLARSSL_ERR_SSL_BUFFER_TOO_SMALL MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL +#define POLARSSL_ERR_SSL_CA_CHAIN_REQUIRED MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED +#define POLARSSL_ERR_SSL_CERTIFICATE_REQUIRED MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED +#define POLARSSL_ERR_SSL_CERTIFICATE_TOO_LARGE MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE +#define POLARSSL_ERR_SSL_COMPRESSION_FAILED MBEDTLS_ERR_SSL_COMPRESSION_FAILED +#define POLARSSL_ERR_SSL_CONN_EOF MBEDTLS_ERR_SSL_CONN_EOF +#define POLARSSL_ERR_SSL_COUNTER_WRAPPING MBEDTLS_ERR_SSL_COUNTER_WRAPPING +#define POLARSSL_ERR_SSL_FATAL_ALERT_MESSAGE MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE +#define POLARSSL_ERR_SSL_FEATURE_UNAVAILABLE MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_SSL_HELLO_VERIFY_REQUIRED MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED +#define POLARSSL_ERR_SSL_HW_ACCEL_FAILED MBEDTLS_ERR_SSL_HW_ACCEL_FAILED +#define POLARSSL_ERR_SSL_HW_ACCEL_FALLTHROUGH MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH +#define POLARSSL_ERR_SSL_INTERNAL_ERROR MBEDTLS_ERR_SSL_INTERNAL_ERROR +#define POLARSSL_ERR_SSL_INVALID_MAC MBEDTLS_ERR_SSL_INVALID_MAC +#define POLARSSL_ERR_SSL_INVALID_RECORD MBEDTLS_ERR_SSL_INVALID_RECORD +#define POLARSSL_ERR_SSL_MALLOC_FAILED MBEDTLS_ERR_SSL_ALLOC_FAILED +#define POLARSSL_ERR_SSL_NO_CIPHER_CHOSEN MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN +#define POLARSSL_ERR_SSL_NO_CLIENT_CERTIFICATE MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE +#define POLARSSL_ERR_SSL_NO_RNG MBEDTLS_ERR_SSL_NO_RNG +#define POLARSSL_ERR_SSL_NO_USABLE_CIPHERSUITE MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE +#define POLARSSL_ERR_SSL_PEER_CLOSE_NOTIFY MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY +#define POLARSSL_ERR_SSL_PEER_VERIFY_FAILED MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED +#define POLARSSL_ERR_SSL_PK_TYPE_MISMATCH MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH +#define POLARSSL_ERR_SSL_PRIVATE_KEY_REQUIRED MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED +#define POLARSSL_ERR_SSL_SESSION_TICKET_EXPIRED MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED +#define POLARSSL_ERR_SSL_UNEXPECTED_MESSAGE MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE +#define POLARSSL_ERR_SSL_UNKNOWN_CIPHER MBEDTLS_ERR_SSL_UNKNOWN_CIPHER +#define POLARSSL_ERR_SSL_UNKNOWN_IDENTITY MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY +#define POLARSSL_ERR_SSL_WAITING_SERVER_HELLO_RENEGO MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO +#define POLARSSL_ERR_THREADING_BAD_INPUT_DATA MBEDTLS_ERR_THREADING_BAD_INPUT_DATA +#define POLARSSL_ERR_THREADING_FEATURE_UNAVAILABLE MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_THREADING_MUTEX_ERROR MBEDTLS_ERR_THREADING_MUTEX_ERROR +#define POLARSSL_ERR_X509_BAD_INPUT_DATA MBEDTLS_ERR_X509_BAD_INPUT_DATA +#define POLARSSL_ERR_X509_CERT_UNKNOWN_FORMAT MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT +#define POLARSSL_ERR_X509_CERT_VERIFY_FAILED MBEDTLS_ERR_X509_CERT_VERIFY_FAILED +#define POLARSSL_ERR_X509_FEATURE_UNAVAILABLE MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE +#define POLARSSL_ERR_X509_FILE_IO_ERROR MBEDTLS_ERR_X509_FILE_IO_ERROR +#define POLARSSL_ERR_X509_INVALID_ALG MBEDTLS_ERR_X509_INVALID_ALG +#define POLARSSL_ERR_X509_INVALID_DATE MBEDTLS_ERR_X509_INVALID_DATE +#define POLARSSL_ERR_X509_INVALID_EXTENSIONS MBEDTLS_ERR_X509_INVALID_EXTENSIONS +#define POLARSSL_ERR_X509_INVALID_FORMAT MBEDTLS_ERR_X509_INVALID_FORMAT +#define POLARSSL_ERR_X509_INVALID_NAME MBEDTLS_ERR_X509_INVALID_NAME +#define POLARSSL_ERR_X509_INVALID_SERIAL MBEDTLS_ERR_X509_INVALID_SERIAL +#define POLARSSL_ERR_X509_INVALID_SIGNATURE MBEDTLS_ERR_X509_INVALID_SIGNATURE +#define POLARSSL_ERR_X509_INVALID_VERSION MBEDTLS_ERR_X509_INVALID_VERSION +#define POLARSSL_ERR_X509_MALLOC_FAILED MBEDTLS_ERR_X509_ALLOC_FAILED +#define POLARSSL_ERR_X509_SIG_MISMATCH MBEDTLS_ERR_X509_SIG_MISMATCH +#define POLARSSL_ERR_X509_UNKNOWN_OID MBEDTLS_ERR_X509_UNKNOWN_OID +#define POLARSSL_ERR_X509_UNKNOWN_SIG_ALG MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG +#define POLARSSL_ERR_X509_UNKNOWN_VERSION MBEDTLS_ERR_X509_UNKNOWN_VERSION +#define POLARSSL_ERR_XTEA_INVALID_INPUT_LENGTH MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH +#define POLARSSL_GCM_H MBEDTLS_GCM_H +#define POLARSSL_HAVEGE_H MBEDTLS_HAVEGE_H +#define POLARSSL_HAVE_INT32 MBEDTLS_HAVE_INT32 +#define POLARSSL_HAVE_INT64 MBEDTLS_HAVE_INT64 +#define POLARSSL_HAVE_UDBL MBEDTLS_HAVE_UDBL +#define POLARSSL_HAVE_X86 MBEDTLS_HAVE_X86 +#define POLARSSL_HAVE_X86_64 MBEDTLS_HAVE_X86_64 +#define POLARSSL_HMAC_DRBG_H MBEDTLS_HMAC_DRBG_H +#define POLARSSL_HMAC_DRBG_PR_OFF MBEDTLS_HMAC_DRBG_PR_OFF +#define POLARSSL_HMAC_DRBG_PR_ON MBEDTLS_HMAC_DRBG_PR_ON +#define POLARSSL_KEY_EXCHANGE_DHE_PSK MBEDTLS_KEY_EXCHANGE_DHE_PSK +#define POLARSSL_KEY_EXCHANGE_DHE_RSA MBEDTLS_KEY_EXCHANGE_DHE_RSA +#define POLARSSL_KEY_EXCHANGE_ECDHE_ECDSA MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA +#define POLARSSL_KEY_EXCHANGE_ECDHE_PSK MBEDTLS_KEY_EXCHANGE_ECDHE_PSK +#define POLARSSL_KEY_EXCHANGE_ECDHE_RSA MBEDTLS_KEY_EXCHANGE_ECDHE_RSA +#define POLARSSL_KEY_EXCHANGE_ECDH_ECDSA MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA +#define POLARSSL_KEY_EXCHANGE_ECDH_RSA MBEDTLS_KEY_EXCHANGE_ECDH_RSA +#define POLARSSL_KEY_EXCHANGE_NONE MBEDTLS_KEY_EXCHANGE_NONE +#define POLARSSL_KEY_EXCHANGE_PSK MBEDTLS_KEY_EXCHANGE_PSK +#define POLARSSL_KEY_EXCHANGE_RSA MBEDTLS_KEY_EXCHANGE_RSA +#define POLARSSL_KEY_EXCHANGE_RSA_PSK MBEDTLS_KEY_EXCHANGE_RSA_PSK +#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED +#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED +#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED +#define POLARSSL_KEY_LENGTH_DES MBEDTLS_KEY_LENGTH_DES +#define POLARSSL_KEY_LENGTH_DES_EDE MBEDTLS_KEY_LENGTH_DES_EDE +#define POLARSSL_KEY_LENGTH_DES_EDE3 MBEDTLS_KEY_LENGTH_DES_EDE3 +#define POLARSSL_KEY_LENGTH_NONE MBEDTLS_KEY_LENGTH_NONE +#define POLARSSL_MAX_BLOCK_LENGTH MBEDTLS_MAX_BLOCK_LENGTH +#define POLARSSL_MAX_IV_LENGTH MBEDTLS_MAX_IV_LENGTH +#define POLARSSL_MD2_H MBEDTLS_MD2_H +#define POLARSSL_MD4_H MBEDTLS_MD4_H +#define POLARSSL_MD5_H MBEDTLS_MD5_H +#define POLARSSL_MD_H MBEDTLS_MD_H +#define POLARSSL_MD_MAX_SIZE MBEDTLS_MD_MAX_SIZE +#define POLARSSL_MD_MD2 MBEDTLS_MD_MD2 +#define POLARSSL_MD_MD4 MBEDTLS_MD_MD4 +#define POLARSSL_MD_MD5 MBEDTLS_MD_MD5 +#define POLARSSL_MD_NONE MBEDTLS_MD_NONE +#define POLARSSL_MD_RIPEMD160 MBEDTLS_MD_RIPEMD160 +#define POLARSSL_MD_SHA1 MBEDTLS_MD_SHA1 +#define POLARSSL_MD_SHA224 MBEDTLS_MD_SHA224 +#define POLARSSL_MD_SHA256 MBEDTLS_MD_SHA256 +#define POLARSSL_MD_SHA384 MBEDTLS_MD_SHA384 +#define POLARSSL_MD_SHA512 MBEDTLS_MD_SHA512 +#define POLARSSL_MD_WRAP_H MBEDTLS_MD_WRAP_H +#define POLARSSL_MEMORY_BUFFER_ALLOC_H MBEDTLS_MEMORY_BUFFER_ALLOC_H +#define POLARSSL_MEMORY_H MBEDTLS_MEMORY_H +#define POLARSSL_MODE_CBC MBEDTLS_MODE_CBC +#define POLARSSL_MODE_CCM MBEDTLS_MODE_CCM +#define POLARSSL_MODE_CFB MBEDTLS_MODE_CFB +#define POLARSSL_MODE_CTR MBEDTLS_MODE_CTR +#define POLARSSL_MODE_ECB MBEDTLS_MODE_ECB +#define POLARSSL_MODE_GCM MBEDTLS_MODE_GCM +#define POLARSSL_MODE_NONE MBEDTLS_MODE_NONE +#define POLARSSL_MODE_OFB MBEDTLS_MODE_OFB +#define POLARSSL_MODE_STREAM MBEDTLS_MODE_STREAM +#define POLARSSL_MPI_MAX_BITS MBEDTLS_MPI_MAX_BITS +#define POLARSSL_MPI_MAX_BITS_SCALE100 MBEDTLS_MPI_MAX_BITS_SCALE100 +#define POLARSSL_MPI_MAX_LIMBS MBEDTLS_MPI_MAX_LIMBS +#define POLARSSL_MPI_RW_BUFFER_SIZE MBEDTLS_MPI_RW_BUFFER_SIZE +#define POLARSSL_NET_H MBEDTLS_NET_H +#define POLARSSL_NET_LISTEN_BACKLOG MBEDTLS_NET_LISTEN_BACKLOG +#define POLARSSL_OID_H MBEDTLS_OID_H +#define POLARSSL_OPERATION_NONE MBEDTLS_OPERATION_NONE +#define POLARSSL_PADDING_NONE MBEDTLS_PADDING_NONE +#define POLARSSL_PADDING_ONE_AND_ZEROS MBEDTLS_PADDING_ONE_AND_ZEROS +#define POLARSSL_PADDING_PKCS7 MBEDTLS_PADDING_PKCS7 +#define POLARSSL_PADDING_ZEROS MBEDTLS_PADDING_ZEROS +#define POLARSSL_PADDING_ZEROS_AND_LEN MBEDTLS_PADDING_ZEROS_AND_LEN +#define POLARSSL_PADLOCK_H MBEDTLS_PADLOCK_H +#define POLARSSL_PBKDF2_H MBEDTLS_PBKDF2_H +#define POLARSSL_PEM_H MBEDTLS_PEM_H +#define POLARSSL_PKCS11_H MBEDTLS_PKCS11_H +#define POLARSSL_PKCS12_H MBEDTLS_PKCS12_H +#define POLARSSL_PKCS5_H MBEDTLS_PKCS5_H +#define POLARSSL_PK_DEBUG_ECP MBEDTLS_PK_DEBUG_ECP +#define POLARSSL_PK_DEBUG_MAX_ITEMS MBEDTLS_PK_DEBUG_MAX_ITEMS +#define POLARSSL_PK_DEBUG_MPI MBEDTLS_PK_DEBUG_MPI +#define POLARSSL_PK_DEBUG_NONE MBEDTLS_PK_DEBUG_NONE +#define POLARSSL_PK_ECDSA MBEDTLS_PK_ECDSA +#define POLARSSL_PK_ECKEY MBEDTLS_PK_ECKEY +#define POLARSSL_PK_ECKEY_DH MBEDTLS_PK_ECKEY_DH +#define POLARSSL_PK_H MBEDTLS_PK_H +#define POLARSSL_PK_NONE MBEDTLS_PK_NONE +#define POLARSSL_PK_RSA MBEDTLS_PK_RSA +#define POLARSSL_PK_RSASSA_PSS MBEDTLS_PK_RSASSA_PSS +#define POLARSSL_PK_RSA_ALT MBEDTLS_PK_RSA_ALT +#define POLARSSL_PK_WRAP_H MBEDTLS_PK_WRAP_H +#define POLARSSL_PLATFORM_H MBEDTLS_PLATFORM_H +#define POLARSSL_PREMASTER_SIZE MBEDTLS_PREMASTER_SIZE +#define POLARSSL_RIPEMD160_H MBEDTLS_RIPEMD160_H +#define POLARSSL_RSA_H MBEDTLS_RSA_H +#define POLARSSL_SHA1_H MBEDTLS_SHA1_H +#define POLARSSL_SHA256_H MBEDTLS_SHA256_H +#define POLARSSL_SHA512_H MBEDTLS_SHA512_H +#define POLARSSL_SSL_CACHE_H MBEDTLS_SSL_CACHE_H +#define POLARSSL_SSL_CIPHERSUITES_H MBEDTLS_SSL_CIPHERSUITES_H +#define POLARSSL_SSL_COOKIE_H MBEDTLS_SSL_COOKIE_H +#define POLARSSL_SSL_H MBEDTLS_SSL_H +#define POLARSSL_THREADING_H MBEDTLS_THREADING_H +#define POLARSSL_THREADING_IMPL MBEDTLS_THREADING_IMPL +#define POLARSSL_TIMING_H MBEDTLS_TIMING_H +#define POLARSSL_VERSION_H MBEDTLS_VERSION_H +#define POLARSSL_VERSION_MAJOR MBEDTLS_VERSION_MAJOR +#define POLARSSL_VERSION_MINOR MBEDTLS_VERSION_MINOR +#define POLARSSL_VERSION_NUMBER MBEDTLS_VERSION_NUMBER +#define POLARSSL_VERSION_PATCH MBEDTLS_VERSION_PATCH +#define POLARSSL_VERSION_STRING MBEDTLS_VERSION_STRING +#define POLARSSL_VERSION_STRING_FULL MBEDTLS_VERSION_STRING_FULL +#define POLARSSL_X509_CRL_H MBEDTLS_X509_CRL_H +#define POLARSSL_X509_CRT_H MBEDTLS_X509_CRT_H +#define POLARSSL_X509_CSR_H MBEDTLS_X509_CSR_H +#define POLARSSL_X509_H MBEDTLS_X509_H +#define POLARSSL_XTEA_H MBEDTLS_XTEA_H +#define RSA_CRYPT MBEDTLS_RSA_CRYPT +#define RSA_PKCS_V15 MBEDTLS_RSA_PKCS_V15 +#define RSA_PKCS_V21 MBEDTLS_RSA_PKCS_V21 +#define RSA_PRIVATE MBEDTLS_RSA_PRIVATE +#define RSA_PUBLIC MBEDTLS_RSA_PUBLIC +#define RSA_SALT_LEN_ANY MBEDTLS_RSA_SALT_LEN_ANY +#define RSA_SIGN MBEDTLS_RSA_SIGN +#define SSL_ALERT_LEVEL_FATAL MBEDTLS_SSL_ALERT_LEVEL_FATAL +#define SSL_ALERT_LEVEL_WARNING MBEDTLS_SSL_ALERT_LEVEL_WARNING +#define SSL_ALERT_MSG_ACCESS_DENIED MBEDTLS_SSL_ALERT_MSG_ACCESS_DENIED +#define SSL_ALERT_MSG_BAD_CERT MBEDTLS_SSL_ALERT_MSG_BAD_CERT +#define SSL_ALERT_MSG_BAD_RECORD_MAC MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC +#define SSL_ALERT_MSG_CERT_EXPIRED MBEDTLS_SSL_ALERT_MSG_CERT_EXPIRED +#define SSL_ALERT_MSG_CERT_REVOKED MBEDTLS_SSL_ALERT_MSG_CERT_REVOKED +#define SSL_ALERT_MSG_CERT_UNKNOWN MBEDTLS_SSL_ALERT_MSG_CERT_UNKNOWN +#define SSL_ALERT_MSG_CLOSE_NOTIFY MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY +#define SSL_ALERT_MSG_DECODE_ERROR MBEDTLS_SSL_ALERT_MSG_DECODE_ERROR +#define SSL_ALERT_MSG_DECOMPRESSION_FAILURE MBEDTLS_SSL_ALERT_MSG_DECOMPRESSION_FAILURE +#define SSL_ALERT_MSG_DECRYPTION_FAILED MBEDTLS_SSL_ALERT_MSG_DECRYPTION_FAILED +#define SSL_ALERT_MSG_DECRYPT_ERROR MBEDTLS_SSL_ALERT_MSG_DECRYPT_ERROR +#define SSL_ALERT_MSG_EXPORT_RESTRICTION MBEDTLS_SSL_ALERT_MSG_EXPORT_RESTRICTION +#define SSL_ALERT_MSG_HANDSHAKE_FAILURE MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE +#define SSL_ALERT_MSG_ILLEGAL_PARAMETER MBEDTLS_SSL_ALERT_MSG_ILLEGAL_PARAMETER +#define SSL_ALERT_MSG_INAPROPRIATE_FALLBACK MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK +#define SSL_ALERT_MSG_INSUFFICIENT_SECURITY MBEDTLS_SSL_ALERT_MSG_INSUFFICIENT_SECURITY +#define SSL_ALERT_MSG_INTERNAL_ERROR MBEDTLS_SSL_ALERT_MSG_INTERNAL_ERROR +#define SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL MBEDTLS_SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL +#define SSL_ALERT_MSG_NO_CERT MBEDTLS_SSL_ALERT_MSG_NO_CERT +#define SSL_ALERT_MSG_NO_RENEGOTIATION MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION +#define SSL_ALERT_MSG_PROTOCOL_VERSION MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION +#define SSL_ALERT_MSG_RECORD_OVERFLOW MBEDTLS_SSL_ALERT_MSG_RECORD_OVERFLOW +#define SSL_ALERT_MSG_UNEXPECTED_MESSAGE MBEDTLS_SSL_ALERT_MSG_UNEXPECTED_MESSAGE +#define SSL_ALERT_MSG_UNKNOWN_CA MBEDTLS_SSL_ALERT_MSG_UNKNOWN_CA +#define SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY MBEDTLS_SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY +#define SSL_ALERT_MSG_UNRECOGNIZED_NAME MBEDTLS_SSL_ALERT_MSG_UNRECOGNIZED_NAME +#define SSL_ALERT_MSG_UNSUPPORTED_CERT MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_CERT +#define SSL_ALERT_MSG_UNSUPPORTED_EXT MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_EXT +#define SSL_ALERT_MSG_USER_CANCELED MBEDTLS_SSL_ALERT_MSG_USER_CANCELED +#define SSL_ANTI_REPLAY_DISABLED MBEDTLS_SSL_ANTI_REPLAY_DISABLED +#define SSL_ANTI_REPLAY_ENABLED MBEDTLS_SSL_ANTI_REPLAY_ENABLED +#define SSL_ARC4_DISABLED MBEDTLS_SSL_ARC4_DISABLED +#define SSL_ARC4_ENABLED MBEDTLS_SSL_ARC4_ENABLED +#define SSL_BUFFER_LEN MBEDTLS_SSL_BUFFER_LEN +#define SSL_CACHE_DEFAULT_MAX_ENTRIES MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES +#define SSL_CACHE_DEFAULT_TIMEOUT MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT +#define SSL_CBC_RECORD_SPLITTING_DISABLED MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED +#define SSL_CBC_RECORD_SPLITTING_ENABLED MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED +#define SSL_CERTIFICATE_REQUEST MBEDTLS_SSL_CERTIFICATE_REQUEST +#define SSL_CERTIFICATE_VERIFY MBEDTLS_SSL_CERTIFICATE_VERIFY +#define SSL_CERT_TYPE_ECDSA_SIGN MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN +#define SSL_CERT_TYPE_RSA_SIGN MBEDTLS_SSL_CERT_TYPE_RSA_SIGN +#define SSL_CHANNEL_INBOUND MBEDTLS_SSL_CHANNEL_INBOUND +#define SSL_CHANNEL_OUTBOUND MBEDTLS_SSL_CHANNEL_OUTBOUND +#define SSL_CIPHERSUITES MBEDTLS_SSL_CIPHERSUITES +#define SSL_CLIENT_CERTIFICATE MBEDTLS_SSL_CLIENT_CERTIFICATE +#define SSL_CLIENT_CHANGE_CIPHER_SPEC MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC +#define SSL_CLIENT_FINISHED MBEDTLS_SSL_CLIENT_FINISHED +#define SSL_CLIENT_HELLO MBEDTLS_SSL_CLIENT_HELLO +#define SSL_CLIENT_KEY_EXCHANGE MBEDTLS_SSL_CLIENT_KEY_EXCHANGE +#define SSL_COMPRESSION_ADD MBEDTLS_SSL_COMPRESSION_ADD +#define SSL_COMPRESS_DEFLATE MBEDTLS_SSL_COMPRESS_DEFLATE +#define SSL_COMPRESS_NULL MBEDTLS_SSL_COMPRESS_NULL +#define SSL_DEBUG_BUF MBEDTLS_SSL_DEBUG_BUF +#define SSL_DEBUG_CRT MBEDTLS_SSL_DEBUG_CRT +#define SSL_DEBUG_ECP MBEDTLS_SSL_DEBUG_ECP +#define SSL_DEBUG_MPI MBEDTLS_SSL_DEBUG_MPI +#define SSL_DEBUG_MSG MBEDTLS_SSL_DEBUG_MSG +#define SSL_DEBUG_RET MBEDTLS_SSL_DEBUG_RET +#define SSL_DEFAULT_TICKET_LIFETIME MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME +#define SSL_DTLS_TIMEOUT_DFL_MAX MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MAX +#define SSL_DTLS_TIMEOUT_DFL_MIN MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MIN +#define SSL_EMPTY_RENEGOTIATION_INFO MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO +#define SSL_ETM_DISABLED MBEDTLS_SSL_ETM_DISABLED +#define SSL_ETM_ENABLED MBEDTLS_SSL_ETM_ENABLED +#define SSL_EXTENDED_MS_DISABLED MBEDTLS_SSL_EXTENDED_MS_DISABLED +#define SSL_EXTENDED_MS_ENABLED MBEDTLS_SSL_EXTENDED_MS_ENABLED +#define SSL_FALLBACK_SCSV MBEDTLS_SSL_FALLBACK_SCSV +#define SSL_FLUSH_BUFFERS MBEDTLS_SSL_FLUSH_BUFFERS +#define SSL_HANDSHAKE_OVER MBEDTLS_SSL_HANDSHAKE_OVER +#define SSL_HANDSHAKE_WRAPUP MBEDTLS_SSL_HANDSHAKE_WRAPUP +#define SSL_HASH_MD5 MBEDTLS_SSL_HASH_MD5 +#define SSL_HASH_NONE MBEDTLS_SSL_HASH_NONE +#define SSL_HASH_SHA1 MBEDTLS_SSL_HASH_SHA1 +#define SSL_HASH_SHA224 MBEDTLS_SSL_HASH_SHA224 +#define SSL_HASH_SHA256 MBEDTLS_SSL_HASH_SHA256 +#define SSL_HASH_SHA384 MBEDTLS_SSL_HASH_SHA384 +#define SSL_HASH_SHA512 MBEDTLS_SSL_HASH_SHA512 +#define SSL_HELLO_REQUEST MBEDTLS_SSL_HELLO_REQUEST +#define SSL_HS_CERTIFICATE MBEDTLS_SSL_HS_CERTIFICATE +#define SSL_HS_CERTIFICATE_REQUEST MBEDTLS_SSL_HS_CERTIFICATE_REQUEST +#define SSL_HS_CERTIFICATE_VERIFY MBEDTLS_SSL_HS_CERTIFICATE_VERIFY +#define SSL_HS_CLIENT_HELLO MBEDTLS_SSL_HS_CLIENT_HELLO +#define SSL_HS_CLIENT_KEY_EXCHANGE MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE +#define SSL_HS_FINISHED MBEDTLS_SSL_HS_FINISHED +#define SSL_HS_HELLO_REQUEST MBEDTLS_SSL_HS_HELLO_REQUEST +#define SSL_HS_HELLO_VERIFY_REQUEST MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST +#define SSL_HS_NEW_SESSION_TICKET MBEDTLS_SSL_HS_NEW_SESSION_TICKET +#define SSL_HS_SERVER_HELLO MBEDTLS_SSL_HS_SERVER_HELLO +#define SSL_HS_SERVER_HELLO_DONE MBEDTLS_SSL_HS_SERVER_HELLO_DONE +#define SSL_HS_SERVER_KEY_EXCHANGE MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE +#define SSL_INITIAL_HANDSHAKE MBEDTLS_SSL_INITIAL_HANDSHAKE +#define SSL_IS_CLIENT MBEDTLS_SSL_IS_CLIENT +#define SSL_IS_FALLBACK MBEDTLS_SSL_IS_FALLBACK +#define SSL_IS_NOT_FALLBACK MBEDTLS_SSL_IS_NOT_FALLBACK +#define SSL_IS_SERVER MBEDTLS_SSL_IS_SERVER +#define SSL_LEGACY_ALLOW_RENEGOTIATION MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION +#define SSL_LEGACY_BREAK_HANDSHAKE MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE +#define SSL_LEGACY_NO_RENEGOTIATION MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION +#define SSL_LEGACY_RENEGOTIATION MBEDTLS_SSL_LEGACY_RENEGOTIATION +#define SSL_MAC_ADD MBEDTLS_SSL_MAC_ADD +#define SSL_MAJOR_VERSION_3 MBEDTLS_SSL_MAJOR_VERSION_3 +#define SSL_MAX_CONTENT_LEN MBEDTLS_SSL_MAX_CONTENT_LEN +#define SSL_MAX_FRAG_LEN_1024 MBEDTLS_SSL_MAX_FRAG_LEN_1024 +#define SSL_MAX_FRAG_LEN_2048 MBEDTLS_SSL_MAX_FRAG_LEN_2048 +#define SSL_MAX_FRAG_LEN_4096 MBEDTLS_SSL_MAX_FRAG_LEN_4096 +#define SSL_MAX_FRAG_LEN_512 MBEDTLS_SSL_MAX_FRAG_LEN_512 +#define SSL_MAX_FRAG_LEN_INVALID MBEDTLS_SSL_MAX_FRAG_LEN_INVALID +#define SSL_MAX_FRAG_LEN_NONE MBEDTLS_SSL_MAX_FRAG_LEN_NONE +#define SSL_MAX_MAJOR_VERSION MBEDTLS_SSL_MAX_MAJOR_VERSION +#define SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MAX_MINOR_VERSION +#define SSL_MINOR_VERSION_0 MBEDTLS_SSL_MINOR_VERSION_0 +#define SSL_MINOR_VERSION_1 MBEDTLS_SSL_MINOR_VERSION_1 +#define SSL_MINOR_VERSION_2 MBEDTLS_SSL_MINOR_VERSION_2 +#define SSL_MINOR_VERSION_3 MBEDTLS_SSL_MINOR_VERSION_3 +#define SSL_MIN_MAJOR_VERSION MBEDTLS_SSL_MIN_MAJOR_VERSION +#define SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MIN_MINOR_VERSION +#define SSL_MSG_ALERT MBEDTLS_SSL_MSG_ALERT +#define SSL_MSG_APPLICATION_DATA MBEDTLS_SSL_MSG_APPLICATION_DATA +#define SSL_MSG_CHANGE_CIPHER_SPEC MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC +#define SSL_MSG_HANDSHAKE MBEDTLS_SSL_MSG_HANDSHAKE +#define SSL_PADDING_ADD MBEDTLS_SSL_PADDING_ADD +#define SSL_RENEGOTIATION MBEDTLS_SSL_RENEGOTIATION +#define SSL_RENEGOTIATION_DISABLED MBEDTLS_SSL_RENEGOTIATION_DISABLED +#define SSL_RENEGOTIATION_DONE MBEDTLS_SSL_RENEGOTIATION_DONE +#define SSL_RENEGOTIATION_ENABLED MBEDTLS_SSL_RENEGOTIATION_ENABLED +#define SSL_RENEGOTIATION_NOT_ENFORCED MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED +#define SSL_RENEGOTIATION_PENDING MBEDTLS_SSL_RENEGOTIATION_PENDING +#define SSL_RENEGO_MAX_RECORDS_DEFAULT MBEDTLS_SSL_RENEGO_MAX_RECORDS_DEFAULT +#define SSL_RETRANS_FINISHED MBEDTLS_SSL_RETRANS_FINISHED +#define SSL_RETRANS_PREPARING MBEDTLS_SSL_RETRANS_PREPARING +#define SSL_RETRANS_SENDING MBEDTLS_SSL_RETRANS_SENDING +#define SSL_RETRANS_WAITING MBEDTLS_SSL_RETRANS_WAITING +#define SSL_SECURE_RENEGOTIATION MBEDTLS_SSL_SECURE_RENEGOTIATION +#define SSL_SERVER_CERTIFICATE MBEDTLS_SSL_SERVER_CERTIFICATE +#define SSL_SERVER_CHANGE_CIPHER_SPEC MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC +#define SSL_SERVER_FINISHED MBEDTLS_SSL_SERVER_FINISHED +#define SSL_SERVER_HELLO MBEDTLS_SSL_SERVER_HELLO +#define SSL_SERVER_HELLO_DONE MBEDTLS_SSL_SERVER_HELLO_DONE +#define SSL_SERVER_HELLO_VERIFY_REQUEST_SENT MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT +#define SSL_SERVER_KEY_EXCHANGE MBEDTLS_SSL_SERVER_KEY_EXCHANGE +#define SSL_SERVER_NEW_SESSION_TICKET MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET +#define SSL_SESSION_TICKETS_DISABLED MBEDTLS_SSL_SESSION_TICKETS_DISABLED +#define SSL_SESSION_TICKETS_ENABLED MBEDTLS_SSL_SESSION_TICKETS_ENABLED +#define SSL_SIG_ANON MBEDTLS_SSL_SIG_ANON +#define SSL_SIG_ECDSA MBEDTLS_SSL_SIG_ECDSA +#define SSL_SIG_RSA MBEDTLS_SSL_SIG_RSA +#define SSL_TRANSPORT_DATAGRAM MBEDTLS_SSL_TRANSPORT_DATAGRAM +#define SSL_TRANSPORT_STREAM MBEDTLS_SSL_TRANSPORT_STREAM +#define SSL_TRUNCATED_HMAC_LEN MBEDTLS_SSL_TRUNCATED_HMAC_LEN +#define SSL_TRUNC_HMAC_DISABLED MBEDTLS_SSL_TRUNC_HMAC_DISABLED +#define SSL_TRUNC_HMAC_ENABLED MBEDTLS_SSL_TRUNC_HMAC_ENABLED +#define SSL_VERIFY_DATA_MAX_LEN MBEDTLS_SSL_VERIFY_DATA_MAX_LEN +#define SSL_VERIFY_NONE MBEDTLS_SSL_VERIFY_NONE +#define SSL_VERIFY_OPTIONAL MBEDTLS_SSL_VERIFY_OPTIONAL +#define SSL_VERIFY_REQUIRED MBEDTLS_SSL_VERIFY_REQUIRED +#define TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA +#define TLS_DHE_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA +#define TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 +#define TLS_DHE_PSK_WITH_AES_128_CCM MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM +#define TLS_DHE_PSK_WITH_AES_128_CCM_8 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8 +#define TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 +#define TLS_DHE_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA +#define TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 +#define TLS_DHE_PSK_WITH_AES_256_CCM MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM +#define TLS_DHE_PSK_WITH_AES_256_CCM_8 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8 +#define TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 +#define TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_DHE_PSK_WITH_NULL_SHA MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA +#define TLS_DHE_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 +#define TLS_DHE_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 +#define TLS_DHE_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA +#define TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA +#define TLS_DHE_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA +#define TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 +#define TLS_DHE_RSA_WITH_AES_128_CCM MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM +#define TLS_DHE_RSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8 +#define TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 +#define TLS_DHE_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA +#define TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 +#define TLS_DHE_RSA_WITH_AES_256_CCM MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM +#define TLS_DHE_RSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8 +#define TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 +#define TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA +#define TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA +#define TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 +#define TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_DHE_RSA_WITH_DES_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA +#define TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA +#define TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA +#define TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 +#define TLS_ECDHE_ECDSA_WITH_AES_128_CCM MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM +#define TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 +#define TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 +#define TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA +#define TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 +#define TLS_ECDHE_ECDSA_WITH_AES_256_CCM MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM +#define TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 +#define TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 +#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_ECDHE_ECDSA_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA +#define TLS_ECDHE_ECDSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA +#define TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA +#define TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA +#define TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 +#define TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA +#define TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 +#define TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_ECDHE_PSK_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA +#define TLS_ECDHE_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 +#define TLS_ECDHE_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 +#define TLS_ECDHE_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA +#define TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA +#define TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA +#define TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 +#define TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 +#define TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA +#define TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 +#define TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 +#define TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_ECDHE_RSA_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA +#define TLS_ECDHE_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA +#define TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA +#define TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA +#define TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 +#define TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 +#define TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA +#define TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 +#define TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 +#define TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_ECDH_ECDSA_WITH_NULL_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA +#define TLS_ECDH_ECDSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA +#define TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA +#define TLS_ECDH_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA +#define TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 +#define TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 +#define TLS_ECDH_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA +#define TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 +#define TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 +#define TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_ECDH_RSA_WITH_NULL_SHA MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA +#define TLS_ECDH_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA +#define TLS_EXT_ALPN MBEDTLS_TLS_EXT_ALPN +#define TLS_EXT_ENCRYPT_THEN_MAC MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC +#define TLS_EXT_EXTENDED_MASTER_SECRET MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET +#define TLS_EXT_MAX_FRAGMENT_LENGTH MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH +#define TLS_EXT_RENEGOTIATION_INFO MBEDTLS_TLS_EXT_RENEGOTIATION_INFO +#define TLS_EXT_SERVERNAME MBEDTLS_TLS_EXT_SERVERNAME +#define TLS_EXT_SERVERNAME_HOSTNAME MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME +#define TLS_EXT_SESSION_TICKET MBEDTLS_TLS_EXT_SESSION_TICKET +#define TLS_EXT_SIG_ALG MBEDTLS_TLS_EXT_SIG_ALG +#define TLS_EXT_SUPPORTED_ELLIPTIC_CURVES MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES +#define TLS_EXT_SUPPORTED_POINT_FORMATS MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS +#define TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT +#define TLS_EXT_TRUNCATED_HMAC MBEDTLS_TLS_EXT_TRUNCATED_HMAC +#define TLS_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA +#define TLS_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA +#define TLS_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 +#define TLS_PSK_WITH_AES_128_CCM MBEDTLS_TLS_PSK_WITH_AES_128_CCM +#define TLS_PSK_WITH_AES_128_CCM_8 MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8 +#define TLS_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 +#define TLS_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA +#define TLS_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 +#define TLS_PSK_WITH_AES_256_CCM MBEDTLS_TLS_PSK_WITH_AES_256_CCM +#define TLS_PSK_WITH_AES_256_CCM_8 MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8 +#define TLS_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 +#define TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_PSK_WITH_NULL_SHA MBEDTLS_TLS_PSK_WITH_NULL_SHA +#define TLS_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_PSK_WITH_NULL_SHA256 +#define TLS_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_PSK_WITH_NULL_SHA384 +#define TLS_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_PSK_WITH_RC4_128_SHA +#define TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA +#define TLS_RSA_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA +#define TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 +#define TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 +#define TLS_RSA_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA +#define TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 +#define TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 +#define TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 +#define TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_RSA_PSK_WITH_NULL_SHA MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA +#define TLS_RSA_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 +#define TLS_RSA_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 +#define TLS_RSA_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA +#define TLS_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA +#define TLS_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA +#define TLS_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 +#define TLS_RSA_WITH_AES_128_CCM MBEDTLS_TLS_RSA_WITH_AES_128_CCM +#define TLS_RSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8 +#define TLS_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 +#define TLS_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA +#define TLS_RSA_WITH_AES_256_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 +#define TLS_RSA_WITH_AES_256_CCM MBEDTLS_TLS_RSA_WITH_AES_256_CCM +#define TLS_RSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8 +#define TLS_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 +#define TLS_RSA_WITH_CAMELLIA_128_CBC_SHA MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA +#define TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 +#define TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 +#define TLS_RSA_WITH_CAMELLIA_256_CBC_SHA MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA +#define TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 +#define TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 +#define TLS_RSA_WITH_DES_CBC_SHA MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA +#define TLS_RSA_WITH_NULL_MD5 MBEDTLS_TLS_RSA_WITH_NULL_MD5 +#define TLS_RSA_WITH_NULL_SHA MBEDTLS_TLS_RSA_WITH_NULL_SHA +#define TLS_RSA_WITH_NULL_SHA256 MBEDTLS_TLS_RSA_WITH_NULL_SHA256 +#define TLS_RSA_WITH_RC4_128_MD5 MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 +#define TLS_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_RSA_WITH_RC4_128_SHA +#define UL64 MBEDTLS_UL64 +#define X509_CRT_VERSION_1 MBEDTLS_X509_CRT_VERSION_1 +#define X509_CRT_VERSION_2 MBEDTLS_X509_CRT_VERSION_2 +#define X509_CRT_VERSION_3 MBEDTLS_X509_CRT_VERSION_3 +#define X509_FORMAT_DER MBEDTLS_X509_FORMAT_DER +#define X509_FORMAT_PEM MBEDTLS_X509_FORMAT_PEM +#define X509_MAX_DN_NAME_SIZE MBEDTLS_X509_MAX_DN_NAME_SIZE +#define X509_RFC5280_MAX_SERIAL_LEN MBEDTLS_X509_RFC5280_MAX_SERIAL_LEN +#define X509_RFC5280_UTC_TIME_LEN MBEDTLS_X509_RFC5280_UTC_TIME_LEN +#define XTEA_DECRYPT MBEDTLS_XTEA_DECRYPT +#define XTEA_ENCRYPT MBEDTLS_XTEA_ENCRYPT +#define _asn1_bitstring mbedtls_asn1_bitstring +#define _asn1_buf mbedtls_asn1_buf +#define _asn1_named_data mbedtls_asn1_named_data +#define _asn1_sequence mbedtls_asn1_sequence +#define _ssl_cache_context mbedtls_ssl_cache_context +#define _ssl_cache_entry mbedtls_ssl_cache_entry +#define _ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t +#define _ssl_context mbedtls_ssl_context +#define _ssl_flight_item mbedtls_ssl_flight_item +#define _ssl_handshake_params mbedtls_ssl_handshake_params +#define _ssl_key_cert mbedtls_ssl_key_cert +#define _ssl_premaster_secret mbedtls_ssl_premaster_secret +#define _ssl_session mbedtls_ssl_session +#define _ssl_ticket_keys mbedtls_ssl_ticket_keys +#define _ssl_transform mbedtls_ssl_transform +#define _x509_crl mbedtls_x509_crl +#define _x509_crl_entry mbedtls_x509_crl_entry +#define _x509_crt mbedtls_x509_crt +#define _x509_csr mbedtls_x509_csr +#define _x509_time mbedtls_x509_time +#define _x509write_cert mbedtls_x509write_cert +#define _x509write_csr mbedtls_x509write_csr +#define aes_context mbedtls_aes_context +#define aes_crypt_cbc mbedtls_aes_crypt_cbc +#define aes_crypt_cfb128 mbedtls_aes_crypt_cfb128 +#define aes_crypt_cfb8 mbedtls_aes_crypt_cfb8 +#define aes_crypt_ctr mbedtls_aes_crypt_ctr +#define aes_crypt_ecb mbedtls_aes_crypt_ecb +#define aes_free mbedtls_aes_free +#define aes_init mbedtls_aes_init +#define aes_self_test mbedtls_aes_self_test +#define aes_setkey_dec mbedtls_aes_setkey_dec +#define aes_setkey_enc mbedtls_aes_setkey_enc +#define aesni_crypt_ecb mbedtls_aesni_crypt_ecb +#define aesni_gcm_mult mbedtls_aesni_gcm_mult +#define aesni_inverse_key mbedtls_aesni_inverse_key +#define aesni_setkey_enc mbedtls_aesni_setkey_enc +#define aesni_supports mbedtls_aesni_has_support +#define alarmed mbedtls_timing_alarmed +#define arc4_context mbedtls_arc4_context +#define arc4_crypt mbedtls_arc4_crypt +#define arc4_free mbedtls_arc4_free +#define arc4_init mbedtls_arc4_init +#define arc4_self_test mbedtls_arc4_self_test +#define arc4_setup mbedtls_arc4_setup +#define asn1_bitstring mbedtls_asn1_bitstring +#define asn1_buf mbedtls_asn1_buf +#define asn1_find_named_data mbedtls_asn1_find_named_data +#define asn1_free_named_data mbedtls_asn1_free_named_data +#define asn1_free_named_data_list mbedtls_asn1_free_named_data_list +#define asn1_get_alg mbedtls_asn1_get_alg +#define asn1_get_alg_null mbedtls_asn1_get_alg_null +#define asn1_get_bitstring mbedtls_asn1_get_bitstring +#define asn1_get_bitstring_null mbedtls_asn1_get_bitstring_null +#define asn1_get_bool mbedtls_asn1_get_bool +#define asn1_get_int mbedtls_asn1_get_int +#define asn1_get_len mbedtls_asn1_get_len +#define asn1_get_mpi mbedtls_asn1_get_mpi +#define asn1_get_sequence_of mbedtls_asn1_get_sequence_of +#define asn1_get_tag mbedtls_asn1_get_tag +#define asn1_named_data mbedtls_asn1_named_data +#define asn1_sequence mbedtls_asn1_sequence +#define asn1_store_named_data mbedtls_asn1_store_named_data +#define asn1_write_algorithm_identifier mbedtls_asn1_write_algorithm_identifier +#define asn1_write_bitstring mbedtls_asn1_write_bitstring +#define asn1_write_bool mbedtls_asn1_write_bool +#define asn1_write_ia5_string mbedtls_asn1_write_ia5_string +#define asn1_write_int mbedtls_asn1_write_int +#define asn1_write_len mbedtls_asn1_write_len +#define asn1_write_mpi mbedtls_asn1_write_mpi +#define asn1_write_null mbedtls_asn1_write_null +#define asn1_write_octet_string mbedtls_asn1_write_octet_string +#define asn1_write_oid mbedtls_asn1_write_oid +#define asn1_write_printable_string mbedtls_asn1_write_printable_string +#define asn1_write_raw_buffer mbedtls_asn1_write_raw_buffer +#define asn1_write_tag mbedtls_asn1_write_tag +#define base64_decode mbedtls_base64_decode +#define base64_encode mbedtls_base64_encode +#define base64_self_test mbedtls_base64_self_test +#define blowfish_context mbedtls_blowfish_context +#define blowfish_crypt_cbc mbedtls_blowfish_crypt_cbc +#define blowfish_crypt_cfb64 mbedtls_blowfish_crypt_cfb64 +#define blowfish_crypt_ctr mbedtls_blowfish_crypt_ctr +#define blowfish_crypt_ecb mbedtls_blowfish_crypt_ecb +#define blowfish_free mbedtls_blowfish_free +#define blowfish_init mbedtls_blowfish_init +#define blowfish_setkey mbedtls_blowfish_setkey +#define camellia_context mbedtls_camellia_context +#define camellia_crypt_cbc mbedtls_camellia_crypt_cbc +#define camellia_crypt_cfb128 mbedtls_camellia_crypt_cfb128 +#define camellia_crypt_ctr mbedtls_camellia_crypt_ctr +#define camellia_crypt_ecb mbedtls_camellia_crypt_ecb +#define camellia_free mbedtls_camellia_free +#define camellia_init mbedtls_camellia_init +#define camellia_self_test mbedtls_camellia_self_test +#define camellia_setkey_dec mbedtls_camellia_setkey_dec +#define camellia_setkey_enc mbedtls_camellia_setkey_enc +#define ccm_auth_decrypt mbedtls_ccm_auth_decrypt +#define ccm_context mbedtls_ccm_context +#define ccm_encrypt_and_tag mbedtls_ccm_encrypt_and_tag +#define ccm_free mbedtls_ccm_free +#define ccm_init mbedtls_ccm_init +#define ccm_self_test mbedtls_ccm_self_test +#define cipher_auth_decrypt mbedtls_cipher_auth_decrypt +#define cipher_auth_encrypt mbedtls_cipher_auth_encrypt +#define cipher_base_t mbedtls_cipher_base_t +#define cipher_check_tag mbedtls_cipher_check_tag +#define cipher_context_t mbedtls_cipher_context_t +#define cipher_crypt mbedtls_cipher_crypt +#define cipher_definition_t mbedtls_cipher_definition_t +#define cipher_definitions mbedtls_cipher_definitions +#define cipher_finish mbedtls_cipher_finish +#define cipher_free mbedtls_cipher_free +#define cipher_free_ctx mbedtls_cipher_free_ctx +#define cipher_get_block_size mbedtls_cipher_get_block_size +#define cipher_get_cipher_mode mbedtls_cipher_get_cipher_mode +#define cipher_get_iv_size mbedtls_cipher_get_iv_size +#define cipher_get_key_size mbedtls_cipher_get_key_bitlen +#define cipher_get_name mbedtls_cipher_get_name +#define cipher_get_operation mbedtls_cipher_get_operation +#define cipher_get_type mbedtls_cipher_get_type +#define cipher_id_t mbedtls_cipher_id_t +#define cipher_info_from_string mbedtls_cipher_info_from_string +#define cipher_info_from_type mbedtls_cipher_info_from_type +#define cipher_info_from_values mbedtls_cipher_info_from_values +#define cipher_info_t mbedtls_cipher_info_t +#define cipher_init mbedtls_cipher_init +#define cipher_init_ctx mbedtls_cipher_setup +#define cipher_list mbedtls_cipher_list +#define cipher_mode_t mbedtls_cipher_mode_t +#define cipher_padding_t mbedtls_cipher_padding_t +#define cipher_reset mbedtls_cipher_reset +#define cipher_self_test mbedtls_cipher_self_test +#define cipher_set_iv mbedtls_cipher_set_iv +#define cipher_set_padding_mode mbedtls_cipher_set_padding_mode +#define cipher_setkey mbedtls_cipher_setkey +#define cipher_type_t mbedtls_cipher_type_t +#define cipher_update mbedtls_cipher_update +#define cipher_update_ad mbedtls_cipher_update_ad +#define cipher_write_tag mbedtls_cipher_write_tag +#define ctr_drbg_context mbedtls_ctr_drbg_context +#define ctr_drbg_free mbedtls_ctr_drbg_free +#define ctr_drbg_init mbedtls_ctr_drbg_init +#define ctr_drbg_init_entropy_len mbedtls_ctr_drbg_init_entropy_len +#define ctr_drbg_random mbedtls_ctr_drbg_random +#define ctr_drbg_random_with_add mbedtls_ctr_drbg_random_with_add +#define ctr_drbg_reseed mbedtls_ctr_drbg_reseed +#define ctr_drbg_self_test mbedtls_ctr_drbg_self_test +#define ctr_drbg_set_entropy_len mbedtls_ctr_drbg_set_entropy_len +#define ctr_drbg_set_prediction_resistance mbedtls_ctr_drbg_set_prediction_resistance +#define ctr_drbg_set_reseed_interval mbedtls_ctr_drbg_set_reseed_interval +#define ctr_drbg_update mbedtls_ctr_drbg_update +#define ctr_drbg_update_seed_file mbedtls_ctr_drbg_update_seed_file +#define ctr_drbg_write_seed_file mbedtls_ctr_drbg_write_seed_file +#define debug_fmt mbedtls_debug_fmt +#define debug_print_buf mbedtls_debug_print_buf +#define debug_print_crt mbedtls_debug_print_crt +#define debug_print_ecp mbedtls_debug_print_ecp +#define debug_print_mpi mbedtls_debug_print_mpi +#define debug_print_msg mbedtls_debug_print_msg +#define debug_print_ret mbedtls_debug_print_ret +#define debug_set_log_mode mbedtls_debug_set_log_mode +#define debug_set_threshold mbedtls_debug_set_threshold +#define des3_context mbedtls_des3_context +#define des3_crypt_cbc mbedtls_des3_crypt_cbc +#define des3_crypt_ecb mbedtls_des3_crypt_ecb +#define des3_free mbedtls_des3_free +#define des3_init mbedtls_des3_init +#define des3_set2key_dec mbedtls_des3_set2key_dec +#define des3_set2key_enc mbedtls_des3_set2key_enc +#define des3_set3key_dec mbedtls_des3_set3key_dec +#define des3_set3key_enc mbedtls_des3_set3key_enc +#define des_context mbedtls_des_context +#define des_crypt_cbc mbedtls_des_crypt_cbc +#define des_crypt_ecb mbedtls_des_crypt_ecb +#define des_free mbedtls_des_free +#define des_init mbedtls_des_init +#define des_key_check_key_parity mbedtls_des_key_check_key_parity +#define des_key_check_weak mbedtls_des_key_check_weak +#define des_key_set_parity mbedtls_des_key_set_parity +#define des_self_test mbedtls_des_self_test +#define des_setkey_dec mbedtls_des_setkey_dec +#define des_setkey_enc mbedtls_des_setkey_enc +#define dhm_calc_secret mbedtls_dhm_calc_secret +#define dhm_context mbedtls_dhm_context +#define dhm_free mbedtls_dhm_free +#define dhm_init mbedtls_dhm_init +#define dhm_make_params mbedtls_dhm_make_params +#define dhm_make_public mbedtls_dhm_make_public +#define dhm_parse_dhm mbedtls_dhm_parse_dhm +#define dhm_parse_dhmfile mbedtls_dhm_parse_dhmfile +#define dhm_read_params mbedtls_dhm_read_params +#define dhm_read_public mbedtls_dhm_read_public +#define dhm_self_test mbedtls_dhm_self_test +#define ecdh_calc_secret mbedtls_ecdh_calc_secret +#define ecdh_compute_shared mbedtls_ecdh_compute_shared +#define ecdh_context mbedtls_ecdh_context +#define ecdh_free mbedtls_ecdh_free +#define ecdh_gen_public mbedtls_ecdh_gen_public +#define ecdh_get_params mbedtls_ecdh_get_params +#define ecdh_init mbedtls_ecdh_init +#define ecdh_make_params mbedtls_ecdh_make_params +#define ecdh_make_public mbedtls_ecdh_make_public +#define ecdh_read_params mbedtls_ecdh_read_params +#define ecdh_read_public mbedtls_ecdh_read_public +#define ecdh_self_test mbedtls_ecdh_self_test +#define ecdh_side mbedtls_ecdh_side +#define ecdsa_context mbedtls_ecdsa_context +#define ecdsa_free mbedtls_ecdsa_free +#define ecdsa_from_keypair mbedtls_ecdsa_from_keypair +#define ecdsa_genkey mbedtls_ecdsa_genkey +#define ecdsa_info mbedtls_ecdsa_info +#define ecdsa_init mbedtls_ecdsa_init +#define ecdsa_read_signature mbedtls_ecdsa_read_signature +#define ecdsa_self_test mbedtls_ecdsa_self_test +#define ecdsa_sign mbedtls_ecdsa_sign +#define ecdsa_sign_det mbedtls_ecdsa_sign_det +#define ecdsa_verify mbedtls_ecdsa_verify +#define ecdsa_write_signature mbedtls_ecdsa_write_signature +#define ecdsa_write_signature_det mbedtls_ecdsa_write_signature_det +#define eckey_info mbedtls_eckey_info +#define eckeydh_info mbedtls_eckeydh_info +#define ecp_add mbedtls_ecp_add +#define ecp_check_privkey mbedtls_ecp_check_privkey +#define ecp_check_pub_priv mbedtls_ecp_check_pub_priv +#define ecp_check_pubkey mbedtls_ecp_check_pubkey +#define ecp_copy mbedtls_ecp_copy +#define ecp_curve_info mbedtls_ecp_curve_info +#define ecp_curve_info_from_grp_id mbedtls_ecp_curve_info_from_grp_id +#define ecp_curve_info_from_name mbedtls_ecp_curve_info_from_name +#define ecp_curve_info_from_tls_id mbedtls_ecp_curve_info_from_tls_id +#define ecp_curve_list mbedtls_ecp_curve_list +#define ecp_gen_key mbedtls_ecp_gen_key +#define ecp_gen_keypair mbedtls_ecp_gen_keypair +#define ecp_group mbedtls_ecp_group +#define ecp_group_copy mbedtls_ecp_group_copy +#define ecp_group_free mbedtls_ecp_group_free +#define ecp_group_id mbedtls_ecp_group_id +#define ecp_group_init mbedtls_ecp_group_init +#define ecp_group_read_string mbedtls_ecp_group_read_string +#define ecp_grp_id_list mbedtls_ecp_grp_id_list +#define ecp_is_zero mbedtls_ecp_is_zero +#define ecp_keypair mbedtls_ecp_keypair +#define ecp_keypair_free mbedtls_ecp_keypair_free +#define ecp_keypair_init mbedtls_ecp_keypair_init +#define ecp_mul mbedtls_ecp_mul +#define ecp_point mbedtls_ecp_point +#define ecp_point_free mbedtls_ecp_point_free +#define ecp_point_init mbedtls_ecp_point_init +#define ecp_point_read_binary mbedtls_ecp_point_read_binary +#define ecp_point_read_string mbedtls_ecp_point_read_string +#define ecp_point_write_binary mbedtls_ecp_point_write_binary +#define ecp_self_test mbedtls_ecp_self_test +#define ecp_set_zero mbedtls_ecp_set_zero +#define ecp_sub mbedtls_ecp_sub +#define ecp_tls_read_group mbedtls_ecp_tls_read_group +#define ecp_tls_read_point mbedtls_ecp_tls_read_point +#define ecp_tls_write_group mbedtls_ecp_tls_write_group +#define ecp_tls_write_point mbedtls_ecp_tls_write_point +#define ecp_use_known_dp mbedtls_ecp_group_load +#define entropy_add_source mbedtls_entropy_add_source +#define entropy_context mbedtls_entropy_context +#define entropy_free mbedtls_entropy_free +#define entropy_func mbedtls_entropy_func +#define entropy_gather mbedtls_entropy_gather +#define entropy_init mbedtls_entropy_init +#define entropy_self_test mbedtls_entropy_self_test +#define entropy_update_manual mbedtls_entropy_update_manual +#define entropy_update_seed_file mbedtls_entropy_update_seed_file +#define entropy_write_seed_file mbedtls_entropy_write_seed_file +#define error_strerror mbedtls_strerror +#define f_source_ptr mbedtls_entropy_f_source_ptr +#define gcm_auth_decrypt mbedtls_gcm_auth_decrypt +#define gcm_context mbedtls_gcm_context +#define gcm_crypt_and_tag mbedtls_gcm_crypt_and_tag +#define gcm_finish mbedtls_gcm_finish +#define gcm_free mbedtls_gcm_free +#define gcm_init mbedtls_gcm_init +#define gcm_self_test mbedtls_gcm_self_test +#define gcm_starts mbedtls_gcm_starts +#define gcm_update mbedtls_gcm_update +#define get_timer mbedtls_timing_get_timer +#define hardclock mbedtls_timing_hardclock +#define hardclock_poll mbedtls_hardclock_poll +#define havege_free mbedtls_havege_free +#define havege_init mbedtls_havege_init +#define havege_poll mbedtls_havege_poll +#define havege_random mbedtls_havege_random +#define havege_state mbedtls_havege_state +#define hmac_drbg_context mbedtls_hmac_drbg_context +#define hmac_drbg_free mbedtls_hmac_drbg_free +#define hmac_drbg_init mbedtls_hmac_drbg_init +#define hmac_drbg_init_buf mbedtls_hmac_drbg_init_buf +#define hmac_drbg_random mbedtls_hmac_drbg_random +#define hmac_drbg_random_with_add mbedtls_hmac_drbg_random_with_add +#define hmac_drbg_reseed mbedtls_hmac_drbg_reseed +#define hmac_drbg_self_test mbedtls_hmac_drbg_self_test +#define hmac_drbg_set_entropy_len mbedtls_hmac_drbg_set_entropy_len +#define hmac_drbg_set_prediction_resistance mbedtls_hmac_drbg_set_prediction_resistance +#define hmac_drbg_set_reseed_interval mbedtls_hmac_drbg_set_reseed_interval +#define hmac_drbg_update mbedtls_hmac_drbg_update +#define hmac_drbg_update_seed_file mbedtls_hmac_drbg_update_seed_file +#define hmac_drbg_write_seed_file mbedtls_hmac_drbg_write_seed_file +#define hr_time mbedtls_timing_hr_time +#define key_exchange_type_t mbedtls_key_exchange_type_t +#define md mbedtls_md +#define md2 mbedtls_md2 +#define md2_context mbedtls_md2_context +#define md2_file mbedtls_md2_file +#define md2_finish mbedtls_md2_finish +#define md2_free mbedtls_md2_free +#define md2_hmac mbedtls_md2_hmac +#define md2_hmac_finish mbedtls_md2_hmac_finish +#define md2_hmac_reset mbedtls_md2_hmac_reset +#define md2_hmac_starts mbedtls_md2_hmac_starts +#define md2_hmac_update mbedtls_md2_hmac_update +#define md2_info mbedtls_md2_info +#define md2_init mbedtls_md2_init +#define md2_process mbedtls_md2_process +#define md2_self_test mbedtls_md2_self_test +#define md2_starts mbedtls_md2_starts +#define md2_update mbedtls_md2_update +#define md4 mbedtls_md4 +#define md4_context mbedtls_md4_context +#define md4_file mbedtls_md4_file +#define md4_finish mbedtls_md4_finish +#define md4_free mbedtls_md4_free +#define md4_hmac mbedtls_md4_hmac +#define md4_hmac_finish mbedtls_md4_hmac_finish +#define md4_hmac_reset mbedtls_md4_hmac_reset +#define md4_hmac_starts mbedtls_md4_hmac_starts +#define md4_hmac_update mbedtls_md4_hmac_update +#define md4_info mbedtls_md4_info +#define md4_init mbedtls_md4_init +#define md4_process mbedtls_md4_process +#define md4_self_test mbedtls_md4_self_test +#define md4_starts mbedtls_md4_starts +#define md4_update mbedtls_md4_update +#define md5 mbedtls_md5 +#define md5_context mbedtls_md5_context +#define md5_file mbedtls_md5_file +#define md5_finish mbedtls_md5_finish +#define md5_free mbedtls_md5_free +#define md5_hmac mbedtls_md5_hmac +#define md5_hmac_finish mbedtls_md5_hmac_finish +#define md5_hmac_reset mbedtls_md5_hmac_reset +#define md5_hmac_starts mbedtls_md5_hmac_starts +#define md5_hmac_update mbedtls_md5_hmac_update +#define md5_info mbedtls_md5_info +#define md5_init mbedtls_md5_init +#define md5_process mbedtls_md5_process +#define md5_self_test mbedtls_md5_self_test +#define md5_starts mbedtls_md5_starts +#define md5_update mbedtls_md5_update +#define md_context_t mbedtls_md_context_t +#define md_file mbedtls_md_file +#define md_finish mbedtls_md_finish +#define md_free mbedtls_md_free +#define md_free_ctx mbedtls_md_free_ctx +#define md_get_name mbedtls_md_get_name +#define md_get_size mbedtls_md_get_size +#define md_get_type mbedtls_md_get_type +#define md_hmac mbedtls_md_hmac +#define md_hmac_finish mbedtls_md_hmac_finish +#define md_hmac_reset mbedtls_md_hmac_reset +#define md_hmac_starts mbedtls_md_hmac_starts +#define md_hmac_update mbedtls_md_hmac_update +#define md_info_from_string mbedtls_md_info_from_string +#define md_info_from_type mbedtls_md_info_from_type +#define md_info_t mbedtls_md_info_t +#define md_init mbedtls_md_init +#define md_init_ctx mbedtls_md_init_ctx +#define md_list mbedtls_md_list +#define md_process mbedtls_md_process +#define md_starts mbedtls_md_starts +#define md_type_t mbedtls_md_type_t +#define md_update mbedtls_md_update +#define memory_buffer_alloc_cur_get mbedtls_memory_buffer_alloc_cur_get +#define memory_buffer_alloc_free mbedtls_memory_buffer_alloc_free +#define memory_buffer_alloc_init mbedtls_memory_buffer_alloc_init +#define memory_buffer_alloc_max_get mbedtls_memory_buffer_alloc_max_get +#define memory_buffer_alloc_max_reset mbedtls_memory_buffer_alloc_max_reset +#define memory_buffer_alloc_self_test mbedtls_memory_buffer_alloc_self_test +#define memory_buffer_alloc_status mbedtls_memory_buffer_alloc_status +#define memory_buffer_alloc_verify mbedtls_memory_buffer_alloc_verify +#define memory_buffer_set_verify mbedtls_memory_buffer_set_verify +#define memory_set_own mbedtls_memory_set_own +#define mpi mbedtls_mpi +#define mpi_add_abs mbedtls_mpi_add_abs +#define mpi_add_int mbedtls_mpi_add_int +#define mpi_add_mpi mbedtls_mpi_add_mpi +#define mpi_cmp_abs mbedtls_mpi_cmp_abs +#define mpi_cmp_int mbedtls_mpi_cmp_int +#define mpi_cmp_mpi mbedtls_mpi_cmp_mpi +#define mpi_copy mbedtls_mpi_copy +#define mpi_div_int mbedtls_mpi_div_int +#define mpi_div_mpi mbedtls_mpi_div_mpi +#define mpi_exp_mod mbedtls_mpi_exp_mod +#define mpi_fill_random mbedtls_mpi_fill_random +#define mpi_free mbedtls_mpi_free +#define mpi_gcd mbedtls_mpi_gcd +#define mpi_gen_prime mbedtls_mpi_gen_prime +#define mpi_get_bit mbedtls_mpi_get_bit +#define mpi_grow mbedtls_mpi_grow +#define mpi_init mbedtls_mpi_init +#define mpi_inv_mod mbedtls_mpi_inv_mod +#define mpi_is_prime mbedtls_mpi_is_prime +#define mpi_lsb mbedtls_mpi_lsb +#define mpi_lset mbedtls_mpi_lset +#define mpi_mod_int mbedtls_mpi_mod_int +#define mpi_mod_mpi mbedtls_mpi_mod_mpi +#define mpi_msb mbedtls_mpi_bitlen +#define mpi_mul_int mbedtls_mpi_mul_int +#define mpi_mul_mpi mbedtls_mpi_mul_mpi +#define mpi_read_binary mbedtls_mpi_read_binary +#define mpi_read_file mbedtls_mpi_read_file +#define mpi_read_string mbedtls_mpi_read_string +#define mpi_safe_cond_assign mbedtls_mpi_safe_cond_assign +#define mpi_safe_cond_swap mbedtls_mpi_safe_cond_swap +#define mpi_self_test mbedtls_mpi_self_test +#define mpi_set_bit mbedtls_mpi_set_bit +#define mpi_shift_l mbedtls_mpi_shift_l +#define mpi_shift_r mbedtls_mpi_shift_r +#define mpi_shrink mbedtls_mpi_shrink +#define mpi_size mbedtls_mpi_size +#define mpi_sub_abs mbedtls_mpi_sub_abs +#define mpi_sub_int mbedtls_mpi_sub_int +#define mpi_sub_mpi mbedtls_mpi_sub_mpi +#define mpi_swap mbedtls_mpi_swap +#define mpi_write_binary mbedtls_mpi_write_binary +#define mpi_write_file mbedtls_mpi_write_file +#define mpi_write_string mbedtls_mpi_write_string +#define net_accept mbedtls_net_accept +#define net_bind mbedtls_net_bind +#define net_close mbedtls_net_free +#define net_connect mbedtls_net_connect +#define net_recv mbedtls_net_recv +#define net_recv_timeout mbedtls_net_recv_timeout +#define net_send mbedtls_net_send +#define net_set_block mbedtls_net_set_block +#define net_set_nonblock mbedtls_net_set_nonblock +#define net_usleep mbedtls_net_usleep +#define oid_descriptor_t mbedtls_oid_descriptor_t +#define oid_get_attr_short_name mbedtls_oid_get_attr_short_name +#define oid_get_cipher_alg mbedtls_oid_get_cipher_alg +#define oid_get_ec_grp mbedtls_oid_get_ec_grp +#define oid_get_extended_key_usage mbedtls_oid_get_extended_key_usage +#define oid_get_md_alg mbedtls_oid_get_md_alg +#define oid_get_numeric_string mbedtls_oid_get_numeric_string +#define oid_get_oid_by_ec_grp mbedtls_oid_get_oid_by_ec_grp +#define oid_get_oid_by_md mbedtls_oid_get_oid_by_md +#define oid_get_oid_by_pk_alg mbedtls_oid_get_oid_by_pk_alg +#define oid_get_oid_by_sig_alg mbedtls_oid_get_oid_by_sig_alg +#define oid_get_pk_alg mbedtls_oid_get_pk_alg +#define oid_get_pkcs12_pbe_alg mbedtls_oid_get_pkcs12_pbe_alg +#define oid_get_sig_alg mbedtls_oid_get_sig_alg +#define oid_get_sig_alg_desc mbedtls_oid_get_sig_alg_desc +#define oid_get_x509_ext_type mbedtls_oid_get_x509_ext_type +#define operation_t mbedtls_operation_t +#define padlock_supports mbedtls_padlock_has_support +#define padlock_xcryptcbc mbedtls_padlock_xcryptcbc +#define padlock_xcryptecb mbedtls_padlock_xcryptecb +#define pbkdf2_hmac mbedtls_pbkdf2_hmac +#define pbkdf2_self_test mbedtls_pbkdf2_self_test +#define pem_context mbedtls_pem_context +#define pem_free mbedtls_pem_free +#define pem_init mbedtls_pem_init +#define pem_read_buffer mbedtls_pem_read_buffer +#define pem_write_buffer mbedtls_pem_write_buffer +#define pk_can_do mbedtls_pk_can_do +#define pk_check_pair mbedtls_pk_check_pair +#define pk_context mbedtls_pk_context +#define pk_debug mbedtls_pk_debug +#define pk_debug_item mbedtls_pk_debug_item +#define pk_debug_type mbedtls_pk_debug_type +#define pk_decrypt mbedtls_pk_decrypt +#define pk_ec mbedtls_pk_ec +#define pk_encrypt mbedtls_pk_encrypt +#define pk_free mbedtls_pk_free +#define pk_get_len mbedtls_pk_get_len +#define pk_get_name mbedtls_pk_get_name +#define pk_get_size mbedtls_pk_get_bitlen +#define pk_get_type mbedtls_pk_get_type +#define pk_info_from_type mbedtls_pk_info_from_type +#define pk_info_t mbedtls_pk_info_t +#define pk_init mbedtls_pk_init +#define pk_init_ctx mbedtls_pk_setup +#define pk_init_ctx_rsa_alt mbedtls_pk_setup_rsa_alt +#define pk_load_file mbedtls_pk_load_file +#define pk_parse_key mbedtls_pk_parse_key +#define pk_parse_keyfile mbedtls_pk_parse_keyfile +#define pk_parse_public_key mbedtls_pk_parse_public_key +#define pk_parse_public_keyfile mbedtls_pk_parse_public_keyfile +#define pk_parse_subpubkey mbedtls_pk_parse_subpubkey +#define pk_rsa mbedtls_pk_rsa +#define pk_rsa_alt_decrypt_func mbedtls_pk_rsa_alt_decrypt_func +#define pk_rsa_alt_key_len_func mbedtls_pk_rsa_alt_key_len_func +#define pk_rsa_alt_sign_func mbedtls_pk_rsa_alt_sign_func +#define pk_rsassa_pss_options mbedtls_pk_rsassa_pss_options +#define pk_sign mbedtls_pk_sign +#define pk_type_t mbedtls_pk_type_t +#define pk_verify mbedtls_pk_verify +#define pk_verify_ext mbedtls_pk_verify_ext +#define pk_write_key_der mbedtls_pk_write_key_der +#define pk_write_key_pem mbedtls_pk_write_key_pem +#define pk_write_pubkey mbedtls_pk_write_pubkey +#define pk_write_pubkey_der mbedtls_pk_write_pubkey_der +#define pk_write_pubkey_pem mbedtls_pk_write_pubkey_pem +#define pkcs11_context mbedtls_pkcs11_context +#define pkcs11_decrypt mbedtls_pkcs11_decrypt +#define pkcs11_priv_key_free mbedtls_pkcs11_priv_key_free +#define pkcs11_priv_key_init mbedtls_pkcs11_priv_key_bind +#define pkcs11_sign mbedtls_pkcs11_sign +#define pkcs11_x509_cert_init mbedtls_pkcs11_x509_cert_bind +#define pkcs12_derivation mbedtls_pkcs12_derivation +#define pkcs12_pbe mbedtls_pkcs12_pbe +#define pkcs12_pbe_sha1_rc4_128 mbedtls_pkcs12_pbe_sha1_rc4_128 +#define pkcs5_pbes2 mbedtls_pkcs5_pbes2 +#define pkcs5_pbkdf2_hmac mbedtls_pkcs5_pbkdf2_hmac +#define pkcs5_self_test mbedtls_pkcs5_self_test +#define platform_entropy_poll mbedtls_platform_entropy_poll +#define platform_set_exit mbedtls_platform_set_exit +#define platform_set_fprintf mbedtls_platform_set_fprintf +#define platform_set_malloc_free mbedtls_platform_set_malloc_free +#define platform_set_printf mbedtls_platform_set_printf +#define platform_set_snprintf mbedtls_platform_set_snprintf +#define polarssl_exit mbedtls_exit +#define polarssl_fprintf mbedtls_fprintf +#define polarssl_free mbedtls_free +#define polarssl_malloc mbedtls_malloc +#define polarssl_mutex_free mbedtls_mutex_free +#define polarssl_mutex_init mbedtls_mutex_init +#define polarssl_mutex_lock mbedtls_mutex_lock +#define polarssl_mutex_unlock mbedtls_mutex_unlock +#define polarssl_printf mbedtls_printf +#define polarssl_snprintf mbedtls_snprintf +#define polarssl_strerror mbedtls_strerror +#define ripemd160 mbedtls_ripemd160 +#define ripemd160_context mbedtls_ripemd160_context +#define ripemd160_file mbedtls_ripemd160_file +#define ripemd160_finish mbedtls_ripemd160_finish +#define ripemd160_free mbedtls_ripemd160_free +#define ripemd160_hmac mbedtls_ripemd160_hmac +#define ripemd160_hmac_finish mbedtls_ripemd160_hmac_finish +#define ripemd160_hmac_reset mbedtls_ripemd160_hmac_reset +#define ripemd160_hmac_starts mbedtls_ripemd160_hmac_starts +#define ripemd160_hmac_update mbedtls_ripemd160_hmac_update +#define ripemd160_info mbedtls_ripemd160_info +#define ripemd160_init mbedtls_ripemd160_init +#define ripemd160_process mbedtls_ripemd160_process +#define ripemd160_self_test mbedtls_ripemd160_self_test +#define ripemd160_starts mbedtls_ripemd160_starts +#define ripemd160_update mbedtls_ripemd160_update +#define rsa_alt_context mbedtls_rsa_alt_context +#define rsa_alt_info mbedtls_rsa_alt_info +#define rsa_check_privkey mbedtls_rsa_check_privkey +#define rsa_check_pub_priv mbedtls_rsa_check_pub_priv +#define rsa_check_pubkey mbedtls_rsa_check_pubkey +#define rsa_context mbedtls_rsa_context +#define rsa_copy mbedtls_rsa_copy +#define rsa_decrypt_func mbedtls_rsa_decrypt_func +#define rsa_free mbedtls_rsa_free +#define rsa_gen_key mbedtls_rsa_gen_key +#define rsa_info mbedtls_rsa_info +#define rsa_init mbedtls_rsa_init +#define rsa_key_len_func mbedtls_rsa_key_len_func +#define rsa_pkcs1_decrypt mbedtls_rsa_pkcs1_decrypt +#define rsa_pkcs1_encrypt mbedtls_rsa_pkcs1_encrypt +#define rsa_pkcs1_sign mbedtls_rsa_pkcs1_sign +#define rsa_pkcs1_verify mbedtls_rsa_pkcs1_verify +#define rsa_private mbedtls_rsa_private +#define rsa_public mbedtls_rsa_public +#define rsa_rsaes_oaep_decrypt mbedtls_rsa_rsaes_oaep_decrypt +#define rsa_rsaes_oaep_encrypt mbedtls_rsa_rsaes_oaep_encrypt +#define rsa_rsaes_pkcs1_v15_decrypt mbedtls_rsa_rsaes_pkcs1_v15_decrypt +#define rsa_rsaes_pkcs1_v15_encrypt mbedtls_rsa_rsaes_pkcs1_v15_encrypt +#define rsa_rsassa_pkcs1_v15_sign mbedtls_rsa_rsassa_pkcs1_v15_sign +#define rsa_rsassa_pkcs1_v15_verify mbedtls_rsa_rsassa_pkcs1_v15_verify +#define rsa_rsassa_pss_sign mbedtls_rsa_rsassa_pss_sign +#define rsa_rsassa_pss_verify mbedtls_rsa_rsassa_pss_verify +#define rsa_rsassa_pss_verify_ext mbedtls_rsa_rsassa_pss_verify_ext +#define rsa_self_test mbedtls_rsa_self_test +#define rsa_set_padding mbedtls_rsa_set_padding +#define rsa_sign_func mbedtls_rsa_sign_func +#define safer_memcmp mbedtls_ssl_safer_memcmp +#define set_alarm mbedtls_set_alarm +#define sha1 mbedtls_sha1 +#define sha1_context mbedtls_sha1_context +#define sha1_file mbedtls_sha1_file +#define sha1_finish mbedtls_sha1_finish +#define sha1_free mbedtls_sha1_free +#define sha1_hmac mbedtls_sha1_hmac +#define sha1_hmac_finish mbedtls_sha1_hmac_finish +#define sha1_hmac_reset mbedtls_sha1_hmac_reset +#define sha1_hmac_starts mbedtls_sha1_hmac_starts +#define sha1_hmac_update mbedtls_sha1_hmac_update +#define sha1_info mbedtls_sha1_info +#define sha1_init mbedtls_sha1_init +#define sha1_process mbedtls_sha1_process +#define sha1_self_test mbedtls_sha1_self_test +#define sha1_starts mbedtls_sha1_starts +#define sha1_update mbedtls_sha1_update +#define sha224_info mbedtls_sha224_info +#define sha256 mbedtls_sha256 +#define sha256_context mbedtls_sha256_context +#define sha256_file mbedtls_sha256_file +#define sha256_finish mbedtls_sha256_finish +#define sha256_free mbedtls_sha256_free +#define sha256_hmac mbedtls_sha256_hmac +#define sha256_hmac_finish mbedtls_sha256_hmac_finish +#define sha256_hmac_reset mbedtls_sha256_hmac_reset +#define sha256_hmac_starts mbedtls_sha256_hmac_starts +#define sha256_hmac_update mbedtls_sha256_hmac_update +#define sha256_info mbedtls_sha256_info +#define sha256_init mbedtls_sha256_init +#define sha256_process mbedtls_sha256_process +#define sha256_self_test mbedtls_sha256_self_test +#define sha256_starts mbedtls_sha256_starts +#define sha256_update mbedtls_sha256_update +#define sha384_info mbedtls_sha384_info +#define sha512 mbedtls_sha512 +#define sha512_context mbedtls_sha512_context +#define sha512_file mbedtls_sha512_file +#define sha512_finish mbedtls_sha512_finish +#define sha512_free mbedtls_sha512_free +#define sha512_hmac mbedtls_sha512_hmac +#define sha512_hmac_finish mbedtls_sha512_hmac_finish +#define sha512_hmac_reset mbedtls_sha512_hmac_reset +#define sha512_hmac_starts mbedtls_sha512_hmac_starts +#define sha512_hmac_update mbedtls_sha512_hmac_update +#define sha512_info mbedtls_sha512_info +#define sha512_init mbedtls_sha512_init +#define sha512_process mbedtls_sha512_process +#define sha512_self_test mbedtls_sha512_self_test +#define sha512_starts mbedtls_sha512_starts +#define sha512_update mbedtls_sha512_update +#define source_state mbedtls_entropy_source_state +#define ssl_cache_context mbedtls_ssl_cache_context +#define ssl_cache_entry mbedtls_ssl_cache_entry +#define ssl_cache_free mbedtls_ssl_cache_free +#define ssl_cache_get mbedtls_ssl_cache_get +#define ssl_cache_init mbedtls_ssl_cache_init +#define ssl_cache_set mbedtls_ssl_cache_set +#define ssl_cache_set_max_entries mbedtls_ssl_cache_set_max_entries +#define ssl_cache_set_timeout mbedtls_ssl_cache_set_timeout +#define ssl_check_cert_usage mbedtls_ssl_check_cert_usage +#define ssl_ciphersuite_from_id mbedtls_ssl_ciphersuite_from_id +#define ssl_ciphersuite_from_string mbedtls_ssl_ciphersuite_from_string +#define ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t +#define ssl_ciphersuite_uses_ec mbedtls_ssl_ciphersuite_uses_ec +#define ssl_ciphersuite_uses_psk mbedtls_ssl_ciphersuite_uses_psk +#define ssl_close_notify mbedtls_ssl_close_notify +#define ssl_context mbedtls_ssl_context +#define ssl_cookie_check mbedtls_ssl_cookie_check +#define ssl_cookie_check_t mbedtls_ssl_cookie_check_t +#define ssl_cookie_ctx mbedtls_ssl_cookie_ctx +#define ssl_cookie_free mbedtls_ssl_cookie_free +#define ssl_cookie_init mbedtls_ssl_cookie_init +#define ssl_cookie_set_timeout mbedtls_ssl_cookie_set_timeout +#define ssl_cookie_setup mbedtls_ssl_cookie_setup +#define ssl_cookie_write mbedtls_ssl_cookie_write +#define ssl_cookie_write_t mbedtls_ssl_cookie_write_t +#define ssl_curve_is_acceptable mbedtls_ssl_curve_is_acceptable +#define ssl_derive_keys mbedtls_ssl_derive_keys +#define ssl_dtls_replay_check mbedtls_ssl_dtls_replay_check +#define ssl_dtls_replay_update mbedtls_ssl_dtls_replay_update +#define ssl_fetch_input mbedtls_ssl_fetch_input +#define ssl_flight_item mbedtls_ssl_flight_item +#define ssl_flush_output mbedtls_ssl_flush_output +#define ssl_free mbedtls_ssl_free +#define ssl_get_alpn_protocol mbedtls_ssl_get_alpn_protocol +#define ssl_get_bytes_avail mbedtls_ssl_get_bytes_avail +#define ssl_get_ciphersuite mbedtls_ssl_get_ciphersuite +#define ssl_get_ciphersuite_id mbedtls_ssl_get_ciphersuite_id +#define ssl_get_ciphersuite_name mbedtls_ssl_get_ciphersuite_name +#define ssl_get_ciphersuite_sig_pk_alg mbedtls_ssl_get_ciphersuite_sig_pk_alg +#define ssl_get_peer_cert mbedtls_ssl_get_peer_cert +#define ssl_get_record_expansion mbedtls_ssl_get_record_expansion +#define ssl_get_session mbedtls_ssl_get_session +#define ssl_get_verify_result mbedtls_ssl_get_verify_result +#define ssl_get_version mbedtls_ssl_get_version +#define ssl_handshake mbedtls_ssl_handshake +#define ssl_handshake_client_step mbedtls_ssl_handshake_client_step +#define ssl_handshake_free mbedtls_ssl_handshake_free +#define ssl_handshake_params mbedtls_ssl_handshake_params +#define ssl_handshake_server_step mbedtls_ssl_handshake_server_step +#define ssl_handshake_step mbedtls_ssl_handshake_step +#define ssl_handshake_wrapup mbedtls_ssl_handshake_wrapup +#define ssl_hdr_len mbedtls_ssl_hdr_len +#define ssl_hs_hdr_len mbedtls_ssl_hs_hdr_len +#define ssl_hw_record_activate mbedtls_ssl_hw_record_activate +#define ssl_hw_record_finish mbedtls_ssl_hw_record_finish +#define ssl_hw_record_init mbedtls_ssl_hw_record_init +#define ssl_hw_record_read mbedtls_ssl_hw_record_read +#define ssl_hw_record_reset mbedtls_ssl_hw_record_reset +#define ssl_hw_record_write mbedtls_ssl_hw_record_write +#define ssl_init mbedtls_ssl_init +#define ssl_key_cert mbedtls_ssl_key_cert +#define ssl_legacy_renegotiation mbedtls_ssl_conf_legacy_renegotiation +#define ssl_list_ciphersuites mbedtls_ssl_list_ciphersuites +#define ssl_md_alg_from_hash mbedtls_ssl_md_alg_from_hash +#define ssl_optimize_checksum mbedtls_ssl_optimize_checksum +#define ssl_own_cert mbedtls_ssl_own_cert +#define ssl_own_key mbedtls_ssl_own_key +#define ssl_parse_certificate mbedtls_ssl_parse_certificate +#define ssl_parse_change_cipher_spec mbedtls_ssl_parse_change_cipher_spec +#define ssl_parse_finished mbedtls_ssl_parse_finished +#define ssl_pk_alg_from_sig mbedtls_ssl_pk_alg_from_sig +#define ssl_pkcs11_decrypt mbedtls_ssl_pkcs11_decrypt +#define ssl_pkcs11_key_len mbedtls_ssl_pkcs11_key_len +#define ssl_pkcs11_sign mbedtls_ssl_pkcs11_sign +#define ssl_psk_derive_premaster mbedtls_ssl_psk_derive_premaster +#define ssl_read mbedtls_ssl_read +#define ssl_read_record mbedtls_ssl_read_record +#define ssl_read_version mbedtls_ssl_read_version +#define ssl_recv_flight_completed mbedtls_ssl_recv_flight_completed +#define ssl_renegotiate mbedtls_ssl_renegotiate +#define ssl_resend mbedtls_ssl_resend +#define ssl_reset_checksum mbedtls_ssl_reset_checksum +#define ssl_send_alert_message mbedtls_ssl_send_alert_message +#define ssl_send_fatal_handshake_failure mbedtls_ssl_send_fatal_handshake_failure +#define ssl_send_flight_completed mbedtls_ssl_send_flight_completed +#define ssl_session mbedtls_ssl_session +#define ssl_session_free mbedtls_ssl_session_free +#define ssl_session_init mbedtls_ssl_session_init +#define ssl_session_reset mbedtls_ssl_session_reset +#define ssl_set_alpn_protocols mbedtls_ssl_conf_alpn_protocols +#define ssl_set_arc4_support mbedtls_ssl_conf_arc4_support +#define ssl_set_authmode mbedtls_ssl_conf_authmode +#define ssl_set_bio mbedtls_ssl_set_bio +#define ssl_set_bio mbedtls_ssl_set_bio_timeout +#define ssl_set_ca_chain mbedtls_ssl_conf_ca_chain +#define ssl_set_cbc_record_splitting mbedtls_ssl_conf_cbc_record_splitting +#define ssl_set_ciphersuites mbedtls_ssl_conf_ciphersuites +#define ssl_set_ciphersuites_for_version mbedtls_ssl_conf_ciphersuites_for_version +#define ssl_set_client_transport_id mbedtls_ssl_set_client_transport_id +#define ssl_set_curves mbedtls_ssl_conf_curves +#define ssl_set_dbg mbedtls_ssl_conf_dbg +#define ssl_set_dh_param mbedtls_ssl_conf_dh_param +#define ssl_set_dh_param_ctx mbedtls_ssl_conf_dh_param_ctx +#define ssl_set_dtls_anti_replay mbedtls_ssl_conf_dtls_anti_replay +#define ssl_set_dtls_badmac_limit mbedtls_ssl_conf_dtls_badmac_limit +#define ssl_set_dtls_cookies mbedtls_ssl_conf_dtls_cookies +#define ssl_set_encrypt_then_mac mbedtls_ssl_conf_encrypt_then_mac +#define ssl_set_endpoint mbedtls_ssl_conf_endpoint +#define ssl_set_extended_master_secret mbedtls_ssl_conf_extended_master_secret +#define ssl_set_fallback mbedtls_ssl_conf_fallback +#define ssl_set_handshake_timeout mbedtls_ssl_conf_handshake_timeout +#define ssl_set_hostname mbedtls_ssl_set_hostname +#define ssl_set_max_frag_len mbedtls_ssl_conf_max_frag_len +#define ssl_set_max_version mbedtls_ssl_conf_max_version +#define ssl_set_min_version mbedtls_ssl_conf_min_version +#define ssl_set_own_cert mbedtls_ssl_conf_own_cert +#define ssl_set_own_cert_alt mbedtls_ssl_set_own_cert_alt +#define ssl_set_own_cert_rsa mbedtls_ssl_set_own_cert_rsa +#define ssl_set_psk mbedtls_ssl_conf_psk +#define ssl_set_psk_cb mbedtls_ssl_conf_psk_cb +#define ssl_set_renegotiation mbedtls_ssl_conf_renegotiation +#define ssl_set_renegotiation_enforced mbedtls_ssl_conf_renegotiation_enforced +#define ssl_set_renegotiation_period mbedtls_ssl_conf_renegotiation_period +#define ssl_set_rng mbedtls_ssl_conf_rng +#define ssl_set_session mbedtls_ssl_set_session +#define ssl_set_session_cache mbedtls_ssl_conf_session_cache +#define ssl_set_session_ticket_lifetime mbedtls_ssl_conf_session_ticket_lifetime +#define ssl_set_session_tickets mbedtls_ssl_conf_session_tickets +#define ssl_set_sni mbedtls_ssl_conf_sni +#define ssl_set_transport mbedtls_ssl_conf_transport +#define ssl_set_truncated_hmac mbedtls_ssl_conf_truncated_hmac +#define ssl_set_verify mbedtls_ssl_conf_verify +#define ssl_sig_from_pk mbedtls_ssl_sig_from_pk +#define ssl_states mbedtls_ssl_states +#define ssl_ticket_keys mbedtls_ssl_ticket_keys +#define ssl_transform mbedtls_ssl_transform +#define ssl_transform_free mbedtls_ssl_transform_free +#define ssl_write mbedtls_ssl_write +#define ssl_write_certificate mbedtls_ssl_write_certificate +#define ssl_write_change_cipher_spec mbedtls_ssl_write_change_cipher_spec +#define ssl_write_finished mbedtls_ssl_write_finished +#define ssl_write_record mbedtls_ssl_write_record +#define ssl_write_version mbedtls_ssl_write_version +#define supported_ciphers mbedtls_cipher_supported +#define t_sint mbedtls_mpi_sint +#define t_udbl mbedtls_t_udbl +#define t_uint mbedtls_mpi_uint +#define test_ca_crt mbedtls_test_ca_crt +#define test_ca_crt_ec mbedtls_test_ca_crt_ec +#define test_ca_crt_rsa mbedtls_test_ca_crt_rsa +#define test_ca_key mbedtls_test_ca_key +#define test_ca_key_ec mbedtls_test_ca_key_ec +#define test_ca_key_rsa mbedtls_test_ca_key_rsa +#define test_ca_list mbedtls_test_cas_pem +#define test_ca_pwd mbedtls_test_ca_pwd +#define test_ca_pwd_ec mbedtls_test_ca_pwd_ec +#define test_ca_pwd_rsa mbedtls_test_ca_pwd_rsa +#define test_cli_crt mbedtls_test_cli_crt +#define test_cli_crt_ec mbedtls_test_cli_crt_ec +#define test_cli_crt_rsa mbedtls_test_cli_crt_rsa +#define test_cli_key mbedtls_test_cli_key +#define test_cli_key_ec mbedtls_test_cli_key_ec +#define test_cli_key_rsa mbedtls_test_cli_key_rsa +#define test_dhm_params mbedtls_test_dhm_params +#define test_srv_crt mbedtls_test_srv_crt +#define test_srv_crt_ec mbedtls_test_srv_crt_ec +#define test_srv_crt_rsa mbedtls_test_srv_crt_rsa +#define test_srv_key mbedtls_test_srv_key +#define test_srv_key_ec mbedtls_test_srv_key_ec +#define test_srv_key_rsa mbedtls_test_srv_key_rsa +#define threading_mutex_t mbedtls_threading_mutex_t +#define threading_set_alt mbedtls_threading_set_alt +#define timing_self_test mbedtls_timing_self_test +#define version_check_feature mbedtls_version_check_feature +#define version_get_number mbedtls_version_get_number +#define version_get_string mbedtls_version_get_string +#define version_get_string_full mbedtls_version_get_string_full +#define x509_bitstring mbedtls_x509_bitstring +#define x509_buf mbedtls_x509_buf +#define x509_crl mbedtls_x509_crl +#define x509_crl_entry mbedtls_x509_crl_entry +#define x509_crl_free mbedtls_x509_crl_free +#define x509_crl_info mbedtls_x509_crl_info +#define x509_crl_init mbedtls_x509_crl_init +#define x509_crl_parse mbedtls_x509_crl_parse +#define x509_crl_parse_der mbedtls_x509_crl_parse_der +#define x509_crl_parse_file mbedtls_x509_crl_parse_file +#define x509_crt mbedtls_x509_crt +#define x509_crt_check_extended_key_usage mbedtls_x509_crt_check_extended_key_usage +#define x509_crt_check_key_usage mbedtls_x509_crt_check_key_usage +#define x509_crt_free mbedtls_x509_crt_free +#define x509_crt_info mbedtls_x509_crt_info +#define x509_crt_init mbedtls_x509_crt_init +#define x509_crt_parse mbedtls_x509_crt_parse +#define x509_crt_parse_der mbedtls_x509_crt_parse_der +#define x509_crt_parse_file mbedtls_x509_crt_parse_file +#define x509_crt_parse_path mbedtls_x509_crt_parse_path +#define x509_crt_revoked mbedtls_x509_crt_is_revoked +#define x509_crt_verify mbedtls_x509_crt_verify +#define x509_csr mbedtls_x509_csr +#define x509_csr_free mbedtls_x509_csr_free +#define x509_csr_info mbedtls_x509_csr_info +#define x509_csr_init mbedtls_x509_csr_init +#define x509_csr_parse mbedtls_x509_csr_parse +#define x509_csr_parse_der mbedtls_x509_csr_parse_der +#define x509_csr_parse_file mbedtls_x509_csr_parse_file +#define x509_dn_gets mbedtls_x509_dn_gets +#define x509_get_alg mbedtls_x509_get_alg +#define x509_get_alg_null mbedtls_x509_get_alg_null +#define x509_get_ext mbedtls_x509_get_ext +#define x509_get_name mbedtls_x509_get_name +#define x509_get_rsassa_pss_params mbedtls_x509_get_rsassa_pss_params +#define x509_get_serial mbedtls_x509_get_serial +#define x509_get_sig mbedtls_x509_get_sig +#define x509_get_sig_alg mbedtls_x509_get_sig_alg +#define x509_get_time mbedtls_x509_get_time +#define x509_key_size_helper mbedtls_x509_key_size_helper +#define x509_name mbedtls_x509_name +#define x509_oid_get_description mbedtls_x509_oid_get_description +#define x509_oid_get_numeric_string mbedtls_x509_oid_get_numeric_string +#define x509_self_test mbedtls_x509_self_test +#define x509_sequence mbedtls_x509_sequence +#define x509_serial_gets mbedtls_x509_serial_gets +#define x509_set_extension mbedtls_x509_set_extension +#define x509_sig_alg_gets mbedtls_x509_sig_alg_gets +#define x509_string_to_names mbedtls_x509_string_to_names +#define x509_time mbedtls_x509_time +#define x509_time_expired mbedtls_x509_time_is_past +#define x509_time_future mbedtls_x509_time_is_future +#define x509_write_extensions mbedtls_x509_write_extensions +#define x509_write_names mbedtls_x509_write_names +#define x509_write_sig mbedtls_x509_write_sig +#define x509write_cert mbedtls_x509write_cert +#define x509write_crt_der mbedtls_x509write_crt_der +#define x509write_crt_free mbedtls_x509write_crt_free +#define x509write_crt_init mbedtls_x509write_crt_init +#define x509write_crt_pem mbedtls_x509write_crt_pem +#define x509write_crt_set_authority_key_identifier mbedtls_x509write_crt_set_authority_key_identifier +#define x509write_crt_set_basic_constraints mbedtls_x509write_crt_set_basic_constraints +#define x509write_crt_set_extension mbedtls_x509write_crt_set_extension +#define x509write_crt_set_issuer_key mbedtls_x509write_crt_set_issuer_key +#define x509write_crt_set_issuer_name mbedtls_x509write_crt_set_issuer_name +#define x509write_crt_set_key_usage mbedtls_x509write_crt_set_key_usage +#define x509write_crt_set_md_alg mbedtls_x509write_crt_set_md_alg +#define x509write_crt_set_ns_cert_type mbedtls_x509write_crt_set_ns_cert_type +#define x509write_crt_set_serial mbedtls_x509write_crt_set_serial +#define x509write_crt_set_subject_key mbedtls_x509write_crt_set_subject_key +#define x509write_crt_set_subject_key_identifier mbedtls_x509write_crt_set_subject_key_identifier +#define x509write_crt_set_subject_name mbedtls_x509write_crt_set_subject_name +#define x509write_crt_set_validity mbedtls_x509write_crt_set_validity +#define x509write_crt_set_version mbedtls_x509write_crt_set_version +#define x509write_csr mbedtls_x509write_csr +#define x509write_csr_der mbedtls_x509write_csr_der +#define x509write_csr_free mbedtls_x509write_csr_free +#define x509write_csr_init mbedtls_x509write_csr_init +#define x509write_csr_pem mbedtls_x509write_csr_pem +#define x509write_csr_set_extension mbedtls_x509write_csr_set_extension +#define x509write_csr_set_key mbedtls_x509write_csr_set_key +#define x509write_csr_set_key_usage mbedtls_x509write_csr_set_key_usage +#define x509write_csr_set_md_alg mbedtls_x509write_csr_set_md_alg +#define x509write_csr_set_ns_cert_type mbedtls_x509write_csr_set_ns_cert_type +#define x509write_csr_set_subject_name mbedtls_x509write_csr_set_subject_name +#define xtea_context mbedtls_xtea_context +#define xtea_crypt_cbc mbedtls_xtea_crypt_cbc +#define xtea_crypt_ecb mbedtls_xtea_crypt_ecb +#define xtea_free mbedtls_xtea_free +#define xtea_init mbedtls_xtea_init +#define xtea_self_test mbedtls_xtea_self_test +#define xtea_setup mbedtls_xtea_setup + +#endif /* compat-1.3.h */ +#endif /* MBEDTLS_DEPRECATED_REMOVED */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/config.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/config.h new file mode 100644 index 0000000..d1db0d8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/config.h @@ -0,0 +1,2511 @@ +/** + * \file config.h + * + * \brief Configuration options (set of defines) + * + * This set of compile-time options may be used to enable + * or disable features selectively, and reduce the global + * memory footprint. + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#ifndef MBEDTLS_CONFIG_H +#define MBEDTLS_CONFIG_H + +#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) +#define _CRT_SECURE_NO_DEPRECATE 1 +#endif + +/** + * \name SECTION: System support + * + * This section sets system specific settings. + * \{ + */ + +/** + * \def MBEDTLS_HAVE_ASM + * + * The compiler has support for asm(). + * + * Requires support for asm() in compiler. + * + * Used in: + * library/timing.c + * library/padlock.c + * include/mbedtls/bn_mul.h + * + * Comment to disable the use of assembly code. + */ +#define MBEDTLS_HAVE_ASM + +/** + * \def MBEDTLS_HAVE_SSE2 + * + * CPU supports SSE2 instruction set. + * + * Uncomment if the CPU supports SSE2 (IA-32 specific). + */ +//#define MBEDTLS_HAVE_SSE2 + +/** + * \def MBEDTLS_HAVE_TIME + * + * System has time.h and time(). + * The time does not need to be correct, only time differences are used, + * by contrast with MBEDTLS_HAVE_TIME_DATE + * + * Comment if your system does not support time functions + */ +#define MBEDTLS_HAVE_TIME + +/** + * \def MBEDTLS_HAVE_TIME_DATE + * + * System has time.h and time(), gmtime() and the clock is correct. + * The time needs to be correct (not necesarily very accurate, but at least + * the date should be correct). This is used to verify the validity period of + * X.509 certificates. + * + * Comment if your system does not have a correct clock. + */ +#define MBEDTLS_HAVE_TIME_DATE + +/** + * \def MBEDTLS_PLATFORM_MEMORY + * + * Enable the memory allocation layer. + * + * By default mbed TLS uses the system-provided calloc() and free(). + * This allows different allocators (self-implemented or provided) to be + * provided to the platform abstraction layer. + * + * Enabling MBEDTLS_PLATFORM_MEMORY without the + * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide + * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and + * free() function pointer at runtime. + * + * Enabling MBEDTLS_PLATFORM_MEMORY and specifying + * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the + * alternate function at compile time. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Enable this layer to allow use of alternative memory allocators. + */ +//#define MBEDTLS_PLATFORM_MEMORY + +/** + * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + * + * Do not assign standard functions in the platform layer (e.g. calloc() to + * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF) + * + * This makes sure there are no linking errors on platforms that do not support + * these functions. You will HAVE to provide alternatives, either at runtime + * via the platform_set_xxx() functions or at compile time by setting + * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a + * MBEDTLS_PLATFORM_XXX_MACRO. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Uncomment to prevent default assignment of standard functions in the + * platform layer. + */ +//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +/** + * \def MBEDTLS_PLATFORM_EXIT_ALT + * + * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the + * function in the platform abstraction layer. + * + * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will + * provide a function "mbedtls_platform_set_printf()" that allows you to set an + * alternative printf function pointer. + * + * All these define require MBEDTLS_PLATFORM_C to be defined! + * + * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows; + * it will be enabled automatically by check_config.h + * + * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as + * MBEDTLS_PLATFORM_XXX_MACRO! + * + * Uncomment a macro to enable alternate implementation of specific base + * platform function + */ +//#define MBEDTLS_PLATFORM_EXIT_ALT +//#define MBEDTLS_PLATFORM_FPRINTF_ALT +//#define MBEDTLS_PLATFORM_PRINTF_ALT +//#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +/** + * \def MBEDTLS_DEPRECATED_WARNING + * + * Mark deprecated functions so that they generate a warning if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * This only works with GCC and Clang. With other compilers, you may want to + * use MBEDTLS_DEPRECATED_REMOVED + * + * Uncomment to get warnings on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_WARNING + +/** + * \def MBEDTLS_DEPRECATED_REMOVED + * + * Remove deprecated functions so that they generate an error if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * Uncomment to get errors on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_REMOVED + +/* \} name SECTION: System support */ + +/** + * \name SECTION: mbed TLS feature support + * + * This section sets support for features that are or are not needed + * within the modules that are enabled. + * \{ + */ + +/** + * \def MBEDTLS_TIMING_ALT + * + * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(), + * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay() + * + * Only works if you have MBEDTLS_TIMING_C enabled. + * + * You will need to provide a header "timing_alt.h" and an implementation at + * compile time. + */ +//#define MBEDTLS_TIMING_ALT + +/** + * \def MBEDTLS_AES_ALT + * + * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your + * alternate core implementation of a symmetric crypto or hash module (e.g. + * platform specific assembly optimized implementations). Keep in mind that + * the function prototypes should remain the same. + * + * This replaces the whole module. If you only want to replace one of the + * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer + * provide the "struct mbedtls_aes_context" definition and omit the base function + * declarations and implementations. "aes_alt.h" will be included from + * "aes.h" to include the new function definitions. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * module. + */ +//#define MBEDTLS_AES_ALT +//#define MBEDTLS_ARC4_ALT +//#define MBEDTLS_BLOWFISH_ALT +//#define MBEDTLS_CAMELLIA_ALT +//#define MBEDTLS_DES_ALT +//#define MBEDTLS_XTEA_ALT +//#define MBEDTLS_MD2_ALT +//#define MBEDTLS_MD4_ALT +//#define MBEDTLS_MD5_ALT +//#define MBEDTLS_RIPEMD160_ALT +//#define MBEDTLS_SHA1_ALT +//#define MBEDTLS_SHA256_ALT +//#define MBEDTLS_SHA512_ALT + +/** + * \def MBEDTLS_MD2_PROCESS_ALT + * + * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you + * alternate core implementation of symmetric crypto or hash function. Keep in + * mind that function prototypes should remain the same. + * + * This replaces only one function. The header file from mbed TLS is still + * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will + * no longer provide the mbedtls_sha1_process() function, but it will still provide + * the other function (using your mbedtls_sha1_process() function) and the definition + * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible + * with this definition. + * + * Note: if you use the AES_xxx_ALT macros, then is is recommended to also set + * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES + * tables. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * function. + */ +//#define MBEDTLS_MD2_PROCESS_ALT +//#define MBEDTLS_MD4_PROCESS_ALT +//#define MBEDTLS_MD5_PROCESS_ALT +//#define MBEDTLS_RIPEMD160_PROCESS_ALT +//#define MBEDTLS_SHA1_PROCESS_ALT +//#define MBEDTLS_SHA256_PROCESS_ALT +//#define MBEDTLS_SHA512_PROCESS_ALT +//#define MBEDTLS_DES_SETKEY_ALT +//#define MBEDTLS_DES_CRYPT_ECB_ALT +//#define MBEDTLS_DES3_CRYPT_ECB_ALT +//#define MBEDTLS_AES_SETKEY_ENC_ALT +//#define MBEDTLS_AES_SETKEY_DEC_ALT +//#define MBEDTLS_AES_ENCRYPT_ALT +//#define MBEDTLS_AES_DECRYPT_ALT + +/** + * \def MBEDTLS_ENTROPY_HARDWARE_ALT + * + * Uncomment this macro to let mbed TLS use your own implementation of a + * hardware entropy collector. + * + * Your function must be called \c mbedtls_hardware_poll(), have the same + * prototype as declared in entropy_poll.h, and accept NULL as first argument. + * + * Uncomment to use your own hardware entropy collector. + */ +//#define MBEDTLS_ENTROPY_HARDWARE_ALT + +/** + * \def MBEDTLS_AES_ROM_TABLES + * + * Store the AES tables in ROM. + * + * Uncomment this macro to store the AES tables in ROM. + */ +//#define MBEDTLS_AES_ROM_TABLES + +/** + * \def MBEDTLS_CAMELLIA_SMALL_MEMORY + * + * Use less ROM for the Camellia implementation (saves about 768 bytes). + * + * Uncomment this macro to use less memory for Camellia. + */ +//#define MBEDTLS_CAMELLIA_SMALL_MEMORY + +/** + * \def MBEDTLS_CIPHER_MODE_CBC + * + * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CBC + +/** + * \def MBEDTLS_CIPHER_MODE_CFB + * + * Enable Cipher Feedback mode (CFB) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CFB + +/** + * \def MBEDTLS_CIPHER_MODE_CTR + * + * Enable Counter Block Cipher mode (CTR) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CTR + +/** + * \def MBEDTLS_CIPHER_NULL_CIPHER + * + * Enable NULL cipher. + * Warning: Only do so when you know what you are doing. This allows for + * encryption or channels without any security! + * + * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable + * the following ciphersuites: + * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA + * + * Uncomment this macro to enable the NULL cipher and ciphersuites + */ +//#define MBEDTLS_CIPHER_NULL_CIPHER + +/** + * \def MBEDTLS_CIPHER_PADDING_PKCS7 + * + * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for + * specific padding modes in the cipher layer with cipher modes that support + * padding (e.g. CBC) + * + * If you disable all padding modes, only full blocks can be used with CBC. + * + * Enable padding modes in the cipher layer. + */ +#define MBEDTLS_CIPHER_PADDING_PKCS7 +#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS +#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN +#define MBEDTLS_CIPHER_PADDING_ZEROS + +/** + * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES + * + * Enable weak ciphersuites in SSL / TLS. + * Warning: Only do so when you know what you are doing. This allows for + * channels with virtually no security at all! + * + * This enables the following ciphersuites: + * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA + * + * Uncomment this macro to enable weak ciphersuites + */ +//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES + +/** + * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES + * + * Remove RC4 ciphersuites by default in SSL / TLS. + * This flag removes the ciphersuites based on RC4 from the default list as + * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to + * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them + * explicitly. + * + * Uncomment this macro to remove RC4 ciphersuites by default. + */ +#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES + +/** + * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED + * + * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve + * module. By default all supported curves are enabled. + * + * Comment macros to disable the curve and functions for it + */ +#define MBEDTLS_ECP_DP_SECP192R1_ENABLED +#define MBEDTLS_ECP_DP_SECP224R1_ENABLED +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +#define MBEDTLS_ECP_DP_SECP384R1_ENABLED +#define MBEDTLS_ECP_DP_SECP521R1_ENABLED +#define MBEDTLS_ECP_DP_SECP192K1_ENABLED +#define MBEDTLS_ECP_DP_SECP224K1_ENABLED +#define MBEDTLS_ECP_DP_SECP256K1_ENABLED +#define MBEDTLS_ECP_DP_BP256R1_ENABLED +#define MBEDTLS_ECP_DP_BP384R1_ENABLED +#define MBEDTLS_ECP_DP_BP512R1_ENABLED +#define MBEDTLS_ECP_DP_CURVE25519_ENABLED + +/** + * \def MBEDTLS_ECP_NIST_OPTIM + * + * Enable specific 'modulo p' routines for each NIST prime. + * Depending on the prime and architecture, makes operations 4 to 8 times + * faster on the corresponding curve. + * + * Comment this macro to disable NIST curves optimisation. + */ +#define MBEDTLS_ECP_NIST_OPTIM + +/** + * \def MBEDTLS_ECDSA_DETERMINISTIC + * + * Enable deterministic ECDSA (RFC 6979). + * Standard ECDSA is "fragile" in the sense that lack of entropy when signing + * may result in a compromise of the long-term signing key. This is avoided by + * the deterministic variant. + * + * Requires: MBEDTLS_HMAC_DRBG_C + * + * Comment this macro to disable deterministic ECDSA. + */ +#define MBEDTLS_ECDSA_DETERMINISTIC + +/** + * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + * + * Enable the PSK based ciphersuite modes in SSL / TLS. + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + * + * Enable the DHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + * + * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + * + * Enable the RSA-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + * + * Enable the RSA-only based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + * + * Enable the DHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + * + * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + * + * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C, + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + * + * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + * + * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + * + * Enable the ECJPAKE based ciphersuite modes in SSL / TLS. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Requires: MBEDTLS_ECJPAKE_C + * MBEDTLS_SHA256_C + * MBEDTLS_ECP_DP_SECP256R1_ENABLED + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + +/** + * \def MBEDTLS_PK_PARSE_EC_EXTENDED + * + * Enhance support for reading EC keys using variants of SEC1 not allowed by + * RFC 5915 and RFC 5480. + * + * Currently this means parsing the SpecifiedECDomain choice of EC + * parameters (only known groups are supported, not arbitrary domains, to + * avoid validation issues). + * + * Disable if you only need to support RFC 5915 + 5480 key formats. + */ +#define MBEDTLS_PK_PARSE_EC_EXTENDED + +/** + * \def MBEDTLS_ERROR_STRERROR_DUMMY + * + * Enable a dummy error function to make use of mbedtls_strerror() in + * third party libraries easier when MBEDTLS_ERROR_C is disabled + * (no effect when MBEDTLS_ERROR_C is enabled). + * + * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're + * not using mbedtls_strerror() or error_strerror() in your application. + * + * Disable if you run into name conflicts and want to really remove the + * mbedtls_strerror() + */ +#define MBEDTLS_ERROR_STRERROR_DUMMY + +/** + * \def MBEDTLS_GENPRIME + * + * Enable the prime-number generation code. + * + * Requires: MBEDTLS_BIGNUM_C + */ +#define MBEDTLS_GENPRIME + +/** + * \def MBEDTLS_FS_IO + * + * Enable functions that use the filesystem. + */ +#define MBEDTLS_FS_IO + +/** + * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + * + * Do not add default entropy sources. These are the platform specific, + * mbedtls_timing_hardclock and HAVEGE based poll functions. + * + * This is useful to have more control over the added entropy sources in an + * application. + * + * Uncomment this macro to prevent loading of default entropy functions. + */ +//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/** + * \def MBEDTLS_NO_PLATFORM_ENTROPY + * + * Do not use built-in platform entropy functions. + * This is useful if your platform does not support + * standards like the /dev/urandom or Windows CryptoAPI. + * + * Uncomment this macro to disable the built-in platform entropy functions. + */ +//#define MBEDTLS_NO_PLATFORM_ENTROPY + +/** + * \def MBEDTLS_ENTROPY_FORCE_SHA256 + * + * Force the entropy accumulator to use a SHA-256 accumulator instead of the + * default SHA-512 based one (if both are available). + * + * Requires: MBEDTLS_SHA256_C + * + * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option + * if you have performance concerns. + * + * This option is only useful if both MBEDTLS_SHA256_C and + * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used. + */ +//#define MBEDTLS_ENTROPY_FORCE_SHA256 + +/** + * \def MBEDTLS_MEMORY_DEBUG + * + * Enable debugging of buffer allocator memory issues. Automatically prints + * (to stderr) all (fatal) messages on memory allocation issues. Enables + * function for 'debug output' of allocated memory. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Uncomment this macro to let the buffer allocator print out error messages. + */ +//#define MBEDTLS_MEMORY_DEBUG + +/** + * \def MBEDTLS_MEMORY_BACKTRACE + * + * Include backtrace information with each allocated block. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * GLIBC-compatible backtrace() an backtrace_symbols() support + * + * Uncomment this macro to include backtrace information + */ +//#define MBEDTLS_MEMORY_BACKTRACE + +/** + * \def MBEDTLS_PK_RSA_ALT_SUPPORT + * + * Support external private RSA keys (eg from a HSM) in the PK layer. + * + * Comment this macro to disable support for external private RSA keys. + */ +#define MBEDTLS_PK_RSA_ALT_SUPPORT + +/** + * \def MBEDTLS_PKCS1_V15 + * + * Enable support for PKCS#1 v1.5 encoding. + * + * Requires: MBEDTLS_RSA_C + * + * This enables support for PKCS#1 v1.5 operations. + */ +#define MBEDTLS_PKCS1_V15 + +/** + * \def MBEDTLS_PKCS1_V21 + * + * Enable support for PKCS#1 v2.1 encoding. + * + * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C + * + * This enables support for RSAES-OAEP and RSASSA-PSS operations. + */ +#define MBEDTLS_PKCS1_V21 + +/** + * \def MBEDTLS_RSA_NO_CRT + * + * Do not use the Chinese Remainder Theorem for the RSA private operation. + * + * Uncomment this macro to disable the use of CRT in RSA. + * + */ +//#define MBEDTLS_RSA_NO_CRT + +/** + * \def MBEDTLS_SELF_TEST + * + * Enable the checkup functions (*_self_test). + */ +#define MBEDTLS_SELF_TEST + +/** + * \def MBEDTLS_SHA256_SMALLER + * + * Enable an implementation of SHA-256 that has lower ROM footprint but also + * lower performance. + * + * The default implementation is meant to be a reasonnable compromise between + * performance and size. This version optimizes more aggressively for size at + * the expense of performance. Eg on Cortex-M4 it reduces the size of + * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about + * 30%. + * + * Uncomment to enable the smaller implementation of SHA256. + */ +//#define MBEDTLS_SHA256_SMALLER + +/** + * \def MBEDTLS_SSL_AEAD_RANDOM_IV + * + * Generate a random IV rather than using the record sequence number as a + * nonce for ciphersuites using and AEAD algorithm (GCM or CCM). + * + * Using the sequence number is generally recommended. + * + * Uncomment this macro to always use random IVs with AEAD ciphersuites. + */ +//#define MBEDTLS_SSL_AEAD_RANDOM_IV + +/** + * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES + * + * Enable sending of alert messages in case of encountered errors as per RFC. + * If you choose not to send the alert messages, mbed TLS can still communicate + * with other servers, only debugging of failures is harder. + * + * The advantage of not sending alert messages, is that no information is given + * about reasons for failures thus preventing adversaries of gaining intel. + * + * Enable sending of all alert messages + */ +#define MBEDTLS_SSL_ALL_ALERT_MESSAGES + +/** + * \def MBEDTLS_SSL_DEBUG_ALL + * + * Enable the debug messages in SSL module for all issues. + * Debug messages have been disabled in some places to prevent timing + * attacks due to (unbalanced) debugging function calls. + * + * If you need all error reporting you should enable this during debugging, + * but remove this for production servers that should log as well. + * + * Uncomment this macro to report all debug messages on errors introducing + * a timing side-channel. + * + */ +//#define MBEDTLS_SSL_DEBUG_ALL + +/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC + * + * Enable support for Encrypt-then-MAC, RFC 7366. + * + * This allows peers that both support it to use a more robust protection for + * ciphersuites using CBC, providing deep resistance against timing attacks + * on the padding or underlying cipher. + * + * This only affects CBC ciphersuites, and is useless if none is defined. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Encrypt-then-MAC + */ +#define MBEDTLS_SSL_ENCRYPT_THEN_MAC + +/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET + * + * Enable support for Extended Master Secret, aka Session Hash + * (draft-ietf-tls-session-hash-02). + * + * This was introduced as "the proper fix" to the Triple Handshake familiy of + * attacks, but it is recommended to always use it (even if you disable + * renegotiation), since it actually fixes a more fundamental issue in the + * original SSL/TLS design, and has implications beyond Triple Handshake. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Extended Master Secret. + */ +#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET + +/** + * \def MBEDTLS_SSL_FALLBACK_SCSV + * + * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00). + * + * For servers, it is recommended to always enable this, unless you support + * only one version of TLS, or know for sure that none of your clients + * implements a fallback strategy. + * + * For clients, you only need this if you're using a fallback strategy, which + * is not recommended in the first place, unless you absolutely need it to + * interoperate with buggy (version-intolerant) servers. + * + * Comment this macro to disable support for FALLBACK_SCSV + */ +#define MBEDTLS_SSL_FALLBACK_SCSV + +/** + * \def MBEDTLS_SSL_HW_RECORD_ACCEL + * + * Enable hooking functions in SSL module for hardware acceleration of + * individual records. + * + * Uncomment this macro to enable hooking functions. + */ +//#define MBEDTLS_SSL_HW_RECORD_ACCEL + +/** + * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING + * + * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0. + * + * This is a countermeasure to the BEAST attack, which also minimizes the risk + * of interoperability issues compared to sending 0-length records. + * + * Comment this macro to disable 1/n-1 record splitting. + */ +#define MBEDTLS_SSL_CBC_RECORD_SPLITTING + +/** + * \def MBEDTLS_SSL_RENEGOTIATION + * + * Disable support for TLS renegotiation. + * + * The two main uses of renegotiation are (1) refresh keys on long-lived + * connections and (2) client authentication after the initial handshake. + * If you don't need renegotiation, it's probably better to disable it, since + * it has been associated with security issues in the past and is easy to + * misuse/misunderstand. + * + * Comment this to disable support for renegotiation. + */ +#define MBEDTLS_SSL_RENEGOTIATION + +/** + * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + * + * Enable support for receiving and parsing SSLv2 Client Hello messages for the + * SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to enable support for SSLv2 Client Hello messages. + */ +//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + +/** + * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + * + * Pick the ciphersuite according to the client's preferences rather than ours + * in the SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to respect client's ciphersuite order + */ +//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + +/** + * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + * + * Enable support for RFC 6066 max_fragment_length extension in SSL. + * + * Comment this macro to disable support for the max_fragment_length extension + */ +#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + +/** + * \def MBEDTLS_SSL_PROTO_SSL3 + * + * Enable support for SSL 3.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for SSL 3.0 + */ +#define MBEDTLS_SSL_PROTO_SSL3 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1 + * + * Enable support for TLS 1.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.0 + */ +#define MBEDTLS_SSL_PROTO_TLS1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_1 + * + * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled). + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.1 / DTLS 1.0 + */ +#define MBEDTLS_SSL_PROTO_TLS1_1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_2 + * + * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled). + * + * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C + * (Depends on ciphersuites) + * + * Comment this macro to disable support for TLS 1.2 / DTLS 1.2 + */ +#define MBEDTLS_SSL_PROTO_TLS1_2 + +/** + * \def MBEDTLS_SSL_PROTO_DTLS + * + * Enable support for DTLS (all available versions). + * + * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0, + * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1_1 + * or MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for DTLS + */ +#define MBEDTLS_SSL_PROTO_DTLS + +/** + * \def MBEDTLS_SSL_ALPN + * + * Enable support for RFC 7301 Application Layer Protocol Negotiation. + * + * Comment this macro to disable support for ALPN. + */ +#define MBEDTLS_SSL_ALPN + +/** + * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY + * + * Enable support for the anti-replay mechanism in DTLS. + * + * Requires: MBEDTLS_SSL_TLS_C + * MBEDTLS_SSL_PROTO_DTLS + * + * \warning Disabling this is often a security risk! + * See mbedtls_ssl_conf_dtls_anti_replay() for details. + * + * Comment this to disable anti-replay in DTLS. + */ +#define MBEDTLS_SSL_DTLS_ANTI_REPLAY + +/** + * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Enable support for HelloVerifyRequest on DTLS servers. + * + * This feature is highly recommended to prevent DTLS servers being used as + * amplifiers in DoS attacks against other hosts. It should always be enabled + * unless you know for sure amplification cannot be a problem in the + * environment in which your server operates. + * + * \warning Disabling this can ba a security risk! (see above) + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Comment this to disable support for HelloVerifyRequest. + */ +#define MBEDTLS_SSL_DTLS_HELLO_VERIFY + +/** + * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + * + * Enable server-side support for clients that reconnect from the same port. + * + * Some clients unexpectedly close the connection and try to reconnect using the + * same source port. This needs special support from the server to handle the + * new connection securely, as described in section 4.2.8 of RFC 6347. This + * flag enables that support. + * + * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Comment this to disable support for clients reusing the source port. + */ +#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + +/** + * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT + * + * Enable support for a limit of records with bad MAC. + * + * See mbedtls_ssl_conf_dtls_badmac_limit(). + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + */ +#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT + +/** + * \def MBEDTLS_SSL_SESSION_TICKETS + * + * Enable support for RFC 5077 session tickets in SSL. + * Client-side, provides full support for session tickets (maintainance of a + * session store remains the responsibility of the application, though). + * Server-side, you also need to provide callbacks for writing and parsing + * tickets, including authenticated encryption and key management. Example + * callbacks are provided by MBEDTLS_SSL_TICKET_C. + * + * Comment this macro to disable support for SSL session tickets + */ +#define MBEDTLS_SSL_SESSION_TICKETS + +/** + * \def MBEDTLS_SSL_EXPORT_KEYS + * + * Enable support for exporting key block and master secret. + * This is required for certain users of TLS, e.g. EAP-TLS. + * + * Comment this macro to disable support for key export + */ +#define MBEDTLS_SSL_EXPORT_KEYS + +/** + * \def MBEDTLS_SSL_SERVER_NAME_INDICATION + * + * Enable support for RFC 6066 server name indication (SNI) in SSL. + * + * Requires: MBEDTLS_X509_CRT_PARSE_C + * + * Comment this macro to disable support for server name indication in SSL + */ +#define MBEDTLS_SSL_SERVER_NAME_INDICATION + +/** + * \def MBEDTLS_SSL_TRUNCATED_HMAC + * + * Enable support for RFC 6066 truncated HMAC in SSL. + * + * Comment this macro to disable support for truncated HMAC in SSL + */ +#define MBEDTLS_SSL_TRUNCATED_HMAC + +/** + * \def MBEDTLS_THREADING_ALT + * + * Provide your own alternate threading implementation. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to allow your own alternate threading implementation. + */ +//#define MBEDTLS_THREADING_ALT + +/** + * \def MBEDTLS_THREADING_PTHREAD + * + * Enable the pthread wrapper layer for the threading layer. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to enable pthread mutexes. + */ +//#define MBEDTLS_THREADING_PTHREAD + +/** + * \def MBEDTLS_VERSION_FEATURES + * + * Allow run-time checking of compile-time enabled features. Thus allowing users + * to check at run-time if the library is for instance compiled with threading + * support via mbedtls_version_check_feature(). + * + * Requires: MBEDTLS_VERSION_C + * + * Comment this to disable run-time checking and save ROM space + */ +#define MBEDTLS_VERSION_FEATURES + +/** + * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an extension in a v1 or v2 certificate. + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + +/** + * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an unknown critical extension. + * + * \warning Depending on your PKI use, enabling this can be a security risk! + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + +/** + * \def MBEDTLS_X509_CHECK_KEY_USAGE + * + * Enable verification of the keyUsage extension (CA and leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused + * (intermediate) CA and leaf certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip keyUsage checking for both CA and leaf certificates. + */ +#define MBEDTLS_X509_CHECK_KEY_USAGE + +/** + * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + * + * Enable verification of the extendedKeyUsage extension (leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip extendedKeyUsage checking for certificates. + */ +#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + +/** + * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT + * + * Enable parsing and verification of X.509 certificates, CRLs and CSRS + * signed with RSASSA-PSS (aka PKCS#1 v2.1). + * + * Comment this macro to disallow using RSASSA-PSS in certificates. + */ +#define MBEDTLS_X509_RSASSA_PSS_SUPPORT + +/** + * \def MBEDTLS_ZLIB_SUPPORT + * + * If set, the SSL/TLS module uses ZLIB to support compression and + * decompression of packet data. + * + * \warning TLS-level compression MAY REDUCE SECURITY! See for example the + * CRIME attack. Before enabling this option, you should examine with care if + * CRIME or similar exploits may be a applicable to your use case. + * + * \note Currently compression can't be used with DTLS. + * + * Used in: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This feature requires zlib library and headers to be present. + * + * Uncomment to enable use of ZLIB + */ +//#define MBEDTLS_ZLIB_SUPPORT +/* \} name SECTION: mbed TLS feature support */ + +/** + * \name SECTION: mbed TLS modules + * + * This section enables or disables entire modules in mbed TLS + * \{ + */ + +/** + * \def MBEDTLS_AESNI_C + * + * Enable AES-NI support on x86-64. + * + * Module: library/aesni.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the AES-NI instructions on x86-64 + */ +#define MBEDTLS_AESNI_C + +/** + * \def MBEDTLS_AES_C + * + * Enable the AES block cipher. + * + * Module: library/aes.c + * Caller: library/ssl_tls.c + * library/pem.c + * library/ctr_drbg.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * + * PEM_PARSE uses AES for decrypting encrypted keys. + */ +#define MBEDTLS_AES_C + +/** + * \def MBEDTLS_ARC4_C + * + * Enable the ARCFOUR stream cipher. + * + * Module: library/arc4.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_ARC4_C + +/** + * \def MBEDTLS_ASN1_PARSE_C + * + * Enable the generic ASN1 parser. + * + * Module: library/asn1.c + * Caller: library/x509.c + * library/dhm.c + * library/pkcs12.c + * library/pkcs5.c + * library/pkparse.c + */ +#define MBEDTLS_ASN1_PARSE_C + +/** + * \def MBEDTLS_ASN1_WRITE_C + * + * Enable the generic ASN1 writer. + * + * Module: library/asn1write.c + * Caller: library/ecdsa.c + * library/pkwrite.c + * library/x509_create.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + */ +#define MBEDTLS_ASN1_WRITE_C + +/** + * \def MBEDTLS_BASE64_C + * + * Enable the Base64 module. + * + * Module: library/base64.c + * Caller: library/pem.c + * + * This module is required for PEM support (required by X.509). + */ +#define MBEDTLS_BASE64_C + +/** + * \def MBEDTLS_BIGNUM_C + * + * Enable the multi-precision integer library. + * + * Module: library/bignum.c + * Caller: library/dhm.c + * library/ecp.c + * library/ecdsa.c + * library/rsa.c + * library/ssl_tls.c + * + * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support. + */ +#define MBEDTLS_BIGNUM_C + +/** + * \def MBEDTLS_BLOWFISH_C + * + * Enable the Blowfish block cipher. + * + * Module: library/blowfish.c + */ +#define MBEDTLS_BLOWFISH_C + +/** + * \def MBEDTLS_CAMELLIA_C + * + * Enable the Camellia block cipher. + * + * Module: library/camellia.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_CAMELLIA_C + +/** + * \def MBEDTLS_CCM_C + * + * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher. + * + * Module: library/ccm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-CCM ciphersuites, if other requisites are + * enabled as well. + */ +#define MBEDTLS_CCM_C + +/** + * \def MBEDTLS_CERTS_C + * + * Enable the test certificates. + * + * Module: library/certs.c + * Caller: + * + * This module is used for testing (ssl_client/server). + */ +#define MBEDTLS_CERTS_C + +/** + * \def MBEDTLS_CIPHER_C + * + * Enable the generic cipher layer. + * + * Module: library/cipher.c + * Caller: library/ssl_tls.c + * + * Uncomment to enable generic cipher wrappers. + */ +#define MBEDTLS_CIPHER_C + +/** + * \def MBEDTLS_CTR_DRBG_C + * + * Enable the CTR_DRBG AES-256-based random generator. + * + * Module: library/ctr_drbg.c + * Caller: + * + * Requires: MBEDTLS_AES_C + * + * This module provides the CTR_DRBG AES-256 random number generator. + */ +#define MBEDTLS_CTR_DRBG_C + +/** + * \def MBEDTLS_DEBUG_C + * + * Enable the debug functions. + * + * Module: library/debug.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module provides debugging functions. + */ +#define MBEDTLS_DEBUG_C + +/** + * \def MBEDTLS_DES_C + * + * Enable the DES block cipher. + * + * Module: library/des.c + * Caller: library/pem.c + * library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * + * PEM_PARSE uses DES/3DES for decrypting encrypted keys. + */ +#define MBEDTLS_DES_C + +/** + * \def MBEDTLS_DHM_C + * + * Enable the Diffie-Hellman-Merkle module. + * + * Module: library/dhm.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * DHE-RSA, DHE-PSK + */ +#define MBEDTLS_DHM_C + +/** + * \def MBEDTLS_ECDH_C + * + * Enable the elliptic curve Diffie-Hellman library. + * + * Module: library/ecdh.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK + * + * Requires: MBEDTLS_ECP_C + */ +#define MBEDTLS_ECDH_C + +/** + * \def MBEDTLS_ECDSA_C + * + * Enable the elliptic curve DSA library. + * + * Module: library/ecdsa.c + * Caller: + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C + */ +#define MBEDTLS_ECDSA_C + +/** + * \def MBEDTLS_ECJPAKE_C + * + * Enable the elliptic curve J-PAKE library. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Module: library/ecjpake.c + * Caller: + * + * This module is used by the following key exchanges: + * ECJPAKE + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C + */ +//#define MBEDTLS_ECJPAKE_C + +/** + * \def MBEDTLS_ECP_C + * + * Enable the elliptic curve over GF(p) library. + * + * Module: library/ecp.c + * Caller: library/ecdh.c + * library/ecdsa.c + * library/ecjpake.c + * + * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED + */ +#define MBEDTLS_ECP_C + +/** + * \def MBEDTLS_ENTROPY_C + * + * Enable the platform-specific entropy code. + * + * Module: library/entropy.c + * Caller: + * + * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C + * + * This module provides a generic entropy pool + */ +#define MBEDTLS_ENTROPY_C + +/** + * \def MBEDTLS_ERROR_C + * + * Enable error code to error string conversion. + * + * Module: library/error.c + * Caller: + * + * This module enables mbedtls_strerror(). + */ +#define MBEDTLS_ERROR_C + +/** + * \def MBEDTLS_GCM_C + * + * Enable the Galois/Counter Mode (GCM) for AES. + * + * Module: library/gcm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other + * requisites are enabled as well. + */ +#define MBEDTLS_GCM_C + +/** + * \def MBEDTLS_HAVEGE_C + * + * Enable the HAVEGE random generator. + * + * Warning: the HAVEGE random generator is not suitable for virtualized + * environments + * + * Warning: the HAVEGE random generator is dependent on timing and specific + * processor traits. It is therefore not advised to use HAVEGE as + * your applications primary random generator or primary entropy pool + * input. As a secondary input to your entropy pool, it IS able add + * the (limited) extra entropy it provides. + * + * Module: library/havege.c + * Caller: + * + * Requires: MBEDTLS_TIMING_C + * + * Uncomment to enable the HAVEGE random generator. + */ +//#define MBEDTLS_HAVEGE_C + +/** + * \def MBEDTLS_HMAC_DRBG_C + * + * Enable the HMAC_DRBG random generator. + * + * Module: library/hmac_drbg.c + * Caller: + * + * Requires: MBEDTLS_MD_C + * + * Uncomment to enable the HMAC_DRBG random number geerator. + */ +#define MBEDTLS_HMAC_DRBG_C + +/** + * \def MBEDTLS_MD_C + * + * Enable the generic message digest layer. + * + * Module: library/mbedtls_md.c + * Caller: + * + * Uncomment to enable generic message digest wrappers. + */ +#define MBEDTLS_MD_C + +/** + * \def MBEDTLS_MD2_C + * + * Enable the MD2 hash algorithm. + * + * Module: library/mbedtls_md2.c + * Caller: + * + * Uncomment to enable support for (rare) MD2-signed X.509 certs. + */ +//#define MBEDTLS_MD2_C + +/** + * \def MBEDTLS_MD4_C + * + * Enable the MD4 hash algorithm. + * + * Module: library/mbedtls_md4.c + * Caller: + * + * Uncomment to enable support for (rare) MD4-signed X.509 certs. + */ +//#define MBEDTLS_MD4_C + +/** + * \def MBEDTLS_MD5_C + * + * Enable the MD5 hash algorithm. + * + * Module: library/mbedtls_md5.c + * Caller: library/mbedtls_md.c + * library/pem.c + * library/ssl_tls.c + * + * This module is required for SSL/TLS and X.509. + * PEM_PARSE uses MD5 for decrypting encrypted keys. + */ +#define MBEDTLS_MD5_C + +/** + * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Enable the buffer allocator implementation that makes use of a (stack) + * based buffer to 'allocate' dynamic memory. (replaces calloc() and free() + * calls) + * + * Module: library/memory_buffer_alloc.c + * + * Requires: MBEDTLS_PLATFORM_C + * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS) + * + * Enable this module to enable the buffer memory allocator. + */ +//#define MBEDTLS_MEMORY_BUFFER_ALLOC_C + +/** + * \def MBEDTLS_NET_C + * + * Enable the TCP/IP networking routines. + * + * Module: library/net.c + * + * This module provides TCP/IP networking routines. + */ +#define MBEDTLS_NET_C + +/** + * \def MBEDTLS_OID_C + * + * Enable the OID database. + * + * Module: library/oid.c + * Caller: library/asn1write.c + * library/pkcs5.c + * library/pkparse.c + * library/pkwrite.c + * library/rsa.c + * library/x509.c + * library/x509_create.c + * library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + * + * This modules translates between OIDs and internal values. + */ +#define MBEDTLS_OID_C + +/** + * \def MBEDTLS_PADLOCK_C + * + * Enable VIA Padlock support on x86. + * + * Module: library/padlock.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the VIA PadLock on x86. + */ +#define MBEDTLS_PADLOCK_C + +/** + * \def MBEDTLS_PEM_PARSE_C + * + * Enable PEM decoding / parsing. + * + * Module: library/pem.c + * Caller: library/dhm.c + * library/pkparse.c + * library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for decoding / parsing PEM files. + */ +#define MBEDTLS_PEM_PARSE_C + +/** + * \def MBEDTLS_PEM_WRITE_C + * + * Enable PEM encoding / writing. + * + * Module: library/pem.c + * Caller: library/pkwrite.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for encoding / writing PEM files. + */ +#define MBEDTLS_PEM_WRITE_C + +/** + * \def MBEDTLS_PK_C + * + * Enable the generic public (asymetric) key layer. + * + * Module: library/pk.c + * Caller: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C + * + * Uncomment to enable generic public key wrappers. + */ +#define MBEDTLS_PK_C + +/** + * \def MBEDTLS_PK_PARSE_C + * + * Enable the generic public (asymetric) key parser. + * + * Module: library/pkparse.c + * Caller: library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key parse functions. + */ +#define MBEDTLS_PK_PARSE_C + +/** + * \def MBEDTLS_PK_WRITE_C + * + * Enable the generic public (asymetric) key writer. + * + * Module: library/pkwrite.c + * Caller: library/x509write.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key write functions. + */ +#define MBEDTLS_PK_WRITE_C + +/** + * \def MBEDTLS_PKCS5_C + * + * Enable PKCS#5 functions. + * + * Module: library/pkcs5.c + * + * Requires: MBEDTLS_MD_C + * + * This module adds support for the PKCS#5 functions. + */ +#define MBEDTLS_PKCS5_C + +/** + * \def MBEDTLS_PKCS11_C + * + * Enable wrapper for PKCS#11 smartcard support. + * + * Module: library/pkcs11.c + * Caller: library/pk.c + * + * Requires: MBEDTLS_PK_C + * + * This module enables SSL/TLS PKCS #11 smartcard support. + * Requires the presence of the PKCS#11 helper library (libpkcs11-helper) + */ +//#define MBEDTLS_PKCS11_C + +/** + * \def MBEDTLS_PKCS12_C + * + * Enable PKCS#12 PBE functions. + * Adds algorithms for parsing PKCS#8 encrypted private keys + * + * Module: library/pkcs12.c + * Caller: library/pkparse.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * Can use: MBEDTLS_ARC4_C + * + * This module enables PKCS#12 functions. + */ +#define MBEDTLS_PKCS12_C + +/** + * \def MBEDTLS_PLATFORM_C + * + * Enable the platform abstraction layer that allows you to re-assign + * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit(). + * + * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT + * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned + * above to be specified at runtime or compile time respectively. + * + * \note This abstraction layer must be enabled on Windows (including MSYS2) + * as other module rely on it for a fixed snprintf implementation. + * + * Module: library/platform.c + * Caller: Most other .c files + * + * This module enables abstraction of common (libc) functions. + */ +#define MBEDTLS_PLATFORM_C + +/** + * \def MBEDTLS_RIPEMD160_C + * + * Enable the RIPEMD-160 hash algorithm. + * + * Module: library/mbedtls_ripemd160.c + * Caller: library/mbedtls_md.c + * + */ +#define MBEDTLS_RIPEMD160_C + +/** + * \def MBEDTLS_RSA_C + * + * Enable the RSA public-key cryptosystem. + * + * Module: library/rsa.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509.c + * + * This module is used by the following key exchanges: + * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C + */ +#define MBEDTLS_RSA_C + +/** + * \def MBEDTLS_SHA1_C + * + * Enable the SHA1 cryptographic hash algorithm. + * + * Module: library/mbedtls_sha1.c + * Caller: library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509write_crt.c + * + * This module is required for SSL/TLS and SHA1-signed certificates. + */ +#define MBEDTLS_SHA1_C + +/** + * \def MBEDTLS_SHA256_C + * + * Enable the SHA-224 and SHA-256 cryptographic hash algorithms. + * + * Module: library/mbedtls_sha256.c + * Caller: library/entropy.c + * library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module adds support for SHA-224 and SHA-256. + * This module is required for the SSL/TLS 1.2 PRF function. + */ +#define MBEDTLS_SHA256_C + +/** + * \def MBEDTLS_SHA512_C + * + * Enable the SHA-384 and SHA-512 cryptographic hash algorithms. + * + * Module: library/mbedtls_sha512.c + * Caller: library/entropy.c + * library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This module adds support for SHA-384 and SHA-512. + */ +#define MBEDTLS_SHA512_C + +/** + * \def MBEDTLS_SSL_CACHE_C + * + * Enable simple SSL cache implementation. + * + * Module: library/ssl_cache.c + * Caller: + * + * Requires: MBEDTLS_SSL_CACHE_C + */ +#define MBEDTLS_SSL_CACHE_C + +/** + * \def MBEDTLS_SSL_COOKIE_C + * + * Enable basic implementation of DTLS cookies for hello verification. + * + * Module: library/ssl_cookie.c + * Caller: + */ +#define MBEDTLS_SSL_COOKIE_C + +/** + * \def MBEDTLS_SSL_TICKET_C + * + * Enable an implementation of TLS server-side callbacks for session tickets. + * + * Module: library/ssl_ticket.c + * Caller: + * + * Requires: MBEDTLS_CIPHER_C + */ +#define MBEDTLS_SSL_TICKET_C + +/** + * \def MBEDTLS_SSL_CLI_C + * + * Enable the SSL/TLS client code. + * + * Module: library/ssl_cli.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS client support. + */ +#define MBEDTLS_SSL_CLI_C + +/** + * \def MBEDTLS_SSL_SRV_C + * + * Enable the SSL/TLS server code. + * + * Module: library/ssl_srv.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS server support. + */ +#define MBEDTLS_SSL_SRV_C + +/** + * \def MBEDTLS_SSL_TLS_C + * + * Enable the generic SSL/TLS code. + * + * Module: library/ssl_tls.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * and at least one of the MBEDTLS_SSL_PROTO_XXX defines + * + * This module is required for SSL/TLS. + */ +#define MBEDTLS_SSL_TLS_C + +/** + * \def MBEDTLS_THREADING_C + * + * Enable the threading abstraction layer. + * By default mbed TLS assumes it is used in a non-threaded environment or that + * contexts are not shared between threads. If you do intend to use contexts + * between threads, you will need to enable this layer to prevent race + * conditions. + * + * Module: library/threading.c + * + * This allows different threading implementations (self-implemented or + * provided). + * + * You will have to enable either MBEDTLS_THREADING_ALT or + * MBEDTLS_THREADING_PTHREAD. + * + * Enable this layer to allow use of mutexes within mbed TLS + */ +//#define MBEDTLS_THREADING_C + +/** + * \def MBEDTLS_TIMING_C + * + * Enable the portable timing interface. + * + * Module: library/timing.c + * Caller: library/havege.c + * + * This module is used by the HAVEGE random number generator. + */ +#define MBEDTLS_TIMING_C + +/** + * \def MBEDTLS_VERSION_C + * + * Enable run-time version information. + * + * Module: library/version.c + * + * This module provides run-time version information. + */ +#define MBEDTLS_VERSION_C + +/** + * \def MBEDTLS_X509_USE_C + * + * Enable X.509 core for using certificates. + * + * Module: library/x509.c + * Caller: library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, + * MBEDTLS_PK_PARSE_C + * + * This module is required for the X.509 parsing modules. + */ +#define MBEDTLS_X509_USE_C + +/** + * \def MBEDTLS_X509_CRT_PARSE_C + * + * Enable X.509 certificate parsing. + * + * Module: library/mbedtls_x509_crt.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 certificate parsing. + */ +#define MBEDTLS_X509_CRT_PARSE_C + +/** + * \def MBEDTLS_X509_CRL_PARSE_C + * + * Enable X.509 CRL parsing. + * + * Module: library/mbedtls_x509_crl.c + * Caller: library/mbedtls_x509_crt.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 CRL parsing. + */ +#define MBEDTLS_X509_CRL_PARSE_C + +/** + * \def MBEDTLS_X509_CSR_PARSE_C + * + * Enable X.509 Certificate Signing Request (CSR) parsing. + * + * Module: library/mbedtls_x509_csr.c + * Caller: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is used for reading X.509 certificate request. + */ +#define MBEDTLS_X509_CSR_PARSE_C + +/** + * \def MBEDTLS_X509_CREATE_C + * + * Enable X.509 core for creating certificates. + * + * Module: library/x509_create.c + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C + * + * This module is the basis for creating X.509 certificates and CSRs. + */ +#define MBEDTLS_X509_CREATE_C + +/** + * \def MBEDTLS_X509_CRT_WRITE_C + * + * Enable creating X.509 certificates. + * + * Module: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate creation. + */ +#define MBEDTLS_X509_CRT_WRITE_C + +/** + * \def MBEDTLS_X509_CSR_WRITE_C + * + * Enable creating X.509 Certificate Signing Requests (CSR). + * + * Module: library/x509_csr_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate request writing. + */ +#define MBEDTLS_X509_CSR_WRITE_C + +/** + * \def MBEDTLS_XTEA_C + * + * Enable the XTEA block cipher. + * + * Module: library/xtea.c + * Caller: + */ +#define MBEDTLS_XTEA_C + +/* \} name SECTION: mbed TLS modules */ + +/** + * \name SECTION: Module configuration options + * + * This section allows for the setting of module specific sizes and + * configuration options. The default values are already present in the + * relevant header files and should suffice for the regular use cases. + * + * Our advice is to enable options and change their values here + * only if you have a good reason and know the consequences. + * + * Please check the respective header file for documentation on these + * parameters (to prevent duplicate documentation). + * \{ + */ + +/* MPI / BIGNUM options */ +//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */ +//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */ + +/* CTR_DRBG options */ +//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */ +//#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* HMAC_DRBG options */ +//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* ECP options */ +//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */ +//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */ +//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */ + +/* Entropy options */ +//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */ +//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */ + +/* Memory buffer allocator options */ +//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */ + +/* Platform options */ +//#define MBEDTLS_PLATFORM_STD_MEM_HDR /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */ +//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */ +/* Note: your snprintf must correclty zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */ + +/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */ +/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */ +//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */ +/* Note: your snprintf must correclty zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */ + +/* SSL Cache options */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */ + +/* SSL options */ +//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384 /**< Maxium fragment length in bytes, determines the size of each of the two internal I/O buffers */ +//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */ +//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */ +//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */ + +/** + * Complete list of ciphersuites to use, in order of preference. + * + * \warning No dependency checking is done on that field! This option can only + * be used to restrict the set of available ciphersuites. It is your + * responsibility to make sure the needed modules are active. + * + * Use this to save a few hundred bytes of ROM (default ordering of all + * available ciphersuites) and a few to a few hundred bytes of RAM. + * + * The value below is only an example, not the default. + */ +//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + +/* X509 options */ +//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */ + +/* \} name SECTION: Module configuration options */ + +#if defined(TARGET_LIKE_MBED) +#include "mbedtls/target_config.h" +#endif + +/* + * Allow user to override any previous default. + * + * Use two macro names for that, as: + * - with yotta the prefix YOTTA_CFG_ is forced + * - without yotta is looks weird to have a YOTTA prefix. + */ +#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE) +#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE +#elif defined(MBEDTLS_USER_CONFIG_FILE) +#include MBEDTLS_USER_CONFIG_FILE +#endif + +#include "check_config.h" + +#endif /* MBEDTLS_CONFIG_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/config_esp.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/config_esp.h new file mode 100644 index 0000000..36abad0 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/config_esp.h @@ -0,0 +1,2525 @@ +/** + * \file config.h + * + * \brief Configuration options (set of defines) + * + * This set of compile-time options may be used to enable + * or disable features selectively, and reduce the global + * memory footprint. + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#ifndef MBEDTLS_CONFIG_H +#define MBEDTLS_CONFIG_H + +#include "c_types.h" + +#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) +#define _CRT_SECURE_NO_DEPRECATE 1 +#endif + +int system_get_data_of_array_8(const unsigned char *array, int size); +/** + * \name SECTION: System support + * + * This section sets system specific settings. + * \{ + */ + +/** + * \def MBEDTLS_HAVE_ASM + * + * The compiler has support for asm(). + * + * Requires support for asm() in compiler. + * + * Used in: + * library/timing.c + * library/padlock.c + * include/mbedtls/bn_mul.h + * + * Comment to disable the use of assembly code. + */ +#define MBEDTLS_HAVE_ASM + +/** + * \def MBEDTLS_HAVE_SSE2 + * + * CPU supports SSE2 instruction set. + * + * Uncomment if the CPU supports SSE2 (IA-32 specific). + */ +//#define MBEDTLS_HAVE_SSE2 + +/** + * \def MBEDTLS_HAVE_TIME + * + * System has time.h and time(). + * The time does not need to be correct, only time differences are used, + * by contrast with MBEDTLS_HAVE_TIME_DATE + * + * Comment if your system does not support time functions + */ +//#define MBEDTLS_HAVE_TIME + +/** + * \def MBEDTLS_HAVE_TIME_DATE + * + * System has time.h and time(), gmtime() and the clock is correct. + * The time needs to be correct (not necesarily very accurate, but at least + * the date should be correct). This is used to verify the validity period of + * X.509 certificates. + * + * Comment if your system does not have a correct clock. + */ +//#define MBEDTLS_HAVE_TIME_DATE + +/** + * \def MBEDTLS_PLATFORM_MEMORY + * + * Enable the memory allocation layer. + * + * By default mbed TLS uses the system-provided calloc() and free(). + * This allows different allocators (self-implemented or provided) to be + * provided to the platform abstraction layer. + * + * Enabling MBEDTLS_PLATFORM_MEMORY without the + * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide + * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and + * free() function pointer at runtime. + * + * Enabling MBEDTLS_PLATFORM_MEMORY and specifying + * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the + * alternate function at compile time. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Enable this layer to allow use of alternative memory allocators. + */ +//#define MBEDTLS_PLATFORM_MEMORY + +/** + * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + * + * Do not assign standard functions in the platform layer (e.g. calloc() to + * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF) + * + * This makes sure there are no linking errors on platforms that do not support + * these functions. You will HAVE to provide alternatives, either at runtime + * via the platform_set_xxx() functions or at compile time by setting + * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a + * MBEDTLS_PLATFORM_XXX_MACRO. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Uncomment to prevent default assignment of standard functions in the + * platform layer. + */ +//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +/** + * \def MBEDTLS_PLATFORM_EXIT_ALT + * + * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the + * function in the platform abstraction layer. + * + * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will + * provide a function "mbedtls_platform_set_printf()" that allows you to set an + * alternative printf function pointer. + * + * All these define require MBEDTLS_PLATFORM_C to be defined! + * + * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows; + * it will be enabled automatically by check_config.h + * + * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as + * MBEDTLS_PLATFORM_XXX_MACRO! + * + * Uncomment a macro to enable alternate implementation of specific base + * platform function + */ +//#define MBEDTLS_PLATFORM_EXIT_ALT +//#define MBEDTLS_PLATFORM_FPRINTF_ALT +//#define MBEDTLS_PLATFORM_PRINTF_ALT +//#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +/** + * \def MBEDTLS_DEPRECATED_WARNING + * + * Mark deprecated functions so that they generate a warning if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * This only works with GCC and Clang. With other compilers, you may want to + * use MBEDTLS_DEPRECATED_REMOVED + * + * Uncomment to get warnings on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_WARNING + +/** + * \def MBEDTLS_DEPRECATED_REMOVED + * + * Remove deprecated functions so that they generate an error if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * Uncomment to get errors on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_REMOVED + +/* \} name SECTION: System support */ + +/** + * \name SECTION: mbed TLS feature support + * + * This section sets support for features that are or are not needed + * within the modules that are enabled. + * \{ + */ + +/** + * \def MBEDTLS_TIMING_ALT + * + * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(), + * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay() + * + * Only works if you have MBEDTLS_TIMING_C enabled. + * + * You will need to provide a header "timing_alt.h" and an implementation at + * compile time. + */ +//#define MBEDTLS_TIMING_ALT + +/** + * \def MBEDTLS_AES_ALT + * + * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your + * alternate core implementation of a symmetric crypto or hash module (e.g. + * platform specific assembly optimized implementations). Keep in mind that + * the function prototypes should remain the same. + * + * This replaces the whole module. If you only want to replace one of the + * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer + * provide the "struct mbedtls_aes_context" definition and omit the base function + * declarations and implementations. "aes_alt.h" will be included from + * "aes.h" to include the new function definitions. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * module. + */ +//#define MBEDTLS_AES_ALT +//#define MBEDTLS_ARC4_ALT +//#define MBEDTLS_BLOWFISH_ALT +//#define MBEDTLS_CAMELLIA_ALT +//#define MBEDTLS_DES_ALT +//#define MBEDTLS_XTEA_ALT +//#define MBEDTLS_MD2_ALT +//#define MBEDTLS_MD4_ALT +//#define MBEDTLS_MD5_ALT +//#define MBEDTLS_RIPEMD160_ALT +//#define MBEDTLS_SHA1_ALT +//#define MBEDTLS_SHA256_ALT +//#define MBEDTLS_SHA512_ALT + +/** + * \def MBEDTLS_MD2_PROCESS_ALT + * + * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you + * alternate core implementation of symmetric crypto or hash function. Keep in + * mind that function prototypes should remain the same. + * + * This replaces only one function. The header file from mbed TLS is still + * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will + * no longer provide the mbedtls_sha1_process() function, but it will still provide + * the other function (using your mbedtls_sha1_process() function) and the definition + * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible + * with this definition. + * + * Note: if you use the AES_xxx_ALT macros, then is is recommended to also set + * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES + * tables. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * function. + */ +//#define MBEDTLS_MD2_PROCESS_ALT +//#define MBEDTLS_MD4_PROCESS_ALT +//#define MBEDTLS_MD5_PROCESS_ALT +//#define MBEDTLS_RIPEMD160_PROCESS_ALT +//#define MBEDTLS_SHA1_PROCESS_ALT +//#define MBEDTLS_SHA256_PROCESS_ALT +//#define MBEDTLS_SHA512_PROCESS_ALT +//#define MBEDTLS_DES_SETKEY_ALT +//#define MBEDTLS_DES_CRYPT_ECB_ALT +//#define MBEDTLS_DES3_CRYPT_ECB_ALT +//#define MBEDTLS_AES_SETKEY_ENC_ALT +//#define MBEDTLS_AES_SETKEY_DEC_ALT +//#define MBEDTLS_AES_ENCRYPT_ALT +//#define MBEDTLS_AES_DECRYPT_ALT + +/** + * \def MBEDTLS_ENTROPY_HARDWARE_ALT + * + * Uncomment this macro to let mbed TLS use your own implementation of a + * hardware entropy collector. + * + * Your function must be called \c mbedtls_hardware_poll(), have the same + * prototype as declared in entropy_poll.h, and accept NULL as first argument. + * + * Uncomment to use your own hardware entropy collector. + */ +#define MBEDTLS_ENTROPY_HARDWARE_ALT + +/** + * \def MBEDTLS_AES_ROM_TABLES + * + * Store the AES tables in ROM. + * + * Uncomment this macro to store the AES tables in ROM. + */ +#define MBEDTLS_AES_ROM_TABLES + +/** + * \def MBEDTLS_CAMELLIA_SMALL_MEMORY + * + * Use less ROM for the Camellia implementation (saves about 768 bytes). + * + * Uncomment this macro to use less memory for Camellia. + */ +//#define MBEDTLS_CAMELLIA_SMALL_MEMORY + +/** + * \def MBEDTLS_CIPHER_MODE_CBC + * + * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CBC + +/** + * \def MBEDTLS_CIPHER_MODE_CFB + * + * Enable Cipher Feedback mode (CFB) for symmetric ciphers. + */ +//#define MBEDTLS_CIPHER_MODE_CFB + +/** + * \def MBEDTLS_CIPHER_MODE_CTR + * + * Enable Counter Block Cipher mode (CTR) for symmetric ciphers. + */ +//#define MBEDTLS_CIPHER_MODE_CTR + +/** + * \def MBEDTLS_CIPHER_NULL_CIPHER + * + * Enable NULL cipher. + * Warning: Only do so when you know what you are doing. This allows for + * encryption or channels without any security! + * + * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable + * the following ciphersuites: + * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA + * + * Uncomment this macro to enable the NULL cipher and ciphersuites + */ +//#define MBEDTLS_CIPHER_NULL_CIPHER + +/** + * \def MBEDTLS_CIPHER_PADDING_PKCS7 + * + * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for + * specific padding modes in the cipher layer with cipher modes that support + * padding (e.g. CBC) + * + * If you disable all padding modes, only full blocks can be used with CBC. + * + * Enable padding modes in the cipher layer. + */ +//#define MBEDTLS_CIPHER_PADDING_PKCS7 +//#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS +//#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN +//#define MBEDTLS_CIPHER_PADDING_ZEROS + +/** + * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES + * + * Enable weak ciphersuites in SSL / TLS. + * Warning: Only do so when you know what you are doing. This allows for + * channels with virtually no security at all! + * + * This enables the following ciphersuites: + * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA + * + * Uncomment this macro to enable weak ciphersuites + */ +//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES + +/** + * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES + * + * Remove RC4 ciphersuites by default in SSL / TLS. + * This flag removes the ciphersuites based on RC4 from the default list as + * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to + * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them + * explicitly. + * + * Uncomment this macro to remove RC4 ciphersuites by default. + */ +#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES + +/** + * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED + * + * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve + * module. By default all supported curves are enabled. + * + * Comment macros to disable the curve and functions for it + */ +//#define MBEDTLS_ECP_DP_SECP192R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP224R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP384R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP521R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP192K1_ENABLED +//#define MBEDTLS_ECP_DP_SECP224K1_ENABLED +//#define MBEDTLS_ECP_DP_SECP256K1_ENABLED +//#define MBEDTLS_ECP_DP_BP256R1_ENABLED +//#define MBEDTLS_ECP_DP_BP384R1_ENABLED +//#define MBEDTLS_ECP_DP_BP512R1_ENABLED +//#define MBEDTLS_ECP_DP_CURVE25519_ENABLED + +/** + * \def MBEDTLS_ECP_NIST_OPTIM + * + * Enable specific 'modulo p' routines for each NIST prime. + * Depending on the prime and architecture, makes operations 4 to 8 times + * faster on the corresponding curve. + * + * Comment this macro to disable NIST curves optimisation. + */ +//#define MBEDTLS_ECP_NIST_OPTIM + +/** + * \def MBEDTLS_ECDSA_DETERMINISTIC + * + * Enable deterministic ECDSA (RFC 6979). + * Standard ECDSA is "fragile" in the sense that lack of entropy when signing + * may result in a compromise of the long-term signing key. This is avoided by + * the deterministic variant. + * + * Requires: MBEDTLS_HMAC_DRBG_C + * + * Comment this macro to disable deterministic ECDSA. + */ +//#define MBEDTLS_ECDSA_DETERMINISTIC + +/** + * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + * + * Enable the PSK based ciphersuite modes in SSL / TLS. + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + * + * Enable the DHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + * + * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + * + * Enable the RSA-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + * + * Enable the RSA-only based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + * + * Enable the DHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + * + * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + * + * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C, + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + * + * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + * + * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + * + * Enable the ECJPAKE based ciphersuite modes in SSL / TLS. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Requires: MBEDTLS_ECJPAKE_C + * MBEDTLS_SHA256_C + * MBEDTLS_ECP_DP_SECP256R1_ENABLED + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + +/** + * \def MBEDTLS_PK_PARSE_EC_EXTENDED + * + * Enhance support for reading EC keys using variants of SEC1 not allowed by + * RFC 5915 and RFC 5480. + * + * Currently this means parsing the SpecifiedECDomain choice of EC + * parameters (only known groups are supported, not arbitrary domains, to + * avoid validation issues). + * + * Disable if you only need to support RFC 5915 + 5480 key formats. + */ +#define MBEDTLS_PK_PARSE_EC_EXTENDED + +/** + * \def MBEDTLS_ERROR_STRERROR_DUMMY + * + * Enable a dummy error function to make use of mbedtls_strerror() in + * third party libraries easier when MBEDTLS_ERROR_C is disabled + * (no effect when MBEDTLS_ERROR_C is enabled). + * + * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're + * not using mbedtls_strerror() or error_strerror() in your application. + * + * Disable if you run into name conflicts and want to really remove the + * mbedtls_strerror() + */ +#define MBEDTLS_ERROR_STRERROR_DUMMY + +/** + * \def MBEDTLS_GENPRIME + * + * Enable the prime-number generation code. + * + * Requires: MBEDTLS_BIGNUM_C + */ +#define MBEDTLS_GENPRIME + +/** + * \def MBEDTLS_FS_IO + * + * Enable functions that use the filesystem. + */ +//#define MBEDTLS_FS_IO + +/** + * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + * + * Do not add default entropy sources. These are the platform specific, + * mbedtls_timing_hardclock and HAVEGE based poll functions. + * + * This is useful to have more control over the added entropy sources in an + * application. + * + * Uncomment this macro to prevent loading of default entropy functions. + */ +//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/** + * \def MBEDTLS_NO_PLATFORM_ENTROPY + * + * Do not use built-in platform entropy functions. + * This is useful if your platform does not support + * standards like the /dev/urandom or Windows CryptoAPI. + * + * Uncomment this macro to disable the built-in platform entropy functions. + */ +#define MBEDTLS_NO_PLATFORM_ENTROPY + +/** + * \def MBEDTLS_ENTROPY_FORCE_SHA256 + * + * Force the entropy accumulator to use a SHA-256 accumulator instead of the + * default SHA-512 based one (if both are available). + * + * Requires: MBEDTLS_SHA256_C + * + * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option + * if you have performance concerns. + * + * This option is only useful if both MBEDTLS_SHA256_C and + * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used. + */ +//#define MBEDTLS_ENTROPY_FORCE_SHA256 + +/** + * \def MBEDTLS_MEMORY_DEBUG + * + * Enable debugging of buffer allocator memory issues. Automatically prints + * (to stderr) all (fatal) messages on memory allocation issues. Enables + * function for 'debug output' of allocated memory. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Uncomment this macro to let the buffer allocator print out error messages. + */ +//#define MBEDTLS_MEMORY_DEBUG + +/** + * \def MBEDTLS_MEMORY_BACKTRACE + * + * Include backtrace information with each allocated block. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * GLIBC-compatible backtrace() an backtrace_symbols() support + * + * Uncomment this macro to include backtrace information + */ +//#define MBEDTLS_MEMORY_BACKTRACE + +/** + * \def MBEDTLS_PK_RSA_ALT_SUPPORT + * + * Support external private RSA keys (eg from a HSM) in the PK layer. + * + * Comment this macro to disable support for external private RSA keys. + */ +#define MBEDTLS_PK_RSA_ALT_SUPPORT + +/** + * \def MBEDTLS_PKCS1_V15 + * + * Enable support for PKCS#1 v1.5 encoding. + * + * Requires: MBEDTLS_RSA_C + * + * This enables support for PKCS#1 v1.5 operations. + */ +#define MBEDTLS_PKCS1_V15 + +/** + * \def MBEDTLS_PKCS1_V21 + * + * Enable support for PKCS#1 v2.1 encoding. + * + * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C + * + * This enables support for RSAES-OAEP and RSASSA-PSS operations. + */ +#define MBEDTLS_PKCS1_V21 + +/** + * \def MBEDTLS_RSA_NO_CRT + * + * Do not use the Chinese Remainder Theorem for the RSA private operation. + * + * Uncomment this macro to disable the use of CRT in RSA. + * + */ +//#define MBEDTLS_RSA_NO_CRT + +/** + * \def MBEDTLS_SELF_TEST + * + * Enable the checkup functions (*_self_test). + */ +//#define MBEDTLS_SELF_TEST + +/** + * \def MBEDTLS_SHA256_SMALLER + * + * Enable an implementation of SHA-256 that has lower ROM footprint but also + * lower performance. + * + * The default implementation is meant to be a reasonnable compromise between + * performance and size. This version optimizes more aggressively for size at + * the expense of performance. Eg on Cortex-M4 it reduces the size of + * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about + * 30%. + * + * Uncomment to enable the smaller implementation of SHA256. + */ +//#define MBEDTLS_SHA256_SMALLER + +/** + * \def MBEDTLS_SSL_AEAD_RANDOM_IV + * + * Generate a random IV rather than using the record sequence number as a + * nonce for ciphersuites using and AEAD algorithm (GCM or CCM). + * + * Using the sequence number is generally recommended. + * + * Uncomment this macro to always use random IVs with AEAD ciphersuites. + */ +//#define MBEDTLS_SSL_AEAD_RANDOM_IV + +/** + * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES + * + * Enable sending of alert messages in case of encountered errors as per RFC. + * If you choose not to send the alert messages, mbed TLS can still communicate + * with other servers, only debugging of failures is harder. + * + * The advantage of not sending alert messages, is that no information is given + * about reasons for failures thus preventing adversaries of gaining intel. + * + * Enable sending of all alert messages + */ +#define MBEDTLS_SSL_ALL_ALERT_MESSAGES + +/** + * \def MBEDTLS_SSL_DEBUG_ALL + * + * Enable the debug messages in SSL module for all issues. + * Debug messages have been disabled in some places to prevent timing + * attacks due to (unbalanced) debugging function calls. + * + * If you need all error reporting you should enable this during debugging, + * but remove this for production servers that should log as well. + * + * Uncomment this macro to report all debug messages on errors introducing + * a timing side-channel. + * + */ +//#define MBEDTLS_SSL_DEBUG_ALL + +/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC + * + * Enable support for Encrypt-then-MAC, RFC 7366. + * + * This allows peers that both support it to use a more robust protection for + * ciphersuites using CBC, providing deep resistance against timing attacks + * on the padding or underlying cipher. + * + * This only affects CBC ciphersuites, and is useless if none is defined. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Encrypt-then-MAC + */ +//#define MBEDTLS_SSL_ENCRYPT_THEN_MAC + +/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET + * + * Enable support for Extended Master Secret, aka Session Hash + * (draft-ietf-tls-session-hash-02). + * + * This was introduced as "the proper fix" to the Triple Handshake familiy of + * attacks, but it is recommended to always use it (even if you disable + * renegotiation), since it actually fixes a more fundamental issue in the + * original SSL/TLS design, and has implications beyond Triple Handshake. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Extended Master Secret. + */ +//#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET + +/** + * \def MBEDTLS_SSL_FALLBACK_SCSV + * + * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00). + * + * For servers, it is recommended to always enable this, unless you support + * only one version of TLS, or know for sure that none of your clients + * implements a fallback strategy. + * + * For clients, you only need this if you're using a fallback strategy, which + * is not recommended in the first place, unless you absolutely need it to + * interoperate with buggy (version-intolerant) servers. + * + * Comment this macro to disable support for FALLBACK_SCSV + */ +//#define MBEDTLS_SSL_FALLBACK_SCSV + +/** + * \def MBEDTLS_SSL_HW_RECORD_ACCEL + * + * Enable hooking functions in SSL module for hardware acceleration of + * individual records. + * + * Uncomment this macro to enable hooking functions. + */ +//#define MBEDTLS_SSL_HW_RECORD_ACCEL + +/** + * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING + * + * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0. + * + * This is a countermeasure to the BEAST attack, which also minimizes the risk + * of interoperability issues compared to sending 0-length records. + * + * Comment this macro to disable 1/n-1 record splitting. + */ +//#define MBEDTLS_SSL_CBC_RECORD_SPLITTING + +/** + * \def MBEDTLS_SSL_RENEGOTIATION + * + * Disable support for TLS renegotiation. + * + * The two main uses of renegotiation are (1) refresh keys on long-lived + * connections and (2) client authentication after the initial handshake. + * If you don't need renegotiation, it's probably better to disable it, since + * it has been associated with security issues in the past and is easy to + * misuse/misunderstand. + * + * Comment this to disable support for renegotiation. + */ +//#define MBEDTLS_SSL_RENEGOTIATION + +/** + * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + * + * Enable support for receiving and parsing SSLv2 Client Hello messages for the + * SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to enable support for SSLv2 Client Hello messages. + */ +//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + +/** + * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + * + * Pick the ciphersuite according to the client's preferences rather than ours + * in the SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to respect client's ciphersuite order + */ +//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + +/** + * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + * + * Enable support for RFC 6066 max_fragment_length extension in SSL. + * + * Comment this macro to disable support for the max_fragment_length extension + */ +//#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + +/** + * \def MBEDTLS_SSL_PROTO_SSL3 + * + * Enable support for SSL 3.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for SSL 3.0 + */ +#define MBEDTLS_SSL_PROTO_SSL3 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1 + * + * Enable support for TLS 1.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.0 + */ +#define MBEDTLS_SSL_PROTO_TLS1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_1 + * + * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled). + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.1 / DTLS 1.0 + */ +#define MBEDTLS_SSL_PROTO_TLS1_1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_2 + * + * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled). + * + * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C + * (Depends on ciphersuites) + * + * Comment this macro to disable support for TLS 1.2 / DTLS 1.2 + */ +#define MBEDTLS_SSL_PROTO_TLS1_2 + +/** + * \def MBEDTLS_SSL_PROTO_DTLS + * + * Enable support for DTLS (all available versions). + * + * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0, + * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1_1 + * or MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for DTLS + */ +//#define MBEDTLS_SSL_PROTO_DTLS + +/** + * \def MBEDTLS_SSL_ALPN + * + * Enable support for RFC 7301 Application Layer Protocol Negotiation. + * + * Comment this macro to disable support for ALPN. + */ +//#define MBEDTLS_SSL_ALPN + +/** + * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY + * + * Enable support for the anti-replay mechanism in DTLS. + * + * Requires: MBEDTLS_SSL_TLS_C + * MBEDTLS_SSL_PROTO_DTLS + * + * \warning Disabling this is often a security risk! + * See mbedtls_ssl_conf_dtls_anti_replay() for details. + * + * Comment this to disable anti-replay in DTLS. + */ +//#define MBEDTLS_SSL_DTLS_ANTI_REPLAY + +/** + * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Enable support for HelloVerifyRequest on DTLS servers. + * + * This feature is highly recommended to prevent DTLS servers being used as + * amplifiers in DoS attacks against other hosts. It should always be enabled + * unless you know for sure amplification cannot be a problem in the + * environment in which your server operates. + * + * \warning Disabling this can ba a security risk! (see above) + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Comment this to disable support for HelloVerifyRequest. + */ +//#define MBEDTLS_SSL_DTLS_HELLO_VERIFY + +/** + * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + * + * Enable server-side support for clients that reconnect from the same port. + * + * Some clients unexpectedly close the connection and try to reconnect using the + * same source port. This needs special support from the server to handle the + * new connection securely, as described in section 4.2.8 of RFC 6347. This + * flag enables that support. + * + * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Comment this to disable support for clients reusing the source port. + */ +//#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + +/** + * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT + * + * Enable support for a limit of records with bad MAC. + * + * See mbedtls_ssl_conf_dtls_badmac_limit(). + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + */ +//#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT + +/** + * \def MBEDTLS_SSL_SESSION_TICKETS + * + * Enable support for RFC 5077 session tickets in SSL. + * Client-side, provides full support for session tickets (maintainance of a + * session store remains the responsibility of the application, though). + * Server-side, you also need to provide callbacks for writing and parsing + * tickets, including authenticated encryption and key management. Example + * callbacks are provided by MBEDTLS_SSL_TICKET_C. + * + * Comment this macro to disable support for SSL session tickets + */ +//#define MBEDTLS_SSL_SESSION_TICKETS + +/** + * \def MBEDTLS_SSL_EXPORT_KEYS + * + * Enable support for exporting key block and master secret. + * This is required for certain users of TLS, e.g. EAP-TLS. + * + * Comment this macro to disable support for key export + */ +//#define MBEDTLS_SSL_EXPORT_KEYS + +/** + * \def MBEDTLS_SSL_SERVER_NAME_INDICATION + * + * Enable support for RFC 6066 server name indication (SNI) in SSL. + * + * Requires: MBEDTLS_X509_CRT_PARSE_C + * + * Comment this macro to disable support for server name indication in SSL + */ +#define MBEDTLS_SSL_SERVER_NAME_INDICATION + +/** + * \def MBEDTLS_SSL_TRUNCATED_HMAC + * + * Enable support for RFC 6066 truncated HMAC in SSL. + * + * Comment this macro to disable support for truncated HMAC in SSL + */ +//#define MBEDTLS_SSL_TRUNCATED_HMAC + +/** + * \def MBEDTLS_THREADING_ALT + * + * Provide your own alternate threading implementation. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to allow your own alternate threading implementation. + */ +//#define MBEDTLS_THREADING_ALT + +/** + * \def MBEDTLS_THREADING_PTHREAD + * + * Enable the pthread wrapper layer for the threading layer. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to enable pthread mutexes. + */ +//#define MBEDTLS_THREADING_PTHREAD + +/** + * \def MBEDTLS_VERSION_FEATURES + * + * Allow run-time checking of compile-time enabled features. Thus allowing users + * to check at run-time if the library is for instance compiled with threading + * support via mbedtls_version_check_feature(). + * + * Requires: MBEDTLS_VERSION_C + * + * Comment this to disable run-time checking and save ROM space + */ +//#define MBEDTLS_VERSION_FEATURES + +/** + * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an extension in a v1 or v2 certificate. + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + +/** + * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an unknown critical extension. + * + * \warning Depending on your PKI use, enabling this can be a security risk! + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + +/** + * \def MBEDTLS_X509_CHECK_KEY_USAGE + * + * Enable verification of the keyUsage extension (CA and leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused + * (intermediate) CA and leaf certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip keyUsage checking for both CA and leaf certificates. + */ +//#define MBEDTLS_X509_CHECK_KEY_USAGE + +/** + * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + * + * Enable verification of the extendedKeyUsage extension (leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip extendedKeyUsage checking for certificates. + */ +//#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + +/** + * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT + * + * Enable parsing and verification of X.509 certificates, CRLs and CSRS + * signed with RSASSA-PSS (aka PKCS#1 v2.1). + * + * Comment this macro to disallow using RSASSA-PSS in certificates. + */ +//#define MBEDTLS_X509_RSASSA_PSS_SUPPORT + +/** + * \def MBEDTLS_ZLIB_SUPPORT + * + * If set, the SSL/TLS module uses ZLIB to support compression and + * decompression of packet data. + * + * \warning TLS-level compression MAY REDUCE SECURITY! See for example the + * CRIME attack. Before enabling this option, you should examine with care if + * CRIME or similar exploits may be a applicable to your use case. + * + * \note Currently compression can't be used with DTLS. + * + * Used in: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This feature requires zlib library and headers to be present. + * + * Uncomment to enable use of ZLIB + */ +//#define MBEDTLS_ZLIB_SUPPORT +/* \} name SECTION: mbed TLS feature support */ + +/** + * \name SECTION: mbed TLS modules + * + * This section enables or disables entire modules in mbed TLS + * \{ + */ + +/** + * \def MBEDTLS_AESNI_C + * + * Enable AES-NI support on x86-64. + * + * Module: library/aesni.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the AES-NI instructions on x86-64 + */ +#define MBEDTLS_AESNI_C + +/** + * \def MBEDTLS_AES_C + * + * Enable the AES block cipher. + * + * Module: library/aes.c + * Caller: library/ssl_tls.c + * library/pem.c + * library/ctr_drbg.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * + * PEM_PARSE uses AES for decrypting encrypted keys. + */ +#define MBEDTLS_AES_C + +/** + * \def MBEDTLS_ARC4_C + * + * Enable the ARCFOUR stream cipher. + * + * Module: library/arc4.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_ARC4_C + +/** + * \def MBEDTLS_ASN1_PARSE_C + * + * Enable the generic ASN1 parser. + * + * Module: library/asn1.c + * Caller: library/x509.c + * library/dhm.c + * library/pkcs12.c + * library/pkcs5.c + * library/pkparse.c + */ +#define MBEDTLS_ASN1_PARSE_C + +/** + * \def MBEDTLS_ASN1_WRITE_C + * + * Enable the generic ASN1 writer. + * + * Module: library/asn1write.c + * Caller: library/ecdsa.c + * library/pkwrite.c + * library/x509_create.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + */ +#define MBEDTLS_ASN1_WRITE_C + +/** + * \def MBEDTLS_BASE64_C + * + * Enable the Base64 module. + * + * Module: library/base64.c + * Caller: library/pem.c + * + * This module is required for PEM support (required by X.509). + */ +#define MBEDTLS_BASE64_C + +/** + * \def MBEDTLS_BIGNUM_C + * + * Enable the multi-precision integer library. + * + * Module: library/bignum.c + * Caller: library/dhm.c + * library/ecp.c + * library/ecdsa.c + * library/rsa.c + * library/ssl_tls.c + * + * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support. + */ +#define MBEDTLS_BIGNUM_C + +/** + * \def MBEDTLS_BLOWFISH_C + * + * Enable the Blowfish block cipher. + * + * Module: library/blowfish.c + */ +//#define MBEDTLS_BLOWFISH_C + +/** + * \def MBEDTLS_CAMELLIA_C + * + * Enable the Camellia block cipher. + * + * Module: library/camellia.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +//#define MBEDTLS_CAMELLIA_C + +/** + * \def MBEDTLS_CCM_C + * + * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher. + * + * Module: library/ccm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-CCM ciphersuites, if other requisites are + * enabled as well. + */ +//#define MBEDTLS_CCM_C + +/** + * \def MBEDTLS_CERTS_C + * + * Enable the test certificates. + * + * Module: library/certs.c + * Caller: + * + * This module is used for testing (ssl_client/server). + */ +//#define MBEDTLS_CERTS_C + +/** + * \def MBEDTLS_CIPHER_C + * + * Enable the generic cipher layer. + * + * Module: library/cipher.c + * Caller: library/ssl_tls.c + * + * Uncomment to enable generic cipher wrappers. + */ +#define MBEDTLS_CIPHER_C + +/** + * \def MBEDTLS_CTR_DRBG_C + * + * Enable the CTR_DRBG AES-256-based random generator. + * + * Module: library/ctr_drbg.c + * Caller: + * + * Requires: MBEDTLS_AES_C + * + * This module provides the CTR_DRBG AES-256 random number generator. + */ +#define MBEDTLS_CTR_DRBG_C + +/** + * \def MBEDTLS_DEBUG_C + * + * Enable the debug functions. + * + * Module: library/debug.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module provides debugging functions. + */ +//#define MBEDTLS_DEBUG_C + +/** + * \def MBEDTLS_DES_C + * + * Enable the DES block cipher. + * + * Module: library/des.c + * Caller: library/pem.c + * library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * + * PEM_PARSE uses DES/3DES for decrypting encrypted keys. + */ +//#define MBEDTLS_DES_C + +/** + * \def MBEDTLS_DHM_C + * + * Enable the Diffie-Hellman-Merkle module. + * + * Module: library/dhm.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * DHE-RSA, DHE-PSK + */ +#define MBEDTLS_DHM_C + +/** + * \def MBEDTLS_ECDH_C + * + * Enable the elliptic curve Diffie-Hellman library. + * + * Module: library/ecdh.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK + * + * Requires: MBEDTLS_ECP_C + */ +//#define MBEDTLS_ECDH_C + +/** + * \def MBEDTLS_ECDSA_C + * + * Enable the elliptic curve DSA library. + * + * Module: library/ecdsa.c + * Caller: + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C + */ +//#define MBEDTLS_ECDSA_C + +/** + * \def MBEDTLS_ECJPAKE_C + * + * Enable the elliptic curve J-PAKE library. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Module: library/ecjpake.c + * Caller: + * + * This module is used by the following key exchanges: + * ECJPAKE + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C + */ +//#define MBEDTLS_ECJPAKE_C + +/** + * \def MBEDTLS_ECP_C + * + * Enable the elliptic curve over GF(p) library. + * + * Module: library/ecp.c + * Caller: library/ecdh.c + * library/ecdsa.c + * library/ecjpake.c + * + * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED + */ +//#define MBEDTLS_ECP_C + +/** + * \def MBEDTLS_ENTROPY_C + * + * Enable the platform-specific entropy code. + * + * Module: library/entropy.c + * Caller: + * + * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C + * + * This module provides a generic entropy pool + */ +#define MBEDTLS_ENTROPY_C + +/** + * \def MBEDTLS_ERROR_C + * + * Enable error code to error string conversion. + * + * Module: library/error.c + * Caller: + * + * This module enables mbedtls_strerror(). + */ +//#define MBEDTLS_ERROR_C + +/** + * \def MBEDTLS_GCM_C + * + * Enable the Galois/Counter Mode (GCM) for AES. + * + * Module: library/gcm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other + * requisites are enabled as well. + */ +//#define MBEDTLS_GCM_C //764 Byte + +/** + * \def MBEDTLS_HAVEGE_C + * + * Enable the HAVEGE random generator. + * + * Warning: the HAVEGE random generator is not suitable for virtualized + * environments + * + * Warning: the HAVEGE random generator is dependent on timing and specific + * processor traits. It is therefore not advised to use HAVEGE as + * your applications primary random generator or primary entropy pool + * input. As a secondary input to your entropy pool, it IS able add + * the (limited) extra entropy it provides. + * + * Module: library/havege.c + * Caller: + * + * Requires: MBEDTLS_TIMING_C + * + * Uncomment to enable the HAVEGE random generator. + */ +//#define MBEDTLS_HAVEGE_C + +/** + * \def MBEDTLS_HMAC_DRBG_C + * + * Enable the HMAC_DRBG random generator. + * + * Module: library/hmac_drbg.c + * Caller: + * + * Requires: MBEDTLS_MD_C + * + * Uncomment to enable the HMAC_DRBG random number geerator. + */ +//#define MBEDTLS_HMAC_DRBG_C + +/** + * \def MBEDTLS_MD_C + * + * Enable the generic message digest layer. + * + * Module: library/mbedtls_md.c + * Caller: + * + * Uncomment to enable generic message digest wrappers. + */ +#define MBEDTLS_MD_C + +/** + * \def MBEDTLS_MD2_C + * + * Enable the MD2 hash algorithm. + * + * Module: library/mbedtls_md2.c + * Caller: + * + * Uncomment to enable support for (rare) MD2-signed X.509 certs. + */ +//#define MBEDTLS_MD2_C + +/** + * \def MBEDTLS_MD4_C + * + * Enable the MD4 hash algorithm. + * + * Module: library/mbedtls_md4.c + * Caller: + * + * Uncomment to enable support for (rare) MD4-signed X.509 certs. + */ +//#define MBEDTLS_MD4_C + +/** + * \def MBEDTLS_MD5_C + * + * Enable the MD5 hash algorithm. + * + * Module: library/mbedtls_md5.c + * Caller: library/mbedtls_md.c + * library/pem.c + * library/ssl_tls.c + * + * This module is required for SSL/TLS and X.509. + * PEM_PARSE uses MD5 for decrypting encrypted keys. + */ +#define MBEDTLS_MD5_C + +/** + * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Enable the buffer allocator implementation that makes use of a (stack) + * based buffer to 'allocate' dynamic memory. (replaces calloc() and free() + * calls) + * + * Module: library/memory_buffer_alloc.c + * + * Requires: MBEDTLS_PLATFORM_C + * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS) + * + * Enable this module to enable the buffer memory allocator. + */ +//#define MBEDTLS_MEMORY_BUFFER_ALLOC_C + +/** + * \def MBEDTLS_NET_C + * + * Enable the TCP/IP networking routines. + * + * Module: library/net.c + * + * This module provides TCP/IP networking routines. + */ +//#define MBEDTLS_NET_C + +/** + * \def MBEDTLS_OID_C + * + * Enable the OID database. + * + * Module: library/oid.c + * Caller: library/asn1write.c + * library/pkcs5.c + * library/pkparse.c + * library/pkwrite.c + * library/rsa.c + * library/x509.c + * library/x509_create.c + * library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + * + * This modules translates between OIDs and internal values. + */ +#define MBEDTLS_OID_C + +/** + * \def MBEDTLS_PADLOCK_C + * + * Enable VIA Padlock support on x86. + * + * Module: library/padlock.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the VIA PadLock on x86. + */ +//#define MBEDTLS_PADLOCK_C + +/** + * \def MBEDTLS_PEM_PARSE_C + * + * Enable PEM decoding / parsing. + * + * Module: library/pem.c + * Caller: library/dhm.c + * library/pkparse.c + * library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for decoding / parsing PEM files. + */ +#define MBEDTLS_PEM_PARSE_C + +/** + * \def MBEDTLS_PEM_WRITE_C + * + * Enable PEM encoding / writing. + * + * Module: library/pem.c + * Caller: library/pkwrite.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for encoding / writing PEM files. + */ +#define MBEDTLS_PEM_WRITE_C + +/** + * \def MBEDTLS_PK_C + * + * Enable the generic public (asymetric) key layer. + * + * Module: library/pk.c + * Caller: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C + * + * Uncomment to enable generic public key wrappers. + */ +#define MBEDTLS_PK_C + +/** + * \def MBEDTLS_PK_PARSE_C + * + * Enable the generic public (asymetric) key parser. + * + * Module: library/pkparse.c + * Caller: library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key parse functions. + */ +#define MBEDTLS_PK_PARSE_C + +/** + * \def MBEDTLS_PK_WRITE_C + * + * Enable the generic public (asymetric) key writer. + * + * Module: library/pkwrite.c + * Caller: library/x509write.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key write functions. + */ +#define MBEDTLS_PK_WRITE_C + +/** + * \def MBEDTLS_PKCS5_C + * + * Enable PKCS#5 functions. + * + * Module: library/pkcs5.c + * + * Requires: MBEDTLS_MD_C + * + * This module adds support for the PKCS#5 functions. + */ +//#define MBEDTLS_PKCS5_C + +/** + * \def MBEDTLS_PKCS11_C + * + * Enable wrapper for PKCS#11 smartcard support. + * + * Module: library/pkcs11.c + * Caller: library/pk.c + * + * Requires: MBEDTLS_PK_C + * + * This module enables SSL/TLS PKCS #11 smartcard support. + * Requires the presence of the PKCS#11 helper library (libpkcs11-helper) + */ +//#define MBEDTLS_PKCS11_C + +/** + * \def MBEDTLS_PKCS12_C + * + * Enable PKCS#12 PBE functions. + * Adds algorithms for parsing PKCS#8 encrypted private keys + * + * Module: library/pkcs12.c + * Caller: library/pkparse.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * Can use: MBEDTLS_ARC4_C + * + * This module enables PKCS#12 functions. + */ +//#define MBEDTLS_PKCS12_C + +/** + * \def MBEDTLS_PLATFORM_C + * + * Enable the platform abstraction layer that allows you to re-assign + * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit(). + * + * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT + * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned + * above to be specified at runtime or compile time respectively. + * + * \note This abstraction layer must be enabled on Windows (including MSYS2) + * as other module rely on it for a fixed snprintf implementation. + * + * Module: library/platform.c + * Caller: Most other .c files + * + * This module enables abstraction of common (libc) functions. + */ +#define MBEDTLS_PLATFORM_C + +/** + * \def MBEDTLS_RIPEMD160_C + * + * Enable the RIPEMD-160 hash algorithm. + * + * Module: library/mbedtls_ripemd160.c + * Caller: library/mbedtls_md.c + * + */ +//#define MBEDTLS_RIPEMD160_C + +/** + * \def MBEDTLS_RSA_C + * + * Enable the RSA public-key cryptosystem. + * + * Module: library/rsa.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509.c + * + * This module is used by the following key exchanges: + * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C + */ +#define MBEDTLS_RSA_C + +/** + * \def MBEDTLS_SHA1_C + * + * Enable the SHA1 cryptographic hash algorithm. + * + * Module: library/mbedtls_sha1.c + * Caller: library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509write_crt.c + * + * This module is required for SSL/TLS and SHA1-signed certificates. + */ +#define MBEDTLS_SHA1_C + +/** + * \def MBEDTLS_SHA256_C + * + * Enable the SHA-224 and SHA-256 cryptographic hash algorithms. + * + * Module: library/mbedtls_sha256.c + * Caller: library/entropy.c + * library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module adds support for SHA-224 and SHA-256. + * This module is required for the SSL/TLS 1.2 PRF function. + */ +#define MBEDTLS_SHA256_C + +/** + * \def MBEDTLS_SHA512_C + * + * Enable the SHA-384 and SHA-512 cryptographic hash algorithms. + * + * Module: library/mbedtls_sha512.c + * Caller: library/entropy.c + * library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This module adds support for SHA-384 and SHA-512. + */ +#define MBEDTLS_SHA512_C + +/** + * \def MBEDTLS_SSL_CACHE_C + * + * Enable simple SSL cache implementation. + * + * Module: library/ssl_cache.c + * Caller: + * + * Requires: MBEDTLS_SSL_CACHE_C + */ +//#define MBEDTLS_SSL_CACHE_C + +/** + * \def MBEDTLS_SSL_COOKIE_C + * + * Enable basic implementation of DTLS cookies for hello verification. + * + * Module: library/ssl_cookie.c + * Caller: + */ +//#define MBEDTLS_SSL_COOKIE_C + +/** + * \def MBEDTLS_SSL_TICKET_C + * + * Enable an implementation of TLS server-side callbacks for session tickets. + * + * Module: library/ssl_ticket.c + * Caller: + * + * Requires: MBEDTLS_CIPHER_C + */ +//#define MBEDTLS_SSL_TICKET_C + +/** + * \def MBEDTLS_SSL_CLI_C + * + * Enable the SSL/TLS client code. + * + * Module: library/ssl_cli.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS client support. + */ +#define MBEDTLS_SSL_CLI_C + +/** + * \def MBEDTLS_SSL_SRV_C + * + * Enable the SSL/TLS server code. + * + * Module: library/ssl_srv.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS server support. + */ +#define MBEDTLS_SSL_SRV_C + +/** + * \def MBEDTLS_SSL_TLS_C + * + * Enable the generic SSL/TLS code. + * + * Module: library/ssl_tls.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * and at least one of the MBEDTLS_SSL_PROTO_XXX defines + * + * This module is required for SSL/TLS. + */ +#define MBEDTLS_SSL_TLS_C + +/** + * \def MBEDTLS_THREADING_C + * + * Enable the threading abstraction layer. + * By default mbed TLS assumes it is used in a non-threaded environment or that + * contexts are not shared between threads. If you do intend to use contexts + * between threads, you will need to enable this layer to prevent race + * conditions. + * + * Module: library/threading.c + * + * This allows different threading implementations (self-implemented or + * provided). + * + * You will have to enable either MBEDTLS_THREADING_ALT or + * MBEDTLS_THREADING_PTHREAD. + * + * Enable this layer to allow use of mutexes within mbed TLS + */ +//#define MBEDTLS_THREADING_C + +/** + * \def MBEDTLS_TIMING_C + * + * Enable the portable timing interface. + * + * Module: library/timing.c + * Caller: library/havege.c + * + * This module is used by the HAVEGE random number generator. + */ +//#define MBEDTLS_TIMING_C + +/** + * \def MBEDTLS_VERSION_C + * + * Enable run-time version information. + * + * Module: library/version.c + * + * This module provides run-time version information. + */ +#define MBEDTLS_VERSION_C + +/** + * \def MBEDTLS_X509_USE_C + * + * Enable X.509 core for using certificates. + * + * Module: library/x509.c + * Caller: library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, + * MBEDTLS_PK_PARSE_C + * + * This module is required for the X.509 parsing modules. + */ +#define MBEDTLS_X509_USE_C + +/** + * \def MBEDTLS_X509_CRT_PARSE_C + * + * Enable X.509 certificate parsing. + * + * Module: library/mbedtls_x509_crt.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 certificate parsing. + */ +#define MBEDTLS_X509_CRT_PARSE_C + +/** + * \def MBEDTLS_X509_CRL_PARSE_C + * + * Enable X.509 CRL parsing. + * + * Module: library/mbedtls_x509_crl.c + * Caller: library/mbedtls_x509_crt.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 CRL parsing. + */ +#define MBEDTLS_X509_CRL_PARSE_C + +/** + * \def MBEDTLS_X509_CSR_PARSE_C + * + * Enable X.509 Certificate Signing Request (CSR) parsing. + * + * Module: library/mbedtls_x509_csr.c + * Caller: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is used for reading X.509 certificate request. + */ +#define MBEDTLS_X509_CSR_PARSE_C + +/** + * \def MBEDTLS_X509_CREATE_C + * + * Enable X.509 core for creating certificates. + * + * Module: library/x509_create.c + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C + * + * This module is the basis for creating X.509 certificates and CSRs. + */ +#define MBEDTLS_X509_CREATE_C + +/** + * \def MBEDTLS_X509_CRT_WRITE_C + * + * Enable creating X.509 certificates. + * + * Module: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate creation. + */ +#define MBEDTLS_X509_CRT_WRITE_C + +/** + * \def MBEDTLS_X509_CSR_WRITE_C + * + * Enable creating X.509 Certificate Signing Requests (CSR). + * + * Module: library/x509_csr_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate request writing. + */ +#define MBEDTLS_X509_CSR_WRITE_C + +/** + * \def MBEDTLS_XTEA_C + * + * Enable the XTEA block cipher. + * + * Module: library/xtea.c + * Caller: + */ +#define MBEDTLS_XTEA_C + +/* \} name SECTION: mbed TLS modules */ + +/** + * \name SECTION: Module configuration options + * + * This section allows for the setting of module specific sizes and + * configuration options. The default values are already present in the + * relevant header files and should suffice for the regular use cases. + * + * Our advice is to enable options and change their values here + * only if you have a good reason and know the consequences. + * + * Please check the respective header file for documentation on these + * parameters (to prevent duplicate documentation). + * \{ + */ + +/* MPI / BIGNUM options */ +//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */ +//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */ + +/* CTR_DRBG options */ +//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */ +//#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* HMAC_DRBG options */ +//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* ECP options */ +//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */ +//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */ +//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */ + +/* Entropy options */ +//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */ +//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */ + +/* Memory buffer allocator options */ +//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */ + +/* Platform options */ +//#define MBEDTLS_PLATFORM_STD_MEM_HDR /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */ +//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */ +/* Note: your snprintf must correclty zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */ + +/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */ +/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */ +//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */ +/* Note: your snprintf must correclty zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */ + +/* SSL Cache options */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */ + +/* SSL options */ +extern unsigned int max_content_len; +#define MBEDTLS_SSL_MAX_CONTENT_LEN max_content_len /**< Maxium fragment length in bytes, determines the size of each of the two internal I/O buffers */ +//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */ +//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */ +//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */ + +/** + * \def ESP8266_PLATFORM + * + * Enable the ESP8266 PLATFORM. + * + * Module: library/ssl_tls.c + * Caller: + */ +//#define ESP8266_PLATFORM + +/** + * Complete list of ciphersuites to use, in order of preference. + * + * \warning No dependency checking is done on that field! This option can only + * be used to restrict the set of available ciphersuites. It is your + * responsibility to make sure the needed modules are active. + * + * Use this to save a few hundred bytes of ROM (default ordering of all + * available ciphersuites) and a few to a few hundred bytes of RAM. + * + * The value below is only an example, not the default. + */ +//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + +/* X509 options */ +//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */ + +/* \} name SECTION: Module configuration options */ + +#if defined(TARGET_LIKE_MBED) +#include "mbedtls/target_config.h" +#endif + +/* + * Allow user to override any previous default. + * + * Use two macro names for that, as: + * - with yotta the prefix YOTTA_CFG_ is forced + * - without yotta is looks weird to have a YOTTA prefix. + */ +#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE) +#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE +#elif defined(MBEDTLS_USER_CONFIG_FILE) +#include MBEDTLS_USER_CONFIG_FILE +#endif + +#include "check_config.h" + +#endif /* MBEDTLS_CONFIG_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ctr_drbg.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ctr_drbg.h new file mode 100644 index 0000000..059d3c5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ctr_drbg.h @@ -0,0 +1,290 @@ +/** + * \file ctr_drbg.h + * + * \brief CTR_DRBG based on AES-256 (NIST SP 800-90) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_CTR_DRBG_H +#define MBEDTLS_CTR_DRBG_H + +#include "aes.h" + +#if defined(MBEDTLS_THREADING_C) +#include "mbedtls/threading.h" +#endif + +#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED -0x0034 /**< The entropy source failed. */ +#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG -0x0036 /**< Too many random requested in single call. */ +#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG -0x0038 /**< Input too large (Entropy + additional). */ +#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR -0x003A /**< Read/write error in file. */ + +#define MBEDTLS_CTR_DRBG_BLOCKSIZE 16 /**< Block size used by the cipher */ +#define MBEDTLS_CTR_DRBG_KEYSIZE 32 /**< Key size used by the cipher */ +#define MBEDTLS_CTR_DRBG_KEYBITS ( MBEDTLS_CTR_DRBG_KEYSIZE * 8 ) +#define MBEDTLS_CTR_DRBG_SEEDLEN ( MBEDTLS_CTR_DRBG_KEYSIZE + MBEDTLS_CTR_DRBG_BLOCKSIZE ) + /**< The seed length (counter + AES key) */ + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) +#if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256) +#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */ +#else +#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 32 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */ +#endif +#endif + +#if !defined(MBEDTLS_CTR_DRBG_RESEED_INTERVAL) +#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +#endif + +#if !defined(MBEDTLS_CTR_DRBG_MAX_INPUT) +#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +#endif + +#if !defined(MBEDTLS_CTR_DRBG_MAX_REQUEST) +#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +#endif + +#if !defined(MBEDTLS_CTR_DRBG_MAX_SEED_INPUT) +#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ +#endif + +/* \} name SECTION: Module settings */ + +#define MBEDTLS_CTR_DRBG_PR_OFF 0 /**< No prediction resistance */ +#define MBEDTLS_CTR_DRBG_PR_ON 1 /**< Prediction resistance enabled */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief CTR_DRBG context structure + */ +typedef struct +{ + unsigned char counter[16]; /*!< counter (V) */ + int reseed_counter; /*!< reseed counter */ + int prediction_resistance; /*!< enable prediction resistance (Automatic + reseed before every random generation) */ + size_t entropy_len; /*!< amount of entropy grabbed on each + (re)seed */ + int reseed_interval; /*!< reseed interval */ + + mbedtls_aes_context aes_ctx; /*!< AES context */ + + /* + * Callbacks (Entropy) + */ + int (*f_entropy)(void *, unsigned char *, size_t); + + void *p_entropy; /*!< context for the entropy function */ + +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; +#endif +} +mbedtls_ctr_drbg_context; + +/** + * \brief CTR_DRBG context initialization + * Makes the context ready for mbedtls_ctr_drbg_seed() or + * mbedtls_ctr_drbg_free(). + * + * \param ctx CTR_DRBG context to be initialized + */ +void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx ); + +/** + * \brief CTR_DRBG initial seeding + * Seed and setup entropy source for future reseeds. + * + * Note: Personalization data can be provided in addition to the more generic + * entropy source to make this instantiation as unique as possible. + * + * \param ctx CTR_DRBG context to be seeded + * \param f_entropy Entropy callback (p_entropy, buffer to fill, buffer + * length) + * \param p_entropy Entropy context + * \param custom Personalization data (Device specific identifiers) + * (Can be NULL) + * \param len Length of personalization data + * + * \return 0 if successful, or + * MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED + */ +int mbedtls_ctr_drbg_seed( mbedtls_ctr_drbg_context *ctx, + int (*f_entropy)(void *, unsigned char *, size_t), + void *p_entropy, + const unsigned char *custom, + size_t len ); + +/** + * \brief Clear CTR_CRBG context data + * + * \param ctx CTR_DRBG context to clear + */ +void mbedtls_ctr_drbg_free( mbedtls_ctr_drbg_context *ctx ); + +/** + * \brief Enable / disable prediction resistance (Default: Off) + * + * Note: If enabled, entropy is used for ctx->entropy_len before each call! + * Only use this if you have ample supply of good entropy! + * + * \param ctx CTR_DRBG context + * \param resistance MBEDTLS_CTR_DRBG_PR_ON or MBEDTLS_CTR_DRBG_PR_OFF + */ +void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx, + int resistance ); + +/** + * \brief Set the amount of entropy grabbed on each (re)seed + * (Default: MBEDTLS_CTR_DRBG_ENTROPY_LEN) + * + * \param ctx CTR_DRBG context + * \param len Amount of entropy to grab + */ +void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx, + size_t len ); + +/** + * \brief Set the reseed interval + * (Default: MBEDTLS_CTR_DRBG_RESEED_INTERVAL) + * + * \param ctx CTR_DRBG context + * \param interval Reseed interval + */ +void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx, + int interval ); + +/** + * \brief CTR_DRBG reseeding (extracts data from entropy source) + * + * \param ctx CTR_DRBG context + * \param additional Additional data to add to state (Can be NULL) + * \param len Length of additional data + * + * \return 0 if successful, or + * MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED + */ +int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx, + const unsigned char *additional, size_t len ); + +/** + * \brief CTR_DRBG update state + * + * \param ctx CTR_DRBG context + * \param additional Additional data to update state with + * \param add_len Length of additional data + * + * \note If add_len is greater than MBEDTLS_CTR_DRBG_MAX_SEED_INPUT, + * only the first MBEDTLS_CTR_DRBG_MAX_SEED_INPUT bytes are used, + * the remaining ones are silently discarded. + */ +void mbedtls_ctr_drbg_update( mbedtls_ctr_drbg_context *ctx, + const unsigned char *additional, size_t add_len ); + +/** + * \brief CTR_DRBG generate random with additional update input + * + * Note: Automatically reseeds if reseed_counter is reached. + * + * \param p_rng CTR_DRBG context + * \param output Buffer to fill + * \param output_len Length of the buffer + * \param additional Additional data to update with (Can be NULL) + * \param add_len Length of additional data + * + * \return 0 if successful, or + * MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED, or + * MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG + */ +int mbedtls_ctr_drbg_random_with_add( void *p_rng, + unsigned char *output, size_t output_len, + const unsigned char *additional, size_t add_len ); + +/** + * \brief CTR_DRBG generate random + * + * Note: Automatically reseeds if reseed_counter is reached. + * + * \param p_rng CTR_DRBG context + * \param output Buffer to fill + * \param output_len Length of the buffer + * + * \return 0 if successful, or + * MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED, or + * MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG + */ +int mbedtls_ctr_drbg_random( void *p_rng, + unsigned char *output, size_t output_len ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Write a seed file + * + * \param ctx CTR_DRBG context + * \param path Name of the file + * + * \return 0 if successful, + * MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR on file error, or + * MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED + */ +int mbedtls_ctr_drbg_write_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path ); + +/** + * \brief Read and update a seed file. Seed is added to this + * instance + * + * \param ctx CTR_DRBG context + * \param path Name of the file + * + * \return 0 if successful, + * MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR on file error, + * MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED or + * MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG + */ +int mbedtls_ctr_drbg_update_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_ctr_drbg_self_test( int verbose ); + +/* Internal functions (do not call directly) */ +int mbedtls_ctr_drbg_seed_entropy_len( mbedtls_ctr_drbg_context *, + int (*)(void *, unsigned char *, size_t), void *, + const unsigned char *, size_t, size_t ); + +#ifdef __cplusplus +} +#endif + +#endif /* ctr_drbg.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/debug.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/debug.h new file mode 100644 index 0000000..d859dd5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/debug.h @@ -0,0 +1,125 @@ +/** + * \file debug.h + * + * \brief Debug functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_DEBUG_H +#define MBEDTLS_DEBUG_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "ssl.h" + +#if defined(MBEDTLS_ECP_C) +#include "ecp.h" +#endif + +#if defined(MBEDTLS_DEBUG_C) + +#define MBEDTLS_DEBUG_STRIP_PARENS( ... ) __VA_ARGS__ + +#define MBEDTLS_SSL_DEBUG_MSG( level, args ) \ + mbedtls_debug_print_msg( ssl, level, __FILE__, __LINE__, \ + MBEDTLS_DEBUG_STRIP_PARENS args ) + +#define MBEDTLS_SSL_DEBUG_RET( level, text, ret ) \ + mbedtls_debug_print_ret( ssl, level, __FILE__, __LINE__, text, ret ) + +#define MBEDTLS_SSL_DEBUG_BUF( level, text, buf, len ) \ + mbedtls_debug_print_buf( ssl, level, __FILE__, __LINE__, text, buf, len ) + +#if defined(MBEDTLS_BIGNUM_C) +#define MBEDTLS_SSL_DEBUG_MPI( level, text, X ) \ + mbedtls_debug_print_mpi( ssl, level, __FILE__, __LINE__, text, X ) +#endif + +#if defined(MBEDTLS_ECP_C) +#define MBEDTLS_SSL_DEBUG_ECP( level, text, X ) \ + mbedtls_debug_print_ecp( ssl, level, __FILE__, __LINE__, text, X ) +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +#define MBEDTLS_SSL_DEBUG_CRT( level, text, crt ) \ + mbedtls_debug_print_crt( ssl, level, __FILE__, __LINE__, text, crt ) +#endif + +#else /* MBEDTLS_DEBUG_C */ + +#define MBEDTLS_SSL_DEBUG_MSG( level, args ) do { } while( 0 ) +#define MBEDTLS_SSL_DEBUG_RET( level, text, ret ) do { } while( 0 ) +#define MBEDTLS_SSL_DEBUG_BUF( level, text, buf, len ) do { } while( 0 ) +#define MBEDTLS_SSL_DEBUG_MPI( level, text, X ) do { } while( 0 ) +#define MBEDTLS_SSL_DEBUG_ECP( level, text, X ) do { } while( 0 ) +#define MBEDTLS_SSL_DEBUG_CRT( level, text, crt ) do { } while( 0 ) + +#endif /* MBEDTLS_DEBUG_C */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Set the level threshold to handle globally. Messages that have a + * level over the threshold value are ignored. + * (Default value: 0 (No debug)) + * + * \param threshold maximum level of messages to pass on + */ +void mbedtls_debug_set_threshold( int threshold ); + +void mbedtls_debug_print_msg( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *format, ... ); + +void mbedtls_debug_print_ret( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, int ret ); + +void mbedtls_debug_print_buf( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, const char *text, + const unsigned char *buf, size_t len ); + +#if defined(MBEDTLS_BIGNUM_C) +void mbedtls_debug_print_mpi( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, const mbedtls_mpi *X ); +#endif + +#if defined(MBEDTLS_ECP_C) +void mbedtls_debug_print_ecp( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, const mbedtls_ecp_point *X ); +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +void mbedtls_debug_print_crt( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, const mbedtls_x509_crt *crt ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* debug.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/des.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/des.h new file mode 100644 index 0000000..5ca2ecf --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/des.h @@ -0,0 +1,306 @@ +/** + * \file des.h + * + * \brief DES block cipher + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_DES_H +#define MBEDTLS_DES_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#define MBEDTLS_DES_ENCRYPT 1 +#define MBEDTLS_DES_DECRYPT 0 + +#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH -0x0032 /**< The data input has an invalid length. */ + +#define MBEDTLS_DES_KEY_SIZE 8 + +#if !defined(MBEDTLS_DES_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief DES context structure + */ +typedef struct +{ + uint32_t sk[32]; /*!< DES subkeys */ +} +mbedtls_des_context; + +/** + * \brief Triple-DES context structure + */ +typedef struct +{ + uint32_t sk[96]; /*!< 3DES subkeys */ +} +mbedtls_des3_context; + +/** + * \brief Initialize DES context + * + * \param ctx DES context to be initialized + */ +void mbedtls_des_init( mbedtls_des_context *ctx ); + +/** + * \brief Clear DES context + * + * \param ctx DES context to be cleared + */ +void mbedtls_des_free( mbedtls_des_context *ctx ); + +/** + * \brief Initialize Triple-DES context + * + * \param ctx DES3 context to be initialized + */ +void mbedtls_des3_init( mbedtls_des3_context *ctx ); + +/** + * \brief Clear Triple-DES context + * + * \param ctx DES3 context to be cleared + */ +void mbedtls_des3_free( mbedtls_des3_context *ctx ); + +/** + * \brief Set key parity on the given key to odd. + * + * DES keys are 56 bits long, but each byte is padded with + * a parity bit to allow verification. + * + * \param key 8-byte secret key + */ +void mbedtls_des_key_set_parity( unsigned char key[MBEDTLS_DES_KEY_SIZE] ); + +/** + * \brief Check that key parity on the given key is odd. + * + * DES keys are 56 bits long, but each byte is padded with + * a parity bit to allow verification. + * + * \param key 8-byte secret key + * + * \return 0 is parity was ok, 1 if parity was not correct. + */ +int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SIZE] ); + +/** + * \brief Check that key is not a weak or semi-weak DES key + * + * \param key 8-byte secret key + * + * \return 0 if no weak key was found, 1 if a weak key was identified. + */ +int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] ); + +/** + * \brief DES key schedule (56-bit, encryption) + * + * \param ctx DES context to be initialized + * \param key 8-byte secret key + * + * \return 0 + */ +int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] ); + +/** + * \brief DES key schedule (56-bit, decryption) + * + * \param ctx DES context to be initialized + * \param key 8-byte secret key + * + * \return 0 + */ +int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] ); + +/** + * \brief Triple-DES key schedule (112-bit, encryption) + * + * \param ctx 3DES context to be initialized + * \param key 16-byte secret key + * + * \return 0 + */ +int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] ); + +/** + * \brief Triple-DES key schedule (112-bit, decryption) + * + * \param ctx 3DES context to be initialized + * \param key 16-byte secret key + * + * \return 0 + */ +int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] ); + +/** + * \brief Triple-DES key schedule (168-bit, encryption) + * + * \param ctx 3DES context to be initialized + * \param key 24-byte secret key + * + * \return 0 + */ +int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] ); + +/** + * \brief Triple-DES key schedule (168-bit, decryption) + * + * \param ctx 3DES context to be initialized + * \param key 24-byte secret key + * + * \return 0 + */ +int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] ); + +/** + * \brief DES-ECB block encryption/decryption + * + * \param ctx DES context + * \param input 64-bit input block + * \param output 64-bit output block + * + * \return 0 if successful + */ +int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx, + const unsigned char input[8], + unsigned char output[8] ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/** + * \brief DES-CBC buffer encryption/decryption + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx DES context + * \param mode MBEDTLS_DES_ENCRYPT or MBEDTLS_DES_DECRYPT + * \param length length of the input data + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + */ +int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx, + int mode, + size_t length, + unsigned char iv[8], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +/** + * \brief 3DES-ECB block encryption/decryption + * + * \param ctx 3DES context + * \param input 64-bit input block + * \param output 64-bit output block + * + * \return 0 if successful + */ +int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx, + const unsigned char input[8], + unsigned char output[8] ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/** + * \brief 3DES-CBC buffer encryption/decryption + * + * \note Upon exit, the content of the IV is updated so that you can + * call the function same function again on the following + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If on the other hand you need to retain the contents of the + * IV, you should either save it manually or use the cipher + * module instead. + * + * \param ctx 3DES context + * \param mode MBEDTLS_DES_ENCRYPT or MBEDTLS_DES_DECRYPT + * \param length length of the input data + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if successful, or MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH + */ +int mbedtls_des3_crypt_cbc( mbedtls_des3_context *ctx, + int mode, + size_t length, + unsigned char iv[8], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +/** + * \brief Internal function for key expansion. + * (Only exposed to allow overriding it, + * see MBEDTLS_DES_SETKEY_ALT) + * + * \param SK Round keys + * \param key Base key + */ +void mbedtls_des_setkey( uint32_t SK[32], + const unsigned char key[MBEDTLS_DES_KEY_SIZE] ); +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_DES_ALT */ +#include "des_alt.h" +#endif /* MBEDTLS_DES_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_des_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* des.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/dhm.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/dhm.h new file mode 100644 index 0000000..cd056d1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/dhm.h @@ -0,0 +1,305 @@ +/** + * \file dhm.h + * + * \brief Diffie-Hellman-Merkle key exchange + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_DHM_H +#define MBEDTLS_DHM_H + +#include "bignum.h" + +/* + * DHM Error codes + */ +#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA -0x3080 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED -0x3100 /**< Reading of the DHM parameters failed. */ +#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED -0x3180 /**< Making of the DHM parameters failed. */ +#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED -0x3200 /**< Reading of the public values failed. */ +#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED -0x3280 /**< Making of the public value failed. */ +#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED -0x3300 /**< Calculation of the DHM secret failed. */ +#define MBEDTLS_ERR_DHM_INVALID_FORMAT -0x3380 /**< The ASN.1 data is not formatted correctly. */ +#define MBEDTLS_ERR_DHM_ALLOC_FAILED -0x3400 /**< Allocation of memory failed. */ +#define MBEDTLS_ERR_DHM_FILE_IO_ERROR -0x3480 /**< Read/write of file failed. */ + +/** + * RFC 3526 defines a number of standardized Diffie-Hellman groups + * for IKE. + * RFC 5114 defines a number of standardized Diffie-Hellman groups + * that can be used. + * + * Some are included here for convenience. + * + * Included are: + * RFC 3526 3. 2048-bit MODP Group + * RFC 3526 4. 3072-bit MODP Group + * RFC 3526 5. 4096-bit MODP Group + * RFC 5114 2.2. 2048-bit MODP Group with 224-bit Prime Order Subgroup + */ +#define MBEDTLS_DHM_RFC3526_MODP_2048_P \ + "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1" \ + "29024E088A67CC74020BBEA63B139B22514A08798E3404DD" \ + "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245" \ + "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED" \ + "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D" \ + "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F" \ + "83655D23DCA3AD961C62F356208552BB9ED529077096966D" \ + "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B" \ + "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9" \ + "DE2BCBF6955817183995497CEA956AE515D2261898FA0510" \ + "15728E5A8AACAA68FFFFFFFFFFFFFFFF" + +#define MBEDTLS_DHM_RFC3526_MODP_2048_G "02" + +#define MBEDTLS_DHM_RFC3526_MODP_3072_P \ + "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1" \ + "29024E088A67CC74020BBEA63B139B22514A08798E3404DD" \ + "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245" \ + "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED" \ + "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D" \ + "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F" \ + "83655D23DCA3AD961C62F356208552BB9ED529077096966D" \ + "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B" \ + "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9" \ + "DE2BCBF6955817183995497CEA956AE515D2261898FA0510" \ + "15728E5A8AAAC42DAD33170D04507A33A85521ABDF1CBA64" \ + "ECFB850458DBEF0A8AEA71575D060C7DB3970F85A6E1E4C7" \ + "ABF5AE8CDB0933D71E8C94E04A25619DCEE3D2261AD2EE6B" \ + "F12FFA06D98A0864D87602733EC86A64521F2B18177B200C" \ + "BBE117577A615D6C770988C0BAD946E208E24FA074E5AB31" \ + "43DB5BFCE0FD108E4B82D120A93AD2CAFFFFFFFFFFFFFFFF" + +#define MBEDTLS_DHM_RFC3526_MODP_3072_G "02" + +#define MBEDTLS_DHM_RFC3526_MODP_4096_P \ + "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1" \ + "29024E088A67CC74020BBEA63B139B22514A08798E3404DD" \ + "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245" \ + "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED" \ + "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D" \ + "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F" \ + "83655D23DCA3AD961C62F356208552BB9ED529077096966D" \ + "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B" \ + "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9" \ + "DE2BCBF6955817183995497CEA956AE515D2261898FA0510" \ + "15728E5A8AAAC42DAD33170D04507A33A85521ABDF1CBA64" \ + "ECFB850458DBEF0A8AEA71575D060C7DB3970F85A6E1E4C7" \ + "ABF5AE8CDB0933D71E8C94E04A25619DCEE3D2261AD2EE6B" \ + "F12FFA06D98A0864D87602733EC86A64521F2B18177B200C" \ + "BBE117577A615D6C770988C0BAD946E208E24FA074E5AB31" \ + "43DB5BFCE0FD108E4B82D120A92108011A723C12A787E6D7" \ + "88719A10BDBA5B2699C327186AF4E23C1A946834B6150BDA" \ + "2583E9CA2AD44CE8DBBBC2DB04DE8EF92E8EFC141FBECAA6" \ + "287C59474E6BC05D99B2964FA090C3A2233BA186515BE7ED" \ + "1F612970CEE2D7AFB81BDD762170481CD0069127D5B05AA9" \ + "93B4EA988D8FDDC186FFB7DC90A6C08F4DF435C934063199" \ + "FFFFFFFFFFFFFFFF" + +#define MBEDTLS_DHM_RFC3526_MODP_4096_G "02" + +#define MBEDTLS_DHM_RFC5114_MODP_2048_P \ + "AD107E1E9123A9D0D660FAA79559C51FA20D64E5683B9FD1" \ + "B54B1597B61D0A75E6FA141DF95A56DBAF9A3C407BA1DF15" \ + "EB3D688A309C180E1DE6B85A1274A0A66D3F8152AD6AC212" \ + "9037C9EDEFDA4DF8D91E8FEF55B7394B7AD5B7D0B6C12207" \ + "C9F98D11ED34DBF6C6BA0B2C8BBC27BE6A00E0A0B9C49708" \ + "B3BF8A317091883681286130BC8985DB1602E714415D9330" \ + "278273C7DE31EFDC7310F7121FD5A07415987D9ADC0A486D" \ + "CDF93ACC44328387315D75E198C641A480CD86A1B9E587E8" \ + "BE60E69CC928B2B9C52172E413042E9B23F10B0E16E79763" \ + "C9B53DCF4BA80A29E3FB73C16B8E75B97EF363E2FFA31F71" \ + "CF9DE5384E71B81C0AC4DFFE0C10E64F" + +#define MBEDTLS_DHM_RFC5114_MODP_2048_G \ + "AC4032EF4F2D9AE39DF30B5C8FFDAC506CDEBE7B89998CAF"\ + "74866A08CFE4FFE3A6824A4E10B9A6F0DD921F01A70C4AFA"\ + "AB739D7700C29F52C57DB17C620A8652BE5E9001A8D66AD7"\ + "C17669101999024AF4D027275AC1348BB8A762D0521BC98A"\ + "E247150422EA1ED409939D54DA7460CDB5F6C6B250717CBE"\ + "F180EB34118E98D119529A45D6F834566E3025E316A330EF"\ + "BB77A86F0C1AB15B051AE3D428C8F8ACB70A8137150B8EEB"\ + "10E183EDD19963DDD9E263E4770589EF6AA21E7F5F2FF381"\ + "B539CCE3409D13CD566AFBB48D6C019181E1BCFE94B30269"\ + "EDFE72FE9B6AA4BD7B5A0F1C71CFFF4C19C418E1F6EC0179"\ + "81BC087F2A7065B384B890D3191F2BFA" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief DHM context structure + */ +typedef struct +{ + size_t len; /*!< size(P) in chars */ + mbedtls_mpi P; /*!< prime modulus */ + mbedtls_mpi G; /*!< generator */ + mbedtls_mpi X; /*!< secret value */ + mbedtls_mpi GX; /*!< self = G^X mod P */ + mbedtls_mpi GY; /*!< peer = G^Y mod P */ + mbedtls_mpi K; /*!< key = GY^X mod P */ + mbedtls_mpi RP; /*!< cached R^2 mod P */ + mbedtls_mpi Vi; /*!< blinding value */ + mbedtls_mpi Vf; /*!< un-blinding value */ + mbedtls_mpi pX; /*!< previous X */ +} +mbedtls_dhm_context; + +/** + * \brief Initialize DHM context + * + * \param ctx DHM context to be initialized + */ +void mbedtls_dhm_init( mbedtls_dhm_context *ctx ); + +/** + * \brief Parse the ServerKeyExchange parameters + * + * \param ctx DHM context + * \param p &(start of input buffer) + * \param end end of buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_DHM_XXX error code + */ +int mbedtls_dhm_read_params( mbedtls_dhm_context *ctx, + unsigned char **p, + const unsigned char *end ); + +/** + * \brief Setup and write the ServerKeyExchange parameters + * + * \param ctx DHM context + * \param x_size private value size in bytes + * \param output destination buffer + * \param olen number of chars written + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \note This function assumes that ctx->P and ctx->G + * have already been properly set (for example + * using mbedtls_mpi_read_string or mbedtls_mpi_read_binary). + * + * \return 0 if successful, or an MBEDTLS_ERR_DHM_XXX error code + */ +int mbedtls_dhm_make_params( mbedtls_dhm_context *ctx, int x_size, + unsigned char *output, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Import the peer's public value G^Y + * + * \param ctx DHM context + * \param input input buffer + * \param ilen size of buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_DHM_XXX error code + */ +int mbedtls_dhm_read_public( mbedtls_dhm_context *ctx, + const unsigned char *input, size_t ilen ); + +/** + * \brief Create own private value X and export G^X + * + * \param ctx DHM context + * \param x_size private value size in bytes + * \param output destination buffer + * \param olen must be equal to ctx->P.len + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, or an MBEDTLS_ERR_DHM_XXX error code + */ +int mbedtls_dhm_make_public( mbedtls_dhm_context *ctx, int x_size, + unsigned char *output, size_t olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Derive and export the shared secret (G^Y)^X mod P + * + * \param ctx DHM context + * \param output destination buffer + * \param output_size size of the destination buffer + * \param olen on exit, holds the actual number of bytes written + * \param f_rng RNG function, for blinding purposes + * \param p_rng RNG parameter + * + * \return 0 if successful, or an MBEDTLS_ERR_DHM_XXX error code + * + * \note If non-NULL, f_rng is used to blind the input as + * countermeasure against timing attacks. Blinding is + * automatically used if and only if our secret value X is + * re-used and costs nothing otherwise, so it is recommended + * to always pass a non-NULL f_rng argument. + */ +int mbedtls_dhm_calc_secret( mbedtls_dhm_context *ctx, + unsigned char *output, size_t output_size, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Free and clear the components of a DHM key + * + * \param ctx DHM context to free and clear + */ +void mbedtls_dhm_free( mbedtls_dhm_context *ctx ); + +#if defined(MBEDTLS_ASN1_PARSE_C) +/** \ingroup x509_module */ +/** + * \brief Parse DHM parameters in PEM or DER format + * + * \param dhm DHM context to be initialized + * \param dhmin input buffer + * \param dhminlen size of the buffer + * (including the terminating null byte for PEM data) + * + * \return 0 if successful, or a specific DHM or PEM error code + */ +int mbedtls_dhm_parse_dhm( mbedtls_dhm_context *dhm, const unsigned char *dhmin, + size_t dhminlen ); + +#if defined(MBEDTLS_FS_IO) +/** \ingroup x509_module */ +/** + * \brief Load and parse DHM parameters + * + * \param dhm DHM context to be initialized + * \param path filename to read the DHM Parameters from + * + * \return 0 if successful, or a specific DHM or PEM error code + */ +int mbedtls_dhm_parse_dhmfile( mbedtls_dhm_context *dhm, const char *path ); +#endif /* MBEDTLS_FS_IO */ +#endif /* MBEDTLS_ASN1_PARSE_C */ + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_dhm_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* dhm.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecdh.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecdh.h new file mode 100644 index 0000000..625a281 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecdh.h @@ -0,0 +1,214 @@ +/** + * \file ecdh.h + * + * \brief Elliptic curve Diffie-Hellman + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ECDH_H +#define MBEDTLS_ECDH_H + +#include "ecp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * When importing from an EC key, select if it is our key or the peer's key + */ +typedef enum +{ + MBEDTLS_ECDH_OURS, + MBEDTLS_ECDH_THEIRS, +} mbedtls_ecdh_side; + +/** + * \brief ECDH context structure + */ +typedef struct +{ + mbedtls_ecp_group grp; /*!< elliptic curve used */ + mbedtls_mpi d; /*!< our secret value (private key) */ + mbedtls_ecp_point Q; /*!< our public value (public key) */ + mbedtls_ecp_point Qp; /*!< peer's public value (public key) */ + mbedtls_mpi z; /*!< shared secret */ + int point_format; /*!< format for point export in TLS messages */ + mbedtls_ecp_point Vi; /*!< blinding value (for later) */ + mbedtls_ecp_point Vf; /*!< un-blinding value (for later) */ + mbedtls_mpi _d; /*!< previous d (for later) */ +} +mbedtls_ecdh_context; + +/** + * \brief Generate a public key. + * Raw function that only does the core computation. + * + * \param grp ECP group + * \param d Destination MPI (secret exponent, aka private key) + * \param Q Destination point (public key) + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + */ +int mbedtls_ecdh_gen_public( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Compute shared secret + * Raw function that only does the core computation. + * + * \param grp ECP group + * \param z Destination MPI (shared secret) + * \param Q Public key from other party + * \param d Our secret exponent (private key) + * \param f_rng RNG function (see notes) + * \param p_rng RNG parameter + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + * + * \note If f_rng is not NULL, it is used to implement + * countermeasures against potential elaborate timing + * attacks, see \c mbedtls_ecp_mul() for details. + */ +int mbedtls_ecdh_compute_shared( mbedtls_ecp_group *grp, mbedtls_mpi *z, + const mbedtls_ecp_point *Q, const mbedtls_mpi *d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Initialize context + * + * \param ctx Context to initialize + */ +void mbedtls_ecdh_init( mbedtls_ecdh_context *ctx ); + +/** + * \brief Free context + * + * \param ctx Context to free + */ +void mbedtls_ecdh_free( mbedtls_ecdh_context *ctx ); + +/** + * \brief Generate a public key and a TLS ServerKeyExchange payload. + * (First function used by a TLS server for ECDHE.) + * + * \param ctx ECDH context + * \param olen number of chars written + * \param buf destination buffer + * \param blen length of buffer + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \note This function assumes that ctx->grp has already been + * properly set (for example using mbedtls_ecp_group_load). + * + * \return 0 if successful, or an MBEDTLS_ERR_ECP_XXX error code + */ +int mbedtls_ecdh_make_params( mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Parse and procress a TLS ServerKeyExhange payload. + * (First function used by a TLS client for ECDHE.) + * + * \param ctx ECDH context + * \param buf pointer to start of input buffer + * \param end one past end of buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_ECP_XXX error code + */ +int mbedtls_ecdh_read_params( mbedtls_ecdh_context *ctx, + const unsigned char **buf, const unsigned char *end ); + +/** + * \brief Setup an ECDH context from an EC key. + * (Used by clients and servers in place of the + * ServerKeyEchange for static ECDH: import ECDH parameters + * from a certificate's EC key information.) + * + * \param ctx ECDH constext to set + * \param key EC key to use + * \param side Is it our key (1) or the peer's key (0) ? + * + * \return 0 if successful, or an MBEDTLS_ERR_ECP_XXX error code + */ +int mbedtls_ecdh_get_params( mbedtls_ecdh_context *ctx, const mbedtls_ecp_keypair *key, + mbedtls_ecdh_side side ); + +/** + * \brief Generate a public key and a TLS ClientKeyExchange payload. + * (Second function used by a TLS client for ECDH(E).) + * + * \param ctx ECDH context + * \param olen number of bytes actually written + * \param buf destination buffer + * \param blen size of destination buffer + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, or an MBEDTLS_ERR_ECP_XXX error code + */ +int mbedtls_ecdh_make_public( mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Parse and process a TLS ClientKeyExchange payload. + * (Second function used by a TLS server for ECDH(E).) + * + * \param ctx ECDH context + * \param buf start of input buffer + * \param blen length of input buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_ECP_XXX error code + */ +int mbedtls_ecdh_read_public( mbedtls_ecdh_context *ctx, + const unsigned char *buf, size_t blen ); + +/** + * \brief Derive and export the shared secret. + * (Last function used by both TLS client en servers.) + * + * \param ctx ECDH context + * \param olen number of bytes written + * \param buf destination buffer + * \param blen buffer length + * \param f_rng RNG function, see notes for \c mbedtls_ecdh_compute_shared() + * \param p_rng RNG parameter + * + * \return 0 if successful, or an MBEDTLS_ERR_ECP_XXX error code + */ +int mbedtls_ecdh_calc_secret( mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +#ifdef __cplusplus +} +#endif + +#endif /* ecdh.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecdsa.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecdsa.h new file mode 100644 index 0000000..52827d8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecdsa.h @@ -0,0 +1,248 @@ +/** + * \file ecdsa.h + * + * \brief Elliptic curve DSA + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ECDSA_H +#define MBEDTLS_ECDSA_H + +#include "ecp.h" +#include "md.h" + +/* + * RFC 4492 page 20: + * + * Ecdsa-Sig-Value ::= SEQUENCE { + * r INTEGER, + * s INTEGER + * } + * + * Size is at most + * 1 (tag) + 1 (len) + 1 (initial 0) + ECP_MAX_BYTES for each of r and s, + * twice that + 1 (tag) + 2 (len) for the sequence + * (assuming ECP_MAX_BYTES is less than 126 for r and s, + * and less than 124 (total len <= 255) for the sequence) + */ +#if MBEDTLS_ECP_MAX_BYTES > 124 +#error "MBEDTLS_ECP_MAX_BYTES bigger than expected, please fix MBEDTLS_ECDSA_MAX_LEN" +#endif +/** Maximum size of an ECDSA signature in bytes */ +#define MBEDTLS_ECDSA_MAX_LEN ( 3 + 2 * ( 3 + MBEDTLS_ECP_MAX_BYTES ) ) + +/** + * \brief ECDSA context structure + */ +typedef mbedtls_ecp_keypair mbedtls_ecdsa_context; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Compute ECDSA signature of a previously hashed message + * + * \note The deterministic version is usually prefered. + * + * \param grp ECP group + * \param r First output integer + * \param s Second output integer + * \param d Private signing key + * \param buf Message hash + * \param blen Length of buf + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + */ +int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s, + const mbedtls_mpi *d, const unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) +/** + * \brief Compute ECDSA signature of a previously hashed message, + * deterministic version (RFC 6979). + * + * \param grp ECP group + * \param r First output integer + * \param s Second output integer + * \param d Private signing key + * \param buf Message hash + * \param blen Length of buf + * \param md_alg MD algorithm used to hash the message + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + */ +int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s, + const mbedtls_mpi *d, const unsigned char *buf, size_t blen, + mbedtls_md_type_t md_alg ); +#endif /* MBEDTLS_ECDSA_DETERMINISTIC */ + +/** + * \brief Verify ECDSA signature of a previously hashed message + * + * \param grp ECP group + * \param buf Message hash + * \param blen Length of buf + * \param Q Public key to use for verification + * \param r First integer of the signature + * \param s Second integer of the signature + * + * \return 0 if successful, + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + */ +int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp, + const unsigned char *buf, size_t blen, + const mbedtls_ecp_point *Q, const mbedtls_mpi *r, const mbedtls_mpi *s); + +/** + * \brief Compute ECDSA signature and write it to buffer, + * serialized as defined in RFC 4492 page 20. + * (Not thread-safe to use same context in multiple threads) + * + * \note The deterministice version (RFC 6979) is used if + * MBEDTLS_ECDSA_DETERMINISTIC is defined. + * + * \param ctx ECDSA context + * \param md_alg Algorithm that was used to hash the message + * \param hash Message hash + * \param hlen Length of hash + * \param sig Buffer that will hold the signature + * \param slen Length of the signature written + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \note The "sig" buffer must be at least as large as twice the + * size of the curve used, plus 9 (eg. 73 bytes if a 256-bit + * curve is used). MBEDTLS_ECDSA_MAX_LEN is always safe. + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX, MBEDTLS_ERR_MPI_XXX or + * MBEDTLS_ERR_ASN1_XXX error code + */ +int mbedtls_ecdsa_write_signature( mbedtls_ecdsa_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hlen, + unsigned char *sig, size_t *slen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) +#if ! defined(MBEDTLS_DEPRECATED_REMOVED) +#if defined(MBEDTLS_DEPRECATED_WARNING) +#define MBEDTLS_DEPRECATED __attribute__((deprecated)) +#else +#define MBEDTLS_DEPRECATED +#endif +/** + * \brief Compute ECDSA signature and write it to buffer, + * serialized as defined in RFC 4492 page 20. + * Deterministic version, RFC 6979. + * (Not thread-safe to use same context in multiple threads) + * + * \deprecated Superseded by mbedtls_ecdsa_write_signature() in 2.0.0 + * + * \param ctx ECDSA context + * \param hash Message hash + * \param hlen Length of hash + * \param sig Buffer that will hold the signature + * \param slen Length of the signature written + * \param md_alg MD algorithm used to hash the message + * + * \note The "sig" buffer must be at least as large as twice the + * size of the curve used, plus 9 (eg. 73 bytes if a 256-bit + * curve is used). MBEDTLS_ECDSA_MAX_LEN is always safe. + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX, MBEDTLS_ERR_MPI_XXX or + * MBEDTLS_ERR_ASN1_XXX error code + */ +int mbedtls_ecdsa_write_signature_det( mbedtls_ecdsa_context *ctx, + const unsigned char *hash, size_t hlen, + unsigned char *sig, size_t *slen, + mbedtls_md_type_t md_alg ) MBEDTLS_DEPRECATED; +#undef MBEDTLS_DEPRECATED +#endif /* MBEDTLS_DEPRECATED_REMOVED */ +#endif /* MBEDTLS_ECDSA_DETERMINISTIC */ + +/** + * \brief Read and verify an ECDSA signature + * + * \param ctx ECDSA context + * \param hash Message hash + * \param hlen Size of hash + * \param sig Signature to read and verify + * \param slen Size of sig + * + * \return 0 if successful, + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid, + * MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH if the signature is + * valid but its actual length is less than siglen, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_ERR_MPI_XXX error code + */ +int mbedtls_ecdsa_read_signature( mbedtls_ecdsa_context *ctx, + const unsigned char *hash, size_t hlen, + const unsigned char *sig, size_t slen ); + +/** + * \brief Generate an ECDSA keypair on the given curve + * + * \param ctx ECDSA context in which the keypair should be stored + * \param gid Group (elliptic curve) to use. One of the various + * MBEDTLS_ECP_DP_XXX macros depending on configuration. + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 on success, or a MBEDTLS_ERR_ECP_XXX code. + */ +int mbedtls_ecdsa_genkey( mbedtls_ecdsa_context *ctx, mbedtls_ecp_group_id gid, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Set an ECDSA context from an EC key pair + * + * \param ctx ECDSA context to set + * \param key EC key to use + * + * \return 0 on success, or a MBEDTLS_ERR_ECP_XXX code. + */ +int mbedtls_ecdsa_from_keypair( mbedtls_ecdsa_context *ctx, const mbedtls_ecp_keypair *key ); + +/** + * \brief Initialize context + * + * \param ctx Context to initialize + */ +void mbedtls_ecdsa_init( mbedtls_ecdsa_context *ctx ); + +/** + * \brief Free context + * + * \param ctx Context to free + */ +void mbedtls_ecdsa_free( mbedtls_ecdsa_context *ctx ); + +#ifdef __cplusplus +} +#endif + +#endif /* ecdsa.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecjpake.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecjpake.h new file mode 100644 index 0000000..b7b6160 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecjpake.h @@ -0,0 +1,238 @@ +/** + * \file ecjpake.h + * + * \brief Elliptic curve J-PAKE + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ECJPAKE_H +#define MBEDTLS_ECJPAKE_H + +/* + * J-PAKE is a password-authenticated key exchange that allows deriving a + * strong shared secret from a (potentially low entropy) pre-shared + * passphrase, with forward secrecy and mutual authentication. + * https://en.wikipedia.org/wiki/Password_Authenticated_Key_Exchange_by_Juggling + * + * This file implements the Elliptic Curve variant of J-PAKE, + * as defined in Chapter 7.4 of the Thread v1.0 Specification, + * available to members of the Thread Group http://threadgroup.org/ + * + * As the J-PAKE algorithm is inherently symmetric, so is our API. + * Each party needs to send its first round message, in any order, to the + * other party, then each sends its second round message, in any order. + * The payloads are serialized in a way suitable for use in TLS, but could + * also be use outside TLS. + */ + +#include "ecp.h" +#include "md.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Roles in the EC J-PAKE exchange + */ +typedef enum { + MBEDTLS_ECJPAKE_CLIENT = 0, /**< Client */ + MBEDTLS_ECJPAKE_SERVER, /**< Server */ +} mbedtls_ecjpake_role; + +/** + * EC J-PAKE context structure. + * + * J-PAKE is a symmetric protocol, except for the identifiers used in + * Zero-Knowledge Proofs, and the serialization of the second message + * (KeyExchange) as defined by the Thread spec. + * + * In order to benefit from this symmetry, we choose a different naming + * convetion from the Thread v1.0 spec. Correspondance is indicated in the + * description as a pair C: client name, S: server name + */ +typedef struct +{ + const mbedtls_md_info_t *md_info; /**< Hash to use */ + mbedtls_ecp_group grp; /**< Elliptic curve */ + mbedtls_ecjpake_role role; /**< Are we client or server? */ + int point_format; /**< Format for point export */ + + mbedtls_ecp_point Xm1; /**< My public key 1 C: X1, S: X3 */ + mbedtls_ecp_point Xm2; /**< My public key 2 C: X2, S: X4 */ + mbedtls_ecp_point Xp1; /**< Peer public key 1 C: X3, S: X1 */ + mbedtls_ecp_point Xp2; /**< Peer public key 2 C: X4, S: X2 */ + mbedtls_ecp_point Xp; /**< Peer public key C: Xs, S: Xc */ + + mbedtls_mpi xm1; /**< My private key 1 C: x1, S: x3 */ + mbedtls_mpi xm2; /**< My private key 2 C: x2, S: x4 */ + + mbedtls_mpi s; /**< Pre-shared secret (passphrase) */ +} mbedtls_ecjpake_context; + +/** + * \brief Initialize a context + * (just makes it ready for setup() or free()). + * + * \param ctx context to initialize + */ +void mbedtls_ecjpake_init( mbedtls_ecjpake_context *ctx ); + +/** + * \brief Set up a context for use + * + * \note Currently the only values for hash/curve allowed by the + * standard are MBEDTLS_MD_SHA256/MBEDTLS_ECP_DP_SECP256R1. + * + * \param ctx context to set up + * \param role Our role: client or server + * \param hash hash function to use (MBEDTLS_MD_XXX) + * \param curve elliptic curve identifier (MBEDTLS_ECP_DP_XXX) + * \param secret pre-shared secret (passphrase) + * \param len length of the shared secret + * + * \return 0 if successfull, + * a negative error code otherwise + */ +int mbedtls_ecjpake_setup( mbedtls_ecjpake_context *ctx, + mbedtls_ecjpake_role role, + mbedtls_md_type_t hash, + mbedtls_ecp_group_id curve, + const unsigned char *secret, + size_t len ); + +/* + * \brief Check if a context is ready for use + * + * \param ctx Context to check + * + * \return 0 if the context is ready for use, + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA otherwise + */ +int mbedtls_ecjpake_check( const mbedtls_ecjpake_context *ctx ); + +/** + * \brief Generate and write the first round message + * (TLS: contents of the Client/ServerHello extension, + * excluding extension type and length bytes) + * + * \param ctx Context to use + * \param buf Buffer to write the contents to + * \param len Buffer size + * \param olen Will be updated with the number of bytes written + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successfull, + * a negative error code otherwise + */ +int mbedtls_ecjpake_write_round_one( mbedtls_ecjpake_context *ctx, + unsigned char *buf, size_t len, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Read and process the first round message + * (TLS: contents of the Client/ServerHello extension, + * excluding extension type and length bytes) + * + * \param ctx Context to use + * \param buf Pointer to extension contents + * \param len Extension length + * + * \return 0 if successfull, + * a negative error code otherwise + */ +int mbedtls_ecjpake_read_round_one( mbedtls_ecjpake_context *ctx, + const unsigned char *buf, + size_t len ); + +/** + * \brief Generate and write the second round message + * (TLS: contents of the Client/ServerKeyExchange) + * + * \param ctx Context to use + * \param buf Buffer to write the contents to + * \param len Buffer size + * \param olen Will be updated with the number of bytes written + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successfull, + * a negative error code otherwise + */ +int mbedtls_ecjpake_write_round_two( mbedtls_ecjpake_context *ctx, + unsigned char *buf, size_t len, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Read and process the second round message + * (TLS: contents of the Client/ServerKeyExchange) + * + * \param ctx Context to use + * \param buf Pointer to the message + * \param len Message length + * + * \return 0 if successfull, + * a negative error code otherwise + */ +int mbedtls_ecjpake_read_round_two( mbedtls_ecjpake_context *ctx, + const unsigned char *buf, + size_t len ); + +/** + * \brief Derive the shared secret + * (TLS: Pre-Master Secret) + * + * \param ctx Context to use + * \param buf Buffer to write the contents to + * \param len Buffer size + * \param olen Will be updated with the number of bytes written + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successfull, + * a negative error code otherwise + */ +int mbedtls_ecjpake_derive_secret( mbedtls_ecjpake_context *ctx, + unsigned char *buf, size_t len, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Free a context's content + * + * \param ctx context to free + */ +void mbedtls_ecjpake_free( mbedtls_ecjpake_context *ctx ); + +#if defined(MBEDTLS_SELF_TEST) +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if a test failed + */ +int mbedtls_ecjpake_self_test( int verbose ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* ecjpake.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecp.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecp.h new file mode 100644 index 0000000..5246c78 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ecp.h @@ -0,0 +1,669 @@ +/** + * \file ecp.h + * + * \brief Elliptic curves over GF(p) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ECP_H +#define MBEDTLS_ECP_H + +#include "bignum.h" + +/* + * ECP error codes + */ +#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA -0x4F80 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL -0x4F00 /**< The buffer is too small to write to. */ +#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE -0x4E80 /**< Requested curve not available. */ +#define MBEDTLS_ERR_ECP_VERIFY_FAILED -0x4E00 /**< The signature is not valid. */ +#define MBEDTLS_ERR_ECP_ALLOC_FAILED -0x4D80 /**< Memory allocation failed. */ +#define MBEDTLS_ERR_ECP_RANDOM_FAILED -0x4D00 /**< Generation of random value, such as (ephemeral) key, failed. */ +#define MBEDTLS_ERR_ECP_INVALID_KEY -0x4C80 /**< Invalid private or public key. */ +#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH -0x4C00 /**< Signature is valid but shorter than the user-supplied length. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Domain parameters (curve, subgroup and generator) identifiers. + * + * Only curves over prime fields are supported. + * + * \warning This library does not support validation of arbitrary domain + * parameters. Therefore, only well-known domain parameters from trusted + * sources should be used. See mbedtls_ecp_group_load(). + */ +typedef enum +{ + MBEDTLS_ECP_DP_NONE = 0, + MBEDTLS_ECP_DP_SECP192R1, /*!< 192-bits NIST curve */ + MBEDTLS_ECP_DP_SECP224R1, /*!< 224-bits NIST curve */ + MBEDTLS_ECP_DP_SECP256R1, /*!< 256-bits NIST curve */ + MBEDTLS_ECP_DP_SECP384R1, /*!< 384-bits NIST curve */ + MBEDTLS_ECP_DP_SECP521R1, /*!< 521-bits NIST curve */ + MBEDTLS_ECP_DP_BP256R1, /*!< 256-bits Brainpool curve */ + MBEDTLS_ECP_DP_BP384R1, /*!< 384-bits Brainpool curve */ + MBEDTLS_ECP_DP_BP512R1, /*!< 512-bits Brainpool curve */ + MBEDTLS_ECP_DP_CURVE25519, /*!< Curve25519 */ + MBEDTLS_ECP_DP_SECP192K1, /*!< 192-bits "Koblitz" curve */ + MBEDTLS_ECP_DP_SECP224K1, /*!< 224-bits "Koblitz" curve */ + MBEDTLS_ECP_DP_SECP256K1, /*!< 256-bits "Koblitz" curve */ +} mbedtls_ecp_group_id; + +/** + * Number of supported curves (plus one for NONE). + * + * (Montgomery curves excluded for now.) + */ +#define MBEDTLS_ECP_DP_MAX 12 + +/** + * Curve information for use by other modules + */ +typedef struct +{ + mbedtls_ecp_group_id grp_id; /*!< Internal identifier */ + uint16_t tls_id; /*!< TLS NamedCurve identifier */ + uint16_t bit_size; /*!< Curve size in bits */ + const char *name; /*!< Human-friendly name */ +} mbedtls_ecp_curve_info; + +/** + * \brief ECP point structure (jacobian coordinates) + * + * \note All functions expect and return points satisfying + * the following condition: Z == 0 or Z == 1. (Other + * values of Z are used by internal functions only.) + * The point is zero, or "at infinity", if Z == 0. + * Otherwise, X and Y are its standard (affine) coordinates. + */ +typedef struct +{ + mbedtls_mpi X; /*!< the point's X coordinate */ + mbedtls_mpi Y; /*!< the point's Y coordinate */ + mbedtls_mpi Z; /*!< the point's Z coordinate */ +} +mbedtls_ecp_point; + +/** + * \brief ECP group structure + * + * We consider two types of curves equations: + * 1. Short Weierstrass y^2 = x^3 + A x + B mod P (SEC1 + RFC 4492) + * 2. Montgomery, y^2 = x^3 + A x^2 + x mod P (Curve25519 + draft) + * In both cases, a generator G for a prime-order subgroup is fixed. In the + * short weierstrass, this subgroup is actually the whole curve, and its + * cardinal is denoted by N. + * + * In the case of Short Weierstrass curves, our code requires that N is an odd + * prime. (Use odd in mbedtls_ecp_mul() and prime in mbedtls_ecdsa_sign() for blinding.) + * + * In the case of Montgomery curves, we don't store A but (A + 2) / 4 which is + * the quantity actually used in the formulas. Also, nbits is not the size of N + * but the required size for private keys. + * + * If modp is NULL, reduction modulo P is done using a generic algorithm. + * Otherwise, it must point to a function that takes an mbedtls_mpi in the range + * 0..2^(2*pbits)-1 and transforms it in-place in an integer of little more + * than pbits, so that the integer may be efficiently brought in the 0..P-1 + * range by a few additions or substractions. It must return 0 on success and + * non-zero on failure. + */ +typedef struct +{ + mbedtls_ecp_group_id id; /*!< internal group identifier */ + mbedtls_mpi P; /*!< prime modulus of the base field */ + mbedtls_mpi A; /*!< 1. A in the equation, or 2. (A + 2) / 4 */ + mbedtls_mpi B; /*!< 1. B in the equation, or 2. unused */ + mbedtls_ecp_point G; /*!< generator of the (sub)group used */ + mbedtls_mpi N; /*!< 1. the order of G, or 2. unused */ + size_t pbits; /*!< number of bits in P */ + size_t nbits; /*!< number of bits in 1. P, or 2. private keys */ + unsigned int h; /*!< internal: 1 if the constants are static */ + int (*modp)(mbedtls_mpi *); /*!< function for fast reduction mod P */ + int (*t_pre)(mbedtls_ecp_point *, void *); /*!< unused */ + int (*t_post)(mbedtls_ecp_point *, void *); /*!< unused */ + void *t_data; /*!< unused */ + mbedtls_ecp_point *T; /*!< pre-computed points for ecp_mul_comb() */ + size_t T_size; /*!< number for pre-computed points */ +} +mbedtls_ecp_group; + +/** + * \brief ECP key pair structure + * + * A generic key pair that could be used for ECDSA, fixed ECDH, etc. + * + * \note Members purposefully in the same order as struc mbedtls_ecdsa_context. + */ +typedef struct +{ + mbedtls_ecp_group grp; /*!< Elliptic curve and base point */ + mbedtls_mpi d; /*!< our secret value */ + mbedtls_ecp_point Q; /*!< our public value */ +} +mbedtls_ecp_keypair; + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_ECP_MAX_BITS) +/** + * Maximum size of the groups (that is, of N and P) + */ +#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */ +#endif + +#define MBEDTLS_ECP_MAX_BYTES ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 ) +#define MBEDTLS_ECP_MAX_PT_LEN ( 2 * MBEDTLS_ECP_MAX_BYTES + 1 ) + +#if !defined(MBEDTLS_ECP_WINDOW_SIZE) +/* + * Maximum "window" size used for point multiplication. + * Default: 6. + * Minimum value: 2. Maximum value: 7. + * + * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) ) + * points used for point multiplication. This value is directly tied to EC + * peak memory usage, so decreasing it by one should roughly cut memory usage + * by two (if large curves are in use). + * + * Reduction in size may reduce speed, but larger curves are impacted first. + * Sample performances (in ECDHE handshakes/s, with FIXED_POINT_OPTIM = 1): + * w-size: 6 5 4 3 2 + * 521 145 141 135 120 97 + * 384 214 209 198 177 146 + * 256 320 320 303 262 226 + + * 224 475 475 453 398 342 + * 192 640 640 633 587 476 + */ +#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */ +#endif /* MBEDTLS_ECP_WINDOW_SIZE */ + +#if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM) +/* + * Trade memory for speed on fixed-point multiplication. + * + * This speeds up repeated multiplication of the generator (that is, the + * multiplication in ECDSA signatures, and half of the multiplications in + * ECDSA verification and ECDHE) by a factor roughly 3 to 4. + * + * The cost is increasing EC peak memory usage by a factor roughly 2. + * + * Change this value to 0 to reduce peak memory usage. + */ +#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */ +#endif /* MBEDTLS_ECP_FIXED_POINT_OPTIM */ + +/* \} name SECTION: Module settings */ + +/* + * Point formats, from RFC 4492's enum ECPointFormat + */ +#define MBEDTLS_ECP_PF_UNCOMPRESSED 0 /**< Uncompressed point format */ +#define MBEDTLS_ECP_PF_COMPRESSED 1 /**< Compressed point format */ + +/* + * Some other constants from RFC 4492 + */ +#define MBEDTLS_ECP_TLS_NAMED_CURVE 3 /**< ECCurveType's named_curve */ + +/** + * \brief Get the list of supported curves in order of preferrence + * (full information) + * + * \return A statically allocated array, the last entry is 0. + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void ); + +/** + * \brief Get the list of supported curves in order of preferrence + * (grp_id only) + * + * \return A statically allocated array, + * terminated with MBEDTLS_ECP_DP_NONE. + */ +const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void ); + +/** + * \brief Get curve information from an internal group identifier + * + * \param grp_id A MBEDTLS_ECP_DP_XXX value + * + * \return The associated curve information or NULL + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id( mbedtls_ecp_group_id grp_id ); + +/** + * \brief Get curve information from a TLS NamedCurve value + * + * \param tls_id A MBEDTLS_ECP_DP_XXX value + * + * \return The associated curve information or NULL + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id( uint16_t tls_id ); + +/** + * \brief Get curve information from a human-readable name + * + * \param name The name + * + * \return The associated curve information or NULL + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name( const char *name ); + +/** + * \brief Initialize a point (as zero) + */ +void mbedtls_ecp_point_init( mbedtls_ecp_point *pt ); + +/** + * \brief Initialize a group (to something meaningless) + */ +void mbedtls_ecp_group_init( mbedtls_ecp_group *grp ); + +/** + * \brief Initialize a key pair (as an invalid one) + */ +void mbedtls_ecp_keypair_init( mbedtls_ecp_keypair *key ); + +/** + * \brief Free the components of a point + */ +void mbedtls_ecp_point_free( mbedtls_ecp_point *pt ); + +/** + * \brief Free the components of an ECP group + */ +void mbedtls_ecp_group_free( mbedtls_ecp_group *grp ); + +/** + * \brief Free the components of a key pair + */ +void mbedtls_ecp_keypair_free( mbedtls_ecp_keypair *key ); + +/** + * \brief Copy the contents of point Q into P + * + * \param P Destination point + * \param Q Source point + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_ecp_copy( mbedtls_ecp_point *P, const mbedtls_ecp_point *Q ); + +/** + * \brief Copy the contents of a group object + * + * \param dst Destination group + * \param src Source group + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_ecp_group_copy( mbedtls_ecp_group *dst, const mbedtls_ecp_group *src ); + +/** + * \brief Set a point to zero + * + * \param pt Destination point + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_ecp_set_zero( mbedtls_ecp_point *pt ); + +/** + * \brief Tell if a point is zero + * + * \param pt Point to test + * + * \return 1 if point is zero, 0 otherwise + */ +int mbedtls_ecp_is_zero( mbedtls_ecp_point *pt ); + +/** + * \brief Compare two points + * + * \note This assumes the points are normalized. Otherwise, + * they may compare as "not equal" even if they are. + * + * \param P First point to compare + * \param Q Second point to compare + * + * \return 0 if the points are equal, + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA otherwise + */ +int mbedtls_ecp_point_cmp( const mbedtls_ecp_point *P, + const mbedtls_ecp_point *Q ); + +/** + * \brief Import a non-zero point from two ASCII strings + * + * \param P Destination point + * \param radix Input numeric base + * \param x First affine coordinate as a null-terminated string + * \param y Second affine coordinate as a null-terminated string + * + * \return 0 if successful, or a MBEDTLS_ERR_MPI_XXX error code + */ +int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix, + const char *x, const char *y ); + +/** + * \brief Export a point into unsigned binary data + * + * \param grp Group to which the point should belong + * \param P Point to export + * \param format Point format, should be a MBEDTLS_ECP_PF_XXX macro + * \param olen Length of the actual output + * \param buf Output buffer + * \param buflen Length of the output buffer + * + * \return 0 if successful, + * or MBEDTLS_ERR_ECP_BAD_INPUT_DATA + * or MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL + */ +int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *P, + int format, size_t *olen, + unsigned char *buf, size_t buflen ); + +/** + * \brief Import a point from unsigned binary data + * + * \param grp Group to which the point should belong + * \param P Point to import + * \param buf Input buffer + * \param ilen Actual length of input + * + * \return 0 if successful, + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format + * is not implemented. + * + * \note This function does NOT check that the point actually + * belongs to the given group, see mbedtls_ecp_check_pubkey() for + * that. + */ +int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P, + const unsigned char *buf, size_t ilen ); + +/** + * \brief Import a point from a TLS ECPoint record + * + * \param grp ECP group used + * \param pt Destination point + * \param buf $(Start of input buffer) + * \param len Buffer length + * + * \note buf is updated to point right after the ECPoint on exit + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_XXX if initialization failed + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid + */ +int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt, + const unsigned char **buf, size_t len ); + +/** + * \brief Export a point as a TLS ECPoint record + * + * \param grp ECP group used + * \param pt Point to export + * \param format Export format + * \param olen length of data written + * \param buf Buffer to write to + * \param blen Buffer length + * + * \return 0 if successful, + * or MBEDTLS_ERR_ECP_BAD_INPUT_DATA + * or MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL + */ +int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt, + int format, size_t *olen, + unsigned char *buf, size_t blen ); + +/** + * \brief Set a group using well-known domain parameters + * + * \param grp Destination group + * \param index Index in the list of well-known domain parameters + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_XXX if initialization failed + * MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE for unkownn groups + * + * \note Index should be a value of RFC 4492's enum NamedCurve, + * usually in the form of a MBEDTLS_ECP_DP_XXX macro. + */ +int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id index ); + +/** + * \brief Set a group from a TLS ECParameters record + * + * \param grp Destination group + * \param buf &(Start of input buffer) + * \param len Buffer length + * + * \note buf is updated to point right after ECParameters on exit + * + * \return 0 if successful, + * MBEDTLS_ERR_MPI_XXX if initialization failed + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid + */ +int mbedtls_ecp_tls_read_group( mbedtls_ecp_group *grp, const unsigned char **buf, size_t len ); + +/** + * \brief Write the TLS ECParameters record for a group + * + * \param grp ECP group used + * \param olen Number of bytes actually written + * \param buf Buffer to write to + * \param blen Buffer length + * + * \return 0 if successful, + * or MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL + */ +int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp, size_t *olen, + unsigned char *buf, size_t blen ); + +/** + * \brief Multiplication by an integer: R = m * P + * (Not thread-safe to use same group in multiple threads) + * + * \note In order to prevent timing attacks, this function + * executes the exact same sequence of (base field) + * operations for any valid m. It avoids any if-branch or + * array index depending on the value of m. + * + * \note If f_rng is not NULL, it is used to randomize intermediate + * results in order to prevent potential timing attacks + * targeting these results. It is recommended to always + * provide a non-NULL f_rng (the overhead is negligible). + * + * \param grp ECP group + * \param R Destination point + * \param m Integer by which to multiply + * \param P Point to multiply + * \param f_rng RNG function (see notes) + * \param p_rng RNG parameter + * + * \return 0 if successful, + * MBEDTLS_ERR_ECP_INVALID_KEY if m is not a valid privkey + * or P is not a valid pubkey, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Multiplication and addition of two points by integers: + * R = m * P + n * Q + * (Not thread-safe to use same group in multiple threads) + * + * \note In contrast to mbedtls_ecp_mul(), this function does not guarantee + * a constant execution flow and timing. + * + * \param grp ECP group + * \param R Destination point + * \param m Integer by which to multiply P + * \param P Point to multiply by m + * \param n Integer by which to multiply Q + * \param Q Point to be multiplied by n + * + * \return 0 if successful, + * MBEDTLS_ERR_ECP_INVALID_KEY if m or n is not a valid privkey + * or P or Q is not a valid pubkey, + * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + */ +int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + const mbedtls_mpi *n, const mbedtls_ecp_point *Q ); + +/** + * \brief Check that a point is a valid public key on this curve + * + * \param grp Curve/group the point should belong to + * \param pt Point to check + * + * \return 0 if point is a valid public key, + * MBEDTLS_ERR_ECP_INVALID_KEY otherwise. + * + * \note This function only checks the point is non-zero, has valid + * coordinates and lies on the curve, but not that it is + * indeed a multiple of G. This is additional check is more + * expensive, isn't required by standards, and shouldn't be + * necessary if the group used has a small cofactor. In + * particular, it is useless for the NIST groups which all + * have a cofactor of 1. + * + * \note Uses bare components rather than an mbedtls_ecp_keypair structure + * in order to ease use with other structures such as + * mbedtls_ecdh_context of mbedtls_ecdsa_context. + */ +int mbedtls_ecp_check_pubkey( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt ); + +/** + * \brief Check that an mbedtls_mpi is a valid private key for this curve + * + * \param grp Group used + * \param d Integer to check + * + * \return 0 if point is a valid private key, + * MBEDTLS_ERR_ECP_INVALID_KEY otherwise. + * + * \note Uses bare components rather than an mbedtls_ecp_keypair structure + * in order to ease use with other structures such as + * mbedtls_ecdh_context of mbedtls_ecdsa_context. + */ +int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp, const mbedtls_mpi *d ); + +/** + * \brief Generate a keypair with configurable base point + * + * \param grp ECP group + * \param G Chosen base point + * \param d Destination MPI (secret part) + * \param Q Destination point (public part) + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + * + * \note Uses bare components rather than an mbedtls_ecp_keypair structure + * in order to ease use with other structures such as + * mbedtls_ecdh_context of mbedtls_ecdsa_context. + */ +int mbedtls_ecp_gen_keypair_base( mbedtls_ecp_group *grp, + const mbedtls_ecp_point *G, + mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Generate a keypair + * + * \param grp ECP group + * \param d Destination MPI (secret part) + * \param Q Destination point (public part) + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + * + * \note Uses bare components rather than an mbedtls_ecp_keypair structure + * in order to ease use with other structures such as + * mbedtls_ecdh_context of mbedtls_ecdsa_context. + */ +int mbedtls_ecp_gen_keypair( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Generate a keypair + * + * \param grp_id ECP group identifier + * \param key Destination keypair + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful, + * or a MBEDTLS_ERR_ECP_XXX or MBEDTLS_MPI_XXX error code + */ +int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Check a public-private key pair + * + * \param pub Keypair structure holding a public key + * \param prv Keypair structure holding a private (plus public) key + * + * \return 0 if successful (keys are valid and match), or + * MBEDTLS_ERR_ECP_BAD_INPUT_DATA, or + * a MBEDTLS_ERR_ECP_XXX or MBEDTLS_ERR_MPI_XXX code. + */ +int mbedtls_ecp_check_pub_priv( const mbedtls_ecp_keypair *pub, const mbedtls_ecp_keypair *prv ); + +#if defined(MBEDTLS_SELF_TEST) +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if a test failed + */ +int mbedtls_ecp_self_test( int verbose ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* ecp.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/entropy.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/entropy.h new file mode 100644 index 0000000..00de9a6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/entropy.h @@ -0,0 +1,252 @@ +/** + * \file entropy.h + * + * \brief Entropy accumulator implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ENTROPY_H +#define MBEDTLS_ENTROPY_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +#if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256) +#include "sha512.h" +#define MBEDTLS_ENTROPY_SHA512_ACCUMULATOR +#else +#if defined(MBEDTLS_SHA256_C) +#define MBEDTLS_ENTROPY_SHA256_ACCUMULATOR +#include "sha256.h" +#endif +#endif + +#if defined(MBEDTLS_THREADING_C) +#include "threading.h" +#endif + +#if defined(MBEDTLS_HAVEGE_C) +#include "havege.h" +#endif + +#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED -0x003C /**< Critical entropy source failure. */ +#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES -0x003E /**< No more sources can be added. */ +#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED -0x0040 /**< No sources have been added to poll. */ +#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE -0x003D /**< No strong sources have been added to poll. */ +#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR -0x003F /**< Read/write error in file. */ + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_ENTROPY_MAX_SOURCES) +#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */ +#endif + +#if !defined(MBEDTLS_ENTROPY_MAX_GATHER) +#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */ +#endif + +/* \} name SECTION: Module settings */ + +#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR) +#define MBEDTLS_ENTROPY_BLOCK_SIZE 64 /**< Block size of entropy accumulator (SHA-512) */ +#else +#define MBEDTLS_ENTROPY_BLOCK_SIZE 32 /**< Block size of entropy accumulator (SHA-256) */ +#endif + +#define MBEDTLS_ENTROPY_MAX_SEED_SIZE 1024 /**< Maximum size of seed we read from seed file */ +#define MBEDTLS_ENTROPY_SOURCE_MANUAL MBEDTLS_ENTROPY_MAX_SOURCES + +#define MBEDTLS_ENTROPY_SOURCE_STRONG 1 /**< Entropy source is strong */ +#define MBEDTLS_ENTROPY_SOURCE_WEAK 0 /**< Entropy source is weak */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Entropy poll callback pointer + * + * \param data Callback-specific data pointer + * \param output Data to fill + * \param len Maximum size to provide + * \param olen The actual amount of bytes put into the buffer (Can be 0) + * + * \return 0 if no critical failures occurred, + * MBEDTLS_ERR_ENTROPY_SOURCE_FAILED otherwise + */ +typedef int (*mbedtls_entropy_f_source_ptr)(void *data, unsigned char *output, size_t len, + size_t *olen); + +/** + * \brief Entropy source state + */ +typedef struct +{ + mbedtls_entropy_f_source_ptr f_source; /**< The entropy source callback */ + void * p_source; /**< The callback data pointer */ + size_t size; /**< Amount received in bytes */ + size_t threshold; /**< Minimum bytes required before release */ + int strong; /**< Is the source strong? */ +} +mbedtls_entropy_source_state; + +/** + * \brief Entropy context structure + */ +typedef struct +{ +#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR) + mbedtls_sha512_context accumulator; +#else + mbedtls_sha256_context accumulator; +#endif + int source_count; + mbedtls_entropy_source_state source[MBEDTLS_ENTROPY_MAX_SOURCES]; +#if defined(MBEDTLS_HAVEGE_C) + mbedtls_havege_state havege_data; +#endif +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; /*!< mutex */ +#endif +} +mbedtls_entropy_context; + +/** + * \brief Initialize the context + * + * \param ctx Entropy context to initialize + */ +void mbedtls_entropy_init( mbedtls_entropy_context *ctx ); + +/** + * \brief Free the data in the context + * + * \param ctx Entropy context to free + */ +void mbedtls_entropy_free( mbedtls_entropy_context *ctx ); + +/** + * \brief Adds an entropy source to poll + * (Thread-safe if MBEDTLS_THREADING_C is enabled) + * + * \param ctx Entropy context + * \param f_source Entropy function + * \param p_source Function data + * \param threshold Minimum required from source before entropy is released + * ( with mbedtls_entropy_func() ) (in bytes) + * \param strong MBEDTLS_ENTROPY_SOURCE_STRONG or + * MBEDTSL_ENTROPY_SOURCE_WEAK. + * At least one strong source needs to be added. + * Weaker sources (such as the cycle counter) can be used as + * a complement. + * + * \return 0 if successful or MBEDTLS_ERR_ENTROPY_MAX_SOURCES + */ +int mbedtls_entropy_add_source( mbedtls_entropy_context *ctx, + mbedtls_entropy_f_source_ptr f_source, void *p_source, + size_t threshold, int strong ); + +/** + * \brief Trigger an extra gather poll for the accumulator + * (Thread-safe if MBEDTLS_THREADING_C is enabled) + * + * \param ctx Entropy context + * + * \return 0 if successful, or MBEDTLS_ERR_ENTROPY_SOURCE_FAILED + */ +int mbedtls_entropy_gather( mbedtls_entropy_context *ctx ); + +/** + * \brief Retrieve entropy from the accumulator + * (Maximum length: MBEDTLS_ENTROPY_BLOCK_SIZE) + * (Thread-safe if MBEDTLS_THREADING_C is enabled) + * + * \param data Entropy context + * \param output Buffer to fill + * \param len Number of bytes desired, must be at most MBEDTLS_ENTROPY_BLOCK_SIZE + * + * \return 0 if successful, or MBEDTLS_ERR_ENTROPY_SOURCE_FAILED + */ +int mbedtls_entropy_func( void *data, unsigned char *output, size_t len ); + +/** + * \brief Add data to the accumulator manually + * (Thread-safe if MBEDTLS_THREADING_C is enabled) + * + * \param ctx Entropy context + * \param data Data to add + * \param len Length of data + * + * \return 0 if successful + */ +int mbedtls_entropy_update_manual( mbedtls_entropy_context *ctx, + const unsigned char *data, size_t len ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Write a seed file + * + * \param ctx Entropy context + * \param path Name of the file + * + * \return 0 if successful, + * MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR on file error, or + * MBEDTLS_ERR_ENTROPY_SOURCE_FAILED + */ +int mbedtls_entropy_write_seed_file( mbedtls_entropy_context *ctx, const char *path ); + +/** + * \brief Read and update a seed file. Seed is added to this + * instance. No more than MBEDTLS_ENTROPY_MAX_SEED_SIZE bytes are + * read from the seed file. The rest is ignored. + * + * \param ctx Entropy context + * \param path Name of the file + * + * \return 0 if successful, + * MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR on file error, + * MBEDTLS_ERR_ENTROPY_SOURCE_FAILED + */ +int mbedtls_entropy_update_seed_file( mbedtls_entropy_context *ctx, const char *path ); +#endif /* MBEDTLS_FS_IO */ + +#if defined(MBEDTLS_SELF_TEST) +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if a test failed + */ +int mbedtls_entropy_self_test( int verbose ); +#endif /* MBEDTLS_SELF_TEST */ + +#ifdef __cplusplus +} +#endif + +#endif /* entropy.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/entropy_poll.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/entropy_poll.h new file mode 100644 index 0000000..dc11911 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/entropy_poll.h @@ -0,0 +1,89 @@ +/** + * \file entropy_poll.h + * + * \brief Platform-specific and custom entropy polling functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ENTROPY_POLL_H +#define MBEDTLS_ENTROPY_POLL_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Default thresholds for built-in sources, in bytes + */ +#define MBEDTLS_ENTROPY_MIN_PLATFORM 32 /**< Minimum for platform source */ +#define MBEDTLS_ENTROPY_MIN_HAVEGE 32 /**< Minimum for HAVEGE */ +#define MBEDTLS_ENTROPY_MIN_HARDCLOCK 4 /**< Minimum for mbedtls_timing_hardclock() */ +#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Minimum for the hardware source */ + +#if !defined(MBEDTLS_NO_PLATFORM_ENTROPY) +/** + * \brief Platform-specific entropy poll callback + */ +int mbedtls_platform_entropy_poll( void *data, + unsigned char *output, size_t len, size_t *olen ); +#endif + +#if defined(MBEDTLS_HAVEGE_C) +/** + * \brief HAVEGE based entropy poll callback + * + * Requires an HAVEGE state as its data pointer. + */ +int mbedtls_havege_poll( void *data, + unsigned char *output, size_t len, size_t *olen ); +#endif + +#if defined(MBEDTLS_TIMING_C) +/** + * \brief mbedtls_timing_hardclock-based entropy poll callback + */ +int mbedtls_hardclock_poll( void *data, + unsigned char *output, size_t len, size_t *olen ); +#endif + +#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT) +/** + * \brief Entropy poll callback for a hardware source + * + * \warning This is not provided by mbed TLS! + * See \c MBEDTLS_ENTROPY_HARDWARE_ALT in config.h. + * + * \note This must accept NULL as its first argument. + */ +int mbedtls_hardware_poll( void *data, + unsigned char *output, size_t len, size_t *olen ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* entropy_poll.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/error.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/error.h new file mode 100644 index 0000000..5e549f6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/error.h @@ -0,0 +1,107 @@ +/** + * \file error.h + * + * \brief Error to string translation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_ERROR_H +#define MBEDTLS_ERROR_H + +#include + +/** + * Error code layout. + * + * Currently we try to keep all error codes within the negative space of 16 + * bits signed integers to support all platforms (-0x0001 - -0x7FFF). In + * addition we'd like to give two layers of information on the error if + * possible. + * + * For that purpose the error codes are segmented in the following manner: + * + * 16 bit error code bit-segmentation + * + * 1 bit - Unused (sign bit) + * 3 bits - High level module ID + * 5 bits - Module-dependent error code + * 7 bits - Low level module errors + * + * For historical reasons, low-level error codes are divided in even and odd, + * even codes were assigned first, and -1 is reserved for other errors. + * + * Low-level module errors (0x0002-0x007E, 0x0003-0x007F) + * + * Module Nr Codes assigned + * MPI 7 0x0002-0x0010 + * GCM 2 0x0012-0x0014 + * BLOWFISH 2 0x0016-0x0018 + * THREADING 3 0x001A-0x001E + * AES 2 0x0020-0x0022 + * CAMELLIA 2 0x0024-0x0026 + * XTEA 1 0x0028-0x0028 + * BASE64 2 0x002A-0x002C + * OID 1 0x002E-0x002E 0x000B-0x000B + * PADLOCK 1 0x0030-0x0030 + * DES 1 0x0032-0x0032 + * CTR_DBRG 4 0x0034-0x003A + * ENTROPY 3 0x003C-0x0040 0x003D-0x003F + * NET 11 0x0042-0x0052 0x0043-0x0045 + * ASN1 7 0x0060-0x006C + * PBKDF2 1 0x007C-0x007C + * HMAC_DRBG 4 0x0003-0x0009 + * CCM 2 0x000D-0x000F + * + * High-level module nr (3 bits - 0x0...-0x7...) + * Name ID Nr of Errors + * PEM 1 9 + * PKCS#12 1 4 (Started from top) + * X509 2 19 + * PKCS5 2 4 (Started from top) + * DHM 3 9 + * PK 3 14 (Started from top) + * RSA 4 9 + * ECP 4 8 (Started from top) + * MD 5 4 + * CIPHER 6 6 + * SSL 6 17 (Started from top) + * SSL 7 31 + * + * Module dependent error code (5 bits 0x.00.-0x.F8.) + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Translate a mbed TLS error code into a string representation, + * Result is truncated if necessary and always includes a terminating + * null byte. + * + * \param errnum error code + * \param buffer buffer to place representation in + * \param buflen length of the buffer + */ +void mbedtls_strerror( int errnum, char *buffer, size_t buflen ); + +#ifdef __cplusplus +} +#endif + +#endif /* error.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/gcm.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/gcm.h new file mode 100644 index 0000000..6743ac9 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/gcm.h @@ -0,0 +1,220 @@ +/** + * \file gcm.h + * + * \brief Galois/Counter mode for 128-bit block ciphers + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_GCM_H +#define MBEDTLS_GCM_H + +#include "cipher.h" + +#include + +#define MBEDTLS_GCM_ENCRYPT 1 +#define MBEDTLS_GCM_DECRYPT 0 + +#define MBEDTLS_ERR_GCM_AUTH_FAILED -0x0012 /**< Authenticated decryption failed. */ +#define MBEDTLS_ERR_GCM_BAD_INPUT -0x0014 /**< Bad input parameters to function. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief GCM context structure + */ +typedef struct { + mbedtls_cipher_context_t cipher_ctx;/*!< cipher context used */ + uint64_t HL[16]; /*!< Precalculated HTable */ + uint64_t HH[16]; /*!< Precalculated HTable */ + uint64_t len; /*!< Total data length */ + uint64_t add_len; /*!< Total add length */ + unsigned char base_ectr[16];/*!< First ECTR for tag */ + unsigned char y[16]; /*!< Y working value */ + unsigned char buf[16]; /*!< buf working value */ + int mode; /*!< Encrypt or Decrypt */ +} +mbedtls_gcm_context; + +/** + * \brief Initialize GCM context (just makes references valid) + * Makes the context ready for mbedtls_gcm_setkey() or + * mbedtls_gcm_free(). + * + * \param ctx GCM context to initialize + */ +void mbedtls_gcm_init( mbedtls_gcm_context *ctx ); + +/** + * \brief GCM initialization (encryption) + * + * \param ctx GCM context to be initialized + * \param cipher cipher to use (a 128-bit block cipher) + * \param key encryption key + * \param keybits must be 128, 192 or 256 + * + * \return 0 if successful, or a cipher specific error code + */ +int mbedtls_gcm_setkey( mbedtls_gcm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits ); + +/** + * \brief GCM buffer encryption/decryption using a block cipher + * + * \note On encryption, the output buffer can be the same as the input buffer. + * On decryption, the output buffer cannot be the same as input buffer. + * If buffers overlap, the output buffer must trail at least 8 bytes + * behind the input buffer. + * + * \param ctx GCM context + * \param mode MBEDTLS_GCM_ENCRYPT or MBEDTLS_GCM_DECRYPT + * \param length length of the input data + * \param iv initialization vector + * \param iv_len length of IV + * \param add additional data + * \param add_len length of additional data + * \param input buffer holding the input data + * \param output buffer for holding the output data + * \param tag_len length of the tag to generate + * \param tag buffer for holding the tag + * + * \return 0 if successful + */ +int mbedtls_gcm_crypt_and_tag( mbedtls_gcm_context *ctx, + int mode, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *input, + unsigned char *output, + size_t tag_len, + unsigned char *tag ); + +/** + * \brief GCM buffer authenticated decryption using a block cipher + * + * \note On decryption, the output buffer cannot be the same as input buffer. + * If buffers overlap, the output buffer must trail at least 8 bytes + * behind the input buffer. + * + * \param ctx GCM context + * \param length length of the input data + * \param iv initialization vector + * \param iv_len length of IV + * \param add additional data + * \param add_len length of additional data + * \param tag buffer holding the tag + * \param tag_len length of the tag + * \param input buffer holding the input data + * \param output buffer for holding the output data + * + * \return 0 if successful and authenticated, + * MBEDTLS_ERR_GCM_AUTH_FAILED if tag does not match + */ +int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *tag, + size_t tag_len, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief Generic GCM stream start function + * + * \param ctx GCM context + * \param mode MBEDTLS_GCM_ENCRYPT or MBEDTLS_GCM_DECRYPT + * \param iv initialization vector + * \param iv_len length of IV + * \param add additional data (or NULL if length is 0) + * \param add_len length of additional data + * + * \return 0 if successful + */ +int mbedtls_gcm_starts( mbedtls_gcm_context *ctx, + int mode, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len ); + +/** + * \brief Generic GCM update function. Encrypts/decrypts using the + * given GCM context. Expects input to be a multiple of 16 + * bytes! Only the last call before mbedtls_gcm_finish() can be less + * than 16 bytes! + * + * \note On decryption, the output buffer cannot be the same as input buffer. + * If buffers overlap, the output buffer must trail at least 8 bytes + * behind the input buffer. + * + * \param ctx GCM context + * \param length length of the input data + * \param input buffer holding the input data + * \param output buffer for holding the output data + * + * \return 0 if successful or MBEDTLS_ERR_GCM_BAD_INPUT + */ +int mbedtls_gcm_update( mbedtls_gcm_context *ctx, + size_t length, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief Generic GCM finalisation function. Wraps up the GCM stream + * and generates the tag. The tag can have a maximum length of + * 16 bytes. + * + * \param ctx GCM context + * \param tag buffer for holding the tag (may be NULL if tag_len is 0) + * \param tag_len length of the tag to generate + * + * \return 0 if successful or MBEDTLS_ERR_GCM_BAD_INPUT + */ +int mbedtls_gcm_finish( mbedtls_gcm_context *ctx, + unsigned char *tag, + size_t tag_len ); + +/** + * \brief Free a GCM context and underlying cipher sub-context + * + * \param ctx GCM context to free + */ +void mbedtls_gcm_free( mbedtls_gcm_context *ctx ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_gcm_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* gcm.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/havege.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/havege.h new file mode 100644 index 0000000..dac5d31 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/havege.h @@ -0,0 +1,74 @@ +/** + * \file havege.h + * + * \brief HAVEGE: HArdware Volatile Entropy Gathering and Expansion + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_HAVEGE_H +#define MBEDTLS_HAVEGE_H + +#include + +#define MBEDTLS_HAVEGE_COLLECT_SIZE 1024 + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief HAVEGE state structure + */ +typedef struct +{ + int PT1, PT2, offset[2]; + int pool[MBEDTLS_HAVEGE_COLLECT_SIZE]; + int WALK[8192]; +} +mbedtls_havege_state; + +/** + * \brief HAVEGE initialization + * + * \param hs HAVEGE state to be initialized + */ +void mbedtls_havege_init( mbedtls_havege_state *hs ); + +/** + * \brief Clear HAVEGE state + * + * \param hs HAVEGE state to be cleared + */ +void mbedtls_havege_free( mbedtls_havege_state *hs ); + +/** + * \brief HAVEGE rand function + * + * \param p_rng A HAVEGE state + * \param output Buffer to fill + * \param len Length of buffer + * + * \return 0 + */ +int mbedtls_havege_random( void *p_rng, unsigned char *output, size_t len ); + +#ifdef __cplusplus +} +#endif + +#endif /* havege.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/hmac_drbg.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/hmac_drbg.h new file mode 100644 index 0000000..e010558 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/hmac_drbg.h @@ -0,0 +1,299 @@ +/** + * \file hmac_drbg.h + * + * \brief HMAC_DRBG (NIST SP 800-90A) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_HMAC_DRBG_H +#define MBEDTLS_HMAC_DRBG_H + +#include "md.h" + +#if defined(MBEDTLS_THREADING_C) +#include "mbedtls/threading.h" +#endif + +/* + * Error codes + */ +#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG -0x0003 /**< Too many random requested in single call. */ +#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG -0x0005 /**< Input too large (Entropy + additional). */ +#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR -0x0007 /**< Read/write error in file. */ +#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED -0x0009 /**< The entropy source failed. */ + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_HMAC_DRBG_RESEED_INTERVAL) +#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +#endif + +#if !defined(MBEDTLS_HMAC_DRBG_MAX_INPUT) +#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +#endif + +#if !defined(MBEDTLS_HMAC_DRBG_MAX_REQUEST) +#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +#endif + +#if !defined(MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT) +#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ +#endif + +/* \} name SECTION: Module settings */ + +#define MBEDTLS_HMAC_DRBG_PR_OFF 0 /**< No prediction resistance */ +#define MBEDTLS_HMAC_DRBG_PR_ON 1 /**< Prediction resistance enabled */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * HMAC_DRBG context. + */ +typedef struct +{ + /* Working state: the key K is not stored explicitely, + * but is implied by the HMAC context */ + mbedtls_md_context_t md_ctx; /*!< HMAC context (inc. K) */ + unsigned char V[MBEDTLS_MD_MAX_SIZE]; /*!< V in the spec */ + int reseed_counter; /*!< reseed counter */ + + /* Administrative state */ + size_t entropy_len; /*!< entropy bytes grabbed on each (re)seed */ + int prediction_resistance; /*!< enable prediction resistance (Automatic + reseed before every random generation) */ + int reseed_interval; /*!< reseed interval */ + + /* Callbacks */ + int (*f_entropy)(void *, unsigned char *, size_t); /*!< entropy function */ + void *p_entropy; /*!< context for the entropy function */ + +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; +#endif +} mbedtls_hmac_drbg_context; + +/** + * \brief HMAC_DRBG context initialization + * Makes the context ready for mbedtls_hmac_drbg_seed(), + * mbedtls_hmac_drbg_seed_buf() or + * mbedtls_hmac_drbg_free(). + * + * \param ctx HMAC_DRBG context to be initialized + */ +void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx ); + +/** + * \brief HMAC_DRBG initial seeding + * Seed and setup entropy source for future reseeds. + * + * \param ctx HMAC_DRBG context to be seeded + * \param md_info MD algorithm to use for HMAC_DRBG + * \param f_entropy Entropy callback (p_entropy, buffer to fill, buffer + * length) + * \param p_entropy Entropy context + * \param custom Personalization data (Device specific identifiers) + * (Can be NULL) + * \param len Length of personalization data + * + * \note The "security strength" as defined by NIST is set to: + * 128 bits if md_alg is SHA-1, + * 192 bits if md_alg is SHA-224, + * 256 bits if md_alg is SHA-256 or higher. + * Note that SHA-256 is just as efficient as SHA-224. + * + * \return 0 if successful, or + * MBEDTLS_ERR_MD_BAD_INPUT_DATA, or + * MBEDTLS_ERR_MD_ALLOC_FAILED, or + * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED. + */ +int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx, + const mbedtls_md_info_t * md_info, + int (*f_entropy)(void *, unsigned char *, size_t), + void *p_entropy, + const unsigned char *custom, + size_t len ); + +/** + * \brief Initilisation of simpified HMAC_DRBG (never reseeds). + * (For use with deterministic ECDSA.) + * + * \param ctx HMAC_DRBG context to be initialised + * \param md_info MD algorithm to use for HMAC_DRBG + * \param data Concatenation of entropy string and additional data + * \param data_len Length of data in bytes + * + * \return 0 if successful, or + * MBEDTLS_ERR_MD_BAD_INPUT_DATA, or + * MBEDTLS_ERR_MD_ALLOC_FAILED. + */ +int mbedtls_hmac_drbg_seed_buf( mbedtls_hmac_drbg_context *ctx, + const mbedtls_md_info_t * md_info, + const unsigned char *data, size_t data_len ); + +/** + * \brief Enable / disable prediction resistance (Default: Off) + * + * Note: If enabled, entropy is used for ctx->entropy_len before each call! + * Only use this if you have ample supply of good entropy! + * + * \param ctx HMAC_DRBG context + * \param resistance MBEDTLS_HMAC_DRBG_PR_ON or MBEDTLS_HMAC_DRBG_PR_OFF + */ +void mbedtls_hmac_drbg_set_prediction_resistance( mbedtls_hmac_drbg_context *ctx, + int resistance ); + +/** + * \brief Set the amount of entropy grabbed on each reseed + * (Default: given by the security strength, which + * depends on the hash used, see \c mbedtls_hmac_drbg_init() ) + * + * \param ctx HMAC_DRBG context + * \param len Amount of entropy to grab, in bytes + */ +void mbedtls_hmac_drbg_set_entropy_len( mbedtls_hmac_drbg_context *ctx, + size_t len ); + +/** + * \brief Set the reseed interval + * (Default: MBEDTLS_HMAC_DRBG_RESEED_INTERVAL) + * + * \param ctx HMAC_DRBG context + * \param interval Reseed interval + */ +void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx, + int interval ); + +/** + * \brief HMAC_DRBG update state + * + * \param ctx HMAC_DRBG context + * \param additional Additional data to update state with, or NULL + * \param add_len Length of additional data, or 0 + * + * \note Additional data is optional, pass NULL and 0 as second + * third argument if no additional data is being used. + */ +void mbedtls_hmac_drbg_update( mbedtls_hmac_drbg_context *ctx, + const unsigned char *additional, size_t add_len ); + +/** + * \brief HMAC_DRBG reseeding (extracts data from entropy source) + * + * \param ctx HMAC_DRBG context + * \param additional Additional data to add to state (Can be NULL) + * \param len Length of additional data + * + * \return 0 if successful, or + * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED + */ +int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx, + const unsigned char *additional, size_t len ); + +/** + * \brief HMAC_DRBG generate random with additional update input + * + * Note: Automatically reseeds if reseed_counter is reached or PR is enabled. + * + * \param p_rng HMAC_DRBG context + * \param output Buffer to fill + * \param output_len Length of the buffer + * \param additional Additional data to update with (can be NULL) + * \param add_len Length of additional data (can be 0) + * + * \return 0 if successful, or + * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED, or + * MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG, or + * MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG. + */ +int mbedtls_hmac_drbg_random_with_add( void *p_rng, + unsigned char *output, size_t output_len, + const unsigned char *additional, + size_t add_len ); + +/** + * \brief HMAC_DRBG generate random + * + * Note: Automatically reseeds if reseed_counter is reached or PR is enabled. + * + * \param p_rng HMAC_DRBG context + * \param output Buffer to fill + * \param out_len Length of the buffer + * + * \return 0 if successful, or + * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED, or + * MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG + */ +int mbedtls_hmac_drbg_random( void *p_rng, unsigned char *output, size_t out_len ); + +/** + * \brief Free an HMAC_DRBG context + * + * \param ctx HMAC_DRBG context to free. + */ +void mbedtls_hmac_drbg_free( mbedtls_hmac_drbg_context *ctx ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Write a seed file + * + * \param ctx HMAC_DRBG context + * \param path Name of the file + * + * \return 0 if successful, 1 on file error, or + * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED + */ +int mbedtls_hmac_drbg_write_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path ); + +/** + * \brief Read and update a seed file. Seed is added to this + * instance + * + * \param ctx HMAC_DRBG context + * \param path Name of the file + * + * \return 0 if successful, 1 on file error, + * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED or + * MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG + */ +int mbedtls_hmac_drbg_update_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path ); +#endif /* MBEDTLS_FS_IO */ + + +#if defined(MBEDTLS_SELF_TEST) +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_hmac_drbg_self_test( int verbose ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* hmac_drbg.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/mbedtls_debug.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/mbedtls_debug.h new file mode 100644 index 0000000..30b902e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/mbedtls_debug.h @@ -0,0 +1,13 @@ +#ifndef _MBEDTLS_DEBUG_H_ +#define _MBEDTLS_DEBUG_H_ + +#include "osapi.h" + +#define MBEDTLS_SSL_DEBUG_MSG( level, args ) os_printf args; +#define MBEDTLS_SSL_DEBUG_RET( level, ... ) os_printf (__VA_ARGS__); +#define MBEDTLS_SSL_DEBUG_BUF( level, ... ) os_printf (__VA_ARGS__); +#define MBEDTLS_SSL_DEBUG_MPI( level, text, X ) do { } while( 0 ) +#define MBEDTLS_SSL_DEBUG_ECP( level, text, X ) do { } while( 0 ) +#define MBEDTLS_SSL_DEBUG_CRT( level, text, crt ) do { } while( 0 ) + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md.h new file mode 100644 index 0000000..703e781 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md.h @@ -0,0 +1,353 @@ +/** + * \file md.h + * + * \brief Generic message digest wrapper + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_MD_H +#define MBEDTLS_MD_H + +#include + +#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE -0x5080 /**< The selected feature is not available. */ +#define MBEDTLS_ERR_MD_BAD_INPUT_DATA -0x5100 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_MD_ALLOC_FAILED -0x5180 /**< Failed to allocate memory. */ +#define MBEDTLS_ERR_MD_FILE_IO_ERROR -0x5200 /**< Opening or reading of file failed. */ + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + MBEDTLS_MD_NONE=0, + MBEDTLS_MD_MD2, + MBEDTLS_MD_MD4, + MBEDTLS_MD_MD5, + MBEDTLS_MD_SHA1, + MBEDTLS_MD_SHA224, + MBEDTLS_MD_SHA256, + MBEDTLS_MD_SHA384, + MBEDTLS_MD_SHA512, + MBEDTLS_MD_RIPEMD160, +} mbedtls_md_type_t; + +#if defined(MBEDTLS_SHA512_C) +#define MBEDTLS_MD_MAX_SIZE 64 /* longest known is SHA512 */ +#else +#define MBEDTLS_MD_MAX_SIZE 32 /* longest known is SHA256 or less */ +#endif + +/** + * Opaque struct defined in md_internal.h + */ +typedef struct mbedtls_md_info_t mbedtls_md_info_t; + +/** + * Generic message digest context. + */ +typedef struct { + /** Information about the associated message digest */ + const mbedtls_md_info_t *md_info; + + /** Digest-specific context */ + void *md_ctx; + + /** HMAC part of the context */ + void *hmac_ctx; +} mbedtls_md_context_t; + +/** + * \brief Returns the list of digests supported by the generic digest module. + * + * \return a statically allocated array of digests, the last entry + * is 0. + */ +const int *mbedtls_md_list( void ); + +/** + * \brief Returns the message digest information associated with the + * given digest name. + * + * \param md_name Name of the digest to search for. + * + * \return The message digest information associated with md_name or + * NULL if not found. + */ +const mbedtls_md_info_t *mbedtls_md_info_from_string( const char *md_name ); + +/** + * \brief Returns the message digest information associated with the + * given digest type. + * + * \param md_type type of digest to search for. + * + * \return The message digest information associated with md_type or + * NULL if not found. + */ +const mbedtls_md_info_t *mbedtls_md_info_from_type( mbedtls_md_type_t md_type ); + +/** + * \brief Initialize a md_context (as NONE) + * This should always be called first. + * Prepares the context for mbedtls_md_setup() or mbedtls_md_free(). + */ +void mbedtls_md_init( mbedtls_md_context_t *ctx ); + +/** + * \brief Free and clear the internal structures of ctx. + * Can be called at any time after mbedtls_md_init(). + * Mandatory once mbedtls_md_setup() has been called. + */ +void mbedtls_md_free( mbedtls_md_context_t *ctx ); + +#if ! defined(MBEDTLS_DEPRECATED_REMOVED) +#if defined(MBEDTLS_DEPRECATED_WARNING) +#define MBEDTLS_DEPRECATED __attribute__((deprecated)) +#else +#define MBEDTLS_DEPRECATED +#endif +/** + * \brief Select MD to use and allocate internal structures. + * Should be called after mbedtls_md_init() or mbedtls_md_free(). + * Makes it necessary to call mbedtls_md_free() later. + * + * \deprecated Superseded by mbedtls_md_setup() in 2.0.0 + * + * \param ctx Context to set up. + * \param md_info Message digest to use. + * + * \returns \c 0 on success, + * \c MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter failure, + * \c MBEDTLS_ERR_MD_ALLOC_FAILED memory allocation failure. + */ +int mbedtls_md_init_ctx( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info ) MBEDTLS_DEPRECATED; +#undef MBEDTLS_DEPRECATED +#endif /* MBEDTLS_DEPRECATED_REMOVED */ + +/** + * \brief Select MD to use and allocate internal structures. + * Should be called after mbedtls_md_init() or mbedtls_md_free(). + * Makes it necessary to call mbedtls_md_free() later. + * + * \param ctx Context to set up. + * \param md_info Message digest to use. + * \param hmac 0 to save some memory if HMAC will not be used, + * non-zero is HMAC is going to be used with this context. + * + * \returns \c 0 on success, + * \c MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter failure, + * \c MBEDTLS_ERR_MD_ALLOC_FAILED memory allocation failure. + */ +int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac ); + +/** + * \brief Clone the state of an MD context + * + * \note The two contexts must have been setup to the same type + * (cloning from SHA-256 to SHA-512 make no sense). + * + * \warning Only clones the MD state, not the HMAC state! (for now) + * + * \param dst The destination context + * \param src The context to be cloned + * + * \return \c 0 on success, + * \c MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter failure. + */ +int mbedtls_md_clone( mbedtls_md_context_t *dst, + const mbedtls_md_context_t *src ); + +/** + * \brief Returns the size of the message digest output. + * + * \param md_info message digest info + * + * \return size of the message digest output in bytes. + */ +int mbedtls_md_get_size( const mbedtls_md_info_t *md_info ); + +/** + * \brief Returns the type of the message digest output. + * + * \param md_info message digest info + * + * \return type of the message digest output. + */ +mbedtls_md_type_t mbedtls_md_get_type( const mbedtls_md_info_t *md_info ); + +/** + * \brief Returns the name of the message digest output. + * + * \param md_info message digest info + * + * \return name of the message digest output. + */ +const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info ); + +/** + * \brief Prepare the context to digest a new message. + * Generally called after mbedtls_md_setup() or mbedtls_md_finish(). + * Followed by mbedtls_md_update(). + * + * \param ctx generic message digest context. + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_starts( mbedtls_md_context_t *ctx ); + +/** + * \brief Generic message digest process buffer + * Called between mbedtls_md_starts() and mbedtls_md_finish(). + * May be called repeatedly. + * + * \param ctx Generic message digest context + * \param input buffer holding the datal + * \param ilen length of the input data + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen ); + +/** + * \brief Generic message digest final digest + * Called after mbedtls_md_update(). + * Usually followed by mbedtls_md_free() or mbedtls_md_starts(). + * + * \param ctx Generic message digest context + * \param output Generic message digest checksum result + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output ); + +/** + * \brief Output = message_digest( input buffer ) + * + * \param md_info message digest info + * \param input buffer holding the data + * \param ilen length of the input data + * \param output Generic message digest checksum result + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen, + unsigned char *output ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Output = message_digest( file contents ) + * + * \param md_info message digest info + * \param path input file name + * \param output generic message digest checksum result + * + * \return 0 if successful, + * MBEDTLS_ERR_MD_FILE_IO_ERROR if file input failed, + * MBEDTLS_ERR_MD_BAD_INPUT_DATA if md_info was NULL. + */ +int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path, + unsigned char *output ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief Set HMAC key and prepare to authenticate a new message. + * Usually called after mbedtls_md_setup() or mbedtls_md_hmac_finish(). + * + * \param ctx HMAC context + * \param key HMAC secret key + * \param keylen length of the HMAC key in bytes + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key, + size_t keylen ); + +/** + * \brief Generic HMAC process buffer. + * Called between mbedtls_md_hmac_starts() or mbedtls_md_hmac_reset() + * and mbedtls_md_hmac_finish(). + * May be called repeatedly. + * + * \param ctx HMAC context + * \param input buffer holding the data + * \param ilen length of the input data + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input, + size_t ilen ); + +/** + * \brief Output HMAC. + * Called after mbedtls_md_hmac_update(). + * Usually followed my mbedtls_md_hmac_reset(), mbedtls_md_hmac_starts(), + * or mbedtls_md_free(). + * + * \param ctx HMAC context + * \param output Generic HMAC checksum result + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output); + +/** + * \brief Prepare to authenticate a new message with the same key. + * Called after mbedtls_md_hmac_finish() and before mbedtls_md_hmac_update(). + * + * \param ctx HMAC context to be reset + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx ); + +/** + * \brief Output = Generic_HMAC( hmac key, input buffer ) + * + * \param md_info message digest info + * \param key HMAC secret key + * \param keylen length of the HMAC key in bytes + * \param input buffer holding the data + * \param ilen length of the input data + * \param output Generic HMAC-result + * + * \returns 0 on success, MBEDTLS_ERR_MD_BAD_INPUT_DATA if parameter + * verification fails. + */ +int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen, + const unsigned char *input, size_t ilen, + unsigned char *output ); + +/* Internal use */ +int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_MD_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md2.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md2.h new file mode 100644 index 0000000..0f93fbf --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md2.h @@ -0,0 +1,136 @@ +/** + * \file md2.h + * + * \brief MD2 message digest algorithm (hash function) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_MD2_H +#define MBEDTLS_MD2_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +#if !defined(MBEDTLS_MD2_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief MD2 context structure + */ +typedef struct +{ + unsigned char cksum[16]; /*!< checksum of the data block */ + unsigned char state[48]; /*!< intermediate digest state */ + unsigned char buffer[16]; /*!< data block being processed */ + size_t left; /*!< amount of data in buffer */ +} +mbedtls_md2_context; + +/** + * \brief Initialize MD2 context + * + * \param ctx MD2 context to be initialized + */ +void mbedtls_md2_init( mbedtls_md2_context *ctx ); + +/** + * \brief Clear MD2 context + * + * \param ctx MD2 context to be cleared + */ +void mbedtls_md2_free( mbedtls_md2_context *ctx ); + +/** + * \brief Clone (the state of) an MD2 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_md2_clone( mbedtls_md2_context *dst, + const mbedtls_md2_context *src ); + +/** + * \brief MD2 context setup + * + * \param ctx context to be initialized + */ +void mbedtls_md2_starts( mbedtls_md2_context *ctx ); + +/** + * \brief MD2 process buffer + * + * \param ctx MD2 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_md2_update( mbedtls_md2_context *ctx, const unsigned char *input, size_t ilen ); + +/** + * \brief MD2 final digest + * + * \param ctx MD2 context + * \param output MD2 checksum result + */ +void mbedtls_md2_finish( mbedtls_md2_context *ctx, unsigned char output[16] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_MD2_ALT */ +#include "md2_alt.h" +#endif /* MBEDTLS_MD2_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Output = MD2( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output MD2 checksum result + */ +void mbedtls_md2( const unsigned char *input, size_t ilen, unsigned char output[16] ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_md2_self_test( int verbose ); + +/* Internal use */ +void mbedtls_md2_process( mbedtls_md2_context *ctx ); + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_md2.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md4.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md4.h new file mode 100644 index 0000000..45214d4 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md4.h @@ -0,0 +1,136 @@ +/** + * \file md4.h + * + * \brief MD4 message digest algorithm (hash function) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_MD4_H +#define MBEDTLS_MD4_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#if !defined(MBEDTLS_MD4_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief MD4 context structure + */ +typedef struct +{ + uint32_t total[2]; /*!< number of bytes processed */ + uint32_t state[4]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ +} +mbedtls_md4_context; + +/** + * \brief Initialize MD4 context + * + * \param ctx MD4 context to be initialized + */ +void mbedtls_md4_init( mbedtls_md4_context *ctx ); + +/** + * \brief Clear MD4 context + * + * \param ctx MD4 context to be cleared + */ +void mbedtls_md4_free( mbedtls_md4_context *ctx ); + +/** + * \brief Clone (the state of) an MD4 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_md4_clone( mbedtls_md4_context *dst, + const mbedtls_md4_context *src ); + +/** + * \brief MD4 context setup + * + * \param ctx context to be initialized + */ +void mbedtls_md4_starts( mbedtls_md4_context *ctx ); + +/** + * \brief MD4 process buffer + * + * \param ctx MD4 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_md4_update( mbedtls_md4_context *ctx, const unsigned char *input, size_t ilen ); + +/** + * \brief MD4 final digest + * + * \param ctx MD4 context + * \param output MD4 checksum result + */ +void mbedtls_md4_finish( mbedtls_md4_context *ctx, unsigned char output[16] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_MD4_ALT */ +#include "md4_alt.h" +#endif /* MBEDTLS_MD4_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Output = MD4( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output MD4 checksum result + */ +void mbedtls_md4( const unsigned char *input, size_t ilen, unsigned char output[16] ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_md4_self_test( int verbose ); + +/* Internal use */ +void mbedtls_md4_process( mbedtls_md4_context *ctx, const unsigned char data[64] ); + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_md4.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md5.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md5.h new file mode 100644 index 0000000..5a64061 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md5.h @@ -0,0 +1,136 @@ +/** + * \file md5.h + * + * \brief MD5 message digest algorithm (hash function) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_MD5_H +#define MBEDTLS_MD5_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#if !defined(MBEDTLS_MD5_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief MD5 context structure + */ +typedef struct +{ + uint32_t total[2]; /*!< number of bytes processed */ + uint32_t state[4]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ +} +mbedtls_md5_context; + +/** + * \brief Initialize MD5 context + * + * \param ctx MD5 context to be initialized + */ +void mbedtls_md5_init( mbedtls_md5_context *ctx ); + +/** + * \brief Clear MD5 context + * + * \param ctx MD5 context to be cleared + */ +void mbedtls_md5_free( mbedtls_md5_context *ctx ); + +/** + * \brief Clone (the state of) an MD5 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_md5_clone( mbedtls_md5_context *dst, + const mbedtls_md5_context *src ); + +/** + * \brief MD5 context setup + * + * \param ctx context to be initialized + */ +void mbedtls_md5_starts( mbedtls_md5_context *ctx ); + +/** + * \brief MD5 process buffer + * + * \param ctx MD5 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ); + +/** + * \brief MD5 final digest + * + * \param ctx MD5 context + * \param output MD5 checksum result + */ +void mbedtls_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] ); + +/* Internal use */ +void mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[64] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_MD5_ALT */ +#include "md5_alt.h" +#endif /* MBEDTLS_MD5_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Output = MD5( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output MD5 checksum result + */ +void mbedtls_md5( const unsigned char *input, size_t ilen, unsigned char output[16] ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_md5_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_md5.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md_internal.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md_internal.h new file mode 100644 index 0000000..e2441bb --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/md_internal.h @@ -0,0 +1,114 @@ +/** + * \file md_internal.h + * + * \brief Message digest wrappers. + * + * \warning This in an internal header. Do not include directly. + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_MD_WRAP_H +#define MBEDTLS_MD_WRAP_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "md.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Message digest information. + * Allows message digest functions to be called in a generic way. + */ +struct mbedtls_md_info_t +{ + /** Digest identifier */ + mbedtls_md_type_t type; + + /** Name of the message digest */ + const char * name; + + /** Output length of the digest function in bytes */ + int size; + + /** Block length of the digest function in bytes */ + int block_size; + + /** Digest initialisation function */ + void (*starts_func)( void *ctx ); + + /** Digest update function */ + void (*update_func)( void *ctx, const unsigned char *input, size_t ilen ); + + /** Digest finalisation function */ + void (*finish_func)( void *ctx, unsigned char *output ); + + /** Generic digest function */ + void (*digest_func)( const unsigned char *input, size_t ilen, + unsigned char *output ); + + /** Allocate a new context */ + void * (*ctx_alloc_func)( void ); + + /** Free the given context */ + void (*ctx_free_func)( void *ctx ); + + /** Clone state from a context */ + void (*clone_func)( void *dst, const void *src ); + + /** Internal use only */ + void (*process_func)( void *ctx, const unsigned char *input ); +}; + +#if defined(MBEDTLS_MD2_C) +extern const mbedtls_md_info_t mbedtls_md2_info; +#endif +#if defined(MBEDTLS_MD4_C) +extern const mbedtls_md_info_t mbedtls_md4_info; +#endif +#if defined(MBEDTLS_MD5_C) +extern const mbedtls_md_info_t mbedtls_md5_info; +#endif +#if defined(MBEDTLS_RIPEMD160_C) +extern const mbedtls_md_info_t mbedtls_ripemd160_info; +#endif +#if defined(MBEDTLS_SHA1_C) +extern const mbedtls_md_info_t mbedtls_sha1_info; +#endif +#if defined(MBEDTLS_SHA256_C) +extern const mbedtls_md_info_t mbedtls_sha224_info; +extern const mbedtls_md_info_t mbedtls_sha256_info; +#endif +#if defined(MBEDTLS_SHA512_C) +extern const mbedtls_md_info_t mbedtls_sha384_info; +extern const mbedtls_md_info_t mbedtls_sha512_info; +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_MD_WRAP_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/memory_buffer_alloc.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/memory_buffer_alloc.h new file mode 100644 index 0000000..661bc08 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/memory_buffer_alloc.h @@ -0,0 +1,146 @@ +/** + * \file memory_buffer_alloc.h + * + * \brief Buffer-based memory allocator + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_MEMORY_BUFFER_ALLOC_H +#define MBEDTLS_MEMORY_BUFFER_ALLOC_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_MEMORY_ALIGN_MULTIPLE) +#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */ +#endif + +/* \} name SECTION: Module settings */ + +#define MBEDTLS_MEMORY_VERIFY_NONE 0 +#define MBEDTLS_MEMORY_VERIFY_ALLOC (1 << 0) +#define MBEDTLS_MEMORY_VERIFY_FREE (1 << 1) +#define MBEDTLS_MEMORY_VERIFY_ALWAYS (MBEDTLS_MEMORY_VERIFY_ALLOC | MBEDTLS_MEMORY_VERIFY_FREE) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Initialize use of stack-based memory allocator. + * The stack-based allocator does memory management inside the + * presented buffer and does not call calloc() and free(). + * It sets the global mbedtls_calloc() and mbedtls_free() pointers + * to its own functions. + * (Provided mbedtls_calloc() and mbedtls_free() are thread-safe if + * MBEDTLS_THREADING_C is defined) + * + * \note This code is not optimized and provides a straight-forward + * implementation of a stack-based memory allocator. + * + * \param buf buffer to use as heap + * \param len size of the buffer + */ +void mbedtls_memory_buffer_alloc_init( unsigned char *buf, size_t len ); + +/** + * \brief Free the mutex for thread-safety and clear remaining memory + */ +void mbedtls_memory_buffer_alloc_free( void ); + +/** + * \brief Determine when the allocator should automatically verify the state + * of the entire chain of headers / meta-data. + * (Default: MBEDTLS_MEMORY_VERIFY_NONE) + * + * \param verify One of MBEDTLS_MEMORY_VERIFY_NONE, MBEDTLS_MEMORY_VERIFY_ALLOC, + * MBEDTLS_MEMORY_VERIFY_FREE or MBEDTLS_MEMORY_VERIFY_ALWAYS + */ +void mbedtls_memory_buffer_set_verify( int verify ); + +#if defined(MBEDTLS_MEMORY_DEBUG) +/** + * \brief Print out the status of the allocated memory (primarily for use + * after a program should have de-allocated all memory) + * Prints out a list of 'still allocated' blocks and their stack + * trace if MBEDTLS_MEMORY_BACKTRACE is defined. + */ +void mbedtls_memory_buffer_alloc_status( void ); + +/** + * \brief Get the peak heap usage so far + * + * \param max_used Peak number of bytes reauested by the application + * \param max_blocks Peak number of blocks reauested by the application + */ +void mbedtls_memory_buffer_alloc_max_get( size_t *max_used, size_t *max_blocks ); + +/** + * \brief Reset peak statistics + */ +void mbedtls_memory_buffer_alloc_max_reset( void ); + +/** + * \brief Get the current heap usage + * + * \param cur_used Number of bytes reauested by the application + * \param cur_blocks Number of blocks reauested by the application + */ +void mbedtls_memory_buffer_alloc_cur_get( size_t *cur_used, size_t *cur_blocks ); +#endif /* MBEDTLS_MEMORY_DEBUG */ + +/** + * \brief Verifies that all headers in the memory buffer are correct + * and contain sane values. Helps debug buffer-overflow errors. + * + * Prints out first failure if MBEDTLS_MEMORY_DEBUG is defined. + * Prints out full header information if MBEDTLS_MEMORY_DEBUG + * is defined. (Includes stack trace information for each block if + * MBEDTLS_MEMORY_BACKTRACE is defined as well). + * + * \return 0 if verified, 1 otherwise + */ +int mbedtls_memory_buffer_alloc_verify( void ); + +#if defined(MBEDTLS_SELF_TEST) +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if a test failed + */ +int mbedtls_memory_buffer_alloc_self_test( int verbose ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* memory_buffer_alloc.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/net.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/net.h new file mode 100644 index 0000000..8c6534c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/net.h @@ -0,0 +1,225 @@ +/** + * \file net.h + * + * \brief Network communication functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_NET_H +#define MBEDTLS_NET_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "ssl.h" + +#include +#include + +#define MBEDTLS_ERR_NET_SOCKET_FAILED -0x0042 /**< Failed to open a socket. */ +#define MBEDTLS_ERR_NET_CONNECT_FAILED -0x0044 /**< The connection to the given server / port failed. */ +#define MBEDTLS_ERR_NET_BIND_FAILED -0x0046 /**< Binding of the socket failed. */ +#define MBEDTLS_ERR_NET_LISTEN_FAILED -0x0048 /**< Could not listen on the socket. */ +#define MBEDTLS_ERR_NET_ACCEPT_FAILED -0x004A /**< Could not accept the incoming connection. */ +#define MBEDTLS_ERR_NET_RECV_FAILED -0x004C /**< Reading information from the socket failed. */ +#define MBEDTLS_ERR_NET_SEND_FAILED -0x004E /**< Sending information through the socket failed. */ +#define MBEDTLS_ERR_NET_CONN_RESET -0x0050 /**< Connection was reset by peer. */ +#define MBEDTLS_ERR_NET_UNKNOWN_HOST -0x0052 /**< Failed to get an IP address for the given hostname. */ +#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL -0x0043 /**< Buffer is too small to hold the data. */ +#define MBEDTLS_ERR_NET_INVALID_CONTEXT -0x0045 /**< The context is invalid, eg because it was free()ed. */ + +#define MBEDTLS_NET_LISTEN_BACKLOG 10 /**< The backlog that listen() should use. */ + +#define MBEDTLS_NET_PROTO_TCP 0 /**< The TCP transport protocol */ +#define MBEDTLS_NET_PROTO_UDP 1 /**< The UDP transport protocol */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Wrapper type for sockets. + * + * Currently backed by just a file descriptor, but might be more in the future + * (eg two file descriptors for combined IPv4 + IPv6 support, or additional + * structures for hand-made UDP demultiplexing). + */ +typedef struct +{ + int fd; /**< The underlying file descriptor */ +} +mbedtls_net_context; + +/** + * \brief Initialize a context + * Just makes the context ready to be used or freed safely. + * + * \param ctx Context to initialize + */ +void mbedtls_net_init( mbedtls_net_context *ctx ); + +/** + * \brief Initiate a connection with host:port in the given protocol + * + * \param ctx Socket to use + * \param host Host to connect to + * \param port Port to connect to + * \param proto Protocol: MBEDTLS_NET_PROTO_TCP or MBEDTLS_NET_PROTO_UDP + * + * \return 0 if successful, or one of: + * MBEDTLS_ERR_NET_SOCKET_FAILED, + * MBEDTLS_ERR_NET_UNKNOWN_HOST, + * MBEDTLS_ERR_NET_CONNECT_FAILED + * + * \note Sets the socket in connected mode even with UDP. + */ +int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char *port, int proto ); + +/** + * \brief Create a receiving socket on bind_ip:port in the chosen + * protocol. If bind_ip == NULL, all interfaces are bound. + * + * \param ctx Socket to use + * \param bind_ip IP to bind to, can be NULL + * \param port Port number to use + * \param proto Protocol: MBEDTLS_NET_PROTO_TCP or MBEDTLS_NET_PROTO_UDP + * + * \return 0 if successful, or one of: + * MBEDTLS_ERR_NET_SOCKET_FAILED, + * MBEDTLS_ERR_NET_BIND_FAILED, + * MBEDTLS_ERR_NET_LISTEN_FAILED + * + * \note Regardless of the protocol, opens the sockets and binds it. + * In addition, make the socket listening if protocol is TCP. + */ +int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char *port, int proto ); + +/** + * \brief Accept a connection from a remote client + * + * \param bind_ctx Relevant socket + * \param client_ctx Will contain the connected client socket + * \param client_ip Will contain the client IP address + * \param buf_size Size of the client_ip buffer + * \param ip_len Will receive the size of the client IP written + * + * \return 0 if successful, or + * MBEDTLS_ERR_NET_ACCEPT_FAILED, or + * MBEDTLS_ERR_NET_BUFFER_TOO_SMALL if buf_size is too small, + * MBEDTLS_ERR_SSL_WANT_READ if bind_fd was set to + * non-blocking and accept() would block. + */ +int mbedtls_net_accept( mbedtls_net_context *bind_ctx, + mbedtls_net_context *client_ctx, + void *client_ip, size_t buf_size, size_t *ip_len ); + +/** + * \brief Set the socket blocking + * + * \param ctx Socket to set + * + * \return 0 if successful, or a non-zero error code + */ +int mbedtls_net_set_block( mbedtls_net_context *ctx ); + +/** + * \brief Set the socket non-blocking + * + * \param ctx Socket to set + * + * \return 0 if successful, or a non-zero error code + */ +int mbedtls_net_set_nonblock( mbedtls_net_context *ctx ); + +/** + * \brief Portable usleep helper + * + * \param usec Amount of microseconds to sleep + * + * \note Real amount of time slept will not be less than + * select()'s timeout granularity (typically, 10ms). + */ +void mbedtls_net_usleep( unsigned long usec ); + +/** + * \brief Read at most 'len' characters. If no error occurs, + * the actual amount read is returned. + * + * \param ctx Socket + * \param buf The buffer to write to + * \param len Maximum length of the buffer + * + * \return the number of bytes received, + * or a non-zero error code; with a non-blocking socket, + * MBEDTLS_ERR_SSL_WANT_READ indicates read() would block. + */ +int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len ); + +/** + * \brief Write at most 'len' characters. If no error occurs, + * the actual amount read is returned. + * + * \param ctx Socket + * \param buf The buffer to read from + * \param len The length of the buffer + * + * \return the number of bytes sent, + * or a non-zero error code; with a non-blocking socket, + * MBEDTLS_ERR_SSL_WANT_WRITE indicates write() would block. + */ +int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len ); + +/** + * \brief Read at most 'len' characters, blocking for at most + * 'timeout' seconds. If no error occurs, the actual amount + * read is returned. + * + * \param ctx Socket + * \param buf The buffer to write to + * \param len Maximum length of the buffer + * \param timeout Maximum number of milliseconds to wait for data + * 0 means no timeout (wait forever) + * + * \return the number of bytes received, + * or a non-zero error code: + * MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out, + * MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal. + * + * \note This function will block (until data becomes available or + * timeout is reached) even if the socket is set to + * non-blocking. Handling timeouts with non-blocking reads + * requires a different strategy. + */ +int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len, + uint32_t timeout ); + +/** + * \brief Gracefully shutdown the connection and free associated data + * + * \param ctx The context to free + */ +void mbedtls_net_free( mbedtls_net_context *ctx ); + +#ifdef __cplusplus +} +#endif + +#endif /* net.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/oid.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/oid.h new file mode 100644 index 0000000..fcecdaf --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/oid.h @@ -0,0 +1,570 @@ +/** + * \file oid.h + * + * \brief Object Identifier (OID) database + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_OID_H +#define MBEDTLS_OID_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "asn1.h" +#include "pk.h" + +#include + +#if defined(MBEDTLS_CIPHER_C) +#include "cipher.h" +#endif + +#if defined(MBEDTLS_MD_C) +#include "md.h" +#endif + +#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C) +#include "x509.h" +#endif + +#define MBEDTLS_ERR_OID_NOT_FOUND -0x002E /**< OID is not found. */ +#define MBEDTLS_ERR_OID_BUF_TOO_SMALL -0x000B /**< output buffer is too small */ + +/* + * Top level OID tuples + */ +#define MBEDTLS_OID_ISO_MEMBER_BODIES "\x2a" /* {iso(1) member-body(2)} */ +#define MBEDTLS_OID_ISO_IDENTIFIED_ORG "\x2b" /* {iso(1) identified-organization(3)} */ +#define MBEDTLS_OID_ISO_CCITT_DS "\x55" /* {joint-iso-ccitt(2) ds(5)} */ +#define MBEDTLS_OID_ISO_ITU_COUNTRY "\x60" /* {joint-iso-itu-t(2) country(16)} */ + +/* + * ISO Member bodies OID parts + */ +#define MBEDTLS_OID_COUNTRY_US "\x86\x48" /* {us(840)} */ +#define MBEDTLS_OID_ORG_RSA_DATA_SECURITY "\x86\xf7\x0d" /* {rsadsi(113549)} */ +#define MBEDTLS_OID_RSA_COMPANY MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \ + MBEDTLS_OID_ORG_RSA_DATA_SECURITY /* {iso(1) member-body(2) us(840) rsadsi(113549)} */ +#define MBEDTLS_OID_ORG_ANSI_X9_62 "\xce\x3d" /* ansi-X9-62(10045) */ +#define MBEDTLS_OID_ANSI_X9_62 MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \ + MBEDTLS_OID_ORG_ANSI_X9_62 + +/* + * ISO Identified organization OID parts + */ +#define MBEDTLS_OID_ORG_DOD "\x06" /* {dod(6)} */ +#define MBEDTLS_OID_ORG_OIW "\x0e" +#define MBEDTLS_OID_OIW_SECSIG MBEDTLS_OID_ORG_OIW "\x03" +#define MBEDTLS_OID_OIW_SECSIG_ALG MBEDTLS_OID_OIW_SECSIG "\x02" +#define MBEDTLS_OID_OIW_SECSIG_SHA1 MBEDTLS_OID_OIW_SECSIG_ALG "\x1a" +#define MBEDTLS_OID_ORG_CERTICOM "\x81\x04" /* certicom(132) */ +#define MBEDTLS_OID_CERTICOM MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_CERTICOM +#define MBEDTLS_OID_ORG_TELETRUST "\x24" /* teletrust(36) */ +#define MBEDTLS_OID_TELETRUST MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_TELETRUST + +/* + * ISO ITU OID parts + */ +#define MBEDTLS_OID_ORGANIZATION "\x01" /* {organization(1)} */ +#define MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ISO_ITU_COUNTRY MBEDTLS_OID_COUNTRY_US MBEDTLS_OID_ORGANIZATION /* {joint-iso-itu-t(2) country(16) us(840) organization(1)} */ + +#define MBEDTLS_OID_ORG_GOV "\x65" /* {gov(101)} */ +#define MBEDTLS_OID_GOV MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_GOV /* {joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101)} */ + +#define MBEDTLS_OID_ORG_NETSCAPE "\x86\xF8\x42" /* {netscape(113730)} */ +#define MBEDTLS_OID_NETSCAPE MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_NETSCAPE /* Netscape OID {joint-iso-itu-t(2) country(16) us(840) organization(1) netscape(113730)} */ + +/* ISO arc for standard certificate and CRL extensions */ +#define MBEDTLS_OID_ID_CE MBEDTLS_OID_ISO_CCITT_DS "\x1D" /**< id-ce OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 29} */ + +/** + * Private Internet Extensions + * { iso(1) identified-organization(3) dod(6) internet(1) + * security(5) mechanisms(5) pkix(7) } + */ +#define MBEDTLS_OID_PKIX MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01\x05\x05\x07" + +/* + * Arc for standard naming attributes + */ +#define MBEDTLS_OID_AT MBEDTLS_OID_ISO_CCITT_DS "\x04" /**< id-at OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 4} */ +#define MBEDTLS_OID_AT_CN MBEDTLS_OID_AT "\x03" /**< id-at-commonName AttributeType:= {id-at 3} */ +#define MBEDTLS_OID_AT_SUR_NAME MBEDTLS_OID_AT "\x04" /**< id-at-surName AttributeType:= {id-at 4} */ +#define MBEDTLS_OID_AT_SERIAL_NUMBER MBEDTLS_OID_AT "\x05" /**< id-at-serialNumber AttributeType:= {id-at 5} */ +#define MBEDTLS_OID_AT_COUNTRY MBEDTLS_OID_AT "\x06" /**< id-at-countryName AttributeType:= {id-at 6} */ +#define MBEDTLS_OID_AT_LOCALITY MBEDTLS_OID_AT "\x07" /**< id-at-locality AttributeType:= {id-at 7} */ +#define MBEDTLS_OID_AT_STATE MBEDTLS_OID_AT "\x08" /**< id-at-state AttributeType:= {id-at 8} */ +#define MBEDTLS_OID_AT_ORGANIZATION MBEDTLS_OID_AT "\x0A" /**< id-at-organizationName AttributeType:= {id-at 10} */ +#define MBEDTLS_OID_AT_ORG_UNIT MBEDTLS_OID_AT "\x0B" /**< id-at-organizationalUnitName AttributeType:= {id-at 11} */ +#define MBEDTLS_OID_AT_TITLE MBEDTLS_OID_AT "\x0C" /**< id-at-title AttributeType:= {id-at 12} */ +#define MBEDTLS_OID_AT_POSTAL_ADDRESS MBEDTLS_OID_AT "\x10" /**< id-at-postalAddress AttributeType:= {id-at 16} */ +#define MBEDTLS_OID_AT_POSTAL_CODE MBEDTLS_OID_AT "\x11" /**< id-at-postalCode AttributeType:= {id-at 17} */ +#define MBEDTLS_OID_AT_GIVEN_NAME MBEDTLS_OID_AT "\x2A" /**< id-at-givenName AttributeType:= {id-at 42} */ +#define MBEDTLS_OID_AT_INITIALS MBEDTLS_OID_AT "\x2B" /**< id-at-initials AttributeType:= {id-at 43} */ +#define MBEDTLS_OID_AT_GENERATION_QUALIFIER MBEDTLS_OID_AT "\x2C" /**< id-at-generationQualifier AttributeType:= {id-at 44} */ +#define MBEDTLS_OID_AT_UNIQUE_IDENTIFIER MBEDTLS_OID_AT "\x2D" /**< id-at-uniqueIdentifier AttributType:= {id-at 45} */ +#define MBEDTLS_OID_AT_DN_QUALIFIER MBEDTLS_OID_AT "\x2E" /**< id-at-dnQualifier AttributeType:= {id-at 46} */ +#define MBEDTLS_OID_AT_PSEUDONYM MBEDTLS_OID_AT "\x41" /**< id-at-pseudonym AttributeType:= {id-at 65} */ + +#define MBEDTLS_OID_DOMAIN_COMPONENT "\x09\x92\x26\x89\x93\xF2\x2C\x64\x01\x19" /** id-domainComponent AttributeType:= {itu-t(0) data(9) pss(2342) ucl(19200300) pilot(100) pilotAttributeType(1) domainComponent(25)} */ + +/* + * OIDs for standard certificate extensions + */ +#define MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_ID_CE "\x23" /**< id-ce-authorityKeyIdentifier OBJECT IDENTIFIER ::= { id-ce 35 } */ +#define MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER MBEDTLS_OID_ID_CE "\x0E" /**< id-ce-subjectKeyIdentifier OBJECT IDENTIFIER ::= { id-ce 14 } */ +#define MBEDTLS_OID_KEY_USAGE MBEDTLS_OID_ID_CE "\x0F" /**< id-ce-keyUsage OBJECT IDENTIFIER ::= { id-ce 15 } */ +#define MBEDTLS_OID_CERTIFICATE_POLICIES MBEDTLS_OID_ID_CE "\x20" /**< id-ce-certificatePolicies OBJECT IDENTIFIER ::= { id-ce 32 } */ +#define MBEDTLS_OID_POLICY_MAPPINGS MBEDTLS_OID_ID_CE "\x21" /**< id-ce-policyMappings OBJECT IDENTIFIER ::= { id-ce 33 } */ +#define MBEDTLS_OID_SUBJECT_ALT_NAME MBEDTLS_OID_ID_CE "\x11" /**< id-ce-subjectAltName OBJECT IDENTIFIER ::= { id-ce 17 } */ +#define MBEDTLS_OID_ISSUER_ALT_NAME MBEDTLS_OID_ID_CE "\x12" /**< id-ce-issuerAltName OBJECT IDENTIFIER ::= { id-ce 18 } */ +#define MBEDTLS_OID_SUBJECT_DIRECTORY_ATTRS MBEDTLS_OID_ID_CE "\x09" /**< id-ce-subjectDirectoryAttributes OBJECT IDENTIFIER ::= { id-ce 9 } */ +#define MBEDTLS_OID_BASIC_CONSTRAINTS MBEDTLS_OID_ID_CE "\x13" /**< id-ce-basicConstraints OBJECT IDENTIFIER ::= { id-ce 19 } */ +#define MBEDTLS_OID_NAME_CONSTRAINTS MBEDTLS_OID_ID_CE "\x1E" /**< id-ce-nameConstraints OBJECT IDENTIFIER ::= { id-ce 30 } */ +#define MBEDTLS_OID_POLICY_CONSTRAINTS MBEDTLS_OID_ID_CE "\x24" /**< id-ce-policyConstraints OBJECT IDENTIFIER ::= { id-ce 36 } */ +#define MBEDTLS_OID_EXTENDED_KEY_USAGE MBEDTLS_OID_ID_CE "\x25" /**< id-ce-extKeyUsage OBJECT IDENTIFIER ::= { id-ce 37 } */ +#define MBEDTLS_OID_CRL_DISTRIBUTION_POINTS MBEDTLS_OID_ID_CE "\x1F" /**< id-ce-cRLDistributionPoints OBJECT IDENTIFIER ::= { id-ce 31 } */ +#define MBEDTLS_OID_INIHIBIT_ANYPOLICY MBEDTLS_OID_ID_CE "\x36" /**< id-ce-inhibitAnyPolicy OBJECT IDENTIFIER ::= { id-ce 54 } */ +#define MBEDTLS_OID_FRESHEST_CRL MBEDTLS_OID_ID_CE "\x2E" /**< id-ce-freshestCRL OBJECT IDENTIFIER ::= { id-ce 46 } */ + +/* + * Netscape certificate extensions + */ +#define MBEDTLS_OID_NS_CERT MBEDTLS_OID_NETSCAPE "\x01" +#define MBEDTLS_OID_NS_CERT_TYPE MBEDTLS_OID_NS_CERT "\x01" +#define MBEDTLS_OID_NS_BASE_URL MBEDTLS_OID_NS_CERT "\x02" +#define MBEDTLS_OID_NS_REVOCATION_URL MBEDTLS_OID_NS_CERT "\x03" +#define MBEDTLS_OID_NS_CA_REVOCATION_URL MBEDTLS_OID_NS_CERT "\x04" +#define MBEDTLS_OID_NS_RENEWAL_URL MBEDTLS_OID_NS_CERT "\x07" +#define MBEDTLS_OID_NS_CA_POLICY_URL MBEDTLS_OID_NS_CERT "\x08" +#define MBEDTLS_OID_NS_SSL_SERVER_NAME MBEDTLS_OID_NS_CERT "\x0C" +#define MBEDTLS_OID_NS_COMMENT MBEDTLS_OID_NS_CERT "\x0D" +#define MBEDTLS_OID_NS_DATA_TYPE MBEDTLS_OID_NETSCAPE "\x02" +#define MBEDTLS_OID_NS_CERT_SEQUENCE MBEDTLS_OID_NS_DATA_TYPE "\x05" + +/* + * OIDs for CRL extensions + */ +#define MBEDTLS_OID_PRIVATE_KEY_USAGE_PERIOD MBEDTLS_OID_ID_CE "\x10" +#define MBEDTLS_OID_CRL_NUMBER MBEDTLS_OID_ID_CE "\x14" /**< id-ce-cRLNumber OBJECT IDENTIFIER ::= { id-ce 20 } */ + +/* + * X.509 v3 Extended key usage OIDs + */ +#define MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE MBEDTLS_OID_EXTENDED_KEY_USAGE "\x00" /**< anyExtendedKeyUsage OBJECT IDENTIFIER ::= { id-ce-extKeyUsage 0 } */ + +#define MBEDTLS_OID_KP MBEDTLS_OID_PKIX "\x03" /**< id-kp OBJECT IDENTIFIER ::= { id-pkix 3 } */ +#define MBEDTLS_OID_SERVER_AUTH MBEDTLS_OID_KP "\x01" /**< id-kp-serverAuth OBJECT IDENTIFIER ::= { id-kp 1 } */ +#define MBEDTLS_OID_CLIENT_AUTH MBEDTLS_OID_KP "\x02" /**< id-kp-clientAuth OBJECT IDENTIFIER ::= { id-kp 2 } */ +#define MBEDTLS_OID_CODE_SIGNING MBEDTLS_OID_KP "\x03" /**< id-kp-codeSigning OBJECT IDENTIFIER ::= { id-kp 3 } */ +#define MBEDTLS_OID_EMAIL_PROTECTION MBEDTLS_OID_KP "\x04" /**< id-kp-emailProtection OBJECT IDENTIFIER ::= { id-kp 4 } */ +#define MBEDTLS_OID_TIME_STAMPING MBEDTLS_OID_KP "\x08" /**< id-kp-timeStamping OBJECT IDENTIFIER ::= { id-kp 8 } */ +#define MBEDTLS_OID_OCSP_SIGNING MBEDTLS_OID_KP "\x09" /**< id-kp-OCSPSigning OBJECT IDENTIFIER ::= { id-kp 9 } */ + +/* + * PKCS definition OIDs + */ + +#define MBEDTLS_OID_PKCS MBEDTLS_OID_RSA_COMPANY "\x01" /**< pkcs OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) 1 } */ +#define MBEDTLS_OID_PKCS1 MBEDTLS_OID_PKCS "\x01" /**< pkcs-1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 1 } */ +#define MBEDTLS_OID_PKCS5 MBEDTLS_OID_PKCS "\x05" /**< pkcs-5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 5 } */ +#define MBEDTLS_OID_PKCS9 MBEDTLS_OID_PKCS "\x09" /**< pkcs-9 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 9 } */ +#define MBEDTLS_OID_PKCS12 MBEDTLS_OID_PKCS "\x0c" /**< pkcs-12 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 12 } */ + +/* + * PKCS#1 OIDs + */ +#define MBEDTLS_OID_PKCS1_RSA MBEDTLS_OID_PKCS1 "\x01" /**< rsaEncryption OBJECT IDENTIFIER ::= { pkcs-1 1 } */ +#define MBEDTLS_OID_PKCS1_MD2 MBEDTLS_OID_PKCS1 "\x02" /**< md2WithRSAEncryption ::= { pkcs-1 2 } */ +#define MBEDTLS_OID_PKCS1_MD4 MBEDTLS_OID_PKCS1 "\x03" /**< md4WithRSAEncryption ::= { pkcs-1 3 } */ +#define MBEDTLS_OID_PKCS1_MD5 MBEDTLS_OID_PKCS1 "\x04" /**< md5WithRSAEncryption ::= { pkcs-1 4 } */ +#define MBEDTLS_OID_PKCS1_SHA1 MBEDTLS_OID_PKCS1 "\x05" /**< sha1WithRSAEncryption ::= { pkcs-1 5 } */ +#define MBEDTLS_OID_PKCS1_SHA224 MBEDTLS_OID_PKCS1 "\x0e" /**< sha224WithRSAEncryption ::= { pkcs-1 14 } */ +#define MBEDTLS_OID_PKCS1_SHA256 MBEDTLS_OID_PKCS1 "\x0b" /**< sha256WithRSAEncryption ::= { pkcs-1 11 } */ +#define MBEDTLS_OID_PKCS1_SHA384 MBEDTLS_OID_PKCS1 "\x0c" /**< sha384WithRSAEncryption ::= { pkcs-1 12 } */ +#define MBEDTLS_OID_PKCS1_SHA512 MBEDTLS_OID_PKCS1 "\x0d" /**< sha512WithRSAEncryption ::= { pkcs-1 13 } */ + +#define MBEDTLS_OID_RSA_SHA_OBS "\x2B\x0E\x03\x02\x1D" + +#define MBEDTLS_OID_PKCS9_EMAIL MBEDTLS_OID_PKCS9 "\x01" /**< emailAddress AttributeType ::= { pkcs-9 1 } */ + +/* RFC 4055 */ +#define MBEDTLS_OID_RSASSA_PSS MBEDTLS_OID_PKCS1 "\x0a" /**< id-RSASSA-PSS ::= { pkcs-1 10 } */ +#define MBEDTLS_OID_MGF1 MBEDTLS_OID_PKCS1 "\x08" /**< id-mgf1 ::= { pkcs-1 8 } */ + +/* + * Digest algorithms + */ +#define MBEDTLS_OID_DIGEST_ALG_MD2 MBEDTLS_OID_RSA_COMPANY "\x02\x02" /**< id-mbedtls_md2 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 2 } */ +#define MBEDTLS_OID_DIGEST_ALG_MD4 MBEDTLS_OID_RSA_COMPANY "\x02\x04" /**< id-mbedtls_md4 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 4 } */ +#define MBEDTLS_OID_DIGEST_ALG_MD5 MBEDTLS_OID_RSA_COMPANY "\x02\x05" /**< id-mbedtls_md5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5 } */ +#define MBEDTLS_OID_DIGEST_ALG_SHA1 MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_SHA1 /**< id-mbedtls_sha1 OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 26 } */ +#define MBEDTLS_OID_DIGEST_ALG_SHA224 MBEDTLS_OID_GOV "\x03\x04\x02\x04" /**< id-sha224 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 4 } */ +#define MBEDTLS_OID_DIGEST_ALG_SHA256 MBEDTLS_OID_GOV "\x03\x04\x02\x01" /**< id-mbedtls_sha256 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 1 } */ + +#define MBEDTLS_OID_DIGEST_ALG_SHA384 MBEDTLS_OID_GOV "\x03\x04\x02\x02" /**< id-sha384 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 2 } */ + +#define MBEDTLS_OID_DIGEST_ALG_SHA512 MBEDTLS_OID_GOV "\x03\x04\x02\x03" /**< id-mbedtls_sha512 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 3 } */ + +#define MBEDTLS_OID_HMAC_SHA1 MBEDTLS_OID_RSA_COMPANY "\x02\x07" /**< id-hmacWithSHA1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 7 } */ + +/* + * Encryption algorithms + */ +#define MBEDTLS_OID_DES_CBC MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_ALG "\x07" /**< desCBC OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 7 } */ +#define MBEDTLS_OID_DES_EDE3_CBC MBEDTLS_OID_RSA_COMPANY "\x03\x07" /**< des-ede3-cbc OBJECT IDENTIFIER ::= { iso(1) member-body(2) -- us(840) rsadsi(113549) encryptionAlgorithm(3) 7 } */ + +/* + * PKCS#5 OIDs + */ +#define MBEDTLS_OID_PKCS5_PBKDF2 MBEDTLS_OID_PKCS5 "\x0c" /**< id-PBKDF2 OBJECT IDENTIFIER ::= {pkcs-5 12} */ +#define MBEDTLS_OID_PKCS5_PBES2 MBEDTLS_OID_PKCS5 "\x0d" /**< id-PBES2 OBJECT IDENTIFIER ::= {pkcs-5 13} */ +#define MBEDTLS_OID_PKCS5_PBMAC1 MBEDTLS_OID_PKCS5 "\x0e" /**< id-PBMAC1 OBJECT IDENTIFIER ::= {pkcs-5 14} */ + +/* + * PKCS#5 PBES1 algorithms + */ +#define MBEDTLS_OID_PKCS5_PBE_MD2_DES_CBC MBEDTLS_OID_PKCS5 "\x01" /**< pbeWithMD2AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 1} */ +#define MBEDTLS_OID_PKCS5_PBE_MD2_RC2_CBC MBEDTLS_OID_PKCS5 "\x04" /**< pbeWithMD2AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 4} */ +#define MBEDTLS_OID_PKCS5_PBE_MD5_DES_CBC MBEDTLS_OID_PKCS5 "\x03" /**< pbeWithMD5AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 3} */ +#define MBEDTLS_OID_PKCS5_PBE_MD5_RC2_CBC MBEDTLS_OID_PKCS5 "\x06" /**< pbeWithMD5AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 6} */ +#define MBEDTLS_OID_PKCS5_PBE_SHA1_DES_CBC MBEDTLS_OID_PKCS5 "\x0a" /**< pbeWithSHA1AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 10} */ +#define MBEDTLS_OID_PKCS5_PBE_SHA1_RC2_CBC MBEDTLS_OID_PKCS5 "\x0b" /**< pbeWithSHA1AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 11} */ + +/* + * PKCS#8 OIDs + */ +#define MBEDTLS_OID_PKCS9_CSR_EXT_REQ MBEDTLS_OID_PKCS9 "\x0e" /**< extensionRequest OBJECT IDENTIFIER ::= {pkcs-9 14} */ + +/* + * PKCS#12 PBE OIDs + */ +#define MBEDTLS_OID_PKCS12_PBE MBEDTLS_OID_PKCS12 "\x01" /**< pkcs-12PbeIds OBJECT IDENTIFIER ::= {pkcs-12 1} */ + +#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_128 MBEDTLS_OID_PKCS12_PBE "\x01" /**< pbeWithSHAAnd128BitRC4 OBJECT IDENTIFIER ::= {pkcs-12PbeIds 1} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_40 MBEDTLS_OID_PKCS12_PBE "\x02" /**< pbeWithSHAAnd40BitRC4 OBJECT IDENTIFIER ::= {pkcs-12PbeIds 2} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC MBEDTLS_OID_PKCS12_PBE "\x03" /**< pbeWithSHAAnd3-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 3} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC MBEDTLS_OID_PKCS12_PBE "\x04" /**< pbeWithSHAAnd2-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 4} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC MBEDTLS_OID_PKCS12_PBE "\x05" /**< pbeWithSHAAnd128BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 5} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC MBEDTLS_OID_PKCS12_PBE "\x06" /**< pbeWithSHAAnd40BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 6} */ + +/* + * EC key algorithms from RFC 5480 + */ + +/* id-ecPublicKey OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) keyType(2) 1 } */ +#define MBEDTLS_OID_EC_ALG_UNRESTRICTED MBEDTLS_OID_ANSI_X9_62 "\x02\01" + +/* id-ecDH OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) + * schemes(1) ecdh(12) } */ +#define MBEDTLS_OID_EC_ALG_ECDH MBEDTLS_OID_CERTICOM "\x01\x0c" + +/* + * ECParameters namedCurve identifiers, from RFC 5480, RFC 5639, and SEC2 + */ + +/* secp192r1 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 1 } */ +#define MBEDTLS_OID_EC_GRP_SECP192R1 MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x01" + +/* secp224r1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 33 } */ +#define MBEDTLS_OID_EC_GRP_SECP224R1 MBEDTLS_OID_CERTICOM "\x00\x21" + +/* secp256r1 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 7 } */ +#define MBEDTLS_OID_EC_GRP_SECP256R1 MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x07" + +/* secp384r1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 34 } */ +#define MBEDTLS_OID_EC_GRP_SECP384R1 MBEDTLS_OID_CERTICOM "\x00\x22" + +/* secp521r1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 35 } */ +#define MBEDTLS_OID_EC_GRP_SECP521R1 MBEDTLS_OID_CERTICOM "\x00\x23" + +/* secp192k1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 31 } */ +#define MBEDTLS_OID_EC_GRP_SECP192K1 MBEDTLS_OID_CERTICOM "\x00\x1f" + +/* secp224k1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 32 } */ +#define MBEDTLS_OID_EC_GRP_SECP224K1 MBEDTLS_OID_CERTICOM "\x00\x20" + +/* secp256k1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 10 } */ +#define MBEDTLS_OID_EC_GRP_SECP256K1 MBEDTLS_OID_CERTICOM "\x00\x0a" + +/* RFC 5639 4.1 + * ecStdCurvesAndGeneration OBJECT IDENTIFIER::= {iso(1) + * identified-organization(3) teletrust(36) algorithm(3) signature- + * algorithm(3) ecSign(2) 8} + * ellipticCurve OBJECT IDENTIFIER ::= {ecStdCurvesAndGeneration 1} + * versionOne OBJECT IDENTIFIER ::= {ellipticCurve 1} */ +#define MBEDTLS_OID_EC_BRAINPOOL_V1 MBEDTLS_OID_TELETRUST "\x03\x03\x02\x08\x01\x01" + +/* brainpoolP256r1 OBJECT IDENTIFIER ::= {versionOne 7} */ +#define MBEDTLS_OID_EC_GRP_BP256R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x07" + +/* brainpoolP384r1 OBJECT IDENTIFIER ::= {versionOne 11} */ +#define MBEDTLS_OID_EC_GRP_BP384R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0B" + +/* brainpoolP512r1 OBJECT IDENTIFIER ::= {versionOne 13} */ +#define MBEDTLS_OID_EC_GRP_BP512R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0D" + +/* + * SEC1 C.1 + * + * prime-field OBJECT IDENTIFIER ::= { id-fieldType 1 } + * id-fieldType OBJECT IDENTIFIER ::= { ansi-X9-62 fieldType(1)} + */ +#define MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE MBEDTLS_OID_ANSI_X9_62 "\x01" +#define MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE "\x01" + +/* + * ECDSA signature identifiers, from RFC 5480 + */ +#define MBEDTLS_OID_ANSI_X9_62_SIG MBEDTLS_OID_ANSI_X9_62 "\x04" /* signatures(4) */ +#define MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 MBEDTLS_OID_ANSI_X9_62_SIG "\x03" /* ecdsa-with-SHA2(3) */ + +/* ecdsa-with-SHA1 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) 1 } */ +#define MBEDTLS_OID_ECDSA_SHA1 MBEDTLS_OID_ANSI_X9_62_SIG "\x01" + +/* ecdsa-with-SHA224 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 1 } */ +#define MBEDTLS_OID_ECDSA_SHA224 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x01" + +/* ecdsa-with-SHA256 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 2 } */ +#define MBEDTLS_OID_ECDSA_SHA256 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x02" + +/* ecdsa-with-SHA384 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 3 } */ +#define MBEDTLS_OID_ECDSA_SHA384 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x03" + +/* ecdsa-with-SHA512 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 4 } */ +#define MBEDTLS_OID_ECDSA_SHA512 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x04" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Base OID descriptor structure + */ +typedef struct { + const char *asn1; /*!< OID ASN.1 representation */ + size_t asn1_len; /*!< length of asn1 */ + const char *name; /*!< official name (e.g. from RFC) */ + const char *description; /*!< human friendly description */ +} mbedtls_oid_descriptor_t; + +/** + * \brief Translate an ASN.1 OID into its numeric representation + * (e.g. "\x2A\x86\x48\x86\xF7\x0D" into "1.2.840.113549") + * + * \param buf buffer to put representation in + * \param size size of the buffer + * \param oid OID to translate + * + * \return Length of the string written (excluding final NULL) or + * MBEDTLS_ERR_OID_BUF_TOO_SMALL in case of error + */ +int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_buf *oid ); + +#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C) +/** + * \brief Translate an X.509 extension OID into local values + * + * \param oid OID to use + * \param ext_type place to store the extension type + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_x509_ext_type( const mbedtls_asn1_buf *oid, int *ext_type ); +#endif + +/** + * \brief Translate an X.509 attribute type OID into the short name + * (e.g. the OID for an X520 Common Name into "CN") + * + * \param oid OID to use + * \param short_name place to store the string pointer + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_attr_short_name( const mbedtls_asn1_buf *oid, const char **short_name ); + +/** + * \brief Translate PublicKeyAlgorithm OID into pk_type + * + * \param oid OID to use + * \param pk_alg place to store public key algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_pk_alg( const mbedtls_asn1_buf *oid, mbedtls_pk_type_t *pk_alg ); + +/** + * \brief Translate pk_type into PublicKeyAlgorithm OID + * + * \param pk_alg Public key type to look for + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_pk_alg( mbedtls_pk_type_t pk_alg, + const char **oid, size_t *olen ); + +#if defined(MBEDTLS_ECP_C) +/** + * \brief Translate NamedCurve OID into an EC group identifier + * + * \param oid OID to use + * \param grp_id place to store group id + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_ec_grp( const mbedtls_asn1_buf *oid, mbedtls_ecp_group_id *grp_id ); + +/** + * \brief Translate EC group identifier into NamedCurve OID + * + * \param grp_id EC group identifier + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_ec_grp( mbedtls_ecp_group_id grp_id, + const char **oid, size_t *olen ); +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_MD_C) +/** + * \brief Translate SignatureAlgorithm OID into md_type and pk_type + * + * \param oid OID to use + * \param md_alg place to store message digest algorithm + * \param pk_alg place to store public key algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_sig_alg( const mbedtls_asn1_buf *oid, + mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg ); + +/** + * \brief Translate SignatureAlgorithm OID into description + * + * \param oid OID to use + * \param desc place to store string pointer + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_sig_alg_desc( const mbedtls_asn1_buf *oid, const char **desc ); + +/** + * \brief Translate md_type and pk_type into SignatureAlgorithm OID + * + * \param md_alg message digest algorithm + * \param pk_alg public key algorithm + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_sig_alg( mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg, + const char **oid, size_t *olen ); + +/** + * \brief Translate hash algorithm OID into md_type + * + * \param oid OID to use + * \param md_alg place to store message digest algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_md_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg ); +#endif /* MBEDTLS_MD_C */ + +/** + * \brief Translate Extended Key Usage OID into description + * + * \param oid OID to use + * \param desc place to store string pointer + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_extended_key_usage( const mbedtls_asn1_buf *oid, const char **desc ); + +/** + * \brief Translate md_type into hash algorithm OID + * + * \param md_alg message digest algorithm + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_md( mbedtls_md_type_t md_alg, const char **oid, size_t *olen ); + +#if defined(MBEDTLS_CIPHER_C) +/** + * \brief Translate encryption algorithm OID into cipher_type + * + * \param oid OID to use + * \param cipher_alg place to store cipher algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_cipher_alg( const mbedtls_asn1_buf *oid, mbedtls_cipher_type_t *cipher_alg ); +#endif /* MBEDTLS_CIPHER_C */ + +#if defined(MBEDTLS_PKCS12_C) +/** + * \brief Translate PKCS#12 PBE algorithm OID into md_type and + * cipher_type + * + * \param oid OID to use + * \param md_alg place to store message digest algorithm + * \param cipher_alg place to store cipher algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_pkcs12_pbe_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg, + mbedtls_cipher_type_t *cipher_alg ); +#endif /* MBEDTLS_PKCS12_C */ + +#ifdef __cplusplus +} +#endif + +#endif /* oid.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/padlock.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/padlock.h new file mode 100644 index 0000000..2045a5a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/padlock.h @@ -0,0 +1,107 @@ +/** + * \file padlock.h + * + * \brief VIA PadLock ACE for HW encryption/decryption supported by some + * processors + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_PADLOCK_H +#define MBEDTLS_PADLOCK_H + +#include "aes.h" + +#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED -0x0030 /**< Input data should be aligned. */ + +#if defined(__has_feature) +#if __has_feature(address_sanitizer) +#define MBEDTLS_HAVE_ASAN +#endif +#endif + +/* Some versions of ASan result in errors about not enough registers */ +#if defined(MBEDTLS_HAVE_ASM) && defined(__GNUC__) && defined(__i386__) && \ + !defined(MBEDTLS_HAVE_ASAN) + +#ifndef MBEDTLS_HAVE_X86 +#define MBEDTLS_HAVE_X86 +#endif + +#include + +#define MBEDTLS_PADLOCK_RNG 0x000C +#define MBEDTLS_PADLOCK_ACE 0x00C0 +#define MBEDTLS_PADLOCK_PHE 0x0C00 +#define MBEDTLS_PADLOCK_PMM 0x3000 + +#define MBEDTLS_PADLOCK_ALIGN16(x) (uint32_t *) (16 + ((int32_t) x & ~15)) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief PadLock detection routine + * + * \param feature The feature to detect + * + * \return 1 if CPU has support for the feature, 0 otherwise + */ +int mbedtls_padlock_has_support( int feature ); + +/** + * \brief PadLock AES-ECB block en(de)cryption + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param input 16-byte input block + * \param output 16-byte output block + * + * \return 0 if success, 1 if operation failed + */ +int mbedtls_padlock_xcryptecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ); + +/** + * \brief PadLock AES-CBC buffer en(de)cryption + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param length length of the input data + * \param iv initialization vector (updated after use) + * \param input buffer holding the input data + * \param output buffer holding the output data + * + * \return 0 if success, 1 if operation failed + */ +int mbedtls_padlock_xcryptcbc( mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ); + +#ifdef __cplusplus +} +#endif + +#endif /* HAVE_X86 */ + +#endif /* padlock.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pem.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pem.h new file mode 100644 index 0000000..54dc02d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pem.h @@ -0,0 +1,129 @@ +/** + * \file pem.h + * + * \brief Privacy Enhanced Mail (PEM) decoding + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_PEM_H +#define MBEDTLS_PEM_H + +#include + +/** + * \name PEM Error codes + * These error codes are returned in case of errors reading the + * PEM data. + * \{ + */ +#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT -0x1080 /**< No PEM header or footer found. */ +#define MBEDTLS_ERR_PEM_INVALID_DATA -0x1100 /**< PEM string is not as expected. */ +#define MBEDTLS_ERR_PEM_ALLOC_FAILED -0x1180 /**< Failed to allocate memory. */ +#define MBEDTLS_ERR_PEM_INVALID_ENC_IV -0x1200 /**< RSA IV is not in hex-format. */ +#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG -0x1280 /**< Unsupported key encryption algorithm. */ +#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED -0x1300 /**< Private key password can't be empty. */ +#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH -0x1380 /**< Given private key password does not allow for correct decryption. */ +#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE -0x1400 /**< Unavailable feature, e.g. hashing/encryption combination. */ +#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA -0x1480 /**< Bad input parameters to function. */ +/* \} name */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MBEDTLS_PEM_PARSE_C) +/** + * \brief PEM context structure + */ +typedef struct +{ + unsigned char *buf; /*!< buffer for decoded data */ + size_t buflen; /*!< length of the buffer */ + unsigned char *info; /*!< buffer for extra header information */ +} +mbedtls_pem_context; + +/** + * \brief PEM context setup + * + * \param ctx context to be initialized + */ +void mbedtls_pem_init( mbedtls_pem_context *ctx ); + +/** + * \brief Read a buffer for PEM information and store the resulting + * data into the specified context buffers. + * + * \param ctx context to use + * \param header header string to seek and expect + * \param footer footer string to seek and expect + * \param data source data to look in (must be nul-terminated) + * \param pwd password for decryption (can be NULL) + * \param pwdlen length of password + * \param use_len destination for total length used (set after header is + * correctly read, so unless you get + * MBEDTLS_ERR_PEM_BAD_INPUT_DATA or + * MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT, use_len is + * the length to skip) + * + * \note Attempts to check password correctness by verifying if + * the decrypted text starts with an ASN.1 sequence of + * appropriate length + * + * \return 0 on success, or a specific PEM error code + */ +int mbedtls_pem_read_buffer( mbedtls_pem_context *ctx, const char *header, const char *footer, + const unsigned char *data, + const unsigned char *pwd, + size_t pwdlen, size_t *use_len ); + +/** + * \brief PEM context memory freeing + * + * \param ctx context to be freed + */ +void mbedtls_pem_free( mbedtls_pem_context *ctx ); +#endif /* MBEDTLS_PEM_PARSE_C */ + +#if defined(MBEDTLS_PEM_WRITE_C) +/** + * \brief Write a buffer of PEM information from a DER encoded + * buffer. + * + * \param header header string to write + * \param footer footer string to write + * \param der_data DER data to write + * \param der_len length of the DER data + * \param buf buffer to write to + * \param buf_len length of output buffer + * \param olen total length written / required (if buf_len is not enough) + * + * \return 0 on success, or a specific PEM or BASE64 error code. On + * MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL olen is the required + * size. + */ +int mbedtls_pem_write_buffer( const char *header, const char *footer, + const unsigned char *der_data, size_t der_len, + unsigned char *buf, size_t buf_len, size_t *olen ); +#endif /* MBEDTLS_PEM_WRITE_C */ + +#ifdef __cplusplus +} +#endif + +#endif /* pem.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pk.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pk.h new file mode 100644 index 0000000..458bb51 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pk.h @@ -0,0 +1,615 @@ +/** + * \file pk.h + * + * \brief Public Key abstraction layer + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#ifndef MBEDTLS_PK_H +#define MBEDTLS_PK_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "md.h" + +#if defined(MBEDTLS_RSA_C) +#include "rsa.h" +#endif + +#if defined(MBEDTLS_ECP_C) +#include "ecp.h" +#endif + +#if defined(MBEDTLS_ECDSA_C) +#include "ecdsa.h" +#endif + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +#define MBEDTLS_ERR_PK_ALLOC_FAILED -0x3F80 /**< Memory allocation failed. */ +#define MBEDTLS_ERR_PK_TYPE_MISMATCH -0x3F00 /**< Type mismatch, eg attempt to encrypt with an ECDSA key */ +#define MBEDTLS_ERR_PK_BAD_INPUT_DATA -0x3E80 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_PK_FILE_IO_ERROR -0x3E00 /**< Read/write of file failed. */ +#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80 /**< Unsupported key version */ +#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT -0x3D00 /**< Invalid key tag or value. */ +#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG -0x3C80 /**< Key algorithm is unsupported (only RSA and EC are supported). */ +#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED -0x3C00 /**< Private key password can't be empty. */ +#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH -0x3B80 /**< Given private key password does not allow for correct decryption. */ +#define MBEDTLS_ERR_PK_INVALID_PUBKEY -0x3B00 /**< The pubkey tag or value is invalid (only RSA and EC are supported). */ +#define MBEDTLS_ERR_PK_INVALID_ALG -0x3A80 /**< The algorithm tag or value is invalid. */ +#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00 /**< Elliptic curve is unsupported (only NIST curves are supported). */ +#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980 /**< Unavailable feature, e.g. RSA disabled for RSA key. */ +#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH -0x3900 /**< The signature is valid but its length is less than expected. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Public key types + */ +typedef enum { + MBEDTLS_PK_NONE=0, + MBEDTLS_PK_RSA, + MBEDTLS_PK_ECKEY, + MBEDTLS_PK_ECKEY_DH, + MBEDTLS_PK_ECDSA, + MBEDTLS_PK_RSA_ALT, + MBEDTLS_PK_RSASSA_PSS, +} mbedtls_pk_type_t; + +/** + * \brief Options for RSASSA-PSS signature verification. + * See \c mbedtls_rsa_rsassa_pss_verify_ext() + */ +typedef struct +{ + mbedtls_md_type_t mgf1_hash_id; + int expected_salt_len; + +} mbedtls_pk_rsassa_pss_options; + +/** + * \brief Types for interfacing with the debug module + */ +typedef enum +{ + MBEDTLS_PK_DEBUG_NONE = 0, + MBEDTLS_PK_DEBUG_MPI, + MBEDTLS_PK_DEBUG_ECP, +} mbedtls_pk_debug_type; + +/** + * \brief Item to send to the debug module + */ +typedef struct +{ + mbedtls_pk_debug_type type; + const char *name; + void *value; +} mbedtls_pk_debug_item; + +/** Maximum number of item send for debugging, plus 1 */ +#define MBEDTLS_PK_DEBUG_MAX_ITEMS 3 + +/** + * \brief Public key information and operations + */ +typedef struct mbedtls_pk_info_t mbedtls_pk_info_t; + +/** + * \brief Public key container + */ +typedef struct +{ + const mbedtls_pk_info_t * pk_info; /**< Public key informations */ + void * pk_ctx; /**< Underlying public key context */ +} mbedtls_pk_context; + +#if defined(MBEDTLS_RSA_C) +/** + * Quick access to an RSA context inside a PK context. + * + * \warning You must make sure the PK context actually holds an RSA context + * before using this function! + */ +static inline mbedtls_rsa_context *mbedtls_pk_rsa( const mbedtls_pk_context pk ) +{ + return( (mbedtls_rsa_context *) (pk).pk_ctx ); +} +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) +/** + * Quick access to an EC context inside a PK context. + * + * \warning You must make sure the PK context actually holds an EC context + * before using this function! + */ +static inline mbedtls_ecp_keypair *mbedtls_pk_ec( const mbedtls_pk_context pk ) +{ + return( (mbedtls_ecp_keypair *) (pk).pk_ctx ); +} +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/** + * \brief Types for RSA-alt abstraction + */ +typedef int (*mbedtls_pk_rsa_alt_decrypt_func)( void *ctx, int mode, size_t *olen, + const unsigned char *input, unsigned char *output, + size_t output_max_len ); +typedef int (*mbedtls_pk_rsa_alt_sign_func)( void *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + int mode, mbedtls_md_type_t md_alg, unsigned int hashlen, + const unsigned char *hash, unsigned char *sig ); +typedef size_t (*mbedtls_pk_rsa_alt_key_len_func)( void *ctx ); +#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */ + +/** + * \brief Return information associated with the given PK type + * + * \param pk_type PK type to search for. + * + * \return The PK info associated with the type or NULL if not found. + */ +const mbedtls_pk_info_t *mbedtls_pk_info_from_type( mbedtls_pk_type_t pk_type ); + +/** + * \brief Initialize a mbedtls_pk_context (as NONE) + */ +void mbedtls_pk_init( mbedtls_pk_context *ctx ); + +/** + * \brief Free a mbedtls_pk_context + */ +void mbedtls_pk_free( mbedtls_pk_context *ctx ); + +/** + * \brief Initialize a PK context with the information given + * and allocates the type-specific PK subcontext. + * + * \param ctx Context to initialize. Must be empty (type NONE). + * \param info Information to use + * + * \return 0 on success, + * MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input, + * MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure. + * + * \note For contexts holding an RSA-alt key, use + * \c mbedtls_pk_setup_rsa_alt() instead. + */ +int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info ); + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/** + * \brief Initialize an RSA-alt context + * + * \param ctx Context to initialize. Must be empty (type NONE). + * \param key RSA key pointer + * \param decrypt_func Decryption function + * \param sign_func Signing function + * \param key_len_func Function returning key length in bytes + * + * \return 0 on success, or MBEDTLS_ERR_PK_BAD_INPUT_DATA if the + * context wasn't already initialized as RSA_ALT. + * + * \note This function replaces \c mbedtls_pk_setup() for RSA-alt. + */ +int mbedtls_pk_setup_rsa_alt( mbedtls_pk_context *ctx, void * key, + mbedtls_pk_rsa_alt_decrypt_func decrypt_func, + mbedtls_pk_rsa_alt_sign_func sign_func, + mbedtls_pk_rsa_alt_key_len_func key_len_func ); +#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */ + +/** + * \brief Get the size in bits of the underlying key + * + * \param ctx Context to use + * + * \return Key size in bits, or 0 on error + */ +size_t mbedtls_pk_get_bitlen( const mbedtls_pk_context *ctx ); + +/** + * \brief Get the length in bytes of the underlying key + * \param ctx Context to use + * + * \return Key length in bytes, or 0 on error + */ +static inline size_t mbedtls_pk_get_len( const mbedtls_pk_context *ctx ) +{ + return( ( mbedtls_pk_get_bitlen( ctx ) + 7 ) / 8 ); +} + +/** + * \brief Tell if a context can do the operation given by type + * + * \param ctx Context to test + * \param type Target type + * + * \return 0 if context can't do the operations, + * 1 otherwise. + */ +int mbedtls_pk_can_do( const mbedtls_pk_context *ctx, mbedtls_pk_type_t type ); + +/** + * \brief Verify signature (including padding if relevant). + * + * \param ctx PK context to use + * \param md_alg Hash algorithm used (see notes) + * \param hash Hash of the message to sign + * \param hash_len Hash length or 0 (see notes) + * \param sig Signature to verify + * \param sig_len Signature length + * + * \return 0 on success (signature is valid), + * MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if the signature is + * valid but its actual length is less than sig_len, + * or a specific error code. + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * Use \c mbedtls_pk_verify_ext( MBEDTLS_PK_RSASSA_PSS, ... ) + * to verify RSASSA_PSS signatures. + * + * \note If hash_len is 0, then the length associated with md_alg + * is used instead, or an error returned if it is invalid. + * + * \note md_alg may be MBEDTLS_MD_NONE, only if hash_len != 0 + */ +int mbedtls_pk_verify( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ); + +/** + * \brief Verify signature, with options. + * (Includes verification of the padding depending on type.) + * + * \param type Signature type (inc. possible padding type) to verify + * \param options Pointer to type-specific options, or NULL + * \param ctx PK context to use + * \param md_alg Hash algorithm used (see notes) + * \param hash Hash of the message to sign + * \param hash_len Hash length or 0 (see notes) + * \param sig Signature to verify + * \param sig_len Signature length + * + * \return 0 on success (signature is valid), + * MBEDTLS_ERR_PK_TYPE_MISMATCH if the PK context can't be + * used for this type of signatures, + * MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if the signature is + * valid but its actual length is less than sig_len, + * or a specific error code. + * + * \note If hash_len is 0, then the length associated with md_alg + * is used instead, or an error returned if it is invalid. + * + * \note md_alg may be MBEDTLS_MD_NONE, only if hash_len != 0 + * + * \note If type is MBEDTLS_PK_RSASSA_PSS, then options must point + * to a mbedtls_pk_rsassa_pss_options structure, + * otherwise it must be NULL. + */ +int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options, + mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ); + +/** + * \brief Make signature, including padding if relevant. + * + * \param ctx PK context to use - must hold a private key + * \param md_alg Hash algorithm used (see notes) + * \param hash Hash of the message to sign + * \param hash_len Hash length or 0 (see notes) + * \param sig Place to write the signature + * \param sig_len Number of bytes written + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 on success, or a specific error code. + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * There is no interface in the PK module to make RSASSA-PSS + * signatures yet. + * + * \note If hash_len is 0, then the length associated with md_alg + * is used instead, or an error returned if it is invalid. + * + * \note For RSA, md_alg may be MBEDTLS_MD_NONE if hash_len != 0. + * For ECDSA, md_alg may never be MBEDTLS_MD_NONE. + */ +int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Decrypt message (including padding if relevant). + * + * \param ctx PK context to use - must hold a private key + * \param input Input to decrypt + * \param ilen Input size + * \param output Decrypted output + * \param olen Decrypted message length + * \param osize Size of the output buffer + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * + * \return 0 on success, or a specific error code. + */ +int mbedtls_pk_decrypt( mbedtls_pk_context *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Encrypt message (including padding if relevant). + * + * \param ctx PK context to use + * \param input Message to encrypt + * \param ilen Message size + * \param output Encrypted output + * \param olen Encrypted output length + * \param osize Size of the output buffer + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * + * \return 0 on success, or a specific error code. + */ +int mbedtls_pk_encrypt( mbedtls_pk_context *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Check if a public-private pair of keys matches. + * + * \param pub Context holding a public key. + * \param prv Context holding a private (and public) key. + * + * \return 0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA + */ +int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, const mbedtls_pk_context *prv ); + +/** + * \brief Export debug information + * + * \param ctx Context to use + * \param items Place to write debug items + * + * \return 0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA + */ +int mbedtls_pk_debug( const mbedtls_pk_context *ctx, mbedtls_pk_debug_item *items ); + +/** + * \brief Access the type name + * + * \param ctx Context to use + * + * \return Type name on success, or "invalid PK" + */ +const char * mbedtls_pk_get_name( const mbedtls_pk_context *ctx ); + +/** + * \brief Get the key type + * + * \param ctx Context to use + * + * \return Type on success, or MBEDTLS_PK_NONE + */ +mbedtls_pk_type_t mbedtls_pk_get_type( const mbedtls_pk_context *ctx ); + +#if defined(MBEDTLS_PK_PARSE_C) +/** \ingroup pk_module */ +/** + * \brief Parse a private key in PEM or DER format + * + * \param ctx key to be initialized + * \param key input buffer + * \param keylen size of the buffer + * (including the terminating null byte for PEM data) + * \param pwd password for decryption (optional) + * \param pwdlen size of the password + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a + * specific key type, check the result with mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_key( mbedtls_pk_context *ctx, + const unsigned char *key, size_t keylen, + const unsigned char *pwd, size_t pwdlen ); + +/** \ingroup pk_module */ +/** + * \brief Parse a public key in PEM or DER format + * + * \param ctx key to be initialized + * \param key input buffer + * \param keylen size of the buffer + * (including the terminating null byte for PEM data) + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a + * specific key type, check the result with mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_public_key( mbedtls_pk_context *ctx, + const unsigned char *key, size_t keylen ); + +#if defined(MBEDTLS_FS_IO) +/** \ingroup pk_module */ +/** + * \brief Load and parse a private key + * + * \param ctx key to be initialized + * \param path filename to read the private key from + * \param password password to decrypt the file (can be NULL) + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a + * specific key type, check the result with mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_keyfile( mbedtls_pk_context *ctx, + const char *path, const char *password ); + +/** \ingroup pk_module */ +/** + * \brief Load and parse a public key + * + * \param ctx key to be initialized + * \param path filename to read the private key from + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a + * specific key type, check the result with mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_public_keyfile( mbedtls_pk_context *ctx, const char *path ); +#endif /* MBEDTLS_FS_IO */ +#endif /* MBEDTLS_PK_PARSE_C */ + +#if defined(MBEDTLS_PK_WRITE_C) +/** + * \brief Write a private key to a PKCS#1 or SEC1 DER structure + * Note: data is written at the end of the buffer! Use the + * return value to determine where you should start + * using the buffer + * + * \param ctx private to write away + * \param buf buffer to write to + * \param size size of the buffer + * + * \return length of data written if successful, or a specific + * error code + */ +int mbedtls_pk_write_key_der( mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); + +/** + * \brief Write a public key to a SubjectPublicKeyInfo DER structure + * Note: data is written at the end of the buffer! Use the + * return value to determine where you should start + * using the buffer + * + * \param ctx public key to write away + * \param buf buffer to write to + * \param size size of the buffer + * + * \return length of data written if successful, or a specific + * error code + */ +int mbedtls_pk_write_pubkey_der( mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); + +#if defined(MBEDTLS_PEM_WRITE_C) +/** + * \brief Write a public key to a PEM string + * + * \param ctx public key to write away + * \param buf buffer to write to + * \param size size of the buffer + * + * \return 0 if successful, or a specific error code + */ +int mbedtls_pk_write_pubkey_pem( mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); + +/** + * \brief Write a private key to a PKCS#1 or SEC1 PEM string + * + * \param ctx private to write away + * \param buf buffer to write to + * \param size size of the buffer + * + * \return 0 if successful, or a specific error code + */ +int mbedtls_pk_write_key_pem( mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); +#endif /* MBEDTLS_PEM_WRITE_C */ +#endif /* MBEDTLS_PK_WRITE_C */ + +/* + * WARNING: Low-level functions. You probably do not want to use these unless + * you are certain you do ;) + */ + +#if defined(MBEDTLS_PK_PARSE_C) +/** + * \brief Parse a SubjectPublicKeyInfo DER structure + * + * \param p the position in the ASN.1 data + * \param end end of the buffer + * \param pk the key to fill + * + * \return 0 if successful, or a specific PK error code + */ +int mbedtls_pk_parse_subpubkey( unsigned char **p, const unsigned char *end, + mbedtls_pk_context *pk ); +#endif /* MBEDTLS_PK_PARSE_C */ + +#if defined(MBEDTLS_PK_WRITE_C) +/** + * \brief Write a subjectPublicKey to ASN.1 data + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param key public key to write away + * + * \return the length written or a negative error code + */ +int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start, + const mbedtls_pk_context *key ); +#endif /* MBEDTLS_PK_WRITE_C */ + +/* + * Internal module functions. You probably do not want to use these unless you + * know you do. + */ +#if defined(MBEDTLS_FS_IO) +int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_PK_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pk_internal.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pk_internal.h new file mode 100644 index 0000000..01d0f21 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pk_internal.h @@ -0,0 +1,114 @@ +/** + * \file pk.h + * + * \brief Public Key abstraction layer: wrapper functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#ifndef MBEDTLS_PK_WRAP_H +#define MBEDTLS_PK_WRAP_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "pk.h" + +struct mbedtls_pk_info_t +{ + /** Public key type */ + mbedtls_pk_type_t type; + + /** Type name */ + const char *name; + + /** Get key size in bits */ + size_t (*get_bitlen)( const void * ); + + /** Tell if the context implements this type (e.g. ECKEY can do ECDSA) */ + int (*can_do)( mbedtls_pk_type_t type ); + + /** Verify signature */ + int (*verify_func)( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ); + + /** Make signature */ + int (*sign_func)( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + + /** Decrypt message */ + int (*decrypt_func)( void *ctx, const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + + /** Encrypt message */ + int (*encrypt_func)( void *ctx, const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + + /** Check public-private key pair */ + int (*check_pair_func)( const void *pub, const void *prv ); + + /** Allocate a new context */ + void * (*ctx_alloc_func)( void ); + + /** Free the given context */ + void (*ctx_free_func)( void *ctx ); + + /** Interface with the debug module */ + void (*debug_func)( const void *ctx, mbedtls_pk_debug_item *items ); + +}; +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/* Container for RSA-alt */ +typedef struct +{ + void *key; + mbedtls_pk_rsa_alt_decrypt_func decrypt_func; + mbedtls_pk_rsa_alt_sign_func sign_func; + mbedtls_pk_rsa_alt_key_len_func key_len_func; +} mbedtls_rsa_alt_context; +#endif + +#if defined(MBEDTLS_RSA_C) +extern const mbedtls_pk_info_t mbedtls_rsa_info; +#endif + +#if defined(MBEDTLS_ECP_C) +extern const mbedtls_pk_info_t mbedtls_eckey_info; +extern const mbedtls_pk_info_t mbedtls_eckeydh_info; +#endif + +#if defined(MBEDTLS_ECDSA_C) +extern const mbedtls_pk_info_t mbedtls_ecdsa_info; +#endif + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +extern const mbedtls_pk_info_t mbedtls_rsa_alt_info; +#endif + +#endif /* MBEDTLS_PK_WRAP_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs11.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs11.h new file mode 100644 index 0000000..2e88928 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs11.h @@ -0,0 +1,173 @@ +/** + * \file pkcs11.h + * + * \brief Wrapper for PKCS#11 library libpkcs11-helper + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_PKCS11_H +#define MBEDTLS_PKCS11_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PKCS11_C) + +#include "x509_crt.h" + +#include + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Context for PKCS #11 private keys. + */ +typedef struct { + pkcs11h_certificate_t pkcs11h_cert; + int len; +} mbedtls_pkcs11_context; + +/** + * Initialize a mbedtls_pkcs11_context. + * (Just making memory references valid.) + */ +void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx ); + +/** + * Fill in a mbed TLS certificate, based on the given PKCS11 helper certificate. + * + * \param cert X.509 certificate to fill + * \param pkcs11h_cert PKCS #11 helper certificate + * + * \return 0 on success. + */ +int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert, pkcs11h_certificate_t pkcs11h_cert ); + +/** + * Set up a mbedtls_pkcs11_context storing the given certificate. Note that the + * mbedtls_pkcs11_context will take over control of the certificate, freeing it when + * done. + * + * \param priv_key Private key structure to fill. + * \param pkcs11_cert PKCS #11 helper certificate + * + * \return 0 on success + */ +int mbedtls_pkcs11_priv_key_bind( mbedtls_pkcs11_context *priv_key, + pkcs11h_certificate_t pkcs11_cert ); + +/** + * Free the contents of the given private key context. Note that the structure + * itself is not freed. + * + * \param priv_key Private key structure to cleanup + */ +void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key ); + +/** + * \brief Do an RSA private key decrypt, then remove the message + * padding + * + * \param ctx PKCS #11 context + * \param mode must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature + * \param input buffer holding the encrypted data + * \param output buffer that will hold the plaintext + * \param olen will contain the plaintext length + * \param output_max_len maximum length of the output buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise + * an error is thrown. + */ +int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx, + int mode, size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ); + +/** + * \brief Do a private RSA to sign a message digest + * + * \param ctx PKCS #11 context + * \param mode must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param sig buffer that will hold the ciphertext + * + * \return 0 if the signing operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ); + +/** + * SSL/TLS wrappers for PKCS#11 functions + */ +static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx, int mode, size_t *olen, + const unsigned char *input, unsigned char *output, + size_t output_max_len ) +{ + return mbedtls_pkcs11_decrypt( (mbedtls_pkcs11_context *) ctx, mode, olen, input, output, + output_max_len ); +} + +static inline int mbedtls_ssl_pkcs11_sign( void *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + int mode, mbedtls_md_type_t md_alg, unsigned int hashlen, + const unsigned char *hash, unsigned char *sig ) +{ + ((void) f_rng); + ((void) p_rng); + return mbedtls_pkcs11_sign( (mbedtls_pkcs11_context *) ctx, mode, md_alg, + hashlen, hash, sig ); +} + +static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx ) +{ + return ( (mbedtls_pkcs11_context *) ctx )->len; +} + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_PKCS11_C */ + +#endif /* MBEDTLS_PKCS11_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs12.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs12.h new file mode 100644 index 0000000..9b2d904 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs12.h @@ -0,0 +1,119 @@ +/** + * \file pkcs12.h + * + * \brief PKCS#12 Personal Information Exchange Syntax + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_PKCS12_H +#define MBEDTLS_PKCS12_H + +#include "md.h" +#include "cipher.h" +#include "asn1.h" + +#include + +#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA -0x1F80 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE -0x1F00 /**< Feature not available, e.g. unsupported encryption scheme. */ +#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT -0x1E80 /**< PBE ASN.1 data not as expected. */ +#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH -0x1E00 /**< Given private key password does not allow for correct decryption. */ + +#define MBEDTLS_PKCS12_DERIVE_KEY 1 /**< encryption/decryption key */ +#define MBEDTLS_PKCS12_DERIVE_IV 2 /**< initialization vector */ +#define MBEDTLS_PKCS12_DERIVE_MAC_KEY 3 /**< integrity / MAC key */ + +#define MBEDTLS_PKCS12_PBE_DECRYPT 0 +#define MBEDTLS_PKCS12_PBE_ENCRYPT 1 + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief PKCS12 Password Based function (encryption / decryption) + * for pbeWithSHAAnd128BitRC4 + * + * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure + * \param mode either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT + * \param pwd the password used (may be NULL if no password is used) + * \param pwdlen length of the password (may be 0) + * \param input the input data + * \param len data length + * \param output the output buffer + * + * \return 0 if successful, or a MBEDTLS_ERR_XXX code + */ +int mbedtls_pkcs12_pbe_sha1_rc4_128( mbedtls_asn1_buf *pbe_params, int mode, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *input, size_t len, + unsigned char *output ); + +/** + * \brief PKCS12 Password Based function (encryption / decryption) + * for cipher-based and mbedtls_md-based PBE's + * + * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure + * \param mode either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT + * \param cipher_type the cipher used + * \param md_type the mbedtls_md used + * \param pwd the password used (may be NULL if no password is used) + * \param pwdlen length of the password (may be 0) + * \param input the input data + * \param len data length + * \param output the output buffer + * + * \return 0 if successful, or a MBEDTLS_ERR_XXX code + */ +int mbedtls_pkcs12_pbe( mbedtls_asn1_buf *pbe_params, int mode, + mbedtls_cipher_type_t cipher_type, mbedtls_md_type_t md_type, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *input, size_t len, + unsigned char *output ); + +/** + * \brief The PKCS#12 derivation function uses a password and a salt + * to produce pseudo-random bits for a particular "purpose". + * + * Depending on the given id, this function can produce an + * encryption/decryption key, an nitialization vector or an + * integrity key. + * + * \param data buffer to store the derived data in + * \param datalen length to fill + * \param pwd password to use (may be NULL if no password is used) + * \param pwdlen length of the password (may be 0) + * \param salt salt buffer to use + * \param saltlen length of the salt + * \param mbedtls_md mbedtls_md type to use during the derivation + * \param id id that describes the purpose (can be MBEDTLS_PKCS12_DERIVE_KEY, + * MBEDTLS_PKCS12_DERIVE_IV or MBEDTLS_PKCS12_DERIVE_MAC_KEY) + * \param iterations number of iterations + * + * \return 0 if successful, or a MD, BIGNUM type error. + */ +int mbedtls_pkcs12_derivation( unsigned char *data, size_t datalen, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *salt, size_t saltlen, + mbedtls_md_type_t mbedtls_md, int id, int iterations ); + +#ifdef __cplusplus +} +#endif + +#endif /* pkcs12.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs5.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs5.h new file mode 100644 index 0000000..ec5cb9e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/pkcs5.h @@ -0,0 +1,94 @@ +/** + * \file pkcs5.h + * + * \brief PKCS#5 functions + * + * \author Mathias Olsson + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_PKCS5_H +#define MBEDTLS_PKCS5_H + +#include "asn1.h" +#include "md.h" + +#include +#include + +#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA -0x2f80 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT -0x2f00 /**< Unexpected ASN.1 data. */ +#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE -0x2e80 /**< Requested encryption or digest alg not available. */ +#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH -0x2e00 /**< Given private key password does not allow for correct decryption. */ + +#define MBEDTLS_PKCS5_DECRYPT 0 +#define MBEDTLS_PKCS5_ENCRYPT 1 + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief PKCS#5 PBES2 function + * + * \param pbe_params the ASN.1 algorithm parameters + * \param mode either MBEDTLS_PKCS5_DECRYPT or MBEDTLS_PKCS5_ENCRYPT + * \param pwd password to use when generating key + * \param pwdlen length of password + * \param data data to process + * \param datalen length of data + * \param output output buffer + * + * \returns 0 on success, or a MBEDTLS_ERR_XXX code if verification fails. + */ +int mbedtls_pkcs5_pbes2( const mbedtls_asn1_buf *pbe_params, int mode, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *data, size_t datalen, + unsigned char *output ); + +/** + * \brief PKCS#5 PBKDF2 using HMAC + * + * \param ctx Generic HMAC context + * \param password Password to use when generating key + * \param plen Length of password + * \param salt Salt to use when generating key + * \param slen Length of salt + * \param iteration_count Iteration count + * \param key_length Length of generated key in bytes + * \param output Generated key. Must be at least as big as key_length + * + * \returns 0 on success, or a MBEDTLS_ERR_XXX code if verification fails. + */ +int mbedtls_pkcs5_pbkdf2_hmac( mbedtls_md_context_t *ctx, const unsigned char *password, + size_t plen, const unsigned char *salt, size_t slen, + unsigned int iteration_count, + uint32_t key_length, unsigned char *output ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_pkcs5_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* pkcs5.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/platform.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/platform.h new file mode 100755 index 0000000..ca66206 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/platform.h @@ -0,0 +1,219 @@ +/** + * \file platform.h + * + * \brief mbed TLS Platform abstraction layer + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_PLATFORM_H +#define MBEDTLS_PLATFORM_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#include "osapi.h" +#include "mem.h" +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ +// extern int ets_snprintf(char *buf, unsigned int size, const char *format, ...); +void *pvPortCalloc(unsigned int count, unsigned int size, const char*, unsigned); +void vPortFree (void *p, const char *, unsigned); +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS +#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) +#include +#include +#if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF) +#if defined(_WIN32) +#define MBEDTLS_PLATFORM_STD_SNPRINTF mbedtls_platform_win32_snprintf /**< Default snprintf to use */ +#else +#define MBEDTLS_PLATFORM_STD_SNPRINTF os_snprintf /**< Default snprintf to use */ +#endif +#endif +#if !defined(MBEDTLS_PLATFORM_STD_PRINTF) +#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_FPRINTF) +#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_CALLOC) +#define MBEDTLS_PLATFORM_STD_CALLOC(l, s) os_calloc(l, s) // pvPortCalloc /**< Default allocator to use */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_FREE) +#define MBEDTLS_PLATFORM_STD_FREE(s) os_free(s) // vPortFree /**< Default free to use */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_EXIT) +#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default free to use */ +#endif +#else /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */ +#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR) +#include MBEDTLS_PLATFORM_STD_MEM_HDR +#endif +#endif /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */ + +/* \} name SECTION: Module settings */ + +/* + * The function pointers for calloc and free + */ +#if defined(MBEDTLS_PLATFORM_MEMORY) +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && \ + defined(MBEDTLS_PLATFORM_CALLOC_MACRO) +#define mbedtls_free MBEDTLS_PLATFORM_FREE_MACRO +#define mbedtls_calloc MBEDTLS_PLATFORM_CALLOC_MACRO +#else +/* For size_t */ +#include +extern void * (*mbedtls_calloc)( size_t n, size_t size ); +extern void (*mbedtls_free)( void *ptr ); + +/** + * \brief Set your own memory implementation function pointers + * + * \param calloc_func the calloc function implementation + * \param free_func the free function implementation + * + * \return 0 if successful + */ +int mbedtls_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ), + void (*free_func)( void * ) ); +#endif /* MBEDTLS_PLATFORM_FREE_MACRO && MBEDTLS_PLATFORM_CALLOC_MACRO */ +#else /* !MBEDTLS_PLATFORM_MEMORY */ +#define mbedtls_free(s) os_free(s) +#define mbedtls_calloc(l, s) os_calloc(l, s) // pvPortCalloc(l, s, "", __LINE__) +#endif /* MBEDTLS_PLATFORM_MEMORY && !MBEDTLS_PLATFORM_{FREE,CALLOC}_MACRO */ + +/* + * The function pointers for fprintf + */ +#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) +/* We need FILE * */ +#include +extern int (*mbedtls_fprintf)( FILE *stream, const char *format, ... ); + +/** + * \brief Set your own fprintf function pointer + * + * \param fprintf_func the fprintf function implementation + * + * \return 0 + */ +int mbedtls_platform_set_fprintf( int (*fprintf_func)( FILE *stream, const char *, + ... ) ); +#else +#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) +#define mbedtls_fprintf MBEDTLS_PLATFORM_FPRINTF_MACRO +#else +#define mbedtls_fprintf fprintf +#endif /* MBEDTLS_PLATFORM_FPRINTF_MACRO */ +#endif /* MBEDTLS_PLATFORM_FPRINTF_ALT */ + +/* + * The function pointers for printf + */ +#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) +extern int (*mbedtls_printf)( const char *format, ... ); + +/** + * \brief Set your own printf function pointer + * + * \param printf_func the printf function implementation + * + * \return 0 + */ +int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) ); +#else /* !MBEDTLS_PLATFORM_PRINTF_ALT */ +#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) +#define mbedtls_printf MBEDTLS_PLATFORM_PRINTF_MACRO +#else +#define mbedtls_printf os_printf +#endif /* MBEDTLS_PLATFORM_PRINTF_MACRO */ +#endif /* MBEDTLS_PLATFORM_PRINTF_ALT */ + +/* + * The function pointers for snprintf + * + * The snprintf implementation should conform to C99: + * - it *must* always correctly zero-terminate the buffer + * (except when n == 0, then it must leave the buffer untouched) + * - however it is acceptable to return -1 instead of the required length when + * the destination buffer is too short. + */ +#if defined(_WIN32) +/* For Windows (inc. MSYS2), we provide our own fixed implementation */ +int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... ); +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) +extern int (*mbedtls_snprintf)( char * s, size_t n, const char * format, ... ); + +/** + * \brief Set your own snprintf function pointer + * + * \param snprintf_func the snprintf function implementation + * + * \return 0 + */ +int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n, + const char * format, ... ) ); +#else /* MBEDTLS_PLATFORM_SNPRINTF_ALT */ +#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) +#define mbedtls_snprintf MBEDTLS_PLATFORM_SNPRINTF_MACRO +#else +#define mbedtls_snprintf os_snprintf +#endif /* MBEDTLS_PLATFORM_SNPRINTF_MACRO */ +#endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */ + +/* + * The function pointers for exit + */ +#if defined(MBEDTLS_PLATFORM_EXIT_ALT) +extern void (*mbedtls_exit)( int status ); + +/** + * \brief Set your own exit function pointer + * + * \param exit_func the exit function implementation + * + * \return 0 + */ +int mbedtls_platform_set_exit( void (*exit_func)( int status ) ); +#else +#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) +#define mbedtls_exit MBEDTLS_PLATFORM_EXIT_MACRO +#else +#define mbedtls_exit exit +#endif /* MBEDTLS_PLATFORM_EXIT_MACRO */ +#endif /* MBEDTLS_PLATFORM_EXIT_ALT */ + +#ifdef __cplusplus +} +#endif + +#endif /* platform.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ripemd160.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ripemd160.h new file mode 100644 index 0000000..7083fc8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ripemd160.h @@ -0,0 +1,138 @@ +/** + * \file ripemd160.h + * + * \brief RIPE MD-160 message digest + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_RIPEMD160_H +#define MBEDTLS_RIPEMD160_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#if !defined(MBEDTLS_RIPEMD160_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief RIPEMD-160 context structure + */ +typedef struct +{ + uint32_t total[2]; /*!< number of bytes processed */ + uint32_t state[5]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ +} +mbedtls_ripemd160_context; + +/** + * \brief Initialize RIPEMD-160 context + * + * \param ctx RIPEMD-160 context to be initialized + */ +void mbedtls_ripemd160_init( mbedtls_ripemd160_context *ctx ); + +/** + * \brief Clear RIPEMD-160 context + * + * \param ctx RIPEMD-160 context to be cleared + */ +void mbedtls_ripemd160_free( mbedtls_ripemd160_context *ctx ); + +/** + * \brief Clone (the state of) an RIPEMD-160 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_ripemd160_clone( mbedtls_ripemd160_context *dst, + const mbedtls_ripemd160_context *src ); + +/** + * \brief RIPEMD-160 context setup + * + * \param ctx context to be initialized + */ +void mbedtls_ripemd160_starts( mbedtls_ripemd160_context *ctx ); + +/** + * \brief RIPEMD-160 process buffer + * + * \param ctx RIPEMD-160 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_ripemd160_update( mbedtls_ripemd160_context *ctx, + const unsigned char *input, size_t ilen ); + +/** + * \brief RIPEMD-160 final digest + * + * \param ctx RIPEMD-160 context + * \param output RIPEMD-160 checksum result + */ +void mbedtls_ripemd160_finish( mbedtls_ripemd160_context *ctx, unsigned char output[20] ); + +/* Internal use */ +void mbedtls_ripemd160_process( mbedtls_ripemd160_context *ctx, const unsigned char data[64] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_RIPEMD160_ALT */ +#include "ripemd160.h" +#endif /* MBEDTLS_RIPEMD160_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Output = RIPEMD-160( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output RIPEMD-160 checksum result + */ +void mbedtls_ripemd160( const unsigned char *input, size_t ilen, + unsigned char output[20] ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_ripemd160_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_ripemd160.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/rsa.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/rsa.h new file mode 100644 index 0000000..9c8645d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/rsa.h @@ -0,0 +1,652 @@ +/** + * \file rsa.h + * + * \brief The RSA public-key cryptosystem + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_RSA_H +#define MBEDTLS_RSA_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "bignum.h" +#include "md.h" + +#if defined(MBEDTLS_THREADING_C) +#include "threading.h" +#endif + +/* + * RSA Error codes + */ +#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA -0x4080 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_RSA_INVALID_PADDING -0x4100 /**< Input data contains invalid padding and is rejected. */ +#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED -0x4180 /**< Something failed during generation of a key. */ +#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED -0x4200 /**< Key failed to pass the library's validity check. */ +#define MBEDTLS_ERR_RSA_PUBLIC_FAILED -0x4280 /**< The public key operation failed. */ +#define MBEDTLS_ERR_RSA_PRIVATE_FAILED -0x4300 /**< The private key operation failed. */ +#define MBEDTLS_ERR_RSA_VERIFY_FAILED -0x4380 /**< The PKCS#1 verification failed. */ +#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE -0x4400 /**< The output buffer for decryption is not large enough. */ +#define MBEDTLS_ERR_RSA_RNG_FAILED -0x4480 /**< The random generator failed to generate non-zeros. */ + +/* + * RSA constants + */ +#define MBEDTLS_RSA_PUBLIC 0 +#define MBEDTLS_RSA_PRIVATE 1 + +#define MBEDTLS_RSA_PKCS_V15 0 +#define MBEDTLS_RSA_PKCS_V21 1 + +#define MBEDTLS_RSA_SIGN 1 +#define MBEDTLS_RSA_CRYPT 2 + +#define MBEDTLS_RSA_SALT_LEN_ANY -1 + +/* + * The above constants may be used even if the RSA module is compile out, + * eg for alternative (PKCS#11) RSA implemenations in the PK layers. + */ +#if defined(MBEDTLS_RSA_C) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief RSA context structure + */ +typedef struct +{ + int ver; /*!< always 0 */ + size_t len; /*!< size(N) in chars */ + + mbedtls_mpi N; /*!< public modulus */ + mbedtls_mpi E; /*!< public exponent */ + + mbedtls_mpi D; /*!< private exponent */ + mbedtls_mpi P; /*!< 1st prime factor */ + mbedtls_mpi Q; /*!< 2nd prime factor */ + mbedtls_mpi DP; /*!< D % (P - 1) */ + mbedtls_mpi DQ; /*!< D % (Q - 1) */ + mbedtls_mpi QP; /*!< 1 / (Q % P) */ + + mbedtls_mpi RN; /*!< cached R^2 mod N */ + mbedtls_mpi RP; /*!< cached R^2 mod P */ + mbedtls_mpi RQ; /*!< cached R^2 mod Q */ + + mbedtls_mpi Vi; /*!< cached blinding value */ + mbedtls_mpi Vf; /*!< cached un-blinding value */ + + int padding; /*!< MBEDTLS_RSA_PKCS_V15 for 1.5 padding and + RSA_PKCS_v21 for OAEP/PSS */ + int hash_id; /*!< Hash identifier of mbedtls_md_type_t as + specified in the mbedtls_md.h header file + for the EME-OAEP and EMSA-PSS + encoding */ +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; /*!< Thread-safety mutex */ +#endif +} +mbedtls_rsa_context; + +/** + * \brief Initialize an RSA context + * + * Note: Set padding to MBEDTLS_RSA_PKCS_V21 for the RSAES-OAEP + * encryption scheme and the RSASSA-PSS signature scheme. + * + * \param ctx RSA context to be initialized + * \param padding MBEDTLS_RSA_PKCS_V15 or MBEDTLS_RSA_PKCS_V21 + * \param hash_id MBEDTLS_RSA_PKCS_V21 hash identifier + * + * \note The hash_id parameter is actually ignored + * when using MBEDTLS_RSA_PKCS_V15 padding. + * + * \note Choice of padding mode is strictly enforced for private key + * operations, since there might be security concerns in + * mixing padding modes. For public key operations it's merely + * a default value, which can be overriden by calling specific + * rsa_rsaes_xxx or rsa_rsassa_xxx functions. + * + * \note The chosen hash is always used for OEAP encryption. + * For PSS signatures, it's always used for making signatures, + * but can be overriden (and always is, if set to + * MBEDTLS_MD_NONE) for verifying them. + */ +void mbedtls_rsa_init( mbedtls_rsa_context *ctx, + int padding, + int hash_id); + +/** + * \brief Set padding for an already initialized RSA context + * See \c mbedtls_rsa_init() for details. + * + * \param ctx RSA context to be set + * \param padding MBEDTLS_RSA_PKCS_V15 or MBEDTLS_RSA_PKCS_V21 + * \param hash_id MBEDTLS_RSA_PKCS_V21 hash identifier + */ +void mbedtls_rsa_set_padding( mbedtls_rsa_context *ctx, int padding, int hash_id); + +/** + * \brief Generate an RSA keypair + * + * \param ctx RSA context that will hold the key + * \param f_rng RNG function + * \param p_rng RNG parameter + * \param nbits size of the public key in bits + * \param exponent public exponent (e.g., 65537) + * + * \note mbedtls_rsa_init() must be called beforehand to setup + * the RSA context. + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + */ +int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + unsigned int nbits, int exponent ); + +/** + * \brief Check a public RSA key + * + * \param ctx RSA context to be checked + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + */ +int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx ); + +/** + * \brief Check a private RSA key + * + * \param ctx RSA context to be checked + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + */ +int mbedtls_rsa_check_privkey( const mbedtls_rsa_context *ctx ); + +/** + * \brief Check a public-private RSA key pair. + * Check each of the contexts, and make sure they match. + * + * \param pub RSA context holding the public key + * \param prv RSA context holding the private key + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + */ +int mbedtls_rsa_check_pub_priv( const mbedtls_rsa_context *pub, const mbedtls_rsa_context *prv ); + +/** + * \brief Do an RSA public key operation + * + * \param ctx RSA context + * \param input input buffer + * \param output output buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note This function does NOT take care of message + * padding. Also, be sure to set input[0] = 0 or assure that + * input is smaller than N. + * + * \note The input and output buffers must be large + * enough (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_rsa_public( mbedtls_rsa_context *ctx, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief Do an RSA private key operation + * + * \param ctx RSA context + * \param f_rng RNG function (Needed for blinding) + * \param p_rng RNG parameter + * \param input input buffer + * \param output output buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The input and output buffers must be large + * enough (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_rsa_private( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief Generic wrapper to perform a PKCS#1 encryption using the + * mode from the context. Add the message padding, then do an + * RSA operation. + * + * \param ctx RSA context + * \param f_rng RNG function (Needed for padding and PKCS#1 v2.1 encoding + * and MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param ilen contains the plaintext length + * \param input buffer holding the data to be encrypted + * \param output buffer that will hold the ciphertext + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t ilen, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief Perform a PKCS#1 v1.5 encryption (RSAES-PKCS1-v1_5-ENCRYPT) + * + * \param ctx RSA context + * \param f_rng RNG function (Needed for padding and MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param ilen contains the plaintext length + * \param input buffer holding the data to be encrypted + * \param output buffer that will hold the ciphertext + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t ilen, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief Perform a PKCS#1 v2.1 OAEP encryption (RSAES-OAEP-ENCRYPT) + * + * \param ctx RSA context + * \param f_rng RNG function (Needed for padding and PKCS#1 v2.1 encoding + * and MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param label buffer holding the custom label to use + * \param label_len contains the label length + * \param ilen contains the plaintext length + * \param input buffer holding the data to be encrypted + * \param output buffer that will hold the ciphertext + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_rsa_rsaes_oaep_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + const unsigned char *label, size_t label_len, + size_t ilen, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief Generic wrapper to perform a PKCS#1 decryption using the + * mode from the context. Do an RSA operation, then remove + * the message padding + * + * \param ctx RSA context + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param olen will contain the plaintext length + * \param input buffer holding the encrypted data + * \param output buffer that will hold the plaintext + * \param output_max_len maximum length of the output buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise + * an error is thrown. + */ +int mbedtls_rsa_pkcs1_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ); + +/** + * \brief Perform a PKCS#1 v1.5 decryption (RSAES-PKCS1-v1_5-DECRYPT) + * + * \param ctx RSA context + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param olen will contain the plaintext length + * \param input buffer holding the encrypted data + * \param output buffer that will hold the plaintext + * \param output_max_len maximum length of the output buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise + * an error is thrown. + */ +int mbedtls_rsa_rsaes_pkcs1_v15_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ); + +/** + * \brief Perform a PKCS#1 v2.1 OAEP decryption (RSAES-OAEP-DECRYPT) + * + * \param ctx RSA context + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param label buffer holding the custom label to use + * \param label_len contains the label length + * \param olen will contain the plaintext length + * \param input buffer holding the encrypted data + * \param output buffer that will hold the plaintext + * \param output_max_len maximum length of the output buffer + * + * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise + * an error is thrown. + */ +int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + const unsigned char *label, size_t label_len, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ); + +/** + * \brief Generic wrapper to perform a PKCS#1 signature using the + * mode from the context. Do a private RSA operation to sign + * a message digest + * + * \param ctx RSA context + * \param f_rng RNG function (Needed for PKCS#1 v2.1 encoding and for + * MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param sig buffer that will hold the ciphertext + * + * \return 0 if the signing operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + * + * \note In case of PKCS#1 v2.1 encoding, see comments on + * \note \c mbedtls_rsa_rsassa_pss_sign() for details on md_alg and hash_id. + */ +int mbedtls_rsa_pkcs1_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ); + +/** + * \brief Perform a PKCS#1 v1.5 signature (RSASSA-PKCS1-v1_5-SIGN) + * + * \param ctx RSA context + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param sig buffer that will hold the ciphertext + * + * \return 0 if the signing operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ); + +/** + * \brief Perform a PKCS#1 v2.1 PSS signature (RSASSA-PSS-SIGN) + * + * \param ctx RSA context + * \param f_rng RNG function (Needed for PKCS#1 v2.1 encoding and for + * MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param sig buffer that will hold the ciphertext + * + * \return 0 if the signing operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + * + * \note The hash_id in the RSA context is the one used for the + * encoding. md_alg in the function call is the type of hash + * that is encoded. According to RFC 3447 it is advised to + * keep both hashes the same. + */ +int mbedtls_rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ); + +/** + * \brief Generic wrapper to perform a PKCS#1 verification using the + * mode from the context. Do a public RSA operation and check + * the message digest + * + * \param ctx points to an RSA public key + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param sig buffer holding the ciphertext + * + * \return 0 if the verify operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + * + * \note In case of PKCS#1 v2.1 encoding, see comments on + * \c mbedtls_rsa_rsassa_pss_verify() about md_alg and hash_id. + */ +int mbedtls_rsa_pkcs1_verify( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ); + +/** + * \brief Perform a PKCS#1 v1.5 verification (RSASSA-PKCS1-v1_5-VERIFY) + * + * \param ctx points to an RSA public key + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param sig buffer holding the ciphertext + * + * \return 0 if the verify operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ); + +/** + * \brief Perform a PKCS#1 v2.1 PSS verification (RSASSA-PSS-VERIFY) + * (This is the "simple" version.) + * + * \param ctx points to an RSA public key + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param sig buffer holding the ciphertext + * + * \return 0 if the verify operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + * + * \note The hash_id in the RSA context is the one used for the + * verification. md_alg in the function call is the type of + * hash that is verified. According to RFC 3447 it is advised to + * keep both hashes the same. If hash_id in the RSA context is + * unset, the md_alg from the function call is used. + */ +int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ); + +/** + * \brief Perform a PKCS#1 v2.1 PSS verification (RSASSA-PSS-VERIFY) + * (This is the version with "full" options.) + * + * \param ctx points to an RSA public key + * \param f_rng RNG function (Only needed for MBEDTLS_RSA_PRIVATE) + * \param p_rng RNG parameter + * \param mode MBEDTLS_RSA_PUBLIC or MBEDTLS_RSA_PRIVATE + * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data) + * \param hashlen message digest length (for MBEDTLS_MD_NONE only) + * \param hash buffer holding the message digest + * \param mgf1_hash_id message digest used for mask generation + * \param expected_salt_len Length of the salt used in padding, use + * MBEDTLS_RSA_SALT_LEN_ANY to accept any salt length + * \param sig buffer holding the ciphertext + * + * \return 0 if the verify operation was successful, + * or an MBEDTLS_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + * + * \note The hash_id in the RSA context is ignored. + */ +int mbedtls_rsa_rsassa_pss_verify_ext( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + mbedtls_md_type_t mgf1_hash_id, + int expected_salt_len, + const unsigned char *sig ); + +/** + * \brief Copy the components of an RSA context + * + * \param dst Destination context + * \param src Source context + * + * \return 0 on success, + * MBEDTLS_ERR_MPI_ALLOC_FAILED on memory allocation failure + */ +int mbedtls_rsa_copy( mbedtls_rsa_context *dst, const mbedtls_rsa_context *src ); + +/** + * \brief Free the components of an RSA key + * + * \param ctx RSA Context to free + */ +void mbedtls_rsa_free( mbedtls_rsa_context *ctx ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_rsa_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_RSA_C */ + +#endif /* rsa.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha1.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha1.h new file mode 100644 index 0000000..7a67c6c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha1.h @@ -0,0 +1,136 @@ +/** + * \file sha1.h + * + * \brief SHA-1 cryptographic hash function + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SHA1_H +#define MBEDTLS_SHA1_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#if !defined(MBEDTLS_SHA1_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief SHA-1 context structure + */ +typedef struct +{ + uint32_t total[2]; /*!< number of bytes processed */ + uint32_t state[5]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ +} +mbedtls_sha1_context; + +/** + * \brief Initialize SHA-1 context + * + * \param ctx SHA-1 context to be initialized + */ +void mbedtls_sha1_init( mbedtls_sha1_context *ctx ); + +/** + * \brief Clear SHA-1 context + * + * \param ctx SHA-1 context to be cleared + */ +void mbedtls_sha1_free( mbedtls_sha1_context *ctx ); + +/** + * \brief Clone (the state of) a SHA-1 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_sha1_clone( mbedtls_sha1_context *dst, + const mbedtls_sha1_context *src ); + +/** + * \brief SHA-1 context setup + * + * \param ctx context to be initialized + */ +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ); + +/** + * \brief SHA-1 process buffer + * + * \param ctx SHA-1 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); + +/** + * \brief SHA-1 final digest + * + * \param ctx SHA-1 context + * \param output SHA-1 checksum result + */ +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, unsigned char output[20] ); + +/* Internal use */ +void mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[64] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_SHA1_ALT */ +#include "sha1_alt.h" +#endif /* MBEDTLS_SHA1_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Output = SHA-1( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output SHA-1 checksum result + */ +void mbedtls_sha1( const unsigned char *input, size_t ilen, unsigned char output[20] ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_sha1_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_sha1.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha256.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha256.h new file mode 100644 index 0000000..f8041ad --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha256.h @@ -0,0 +1,141 @@ +/** + * \file sha256.h + * + * \brief SHA-224 and SHA-256 cryptographic hash function + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SHA256_H +#define MBEDTLS_SHA256_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#if !defined(MBEDTLS_SHA256_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief SHA-256 context structure + */ +typedef struct +{ + uint32_t total[2]; /*!< number of bytes processed */ + uint32_t state[8]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ + int is224; /*!< 0 => SHA-256, else SHA-224 */ +} +mbedtls_sha256_context; + +/** + * \brief Initialize SHA-256 context + * + * \param ctx SHA-256 context to be initialized + */ +void mbedtls_sha256_init( mbedtls_sha256_context *ctx ); + +/** + * \brief Clear SHA-256 context + * + * \param ctx SHA-256 context to be cleared + */ +void mbedtls_sha256_free( mbedtls_sha256_context *ctx ); + +/** + * \brief Clone (the state of) a SHA-256 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_sha256_clone( mbedtls_sha256_context *dst, + const mbedtls_sha256_context *src ); + +/** + * \brief SHA-256 context setup + * + * \param ctx context to be initialized + * \param is224 0 = use SHA256, 1 = use SHA224 + */ +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ); + +/** + * \brief SHA-256 process buffer + * + * \param ctx SHA-256 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input, + size_t ilen ); + +/** + * \brief SHA-256 final digest + * + * \param ctx SHA-256 context + * \param output SHA-224/256 checksum result + */ +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] ); + +/* Internal use */ +void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[64] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_SHA256_ALT */ +#include "sha256_alt.h" +#endif /* MBEDTLS_SHA256_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Output = SHA-256( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output SHA-224/256 checksum result + * \param is224 0 = use SHA256, 1 = use SHA224 + */ +void mbedtls_sha256( const unsigned char *input, size_t ilen, + unsigned char output[32], int is224 ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_sha256_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_sha256.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha512.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha512.h new file mode 100644 index 0000000..627694f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sha512.h @@ -0,0 +1,141 @@ +/** + * \file sha512.h + * + * \brief SHA-384 and SHA-512 cryptographic hash function + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SHA512_H +#define MBEDTLS_SHA512_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#if !defined(MBEDTLS_SHA512_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief SHA-512 context structure + */ +typedef struct +{ + uint64_t total[2]; /*!< number of bytes processed */ + uint64_t state[8]; /*!< intermediate digest state */ + unsigned char buffer[128]; /*!< data block being processed */ + int is384; /*!< 0 => SHA-512, else SHA-384 */ +} +mbedtls_sha512_context; + +/** + * \brief Initialize SHA-512 context + * + * \param ctx SHA-512 context to be initialized + */ +void mbedtls_sha512_init( mbedtls_sha512_context *ctx ); + +/** + * \brief Clear SHA-512 context + * + * \param ctx SHA-512 context to be cleared + */ +void mbedtls_sha512_free( mbedtls_sha512_context *ctx ); + +/** + * \brief Clone (the state of) a SHA-512 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_sha512_clone( mbedtls_sha512_context *dst, + const mbedtls_sha512_context *src ); + +/** + * \brief SHA-512 context setup + * + * \param ctx context to be initialized + * \param is384 0 = use SHA512, 1 = use SHA384 + */ +void mbedtls_sha512_starts( mbedtls_sha512_context *ctx, int is384 ); + +/** + * \brief SHA-512 process buffer + * + * \param ctx SHA-512 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_sha512_update( mbedtls_sha512_context *ctx, const unsigned char *input, + size_t ilen ); + +/** + * \brief SHA-512 final digest + * + * \param ctx SHA-512 context + * \param output SHA-384/512 checksum result + */ +void mbedtls_sha512_finish( mbedtls_sha512_context *ctx, unsigned char output[64] ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_SHA512_ALT */ +#include "sha512_alt.h" +#endif /* MBEDTLS_SHA512_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Output = SHA-512( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output SHA-384/512 checksum result + * \param is384 0 = use SHA512, 1 = use SHA384 + */ +void mbedtls_sha512( const unsigned char *input, size_t ilen, + unsigned char output[64], int is384 ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_sha512_self_test( int verbose ); + +/* Internal use */ +void mbedtls_sha512_process( mbedtls_sha512_context *ctx, const unsigned char data[128] ); + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_sha512.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl.h new file mode 100644 index 0000000..ff5f389 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl.h @@ -0,0 +1,2393 @@ +/** + * \file ssl.h + * + * \brief SSL/TLS functions. + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SSL_H +#define MBEDTLS_SSL_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "bignum.h" +#include "ecp.h" + +#include "ssl_ciphersuites.h" + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +#include "x509_crt.h" +#include "x509_crl.h" +#endif + +#if defined(MBEDTLS_DHM_C) +#include "dhm.h" +#endif + +#if defined(MBEDTLS_ECDH_C) +#include "ecdh.h" +#endif + +#if defined(MBEDTLS_ZLIB_SUPPORT) +#include "zlib.h" +#endif + +#if defined(MBEDTLS_HAVE_TIME) +#include +#endif + +/* + * SSL Error codes + */ +#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE -0x7080 /**< The requested feature is not available. */ +#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA -0x7100 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_SSL_INVALID_MAC -0x7180 /**< Verification of the message MAC failed. */ +#define MBEDTLS_ERR_SSL_INVALID_RECORD -0x7200 /**< An invalid SSL record was received. */ +#define MBEDTLS_ERR_SSL_CONN_EOF -0x7280 /**< The connection indicated an EOF. */ +#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER -0x7300 /**< An unknown cipher was received. */ +#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN -0x7380 /**< The server has no ciphersuites in common with the client. */ +#define MBEDTLS_ERR_SSL_NO_RNG -0x7400 /**< No RNG was provided to the SSL module. */ +#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE -0x7480 /**< No client certification received from the client, but required by the authentication mode. */ +#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE -0x7500 /**< Our own certificate(s) is/are too large to send in an SSL message. */ +#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED -0x7580 /**< The own certificate is not set, but needed by the server. */ +#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED -0x7600 /**< The own private key or pre-shared key is not set, but needed. */ +#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED -0x7680 /**< No CA Chain is set, but required to operate. */ +#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE -0x7700 /**< An unexpected message was received from our peer. */ +#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE -0x7780 /**< A fatal alert message was received from our peer. */ +#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED -0x7800 /**< Verification of our peer failed. */ +#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY -0x7880 /**< The peer notified us that the connection is going to be closed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO -0x7900 /**< Processing of the ClientHello handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO -0x7980 /**< Processing of the ServerHello handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE -0x7A00 /**< Processing of the Certificate handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST -0x7A80 /**< Processing of the CertificateRequest handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE -0x7B00 /**< Processing of the ServerKeyExchange handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE -0x7B80 /**< Processing of the ServerHelloDone handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE -0x7C00 /**< Processing of the ClientKeyExchange handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP -0x7C80 /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS -0x7D00 /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY -0x7D80 /**< Processing of the CertificateVerify handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC -0x7E00 /**< Processing of the ChangeCipherSpec handshake message failed. */ +#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED -0x7E80 /**< Processing of the Finished handshake message failed. */ +#define MBEDTLS_ERR_SSL_ALLOC_FAILED -0x7F00 /**< Memory allocation failed */ +#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED -0x7F80 /**< Hardware acceleration function returned with error */ +#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH -0x6F80 /**< Hardware acceleration function skipped / left alone data */ +#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED -0x6F00 /**< Processing of the compression / decompression failed */ +#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION -0x6E80 /**< Handshake protocol not within min/max boundaries */ +#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET -0x6E00 /**< Processing of the NewSessionTicket handshake message failed. */ +#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED -0x6D80 /**< Session ticket has expired. */ +#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH -0x6D00 /**< Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */ +#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY -0x6C80 /**< Unknown identity received (eg, PSK identity) */ +#define MBEDTLS_ERR_SSL_INTERNAL_ERROR -0x6C00 /**< Internal error (eg, unexpected failure in lower-level module) */ +#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING -0x6B80 /**< A counter would wrap (eg, too many messages exchanged). */ +#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO -0x6B00 /**< Unexpected message at ServerHello in renegotiation. */ +#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED -0x6A80 /**< DTLS client must retry for hello verification */ +#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL -0x6A00 /**< A buffer is too small to receive or write a message */ +#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE -0x6980 /**< None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */ +#define MBEDTLS_ERR_SSL_WANT_READ -0x6900 /**< Connection requires a read call. */ +#define MBEDTLS_ERR_SSL_WANT_WRITE -0x6880 /**< Connection requires a write call. */ +#define MBEDTLS_ERR_SSL_TIMEOUT -0x6800 /**< The operation timed out. */ +#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT -0x6780 /**< The client initiated a reconnect from the same port. */ +#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD -0x6700 /**< Record header looks valid but is not expected. */ + +/* + * Various constants + */ +#define MBEDTLS_SSL_MAJOR_VERSION_3 3 +#define MBEDTLS_SSL_MINOR_VERSION_0 0 /*!< SSL v3.0 */ +#define MBEDTLS_SSL_MINOR_VERSION_1 1 /*!< TLS v1.0 */ +#define MBEDTLS_SSL_MINOR_VERSION_2 2 /*!< TLS v1.1 */ +#define MBEDTLS_SSL_MINOR_VERSION_3 3 /*!< TLS v1.2 */ + +#define MBEDTLS_SSL_TRANSPORT_STREAM 0 /*!< TLS */ +#define MBEDTLS_SSL_TRANSPORT_DATAGRAM 1 /*!< DTLS */ + +#define MBEDTLS_SSL_MAX_HOST_NAME_LEN 255 /*!< Maximum host name defined in RFC 1035 */ + +/* RFC 6066 section 4, see also mfl_code_to_length in ssl_tls.c + * NONE must be zero so that memset()ing structure to zero works */ +#define MBEDTLS_SSL_MAX_FRAG_LEN_NONE 0 /*!< don't use this extension */ +#define MBEDTLS_SSL_MAX_FRAG_LEN_512 1 /*!< MaxFragmentLength 2^9 */ +#define MBEDTLS_SSL_MAX_FRAG_LEN_1024 2 /*!< MaxFragmentLength 2^10 */ +#define MBEDTLS_SSL_MAX_FRAG_LEN_2048 3 /*!< MaxFragmentLength 2^11 */ +#define MBEDTLS_SSL_MAX_FRAG_LEN_4096 4 /*!< MaxFragmentLength 2^12 */ +#define MBEDTLS_SSL_MAX_FRAG_LEN_INVALID 5 /*!< first invalid value */ + +#define MBEDTLS_SSL_IS_CLIENT 0 +#define MBEDTLS_SSL_IS_SERVER 1 + +#define MBEDTLS_SSL_IS_NOT_FALLBACK 0 +#define MBEDTLS_SSL_IS_FALLBACK 1 + +#define MBEDTLS_SSL_EXTENDED_MS_DISABLED 0 +#define MBEDTLS_SSL_EXTENDED_MS_ENABLED 1 + +#define MBEDTLS_SSL_ETM_DISABLED 0 +#define MBEDTLS_SSL_ETM_ENABLED 1 + +#define MBEDTLS_SSL_COMPRESS_NULL 0 +#define MBEDTLS_SSL_COMPRESS_DEFLATE 1 + +#define MBEDTLS_SSL_VERIFY_NONE 0 +#define MBEDTLS_SSL_VERIFY_OPTIONAL 1 +#define MBEDTLS_SSL_VERIFY_REQUIRED 2 +#define MBEDTLS_SSL_VERIFY_UNSET 3 /* Used only for sni_authmode */ + +#define MBEDTLS_SSL_LEGACY_RENEGOTIATION 0 +#define MBEDTLS_SSL_SECURE_RENEGOTIATION 1 + +#define MBEDTLS_SSL_RENEGOTIATION_DISABLED 0 +#define MBEDTLS_SSL_RENEGOTIATION_ENABLED 1 + +#define MBEDTLS_SSL_ANTI_REPLAY_DISABLED 0 +#define MBEDTLS_SSL_ANTI_REPLAY_ENABLED 1 + +#define MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED -1 +#define MBEDTLS_SSL_RENEGO_MAX_RECORDS_DEFAULT 16 + +#define MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION 0 +#define MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION 1 +#define MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE 2 + +#define MBEDTLS_SSL_TRUNC_HMAC_DISABLED 0 +#define MBEDTLS_SSL_TRUNC_HMAC_ENABLED 1 +#define MBEDTLS_SSL_TRUNCATED_HMAC_LEN 10 /* 80 bits, rfc 6066 section 7 */ + +#define MBEDTLS_SSL_SESSION_TICKETS_DISABLED 0 +#define MBEDTLS_SSL_SESSION_TICKETS_ENABLED 1 + +#define MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED 0 +#define MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED 1 + +#define MBEDTLS_SSL_ARC4_ENABLED 0 +#define MBEDTLS_SSL_ARC4_DISABLED 1 + +#define MBEDTLS_SSL_PRESET_DEFAULT 0 +#define MBEDTLS_SSL_PRESET_SUITEB 2 + +/* + * Default range for DTLS retransmission timer value, in milliseconds. + * RFC 6347 4.2.4.1 says from 1 second to 60 seconds. + */ +#define MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MIN 1000 +#define MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MAX 60000 + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME) +#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */ +#endif + +/* + * Maxium fragment length in bytes, + * determines the size of each of the two internal I/O buffers. + * + * Note: the RFC defines the default size of SSL / TLS messages. If you + * change the value here, other clients / servers may not be able to + * communicate with you anymore. Only change this value if you control + * both sides of the connection and have it reduced at both sides, or + * if you're using the Max Fragment Length extension and you know all your + * peers are using it too! + */ +#if !defined(MBEDTLS_SSL_MAX_CONTENT_LEN) +#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384 /**< Size of the input / output buffer */ +#endif + +/* \} name SECTION: Module settings */ + +/* + * Length of the verify data for secure renegotiation + */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) +#define MBEDTLS_SSL_VERIFY_DATA_MAX_LEN 36 +#else +#define MBEDTLS_SSL_VERIFY_DATA_MAX_LEN 12 +#endif + +/* + * Signaling ciphersuite values (SCSV) + */ +#define MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO 0xFF /**< renegotiation info ext */ +#define MBEDTLS_SSL_FALLBACK_SCSV_VALUE 0x5600 /**< draft-ietf-tls-downgrade-scsv-00 */ + +/* + * Supported Signature and Hash algorithms (For TLS 1.2) + * RFC 5246 section 7.4.1.4.1 + */ +#define MBEDTLS_SSL_HASH_NONE 0 +#define MBEDTLS_SSL_HASH_MD5 1 +#define MBEDTLS_SSL_HASH_SHA1 2 +#define MBEDTLS_SSL_HASH_SHA224 3 +#define MBEDTLS_SSL_HASH_SHA256 4 +#define MBEDTLS_SSL_HASH_SHA384 5 +#define MBEDTLS_SSL_HASH_SHA512 6 + +#define MBEDTLS_SSL_SIG_ANON 0 +#define MBEDTLS_SSL_SIG_RSA 1 +#define MBEDTLS_SSL_SIG_ECDSA 3 + +/* + * Client Certificate Types + * RFC 5246 section 7.4.4 plus RFC 4492 section 5.5 + */ +#define MBEDTLS_SSL_CERT_TYPE_RSA_SIGN 1 +#define MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN 64 + +/* + * Message, alert and handshake types + */ +#define MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC 20 +#define MBEDTLS_SSL_MSG_ALERT 21 +#define MBEDTLS_SSL_MSG_HANDSHAKE 22 +#define MBEDTLS_SSL_MSG_APPLICATION_DATA 23 + +#define MBEDTLS_SSL_ALERT_LEVEL_WARNING 1 +#define MBEDTLS_SSL_ALERT_LEVEL_FATAL 2 + +#define MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY 0 /* 0x00 */ +#define MBEDTLS_SSL_ALERT_MSG_UNEXPECTED_MESSAGE 10 /* 0x0A */ +#define MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC 20 /* 0x14 */ +#define MBEDTLS_SSL_ALERT_MSG_DECRYPTION_FAILED 21 /* 0x15 */ +#define MBEDTLS_SSL_ALERT_MSG_RECORD_OVERFLOW 22 /* 0x16 */ +#define MBEDTLS_SSL_ALERT_MSG_DECOMPRESSION_FAILURE 30 /* 0x1E */ +#define MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE 40 /* 0x28 */ +#define MBEDTLS_SSL_ALERT_MSG_NO_CERT 41 /* 0x29 */ +#define MBEDTLS_SSL_ALERT_MSG_BAD_CERT 42 /* 0x2A */ +#define MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_CERT 43 /* 0x2B */ +#define MBEDTLS_SSL_ALERT_MSG_CERT_REVOKED 44 /* 0x2C */ +#define MBEDTLS_SSL_ALERT_MSG_CERT_EXPIRED 45 /* 0x2D */ +#define MBEDTLS_SSL_ALERT_MSG_CERT_UNKNOWN 46 /* 0x2E */ +#define MBEDTLS_SSL_ALERT_MSG_ILLEGAL_PARAMETER 47 /* 0x2F */ +#define MBEDTLS_SSL_ALERT_MSG_UNKNOWN_CA 48 /* 0x30 */ +#define MBEDTLS_SSL_ALERT_MSG_ACCESS_DENIED 49 /* 0x31 */ +#define MBEDTLS_SSL_ALERT_MSG_DECODE_ERROR 50 /* 0x32 */ +#define MBEDTLS_SSL_ALERT_MSG_DECRYPT_ERROR 51 /* 0x33 */ +#define MBEDTLS_SSL_ALERT_MSG_EXPORT_RESTRICTION 60 /* 0x3C */ +#define MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION 70 /* 0x46 */ +#define MBEDTLS_SSL_ALERT_MSG_INSUFFICIENT_SECURITY 71 /* 0x47 */ +#define MBEDTLS_SSL_ALERT_MSG_INTERNAL_ERROR 80 /* 0x50 */ +#define MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK 86 /* 0x56 */ +#define MBEDTLS_SSL_ALERT_MSG_USER_CANCELED 90 /* 0x5A */ +#define MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION 100 /* 0x64 */ +#define MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_EXT 110 /* 0x6E */ +#define MBEDTLS_SSL_ALERT_MSG_UNRECOGNIZED_NAME 112 /* 0x70 */ +#define MBEDTLS_SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY 115 /* 0x73 */ +#define MBEDTLS_SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL 120 /* 0x78 */ + +#define MBEDTLS_SSL_HS_HELLO_REQUEST 0 +#define MBEDTLS_SSL_HS_CLIENT_HELLO 1 +#define MBEDTLS_SSL_HS_SERVER_HELLO 2 +#define MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST 3 +#define MBEDTLS_SSL_HS_NEW_SESSION_TICKET 4 +#define MBEDTLS_SSL_HS_CERTIFICATE 11 +#define MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE 12 +#define MBEDTLS_SSL_HS_CERTIFICATE_REQUEST 13 +#define MBEDTLS_SSL_HS_SERVER_HELLO_DONE 14 +#define MBEDTLS_SSL_HS_CERTIFICATE_VERIFY 15 +#define MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE 16 +#define MBEDTLS_SSL_HS_FINISHED 20 + +/* + * TLS extensions + */ +#define MBEDTLS_TLS_EXT_SERVERNAME 0 +#define MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME 0 + +#define MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH 1 + +#define MBEDTLS_TLS_EXT_TRUNCATED_HMAC 4 + +#define MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES 10 +#define MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS 11 + +#define MBEDTLS_TLS_EXT_SIG_ALG 13 + +#define MBEDTLS_TLS_EXT_ALPN 16 + +#define MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC 22 /* 0x16 */ +#define MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET 0x0017 /* 23 */ + +#define MBEDTLS_TLS_EXT_SESSION_TICKET 35 + +#define MBEDTLS_TLS_EXT_ECJPAKE_KKPP 256 /* experimental */ + +#define MBEDTLS_TLS_EXT_RENEGOTIATION_INFO 0xFF01 + +/* + * Size defines + */ +#if !defined(MBEDTLS_PSK_MAX_LEN) +#define MBEDTLS_PSK_MAX_LEN 32 /* 256 bits */ +#endif + +/* Dummy type used only for its size */ +union mbedtls_ssl_premaster_secret +{ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) + unsigned char _pms_rsa[48]; /* RFC 5246 8.1.1 */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) + unsigned char _pms_dhm[MBEDTLS_MPI_MAX_SIZE]; /* RFC 5246 8.1.2 */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) + unsigned char _pms_ecdh[MBEDTLS_ECP_MAX_BYTES]; /* RFC 4492 5.10 */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) + unsigned char _pms_psk[4 + 2 * MBEDTLS_PSK_MAX_LEN]; /* RFC 4279 2 */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) + unsigned char _pms_dhe_psk[4 + MBEDTLS_MPI_MAX_SIZE + + MBEDTLS_PSK_MAX_LEN]; /* RFC 4279 3 */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) + unsigned char _pms_rsa_psk[52 + MBEDTLS_PSK_MAX_LEN]; /* RFC 4279 4 */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) + unsigned char _pms_ecdhe_psk[4 + MBEDTLS_ECP_MAX_BYTES + + MBEDTLS_PSK_MAX_LEN]; /* RFC 5489 2 */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + unsigned char _pms_ecjpake[32]; /* Thread spec: SHA-256 output */ +#endif +}; + +#define MBEDTLS_PREMASTER_SIZE sizeof( union mbedtls_ssl_premaster_secret ) + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * SSL state machine + */ +typedef enum +{ + MBEDTLS_SSL_HELLO_REQUEST, + MBEDTLS_SSL_CLIENT_HELLO, + MBEDTLS_SSL_SERVER_HELLO, + MBEDTLS_SSL_SERVER_CERTIFICATE, + MBEDTLS_SSL_SERVER_KEY_EXCHANGE, + MBEDTLS_SSL_CERTIFICATE_REQUEST, + MBEDTLS_SSL_SERVER_HELLO_DONE, + MBEDTLS_SSL_CLIENT_CERTIFICATE, + MBEDTLS_SSL_CLIENT_KEY_EXCHANGE, + MBEDTLS_SSL_CERTIFICATE_VERIFY, + MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC, + MBEDTLS_SSL_CLIENT_FINISHED, + MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC, + MBEDTLS_SSL_SERVER_FINISHED, + MBEDTLS_SSL_FLUSH_BUFFERS, + MBEDTLS_SSL_HANDSHAKE_WRAPUP, + MBEDTLS_SSL_HANDSHAKE_OVER, + MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET, + MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT, +} +mbedtls_ssl_states; + +/* Defined below */ +typedef struct mbedtls_ssl_session mbedtls_ssl_session; +typedef struct mbedtls_ssl_context mbedtls_ssl_context; +typedef struct mbedtls_ssl_config mbedtls_ssl_config; + +/* Defined in ssl_internal.h */ +typedef struct mbedtls_ssl_transform mbedtls_ssl_transform; +typedef struct mbedtls_ssl_handshake_params mbedtls_ssl_handshake_params; +#if defined(MBEDTLS_X509_CRT_PARSE_C) +typedef struct mbedtls_ssl_key_cert mbedtls_ssl_key_cert; +#endif +#if defined(MBEDTLS_SSL_PROTO_DTLS) +typedef struct mbedtls_ssl_flight_item mbedtls_ssl_flight_item; +#endif + +/* + * This structure is used for storing current session data. + */ +struct mbedtls_ssl_session +{ +#if defined(MBEDTLS_HAVE_TIME) + time_t start; /*!< starting time */ +#endif + int ciphersuite; /*!< chosen ciphersuite */ + int compression; /*!< chosen compression */ + size_t id_len; /*!< session id length */ + unsigned char id[32]; /*!< session identifier */ + unsigned char master[48]; /*!< the master secret */ + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + mbedtls_x509_crt *peer_cert; /*!< peer X.509 cert chain */ +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + uint32_t verify_result; /*!< verification result */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C) + unsigned char *ticket; /*!< RFC 5077 session ticket */ + size_t ticket_len; /*!< session ticket length */ + uint32_t ticket_lifetime; /*!< ticket lifetime hint */ +#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */ + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + unsigned char mfl_code; /*!< MaxFragmentLength negotiated by peer */ +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + int trunc_hmac; /*!< flag for truncated hmac activation */ +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + int encrypt_then_mac; /*!< flag for EtM activation */ +#endif +}; + +/** + * SSL/TLS configuration to be shared between mbedtls_ssl_context structures. + */ +struct mbedtls_ssl_config +{ + /* Group items by size (largest first) to minimize padding overhead */ + + /* + * Pointers + */ + + const int *ciphersuite_list[4]; /*!< allowed ciphersuites per version */ + + /** Callback for printing debug output */ + void (*f_dbg)(void *, int, const char *, int, const char *); + void *p_dbg; /*!< context for the debug function */ + + /** Callback for getting (pseudo-)random numbers */ + int (*f_rng)(void *, unsigned char *, size_t); + void *p_rng; /*!< context for the RNG function */ + + /** Callback to retrieve a session from the cache */ + int (*f_get_cache)(void *, mbedtls_ssl_session *); + /** Callback to store a session into the cache */ + int (*f_set_cache)(void *, const mbedtls_ssl_session *); + void *p_cache; /*!< context for cache callbacks */ + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + /** Callback for setting cert according to SNI extension */ + int (*f_sni)(void *, mbedtls_ssl_context *, const unsigned char *, size_t); + void *p_sni; /*!< context for SNI callback */ +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + /** Callback to customize X.509 certificate chain verification */ + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *); + void *p_vrfy; /*!< context for X.509 verify calllback */ +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + /** Callback to retrieve PSK key from identity */ + int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, size_t); + void *p_psk; /*!< context for PSK callback */ +#endif + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C) + /** Callback to create & write a cookie for ClientHello veirifcation */ + int (*f_cookie_write)( void *, unsigned char **, unsigned char *, + const unsigned char *, size_t ); + /** Callback to verify validity of a ClientHello cookie */ + int (*f_cookie_check)( void *, const unsigned char *, size_t, + const unsigned char *, size_t ); + void *p_cookie; /*!< context for the cookie callbacks */ +#endif + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_SRV_C) + /** Callback to create & write a session ticket */ + int (*f_ticket_write)( void *, const mbedtls_ssl_session *, + unsigned char *, const unsigned char *, size_t *, uint32_t * ); + /** Callback to parse a session ticket into a session structure */ + int (*f_ticket_parse)( void *, mbedtls_ssl_session *, unsigned char *, size_t); + void *p_ticket; /*!< context for the ticket callbacks */ +#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_SRV_C */ + +#if defined(MBEDTLS_SSL_EXPORT_KEYS) + /** Callback to export key block and master secret */ + int (*f_export_keys)( void *, const unsigned char *, + const unsigned char *, size_t, size_t, size_t ); + void *p_export_keys; /*!< context for key export callback */ +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + const mbedtls_x509_crt_profile *cert_profile; /*!< verification profile */ + mbedtls_ssl_key_cert *key_cert; /*!< own certificate/key pair(s) */ + mbedtls_x509_crt *ca_chain; /*!< trusted CAs */ + mbedtls_x509_crl *ca_crl; /*!< trusted CAs CRLs */ +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) + const int *sig_hashes; /*!< allowed signature hashes */ +#endif + +#if defined(MBEDTLS_ECP_C) + const mbedtls_ecp_group_id *curve_list; /*!< allowed curves */ +#endif + +#if defined(MBEDTLS_DHM_C) + mbedtls_mpi dhm_P; /*!< prime modulus for DHM */ + mbedtls_mpi dhm_G; /*!< generator for DHM */ +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + unsigned char *psk; /*!< pre-shared key */ + size_t psk_len; /*!< length of the pre-shared key */ + unsigned char *psk_identity; /*!< identity for PSK negotiation */ + size_t psk_identity_len;/*!< length of identity */ +#endif + +#if defined(MBEDTLS_SSL_ALPN) + const char **alpn_list; /*!< ordered list of protocols */ +#endif + + /* + * Numerical settings (int then char) + */ + + uint32_t read_timeout; /*!< timeout for mbedtls_ssl_read (ms) */ + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + uint32_t hs_timeout_min; /*!< initial value of the handshake + retransmission timeout (ms) */ + uint32_t hs_timeout_max; /*!< maximum value of the handshake + retransmission timeout (ms) */ +#endif + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + int renego_max_records; /*!< grace period for renegotiation */ + unsigned char renego_period[8]; /*!< value of the record counters + that triggers renegotiation */ +#endif + +#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) + unsigned int badmac_limit; /*!< limit of records with a bad MAC */ +#endif + +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C) + unsigned int dhm_min_bitlen; /*!< min. bit length of the DHM prime */ +#endif + + unsigned char max_major_ver; /*!< max. major version used */ + unsigned char max_minor_ver; /*!< max. minor version used */ + unsigned char min_major_ver; /*!< min. major version used */ + unsigned char min_minor_ver; /*!< min. minor version used */ + + /* + * Flags (bitfields) + */ + + unsigned int endpoint : 1; /*!< 0: client, 1: server */ + unsigned int transport : 1; /*!< stream (TLS) or datagram (DTLS) */ + unsigned int authmode : 2; /*!< MBEDTLS_SSL_VERIFY_XXX */ + /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE */ + unsigned int allow_legacy_renegotiation : 2 ; /*!< MBEDTLS_LEGACY_XXX */ +#if defined(MBEDTLS_ARC4_C) + unsigned int arc4_disabled : 1; /*!< blacklist RC4 ciphersuites? */ +#endif +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + unsigned int mfl_code : 3; /*!< desired fragment length */ +#endif +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + unsigned int encrypt_then_mac : 1 ; /*!< negotiate encrypt-then-mac? */ +#endif +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + unsigned int extended_ms : 1; /*!< negotiate extended master secret? */ +#endif +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + unsigned int anti_replay : 1; /*!< detect and prevent replay? */ +#endif +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) + unsigned int cbc_record_splitting : 1; /*!< do cbc record splitting */ +#endif +#if defined(MBEDTLS_SSL_RENEGOTIATION) + unsigned int disable_renegotiation : 1; /*!< disable renegotiation? */ +#endif +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + unsigned int trunc_hmac : 1; /*!< negotiate truncated hmac? */ +#endif +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + unsigned int session_tickets : 1; /*!< use session tickets? */ +#endif +#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C) + unsigned int fallback : 1; /*!< is this a fallback? */ +#endif +}; + + +struct mbedtls_ssl_context +{ + const mbedtls_ssl_config *conf; /*!< configuration information */ + + /* + * Miscellaneous + */ + int state; /*!< SSL handshake: current state */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) + int renego_status; /*!< Initial, in progress, pending? */ + int renego_records_seen; /*!< Records since renego request, or with DTLS, + number of retransmissions of request if + renego_max_records is < 0 */ +#endif + + int major_ver; /*!< equal to MBEDTLS_SSL_MAJOR_VERSION_3 */ + int minor_ver; /*!< either 0 (SSL3) or 1 (TLS1.0) */ + +#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) + unsigned badmac_seen; /*!< records with a bad MAC received */ +#endif + + /* + * Callbacks + */ + int (*f_send)(void *, const unsigned char *, size_t); + int (*f_recv)(void *, unsigned char *, size_t); + int (*f_recv_timeout)(void *, unsigned char *, size_t, uint32_t); + void *p_bio; /*!< context for I/O operations */ + + /* + * Session layer + */ + mbedtls_ssl_session *session_in; /*!< current session data (in) */ + mbedtls_ssl_session *session_out; /*!< current session data (out) */ + mbedtls_ssl_session *session; /*!< negotiated session data */ + mbedtls_ssl_session *session_negotiate; /*!< session data in negotiation */ + + mbedtls_ssl_handshake_params *handshake; /*!< params required only during + the handshake process */ + + /* + * Record layer transformations + */ + mbedtls_ssl_transform *transform_in; /*!< current transform params (in) */ + mbedtls_ssl_transform *transform_out; /*!< current transform params (in) */ + mbedtls_ssl_transform *transform; /*!< negotiated transform params */ + mbedtls_ssl_transform *transform_negotiate; /*!< transform params in negotiation */ + + /* + * Timers + */ + void *p_timer; /*!< context for the timer callbacks */ + void (*f_set_timer)(void *, uint32_t, uint32_t); /*!< set timer callback */ + int (*f_get_timer)(void *); /*!< get timer callback */ + + /* + * Record layer (incoming data) + */ + unsigned char *in_buf; /*!< input buffer */ + unsigned char *in_ctr; /*!< 64-bit incoming message counter + TLS: maintained by us + DTLS: read from peer */ + unsigned char *in_hdr; /*!< start of record header */ + unsigned char *in_len; /*!< two-bytes message length field */ + unsigned char *in_iv; /*!< ivlen-byte IV */ + unsigned char *in_msg; /*!< message contents (in_iv+ivlen) */ + unsigned char *in_offt; /*!< read offset in application data */ + + int in_msgtype; /*!< record header: message type */ + size_t in_msglen; /*!< record header: message length */ + size_t in_left; /*!< amount of data read so far */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + uint16_t in_epoch; /*!< DTLS epoch for incoming records */ + size_t next_record_offset; /*!< offset of the next record in datagram + (equal to in_left if none) */ +#endif +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + uint64_t in_window_top; /*!< last validated record seq_num */ + uint64_t in_window; /*!< bitmask for replay detection */ +#endif + + size_t in_hslen; /*!< current handshake message length, + including the handshake header */ + int nb_zero; /*!< # of 0-length encrypted messages */ + int record_read; /*!< record is already present */ + + /* + * Record layer (outgoing data) + */ + unsigned char *out_buf; /*!< output buffer */ + unsigned char *out_ctr; /*!< 64-bit outgoing message counter */ + unsigned char *out_hdr; /*!< start of record header */ + unsigned char *out_len; /*!< two-bytes message length field */ + unsigned char *out_iv; /*!< ivlen-byte IV */ + unsigned char *out_msg; /*!< message contents (out_iv+ivlen) */ + + int out_msgtype; /*!< record header: message type */ + size_t out_msglen; /*!< record header: message length */ + size_t out_left; /*!< amount of data not yet written */ + +#if defined(MBEDTLS_ZLIB_SUPPORT) + unsigned char *compress_buf; /*!< zlib data buffer */ +#endif +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) + signed char split_done; /*!< current record already splitted? */ +#endif + + /* + * PKI layer + */ + int client_auth; /*!< flag for client auth. */ + + /* + * User settings + */ +#if defined(MBEDTLS_X509_CRT_PARSE_C) + char *hostname; /*!< expected peer CN for verification + (and SNI if available) */ +#endif + +#if defined(MBEDTLS_SSL_ALPN) + const char *alpn_chosen; /*!< negotiated protocol */ +#endif + + /* + * Information for DTLS hello verify + */ +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C) + unsigned char *cli_id; /*!< transport-level ID of the client */ + size_t cli_id_len; /*!< length of cli_id */ +#endif + + /* + * Secure renegotiation + */ + /* needed to know when to send extension on server */ + int secure_renegotiation; /*!< does peer support legacy or + secure renegotiation */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) + size_t verify_data_len; /*!< length of verify data stored */ + char own_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!< previous handshake verify data */ + char peer_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!< previous handshake verify data */ +#endif +}; + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + +#define MBEDTLS_SSL_CHANNEL_OUTBOUND 0 +#define MBEDTLS_SSL_CHANNEL_INBOUND 1 + +extern int (*mbedtls_ssl_hw_record_init)(mbedtls_ssl_context *ssl, + const unsigned char *key_enc, const unsigned char *key_dec, + size_t keylen, + const unsigned char *iv_enc, const unsigned char *iv_dec, + size_t ivlen, + const unsigned char *mac_enc, const unsigned char *mac_dec, + size_t maclen); +extern int (*mbedtls_ssl_hw_record_activate)(mbedtls_ssl_context *ssl, int direction); +extern int (*mbedtls_ssl_hw_record_reset)(mbedtls_ssl_context *ssl); +extern int (*mbedtls_ssl_hw_record_write)(mbedtls_ssl_context *ssl); +extern int (*mbedtls_ssl_hw_record_read)(mbedtls_ssl_context *ssl); +extern int (*mbedtls_ssl_hw_record_finish)(mbedtls_ssl_context *ssl); +#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */ + +/** + * \brief Returns the list of ciphersuites supported by the SSL/TLS module. + * + * \return a statically allocated array of ciphersuites, the last + * entry is 0. + */ +const int *mbedtls_ssl_list_ciphersuites( void ); + +/** + * \brief Return the name of the ciphersuite associated with the + * given ID + * + * \param ciphersuite_id SSL ciphersuite ID + * + * \return a string containing the ciphersuite name + */ +const char *mbedtls_ssl_get_ciphersuite_name( const int ciphersuite_id ); + +/** + * \brief Return the ID of the ciphersuite associated with the + * given name + * + * \param ciphersuite_name SSL ciphersuite name + * + * \return the ID with the ciphersuite or 0 if not found + */ +int mbedtls_ssl_get_ciphersuite_id( const char *ciphersuite_name ); + +/** + * \brief Initialize an SSL context + * Just makes the context ready for mbedtls_ssl_setup() or + * mbedtls_ssl_free() + * + * \param ssl SSL context + */ +void mbedtls_ssl_init( mbedtls_ssl_context *ssl ); + +/** + * \brief Set up an SSL context for use + * + * \note No copy of the configuration context is made, it can be + * shared by many mbedtls_ssl_context structures. + * + * \warning Modifying the conf structure after is has been used in this + * function is unsupported! + * + * \param ssl SSL context + * \param conf SSL configuration to use + * + * \return 0 if successful, or MBEDTLS_ERR_SSL_ALLOC_FAILED if + * memory allocation failed + */ +int mbedtls_ssl_setup( mbedtls_ssl_context *ssl, + const mbedtls_ssl_config *conf ); + +/** + * \brief Reset an already initialized SSL context for re-use + * while retaining application-set variables, function + * pointers and data. + * + * \param ssl SSL context + * \return 0 if successful, or POLASSL_ERR_SSL_MALLOC_FAILED, + MBEDTLS_ERR_SSL_HW_ACCEL_FAILED or + * MBEDTLS_ERR_SSL_COMPRESSION_FAILED + */ +int mbedtls_ssl_session_reset( mbedtls_ssl_context *ssl ); + +/** + * \brief Set the current endpoint type + * + * \param conf SSL configuration + * \param endpoint must be MBEDTLS_SSL_IS_CLIENT or MBEDTLS_SSL_IS_SERVER + */ +void mbedtls_ssl_conf_endpoint( mbedtls_ssl_config *conf, int endpoint ); + +/** + * \brief Set the transport type (TLS or DTLS). + * Default: TLS + * + * \note For DTLS, you must either provide a recv callback that + * doesn't block, or one that handles timeouts, see + * \c mbedtls_ssl_set_bio(). You also need to provide timer + * callbacks with \c mbedtls_ssl_set_timer_cb(). + * + * \param conf SSL configuration + * \param transport transport type: + * MBEDTLS_SSL_TRANSPORT_STREAM for TLS, + * MBEDTLS_SSL_TRANSPORT_DATAGRAM for DTLS. + */ +void mbedtls_ssl_conf_transport( mbedtls_ssl_config *conf, int transport ); + +/** + * \brief Set the certificate verification mode + * Default: NONE on server, REQUIRED on client + * + * \param conf SSL configuration + * \param authmode can be: + * + * MBEDTLS_SSL_VERIFY_NONE: peer certificate is not checked + * (default on server) + * (insecure on client) + * + * MBEDTLS_SSL_VERIFY_OPTIONAL: peer certificate is checked, however the + * handshake continues even if verification failed; + * mbedtls_ssl_get_verify_result() can be called after the + * handshake is complete. + * + * MBEDTLS_SSL_VERIFY_REQUIRED: peer *must* present a valid certificate, + * handshake is aborted if verification failed. + * + * \note On client, MBEDTLS_SSL_VERIFY_REQUIRED is the recommended mode. + * With MBEDTLS_SSL_VERIFY_OPTIONAL, the user needs to call mbedtls_ssl_get_verify_result() at + * the right time(s), which may not be obvious, while REQUIRED always perform + * the verification as soon as possible. For example, REQUIRED was protecting + * against the "triple handshake" attack even before it was found. + */ +void mbedtls_ssl_conf_authmode( mbedtls_ssl_config *conf, int authmode ); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +/** + * \brief Set the verification callback (Optional). + * + * If set, the verify callback is called for each + * certificate in the chain. For implementation + * information, please see \c x509parse_verify() + * + * \param conf SSL configuration + * \param f_vrfy verification function + * \param p_vrfy verification parameter + */ +void mbedtls_ssl_conf_verify( mbedtls_ssl_config *conf, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ); +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +/** + * \brief Set the random number generator callback + * + * \param conf SSL configuration + * \param f_rng RNG function + * \param p_rng RNG parameter + */ +void mbedtls_ssl_conf_rng( mbedtls_ssl_config *conf, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Set the debug callback + * + * The callback has the following argument: + * void * opaque context for the callback + * int debug level + * const char * file name + * int line number + * const char * message + * + * \param conf SSL configuration + * \param f_dbg debug function + * \param p_dbg debug parameter + */ +void mbedtls_ssl_conf_dbg( mbedtls_ssl_config *conf, + void (*f_dbg)(void *, int, const char *, int, const char *), + void *p_dbg ); + +/** + * \brief Set the underlying BIO callbacks for write, read and + * read-with-timeout. + * + * \param ssl SSL context + * \param p_bio parameter (context) shared by BIO callbacks + * \param f_send write callback + * \param f_recv read callback + * \param f_recv_timeout blocking read callback with timeout. + * The last argument is the timeout in milliseconds, + * 0 means no timeout (block forever until a message comes) + * + * \note One of f_recv or f_recv_timeout can be NULL, in which case + * the other is used. If both are non-NULL, f_recv_timeout is + * used and f_recv is ignored (as if it were NULL). + * + * \note The two most common use cases are: + * - non-blocking I/O, f_recv != NULL, f_recv_timeout == NULL + * - blocking I/O, f_recv == NULL, f_recv_timout != NULL + * + * \note For DTLS, you need to provide either a non-NULL + * f_recv_timeout callback, or a f_recv that doesn't block. + */ +void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl, + void *p_bio, + int (*f_send)(void *, const unsigned char *, size_t), + int (*f_recv)(void *, unsigned char *, size_t), + int (*f_recv_timeout)(void *, unsigned char *, size_t, uint32_t) ); + +/** + * \brief Set the timeout period for mbedtls_ssl_read() + * (Default: no timeout.) + * + * \param conf SSL configuration context + * \param timeout Timeout value in milliseconds. + * Use 0 for no timeout (default). + * + * \note With blocking I/O, this will only work if a non-NULL + * \c f_recv_timeout was set with \c mbedtls_ssl_set_bio(). + * With non-blocking I/O, this will only work if timer + * callbacks were set with \c mbedtls_ssl_set_timer_cb(). + * + * \note With non-blocking I/O, you may also skip this function + * altogether and handle timeouts at the application layer. + */ +void mbedtls_ssl_conf_read_timeout( mbedtls_ssl_config *conf, uint32_t timeout ); + +/** + * \brief Set the timer callbacks + * (Mandatory for DTLS.) + * + * \param ssl SSL context + * \param p_timer parameter (context) shared by timer callback + * \param f_set_timer set timer callback + * Accepts an intermediate and a final delay in milliseconcs + * If the final delay is 0, cancels the running timer. + * \param f_get_timer get timer callback. Must return: + * -1 if cancelled + * 0 if none of the delays is expired + * 1 if the intermediate delay only is expired + * 2 if the final delay is expired + */ +void mbedtls_ssl_set_timer_cb( mbedtls_ssl_context *ssl, + void *p_timer, + void (*f_set_timer)(void *, uint32_t int_ms, uint32_t fin_ms), + int (*f_get_timer)(void *) ); + +/** + * \brief Callback type: generate and write session ticket + * + * \note This describes what a callback implementation should do. + * This callback should generate and encrypted and + * authenticated ticket for the session and write it to the + * output buffer. Here, ticket means the opaque ticket part + * of the NewSessionTicket structure of RFC 5077. + * + * \param p_ticket Context for the callback + * \param session SSL session to bo written in the ticket + * \param start Start of the outpur buffer + * \param end End of the output buffer + * \param tlen On exit, holds the length written + * \param lifetime On exit, holds the lifetime of the ticket in seconds + * + * \return 0 if successful, or + * a specific MBEDTLS_ERR_XXX code. + */ +typedef int mbedtls_ssl_ticket_write_t( void *p_ticket, + const mbedtls_ssl_session *session, + unsigned char *start, + const unsigned char *end, + size_t *tlen, + uint32_t *lifetime ); + +#if defined(MBEDTLS_SSL_EXPORT_KEYS) +/** + * \brief Callback type: Export key block and master secret + * + * \note This is required for certain uses of TLS, e.g. EAP-TLS + * (RFC 5216) and Thread. The key pointers are ephemeral and + * therefore must not be stored. The master secret and keys + * should not be used directly except as an input to a key + * derivation function. + * + * \param p_expkey Context for the callback + * \param ms Pointer to master secret (fixed length: 48 bytes) + * \param kb Pointer to key block, see RFC 5246 section 6.3 + * (variable length: 2 * maclen + 2 * keylen + 2 * ivlen). + * \param maclen MAC length + * \param keylen Key length + * \param ivlen IV length + * + * \return 0 if successful, or + * a specific MBEDTLS_ERR_XXX code. + */ +typedef int mbedtls_ssl_export_keys_t( void *p_expkey, + const unsigned char *ms, + const unsigned char *kb, + size_t maclen, + size_t keylen, + size_t ivlen ); +#endif /* MBEDTLS_SSL_EXPORT_KEYS */ + +/** + * \brief Callback type: parse and load session ticket + * + * \note This describes what a callback implementation should do. + * This callback should parse a session ticket as generated + * by the corresponding mbedtls_ssl_ticket_write_t function, + * and, if the ticket is authentic and valid, load the + * session. + * + * \note The implementation is allowed to modify the first len + * bytes of the input buffer, eg to use it as a temporary + * area for the decrypted ticket contents. + * + * \param p_ticket Context for the callback + * \param session SSL session to be loaded + * \param buf Start of the buffer containing the ticket + * \param len Length of the ticket. + * + * \return 0 if successful, or + * MBEDTLS_ERR_SSL_INVALID_MAC if not authentic, or + * MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED if expired, or + * any other non-zero code for other failures. + */ +typedef int mbedtls_ssl_ticket_parse_t( void *p_ticket, + mbedtls_ssl_session *session, + unsigned char *buf, + size_t len ); + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_SRV_C) +/** + * \brief Configure SSL session ticket callbacks (server only). + * (Default: none.) + * + * \note On server, session tickets are enabled by providing + * non-NULL callbacks. + * + * \note On client, use \c mbedtls_ssl_conf_session_tickets(). + * + * \param conf SSL configuration context + * \param f_ticket_write Callback for writing a ticket + * \param f_ticket_parse Callback for parsing a ticket + * \param p_ticket Context shared by the two callbacks + */ +void mbedtls_ssl_conf_session_tickets_cb( mbedtls_ssl_config *conf, + mbedtls_ssl_ticket_write_t *f_ticket_write, + mbedtls_ssl_ticket_parse_t *f_ticket_parse, + void *p_ticket ); +#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_SRV_C */ + +#if defined(MBEDTLS_SSL_EXPORT_KEYS) +/** + * \brief Configure key export callback. + * (Default: none.) + * + * \note See \c mbedtls_ssl_export_keys_t. + * + * \param conf SSL configuration context + * \param f_export_keys Callback for exporting keys + * \param p_export_keys Context for the callback + */ +void mbedtls_ssl_conf_export_keys_cb( mbedtls_ssl_config *conf, + mbedtls_ssl_export_keys_t *f_export_keys, + void *p_export_keys ); +#endif /* MBEDTLS_SSL_EXPORT_KEYS */ + +/** + * \brief Callback type: generate a cookie + * + * \param ctx Context for the callback + * \param p Buffer to write to, + * must be updated to point right after the cookie + * \param end Pointer to one past the end of the output buffer + * \param info Client ID info that was passed to + * \c mbedtls_ssl_set_client_transport_id() + * \param ilen Length of info in bytes + * + * \return The callback must return 0 on success, + * or a negative error code. + */ +typedef int mbedtls_ssl_cookie_write_t( void *ctx, + unsigned char **p, unsigned char *end, + const unsigned char *info, size_t ilen ); + +/** + * \brief Callback type: verify a cookie + * + * \param ctx Context for the callback + * \param cookie Cookie to verify + * \param clen Length of cookie + * \param info Client ID info that was passed to + * \c mbedtls_ssl_set_client_transport_id() + * \param ilen Length of info in bytes + * + * \return The callback must return 0 if cookie is valid, + * or a negative error code. + */ +typedef int mbedtls_ssl_cookie_check_t( void *ctx, + const unsigned char *cookie, size_t clen, + const unsigned char *info, size_t ilen ); + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C) +/** + * \brief Register callbacks for DTLS cookies + * (Server only. DTLS only.) + * + * Default: dummy callbacks that fail, in order to force you to + * register working callbacks (and initialize their context). + * + * To disable HelloVerifyRequest, register NULL callbacks. + * + * \warning Disabling hello verification allows your server to be used + * for amplification in DoS attacks against other hosts. + * Only disable if you known this can't happen in your + * particular environment. + * + * \note See comments on \c mbedtls_ssl_handshake() about handling + * the MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED that is expected + * on the first handshake attempt when this is enabled. + * + * \note This is also necessary to handle client reconnection from + * the same port as described in RFC 6347 section 4.2.8 (only + * the variant with cookies is supported currently). See + * comments on \c mbedtls_ssl_read() for details. + * + * \param conf SSL configuration + * \param f_cookie_write Cookie write callback + * \param f_cookie_check Cookie check callback + * \param p_cookie Context for both callbacks + */ +void mbedtls_ssl_conf_dtls_cookies( mbedtls_ssl_config *conf, + mbedtls_ssl_cookie_write_t *f_cookie_write, + mbedtls_ssl_cookie_check_t *f_cookie_check, + void *p_cookie ); + +/** + * \brief Set client's transport-level identification info. + * (Server only. DTLS only.) + * + * This is usually the IP address (and port), but could be + * anything identify the client depending on the underlying + * network stack. Used for HelloVerifyRequest with DTLS. + * This is *not* used to route the actual packets. + * + * \param ssl SSL context + * \param info Transport-level info identifying the client (eg IP + port) + * \param ilen Length of info in bytes + * + * \note An internal copy is made, so the info buffer can be reused. + * + * \return 0 on success, + * MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used on client, + * MBEDTLS_ERR_SSL_ALLOC_FAILED if out of memory. + */ +int mbedtls_ssl_set_client_transport_id( mbedtls_ssl_context *ssl, + const unsigned char *info, + size_t ilen ); + +#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY && MBEDTLS_SSL_SRV_C */ + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) +/** + * \brief Enable or disable anti-replay protection for DTLS. + * (DTLS only, no effect on TLS.) + * Default: enabled. + * + * \param conf SSL configuration + * \param mode MBEDTLS_SSL_ANTI_REPLAY_ENABLED or MBEDTLS_SSL_ANTI_REPLAY_DISABLED. + * + * \warning Disabling this is a security risk unless the application + * protocol handles duplicated packets in a safe way. You + * should not disable this without careful consideration. + * However, if your application already detects duplicated + * packets and needs information about them to adjust its + * transmission strategy, then you'll want to disable this. + */ +void mbedtls_ssl_conf_dtls_anti_replay( mbedtls_ssl_config *conf, char mode ); +#endif /* MBEDTLS_SSL_DTLS_ANTI_REPLAY */ + +#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) +/** + * \brief Set a limit on the number of records with a bad MAC + * before terminating the connection. + * (DTLS only, no effect on TLS.) + * Default: 0 (disabled). + * + * \param conf SSL configuration + * \param limit Limit, or 0 to disable. + * + * \note If the limit is N, then the connection is terminated when + * the Nth non-authentic record is seen. + * + * \note Records with an invalid header are not counted, only the + * ones going through the authentication-decryption phase. + * + * \note This is a security trade-off related to the fact that it's + * often relatively easy for an active attacker ot inject UDP + * datagrams. On one hand, setting a low limit here makes it + * easier for such an attacker to forcibly terminated a + * connection. On the other hand, a high limit or no limit + * might make us waste resources checking authentication on + * many bogus packets. + */ +void mbedtls_ssl_conf_dtls_badmac_limit( mbedtls_ssl_config *conf, unsigned limit ); +#endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */ + +#if defined(MBEDTLS_SSL_PROTO_DTLS) +/** + * \brief Set retransmit timeout values for the DTLS handshale. + * (DTLS only, no effect on TLS.) + * + * \param conf SSL configuration + * \param min Initial timeout value in milliseconds. + * Default: 1000 (1 second). + * \param max Maximum timeout value in milliseconds. + * Default: 60000 (60 seconds). + * + * \note Default values are from RFC 6347 section 4.2.4.1. + * + * \note Higher values for initial timeout may increase average + * handshake latency. Lower values may increase the risk of + * network congestion by causing more retransmissions. + */ +void mbedtls_ssl_conf_handshake_timeout( mbedtls_ssl_config *conf, uint32_t min, uint32_t max ); +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + +#if defined(MBEDTLS_SSL_SRV_C) +/** + * \brief Set the session cache callbacks (server-side only) + * If not set, no session resuming is done (except if session + * tickets are enabled too). + * + * The session cache has the responsibility to check for stale + * entries based on timeout. See RFC 5246 for recommendations. + * + * Warning: session.peer_cert is cleared by the SSL/TLS layer on + * connection shutdown, so do not cache the pointer! Either set + * it to NULL or make a full copy of the certificate. + * + * The get callback is called once during the initial handshake + * to enable session resuming. The get function has the + * following parameters: (void *parameter, mbedtls_ssl_session *session) + * If a valid entry is found, it should fill the master of + * the session object with the cached values and return 0, + * return 1 otherwise. Optionally peer_cert can be set as well + * if it is properly present in cache entry. + * + * The set callback is called once during the initial handshake + * to enable session resuming after the entire handshake has + * been finished. The set function has the following parameters: + * (void *parameter, const mbedtls_ssl_session *session). The function + * should create a cache entry for future retrieval based on + * the data in the session structure and should keep in mind + * that the mbedtls_ssl_session object presented (and all its referenced + * data) is cleared by the SSL/TLS layer when the connection is + * terminated. It is recommended to add metadata to determine if + * an entry is still valid in the future. Return 0 if + * successfully cached, return 1 otherwise. + * + * \param conf SSL configuration + * \param p_cache parmater (context) for both callbacks + * \param f_get_cache session get callback + * \param f_set_cache session set callback + */ +void mbedtls_ssl_conf_session_cache( mbedtls_ssl_config *conf, + void *p_cache, + int (*f_get_cache)(void *, mbedtls_ssl_session *), + int (*f_set_cache)(void *, const mbedtls_ssl_session *) ); +#endif /* MBEDTLS_SSL_SRV_C */ + +#if defined(MBEDTLS_SSL_CLI_C) +/** + * \brief Request resumption of session (client-side only) + * Session data is copied from presented session structure. + * + * \param ssl SSL context + * \param session session context + * + * \return 0 if successful, + * MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used server-side or + * arguments are otherwise invalid + * + * \sa mbedtls_ssl_get_session() + */ +int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session *session ); +#endif /* MBEDTLS_SSL_CLI_C */ + +/** + * \brief Set the list of allowed ciphersuites and the preference + * order. First in the list has the highest preference. + * (Overrides all version specific lists) + * + * The ciphersuites array is not copied, and must remain + * valid for the lifetime of the ssl_config. + * + * Note: The server uses its own preferences + * over the preference of the client unless + * MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE is defined! + * + * \param conf SSL configuration + * \param ciphersuites 0-terminated list of allowed ciphersuites + */ +void mbedtls_ssl_conf_ciphersuites( mbedtls_ssl_config *conf, + const int *ciphersuites ); + +/** + * \brief Set the list of allowed ciphersuites and the + * preference order for a specific version of the protocol. + * (Only useful on the server side) + * + * The ciphersuites array is not copied, and must remain + * valid for the lifetime of the ssl_config. + * + * \param conf SSL configuration + * \param ciphersuites 0-terminated list of allowed ciphersuites + * \param major Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3 + * supported) + * \param minor Minor version number (MBEDTLS_SSL_MINOR_VERSION_0, + * MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2, + * MBEDTLS_SSL_MINOR_VERSION_3 supported) + * + * \note With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0 + * and MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2 + */ +void mbedtls_ssl_conf_ciphersuites_for_version( mbedtls_ssl_config *conf, + const int *ciphersuites, + int major, int minor ); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +/** + * \brief Set the X.509 security profile used for verification + * + * \note The restrictions are enforced for all certificates in the + * chain. However, signatures in the handshake are not covered + * by this setting but by \b mbedtls_ssl_conf_sig_hashes(). + * + * \param conf SSL configuration + * \param profile Profile to use + */ +void mbedtls_ssl_conf_cert_profile( mbedtls_ssl_config *conf, + const mbedtls_x509_crt_profile *profile ); + +/** + * \brief Set the data required to verify peer certificate + * + * \param conf SSL configuration + * \param ca_chain trusted CA chain (meaning all fully trusted top-level CAs) + * \param ca_crl trusted CA CRLs + */ +void mbedtls_ssl_conf_ca_chain( mbedtls_ssl_config *conf, + mbedtls_x509_crt *ca_chain, + mbedtls_x509_crl *ca_crl ); + +/** + * \brief Set own certificate chain and private key + * + * \note own_cert should contain in order from the bottom up your + * certificate chain. The top certificate (self-signed) + * can be omitted. + * + * \note On server, this function can be called multiple times to + * provision more than one cert/key pair (eg one ECDSA, one + * RSA with SHA-256, one RSA with SHA-1). An adequate + * certificate will be selected according to the client's + * advertised capabilities. In case mutliple certificates are + * adequate, preference is given to the one set by the first + * call to this function, then second, etc. + * + * \note On client, only the first call has any effect. + * + * \param conf SSL configuration + * \param own_cert own public certificate chain + * \param pk_key own private key + * + * \return 0 on success or MBEDTLS_ERR_SSL_ALLOC_FAILED + */ +int mbedtls_ssl_conf_own_cert( mbedtls_ssl_config *conf, + mbedtls_x509_crt *own_cert, + mbedtls_pk_context *pk_key ); +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) +/** + * \brief Set the Pre Shared Key (PSK) and the expected identity name + * + * \note This is mainly useful for clients. Servers will usually + * want to use \c mbedtls_ssl_conf_psk_cb() instead. + * + * \param conf SSL configuration + * \param psk pointer to the pre-shared key + * \param psk_len pre-shared key length + * \param psk_identity pointer to the pre-shared key identity + * \param psk_identity_len identity key length + * + * \return 0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED + */ +int mbedtls_ssl_conf_psk( mbedtls_ssl_config *conf, + const unsigned char *psk, size_t psk_len, + const unsigned char *psk_identity, size_t psk_identity_len ); + + +/** + * \brief Set the Pre Shared Key (PSK) for the current handshake + * + * \note This should only be called inside the PSK callback, + * ie the function passed to \c mbedtls_ssl_conf_psk_cb(). + * + * \param ssl SSL context + * \param psk pointer to the pre-shared key + * \param psk_len pre-shared key length + * + * \return 0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED + */ +int mbedtls_ssl_set_hs_psk( mbedtls_ssl_context *ssl, + const unsigned char *psk, size_t psk_len ); + +/** + * \brief Set the PSK callback (server-side only). + * + * If set, the PSK callback is called for each + * handshake where a PSK ciphersuite was negotiated. + * The caller provides the identity received and wants to + * receive the actual PSK data and length. + * + * The callback has the following parameters: (void *parameter, + * mbedtls_ssl_context *ssl, const unsigned char *psk_identity, + * size_t identity_len) + * If a valid PSK identity is found, the callback should use + * \c mbedtls_ssl_set_hs_psk() on the ssl context to set the + * correct PSK and return 0. + * Any other return value will result in a denied PSK identity. + * + * \note If you set a PSK callback using this function, then you + * don't need to set a PSK key and identity using + * \c mbedtls_ssl_conf_psk(). + * + * \param conf SSL configuration + * \param f_psk PSK identity function + * \param p_psk PSK identity parameter + */ +void mbedtls_ssl_conf_psk_cb( mbedtls_ssl_config *conf, + int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, + size_t), + void *p_psk ); +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ + +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C) +/** + * \brief Set the Diffie-Hellman public P and G values, + * read as hexadecimal strings (server-side only) + * (Default: MBEDTLS_DHM_RFC5114_MODP_2048_[PG]) + * + * \param conf SSL configuration + * \param dhm_P Diffie-Hellman-Merkle modulus + * \param dhm_G Diffie-Hellman-Merkle generator + * + * \return 0 if successful + */ +int mbedtls_ssl_conf_dh_param( mbedtls_ssl_config *conf, const char *dhm_P, const char *dhm_G ); + +/** + * \brief Set the Diffie-Hellman public P and G values, + * read from existing context (server-side only) + * + * \param conf SSL configuration + * \param dhm_ctx Diffie-Hellman-Merkle context + * + * \return 0 if successful + */ +int mbedtls_ssl_conf_dh_param_ctx( mbedtls_ssl_config *conf, mbedtls_dhm_context *dhm_ctx ); +#endif /* MBEDTLS_DHM_C && defined(MBEDTLS_SSL_SRV_C) */ + +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C) +/** + * \brief Set the minimum length for Diffie-Hellman parameters. + * (Client-side only.) + * (Default: 1024 bits.) + * + * \param conf SSL configuration + * \param bitlen Minimum bit length of the DHM prime + */ +void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf, + unsigned int bitlen ); +#endif /* MBEDTLS_DHM_C && MBEDTLS_SSL_CLI_C */ + +#if defined(MBEDTLS_ECP_C) +/** + * \brief Set the allowed curves in order of preference. + * (Default: all defined curves.) + * + * On server: this only affects selection of the ECDHE curve; + * the curves used for ECDH and ECDSA are determined by the + * list of available certificates instead. + * + * On client: this affects the list of curves offered for any + * use. The server can override our preference order. + * + * Both sides: limits the set of curves accepted for use in + * ECDHE and in the peer's end-entity certificate. + * + * \note This has no influence on which curves are allowed inside the + * certificate chains, see \c mbedtls_ssl_conf_cert_profile() + * for that. For the end-entity certificate however, the key + * will be accepted only if it is allowed both by this list + * and by the cert profile. + * + * \note This list should be ordered by decreasing preference + * (preferred curve first). + * + * \param conf SSL configuration + * \param curves Ordered list of allowed curves, + * terminated by MBEDTLS_ECP_DP_NONE. + */ +void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf, + const mbedtls_ecp_group_id *curves ); +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +/** + * \brief Set the allowed hashes for signatures during the handshake. + * (Default: all available hashes except MD5.) + * + * \note This only affects which hashes are offered and can be used + * for signatures during the handshake. Hashes for message + * authentication and the TLS PRF are controlled by the + * ciphersuite, see \c mbedtls_ssl_conf_ciphersuites(). Hashes + * used for certificate signature are controlled by the + * verification profile, see \c mbedtls_ssl_conf_cert_profile(). + * + * \note This list should be ordered by decreasing preference + * (preferred hash first). + * + * \param conf SSL configuration + * \param hashes Ordered list of allowed signature hashes, + * terminated by \c MBEDTLS_MD_NONE. + */ +void mbedtls_ssl_conf_sig_hashes( mbedtls_ssl_config *conf, + const int *hashes ); +#endif /* MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */ + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +/** + * \brief Set hostname for ServerName TLS extension + * (client-side only) + * + * + * \param ssl SSL context + * \param hostname the server hostname + * + * \return 0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED + */ +int mbedtls_ssl_set_hostname( mbedtls_ssl_context *ssl, const char *hostname ); +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) +/** + * \brief Set own certificate and key for the current handshake + * + * \note Same as \c mbedtls_ssl_conf_own_cert() but for use within + * the SNI callback. + * + * \param ssl SSL context + * \param own_cert own public certificate chain + * \param pk_key own private key + * + * \return 0 on success or MBEDTLS_ERR_SSL_ALLOC_FAILED + */ +int mbedtls_ssl_set_hs_own_cert( mbedtls_ssl_context *ssl, + mbedtls_x509_crt *own_cert, + mbedtls_pk_context *pk_key ); + +/** + * \brief Set the data required to verify peer certificate for the + * current handshake + * + * \note Same as \c mbedtls_ssl_conf_ca_chain() but for use within + * the SNI callback. + * + * \param ssl SSL context + * \param ca_chain trusted CA chain (meaning all fully trusted top-level CAs) + * \param ca_crl trusted CA CRLs + */ +void mbedtls_ssl_set_hs_ca_chain( mbedtls_ssl_context *ssl, + mbedtls_x509_crt *ca_chain, + mbedtls_x509_crl *ca_crl ); + +/** + * \brief Set authmode for the current handshake. + * + * \note Same as \c mbedtls_ssl_conf_authmode() but for use within + * the SNI callback. + * + * \param ssl SSL context + * \param authmode MBEDTLS_SSL_VERIFY_NONE, MBEDTLS_SSL_VERIFY_OPTIONAL or + * MBEDTLS_SSL_VERIFY_REQUIRED + */ +void mbedtls_ssl_set_hs_authmode( mbedtls_ssl_context *ssl, + int authmode ); + +/** + * \brief Set server side ServerName TLS extension callback + * (optional, server-side only). + * + * If set, the ServerName callback is called whenever the + * server receives a ServerName TLS extension from the client + * during a handshake. The ServerName callback has the + * following parameters: (void *parameter, mbedtls_ssl_context *ssl, + * const unsigned char *hostname, size_t len). If a suitable + * certificate is found, the callback must set the + * certificate(s) and key(s) to use with \c + * mbedtls_ssl_set_hs_own_cert() (can be called repeatedly), + * and may optionally adjust the CA and associated CRL with \c + * mbedtls_ssl_set_hs_ca_chain() as well as the client + * authentication mode with \c mbedtls_ssl_set_hs_authmode(), + * then must return 0. If no matching name is found, the + * callback must either set a default cert, or + * return non-zero to abort the handshake at this point. + * + * \param conf SSL configuration + * \param f_sni verification function + * \param p_sni verification parameter + */ +void mbedtls_ssl_conf_sni( mbedtls_ssl_config *conf, + int (*f_sni)(void *, mbedtls_ssl_context *, const unsigned char *, + size_t), + void *p_sni ); +#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +/** + * \brief Set the EC J-PAKE password for current handshake. + * + * \note An internal copy is made, and destroyed as soon as the + * handshake is completed, or when the SSL context is reset or + * freed. + * + * \note The SSL context needs to be already set up. The right place + * to call this function is between \c mbedtls_ssl_setup() or + * \c mbedtls_ssl_reset() and \c mbedtls_ssl_handshake(). + * + * \param ssl SSL context + * \param pw EC J-PAKE password (pre-shared secret) + * \param pw_len length of pw in bytes + * + * \return 0 on success, or a negative error code. + */ +int mbedtls_ssl_set_hs_ecjpake_password( mbedtls_ssl_context *ssl, + const unsigned char *pw, + size_t pw_len ); +#endif /*MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_SSL_ALPN) +/** + * \brief Set the supported Application Layer Protocols. + * + * \param conf SSL configuration + * \param protos NULL-terminated list of supported protocols, + * in decreasing preference order. + * + * \return 0 on success, or MBEDTLS_ERR_SSL_BAD_INPUT_DATA. + */ +int mbedtls_ssl_conf_alpn_protocols( mbedtls_ssl_config *conf, const char **protos ); + +/** + * \brief Get the name of the negotiated Application Layer Protocol. + * This function should be called after the handshake is + * completed. + * + * \param ssl SSL context + * + * \return Protcol name, or NULL if no protocol was negotiated. + */ +const char *mbedtls_ssl_get_alpn_protocol( const mbedtls_ssl_context *ssl ); +#endif /* MBEDTLS_SSL_ALPN */ + +/** + * \brief Set the maximum supported version sent from the client side + * and/or accepted at the server side + * (Default: MBEDTLS_SSL_MAX_MAJOR_VERSION, MBEDTLS_SSL_MAX_MINOR_VERSION) + * + * \note This ignores ciphersuites from higher versions. + * + * \note With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0 and + * MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2 + * + * \param conf SSL configuration + * \param major Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3 supported) + * \param minor Minor version number (MBEDTLS_SSL_MINOR_VERSION_0, + * MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2, + * MBEDTLS_SSL_MINOR_VERSION_3 supported) + */ +void mbedtls_ssl_conf_max_version( mbedtls_ssl_config *conf, int major, int minor ); + +/** + * \brief Set the minimum accepted SSL/TLS protocol version + * (Default: TLS 1.0) + * + * \note Input outside of the SSL_MAX_XXXXX_VERSION and + * SSL_MIN_XXXXX_VERSION range is ignored. + * + * \note MBEDTLS_SSL_MINOR_VERSION_0 (SSL v3) should be avoided. + * + * \note With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0 and + * MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2 + * + * \param conf SSL configuration + * \param major Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3 supported) + * \param minor Minor version number (MBEDTLS_SSL_MINOR_VERSION_0, + * MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2, + * MBEDTLS_SSL_MINOR_VERSION_3 supported) + */ +void mbedtls_ssl_conf_min_version( mbedtls_ssl_config *conf, int major, int minor ); + +#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C) +/** + * \brief Set the fallback flag (client-side only). + * (Default: MBEDTLS_SSL_IS_NOT_FALLBACK). + * + * \note Set to MBEDTLS_SSL_IS_FALLBACK when preparing a fallback + * connection, that is a connection with max_version set to a + * lower value than the value you're willing to use. Such + * fallback connections are not recommended but are sometimes + * necessary to interoperate with buggy (version-intolerant) + * servers. + * + * \warning You should NOT set this to MBEDTLS_SSL_IS_FALLBACK for + * non-fallback connections! This would appear to work for a + * while, then cause failures when the server is upgraded to + * support a newer TLS version. + * + * \param conf SSL configuration + * \param fallback MBEDTLS_SSL_IS_NOT_FALLBACK or MBEDTLS_SSL_IS_FALLBACK + */ +void mbedtls_ssl_conf_fallback( mbedtls_ssl_config *conf, char fallback ); +#endif /* MBEDTLS_SSL_FALLBACK_SCSV && MBEDTLS_SSL_CLI_C */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) +/** + * \brief Enable or disable Encrypt-then-MAC + * (Default: MBEDTLS_SSL_ETM_ENABLED) + * + * \note This should always be enabled, it is a security + * improvement, and should not cause any interoperability + * issue (used only if the peer supports it too). + * + * \param conf SSL configuration + * \param etm MBEDTLS_SSL_ETM_ENABLED or MBEDTLS_SSL_ETM_DISABLED + */ +void mbedtls_ssl_conf_encrypt_then_mac( mbedtls_ssl_config *conf, char etm ); +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) +/** + * \brief Enable or disable Extended Master Secret negotiation. + * (Default: MBEDTLS_SSL_EXTENDED_MS_ENABLED) + * + * \note This should always be enabled, it is a security fix to the + * protocol, and should not cause any interoperability issue + * (used only if the peer supports it too). + * + * \param conf SSL configuration + * \param ems MBEDTLS_SSL_EXTENDED_MS_ENABLED or MBEDTLS_SSL_EXTENDED_MS_DISABLED + */ +void mbedtls_ssl_conf_extended_master_secret( mbedtls_ssl_config *conf, char ems ); +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ + +#if defined(MBEDTLS_ARC4_C) +/** + * \brief Disable or enable support for RC4 + * (Default: MBEDTLS_SSL_ARC4_DISABLED) + * + * \warning Use of RC4 in (D)TLS has been prohibited by RFC ???? + * for security reasons. Use at your own risks. + * + * \note This function will likely be removed in future versions as + * RC4 will then be disabled by default at compile time. + * + * \param conf SSL configuration + * \param arc4 MBEDTLS_SSL_ARC4_ENABLED or MBEDTLS_SSL_ARC4_DISABLED + */ +void mbedtls_ssl_conf_arc4_support( mbedtls_ssl_config *conf, char arc4 ); +#endif /* MBEDTLS_ARC4_C */ + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +/** + * \brief Set the maximum fragment length to emit and/or negotiate + * (Default: MBEDTLS_SSL_MAX_CONTENT_LEN, usually 2^14 bytes) + * (Server: set maximum fragment length to emit, + * usually negotiated by the client during handshake + * (Client: set maximum fragment length to emit *and* + * negotiate with the server during handshake) + * + * \param conf SSL configuration + * \param mfl_code Code for maximum fragment length (allowed values: + * MBEDTLS_SSL_MAX_FRAG_LEN_512, MBEDTLS_SSL_MAX_FRAG_LEN_1024, + * MBEDTLS_SSL_MAX_FRAG_LEN_2048, MBEDTLS_SSL_MAX_FRAG_LEN_4096) + * + * \return 0 if successful or MBEDTLS_ERR_SSL_BAD_INPUT_DATA + */ +int mbedtls_ssl_conf_max_frag_len( mbedtls_ssl_config *conf, unsigned char mfl_code ); +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) +/** + * \brief Activate negotiation of truncated HMAC + * (Default: MBEDTLS_SSL_TRUNC_HMAC_DISABLED) + * + * \param conf SSL configuration + * \param truncate Enable or disable (MBEDTLS_SSL_TRUNC_HMAC_ENABLED or + * MBEDTLS_SSL_TRUNC_HMAC_DISABLED) + */ +void mbedtls_ssl_conf_truncated_hmac( mbedtls_ssl_config *conf, int truncate ); +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) +/** + * \brief Enable / Disable 1/n-1 record splitting + * (Default: MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED) + * + * \note Only affects SSLv3 and TLS 1.0, not higher versions. + * Does not affect non-CBC ciphersuites in any version. + * + * \param conf SSL configuration + * \param split MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED or + * MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED + */ +void mbedtls_ssl_conf_cbc_record_splitting( mbedtls_ssl_config *conf, char split ); +#endif /* MBEDTLS_SSL_CBC_RECORD_SPLITTING */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C) +/** + * \brief Enable / Disable session tickets (client only). + * (Default: MBEDTLS_SSL_SESSION_TICKETS_ENABLED.) + * + * \note On server, use \c mbedtls_ssl_conf_session_tickets_cb(). + * + * \param conf SSL configuration + * \param use_tickets Enable or disable (MBEDTLS_SSL_SESSION_TICKETS_ENABLED or + * MBEDTLS_SSL_SESSION_TICKETS_DISABLED) + */ +void mbedtls_ssl_conf_session_tickets( mbedtls_ssl_config *conf, int use_tickets ); +#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */ + +#if defined(MBEDTLS_SSL_RENEGOTIATION) +/** + * \brief Enable / Disable renegotiation support for connection when + * initiated by peer + * (Default: MBEDTLS_SSL_RENEGOTIATION_DISABLED) + * + * \warning It is recommended to always disable renegotation unless you + * know you need it and you know what you're doing. In the + * past, there has been several issues associated with + * renegotiation or a poor understanding of its properties. + * + * \note Server-side, enabling renegotiation also makes the server + * susceptible to a resource DoS by a malicious client. + * + * \param conf SSL configuration + * \param renegotiation Enable or disable (MBEDTLS_SSL_RENEGOTIATION_ENABLED or + * MBEDTLS_SSL_RENEGOTIATION_DISABLED) + */ +void mbedtls_ssl_conf_renegotiation( mbedtls_ssl_config *conf, int renegotiation ); +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + +/** + * \brief Prevent or allow legacy renegotiation. + * (Default: MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION) + * + * MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION allows connections to + * be established even if the peer does not support + * secure renegotiation, but does not allow renegotiation + * to take place if not secure. + * (Interoperable and secure option) + * + * MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION allows renegotiations + * with non-upgraded peers. Allowing legacy renegotiation + * makes the connection vulnerable to specific man in the + * middle attacks. (See RFC 5746) + * (Most interoperable and least secure option) + * + * MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE breaks off connections + * if peer does not support secure renegotiation. Results + * in interoperability issues with non-upgraded peers + * that do not support renegotiation altogether. + * (Most secure option, interoperability issues) + * + * \param conf SSL configuration + * \param allow_legacy Prevent or allow (SSL_NO_LEGACY_RENEGOTIATION, + * SSL_ALLOW_LEGACY_RENEGOTIATION or + * MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE) + */ +void mbedtls_ssl_conf_legacy_renegotiation( mbedtls_ssl_config *conf, int allow_legacy ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) +/** + * \brief Enforce renegotiation requests. + * (Default: enforced, max_records = 16) + * + * When we request a renegotiation, the peer can comply or + * ignore the request. This function allows us to decide + * whether to enforce our renegotiation requests by closing + * the connection if the peer doesn't comply. + * + * However, records could already be in transit from the peer + * when the request is emitted. In order to increase + * reliability, we can accept a number of records before the + * expected handshake records. + * + * The optimal value is highly dependent on the specific usage + * scenario. + * + * \note With DTLS and server-initiated renegotiation, the + * HelloRequest is retransmited every time mbedtls_ssl_read() times + * out or receives Application Data, until: + * - max_records records have beens seen, if it is >= 0, or + * - the number of retransmits that would happen during an + * actual handshake has been reached. + * Please remember the request might be lost a few times + * if you consider setting max_records to a really low value. + * + * \warning On client, the grace period can only happen during + * mbedtls_ssl_read(), as opposed to mbedtls_ssl_write() and mbedtls_ssl_renegotiate() + * which always behave as if max_record was 0. The reason is, + * if we receive application data from the server, we need a + * place to write it, which only happens during mbedtls_ssl_read(). + * + * \param conf SSL configuration + * \param max_records Use MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED if you don't want to + * enforce renegotiation, or a non-negative value to enforce + * it but allow for a grace period of max_records records. + */ +void mbedtls_ssl_conf_renegotiation_enforced( mbedtls_ssl_config *conf, int max_records ); + +/** + * \brief Set record counter threshold for periodic renegotiation. + * (Default: 2^64 - 256.) + * + * Renegotiation is automatically triggered when a record + * counter (outgoing or ingoing) crosses the defined + * threshold. The default value is meant to prevent the + * connection from being closed when the counter is about to + * reached its maximal value (it is not allowed to wrap). + * + * Lower values can be used to enforce policies such as "keys + * must be refreshed every N packets with cipher X". + * + * \param conf SSL configuration + * \param period The threshold value: a big-endian 64-bit number. + * Set to 2^64 - 1 to disable periodic renegotiation + */ +void mbedtls_ssl_conf_renegotiation_period( mbedtls_ssl_config *conf, + const unsigned char period[8] ); +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + +/** + * \brief Return the number of data bytes available to read + * + * \param ssl SSL context + * + * \return how many bytes are available in the read buffer + */ +size_t mbedtls_ssl_get_bytes_avail( const mbedtls_ssl_context *ssl ); + +/** + * \brief Return the result of the certificate verification + * + * \param ssl SSL context + * + * \return 0 if successful, + * -1 if result is not available (eg because the handshake was + * aborted too early), or + * a combination of BADCERT_xxx and BADCRL_xxx flags, see + * x509.h + */ +uint32_t mbedtls_ssl_get_verify_result( const mbedtls_ssl_context *ssl ); + +/** + * \brief Return the name of the current ciphersuite + * + * \param ssl SSL context + * + * \return a string containing the ciphersuite name + */ +const char *mbedtls_ssl_get_ciphersuite( const mbedtls_ssl_context *ssl ); + +/** + * \brief Return the current SSL version (SSLv3/TLSv1/etc) + * + * \param ssl SSL context + * + * \return a string containing the SSL version + */ +const char *mbedtls_ssl_get_version( const mbedtls_ssl_context *ssl ); + +/** + * \brief Return the (maximum) number of bytes added by the record + * layer: header + encryption/MAC overhead (inc. padding) + * + * \param ssl SSL context + * + * \return Current maximum record expansion in bytes, or + * MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE if compression is + * enabled, which makes expansion much less predictable + */ +int mbedtls_ssl_get_record_expansion( const mbedtls_ssl_context *ssl ); + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +/** + * \brief Return the maximum fragment length (payload, in bytes). + * This is the value negotiated with peer if any, + * or the locally configured value. + * + * \note With DTLS, \c mbedtls_ssl_write() will return an error if + * called with a larger length value. + * With TLS, \c mbedtls_ssl_write() will fragment the input if + * necessary and return the number of bytes written; it is up + * to the caller to call \c mbedtls_ssl_write() again in + * order to send the remaining bytes if any. + * + * \param ssl SSL context + * + * \return Current maximum fragment length. + */ +size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl ); +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +/** + * \brief Return the peer certificate from the current connection + * + * Note: Can be NULL in case no certificate was sent during + * the handshake. Different calls for the same connection can + * return the same or different pointers for the same + * certificate and even a different certificate altogether. + * The peer cert CAN change in a single connection if + * renegotiation is performed. + * + * \param ssl SSL context + * + * \return the current peer certificate + */ +const mbedtls_x509_crt *mbedtls_ssl_get_peer_cert( const mbedtls_ssl_context *ssl ); +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_SSL_CLI_C) +/** + * \brief Save session in order to resume it later (client-side only) + * Session data is copied to presented session structure. + * + * \warning Currently, peer certificate is lost in the operation. + * + * \param ssl SSL context + * \param session session context + * + * \return 0 if successful, + * MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed, + * MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used server-side or + * arguments are otherwise invalid + * + * \sa mbedtls_ssl_set_session() + */ +int mbedtls_ssl_get_session( const mbedtls_ssl_context *ssl, mbedtls_ssl_session *session ); +#endif /* MBEDTLS_SSL_CLI_C */ + +/** + * \brief Perform the SSL handshake + * + * \param ssl SSL context + * + * \return 0 if successful, or + * MBEDTLS_ERR_SSL_WANT_READ or MBEDTLS_ERR_SSL_WANT_WRITE, or + * MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED (see below), or + * a specific SSL error code. + * + * \note If this function returns something other than 0 or + * MBEDTLS_ERR_SSL_WANT_READ/WRITE, then the ssl context + * becomes unusable, and you should either free it or call + * \c mbedtls_ssl_session_reset() on it before re-using it for + * a new connection; the current connection must be closed. + * + * \note If DTLS is in use, then you may choose to handle + * MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED specially for logging + * purposes, as it is an expected return value rather than an + * actual error, but you still need to reset/free the context. + */ +int mbedtls_ssl_handshake( mbedtls_ssl_context *ssl ); + +/** + * \brief Perform a single step of the SSL handshake + * + * \note The state of the context (ssl->state) will be at + * the following state after execution of this function. + * Do not call this function if state is MBEDTLS_SSL_HANDSHAKE_OVER. + * + * \note If this function returns something other than 0 or + * MBEDTLS_ERR_SSL_WANT_READ/WRITE, then the ssl context + * becomes unusable, and you should either free it or call + * \c mbedtls_ssl_session_reset() on it before re-using it for + * a new connection; the current connection must be closed. + * + * \param ssl SSL context + * + * \return 0 if successful, or + * MBEDTLS_ERR_SSL_WANT_READ or MBEDTLS_ERR_SSL_WANT_WRITE, or + * a specific SSL error code. + */ +int mbedtls_ssl_handshake_step( mbedtls_ssl_context *ssl ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) +/** + * \brief Initiate an SSL renegotiation on the running connection. + * Client: perform the renegotiation right now. + * Server: request renegotiation, which will be performed + * during the next call to mbedtls_ssl_read() if honored by client. + * + * \param ssl SSL context + * + * \return 0 if successful, or any mbedtls_ssl_handshake() return value. + * + * \note If this function returns something other than 0 or + * MBEDTLS_ERR_SSL_WANT_READ/WRITE, then the ssl context + * becomes unusable, and you should either free it or call + * \c mbedtls_ssl_session_reset() on it before re-using it for + * a new connection; the current connection must be closed. + */ +int mbedtls_ssl_renegotiate( mbedtls_ssl_context *ssl ); +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + +/** + * \brief Read at most 'len' application data bytes + * + * \param ssl SSL context + * \param buf buffer that will hold the data + * \param len maximum number of bytes to read + * + * \return the number of bytes read, or + * 0 for EOF, or + * MBEDTLS_ERR_SSL_WANT_READ or MBEDTLS_ERR_SSL_WANT_WRITE, or + * MBEDTLS_ERR_SSL_CLIENT_RECONNECT (see below), or + * another negative error code. + * + * \note If this function returns something other than a positive + * value or MBEDTLS_ERR_SSL_WANT_READ/WRITE or + * MBEDTLS_ERR_SSL_CLIENT_RECONNECT, then the ssl context + * becomes unusable, and you should either free it or call + * \c mbedtls_ssl_session_reset() on it before re-using it for + * a new connection; the current connection must be closed. + * + * \note When this function return MBEDTLS_ERR_SSL_CLIENT_RECONNECT + * (which can only happen server-side), it means that a client + * is initiating a new connection using the same source port. + * You can either treat that as a connection close and wait + * for the client to resend a ClientHello, or directly + * continue with \c mbedtls_ssl_handshake() with the same + * context (as it has beeen reset internally). Either way, you + * should make sure this is seen by the application as a new + * connection: application state, if any, should be reset, and + * most importantly the identity of the client must be checked + * again. WARNING: not validating the identity of the client + * again, or not transmitting the new identity to the + * application layer, would allow authentication bypass! + */ +int mbedtls_ssl_read( mbedtls_ssl_context *ssl, unsigned char *buf, size_t len ); + +/** + * \brief Try to write exactly 'len' application data bytes + * + * \warning This function will do partial writes in some cases. If the + * return value is non-negative but less than length, the + * function must be called again with updated arguments: + * buf + ret, len - ret (if ret is the return value) until + * it returns a value equal to the last 'len' argument. + * + * \param ssl SSL context + * \param buf buffer holding the data + * \param len how many bytes must be written + * + * \return the number of bytes actually written (may be less than len), + * or MBEDTLS_ERR_SSL_WANT_WRITE of MBEDTLS_ERR_SSL_WANT_READ, + * or another negative error code. + * + * \note If this function returns something other than a positive + * value or MBEDTLS_ERR_SSL_WANT_READ/WRITE, the ssl context + * becomes unusable, and you should either free it or call + * \c mbedtls_ssl_session_reset() on it before re-using it for + * a new connection; the current connection must be closed. + * + * \note When this function returns MBEDTLS_ERR_SSL_WANT_WRITE/READ, + * it must be called later with the *same* arguments, + * until it returns a positive value. + * + * \note If the requested length is greater than the maximum + * fragment length (either the built-in limit or the one set + * or negotiated with the peer), then: + * - with TLS, less bytes than requested are written. + * - with DTLS, MBEDTLS_ERR_SSL_BAD_INPUT_DATA is returned. + * \c mbedtls_ssl_get_max_frag_len() may be used to query the + * active maximum fragment length. + */ +int mbedtls_ssl_write( mbedtls_ssl_context *ssl, const unsigned char *buf, size_t len ); + +/** + * \brief Send an alert message + * + * \param ssl SSL context + * \param level The alert level of the message + * (MBEDTLS_SSL_ALERT_LEVEL_WARNING or MBEDTLS_SSL_ALERT_LEVEL_FATAL) + * \param message The alert message (SSL_ALERT_MSG_*) + * + * \return 0 if successful, or a specific SSL error code. + * + * \note If this function returns something other than 0 or + * MBEDTLS_ERR_SSL_WANT_READ/WRITE, then the ssl context + * becomes unusable, and you should either free it or call + * \c mbedtls_ssl_session_reset() on it before re-using it for + * a new connection; the current connection must be closed. + */ +int mbedtls_ssl_send_alert_message( mbedtls_ssl_context *ssl, + unsigned char level, + unsigned char message ); +/** + * \brief Notify the peer that the connection is being closed + * + * \param ssl SSL context + * + * \return 0 if successful, or a specific SSL error code. + * + * \note If this function returns something other than 0 or + * MBEDTLS_ERR_SSL_WANT_READ/WRITE, then the ssl context + * becomes unusable, and you should either free it or call + * \c mbedtls_ssl_session_reset() on it before re-using it for + * a new connection; the current connection must be closed. + */ +int mbedtls_ssl_close_notify( mbedtls_ssl_context *ssl ); + +/** + * \brief Free referenced items in an SSL context and clear memory + * + * \param ssl SSL context + */ +void mbedtls_ssl_free( mbedtls_ssl_context *ssl ); + +/** + * \brief Initialize an SSL configuration context + * Just makes the context ready for + * mbedtls_ssl_config_defaults() or mbedtls_ssl_config_free(). + * + * \note You need to call mbedtls_ssl_config_defaults() unless you + * manually set all of the relevent fields yourself. + * + * \param conf SSL configuration context + */ +void mbedtls_ssl_config_init( mbedtls_ssl_config *conf ); + +/** + * \brief Load reasonnable default SSL configuration values. + * (You need to call mbedtls_ssl_config_init() first.) + * + * \param conf SSL configuration context + * \param endpoint MBEDTLS_SSL_IS_CLIENT or MBEDTLS_SSL_IS_SERVER + * \param transport MBEDTLS_SSL_TRANSPORT_STREAM for TLS, or + * MBEDTLS_SSL_TRANSPORT_DATAGRAM for DTLS + * \param preset a MBEDTLS_SSL_PRESET_XXX value + * (currently unused). + * + * \note See \c mbedtls_ssl_conf_transport() for notes on DTLS. + * + * \return 0 if successful, or + * MBEDTLS_ERR_XXX_ALLOC_FAILED on memory allocation error. + */ +int mbedtls_ssl_config_defaults( mbedtls_ssl_config *conf, + int endpoint, int transport, int preset ); + +/** + * \brief Free an SSL configuration context + * + * \param conf SSL configuration context + */ +void mbedtls_ssl_config_free( mbedtls_ssl_config *conf ); + +/** + * \brief Initialize SSL session structure + * + * \param session SSL session + */ +void mbedtls_ssl_session_init( mbedtls_ssl_session *session ); + +/** + * \brief Free referenced items in an SSL session including the + * peer certificate and clear memory + * + * \param session SSL session + */ +void mbedtls_ssl_session_free( mbedtls_ssl_session *session ); + +#ifdef __cplusplus +} +#endif + +#endif /* ssl.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_cache.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_cache.h new file mode 100644 index 0000000..1155924 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_cache.h @@ -0,0 +1,143 @@ +/** + * \file ssl_cache.h + * + * \brief SSL session cache implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SSL_CACHE_H +#define MBEDTLS_SSL_CACHE_H + +#include "ssl.h" + +#if defined(MBEDTLS_THREADING_C) +#include "threading.h" +#endif + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT) +#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /*!< 1 day */ +#endif + +#if !defined(MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES) +#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /*!< Maximum entries in cache */ +#endif + +/* \} name SECTION: Module settings */ + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct mbedtls_ssl_cache_context mbedtls_ssl_cache_context; +typedef struct mbedtls_ssl_cache_entry mbedtls_ssl_cache_entry; + +/** + * \brief This structure is used for storing cache entries + */ +struct mbedtls_ssl_cache_entry +{ +#if defined(MBEDTLS_HAVE_TIME) + time_t timestamp; /*!< entry timestamp */ +#endif + mbedtls_ssl_session session; /*!< entry session */ +#if defined(MBEDTLS_X509_CRT_PARSE_C) + mbedtls_x509_buf peer_cert; /*!< entry peer_cert */ +#endif + mbedtls_ssl_cache_entry *next; /*!< chain pointer */ +}; + +/** + * \brief Cache context + */ +struct mbedtls_ssl_cache_context +{ + mbedtls_ssl_cache_entry *chain; /*!< start of the chain */ + int timeout; /*!< cache entry timeout */ + int max_entries; /*!< maximum entries */ +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; /*!< mutex */ +#endif +}; + +/** + * \brief Initialize an SSL cache context + * + * \param cache SSL cache context + */ +void mbedtls_ssl_cache_init( mbedtls_ssl_cache_context *cache ); + +/** + * \brief Cache get callback implementation + * (Thread-safe if MBEDTLS_THREADING_C is enabled) + * + * \param data SSL cache context + * \param session session to retrieve entry for + */ +int mbedtls_ssl_cache_get( void *data, mbedtls_ssl_session *session ); + +/** + * \brief Cache set callback implementation + * (Thread-safe if MBEDTLS_THREADING_C is enabled) + * + * \param data SSL cache context + * \param session session to store entry for + */ +int mbedtls_ssl_cache_set( void *data, const mbedtls_ssl_session *session ); + +#if defined(MBEDTLS_HAVE_TIME) +/** + * \brief Set the cache timeout + * (Default: MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT (1 day)) + * + * A timeout of 0 indicates no timeout. + * + * \param cache SSL cache context + * \param timeout cache entry timeout in seconds + */ +void mbedtls_ssl_cache_set_timeout( mbedtls_ssl_cache_context *cache, int timeout ); +#endif /* MBEDTLS_HAVE_TIME */ + +/** + * \brief Set the maximum number of cache entries + * (Default: MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES (50)) + * + * \param cache SSL cache context + * \param max cache entry maximum + */ +void mbedtls_ssl_cache_set_max_entries( mbedtls_ssl_cache_context *cache, int max ); + +/** + * \brief Free referenced items in a cache context and clear memory + * + * \param cache SSL cache context + */ +void mbedtls_ssl_cache_free( mbedtls_ssl_cache_context *cache ); + +#ifdef __cplusplus +} +#endif + +#endif /* ssl_cache.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_ciphersuites.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_ciphersuites.h new file mode 100644 index 0000000..deaaa37 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_ciphersuites.h @@ -0,0 +1,321 @@ +/** + * \file ssl_ciphersuites.h + * + * \brief SSL Ciphersuites for mbed TLS + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SSL_CIPHERSUITES_H +#define MBEDTLS_SSL_CIPHERSUITES_H + +#include "pk.h" +#include "cipher.h" +#include "md.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Supported ciphersuites (Official IANA names) + */ +#define MBEDTLS_TLS_RSA_WITH_NULL_MD5 0x01 /**< Weak! */ +#define MBEDTLS_TLS_RSA_WITH_NULL_SHA 0x02 /**< Weak! */ + +#define MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 0x04 +#define MBEDTLS_TLS_RSA_WITH_RC4_128_SHA 0x05 +#define MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA 0x09 /**< Weak! Not in TLS 1.2 */ + +#define MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA 0x0A + +#define MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA 0x15 /**< Weak! Not in TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA 0x16 + +#define MBEDTLS_TLS_PSK_WITH_NULL_SHA 0x2C /**< Weak! */ +#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA 0x2D /**< Weak! */ +#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA 0x2E /**< Weak! */ +#define MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA 0x2F + +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA 0x33 +#define MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA 0x35 +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA 0x39 + +#define MBEDTLS_TLS_RSA_WITH_NULL_SHA256 0x3B /**< Weak! */ +#define MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 0x3C /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 0x3D /**< TLS 1.2 */ + +#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA 0x41 +#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA 0x45 + +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 0x67 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 0x6B /**< TLS 1.2 */ + +#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA 0x84 +#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA 0x88 + +#define MBEDTLS_TLS_PSK_WITH_RC4_128_SHA 0x8A +#define MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA 0x8B +#define MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA 0x8C +#define MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA 0x8D + +#define MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA 0x8E +#define MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA 0x8F +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA 0x90 +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA 0x91 + +#define MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA 0x92 +#define MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA 0x93 +#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA 0x94 +#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA 0x95 + +#define MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 0x9C /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 0x9D /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 0x9E /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 0x9F /**< TLS 1.2 */ + +#define MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 0xA8 /**< TLS 1.2 */ +#define MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 0xA9 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 0xAA /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 0xAB /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 0xAC /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 0xAD /**< TLS 1.2 */ + +#define MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 0xAE +#define MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 0xAF +#define MBEDTLS_TLS_PSK_WITH_NULL_SHA256 0xB0 /**< Weak! */ +#define MBEDTLS_TLS_PSK_WITH_NULL_SHA384 0xB1 /**< Weak! */ + +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 0xB2 +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 0xB3 +#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 0xB4 /**< Weak! */ +#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 0xB5 /**< Weak! */ + +#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 0xB6 +#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 0xB7 +#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 0xB8 /**< Weak! */ +#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 0xB9 /**< Weak! */ + +#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xBA /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xBE /**< TLS 1.2 */ + +#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 0xC0 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 0xC4 /**< TLS 1.2 */ + +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA 0xC001 /**< Weak! */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA 0xC002 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA 0xC003 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA 0xC004 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA 0xC005 /**< Not in SSL3! */ + +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA 0xC006 /**< Weak! */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA 0xC007 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA 0xC008 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA 0xC009 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA 0xC00A /**< Not in SSL3! */ + +#define MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA 0xC00B /**< Weak! */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA 0xC00C /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA 0xC00D /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA 0xC00E /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA 0xC00F /**< Not in SSL3! */ + +#define MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA 0xC010 /**< Weak! */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA 0xC011 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA 0xC012 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA 0xC013 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA 0xC014 /**< Not in SSL3! */ + +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 0xC023 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 0xC024 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 0xC025 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 0xC026 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 0xC027 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 0xC028 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 0xC029 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 0xC02A /**< TLS 1.2 */ + +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 0xC02B /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 0xC02C /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 0xC02D /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 0xC02E /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 0xC02F /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 0xC030 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 0xC031 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 0xC032 /**< TLS 1.2 */ + +#define MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA 0xC033 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA 0xC034 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA 0xC035 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA 0xC036 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 0xC037 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 0xC038 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA 0xC039 /**< Weak! No SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 0xC03A /**< Weak! No SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 0xC03B /**< Weak! No SSL3! */ + +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 0xC072 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 0xC073 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 0xC074 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 0xC075 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xC076 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 0xC077 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xC078 /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 0xC079 /**< Not in SSL3! */ + +#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC07A /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC07B /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC07C /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC07D /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 0xC086 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 0xC087 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 0xC088 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 0xC089 /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC08A /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC08B /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC08C /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC08D /**< TLS 1.2 */ + +#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 0xC08E /**< TLS 1.2 */ +#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 0xC08F /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 0xC090 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 0xC091 /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 0xC092 /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 0xC093 /**< TLS 1.2 */ + +#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC094 +#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC095 +#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC096 +#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC097 +#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC098 +#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC099 +#define MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC09A /**< Not in SSL3! */ +#define MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC09B /**< Not in SSL3! */ + +#define MBEDTLS_TLS_RSA_WITH_AES_128_CCM 0xC09C /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_WITH_AES_256_CCM 0xC09D /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM 0xC09E /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM 0xC09F /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8 0xC0A0 /**< TLS 1.2 */ +#define MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8 0xC0A1 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8 0xC0A2 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8 0xC0A3 /**< TLS 1.2 */ +#define MBEDTLS_TLS_PSK_WITH_AES_128_CCM 0xC0A4 /**< TLS 1.2 */ +#define MBEDTLS_TLS_PSK_WITH_AES_256_CCM 0xC0A5 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM 0xC0A6 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM 0xC0A7 /**< TLS 1.2 */ +#define MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8 0xC0A8 /**< TLS 1.2 */ +#define MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8 0xC0A9 /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8 0xC0AA /**< TLS 1.2 */ +#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8 0xC0AB /**< TLS 1.2 */ +/* The last two are named with PSK_DHE in the RFC, which looks like a typo */ + +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM 0xC0AC /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM 0xC0AD /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 0xC0AE /**< TLS 1.2 */ +#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 0xC0AF /**< TLS 1.2 */ + +#define MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 0xC0FF /**< experimental */ + +/* Reminder: update mbedtls_ssl_premaster_secret when adding a new key exchange. + * Reminder: update MBEDTLS_KEY_EXCHANGE__xxx below + */ +typedef enum { + MBEDTLS_KEY_EXCHANGE_NONE = 0, + MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_KEY_EXCHANGE_ECJPAKE, +} mbedtls_key_exchange_type_t; + +/* Key exchanges using a certificate */ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) +#define MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED +#endif + +/* Key exchanges using a PSK */ +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) +#define MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED +#endif + +/* Key exchanges using a ECDHE */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) +#define MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED +#endif + +typedef struct mbedtls_ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t; + +#define MBEDTLS_CIPHERSUITE_WEAK 0x01 /**< Weak ciphersuite flag */ +#define MBEDTLS_CIPHERSUITE_SHORT_TAG 0x02 /**< Short authentication tag, + eg for CCM_8 */ +#define MBEDTLS_CIPHERSUITE_NODTLS 0x04 /**< Can't be used with DTLS */ + +/** + * \brief This structure is used for storing ciphersuite information + */ +struct mbedtls_ssl_ciphersuite_t +{ + int id; + const char * name; + + mbedtls_cipher_type_t cipher; + mbedtls_md_type_t mac; + mbedtls_key_exchange_type_t key_exchange; + + int min_major_ver; + int min_minor_ver; + int max_major_ver; + int max_minor_ver; + + unsigned char flags; +}; + +const int *mbedtls_ssl_list_ciphersuites( void ); + +const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_string( const char *ciphersuite_name ); +const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_id( int ciphersuite_id ); + +#if defined(MBEDTLS_PK_C) +mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_pk_alg( const mbedtls_ssl_ciphersuite_t *info ); +#endif + +int mbedtls_ssl_ciphersuite_uses_ec( const mbedtls_ssl_ciphersuite_t *info ); +int mbedtls_ssl_ciphersuite_uses_psk( const mbedtls_ssl_ciphersuite_t *info ); + +#ifdef __cplusplus +} +#endif + +#endif /* ssl_ciphersuites.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_cookie.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_cookie.h new file mode 100644 index 0000000..037e1c3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_cookie.h @@ -0,0 +1,108 @@ +/** + * \file ssl_cookie.h + * + * \brief DTLS cookie callbacks implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SSL_COOKIE_H +#define MBEDTLS_SSL_COOKIE_H + +#include "ssl.h" + +#if defined(MBEDTLS_THREADING_C) +#include "threading.h" +#endif + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in config.h or define them on the compiler command line. + * \{ + */ +#ifndef MBEDTLS_SSL_COOKIE_TIMEOUT +#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */ +#endif + +/* \} name SECTION: Module settings */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Context for the default cookie functions. + */ +typedef struct +{ + mbedtls_md_context_t hmac_ctx; /*!< context for the HMAC portion */ +#if !defined(MBEDTLS_HAVE_TIME) + unsigned long serial; /*!< serial number for expiration */ +#endif + unsigned long timeout; /*!< timeout delay, in seconds if HAVE_TIME, + or in number of tickets issued */ + +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; +#endif +} mbedtls_ssl_cookie_ctx; + +/** + * \brief Initialize cookie context + */ +void mbedtls_ssl_cookie_init( mbedtls_ssl_cookie_ctx *ctx ); + +/** + * \brief Setup cookie context (generate keys) + */ +int mbedtls_ssl_cookie_setup( mbedtls_ssl_cookie_ctx *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Set expiration delay for cookies + * (Default MBEDTLS_SSL_COOKIE_TIMEOUT) + * + * \param ctx Cookie contex + * \param delay Delay, in seconds if HAVE_TIME, or in number of cookies + * issued in the meantime. + * 0 to disable expiration (NOT recommended) + */ +void mbedtls_ssl_cookie_set_timeout( mbedtls_ssl_cookie_ctx *ctx, unsigned long delay ); + +/** + * \brief Free cookie context + */ +void mbedtls_ssl_cookie_free( mbedtls_ssl_cookie_ctx *ctx ); + +/** + * \brief Generate cookie, see \c mbedtls_ssl_cookie_write_t + */ +mbedtls_ssl_cookie_write_t mbedtls_ssl_cookie_write; + +/** + * \brief Verify cookie, see \c mbedtls_ssl_cookie_write_t + */ +mbedtls_ssl_cookie_check_t mbedtls_ssl_cookie_check; + +#ifdef __cplusplus +} +#endif + +#endif /* ssl_cookie.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_internal.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_internal.h new file mode 100644 index 0000000..3af059f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_internal.h @@ -0,0 +1,495 @@ +/** + * \file ssl_ticket.h + * + * \brief Internal functions shared by the SSL modules + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SSL_INTERNAL_H +#define MBEDTLS_SSL_INTERNAL_H + +#include "ssl.h" + +#if defined(MBEDTLS_MD5_C) +#include "md5.h" +#endif + +#if defined(MBEDTLS_SHA1_C) +#include "sha1.h" +#endif + +#if defined(MBEDTLS_SHA256_C) +#include "sha256.h" +#endif + +#if defined(MBEDTLS_SHA512_C) +#include "sha512.h" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +#include "ecjpake.h" +#endif + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +/* Determine minimum supported version */ +#define MBEDTLS_SSL_MIN_MAJOR_VERSION MBEDTLS_SSL_MAJOR_VERSION_3 + +#if defined(MBEDTLS_SSL_PROTO_SSL3) +#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_0 +#else +#if defined(MBEDTLS_SSL_PROTO_TLS1) +#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_1 +#else +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) +#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_2 +#else +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_3 +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ +#endif /* MBEDTLS_SSL_PROTO_TLS1_1 */ +#endif /* MBEDTLS_SSL_PROTO_TLS1 */ +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + +/* Determine maximum supported version */ +#define MBEDTLS_SSL_MAX_MAJOR_VERSION MBEDTLS_SSL_MAJOR_VERSION_3 + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_3 +#else +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) +#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_2 +#else +#if defined(MBEDTLS_SSL_PROTO_TLS1) +#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_1 +#else +#if defined(MBEDTLS_SSL_PROTO_SSL3) +#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_0 +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ +#endif /* MBEDTLS_SSL_PROTO_TLS1 */ +#endif /* MBEDTLS_SSL_PROTO_TLS1_1 */ +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +#define MBEDTLS_SSL_INITIAL_HANDSHAKE 0 +#define MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS 1 /* In progress */ +#define MBEDTLS_SSL_RENEGOTIATION_DONE 2 /* Done or aborted */ +#define MBEDTLS_SSL_RENEGOTIATION_PENDING 3 /* Requested (server only) */ + +/* + * DTLS retransmission states, see RFC 6347 4.2.4 + * + * The SENDING state is merged in PREPARING for initial sends, + * but is distinct for resends. + * + * Note: initial state is wrong for server, but is not used anyway. + */ +#define MBEDTLS_SSL_RETRANS_PREPARING 0 +#define MBEDTLS_SSL_RETRANS_SENDING 1 +#define MBEDTLS_SSL_RETRANS_WAITING 2 +#define MBEDTLS_SSL_RETRANS_FINISHED 3 + +/* + * Allow extra bytes for record, authentication and encryption overhead: + * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256) + * and allow for a maximum of 1024 of compression expansion if + * enabled. + */ +#if defined(MBEDTLS_ZLIB_SUPPORT) +#define MBEDTLS_SSL_COMPRESSION_ADD 1024 +#else +#define MBEDTLS_SSL_COMPRESSION_ADD 0 +#endif + +#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_MODE_CBC) +/* Ciphersuites using HMAC */ +#if defined(MBEDTLS_SHA512_C) +#define MBEDTLS_SSL_MAC_ADD 48 /* SHA-384 used for HMAC */ +#elif defined(MBEDTLS_SHA256_C) +#define MBEDTLS_SSL_MAC_ADD 32 /* SHA-256 used for HMAC */ +#else +#define MBEDTLS_SSL_MAC_ADD 20 /* SHA-1 used for HMAC */ +#endif +#else +/* AEAD ciphersuites: GCM and CCM use a 128 bits tag */ +#define MBEDTLS_SSL_MAC_ADD 16 +#endif + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#define MBEDTLS_SSL_PADDING_ADD 256 +#else +#define MBEDTLS_SSL_PADDING_ADD 0 +#endif + +#define MBEDTLS_SSL_BUFFER_LEN ( MBEDTLS_SSL_MAX_CONTENT_LEN \ + + MBEDTLS_SSL_COMPRESSION_ADD \ + + 29 /* counter + header + IV */ \ + + MBEDTLS_SSL_MAC_ADD \ + + MBEDTLS_SSL_PADDING_ADD \ + ) + +/* + * TLS extension flags (for extensions with outgoing ServerHello content + * that need it (e.g. for RENEGOTIATION_INFO the server already knows because + * of state of the renegotiation flag, so no indicator is required) + */ +#define MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT (1 << 0) +#define MBEDTLS_TLS_EXT_ECJPAKE_KKPP_OK (1 << 1) + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * This structure contains the parameters only needed during handshake. + */ +struct mbedtls_ssl_handshake_params +{ + /* + * Handshake specific crypto variables + */ + int sig_alg; /*!< Hash algorithm for signature */ + int cert_type; /*!< Requested cert type */ + int verify_sig_alg; /*!< Signature algorithm for verify */ +#if defined(MBEDTLS_DHM_C) + mbedtls_dhm_context dhm_ctx; /*!< DHM key exchange */ +#endif +#if defined(MBEDTLS_ECDH_C) + mbedtls_ecdh_context ecdh_ctx; /*!< ECDH key exchange */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + mbedtls_ecjpake_context ecjpake_ctx; /*!< EC J-PAKE key exchange */ +#if defined(MBEDTLS_SSL_CLI_C) + unsigned char *ecjpake_cache; /*!< Cache for ClientHello ext */ + size_t ecjpake_cache_len; /*!< Length of cached data */ +#endif +#endif +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + const mbedtls_ecp_curve_info **curves; /*!< Supported elliptic curves */ +#endif +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + unsigned char *psk; /*!< PSK from the callback */ + size_t psk_len; /*!< Length of PSK from callback */ +#endif +#if defined(MBEDTLS_X509_CRT_PARSE_C) + mbedtls_ssl_key_cert *key_cert; /*!< chosen key/cert pair (server) */ +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + int sni_authmode; /*!< authmode from SNI callback */ + mbedtls_ssl_key_cert *sni_key_cert; /*!< key/cert list from SNI */ + mbedtls_x509_crt *sni_ca_chain; /*!< trusted CAs from SNI callback */ + mbedtls_x509_crl *sni_ca_crl; /*!< trusted CAs CRLs from SNI */ +#endif +#endif /* MBEDTLS_X509_CRT_PARSE_C */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + unsigned int out_msg_seq; /*!< Outgoing handshake sequence number */ + unsigned int in_msg_seq; /*!< Incoming handshake sequence number */ + + unsigned char *verify_cookie; /*!< Cli: HelloVerifyRequest cookie + Srv: unused */ + unsigned char verify_cookie_len; /*!< Cli: cookie length + Srv: flag for sending a cookie */ + + unsigned char *hs_msg; /*!< Reassembled handshake message */ + + uint32_t retransmit_timeout; /*!< Current value of timeout */ + unsigned char retransmit_state; /*!< Retransmission state */ + mbedtls_ssl_flight_item *flight; /*!< Current outgoing flight */ + mbedtls_ssl_flight_item *cur_msg; /*!< Current message in flight */ + unsigned int in_flight_start_seq; /*!< Minimum message sequence in the + flight being received */ + mbedtls_ssl_transform *alt_transform_out; /*!< Alternative transform for + resending messages */ + unsigned char alt_out_ctr[8]; /*!< Alternative record epoch/counter + for resending messages */ +#endif + + /* + * Checksum contexts + */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + mbedtls_md5_context fin_md5; + mbedtls_sha1_context fin_sha1; +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) + mbedtls_sha256_context fin_sha256; +#endif +#if defined(MBEDTLS_SHA512_C) + mbedtls_sha512_context fin_sha512; +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + + void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t); + void (*calc_verify)(mbedtls_ssl_context *, unsigned char *); + void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int); + int (*tls_prf)(const unsigned char *, size_t, const char *, + const unsigned char *, size_t, + unsigned char *, size_t); + + size_t pmslen; /*!< premaster length */ + + unsigned char randbytes[64]; /*!< random bytes */ + unsigned char premaster[MBEDTLS_PREMASTER_SIZE]; + /*!< premaster secret */ + + int resume; /*!< session resume indicator*/ + int max_major_ver; /*!< max. major version client*/ + int max_minor_ver; /*!< max. minor version client*/ + int cli_exts; /*!< client extension presence*/ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + int new_session_ticket; /*!< use NewSessionTicket? */ +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + int extended_ms; /*!< use Extended Master Secret? */ +#endif +}; + +/* + * This structure contains a full set of runtime transform parameters + * either in negotiation or active. + */ +struct mbedtls_ssl_transform +{ + /* + * Session specific crypto layer + */ + const mbedtls_ssl_ciphersuite_t *ciphersuite_info; + /*!< Chosen cipersuite_info */ + unsigned int keylen; /*!< symmetric key length (bytes) */ + size_t minlen; /*!< min. ciphertext length */ + size_t ivlen; /*!< IV length */ + size_t fixed_ivlen; /*!< Fixed part of IV (AEAD) */ + size_t maclen; /*!< MAC length */ + + unsigned char iv_enc[16]; /*!< IV (encryption) */ + unsigned char iv_dec[16]; /*!< IV (decryption) */ + +#if defined(MBEDTLS_SSL_PROTO_SSL3) + /* Needed only for SSL v3.0 secret */ + unsigned char mac_enc[20]; /*!< SSL v3.0 secret (enc) */ + unsigned char mac_dec[20]; /*!< SSL v3.0 secret (dec) */ +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + + mbedtls_md_context_t md_ctx_enc; /*!< MAC (encryption) */ + mbedtls_md_context_t md_ctx_dec; /*!< MAC (decryption) */ + + mbedtls_cipher_context_t cipher_ctx_enc; /*!< encryption context */ + mbedtls_cipher_context_t cipher_ctx_dec; /*!< decryption context */ + + /* + * Session specific compression layer + */ +#if defined(MBEDTLS_ZLIB_SUPPORT) + z_stream ctx_deflate; /*!< compression context */ + z_stream ctx_inflate; /*!< decompression context */ +#endif +}; + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +/* + * List of certificate + private key pairs + */ +struct mbedtls_ssl_key_cert +{ + mbedtls_x509_crt *cert; /*!< cert */ + mbedtls_pk_context *key; /*!< private key */ + mbedtls_ssl_key_cert *next; /*!< next key/cert pair */ +}; +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_SSL_PROTO_DTLS) +/* + * List of handshake messages kept around for resending + */ +struct mbedtls_ssl_flight_item +{ + unsigned char *p; /*!< message, including handshake headers */ + size_t len; /*!< length of p */ + unsigned char type; /*!< type of the message: handshake or CCS */ + mbedtls_ssl_flight_item *next; /*!< next handshake message(s) */ +}; +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + + +/** + * \brief Free referenced items in an SSL transform context and clear + * memory + * + * \param transform SSL transform context + */ +void mbedtls_ssl_transform_free( mbedtls_ssl_transform *transform ); + +/** + * \brief Free referenced items in an SSL handshake context and clear + * memory + * + * \param handshake SSL handshake context + */ +void mbedtls_ssl_handshake_free( mbedtls_ssl_handshake_params *handshake ); + +int mbedtls_ssl_handshake_client_step( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_handshake_server_step( mbedtls_ssl_context *ssl ); +void mbedtls_ssl_handshake_wrapup( mbedtls_ssl_context *ssl ); + +int mbedtls_ssl_send_fatal_handshake_failure( mbedtls_ssl_context *ssl ); + +void mbedtls_ssl_reset_checksum( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_derive_keys( mbedtls_ssl_context *ssl ); + +int mbedtls_ssl_read_record( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_fetch_input( mbedtls_ssl_context *ssl, size_t nb_want ); + +int mbedtls_ssl_write_record( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_flush_output( mbedtls_ssl_context *ssl ); + +int mbedtls_ssl_parse_certificate( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_write_certificate( mbedtls_ssl_context *ssl ); + +int mbedtls_ssl_parse_change_cipher_spec( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_write_change_cipher_spec( mbedtls_ssl_context *ssl ); + +int mbedtls_ssl_parse_finished( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_write_finished( mbedtls_ssl_context *ssl ); + +void mbedtls_ssl_optimize_checksum( mbedtls_ssl_context *ssl, + const mbedtls_ssl_ciphersuite_t *ciphersuite_info ); + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) +int mbedtls_ssl_psk_derive_premaster( mbedtls_ssl_context *ssl, mbedtls_key_exchange_type_t key_ex ); +#endif + +#if defined(MBEDTLS_PK_C) +unsigned char mbedtls_ssl_sig_from_pk( mbedtls_pk_context *pk ); +mbedtls_pk_type_t mbedtls_ssl_pk_alg_from_sig( unsigned char sig ); +#endif + +mbedtls_md_type_t mbedtls_ssl_md_alg_from_hash( unsigned char hash ); +unsigned char mbedtls_ssl_hash_from_md_alg( int md ); + +#if defined(MBEDTLS_ECP_C) +int mbedtls_ssl_check_curve( const mbedtls_ssl_context *ssl, mbedtls_ecp_group_id grp_id ); +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +int mbedtls_ssl_check_sig_hash( const mbedtls_ssl_context *ssl, + mbedtls_md_type_t md ); +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +static inline mbedtls_pk_context *mbedtls_ssl_own_key( mbedtls_ssl_context *ssl ) +{ + mbedtls_ssl_key_cert *key_cert; + + if( ssl->handshake != NULL && ssl->handshake->key_cert != NULL ) + key_cert = ssl->handshake->key_cert; + else + key_cert = ssl->conf->key_cert; + + return( key_cert == NULL ? NULL : key_cert->key ); +} + +static inline mbedtls_x509_crt *mbedtls_ssl_own_cert( mbedtls_ssl_context *ssl ) +{ + mbedtls_ssl_key_cert *key_cert; + + if( ssl->handshake != NULL && ssl->handshake->key_cert != NULL ) + key_cert = ssl->handshake->key_cert; + else + key_cert = ssl->conf->key_cert; + + return( key_cert == NULL ? NULL : key_cert->cert ); +} + +/* + * Check usage of a certificate wrt extensions: + * keyUsage, extendedKeyUsage (later), and nSCertType (later). + * + * Warning: cert_endpoint is the endpoint of the cert (ie, of our peer when we + * check a cert we received from them)! + * + * Return 0 if everything is OK, -1 if not. + */ +int mbedtls_ssl_check_cert_usage( const mbedtls_x509_crt *cert, + const mbedtls_ssl_ciphersuite_t *ciphersuite, + int cert_endpoint, + uint32_t *flags ); +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +void mbedtls_ssl_write_version( int major, int minor, int transport, + unsigned char ver[2] ); +void mbedtls_ssl_read_version( int *major, int *minor, int transport, + const unsigned char ver[2] ); + +static inline size_t mbedtls_ssl_hdr_len( const mbedtls_ssl_context *ssl ) +{ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + return( 13 ); +#else + ((void) ssl); +#endif + return( 5 ); +} + +static inline size_t mbedtls_ssl_hs_hdr_len( const mbedtls_ssl_context *ssl ) +{ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + return( 12 ); +#else + ((void) ssl); +#endif + return( 4 ); +} + +#if defined(MBEDTLS_SSL_PROTO_DTLS) +void mbedtls_ssl_send_flight_completed( mbedtls_ssl_context *ssl ); +void mbedtls_ssl_recv_flight_completed( mbedtls_ssl_context *ssl ); +int mbedtls_ssl_resend( mbedtls_ssl_context *ssl ); +#endif + +/* Visible for testing purposes only */ +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) +int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context *ssl ); +void mbedtls_ssl_dtls_replay_update( mbedtls_ssl_context *ssl ); +#endif + +/* constant-time buffer comparison */ +static inline int mbedtls_ssl_safer_memcmp( const void *a, const void *b, size_t n ) +{ + size_t i; + const unsigned char *A = (const unsigned char *) a; + const unsigned char *B = (const unsigned char *) b; + unsigned char diff = 0; + + for( i = 0; i < n; i++ ) + diff |= A[i] ^ B[i]; + + return( diff ); +} + +#ifdef __cplusplus +} +#endif + +#endif /* ssl_internal.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_ticket.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_ticket.h new file mode 100644 index 0000000..7c6bc61 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/ssl_ticket.h @@ -0,0 +1,135 @@ +/** + * \file ssl_ticket.h + * + * \brief TLS server ticket callbacks implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_SSL_TICKET_H +#define MBEDTLS_SSL_TICKET_H + +/* + * This implementation of the session ticket callbacks includes key + * management, rotating the keys periodically in order to preserve forward + * secrecy, when MBEDTLS_HAVE_TIME is defined. + */ + +#include "ssl.h" +#include "cipher.h" + +#if defined(MBEDTLS_THREADING_C) +#include "threading.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Information for session ticket protection + */ +typedef struct +{ + unsigned char name[4]; /*!< random key identifier */ + uint32_t generation_time; /*!< key generation timestamp (seconds) */ + mbedtls_cipher_context_t ctx; /*!< context for auth enc/decryption */ +} +mbedtls_ssl_ticket_key; + +/** + * \brief Context for session ticket handling functions + */ +typedef struct +{ + mbedtls_ssl_ticket_key keys[2]; /*!< ticket protection keys */ + unsigned char active; /*!< index of the currently active key */ + + uint32_t ticket_lifetime; /*!< lifetime of tickets in seconds */ + + /** Callback for getting (pseudo-)random numbers */ + int (*f_rng)(void *, unsigned char *, size_t); + void *p_rng; /*!< context for the RNG function */ + +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; +#endif +} +mbedtls_ssl_ticket_context; + +/** + * \brief Initialize a ticket context. + * (Just make it ready for mbedtls_ssl_ticket_setup() + * or mbedtls_ssl_ticket_free().) + * + * \param ctx Context to be initialized + */ +void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx ); + +/** + * \brief Prepare context to be actually used + * + * \param ctx Context to be set up + * \param f_rng RNG callback function + * \param p_rng RNG callback context + * \param cipher AEAD cipher to use for ticket protection. + * Recommended value: MBEDTLS_CIPHER_AES_256_GCM. + * \param lifetime Tickets lifetime in seconds + * Recommended value: 86400 (one day). + * + * \note It is highly recommended to select a cipher that is at + * least as strong as the the strongest ciphersuite + * supported. Usually that means a 256-bit key. + * + * \note The lifetime of the keys is twice the lifetime of tickets. + * It is recommended to pick a reasonnable lifetime so as not + * to negate the benefits of forward secrecy. + * + * \return 0 if successful, + * or a specific MBEDTLS_ERR_XXX error code + */ +int mbedtls_ssl_ticket_setup( mbedtls_ssl_ticket_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + mbedtls_cipher_type_t cipher, + uint32_t lifetime ); + +/** + * \brief Implementation of the ticket write callback + * + * \note See \c mbedlts_ssl_ticket_write_t for description + */ +mbedtls_ssl_ticket_write_t mbedtls_ssl_ticket_write; + +/** + * \brief Implementation of the ticket parse callback + * + * \note See \c mbedlts_ssl_ticket_parse_t for description + */ +mbedtls_ssl_ticket_parse_t mbedtls_ssl_ticket_parse; + +/** + * \brief Free a context's content and zeroize it. + * + * \param ctx Context to be cleaned up + */ +void mbedtls_ssl_ticket_free( mbedtls_ssl_ticket_context *ctx ); + +#ifdef __cplusplus +} +#endif + +#endif /* ssl_ticket.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sys/espconn_mbedtls.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sys/espconn_mbedtls.h new file mode 100644 index 0000000..9585ad1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sys/espconn_mbedtls.h @@ -0,0 +1,286 @@ +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef ESPCONN_MBEDTLS_H_ +#define ESPCONN_MBEDTLS_H_ + +#include "lwip/ip.h" +#include "lwip/app/espconn.h" +#include "user_interface.h" + +#if !defined(ESPCONN_MBEDTLS) + +#include "mbedtls/net.h" +#include "mbedtls/debug.h" +#include "mbedtls/ssl.h" +#include "mbedtls/entropy.h" +#include "mbedtls/ctr_drbg.h" +typedef struct espconn *pmbedtls_espconn; +typedef struct espconn mbedtls_espconn; +typedef struct{ + int record_len; +}mbedtls_record; + +#if defined(ESP8266_PLATFORM) +typedef struct{ + uint8* finished_buf; + int finished_len; +}mbedtls_finished, *pmbedtls_finished; +#endif + +typedef struct{ +// mbedtls_entropy_context entropy; + mbedtls_x509_crt cacert; + mbedtls_x509_crt clicert; + mbedtls_pk_context pkey; +}mbedtls_session, *pmbedtls_session; + +typedef struct{ + bool quiet; + mbedtls_record record; +#if defined(ESP8266_PLATFORM) + pmbedtls_finished pfinished; +#endif + pmbedtls_session psession; + mbedtls_net_context fd; + mbedtls_net_context listen_fd; + mbedtls_ctr_drbg_context ctr_drbg; + mbedtls_ssl_context ssl; + mbedtls_ssl_config conf; + mbedtls_entropy_context entropy; + + bool SentFnFlag; + sint32 verify_result; +}mbedtls_msg, *pmbedtls_msg; + +typedef enum { + ESPCONN_CERT_OWN, + ESPCONN_CERT_AUTH, + ESPCONN_PK, + ESPCONN_PASSWORD +}mbedtls_auth_type; + +typedef enum { + ESPCONN_IDLE = 0, + ESPCONN_CLIENT, + ESPCONN_SERVER, + ESPCONN_BOTH, + ESPCONN_MAX +}espconn_level; + +typedef struct _file_head{ + char file_name[32]; + uint16_t file_length; +}file_head; + +typedef struct _file_param{ + file_head file_head; + int32 file_offerset; +}file_param; + +typedef struct _ssl_sector{ + uint32 sector; + bool flag; +}ssl_sector; + +struct ssl_packet{ + uint8* pbuffer; + uint16 buffer_size; + ssl_sector cert_ca_sector; + ssl_sector cert_req_sector; +}; + +typedef struct _ssl_opt { + struct ssl_packet server; + struct ssl_packet client; + uint8 type; +}ssl_opt; + +typedef struct{ + mbedtls_auth_type auth_type; + espconn_level auth_level; +}mbedtls_auth_info; + +#define SSL_KEEP_INTVL 1 +#define SSL_KEEP_CNT 5 +#define SSL_KEEP_IDLE 90 + +#define ssl_keepalive_enable(pcb) ((pcb)->so_options |= SOF_KEEPALIVE) +#define ssl_keepalive_disable(pcb) ((pcb)->so_options &= ~SOF_KEEPALIVE) + +enum { + SIG_ESPCONN_TLS_ERRER = 0x3B +}; + +#define ESPCONN_SECURE_MAX_SIZE 8192 +#define ESPCONN_SECURE_DEFAULT_HEAP 0x3800 +#define ESPCONN_SECURE_DEFAULT_SIZE 0x0800 +#define ESPCONN_HANDSHAKE_TIMEOUT 0x3C +#define ESPCONN_INVALID_TYPE 0xFFFFFFFF +#define MBEDTLS_SSL_PLAIN_ADD TCP_MSS +#define FLASH_SECTOR_SIZE 4096 + +extern ssl_opt ssl_option; + +typedef struct{ + uint32 parame_sec; + uint32 parame_type; + uint32 parame_datalen; + char* parame_data; +}mbedtls_parame, *pmbedtls_parame; + +/* +* Storage format identifiers +* Recognized formats: PEM and DER +*/ +typedef enum{ + ESPCONN_FORMAT_INIT = 0, + ESPCONN_FORMAT_DER = 1, + ESPCONN_FORMAT_PEM = 2, + ESPCONN_FORMAT_INVALID +}espconn_format; + +#define ESPCONN_EVENT_RECV(pcb,p,err) \ + do { \ + if((pcb)!= NULL && (pcb)->recv_callback != NULL) { \ + (pcb)->state = ESPCONN_READ; \ + (pcb)->recv_callback((pcb),(p),(err));\ + (pcb)->state = ESPCONN_CONNECT; \ + } else { \ + ESP_LOG("%s %d\n", __FILE__, __LINE__); \ + } \ + } while (0) + +#define ESPCONN_EVENT_SEND(pcb) \ + do { \ + if((pcb)!= NULL && (pcb)->sent_callback != NULL) { \ + (pcb)->state = ESPCONN_CONNECT; \ + (pcb)->sent_callback(pcb);\ + } else { \ + ESP_LOG("%s %d\n", __FILE__, __LINE__); \ + } \ + } while (0) + +#define ESPCONN_EVENT_CONNECTED(pcb) \ + do { \ + if((pcb)!= NULL && (pcb)->proto.tcp != NULL && (pcb)->proto.tcp->connect_callback != NULL) { \ + (pcb)->state = ESPCONN_CONNECT; \ + (pcb)->proto.tcp->connect_callback(pcb);\ + } else { \ + ESP_LOG("%s %d\n", __FILE__, __LINE__); \ + } \ + } while (0) + +#define ESPCONN_EVENT_CLOSED(pcb) \ + do { \ + if((pcb)!= NULL && (pcb)->proto.tcp != NULL && (pcb)->proto.tcp->disconnect_callback != NULL) { \ + (pcb)->state = ESPCONN_CLOSE; \ + (pcb)->proto.tcp->disconnect_callback(pcb);\ + } else { \ + ESP_LOG("%s %d\n", __FILE__, __LINE__); \ + } \ + } while (0) + +#define ESPCONN_EVENT_ERROR(pcb,err) \ + do { \ + if((pcb)!= NULL && (pcb)->proto.tcp != NULL && (pcb)->proto.tcp->reconnect_callback != NULL) { \ + (pcb)->state = ESPCONN_CLOSE; \ + (pcb)->proto.tcp->reconnect_callback(pcb,err);\ + } else { \ + ESP_LOG("%s %d\n", __FILE__, __LINE__); \ + } \ + } while (0) + +/****************************************************************************** + * FunctionName : mbedtls_load_default_obj + * Description : Initialize the server: set up a listen PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ +bool mbedtls_load_default_obj(uint32 flash_sector, int obj_type, const unsigned char *load_buf, uint16 length); + +/****************************************************************************** + * FunctionName : sslserver_start + * Description : Initialize the server: set up a listen PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_ssl_server(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_ssl_client + * Description : Initialize the client: set up a connect PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_ssl_client(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_ssl_write + * Description : sent data for client or server + * Parameters : void *arg -- client or server to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : none +*******************************************************************************/ + +extern void espconn_ssl_sent(void *arg, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_ssl_disconnect + * Description : A new incoming connection has been disconnected. + * Parameters : espconn -- the espconn used to disconnect with host + * Returns : none +*******************************************************************************/ + +extern void espconn_ssl_disconnect(espconn_msg *pdis); + +/****************************************************************************** + * FunctionName : espconn_secure_get_size + * Description : get buffer size for client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : buffer size for client or server +*******************************************************************************/ + +extern sint16 espconn_secure_get_size(uint8 level); + +/****************************************************************************** + * FunctionName : espconn_ssl_delete + * Description : delete the server: delete a listening PCB and free it + * Parameters : pdeletecon -- the espconn used to delete a server + * Returns : none +*******************************************************************************/ +extern sint8 espconn_ssl_delete(struct espconn *pdeletecon); + +#endif + + + +#endif /* ESPCONN_MBEDTLS_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sys/socket.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sys/socket.h new file mode 100644 index 0000000..c05e451 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/sys/socket.h @@ -0,0 +1,351 @@ +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef ESP_SOCKET_H_ +#define ESP_SOCKET_H_ + +#include "lwip/inet.h" +#include "lwip/opt.h" +#include "lwip/app/espconn_buf.h" + +#if 0 +#define ESP_LOG os_printf +#else +#define ESP_LOG(...) +#endif + +#define NUM_SOCKETS 3 + +#define ESP_OK 0 /* No error, everything OK. */ +#define ESP_MEM -1 /* Out of memory error. */ +#define ESP_TIMEOUT -3 /* Timeout. */ +#define ESP_RTE -4 /* Routing problem. */ +#define ESP_INPROGRESS -5 /* Operation in progress */ +#define ESP_MAXNUM -7 /* Total number exceeds the set maximum*/ + +#define ESP_ABRT -8 /* Connection aborted. */ +#define ESP_RST -9 /* Connection reset. */ +#define ESP_CLSD -10 /* Connection closed. */ +#define ESP_CONN -11 /* Not connected. */ + +#define ESP_ARG -12 /* Illegal argument. */ +#define ESP_IF -14 /* Low_level error */ +#define ESP_ISCONN -15 /* Already connected. */ + +typedef enum{ + NETCONN_STATE_NONE = 0, + NETCONN_STATE_ESTABLISHED, + NETCONN_STATE_WRITE, + NETCONN_STATE_READ, + NETCONN_STATE_CLOSED, + NETCONN_STATE_ERROR, + NETCONN_STATE_SUMNUM +}netconn_state; + +extern int __attribute__((weak)) mbedtls_parse_internal(int socket, sint8 error); +extern int __attribute__((weak)) mbedtls_parse_thread(int socket, int event, int error); + +#if (!defined(lwIP_unlikely)) +#define lwIP_unlikely(Expression) !!(Expression) +#endif + +#define lwIP_ASSERT(Expression) do{if (!(Expression)) ESP_LOG("%d\n", __LINE__);}while(0) + +#define lwIP_REQUIRE_ACTION(Expression,Label,Action) \ + do{\ + if (lwIP_unlikely(!(Expression))) \ + {\ + ESP_LOG("%d\n", __LINE__);\ + {Action;}\ + goto Label;\ + }\ + }while(0) + +#define lwIP_REQUIRE_NOERROR(Expression,Label) \ + do{\ + int LocalError;\ + LocalError = (int)Expression;\ + if (lwIP_unlikely(LocalError != 0)) \ + {\ + ESP_LOG("%d 0x%x\n", __LINE__, LocalError);\ + goto Label;\ + }\ + }while(0) + +#define lwIP_REQUIRE_NOERROR_ACTION(Expression,Label,Action) \ + do{\ + int LocalError;\ + LocalError = (int)Expression;\ + if (lwIP_unlikely(LocalError != 0)) \ + {\ + ESP_LOG("%d\n", __LINE__);\ + {Action;}\ + goto Label;\ + }\ + }while(0) + +#define lwIP_EVENT_PARSE(s, error) \ + do { \ + mbedtls_parse_internal(s, error); \ + } while (0) + +#define lwIP_EVENT_THREAD(s, event, error) \ + do { \ + mbedtls_parse_thread(s, event, error); \ + }while(0) + +typedef enum{ + ENTCONN_EVENT_NONE = 0, + NETCONN_EVENT_ESTABLISHED = 1, + ENTCONN_EVENT_RECV = 2, + NETCONN_EVENT_SEND = 3, + NETCONN_EVENT_ERROR = 4, + NETCONN_EVENT_CLOSE = 5, + NETCONN_EVENT_SUMNUM = 6 +}netconn_event; + +typedef enum _netconn_type { + NETCONN_INVALID = 0, + /* ESPCONN_TCP Group */ + NETCONN_TCP = 0x10, + /* ESPCONN_UDP Group */ + NETCONN_UDP = 0x20, +} netconn_type; + +/* members are in network byte order */ +struct sockaddr_in { + u8_t sin_len; + u8_t sin_family; + u16_t sin_port; + struct in_addr sin_addr; + char sin_zero[8]; +}; + +/** A netconn descriptor */ +typedef struct _lwIP_netconn{ + /** flags blocking or nonblocking defines */ + uint8 flags; + /** type of the lwIP_netconn (TCP, UDP) */ + netconn_type type; + /** current state of the lwIP_netconn */ + netconn_state state; + /** the lwIP internal protocol control block */ + struct tcp_pcb *tcp; + + /**the new socket is unknown and sync*/ + void *acceptmbox; + + /**the lwIP internal buffer control block*/ + ringbuf *readbuf; + /** only used for socket layer */ + int socket; +}lwIP_netconn, *lwIPNetconn; + +/** Contains all internal pointers and states used for a socket */ +typedef struct _lwIP_sock{ + /** sockets currently are built on lwIP_netconn, each socket has one lwIP_netconn */ + lwIP_netconn *conn; + /** data that was left from the previous read */ + u32_t recv_index; + u32_t send_index; + u32_t recv_data_len; + void *send_buffer; +}lwIP_sock; + +typedef uint8 sa_family_t; + +struct sockaddr { + uint8 sa_len; + sa_family_t sa_family; + char sa_data[14]; +}; + +typedef uint32 socklen_t; + +#define NETCONNTYPE_GROUP(t) ((t)&0xF0) +#define NETCONNTYPE_DATAGRAM(t) ((t)&0xE0) + +#define AF_UNSPEC 0 +#define AF_INET 2 + +/* Socket protocol types (TCP/UDP/RAW) */ +#define SOCK_STREAM 1 +#define SOCK_DGRAM 2 +#define SOCK_RAW 3 + +#define lwIPThreadPrio 25 +#define lwIPThreadQueueLen 15 + +/* + * Option flags per-socket. These must match the SOF_ flags in ip.h (checked in init.c) + */ +#define SO_DEBUG 0x0001 /* Unimplemented: turn on debugging info recording */ +#define SO_ACCEPTCONN 0x0002 /* socket has had listen() */ +#define SO_REUSEADDR 0x0004 /* Allow local address reuse */ +#define SO_KEEPALIVE 0x0008 /* keep connections alive */ +#define SO_DONTROUTE 0x0010 /* Unimplemented: just use interface addresses */ +#define SO_BROADCAST 0x0020 /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */ +#define SO_USELOOPBACK 0x0040 /* Unimplemented: bypass hardware when possible */ +#define SO_LINGER 0x0080 /* linger on close if data present */ +#define SO_OOBINLINE 0x0100 /* Unimplemented: leave received OOB data in line */ +#define SO_REUSEPORT 0x0200 /* Unimplemented: allow local address & port reuse */ + +/* + * Additional options, not kept in so_options. + */ +#define SO_SNDBUF 0x1001 /* Unimplemented: send buffer size */ +#define SO_RCVBUF 0x1002 /* receive buffer size */ +#define SO_TYPE 0x1008 /* get socket type */ + +#define IPPROTO_IP 0 +#define IPPROTO_TCP 6 +#define IPPROTO_UDP 17 + +#define SOL_SOCKET 0xfff /* options for socket level */ + +#if LWIP_TCP +/* + * Options for level IPPROTO_TCP + */ +#define TCP_NODELAY 0x01 /* don't delay send to coalesce packets */ +#define TCP_KEEPALIVE 0x02 /* send KEEPALIVE probes when idle for pcb->keep_idle milliseconds */ +#define TCP_KEEPIDLE 0x03 /* set pcb->keep_idle - Same as TCP_KEEPALIVE, but use seconds for get/setsockopt */ +#define TCP_KEEPINTVL 0x04 /* set pcb->keep_intvl - Use seconds for get/setsockopt */ +#define TCP_KEEPCNT 0x05 /* set pcb->keep_cnt - Use number of probes sent for get/setsockopt */ +#endif /* LWIP_TCP */ + +/* commands for fnctl */ +#ifndef F_GETFL +#define F_GETFL 3 +#endif +#ifndef F_SETFL +#define F_SETFL 4 +#endif + +/* File status flags and file access modes for fnctl, + these are bits in an int. */ +#ifndef O_NONBLOCK +#define O_NONBLOCK 1 /* nonblocking I/O */ +#endif +#ifndef O_NDELAY +#define O_NDELAY 1 /* same as O_NONBLOCK, for compatibility */ +#endif + +struct timeval { + long tv_sec; /* seconds */ + long tv_usec; /* and microseconds */ +}; +/* Flags for struct netconn.flags (u8_t) */ +/** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores whether to wake up the original application task + if data couldn't be sent in the first try. */ +#define NETCONN_FLAG_WRITE_DELAYED 0x01 +/** Should this netconn avoid blocking? */ +#define NETCONN_FLAG_NON_BLOCKING 0x02 +/** Was the last connect action a non-blocking one? */ +#define NETCONN_FLAG_IN_NONBLOCKING_CONNECT 0x04 +/** If this is set, a TCP netconn must call netconn_recved() to update + the TCP receive window (done automatically if not set). */ +#define NETCONN_FLAG_NO_AUTO_RECVED 0x08 +/** If a nonblocking write has been rejected before, poll_tcp needs to + check if the netconn is writable again */ +#define NETCONN_FLAG_CHECK_WRITESPACE 0x10 + +/** Set the blocking status of netconn calls (@todo: write/send is missing) */ +#define netconn_set_nonblocking(conn, val) do { if(val) { \ + (conn)->flags |= NETCONN_FLAG_NON_BLOCKING; \ +} else { \ + (conn)->flags &= ~ NETCONN_FLAG_NON_BLOCKING; }} while(0) +/** Get the blocking status of netconn calls (@todo: write/send is missing) */ +#define netconn_is_nonblocking(conn) (((conn)->flags & NETCONN_FLAG_NON_BLOCKING) != 0) + +/* FD_SET used for lwip_select */ +#ifndef FD_SET +#undef FD_SETSIZE +/* Make FD_SETSIZE match NUM_SOCKETS in socket.c */ +#define FD_SETSIZE NUM_SOCKETS +#define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7))) +#define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7))) +#define FD_ISSET(n,p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7))) +#define FD_ZERO(p) os_memset((void*)(p),0,sizeof(*(p))) + +typedef struct fd_set { + unsigned char fd_bits[(FD_SETSIZE + 7) / 8]; +} fd_set; + +#endif /* FD_SET */ + +void lwip_socket_init(void); + +int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen); +int lwip_bind(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_shutdown(int s, int how); +int lwip_getpeername(int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockname(int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockopt(int s, int level, int optname, void *optval,socklen_t *optlen); +int lwip_setsockopt(int s, int level, int optname, const void *optval,socklen_t optlen); +int lwip_close(int s); +int lwip_connect(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_listen(int s, int backlog); +int lwip_recv(int s, void *mem, size_t len, int flags); +int lwip_read(int s, void *mem, size_t len); +int lwip_recvfrom(int s, void *mem, size_t len, int flags,struct sockaddr *from, socklen_t *fromlen); +int lwip_send(int s, const void *dataptr, size_t size, int flags); +int lwip_sendto(int s, const void *dataptr, size_t size, int flags,const struct sockaddr *to, socklen_t tolen); +int lwip_socket(int domain, int type, int protocol); +int lwip_write(int s, const void *dataptr, size_t size); +int lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset,fd_set *exceptset, struct timeval *timeout); +int lwip_ioctl(int s, long cmd, void *argp); +int lwip_fcntl(int s, int cmd, int val); +uint32_t lwip_getul(char *str); + +#define accept(a,b,c) lwip_accept(a,b,c) +#define bind(a,b,c) lwip_bind(a,b,c) +#define shutdown(a,b) lwip_shutdown(a,b) +#define closesocket(s) lwip_close(s) +#define connect(a,b,c) lwip_connect(a,b,c) +#define getsockname(a,b,c) lwip_getsockname(a,b,c) +#define getpeername(a,b,c) lwip_getpeername(a,b,c) +#define setsockopt(a,b,c,d,e) lwip_setsockopt(a,b,c,d,e) +#define getsockopt(a,b,c,d,e) lwip_getsockopt(a,b,c,d,e) +#define listen(a,b) lwip_listen(a,b) +#define recv(a,b,c,d) lwip_recv(a,b,c,d) +#define recvfrom(a,b,c,d,e,f) lwip_recvfrom(a,b,c,d,e,f) +#define send(a,b,c,d) lwip_send(a,b,c,d) +#define sendto(a,b,c,d,e,f) lwip_sendto(a,b,c,d,e,f) +#define socket(a,b,c) lwip_socket(a,b,c) +#define select(a,b,c,d,e) lwip_select(a,b,c,d,e) +#define ioctlsocket(a,b,c) lwip_ioctl(a,b,c) + +#define read(a,b,c) lwip_read(a,b,c) +#define write(a,b,c) lwip_write(a,b,c) +#define close(s) lwip_close(s) +#define getul(s) lwip_getul(s) +#define fcntl(a,b,c) lwip_fcntl(a,b,c) + +extern int system_overclock(void); +extern int system_restoreclock(void); +extern char *sys_itoa(int n); + +#endif /* ESPCONN_SOCKT_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/threading.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/threading.h new file mode 100644 index 0000000..c39cbf2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/threading.h @@ -0,0 +1,104 @@ +/** + * \file threading.h + * + * \brief Threading abstraction layer + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_THREADING_H +#define MBEDTLS_THREADING_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE -0x001A /**< The selected feature is not available. */ +#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA -0x001C /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_THREADING_MUTEX_ERROR -0x001E /**< Locking / unlocking / free failed with error code. */ + +#if defined(MBEDTLS_THREADING_PTHREAD) +#include +typedef struct +{ + pthread_mutex_t mutex; + char is_valid; +} mbedtls_threading_mutex_t; +#endif + +#if defined(MBEDTLS_THREADING_ALT) +/* You should define the mbedtls_threading_mutex_t type in your header */ +#include "threading_alt.h" + +/** + * \brief Set your alternate threading implementation function + * pointers and initialize global mutexes. If used, this + * function must be called once in the main thread before any + * other mbed TLS function is called, and + * mbedtls_threading_free_alt() must be called once in the main + * thread after all other mbed TLS functions. + * + * \note mutex_init() and mutex_free() don't return a status code. + * If mutex_init() fails, it should leave its argument (the + * mutex) in a state such that mutex_lock() will fail when + * called with this argument. + * + * \param mutex_init the init function implementation + * \param mutex_free the free function implementation + * \param mutex_lock the lock function implementation + * \param mutex_unlock the unlock function implementation + */ +void mbedtls_threading_set_alt( void (*mutex_init)( mbedtls_threading_mutex_t * ), + void (*mutex_free)( mbedtls_threading_mutex_t * ), + int (*mutex_lock)( mbedtls_threading_mutex_t * ), + int (*mutex_unlock)( mbedtls_threading_mutex_t * ) ); + +/** + * \brief Free global mutexes. + */ +void mbedtls_threading_free_alt( void ); +#endif /* MBEDTLS_THREADING_ALT */ + +/* + * The function pointers for mutex_init, mutex_free, mutex_ and mutex_unlock + * + * All these functions are expected to work or the result will be undefined. + */ +extern void (*mbedtls_mutex_init)( mbedtls_threading_mutex_t *mutex ); +extern void (*mbedtls_mutex_free)( mbedtls_threading_mutex_t *mutex ); +extern int (*mbedtls_mutex_lock)( mbedtls_threading_mutex_t *mutex ); +extern int (*mbedtls_mutex_unlock)( mbedtls_threading_mutex_t *mutex ); + +/* + * Global mutexes + */ +extern mbedtls_threading_mutex_t mbedtls_threading_readdir_mutex; +extern mbedtls_threading_mutex_t mbedtls_threading_gmtime_mutex; + +#ifdef __cplusplus +} +#endif + +#endif /* threading.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/timing.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/timing.h new file mode 100644 index 0000000..ae7a713 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/timing.h @@ -0,0 +1,141 @@ +/** + * \file timing.h + * + * \brief Portable interface to the CPU cycle counter + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_TIMING_H +#define MBEDTLS_TIMING_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if !defined(MBEDTLS_TIMING_ALT) +// Regular implementation +// + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief timer structure + */ +struct mbedtls_timing_hr_time +{ + unsigned char opaque[32]; +}; + +/** + * \brief Context for mbedtls_timing_set/get_delay() + */ +typedef struct +{ + struct mbedtls_timing_hr_time timer; + uint32_t int_ms; + uint32_t fin_ms; +} mbedtls_timing_delay_context; + +extern volatile int mbedtls_timing_alarmed; + +/** + * \brief Return the CPU cycle counter value + * + * \warning This is only a best effort! Do not rely on this! + * In particular, it is known to be unreliable on virtual + * machines. + */ +unsigned long mbedtls_timing_hardclock( void ); + +/** + * \brief Return the elapsed time in milliseconds + * + * \param val points to a timer structure + * \param reset if set to 1, the timer is restarted + */ +unsigned long mbedtls_timing_get_timer( struct mbedtls_timing_hr_time *val, int reset ); + +/** + * \brief Setup an alarm clock + * + * \param seconds delay before the "mbedtls_timing_alarmed" flag is set + * + * \warning Only one alarm at a time is supported. In a threaded + * context, this means one for the whole process, not one per + * thread. + */ +void mbedtls_set_alarm( int seconds ); + +/** + * \brief Set a pair of delays to watch + * (See \c mbedtls_timing_get_delay().) + * + * \param data Pointer to timing data + * Must point to a valid \c mbedtls_timing_delay_context struct. + * \param int_ms First (intermediate) delay in milliseconds. + * \param fin_ms Second (final) delay in milliseconds. + * Pass 0 to cancel the current delay. + */ +void mbedtls_timing_set_delay( void *data, uint32_t int_ms, uint32_t fin_ms ); + +/** + * \brief Get the status of delays + * (Memory helper: number of delays passed.) + * + * \param data Pointer to timing data + * Must point to a valid \c mbedtls_timing_delay_context struct. + * + * \return -1 if cancelled (fin_ms = 0) + * 0 if none of the delays are passed, + * 1 if only the intermediate delay is passed, + * 2 if the final delay is passed. + */ +int mbedtls_timing_get_delay( void *data ); + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_TIMING_ALT */ +#include "timing_alt.h" +#endif /* MBEDTLS_TIMING_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MBEDTLS_SELF_TEST) +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if a test failed + */ +int mbedtls_timing_self_test( int verbose ); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* timing.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/version.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/version.h new file mode 100644 index 0000000..ea2966e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/version.h @@ -0,0 +1,111 @@ +/** + * \file version.h + * + * \brief Run-time version information + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * This set of compile-time defines and run-time variables can be used to + * determine the version number of the mbed TLS library used. + */ +#ifndef MBEDTLS_VERSION_H +#define MBEDTLS_VERSION_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +/** + * The version number x.y.z is split into three parts. + * Major, Minor, Patchlevel + */ +#define MBEDTLS_VERSION_MAJOR 2 +#define MBEDTLS_VERSION_MINOR 2 +#define MBEDTLS_VERSION_PATCH 1 + +/** + * The single version number has the following structure: + * MMNNPP00 + * Major version | Minor version | Patch version + */ +#define MBEDTLS_VERSION_NUMBER 0x02020100 +#define MBEDTLS_VERSION_STRING "2.2.1" +#define MBEDTLS_VERSION_STRING_FULL "mbed TLS 2.2.1" + +#if defined(MBEDTLS_VERSION_C) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Get the version number. + * + * \return The constructed version number in the format + * MMNNPP00 (Major, Minor, Patch). + */ +unsigned int mbedtls_version_get_number( void ); + +/** + * Get the version string ("x.y.z"). + * + * \param string The string that will receive the value. + * (Should be at least 9 bytes in size) + */ +void mbedtls_version_get_string( char *string ); + +/** + * Get the full version string ("mbed TLS x.y.z"). + * + * \param string The string that will receive the value. The mbed TLS version + * string will use 18 bytes AT MOST including a terminating + * null byte. + * (So the buffer should be at least 18 bytes to receive this + * version string). + */ +void mbedtls_version_get_string_full( char *string ); + +/** + * \brief Check if support for a feature was compiled into this + * mbed TLS binary. This allows you to see at runtime if the + * library was for instance compiled with or without + * Multi-threading support. + * + * \note only checks against defines in the sections "System + * support", "mbed TLS modules" and "mbed TLS feature + * support" in config.h + * + * \param feature The string for the define to check (e.g. "MBEDTLS_AES_C") + * + * \return 0 if the feature is present, + * -1 if the feature is not present and + * -2 if support for feature checking as a whole was not + * compiled in. + */ +int mbedtls_version_check_feature( const char *feature ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_VERSION_C */ + +#endif /* version.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509.h new file mode 100644 index 0000000..54dac16 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509.h @@ -0,0 +1,331 @@ +/** + * \file x509.h + * + * \brief X.509 generic defines and structures + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_X509_H +#define MBEDTLS_X509_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "asn1.h" +#include "pk.h" + +#if defined(MBEDTLS_RSA_C) +#include "rsa.h" +#endif + +/** + * \addtogroup x509_module + * \{ + */ + +#if !defined(MBEDTLS_X509_MAX_INTERMEDIATE_CA) +/** + * Maximum number of intermediate CAs in a verification chain. + * That is, maximum length of the chain, excluding the end-entity certificate + * and the trusted root certificate. + * + * Set this to a low value to prevent an adversary from making you waste + * resources verifying an overlong certificate chain. + */ +#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 +#endif + +/** + * \name X509 Error codes + * \{ + */ +#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE -0x2080 /**< Unavailable feature, e.g. RSA hashing/encryption combination. */ +#define MBEDTLS_ERR_X509_UNKNOWN_OID -0x2100 /**< Requested OID is unknown. */ +#define MBEDTLS_ERR_X509_INVALID_FORMAT -0x2180 /**< The CRT/CRL/CSR format is invalid, e.g. different type expected. */ +#define MBEDTLS_ERR_X509_INVALID_VERSION -0x2200 /**< The CRT/CRL/CSR version element is invalid. */ +#define MBEDTLS_ERR_X509_INVALID_SERIAL -0x2280 /**< The serial tag or value is invalid. */ +#define MBEDTLS_ERR_X509_INVALID_ALG -0x2300 /**< The algorithm tag or value is invalid. */ +#define MBEDTLS_ERR_X509_INVALID_NAME -0x2380 /**< The name tag or value is invalid. */ +#define MBEDTLS_ERR_X509_INVALID_DATE -0x2400 /**< The date tag or value is invalid. */ +#define MBEDTLS_ERR_X509_INVALID_SIGNATURE -0x2480 /**< The signature tag or value invalid. */ +#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS -0x2500 /**< The extension tag or value is invalid. */ +#define MBEDTLS_ERR_X509_UNKNOWN_VERSION -0x2580 /**< CRT/CRL/CSR has an unsupported version number. */ +#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG -0x2600 /**< Signature algorithm (oid) is unsupported. */ +#define MBEDTLS_ERR_X509_SIG_MISMATCH -0x2680 /**< Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */ +#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED -0x2700 /**< Certificate verification failed, e.g. CRL, CA or signature check failed. */ +#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT -0x2780 /**< Format not recognized as DER or PEM. */ +#define MBEDTLS_ERR_X509_BAD_INPUT_DATA -0x2800 /**< Input invalid. */ +#define MBEDTLS_ERR_X509_ALLOC_FAILED -0x2880 /**< Allocation of memory failed. */ +#define MBEDTLS_ERR_X509_FILE_IO_ERROR -0x2900 /**< Read/write of file failed. */ +#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL -0x2980 /**< Destination buffer is too small. */ +/* \} name */ + +/** + * \name X509 Verify codes + * \{ + */ +/* Reminder: update x509_crt_verify_strings[] in library/x509_crt.c */ +#define MBEDTLS_X509_BADCERT_EXPIRED 0x01 /**< The certificate validity has expired. */ +#define MBEDTLS_X509_BADCERT_REVOKED 0x02 /**< The certificate has been revoked (is on a CRL). */ +#define MBEDTLS_X509_BADCERT_CN_MISMATCH 0x04 /**< The certificate Common Name (CN) does not match with the expected CN. */ +#define MBEDTLS_X509_BADCERT_NOT_TRUSTED 0x08 /**< The certificate is not correctly signed by the trusted CA. */ +#define MBEDTLS_X509_BADCRL_NOT_TRUSTED 0x10 /**< The CRL is not correctly signed by the trusted CA. */ +#define MBEDTLS_X509_BADCRL_EXPIRED 0x20 /**< The CRL is expired. */ +#define MBEDTLS_X509_BADCERT_MISSING 0x40 /**< Certificate was missing. */ +#define MBEDTLS_X509_BADCERT_SKIP_VERIFY 0x80 /**< Certificate verification was skipped. */ +#define MBEDTLS_X509_BADCERT_OTHER 0x0100 /**< Other reason (can be used by verify callback) */ +#define MBEDTLS_X509_BADCERT_FUTURE 0x0200 /**< The certificate validity starts in the future. */ +#define MBEDTLS_X509_BADCRL_FUTURE 0x0400 /**< The CRL is from the future */ +#define MBEDTLS_X509_BADCERT_KEY_USAGE 0x0800 /**< Usage does not match the keyUsage extension. */ +#define MBEDTLS_X509_BADCERT_EXT_KEY_USAGE 0x1000 /**< Usage does not match the extendedKeyUsage extension. */ +#define MBEDTLS_X509_BADCERT_NS_CERT_TYPE 0x2000 /**< Usage does not match the nsCertType extension. */ +#define MBEDTLS_X509_BADCERT_BAD_MD 0x4000 /**< The certificate is signed with an unacceptable hash. */ +#define MBEDTLS_X509_BADCERT_BAD_PK 0x8000 /**< The certificate is signed with an unacceptable PK alg (eg RSA vs ECDSA). */ +#define MBEDTLS_X509_BADCERT_BAD_KEY 0x010000 /**< The certificate is signed with an unacceptable key (eg bad curve, RSA too short). */ +#define MBEDTLS_X509_BADCRL_BAD_MD 0x020000 /**< The CRL is signed with an unacceptable hash. */ +#define MBEDTLS_X509_BADCRL_BAD_PK 0x040000 /**< The CRL is signed with an unacceptable PK alg (eg RSA vs ECDSA). */ +#define MBEDTLS_X509_BADCRL_BAD_KEY 0x080000 /**< The CRL is signed with an unacceptable key (eg bad curve, RSA too short). */ + +/* \} name */ +/* \} addtogroup x509_module */ + +/* + * X.509 v3 Key Usage Extension flags + * Reminder: update x509_info_key_usage() when adding new flags. + */ +#define MBEDTLS_X509_KU_DIGITAL_SIGNATURE (0x80) /* bit 0 */ +#define MBEDTLS_X509_KU_NON_REPUDIATION (0x40) /* bit 1 */ +#define MBEDTLS_X509_KU_KEY_ENCIPHERMENT (0x20) /* bit 2 */ +#define MBEDTLS_X509_KU_DATA_ENCIPHERMENT (0x10) /* bit 3 */ +#define MBEDTLS_X509_KU_KEY_AGREEMENT (0x08) /* bit 4 */ +#define MBEDTLS_X509_KU_KEY_CERT_SIGN (0x04) /* bit 5 */ +#define MBEDTLS_X509_KU_CRL_SIGN (0x02) /* bit 6 */ +#define MBEDTLS_X509_KU_ENCIPHER_ONLY (0x01) /* bit 7 */ +#define MBEDTLS_X509_KU_DECIPHER_ONLY (0x8000) /* bit 8 */ + +/* + * Netscape certificate types + * (http://www.mozilla.org/projects/security/pki/nss/tech-notes/tn3.html) + */ + +#define MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT (0x80) /* bit 0 */ +#define MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER (0x40) /* bit 1 */ +#define MBEDTLS_X509_NS_CERT_TYPE_EMAIL (0x20) /* bit 2 */ +#define MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING (0x10) /* bit 3 */ +#define MBEDTLS_X509_NS_CERT_TYPE_RESERVED (0x08) /* bit 4 */ +#define MBEDTLS_X509_NS_CERT_TYPE_SSL_CA (0x04) /* bit 5 */ +#define MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA (0x02) /* bit 6 */ +#define MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA (0x01) /* bit 7 */ + +/* + * X.509 extension types + * + * Comments refer to the status for using certificates. Status can be + * different for writing certificates or reading CRLs or CSRs. + */ +#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER (1 << 0) +#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER (1 << 1) +#define MBEDTLS_X509_EXT_KEY_USAGE (1 << 2) +#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES (1 << 3) +#define MBEDTLS_X509_EXT_POLICY_MAPPINGS (1 << 4) +#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME (1 << 5) /* Supported (DNS) */ +#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME (1 << 6) +#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS (1 << 7) +#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS (1 << 8) /* Supported */ +#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS (1 << 9) +#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS (1 << 10) +#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE (1 << 11) +#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS (1 << 12) +#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY (1 << 13) +#define MBEDTLS_X509_EXT_FRESHEST_CRL (1 << 14) + +#define MBEDTLS_X509_EXT_NS_CERT_TYPE (1 << 16) /* Parsed (and then ?) */ + +/* + * Storage format identifiers + * Recognized formats: PEM and DER + */ +#define MBEDTLS_X509_FORMAT_DER 1 +#define MBEDTLS_X509_FORMAT_PEM 2 + +#define MBEDTLS_X509_MAX_DN_NAME_SIZE 256 /**< Maximum value size of a DN entry */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup x509_module + * \{ */ + +/** + * \name Structures for parsing X.509 certificates, CRLs and CSRs + * \{ + */ + +/** + * Type-length-value structure that allows for ASN1 using DER. + */ +typedef mbedtls_asn1_buf mbedtls_x509_buf; + +/** + * Container for ASN1 bit strings. + */ +typedef mbedtls_asn1_bitstring mbedtls_x509_bitstring; + +/** + * Container for ASN1 named information objects. + * It allows for Relative Distinguished Names (e.g. cn=localhost,ou=code,etc.). + */ +typedef mbedtls_asn1_named_data mbedtls_x509_name; + +/** + * Container for a sequence of ASN.1 items + */ +typedef mbedtls_asn1_sequence mbedtls_x509_sequence; + +/** Container for date and time (precision in seconds). */ +typedef struct mbedtls_x509_time +{ + int year, mon, day; /**< Date. */ + int hour, min, sec; /**< Time. */ +} +mbedtls_x509_time; + +/** \} name Structures for parsing X.509 certificates, CRLs and CSRs */ +/** \} addtogroup x509_module */ + +/** + * \brief Store the certificate DN in printable form into buf; + * no more than size characters will be written. + * + * \param buf Buffer to write to + * \param size Maximum size of buffer + * \param dn The X509 name to represent + * + * \return The length of the string written (not including the + * terminated nul byte), or a negative error code. + */ +int mbedtls_x509_dn_gets( char *buf, size_t size, const mbedtls_x509_name *dn ); + +/** + * \brief Store the certificate serial in printable form into buf; + * no more than size characters will be written. + * + * \param buf Buffer to write to + * \param size Maximum size of buffer + * \param serial The X509 serial to represent + * + * \return The length of the string written (not including the + * terminated nul byte), or a negative error code. + */ +int mbedtls_x509_serial_gets( char *buf, size_t size, const mbedtls_x509_buf *serial ); + +/** + * \brief Check a given mbedtls_x509_time against the system time + * and tell if it's in the past. + * + * \note Intended usage is "if( is_past( valid_to ) ) ERROR". + * Hence the return value of 1 if on internal errors. + * + * \param time mbedtls_x509_time to check + * + * \return 1 if the given time is in the past or an error occured, + * 0 otherwise. + */ +int mbedtls_x509_time_is_past( const mbedtls_x509_time *time ); + +/** + * \brief Check a given mbedtls_x509_time against the system time + * and tell if it's in the future. + * + * \note Intended usage is "if( is_future( valid_from ) ) ERROR". + * Hence the return value of 1 if on internal errors. + * + * \param time mbedtls_x509_time to check + * + * \return 1 if the given time is in the future or an error occured, + * 0 otherwise. + */ +int mbedtls_x509_time_is_future( const mbedtls_x509_time *time ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_x509_self_test( int verbose ); + +/* + * Internal module functions. You probably do not want to use these unless you + * know you do. + */ +int mbedtls_x509_get_name( unsigned char **p, const unsigned char *end, + mbedtls_x509_name *cur ); +int mbedtls_x509_get_alg_null( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *alg ); +int mbedtls_x509_get_alg( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *alg, mbedtls_x509_buf *params ); +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) +int mbedtls_x509_get_rsassa_pss_params( const mbedtls_x509_buf *params, + mbedtls_md_type_t *md_alg, mbedtls_md_type_t *mgf_md, + int *salt_len ); +#endif +int mbedtls_x509_get_sig( unsigned char **p, const unsigned char *end, mbedtls_x509_buf *sig ); +int mbedtls_x509_get_sig_alg( const mbedtls_x509_buf *sig_oid, const mbedtls_x509_buf *sig_params, + mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg, + void **sig_opts ); +int mbedtls_x509_get_time( unsigned char **p, const unsigned char *end, + mbedtls_x509_time *time ); +int mbedtls_x509_get_serial( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *serial ); +int mbedtls_x509_get_ext( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *ext, int tag ); +int mbedtls_x509_sig_alg_gets( char *buf, size_t size, const mbedtls_x509_buf *sig_oid, + mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg, + const void *sig_opts ); +int mbedtls_x509_key_size_helper( char *buf, size_t buf_size, const char *name ); +int mbedtls_x509_string_to_names( mbedtls_asn1_named_data **head, const char *name ); +int mbedtls_x509_set_extension( mbedtls_asn1_named_data **head, const char *oid, size_t oid_len, + int critical, const unsigned char *val, + size_t val_len ); +int mbedtls_x509_write_extensions( unsigned char **p, unsigned char *start, + mbedtls_asn1_named_data *first ); +int mbedtls_x509_write_names( unsigned char **p, unsigned char *start, + mbedtls_asn1_named_data *first ); +int mbedtls_x509_write_sig( unsigned char **p, unsigned char *start, + const char *oid, size_t oid_len, + unsigned char *sig, size_t size ); + +#define MBEDTLS_X509_SAFE_SNPRINTF \ + do { \ + if( ret < 0 || (size_t) ret >= n ) \ + return( MBEDTLS_ERR_X509_BUFFER_TOO_SMALL ); \ + \ + n -= (size_t) ret; \ + p += (size_t) ret; \ + } while( 0 ) + +#ifdef __cplusplus +} +#endif + +#endif /* x509.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_crl.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_crl.h new file mode 100644 index 0000000..7988439 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_crl.h @@ -0,0 +1,173 @@ +/** + * \file x509_crl.h + * + * \brief X.509 certificate revocation list parsing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_X509_CRL_H +#define MBEDTLS_X509_CRL_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "x509.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup x509_module + * \{ */ + +/** + * \name Structures and functions for parsing CRLs + * \{ + */ + +/** + * Certificate revocation list entry. + * Contains the CA-specific serial numbers and revocation dates. + */ +typedef struct mbedtls_x509_crl_entry +{ + mbedtls_x509_buf raw; + + mbedtls_x509_buf serial; + + mbedtls_x509_time revocation_date; + + mbedtls_x509_buf entry_ext; + + struct mbedtls_x509_crl_entry *next; +} +mbedtls_x509_crl_entry; + +/** + * Certificate revocation list structure. + * Every CRL may have multiple entries. + */ +typedef struct mbedtls_x509_crl +{ + mbedtls_x509_buf raw; /**< The raw certificate data (DER). */ + mbedtls_x509_buf tbs; /**< The raw certificate body (DER). The part that is To Be Signed. */ + + int version; /**< CRL version (1=v1, 2=v2) */ + mbedtls_x509_buf sig_oid; /**< CRL signature type identifier */ + + mbedtls_x509_buf issuer_raw; /**< The raw issuer data (DER). */ + + mbedtls_x509_name issuer; /**< The parsed issuer data (named information object). */ + + mbedtls_x509_time this_update; + mbedtls_x509_time next_update; + + mbedtls_x509_crl_entry entry; /**< The CRL entries containing the certificate revocation times for this CA. */ + + mbedtls_x509_buf crl_ext; + + mbedtls_x509_buf sig_oid2; + mbedtls_x509_buf sig; + mbedtls_md_type_t sig_md; /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */ + mbedtls_pk_type_t sig_pk; /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */ + void *sig_opts; /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */ + + struct mbedtls_x509_crl *next; +} +mbedtls_x509_crl; + +/** + * \brief Parse a DER-encoded CRL and append it to the chained list + * + * \param chain points to the start of the chain + * \param buf buffer holding the CRL data in DER format + * \param buflen size of the buffer + * (including the terminating null byte for PEM data) + * + * \return 0 if successful, or a specific X509 or PEM error code + */ +int mbedtls_x509_crl_parse_der( mbedtls_x509_crl *chain, + const unsigned char *buf, size_t buflen ); +/** + * \brief Parse one or more CRLs and append them to the chained list + * + * \note Mutliple CRLs are accepted only if using PEM format + * + * \param chain points to the start of the chain + * \param buf buffer holding the CRL data in PEM or DER format + * \param buflen size of the buffer + * (including the terminating null byte for PEM data) + * + * \return 0 if successful, or a specific X509 or PEM error code + */ +int mbedtls_x509_crl_parse( mbedtls_x509_crl *chain, const unsigned char *buf, size_t buflen ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Load one or more CRLs and append them to the chained list + * + * \note Mutliple CRLs are accepted only if using PEM format + * + * \param chain points to the start of the chain + * \param path filename to read the CRLs from (in PEM or DER encoding) + * + * \return 0 if successful, or a specific X509 or PEM error code + */ +int mbedtls_x509_crl_parse_file( mbedtls_x509_crl *chain, const char *path ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief Returns an informational string about the CRL. + * + * \param buf Buffer to write to + * \param size Maximum size of buffer + * \param prefix A line prefix + * \param crl The X509 CRL to represent + * + * \return The length of the string written (not including the + * terminated nul byte), or a negative error code. + */ +int mbedtls_x509_crl_info( char *buf, size_t size, const char *prefix, + const mbedtls_x509_crl *crl ); + +/** + * \brief Initialize a CRL (chain) + * + * \param crl CRL chain to initialize + */ +void mbedtls_x509_crl_init( mbedtls_x509_crl *crl ); + +/** + * \brief Unallocate all CRL data + * + * \param crl CRL chain to free + */ +void mbedtls_x509_crl_free( mbedtls_x509_crl *crl ); + +/* \} name */ +/* \} addtogroup x509_module */ + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_x509_crl.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_crt.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_crt.h new file mode 100644 index 0000000..fe821d1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_crt.h @@ -0,0 +1,645 @@ +/** + * \file x509_crt.h + * + * \brief X.509 certificate parsing and writing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_X509_CRT_H +#define MBEDTLS_X509_CRT_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "x509.h" +#include "x509_crl.h" + +/** + * \addtogroup x509_module + * \{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \name Structures and functions for parsing and writing X.509 certificates + * \{ + */ + +/** + * Container for an X.509 certificate. The certificate may be chained. + */ +typedef struct mbedtls_x509_crt +{ + mbedtls_x509_buf raw; /**< The raw certificate data (DER). */ + mbedtls_x509_buf tbs; /**< The raw certificate body (DER). The part that is To Be Signed. */ + + int version; /**< The X.509 version. (1=v1, 2=v2, 3=v3) */ + mbedtls_x509_buf serial; /**< Unique id for certificate issued by a specific CA. */ + mbedtls_x509_buf sig_oid; /**< Signature algorithm, e.g. sha1RSA */ + + mbedtls_x509_buf issuer_raw; /**< The raw issuer data (DER). Used for quick comparison. */ + mbedtls_x509_buf subject_raw; /**< The raw subject data (DER). Used for quick comparison. */ + + mbedtls_x509_name issuer; /**< The parsed issuer data (named information object). */ + mbedtls_x509_name subject; /**< The parsed subject data (named information object). */ + + mbedtls_x509_time valid_from; /**< Start time of certificate validity. */ + mbedtls_x509_time valid_to; /**< End time of certificate validity. */ + + mbedtls_pk_context pk; /**< Container for the public key context. */ + + mbedtls_x509_buf issuer_id; /**< Optional X.509 v2/v3 issuer unique identifier. */ + mbedtls_x509_buf subject_id; /**< Optional X.509 v2/v3 subject unique identifier. */ + mbedtls_x509_buf v3_ext; /**< Optional X.509 v3 extensions. */ + mbedtls_x509_sequence subject_alt_names; /**< Optional list of Subject Alternative Names (Only dNSName supported). */ + + int ext_types; /**< Bit string containing detected and parsed extensions */ + int ca_istrue; /**< Optional Basic Constraint extension value: 1 if this certificate belongs to a CA, 0 otherwise. */ + int max_pathlen; /**< Optional Basic Constraint extension value: The maximum path length to the root certificate. Path length is 1 higher than RFC 5280 'meaning', so 1+ */ + + unsigned int key_usage; /**< Optional key usage extension value: See the values in x509.h */ + + mbedtls_x509_sequence ext_key_usage; /**< Optional list of extended key usage OIDs. */ + + unsigned char ns_cert_type; /**< Optional Netscape certificate type extension value: See the values in x509.h */ + + mbedtls_x509_buf sig; /**< Signature: hash of the tbs part signed with the private key. */ + mbedtls_md_type_t sig_md; /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */ + mbedtls_pk_type_t sig_pk; /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */ + void *sig_opts; /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */ + + struct mbedtls_x509_crt *next; /**< Next certificate in the CA-chain. */ +} +mbedtls_x509_crt; + +/** + * Build flag from an algorithm/curve identifier (pk, md, ecp) + * Since 0 is always XXX_NONE, ignore it. + */ +#define MBEDTLS_X509_ID_FLAG( id ) ( 1 << ( id - 1 ) ) + +/** + * Security profile for certificate verification. + * + * All lists are bitfields, built by ORing flags from MBEDTLS_X509_ID_FLAG(). + */ +typedef struct +{ + uint32_t allowed_mds; /**< MDs for signatures */ + uint32_t allowed_pks; /**< PK algs for signatures */ + uint32_t allowed_curves; /**< Elliptic curves for ECDSA */ + uint32_t rsa_min_bitlen; /**< Minimum size for RSA keys */ +} +mbedtls_x509_crt_profile; + +#define MBEDTLS_X509_CRT_VERSION_1 0 +#define MBEDTLS_X509_CRT_VERSION_2 1 +#define MBEDTLS_X509_CRT_VERSION_3 2 + +#define MBEDTLS_X509_RFC5280_MAX_SERIAL_LEN 32 +#define MBEDTLS_X509_RFC5280_UTC_TIME_LEN 15 + +/** + * Container for writing a certificate (CRT) + */ +typedef struct mbedtls_x509write_cert +{ + int version; + mbedtls_mpi serial; + mbedtls_pk_context *subject_key; + mbedtls_pk_context *issuer_key; + mbedtls_asn1_named_data *subject; + mbedtls_asn1_named_data *issuer; + mbedtls_md_type_t md_alg; + char not_before[MBEDTLS_X509_RFC5280_UTC_TIME_LEN + 1]; + char not_after[MBEDTLS_X509_RFC5280_UTC_TIME_LEN + 1]; + mbedtls_asn1_named_data *extensions; +} +mbedtls_x509write_cert; + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +/** + * Default security profile. Should provide a good balance between security + * and compatibility with current deployments. + */ +extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default; + +/** + * Expected next default profile. Recommended for new deployments. + * Currently targets a 128-bit security level, except for RSA-2048. + */ +extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next; + +/** + * NSA Suite B profile. + */ +extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb; + +/** + * \brief Parse a single DER formatted certificate and add it + * to the chained list. + * + * \param chain points to the start of the chain + * \param buf buffer holding the certificate DER data + * \param buflen size of the buffer + * + * \return 0 if successful, or a specific X509 or PEM error code + */ +int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain, const unsigned char *buf, + size_t buflen ); + +/** + * \brief Parse one or more certificates and add them + * to the chained list. Parses permissively. If some + * certificates can be parsed, the result is the number + * of failed certificates it encountered. If none complete + * correctly, the first error is returned. + * + * \param chain points to the start of the chain + * \param buf buffer holding the certificate data in PEM or DER format + * \param buflen size of the buffer + * (including the terminating null byte for PEM data) + * + * \return 0 if all certificates parsed successfully, a positive number + * if partly successful or a specific X509 or PEM error code + */ +int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, const unsigned char *buf, size_t buflen ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Load one or more certificates and add them + * to the chained list. Parses permissively. If some + * certificates can be parsed, the result is the number + * of failed certificates it encountered. If none complete + * correctly, the first error is returned. + * + * \param chain points to the start of the chain + * \param path filename to read the certificates from + * + * \return 0 if all certificates parsed successfully, a positive number + * if partly successful or a specific X509 or PEM error code + */ +int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path ); + +/** + * \brief Load one or more certificate files from a path and add them + * to the chained list. Parses permissively. If some + * certificates can be parsed, the result is the number + * of failed certificates it encountered. If none complete + * correctly, the first error is returned. + * + * \param chain points to the start of the chain + * \param path directory / folder to read the certificate files from + * + * \return 0 if all certificates parsed successfully, a positive number + * if partly successful or a specific X509 or PEM error code + */ +int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief Returns an informational string about the + * certificate. + * + * \param buf Buffer to write to + * \param size Maximum size of buffer + * \param prefix A line prefix + * \param crt The X509 certificate to represent + * + * \return The length of the string written (not including the + * terminated nul byte), or a negative error code. + */ +int mbedtls_x509_crt_info( char *buf, size_t size, const char *prefix, + const mbedtls_x509_crt *crt ); + +/** + * \brief Returns an informational string about the + * verification status of a certificate. + * + * \param buf Buffer to write to + * \param size Maximum size of buffer + * \param prefix A line prefix + * \param flags Verification flags created by mbedtls_x509_crt_verify() + * + * \return The length of the string written (not including the + * terminated nul byte), or a negative error code. + */ +int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix, + uint32_t flags ); + +/** + * \brief Verify the certificate signature + * + * The verify callback is a user-supplied callback that + * can clear / modify / add flags for a certificate. If set, + * the verification callback is called for each + * certificate in the chain (from the trust-ca down to the + * presented crt). The parameters for the callback are: + * (void *parameter, mbedtls_x509_crt *crt, int certificate_depth, + * int *flags). With the flags representing current flags for + * that specific certificate and the certificate depth from + * the bottom (Peer cert depth = 0). + * + * All flags left after returning from the callback + * are also returned to the application. The function should + * return 0 for anything but a fatal error. + * + * \note In case verification failed, the results can be displayed + * using \c mbedtls_x509_crt_verify_info() + * + * \note Same as \c mbedtls_x509_crt_verify_with_profile() with the + * default security profile. + * + * \param crt a certificate to be verified + * \param trust_ca the trusted CA chain + * \param ca_crl the CRL chain for trusted CA's + * \param cn expected Common Name (can be set to + * NULL if the CN must not be verified) + * \param flags result of the verification + * \param f_vrfy verification function + * \param p_vrfy verification parameter + * + * \return 0 if successful or MBEDTLS_ERR_X509_CERT_VERIFY_FAILED + * in which case *flags will have one or more + * MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX flags + * set, + * or another error in case of a fatal error encountered + * during the verification process. + */ +int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ); + +/** + * \brief Verify the certificate signature according to profile + * + * \note Same as \c mbedtls_x509_crt_verify(), but with explicit + * security profile. + * + * \note The restrictions on keys (RSA minimum size, allowed curves + * for ECDSA) apply to all certificates: trusted root, + * intermediate CAs if any, and end entity certificate. + * + * \param crt a certificate to be verified + * \param trust_ca the trusted CA chain + * \param ca_crl the CRL chain for trusted CA's + * \param profile security profile for verification + * \param cn expected Common Name (can be set to + * NULL if the CN must not be verified) + * \param flags result of the verification + * \param f_vrfy verification function + * \param p_vrfy verification parameter + * + * \return 0 if successful or MBEDTLS_ERR_X509_CERT_VERIFY_FAILED + * in which case *flags will have one or more + * MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX flags + * set, + * or another error in case of a fatal error encountered + * during the verification process. + */ +int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const mbedtls_x509_crt_profile *profile, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ); + +#if defined(MBEDTLS_X509_CHECK_KEY_USAGE) +/** + * \brief Check usage of certificate against keyUsage extension. + * + * \param crt Leaf certificate used. + * \param usage Intended usage(s) (eg MBEDTLS_X509_KU_KEY_ENCIPHERMENT + * before using the certificate to perform an RSA key + * exchange). + * + * \note Except for decipherOnly and encipherOnly, a bit set in the + * usage argument means this bit MUST be set in the + * certificate. For decipherOnly and encipherOnly, it means + * that bit MAY be set. + * + * \return 0 is these uses of the certificate are allowed, + * MBEDTLS_ERR_X509_BAD_INPUT_DATA if the keyUsage extension + * is present but does not match the usage argument. + * + * \note You should only call this function on leaf certificates, on + * (intermediate) CAs the keyUsage extension is automatically + * checked by \c mbedtls_x509_crt_verify(). + */ +int mbedtls_x509_crt_check_key_usage( const mbedtls_x509_crt *crt, + unsigned int usage ); +#endif /* MBEDTLS_X509_CHECK_KEY_USAGE) */ + +#if defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) +/** + * \brief Check usage of certificate against extentedJeyUsage. + * + * \param crt Leaf certificate used. + * \param usage_oid Intended usage (eg MBEDTLS_OID_SERVER_AUTH or MBEDTLS_OID_CLIENT_AUTH). + * \param usage_len Length of usage_oid (eg given by MBEDTLS_OID_SIZE()). + * + * \return 0 if this use of the certificate is allowed, + * MBEDTLS_ERR_X509_BAD_INPUT_DATA if not. + * + * \note Usually only makes sense on leaf certificates. + */ +int mbedtls_x509_crt_check_extended_key_usage( const mbedtls_x509_crt *crt, + const char *usage_oid, + size_t usage_len ); +#endif /* MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) */ + +#if defined(MBEDTLS_X509_CRL_PARSE_C) +/** + * \brief Verify the certificate revocation status + * + * \param crt a certificate to be verified + * \param crl the CRL to verify against + * + * \return 1 if the certificate is revoked, 0 otherwise + * + */ +int mbedtls_x509_crt_is_revoked( const mbedtls_x509_crt *crt, const mbedtls_x509_crl *crl ); +#endif /* MBEDTLS_X509_CRL_PARSE_C */ + +/** + * \brief Initialize a certificate (chain) + * + * \param crt Certificate chain to initialize + */ +void mbedtls_x509_crt_init( mbedtls_x509_crt *crt ); + +/** + * \brief Unallocate all certificate data + * + * \param crt Certificate chain to free + */ +void mbedtls_x509_crt_free( mbedtls_x509_crt *crt ); +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +/* \} name */ +/* \} addtogroup x509_module */ + +#if defined(MBEDTLS_X509_CRT_WRITE_C) +/** + * \brief Initialize a CRT writing context + * + * \param ctx CRT context to initialize + */ +void mbedtls_x509write_crt_init( mbedtls_x509write_cert *ctx ); + +/** + * \brief Set the verion for a Certificate + * Default: MBEDTLS_X509_CRT_VERSION_3 + * + * \param ctx CRT context to use + * \param version version to set (MBEDTLS_X509_CRT_VERSION_1, MBEDTLS_X509_CRT_VERSION_2 or + * MBEDTLS_X509_CRT_VERSION_3) + */ +void mbedtls_x509write_crt_set_version( mbedtls_x509write_cert *ctx, int version ); + +/** + * \brief Set the serial number for a Certificate. + * + * \param ctx CRT context to use + * \param serial serial number to set + * + * \return 0 if successful + */ +int mbedtls_x509write_crt_set_serial( mbedtls_x509write_cert *ctx, const mbedtls_mpi *serial ); + +/** + * \brief Set the validity period for a Certificate + * Timestamps should be in string format for UTC timezone + * i.e. "YYYYMMDDhhmmss" + * e.g. "20131231235959" for December 31st 2013 + * at 23:59:59 + * + * \param ctx CRT context to use + * \param not_before not_before timestamp + * \param not_after not_after timestamp + * + * \return 0 if timestamp was parsed successfully, or + * a specific error code + */ +int mbedtls_x509write_crt_set_validity( mbedtls_x509write_cert *ctx, const char *not_before, + const char *not_after ); + +/** + * \brief Set the issuer name for a Certificate + * Issuer names should contain a comma-separated list + * of OID types and values: + * e.g. "C=UK,O=ARM,CN=mbed TLS CA" + * + * \param ctx CRT context to use + * \param issuer_name issuer name to set + * + * \return 0 if issuer name was parsed successfully, or + * a specific error code + */ +int mbedtls_x509write_crt_set_issuer_name( mbedtls_x509write_cert *ctx, + const char *issuer_name ); + +/** + * \brief Set the subject name for a Certificate + * Subject names should contain a comma-separated list + * of OID types and values: + * e.g. "C=UK,O=ARM,CN=mbed TLS Server 1" + * + * \param ctx CRT context to use + * \param subject_name subject name to set + * + * \return 0 if subject name was parsed successfully, or + * a specific error code + */ +int mbedtls_x509write_crt_set_subject_name( mbedtls_x509write_cert *ctx, + const char *subject_name ); + +/** + * \brief Set the subject public key for the certificate + * + * \param ctx CRT context to use + * \param key public key to include + */ +void mbedtls_x509write_crt_set_subject_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key ); + +/** + * \brief Set the issuer key used for signing the certificate + * + * \param ctx CRT context to use + * \param key private key to sign with + */ +void mbedtls_x509write_crt_set_issuer_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key ); + +/** + * \brief Set the MD algorithm to use for the signature + * (e.g. MBEDTLS_MD_SHA1) + * + * \param ctx CRT context to use + * \param md_alg MD algorithm to use + */ +void mbedtls_x509write_crt_set_md_alg( mbedtls_x509write_cert *ctx, mbedtls_md_type_t md_alg ); + +/** + * \brief Generic function to add to or replace an extension in the + * CRT + * + * \param ctx CRT context to use + * \param oid OID of the extension + * \param oid_len length of the OID + * \param critical if the extension is critical (per the RFC's definition) + * \param val value of the extension OCTET STRING + * \param val_len length of the value data + * + * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_crt_set_extension( mbedtls_x509write_cert *ctx, + const char *oid, size_t oid_len, + int critical, + const unsigned char *val, size_t val_len ); + +/** + * \brief Set the basicConstraints extension for a CRT + * + * \param ctx CRT context to use + * \param is_ca is this a CA certificate + * \param max_pathlen maximum length of certificate chains below this + * certificate (only for CA certificates, -1 is + * inlimited) + * + * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_crt_set_basic_constraints( mbedtls_x509write_cert *ctx, + int is_ca, int max_pathlen ); + +#if defined(MBEDTLS_SHA1_C) +/** + * \brief Set the subjectKeyIdentifier extension for a CRT + * Requires that mbedtls_x509write_crt_set_subject_key() has been + * called before + * + * \param ctx CRT context to use + * + * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_crt_set_subject_key_identifier( mbedtls_x509write_cert *ctx ); + +/** + * \brief Set the authorityKeyIdentifier extension for a CRT + * Requires that mbedtls_x509write_crt_set_issuer_key() has been + * called before + * + * \param ctx CRT context to use + * + * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_crt_set_authority_key_identifier( mbedtls_x509write_cert *ctx ); +#endif /* MBEDTLS_SHA1_C */ + +/** + * \brief Set the Key Usage Extension flags + * (e.g. MBEDTLS_X509_KU_DIGITAL_SIGNATURE | MBEDTLS_X509_KU_KEY_CERT_SIGN) + * + * \param ctx CRT context to use + * \param key_usage key usage flags to set + * + * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_crt_set_key_usage( mbedtls_x509write_cert *ctx, + unsigned int key_usage ); + +/** + * \brief Set the Netscape Cert Type flags + * (e.g. MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT | MBEDTLS_X509_NS_CERT_TYPE_EMAIL) + * + * \param ctx CRT context to use + * \param ns_cert_type Netscape Cert Type flags to set + * + * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_crt_set_ns_cert_type( mbedtls_x509write_cert *ctx, + unsigned char ns_cert_type ); + +/** + * \brief Free the contents of a CRT write context + * + * \param ctx CRT context to free + */ +void mbedtls_x509write_crt_free( mbedtls_x509write_cert *ctx ); + +/** + * \brief Write a built up certificate to a X509 DER structure + * Note: data is written at the end of the buffer! Use the + * return value to determine where you should start + * using the buffer + * + * \param ctx certificate to write away + * \param buf buffer to write to + * \param size size of the buffer + * \param f_rng RNG function (for signature, see note) + * \param p_rng RNG parameter + * + * \return length of data written if successful, or a specific + * error code + * + * \note f_rng may be NULL if RSA is used for signature and the + * signature is made offline (otherwise f_rng is desirable + * for countermeasures against timing attacks). + * ECDSA signatures always require a non-NULL f_rng. + */ +int mbedtls_x509write_crt_der( mbedtls_x509write_cert *ctx, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +#if defined(MBEDTLS_PEM_WRITE_C) +/** + * \brief Write a built up certificate to a X509 PEM string + * + * \param ctx certificate to write away + * \param buf buffer to write to + * \param size size of the buffer + * \param f_rng RNG function (for signature, see note) + * \param p_rng RNG parameter + * + * \return 0 if successful, or a specific error code + * + * \note f_rng may be NULL if RSA is used for signature and the + * signature is made offline (otherwise f_rng is desirable + * for countermeasures against timing attacks). + * ECDSA signatures always require a non-NULL f_rng. + */ +int mbedtls_x509write_crt_pem( mbedtls_x509write_cert *ctx, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); +#endif /* MBEDTLS_PEM_WRITE_C */ +#endif /* MBEDTLS_X509_CRT_WRITE_C */ + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_x509_crt.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_csr.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_csr.h new file mode 100644 index 0000000..34998a3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/x509_csr.h @@ -0,0 +1,292 @@ +/** + * \file x509_csr.h + * + * \brief X.509 certificate signing request parsing and writing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_X509_CSR_H +#define MBEDTLS_X509_CSR_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "x509.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup x509_module + * \{ */ + +/** + * \name Structures and functions for X.509 Certificate Signing Requests (CSR) + * \{ + */ + +/** + * Certificate Signing Request (CSR) structure. + */ +typedef struct mbedtls_x509_csr +{ + mbedtls_x509_buf raw; /**< The raw CSR data (DER). */ + mbedtls_x509_buf cri; /**< The raw CertificateRequestInfo body (DER). */ + + int version; /**< CSR version (1=v1). */ + + mbedtls_x509_buf subject_raw; /**< The raw subject data (DER). */ + mbedtls_x509_name subject; /**< The parsed subject data (named information object). */ + + mbedtls_pk_context pk; /**< Container for the public key context. */ + + mbedtls_x509_buf sig_oid; + mbedtls_x509_buf sig; + mbedtls_md_type_t sig_md; /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */ + mbedtls_pk_type_t sig_pk; /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */ + void *sig_opts; /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */ +} +mbedtls_x509_csr; + +/** + * Container for writing a CSR + */ +typedef struct mbedtls_x509write_csr +{ + mbedtls_pk_context *key; + mbedtls_asn1_named_data *subject; + mbedtls_md_type_t md_alg; + mbedtls_asn1_named_data *extensions; +} +mbedtls_x509write_csr; + +#if defined(MBEDTLS_X509_CSR_PARSE_C) +/** + * \brief Load a Certificate Signing Request (CSR) in DER format + * + * \param csr CSR context to fill + * \param buf buffer holding the CRL data + * \param buflen size of the buffer + * + * \return 0 if successful, or a specific X509 error code + */ +int mbedtls_x509_csr_parse_der( mbedtls_x509_csr *csr, + const unsigned char *buf, size_t buflen ); + +/** + * \brief Load a Certificate Signing Request (CSR), DER or PEM format + * + * \param csr CSR context to fill + * \param buf buffer holding the CRL data + * \param buflen size of the buffer + * (including the terminating null byte for PEM data) + * + * \return 0 if successful, or a specific X509 or PEM error code + */ +int mbedtls_x509_csr_parse( mbedtls_x509_csr *csr, const unsigned char *buf, size_t buflen ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Load a Certificate Signing Request (CSR) + * + * \param csr CSR context to fill + * \param path filename to read the CSR from + * + * \return 0 if successful, or a specific X509 or PEM error code + */ +int mbedtls_x509_csr_parse_file( mbedtls_x509_csr *csr, const char *path ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief Returns an informational string about the + * CSR. + * + * \param buf Buffer to write to + * \param size Maximum size of buffer + * \param prefix A line prefix + * \param csr The X509 CSR to represent + * + * \return The length of the string written (not including the + * terminated nul byte), or a negative error code. + */ +int mbedtls_x509_csr_info( char *buf, size_t size, const char *prefix, + const mbedtls_x509_csr *csr ); + +/** + * \brief Initialize a CSR + * + * \param csr CSR to initialize + */ +void mbedtls_x509_csr_init( mbedtls_x509_csr *csr ); + +/** + * \brief Unallocate all CSR data + * + * \param csr CSR to free + */ +void mbedtls_x509_csr_free( mbedtls_x509_csr *csr ); +#endif /* MBEDTLS_X509_CSR_PARSE_C */ + +/* \} name */ +/* \} addtogroup x509_module */ + +#if defined(MBEDTLS_X509_CSR_WRITE_C) +/** + * \brief Initialize a CSR context + * + * \param ctx CSR context to initialize + */ +void mbedtls_x509write_csr_init( mbedtls_x509write_csr *ctx ); + +/** + * \brief Set the subject name for a CSR + * Subject names should contain a comma-separated list + * of OID types and values: + * e.g. "C=UK,O=ARM,CN=mbed TLS Server 1" + * + * \param ctx CSR context to use + * \param subject_name subject name to set + * + * \return 0 if subject name was parsed successfully, or + * a specific error code + */ +int mbedtls_x509write_csr_set_subject_name( mbedtls_x509write_csr *ctx, + const char *subject_name ); + +/** + * \brief Set the key for a CSR (public key will be included, + * private key used to sign the CSR when writing it) + * + * \param ctx CSR context to use + * \param key Asymetric key to include + */ +void mbedtls_x509write_csr_set_key( mbedtls_x509write_csr *ctx, mbedtls_pk_context *key ); + +/** + * \brief Set the MD algorithm to use for the signature + * (e.g. MBEDTLS_MD_SHA1) + * + * \param ctx CSR context to use + * \param md_alg MD algorithm to use + */ +void mbedtls_x509write_csr_set_md_alg( mbedtls_x509write_csr *ctx, mbedtls_md_type_t md_alg ); + +/** + * \brief Set the Key Usage Extension flags + * (e.g. MBEDTLS_X509_KU_DIGITAL_SIGNATURE | MBEDTLS_X509_KU_KEY_CERT_SIGN) + * + * \param ctx CSR context to use + * \param key_usage key usage flags to set + * + * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_csr_set_key_usage( mbedtls_x509write_csr *ctx, unsigned char key_usage ); + +/** + * \brief Set the Netscape Cert Type flags + * (e.g. MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT | MBEDTLS_X509_NS_CERT_TYPE_EMAIL) + * + * \param ctx CSR context to use + * \param ns_cert_type Netscape Cert Type flags to set + * + * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_csr_set_ns_cert_type( mbedtls_x509write_csr *ctx, + unsigned char ns_cert_type ); + +/** + * \brief Generic function to add to or replace an extension in the + * CSR + * + * \param ctx CSR context to use + * \param oid OID of the extension + * \param oid_len length of the OID + * \param val value of the extension OCTET STRING + * \param val_len length of the value data + * + * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED + */ +int mbedtls_x509write_csr_set_extension( mbedtls_x509write_csr *ctx, + const char *oid, size_t oid_len, + const unsigned char *val, size_t val_len ); + +/** + * \brief Free the contents of a CSR context + * + * \param ctx CSR context to free + */ +void mbedtls_x509write_csr_free( mbedtls_x509write_csr *ctx ); + +/** + * \brief Write a CSR (Certificate Signing Request) to a + * DER structure + * Note: data is written at the end of the buffer! Use the + * return value to determine where you should start + * using the buffer + * + * \param ctx CSR to write away + * \param buf buffer to write to + * \param size size of the buffer + * \param f_rng RNG function (for signature, see note) + * \param p_rng RNG parameter + * + * \return length of data written if successful, or a specific + * error code + * + * \note f_rng may be NULL if RSA is used for signature and the + * signature is made offline (otherwise f_rng is desirable + * for countermeasures against timing attacks). + * ECDSA signatures always require a non-NULL f_rng. + */ +int mbedtls_x509write_csr_der( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +#if defined(MBEDTLS_PEM_WRITE_C) +/** + * \brief Write a CSR (Certificate Signing Request) to a + * PEM string + * + * \param ctx CSR to write away + * \param buf buffer to write to + * \param size size of the buffer + * \param f_rng RNG function (for signature, see note) + * \param p_rng RNG parameter + * + * \return 0 if successful, or a specific error code + * + * \note f_rng may be NULL if RSA is used for signature and the + * signature is made offline (otherwise f_rng is desirable + * for couermeasures against timing attacks). + * ECDSA signatures always require a non-NULL f_rng. + */ +int mbedtls_x509write_csr_pem( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); +#endif /* MBEDTLS_PEM_WRITE_C */ +#endif /* MBEDTLS_X509_CSR_WRITE_C */ + +#ifdef __cplusplus +} +#endif + +#endif /* mbedtls_x509_csr.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/xtea.h b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/xtea.h new file mode 100644 index 0000000..b073f84 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/mbedtls/xtea.h @@ -0,0 +1,139 @@ +/** + * \file xtea.h + * + * \brief XTEA block cipher (32-bit) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +#ifndef MBEDTLS_XTEA_H +#define MBEDTLS_XTEA_H + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include + +#define MBEDTLS_XTEA_ENCRYPT 1 +#define MBEDTLS_XTEA_DECRYPT 0 + +#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH -0x0028 /**< The data input has an invalid length. */ + +#if !defined(MBEDTLS_XTEA_ALT) +// Regular implementation +// + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief XTEA context structure + */ +typedef struct +{ + uint32_t k[4]; /*!< key */ +} +mbedtls_xtea_context; + +/** + * \brief Initialize XTEA context + * + * \param ctx XTEA context to be initialized + */ +void mbedtls_xtea_init( mbedtls_xtea_context *ctx ); + +/** + * \brief Clear XTEA context + * + * \param ctx XTEA context to be cleared + */ +void mbedtls_xtea_free( mbedtls_xtea_context *ctx ); + +/** + * \brief XTEA key schedule + * + * \param ctx XTEA context to be initialized + * \param key the secret key + */ +void mbedtls_xtea_setup( mbedtls_xtea_context *ctx, const unsigned char key[16] ); + +/** + * \brief XTEA cipher function + * + * \param ctx XTEA context + * \param mode MBEDTLS_XTEA_ENCRYPT or MBEDTLS_XTEA_DECRYPT + * \param input 8-byte input block + * \param output 8-byte output block + * + * \return 0 if successful + */ +int mbedtls_xtea_crypt_ecb( mbedtls_xtea_context *ctx, + int mode, + const unsigned char input[8], + unsigned char output[8] ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/** + * \brief XTEA CBC cipher function + * + * \param ctx XTEA context + * \param mode MBEDTLS_XTEA_ENCRYPT or MBEDTLS_XTEA_DECRYPT + * \param length the length of input, multiple of 8 + * \param iv initialization vector for CBC mode + * \param input input block + * \param output output block + * + * \return 0 if successful, + * MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH if the length % 8 != 0 + */ +int mbedtls_xtea_crypt_cbc( mbedtls_xtea_context *ctx, + int mode, + size_t length, + unsigned char iv[8], + const unsigned char *input, + unsigned char *output); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#ifdef __cplusplus +} +#endif + +#else /* MBEDTLS_XTEA_ALT */ +#include "xtea_alt.h" +#endif /* MBEDTLS_XTEA_ALT */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_xtea_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* xtea.h */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/netif/etharp.h b/examples/ESP8266_NONOS_SDK/third_party/include/netif/etharp.h new file mode 100644 index 0000000..2092ab7 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/netif/etharp.h @@ -0,0 +1,254 @@ +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * Copyright (c) 2003-2004 Leon Woestenberg + * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __NETIF_ETHARP_H__ +#define __NETIF_ETHARP_H__ + +#include "lwip/opt.h" + +#if LWIP_ARP || LWIP_ETHERNET /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef ETHARP_HWADDR_LEN +#define ETHARP_HWADDR_LEN 6 +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct eth_addr { + PACK_STRUCT_FIELD(u8_t addr[ETHARP_HWADDR_LEN]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** Ethernet header */ +struct eth_hdr { +#if ETH_PAD_SIZE + PACK_STRUCT_FIELD(u8_t padding[ETH_PAD_SIZE]); +#endif + PACK_STRUCT_FIELD(struct eth_addr dest); + PACK_STRUCT_FIELD(struct eth_addr src); + PACK_STRUCT_FIELD(u16_t type); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_ETH_HDR (14 + ETH_PAD_SIZE) + +#if ETHARP_SUPPORT_VLAN + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** VLAN header inserted between ethernet header and payload + * if 'type' in ethernet header is ETHTYPE_VLAN. + * See IEEE802.Q */ +struct eth_vlan_hdr { + PACK_STRUCT_FIELD(u16_t tpid); + PACK_STRUCT_FIELD(u16_t prio_vid); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_VLAN_HDR 4 +#define VLAN_ID(vlan_hdr) (htons((vlan_hdr)->prio_vid) & 0xFFF) + +#endif /* ETHARP_SUPPORT_VLAN */ + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** the ARP message, see RFC 826 ("Packet format") */ +struct etharp_hdr { + PACK_STRUCT_FIELD(u16_t hwtype); + PACK_STRUCT_FIELD(u16_t proto); + PACK_STRUCT_FIELD(u8_t hwlen); + PACK_STRUCT_FIELD(u8_t protolen); + PACK_STRUCT_FIELD(u16_t opcode); + PACK_STRUCT_FIELD(struct eth_addr shwaddr); + PACK_STRUCT_FIELD(struct ip_addr2 sipaddr); + PACK_STRUCT_FIELD(struct eth_addr dhwaddr); + PACK_STRUCT_FIELD(struct ip_addr2 dipaddr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_ETHARP_HDR 28 +#define SIZEOF_ETHARP_MINSIZE 46 +#define SIZEOF_ETHARP_PACKET (SIZEOF_ETH_HDR + SIZEOF_ETHARP_HDR) +#define SIZEOF_ETHARP_WITHPAD (SIZEOF_ETH_HDR + SIZEOF_ETHARP_MINSIZE) + +/** 5 seconds period */ +#define ARP_TMR_INTERVAL 5000 + +#define ETHTYPE_ARP 0x0806 +#define ETHTYPE_IP 0x0800 +#define ETHTYPE_VLAN 0x8100 +#define ETHTYPE_PPPOEDISC 0x8863 /* PPP Over Ethernet Discovery Stage */ +#define ETHTYPE_PPPOE 0x8864 /* PPP Over Ethernet Session Stage */ +#define ETHTYPE_PAE 0x888e + +/** MEMCPY-like macro to copy to/from struct eth_addr's that are local variables + * or known to be 32-bit aligned within the protocol header. */ +#ifndef ETHADDR32_COPY +#define ETHADDR32_COPY(src, dst) SMEMCPY(src, dst, ETHARP_HWADDR_LEN) +#endif + +/** MEMCPY-like macro to copy to/from struct eth_addr's that are no local + * variables and known to be 16-bit aligned within the protocol header. */ +#ifndef ETHADDR16_COPY +#define ETHADDR16_COPY(src, dst) SMEMCPY(src, dst, ETHARP_HWADDR_LEN) +#endif + +#if LWIP_ARP /* don't build if not configured for use in lwipopts.h */ + +/** ARP message types (opcodes) */ +#define ARP_REQUEST 1 +#define ARP_REPLY 2 + +/** Define this to 1 and define LWIP_ARP_FILTER_NETIF_FN(pbuf, netif, type) + * to a filter function that returns the correct netif when using multiple + * netifs on one hardware interface where the netif's low-level receive + * routine cannot decide for the correct netif (e.g. when mapping multiple + * IP addresses to one hardware interface). + */ +#ifndef LWIP_ARP_FILTER_NETIF +#define LWIP_ARP_FILTER_NETIF 0 +#endif + +#if ARP_QUEUEING +/** struct for queueing outgoing packets for unknown address + * defined here to be accessed by memp.h + */ +struct etharp_q_entry { + struct etharp_q_entry *next; + struct pbuf *p; +}; +#endif /* ARP_QUEUEING */ + +#define etharp_init() /* Compatibility define, not init needed. */ +void etharp_tmr(void)ICACHE_FLASH_ATTR; +s8_t etharp_find_addr(struct netif *netif, ip_addr_t *ipaddr, + struct eth_addr **eth_ret, ip_addr_t **ip_ret)ICACHE_FLASH_ATTR; +err_t etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr)ICACHE_FLASH_ATTR; +err_t etharp_query(struct netif *netif, ip_addr_t *ipaddr, struct pbuf *q)ICACHE_FLASH_ATTR; +err_t etharp_request(struct netif *netif, ip_addr_t *ipaddr)ICACHE_FLASH_ATTR; +/** For Ethernet network interfaces, we might want to send "gratuitous ARP"; + * this is an ARP packet sent by a node in order to spontaneously cause other + * nodes to update an entry in their ARP cache. + * From RFC 3220 "IP Mobility Support for IPv4" section 4.6. */ +#define etharp_gratuitous(netif) etharp_request((netif), &(netif)->ip_addr) +void etharp_cleanup_netif(struct netif *netif); + +#if ETHARP_SUPPORT_STATIC_ENTRIES +err_t etharp_add_static_entry(ip_addr_t *ipaddr, struct eth_addr *ethaddr)ICACHE_FLASH_ATTR; +err_t etharp_remove_static_entry(ip_addr_t *ipaddr)ICACHE_FLASH_ATTR; +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ + +#if LWIP_AUTOIP +err_t etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, + const struct eth_addr *ethdst_addr, + const struct eth_addr *hwsrc_addr, const ip_addr_t *ipsrc_addr, + const struct eth_addr *hwdst_addr, const ip_addr_t *ipdst_addr, + const u16_t opcode)ICACHE_FLASH_ATTR; +#endif /* LWIP_AUTOIP */ + +#endif /* LWIP_ARP */ + +err_t ethernet_input(struct pbuf *p, struct netif *netif)ICACHE_FLASH_ATTR; + +#define eth_addr_cmp(addr1, addr2) (memcmp((addr1)->addr, (addr2)->addr, ETHARP_HWADDR_LEN) == 0) + +extern const struct eth_addr ethbroadcast, ethzero; + +#endif /* LWIP_ARP || LWIP_ETHERNET */ + +#if 0 +/** Ethernet header */ +#ifndef ETHARP_HWADDR_LEN +#define ETHARP_HWADDR_LEN 6 +#endif + + +struct eth_addr { + PACK_STRUCT_FIELD(u8_t addr[ETHARP_HWADDR_LEN]); +} PACK_STRUCT_STRUCT; + + +struct eth_hdr { +#if ETH_PAD_SIZE + PACK_STRUCT_FIELD(u8_t padding[ETH_PAD_SIZE]); +#endif + PACK_STRUCT_FIELD(struct eth_addr dest); + PACK_STRUCT_FIELD(struct eth_addr src); + PACK_STRUCT_FIELD(u16_t type); +} PACK_STRUCT_STRUCT; + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_ETH_HDR (14 + ETH_PAD_SIZE) + +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __NETIF_ARP_H__ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/netif/if_llc.h b/examples/ESP8266_NONOS_SDK/third_party/include/netif/if_llc.h new file mode 100644 index 0000000..ca09b38 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/netif/if_llc.h @@ -0,0 +1,173 @@ +/* $NetBSD: if_llc.h,v 1.12 1999/11/19 20:41:19 thorpej Exp $ */ + +/*- + * Copyright (c) 1988, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)if_llc.h 8.1 (Berkeley) 6/10/93 + * $FreeBSD$ + */ + +#ifndef _NET_IF_LLC_H_ +#define _NET_IF_LLC_H_ + +/* + * IEEE 802.2 Link Level Control headers, for use in conjunction with + * 802.{3,4,5} media access control methods. + * + * Headers here do not use bit fields due to shortcommings in many + * compilers. + */ + +struct llc { + uint8_t llc_dsap; + uint8_t llc_ssap; + union { + struct { + uint8_t control; + uint8_t format_id; + uint8_t class; + uint8_t window_x2; + } __packed type_u; + struct { + uint8_t num_snd_x2; + uint8_t num_rcv_x2; + } __packed type_i; + struct { + uint8_t control; + uint8_t num_rcv_x2; + } __packed type_s; + struct { + uint8_t control; + /* + * We cannot put the following fields in a structure because + * the structure rounding might cause padding. + */ + uint8_t frmr_rej_pdu0; + uint8_t frmr_rej_pdu1; + uint8_t frmr_control; + uint8_t frmr_control_ext; + uint8_t frmr_cause; + } __packed type_frmr; + struct { + uint8_t control; + uint8_t org_code[3]; + uint16_t ether_type; + } __packed type_snap; + struct { + uint8_t control; + uint8_t control_ext; + } __packed type_raw; + } __packed llc_un; +} __packed; + +struct frmrinfo { + uint8_t frmr_rej_pdu0; + uint8_t frmr_rej_pdu1; + uint8_t frmr_control; + uint8_t frmr_control_ext; + uint8_t frmr_cause; +} __packed; + +#define llc_control llc_un.type_u.control +#define llc_control_ext llc_un.type_raw.control_ext +#define llc_fid llc_un.type_u.format_id +#define llc_class llc_un.type_u.class +#define llc_window llc_un.type_u.window_x2 +#define llc_frmrinfo llc_un.type_frmr.frmr_rej_pdu0 +#define llc_frmr_pdu0 llc_un.type_frmr.frmr_rej_pdu0 +#define llc_frmr_pdu1 llc_un.type_frmr.frmr_rej_pdu1 +#define llc_frmr_control llc_un.type_frmr.frmr_control +#define llc_frmr_control_ext llc_un.type_frmr.frmr_control_ext +#define llc_frmr_cause llc_un.type_frmr.frmr_cause +#define llc_snap llc_un.type_snap + +/* + * Don't use sizeof(struct llc_un) for LLC header sizes + */ +#define LLC_ISFRAMELEN 4 +#define LLC_UFRAMELEN 3 +#define LLC_FRMRLEN 7 +#define LLC_SNAPFRAMELEN 8 + +#ifdef CTASSERT +CTASSERT(sizeof (struct llc) == LLC_SNAPFRAMELEN); +#endif + +/* + * Unnumbered LLC format commands + */ +#define LLC_UI 0x3 +#define LLC_UI_P 0x13 +#define LLC_DISC 0x43 +#define LLC_DISC_P 0x53 +#define LLC_UA 0x63 +#define LLC_UA_P 0x73 +#define LLC_TEST 0xe3 +#define LLC_TEST_P 0xf3 +#define LLC_FRMR 0x87 +#define LLC_FRMR_P 0x97 +#define LLC_DM 0x0f +#define LLC_DM_P 0x1f +#define LLC_XID 0xaf +#define LLC_XID_P 0xbf +#define LLC_SABME 0x6f +#define LLC_SABME_P 0x7f + +/* + * Supervisory LLC commands + */ +#define LLC_RR 0x01 +#define LLC_RNR 0x05 +#define LLC_REJ 0x09 + +/* + * Info format - dummy only + */ +#define LLC_INFO 0x00 + +/* + * ISO PDTR 10178 contains among others + */ +#define LLC_8021D_LSAP 0x42 +#define LLC_X25_LSAP 0x7e +#define LLC_SNAP_LSAP 0xaa +#define LLC_ISO_LSAP 0xfe + +#define RFC1042_LEN 6 +#define RFC1042 {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00} +#define ETHERNET_TUNNEL {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8} + +/* + * copied from sys/net/ethernet.h + */ +#define ETHERTYPE_AARP 0x80F3 /* AppleTalk AARP */ +#define ETHERTYPE_IPX 0x8137 /* Novell (old) NetWare IPX (ECONFIG E option) */ + + + +#endif /* _NET_IF_LLC_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/netif/ppp_oe.h b/examples/ESP8266_NONOS_SDK/third_party/include/netif/ppp_oe.h new file mode 100644 index 0000000..e1cdfa5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/netif/ppp_oe.h @@ -0,0 +1,190 @@ +/***************************************************************************** +* ppp_oe.h - PPP Over Ethernet implementation for lwIP. +* +* Copyright (c) 2006 by Marc Boucher, Services Informatiques (MBSI) inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 06-01-01 Marc Boucher +* Ported to lwIP. +*****************************************************************************/ + + + +/* based on NetBSD: if_pppoe.c,v 1.64 2006/01/31 23:50:15 martin Exp */ + +/*- + * Copyright (c) 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Martin Husemann . + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef PPP_OE_H +#define PPP_OE_H + +#include "lwip/opt.h" + +#if PPPOE_SUPPORT > 0 + +#include "netif/etharp.h" + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct pppoehdr { + PACK_STRUCT_FIELD(u8_t vertype); + PACK_STRUCT_FIELD(u8_t code); + PACK_STRUCT_FIELD(u16_t session); + PACK_STRUCT_FIELD(u16_t plen); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct pppoetag { + PACK_STRUCT_FIELD(u16_t tag); + PACK_STRUCT_FIELD(u16_t len); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + + +#define PPPOE_STATE_INITIAL 0 +#define PPPOE_STATE_PADI_SENT 1 +#define PPPOE_STATE_PADR_SENT 2 +#define PPPOE_STATE_SESSION 3 +#define PPPOE_STATE_CLOSING 4 +/* passive */ +#define PPPOE_STATE_PADO_SENT 1 + +#define PPPOE_HEADERLEN sizeof(struct pppoehdr) +#define PPPOE_VERTYPE 0x11 /* VER=1, TYPE = 1 */ + +#define PPPOE_TAG_EOL 0x0000 /* end of list */ +#define PPPOE_TAG_SNAME 0x0101 /* service name */ +#define PPPOE_TAG_ACNAME 0x0102 /* access concentrator name */ +#define PPPOE_TAG_HUNIQUE 0x0103 /* host unique */ +#define PPPOE_TAG_ACCOOKIE 0x0104 /* AC cookie */ +#define PPPOE_TAG_VENDOR 0x0105 /* vendor specific */ +#define PPPOE_TAG_RELAYSID 0x0110 /* relay session id */ +#define PPPOE_TAG_SNAME_ERR 0x0201 /* service name error */ +#define PPPOE_TAG_ACSYS_ERR 0x0202 /* AC system error */ +#define PPPOE_TAG_GENERIC_ERR 0x0203 /* gerneric error */ + +#define PPPOE_CODE_PADI 0x09 /* Active Discovery Initiation */ +#define PPPOE_CODE_PADO 0x07 /* Active Discovery Offer */ +#define PPPOE_CODE_PADR 0x19 /* Active Discovery Request */ +#define PPPOE_CODE_PADS 0x65 /* Active Discovery Session confirmation */ +#define PPPOE_CODE_PADT 0xA7 /* Active Discovery Terminate */ + +#ifndef ETHERMTU +#define ETHERMTU 1500 +#endif + +/* two byte PPP protocol discriminator, then IP data */ +#define PPPOE_MAXMTU (ETHERMTU-PPPOE_HEADERLEN-2) + +#ifndef PPPOE_MAX_AC_COOKIE_LEN +#define PPPOE_MAX_AC_COOKIE_LEN 64 +#endif + +struct pppoe_softc { + struct pppoe_softc *next; + struct netif *sc_ethif; /* ethernet interface we are using */ + int sc_pd; /* ppp unit number */ + void (*sc_linkStatusCB)(int pd, int up); + + int sc_state; /* discovery phase or session connected */ + struct eth_addr sc_dest; /* hardware address of concentrator */ + u16_t sc_session; /* PPPoE session id */ + +#ifdef PPPOE_TODO + char *sc_service_name; /* if != NULL: requested name of service */ + char *sc_concentrator_name; /* if != NULL: requested concentrator id */ +#endif /* PPPOE_TODO */ + u8_t sc_ac_cookie[PPPOE_MAX_AC_COOKIE_LEN]; /* content of AC cookie we must echo back */ + size_t sc_ac_cookie_len; /* length of cookie data */ +#ifdef PPPOE_SERVER + u8_t *sc_hunique; /* content of host unique we must echo back */ + size_t sc_hunique_len; /* length of host unique */ +#endif + int sc_padi_retried; /* number of PADI retries already done */ + int sc_padr_retried; /* number of PADR retries already done */ +}; + + +#define pppoe_init() /* compatibility define, no initialization needed */ + +err_t pppoe_create(struct netif *ethif, int pd, void (*linkStatusCB)(int pd, int up), struct pppoe_softc **scptr); +err_t pppoe_destroy(struct netif *ifp); + +int pppoe_connect(struct pppoe_softc *sc); +void pppoe_disconnect(struct pppoe_softc *sc); + +void pppoe_disc_input(struct netif *netif, struct pbuf *p); +void pppoe_data_input(struct netif *netif, struct pbuf *p); + +err_t pppoe_xmit(struct pppoe_softc *sc, struct pbuf *pb); + +/** used in ppp.c */ +#define PPPOE_HDRLEN (sizeof(struct eth_hdr) + PPPOE_HEADERLEN) + +#endif /* PPPOE_SUPPORT */ + +#endif /* PPP_OE_H */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/netif/wlan_lwip_if.h b/examples/ESP8266_NONOS_SDK/third_party/include/netif/wlan_lwip_if.h new file mode 100644 index 0000000..ed9c477 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/netif/wlan_lwip_if.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2010-2011 Espressif System + * +*/ + +#ifndef _WLAN_LWIP_IF_H_ +#define _WLAN_LWIP_IF_H_ + +#define LWIP_IF0_PRIO 28 +#define LWIP_IF1_PRIO 29 + +enum { + SIG_LWIP_RX = 0, +}; + +struct netif * eagle_lwip_if_alloc(struct ieee80211_conn *conn, const uint8 *macaddr, struct ip_info *info); +struct netif * eagle_lwip_getif(uint8 index); + +#ifndef IOT_SIP_MODE +sint8 ieee80211_output_pbuf(struct netif *ifp, struct pbuf* pb); +#else +sint8 ieee80211_output_pbuf(struct ieee80211_conn *conn, esf_buf *eb); +#endif + +#endif /* _WLAN_LWIP_IF_H_ */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/app/espconn_secure.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/app/espconn_secure.h new file mode 100755 index 0000000..cf0b9ac --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/app/espconn_secure.h @@ -0,0 +1,46 @@ +#ifndef __ESPCONN_ENCRY_H__ +#define __ESPCONN_ENCRY_H__ + +#include "lwip/app/espconn.h" +#include "ssl/app/espconn_ssl.h" +/****************************************************************************** + * FunctionName : espconn_encry_connect + * Description : The function given as connection + * Parameters : espconn -- the espconn used to connect with the host + * Returns : none +*******************************************************************************/ + +sint8 espconn_secure_connect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_encry_disconnect + * Description : The function given as the disconnection + * Parameters : espconn -- the espconn used to disconnect with the host + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_secure_disconnect(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_encry_sent + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_secure_sent(struct espconn *espconn, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_secure_accept + * Description : The function given as the listen + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_secure_accept(struct espconn *espconn); + +#endif + + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/app/espconn_ssl.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/app/espconn_ssl.h new file mode 100755 index 0000000..a140861 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/app/espconn_ssl.h @@ -0,0 +1,156 @@ +#ifndef ESPCONN_SSL_CLIENT_H +#define ESPCONN_SSL_CLIENT_H + +#include "ssl/ssl_ssl.h" +#include "ssl/ssl_tls1.h" + +#include "lwip/app/espconn.h" + +#define SSL_KEEP_INTVL 1000 +#define SSL_KEEP_CNT 3 +#define SSL_KEEP_IDLE 60000 + +#define ssl_keepalive_enable(pcb) ((pcb)->so_options |= SOF_KEEPALIVE) +#define ssl_keepalive_disable(pcb) ((pcb)->so_options &= ~SOF_KEEPALIVE) + +typedef struct { + char *buffer; + int length; + int start; + int end; +}EspRingBuffer; + +int EspRingBuffer_full(EspRingBuffer *buffer); +int EspRingBuffer_empty(EspRingBuffer *buffer); +int EspRingBuffer_available_data(EspRingBuffer *buffer); +int EspRingBuffer_available_space(EspRingBuffer *buffer); + +#define EspRingBuffer_available_data(B) (((B)->end + 1) % (B)->length - (B)->start -1) +#define EspRingBuffer_available_space(B) ((B)->length - (B)->end -1) +#define EspRingBuffer_full(B) (EspRingBuffer_available_data((B))- (B)->length == 0) +#define EspRingBuffer_empty(B) (EspRingBuffer_available_data((B)) == 0) +#define EspRingBuffer_starts_at(B) ((B)->buffer + (B)->start) +#define EspRingBuffer_ends_at(B) ((B)->buffer + (B)->end) +#define EspRingBuffer_commit_read(B, A) ((B)->start = ((B)->start + (A)) % (B)->length) +#define EspRingBuffer_commit_write(B, A) ((B)->end = ((B)->end + (A)) % (B)->length) + +typedef struct _SSL_RING{ + EspRingBuffer *RingBuffer; + uint16 RemainLength; +}SSL_RING; + +typedef struct _ssl_msg { + SSL_CTX *ssl_ctx; + SSL *ssl; + SSL_RING SSLRing; + bool quiet; + bool SentFnFlag; + u16_t pkt_length; +} ssl_msg; + +typedef struct _ssl_sector{ + uint32 sector; + bool flag; +}ssl_sector; + +struct ssl_packet{ + uint8* pbuffer; + uint16 buffer_size; + ssl_sector cert_ca_sector; + ssl_sector cert_req_sector; +}; + +typedef struct _ssl_opt { + struct ssl_packet server; + struct ssl_packet client; + uint8 type; +}ssl_opt; + +enum { + ESPCONN_IDLE = 0, + ESPCONN_CLIENT, + ESPCONN_SERVER, + ESPCONN_BOTH, + ESPCONN_MAX +}; + +enum { + SIG_ESPCONN_TLS_ERRER = 0x3B +}; + +enum { + ESPCONN_CERT_REQ, + ESPCONN_CERT_AUTH +}; + +typedef struct _file_head{ + char file_name[32]; + uint16_t file_length; +}file_head; + +typedef struct _file_param{ + file_head file_head; + int32 file_offerset; +}file_param; + +#define ESPCONN_SECURE_MAX_SIZE 8192 +#define ESPCONN_SECURE_DEFAULT_HEAP 0x3800 +#define ESPCONN_SECURE_DEFAULT_SIZE RT_MAX_PLAIN_LENGTH+RT_EXTRA +#define ESPCONN_HANDSHAKE_TIMEOUT 0x3C + +#define espconn_TlsTaskPrio 25 + +extern ssl_opt ssl_option; + +/****************************************************************************** + * FunctionName : sslserver_start + * Description : Initialize the server: set up a listen PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_ssl_server(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_ssl_client + * Description : Initialize the client: set up a connect PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ + +extern sint8 espconn_ssl_client(struct espconn *espconn); + +/****************************************************************************** + * FunctionName : espconn_ssl_write + * Description : sent data for client or server + * Parameters : void *arg -- client or server to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : none +*******************************************************************************/ + +extern void espconn_ssl_sent(void *arg, uint8 *psent, uint16 length); + +/****************************************************************************** + * FunctionName : espconn_ssl_disconnect + * Description : A new incoming connection has been disconnected. + * Parameters : espconn -- the espconn used to disconnect with host + * Returns : none +*******************************************************************************/ + +extern void espconn_ssl_disconnect(espconn_msg *pdis); + +/****************************************************************************** + * FunctionName : espconn_secure_get_size + * Description : get buffer size for client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : buffer size for client or server +*******************************************************************************/ + +extern sint16 espconn_secure_get_size(uint8 level); + +#endif + diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_bigint.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_bigint.h new file mode 100755 index 0000000..99f5415 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_bigint.h @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2007, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef BIGINT_HEADER +#define BIGINT_HEADER + +#include "ssl/ssl_crypto.h" + +BI_CTX *bi_initialize(void); +void bi_terminate(BI_CTX *ctx); +void bi_permanent(bigint *bi); +void bi_depermanent(bigint *bi); +void bi_clear_cache(BI_CTX *ctx); +void bi_free(BI_CTX *ctx, bigint *bi); +bigint *bi_copy(bigint *bi); +bigint *bi_clone(BI_CTX *ctx, const bigint *bi); +void bi_export(BI_CTX *ctx, bigint *bi, uint8_t *data, int size); +bigint *bi_import(BI_CTX *ctx, const uint8_t *data, int len); +bigint *int_to_bi(BI_CTX *ctx, comp i); + +/* the functions that actually do something interesting */ +bigint *bi_add(BI_CTX *ctx, bigint *bia, bigint *bib); +bigint *bi_subtract(BI_CTX *ctx, bigint *bia, + bigint *bib, int *is_negative); +bigint *bi_divide(BI_CTX *ctx, bigint *bia, bigint *bim, int is_mod); +bigint *bi_multiply(BI_CTX *ctx, bigint *bia, bigint *bib); +bigint *bi_mod_power(BI_CTX *ctx, bigint *bi, bigint *biexp); +bigint *bi_mod_power2(BI_CTX *ctx, bigint *bi, bigint *bim, bigint *biexp); +int bi_compare(bigint *bia, bigint *bib); +void bi_set_mod(BI_CTX *ctx, bigint *bim, int mod_offset); +void bi_free_mod(BI_CTX *ctx, int mod_offset); + +#ifdef CONFIG_SSL_FULL_MODE +void bi_print(const char *label, bigint *bi); +bigint *bi_str_import(BI_CTX *ctx, const char *data); +#endif + +/** + * @def bi_mod + * Find the residue of B. bi_set_mod() must be called before hand. + */ +#define bi_mod(A, B) bi_divide(A, B, ctx->bi_mod[ctx->mod_offset], 1) + +/** + * bi_residue() is technically the same as bi_mod(), but it uses the + * appropriate reduction technique (which is bi_mod() when doing classical + * reduction). + */ +#if defined(CONFIG_BIGINT_MONTGOMERY) +#define bi_residue(A, B) bi_mont(A, B) +bigint *bi_mont(BI_CTX *ctx, bigint *bixy); +#elif defined(CONFIG_BIGINT_BARRETT) +#define bi_residue(A, B) bi_barrett(A, B) +bigint *bi_barrett(BI_CTX *ctx, bigint *bi); +#else /* if defined(CONFIG_BIGINT_CLASSICAL) */ +#define bi_residue(A, B) bi_mod(A, B) +#endif + +#ifdef CONFIG_BIGINT_SQUARE +bigint *bi_square(BI_CTX *ctx, bigint *bi); +#else +#define bi_square(A, B) bi_multiply(A, bi_copy(B), B) +#endif + +#ifdef CONFIG_BIGINT_CRT +bigint *bi_crt(BI_CTX *ctx, bigint *bi, + bigint *dP, bigint *dQ, + bigint *p, bigint *q, + bigint *qInv); +#endif + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_bigint_impl.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_bigint_impl.h new file mode 100755 index 0000000..c82fefb --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_bigint_impl.h @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2007, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef BIGINT_IMPL_HEADER +#define BIGINT_IMPL_HEADER + +/* Maintain a number of precomputed variables when doing reduction */ +#define BIGINT_M_OFFSET 0 /**< Normal modulo offset. */ +#ifdef CONFIG_BIGINT_CRT +#define BIGINT_P_OFFSET 1 /**< p modulo offset. */ +#define BIGINT_Q_OFFSET 2 /**< q module offset. */ +#define BIGINT_NUM_MODS 3 /**< The number of modulus constants used. */ +#else +#define BIGINT_NUM_MODS 1 +#endif + +/* Architecture specific functions for big ints */ +#if defined(CONFIG_INTEGER_8BIT) +#define COMP_RADIX 256U /**< Max component + 1 */ +#define COMP_MAX 0xFFFFU/**< (Max dbl comp -1) */ +#define COMP_BIT_SIZE 8 /**< Number of bits in a component. */ +#define COMP_BYTE_SIZE 1 /**< Number of bytes in a component. */ +#define COMP_NUM_NIBBLES 2 /**< Used For diagnostics only. */ +typedef uint8_t comp; /**< A single precision component. */ +typedef uint16_t long_comp; /**< A double precision component. */ +typedef int16_t slong_comp; /**< A signed double precision component. */ +#elif defined(CONFIG_INTEGER_16BIT) +#define COMP_RADIX 65536U /**< Max component + 1 */ +#define COMP_MAX 0xFFFFFFFFU/**< (Max dbl comp -1) */ +#define COMP_BIT_SIZE 16 /**< Number of bits in a component. */ +#define COMP_BYTE_SIZE 2 /**< Number of bytes in a component. */ +#define COMP_NUM_NIBBLES 4 /**< Used For diagnostics only. */ +typedef uint16_t comp; /**< A single precision component. */ +typedef uint32_t long_comp; /**< A double precision component. */ +typedef int32_t slong_comp; /**< A signed double precision component. */ +#else /* regular 32 bit */ +#ifdef WIN32 +#define COMP_RADIX 4294967296i64 +#define COMP_MAX 0xFFFFFFFFFFFFFFFFui64 +#else +#define COMP_RADIX 4294967296ULL /**< Max component + 1 */ +#define COMP_MAX 0xFFFFFFFFFFFFFFFFULL/**< (Max dbl comp -1) */ +#endif +#define COMP_BIT_SIZE 32 /**< Number of bits in a component. */ +#define COMP_BYTE_SIZE 4 /**< Number of bytes in a component. */ +#define COMP_NUM_NIBBLES 8 /**< Used For diagnostics only. */ +typedef uint32_t comp; /**< A single precision component. */ +typedef uint64_t long_comp; /**< A double precision component. */ +typedef sint64_t slong_comp; /**< A signed double precision component. */ +#endif + +/** + * @struct _bigint + * @brief A big integer basic object + */ +struct _bigint +{ + struct _bigint* next; /**< The next bigint in the cache. */ + short size; /**< The number of components in this bigint. */ + short max_comps; /**< The heapsize allocated for this bigint */ + int refs; /**< An internal reference count. */ + comp* comps; /**< A ptr to the actual component data */ +}; + +typedef struct _bigint bigint; /**< An alias for _bigint */ + +/** + * Maintains the state of the cache, and a number of variables used in + * reduction. + */ +typedef struct /**< A big integer "session" context. */ +{ + bigint *active_list; /**< Bigints currently used. */ + bigint *free_list; /**< Bigints not used. */ + bigint *bi_radix; /**< The radix used. */ + bigint *bi_mod[BIGINT_NUM_MODS]; /**< modulus */ + +#if defined(CONFIG_BIGINT_MONTGOMERY) + bigint *bi_RR_mod_m[BIGINT_NUM_MODS]; /**< R^2 mod m */ + bigint *bi_R_mod_m[BIGINT_NUM_MODS]; /**< R mod m */ + comp N0_dash[BIGINT_NUM_MODS]; +#elif defined(CONFIG_BIGINT_BARRETT) + bigint *bi_mu[BIGINT_NUM_MODS]; /**< Storage for mu */ +#endif + bigint *bi_normalised_mod[BIGINT_NUM_MODS]; /**< Normalised mod storage. */ + bigint **g; /**< Used by sliding-window. */ + int window; /**< The size of the sliding window */ + int active_count; /**< Number of active bigints. */ + int free_count; /**< Number of free bigints. */ + +#ifdef CONFIG_BIGINT_MONTGOMERY + uint8_t use_classical; /**< Use classical reduction. */ +#endif + uint8_t mod_offset; /**< The mod offset we are using */ +} BI_CTX; + +#ifndef WIN32 +#define max(a,b) ((a)>(b)?(a):(b)) /**< Find the maximum of 2 numbers. */ +#define min(a,b) ((a)<(b)?(a):(b)) /**< Find the minimum of 2 numbers. */ +#endif + +#define PERMANENT 0x7FFF55AA /**< A magic number for permanents. */ + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_cert.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_cert.h new file mode 100755 index 0000000..30c7b65 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_cert.h @@ -0,0 +1,43 @@ +unsigned char default_certificate[] = { + 0x30, 0x82, 0x01, 0xd7, 0x30, 0x82, 0x01, 0x40, 0x02, 0x09, 0x00, 0xab, + 0x08, 0x18, 0xa7, 0x03, 0x07, 0x27, 0xfd, 0x30, 0x0d, 0x06, 0x09, 0x2a, + 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x34, + 0x31, 0x32, 0x30, 0x30, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x13, 0x29, 0x61, + 0x78, 0x54, 0x4c, 0x53, 0x20, 0x50, 0x72, 0x6f, 0x6a, 0x65, 0x63, 0x74, + 0x20, 0x44, 0x6f, 0x64, 0x67, 0x79, 0x20, 0x43, 0x65, 0x72, 0x74, 0x69, + 0x66, 0x69, 0x63, 0x61, 0x74, 0x65, 0x20, 0x41, 0x75, 0x74, 0x68, 0x6f, + 0x72, 0x69, 0x74, 0x79, 0x30, 0x1e, 0x17, 0x0d, 0x31, 0x30, 0x31, 0x32, + 0x32, 0x36, 0x32, 0x32, 0x33, 0x33, 0x33, 0x39, 0x5a, 0x17, 0x0d, 0x32, + 0x34, 0x30, 0x39, 0x30, 0x33, 0x32, 0x32, 0x33, 0x33, 0x33, 0x39, 0x5a, + 0x30, 0x2c, 0x31, 0x16, 0x30, 0x14, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x13, + 0x0d, 0x61, 0x78, 0x54, 0x4c, 0x53, 0x20, 0x50, 0x72, 0x6f, 0x6a, 0x65, + 0x63, 0x74, 0x31, 0x12, 0x30, 0x10, 0x06, 0x03, 0x55, 0x04, 0x03, 0x13, + 0x09, 0x31, 0x32, 0x37, 0x2e, 0x30, 0x2e, 0x30, 0x2e, 0x31, 0x30, 0x81, + 0x9f, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, + 0x01, 0x01, 0x05, 0x00, 0x03, 0x81, 0x8d, 0x00, 0x30, 0x81, 0x89, 0x02, + 0x81, 0x81, 0x00, 0xcd, 0xfd, 0x89, 0x48, 0xbe, 0x36, 0xb9, 0x95, 0x76, + 0xd4, 0x13, 0x30, 0x0e, 0xbf, 0xb2, 0xed, 0x67, 0x0a, 0xc0, 0x16, 0x3f, + 0x51, 0x09, 0x9d, 0x29, 0x2f, 0xb2, 0x6d, 0x3f, 0x3e, 0x6c, 0x2f, 0x90, + 0x80, 0xa1, 0x71, 0xdf, 0xbe, 0x38, 0xc5, 0xcb, 0xa9, 0x9a, 0x40, 0x14, + 0x90, 0x0a, 0xf9, 0xb7, 0x07, 0x0b, 0xe1, 0xda, 0xe7, 0x09, 0xbf, 0x0d, + 0x57, 0x41, 0x86, 0x60, 0xa1, 0xc1, 0x27, 0x91, 0x5b, 0x0a, 0x98, 0x46, + 0x1b, 0xf6, 0xa2, 0x84, 0xf8, 0x65, 0xc7, 0xce, 0x2d, 0x96, 0x17, 0xaa, + 0x91, 0xf8, 0x61, 0x04, 0x50, 0x70, 0xeb, 0xb4, 0x43, 0xb7, 0xdc, 0x9a, + 0xcc, 0x31, 0x01, 0x14, 0xd4, 0xcd, 0xcc, 0xc2, 0x37, 0x6d, 0x69, 0x82, + 0xd6, 0xc6, 0xc4, 0xbe, 0xf2, 0x34, 0xa5, 0xc9, 0xa6, 0x19, 0x53, 0x32, + 0x7a, 0x86, 0x0e, 0x91, 0x82, 0x0f, 0xa1, 0x42, 0x54, 0xaa, 0x01, 0x02, + 0x03, 0x01, 0x00, 0x01, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, + 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x03, 0x81, 0x81, 0x00, 0x40, + 0xb4, 0x94, 0x9a, 0xa8, 0x89, 0x72, 0x1d, 0x07, 0xe5, 0xb3, 0x6b, 0x88, + 0x21, 0xc2, 0x38, 0x36, 0x9e, 0x7a, 0x8c, 0x49, 0x48, 0x68, 0x0c, 0x06, + 0xe8, 0xdb, 0x1f, 0x4e, 0x05, 0xe6, 0x31, 0xe3, 0xfd, 0xe6, 0x0d, 0x6b, + 0xd8, 0x13, 0x17, 0xe0, 0x2d, 0x0d, 0xb8, 0x7e, 0xcb, 0x20, 0x6c, 0xa8, + 0x73, 0xa7, 0xfd, 0xe3, 0xa7, 0xfa, 0xf3, 0x02, 0x60, 0x78, 0x1f, 0x13, + 0x40, 0x45, 0xee, 0x75, 0xf5, 0x10, 0xfd, 0x8f, 0x68, 0x74, 0xd4, 0xac, + 0xae, 0x04, 0x09, 0x55, 0x2c, 0xdb, 0xd8, 0x07, 0x07, 0x65, 0x69, 0x27, + 0x6e, 0xbf, 0x5e, 0x61, 0x40, 0x56, 0x8b, 0xd7, 0x33, 0x3b, 0xff, 0x6e, + 0x53, 0x7e, 0x9d, 0x3f, 0xc0, 0x40, 0x3a, 0xab, 0xa0, 0x50, 0x4e, 0x80, + 0x47, 0x46, 0x0d, 0x1e, 0xdb, 0x4c, 0xf1, 0x1b, 0x5d, 0x3c, 0x2a, 0x54, + 0xa7, 0x4d, 0xfa, 0x7b, 0x72, 0x66, 0xc5 +}; +unsigned int default_certificate_len = 475; diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_config.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_config.h new file mode 100755 index 0000000..2d50a8a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_config.h @@ -0,0 +1,130 @@ +/* + * Automatically generated header file: don't edit + */ + +#define HAVE_DOT_CONFIG 1 +#undef CONFIG_PLATFORM_LINUX +#define CONFIG_PLATFORM_CYGWIN 1 +#undef CONFIG_PLATFORM_WIN32 + +/* + * General Configuration + */ +#define PREFIX "/usr/local" +#define CONFIG_DEBUG 1 +#undef CONFIG_STRIP_UNWANTED_SECTIONS +#undef CONFIG_VISUAL_STUDIO_7_0 +#undef CONFIG_VISUAL_STUDIO_8_0 +#undef CONFIG_VISUAL_STUDIO_10_0 +#define CONFIG_VISUAL_STUDIO_7_0_BASE "" +#define CONFIG_VISUAL_STUDIO_8_0_BASE "" +#define CONFIG_VISUAL_STUDIO_10_0_BASE "" +#define CONFIG_EXTRA_CFLAGS_OPTIONS "" +#define CONFIG_EXTRA_LDFLAGS_OPTIONS "" + +/* + * SSL Library + */ +#undef CONFIG_SSL_SERVER_ONLY +#undef CONFIG_SSL_CERT_VERIFICATION +#undef CONFIG_SSL_ENABLE_CLIENT +#define CONFIG_SSL_FULL_MODE 1 +#undef CONFIG_SSL_SKELETON_MODE +#undef CONFIG_SSL_PROT_LOW +#define CONFIG_SSL_PROT_MEDIUM 1 +#undef CONFIG_SSL_PROT_HIGH +#define CONFIG_SSL_USE_DEFAULT_KEY +#define CONFIG_SSL_PRIVATE_KEY_LOCATION "" +#define CONFIG_SSL_PRIVATE_KEY_PASSWORD "" +#define CONFIG_SSL_X509_CERT_LOCATION "" +#undef CONFIG_SSL_GENERATE_X509_CERT +#define CONFIG_SSL_X509_COMMON_NAME "" +#define CONFIG_SSL_X509_ORGANIZATION_NAME "" +#define CONFIG_SSL_X509_ORGANIZATION_UNIT_NAME "" +#undef CONFIG_SSL_ENABLE_V23_HANDSHAKE +#define CONFIG_SSL_HAS_PEM 1 +#undef CONFIG_SSL_USE_PKCS12 +#define CONFIG_SSL_EXPIRY_TIME 24 +#define CONFIG_X509_MAX_CA_CERTS 3 +#define CONFIG_SSL_MAX_CERTS 3 +#undef CONFIG_SSL_CTX_MUTEXING +#define CONFIG_USE_DEV_URANDOM 1 +#undef CONFIG_WIN32_USE_CRYPTO_LIB +#undef CONFIG_OPENSSL_COMPATIBLE +#undef CONFIG_PERFORMANCE_TESTING +#define CONFIG_SSL_TEST 1 +#undef CONFIG_AXTLSWRAP +#define CONFIG_AXHTTPD 1 + +/*add by LiuH for debug at 2015.06.11*/ +#define CONFIG_SSL_DISPLAY_MODE 1 + +/* + * Axhttpd Configuration + */ +#undef CONFIG_HTTP_STATIC_BUILD +#define CONFIG_HTTP_PORT 80 +#define CONFIG_HTTP_HTTPS_PORT 443 +#define CONFIG_HTTP_SESSION_CACHE_SIZE 5 +#define CONFIG_HTTP_WEBROOT "../www" +#define CONFIG_HTTP_TIMEOUT 300 + +/* + * CGI + */ +#undef CONFIG_HTTP_HAS_CGI +#define CONFIG_HTTP_CGI_EXTENSIONS ".lua,.lp,.php" +#define CONFIG_HTTP_ENABLE_LUA 1 +#define CONFIG_HTTP_LUA_PREFIX "/usr" +#undef CONFIG_HTTP_BUILD_LUA +#define CONFIG_HTTP_CGI_LAUNCHER "/usr/bin/cgi" +#define CONFIG_HTTP_DIRECTORIES 1 +#define CONFIG_HTTP_HAS_AUTHORIZATION 1 +#undef CONFIG_HTTP_HAS_IPV6 +#undef CONFIG_HTTP_ENABLE_DIFFERENT_USER +#define CONFIG_HTTP_USER "" +#define CONFIG_HTTP_VERBOSE 0 +#undef CONFIG_HTTP_IS_DAEMON + +/* + * Language Bindings + */ +#undef CONFIG_BINDINGS +#undef CONFIG_CSHARP_BINDINGS +#undef CONFIG_VBNET_BINDINGS +#define CONFIG_DOT_NET_FRAMEWORK_BASE "" +#undef CONFIG_JAVA_BINDINGS +#define CONFIG_JAVA_HOME "" +#undef CONFIG_PERL_BINDINGS +#define CONFIG_PERL_CORE "" +#define CONFIG_PERL_LIB "" +#undef CONFIG_LUA_BINDINGS +#define CONFIG_LUA_CORE "" + +/* + * Samples + */ +#define CONFIG_SAMPLES 1 +#define CONFIG_C_SAMPLES 1 +#undef CONFIG_CSHARP_SAMPLES +#undef CONFIG_VBNET_SAMPLES +#undef CONFIG_JAVA_SAMPLES +#undef CONFIG_PERL_SAMPLES +#undef CONFIG_LUA_SAMPLES + +/* + * BigInt Options + */ +#undef CONFIG_BIGINT_CLASSICAL +#undef CONFIG_BIGINT_MONTGOMERY +#define CONFIG_BIGINT_BARRETT 1 +#define CONFIG_BIGINT_CRT 1 +#undef CONFIG_BIGINT_KARATSUBA +#define MUL_KARATSUBA_THRESH +#define SQU_KARATSUBA_THRESH +#define CONFIG_BIGINT_SLIDING_WINDOW 1 +#define CONFIG_BIGINT_SQUARE 1 +#define CONFIG_BIGINT_CHECK_ON 1 +#define CONFIG_INTEGER_32BIT 1 +#undef CONFIG_INTEGER_16BIT +#undef CONFIG_INTEGER_8BIT diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_crypto.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_crypto.h new file mode 100755 index 0000000..5d90227 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_crypto.h @@ -0,0 +1,266 @@ +/* + * Copyright (c) 2007-2015, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file crypto.h + */ + +#ifndef HEADER_CRYPTO_H +#define HEADER_CRYPTO_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ssl/ssl_config.h" +#include "ssl/ssl_bigint_impl.h" +#include "ssl/ssl_bigint.h" + +#ifndef STDCALL +#define STDCALL +#endif +#ifndef EXP_FUNC +#define EXP_FUNC +#endif + + +/* enable features based on a 'super-set' capbaility. */ +#if defined(CONFIG_SSL_FULL_MODE) +#define CONFIG_SSL_ENABLE_CLIENT +#define CONFIG_SSL_CERT_VERIFICATION +#elif defined(CONFIG_SSL_ENABLE_CLIENT) +#define CONFIG_SSL_CERT_VERIFICATION +#endif + +/************************************************************************** + * AES declarations + **************************************************************************/ + +#define AES_MAXROUNDS 14 +#define AES_BLOCKSIZE 16 +#define AES_IV_SIZE 16 + +typedef struct aes_key_st +{ + uint16_t rounds; + uint16_t key_size; + uint32_t ks[(AES_MAXROUNDS+1)*8]; + uint8_t iv[AES_IV_SIZE]; +} AES_CTX; + +typedef enum +{ + AES_MODE_128, + AES_MODE_256 +} AES_MODE; + +void AES_set_key(AES_CTX *ctx, const uint8_t *key, + const uint8_t *iv, AES_MODE mode); +void AES_cbc_encrypt(AES_CTX *ctx, const uint8_t *msg, + uint8_t *out, int length); +void AES_cbc_decrypt(AES_CTX *ks, const uint8_t *in, uint8_t *out, int length); +void AES_convert_key(AES_CTX *ctx); + +/************************************************************************** + * RC4 declarations + **************************************************************************/ + +typedef struct +{ + uint8_t x, y, m[256]; +} RC4_CTX; + +void RC4_setup(RC4_CTX *s, const uint8_t *key, int length); +void RC4_crypt(RC4_CTX *s, const uint8_t *msg, uint8_t *data, int length); + +/************************************************************************** + * SHA1 declarations + **************************************************************************/ + +#define SHA1_SIZE 20 + +/* + * This structure will hold context information for the SHA-1 + * hashing operation + */ +typedef struct +{ + uint32_t Intermediate_Hash[SHA1_SIZE/4]; /* Message Digest */ + uint32_t Length_Low; /* Message length in bits */ + uint32_t Length_High; /* Message length in bits */ + uint16_t Message_Block_Index; /* Index into message block array */ + uint8_t Message_Block[64]; /* 512-bit message blocks */ +} SHA1_CTX; + +void SHA1_Init(SHA1_CTX *); +void SHA1_Update(SHA1_CTX *, const uint8_t * msg, int len); +void SHA1_Final(uint8_t *digest, SHA1_CTX *); + +/************************************************************************** + * SHA256 declarations + **************************************************************************/ + +#define SHA256_SIZE 32 + +typedef struct +{ + uint32_t total[2]; + uint32_t state[8]; + uint8_t buffer[64]; +} SHA256_CTX; + +void SHA256_Init(SHA256_CTX *c); +void SHA256_Update(SHA256_CTX *, const uint8_t *input, int len); +void SHA256_Final(uint8_t *digest, SHA256_CTX *); + +/************************************************************************** + * SHA512 declarations + **************************************************************************/ + +#define SHA512_SIZE 64 + +typedef struct +{ + union + { + uint64_t h[8]; + uint8_t digest[64]; + } h_dig; + union + { + uint64_t w[80]; + uint8_t buffer[128]; + } w_buf; + size_t size; + uint64_t totalSize; +} SHA512_CTX; + +void SHA512_Init(SHA512_CTX *c); +void SHA512_Update(SHA512_CTX *, const uint8_t *input, int len); +void SHA512_Final(uint8_t *digest, SHA512_CTX *); + +/************************************************************************** + * SHA384 declarations + **************************************************************************/ + +#define SHA384_SIZE 48 + +typedef SHA512_CTX SHA384_CTX; +void SHA384_Init(SHA384_CTX *c); +void SHA384_Update(SHA384_CTX *, const uint8_t *input, int len); +void SHA384_Final(uint8_t *digest, SHA384_CTX *); + +/************************************************************************** + * MD5 declarations + **************************************************************************/ + +#define MD5_SIZE 16 + +typedef struct +{ + uint32_t state[4]; /* state (ABCD) */ + uint32_t count[2]; /* number of bits, modulo 2^64 (lsb first) */ + uint8_t buffer[64]; /* input buffer */ +} MD5_CTX; + +EXP_FUNC void STDCALL MD5_Init(MD5_CTX *); +EXP_FUNC void STDCALL MD5_Update(MD5_CTX *, const uint8_t *msg, int len); +EXP_FUNC void STDCALL MD5_Final(uint8_t *digest, MD5_CTX *); + +/************************************************************************** + * HMAC declarations + **************************************************************************/ +void ssl_hmac_md5(const uint8_t *msg, int length, const uint8_t *key, + int key_len, uint8_t *digest);// fix hmac_md5 to ssl_hmac_md5, discriminate ieee80211 +void ssl_hmac_sha1(const uint8_t *msg, int length, const uint8_t *key, + int key_len, uint8_t *digest);// fix hmac_md5 to ssl_hmac_sha1, discriminate ieee80211 + +/************************************************************************** + * RSA declarations + **************************************************************************/ + +typedef struct +{ + bigint *m; /* modulus */ + bigint *e; /* public exponent */ + bigint *d; /* private exponent */ +#ifdef CONFIG_BIGINT_CRT + bigint *p; /* p as in m = pq */ + bigint *q; /* q as in m = pq */ + bigint *dP; /* d mod (p-1) */ + bigint *dQ; /* d mod (q-1) */ + bigint *qInv; /* q^-1 mod p */ +#endif + int num_octets; + BI_CTX *bi_ctx; +} RSA_CTX; + +void RSA_priv_key_new(RSA_CTX **rsa_ctx, + const uint8_t *modulus, int mod_len, + const uint8_t *pub_exp, int pub_len, + const uint8_t *priv_exp, int priv_len +#ifdef CONFIG_BIGINT_CRT + , const uint8_t *p, int p_len, + const uint8_t *q, int q_len, + const uint8_t *dP, int dP_len, + const uint8_t *dQ, int dQ_len, + const uint8_t *qInv, int qInv_len +#endif + ); +void RSA_pub_key_new(RSA_CTX **rsa_ctx, + const uint8_t *modulus, int mod_len, + const uint8_t *pub_exp, int pub_len); +void RSA_free(RSA_CTX *ctx); +int RSA_decrypt(const RSA_CTX *ctx, const uint8_t *in_data, uint8_t *out_data, + int out_len, int is_decryption); +bigint *RSA_private(const RSA_CTX *c, bigint *bi_msg); +#if defined(CONFIG_SSL_CERT_VERIFICATION) || defined(CONFIG_SSL_GENERATE_X509_CERT) +bigint *RSA_sign_verify(BI_CTX *ctx, const uint8_t *sig, int sig_len, + bigint *modulus, bigint *pub_exp); +bigint *RSA_public(const RSA_CTX * c, bigint *bi_msg); +int RSA_encrypt(const RSA_CTX *ctx, const uint8_t *in_data, uint16_t in_len, + uint8_t *out_data, int is_signing); +void RSA_print(const RSA_CTX *ctx); +#endif + +/************************************************************************** + * RNG declarations + **************************************************************************/ +EXP_FUNC void STDCALL RNG_initialize(void); +EXP_FUNC void STDCALL RNG_custom_init(const uint8_t *seed_buf, int size); +EXP_FUNC void STDCALL RNG_terminate(void); +EXP_FUNC int STDCALL get_random(int num_rand_bytes, uint8_t *rand_data); +int get_random_NZ(int num_rand_bytes, uint8_t *rand_data); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_crypto_misc.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_crypto_misc.h new file mode 100755 index 0000000..074ec06 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_crypto_misc.h @@ -0,0 +1,177 @@ +/* + * Copyright (c) 2007-2015, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/** + * @file crypto_misc.h + */ + +#ifndef HEADER_CRYPTO_MISC_H +#define HEADER_CRYPTO_MISC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ssl/ssl_crypto.h" +#include "ssl/ssl_bigint.h" + +/************************************************************************** + * X509 declarations + **************************************************************************/ +#define X509_OK 0 +#define X509_NOT_OK -1 +#define X509_VFY_ERROR_NO_TRUSTED_CERT -2 +#define X509_VFY_ERROR_BAD_SIGNATURE -3 +#define X509_VFY_ERROR_NOT_YET_VALID -4 +#define X509_VFY_ERROR_EXPIRED -5 +#define X509_VFY_ERROR_SELF_SIGNED -6 +#define X509_VFY_ERROR_INVALID_CHAIN -7 +#define X509_VFY_ERROR_UNSUPPORTED_DIGEST -8 +#define X509_INVALID_PRIV_KEY -9 +#define X509_MAX_CERTS -10 + +/* + * The Distinguished Name + */ +#define X509_NUM_DN_TYPES 3 +#define X509_COMMON_NAME 0 +#define X509_ORGANIZATION 1 +#define X509_ORGANIZATIONAL_UNIT 2 + +struct _x509_ctx +{ + char *ca_cert_dn[X509_NUM_DN_TYPES]; + char *cert_dn[X509_NUM_DN_TYPES]; + char **subject_alt_dnsnames; + time_t not_before; + time_t not_after; + uint8_t *signature; + uint16_t sig_len; + uint8_t sig_type; + RSA_CTX *rsa_ctx; + bigint *digest; + struct _x509_ctx *next; +}; + +typedef struct _x509_ctx X509_CTX; + +#ifdef CONFIG_SSL_CERT_VERIFICATION +typedef struct +{ + X509_CTX *cert[CONFIG_X509_MAX_CA_CERTS]; +} CA_CERT_CTX; +#endif + +int x509_new(const uint8_t *cert, int *len, X509_CTX **ctx); +void x509_free(X509_CTX *x509_ctx); +#ifdef CONFIG_SSL_CERT_VERIFICATION +int x509_verify(const CA_CERT_CTX *ca_cert_ctx, const X509_CTX *cert); +#endif +#ifdef CONFIG_SSL_FULL_MODE +void x509_print(const X509_CTX *cert, CA_CERT_CTX *ca_cert_ctx); +const char * x509_display_error(int error); +#endif + +/************************************************************************** + * ASN1 declarations + **************************************************************************/ +#define ASN1_INTEGER 0x02 +#define ASN1_BIT_STRING 0x03 +#define ASN1_OCTET_STRING 0x04 +#define ASN1_NULL 0x05 +#define ASN1_PRINTABLE_STR2 0x0C +#define ASN1_OID 0x06 +#define ASN1_PRINTABLE_STR2 0x0C +#define ASN1_PRINTABLE_STR 0x13 +#define ASN1_TELETEX_STR 0x14 +#define ASN1_IA5_STR 0x16 +#define ASN1_UTC_TIME 0x17 +#define ASN1_GENERALIZED_TIME 0x18 +#define ASN1_UNICODE_STR 0x1e +#define ASN1_SEQUENCE 0x30 +#define ASN1_CONTEXT_DNSNAME 0x82 +#define ASN1_SET 0x31 +#define ASN1_V3_DATA 0xa3 +#define ASN1_IMPLICIT_TAG 0x80 +#define ASN1_CONTEXT_DNSNAME 0x82 +#define ASN1_EXPLICIT_TAG 0xa0 +#define ASN1_V3_DATA 0xa3 + +#define SIG_TYPE_MD2 0x02 +#define SIG_TYPE_MD5 0x04 +#define SIG_TYPE_SHA1 0x05 +#define SIG_TYPE_SHA256 0x0b +#define SIG_TYPE_SHA384 0x0c +#define SIG_TYPE_SHA512 0x0d + +uint32_t get_asn1_length(const uint8_t *buf, int *offset); +int asn1_get_private_key(const uint8_t *buf, int len, RSA_CTX **rsa_ctx); +int asn1_next_obj(const uint8_t *buf, int *offset, int obj_type); +int asn1_skip_obj(const uint8_t *buf, int *offset, int obj_type); +int asn1_get_int(const uint8_t *buf, int *offset, uint8_t **object); +int asn1_version(const uint8_t *cert, int *offset, X509_CTX *x509_ctx); +int asn1_validity(const uint8_t *cert, int *offset, X509_CTX *x509_ctx); +int asn1_name(const uint8_t *cert, int *offset, char *dn[]); +int asn1_public_key(const uint8_t *cert, int *offset, X509_CTX *x509_ctx); +#ifdef CONFIG_SSL_CERT_VERIFICATION +int asn1_signature(const uint8_t *cert, int *offset, X509_CTX *x509_ctx); +int asn1_find_subjectaltname(const uint8_t* cert, int offset); +int asn1_compare_dn(char * const dn1[], char * const dn2[]); +#endif /* CONFIG_SSL_CERT_VERIFICATION */ +int asn1_signature_type(const uint8_t *cert, + int *offset, X509_CTX *x509_ctx); + +/************************************************************************** + * MISC declarations + **************************************************************************/ +#define SALT_SIZE 8 + +extern const char * const unsupported_str; + +typedef void (*crypt_func)(void *, const uint8_t *, uint8_t *, int); +typedef void (*hmac_func)(const uint8_t *msg, int length, const uint8_t *key, + int key_len, uint8_t *digest); + +int get_file(const char *filename, uint8_t **buf); + +#if defined(CONFIG_SSL_FULL_MODE) || defined(WIN32) || defined(CONFIG_DEBUG) +EXP_FUNC void STDCALL print_blob(const char *format, const uint8_t *data, int size, ...); +#else + #define print_blob(...) +#endif + +EXP_FUNC int STDCALL base64_decode(const char *in, int len, + uint8_t *out, int *outlen); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_os_int.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_os_int.h new file mode 100755 index 0000000..0d81bb2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_os_int.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2012, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file os_int.h + * + * Ensure a consistent bit size + */ + +#ifndef HEADER_OS_INT_H +#define HEADER_OS_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(WIN32) +typedef UINT8 uint8_t; +typedef INT8 int8_t; +typedef UINT16 uint16_t; +typedef INT16 int16_t; +typedef UINT32 uint32_t; +typedef INT32 int32_t; +typedef UINT64 uint64_t; +typedef INT64 int64_t; +#else /* Not Win32 */ + +#ifdef CONFIG_PLATFORM_SOLARIS +#include +#else +//#include +#endif /* Not Solaris */ + +#endif /* Not Win32 */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_os_port.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_os_port.h new file mode 100755 index 0000000..4d8a318 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_os_port.h @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2007-2015, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file os_port.h + * + * Some stuff to minimise the differences between windows and linux/unix + */ + +#ifndef HEADER_OS_PORT_H +#define HEADER_OS_PORT_H + +#ifdef __cplusplus +extern "C" { +#endif + +//#include "../crypto/os_int.h" +#include "c_types.h" +#include "osapi.h" +#include +#include "lwip/app/time.h" + +#if 0 +#define ssl_printf(fmt, args...) os_printf(fmt,## args) +#else +#define ssl_printf(fmt, args...) +#endif + +#define STDCALL +#define EXP_FUNC + +//struct timeval { +// unsigned long tv_sec; /* seconds */ +// unsigned long tv_usec; /* and microseconds */ +//}; + +#define tls_htons(x) ((uint16)((((x) & 0xff) << 8) | (((x) >> 8) & 0xff))) +#define tls_ntohs(x) tls_htons(x) +#define tls_htonl(_n) ((uint32)( (((_n) & 0xff) << 24) | (((_n) & 0xff00) << 8) | (((_n) >> 8) & 0xff00) | (((_n) >> 24) & 0xff) )) +#define tls_ntohl(x) tls_htonl(x) + +#ifndef be16toh +#define be16toh(x) ((uint16)tls_ntohs((uint16)(x))) +#endif + +#ifndef htobe16 +#define htobe16(x) ((uint16)tls_htons((uint16)(x))) +#endif + +#ifndef be32toh +#define be32toh(x) ((uint32)tls_ntohl((uint32)(x))) +#endif + +#ifndef htobe32 +#define htobe32(x) ((uint32)tls_htonl((uint32)(x))) +#endif + +#ifndef be64toh +static __inline__ uint64 be64toh(uint64 __x); +static __inline__ uint64 be64toh(uint64 __x) {return (((uint64)be32toh(__x & (uint64)0xFFFFFFFFULL)) << 32) | ((uint64)be32toh((__x & (uint64)0xFFFFFFFF00000000ULL) >> 32));} +#define be64toh(x) be64toh(x) +#endif + +#ifndef htobe64 +#define htobe64(x) be64toh(x) +#endif + +/* Mutexing definitions */ + +#define SSL_CTX_MUTEX_INIT(A) +#define SSL_CTX_MUTEX_DESTROY(A) +#define SSL_CTX_LOCK(A) +#define SSL_CTX_UNLOCK(A) + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_private_key.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_private_key.h new file mode 100755 index 0000000..ce7985c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_private_key.h @@ -0,0 +1,54 @@ +unsigned char default_private_key[] = { + 0x30, 0x82, 0x02, 0x5d, 0x02, 0x01, 0x00, 0x02, 0x81, 0x81, 0x00, 0xcd, + 0xfd, 0x89, 0x48, 0xbe, 0x36, 0xb9, 0x95, 0x76, 0xd4, 0x13, 0x30, 0x0e, + 0xbf, 0xb2, 0xed, 0x67, 0x0a, 0xc0, 0x16, 0x3f, 0x51, 0x09, 0x9d, 0x29, + 0x2f, 0xb2, 0x6d, 0x3f, 0x3e, 0x6c, 0x2f, 0x90, 0x80, 0xa1, 0x71, 0xdf, + 0xbe, 0x38, 0xc5, 0xcb, 0xa9, 0x9a, 0x40, 0x14, 0x90, 0x0a, 0xf9, 0xb7, + 0x07, 0x0b, 0xe1, 0xda, 0xe7, 0x09, 0xbf, 0x0d, 0x57, 0x41, 0x86, 0x60, + 0xa1, 0xc1, 0x27, 0x91, 0x5b, 0x0a, 0x98, 0x46, 0x1b, 0xf6, 0xa2, 0x84, + 0xf8, 0x65, 0xc7, 0xce, 0x2d, 0x96, 0x17, 0xaa, 0x91, 0xf8, 0x61, 0x04, + 0x50, 0x70, 0xeb, 0xb4, 0x43, 0xb7, 0xdc, 0x9a, 0xcc, 0x31, 0x01, 0x14, + 0xd4, 0xcd, 0xcc, 0xc2, 0x37, 0x6d, 0x69, 0x82, 0xd6, 0xc6, 0xc4, 0xbe, + 0xf2, 0x34, 0xa5, 0xc9, 0xa6, 0x19, 0x53, 0x32, 0x7a, 0x86, 0x0e, 0x91, + 0x82, 0x0f, 0xa1, 0x42, 0x54, 0xaa, 0x01, 0x02, 0x03, 0x01, 0x00, 0x01, + 0x02, 0x81, 0x81, 0x00, 0x95, 0xaa, 0x6e, 0x11, 0xf5, 0x6a, 0x8b, 0xa2, + 0xc6, 0x48, 0xc6, 0x7c, 0x37, 0x6b, 0x1f, 0x55, 0x10, 0x76, 0x26, 0x24, + 0xc3, 0xf2, 0x5c, 0x5a, 0xdd, 0x2e, 0xf3, 0xa4, 0x1e, 0xbc, 0x7b, 0x1c, + 0x80, 0x10, 0x85, 0xbc, 0xd8, 0x45, 0x3c, 0xb8, 0xb2, 0x06, 0x53, 0xb5, + 0xd5, 0x7a, 0xe7, 0x0e, 0x92, 0xe6, 0x42, 0xc2, 0xe2, 0x2a, 0xd5, 0xd1, + 0x03, 0x9f, 0x6f, 0x53, 0x74, 0x68, 0x72, 0x8e, 0xbf, 0x03, 0xbb, 0xab, + 0xbd, 0xa1, 0xf9, 0x81, 0x7d, 0x12, 0xd4, 0x9d, 0xb6, 0xae, 0x4c, 0xad, + 0xca, 0xa8, 0xc9, 0x80, 0x8d, 0x0d, 0xd5, 0xd0, 0xa1, 0xbf, 0xec, 0x60, + 0x48, 0x49, 0xed, 0x97, 0x0f, 0x5e, 0xed, 0xfc, 0x39, 0x15, 0x96, 0x9e, + 0x5d, 0xe2, 0xb4, 0x5d, 0x2e, 0x04, 0xdc, 0x08, 0xa2, 0x65, 0x29, 0x2d, + 0x37, 0xfb, 0x62, 0x90, 0x1b, 0x7b, 0xe5, 0x3a, 0x58, 0x05, 0x55, 0xc1, + 0x02, 0x41, 0x00, 0xfc, 0x69, 0x28, 0xc9, 0xa8, 0xc4, 0x5c, 0xe3, 0xd0, + 0x5e, 0xaa, 0xda, 0xde, 0x87, 0x74, 0xdb, 0xcb, 0x40, 0x78, 0x8e, 0x1d, + 0x12, 0x96, 0x16, 0x61, 0x3f, 0xb3, 0x3e, 0xa3, 0x0d, 0xdc, 0x49, 0xa5, + 0x25, 0x87, 0xc5, 0x97, 0x85, 0x9d, 0xbb, 0xb4, 0xf0, 0x44, 0xfd, 0x6c, + 0xe8, 0xd2, 0x8c, 0xec, 0x33, 0x81, 0x46, 0x1e, 0x10, 0x12, 0x33, 0x16, + 0x95, 0x00, 0x4f, 0x75, 0xb4, 0xe5, 0x79, 0x02, 0x41, 0x00, 0xd0, 0xeb, + 0x65, 0x07, 0x10, 0x3b, 0xd9, 0x03, 0xeb, 0xdc, 0x6f, 0x4b, 0x8f, 0xc3, + 0x87, 0xce, 0x76, 0xd6, 0xc5, 0x14, 0x21, 0x4e, 0xe7, 0x4f, 0x1b, 0xe8, + 0x05, 0xf8, 0x84, 0x1a, 0xe0, 0xc5, 0xd6, 0xe3, 0x08, 0xb3, 0x54, 0x57, + 0x02, 0x1f, 0xd4, 0xd9, 0xfb, 0xff, 0x40, 0xb1, 0x56, 0x1c, 0x60, 0xf7, + 0xac, 0x91, 0xf3, 0xd3, 0xc6, 0x7f, 0x84, 0xfd, 0x84, 0x9d, 0xea, 0x26, + 0xee, 0xc9, 0x02, 0x41, 0x00, 0xa6, 0xcf, 0x1c, 0x6c, 0x81, 0x03, 0x1c, + 0x5c, 0x56, 0x05, 0x6a, 0x26, 0x70, 0xef, 0xd6, 0x13, 0xb7, 0x74, 0x28, + 0xf7, 0xca, 0x50, 0xd1, 0x2d, 0x83, 0x21, 0x64, 0xe4, 0xdd, 0x3f, 0x38, + 0xb8, 0xd6, 0xd2, 0x41, 0xb3, 0x1c, 0x9a, 0xea, 0x0d, 0xf5, 0xda, 0xdf, + 0xcd, 0x17, 0x9f, 0x9a, 0x1e, 0x15, 0xaf, 0x48, 0x1c, 0xbd, 0x9b, 0x63, + 0x5b, 0xad, 0xed, 0xd4, 0xa1, 0xae, 0xa9, 0x59, 0x09, 0x02, 0x40, 0x4e, + 0x08, 0xce, 0xa8, 0x8f, 0xc0, 0xba, 0xf3, 0x83, 0x02, 0xc8, 0x33, 0x62, + 0x14, 0x77, 0xc2, 0x7f, 0x93, 0x02, 0xf3, 0xdc, 0xe9, 0x1a, 0xee, 0xea, + 0x8e, 0x84, 0xc4, 0x69, 0x9b, 0x9c, 0x7f, 0x69, 0x1f, 0x4e, 0x1d, 0xa5, + 0x90, 0x06, 0x44, 0x1b, 0x7d, 0xfc, 0x69, 0x40, 0x21, 0xbc, 0xf7, 0x46, + 0xa4, 0xdc, 0x39, 0x7b, 0xe8, 0x8b, 0x49, 0x10, 0x44, 0x9d, 0x67, 0x5a, + 0x91, 0x86, 0x39, 0x02, 0x40, 0x41, 0x2c, 0x4e, 0xfe, 0xd9, 0x90, 0x89, + 0x00, 0x5c, 0x94, 0x0a, 0x4a, 0x7e, 0x1b, 0x1a, 0x80, 0x06, 0x01, 0x37, + 0xda, 0x50, 0x61, 0x9d, 0x9c, 0xfe, 0x25, 0x7f, 0xd8, 0xd4, 0xc4, 0x9e, + 0x81, 0xf2, 0x0c, 0x1e, 0x38, 0x21, 0x1e, 0x90, 0x3f, 0xd4, 0xba, 0x6c, + 0x53, 0xcb, 0xf0, 0x77, 0x79, 0x9b, 0xf1, 0xfa, 0x3f, 0x81, 0xdc, 0xf3, + 0x21, 0x02, 0x6d, 0xb7, 0x95, 0xc3, 0x2e, 0xce, 0xd5 +}; +unsigned int default_private_key_len = 609; diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_ssl.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_ssl.h new file mode 100755 index 0000000..113f73e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_ssl.h @@ -0,0 +1,503 @@ +/* + * Copyright (c) 2007, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @mainpage axTLS API + * + * @image html axolotl.jpg + * + * The axTLS library has features such as: + * - The TLSv1 SSL client/server protocol + * - No requirement to use any openssl libraries. + * - A choice between AES block (128/256 bit) and RC4 (128 bit) stream ciphers. + * - RSA encryption/decryption with variable sized keys (up to 4096 bits). + * - Certificate chaining and peer authentication. + * - Session resumption, session renegotiation. + * - ASN.1, X.509, PKCS#8, PKCS#12 keys/certificates with DER/PEM encoding. + * - Highly configurable compile time options. + * - Portable across many platforms (written in ANSI C), and has language + * bindings in C, C#, VB.NET, Java, Perl and Lua. + * - Partial openssl API compatibility (via a wrapper). + * - A very small footprint (around 50-60kB for the library in 'server-only' + * mode). + * - No dependencies on sockets - can use serial connections for example. + * - A very simple API - ~ 20 functions/methods. + * + * A list of these functions/methods are described below. + * + * @ref c_api + * + * @ref bigint_api + * + * @ref csharp_api + * + * @ref java_api + */ +#ifndef HEADER_SSL_H +#define HEADER_SSL_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "lwip/app/time.h" +//typedef long time_t; + +/* need to predefine before ssl_lib.h gets to it */ +#define SSL_SESSION_ID_SIZE 32 + +#include "ssl/ssl_tls1.h" + +/* The optional parameters that can be given to the client/server SSL engine */ +#define SSL_CLIENT_AUTHENTICATION 0x00010000 +#define SSL_SERVER_VERIFY_LATER 0x00020000 +#define SSL_NO_DEFAULT_KEY 0x00040000 +#define SSL_DISPLAY_STATES 0x00080000 +#define SSL_DISPLAY_BYTES 0x00100000 +#define SSL_DISPLAY_CERTS 0x00200000 +#define SSL_DISPLAY_RSA 0x00400000 +#define SSL_CONNECT_IN_PARTS 0x00800000 + +/* errors that can be generated */ +#define SSL_OK 0 +#define SSL_NOT_OK -1 +#define SSL_ERROR_DEAD -2 +#define SSL_CLOSE_NOTIFY -3 +#define SSL_ERROR_CONN_LOST -256 +#define SSL_ERROR_SOCK_SETUP_FAILURE -258 +#define SSL_ERROR_INVALID_HANDSHAKE -260 +#define SSL_ERROR_INVALID_PROT_MSG -261 +#define SSL_ERROR_INVALID_HMAC -262 +#define SSL_ERROR_INVALID_VERSION -263 +#define SSL_ERROR_INVALID_SESSION -265 +#define SSL_ERROR_NO_CIPHER -266 +#define SSL_ERROR_BAD_CERTIFICATE -268 +#define SSL_ERROR_INVALID_KEY -269 +#define SSL_ERROR_FINISHED_INVALID -271 +#define SSL_ERROR_NO_CERT_DEFINED -272 +#define SSL_ERROR_NO_CLIENT_RENOG -273 +#define SSL_ERROR_NOT_SUPPORTED -274 +#define SSL_X509_OFFSET -512 +#define SSL_X509_ERROR(A) (SSL_X509_OFFSET+A) + +/* alert types that are recognized */ +#define SSL_ALERT_TYPE_WARNING 1 +#define SLL_ALERT_TYPE_FATAL 2 + +/* these are all the alerts that are recognized */ +#define SSL_ALERT_CLOSE_NOTIFY 0 +#define SSL_ALERT_UNEXPECTED_MESSAGE 10 +#define SSL_ALERT_BAD_RECORD_MAC 20 +#define SSL_ALERT_HANDSHAKE_FAILURE 40 +#define SSL_ALERT_BAD_CERTIFICATE 42 +#define SSL_ALERT_ILLEGAL_PARAMETER 47 +#define SSL_ALERT_DECODE_ERROR 50 +#define SSL_ALERT_DECRYPT_ERROR 51 +#define SSL_ALERT_INVALID_VERSION 70 +#define SSL_ALERT_NO_RENEGOTIATION 100 + +/* The ciphers that are supported */ +#define SSL_AES128_SHA 0x2f +#define SSL_AES256_SHA 0x35 +#define SSL_RC4_128_SHA 0x05 +#define SSL_RC4_128_MD5 0x04 + +/* build mode ids' */ +#define SSL_BUILD_SKELETON_MODE 0x01 +#define SSL_BUILD_SERVER_ONLY 0x02 +#define SSL_BUILD_ENABLE_VERIFICATION 0x03 +#define SSL_BUILD_ENABLE_CLIENT 0x04 +#define SSL_BUILD_FULL_MODE 0x05 + +/* offsets to retrieve configuration information */ +#define SSL_BUILD_MODE 0 +#define SSL_MAX_CERT_CFG_OFFSET 1 +#define SSL_MAX_CA_CERT_CFG_OFFSET 2 +#define SSL_HAS_PEM 3 + +/* default session sizes */ +#define SSL_DEFAULT_SVR_SESS 1 //modify 5->1 by lhan +#define SSL_DEFAULT_CLNT_SESS 1 + +/* X.509/X.520 distinguished name types */ +#define SSL_X509_CERT_COMMON_NAME 0 +#define SSL_X509_CERT_ORGANIZATION 1 +#define SSL_X509_CERT_ORGANIZATIONAL_NAME 2 +#define SSL_X509_CA_CERT_COMMON_NAME 3 +#define SSL_X509_CA_CERT_ORGANIZATION 4 +#define SSL_X509_CA_CERT_ORGANIZATIONAL_NAME 5 + +/* SSL object loader types */ +#define SSL_OBJ_X509_CERT 1 +#define SSL_OBJ_X509_CACERT 2 +#define SSL_OBJ_RSA_KEY 3 +#define SSL_OBJ_PKCS8 4 +#define SSL_OBJ_PKCS12 5 + +/** + * @defgroup c_api Standard C API + * @brief The standard interface in C. + * @{ + */ + +/** + * @brief Establish a new client/server context. + * + * This function is called before any client/server SSL connections are made. + * + * Each new connection will use the this context's private key and + * certificate chain. If a different certificate chain is required, then a + * different context needs to be be used. + * + * There are two threading models supported - a single thread with one + * SSL_CTX can support any number of SSL connections - and multiple threads can + * support one SSL_CTX object each (the default). But if a single SSL_CTX + * object uses many SSL objects in individual threads, then the + * CONFIG_SSL_CTX_MUTEXING option needs to be configured. + * + * @param options [in] Any particular options. At present the options + * supported are: + * - SSL_SERVER_VERIFY_LATER (client only): Don't stop a handshake if the server + * authentication fails. The certificate can be authenticated later with a + * call to ssl_verify_cert(). + * - SSL_CLIENT_AUTHENTICATION (server only): Enforce client authentication + * i.e. each handshake will include a "certificate request" message from the + * server. Only available if verification has been enabled. + * - SSL_DISPLAY_BYTES (full mode build only): Display the byte sequences + * during the handshake. + * - SSL_DISPLAY_STATES (full mode build only): Display the state changes + * during the handshake. + * - SSL_DISPLAY_CERTS (full mode build only): Display the certificates that + * are passed during a handshake. + * - SSL_DISPLAY_RSA (full mode build only): Display the RSA key details that + * are passed during a handshake. + * - SSL_CONNECT_IN_PARTS (client only): To use a non-blocking version of + * ssl_client_new(). + * @param num_sessions [in] The number of sessions to be used for session + * caching. If this value is 0, then there is no session caching. This option + * is not used in skeleton mode. + * @return A client/server context. + */ +EXP_FUNC SSL_CTX * STDCALL ssl_ctx_new(uint32_t options, int num_sessions); + +/** + * @brief Remove a client/server context. + * + * Frees any used resources used by this context. Each connection will be + * sent a "Close Notify" alert (if possible). + * @param ssl_ctx [in] The client/server context. + */ +EXP_FUNC void STDCALL ssl_ctx_free(SSL_CTX *ssl_ctx); + +/** + * @brief (server only) Establish a new SSL connection to an SSL client. + * + * It is up to the application to establish the logical connection (whether it + * is a socket, serial connection etc). + * @param ssl_ctx [in] The server context. + * @param client_fd [in] The client's file descriptor. + * @return An SSL object reference. + */ +//EXP_FUNC SSL * STDCALL ssl_server_new(SSL_CTX *ssl_ctx, int client_fd); + +EXP_FUNC SSL *STDCALL sslserver_new(SSL_CTX *ssl_ctx, struct tcp_pcb* client_pcb); +/** + * @brief (client only) Establish a new SSL connection to an SSL server. + * + * It is up to the application to establish the initial logical connection + * (whether it is a socket, serial connection etc). + * + * This is a normally a blocking call - it will finish when the handshake is + * complete (or has failed). To use in non-blocking mode, set + * SSL_CONNECT_IN_PARTS in ssl_ctx_new(). + * @param ssl_ctx [in] The client context. + * @param client_fd [in] The client's file descriptor. + * @param session_id [in] A 32 byte session id for session resumption. This + * can be null if no session resumption is being used or required. This option + * is not used in skeleton mode. + * @param sess_id_size The size of the session id (max 32) + * @return An SSL object reference. Use ssl_handshake_status() to check + * if a handshake succeeded. + */ +//EXP_FUNC SSL * STDCALL ssl_client_new(SSL_CTX *ssl_ctx, int client_fd, const uint8_t *session_id, uint8_t sess_id_size); + +EXP_FUNC SSL *STDCALL SSLClient_new(SSL_CTX *ssl_ctx, struct tcp_pcb *SslClient_pcb, const + uint8_t *session_id, uint8_t sess_id_size); +/** + * @brief Free any used resources on this connection. + + * A "Close Notify" message is sent on this connection (if possible). It is up + * to the application to close the socket or file descriptor. + * @param ssl [in] The ssl object reference. + */ +EXP_FUNC void STDCALL ssl_free(SSL *ssl); + +/** + * @brief Read the SSL data stream. + * If the socket is non-blocking and data is blocked then SSO_OK will be + * returned. + * @param ssl [in] An SSL object reference. + * @param in_data [out] If the read was successful, a pointer to the read + * buffer will be here. Do NOT ever free this memory as this buffer is used in + * sucessive calls. If the call was unsuccessful, this value will be null. + * @return The number of decrypted bytes: + * - if > 0, then the handshaking is complete and we are returning the number + * of decrypted bytes. + * - SSL_OK if the handshaking stage is successful (but not yet complete). + * - < 0 if an error. + * @see ssl.h for the error code list. + * @note Use in_data before doing any successive ssl calls. + */ +EXP_FUNC int STDCALL ssl_read(SSL *ssl, uint8_t **in_data); + +/** + * @brief Write to the SSL data stream. + * if the socket is non-blocking and data is blocked then a check is made + * to ensure that all data is sent (i.e. blocked mode is forced). + * @param ssl [in] An SSL obect reference. + * @param out_data [in] The data to be written + * @param out_len [in] The number of bytes to be written. + * @return The number of bytes sent, or if < 0 if an error. + * @see ssl.h for the error code list. + */ +EXP_FUNC int STDCALL ssl_write(SSL *ssl, const uint8_t *out_data, int out_len); + +/** + * @brief Find an ssl object based on a file descriptor. + * + * Goes through the list of SSL objects maintained in a client/server context + * to look for a file descriptor match. + * @param ssl_ctx [in] The client/server context. + * @param client_fd [in] The file descriptor. + * @return A reference to the SSL object. Returns null if the object could not + * be found. + */ +EXP_FUNC SSL * STDCALL ssl_find(SSL_CTX *ssl_ctx, int client_fd); + +/** + * @brief Get the session id for a handshake. + * + * This will be a 32 byte sequence and is available after the first + * handshaking messages are sent. + * @param ssl [in] An SSL object reference. + * @return The session id as a 32 byte sequence. + * @note A SSLv23 handshake may have only 16 valid bytes. + */ +EXP_FUNC const uint8_t * STDCALL ssl_get_session_id(const SSL *ssl); + +/** + * @brief Get the session id size for a handshake. + * + * This will normally be 32 but could be 0 (no session id) or something else. + * @param ssl [in] An SSL object reference. + * @return The size of the session id. + */ +EXP_FUNC uint8_t STDCALL ssl_get_session_id_size(const SSL *ssl); + +/** + * @brief Return the cipher id (in the SSL form). + * @param ssl [in] An SSL object reference. + * @return The cipher id. This will be one of the following: + * - SSL_AES128_SHA (0x2f) + * - SSL_AES256_SHA (0x35) + * - SSL_RC4_128_SHA (0x05) + * - SSL_RC4_128_MD5 (0x04) + */ +EXP_FUNC uint8_t STDCALL ssl_get_cipher_id(const SSL *ssl); + +/** + * @brief Return the status of the handshake. + * @param ssl [in] An SSL object reference. + * @return SSL_OK if the handshake is complete and ok. + * @see ssl.h for the error code list. + */ +EXP_FUNC int STDCALL ssl_handshake_status(const SSL *ssl); + +/** + * @brief Retrieve various parameters about the axTLS engine. + * @param offset [in] The configuration offset. It will be one of the following: + * - SSL_BUILD_MODE The build mode. This will be one of the following: + * - SSL_BUILD_SERVER_ONLY (basic server mode) + * - SSL_BUILD_ENABLE_VERIFICATION (server can do client authentication) + * - SSL_BUILD_ENABLE_CLIENT (client/server capabilties) + * - SSL_BUILD_FULL_MODE (client/server with diagnostics) + * - SSL_BUILD_SKELETON_MODE (skeleton mode) + * - SSL_MAX_CERT_CFG_OFFSET The maximum number of certificates allowed. + * - SSL_MAX_CA_CERT_CFG_OFFSET The maximum number of CA certificates allowed. + * - SSL_HAS_PEM 1 if supported + * @return The value of the requested parameter. + */ +EXP_FUNC int STDCALL ssl_get_config(int offset); + +/** + * @brief Display why the handshake failed. + * + * This call is only useful in a 'full mode' build. The output is to stdout. + * @param error_code [in] An error code. + * @see ssl.h for the error code list. + */ +//EXP_FUNC void STDCALL ssl_display_error(int error_code); + +/** + * @brief Authenticate a received certificate. + * + * This call is usually made by a client after a handshake is complete and the + * context is in SSL_SERVER_VERIFY_LATER mode. + * @param ssl [in] An SSL object reference. + * @return SSL_OK if the certificate is verified. + */ +EXP_FUNC int STDCALL ssl_verify_cert(const SSL *ssl); + +/** + * @brief Retrieve an X.509 distinguished name component. + * + * When a handshake is complete and a certificate has been exchanged, then the + * details of the remote certificate can be retrieved. + * + * This will usually be used by a client to check that the server's common + * name matches the URL. + * + * @param ssl [in] An SSL object reference. + * @param component [in] one of: + * - SSL_X509_CERT_COMMON_NAME + * - SSL_X509_CERT_ORGANIZATION + * - SSL_X509_CERT_ORGANIZATIONAL_NAME + * - SSL_X509_CA_CERT_COMMON_NAME + * - SSL_X509_CA_CERT_ORGANIZATION + * - SSL_X509_CA_CERT_ORGANIZATIONAL_NAME + * @return The appropriate string (or null if not defined) + * @note Verification build mode must be enabled. + */ +EXP_FUNC const char * STDCALL ssl_get_cert_dn(const SSL *ssl, int component); + +/** + * @brief Retrieve a Subject Alternative DNSName + * + * When a handshake is complete and a certificate has been exchanged, then the + * details of the remote certificate can be retrieved. + * + * This will usually be used by a client to check that the server's DNS + * name matches the URL. + * + * @param ssl [in] An SSL object reference. + * @param dnsindex [in] The index of the DNS name to retrieve. + * @return The appropriate string (or null if not defined) + * @note Verification build mode must be enabled. + */ +EXP_FUNC const char * STDCALL ssl_get_cert_subject_alt_dnsname(const SSL *ssl, int dnsindex); + +/** + * @brief Force the client to perform its handshake again. + * + * For a client this involves sending another "client hello" message. + * For the server is means sending a "hello request" message. + * + * This is a blocking call on the client (until the handshake completes). + * + * @param ssl [in] An SSL object reference. + * @return SSL_OK if renegotiation instantiation was ok + */ +EXP_FUNC int STDCALL ssl_renegotiate(SSL *ssl); + +/** + * @brief Process a file that is in binary DER or ASCII PEM format. + * + * These are temporary objects that are used to load private keys, + * certificates etc into memory. + * @param ssl_ctx [in] The client/server context. + * @param obj_type [in] The format of the file. Can be one of: + * - SSL_OBJ_X509_CERT (no password required) + * - SSL_OBJ_X509_CACERT (no password required) + * - SSL_OBJ_RSA_KEY (AES128/AES256 PEM encryption supported) + * - SSL_OBJ_PKCS8 (RC4-128 encrypted data supported) + * - SSL_OBJ_PKCS12 (RC4-128 encrypted data supported) + * + * PEM files are automatically detected (if supported). The object type is + * also detected, and so is not relevant for these types of files. + * @param filename [in] The location of a file in DER/PEM format. + * @param password [in] The password used. Can be null if not required. + * @return SSL_OK if all ok + * @note Not available in skeleton build mode. + */ +EXP_FUNC int STDCALL ssl_obj_load(SSL_CTX *ssl_ctx, int obj_type, const char *filename, const char *password); + +/** + * @brief Process binary data. + * + * These are temporary objects that are used to load private keys, + * certificates etc into memory. + * @param ssl_ctx [in] The client/server context. + * @param obj_type [in] The format of the memory data. + * @param data [in] The binary data to be loaded. + * @param len [in] The amount of data to be loaded. + * @param password [in] The password used. Can be null if not required. + * @return SSL_OK if all ok + * @see ssl_obj_load for more details on obj_type. + */ +EXP_FUNC int STDCALL ssl_obj_memory_load(SSL_CTX *ssl_ctx, int obj_type, const uint8_t *data, int len, const char *password); + +#ifdef CONFIG_SSL_GENERATE_X509_CERT +/** + * @brief Create an X.509 certificate. + * + * This certificate is a self-signed v1 cert with a fixed start/stop validity + * times. It is signed with an internal private key in ssl_ctx. + * + * @param ssl_ctx [in] The client/server context. + * @param options [in] Not used yet. + * @param dn [in] An array of distinguished name strings. The array is defined + * by: + * - SSL_X509_CERT_COMMON_NAME (0) + * - If SSL_X509_CERT_COMMON_NAME is empty or not defined, then the + * hostname will be used. + * - SSL_X509_CERT_ORGANIZATION (1) + * - If SSL_X509_CERT_ORGANIZATION is empty or not defined, then $USERNAME + * will be used. + * - SSL_X509_CERT_ORGANIZATIONAL_NAME (2) + * - SSL_X509_CERT_ORGANIZATIONAL_NAME is optional. + * @param cert_data [out] The certificate as a sequence of bytes. + * @return < 0 if an error, or the size of the certificate in bytes. + * @note cert_data must be freed when there is no more need for it. + */ +EXP_FUNC int STDCALL ssl_x509_create(SSL_CTX *ssl_ctx, uint32_t options, const char * dn[], uint8_t **cert_data); +#endif + +/** + * @brief Return the axTLS library version as a string. + */ +EXP_FUNC const char * STDCALL ssl_version(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_tls1.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_tls1.h new file mode 100755 index 0000000..5788394 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_tls1.h @@ -0,0 +1,303 @@ +/* + * Copyright (c) 2007, Cameron Rich + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of the axTLS project nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file tls1.h + * + * @brief The definitions for the TLS library. + */ +#ifndef HEADER_SSL_LIB_H +#define HEADER_SSL_LIB_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "c_types.h" +#include "ssl/ssl_version.h" +#include "ssl/ssl_config.h" +//#include "../crypto/os_int.h" +#include "ssl/ssl_crypto.h" +#include "ssl/ssl_crypto_misc.h" +#include "lwip/tcp.h" + +#define SSL_PROTOCOL_MIN_VERSION 0x31 /* TLS v1.0 */ +#define SSL_PROTOCOL_MINOR_VERSION 0x02 /* TLS v1.1 */ +#define SSL_PROTOCOL_VERSION_MAX 0x32 /* TLS v1.1 */ +#define SSL_PROTOCOL_VERSION1_1 0x32 /* TLS v1.1 */ +#define SSL_RANDOM_SIZE 32 +#define SSL_SECRET_SIZE 48 +#define SSL_FINISHED_HASH_SIZE 12 +#define SSL_RECORD_SIZE 5 +#define SSL_SERVER_READ 0 +#define SSL_SERVER_WRITE 1 +#define SSL_CLIENT_READ 2 +#define SSL_CLIENT_WRITE 3 +#define SSL_HS_HDR_SIZE 4 + +/* the flags we use while establishing a connection */ +#define SSL_NEED_RECORD 0x0001 +#define SSL_TX_ENCRYPTED 0x0002 +#define SSL_RX_ENCRYPTED 0x0004 +#define SSL_SESSION_RESUME 0x0008 +#define SSL_IS_CLIENT 0x0010 +#define SSL_HAS_CERT_REQ 0x0020 +#define SSL_SENT_CLOSE_NOTIFY 0x0040 + +/* some macros to muck around with flag bits */ +#define SET_SSL_FLAG(A) (ssl->flag |= A) +#define CLR_SSL_FLAG(A) (ssl->flag &= ~A) +#define IS_SET_SSL_FLAG(A) (ssl->flag & A) + +#define MAX_KEY_BYTE_SIZE 512 /* for a 4096 bit key */ +#define RT_MAX_PLAIN_LENGTH 1024 +#define RT_EXTRA 1024 +#define BM_RECORD_OFFSET 5 + +#ifdef CONFIG_SSL_SKELETON_MODE +#define NUM_PROTOCOLS 1 +#else +#define NUM_PROTOCOLS 4 +#endif + +#define PARANOIA_CHECK(A, B) if (A < B) { \ + ret = SSL_ERROR_INVALID_HANDSHAKE; goto error; } + +/* protocol types */ +enum +{ + PT_CHANGE_CIPHER_SPEC = 20, + PT_ALERT_PROTOCOL, + PT_HANDSHAKE_PROTOCOL, + PT_APP_PROTOCOL_DATA +}; + +/* handshaking types */ +enum +{ + HS_HELLO_REQUEST, + HS_CLIENT_HELLO, + HS_SERVER_HELLO, + HS_CERTIFICATE = 11, + HS_SERVER_KEY_XCHG, + HS_CERT_REQ, + HS_SERVER_HELLO_DONE, + HS_CERT_VERIFY, + HS_CLIENT_KEY_XCHG, + HS_FINISHED = 20 +}; + +typedef struct +{ + uint8_t cipher; + uint8_t key_size; + uint8_t iv_size; + uint8_t key_block_size; + uint8_t padding_size; + uint8_t digest_size; + hmac_func hmac; + crypt_func encrypt; + crypt_func decrypt; +} cipher_info_t; + +struct _SSLObjLoader +{ + uint8_t *buf; + int len; +}; + +typedef struct _SSLObjLoader SSLObjLoader; + +typedef struct +{ + time_t conn_time; + uint8_t session_id[SSL_SESSION_ID_SIZE]; + uint8_t master_secret[SSL_SECRET_SIZE]; +} SSL_SESSION; + +typedef struct +{ + uint8_t *buf; + int size; +} SSL_CERT; + +typedef struct +{ + MD5_CTX md5_ctx; + SHA1_CTX sha1_ctx; + uint8_t final_finish_mac[SSL_FINISHED_HASH_SIZE]; + uint8_t *key_block; + uint8_t master_secret[SSL_SECRET_SIZE]; + uint8_t client_random[SSL_RANDOM_SIZE]; /* client's random sequence */ + uint8_t server_random[SSL_RANDOM_SIZE]; /* server's random sequence */ + uint16_t bm_proc_index; +} DISPOSABLE_CTX; + +struct _SSL +{ + uint32_t flag; + uint16_t need_bytes; + uint16_t got_bytes; + uint8_t record_type; + uint8_t cipher; + uint8_t sess_id_size; + uint8_t version; + uint8_t client_version; + sint16_t next_state; + sint16_t hs_status; + DISPOSABLE_CTX *dc; /* temporary data which we'll get rid of soon */ + //int client_fd; + struct tcp_pcb *SslClient_pcb;//add by ives 12.12.2013 + void *reserve; //modify by Liuhan 09.22.2015 + const cipher_info_t *cipher_info; + void *encrypt_ctx; + void *decrypt_ctx; +// uint8_t bm_all_data[RT_MAX_PLAIN_LENGTH+RT_EXTRA]; + uint8 *bm_all_data;//fix by Liuh 01.04.2015 + uint8_t *bm_data; + uint16_t bm_index; + uint16_t bm_read_index; + struct _SSL *next; /* doubly linked list */ + struct _SSL *prev; + struct _SSL_CTX *ssl_ctx; /* back reference to a clnt/svr ctx */ +#ifndef CONFIG_SSL_SKELETON_MODE + uint16_t session_index; + SSL_SESSION *session; +#endif +#ifdef CONFIG_SSL_CERT_VERIFICATION + X509_CTX *x509_ctx; +#endif + + uint8_t session_id[SSL_SESSION_ID_SIZE]; + uint8_t client_mac[SHA1_SIZE]; /* for HMAC verification */ + uint8_t server_mac[SHA1_SIZE]; /* for HMAC verification */ + uint8_t read_sequence[8]; /* 64 bit sequence number */ + uint8_t write_sequence[8]; /* 64 bit sequence number */ + uint8_t hmac_header[SSL_RECORD_SIZE]; /* rx hmac */ +}; + +typedef struct _SSL SSL; + +struct _SSL_CTX +{ + uint32_t options; + uint8_t chain_length; + RSA_CTX *rsa_ctx; +#ifdef CONFIG_SSL_CERT_VERIFICATION + CA_CERT_CTX *ca_cert_ctx; +#endif + SSL *head; + SSL *tail; + SSL_CERT certs[CONFIG_SSL_MAX_CERTS]; +#ifndef CONFIG_SSL_SKELETON_MODE + uint16_t num_sessions; + SSL_SESSION **ssl_sessions; +#endif +#ifdef CONFIG_SSL_CTX_MUTEXING + SSL_CTX_MUTEX_TYPE mutex; +#endif +#ifdef CONFIG_OPENSSL_COMPATIBLE + void *bonus_attr; +#endif +}; + +typedef struct _SSL_CTX SSL_CTX; + +/* backwards compatibility */ +typedef struct _SSL_CTX SSLCTX; + +extern const uint8_t ssl_prot_prefs[NUM_PROTOCOLS]; + +SSL *ssl_new(SSL_CTX *ssl_ctx, int client_fd); +SSL *ssl_new_context(SSL_CTX *ssl_ctx, struct tcp_pcb *SslClient_pcb); +void disposable_new(SSL *ssl); +void disposable_free(SSL *ssl); +int send_packet(SSL *ssl, uint8_t protocol, + const uint8_t *in, int length); +int do_svr_handshake(SSL *ssl, int handshake_type, uint8_t *buf, int hs_len); +int do_clnt_handshake(SSL *ssl, int handshake_type, uint8_t *buf, int hs_len); +int process_finished(SSL *ssl, uint8_t *buf, int hs_len); +int process_sslv23_client_hello(SSL *ssl); +int send_alert(SSL *ssl, int error_code); +int send_finished(SSL *ssl); +int send_certificate(SSL *ssl); +int basic_read(SSL *ssl, uint8_t **in_data); +int send_change_cipher_spec(SSL *ssl); +void finished_digest(SSL *ssl, const char *label, uint8_t *digest); +void generate_master_secret(SSL *ssl, const uint8_t *premaster_secret); +void add_packet(SSL *ssl, const uint8_t *pkt, int len); +int add_cert(SSL_CTX *ssl_ctx, const uint8_t *buf, int len); +int add_private_key(SSL_CTX *ssl_ctx, SSLObjLoader *ssl_obj); +void ssl_obj_free(SSLObjLoader *ssl_obj); +int pkcs8_decode(SSL_CTX *ssl_ctx, SSLObjLoader *ssl_obj, const char *password); +int pkcs12_decode(SSL_CTX *ssl_ctx, SSLObjLoader *ssl_obj, const char *password); +int load_key_certs(SSL_CTX *ssl_ctx); +#ifdef CONFIG_SSL_CERT_VERIFICATION +int add_cert_auth(SSL_CTX *ssl_ctx, const uint8_t *buf, int len); +void remove_ca_certs(CA_CERT_CTX *ca_cert_ctx); +#endif +#ifdef CONFIG_SSL_ENABLE_CLIENT +int do_client_connect(SSL *ssl); +#endif + +#ifdef CONFIG_SSL_FULL_MODE +//void DISPLAY_STATE(SSL *ssl, int is_send, uint8_t state, int not_ok); +//void DISPLAY_BYTES(SSL *ssl, const char *format, +// const uint8_t *data, int size, ...); +//void DISPLAY_CERT(SSL *ssl, const X509_CTX *x509_ctx); +//void DISPLAY_RSA(SSL *ssl, const RSA_CTX *rsa_ctx); +//void DISPLAY_ALERT(SSL *ssl, int alert); +#else +#define DISPLAY_STATE(A,B,C,D) +#define DISPLAY_CERT(A,B) +#define DISPLAY_RSA(A,B) +#define DISPLAY_ALERT(A, B) +#ifdef WIN32 +void DISPLAY_BYTES(SSL *ssl, const char *format,/* win32 has no variadic macros */ + const uint8_t *data, int size, ...); +#else +#define DISPLAY_BYTES(A,B,C,D,...) +#endif +#endif + +#ifdef CONFIG_SSL_CERT_VERIFICATION +int process_certificate(SSL *ssl, X509_CTX **x509_ctx); +#endif + +SSL_SESSION *ssl_session_update(int max_sessions, + SSL_SESSION *ssl_sessions[], SSL *ssl, + const uint8_t *session_id); +void kill_ssl_session(SSL_SESSION **ssl_sessions, SSL *ssl); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_version.h b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_version.h new file mode 100755 index 0000000..e8158cc --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/include/ssl/ssl_version.h @@ -0,0 +1 @@ +#define AXTLS_VERSION "1.4.9" diff --git a/hw/STM32F030R8/Drivers/STM32F0_Drivers/deleteMe.txt b/examples/ESP8266_NONOS_SDK/third_party/include/user_config.h similarity index 100% rename from hw/STM32F030R8/Drivers/STM32F0_Drivers/deleteMe.txt rename to examples/ESP8266_NONOS_SDK/third_party/include/user_config.h diff --git a/examples/ESP8266_NONOS_SDK/third_party/json/Makefile b/examples/ESP8266_NONOS_SDK/third_party/json/Makefile new file mode 100755 index 0000000..ebaf420 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/json/Makefile @@ -0,0 +1,47 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR +UP_EXTRACT_DIR = .. +GEN_LIBS = libjson.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += +CCFLAGS += -DJSON_FORMAT + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/json/jsonparse.c b/examples/ESP8266_NONOS_SDK/third_party/json/jsonparse.c new file mode 100755 index 0000000..c805343 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/json/jsonparse.c @@ -0,0 +1,293 @@ +/* + * Copyright (c) 2011-2012, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the Contiki operating system. + */ + +#ifdef JSON_FORMAT + +#include "json/jsonparse.h" +#include "osapi.h" +//#include +//#include + +/*--------------------------------------------------------------------*/ +static int ICACHE_FLASH_ATTR +push(struct jsonparse_state *state, char c) +{ + state->stack[state->depth] = c; + state->depth++; + state->vtype = 0; + return state->depth < JSONPARSE_MAX_DEPTH; +} +/*--------------------------------------------------------------------*/ +static char ICACHE_FLASH_ATTR +pop(struct jsonparse_state *state) +{ + if(state->depth == 0) { + return JSON_TYPE_ERROR; + } + state->depth--; + return state->stack[state->depth]; +} +/*--------------------------------------------------------------------*/ +/* will pass by the value and store the start and length of the value for + atomic types */ +/*--------------------------------------------------------------------*/ +static void ICACHE_FLASH_ATTR +atomic(struct jsonparse_state *state, char type) +{ + char c; + + state->vstart = state->pos; + state->vtype = type; + if(type == JSON_TYPE_STRING || type == JSON_TYPE_PAIR_NAME) { + while((c = state->json[state->pos++]) && c != '"') { + if(c == '\\') { + state->pos++; /* skip current char */ + } + } + state->vlen = state->pos - state->vstart - 1; + } else if(type == JSON_TYPE_NUMBER) { + do { + c = state->json[state->pos]; + if((c < '0' || c > '9') && c != '.') { + c = 0; + } else { + state->pos++; + } + } while(c); + /* need to back one step since first char is already gone */ + state->vstart--; + state->vlen = state->pos - state->vstart; + } + /* no other types for now... */ +} +/*--------------------------------------------------------------------*/ +static void ICACHE_FLASH_ATTR +skip_ws(struct jsonparse_state *state) +{ + char c; + + while(state->pos < state->len && + ((c = state->json[state->pos]) == ' ' || c == '\n')) { + state->pos++; + } +} +/*--------------------------------------------------------------------*/ +void ICACHE_FLASH_ATTR +jsonparse_setup(struct jsonparse_state *state, const char *json, int len) +{ + state->json = json; + state->len = len; + state->pos = 0; + state->depth = 0; + state->error = 0; + state->stack[0] = 0; +} +/*--------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsonparse_next(struct jsonparse_state *state) +{ + char c; + char s; + + if(state == NULL || state->pos > state->len) + return -2; + + skip_ws(state); + c = state->json[state->pos]; + s = jsonparse_get_type(state); + state->pos++; + + switch(c) { + case '{': + push(state, c); + return c; + case '}': + if(s == ':' && state->vtype != 0) { +/* printf("Popping vtype: '%c'\n", state->vtype); */ + pop(state); + s = jsonparse_get_type(state); + } + if(s == '{') { + pop(state); + } else { + state->error = JSON_ERROR_SYNTAX; + return JSON_TYPE_ERROR; + } + return c; + case ']': + if(s == '[') { + pop(state); + } else { + state->error = JSON_ERROR_UNEXPECTED_END_OF_ARRAY; + return JSON_TYPE_ERROR; + } + return c; + case ':': + push(state, c); + return c; + case ',': + /* if x:y ... , */ + if(s == ':' && state->vtype != 0) { + pop(state); + } else if(s == '[') { + /* ok! */ + } else { + state->error = JSON_ERROR_SYNTAX; + return JSON_TYPE_ERROR; + } + return c; + case '"': + if(s == '{' || s == '[' || s == ':') { + atomic(state, c = (s == '{' ? JSON_TYPE_PAIR_NAME : c)); + } else { + state->error = JSON_ERROR_UNEXPECTED_STRING; + return JSON_TYPE_ERROR; + } + return c; + case '[': + if(s == '{' || s == '[' || s == ':') { + push(state, c); + } else { + state->error = JSON_ERROR_UNEXPECTED_ARRAY; + return JSON_TYPE_ERROR; + } + return c; + default: + if(s == ':' || s == '[') { + if(c <= '9' && c >= '0') { + atomic(state, JSON_TYPE_NUMBER); + return JSON_TYPE_NUMBER; + } + } + } + return 0; +} +/*--------------------------------------------------------------------*/ +/* get the json value of the current position + * works only on "atomic" values such as string, number, null, false, true + */ +/*--------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsonparse_copy_value(struct jsonparse_state *state, char *str, int size) +{ + int i; + char z = 0; + char y = 0; + + if(state->vtype == 0) { + return 0; + } + size = size <= state->vlen ? (size - 1) : state->vlen; + for(i = 0; i < size; i++) { + if (y == 0 && state->json[state->vstart + i] == '\\') { + y = 1; + z++; + continue; + } + y = 0; + str[i - z] = state->json[state->vstart + i]; + } + str[i - z] = 0; + return state->vtype; +} +/*--------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsonparse_get_value_as_int(struct jsonparse_state *state) +{ + if(state->vtype != JSON_TYPE_NUMBER) { + return 0; + } + return atoi(&state->json[state->vstart]); +} +/*--------------------------------------------------------------------*/ +long ICACHE_FLASH_ATTR +jsonparse_get_value_as_long(struct jsonparse_state *state) +{ + if(state->vtype != JSON_TYPE_NUMBER) { + return 0; + } + return atol(&state->json[state->vstart]); +} + +/*--------------------------------------------------------------------*/ +unsigned long ICACHE_FLASH_ATTR +jsonparse_get_value_as_ulong(struct jsonparse_state *state) +{ + if(state->vtype != JSON_TYPE_NUMBER) { + return 0; + } + return strtoul(&state->json[state->vstart], '\0', 0); +} + +/*--------------------------------------------------------------------*/ +/* strcmp - assume no strange chars that needs to be stuffed in string... */ +/*--------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsonparse_strcmp_value(struct jsonparse_state *state, const char *str) +{ + if(state->vtype == 0) { + return -1; + } + + if (str == NULL) { + return -1; + } + + if (os_strlen(str) != state->vlen) { + return -1; + } + + return os_strncmp(str, &state->json[state->vstart], state->vlen); +} +/*--------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsonparse_get_len(struct jsonparse_state *state) +{ + return state->vlen; +} +/*--------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsonparse_get_type(struct jsonparse_state *state) +{ + if(state->depth == 0) { + return 0; + } + return state->stack[state->depth - 1]; +} +/*--------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsonparse_has_next(struct jsonparse_state *state) +{ + return state->pos < state->len; +} +/*--------------------------------------------------------------------*/ +#endif + diff --git a/examples/ESP8266_NONOS_SDK/third_party/json/jsontree.c b/examples/ESP8266_NONOS_SDK/third_party/json/jsontree.c new file mode 100755 index 0000000..d375aef --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/json/jsontree.c @@ -0,0 +1,296 @@ +/* + * Copyright (c) 2011-2012, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the Contiki operating system. + */ + +/** + * \file + * JSON output generation + * \author + * Niclas Finne + * Joakim Eriksson + */ +#ifdef JSON_FORMAT +//#include "contiki.h" +#include "json/jsontree.h" +#include "json/jsonparse.h" +#include "osapi.h" +//#include + +#define DEBUG 0 +#if DEBUG +//#include +#define PRINTF(...) os_printf(__VA_ARGS__) +#else +#define PRINTF(...) +#endif + +/*---------------------------------------------------------------------------*/ +void ICACHE_FLASH_ATTR +jsontree_write_atom(const struct jsontree_context *js_ctx, const char *text) +{ + if(text == NULL) { + js_ctx->putchar('0'); + } else { + while(*text != '\0') { + js_ctx->putchar(*text++); + } + } +} +/*---------------------------------------------------------------------------*/ +void ICACHE_FLASH_ATTR +jsontree_write_string(const struct jsontree_context *js_ctx, const char *text) +{ + js_ctx->putchar('"'); + if(text != NULL) { + while(*text != '\0') { + if(*text == '"') { + js_ctx->putchar('\\'); + } + js_ctx->putchar(*text++); + } + } + js_ctx->putchar('"'); +} +/*---------------------------------------------------------------------------*/ +void ICACHE_FLASH_ATTR +jsontree_write_int(const struct jsontree_context *js_ctx, int value) +{ + char buf[10]; + int l; + + if(value < 0) { + js_ctx->putchar('-'); + value = -value; + } + + l = sizeof(buf) - 1; + do { + buf[l--] = '0' + (value % 10); + value /= 10; + } while(value > 0 && l >= 0); + + while(++l < sizeof(buf)) { + js_ctx->putchar(buf[l]); + } +} + +/*---------------------------------------------------------------------------*/ +void ICACHE_FLASH_ATTR +jsontree_write_int_array(const struct jsontree_context *js_ctx, const int *text, uint32 length) +{ + uint32 i = 0; + if(text == NULL) { + js_ctx->putchar('0'); + } else { + for (i = 0; i < length - 1; i ++) { + jsontree_write_int(js_ctx, *text++); + js_ctx->putchar(','); + } + jsontree_write_int(js_ctx, *text); + } +} + + +/*---------------------------------------------------------------------------*/ +void ICACHE_FLASH_ATTR +jsontree_setup(struct jsontree_context *js_ctx, struct jsontree_value *root, + int (* putchar)(int)) +{ + js_ctx->values[0] = root; + js_ctx->putchar = putchar; + js_ctx->path = 0; + jsontree_reset(js_ctx); +} +/*---------------------------------------------------------------------------*/ +void ICACHE_FLASH_ATTR +jsontree_reset(struct jsontree_context *js_ctx) +{ + js_ctx->depth = 0; + js_ctx->index[0] = 0; +} +/*---------------------------------------------------------------------------*/ +const char *ICACHE_FLASH_ATTR +jsontree_path_name(const struct jsontree_context *js_ctx, int depth) +{ + if(depth < js_ctx->depth && js_ctx->values[depth]->type == JSON_TYPE_OBJECT) { + return ((struct jsontree_object *)js_ctx->values[depth])-> + pairs[js_ctx->index[depth]].name; + } + return ""; +} +/*---------------------------------------------------------------------------*/ +int ICACHE_FLASH_ATTR +jsontree_print_next(struct jsontree_context *js_ctx) +{ + struct jsontree_value *v; + int index; + + v = js_ctx->values[js_ctx->depth]; + + /* Default operation after switch is to back up one level */ + switch(v->type) { + case JSON_TYPE_OBJECT: + case JSON_TYPE_ARRAY: { + struct jsontree_array *o = (struct jsontree_array *)v; + struct jsontree_value *ov; + + index = js_ctx->index[js_ctx->depth]; + if(index == 0) { + js_ctx->putchar(v->type); + js_ctx->putchar('\n'); + } + if(index >= o->count) { + js_ctx->putchar('\n'); + js_ctx->putchar(v->type + 2); + /* Default operation: back up one level! */ + break; + } + + if(index > 0) { + js_ctx->putchar(','); + js_ctx->putchar('\n'); + } + if(v->type == JSON_TYPE_OBJECT) { + jsontree_write_string(js_ctx, + ((struct jsontree_object *)o)->pairs[index].name); + js_ctx->putchar(':'); + ov = ((struct jsontree_object *)o)->pairs[index].value; + } else { + ov = o->values[index]; + } + /* TODO check max depth */ + js_ctx->depth++; /* step down to value... */ + js_ctx->index[js_ctx->depth] = 0; /* and init index */ + js_ctx->values[js_ctx->depth] = ov; + /* Continue on this new level */ + return 1; + } + case JSON_TYPE_STRING: + jsontree_write_string(js_ctx, ((struct jsontree_string *)v)->value); + /* Default operation: back up one level! */ + break; + case JSON_TYPE_INT: + jsontree_write_int(js_ctx, ((struct jsontree_int *)v)->value); + /* Default operation: back up one level! */ + break; + case JSON_TYPE_CALLBACK: { /* pre-formatted json string currently */ + struct jsontree_callback *callback; + + callback = (struct jsontree_callback *)v; + if(js_ctx->index[js_ctx->depth] == 0) { + /* First call: reset the callback status */ + js_ctx->callback_state = 0; + } + if(callback->output == NULL) { + jsontree_write_string(js_ctx, ""); + } else if(callback->output(js_ctx)) { + /* The callback wants to output more */ + js_ctx->index[js_ctx->depth]++; + return 1; + } + /* Default operation: back up one level! */ + break; + } + default: + PRINTF("\nError: Illegal json type:'%c'\n", v->type); + return 0; + } + /* Done => back up one level! */ + if(js_ctx->depth > 0) { + js_ctx->depth--; + js_ctx->index[js_ctx->depth]++; + return 1; + } + return 0; +} +/*---------------------------------------------------------------------------*/ +static struct jsontree_value *ICACHE_FLASH_ATTR +find_next(struct jsontree_context *js_ctx) +{ + struct jsontree_value *v; + int index; + + do { + v = js_ctx->values[js_ctx->depth]; + + /* Default operation after switch is to back up one level */ + switch(v->type) { + case JSON_TYPE_OBJECT: + case JSON_TYPE_ARRAY: { + struct jsontree_array *o = (struct jsontree_array *)v; + struct jsontree_value *ov; + + index = js_ctx->index[js_ctx->depth]; + if(index >= o->count) { + /* Default operation: back up one level! */ + break; + } + + if(v->type == JSON_TYPE_OBJECT) { + ov = ((struct jsontree_object *)o)->pairs[index].value; + } else { + ov = o->values[index]; + } + /* TODO check max depth */ + js_ctx->depth++; /* step down to value... */ + js_ctx->index[js_ctx->depth] = 0; /* and init index */ + js_ctx->values[js_ctx->depth] = ov; + /* Continue on this new level */ + return ov; + } + default: + /* Default operation: back up one level! */ + break; + } + /* Done => back up one level! */ + if(js_ctx->depth > 0) { + js_ctx->depth--; + js_ctx->index[js_ctx->depth]++; + } else { + return NULL; + } + } while(1); +} +/*---------------------------------------------------------------------------*/ +struct jsontree_value *ICACHE_FLASH_ATTR +jsontree_find_next(struct jsontree_context *js_ctx, int type) +{ + struct jsontree_value *v; + + while((v = find_next(js_ctx)) != NULL && v->type != type && + js_ctx->path < js_ctx->depth) { + /* search */ + } + js_ctx->callback_state = 0; + return js_ctx->path < js_ctx->depth ? v : NULL; +} +/*---------------------------------------------------------------------------*/ +#endif + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/Makefile b/examples/ESP8266_NONOS_SDK/third_party/lwip/Makefile new file mode 100755 index 0000000..c545f36 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/Makefile @@ -0,0 +1,51 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR +UP_EXTRACT_DIR = .. +GEN_LIBS = liblwip.a +COMPONENTS_liblwip = api/liblwipapi.a \ + app/liblwipapp.a \ + core/liblwipcore.a \ + core/ipv4/liblwipipv4.a \ + netif/liblwipnetif.a +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += +CCFLAGS += -DPBUF_RSV_FOR_WLAN -DEBUF_LWIP + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/Makefile b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/Makefile new file mode 100755 index 0000000..ef34edc --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = liblwipapi.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/api_lib.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/api_lib.c new file mode 100755 index 0000000..158325b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/api_lib.c @@ -0,0 +1,740 @@ +/** + * @file + * Sequential API External module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +/* This is the part of the API that is linked with + the application */ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/api.h" +#include "lwip/tcpip.h" +#include "lwip/memp.h" + +#include "lwip/ip.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" + +#include + +/** + * Create a new netconn (of a specific type) that has a callback function. + * The corresponding pcb is also created. + * + * @param t the type of 'connection' to create (@see enum netconn_type) + * @param proto the IP protocol for RAW IP pcbs + * @param callback a function to call on status changes (RX available, TX'ed) + * @return a newly allocated struct netconn or + * NULL on memory error + */ +struct netconn* +netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback) +{ + struct netconn *conn; + struct api_msg msg; + + conn = netconn_alloc(t, callback); + if (conn != NULL) { + msg.function = do_newconn; + msg.msg.msg.n.proto = proto; + msg.msg.conn = conn; + if (TCPIP_APIMSG(&msg) != ERR_OK) { + LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL); + LWIP_ASSERT("conn has no op_completed", sys_sem_valid(&conn->op_completed)); + LWIP_ASSERT("conn has no recvmbox", sys_mbox_valid(&conn->recvmbox)); +#if LWIP_TCP + LWIP_ASSERT("conn->acceptmbox shouldn't exist", !sys_mbox_valid(&conn->acceptmbox)); +#endif /* LWIP_TCP */ + sys_sem_free(&conn->op_completed); + sys_mbox_free(&conn->recvmbox); + memp_free(MEMP_NETCONN, conn); + return NULL; + } + } + return conn; +} + +/** + * Close a netconn 'connection' and free its resources. + * UDP and RAW connection are completely closed, TCP pcbs might still be in a waitstate + * after this returns. + * + * @param conn the netconn to delete + * @return ERR_OK if the connection was deleted + */ +err_t +netconn_delete(struct netconn *conn) +{ + struct api_msg msg; + + /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */ + if (conn == NULL) { + return ERR_OK; + } + + msg.function = do_delconn; + msg.msg.conn = conn; + tcpip_apimsg(&msg); + + netconn_free(conn); + + /* don't care for return value of do_delconn since it only calls void functions */ + + return ERR_OK; +} + +/** + * Get the local or remote IP address and port of a netconn. + * For RAW netconns, this returns the protocol instead of a port! + * + * @param conn the netconn to query + * @param addr a pointer to which to save the IP address + * @param port a pointer to which to save the port (or protocol for RAW) + * @param local 1 to get the local IP address, 0 to get the remote one + * @return ERR_CONN for invalid connections + * ERR_OK if the information was retrieved + */ +err_t +netconn_getaddr(struct netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;); + + msg.function = do_getaddr; + msg.msg.conn = conn; + msg.msg.msg.ad.ipaddr = addr; + msg.msg.msg.ad.port = port; + msg.msg.msg.ad.local = local; + err = TCPIP_APIMSG(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} + +/** + * Bind a netconn to a specific local IP address and port. + * Binding one netconn twice might not always be checked correctly! + * + * @param conn the netconn to bind + * @param addr the local IP address to bind the netconn to (use IP_ADDR_ANY + * to bind to all addresses) + * @param port the local port to bind the netconn to (not used for RAW) + * @return ERR_OK if bound, any other err_t on failure + */ +err_t +netconn_bind(struct netconn *conn, ip_addr_t *addr, u16_t port) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_bind: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_bind; + msg.msg.conn = conn; + msg.msg.msg.bc.ipaddr = addr; + msg.msg.msg.bc.port = port; + err = TCPIP_APIMSG(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} + +/** + * Connect a netconn to a specific remote IP address and port. + * + * @param conn the netconn to connect + * @param addr the remote IP address to connect to + * @param port the remote port to connect to (no used for RAW) + * @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise + */ +err_t +netconn_connect(struct netconn *conn, ip_addr_t *addr, u16_t port) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_connect; + msg.msg.conn = conn; + msg.msg.msg.bc.ipaddr = addr; + msg.msg.msg.bc.port = port; + /* This is the only function which need to not block tcpip_thread */ + err = tcpip_apimsg(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} + +/** + * Disconnect a netconn from its current peer (only valid for UDP netconns). + * + * @param conn the netconn to disconnect + * @return TODO: return value is not set here... + */ +err_t +netconn_disconnect(struct netconn *conn) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_disconnect; + msg.msg.conn = conn; + err = TCPIP_APIMSG(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} + +/** + * Set a TCP netconn into listen mode + * + * @param conn the tcp netconn to set to listen mode + * @param backlog the listen backlog, only used if TCP_LISTEN_BACKLOG==1 + * @return ERR_OK if the netconn was set to listen (UDP and RAW netconns + * don't return any error (yet?)) + */ +err_t +netconn_listen_with_backlog(struct netconn *conn, u8_t backlog) +{ +#if LWIP_TCP + struct api_msg msg; + err_t err; + + /* This does no harm. If TCP_LISTEN_BACKLOG is off, backlog is unused. */ + LWIP_UNUSED_ARG(backlog); + + LWIP_ERROR("netconn_listen: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_listen; + msg.msg.conn = conn; +#if TCP_LISTEN_BACKLOG + msg.msg.msg.lb.backlog = backlog; +#endif /* TCP_LISTEN_BACKLOG */ + err = TCPIP_APIMSG(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +#else /* LWIP_TCP */ + LWIP_UNUSED_ARG(conn); + LWIP_UNUSED_ARG(backlog); + return ERR_ARG; +#endif /* LWIP_TCP */ +} + +/** + * Accept a new connection on a TCP listening netconn. + * + * @param conn the TCP listen netconn + * @param new_conn pointer where the new connection is stored + * @return ERR_OK if a new connection has been received or an error + * code otherwise + */ +err_t +netconn_accept(struct netconn *conn, struct netconn **new_conn) +{ +#if LWIP_TCP + struct netconn *newconn; + err_t err; +#if TCP_LISTEN_BACKLOG + struct api_msg msg; +#endif /* TCP_LISTEN_BACKLOG */ + + LWIP_ERROR("netconn_accept: invalid pointer", (new_conn != NULL), return ERR_ARG;); + *new_conn = NULL; + LWIP_ERROR("netconn_accept: invalid conn", (conn != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_accept: invalid acceptmbox", sys_mbox_valid(&conn->acceptmbox), return ERR_ARG;); + + err = conn->last_err; + if (ERR_IS_FATAL(err)) { + /* don't recv on fatal errors: this might block the application task + waiting on acceptmbox forever! */ + return err; + } + +#if LWIP_SO_RCVTIMEO + if (sys_arch_mbox_fetch(&conn->acceptmbox, (void **)&newconn, conn->recv_timeout) == SYS_ARCH_TIMEOUT) { + NETCONN_SET_SAFE_ERR(conn, ERR_TIMEOUT); + return ERR_TIMEOUT; + } +#else + sys_arch_mbox_fetch(&conn->acceptmbox, (void **)&newconn, 0); +#endif /* LWIP_SO_RCVTIMEO*/ + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0); + + if (newconn == NULL) { + /* connection has been closed */ + NETCONN_SET_SAFE_ERR(conn, ERR_CLSD); + return ERR_CLSD; + } +#if TCP_LISTEN_BACKLOG + /* Let the stack know that we have accepted the connection. */ + msg.function = do_recv; + msg.msg.conn = conn; + /* don't care for the return value of do_recv */ + TCPIP_APIMSG(&msg); +#endif /* TCP_LISTEN_BACKLOG */ + + *new_conn = newconn; + /* don't set conn->last_err: it's only ERR_OK, anyway */ + return ERR_OK; +#else /* LWIP_TCP */ + LWIP_UNUSED_ARG(conn); + LWIP_UNUSED_ARG(new_conn); + return ERR_ARG; +#endif /* LWIP_TCP */ +} + +/** + * Receive data: actual implementation that doesn't care whether pbuf or netbuf + * is received + * + * @param conn the netconn from which to receive data + * @param new_buf pointer where a new pbuf/netbuf is stored when received data + * @return ERR_OK if data has been received, an error code otherwise (timeout, + * memory error or another error) + */ +static err_t +netconn_recv_data(struct netconn *conn, void **new_buf) +{ + void *buf = NULL; + u16_t len; + err_t err; +#if LWIP_TCP + struct api_msg msg; +#endif /* LWIP_TCP */ + + LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;); + *new_buf = NULL; + LWIP_ERROR("netconn_recv: invalid conn", (conn != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_accept: invalid recvmbox", sys_mbox_valid(&conn->recvmbox), return ERR_CONN;); + + err = conn->last_err; + if (ERR_IS_FATAL(err)) { + /* don't recv on fatal errors: this might block the application task + waiting on recvmbox forever! */ + /* @todo: this does not allow us to fetch data that has been put into recvmbox + before the fatal error occurred - is that a problem? */ + return err; + } + +#if LWIP_SO_RCVTIMEO + if (sys_arch_mbox_fetch(&conn->recvmbox, &buf, conn->recv_timeout) == SYS_ARCH_TIMEOUT) { + NETCONN_SET_SAFE_ERR(conn, ERR_TIMEOUT); + return ERR_TIMEOUT; + } +#else + sys_arch_mbox_fetch(&conn->recvmbox, &buf, 0); +#endif /* LWIP_SO_RCVTIMEO*/ + +#if LWIP_TCP + if (conn->type == NETCONN_TCP) { + if (!netconn_get_noautorecved(conn) || (buf == NULL)) { + /* Let the stack know that we have taken the data. */ + /* TODO: Speedup: Don't block and wait for the answer here + (to prevent multiple thread-switches). */ + msg.function = do_recv; + msg.msg.conn = conn; + if (buf != NULL) { + msg.msg.msg.r.len = ((struct pbuf *)buf)->tot_len; + } else { + msg.msg.msg.r.len = 1; + } + /* don't care for the return value of do_recv */ + TCPIP_APIMSG(&msg); + } + + /* If we are closed, we indicate that we no longer wish to use the socket */ + if (buf == NULL) { + API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0); + /* Avoid to lose any previous error code */ + NETCONN_SET_SAFE_ERR(conn, ERR_CLSD); + return ERR_CLSD; + } + len = ((struct pbuf *)buf)->tot_len; + } +#endif /* LWIP_TCP */ +#if LWIP_TCP && (LWIP_UDP || LWIP_RAW) + else +#endif /* LWIP_TCP && (LWIP_UDP || LWIP_RAW) */ +#if (LWIP_UDP || LWIP_RAW) + { + LWIP_ASSERT("buf != NULL", buf != NULL); + len = netbuf_len((struct netbuf *)buf); + } +#endif /* (LWIP_UDP || LWIP_RAW) */ + +#if LWIP_SO_RCVBUF + SYS_ARCH_DEC(conn->recv_avail, len); +#endif /* LWIP_SO_RCVBUF */ + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVMINUS, len); + + LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv_data: received %p, len=%"U16_F"\n", buf, len)); + + *new_buf = buf; + /* don't set conn->last_err: it's only ERR_OK, anyway */ + return ERR_OK; +} + +/** + * Receive data (in form of a pbuf) from a TCP netconn + * + * @param conn the netconn from which to receive data + * @param new_buf pointer where a new pbuf is stored when received data + * @return ERR_OK if data has been received, an error code otherwise (timeout, + * memory error or another error) + * ERR_ARG if conn is not a TCP netconn + */ +err_t +netconn_recv_tcp_pbuf(struct netconn *conn, struct pbuf **new_buf) +{ + LWIP_ERROR("netconn_recv: invalid conn", (conn != NULL) && + netconn_type(conn) == NETCONN_TCP, return ERR_ARG;); + + return netconn_recv_data(conn, (void **)new_buf); +} + +/** + * Receive data (in form of a netbuf containing a packet buffer) from a netconn + * + * @param conn the netconn from which to receive data + * @param new_buf pointer where a new netbuf is stored when received data + * @return ERR_OK if data has been received, an error code otherwise (timeout, + * memory error or another error) + */ +err_t +netconn_recv(struct netconn *conn, struct netbuf **new_buf) +{ +#if LWIP_TCP + struct netbuf *buf = NULL; + err_t err; +#endif /* LWIP_TCP */ + + LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;); + *new_buf = NULL; + LWIP_ERROR("netconn_recv: invalid conn", (conn != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_accept: invalid recvmbox", sys_mbox_valid(&conn->recvmbox), return ERR_CONN;); + +#if LWIP_TCP + if (conn->type == NETCONN_TCP) { + struct pbuf *p = NULL; + /* This is not a listening netconn, since recvmbox is set */ + + buf = (struct netbuf *)memp_malloc(MEMP_NETBUF); + if (buf == NULL) { + NETCONN_SET_SAFE_ERR(conn, ERR_MEM); + return ERR_MEM; + } + + err = netconn_recv_data(conn, (void **)&p); + if (err != ERR_OK) { + memp_free(MEMP_NETBUF, buf); + return err; + } + LWIP_ASSERT("p != NULL", p != NULL); + + buf->p = p; + buf->ptr = p; + buf->port = 0; + ip_addr_set_any(&buf->addr); + *new_buf = buf; + /* don't set conn->last_err: it's only ERR_OK, anyway */ + return ERR_OK; + } else +#endif /* LWIP_TCP */ + { +#if (LWIP_UDP || LWIP_RAW) + return netconn_recv_data(conn, (void **)new_buf); +#endif /* (LWIP_UDP || LWIP_RAW) */ + } +} + +/** + * TCP: update the receive window: by calling this, the application + * tells the stack that it has processed data and is able to accept + * new data. + * ATTENTION: use with care, this is mainly used for sockets! + * Can only be used when calling netconn_set_noautorecved(conn, 1) before. + * + * @param conn the netconn for which to update the receive window + * @param length amount of data processed (ATTENTION: this must be accurate!) + */ +void +netconn_recved(struct netconn *conn, u32_t length) +{ +#if LWIP_TCP + if ((conn != NULL) && (conn->type == NETCONN_TCP) && + (netconn_get_noautorecved(conn))) { + struct api_msg msg; + /* Let the stack know that we have taken the data. */ + /* TODO: Speedup: Don't block and wait for the answer here + (to prevent multiple thread-switches). */ + msg.function = do_recv; + msg.msg.conn = conn; + msg.msg.msg.r.len = length; + /* don't care for the return value of do_recv */ + TCPIP_APIMSG(&msg); + } +#else /* LWIP_TCP */ + LWIP_UNUSED_ARG(conn); + LWIP_UNUSED_ARG(length); +#endif /* LWIP_TCP */ +} + +/** + * Send data (in form of a netbuf) to a specific remote IP address and port. + * Only to be used for UDP and RAW netconns (not TCP). + * + * @param conn the netconn over which to send data + * @param buf a netbuf containing the data to send + * @param addr the remote IP address to which to send the data + * @param port the remote port to which to send the data + * @return ERR_OK if data was sent, any other err_t on error + */ +err_t +netconn_sendto(struct netconn *conn, struct netbuf *buf, ip_addr_t *addr, u16_t port) +{ + if (buf != NULL) { + ip_addr_set(&buf->addr, addr); + buf->port = port; + return netconn_send(conn, buf); + } + return ERR_VAL; +} + +/** + * Send data over a UDP or RAW netconn (that is already connected). + * + * @param conn the UDP or RAW netconn over which to send data + * @param buf a netbuf containing the data to send + * @return ERR_OK if data was sent, any other err_t on error + */ +err_t +netconn_send(struct netconn *conn, struct netbuf *buf) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_send: invalid conn", (conn != NULL), return ERR_ARG;); + + LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len)); + msg.function = do_send; + msg.msg.conn = conn; + msg.msg.msg.b = buf; + err = TCPIP_APIMSG(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} + +/** + * Send data over a TCP netconn. + * + * @param conn the TCP netconn over which to send data + * @param dataptr pointer to the application buffer that contains the data to send + * @param size size of the application data to send + * @param apiflags combination of following flags : + * - NETCONN_COPY: data will be copied into memory belonging to the stack + * - NETCONN_MORE: for TCP connection, PSH flag will be set on last segment sent + * - NETCONN_DONTBLOCK: only write the data if all dat can be written at once + * @return ERR_OK if data was sent, any other err_t on error + */ +err_t +netconn_write(struct netconn *conn, const void *dataptr, size_t size, u8_t apiflags) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_write: invalid conn", (conn != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_write: invalid conn->type", (conn->type == NETCONN_TCP), return ERR_VAL;); + if (size == 0) { + return ERR_OK; + } + + /* @todo: for non-blocking write, check if 'size' would ever fit into + snd_queue or snd_buf */ + msg.function = do_write; + msg.msg.conn = conn; + msg.msg.msg.w.dataptr = dataptr; + msg.msg.msg.w.apiflags = apiflags; + msg.msg.msg.w.len = size; + /* For locking the core: this _can_ be delayed on low memory/low send buffer, + but if it is, this is done inside api_msg.c:do_write(), so we can use the + non-blocking version here. */ + err = TCPIP_APIMSG(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} + +/** + * Close ot shutdown a TCP netconn (doesn't delete it). + * + * @param conn the TCP netconn to close or shutdown + * @param how fully close or only shutdown one side? + * @return ERR_OK if the netconn was closed, any other err_t on error + */ +static err_t +netconn_close_shutdown(struct netconn *conn, u8_t how) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_close: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_close; + msg.msg.conn = conn; + /* shutting down both ends is the same as closing */ + msg.msg.msg.sd.shut = how; + /* because of the LWIP_TCPIP_CORE_LOCKING implementation of do_close, + don't use TCPIP_APIMSG here */ + err = tcpip_apimsg(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} + +/** + * Close a TCP netconn (doesn't delete it). + * + * @param conn the TCP netconn to close + * @return ERR_OK if the netconn was closed, any other err_t on error + */ +err_t +netconn_close(struct netconn *conn) +{ + /* shutting down both ends is the same as closing */ + return netconn_close_shutdown(conn, NETCONN_SHUT_RDWR); +} + +/** + * Shut down one or both sides of a TCP netconn (doesn't delete it). + * + * @param conn the TCP netconn to shut down + * @return ERR_OK if the netconn was closed, any other err_t on error + */ +err_t +netconn_shutdown(struct netconn *conn, u8_t shut_rx, u8_t shut_tx) +{ + return netconn_close_shutdown(conn, (shut_rx ? NETCONN_SHUT_RD : 0) | (shut_tx ? NETCONN_SHUT_WR : 0)); +} + +#if LWIP_IGMP +/** + * Join multicast groups for UDP netconns. + * + * @param conn the UDP netconn for which to change multicast addresses + * @param multiaddr IP address of the multicast group to join or leave + * @param netif_addr the IP address of the network interface on which to send + * the igmp message + * @param join_or_leave flag whether to send a join- or leave-message + * @return ERR_OK if the action was taken, any err_t on error + */ +err_t +netconn_join_leave_group(struct netconn *conn, + ip_addr_t *multiaddr, + ip_addr_t *netif_addr, + enum netconn_igmp join_or_leave) +{ + struct api_msg msg; + err_t err; + + LWIP_ERROR("netconn_join_leave_group: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_join_leave_group; + msg.msg.conn = conn; + msg.msg.msg.jl.multiaddr = multiaddr; + msg.msg.msg.jl.netif_addr = netif_addr; + msg.msg.msg.jl.join_or_leave = join_or_leave; + err = TCPIP_APIMSG(&msg); + + NETCONN_SET_SAFE_ERR(conn, err); + return err; +} +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +/** + * Execute a DNS query, only one IP address is returned + * + * @param name a string representation of the DNS host name to query + * @param addr a preallocated ip_addr_t where to store the resolved IP address + * @return ERR_OK: resolving succeeded + * ERR_MEM: memory error, try again later + * ERR_ARG: dns client not initialized or invalid hostname + * ERR_VAL: dns server response was invalid + */ +err_t +netconn_gethostbyname(const char *name, ip_addr_t *addr) +{ + struct dns_api_msg msg; + err_t err; + sys_sem_t sem; + + LWIP_ERROR("netconn_gethostbyname: invalid name", (name != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_gethostbyname: invalid addr", (addr != NULL), return ERR_ARG;); + + err = sys_sem_new(&sem, 0); + if (err != ERR_OK) { + return err; + } + + msg.name = name; + msg.addr = addr; + msg.err = &err; + msg.sem = &sem; + + tcpip_callback(do_gethostbyname, &msg); + sys_sem_wait(&sem); + sys_sem_free(&sem); + + return err; +} +#endif /* LWIP_DNS*/ + +#endif /* LWIP_NETCONN */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/api_msg.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/api_msg.c new file mode 100755 index 0000000..dcb07e9 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/api_msg.c @@ -0,0 +1,1540 @@ +/** + * @file + * Sequential API Internal module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/api_msg.h" + +#include "lwip/ip.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/raw.h" + +#include "lwip/memp.h" +#include "lwip/tcpip.h" +#include "lwip/igmp.h" +#include "lwip/dns.h" + +#include + +#define SET_NONBLOCKING_CONNECT(conn, val) do { if(val) { \ + (conn)->flags |= NETCONN_FLAG_IN_NONBLOCKING_CONNECT; \ +} else { \ + (conn)->flags &= ~ NETCONN_FLAG_IN_NONBLOCKING_CONNECT; }} while(0) +#define IN_NONBLOCKING_CONNECT(conn) (((conn)->flags & NETCONN_FLAG_IN_NONBLOCKING_CONNECT) != 0) + +/* forward declarations */ +#if LWIP_TCP +static err_t do_writemore(struct netconn *conn); +static void do_close_internal(struct netconn *conn); +#endif + +#if LWIP_RAW +/** + * Receive callback function for RAW netconns. + * Doesn't 'eat' the packet, only references it and sends it to + * conn->recvmbox + * + * @see raw.h (struct raw_pcb.recv) for parameters and return value + */ +static u8_t +recv_raw(void *arg, struct raw_pcb *pcb, struct pbuf *p, + ip_addr_t *addr) +{ + struct pbuf *q; + struct netbuf *buf; + struct netconn *conn; + + LWIP_UNUSED_ARG(addr); + conn = (struct netconn *)arg; + + if ((conn != NULL) && sys_mbox_valid(&conn->recvmbox)) { +#if LWIP_SO_RCVBUF + int recv_avail; + SYS_ARCH_GET(conn->recv_avail, recv_avail); + if ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize) { + return 0; + } +#endif /* LWIP_SO_RCVBUF */ + /* copy the whole packet into new pbufs */ + q = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if(q != NULL) { + if (pbuf_copy(q, p) != ERR_OK) { + pbuf_free(q); + q = NULL; + } + } + + if (q != NULL) { + u16_t len; + buf = (struct netbuf *)memp_malloc(MEMP_NETBUF); + if (buf == NULL) { + pbuf_free(q); + return 0; + } + + buf->p = q; + buf->ptr = q; + ip_addr_copy(buf->addr, *ip_current_src_addr()); + buf->port = pcb->protocol; + + len = q->tot_len; + if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) { + netbuf_delete(buf); + return 0; + } else { +#if LWIP_SO_RCVBUF + SYS_ARCH_INC(conn->recv_avail, len); +#endif /* LWIP_SO_RCVBUF */ + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, len); + } + } + } + + return 0; /* do not eat the packet */ +} +#endif /* LWIP_RAW*/ + +#if LWIP_UDP +/** + * Receive callback function for UDP netconns. + * Posts the packet to conn->recvmbox or deletes it on memory error. + * + * @see udp.h (struct udp_pcb.recv) for parameters + */ +static void +recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *addr, u16_t port) +{ + struct netbuf *buf; + struct netconn *conn; + u16_t len; +#if LWIP_SO_RCVBUF + int recv_avail; +#endif /* LWIP_SO_RCVBUF */ + + LWIP_UNUSED_ARG(pcb); /* only used for asserts... */ + LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL); + LWIP_ASSERT("recv_udp must have an argument", arg != NULL); + conn = (struct netconn *)arg; + LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb); + +#if LWIP_SO_RCVBUF + SYS_ARCH_GET(conn->recv_avail, recv_avail); + if ((conn == NULL) || !sys_mbox_valid(&conn->recvmbox) || + ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) { +#else /* LWIP_SO_RCVBUF */ + if ((conn == NULL) || !sys_mbox_valid(&conn->recvmbox)) { +#endif /* LWIP_SO_RCVBUF */ + pbuf_free(p); + return; + } + + buf = (struct netbuf *)memp_malloc(MEMP_NETBUF); + if (buf == NULL) { + pbuf_free(p); + return; + } else { + buf->p = p; + buf->ptr = p; + ip_addr_set(&buf->addr, addr); + buf->port = port; +#if LWIP_NETBUF_RECVINFO + { + const struct ip_hdr* iphdr = ip_current_header(); + /* get the UDP header - always in the first pbuf, ensured by udp_input */ + const struct udp_hdr* udphdr = (void*)(((char*)iphdr) + IPH_LEN(iphdr)); +#if LWIP_CHECKSUM_ON_COPY + buf->flags = NETBUF_FLAG_DESTADDR; +#endif /* LWIP_CHECKSUM_ON_COPY */ + ip_addr_set(&buf->toaddr, ip_current_dest_addr()); + buf->toport_chksum = udphdr->dest; + } +#endif /* LWIP_NETBUF_RECVINFO */ + } + + len = p->tot_len; + if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) { + netbuf_delete(buf); + return; + } else { +#if LWIP_SO_RCVBUF + SYS_ARCH_INC(conn->recv_avail, len); +#endif /* LWIP_SO_RCVBUF */ + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, len); + } +} +#endif /* LWIP_UDP */ + +#if LWIP_TCP +/** + * Receive callback function for TCP netconns. + * Posts the packet to conn->recvmbox, but doesn't delete it on errors. + * + * @see tcp.h (struct tcp_pcb.recv) for parameters and return value + */ +static err_t +recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + struct netconn *conn; + u16_t len; + + LWIP_UNUSED_ARG(pcb); + LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL); + LWIP_ASSERT("recv_tcp must have an argument", arg != NULL); + conn = (struct netconn *)arg; + LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb); + + if (conn == NULL) { + return ERR_VAL; + } + if (!sys_mbox_valid(&conn->recvmbox)) { + /* recvmbox already deleted */ + if (p != NULL) { + tcp_recved(pcb, p->tot_len); + pbuf_free(p); + } + return ERR_OK; + } + /* Unlike for UDP or RAW pcbs, don't check for available space + using recv_avail since that could break the connection + (data is already ACKed) */ + + /* don't overwrite fatal errors! */ + NETCONN_SET_SAFE_ERR(conn, err); + + if (p != NULL) { + len = p->tot_len; + } else { + len = 0; + } + + if (sys_mbox_trypost(&conn->recvmbox, p) != ERR_OK) { + /* don't deallocate p: it is presented to us later again from tcp_fasttmr! */ + return ERR_MEM; + } else { +#if LWIP_SO_RCVBUF + SYS_ARCH_INC(conn->recv_avail, len); +#endif /* LWIP_SO_RCVBUF */ + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, len); + } + + return ERR_OK; +} + +/** + * Poll callback function for TCP netconns. + * Wakes up an application thread that waits for a connection to close + * or data to be sent. The application thread then takes the + * appropriate action to go on. + * + * Signals the conn->sem. + * netconn_close waits for conn->sem if closing failed. + * + * @see tcp.h (struct tcp_pcb.poll) for parameters and return value + */ +static err_t +poll_tcp(void *arg, struct tcp_pcb *pcb) +{ + struct netconn *conn = (struct netconn *)arg; + + LWIP_UNUSED_ARG(pcb); + LWIP_ASSERT("conn != NULL", (conn != NULL)); + + if (conn->state == NETCONN_WRITE) { + do_writemore(conn); + } else if (conn->state == NETCONN_CLOSE) { + do_close_internal(conn); + } + /* @todo: implement connect timeout here? */ + + /* Did a nonblocking write fail before? Then check available write-space. */ + if (conn->flags & NETCONN_FLAG_CHECK_WRITESPACE) { + /* If the queued byte- or pbuf-count drops below the configured low-water limit, + let select mark this pcb as writable again. */ + if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) && + (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) { + conn->flags &= ~NETCONN_FLAG_CHECK_WRITESPACE; + API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0); + } + } + + return ERR_OK; +} + +/** + * Sent callback function for TCP netconns. + * Signals the conn->sem and calls API_EVENT. + * netconn_write waits for conn->sem if send buffer is low. + * + * @see tcp.h (struct tcp_pcb.sent) for parameters and return value + */ +static err_t +sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len) +{ + struct netconn *conn = (struct netconn *)arg; + + LWIP_UNUSED_ARG(pcb); + LWIP_ASSERT("conn != NULL", (conn != NULL)); + + if (conn->state == NETCONN_WRITE) { + do_writemore(conn); + } else if (conn->state == NETCONN_CLOSE) { + do_close_internal(conn); + } + + if (conn) { + /* If the queued byte- or pbuf-count drops below the configured low-water limit, + let select mark this pcb as writable again. */ + if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) && + (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) { + conn->flags &= ~NETCONN_FLAG_CHECK_WRITESPACE; + API_EVENT(conn, NETCONN_EVT_SENDPLUS, len); + } + } + + return ERR_OK; +} + +/** + * Error callback function for TCP netconns. + * Signals conn->sem, posts to all conn mboxes and calls API_EVENT. + * The application thread has then to decide what to do. + * + * @see tcp.h (struct tcp_pcb.err) for parameters + */ +static void +err_tcp(void *arg, err_t err) +{ + struct netconn *conn; + enum netconn_state old_state; + SYS_ARCH_DECL_PROTECT(lev); + + conn = (struct netconn *)arg; + LWIP_ASSERT("conn != NULL", (conn != NULL)); + + conn->pcb.tcp = NULL; + + /* no check since this is always fatal! */ + SYS_ARCH_PROTECT(lev); + conn->last_err = err; + SYS_ARCH_UNPROTECT(lev); + + /* reset conn->state now before waking up other threads */ + old_state = conn->state; + conn->state = NETCONN_NONE; + + /* Notify the user layer about a connection error. Used to signal + select. */ + API_EVENT(conn, NETCONN_EVT_ERROR, 0); + /* Try to release selects pending on 'read' or 'write', too. + They will get an error if they actually try to read or write. */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0); + API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0); + + /* pass NULL-message to recvmbox to wake up pending recv */ + if (sys_mbox_valid(&conn->recvmbox)) { + /* use trypost to prevent deadlock */ + sys_mbox_trypost(&conn->recvmbox, NULL); + } + /* pass NULL-message to acceptmbox to wake up pending accept */ + if (sys_mbox_valid(&conn->acceptmbox)) { + /* use trypost to preven deadlock */ + sys_mbox_trypost(&conn->acceptmbox, NULL); + } + + if ((old_state == NETCONN_WRITE) || (old_state == NETCONN_CLOSE) || + (old_state == NETCONN_CONNECT)) { + /* calling do_writemore/do_close_internal is not necessary + since the pcb has already been deleted! */ + int was_nonblocking_connect = IN_NONBLOCKING_CONNECT(conn); + SET_NONBLOCKING_CONNECT(conn, 0); + + if (!was_nonblocking_connect) { + /* set error return code */ + LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL); + conn->current_msg->err = err; + conn->current_msg = NULL; + /* wake up the waiting task */ + sys_sem_signal(&conn->op_completed); + } + } else { + LWIP_ASSERT("conn->current_msg == NULL", conn->current_msg == NULL); + } +} + +/** + * Setup a tcp_pcb with the correct callback function pointers + * and their arguments. + * + * @param conn the TCP netconn to setup + */ +static void +setup_tcp(struct netconn *conn) +{ + struct tcp_pcb *pcb; + + pcb = conn->pcb.tcp; + tcp_arg(pcb, conn); + tcp_recv(pcb, recv_tcp); + tcp_sent(pcb, sent_tcp); + tcp_poll(pcb, poll_tcp, 4); + tcp_err(pcb, err_tcp); +} + +/** + * Accept callback function for TCP netconns. + * Allocates a new netconn and posts that to conn->acceptmbox. + * + * @see tcp.h (struct tcp_pcb_listen.accept) for parameters and return value + */ +static err_t +accept_function(void *arg, struct tcp_pcb *newpcb, err_t err) +{ + struct netconn *newconn; + struct netconn *conn = (struct netconn *)arg; + + LWIP_DEBUGF(API_MSG_DEBUG, ("accept_function: newpcb->tate: %s\n", tcp_debug_state_str(newpcb->state))); + + if (!sys_mbox_valid(&conn->acceptmbox)) { + LWIP_DEBUGF(API_MSG_DEBUG, ("accept_function: acceptmbox already deleted\n")); + return ERR_VAL; + } + + /* We have to set the callback here even though + * the new socket is unknown. conn->socket is marked as -1. */ + newconn = netconn_alloc(conn->type, conn->callback); + if (newconn == NULL) { + return ERR_MEM; + } + newconn->pcb.tcp = newpcb; + setup_tcp(newconn); + /* no protection: when creating the pcb, the netconn is not yet known + to the application thread */ + newconn->last_err = err; + + if (sys_mbox_trypost(&conn->acceptmbox, newconn) != ERR_OK) { + /* When returning != ERR_OK, the pcb is aborted in tcp_process(), + so do nothing here! */ + newconn->pcb.tcp = NULL; + /* no need to drain since we know the recvmbox is empty. */ + sys_mbox_free(&newconn->recvmbox); + sys_mbox_set_invalid(&newconn->recvmbox); + netconn_free(newconn); + return ERR_MEM; + } else { + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0); + } + + return ERR_OK; +} +#endif /* LWIP_TCP */ + +/** + * Create a new pcb of a specific type. + * Called from do_newconn(). + * + * @param msg the api_msg_msg describing the connection type + * @return msg->conn->err, but the return value is currently ignored + */ +static void +pcb_new(struct api_msg_msg *msg) +{ + LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL); + + /* Allocate a PCB for this connection */ + switch(NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + msg->conn->pcb.raw = raw_new(msg->msg.n.proto); + if(msg->conn->pcb.raw == NULL) { + msg->err = ERR_MEM; + break; + } + raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->conn->pcb.udp = udp_new(); + if(msg->conn->pcb.udp == NULL) { + msg->err = ERR_MEM; + break; + } +#if LWIP_UDPLITE + if (msg->conn->type==NETCONN_UDPLITE) { + udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); + } +#endif /* LWIP_UDPLITE */ + if (msg->conn->type==NETCONN_UDPNOCHKSUM) { + udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); + } + udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + msg->conn->pcb.tcp = tcp_new(); + if(msg->conn->pcb.tcp == NULL) { + msg->err = ERR_MEM; + break; + } + setup_tcp(msg->conn); + break; +#endif /* LWIP_TCP */ + default: + /* Unsupported netconn type, e.g. protocol disabled */ + msg->err = ERR_VAL; + break; + } +} + +/** + * Create a new pcb of a specific type inside a netconn. + * Called from netconn_new_with_proto_and_callback. + * + * @param msg the api_msg_msg describing the connection type + */ +void +do_newconn(struct api_msg_msg *msg) +{ + msg->err = ERR_OK; + if(msg->conn->pcb.tcp == NULL) { + pcb_new(msg); + } + /* Else? This "new" connection already has a PCB allocated. */ + /* Is this an error condition? Should it be deleted? */ + /* We currently just are happy and return. */ + + TCPIP_APIMSG_ACK(msg); +} + +/** + * Create a new netconn (of a specific type) that has a callback function. + * The corresponding pcb is NOT created! + * + * @param t the type of 'connection' to create (@see enum netconn_type) + * @param proto the IP protocol for RAW IP pcbs + * @param callback a function to call on status changes (RX available, TX'ed) + * @return a newly allocated struct netconn or + * NULL on memory error + */ +struct netconn* +netconn_alloc(enum netconn_type t, netconn_callback callback) +{ + struct netconn *conn; + int size; + + conn = (struct netconn *)memp_malloc(MEMP_NETCONN); + if (conn == NULL) { + return NULL; + } + + conn->last_err = ERR_OK; + conn->type = t; + conn->pcb.tcp = NULL; + +#if (DEFAULT_RAW_RECVMBOX_SIZE == DEFAULT_UDP_RECVMBOX_SIZE) && \ + (DEFAULT_RAW_RECVMBOX_SIZE == DEFAULT_TCP_RECVMBOX_SIZE) + size = DEFAULT_RAW_RECVMBOX_SIZE; +#else + switch(NETCONNTYPE_GROUP(t)) { +#if LWIP_RAW + case NETCONN_RAW: + size = DEFAULT_RAW_RECVMBOX_SIZE; + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + size = DEFAULT_UDP_RECVMBOX_SIZE; + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + size = DEFAULT_TCP_RECVMBOX_SIZE; + break; +#endif /* LWIP_TCP */ + default: + LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0); + break; + } +#endif + + if (sys_sem_new(&conn->op_completed, 0) != ERR_OK) { + memp_free(MEMP_NETCONN, conn); + return NULL; + } + if (sys_mbox_new(&conn->recvmbox, size) != ERR_OK) { + sys_sem_free(&conn->op_completed); + memp_free(MEMP_NETCONN, conn); + return NULL; + } + +#if LWIP_TCP + sys_mbox_set_invalid(&conn->acceptmbox); +#endif + conn->state = NETCONN_NONE; +#if LWIP_SOCKET + /* initialize socket to -1 since 0 is a valid socket */ + conn->socket = -1; +#endif /* LWIP_SOCKET */ + conn->callback = callback; +#if LWIP_TCP + conn->current_msg = NULL; + conn->write_offset = 0; +#endif /* LWIP_TCP */ +#if LWIP_SO_RCVTIMEO + conn->recv_timeout = 0; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + conn->recv_bufsize = RECV_BUFSIZE_DEFAULT; + conn->recv_avail = 0; +#endif /* LWIP_SO_RCVBUF */ + conn->flags = 0; + return conn; +} + +/** + * Delete a netconn and all its resources. + * The pcb is NOT freed (since we might not be in the right thread context do this). + * + * @param conn the netconn to free + */ +void +netconn_free(struct netconn *conn) +{ + LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL); + LWIP_ASSERT("recvmbox must be deallocated before calling this function", + !sys_mbox_valid(&conn->recvmbox)); +#if LWIP_TCP + LWIP_ASSERT("acceptmbox must be deallocated before calling this function", + !sys_mbox_valid(&conn->acceptmbox)); +#endif /* LWIP_TCP */ + + sys_sem_free(&conn->op_completed); + sys_sem_set_invalid(&conn->op_completed); + + memp_free(MEMP_NETCONN, conn); +} + +/** + * Delete rcvmbox and acceptmbox of a netconn and free the left-over data in + * these mboxes + * + * @param conn the netconn to free + * @bytes_drained bytes drained from recvmbox + * @accepts_drained pending connections drained from acceptmbox + */ +static void +netconn_drain(struct netconn *conn) +{ + void *mem; +#if LWIP_TCP + struct pbuf *p; +#endif /* LWIP_TCP */ + + /* This runs in tcpip_thread, so we don't need to lock against rx packets */ + + /* Delete and drain the recvmbox. */ + if (sys_mbox_valid(&conn->recvmbox)) { + while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) { +#if LWIP_TCP + if (conn->type == NETCONN_TCP) { + if(mem != NULL) { + p = (struct pbuf*)mem; + /* pcb might be set to NULL already by err_tcp() */ + if (conn->pcb.tcp != NULL) { + tcp_recved(conn->pcb.tcp, p->tot_len); + } + pbuf_free(p); + } + } else +#endif /* LWIP_TCP */ + { + netbuf_delete((struct netbuf *)mem); + } + } + sys_mbox_free(&conn->recvmbox); + sys_mbox_set_invalid(&conn->recvmbox); + } + + /* Delete and drain the acceptmbox. */ +#if LWIP_TCP + if (sys_mbox_valid(&conn->acceptmbox)) { + while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) { + struct netconn *newconn = (struct netconn *)mem; + /* Only tcp pcbs have an acceptmbox, so no need to check conn->type */ + /* pcb might be set to NULL already by err_tcp() */ + if (conn->pcb.tcp != NULL) { + tcp_accepted(conn->pcb.tcp); + } + /* drain recvmbox */ + netconn_drain(newconn); + if (newconn->pcb.tcp != NULL) { + tcp_abort(newconn->pcb.tcp); + newconn->pcb.tcp = NULL; + } + netconn_free(newconn); + } + sys_mbox_free(&conn->acceptmbox); + sys_mbox_set_invalid(&conn->acceptmbox); + } +#endif /* LWIP_TCP */ +} + +#if LWIP_TCP +/** + * Internal helper function to close a TCP netconn: since this sometimes + * doesn't work at the first attempt, this function is called from multiple + * places. + * + * @param conn the TCP netconn to close + */ +static void +do_close_internal(struct netconn *conn) +{ + err_t err; + u8_t shut, shut_rx, shut_tx, close; + + LWIP_ASSERT("invalid conn", (conn != NULL)); + LWIP_ASSERT("this is for tcp netconns only", (conn->type == NETCONN_TCP)); + LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE)); + LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL)); + LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL); + + shut = conn->current_msg->msg.sd.shut; + shut_rx = shut & NETCONN_SHUT_RD; + shut_tx = shut & NETCONN_SHUT_WR; + /* shutting down both ends is the same as closing */ + close = shut == NETCONN_SHUT_RDWR; + + /* Set back some callback pointers */ + if (close) { + tcp_arg(conn->pcb.tcp, NULL); + } + if (conn->pcb.tcp->state == LISTEN) { + tcp_accept(conn->pcb.tcp, NULL); + } else { + /* some callbacks have to be reset if tcp_close is not successful */ + if (shut_rx) { + tcp_recv(conn->pcb.tcp, NULL); + tcp_accept(conn->pcb.tcp, NULL); + } + if (shut_tx) { + tcp_sent(conn->pcb.tcp, NULL); + } + if (close) { + tcp_poll(conn->pcb.tcp, NULL, 4); + tcp_err(conn->pcb.tcp, NULL); + } + } + /* Try to close the connection */ + if (shut == NETCONN_SHUT_RDWR) { + err = tcp_close(conn->pcb.tcp); + } else { + err = tcp_shutdown(conn->pcb.tcp, shut & NETCONN_SHUT_RD, shut & NETCONN_SHUT_WR); + } + if (err == ERR_OK) { + /* Closing succeeded */ + conn->current_msg->err = ERR_OK; + conn->current_msg = NULL; + conn->state = NETCONN_NONE; + /* Set back some callback pointers as conn is going away */ + conn->pcb.tcp = NULL; + /* Trigger select() in socket layer. Make sure everybody notices activity + on the connection, error first! */ + if (close) { + API_EVENT(conn, NETCONN_EVT_ERROR, 0); + } + if (shut_rx) { + API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0); + } + if (shut_tx) { + API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0); + } + /* wake up the application task */ + sys_sem_signal(&conn->op_completed); + } else { + /* Closing failed, restore some of the callbacks */ + /* Closing of listen pcb will never fail! */ + LWIP_ASSERT("Closing a listen pcb may not fail!", (conn->pcb.tcp->state != LISTEN)); + tcp_sent(conn->pcb.tcp, sent_tcp); + tcp_poll(conn->pcb.tcp, poll_tcp, 4); + tcp_err(conn->pcb.tcp, err_tcp); + tcp_arg(conn->pcb.tcp, conn); + /* don't restore recv callback: we don't want to receive any more data */ + } + /* If closing didn't succeed, we get called again either + from poll_tcp or from sent_tcp */ +} +#endif /* LWIP_TCP */ + +/** + * Delete the pcb inside a netconn. + * Called from netconn_delete. + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_delconn(struct api_msg_msg *msg) +{ + /* @todo TCP: abort running write/connect? */ + if ((msg->conn->state != NETCONN_NONE) && + (msg->conn->state != NETCONN_LISTEN) && + (msg->conn->state != NETCONN_CONNECT)) { + /* this only happens for TCP netconns */ + LWIP_ASSERT("msg->conn->type == NETCONN_TCP", msg->conn->type == NETCONN_TCP); + msg->err = ERR_INPROGRESS; + } else { + LWIP_ASSERT("blocking connect in progress", + (msg->conn->state != NETCONN_CONNECT) || IN_NONBLOCKING_CONNECT(msg->conn)); + /* Drain and delete mboxes */ + netconn_drain(msg->conn); + + if (msg->conn->pcb.tcp != NULL) { + + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + raw_remove(msg->conn->pcb.raw); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->conn->pcb.udp->recv_arg = NULL; + udp_remove(msg->conn->pcb.udp); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL && + msg->conn->write_offset == 0); + msg->conn->state = NETCONN_CLOSE; + msg->msg.sd.shut = NETCONN_SHUT_RDWR; + msg->conn->current_msg = msg; + do_close_internal(msg->conn); + /* API_EVENT is called inside do_close_internal, before releasing + the application thread, so we can return at this point! */ + return; +#endif /* LWIP_TCP */ + default: + break; + } + msg->conn->pcb.tcp = NULL; + } + /* tcp netconns don't come here! */ + + /* @todo: this lets select make the socket readable and writable, + which is wrong! errfd instead? */ + API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0); + API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0); + } + if (sys_sem_valid(&msg->conn->op_completed)) { + sys_sem_signal(&msg->conn->op_completed); + } +} + +/** + * Bind a pcb contained in a netconn + * Called from netconn_bind. + * + * @param msg the api_msg_msg pointing to the connection and containing + * the IP address and port to bind to + */ +void +do_bind(struct api_msg_msg *msg) +{ + if (ERR_IS_FATAL(msg->conn->last_err)) { + msg->err = msg->conn->last_err; + } else { + msg->err = ERR_VAL; + if (msg->conn->pcb.tcp != NULL) { + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + msg->err = raw_bind(msg->conn->pcb.raw, msg->msg.bc.ipaddr); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->err = udp_bind(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + msg->err = tcp_bind(msg->conn->pcb.tcp, msg->msg.bc.ipaddr, msg->msg.bc.port); + break; +#endif /* LWIP_TCP */ + default: + break; + } + } + } + TCPIP_APIMSG_ACK(msg); +} + +#if LWIP_TCP +/** + * TCP callback function if a connection (opened by tcp_connect/do_connect) has + * been established (or reset by the remote host). + * + * @see tcp.h (struct tcp_pcb.connected) for parameters and return values + */ +static err_t +do_connected(void *arg, struct tcp_pcb *pcb, err_t err) +{ + struct netconn *conn; + int was_blocking; + + LWIP_UNUSED_ARG(pcb); + + conn = (struct netconn *)arg; + + if (conn == NULL) { + return ERR_VAL; + } + + LWIP_ASSERT("conn->state == NETCONN_CONNECT", conn->state == NETCONN_CONNECT); + LWIP_ASSERT("(conn->current_msg != NULL) || conn->in_non_blocking_connect", + (conn->current_msg != NULL) || IN_NONBLOCKING_CONNECT(conn)); + + if (conn->current_msg != NULL) { + conn->current_msg->err = err; + } + if ((conn->type == NETCONN_TCP) && (err == ERR_OK)) { + setup_tcp(conn); + } + was_blocking = !IN_NONBLOCKING_CONNECT(conn); + SET_NONBLOCKING_CONNECT(conn, 0); + conn->current_msg = NULL; + conn->state = NETCONN_NONE; + if (!was_blocking) { + SYS_ARCH_DECL_PROTECT(lev); + SYS_ARCH_PROTECT(lev); + if (conn->last_err == ERR_INPROGRESS) { + conn->last_err = ERR_OK; + } + SYS_ARCH_UNPROTECT(lev); + } + API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0); + + if (was_blocking) { + sys_sem_signal(&conn->op_completed); + } + return ERR_OK; +} +#endif /* LWIP_TCP */ + +/** + * Connect a pcb contained inside a netconn + * Called from netconn_connect. + * + * @param msg the api_msg_msg pointing to the connection and containing + * the IP address and port to connect to + */ +void +do_connect(struct api_msg_msg *msg) +{ + if (msg->conn->pcb.tcp == NULL) { + /* This may happen when calling netconn_connect() a second time */ + msg->err = ERR_CLSD; + } else { + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + msg->err = raw_connect(msg->conn->pcb.raw, msg->msg.bc.ipaddr); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->err = udp_connect(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + /* Prevent connect while doing any other action. */ + if (msg->conn->state != NETCONN_NONE) { + msg->err = ERR_ISCONN; + } else { + setup_tcp(msg->conn); + msg->err = tcp_connect(msg->conn->pcb.tcp, msg->msg.bc.ipaddr, + msg->msg.bc.port, do_connected); + if (msg->err == ERR_OK) { + u8_t non_blocking = netconn_is_nonblocking(msg->conn); + msg->conn->state = NETCONN_CONNECT; + SET_NONBLOCKING_CONNECT(msg->conn, non_blocking); + if (non_blocking) { + msg->err = ERR_INPROGRESS; + } else { + msg->conn->current_msg = msg; + /* sys_sem_signal() is called from do_connected (or err_tcp()), + * when the connection is established! */ + return; + } + } + } + break; +#endif /* LWIP_TCP */ + default: + LWIP_ERROR("Invalid netconn type", 0, do{ msg->err = ERR_VAL; }while(0)); + break; + } + } + sys_sem_signal(&msg->conn->op_completed); +} + +/** + * Connect a pcb contained inside a netconn + * Only used for UDP netconns. + * Called from netconn_disconnect. + * + * @param msg the api_msg_msg pointing to the connection to disconnect + */ +void +do_disconnect(struct api_msg_msg *msg) +{ +#if LWIP_UDP + if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) { + udp_disconnect(msg->conn->pcb.udp); + msg->err = ERR_OK; + } else +#endif /* LWIP_UDP */ + { + msg->err = ERR_VAL; + } + TCPIP_APIMSG_ACK(msg); +} + +#if LWIP_TCP +/** + * Set a TCP pcb contained in a netconn into listen mode + * Called from netconn_listen. + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_listen(struct api_msg_msg *msg) +{ + if (ERR_IS_FATAL(msg->conn->last_err)) { + msg->err = msg->conn->last_err; + } else { + msg->err = ERR_CONN; + if (msg->conn->pcb.tcp != NULL) { + if (msg->conn->type == NETCONN_TCP) { + if (msg->conn->state == NETCONN_NONE) { +#if TCP_LISTEN_BACKLOG + struct tcp_pcb* lpcb = tcp_listen_with_backlog(msg->conn->pcb.tcp, msg->msg.lb.backlog); +#else /* TCP_LISTEN_BACKLOG */ + struct tcp_pcb* lpcb = tcp_listen(msg->conn->pcb.tcp); +#endif /* TCP_LISTEN_BACKLOG */ + if (lpcb == NULL) { + /* in this case, the old pcb is still allocated */ + msg->err = ERR_MEM; + } else { + /* delete the recvmbox and allocate the acceptmbox */ + if (sys_mbox_valid(&msg->conn->recvmbox)) { + /** @todo: should we drain the recvmbox here? */ + sys_mbox_free(&msg->conn->recvmbox); + sys_mbox_set_invalid(&msg->conn->recvmbox); + } + msg->err = ERR_OK; + if (!sys_mbox_valid(&msg->conn->acceptmbox)) { + msg->err = sys_mbox_new(&msg->conn->acceptmbox, DEFAULT_ACCEPTMBOX_SIZE); + } + if (msg->err == ERR_OK) { + msg->conn->state = NETCONN_LISTEN; + msg->conn->pcb.tcp = lpcb; + tcp_arg(msg->conn->pcb.tcp, msg->conn); + tcp_accept(msg->conn->pcb.tcp, accept_function); + } else { + /* since the old pcb is already deallocated, free lpcb now */ + tcp_close(lpcb); + msg->conn->pcb.tcp = NULL; + } + } + } + } + } + } + TCPIP_APIMSG_ACK(msg); +} +#endif /* LWIP_TCP */ + +/** + * Send some data on a RAW or UDP pcb contained in a netconn + * Called from netconn_send + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_send(struct api_msg_msg *msg) +{ + if (ERR_IS_FATAL(msg->conn->last_err)) { + msg->err = msg->conn->last_err; + } else { + msg->err = ERR_CONN; + if (msg->conn->pcb.tcp != NULL) { + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + if (ip_addr_isany(&msg->msg.b->addr)) { + msg->err = raw_send(msg->conn->pcb.raw, msg->msg.b->p); + } else { + msg->err = raw_sendto(msg->conn->pcb.raw, msg->msg.b->p, &msg->msg.b->addr); + } + break; +#endif +#if LWIP_UDP + case NETCONN_UDP: +#if LWIP_CHECKSUM_ON_COPY + if (ip_addr_isany(&msg->msg.b->addr)) { + msg->err = udp_send_chksum(msg->conn->pcb.udp, msg->msg.b->p, + msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum); + } else { + msg->err = udp_sendto_chksum(msg->conn->pcb.udp, msg->msg.b->p, + &msg->msg.b->addr, msg->msg.b->port, + msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum); + } +#else /* LWIP_CHECKSUM_ON_COPY */ + if (ip_addr_isany(&msg->msg.b->addr)) { + msg->err = udp_send(msg->conn->pcb.udp, msg->msg.b->p); + } else { + msg->err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port); + } +#endif /* LWIP_CHECKSUM_ON_COPY */ + break; +#endif /* LWIP_UDP */ + default: + break; + } + } + } + TCPIP_APIMSG_ACK(msg); +} + +#if LWIP_TCP +/** + * Indicate data has been received from a TCP pcb contained in a netconn + * Called from netconn_recv + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_recv(struct api_msg_msg *msg) +{ + msg->err = ERR_OK; + if (msg->conn->pcb.tcp != NULL) { + if (msg->conn->type == NETCONN_TCP) { +#if TCP_LISTEN_BACKLOG + if (msg->conn->pcb.tcp->state == LISTEN) { + tcp_accepted(msg->conn->pcb.tcp); + } else +#endif /* TCP_LISTEN_BACKLOG */ + { + u32_t remaining = msg->msg.r.len; + do { + u16_t recved = (remaining > 0xffff) ? 0xffff : (u16_t)remaining; + tcp_recved(msg->conn->pcb.tcp, recved); + remaining -= recved; + }while(remaining != 0); + } + } + } + TCPIP_APIMSG_ACK(msg); +} + +/** + * See if more data needs to be written from a previous call to netconn_write. + * Called initially from do_write. If the first call can't send all data + * (because of low memory or empty send-buffer), this function is called again + * from sent_tcp() or poll_tcp() to send more data. If all data is sent, the + * blocking application thread (waiting in netconn_write) is released. + * + * @param conn netconn (that is currently in state NETCONN_WRITE) to process + * @return ERR_OK + * ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished + */ +static err_t +do_writemore(struct netconn *conn) +{ + err_t err = ERR_OK; + void *dataptr; + u16_t len, available; + u8_t write_finished = 0; + size_t diff; + u8_t dontblock = netconn_is_nonblocking(conn) || + (conn->current_msg->msg.w.apiflags & NETCONN_DONTBLOCK); + u8_t apiflags = conn->current_msg->msg.w.apiflags; + + LWIP_ASSERT("conn != NULL", conn != NULL); + LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE)); + LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL); + LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL); + LWIP_ASSERT("conn->write_offset < conn->current_msg->msg.w.len", + conn->write_offset < conn->current_msg->msg.w.len); + + dataptr = (u8_t*)conn->current_msg->msg.w.dataptr + conn->write_offset; + diff = conn->current_msg->msg.w.len - conn->write_offset; + if (diff > 0xffffUL) { /* max_u16_t */ + len = 0xffff; +#if LWIP_TCPIP_CORE_LOCKING + conn->flags |= NETCONN_FLAG_WRITE_DELAYED; +#endif + apiflags |= TCP_WRITE_FLAG_MORE; + } else { + len = (u16_t)diff; + } + available = tcp_sndbuf(conn->pcb.tcp); + if (available < len) { + /* don't try to write more than sendbuf */ + len = available; +#if LWIP_TCPIP_CORE_LOCKING + conn->flags |= NETCONN_FLAG_WRITE_DELAYED; +#endif + apiflags |= TCP_WRITE_FLAG_MORE; + } + if (dontblock && (len < conn->current_msg->msg.w.len)) { + /* failed to send all data at once -> nonblocking write not possible */ + err = ERR_MEM; + } + if (err == ERR_OK) { + LWIP_ASSERT("do_writemore: invalid length!", ((conn->write_offset + len) <= conn->current_msg->msg.w.len)); + err = tcp_write(conn->pcb.tcp, dataptr, len, apiflags); + } + if (dontblock && (err == ERR_MEM)) { + /* nonblocking write failed */ + write_finished = 1; + err = ERR_WOULDBLOCK; + /* let poll_tcp check writable space to mark the pcb + writable again */ + conn->flags |= NETCONN_FLAG_CHECK_WRITESPACE; + /* let select mark this pcb as non-writable. */ + API_EVENT(conn, NETCONN_EVT_SENDMINUS, len); + } else { + /* if OK or memory error, check available space */ + if (((err == ERR_OK) || (err == ERR_MEM)) && + ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) || + (tcp_sndqueuelen(conn->pcb.tcp) >= TCP_SNDQUEUELOWAT))) { + /* The queued byte- or pbuf-count exceeds the configured low-water limit, + let select mark this pcb as non-writable. */ + API_EVENT(conn, NETCONN_EVT_SENDMINUS, len); + } + + if (err == ERR_OK) { + conn->write_offset += len; + if (conn->write_offset == conn->current_msg->msg.w.len) { + /* everything was written */ + write_finished = 1; + conn->write_offset = 0; + } + tcp_output(conn->pcb.tcp); + } else if (err == ERR_MEM) { + /* If ERR_MEM, we wait for sent_tcp or poll_tcp to be called + we do NOT return to the application thread, since ERR_MEM is + only a temporary error! */ + + /* tcp_write returned ERR_MEM, try tcp_output anyway */ + tcp_output(conn->pcb.tcp); + + #if LWIP_TCPIP_CORE_LOCKING + conn->flags |= NETCONN_FLAG_WRITE_DELAYED; + #endif + } else { + /* On errors != ERR_MEM, we don't try writing any more but return + the error to the application thread. */ + write_finished = 1; + } + } + + if (write_finished) { + /* everything was written: set back connection state + and back to application task */ + conn->current_msg->err = err; + conn->current_msg = NULL; + conn->state = NETCONN_NONE; +#if LWIP_TCPIP_CORE_LOCKING + if ((conn->flags & NETCONN_FLAG_WRITE_DELAYED) != 0) +#endif + { + sys_sem_signal(&conn->op_completed); + } + } +#if LWIP_TCPIP_CORE_LOCKING + else + return ERR_MEM; +#endif + return ERR_OK; +} +#endif /* LWIP_TCP */ + +/** + * Send some data on a TCP pcb contained in a netconn + * Called from netconn_write + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_write(struct api_msg_msg *msg) +{ + if (ERR_IS_FATAL(msg->conn->last_err)) { + msg->err = msg->conn->last_err; + } else { + if (msg->conn->type == NETCONN_TCP) { +#if LWIP_TCP + if (msg->conn->state != NETCONN_NONE) { + /* netconn is connecting, closing or in blocking write */ + msg->err = ERR_INPROGRESS; + } else if (msg->conn->pcb.tcp != NULL) { + msg->conn->state = NETCONN_WRITE; + /* set all the variables used by do_writemore */ + LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL && + msg->conn->write_offset == 0); + LWIP_ASSERT("msg->msg.w.len != 0", msg->msg.w.len != 0); + msg->conn->current_msg = msg; + msg->conn->write_offset = 0; +#if LWIP_TCPIP_CORE_LOCKING + msg->conn->flags &= ~NETCONN_FLAG_WRITE_DELAYED; + if (do_writemore(msg->conn) != ERR_OK) { + LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE); + UNLOCK_TCPIP_CORE(); + sys_arch_sem_wait(&msg->conn->op_completed, 0); + LOCK_TCPIP_CORE(); + LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE); + } +#else /* LWIP_TCPIP_CORE_LOCKING */ + do_writemore(msg->conn); +#endif /* LWIP_TCPIP_CORE_LOCKING */ + /* for both cases: if do_writemore was called, don't ACK the APIMSG + since do_writemore ACKs it! */ + return; + } else { + msg->err = ERR_CONN; + } +#else /* LWIP_TCP */ + msg->err = ERR_VAL; +#endif /* LWIP_TCP */ +#if (LWIP_UDP || LWIP_RAW) + } else { + msg->err = ERR_VAL; +#endif /* (LWIP_UDP || LWIP_RAW) */ + } + } + TCPIP_APIMSG_ACK(msg); +} + +/** + * Return a connection's local or remote address + * Called from netconn_getaddr + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_getaddr(struct api_msg_msg *msg) +{ + if (msg->conn->pcb.ip != NULL) { + *(msg->msg.ad.ipaddr) = (msg->msg.ad.local ? msg->conn->pcb.ip->local_ip : + msg->conn->pcb.ip->remote_ip); + + msg->err = ERR_OK; + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + if (msg->msg.ad.local) { + *(msg->msg.ad.port) = msg->conn->pcb.raw->protocol; + } else { + /* return an error as connecting is only a helper for upper layers */ + msg->err = ERR_CONN; + } + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + if (msg->msg.ad.local) { + *(msg->msg.ad.port) = msg->conn->pcb.udp->local_port; + } else { + if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) { + msg->err = ERR_CONN; + } else { + *(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port; + } + } + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + *(msg->msg.ad.port) = (msg->msg.ad.local?msg->conn->pcb.tcp->local_port:msg->conn->pcb.tcp->remote_port); + break; +#endif /* LWIP_TCP */ + default: + LWIP_ASSERT("invalid netconn_type", 0); + break; + } + } else { + msg->err = ERR_CONN; + } + TCPIP_APIMSG_ACK(msg); +} + +/** + * Close a TCP pcb contained in a netconn + * Called from netconn_close + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_close(struct api_msg_msg *msg) +{ +#if LWIP_TCP + /* @todo: abort running write/connect? */ + if ((msg->conn->state != NETCONN_NONE) && (msg->conn->state != NETCONN_LISTEN)) { + /* this only happens for TCP netconns */ + LWIP_ASSERT("msg->conn->type == NETCONN_TCP", msg->conn->type == NETCONN_TCP); + msg->err = ERR_INPROGRESS; + } else if ((msg->conn->pcb.tcp != NULL) && (msg->conn->type == NETCONN_TCP)) { + if ((msg->msg.sd.shut != NETCONN_SHUT_RDWR) && (msg->conn->state == NETCONN_LISTEN)) { + /* LISTEN doesn't support half shutdown */ + msg->err = ERR_CONN; + } else { + if (msg->msg.sd.shut & NETCONN_SHUT_RD) { + /* Drain and delete mboxes */ + netconn_drain(msg->conn); + } + LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL && + msg->conn->write_offset == 0); + msg->conn->state = NETCONN_CLOSE; + msg->conn->current_msg = msg; + do_close_internal(msg->conn); + /* for tcp netconns, do_close_internal ACKs the message */ + return; + } + } else +#endif /* LWIP_TCP */ + { + msg->err = ERR_VAL; + } + sys_sem_signal(&msg->conn->op_completed); +} + +#if LWIP_IGMP +/** + * Join multicast groups for UDP netconns. + * Called from netconn_join_leave_group + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_join_leave_group(struct api_msg_msg *msg) +{ + if (ERR_IS_FATAL(msg->conn->last_err)) { + msg->err = msg->conn->last_err; + } else { + if (msg->conn->pcb.tcp != NULL) { + if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) { +#if LWIP_UDP + if (msg->msg.jl.join_or_leave == NETCONN_JOIN) { + msg->err = igmp_joingroup(msg->msg.jl.netif_addr, msg->msg.jl.multiaddr); + } else { + msg->err = igmp_leavegroup(msg->msg.jl.netif_addr, msg->msg.jl.multiaddr); + } +#endif /* LWIP_UDP */ +#if (LWIP_TCP || LWIP_RAW) + } else { + msg->err = ERR_VAL; +#endif /* (LWIP_TCP || LWIP_RAW) */ + } + } else { + msg->err = ERR_CONN; + } + } + TCPIP_APIMSG_ACK(msg); +} +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +/** + * Callback function that is called when DNS name is resolved + * (or on timeout). A waiting application thread is waked up by + * signaling the semaphore. + */ +static void +do_dns_found(const char *name, ip_addr_t *ipaddr, void *arg) +{ + struct dns_api_msg *msg = (struct dns_api_msg*)arg; + + LWIP_ASSERT("DNS response for wrong host name", strcmp(msg->name, name) == 0); + LWIP_UNUSED_ARG(name); + + if (ipaddr == NULL) { + /* timeout or memory error */ + *msg->err = ERR_VAL; + } else { + /* address was resolved */ + *msg->err = ERR_OK; + *msg->addr = *ipaddr; + } + /* wake up the application task waiting in netconn_gethostbyname */ + sys_sem_signal(msg->sem); +} + +/** + * Execute a DNS query + * Called from netconn_gethostbyname + * + * @param arg the dns_api_msg pointing to the query + */ +void +do_gethostbyname(void *arg) +{ + struct dns_api_msg *msg = (struct dns_api_msg*)arg; + + *msg->err = dns_gethostbyname(msg->name, msg->addr, do_dns_found, msg); + if (*msg->err != ERR_INPROGRESS) { + /* on error or immediate success, wake up the application + * task waiting in netconn_gethostbyname */ + sys_sem_signal(msg->sem); + } +} +#endif /* LWIP_DNS */ + +#endif /* LWIP_NETCONN */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/err.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/err.c new file mode 100755 index 0000000..b0a4eb3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/err.c @@ -0,0 +1,75 @@ +/** + * @file + * Error Management module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/err.h" + +#ifdef LWIP_DEBUG + +static const char *err_strerr[] = { + "Ok.", /* ERR_OK 0 */ + "Out of memory error.", /* ERR_MEM -1 */ + "Buffer error.", /* ERR_BUF -2 */ + "Timeout.", /* ERR_TIMEOUT -3 */ + "Routing problem.", /* ERR_RTE -4 */ + "Operation in progress.", /* ERR_INPROGRESS -5 */ + "Illegal value.", /* ERR_VAL -6 */ + "Operation would block.", /* ERR_WOULDBLOCK -7 */ + "Connection aborted.", /* ERR_ABRT -8 */ + "Connection reset.", /* ERR_RST -9 */ + "Connection closed.", /* ERR_CLSD -10 */ + "Not connected.", /* ERR_CONN -11 */ + "Illegal argument.", /* ERR_ARG -12 */ + "Address in use.", /* ERR_USE -13 */ + "Low-level netif error.", /* ERR_IF -14 */ + "Already connected.", /* ERR_ISCONN -15 */ +}; + +/** + * Convert an lwip internal error to a string representation. + * + * @param err an lwip internal err_t + * @return a string representation for err + */ +const char * +lwip_strerr(err_t err) +{ + return err_strerr[-err]; + +} + +#endif /* LWIP_DEBUG */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netbuf.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netbuf.c new file mode 100755 index 0000000..886f66b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netbuf.c @@ -0,0 +1,245 @@ +/** + * @file + * Network buffer management + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netbuf.h" +#include "lwip/memp.h" + +#include + +/** + * Create (allocate) and initialize a new netbuf. + * The netbuf doesn't yet contain a packet buffer! + * һµnetbufռ䣬κݿռ + * @return a pointer to a new netbuf + * NULL on lack of memory + */ +struct +netbuf *netbuf_new(void) +{ + struct netbuf *buf; + + buf = (struct netbuf *)memp_malloc(MEMP_NETBUF); + if (buf != NULL) { + buf->p = NULL; + buf->ptr = NULL; + ip_addr_set_any(&buf->addr); + buf->port = 0; +#if LWIP_NETBUF_RECVINFO || LWIP_CHECKSUM_ON_COPY +#if LWIP_CHECKSUM_ON_COPY + buf->flags = 0; +#endif /* LWIP_CHECKSUM_ON_COPY */ + buf->toport_chksum = 0; +#if LWIP_NETBUF_RECVINFO + ip_addr_set_any(&buf->toaddr); +#endif /* LWIP_NETBUF_RECVINFO */ +#endif /* LWIP_NETBUF_RECVINFO || LWIP_CHECKSUM_ON_COPY */ + return buf; + } else { + return NULL; + } +} + +/** + * Deallocate a netbuf allocated by netbuf_new(). + * ͷһnetbufռ + * @param buf pointer to a netbuf allocated by netbuf_new() + */ +void +netbuf_delete(struct netbuf *buf) +{ + if (buf != NULL) { + if (buf->p != NULL) { + pbuf_free(buf->p); + buf->p = buf->ptr = NULL; + } + memp_free(MEMP_NETBUF, buf); + } +} + +/** + * Allocate memory for a packet buffer for a given netbuf. + *ΪnetbufṹsizeСݿռ + * @param buf the netbuf for which to allocate a packet buffer + * @param size the size of the packet buffer to allocate + * @return pointer to the allocated memory + * NULL if no memory could be allocated + */ +void * +netbuf_alloc(struct netbuf *buf, u16_t size) +{ + LWIP_ERROR("netbuf_alloc: invalid buf", (buf != NULL), return NULL;); + + /* Deallocate any previously allocated memory. */ + if (buf->p != NULL) { + pbuf_free(buf->p); + } + buf->p = pbuf_alloc(PBUF_TRANSPORT, size, PBUF_RAM); + if (buf->p == NULL) { + return NULL; + } + LWIP_ASSERT("check that first pbuf can hold size", + (buf->p->len >= size)); + buf->ptr = buf->p; + return buf->p->payload; +} + +/** + * Free the packet buffer included in a netbuf + *ͷnetbufṹָpbuf + * @param buf pointer to the netbuf which contains the packet buffer to free + */ +void +netbuf_free(struct netbuf *buf) +{ + LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;); + if (buf->p != NULL) { + pbuf_free(buf->p); + } + buf->p = buf->ptr = NULL; +} + +/** + * Let a netbuf reference existing (non-volatile) data. + * + * @param buf netbuf which should reference the data + * @param dataptr pointer to the data to reference + * @param size size of the data + * @return ERR_OK if data is referenced + * ERR_MEM if data couldn't be referenced due to lack of memory + */ +err_t +netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size) +{ + LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;); + if (buf->p != NULL) { + pbuf_free(buf->p); + } + buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF); + if (buf->p == NULL) { + buf->ptr = NULL; + return ERR_MEM; + } + buf->p->payload = (void*)dataptr; + buf->p->len = buf->p->tot_len = size; + buf->ptr = buf->p; + return ERR_OK; +} + +/** + * Chain one netbuf to another (@see pbuf_chain) + * + * @param head the first netbuf + * @param tail netbuf to chain after head, freed by this function, may not be reference after returning + */ +void +netbuf_chain(struct netbuf *head, struct netbuf *tail) +{ + LWIP_ERROR("netbuf_ref: invalid head", (head != NULL), return;); + LWIP_ERROR("netbuf_chain: invalid tail", (tail != NULL), return;); + pbuf_cat(head->p, tail->p); + head->ptr = head->p; + memp_free(MEMP_NETBUF, tail); +} + +/** + * Get the data pointer and length of the data inside a netbuf. + * + * @param buf netbuf to get the data from + * @param dataptr pointer to a void pointer where to store the data pointer + * @param len pointer to an u16_t where the length of the data is stored + * @return ERR_OK if the information was retreived, + * ERR_BUF on error. + */ +err_t +netbuf_data(struct netbuf *buf, void **dataptr, u16_t *len) +{ + LWIP_ERROR("netbuf_data: invalid buf", (buf != NULL), return ERR_ARG;); + LWIP_ERROR("netbuf_data: invalid dataptr", (dataptr != NULL), return ERR_ARG;); + LWIP_ERROR("netbuf_data: invalid len", (len != NULL), return ERR_ARG;); + + if (buf->ptr == NULL) { + return ERR_BUF; + } + *dataptr = buf->ptr->payload; + *len = buf->ptr->len; + return ERR_OK; +} + +/** + * Move the current data pointer of a packet buffer contained in a netbuf + * to the next part. + * The packet buffer itself is not modified. + * + * @param buf the netbuf to modify + * @return -1 if there is no next part + * 1 if moved to the next part but now there is no next part + * 0 if moved to the next part and there are still more parts + */ +s8_t +netbuf_next(struct netbuf *buf) +{ + LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return -1;); + if (buf->ptr->next == NULL) { + return -1; + } + buf->ptr = buf->ptr->next; + if (buf->ptr->next == NULL) { + return 1; + } + return 0; +} + +/** + * Move the current data pointer of a packet buffer contained in a netbuf + * to the beginning of the packet. + * The packet buffer itself is not modified. + * + * @param buf the netbuf to modify + */ +void +netbuf_first(struct netbuf *buf) +{ + LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;); + buf->ptr = buf->p; +} + +#endif /* LWIP_NETCONN */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netdb.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netdb.c new file mode 100755 index 0000000..a7e4e06 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netdb.c @@ -0,0 +1,352 @@ +/** + * @file + * API functions for name resolving + * + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt + * + */ + +#include "lwip/netdb.h" + +#if LWIP_DNS && LWIP_SOCKET + +#include "lwip/err.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/ip_addr.h" +#include "lwip/api.h" +#include "lwip/dns.h" + +#include +#include + +/** helper struct for gethostbyname_r to access the char* buffer */ +struct gethostbyname_r_helper { + ip_addr_t *addrs; + ip_addr_t addr; + char *aliases; +}; + +/** h_errno is exported in netdb.h for access by applications. */ +#if LWIP_DNS_API_DECLARE_H_ERRNO +int h_errno; +#endif /* LWIP_DNS_API_DECLARE_H_ERRNO */ + +/** define "hostent" variables storage: 0 if we use a static (but unprotected) + * set of variables for lwip_gethostbyname, 1 if we use a local storage */ +#ifndef LWIP_DNS_API_HOSTENT_STORAGE +#define LWIP_DNS_API_HOSTENT_STORAGE 0 +#endif + +/** define "hostent" variables storage */ +#if LWIP_DNS_API_HOSTENT_STORAGE +#define HOSTENT_STORAGE +#else +#define HOSTENT_STORAGE static +#endif /* LWIP_DNS_API_STATIC_HOSTENT */ + +/** + * Returns an entry containing addresses of address family AF_INET + * for the host with name name. + * Due to dns_gethostbyname limitations, only one address is returned. + * + * @param name the hostname to resolve + * @return an entry containing addresses of address family AF_INET + * for the host with name name + */ +struct hostent* +lwip_gethostbyname(const char *name) +{ + err_t err; + ip_addr_t addr; + + /* buffer variables for lwip_gethostbyname() */ + HOSTENT_STORAGE struct hostent s_hostent; + HOSTENT_STORAGE char *s_aliases; + HOSTENT_STORAGE ip_addr_t s_hostent_addr; + HOSTENT_STORAGE ip_addr_t *s_phostent_addr[2]; + + /* query host IP address */ + err = netconn_gethostbyname(name, &addr); + if (err != ERR_OK) { + LWIP_DEBUGF(DNS_DEBUG, ("lwip_gethostbyname(%s) failed, err=%d\n", name, err)); + h_errno = HOST_NOT_FOUND; + return NULL; + } + + /* fill hostent */ + s_hostent_addr = addr; + s_phostent_addr[0] = &s_hostent_addr; + s_phostent_addr[1] = NULL; + s_hostent.h_name = (char*)name; + s_hostent.h_aliases = &s_aliases; + s_hostent.h_addrtype = AF_INET; + s_hostent.h_length = sizeof(ip_addr_t); + s_hostent.h_addr_list = (char**)&s_phostent_addr; + +#if DNS_DEBUG + /* dump hostent */ + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_name == %s\n", s_hostent.h_name)); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_aliases == %p\n", s_hostent.h_aliases)); + if (s_hostent.h_aliases != NULL) { + u8_t idx; + for ( idx=0; s_hostent.h_aliases[idx]; idx++) { + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_aliases[%i]-> == %p\n", idx, s_hostent.h_aliases[idx])); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_aliases[%i]-> == %s\n", idx, s_hostent.h_aliases[idx])); + } + } + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addrtype == %d\n", s_hostent.h_addrtype)); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_length == %d\n", s_hostent.h_length)); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addr_list == %p\n", s_hostent.h_addr_list)); + if (s_hostent.h_addr_list != NULL) { + u8_t idx; + for ( idx=0; s_hostent.h_addr_list[idx]; idx++) { + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addr_list[%i] == %p\n", idx, s_hostent.h_addr_list[idx])); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addr_list[%i]-> == %s\n", idx, ip_ntoa((ip_addr_t*)s_hostent.h_addr_list[idx]))); + } + } +#endif /* DNS_DEBUG */ + +#if LWIP_DNS_API_HOSTENT_STORAGE + /* this function should return the "per-thread" hostent after copy from s_hostent */ + return sys_thread_hostent(&s_hostent); +#else + return &s_hostent; +#endif /* LWIP_DNS_API_HOSTENT_STORAGE */ +} + +/** + * Thread-safe variant of lwip_gethostbyname: instead of using a static + * buffer, this function takes buffer and errno pointers as arguments + * and uses these for the result. + * + * @param name the hostname to resolve + * @param ret pre-allocated struct where to store the result + * @param buf pre-allocated buffer where to store additional data + * @param buflen the size of buf + * @param result pointer to a hostent pointer that is set to ret on success + * and set to zero on error + * @param h_errnop pointer to an int where to store errors (instead of modifying + * the global h_errno) + * @return 0 on success, non-zero on error, additional error information + * is stored in *h_errnop instead of h_errno to be thread-safe + */ +int +lwip_gethostbyname_r(const char *name, struct hostent *ret, char *buf, + size_t buflen, struct hostent **result, int *h_errnop) +{ + err_t err; + struct gethostbyname_r_helper *h; + char *hostname; + size_t namelen; + int lh_errno; + + if (h_errnop == NULL) { + /* ensure h_errnop is never NULL */ + h_errnop = &lh_errno; + } + + if (result == NULL) { + /* not all arguments given */ + *h_errnop = EINVAL; + return -1; + } + /* first thing to do: set *result to nothing */ + *result = NULL; + if ((name == NULL) || (ret == NULL) || (buf == 0)) { + /* not all arguments given */ + *h_errnop = EINVAL; + return -1; + } + + namelen = strlen(name); + if (buflen < (sizeof(struct gethostbyname_r_helper) + namelen + 1 + (MEM_ALIGNMENT - 1))) { + /* buf can't hold the data needed + a copy of name */ + *h_errnop = ERANGE; + return -1; + } + + h = (struct gethostbyname_r_helper*)LWIP_MEM_ALIGN(buf); + hostname = ((char*)h) + sizeof(struct gethostbyname_r_helper); + + /* query host IP address */ + err = netconn_gethostbyname(name, &(h->addr)); + if (err != ERR_OK) { + LWIP_DEBUGF(DNS_DEBUG, ("lwip_gethostbyname(%s) failed, err=%d\n", name, err)); + *h_errnop = ENSRNOTFOUND; + return -1; + } + + /* copy the hostname into buf */ + MEMCPY(hostname, name, namelen); + hostname[namelen] = 0; + + /* fill hostent */ + h->addrs = &(h->addr); + h->aliases = NULL; + ret->h_name = (char*)hostname; + ret->h_aliases = &(h->aliases); + ret->h_addrtype = AF_INET; + ret->h_length = sizeof(ip_addr_t); + ret->h_addr_list = (char**)&(h->addrs); + + /* set result != NULL */ + *result = ret; + + /* return success */ + return 0; +} + +/** + * Frees one or more addrinfo structures returned by getaddrinfo(), along with + * any additional storage associated with those structures. If the ai_next field + * of the structure is not null, the entire list of structures is freed. + * + * @param ai struct addrinfo to free + */ +void +lwip_freeaddrinfo(struct addrinfo *ai) +{ + struct addrinfo *next; + + while (ai != NULL) { + next = ai->ai_next; + memp_free(MEMP_NETDB, ai); + ai = next; + } +} + +/** + * Translates the name of a service location (for example, a host name) and/or + * a service name and returns a set of socket addresses and associated + * information to be used in creating a socket with which to address the + * specified service. + * Memory for the result is allocated internally and must be freed by calling + * lwip_freeaddrinfo()! + * + * Due to a limitation in dns_gethostbyname, only the first address of a + * host is returned. + * Also, service names are not supported (only port numbers)! + * + * @param nodename descriptive name or address string of the host + * (may be NULL -> local address) + * @param servname port number as string of NULL + * @param hints structure containing input values that set socktype and protocol + * @param res pointer to a pointer where to store the result (set to NULL on failure) + * @return 0 on success, non-zero on failure + */ +int +lwip_getaddrinfo(const char *nodename, const char *servname, + const struct addrinfo *hints, struct addrinfo **res) +{ + err_t err; + ip_addr_t addr; + struct addrinfo *ai; + struct sockaddr_in *sa = NULL; + int port_nr = 0; + size_t total_size; + size_t namelen = 0; + + if (res == NULL) { + return EAI_FAIL; + } + *res = NULL; + if ((nodename == NULL) && (servname == NULL)) { + return EAI_NONAME; + } + + if (servname != NULL) { + /* service name specified: convert to port number + * @todo?: currently, only ASCII integers (port numbers) are supported! */ + port_nr = atoi(servname); + if ((port_nr <= 0) || (port_nr > 0xffff)) { + return EAI_SERVICE; + } + } + + if (nodename != NULL) { + /* service location specified, try to resolve */ + err = netconn_gethostbyname(nodename, &addr); + if (err != ERR_OK) { + return EAI_FAIL; + } + } else { + /* service location specified, use loopback address */ + ip_addr_set_loopback(&addr); + } + + total_size = sizeof(struct addrinfo) + sizeof(struct sockaddr_in); + if (nodename != NULL) { + namelen = strlen(nodename); + LWIP_ASSERT("namelen is too long", (namelen + 1) <= (mem_size_t)-1); + total_size += namelen + 1; + } + /* If this fails, please report to lwip-devel! :-) */ + LWIP_ASSERT("total_size <= NETDB_ELEM_SIZE: please report this!", + total_size <= NETDB_ELEM_SIZE); + ai = (struct addrinfo *)memp_malloc(MEMP_NETDB); + if (ai == NULL) { + goto memerr; + } + memset(ai, 0, total_size); + sa = (struct sockaddr_in*)((u8_t*)ai + sizeof(struct addrinfo)); + /* set up sockaddr */ + inet_addr_from_ipaddr(&sa->sin_addr, &addr); + sa->sin_family = AF_INET; + sa->sin_len = sizeof(struct sockaddr_in); + sa->sin_port = htons((u16_t)port_nr); + + /* set up addrinfo */ + ai->ai_family = AF_INET; + if (hints != NULL) { + /* copy socktype & protocol from hints if specified */ + ai->ai_socktype = hints->ai_socktype; + ai->ai_protocol = hints->ai_protocol; + } + if (nodename != NULL) { + /* copy nodename to canonname if specified */ + ai->ai_canonname = ((char*)ai + sizeof(struct addrinfo) + sizeof(struct sockaddr_in)); + MEMCPY(ai->ai_canonname, nodename, namelen); + ai->ai_canonname[namelen] = 0; + } + ai->ai_addrlen = sizeof(struct sockaddr_in); + ai->ai_addr = (struct sockaddr*)sa; + + *res = ai; + + return 0; +memerr: + if (ai != NULL) { + memp_free(MEMP_NETDB, ai); + } + return EAI_MEMORY; +} + +#endif /* LWIP_DNS && LWIP_SOCKET */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netifapi.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netifapi.c new file mode 100755 index 0000000..43e4720 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/netifapi.c @@ -0,0 +1,160 @@ +/** + * @file + * Network Interface Sequential API module + * + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#include "lwip/opt.h" + +#if LWIP_NETIF_API /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netifapi.h" +#include "lwip/tcpip.h" + +/** + * Call netif_add() inside the tcpip_thread context. + */ +void +do_netifapi_netif_add(struct netifapi_msg_msg *msg) +{ + if (!netif_add( msg->netif, + msg->msg.add.ipaddr, + msg->msg.add.netmask, + msg->msg.add.gw, + msg->msg.add.state, + msg->msg.add.init, + msg->msg.add.input)) { + msg->err = ERR_IF; + } else { + msg->err = ERR_OK; + } + TCPIP_NETIFAPI_ACK(msg); +} + +/** + * Call netif_set_addr() inside the tcpip_thread context. + */ +void +do_netifapi_netif_set_addr(struct netifapi_msg_msg *msg) +{ + netif_set_addr( msg->netif, + msg->msg.add.ipaddr, + msg->msg.add.netmask, + msg->msg.add.gw); + msg->err = ERR_OK; + TCPIP_NETIFAPI_ACK(msg); +} + +/** + * Call the "errtfunc" (or the "voidfunc" if "errtfunc" is NULL) inside the + * tcpip_thread context. + */ +void +do_netifapi_netif_common(struct netifapi_msg_msg *msg) +{ + if (msg->msg.common.errtfunc != NULL) { + msg->err = msg->msg.common.errtfunc(msg->netif); + } else { + msg->err = ERR_OK; + msg->msg.common.voidfunc(msg->netif); + } + TCPIP_NETIFAPI_ACK(msg); +} + +/** + * Call netif_add() in a thread-safe way by running that function inside the + * tcpip_thread context. + * + * @note for params @see netif_add() + */ +err_t +netifapi_netif_add(struct netif *netif, + ip_addr_t *ipaddr, + ip_addr_t *netmask, + ip_addr_t *gw, + void *state, + netif_init_fn init, + netif_input_fn input) +{ + struct netifapi_msg msg; + msg.function = do_netifapi_netif_add; + msg.msg.netif = netif; + msg.msg.msg.add.ipaddr = ipaddr; + msg.msg.msg.add.netmask = netmask; + msg.msg.msg.add.gw = gw; + msg.msg.msg.add.state = state; + msg.msg.msg.add.init = init; + msg.msg.msg.add.input = input; + TCPIP_NETIFAPI(&msg); + return msg.msg.err; +} + +/** + * Call netif_set_addr() in a thread-safe way by running that function inside the + * tcpip_thread context. + * + * @note for params @see netif_set_addr() + */ +err_t +netifapi_netif_set_addr(struct netif *netif, + ip_addr_t *ipaddr, + ip_addr_t *netmask, + ip_addr_t *gw) +{ + struct netifapi_msg msg; + msg.function = do_netifapi_netif_set_addr; + msg.msg.netif = netif; + msg.msg.msg.add.ipaddr = ipaddr; + msg.msg.msg.add.netmask = netmask; + msg.msg.msg.add.gw = gw; + TCPIP_NETIFAPI(&msg); + return msg.msg.err; +} + +/** + * call the "errtfunc" (or the "voidfunc" if "errtfunc" is NULL) in a thread-safe + * way by running that function inside the tcpip_thread context. + * + * @note use only for functions where there is only "netif" parameter. + */ +err_t +netifapi_netif_common(struct netif *netif, netifapi_void_fn voidfunc, + netifapi_errt_fn errtfunc) +{ + struct netifapi_msg msg; + msg.function = do_netifapi_netif_common; + msg.msg.netif = netif; + msg.msg.msg.common.voidfunc = voidfunc; + msg.msg.msg.common.errtfunc = errtfunc; + TCPIP_NETIFAPI(&msg); + return msg.msg.err; +} + +#endif /* LWIP_NETIF_API */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/sockets.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/sockets.c new file mode 100755 index 0000000..f3afd63 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/sockets.c @@ -0,0 +1,2343 @@ +/** + * @file + * Sockets BSD-Like API module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + * Improved by Marc Boucher and David Haas + * + */ + +#include "lwip/opt.h" + +#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sockets.h" +#include "lwip/api.h" +#include "lwip/sys.h" +#include "lwip/igmp.h" +#include "lwip/inet.h" +#include "lwip/tcp.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcpip.h" +#include "lwip/pbuf.h" +#if LWIP_CHECKSUM_ON_COPY +#include "lwip/inet_chksum.h" +#endif + +#include + +#define NUM_SOCKETS MEMP_NUM_NETCONN + +/** Contains all internal pointers and states used for a socket */ +struct lwip_sock { + /** sockets currently are built on netconns, each socket has one netconn */ + struct netconn *conn; + /** data that was left from the previous read */ + void *lastdata; + /** offset in the data that was left from the previous read */ + u16_t lastoffset; + /** number of times data was received, set by event_callback(), + tested by the receive and select functions */ + s16_t rcvevent; + /** number of times data was ACKed (free send buffer), set by event_callback(), + tested by select */ + u16_t sendevent; + /** error happened for this socket, set by event_callback(), tested by select */ + u16_t errevent; + /** last error that occurred on this socket */ + int err; + /** counter of how many threads are waiting for this socket using select */ + int select_waiting; +}; + +/** Description for a task waiting in select */ +struct lwip_select_cb { + /** Pointer to the next waiting task */ + struct lwip_select_cb *next; + /** Pointer to the previous waiting task */ + struct lwip_select_cb *prev; + /** readset passed to select */ + fd_set *readset; + /** writeset passed to select */ + fd_set *writeset; + /** unimplemented: exceptset passed to select */ + fd_set *exceptset; + /** don't signal the same semaphore twice: set to 1 when signalled */ + int sem_signalled; + /** semaphore to wake up a task waiting for select */ + sys_sem_t sem; +}; + +/** This struct is used to pass data to the set/getsockopt_internal + * functions running in tcpip_thread context (only a void* is allowed) */ +struct lwip_setgetsockopt_data { + /** socket struct for which to change options */ + struct lwip_sock *sock; +#ifdef LWIP_DEBUG + /** socket index for which to change options */ + int s; +#endif /* LWIP_DEBUG */ + /** level of the option to process */ + int level; + /** name of the option to process */ + int optname; + /** set: value to set the option to + * get: value of the option is stored here */ + void *optval; + /** size of *optval */ + socklen_t *optlen; + /** if an error occures, it is temporarily stored here */ + err_t err; +}; + +/** The global array of available sockets */ +static struct lwip_sock sockets[NUM_SOCKETS]; +/** The global list of tasks waiting for select */ +static struct lwip_select_cb *select_cb_list; +/** This counter is increased from lwip_select when the list is chagned + and checked in event_callback to see if it has changed. */ +static volatile int select_cb_ctr; + +/** Table to quickly map an lwIP error (err_t) to a socket error + * by using -err as an index */ +static const int err_to_errno_table[] = { + 0, /* ERR_OK 0 No error, everything OK. */ + ENOMEM, /* ERR_MEM -1 Out of memory error. */ + ENOBUFS, /* ERR_BUF -2 Buffer error. */ + EWOULDBLOCK, /* ERR_TIMEOUT -3 Timeout */ + EHOSTUNREACH, /* ERR_RTE -4 Routing problem. */ + EINPROGRESS, /* ERR_INPROGRESS -5 Operation in progress */ + EINVAL, /* ERR_VAL -6 Illegal value. */ + EWOULDBLOCK, /* ERR_WOULDBLOCK -7 Operation would block. */ + ECONNABORTED, /* ERR_ABRT -8 Connection aborted. */ + ECONNRESET, /* ERR_RST -9 Connection reset. */ + ESHUTDOWN, /* ERR_CLSD -10 Connection closed. */ + ENOTCONN, /* ERR_CONN -11 Not connected. */ + EIO, /* ERR_ARG -12 Illegal argument. */ + EADDRINUSE, /* ERR_USE -13 Address in use. */ + -1, /* ERR_IF -14 Low-level netif error */ + -1, /* ERR_ISCONN -15 Already connected. */ +}; + +#define ERR_TO_ERRNO_TABLE_SIZE \ + (sizeof(err_to_errno_table)/sizeof(err_to_errno_table[0])) + +#define err_to_errno(err) \ + ((unsigned)(-(err)) < ERR_TO_ERRNO_TABLE_SIZE ? \ + err_to_errno_table[-(err)] : EIO) + +#ifdef ERRNO +#ifndef set_errno +#define set_errno(err) errno = (err) +#endif +#else /* ERRNO */ +#define set_errno(err) +#endif /* ERRNO */ + +#define sock_set_errno(sk, e) do { \ + sk->err = (e); \ + set_errno(sk->err); \ +} while (0) + +/* Forward delcaration of some functions */ +static void event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len); +static void lwip_getsockopt_internal(void *arg); +static void lwip_setsockopt_internal(void *arg); + +/** + * Initialize this module. This function has to be called before any other + * functions in this module! + */ +void +lwip_socket_init(void) +{ +} + +/** + * Map a externally used socket index to the internal socket representation. + * + * @param s externally used socket index + * @return struct lwip_sock for the socket or NULL if not found + */ +static struct lwip_sock * +get_socket(int s) +{ + struct lwip_sock *sock; + + if ((s < 0) || (s >= NUM_SOCKETS)) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", s)); + set_errno(EBADF); + return NULL; + } + + sock = &sockets[s]; + + if (!sock->conn) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): not active\n", s)); + set_errno(EBADF); + return NULL; + } + + return sock; +} + +/** + * Same as get_socket but doesn't set errno + * + * @param s externally used socket index + * @return struct lwip_sock for the socket or NULL if not found + */ +static struct lwip_sock * +tryget_socket(int s) +{ + if ((s < 0) || (s >= NUM_SOCKETS)) { + return NULL; + } + if (!sockets[s].conn) { + return NULL; + } + return &sockets[s]; +} + +/** + * Allocate a new socket for a given netconn. + * + * @param newconn the netconn for which to allocate a socket + * @param accepted 1 if socket has been created by accept(), + * 0 if socket has been created by socket() + * @return the index of the new socket; -1 on error + */ +static int +alloc_socket(struct netconn *newconn, int accepted) +{ + int i; + SYS_ARCH_DECL_PROTECT(lev); + + /* allocate a new socket identifier */ + for (i = 0; i < NUM_SOCKETS; ++i) { + /* Protect socket array */ + SYS_ARCH_PROTECT(lev); + if (!sockets[i].conn) { + sockets[i].conn = newconn; + /* The socket is not yet known to anyone, so no need to protect + after having marked it as used. */ + SYS_ARCH_UNPROTECT(lev); + sockets[i].lastdata = NULL; + sockets[i].lastoffset = 0; + sockets[i].rcvevent = 0; + /* TCP sendbuf is empty, but the socket is not yet writable until connected + * (unless it has been created by accept()). */ + sockets[i].sendevent = (newconn->type == NETCONN_TCP ? (accepted != 0) : 1); + sockets[i].errevent = 0; + sockets[i].err = 0; + sockets[i].select_waiting = 0; + return i; + } + SYS_ARCH_UNPROTECT(lev); + } + return -1; +} + +/** Free a socket. The socket's netconn must have been + * delete before! + * + * @param sock the socket to free + * @param is_tcp != 0 for TCP sockets, used to free lastdata + */ +static void +free_socket(struct lwip_sock *sock, int is_tcp) +{ + void *lastdata; + SYS_ARCH_DECL_PROTECT(lev); + + lastdata = sock->lastdata; + sock->lastdata = NULL; + sock->lastoffset = 0; + sock->err = 0; + + /* Protect socket array */ + SYS_ARCH_PROTECT(lev); + sock->conn = NULL; + SYS_ARCH_UNPROTECT(lev); + /* don't use 'sock' after this line, as another task might have allocated it */ + + if (lastdata != NULL) { + if (is_tcp) { + pbuf_free((struct pbuf *)lastdata); + } else { + netbuf_delete((struct netbuf *)lastdata); + } + } +} + +/* Below this, the well-known socket functions are implemented. + * Use google.com or opengroup.org to get a good description :-) + * + * Exceptions are documented! + */ + +int +lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen) +{ + struct lwip_sock *sock, *nsock; + struct netconn *newconn; + ip_addr_t naddr; + u16_t port; + int newsock; + struct sockaddr_in sin; + err_t err; + SYS_ARCH_DECL_PROTECT(lev); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d)...\n", s)); + sock = get_socket(s); + if (!sock) { + return -1; + } + + if (netconn_is_nonblocking(sock->conn) && (sock->rcvevent <= 0)) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d): returning EWOULDBLOCK\n", s)); + sock_set_errno(sock, EWOULDBLOCK); + return -1; + } + + /* wait for a new connection */ + err = netconn_accept(sock->conn, &newconn); + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d): netconn_acept failed, err=%d\n", s, err)); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + LWIP_ASSERT("newconn != NULL", newconn != NULL); + /* Prevent automatic window updates, we do this on our own! */ + netconn_set_noautorecved(newconn, 1); + + /* get the IP address and port of the remote host */ + err = netconn_peer(newconn, &naddr, &port); + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d): netconn_peer failed, err=%d\n", s, err)); + netconn_delete(newconn); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + /* Note that POSIX only requires us to check addr is non-NULL. addrlen must + * not be NULL if addr is valid. + */ + if (NULL != addr) { + LWIP_ASSERT("addr valid but addrlen NULL", addrlen != NULL); + memset(&sin, 0, sizeof(sin)); + sin.sin_len = sizeof(sin); + sin.sin_family = AF_INET; + sin.sin_port = htons(port); + inet_addr_from_ipaddr(&sin.sin_addr, &naddr); + + if (*addrlen > sizeof(sin)) + *addrlen = sizeof(sin); + + MEMCPY(addr, &sin, *addrlen); + } + + newsock = alloc_socket(newconn, 1); + if (newsock == -1) { + netconn_delete(newconn); + sock_set_errno(sock, ENFILE); + return -1; + } + LWIP_ASSERT("invalid socket index", (newsock >= 0) && (newsock < NUM_SOCKETS)); + LWIP_ASSERT("newconn->callback == event_callback", newconn->callback == event_callback); + nsock = &sockets[newsock]; + + /* See event_callback: If data comes in right away after an accept, even + * though the server task might not have created a new socket yet. + * In that case, newconn->socket is counted down (newconn->socket--), + * so nsock->rcvevent is >= 1 here! + */ + SYS_ARCH_PROTECT(lev); + nsock->rcvevent += (s16_t)(-1 - newconn->socket); + newconn->socket = newsock; + SYS_ARCH_UNPROTECT(lev); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d) returning new sock=%d addr=", s, newsock)); + ip_addr_debug_print(SOCKETS_DEBUG, &naddr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F"\n", port)); + + sock_set_errno(sock, 0); + return newsock; +} + +int +lwip_bind(int s, const struct sockaddr *name, socklen_t namelen) +{ + struct lwip_sock *sock; + ip_addr_t local_addr; + u16_t local_port; + err_t err; + const struct sockaddr_in *name_in; + + sock = get_socket(s); + if (!sock) { + return -1; + } + + /* check size, familiy and alignment of 'name' */ + LWIP_ERROR("lwip_bind: invalid address", ((namelen == sizeof(struct sockaddr_in)) && + ((name->sa_family) == AF_INET) && ((((mem_ptr_t)name) % 4) == 0)), + sock_set_errno(sock, err_to_errno(ERR_ARG)); return -1;); + name_in = (const struct sockaddr_in *)(void*)name; + + inet_addr_to_ipaddr(&local_addr, &name_in->sin_addr); + local_port = name_in->sin_port; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d, addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, &local_addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F")\n", ntohs(local_port))); + + err = netconn_bind(sock->conn, &local_addr, ntohs(local_port)); + + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) failed, err=%d\n", s, err)); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) succeeded\n", s)); + sock_set_errno(sock, 0); + return 0; +} + +int +lwip_close(int s) +{ + struct lwip_sock *sock; + int is_tcp = 0; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s)); + + sock = get_socket(s); + if (!sock) { + return -1; + } + + if(sock->conn != NULL) { + is_tcp = netconn_type(sock->conn) == NETCONN_TCP; + } else { + LWIP_ASSERT("sock->lastdata == NULL", sock->lastdata == NULL); + } + + netconn_delete(sock->conn); + + free_socket(sock, is_tcp); + set_errno(0); + return 0; +} + +int +lwip_connect(int s, const struct sockaddr *name, socklen_t namelen) +{ + struct lwip_sock *sock; + err_t err; + const struct sockaddr_in *name_in; + + sock = get_socket(s); + if (!sock) { + return -1; + } + + /* check size, familiy and alignment of 'name' */ + LWIP_ERROR("lwip_connect: invalid address", ((namelen == sizeof(struct sockaddr_in)) && + ((name->sa_family) == AF_INET) && ((((mem_ptr_t)name) % 4) == 0)), + sock_set_errno(sock, err_to_errno(ERR_ARG)); return -1;); + name_in = (const struct sockaddr_in *)(void*)name; + + if (name_in->sin_family == AF_UNSPEC) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s)); + err = netconn_disconnect(sock->conn); + } else { + ip_addr_t remote_addr; + u16_t remote_port; + + inet_addr_to_ipaddr(&remote_addr, &name_in->sin_addr); + remote_port = name_in->sin_port; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, &remote_addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F")\n", ntohs(remote_port))); + + err = netconn_connect(sock->conn, &remote_addr, ntohs(remote_port)); + } + + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err)); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s)); + sock_set_errno(sock, 0); + return 0; +} + +/** + * Set a socket into listen mode. + * The socket may not have been used for another connection previously. + * + * @param s the socket to set to listening mode + * @param backlog (ATTENTION: needs TCP_LISTEN_BACKLOG=1) + * @return 0 on success, non-zero on failure + */ +int +lwip_listen(int s, int backlog) +{ + struct lwip_sock *sock; + err_t err; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d, backlog=%d)\n", s, backlog)); + + sock = get_socket(s); + if (!sock) { + return -1; + } + + /* limit the "backlog" parameter to fit in an u8_t */ + backlog = LWIP_MIN(LWIP_MAX(backlog, 0), 0xff); + + err = netconn_listen_with_backlog(sock->conn, (u8_t)backlog); + + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d) failed, err=%d\n", s, err)); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + sock_set_errno(sock, 0); + return 0; +} + +int +lwip_recvfrom(int s, void *mem, size_t len, int flags, + struct sockaddr *from, socklen_t *fromlen) +{ + struct lwip_sock *sock; + void *buf = NULL; + struct pbuf *p; + u16_t buflen, copylen; + int off = 0; + ip_addr_t *addr; + u16_t port; + u8_t done = 0; + err_t err; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags)); + sock = get_socket(s); + if (!sock) { + return -1; + } + + do { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: top while sock->lastdata=%p\n", sock->lastdata)); + /* Check if there is data left from the last recv operation. */ + if (sock->lastdata) { + buf = sock->lastdata; + } else { + /* If this is non-blocking call, then check first */ + if (((flags & MSG_DONTWAIT) || netconn_is_nonblocking(sock->conn)) && + (sock->rcvevent <= 0)) { + if (off > 0) { + /* update receive window */ + netconn_recved(sock->conn, (u32_t)off); + /* already received data, return that */ + sock_set_errno(sock, 0); + return off; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): returning EWOULDBLOCK\n", s)); + sock_set_errno(sock, EWOULDBLOCK); + return -1; + } + + /* No data was left from the previous operation, so we try to get + some from the network. */ + if (netconn_type(sock->conn) == NETCONN_TCP) { + err = netconn_recv_tcp_pbuf(sock->conn, (struct pbuf **)&buf); + } else { + err = netconn_recv(sock->conn, (struct netbuf **)&buf); + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: netconn_recv err=%d, netbuf=%p\n", + err, buf)); + + if (err != ERR_OK) { + if (off > 0) { + /* update receive window */ + netconn_recved(sock->conn, (u32_t)off); + /* already received data, return that */ + sock_set_errno(sock, 0); + return off; + } + /* We should really do some error checking here. */ + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): buf == NULL, error is \"%s\"!\n", + s, lwip_strerr(err))); + sock_set_errno(sock, err_to_errno(err)); + if (err == ERR_CLSD) { + return 0; + } else { + return -1; + } + } + LWIP_ASSERT("buf != NULL", buf != NULL); + sock->lastdata = buf; + } + + if (netconn_type(sock->conn) == NETCONN_TCP) { + p = (struct pbuf *)buf; + } else { + p = ((struct netbuf *)buf)->p; + } + buflen = p->tot_len; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: buflen=%"U16_F" len=%"SZT_F" off=%d sock->lastoffset=%"U16_F"\n", + buflen, len, off, sock->lastoffset)); + + buflen -= sock->lastoffset; + + if (len > buflen) { + copylen = buflen; + } else { + copylen = (u16_t)len; + } + + /* copy the contents of the received buffer into + the supplied memory pointer mem */ + pbuf_copy_partial(p, (u8_t*)mem + off, copylen, sock->lastoffset); + + off += copylen; + + if (netconn_type(sock->conn) == NETCONN_TCP) { + LWIP_ASSERT("invalid copylen, len would underflow", len >= copylen); + len -= copylen; + if ( (len <= 0) || + (p->flags & PBUF_FLAG_PUSH) || + (sock->rcvevent <= 0) || + ((flags & MSG_PEEK)!=0)) { + done = 1; + } + } else { + done = 1; + } + + /* Check to see from where the data was.*/ + if (done) { + ip_addr_t fromaddr; + if (from && fromlen) { + struct sockaddr_in sin; + + if (netconn_type(sock->conn) == NETCONN_TCP) { + addr = &fromaddr; + netconn_getaddr(sock->conn, addr, &port, 0); + } else { + addr = netbuf_fromaddr((struct netbuf *)buf); + port = netbuf_fromport((struct netbuf *)buf); + } + + memset(&sin, 0, sizeof(sin)); + sin.sin_len = sizeof(sin); + sin.sin_family = AF_INET; + sin.sin_port = htons(port); + inet_addr_from_ipaddr(&sin.sin_addr, addr); + + if (*fromlen > sizeof(sin)) { + *fromlen = sizeof(sin); + } + + MEMCPY(from, &sin, *fromlen); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, off)); + } else { +#if SOCKETS_DEBUG + if (netconn_type(sock->conn) == NETCONN_TCP) { + addr = &fromaddr; + netconn_getaddr(sock->conn, addr, &port, 0); + } else { + addr = netbuf_fromaddr((struct netbuf *)buf); + port = netbuf_fromport((struct netbuf *)buf); + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, off)); +#endif /* SOCKETS_DEBUG */ + } + } + + /* If we don't peek the incoming message... */ + if ((flags & MSG_PEEK) == 0) { + /* If this is a TCP socket, check if there is data left in the + buffer. If so, it should be saved in the sock structure for next + time around. */ + if ((netconn_type(sock->conn) == NETCONN_TCP) && (buflen - copylen > 0)) { + sock->lastdata = buf; + sock->lastoffset += copylen; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: lastdata now netbuf=%p\n", buf)); + } else { + sock->lastdata = NULL; + sock->lastoffset = 0; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: deleting netbuf=%p\n", buf)); + if (netconn_type(sock->conn) == NETCONN_TCP) { + pbuf_free((struct pbuf *)buf); + } else { + netbuf_delete((struct netbuf *)buf); + } + } + } + } while (!done); + + if (off > 0) { + /* update receive window */ + netconn_recved(sock->conn, (u32_t)off); + } + sock_set_errno(sock, 0); + return off; +} + +int +lwip_read(int s, void *mem, size_t len) +{ + return lwip_recvfrom(s, mem, len, 0, NULL, NULL); +} + +int +lwip_recv(int s, void *mem, size_t len, int flags) +{ + return lwip_recvfrom(s, mem, len, flags, NULL, NULL); +} + +int +lwip_send(int s, const void *data, size_t size, int flags) +{ + struct lwip_sock *sock; + err_t err; + u8_t write_flags; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n", + s, data, size, flags)); + + sock = get_socket(s); + if (!sock) { + return -1; + } + + if (sock->conn->type != NETCONN_TCP) { +#if (LWIP_UDP || LWIP_RAW) + return lwip_sendto(s, data, size, flags, NULL, 0); +#else /* (LWIP_UDP || LWIP_RAW) */ + sock_set_errno(sock, err_to_errno(ERR_ARG)); + return -1; +#endif /* (LWIP_UDP || LWIP_RAW) */ + } + + if ((flags & MSG_DONTWAIT) || netconn_is_nonblocking(sock->conn)) { + if ((size > TCP_SND_BUF) || ((size / TCP_MSS) > TCP_SND_QUEUELEN)) { + /* too much data to ever send nonblocking! */ + sock_set_errno(sock, EMSGSIZE); + return -1; + } + } + + write_flags = NETCONN_COPY | + ((flags & MSG_MORE) ? NETCONN_MORE : 0) | + ((flags & MSG_DONTWAIT) ? NETCONN_DONTBLOCK : 0); + err = netconn_write(sock->conn, data, size, write_flags); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d size=%"SZT_F"\n", s, err, size)); + sock_set_errno(sock, err_to_errno(err)); + return (err == ERR_OK ? (int)size : -1); +} + +int +lwip_sendto(int s, const void *data, size_t size, int flags, + const struct sockaddr *to, socklen_t tolen) +{ + struct lwip_sock *sock; + err_t err; + u16_t short_size; + const struct sockaddr_in *to_in; + u16_t remote_port; +#if !LWIP_TCPIP_CORE_LOCKING + struct netbuf buf; +#endif + + sock = get_socket(s); + if (!sock) { + return -1; + } + + if (sock->conn->type == NETCONN_TCP) { +#if LWIP_TCP + return lwip_send(s, data, size, flags); +#else /* LWIP_TCP */ + LWIP_UNUSED_ARG(flags); + sock_set_errno(sock, err_to_errno(ERR_ARG)); + return -1; +#endif /* LWIP_TCP */ + } + + /* @todo: split into multiple sendto's? */ + LWIP_ASSERT("lwip_sendto: size must fit in u16_t", size <= 0xffff); + short_size = (u16_t)size; + LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) || + ((tolen == sizeof(struct sockaddr_in)) && + ((to->sa_family) == AF_INET) && ((((mem_ptr_t)to) % 4) == 0))), + sock_set_errno(sock, err_to_errno(ERR_ARG)); return -1;); + to_in = (const struct sockaddr_in *)(void*)to; + +#if LWIP_TCPIP_CORE_LOCKING + /* Should only be consider like a sample or a simple way to experiment this option (no check of "to" field...) */ + { + struct pbuf* p; + ip_addr_t *remote_addr; + +#if LWIP_NETIF_TX_SINGLE_PBUF + p = pbuf_alloc(PBUF_TRANSPORT, short_size, PBUF_RAM); + if (p != NULL) { +#if LWIP_CHECKSUM_ON_COPY + u16_t chksum = 0; + if (sock->conn->type != NETCONN_RAW) { + chksum = LWIP_CHKSUM_COPY(p->payload, data, short_size); + } else +#endif /* LWIP_CHECKSUM_ON_COPY */ + MEMCPY(p->payload, data, size); +#else /* LWIP_NETIF_TX_SINGLE_PBUF */ + p = pbuf_alloc(PBUF_TRANSPORT, short_size, PBUF_REF); + if (p != NULL) { + p->payload = (void*)data; +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + + if (to_in != NULL) { + inet_addr_to_ipaddr_p(remote_addr, &to_in->sin_addr); + remote_port = ntohs(to_in->sin_port); + } else { + remote_addr = IP_ADDR_ANY; + remote_port = 0; + } + + LOCK_TCPIP_CORE(); + if (sock->conn->type == NETCONN_RAW) { + err = sock->conn->last_err = raw_sendto(sock->conn->pcb.raw, p, remote_addr); + } else { +#if LWIP_UDP +#if LWIP_CHECKSUM_ON_COPY && LWIP_NETIF_TX_SINGLE_PBUF + err = sock->conn->last_err = udp_sendto_chksum(sock->conn->pcb.udp, p, + remote_addr, remote_port, 1, chksum); +#else /* LWIP_CHECKSUM_ON_COPY && LWIP_NETIF_TX_SINGLE_PBUF */ + err = sock->conn->last_err = udp_sendto(sock->conn->pcb.udp, p, + remote_addr, remote_port); +#endif /* LWIP_CHECKSUM_ON_COPY && LWIP_NETIF_TX_SINGLE_PBUF */ +#else /* LWIP_UDP */ + err = ERR_ARG; +#endif /* LWIP_UDP */ + } + UNLOCK_TCPIP_CORE(); + + pbuf_free(p); + } else { + err = ERR_MEM; + } + } +#else /* LWIP_TCPIP_CORE_LOCKING */ + /* initialize a buffer */ + buf.p = buf.ptr = NULL; +#if LWIP_CHECKSUM_ON_COPY + buf.flags = 0; +#endif /* LWIP_CHECKSUM_ON_COPY */ + if (to) { + inet_addr_to_ipaddr(&buf.addr, &to_in->sin_addr); + remote_port = ntohs(to_in->sin_port); + netbuf_fromport(&buf) = remote_port; + } else { + remote_port = 0; + ip_addr_set_any(&buf.addr); + netbuf_fromport(&buf) = 0; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_sendto(%d, data=%p, short_size=%d"U16_F", flags=0x%x to=", + s, data, short_size, flags)); + ip_addr_debug_print(SOCKETS_DEBUG, &buf.addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F"\n", remote_port)); + + /* make the buffer point to the data that should be sent */ +#if LWIP_NETIF_TX_SINGLE_PBUF + /* Allocate a new netbuf and copy the data into it. */ + if (netbuf_alloc(&buf, short_size) == NULL) { + err = ERR_MEM; + } else { +#if LWIP_CHECKSUM_ON_COPY + if (sock->conn->type != NETCONN_RAW) { + u16_t chksum = LWIP_CHKSUM_COPY(buf.p->payload, data, short_size); + netbuf_set_chksum(&buf, chksum); + err = ERR_OK; + } else +#endif /* LWIP_CHECKSUM_ON_COPY */ + { + err = netbuf_take(&buf, data, short_size); + } + } +#else /* LWIP_NETIF_TX_SINGLE_PBUF */ + err = netbuf_ref(&buf, data, short_size); +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + if (err == ERR_OK) { + /* send the data */ + err = netconn_send(sock->conn, &buf); + } + + /* deallocated the buffer */ + netbuf_free(&buf); +#endif /* LWIP_TCPIP_CORE_LOCKING */ + sock_set_errno(sock, err_to_errno(err)); + return (err == ERR_OK ? short_size : -1); +} + +int +lwip_socket(int domain, int type, int protocol) +{ + struct netconn *conn; + int i; + + LWIP_UNUSED_ARG(domain); + + /* create a netconn */ + switch (type) { + case SOCK_RAW: + conn = netconn_new_with_proto_and_callback(NETCONN_RAW, (u8_t)protocol, event_callback); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ", + domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); + break; + case SOCK_DGRAM: + conn = netconn_new_with_callback( (protocol == IPPROTO_UDPLITE) ? + NETCONN_UDPLITE : NETCONN_UDP, event_callback); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_DGRAM, %d) = ", + domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); + break; + case SOCK_STREAM: + conn = netconn_new_with_callback(NETCONN_TCP, event_callback); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ", + domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); + if (conn != NULL) { + /* Prevent automatic window updates, we do this on our own! */ + netconn_set_noautorecved(conn, 1); + } + break; + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n", + domain, type, protocol)); + set_errno(EINVAL); + return -1; + } + + if (!conn) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n")); + set_errno(ENOBUFS); + return -1; + } + + i = alloc_socket(conn, 0); + + if (i == -1) { + netconn_delete(conn); + set_errno(ENFILE); + return -1; + } + conn->socket = i; + LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i)); + set_errno(0); + return i; +} + +int +lwip_write(int s, const void *data, size_t size) +{ + return lwip_send(s, data, size, 0); +} + +/** + * Go through the readset and writeset lists and see which socket of the sockets + * set in the sets has events. On return, readset, writeset and exceptset have + * the sockets enabled that had events. + * + * exceptset is not used for now!!! + * + * @param maxfdp1 the highest socket index in the sets + * @param readset_in: set of sockets to check for read events + * @param writeset_in: set of sockets to check for write events + * @param exceptset_in: set of sockets to check for error events + * @param readset_out: set of sockets that had read events + * @param writeset_out: set of sockets that had write events + * @param exceptset_out: set os sockets that had error events + * @return number of sockets that had events (read/write/exception) (>= 0) + */ +static int +lwip_selscan(int maxfdp1, fd_set *readset_in, fd_set *writeset_in, fd_set *exceptset_in, + fd_set *readset_out, fd_set *writeset_out, fd_set *exceptset_out) +{ + int i, nready = 0; + fd_set lreadset, lwriteset, lexceptset; + struct lwip_sock *sock; + SYS_ARCH_DECL_PROTECT(lev); + + FD_ZERO(&lreadset); + FD_ZERO(&lwriteset); + FD_ZERO(&lexceptset); + + /* Go through each socket in each list to count number of sockets which + currently match */ + for(i = 0; i < maxfdp1; i++) { + void* lastdata = NULL; + s16_t rcvevent = 0; + u16_t sendevent = 0; + u16_t errevent = 0; + /* First get the socket's status (protected)... */ + SYS_ARCH_PROTECT(lev); + sock = tryget_socket(i); + if (sock != NULL) { + lastdata = sock->lastdata; + rcvevent = sock->rcvevent; + sendevent = sock->sendevent; + errevent = sock->errevent; + } + SYS_ARCH_UNPROTECT(lev); + /* ... then examine it: */ + /* See if netconn of this socket is ready for read */ + if (readset_in && FD_ISSET(i, readset_in) && ((lastdata != NULL) || (rcvevent > 0))) { + FD_SET(i, &lreadset); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for reading\n", i)); + nready++; + } + /* See if netconn of this socket is ready for write */ + if (writeset_in && FD_ISSET(i, writeset_in) && (sendevent != 0)) { + FD_SET(i, &lwriteset); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for writing\n", i)); + nready++; + } + /* See if netconn of this socket had an error */ + if (exceptset_in && FD_ISSET(i, exceptset_in) && (errevent != 0)) { + FD_SET(i, &lexceptset); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for exception\n", i)); + nready++; + } + } + /* copy local sets to the ones provided as arguments */ + *readset_out = lreadset; + *writeset_out = lwriteset; + *exceptset_out = lexceptset; + + LWIP_ASSERT("nready >= 0", nready >= 0); + return nready; +} + +/** + * Processing exceptset is not yet implemented. + */ +int +lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, + struct timeval *timeout) +{ + u32_t waitres = 0; + int nready; + fd_set lreadset, lwriteset, lexceptset; + u32_t msectimeout; + struct lwip_select_cb select_cb; + err_t err; + int i; + SYS_ARCH_DECL_PROTECT(lev); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select(%d, %p, %p, %p, tvsec=%"S32_F" tvusec=%"S32_F")\n", + maxfdp1, (void *)readset, (void *) writeset, (void *) exceptset, + timeout ? (s32_t)timeout->tv_sec : (s32_t)-1, + timeout ? (s32_t)timeout->tv_usec : (s32_t)-1)); + + /* Go through each socket in each list to count number of sockets which + currently match */ + nready = lwip_selscan(maxfdp1, readset, writeset, exceptset, &lreadset, &lwriteset, &lexceptset); + + /* If we don't have any current events, then suspend if we are supposed to */ + if (!nready) { + if (timeout && timeout->tv_sec == 0 && timeout->tv_usec == 0) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: no timeout, returning 0\n")); + /* This is OK as the local fdsets are empty and nready is zero, + or we would have returned earlier. */ + goto return_copy_fdsets; + } + + /* None ready: add our semaphore to list: + We don't actually need any dynamic memory. Our entry on the + list is only valid while we are in this function, so it's ok + to use local variables. */ + + select_cb.next = NULL; + select_cb.prev = NULL; + select_cb.readset = readset; + select_cb.writeset = writeset; + select_cb.exceptset = exceptset; + select_cb.sem_signalled = 0; + err = sys_sem_new(&select_cb.sem, 0); + if (err != ERR_OK) { + /* failed to create semaphore */ + set_errno(ENOMEM); + return -1; + } + + /* Protect the select_cb_list */ + SYS_ARCH_PROTECT(lev); + + /* Put this select_cb on top of list */ + select_cb.next = select_cb_list; + if (select_cb_list != NULL) { + select_cb_list->prev = &select_cb; + } + select_cb_list = &select_cb; + /* Increasing this counter tells even_callback that the list has changed. */ + select_cb_ctr++; + + /* Now we can safely unprotect */ + SYS_ARCH_UNPROTECT(lev); + + /* Increase select_waiting for each socket we are interested in */ + for(i = 0; i < maxfdp1; i++) { + if ((readset && FD_ISSET(i, readset)) || + (writeset && FD_ISSET(i, writeset)) || + (exceptset && FD_ISSET(i, exceptset))) { + struct lwip_sock *sock = tryget_socket(i); + LWIP_ASSERT("sock != NULL", sock != NULL); + SYS_ARCH_PROTECT(lev); + sock->select_waiting++; + LWIP_ASSERT("sock->select_waiting > 0", sock->select_waiting > 0); + SYS_ARCH_UNPROTECT(lev); + } + } + + /* Call lwip_selscan again: there could have been events between + the last scan (whithout us on the list) and putting us on the list! */ + nready = lwip_selscan(maxfdp1, readset, writeset, exceptset, &lreadset, &lwriteset, &lexceptset); + if (!nready) { + /* Still none ready, just wait to be woken */ + if (timeout == 0) { + /* Wait forever */ + msectimeout = 0; + } else { + msectimeout = ((timeout->tv_sec * 1000) + ((timeout->tv_usec + 500)/1000)); + if (msectimeout == 0) { + /* Wait 1ms at least (0 means wait forever) */ + msectimeout = 1; + } + } + + waitres = sys_arch_sem_wait(&select_cb.sem, msectimeout); + } + /* Increase select_waiting for each socket we are interested in */ + for(i = 0; i < maxfdp1; i++) { + if ((readset && FD_ISSET(i, readset)) || + (writeset && FD_ISSET(i, writeset)) || + (exceptset && FD_ISSET(i, exceptset))) { + struct lwip_sock *sock = tryget_socket(i); + LWIP_ASSERT("sock != NULL", sock != NULL); + SYS_ARCH_PROTECT(lev); + sock->select_waiting--; + LWIP_ASSERT("sock->select_waiting >= 0", sock->select_waiting >= 0); + SYS_ARCH_UNPROTECT(lev); + } + } + /* Take us off the list */ + SYS_ARCH_PROTECT(lev); + if (select_cb.next != NULL) { + select_cb.next->prev = select_cb.prev; + } + if (select_cb_list == &select_cb) { + LWIP_ASSERT("select_cb.prev == NULL", select_cb.prev == NULL); + select_cb_list = select_cb.next; + } else { + LWIP_ASSERT("select_cb.prev != NULL", select_cb.prev != NULL); + select_cb.prev->next = select_cb.next; + } + /* Increasing this counter tells even_callback that the list has changed. */ + select_cb_ctr++; + SYS_ARCH_UNPROTECT(lev); + + sys_sem_free(&select_cb.sem); + if (waitres == SYS_ARCH_TIMEOUT) { + /* Timeout */ + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: timeout expired\n")); + /* This is OK as the local fdsets are empty and nready is zero, + or we would have returned earlier. */ + goto return_copy_fdsets; + } + + /* See what's set */ + nready = lwip_selscan(maxfdp1, readset, writeset, exceptset, &lreadset, &lwriteset, &lexceptset); + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: nready=%d\n", nready)); +return_copy_fdsets: + set_errno(0); + if (readset) { + *readset = lreadset; + } + if (writeset) { + *writeset = lwriteset; + } + if (exceptset) { + *exceptset = lexceptset; + } + + + return nready; +} + +/** + * Callback registered in the netconn layer for each socket-netconn. + * Processes recvevent (data available) and wakes up tasks waiting for select. + */ +static void +event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len) +{ + int s; + struct lwip_sock *sock; + struct lwip_select_cb *scb; + int last_select_cb_ctr; + SYS_ARCH_DECL_PROTECT(lev); + + LWIP_UNUSED_ARG(len); + + /* Get socket */ + if (conn) { + s = conn->socket; + if (s < 0) { + /* Data comes in right away after an accept, even though + * the server task might not have created a new socket yet. + * Just count down (or up) if that's the case and we + * will use the data later. Note that only receive events + * can happen before the new socket is set up. */ + SYS_ARCH_PROTECT(lev); + if (conn->socket < 0) { + if (evt == NETCONN_EVT_RCVPLUS) { + conn->socket--; + } + SYS_ARCH_UNPROTECT(lev); + return; + } + s = conn->socket; + SYS_ARCH_UNPROTECT(lev); + } + + sock = get_socket(s); + if (!sock) { + return; + } + } else { + return; + } + + SYS_ARCH_PROTECT(lev); + /* Set event as required */ + switch (evt) { + case NETCONN_EVT_RCVPLUS: + sock->rcvevent++; + break; + case NETCONN_EVT_RCVMINUS: + sock->rcvevent--; + break; + case NETCONN_EVT_SENDPLUS: + sock->sendevent = 1; + break; + case NETCONN_EVT_SENDMINUS: + sock->sendevent = 0; + break; + case NETCONN_EVT_ERROR: + sock->errevent = 1; + break; + default: + LWIP_ASSERT("unknown event", 0); + break; + } + + if (sock->select_waiting == 0) { + /* noone is waiting for this socket, no need to check select_cb_list */ + SYS_ARCH_UNPROTECT(lev); + return; + } + + /* Now decide if anyone is waiting for this socket */ + /* NOTE: This code goes through the select_cb_list list multiple times + ONLY IF a select was actually waiting. We go through the list the number + of waiting select calls + 1. This list is expected to be small. */ + + /* At this point, SYS_ARCH is still protected! */ +again: + for (scb = select_cb_list; scb != NULL; scb = scb->next) { + if (scb->sem_signalled == 0) { + /* semaphore not signalled yet */ + int do_signal = 0; + /* Test this select call for our socket */ + if (sock->rcvevent > 0) { + if (scb->readset && FD_ISSET(s, scb->readset)) { + do_signal = 1; + } + } + if (sock->sendevent != 0) { + if (!do_signal && scb->writeset && FD_ISSET(s, scb->writeset)) { + do_signal = 1; + } + } + if (sock->errevent != 0) { + if (!do_signal && scb->exceptset && FD_ISSET(s, scb->exceptset)) { + do_signal = 1; + } + } + if (do_signal) { + scb->sem_signalled = 1; + /* Don't call SYS_ARCH_UNPROTECT() before signaling the semaphore, as this might + lead to the select thread taking itself off the list, invalidagin the semaphore. */ + sys_sem_signal(&scb->sem); + } + } + /* unlock interrupts with each step */ + last_select_cb_ctr = select_cb_ctr; + SYS_ARCH_UNPROTECT(lev); + /* this makes sure interrupt protection time is short */ + SYS_ARCH_PROTECT(lev); + if (last_select_cb_ctr != select_cb_ctr) { + /* someone has changed select_cb_list, restart at the beginning */ + goto again; + } + } + SYS_ARCH_UNPROTECT(lev); +} + +/** + * Unimplemented: Close one end of a full-duplex connection. + * Currently, the full connection is closed. + */ +int +lwip_shutdown(int s, int how) +{ + struct lwip_sock *sock; + err_t err; + u8_t shut_rx = 0, shut_tx = 0; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_shutdown(%d, how=%d)\n", s, how)); + + sock = get_socket(s); + if (!sock) { + return -1; + } + + if (sock->conn != NULL) { + if (netconn_type(sock->conn) != NETCONN_TCP) { + sock_set_errno(sock, EOPNOTSUPP); + return EOPNOTSUPP; + } + } else { + sock_set_errno(sock, ENOTCONN); + return ENOTCONN; + } + + if (how == SHUT_RD) { + shut_rx = 1; + } else if (how == SHUT_WR) { + shut_tx = 1; + } else if(how == SHUT_RDWR) { + shut_rx = 1; + shut_tx = 1; + } else { + sock_set_errno(sock, EINVAL); + return EINVAL; + } + err = netconn_shutdown(sock->conn, shut_rx, shut_tx); + + sock_set_errno(sock, err_to_errno(err)); + return (err == ERR_OK ? 0 : -1); +} + +static int +lwip_getaddrname(int s, struct sockaddr *name, socklen_t *namelen, u8_t local) +{ + struct lwip_sock *sock; + struct sockaddr_in sin; + ip_addr_t naddr; + + sock = get_socket(s); + if (!sock) { + return -1; + } + + memset(&sin, 0, sizeof(sin)); + sin.sin_len = sizeof(sin); + sin.sin_family = AF_INET; + + /* get the IP address and port */ + netconn_getaddr(sock->conn, &naddr, &sin.sin_port, local); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getaddrname(%d, addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, &naddr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F")\n", sin.sin_port)); + + sin.sin_port = htons(sin.sin_port); + inet_addr_from_ipaddr(&sin.sin_addr, &naddr); + + if (*namelen > sizeof(sin)) { + *namelen = sizeof(sin); + } + + MEMCPY(name, &sin, *namelen); + sock_set_errno(sock, 0); + return 0; +} + +int +lwip_getpeername(int s, struct sockaddr *name, socklen_t *namelen) +{ + return lwip_getaddrname(s, name, namelen, 0); +} + +int +lwip_getsockname(int s, struct sockaddr *name, socklen_t *namelen) +{ + return lwip_getaddrname(s, name, namelen, 1); +} + +int +lwip_getsockopt(int s, int level, int optname, void *optval, socklen_t *optlen) +{ + err_t err = ERR_OK; + struct lwip_sock *sock = get_socket(s); + struct lwip_setgetsockopt_data data; + + if (!sock) { + return -1; + } + + if ((NULL == optval) || (NULL == optlen)) { + sock_set_errno(sock, EFAULT); + return -1; + } + + /* Do length and type checks for the various options first, to keep it readable. */ + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + case SO_ACCEPTCONN: + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_ERROR: + case SO_KEEPALIVE: + /* UNIMPL case SO_CONTIMEO: */ + /* UNIMPL case SO_SNDTIMEO: */ +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: +#endif /* LWIP_SO_RCVBUF */ + /* UNIMPL case SO_OOBINLINE: */ + /* UNIMPL case SO_SNDBUF: */ + /* UNIMPL case SO_RCVLOWAT: */ + /* UNIMPL case SO_SNDLOWAT: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + case SO_TYPE: + /* UNIMPL case SO_USELOOPBACK: */ + if (*optlen < sizeof(int)) { + err = EINVAL; + } + break; + + case SO_NO_CHECK: + if (*optlen < sizeof(int)) { + err = EINVAL; + } +#if LWIP_UDP + if ((sock->conn->type != NETCONN_UDP) || + ((udp_flags(sock->conn->pcb.udp) & UDP_FLAGS_UDPLITE) != 0)) { + /* this flag is only available for UDP, not for UDP lite */ + err = EAFNOSUPPORT; + } +#endif /* LWIP_UDP */ + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + /* UNIMPL case IP_HDRINCL: */ + /* UNIMPL case IP_RCVDSTADDR: */ + /* UNIMPL case IP_RCVIF: */ + case IP_TTL: + case IP_TOS: + if (*optlen < sizeof(int)) { + err = EINVAL; + } + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + if (*optlen < sizeof(u8_t)) { + err = EINVAL; + } + break; + case IP_MULTICAST_IF: + if (*optlen < sizeof(struct in_addr)) { + err = EINVAL; + } + break; + case IP_MULTICAST_LOOP: + if (*optlen < sizeof(u8_t)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; +#endif /* LWIP_IGMP */ + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + if (*optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no TCP socket, ignore any options. */ + if (sock->conn->type != NETCONN_TCP) + return 0; + + switch (optname) { + case TCP_NODELAY: + case TCP_KEEPALIVE: +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + case TCP_KEEPINTVL: + case TCP_KEEPCNT: +#endif /* LWIP_TCP_KEEPALIVE */ + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_TCP */ +#if LWIP_UDP && LWIP_UDPLITE +/* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + if (*optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no UDP lite socket, ignore any options. */ + if (sock->conn->type != NETCONN_UDPLITE) { + return 0; + } + + switch (optname) { + case UDPLITE_SEND_CSCOV: + case UDPLITE_RECV_CSCOV: + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_UDPLITE, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP && LWIP_UDPLITE*/ +/* UNDEFINED LEVEL */ + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", + s, level, optname)); + err = ENOPROTOOPT; + } /* switch */ + + + if (err != ERR_OK) { + sock_set_errno(sock, err); + return -1; + } + + /* Now do the actual option processing */ + data.sock = sock; +#ifdef LWIP_DEBUG + data.s = s; +#endif /* LWIP_DEBUG */ + data.level = level; + data.optname = optname; + data.optval = optval; + data.optlen = optlen; + data.err = err; + tcpip_callback(lwip_getsockopt_internal, &data); + sys_arch_sem_wait(&sock->conn->op_completed, 0); + /* maybe lwip_getsockopt_internal has changed err */ + err = data.err; + + sock_set_errno(sock, err); + return err ? -1 : 0; +} + +static void +lwip_getsockopt_internal(void *arg) +{ + struct lwip_sock *sock; +#ifdef LWIP_DEBUG + int s; +#endif /* LWIP_DEBUG */ + int level, optname; + void *optval; + struct lwip_setgetsockopt_data *data; + + LWIP_ASSERT("arg != NULL", arg != NULL); + + data = (struct lwip_setgetsockopt_data*)arg; + sock = data->sock; +#ifdef LWIP_DEBUG + s = data->s; +#endif /* LWIP_DEBUG */ + level = data->level; + optname = data->optname; + optval = data->optval; + + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + /* The option flags */ + case SO_ACCEPTCONN: + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_KEEPALIVE: + /* UNIMPL case SO_OOBINCLUDE: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + /*case SO_USELOOPBACK: UNIMPL */ + *(int*)optval = sock->conn->pcb.ip->so_options & optname; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, optname=0x%x, ..) = %s\n", + s, optname, (*(int*)optval?"on":"off"))); + break; + + case SO_TYPE: + switch (NETCONNTYPE_GROUP(sock->conn->type)) { + case NETCONN_RAW: + *(int*)optval = SOCK_RAW; + break; + case NETCONN_TCP: + *(int*)optval = SOCK_STREAM; + break; + case NETCONN_UDP: + *(int*)optval = SOCK_DGRAM; + break; + default: /* unrecognized socket type */ + *(int*)optval = sock->conn->type; + LWIP_DEBUGF(SOCKETS_DEBUG, + ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE): unrecognized socket type %d\n", + s, *(int *)optval)); + } /* switch (sock->conn->type) */ + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE) = %d\n", + s, *(int *)optval)); + break; + + case SO_ERROR: + /* only overwrite ERR_OK or tempoary errors */ + if ((sock->err == 0) || (sock->err == EINPROGRESS)) { + sock_set_errno(sock, err_to_errno(sock->conn->last_err)); + } + *(int *)optval = sock->err; + sock->err = 0; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_ERROR) = %d\n", + s, *(int *)optval)); + break; + +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: + *(int *)optval = netconn_get_recvtimeout(sock->conn); + break; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: + *(int *)optval = netconn_get_recvbufsize(sock->conn); + break; +#endif /* LWIP_SO_RCVBUF */ +#if LWIP_UDP + case SO_NO_CHECK: + *(int*)optval = (udp_flags(sock->conn->pcb.udp) & UDP_FLAGS_NOCHKSUM) ? 1 : 0; + break; +#endif /* LWIP_UDP*/ + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + case IP_TTL: + *(int*)optval = sock->conn->pcb.ip->ttl; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TTL) = %d\n", + s, *(int *)optval)); + break; + case IP_TOS: + *(int*)optval = sock->conn->pcb.ip->tos; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TOS) = %d\n", + s, *(int *)optval)); + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + *(u8_t*)optval = sock->conn->pcb.ip->ttl; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_MULTICAST_TTL) = %d\n", + s, *(int *)optval)); + break; + case IP_MULTICAST_IF: + inet_addr_from_ipaddr((struct in_addr*)optval, &sock->conn->pcb.udp->multicast_ip); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_MULTICAST_IF) = 0x%"X32_F"\n", + s, *(u32_t *)optval)); + break; + case IP_MULTICAST_LOOP: + if ((sock->conn->pcb.udp->flags & UDP_FLAGS_MULTICAST_LOOP) != 0) { + *(u8_t*)optval = 1; + } else { + *(u8_t*)optval = 0; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_MULTICAST_LOOP) = %d\n", + s, *(int *)optval)); + break; +#endif /* LWIP_IGMP */ + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + switch (optname) { + case TCP_NODELAY: + *(int*)optval = tcp_nagle_disabled(sock->conn->pcb.tcp); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, TCP_NODELAY) = %s\n", + s, (*(int*)optval)?"on":"off") ); + break; + case TCP_KEEPALIVE: + *(int*)optval = (int)sock->conn->pcb.tcp->keep_idle; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPALIVE) = %d\n", + s, *(int *)optval)); + break; + +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + *(int*)optval = (int)(sock->conn->pcb.tcp->keep_idle/1000); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPIDLE) = %d\n", + s, *(int *)optval)); + break; + case TCP_KEEPINTVL: + *(int*)optval = (int)(sock->conn->pcb.tcp->keep_intvl/1000); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPINTVL) = %d\n", + s, *(int *)optval)); + break; + case TCP_KEEPCNT: + *(int*)optval = (int)sock->conn->pcb.tcp->keep_cnt; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPCNT) = %d\n", + s, *(int *)optval)); + break; +#endif /* LWIP_TCP_KEEPALIVE */ + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; +#endif /* LWIP_TCP */ +#if LWIP_UDP && LWIP_UDPLITE + /* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + switch (optname) { + case UDPLITE_SEND_CSCOV: + *(int*)optval = sock->conn->pcb.udp->chksum_len_tx; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_UDPLITE, UDPLITE_SEND_CSCOV) = %d\n", + s, (*(int*)optval)) ); + break; + case UDPLITE_RECV_CSCOV: + *(int*)optval = sock->conn->pcb.udp->chksum_len_rx; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_UDPLITE, UDPLITE_RECV_CSCOV) = %d\n", + s, (*(int*)optval)) ); + break; + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP */ + default: + LWIP_ASSERT("unhandled level", 0); + break; + } /* switch (level) */ + sys_sem_signal(&sock->conn->op_completed); +} + +int +lwip_setsockopt(int s, int level, int optname, const void *optval, socklen_t optlen) +{ + struct lwip_sock *sock = get_socket(s); + err_t err = ERR_OK; + struct lwip_setgetsockopt_data data; + + if (!sock) { + return -1; + } + + if (NULL == optval) { + sock_set_errno(sock, EFAULT); + return -1; + } + + /* Do length and type checks for the various options first, to keep it readable. */ + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_KEEPALIVE: + /* UNIMPL case case SO_CONTIMEO: */ + /* UNIMPL case case SO_SNDTIMEO: */ +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: +#endif /* LWIP_SO_RCVBUF */ + /* UNIMPL case SO_OOBINLINE: */ + /* UNIMPL case SO_SNDBUF: */ + /* UNIMPL case SO_RCVLOWAT: */ + /* UNIMPL case SO_SNDLOWAT: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + /* UNIMPL case SO_USELOOPBACK: */ + if (optlen < sizeof(int)) { + err = EINVAL; + } + break; + case SO_NO_CHECK: + if (optlen < sizeof(int)) { + err = EINVAL; + } +#if LWIP_UDP + if ((sock->conn->type != NETCONN_UDP) || + ((udp_flags(sock->conn->pcb.udp) & UDP_FLAGS_UDPLITE) != 0)) { + /* this flag is only available for UDP, not for UDP lite */ + err = EAFNOSUPPORT; + } +#endif /* LWIP_UDP */ + break; + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + /* UNIMPL case IP_HDRINCL: */ + /* UNIMPL case IP_RCVDSTADDR: */ + /* UNIMPL case IP_RCVIF: */ + case IP_TTL: + case IP_TOS: + if (optlen < sizeof(int)) { + err = EINVAL; + } + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + if (optlen < sizeof(u8_t)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; + case IP_MULTICAST_IF: + if (optlen < sizeof(struct in_addr)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; + case IP_MULTICAST_LOOP: + if (optlen < sizeof(u8_t)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; + case IP_ADD_MEMBERSHIP: + case IP_DROP_MEMBERSHIP: + if (optlen < sizeof(struct ip_mreq)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; +#endif /* LWIP_IGMP */ + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + if (optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no TCP socket, ignore any options. */ + if (sock->conn->type != NETCONN_TCP) + return 0; + + switch (optname) { + case TCP_NODELAY: + case TCP_KEEPALIVE: +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + case TCP_KEEPINTVL: + case TCP_KEEPCNT: +#endif /* LWIP_TCP_KEEPALIVE */ + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_TCP */ +#if LWIP_UDP && LWIP_UDPLITE +/* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + if (optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no UDP lite socket, ignore any options. */ + if (sock->conn->type != NETCONN_UDPLITE) + return 0; + + switch (optname) { + case UDPLITE_SEND_CSCOV: + case UDPLITE_RECV_CSCOV: + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_UDPLITE, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP && LWIP_UDPLITE */ +/* UNDEFINED LEVEL */ + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", + s, level, optname)); + err = ENOPROTOOPT; + } /* switch (level) */ + + + if (err != ERR_OK) { + sock_set_errno(sock, err); + return -1; + } + + + /* Now do the actual option processing */ + data.sock = sock; +#ifdef LWIP_DEBUG + data.s = s; +#endif /* LWIP_DEBUG */ + data.level = level; + data.optname = optname; + data.optval = (void*)optval; + data.optlen = &optlen; + data.err = err; + tcpip_callback(lwip_setsockopt_internal, &data); + sys_arch_sem_wait(&sock->conn->op_completed, 0); + /* maybe lwip_setsockopt_internal has changed err */ + err = data.err; + + sock_set_errno(sock, err); + return err ? -1 : 0; +} + +static void +lwip_setsockopt_internal(void *arg) +{ + struct lwip_sock *sock; +#ifdef LWIP_DEBUG + int s; +#endif /* LWIP_DEBUG */ + int level, optname; + const void *optval; + struct lwip_setgetsockopt_data *data; + + LWIP_ASSERT("arg != NULL", arg != NULL); + + data = (struct lwip_setgetsockopt_data*)arg; + sock = data->sock; +#ifdef LWIP_DEBUG + s = data->s; +#endif /* LWIP_DEBUG */ + level = data->level; + optname = data->optname; + optval = data->optval; + + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + /* The option flags */ + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_KEEPALIVE: + /* UNIMPL case SO_OOBINCLUDE: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + /* UNIMPL case SO_USELOOPBACK: */ + if (*(int*)optval) { + sock->conn->pcb.ip->so_options |= optname; + } else { + sock->conn->pcb.ip->so_options &= ~optname; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, optname=0x%x, ..) -> %s\n", + s, optname, (*(int*)optval?"on":"off"))); + break; +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: + netconn_set_recvtimeout(sock->conn, *(int*)optval); + break; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: + netconn_set_recvbufsize(sock->conn, *(int*)optval); + break; +#endif /* LWIP_SO_RCVBUF */ +#if LWIP_UDP + case SO_NO_CHECK: + if (*(int*)optval) { + udp_setflags(sock->conn->pcb.udp, udp_flags(sock->conn->pcb.udp) | UDP_FLAGS_NOCHKSUM); + } else { + udp_setflags(sock->conn->pcb.udp, udp_flags(sock->conn->pcb.udp) & ~UDP_FLAGS_NOCHKSUM); + } + break; +#endif /* LWIP_UDP */ + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + case IP_TTL: + sock->conn->pcb.ip->ttl = (u8_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TTL, ..) -> %d\n", + s, sock->conn->pcb.ip->ttl)); + break; + case IP_TOS: + sock->conn->pcb.ip->tos = (u8_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TOS, ..)-> %d\n", + s, sock->conn->pcb.ip->tos)); + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + sock->conn->pcb.udp->ttl = (u8_t)(*(u8_t*)optval); + break; + case IP_MULTICAST_IF: + inet_addr_to_ipaddr(&sock->conn->pcb.udp->multicast_ip, (struct in_addr*)optval); + break; + case IP_MULTICAST_LOOP: + if (*(u8_t*)optval) { + udp_setflags(sock->conn->pcb.udp, udp_flags(sock->conn->pcb.udp) | UDP_FLAGS_MULTICAST_LOOP); + } else { + udp_setflags(sock->conn->pcb.udp, udp_flags(sock->conn->pcb.udp) & ~UDP_FLAGS_MULTICAST_LOOP); + } + break; + case IP_ADD_MEMBERSHIP: + case IP_DROP_MEMBERSHIP: + { + /* If this is a TCP or a RAW socket, ignore these options. */ + struct ip_mreq *imr = (struct ip_mreq *)optval; + ip_addr_t if_addr; + ip_addr_t multi_addr; + inet_addr_to_ipaddr(&if_addr, &imr->imr_interface); + inet_addr_to_ipaddr(&multi_addr, &imr->imr_multiaddr); + if(optname == IP_ADD_MEMBERSHIP){ + data->err = igmp_joingroup(&if_addr, &multi_addr); + } else { + data->err = igmp_leavegroup(&if_addr, &multi_addr); + } + if(data->err != ERR_OK) { + data->err = EADDRNOTAVAIL; + } + } + break; +#endif /* LWIP_IGMP */ + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + switch (optname) { + case TCP_NODELAY: + if (*(int*)optval) { + tcp_nagle_disable(sock->conn->pcb.tcp); + } else { + tcp_nagle_enable(sock->conn->pcb.tcp); + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_NODELAY) -> %s\n", + s, (*(int *)optval)?"on":"off") ); + break; + case TCP_KEEPALIVE: + sock->conn->pcb.tcp->keep_idle = (u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPALIVE) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_idle)); + break; + +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + sock->conn->pcb.tcp->keep_idle = 1000*(u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPIDLE) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_idle)); + break; + case TCP_KEEPINTVL: + sock->conn->pcb.tcp->keep_intvl = 1000*(u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPINTVL) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_intvl)); + break; + case TCP_KEEPCNT: + sock->conn->pcb.tcp->keep_cnt = (u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPCNT) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_cnt)); + break; +#endif /* LWIP_TCP_KEEPALIVE */ + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; +#endif /* LWIP_TCP*/ +#if LWIP_UDP && LWIP_UDPLITE + /* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + switch (optname) { + case UDPLITE_SEND_CSCOV: + if ((*(int*)optval != 0) && ((*(int*)optval < 8)) || (*(int*)optval > 0xffff)) { + /* don't allow illegal values! */ + sock->conn->pcb.udp->chksum_len_tx = 8; + } else { + sock->conn->pcb.udp->chksum_len_tx = (u16_t)*(int*)optval; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_UDPLITE, UDPLITE_SEND_CSCOV) -> %d\n", + s, (*(int*)optval)) ); + break; + case UDPLITE_RECV_CSCOV: + if ((*(int*)optval != 0) && ((*(int*)optval < 8)) || (*(int*)optval > 0xffff)) { + /* don't allow illegal values! */ + sock->conn->pcb.udp->chksum_len_rx = 8; + } else { + sock->conn->pcb.udp->chksum_len_rx = (u16_t)*(int*)optval; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_UDPLITE, UDPLITE_RECV_CSCOV) -> %d\n", + s, (*(int*)optval)) ); + break; + default: + LWIP_ASSERT("unhandled optname", 0); + break; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP */ + default: + LWIP_ASSERT("unhandled level", 0); + break; + } /* switch (level) */ + sys_sem_signal(&sock->conn->op_completed); +} + +int +lwip_ioctl(int s, long cmd, void *argp) +{ + struct lwip_sock *sock = get_socket(s); + u8_t val; +#if LWIP_SO_RCVBUF + u16_t buflen = 0; + s16_t recv_avail; +#endif /* LWIP_SO_RCVBUF */ + + if (!sock) { + return -1; + } + + switch (cmd) { +#if LWIP_SO_RCVBUF + case FIONREAD: + if (!argp) { + sock_set_errno(sock, EINVAL); + return -1; + } + + SYS_ARCH_GET(sock->conn->recv_avail, recv_avail); + if (recv_avail < 0) { + recv_avail = 0; + } + *((u16_t*)argp) = (u16_t)recv_avail; + + /* Check if there is data left from the last recv operation. /maq 041215 */ + if (sock->lastdata) { + struct pbuf *p = (struct pbuf *)sock->lastdata; + if (netconn_type(sock->conn) != NETCONN_TCP) { + p = ((struct netbuf *)p)->p; + } + buflen = p->tot_len; + buflen -= sock->lastoffset; + + *((u16_t*)argp) += buflen; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t*)argp))); + sock_set_errno(sock, 0); + return 0; +#endif /* LWIP_SO_RCVBUF */ + + case FIONBIO: + val = 0; + if (argp && *(u32_t*)argp) { + val = 1; + } + netconn_set_nonblocking(sock->conn, val); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, val)); + sock_set_errno(sock, 0); + return 0; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp)); + sock_set_errno(sock, ENOSYS); /* not yet implemented */ + return -1; + } /* switch (cmd) */ +} + +/** A minimal implementation of fcntl. + * Currently only the commands F_GETFL and F_SETFL are implemented. + * Only the flag O_NONBLOCK is implemented. + */ +int +lwip_fcntl(int s, int cmd, int val) +{ + struct lwip_sock *sock = get_socket(s); + int ret = -1; + + if (!sock || !sock->conn) { + return -1; + } + + switch (cmd) { + case F_GETFL: + ret = netconn_is_nonblocking(sock->conn) ? O_NONBLOCK : 0; + break; + case F_SETFL: + if ((val & ~O_NONBLOCK) == 0) { + /* only O_NONBLOCK, all other bits are zero */ + netconn_set_nonblocking(sock->conn, val & O_NONBLOCK); + ret = 0; + } + break; + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_fcntl(%d, UNIMPL: %d, %d)\n", s, cmd, val)); + break; + } + return ret; +} + +#endif /* LWIP_SOCKET */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/api/tcpip.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/tcpip.c new file mode 100755 index 0000000..01a49d5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/api/tcpip.c @@ -0,0 +1,460 @@ +/** + * @file + * Sequential API Main thread module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if !NO_SYS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/memp.h" +#include "lwip/mem.h" +#include "lwip/pbuf.h" +#include "lwip/tcpip.h" +#include "lwip/init.h" +#include "netif/etharp.h" +#include "netif/ppp_oe.h" + +/* global variables */ +static tcpip_init_done_fn tcpip_init_done; +static void *tcpip_init_done_arg; +static sys_mbox_t mbox; + +#if LWIP_TCPIP_CORE_LOCKING +/** The global semaphore to lock the stack. */ +sys_mutex_t lock_tcpip_core; +#endif /* LWIP_TCPIP_CORE_LOCKING */ + + +/** + * The main lwIP thread. This thread has exclusive access to lwIP core functions + * (unless access to them is not locked). Other threads communicate with this + * thread using message boxes. + * + * It also starts all the timers to make sure they are running in the right + * thread context. + * + * @param arg unused argument + */ +static void +tcpip_thread(void *arg) +{ + struct tcpip_msg *msg; + LWIP_UNUSED_ARG(arg); + + if (tcpip_init_done != NULL) {//ûעԶʼ + tcpip_init_done(tcpip_init_done_arg); + } + + LOCK_TCPIP_CORE(); + while (1) { /* MAIN Loop */ + UNLOCK_TCPIP_CORE(); + LWIP_TCPIP_THREAD_ALIVE(); + /* wait for a message, timeouts are processed while waiting */ + sys_timeouts_mbox_fetch(&mbox, (void **)&msg); + LOCK_TCPIP_CORE(); + switch (msg->type) { +#if LWIP_NETCONN + case TCPIP_MSG_API://API + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: API message %p\n", (void *)msg)); + msg->msg.apimsg->function(&(msg->msg.apimsg->msg)); + break; +#endif /* LWIP_NETCONN */ + +#if !LWIP_TCPIP_CORE_LOCKING_INPUT + case TCPIP_MSG_INPKT://ײݰ + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg)); +#if LWIP_ETHERNET + if (msg->msg.inp.netif->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {//֧ARP + ethernet_input(msg->msg.inp.p, msg->msg.inp.netif);//ARP + } else +#endif /* LWIP_ETHERNET */ + { + ip_input(msg->msg.inp.p, msg->msg.inp.netif);//IP + } + memp_free(MEMP_TCPIP_MSG_INPKT, msg); + break; +#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */ + +#if LWIP_NETIF_API + case TCPIP_MSG_NETIFAPI: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: Netif API message %p\n", (void *)msg)); + msg->msg.netifapimsg->function(&(msg->msg.netifapimsg->msg)); + break; +#endif /* LWIP_NETIF_API */ + + case TCPIP_MSG_CALLBACK://ϲصʽִһ + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg)); + msg->msg.cb.function(msg->msg.cb.ctx); + memp_free(MEMP_TCPIP_MSG_API, msg); + break; + +#if LWIP_TCPIP_TIMEOUT + case TCPIP_MSG_TIMEOUT://ϲעһʱ¼ + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: TIMEOUT %p\n", (void *)msg)); + sys_timeout(msg->msg.tmo.msecs, msg->msg.tmo.h, msg->msg.tmo.arg); + memp_free(MEMP_TCPIP_MSG_API, msg); + break; + case TCPIP_MSG_UNTIMEOUT://ϲɾһʱ¼ + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: UNTIMEOUT %p\n", (void *)msg)); + sys_untimeout(msg->msg.tmo.h, msg->msg.tmo.arg); + memp_free(MEMP_TCPIP_MSG_API, msg); + break; +#endif /* LWIP_TCPIP_TIMEOUT */ + + default: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type)); + LWIP_ASSERT("tcpip_thread: invalid message", 0); + break; + } + } +} + +/** + * Pass a received packet to tcpip_thread for input processing + * + * @param p the received packet, p->payload pointing to the Ethernet header or + * to an IP header (if inp doesn't have NETIF_FLAG_ETHARP or + * NETIF_FLAG_ETHERNET flags) + * @param inp the network interface on which the packet was received + */ +err_t +tcpip_input(struct pbuf *p, struct netif *inp) +{ +#if LWIP_TCPIP_CORE_LOCKING_INPUT + err_t ret; + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_input: PACKET %p/%p\n", (void *)p, (void *)inp)); + LOCK_TCPIP_CORE(); +#if LWIP_ETHERNET + if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) { + ret = ethernet_input(p, inp); + } else +#endif /* LWIP_ETHERNET */ + { + ret = ip_input(p, inp); + } + UNLOCK_TCPIP_CORE(); + return ret; +#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */ + struct tcpip_msg *msg; + + if (sys_mbox_valid(&mbox)) { + msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_INPKT; + msg->msg.inp.p = p; + msg->msg.inp.netif = inp; + if (sys_mbox_trypost(&mbox, msg) != ERR_OK) { + memp_free(MEMP_TCPIP_MSG_INPKT, msg); + return ERR_MEM; + } + return ERR_OK; + } + return ERR_VAL; +#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */ +} + +/** + * Call a specific function in the thread context of + * tcpip_thread for easy access synchronization. + * A function called in that way may access lwIP core code + * without fearing concurrent access. + * + * @param f the function to call + * @param ctx parameter passed to f + * @param block 1 to block until the request is posted, 0 to non-blocking mode + * @return ERR_OK if the function was called, another err_t if not + */ +err_t +tcpip_callback_with_block(tcpip_callback_fn function, void *ctx, u8_t block) +{ + struct tcpip_msg *msg; + + if (sys_mbox_valid(&mbox)) { + msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_CALLBACK; + msg->msg.cb.function = function; + msg->msg.cb.ctx = ctx; + if (block) { + sys_mbox_post(&mbox, msg); + } else { + if (sys_mbox_trypost(&mbox, msg) != ERR_OK) { + memp_free(MEMP_TCPIP_MSG_API, msg); + return ERR_MEM; + } + } + return ERR_OK; + } + return ERR_VAL; +} + +#if LWIP_TCPIP_TIMEOUT +/** + * call sys_timeout in tcpip_thread + * + * @param msec time in milliseconds for timeout + * @param h function to be called on timeout + * @param arg argument to pass to timeout function h + * @return ERR_MEM on memory error, ERR_OK otherwise + */ +err_t +tcpip_timeout(u32_t msecs, sys_timeout_handler h, void *arg) +{ + struct tcpip_msg *msg; + + if (sys_mbox_valid(&mbox)) { + msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_TIMEOUT; + msg->msg.tmo.msecs = msecs; + msg->msg.tmo.h = h; + msg->msg.tmo.arg = arg; + sys_mbox_post(&mbox, msg); + return ERR_OK; + } + return ERR_VAL; +} + +/** + * call sys_untimeout in tcpip_thread + * + * @param msec time in milliseconds for timeout + * @param h function to be called on timeout + * @param arg argument to pass to timeout function h + * @return ERR_MEM on memory error, ERR_OK otherwise + */ +err_t +tcpip_untimeout(sys_timeout_handler h, void *arg) +{ + struct tcpip_msg *msg; + + if (sys_mbox_valid(&mbox)) { + msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_UNTIMEOUT; + msg->msg.tmo.h = h; + msg->msg.tmo.arg = arg; + sys_mbox_post(&mbox, msg); + return ERR_OK; + } + return ERR_VAL; +} +#endif /* LWIP_TCPIP_TIMEOUT */ + +#if LWIP_NETCONN +/** + * Call the lower part of a netconn_* function + * This function is then running in the thread context + * of tcpip_thread and has exclusive access to lwIP core code. + * + * @param apimsg a struct containing the function to call and its parameters + * @return ERR_OK if the function was called, another err_t if not + */ +err_t +tcpip_apimsg(struct api_msg *apimsg) +{ + struct tcpip_msg msg; +#ifdef LWIP_DEBUG + /* catch functions that don't set err */ + apimsg->msg.err = ERR_VAL; +#endif + + if (sys_mbox_valid(&mbox)) {//ںЧ + msg.type = TCPIP_MSG_API; + msg.msg.apimsg = apimsg; + sys_mbox_post(&mbox, &msg);//ͶϢ + sys_arch_sem_wait(&apimsg->msg.conn->op_completed, 0);//ȴϢ + return apimsg->msg.err; + } + return ERR_VAL; +} + +#if LWIP_TCPIP_CORE_LOCKING +/** + * Call the lower part of a netconn_* function + * This function has exclusive access to lwIP core code by locking it + * before the function is called. + * + * @param apimsg a struct containing the function to call and its parameters + * @return ERR_OK (only for compatibility fo tcpip_apimsg()) + */ +err_t +tcpip_apimsg_lock(struct api_msg *apimsg) +{ +#ifdef LWIP_DEBUG + /* catch functions that don't set err */ + apimsg->msg.err = ERR_VAL; +#endif + + LOCK_TCPIP_CORE(); + apimsg->function(&(apimsg->msg)); + UNLOCK_TCPIP_CORE(); + return apimsg->msg.err; + +} +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETCONN */ + +#if LWIP_NETIF_API +#if !LWIP_TCPIP_CORE_LOCKING +/** + * Much like tcpip_apimsg, but calls the lower part of a netifapi_* + * function. + * + * @param netifapimsg a struct containing the function to call and its parameters + * @return error code given back by the function that was called + */ +err_t +tcpip_netifapi(struct netifapi_msg* netifapimsg) +{ + struct tcpip_msg msg; + + if (sys_mbox_valid(&mbox)) { + err_t err = sys_sem_new(&netifapimsg->msg.sem, 0); + if (err != ERR_OK) { + netifapimsg->msg.err = err; + return err; + } + + msg.type = TCPIP_MSG_NETIFAPI; + msg.msg.netifapimsg = netifapimsg; + sys_mbox_post(&mbox, &msg); + sys_sem_wait(&netifapimsg->msg.sem); + sys_sem_free(&netifapimsg->msg.sem); + return netifapimsg->msg.err; + } + return ERR_VAL; +} +#else /* !LWIP_TCPIP_CORE_LOCKING */ +/** + * Call the lower part of a netifapi_* function + * This function has exclusive access to lwIP core code by locking it + * before the function is called. + * + * @param netifapimsg a struct containing the function to call and its parameters + * @return ERR_OK (only for compatibility fo tcpip_netifapi()) + */ +err_t +tcpip_netifapi_lock(struct netifapi_msg* netifapimsg) +{ + LOCK_TCPIP_CORE(); + netifapimsg->function(&(netifapimsg->msg)); + UNLOCK_TCPIP_CORE(); + return netifapimsg->msg.err; +} +#endif /* !LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETIF_API */ + +/** + * Initialize this module: + * - initialize all sub modules + * - start the tcpip_thread + * + * @param initfunc a function to call when tcpip_thread is running and finished initializing + * @param arg argument to pass to initfunc + */ +void +tcpip_init(tcpip_init_done_fn initfunc, void *arg) +{ + lwip_init();//ʼں + + tcpip_init_done = initfunc;//עûԶ庯 + tcpip_init_done_arg = arg;// + if(sys_mbox_new(&mbox, TCPIP_MBOX_SIZE) != ERR_OK) {//ں + LWIP_ASSERT("failed to create tcpip_thread mbox", 0); + } +#if LWIP_TCPIP_CORE_LOCKING + if(sys_mutex_new(&lock_tcpip_core) != ERR_OK) { + LWIP_ASSERT("failed to create lock_tcpip_core", 0); + } +#endif /* LWIP_TCPIP_CORE_LOCKING */ + + sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);//ں˽ +} + +/** + * Simple callback function used with tcpip_callback to free a pbuf + * (pbuf_free has a wrong signature for tcpip_callback) + * + * @param p The pbuf (chain) to be dereferenced. + */ +static void +pbuf_free_int(void *p) +{ + struct pbuf *q = (struct pbuf *)p; + pbuf_free(q); +} + +/** + * A simple wrapper function that allows you to free a pbuf from interrupt context. + * + * @param p The pbuf (chain) to be dereferenced. + * @return ERR_OK if callback could be enqueued, an err_t if not + */ +err_t +pbuf_free_callback(struct pbuf *p) +{ + return tcpip_callback_with_block(pbuf_free_int, p, 0); +} + +/** + * A simple wrapper function that allows you to free heap memory from + * interrupt context. + * + * @param m the heap memory to free + * @return ERR_OK if callback could be enqueued, an err_t if not + */ +err_t +mem_free_callback(void *m) +{ + return tcpip_callback_with_block(mem_free, m, 0); +} + +#endif /* !NO_SYS */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/Makefile b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/Makefile new file mode 100755 index 0000000..929da66 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = liblwipapp.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/dhcpserver.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/dhcpserver.c new file mode 100755 index 0000000..b9e7ee6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/dhcpserver.c @@ -0,0 +1,1181 @@ +#include "lwip/inet.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/udp.h" +#include "lwip/mem.h" +//#include "crypto/common.h" +#include "osapi.h" +#include "lwip/app/dhcpserver.h" + +#ifndef LWIP_OPEN_SRC +#include "net80211/ieee80211_var.h" +#endif + +#include "user_interface.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +//////////////////////////////////////////////////////////////////////////////////// +//static const uint8_t xid[4] = {0xad, 0xde, 0x12, 0x23}; +//static u8_t old_xid[4] = {0}; +static const uint32 magic_cookie ICACHE_RODATA_ATTR = 0x63538263; +static struct udp_pcb *pcb_dhcps = NULL; +static struct ip_addr broadcast_dhcps; +static struct ip_addr server_address; +static struct ip_addr client_address;//added + +static struct dhcps_lease dhcps_lease; +//static bool dhcps_lease_flag = true; +static list_node *plist = NULL; +static uint8 offer = 0xFF; +static bool renew = false; +#define DHCPS_LEASE_TIME_DEF (120) +uint32 dhcps_lease_time = DHCPS_LEASE_TIME_DEF; //minute + +void wifi_softap_dhcps_client_leave(u8 *bssid, struct ip_addr *ip,bool force); +uint32 wifi_softap_dhcps_client_update(u8 *bssid, struct ip_addr *ip); +struct netif * eagle_lwip_getif(uint8 index); +int wifi_softap_set_station_info(char *info, struct ip_addr *addr); + +/****************************************************************************** + * FunctionName : node_insert_to_list + * Description : insert the node to the list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR node_insert_to_list(list_node **phead, list_node* pinsert) +{ + list_node *plist = NULL; + struct dhcps_pool *pdhcps_pool = NULL; + struct dhcps_pool *pdhcps_node = NULL; + if (*phead == NULL) + *phead = pinsert; + else { + plist = *phead; + pdhcps_node = pinsert->pnode; + pdhcps_pool = plist->pnode; + + if(pdhcps_node->ip.addr < pdhcps_pool->ip.addr) { + pinsert->pnext = plist; + *phead = pinsert; + } else { + while (plist->pnext != NULL) { + pdhcps_pool = plist->pnext->pnode; + if (pdhcps_node->ip.addr < pdhcps_pool->ip.addr) { + pinsert->pnext = plist->pnext; + plist->pnext = pinsert; + break; + } + plist = plist->pnext; + } + + if(plist->pnext == NULL) { + plist->pnext = pinsert; + } + } + } +// pinsert->pnext = NULL; +} + +/****************************************************************************** + * FunctionName : node_delete_from_list + * Description : remove the node from list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR node_remove_from_list(list_node **phead, list_node* pdelete) +{ + list_node *plist = NULL; + + plist = *phead; + if (plist == NULL){ + *phead = NULL; + } else { + if (plist == pdelete){ + *phead = plist->pnext; + pdelete->pnext = NULL; + } else { + while (plist != NULL) { + if (plist->pnext == pdelete){ + plist->pnext = pdelete->pnext; + pdelete->pnext = NULL; + } + plist = plist->pnext; + } + } + } +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * ��DHCP msg��Ϣ�ṹ���������� + * + * @param optptr -- DHCP msg��Ϣλ�� + * @param type -- Ҫ��ӵ�����option + * + * @return uint8_t* ����DHCP msgƫ�Ƶ�ַ + */ +/////////////////////////////////////////////////////////////////////////////////// +static uint8_t* ICACHE_FLASH_ATTR add_msg_type(uint8_t *optptr, uint8_t type) +{ + + *optptr++ = DHCP_OPTION_MSG_TYPE; + *optptr++ = 1; + *optptr++ = type; + return optptr; +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * ��DHCP msg�ṹ������offerӦ������ + * + * @param optptr -- DHCP msg��Ϣλ�� + * + * @return uint8_t* ����DHCP msgƫ�Ƶ�ַ + */ +/////////////////////////////////////////////////////////////////////////////////// +static uint8_t* ICACHE_FLASH_ATTR add_offer_options(uint8_t *optptr) +{ + struct ip_addr ipadd; + + ipadd.addr = *( (uint32_t *) &server_address); + +#ifdef USE_CLASS_B_NET + *optptr++ = DHCP_OPTION_SUBNET_MASK; + *optptr++ = 4; //length + *optptr++ = 255; + *optptr++ = 240; + *optptr++ = 0; + *optptr++ = 0; +#else + *optptr++ = DHCP_OPTION_SUBNET_MASK; + *optptr++ = 4; + *optptr++ = 255; + *optptr++ = 255; + *optptr++ = 255; + *optptr++ = 0; +#endif + + *optptr++ = DHCP_OPTION_LEASE_TIME; + *optptr++ = 4; + *optptr++ = ((DHCPS_LEASE_TIMER * 60) >> 24) & 0xFF; + *optptr++ = ((DHCPS_LEASE_TIMER * 60) >> 16) & 0xFF; + *optptr++ = ((DHCPS_LEASE_TIMER * 60) >> 8) & 0xFF; + *optptr++ = ((DHCPS_LEASE_TIMER * 60) >> 0) & 0xFF; + + *optptr++ = DHCP_OPTION_SERVER_ID; + *optptr++ = 4; + *optptr++ = ip4_addr1( &ipadd); + *optptr++ = ip4_addr2( &ipadd); + *optptr++ = ip4_addr3( &ipadd); + *optptr++ = ip4_addr4( &ipadd); + + if (dhcps_router_enabled(offer)){ + struct ip_info if_ip; + os_bzero(&if_ip, sizeof(struct ip_info)); + wifi_get_ip_info(SOFTAP_IF, &if_ip); + + *optptr++ = DHCP_OPTION_ROUTER; + *optptr++ = 4; + *optptr++ = ip4_addr1( &if_ip.gw); + *optptr++ = ip4_addr2( &if_ip.gw); + *optptr++ = ip4_addr3( &if_ip.gw); + *optptr++ = ip4_addr4( &if_ip.gw); + } + +#ifdef USE_DNS + *optptr++ = DHCP_OPTION_DNS_SERVER; + *optptr++ = 4; + *optptr++ = ip4_addr1( &ipadd); + *optptr++ = ip4_addr2( &ipadd); + *optptr++ = ip4_addr3( &ipadd); + *optptr++ = ip4_addr4( &ipadd); +#endif + +#ifdef CLASS_B_NET + *optptr++ = DHCP_OPTION_BROADCAST_ADDRESS; + *optptr++ = 4; + *optptr++ = ip4_addr1( &ipadd); + *optptr++ = 255; + *optptr++ = 255; + *optptr++ = 255; +#else + *optptr++ = DHCP_OPTION_BROADCAST_ADDRESS; + *optptr++ = 4; + *optptr++ = ip4_addr1( &ipadd); + *optptr++ = ip4_addr2( &ipadd); + *optptr++ = ip4_addr3( &ipadd); + *optptr++ = 255; +#endif + + *optptr++ = DHCP_OPTION_INTERFACE_MTU; + *optptr++ = 2; +#ifdef CLASS_B_NET + *optptr++ = 0x05; + *optptr++ = 0xdc; +#else + *optptr++ = 0x02; + *optptr++ = 0x40; +#endif + + *optptr++ = DHCP_OPTION_PERFORM_ROUTER_DISCOVERY; + *optptr++ = 1; + *optptr++ = 0x00; + + *optptr++ = 43; + *optptr++ = 6; + + *optptr++ = 0x01; + *optptr++ = 4; + *optptr++ = 0x00; + *optptr++ = 0x00; + *optptr++ = 0x00; + *optptr++ = 0x02; + + return optptr; +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * ��DHCP msg�ṹ����ӽ����־���� + * + * @param optptr -- DHCP msg��Ϣλ�� + * + * @return uint8_t* ����DHCP msgƫ�Ƶ�ַ + */ +/////////////////////////////////////////////////////////////////////////////////// +static uint8_t* ICACHE_FLASH_ATTR add_end(uint8_t *optptr) +{ + + *optptr++ = DHCP_OPTION_END; + return optptr; +} +/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////////////// +static void ICACHE_FLASH_ATTR create_msg(struct dhcps_msg *m) +{ + struct ip_addr client; + + client.addr = client_address.addr; + + m->op = DHCP_REPLY; + m->htype = DHCP_HTYPE_ETHERNET; + m->hlen = 6; + m->hops = 0; +// os_memcpy((char *) xid, (char *) m->xid, sizeof(m->xid)); + m->secs = 0; + m->flags = htons(BOOTP_BROADCAST); + + os_memcpy((char *) m->yiaddr, (char *) &client.addr, sizeof(m->yiaddr)); + + os_memset((char *) m->ciaddr, 0, sizeof(m->ciaddr)); + os_memset((char *) m->siaddr, 0, sizeof(m->siaddr)); + os_memset((char *) m->giaddr, 0, sizeof(m->giaddr)); + os_memset((char *) m->sname, 0, sizeof(m->sname)); + os_memset((char *) m->file, 0, sizeof(m->file)); + + os_memset((char *) m->options, 0, sizeof(m->options)); + +//For xiaomi crash bug + uint32 magic_cookie1 = magic_cookie; + os_memcpy((char *) m->options, &magic_cookie1, sizeof(magic_cookie1)); +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * ����һ��OFFER + * + * @param -- m ָ����Ҫ���͵�DHCP msg���� + */ +/////////////////////////////////////////////////////////////////////////////////// +static void ICACHE_FLASH_ATTR send_offer(struct dhcps_msg *m) +{ + uint8_t *end; + struct pbuf *p, *q; + u8_t *data; + u16_t cnt=0; + u16_t i; + err_t SendOffer_err_t; + create_msg(m); + + end = add_msg_type(&m->options[4], DHCPOFFER); + end = add_offer_options(end); + end = add_end(end); + + p = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcps_msg), PBUF_RAM); +#if DHCPS_DEBUG + os_printf("udhcp: send_offer>>p->ref = %d\n", p->ref); +#endif + if(p != NULL){ + +#if DHCPS_DEBUG + os_printf("dhcps: send_offer>>pbuf_alloc succeed\n"); + os_printf("dhcps: send_offer>>p->tot_len = %d\n", p->tot_len); + os_printf("dhcps: send_offer>>p->len = %d\n", p->len); +#endif + q = p; + while(q != NULL){ + data = (u8_t *)q->payload; + for(i=0; ilen; i++) + { + data[i] = ((u8_t *) m)[cnt++]; + } + + q = q->next; + } + }else{ + +#if DHCPS_DEBUG + os_printf("dhcps: send_offer>>pbuf_alloc failed\n"); +#endif + return; + } + SendOffer_err_t = udp_sendto( pcb_dhcps, p, &broadcast_dhcps, DHCPS_CLIENT_PORT ); +#if DHCPS_DEBUG + os_printf("dhcps: send_offer>>udp_sendto result %x\n",SendOffer_err_t); +#endif + if(p->ref != 0){ +#if DHCPS_DEBUG + os_printf("udhcp: send_offer>>free pbuf\n"); +#endif + pbuf_free(p); + } +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * ����һ��NAK��Ϣ + * + * @param m ָ����Ҫ���͵�DHCP msg���� + */ +/////////////////////////////////////////////////////////////////////////////////// +static void ICACHE_FLASH_ATTR send_nak(struct dhcps_msg *m) +{ + + u8_t *end; + struct pbuf *p, *q; + u8_t *data; + u16_t cnt=0; + u16_t i; + err_t SendNak_err_t; + create_msg(m); + + end = add_msg_type(&m->options[4], DHCPNAK); + end = add_end(end); + + p = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcps_msg), PBUF_RAM); +#if DHCPS_DEBUG + os_printf("udhcp: send_nak>>p->ref = %d\n", p->ref); +#endif + if(p != NULL){ + +#if DHCPS_DEBUG + os_printf("dhcps: send_nak>>pbuf_alloc succeed\n"); + os_printf("dhcps: send_nak>>p->tot_len = %d\n", p->tot_len); + os_printf("dhcps: send_nak>>p->len = %d\n", p->len); +#endif + q = p; + while(q != NULL){ + data = (u8_t *)q->payload; + for(i=0; ilen; i++) + { + data[i] = ((u8_t *) m)[cnt++]; + } + + q = q->next; + } + }else{ + +#if DHCPS_DEBUG + os_printf("dhcps: send_nak>>pbuf_alloc failed\n"); +#endif + return; + } + SendNak_err_t = udp_sendto( pcb_dhcps, p, &broadcast_dhcps, DHCPS_CLIENT_PORT ); +#if DHCPS_DEBUG + os_printf("dhcps: send_nak>>udp_sendto result %x\n",SendNak_err_t); +#endif + if(p->ref != 0){ +#if DHCPS_DEBUG + os_printf("udhcp: send_nak>>free pbuf\n"); +#endif + pbuf_free(p); + } +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * ����һ��ACK��DHCP�ͻ��� + * + * @param m ָ����Ҫ���͵�DHCP msg���� + */ +/////////////////////////////////////////////////////////////////////////////////// +static void ICACHE_FLASH_ATTR send_ack(struct dhcps_msg *m) +{ + + u8_t *end; + struct pbuf *p, *q; + u8_t *data; + u16_t cnt=0; + u16_t i; + err_t SendAck_err_t; + create_msg(m); + + end = add_msg_type(&m->options[4], DHCPACK); + end = add_offer_options(end); + end = add_end(end); + + p = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcps_msg), PBUF_RAM); +#if DHCPS_DEBUG + os_printf("udhcp: send_ack>>p->ref = %d\n", p->ref); +#endif + if(p != NULL){ + +#if DHCPS_DEBUG + os_printf("dhcps: send_ack>>pbuf_alloc succeed\n"); + os_printf("dhcps: send_ack>>p->tot_len = %d\n", p->tot_len); + os_printf("dhcps: send_ack>>p->len = %d\n", p->len); +#endif + q = p; + while(q != NULL){ + data = (u8_t *)q->payload; + for(i=0; ilen; i++) + { + data[i] = ((u8_t *) m)[cnt++]; + } + + q = q->next; + } + }else{ + +#if DHCPS_DEBUG + os_printf("dhcps: send_ack>>pbuf_alloc failed\n"); +#endif + return; + } + SendAck_err_t = udp_sendto( pcb_dhcps, p, &broadcast_dhcps, DHCPS_CLIENT_PORT ); +#if DHCPS_DEBUG + os_printf("dhcps: send_ack>>udp_sendto result %x\n",SendAck_err_t); +#endif + + if(p->ref != 0){ +#if DHCPS_DEBUG + os_printf("udhcp: send_ack>>free pbuf\n"); +#endif + pbuf_free(p); + } +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * ����DHCP�ͻ��˷�����DHCP����������Ϣ�����Բ�ͬ��DHCP��������������Ӧ��Ӧ�� + * + * @param optptr DHCP msg�е��������� + * @param len ��������Ĵ��?(byte) + * + * @return uint8_t ���ش�����DHCP Server״ֵ̬ + */ +/////////////////////////////////////////////////////////////////////////////////// +static uint8_t ICACHE_FLASH_ATTR parse_options(uint8_t *optptr, sint16_t len) +{ + struct ip_addr client; + bool is_dhcp_parse_end = false; + struct dhcps_state s; + + client.addr = *( (uint32_t *) &client_address);// Ҫ�����DHCP�ͻ��˵�IP + + u8_t *end = optptr + len; + u16_t type = 0; + + s.state = DHCPS_STATE_IDLE; + + while (optptr < end) { +#if DHCPS_DEBUG + os_printf("dhcps: (sint16_t)*optptr = %d\n", (sint16_t)*optptr); +#endif + switch ((sint16_t) *optptr) { + + case DHCP_OPTION_MSG_TYPE: //53 + type = *(optptr + 2); + break; + + case DHCP_OPTION_REQ_IPADDR://50 + //os_printf("dhcps:0x%08x,0x%08x\n",client.addr,*(uint32*)(optptr+2)); + if( os_memcmp( (char *) &client.addr, (char *) optptr+2,4)==0 ) { +#if DHCPS_DEBUG + os_printf("dhcps: DHCP_OPTION_REQ_IPADDR = 0 ok\n"); +#endif + s.state = DHCPS_STATE_ACK; + }else { +#if DHCPS_DEBUG + os_printf("dhcps: DHCP_OPTION_REQ_IPADDR != 0 err\n"); +#endif + s.state = DHCPS_STATE_NAK; + } + break; + case DHCP_OPTION_END: + { + is_dhcp_parse_end = true; + } + break; + } + + if(is_dhcp_parse_end){ + break; + } + + optptr += optptr[1] + 2; + } + + switch (type){ + case DHCPDISCOVER://1 + s.state = DHCPS_STATE_OFFER; +#if DHCPS_DEBUG + os_printf("dhcps: DHCPD_STATE_OFFER\n"); +#endif + break; + + case DHCPREQUEST://3 + if ( !(s.state == DHCPS_STATE_ACK || s.state == DHCPS_STATE_NAK) ) { + if(renew == true) { + s.state = DHCPS_STATE_ACK; + } else { + s.state = DHCPS_STATE_NAK; + } +#if DHCPS_DEBUG + os_printf("dhcps: DHCPD_STATE_NAK\n"); +#endif + } + break; + + case DHCPDECLINE://4 + s.state = DHCPS_STATE_IDLE; +#if DHCPS_DEBUG + os_printf("dhcps: DHCPD_STATE_IDLE\n"); +#endif + break; + + case DHCPRELEASE://7 + s.state = DHCPS_STATE_RELEASE; +#if DHCPS_DEBUG + os_printf("dhcps: DHCPD_STATE_IDLE\n"); +#endif + break; + } +#if DHCPS_DEBUG + os_printf("dhcps: return s.state = %d\n", s.state); +#endif + return s.state; +} +/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////////////// +static sint16_t ICACHE_FLASH_ATTR parse_msg(struct dhcps_msg *m, u16_t len) +{ + if(os_memcmp((char *)m->options, + &magic_cookie, + sizeof(magic_cookie)) == 0){ + struct ip_addr ip; + os_memcpy(&ip.addr,m->ciaddr,sizeof(ip.addr)); + client_address.addr = wifi_softap_dhcps_client_update(m->chaddr,&ip); + + sint16_t ret = parse_options(&m->options[4], len); + + if(ret == DHCPS_STATE_RELEASE) { + wifi_softap_dhcps_client_leave(m->chaddr,&ip,TRUE); // force to delete + client_address.addr = ip.addr; + } + + return ret; + } + return 0; +} +/////////////////////////////////////////////////////////////////////////////////// +/* + * DHCP ��������ݰ���մ���ص�����˺�����LWIP UDPģ������ʱ������ + * ��Ҫ����udp_recv()������LWIP����ע��. + * + * @param arg + * @param pcb ���յ�UDP��Ŀ��ƿ�? + * @param p ���յ���UDP�е��������? + * @param addr ���ʹ�UDP���Դ�����IP��ַ + * @param port ���ʹ�UDP���Դ�����UDPͨ���˿ں� + */ +/////////////////////////////////////////////////////////////////////////////////// +static void ICACHE_FLASH_ATTR handle_dhcp(void *arg, + struct udp_pcb *pcb, + struct pbuf *p, + struct ip_addr *addr, + uint16_t port) +{ + struct dhcps_msg *pmsg_dhcps = NULL; + sint16_t tlen = 0; + u16_t i = 0; + u16_t dhcps_msg_cnt = 0; + u8_t *p_dhcps_msg = NULL; + u8_t *data = NULL; + +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> receive a packet\n"); +#endif + if (p==NULL) return; + + pmsg_dhcps = (struct dhcps_msg *)os_zalloc(sizeof(struct dhcps_msg)); + if (NULL == pmsg_dhcps){ + pbuf_free(p); + return; + } + p_dhcps_msg = (u8_t *)pmsg_dhcps; + tlen = p->tot_len; + data = p->payload; + +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> p->tot_len = %d\n", tlen); + os_printf("dhcps: handle_dhcp-> p->len = %d\n", p->len); +#endif + + for(i=0; ilen; i++){ + p_dhcps_msg[dhcps_msg_cnt++] = data[i]; + } + + if(p->next != NULL) { +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> p->next != NULL\n"); + os_printf("dhcps: handle_dhcp-> p->next->tot_len = %d\n",p->next->tot_len); + os_printf("dhcps: handle_dhcp-> p->next->len = %d\n",p->next->len); +#endif + + data = p->next->payload; + for(i=0; inext->len; i++){ + p_dhcps_msg[dhcps_msg_cnt++] = data[i]; + } + } + + /* + * DHCP �ͻ���������Ϣ���� + */ +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> parse_msg(p)\n"); +#endif + + switch(parse_msg(pmsg_dhcps, tlen - 240)) { + + case DHCPS_STATE_OFFER://1 +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> DHCPD_STATE_OFFER\n"); +#endif + send_offer(pmsg_dhcps); + break; + case DHCPS_STATE_ACK://3 +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> DHCPD_STATE_ACK\n"); +#endif + send_ack(pmsg_dhcps); + wifi_softap_set_station_info(pmsg_dhcps->chaddr, &client_address); + break; + case DHCPS_STATE_NAK://4 +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> DHCPD_STATE_NAK\n"); +#endif + send_nak(pmsg_dhcps); + break; + default : + break; + } +#if DHCPS_DEBUG + os_printf("dhcps: handle_dhcp-> pbuf_free(p)\n"); +#endif + pbuf_free(p); + os_free(pmsg_dhcps); + pmsg_dhcps = NULL; +} +/////////////////////////////////////////////////////////////////////////////////// +static void ICACHE_FLASH_ATTR wifi_softap_init_dhcps_lease(uint32 ip) +{ + uint32 softap_ip = 0,local_ip = 0; + uint32 start_ip = 0; + uint32 end_ip = 0; +// if (dhcps_lease_flag) { + if (dhcps_lease.enable == TRUE) { + softap_ip = htonl(ip); + start_ip = htonl(dhcps_lease.start_ip.addr); + end_ip = htonl(dhcps_lease.end_ip.addr); + /*config ip information can't contain local ip*/ + if ((start_ip <= softap_ip) && (softap_ip <= end_ip)) { + dhcps_lease.enable = FALSE; + } else { + /*config ip information must be in the same segment as the local ip*/ + softap_ip >>= 8; + if (((start_ip >> 8 != softap_ip) || (end_ip >> 8 != softap_ip)) + || (end_ip - start_ip > DHCPS_MAX_LEASE)) { + dhcps_lease.enable = FALSE; + } + } + } + + if (dhcps_lease.enable == FALSE) { + local_ip = softap_ip = htonl(ip); + softap_ip &= 0xFFFFFF00; + local_ip &= 0xFF; + if (local_ip >= 0x80) + local_ip -= DHCPS_MAX_LEASE; + else + local_ip ++; + + os_bzero(&dhcps_lease, sizeof(dhcps_lease)); + dhcps_lease.start_ip.addr = softap_ip | local_ip; + dhcps_lease.end_ip.addr = softap_ip | (local_ip + DHCPS_MAX_LEASE - 1); + dhcps_lease.start_ip.addr = htonl(dhcps_lease.start_ip.addr); + dhcps_lease.end_ip.addr= htonl(dhcps_lease.end_ip.addr); + } +// dhcps_lease.start_ip.addr = htonl(dhcps_lease.start_ip.addr); +// dhcps_lease.end_ip.addr= htonl(dhcps_lease.end_ip.addr); +// os_printf("start_ip = 0x%x, end_ip = 0x%x\n",dhcps_lease.start_ip, dhcps_lease.end_ip); +} +/////////////////////////////////////////////////////////////////////////////////// +void ICACHE_FLASH_ATTR dhcps_start(struct ip_info *info) +{ + struct netif * apnetif = (struct netif *)eagle_lwip_getif(0x01); + + if(apnetif->dhcps_pcb != NULL) { + udp_remove(apnetif->dhcps_pcb); + } + + pcb_dhcps = udp_new(); + if (pcb_dhcps == NULL || info ==NULL) { + os_printf("dhcps_start(): could not obtain pcb\n"); + } + + apnetif->dhcps_pcb = pcb_dhcps; + + IP4_ADDR(&broadcast_dhcps, 255, 255, 255, 255); + + server_address = info->ip; + wifi_softap_init_dhcps_lease(server_address.addr); + + udp_bind(pcb_dhcps, IP_ADDR_ANY, DHCPS_SERVER_PORT); + udp_recv(pcb_dhcps, handle_dhcp, NULL); +#if DHCPS_DEBUG + os_printf("dhcps:dhcps_start->udp_recv function Set a receive callback handle_dhcp for UDP_PCB pcb_dhcps\n"); +#endif + +} + +void ICACHE_FLASH_ATTR dhcps_stop(void) +{ + struct netif * apnetif = (struct netif *)eagle_lwip_getif(0x01); + + udp_disconnect(pcb_dhcps); +// dhcps_lease_flag = true; + if(apnetif->dhcps_pcb != NULL) { + udp_remove(apnetif->dhcps_pcb); + apnetif->dhcps_pcb = NULL; + } + + //udp_remove(pcb_dhcps); + list_node *pnode = NULL; + list_node *pback_node = NULL; + struct dhcps_pool* dhcp_node = NULL; + struct ip_addr ip_zero; + + os_memset(&ip_zero,0x0,sizeof(ip_zero)); + pnode = plist; + while (pnode != NULL) { + pback_node = pnode; + pnode = pback_node->pnext; + node_remove_from_list(&plist, pback_node); + dhcp_node = (struct dhcps_pool*)pback_node->pnode; + //wifi_softap_dhcps_client_leave(dhcp_node->mac,&dhcp_node->ip,TRUE); // force to delete + wifi_softap_set_station_info(dhcp_node->mac, &ip_zero); + os_free(pback_node->pnode); + pback_node->pnode = NULL; + os_free(pback_node); + pback_node = NULL; + } +} + +/****************************************************************************** + * FunctionName : wifi_softap_set_dhcps_lease + * Description : set the lease information of DHCP server + * Parameters : please -- Additional argument to set the lease information, + * Little-Endian. + * Returns : true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR wifi_softap_set_dhcps_lease(struct dhcps_lease *please) +{ + struct ip_info info; + uint32 softap_ip = 0; + uint32 start_ip = 0; + uint32 end_ip = 0; + + uint8 opmode = wifi_get_opmode(); + + if (opmode == STATION_MODE || opmode == NULL_MODE) { + return false; + } + + if (please == NULL || wifi_softap_dhcps_status() == DHCP_STARTED) + return false; + + if(please->enable) { + os_bzero(&info, sizeof(struct ip_info)); + wifi_get_ip_info(SOFTAP_IF, &info); + softap_ip = htonl(info.ip.addr); + start_ip = htonl(please->start_ip.addr); + end_ip = htonl(please->end_ip.addr); + + /*config ip information can't contain local ip*/ + if ((start_ip <= softap_ip) && (softap_ip <= end_ip)) + return false; + + /*config ip information must be in the same segment as the local ip*/ + softap_ip >>= 8; + if ((start_ip >> 8 != softap_ip) + || (end_ip >> 8 != softap_ip)) { + return false; + } + + if (end_ip - start_ip > DHCPS_MAX_LEASE) + return false; + + os_bzero(&dhcps_lease, sizeof(dhcps_lease)); +// dhcps_lease.start_ip.addr = start_ip; +// dhcps_lease.end_ip.addr = end_ip; + dhcps_lease.start_ip.addr = please->start_ip.addr; + dhcps_lease.end_ip.addr = please->end_ip.addr; + } + dhcps_lease.enable = please->enable; +// dhcps_lease_flag = false; + return true; +} + +/****************************************************************************** + * FunctionName : wifi_softap_get_dhcps_lease + * Description : get the lease information of DHCP server + * Parameters : please -- Additional argument to get the lease information, + * Little-Endian. + * Returns : true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR wifi_softap_get_dhcps_lease(struct dhcps_lease *please) +{ + uint8 opmode = wifi_get_opmode(); + + if (opmode == STATION_MODE || opmode == NULL_MODE) { + return false; + } + + if (NULL == please) + return false; + +// if (dhcps_lease_flag){ + if (dhcps_lease.enable == FALSE){ + if (wifi_softap_dhcps_status() == DHCP_STOPPED) + return false; + } else { +// os_bzero(please, sizeof(dhcps_lease)); +// if (wifi_softap_dhcps_status() == DHCP_STOPPED){ +// please->start_ip.addr = htonl(dhcps_lease.start_ip.addr); +// please->end_ip.addr = htonl(dhcps_lease.end_ip.addr); +// } + } + +// if (wifi_softap_dhcps_status() == DHCP_STARTED){ +// os_bzero(please, sizeof(dhcps_lease)); +// please->start_ip.addr = dhcps_lease.start_ip.addr; +// please->end_ip.addr = dhcps_lease.end_ip.addr; +// } + please->start_ip.addr = dhcps_lease.start_ip.addr; + please->end_ip.addr = dhcps_lease.end_ip.addr; + return true; +} + +static void ICACHE_FLASH_ATTR kill_oldest_dhcps_pool(void) +{ + list_node *pre = NULL, *p = NULL; + list_node *minpre = NULL, *minp = NULL; + struct dhcps_pool *pdhcps_pool = NULL, *pmin_pool = NULL; + pre = plist; + p = pre->pnext; + minpre = pre; + minp = p; + while (p != NULL){ + pdhcps_pool = p->pnode; + pmin_pool = minp->pnode; + if (pdhcps_pool->lease_timer < pmin_pool->lease_timer){ + minp = p; + minpre = pre; + } + pre = p; + p = p->pnext; + } + minpre->pnext = minp->pnext;pdhcps_pool->state = DHCPS_STATE_OFFLINE; + os_free(minp->pnode); + minp->pnode = NULL; + os_free(minp); + minp = NULL; +} + +void ICACHE_FLASH_ATTR dhcps_coarse_tmr(void) +{ + uint8 num_dhcps_pool = 0; + list_node *pback_node = NULL; + list_node *pnode = NULL; + struct dhcps_pool *pdhcps_pool = NULL; + pnode = plist; + while (pnode != NULL) { + pdhcps_pool = pnode->pnode; + if ( pdhcps_pool->type == DHCPS_TYPE_DYNAMIC) { + pdhcps_pool->lease_timer --; + } + if (pdhcps_pool->lease_timer == 0){ + pback_node = pnode; + pnode = pback_node->pnext; + node_remove_from_list(&plist,pback_node); + os_free(pback_node->pnode); + pback_node->pnode = NULL; + os_free(pback_node); + pback_node = NULL; + } else { + pnode = pnode ->pnext; + num_dhcps_pool ++; + } + } + + if (num_dhcps_pool >= MAX_STATION_NUM) + kill_oldest_dhcps_pool(); +} + +bool ICACHE_FLASH_ATTR wifi_softap_set_dhcps_offer_option(uint8 level, void* optarg) +{ + bool offer_flag = true; + uint8 option = 0; + if (optarg == NULL && wifi_softap_dhcps_status() == false) + return false; + + if (level <= OFFER_START || level >= OFFER_END) + return false; + + switch (level){ + case OFFER_ROUTER: + offer = (*(uint8 *)optarg) & 0x01; + offer_flag = true; + break; + default : + offer_flag = false; + break; + } + return offer_flag; +} + +bool ICACHE_FLASH_ATTR wifi_softap_set_dhcps_lease_time(uint32 minute) +{ + uint8 opmode = wifi_get_opmode(); + + if (opmode == STATION_MODE || opmode == NULL_MODE) { + return false; + } + + if (wifi_softap_dhcps_status() == DHCP_STARTED) { + return false; + } + + if(minute == 0) { + return false; + } + dhcps_lease_time = minute; + return true; +} + +bool ICACHE_FLASH_ATTR wifi_softap_reset_dhcps_lease_time(void) +{ + uint8 opmode = wifi_get_opmode(); + + if (opmode == STATION_MODE || opmode == NULL_MODE) { + return false; + } + + if (wifi_softap_dhcps_status() == DHCP_STARTED) { + return false; + } + dhcps_lease_time = DHCPS_LEASE_TIME_DEF; + return true; +} + +uint32 ICACHE_FLASH_ATTR wifi_softap_get_dhcps_lease_time(void) // minute +{ + return dhcps_lease_time; +} + +void ICACHE_FLASH_ATTR wifi_softap_dhcps_client_leave(u8 *bssid, struct ip_addr *ip,bool force) +{ + struct dhcps_pool *pdhcps_pool = NULL; + list_node *pback_node = NULL; + + if ((bssid == NULL) || (ip == NULL)) { + return; + } + + for (pback_node = plist; pback_node != NULL;pback_node = pback_node->pnext) { + pdhcps_pool = pback_node->pnode; + if (os_memcmp(pdhcps_pool->mac, bssid, sizeof(pdhcps_pool->mac)) == 0){ + if (os_memcmp(&pdhcps_pool->ip.addr, &ip->addr, sizeof(pdhcps_pool->ip.addr)) == 0) { + if ((pdhcps_pool->type == DHCPS_TYPE_STATIC) || (force)) { + if(pback_node != NULL) { + node_remove_from_list(&plist,pback_node); + os_free(pback_node); + pback_node = NULL; + } + + if (pdhcps_pool != NULL) { + os_free(pdhcps_pool); + pdhcps_pool = NULL; + } + } else { + pdhcps_pool->state = DHCPS_STATE_OFFLINE; + } + + struct ip_addr ip_zero; + os_memset(&ip_zero,0x0,sizeof(ip_zero)); + wifi_softap_set_station_info(bssid, &ip_zero); + break; + } + } + } +} + +uint32 ICACHE_FLASH_ATTR wifi_softap_dhcps_client_update(u8 *bssid, struct ip_addr *ip) +{ + struct dhcps_pool *pdhcps_pool = NULL; + list_node *pback_node = NULL; + list_node *pmac_node = NULL; + list_node *pip_node = NULL; + bool flag = FALSE; + uint32 start_ip = dhcps_lease.start_ip.addr; + uint32 end_ip = dhcps_lease.end_ip.addr; + dhcps_type_t type = DHCPS_TYPE_DYNAMIC; + if (bssid == NULL) { + return IPADDR_ANY; + } + + if (ip) { + if (IPADDR_BROADCAST == ip->addr) { + return IPADDR_ANY; + } else if (IPADDR_ANY == ip->addr) { + ip = NULL; + } else { + type = DHCPS_TYPE_STATIC; + } + } + + renew = FALSE; + for (pback_node = plist; pback_node != NULL;pback_node = pback_node->pnext) { + pdhcps_pool = pback_node->pnode; + //os_printf("mac:"MACSTR"bssid:"MACSTR"\r\n",MAC2STR(pdhcps_pool->mac),MAC2STR(bssid)); + if (os_memcmp(pdhcps_pool->mac, bssid, sizeof(pdhcps_pool->mac)) == 0){ + pmac_node = pback_node; + if (ip == NULL) { + flag = TRUE; + break; + } + } + if (ip != NULL) { + if (os_memcmp(&pdhcps_pool->ip.addr, &ip->addr, sizeof(pdhcps_pool->ip.addr)) == 0) { + pip_node = pback_node; + } + } else if (flag == FALSE){ + if (os_memcmp(&pdhcps_pool->ip.addr, &start_ip, sizeof(pdhcps_pool->ip.addr)) != 0) { + flag = TRUE; + } else { + start_ip = htonl((ntohl(start_ip) + 1)); + } + } + } + + if ((ip == NULL) && (flag == FALSE)) { + if (plist == NULL) { + if (start_ip <= end_ip) { + flag = TRUE; + } else { + return IPADDR_ANY; + } + } else { + if (start_ip > end_ip) { + return IPADDR_ANY; + } + //start_ip = htonl((ntohl(start_ip) + 1)); + flag = TRUE; + } + } + + if (pmac_node != NULL) { // update new ip + if (pip_node != NULL){ + pdhcps_pool = pip_node->pnode; + + if (pip_node != pmac_node) { + if(pdhcps_pool->state != DHCPS_STATE_OFFLINE) { // ip is used + return IPADDR_ANY; + } + + // mac exists and ip exists in other node,delete mac + node_remove_from_list(&plist,pmac_node); + os_free(pmac_node->pnode); + pmac_node->pnode = NULL; + os_free(pmac_node); + pmac_node = pip_node; + os_memcpy(pdhcps_pool->mac, bssid, sizeof(pdhcps_pool->mac)); + } else { + renew = true; + type = DHCPS_TYPE_DYNAMIC; + } + + pdhcps_pool->lease_timer = DHCPS_LEASE_TIMER; + pdhcps_pool->type = type; + pdhcps_pool->state = DHCPS_STATE_ONLINE; + + } else { + pdhcps_pool = pmac_node->pnode; + if (ip != NULL) { + pdhcps_pool->ip.addr = ip->addr; + } else if (flag == TRUE) { + pdhcps_pool->ip.addr = start_ip; + } else { // no ip to distribute + return IPADDR_ANY; + } + + node_remove_from_list(&plist,pmac_node); + pdhcps_pool->lease_timer = DHCPS_LEASE_TIMER; + pdhcps_pool->type = type; + pdhcps_pool->state = DHCPS_STATE_ONLINE; + node_insert_to_list(&plist,pmac_node); + } + } else { // new station + if (pip_node != NULL) { // maybe ip has used + pdhcps_pool = pip_node->pnode; + if (pdhcps_pool->state != DHCPS_STATE_OFFLINE) { + return IPADDR_ANY; + } + os_memcpy(pdhcps_pool->mac, bssid, sizeof(pdhcps_pool->mac)); + pdhcps_pool->lease_timer = DHCPS_LEASE_TIMER; + pdhcps_pool->type = type; + pdhcps_pool->state = DHCPS_STATE_ONLINE; + } else { + pdhcps_pool = (struct dhcps_pool *)os_zalloc(sizeof(struct dhcps_pool)); + if (ip != NULL) { + pdhcps_pool->ip.addr = ip->addr; + } else if (flag == TRUE) { + pdhcps_pool->ip.addr = start_ip; + } else { // no ip to distribute + os_free(pdhcps_pool); + return IPADDR_ANY; + } + if (pdhcps_pool->ip.addr > end_ip) { + os_free(pdhcps_pool); + return IPADDR_ANY; + } + os_memcpy(pdhcps_pool->mac, bssid, sizeof(pdhcps_pool->mac)); + pdhcps_pool->lease_timer = DHCPS_LEASE_TIMER; + pdhcps_pool->type = type; + pdhcps_pool->state = DHCPS_STATE_ONLINE; + pback_node = (list_node *)os_zalloc(sizeof(list_node )); + pback_node->pnode = pdhcps_pool; + pback_node->pnext = NULL; + node_insert_to_list(&plist,pback_node); + } + } + + return pdhcps_pool->ip.addr; +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn.c new file mode 100755 index 0000000..b81f098 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn.c @@ -0,0 +1,1397 @@ +/****************************************************************************** + * Copyright 2013-2014 Espressif Systems (Wuxi) + * + * FileName: espconn.c + * + * Description: espconn interface for user + * + * Modification history: + * 2014/3/31, v1.0 create this file. +*******************************************************************************/ + +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "netif/etharp.h" +#include "lwip/tcp.h" +#include "lwip/ip.h" +#include "lwip/init.h" +#include "ets_sys.h" +#include "os_type.h" +//#include "os.h" +#include "lwip/mem.h" + +#include "lwip/app/espconn_tcp.h" +#include "lwip/app/espconn_udp.h" +#include "lwip/app/espconn.h" +#include "user_interface.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +espconn_msg *plink_active = NULL; +espconn_msg *pserver_list = NULL; +remot_info premot[linkMax]; + +struct espconn_packet pktinfo[2]; +extern bool manual_set_flag ; + +static uint8 espconn_tcp_get_buf_count(espconn_buf *pesp_buf); +/****************************************************************************** + * FunctionName : espconn_copy_partial + * Description : reconnect with host + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_copy_partial(struct espconn *pesp_dest, struct espconn *pesp_source) +{ + pesp_dest->type = pesp_source->type; + pesp_dest->state = pesp_source->state; + if (pesp_source->type == ESPCONN_TCP){ + pesp_dest->proto.tcp->remote_port = pesp_source->proto.tcp->remote_port; + pesp_dest->proto.tcp->local_port = pesp_source->proto.tcp->local_port; + os_memcpy(pesp_dest->proto.tcp->remote_ip, pesp_source->proto.tcp->remote_ip, 4); + os_memcpy(pesp_dest->proto.tcp->local_ip, pesp_source->proto.tcp->local_ip, 4); + pesp_dest->proto.tcp->connect_callback = pesp_source->proto.tcp->connect_callback; + pesp_dest->proto.tcp->reconnect_callback = pesp_source->proto.tcp->reconnect_callback; + pesp_dest->proto.tcp->disconnect_callback = pesp_source->proto.tcp->disconnect_callback; + } else { + pesp_dest->proto.udp->remote_port = pesp_source->proto.udp->remote_port; + pesp_dest->proto.udp->local_port = pesp_source->proto.udp->local_port; + os_memcpy(pesp_dest->proto.udp->remote_ip, pesp_source->proto.udp->remote_ip, 4); + os_memcpy(pesp_dest->proto.udp->local_ip, pesp_source->proto.udp->local_ip, 4); + } + pesp_dest->recv_callback = pesp_source->recv_callback; + pesp_dest->sent_callback = pesp_source->sent_callback; + pesp_dest->link_cnt = pesp_source->link_cnt; + pesp_dest->reverse = pesp_source->reverse; +} + +/****************************************************************************** + * FunctionName : espconn_copy_partial + * Description : insert the node to the active connection list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_list_creat(espconn_msg **phead, espconn_msg* pinsert) +{ + espconn_msg *plist = NULL; +// espconn_msg *ptest = NULL; + if (*phead == NULL) + *phead = pinsert; + else { + plist = *phead; + while (plist->pnext != NULL) { + plist = plist->pnext; + } + plist->pnext = pinsert; + } + pinsert->pnext = NULL; + +/* ptest = *phead; + while(ptest != NULL){ + os_printf("espconn_list_creat %p\n", ptest); + ptest = ptest->pnext; + }*/ +} + +/****************************************************************************** + * FunctionName : espconn_list_delete + * Description : remove the node from the active connection list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_list_delete(espconn_msg **phead, espconn_msg* pdelete) +{ + espconn_msg *plist = NULL; +// espconn_msg *ptest = NULL; + plist = *phead; + if (plist == NULL){ + *phead = NULL; + } else { + if (plist == pdelete){ + *phead = plist->pnext; + } else { + while (plist != NULL) { + if (plist->pnext == pdelete){ + plist->pnext = pdelete->pnext; + } + plist = plist->pnext; + } + } + } +/* ptest = *phead; + while(ptest != NULL){ + os_printf("espconn_list_delete %p\n", ptest); + ptest = ptest->pnext; + }*/ +} + +/****************************************************************************** + * FunctionName : espconn_pbuf_create + * Description : insert the node to the active connection list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_pbuf_create(espconn_buf **phead, espconn_buf* pinsert) +{ + espconn_buf *plist = NULL; + + if (*phead == NULL) + *phead = pinsert; + else { + plist = *phead; + while (plist->pnext != NULL) { + plist = plist->pnext; + } + plist->pnext = pinsert; + } + pinsert->pnext = NULL; +} + +/****************************************************************************** + * FunctionName : espconn_pbuf_delete + * Description : remove the node from the active connection list + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_pbuf_delete(espconn_buf **phead, espconn_buf* pdelete) +{ + espconn_buf *plist = NULL; + + plist = *phead; + if (plist == NULL){ + *phead = NULL; + } else { + if (plist == pdelete){ + *phead = plist->pnext; + } else { + while (plist != NULL) { + if (plist->pnext == pdelete){ + plist->pnext = pdelete->pnext; + } + plist = plist->pnext; + } + } + } +} + +/****************************************************************************** + * FunctionName : espconn_find_connection + * Description : Initialize the server: set up a listening PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build server + * Returns : true or false + *******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_find_connection(struct espconn *pespconn, espconn_msg **pnode) +{ + espconn_msg *plist = NULL; + struct ip_addr ip_remot; + struct ip_addr ip_list; + + if (pespconn == NULL) + return false; + + /*find the active connection node*/ + for (plist = plink_active; plist != NULL; plist = plist->pnext){ + if (pespconn == plist->pespconn) { + *pnode = plist; + return true; + } + } + + /*find the active server node*/ + for (plist = pserver_list; plist != NULL; plist = plist->pnext){ + if (pespconn == plist->pespconn) { + if (pespconn->proto.tcp == NULL) + return false; + + IP4_ADDR(&ip_remot, pespconn->proto.tcp->remote_ip[0], + pespconn->proto.tcp->remote_ip[1], + pespconn->proto.tcp->remote_ip[2], + pespconn->proto.tcp->remote_ip[3]); + if ((ip_remot.addr == IPADDR_ANY) || (pespconn->proto.tcp->remote_port == 0)) + return false; + + /*find the active connection node*/ + for (plist = plink_active; plist != NULL; plist = plist->pnext){ + IP4_ADDR(&ip_list, plist->pcommon.remote_ip[0], + plist->pcommon.remote_ip[1], plist->pcommon.remote_ip[2], + plist->pcommon.remote_ip[3]); + if ((ip_list.addr == ip_remot.addr) && (pespconn->proto.tcp->remote_port == plist->pcommon.remote_port)) { + *pnode = plist; + return true; + } + } + return false; + } + } + return false; +} + +/****************************************************************************** + * FunctionName : espconn_get_acticve_num + * Description : get the count of simulatenously active connections + * Parameters : type -- the type + * Returns : the count of simulatenously active connections + *******************************************************************************/ +static uint8 ICACHE_FLASH_ATTR +espconn_get_acticve_num(uint8 type) +{ + espconn_msg *plist = NULL; + uint8 num_tcp_active = 0; + + for (plist = plink_active; plist != NULL; plist = plist->pnext) { + if (plist->pespconn != NULL && plist->pespconn->type == type) { + num_tcp_active++; + } + } + + return num_tcp_active; +} + +/****************************************************************************** + * FunctionName : espconn_connect + * Description : The function given as the connect + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_connect(struct espconn *espconn) +{ + struct ip_addr ipaddr; + struct ip_info ipinfo; + uint8 connect_status = 0; + sint8 value = ESPCONN_OK; + espconn_msg *plist = NULL; + remot_info *pinfo = NULL; + + if (espconn == NULL) { + return ESPCONN_ARG; + } else if (espconn ->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Check the active node count whether is the limit or not*/ + if (espconn_get_acticve_num(ESPCONN_TCP) >= espconn_tcp_get_max_con()) + return ESPCONN_ISCONN; + + /*Check the IP address whether is zero or not in different mode*/ + if (wifi_get_opmode() == ESPCONN_STA){ + wifi_get_ip_info(STA_NETIF,&ipinfo); + if (ipinfo.ip.addr == 0){ + return ESPCONN_RTE; + } + } else if(wifi_get_opmode() == ESPCONN_AP){ + wifi_get_ip_info(AP_NETIF,&ipinfo); + if (ipinfo.ip.addr == 0){ + return ESPCONN_RTE; + } + } else if(wifi_get_opmode() == ESPCONN_AP_STA){ + IP4_ADDR(&ipaddr, espconn->proto.tcp->remote_ip[0], + espconn->proto.tcp->remote_ip[1], + espconn->proto.tcp->remote_ip[2], + espconn->proto.tcp->remote_ip[3]); + ipaddr.addr <<= 8; + wifi_get_ip_info(AP_NETIF,&ipinfo); + ipinfo.ip.addr <<= 8; + espconn_printf("softap_addr = %x, remote_addr = %x\n", ipinfo.ip.addr, ipaddr.addr); + + if (ipaddr.addr != ipinfo.ip.addr){ + connect_status = wifi_station_get_connect_status(); + if (connect_status == STATION_GOT_IP){ + wifi_get_ip_info(STA_NETIF,&ipinfo); + if (ipinfo.ip.addr == 0) + return ESPCONN_RTE; + } else if (connect_status == STATION_IDLE){ + return ESPCONN_RTE; + } else { + return connect_status; + } + } + } + + /*check the active node information whether is the same as the entity or not*/ + for (plist = plink_active; plist != NULL; plist = plist->pnext){ + if (plist->pespconn && plist->pespconn->type == ESPCONN_TCP){ + if (espconn->proto.tcp->local_port == plist->pespconn->proto.tcp->local_port){ + return ESPCONN_ISCONN; + } + } + } + + value = espconn_tcp_client(espconn); + + return value; +} + +/****************************************************************************** + * FunctionName : espconn_create + * Description : sent data for client or server + * Parameters : espconn -- espconn to the data transmission + * Returns : result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_create(struct espconn *espconn) +{ + sint8 value = ESPCONN_OK; + espconn_msg *plist = NULL; + + if (espconn == NULL) { + return ESPCONN_ARG; + } else if (espconn ->type != ESPCONN_UDP){ + return ESPCONN_ARG; + } + + /*check the active node information whether is the same as the entity or not*/ + for (plist = plink_active; plist != NULL; plist = plist->pnext){ + if (plist->pespconn && plist->pespconn->type == ESPCONN_UDP){ + if (espconn->proto.udp->local_port == plist->pespconn->proto.udp->local_port){ + return ESPCONN_ISCONN; + } + } + } + + value = espconn_udp_server(espconn); + + return value; +} + +/****************************************************************************** + * FunctionName : espconn_sent + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_sent(struct espconn *espconn, uint8 *psent, uint16 length) +{ + espconn_msg *pnode = NULL; + bool value = false; + err_t error = ESPCONN_OK; + + if (espconn == NULL || psent == NULL || length == 0) { + return ESPCONN_ARG; + } + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + + if (value){ + espconn ->state = ESPCONN_WRITE; + switch (espconn ->type) { + case ESPCONN_TCP: + /* calling sent function frequently,make sure last packet has been backup or sent fully*/ + if (pnode->pcommon.write_flag){ + espconn_buf *pbuf = NULL; + /*If total number of espconn_buf on the unsent lists exceeds the set maximum, return an error */ + if (espconn_copy_enabled(pnode)){ + if (espconn_tcp_get_buf_count(pnode->pcommon.pbuf) >= pnode ->pcommon.pbuf_num) + return ESPCONN_MAXNUM; + } else { + struct tcp_pcb *pcb = pnode->pcommon.pcb; + if (pcb->snd_queuelen >= TCP_SND_QUEUELEN) + return ESPCONN_MAXNUM; + } + + pbuf = (espconn_buf*) os_zalloc(sizeof(espconn_buf)); + if (pbuf == NULL) + return ESPCONN_MEM; + else { + /*Backup the application packet information for send more data*/ + pbuf->payload = psent; + pbuf->punsent = pbuf->payload; + pbuf->unsent = length; + pbuf->len = length; + /*insert the espconn_pbuf to the list*/ + espconn_pbuf_create(&pnode->pcommon.pbuf, pbuf); + if (pnode->pcommon.ptail == NULL) + pnode->pcommon.ptail = pbuf; + } + /*when set the data copy option. change the flag for next packet*/ + if (espconn_copy_disabled(pnode)) + pnode->pcommon.write_flag = false; + error = espconn_tcp_write(pnode); +// if (error != ESPCONN_OK){ +// /*send the application packet fail, +// * ensure that each allocated is deleted*/ +// espconn_pbuf_delete(&pnode->pcommon.pbuf, pbuf); +// os_free(pbuf); +// pbuf = NULL; +// } + return error; + } else + return ESPCONN_ARG; + break; + + case ESPCONN_UDP: + return espconn_udp_sent(pnode, psent, length); + break; + + default : + break; + } + } + return ESPCONN_ARG; +} + +sint16 ICACHE_FLASH_ATTR espconn_recv(struct espconn *espconn, void *mem, size_t len) +{ + espconn_msg *pnode = NULL; + bool value = false; + int bytes_used = 0; + struct tcp_pcb *tpcb = NULL; + if (espconn == NULL || mem == NULL || len == 0) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value && espconn->type == ESPCONN_TCP){ + if (pnode->readbuf != NULL){ + bytes_used = ringbuf_bytes_used(pnode->readbuf); + if (bytes_used != 0) { + if (len > bytes_used) { + len = bytes_used; + } + ringbuf_memcpy_from(mem, pnode->readbuf, len); + tpcb = pnode->pcommon.pcb; + if (tpcb && tpcb->state == ESTABLISHED) + tcp_recved(pnode->pcommon.pcb, len); + return len; + } else { + return ESPCONN_OK; + } + } else{ + return ESPCONN_MEM; + } + } else{ + return ESPCONN_ARG; + } + + return ESPCONN_ARG; +} + +sint16 ICACHE_FLASH_ATTR espconn_recved_len(struct espconn *espconn) +{ + espconn_msg *pnode = NULL; + bool value = false; + + if (espconn == NULL) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value && espconn->type == ESPCONN_TCP){ + if (pnode->readbuf != NULL){ + return (sint16)ringbuf_bytes_used(pnode->readbuf); + } else{ + return 0; + } + } + + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_sendto + * Description : send data for UDP + * Parameters : espconn -- espconn to set for UDP + * psent -- data to send + * length -- length of data to send + * Returns : error +*******************************************************************************/ +sint16 ICACHE_FLASH_ATTR +espconn_sendto(struct espconn *espconn, uint8 *psent, uint16 length) +{ + espconn_msg *pnode = NULL; + bool value = false; + err_t error = ESPCONN_OK; + + if (espconn == NULL || psent == NULL || length == 0) { + return ESPCONN_ARG; + } + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value && espconn->type == ESPCONN_UDP) + return espconn_udp_sendto(pnode, psent, length); + else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_send + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +sint8 espconn_send(struct espconn *espconn, uint8 *psent, uint16 length) __attribute__((alias("espconn_sent"))); + +/****************************************************************************** + * FunctionName : espconn_tcp_get_wnd + * Description : get the window size of simulatenously active TCP connections + * Parameters : none + * Returns : the number of TCP_MSS active TCP connections +*******************************************************************************/ +uint8 ICACHE_FLASH_ATTR espconn_tcp_get_wnd(void) +{ + uint8 tcp_num = 0; + + tcp_num = (TCP_WND / TCP_MSS); + + return tcp_num; +} +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con + * Description : set the window size simulatenously active TCP connections + * Parameters : num -- the number of TCP_MSS + * Returns : ESPCONN_ARG -- Illegal argument + * ESPCONN_OK -- No error +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_set_wnd(uint8 num) +{ + if (num == 0 || num > linkMax) + return ESPCONN_ARG; + + TCP_WND = (num * TCP_MSS); + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_get_mss + * Description : get the mss size of simulatenously active TCP connections + * Parameters : none + * Returns : the size of TCP_MSS active TCP connections +*******************************************************************************/ +uint16 ICACHE_FLASH_ATTR espconn_tcp_get_mss(void) +{ + uint16 tcp_num = 0; + + tcp_num = TCP_MSS; + + return tcp_num; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_con + * Description : get the number of simulatenously active TCP connections + * Parameters : espconn -- espconn to set the connect callback + * Returns : none +*******************************************************************************/ +uint8 ICACHE_FLASH_ATTR espconn_tcp_get_max_con(void) +{ + uint8 tcp_num = 0; + + tcp_num = MEMP_NUM_TCP_PCB; + + return tcp_num; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con + * Description : set the number of simulatenously active TCP connections + * Parameters : espconn -- espconn to set the connect callback + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_set_max_con(uint8 num) +{ + if (num == 0 || num > linkMax) + return ESPCONN_ARG; + + MEMP_NUM_TCP_PCB = num; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_retran + * Description : get the Maximum number of retransmissions of data active TCP connections + * Parameters : none + * Returns : the Maximum number of retransmissions +*******************************************************************************/ +uint8 ICACHE_FLASH_ATTR espconn_tcp_get_max_retran(void) +{ + uint8 tcp_num = 0; + + tcp_num = TCP_MAXRTX; + + return tcp_num; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_retran + * Description : set the Maximum number of retransmissions of data active TCP connections + * Parameters : num -- the Maximum number of retransmissions + * Returns : result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_set_max_retran(uint8 num) +{ + if (num == 0 || num > 12) + return ESPCONN_ARG; + + TCP_MAXRTX = num; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_syn + * Description : get the Maximum number of retransmissions of SYN segments + * Parameters : none + * Returns : the Maximum number of retransmissions +*******************************************************************************/ +uint8 ICACHE_FLASH_ATTR espconn_tcp_get_max_syn(void) +{ + uint8 tcp_num = 0; + + tcp_num = TCP_SYNMAXRTX; + + return tcp_num; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_syn + * Description : set the Maximum number of retransmissions of SYN segments + * Parameters : num -- the Maximum number of retransmissions + * Returns : result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_set_max_syn(uint8 num) +{ + if (num == 0 || num > 12) + return ESPCONN_ARG; + + TCP_SYNMAXRTX = num; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_get_max_con_allow + * Description : get the count of simulatenously active connections on the server + * Parameters : espconn -- espconn to get the count + * Returns : result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_get_max_con_allow(struct espconn *espconn) +{ + espconn_msg *pget_msg = NULL; + if ((espconn == NULL) || (espconn->type == ESPCONN_UDP)) + return ESPCONN_ARG; + + pget_msg = pserver_list; + while (pget_msg != NULL){ + if (pget_msg->pespconn == espconn){ + return pget_msg->count_opt; + } + pget_msg = pget_msg->pnext; + } + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_set_max_con_allow + * Description : set the count of simulatenously active connections on the server + * Parameters : espconn -- espconn to set the count + * Returns : result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_set_max_con_allow(struct espconn *espconn, uint8 num) +{ + espconn_msg *pset_msg = NULL; + if ((espconn == NULL) || (num > MEMP_NUM_TCP_PCB) || (espconn->type == ESPCONN_UDP)) + return ESPCONN_ARG; + + pset_msg = pserver_list; + while (pset_msg != NULL){ + if (pset_msg->pespconn == espconn){ + pset_msg->count_opt = num; + return ESPCONN_OK; + } + pset_msg = pset_msg->pnext; + } + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_set_buf_count + * Description : set the total number of espconn_buf on the unsent lists for one + * activate connection + * Parameters : espconn -- espconn to set the count + * num -- the total number of espconn_buf + * Returns : result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_set_buf_count(struct espconn *espconn, uint8 num) +{ + espconn_msg *plist = NULL; + if (espconn == NULL || (num > TCP_SND_QUEUELEN)) + return ESPCONN_ARG; + + /*find the node from the active connection list*/ + for (plist = plink_active; plist != NULL; plist = plist->pnext){ + if (plist->pespconn && plist->pespconn == espconn && espconn->type == ESPCONN_TCP){ + plist->pcommon.pbuf_num = num; + return ESPCONN_OK; + } + } + + if (plist == NULL) + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_get_buf_count + * Description : get the count of the current node which has espconn_buf + * Parameters : pesp_buf -- the list head of espconn_buf type + * Returns : the count of the current node which has espconn_buf +*******************************************************************************/ +static uint8 ICACHE_FLASH_ATTR espconn_tcp_get_buf_count(espconn_buf *pesp_buf) +{ + espconn_buf *pbuf_list = pesp_buf; + uint8 pbuf_num = 0; + + /*polling the list get the count of the current node*/ + while (pbuf_list != NULL){ + pbuf_list = pbuf_list->pnext; + pbuf_num ++; + } + return pbuf_num; +} + +/****************************************************************************** + * FunctionName : espconn_regist_sentcb + * Description : Used to specify the function that should be called when data + * has been successfully delivered to the remote host. + * Parameters : espconn -- espconn to set the sent callback + * sent_cb -- sent callback function to call for this espconn + * when data is successfully sent + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_regist_sentcb(struct espconn *espconn, espconn_sent_callback sent_cb) +{ + if (espconn == NULL) { + return ESPCONN_ARG; + } + + espconn ->sent_callback = sent_cb; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_regist_sentcb + * Description : Used to specify the function that should be called when data + * has been successfully delivered to the remote host. + * Parameters : espconn -- espconn to set the sent callback + * sent_cb -- sent callback function to call for this espconn + * when data is successfully sent + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_regist_write_finish(struct espconn *espconn, espconn_connect_callback write_finish_fn) +{ + if (espconn == NULL || espconn ->proto.tcp == NULL || espconn->type == ESPCONN_UDP) { + return ESPCONN_ARG; + } + + espconn ->proto.tcp->write_finish_fn = write_finish_fn; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_regist_connectcb + * Description : used to specify the function that should be called when + * connects to host. + * Parameters : espconn -- espconn to set the connect callback + * connect_cb -- connected callback function to call when connected + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_regist_connectcb(struct espconn *espconn, espconn_connect_callback connect_cb) +{ + if (espconn == NULL) { + return ESPCONN_ARG; + } + + espconn->proto.tcp->connect_callback = connect_cb; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_regist_recvcb + * Description : used to specify the function that should be called when recv + * data from host. + * Parameters : espconn -- espconn to set the recv callback + * recv_cb -- recv callback function to call when recv data + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_regist_recvcb(struct espconn *espconn, espconn_recv_callback recv_cb) +{ + if (espconn == NULL) { + return ESPCONN_ARG; + } + + espconn ->recv_callback = recv_cb; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_regist_reconcb + * Description : used to specify the function that should be called when connection + * because of err disconnect. + * Parameters : espconn -- espconn to set the err callback + * recon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_regist_reconcb(struct espconn *espconn, espconn_reconnect_callback recon_cb) +{ + if (espconn == NULL) { + return ESPCONN_ARG; + } + + espconn ->proto.tcp->reconnect_callback = recon_cb; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_regist_disconcb + * Description : used to specify the function that should be called when disconnect + * Parameters : espconn -- espconn to set the err callback + * discon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_regist_disconcb(struct espconn *espconn, espconn_connect_callback discon_cb) +{ + if (espconn == NULL) { + return ESPCONN_ARG; + } + + espconn ->proto.tcp->disconnect_callback = discon_cb; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_get_connection_info + * Description : used to specify the function that should be called when disconnect + * Parameters : espconn -- espconn to set the err callback + * discon_cb -- err callback function to call when err + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_get_connection_info(struct espconn *pespconn, remot_info **pcon_info, uint8 typeflags) +{ + espconn_msg *plist = NULL; + + if (pespconn == NULL) + return ESPCONN_ARG; + + os_memset(premot, 0, sizeof(premot)); + pespconn->link_cnt = 0; + plist = plink_active; + switch (pespconn->type){ + case ESPCONN_TCP: + while(plist != NULL){ + if (plist->preverse == pespconn){ + premot[pespconn->link_cnt].state = plist->pespconn->state; + premot[pespconn->link_cnt].remote_port = plist->pcommon.remote_port; + os_memcpy(premot[pespconn->link_cnt].remote_ip, plist->pcommon.remote_ip, 4); + if (!plist->close_flag) { + pespconn->link_cnt ++; + } + } + plist = plist->pnext; + } + + break; + case ESPCONN_UDP: + while(plist != NULL){ + if (plist->pespconn == pespconn){ + premot[pespconn->link_cnt].state = plist->pespconn->state; + premot[pespconn->link_cnt].remote_port = plist->pcommon.remote_port; + os_memcpy(premot[pespconn->link_cnt].remote_ip, plist->pcommon.remote_ip, 4); + pespconn->link_cnt ++; + } + plist = plist->pnext; + } + break; + default: + break; + } + *pcon_info = premot; + if (pespconn->link_cnt == 0) + return ESPCONN_ARG; + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_accept + * Description : The function given as the listen + * Parameters : espconn -- the espconn used to listen the connection + * Returns : +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_accept(struct espconn *espconn) +{ + sint8 value = ESPCONN_OK; + espconn_msg *plist = NULL; + + if (espconn == NULL) { + return ESPCONN_ARG; + } else if (espconn ->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*check the active node information whether is the same as the entity or not*/ + for (plist = plink_active; plist != NULL; plist = plist->pnext){ + if (plist->pespconn && plist->pespconn->type == ESPCONN_TCP){ + if (espconn->proto.tcp->local_port == plist->pespconn->proto.tcp->local_port){ + return ESPCONN_ISCONN; + } + } + } + value = espconn_tcp_server(espconn); + + return value; +} + +/****************************************************************************** + * FunctionName : espconn_regist_time + * Description : used to specify the time that should be called when don't recv data + * Parameters : espconn -- the espconn used to the connection + * interval -- the timer when don't recv data + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_regist_time(struct espconn *espconn, uint32 interval, uint8 type_flag) +{ + espconn_msg *pnode = NULL; + espconn_msg *ptime_msg = NULL; + bool value = false; + if ((espconn == NULL) || (type_flag > 0x01)) + return ESPCONN_ARG; + + if (type_flag == 0x01){ + /*set the timeout time for one active connection of the server*/ + value = espconn_find_connection(espconn, &pnode); + if (value){ + pnode->pcommon.timeout = interval; + return ESPCONN_OK; + } else + return ESPCONN_ARG; + } else { + /*set the timeout time for all active connection of the server*/ + ptime_msg = pserver_list; + while (ptime_msg != NULL){ + if (ptime_msg->pespconn == espconn){ + ptime_msg->pcommon.timeout = interval; + return ESPCONN_OK; + } + ptime_msg = ptime_msg->pnext; + } + } + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_disconnect + * Description : disconnect with host + * Parameters : espconn -- the espconn used to disconnect the connection + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_disconnect(struct espconn *espconn) +{ + espconn_msg *pnode = NULL; + bool value = false; + + if (espconn == NULL) { + return ESPCONN_ARG;; + } else if (espconn ->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + + if (value){ + /*protect for redisconnection*/ + if (pnode->preverse == NULL && espconn->state == ESPCONN_CLOSE) + return ESPCONN_INPROGRESS; + espconn_tcp_disconnect(pnode,0); //1 force, 0 normal + return ESPCONN_OK; + } else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_abort + * Description : Forcely abort with host + * Parameters : espconn -- the espconn used to disconnect the connection + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_abort(struct espconn *espconn) +{ + espconn_msg *pnode = NULL; + bool value = false; + + if (espconn == NULL) { + return ESPCONN_ARG;; + } else if (espconn ->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + + if (value){ + /*protect for redisconnection*/ + if (espconn->state == ESPCONN_CLOSE) + return ESPCONN_INPROGRESS; + espconn_tcp_disconnect(pnode,1); //1 force, 0 normal + return ESPCONN_OK; + } else + return ESPCONN_ARG; +} + + +/****************************************************************************** + * FunctionName : espconn_get_packet_info + * Description : get the packet info with host + * Parameters : espconn -- the espconn used to disconnect the connection + * infoarg -- the packet info + * Returns : the errur code +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_get_packet_info(struct espconn *espconn, struct espconn_packet* infoarg) +{ + espconn_msg *pnode = NULL; + err_t err; + bool value = false; + + if (espconn == NULL || infoarg == NULL) { + return ESPCONN_ARG;; + } else if (espconn->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value) { + struct tcp_pcb *pcb = pnode->pcommon.pcb; + if (pcb == NULL) + return ESPCONN_ARG; + + pnode->pcommon.packet_info.packseq_nxt = pcb->rcv_nxt; + pnode->pcommon.packet_info.packseqno = pcb->snd_nxt; + pnode->pcommon.packet_info.snd_buf_size = pcb->snd_buf; + pnode->pcommon.packet_info.total_queuelen = TCP_SND_QUEUELEN; + pnode->pcommon.packet_info.snd_queuelen = pnode->pcommon.packet_info.total_queuelen - pcb->snd_queuelen; + os_memcpy(infoarg,(void*)&pnode->pcommon.packet_info, sizeof(struct espconn_packet)); + return ESPCONN_OK; + } else { + switch (espconn->state){ + case ESPCONN_CLOSE: + os_memcpy(infoarg,(void*)&pktinfo[0], sizeof(struct espconn_packet)); + err = ESPCONN_OK; + break; + case ESPCONN_NONE: + os_memcpy(infoarg,(void*)&pktinfo[1], sizeof(struct espconn_packet)); + err = ESPCONN_OK; + break; + default: + err = ESPCONN_ARG; + break; + } + return err; + } +} + +/****************************************************************************** + * FunctionName : espconn_set_opt + * Description : set the option for connections so that we don't end up bouncing + * all connections at the same time . + * Parameters : espconn -- the espconn used to set the connection + * opt -- the option for set + * Returns : the result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_set_opt(struct espconn *espconn, uint8 opt) +{ + espconn_msg *pnode = NULL; + struct tcp_pcb *tpcb; + bool value = false; + + if (espconn == NULL) { + return ESPCONN_ARG;; + } else if (espconn->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value) { + pnode->pcommon.espconn_opt |= opt; + tpcb = pnode->pcommon.pcb; + if (NULL == tpcb) + return ESPCONN_OK; + if (espconn_delay_disabled(pnode)) + tcp_nagle_disable(tpcb); + + if (espconn_keepalive_disabled(pnode)) + espconn_keepalive_enable(tpcb); + + return ESPCONN_OK; + } else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_clear_opt + * Description : clear the option for connections so that we don't end up bouncing + * all connections at the same time . + * Parameters : espconn -- the espconn used to set the connection + * opt -- the option for clear + * Returns : the result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_clear_opt(struct espconn *espconn, uint8 opt) +{ + espconn_msg *pnode = NULL; + struct tcp_pcb *tpcb; + bool value = false; + + if (espconn == NULL) { + return ESPCONN_ARG;; + } else if (espconn->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value) { + pnode->pcommon.espconn_opt &= ~opt; + tpcb = pnode->pcommon.pcb; + if (NULL == tpcb) + return ESPCONN_OK; + if (espconn_keepalive_enabled(pnode)) + espconn_keepalive_disable(tpcb); + + if (espconn_delay_enabled(pnode)) + tcp_nagle_enable(tpcb); + + return ESPCONN_OK; + } else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_set_keepalive + * Description : access level value for connection so that we set the value for + * keep alive + * Parameters : espconn -- the espconn used to set the connection + * level -- the connection's level + * value -- the value of time(s) + * Returns : access port value +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_set_keepalive(struct espconn *espconn, uint8 level, void* optarg) +{ + espconn_msg *pnode = NULL; + bool value = false; + sint8 ret = ESPCONN_OK; + + if (espconn == NULL || optarg == NULL) { + return ESPCONN_ARG;; + } else if (espconn->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value && espconn_keepalive_disabled(pnode)) { + struct tcp_pcb *pcb = pnode->pcommon.pcb; + if (NULL == pcb) + return ESPCONN_OK; + switch (level){ + case ESPCONN_KEEPIDLE: + pcb->keep_idle = 1000 * (u32_t)(*(int*)optarg); + ret = ESPCONN_OK; + break; + case ESPCONN_KEEPINTVL: + pcb->keep_intvl = 1000 * (u32_t)(*(int*)optarg); + ret = ESPCONN_OK; + break; + case ESPCONN_KEEPCNT: + pcb->keep_cnt = (u32_t)(*(int*)optarg); + ret = ESPCONN_OK; + break; + default: + ret = ESPCONN_ARG; + break; + } + return ret; + } else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_get_keepalive + * Description : access level value for connection so that we get the value for + * keep alive + * Parameters : espconn -- the espconn used to get the connection + * level -- the connection's level + * Returns : access keep alive value +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_get_keepalive(struct espconn *espconn, uint8 level, void *optarg) +{ + espconn_msg *pnode = NULL; + bool value = false; + sint8 ret = ESPCONN_OK; + + if (espconn == NULL || optarg == NULL) { + return ESPCONN_ARG;; + } else if (espconn->type != ESPCONN_TCP) + return ESPCONN_ARG; + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + if (value && espconn_keepalive_disabled(pnode)) { + struct tcp_pcb *pcb = pnode->pcommon.pcb; + if (NULL == pcb) + return ESPCONN_OK; + switch (level) { + case ESPCONN_KEEPIDLE: + *(int*)optarg = (int)(pcb->keep_idle/1000); + ret = ESPCONN_OK; + break; + case ESPCONN_KEEPINTVL: + *(int*)optarg = (int)(pcb->keep_intvl/1000); + ret = ESPCONN_OK; + break; + case ESPCONN_KEEPCNT: + *(int*)optarg = (int)(pcb->keep_cnt); + ret = ESPCONN_OK; + break; + default: + ret = ESPCONN_ARG; + break; + } + return ret; + } else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_delete + * Description : disconnect with host + * Parameters : espconn -- the espconn used to disconnect the connection + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_delete(struct espconn *espconn) +{ + espconn_msg *pnode = NULL; + bool value = false; + + if (espconn == NULL) { + return ESPCONN_ARG; + } else if (espconn ->type != ESPCONN_UDP) + return espconn_tcp_delete(espconn); + + /*Find the node depend on the espconn message*/ + value = espconn_find_connection(espconn, &pnode); + + if (value){ + espconn_udp_disconnect(pnode); + return ESPCONN_OK; + } else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_port + * Description : access port value for client so that we don't end up bouncing + * all connections at the same time . + * Parameters : none + * Returns : access port value +*******************************************************************************/ +uint32 ICACHE_FLASH_ATTR +espconn_port(void) +{ + uint32 port = 0; + static uint32 randnum = 0; + + do { + port = os_random(); + + if (port < 0) { + port = os_random() - port; + } + + port %= 0xc350; + + if (port < 0x400) { + port += 0x400; + } + + } while (port == randnum); + + randnum = port; + + return port; +} + +/****************************************************************************** + * FunctionName : espconn_gethostbyname + * Description : Resolve a hostname (string) into an IP address. + * Parameters : pespconn -- espconn to resolve a hostname + * hostname -- the hostname that is to be queried + * addr -- pointer to a ip_addr_t where to store the address if + * it is already cached in the dns_table (only valid if + * ESPCONN_OK is returned!) + * found -- a callback function to be called on success, failure + * or timeout (only if ERR_INPROGRESS is returned!) + * Returns : err_t return code + * - ESPCONN_OK if hostname is a valid IP address string or the host + * name is already in the local names table. + * - ESPCONN_INPROGRESS enqueue a request to be sent to the DNS server + * for resolution if no errors are present. + * - ESPCONN_ARG: dns client not initialized or invalid hostname +*******************************************************************************/ +err_t ICACHE_FLASH_ATTR +espconn_gethostbyname(struct espconn *pespconn, const char *hostname, ip_addr_t *addr, dns_found_callback found) +{ + return dns_gethostbyname(hostname, addr, found, pespconn); +} + +/****************************************************************************** + * FunctionName : espconn_dns_setserver + * Description : Initialize one of the DNS servers. + * Parameters : numdns -- the index of the DNS server to set must + * be < DNS_MAX_SERVERS = 2 + * dnsserver -- IP address of the DNS server to set + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_dns_setserver(u8_t numdns, ip_addr_t *dnsserver) +{ + + manual_set_flag = true; + if(dnsserver == NULL) { + ip_addr_t default_dns_server; + default_dns_server.addr = 0xDEDE43D0; + dns_setserver(0,&default_dns_server); + dns_setserver(1,&default_dns_server); + manual_set_flag = false; + return; + } + return dns_setserver(numdns,dnsserver); + +} + +/****************************************************************************** + * FunctionName : espconn_dns_getserver + * Description : get dns server. + * Parameters : numdns -- the index of the DNS server ,must + * be < DNS_MAX_SERVERS = 2 + * Returns : dnsserver -- struct ip_addr_t +*******************************************************************************/ +ip_addr_t ICACHE_FLASH_ATTR +espconn_dns_getserver(u8_t numdns) +{ + return dns_getserver(numdns); +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_buf.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_buf.c new file mode 100644 index 0000000..8ab891b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_buf.c @@ -0,0 +1,223 @@ +/* + * espconn_buf.c + * + * Created on: May 25, 2016 + * Author: liuhan + */ + +#include "lwip/memp.h" +#include "lwip/def.h" +#include "ets_sys.h" +#include "os_type.h" +#include "lwip/app/espconn_buf.h" + + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +#if (!defined(lwIP_unlikely)) +#define lwIP_unlikely(Expression) !!(Expression) +#endif + +#define lwIP_ASSERT(Expression) do{if(!(Expression)) {os_printf("%s %d\n", __func__, __LINE__);return 0;}}while(0) +#define lwIP_ASSERTS(Expression) do{if(!(Expression)) {os_printf("%s %d\n", __func__, __LINE__);return;}}while(0) + +ringbuf_t ICACHE_FLASH_ATTR +ringbuf_new(size_t capacity) +{ + ringbuf_t rb = (ringbuf_t)os_zalloc(sizeof(struct ringbuf_t)); + if (rb){ + rb->size = capacity + 1; + rb->buf = (uint8*)os_zalloc(rb->size); + if (rb->buf){ + ringbuf_reset(rb); + }else{ + os_free(rb); + return NULL; + } + } + return rb; +} + +size_t ICACHE_FLASH_ATTR +ringbuf_buffer_size(const struct ringbuf_t *rb) +{ + return rb->size; +} + +void ICACHE_FLASH_ATTR +ringbuf_reset(ringbuf_t rb) +{ + rb ->head = rb->tail = rb->buf; +} + +void ICACHE_FLASH_ATTR +ringbuf_free(ringbuf_t *rb) +{ + lwIP_ASSERTS(rb && *rb); + os_free((*rb)->buf); + os_free(*rb); + *rb = NULL; +} + +size_t ICACHE_FLASH_ATTR +ringbuf_capacity(const struct ringbuf_t *rb) +{ + return ringbuf_buffer_size(rb) - 1; +} + +static const uint8_t* ICACHE_FLASH_ATTR +ringbuf_end(const struct ringbuf_t *rb) +{ + return rb->buf + ringbuf_buffer_size(rb); +} + +size_t ICACHE_FLASH_ATTR +ringbuf_bytes_free(const struct ringbuf_t *rb) +{ + if (rb->head >= rb->tail){ + return ringbuf_capacity(rb) - (rb->head - rb->tail); + }else{ + return rb->tail - rb->head -1; + } +} + +size_t ICACHE_FLASH_ATTR +ringbuf_bytes_used(const struct ringbuf_t *rb) +{ + return ringbuf_capacity(rb) - ringbuf_bytes_free(rb); +} + +int ICACHE_FLASH_ATTR +ringbuf_is_full(const struct ringbuf_t *rb) +{ + return ringbuf_bytes_free(rb) == 0; +} + +int ICACHE_FLASH_ATTR +ringbuf_is_empty(const struct ringbuf_t *rb) +{ + return ringbuf_bytes_free(rb) == ringbuf_capacity(rb); +} + +const void* ICACHE_FLASH_ATTR +ringbuf_tail(const struct ringbuf_t *rb) +{ + return rb->tail; +} +const void* ICACHE_FLASH_ATTR +ringbuf_head(const struct ringbuf_t *rb) +{ + return rb->head; +} + +static uint8_t* ICACHE_FLASH_ATTR +ringbuf_nextp(ringbuf_t rb, const uint8_t *p) +{ + lwIP_ASSERT((p >= rb->buf) && (p < ringbuf_end(rb))); + return rb->buf + ((++p -rb->buf) % ringbuf_buffer_size(rb)); +} + +size_t ICACHE_FLASH_ATTR +ringbuf_findchr(const struct ringbuf_t *rb, int c, size_t offset) +{ + const uint8_t *bufend = ringbuf_end(rb); + size_t bytes_used = ringbuf_bytes_used(rb); + if (offset >= bytes_used) + return bytes_used; + + const uint8_t *start = rb ->buf + (((rb->tail - rb->buf) + offset) % ringbuf_buffer_size(rb)); + lwIP_ASSERT(bufend > start); + size_t n = LWIP_MIN(bufend - start, bytes_used - offset); + const uint8_t *found = (const uint8_t *)memchr(start, c, n); + if (found) + return offset + (found - start); + else + return ringbuf_findchr(rb, c, offset + n); +} + +size_t ICACHE_FLASH_ATTR +ringbuf_memset(ringbuf_t dst, int c, size_t len) +{ + const uint8_t *bufend = ringbuf_end(dst); + size_t nwritten = 0; + size_t count = LWIP_MIN(len, ringbuf_buffer_size(dst)); + int overflow = count > ringbuf_bytes_free(dst); + + while (nwritten != count){ + + lwIP_ASSERT(bufend > dst->head); + size_t n = LWIP_MIN(bufend - dst->head, count - nwritten); + os_memset(dst->head, c, n); + dst->head += n; + nwritten += n; + + if (dst->head == bufend) + dst->head = dst->buf; + } + + if (overflow){ + dst->tail = ringbuf_nextp(dst, dst->head); + lwIP_ASSERT(ringbuf_is_full(dst)); + } + + return nwritten; +} + +void* ICACHE_FLASH_ATTR +ringbuf_memcpy_into(ringbuf_t dst,const void *src, size_t count) +{ + const uint8_t *u8src = src; + const uint8_t *bufend = ringbuf_end(dst); + int overflow = count > ringbuf_bytes_free(dst); + size_t nread = 0; + + while (nread != count){ + lwIP_ASSERT(bufend > dst->head); + size_t n = LWIP_MIN(bufend - dst->head, count - nread); + os_memcpy(dst->head, u8src + nread, n); + dst->head += n; + nread += n; + + if (dst->head == bufend) + dst->head = dst->buf; + } + + if (overflow) { + dst->tail = ringbuf_nextp(dst, dst->head); + lwIP_ASSERT(ringbuf_is_full(dst)); + } + + return dst->head; +} + +void* ICACHE_FLASH_ATTR +ringbuf_memcpy_from(void *dst,ringbuf_t src, size_t count) +{ + size_t bytes_used = ringbuf_bytes_used(src); + + if (count > bytes_used) + return NULL; + + const uint8_t *u8dst = dst; + const uint8_t *bufend = ringbuf_end(src); + size_t nwritten = 0; + + while (nwritten != count){ + lwIP_ASSERT(bufend > src->tail); + size_t n = LWIP_MIN(bufend - src->tail, count - nwritten); + os_memcpy((uint8_t*)u8dst + nwritten, src->tail, n); + src->tail += n; + nwritten += n; + + if (src->tail == bufend) + src->tail = src->buf; + } + + lwIP_ASSERT(count + ringbuf_bytes_used(src) == bytes_used); + return src->tail; +} + + + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_mdns.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_mdns.c new file mode 100755 index 0000000..a29c64a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_mdns.c @@ -0,0 +1,134 @@ +/****************************************************************************** + * Copyright 2013-2014 Espressif Systems (Wuxi) + * + * FileName: espconn_mdns.c + * + * Description: udp proto interface + * + * Modification history: + * 2014/3/31, v1.0 create this file. +*******************************************************************************/ + +#include "ets_sys.h" +#include "os_type.h" + +#include "lwip/mdns.h" + +/****************************************************************************** + * FunctionName : espconn_mdns_enable + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_enable(void) +{ + mdns_enable(); +} +/****************************************************************************** + * FunctionName : espconn_mdns_disable + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_disable(void) +{ + mdns_disable(); +} + +/****************************************************************************** + * FunctionName : espconn_mdns_set_hostname + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_set_hostname(char *name) +{ + mdns_set_hostname(name); +} + +/****************************************************************************** + * FunctionName : espconn_mdns_init + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +char* ICACHE_FLASH_ATTR +espconn_mdns_get_hostname(void) +{ + return (char *)mdns_get_hostname(); +} +/****************************************************************************** + * FunctionName : espconn_mdns_get_servername + * Description : join a multicast group + * Parameters : info -- the info of mdns + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_set_servername(const char *name) +{ + mdns_set_servername(name); +} +/****************************************************************************** + * FunctionName : espconn_mdns_get_servername + * Description : join a multicast group + * Parameters : info -- the info of mdns + * Returns : none +*******************************************************************************/ +char* ICACHE_FLASH_ATTR +espconn_mdns_get_servername(void) +{ + return (char *)mdns_get_servername(); +} +/****************************************************************************** + * FunctionName : mdns_server_register + * Description : join a multicast group + * Parameters : info -- the info of mdns + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_server_register(void) +{ + mdns_server_register(); +} +/****************************************************************************** + * FunctionName : mdns_server_register + * Description : join a multicast group + * Parameters : info -- the info of mdns + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_server_unregister(void) +{ + mdns_server_unregister(); +} +/****************************************************************************** + * FunctionName : espconn_mdns_init + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_close(void) +{ + mdns_close(); +} +/****************************************************************************** + * FunctionName : espconn_mdns_init + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR +espconn_mdns_init(struct mdns_info *info) +{ + mdns_init(info); +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_tcp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_tcp.c new file mode 100755 index 0000000..ba58ffe --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_tcp.c @@ -0,0 +1,1559 @@ +/****************************************************************************** + * Copyright 2013-2014 Espressif Systems (Wuxi) + * + * FileName: espconn_tcp.c + * + * Description: tcp proto interface + * + * Modification history: + * 2014/3/31, v1.0 create this file. +*******************************************************************************/ + +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "netif/etharp.h" +#include "lwip/tcp.h" +#include "lwip/ip.h" +#include "lwip/init.h" +#include "lwip/tcp_impl.h" +#include "lwip/memp.h" + +#include "ets_sys.h" +#include "os_type.h" +//#include "os.h" +#include "lwip/mem.h" +#include "lwip/app/espconn_tcp.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +extern espconn_msg *plink_active; +extern espconn_msg *pserver_list; +extern struct espconn_packet pktinfo[2]; +extern struct tcp_pcb ** const tcp_pcb_lists[]; + +os_event_t espconn_TaskQueue[espconn_TaskQueueLen]; + +static err_t +espconn_client_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); +static void +espconn_client_close(void *arg, struct tcp_pcb *pcb,u8 type); + +static err_t +espconn_server_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); +static void +espconn_server_close(void *arg, struct tcp_pcb *pcb,u8 type); + +///////////////////////////////common function///////////////////////////////// +/****************************************************************************** + * FunctionName : espconn_kill_oldest + * Description : kill the oldest TCP block + * Parameters : none + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_kill_oldest(void) +{ + struct tcp_pcb *pcb, *inactive; + u32_t inactivity; + + inactivity = 0; + inactive = NULL; + /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */ + for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + if ((u32_t) (tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + } + } + if (inactive != NULL) { + tcp_abort(inactive); + } + + /* Go through the list of FIN_WAIT_2 pcbs and get the oldest pcb. */ + inactivity = 0; + inactive = NULL; + for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->state == FIN_WAIT_1 || pcb->state == FIN_WAIT_2){ + if ((u32_t) (tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + } + } + } + /*Purges the PCB, removes it from a PCB list and frees the memory*/ + if (inactive != NULL) { + tcp_pcb_remove(&tcp_active_pcbs, inactive); + memp_free(MEMP_TCP_PCB, inactive); + } + + /* Go through the list of LAST_ACK pcbs and get the oldest pcb. */ + inactivity = 0; + inactive = NULL; + for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->state == LAST_ACK) { + if ((u32_t) (tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + } + } + } + /*Purges the PCB, removes it from a PCB list and frees the memory*/ + if (inactive != NULL) { + tcp_pcb_remove(&tcp_active_pcbs, inactive); + memp_free(MEMP_TCP_PCB, inactive); + } +} + +/****************************************************************************** + * FunctionName : espconn_kill_oldest_pcb + * Description : find the oldest TCP block by state + * Parameters : none + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_kill_oldest_pcb(void) +{ + struct tcp_pcb *cpcb = NULL; + uint8 i = 0; + uint8 num_tcp_fin = 0; + for(i = 2; i < 4; i ++){ + for (cpcb = *tcp_pcb_lists[i]; cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->state == TIME_WAIT){ + num_tcp_fin ++; + if (num_tcp_fin == MEMP_NUM_TCP_PCB) + break; + } + + if (cpcb->state == FIN_WAIT_1 || cpcb->state == FIN_WAIT_2 || cpcb->state == LAST_ACK){ + num_tcp_fin++; + if (num_tcp_fin == MEMP_NUM_TCP_PCB) + break; + } + } + + if (num_tcp_fin == MEMP_NUM_TCP_PCB){ + num_tcp_fin = 0; + espconn_kill_oldest(); + } else if (cpcb == NULL){ + num_tcp_fin = 0; + } + } +} + +/****************************************************************************** + * FunctionName : espconn_kill_pcb + * Description : kill all the TCP block by port + * Parameters : none + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_kill_pcb(u16_t port) +{ + struct tcp_pcb *cpcb = NULL; + uint8 i = 0; + struct tcp_pcb *inactive = NULL; + struct tcp_pcb *prev = NULL; + u8_t pcb_remove; + /* Check if the address already is in use (on all lists) */ + for (i = 1; i < 4; i++) { + cpcb = *tcp_pcb_lists[i]; + while(cpcb != NULL){ + pcb_remove = 0; + if (cpcb->local_port == port) { + ++pcb_remove; + } + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + /* Remove PCB from tcp_pcb_lists list. */ + inactive = cpcb; + cpcb = inactive->next; + tcp_pcb_remove(tcp_pcb_lists[i], inactive); + memp_free(MEMP_TCP_PCB, inactive); + } else { + cpcb = cpcb->next; + } + } + } +} + +/****************************************************************************** + * FunctionName : espconn_find_current_pcb + * Description : find the TCP block which option + * Parameters : pcurrent_msg -- the node in the list which active + * Returns : TCP block point +*******************************************************************************/ +struct tcp_pcb *ICACHE_FLASH_ATTR espconn_find_current_pcb(espconn_msg *pcurrent_msg) +{ + uint16 local_port = pcurrent_msg->pcommon.local_port; + uint32 local_ip = pcurrent_msg->pcommon.local_ip; + uint16 remote_port = pcurrent_msg->pcommon.remote_port; + uint32 remote_ip = *((uint32*)&pcurrent_msg->pcommon.remote_ip); + struct tcp_pcb *find_pcb = NULL; + if (pcurrent_msg ->preverse == NULL){/*Find the server's TCP block*/ + if (local_ip == 0|| local_port == 0) return pcurrent_msg->pcommon.pcb; + + for (find_pcb = tcp_active_pcbs; find_pcb != NULL; find_pcb = find_pcb->next){ + if ((find_pcb->remote_port == remote_port) && (find_pcb->remote_ip.addr == remote_ip) && + (find_pcb->local_port == local_port) && (find_pcb->local_ip.addr == local_ip)) + return find_pcb; + } + + for (find_pcb = tcp_tw_pcbs; find_pcb != NULL; find_pcb = find_pcb->next){ + if ((find_pcb->remote_port == remote_port) && (find_pcb->remote_ip.addr == remote_ip) && + (find_pcb->local_port == local_port) && (find_pcb->local_ip.addr == local_ip)) + return find_pcb; + } + } else {/*Find the client's TCP block*/ + if (remote_ip == 0|| remote_port == 0) return pcurrent_msg->pcommon.pcb; + + for (find_pcb = tcp_active_pcbs; find_pcb != NULL; find_pcb = find_pcb->next){ + if ((find_pcb->remote_port == remote_port) && (find_pcb->remote_ip.addr == remote_ip)) + return find_pcb; + } + + for (find_pcb = tcp_tw_pcbs; find_pcb != NULL; find_pcb = find_pcb->next){ + if ((find_pcb->remote_port == remote_port) && (find_pcb->remote_ip.addr == remote_ip)) + return find_pcb; + } + } + return NULL; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_memp_free + * Description : frees the connection memory in the server mode + * Parameters : arg -- Additional argument to pass to the function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_tcp_memp_free(espconn_msg *pmemp) +{ + struct espconn *espconn = NULL; + if (pmemp == NULL) + return; + + /*Enable block option for fetches the data proactive*/ + if (espconn_manual_recv_disabled(pmemp)) + espconn_list_delete(&plink_active, pmemp); + + if (pmemp->espconn_mode == ESPCONN_TCPSERVER_MODE){ + if (pmemp->pespconn != NULL && pmemp->pespconn->proto.tcp != NULL) + os_free(pmemp->pespconn->proto.tcp); + pmemp->pespconn->proto.tcp = NULL; + + os_free(pmemp->pespconn); + pmemp->pespconn = NULL; + } + + if (pmemp->readbuf != NULL){ + ringbuf_free(&pmemp->readbuf); + } + os_free(pmemp); + pmemp = NULL; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_reconnect + * Description : reconnect with host + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_tcp_reconnect(void *arg) +{ + espconn_msg *precon_cb = arg; + sint8 re_err = 0; + espconn_buf *perr_buf = NULL; + espconn_buf *perr_back = NULL; + espconn_kill_oldest_pcb(); + if (precon_cb != NULL) { + struct espconn *espconn = precon_cb->preverse; + + re_err = precon_cb->pcommon.err; + if (precon_cb->pespconn != NULL){ + if (espconn != NULL){/*Process the server's message block*/ + if (precon_cb->pespconn->proto.tcp != NULL){ + espconn_copy_partial(espconn, precon_cb->pespconn); + } + } else {/*Process the client's message block*/ + espconn = precon_cb->pespconn; + } + } + + /*to prevent memory leaks, ensure that each allocated is deleted*/ + perr_buf = precon_cb->pcommon.pbuf; + while (perr_buf != NULL){ + perr_back = perr_buf; + perr_buf = perr_back->pnext; + espconn_pbuf_delete(&precon_cb->pcommon.pbuf,perr_back); + os_free(perr_back); + perr_back = NULL; + } + os_bzero(&pktinfo[1], sizeof(struct espconn_packet)); + os_memcpy(&pktinfo[1], (void*)&precon_cb->pcommon.packet_info, sizeof(struct espconn_packet)); + + if (espconn && espconn->proto.tcp && espconn->proto.tcp->reconnect_callback != NULL) { + espconn->proto.tcp->reconnect_callback(espconn, re_err); + } + + /*frees the connection memory*/ + espconn_tcp_memp_free(precon_cb); + } else { + espconn_printf("espconn_tcp_reconnect err\n"); + } +} + +/****************************************************************************** + * FunctionName : espconn_tcp_disconnect + * Description : disconnect with host + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_tcp_disconnect_successful(void *arg) +{ + espconn_msg *pdiscon_cb = arg; + sint8 dis_err = 0; + espconn_buf *pdis_buf = NULL; + espconn_buf *pdis_back = NULL; + espconn_kill_oldest_pcb(); + if (pdiscon_cb != NULL) { + struct espconn *espconn = pdiscon_cb->preverse; + + dis_err = pdiscon_cb->pcommon.err; + if (pdiscon_cb->pespconn != NULL){ + struct tcp_pcb *pcb = NULL; + if (espconn != NULL){/*Process the server's message block*/ + if (pdiscon_cb->pespconn->proto.tcp != NULL && espconn->proto.tcp){ + espconn_copy_partial(espconn, pdiscon_cb->pespconn); + } + } else {/*Process the client's message block*/ + espconn = pdiscon_cb->pespconn; + } + + /*process the current TCP block*/ + pcb = espconn_find_current_pcb(pdiscon_cb); + if (pcb != NULL){ + if (espconn_reuse_disabled(pdiscon_cb)) { + struct tcp_pcb *cpcb = NULL; + struct tcp_pcb *prev = NULL; + u8_t pcb_remove; + espconn_printf("espconn_tcp_disconnect_successful %d, %d\n", pcb->state, pcb->local_port); + cpcb = tcp_tw_pcbs; + while (cpcb != NULL) { + pcb_remove = 0; + if (cpcb->local_port == pcb->local_port) { + ++pcb_remove; + } + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + struct tcp_pcb *backup_pcb = NULL; + tcp_pcb_purge(cpcb); + /* Remove PCB from tcp_tw_pcbs list. */ + if (prev != NULL) { + LWIP_ASSERT("espconn_tcp_delete: middle cpcb != tcp_tw_pcbs",cpcb != tcp_tw_pcbs); + prev->next = cpcb->next; + } else { + /* This PCB was the first. */ + LWIP_ASSERT("espconn_tcp_delete: first cpcb == tcp_tw_pcbs",tcp_tw_pcbs == cpcb); + tcp_tw_pcbs = cpcb->next; + } + backup_pcb = cpcb; + cpcb = cpcb->next; + memp_free(MEMP_TCP_PCB, backup_pcb); + } else { + prev = cpcb; + cpcb = cpcb->next; + } + } + + } else { + tcp_arg(pcb, NULL); + tcp_err(pcb, NULL); + } + } + } + + /*to prevent memory leaks, ensure that each allocated is deleted*/ + pdis_buf = pdiscon_cb->pcommon.pbuf; + while (pdis_buf != NULL) { + pdis_back = pdis_buf; + pdis_buf = pdis_back->pnext; + espconn_pbuf_delete(&pdiscon_cb->pcommon.pbuf, pdis_back); + os_free(pdis_back); + pdis_back = NULL; + } + os_bzero(&pktinfo[0], sizeof(struct espconn_packet)); + os_memcpy(&pktinfo[0], (void*)&pdiscon_cb->pcommon.packet_info, sizeof(struct espconn_packet)); + + if (espconn->proto.tcp && espconn->proto.tcp->disconnect_callback != NULL) { + espconn->proto.tcp->disconnect_callback(espconn); + } + + /*frees the connection memory*/ + espconn_tcp_memp_free(pdiscon_cb); + } else { + espconn_printf("espconn_tcp_disconnect err\n"); + } +} + +/****************************************************************************** + * FunctionName : espconn_Task + * Description : espconn processing task + * Parameters : events -- contain the espconn processing data + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_Task(os_event_t *events) +{ + espconn_msg *plist = NULL; + bool active_flag = false; + espconn_msg *task_msg = NULL; + struct espconn *pespconn = NULL; + + task_msg = (espconn_msg *) events->par; + /*find the active connection node*/ + for (plist = plink_active; plist != NULL; plist = plist->pnext){ + if (task_msg == plist) { + active_flag = true; + break; + } + } + + if (active_flag){ + switch (events->sig) { + case SIG_ESPCONN_WRITE: { + pespconn = task_msg->pespconn; + if (pespconn == NULL) { + return; + } + + if (pespconn->proto.tcp->write_finish_fn != NULL) { + pespconn->proto.tcp->write_finish_fn(pespconn); + } + } + break; + case SIG_ESPCONN_ERRER: + /*remove the node from the client's active connection list*/ + if (espconn_manual_recv_enabled(task_msg)) { + espconn_list_delete(&plink_active, task_msg); + } else { + plist->close_flag = 1; + } + espconn_tcp_reconnect(task_msg); + break; + case SIG_ESPCONN_CLOSE: + /*remove the node from the client's active connection list*/ + if (espconn_manual_recv_enabled(task_msg)) { + espconn_list_delete(&plink_active, task_msg); + } else { + plist->close_flag = 1; + } + espconn_tcp_disconnect_successful(task_msg); + break; + default: + break; + } + } +} + +/****************************************************************************** + * FunctionName : espconn_tcp_sent + * Description : sent data for client or server + * Parameters : void *arg -- client or server to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : return espconn error code. + * - ESPCONN_OK. Successful. No error occured. + * - ESPCONN_MEM. Out of memory. + * - ESPCONN_RTE. Could not find route to destination address. + * - More errors could be returned by lower protocol layers. +*******************************************************************************/ +err_t ICACHE_FLASH_ATTR +espconn_tcp_sent(void *arg, uint8 *psent, uint16 length) +{ + espconn_msg *ptcp_sent = arg; + struct tcp_pcb *pcb = NULL; + err_t err = 0; + u16_t len = 0; + u8_t data_to_send = false; + + espconn_printf("espconn_tcp_sent ptcp_sent %p psent %p length %d\n", ptcp_sent, psent, length); + + /*Check the parameters*/ + if (ptcp_sent == NULL || psent == NULL || length == 0) { + return ESPCONN_ARG; + } + + /*Set the packet length depend on the sender buffer space*/ + pcb = ptcp_sent->pcommon.pcb; + if (tcp_sndbuf(pcb) < length) { + len = tcp_sndbuf(pcb); + } else { + len = length; + LWIP_ASSERT("length did not fit into uint16!", (len == length)); + } + + if (len > (2*pcb->mss)) { + len = 2*pcb->mss; + } + + /*Write data for sending, but does not send it immediately*/ + do { + espconn_printf("espconn_tcp_sent writing %d bytes %p\n", len, pcb); + if (espconn_copy_disabled(ptcp_sent)) + err = tcp_write(pcb, psent, len, 1); + else + err = tcp_write(pcb, psent, len, 0); + + if (err == ERR_MEM) { + if(len < 3) + len--; + else + len /= 2; + } + + } while (err == ERR_MEM && len > 0); + + /*Find out what we can send and send it, offset the buffer point for next send*/ + if (err == ERR_OK) { + ptcp_sent->pcommon.ptail->punsent = psent + len; + ptcp_sent->pcommon.ptail->unsent = length - len; + err = tcp_output(pcb); + /*If enable the copy option, change the flag for next write*/ + if (espconn_copy_disabled(ptcp_sent)){ + if (ptcp_sent->pcommon.ptail->unsent == 0) { + ptcp_sent->pcommon.write_flag = true; + ets_post(espconn_TaskPrio, SIG_ESPCONN_WRITE, (uint32_t)ptcp_sent); + } + } + espconn_printf("espconn_tcp_sent %d\n", err); + } + return err; +} + +/****************************************************************************** + * FunctionName : espconn_close + * Description : The connection has been successfully closed. + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_tcp_disconnect(espconn_msg *pdiscon,u8 type) +{ + if (pdiscon != NULL){ + /*disconnect with the host by send the FIN frame*/ + if (pdiscon->preverse != NULL) + espconn_server_close(pdiscon, pdiscon->pcommon.pcb,type); + else + espconn_client_close(pdiscon, pdiscon->pcommon.pcb,type); + } else{ + espconn_printf("espconn_tcp_disconnect err.\n"); + } +} + +/****************************************************************************** + * FunctionName : espconn_tcp_recv + * Description : Data has been received on this pcb. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- The connection pcb which received data + * p -- The received data (or NULL when the connection has been closed!) + * err -- An error code if there has been an error receiving + * Returns : ERR_ABRT: if you have called tcp_abort from within the function! +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_tcp_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + espconn_msg *precv_cb = arg; + struct pbuf *pthis = NULL; + uint8_t *ring = NULL; + size_t bytes_used = 0; + + tcp_arg(pcb, arg); + + if (precv_cb->readbuf == NULL) { + precv_cb->readbuf = ringbuf_new(TCP_WND); + if (precv_cb->readbuf == NULL) + return ESPCONN_MEM; + } + + if (err == ERR_OK) { + precv_cb->pcommon.recv_check = 0; + if (p != NULL) { + /*store the data to the adapter for application fetches it proactive*/ + for (pthis = p; pthis != NULL ; pthis = pthis->next) { + ring = ringbuf_memcpy_into(precv_cb->readbuf, pthis->payload, pthis->len); + if (ring) + pbuf_free(pthis); + else + break; + } + bytes_used = ringbuf_bytes_used(precv_cb->readbuf); + + /*switch the state of espconn for application process*/ + precv_cb->pespconn->state = ESPCONN_READ; + precv_cb->pcommon.pcb = pcb; + if (precv_cb->pespconn->recv_callback != NULL) { + precv_cb->pespconn->recv_callback(precv_cb->pespconn, NULL, bytes_used); + } + + /*switch the state of espconn for next packet copy*/ + if (pcb->state == ESTABLISHED) + precv_cb->pespconn->state = ESPCONN_CONNECT; + } else { + if (precv_cb->preverse) { + espconn_server_close(precv_cb, pcb, 0); + } else { + espconn_client_close(precv_cb, pcb, 0); + } + } + } + + return ERR_OK; +} + +///////////////////////////////client function///////////////////////////////// +/****************************************************************************** + * FunctionName : espconn_client_close + * Description : The connection shall be actively closed. + * Parameters : pcb -- Additional argument to pass to the callback function + * pcb -- the pcb to close + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_client_close(void *arg, struct tcp_pcb *pcb, u8 type) +{ + err_t err; + espconn_msg *pclose = arg; + + pclose->pcommon.pcb = pcb; + /*avoid recalling the disconnect function*/ + tcp_recv(pcb, NULL); + + if(type == 0) + err = tcp_close(pcb); + else { + tcp_sent(pcb, NULL); + tcp_err(pcb, NULL); + tcp_abort(pcb); + err = ERR_OK; + } + + if (err != ERR_OK) { + /* closing failed, try again later */ + tcp_recv(pcb, espconn_client_recv); + } else { + /* closing succeeded */ + if (type == 0) { + tcp_sent(pcb, NULL); + tcp_err(pcb, NULL); + } + /*switch the state of espconn for application process*/ + pclose->pespconn->state = ESPCONN_CLOSE; + ets_post(espconn_TaskPrio, SIG_ESPCONN_CLOSE, (uint32_t)pclose); + } +} + +//***********Code for WIFI_BLOCK from upper************** +sint8 ICACHE_FLASH_ATTR +espconn_recv_hold(struct espconn *pespconn) +{ + //1st, according to espconn code, have to find out the escpconn_msg by pespconn; + espconn_msg *pnode = NULL; + bool value = false; + if (pespconn == NULL) { + return ESPCONN_ARG; + } + value = espconn_find_connection(pespconn, &pnode); + if(value != true) + { + os_printf("RecvHold, By pespconn,find conn_msg fail\n"); + return ESPCONN_ARG; + } + + //2nd, the actual operation + if(pnode->recv_hold_flag == 0) + { + pnode->recv_hold_flag = 1; + pnode->recv_holded_buf_Len = 0; + } + return ESPCONN_OK; +} + +sint8 ICACHE_FLASH_ATTR +espconn_recv_unhold(struct espconn *pespconn) +{ + //1st, according to espconn code, have to find out the escpconn_msg by pespconn; + espconn_msg *pnode = NULL; + bool value = false; + if (pespconn == NULL) { + return ESPCONN_ARG; + } + value = espconn_find_connection(pespconn, &pnode); + if(value != true) + { + os_printf("RecvHold, By pespconn,find conn_msg fail\n"); + return ESPCONN_ARG; + } + + //2nd, the actual operation + if(pnode->recv_hold_flag == 1) + { + if(pespconn->type == ESPCONN_TCP) { + tcp_recved(pnode->pcommon.pcb, pnode->recv_holded_buf_Len); + } + pnode->recv_holded_buf_Len = 0; + pnode->recv_hold_flag = 0; + } + return ESPCONN_OK; +} + +//***********Code for WIFI_BLOCK from upper************** +sint8 ICACHE_FLASH_ATTR +espconn_lock_recv(espconn_msg *plockmsg) +{ + if (plockmsg == NULL || plockmsg->pespconn == NULL) { + return ESPCONN_ARG; + } + + if (plockmsg->pespconn->recv_callback == NULL){ + if (plockmsg->readbuf == NULL){ + plockmsg->readbuf = ringbuf_new(TCP_WND); + if (plockmsg->readbuf == NULL) + return ESPCONN_MEM; + } + return espconn_recv_hold(plockmsg->pespconn); + } + + return ESPCONN_OK; +} + +sint8 ICACHE_FLASH_ATTR +espconn_unlock_recv(espconn_msg *punlockmsg) +{ + if (punlockmsg == NULL || punlockmsg->pespconn == NULL) { + return ESPCONN_ARG; + } + + if (punlockmsg->pespconn->recv_callback != NULL) + return espconn_recv_unhold(punlockmsg->pespconn); + + return ESPCONN_OK; +} +/****************************************************************************** + * FunctionName : espconn_client_recv + * Description : Data has been received on this pcb. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- The connection pcb which received data + * p -- The received data (or NULL when the connection has been closed!) + * err -- An error code if there has been an error receiving + * Returns : ERR_ABRT: if you have called tcp_abort from within the function! +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_client_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + espconn_msg *precv_cb = arg; + + tcp_arg(pcb, arg); + /*lock the window because of application layer don't need the data*/ + espconn_lock_recv(precv_cb); + + if (p != NULL) { + /*To update and advertise a larger window*/ + if(precv_cb->recv_hold_flag == 0) + tcp_recved(pcb, p->tot_len); + else + precv_cb->recv_holded_buf_Len += p->tot_len; + } + + if (precv_cb->pespconn->recv_callback != NULL){ + if (err == ERR_OK && p != NULL) { + char *pdata = NULL; + u16_t length = 0; + /*Copy the contents of a packet buffer to an application buffer. + *to prevent memory leaks, ensure that each allocated is deleted*/ + pdata = (char *)os_zalloc(p ->tot_len + 1); + length = pbuf_copy_partial(p, pdata, p ->tot_len, 0); + pbuf_free(p); + + if (length != 0) { + /*switch the state of espconn for application process*/ + precv_cb->pespconn ->state = ESPCONN_READ; + precv_cb->pcommon.pcb = pcb; + precv_cb->pespconn->recv_callback(precv_cb->pespconn, pdata, length); + + /*switch the state of espconn for next packet copy*/ + if (pcb->state == ESTABLISHED) + precv_cb->pespconn ->state = ESPCONN_CONNECT; + } + + /*to prevent memory leaks, ensure that each allocated is deleted*/ + os_free(pdata); + pdata = NULL; + } + } else{ + /*unregister receive function*/ + struct pbuf *pthis = NULL; + for (pthis = p; pthis != NULL; pthis = pthis->next) { + ringbuf_memcpy_into(precv_cb->readbuf, pthis->payload, pthis->len); + pbuf_free(pthis); + } + } + + if (err == ERR_OK && p == NULL) { + espconn_client_close(precv_cb, pcb,0); + } + + return ERR_OK; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_write + * Description : write the packet which in the active connection's list. + * Parameters : arg -- the node pointer which reverse the packet + * Returns : ESPCONN_MEM: memory error + * ESPCONN_OK:have enough space for write packet +*******************************************************************************/ +err_t ICACHE_FLASH_ATTR espconn_tcp_write(void *arg) +{ + espconn_msg *pwrite = arg; + err_t err = ERR_OK; + struct tcp_pcb *pcb = pwrite->pcommon.pcb; + /*for one active connection,limit the sender buffer space*/ + if (tcp_nagle_disabled(pcb) && (pcb->snd_queuelen >= TCP_SND_QUEUELEN)) + return ESPCONN_MEM; + + while (tcp_sndbuf(pcb) != 0){ + if (pwrite->pcommon.ptail != NULL) { + /*Find the node whether in the list's tail or not*/ + if (pwrite->pcommon.ptail->unsent == 0) { + pwrite->pcommon.ptail = pwrite->pcommon.ptail->pnext; + continue; + } + + /*Send the packet for the active connection*/ + err = espconn_tcp_sent(pwrite, pwrite->pcommon.ptail->punsent,pwrite->pcommon.ptail->unsent); + if (err != ERR_OK) + break; + } else + break; + } + return err; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_reconnect + * Description : reconnect with host + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR espconn_tcp_finish(void *arg) +{ + espconn_msg *pfinish = arg; + espconn_buf *premove = NULL; + uint16 len = 0; + espconn_tcp_write(pfinish); + while (pfinish->pcommon.pbuf != NULL){ + premove = pfinish->pcommon.pbuf; + pfinish->pcommon.pbuf->tot_len += len; + /*application packet has been sent and acknowledged by the remote host, + * to prevent memory leaks, ensure that each allocated is deleted*/ + if (premove->tot_len >= premove->len){ + espconn_pbuf_delete(&pfinish->pcommon.pbuf,premove); + len = premove->tot_len - premove->len; + pfinish->pcommon.packet_info.sent_length = premove->len; + os_free(premove); + premove = NULL; + pfinish->pespconn->state = ESPCONN_CONNECT; + if (pfinish->pespconn->sent_callback != NULL) { + pfinish->pespconn->sent_callback(pfinish->pespconn); + } + pfinish->pcommon.packet_info.sent_length = len; + } else + break; + } +} + +/****************************************************************************** + * FunctionName : espconn_client_sent + * Description : Data has been sent and acknowledged by the remote host. + * This means that more data can be sent. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- The connection pcb for which data has been acknowledged + * len -- The amount of bytes acknowledged + * Returns : ERR_OK: try to send some data by calling tcp_output + * ERR_ABRT: if you have called tcp_abort from within the function! +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_client_sent(void *arg, struct tcp_pcb *pcb, u16_t len) +{ + espconn_msg *psent_cb = arg; + + psent_cb->pcommon.pcb = pcb; + psent_cb->pcommon.pbuf->tot_len += len; + psent_cb->pcommon.packet_info.sent_length = len; + + /*Send more data for one active connection*/ + espconn_tcp_finish(psent_cb); + + return ERR_OK; +} + +/****************************************************************************** + * FunctionName : espconn_client_err + * Description : The pcb had an error and is already deallocated. + * The argument might still be valid (if != NULL). + * Parameters : arg -- Additional argument to pass to the callback function + * err -- Error code to indicate why the pcb has been closed + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_client_err(void *arg, err_t err) +{ + espconn_msg *perr_cb = arg; + struct tcp_pcb *pcb = NULL; + LWIP_UNUSED_ARG(err); + + if (perr_cb != NULL) { + pcb = perr_cb->pcommon.pcb; + perr_cb->pespconn->state = ESPCONN_CLOSE; + espconn_printf("espconn_client_err %d %d %d\n", pcb->state, pcb->nrtx, err); + +// /*remove the node from the client's active connection list*/ +// espconn_list_delete(&plink_active, perr_cb); + + /*Set the error code depend on the error type and control block state*/ + if (err == ERR_ABRT) { + switch (pcb->state) { + case SYN_SENT: + if (pcb->nrtx == TCP_SYNMAXRTX) { + perr_cb->pcommon.err = ESPCONN_CONN; + } else { + perr_cb->pcommon.err = err; + } + + break; + + case ESTABLISHED: + if (pcb->nrtx == TCP_MAXRTX) { + perr_cb->pcommon.err = ESPCONN_TIMEOUT; + } else { + perr_cb->pcommon.err = err; + } + break; + + case FIN_WAIT_1: + if (pcb->nrtx == TCP_MAXRTX) { + perr_cb->pcommon.err = ESPCONN_CLSD; + } else { + perr_cb->pcommon.err = err; + } + break; + case FIN_WAIT_2: + perr_cb->pcommon.err = ESPCONN_CLSD; + break; + case CLOSED: + perr_cb->pcommon.err = ESPCONN_CONN; + break; + } + } else { + perr_cb->pcommon.err = err; + } + /*post the singer to the task for processing the connection*/ + ets_post(espconn_TaskPrio, SIG_ESPCONN_ERRER, (uint32_t)perr_cb); + } +} + +/****************************************************************************** + * FunctionName : espconn_client_connect + * Description : A new incoming connection has been connected. + * Parameters : arg -- Additional argument to pass to the callback function + * tpcb -- The connection pcb which is connected + * err -- An unused error code, always ERR_OK currently + * Returns : connection result +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_client_connect(void *arg, struct tcp_pcb *tpcb, err_t err) +{ + espconn_msg *pcon = arg; + + espconn_printf("espconn_client_connect pcon %p tpcb %p\n", pcon, tpcb); + if (err == ERR_OK){ + /*Reserve the remote information for current active connection*/ + pcon->pespconn->state = ESPCONN_CONNECT; + pcon->pcommon.err = err; + pcon->pcommon.pcb = tpcb; + pcon->pcommon.local_port = tpcb->local_port; + pcon->pcommon.local_ip = tpcb->local_ip.addr; + pcon->pcommon.remote_port = tpcb->remote_port; + pcon->pcommon.remote_ip[0] = ip4_addr1_16(&tpcb->remote_ip); + pcon->pcommon.remote_ip[1] = ip4_addr2_16(&tpcb->remote_ip); + pcon->pcommon.remote_ip[2] = ip4_addr3_16(&tpcb->remote_ip); + pcon->pcommon.remote_ip[3] = ip4_addr4_16(&tpcb->remote_ip); + pcon->pcommon.write_flag = true; + tcp_arg(tpcb, (void *) pcon); + + /*Set the specify function that should be called + * when TCP data has been successfully delivered, + * when active connection receives data*/ + tcp_sent(tpcb, espconn_client_sent); + tcp_recv(tpcb, espconn_client_recv); + /*Disable Nagle algorithm default*/ + tcp_nagle_disable(tpcb); + /*Default set the total number of espconn_buf on the unsent lists for one*/ + espconn_tcp_set_buf_count(pcon->pespconn, 1); + + if (pcon->pespconn->proto.tcp->connect_callback != NULL) { + pcon->pespconn->proto.tcp->connect_callback(pcon->pespconn); + } + + /*Enable block option for fetches the data proactive*/ + if (espconn_manual_recv_disabled(pcon)) + tcp_recv(tpcb, espconn_tcp_recv); + + /*Enable keep alive option*/ + if (espconn_keepalive_disabled(pcon)) + espconn_keepalive_enable(tpcb); + +// /*lock the window because of application layer don't need the data*/ +// espconn_lock_recv(pcon); + } else{ + os_printf("err in host connected (%s)\n",lwip_strerr(err)); + } + return err; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_client + * Description : Initialize the client: set up a connect PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build client + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_tcp_client(struct espconn *espconn) +{ + struct tcp_pcb *pcb = NULL; + struct ip_addr ipaddr; + espconn_msg *pclient = NULL; + + /*Creates a new client control message*/ + pclient = (espconn_msg *)os_zalloc(sizeof(espconn_msg)); + if (pclient == NULL){ + return ESPCONN_MEM; + } + + /*Set an IP address given for Little-endian.*/ + IP4_ADDR(&ipaddr, espconn->proto.tcp->remote_ip[0], + espconn->proto.tcp->remote_ip[1], + espconn->proto.tcp->remote_ip[2], + espconn->proto.tcp->remote_ip[3]); + + /*Creates a new TCP protocol control block*/ + pcb = tcp_new(); + + if (pcb == NULL) { + /*to prevent memory leaks, ensure that each allocated is deleted*/ + os_free(pclient); + pclient = NULL; + return ESPCONN_MEM; + } else { + + /*insert the node to the active connection list*/ + espconn_list_creat(&plink_active, pclient); + tcp_arg(pcb, (void *)pclient); + tcp_err(pcb, espconn_client_err); + pclient->preverse = NULL; + pclient->pespconn = espconn; + pclient->pespconn->state = ESPCONN_WAIT; + pclient->pcommon.pcb = pcb; + tcp_bind(pcb, IP_ADDR_ANY, pclient->pespconn->proto.tcp->local_port); +#if 0 + pclient->pcommon.err = tcp_bind(pcb, IP_ADDR_ANY, pclient->pespconn->proto.tcp->local_port); + if (pclient->pcommon.err != ERR_OK){ + /*remove the node from the client's active connection list*/ + espconn_list_delete(&plink_active, pclient); + memp_free(MEMP_TCP_PCB, pcb); + os_free(pclient); + pclient = NULL; + return ERR_USE; + } +#endif + /*Establish the connection*/ + pclient->espconn_mode = ESPCONN_TCPCLIENT_MODE; + pclient->pcommon.err = tcp_connect(pcb, &ipaddr, + pclient->pespconn->proto.tcp->remote_port, espconn_client_connect); + if (pclient->pcommon.err == ERR_RTE){ + /*remove the node from the client's active connection list*/ + espconn_list_delete(&plink_active, pclient); + espconn_kill_pcb(pcb->local_port); + os_free(pclient); + pclient = NULL; + return ESPCONN_RTE; + } + return pclient->pcommon.err; + } +} + +///////////////////////////////server function///////////////////////////////// +/****************************************************************************** + * FunctionName : espconn_server_close + * Description : The connection shall be actively closed. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- the pcb to close + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_server_close(void *arg, struct tcp_pcb *pcb,u8 type) +{ + err_t err; + espconn_msg *psclose = arg; + + psclose->pcommon.pcb = pcb; + /*avoid recalling the disconnect function*/ + tcp_recv(pcb, NULL); + + if(type ==0) + err = tcp_close(pcb); + else { + tcp_poll(pcb, NULL, 0); + tcp_sent(pcb, NULL); + tcp_err(pcb, NULL); + tcp_abort(pcb); + err = ERR_OK; + } + + if (err != ERR_OK) { + /* closing failed, try again later */ + tcp_recv(pcb, espconn_server_recv); + } else { + /* closing succeeded */ + if (type == 0) { + tcp_poll(pcb, NULL, 0); + tcp_sent(pcb, NULL); + tcp_err(pcb, NULL); + } + /*switch the state of espconn for application process*/ + psclose->pespconn->state = ESPCONN_CLOSE; + ets_post(espconn_TaskPrio, SIG_ESPCONN_CLOSE, (uint32_t)psclose); + } +} + +/****************************************************************************** + * FunctionName : espconn_server_recv + * Description : Data has been received on this pcb. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- The connection pcb which received data + * p -- The received data (or NULL when the connection has been closed!) + * err -- An error code if there has been an error receiving + * Returns : ERR_ABRT: if you have called tcp_abort from within the function! +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_server_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + espconn_msg *precv_cb = arg; + + tcp_arg(pcb, arg); + espconn_printf("server has application data received: %d\n", system_get_free_heap_size()); + /*lock the window because of application layer don't need the data*/ + espconn_lock_recv(precv_cb); + + if (p != NULL) { + /*To update and advertise a larger window*/ + if(precv_cb->recv_hold_flag == 0) + tcp_recved(pcb, p->tot_len); + else + precv_cb->recv_holded_buf_Len += p->tot_len; + } + + /*register receive function*/ + if (precv_cb->pespconn->recv_callback != NULL) { + if (err == ERR_OK && p != NULL) { + u8_t *data_ptr = NULL; + u32_t data_cntr = 0; + /*clear the count for connection timeout*/ + precv_cb->pcommon.recv_check = 0; + /*Copy the contents of a packet buffer to an application buffer. + *to prevent memory leaks, ensure that each allocated is deleted*/ + data_ptr = (u8_t *) os_zalloc(p ->tot_len + 1); + data_cntr = pbuf_copy_partial(p, data_ptr, p->tot_len, 0); + pbuf_free(p); + + if (data_cntr != 0) { + /*switch the state of espconn for application process*/ + precv_cb->pespconn->state = ESPCONN_READ; + precv_cb->pcommon.pcb = pcb; + precv_cb->pespconn->recv_callback(precv_cb->pespconn, data_ptr, data_cntr); + + /*switch the state of espconn for next packet copy*/ + if (pcb->state == ESTABLISHED) + precv_cb->pespconn->state = ESPCONN_CONNECT; + } + + /*to prevent memory leaks, ensure that each allocated is deleted*/ + os_free(data_ptr); + data_ptr = NULL; + espconn_printf("server's application data has been processed: %d\n", system_get_free_heap_size()); + } + } else { + /*unregister receive function*/ + struct pbuf *pthis = NULL; + for (pthis = p; pthis != NULL; pthis = pthis->next) { + ringbuf_memcpy_into(precv_cb->readbuf, pthis->payload, pthis->len); + pbuf_free(pthis); + } + } + + if (err == ERR_OK && p == NULL) { + espconn_server_close(precv_cb, pcb, 0); + } + return ERR_OK; +} + +/****************************************************************************** + * FunctionName : espconn_server_sent + * Description : Data has been sent and acknowledged by the remote host. + * This means that more data can be sent. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- The connection pcb for which data has been acknowledged + * len -- The amount of bytes acknowledged + * Returns : ERR_OK: try to send some data by calling tcp_output + * ERR_ABRT: if you have called tcp_abort from within the function! +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_server_sent(void *arg, struct tcp_pcb *pcb, u16_t len) +{ + espconn_msg *psent_cb = arg; + + psent_cb->pcommon.pcb = pcb; + psent_cb->pcommon.recv_check = 0; + psent_cb->pcommon.pbuf->tot_len += len; + psent_cb->pcommon.packet_info.sent_length = len; + + /*Send more data for one active connection*/ + espconn_tcp_finish(psent_cb); + return ERR_OK; +} + +/****************************************************************************** + * FunctionName : espconn_server_poll + * Description : The poll function is called every 3nd second. + * If there has been no data sent (which resets the retries) in 3 seconds, close. + * If the last portion of a file has not been sent in 3 seconds, close. + * + * This could be increased, but we don't want to waste resources for bad connections. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- The connection pcb for which data has been acknowledged + * Returns : ERR_OK: try to send some data by calling tcp_output + * ERR_ABRT: if you have called tcp_abort from within the function! +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_server_poll(void *arg, struct tcp_pcb *pcb) +{ + espconn_msg *pspoll_cb = arg; + + /*exception calling abandon the connection for send a RST frame*/ + if (arg == NULL) { + tcp_abandon(pcb, 0); + tcp_poll(pcb, NULL, 0); + return ERR_OK; + } + + espconn_printf("espconn_server_poll %d %d\n", pspoll_cb->pcommon.recv_check, pcb->state); + pspoll_cb->pcommon.pcb = pcb; + if (pcb->state == ESTABLISHED) { + pspoll_cb->pcommon.recv_check++; + if (pspoll_cb->pcommon.timeout != 0){/*no data sent in one active connection's set timeout, close.*/ + if (pspoll_cb->pcommon.recv_check >= pspoll_cb->pcommon.timeout) { + pspoll_cb->pcommon.recv_check = 0; + espconn_server_close(pspoll_cb, pcb,0); + } + } else { + espconn_msg *ptime_msg = pserver_list; + while (ptime_msg != NULL) { + if (ptime_msg->pespconn == pspoll_cb->preverse){ + if (ptime_msg->pcommon.timeout != 0){/*no data sent in server's set timeout, close.*/ + if (pspoll_cb->pcommon.recv_check >= ptime_msg->pcommon.timeout){ + pspoll_cb->pcommon.recv_check = 0; + espconn_server_close(pspoll_cb, pcb,0); + } + } else {/*don't close for ever*/ + pspoll_cb->pcommon.recv_check = 0; + } + break; + } + ptime_msg = ptime_msg->pnext; + } + } + } else { + espconn_server_close(pspoll_cb, pcb,0); + } + + return ERR_OK; +} + +/****************************************************************************** + * FunctionName : esponn_server_err + * Description : The pcb had an error and is already deallocated. + * The argument might still be valid (if != NULL). + * Parameters : arg -- Additional argument to pass to the callback function + * err -- Error code to indicate why the pcb has been closed + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +esponn_server_err(void *arg, err_t err) +{ + espconn_msg *pserr_cb = arg; + struct tcp_pcb *pcb = NULL; + if (pserr_cb != NULL) { + + pcb = pserr_cb->pcommon.pcb; + pserr_cb->pespconn->state = ESPCONN_CLOSE; + +// /*remove the node from the server's active connection list*/ +// espconn_list_delete(&plink_active, pserr_cb); + + /*Set the error code depend on the error type and control block state*/ + if (err == ERR_ABRT) { + switch (pcb->state) { + case SYN_RCVD: + if (pcb->nrtx == TCP_SYNMAXRTX) { + pserr_cb->pcommon.err = ESPCONN_CONN; + } else { + pserr_cb->pcommon.err = err; + } + + break; + + case ESTABLISHED: + if (pcb->nrtx == TCP_MAXRTX) { + pserr_cb->pcommon.err = ESPCONN_TIMEOUT; + } else { + pserr_cb->pcommon.err = err; + } + + break; + + case CLOSE_WAIT: + if (pcb->nrtx == TCP_MAXRTX) { + pserr_cb->pcommon.err = ESPCONN_CLSD; + } else { + pserr_cb->pcommon.err = err; + } + break; + case LAST_ACK: + pserr_cb->pcommon.err = ESPCONN_CLSD; + break; + + case CLOSED: + pserr_cb->pcommon.err = ESPCONN_CONN; + break; + default : + break; + } + } else { + pserr_cb->pcommon.err = err; + } + /*post the singer to the task for processing the connection*/ + ets_post(espconn_TaskPrio, SIG_ESPCONN_ERRER, (uint32_t)pserr_cb); + } +} + +/****************************************************************************** + * FunctionName : espconn_tcp_accept + * Description : A new incoming connection has been accepted. + * Parameters : arg -- Additional argument to pass to the callback function + * pcb -- The connection pcb which is accepted + * err -- An unused error code, always ERR_OK currently + * Returns : acception result +*******************************************************************************/ +static err_t ICACHE_FLASH_ATTR +espconn_tcp_accept(void *arg, struct tcp_pcb *pcb, err_t err) +{ + struct espconn *espconn = arg; + espconn_msg *paccept = NULL; + remot_info *pinfo = NULL; + LWIP_UNUSED_ARG(err); + + if (!espconn || !espconn->proto.tcp) { + return ERR_ARG; + } + + tcp_arg(pcb, paccept); + tcp_err(pcb, esponn_server_err); + /*Ensure the active connection is less than the count of active connections on the server*/ + espconn_get_connection_info(espconn, &pinfo , 0); + espconn_printf("espconn_tcp_accept link_cnt: %d\n", espconn->link_cnt); + if (espconn->link_cnt == espconn_tcp_get_max_con_allow(espconn)) + return ERR_ISCONN; + + /*Creates a new active connect control message*/ + paccept = (espconn_msg *)os_zalloc(sizeof(espconn_msg)); + tcp_arg(pcb, paccept); + + if (paccept == NULL) + return ERR_MEM; + /*Insert the node to the active connection list*/ + espconn_list_creat(&plink_active, paccept); + + paccept->preverse = espconn; + paccept->espconn_mode = ESPCONN_TCPSERVER_MODE; + paccept->pespconn = (struct espconn *)os_zalloc(sizeof(struct espconn)); + if (paccept->pespconn == NULL) + return ERR_MEM; + paccept->pespconn->proto.tcp = (esp_tcp *)os_zalloc(sizeof(esp_tcp)); + if (paccept->pespconn->proto.tcp == NULL) + return ERR_MEM; + + /*Reserve the remote information for current active connection*/ + paccept->pcommon.pcb = pcb; + + paccept->pcommon.remote_port = pcb->remote_port; + paccept->pcommon.remote_ip[0] = ip4_addr1_16(&pcb->remote_ip); + paccept->pcommon.remote_ip[1] = ip4_addr2_16(&pcb->remote_ip); + paccept->pcommon.remote_ip[2] = ip4_addr3_16(&pcb->remote_ip); + paccept->pcommon.remote_ip[3] = ip4_addr4_16(&pcb->remote_ip); + paccept->pcommon.write_flag = true; + + os_memcpy(espconn->proto.tcp->remote_ip, paccept->pcommon.remote_ip, 4); + espconn->proto.tcp->remote_port = pcb->remote_port; + espconn->state = ESPCONN_CONNECT; + espconn_copy_partial(paccept->pespconn, espconn); + + /*Set the specify function that should be called + * when TCP data has been successfully delivered, + * when active connection receives data, + * or periodically from active connection*/ + tcp_sent(pcb, espconn_server_sent); + tcp_recv(pcb, espconn_server_recv); + tcp_poll(pcb, espconn_server_poll, 4); /* every 1 seconds */ + /*Disable Nagle algorithm default*/ + tcp_nagle_disable(pcb); + /*Default set the total number of espconn_buf on the unsent lists for one*/ + espconn_tcp_set_buf_count(paccept->pespconn, 1); + + if (paccept->pespconn->proto.tcp->connect_callback != NULL) { + paccept->pespconn->proto.tcp->connect_callback(paccept->pespconn); + } + + /*Enable block option for fetches the data proactive*/ + if (espconn_manual_recv_disabled(paccept)) + tcp_recv(pcb, espconn_tcp_recv); + + /*Enable keep alive option*/ + if (espconn_keepalive_disabled(paccept)) + espconn_keepalive_enable(pcb); + +// /*lock the window because of application layer don't need the data*/ +// espconn_lock_recv(paccept); + return ERR_OK; +} + +/****************************************************************************** + * FunctionName : espconn_tcp_server + * Description : Initialize the server: set up a listening PCB and bind it to + * the defined port + * Parameters : espconn -- the espconn used to build server + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_tcp_server(struct espconn *espconn) +{ + struct tcp_pcb *pcb = NULL; + espconn_msg *pserver = NULL; + + /*Creates a new server control message*/ + pserver = (espconn_msg *)os_zalloc(sizeof(espconn_msg)); + if (pserver == NULL){ + return ESPCONN_MEM; + } + + /*Creates a new TCP protocol control block*/ + pcb = tcp_new(); + if (pcb == NULL) { + /*to prevent memory leaks, ensure that each allocated is deleted*/ + os_free(pserver); + pserver = NULL; + return ESPCONN_MEM; + } else { + struct tcp_pcb *lpcb = NULL; + /*Binds the connection to a local port number and any IP address*/ + tcp_bind(pcb, IP_ADDR_ANY, espconn->proto.tcp->local_port); + lpcb = pcb; + /*malloc and set the state of the connection to be LISTEN*/ + pcb = tcp_listen(pcb); + if (pcb != NULL) { + /*insert the node to the active connection list*/ + espconn_list_creat(&pserver_list, pserver); + pserver->preverse = pcb; + pserver->pespconn = espconn; + pserver->count_opt = MEMP_NUM_TCP_PCB; + pserver->pcommon.timeout = 0x0a; + espconn ->state = ESPCONN_LISTEN; + /*set the specify argument that should be passed callback function*/ + tcp_arg(pcb, (void *)espconn); + /*accept callback function to call for this control block*/ + tcp_accept(pcb, espconn_tcp_accept); + return ESPCONN_OK; + } else { + /*to prevent memory leaks, ensure that each allocated is deleted*/ + memp_free(MEMP_TCP_PCB,lpcb); + os_free(pserver); + pserver = NULL; + return ESPCONN_MEM; + } + } +} + +/****************************************************************************** + * FunctionName : espconn_tcp_delete + * Description : delete the server: delete a listening PCB and free it + * Parameters : pdeletecon -- the espconn used to delete a server + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_tcp_delete(struct espconn *pdeletecon) +{ + err_t err; + remot_info *pinfo = NULL; + espconn_msg *pdelete_msg = NULL; + struct tcp_pcb *pcb = NULL; + + if (pdeletecon == NULL) + return ESPCONN_ARG; + + espconn_get_connection_info(pdeletecon, &pinfo , 0); + /*make sure all the active connection have been disconnect*/ + if (pdeletecon->link_cnt != 0) + return ESPCONN_INPROGRESS; + else { + espconn_printf("espconn_tcp_delete %p\n",pdeletecon); + pdelete_msg = pserver_list; + while (pdelete_msg != NULL){ + if (pdelete_msg->pespconn == pdeletecon){ + /*remove the node from the client's active connection list*/ + espconn_list_delete(&pserver_list, pdelete_msg); + pcb = pdelete_msg->preverse; + os_printf("espconn_tcp_delete %d, %d\n",pcb->state, pcb->local_port); + espconn_kill_pcb(pcb->local_port); + err = tcp_close(pcb); + os_free(pdelete_msg); + pdelete_msg = NULL; + break; + } + pdelete_msg = pdelete_msg->pnext; + } + if (err == ERR_OK) + return err; + else + return ESPCONN_ARG; + } +} + +/****************************************************************************** + * FunctionName : espconn_init + * Description : used to init the function that should be used when + * Parameters : none + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_init(void) +{ + ets_task(espconn_Task, espconn_TaskPrio, espconn_TaskQueue, espconn_TaskQueueLen); +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_udp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_udp.c new file mode 100755 index 0000000..3e2de1b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/espconn_udp.c @@ -0,0 +1,431 @@ +/****************************************************************************** + * Copyright 2013-2014 Espressif Systems (Wuxi) + * + * FileName: espconn_udp.c + * + * Description: udp proto interface + * + * Modification history: + * 2014/3/31, v1.0 create this file. +*******************************************************************************/ + +#include "ets_sys.h" +#include "os_type.h" +//#include "os.h" + +#include "lwip/inet.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/mem.h" +#include "lwip/tcp_impl.h" +#include "lwip/udp.h" +#include "lwip/igmp.h" + +#include "lwip/app/espconn_udp.h" + +#include "user_interface.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +extern espconn_msg *plink_active; +extern uint8 default_interface; + +enum send_opt{ + ESPCONN_SENDTO, + ESPCONN_SEND +}; + +struct netif * eagle_lwip_getif(uint8 index); + +static void ICACHE_FLASH_ATTR espconn_data_sentcb(struct espconn *pespconn) +{ + if (pespconn == NULL) { + return; + } + + if (pespconn->sent_callback != NULL) { + pespconn->sent_callback(pespconn); + } +} + +static void ICACHE_FLASH_ATTR espconn_data_sent(void *arg, enum send_opt opt) +{ + espconn_msg *psent = arg; + + if (psent == NULL) { + return; + } + + if (psent->pcommon.cntr == 0) { + psent->pespconn->state = ESPCONN_CONNECT; + if (psent->pcommon.err == 0) + espconn_data_sentcb(psent->pespconn); + } else { + if (opt == ESPCONN_SEND){ + espconn_udp_sent(arg, psent->pcommon.ptrbuf, psent->pcommon.cntr); + } else { + espconn_udp_sendto(arg, psent->pcommon.ptrbuf, psent->pcommon.cntr); + } + } +} + +/****************************************************************************** + * FunctionName : espconn_udp_sent + * Description : sent data for client or server + * Parameters : void *arg -- client or server to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : return espconn error code. + * - ESPCONN_OK. Successful. No error occured. + * - ESPCONN_MEM. Out of memory. + * - ESPCONN_RTE. Could not find route to destination address. + * - More errors could be returned by lower protocol layers. +*******************************************************************************/ +err_t ICACHE_FLASH_ATTR +espconn_udp_sent(void *arg, uint8 *psent, uint16 length) +{ + espconn_msg *pudp_sent = arg; + struct udp_pcb *upcb = pudp_sent->pcommon.pcb; + struct pbuf *p, *q ,*p_temp; + u8_t *data = NULL; + u16_t cnt = 0; + u16_t datalen = 0; + u16_t i = 0; + err_t err; + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %d %p\n", __LINE__, length, upcb)); + + if (pudp_sent == NULL || upcb == NULL || psent == NULL || length == 0) { + return ESPCONN_ARG; + } + + if ((IP_FRAG_MAX_MTU - 20 - 8) < length) { + datalen = IP_FRAG_MAX_MTU - 20 - 8; + } else { + datalen = length; + } + + p = pbuf_alloc(PBUF_TRANSPORT, datalen, PBUF_RAM); + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %p\n", __LINE__, p)); + + if (p != NULL) { + q = p; + + while (q != NULL) { + data = (u8_t *)q->payload; + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %p\n", __LINE__, data)); + + for (i = 0; i < q->len; i++) { + data[i] = ((u8_t *) psent)[cnt++]; + } + + q = q->next; + } + } else { + return ESPCONN_MEM; + } + + upcb->remote_port = pudp_sent->pespconn->proto.udp->remote_port; + IP4_ADDR(&upcb->remote_ip, pudp_sent->pespconn->proto.udp->remote_ip[0], + pudp_sent->pespconn->proto.udp->remote_ip[1], + pudp_sent->pespconn->proto.udp->remote_ip[2], + pudp_sent->pespconn->proto.udp->remote_ip[3]); + + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %x %d\n", __LINE__, upcb->remote_ip, upcb->remote_port)); + + struct netif *sta_netif = (struct netif *)eagle_lwip_getif(0x00); + struct netif *ap_netif = (struct netif *)eagle_lwip_getif(0x01); + + if(wifi_get_opmode() == ESPCONN_AP_STA && default_interface == ESPCONN_AP_STA && sta_netif != NULL && ap_netif != NULL) + { + if(netif_is_up(sta_netif) && netif_is_up(ap_netif) && \ + ip_addr_isbroadcast(&upcb->remote_ip, sta_netif) && \ + ip_addr_isbroadcast(&upcb->remote_ip, ap_netif)) { + + p_temp = pbuf_alloc(PBUF_TRANSPORT, datalen, PBUF_RAM); + if (pbuf_copy (p_temp,p) != ERR_OK) { + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent: copying to new pbuf failed\n")); + return ESPCONN_ARG; + } + netif_set_default(sta_netif); + err = udp_send(upcb, p_temp); + pbuf_free(p_temp); + netif_set_default(ap_netif); + } + } + err = udp_send(upcb, p); + + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %d\n", __LINE__, err)); + + if (p->ref != 0) { + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %p\n", __LINE__, p)); + pbuf_free(p); + pudp_sent->pcommon.ptrbuf = psent + datalen; + pudp_sent->pcommon.cntr = length - datalen; + pudp_sent->pcommon.err = err; + espconn_data_sent(pudp_sent, ESPCONN_SEND); + if (err > 0) + return ESPCONN_IF; + return err; + } else { + pbuf_free(p); + return ESPCONN_RTE; + } +} + +/****************************************************************************** + * FunctionName : espconn_udp_sendto + * Description : sent data for UDP + * Parameters : void *arg -- UDP to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : return espconn error code. + * - ESPCONN_OK. Successful. No error occured. + * - ESPCONN_MEM. Out of memory. + * - ESPCONN_RTE. Could not find route to destination address. + * - More errors could be returned by lower protocol layers. +*******************************************************************************/ +err_t ICACHE_FLASH_ATTR +espconn_udp_sendto(void *arg, uint8 *psent, uint16 length) +{ + espconn_msg *pudp_sent = arg; + struct udp_pcb *upcb = pudp_sent->pcommon.pcb; + struct espconn *pespconn = pudp_sent->pespconn; + struct pbuf *p, *q ,*p_temp; + struct ip_addr dst_ip; + u16_t dst_port; + u8_t *data = NULL; + u16_t cnt = 0; + u16_t datalen = 0; + u16_t i = 0; + err_t err; + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %d %p\n", __LINE__, length, upcb)); + + if (pudp_sent == NULL || upcb == NULL || psent == NULL || length == 0) { + return ESPCONN_ARG; + } + + if ((IP_FRAG_MAX_MTU - 20 - 8) < length) { + datalen = IP_FRAG_MAX_MTU - 20 - 8; + } else { + datalen = length; + } + + p = pbuf_alloc(PBUF_TRANSPORT, datalen, PBUF_RAM); + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %p\n", __LINE__, p)); + + if (p != NULL) { + q = p; + + while (q != NULL) { + data = (u8_t *)q->payload; + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %p\n", __LINE__, data)); + + for (i = 0; i < q->len; i++) { + data[i] = ((u8_t *) psent)[cnt++]; + } + + q = q->next; + } + } else { + return ESPCONN_MEM; + } + + dst_port = pespconn->proto.udp->remote_port; + IP4_ADDR(&dst_ip, pespconn->proto.udp->remote_ip[0], + pespconn->proto.udp->remote_ip[1], pespconn->proto.udp->remote_ip[2], + pespconn->proto.udp->remote_ip[3]); + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sent %d %x %d\n", __LINE__, upcb->remote_ip, upcb->remote_port)); + + struct netif *sta_netif = (struct netif *)eagle_lwip_getif(0x00); + struct netif *ap_netif = (struct netif *)eagle_lwip_getif(0x01); + + if(wifi_get_opmode() == ESPCONN_AP_STA && default_interface == ESPCONN_AP_STA && sta_netif != NULL && ap_netif != NULL) + { + if( netif_is_up(sta_netif) && \ + netif_is_up(ap_netif) && \ + ip_addr_isbroadcast(&dst_ip, sta_netif) && \ + ip_addr_isbroadcast(&dst_ip, ap_netif)) { + + p_temp = pbuf_alloc(PBUF_TRANSPORT, datalen, PBUF_RAM); + if (pbuf_copy (p_temp,p) != ERR_OK) { + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_sendto: copying to new pbuf failed\n")); + return ESPCONN_ARG; + } + netif_set_default(sta_netif); + err = udp_sendto(upcb, p_temp, &dst_ip, dst_port); + pbuf_free(p_temp); + netif_set_default(ap_netif); + } + } + err = udp_sendto(upcb, p, &dst_ip, dst_port); + + if (p->ref != 0) { + pbuf_free(p); + pudp_sent->pcommon.ptrbuf = psent + datalen; + pudp_sent->pcommon.cntr = length - datalen; + pudp_sent->pcommon.err = err; + espconn_data_sent(pudp_sent, ESPCONN_SENDTO); + + if (err > 0) + return ESPCONN_IF; + return err; + } else { + pbuf_free(p); + return ESPCONN_RTE; + } +} + +/****************************************************************************** + * FunctionName : espconn_udp_server_recv + * Description : This callback will be called when receiving a datagram. + * Parameters : arg -- user supplied argument + * upcb -- the udp_pcb which received data + * p -- the packet buffer that was received + * addr -- the remote IP address from which the packet was received + * port -- the remote port from which the packet was received + * Returns : none +*******************************************************************************/ +static void ICACHE_FLASH_ATTR +espconn_udp_recv(void *arg, struct udp_pcb *upcb, struct pbuf *p, + struct ip_addr *addr, u16_t port) +{ + espconn_msg *precv = arg; + struct pbuf *q = NULL; + u8_t *pdata = NULL; + u16_t length = 0; + struct ip_info ipconfig; + + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("espconn_udp_server_recv %d %p\n", __LINE__, upcb)); + + precv->pcommon.remote_ip[0] = ip4_addr1_16(addr); + precv->pcommon.remote_ip[1] = ip4_addr2_16(addr); + precv->pcommon.remote_ip[2] = ip4_addr3_16(addr); + precv->pcommon.remote_ip[3] = ip4_addr4_16(addr); + precv->pcommon.remote_port = port; + precv->pcommon.pcb = upcb; + + if (wifi_get_opmode() != 1) { + wifi_get_ip_info(1, &ipconfig); + + if (!ip_addr_netcmp(addr, &ipconfig.ip, &ipconfig.netmask)) { + wifi_get_ip_info(0, &ipconfig); + } + } else { + wifi_get_ip_info(0, &ipconfig); + } + + precv->pespconn->proto.udp->local_ip[0] = ip4_addr1_16(&ipconfig.ip); + precv->pespconn->proto.udp->local_ip[1] = ip4_addr2_16(&ipconfig.ip); + precv->pespconn->proto.udp->local_ip[2] = ip4_addr3_16(&ipconfig.ip); + precv->pespconn->proto.udp->local_ip[3] = ip4_addr4_16(&ipconfig.ip); + + if (p != NULL) { + pdata = (u8_t *)os_zalloc(p ->tot_len + 1); + length = pbuf_copy_partial(p, pdata, p ->tot_len, 0); + precv->pcommon.pcb = upcb; + pbuf_free(p); + if (length != 0) { + if (precv->pespconn->recv_callback != NULL) { + precv->pespconn->recv_callback(precv->pespconn, pdata, length); + } + } + os_free(pdata); + } else { + return; + } +} + +/****************************************************************************** + * FunctionName : espconn_udp_disconnect + * Description : A new incoming connection has been disconnected. + * Parameters : espconn -- the espconn used to disconnect with host + * Returns : none +*******************************************************************************/ +void ICACHE_FLASH_ATTR espconn_udp_disconnect(espconn_msg *pdiscon) +{ + if (pdiscon == NULL) { + return; + } + + struct udp_pcb *upcb = pdiscon->pcommon.pcb; + + udp_disconnect(upcb); + + udp_remove(upcb); + + espconn_list_delete(&plink_active, pdiscon); + + os_free(pdiscon); + pdiscon = NULL; +} + +/****************************************************************************** + * FunctionName : espconn_udp_server + * Description : Initialize the server: set up a PCB and bind it to the port + * Parameters : pespconn -- the espconn used to build server + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_udp_server(struct espconn *pespconn) +{ + struct udp_pcb *upcb = NULL; + espconn_msg *pserver = NULL; + upcb = udp_new(); + + if (upcb == NULL) { + return ESPCONN_MEM; + } else { + pserver = (espconn_msg *)os_zalloc(sizeof(espconn_msg)); + + if (pserver == NULL) { + udp_remove(upcb); + return ESPCONN_MEM; + } + + pserver->pcommon.pcb = upcb; + pserver->pespconn = pespconn; + espconn_list_creat(&plink_active, pserver); + udp_bind(upcb, IP_ADDR_ANY, pserver->pespconn->proto.udp->local_port); + udp_recv(upcb, espconn_udp_recv, (void *)pserver); + return ESPCONN_OK; + } +} + +/****************************************************************************** + * FunctionName : espconn_igmp_leave + * Description : leave a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_igmp_leave(ip_addr_t *host_ip, ip_addr_t *multicast_ip) +{ + if (igmp_leavegroup(host_ip, multicast_ip) != ERR_OK) { + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("udp_leave_multigrup failed!\n")); + return -1; + }; + + return ESPCONN_OK; +} + +/****************************************************************************** + * FunctionName : espconn_igmp_join + * Description : join a multicast group + * Parameters : host_ip -- the ip address of udp server + * multicast_ip -- multicast ip given by user + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_igmp_join(ip_addr_t *host_ip, ip_addr_t *multicast_ip) +{ + if (igmp_joingroup(host_ip, multicast_ip) != ERR_OK) { + LWIP_DEBUGF(ESPCONN_UDP_DEBUG, ("udp_join_multigrup failed!\n")); + return -1; + }; + + /* join to any IP address at the port */ + return ESPCONN_OK; +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/netio.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/netio.c new file mode 100755 index 0000000..47b3599 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/netio.c @@ -0,0 +1,369 @@ +/** + * @file + * MetIO Server + * + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ +#include "lwip/opt.h" + +#if LWIP_TCP +#include "lwip/tcp.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/* + * This implements a netio server. + * The client sends a command word (4 bytes) then a data length word (4 bytes). + * If the command is "receive", the server is to consume "data length" bytes into + * a circular buffer until the first byte is non-zero, then it is to consume + * another command/data pair. + * If the command is "send", the server is to send "data length" bytes from a circular + * buffer with the first byte being zero, until "some time" (6 seconds in the + * current netio126.zip download) has passed and then send one final buffer with + * the first byte being non-zero. Then it is to consume another command/data pair. + */ + +/* See http://www.nwlab.net/art/netio/netio.html to get the netio tool */ + +/* implementation options */ +#define NETIO_BUF_SIZE (4 * 1024) +#define NETIO_USE_STATIC_BUF 0 + +/* NetIO server state definition */ +#define NETIO_STATE_WAIT_FOR_CMD 0 +#define NETIO_STATE_RECV_DATA 1 +#define NETIO_STATE_SEND_DATA 2 +#define NETIO_STATE_SEND_DATA_LAST 3 +#define NETIO_STATE_DONE 4 + +struct netio_state { + u32_t state; + u32_t cmd; + u32_t data_len; + u32_t cntr; + u8_t * buf_ptr; + u32_t buf_pos; + u32_t first_byte; + u32_t time_stamp; +}; + +/* NetIO command protocol definition */ +#define NETIO_CMD_QUIT 0 +#define NETIO_CMD_C2S 1 +#define NETIO_CMD_S2C 2 +#define NETIO_CMD_RES 3 + +static err_t netio_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); + +static void ICACHE_FLASH_ATTR +netio_close(void *arg, struct tcp_pcb *pcb) +{ + err_t err; + + struct netio_state *ns = arg; + ns->state = NETIO_STATE_DONE; + tcp_recv(pcb, NULL); + err = tcp_close(pcb); + + if (err != ERR_OK) { + /* closing failed, try again later */ + tcp_recv(pcb, netio_recv); + } else { + /* closing succeeded */ +#if NETIO_USE_STATIC_BUF != 1 + if(ns->buf_ptr != NULL){ + mem_free(ns->buf_ptr); + } +#endif + tcp_arg(pcb, NULL); + tcp_poll(pcb, NULL, 0); + tcp_sent(pcb, NULL); + if (arg != NULL) { + mem_free(arg); + } + } +} + +static err_t ICACHE_FLASH_ATTR +netio_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + struct netio_state *ns = arg; + u8_t * data_ptr; + u32_t data_cntr; + struct pbuf *q = p; + u16_t len; + + if (p != NULL) { + tcp_recved(pcb, p->tot_len); + } + + if (err == ERR_OK && q != NULL) { + + while (q != NULL) { + data_cntr = q->len; + data_ptr = q->payload; + while (data_cntr--) { + if (ns->state == NETIO_STATE_DONE){ + netio_close(ns, pcb); + break; + } else if (ns->state == NETIO_STATE_WAIT_FOR_CMD) { + if (ns->cntr < 4) { + /* build up the CMD field */ + ns->cmd <<= 8; + ns->cmd |= *data_ptr++; + ns->cntr++; + } else if (ns->cntr < 8) { + /* build up the DATA field */ + ns->data_len <<= 8; + ns->data_len |= *data_ptr++; + ns->cntr++; + + if (ns->cntr == 8) { + /* now we have full command and data words */ + ns->cntr = 0; + ns->buf_pos = 0; + ns->buf_ptr[0] = 0; + if (ns->cmd == NETIO_CMD_C2S) { + ns->state = NETIO_STATE_RECV_DATA; + } else if (ns->cmd == NETIO_CMD_S2C) { + ns->state = NETIO_STATE_SEND_DATA; + /* start timer */ + ns->time_stamp = sys_now(); + /* send first round of data */ + + len = tcp_sndbuf(pcb); + len = LWIP_MIN(len, ns->data_len - ns->cntr); + len = LWIP_MIN(len, NETIO_BUF_SIZE - ns->buf_pos); + + do { + err = tcp_write(pcb, ns->buf_ptr + ns->buf_pos, len, TCP_WRITE_FLAG_COPY); + if (err == ERR_MEM) { + len /= 2; + } + } while ((err == ERR_MEM) && (len > 1)); + + ns->buf_pos += len; + ns->cntr += len; + + } else { + /* unrecognized command, punt */ + ns->cntr = 0; + ns->buf_pos = 0; + ns->buf_ptr[0] = 0; + netio_close(ns, pcb); + break; + } + } + } else { + /* in trouble... shouldn't be in this state! */ + } + + } else if (ns->state == NETIO_STATE_RECV_DATA) { + + if(ns->cntr == 0){ + /* save the first byte of this new round of data + * this will not match ns->buf_ptr[0] in the case that + * NETIO_BUF_SIZE is less than ns->data_len. + */ + ns->first_byte = *data_ptr; + } + + ns->buf_ptr[ns->buf_pos++] = *data_ptr++; + ns->cntr++; + + if (ns->buf_pos == NETIO_BUF_SIZE) { + /* circularize the buffer */ + ns->buf_pos = 0; + } + + if(ns->cntr == ns->data_len){ + ns->cntr = 0; + if (ns->first_byte != 0) { + /* if this last round did not start with 0, + * go look for another command */ + ns->state = NETIO_STATE_WAIT_FOR_CMD; + ns->data_len = 0; + ns->cmd = 0; + /* TODO LWIP_DEBUGF( print out some throughput calculation results... ); */ + } else { + /* stay here and wait on more data */ + } + } + + } else if (ns->state == NETIO_STATE_SEND_DATA + || ns->state == NETIO_STATE_SEND_DATA_LAST) { + /* I don't think this should happen... */ + } else { + /* done / quit */ + netio_close(ns, pcb); + break; + } /* end of ns->state condition */ + } /* end of while data still in this pbuf */ + + q = q->next; + } + + pbuf_free(p); + + } else { + + /* error or closed by other side */ + if (p != NULL) { + pbuf_free(p); + } + + /* close the connection */ + netio_close(ns, pcb); + + } + return ERR_OK; + +} + +static err_t ICACHE_FLASH_ATTR +netio_sent(void *arg, struct tcp_pcb *pcb, u16_t len) +{ + struct netio_state *ns = arg; + err_t err = ERR_OK; + + if (ns->cntr >= ns->data_len && ns->state == NETIO_STATE_SEND_DATA) { + /* done with this round of sending */ + ns->buf_pos = 0; + ns->cntr = 0; + + /* check if timer expired */ + if (sys_now() - ns->time_stamp > 600) { + ns->buf_ptr[0] = 1; + ns->state = NETIO_STATE_SEND_DATA_LAST; + } else { + ns->buf_ptr[0] = 0; + } + } + + if(ns->state == NETIO_STATE_SEND_DATA_LAST || ns->state == NETIO_STATE_SEND_DATA){ + len = tcp_sndbuf(pcb); + len = LWIP_MIN(len, ns->data_len - ns->cntr); + len = LWIP_MIN(len, NETIO_BUF_SIZE - ns->buf_pos); + + if(ns->cntr < ns->data_len){ + do { + err = tcp_write(pcb, ns->buf_ptr + ns->buf_pos, len, TCP_WRITE_FLAG_COPY); + if (err == ERR_MEM) { + len /= 2; + } + } while ((err == ERR_MEM) && (len > 1)); + + ns->buf_pos += len; + if(ns->buf_pos >= NETIO_BUF_SIZE){ + ns->buf_pos = 0; + } + + ns->cntr += len; + } + } + + if(ns->cntr >= ns->data_len && ns->state == NETIO_STATE_SEND_DATA_LAST){ + /* we have buffered up all our data to send this last round, go look for a command */ + ns->state = NETIO_STATE_WAIT_FOR_CMD; + ns->cntr = 0; + /* TODO LWIP_DEBUGF( print out some throughput calculation results... ); */ + } + + return ERR_OK; +} + +static err_t ICACHE_FLASH_ATTR +netio_poll(void *arg, struct tcp_pcb *pcb) +{ + struct netio_state * ns = arg; + if(ns->state == NETIO_STATE_SEND_DATA){ + + } else if(ns->state == NETIO_STATE_DONE){ + netio_close(ns, pcb); + } + + return ERR_OK; + +} + +#if NETIO_USE_STATIC_BUF == 1 +static u8_t netio_buf[NETIO_BUF_SIZE]; +#endif + +static err_t ICACHE_FLASH_ATTR +netio_accept(void *arg, struct tcp_pcb *pcb, err_t err) +{ + struct netio_state * ns; + + LWIP_UNUSED_ARG(err); + + ns = (struct netio_state *)mem_malloc(sizeof(struct netio_state)); + + if(ns == NULL){ + return ERR_MEM; + } + + ns->state = NETIO_STATE_WAIT_FOR_CMD; + ns->data_len = 0; + ns->cmd = 0; + ns->cntr = 0; + ns->buf_pos = 0; +#if NETIO_USE_STATIC_BUF == 1 + ns->buf_ptr = netio_buf; +#else + ns->buf_ptr = (u8_t *)mem_malloc(NETIO_BUF_SIZE); + + if(ns->buf_ptr == NULL){ + mem_free(ns); + return ERR_MEM; + } +#endif + + ns->buf_ptr[0] = 0; + + tcp_arg(pcb, ns); + tcp_sent(pcb, netio_sent); + tcp_recv(pcb, netio_recv); + tcp_poll(pcb, netio_poll, 4); /* every 2 seconds */ + return ERR_OK; +} + +void ICACHE_FLASH_ATTR netio_init(void) +{ + struct tcp_pcb *pcb; + + pcb = tcp_new(); + tcp_bind(pcb, IP_ADDR_ANY, 18767); + pcb = tcp_listen(pcb); + tcp_accept(pcb, netio_accept); +} + +#endif /* LWIP_TCP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/app/ping.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/ping.c new file mode 100755 index 0000000..4d078b4 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/app/ping.c @@ -0,0 +1,390 @@ +/** + * @file + * Ping sender module + * + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +/** + * This is an example of a "ping" sender (with raw API and socket API). + * It can be used as a start point to maintain opened a network connection, or + * like a network "watchdog" for your device. + * + */ + +/* + * copyright (c) 2010 - 2011 Espressif System + */ + +#include "lwip/opt.h" + +#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/mem.h" +#include "lwip/raw.h" +#include "lwip/icmp.h" +#include "lwip/netif.h" +#include "lwip/sys.h" +#include "lwip/timers.h" +#include "lwip/inet_chksum.h" +#include "os_type.h" +#include "osapi.h" + +#include "lwip/app/ping.h" + +#if PING_USE_SOCKETS +#include "lwip/sockets.h" +#include "lwip/inet.h" +#endif /* PING_USE_SOCKETS */ + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/* ping variables */ +static u16_t ping_seq_num = 0; +static u32_t ping_time; +static struct ping_msg *ping_list = NULL; + +static void ICACHE_FLASH_ATTR ping_coarse_tmr(void *arg); +static void ICACHE_FLASH_ATTR ping_result_tmr(void *arg); + +static void ICACHE_FLASH_ATTR ping_raw_stop(void) +{ + if (ping_list) { + sys_untimeout(ping_result_tmr, ping_list); + raw_remove(ping_list->ping_pcb); + os_free(ping_list); + ping_list = NULL; + } +} + +static void ICACHE_FLASH_ATTR ping_raw_start(struct ping_msg *pingmsg) +{ + ping_list = pingmsg; +} + +static void ICACHE_FLASH_ATTR ping_result_tmr(void *arg) +{ + ping_raw_stop(); +} + +static void ICACHE_FLASH_ATTR ping_prepare_result(void *arg) +{ + struct ping_msg *pingmsg = (struct ping_msg*)arg; + struct ping_option *ping_opt = NULL; + struct ping_resp pingresp; + ip_addr_t ping_target; + + ping_opt = pingmsg->ping_opt; + if (pingmsg->sent_count == 1) { + sys_untimeout(ping_coarse_tmr, pingmsg); + + uint32 delay = system_relative_time(pingmsg->ping_start); + delay /= PING_COARSE; + if (ping_opt->sent_function == NULL) { + os_printf("ping %d, timeout %d, total payload %d bytes, %d ms\n", pingmsg->max_count, pingmsg->timeout_count, + PING_DATA_SIZE * (pingmsg->max_count - pingmsg->timeout_count), delay); + } else { + os_bzero(&pingresp, sizeof(struct ping_resp)); + pingresp.total_count = pingmsg->max_count; + pingresp.timeout_count = pingmsg->timeout_count; + pingresp.total_bytes = PING_DATA_SIZE * (pingmsg->max_count - pingmsg->timeout_count); + pingresp.total_time = delay; + pingresp.ping_err = 0; + } + + if (ping_opt->sent_function != NULL) + ping_opt->sent_function(ping_opt, (uint8*) &pingresp); + + sys_timeout(0, ping_result_tmr, pingmsg); + } +} + +static void ICACHE_FLASH_ATTR ping_timeout(void* arg) +{ + struct ping_msg *pingmsg = (struct ping_msg *)arg; + pingmsg->timeout_count ++; + if (pingmsg->ping_opt->recv_function == NULL){ + os_printf("ping timeout\n"); + } else { + struct ping_resp pingresp; + os_bzero(&pingresp, sizeof(struct ping_resp)); + pingresp.ping_err = -1; + pingmsg->ping_opt->recv_function(pingmsg->ping_opt, (void*)&pingresp); + } + + ping_prepare_result(pingmsg); +} + +/** Prepare a echo ICMP request */ +static void ICACHE_FLASH_ATTR +ping_prepare_echo( struct icmp_echo_hdr *iecho, u16_t len) +{ + size_t i = 0; + size_t data_len = len - sizeof(struct icmp_echo_hdr); + + ICMPH_TYPE_SET(iecho, ICMP_ECHO); + ICMPH_CODE_SET(iecho, 0); + iecho->chksum = 0; + iecho->id = PING_ID; + ++ ping_seq_num; + if (ping_seq_num == 0x7fff) + ping_seq_num = 0; + + iecho->seqno = htons(ping_seq_num); + + /* fill the additional data buffer with some data */ + for(i = 0; i < data_len; i++) { + ((char*)iecho)[sizeof(struct icmp_echo_hdr) + i] = (char)i; + } + + iecho->chksum = inet_chksum(iecho, len); +} + +static void ICACHE_FLASH_ATTR +ping_prepare_er(struct icmp_echo_hdr *iecho, u16_t len) +{ + + ICMPH_TYPE_SET(iecho, ICMP_ER); + ICMPH_CODE_SET(iecho, 0); + iecho->chksum = 0; + + iecho->chksum = inet_chksum(iecho, len); +} + +/* Ping using the raw ip */ +static u8_t ICACHE_FLASH_ATTR +ping_recv(void *arg, struct raw_pcb *pcb, struct pbuf *p, ip_addr_t *addr) +{ + struct icmp_echo_hdr *iecho = NULL; + static u16_t seqno = 0; + struct ping_msg *pingmsg = (struct ping_msg*)arg; + + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_ASSERT("p != NULL", p != NULL); + + if (pbuf_header( p, -PBUF_IP_HLEN)==0) { + iecho = (struct icmp_echo_hdr *)p->payload; + + if ((iecho->id == PING_ID) && (iecho->seqno == htons(ping_seq_num)) && iecho->type == ICMP_ER) { + LWIP_DEBUGF( PING_DEBUG, ("ping: recv ")); + ip_addr_debug_print(PING_DEBUG, addr); + LWIP_DEBUGF( PING_DEBUG, (" %"U32_F" ms\n", (sys_now()-ping_time))); + if (iecho->seqno != seqno){ + /* do some ping result processing */ + { + struct ip_hdr *iphdr = NULL; + char ipaddrstr[16]; + ip_addr_t source_ip; + sys_untimeout(ping_timeout, pingmsg); + os_bzero(&source_ip, sizeof(ip_addr_t)); + os_bzero(ipaddrstr, sizeof(ipaddrstr)); + uint32 delay = system_relative_time(pingmsg->ping_sent); + delay /= PING_COARSE; + iphdr = (struct ip_hdr*)((u8*)iecho - PBUF_IP_HLEN); + source_ip.addr = iphdr->src.addr; + ipaddr_ntoa_r(&source_ip,ipaddrstr, sizeof(ipaddrstr)); + if (pingmsg->ping_opt->recv_function == NULL){ + os_printf("recv %s: byte = %d, time = %d ms, seq = %d\n",ipaddrstr, PING_DATA_SIZE, delay, ntohs(iecho->seqno)); + } else { + struct ping_resp pingresp; + os_bzero(&pingresp, sizeof(struct ping_resp)); + pingresp.bytes = PING_DATA_SIZE; + pingresp.resp_time = delay; + pingresp.seqno = ntohs(iecho->seqno); + pingresp.ping_err = 0; + pingmsg->ping_opt->recv_function(pingmsg->ping_opt,(void*) &pingresp); + } + ping_prepare_result(pingmsg); + } + seqno = iecho->seqno; + } + + PING_RESULT(1); + pbuf_free(p); + return 1; /* eat the packet */ + } +// } else if(iecho->type == ICMP_ECHO){ +// struct pbuf *q = NULL; +// os_printf("receive ping request:seq=%d\n", ntohs(iecho->seqno)); +// q = pbuf_alloc(PBUF_IP, (u16_t)p->tot_len, PBUF_RAM); +// if (q!=NULL) { +// pbuf_copy(q, p); +// iecho = (struct icmp_echo_hdr *)q->payload; +// ping_prepare_er(iecho, q->tot_len); +// raw_sendto(pcb, q, addr); +// pbuf_free(q); +// } +// pbuf_free(p); +// return 1; +// } + } + + return 0; /* don't eat the packet */ +} + +static void ICACHE_FLASH_ATTR +ping_send(struct raw_pcb *raw, ip_addr_t *addr) +{ + struct pbuf *p = NULL; + struct icmp_echo_hdr *iecho = NULL; + size_t ping_size = sizeof(struct icmp_echo_hdr) + PING_DATA_SIZE; + + LWIP_DEBUGF( PING_DEBUG, ("ping: send ")); + ip_addr_debug_print(PING_DEBUG, addr); + LWIP_DEBUGF( PING_DEBUG, ("\n")); + LWIP_ASSERT("ping_size <= 0xffff", ping_size <= 0xffff); + + p = pbuf_alloc(PBUF_IP, (u16_t)ping_size, PBUF_RAM); + if (!p) { + return; + } + if ((p->len == p->tot_len) && (p->next == NULL)) { + iecho = (struct icmp_echo_hdr *)p->payload; + + ping_prepare_echo(iecho, (u16_t)ping_size); + + raw_sendto(raw, p, addr); + ping_time = sys_now(); + } + pbuf_free(p); +} + +static void ICACHE_FLASH_ATTR +ping_coarse_tmr(void *arg) +{ + struct ping_msg *pingmsg = (struct ping_msg*)arg; + struct ping_option *ping_opt= NULL; + struct ping_resp pingresp; + ip_addr_t ping_target; + + LWIP_ASSERT("ping_timeout: no pcb given!", pingmsg != NULL); + ping_target.addr = pingmsg->ping_opt->ip; + ping_opt = pingmsg->ping_opt; + if (--pingmsg->sent_count != 0){ + pingmsg ->ping_sent = system_get_time(); + ping_send(pingmsg->ping_pcb, &ping_target); + + sys_timeout(PING_TIMEOUT_MS, ping_timeout, pingmsg); + sys_timeout(pingmsg->coarse_time, ping_coarse_tmr, pingmsg); + } else { + uint32 delay = system_relative_time(pingmsg->ping_start); + delay /= PING_COARSE; +// ping_seq_num = 0; + if (ping_opt->sent_function == NULL){ + os_printf("ping %d, timeout %d, total payload %d bytes, %d ms\n", + pingmsg->max_count, pingmsg->timeout_count, PING_DATA_SIZE*(pingmsg->max_count - pingmsg->timeout_count),delay); + } else { + os_bzero(&pingresp, sizeof(struct ping_resp)); + pingresp.total_count = pingmsg->max_count; + pingresp.timeout_count = pingmsg->timeout_count; + pingresp.total_bytes = PING_DATA_SIZE*(pingmsg->max_count - pingmsg->timeout_count); + pingresp.total_time = delay; + pingresp.ping_err = 0; + } + sys_untimeout(ping_coarse_tmr, pingmsg); + raw_remove(pingmsg->ping_pcb); + os_free(pingmsg); + if (ping_opt->sent_function != NULL) + ping_opt->sent_function(ping_opt,(uint8*)&pingresp); + } +} + +static bool ICACHE_FLASH_ATTR +ping_raw_init(struct ping_msg *pingmsg) +{ + if (pingmsg == NULL) + return false; + + ip_addr_t ping_target; + pingmsg->ping_pcb = raw_new(IP_PROTO_ICMP); + LWIP_ASSERT("ping_pcb != NULL", pingmsg->ping_pcb != NULL); + + raw_recv(pingmsg->ping_pcb, ping_recv, pingmsg); + raw_bind(pingmsg->ping_pcb, IP_ADDR_ANY); + + ping_target.addr = pingmsg->ping_opt->ip; + pingmsg ->ping_sent = system_get_time(); + ping_send(pingmsg->ping_pcb, &ping_target); + + ping_raw_start(pingmsg); + sys_timeout(PING_TIMEOUT_MS, ping_timeout, pingmsg); + sys_timeout(pingmsg->coarse_time, ping_coarse_tmr, pingmsg); + return true; +} + +bool ICACHE_FLASH_ATTR +ping_start(struct ping_option *ping_opt) +{ + struct ping_msg *pingmsg = NULL; + ping_raw_stop(); + pingmsg = (struct ping_msg *)os_zalloc(sizeof(struct ping_msg)); + if (pingmsg == NULL || ping_opt == NULL) + return false; + + pingmsg->ping_opt = ping_opt; + if (ping_opt->count != 0) + pingmsg->max_count = ping_opt->count; + else + pingmsg->max_count = DEFAULT_PING_MAX_COUNT; + + if (ping_opt->coarse_time != 0) + pingmsg->coarse_time = ping_opt->coarse_time * PING_COARSE; + else + pingmsg->coarse_time = PING_COARSE; + + pingmsg->ping_start = system_get_time(); + pingmsg->sent_count = pingmsg->max_count; + return ping_raw_init(pingmsg); +} + +bool ICACHE_FLASH_ATTR +ping_regist_recv(struct ping_option *ping_opt, ping_recv_function ping_recv) +{ + if (ping_opt == NULL) + return false; + + ping_opt ->recv_function = ping_recv; + return true; +} + +bool ICACHE_FLASH_ATTR +ping_regist_sent(struct ping_option *ping_opt, ping_sent_function ping_sent) +{ + if (ping_opt == NULL) + return false; + + ping_opt ->sent_function = ping_sent; + return true; +} + +#endif /* LWIP_RAW */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/Makefile b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/Makefile new file mode 100755 index 0000000..9915910 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = liblwipcore.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/def.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/def.c new file mode 100755 index 0000000..352b552 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/def.c @@ -0,0 +1,108 @@ +/** + * @file + * Common functions used throughout the stack. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt + * + */ + +#include "lwip/opt.h" +#include "lwip/def.h" + +/** + * These are reference implementations of the byte swapping functions. + * Again with the aim of being simple, correct and fully portable. + * Byte swapping is the second thing you would want to optimize. You will + * need to port it to your architecture and in your cc.h: + * + * #define LWIP_PLATFORM_BYTESWAP 1 + * #define LWIP_PLATFORM_HTONS(x) + * #define LWIP_PLATFORM_HTONL(x) + * + * Note ntohs() and ntohl() are merely references to the htonx counterparts. + */ + +#if (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN) + +/** + * Convert an u16_t from host- to network byte order. + * + * @param n u16_t in host byte order + * @return n in network byte order + */ +u16_t +lwip_htons(u16_t n) +{ + return ((n & 0xff) << 8) | ((n & 0xff00) >> 8); +} + +/** + * Convert an u16_t from network- to host byte order. + * + * @param n u16_t in network byte order + * @return n in host byte order + */ +u16_t +lwip_ntohs(u16_t n) +{ + return lwip_htons(n); +} + +/** + * Convert an u32_t from host- to network byte order. + * + * @param n u32_t in host byte order + * @return n in network byte order + */ +u32_t +lwip_htonl(u32_t n) +{ + return ((n & 0xff) << 24) | + ((n & 0xff00) << 8) | + ((n & 0xff0000UL) >> 8) | + ((n & 0xff000000UL) >> 24); +} + +/** + * Convert an u32_t from network- to host byte order. + * + * @param n u32_t in network byte order + * @return n in host byte order + */ +u32_t +lwip_ntohl(u32_t n) +{ + return lwip_htonl(n); +} + +#endif /* (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN) */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/dhcp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/dhcp.c new file mode 100755 index 0000000..7edc252 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/dhcp.c @@ -0,0 +1,1920 @@ +/** + * @file + * Dynamic Host Configuration Protocol client + * + */ + +/* + * + * Copyright (c) 2001-2004 Leon Woestenberg + * Copyright (c) 2001-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. + * + * Author: Leon Woestenberg + * + * This is a DHCP client for the lwIP TCP/IP stack. It aims to conform + * with RFC 2131 and RFC 2132. + * + * TODO: + * - Support for interfaces other than Ethernet (SLIP, PPP, ...) + * + * Please coordinate changes and requests with Leon Woestenberg + * + * + * Integration with your code: + * + * In lwip/dhcp.h + * #define DHCP_COARSE_TIMER_SECS (recommended 60 which is a minute) + * #define DHCP_FINE_TIMER_MSECS (recommended 500 which equals TCP coarse timer) + * + * Then have your application call dhcp_coarse_tmr() and + * dhcp_fine_tmr() on the defined intervals. + * + * dhcp_start(struct netif *netif); + * starts a DHCP client instance which configures the interface by + * obtaining an IP address lease and maintaining it. + * + * Use dhcp_release(netif) to end the lease and use dhcp_stop(netif) + * to remove the DHCP client. + * + */ + +#include "lwip/opt.h" + +#if LWIP_DHCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/stats.h" +#include "lwip/mem.h" +#include "lwip/udp.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/def.h" +#include "lwip/sys.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "lwip/dns.h" +#include "netif/etharp.h" + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/** Default for DHCP_GLOBAL_XID is 0xABCD0000 + * This can be changed by defining DHCP_GLOBAL_XID and DHCP_GLOBAL_XID_HEADER, e.g. + * #define DHCP_GLOBAL_XID_HEADER "stdlib.h" + * #define DHCP_GLOBAL_XID rand() + */ +#define DHCP_GLOBAL_XID os_random() + +#ifdef DHCP_GLOBAL_XID_HEADER +#include DHCP_GLOBAL_XID_HEADER /* include optional starting XID generation prototypes */ +#endif + +/** DHCP_OPTION_MAX_MSG_SIZE is set to the MTU + * MTU is checked to be big enough in dhcp_start */ +#define DHCP_MAX_MSG_LEN(netif) (netif->mtu) +#define DHCP_MAX_MSG_LEN_MIN_REQUIRED 576 +/** Minimum length for reply before packet is parsed */ +#define DHCP_MIN_REPLY_LEN 44 + +#define REBOOT_TRIES 2 + +/** Option handling: options are parsed in dhcp_parse_reply + * and saved in an array where other functions can load them from. + * This might be moved into the struct dhcp (not necessarily since + * lwIP is single-threaded and the array is only used while in recv + * callback). */ +#define DHCP_OPTION_IDX_OVERLOAD 0 +#define DHCP_OPTION_IDX_MSG_TYPE 1 +#define DHCP_OPTION_IDX_SERVER_ID 2 +#define DHCP_OPTION_IDX_LEASE_TIME 3 +#define DHCP_OPTION_IDX_T1 4 +#define DHCP_OPTION_IDX_T2 5 +#define DHCP_OPTION_IDX_SUBNET_MASK 6 +#define DHCP_OPTION_IDX_ROUTER 7 +#define DHCP_OPTION_IDX_DNS_SERVER 8 +#define DHCP_OPTION_IDX_MAX (DHCP_OPTION_IDX_DNS_SERVER + DNS_MAX_SERVERS) + +/** Holds the decoded option values, only valid while in dhcp_recv. + @todo: move this into struct dhcp? */ +u32_t dhcp_rx_options_val[DHCP_OPTION_IDX_MAX]; +/** Holds a flag which option was received and is contained in dhcp_rx_options_val, + only valid while in dhcp_recv. + @todo: move this into struct dhcp? */ +u8_t dhcp_rx_options_given[DHCP_OPTION_IDX_MAX]; + +#define dhcp_option_given(dhcp, idx) (dhcp_rx_options_given[idx] != 0) +#define dhcp_got_option(dhcp, idx) (dhcp_rx_options_given[idx] = 1) +#define dhcp_clear_option(dhcp, idx) (dhcp_rx_options_given[idx] = 0) +#define dhcp_clear_all_options(dhcp) (os_memset(dhcp_rx_options_given, 0, sizeof(dhcp_rx_options_given))) +#define dhcp_get_option_value(dhcp, idx) (dhcp_rx_options_val[idx]) +#define dhcp_set_option_value(dhcp, idx, val) (dhcp_rx_options_val[idx] = (val)) + +bool manual_set_flag = false; /* add for AT by tzx*/ + +/* DHCP client state machine functions */ +static err_t dhcp_discover(struct netif *netif); +static err_t dhcp_select(struct netif *netif); +static void dhcp_bind(struct netif *netif); +#if DHCP_DOES_ARP_CHECK +static err_t dhcp_decline(struct netif *netif); +#endif /* DHCP_DOES_ARP_CHECK */ +static err_t dhcp_rebind(struct netif *netif); +static err_t dhcp_reboot(struct netif *netif); +static void dhcp_set_state(struct dhcp *dhcp, u8_t new_state); + +/* receive, unfold, parse and free incoming messages */ +static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, ip_addr_t *addr, u16_t port); + +/* set the DHCP timers */ +static void dhcp_timeout(struct netif *netif); +static void dhcp_t1_timeout(struct netif *netif); +static void dhcp_t2_timeout(struct netif *netif); + +/* build outgoing messages */ +/* create a DHCP message, fill in common headers */ +static err_t dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type); +/* free a DHCP request */ +static void dhcp_delete_msg(struct dhcp *dhcp); +/* add a DHCP option (type, then length in bytes) */ +static void dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len); +/* add option values */ +static void dhcp_option_byte(struct dhcp *dhcp, u8_t value); +static void dhcp_option_short(struct dhcp *dhcp, u16_t value); +static void dhcp_option_long(struct dhcp *dhcp, u32_t value); +/* always add the DHCP options trailer to end and pad */ +static void dhcp_option_trailer(struct dhcp *dhcp); + +static int vendor_class_len = 0; +static char * vendor_class_buf = NULL; +err_t dhcp_set_vendor_class_identifier(uint8_t len, char *str) { + if (len == 0) + return ERR_ARG; + + if (str == NULL) + return ERR_ARG; + + vendor_class_buf = (char *)mem_zalloc(len + 1); + if (vendor_class_buf == NULL) { + return ERR_MEM; + } + vendor_class_len = len; + memcpy(vendor_class_buf, str, len); +} + +/** + * Back-off the DHCP client (because of a received NAK response). + * + * Back-off the DHCP client because of a received NAK. Receiving a + * NAK means the client asked for something non-sensible, for + * example when it tries to renew a lease obtained on another network. + * + * We clear any existing set IP address and restart DHCP negotiation + * afresh (as per RFC2131 3.2.3). + * + * @param netif the netif under DHCP control + */ +static void ICACHE_FLASH_ATTR +dhcp_handle_nak(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* Set the interface down since the address must no longer be used, as per RFC2131 */ + netif_set_down(netif); + /* remove IP address from interface */ + netif_set_ipaddr(netif, IP_ADDR_ANY); + netif_set_gw(netif, IP_ADDR_ANY); + netif_set_netmask(netif, IP_ADDR_ANY); + /* Change to a defined state */ + dhcp_set_state(dhcp, DHCP_BACKING_OFF); + /* We can immediately restart discovery */ + dhcp_discover(netif); +} + +#if DHCP_DOES_ARP_CHECK +/** + * Checks if the offered IP address is already in use. + * + * It does so by sending an ARP request for the offered address and + * entering CHECKING state. If no ARP reply is received within a small + * interval, the address is assumed to be free for use by us. + * + * @param netif the netif under DHCP control + */ +static void ICACHE_FLASH_ATTR +dhcp_check(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0], + (s16_t)netif->name[1])); + dhcp_set_state(dhcp, DHCP_CHECKING); + /* create an ARP query for the offered IP address, expecting that no host + responds, as the IP address should not be in use. */ + result = etharp_query(netif, &dhcp->offered_ip_addr, NULL); + if (result != ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n")); + } + dhcp->tries++; + msecs = 500; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs)); +} +#endif /* DHCP_DOES_ARP_CHECK */ + +/** + * Remember the configuration offered by a DHCP server. + * + * @param netif the netif under DHCP control + */ +static void ICACHE_FLASH_ATTR +dhcp_handle_offer(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* obtain the server address */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) { + ip4_addr_set_u32(&dhcp->server_ip_addr, htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID))); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n", + ip4_addr_get_u32(&dhcp->server_ip_addr))); + /* remember offered address */ + ip_addr_copy(dhcp->offered_ip_addr, dhcp->msg_in->yiaddr); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n", + ip4_addr_get_u32(&dhcp->offered_ip_addr))); + + dhcp_select(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void*)netif)); + } +} + +/** + * Select a DHCP server offer out of all offers. + * + * Simply select the first offer received. + * + * @param netif the netif under DHCP control + * @return lwIP specific error (see error.h) + */ +static err_t ICACHE_FLASH_ATTR +dhcp_select(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + dhcp_set_state(dhcp, DHCP_REQUESTING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, dhcp, DHCP_REQUEST); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + + /* MUST request the offered IP address */ + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr))); + + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(ip4_addr_get_u32(&dhcp->server_ip_addr))); + + dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 12/*num options*/); + dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); + dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); + dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); + dhcp_option_byte(dhcp, DHCP_OPTION_DOMAIN_NAME); + dhcp_option_byte(dhcp, DHCP_OPTION_NB_TINS); + dhcp_option_byte(dhcp, DHCP_OPTION_NB_TINT); + dhcp_option_byte(dhcp, DHCP_OPTION_NB_TIS); + dhcp_option_byte(dhcp, DHCP_OPTION_PRD); + dhcp_option_byte(dhcp, DHCP_OPTION_STATIC_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_CLASSLESS_STATIC_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_VSN); + +#if LWIP_NETIF_HOSTNAME + if (netif->hostname != NULL) { + const char *p = (const char*)netif->hostname; + u8_t namelen = (u8_t)os_strlen(p); + if (namelen > 0) { + LWIP_ASSERT("DHCP: hostname is too long!", namelen < 255); + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, namelen); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + + if (vendor_class_buf != NULL) { + const char *p = (const char*)vendor_class_buf; + u8_t namelen = (u8_t)os_strlen(p); + if (vendor_class_len > 0) { + LWIP_ASSERT("DHCP: vendor_class_len is too long!", vendor_class_len < 255); + dhcp_option(dhcp, DHCP_OPTION_US, vendor_class_len); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } + + dhcp_option_trailer(dhcp); + /* shrink the pbuf to the actual content length */ + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* send broadcast to any DHCP server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_msg(dhcp); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = (dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * The DHCP timer that checks for lease renewal/rebind timeouts. + */ +void ICACHE_FLASH_ATTR +dhcp_coarse_tmr() +{ + struct netif *netif = netif_list; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n")); + /* iterate through all network interfaces */ + while (netif != NULL) { + /* only act on DHCP configured interfaces */ + if ((netif->dhcp != NULL) && (netif->dhcp->state != DHCP_OFF)) { + /* compare lease time to expire timeout */ + if (netif->dhcp->t0_timeout && (++netif->dhcp->lease_used == netif->dhcp->t0_timeout)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n")); + /* this clients' lease time has expired */ + dhcp_release(netif); + dhcp_discover(netif); + /* timer is active (non zero), and triggers (zeroes) now? */ + } else if (netif->dhcp->t2_rebind_time && (netif->dhcp->t2_rebind_time-- == 1)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n")); + /* this clients' rebind timeout triggered */ + dhcp_t2_timeout(netif); + /* timer is active (non zero), and triggers (zeroes) now */ + } else if (netif->dhcp->t1_renew_time && (netif->dhcp->t1_renew_time-- == 1)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n")); + /* this clients' renewal timeout triggered */ + dhcp_t1_timeout(netif); + } + } + /* proceed to next netif */ + netif = netif->next; + } +} + +/** + * DHCP transaction timeout handling + * + * A DHCP server is expected to respond within a short period of time. + * This timer checks whether an outstanding DHCP request is timed out. + */ +void ICACHE_FLASH_ATTR +dhcp_fine_tmr() +{ + struct netif *netif = netif_list; + /* loop through netif's */ + while (netif != NULL) { + /* only act on DHCP configured interfaces */ + if (netif->dhcp != NULL) { + /*add DHCP retries processing by LiuHan*/ + if (DHCP_MAXRTX != 0 && netif->dhcp->state != DHCP_RENEWING) { + if (netif->dhcp->tries >= DHCP_MAXRTX){ + os_printf("DHCP timeout\n"); + if (netif->dhcp_event != NULL) + netif->dhcp_event(); + break; + } + } + /* timer is active (non zero), and is about to trigger now */ + if (netif->dhcp->request_timeout > 1) { + netif->dhcp->request_timeout--; + } + else if (netif->dhcp->request_timeout == 1) { + netif->dhcp->request_timeout--; + /* { netif->dhcp->request_timeout == 0 } */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n")); + /* this client's request timeout triggered */ + dhcp_timeout(netif); + } + } + /* proceed to next network interface */ + netif = netif->next; + } + +} + +/** + * A DHCP negotiation transaction, or ARP request, has timed out. + * + * The timer that was started with the DHCP or ARP request has + * timed out, indicating no response was received in time. + * + * @param netif the netif under DHCP control + */ +static void ICACHE_FLASH_ATTR +dhcp_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n")); + /* back-off period has passed, or server selection timed out */ + if ((dhcp->state == DHCP_BACKING_OFF) || (dhcp->state == DHCP_SELECTING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n")); + dhcp_discover(netif); + /* receiving the requested lease timed out */ + } else if (dhcp->state == DHCP_REQUESTING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REQUESTING, DHCP request timed out\n")); + if (dhcp->tries <= 5) { + dhcp_select(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REQUESTING, releasing, restarting\n")); + dhcp_release(netif); + dhcp_discover(netif); + } +#if DHCP_DOES_ARP_CHECK + /* received no ARP reply for the offered address (which is good) */ + } else if (dhcp->state == DHCP_CHECKING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): CHECKING, ARP request timed out\n")); + if (dhcp->tries <= 1) { + dhcp_check(netif); + /* no ARP replies on the offered address, + looks like the IP address is indeed free */ + } else { + /* bind the interface to the offered address */ + dhcp_bind(netif); + } +#endif /* DHCP_DOES_ARP_CHECK */ + } else if (dhcp->state == DHCP_REBOOTING) { + if (dhcp->tries < REBOOT_TRIES) { + dhcp_reboot(netif); + } else { + dhcp_discover(netif); + } + } +} + +/** + * The renewal period has timed out. + * + * @param netif the netif under DHCP control + */ +static void ICACHE_FLASH_ATTR +dhcp_t1_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n")); + if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || + (dhcp->state == DHCP_RENEWING)) { + /* just retry to renew - note that the rebind timer (t2) will + * eventually time-out if renew tries fail. */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("dhcp_t1_timeout(): must renew\n")); + /* This slightly different to RFC2131: DHCPREQUEST will be sent from state + DHCP_RENEWING, not DHCP_BOUND */ + dhcp_renew(netif); + /* Calculate next timeout */ + if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) + { + dhcp->t1_renew_time = ((dhcp->t2_timeout - dhcp->lease_used) / 2); + } + } +} + +/** + * The rebind period has timed out. + * + * @param netif the netif under DHCP control + */ +static void ICACHE_FLASH_ATTR +dhcp_t2_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n")); + if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || + (dhcp->state == DHCP_RENEWING)) { + /* just retry to rebind */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("dhcp_t2_timeout(): must rebind\n")); + /* This slightly different to RFC2131: DHCPREQUEST will be sent from state + DHCP_REBINDING, not DHCP_BOUND */ + dhcp_rebind(netif); + /* Calculate next timeout */ + if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) + { + dhcp->t2_rebind_time = ((dhcp->t0_timeout - dhcp->lease_used) / 2); + } + } +} + +/** + * Handle a DHCP ACK packet + * + * @param netif the netif under DHCP control + */ +static void ICACHE_FLASH_ATTR +dhcp_handle_ack(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; +#if LWIP_DNS + u8_t n; +#endif /* LWIP_DNS */ + + /* clear options we might not get from the ACK */ + ip_addr_set_zero(&dhcp->offered_sn_mask); + ip_addr_set_zero(&dhcp->offered_gw_addr); +#if LWIP_DHCP_BOOTP_FILE + ip_addr_set_zero(&dhcp->offered_si_addr); +#endif /* LWIP_DHCP_BOOTP_FILE */ + + /* lease time given? */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) { + /* remember offered lease time */ + dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME); + } + /* renewal period given? */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) { + /* remember given renewal period */ + dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1); + } else { + /* calculate safe periods for renewal */ + dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2; + } + + /* renewal period given? */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) { + /* remember given rebind period */ + dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2); + } else { + /* calculate safe periods for rebinding */ + dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U; + } + + /* (y)our internet address */ + ip_addr_copy(dhcp->offered_ip_addr, dhcp->msg_in->yiaddr); + +#if LWIP_DHCP_BOOTP_FILE + /* copy boot server address, + boot file name copied in dhcp_parse_reply if not overloaded */ + ip_addr_copy(dhcp->offered_si_addr, dhcp->msg_in->siaddr); +#endif /* LWIP_DHCP_BOOTP_FILE */ + + /* subnet mask given? */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) { + /* remember given subnet mask */ + ip4_addr_set_u32(&dhcp->offered_sn_mask, htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK))); + dhcp->subnet_mask_given = 1; + } else { + dhcp->subnet_mask_given = 0; + } + + /* gateway router */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) { + ip4_addr_set_u32(&dhcp->offered_gw_addr, htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER))); + } + +#if LWIP_DNS + /* DNS servers */ + n = 0; + if(manual_set_flag == false) { + while(dhcp_option_given(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n) && (n < DNS_MAX_SERVERS)) { + ip_addr_t dns_addr; + ip4_addr_set_u32(&dns_addr, htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n))); + dns_setserver(n, &dns_addr); + n++; + } + } +#endif /* LWIP_DNS */ +} + +/** Set a statically allocated struct dhcp to work with. + * Using this prevents dhcp_start to allocate it using mem_malloc. + * + * @param netif the netif for which to set the struct dhcp + * @param dhcp (uninitialised) dhcp struct allocated by the application + */ +void ICACHE_FLASH_ATTR +dhcp_set_struct(struct netif *netif, struct dhcp *dhcp) +{ + LWIP_ASSERT("netif != NULL", netif != NULL); + LWIP_ASSERT("dhcp != NULL", dhcp != NULL); + LWIP_ASSERT("netif already has a struct dhcp set", netif->dhcp == NULL); + + /* clear data structure */ + os_memset(dhcp, 0, sizeof(struct dhcp)); + /* dhcp_set_state(&dhcp, DHCP_OFF); */ + netif->dhcp = dhcp; +} + +/** Removes a struct dhcp from a netif. + * + * ATTENTION: Only use this when not using dhcp_set_struct() to allocate the + * struct dhcp since the memory is passed back to the heap. + * + * @param netif the netif from which to remove the struct dhcp + */ +void ICACHE_FLASH_ATTR dhcp_cleanup(struct netif *netif) +{ + LWIP_ASSERT("netif != NULL", netif != NULL); + + if (netif->dhcp != NULL) { + mem_free(netif->dhcp); + netif->dhcp = NULL; + } +} + +/** + * Start DHCP negotiation for a network interface. + * + * If no DHCP client instance was attached to this interface, + * a new client is created first. If a DHCP client instance + * was already present, it restarts negotiation. + * + * @param netif The lwIP network interface + * @return lwIP error code + * - ERR_OK - No error + * - ERR_MEM - Out of memory + */ +err_t ICACHE_FLASH_ATTR +dhcp_start(struct netif *netif) +{ + struct dhcp *dhcp; + err_t result = ERR_OK; + LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;); + dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* Remove the flag that says this netif is handled by DHCP, + it is set when we succeeded starting. */ + netif->flags &= ~NETIF_FLAG_DHCP; + + /* check hwtype of the netif */ + if ((netif->flags & NETIF_FLAG_ETHARP) == 0) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): No ETHARP netif\n")); + return ERR_ARG; + } + + /* check MTU of the netif */ + if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n")); + return ERR_MEM; + } + + /* no DHCP client attached yet? */ + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting new DHCP client\n")); + dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp)); + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n")); + return ERR_MEM; + } + /* store this dhcp client in the netif */ + netif->dhcp = dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp")); + /* already has DHCP client attached */ + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n")); + if (dhcp->pcb != NULL) { + udp_remove(dhcp->pcb); + } + LWIP_ASSERT("pbuf p_out wasn't freed", dhcp->p_out == NULL); + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL ); + } + + /* clear data structure */ + os_memset(dhcp, 0, sizeof(struct dhcp)); + /* dhcp_set_state(&dhcp, DHCP_OFF); */ + /* allocate UDP PCB */ + dhcp->pcb = udp_new(); + if (dhcp->pcb == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not obtain pcb\n")); + return ERR_MEM; + } + dhcp->pcb->so_options |= SOF_BROADCAST; + /* set up local and remote port for the pcb */ + udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); + udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); + /* set up the recv callback and argument */ + udp_recv(dhcp->pcb, dhcp_recv, netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n")); + /* (re)start the DHCP negotiation */ + result = dhcp_discover(netif); + if (result != ERR_OK) { + /* free resources allocated above */ + dhcp_stop(netif); + return ERR_MEM; + } + /* Set the flag that says this netif is handled by DHCP. */ + netif->flags |= NETIF_FLAG_DHCP; + return result; +} + +/** + * Inform a DHCP server of our manual configuration. + * + * This informs DHCP servers of our fixed IP address configuration + * by sending an INFORM message. It does not involve DHCP address + * configuration, it is just here to be nice to the network. + * + * @param netif The lwIP network interface + */ +void ICACHE_FLASH_ATTR +dhcp_inform(struct netif *netif) +{ + struct dhcp dhcp; + err_t result = ERR_OK; + struct udp_pcb *pcb; + + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + + os_memset(&dhcp, 0, sizeof(struct dhcp)); + dhcp_set_state(&dhcp, DHCP_INFORM); + + if ((netif->dhcp != NULL) && (netif->dhcp->pcb != NULL)) { + /* re-use existing pcb */ + pcb = netif->dhcp->pcb; + } else { + pcb = udp_new(); + if (pcb == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform(): could not obtain pcb")); + return; + } + dhcp.pcb = pcb; + dhcp.pcb->so_options |= SOF_BROADCAST; + udp_bind(dhcp.pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_inform(): created new udp pcb\n")); + } + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, &dhcp, DHCP_INFORM); + if (result == ERR_OK) { + dhcp_option(&dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(&dhcp, DHCP_MAX_MSG_LEN(netif)); + + dhcp_option_trailer(&dhcp); + + pbuf_realloc(dhcp.p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp.options_out_len); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_inform: INFORMING\n")); + udp_sendto_if(pcb, dhcp.p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_msg(&dhcp); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform: could not allocate DHCP request\n")); + } + + if (dhcp.pcb != NULL) { + /* otherwise, the existing pcb was used */ + udp_remove(dhcp.pcb); + } +} + +/** Handle a possible change in the network configuration. + * + * This enters the REBOOTING state to verify that the currently bound + * address is still valid. + */ +void ICACHE_FLASH_ATTR +dhcp_network_changed(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + if (!dhcp) + return; + switch (dhcp->state) { + case DHCP_REBINDING: + case DHCP_RENEWING: + case DHCP_BOUND: + case DHCP_REBOOTING: + netif_set_down(netif); + dhcp->tries = 0; + dhcp_reboot(netif); + break; + case DHCP_OFF: + /* stay off */ + break; + default: + dhcp->tries = 0; +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_ON) { + autoip_stop(netif); + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF; + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + dhcp_discover(netif); + break; + } +} + +#if DHCP_DOES_ARP_CHECK +/** + * Match an ARP reply with the offered IP address. + * + * @param netif the network interface on which the reply was received + * @param addr The IP address we received a reply from + */ +void ICACHE_FLASH_ATTR dhcp_arp_reply(struct netif *netif, ip_addr_t *addr) +{ + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n")); + /* is a DHCP client doing an ARP check? */ + if ((netif->dhcp != NULL) && (netif->dhcp->state == DHCP_CHECKING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n", + ip4_addr_get_u32(addr))); + /* did a host respond with the address we + were offered by the DHCP server? */ + if (ip_addr_cmp(addr, &netif->dhcp->offered_ip_addr)) { + /* we will not accept the offered address */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("dhcp_arp_reply(): arp reply matched with offered address, declining\n")); + dhcp_decline(netif); + } + } +} + +/** + * Decline an offered lease. + * + * Tell the DHCP server we do not accept the offered address. + * One reason to decline the lease is when we find out the address + * is already in use by another host (through ARP). + * + * @param netif the netif under DHCP control + */ +static err_t ICACHE_FLASH_ATTR +dhcp_decline(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result = ERR_OK; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n")); + dhcp_set_state(dhcp, DHCP_BACKING_OFF); + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, dhcp, DHCP_DECLINE); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr))); + + dhcp_option_trailer(dhcp); + /* resize pbuf to reflect true size of options */ + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* per section 4.4.4, broadcast DECLINE messages */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_msg(dhcp); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_decline: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = 10*1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} +#endif /* DHCP_DOES_ARP_CHECK */ + + +/** + * Start the DHCP process, discover a DHCP server. + * + * @param netif the netif under DHCP control + */ +static err_t ICACHE_FLASH_ATTR +dhcp_discover(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result = ERR_OK; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n")); + ip_addr_set_any(&dhcp->offered_ip_addr); + dhcp_set_state(dhcp, DHCP_SELECTING); + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER); + if (result == ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n")); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + +#if LWIP_NETIF_HOSTNAME + if (netif->hostname != NULL) { + const char *p = (const char*)netif->hostname; + u8_t namelen = (u8_t)os_strlen(p); + if (namelen > 0) { + LWIP_ASSERT("DHCP: hostname is too long!", namelen < 255); + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, namelen); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + + if (vendor_class_buf != NULL) { + const char *p = (const char*)vendor_class_buf; + u8_t namelen = (u8_t)os_strlen(p); + if (vendor_class_len > 0) { + LWIP_ASSERT("DHCP: vendor_class_len is too long!", vendor_class_len < 255); + dhcp_option(dhcp, DHCP_OPTION_US, vendor_class_len); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } + + dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 12/*num options*/); + dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); + dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); + dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); + dhcp_option_byte(dhcp, DHCP_OPTION_DOMAIN_NAME); + dhcp_option_byte(dhcp, DHCP_OPTION_NB_TINS); + dhcp_option_byte(dhcp, DHCP_OPTION_NB_TINT); + dhcp_option_byte(dhcp, DHCP_OPTION_NB_TIS); + dhcp_option_byte(dhcp, DHCP_OPTION_PRD); + dhcp_option_byte(dhcp, DHCP_OPTION_STATIC_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_CLASSLESS_STATIC_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_VSN); + + dhcp_option_trailer(dhcp); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: realloc()ing\n")); + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, DHCP_SERVER_PORT)\n")); + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n")); + dhcp_delete_msg(dhcp); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n")); + } + dhcp->tries++; +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) { + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON; + autoip_start(netif); + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + msecs = (dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +extern int system_station_got_ip_set(ip_addr_t *ip, ip_addr_t *mask, ip_addr_t *gw); +/** + * Bind the interface to the offered IP address. + * + * @param netif network interface to bind to the offered address + */ +static void ICACHE_FLASH_ATTR +dhcp_bind(struct netif *netif) +{ + u32_t timeout; + struct dhcp *dhcp; + ip_addr_t sn_mask, gw_addr; + LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;); + dhcp = netif->dhcp; + LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* reset time used of lease */ + dhcp->lease_used = 0; + + if (dhcp->offered_t0_lease != 0xffffffffUL) { + /* set renewal period timer */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease)); + timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; + if (timeout > 0xffff) { + timeout = 0xffff; + } + dhcp->t0_timeout = (u16_t)timeout; + if (dhcp->t0_timeout == 0) { + dhcp->t0_timeout = 1; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease*1000)); + } + + /* temporary DHCP lease? */ + if (dhcp->offered_t1_renew != 0xffffffffUL) { + /* set renewal period timer */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew)); + timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; + if(timeout > 0xffff) { + timeout = 0xffff; + } + dhcp->t1_timeout = (u16_t)timeout; + if (dhcp->t1_timeout == 0) { + dhcp->t1_timeout = 1; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew*1000)); + dhcp->t1_renew_time = dhcp->t1_timeout; + } + /* set renewal period timer */ + if (dhcp->offered_t2_rebind != 0xffffffffUL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind)); + timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; + if(timeout > 0xffff) { + timeout = 0xffff; + } + dhcp->t2_timeout = (u16_t)timeout; + if (dhcp->t2_timeout == 0) { + dhcp->t2_timeout = 1; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind*1000)); + dhcp->t2_rebind_time = dhcp->t2_timeout; + } + + /* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. modify by ives at 2014.4.22*/ + if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) { + dhcp->t1_timeout = 0; + } + + if (dhcp->subnet_mask_given) { + /* copy offered network mask */ + ip_addr_copy(sn_mask, dhcp->offered_sn_mask); + } else { + /* subnet mask not given */ + if (!ip_addr_isany(&netif->netmask)) { + /* if there is a previous subnet mask, use it */ + ip_addr_copy(sn_mask, netif->netmask); + } else { + /* choose a safe subnet mask given the network class */ + u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr); + if (first_octet <= 127) { + ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000)); + } else if (first_octet >= 192) { + ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00)); + } else { + ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000)); + } + } + } + + /* gateway address not given? */ + if (!ip_addr_isany(&dhcp->offered_gw_addr)) { + /* Use the offered address */ + ip_addr_copy(gw_addr, dhcp->offered_gw_addr); + } else if (!ip_addr_isany(&netif->gw)) { + /* Use the address previously received */ + ip_addr_copy(gw_addr, netif->gw); + } else { + /* copy network address */ + ip_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask); + /* assume gateway is xxx.xxx.xxx.1 */ + ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001)); + } + +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_ON) { + autoip_stop(netif); + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF; + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + + // wjg:back up old ip/netmask/gw + ip_addr_t ip, mask, gw; + ip = netif->ip_addr; + mask = netif->netmask; + gw = netif->gw; + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F"\n", + ip4_addr_get_u32(&dhcp->offered_ip_addr))); + netif_set_ipaddr(netif, &dhcp->offered_ip_addr); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): SN: 0x%08"X32_F"\n", + ip4_addr_get_u32(&sn_mask))); + netif_set_netmask(netif, &sn_mask); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): GW: 0x%08"X32_F"\n", + ip4_addr_get_u32(&gw_addr))); + netif_set_gw(netif, &gw_addr); + + /* bring the interface up */ + netif_set_up(netif); + + // wjg: use old ip/mask/gw to check whether ip/mask/gw changed + system_station_got_ip_set(&ip, &mask, &gw); + + /* netif is now bound to DHCP leased address */ + dhcp_set_state(dhcp, DHCP_BOUND); +} + +/** + * Renew an existing DHCP lease at the involved DHCP server. + * + * @param netif network interface which must renew its lease + */ +err_t ICACHE_FLASH_ATTR +dhcp_renew(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n")); + dhcp_set_state(dhcp, DHCP_RENEWING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, dhcp, DHCP_REQUEST); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + +#if LWIP_NETIF_HOSTNAME + if (netif->hostname != NULL) { + const char *p = (const char*)netif->hostname; + u8_t namelen = (u8_t)os_strlen(p); + if (namelen > 0) { + LWIP_ASSERT("DHCP: hostname is too long!", namelen < 255); + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, namelen); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + + if (vendor_class_buf != NULL) { + const char *p = (const char*)vendor_class_buf; + u8_t namelen = (u8_t)os_strlen(p); + if (vendor_class_len > 0) { + LWIP_ASSERT("DHCP: vendor_class_len is too long!", vendor_class_len < 255); + dhcp_option(dhcp, DHCP_OPTION_US, vendor_class_len); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); +#endif + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); +#endif + /* append DHCP message trailer */ + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + udp_sendto_if(dhcp->pcb, dhcp->p_out, &dhcp->server_ip_addr, DHCP_SERVER_PORT, netif); + dhcp_delete_msg(dhcp); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n")); + } + dhcp->tries++; + /* back-off on retries, but to a maximum of 20 seconds */ + msecs = dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * Rebind with a DHCP server for an existing DHCP lease. + * + * @param netif network interface which must rebind with a DHCP server + */ +static err_t ICACHE_FLASH_ATTR +dhcp_rebind(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n")); + dhcp_set_state(dhcp, DHCP_REBINDING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, dhcp, DHCP_REQUEST); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + +#if LWIP_NETIF_HOSTNAME + if (netif->hostname != NULL) { + const char *p = (const char*)netif->hostname; + u8_t namelen = (u8_t)os_strlen(p); + if (namelen > 0) { + LWIP_ASSERT("DHCP: hostname is too long!", namelen < 255); + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, namelen); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + + if (vendor_class_buf != NULL) { + const char *p = (const char*)vendor_class_buf; + u8_t namelen = (u8_t)os_strlen(p); + if (vendor_class_len > 0) { + LWIP_ASSERT("DHCP: vendor_class_len is too long!", vendor_class_len < 255); + dhcp_option(dhcp, DHCP_OPTION_US, vendor_class_len); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } + } + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); +#endif + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* broadcast to server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_msg(dhcp); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * Enter REBOOTING state to verify an existing lease + * + * @param netif network interface which must reboot + */ +static err_t ICACHE_FLASH_ATTR +dhcp_reboot(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n")); + dhcp_set_state(dhcp, DHCP_REBOOTING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, dhcp, DHCP_REQUEST); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, 576); + + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr))); + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* broadcast to server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_msg(dhcp); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + + +/** + * Release a DHCP lease. + * + * @param netif network interface which must release its lease + */ +err_t ICACHE_FLASH_ATTR +dhcp_release(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release()\n")); + if (dhcp == NULL) { + return ERR_ARG; + } + + /* idle DHCP client */ + dhcp_set_state(dhcp, DHCP_OFF); + /* clean old DHCP offer */ + ip_addr_set_zero(&dhcp->server_ip_addr); + ip_addr_set_zero(&dhcp->offered_ip_addr); + ip_addr_set_zero(&dhcp->offered_sn_mask); + ip_addr_set_zero(&dhcp->offered_gw_addr); +#if LWIP_DHCP_BOOTP_FILE + ip_addr_set_zero(&dhcp->offered_si_addr); +#endif /* LWIP_DHCP_BOOTP_FILE */ + dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0; + dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0; + + /* create and initialize the DHCP message header */ + result = dhcp_create_msg(netif, dhcp, DHCP_RELEASE); + if (result == ERR_OK) { + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + udp_sendto_if(dhcp->pcb, dhcp->p_out, &dhcp->server_ip_addr, DHCP_SERVER_PORT, netif); + dhcp_delete_msg(dhcp); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_release: RELEASED, DHCP_OFF\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_release(): set request timeout %"U16_F" msecs\n", msecs)); + /* bring the interface down */ + netif_set_down(netif); + /* remove IP address from interface */ + netif_set_ipaddr(netif, IP_ADDR_ANY); + netif_set_gw(netif, IP_ADDR_ANY); + netif_set_netmask(netif, IP_ADDR_ANY); + + return result; +} + +/** + * Remove the DHCP client from the interface. + * + * @param netif The network interface to stop DHCP on + */ +void ICACHE_FLASH_ATTR +dhcp_stop(struct netif *netif) +{ + struct dhcp *dhcp; + LWIP_ERROR("dhcp_stop: netif != NULL", (netif != NULL), return;); + dhcp = netif->dhcp; + /* Remove the flag that says this netif is handled by DHCP. */ + netif->flags &= ~NETIF_FLAG_DHCP; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_stop()\n")); + /* netif is DHCP configured? */ + if (dhcp != NULL) { +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_ON) { + autoip_stop(netif); + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF; + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + + if (dhcp->pcb != NULL) { + udp_remove(dhcp->pcb); + dhcp->pcb = NULL; + } + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL); + dhcp_set_state(dhcp, DHCP_OFF); + } +} + +/* + * Set the DHCP state of a DHCP client. + * + * If the state changed, reset the number of tries. + */ +static void ICACHE_FLASH_ATTR +dhcp_set_state(struct dhcp *dhcp, u8_t new_state) +{ + if (new_state != dhcp->state) { + dhcp->state = new_state; + dhcp->tries = 0; + dhcp->request_timeout = 0; + } +} + +/* + * Concatenate an option type and length field to the outgoing + * DHCP message. + * + */ +static void ICACHE_FLASH_ATTR +dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len) +{ + LWIP_ASSERT("dhcp_option: dhcp->options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = option_type; + dhcp->msg_out->options[dhcp->options_out_len++] = option_len; +} +/* + * Concatenate a single byte to the outgoing DHCP message. + * + */ +static void ICACHE_FLASH_ATTR +dhcp_option_byte(struct dhcp *dhcp, u8_t value) +{ + LWIP_ASSERT("dhcp_option_byte: dhcp->options_out_len < DHCP_OPTIONS_LEN", dhcp->options_out_len < DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = value; +} + +static void ICACHE_FLASH_ATTR +dhcp_option_short(struct dhcp *dhcp, u16_t value) +{ + LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len + 2 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2U <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0xff00U) >> 8); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t) (value & 0x00ffU); +} + +static void ICACHE_FLASH_ATTR +dhcp_option_long(struct dhcp *dhcp, u32_t value) +{ + LWIP_ASSERT("dhcp_option_long: dhcp->options_out_len + 4 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 4U <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x000000ffUL)); +} + +/** + * Extract the DHCP message and the DHCP options. + * + * Extract the DHCP message and the DHCP options, each into a contiguous + * piece of memory. As a DHCP message is variable sized by its options, + * and also allows overriding some fields for options, the easy approach + * is to first unfold the options into a conitguous piece of memory, and + * use that further on. + * + */ +static err_t ICACHE_FLASH_ATTR +dhcp_parse_reply(struct dhcp *dhcp, struct pbuf *p) +{ + u8_t *options; + u16_t offset; + u16_t offset_max; + u16_t options_idx; + u16_t options_idx_max; + struct pbuf *q; + int parse_file_as_options = 0; + int parse_sname_as_options = 0; + + /* clear received options */ + dhcp_clear_all_options(dhcp); + /* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */ + if (p->len < DHCP_SNAME_OFS) { + return ERR_BUF; + } + dhcp->msg_in = (struct dhcp_msg *)p->payload; +#if LWIP_DHCP_BOOTP_FILE + /* clear boot file name */ + dhcp->boot_file_name[0] = 0; +#endif /* LWIP_DHCP_BOOTP_FILE */ + + /* parse options */ + + /* start with options field */ + options_idx = DHCP_OPTIONS_OFS; + /* parse options to the end of the received packet */ + options_idx_max = p->tot_len; +again: + q = p; + while((q != NULL) && (options_idx >= q->len)) { + options_idx -= q->len; + options_idx_max -= q->len; + q = q->next; + } + if (q == NULL) { + return ERR_BUF; + } + offset = options_idx; + offset_max = options_idx_max; + options = (u8_t*)q->payload; + /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */ + while((q != NULL) && (options[offset] != DHCP_OPTION_END) && (offset < offset_max)) { + u8_t op = options[offset]; + u8_t len; + u8_t decode_len = 0; + int decode_idx = -1; + u16_t val_offset = offset + 2; + /* len byte might be in the next pbuf */ + if (offset + 1 < q->len) { + len = options[offset + 1]; + } else { + len = (q->next != NULL ? ((u8_t*)q->next->payload)[0] : 0); + } + /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */ + decode_len = len; + switch(op) { + /* case(DHCP_OPTION_END): handled above */ + case(DHCP_OPTION_PAD): + /* special option: no len encoded */ + decode_len = len = 0; + /* will be increased below */ + offset--; + break; + case(DHCP_OPTION_SUBNET_MASK): + LWIP_ASSERT("len == 4", len == 4); + decode_idx = DHCP_OPTION_IDX_SUBNET_MASK; + break; + case(DHCP_OPTION_ROUTER): + decode_len = 4; /* only copy the first given router */ + LWIP_ASSERT("len >= decode_len", len >= decode_len); + decode_idx = DHCP_OPTION_IDX_ROUTER; + break; + case(DHCP_OPTION_DNS_SERVER): + /* special case: there might be more than one server */ + LWIP_ASSERT("len % 4 == 0", len % 4 == 0); + /* limit number of DNS servers */ + decode_len = LWIP_MIN(len, 4 * DNS_MAX_SERVERS); + LWIP_ASSERT("len >= decode_len", len >= decode_len); + decode_idx = DHCP_OPTION_IDX_DNS_SERVER; + break; + case(DHCP_OPTION_LEASE_TIME): + LWIP_ASSERT("len == 4", len == 4); + decode_idx = DHCP_OPTION_IDX_LEASE_TIME; + break; + case(DHCP_OPTION_OVERLOAD): + LWIP_ASSERT("len == 1", len == 1); + decode_idx = DHCP_OPTION_IDX_OVERLOAD; + break; + case(DHCP_OPTION_MESSAGE_TYPE): + LWIP_ASSERT("len == 1", len == 1); + decode_idx = DHCP_OPTION_IDX_MSG_TYPE; + break; + case(DHCP_OPTION_SERVER_ID): + LWIP_ASSERT("len == 4", len == 4); + decode_idx = DHCP_OPTION_IDX_SERVER_ID; + break; + case(DHCP_OPTION_T1): + LWIP_ASSERT("len == 4", len == 4); + decode_idx = DHCP_OPTION_IDX_T1; + break; + case(DHCP_OPTION_T2): + LWIP_ASSERT("len == 4", len == 4); + decode_idx = DHCP_OPTION_IDX_T2; + break; + default: + decode_len = 0; + LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", op)); + break; + } + offset += len + 2; + if (decode_len > 0) { + u32_t value = 0; + u16_t copy_len; +decode_next: + LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX); + LWIP_ASSERT("option already decoded", !dhcp_option_given(dhcp, decode_idx)); + copy_len = LWIP_MIN(decode_len, 4); + pbuf_copy_partial(q, &value, copy_len, val_offset); + if (decode_len > 4) { + /* decode more than one u32_t */ + LWIP_ASSERT("decode_len % 4 == 0", decode_len % 4 == 0); + dhcp_got_option(dhcp, decode_idx); + dhcp_set_option_value(dhcp, decode_idx, htonl(value)); + decode_len -= 4; + val_offset += 4; + decode_idx++; + goto decode_next; + } else if (decode_len == 4) { + value = ntohl(value); + } else { + LWIP_ASSERT("invalid decode_len", decode_len == 1); + value = ((u8_t*)&value)[0]; + } + dhcp_got_option(dhcp, decode_idx); + dhcp_set_option_value(dhcp, decode_idx, value); + } + if (offset >= q->len) { + offset -= q->len; + offset_max -= q->len; + if ((offset < offset_max) && offset_max) { //modify by ives at 2014.4.22 + q = q->next; + LWIP_ASSERT("next pbuf was null", q); + options = (u8_t*)q->payload; + } else { + /* We've run out of bytes, probably no end marker. Don't proceed. */ + break; + } + } + } + /* is this an overloaded message? */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) { + u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD); + dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD); + if (overload == DHCP_OVERLOAD_FILE) { + parse_file_as_options = 1; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n")); + } else if (overload == DHCP_OVERLOAD_SNAME) { + parse_sname_as_options = 1; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n")); + } else if (overload == DHCP_OVERLOAD_SNAME_FILE) { + parse_sname_as_options = 1; + parse_file_as_options = 1; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload)); + } +#if LWIP_DHCP_BOOTP_FILE + if (!parse_file_as_options) { + /* only do this for ACK messages */ + if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) && + (dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) == DHCP_ACK)) + /* copy bootp file name, don't care for sname (server hostname) */ + pbuf_copy_partial(p, dhcp->boot_file_name, DHCP_FILE_LEN-1, DHCP_FILE_OFS); + /* make sure the string is really NULL-terminated */ + dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0; + } +#endif /* LWIP_DHCP_BOOTP_FILE */ + } + if (parse_file_as_options) { + /* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */ + parse_file_as_options = 0; + options_idx = DHCP_FILE_OFS; + options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN; + goto again; + } else if (parse_sname_as_options) { + parse_sname_as_options = 0; + options_idx = DHCP_SNAME_OFS; + options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN; + goto again; + } + return ERR_OK; +} + +/** + * If an incoming DHCP message is in response to us, then trigger the state machine + */ +static void ICACHE_FLASH_ATTR +dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, ip_addr_t *addr, u16_t port) +{ + struct netif *netif = (struct netif *)arg; + struct dhcp *dhcp = netif->dhcp; + struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload; + u8_t msg_type; + u8_t i; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_recv(pbuf = %p) from DHCP server %"U16_F".%"U16_F".%"U16_F".%"U16_F" port %"U16_F"\n", (void*)p, + ip4_addr1_16(addr), ip4_addr2_16(addr), ip4_addr3_16(addr), ip4_addr4_16(addr), port)); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("pbuf->len = %"U16_F"\n", p->len)); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("pbuf->tot_len = %"U16_F"\n", p->tot_len)); + /* prevent warnings about unused arguments */ + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); + + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL); + + if (p->len < DHCP_MIN_REPLY_LEN) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n")); + goto free_pbuf_and_return; + } + + if (reply_msg->op != DHCP_BOOTREPLY) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op)); + goto free_pbuf_and_return; + } + /* iterate through hardware address and match against DHCP message */ + for (i = 0; i < netif->hwaddr_len; i++) { + if (netif->hwaddr[i] != reply_msg->chaddr[i]) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("netif->hwaddr[%"U16_F"]==%02"X16_F" != reply_msg->chaddr[%"U16_F"]==%02"X16_F"\n", + (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i])); + goto free_pbuf_and_return; + } + } + /* match transaction ID against what we expected */ + if (ntohl(reply_msg->xid) != dhcp->xid) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n",ntohl(reply_msg->xid),dhcp->xid)); + goto free_pbuf_and_return; + } + /* option fields could be unfold? */ + if (dhcp_parse_reply(dhcp, p) != ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("problem unfolding DHCP message - too short on memory?\n")); + goto free_pbuf_and_return; + } + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n")); + /* obtain pointer to DHCP message type */ + if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n")); + goto free_pbuf_and_return; + } + + /* read DHCP message type */ + msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE); + /* message type is DHCP ACK? */ + if (msg_type == DHCP_ACK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n")); + /* in requesting state? */ + if (dhcp->state == DHCP_REQUESTING) { + dhcp_handle_ack(netif); +#if DHCP_DOES_ARP_CHECK + /* check if the acknowledged lease address is already in use */ + dhcp_check(netif); +#else + /* bind interface to the acknowledged lease address */ + dhcp_bind(netif); +#endif + } + /* already bound to the given lease address? */ + else if ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING)) { + dhcp_handle_ack(netif); + dhcp_bind(netif); + } + } + /* received a DHCP_NAK in appropriate state? */ + else if ((msg_type == DHCP_NAK) && + ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REQUESTING) || + (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING ))) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n")); + dhcp_handle_nak(netif); + } + /* received a DHCP_OFFER in DHCP_SELECTING state? */ + else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_SELECTING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_SELECTING state\n")); + dhcp->request_timeout = 0; + /* remember offered lease */ + dhcp_handle_offer(netif); + } +free_pbuf_and_return: + dhcp->msg_in = NULL; + pbuf_free(p); +} + +/** + * Create a DHCP request, fill in common headers + * + * @param netif the netif under DHCP control + * @param dhcp dhcp control struct + * @param message_type message type of the request + */ +static err_t ICACHE_FLASH_ATTR +dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type) +{ + u16_t i; +#ifndef DHCP_GLOBAL_XID + /** default global transaction identifier starting value (easy to match + * with a packet analyser). We simply increment for each new request. + * Predefine DHCP_GLOBAL_XID to a better value or a function call to generate one + * at runtime, any supporting function prototypes can be defined in DHCP_GLOBAL_XID_HEADER */ + static u32_t xid = 0xABCD0000; +#else + static u32_t xid; + static u8_t xid_initialised = 0; + if (!xid_initialised) { + xid = DHCP_GLOBAL_XID; + xid_initialised = !xid_initialised; + } +#endif + LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return ERR_ARG;); + LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return ERR_VAL;); + LWIP_ASSERT("dhcp_create_msg: dhcp->p_out == NULL", dhcp->p_out == NULL); + LWIP_ASSERT("dhcp_create_msg: dhcp->msg_out == NULL", dhcp->msg_out == NULL); + dhcp->p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM); + if (dhcp->p_out == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_create_msg(): could not allocate pbuf\n")); + return ERR_MEM; + } + LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg", + (dhcp->p_out->len >= sizeof(struct dhcp_msg))); + + /* DHCP_REQUEST should reuse 'xid' from DHCPOFFER modify by ives at 2014.4.22*/ + if (message_type != DHCP_REQUEST) { + /* reuse transaction identifier in retransmissions */ + if (dhcp->tries == 0) { +#ifndef DHCP_GLOBAL_XID + xid++; +#else + xid = DHCP_GLOBAL_XID; +#endif + } + dhcp->xid = xid; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, + ("transaction id xid(%"X32_F")\n", xid)); + + dhcp->msg_out = (struct dhcp_msg *)dhcp->p_out->payload; + + dhcp->msg_out->op = DHCP_BOOTREQUEST; + /* TODO: make link layer independent */ + dhcp->msg_out->htype = DHCP_HTYPE_ETH; + dhcp->msg_out->hlen = netif->hwaddr_len; + dhcp->msg_out->hops = 0; + dhcp->msg_out->xid = htonl(dhcp->xid); + dhcp->msg_out->secs = 0; + /* we don't need the broadcast flag since we can receive unicast traffic + before being fully configured! */ + dhcp->msg_out->flags = 0; + ip_addr_set_zero(&dhcp->msg_out->ciaddr); + /* set ciaddr to netif->ip_addr based on message_type and state */ + if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || + ((message_type == DHCP_REQUEST) && /* DHCP_BOUND not used for sending! */ + ((dhcp->state==DHCP_RENEWING) || dhcp->state==DHCP_REBINDING))) { + ip_addr_copy(dhcp->msg_out->ciaddr, netif->ip_addr); + } + ip_addr_set_zero(&dhcp->msg_out->yiaddr); + ip_addr_set_zero(&dhcp->msg_out->siaddr); + ip_addr_set_zero(&dhcp->msg_out->giaddr); + for (i = 0; i < DHCP_CHADDR_LEN; i++) { + /* copy netif hardware address, pad with zeroes */ + dhcp->msg_out->chaddr[i] = (i < netif->hwaddr_len && i < NETIF_MAX_HWADDR_LEN) ? netif->hwaddr[i] : 0/* pad byte*/; + } + for (i = 0; i < DHCP_SNAME_LEN; i++) { + dhcp->msg_out->sname[i] = 0; + } + for (i = 0; i < DHCP_FILE_LEN; i++) { + dhcp->msg_out->file[i] = 0; + } + dhcp->msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE); + dhcp->options_out_len = 0; + /* fill options field with an incrementing array (for debugging purposes) */ + for (i = 0; i < DHCP_OPTIONS_LEN; i++) { + dhcp->msg_out->options[i] = (u8_t)i; /* for debugging only, no matter if truncated */ + } + /* Add option MESSAGE_TYPE */ + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, message_type); + return ERR_OK; +} + +/** + * Free previously allocated memory used to send a DHCP request. + * + * @param dhcp the dhcp struct to free the request from + */ +static void ICACHE_FLASH_ATTR +dhcp_delete_msg(struct dhcp *dhcp) +{ + LWIP_ERROR("dhcp_delete_msg: dhcp != NULL", (dhcp != NULL), return;); + LWIP_ASSERT("dhcp_delete_msg: dhcp->p_out != NULL", dhcp->p_out != NULL); + LWIP_ASSERT("dhcp_delete_msg: dhcp->msg_out != NULL", dhcp->msg_out != NULL); + if (dhcp->p_out != NULL) { + pbuf_free(dhcp->p_out); + } + dhcp->p_out = NULL; + dhcp->msg_out = NULL; +} + +/** + * Add a DHCP message trailer + * + * Adds the END option to the DHCP message, and if + * necessary, up to three padding bytes. + * + * @param dhcp DHCP state structure + */ +static void ICACHE_FLASH_ATTR +dhcp_option_trailer(struct dhcp *dhcp) +{ + LWIP_ERROR("dhcp_option_trailer: dhcp != NULL", (dhcp != NULL), return;); + LWIP_ASSERT("dhcp_option_trailer: dhcp->msg_out != NULL\n", dhcp->msg_out != NULL); + LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = DHCP_OPTION_END; + /* packet is too small, or not 4 byte aligned? */ + while (((dhcp->options_out_len < DHCP_MIN_OPTIONS_LEN) || (dhcp->options_out_len & 3)) && + (dhcp->options_out_len < DHCP_OPTIONS_LEN)) { + /* LWIP_DEBUGF(DHCP_DEBUG,("dhcp_option_trailer:dhcp->options_out_len=%"U16_F", DHCP_OPTIONS_LEN=%"U16_F, dhcp->options_out_len, DHCP_OPTIONS_LEN)); */ + LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); + /* add a fill/padding byte */ + dhcp->msg_out->options[dhcp->options_out_len++] = 0; + } +} + +#endif /* LWIP_DHCP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/dns.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/dns.c new file mode 100755 index 0000000..6c7a503 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/dns.c @@ -0,0 +1,992 @@ +/** + * @file + * DNS - host name to IP address resolver. + * + */ + +/** + + * This file implements a DNS host name to IP address resolver. + + * Port to lwIP from uIP + * by Jim Pettinato April 2007 + + * uIP version Copyright (c) 2002-2003, Adam Dunkels. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * DNS.C + * + * The lwIP DNS resolver functions are used to lookup a host name and + * map it to a numerical IP address. It maintains a list of resolved + * hostnames that can be queried with the dns_lookup() function. + * New hostnames can be resolved using the dns_query() function. + * + * The lwIP version of the resolver also adds a non-blocking version of + * gethostbyname() that will work with a raw API application. This function + * checks for an IP address string first and converts it if it is valid. + * gethostbyname() then does a dns_lookup() to see if the name is + * already in the table. If so, the IP is returned. If not, a query is + * issued and the function returns with a ERR_INPROGRESS status. The app + * using the dns client must then go into a waiting state. + * + * Once a hostname has been resolved (or found to be non-existent), + * the resolver code calls a specified callback function (which + * must be implemented by the module that uses the resolver). + */ + +/*----------------------------------------------------------------------------- + * RFC 1035 - Domain names - implementation and specification + * RFC 2181 - Clarifications to the DNS Specification + *----------------------------------------------------------------------------*/ + +/** @todo: define good default values (rfc compliance) */ +/** @todo: improve answer parsing, more checkings... */ +/** @todo: check RFC1035 - 7.3. Processing responses */ + +/*----------------------------------------------------------------------------- + * Includes + *----------------------------------------------------------------------------*/ + +#include "lwip/opt.h" + +#if LWIP_DNS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/udp.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/dns.h" + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/** DNS server IP address */ +#ifndef DNS_SERVER_ADDRESS +#define DNS_SERVER_ADDRESS(ipaddr) (ip4_addr_set_u32(ipaddr, 0xDEDE43D0)) /* resolver1.opendns.com(208.67.222.222) */ +#endif + +/** DNS server port address */ +#ifndef DNS_SERVER_PORT +#define DNS_SERVER_PORT 53 +#endif + +/** DNS maximum number of retries when asking for a name, before "timeout". */ +#ifndef DNS_MAX_RETRIES +#define DNS_MAX_RETRIES 4 +#endif + +/** DNS resource record max. TTL (one week as default) */ +#ifndef DNS_MAX_TTL +#define DNS_MAX_TTL 604800 +#endif + +/* DNS protocol flags */ +#define DNS_FLAG1_RESPONSE 0x80 +#define DNS_FLAG1_OPCODE_STATUS 0x10 +#define DNS_FLAG1_OPCODE_INVERSE 0x08 +#define DNS_FLAG1_OPCODE_STANDARD 0x00 +#define DNS_FLAG1_AUTHORATIVE 0x04 +#define DNS_FLAG1_TRUNC 0x02 +#define DNS_FLAG1_RD 0x01 +#define DNS_FLAG2_RA 0x80 +#define DNS_FLAG2_ERR_MASK 0x0f +#define DNS_FLAG2_ERR_NONE 0x00 +#define DNS_FLAG2_ERR_NAME 0x03 + +/* DNS protocol states */ +#define DNS_STATE_UNUSED 0 +#define DNS_STATE_NEW 1 +#define DNS_STATE_ASKING 2 +#define DNS_STATE_DONE 3 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** DNS message header */ +struct dns_hdr { + PACK_STRUCT_FIELD(u16_t id); + PACK_STRUCT_FIELD(u8_t flags1); + PACK_STRUCT_FIELD(u8_t flags2); + PACK_STRUCT_FIELD(u16_t numquestions); + PACK_STRUCT_FIELD(u16_t numanswers); + PACK_STRUCT_FIELD(u16_t numauthrr); + PACK_STRUCT_FIELD(u16_t numextrarr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif +#define SIZEOF_DNS_HDR 12 + +/** DNS query message structure. + No packing needed: only used locally on the stack. */ +struct dns_query { + /* DNS query record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */ + u16_t type; + u16_t cls; +}; +#define SIZEOF_DNS_QUERY 4 + +/** DNS answer message structure. + No packing needed: only used locally on the stack. */ +struct dns_answer { + /* DNS answer record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */ + u16_t type; + u16_t cls; + u32_t ttl; + u16_t len; +}; +#define SIZEOF_DNS_ANSWER 10 + +/** DNS table entry */ +struct dns_table_entry { + u8_t state; + u8_t numdns; + u8_t tmr; + u8_t retries; + u8_t seqno; + u8_t err; + u32_t ttl; + char name[DNS_MAX_NAME_LENGTH]; + ip_addr_t ipaddr; + /* pointer to callback on DNS query done */ + dns_found_callback found; + void *arg; +}; + +#if DNS_LOCAL_HOSTLIST + +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC +/** Local host-list. For hostnames in this list, no + * external name resolution is performed */ +static struct local_hostlist_entry *local_hostlist_dynamic; +#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/** Defining this allows the local_hostlist_static to be placed in a different + * linker section (e.g. FLASH) */ +#ifndef DNS_LOCAL_HOSTLIST_STORAGE_PRE +#define DNS_LOCAL_HOSTLIST_STORAGE_PRE static +#endif /* DNS_LOCAL_HOSTLIST_STORAGE_PRE */ +/** Defining this allows the local_hostlist_static to be placed in a different + * linker section (e.g. FLASH) */ +#ifndef DNS_LOCAL_HOSTLIST_STORAGE_POST +#define DNS_LOCAL_HOSTLIST_STORAGE_POST +#endif /* DNS_LOCAL_HOSTLIST_STORAGE_POST */ +DNS_LOCAL_HOSTLIST_STORAGE_PRE struct local_hostlist_entry local_hostlist_static[] + DNS_LOCAL_HOSTLIST_STORAGE_POST = DNS_LOCAL_HOSTLIST_INIT; + +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +static void dns_init_local(); +#endif /* DNS_LOCAL_HOSTLIST */ + + +/* forward declarations */ +static void dns_recv(void *s, struct udp_pcb *pcb, struct pbuf *p, ip_addr_t *addr, u16_t port); +static void dns_check_entries(void); + +/*----------------------------------------------------------------------------- + * Globales + *----------------------------------------------------------------------------*/ + +/* DNS variables */ +static struct udp_pcb *dns_pcb; +static u8_t dns_seqno; +static struct dns_table_entry dns_table[DNS_TABLE_SIZE]; +static ip_addr_t dns_servers[DNS_MAX_SERVERS]; +/** Contiguous buffer for processing responses */ +//static u8_t dns_payload_buffer[LWIP_MEM_ALIGN_BUFFER(DNS_MSG_SIZE)]; +static u8_t* dns_payload; +static u16_t dns_random; +/** + * Initialize the resolver: set up the UDP pcb and configure the default server + * (DNS_SERVER_ADDRESS). + */ +void ICACHE_FLASH_ATTR +dns_init() +{ + ip_addr_t dnsserver; + +// dns_payload = (u8_t *)LWIP_MEM_ALIGN(dns_payload_buffer); + + /* initialize default DNS server address */ + DNS_SERVER_ADDRESS(&dnsserver); + + LWIP_DEBUGF(DNS_DEBUG, ("dns_init: initializing\n")); + + /* if dns client not yet initialized... */ + if (dns_pcb == NULL) { + dns_pcb = udp_new(); + + if (dns_pcb != NULL) { + /* initialize DNS table not needed (initialized to zero since it is a + * global variable) */ + LWIP_ASSERT("For implicit initialization to work, DNS_STATE_UNUSED needs to be 0", + DNS_STATE_UNUSED == 0); + + /* initialize DNS client */ + udp_bind(dns_pcb, IP_ADDR_ANY, 0); + udp_recv(dns_pcb, dns_recv, NULL); + + /* initialize default DNS primary server */ + dns_setserver(0, &dnsserver); + } + } +#if DNS_LOCAL_HOSTLIST + dns_init_local(); +#endif +} + +/** + * Initialize one of the DNS servers. + * + * @param numdns the index of the DNS server to set must be < DNS_MAX_SERVERS + * @param dnsserver IP address of the DNS server to set + */ +void ICACHE_FLASH_ATTR +dns_setserver(u8_t numdns, ip_addr_t *dnsserver) +{ + if ((numdns < DNS_MAX_SERVERS) && (dns_pcb != NULL) && + (dnsserver != NULL) && !ip_addr_isany(dnsserver)) { + dns_servers[numdns] = (*dnsserver); + } +} + +/** + * Obtain one of the currently configured DNS server. + * + * @param numdns the index of the DNS server + * @return IP address of the indexed DNS server or "ip_addr_any" if the DNS + * server has not been configured. + */ +ip_addr_t ICACHE_FLASH_ATTR +dns_getserver(u8_t numdns) +{ + if (numdns < DNS_MAX_SERVERS) { + return dns_servers[numdns]; + } else { + return *IP_ADDR_ANY; + } +} + +/** + * The DNS resolver client timer - handle retries and timeouts and should + * be called every DNS_TMR_INTERVAL milliseconds (every second by default). + */ +void ICACHE_FLASH_ATTR +dns_tmr(void) +{ + if (dns_pcb != NULL) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_tmr: dns_check_entries\n")); + dns_check_entries(); + } +} + +#if DNS_LOCAL_HOSTLIST +static void ICACHE_FLASH_ATTR +dns_init_local() +{ +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT) + int i; + struct local_hostlist_entry *entry; + /* Dynamic: copy entries from DNS_LOCAL_HOSTLIST_INIT to list */ + struct local_hostlist_entry local_hostlist_init[] = DNS_LOCAL_HOSTLIST_INIT; + size_t namelen; + for (i = 0; i < sizeof(local_hostlist_init) / sizeof(struct local_hostlist_entry); i++) { + struct local_hostlist_entry *init_entry = &local_hostlist_init[i]; + LWIP_ASSERT("invalid host name (NULL)", init_entry->name != NULL); + namelen = os_strlen(init_entry->name); + LWIP_ASSERT("namelen <= DNS_LOCAL_HOSTLIST_MAX_NAMELEN", namelen <= DNS_LOCAL_HOSTLIST_MAX_NAMELEN); + entry = (struct local_hostlist_entry *)memp_malloc(MEMP_LOCALHOSTLIST); + LWIP_ASSERT("mem-error in dns_init_local", entry != NULL); + if (entry != NULL) { + entry->name = (char*)entry + sizeof(struct local_hostlist_entry); + MEMCPY((char*)entry->name, init_entry->name, namelen); + ((char*)entry->name)[namelen] = 0; + entry->addr = init_entry->addr; + entry->next = local_hostlist_dynamic; + local_hostlist_dynamic = entry; + } + } +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT) */ +} + +/** + * Scans the local host-list for a hostname. + * + * @param hostname Hostname to look for in the local host-list + * @return The first IP address for the hostname in the local host-list or + * IPADDR_NONE if not found. + */ +static u32_t ICACHE_FLASH_ATTR +dns_lookup_local(const char *hostname) +{ +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC + struct local_hostlist_entry *entry = local_hostlist_dynamic; + while(entry != NULL) { + if(strcmp(entry->name, hostname) == 0) { + return ip4_addr_get_u32(&entry->addr); + } + entry = entry->next; + } +#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + int i; + for (i = 0; i < sizeof(local_hostlist_static) / sizeof(struct local_hostlist_entry); i++) { + if(strcmp(local_hostlist_static[i].name, hostname) == 0) { + return ip4_addr_get_u32(&local_hostlist_static[i].addr); + } + } +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + return IPADDR_NONE; +} + +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC +/** Remove all entries from the local host-list for a specific hostname + * and/or IP addess + * + * @param hostname hostname for which entries shall be removed from the local + * host-list + * @param addr address for which entries shall be removed from the local host-list + * @return the number of removed entries + */ +int ICACHE_FLASH_ATTR +dns_local_removehost(const char *hostname, const ip_addr_t *addr) +{ + int removed = 0; + struct local_hostlist_entry *entry = local_hostlist_dynamic; + struct local_hostlist_entry *last_entry = NULL; + while (entry != NULL) { + if (((hostname == NULL) || !strcmp(entry->name, hostname)) && + ((addr == NULL) || ip_addr_cmp(&entry->addr, addr))) { + struct local_hostlist_entry *free_entry; + if (last_entry != NULL) { + last_entry->next = entry->next; + } else { + local_hostlist_dynamic = entry->next; + } + free_entry = entry; + entry = entry->next; + memp_free(MEMP_LOCALHOSTLIST, free_entry); + removed++; + } else { + last_entry = entry; + entry = entry->next; + } + } + return removed; +} + +/** + * Add a hostname/IP address pair to the local host-list. + * Duplicates are not checked. + * + * @param hostname hostname of the new entry + * @param addr IP address of the new entry + * @return ERR_OK if succeeded or ERR_MEM on memory error + */ +err_t ICACHE_FLASH_ATTR +dns_local_addhost(const char *hostname, const ip_addr_t *addr) +{ + struct local_hostlist_entry *entry; + size_t namelen; + LWIP_ASSERT("invalid host name (NULL)", hostname != NULL); + namelen = os_strlen(hostname); + LWIP_ASSERT("namelen <= DNS_LOCAL_HOSTLIST_MAX_NAMELEN", namelen <= DNS_LOCAL_HOSTLIST_MAX_NAMELEN); + entry = (struct local_hostlist_entry *)memp_malloc(MEMP_LOCALHOSTLIST); + if (entry == NULL) { + return ERR_MEM; + } + entry->name = (char*)entry + sizeof(struct local_hostlist_entry); + MEMCPY((char*)entry->name, hostname, namelen); + ((char*)entry->name)[namelen] = 0; + ip_addr_copy(entry->addr, *addr); + entry->next = local_hostlist_dynamic; + local_hostlist_dynamic = entry; + return ERR_OK; +} +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC*/ +#endif /* DNS_LOCAL_HOSTLIST */ + +/** + * Look up a hostname in the array of known hostnames. + * + * @note This function only looks in the internal array of known + * hostnames, it does not send out a query for the hostname if none + * was found. The function dns_enqueue() can be used to send a query + * for a hostname. + * + * @param name the hostname to look up + * @return the hostname's IP address, as u32_t (instead of ip_addr_t to + * better check for failure: != IPADDR_NONE) or IPADDR_NONE if the hostname + * was not found in the cached dns_table. + */ +static u32_t ICACHE_FLASH_ATTR +dns_lookup(const char *name) +{ + u8_t i; +#if DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN) + u32_t addr; +#endif /* DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN) */ +#if DNS_LOCAL_HOSTLIST + if ((addr = dns_lookup_local(name)) != IPADDR_NONE) { + return addr; + } +#endif /* DNS_LOCAL_HOSTLIST */ +#ifdef DNS_LOOKUP_LOCAL_EXTERN + if((addr = DNS_LOOKUP_LOCAL_EXTERN(name)) != IPADDR_NONE) { + return addr; + } +#endif /* DNS_LOOKUP_LOCAL_EXTERN */ + + /* Walk through name list, return entry if found. If not, return NULL. */ + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + if ((dns_table[i].state == DNS_STATE_DONE) && + (strcmp(name, dns_table[i].name) == 0)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_lookup: \"%s\": found = ", name)); + ip_addr_debug_print(DNS_DEBUG, &(dns_table[i].ipaddr)); + LWIP_DEBUGF(DNS_DEBUG, ("\n")); + return ip4_addr_get_u32(&dns_table[i].ipaddr); + } + } + + return IPADDR_NONE; +} + +#if DNS_DOES_NAME_CHECK +/** + * Compare the "dotted" name "query" with the encoded name "response" + * to make sure an answer from the DNS server matches the current dns_table + * entry (otherwise, answers might arrive late for hostname not on the list + * any more). + * + * @param query hostname (not encoded) from the dns_table + * @param response encoded hostname in the DNS response + * @return 0: names equal; 1: names differ + */ +static u8_t ICACHE_FLASH_ATTR +dns_compare_name(unsigned char *query, unsigned char *response) +{ + unsigned char n; + + do { + n = *response++; + /** @see RFC 1035 - 4.1.4. Message compression */ + if ((n & 0xc0) == 0xc0) { + /* Compressed name */ + break; + } else { + /* Not compressed name */ + while (n > 0) { + if ((*query) != (*response)) { + return 1; + } + ++response; + ++query; + --n; + }; + ++query; + } + } while (*response != 0); + + return 0; +} +#endif /* DNS_DOES_NAME_CHECK */ + +/** + * Walk through a compact encoded DNS name and return the end of the name. + * + * @param query encoded DNS name in the DNS server response + * @return end of the name + */ +static unsigned char * ICACHE_FLASH_ATTR +dns_parse_name(unsigned char *query) +{ + unsigned char n; + + do { + n = *query++; + /** @see RFC 1035 - 4.1.4. Message compression */ + if ((n & 0xc0) == 0xc0) { + /* Compressed name */ + break; + } else { + /* Not compressed name */ + while (n > 0) { + ++query; + --n; + }; + } + } while (*query != 0); + + return query + 1; +} + +/** + * Send a DNS query packet. + * + * @param numdns index of the DNS server in the dns_servers table + * @param name hostname to query + * @param id index of the hostname in dns_table, used as transaction ID in the + * DNS query packet + * @return ERR_OK if packet is sent; an err_t indicating the problem otherwise + */ +static err_t ICACHE_FLASH_ATTR +dns_send(u8_t numdns, const char* name, u8_t id) +{ + err_t err; + struct dns_hdr *hdr; + struct dns_query qry; + struct pbuf *p; + char *query, *nptr; + const char *pHostname; + u8_t n; + dns_random = os_random()>>16; + LWIP_DEBUGF(DNS_DEBUG, ("dns_send: dns_servers[%"U16_F"] \"%s\": request\n", + (u16_t)(numdns), name)); + LWIP_ASSERT("dns server out of array", numdns < DNS_MAX_SERVERS); + LWIP_ASSERT("dns server has no IP address set", !ip_addr_isany(&dns_servers[numdns])); + + /* if here, we have either a new query or a retry on a previous query to process */ + p = pbuf_alloc(PBUF_TRANSPORT, SIZEOF_DNS_HDR + DNS_MAX_NAME_LENGTH + + SIZEOF_DNS_QUERY, PBUF_RAM); + if (p != NULL) { + LWIP_ASSERT("pbuf must be in one piece", p->next == NULL); + /* fill dns header */ + hdr = (struct dns_hdr*)p->payload; + os_memset(hdr, 0, SIZEOF_DNS_HDR); + hdr->id = htons(id + dns_random); + hdr->flags1 = DNS_FLAG1_RD; + hdr->numquestions = PP_HTONS(1); + query = (char*)hdr + SIZEOF_DNS_HDR; + pHostname = name; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for(n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while(*pHostname != 0); + *query++='\0'; + + /* fill dns query */ + qry.type = PP_HTONS(DNS_RRTYPE_A); + qry.cls = PP_HTONS(DNS_RRCLASS_IN); + SMEMCPY(query, &qry, SIZEOF_DNS_QUERY); + + /* resize pbuf to the exact dns query */ + pbuf_realloc(p, (u16_t)((query + SIZEOF_DNS_QUERY) - ((char*)(p->payload)))); + + /* connect to the server for faster receiving */ + udp_connect(dns_pcb, &dns_servers[numdns], DNS_SERVER_PORT); + /* send dns packet */ + err = udp_sendto(dns_pcb, p, &dns_servers[numdns], DNS_SERVER_PORT); + + /* free pbuf */ + pbuf_free(p); + } else { + err = ERR_MEM; + } + + return err; +} + +/** + * dns_check_entry() - see if pEntry has not yet been queried and, if so, sends out a query. + * Check an entry in the dns_table: + * - send out query for new entries + * - retry old pending entries on timeout (also with different servers) + * - remove completed entries from the table if their TTL has expired + * + * @param i index of the dns_table entry to check + */ +static void ICACHE_FLASH_ATTR +dns_check_entry(u8_t i) +{ + err_t err; + struct dns_table_entry *pEntry = &dns_table[i]; + + LWIP_ASSERT("array index out of bounds", i < DNS_TABLE_SIZE); + + switch(pEntry->state) { + + case DNS_STATE_NEW: { + /* initialize new entry */ + pEntry->state = DNS_STATE_ASKING; + pEntry->numdns = 0; + pEntry->tmr = 1; + pEntry->retries = 0; + + /* send DNS packet for this entry */ + err = dns_send(pEntry->numdns, pEntry->name, i); + if (err != ERR_OK) { + LWIP_DEBUGF(DNS_DEBUG | LWIP_DBG_LEVEL_WARNING, + ("dns_send returned error: %s\n", lwip_strerr(err))); + } + break; + } + + case DNS_STATE_ASKING: { + if (--pEntry->tmr == 0) { + if (++pEntry->retries == DNS_MAX_RETRIES) { + if ((pEntry->numdns+1numdns+1])) { + /* change of server */ + pEntry->numdns++; + pEntry->tmr = 1; + pEntry->retries = 0; + break; + } else { + LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": timeout\n", pEntry->name)); + /* call specified callback function if provided */ + if (pEntry->found) + (*pEntry->found)(pEntry->name, NULL, pEntry->arg); + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + break; + } + } + + /* wait longer for the next retry */ + pEntry->tmr = pEntry->retries; + + /* send DNS packet for this entry */ + err = dns_send(pEntry->numdns, pEntry->name, i); + if (err != ERR_OK) { + LWIP_DEBUGF(DNS_DEBUG | LWIP_DBG_LEVEL_WARNING, + ("dns_send returned error: %s\n", lwip_strerr(err))); + } + } + break; + } + + case DNS_STATE_DONE: { + /* if the time to live is nul */ + if ((pEntry->ttl == 0) || (--pEntry->ttl == 0)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": flush\n", pEntry->name)); + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + } + break; + } + case DNS_STATE_UNUSED: + /* nothing to do */ + break; + default: + LWIP_ASSERT("unknown dns_table entry state:", 0); + break; + } +} + +/** + * Call dns_check_entry for each entry in dns_table - check all entries. + */ +static void ICACHE_FLASH_ATTR +dns_check_entries(void) +{ + u8_t i; + + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + dns_check_entry(i); + } +} + +/** + * Receive input function for DNS response packets arriving for the dns UDP pcb. + * + * @params see udp.h + */ +static void ICACHE_FLASH_ATTR +dns_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, ip_addr_t *addr, u16_t port) +{ + u16_t i; + char *pHostname; + struct dns_hdr *hdr; + struct dns_answer ans; + struct dns_table_entry *pEntry; + u16_t nquestions, nanswers; + + u8_t* dns_payload_buffer = (u8_t* )os_zalloc(LWIP_MEM_ALIGN_BUFFER(DNS_MSG_SIZE)); + dns_payload = (u8_t *)LWIP_MEM_ALIGN(dns_payload_buffer); + + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); + + /* is the dns message too big ? */ + if (p->tot_len > DNS_MSG_SIZE) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too big\n")); + /* free pbuf and return */ + goto memerr; + } + + /* is the dns message big enough ? */ + if (p->tot_len < (SIZEOF_DNS_HDR + SIZEOF_DNS_QUERY + SIZEOF_DNS_ANSWER)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too small\n")); + /* free pbuf and return */ + goto memerr; + } + + /* copy dns payload inside static buffer for processing */ + if (pbuf_copy_partial(p, dns_payload, p->tot_len, 0) == p->tot_len) { + /* The ID in the DNS header should be our entry into the name table. */ + hdr = (struct dns_hdr*)dns_payload; + i = htons(hdr->id); + i = i - dns_random; + if (i < DNS_TABLE_SIZE) { + pEntry = &dns_table[i]; + if(pEntry->state == DNS_STATE_ASKING) { + pEntry->err = hdr->flags2 & DNS_FLAG2_ERR_MASK; + + /* We only care about the question(s) and the answers. The authrr + and the extrarr are simply discarded. */ + nquestions = htons(hdr->numquestions); + nanswers = htons(hdr->numanswers); + + /* Check for error. If so, call callback to inform. */ + if (((hdr->flags1 & DNS_FLAG1_RESPONSE) == 0) || (pEntry->err != 0) || (nquestions != 1)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in flags\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + //goto responseerr; + goto memerr; + } + /* This entry is now completed. */ + pEntry->state = DNS_STATE_DONE; + +#if DNS_DOES_NAME_CHECK + /* Check if the name in the "question" part match with the name in the entry. */ + if (dns_compare_name((unsigned char *)(pEntry->name), (unsigned char *)dns_payload + SIZEOF_DNS_HDR) != 0) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response not match to query\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } +#endif /* DNS_DOES_NAME_CHECK */ + + /* Skip the name in the "question" part */ + pHostname = (char *) dns_parse_name((unsigned char *)dns_payload + SIZEOF_DNS_HDR) + SIZEOF_DNS_QUERY; + + while (nanswers > 0) { + /* skip answer resource record's host name */ + pHostname = (char *) dns_parse_name((unsigned char *)pHostname); + + /* Check for IP address type and Internet class. Others are discarded. */ + SMEMCPY(&ans, pHostname, SIZEOF_DNS_ANSWER); + if((ans.type == PP_HTONS(DNS_RRTYPE_A)) && (ans.cls == PP_HTONS(DNS_RRCLASS_IN)) && + (ans.len == PP_HTONS(sizeof(ip_addr_t))) ) { + /* read the answer resource record's TTL, and maximize it if needed */ + pEntry->ttl = ntohl(ans.ttl); + if (pEntry->ttl > DNS_MAX_TTL) { + pEntry->ttl = DNS_MAX_TTL; + } + /* read the IP address after answer resource record's header */ + SMEMCPY(&(pEntry->ipaddr), (pHostname+SIZEOF_DNS_ANSWER), sizeof(ip_addr_t)); + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response = ", pEntry->name)); + ip_addr_debug_print(DNS_DEBUG, (&(pEntry->ipaddr))); + LWIP_DEBUGF(DNS_DEBUG, ("\n")); + /* call specified callback function if provided */ + if (pEntry->found) { + (*pEntry->found)(pEntry->name, &pEntry->ipaddr, pEntry->arg); + } + if (pEntry->ttl == 0) { + /* RFC 883, page 29: "Zero values are + interpreted to mean that the RR can only be used for the + transaction in progress, and should not be cached." + -> flush this entry now */ + goto flushentry; + } + /* deallocate memory and return */ + goto memerr; + } else { + pHostname = pHostname + SIZEOF_DNS_ANSWER + htons(ans.len); + } + --nanswers; + } + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in response\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } + } + } + + /* deallocate memory and return */ + goto memerr; + +responseerr: + /* ERROR: call specified callback function with NULL as name to indicate an error */ + if (pEntry->found) { + (*pEntry->found)(pEntry->name, NULL, pEntry->arg); + } +flushentry: + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + +memerr: + /* free pbuf */ + pbuf_free(p); + os_free(dns_payload_buffer); + return; +} + +/** + * Queues a new hostname to resolve and sends out a DNS query for that hostname + * + * @param name the hostname that is to be queried + * @param found a callback founction to be called on success, failure or timeout + * @param callback_arg argument to pass to the callback function + * @return @return a err_t return code. + */ +static err_t ICACHE_FLASH_ATTR +dns_enqueue(const char *name, dns_found_callback found, void *callback_arg) +{ + u8_t i; + u8_t lseq, lseqi; + struct dns_table_entry *pEntry = NULL; + size_t namelen; + + /* search an unused entry, or the oldest one */ + lseq = 0; + lseqi = DNS_TABLE_SIZE; + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + pEntry = &dns_table[i]; + /* is it an unused entry ? */ + if (pEntry->state == DNS_STATE_UNUSED) + break; + + /* check if this is the oldest completed entry */ + if (pEntry->state == DNS_STATE_DONE) { + u8_t age = (u8_t)(dns_seqno - pEntry->seqno); + if (age > lseq) { + lseq = age; + lseqi = i; + } + } + } + + /* if we don't have found an unused entry, use the oldest completed one */ + if (i == DNS_TABLE_SIZE) { + if ((lseqi >= DNS_TABLE_SIZE) || (dns_table[lseqi].state != DNS_STATE_DONE)) { + /* no entry can't be used now, table is full */ + LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": DNS entries table is full\n", name)); + return ERR_MEM; + } else { + /* use the oldest completed one */ + i = lseqi; + pEntry = &dns_table[i]; + } + } + + /* use this entry */ + LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": use DNS entry %"U16_F"\n", name, (u16_t)(i))); + + /* fill the entry */ + pEntry->state = DNS_STATE_NEW; + pEntry->seqno = dns_seqno; + pEntry->found = found; + pEntry->arg = callback_arg; + namelen = LWIP_MIN(os_strlen(name), DNS_MAX_NAME_LENGTH-1); + MEMCPY(pEntry->name, name, namelen); + pEntry->name[namelen] = 0; + + dns_seqno++; + + /* force to send query without waiting timer */ + dns_check_entry(i); + + /* dns query is enqueued */ + return ERR_INPROGRESS; +} + +/** + * Resolve a hostname (string) into an IP address. + * NON-BLOCKING callback version for use with raw API!!! + * + * Returns immediately with one of err_t return codes: + * - ERR_OK if hostname is a valid IP address string or the host + * name is already in the local names table. + * - ERR_INPROGRESS enqueue a request to be sent to the DNS server + * for resolution if no errors are present. + * - ERR_ARG: dns client not initialized or invalid hostname + * + * @param hostname the hostname that is to be queried + * @param addr pointer to a ip_addr_t where to store the address if it is already + * cached in the dns_table (only valid if ERR_OK is returned!) + * @param found a callback function to be called on success, failure or timeout (only if + * ERR_INPROGRESS is returned!) + * @param callback_arg argument to pass to the callback function + * @return a err_t return code. + */ +err_t ICACHE_FLASH_ATTR +dns_gethostbyname(const char *hostname, ip_addr_t *addr, dns_found_callback found, + void *callback_arg) +{ + u32_t ipaddr; + /* not initialized or no valid server yet, or invalid addr pointer + * or invalid hostname or invalid hostname length */ + if ((dns_pcb == NULL) || (addr == NULL) || + (!hostname) || (!hostname[0]) || + (os_strlen(hostname) >= DNS_MAX_NAME_LENGTH)) { + return ERR_ARG; + } + +#if LWIP_HAVE_LOOPIF + if (strcmp(hostname, "localhost")==0) { + ip_addr_set_loopback(addr); + return ERR_OK; + } +#endif /* LWIP_HAVE_LOOPIF */ + + /* host name already in octet notation? set ip addr and return ERR_OK */ + ipaddr = ipaddr_addr(hostname); + if (ipaddr == IPADDR_NONE) { + /* already have this address cached? */ +// ipaddr = dns_lookup(hostname); + } + if (ipaddr != IPADDR_NONE) { + ip4_addr_set_u32(addr, ipaddr); + return ERR_OK; + } + + /* queue query with specified callback */ + return dns_enqueue(hostname, found, callback_arg); +} + +#endif /* LWIP_DNS */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/init.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/init.c new file mode 100755 index 0000000..aa403f4 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/init.c @@ -0,0 +1,325 @@ +/** + * @file + * Modules initialization + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/init.h" +#include "lwip/stats.h" +#include "lwip/sys.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/sockets.h" +#include "lwip/ip.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp_impl.h" +#include "lwip/snmp_msg.h" +#include "lwip/autoip.h" +#include "lwip/igmp.h" +#include "lwip/dns.h" +#include "lwip/timers.h" +#include "netif/etharp.h" + +/* Compile-time sanity checks for configuration errors. + * These can be done independently of LWIP_DEBUG, without penalty. + */ +#ifndef BYTE_ORDER + #error "BYTE_ORDER is not defined, you have to define it in your cc.h" +#endif +#if (!IP_SOF_BROADCAST && IP_SOF_BROADCAST_RECV) + #error "If you want to use broadcast filter per pcb on recv operations, you have to define IP_SOF_BROADCAST=1 in your lwipopts.h" +#endif +#if (!LWIP_ARP && ARP_QUEUEING) + #error "If you want to use ARP Queueing, you have to define LWIP_ARP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_UDPLITE) + #error "If you want to use UDP Lite, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_SNMP) + #error "If you want to use SNMP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_DHCP) + #error "If you want to use DHCP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_IGMP) + #error "If you want to use IGMP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_SNMP) + #error "If you want to use SNMP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_DNS) + #error "If you want to use DNS, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (LWIP_ARP && ARP_QUEUEING && (MEMP_NUM_ARP_QUEUE<=0)) + #error "If you want to use ARP Queueing, you have to define MEMP_NUM_ARP_QUEUE>=1 in your lwipopts.h" +#endif +#if (LWIP_RAW && (MEMP_NUM_RAW_PCB<=0)) + #error "If you want to use RAW, you have to define MEMP_NUM_RAW_PCB>=1 in your lwipopts.h" +#endif +#if (LWIP_UDP && (MEMP_NUM_UDP_PCB<=0)) + #error "If you want to use UDP, you have to define MEMP_NUM_UDP_PCB>=1 in your lwipopts.h" +#endif +//#if (LWIP_TCP && (MEMP_NUM_TCP_PCB<=0)) +// #error "If you want to use TCP, you have to define MEMP_NUM_TCP_PCB>=1 in your lwipopts.h" +//#endif +//#if (LWIP_TCP && (TCP_WND > 0xffff)) +// #error "If you want to use TCP, TCP_WND must fit in an u16_t, so, you have to reduce it in your lwipopts.h" +//#endif +#if (LWIP_TCP && (TCP_SND_QUEUELEN > 0xffff)) + #error "If you want to use TCP, TCP_SND_QUEUELEN must fit in an u16_t, so, you have to reduce it in your lwipopts.h" +#endif +#if (LWIP_TCP && (TCP_SND_QUEUELEN < 2)) + #error "TCP_SND_QUEUELEN must be at least 2 for no-copy TCP writes to work" +#endif +//#if (LWIP_TCP && ((TCP_MAXRTX > 12) || (TCP_SYNMAXRTX > 12))) +// #error "If you want to use TCP, TCP_MAXRTX and TCP_SYNMAXRTX must less or equal to 12 (due to tcp_backoff table), so, you have to reduce them in your lwipopts.h" +//#endif +#if (LWIP_TCP && TCP_LISTEN_BACKLOG && (TCP_DEFAULT_LISTEN_BACKLOG < 0) || (TCP_DEFAULT_LISTEN_BACKLOG > 0xff)) + #error "If you want to use TCP backlog, TCP_DEFAULT_LISTEN_BACKLOG must fit into an u8_t" +#endif +#if (LWIP_IGMP && (MEMP_NUM_IGMP_GROUP<=1)) + #error "If you want to use IGMP, you have to define MEMP_NUM_IGMP_GROUP>1 in your lwipopts.h" +#endif +#if (LWIP_NETIF_API && (NO_SYS==1)) + #error "If you want to use NETIF API, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if ((LWIP_SOCKET || LWIP_NETCONN) && (NO_SYS==1)) + #error "If you want to use Sequential API, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if ((LWIP_NETCONN || LWIP_SOCKET) && (MEMP_NUM_TCPIP_MSG_API<=0)) + #error "If you want to use Sequential API, you have to define MEMP_NUM_TCPIP_MSG_API>=1 in your lwipopts.h" +#endif +#if (!LWIP_NETCONN && LWIP_SOCKET) + #error "If you want to use Socket API, you have to define LWIP_NETCONN=1 in your lwipopts.h" +#endif +#if (((!LWIP_DHCP) || (!LWIP_AUTOIP)) && LWIP_DHCP_AUTOIP_COOP) + #error "If you want to use DHCP/AUTOIP cooperation mode, you have to define LWIP_DHCP=1 and LWIP_AUTOIP=1 in your lwipopts.h" +#endif +#if (((!LWIP_DHCP) || (!LWIP_ARP)) && DHCP_DOES_ARP_CHECK) + #error "If you want to use DHCP ARP checking, you have to define LWIP_DHCP=1 and LWIP_ARP=1 in your lwipopts.h" +#endif +#if (!LWIP_ARP && LWIP_AUTOIP) + #error "If you want to use AUTOIP, you have to define LWIP_ARP=1 in your lwipopts.h" +#endif +#if (LWIP_SNMP && (SNMP_CONCURRENT_REQUESTS<=0)) + #error "If you want to use SNMP, you have to define SNMP_CONCURRENT_REQUESTS>=1 in your lwipopts.h" +#endif +#if (LWIP_SNMP && (SNMP_TRAP_DESTINATIONS<=0)) + #error "If you want to use SNMP, you have to define SNMP_TRAP_DESTINATIONS>=1 in your lwipopts.h" +#endif +#if (LWIP_TCP && ((LWIP_EVENT_API && LWIP_CALLBACK_API) || (!LWIP_EVENT_API && !LWIP_CALLBACK_API))) + #error "One and exactly one of LWIP_EVENT_API and LWIP_CALLBACK_API has to be enabled in your lwipopts.h" +#endif +/* There must be sufficient timeouts, taking into account requirements of the subsystems. */ +#if LWIP_TIMERS && (MEMP_NUM_SYS_TIMEOUT < (LWIP_TCP + IP_REASSEMBLY + LWIP_ARP + (2*LWIP_DHCP) + LWIP_AUTOIP + LWIP_IGMP + LWIP_DNS + PPP_SUPPORT)) + #error "MEMP_NUM_SYS_TIMEOUT is too low to accomodate all required timeouts" +#endif +#if (IP_REASSEMBLY && (MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS)) + #error "MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS doesn't make sense since each struct ip_reassdata must hold 2 pbufs at least!" +#endif +#if (MEM_LIBC_MALLOC && MEM_USE_POOLS) + #error "MEM_LIBC_MALLOC and MEM_USE_POOLS may not both be simultaneously enabled in your lwipopts.h" +#endif +#if (MEM_USE_POOLS && !MEMP_USE_CUSTOM_POOLS) + #error "MEM_USE_POOLS requires custom pools (MEMP_USE_CUSTOM_POOLS) to be enabled in your lwipopts.h" +#endif +#if (PBUF_POOL_BUFSIZE <= MEM_ALIGNMENT) + #error "PBUF_POOL_BUFSIZE must be greater than MEM_ALIGNMENT or the offset may take the full first pbuf" +#endif +#if (TCP_QUEUE_OOSEQ && !LWIP_TCP) + #error "TCP_QUEUE_OOSEQ requires LWIP_TCP" +#endif +#if (DNS_LOCAL_HOSTLIST && !DNS_LOCAL_HOSTLIST_IS_DYNAMIC && !(defined(DNS_LOCAL_HOSTLIST_INIT))) + #error "you have to define define DNS_LOCAL_HOSTLIST_INIT {{'host1', 0x123}, {'host2', 0x234}} to initialize DNS_LOCAL_HOSTLIST" +#endif +#if PPP_SUPPORT && !PPPOS_SUPPORT & !PPPOE_SUPPORT + #error "PPP_SUPPORT needs either PPPOS_SUPPORT or PPPOE_SUPPORT turned on" +#endif +#if !LWIP_ETHERNET && (LWIP_ARP || PPPOE_SUPPORT) + #error "LWIP_ETHERNET needs to be turned on for LWIP_ARP or PPPOE_SUPPORT" +#endif +#if LWIP_IGMP && !defined(LWIP_RAND) + #error "When using IGMP, LWIP_RAND() needs to be defined to a random-function returning an u32_t random value" +#endif +#if LWIP_TCPIP_CORE_LOCKING_INPUT && !LWIP_TCPIP_CORE_LOCKING + #error "When using LWIP_TCPIP_CORE_LOCKING_INPUT, LWIP_TCPIP_CORE_LOCKING must be enabled, too" +#endif +#if LWIP_TCP && LWIP_NETIF_TX_SINGLE_PBUF && !TCP_OVERSIZE + #error "LWIP_NETIF_TX_SINGLE_PBUF needs TCP_OVERSIZE enabled to create single-pbuf TCP packets" +#endif +#if IP_FRAG && IP_FRAG_USES_STATIC_BUF && LWIP_NETIF_TX_SINGLE_PBUF + #error "LWIP_NETIF_TX_SINGLE_PBUF does not work with IP_FRAG_USES_STATIC_BUF==1 as that creates pbuf queues" +#endif + + +/* Compile-time checks for deprecated options. + */ +#ifdef MEMP_NUM_TCPIP_MSG + #error "MEMP_NUM_TCPIP_MSG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef MEMP_NUM_API_MSG + #error "MEMP_NUM_API_MSG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef TCP_REXMIT_DEBUG + #error "TCP_REXMIT_DEBUG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef RAW_STATS + #error "RAW_STATS option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef ETHARP_QUEUE_FIRST + #error "ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef ETHARP_ALWAYS_INSERT + #error "ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h." +#endif + +#ifdef LWIP_DEBUG +static void ICACHE_FLASH_ATTR +lwip_sanity_check(void) +{ + /* Warnings */ +#if LWIP_NETCONN + if (MEMP_NUM_NETCONN > (MEMP_NUM_TCP_PCB+MEMP_NUM_TCP_PCB_LISTEN+MEMP_NUM_UDP_PCB+MEMP_NUM_RAW_PCB)) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_NETCONN should be less than the sum of MEMP_NUM_{TCP,RAW,UDP}_PCB+MEMP_NUM_TCP_PCB_LISTEN\n")); +#endif /* LWIP_NETCONN */ +#if LWIP_TCP + if (MEMP_NUM_TCP_SEG < TCP_SND_QUEUELEN) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_TCP_SEG should be at least as big as TCP_SND_QUEUELEN\n")); + if (TCP_SND_BUF < 2 * TCP_MSS) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_BUF must be at least as much as (2 * TCP_MSS) for things to work smoothly\n")); + if (TCP_SND_QUEUELEN < (2 * (TCP_SND_BUF/TCP_MSS))) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_QUEUELEN must be at least as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work\n")); + if (TCP_SNDLOWAT >= TCP_SND_BUF) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SNDLOWAT must be less than TCP_SND_BUF.\n")); + if (TCP_SNDQUEUELOWAT >= TCP_SND_QUEUELEN) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SNDQUEUELOWAT must be less than TCP_SND_QUEUELEN.\n")); + if (TCP_WND > (PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE)) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is larger than space provided by PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE\n")); + if (TCP_WND < TCP_MSS) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is smaller than MSS\n")); +#endif /* LWIP_TCP */ +#if LWIP_SOCKET + /* Check that the SO_* socket options and SOF_* lwIP-internal flags match */ + if (SO_ACCEPTCONN != SOF_ACCEPTCONN) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: SO_ACCEPTCONN != SOF_ACCEPTCONN\n")); + if (SO_REUSEADDR != SOF_REUSEADDR) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: SO_REUSEADDR != SOF_REUSEADDR\n")); + if (SO_KEEPALIVE != SOF_KEEPALIVE) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: SO_KEEPALIVE != SOF_KEEPALIVE\n")); + if (SO_BROADCAST != SOF_BROADCAST) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: SO_BROADCAST != SOF_BROADCAST\n")); + if (SO_LINGER != SOF_LINGER) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: SO_LINGER != SOF_LINGER\n")); +#endif /* LWIP_SOCKET */ +} +#else /* LWIP_DEBUG */ +#define lwip_sanity_check() +#endif /* LWIP_DEBUG */ + +/** + * Perform Sanity check of user-configurable values, and initialize all modules. + */ +void +lwip_init(void) +{ + MEMP_NUM_TCP_PCB = 5; + TCP_WND = (4 * TCP_MSS); + TCP_MAXRTX = 12; + TCP_SYNMAXRTX = 6; + + /* Sanity check user-configurable values */ + lwip_sanity_check(); + + /* Modules initialization */ + stats_init(); +#if !NO_SYS + sys_init(); +#endif /* !NO_SYS */ +#if 0 + mem_init(&_bss_end); +#endif + memp_init(); + + pbuf_init(); + + netif_init(); + +#if LWIP_SOCKET + lwip_socket_init(); +#endif /* LWIP_SOCKET */ + ip_init(); + +#if LWIP_ARP + etharp_init(); + +#endif /* LWIP_ARP */ +#if LWIP_RAW + raw_init(); + +#endif /* LWIP_RAW */ +#if LWIP_UDP + udp_init(); + +#endif /* LWIP_UDP */ +#if LWIP_TCP + tcp_init(); + +#endif /* LWIP_TCP */ +#if LWIP_SNMP + snmp_init(); + +#endif /* LWIP_SNMP */ +#if LWIP_AUTOIP + autoip_init(); + +#endif /* LWIP_AUTOIP */ +#if LWIP_IGMP + igmp_init(); + +#endif /* LWIP_IGMP */ +#if LWIP_DNS + dns_init(); + +#endif /* LWIP_DNS */ + +#if LWIP_TIMERS + sys_timeouts_init(); +#endif /* LWIP_TIMERS */ +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/Makefile b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/Makefile new file mode 100755 index 0000000..2d818fe --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = liblwipipv4.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/autoip.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/autoip.c new file mode 100755 index 0000000..cdba69d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/autoip.c @@ -0,0 +1,536 @@ +/** + * @file + * AutoIP Automatic LinkLocal IP Configuration + * + */ + +/* + * + * Copyright (c) 2007 Dominik Spies + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Dominik Spies + * + * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform + * with RFC 3927. + * + * + * Please coordinate changes and requests with Dominik Spies + * + */ + +/******************************************************************************* + * USAGE: + * + * define LWIP_AUTOIP 1 in your lwipopts.h + * + * If you don't use tcpip.c (so, don't call, you don't call tcpip_init): + * - First, call autoip_init(). + * - call autoip_tmr() all AUTOIP_TMR_INTERVAL msces, + * that should be defined in autoip.h. + * I recommend a value of 100. The value must divide 1000 with a remainder almost 0. + * Possible values are 1000, 500, 333, 250, 200, 166, 142, 125, 111, 100 .... + * + * Without DHCP: + * - Call autoip_start() after netif_add(). + * + * With DHCP: + * - define LWIP_DHCP_AUTOIP_COOP 1 in your lwipopts.h. + * - Configure your DHCP Client. + * + */ + +#include "lwip/opt.h" + +#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/mem.h" +#include "lwip/udp.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/autoip.h" +#include "netif/etharp.h" + +#include +#include + +/* 169.254.0.0 */ +#define AUTOIP_NET 0xA9FE0000 +/* 169.254.1.0 */ +#define AUTOIP_RANGE_START (AUTOIP_NET | 0x0100) +/* 169.254.254.255 */ +#define AUTOIP_RANGE_END (AUTOIP_NET | 0xFEFF) + + +/** Pseudo random macro based on netif informations. + * You could use "rand()" from the C Library if you define LWIP_AUTOIP_RAND in lwipopts.h */ +#ifndef LWIP_AUTOIP_RAND +#define LWIP_AUTOIP_RAND(netif) ( (((u32_t)((netif->hwaddr[5]) & 0xff) << 24) | \ + ((u32_t)((netif->hwaddr[3]) & 0xff) << 16) | \ + ((u32_t)((netif->hwaddr[2]) & 0xff) << 8) | \ + ((u32_t)((netif->hwaddr[4]) & 0xff))) + \ + (netif->autoip?netif->autoip->tried_llipaddr:0)) +#endif /* LWIP_AUTOIP_RAND */ + +/** + * Macro that generates the initial IP address to be tried by AUTOIP. + * If you want to override this, define it to something else in lwipopts.h. + */ +#ifndef LWIP_AUTOIP_CREATE_SEED_ADDR +#define LWIP_AUTOIP_CREATE_SEED_ADDR(netif) \ + htonl(AUTOIP_RANGE_START + ((u32_t)(((u8_t)(netif->hwaddr[4])) | \ + ((u32_t)((u8_t)(netif->hwaddr[5]))) << 8))) +#endif /* LWIP_AUTOIP_CREATE_SEED_ADDR */ + +/* static functions */ +static void autoip_handle_arp_conflict(struct netif *netif); + +/* creates a pseudo random LL IP-Address for a network interface */ +static void autoip_create_addr(struct netif *netif, ip_addr_t *ipaddr); + +/* sends an ARP probe */ +static err_t autoip_arp_probe(struct netif *netif); + +/* sends an ARP announce */ +static err_t autoip_arp_announce(struct netif *netif); + +/* configure interface for use with current LL IP-Address */ +static err_t autoip_bind(struct netif *netif); + +/* start sending probes for llipaddr */ +static void autoip_start_probing(struct netif *netif); + +/** + * Initialize this module + */ +void +autoip_init(void) +{ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_init()\n")); +} + +/** Set a statically allocated struct autoip to work with. + * Using this prevents autoip_start to allocate it using mem_malloc. + * + * @param netif the netif for which to set the struct autoip + * @param dhcp (uninitialised) dhcp struct allocated by the application + */ +void +autoip_set_struct(struct netif *netif, struct autoip *autoip) +{ + LWIP_ASSERT("netif != NULL", netif != NULL); + LWIP_ASSERT("autoip != NULL", autoip != NULL); + LWIP_ASSERT("netif already has a struct autoip set", netif->autoip == NULL); + + /* clear data structure */ + os_memset(autoip, 0, sizeof(struct autoip)); + /* autoip->state = AUTOIP_STATE_OFF; */ + netif->autoip = autoip; +} + +/** Restart AutoIP client and check the next address (conflict detected) + * + * @param netif The netif under AutoIP control + */ +static void +autoip_restart(struct netif *netif) +{ + netif->autoip->tried_llipaddr++; + autoip_start(netif); +} + +/** + * Handle a IP address conflict after an ARP conflict detection + */ +static void +autoip_handle_arp_conflict(struct netif *netif) +{ + /* Somehow detect if we are defending or retreating */ + unsigned char defend = 1; /* tbd */ + + if(defend) { + if(netif->autoip->lastconflict > 0) { + /* retreat, there was a conflicting ARP in the last + * DEFEND_INTERVAL seconds + */ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we are defending, but in DEFEND_INTERVAL, retreating\n")); + + /* TODO: close all TCP sessions */ + autoip_restart(netif); + } else { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we are defend, send ARP Announce\n")); + autoip_arp_announce(netif); + netif->autoip->lastconflict = DEFEND_INTERVAL * AUTOIP_TICKS_PER_SECOND; + } + } else { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we do not defend, retreating\n")); + /* TODO: close all TCP sessions */ + autoip_restart(netif); + } +} + +/** + * Create an IP-Address out of range 169.254.1.0 to 169.254.254.255 + * + * @param netif network interface on which create the IP-Address + * @param ipaddr ip address to initialize + */ +static void +autoip_create_addr(struct netif *netif, ip_addr_t *ipaddr) +{ + /* Here we create an IP-Address out of range 169.254.1.0 to 169.254.254.255 + * compliant to RFC 3927 Section 2.1 + * We have 254 * 256 possibilities */ + + u32_t addr = ntohl(LWIP_AUTOIP_CREATE_SEED_ADDR(netif)); + addr += netif->autoip->tried_llipaddr; + addr = AUTOIP_NET | (addr & 0xffff); + /* Now, 169.254.0.0 <= addr <= 169.254.255.255 */ + + if (addr < AUTOIP_RANGE_START) { + addr += AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1; + } + if (addr > AUTOIP_RANGE_END) { + addr -= AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1; + } + LWIP_ASSERT("AUTOIP address not in range", (addr >= AUTOIP_RANGE_START) && + (addr <= AUTOIP_RANGE_END)); + ip4_addr_set_u32(ipaddr, htonl(addr)); + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_create_addr(): tried_llipaddr=%"U16_F", %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + (u16_t)(netif->autoip->tried_llipaddr), ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), + ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr))); +} + +/** + * Sends an ARP probe from a network interface + * + * @param netif network interface used to send the probe + */ +static err_t +autoip_arp_probe(struct netif *netif) +{ + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, IP_ADDR_ANY, ðzero, + &netif->autoip->llipaddr, ARP_REQUEST); +} + +/** + * Sends an ARP announce from a network interface + * + * @param netif network interface used to send the announce + */ +static err_t +autoip_arp_announce(struct netif *netif) +{ + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, &netif->autoip->llipaddr, ðzero, + &netif->autoip->llipaddr, ARP_REQUEST); +} + +/** + * Configure interface for use with current LL IP-Address + * + * @param netif network interface to configure with current LL IP-Address + */ +static err_t +autoip_bind(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + ip_addr_t sn_mask, gw_addr; + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_bind(netif=%p) %c%c%"U16_F" %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num, + ip4_addr1_16(&autoip->llipaddr), ip4_addr2_16(&autoip->llipaddr), + ip4_addr3_16(&autoip->llipaddr), ip4_addr4_16(&autoip->llipaddr))); + + IP4_ADDR(&sn_mask, 255, 255, 0, 0); + IP4_ADDR(&gw_addr, 0, 0, 0, 0); + + netif_set_ipaddr(netif, &autoip->llipaddr); + netif_set_netmask(netif, &sn_mask); + netif_set_gw(netif, &gw_addr); + + /* bring the interface up */ + netif_set_up(netif); + + return ERR_OK; +} + +/** + * Start AutoIP client + * + * @param netif network interface on which start the AutoIP client + */ +err_t +autoip_start(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + err_t result = ERR_OK; + + if(netif_is_up(netif)) { + netif_set_down(netif); + } + + /* Set IP-Address, Netmask and Gateway to 0 to make sure that + * ARP Packets are formed correctly + */ + ip_addr_set_zero(&netif->ip_addr); + ip_addr_set_zero(&netif->netmask); + ip_addr_set_zero(&netif->gw); + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], + netif->name[1], (u16_t)netif->num)); + if(autoip == NULL) { + /* no AutoIP client attached yet? */ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_start(): starting new AUTOIP client\n")); + autoip = (struct autoip *)mem_malloc(sizeof(struct autoip)); + if(autoip == NULL) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_start(): could not allocate autoip\n")); + return ERR_MEM; + } + os_memset(autoip, 0, sizeof(struct autoip)); + /* store this AutoIP client in the netif */ + netif->autoip = autoip; + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_start(): allocated autoip")); + } else { + autoip->state = AUTOIP_STATE_OFF; + autoip->ttw = 0; + autoip->sent_num = 0; + ip_addr_set_zero(&autoip->llipaddr); + autoip->lastconflict = 0; + } + + autoip_create_addr(netif, &(autoip->llipaddr)); + autoip_start_probing(netif); + + return result; +} + +static void +autoip_start_probing(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + + autoip->state = AUTOIP_STATE_PROBING; + autoip->sent_num = 0; + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_start_probing(): changing state to PROBING: %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(&netif->autoip->llipaddr), ip4_addr2_16(&netif->autoip->llipaddr), + ip4_addr3_16(&netif->autoip->llipaddr), ip4_addr4_16(&netif->autoip->llipaddr))); + + /* time to wait to first probe, this is randomly + * choosen out of 0 to PROBE_WAIT seconds. + * compliant to RFC 3927 Section 2.2.1 + */ + autoip->ttw = (u16_t)(LWIP_AUTOIP_RAND(netif) % (PROBE_WAIT * AUTOIP_TICKS_PER_SECOND)); + + /* + * if we tried more then MAX_CONFLICTS we must limit our rate for + * accquiring and probing address + * compliant to RFC 3927 Section 2.2.1 + */ + if(autoip->tried_llipaddr > MAX_CONFLICTS) { + autoip->ttw = RATE_LIMIT_INTERVAL * AUTOIP_TICKS_PER_SECOND; + } +} + +/** + * Handle a possible change in the network configuration. + * + * If there is an AutoIP address configured, take the interface down + * and begin probing with the same address. + */ +void +autoip_network_changed(struct netif *netif) +{ + if (netif->autoip && netif->autoip->state != AUTOIP_STATE_OFF) { + netif_set_down(netif); + autoip_start_probing(netif); + } +} + +/** + * Stop AutoIP client + * + * @param netif network interface on which stop the AutoIP client + */ +err_t +autoip_stop(struct netif *netif) +{ + netif->autoip->state = AUTOIP_STATE_OFF; + netif_set_down(netif); + return ERR_OK; +} + +/** + * Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds + */ +void +autoip_tmr() +{ + struct netif *netif = netif_list; + /* loop through netif's */ + while (netif != NULL) { + /* only act on AutoIP configured interfaces */ + if (netif->autoip != NULL) { + if(netif->autoip->lastconflict > 0) { + netif->autoip->lastconflict--; + } + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() AutoIP-State: %"U16_F", ttw=%"U16_F"\n", + (u16_t)(netif->autoip->state), netif->autoip->ttw)); + + switch(netif->autoip->state) { + case AUTOIP_STATE_PROBING: + if(netif->autoip->ttw > 0) { + netif->autoip->ttw--; + } else { + if(netif->autoip->sent_num >= PROBE_NUM) { + netif->autoip->state = AUTOIP_STATE_ANNOUNCING; + netif->autoip->sent_num = 0; + netif->autoip->ttw = ANNOUNCE_WAIT * AUTOIP_TICKS_PER_SECOND; + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_tmr(): changing state to ANNOUNCING: %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(&netif->autoip->llipaddr), ip4_addr2_16(&netif->autoip->llipaddr), + ip4_addr3_16(&netif->autoip->llipaddr), ip4_addr4_16(&netif->autoip->llipaddr))); + } else { + autoip_arp_probe(netif); + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() PROBING Sent Probe\n")); + netif->autoip->sent_num++; + /* calculate time to wait to next probe */ + netif->autoip->ttw = (u16_t)((LWIP_AUTOIP_RAND(netif) % + ((PROBE_MAX - PROBE_MIN) * AUTOIP_TICKS_PER_SECOND) ) + + PROBE_MIN * AUTOIP_TICKS_PER_SECOND); + } + } + break; + + case AUTOIP_STATE_ANNOUNCING: + if(netif->autoip->ttw > 0) { + netif->autoip->ttw--; + } else { + if(netif->autoip->sent_num == 0) { + /* We are here the first time, so we waited ANNOUNCE_WAIT seconds + * Now we can bind to an IP address and use it. + * + * autoip_bind calls netif_set_up. This triggers a gratuitous ARP + * which counts as an announcement. + */ + autoip_bind(netif); + } else { + autoip_arp_announce(netif); + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() ANNOUNCING Sent Announce\n")); + } + netif->autoip->ttw = ANNOUNCE_INTERVAL * AUTOIP_TICKS_PER_SECOND; + netif->autoip->sent_num++; + + if(netif->autoip->sent_num >= ANNOUNCE_NUM) { + netif->autoip->state = AUTOIP_STATE_BOUND; + netif->autoip->sent_num = 0; + netif->autoip->ttw = 0; + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_tmr(): changing state to BOUND: %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(&netif->autoip->llipaddr), ip4_addr2_16(&netif->autoip->llipaddr), + ip4_addr3_16(&netif->autoip->llipaddr), ip4_addr4_16(&netif->autoip->llipaddr))); + } + } + break; + } + } + /* proceed to next network interface */ + netif = netif->next; + } +} + +/** + * Handles every incoming ARP Packet, called by etharp_arp_input. + * + * @param netif network interface to use for autoip processing + * @param hdr Incoming ARP packet + */ +void +autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr) +{ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_arp_reply()\n")); + if ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) { + /* when ip.src == llipaddr && hw.src != netif->hwaddr + * + * when probing ip.dst == llipaddr && hw.src != netif->hwaddr + * we have a conflict and must solve it + */ + ip_addr_t sipaddr, dipaddr; + struct eth_addr netifaddr; + ETHADDR16_COPY(netifaddr.addr, netif->hwaddr); + + /* Copy struct ip_addr2 to aligned ip_addr, to support compilers without + * structure packing (not using structure copy which breaks strict-aliasing rules). + */ + IPADDR2_COPY(&sipaddr, &hdr->sipaddr); + IPADDR2_COPY(&dipaddr, &hdr->dipaddr); + + if ((netif->autoip->state == AUTOIP_STATE_PROBING) || + ((netif->autoip->state == AUTOIP_STATE_ANNOUNCING) && + (netif->autoip->sent_num == 0))) { + /* RFC 3927 Section 2.2.1: + * from beginning to after ANNOUNCE_WAIT + * seconds we have a conflict if + * ip.src == llipaddr OR + * ip.dst == llipaddr && hw.src != own hwaddr + */ + if ((ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr)) || + (ip_addr_cmp(&dipaddr, &netif->autoip->llipaddr) && + !eth_addr_cmp(&netifaddr, &hdr->shwaddr))) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("autoip_arp_reply(): Probe Conflict detected\n")); + autoip_restart(netif); + } + } else { + /* RFC 3927 Section 2.5: + * in any state we have a conflict if + * ip.src == llipaddr && hw.src != own hwaddr + */ + if (ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr) && + !eth_addr_cmp(&netifaddr, &hdr->shwaddr)) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("autoip_arp_reply(): Conflicting ARP-Packet detected\n")); + autoip_handle_arp_conflict(netif); + } + } + } +} + +#endif /* LWIP_AUTOIP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/icmp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/icmp.c new file mode 100755 index 0000000..421d50d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/icmp.c @@ -0,0 +1,354 @@ +/** + * @file + * ICMP - Internet Control Message Protocol + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +/* Some ICMP messages should be passed to the transport protocols. This + is not implemented. */ + +#include "lwip/opt.h" + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/icmp.h" +#include "lwip/inet_chksum.h" +#include "lwip/ip.h" +#include "lwip/def.h" +#include "lwipopts.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" + +#include + +/** Small optimization: set to 0 if incoming PBUF_POOL pbuf always can be + * used to modify and send a response packet (and to 1 if this is not the case, + * e.g. when link header is stripped of when receiving) */ +#ifndef LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN +#define LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN 1 +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ + +/* The amount of data from the original packet to return in a dest-unreachable */ +#define ICMP_DEST_UNREACH_DATASIZE 8 + +static void icmp_send_response(struct pbuf *p, u8_t type, u8_t code); + +/** + * Processes ICMP input packets, called from ip_input(). + * + * Currently only processes icmp echo requests and sends + * out the echo response. + * + * @param p the icmp echo request packet, p->payload pointing to the ip header + * @param inp the netif on which this packet was received + */ +void +icmp_input(struct pbuf *p, struct netif *inp) +{ + u8_t type; +#ifdef LWIP_DEBUG + u8_t code; +#endif /* LWIP_DEBUG */ + struct icmp_echo_hdr *iecho; + struct ip_hdr *iphdr; + s16_t hlen; + + ICMP_STATS_INC(icmp.recv); + snmp_inc_icmpinmsgs(); + + + iphdr = (struct ip_hdr *)p->payload; + hlen = IPH_HL(iphdr) * 4; + if (pbuf_header(p, -hlen) || (p->tot_len < sizeof(u16_t)*2)) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len)); + goto lenerr; + } + + type = *((u8_t *)p->payload); +#ifdef LWIP_DEBUG + code = *(((u8_t *)p->payload)+1); +#endif /* LWIP_DEBUG */ + switch (type) { + case ICMP_ER: + /* This is OK, echo reply might have been parsed by a raw PCB + (as obviously, an echo request has been sent, too). */ + break; +#if ESP_SYSTEM_APP /* by LiuHan: change the current MTU on the interface */ + case ICMP_DUR: + { + u16_t next_mtu = 0; + next_mtu = *(u8_t *)((u8_t *)p->payload + 6); + next_mtu <<= 8; + next_mtu |= *(u8_t *)((u8_t *)p->payload + 7); + if (next_mtu != 0 && next_mtu != inp->mtu){ + //ets_printf("Match the MTU.\n"); + inp->mtu = next_mtu; + } else { + //ets_printf("Receive the MTU %d\n", next_mtu); + } + } + break; +#endif + case ICMP_ECHO: +#if !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING + { + int accepted = 1; +#if !LWIP_MULTICAST_PING + /* multicast destination address? */ + if (ip_addr_ismulticast(¤t_iphdr_dest)) { + accepted = 0; + } +#endif /* LWIP_MULTICAST_PING */ +#if !LWIP_BROADCAST_PING + /* broadcast destination address? */ + if (ip_addr_isbroadcast(¤t_iphdr_dest, inp)) { + accepted = 0; + } +#endif /* LWIP_BROADCAST_PING */ + /* broadcast or multicast destination address not acceptd? */ + if (!accepted) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast or broadcast pings\n")); + ICMP_STATS_INC(icmp.err); + pbuf_free(p); + return; + } + } +#endif /* !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */ + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); + if (p->tot_len < sizeof(struct icmp_echo_hdr)) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); + goto lenerr; + } + if (inet_chksum_pbuf(p) != 0) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n")); + pbuf_free(p); + ICMP_STATS_INC(icmp.chkerr); + snmp_inc_icmpinerrors(); + return; + } +#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN + if (pbuf_header(p, (PBUF_IP_HLEN + PBUF_LINK_HLEN))) { + /* p is not big enough to contain link headers + * allocate a new one and copy p into it + */ + struct pbuf *r; + /* switch p->payload to ip header */ + if (pbuf_header(p, hlen)) { + LWIP_ASSERT("icmp_input: moving p->payload to ip header failed\n", 0); + goto memerr; + } + /* allocate new packet buffer with space for link headers */ + r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM); + if (r == NULL) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n")); + goto memerr; + } + LWIP_ASSERT("check that first pbuf can hold struct the ICMP header", + (r->len >= hlen + sizeof(struct icmp_echo_hdr))); + /* copy the whole packet including ip header */ + if (pbuf_copy(r, p) != ERR_OK) { + LWIP_ASSERT("icmp_input: copying to new pbuf failed\n", 0); + goto memerr; + } + iphdr = (struct ip_hdr *)r->payload; + /* switch r->payload back to icmp header */ + if (pbuf_header(r, -hlen)) { + LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); + goto memerr; + } + /* free the original p */ + pbuf_free(p); + /* we now have an identical copy of p that has room for link headers */ + p = r; + } else { + /* restore p->payload to point to icmp header */ + if (pbuf_header(p, -(s16_t)(PBUF_IP_HLEN + PBUF_LINK_HLEN))) { + LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); + goto memerr; + } + } +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ + /* At this point, all checks are OK. */ + /* We generate an answer by switching the dest and src ip addresses, + * setting the icmp type to ECHO_RESPONSE and updating the checksum. */ + iecho = (struct icmp_echo_hdr *)p->payload; + ip_addr_copy(iphdr->src, *ip_current_dest_addr()); + ip_addr_copy(iphdr->dest, *ip_current_src_addr()); + ICMPH_TYPE_SET(iecho, ICMP_ER); + /* adjust the checksum */ + if (iecho->chksum >= PP_HTONS(0xffff - (ICMP_ECHO << 8))) { + iecho->chksum += PP_HTONS(ICMP_ECHO << 8) + 1; + } else { + iecho->chksum += PP_HTONS(ICMP_ECHO << 8); + } + + /* Set the correct TTL and recalculate the header checksum. */ + IPH_TTL_SET(iphdr, ICMP_TTL); + IPH_CHKSUM_SET(iphdr, 0); +#if CHECKSUM_GEN_IP + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); +#endif /* CHECKSUM_GEN_IP */ + + ICMP_STATS_INC(icmp.xmit); + /* increase number of messages attempted to send */ + snmp_inc_icmpoutmsgs(); + /* increase number of echo replies attempted to send */ + snmp_inc_icmpoutechoreps(); + + if(pbuf_header(p, hlen)) { + LWIP_ASSERT("Can't move over header in packet", 0); + } else { + err_t ret; + /* send an ICMP packet, src addr is the dest addr of the curren packet */ + ret = ip_output_if(p, ip_current_dest_addr(), IP_HDRINCL, + ICMP_TTL, 0, IP_PROTO_ICMP, inp); + if (ret != ERR_OK) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %c.\n", ret)); + } + } + break; + default: + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n", + (s16_t)type, (s16_t)code)); + ICMP_STATS_INC(icmp.proterr); + ICMP_STATS_INC(icmp.drop); + } + pbuf_free(p); + return; +lenerr: + pbuf_free(p); + ICMP_STATS_INC(icmp.lenerr); + snmp_inc_icmpinerrors(); + return; +#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN +memerr: + pbuf_free(p); + ICMP_STATS_INC(icmp.err); + snmp_inc_icmpinerrors(); + return; +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ +} + +/** + * Send an icmp 'destination unreachable' packet, called from ip_input() if + * the transport layer protocol is unknown and from udp_input() if the local + * port is not bound. + * + * @param p the input packet for which the 'unreachable' should be sent, + * p->payload pointing to the IP header + * @param t type of the 'unreachable' packet + */ +void +icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) +{ + icmp_send_response(p, ICMP_DUR, t); +} + +#if IP_FORWARD || IP_REASSEMBLY +/** + * Send a 'time exceeded' packet, called from ip_forward() if TTL is 0. + * + * @param p the input packet for which the 'time exceeded' should be sent, + * p->payload pointing to the IP header + * @param t type of the 'time exceeded' packet + */ +void +icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) +{ + icmp_send_response(p, ICMP_TE, t); +} + +#endif /* IP_FORWARD || IP_REASSEMBLY */ + +/** + * Send an icmp packet in response to an incoming packet. + * + * @param p the input packet for which the 'unreachable' should be sent, + * p->payload pointing to the IP header + * @param type Type of the ICMP header + * @param code Code of the ICMP header + */ +static void ICACHE_FLASH_ATTR +icmp_send_response(struct pbuf *p, u8_t type, u8_t code) +{ + struct pbuf *q; + struct ip_hdr *iphdr; + /* we can use the echo header here */ + struct icmp_echo_hdr *icmphdr; + ip_addr_t iphdr_src; + + /* ICMP header + IP header + 8 bytes of data */ + //Ϊpbufռ䣬pbufԤIPײ̫ײռ䣬pbuf + //=ײ+ݳ(IPײ+8) + q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE, + PBUF_RAM); + if (q == NULL) {//ʧܣ + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold icmp message", + (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE))); + + iphdr = (struct ip_hdr *)p->payload;//ָIPݰײ + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded from ")); + ip_addr_debug_print(ICMP_DEBUG, &(iphdr->src)); + LWIP_DEBUGF(ICMP_DEBUG, (" to ")); + ip_addr_debug_print(ICMP_DEBUG, &(iphdr->dest)); + LWIP_DEBUGF(ICMP_DEBUG, ("\n")); + + icmphdr = (struct icmp_echo_hdr *)q->payload;//ָײ + icmphdr->type = type;//дֶ + icmphdr->code = code;//дֶ + icmphdr->id = 0;//ĿIJɴݱʱ + icmphdr->seqno = 0;//ģײʣ4ֽڶΪ0 + + /* copy fields from original packet IPݱIPײ+8ֽݿ*/ + SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload, + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE); + + /* calculate checksum */ + icmphdr->chksum = 0;//Уֶ0 + icmphdr->chksum = inet_chksum(icmphdr, q->len);//дУ + ICMP_STATS_INC(icmp.xmit); + /* increase number of messages attempted to send */ + snmp_inc_icmpoutmsgs(); + /* increase number of destination unreachable messages attempted to send */ + snmp_inc_icmpouttimeexcds(); + ip_addr_copy(iphdr_src, iphdr->src); + ip_output(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP);//IP㺯ICMP + pbuf_free(q); +} + +#endif /* LWIP_ICMP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/igmp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/igmp.c new file mode 100755 index 0000000..b41bfad --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/igmp.c @@ -0,0 +1,845 @@ +/** + * @file + * IGMP - Internet Group Management Protocol + * + */ + +/* + * Copyright (c) 2002 CITEL Technologies Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS'' + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. +*/ + +/*------------------------------------------------------------- +Note 1) +Although the rfc requires V1 AND V2 capability +we will only support v2 since now V1 is very old (August 1989) +V1 can be added if required + +a debug print and statistic have been implemented to +show this up. +------------------------------------------------------------- +------------------------------------------------------------- +Note 2) +A query for a specific group address (as opposed to ALLHOSTS) +has now been implemented as I am unsure if it is required + +a debug print and statistic have been implemented to +show this up. +------------------------------------------------------------- +------------------------------------------------------------- +Note 3) +The router alert rfc 2113 is implemented in outgoing packets +but not checked rigorously incoming +------------------------------------------------------------- +Steve Reynolds +------------------------------------------------------------*/ + +/*----------------------------------------------------------------------------- + * RFC 988 - Host extensions for IP multicasting - V0 + * RFC 1054 - Host extensions for IP multicasting - + * RFC 1112 - Host extensions for IP multicasting - V1 + * RFC 2236 - Internet Group Management Protocol, Version 2 - V2 <- this code is based on this RFC (it's the "de facto" standard) + * RFC 3376 - Internet Group Management Protocol, Version 3 - V3 + * RFC 4604 - Using Internet Group Management Protocol Version 3... - V3+ + * RFC 2113 - IP Router Alert Option - + *----------------------------------------------------------------------------*/ + +/*----------------------------------------------------------------------------- + * Includes + *----------------------------------------------------------------------------*/ + +#include "lwip/opt.h" + +#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/igmp.h" +#include "lwip/debug.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/ip.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/stats.h" + +#include "string.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +//#define DYC_IGMP_DEBUG +#ifdef DYC_IGMP_DEBUG +#define IGMP_LOG os_printf +#else +#define IGMP_LOG //os_printf +#endif + +/* + * IGMP constants + */ +#define IGMP_TTL 1 +#define IGMP_MINLEN 8 +#define ROUTER_ALERT 0x9404 +#define ROUTER_ALERTLEN 4 + +/* + * IGMP message types, including version number. + */ +#define IGMP_MEMB_QUERY 0x11 /* Membership query */ +#define IGMP_V1_MEMB_REPORT 0x12 /* Ver. 1 membership report */ +#define IGMP_V2_MEMB_REPORT 0x16 /* Ver. 2 membership report */ +#define IGMP_LEAVE_GROUP 0x17 /* Leave-group message */ + +/* Group membership states */ +#define IGMP_GROUP_NON_MEMBER 0 +#define IGMP_GROUP_DELAYING_MEMBER 1 +#define IGMP_GROUP_IDLE_MEMBER 2 + +/** + * IGMP packet format. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct igmp_msg { + PACK_STRUCT_FIELD(u8_t igmp_msgtype); + PACK_STRUCT_FIELD(u8_t igmp_maxresp); + PACK_STRUCT_FIELD(u16_t igmp_checksum); + PACK_STRUCT_FIELD(ip_addr_p_t igmp_group_address); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + + +static struct igmp_group *igmp_lookup_group(struct netif *ifp, ip_addr_t *addr)ICACHE_FLASH_ATTR; +static err_t igmp_remove_group(struct igmp_group *group)ICACHE_FLASH_ATTR; +static void igmp_timeout( struct igmp_group *group)ICACHE_FLASH_ATTR; +static void igmp_start_timer(struct igmp_group *group, u8_t max_time)ICACHE_FLASH_ATTR; +static void igmp_stop_timer(struct igmp_group *group)ICACHE_FLASH_ATTR; +static void igmp_delaying_member(struct igmp_group *group, u8_t maxresp)ICACHE_FLASH_ATTR; +static err_t igmp_ip_output_if(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, struct netif *netif)ICACHE_FLASH_ATTR; +static void igmp_send(struct igmp_group *group, u8_t type)ICACHE_FLASH_ATTR; + + +static struct igmp_group* igmp_group_list = NULL; +static ip_addr_t allsystems; +static ip_addr_t allrouters; + + +/** + * Initialize the IGMP module + */ +void +igmp_init(void) +{ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_init: initializing\n")); + + IP4_ADDR(&allsystems, 224, 0, 0, 1); + IP4_ADDR(&allrouters, 224, 0, 0, 2); +} + +//#ifdef LWIP_DEBUG +#ifdef DYC_IGMP_DEBUG +/** + * Dump global IGMP groups list + */ +void +igmp_dump_group_list() +{ + struct igmp_group *group = igmp_group_list; + IGMP_LOG("igmp_dump:\n"); + + while (group != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_dump_group_list: [%"U32_F"] ", (u32_t)(group->group_state))); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->netif)); + + if(group!=NULL) + IGMP_LOG("group:%p,netif:%p\n",group,group->netif); + + group = group->next; + } + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + IGMP_LOG("\n"); +} +#else +#define igmp_dump_group_list() +#endif /* LWIP_DEBUG */ + +/** + * Start IGMP processing on interface + * + * @param netif network interface on which start IGMP processing + */ +err_t +igmp_start(struct netif *netif) +{ + struct igmp_group* group; + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: starting IGMP processing on if %p\n", netif)); + + group = igmp_lookup_group(netif, &allsystems); + + if (group != NULL) { + group->group_state = IGMP_GROUP_IDLE_MEMBER; + group->use++; + + /* Allow the igmp messages at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: igmp_mac_filter(ADD ")); + ip_addr_debug_print(IGMP_DEBUG, &allsystems); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, &allsystems, IGMP_ADD_MAC_FILTER); + } + + return ERR_OK; + } + + return ERR_MEM; +} + +/** + * Stop IGMP processing on interface + * + * @param netif network interface on which stop IGMP processing + */ +err_t +igmp_stop(struct netif *netif) +{ + struct igmp_group *group = igmp_group_list; + struct igmp_group *prev = NULL; + struct igmp_group *next; + + /* look for groups joined on this interface further down the list */ + while (group != NULL) { + next = group->next; + /* is it a group joined on this interface? */ + if (group->netif == netif) { + + IGMP_LOG("stop igmp:%p,%p,",group,group->netif); + + /* is it the first group of the list? */ + if (group == igmp_group_list) { + igmp_group_list = next; + } + /* is there a "previous" group defined? */ + if (prev != NULL) { + prev->next = next; + } + /* disable the group at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_stop: igmp_mac_filter(DEL ")); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, &(group->group_address), IGMP_DEL_MAC_FILTER); + } + /* free group */ + memp_free(MEMP_IGMP_GROUP, group); + +igmp_dump_group_list(); + + } else { + /* change the "previous" */ + prev = group; + } + /* move to "next" */ + group = next; + } + return ERR_OK; +} + +/** + * Report IGMP memberships for this interface + * + * @param netif network interface on which report IGMP memberships + */ +void +igmp_report_groups(struct netif *netif) +{ + struct igmp_group *group = igmp_group_list; + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_report_groups: sending IGMP reports on if %p\n", netif)); + + while (group != NULL) { + if (group->netif == netif) { + igmp_delaying_member(group, IGMP_JOIN_DELAYING_MEMBER_TMR); + } + group = group->next; + } +} + +/** + * Search for a group in the global igmp_group_list + * + * @param ifp the network interface for which to look + * @param addr the group ip address to search for + * @return a struct igmp_group* if the group has been found, + * NULL if the group wasn't found. + */ +struct igmp_group * +igmp_lookfor_group(struct netif *ifp, ip_addr_t *addr) +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + if ((group->netif == ifp) && (ip_addr_cmp(&(group->group_address), addr))) { + return group; + } + group = group->next; + } + + /* to be clearer, we return NULL here instead of + * 'group' (which is also NULL at this point). + */ + return NULL; +} + +/** + * Search for a specific igmp group and create a new one if not found- + * + * @param ifp the network interface for which to look + * @param addr the group ip address to search + * @return a struct igmp_group*, + * NULL on memory error. + */ +struct igmp_group * +igmp_lookup_group(struct netif *ifp, ip_addr_t *addr) +{ + struct igmp_group *group = igmp_group_list; + + /* Search if the group already exists */ + group = igmp_lookfor_group(ifp, addr); + if (group != NULL) { + /* Group already exists. */ + return group; + } + + /* Group doesn't exist yet, create a new one */ + group = (struct igmp_group *)memp_malloc(MEMP_IGMP_GROUP); + if (group != NULL) { + group->netif = ifp; + ip_addr_set(&(group->group_address), addr); + group->timer = 0; /* Not running */ + group->group_state = IGMP_GROUP_NON_MEMBER; + group->last_reporter_flag = 0; + group->use = 0; + group->next = igmp_group_list; + + igmp_group_list = group; + } + IGMP_LOG("add igmp:%p,%p,",group,group->netif); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_lookup_group: %sallocated a new group with address ", (group?"":"impossible to "))); + ip_addr_debug_print(IGMP_DEBUG, addr); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", ifp)); + igmp_dump_group_list(); + return group; +} + +/** + * Remove a group in the global igmp_group_list + * + * @param group the group to remove from the global igmp_group_list + * @return ERR_OK if group was removed from the list, an err_t otherwise + */ +static err_t +igmp_remove_group(struct igmp_group *group) +{ + err_t err = ERR_OK; + IGMP_LOG("rmv igmp:%p,%p,",group,group->netif); + /* Is it the first group? */ + if (igmp_group_list == group) { + igmp_group_list = group->next; + } else { + /* look for group further down the list */ + struct igmp_group *tmpGroup; + for (tmpGroup = igmp_group_list; tmpGroup != NULL; tmpGroup = tmpGroup->next) { + if (tmpGroup->next == group) { + tmpGroup->next = group->next; + break; + } + } + /* Group not found in the global igmp_group_list */ + if (tmpGroup == NULL) + err = ERR_ARG; + } + /* free group */ + memp_free(MEMP_IGMP_GROUP, group); + +igmp_dump_group_list(); + return err; +} + +/** + * Called from ip_input() if a new IGMP packet is received. + * + * @param p received igmp packet, p->payload pointing to the ip header + * @param inp network interface on which the packet was received + * @param dest destination ip address of the igmp packet + */ +void +igmp_input(struct pbuf *p, struct netif *inp, ip_addr_t *dest) +{ + struct ip_hdr * iphdr; + struct igmp_msg* igmp; + struct igmp_group* group; + struct igmp_group* groupref; + + IGMP_STATS_INC(igmp.recv); + + /* Note that the length CAN be greater than 8 but only 8 are used - All are included in the checksum */ + iphdr = (struct ip_hdr *)p->payload; + if (pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4)) || (p->len < IGMP_MINLEN)) { + pbuf_free(p); + IGMP_STATS_INC(igmp.lenerr); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: length error\n")); + return; + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: message from ")); + ip_addr_debug_print(IGMP_DEBUG, &(iphdr->src)); + LWIP_DEBUGF(IGMP_DEBUG, (" to address ")); + ip_addr_debug_print(IGMP_DEBUG, &(iphdr->dest)); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", inp)); + + /* Now calculate and check the checksum */ + igmp = (struct igmp_msg *)p->payload; + if (inet_chksum(igmp, p->len)) { + pbuf_free(p); + IGMP_STATS_INC(igmp.chkerr); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: checksum error\n")); + return; + } + + /* Packet is ok so find an existing group */ + group = igmp_lookfor_group(inp, dest); /* use the destination IP address of incoming packet */ + + /* If group can be found or create... */ + if (!group) { + pbuf_free(p); + IGMP_STATS_INC(igmp.drop); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP frame not for us\n")); + return; + } + + /* NOW ACT ON THE INCOMING MESSAGE TYPE... */ + switch (igmp->igmp_msgtype) { + case IGMP_MEMB_QUERY: { + /* IGMP_MEMB_QUERY to the "all systems" address ? */ + if ((ip_addr_cmp(dest, &allsystems)) && ip_addr_isany(&igmp->igmp_group_address)) { + /* THIS IS THE GENERAL QUERY */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: General IGMP_MEMB_QUERY on \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + + if (igmp->igmp_maxresp == 0) { + IGMP_STATS_INC(igmp.rx_v1); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: got an all hosts query with time== 0 - this is V1 and not implemented - treat as v2\n")); + igmp->igmp_maxresp = IGMP_V1_DELAYING_MEMBER_TMR; + } else { + IGMP_STATS_INC(igmp.rx_general); + } + + groupref = igmp_group_list; + while (groupref) { + /* Do not send messages on the all systems group address! */ + if ((groupref->netif == inp) && (!(ip_addr_cmp(&(groupref->group_address), &allsystems)))) { + igmp_delaying_member(groupref, igmp->igmp_maxresp); + } + groupref = groupref->next; + } + } else { + /* IGMP_MEMB_QUERY to a specific group ? */ + if (!ip_addr_isany(&igmp->igmp_group_address)) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_MEMB_QUERY to a specific group ")); + ip_addr_debug_print(IGMP_DEBUG, &igmp->igmp_group_address); + if (ip_addr_cmp(dest, &allsystems)) { + ip_addr_t groupaddr; + LWIP_DEBUGF(IGMP_DEBUG, (" using \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + /* we first need to re-look for the group since we used dest last time */ + ip_addr_copy(groupaddr, igmp->igmp_group_address); + group = igmp_lookfor_group(inp, &groupaddr); + } else { + LWIP_DEBUGF(IGMP_DEBUG, (" with the group address as destination [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + } + + if (group != NULL) { + IGMP_STATS_INC(igmp.rx_group); + igmp_delaying_member(group, igmp->igmp_maxresp); + } else { + IGMP_STATS_INC(igmp.drop); + } + } else { + IGMP_STATS_INC(igmp.proterr); + } + } + break; + } + case IGMP_V2_MEMB_REPORT: { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_V2_MEMB_REPORT\n")); + IGMP_STATS_INC(igmp.rx_report); + if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) { + /* This is on a specific group we have already looked up */ + group->timer = 0; /* stopped */ + group->group_state = IGMP_GROUP_IDLE_MEMBER; + group->last_reporter_flag = 0; + } + break; + } + default: { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: unexpected msg %d in state %d on group %p on if %p\n", + igmp->igmp_msgtype, group->group_state, &group, group->netif)); + IGMP_STATS_INC(igmp.proterr); + break; + } + } + + pbuf_free(p); + return; +} + +/** + * Join a group on one network interface. + * + * @param ifaddr ip address of the network interface which should join a new group + * @param groupaddr the ip address of the group which to join + * @return ERR_OK if group was joined on the netif(s), an err_t otherwise + */ +err_t +igmp_joingroup(ip_addr_t *ifaddr, ip_addr_t *groupaddr) +{ + err_t err = ERR_VAL; /* no matching interface */ + struct igmp_group *group; + struct netif *netif; + + /* make sure it is multicast address */ + LWIP_ERROR("igmp_joingroup: attempt to join non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;); + LWIP_ERROR("igmp_joingroup: attempt to join allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;); + + /* loop through netif's */ + netif = netif_list; + while (netif != NULL) { + /* Should we join this interface ? */ + if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) { + /* find group or create a new one if not found */ + group = igmp_lookup_group(netif, groupaddr); + + if (group != NULL) { + /* This should create a new group, check the state to make sure */ + if (group->group_state != IGMP_GROUP_NON_MEMBER) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to group not in state IGMP_GROUP_NON_MEMBER\n")); + } else { + /* OK - it was new group */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to new group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* If first use of the group, allow the group at the MAC level */ + if ((group->use==0) && (netif->igmp_mac_filter != NULL)) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: igmp_mac_filter(ADD ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, groupaddr, IGMP_ADD_MAC_FILTER); + } + + IGMP_STATS_INC(igmp.tx_join); + igmp_send(group, IGMP_V2_MEMB_REPORT); + + igmp_start_timer(group, IGMP_JOIN_DELAYING_MEMBER_TMR); + + /* Need to work out where this timer comes from */ + group->group_state = IGMP_GROUP_DELAYING_MEMBER; + } + /* Increment group use */ + group->use++; + /* Join on this interface */ + err = ERR_OK; + } else { + /* Return an error even if some network interfaces are joined */ + /** @todo undo any other netif already joined */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: Not enought memory to join to group\n")); + return ERR_MEM; + } + } + /* proceed to next network interface */ + netif = netif->next; + } + + return err; +} + +/** + * Leave a group on one network interface. + * + * @param ifaddr ip address of the network interface which should leave a group + * @param groupaddr the ip address of the group which to leave + * @return ERR_OK if group was left on the netif(s), an err_t otherwise + */ +err_t +igmp_leavegroup(ip_addr_t *ifaddr, ip_addr_t *groupaddr) +{ + err_t err = ERR_VAL; /* no matching interface */ + struct igmp_group *group; + struct netif *netif; + + /* make sure it is multicast address */ + LWIP_ERROR("igmp_leavegroup: attempt to leave non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;); + LWIP_ERROR("igmp_leavegroup: attempt to leave allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;); + + /* loop through netif's */ + netif = netif_list; + while (netif != NULL) { + /* Should we leave this interface ? */ + if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) { + /* find group */ + group = igmp_lookfor_group(netif, groupaddr); + + if (group != NULL) { + /* Only send a leave if the flag is set according to the state diagram */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: Leaving group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* If there is no other use of the group */ + if (group->use <= 1) { + /* If we are the last reporter for this group */ + if (group->last_reporter_flag) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: sending leaving group\n")); + IGMP_STATS_INC(igmp.tx_leave); + igmp_send(group, IGMP_LEAVE_GROUP); + } + + /* Disable the group at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: igmp_mac_filter(DEL ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, groupaddr, IGMP_DEL_MAC_FILTER); + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: remove group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* Free the group */ + igmp_remove_group(group); + } else { + /* Decrement group use */ + group->use--; + } + /* Leave on this interface */ + err = ERR_OK; + } else { + /* It's not a fatal error on "leavegroup" */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: not member of group\n")); + } + } + /* proceed to next network interface */ + netif = netif->next; + } + + return err; +} + +/** + * The igmp timer function (both for NO_SYS=1 and =0) + * Should be called every IGMP_TMR_INTERVAL milliseconds (100 ms is default). + */ +void +igmp_tmr(void) +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + if (group->timer > 0) { + group->timer--; + if (group->timer == 0) { + igmp_timeout(group); + } + } + group = group->next; + } +} + +/** + * Called if a timeout for one group is reached. + * Sends a report for this group. + * + * @param group an igmp_group for which a timeout is reached + */ +static void +igmp_timeout(struct igmp_group *group) +{ + /* If the state is IGMP_GROUP_DELAYING_MEMBER then we send a report for this group */ + if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_timeout: report membership for group with address ")); + ip_addr_debug_print(IGMP_DEBUG, &(group->group_address)); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->netif)); + + IGMP_STATS_INC(igmp.tx_report); + igmp_send(group, IGMP_V2_MEMB_REPORT); + } +} + +/** + * Start a timer for an igmp group + * + * @param group the igmp_group for which to start a timer + * @param max_time the time in multiples of IGMP_TMR_INTERVAL (decrease with + * every call to igmp_tmr()) + */ +static void +igmp_start_timer(struct igmp_group *group, u8_t max_time) +{ + /* ensure the input value is > 0 */ + if (max_time == 0) { + max_time = 1; + } + /* ensure the random value is > 0 */ +if(max_time == 1) + group->timer = 1; +else + group->timer = (LWIP_RAND() % (max_time - 1)) + 1; +} + +/** + * Stop a timer for an igmp_group + * + * @param group the igmp_group for which to stop the timer + */ +static void +igmp_stop_timer(struct igmp_group *group) +{ + group->timer = 0; +} + +/** + * Delaying membership report for a group if necessary + * + * @param group the igmp_group for which "delaying" membership report + * @param maxresp query delay + */ +static void +igmp_delaying_member(struct igmp_group *group, u8_t maxresp) +{ + if ((group->group_state == IGMP_GROUP_IDLE_MEMBER) || + ((group->group_state == IGMP_GROUP_DELAYING_MEMBER) && + ((group->timer == 0) || (maxresp < group->timer)))) { + igmp_start_timer(group, maxresp); + group->group_state = IGMP_GROUP_DELAYING_MEMBER; + } +} + + +/** + * Sends an IP packet on a network interface. This function constructs the IP header + * and calculates the IP header checksum. If the source IP address is NULL, + * the IP address of the outgoing network interface is filled in as source address. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param netif the netif on which to send this packet + * @return ERR_OK if the packet was sent OK + * ERR_BUF if p doesn't have enough space for IP/LINK headers + * returns errors returned by netif->output + */ +static err_t +igmp_ip_output_if(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, struct netif *netif) +{ + /* This is the "router alert" option */ + u16_t ra[2]; + ra[0] = PP_HTONS(ROUTER_ALERT); + ra[1] = 0x0000; /* Router shall examine packet */ + IGMP_STATS_INC(igmp.xmit); + return ip_output_if_opt(p, src, dest, IGMP_TTL, 0, IP_PROTO_IGMP, netif, ra, ROUTER_ALERTLEN); +} + +/** + * Send an igmp packet to a specific group. + * + * @param group the group to which to send the packet + * @param type the type of igmp packet to send + */ +static void +igmp_send(struct igmp_group *group, u8_t type) +{ + struct pbuf* p = NULL; + struct igmp_msg* igmp = NULL; + ip_addr_t src = *IP_ADDR_ANY; + ip_addr_t* dest = NULL; + + /* IP header + "router alert" option + IGMP header */ + p = pbuf_alloc(PBUF_TRANSPORT, IGMP_MINLEN, PBUF_RAM); + + if (p) { + igmp = (struct igmp_msg *)p->payload; + LWIP_ASSERT("igmp_send: check that first pbuf can hold struct igmp_msg", + (p->len >= sizeof(struct igmp_msg))); + ip_addr_copy(src, group->netif->ip_addr); + + if (type == IGMP_V2_MEMB_REPORT) { + dest = &(group->group_address); + ip_addr_copy(igmp->igmp_group_address, group->group_address); + group->last_reporter_flag = 1; /* Remember we were the last to report */ + } else { + if (type == IGMP_LEAVE_GROUP) { + dest = &allrouters; + ip_addr_copy(igmp->igmp_group_address, group->group_address); + } + } + + if ((type == IGMP_V2_MEMB_REPORT) || (type == IGMP_LEAVE_GROUP)) { + igmp->igmp_msgtype = type; + igmp->igmp_maxresp = 0; + igmp->igmp_checksum = 0; + igmp->igmp_checksum = inet_chksum(igmp, IGMP_MINLEN); + + igmp_ip_output_if(p, &src, dest, group->netif); + } + + pbuf_free(p); + } else { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_send: not enough memory for igmp_send\n")); + IGMP_STATS_INC(igmp.memerr); + } +} + +#endif /* LWIP_IGMP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/inet.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/inet.c new file mode 100755 index 0000000..e283a57 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/inet.c @@ -0,0 +1,42 @@ +/** + * @file + * Functions common to all TCP/IPv4 modules, such as the byte order functions. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/inet.h" + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/inet_chksum.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/inet_chksum.c new file mode 100755 index 0000000..bfcc40d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/inet_chksum.c @@ -0,0 +1,450 @@ +/** + * @file + * Incluse internet checksum functions. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/inet_chksum.h" +#include "lwip/def.h" + +#include +#include + +/* These are some reference implementations of the checksum algorithm, with the + * aim of being simple, correct and fully portable. Checksumming is the + * first thing you would want to optimize for your platform. If you create + * your own version, link it in and in your cc.h put: + * + * #define LWIP_CHKSUM + * + * Or you can select from the implementations below by defining + * LWIP_CHKSUM_ALGORITHM to 1, 2 or 3. + */ + +#ifndef LWIP_CHKSUM +# define LWIP_CHKSUM lwip_standard_chksum +# ifndef LWIP_CHKSUM_ALGORITHM +# define LWIP_CHKSUM_ALGORITHM 2 +# endif +#endif +/* If none set: */ +#ifndef LWIP_CHKSUM_ALGORITHM +# define LWIP_CHKSUM_ALGORITHM 0 +#endif + +#if (LWIP_CHKSUM_ALGORITHM == 1) /* Version #1 */ +/** + * lwip checksum + * + * @param dataptr points to start of data to be summed at any boundary + * @param len length of data to be summed + * @return host order (!) lwip checksum (non-inverted Internet sum) + * + * @note accumulator size limits summable length to 64k + * @note host endianess is irrelevant (p3 RFC1071) + */ +static u16_t ICACHE_FLASH_ATTR +lwip_standard_chksum(void *dataptr, u16_t len) +{ + u32_t acc; + u16_t src; + u8_t *octetptr; + + acc = 0; + /* dataptr may be at odd or even addresses */ + octetptr = (u8_t*)dataptr; + while (len > 1) { + /* declare first octet as most significant + thus assume network order, ignoring host order */ + src = (*octetptr) << 8; + octetptr++; + /* declare second octet as least significant */ + src |= (*octetptr); + octetptr++; + acc += src; + len -= 2; + } + if (len > 0) { + /* accumulate remaining octet */ + src = (*octetptr) << 8; + acc += src; + } + /* add deferred carry bits */ + acc = (acc >> 16) + (acc & 0x0000ffffUL); + if ((acc & 0xffff0000UL) != 0) { + acc = (acc >> 16) + (acc & 0x0000ffffUL); + } + /* This maybe a little confusing: reorder sum using htons() + instead of ntohs() since it has a little less call overhead. + The caller must invert bits for Internet sum ! */ + return htons((u16_t)acc); +} +#endif + +#if (LWIP_CHKSUM_ALGORITHM == 2) /* Alternative version #2 */ +/* + * Curt McDowell + * Broadcom Corp. + * csm@broadcom.com + * + * IP checksum two bytes at a time with support for + * unaligned buffer. + * Works for len up to and including 0x20000. + * by Curt McDowell, Broadcom Corp. 12/08/2005 + * + * @param dataptr points to start of data to be summed at any boundary + * @param len length of data to be summed + * @return host order (!) lwip checksum (non-inverted Internet sum) + */ + +static u16_t ICACHE_FLASH_ATTR +lwip_standard_chksum(void *dataptr, int len) +{ + u8_t *pb = (u8_t *)dataptr; + u16_t *ps, t = 0; + u32_t sum = 0; + int odd = ((mem_ptr_t)pb & 1); + + /* Get aligned to u16_t */ + if (odd && len > 0) { + ((u8_t *)&t)[1] = *pb++; + len--; + } + + /* Add the bulk of the data */ + ps = (u16_t *)(void *)pb; + while (len > 1) { + sum += *ps++; + len -= 2; + } + + /* Consume left-over byte, if any */ + if (len > 0) { + ((u8_t *)&t)[0] = *(u8_t *)ps; + } + + /* Add end bytes */ + sum += t; + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + sum = FOLD_U32T(sum); + sum = FOLD_U32T(sum); + + /* Swap if alignment was odd */ + if (odd) { + sum = SWAP_BYTES_IN_WORD(sum); + } + + return (u16_t)sum; +} +#endif + +#if (LWIP_CHKSUM_ALGORITHM == 3) /* Alternative version #3 */ +/** + * An optimized checksum routine. Basically, it uses loop-unrolling on + * the checksum loop, treating the head and tail bytes specially, whereas + * the inner loop acts on 8 bytes at a time. + * + * @arg start of buffer to be checksummed. May be an odd byte address. + * @len number of bytes in the buffer to be checksummed. + * @return host order (!) lwip checksum (non-inverted Internet sum) + * + * by Curt McDowell, Broadcom Corp. December 8th, 2005 + */ + +static u16_t ICACHE_FLASH_ATTR +lwip_standard_chksum(void *dataptr, int len) +{ + u8_t *pb = (u8_t *)dataptr; + u16_t *ps, t = 0; + u32_t *pl; + u32_t sum = 0, tmp; + /* starts at odd byte address? */ + int odd = ((mem_ptr_t)pb & 1); + + if (odd && len > 0) { + ((u8_t *)&t)[1] = *pb++; + len--; + } + + ps = (u16_t *)pb; + + if (((mem_ptr_t)ps & 3) && len > 1) { + sum += *ps++; + len -= 2; + } + + pl = (u32_t *)ps; + + while (len > 7) { + tmp = sum + *pl++; /* ping */ + if (tmp < sum) { + tmp++; /* add back carry */ + } + + sum = tmp + *pl++; /* pong */ + if (sum < tmp) { + sum++; /* add back carry */ + } + + len -= 8; + } + + /* make room in upper bits */ + sum = FOLD_U32T(sum); + + ps = (u16_t *)pl; + + /* 16-bit aligned word remaining? */ + while (len > 1) { + sum += *ps++; + len -= 2; + } + + /* dangling tail byte remaining? */ + if (len > 0) { /* include odd byte */ + ((u8_t *)&t)[0] = *(u8_t *)ps; + } + + sum += t; /* add end bytes */ + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + sum = FOLD_U32T(sum); + sum = FOLD_U32T(sum); + + if (odd) { + sum = SWAP_BYTES_IN_WORD(sum); + } + + return (u16_t)sum; +} +#endif + +/* inet_chksum_pseudo: + * + * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. + * IP addresses are expected to be in network byte order. + * + * @param p chain of pbufs over that a checksum should be calculated (ip data part) + * @param src source ip address (used for checksum of pseudo header) + * @param dst destination ip address (used for checksum of pseudo header) + * @param proto ip protocol (used for checksum of pseudo header) + * @param proto_len length of the ip data part (used for checksum of pseudo header) + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +u16_t +inet_chksum_pseudo(struct pbuf *p, + ip_addr_t *src, ip_addr_t *dest, + u8_t proto, u16_t proto_len) +{ + u32_t acc; + u32_t addr; + struct pbuf *q; + u8_t swapped; + + acc = 0; + swapped = 0; + /* iterate through all pbuf in chain */ + for(q = p; q != NULL; q = q->next) { + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", + (void *)q, (void *)q->next)); + acc += LWIP_CHKSUM(q->payload, q->len); + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ + /* just executing this next line is probably faster that the if statement needed + to check whether we really need to execute it, and does no harm */ + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + addr = ip4_addr_get_u32(src); + acc += (addr & 0xffffUL); + acc += ((addr >> 16) & 0xffffUL); + addr = ip4_addr_get_u32(dest); + acc += (addr & 0xffffUL); + acc += ((addr >> 16) & 0xffffUL); + acc += (u32_t)htons((u16_t)proto); + acc += (u32_t)htons(proto_len); + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + acc = FOLD_U32T(acc); + acc = FOLD_U32T(acc); + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); + return (u16_t)~(acc & 0xffffUL); +} + +/* inet_chksum_pseudo: + * + * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. + * IP addresses are expected to be in network byte order. + * + * @param p chain of pbufs over that a checksum should be calculated (ip data part) + * @param src source ip address (used for checksum of pseudo header) + * @param dst destination ip address (used for checksum of pseudo header) + * @param proto ip protocol (used for checksum of pseudo header) + * @param proto_len length of the ip data part (used for checksum of pseudo header) + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +u16_t +inet_chksum_pseudo_partial(struct pbuf *p, + ip_addr_t *src, ip_addr_t *dest, + u8_t proto, u16_t proto_len, u16_t chksum_len) +{ + u32_t acc; + u32_t addr; + struct pbuf *q; + u8_t swapped; + u16_t chklen; + + acc = 0; + swapped = 0; + /* iterate through all pbuf in chain */ + for(q = p; (q != NULL) && (chksum_len > 0); q = q->next) { + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", + (void *)q, (void *)q->next)); + chklen = q->len; + if (chklen > chksum_len) { + chklen = chksum_len; + } + acc += LWIP_CHKSUM(q->payload, chklen); + chksum_len -= chklen; + LWIP_ASSERT("delete me", chksum_len < 0x7fff); + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ + /* fold the upper bit down */ + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + addr = ip4_addr_get_u32(src); + acc += (addr & 0xffffUL); + acc += ((addr >> 16) & 0xffffUL); + addr = ip4_addr_get_u32(dest); + acc += (addr & 0xffffUL); + acc += ((addr >> 16) & 0xffffUL); + acc += (u32_t)htons((u16_t)proto); + acc += (u32_t)htons(proto_len); + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + acc = FOLD_U32T(acc); + acc = FOLD_U32T(acc); + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); + return (u16_t)~(acc & 0xffffUL); +} + +/* inet_chksum: + * + * Calculates the Internet checksum over a portion of memory. Used primarily for IP + * and ICMP. + * + * @param dataptr start of the buffer to calculate the checksum (no alignment needed) + * @param len length of the buffer to calculate the checksum + * @return checksum (as u16_t) to be saved directly in the protocol header + */ + +u16_t +inet_chksum(void *dataptr, u16_t len) +{ + return ~LWIP_CHKSUM(dataptr, len); +} + +/** + * Calculate a checksum over a chain of pbufs (without pseudo-header, much like + * inet_chksum only pbufs are used). + * + * @param p pbuf chain over that the checksum should be calculated + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +u16_t +inet_chksum_pbuf(struct pbuf *p) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + + acc = 0; + swapped = 0; + for(q = p; q != NULL; q = q->next) { + acc += LWIP_CHKSUM(q->payload, q->len); + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + return (u16_t)~(acc & 0xffffUL); +} + +/* These are some implementations for LWIP_CHKSUM_COPY, which copies data + * like MEMCPY but generates a checksum at the same time. Since this is a + * performance-sensitive function, you might want to create your own version + * in assembly targeted at your hardware by defining it in lwipopts.h: + * #define LWIP_CHKSUM_COPY(dst, src, len) your_chksum_copy(dst, src, len) + */ + +#if (LWIP_CHKSUM_COPY_ALGORITHM == 1) /* Version #1 */ +/** Safe but slow: first call MEMCPY, then call LWIP_CHKSUM. + * For architectures with big caches, data might still be in cache when + * generating the checksum after copying. + */ +u16_t +lwip_chksum_copy(void *dst, const void *src, u16_t len) +{ + MEMCPY(dst, src, len); + return LWIP_CHKSUM(dst, len); +} +#endif /* (LWIP_CHKSUM_COPY_ALGORITHM == 1) */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip.c new file mode 100755 index 0000000..67b137c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip.c @@ -0,0 +1,921 @@ +/** + * @file + * This is the IPv4 layer implementation for incoming and outgoing IP traffic. + * + * @see ip_frag.c + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/ip_frag.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/igmp.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp_impl.h" +#include "lwip/snmp.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "lwip/stats.h" +#include "arch/perf.h" + +#include + +/** Set this to 0 in the rare case of wanting to call an extra function to + * generate the IP checksum (in contrast to calculating it on-the-fly). */ +#ifndef LWIP_INLINE_IP_CHKSUM +#define LWIP_INLINE_IP_CHKSUM 1 +#endif +#if LWIP_INLINE_IP_CHKSUM && CHECKSUM_GEN_IP +#define CHECKSUM_GEN_IP_INLINE 1 +#else +#define CHECKSUM_GEN_IP_INLINE 0 +#endif + +#if LWIP_DHCP || defined(LWIP_IP_ACCEPT_UDP_PORT) +#define IP_ACCEPT_LINK_LAYER_ADDRESSING 1 + +/** Some defines for DHCP to let link-layer-addressed packets through while the + * netif is down. + * To use this in your own application/protocol, define LWIP_IP_ACCEPT_UDP_PORT + * to return 1 if the port is accepted and 0 if the port is not accepted. + */ +#if LWIP_DHCP && defined(LWIP_IP_ACCEPT_UDP_PORT) +/* accept DHCP client port and custom port */ +#define IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(port) (((port) == PP_NTOHS(DHCP_CLIENT_PORT)) \ + || (LWIP_IP_ACCEPT_UDP_PORT(port))) +#elif defined(LWIP_IP_ACCEPT_UDP_PORT) /* LWIP_DHCP && defined(LWIP_IP_ACCEPT_UDP_PORT) */ +/* accept custom port only */ +#define IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(port) (LWIP_IP_ACCEPT_UDP_PORT(dst_port)) +#else /* LWIP_DHCP && defined(LWIP_IP_ACCEPT_UDP_PORT) */ +/* accept DHCP client port only */ +#define IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(port) ((port) == PP_NTOHS(DHCP_CLIENT_PORT)) +#endif /* LWIP_DHCP && defined(LWIP_IP_ACCEPT_UDP_PORT) */ + +#else /* LWIP_DHCP */ +#define IP_ACCEPT_LINK_LAYER_ADDRESSING 0 +#endif /* LWIP_DHCP */ + +/** + * The interface that provided the packet for the current callback + * invocation. + */ +struct netif *current_netif; + +/** + * Header of the input packet currently being processed. + */ +const struct ip_hdr *current_header; +/** Source IP address of current_header */ +ip_addr_t current_iphdr_src; +/** Destination IP address of current_header */ +ip_addr_t current_iphdr_dest; + +/** The IP header ID of the next outgoing IP packet */ +static u16_t ip_id; + +extern struct netif * eagle_lwip_getif(uint8 index); +/** + * Finds the appropriate network interface for a given IP address. It + * searches the list of network interfaces linearly. A match is found + * if the masked IP address of the network interface equals the masked + * IP address given to the function. + * + * @param dest the destination IP address for which to find the route + * @return the netif on which to send to reach dest + */ +struct netif * +ip_route(ip_addr_t *dest) +{ + struct netif *netif; + + /* iterate through netifs */ + for(netif = netif_list; netif != NULL; netif = netif->next) { + /* network mask matches? */ + if (netif_is_up(netif)) { + if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { + /* return netif on which to forward IP packet */ + return netif; + } + } + } + /* iterate through netifs */ + for(netif = netif_list; netif != NULL; netif = netif->next) { + /* network mask matches? */ + if (netif_is_up(netif)) { + if (!ip_addr_isbroadcast(dest, netif) && netif == (struct netif *)eagle_lwip_getif(0)) { + return netif; + } + } + } + if ((netif_default == NULL) || (!netif_is_up(netif_default))) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest))); + IP_STATS_INC(ip.rterr); + snmp_inc_ipoutnoroutes(); + return NULL; + } + /* no matching netif found, use default netif */ + return netif_default; +} + +/** + * Finds the appropriate network interface for a source IP address. It + * searches the list of network interfaces linearly. A match is found + * if the masked IP address of the network interface equals the masked + * IP address given to the function. + * + * @param source the sourcination IP address for which to find the route + * @return the netif on which to send to reach source + */ + +struct netif *ICACHE_FLASH_ATTR +ip_router(ip_addr_t *dest, ip_addr_t *source){ + struct netif *netif; + /* iterate through netifs */ + for(netif = netif_list; netif != NULL; netif = netif->next) { + /* network mask matches? */ + + if (netif_is_up(netif)) { + if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { + /* return netif on which to forward IP packet */ + return netif; + } + } + + if (netif_is_up(netif)) { + if (ip_addr_netcmp(source, &(netif->ip_addr), &(netif->netmask))) { + /* return netif on which to forward IP packet */ + return netif; + } + } + } + + if ((netif_default == NULL) || (!netif_is_up(netif_default))) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest))); + IP_STATS_INC(ip.rterr); + snmp_inc_ipoutnoroutes(); + return NULL; + } + /* no matching netif found, use default netif */ + os_printf("ip_router %d %p\n", __LINE__, netif_default); + return netif_default; +} + +#if IP_FORWARD +/** + * Forwards an IP packet. It finds an appropriate route for the + * packet, decrements the TTL value of the packet, adjusts the + * checksum and outputs the packet on the appropriate interface. + * + * @param p the packet to forward (p->payload points to IP header) + * @param iphdr the IP header of the input packet + * @param inp the netif on which this packet was received + */ +static void ICACHE_FLASH_ATTR +ip_forward(struct pbuf *p, struct ip_hdr *iphdr, struct netif *inp) +{ + struct netif *netif; + + PERF_START; + + /* RFC3927 2.7: do not forward link-local addresses */ + if (ip_addr_islinklocal(¤t_iphdr_dest)) { + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: not forwarding LLA %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(¤t_iphdr_dest), ip4_addr2_16(¤t_iphdr_dest), + ip4_addr3_16(¤t_iphdr_dest), ip4_addr4_16(¤t_iphdr_dest))); + goto return_noroute; + } + + /* Find network interface where to forward this IP packet to. */ + netif = ip_route(¤t_iphdr_dest); + if (netif == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: no forwarding route for %"U16_F".%"U16_F".%"U16_F".%"U16_F" found\n", + ip4_addr1_16(¤t_iphdr_dest), ip4_addr2_16(¤t_iphdr_dest), + ip4_addr3_16(¤t_iphdr_dest), ip4_addr4_16(¤t_iphdr_dest))); + goto return_noroute; + } + /* Do not forward packets onto the same network interface on which + * they arrived. */ + if (netif == inp) { + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: not bouncing packets back on incoming interface.\n")); + goto return_noroute; + } + + /* decrement TTL */ + IPH_TTL_SET(iphdr, IPH_TTL(iphdr) - 1); + /* send ICMP if TTL == 0 */ + if (IPH_TTL(iphdr) == 0) { + snmp_inc_ipinhdrerrors(); +#if LWIP_ICMP + /* Don't send ICMP messages in response to ICMP messages */ + if (IPH_PROTO(iphdr) != IP_PROTO_ICMP) { + icmp_time_exceeded(p, ICMP_TE_TTL); + } +#endif /* LWIP_ICMP */ + return; + } + + /* Incrementally update the IP checksum. */ + if (IPH_CHKSUM(iphdr) >= PP_HTONS(0xffff - 0x100)) { + IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + PP_HTONS(0x100) + 1); + } else { + IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + PP_HTONS(0x100)); + } + + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(¤t_iphdr_dest), ip4_addr2_16(¤t_iphdr_dest), + ip4_addr3_16(¤t_iphdr_dest), ip4_addr4_16(¤t_iphdr_dest))); + + IP_STATS_INC(ip.fw); + IP_STATS_INC(ip.xmit); + snmp_inc_ipforwdatagrams(); + + PERF_STOP("ip_forward"); + /* transmit pbuf on chosen interface */ + netif->output(netif, p, ¤t_iphdr_dest); + return; +return_noroute: + snmp_inc_ipoutnoroutes(); +} +#endif /* IP_FORWARD */ + +/** + * This function is called by the network interface device driver when + * an IP packet is received. The function does the basic checks of the + * IP header such as packet size being at least larger than the header + * size etc. If the packet was not destined for us, the packet is + * forwarded (using ip_forward). The IP checksum is always checked. + * + * Finally, the packet is sent to the upper layer protocol input function. + * + * @param p the received IP packet (p->payload points to IP header) + * @param inp the netif on which this packet was received + * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't + * processed, but currently always returns ERR_OK) + */ +err_t +ip_input(struct pbuf *p, struct netif *inp) +{ + struct ip_hdr *iphdr; + struct netif *netif; + u16_t iphdr_hlen; + u16_t iphdr_len; +#if IP_ACCEPT_LINK_LAYER_ADDRESSING + int check_ip_src=1; +#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */ + + IP_STATS_INC(ip.recv); + snmp_inc_ipinreceives(); + + /* identify the IP header */ + iphdr = (struct ip_hdr *)p->payload; + if (IPH_V(iphdr) != 4) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", IPH_V(iphdr))); + ip_debug_print(p); + pbuf_free(p); + IP_STATS_INC(ip.err); + IP_STATS_INC(ip.drop); + snmp_inc_ipinhdrerrors(); + return ERR_OK; + } + + /* obtain IP header length in number of 32-bit words */ + iphdr_hlen = IPH_HL(iphdr); + /* calculate IP header length in bytes */ + iphdr_hlen *= 4; + /* obtain ip length in bytes */ + iphdr_len = ntohs(IPH_LEN(iphdr)); + + /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */ + if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len)) { + if (iphdr_hlen > p->len) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("IP header (len %"U16_F") does not fit in first pbuf (len %"U16_F"), IP packet dropped.\n", + iphdr_hlen, p->len)); + } + if (iphdr_len > p->tot_len) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n", + iphdr_len, p->tot_len)); + } + /* free (drop) packet pbufs */ + pbuf_free(p); + IP_STATS_INC(ip.lenerr); + IP_STATS_INC(ip.drop); + snmp_inc_ipindiscards(); + return ERR_OK; + } + + /* verify checksum */ +#if CHECKSUM_CHECK_IP + if (inet_chksum(iphdr, iphdr_hlen) != 0) { + + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("Checksum (0x%"X16_F") failed, IP packet dropped.\n", inet_chksum(iphdr, iphdr_hlen))); + ip_debug_print(p); + pbuf_free(p); + IP_STATS_INC(ip.chkerr); + IP_STATS_INC(ip.drop); + snmp_inc_ipinhdrerrors(); + return ERR_OK; + } +#endif + + /* Trim pbuf. This should have been done at the netif layer, + * but we'll do it anyway just to be sure that its done. */ + pbuf_realloc(p, iphdr_len); + + /* copy IP addresses to aligned ip_addr_t */ + ip_addr_copy(current_iphdr_dest, iphdr->dest); + ip_addr_copy(current_iphdr_src, iphdr->src); + + /* match packet against an interface, i.e. is this packet for us? */ +#if LWIP_IGMP + if (ip_addr_ismulticast(¤t_iphdr_dest)) { + if ((inp->flags & NETIF_FLAG_IGMP) && (igmp_lookfor_group(inp, ¤t_iphdr_dest))) { + netif = inp; + } else { + netif = NULL; + } + } else +#endif /* LWIP_IGMP */ + { + /* start trying with inp. if that's not acceptable, start walking the + list of configured netifs. + 'first' is used as a boolean to mark whether we started walking the list */ + int first = 1; + netif = inp; + do { + LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest 0x%"X32_F" netif->ip_addr 0x%"X32_F" (0x%"X32_F", 0x%"X32_F", 0x%"X32_F")\n", + ip4_addr_get_u32(&iphdr->dest), ip4_addr_get_u32(&netif->ip_addr), + ip4_addr_get_u32(&iphdr->dest) & ip4_addr_get_u32(&netif->netmask), + ip4_addr_get_u32(&netif->ip_addr) & ip4_addr_get_u32(&netif->netmask), + ip4_addr_get_u32(&iphdr->dest) & ~ip4_addr_get_u32(&netif->netmask))); + + /* interface is up and configured? */ + if ((netif_is_up(netif)) && (!ip_addr_isany(&(netif->ip_addr)))) { + /* unicast to this interface address? */ + if (ip_addr_cmp(¤t_iphdr_dest, &(netif->ip_addr)) || + /* or broadcast on this interface network address? */ + ip_addr_isbroadcast(¤t_iphdr_dest, netif)) { + LWIP_DEBUGF(IP_DEBUG, ("ip_input: packet accepted on interface %c%c\n", + netif->name[0], netif->name[1])); + /* break out of for loop */ + break; + } +#if LWIP_AUTOIP + /* connections to link-local addresses must persist after changing + the netif's address (RFC3927 ch. 1.9) */ + if ((netif->autoip != NULL) && + ip_addr_cmp(¤t_iphdr_dest, &(netif->autoip->llipaddr))) { + LWIP_DEBUGF(IP_DEBUG, ("ip_input: LLA packet accepted on interface %c%c\n", + netif->name[0], netif->name[1])); + /* break out of for loop */ + break; + } +#endif /* LWIP_AUTOIP */ + } + if (first) { + first = 0; + netif = netif_list; + } else { + netif = netif->next; + } + if (netif == inp) { + netif = netif->next; + } + } while(netif != NULL); + } + +#if IP_ACCEPT_LINK_LAYER_ADDRESSING + /* Pass DHCP messages regardless of destination address. DHCP traffic is addressed + * using link layer addressing (such as Ethernet MAC) so we must not filter on IP. + * According to RFC 1542 section 3.1.1, referred by RFC 2131). + * + * If you want to accept private broadcast communication while a netif is down, + * define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.: + * + * #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345)) + */ + if (netif == NULL) { + /* remote port is DHCP server? */ + if (IPH_PROTO(iphdr) == IP_PROTO_UDP) { + struct udp_hdr *udphdr = (struct udp_hdr *)((u8_t *)iphdr + iphdr_hlen); + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: UDP packet to DHCP client port %"U16_F"\n", + ntohs(udphdr->dest))); + if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: DHCP packet accepted.\n")); + netif = inp; + check_ip_src = 0; + } + } + } +#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */ + + /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */ +#if IP_ACCEPT_LINK_LAYER_ADDRESSING + /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */ + if (check_ip_src && !ip_addr_isany(¤t_iphdr_src)) +#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */ + { if ((ip_addr_isbroadcast(¤t_iphdr_src, inp)) || + (ip_addr_ismulticast(¤t_iphdr_src))) { + /* packet source is not valid */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip_input: packet source is not valid.\n")); + /* free (drop) packet pbufs */ + pbuf_free(p); + IP_STATS_INC(ip.drop); + snmp_inc_ipinaddrerrors(); + snmp_inc_ipindiscards(); + return ERR_OK; + } + } + + /* packet not for us? */ + if (netif == NULL) { + /* packet not for us, route or discard */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: packet not for us.\n")); +#if IP_FORWARD + /* non-broadcast packet? */ + if (!ip_addr_isbroadcast(¤t_iphdr_dest, inp)) { + /* try to forward IP packet on (other) interfaces */ + ip_forward(p, iphdr, inp); + } else +#endif /* IP_FORWARD */ + { + snmp_inc_ipinaddrerrors(); + snmp_inc_ipindiscards(); + } + pbuf_free(p); + return ERR_OK; + } + /* packet consists of multiple fragments? */ + if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) { +#if IP_REASSEMBLY /* packet fragment reassembly code present? */ + LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip_reass()\n", + ntohs(IPH_ID(iphdr)), p->tot_len, ntohs(IPH_LEN(iphdr)), !!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)*8)); + /* reassemble the packet*/ + p = ip_reass(p); + /* packet not fully reassembled yet? */ + if (p == NULL) { + return ERR_OK; + } + iphdr = (struct ip_hdr *)p->payload; +#else /* IP_REASSEMBLY == 0, no packet fragment reassembly code present */ + pbuf_free(p); + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since it was fragmented (0x%"X16_F") (while IP_REASSEMBLY == 0).\n", + ntohs(IPH_OFFSET(iphdr)))); + IP_STATS_INC(ip.opterr); + IP_STATS_INC(ip.drop); + /* unsupported protocol feature */ + snmp_inc_ipinunknownprotos(); + return ERR_OK; +#endif /* IP_REASSEMBLY */ + } + +#if IP_OPTIONS_ALLOWED == 0 /* no support for IP options in the IP header? */ + +#if LWIP_IGMP + /* there is an extra "router alert" option in IGMP messages which we allow for but do not police */ + if((iphdr_hlen > IP_HLEN) && (IPH_PROTO(iphdr) != IP_PROTO_IGMP)) { +#else + if (iphdr_hlen > IP_HLEN) { +#endif /* LWIP_IGMP */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since there were IP options (while IP_OPTIONS_ALLOWED == 0).\n")); + pbuf_free(p); + IP_STATS_INC(ip.opterr); + IP_STATS_INC(ip.drop); + /* unsupported protocol feature */ + snmp_inc_ipinunknownprotos(); + return ERR_OK; + } +#endif /* IP_OPTIONS_ALLOWED == 0 */ + + /* send to upper layers */ + LWIP_DEBUGF(IP_DEBUG, ("ip_input: \n")); + ip_debug_print(p); + LWIP_DEBUGF(IP_DEBUG, ("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len)); + + current_netif = inp; + current_header = iphdr; + +#if LWIP_RAW + /* raw input did not eat the packet? */ + if (raw_input(p, inp) == 0) +#endif /* LWIP_RAW */ + { + + switch (IPH_PROTO(iphdr)) { +#if LWIP_UDP + case IP_PROTO_UDP: +#if LWIP_UDPLITE + case IP_PROTO_UDPLITE: +#endif /* LWIP_UDPLITE */ + snmp_inc_ipindelivers(); + udp_input(p, inp); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case IP_PROTO_TCP: + snmp_inc_ipindelivers(); + tcp_input(p, inp); + break; +#endif /* LWIP_TCP */ +#if LWIP_ICMP + case IP_PROTO_ICMP: + snmp_inc_ipindelivers(); + icmp_input(p, inp); + break; +#endif /* LWIP_ICMP */ +#if LWIP_IGMP + case IP_PROTO_IGMP: + igmp_input(p, inp, ¤t_iphdr_dest); + break; +#endif /* LWIP_IGMP */ + default: +#if LWIP_ICMP + /* send ICMP destination protocol unreachable unless is was a broadcast */ + if (!ip_addr_isbroadcast(¤t_iphdr_dest, inp) && + !ip_addr_ismulticast(¤t_iphdr_dest)) { + p->payload = iphdr; + icmp_dest_unreach(p, ICMP_DUR_PROTO); + } +#endif /* LWIP_ICMP */ + pbuf_free(p); + + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Unsupported transport protocol %"U16_F"\n", IPH_PROTO(iphdr))); + + IP_STATS_INC(ip.proterr); + IP_STATS_INC(ip.drop); + snmp_inc_ipinunknownprotos(); + } + } + + current_netif = NULL; + current_header = NULL; + ip_addr_set_any(¤t_iphdr_src); + ip_addr_set_any(¤t_iphdr_dest); + + return ERR_OK; +} + +/** + * Sends an IP packet on a network interface. This function constructs + * the IP header and calculates the IP header checksum. If the source + * IP address is NULL, the IP address of the outgoing network + * interface is filled in as source address. + * If the destination IP address is IP_HDRINCL, p is assumed to already + * include an IP header and p->payload points to it instead of the data. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param netif the netif on which to send this packet + * @return ERR_OK if the packet was sent OK + * ERR_BUF if p doesn't have enough space for IP/LINK headers + * returns errors returned by netif->output + * + * @note ip_id: RFC791 "some host may be able to simply use + * unique identifiers independent of destination" + */ +err_t +ip_output_if(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, + u8_t proto, struct netif *netif) +{ +#if IP_OPTIONS_SEND + return ip_output_if_opt(p, src, dest, ttl, tos, proto, netif, NULL, 0); +} + +/** + * Same as ip_output_if() but with the possibility to include IP options: + * + * @ param ip_options pointer to the IP options, copied into the IP header + * @ param optlen length of ip_options + */ +err_t ip_output_if_opt(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, + u16_t optlen) +{ +#endif /* IP_OPTIONS_SEND */ + struct ip_hdr *iphdr; + ip_addr_t dest_addr; +#if CHECKSUM_GEN_IP_INLINE + u32_t chk_sum = 0; +#endif /* CHECKSUM_GEN_IP_INLINE */ + + /* pbufs passed to IP must have a ref-count of 1 as their payload pointer + gets altered as the packet is passed down the stack */ + LWIP_ASSERT("p->ref == 1", p->ref == 1); + + snmp_inc_ipoutrequests(); + + /* Should the IP header be generated or is it already included in p? */ + if (dest != IP_HDRINCL) { + u16_t ip_hlen = IP_HLEN; +#if IP_OPTIONS_SEND + u16_t optlen_aligned = 0; + if (optlen != 0) { +#if CHECKSUM_GEN_IP_INLINE + int i; +#endif /* CHECKSUM_GEN_IP_INLINE */ + /* round up to a multiple of 4 */ + optlen_aligned = ((optlen + 3) & ~3); + ip_hlen += optlen_aligned; + /* First write in the IP options */ + if (pbuf_header(p, optlen_aligned)) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output_if_opt: not enough room for IP options in pbuf\n")); + IP_STATS_INC(ip.err); + snmp_inc_ipoutdiscards(); + return ERR_BUF; + } + MEMCPY(p->payload, ip_options, optlen); + if (optlen < optlen_aligned) { + /* zero the remaining bytes */ + os_memset(((char*)p->payload) + optlen, 0, optlen_aligned - optlen); + } +#if CHECKSUM_GEN_IP_INLINE + for (i = 0; i < optlen_aligned/2; i++) { + chk_sum += ((u16_t*)p->payload)[i]; + } +#endif /* CHECKSUM_GEN_IP_INLINE */ + } +#endif /* IP_OPTIONS_SEND */ + /* generate IP header */ + if (pbuf_header(p, IP_HLEN)) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output: not enough room for IP header in pbuf\n")); + + IP_STATS_INC(ip.err); + snmp_inc_ipoutdiscards(); + return ERR_BUF; + } + + iphdr = (struct ip_hdr *)p->payload; + LWIP_ASSERT("check that first pbuf can hold struct ip_hdr", + (p->len >= sizeof(struct ip_hdr))); + + IPH_TTL_SET(iphdr, ttl); + IPH_PROTO_SET(iphdr, proto); +#if CHECKSUM_GEN_IP_INLINE + chk_sum += LWIP_MAKE_U16(proto, ttl); +#endif /* CHECKSUM_GEN_IP_INLINE */ + + /* dest cannot be NULL here */ + ip_addr_copy(iphdr->dest, *dest); +#if CHECKSUM_GEN_IP_INLINE + chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF; + chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16; +#endif /* CHECKSUM_GEN_IP_INLINE */ + + IPH_VHLTOS_SET(iphdr, 4, ip_hlen / 4, tos); +#if CHECKSUM_GEN_IP_INLINE + chk_sum += iphdr->_v_hl_tos; +#endif /* CHECKSUM_GEN_IP_INLINE */ + IPH_LEN_SET(iphdr, htons(p->tot_len)); +#if CHECKSUM_GEN_IP_INLINE + chk_sum += iphdr->_len; +#endif /* CHECKSUM_GEN_IP_INLINE */ + IPH_OFFSET_SET(iphdr, 0); + IPH_ID_SET(iphdr, htons(ip_id)); +#if CHECKSUM_GEN_IP_INLINE + chk_sum += iphdr->_id; +#endif /* CHECKSUM_GEN_IP_INLINE */ + ++ip_id; + +#if ESP_SYSTEM_APP /* by LiuHan: change IP fragment flags for support min MTU*/ + if (IPH_PROTO(iphdr) == IP_PROTO_TCP){ + //ets_printf("TCP protocol need change IP fragment flags\n"); + IPH_OFFSET_SET(iphdr, htons(IP_DF)); + chk_sum += iphdr->_offset; + } else { + //ets_printf("current protocol %d\n", IPH_PROTO(iphdr)); + } +#endif /*CHECKSUM_GEN_IP_OFFSET */ + + if (ip_addr_isany(src)) { + ip_addr_copy(iphdr->src, netif->ip_addr); + } else { + /* src cannot be NULL here */ + ip_addr_copy(iphdr->src, *src); + } + +#if CHECKSUM_GEN_IP_INLINE + chk_sum += ip4_addr_get_u32(&iphdr->src) & 0xFFFF; + chk_sum += ip4_addr_get_u32(&iphdr->src) >> 16; + chk_sum = (chk_sum >> 16) + (chk_sum & 0xFFFF); + chk_sum = (chk_sum >> 16) + chk_sum; + chk_sum = ~chk_sum; + iphdr->_chksum = chk_sum; /* network order */ +#else /* CHECKSUM_GEN_IP_INLINE */ + IPH_CHKSUM_SET(iphdr, 0); +#if CHECKSUM_GEN_IP + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, ip_hlen)); +#endif +#endif /* CHECKSUM_GEN_IP_INLINE */ + } else { + /* IP header already included in p */ + iphdr = (struct ip_hdr *)p->payload; + ip_addr_copy(dest_addr, iphdr->dest); + dest = &dest_addr; + } + + IP_STATS_INC(ip.xmit); + + LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c%"U16_F"\n", netif->name[0], netif->name[1], netif->num)); + ip_debug_print(p); + +#if ENABLE_LOOPBACK + if (ip_addr_cmp(dest, &netif->ip_addr)) { + /* Packet to self, enqueue it for loopback */ + LWIP_DEBUGF(IP_DEBUG, ("netif_loop_output()")); + return netif_loop_output(netif, p, dest); + } +#if LWIP_IGMP + if ((p->flags & PBUF_FLAG_MCASTLOOP) != 0) { + netif_loop_output(netif, p, dest); + } +#endif /* LWIP_IGMP */ +#endif /* ENABLE_LOOPBACK */ +#if IP_FRAG + /* don't fragment if interface has mtu set to 0 [loopif] */ + if (netif->mtu && (p->tot_len > netif->mtu)) { + return ip_frag(p, netif, dest); + } +#endif /* IP_FRAG */ + + LWIP_DEBUGF(IP_DEBUG, ("netif->output()\n")); + return netif->output(netif, p, dest); +} + +/** + * Simple interface to ip_output_if. It finds the outgoing network + * interface and calls upon ip_output_if to do the actual work. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * + * @return ERR_RTE if no route is found + * see ip_output_if() for more return values + */ +err_t +ip_output(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, u8_t proto) +{ + struct netif *netif; + + /* pbufs passed to IP must have a ref-count of 1 as their payload pointer + gets altered as the packet is passed down the stack */ + LWIP_ASSERT("p->ref == 1", p->ref == 1); + + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest))); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + return ip_output_if(p, src, dest, ttl, tos, proto, netif); +} + +#if LWIP_NETIF_HWADDRHINT +/** Like ip_output, but takes and addr_hint pointer that is passed on to netif->addr_hint + * before calling ip_output_if. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param addr_hint address hint pointer set to netif->addr_hint before + * calling ip_output_if() + * + * @return ERR_RTE if no route is found + * see ip_output_if() for more return values + */ +err_t +ip_output_hinted(struct pbuf *p, ip_addr_t *src, ip_addr_t *dest, + u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint) +{ + struct netif *netif; + err_t err; + + /* pbufs passed to IP must have a ref-count of 1 as their payload pointer + gets altered as the packet is passed down the stack */ + LWIP_ASSERT("p->ref == 1", p->ref == 1); + + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest))); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + netif->addr_hint = addr_hint; + err = ip_output_if(p, src, dest, ttl, tos, proto, netif); + netif->addr_hint = NULL; + + return err; +} +#endif /* LWIP_NETIF_HWADDRHINT*/ + +#if IP_DEBUG +/* Print an IP header by using LWIP_DEBUGF + * @param p an IP packet, p->payload pointing to the IP header + */ +void +ip_debug_print(struct pbuf *p) +{ + struct ip_hdr *iphdr = (struct ip_hdr *)p->payload; + u8_t *payload; + + payload = (u8_t *)iphdr + IP_HLEN; + + LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" |%2"S16_F" | 0x%02"X16_F" | %5"U16_F" | (v, hl, tos, len)\n", + IPH_V(iphdr), + IPH_HL(iphdr), + IPH_TOS(iphdr), + ntohs(IPH_LEN(iphdr)))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" |%"U16_F"%"U16_F"%"U16_F"| %4"U16_F" | (id, flags, offset)\n", + ntohs(IPH_ID(iphdr)), + ntohs(IPH_OFFSET(iphdr)) >> 15 & 1, + ntohs(IPH_OFFSET(iphdr)) >> 14 & 1, + ntohs(IPH_OFFSET(iphdr)) >> 13 & 1, + ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | 0x%04"X16_F" | (ttl, proto, chksum)\n", + IPH_TTL(iphdr), + IPH_PROTO(iphdr), + ntohs(IPH_CHKSUM(iphdr)))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (src)\n", + ip4_addr1_16(&iphdr->src), + ip4_addr2_16(&iphdr->src), + ip4_addr3_16(&iphdr->src), + ip4_addr4_16(&iphdr->src))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (dest)\n", + ip4_addr1_16(&iphdr->dest), + ip4_addr2_16(&iphdr->dest), + ip4_addr3_16(&iphdr->dest), + ip4_addr4_16(&iphdr->dest))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); +} +#endif /* IP_DEBUG */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip_addr.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip_addr.c new file mode 100755 index 0000000..e442ddd --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip_addr.c @@ -0,0 +1,330 @@ +/** + * @file + * This is the IPv4 address tools implementation. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include +#include "lwip/opt.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" + +/* used by IP_ADDR_ANY and IP_ADDR_BROADCAST in ip_addr.h */ +const ip_addr_t ip_addr_any ICACHE_RODATA_ATTR = { IPADDR_ANY }; +const ip_addr_t ip_addr_broadcast ICACHE_RODATA_ATTR = { IPADDR_BROADCAST }; + +/** + * Determine if an address is a broadcast address on a network interface + * + * @param addr address to be checked + * @param netif the network interface against which the address is checked + * @return returns non-zero if the address is a broadcast address + */ +u8_t +ip4_addr_isbroadcast(u32_t addr, const struct netif *netif) +{ + ip_addr_t ipaddr; + ip4_addr_set_u32(&ipaddr, addr); + + /* all ones (broadcast) or all zeroes (old skool broadcast) */ + if ((~addr == IPADDR_ANY) || + (addr == IPADDR_ANY)) { + return 1; + /* no broadcast support on this network interface? */ + } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) { + /* the given address cannot be a broadcast address + * nor can we check against any broadcast addresses */ + return 0; + /* address matches network interface address exactly? => no broadcast */ + } else if (addr == ip4_addr_get_u32(&netif->ip_addr)) { + return 0; + /* on the same (sub) network... */ + } else if (ip_addr_netcmp(&ipaddr, &(netif->ip_addr), &(netif->netmask)) + /* ...and host identifier bits are all ones? =>... */ + && ((addr & ~ip4_addr_get_u32(&netif->netmask)) == + (IPADDR_BROADCAST & ~ip4_addr_get_u32(&netif->netmask)))) { + /* => network broadcast address */ + return 1; + } else { + return 0; + } +} + +/** Checks if a netmask is valid (starting with ones, then only zeros) + * + * @param netmask the IPv4 netmask to check (in network byte order!) + * @return 1 if the netmask is valid, 0 if it is not + */ +u8_t +ip4_addr_netmask_valid(u32_t netmask) +{ + u32_t mask; + u32_t nm_hostorder = lwip_htonl(netmask); + + /* first, check for the first zero */ + for (mask = 1U << 31 ; mask != 0; mask >>= 1) { + if ((nm_hostorder & mask) == 0) { + break; + } + } + /* then check that there is no one */ + for (; mask != 0; mask >>= 1) { + if ((nm_hostorder & mask) != 0) { + /* there is a one after the first zero -> invalid */ + return 0; + } + } + /* no one after the first zero -> valid */ + return 1; +} + +/* Here for now until needed in other places in lwIP */ +#ifndef isprint +#define in_range(c, lo, up) ((u8_t)c >= lo && (u8_t)c <= up) +#define isprint(c) in_range(c, 0x20, 0x7f) +//#define isdigit(c) in_range(c, '0', '9') +//#define isxdigit(c) (isdigit(c) || in_range(c, 'a', 'f') || in_range(c, 'A', 'F')) +#define islower(c) in_range(c, 'a', 'z') +#define isspace(c) (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' || c == '\v') +#endif + +/** + * Ascii internet address interpretation routine. + * The value returned is in network order. + * + * @param cp IP address in ascii represenation (e.g. "127.0.0.1") + * @return ip address in network order + */ +u32_t +ipaddr_addr(const char *cp) +{ + ip_addr_t val; + + if (ipaddr_aton(cp, &val)) { + return ip4_addr_get_u32(&val); + } + return (IPADDR_NONE); +} + +/** + * Check whether "cp" is a valid ascii representation + * of an Internet address and convert to a binary address. + * Returns 1 if the address is valid, 0 if not. + * This replaces inet_addr, the return value from which + * cannot distinguish between failure and a local broadcast address. + * + * @param cp IP address in ascii represenation (e.g. "127.0.0.1") + * @param addr pointer to which to save the ip address in network order + * @return 1 if cp could be converted to addr, 0 on failure + */ +int +ipaddr_aton(const char *cp, ip_addr_t *addr) +{ + u32_t val; + u8_t base; + char c; + char ch; + unsigned long cutoff; + int cutlim; + u32_t parts[4]; + u32_t *pp = parts; + + c = *cp; + for (;;) { + /* + * Collect number up to ``.''. + * Values are specified as for C: + * 0x=hex, 0=octal, 1-9=decimal. + */ + if (!isdigit(c)) + return (0); + val = 0; + base = 10; + if (c == '0') { + c = *++cp; + if (c == 'x' || c == 'X') { + base = 16; + c = *++cp; + } else + base = 8; + } + + cutoff =(unsigned long)0xffffffff / (unsigned long)base; + cutlim =(unsigned long)0xffffffff % (unsigned long)base; + + for (;;) { + if (isdigit(c)) { + ch = (int)(c - '0'); + + if (val > cutoff || (val == cutoff && ch > cutlim)) + return (0); + + val = (val * base) + (int)(c - '0'); + c = *++cp; + } else if (base == 16 && isxdigit(c)) { + ch = (int)(c + 10 - (islower(c) ? 'a' : 'A')); + + if (val > cutoff || (val == cutoff && ch > cutlim)) + return (0); + + val = (val << 4) | (int)(c + 10 - (islower(c) ? 'a' : 'A')); + c = *++cp; + } else + break; + } + if (c == '.') { + /* + * Internet format: + * a.b.c.d + * a.b.c (with c treated as 16 bits) + * a.b (with b treated as 24 bits) + */ + if (pp >= parts + 3) { + return (0); + } + *pp++ = val; + c = *++cp; + } else + break; + } + /* + * Check for trailing characters. + */ + if (c != '\0' && !isspace(c)) { + return (0); + } + /* + * Concoct the address according to + * the number of parts specified. + */ + switch (pp - parts + 1) { + + case 0: + return (0); /* initial nondigit */ + + case 1: /* a -- 32 bits */ + break; + + case 2: /* a.b -- 8.24 bits */ + if ((val > 0xffffffUL) || (parts[0] > 0xff)) { + return (0); + } + val |= parts[0] << 24; + break; + + case 3: /* a.b.c -- 8.8.16 bits */ + if ((val > 0xffff) || (parts[0] > 0xff) || (parts[1] > 0xff)) { + return (0); + } + val |= (parts[0] << 24) | (parts[1] << 16); + break; + + case 4: /* a.b.c.d -- 8.8.8.8 bits */ + if ((val > 0xff) || (parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff)) { + return (0); + } + val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8); + break; + default: + LWIP_ASSERT("unhandled", 0); + break; + } + if (addr) { + ip4_addr_set_u32(addr, htonl(val)); + } + return (1); +} + +/** + * Convert numeric IP address into decimal dotted ASCII representation. + * returns ptr to static buffer; not reentrant! + * + * @param addr ip address in network order to convert + * @return pointer to a global static (!) buffer that holds the ASCII + * represenation of addr + */ +char * +ipaddr_ntoa(const ip_addr_t *addr) +{ + static char str[16]; + return ipaddr_ntoa_r(addr, str, 16); +} + +/** + * Same as ipaddr_ntoa, but reentrant since a user-supplied buffer is used. + * + * @param addr ip address in network order to convert + * @param buf target buffer where the string is stored + * @param buflen length of buf + * @return either pointer to buf which now holds the ASCII + * representation of addr or NULL if buf was too small + */ +char *ipaddr_ntoa_r(const ip_addr_t *addr, char *buf, int buflen) +{ + u32_t s_addr; + char inv[3]; + char *rp; + u8_t *ap; + u8_t rem; + u8_t n; + u8_t i; + int len = 0; + + s_addr = ip4_addr_get_u32(addr); + + rp = buf; + ap = (u8_t *)&s_addr; + for(n = 0; n < 4; n++) { + i = 0; + do { + rem = *ap % (u8_t)10; + *ap /= (u8_t)10; + inv[i++] = '0' + rem; + } while(*ap); + while(i--) { + if (len++ >= buflen) { + return NULL; + } + *rp++ = inv[i]; + } + if (len++ >= buflen) { + return NULL; + } + *rp++ = '.'; + ap++; + } + *--rp = 0; + return buf; +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip_frag.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip_frag.c new file mode 100755 index 0000000..b89eeb5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/ipv4/ip_frag.c @@ -0,0 +1,863 @@ +/** + * @file + * This is the IPv4 packet segmentation and reassembly implementation. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Jani Monoses + * Simon Goldschmidt + * original reassembly code by Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip_frag.h" +#include "lwip/def.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/snmp.h" +#include "lwip/stats.h" +#include "lwip/icmp.h" + +#include + +#if IP_REASSEMBLY +/** + * The IP reassembly code currently has the following limitations: + * - IP header options are not supported + * - fragments must not overlap (e.g. due to different routes), + * currently, overlapping or duplicate fragments are thrown away + * if IP_REASS_CHECK_OVERLAP=1 (the default)! + * + * @todo: work with IP header options + */ + +/** Setting this to 0, you can turn off checking the fragments for overlapping + * regions. The code gets a little smaller. Only use this if you know that + * overlapping won't occur on your network! */ +#ifndef IP_REASS_CHECK_OVERLAP +#define IP_REASS_CHECK_OVERLAP 1 +#endif /* IP_REASS_CHECK_OVERLAP */ + +/** Set to 0 to prevent freeing the oldest datagram when the reassembly buffer is + * full (IP_REASS_MAX_PBUFS pbufs are enqueued). The code gets a little smaller. + * Datagrams will be freed by timeout only. Especially useful when MEMP_NUM_REASSDATA + * is set to 1, so one datagram can be reassembled at a time, only. */ +#ifndef IP_REASS_FREE_OLDEST +#define IP_REASS_FREE_OLDEST 1 +#endif /* IP_REASS_FREE_OLDEST */ + +#define IP_REASS_FLAG_LASTFRAG 0x01 + +/** This is a helper struct which holds the starting + * offset and the ending offset of this fragment to + * easily chain the fragments. + * It has the same packing requirements as the IP header, since it replaces + * the IP header in memory in incoming fragments (after copying it) to keep + * track of the various fragments. (-> If the IP header doesn't need packing, + * this struct doesn't need packing, too.) + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_reass_helper { + PACK_STRUCT_FIELD(struct pbuf *next_pbuf); + PACK_STRUCT_FIELD(u16_t start); + PACK_STRUCT_FIELD(u16_t end); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define IP_ADDRESSES_AND_ID_MATCH(iphdrA, iphdrB) \ + (ip_addr_cmp(&(iphdrA)->src, &(iphdrB)->src) && \ + ip_addr_cmp(&(iphdrA)->dest, &(iphdrB)->dest) && \ + IPH_ID(iphdrA) == IPH_ID(iphdrB)) ? 1 : 0 + +/* global variables */ +static struct ip_reassdata *reassdatagrams; +static u16_t ip_reass_pbufcount; + +/* function prototypes */ +static void ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)ICACHE_FLASH_ATTR; +static int ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)ICACHE_FLASH_ATTR; + +/** + * Reassembly timer base function + * for both NO_SYS == 0 and 1 (!). + * + * Should be called every 1000 msec (defined by IP_TMR_INTERVAL). + */ +void +ip_reass_tmr(void) +{ + struct ip_reassdata *r, *prev = NULL; + + r = reassdatagrams; + while (r != NULL) { + /* Decrement the timer. Once it reaches 0, + * clean up the incomplete fragment assembly */ + if (r->timer > 0) { + r->timer--; + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n",(u16_t)r->timer)); + prev = r; + r = r->next; + } else { + /* reassembly timed out */ + struct ip_reassdata *tmp; + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n")); + tmp = r; + /* get the next pointer before freeing */ + r = r->next; + /* free the helper struct and all enqueued pbufs */ + ip_reass_free_complete_datagram(tmp, prev); + } + } +} + +/** + * Free a datagram (struct ip_reassdata) and all its pbufs. + * Updates the total count of enqueued pbufs (ip_reass_pbufcount), + * SNMP counters and sends an ICMP time exceeded packet. + * + * @param ipr datagram to free + * @param prev the previous datagram in the linked list + * @return the number of pbufs freed + */ +static int +ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) +{ + u16_t pbufs_freed = 0; + u8_t clen; + struct pbuf *p; + struct ip_reass_helper *iprh; + + LWIP_ASSERT("prev != ipr", prev != ipr); + if (prev != NULL) { + LWIP_ASSERT("prev->next == ipr", prev->next == ipr); + } + + snmp_inc_ipreasmfails(); +#if LWIP_ICMP + iprh = (struct ip_reass_helper *)ipr->p->payload; + if (iprh->start == 0) { + /* The first fragment was received, send ICMP time exceeded. */ + /* First, de-queue the first pbuf from r->p. */ + p = ipr->p; + ipr->p = iprh->next_pbuf; + /* Then, copy the original header into it. */ + SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN); + icmp_time_exceeded(p, ICMP_TE_FRAG); + clen = pbuf_clen(p); + LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff); + pbufs_freed += clen; + pbuf_free(p); + } +#endif /* LWIP_ICMP */ + + /* First, free all received pbufs. The individual pbufs need to be released + separately as they have not yet been chained */ + p = ipr->p; + while (p != NULL) { + struct pbuf *pcur; + iprh = (struct ip_reass_helper *)p->payload; + pcur = p; + /* get the next pointer before freeing */ + p = iprh->next_pbuf; + clen = pbuf_clen(pcur); + LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff); + pbufs_freed += clen; + pbuf_free(pcur); + } + /* Then, unchain the struct ip_reassdata from the list and free it. */ + ip_reass_dequeue_datagram(ipr, prev); + LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= pbufs_freed); + ip_reass_pbufcount -= pbufs_freed; + + return pbufs_freed; +} + +#if IP_REASS_FREE_OLDEST +/** + * Free the oldest datagram to make room for enqueueing new fragments. + * The datagram 'fraghdr' belongs to is not freed! + * + * @param fraghdr IP header of the current fragment + * @param pbufs_needed number of pbufs needed to enqueue + * (used for freeing other datagrams if not enough space) + * @return the number of pbufs freed + */ +static int +ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed) +{ + /* @todo Can't we simply remove the last datagram in the + * linked list behind reassdatagrams? + */ + struct ip_reassdata *r, *oldest, *prev; + int pbufs_freed = 0, pbufs_freed_current; + int other_datagrams; + + /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs, + * but don't free the datagram that 'fraghdr' belongs to! */ + do { + oldest = NULL; + prev = NULL; + other_datagrams = 0; + r = reassdatagrams; + while (r != NULL) { + if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) { + /* Not the same datagram as fraghdr */ + other_datagrams++; + if (oldest == NULL) { + oldest = r; + } else if (r->timer <= oldest->timer) { + /* older than the previous oldest */ + oldest = r; + } + } + if (r->next != NULL) { + prev = r; + } + r = r->next; + } + if (oldest != NULL) { + pbufs_freed_current = ip_reass_free_complete_datagram(oldest, prev); + pbufs_freed += pbufs_freed_current; + } + } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1)); + return pbufs_freed; +} +#endif /* IP_REASS_FREE_OLDEST */ + +/** + * Enqueues a new fragment into the fragment queue + * @param fraghdr points to the new fragments IP hdr + * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space) + * @return A pointer to the queue location into which the fragment was enqueued + */ +static struct ip_reassdata* ICACHE_FLASH_ATTR +ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen) +{ + struct ip_reassdata* ipr; + /* No matching previous fragment found, allocate a new reassdata struct */ + ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA); + if (ipr == NULL) { +#if IP_REASS_FREE_OLDEST + if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) { + ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA); + } + if (ipr == NULL) +#endif /* IP_REASS_FREE_OLDEST */ + { + IPFRAG_STATS_INC(ip_frag.memerr); + LWIP_DEBUGF(IP_REASS_DEBUG,("Failed to alloc reassdata struct\n")); + return NULL; + } + } + os_memset(ipr, 0, sizeof(struct ip_reassdata)); + ipr->timer = IP_REASS_MAXAGE; + + /* enqueue the new structure to the front of the list */ + ipr->next = reassdatagrams; + reassdatagrams = ipr; + /* copy the ip header for later tests and input */ + /* @todo: no ip options supported? */ + SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN); + return ipr; +} + +/** + * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs. + * @param ipr points to the queue entry to dequeue + */ +static void ICACHE_FLASH_ATTR +ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) +{ + + /* dequeue the reass struct */ + if (reassdatagrams == ipr) { + /* it was the first in the list */ + reassdatagrams = ipr->next; + } else { + /* it wasn't the first, so it must have a valid 'prev' */ + LWIP_ASSERT("sanity check linked list", prev != NULL); + prev->next = ipr->next; + } + + /* now we can free the ip_reass struct */ + memp_free(MEMP_REASSDATA, ipr); +} + +/** + * Chain a new pbuf into the pbuf list that composes the datagram. The pbuf list + * will grow over time as new pbufs are rx. + * Also checks that the datagram passes basic continuity checks (if the last + * fragment was received at least once). + * @param root_p points to the 'root' pbuf for the current datagram being assembled. + * @param new_p points to the pbuf for the current fragment + * @return 0 if invalid, >0 otherwise + */ +static int ICACHE_FLASH_ATTR +ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p) +{ + struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev=NULL; + struct pbuf *q; + u16_t offset,len; + struct ip_hdr *fraghdr; + int valid = 1; + + /* Extract length and fragment offset from current fragment */ + fraghdr = (struct ip_hdr*)new_p->payload; + len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; + offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; + + /* overwrite the fragment's ip header from the pbuf with our helper struct, + * and setup the embedded helper structure. */ + /* make sure the struct ip_reass_helper fits into the IP header */ + LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN", + sizeof(struct ip_reass_helper) <= IP_HLEN); + iprh = (struct ip_reass_helper*)new_p->payload; + iprh->next_pbuf = NULL; + iprh->start = offset; + iprh->end = offset + len; + + /* Iterate through until we either get to the end of the list (append), + * or we find on with a larger offset (insert). */ + for (q = ipr->p; q != NULL;) { + iprh_tmp = (struct ip_reass_helper*)q->payload; + if (iprh->start < iprh_tmp->start) { + /* the new pbuf should be inserted before this */ + iprh->next_pbuf = q; + if (iprh_prev != NULL) { + /* not the fragment with the lowest offset */ +#if IP_REASS_CHECK_OVERLAP + if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) { + /* fragment overlaps with previous or following, throw away */ + goto freepbuf; + } +#endif /* IP_REASS_CHECK_OVERLAP */ + iprh_prev->next_pbuf = new_p; + } else { + /* fragment with the lowest offset */ + ipr->p = new_p; + } + break; + } else if(iprh->start == iprh_tmp->start) { + /* received the same datagram twice: no need to keep the datagram */ + goto freepbuf; +#if IP_REASS_CHECK_OVERLAP + } else if(iprh->start < iprh_tmp->end) { + /* overlap: no need to keep the new datagram */ + goto freepbuf; +#endif /* IP_REASS_CHECK_OVERLAP */ + } else { + /* Check if the fragments received so far have no wholes. */ + if (iprh_prev != NULL) { + if (iprh_prev->end != iprh_tmp->start) { + /* There is a fragment missing between the current + * and the previous fragment */ + valid = 0; + } + } + } + q = iprh_tmp->next_pbuf; + iprh_prev = iprh_tmp; + } + + /* If q is NULL, then we made it to the end of the list. Determine what to do now */ + if (q == NULL) { + if (iprh_prev != NULL) { + /* this is (for now), the fragment with the highest offset: + * chain it to the last fragment */ +#if IP_REASS_CHECK_OVERLAP + LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start); +#endif /* IP_REASS_CHECK_OVERLAP */ + iprh_prev->next_pbuf = new_p; + if (iprh_prev->end != iprh->start) { + valid = 0; + } + } else { +#if IP_REASS_CHECK_OVERLAP + LWIP_ASSERT("no previous fragment, this must be the first fragment!", + ipr->p == NULL); +#endif /* IP_REASS_CHECK_OVERLAP */ + /* this is the first fragment we ever received for this ip datagram */ + ipr->p = new_p; + } + } + + /* At this point, the validation part begins: */ + /* If we already received the last fragment */ + if ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0) { + /* and had no wholes so far */ + if (valid) { + /* then check if the rest of the fragments is here */ + /* Check if the queue starts with the first datagram */ + if (((struct ip_reass_helper*)ipr->p->payload)->start != 0) { + valid = 0; + } else { + /* and check that there are no wholes after this datagram */ + iprh_prev = iprh; + q = iprh->next_pbuf; + while (q != NULL) { + iprh = (struct ip_reass_helper*)q->payload; + if (iprh_prev->end != iprh->start) { + valid = 0; + break; + } + iprh_prev = iprh; + q = iprh->next_pbuf; + } + /* if still valid, all fragments are received + * (because to the MF==0 already arrived */ + if (valid) { + LWIP_ASSERT("sanity check", ipr->p != NULL); + LWIP_ASSERT("sanity check", + ((struct ip_reass_helper*)ipr->p->payload) != iprh); + LWIP_ASSERT("validate_datagram:next_pbuf!=NULL", + iprh->next_pbuf == NULL); + LWIP_ASSERT("validate_datagram:datagram end!=datagram len", + iprh->end == ipr->datagram_len); + } + } + } + /* If valid is 0 here, there are some fragments missing in the middle + * (since MF == 0 has already arrived). Such datagrams simply time out if + * no more fragments are received... */ + return valid; + } + /* If we come here, not all fragments were received, yet! */ + return 0; /* not yet valid! */ +#if IP_REASS_CHECK_OVERLAP +freepbuf: + ip_reass_pbufcount -= pbuf_clen(new_p); + pbuf_free(new_p); + return 0; +#endif /* IP_REASS_CHECK_OVERLAP */ +} + +/** + * Reassembles incoming IP fragments into an IP datagram. + * + * @param p points to a pbuf chain of the fragment + * @return NULL if reassembly is incomplete, ? otherwise + */ +struct pbuf * +ip_reass(struct pbuf *p) +{ + struct pbuf *r; + struct ip_hdr *fraghdr; + struct ip_reassdata *ipr; + struct ip_reass_helper *iprh; + u16_t offset, len; + u8_t clen; + struct ip_reassdata *ipr_prev = NULL; + + IPFRAG_STATS_INC(ip_frag.recv); + snmp_inc_ipreasmreqds(); + + fraghdr = (struct ip_hdr*)p->payload; + + if ((IPH_HL(fraghdr) * 4) != IP_HLEN) { + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: IP options currently not supported!\n")); + IPFRAG_STATS_INC(ip_frag.err); + goto nullreturn; + } + + offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; + len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; + + /* Check if we are allowed to enqueue more datagrams. */ + clen = pbuf_clen(p); + if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) { +#if IP_REASS_FREE_OLDEST + if (!ip_reass_remove_oldest_datagram(fraghdr, clen) || + ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS)) +#endif /* IP_REASS_FREE_OLDEST */ + { + /* No datagram could be freed and still too many pbufs enqueued */ + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: Overflow condition: pbufct=%d, clen=%d, MAX=%d\n", + ip_reass_pbufcount, clen, IP_REASS_MAX_PBUFS)); + IPFRAG_STATS_INC(ip_frag.memerr); + /* @todo: send ICMP time exceeded here? */ + /* drop this pbuf */ + goto nullreturn; + } + } + + /* Look for the datagram the fragment belongs to in the current datagram queue, + * remembering the previous in the queue for later dequeueing. */ + for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) { + /* Check if the incoming fragment matches the one currently present + in the reassembly buffer. If so, we proceed with copying the + fragment into the buffer. */ + if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: matching previous fragment ID=%"X16_F"\n", + ntohs(IPH_ID(fraghdr)))); + IPFRAG_STATS_INC(ip_frag.cachehit); + break; + } + ipr_prev = ipr; + } + + if (ipr == NULL) { + /* Enqueue a new datagram into the datagram queue */ + ipr = ip_reass_enqueue_new_datagram(fraghdr, clen); + /* Bail if unable to enqueue */ + if(ipr == NULL) { + goto nullreturn; + } + } else { + if (((ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) && + ((ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) { + /* ipr->iphdr is not the header from the first fragment, but fraghdr is + * -> copy fraghdr into ipr->iphdr since we want to have the header + * of the first fragment (for ICMP time exceeded and later, for copying + * all options, if supported)*/ + SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN); + } + } + /* Track the current number of pbufs current 'in-flight', in order to limit + the number of fragments that may be enqueued at any one time */ + ip_reass_pbufcount += clen; + + /* At this point, we have either created a new entry or pointing + * to an existing one */ + + /* check for 'no more fragments', and update queue entry*/ + if ((IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0) { + ipr->flags |= IP_REASS_FLAG_LASTFRAG; + ipr->datagram_len = offset + len; + LWIP_DEBUGF(IP_REASS_DEBUG, + ("ip_reass: last fragment seen, total len %"S16_F"\n", + ipr->datagram_len)); + } + /* find the right place to insert this pbuf */ + /* @todo: trim pbufs if fragments are overlapping */ + if (ip_reass_chain_frag_into_datagram_and_validate(ipr, p)) { + /* the totally last fragment (flag more fragments = 0) was received at least + * once AND all fragments are received */ + ipr->datagram_len += IP_HLEN; + + /* save the second pbuf before copying the header over the pointer */ + r = ((struct ip_reass_helper*)ipr->p->payload)->next_pbuf; + + /* copy the original ip header back to the first pbuf */ + fraghdr = (struct ip_hdr*)(ipr->p->payload); + SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN); + IPH_LEN_SET(fraghdr, htons(ipr->datagram_len)); + IPH_OFFSET_SET(fraghdr, 0); + IPH_CHKSUM_SET(fraghdr, 0); + /* @todo: do we need to set calculate the correct checksum? */ + IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN)); + + p = ipr->p; + + /* chain together the pbufs contained within the reass_data list. */ + while(r != NULL) { + iprh = (struct ip_reass_helper*)r->payload; + + /* hide the ip header for every succeding fragment */ + pbuf_header(r, -IP_HLEN); + pbuf_cat(p, r); + r = iprh->next_pbuf; + } + /* release the sources allocate for the fragment queue entry */ + ip_reass_dequeue_datagram(ipr, ipr_prev); + + /* and adjust the number of pbufs currently queued for reassembly. */ + ip_reass_pbufcount -= pbuf_clen(p); + + /* Return the pbuf chain */ + return p; + } + /* the datagram is not (yet?) reassembled completely */ + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount)); + return NULL; + +nullreturn: + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: nullreturn\n")); + IPFRAG_STATS_INC(ip_frag.drop); + pbuf_free(p); + return NULL; +} +#endif /* IP_REASSEMBLY */ + +#if IP_FRAG +#if IP_FRAG_USES_STATIC_BUF +static u8_t buf[LWIP_MEM_ALIGN_SIZE(IP_FRAG_MAX_MTU + MEM_ALIGNMENT - 1)]; +#else /* IP_FRAG_USES_STATIC_BUF */ + +#if !LWIP_NETIF_TX_SINGLE_PBUF +/** Allocate a new struct pbuf_custom_ref */ +static struct pbuf_custom_ref* ICACHE_FLASH_ATTR +ip_frag_alloc_pbuf_custom_ref(void) +{ + return (struct pbuf_custom_ref*)memp_malloc(MEMP_FRAG_PBUF); +} + +/** Free a struct pbuf_custom_ref */ +static void ICACHE_FLASH_ATTR +ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref* p) +{ + LWIP_ASSERT("p != NULL", p != NULL); + memp_free(MEMP_FRAG_PBUF, p); +} + +/** Free-callback function to free a 'struct pbuf_custom_ref', called by + * pbuf_free. */ +static void ICACHE_FLASH_ATTR +ipfrag_free_pbuf_custom(struct pbuf *p) +{ + struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref*)p; + LWIP_ASSERT("pcr != NULL", pcr != NULL); + LWIP_ASSERT("pcr == p", (void*)pcr == (void*)p); + if (pcr->original != NULL) { + pbuf_free(pcr->original); + } + ip_frag_free_pbuf_custom_ref(pcr); +} +#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */ +#endif /* IP_FRAG_USES_STATIC_BUF */ + +/** + * Fragment an IP datagram if too large for the netif. + * + * Chop the datagram in MTU sized chunks and send them in order + * by using a fixed size static memory buffer (PBUF_REF) or + * point PBUF_REFs into p (depending on IP_FRAG_USES_STATIC_BUF). + * + * @param p ip packet to send + * @param netif the netif on which to send + * @param dest destination ip address to which to send + * + * @return ERR_OK if sent successfully, err_t otherwise + */ +err_t +ip_frag(struct pbuf *p, struct netif *netif, ip_addr_t *dest) +{ + struct pbuf *rambuf; +#if IP_FRAG_USES_STATIC_BUF + struct pbuf *header; +#else +#if !LWIP_NETIF_TX_SINGLE_PBUF + struct pbuf *newpbuf; +#endif + struct ip_hdr *original_iphdr; +#endif + struct ip_hdr *iphdr; + u16_t nfb; + u16_t left, cop; + u16_t mtu = netif->mtu; + u16_t ofo, omf; + u16_t last; + u16_t poff = IP_HLEN; + u16_t tmp; +#if !IP_FRAG_USES_STATIC_BUF && !LWIP_NETIF_TX_SINGLE_PBUF + u16_t newpbuflen = 0; + u16_t left_to_copy; +#endif + + /* Get a RAM based MTU sized pbuf */ +#if IP_FRAG_USES_STATIC_BUF + /* When using a static buffer, we use a PBUF_REF, which we will + * use to reference the packet (without link header). + * Layer and length is irrelevant. + */ + rambuf = pbuf_alloc(PBUF_LINK, 0, PBUF_REF); + if (rambuf == NULL) { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc(PBUF_LINK, 0, PBUF_REF) failed\n")); + return ERR_MEM; + } + rambuf->tot_len = rambuf->len = mtu; + rambuf->payload = LWIP_MEM_ALIGN((void *)buf); + + /* Copy the IP header in it */ + iphdr = (struct ip_hdr *)rambuf->payload; + SMEMCPY(iphdr, p->payload, IP_HLEN); +#else /* IP_FRAG_USES_STATIC_BUF */ + original_iphdr = (struct ip_hdr *)p->payload; + iphdr = original_iphdr; +#endif /* IP_FRAG_USES_STATIC_BUF */ + + /* Save original offset */ + tmp = ntohs(IPH_OFFSET(iphdr)); + ofo = tmp & IP_OFFMASK; + omf = tmp & IP_MF; + + left = p->tot_len - IP_HLEN; + + nfb = (mtu - IP_HLEN) / 8; + + while (left) { + last = (left <= mtu - IP_HLEN); + + /* Set new offset and MF flag */ + tmp = omf | (IP_OFFMASK & (ofo)); + if (!last) { + tmp = tmp | IP_MF; + } + + /* Fill this fragment */ + cop = last ? left : nfb * 8; + +#if IP_FRAG_USES_STATIC_BUF + poff += pbuf_copy_partial(p, (u8_t*)iphdr + IP_HLEN, cop, poff); +#else /* IP_FRAG_USES_STATIC_BUF */ +#if LWIP_NETIF_TX_SINGLE_PBUF + rambuf = pbuf_alloc(PBUF_IP, cop, PBUF_RAM); + if (rambuf == NULL) { + return ERR_MEM; + } + LWIP_ASSERT("this needs a pbuf in one piece!", + (rambuf->len == rambuf->tot_len) && (rambuf->next == NULL)); + poff += pbuf_copy_partial(p, rambuf->payload, cop, poff); + /* make room for the IP header */ + if(pbuf_header(rambuf, IP_HLEN)) { + pbuf_free(rambuf); + return ERR_MEM; + } + /* fill in the IP header */ + SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN); + iphdr = rambuf->payload; +#else /* LWIP_NETIF_TX_SINGLE_PBUF */ + /* When not using a static buffer, create a chain of pbufs. + * The first will be a PBUF_RAM holding the link and IP header. + * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged, + * but limited to the size of an mtu. + */ + rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM); + if (rambuf == NULL) { + return ERR_MEM; + } + LWIP_ASSERT("this needs a pbuf in one piece!", + (p->len >= (IP_HLEN))); + SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN); + iphdr = (struct ip_hdr *)rambuf->payload; + + /* Can just adjust p directly for needed offset. */ + p->payload = (u8_t *)p->payload + poff; + p->len -= poff; + + left_to_copy = cop; + while (left_to_copy) { + struct pbuf_custom_ref *pcr; + newpbuflen = (left_to_copy < p->len) ? left_to_copy : p->len; + /* Is this pbuf already empty? */ + if (!newpbuflen) { + p = p->next; + continue; + } + pcr = ip_frag_alloc_pbuf_custom_ref(); + if (pcr == NULL) { + pbuf_free(rambuf); + return ERR_MEM; + } + /* Mirror this pbuf, although we might not need all of it. */ + newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc, p->payload, newpbuflen); + if (newpbuf == NULL) { + ip_frag_free_pbuf_custom_ref(pcr); + pbuf_free(rambuf); + return ERR_MEM; + } + pbuf_ref(p); + pcr->original = p; + pcr->pc.custom_free_function = ipfrag_free_pbuf_custom; + + /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain + * so that it is removed when pbuf_dechain is later called on rambuf. + */ + pbuf_cat(rambuf, newpbuf); + left_to_copy -= newpbuflen; + if (left_to_copy) { + p = p->next; + } + } + poff = newpbuflen; +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ +#endif /* IP_FRAG_USES_STATIC_BUF */ + + /* Correct header */ + IPH_OFFSET_SET(iphdr, htons(tmp)); + IPH_LEN_SET(iphdr, htons(cop + IP_HLEN)); + IPH_CHKSUM_SET(iphdr, 0); + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); + +#if IP_FRAG_USES_STATIC_BUF + if (last) { + pbuf_realloc(rambuf, left + IP_HLEN); + } + + /* This part is ugly: we alloc a RAM based pbuf for + * the link level header for each chunk and then + * free it.A PBUF_ROM style pbuf for which pbuf_header + * worked would make things simpler. + */ + header = pbuf_alloc(PBUF_LINK, 0, PBUF_RAM); + if (header != NULL) { + pbuf_chain(header, rambuf); + netif->output(netif, header, dest); + IPFRAG_STATS_INC(ip_frag.xmit); + snmp_inc_ipfragcreates(); + pbuf_free(header); + } else { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc() for header failed\n")); + pbuf_free(rambuf); + return ERR_MEM; + } +#else /* IP_FRAG_USES_STATIC_BUF */ + /* No need for separate header pbuf - we allowed room for it in rambuf + * when allocated. + */ + netif->output(netif, rambuf, dest); + IPFRAG_STATS_INC(ip_frag.xmit); + + /* Unfortunately we can't reuse rambuf - the hardware may still be + * using the buffer. Instead we free it (and the ensuing chain) and + * recreate it next time round the loop. If we're lucky the hardware + * will have already sent the packet, the free will really free, and + * there will be zero memory penalty. + */ + + pbuf_free(rambuf); +#endif /* IP_FRAG_USES_STATIC_BUF */ + left -= cop; + ofo += nfb; + } +#if IP_FRAG_USES_STATIC_BUF + pbuf_free(rambuf); +#endif /* IP_FRAG_USES_STATIC_BUF */ + snmp_inc_ipfragoks(); + return ERR_OK; +} +#endif /* IP_FRAG */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/mdns.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/mdns.c new file mode 100755 index 0000000..52cd37d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/mdns.c @@ -0,0 +1,1128 @@ +/** + * lwip MDNS resolver file. + * + * Created on: Jul 29, 2010 + * Author: Daniel Toma + * + + * ported from uIP resolv.c Copyright (c) 2002-2003, Adam Dunkels. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + + * This file implements a MDNS host name and PUCK service registration. + + *----------------------------------------------------------------------------- + * Includes + *----------------------------------------------------------------------------*/ +#include "lwip/opt.h" +#if LWIP_MDNS /* don't build if not configured for use in lwipopts.h */ +#include "lwip/mdns.h" +#include "lwip/puck_def.h" +#include "lwip/udp.h" +#include "lwip/mem.h" +#include "lwip/igmp.h" +#include "osapi.h" +#include "os_type.h" +#include "user_interface.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/** DNS server IP address */ +#ifndef DNS_MULTICAST_ADDRESS +#define DNS_MULTICAST_ADDRESS ipaddr_addr("224.0.0.251") /* resolver1.opendns.com */ +#endif + +/** DNS server IP address */ +#ifndef MDNS_LOCAL +#define MDNS_LOCAL "local" /* resolver1.opendns.com */ +#endif + +/** DNS server port address */ +#ifndef DNS_MDNS_PORT +#define DNS_MDNS_PORT 5353 +#endif + +/** DNS maximum number of retries when asking for a name, before "timeout". */ +#ifndef DNS_MAX_RETRIES +#define DNS_MAX_RETRIES 4 +#endif + +/** DNS resource record max. TTL (one week as default) */ +#ifndef DNS_MAX_TTL +#define DNS_MAX_TTL 604800 +#endif + +/* DNS protocol flags */ +#define DNS_FLAG1_RESPONSE 0x84 +#define DNS_FLAG1_OPCODE_STATUS 0x10 +#define DNS_FLAG1_OPCODE_INVERSE 0x08 +#define DNS_FLAG1_OPCODE_STANDARD 0x00 +#define DNS_FLAG1_AUTHORATIVE 0x04 +#define DNS_FLAG1_TRUNC 0x02 +#define DNS_FLAG1_RD 0x01 +#define DNS_FLAG2_RA 0x80 +#define DNS_FLAG2_ERR_MASK 0x0f +#define DNS_FLAG2_ERR_NONE 0x00 +#define DNS_FLAG2_ERR_NAME 0x03 + +/* DNS protocol states */ +#define DNS_STATE_UNUSED 0 +#define DNS_STATE_NEW 1 +#define DNS_STATE_ASKING 2 +#define DNS_STATE_DONE 3 + +/* MDNS registration type */ +#define MDNS_HOSTNAME_REG 0 +#define MDNS_SERVICE_REG 1 + +/* MDNS registration type */ +#define MDNS_REG_ANSWER 1 +#define MDNS_SD_ANSWER 2 +#define MDNS_SERVICE_REG_ANSWER 3 + +/* MDNS registration time */ +#define MDNS_HOST_TIME 120 +#define MDNS_SERVICE_TIME 3600 + +/** MDNS name length with "." at the beginning and end of name*/ +#ifndef MDNS_LENGTH_ADD +#define MDNS_LENGTH_ADD 2 +#endif + +#ifdef MDNS_MAX_NAME_LENGTH +#undef MDNS_MAX_NAME_LENGTH +#endif +#define MDNS_MAX_NAME_LENGTH (256) + +PACK_STRUCT_BEGIN +/** DNS message header */ +struct mdns_hdr { + PACK_STRUCT_FIELD(u16_t id); + PACK_STRUCT_FIELD(u8_t flags1); + PACK_STRUCT_FIELD(u8_t flags2); + PACK_STRUCT_FIELD(u16_t numquestions); + PACK_STRUCT_FIELD(u16_t numanswers); + PACK_STRUCT_FIELD(u16_t numauthrr); + PACK_STRUCT_FIELD(u16_t numextrarr); +}PACK_STRUCT_STRUCT; +PACK_STRUCT_END + +#define SIZEOF_DNS_HDR 12 + +PACK_STRUCT_BEGIN +/** MDNS query message structure */ +struct mdns_query { + /* MDNS query record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */PACK_STRUCT_FIELD(u16_t type); + PACK_STRUCT_FIELD(u16_t class); +}PACK_STRUCT_STRUCT; +PACK_STRUCT_END + +#define SIZEOF_DNS_QUERY 4 + +PACK_STRUCT_BEGIN +/** MDNS answer message structure */ +struct mdns_answer { + /* MDNS answer record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */PACK_STRUCT_FIELD(u16_t type); + PACK_STRUCT_FIELD(u16_t class); + PACK_STRUCT_FIELD(u32_t ttl); + PACK_STRUCT_FIELD(u16_t len); +}PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#define SIZEOF_DNS_ANSWER 10 + +PACK_STRUCT_BEGIN +/** MDNS answer message structure */ +struct mdns_auth { + PACK_STRUCT_FIELD(u32_t src); +}PACK_STRUCT_STRUCT; +PACK_STRUCT_END + +#define SIZEOF_MDNS_AUTH 4 +PACK_STRUCT_BEGIN +/** MDNS service registration message structure */ +struct mdns_service { + PACK_STRUCT_FIELD(u16_t prior); + PACK_STRUCT_FIELD(u16_t weight); + PACK_STRUCT_FIELD(u16_t port); +}PACK_STRUCT_STRUCT; +PACK_STRUCT_END + +#define SIZEOF_MDNS_SERVICE 6 + +uint16 PUCK_PORT ; +os_timer_t mdns_timer; +/* forward declarations */ +static void mdns_recv(void *s, struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *addr, u16_t port); + +struct netif * eagle_lwip_getif(uint8 index); + +/*----------------------------------------------------------------------------- + * Globales + *----------------------------------------------------------------------------*/ + +/* MDNS variables */ +static char host_name[MDNS_NAME_LENGTH + 1]; +static char service_name[MDNS_NAME_LENGTH + 1]; +static char server_name[MDNS_NAME_LENGTH + 1]; +//static char puck_datasheet[PUCK_DATASHEET_SIZE]; +static struct udp_pcb *mdns_pcb = NULL; +static struct mdns_info * ms_info = NULL; +static struct ip_addr multicast_addr; +static struct ip_addr host_addr; +static uint8 register_flag = 0; +static uint8 mdns_flag = 0; +//#if (DNS_USES_STATIC_BUF == 1) +static u8_t mdns_payload[DNS_MSG_SIZE]; +//#endif /* (MDNS_USES_STATIC_BUF == 1) */ +/* + * Function to set the UDP pcb used to send the mDNS packages + */ +void ICACHE_FLASH_ATTR +getPcb(struct udp_pcb *pcb) { + mdns_pcb = pcb; +} + +#if DNS_DOES_NAME_CHECK +/** + * Compare the "dotted" name "query" with the encoded name "response" + * to make sure an answer from the DNS server matches the current mdns_table + * entry (otherwise, answers might arrive late for hostname not on the list + * any more). + * + * @param query hostname (not encoded) from the mdns_table + * @param response encoded hostname in the DNS response + * @return 0: names equal; 1: names differ + */ +static u8_t ICACHE_FLASH_ATTR +mdns_compare_name(unsigned char *query, unsigned char *response) { + unsigned char n; + + do { + n = *response++; + /** @see RFC 1035 - 4.1.4. Message compression */ + if ((n & 0xc0) == 0xc0) { + /* Compressed name */ + break; + } else { + /* Not compressed name */ + while (n > 0) { + if ((*query) != (*response)) { + return 1; + } + ++response; + ++query; + --n; + }; + ++query; + } + } while (*response != 0); + + return 0; +} +#endif /* DNS_DOES_NAME_CHECK */ +/** + * Send a mDNS answer packet. + * + * @param type of answer hostname and service registration or service + * @param name to query + * @param id transaction ID in the DNS query packet + * @return ERR_OK if packet is sent; an err_t indicating the problem otherwise + */ +static err_t ICACHE_FLASH_ATTR +mdns_answer(u16_t type, const char* name, u8_t id) { + err_t err; + struct mdns_hdr *hdr; + struct mdns_answer ans; + struct mdns_auth auth; + struct mdns_service serv; + struct pbuf *p ,*p_sta; + char *query, *nptr; + const char *pHostname; + struct netif * sta_netif = NULL; + struct netif * ap_netif = NULL; + static char tmpBuf[PUCK_DATASHEET_SIZE + PUCK_SERVICE_LENGTH]; + u8_t n; + u16_t length = 0; + /* if here, we have either a new query or a retry on a previous query to process */ + p = pbuf_alloc(PBUF_TRANSPORT, + SIZEOF_DNS_HDR + MDNS_MAX_NAME_LENGTH * 2 + SIZEOF_DNS_QUERY, PBUF_RAM); + if (p != NULL) { + LWIP_ASSERT("pbuf must be in one piece", p->next == NULL); + /* fill dns header */ + hdr = (struct mdns_hdr*) p->payload; + os_memset(hdr, 0, SIZEOF_DNS_HDR); + hdr->id = htons(id); + hdr->flags1 = DNS_FLAG1_RESPONSE; + + if (type == MDNS_SD_ANSWER) { + pHostname = DNS_SD_SERVICE; + hdr->numanswers = htons(1); + } else if (type == MDNS_SERVICE_REG_ANSWER) { + pHostname = PUCK_SERVICE; + hdr->numanswers = htons(type); + } else { + pHostname = name; + hdr->numanswers = htons(type); + } + query = (char*) hdr + SIZEOF_DNS_HDR; + --pHostname; + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + /* fill dns query */ + + if (type == MDNS_REG_ANSWER) { + + ans.type = htons(DNS_RRTYPE_A); + ans.class = htons(DNS_RRCLASS_IN); + ans.ttl = htonl(MDNS_SERVICE_TIME); + ans.len = htons(DNS_IP_ADDR_LEN); + length = DNS_IP_ADDR_LEN; + + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + + /* set the local IP address */ + auth.src = host_addr.addr; + MEMCPY( query, &auth, SIZEOF_MDNS_AUTH); + } + if (type == MDNS_SD_ANSWER) { + + ans.type = htons(DNS_RRTYPE_PTR); + ans.class = htons(DNS_RRCLASS_IN); + ans.ttl = htonl(300); + ans.len = htons(os_strlen(PUCK_SERVICE) + 1 +1 ); + length = 0; + + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + pHostname = PUCK_SERVICE; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + } + + if (type == MDNS_SERVICE_REG_ANSWER) { + + ans.type = htons(DNS_RRTYPE_PTR); + ans.class = htons(DNS_RRCLASS_IN); + ans.ttl = htonl(MDNS_SERVICE_TIME); + os_strcpy(tmpBuf, name); + os_strcat(tmpBuf, "."); + os_strcat(tmpBuf, PUCK_SERVICE); + + length = os_strlen(tmpBuf) + MDNS_LENGTH_ADD; + ans.len = htons(length); + length = 0; + + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + + pHostname = tmpBuf; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + + /* Service query*/ + pHostname = name; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + + /* Add to the service name the service local + * pointing to the beginning of the mDNS message*/ + *query++ = DNS_OFFSET_FLAG; + *query++ = DNS_DEFAULT_OFFSET; + + /* fill the query */ + + ans.type = htons(DNS_RRTYPE_SRV); + ans.class = htons(DNS_RRCLASS_FLUSH_IN); + ans.ttl = htonl(MDNS_SERVICE_TIME); + os_strcpy(tmpBuf, host_name); + os_strcat(tmpBuf, "."); + os_strcat(tmpBuf, MDNS_LOCAL); + length = os_strlen(tmpBuf) + MDNS_LENGTH_ADD; + ans.len = htons(SIZEOF_MDNS_SERVICE + length); + length = 0; + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + /* fill the service properties */ + + serv.prior = htons(0); + serv.weight = htons(0); + serv.port = htons(PUCK_PORT); + MEMCPY( query, &serv, SIZEOF_MDNS_SERVICE); + /* resize the query */ + query = query + SIZEOF_MDNS_SERVICE; + + pHostname = tmpBuf; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + + /* TXT answer */ + pHostname = name; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + + /* Add to the service name the service local + * pointing to the beginning of the mDNS message*/ + *query++ = DNS_OFFSET_FLAG; + *query++ = DNS_DEFAULT_OFFSET; + + /* fill the answer */ + ans.type = htons(DNS_RRTYPE_TXT); + ans.class = htons(DNS_RRCLASS_IN); + ans.ttl = htonl(MDNS_SERVICE_TIME); + length = sizeof(SERVICE_DESCRIPTION); + ans.len = htons(length); + length = 0; + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + + pHostname = SERVICE_DESCRIPTION; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + } + /* resize pbuf to the exact dns query */ + pbuf_realloc(p, (query + length) - ((char*) (p->payload))); + + /* send dns packet */ + /*add by tzx for AP + STA MDNS begin------*/ + sta_netif = (struct netif *)eagle_lwip_getif(0x00); + ap_netif = (struct netif *)eagle_lwip_getif(0x01); + if(wifi_get_opmode() == 0x03 && wifi_get_broadcast_if() == 0x03 &&\ + sta_netif != NULL && ap_netif != NULL) { + if(netif_is_up(sta_netif) && netif_is_up(ap_netif)) { + + p_sta = pbuf_alloc(PBUF_TRANSPORT, + SIZEOF_DNS_HDR + MDNS_MAX_NAME_LENGTH * 2 + SIZEOF_DNS_QUERY, PBUF_RAM); + if (pbuf_copy (p_sta,p) != ERR_OK) { + os_printf("mdns_answer copying to new pbuf failed\n"); + return -1; + } + netif_set_default(sta_netif); + err = udp_sendto(mdns_pcb, p_sta, &multicast_addr, DNS_MDNS_PORT); + pbuf_free(p_sta); + netif_set_default(ap_netif); + } + } + /*add by tzx for AP + STA MDNS end------*/ + err = udp_sendto(mdns_pcb, p, &multicast_addr, DNS_MDNS_PORT); + /* free pbuf */ + pbuf_free(p); + } else { + err = ERR_MEM; + } + + return err; +} + +/** + * Send a mDNS service answer packet. + * + * @param name service name to query + * @param id transaction ID in the DNS query packet + * @return ERR_OK if packet is sent; an err_t indicating the problem otherwise + */ +static err_t ICACHE_FLASH_ATTR +mdns_send_service(struct mdns_info *info, u8_t id) { + err_t err; + struct mdns_hdr *hdr; + struct mdns_answer ans; + struct mdns_service serv; + struct mdns_auth auth; + struct pbuf *p ,*p_sta; + char *query, *nptr; + const char *pHostname; + char *device_info; + const char *name = info->host_name; + u8_t n; + u8_t i = 0; + u16_t length = 0; + u8_t addr1 = 12, addr2 = 12; + struct netif * sta_netif = NULL; + struct netif * ap_netif = NULL; + static char tmpBuf[PUCK_DATASHEET_SIZE + PUCK_SERVICE_LENGTH]; + /* if here, we have either a new query or a retry on a previous query to process */ + p = pbuf_alloc(PBUF_TRANSPORT, + SIZEOF_DNS_HDR + MDNS_MAX_NAME_LENGTH * 2 + SIZEOF_DNS_QUERY, PBUF_RAM); + if (p != NULL) { + LWIP_ASSERT("pbuf must be in one piece", p->next == NULL); + /* fill dns header */ + hdr = (struct mdns_hdr*) p->payload; + os_memset(hdr, 0, SIZEOF_DNS_HDR); + hdr->id = htons(id); + hdr->flags1 = DNS_FLAG1_RESPONSE; + hdr->numanswers = htons(4); + query = (char*) hdr + SIZEOF_DNS_HDR; + os_strcpy(tmpBuf, PUCK_SERVICE); + + pHostname = tmpBuf; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + ++addr1; + ++addr2; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++addr1; + ++addr2; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + length = sizeof(MDNS_LOCAL); + addr1 -= length; + length = os_strlen(PUCK_SERVICE) + 1; + addr2 -= length; + + ans.type = htons(DNS_RRTYPE_PTR); + ans.class = htons(DNS_RRCLASS_IN); + ans.ttl = htonl(300); + os_strcpy(tmpBuf, name); + length = os_strlen(tmpBuf) + MDNS_LENGTH_ADD + 1; + ans.len = htons(length); + length = 0; + + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + + pHostname = tmpBuf; + --pHostname; + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = DNS_OFFSET_FLAG; + *query++ = DNS_DEFAULT_OFFSET; + pHostname = name; + --pHostname; + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + //*query++ = '\0'; + *query++ = DNS_OFFSET_FLAG; + *query++ = DNS_DEFAULT_OFFSET; + + /* fill the answer */ + ans.type = htons(DNS_RRTYPE_TXT); + ans.class = htons(DNS_RRCLASS_FLUSH_IN); + ans.ttl = htonl(300); +// length = os_strlen(TXT_DATA) + MDNS_LENGTH_ADD + 1; + device_info = (char *)os_zalloc(50); + ets_sprintf(device_info,"vendor = %s","Espressif"); + for(i = 0; i < 10 &&(info->txt_data[i] != NULL);i++) { + length += os_strlen(info->txt_data[i]); + length++; + } + length += os_strlen(device_info)+ 1 ; + ans.len = htons(length); + length = 0; + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + query = query + SIZEOF_DNS_ANSWER; + pHostname = device_info; + --pHostname; + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + i = 0; + while(info->txt_data[i] != NULL && i < 10) { + pHostname = info->txt_data[i]; + --pHostname; + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + i++; + } +// *query++ = '\0'; + os_free(device_info); + os_strcpy(tmpBuf, name); + pHostname = tmpBuf; + --pHostname; + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + + *query++ = DNS_OFFSET_FLAG; + *query++ = DNS_DEFAULT_OFFSET; + + ans.type = htons(DNS_RRTYPE_SRV); + ans.class = htons(DNS_RRCLASS_FLUSH_IN); + ans.ttl = htonl(300); + os_strcpy(tmpBuf,service_name); + os_strcat(tmpBuf, "."); + os_strcat(tmpBuf, MDNS_LOCAL); + length = os_strlen(tmpBuf) + MDNS_LENGTH_ADD; + ans.len = htons(SIZEOF_MDNS_SERVICE + length); + length = 0; + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + + serv.prior = htons(0); + serv.weight = htons(0); + serv.port = htons(PUCK_PORT); + MEMCPY( query, &serv, SIZEOF_MDNS_SERVICE); + /* resize the query */ + query = query + SIZEOF_MDNS_SERVICE; + + pHostname = tmpBuf; + --pHostname; + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + /* set the name of the authority field. + * The same name as the Query using the offset address*/ + os_strcpy(tmpBuf,service_name); + os_strcat(tmpBuf, "."); + os_strcat(tmpBuf, MDNS_LOCAL); + pHostname = tmpBuf; + --pHostname; + do { + ++pHostname; + nptr = query; + ++query; + for (n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while (*pHostname != 0); + *query++ = '\0'; + /* set the name of the authority field. + * The same name as the Query using the offset address*/ + //*query++ = DNS_OFFSET_FLAG; + //*query++ = DNS_DEFAULT_OFFSET; + ans.type = htons(DNS_RRTYPE_A); + ans.class = htons(DNS_RRCLASS_FLUSH_IN); + ans.ttl = htonl(300); + ans.len = htons(DNS_IP_ADDR_LEN); + + MEMCPY( query, &ans, SIZEOF_DNS_ANSWER); + + /* resize the query */ + query = query + SIZEOF_DNS_ANSWER; + + /* fill the payload of the mDNS message */ + /* set the local IP address */ + auth.src = host_addr.addr; //ipAddr; + MEMCPY( query, &auth, SIZEOF_MDNS_AUTH); + /* resize the query */ + query = query + SIZEOF_MDNS_AUTH; + + /* set the name of the authority field. + * The same name as the Query using the offset address*/ + + /* resize pbuf to the exact dns query */ + pbuf_realloc(p, (query) - ((char*) (p->payload))); + /* send dns packet */ + sta_netif = (struct netif *)eagle_lwip_getif(0x00); + ap_netif = (struct netif *)eagle_lwip_getif(0x01); + if(wifi_get_opmode() == 0x03 && wifi_get_broadcast_if() == 0x03 &&\ + sta_netif != NULL && ap_netif != NULL) { + if(netif_is_up(sta_netif) && netif_is_up(ap_netif)) { + + p_sta = pbuf_alloc(PBUF_TRANSPORT, + SIZEOF_DNS_HDR + MDNS_MAX_NAME_LENGTH * 2 + SIZEOF_DNS_QUERY, PBUF_RAM); + if (pbuf_copy (p_sta,p) != ERR_OK) { + os_printf("mdns_send_service copying to new pbuf failed\n"); + return -1; + } + netif_set_default(sta_netif); + err = udp_sendto(mdns_pcb, p_sta, &multicast_addr, DNS_MDNS_PORT); + pbuf_free(p_sta); + netif_set_default(ap_netif); + } + } + err = udp_sendto(mdns_pcb, p, &multicast_addr, DNS_MDNS_PORT); + + /* free pbuf */ + pbuf_free(p); + } else { + os_printf("ERR_MEM \n"); + err = ERR_MEM; + } + + return err; +} + +/** + * Receive input function for DNS response packets arriving for the dns UDP pcb. + * + * @params see udp.h + */ +static void ICACHE_FLASH_ATTR +mdns_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, + u16_t port) { + u8_t i; + struct mdns_hdr *hdr; + u8_t nquestions; + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); + struct mdns_info *info = (struct mdns_info *)arg; + /* is the dns message too big ? */ + if (p->tot_len > DNS_MSG_SIZE) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too big\n")); + /* free pbuf and return */ + goto memerr1; + } + + /* is the dns message big enough ? */ + if (p->tot_len < (SIZEOF_DNS_HDR + SIZEOF_DNS_QUERY + SIZEOF_DNS_ANSWER)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too small\n")); + /* free pbuf and return */ + goto memerr1; + } + /* copy dns payload inside static buffer for processing */ + if (pbuf_copy_partial(p, mdns_payload, p->tot_len, 0) == p->tot_len) { + /* The ID in the DNS header should be our entry into the name table. */ + hdr = (struct mdns_hdr*) mdns_payload; + + i = htons(hdr->id); + if (i < DNS_TABLE_SIZE) { + + nquestions = htons(hdr->numquestions); + //nanswers = htons(hdr->numanswers); + /* if we have a question send an answer if necessary */ + if (nquestions > 0) { + /* MDNS_DS_DOES_NAME_CHECK */ + /* Check if the name in the "question" part match with the name of the MDNS DS service. */ + if (mdns_compare_name((unsigned char *) DNS_SD_SERVICE, + (unsigned char *) mdns_payload + SIZEOF_DNS_HDR) == 0) { + /* respond with the puck service*/ + mdns_answer(MDNS_SD_ANSWER, PUCK_SERVICE, 0); + } else if (mdns_compare_name((unsigned char *) PUCK_SERVICE, + (unsigned char *) mdns_payload + SIZEOF_DNS_HDR) == 0) { + /* respond with the puck service*/ + mdns_send_service(info, 0); + } else + goto memerr2; + } + } + } + goto memerr2; + memerr2: + os_memset(mdns_payload , 0 ,DNS_MSG_SIZE); + memerr1: + /* free pbuf */ + pbuf_free(p); + return; +} + +/** + * close the UDP pcb . + */ +void ICACHE_FLASH_ATTR +mdns_close(void) +{ + uint8 text_index = 0; + if (mdns_pcb != NULL && ms_info != NULL) { + udp_remove(mdns_pcb); + for(text_index = 0;text_index < 10;text_index++) { + if(ms_info->txt_data[text_index] != NULL) { + os_free(ms_info->txt_data[text_index]); + ms_info->txt_data[text_index] = NULL; + } + } + if (ms_info->host_name != NULL) { + os_free(ms_info->host_name); + ms_info->host_name = NULL; + } + if (ms_info->server_name != NULL) { + os_free(ms_info->server_name); + ms_info->server_name = NULL; + } + os_free(ms_info); + mdns_pcb = NULL; + ms_info = NULL; + } +} + +void ICACHE_FLASH_ATTR +mdns_set_name(const char *name) +{ + os_strncpy(service_name, name ? name : "Espressif", MDNS_NAME_LENGTH); +} + +void ICACHE_FLASH_ATTR +mdns_enable(void) +{ + if(mdns_flag == 0) { + udp_recv(mdns_pcb, mdns_recv, NULL); + } +} + +void ICACHE_FLASH_ATTR +mdns_disable(void) +{ + if (mdns_flag == 1) { + udp_recv(mdns_pcb, NULL, NULL); + } +} + +/** + * close the UDP pcb . + */ +char* ICACHE_FLASH_ATTR +mdns_get_hostname(void) { + //strcpy(host_name, name); + char *name = host_name; + if (host_name[0] != 0 ) { + return name; + } else { + return ("Espressif"); + } +} + +void ICACHE_FLASH_ATTR +mdns_set_hostname(char *name) { + os_strncpy(host_name, name ? name : "Espressif", MDNS_NAME_LENGTH); +} + +void ICACHE_FLASH_ATTR +mdns_set_servername(const char *name) { + if (MDNS_NAME_LENGTH > os_strlen("._tcp.local") + 1) { + os_snprintf(server_name, MDNS_NAME_LENGTH - os_strlen("._tcp.local") - 1, "_%s._tcp.local", name ? name : "Espressif"); + PUCK_SERVICE = server_name; + } else { + os_printf("Please check MDNS_NAME_LENGTH\r\n"); + } +} + +char* ICACHE_FLASH_ATTR +mdns_get_servername(void) { + char *name = PUCK_SERVICE; + if (name == NULL) { + PUCK_SERVICE = "_Espressif._tcp._local"; + } + return name; +} + +void ICACHE_FLASH_ATTR +mdns_server_unregister(void) { + struct ip_addr ap_host_addr; + struct ip_info ipconfig; + if(register_flag == 1){ + if (igmp_leavegroup(&host_addr, &multicast_addr) != ERR_OK) { + os_printf("sta udp_leave_multigrup failed!\n"); + return; + }; + if(wifi_get_opmode() == 0x03 || wifi_get_opmode() == 0x02) { + wifi_get_ip_info(SOFTAP_IF, &ipconfig); + ap_host_addr.addr = ipconfig.ip.addr; + if (igmp_leavegroup(&ap_host_addr, &multicast_addr) != ERR_OK) { + os_printf("ap udp_join_multigrup failed!\n"); + return; + }; + } + register_flag = 0; + } +} + +void ICACHE_FLASH_ATTR +mdns_server_register(void) { + + if (register_flag == 1) { + os_printf("mdns server is already registered !\n"); + return; + } else if (igmp_joingroup(&host_addr, &multicast_addr) != ERR_OK) { + os_printf("udp_join_multigrup failed!\n"); + return; + }; + register_flag = 1; +} + +void ICACHE_FLASH_ATTR +mdns_reg(struct mdns_info *info) { + + static uint8 i = 0; + if (i <= 3) { + mdns_send_service(info,0); + i++; + } else { + os_timer_disarm(&mdns_timer); + } +} + +/** + * Initialize the resolver: set up the UDP pcb and configure the default server + * (NEW IP). + */ +void ICACHE_FLASH_ATTR +mdns_init(struct mdns_info *info) { + /* initialize default DNS server address */ + multicast_addr.addr = DNS_MULTICAST_ADDRESS; + struct ip_addr ap_host_addr; + struct ip_info ipconfig; + uint8 text_index = 0; + ms_info = (struct mdns_info *)os_zalloc(sizeof(struct mdns_info)); + if (ms_info != NULL) { + os_memcpy(ms_info,info,sizeof(struct mdns_info)); + ms_info->host_name = (char *)os_zalloc(os_strlen(info->host_name)+1); + os_memcpy(ms_info->host_name,info->host_name,os_strlen(info->host_name)); + ms_info->server_name = (char *)os_zalloc(os_strlen(info->server_name)+1); + os_memcpy(ms_info->server_name,info->server_name,os_strlen(info->server_name)); + for(text_index = 0;text_index < 10;text_index++) { + if(info->txt_data[text_index] != NULL) { + ms_info->txt_data[text_index] = (char *)os_zalloc(os_strlen(info->txt_data[text_index])+1); + os_memcpy(ms_info->txt_data[text_index],info->txt_data[text_index],os_strlen(info->txt_data[text_index])); + } else { + break; + } + + } + + } else { + os_printf("ms_info alloc failed\n"); + return; + } + if (ms_info->ipAddr == 0) { + os_printf("mdns ip error!\n "); + return; + } + host_addr.addr = ms_info->ipAddr ; + LWIP_DEBUGF(DNS_DEBUG, ("dns_init: initializing\n")); + //get the datasheet from PUCK + mdns_set_hostname(ms_info->host_name); + mdns_set_servername(ms_info->server_name); + mdns_set_name(ms_info->host_name); + + // get the host name as instrumentName_serialNumber for MDNS + // set the name of the service, the same as host name + os_printf("host_name = %s\n", host_name); + os_printf("server_name = %s\n", PUCK_SERVICE); + if (ms_info->server_port == 0) + { + PUCK_PORT = 80; + } else { + PUCK_PORT = ms_info->server_port; + } + + /* initialize mDNS */ + mdns_pcb = udp_new(); + + if (mdns_pcb != NULL) { + /* join to the multicast address 224.0.0.251 */ + if(wifi_get_opmode() == 0x03 || wifi_get_opmode() == 0x01) { + if (igmp_joingroup(&host_addr, &multicast_addr) != ERR_OK) { + os_printf("sta udp_join_multigrup failed!\n"); + return; + }; + } + if(wifi_get_opmode() == 0x03 || wifi_get_opmode() == 0x02) { + wifi_get_ip_info(SOFTAP_IF, &ipconfig); + ap_host_addr.addr = ipconfig.ip.addr; + if (igmp_joingroup(&ap_host_addr, &multicast_addr) != ERR_OK) { + os_printf("ap udp_join_multigrup failed!\n"); + return; + }; + } + register_flag = 1; + /* join to any IP address at the port 5353 */ + if (udp_bind(mdns_pcb, IP_ADDR_ANY, DNS_MDNS_PORT) != ERR_OK) { + os_printf("udp_bind failed!\n"); + return; + }; + + /*loopback function for the multicast(224.0.0.251) messages received at port 5353*/ +// mdns_enable(); + udp_recv(mdns_pcb, mdns_recv, ms_info); + mdns_flag = 1; + /* + * Register the name of the instrument + */ + + os_timer_disarm(&mdns_timer); + os_timer_setfn(&mdns_timer, (os_timer_func_t *)mdns_reg,ms_info); + os_timer_arm(&mdns_timer, 1000, 1); + } +} + +#endif /* LWIP_MDNS */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/mem.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/mem.c new file mode 100755 index 0000000..bf6263d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/mem.c @@ -0,0 +1,644 @@ +/** + * @file + * Dynamic memory manager + * + * This is a lightweight replacement for the standard C library malloc(). + * + * If you want to use the standard C library malloc() instead, define + * MEM_LIBC_MALLOC to 1 in your lwipopts.h + * + * To let mem_malloc() use pools (prevents fragmentation and is much faster than + * a heap but might waste some memory), define MEM_USE_POOLS to 1, define + * MEM_USE_CUSTOM_POOLS to 1 and create a file "lwippools.h" that includes a list + * of pools like this (more pools can be added between _START and _END): + * + * Define three pools with sizes 256, 512, and 1512 bytes + * LWIP_MALLOC_MEMPOOL_START + * LWIP_MALLOC_MEMPOOL(20, 256) + * LWIP_MALLOC_MEMPOOL(10, 512) + * LWIP_MALLOC_MEMPOOL(5, 1512) + * LWIP_MALLOC_MEMPOOL_END + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * Simon Goldschmidt + * + */ + +#include "lwip/opt.h" + +#if !MEM_LIBC_MALLOC /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/sys.h" +#include "lwip/stats.h" +#include "lwip/err.h" + +#include + +#if MEM_USE_POOLS +/* lwIP head implemented with different sized pools */ + +/** + * Allocate memory: determine the smallest pool that is big enough + * to contain an element of 'size' and get an element from that pool. + * + * @param size the size in bytes of the memory needed + * @return a pointer to the allocated memory or NULL if the pool is empty + */ +void * +mem_malloc(mem_size_t size) +{ + struct memp_malloc_helper *element; + memp_t poolnr; + mem_size_t required_size = size + sizeof(struct memp_malloc_helper); + + for (poolnr = MEMP_POOL_FIRST; poolnr <= MEMP_POOL_LAST; poolnr = (memp_t)(poolnr + 1)) { +#if MEM_USE_POOLS_TRY_BIGGER_POOL +again: +#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */ + /* is this pool big enough to hold an element of the required size + plus a struct memp_malloc_helper that saves the pool this element came from? */ + if (required_size <= memp_sizes[poolnr]) { + break; + } + } + if (poolnr > MEMP_POOL_LAST) { + LWIP_ASSERT("mem_malloc(): no pool is that big!", 0); + return NULL; + } + element = (struct memp_malloc_helper*)memp_malloc(poolnr); + if (element == NULL) { + /* No need to DEBUGF or ASSERT: This error is already + taken care of in memp.c */ +#if MEM_USE_POOLS_TRY_BIGGER_POOL + /** Try a bigger pool if this one is empty! */ + if (poolnr < MEMP_POOL_LAST) { + poolnr++; + goto again; + } +#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */ + return NULL; + } + + /* save the pool number this element came from */ + element->poolnr = poolnr; + /* and return a pointer to the memory directly after the struct memp_malloc_helper */ + element++; + + return element; +} + +/** + * Free memory previously allocated by mem_malloc. Loads the pool number + * and calls memp_free with that pool number to put the element back into + * its pool + * + * @param rmem the memory element to free + */ +void +mem_free(void *rmem) +{ + struct memp_malloc_helper *hmem = (struct memp_malloc_helper*)rmem; + + LWIP_ASSERT("rmem != NULL", (rmem != NULL)); + LWIP_ASSERT("rmem == MEM_ALIGN(rmem)", (rmem == LWIP_MEM_ALIGN(rmem))); + + /* get the original struct memp_malloc_helper */ + hmem--; + + LWIP_ASSERT("hmem != NULL", (hmem != NULL)); + LWIP_ASSERT("hmem == MEM_ALIGN(hmem)", (hmem == LWIP_MEM_ALIGN(hmem))); + LWIP_ASSERT("hmem->poolnr < MEMP_MAX", (hmem->poolnr < MEMP_MAX)); + + /* and put it in the pool we saved earlier */ + memp_free(hmem->poolnr, hmem); +} + +#else /* MEM_USE_POOLS */ +/* lwIP replacement for your libc malloc() */ + +/** + * The heap is made up as a list of structs of this type. + * This does not have to be aligned since for getting its size, + * we only use the macro SIZEOF_STRUCT_MEM, which automatically alignes. + */ +struct mem { + /** index (-> ram[next]) of the next struct */ + mem_size_t next; + /** index (-> ram[prev]) of the previous struct */ + mem_size_t prev; + /** 1: this area is used; 0: this area is unused */ + u8_t used; + u8_t pad[3]; /* XXX: pad here instead use global ALIGN */ +} __ATTRIB_PACK; + +/** All allocated blocks will be MIN_SIZE bytes big, at least! + * MIN_SIZE can be overridden to suit your needs. Smaller values save space, + * larger values could prevent too small blocks to fragment the RAM too much. */ +#ifndef MIN_SIZE +#define MIN_SIZE 12 +#endif /* MIN_SIZE */ +/* some alignment macros: we define them here for better source code layout */ +#define MIN_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MIN_SIZE) +#define SIZEOF_STRUCT_MEM LWIP_MEM_ALIGN_SIZE(sizeof(struct mem)) +#define MEM_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEM_SIZE) + +/** If you want to relocate the heap to external memory, simply define + * LWIP_RAM_HEAP_POINTER as a void-pointer to that location. + * If so, make sure the memory at that location is big enough (see below on + * how that space is calculated). */ +#ifndef LWIP_RAM_HEAP_POINTER +/** the heap. we need one struct mem at the end and some room for alignment */ +/* enlarge heap as tx pbuf payload is allocate from heap as well */ +u8_t ram_heap[MEM_SIZE_ALIGNED + (2*SIZEOF_STRUCT_MEM) + MEM_ALIGNMENT] SHMEM_ATTR; +#define LWIP_RAM_HEAP_POINTER ram_heap +#endif /* LWIP_RAM_HEAP_POINTER */ + +/** pointer to the heap (ram_heap): for alignment, ram is now a pointer instead of an array */ +static u8_t *ram; +/** the last entry, always unused! */ +static struct mem *ram_end; +/** pointer to the lowest free block, this is used for faster search */ +static struct mem *lfree; + +/** concurrent access protection */ +//static sys_mutex_t mem_mutex; + +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + +static volatile u8_t mem_free_count; + +/* Allow mem_free from other (e.g. interrupt) context */ +#define LWIP_MEM_FREE_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_free) +#define LWIP_MEM_FREE_PROTECT() SYS_ARCH_PROTECT(lev_free) +#define LWIP_MEM_FREE_UNPROTECT() SYS_ARCH_UNPROTECT(lev_free) +#define LWIP_MEM_ALLOC_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_alloc) +#define LWIP_MEM_ALLOC_PROTECT() SYS_ARCH_PROTECT(lev_alloc) +#define LWIP_MEM_ALLOC_UNPROTECT() SYS_ARCH_UNPROTECT(lev_alloc) + +#else /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + +/* Protect the heap only by using a semaphore */ +#define LWIP_MEM_FREE_DECL_PROTECT() +#define LWIP_MEM_FREE_PROTECT() sys_mutex_lock(&mem_mutex) +#define LWIP_MEM_FREE_UNPROTECT() sys_mutex_unlock(&mem_mutex) +/* mem_malloc is protected using semaphore AND LWIP_MEM_ALLOC_PROTECT */ +#define LWIP_MEM_ALLOC_DECL_PROTECT() +#define LWIP_MEM_ALLOC_PROTECT() +#define LWIP_MEM_ALLOC_UNPROTECT() + +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + +/** + * "Plug holes" by combining adjacent empty struct mems. + * After this function is through, there should not exist + * one empty struct mem pointing to another empty struct mem. + * + * @param mem this points to a struct mem which just has been freed + * @internal this function is only called by mem_free() and mem_trim() + * + * This assumes access to the heap is protected by the calling function + * already. + */ +static void ICACHE_FLASH_ATTR +plug_holes(struct mem *mem) +{ + struct mem *nmem; + struct mem *pmem; + + LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); + LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end); + LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0); + + /* plug hole forward */ + LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED); + + nmem = (struct mem *)(void *)&ram[mem->next]; + if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) { + /* if mem->next is unused and not end of ram, combine mem and mem->next */ + if (lfree == nmem) { + lfree = mem; + } + mem->next = nmem->next; + ((struct mem *)(void *)&ram[nmem->next])->prev = (mem_size_t)((u8_t *)mem - ram); + } + + /* plug hole backward */ + pmem = (struct mem *)(void *)&ram[mem->prev]; + if (pmem != mem && pmem->used == 0) { + /* if mem->prev is unused, combine mem and mem->prev */ + if (lfree == mem) { + lfree = pmem; + } + pmem->next = mem->next; + ((struct mem *)(void *)&ram[mem->next])->prev = (mem_size_t)((u8_t *)pmem - ram); + } +} + +/** + * Zero the heap and initialize start, end and lowest-free + */ +void +mem_init(void) +{ + struct mem *mem; + + LWIP_ASSERT("Sanity check alignment", + (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT-1)) == 0); + + /* align the heap */ + ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER); + /* initialize the start of the heap */ + mem = (struct mem *)(void *)ram; + mem->next = MEM_SIZE_ALIGNED; + mem->prev = 0; + mem->used = 0; + /* initialize the end of the heap */ + ram_end = (struct mem *)(void *)&ram[MEM_SIZE_ALIGNED]; + ram_end->used = 1; + ram_end->next = MEM_SIZE_ALIGNED; + ram_end->prev = MEM_SIZE_ALIGNED; + + /* initialize the lowest-free pointer to the start of the heap */ + lfree = (struct mem *)(void *)ram; + + MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED); + + if(sys_mutex_new(&mem_mutex) != ERR_OK) { + LWIP_ASSERT("failed to create mem_mutex", 0); + } +} + +/** + * Put a struct mem back on the heap + * + * @param rmem is the data portion of a struct mem as returned by a previous + * call to mem_malloc() + */ +void +mem_free(void *rmem) +{ + struct mem *mem; + LWIP_MEM_FREE_DECL_PROTECT(); + + if (rmem == NULL) { + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n")); + return; + } + LWIP_ASSERT("mem_free: sanity check alignment", (((mem_ptr_t)rmem) & (MEM_ALIGNMENT-1)) == 0); + + LWIP_ASSERT("mem_free: legal memory", (u8_t *)rmem >= (u8_t *)ram && + (u8_t *)rmem < (u8_t *)ram_end); + + if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { + SYS_ARCH_DECL_PROTECT(lev); + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n")); + /* protect mem stats from concurrent access */ + SYS_ARCH_PROTECT(lev); + MEM_STATS_INC(illegal); + SYS_ARCH_UNPROTECT(lev); + return; + } + /* protect the heap from concurrent access */ + LWIP_MEM_FREE_PROTECT(); + /* Get the corresponding struct mem ... */ + mem = (struct mem *)(void *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); + /* ... which has to be in a used state ... */ + LWIP_ASSERT("mem_free: mem->used", mem->used); + /* ... and is now unused. */ + mem->used = 0; + + if (mem < lfree) { + /* the newly freed struct is now the lowest */ + lfree = mem; + } + + MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram))); + + /* finally, see if prev or next are free also */ + plug_holes(mem); +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 1; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_FREE_UNPROTECT(); +} + +/** + * Shrink memory returned by mem_malloc(). + * + * @param rmem pointer to memory allocated by mem_malloc the is to be shrinked + * @param newsize required size after shrinking (needs to be smaller than or + * equal to the previous size) + * @return for compatibility reasons: is always == rmem, at the moment + * or NULL if newsize is > old size, in which case rmem is NOT touched + * or freed! + */ +void * +mem_trim(void *rmem, mem_size_t newsize) +{ + mem_size_t size; + mem_size_t ptr, ptr2; + struct mem *mem, *mem2; + /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */ + LWIP_MEM_FREE_DECL_PROTECT(); + + /* Expand the size of the allocated memory region so that we can + adjust for alignment. */ + newsize = LWIP_MEM_ALIGN_SIZE(newsize); + + if(newsize < MIN_SIZE_ALIGNED) { + /* every data block must be at least MIN_SIZE_ALIGNED long */ + newsize = MIN_SIZE_ALIGNED; + } + + if (newsize > MEM_SIZE_ALIGNED) { + return NULL; + } + + LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram && + (u8_t *)rmem < (u8_t *)ram_end); + + if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { + SYS_ARCH_DECL_PROTECT(lev); + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n")); + /* protect mem stats from concurrent access */ + SYS_ARCH_PROTECT(lev); + MEM_STATS_INC(illegal); + SYS_ARCH_UNPROTECT(lev); + return rmem; + } + /* Get the corresponding struct mem ... */ + mem = (struct mem *)(void *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); + /* ... and its offset pointer */ + ptr = (mem_size_t)((u8_t *)mem - ram); + + size = mem->next - ptr - SIZEOF_STRUCT_MEM; + LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size); + if (newsize > size) { + /* not supported */ + return NULL; + } + if (newsize == size) { + /* No change in size, simply return */ + return rmem; + } + + /* protect the heap from concurrent access */ + LWIP_MEM_FREE_PROTECT(); + + mem2 = (struct mem *)(void *)&ram[mem->next]; + if(mem2->used == 0) { + /* The next struct is unused, we can simply move it at little */ + mem_size_t next; + /* remember the old next pointer */ + next = mem2->next; + /* create new struct mem which is moved directly after the shrinked mem */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; + if (lfree == mem2) { + lfree = (struct mem *)(void *)&ram[ptr2]; + } + mem2 = (struct mem *)(void *)&ram[ptr2]; + mem2->used = 0; + /* restore the next pointer */ + mem2->next = next; + /* link it back to mem */ + mem2->prev = ptr; + /* link mem to it */ + mem->next = ptr2; + /* last thing to restore linked list: as we have moved mem2, + * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not + * the end of the heap */ + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)(void *)&ram[mem2->next])->prev = ptr2; + } + MEM_STATS_DEC_USED(used, (size - newsize)); + /* no need to plug holes, we've already done that */ + } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) { + /* Next struct is used but there's room for another struct mem with + * at least MIN_SIZE_ALIGNED of data. + * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem + * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED'). + * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty + * region that couldn't hold data, but when mem->next gets freed, + * the 2 regions would be combined, resulting in more free memory */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; + mem2 = (struct mem *)(void *)&ram[ptr2]; + if (mem2 < lfree) { + lfree = mem2; + } + mem2->used = 0; + mem2->next = mem->next; + mem2->prev = ptr; + mem->next = ptr2; + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)(void *)&ram[mem2->next])->prev = ptr2; + } + MEM_STATS_DEC_USED(used, (size - newsize)); + /* the original mem->next is used, so no need to plug holes! */ + } + /* else { + next struct mem is used but size between mem and mem2 is not big enough + to create another struct mem + -> don't do anyhting. + -> the remaining space stays unused since it is too small + } */ +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 1; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_FREE_UNPROTECT(); + return rmem; +} + +/** + * Adam's mem_malloc() plus solution for bug #17922 + * Allocate a block of memory with a minimum of 'size' bytes. + * + * @param size is the minimum size of the requested block in bytes. + * @return pointer to allocated memory or NULL if no free memory was found. + * + * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT). + */ +void * +mem_malloc(mem_size_t size) +{ + mem_size_t ptr, ptr2; + struct mem *mem, *mem2; +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + u8_t local_mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_ALLOC_DECL_PROTECT(); + + if (size == 0) { + return NULL; + } + + /* Expand the size of the allocated memory region so that we can + adjust for alignment. */ + size = LWIP_MEM_ALIGN_SIZE(size); + + if(size < MIN_SIZE_ALIGNED) { + /* every data block must be at least MIN_SIZE_ALIGNED long */ + size = MIN_SIZE_ALIGNED; + } + + if (size > MEM_SIZE_ALIGNED) { + return NULL; + } + + /* protect the heap from concurrent access */ + sys_mutex_lock(&mem_mutex); + LWIP_MEM_ALLOC_PROTECT(); +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + /* run as long as a mem_free disturbed mem_malloc */ + do { + local_mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + /* Scan through the heap searching for a free block that is big enough, + * beginning with the lowest free block. + */ + for (ptr = (mem_size_t)((u8_t *)lfree - ram); ptr < MEM_SIZE_ALIGNED - size; + ptr = ((struct mem *)(void *)&ram[ptr])->next) { + mem = (struct mem *)(void *)&ram[ptr]; +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 0; + LWIP_MEM_ALLOC_UNPROTECT(); + /* allow mem_free to run */ + LWIP_MEM_ALLOC_PROTECT(); + if (mem_free_count != 0) { + local_mem_free_count = mem_free_count; + } + mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + if ((!mem->used) && + (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) { + /* mem is not used and at least perfect fit is possible: + * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */ + + if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) { + /* (in addition to the above, we test if another struct mem (SIZEOF_STRUCT_MEM) containing + * at least MIN_SIZE_ALIGNED of data also fits in the 'user data space' of 'mem') + * -> split large block, create empty remainder, + * remainder must be large enough to contain MIN_SIZE_ALIGNED data: if + * mem->next - (ptr + (2*SIZEOF_STRUCT_MEM)) == size, + * struct mem would fit in but no data between mem2 and mem2->next + * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty + * region that couldn't hold data, but when mem->next gets freed, + * the 2 regions would be combined, resulting in more free memory + */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + size; + /* create mem2 struct */ + mem2 = (struct mem *)(void *)&ram[ptr2]; + mem2->used = 0; + mem2->next = mem->next; + mem2->prev = ptr; + /* and insert it between mem and mem->next */ + mem->next = ptr2; + mem->used = 1; + + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)(void *)&ram[mem2->next])->prev = ptr2; + } + MEM_STATS_INC_USED(used, (size + SIZEOF_STRUCT_MEM)); + } else { + /* (a mem2 struct does no fit into the user data space of mem and mem->next will always + * be used at this point: if not we have 2 unused structs in a row, plug_holes should have + * take care of this). + * -> near fit or excact fit: do not split, no mem2 creation + * also can't move mem->next directly behind mem, since mem->next + * will always be used at this point! + */ + mem->used = 1; + MEM_STATS_INC_USED(used, mem->next - (mem_size_t)((u8_t *)mem - ram)); + } + + if (mem == lfree) { + /* Find next free block after mem and update lowest free pointer */ + while (lfree->used && lfree != ram_end) { + LWIP_MEM_ALLOC_UNPROTECT(); + /* prevent high interrupt latency... */ + LWIP_MEM_ALLOC_PROTECT(); + lfree = (struct mem *)(void *)&ram[lfree->next]; + } + LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used))); + } + LWIP_MEM_ALLOC_UNPROTECT(); + sys_mutex_unlock(&mem_mutex); + LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.", + (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end); + LWIP_ASSERT("mem_malloc: allocated memory properly aligned.", + ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0); + LWIP_ASSERT("mem_malloc: sanity check alignment", + (((mem_ptr_t)mem) & (MEM_ALIGNMENT-1)) == 0); + + return (u8_t *)mem + SIZEOF_STRUCT_MEM; + } + } +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + /* if we got interrupted by a mem_free, try again */ + } while(local_mem_free_count != 0); +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size)); + MEM_STATS_INC(err); + LWIP_MEM_ALLOC_UNPROTECT(); + sys_mutex_unlock(&mem_mutex); + return NULL; +} + +#endif /* MEM_USE_POOLS */ +/** + * Contiguously allocates enough space for count objects that are size bytes + * of memory each and returns a pointer to the allocated memory. + * + * The allocated memory is filled with bytes of value zero. + * + * @param count number of objects to allocate + * @param size size of the objects to allocate + * @return pointer to allocated memory / NULL pointer if there is an error + */ +void *mem_calloc(mem_size_t count, mem_size_t size) +{ + void *p; + + /* allocate 'count' objects of size 'size' */ + p = mem_malloc(count * size); + if (p) { + /* zero the memory */ + os_memset(p, 0, count * size); + } + return p; +} + +#endif /* !MEM_LIBC_MALLOC */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/memp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/memp.c new file mode 100755 index 0000000..38bdd1b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/memp.c @@ -0,0 +1,490 @@ +/** + * @file + * Dynamic pool memory manager + * + * lwIP has dedicated pools for many structures (netconn, protocol control blocks, + * packet buffers, ...). All these pools are managed here. + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/udp.h" +#include "lwip/raw.h" +#include "lwip/tcp_impl.h" +#include "lwip/igmp.h" +#include "lwip/api.h" +#include "lwip/api_msg.h" +#include "lwip/tcpip.h" +#include "lwip/sys.h" +#include "lwip/timers.h" +#include "lwip/stats.h" +#include "netif/etharp.h" +#include "lwip/ip_frag.h" +#include "lwip/snmp_structs.h" +#include "lwip/snmp_msg.h" +#include "lwip/dns.h" +#include "netif/ppp_oe.h" + +#include + +#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */ + +struct memp { + struct memp *next; +#if MEMP_OVERFLOW_CHECK + const char *file; + int line; +#endif /* MEMP_OVERFLOW_CHECK */ +}; + +#if MEMP_OVERFLOW_CHECK +/* if MEMP_OVERFLOW_CHECK is turned on, we reserve some bytes at the beginning + * and at the end of each element, initialize them as 0xcd and check + * them later. */ +/* If MEMP_OVERFLOW_CHECK is >= 2, on every call to memp_malloc or memp_free, + * every single element in each pool is checked! + * This is VERY SLOW but also very helpful. */ +/* MEMP_SANITY_REGION_BEFORE and MEMP_SANITY_REGION_AFTER can be overridden in + * lwipopts.h to change the amount reserved for checking. */ +#ifndef MEMP_SANITY_REGION_BEFORE +#define MEMP_SANITY_REGION_BEFORE 16 +#endif /* MEMP_SANITY_REGION_BEFORE*/ +#if MEMP_SANITY_REGION_BEFORE > 0 +#define MEMP_SANITY_REGION_BEFORE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_BEFORE) +#else +#define MEMP_SANITY_REGION_BEFORE_ALIGNED 0 +#endif /* MEMP_SANITY_REGION_BEFORE*/ +#ifndef MEMP_SANITY_REGION_AFTER +#define MEMP_SANITY_REGION_AFTER 16 +#endif /* MEMP_SANITY_REGION_AFTER*/ +#if MEMP_SANITY_REGION_AFTER > 0 +#define MEMP_SANITY_REGION_AFTER_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_AFTER) +#else +#define MEMP_SANITY_REGION_AFTER_ALIGNED 0 +#endif /* MEMP_SANITY_REGION_AFTER*/ + +/* MEMP_SIZE: save space for struct memp and for sanity check */ +#define MEMP_SIZE (LWIP_MEM_ALIGN_SIZE(sizeof(struct memp)) + MEMP_SANITY_REGION_BEFORE_ALIGNED) +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x) + MEMP_SANITY_REGION_AFTER_ALIGNED) + +#else /* MEMP_OVERFLOW_CHECK */ + +/* No sanity checks + * We don't need to preserve the struct memp while not allocated, so we + * can save a little space and set MEMP_SIZE to 0. + */ +#define MEMP_SIZE 0 +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x)) + +#endif /* MEMP_OVERFLOW_CHECK */ + +/** This array holds the first free element of each pool. + * Elements form a linked list. */ +static struct memp *memp_tab[MEMP_MAX]; + +#else /* MEMP_MEM_MALLOC */ + +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x)) + +#endif /* MEMP_MEM_MALLOC */ + +/** This array holds the element sizes of each pool. */ +#if !MEM_USE_POOLS && !MEMP_MEM_MALLOC +static +#endif +const u32_t memp_sizes[MEMP_MAX] ICACHE_RODATA_ATTR = { //LWIP_MEM_ALIGN_SIZE +#define LWIP_MEMPOOL(name,num,size,desc,attr) LWIP_MEM_ALIGN_SIZE(size), +#include "lwip/memp_std.h" +}; + +u16_t memp_sizes_test[1] = {PBUF_POOL_BUFSIZE,}; + +#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */ + +/** This array holds the number of elements in each pool. */ +static const u16_t memp_num[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc,attr) (num), +#include "lwip/memp_std.h" +}; + +/** This array holds a textual description of each pool. */ +//#ifdef LWIP_DEBUG +//static const char *memp_desc[MEMP_MAX] = { +const char *memp_desc[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc,attr) (desc), +#include "lwip/memp_std.h" +}; +//#endif /* LWIP_DEBUG */ + +#if MEMP_SEPARATE_POOLS + +/** This creates each memory pool. These are named memp_memory_XXX_base (where + * XXX is the name of the pool defined in memp_std.h). + * To relocate a pool, declare it as extern in cc.h. Example for GCC: + * extern u8_t __attribute__((section(".onchip_mem"))) memp_memory_UDP_PCB_base[]; + */ +#define LWIP_MEMPOOL(name,num,size,desc,attr) u8_t memp_memory_ ## name ## _base \ + [((num) * (MEMP_SIZE + MEMP_ALIGN_SIZE(size)))] attr; +#include "lwip/memp_std.h" + +/** This array holds the base of each memory pool. */ +static u8_t *const memp_bases[] = { +#define LWIP_MEMPOOL(name,num,size,desc,attr) memp_memory_ ## name ## _base, +#include "lwip/memp_std.h" +}; + +#else /* MEMP_SEPARATE_POOLS */ + +/** This is the actual memory used by the pools (all pools in one big block). */ +static u8_t memp_memory[MEM_ALIGNMENT - 1 +#define LWIP_MEMPOOL(name,num,size,desc, attr) + ( (num) * (MEMP_SIZE + MEMP_ALIGN_SIZE(size) ) ) +#include "lwip/memp_std.h" +]; + +#endif /* MEMP_SEPARATE_POOLS */ + +#if MEMP_SANITY_CHECK +/** + * Check that memp-lists don't form a circle, modify by ives at 2014.4.23. + */ +static int ICACHE_FLASH_ATTR +memp_sanity(void) +{ + s16_t i; + struct memp *t, *h; + + for (i = 0; i < MEMP_MAX; i++) { + t = memp_tab[i]; + if(t != NULL) { + for (h = t->next; (t != NULL) && (h != NULL); t = t->next, + h = (((h->next != NULL) && (h->next->next != NULL)) ? h->next->next : NULL)) { + if (t == h) { + return 0; + } + } + } + } + return 1; +} +#endif /* MEMP_SANITY_CHECK*/ +#if MEMP_OVERFLOW_CHECK +#if defined(LWIP_DEBUG) && MEMP_STATS +static const char * memp_overflow_names[] = { +#define LWIP_MEMPOOL(name,num,size,desc,attr) "/"desc, +#include "lwip/memp_std.h" + }; +#endif + +/** + * Check if a memp element was victim of an overflow + * (e.g. the restricted area after it has been altered) + * + * @param p the memp element to check + * @param memp_type the pool p comes from + */ +static void ICACHE_FLASH_ATTR +memp_overflow_check_element_overflow(struct memp *p, u16_t memp_type) +{ + u16_t k; + u8_t *m; +#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE + memp_sizes[memp_type]; + for (k = 0; k < MEMP_SANITY_REGION_AFTER_ALIGNED; k++) { + if (m[k] != 0xcd) { + char errstr[128] = "detected memp overflow in pool "; + char digit[] = "0"; + if(memp_type >= 10) { + digit[0] = '0' + (memp_type/10); + strcat(errstr, digit); + } + digit[0] = '0' + (memp_type%10); + strcat(errstr, digit); +#if defined(LWIP_DEBUG) && MEMP_STATS + strcat(errstr, memp_overflow_names[memp_type]); +#endif + LWIP_ASSERT(errstr, 0); + } + } +#endif +} + +/** + * Check if a memp element was victim of an underflow + * (e.g. the restricted area before it has been altered) + * + * @param p the memp element to check + * @param memp_type the pool p comes from + */ +static void ICACHE_FLASH_ATTR +memp_overflow_check_element_underflow(struct memp *p, u16_t memp_type) +{ + u16_t k; + u8_t *m; +#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED; + for (k = 0; k < MEMP_SANITY_REGION_BEFORE_ALIGNED; k++) { + if (m[k] != 0xcd) { + char errstr[128] = "detected memp underflow in pool "; + char digit[] = "0"; + if(memp_type >= 10) { + digit[0] = '0' + (memp_type/10); + strcat(errstr, digit); + } + digit[0] = '0' + (memp_type%10); + strcat(errstr, digit); +#if defined(LWIP_DEBUG) && MEMP_STATS + strcat(errstr, memp_overflow_names[memp_type]); +#endif + LWIP_ASSERT(errstr, 0); + } + } +#endif +} + +/** + * Do an overflow check for all elements in every pool. + * + * @see memp_overflow_check_element for a description of the check + */ +static void ICACHE_FLASH_ATTR +memp_overflow_check_all(void) +{ + u16_t i, j; + struct memp *p; + + p = (struct memp *)LWIP_MEM_ALIGN(memp_memory); + for (i = 0; i < MEMP_MAX; ++i) { + p = p; + for (j = 0; j < memp_num[i]; ++j) { + memp_overflow_check_element_overflow(p, i); + p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED); + } + } + p = (struct memp *)LWIP_MEM_ALIGN(memp_memory); + for (i = 0; i < MEMP_MAX; ++i) { + p = p; + for (j = 0; j < memp_num[i]; ++j) { + memp_overflow_check_element_underflow(p, i); + p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED); + } + } +} + +/** + * Initialize the restricted areas of all memp elements in every pool. + */ +static void ICACHE_FLASH_ATTR +memp_overflow_init(void) +{ + u16_t i, j; + struct memp *p; + u8_t *m; + + p = (struct memp *)LWIP_MEM_ALIGN(memp_memory); + for (i = 0; i < MEMP_MAX; ++i) { + p = p; + for (j = 0; j < memp_num[i]; ++j) { +#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED; + os_memset(m, 0xcd, MEMP_SANITY_REGION_BEFORE_ALIGNED); +#endif +#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE + memp_sizes[i]; + os_memset(m, 0xcd, MEMP_SANITY_REGION_AFTER_ALIGNED); +#endif + p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED); + } + } +} +#endif /* MEMP_OVERFLOW_CHECK */ + +/** + * Initialize this module. + * + * Carves out memp_memory into linked lists for each pool-type. + */ +void +memp_init(void) +{ + struct memp *memp; + u16_t i, j; + + for (i = 0; i < MEMP_MAX; ++i) { + MEMP_STATS_AVAIL(used, i, 0); + MEMP_STATS_AVAIL(max, i, 0); + MEMP_STATS_AVAIL(err, i, 0); + MEMP_STATS_AVAIL(avail, i, memp_num[i]); + } + +#if !MEMP_SEPARATE_POOLS + memp = (struct memp *)LWIP_MEM_ALIGN(memp_memory); +#endif /* !MEMP_SEPARATE_POOLS */ + /* for every pool: */ + for (i = 0; i < MEMP_MAX; ++i) { + memp_tab[i] = NULL; +#if MEMP_SEPARATE_POOLS + memp = (struct memp*)memp_bases[i]; +#endif /* MEMP_SEPARATE_POOLS */ + /* create a linked list of memp elements */ + for (j = 0; j < memp_num[i]; ++j) { + memp->next = (struct memp *)memp_tab[i]; + memp_tab[i] = memp; + memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + memp_sizes[i] +#if MEMP_OVERFLOW_CHECK + + MEMP_SANITY_REGION_AFTER_ALIGNED +#endif + ); + } + } +#if MEMP_OVERFLOW_CHECK + memp_overflow_init(); + /* check everything a first time to see if it worked */ + memp_overflow_check_all(); +#endif /* MEMP_OVERFLOW_CHECK */ +} + +/** + * Get an element from a specific pool. + * + * @param type the pool to get an element from + * + * the debug version has two more parameters: + * @param file file name calling this function + * @param line number of line where this function is called + * + * @return a pointer to the allocated memory or a NULL pointer on error + */ +void * +#if !MEMP_OVERFLOW_CHECK +memp_malloc(memp_t type) +#else +memp_malloc_fn(memp_t type, const char* file, const int line) +#endif +{ + struct memp *memp; + SYS_ARCH_DECL_PROTECT(old_level); + + LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;); + + SYS_ARCH_PROTECT(old_level); +#if MEMP_OVERFLOW_CHECK >= 2 + memp_overflow_check_all(); +#endif /* MEMP_OVERFLOW_CHECK >= 2 */ + + memp = memp_tab[type]; + + if (memp != NULL) { + memp_tab[type] = memp->next; +#if MEMP_OVERFLOW_CHECK + memp->next = NULL; + memp->file = file; + memp->line = line; +#endif /* MEMP_OVERFLOW_CHECK */ + MEMP_STATS_INC_USED(used, type); + LWIP_ASSERT("memp_malloc: memp properly aligned", + ((mem_ptr_t)memp % MEM_ALIGNMENT) == 0); + memp = (struct memp*)(void *)((u8_t*)memp + MEMP_SIZE); + } else { + LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", memp_desc[type])); + MEMP_STATS_INC(err, type); + } + + SYS_ARCH_UNPROTECT(old_level); + + return memp; +} + +/** + * Put an element back into its pool. + * + * @param type the pool where to put mem + * @param mem the memp element to free + */ +void +memp_free(memp_t type, void *mem) +{ + struct memp *memp; + SYS_ARCH_DECL_PROTECT(old_level); + + if (mem == NULL) { + return; + } + LWIP_ASSERT("memp_free: mem properly aligned", + ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0); + + memp = (struct memp *)(void *)((u8_t*)mem - MEMP_SIZE); + + SYS_ARCH_PROTECT(old_level); +#if MEMP_OVERFLOW_CHECK +#if MEMP_OVERFLOW_CHECK >= 2 + memp_overflow_check_all(); +#else + memp_overflow_check_element_overflow(memp, type); + memp_overflow_check_element_underflow(memp, type); +#endif /* MEMP_OVERFLOW_CHECK >= 2 */ +#endif /* MEMP_OVERFLOW_CHECK */ + + MEMP_STATS_DEC(used, type); + + memp->next = memp_tab[type]; + memp_tab[type] = memp; + +#if MEMP_SANITY_CHECK + LWIP_ASSERT("memp sanity", memp_sanity()); +#endif /* MEMP_SANITY_CHECK */ + + SYS_ARCH_UNPROTECT(old_level); +} + +#endif /* MEMP_MEM_MALLOC */ +#if 0 +void memp_dump(void) +{ + printf("sizeof raw_pcb %u, memp_s1 %u, %s\n", sizeof(struct raw_pcb), memp_sizes[0], memp_desc[0]); + printf("sizeof udp_pcb %u, memp_s2 %u, %s\n", sizeof(struct udp_pcb), memp_sizes[1], memp_desc[1]); + printf("sizeof tcp_pcb %u, memp_s3 %u, %s\n", sizeof(struct tcp_pcb), memp_sizes[2], memp_desc[2]); + printf("sizeof tcp_pcb_listen %u, memp_s4 %u, %s\n", sizeof(struct tcp_pcb_listen), memp_sizes[3], memp_desc[3]); + printf("sizeof tcp_seg %u, memp_s5 %u, %s\n", sizeof(struct tcp_seg), memp_sizes[4], memp_desc[4]); + printf("sizeof sys_timeo %u, memp_s6 %u, %s\n", sizeof(struct sys_timeo), memp_sizes[5], memp_desc[5]); + printf("sizeof pbuf %u, memp_s7 %u, %s\n", sizeof(struct pbuf), memp_sizes[6], memp_desc[6]); + printf("align pbuf size %u, memp_s8 %u, %s\n", (PBUF_POOL_BUFSIZE), memp_sizes[7], memp_desc[7]); + printf("TCP_MSS %d PBUF_LINK_HLEN %d ETH_PAD_SIZE %d\n", TCP_MSS, PBUF_LINK_HLEN, ETH_PAD_SIZE); + printf("TCP_MSS + PBUF_LINK_HLEN + ETH_PAD_SIZE %d \n", TCP_MSS+PBUF_LINK_HLEN+ETH_PAD_SIZE+40); + printf("test size %u\n",memp_sizes_test[0]); + printf("sizeof memp_memory_PBUF_pool %u \n", sizeof(memp_memory_PBUF_POOL_base)); +} +#endif //0000 diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/netif.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/netif.c new file mode 100755 index 0000000..cb6b6a8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/netif.c @@ -0,0 +1,762 @@ +/** + * @file + * lwIP network interface abstraction + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/tcp_impl.h" +#include "lwip/snmp.h" +#include "lwip/igmp.h" +#include "netif/etharp.h" +#include "lwip/stats.h" +#if ENABLE_LOOPBACK +#include "lwip/sys.h" +#if LWIP_NETIF_LOOPBACK_MULTITHREADING +#include "lwip/tcpip.h" +#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ + +#if LWIP_AUTOIP +#include "lwip/autoip.h" +#endif /* LWIP_AUTOIP */ +#if LWIP_DHCP +#include "lwip/dhcp.h" +#endif /* LWIP_DHCP */ + +#if LWIP_NETIF_STATUS_CALLBACK +#define NETIF_STATUS_CALLBACK(n) do{ if (n->status_callback) { (n->status_callback)(n); }}while(0) +#else +#define NETIF_STATUS_CALLBACK(n) +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +#if LWIP_NETIF_LINK_CALLBACK +#define NETIF_LINK_CALLBACK(n) do{ if (n->link_callback) { (n->link_callback)(n); }}while(0) +#else +#define NETIF_LINK_CALLBACK(n) +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +struct netif *netif_list; +struct netif *netif_default; + +#if LWIP_HAVE_LOOPIF +static struct netif loop_netif; + +/** + * Initialize a lwip network interface structure for a loopback interface + * + * @param netif the lwip network interface structure for this loopif + * @return ERR_OK if the loopif is initialized + * ERR_MEM if private data couldn't be allocated + */ + static err_t ICACHE_FLASH_ATTR +netif_loopif_init(struct netif *netif) +{ + /* initialize the snmp variables and counters inside the struct netif + * ifSpeed: no assumption can be made! + */ + NETIF_INIT_SNMP(netif, snmp_ifType_softwareLoopback, 0); + + netif->name[0] = 'l'; + netif->name[1] = 'o'; + netif->output = netif_loop_output; + return ERR_OK; +} +#endif /* LWIP_HAVE_LOOPIF */ + +void +netif_init(void) +{ +#if LWIP_HAVE_LOOPIF + ip_addr_t loop_ipaddr, loop_netmask, loop_gw; + IP4_ADDR(&loop_gw, 127,0,0,1); + IP4_ADDR(&loop_ipaddr, 127,0,0,1); + IP4_ADDR(&loop_netmask, 255,0,0,0); + +#if NO_SYS + netif_add(&loop_netif, &loop_ipaddr, &loop_netmask, &loop_gw, NULL, netif_loopif_init, ip_input); +#else /* NO_SYS */ + netif_add(&loop_netif, &loop_ipaddr, &loop_netmask, &loop_gw, NULL, netif_loopif_init, tcpip_input); +#endif /* NO_SYS */ + netif_set_up(&loop_netif); + +#endif /* LWIP_HAVE_LOOPIF */ +} + +/** + * Add a network interface to the list of lwIP netifs. + * + * @param netif a pre-allocated netif structure + * @param ipaddr IP address for the new netif + * @param netmask network mask for the new netif + * @param gw default gateway IP address for the new netif + * @param state opaque data passed to the new netif + * @param init callback function that initializes the interface + * @param input callback function that is called to pass + * ingress packets up in the protocol layer stack. + * + * @return netif, or NULL if failed. + */ +struct netif * +netif_add(struct netif *netif, ip_addr_t *ipaddr, ip_addr_t *netmask, + ip_addr_t *gw, void *state, netif_init_fn init, netif_input_fn input) +{ + static u8_t netifnum = 0; + + LWIP_ASSERT("No init function given", init != NULL); + + /* reset new interface configuration state */ + ip_addr_set_zero(&netif->ip_addr); + ip_addr_set_zero(&netif->netmask); + ip_addr_set_zero(&netif->gw); + netif->flags = 0; +#if LWIP_DHCP + /* netif not under DHCP control by default */ + netif->dhcp = NULL; + netif->dhcps_pcb = NULL; +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + /* netif not under AutoIP control by default */ + netif->autoip = NULL; +#endif /* LWIP_AUTOIP */ +#if LWIP_NETIF_STATUS_CALLBACK + netif->status_callback = NULL; +#endif /* LWIP_NETIF_STATUS_CALLBACK */ +#if LWIP_NETIF_LINK_CALLBACK + netif->link_callback = NULL; +#endif /* LWIP_NETIF_LINK_CALLBACK */ +#if LWIP_IGMP + netif->igmp_mac_filter = NULL; +#endif /* LWIP_IGMP */ +#if ENABLE_LOOPBACK + netif->loop_first = NULL; + netif->loop_last = NULL; +#endif /* ENABLE_LOOPBACK */ + + /* remember netif specific state information data */ + netif->state = state; + netif->num = netifnum++; + netif->input = input; +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ +#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS + netif->loop_cnt_current = 0; +#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */ + + netif_set_addr(netif, ipaddr, netmask, gw); + + /* call user specified initialization function for netif */ + if (init(netif) != ERR_OK) { + return NULL; + } + + /* add this netif to the list */ + netif->next = netif_list; + netif_list = netif; + snmp_inc_iflist(); + +#if LWIP_IGMP + /* start IGMP processing */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_start(netif); + } +#endif /* LWIP_IGMP */ + + LWIP_DEBUGF(NETIF_DEBUG, ("netif: added interface %c%c IP addr ", + netif->name[0], netif->name[1])); + ip_addr_debug_print(NETIF_DEBUG, ipaddr); + LWIP_DEBUGF(NETIF_DEBUG, (" netmask ")); + ip_addr_debug_print(NETIF_DEBUG, netmask); + LWIP_DEBUGF(NETIF_DEBUG, (" gw ")); + ip_addr_debug_print(NETIF_DEBUG, gw); + LWIP_DEBUGF(NETIF_DEBUG, ("\n")); + return netif; +} + +/** + * Change IP address configuration for a network interface (including netmask + * and default gateway). + * + * @param netif the network interface to change + * @param ipaddr the new IP address + * @param netmask the new netmask + * @param gw the new default gateway + */ +void +netif_set_addr(struct netif *netif, ip_addr_t *ipaddr, ip_addr_t *netmask, + ip_addr_t *gw) +{ + netif_set_ipaddr(netif, ipaddr); + netif_set_netmask(netif, netmask); + netif_set_gw(netif, gw); +} + +/** + * Remove a network interface from the list of lwIP netifs. + * + * @param netif the network interface to remove + */ +void +netif_remove(struct netif *netif) +{ + if (netif == NULL) { + return; + } + +#if LWIP_IGMP + /* stop IGMP processing */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_stop(netif); + } +#endif /* LWIP_IGMP */ + if (netif_is_up(netif)) { + /* set netif down before removing (call callback function) */ + netif_set_down(netif); + } + + snmp_delete_ipaddridx_tree(netif); + + /* is it the first netif? */ + if (netif_list == netif) { + netif_list = netif->next; + } else { + /* look for netif further down the list */ + struct netif * tmpNetif; + for (tmpNetif = netif_list; tmpNetif != NULL; tmpNetif = tmpNetif->next) { + if (tmpNetif->next == netif) { + tmpNetif->next = netif->next; + break; + } + } + if (tmpNetif == NULL) + return; /* we didn't find any netif today */ + } + snmp_dec_iflist(); + /* this netif is default? */ + if (netif_default == netif) { + /* reset default netif */ + netif_set_default(NULL); + } + LWIP_DEBUGF( NETIF_DEBUG, ("netif_remove: removed netif\n") ); +} + +/** + * Find a network interface by searching for its name + * + * @param name the name of the netif (like netif->name) plus concatenated number + * in ascii representation (e.g. 'en0') + */ +struct netif * +netif_find(char *name) +{ + struct netif *netif; + u8_t num; + + if (name == NULL) { + return NULL; + } + + num = name[2] - '0'; + + for(netif = netif_list; netif != NULL; netif = netif->next) { + if (num == netif->num && + name[0] == netif->name[0] && + name[1] == netif->name[1]) { + LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: found %c%c\n", name[0], name[1])); + return netif; + } + } + LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: didn't find %c%c\n", name[0], name[1])); + return NULL; +} + +/** + * Change the IP address of a network interface + * + * @param netif the network interface to change + * @param ipaddr the new IP address + * + * @note call netif_set_addr() if you also want to change netmask and + * default gateway + */ +void +netif_set_ipaddr(struct netif *netif, ip_addr_t *ipaddr) +{ + /* TODO: Handling of obsolete pcbs */ + /* See: http://mail.gnu.org/archive/html/lwip-users/2003-03/msg00118.html */ +#if LWIP_TCP + struct tcp_pcb *pcb; + struct tcp_pcb_listen *lpcb; + + /* address is actually being changed? */ + if (ipaddr && (ip_addr_cmp(ipaddr, &(netif->ip_addr))) == 0) { + /* extern struct tcp_pcb *tcp_active_pcbs; defined by tcp.h */ + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n")); + pcb = tcp_active_pcbs; + while (pcb != NULL) { + /* PCB bound to current local interface address? */ + if (ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr)) +#if LWIP_AUTOIP + /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */ + && !ip_addr_islinklocal(&(pcb->local_ip)) +#endif /* LWIP_AUTOIP */ + ) { + /* this connection must be aborted */ + struct tcp_pcb *next = pcb->next; + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb)); + tcp_abort(pcb); + pcb = next; + } else { + pcb = pcb->next; + } + } + for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + /* PCB bound to current local interface address? */ + if ((!(ip_addr_isany(&(lpcb->local_ip)))) && + (ip_addr_cmp(&(lpcb->local_ip), &(netif->ip_addr)))) { + /* The PCB is listening to the old ipaddr and + * is set to listen to the new one instead */ + ip_addr_set(&(lpcb->local_ip), ipaddr); + } + } + } +#endif + snmp_delete_ipaddridx_tree(netif); + snmp_delete_iprteidx_tree(0,netif); + /* set new IP address to netif */ + ip_addr_set(&(netif->ip_addr), ipaddr); + snmp_insert_ipaddridx_tree(netif); + snmp_insert_iprteidx_tree(0,netif); + + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: IP address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1_16(&netif->ip_addr), + ip4_addr2_16(&netif->ip_addr), + ip4_addr3_16(&netif->ip_addr), + ip4_addr4_16(&netif->ip_addr))); +} + +/** + * Change the default gateway for a network interface + * + * @param netif the network interface to change + * @param gw the new default gateway + * + * @note call netif_set_addr() if you also want to change ip address and netmask + */ +void +netif_set_gw(struct netif *netif, ip_addr_t *gw) +{ + ip_addr_set(&(netif->gw), gw); + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: GW address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1_16(&netif->gw), + ip4_addr2_16(&netif->gw), + ip4_addr3_16(&netif->gw), + ip4_addr4_16(&netif->gw))); +} + +/** + * Change the netmask of a network interface + * + * @param netif the network interface to change + * @param netmask the new netmask + * + * @note call netif_set_addr() if you also want to change ip address and + * default gateway + */ +void +netif_set_netmask(struct netif *netif, ip_addr_t *netmask) +{ + snmp_delete_iprteidx_tree(0, netif); + /* set new netmask to netif */ + ip_addr_set(&(netif->netmask), netmask); + snmp_insert_iprteidx_tree(0, netif); + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: netmask of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1_16(&netif->netmask), + ip4_addr2_16(&netif->netmask), + ip4_addr3_16(&netif->netmask), + ip4_addr4_16(&netif->netmask))); +} + +/** + * Set a network interface as the default network interface + * (used to output all packets for which no specific route is found) + * + * @param netif the default network interface + */ +void +netif_set_default(struct netif *netif) +{ + if (netif == NULL) { + /* remove default route */ + snmp_delete_iprteidx_tree(1, netif); + } else { + /* install default route */ + snmp_insert_iprteidx_tree(1, netif); + } + netif_default = netif; + LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n", + netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\'')); +} + +/** + * Bring an interface up, available for processing + * traffic. + * + * @note: Enabling DHCP on a down interface will make it come + * up once configured. + * + * @see dhcp_start() + */ +void netif_set_up(struct netif *netif) +{ + if (!(netif->flags & NETIF_FLAG_UP)) { + netif->flags |= NETIF_FLAG_UP; + +#if LWIP_SNMP + snmp_get_sysuptime(&netif->ts); +#endif /* LWIP_SNMP */ + + NETIF_STATUS_CALLBACK(netif); + + if (netif->flags & NETIF_FLAG_LINK_UP) { +#if LWIP_ARP + /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ + if (netif->flags & (NETIF_FLAG_ETHARP)) { + etharp_gratuitous(netif); + } +#endif /* LWIP_ARP */ + +#if LWIP_IGMP + /* resend IGMP memberships */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_report_groups( netif); + } +#endif /* LWIP_IGMP */ + } + } +} + +/** + * Bring an interface down, disabling any traffic processing. + * + * @note: Enabling DHCP on a down interface will make it come + * up once configured. + * + * @see dhcp_start() + */ +void netif_set_down(struct netif *netif) +{ + if (netif == NULL) { + return; + } + + if (netif->flags & NETIF_FLAG_UP) { + netif->flags &= ~NETIF_FLAG_UP; +#if LWIP_SNMP + snmp_get_sysuptime(&netif->ts); +#endif + +#if LWIP_ARP + if (netif->flags & NETIF_FLAG_ETHARP) { + etharp_cleanup_netif(netif); + } +#endif /* LWIP_ARP */ + NETIF_STATUS_CALLBACK(netif); + } +} + +#if LWIP_NETIF_STATUS_CALLBACK +/** + * Set callback to be called when interface is brought up/down + */ +void netif_set_status_callback(struct netif *netif, netif_status_callback_fn status_callback) +{ + if (netif) { + netif->status_callback = status_callback; + } +} +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +/** + * Called by a driver when its link goes up + */ +void netif_set_link_up(struct netif *netif ) +{ + if (!(netif->flags & NETIF_FLAG_LINK_UP)) { + netif->flags |= NETIF_FLAG_LINK_UP; + +#if LWIP_DHCP + if (netif->dhcp) { + dhcp_network_changed(netif); + } +#endif /* LWIP_DHCP */ + +#if LWIP_AUTOIP + if (netif->autoip) { + autoip_network_changed(netif); + } +#endif /* LWIP_AUTOIP */ + + if (netif->flags & NETIF_FLAG_UP) { +#if LWIP_ARP + /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ + if (netif->flags & NETIF_FLAG_ETHARP) { + etharp_gratuitous(netif); + } +#endif /* LWIP_ARP */ + +#if LWIP_IGMP + /* resend IGMP memberships */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_report_groups( netif); + } +#endif /* LWIP_IGMP */ + } + NETIF_LINK_CALLBACK(netif); + } +} + +/** + * Called by a driver when its link goes down + */ +void netif_set_link_down(struct netif *netif ) +{ + if (netif->flags & NETIF_FLAG_LINK_UP) { + netif->flags &= ~NETIF_FLAG_LINK_UP; + NETIF_LINK_CALLBACK(netif); + } +} + +#if LWIP_NETIF_LINK_CALLBACK +/** + * Set callback to be called when link is brought up/down + */ +void netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback) +{ + if (netif) { + netif->link_callback = link_callback; + } +} +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +#if ENABLE_LOOPBACK +/** + * Send an IP packet to be received on the same netif (loopif-like). + * The pbuf is simply copied and handed back to netif->input. + * In multithreaded mode, this is done directly since netif->input must put + * the packet on a queue. + * In callback mode, the packet is put on an internal queue and is fed to + * netif->input by netif_poll(). + * + * @param netif the lwip network interface structure + * @param p the (IP) packet to 'send' + * @param ipaddr the ip address to send the packet to (not used) + * @return ERR_OK if the packet has been sent + * ERR_MEM if the pbuf used to copy the packet couldn't be allocated + */ +err_t +netif_loop_output(struct netif *netif, struct pbuf *p, + ip_addr_t *ipaddr) +{ + struct pbuf *r; + err_t err; + struct pbuf *last; +#if LWIP_LOOPBACK_MAX_PBUFS + u8_t clen = 0; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + /* If we have a loopif, SNMP counters are adjusted for it, + * if not they are adjusted for 'netif'. */ +#if LWIP_SNMP +#if LWIP_HAVE_LOOPIF + struct netif *stats_if = &loop_netif; +#else /* LWIP_HAVE_LOOPIF */ + struct netif *stats_if = netif; +#endif /* LWIP_HAVE_LOOPIF */ +#endif /* LWIP_SNMP */ + SYS_ARCH_DECL_PROTECT(lev); + LWIP_UNUSED_ARG(ipaddr); + + /* Allocate a new pbuf */ + r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM); + if (r == NULL) { + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.drop); + snmp_inc_ifoutdiscards(stats_if); + return ERR_MEM; + } +#if LWIP_LOOPBACK_MAX_PBUFS + clen = pbuf_clen(r); + /* check for overflow or too many pbuf on queue */ + if(((netif->loop_cnt_current + clen) < netif->loop_cnt_current) || + ((netif->loop_cnt_current + clen) > LWIP_LOOPBACK_MAX_PBUFS)) { + pbuf_free(r); + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.drop); + snmp_inc_ifoutdiscards(stats_if); + return ERR_MEM; + } + netif->loop_cnt_current += clen; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + + /* Copy the whole pbuf queue p into the single pbuf r */ + if ((err = pbuf_copy(r, p)) != ERR_OK) { + pbuf_free(r); + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.drop); + snmp_inc_ifoutdiscards(stats_if); + return err; + } + + /* Put the packet on a linked list which gets emptied through calling + netif_poll(). */ + + /* let last point to the last pbuf in chain r */ + for (last = r; last->next != NULL; last = last->next); + + SYS_ARCH_PROTECT(lev); + if(netif->loop_first != NULL) { + LWIP_ASSERT("if first != NULL, last must also be != NULL", netif->loop_last != NULL); + netif->loop_last->next = r; + netif->loop_last = last; + } else { + netif->loop_first = r; + netif->loop_last = last; + } + SYS_ARCH_UNPROTECT(lev); + + LINK_STATS_INC(link.xmit); + snmp_add_ifoutoctets(stats_if, p->tot_len); + snmp_inc_ifoutucastpkts(stats_if); + +#if LWIP_NETIF_LOOPBACK_MULTITHREADING + /* For multithreading environment, schedule a call to netif_poll */ + tcpip_callback((tcpip_callback_fn)netif_poll, netif); +#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */ + + return ERR_OK; +} + +/** + * Call netif_poll() in the main loop of your application. This is to prevent + * reentering non-reentrant functions like tcp_input(). Packets passed to + * netif_loop_output() are put on a list that is passed to netif->input() by + * netif_poll(). + */ +void +netif_poll(struct netif *netif) +{ + struct pbuf *in; + /* If we have a loopif, SNMP counters are adjusted for it, + * if not they are adjusted for 'netif'. */ +#if LWIP_SNMP +#if LWIP_HAVE_LOOPIF + struct netif *stats_if = &loop_netif; +#else /* LWIP_HAVE_LOOPIF */ + struct netif *stats_if = netif; +#endif /* LWIP_HAVE_LOOPIF */ +#endif /* LWIP_SNMP */ + SYS_ARCH_DECL_PROTECT(lev); + + do { + /* Get a packet from the list. With SYS_LIGHTWEIGHT_PROT=1, this is protected */ + SYS_ARCH_PROTECT(lev); + in = netif->loop_first; + if (in != NULL) { + struct pbuf *in_end = in; +#if LWIP_LOOPBACK_MAX_PBUFS + u8_t clen = pbuf_clen(in); + /* adjust the number of pbufs on queue */ + LWIP_ASSERT("netif->loop_cnt_current underflow", + ((netif->loop_cnt_current - clen) < netif->loop_cnt_current)); + netif->loop_cnt_current -= clen; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + while (in_end->len != in_end->tot_len) { + LWIP_ASSERT("bogus pbuf: len != tot_len but next == NULL!", in_end->next != NULL); + in_end = in_end->next; + } + /* 'in_end' now points to the last pbuf from 'in' */ + if (in_end == netif->loop_last) { + /* this was the last pbuf in the list */ + netif->loop_first = netif->loop_last = NULL; + } else { + /* pop the pbuf off the list */ + netif->loop_first = in_end->next; + LWIP_ASSERT("should not be null since first != last!", netif->loop_first != NULL); + } + /* De-queue the pbuf from its successors on the 'loop_' list. */ + in_end->next = NULL; + } + SYS_ARCH_UNPROTECT(lev); + + if (in != NULL) { + LINK_STATS_INC(link.recv); + snmp_add_ifinoctets(stats_if, in->tot_len); + snmp_inc_ifinucastpkts(stats_if); + /* loopback packets are always IP packets! */ + if (ip_input(in, netif) != ERR_OK) { + pbuf_free(in); + } + /* Don't reference the packet any more! */ + in = NULL; + } + /* go on while there is a packet on the list */ + } while (netif->loop_first != NULL); +} + +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +/** + * Calls netif_poll() for every netif on the netif_list. + */ +void +netif_poll_all(void) +{ + struct netif *netif = netif_list; + /* loop through netifs */ + while (netif != NULL) { + netif_poll(netif); + /* proceed to next network interface */ + netif = netif->next; + } +} +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/pbuf.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/pbuf.c new file mode 100755 index 0000000..42a5f7c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/pbuf.c @@ -0,0 +1,1260 @@ +/** + * @file + * Packet buffer management + * + * Packets are built from the pbuf data structure. It supports dynamic + * memory allocation for packet contents or can reference externally + * managed packet contents both in RAM and ROM. Quick allocation for + * incoming packets is provided through pools with fixed sized pbufs. + * + * A packet may span over multiple pbufs, chained as a singly linked + * list. This is called a "pbuf chain". + * + * Multiple packets may be queued, also using this singly linked list. + * This is called a "packet queue". + * + * So, a packet queue consists of one or more pbuf chains, each of + * which consist of one or more pbufs. CURRENTLY, PACKET QUEUES ARE + * NOT SUPPORTED!!! Use helper structs to queue multiple packets. + * + * The differences between a pbuf chain and a packet queue are very + * precise but subtle. + * + * The last pbuf of a packet has a ->tot_len field that equals the + * ->len field. It can be found by traversing the list. If the last + * pbuf of a packet has a ->next field other than NULL, more packets + * are on the queue. + * + * Therefore, looping through a pbuf of a single packet, has an + * loop end condition (tot_len == p->len), NOT (next == NULL). + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/stats.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/sys.h" +#include "arch/perf.h" +#if TCP_QUEUE_OOSEQ +#include "lwip/tcp_impl.h" +#endif +#if LWIP_CHECKSUM_ON_COPY +#include "lwip/inet_chksum.h" +#endif + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +#ifdef EBUF_LWIP +#define EP_OFFSET 36 +#else +#define EP_OFFSET 0 +#endif /* ESF_LWIP */ + +#define SIZEOF_STRUCT_PBUF LWIP_MEM_ALIGN_SIZE(sizeof(struct pbuf)) +/* Since the pool is created in memp, PBUF_POOL_BUFSIZE will be automatically + aligned there. Therefore, PBUF_POOL_BUFSIZE_ALIGNED can be used here. */ +#define PBUF_POOL_BUFSIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(PBUF_POOL_BUFSIZE) + +/** + * Attempt to reclaim some memory from queued out-of-sequence TCP segments + * if we run out of pool pbufs. It's better to give priority to new packets + * if we're running out. + */ +#if TCP_QUEUE_OOSEQ +void ICACHE_FLASH_ATTR +pbuf_free_ooseq_new(void* arg) +{ + struct tcp_pcb* pcb; + struct tcp_seg *head = NULL; + struct tcp_seg *seg1 = NULL; + struct tcp_seg *seg2 = NULL; + for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { + head = pcb->ooseq; + seg1 = head; + if (head != NULL) { + if (seg1->next == NULL){ + head = head->next; + tcp_seg_free(seg1); + pcb->ooseq = head; + } else { + while (seg1 != NULL){ + seg2 = seg1; + seg2 = seg2->next; + if (seg2 ->next == NULL){ + seg1->next = seg2->next; + tcp_seg_free(seg2); + break; + } + seg1 = seg1->next; + } + pcb->ooseq = head; + } + } + } +} +#endif + +#if !LWIP_TCP || !TCP_QUEUE_OOSEQ || NO_SYS +#define PBUF_POOL_IS_EMPTY() +#else /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || NO_SYS */ +/** Define this to 0 to prevent freeing ooseq pbufs when the PBUF_POOL is empty */ +#ifndef PBUF_POOL_FREE_OOSEQ +#define PBUF_POOL_FREE_OOSEQ 1 +#endif /* PBUF_POOL_FREE_OOSEQ */ + +#if PBUF_POOL_FREE_OOSEQ +#include "lwip/tcpip.h" +#define PBUF_POOL_IS_EMPTY() pbuf_pool_is_empty() +static u8_t pbuf_free_ooseq_queued; +/** + * Attempt to reclaim some memory from queued out-of-sequence TCP segments + * if we run out of pool pbufs. It's better to give priority to new packets + * if we're running out. + * + * This must be done in the correct thread context therefore this function + * can only be used with NO_SYS=0 and through tcpip_callback. + */ +static void ICACHE_FLASH_ATTR +pbuf_free_ooseq(void* arg) +{ + struct tcp_pcb* pcb; + SYS_ARCH_DECL_PROTECT(old_level); + LWIP_UNUSED_ARG(arg); + + SYS_ARCH_PROTECT(old_level); + pbuf_free_ooseq_queued = 0; + SYS_ARCH_UNPROTECT(old_level); + + for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { + if (NULL != pcb->ooseq) { + /** Free the ooseq pbufs of one PCB only */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n")); + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; + return; + } + } +} + +/** Queue a call to pbuf_free_ooseq if not already queued. */ +static void ICACHE_FLASH_ATTR +pbuf_pool_is_empty(void) +{ + u8_t queued; + SYS_ARCH_DECL_PROTECT(old_level); + + SYS_ARCH_PROTECT(old_level); + queued = pbuf_free_ooseq_queued; + pbuf_free_ooseq_queued = 1; + SYS_ARCH_UNPROTECT(old_level); + + if(!queued) { + /* queue a call to pbuf_free_ooseq if not already queued */ + if(tcpip_callback_with_block(pbuf_free_ooseq, NULL, 0) != ERR_OK) { + SYS_ARCH_PROTECT(old_level); + pbuf_free_ooseq_queued = 0; + SYS_ARCH_UNPROTECT(old_level); + } + } +} +#endif /* PBUF_POOL_FREE_OOSEQ */ +#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || NO_SYS */ + +/** + * Allocates a pbuf of the given type (possibly a chain for PBUF_POOL type). + * + * The actual memory allocated for the pbuf is determined by the + * layer at which the pbuf is allocated and the requested size + * (from the size parameter). + * + * @param layer flag to define header size + * @param length size of the pbuf's payload + * @param type this parameter decides how and where the pbuf + * should be allocated as follows: + * + * - PBUF_RAM: buffer memory for pbuf is allocated as one large + * chunk. This includes protocol headers as well. + * - PBUF_ROM: no buffer memory is allocated for the pbuf, even for + * protocol headers. Additional headers must be prepended + * by allocating another pbuf and chain in to the front of + * the ROM pbuf. It is assumed that the memory used is really + * similar to ROM in that it is immutable and will not be + * changed. Memory which is dynamic should generally not + * be attached to PBUF_ROM pbufs. Use PBUF_REF instead. + * - PBUF_REF: no buffer memory is allocated for the pbuf, even for + * protocol headers. It is assumed that the pbuf is only + * being used in a single thread. If the pbuf gets queued, + * then pbuf_take should be called to copy the buffer. + * - PBUF_POOL: the pbuf is allocated as a pbuf chain, with pbufs from + * the pbuf pool that is allocated during pbuf_init(). + * + * @return the allocated pbuf. If multiple pbufs where allocated, this + * is the first pbuf of a pbuf chain. + */ +struct pbuf * +pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type) +{ + struct pbuf *p, *q, *r; + u16_t offset; + s32_t rem_len; /* remaining length */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length)); + + /* determine header offset */ + offset = 0; + switch (layer) { + case PBUF_TRANSPORT: + /* add room for transport (often TCP) layer header */ + offset += PBUF_TRANSPORT_HLEN; + /* FALLTHROUGH */ + case PBUF_IP: + /* add room for IP layer header */ + offset += PBUF_IP_HLEN; + /* FALLTHROUGH */ + case PBUF_LINK: + /* add room for link layer header */ + offset += PBUF_LINK_HLEN; + +#ifdef PBUF_RSV_FOR_WLAN + /* + * 1. LINK_HLEN 14Byte will be remove in WLAN layer + * 2. IEEE80211_HDR_MAX_LEN needs 40 bytes. + * 3. encryption needs exra 4 bytes ahead of actual data payload, and require + * DAddr and SAddr to be 4-byte aligned. + * 4. TRANSPORT and IP are all 20, 4 bytes aligned, nice... + * 5. LCC add 6 bytes more, We don't consider WAPI yet... + * 6. define LWIP_MEM_ALIGN to be 4 Byte aligned, pbuf struct is 16B, Only thing may be + * matter is ether_hdr is not 4B aligned. + * + * So, we need extra (40 + 4 - 14) = 30 and it's happen to be 4-Byte aligned + * + * 1. lwip + * | empty 30B | eth_hdr (14B) | payload ...| + * total: 44B ahead payload + * 2. net80211 + * | max 80211 hdr, 32B | ccmp/tkip iv (8B) | sec rsv(4B) | payload ...| + * total: 40B ahead sec_rsv and 44B ahead payload + * + */ + offset += EP_OFFSET; //remove LINK hdr in wlan +#endif /* PBUF_RSV_FOR_WLAN */ + + break; + case PBUF_RAW: +#ifdef PBUF_RSV_FOR_WLAN + /* + * RAW pbuf suppose + */ + offset += EP_OFFSET; //remove LINK hdr in wlan +#endif /* PBUF_RAW */ + break; + default: + LWIP_ASSERT("pbuf_alloc: bad pbuf layer", 0); + return NULL; + } + + switch (type) { + case PBUF_POOL: + /* allocate head of pbuf chain into p */ + p = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc: allocated pbuf %p\n", (void *)p)); + if (p == NULL) { + PBUF_POOL_IS_EMPTY(); + return NULL; + } + p->type = type; + p->next = NULL; + + /* make the payload pointer point 'offset' bytes into pbuf data memory */ + p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + (SIZEOF_STRUCT_PBUF + offset))); + LWIP_ASSERT("pbuf_alloc: pbuf p->payload properly aligned", + ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); + /* the total length of the pbuf chain is the requested size */ + p->tot_len = length; + /* set the length of the first pbuf in the chain */ + p->len = LWIP_MIN(length, PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)); + LWIP_ASSERT("check p->payload + p->len does not overflow pbuf", + ((u8_t*)p->payload + p->len <= + (u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED)); + LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT", + (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 ); + /* set reference count (needed here in case we fail) */ + p->ref = 1; + + /* now allocate the tail of the pbuf chain */ + + /* remember first pbuf for linkage in next iteration */ + r = p; + /* remaining length to be allocated */ + rem_len = length - p->len; + /* any remaining pbufs to be allocated? */ + while (rem_len > 0) { + q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL); + if (q == NULL) { + PBUF_POOL_IS_EMPTY(); + /* free chain so far allocated */ + pbuf_free(p); + /* bail out unsuccesfully */ + return NULL; + } + q->type = type; + q->flags = 0; + q->next = NULL; + /* make previous pbuf point to this pbuf */ + r->next = q; + /* set total length of this pbuf and next in chain */ + LWIP_ASSERT("rem_len < max_u16_t", rem_len < 0xffff); + q->tot_len = (u16_t)rem_len; + /* this pbuf length is pool size, unless smaller sized tail */ + q->len = LWIP_MIN((u16_t)rem_len, PBUF_POOL_BUFSIZE_ALIGNED); + q->payload = (void *)((u8_t *)q + SIZEOF_STRUCT_PBUF); + LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned", + ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0); + LWIP_ASSERT("check p->payload + p->len does not overflow pbuf", + ((u8_t*)p->payload + p->len <= + (u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED)); + q->ref = 1; + /* calculate remaining length to be allocated */ + rem_len -= q->len; + /* remember this pbuf for linkage in next iteration */ + r = q; + } + /* end of chain */ + /*r->next = NULL;*/ + + break; + case PBUF_RAM: + /* If pbuf is to be allocated in RAM, allocate memory for it. */ + p = (struct pbuf*)mem_malloc(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF + offset) + LWIP_MEM_ALIGN_SIZE(length)); + if (p == NULL) { + return NULL; + } + /* Set up internal structure of the pbuf. */ + p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)); + p->len = p->tot_len = length; + p->next = NULL; + p->type = type; + p->eb = NULL; + + LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned", + ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); + break; +#ifdef EBUF_LWIP + case PBUF_ESF_RX: +#endif /* ESF_LWIP */ + /* pbuf references existing (non-volatile static constant) ROM payload? */ + case PBUF_ROM: + /* pbuf references existing (externally allocated) RAM payload? */ + case PBUF_REF: + /* only allocate memory for the pbuf structure */ + p = (struct pbuf *)memp_malloc(MEMP_PBUF); + if (p == NULL) { + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_alloc: Could not allocate MEMP_PBUF for PBUF_%s.\n", + (type == PBUF_ROM) ? "ROM" : "REF")); + return NULL; + } + /* caller must set this field properly, afterwards */ + p->payload = NULL; + p->len = p->tot_len = length; + p->next = NULL; + p->type = type; + break; + default: + LWIP_ASSERT("pbuf_alloc: erroneous type", 0); + return NULL; + } + /* set reference count */ + p->ref = 1; + /* set flags */ + p->flags = 0; + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p)); + + return p; +} + +#if LWIP_SUPPORT_CUSTOM_PBUF +/** Initialize a custom pbuf (already allocated). + * + * @param layer flag to define header size + * @param length size of the pbuf's payload + * @param type type of the pbuf (only used to treat the pbuf accordingly, as + * this function allocates no memory) + * @param p pointer to the custom pbuf to initialize (already allocated) + * @param payload_mem pointer to the buffer that is used for payload and headers, + * must be at least big enough to hold 'length' plus the header size, + * may be NULL if set later + * @param payload_mem_len the size of the 'payload_mem' buffer, must be at least + * big enough to hold 'length' plus the header size + */ +struct pbuf* +pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p, + void *payload_mem, u16_t payload_mem_len) +{ + u16_t offset; + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length)); + + /* determine header offset */ + offset = 0; + switch (l) { + case PBUF_TRANSPORT: + /* add room for transport (often TCP) layer header */ + offset += PBUF_TRANSPORT_HLEN; + /* FALLTHROUGH */ + case PBUF_IP: + /* add room for IP layer header */ + offset += PBUF_IP_HLEN; + /* FALLTHROUGH */ + case PBUF_LINK: + /* add room for link layer header */ + offset += PBUF_LINK_HLEN; + break; + case PBUF_RAW: + break; + default: + LWIP_ASSERT("pbuf_alloced_custom: bad pbuf layer", 0); + return NULL; + } + + if (LWIP_MEM_ALIGN_SIZE(offset) + length < payload_mem_len) { + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length)); + return NULL; + } + + p->pbuf.next = NULL; + if (payload_mem != NULL) { + p->pbuf.payload = LWIP_MEM_ALIGN((void *)((u8_t *)payload_mem + offset)); + } else { + p->pbuf.payload = NULL; + } + p->pbuf.flags = PBUF_FLAG_IS_CUSTOM; + p->pbuf.len = p->pbuf.tot_len = length; + p->pbuf.type = type; + p->pbuf.ref = 1; + return &p->pbuf; +} +#endif /* LWIP_SUPPORT_CUSTOM_PBUF */ + +/** + * Shrink a pbuf chain to a desired length. + * + * @param p pbuf to shrink. + * @param new_len desired new length of pbuf chain + * + * Depending on the desired length, the first few pbufs in a chain might + * be skipped and left unchanged. The new last pbuf in the chain will be + * resized, and any remaining pbufs will be freed. + * + * @note If the pbuf is ROM/REF, only the ->tot_len and ->len fields are adjusted. + * @note May not be called on a packet queue. + * + * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain). + */ +void +pbuf_realloc(struct pbuf *p, u16_t new_len) +{ + struct pbuf *q; + u16_t rem_len; /* remaining length */ + s32_t grow; + + LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL); + LWIP_ASSERT("pbuf_realloc: sane p->type", p->type == PBUF_POOL || + p->type == PBUF_ROM || + p->type == PBUF_RAM || + p->type == PBUF_REF); + + /* desired length larger than current length? */ + if (new_len >= p->tot_len) { + /* enlarging not yet supported */ + return; + } + + /* the pbuf chain grows by (new_len - p->tot_len) bytes + * (which may be negative in case of shrinking) */ + grow = new_len - p->tot_len; + + /* first, step over any pbufs that should remain in the chain */ + rem_len = new_len; + q = p; + /* should this pbuf be kept? */ + while (rem_len > q->len) { + /* decrease remaining length by pbuf length */ + rem_len -= q->len; + /* decrease total length indicator */ + LWIP_ASSERT("grow < max_u16_t", grow < 0xffff); + q->tot_len += (u16_t)grow; + /* proceed to next pbuf in chain */ + q = q->next; + LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL); + } + /* we have now reached the new last pbuf (in q) */ + /* rem_len == desired length for pbuf q */ + + /* shrink allocated memory for PBUF_RAM */ + /* (other types merely adjust their length fields */ + if ((q->type == PBUF_RAM) && (rem_len != q->len)) { + /* reallocate and adjust the length of the pbuf that will be split */ + q = (struct pbuf *)mem_trim(q, (u16_t)((u8_t *)q->payload - (u8_t *)q) + rem_len); + LWIP_ASSERT("mem_trim returned q == NULL", q != NULL); + } + /* adjust length fields for new last pbuf */ + q->len = rem_len; + q->tot_len = q->len; + + /* any remaining pbufs in chain? */ + if (q->next != NULL) { + /* free remaining pbufs in chain */ + pbuf_free(q->next); + } + /* q is last packet in chain */ + q->next = NULL; + +} + +/** + * Adjusts the payload pointer to hide or reveal headers in the payload. + * + * Adjusts the ->payload pointer so that space for a header + * (dis)appears in the pbuf payload. + * + * The ->payload, ->tot_len and ->len fields are adjusted. + * + * @param p pbuf to change the header size. + * @param header_size_increment Number of bytes to increment header size which + * increases the size of the pbuf. New space is on the front. + * (Using a negative value decreases the header size.) + * If hdr_size_inc is 0, this function does nothing and returns succesful. + * + * PBUF_ROM and PBUF_REF type buffers cannot have their sizes increased, so + * the call will fail. A check is made that the increase in header size does + * not move the payload pointer in front of the start of the buffer. + * @return non-zero on failure, zero on success. + * + */ +u8_t +pbuf_header(struct pbuf *p, s16_t header_size_increment) +{ + u16_t type; + void *payload; + u16_t increment_magnitude; + + LWIP_ASSERT("p != NULL", p != NULL); + if ((header_size_increment == 0) || (p == NULL)) { + return 0; + } + + if (header_size_increment < 0){ + increment_magnitude = -header_size_increment; + /* Check that we aren't going to move off the end of the pbuf */ + LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;); + } else { + increment_magnitude = header_size_increment; +#if 0 + /* Can't assert these as some callers speculatively call + pbuf_header() to see if it's OK. Will return 1 below instead. */ + /* Check that we've got the correct type of pbuf to work with */ + LWIP_ASSERT("p->type == PBUF_RAM || p->type == PBUF_POOL", + p->type == PBUF_RAM || p->type == PBUF_POOL); + /* Check that we aren't going to move off the beginning of the pbuf */ + LWIP_ASSERT("p->payload - increment_magnitude >= p + SIZEOF_STRUCT_PBUF", + (u8_t *)p->payload - increment_magnitude >= (u8_t *)p + SIZEOF_STRUCT_PBUF); +#endif + } + + type = p->type; + /* remember current payload pointer */ + payload = p->payload; + + /* pbuf types containing payloads? */ + if (type == PBUF_RAM || type == PBUF_POOL) { + /* set new payload pointer */ + p->payload = (u8_t *)p->payload - header_size_increment; + /* boundary check fails? */ + if ((u8_t *)p->payload < (u8_t *)p + SIZEOF_STRUCT_PBUF + EP_OFFSET) { + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_header: failed as %p < %p (not enough space for new header size)\n", + (void *)p->payload, (void *)(p + 1))); + /* restore old payload pointer */ + p->payload = payload; + /* bail out unsuccesfully */ + return 1; + } + /* pbuf types refering to external payloads? */ + } else if (type == PBUF_REF || type == PBUF_ROM) { + /* hide a header in the payload? */ + if ((header_size_increment < 0) && (increment_magnitude <= p->len)) { + /* increase payload pointer */ + p->payload = (u8_t *)p->payload - header_size_increment; + } else { + /* cannot expand payload to front (yet!) + * bail out unsuccesfully */ + if (type == PBUF_REF) { + /* increase payload pointer */ + p->payload = (u8_t *)p->payload - header_size_increment; + } else { + return 1; + } + } + } else { + /* Unknown type */ + LWIP_ASSERT("bad pbuf type", 0); + return 1; + } + /* modify pbuf length fields */ + p->len += header_size_increment; + p->tot_len += header_size_increment; + + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_header: old %p new %p (%"S16_F")\n", + (void *)payload, (void *)p->payload, header_size_increment)); + + return 0; +} + +#ifdef EBUF_LWIP +int system_pp_recycle_rx_pkt(void *eb); +#endif +/** + * Dereference a pbuf chain or queue and deallocate any no-longer-used + * pbufs at the head of this chain or queue. + * + * Decrements the pbuf reference count. If it reaches zero, the pbuf is + * deallocated. + * + * For a pbuf chain, this is repeated for each pbuf in the chain, + * up to the first pbuf which has a non-zero reference count after + * decrementing. So, when all reference counts are one, the whole + * chain is free'd. + * + * @param p The pbuf (chain) to be dereferenced. + * + * @return the number of pbufs that were de-allocated + * from the head of the chain. + * + * @note MUST NOT be called on a packet queue (Not verified to work yet). + * @note the reference counter of a pbuf equals the number of pointers + * that refer to the pbuf (or into the pbuf). + * + * @internal examples: + * + * Assuming existing chains a->b->c with the following reference + * counts, calling pbuf_free(a) results in: + * + * 1->2->3 becomes ...1->3 + * 3->3->3 becomes 2->3->3 + * 1->1->2 becomes ......1 + * 2->1->1 becomes 1->1->1 + * 1->1->1 becomes ....... + * + */ +u8_t +pbuf_free(struct pbuf *p) +{ + u16_t type; + struct pbuf *q; + u8_t count; + + if (p == NULL) { + LWIP_ASSERT("p != NULL", p != NULL); + /* if assertions are disabled, proceed with debug output */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_free(p == NULL) was called.\n")); + return 0; + } + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p)); + + PERF_START; + + LWIP_ASSERT("pbuf_free: sane type", + p->type == PBUF_RAM || p->type == PBUF_ROM || + p->type == PBUF_REF || p->type == PBUF_POOL +#ifdef EBUF_LWIP + || p->type == PBUF_ESF_RX +#endif //EBUF_LWIP + ); + + count = 0; + /* de-allocate all consecutive pbufs from the head of the chain that + * obtain a zero reference count after decrementing*/ + while (p != NULL) { + u16_t ref; + SYS_ARCH_DECL_PROTECT(old_level); + /* Since decrementing ref cannot be guaranteed to be a single machine operation + * we must protect it. We put the new ref into a local variable to prevent + * further protection. */ + SYS_ARCH_PROTECT(old_level); + /* all pbufs in a chain are referenced at least once */ + LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0); + /* decrease reference count (number of pointers to pbuf) */ + ref = --(p->ref); + SYS_ARCH_UNPROTECT(old_level); + /* this pbuf is no longer referenced to? */ + if (ref == 0) { + /* remember next pbuf in chain for next iteration */ + q = p->next; + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p)); + type = p->type; +#if LWIP_SUPPORT_CUSTOM_PBUF + /* is this a custom pbuf? */ + if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) { + struct pbuf_custom *pc = (struct pbuf_custom*)p; + LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL); + pc->custom_free_function(p); + } else +#endif /* LWIP_SUPPORT_CUSTOM_PBUF */ + { + /* is this a pbuf from the pool? */ + if (type == PBUF_POOL) { + memp_free(MEMP_PBUF_POOL, p); + /* is this a ROM or RAM referencing pbuf? */ + } else if (type == PBUF_ROM || type == PBUF_REF +#ifdef EBUF_LWIP + || type == PBUF_ESF_RX +#endif //EBUF_LWIP + ) { +#ifdef EBUF_LWIP + system_pp_recycle_rx_pkt(p->eb); +#endif //EBUF_LWIP + memp_free(MEMP_PBUF, p); + /* type == PBUF_RAM */ + } else { + mem_free(p); + } + } + count++; + /* proceed to next pbuf */ + p = q; + /* p->ref > 0, this pbuf is still referenced to */ + /* (and so the remaining pbufs in chain as well) */ + } else { + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, ref)); + /* stop walking through the chain */ + p = NULL; + } + } + PERF_STOP("pbuf_free"); + /* return number of de-allocated pbufs */ + return count; +} + +/** + * Count number of pbufs in a chain + * + * @param p first pbuf of chain + * @return the number of pbufs in a chain + */ + +u8_t +pbuf_clen(struct pbuf *p) +{ + u8_t len; + + len = 0; + while (p != NULL) { + ++len; + p = p->next; + } + return len; +} + +/** + * Increment the reference count of the pbuf. + * + * @param p pbuf to increase reference counter of + * + */ +void +pbuf_ref(struct pbuf *p) +{ + SYS_ARCH_DECL_PROTECT(old_level); + /* pbuf given? */ + if (p != NULL) { + SYS_ARCH_PROTECT(old_level); + ++(p->ref); + SYS_ARCH_UNPROTECT(old_level); + } +} + +/** + * Concatenate two pbufs (each may be a pbuf chain) and take over + * the caller's reference of the tail pbuf. + * + * @note The caller MAY NOT reference the tail pbuf afterwards. + * Use pbuf_chain() for that purpose. + * + * @see pbuf_chain() + */ + +void +pbuf_cat(struct pbuf *h, struct pbuf *t) +{ + struct pbuf *p; + + LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)", + ((h != NULL) && (t != NULL)), return;); + + /* proceed to last pbuf of chain */ + for (p = h; p->next != NULL; p = p->next) { + /* add total length of second chain to all totals of first chain */ + p->tot_len += t->tot_len; + } + /* { p is last pbuf of first h chain, p->next == NULL } */ + LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len); + LWIP_ASSERT("p->next == NULL", p->next == NULL); + /* add total length of second chain to last pbuf total of first chain */ + p->tot_len += t->tot_len; + /* chain last pbuf of head (p) with first of tail (t) */ + p->next = t; + /* p->next now references t, but the caller will drop its reference to t, + * so netto there is no change to the reference count of t. + */ +} + +/** + * Chain two pbufs (or pbuf chains) together. + * + * The caller MUST call pbuf_free(t) once it has stopped + * using it. Use pbuf_cat() instead if you no longer use t. + * + * @param h head pbuf (chain) + * @param t tail pbuf (chain) + * @note The pbufs MUST belong to the same packet. + * @note MAY NOT be called on a packet queue. + * + * The ->tot_len fields of all pbufs of the head chain are adjusted. + * The ->next field of the last pbuf of the head chain is adjusted. + * The ->ref field of the first pbuf of the tail chain is adjusted. + * + */ +void +pbuf_chain(struct pbuf *h, struct pbuf *t) +{ + pbuf_cat(h, t); + /* t is now referenced by h */ + pbuf_ref(t); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t)); +} + +/** + * Dechains the first pbuf from its succeeding pbufs in the chain. + * + * Makes p->tot_len field equal to p->len. + * @param p pbuf to dechain + * @return remainder of the pbuf chain, or NULL if it was de-allocated. + * @note May not be called on a packet queue. + */ +struct pbuf * +pbuf_dechain(struct pbuf *p) +{ + struct pbuf *q; + u8_t tail_gone = 1; + /* tail */ + q = p->next; + /* pbuf has successor in chain? */ + if (q != NULL) { + /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ + LWIP_ASSERT("p->tot_len == p->len + q->tot_len", q->tot_len == p->tot_len - p->len); + /* enforce invariant if assertion is disabled */ + q->tot_len = p->tot_len - p->len; + /* decouple pbuf from remainder */ + p->next = NULL; + /* total length of pbuf p is its own length only */ + p->tot_len = p->len; + /* q is no longer referenced by p, free it */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_dechain: unreferencing %p\n", (void *)q)); + tail_gone = pbuf_free(q); + if (tail_gone > 0) { + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, + ("pbuf_dechain: deallocated %p (as it is no longer referenced)\n", (void *)q)); + } + /* return remaining tail or NULL if deallocated */ + } + /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ + LWIP_ASSERT("p->tot_len == p->len", p->tot_len == p->len); + return ((tail_gone > 0) ? NULL : q); +} + +/** + * + * Create PBUF_RAM copies of pbufs. + * + * Used to queue packets on behalf of the lwIP stack, such as + * ARP based queueing. + * + * @note You MUST explicitly use p = pbuf_take(p); + * + * @note Only one packet is copied, no packet queue! + * + * @param p_to pbuf destination of the copy + * @param p_from pbuf source of the copy + * + * @return ERR_OK if pbuf was copied + * ERR_ARG if one of the pbufs is NULL or p_to is not big + * enough to hold p_from + */ +err_t +pbuf_copy(struct pbuf *p_to, struct pbuf *p_from) +{ + u16_t offset_to=0, offset_from=0, len; + + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n", + (void*)p_to, (void*)p_from)); + + /* is the target big enough to hold the source? */ + LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) && + (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;); + + /* iterate through pbuf chain */ + do + { + LWIP_ASSERT("p_to != NULL", p_to != NULL); + /* copy one part of the original chain */ + if ((p_to->len - offset_to) >= (p_from->len - offset_from)) { + /* complete current p_from fits into current p_to */ + len = p_from->len - offset_from; + } else { + /* current p_from does not fit into current p_to */ + len = p_to->len - offset_to; + } + MEMCPY((u8_t*)p_to->payload + offset_to, (u8_t*)p_from->payload + offset_from, len); + offset_to += len; + offset_from += len; + LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len); + if (offset_to == p_to->len) { + /* on to next p_to (if any) */ + offset_to = 0; + p_to = p_to->next; + } + LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len); + if (offset_from >= p_from->len) { + /* on to next p_from (if any) */ + offset_from = 0; + p_from = p_from->next; + } + + if((p_from != NULL) && (p_from->len == p_from->tot_len)) { + /* don't copy more than one packet! */ + LWIP_ERROR("pbuf_copy() does not allow packet queues!\n", + (p_from->next == NULL), return ERR_VAL;); + } + if((p_to != NULL) && (p_to->len == p_to->tot_len)) { + /* don't copy more than one packet! */ + LWIP_ERROR("pbuf_copy() does not allow packet queues!\n", + (p_to->next == NULL), return ERR_VAL;); + } + } while (p_from); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n")); + return ERR_OK; +} + +/** + * Copy (part of) the contents of a packet buffer + * to an application supplied buffer. + * + * @param buf the pbuf from which to copy data + * @param dataptr the application supplied buffer + * @param len length of data to copy (dataptr must be big enough). No more + * than buf->tot_len will be copied, irrespective of len + * @param offset offset into the packet buffer from where to begin copying len bytes + * @return the number of bytes copied, or 0 on failure + */ +u16_t +pbuf_copy_partial(struct pbuf *buf, void *dataptr, u16_t len, u16_t offset) +{ + struct pbuf *p; + u16_t left; + u16_t buf_copy_len; + u16_t copied_total = 0; + + LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;); + LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;); + + left = 0; + + if((buf == NULL) || (dataptr == NULL)) { + return 0; + } + + /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ + for(p = buf; len != 0 && p != NULL; p = p->next) { + if ((offset != 0) && (offset >= p->len)) { + /* don't copy from this buffer -> on to the next */ + offset -= p->len; + } else { + /* copy from this buffer. maybe only partially. */ + buf_copy_len = p->len - offset; + if (buf_copy_len > len) + buf_copy_len = len; + /* copy the necessary parts of the buffer */ + MEMCPY(&((char*)dataptr)[left], &((char*)p->payload)[offset], buf_copy_len); + copied_total += buf_copy_len; + left += buf_copy_len; + len -= buf_copy_len; + offset = 0; + } + } + return copied_total; +} + +/** + * Copy application supplied data into a pbuf. + * This function can only be used to copy the equivalent of buf->tot_len data. + * + * @param buf pbuf to fill with data + * @param dataptr application supplied data buffer + * @param len length of the application supplied data buffer + * + * @return ERR_OK if successful, ERR_MEM if the pbuf is not big enough + */ +err_t +pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len) +{ + struct pbuf *p; + u16_t buf_copy_len; + u16_t total_copy_len = len; + u16_t copied_total = 0; + + LWIP_ERROR("pbuf_take: invalid buf", (buf != NULL), return 0;); + LWIP_ERROR("pbuf_take: invalid dataptr", (dataptr != NULL), return 0;); + + if ((buf == NULL) || (dataptr == NULL) || (buf->tot_len < len)) { + return ERR_ARG; + } + + /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ + for(p = buf; total_copy_len != 0; p = p->next) { + LWIP_ASSERT("pbuf_take: invalid pbuf", p != NULL); + buf_copy_len = total_copy_len; + if (buf_copy_len > p->len) { + /* this pbuf cannot hold all remaining data */ + buf_copy_len = p->len; + } + /* copy the necessary parts of the buffer */ + MEMCPY(p->payload, &((char*)dataptr)[copied_total], buf_copy_len); + total_copy_len -= buf_copy_len; + copied_total += buf_copy_len; + } + LWIP_ASSERT("did not copy all data", total_copy_len == 0 && copied_total == len); + return ERR_OK; +} + +/** + * Creates a single pbuf out of a queue of pbufs. + * + * @remark: Either the source pbuf 'p' is freed by this function or the original + * pbuf 'p' is returned, therefore the caller has to check the result! + * + * @param p the source pbuf + * @param layer pbuf_layer of the new pbuf + * + * @return a new, single pbuf (p->next is NULL) + * or the old pbuf if allocation fails + */ +struct pbuf* +pbuf_coalesce(struct pbuf *p, pbuf_layer layer) +{ + struct pbuf *q; + err_t err; + if (p->next == NULL) { + return p; + } + q = pbuf_alloc(layer, p->tot_len, PBUF_RAM); + if (q == NULL) { + /* @todo: what do we do now? */ + return p; + } + err = pbuf_copy(q, p); + LWIP_ASSERT("pbuf_copy failed", err == ERR_OK); + pbuf_free(p); + return q; +} + +#if LWIP_CHECKSUM_ON_COPY +/** + * Copies data into a single pbuf (*not* into a pbuf queue!) and updates + * the checksum while copying + * + * @param p the pbuf to copy data into + * @param start_offset offset of p->payload where to copy the data to + * @param dataptr data to copy into the pbuf + * @param len length of data to copy into the pbuf + * @param chksum pointer to the checksum which is updated + * @return ERR_OK if successful, another error if the data does not fit + * within the (first) pbuf (no pbuf queues!) + */ +err_t +pbuf_fill_chksum(struct pbuf *p, u16_t start_offset, const void *dataptr, + u16_t len, u16_t *chksum) +{ + u32_t acc; + u16_t copy_chksum; + char *dst_ptr; + LWIP_ASSERT("p != NULL", p != NULL); + LWIP_ASSERT("dataptr != NULL", dataptr != NULL); + LWIP_ASSERT("chksum != NULL", chksum != NULL); + LWIP_ASSERT("len != 0", len != 0); + + if ((start_offset >= p->len) || (start_offset + len > p->len)) { + return ERR_ARG; + } + + dst_ptr = ((char*)p->payload) + start_offset; + copy_chksum = LWIP_CHKSUM_COPY(dst_ptr, dataptr, len); + if ((start_offset & 1) != 0) { + copy_chksum = SWAP_BYTES_IN_WORD(copy_chksum); + } + acc = *chksum; + acc += copy_chksum; + *chksum = FOLD_U32T(acc); + return ERR_OK; +} +#endif /* LWIP_CHECKSUM_ON_COPY */ + + /** Get one byte from the specified position in a pbuf + * WARNING: returns zero for offset >= p->tot_len + * + * @param p pbuf to parse + * @param offset offset into p of the byte to return + * @return byte at an offset into p OR ZERO IF 'offset' >= p->tot_len + */ +u8_t +pbuf_get_at(struct pbuf* p, u16_t offset) +{ + u16_t copy_from = offset; + struct pbuf* q = p; + + /* get the correct pbuf */ + while ((q != NULL) && (q->len <= copy_from)) { + copy_from -= q->len; + q = q->next; + } + /* return requested data if pbuf is OK */ + if ((q != NULL) && (q->len > copy_from)) { + return ((u8_t*)q->payload)[copy_from]; + } + return 0; +} + +/** Compare pbuf contents at specified offset with memory s2, both of length n + * + * @param p pbuf to compare + * @param offset offset into p at wich to start comparing + * @param s2 buffer to compare + * @param n length of buffer to compare + * @return zero if equal, nonzero otherwise + * (0xffff if p is too short, diffoffset+1 otherwise) + */ +u16_t +pbuf_memcmp(struct pbuf* p, u16_t offset, const void* s2, u16_t n) +{ + u16_t start = offset; + struct pbuf* q = p; + + /* get the correct pbuf */ + while ((q != NULL) && (q->len <= start)) { + start -= q->len; + q = q->next; + } + /* return requested data if pbuf is OK */ + if ((q != NULL) && (q->len > start)) { + u16_t i; + for(i = 0; i < n; i++) { + u8_t a = pbuf_get_at(q, start + i); + u8_t b = ((u8_t*)s2)[i]; + if (a != b) { + return i+1; + } + } + return 0; + } + return 0xffff; +} + +/** Find occurrence of mem (with length mem_len) in pbuf p, starting at offset + * start_offset. + * + * @param p pbuf to search, maximum length is 0xFFFE since 0xFFFF is used as + * return value 'not found' + * @param mem search for the contents of this buffer + * @param mem_len length of 'mem' + * @param start_offset offset into p at which to start searching + * @return 0xFFFF if substr was not found in p or the index where it was found + */ +u16_t +pbuf_memfind(struct pbuf* p, const void* mem, u16_t mem_len, u16_t start_offset) +{ + u16_t i; + u16_t max = p->tot_len - mem_len; + if (p->tot_len >= mem_len + start_offset) { + for(i = start_offset; i <= max; ) { + u16_t plus = pbuf_memcmp(p, i, mem, mem_len); + if (plus == 0) { + return i; + } else { + i += plus; + } + } + } + return 0xFFFF; +} + +/** Find occurrence of substr with length substr_len in pbuf p, start at offset + * start_offset + * WARNING: in contrast to strstr(), this one does not stop at the first \0 in + * the pbuf/source string! + * + * @param p pbuf to search, maximum length is 0xFFFE since 0xFFFF is used as + * return value 'not found' + * @param substr string to search for in p, maximum length is 0xFFFE + * @return 0xFFFF if substr was not found in p or the index where it was found + */ +u16_t +pbuf_strstr(struct pbuf* p, const char* substr) +{ + size_t substr_len; + if ((substr == NULL) || (substr[0] == 0) || (p->tot_len == 0xFFFF)) { + return 0xFFFF; + } + substr_len = os_strlen(substr); + if (substr_len >= 0xFFFF) { + return 0xFFFF; + } + return pbuf_memfind(p, substr, (u16_t)substr_len, 0); +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/raw.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/raw.c new file mode 100755 index 0000000..b89a4f8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/raw.c @@ -0,0 +1,358 @@ +/** + * @file + * Implementation of raw protocol PCBs for low-level handling of + * different types of protocols besides (or overriding) those + * already available in lwIP. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/raw.h" +#include "lwip/stats.h" +#include "arch/perf.h" + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/** The list of RAW PCBs */ +static struct raw_pcb *raw_pcbs; + +/** + * Determine if in incoming IP packet is covered by a RAW PCB + * and if so, pass it to a user-provided receive callback function. + * + * Given an incoming IP datagram (as a chain of pbufs) this function + * finds a corresponding RAW PCB and calls the corresponding receive + * callback function. + * + * @param p pbuf to be demultiplexed to a RAW PCB. + * @param inp network interface on which the datagram was received. + * @return - 1 if the packet has been eaten by a RAW PCB receive + * callback function. The caller MAY NOT not reference the + * packet any longer, and MAY NOT call pbuf_free(). + * @return - 0 if packet is not eaten (pbuf is still referenced by the + * caller). + * + */ +u8_t ICACHE_FLASH_ATTR +raw_input(struct pbuf *p, struct netif *inp) +{ + struct raw_pcb *pcb, *prev; + struct ip_hdr *iphdr; + s16_t proto; + u8_t eaten = 0; + + LWIP_UNUSED_ARG(inp); + + iphdr = (struct ip_hdr *)p->payload; + proto = IPH_PROTO(iphdr); + + prev = NULL; + pcb = raw_pcbs; + /* loop through all raw pcbs until the packet is eaten by one */ + /* this allows multiple pcbs to match against the packet by design */ + while ((eaten == 0) && (pcb != NULL)) { + if ((pcb->protocol == proto) && + (ip_addr_isany(&pcb->local_ip) || + ip_addr_cmp(&(pcb->local_ip), ¤t_iphdr_dest))) { +#if IP_SOF_BROADCAST_RECV + /* broadcast filter? */ + if ((pcb->so_options & SOF_BROADCAST) || !ip_addr_isbroadcast(¤t_iphdr_dest, inp)) +#endif /* IP_SOF_BROADCAST_RECV */ + { + /* receive callback function available? */ + if (pcb->recv != NULL) { + /* the receive callback function did not eat the packet? */ + if (pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr()) != 0) { + /* receive function ate the packet */ + p = NULL; + eaten = 1; + if (prev != NULL) { + /* move the pcb to the front of raw_pcbs so that is + found faster next time */ + prev->next = pcb->next; + pcb->next = raw_pcbs; + raw_pcbs = pcb; + } + } + } + /* no receive callback function was set for this raw PCB */ + } + /* drop the packet */ + } + prev = pcb; + pcb = pcb->next; + } + return eaten; +} + +/** + * Bind a RAW PCB. + * + * @param pcb RAW PCB to be bound with a local address ipaddr. + * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to + * bind to all local interfaces. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_USE. The specified IP address is already bound to by + * another RAW PCB. + * + * @see raw_disconnect() + */ +err_t ICACHE_FLASH_ATTR +raw_bind(struct raw_pcb *pcb, ip_addr_t *ipaddr) +{ + ip_addr_set(&pcb->local_ip, ipaddr); + return ERR_OK; +} + +/** + * Connect an RAW PCB. This function is required by upper layers + * of lwip. Using the raw api you could use raw_sendto() instead + * + * This will associate the RAW PCB with the remote address. + * + * @param pcb RAW PCB to be connected with remote address ipaddr and port. + * @param ipaddr remote IP address to connect with. + * + * @return lwIP error code + * + * @see raw_disconnect() and raw_sendto() + */ +err_t ICACHE_FLASH_ATTR +raw_connect(struct raw_pcb *pcb, ip_addr_t *ipaddr) +{ + ip_addr_set(&pcb->remote_ip, ipaddr); + return ERR_OK; +} + + +/** + * Set the callback function for received packets that match the + * raw PCB's protocol and binding. + * + * The callback function MUST either + * - eat the packet by calling pbuf_free() and returning non-zero. The + * packet will not be passed to other raw PCBs or other protocol layers. + * - not free the packet, and return zero. The packet will be matched + * against further PCBs and/or forwarded to another protocol layers. + * + * @return non-zero if the packet was free()d, zero if the packet remains + * available for others. + */ +void ICACHE_FLASH_ATTR +raw_recv(struct raw_pcb *pcb, raw_recv_fn recv, void *recv_arg) +{ + /* remember recv() callback and user data */ + pcb->recv = recv; + pcb->recv_arg = recv_arg; +} + +/** + * Send the raw IP packet to the given address. Note that actually you cannot + * modify the IP headers (this is inconsistent with the receive callback where + * you actually get the IP headers), you can only specify the IP payload here. + * It requires some more changes in lwIP. (there will be a raw_send() function + * then.) + * + * @param pcb the raw pcb which to send + * @param p the IP payload to send + * @param ipaddr the destination address of the IP packet + * + */ +err_t ICACHE_FLASH_ATTR +raw_sendto(struct raw_pcb *pcb, struct pbuf *p, ip_addr_t *ipaddr) +{ + err_t err; + struct netif *netif; + ip_addr_t *src_ip; + struct pbuf *q; /* q will be sent down the stack */ + + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_sendto\n")); + + /* not enough space to add an IP header to first pbuf in given p chain? */ + if (pbuf_header(p, IP_HLEN)) { + /* allocate header in new pbuf */ + q = pbuf_alloc(PBUF_IP, 0, PBUF_RAM); + /* new header pbuf could not be allocated? */ + if (q == NULL) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("raw_sendto: could not allocate header\n")); + return ERR_MEM; + } + if (p->tot_len != 0) { + /* chain header q in front of given pbuf p */ + pbuf_chain(q, p); + } + /* { first pbuf q points to header pbuf } */ + LWIP_DEBUGF(RAW_DEBUG, ("raw_sendto: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); + } else { + /* first pbuf q equals given pbuf */ + q = p; + if(pbuf_header(q, -IP_HLEN)) { + LWIP_ASSERT("Can't restore header we just removed!", 0); + return ERR_MEM; + } + } + + if ((netif = ip_route(ipaddr)) == NULL) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr))); + /* free any temporary header pbuf allocated by pbuf_header() */ + if (q != p) { + pbuf_free(q); + } + return ERR_RTE; + } + +#if IP_SOF_BROADCAST + /* broadcast filter? */ + if (((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(ipaddr, netif)) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb)); + /* free any temporary header pbuf allocated by pbuf_header() */ + if (q != p) { + pbuf_free(q); + } + return ERR_VAL; + } +#endif /* IP_SOF_BROADCAST */ + + if (ip_addr_isany(&pcb->local_ip)) { + /* use outgoing network interface IP address as source address */ + src_ip = &(netif->ip_addr); + } else { + /* use RAW PCB local IP address as source address */ + src_ip = &(pcb->local_ip); + } + +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if (q, src_ip, ipaddr, pcb->ttl, pcb->tos, pcb->protocol, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + + /* did we chain a header earlier? */ + if (q != p) { + /* free the header */ + pbuf_free(q); + } + return err; +} + +/** + * Send the raw IP packet to the address given by raw_connect() + * + * @param pcb the raw pcb which to send + * @param p the IP payload to send + * + */ +err_t ICACHE_FLASH_ATTR +raw_send(struct raw_pcb *pcb, struct pbuf *p) +{ + return raw_sendto(pcb, p, &pcb->remote_ip); +} + +/** + * Remove an RAW PCB. + * + * @param pcb RAW PCB to be removed. The PCB is removed from the list of + * RAW PCB's and the data structure is freed from memory. + * + * @see raw_new() + */ +void ICACHE_FLASH_ATTR +raw_remove(struct raw_pcb *pcb) +{ + struct raw_pcb *pcb2; + /* pcb to be removed is first in list? */ + if (raw_pcbs == pcb) { + /* make list start at 2nd pcb */ + raw_pcbs = raw_pcbs->next; + /* pcb not 1st in list */ + } else { + for(pcb2 = raw_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { + /* find pcb in raw_pcbs list */ + if (pcb2->next != NULL && pcb2->next == pcb) { + /* remove pcb from list */ + pcb2->next = pcb->next; + } + } + } + memp_free(MEMP_RAW_PCB, pcb); +} + +/** + * Create a RAW PCB. + * + * @return The RAW PCB which was created. NULL if the PCB data structure + * could not be allocated. + * + * @param proto the protocol number of the IPs payload (e.g. IP_PROTO_ICMP) + * + * @see raw_remove() + */ +struct raw_pcb * ICACHE_FLASH_ATTR +raw_new(u8_t proto) +{ + struct raw_pcb *pcb; + + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_new\n")); + + pcb = (struct raw_pcb *)memp_malloc(MEMP_RAW_PCB); + /* could allocate RAW PCB? */ + if (pcb != NULL) { + /* initialize PCB to all zeroes */ + os_memset(pcb, 0, sizeof(struct raw_pcb)); + pcb->protocol = proto; + pcb->ttl = RAW_TTL; + pcb->next = raw_pcbs; + raw_pcbs = pcb; + } + return pcb; +} + +#endif /* LWIP_RAW */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sntp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sntp.c new file mode 100755 index 0000000..c00776a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sntp.c @@ -0,0 +1,1169 @@ +/** + * @file + * SNTP client module + * + * This is simple "SNTP" client for the lwIP raw API. + * It is a minimal implementation of SNTPv4 as specified in RFC 4330. + * + * For a list of some public NTP servers, see this link : + * http://support.ntp.org/bin/view/Servers/NTPPoolServers + * + * @todo: + * - set/change servers at runtime + * - complete SNTP_CHECK_RESPONSE checks 3 and 4 + * - support broadcast/multicast mode? + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt (lwIP raw API part) + */ + +#include "lwip/sntp.h" +#include "osapi.h" +#include "os_type.h" +#include "lwip/opt.h" +#include "lwip/timers.h" +#include "lwip/udp.h" +#include "lwip/dns.h" +#include "lwip/ip_addr.h" +#include "lwip/pbuf.h" +#include "lwip/app/time.h" +//#include +#if LWIP_UDP + +/** + * SNTP_DEBUG: Enable debugging for SNTP. + */ +#ifndef SNTP_DEBUG +#define SNTP_DEBUG LWIP_DBG_ON +#endif + +/** SNTP server port */ +#ifndef SNTP_PORT +#define SNTP_PORT 123 +#endif + +/** Set this to 1 to allow config of SNTP server(s) by DNS name */ +#ifndef SNTP_SERVER_DNS +#define SNTP_SERVER_DNS 0 +#endif + +/** Handle support for more than one server via NTP_MAX_SERVERS, + * but catch legacy style of setting SNTP_SUPPORT_MULTIPLE_SERVERS, probably outside of this file + */ +#ifndef SNTP_SUPPORT_MULTIPLE_SERVERS +#if SNTP_MAX_SERVERS > 1 +#define SNTP_SUPPORT_MULTIPLE_SERVERS 1 +#else /* NTP_MAX_SERVERS > 1 */ +#define SNTP_SUPPORT_MULTIPLE_SERVERS 0 +#endif /* NTP_MAX_SERVERS > 1 */ +#else /* SNTP_SUPPORT_MULTIPLE_SERVERS */ +/* The developer has defined SNTP_SUPPORT_MULTIPLE_SERVERS, probably from old code */ +#if SNTP_MAX_SERVERS <= 1 +#error "SNTP_MAX_SERVERS needs to be defined to the max amount of servers if SNTP_SUPPORT_MULTIPLE_SERVERS is defined" +#endif /* SNTP_MAX_SERVERS <= 1 */ +#endif /* SNTP_SUPPORT_MULTIPLE_SERVERS */ + + +/** Sanity check: + * Define this to + * - 0 to turn off sanity checks (default; smaller code) + * - >= 1 to check address and port of the response packet to ensure the + * response comes from the server we sent the request to. + * - >= 2 to check returned Originate Timestamp against Transmit Timestamp + * sent to the server (to ensure response to older request). + * - >= 3 @todo: discard reply if any of the LI, Stratum, or Transmit Timestamp + * fields is 0 or the Mode field is not 4 (unicast) or 5 (broadcast). + * - >= 4 @todo: to check that the Root Delay and Root Dispersion fields are each + * greater than or equal to 0 and less than infinity, where infinity is + * currently a cozy number like one second. This check avoids using a + * server whose synchronization source has expired for a very long time. + */ +#ifndef SNTP_CHECK_RESPONSE +#define SNTP_CHECK_RESPONSE 0 +#endif + +/** According to the RFC, this shall be a random delay + * between 1 and 5 minutes (in milliseconds) to prevent load peaks. + * This can be defined to a random generation function, + * which must return the delay in milliseconds as u32_t. + * Turned off by default. + */ +#ifndef SNTP_STARTUP_DELAY +#define SNTP_STARTUP_DELAY 0 +#endif + +/** If you want the startup delay to be a function, define this + * to a function (including the brackets) and define SNTP_STARTUP_DELAY to 1. + */ +#ifndef SNTP_STARTUP_DELAY_FUNC +#define SNTP_STARTUP_DELAY_FUNC SNTP_STARTUP_DELAY +#endif + +/** SNTP receive timeout - in milliseconds + * Also used as retry timeout - this shouldn't be too low. + * Default is 3 seconds. + */ +#ifndef SNTP_RECV_TIMEOUT +#define SNTP_RECV_TIMEOUT 3000 +#endif + +/** SNTP update delay - in milliseconds + * Default is 1 hour. + */ +#ifndef SNTP_UPDATE_DELAY +#define SNTP_UPDATE_DELAY 3600000 +#endif +#if (SNTP_UPDATE_DELAY < 15000) && !SNTP_SUPPRESS_DELAY_CHECK +#error "SNTPv4 RFC 4330 enforces a minimum update time of 15 seconds!" +#endif + +/** SNTP macro to change system time and/or the update the RTC clock */ +#ifndef SNTP_SET_SYSTEM_TIME +#define SNTP_SET_SYSTEM_TIME(sec) ((void)sec) +#endif + +/** SNTP macro to change system time including microseconds */ +uint8 sntp_receive_time_size = 1; +#define SNTP_RECEIVE_TIME_SIZE sntp_receive_time_size +#define SNTP_SET_SYSTEM_TIME_US(sec, us) sntp_update_rtc(sec, us) +//#ifdef SNTP_SET_SYSTEM_TIME_US +//#define SNTP_SET_SYSTEM_TIME_US(sec, us) sntp_update_rtc(sec, us) +//#define SNTP_CALC_TIME_US 1 +//#define SNTP_RECEIVE_TIME_SIZE 2 +//#else +//#define SNTP_SET_SYSTEM_TIME_US(sec, us) +//#define SNTP_CALC_TIME_US 0 +//#define SNTP_RECEIVE_TIME_SIZE sntp_receive_time_size +//#endif + +/** SNTP macro to get system time, used with SNTP_CHECK_RESPONSE >= 2 + * to send in request and compare in response. + */ +#ifndef SNTP_GET_SYSTEM_TIME +#define SNTP_GET_SYSTEM_TIME(sec, us) do { (sec) = 0; (us) = 0; } while(0) +#endif + +/** Default retry timeout (in milliseconds) if the response + * received is invalid. + * This is doubled with each retry until SNTP_RETRY_TIMEOUT_MAX is reached. + */ +#ifndef SNTP_RETRY_TIMEOUT +#define SNTP_RETRY_TIMEOUT SNTP_RECV_TIMEOUT +#endif + +/** Maximum retry timeout (in milliseconds). */ +#ifndef SNTP_RETRY_TIMEOUT_MAX +#define SNTP_RETRY_TIMEOUT_MAX (SNTP_RETRY_TIMEOUT * 10) +#endif + +/** Increase retry timeout with every retry sent + * Default is on to conform to RFC. + */ +#ifndef SNTP_RETRY_TIMEOUT_EXP +#define SNTP_RETRY_TIMEOUT_EXP 1 +#endif + +/* the various debug levels for this file */ +#define SNTP_DEBUG_TRACE (SNTP_DEBUG | LWIP_DBG_TRACE) +#define SNTP_DEBUG_STATE (SNTP_DEBUG | LWIP_DBG_STATE) +#define SNTP_DEBUG_WARN (SNTP_DEBUG | LWIP_DBG_LEVEL_WARNING) +#define SNTP_DEBUG_WARN_STATE (SNTP_DEBUG | LWIP_DBG_LEVEL_WARNING | LWIP_DBG_STATE) +#define SNTP_DEBUG_SERIOUS (SNTP_DEBUG | LWIP_DBG_LEVEL_SERIOUS) + +#define SNTP_ERR_KOD 1 + +/* SNTP protocol defines */ +#define SNTP_MSG_LEN 48 + +#define SNTP_OFFSET_LI_VN_MODE 0 +#define SNTP_LI_MASK 0xC0 +#define SNTP_LI_NO_WARNING 0x00 +#define SNTP_LI_LAST_MINUTE_61_SEC 0x01 +#define SNTP_LI_LAST_MINUTE_59_SEC 0x02 +#define SNTP_LI_ALARM_CONDITION 0x03 /* (clock not synchronized) */ + +#define SNTP_VERSION_MASK 0x38 +#define SNTP_VERSION (4/* NTP Version 4*/<<3) + +#define SNTP_MODE_MASK 0x07 +#define SNTP_MODE_CLIENT 0x03 +#define SNTP_MODE_SERVER 0x04 +#define SNTP_MODE_BROADCAST 0x05 + +#define SNTP_OFFSET_STRATUM 1 +#define SNTP_STRATUM_KOD 0x00 + +#define SNTP_OFFSET_ORIGINATE_TIME 24 +#define SNTP_OFFSET_RECEIVE_TIME 32 +#define SNTP_OFFSET_TRANSMIT_TIME 40 + +/* number of seconds between 1900 and 1970 */ +#define DIFF_SEC_1900_1970 (2208988800UL) + +/** + * SNTP packet format (without optional fields) + * Timestamps are coded as 64 bits: + * - 32 bits seconds since Jan 01, 1970, 00:00 + * - 32 bits seconds fraction (0-padded) + * For future use, if the MSB in the seconds part is set, seconds are based + * on Feb 07, 2036, 06:28:16. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +#define PACK_STRUCT_FLD_8 PACK_STRUCT_FIELD +struct sntp_msg { + PACK_STRUCT_FLD_8(u8_t li_vn_mode); + PACK_STRUCT_FLD_8(u8_t stratum); + PACK_STRUCT_FLD_8(u8_t poll); + PACK_STRUCT_FLD_8(u8_t precision); + PACK_STRUCT_FIELD(u32_t root_delay); + PACK_STRUCT_FIELD(u32_t root_dispersion); + PACK_STRUCT_FIELD(u32_t reference_identifier); + PACK_STRUCT_FIELD(u32_t reference_timestamp[2]); + PACK_STRUCT_FIELD(u32_t originate_timestamp[2]); + PACK_STRUCT_FIELD(u32_t receive_timestamp[2]); + PACK_STRUCT_FIELD(u32_t transmit_timestamp[2]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/* function prototypes */ +static void sntp_request(void *arg); + +/** The UDP pcb used by the SNTP client */ +static struct udp_pcb* sntp_pcb; + +sint8 time_zone = 8; +/** Names/Addresses of servers */ +struct sntp_server { +#if SNTP_SERVER_DNS + char name[32]; +#endif /* SNTP_SERVER_DNS */ + ip_addr_t addr; +}; +static struct sntp_server sntp_servers[SNTP_MAX_SERVERS]; + +static u8_t sntp_set_servers_from_dhcp; +#if SNTP_SUPPORT_MULTIPLE_SERVERS +/** The currently used server (initialized to 0) */ +static u8_t sntp_current_server; +#else /* SNTP_SUPPORT_MULTIPLE_SERVERS */ +#define sntp_current_server 0 +#endif /* SNTP_SUPPORT_MULTIPLE_SERVERS */ + +#if SNTP_RETRY_TIMEOUT_EXP +#define SNTP_RESET_RETRY_TIMEOUT() sntp_retry_timeout = SNTP_RETRY_TIMEOUT +/** Retry time, initialized with SNTP_RETRY_TIMEOUT and doubled with each retry. */ +static u32_t sntp_retry_timeout; +#else /* SNTP_RETRY_TIMEOUT_EXP */ +#define SNTP_RESET_RETRY_TIMEOUT() +#define sntp_retry_timeout SNTP_RETRY_TIMEOUT +#endif /* SNTP_RETRY_TIMEOUT_EXP */ + +#if SNTP_CHECK_RESPONSE >= 1 +/** Saves the last server address to compare with response */ +static ip_addr_t sntp_last_server_address; +#endif /* SNTP_CHECK_RESPONSE >= 1 */ + +#if SNTP_CHECK_RESPONSE >= 2 +/** Saves the last timestamp sent (which is sent back by the server) + * to compare against in response */ +static u32_t sntp_last_timestamp_sent[2]; +#endif /* SNTP_CHECK_RESPONSE >= 2 */ + +//uint32 current_stamp_1 = 0; +//uint32 current_stamp_2 = 0; +static bool sntp_time_flag = false; +static uint32 sntp_update_delay = SNTP_UPDATE_DELAY; +static uint64 realtime_stamp = 0; +LOCAL os_timer_t sntp_timer; +/*****************************************/ +#define SECSPERMIN 60L +#define MINSPERHOUR 60L +#define HOURSPERDAY 24L +#define SECSPERHOUR (SECSPERMIN * MINSPERHOUR) +#define SECSPERDAY (SECSPERHOUR * HOURSPERDAY) +#define DAYSPERWEEK 7 +#define MONSPERYEAR 12 + +#define YEAR_BASE 1900 +#define EPOCH_YEAR 1970 +#define EPOCH_WDAY 4 +#define EPOCH_YEARS_SINCE_LEAP 2 +#define EPOCH_YEARS_SINCE_CENTURY 70 +#define EPOCH_YEARS_SINCE_LEAP_CENTURY 370 + +#define isleap(y) ((((y) % 4) == 0 && ((y) % 100) != 0) || ((y) % 400) == 0) + +int __tznorth; +int __tzyear; +char reult[100]; +static const int mon_lengths[2][12] = { + {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}, + {31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31} +} ; + +static const int year_lengths[2] = { + 365, + 366 +} ; + +struct tm res_buf; + +__tzrule_type sntp__tzrule[2]; +struct tm * ICACHE_FLASH_ATTR +sntp_mktm_r(const time_t * tim_p ,struct tm *res ,int is_gmtime) +{ + long days, rem; + time_t lcltime; + int i; + int y; + int yleap; + const int *ip; + + /* base decision about std/dst time on current time */ + lcltime = *tim_p; + + days = ((long)lcltime) / SECSPERDAY; + rem = ((long)lcltime) % SECSPERDAY; + while (rem < 0) + { + rem += SECSPERDAY; + --days; + } + while (rem >= SECSPERDAY) + { + rem -= SECSPERDAY; + ++days; + } + + /* compute hour, min, and sec */ + res->tm_hour = (int) (rem / SECSPERHOUR); + rem %= SECSPERHOUR; + res->tm_min = (int) (rem / SECSPERMIN); + res->tm_sec = (int) (rem % SECSPERMIN); + + /* compute day of week */ + if ((res->tm_wday = ((EPOCH_WDAY + days) % DAYSPERWEEK)) < 0) + res->tm_wday += DAYSPERWEEK; + + /* compute year & day of year */ + y = EPOCH_YEAR; + if (days >= 0) + { + for (;;) + { + yleap = isleap(y); + if (days < year_lengths[yleap]) + break; + y++; + days -= year_lengths[yleap]; + } + } + else + { + do + { + --y; + yleap = isleap(y); + days += year_lengths[yleap]; + } while (days < 0); + } + + res->tm_year = y - YEAR_BASE; + res->tm_yday = days; + ip = mon_lengths[yleap]; + for (res->tm_mon = 0; days >= ip[res->tm_mon]; ++res->tm_mon) + days -= ip[res->tm_mon]; + res->tm_mday = days + 1; + + if (!is_gmtime) + { + int offset; + int hours, mins, secs; + +// TZ_LOCK; +// if (_daylight) +// { +// if (y == __tzyear || __tzcalc_limits (y)) +// res->tm_isdst = (__tznorth +// ? (*tim_p >= __tzrule[0].change && *tim_p < __tzrule[1].change) +// : (*tim_p >= __tzrule[0].change || *tim_p < __tzrule[1].change)); +// else +// res->tm_isdst = -1; +// } +// else + res->tm_isdst = 0; + + offset = (res->tm_isdst == 1 ? sntp__tzrule[1].offset : sntp__tzrule[0].offset); + + hours = offset / SECSPERHOUR; + offset = offset % SECSPERHOUR; + + mins = offset / SECSPERMIN; + secs = offset % SECSPERMIN; + + res->tm_sec -= secs; + res->tm_min -= mins; + res->tm_hour -= hours; + + if (res->tm_sec >= SECSPERMIN) + { + res->tm_min += 1; + res->tm_sec -= SECSPERMIN; + } + else if (res->tm_sec < 0) + { + res->tm_min -= 1; + res->tm_sec += SECSPERMIN; + } + if (res->tm_min >= MINSPERHOUR) + { + res->tm_hour += 1; + res->tm_min -= MINSPERHOUR; + } + else if (res->tm_min < 0) + { + res->tm_hour -= 1; + res->tm_min += MINSPERHOUR; + } + if (res->tm_hour >= HOURSPERDAY) + { + ++res->tm_yday; + ++res->tm_wday; + if (res->tm_wday > 6) + res->tm_wday = 0; + ++res->tm_mday; + res->tm_hour -= HOURSPERDAY; + if (res->tm_mday > ip[res->tm_mon]) + { + res->tm_mday -= ip[res->tm_mon]; + res->tm_mon += 1; + if (res->tm_mon == 12) + { + res->tm_mon = 0; + res->tm_year += 1; + res->tm_yday = 0; + } + } + } + else if (res->tm_hour < 0) + { + res->tm_yday -= 1; + res->tm_wday -= 1; + if (res->tm_wday < 0) + res->tm_wday = 6; + res->tm_mday -= 1; + res->tm_hour += 24; + if (res->tm_mday == 0) + { + res->tm_mon -= 1; + if (res->tm_mon < 0) + { + res->tm_mon = 11; + res->tm_year -= 1; + res->tm_yday = 365 + isleap(res->tm_year); + } + res->tm_mday = ip[res->tm_mon]; + } + } +// TZ_UNLOCK; + } + else + res->tm_isdst = 0; +// os_printf("res %d %d %d %d %d\n",res->tm_year,res->tm_mon,res->tm_mday,res->tm_yday,res->tm_hour); + return (res); +} +struct tm * ICACHE_FLASH_ATTR +sntp_localtime_r(const time_t * tim_p , + struct tm *res) +{ + return sntp_mktm_r (tim_p, res, 0); +} + +struct tm * ICACHE_FLASH_ATTR +sntp_localtime(const time_t * tim_p) +{ + return sntp_localtime_r (tim_p, &res_buf); +} + + +int ICACHE_FLASH_ATTR +sntp__tzcalc_limits(int year) +{ + int days, year_days, years; + int i, j; + + if (year < EPOCH_YEAR) + return 0; + + __tzyear = year; + + years = (year - EPOCH_YEAR); + + year_days = years * 365 + + (years - 1 + EPOCH_YEARS_SINCE_LEAP) / 4 - (years - 1 + EPOCH_YEARS_SINCE_CENTURY) / 100 + + (years - 1 + EPOCH_YEARS_SINCE_LEAP_CENTURY) / 400; + + for (i = 0; i < 2; ++i) + { + if (sntp__tzrule[i].ch == 'J') + days = year_days + sntp__tzrule[i].d + (isleap(year) && sntp__tzrule[i].d >= 60); + else if (sntp__tzrule[i].ch == 'D') + days = year_days + sntp__tzrule[i].d; + else + { + int yleap = isleap(year); + int m_day, m_wday, wday_diff; + const int *ip = mon_lengths[yleap]; + + days = year_days; + + for (j = 1; j < sntp__tzrule[i].m; ++j) + days += ip[j-1]; + + m_wday = (EPOCH_WDAY + days) % DAYSPERWEEK; + + wday_diff = sntp__tzrule[i].d - m_wday; + if (wday_diff < 0) + wday_diff += DAYSPERWEEK; + m_day = (sntp__tzrule[i].n - 1) * DAYSPERWEEK + wday_diff; + + while (m_day >= ip[j-1]) + m_day -= DAYSPERWEEK; + + days += m_day; + } + + /* store the change-over time in GMT form by adding offset */ + sntp__tzrule[i].change = days * SECSPERDAY + sntp__tzrule[i].s + sntp__tzrule[i].offset; + } + + __tznorth = (sntp__tzrule[0].change < sntp__tzrule[1].change); + + return 1; +} + +char * ICACHE_FLASH_ATTR +sntp_asctime_r(struct tm *tim_p ,char *result) +{ + static const char day_name[7][4] = { + "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat" + }; + static const char mon_name[12][4] = { + "Jan", "Feb", "Mar", "Apr", "May", "Jun", + "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" + }; + os_sprintf (result, "%s %s %02d %02d:%02d:%02d %02d\n", + day_name[tim_p->tm_wday], + mon_name[tim_p->tm_mon], + tim_p->tm_mday, tim_p->tm_hour, tim_p->tm_min, + tim_p->tm_sec, 1900 + tim_p->tm_year); + return result; +} +char *ICACHE_FLASH_ATTR +sntp_asctime(struct tm *tim_p) +{ + + return sntp_asctime_r (tim_p, reult); +} + +uint64 sntp_get_current_timestamp() +{ + if(realtime_stamp == 0){ + os_printf("please start sntp first !\n"); + return 0; + } else { + return realtime_stamp; + } +} + +char* sntp_get_real_time(time_t t) +{ + return sntp_asctime(sntp_localtime (&t)); +} +/** + * SNTP get time_zone default GMT + 8 + */ +sint8 ICACHE_FLASH_ATTR +sntp_get_timezone(void) +{ + return time_zone; +} +/** + * SNTP set time_zone default GMT + 8 + */ + +bool ICACHE_FLASH_ATTR +sntp_set_timezone(sint8 timezone) +{ + if(timezone >= -11 || timezone <= 13) { + if (sntp_get_timetype()){ + RTC_TZ_SET(time_zone); + } else + time_zone = timezone; + return true; + } else { + return false; + } + +} + +void ICACHE_FLASH_ATTR sntp_set_daylight(int daylight) +{ + if (sntp_get_timetype()){ + RTC_DST_SET(daylight); + } +} + +void ICACHE_FLASH_ATTR +sntp_time_inc(void) +{ + realtime_stamp++; +} +/** + * SNTP processing of received timestamp + */ +static void ICACHE_FLASH_ATTR +sntp_process(u32_t *receive_timestamp) +{ + /* convert SNTP time (1900-based) to unix GMT time (1970-based) + * @todo: if MSB is 1, SNTP time is 2036-based! + */ + time_t t = (ntohl(receive_timestamp[0]) - DIFF_SEC_1900_1970); + if (sntp_get_timetype()){ + u32_t us = ntohl(receive_timestamp[1]) / 4295; + SNTP_SET_SYSTEM_TIME_US(t, us); + /* display local time from GMT time */ + LWIP_DEBUGF(SNTP_DEBUG_TRACE, ("sntp_process: %s, %"U32_F" us", ctime(&t), us)); + } else{ + /* change system time and/or the update the RTC clock */ + SNTP_SET_SYSTEM_TIME(t); + /* display local time from GMT time */ + t += time_zone * 60 * 60;// format GMT + time_zone TIME ZONE + realtime_stamp = t; + os_timer_disarm(&sntp_timer); + os_timer_setfn(&sntp_timer, (os_timer_func_t *)sntp_time_inc, NULL); + os_timer_arm(&sntp_timer, 1000, 1); + } +#if 0 +#if SNTP_CALC_TIME_US + u32_t us = ntohl(receive_timestamp[1]) / 4295; + SNTP_SET_SYSTEM_TIME_US(t, us); + /* display local time from GMT time */ + LWIP_DEBUGF(SNTP_DEBUG_TRACE, ("sntp_process: %s, %"U32_F" us", ctime(&t), us)); + +#else /* SNTP_CALC_TIME_US */ + + /* change system time and/or the update the RTC clock */ + SNTP_SET_SYSTEM_TIME(t); + /* display local time from GMT time */ + t += time_zone * 60 * 60;// format GMT + time_zone TIME ZONE + realtime_stamp = t; + os_timer_disarm(&sntp_timer); + os_timer_setfn(&sntp_timer, (os_timer_func_t *)sntp_time_inc, NULL); + os_timer_arm(&sntp_timer, 1000, 1); +#endif /* SNTP_CALC_TIME_US */ +#endif +} + +/** + * Initialize request struct to be sent to server. + */ +static void ICACHE_FLASH_ATTR +sntp_initialize_request(struct sntp_msg *req) +{ + os_memset(req, 0, SNTP_MSG_LEN); + req->li_vn_mode = SNTP_LI_NO_WARNING | SNTP_VERSION | SNTP_MODE_CLIENT; + +#if SNTP_CHECK_RESPONSE >= 2 + { + u32_t sntp_time_sec, sntp_time_us; + /* fill in transmit timestamp and save it in 'sntp_last_timestamp_sent' */ + SNTP_GET_SYSTEM_TIME(sntp_time_sec, sntp_time_us); + sntp_last_timestamp_sent[0] = htonl(sntp_time_sec + DIFF_SEC_1900_1970); + req->transmit_timestamp[0] = sntp_last_timestamp_sent[0]; + /* we send/save us instead of fraction to be faster... */ + sntp_last_timestamp_sent[1] = htonl(sntp_time_us); + req->transmit_timestamp[1] = sntp_last_timestamp_sent[1]; + } +#endif /* SNTP_CHECK_RESPONSE >= 2 */ +} + +/** + * Retry: send a new request (and increase retry timeout). + * + * @param arg is unused (only necessary to conform to sys_timeout) + */ +static void ICACHE_FLASH_ATTR +sntp_retry(void* arg) +{ + LWIP_UNUSED_ARG(arg); + + LWIP_DEBUGF(SNTP_DEBUG_STATE, ("sntp_retry: Next request will be sent in %"U32_F" ms\n", + sntp_retry_timeout)); + + /* set up a timer to send a retry and increase the retry delay */ + sys_timeout(sntp_retry_timeout, sntp_request, NULL); + +#if SNTP_RETRY_TIMEOUT_EXP + { + u32_t new_retry_timeout; + /* increase the timeout for next retry */ + new_retry_timeout = sntp_retry_timeout << 1; + /* limit to maximum timeout and prevent overflow */ + if ((new_retry_timeout <= SNTP_RETRY_TIMEOUT_MAX) && + (new_retry_timeout > sntp_retry_timeout)) { + sntp_retry_timeout = new_retry_timeout; + } + } +#endif /* SNTP_RETRY_TIMEOUT_EXP */ +} + +#if SNTP_SUPPORT_MULTIPLE_SERVERS +/** + * If Kiss-of-Death is received (or another packet parsing error), + * try the next server or retry the current server and increase the retry + * timeout if only one server is available. + * (implicitly, SNTP_MAX_SERVERS > 1) + * + * @param arg is unused (only necessary to conform to sys_timeout) + */ +static void +sntp_try_next_server(void* arg) +{ + u8_t old_server, i; + LWIP_UNUSED_ARG(arg); + + old_server = sntp_current_server; + for (i = 0; i < SNTP_MAX_SERVERS - 1; i++) { + sntp_current_server++; + if (sntp_current_server >= SNTP_MAX_SERVERS) { + sntp_current_server = 0; + } + if (!ip_addr_isany(&sntp_servers[sntp_current_server].addr) +#if SNTP_SERVER_DNS + || ((sntp_servers[sntp_current_server].name != NULL) && os_strlen(sntp_servers[sntp_current_server].name)) +#endif + ) { + LWIP_DEBUGF(SNTP_DEBUG_STATE, ("sntp_try_next_server: Sending request to server %"U16_F"\n", + (u16_t)sntp_current_server)); + /* new server: reset retry timeout */ + SNTP_RESET_RETRY_TIMEOUT(); + /* instantly send a request to the next server */ + sntp_request(NULL); + return; + } + } + /* no other valid server found */ + sntp_current_server = old_server; + sntp_retry(NULL); +} +#else /* SNTP_SUPPORT_MULTIPLE_SERVERS */ +/* Always retry on error if only one server is supported */ +#define sntp_try_next_server sntp_retry +#endif /* SNTP_SUPPORT_MULTIPLE_SERVERS */ + +/** UDP recv callback for the sntp pcb */ +static void ICACHE_FLASH_ATTR +sntp_recv(void *arg, struct udp_pcb* pcb, struct pbuf *p, ip_addr_t *addr, u16_t port) +{ + u8_t mode; + u8_t stratum; + u32_t receive_timestamp[SNTP_RECEIVE_TIME_SIZE]; + err_t err; +//os_printf("sntp_recv\n"); + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + + /* packet received: stop retry timeout */ + sys_untimeout(sntp_try_next_server, NULL); + sys_untimeout(sntp_request, NULL); + + err = ERR_ARG; +#if SNTP_CHECK_RESPONSE >= 1 + /* check server address and port */ + if (ip_addr_cmp(addr, &sntp_last_server_address) && + (port == SNTP_PORT)) +#else /* SNTP_CHECK_RESPONSE >= 1 */ + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); +#endif /* SNTP_CHECK_RESPONSE >= 1 */ + { + /* process the response */ + if (p->tot_len == SNTP_MSG_LEN) { + pbuf_copy_partial(p, &mode, 1, SNTP_OFFSET_LI_VN_MODE); + mode &= SNTP_MODE_MASK; + /* if this is a SNTP response... */ + if ((mode == SNTP_MODE_SERVER) || + (mode == SNTP_MODE_BROADCAST)) { + pbuf_copy_partial(p, &stratum, 1, SNTP_OFFSET_STRATUM); + if (stratum == SNTP_STRATUM_KOD) { + /* Kiss-of-death packet. Use another server or increase UPDATE_DELAY. */ + err = SNTP_ERR_KOD; + LWIP_DEBUGF(SNTP_DEBUG_STATE, ("sntp_recv: Received Kiss-of-Death\n")); + } else { +#if SNTP_CHECK_RESPONSE >= 2 + /* check originate_timetamp against sntp_last_timestamp_sent */ + u32_t originate_timestamp[2]; + pbuf_copy_partial(p, &originate_timestamp, 8, SNTP_OFFSET_ORIGINATE_TIME); + if ((originate_timestamp[0] != sntp_last_timestamp_sent[0]) || + (originate_timestamp[1] != sntp_last_timestamp_sent[1])) + { + LWIP_DEBUGF(SNTP_DEBUG_WARN, ("sntp_recv: Invalid originate timestamp in response\n")); + } else +#endif /* SNTP_CHECK_RESPONSE >= 2 */ + /* @todo: add code for SNTP_CHECK_RESPONSE >= 3 and >= 4 here */ + { + /* correct answer */ + err = ERR_OK; + pbuf_copy_partial(p, &receive_timestamp, SNTP_RECEIVE_TIME_SIZE * 4, SNTP_OFFSET_RECEIVE_TIME); + } + } + } else { + LWIP_DEBUGF(SNTP_DEBUG_WARN, ("sntp_recv: Invalid mode in response: %"U16_F"\n", (u16_t)mode)); + } + } else { + LWIP_DEBUGF(SNTP_DEBUG_WARN, ("sntp_recv: Invalid packet length: %"U16_F"\n", p->tot_len)); + } + } + pbuf_free(p); + if (err == ERR_OK) { + /* Correct response, reset retry timeout */ + SNTP_RESET_RETRY_TIMEOUT(); + + sntp_process(receive_timestamp); + + /* Set up timeout for next request */ + sys_timeout((u32_t)sntp_update_delay, sntp_request, NULL); + LWIP_DEBUGF(SNTP_DEBUG_STATE, ("sntp_recv: Scheduled next time request: %"U32_F" ms\n", + (u32_t)sntp_update_delay)); + } else if (err == SNTP_ERR_KOD) { + /* Kiss-of-death packet. Use another server or increase UPDATE_DELAY. */ + sntp_try_next_server(NULL); + } else { + /* another error, try the same server again */ + sntp_retry(NULL); + } +} + +/** Actually send an sntp request to a server. + * + * @param server_addr resolved IP address of the SNTP server + */ +static void ICACHE_FLASH_ATTR +sntp_send_request(ip_addr_t *server_addr) +{ + struct pbuf* p; +// os_printf("sntp_send_request\n"); + p = pbuf_alloc(PBUF_TRANSPORT, SNTP_MSG_LEN, PBUF_RAM); + if (p != NULL) { + struct sntp_msg *sntpmsg = (struct sntp_msg *)p->payload; + LWIP_DEBUGF(SNTP_DEBUG_STATE, ("sntp_send_request: Sending request to server\n")); + /* initialize request message */ + sntp_initialize_request(sntpmsg); + /* send request */ + udp_sendto(sntp_pcb, p, server_addr, SNTP_PORT); + /* free the pbuf after sending it */ + pbuf_free(p); + /* set up receive timeout: try next server or retry on timeout */ + sys_timeout((u32_t)SNTP_RECV_TIMEOUT, sntp_try_next_server, NULL); +#if SNTP_CHECK_RESPONSE >= 1 + /* save server address to verify it in sntp_recv */ + ip_addr_set(&sntp_last_server_address, server_addr); +#endif /* SNTP_CHECK_RESPONSE >= 1 */ + } else { + LWIP_DEBUGF(SNTP_DEBUG_SERIOUS, ("sntp_send_request: Out of memory, trying again in %"U32_F" ms\n", + (u32_t)SNTP_RETRY_TIMEOUT)); + /* out of memory: set up a timer to send a retry */ + sys_timeout((u32_t)SNTP_RETRY_TIMEOUT, sntp_request, NULL); + } +} + +#if SNTP_SERVER_DNS +/** + * DNS found callback when using DNS names as server address. + */ +static void +sntp_dns_found(const char* hostname, ip_addr_t *ipaddr, void *arg) +{ + LWIP_UNUSED_ARG(hostname); + LWIP_UNUSED_ARG(arg); + + if (sntp_pcb == NULL) { + return; + } + + if (ipaddr != NULL) { + /* Address resolved, send request */ + LWIP_DEBUGF(SNTP_DEBUG_STATE, ("sntp_dns_found: Server address resolved, sending request\n")); + sntp_send_request(ipaddr); + } else { + /* DNS resolving failed -> try another server */ + LWIP_DEBUGF(SNTP_DEBUG_WARN_STATE, ("sntp_dns_found: Failed to resolve server address resolved, trying next server\n")); + sntp_try_next_server(NULL); + } +} +#endif /* SNTP_SERVER_DNS */ + +/** + * Send out an sntp request. + * + * @param arg is unused (only necessary to conform to sys_timeout) + */ +static void ICACHE_FLASH_ATTR +sntp_request(void *arg) +{ + ip_addr_t sntp_server_address; + err_t err; + + LWIP_UNUSED_ARG(arg); + + /* initialize SNTP server address */ +#if SNTP_SERVER_DNS + + if (sntp_servers[sntp_current_server].name && os_strlen(sntp_servers[sntp_current_server].name)) { + /* always resolve the name and rely on dns-internal caching & timeout */ + ip_addr_set_any(&sntp_servers[sntp_current_server].addr); + err = dns_gethostbyname(sntp_servers[sntp_current_server].name, &sntp_server_address, + sntp_dns_found, NULL); + if (err == ERR_INPROGRESS) { + /* DNS request sent, wait for sntp_dns_found being called */ + LWIP_DEBUGF(SNTP_DEBUG_STATE, ("sntp_request: Waiting for server address to be resolved.\n")); + return; + } else if (err == ERR_OK) { + sntp_servers[sntp_current_server].addr = sntp_server_address; + } + } else +#endif /* SNTP_SERVER_DNS */ + { + sntp_server_address = sntp_servers[sntp_current_server].addr; +// os_printf("sntp_server_address ip %d\n",sntp_server_address.addr); + err = (ip_addr_isany(&sntp_server_address)) ? ERR_ARG : ERR_OK; + } + + if (err == ERR_OK) { + LWIP_DEBUGF(SNTP_DEBUG_TRACE, ("sntp_request: current server address is %u.%u.%u.%u\n", + ip4_addr1(&sntp_server_address), ip4_addr2(&sntp_server_address), ip4_addr3(&sntp_server_address), ip4_addr4(&sntp_server_address))); + sntp_send_request(&sntp_server_address); + } else { + /* address conversion failed, try another server */ + LWIP_DEBUGF(SNTP_DEBUG_WARN_STATE, ("sntp_request: Invalid server address, trying next server.\n")); + sys_timeout((u32_t)SNTP_RETRY_TIMEOUT, sntp_try_next_server, NULL); + } +} + +/** + * Initialize this module. + * Send out request instantly or after SNTP_STARTUP_DELAY(_FUNC). + */ +void ICACHE_FLASH_ATTR +sntp_init(void) +{ +#ifdef SNTP_SERVER_ADDRESS +#if SNTP_SERVER_DNS + sntp_setservername(0, SNTP_SERVER_ADDRESS); +#else +#error SNTP_SERVER_ADDRESS string not supported SNTP_SERVER_DNS==0 +#endif +#endif /* SNTP_SERVER_ADDRESS */ + + if (sntp_pcb == NULL) { + SNTP_RESET_RETRY_TIMEOUT(); + sntp_pcb = udp_new(); + LWIP_ASSERT("Failed to allocate udp pcb for sntp client", sntp_pcb != NULL); + if (sntp_pcb != NULL) { + udp_recv(sntp_pcb, sntp_recv, NULL); +#if SNTP_STARTUP_DELAY + sys_timeout((u32_t)SNTP_STARTUP_DELAY_FUNC, sntp_request, NULL); +#else + sntp_request(NULL); +#endif + } + } +} + +/** + * Stop this module. + */ +void ICACHE_FLASH_ATTR +sntp_stop(void) +{ + if (sntp_pcb != NULL) { + sys_untimeout(sntp_request, NULL); + udp_remove(sntp_pcb); + sntp_pcb = NULL; + } + os_timer_disarm(&sntp_timer); + realtime_stamp = 0; +} + +#if SNTP_GET_SERVERS_FROM_DHCP +/** + * Config SNTP server handling by IP address, name, or DHCP; clear table + * @param set_servers_from_dhcp enable or disable getting server addresses from dhcp + */ +void +sntp_servermode_dhcp(int set_servers_from_dhcp) +{ + u8_t new_mode = set_servers_from_dhcp ? 1 : 0; + if (sntp_set_servers_from_dhcp != new_mode) { + sntp_set_servers_from_dhcp = new_mode; + } +} +#endif /* SNTP_GET_SERVERS_FROM_DHCP */ + +/** + * Initialize one of the NTP servers by IP address + * + * @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS + * @param dnsserver IP address of the NTP server to set + */ +void ICACHE_FLASH_ATTR +sntp_setserver(u8_t idx, ip_addr_t *server) +{ + if (idx < SNTP_MAX_SERVERS) { + if (server != NULL) { + sntp_servers[idx].addr = (*server); +// os_printf("server ip %d\n",server->addr); + } else { + ip_addr_set_any(&sntp_servers[idx].addr); + } +#if SNTP_SERVER_DNS + //sntp_servers[idx].name = NULL; + os_memset(sntp_servers[idx].name,0x0,sizeof(sntp_servers[idx].name)); +#endif + } +} + +#if LWIP_DHCP && SNTP_GET_SERVERS_FROM_DHCP +/** + * Initialize one of the NTP servers by IP address, required by DHCP + * + * @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS + * @param dnsserver IP address of the NTP server to set + */ +void +dhcp_set_ntp_servers(u8_t num, ip_addr_t *server) +{ + LWIP_DEBUGF(SNTP_DEBUG_TRACE, ("sntp: %s %u.%u.%u.%u as NTP server #%u via DHCP\n", + (sntp_set_servers_from_dhcp ? "Got" : "Rejected"), + ip4_addr1(server), ip4_addr2(server), ip4_addr3(server), ip4_addr4(server), num)); + if (sntp_set_servers_from_dhcp && num) { + u8_t i; + for (i = 0; (i < num) && (i < SNTP_MAX_SERVERS); i++) { + sntp_setserver(i, &server[i]); + } + for (i = num; i < SNTP_MAX_SERVERS; i++) { + sntp_setserver(i, NULL); + } + } +} +#endif /* LWIP_DHCP && SNTP_GET_SERVERS_FROM_DHCP */ + +/** + * Obtain one of the currently configured by IP address (or DHCP) NTP servers + * + * @param numdns the index of the NTP server + * @return IP address of the indexed NTP server or "ip_addr_any" if the NTP + * server has not been configured by address (or at all). + */ +ip_addr_t ICACHE_FLASH_ATTR +sntp_getserver(u8_t idx) +{ + if (idx < SNTP_MAX_SERVERS) { + return sntp_servers[idx].addr; + } + return *IP_ADDR_ANY; +} + +#if SNTP_SERVER_DNS +/** + * Initialize one of the NTP servers by name + * + * @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS + * @param dnsserver DNS name of the NTP server to set, to be resolved at contact time + */ +void ICACHE_FLASH_ATTR +sntp_setservername(u8_t idx, char *server) +{ + if (idx < SNTP_MAX_SERVERS) { + // sntp_servers[idx].name = server; + os_strcpy(sntp_servers[idx].name,server); + } +} + +/** + * Obtain one of the currently configured by name NTP servers. + * + * @param numdns the index of the NTP server + * @return IP address of the indexed NTP server or NULL if the NTP + * server has not been configured by name (or at all) + */ +char * ICACHE_FLASH_ATTR +sntp_getservername(u8_t idx) +{ + if (idx < SNTP_MAX_SERVERS) { + return sntp_servers[idx].name; + } + return NULL; +} +#endif /* SNTP_SERVER_DNS */ + +void ICACHE_FLASH_ATTR +sntp_set_update_delay(uint32 ms) +{ + sntp_update_delay = ms > 15000?ms:15000; +} + +void ICACHE_FLASH_ATTR +sntp_set_timetype(bool type) +{ + sntp_time_flag = type; +} + +bool sntp_get_timetype(void) +{ + return sntp_time_flag; +} + +void ICACHE_FLASH_ATTR +sntp_set_receive_time_size(void) +{ + if (sntp_get_timetype()){ + sntp_receive_time_size = 2; + } else{ + sntp_receive_time_size = 1; + } +} + +#endif /* LWIP_UDP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/stats.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/stats.c new file mode 100755 index 0000000..69f97d4 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/stats.c @@ -0,0 +1,176 @@ +/** + * @file + * Statistics module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_STATS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/stats.h" +#include "lwip/mem.h" + +#include + +struct stats_ lwip_stats; + +void stats_init(void) +{ +#ifdef LWIP_DEBUG +#if MEMP_STATS + const char * memp_names[] = { +#define LWIP_MEMPOOL(name,num,size,desc) desc, +#include "lwip/memp_std.h" + }; + int i; + for (i = 0; i < MEMP_MAX; i++) { + lwip_stats.memp[i].name = memp_names[i]; + } +#endif /* MEMP_STATS */ +#if MEM_STATS + lwip_stats.mem.name = "MEM"; +#endif /* MEM_STATS */ +#endif /* LWIP_DEBUG */ +} + +#if LWIP_STATS_DISPLAY +void +stats_display_proto(struct stats_proto *proto, char *name) +{ + LWIP_PLATFORM_DIAG(("\n%s\n\t", name)); + LWIP_PLATFORM_DIAG(("xmit: %"STAT_COUNTER_F"\n\t", proto->xmit)); + LWIP_PLATFORM_DIAG(("recv: %"STAT_COUNTER_F"\n\t", proto->recv)); + LWIP_PLATFORM_DIAG(("fw: %"STAT_COUNTER_F"\n\t", proto->fw)); + LWIP_PLATFORM_DIAG(("drop: %"STAT_COUNTER_F"\n\t", proto->drop)); + LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", proto->chkerr)); + LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", proto->lenerr)); + LWIP_PLATFORM_DIAG(("memerr: %"STAT_COUNTER_F"\n\t", proto->memerr)); + LWIP_PLATFORM_DIAG(("rterr: %"STAT_COUNTER_F"\n\t", proto->rterr)); + LWIP_PLATFORM_DIAG(("proterr: %"STAT_COUNTER_F"\n\t", proto->proterr)); + LWIP_PLATFORM_DIAG(("opterr: %"STAT_COUNTER_F"\n\t", proto->opterr)); + LWIP_PLATFORM_DIAG(("err: %"STAT_COUNTER_F"\n\t", proto->err)); + LWIP_PLATFORM_DIAG(("cachehit: %"STAT_COUNTER_F"\n", proto->cachehit)); +} + +#if IGMP_STATS +void +stats_display_igmp(struct stats_igmp *igmp) +{ + LWIP_PLATFORM_DIAG(("\nIGMP\n\t")); + LWIP_PLATFORM_DIAG(("xmit: %"STAT_COUNTER_F"\n\t", igmp->xmit)); + LWIP_PLATFORM_DIAG(("recv: %"STAT_COUNTER_F"\n\t", igmp->recv)); + LWIP_PLATFORM_DIAG(("drop: %"STAT_COUNTER_F"\n\t", igmp->drop)); + LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", igmp->chkerr)); + LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", igmp->lenerr)); + LWIP_PLATFORM_DIAG(("memerr: %"STAT_COUNTER_F"\n\t", igmp->memerr)); + LWIP_PLATFORM_DIAG(("proterr: %"STAT_COUNTER_F"\n\t", igmp->proterr)); + LWIP_PLATFORM_DIAG(("rx_v1: %"STAT_COUNTER_F"\n\t", igmp->rx_v1)); + LWIP_PLATFORM_DIAG(("rx_group: %"STAT_COUNTER_F"\n", igmp->rx_group)); + LWIP_PLATFORM_DIAG(("rx_general: %"STAT_COUNTER_F"\n", igmp->rx_general)); + LWIP_PLATFORM_DIAG(("rx_report: %"STAT_COUNTER_F"\n\t", igmp->rx_report)); + LWIP_PLATFORM_DIAG(("tx_join: %"STAT_COUNTER_F"\n\t", igmp->tx_join)); + LWIP_PLATFORM_DIAG(("tx_leave: %"STAT_COUNTER_F"\n\t", igmp->tx_leave)); + LWIP_PLATFORM_DIAG(("tx_report: %"STAT_COUNTER_F"\n\t", igmp->tx_report)); +} +#endif /* IGMP_STATS */ + +#if MEM_STATS || MEMP_STATS +void +stats_display_mem(struct stats_mem *mem, char *name) +{ + LWIP_PLATFORM_DIAG(("\nMEM %s\n\t", name)); + LWIP_PLATFORM_DIAG(("avail: %"U32_F"\n\t", (u32_t)mem->avail)); + LWIP_PLATFORM_DIAG(("used: %"U32_F"\n\t", (u32_t)mem->used)); + LWIP_PLATFORM_DIAG(("max: %"U32_F"\n\t", (u32_t)mem->max)); + LWIP_PLATFORM_DIAG(("err: %"U32_F"\n", (u32_t)mem->err)); +} + +#if MEMP_STATS +void +stats_display_memp(struct stats_mem *mem, int index) +{ + char * memp_names[] = { +#define LWIP_MEMPOOL(name,num,size,desc) desc, +#include "lwip/memp_std.h" + }; + if(index < MEMP_MAX) { + stats_display_mem(mem, memp_names[index]); + } +} +#endif /* MEMP_STATS */ +#endif /* MEM_STATS || MEMP_STATS */ + +#if SYS_STATS +void +stats_display_sys(struct stats_sys *sys) +{ + LWIP_PLATFORM_DIAG(("\nSYS\n\t")); + LWIP_PLATFORM_DIAG(("sem.used: %"U32_F"\n\t", (u32_t)sys->sem.used)); + LWIP_PLATFORM_DIAG(("sem.max: %"U32_F"\n\t", (u32_t)sys->sem.max)); + LWIP_PLATFORM_DIAG(("sem.err: %"U32_F"\n\t", (u32_t)sys->sem.err)); + LWIP_PLATFORM_DIAG(("mutex.used: %"U32_F"\n\t", (u32_t)sys->mutex.used)); + LWIP_PLATFORM_DIAG(("mutex.max: %"U32_F"\n\t", (u32_t)sys->mutex.max)); + LWIP_PLATFORM_DIAG(("mutex.err: %"U32_F"\n\t", (u32_t)sys->mutex.err)); + LWIP_PLATFORM_DIAG(("mbox.used: %"U32_F"\n\t", (u32_t)sys->mbox.used)); + LWIP_PLATFORM_DIAG(("mbox.max: %"U32_F"\n\t", (u32_t)sys->mbox.max)); + LWIP_PLATFORM_DIAG(("mbox.err: %"U32_F"\n\t", (u32_t)sys->mbox.err)); +} +#endif /* SYS_STATS */ + +void +stats_display(void) +{ + s16_t i; + + LINK_STATS_DISPLAY(); + ETHARP_STATS_DISPLAY(); + IPFRAG_STATS_DISPLAY(); + IP_STATS_DISPLAY(); + IGMP_STATS_DISPLAY(); + ICMP_STATS_DISPLAY(); + UDP_STATS_DISPLAY(); + TCP_STATS_DISPLAY(); + MEM_STATS_DISPLAY(); + for (i = 0; i < MEMP_MAX; i++) { + MEMP_STATS_DISPLAY(i); + } + SYS_STATS_DISPLAY(); +} +#endif /* LWIP_STATS_DISPLAY */ + +#endif /* LWIP_STATS */ + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sys.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sys.c new file mode 100755 index 0000000..d3a77de --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sys.c @@ -0,0 +1,66 @@ +/** + * @file + * lwIP Operating System abstraction + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/sys.h" + +/* Most of the functions defined in sys.h must be implemented in the + * architecture-dependent file sys_arch.c */ + +#if !NO_SYS + +/** + * Sleep for some ms. Timeouts are NOT processed while sleeping. + * + * @param ms number of milliseconds to sleep + */ +void +sys_msleep(u32_t ms) +{ + if (ms > 0) { + sys_sem_t delaysem; + err_t err = sys_sem_new(&delaysem, 0); + if (err == ERR_OK) { + sys_arch_sem_wait(&delaysem, ms); + sys_sem_free(&delaysem); + } + } +} + +#endif /* !NO_SYS */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sys_arch.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sys_arch.c new file mode 100755 index 0000000..e79042f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/sys_arch.c @@ -0,0 +1,13 @@ +/* + * copyright (c) 2010 - 2011 espressif system + */ + +#include "c_types.h" +#include "ets_sys.h" +#include "osapi.h" +#include "os_type.h" + +#include "lwip/opt.h" +#include "lwip/sys.h" + +#include "eagle_soc.h" diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp.c new file mode 100755 index 0000000..e4f89c3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp.c @@ -0,0 +1,1673 @@ +/** + * @file + * Transmission Control Protocol for IP + * + * This file contains common functions for the TCP implementation, such as functinos + * for manipulating the data structures and the TCP timer functions. TCP functions + * related to input and output is found in tcp_in.c and tcp_out.c respectively. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/snmp.h" +#include "lwip/tcp.h" +#include "lwip/tcp_impl.h" +#include "lwip/debug.h" +#include "lwip/stats.h" + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +#if TCP_DEBUG +const char tcp_state_str_rodata[][12] ICACHE_RODATA_ATTR = { + "CLOSED", + "LISTEN", + "SYN_SENT", + "SYN_RCVD", + "ESTABLISHED", + "FIN_WAIT_1", + "FIN_WAIT_2", + "CLOSE_WAIT", + "CLOSING", + "LAST_ACK", + "TIME_WAIT" +}; + +char tcp_state_str[12]; +#endif + +/* Incremented every coarse grained timer shot (typically every 500 ms). */ +u32_t tcp_ticks; +const u8_t tcp_backoff[13] ICACHE_RODATA_ATTR = + { 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7}; + /* Times per slowtmr hits */ +const u8_t tcp_persist_backoff[7] ICACHE_RODATA_ATTR = { 3, 6, 12, 24, 48, 96, 120 }; + +/* The TCP PCB lists. */ + +/** List of all TCP PCBs bound but not yet (connected || listening) */ +struct tcp_pcb *tcp_bound_pcbs; +/** List of all TCP PCBs in LISTEN state */ +union tcp_listen_pcbs_t tcp_listen_pcbs; +/** List of all TCP PCBs that are in a state in which + * they accept or send data. */ +struct tcp_pcb *tcp_active_pcbs; +/** List of all TCP PCBs in TIME-WAIT state */ +struct tcp_pcb *tcp_tw_pcbs; + +#define NUM_TCP_PCB_LISTS 4 +#define NUM_TCP_PCB_LISTS_NO_TIME_WAIT 3 +/** An array with all (non-temporary) PCB lists, mainly used for smaller code size */ +struct tcp_pcb ** const tcp_pcb_lists[] ICACHE_RODATA_ATTR = {&tcp_listen_pcbs.pcbs, &tcp_bound_pcbs, + &tcp_active_pcbs, &tcp_tw_pcbs}; + +/** Only used for temporary storage. */ +struct tcp_pcb *tcp_tmp_pcb; + +/** Timer counter to handle calling slow-timer from tcp_tmr() */ +static u8_t tcp_timer; +static u16_t tcp_new_port(void);//����µ�tcp���ض˿� + +int system_get_data_of_array_8(const unsigned char *array, int size); + +/** + * Called periodically to dispatch TCP timers. + * + */ +void +tcp_tmr(void) +{ + /* Call tcp_fasttmr() every 250 ms */ + tcp_fasttmr(); + + if (++tcp_timer & 1) { + /* Call tcp_tmr() every 500 ms, i.e., every other timer + tcp_tmr() is called. */ + tcp_slowtmr(); + } +} + +/** + * Closes the TX side of a connection held by the PCB. + * For tcp_close(), a RST is sent if the application didn't receive all data + * (tcp_recved() not called for all data passed to recv callback). + * + * Listening pcbs are freed and may not be referenced any more. + * Connection pcbs are freed if not yet connected and may not be referenced + * any more. If a connection is established (at least SYN received or in + * a closing state), the connection is closed, and put in a closing state. + * The pcb is then automatically freed in tcp_slowtmr(). It is therefore + * unsafe to reference it. + * + * @param pcb the tcp_pcb to close + * @return ERR_OK if connection has been closed + * another err_t if closing failed and pcb is not freed + */ +static err_t +tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data) +{ + err_t err; + + if (rst_on_unacked_data && (pcb->state != LISTEN)) { + if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND)) { + /* Not all data received by application, send RST to tell the remote + side about this. */ + LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED); + + /* don't call tcp_abort here: we must not deallocate the pcb since + that might not be expected when calling tcp_close */ + tcp_rst(pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, + pcb->local_port, pcb->remote_port); + + tcp_pcb_purge(pcb); + + /* TODO: to which state do we move now? */ + + /* move to TIME_WAIT since we close actively */ + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + + return ERR_OK; + } + } + + switch (pcb->state) { + case CLOSED: + /* Closing a pcb in the CLOSED state might seem erroneous, + * however, it is in this state once allocated and as yet unused + * and the user needs some way to free it should the need arise. + * Calling tcp_close() with a pcb that has already been closed, (i.e. twice) + * or for a pcb that has been used and then entered the CLOSED state + * is erroneous, but this should never happen as the pcb has in those cases + * been freed, and so any remaining handles are bogus. */ + /*��CLOSED״̬�¹ر�һ��pcb�ƺ��Ǵ���ģ� + *������ˣ�һ�������״̬�·����˶��һ�û��ʹ��,�û���ҪһЩ�취���ͷ��� + *����һ���Ѿ����رյ�pcb��tcp_close(),(��2��)����һ���Ѿ���ʹ����֮�󣬽���CLOSE״̬�Ǵ���� + *������Щ����±��ͷŵ�pcb�Dz�����ڵ�,��ˣ��κ�ʣ��ľ���Ǽٵ� + */ + err = ERR_OK;//�趨����ֵ + if (pcb->local_port != 0) { + TCP_RMV(&tcp_bound_pcbs, pcb); + } + memp_free(MEMP_TCP_PCB, pcb);//��MEMP_TCP_PCB�ڴ���趨�ͷŵ���pcb��Ӧ�ĵ�Ԫֵ,�ͷ��ڴ� + pcb = NULL; + break; + case LISTEN: + err = ERR_OK; + tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);//�Ӽ����PCB�б���ɾ���Ӧ��pcb + memp_free(MEMP_TCP_PCB_LISTEN, pcb);//��MEMP_TCP_PCB_LISTEN�ڴ�����趨�ͷŵ�pcb��Ԫֵ ,�ͷ��ڴ� + pcb = NULL; + break; + case SYN_SENT: + err = ERR_OK; + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + pcb = NULL; + snmp_inc_tcpattemptfails(); + break; + case SYN_RCVD: + err = tcp_send_fin(pcb);//���������ر�FIN���ֱ��� + if (err == ERR_OK) { + snmp_inc_tcpattemptfails(); + pcb->state = FIN_WAIT_1;//ת��FIN_WAIT_1״̬ + } + break; + case ESTABLISHED: + err = tcp_send_fin(pcb); + if (err == ERR_OK) { + snmp_inc_tcpestabresets(); + pcb->state = FIN_WAIT_1; + } + break; + case CLOSE_WAIT: + err = tcp_send_fin(pcb); + if (err == ERR_OK) { + snmp_inc_tcpestabresets(); + pcb->state = LAST_ACK;//����LAST_ACK�ȴ�ACK��ʱ + } + break; + default: + /* Has already been closed, do nothing. */ + err = ERR_OK; + pcb = NULL; + break; + } + + if (pcb != NULL && err == ERR_OK) { + /* To ensure all data has been sent when tcp_close returns, we have + to make sure tcp_output doesn't fail. + Since we don't really have to ensure all data has been sent when tcp_close + returns (unsent data is sent from tcp timer functions, also), we don't care + for the return value of tcp_output for now. */ + /* @todo: When implementing SO_LINGER, this must be changed somehow: + If SOF_LINGER is set, the data should be sent and acked before close returns. + This can only be valid for sequential APIs, not for the raw API. */ + tcp_output(pcb);//���ú����Ϳ��ƿ������ʣ��ı��ģ�����FIN���ֱ��Ķ� + } + return err; +} + +/** + * Closes the connection held by the PCB. + * + * Listening pcbs are freed and may not be referenced any more. + * Connection pcbs are freed if not yet connected and may not be referenced + * any more. If a connection is established (at least SYN received or in + * a closing state), the connection is closed, and put in a closing state. + * The pcb is then automatically freed in tcp_slowtmr(). It is therefore + * unsafe to reference it (unless an error is returned). + * + * @param pcb the tcp_pcb to close + * @return ERR_OK if connection has been closed + * another err_t if closing failed and pcb is not freed + */ + /* + *ͨ��PCB�ر��������� + *�����е�pcbӦ�ñ��ͷŵģ�Ҳ����ԶҲ���ᱻʹ���� + *���û�����ӻ�����Ҳû�б�����,���ӵ�pcbӦ�ñ��ͷŵ� + *���һ�����ӱ�����(����SYN�Ѿ������ջ�����һ���ر��е�״̬) + *���ӱ��ر��ˣ�����������һ�����ڹرյ�״̬ + *pcb�Զ���tcp_slowtmr()�ͷ�,�����������Dz���ȫ�� + */ +err_t +tcp_close(struct tcp_pcb *pcb) +{ +#if TCP_DEBUG //TCP debug��Ϣ����ӡpcb��״̬ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in ")); + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ + + if (pcb->state != LISTEN) { + /* Set a flag not to receive any more data... */ + pcb->flags |= TF_RXCLOSED; + } + /* ... and close */ + return tcp_close_shutdown(pcb, 1); +} + +/** + * Causes all or part of a full-duplex connection of this PCB to be shut down. + * This doesn't deallocate the PCB! + * + * @param pcb PCB to shutdown + * @param shut_rx shut down receive side if this is != 0 + * @param shut_tx shut down send side if this is != 0 + * @return ERR_OK if shutdown succeeded (or the PCB has already been shut down) + * another err_t on error. + */ +err_t +tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx) +{ + if (pcb->state == LISTEN) { + return ERR_CONN; + } + if (shut_rx) { + /* shut down the receive side: free buffered data... */ + if (pcb->refused_data != NULL) { + pbuf_free(pcb->refused_data); + pcb->refused_data = NULL; + } + /* ... and set a flag not to receive any more data */ + pcb->flags |= TF_RXCLOSED; + } + if (shut_tx) { + /* This can't happen twice since if it succeeds, the pcb's state is changed. + Only close in these states as the others directly deallocate the PCB */ + switch (pcb->state) { + case SYN_RCVD: + case ESTABLISHED: + case CLOSE_WAIT: + return tcp_close_shutdown(pcb, 0); + default: + /* don't shut down other states */ + break; + } + } + /* @todo: return another err_t if not in correct state or already shut? */ + return ERR_OK; +} + +/** + * Abandons a connection and optionally sends a RST to the remote + * host. Deletes the local protocol control block. This is done when + * a connection is killed because of shortage of memory. + * + * @param pcb the tcp_pcb to abort + * @param reset boolean to indicate whether a reset should be sent + */ +void +tcp_abandon(struct tcp_pcb *pcb, int reset) +{ + u32_t seqno, ackno; + u16_t remote_port, local_port; + ip_addr_t remote_ip, local_ip; +#if LWIP_CALLBACK_API + tcp_err_fn errf; +#endif /* LWIP_CALLBACK_API */ + void *errf_arg; + + /* pcb->state LISTEN not allowed here */ + LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs", + pcb->state != LISTEN); + /* Figure out on which TCP PCB list we are, and remove us. If we + are in an active state, call the receive function associated with + the PCB with a NULL argument, and send an RST to the remote end. */ + if (pcb->state == TIME_WAIT) { + tcp_pcb_remove(&tcp_tw_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else { + seqno = pcb->snd_nxt; + ackno = pcb->rcv_nxt; + ip_addr_copy(local_ip, pcb->local_ip); + ip_addr_copy(remote_ip, pcb->remote_ip); + local_port = pcb->local_port; + remote_port = pcb->remote_port; +#if LWIP_CALLBACK_API + errf = pcb->errf; +#endif /* LWIP_CALLBACK_API */ + errf_arg = pcb->callback_arg; + tcp_pcb_remove(&tcp_active_pcbs, pcb); + if (pcb->unacked != NULL) { + tcp_segs_free(pcb->unacked); + } + if (pcb->unsent != NULL) { + tcp_segs_free(pcb->unsent); + } +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL) { + tcp_segs_free(pcb->ooseq); + } +#endif /* TCP_QUEUE_OOSEQ */ + if (reset) { + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n")); + tcp_rst(seqno, ackno, &local_ip, &remote_ip, local_port, remote_port); + } + TCP_EVENT_ERR(errf, errf_arg, ERR_ABRT); + memp_free(MEMP_TCP_PCB, pcb); + } +} + +/** + * Aborts the connection by sending a RST (reset) segment to the remote + * host. The pcb is deallocated. This function never fails. + * + * ATTENTION: When calling this from one of the TCP callbacks, make + * sure you always return ERR_ABRT (and never return ERR_ABRT otherwise + * or you will risk accessing deallocated memory or memory leaks! + * + * @param pcb the tcp pcb to abort + */ +void +tcp_abort(struct tcp_pcb *pcb) +{ + tcp_abandon(pcb, 1); +} + +/** + * Binds the connection to a local portnumber and IP address. If the + * IP address is not given (i.e., ipaddr == NULL), the IP address of + * the outgoing network interface is used instead. + * + * @param pcb the tcp_pcb to bind (no check is done whether this pcb is + * already bound!) + * @param ipaddr the local ip address to bind to (use IP_ADDR_ANY to bind + * to any local address + * @param port the local port to bind to + * @return ERR_USE if the port is already in use + * ERR_OK if bound + */ +err_t +tcp_bind(struct tcp_pcb *pcb, ip_addr_t *ipaddr, u16_t port) +{ + int i; + int max_pcb_list = NUM_TCP_PCB_LISTS; + struct tcp_pcb *cpcb; + + LWIP_ERROR("tcp_bind: can only bind in state CLOSED", pcb->state == CLOSED, return ERR_ISCONN); + +#if SO_REUSE + /* Unless the REUSEADDR flag is set, + we have to check the pcbs in TIME-WAIT state, also. + We do not dump TIME_WAIT pcb's; they can still be matched by incoming + packets using both local and remote IP addresses and ports to distinguish. + */ + if ((pcb->so_options & SOF_REUSEADDR) != 0) { + max_pcb_list = NUM_TCP_PCB_LISTS_NO_TIME_WAIT; + } +#endif /* SO_REUSE */ + + if (port == 0) { + port = tcp_new_port(); + } + + /* Check if the address already is in use (on all lists) */ + for (i = 0; i < max_pcb_list; i++) { + for(cpcb = *tcp_pcb_lists[i]; cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { +#if SO_REUSE + /* Omit checking for the same port if both pcbs have REUSEADDR set. + For SO_REUSEADDR, the duplicate-check for a 5-tuple is done in + tcp_connect. */ + if (((pcb->so_options & SOF_REUSEADDR) == 0) || + ((cpcb->so_options & SOF_REUSEADDR) == 0)) +#endif /* SO_REUSE */ + { + if (ip_addr_isany(&(cpcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + //os_printf("Address in use\n"); + return ERR_USE; + } + } + } + } + } + + if (!ip_addr_isany(ipaddr)) { + pcb->local_ip = *ipaddr; + } + pcb->local_port = port; + TCP_REG(&tcp_bound_pcbs, pcb); + LWIP_DEBUGF(TCP_DEBUG, ("tcp_bind: bind to port %"U16_F"\n", port)); + return ERR_OK; +} +#if LWIP_CALLBACK_API +/** + * Default accept callback if no accept callback is specified by the user. + */ +static err_t +tcp_accept_null(void *arg, struct tcp_pcb *pcb, err_t err) +{ + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(err); + + return ERR_ABRT; +} +#endif /* LWIP_CALLBACK_API */ + +/** + * Set the state of the connection to be LISTEN, which means that it + * is able to accept incoming connections. The protocol control block + * is reallocated in order to consume less memory. Setting the + * connection to LISTEN is an irreversible process. + *��ij���󶨵Ŀ��ƿ���Ϊ����״̬ + * @param pcb the original tcp_pcb �����Ŀ��ƿ���� + * @param backlog the incoming connections queue limit + * @return tcp_pcb used for listening, consumes less memory.ָ������״̬�Ŀ��ƿ� + * + * @note The original tcp_pcb is freed. This function therefore has to be + * called like this: + * tpcb = tcp_listen(tpcb); + */ +struct tcp_pcb * +tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog) +{ + struct tcp_pcb_listen *lpcb; + + LWIP_UNUSED_ARG(backlog); + LWIP_ERROR("tcp_listen: pcb already connected", pcb->state == CLOSED, return NULL); + + /* already listening? */ + if (pcb->state == LISTEN) { + return pcb; + } +#if SO_REUSE + if ((pcb->so_options & SOF_REUSEADDR) != 0) { + /* Since SOF_REUSEADDR allows reusing a local address before the pcb's usage + is declared (listen-/connection-pcb), we have to make sure now that + this port is only used once for every local IP. */ + for(lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + if (lpcb->local_port == pcb->local_port) { + if (ip_addr_cmp(&lpcb->local_ip, &pcb->local_ip)) { + /* this address/port is already used */ + return NULL; + } + } + } + } +#endif /* SO_REUSE */ + lpcb = (struct tcp_pcb_listen *)memp_malloc(MEMP_TCP_PCB_LISTEN);//�����ڴ�ؿռ� + if (lpcb == NULL) { + return NULL; + } + lpcb->callback_arg = pcb->callback_arg; + lpcb->local_port = pcb->local_port; + lpcb->state = LISTEN; + lpcb->prio = pcb->prio; + lpcb->so_options = pcb->so_options; + lpcb->so_options |= SOF_ACCEPTCONN; + lpcb->ttl = pcb->ttl; + lpcb->tos = pcb->tos; + ip_addr_copy(lpcb->local_ip, pcb->local_ip); + if (pcb->local_port != 0) { + TCP_RMV(&tcp_bound_pcbs, pcb); + } + memp_free(MEMP_TCP_PCB, pcb); +#if LWIP_CALLBACK_API + lpcb->accept = tcp_accept_null;//���ܿͻ������ӵ�Ĭ�ϻص����� +#endif /* LWIP_CALLBACK_API */ +#if TCP_LISTEN_BACKLOG + lpcb->accepts_pending = 0; + lpcb->backlog = (backlog ? backlog : 1); +#endif /* TCP_LISTEN_BACKLOG */ + TCP_REG(&tcp_listen_pcbs.pcbs, (struct tcp_pcb *)lpcb);//���ƿ����tcp_listen_pcbs�����ײ� + return (struct tcp_pcb *)lpcb; +} + +/** + * Update the state that tracks the available window space to advertise. + * + * Returns how much extra window would be advertised if we sent an + * update now. + */ +u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb) +{ + u32_t new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd; + + if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) { + /* we can advertise more window */ + pcb->rcv_ann_wnd = pcb->rcv_wnd; + return new_right_edge - pcb->rcv_ann_right_edge; + } else { + if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) { + /* Can happen due to other end sending out of advertised window, + * but within actual available (but not yet advertised) window */ + pcb->rcv_ann_wnd = 0; + } else { + /* keep the right edge of window constant */ + u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt; + LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff); + pcb->rcv_ann_wnd = (u16_t)new_rcv_ann_wnd; + } + return 0; + } +} + +/** + * This function should be called by the application when it has + * processed the data. The purpose is to advertise a larger window + * when the data has been processed. + *Ӧ�ó�����ݴ�����Ϻ�֪ͨ�ں˸��½��մ��� + * @param pcb the tcp_pcb for which data is read + * @param len the amount of bytes that have been read by the application + */ +void +tcp_recved(struct tcp_pcb *pcb, u16_t len) +{ + int wnd_inflation; + + LWIP_ASSERT("tcp_recved: len would wrap rcv_wnd\n", + len <= 0xffff - pcb->rcv_wnd ); + + pcb->rcv_wnd += len; + if (pcb->rcv_wnd > TCP_WND) { + pcb->rcv_wnd = TCP_WND; + } + + wnd_inflation = tcp_update_rcv_ann_wnd(pcb); + + /* If the change in the right edge of window is significant (default + * watermark is TCP_WND/4), then send an explicit update now. + * Otherwise wait for a packet to be sent in the normal course of + * events (or more window to be available later) */ + if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) { + tcp_ack_now(pcb); + tcp_output(pcb); + } + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: recveived %"U16_F" bytes, wnd %"U16_F" (%"U16_F").\n", + len, pcb->rcv_wnd, TCP_WND - pcb->rcv_wnd)); +} + +/** + * A nastly hack featuring 'goto' statements that allocates a + * new TCP local port. + * + * @return a new (free) local TCP port number + */ +static u16_t +tcp_new_port(void) +{ + int i; + struct tcp_pcb *pcb; +#ifndef TCP_LOCAL_PORT_RANGE_START +#define TCP_LOCAL_PORT_RANGE_START 1024 +#define TCP_LOCAL_PORT_RANGE_END 0x7fff +#endif + static u16_t port = TCP_LOCAL_PORT_RANGE_START; + + again: +// if (++port >= TCP_LOCAL_PORT_RANGE_END) { +// port = TCP_LOCAL_PORT_RANGE_START; +// } + port = os_random(); + port %= TCP_LOCAL_PORT_RANGE_END; + if (port < TCP_LOCAL_PORT_RANGE_START) + port += TCP_LOCAL_PORT_RANGE_START; + /* Check all PCB lists. */ + for (i = 0; i < NUM_TCP_PCB_LISTS; i++) { + for(pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) { + if (pcb->local_port == port) { + goto again; + } + } + } + return port; +} + +/** + * Connects to another host. The function given as the "connected" + * argument will be called when the connection has been established. + *�����������һ��SYN���ֱ��� + * @param pcb the tcp_pcb used to establish the connection �����Ŀ��ƿ���� + * @param ipaddr the remote ip address to connect to ������IP��ַ + * @param port the remote tcp port to connect to �������˿ں� + * @param connected callback function to call when connected (or on error) + * @return ERR_VAL if invalid arguments are given + * ERR_OK if connect request has been sent + * other err_t values if connect request couldn't be sent + */ +err_t +tcp_connect(struct tcp_pcb *pcb, ip_addr_t *ipaddr, u16_t port, + tcp_connected_fn connected) +{ + err_t ret; + u32_t iss; + u16_t old_local_port; + + LWIP_ERROR("tcp_connect: can only connected from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port)); + if (ipaddr != NULL) { + pcb->remote_ip = *ipaddr;//������IP��ַ��Ч�������Ӽ�¼�м�¼��IP��ַ�����򷵻ش��� + } else { + return ERR_VAL; + } + pcb->remote_port = port;//��¼�������˿�(Ŀ�Ķ˿�) + + /* check if we have a route to the remote host */ + if (ip_addr_isany(&(pcb->local_ip))) { + /* no local IP address set, yet. */ + struct netif *netif = ip_route(&(pcb->remote_ip)); + if (netif == NULL) { + /* Don't even try to send a SYN packet if we have no route + since that will fail. */ + return ERR_RTE; + } + /* Use the netif's IP address as local address. */ + ip_addr_copy(pcb->local_ip, netif->ip_addr); + } + + old_local_port = pcb->local_port; + if (pcb->local_port == 0) { + pcb->local_port = tcp_new_port(); + + } +#if SO_REUSE + if ((pcb->so_options & SOF_REUSEADDR) != 0) { + /* Since SOF_REUSEADDR allows reusing a local address, we have to make sure + now that the 5-tuple is unique. */ + struct tcp_pcb *cpcb; + int i; + /* Don't check listen- and bound-PCBs, check active- and TIME-WAIT PCBs. */ + for (i = 2; i < NUM_TCP_PCB_LISTS; i++) { + for(cpcb = *tcp_pcb_lists[i]; cpcb != NULL; cpcb = cpcb->next) { + if ((cpcb->local_port == pcb->local_port) && + (cpcb->remote_port == port) && + ip_addr_cmp(&cpcb->local_ip, &pcb->local_ip) && + ip_addr_cmp(&cpcb->remote_ip, ipaddr)) { + /* linux returns EISCONN here, but ERR_USE should be OK for us */ + return ERR_USE; + } + } + } + } +#endif /* SO_REUSE */ + iss = tcp_next_iss();//��ʼ����� + pcb->rcv_nxt = 0;//���÷��ʹ��ڵĸ����ֶ� + pcb->snd_nxt = iss; + pcb->lastack = iss - 1; + pcb->snd_lbb = iss - 1; + pcb->rcv_wnd = TCP_WND;//����Ĭ�Ͻ��մ��ڸ����ֶ�ֵ + pcb->rcv_ann_wnd = TCP_WND; + pcb->rcv_ann_right_edge = pcb->rcv_nxt; + pcb->snd_wnd = TCP_WND; + /* As initial send MSS, we use TCP_MSS but limit it to 536. + The send MSS is updated when an MSS option is received. */ + pcb->mss = (TCP_MSS > 536) ? 536 : TCP_MSS;//��ʼ������Ķδ�С +#if TCP_CALCULATE_EFF_SEND_MSS + pcb->mss = tcp_eff_send_mss(pcb->mss, ipaddr); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + pcb->cwnd = 1;//��ʼ������� + pcb->ssthresh = pcb->mss * 10; +#if LWIP_CALLBACK_API + pcb->connected = connected;//ע��connected�ص����� +#else /* LWIP_CALLBACK_API */ + LWIP_UNUSED_ARG(connected); +#endif /* LWIP_CALLBACK_API */ + + /* Send a SYN together with the MSS option. */ + ret = tcp_enqueue_flags(pcb, TCP_SYN); + if (ret == ERR_OK) { + /* SYN segment was enqueued, changed the pcbs state now ���ƿ�����ΪSYN_SENT ״̬*/ + pcb->state = SYN_SENT; + if (old_local_port != 0) { + TCP_RMV(&tcp_bound_pcbs, pcb); + } + TCP_REG(&tcp_active_pcbs, pcb); + snmp_inc_tcpactiveopens(); + + tcp_output(pcb);//�����ƿ������ӵı��ķ��ͳ�ȥ + } + return ret; +} + +/** + * Called every 500 ms and implements the retransmission timer and the timer that + * removes PCBs that have been in TIME-WAIT for enough time. It also increments + * various timers such as the inactivity timer in each PCB. + * + * Automatically called from tcp_tmr(). + */ +void +tcp_slowtmr(void) +{ + struct tcp_pcb *pcb, *prev; + u16_t eff_wnd; + u8_t pcb_remove; /* flag if a PCB should be removed */ + u8_t pcb_reset; /* flag if a RST should be sent when removing */ + err_t err; + + err = ERR_OK; + + ++tcp_ticks; + + /* Steps through all of the active PCBs. */ + prev = NULL; + pcb = tcp_active_pcbs; + if (pcb == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n")); + } + while (pcb != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n")); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT); + + pcb_remove = 0; + pcb_reset = 0; + + if (pcb->state == SYN_SENT && pcb->nrtx == TCP_SYNMAXRTX) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n")); + } + else if (pcb->nrtx == TCP_MAXRTX) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n")); + } else { + if (pcb->persist_backoff > 0) { + /* If snd_wnd is zero, use persist timer to send 1 byte probes + * instead of using the standard retransmission mechanism. */ + pcb->persist_cnt++; + if (pcb->persist_cnt >= system_get_data_of_array_8(tcp_persist_backoff, pcb->persist_backoff-1)) { + pcb->persist_cnt = 0; + if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) { + pcb->persist_backoff++; + } + tcp_zero_window_probe(pcb); + } + } else { + /* Increase the retransmission timer if it is running */ + if(pcb->rtime >= 0) + ++pcb->rtime; + + if (pcb->unacked != NULL && pcb->rtime >= pcb->rto) { + /* Time for a retransmission. */ + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_slowtmr: rtime %"S16_F + " pcb->rto %"S16_F"\n", + pcb->rtime, pcb->rto)); + + /* Double retransmission time-out unless we are trying to + * connect to somebody (i.e., we are in SYN_SENT). */ + if (pcb->state != SYN_SENT) { + pcb->rto = ((pcb->sa >> 3) + pcb->sv) << system_get_data_of_array_8(tcp_backoff, pcb->nrtx); +// if (pcb->rto >= TCP_MAXRTO) +// pcb->rto >>= 1; + } + + /* Reset the retransmission timer. */ + pcb->rtime = 0; + + /* Reduce congestion window and ssthresh. */ + eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd); + pcb->ssthresh = eff_wnd >> 1; + if (pcb->ssthresh < (pcb->mss << 1)) { + pcb->ssthresh = (pcb->mss << 1); + } + pcb->cwnd = pcb->mss; + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"U16_F + " ssthresh %"U16_F"\n", + pcb->cwnd, pcb->ssthresh)); + + /* The following needs to be called AFTER cwnd is set to one + mss - STJ */ + tcp_rexmit_rto(pcb); + } + } + } + /* Check if this PCB has stayed too long in FIN-WAIT-2 */ + if (pcb->state == FIN_WAIT_2) { + if ((u32_t)(tcp_ticks - pcb->tmr) > + TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in FIN-WAIT-2\n")); + } + } + + /* Check if KEEPALIVE should be sent */ + if((pcb->so_options & SOF_KEEPALIVE) && + ((pcb->state == ESTABLISHED) || + (pcb->state == CLOSE_WAIT))) { +#if LWIP_TCP_KEEPALIVE + if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + (pcb->keep_cnt*pcb->keep_intvl)) + / TCP_SLOW_INTERVAL) +#else + if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + TCP_MAXIDLE) / TCP_SLOW_INTERVAL) +#endif /* LWIP_TCP_KEEPALIVE */ + { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to %"U16_F".%"U16_F".%"U16_F".%"U16_F".\n", + ip4_addr1_16(&pcb->remote_ip), ip4_addr2_16(&pcb->remote_ip), + ip4_addr3_16(&pcb->remote_ip), ip4_addr4_16(&pcb->remote_ip))); + + ++pcb_remove; + ++pcb_reset; + } +#if LWIP_TCP_KEEPALIVE + else if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + pcb->keep_cnt_sent * pcb->keep_intvl) + / TCP_SLOW_INTERVAL) +#else + else if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEPINTVL_DEFAULT) + / TCP_SLOW_INTERVAL) +#endif /* LWIP_TCP_KEEPALIVE */ + { + tcp_keepalive(pcb); + pcb->keep_cnt_sent++; + } + } + + /* If this PCB has queued out of sequence data, but has been + inactive for too long, will drop the data (it will eventually + be retransmitted). */ +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL && + (u32_t)tcp_ticks - pcb->tmr >= pcb->rto * TCP_OOSEQ_TIMEOUT) { + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n")); + } +#endif /* TCP_QUEUE_OOSEQ */ + + /* Check if this PCB has stayed too long in SYN-RCVD */ + if (pcb->state == SYN_RCVD) { + if ((u32_t)(tcp_ticks - pcb->tmr) > + TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n")); + } + } + + /* Check if this PCB has stayed too long in LAST-ACK */ + if (pcb->state == LAST_ACK) { + if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n")); + } + } + + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + struct tcp_pcb *pcb2; + tcp_pcb_purge(pcb); + /* Remove PCB from tcp_active_pcbs list. */ + if (prev != NULL) { + LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs); + prev->next = pcb->next; + } else { + /* This PCB was the first. */ + LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb); + tcp_active_pcbs = pcb->next; + } + + if (pcb_reset) { + tcp_rst(pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, + pcb->local_port, pcb->remote_port); + } + + TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_ABRT); + pcb2 = pcb; + pcb = pcb->next; + memp_free(MEMP_TCP_PCB, pcb2); + } else { + /* get the 'next' element now and work with 'prev' below (in case of abort) */ + prev = pcb; + pcb = pcb->next; + + /* We check if we should poll the connection. */ + ++prev->polltmr; + if (prev->polltmr >= prev->pollinterval) { + prev->polltmr = 0; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n")); + TCP_EVENT_POLL(prev, err); + /* if err == ERR_ABRT, 'prev' is already deallocated */ + if (err == ERR_OK) { + tcp_output(prev); + } + } + } + } + + + /* Steps through all of the TIME-WAIT PCBs. */ + prev = NULL; + pcb = tcp_tw_pcbs; + while (pcb != NULL) { + LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + pcb_remove = 0; + + /* Check if this PCB has stayed long enough in TIME-WAIT */ + if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { + ++pcb_remove; + } + + + + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + struct tcp_pcb *pcb2; + tcp_pcb_purge(pcb); + /* Remove PCB from tcp_tw_pcbs list. */ + if (prev != NULL) { + LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs); + prev->next = pcb->next; + } else { + /* This PCB was the first. */ + LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb); + tcp_tw_pcbs = pcb->next; + } + pcb2 = pcb; + pcb = pcb->next; + memp_free(MEMP_TCP_PCB, pcb2); + } else { + prev = pcb; + pcb = pcb->next; + } + } +} + +/** + * Is called every TCP_FAST_INTERVAL (250 ms) and process data previously + * "refused" by upper layer (application) and sends delayed ACKs. + * + * Automatically called from tcp_tmr(). + */ +void +tcp_fasttmr(void) +{ + struct tcp_pcb *pcb = tcp_active_pcbs; + + while(pcb != NULL) { + struct tcp_pcb *next = pcb->next; + /* If there is data which was previously "refused" by upper layer */ + if (pcb->refused_data != NULL) { + /* Notify again application with data previously received. */ + err_t err; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_fasttmr: notify kept packet\n")); + TCP_EVENT_RECV(pcb, pcb->refused_data, ERR_OK, err); + if (err == ERR_OK) { + pcb->refused_data = NULL; + } else if (err == ERR_ABRT) { + /* if err == ERR_ABRT, 'pcb' is already deallocated */ + pcb = NULL; + } + } + + /* send delayed ACKs */ + if (pcb && (pcb->flags & TF_ACK_DELAY)) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n")); + tcp_ack_now(pcb); + tcp_output(pcb); + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + } + + pcb = next; + } +} + +/** + * Deallocates a list of TCP segments (tcp_seg structures). + * + * @param seg tcp_seg list of TCP segments to free + */ +void +tcp_segs_free(struct tcp_seg *seg) +{ + while (seg != NULL) { + struct tcp_seg *next = seg->next; + tcp_seg_free(seg); + seg = next; + } +} + +/** + * Frees a TCP segment (tcp_seg structure). + * + * @param seg single tcp_seg to free + */ +void +tcp_seg_free(struct tcp_seg *seg) +{ + if (seg != NULL) { + if (seg->p != NULL) { + pbuf_free(seg->p); +#if TCP_DEBUG + seg->p = NULL; +#endif /* TCP_DEBUG */ + } + memp_free(MEMP_TCP_SEG, seg); + } +} + +/** + * Sets the priority of a connection. + * + * @param pcb the tcp_pcb to manipulate + * @param prio new priority + */ +void +tcp_setprio(struct tcp_pcb *pcb, u8_t prio) +{ + pcb->prio = prio; +} + +#if TCP_QUEUE_OOSEQ +/** + * Returns a copy of the given TCP segment. + * The pbuf and data are not copied, only the pointers + * + * @param seg the old tcp_seg + * @return a copy of seg + */ +struct tcp_seg * +tcp_seg_copy(struct tcp_seg *seg) +{ + struct tcp_seg *cseg; + + cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG); + if (cseg == NULL) { + return NULL; + } + SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg)); + pbuf_ref(cseg->p); + return cseg; +} +#endif /* TCP_QUEUE_OOSEQ */ + +#if LWIP_CALLBACK_API +/** + * Default receive callback that is called if the user didn't register + * a recv callback for the pcb. + */ +err_t +tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + LWIP_UNUSED_ARG(arg); + if (p != NULL) { + tcp_recved(pcb, p->tot_len); + pbuf_free(p); + } else if (err == ERR_OK) { + return tcp_close(pcb); + } + return ERR_OK; +} +#endif /* LWIP_CALLBACK_API */ + +/** + * Kills the oldest active connection that has lower priority than prio. + * + * @param prio minimum priority + */ +static void ICACHE_FLASH_ATTR +tcp_kill_prio(u8_t prio) +{ + struct tcp_pcb *pcb, *inactive; + u32_t inactivity; + u8_t mprio; + + + mprio = TCP_PRIO_MAX; + + /* We kill the oldest active connection that has lower priority than prio. */ + inactivity = 0; + inactive = NULL; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->prio <= prio && + pcb->prio <= mprio && + (u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + mprio = pcb->prio; + } + } + if (inactive != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n", + (void *)inactive, inactivity)); + tcp_abort(inactive); + } +} + +/** + * Kills the oldest connection that is in TIME_WAIT state. + * Called from tcp_alloc() if no more connections are available. + */ +static void ICACHE_FLASH_ATTR +tcp_kill_timewait(void) +{ + struct tcp_pcb *pcb, *inactive; + u32_t inactivity; + + inactivity = 0; + inactive = NULL; + /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */ + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + } + } + if (inactive != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n", + (void *)inactive, inactivity)); + tcp_abort(inactive); + } +} + +/** + * Allocate a new tcp_pcb structure. + *����һ��TCP���ƿ�ṹ������ʼ������ֶ� + * @param prio priority for the new pcb �¿��ƿ�����ȼ� + * @return a new tcp_pcb that initially is in state CLOSED ָ���¿��ƿ��ָ�� + */ +struct tcp_pcb * +tcp_alloc(u8_t prio) +{ + struct tcp_pcb *pcb; + u32_t iss; + + pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);//�����ڴ�ؿռ� + if (pcb == NULL) { + //os_printf("tcp_pcb memory is fail\n"); + /* Try killing oldest connection in TIME-WAIT. */ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n")); + tcp_kill_timewait(); + /* Try to allocate a tcp_pcb again. */ + pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); + if (pcb == NULL) { + /* Try killing active connections with lower priority than the new one. */ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing connection with prio lower than %d\n", prio)); + tcp_kill_prio(prio); + /* Try to allocate a tcp_pcb again. */ + pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); + if (pcb != NULL) { + /* adjust err stats: memp_malloc failed twice before */ + MEMP_STATS_DEC(err, MEMP_TCP_PCB); + } + } + if (pcb != NULL) { + /* adjust err stats: timewait PCB was freed above */ + MEMP_STATS_DEC(err, MEMP_TCP_PCB); + } + } + if (pcb != NULL) { + os_memset(pcb, 0, sizeof(struct tcp_pcb)); //��0 + pcb->prio = prio; //�������ȼ� + pcb->snd_buf = TCP_SND_BUF; //��ʹ�õķ��ͻ������С + pcb->snd_queuelen = 0; //��������ռ�õ�pbuf���� + pcb->rcv_wnd = TCP_WND; //���մ��� + pcb->rcv_ann_wnd = TCP_WND; //ͨ����մ��� + pcb->tos = 0; //�������� + pcb->ttl = TCP_TTL; //ttl�ֶ� + /* As initial send MSS, we use TCP_MSS but limit it to 536. + The send MSS is updated when an MSS option is received. */ + pcb->mss = (TCP_MSS > 536) ? 536 : TCP_MSS; //��ʼ������Ķ� + pcb->rto = 1000 / TCP_SLOW_INTERVAL; //��ʼ����ʱʱ�� + pcb->sa = 0; //��ʼ����RTT��صIJ��� + pcb->sv = 1000 / TCP_SLOW_INTERVAL; + pcb->rtime = -1; + pcb->cwnd = 1; //��ʼ������� + iss = tcp_next_iss(); //��ó�ʼ���к� + pcb->snd_wl2 = iss; //��ʼ�����ʹ��ڸ����ֶ� + pcb->snd_nxt = iss; + pcb->lastack = iss; + pcb->snd_lbb = iss; + pcb->tmr = tcp_ticks; //��¼���ƿ鴴��ϵͳʱ�� + + pcb->polltmr = 0; //����������¼���ʱ�� + +#if LWIP_CALLBACK_API + pcb->recv = tcp_recv_null; //ע�������ݵ�Ĭ���ϲ㺯�� +#endif /* LWIP_CALLBACK_API */ + + /* Init KEEPALIVE timer */ + pcb->keep_idle = TCP_KEEPIDLE_DEFAULT; + +#if LWIP_TCP_KEEPALIVE + pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT; + pcb->keep_cnt = TCP_KEEPCNT_DEFAULT; +#endif /* LWIP_TCP_KEEPALIVE */ + + pcb->keep_cnt_sent = 0; //���ķ��ʹ��� + } + return pcb; +} + +/** + * Creates a new TCP protocol control block but doesn't place it on + * any of the TCP PCB lists. + * The pcb is not put on any list until binding using tcp_bind(). + * + * @internal: Maybe there should be a idle TCP PCB list where these + * PCBs are put on. Port reservation using tcp_bind() is implemented but + * allocated pcbs that are not bound can't be killed automatically if wanting + * to allocate a pcb with higher prio (@see tcp_kill_prio()) + * + * @return a new tcp_pcb that initially is in state CLOSED + */ +struct tcp_pcb * +tcp_new(void) +{ + return tcp_alloc(TCP_PRIO_NORMAL); +} + +/** + * Used to specify the argument that should be passed callback + * functions. + *����ƿ��callback_arg�ֶ�ע���û���ݣ���tcp_recv�Ⱥ���ص�ʱ�� +* ���ֶν���Ϊ����ݸ�������� + * @param pcb tcp_pcb to set the callback argument + * @param arg void pointer argument to pass to callback functions + */ +void +tcp_arg(struct tcp_pcb *pcb, void *arg) +{ + pcb->callback_arg = arg; +} +#if LWIP_CALLBACK_API + +/** + * Used to specify the function that should be called when a TCP + * connection receives data. + *����ƿ��recv�ֶ�ע�ắ���յ����ʱ�ص� + * @param pcb tcp_pcb to set the recv callback + * @param recv callback function to call for this pcb when data is received + */ +void +tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv) +{ + pcb->recv = recv; +} + +/** + * Used to specify the function that should be called when TCP data + * has been successfully delivered to the remote host. + *����ƿ�send �ֶ�ע�ắ����ݷ��ͳɹ���ص� + * @param pcb tcp_pcb to set the sent callback + * @param sent callback function to call for this pcb when data is successfully sent + */ +void +tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent) +{ + pcb->sent = sent; +} + +/** + * Used to specify the function that should be called when a fatal error + * has occured on the connection. + *����ƿ�err �ֶ�ע�ắ�����������ص� + * @param pcb tcp_pcb to set the err callback + * @param err callback function to call for this pcb when a fatal error + * has occured on the connection + */ +void +tcp_err(struct tcp_pcb *pcb, tcp_err_fn err) +{ + pcb->errf = err; +} + +/** + * Used for specifying the function that should be called when a + * LISTENing connection has been connected to another host. + *����ƿ��accept�ֶ�ע�ắ����������ʱ�ص� + * @param pcb tcp_pcb to set the accept callback + * @param accept callback function to call for this pcb when LISTENing + * connection has been connected to another host + */ +void +tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept) +{ + pcb->accept = accept; +} +#endif /* LWIP_CALLBACK_API */ + + +/** + * Used to specify the function that should be called periodically + * from TCP. The interval is specified in terms of the TCP coarse + * timer interval, which is called twice a second. + *����ƿ��POLL�ֶ�ע�ắ��ú��������Ա����� + */ +void +tcp_poll(struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval) +{ +#if LWIP_CALLBACK_API + pcb->poll = poll; +#else /* LWIP_CALLBACK_API */ + LWIP_UNUSED_ARG(poll); +#endif /* LWIP_CALLBACK_API */ + pcb->pollinterval = interval; +} + +/** + * Purges a TCP PCB. Removes any buffered data and frees the buffer memory + * (pcb->ooseq, pcb->unsent and pcb->unacked are freed). + * + * @param pcb tcp_pcb to purge. The pcb itself is not deallocated! + */ +void +tcp_pcb_purge(struct tcp_pcb *pcb) +{ + if (pcb->state != CLOSED && + pcb->state != TIME_WAIT && + pcb->state != LISTEN) { + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n")); + +#if TCP_LISTEN_BACKLOG + if (pcb->state == SYN_RCVD) { + /* Need to find the corresponding listen_pcb and decrease its accepts_pending */ + struct tcp_pcb_listen *lpcb; + LWIP_ASSERT("tcp_pcb_purge: pcb->state == SYN_RCVD but tcp_listen_pcbs is NULL", + tcp_listen_pcbs.listen_pcbs != NULL); + for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + if ((lpcb->local_port == pcb->local_port) && + (ip_addr_isany(&lpcb->local_ip) || + ip_addr_cmp(&pcb->local_ip, &lpcb->local_ip))) { + /* port and address of the listen pcb match the timed-out pcb */ + LWIP_ASSERT("tcp_pcb_purge: listen pcb does not have accepts pending", + lpcb->accepts_pending > 0); + lpcb->accepts_pending--; + break; + } + } + } +#endif /* TCP_LISTEN_BACKLOG */ + + + if (pcb->refused_data != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n")); + pbuf_free(pcb->refused_data); + pcb->refused_data = NULL; + } + if (pcb->unsent != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: not all data sent\n")); + } + if (pcb->unacked != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n")); + } +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n")); + } + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; +#endif /* TCP_QUEUE_OOSEQ */ + + /* Stop the retransmission timer as it will expect data on unacked + queue if it fires */ + pcb->rtime = -1; + + tcp_segs_free(pcb->unsent); + tcp_segs_free(pcb->unacked); + pcb->unacked = pcb->unsent = NULL; +#if TCP_OVERSIZE + pcb->unsent_oversize = 0; +#endif /* TCP_OVERSIZE */ + } +} + +/** + * Purges the PCB and removes it from a PCB list. Any delayed ACKs are sent first. + * + * @param pcblist PCB list to purge. + * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated! + */ +void +tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb) +{ + TCP_RMV(pcblist, pcb); + + tcp_pcb_purge(pcb); + + /* if there is an outstanding delayed ACKs, send it */ + if (pcb->state != TIME_WAIT && + pcb->state != LISTEN && + pcb->flags & TF_ACK_DELAY) { + pcb->flags |= TF_ACK_NOW; + tcp_output(pcb); + } + + if (pcb->state != LISTEN) { + LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL); + LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL); +#if TCP_QUEUE_OOSEQ + LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL); +#endif /* TCP_QUEUE_OOSEQ */ + } + + pcb->state = CLOSED; + + LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane()); +} + +/** + * Calculates a new initial sequence number for new connections. + * + * @return u32_t pseudo random sequence number + */ +u32_t +tcp_next_iss(void) +{ + static u32_t iss = 6510; + + again: + iss += tcp_ticks; /* XXX */ + if (iss == 0) + goto again; + + return iss; +} + +#if TCP_CALCULATE_EFF_SEND_MSS +/** + * Calcluates the effective send mss that can be used for a specific IP address + * by using ip_route to determin the netif used to send to the address and + * calculating the minimum of TCP_MSS and that netif's mtu (if set). + */ +u16_t +tcp_eff_send_mss(u16_t sendmss, ip_addr_t *addr) +{ + u16_t mss_s; + struct netif *outif; + + outif = ip_route(addr); + if ((outif != NULL) && (outif->mtu != 0)) { + mss_s = outif->mtu - IP_HLEN - TCP_HLEN; + /* RFC 1122, chap 4.2.2.6: + * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize + * We correct for TCP options in tcp_write(), and don't support IP options. + */ + sendmss = LWIP_MIN(sendmss, mss_s); + } + return sendmss; +} +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + +#if TCP_DEBUG +const char* +tcp_debug_state_str(enum tcp_state s) +{ + system_get_string_from_flash(tcp_state_str_rodata[s], tcp_state_str, 12); + + return tcp_state_str; +} +#endif + +#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG +/** + * Print a tcp header for debugging purposes. + * + * @param tcphdr pointer to a struct tcp_hdr + */ +void +tcp_debug_print(struct tcp_hdr *tcphdr) +{ + LWIP_DEBUGF(TCP_DEBUG, ("TCP header:\n")); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", + ntohs(tcphdr->src), ntohs(tcphdr->dest))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (seq no)\n", + ntohl(tcphdr->seqno))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (ack no)\n", + ntohl(tcphdr->ackno))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %2"U16_F" | |%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"| %5"U16_F" | (hdrlen, flags (", + TCPH_HDRLEN(tcphdr), + TCPH_FLAGS(tcphdr) >> 5 & 1, + TCPH_FLAGS(tcphdr) >> 4 & 1, + TCPH_FLAGS(tcphdr) >> 3 & 1, + TCPH_FLAGS(tcphdr) >> 2 & 1, + TCPH_FLAGS(tcphdr) >> 1 & 1, + TCPH_FLAGS(tcphdr) & 1, + ntohs(tcphdr->wnd))); + tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); + LWIP_DEBUGF(TCP_DEBUG, ("), win)\n")); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| 0x%04"X16_F" | %5"U16_F" | (chksum, urgp)\n", + ntohs(tcphdr->chksum), ntohs(tcphdr->urgp))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); +} + +/** + * Print a tcp state for debugging purposes. + * + * @param s enum tcp_state to print + */ +void +tcp_debug_print_state(enum tcp_state s) +{ + LWIP_DEBUGF(TCP_DEBUG, ("State: %s\n", tcp_state_str[s])); +} + +/** + * Print tcp flags for debugging purposes. + * + * @param flags tcp flags, all active flags are printed + */ +void +tcp_debug_print_flags(u8_t flags) +{ + if (flags & TCP_FIN) { + LWIP_DEBUGF(TCP_DEBUG, ("FIN ")); + } + if (flags & TCP_SYN) { + LWIP_DEBUGF(TCP_DEBUG, ("SYN ")); + } + if (flags & TCP_RST) { + LWIP_DEBUGF(TCP_DEBUG, ("RST ")); + } + if (flags & TCP_PSH) { + LWIP_DEBUGF(TCP_DEBUG, ("PSH ")); + } + if (flags & TCP_ACK) { + LWIP_DEBUGF(TCP_DEBUG, ("ACK ")); + } + if (flags & TCP_URG) { + LWIP_DEBUGF(TCP_DEBUG, ("URG ")); + } + if (flags & TCP_ECE) { + LWIP_DEBUGF(TCP_DEBUG, ("ECE ")); + } + if (flags & TCP_CWR) { + LWIP_DEBUGF(TCP_DEBUG, ("CWR ")); + } + LWIP_DEBUGF(TCP_DEBUG, ("\n")); +} + +/** + * Print all tcp_pcbs in every list for debugging purposes. + */ +void +tcp_debug_print_pcbs(void) +{ + struct tcp_pcb *pcb; + LWIP_DEBUGF(TCP_DEBUG, ("Active PCB states:\n")); + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } + LWIP_DEBUGF(TCP_DEBUG, ("Listen PCB states:\n")); + for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } + LWIP_DEBUGF(TCP_DEBUG, ("TIME-WAIT PCB states:\n")); + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } +} + +/** + * Check state consistency of the tcp_pcb lists. + */ +s16_t +tcp_pcbs_sane(void) +{ + struct tcp_pcb *pcb; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != CLOSED", pcb->state != CLOSED); + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != LISTEN", pcb->state != LISTEN); + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); + } + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_pcbs_sane: tw pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + } + return 1; +} +#endif /* TCP_DEBUG */ + +#endif /* LWIP_TCP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp_in.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp_in.c new file mode 100755 index 0000000..f32fb2d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp_in.c @@ -0,0 +1,1637 @@ +/** + * @file + * Transmission Control Protocol, incoming traffic + * + * The input processing functions of the TCP layer. + * + * These functions are generally called in the order (ip_input() ->) + * tcp_input() -> * tcp_process() -> tcp_receive() (-> application). + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/tcp_impl.h" +#include "lwip/def.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/inet_chksum.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/* These variables are global to all functions involved in the input + processing of TCP segments. They are set by the tcp_input() + function. */ +static struct tcp_seg inseg; //tcp_seg�ṹ����������ı��Ķ� +static struct tcp_hdr *tcphdr; //���Ķ���TCP�ײ� +static struct ip_hdr *iphdr; //IP��ݰ��ײ� +static u32_t seqno, ackno; //TCP�ײ�������ֶ���ȷ�Ϻ��ֶ� +static u8_t flags; //�ײ���־�ֶ� +static u16_t tcplen; //TCP���ij��� + +static u8_t recv_flags; //��ǰ���Ĵ����� +static struct pbuf *recv_data; //���Ķ����pbuf + +struct tcp_pcb *tcp_input_pcb; //��ǰ���Ŀ��ƿ� + +/* Forward declarations. */ +static err_t tcp_process(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +static void tcp_receive(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; +static void tcp_parseopt(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; + +static err_t tcp_listen_input(struct tcp_pcb_listen *pcb)ICACHE_FLASH_ATTR; +static err_t tcp_timewait_input(struct tcp_pcb *pcb)ICACHE_FLASH_ATTR; + +/** + * The initial input processing of TCP. It verifies the TCP header, demultiplexes + * the segment between the PCBs and passes it on to tcp_process(), which implements + * the TCP finite state machine. This function is called by the IP layer (in + * ip_input()). + * + * @param p received TCP segment to process (p->payload pointing to the IP header) + * @param inp network interface on which this segment was received + */ + /** + * TCP��ʼ�����봦�?��֤��TCPͷ���������IP����� + + * @����p:������յ�TCP��(ָ��IPͷ�ĸ���) + * @����inp:���նε�����ӿ� + */ +void +tcp_input(struct pbuf *p, struct netif *inp) +{ + struct tcp_pcb *pcb, *prev; + struct tcp_pcb_listen *lpcb; +#if SO_REUSE + struct tcp_pcb *lpcb_prev = NULL; + struct tcp_pcb_listen *lpcb_any = NULL; +#endif /* SO_REUSE */ + u8_t hdrlen; + err_t err; + + PERF_START; + + TCP_STATS_INC(tcp.recv); //״̬��1 + snmp_inc_tcpinsegs(); //tcp����μ�1 + + iphdr = (struct ip_hdr *)p->payload;// pointer to the actual data in the buffer + /* + *��ͷ����(IHL)��4λ��IPЭ���ͷ�ij��ȣ�ָ��IPv4Э���ͷ���ȵ��ֽ������ٸ�32λ�� + *����IPv4�İ�ͷ���ܰ�ɱ������Ŀ�ѡ ���������ֶο�������ȷ��IPv4��ݱ�����ݲ��ֵ�ƫ������ + *IPv4��ͷ����С������20���ֽڣ����IHL����ֶε���Сֵ��ʮ���Ʊ�ʾ����5 (5x4 = 20�ֽ�)�� + *����˵�����ʾ�İ�ͷ�����ֽ�����4�ֽڵı��� + */ + tcphdr = (struct tcp_hdr *)((u8_t *)p->payload + IPH_HL(iphdr) * 4); + +#if TCP_INPUT_DEBUG + tcp_debug_print(tcphdr); +#endif + + /* remove header from payload */ + if (pbuf_header(p, -((s16_t)(IPH_HL(iphdr) * 4))) || (p->tot_len < sizeof(struct tcp_hdr))) { + /* drop short packets */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet (%"U16_F" bytes) discarded\n", p->tot_len)); + TCP_STATS_INC(tcp.lenerr);//���󳤶ȼ��� + TCP_STATS_INC(tcp.drop);//��ֹ���� + snmp_inc_tcpinerrs(); + pbuf_free(p);//�ͷ�buffer + return; + } + + /* Don't even process incoming broadcasts/multicasts. */ + if (ip_addr_isbroadcast(¤t_iphdr_dest, inp) || + ip_addr_ismulticast(¤t_iphdr_dest)) { + TCP_STATS_INC(tcp.proterr);//Э�������� + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + +#if CHECKSUM_CHECK_TCP + /* Verify TCP checksum. */ + if (inet_chksum_pseudo(p, ip_current_src_addr(), ip_current_dest_addr(), + IP_PROTO_TCP, p->tot_len) != 0) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packet discarded due to failing checksum 0x%04"X16_F"\n", + inet_chksum_pseudo(p, ip_current_src_addr(), ip_current_dest_addr(), + IP_PROTO_TCP, p->tot_len))); +#if TCP_DEBUG + tcp_debug_print(tcphdr); +#endif /* TCP_DEBUG */ + TCP_STATS_INC(tcp.chkerr);//У�������� + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } +#endif + + /* Move the payload pointer in the pbuf so that it points to the + TCP data instead of the TCP header. */ + hdrlen = TCPH_HDRLEN(tcphdr);//����ͷ�ij��� + if(pbuf_header(p, -(hdrlen * 4))){//���TCPͷ������0Ϊ�ɹ������� + /* drop short packets */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet\n")); + TCP_STATS_INC(tcp.lenerr);//tcp���ȴ������ + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + + /* Convert fields in TCP header to host byte order. */ + tcphdr->src = ntohs(tcphdr->src); //ת��Դ��ַ + tcphdr->dest = ntohs(tcphdr->dest); //ת��Ŀ�ĵ�ַ + seqno = tcphdr->seqno = ntohl(tcphdr->seqno); //ת�����к� + ackno = tcphdr->ackno = ntohl(tcphdr->ackno); //ת��Ӧ��� + tcphdr->wnd = ntohs(tcphdr->wnd); //ת��tcp���� + + flags = TCPH_FLAGS(tcphdr);//�õ�tcp header�ı�־ + /* + *��־��3λ�����ֶΣ��� + * ����λ��1λ + * ���ֶ�λ��1λ��ȡֵ��0��������ݱ��ֶΣ���1����ݱ����ֶܷΣ� + * ����λ��1λ��ȡֵ��0����ݰ����û�а�1����ݰ�����и��İ� + */ + tcplen = p->tot_len + ((flags & (TCP_FIN | TCP_SYN)) ? 1 : 0);//TCP_FIN �� TCP_SYN ��λ��1�������0 + + /* Demultiplex an incoming segment. First, we check if it is destined + for an active connection. ���ȣ�����Ƿ�һ��Ҫ����һ������*/ + //////////////////////////////////////////////////////////////////////////////////////// + prev = NULL; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {//������б� + LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED); + LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); + LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN); + if (pcb->remote_port == tcphdr->src && + pcb->local_port == tcphdr->dest && + ip_addr_cmp(&(pcb->remote_ip), ¤t_iphdr_src) && + ip_addr_cmp(&(pcb->local_ip), ¤t_iphdr_dest)) {//�����صĵ�ַ + + /* Move this PCB to the front of the list so that subsequent + lookups will be faster (we exploit locality in TCP segment + arrivals). */ + LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb); + if (prev != NULL) {//���ǰһ���ڵ㲻Ϊ�� + prev->next = pcb->next; + pcb->next = tcp_active_pcbs; + tcp_active_pcbs = pcb;//pcb������ǰ�� + } + LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb); + break; + } + prev = pcb;//prevָ��pcb + } + + if (pcb == NULL) { + /* If it did not go to an active connection, we check the connections + in the TIME-WAIT state. */ + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {//����ȴ�״̬�µ�pcb + LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + if (pcb->remote_port == tcphdr->src && + pcb->local_port == tcphdr->dest && + ip_addr_cmp(&(pcb->remote_ip), ¤t_iphdr_src) && + ip_addr_cmp(&(pcb->local_ip), ¤t_iphdr_dest)) { + /* We don't really care enough to move this PCB to the front + of the list since we are not very likely to receive that + many segments for connections in TIME-WAIT. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for TIME_WAITing connection.\n")); + tcp_timewait_input(pcb);//����tcp timewait �İ� + pbuf_free(p); + return; + } + } + + /* Finally, if we still did not get a match, we check all PCBs that + are LISTENing for incoming connections. */ + prev = NULL; + for(lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {//�������״̬�����е�pcb + if (lpcb->local_port == tcphdr->dest) { +#if SO_REUSE + if (ip_addr_cmp(&(lpcb->local_ip), ¤t_iphdr_dest)) { + /* found an exact match */ + break; + } else if(ip_addr_isany(&(lpcb->local_ip))) { + /* found an ANY-match */ + lpcb_any = lpcb; + lpcb_prev = prev; + } +#else /* SO_REUSE */ + if (ip_addr_cmp(&(lpcb->local_ip), ¤t_iphdr_dest) || + ip_addr_isany(&(lpcb->local_ip))) { + /* found a match */ + break; + } +#endif /* SO_REUSE */ + } + prev = (struct tcp_pcb *)lpcb; + } +#if SO_REUSE + /* first try specific local IP */ + if (lpcb == NULL) { + /* only pass to ANY if no specific local IP has been found */ + lpcb = lpcb_any; + prev = lpcb_prev; + } +#endif /* SO_REUSE */ + if (lpcb != NULL) { + /* Move this PCB to the front of the list so that subsequent + lookups will be faster (we exploit locality in TCP segment + arrivals). */ + if (prev != NULL) { + ((struct tcp_pcb_listen *)prev)->next = lpcb->next; + /* our successor is the remainder of the listening list */ + lpcb->next = tcp_listen_pcbs.listen_pcbs; + /* put this listening pcb at the head of the listening list */ + tcp_listen_pcbs.listen_pcbs = lpcb; + } + + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for LISTENing connection.\n")); + tcp_listen_input(lpcb);//����tcp������ݰ� + pbuf_free(p); + return; + } + } + +#if TCP_INPUT_DEBUG + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("+-+-+-+-+-+-+-+-+-+-+-+-+-+- tcp_input: flags ")); + tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("-+-+-+-+-+-+-+-+-+-+-+-+-+-+\n")); +#endif /* TCP_INPUT_DEBUG */ + + + if (pcb != NULL) { + /* The incoming segment belongs to a connection. */ +#if TCP_INPUT_DEBUG +#if TCP_DEBUG + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ +#endif /* TCP_INPUT_DEBUG */ + + /* Set up a tcp_seg structure. */ + inseg.next = NULL; + inseg.len = p->tot_len; + inseg.p = p; + inseg.tcphdr = tcphdr; + + recv_data = NULL; + recv_flags = 0; + + /* If there is data which was previously "refused" by upper layer */ + if (pcb->refused_data != NULL) { + /* Notify again application with data previously received. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n")); + TCP_EVENT_RECV(pcb, pcb->refused_data, ERR_OK, err);//pcb������� + if (err == ERR_OK) { + pcb->refused_data = NULL; + } else if ((err == ERR_ABRT) || (tcplen > 0)) { + /* if err == ERR_ABRT, 'pcb' is already deallocated */ + /* Drop incoming packets because pcb is "full" (only if the incoming + segment contains data). */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n")); + TCP_STATS_INC(tcp.drop);//tcp������� + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + } + tcp_input_pcb = pcb;//��¼��ǰ���Ĵ���Ŀ��ƿ� + err = tcp_process(pcb);//���?�� + /* A return value of ERR_ABRT means that tcp_abort() was called + and that the pcb has been freed. If so, we don't do anything. */ + if (err != ERR_ABRT) { + if (recv_flags & TF_RESET) { + /* TF_RESET means that the connection was reset by the other + end. We then call the error callback to inform the + application that the connection is dead before we + deallocate the PCB. */ + TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_RST); + tcp_pcb_remove(&tcp_active_pcbs, pcb);//ɾ���pcb�б��е�pcb + memp_free(MEMP_TCP_PCB, pcb); + } else if (recv_flags & TF_CLOSED) { + /* The connection has been closed and we will deallocate the + PCB. */ + if (!(pcb->flags & TF_RXCLOSED)) { + /* Connection closed although the application has only shut down the + tx side: call the PCB's err callback and indicate the closure to + ensure the application doesn't continue using the PCB. */ + TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_CLSD); + } + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else { + err = ERR_OK; + /* If the application has registered a "sent" function to be + called when new send buffer space is available, we call it + now. */ + if (pcb->acked > 0) { + TCP_EVENT_SENT(pcb, pcb->acked, err);//����ݱ�ȷ�ϣ��ص��û���send���� + if (err == ERR_ABRT) { + goto aborted; + } + } + + if (recv_data != NULL) {//����ݽ��յ� + LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL); + if (pcb->flags & TF_RXCLOSED) { + /* received data although already closed -> abort (send RST) to + notify the remote host that not all data has been processed */ + pbuf_free(recv_data); + tcp_abort(pcb); + goto aborted; + } + + //PSH��־ PSH ����λ�� + //��PSH=1ʱ��Ҫ���ͷ����Ϸ��͸÷ֶΣ� + //����շ�����Ľ����Ľ���Ӧ�ò㣬�������д��? + + if (flags & TCP_PSH) { + recv_data->flags |= PBUF_FLAG_PUSH;//���bufferӦ������������ + } + + /* Notify application that data has been received. */ + TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err); + if (err == ERR_ABRT) { + goto aborted; + } + + /* If the upper layer can't receive this data, store it */ + if (err != ERR_OK) { + pcb->refused_data = recv_data; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: keep incoming packet, because pcb is \"full\"\n")); + } + } + + /* If a FIN segment was received, we call the callback + function with a NULL buffer to indicate EOF. */ + if (recv_flags & TF_GOT_FIN) { + /* correct rcv_wnd as the application won't call tcp_recved() + for the FIN's seqno */ + if (pcb->rcv_wnd != TCP_WND) { + pcb->rcv_wnd++; + } + + TCP_EVENT_CLOSED(pcb, err); + if (err == ERR_ABRT) { + goto aborted; + } + } + + tcp_input_pcb = NULL;//���ȫ�ֱ��� + /* Try to send something out. */ + tcp_output(pcb);//����������� +#if TCP_INPUT_DEBUG +#if TCP_DEBUG + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ +#endif /* TCP_INPUT_DEBUG */ + } + } + /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()). + Below this line, 'pcb' may not be dereferenced! */ +aborted: + tcp_input_pcb = NULL; + recv_data = NULL; + + /* give up our reference to inseg.p */ + if (inseg.p != NULL) + { + pbuf_free(inseg.p);//�ͷ�buffer + inseg.p = NULL; + } + + /*add processing queue segments that arrive out of order by LiuHan*/ +#if TCP_QUEUE_OOSEQ + extern char RxNodeNum(void); + if (RxNodeNum() < 2){ + extern void pbuf_free_ooseq_new(void* arg); +// os_printf("reclaim some memory from queued\n"); + pbuf_free_ooseq_new(NULL); + } +#endif + } else { + + /* If no matching PCB was found, send a TCP RST (reset) to the + sender. */ + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_input: no PCB match found, resetting.\n")); + if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) { + TCP_STATS_INC(tcp.proterr);//Э�������� + TCP_STATS_INC(tcp.drop);//tcp������� + tcp_rst(ackno, seqno + tcplen, + ip_current_dest_addr(), ip_current_src_addr(), + tcphdr->dest, tcphdr->src);//����TCP��λ + } + pbuf_free(p); + } + + LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane()); + PERF_STOP("tcp_input"); +} + +/** + * Called by tcp_input() when a segment arrives for a listening + * connection (from tcp_input()). + * + * @param pcb the tcp_pcb_listen for which a segment arrived + * @return ERR_OK if the segment was processed + * another err_t on error + * + * @note the return value is not (yet?) used in tcp_input() + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ + /* +*����LISTEN״̬�Ŀ��ƿ���øú��� +*ͨ���Ƿ�������������һ���˿ڲ�����ͻ���SYN�������� +* +*/ +static err_t +tcp_listen_input(struct tcp_pcb_listen *pcb) +{ + struct tcp_pcb *npcb; + struct tcp_pcb *pactive_pcb; + u8_t active_pcb_num = 0; + err_t rc; + + /* In the LISTEN state, we check for incoming SYN segments, + creates a new PCB, and responds with a SYN|ACK. */ + if (flags & TCP_ACK) { + /* For incoming segments with the ACK flag set, respond with a + RST. */ + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n")); + tcp_rst(ackno, seqno + tcplen, + ip_current_dest_addr(), ip_current_src_addr(), + tcphdr->dest, tcphdr->src); + } else if (flags & TCP_SYN) {//�յ�SYN���� + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection request %"U16_F" -> %"U16_F".\n", tcphdr->src, tcphdr->dest)); +#if TCP_LISTEN_BACKLOG + if (pcb->accepts_pending >= pcb->backlog) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: listen backlog exceeded for port %"U16_F"\n", tcphdr->dest)); + return ERR_ABRT; + } +#endif /* TCP_LISTEN_BACKLOG */ + for(pactive_pcb = tcp_active_pcbs; pactive_pcb != NULL; pactive_pcb = pactive_pcb->next){ + if (pactive_pcb->state == ESTABLISHED){ + active_pcb_num ++; + } + } + if (active_pcb_num == MEMP_NUM_TCP_PCB){ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: exceed the number of active TCP connections\n")); + TCP_STATS_INC(tcp.memerr); + return ERR_MEM; + } + npcb = tcp_alloc(pcb->prio);//�������ƿ� + /* If a new PCB could not be created (probably due to lack of memory), + we don't do anything, but rely on the sender will retransmit the + SYN at a time when we have more memory available. */ + if (npcb == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: could not allocate PCB\n")); + TCP_STATS_INC(tcp.memerr);//TCP�ڴ������� + return ERR_MEM; + } + +#if TCP_LISTEN_BACKLOG + pcb->accepts_pending++; +#endif /* TCP_LISTEN_BACKLOG */ + /* Set up the new PCB. */ + //���ƿ���������ص�4���ֶ� + ip_addr_copy(npcb->local_ip, current_iphdr_dest); + npcb->local_port = pcb->local_port; + ip_addr_copy(npcb->remote_ip, current_iphdr_src); + npcb->remote_port = tcphdr->src; + + //���ƿ��������ֶ� + npcb->state = SYN_RCVD;//��������״̬ + npcb->rcv_nxt = seqno + 1;//������һ������������ + npcb->rcv_ann_right_edge = npcb->rcv_nxt; + npcb->snd_wnd = tcphdr->wnd;//���÷��ʹ��� + npcb->ssthresh = npcb->snd_wnd; + npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */ + npcb->callback_arg = pcb->callback_arg; +#if LWIP_CALLBACK_API + npcb->accept = pcb->accept; +#endif /* LWIP_CALLBACK_API */ + /* inherit socket options */ + npcb->so_options = pcb->so_options & SOF_INHERITED; + /* Register the new PCB so that we can begin receiving segments + for it. */ + TCP_REG(&tcp_active_pcbs, npcb); + + /* Parse any options in the SYN. */ + tcp_parseopt(npcb); +#if TCP_CALCULATE_EFF_SEND_MSS + npcb->mss = tcp_eff_send_mss(npcb->mss, &(npcb->remote_ip)); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + + snmp_inc_tcppassiveopens(); + + /* Send a SYN|ACK together with the MSS option. */ + rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK); + if (rc != ERR_OK) {//��������ͷ��¿��ƿ� + tcp_abandon(npcb, 0); + return rc; + } + return tcp_output(npcb);//���ͱ��� + } + return ERR_OK; +} + +/** + * Called by tcp_input() when a segment arrives for a connection in + * TIME_WAIT. + * + * @param pcb the tcp_pcb for which a segment arrived + * + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ + /* +*����TIME_WAIT״̬�Ŀ��ƿ���øú������յ��ı��ĶΣ� +*��״̬�£��ر����ӵ����ֹ���Ѿ��������ڵȴ�2MSL��ʱ�� +*��״̬�µı��Ķ����������еľ���ݣ�ֱ��ɾ��ɡ� +*����Ҫ���ͷ�����ACK���� +*/ +static err_t +tcp_timewait_input(struct tcp_pcb *pcb) +{ + + if (flags & TCP_RST) { //RST��λ��ֱ�ӷ��� + return ERR_OK; + } + + if (flags & TCP_SYN) { //��SYN������Ϣ����������ݱ���ڽ��մ����ڣ����ͷ�����RST���� + + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt+pcb->rcv_wnd)) { + + tcp_rst(ackno, seqno + tcplen, ip_current_dest_addr(), ip_current_src_addr(), + tcphdr->dest, tcphdr->src); + return ERR_OK; + } + } else if (flags & TCP_FIN) { //���İ�FIN������Ϣ + + pcb->tmr = tcp_ticks; //��λ�ȴ�2MSLʱ�䣬���ƿ����µȴ�2MSL + } + + if ((tcplen > 0)) { //��������ݵı��Ļ����ڽ��մ������SYN���� + pcb->flags |= TF_ACK_NOW;//����һ��ACK���� + return tcp_output(pcb); + } + return ERR_OK; +} + +/** + * Implements the TCP state machine. Called by tcp_input. In some + * states tcp_receive() is called to receive data. The tcp_seg + * argument will be freed by the caller (tcp_input()) unless the + * recv_data pointer in the pcb is set. + * + * @param pcb the tcp_pcb for which a segment arrived + * + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ +static err_t +tcp_process(struct tcp_pcb *pcb) +{ + struct tcp_seg *rseg; + u8_t acceptable = 0; + err_t err; + + err = ERR_OK; + + /* Process incoming RST segments. */ + if (flags & TCP_RST) { + /* First, determine if the reset is acceptable. */ + if (pcb->state == SYN_SENT) { + if (ackno == pcb->snd_nxt) { + acceptable = 1; + } + } else { + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, + pcb->rcv_nxt+pcb->rcv_wnd)) { + acceptable = 1; + } + } + + if (acceptable) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n")); + LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED); + recv_flags |= TF_RESET; + pcb->flags &= ~TF_ACK_DELAY; + return ERR_RST; + } else { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", + seqno, pcb->rcv_nxt)); + LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", + seqno, pcb->rcv_nxt)); + return ERR_OK; + } + } + + if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) { + /* Cope with new connection attempt after remote end crashed */ + tcp_ack_now(pcb); + return ERR_OK; + } + + if ((pcb->flags & TF_RXCLOSED) == 0) { + /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */ + pcb->tmr = tcp_ticks; + } + pcb->keep_cnt_sent = 0; + + tcp_parseopt(pcb); + + /* Do different things depending on the TCP state. */ + switch (pcb->state) { + case SYN_SENT: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno, + pcb->snd_nxt, ntohl(pcb->unacked->tcphdr->seqno))); + /* received SYN ACK with expected sequence number? */ + if ((flags & TCP_ACK) && (flags & TCP_SYN) + && ackno == ntohl(pcb->unacked->tcphdr->seqno) + 1) { + pcb->snd_buf++; + pcb->rcv_nxt = seqno + 1; + pcb->rcv_ann_right_edge = pcb->rcv_nxt; + pcb->lastack = ackno; + pcb->snd_wnd = tcphdr->wnd; + pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */ + pcb->state = ESTABLISHED; + +#if TCP_CALCULATE_EFF_SEND_MSS + pcb->mss = tcp_eff_send_mss(pcb->mss, &(pcb->remote_ip)); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + + /* Set ssthresh again after changing pcb->mss (already set in tcp_connect + * but for the default value of pcb->mss) */ + pcb->ssthresh = pcb->mss * 10; + + pcb->cwnd = ((pcb->cwnd == 1) ? (pcb->mss * 2) : pcb->mss); + LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0)); + --pcb->snd_queuelen; + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"U16_F"\n", (u16_t)pcb->snd_queuelen)); + rseg = pcb->unacked; + pcb->unacked = rseg->next; + + /* If there's nothing left to acknowledge, stop the retransmit + timer, otherwise reset it to start again */ + if(pcb->unacked == NULL) + pcb->rtime = -1; + else { + pcb->rtime = 0; +// pcb->nrtx = 0; + } + pcb->nrtx = 0; + + tcp_seg_free(rseg); + + /* Call the user specified function to call when sucessfully + * connected. */ + TCP_EVENT_CONNECTED(pcb, ERR_OK, err); + if (err == ERR_ABRT) { + return ERR_ABRT; + } + tcp_ack_now(pcb); + } + /* received ACK? possibly a half-open connection */ + else if (flags & TCP_ACK) { + /* send a RST to bring the other side in a non-synchronized state. */ + tcp_rst(ackno, seqno + tcplen, ip_current_dest_addr(), ip_current_src_addr(), + tcphdr->dest, tcphdr->src); + } + break; + case SYN_RCVD: + if (flags & TCP_ACK) { + /* expected ACK number? */ + if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)) { + u16_t old_cwnd; + pcb->state = ESTABLISHED; + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); +#if LWIP_CALLBACK_API + LWIP_ASSERT("pcb->accept != NULL", pcb->accept != NULL); +#endif + /* Call the accept function. */ + TCP_EVENT_ACCEPT(pcb, ERR_OK, err); + if (err != ERR_OK) { + /* If the accept function returns with an error, we abort + * the connection. */ + /* Already aborted? */ + if (err != ERR_ABRT) { + tcp_abort(pcb); + } + return ERR_ABRT; + } + old_cwnd = pcb->cwnd; + /* If there was any data contained within this ACK, + * we'd better pass it on to the application as well. */ + tcp_receive(pcb); + + /* Prevent ACK for SYN to generate a sent event */ + if (pcb->acked != 0) { + pcb->acked--; + } + + pcb->cwnd = ((old_cwnd == 1) ? (pcb->mss * 2) : pcb->mss); + + if (recv_flags & TF_GOT_FIN) { + tcp_ack_now(pcb); + pcb->state = CLOSE_WAIT; + } + } else { + /* incorrect ACK number, send RST */ + tcp_rst(ackno, seqno + tcplen, ip_current_dest_addr(), ip_current_src_addr(), + tcphdr->dest, tcphdr->src); + } + } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) { + /* Looks like another copy of the SYN - retransmit our SYN-ACK */ + tcp_rexmit(pcb); + } + break; + case CLOSE_WAIT: + /* FALLTHROUGH */ + case ESTABLISHED: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { /* passive close */ + tcp_ack_now(pcb); + pcb->state = CLOSE_WAIT; + } + break; + case FIN_WAIT_1: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { + if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt)) { + LWIP_DEBUGF(TCP_DEBUG, + ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_ack_now(pcb); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } else { + tcp_ack_now(pcb); + pcb->state = CLOSING; + } + } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt)) { + pcb->state = FIN_WAIT_2; + } + break; + case FIN_WAIT_2: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_ack_now(pcb); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } + break; + case CLOSING: + tcp_receive(pcb); + if (flags & TCP_ACK && ackno == pcb->snd_nxt) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } + break; + case LAST_ACK: + tcp_receive(pcb); + if (flags & TCP_ACK && ackno == pcb->snd_nxt) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */ + recv_flags |= TF_CLOSED; + } + break; + default: + break; + } + return ERR_OK; +} + +#if TCP_QUEUE_OOSEQ +/** + * Insert segment into the list (segments covered with new one will be deleted) + * + * Called from tcp_receive() + */ +static void ICACHE_FLASH_ATTR +tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next) +{ + struct tcp_seg *old_seg; + + if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { + /* received segment overlaps all following segments */ + tcp_segs_free(next); + next = NULL; + } + else { + /* delete some following segments + oos queue may have segments with FIN flag */ + while (next && + TCP_SEQ_GEQ((seqno + cseg->len), + (next->tcphdr->seqno + next->len))) { + /* cseg with FIN already processed */ + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { + TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN); + } + old_seg = next; + next = next->next; + tcp_seg_free(old_seg); + } + if (next && + TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) { + /* We need to trim the incoming segment. */ + cseg->len = (u16_t)(next->tcphdr->seqno - seqno); + pbuf_realloc(cseg->p, cseg->len); + } + } + cseg->next = next; +} +#endif /* TCP_QUEUE_OOSEQ */ + +/** + * Called by tcp_process. Checks if the given segment is an ACK for outstanding + * data, and if so frees the memory of the buffered data. Next, is places the + * segment on any of the receive queues (pcb->recved or pcb->ooseq). If the segment + * is buffered, the pbuf is referenced by pbuf_ref so that it will not be freed until + * i it has been removed from the buffer. + * + * If the incoming segment constitutes an ACK for a segment that was used for RTT + * estimation, the RTT is estimated here as well. + * + * Called from tcp_process(). + */ +static void +tcp_receive(struct tcp_pcb *pcb) +{ + struct tcp_seg *next; +#if TCP_QUEUE_OOSEQ + struct tcp_seg *prev, *cseg; +#endif /* TCP_QUEUE_OOSEQ */ + struct pbuf *p; + s32_t off; + s16_t m; + u32_t right_wnd_edge; + u16_t new_tot_len; + int found_dupack = 0; + + if (flags & TCP_ACK) {//���İ�ACK + right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;//���ʹ��� + ����Ӧ����󴰿ڸ��� + + // first /* Update window. */ + /*seqno > snd_wl1���������ֹ�̲��ô��ָ���; + *seqno = snd_wl1����ackno > snd_wl2;��ʱ���Է�û�з�����ݣ�ֻ���յ���ݵ�ȷ��; + *ackno = snd_wl2�ұ����ײ��б�snd_wnd���Ĵ���.����������Ӧֵ + */ + if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || + (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || + (pcb->snd_wl2 == ackno && tcphdr->wnd > pcb->snd_wnd)) { + pcb->snd_wnd = tcphdr->wnd; + pcb->snd_wl1 = seqno; + pcb->snd_wl2 = ackno; + if (pcb->snd_wnd > 0 && pcb->persist_backoff > 0) { + pcb->persist_backoff = 0;//�����ʱ���˳� + } + LWIP_DEBUGF(TCP_WND_DEBUG, ("tcp_receive: window update %"U16_F"\n", pcb->snd_wnd)); +#if TCP_WND_DEBUG + } else { + if (pcb->snd_wnd != tcphdr->wnd) { + LWIP_DEBUGF(TCP_WND_DEBUG, + ("tcp_receive: no window update lastack %"U32_F" ackno %" + U32_F" wl1 %"U32_F" seqno %"U32_F" wl2 %"U32_F"\n", + pcb->lastack, ackno, pcb->snd_wl1, seqno, pcb->snd_wl2)); + } +#endif /* TCP_WND_DEBUG */ + } + + /* (From Stevens TCP/IP Illustrated Vol II, p970.) Its only a + * duplicate ack if: + * 1) It doesn't ACK new data û��ȷ������� + * 2) length of received packet is zero (i.e. no payload) ���Ķ����κ���� + * 3) the advertised window hasn't changed ���ش���û�и��� + * 4) There is outstanding unacknowledged data (retransmission timer running)������ݵȴ�ȷ�� + * 5) The ACK is == biggest ACK sequence number so far seen (snd_una) ackno = lastack + * + * If it passes all five, should process as a dupack: + * a) dupacks < 3: do nothing + * b) dupacks == 3: fast retransmit + * c) dupacks > 3: increase cwnd + * + * If it only passes 1-3, should reset dupack counter (and add to + * stats, which we don't do in lwIP) + * + * If it only passes 1, should reset dupack counter + * + */ + + /* Clause 1 */ + if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {//���ظ�ACK? + pcb->acked = 0; + /* Clause 2 */ + if (tcplen == 0) { + /* Clause 3 */ + if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge){ + /* Clause 4 */ + if (pcb->rtime >= 0) { + /* Clause 5 */ + if (pcb->lastack == ackno) { + found_dupack = 1; + if (pcb->dupacks + 1 > pcb->dupacks) + ++pcb->dupacks; + if (pcb->dupacks > 3) { + /* Inflate the congestion window, but not if it means that + the value overflows. */ + if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { + pcb->cwnd += pcb->mss; + } + } else if (pcb->dupacks == 3) {//���ظ�ACK + /* Do fast retransmit */ + tcp_rexmit_fast(pcb); + } + } + } + } + } + /* If Clause (1) or more is true, but not a duplicate ack, reset + * count of consecutive duplicate acks */ + if (!found_dupack) { + pcb->dupacks = 0; + } + } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)){//ackno��lastack+1��snd_nxt֮�䣬�жϷ��ʹ�������� + /* We come here when the ACK acknowledges new data. */ + + if (pcb->flags & TF_INFR) { + pcb->flags &= ~TF_INFR;// Reset the "IN Fast Retransmit" flag,since we are no longer in fast retransmit + pcb->cwnd = pcb->ssthresh;//Reset the congestion window to the "slow start threshold". + } + + /* Reset the number of retransmissions. */ + pcb->nrtx = 0; + + /* Reset the retransmission time-out. */ + pcb->rto = (pcb->sa >> 3) + pcb->sv; + + /* Update the send buffer space. Diff between the two can never exceed 64K? */ + pcb->acked = (u16_t)(ackno - pcb->lastack); + + pcb->snd_buf += pcb->acked; + + /* Reset the fast retransmit variables. */ + pcb->dupacks = 0; + pcb->lastack = ackno; + + /* Update the congestion control variables (cwnd and + ssthresh). */ + if (pcb->state >= ESTABLISHED) {//״̬Ϊ�������ӱ�־ + if (pcb->cwnd < pcb->ssthresh) { + if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { + pcb->cwnd += pcb->mss; + } + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"U16_F"\n", pcb->cwnd)); + } else { + u16_t new_cwnd = (pcb->cwnd + pcb->mss * pcb->mss / pcb->cwnd); + if (new_cwnd > pcb->cwnd) { + pcb->cwnd = new_cwnd; + } + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: congestion avoidance cwnd %"U16_F"\n", pcb->cwnd)); + } + } + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: ACK for %"U32_F", unacked->seqno %"U32_F":%"U32_F"\n", + ackno, + pcb->unacked != NULL? + ntohl(pcb->unacked->tcphdr->seqno): 0, + pcb->unacked != NULL? + ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked): 0)); + + /* Remove segment from the unacknowledged list if the incoming + ACK acknowlegdes them. + *�ͷ�unacked�����ϱ�ȷ�ϵı��ĶΣ� + *ֱ��unacked����Ϊ��ֹͣ*/ + while (pcb->unacked != NULL && + TCP_SEQ_LEQ(ntohl(pcb->unacked->tcphdr->seqno) + + TCP_TCPLEN(pcb->unacked), ackno)) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unacked\n", + ntohl(pcb->unacked->tcphdr->seqno), + ntohl(pcb->unacked->tcphdr->seqno) + + TCP_TCPLEN(pcb->unacked))); + + next = pcb->unacked;//pcb unacked��־ + pcb->unacked = pcb->unacked->next;//pcb unacked ��һ����־ + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); + LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= pbuf_clen(next->p))); + /* Prevent ACK for FIN to generate a sent event */ + if ((pcb->acked != 0) && ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0)) { + pcb->acked--; + } + + pcb->snd_queuelen -= pbuf_clen(next->p);//�������������pbufs���� + tcp_seg_free(next);//�ͷ�tcp�� + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unacked)\n", (u16_t)pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_receive: valid queue length", pcb->unacked != NULL || + pcb->unsent != NULL); + } + } + + /* If there's nothing left to acknowledge, stop the retransmit + timer, otherwise reset it to start again */ + if(pcb->unacked == NULL) //����ݵȴ�ȷ�� + pcb->rtime = -1; //ֹͣ�ش���ʱ�� + else + pcb->rtime = 0; //��λ�ش���ʱ�� + + pcb->polltmr = 0; + } else { + /* Fix bug bug #21582: out of sequence ACK, didn't really ack anything */ + pcb->acked = 0; + } + + /* We go through the ->unsent list to see if any of the segments + on the list are acknowledged by the ACK. This may seem + strange since an "unsent" segment shouldn't be acked. The + rationale is that lwIP puts all outstanding segments on the + ->unsent list after a retransmission, so these segments may + in fact have been sent once. */ + /** unsent�������Ƿ��ܱ�acknoȷ�ϵı��ĶΣ������ͷ�**/ + while (pcb->unsent != NULL && + TCP_SEQ_BETWEEN(ackno, ntohl(pcb->unsent->tcphdr->seqno) + + TCP_TCPLEN(pcb->unsent), pcb->snd_nxt)) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unsent\n", + ntohl(pcb->unsent->tcphdr->seqno), ntohl(pcb->unsent->tcphdr->seqno) + + TCP_TCPLEN(pcb->unsent))); + + next = pcb->unsent;//pcbδ���ͱ�־ + pcb->unsent = pcb->unsent->next;//δ���͵���һ�� + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); + LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= pbuf_clen(next->p))); + /* Prevent ACK for FIN to generate a sent event */ + if ((pcb->acked != 0) && ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0)) { + pcb->acked--; + } + pcb->snd_queuelen -= pbuf_clen(next->p);//������pbuf�ĸ��� + tcp_seg_free(next);//�ͷŶ� + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unsent)\n", (u16_t)pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) {//�������г��� + LWIP_ASSERT("tcp_receive: valid queue length", + pcb->unacked != NULL || pcb->unsent != NULL); + } + } + /* End of ACK for new data processing. */ + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: pcb->rttest %"U32_F" rtseq %"U32_F" ackno %"U32_F"\n", + pcb->rttest, pcb->rtseq, ackno)); + + /* RTT estimation calculations. This is done by checking if the + incoming segment acknowledges the segment we use to take a + round-trip time measurement. */ + if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {//RTT���ڽ����Ҹñ��Ķα�ȷ�� + /* diff between this shouldn't exceed 32K since this are tcp timer ticks + and a round-trip shouldn't be that long... */ + m = (s16_t)(tcp_ticks - pcb->rttest);//����Mֵ + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n", + m, m * TCP_SLOW_INTERVAL)); + + /* This is taken directly from VJs original code in his paper �����RTT���㹫ʽ*/ + m = m - (pcb->sa >> 3); + pcb->sa += m; + if (m < 0) { + m = -m; + } + m = m - (pcb->sv >> 2); + pcb->sv += m; + pcb->rto = (pcb->sa >> 3) + pcb->sv; + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n", + pcb->rto, pcb->rto * TCP_SLOW_INTERVAL)); + + pcb->rttest = 0; + } + } + + /* If the incoming segment contains data, we must process it + further. */ + if (tcplen > 0) { + /* This code basically does three things: + + +) If the incoming segment contains data that is the next + in-sequence data, this data is passed to the application. This + might involve trimming the first edge of the data. The rcv_nxt + variable and the advertised window are adjusted. + + +) If the incoming segment has data that is above the next + sequence number expected (->rcv_nxt), the segment is placed on + the ->ooseq queue. This is done by finding the appropriate + place in the ->ooseq queue (which is ordered by sequence + number) and trim the segment in both ends if needed. An + immediate ACK is sent to indicate that we received an + out-of-sequence segment. + + +) Finally, we check if the first segment on the ->ooseq queue + now is in sequence (i.e., if rcv_nxt >= ooseq->seqno). If + rcv_nxt > ooseq->seqno, we must trim the first edge of the + segment on ->ooseq before we adjust rcv_nxt. The data in the + segments that are now on sequence are chained onto the + incoming segment so that we only need to call the application + once. + */ + + /* First, we check if we must trim the first edge. We have to do + this if the sequence number of the incoming segment is less + than rcv_nxt, and the sequence number plus the length of the + segment is larger than rcv_nxt. */ + /* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ + if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/ + if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)){// seqno < rcv_nxt < seqno + tcplen + /* Trimming the first edge is done by pushing the payload + pointer in the pbuf downwards. This is somewhat tricky since + we do not want to discard the full contents of the pbuf up to + the new starting point of the data since we have to keep the + TCP header which is present in the first pbuf in the chain. + + What is done is really quite a nasty hack: the first pbuf in + the pbuf chain is pointed to by inseg.p. Since we need to be + able to deallocate the whole pbuf, we cannot change this + inseg.p pointer to point to any of the later pbufs in the + chain. Instead, we point the ->payload pointer in the first + pbuf to data in one of the later pbufs. We also set the + inseg.data pointer to point to the right place. This way, the + ->p pointer will still point to the first pbuf, but the + ->p->payload pointer will point to data in another pbuf. + + After we are done with adjusting the pbuf pointers we must + adjust the ->data pointer in the seg and the segment + length.*/ + //ȥ�����Ķ�����ݱ�ŵ���rcv_nxt����� + off = pcb->rcv_nxt - seqno; + p = inseg.p; + LWIP_ASSERT("inseg.p != NULL", inseg.p); + LWIP_ASSERT("insane offset!", (off < 0x7fff)); + if (inseg.p->len < off) { + LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off)); + new_tot_len = (u16_t)(inseg.p->tot_len - off); + while (p->len < off) { + off -= p->len; + /* KJM following line changed (with addition of new_tot_len var) + to fix bug #9076 + inseg.p->tot_len -= p->len; */ + p->tot_len = new_tot_len; + p->len = 0; + p = p->next; + } + if(pbuf_header(p, (s16_t)-off)) { + /* Do we need to cope with this failing? Assert for now */ + LWIP_ASSERT("pbuf_header failed", 0); + } + } else { + if(pbuf_header(inseg.p, (s16_t)-off)) { + /* Do we need to cope with this failing? Assert for now */ + LWIP_ASSERT("pbuf_header failed", 0); + } + } + inseg.len -= (u16_t)(pcb->rcv_nxt - seqno); + inseg.tcphdr->seqno = seqno = pcb->rcv_nxt; + } + else { + if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){//seqno < rcv_nxt + /* the whole segment is < rcv_nxt */ + /* must be a duplicate of a packet that has already been correctly handled */ + //���Ķ���������ݱ�ž�С��rcv_nxt����˱������ظ����ģ� + //ֱ����Դ����ӦACK���Ĵ��� + + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno)); + tcp_ack_now(pcb); + } + } + + /* The sequence number must be within the window (above rcv_nxt + and below rcv_nxt + rcv_wnd) in order to be further + processed. */ + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, + pcb->rcv_nxt + pcb->rcv_wnd - 1)){//rcv_nxt < seqno < rcv_nxt + rcv_wnd - 1,������ڽ��շ�Χ�� + if (pcb->rcv_nxt == seqno) { + /* The incoming segment is the next in sequence. We check if + we have to trim the end of the segment and update rcv_nxt + and pass the data to the application. */ + tcplen = TCP_TCPLEN(&inseg);//���㱨�Ķγ��� + + if (tcplen > pcb->rcv_wnd) {//������մ��ڴ�С��������β���ض� + LWIP_DEBUGF(TCP_INPUT_DEBUG, + ("tcp_receive: other end overran receive window" + "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n", + seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + /* Must remove the FIN from the header as we're trimming + * that byte of sequence-space from the packet */ + TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) &~ TCP_FIN); + } + /* Adjust length of segment to fit in the window. */ + inseg.len = pcb->rcv_wnd; + if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { + inseg.len -= 1; + } + pbuf_realloc(inseg.p, inseg.len); + tcplen = TCP_TCPLEN(&inseg); + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", + (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd)); + } +#if TCP_QUEUE_OOSEQ + /* Received in-sequence data, adjust ooseq data if: + - FIN has been received or + - inseq overlaps with ooseq */ + if (pcb->ooseq != NULL) { + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, + ("tcp_receive: received in-order FIN, binning ooseq queue\n")); + /* Received in-order FIN means anything that was received + * out of order must now have been received in-order, so + * bin the ooseq queue */ + while (pcb->ooseq != NULL) { + struct tcp_seg *old_ooseq = pcb->ooseq; + pcb->ooseq = pcb->ooseq->next; + tcp_seg_free(old_ooseq); + } + } + else { + next = pcb->ooseq; + /* Remove all segments on ooseq that are covered by inseg already. + * FIN is copied from ooseq to inseg if present. */ + while (next && + TCP_SEQ_GEQ(seqno + tcplen, + next->tcphdr->seqno + next->len)) { + /* inseg cannot have FIN here (already processed above) */ + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN && + (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) { + TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN); + tcplen = TCP_TCPLEN(&inseg); + } + prev = next; + next = next->next; + tcp_seg_free(prev); + } + /* Now trim right side of inseg if it overlaps with the first + * segment on ooseq */ + if (next && + TCP_SEQ_GT(seqno + tcplen, + next->tcphdr->seqno)) { + /* inseg cannot have FIN here (already processed above) */ + inseg.len = (u16_t)(next->tcphdr->seqno - seqno); + if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { + inseg.len -= 1; + } + pbuf_realloc(inseg.p, inseg.len); + tcplen = TCP_TCPLEN(&inseg); + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n", + (seqno + tcplen) == next->tcphdr->seqno); + } + pcb->ooseq = next; + } + } +#endif /* TCP_QUEUE_OOSEQ */ + + pcb->rcv_nxt = seqno + tcplen; + + /* Update the receiver's (our) window. */ + LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen); + pcb->rcv_wnd -= tcplen; + + tcp_update_rcv_ann_wnd(pcb); + + /* If there is data in the segment, we make preparations to + pass this up to the application. The ->recv_data variable + is used for holding the pbuf that goes to the + application. The code for reassembling out-of-sequence data + chains its data on this pbuf as well. + + If the segment was a FIN, we set the TF_GOT_FIN flag that will + be used to indicate to the application that the remote side has + closed its end of the connection. */ + if (inseg.p->tot_len > 0) { + recv_data = inseg.p; + /* Since this pbuf now is the responsibility of the + application, we delete our reference to it so that we won't + (mistakingly) deallocate it. */ + inseg.p = NULL; + } + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n")); + recv_flags |= TF_GOT_FIN; + } + +#if TCP_QUEUE_OOSEQ + /* We now check if we have segments on the ->ooseq queue that + are now in sequence. */ + while (pcb->ooseq != NULL && + pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { + + cseg = pcb->ooseq; + seqno = pcb->ooseq->tcphdr->seqno; + + pcb->rcv_nxt += TCP_TCPLEN(cseg); + LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n", + pcb->rcv_wnd >= TCP_TCPLEN(cseg)); + pcb->rcv_wnd -= TCP_TCPLEN(cseg); + + tcp_update_rcv_ann_wnd(pcb); + + if (cseg->p->tot_len > 0) { + /* Chain this pbuf onto the pbuf that we will pass to + the application. */ + if (recv_data) { + pbuf_cat(recv_data, cseg->p); + } else { + recv_data = cseg->p; + } + cseg->p = NULL; + } + if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n")); + recv_flags |= TF_GOT_FIN; + if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */ + pcb->state = CLOSE_WAIT; + } + } + + pcb->ooseq = cseg->next; + tcp_seg_free(cseg); + } +#endif /* TCP_QUEUE_OOSEQ */ + + + /* Acknowledge the segment(s). */ + tcp_ack(pcb); + + } else { + /* We get here if the incoming segment is out-of-sequence. */ + tcp_send_empty_ack(pcb); +#if TCP_QUEUE_OOSEQ + /* We queue the segment on the ->ooseq queue. */ + if (pcb->ooseq == NULL) { + pcb->ooseq = tcp_seg_copy(&inseg); + } else { + /* If the queue is not empty, we walk through the queue and + try to find a place where the sequence number of the + incoming segment is between the sequence numbers of the + previous and the next segment on the ->ooseq queue. That is + the place where we put the incoming segment. If needed, we + trim the second edges of the previous and the incoming + segment so that it will fit into the sequence. + + If the incoming segment has the same sequence number as a + segment on the ->ooseq queue, we discard the segment that + contains less data. */ + + prev = NULL; + for(next = pcb->ooseq; next != NULL; next = next->next) {//��ooseqȡ�µ�M�����ĶΣ��ñ��Ķηǿգ�M++ + if (seqno == next->tcphdr->seqno) {//�ñ��Ķ���ʼ���== Ҫ����ı��Ķα�� + /* The sequence number of the incoming segment is the + same as the sequence number of the segment on + ->ooseq. We check the lengths to see which one to + discard. */ + if (inseg.len > next->len) {//Ҫ����ı��Ķα�Ÿ� + /* The incoming segment is larger than the old + segment. We replace some segments with the new + one. */ + cseg = tcp_seg_copy(&inseg);//Ҫ����ı��Ķδ����M�����Ķ� + if (cseg != NULL) { + if (prev != NULL) { + prev->next = cseg; + } else { + pcb->ooseq = cseg; + } + tcp_oos_insert_segment(cseg, next); + } + break; + } else { + /* Either the lenghts are the same or the incoming + segment was smaller than the old one; in either + case, we ditch the incoming segment. */ + break; + } + } else { + if (prev == NULL) { + if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) { + /* The sequence number of the incoming segment is lower + than the sequence number of the first segment on the + queue. We put the incoming segment first on the + queue. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + pcb->ooseq = cseg; + tcp_oos_insert_segment(cseg, next); + } + break; + } + } else { + /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) && + TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/ + if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno+1, next->tcphdr->seqno-1)) { + /* The sequence number of the incoming segment is in + between the sequence numbers of the previous and + the next segment on ->ooseq. We trim trim the previous + segment, delete next segments that included in received segment + and trim received, if needed. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) { + /* We need to trim the prev segment. */ + prev->len = (u16_t)(seqno - prev->tcphdr->seqno); + pbuf_realloc(prev->p, prev->len); + } + prev->next = cseg; + tcp_oos_insert_segment(cseg, next); + } + break; + } + } + /* If the "next" segment is the last segment on the + ooseq queue, we add the incoming segment to the end + of the list. */ + if (next->next == NULL && + TCP_SEQ_GT(seqno, next->tcphdr->seqno)) { + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { + /* segment "next" already contains all data */ + break; + } + next->next = tcp_seg_copy(&inseg); + if (next->next != NULL) { + if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) { + /* We need to trim the last segment. */ + next->len = (u16_t)(seqno - next->tcphdr->seqno); + pbuf_realloc(next->p, next->len); + } + /* check if the remote side overruns our receive window */ + if ((u32_t)tcplen + seqno > pcb->rcv_nxt + (u32_t)pcb->rcv_wnd) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, + ("tcp_receive: other end overran receive window" + "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n", + seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); + if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) { + /* Must remove the FIN from the header as we're trimming + * that byte of sequence-space from the packet */ + TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) &~ TCP_FIN); + } + /* Adjust length of segment to fit in the window. */ + next->next->len = pcb->rcv_nxt + pcb->rcv_wnd - seqno; + pbuf_realloc(next->next->p, next->next->len); + tcplen = TCP_TCPLEN(next->next); + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", + (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd)); + } + } + break; + } + } + prev = next; + } + } +#endif /* TCP_QUEUE_OOSEQ */ + + } + } else { + /* The incoming segment is not withing the window. */ + tcp_send_empty_ack(pcb); + } + } else { + /* Segments with length 0 is taken care of here. Segments that + fall out of the window are ACKed. */ + /*if (TCP_SEQ_GT(pcb->rcv_nxt, seqno) || + TCP_SEQ_GEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ + if(!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd-1)){ + tcp_ack_now(pcb);//��Դ�˷���һ������ȷ�ϱ��� + } + } +} + +/** + * Parses the options contained in the incoming segment. + * + * Called from tcp_listen_input() and tcp_process(). + * Currently, only the MSS option is supported! + * + * @param pcb the tcp_pcb for which a segment arrived + */ +static void +tcp_parseopt(struct tcp_pcb *pcb) +{ + u16_t c, max_c; + u16_t mss; + u8_t *opts, opt; +#if LWIP_TCP_TIMESTAMPS + u32_t tsval; +#endif + + opts = (u8_t *)tcphdr + TCP_HLEN; + + /* Parse the TCP MSS option, if present. */ + if(TCPH_HDRLEN(tcphdr) > 0x5) { + max_c = (TCPH_HDRLEN(tcphdr) - 5) << 2; + for (c = 0; c < max_c; ) { + opt = opts[c]; + switch (opt) { + case 0x00: + /* End of options. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: EOL\n")); + return; + case 0x01: + /* NOP option. */ + ++c; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n")); + break; + case 0x02: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n")); + if (opts[c + 1] != 0x04 || c + 0x04 > max_c) { + /* Bad length */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + return; + } + /* An MSS option with the right option length. */ + mss = (opts[c + 2] << 8) | opts[c + 3]; + /* Limit the mss to the configured TCP_MSS and prevent division by zero */ + pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss; + /* Advance to next option */ + c += 0x04; + break; +#if LWIP_TCP_TIMESTAMPS + case 0x08: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: TS\n")); + if (opts[c + 1] != 0x0A || c + 0x0A > max_c) { + /* Bad length */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + return; + } + /* TCP timestamp option with valid length */ + tsval = (opts[c+2]) | (opts[c+3] << 8) | + (opts[c+4] << 16) | (opts[c+5] << 24); + if (flags & TCP_SYN) { + pcb->ts_recent = ntohl(tsval); + pcb->flags |= TF_TIMESTAMP; + } else if (TCP_SEQ_BETWEEN(pcb->ts_lastacksent, seqno, seqno+tcplen)) { + pcb->ts_recent = ntohl(tsval); + } + /* Advance to next option */ + c += 0x0A; + break; +#endif + default: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n")); + if (opts[c + 1] == 0) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + /* If the length field is zero, the options are malformed + and we don't process them further. */ + return; + } + /* All other options have a length field, so that we easily + can skip past them. */ + c += opts[c + 1]; + } + } + } +} + +#endif /* LWIP_TCP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp_out.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp_out.c new file mode 100755 index 0000000..6685a44 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/tcp_out.c @@ -0,0 +1,1539 @@ +/** + * @file + * Transmission Control Protocol, outgoing traffic + * + * The output functions of TCP. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/tcp_impl.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/sys.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/inet_chksum.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "netif/etharp.h" + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/* Define some copy-macros for checksum-on-copy so that the code looks + nicer by preventing too many ifdef's. */ +#if TCP_CHECKSUM_ON_COPY +#define TCP_DATA_COPY(dst, src, len, seg) do { \ + tcp_seg_add_chksum(LWIP_CHKSUM_COPY(dst, src, len), \ + len, &seg->chksum, &seg->chksum_swapped); \ + seg->flags |= TF_SEG_DATA_CHECKSUMMED; } while(0) +#define TCP_DATA_COPY2(dst, src, len, chksum, chksum_swapped) \ + tcp_seg_add_chksum(LWIP_CHKSUM_COPY(dst, src, len), len, chksum, chksum_swapped); +#else /* TCP_CHECKSUM_ON_COPY*/ +#define TCP_DATA_COPY(dst, src, len, seg) MEMCPY(dst, src, len) +#define TCP_DATA_COPY2(dst, src, len, chksum, chksum_swapped) MEMCPY(dst, src, len) +#endif /* TCP_CHECKSUM_ON_COPY*/ + +/** Define this to 1 for an extra check that the output checksum is valid + * (usefule when the checksum is generated by the application, not the stack) */ +#ifndef TCP_CHECKSUM_ON_COPY_SANITY_CHECK +#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 0 +#endif + +/* Forward declarations.*/ +static void tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb); + +/** Allocate a pbuf and create a tcphdr at p->payload, used for output + * functions other than the default tcp_output -> tcp_output_segment + * (e.g. tcp_send_empty_ack, etc.) + * + * @param pcb tcp pcb for which to send a packet (used to initialize tcp_hdr) + * @param optlen length of header-options + * @param datalen length of tcp data to reserve in pbuf + * @param seqno_be seqno in network byte order (big-endian) + * @return pbuf with p->payload being the tcp_hdr + */ +static struct pbuf *ICACHE_FLASH_ATTR +tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen, + u32_t seqno_be /* already in network byte order */) +{ + struct tcp_hdr *tcphdr; + struct pbuf *p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM); + if (p != NULL) { + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= TCP_HLEN + optlen)); + tcphdr = (struct tcp_hdr *)p->payload; + tcphdr->src = htons(pcb->local_port); + tcphdr->dest = htons(pcb->remote_port); + tcphdr->seqno = seqno_be; + tcphdr->ackno = htonl(pcb->rcv_nxt); + TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), TCP_ACK); + tcphdr->wnd = htons(pcb->rcv_ann_wnd); + tcphdr->chksum = 0; + tcphdr->urgp = 0; + + /* If we're sending a packet, update the announced right window edge */ + pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; + } + return p; +} + +/** + * Called by tcp_close() to send a segment including FIN flag but not data. + * + * @param pcb the tcp_pcb over which to send a segment + * @return ERR_OK if sent, another err_t otherwise + */ +err_t +tcp_send_fin(struct tcp_pcb *pcb) +{ + /* first, try to add the fin to the last unsent segment */ + if (pcb->unsent != NULL) { + struct tcp_seg *last_unsent; + for (last_unsent = pcb->unsent; last_unsent->next != NULL; + last_unsent = last_unsent->next); + + if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) { + /* no SYN/FIN/RST flag in the header, we can add the FIN flag */ + TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN); + return ERR_OK; + } + } + /* no data, no length, flags, copy=1, no optdata */ + return tcp_enqueue_flags(pcb, TCP_FIN); +} + +/** + * Create a TCP segment with prefilled header. + * + * Called by tcp_write and tcp_enqueue_flags. + * + * @param pcb Protocol control block for the TCP connection. + * @param p pbuf that is used to hold the TCP header. + * @param flags TCP flags for header. + * @param seqno TCP sequence number of this packet + * @param optflags options to include in TCP header + * @return a new tcp_seg pointing to p, or NULL. + * The TCP header is filled in except ackno and wnd. + * p is freed on failure. + */ +static struct tcp_seg *ICACHE_FLASH_ATTR +tcp_create_segment(struct tcp_pcb *pcb, struct pbuf *p, u8_t flags, u32_t seqno, u8_t optflags) +{ + struct tcp_seg *seg; + u8_t optlen = LWIP_TCP_OPT_LENGTH(optflags); + + if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_create_segment: no memory.\n")); + pbuf_free(p); + return NULL; + } + seg->flags = optflags; + seg->next = NULL; + seg->p = p; + seg->len = p->tot_len - optlen; +#if TCP_OVERSIZE_DBGCHECK + seg->oversize_left = 0; +#endif /* TCP_OVERSIZE_DBGCHECK */ +#if TCP_CHECKSUM_ON_COPY + seg->chksum = 0; + seg->chksum_swapped = 0; + /* check optflags */ + LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED", + (optflags & TF_SEG_DATA_CHECKSUMMED) == 0); +#endif /* TCP_CHECKSUM_ON_COPY */ + + /* build TCP header */ + if (pbuf_header(p, TCP_HLEN)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_create_segment: no room for TCP header in pbuf.\n")); + TCP_STATS_INC(tcp.err); + tcp_seg_free(seg); + return NULL; + } + seg->tcphdr = (struct tcp_hdr *)seg->p->payload; + seg->tcphdr->src = htons(pcb->local_port); + seg->tcphdr->dest = htons(pcb->remote_port); + seg->tcphdr->seqno = htonl(seqno); + /* ackno is set in tcp_output */ + TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), flags); + /* wnd and chksum are set in tcp_output */ + seg->tcphdr->urgp = 0; + return seg; +} + +/** + * Allocate a PBUF_RAM pbuf, perhaps with extra space at the end. + * + * This function is like pbuf_alloc(layer, length, PBUF_RAM) except + * there may be extra bytes available at the end. + * + * @param layer flag to define header size. + * @param length size of the pbuf's payload. + * @param max_length maximum usable size of payload+oversize. + * @param oversize pointer to a u16_t that will receive the number of usable tail bytes. + * @param pcb The TCP connection that willo enqueue the pbuf. + * @param apiflags API flags given to tcp_write. + * @param first_seg true when this pbuf will be used in the first enqueued segment. + * @param + */ +#if TCP_OVERSIZE +static struct pbuf *ICACHE_FLASH_ATTR +tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length, + u16_t *oversize, struct tcp_pcb *pcb, u8_t apiflags, + u8_t first_seg) +{ + struct pbuf *p; + u16_t alloc = length; + +#if LWIP_NETIF_TX_SINGLE_PBUF + LWIP_UNUSED_ARG(max_length); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(apiflags); + LWIP_UNUSED_ARG(first_seg); + /* always create MSS-sized pbufs */ + alloc = pcb->mss; //TCP_MSS; +#else /* LWIP_NETIF_TX_SINGLE_PBUF */ + if (length < max_length) { + /* Should we allocate an oversized pbuf, or just the minimum + * length required? If tcp_write is going to be called again + * before this segment is transmitted, we want the oversized + * buffer. If the segment will be transmitted immediately, we can + * save memory by allocating only length. We use a simple + * heuristic based on the following information: + * + * Did the user set TCP_WRITE_FLAG_MORE? + * + * Will the Nagle algorithm defer transmission of this segment? + */ + if ((apiflags & TCP_WRITE_FLAG_MORE) || + (!(pcb->flags & TF_NODELAY) && + (!first_seg || + pcb->unsent != NULL || + pcb->unacked != NULL))) { + alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(length + TCP_OVERSIZE)); + } + } +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + p = pbuf_alloc(layer, alloc, PBUF_RAM); + if (p == NULL) { + return NULL; + } + LWIP_ASSERT("need unchained pbuf", p->next == NULL); + *oversize = p->len - length; + /* trim p->len to the currently used size */ + p->len = p->tot_len = length; + return p; +} +#else /* TCP_OVERSIZE */ +#define tcp_pbuf_prealloc(layer, length, mx, os, pcb, api, fst) pbuf_alloc((layer), (length), PBUF_RAM) +#endif /* TCP_OVERSIZE */ + +#if TCP_CHECKSUM_ON_COPY +/** Add a checksum of newly added data to the segment */ +static void ICACHE_FLASH_ATTR +tcp_seg_add_chksum(u16_t chksum, u16_t len, u16_t *seg_chksum, + u8_t *seg_chksum_swapped) +{ + u32_t helper; + /* add chksum to old chksum and fold to u16_t */ + helper = chksum + *seg_chksum; + chksum = FOLD_U32T(helper); + if ((len & 1) != 0) { + *seg_chksum_swapped = 1 - *seg_chksum_swapped; + chksum = SWAP_BYTES_IN_WORD(chksum); + } + *seg_chksum = chksum; +} +#endif /* TCP_CHECKSUM_ON_COPY */ + +/** Checks if tcp_write is allowed or not (checks state, snd_buf and snd_queuelen). + * + * @param pcb the tcp pcb to check for + * @param len length of data to send (checked agains snd_buf) + * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise + */ +static err_t ICACHE_FLASH_ATTR +tcp_write_checks(struct tcp_pcb *pcb, u16_t len) +{ + /* connection is in invalid state for data transmission? */ + if ((pcb->state != ESTABLISHED) && + (pcb->state != CLOSE_WAIT) && + (pcb->state != SYN_SENT) && + (pcb->state != SYN_RCVD)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n")); + return ERR_CONN; + } else if (len == 0) { + return ERR_OK; + } + + /* fail on too much data */ + if (len > pcb->snd_buf) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"U16_F")\n", + len, pcb->snd_buf)); + pcb->flags |= TF_NAGLEMEMERR; + return ERR_MEM; + } + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); + + /* If total number of pbufs on the unsent/unacked queues exceeds the + * configured maximum, return an error */ + /* check for configured max queuelen and possible overflow */ + if ((pcb->snd_queuelen >= TCP_SND_QUEUELEN) || (pcb->snd_queuelen > TCP_SNDQUEUELEN_OVERFLOW)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n", + pcb->snd_queuelen, TCP_SND_QUEUELEN)); + TCP_STATS_INC(tcp.memerr); + pcb->flags |= TF_NAGLEMEMERR; + return ERR_MEM; + } + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty", + pcb->unacked != NULL || pcb->unsent != NULL); + } else { + LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty", + pcb->unacked == NULL && pcb->unsent == NULL); + } + return ERR_OK; +} + +/** + * Write data for sending (but does not send it immediately). + *��������һ��������ݣ��ú�����һ�����Ķβ����ڿ��ƿ黺������� + * It waits in the expectation of more data being sent soon (as + * it can send them more efficiently by combining them together). + * To prompt the system to send data now, call tcp_output() after + * calling tcp_write(). + * + * @param pcb Protocol control block for the TCP connection to enqueue data for.��Ӧ���ӿ��ƿ� + * @param arg Pointer to the data to be enqueued for sending.���������ʼ��ַ + * @param len Data length in bytes������ݳ��� + * @param apiflags combination of following flags :����Ƿ���п������Լ����Ķ��ײ��Ƿ������PSH��־ + * - TCP_WRITE_FLAG_COPY (0x01) data will be copied into memory belonging to the stack + * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will be set on last segment sent, + * @return ERR_OK if enqueued, another err_t on error + */ +err_t +tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags) +{ + struct pbuf *concat_p = NULL; + struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL; + u16_t pos = 0; /* position in 'arg' data */ + u16_t queuelen; + u8_t optlen = 0; + u8_t optflags = 0; +#if TCP_OVERSIZE + u16_t oversize = 0; + u16_t oversize_used = 0; +#endif /* TCP_OVERSIZE */ +#if TCP_CHECKSUM_ON_COPY + u16_t concat_chksum = 0; + u8_t concat_chksum_swapped = 0; + u16_t concat_chksummed = 0; +#endif /* TCP_CHECKSUM_ON_COPY */ + err_t err; + +#if LWIP_NETIF_TX_SINGLE_PBUF + /* Always copy to try to create single pbufs for TX */ + apiflags |= TCP_WRITE_FLAG_COPY; +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n", + (void *)pcb, arg, len, (u16_t)apiflags)); + LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)", + arg != NULL, return ERR_ARG;); + + err = tcp_write_checks(pcb, len); + if (err != ERR_OK) { + return err; + } + queuelen = pcb->snd_queuelen; + +#if LWIP_TCP_TIMESTAMPS + if ((pcb->flags & TF_TIMESTAMP)) { + optflags = TF_SEG_OPTS_TS; + optlen = LWIP_TCP_OPT_LENGTH(TF_SEG_OPTS_TS); + } +#endif /* LWIP_TCP_TIMESTAMPS */ + + + /* + * TCP segmentation is done in three phases with increasing complexity: + * + * 1. Copy data directly into an oversized pbuf. + * 2. Chain a new pbuf to the end of pcb->unsent. + * 3. Create new segments. + * + * We may run out of memory at any point. In that case we must + * return ERR_MEM and not change anything in pcb. Therefore, all + * changes are recorded in local variables and committed at the end + * of the function. Some pcb fields are maintained in local copies: + * + * queuelen = pcb->snd_queuelen + * oversize = pcb->unsent_oversize + * + * These variables are set consistently by the phases: + * + * seg points to the last segment tampered with. + * + * pos records progress as data is segmented. + */ + + /* Find the tail of the unsent queue. */ + if (pcb->unsent != NULL) { + u16_t space = 0; + u16_t unsent_optlen = 0; + + /* @todo: this could be sped up by keeping last_unsent in the pcb */ + for (last_unsent = pcb->unsent; last_unsent->next != NULL; + last_unsent = last_unsent->next); + + /* Usable space at the end of the last unsent segment */ + unsent_optlen = LWIP_TCP_OPT_LENGTH(last_unsent->flags); + space = pcb->mss - (last_unsent->len + unsent_optlen); + + /* + * Phase 1: Copy data directly into an oversized pbuf. + * + * The number of bytes copied is recorded in the oversize_used + * variable. The actual copying is done at the bottom of the + * function. + */ +#if TCP_OVERSIZE +#if TCP_OVERSIZE_DBGCHECK + /* check that pcb->unsent_oversize matches last_unsent->unsent_oversize */ + LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)", + pcb->unsent_oversize == last_unsent->oversize_left); +#endif /* TCP_OVERSIZE_DBGCHECK */ + oversize = pcb->unsent_oversize; + if (oversize > 0) { + LWIP_ASSERT("inconsistent oversize vs. space", oversize_used <= space); + seg = last_unsent; + oversize_used = oversize < len ? oversize : len; + pos += oversize_used; + oversize -= oversize_used; + space -= oversize_used; + } + /* now we are either finished or oversize is zero */ + LWIP_ASSERT("inconsistend oversize vs. len", (oversize == 0) || (pos == len)); +#endif /* TCP_OVERSIZE */ + + if (pos > len) { + return ERR_MEM; + } + +#if !LWIP_NETIF_TX_SINGLE_PBUF + /* + * Phase 2: Chain a new pbuf to the end of pcb->unsent. + * + * We don't extend segments containing SYN/FIN flags or options + * (len==0). The new pbuf is kept in concat_p and pbuf_cat'ed at + * the end. + */ + if ((pos < len) && (space > 0) && (last_unsent->len > 0)) { + u16_t seglen = space < len - pos ? space : len - pos; + seg = last_unsent; + + /* Create a pbuf with a copy or reference to seglen bytes. We + * can use PBUF_RAW here since the data appears in the middle of + * a segment. A header will never be prepended. */ + if (apiflags & TCP_WRITE_FLAG_COPY) { + /* Data is copied */ + if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, + ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", + seglen)); + goto memerr; + } +#if TCP_OVERSIZE_DBGCHECK + last_unsent->oversize_left = oversize; +#endif /* TCP_OVERSIZE_DBGCHECK */ + TCP_DATA_COPY2(concat_p->payload, (u8_t*)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped); +#if TCP_CHECKSUM_ON_COPY + concat_chksummed += seglen; +#endif /* TCP_CHECKSUM_ON_COPY */ + } else { + /* Data is not copied */ + if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, + ("tcp_write: could not allocate memory for zero-copy pbuf\n")); + goto memerr; + } +#if TCP_CHECKSUM_ON_COPY + /* calculate the checksum of nocopy-data */ + tcp_seg_add_chksum(~inet_chksum((u8_t*)arg + pos, seglen), seglen, + &concat_chksum, &concat_chksum_swapped); + concat_chksummed += seglen; +#endif /* TCP_CHECKSUM_ON_COPY */ + /* reference the non-volatile payload data */ + concat_p->payload = (u8_t*)arg + pos; + } + + pos += seglen; + queuelen += pbuf_clen(concat_p); + } +#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */ + } else { +#if TCP_OVERSIZE + LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)", + pcb->unsent_oversize == 0); +#endif /* TCP_OVERSIZE */ + } + + /* + * Phase 3: Create new segments. + * + * The new segments are chained together in the local 'queue' + * variable, ready to be appended to pcb->unsent. + */ + while (pos < len) { + struct pbuf *p; + u16_t left = len - pos; + u16_t max_len = pcb->mss - optlen; + u16_t seglen = left > max_len ? max_len : left; +#if TCP_CHECKSUM_ON_COPY + u16_t chksum = 0; + u8_t chksum_swapped = 0; +#endif /* TCP_CHECKSUM_ON_COPY */ + + if (apiflags & TCP_WRITE_FLAG_COPY) { + /* If copy is set, memory should be allocated and data copied + * into pbuf */ + if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, pcb->mss, &oversize, pcb, apiflags, queue == NULL)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen)); + goto memerr; + } + LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen", + (p->len >= seglen)); + TCP_DATA_COPY2((char *)p->payload + optlen, (u8_t*)arg + pos, seglen, &chksum, &chksum_swapped); + } else { + /* Copy is not set: First allocate a pbuf for holding the data. + * Since the referenced data is available at least until it is + * sent out on the link (as it has to be ACKed by the remote + * party) we can safely use PBUF_ROM instead of PBUF_REF here. + */ + struct pbuf *p2; +#if TCP_OVERSIZE + LWIP_ASSERT("oversize == 0", oversize == 0); +#endif /* TCP_OVERSIZE */ + if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_write: could not allocate memory for zero-copy pbuf\n")); + goto memerr; + } +#if TCP_CHECKSUM_ON_COPY + /* calculate the checksum of nocopy-data */ + chksum = ~inet_chksum((u8_t*)arg + pos, seglen); +#endif /* TCP_CHECKSUM_ON_COPY */ + /* reference the non-volatile payload data */ + p2->payload = (u8_t*)arg + pos; + + /* Second, allocate a pbuf for the headers. */ + if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { + /* If allocation fails, we have to deallocate the data pbuf as + * well. */ + pbuf_free(p2); + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_write: could not allocate memory for header pbuf\n")); + goto memerr; + } + /* Concatenate the headers and data pbufs together. */ + pbuf_cat(p/*header*/, p2/*data*/); + } + + queuelen += pbuf_clen(p); + + /* Now that there are more segments queued, we check again if the + * length of the queue exceeds the configured maximum or + * overflows. */ + if ((queuelen > TCP_SND_QUEUELEN) || (queuelen > TCP_SNDQUEUELEN_OVERFLOW)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_write: queue too long %"U16_F" (%"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); + pbuf_free(p); + goto memerr; + } + + if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) { + goto memerr; + } +#if TCP_OVERSIZE_DBGCHECK + seg->oversize_left = oversize; +#endif /* TCP_OVERSIZE_DBGCHECK */ +#if TCP_CHECKSUM_ON_COPY + seg->chksum = chksum; + seg->chksum_swapped = chksum_swapped; + seg->flags |= TF_SEG_DATA_CHECKSUMMED; +#endif /* TCP_CHECKSUM_ON_COPY */ + + /* first segment of to-be-queued data? */ + if (queue == NULL) { + queue = seg; + } else { + /* Attach the segment to the end of the queued segments */ + LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL); + prev_seg->next = seg; + } + /* remember last segment of to-be-queued data for next iteration */ + prev_seg = seg; + + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n", + ntohl(seg->tcphdr->seqno), + ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg))); + + pos += seglen; + } + + /* + * All three segmentation phases were successful. We can commit the + * transaction. + */ + + /* + * Phase 1: If data has been added to the preallocated tail of + * last_unsent, we update the length fields of the pbuf chain. + */ +#if TCP_OVERSIZE + if (oversize_used > 0) { + struct pbuf *p; + /* Bump tot_len of whole chain, len of tail */ + for (p = last_unsent->p; p; p = p->next) { + p->tot_len += oversize_used; + if (p->next == NULL) { + TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent); + p->len += oversize_used; + } + } + last_unsent->len += oversize_used; +#if TCP_OVERSIZE_DBGCHECK + last_unsent->oversize_left -= oversize_used; +#endif /* TCP_OVERSIZE_DBGCHECK */ + } + pcb->unsent_oversize = oversize; +#endif /* TCP_OVERSIZE */ + + /* + * Phase 2: concat_p can be concatenated onto last_unsent->p + */ + if (concat_p != NULL) { + LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty", + (last_unsent != NULL)); + pbuf_cat(last_unsent->p, concat_p); + last_unsent->len += concat_p->tot_len; +#if TCP_CHECKSUM_ON_COPY + if (concat_chksummed) { + tcp_seg_add_chksum(concat_chksum, concat_chksummed, &last_unsent->chksum, + &last_unsent->chksum_swapped); + last_unsent->flags |= TF_SEG_DATA_CHECKSUMMED; + } +#endif /* TCP_CHECKSUM_ON_COPY */ + } + + /* + * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that + * is harmless + */ + if (last_unsent == NULL) { + pcb->unsent = queue; + } else { + last_unsent->next = queue; + } + + /* + * Finally update the pcb state. + */ + pcb->snd_lbb += len; + pcb->snd_buf -= len; + pcb->snd_queuelen = queuelen; + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n", + pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_write: valid queue length", + pcb->unacked != NULL || pcb->unsent != NULL); + } + + /* Set the PSH flag in the last segment that we enqueued. */ + if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE)==0)) { + TCPH_SET_FLAG(seg->tcphdr, TCP_PSH); + } + + return ERR_OK; +memerr: + pcb->flags |= TF_NAGLEMEMERR; + TCP_STATS_INC(tcp.memerr); + + if (concat_p != NULL) { + pbuf_free(concat_p); + } + if (queue != NULL) { + tcp_segs_free(queue); + } + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL || + pcb->unsent != NULL); + } + LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen)); + return ERR_MEM; +} + +/** + * Enqueue TCP options for transmission. + * + * Called by tcp_connect(), tcp_listen_input(), and tcp_send_ctrl(). + * + * @param pcb Protocol control block for the TCP connection. + * @param flags TCP header flags to set in the outgoing segment. + * @param optdata pointer to TCP options, or NULL. + * @param optlen length of TCP options in bytes. + */ +err_t +tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags) +{ + struct pbuf *p; + struct tcp_seg *seg; + u8_t optflags = 0; + u8_t optlen = 0; + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); + + LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)", + (flags & (TCP_SYN | TCP_FIN)) != 0); + + /* check for configured max queuelen and possible overflow */ + if ((pcb->snd_queuelen >= TCP_SND_QUEUELEN) || (pcb->snd_queuelen > TCP_SNDQUEUELEN_OVERFLOW)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_enqueue_flags: too long queue %"U16_F" (max %"U16_F")\n", + pcb->snd_queuelen, TCP_SND_QUEUELEN)); + TCP_STATS_INC(tcp.memerr); + pcb->flags |= TF_NAGLEMEMERR; + return ERR_MEM; + } + + if (flags & TCP_SYN) { + optflags = TF_SEG_OPTS_MSS; + } +#if LWIP_TCP_TIMESTAMPS + if ((pcb->flags & TF_TIMESTAMP)) { + optflags |= TF_SEG_OPTS_TS; + } +#endif /* LWIP_TCP_TIMESTAMPS */ + optlen = LWIP_TCP_OPT_LENGTH(optflags); + + /* tcp_enqueue_flags is always called with either SYN or FIN in flags. + * We need one available snd_buf byte to do that. + * This means we can't send FIN while snd_buf==0. A better fix would be to + * not include SYN and FIN sequence numbers in the snd_buf count. */ + if (pcb->snd_buf == 0) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_enqueue_flags: no send buffer available\n")); + TCP_STATS_INC(tcp.memerr); + return ERR_MEM; + } + + /* Allocate pbuf with room for TCP header + options */ + if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { + pcb->flags |= TF_NAGLEMEMERR; + TCP_STATS_INC(tcp.memerr); + return ERR_MEM; + } + LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen", + (p->len >= optlen)); + + /* Allocate memory for tcp_seg, and fill in fields. */ + if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) { + pcb->flags |= TF_NAGLEMEMERR; + TCP_STATS_INC(tcp.memerr); + return ERR_MEM; + } + LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % MEM_ALIGNMENT) == 0); + LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0); + + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, + ("tcp_enqueue_flags: queueing %"U32_F":%"U32_F" (0x%"X16_F")\n", + ntohl(seg->tcphdr->seqno), + ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg), + (u16_t)flags)); + + /* Now append seg to pcb->unsent queue */ + if (pcb->unsent == NULL) { + pcb->unsent = seg; + } else { + struct tcp_seg *useg; + for (useg = pcb->unsent; useg->next != NULL; useg = useg->next); + useg->next = seg; + } +#if TCP_OVERSIZE + /* The new unsent tail has no space */ + pcb->unsent_oversize = 0; +#endif /* TCP_OVERSIZE */ + + /* SYN and FIN bump the sequence number */ + if ((flags & TCP_SYN) || (flags & TCP_FIN)) { + pcb->snd_lbb++; + /* optlen does not influence snd_buf */ + pcb->snd_buf--; + } + if (flags & TCP_FIN) { + pcb->flags |= TF_FIN; + } + + /* update number of segments on the queues */ + pcb->snd_queuelen += pbuf_clen(seg->p); + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_enqueue_flags: invalid queue length", + pcb->unacked != NULL || pcb->unsent != NULL); + } + + return ERR_OK; +} + + +#if LWIP_TCP_TIMESTAMPS +/* Build a timestamp option (12 bytes long) at the specified options pointer) + * + * @param pcb tcp_pcb + * @param opts option pointer where to store the timestamp option + */ +static void ICACHE_FLASH_ATTR +tcp_build_timestamp_option(struct tcp_pcb *pcb, u32_t *opts) +{ + /* Pad with two NOP options to make everything nicely aligned */ + opts[0] = PP_HTONL(0x0101080A); + opts[1] = htonl(sys_now()); + opts[2] = htonl(pcb->ts_recent); +} +#endif + +/** Send an ACK without data. + * + * @param pcb Protocol control block for the TCP connection to send the ACK + */ +err_t +tcp_send_empty_ack(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + u8_t optlen = 0; + +#if LWIP_TCP_TIMESTAMPS + if (pcb->flags & TF_TIMESTAMP) { + optlen = LWIP_TCP_OPT_LENGTH(TF_SEG_OPTS_TS); + } +#endif + + p = tcp_output_alloc_header(pcb, optlen, 0, htonl(pcb->snd_nxt)); + if (p == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n")); + return ERR_BUF; + } + tcphdr = (struct tcp_hdr *)p->payload; + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, + ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt)); + /* remove ACK flags from the PCB, as we send an empty ACK now */ + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + + /* NB. MSS option is only sent on SYNs, so ignore it here */ +#if LWIP_TCP_TIMESTAMPS + pcb->ts_lastacksent = pcb->rcv_nxt; + + if (pcb->flags & TF_TIMESTAMP) { + tcp_build_timestamp_option(pcb, (u32_t *)(tcphdr + 1)); + } +#endif + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &(pcb->local_ip), &(pcb->remote_ip), + IP_PROTO_TCP, p->tot_len); +#endif +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP, &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + pbuf_free(p); + + return ERR_OK; +} + +/** + * Find out what we can send and send it + *���Ϳ��ƿ黺����еı��Ķ� + * @param pcb Protocol control block for the TCP connection to send data + * @return ERR_OK if data has been sent or nothing to send + * another err_t on error + */ +err_t ICACHE_FLASH_ATTR +tcp_output(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg, *useg; + u32_t wnd, snd_nxt; +#if TCP_CWND_DEBUG + s16_t i = 0; +#endif /* TCP_CWND_DEBUG */ + /* First, check if we are invoked by the TCP input processing + code. If so, we do not output anything. Instead, we rely on the + input processing code to call us when input processing is done + with. �����ƿ鵱ǰ������ݱ����?ֱ�ӷ���*/ + if (tcp_input_pcb == pcb) { + return ERR_OK; + } + + wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);//�ӷ��ʹ��ں������ȡС�ߵõ���Ч���ʹ��� + + seg = pcb->unsent; + + /* If the TF_ACK_NOW flag is set and no data will be sent (either + * because the ->unsent queue is empty or because the window does + * not allow it), construct an empty ACK segment and send it. + * + * If data is to be sent, we will just piggyback the ACK (see below). + */ + if (pcb->flags & TF_ACK_NOW && + (seg == NULL || + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd)) { + return tcp_send_empty_ack(pcb);//����ֻ��ACK�ı��Ķ� + } + + /* useg should point to last segment on unacked queue */ + useg = pcb->unacked; + if (useg != NULL) { + for (; useg->next != NULL; useg = useg->next);//�õ�β�� + } + +#if TCP_OUTPUT_DEBUG + if (seg == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: nothing to send (%p)\n", + (void*)pcb->unsent)); + } +#endif /* TCP_OUTPUT_DEBUG */ +#if TCP_CWND_DEBUG + if (seg == NULL) { + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U16_F + ", cwnd %"U16_F", wnd %"U32_F + ", seg == NULL, ack %"U32_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack)); + } else { + LWIP_DEBUGF(TCP_CWND_DEBUG, + ("tcp_output: snd_wnd %"U16_F", cwnd %"U16_F", wnd %"U32_F + ", effwnd %"U32_F", seq %"U32_F", ack %"U32_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len, + ntohl(seg->tcphdr->seqno), pcb->lastack)); + } +#endif /* TCP_CWND_DEBUG */ + /* data available and window allows it to be sent? + *��ǰ��Ч�������?�ķ��ͣ�ѭ�����ͱ��ģ�ֱ�������*/ + while (seg != NULL && + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd + && (seg->p->ref<2) ) { + LWIP_ASSERT("RST not expected here!", + (TCPH_FLAGS(seg->tcphdr) & TCP_RST) == 0); + /* Stop sending if the nagle algorithm would prevent it + * Don't stop: + * - if tcp_write had a memory error before (prevent delayed ACK timeout) or + * - if FIN was already enqueued for this PCB (SYN is always alone in a segment - + * either seg->next != NULL or pcb->unacked == NULL; + * RST is no sent using tcp_write/tcp_output. + */ + if((tcp_do_output_nagle(pcb) == 0) && + ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)){ + break; + } +#if TCP_CWND_DEBUG + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U16_F", cwnd %"U16_F", wnd %"U32_F", effwnd %"U32_F", seq %"U32_F", ack %"U32_F", i %"S16_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, + ntohl(seg->tcphdr->seqno) + seg->len - + pcb->lastack, + ntohl(seg->tcphdr->seqno), pcb->lastack, i)); + ++i; +#endif /* TCP_CWND_DEBUG */ + + pcb->unsent = seg->next; + + if (pcb->state != SYN_SENT) { + TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);//��д�ײ�ACK��־ + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW);//����־λ + } + + tcp_output_segment(seg, pcb);//���ú����ͱ��Ķ� + + snd_nxt = ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);//����snd_nxt + if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) { + pcb->snd_nxt = snd_nxt;//����Ҫ���͵���ݱ�� + } + /* put segment on unacknowledged list if length > 0 + */ + if (TCP_TCPLEN(seg) > 0) { + seg->next = NULL; + /* unacked list is empty? ֱ�ӹҽ�*/ + if (pcb->unacked == NULL) { + pcb->unacked = seg; + useg = seg; + /* unacked list is not empty?����ǰ���İ�˳����֯�ڶ����� */ + } else { + /* In the case of fast retransmit, the packet should not go to the tail + * of the unacked queue, but rather somewhere before it. We need to check for + * this case. -STJ Jul 27, 2004 */ //���ǰ���ĵ����кŵ��ڶ���β���������кţ� + //�Ӷ����ײ���ʼ + if (TCP_SEQ_LT(ntohl(seg->tcphdr->seqno), ntohl(useg->tcphdr->seqno))) { + /* add segment to before tail of unacked list, keeping the list sorted */ + struct tcp_seg **cur_seg = &(pcb->unacked); + while (*cur_seg && + TCP_SEQ_LT(ntohl((*cur_seg)->tcphdr->seqno), ntohl(seg->tcphdr->seqno))) { + cur_seg = &((*cur_seg)->next ); + } + seg->next = (*cur_seg); + (*cur_seg) = seg; + } else {//���������ߣ������δȷ�϶���ĩβ + /* add segment to tail of unacked list */ + useg->next = seg; + useg = useg->next; + } + } + /* do not queue empty segments on the unacked list */ + } else {//���Ķγ���Ϊ0��ֱ��ɾ�������ش� + tcp_seg_free(seg); + } + seg = pcb->unsent;//������һ�����Ķ� + } +#if TCP_OVERSIZE + if (pcb->unsent == NULL) { + /* last unsent has been removed, reset unsent_oversize */ + pcb->unsent_oversize = 0; + } +#endif /* TCP_OVERSIZE */ + +//���ʹ��������±��IJ��ܷ��ͣ��������㴰��̽�⡣ + if (seg != NULL && pcb->persist_backoff == 0 && + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > pcb->snd_wnd) { + /* prepare for persist timer */ + pcb->persist_cnt = 0; + pcb->persist_backoff = 1; + } + + pcb->flags &= ~TF_NAGLEMEMERR;//���ڴ�����־ + return ERR_OK; +} + +/** + * Called by tcp_output() to actually send a TCP segment over IP. + * + * @param seg the tcp_seg to send + * @param pcb the tcp_pcb for the TCP connection used to send the segment + */ + +static void +tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb) +{ + u16_t len; + struct netif *netif; + u32_t *opts; + /** @bug Exclude retransmitted segments from this count. */ + snmp_inc_tcpoutsegs(); + + /* The TCP header has already been constructed, but the ackno and + wnd fields remain. */ + seg->tcphdr->ackno = htonl(pcb->rcv_nxt); + + /* advertise our receive window size in this TCP segment */ + seg->tcphdr->wnd = htons(pcb->rcv_ann_wnd); + + pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; + + /* Add any requested options. NB MSS option is only set on SYN + packets, so ignore it here */ + LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % MEM_ALIGNMENT) == 0); + opts = (u32_t *)(void *)(seg->tcphdr + 1); + if (seg->flags & TF_SEG_OPTS_MSS) { + TCP_BUILD_MSS_OPTION(*opts); + opts += 1; + } +#if LWIP_TCP_TIMESTAMPS + pcb->ts_lastacksent = pcb->rcv_nxt; + + if (seg->flags & TF_SEG_OPTS_TS) { + tcp_build_timestamp_option(pcb, opts); + opts += 3; + } +#endif + + /* Set retransmission timer running if it is not currently enabled + This must be set before checking the route. modify by ives at 2014.4.24*/ + if (pcb->rtime == -1) { + pcb->rtime = 0; + } + + /* If we don't have a local IP address, we get one by + calling ip_route(). */ + if (ip_addr_isany(&(pcb->local_ip))) { + netif = ip_route(&(pcb->remote_ip)); + if (netif == NULL) { + return; + } + ip_addr_copy(pcb->local_ip, netif->ip_addr); + } + + if (pcb->rttest == 0) { + pcb->rttest = tcp_ticks; + pcb->rtseq = ntohl(seg->tcphdr->seqno); + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_output_segment: rtseq %"U32_F"\n", pcb->rtseq)); + } + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n", + htonl(seg->tcphdr->seqno), htonl(seg->tcphdr->seqno) + + seg->len)); + + len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload); + + seg->p->len -= len; + seg->p->tot_len -= len; + + seg->p->payload = seg->tcphdr; + + seg->tcphdr->chksum = 0; +#if CHECKSUM_GEN_TCP +#if TCP_CHECKSUM_ON_COPY + { + u32_t acc; +#if TCP_CHECKSUM_ON_COPY_SANITY_CHECK + u16_t chksum_slow = inet_chksum_pseudo(seg->p, &(pcb->local_ip), + &(pcb->remote_ip), + IP_PROTO_TCP, seg->p->tot_len); +#endif /* TCP_CHECKSUM_ON_COPY_SANITY_CHECK */ + if ((seg->flags & TF_SEG_DATA_CHECKSUMMED) == 0) { + LWIP_ASSERT("data included but not checksummed", + seg->p->tot_len == (TCPH_HDRLEN(seg->tcphdr) * 4)); + } + + /* rebuild TCP header checksum (TCP header changes for retransmissions!) */ + acc = inet_chksum_pseudo_partial(seg->p, &(pcb->local_ip), + &(pcb->remote_ip), + IP_PROTO_TCP, seg->p->tot_len, TCPH_HDRLEN(seg->tcphdr) * 4); + /* add payload checksum */ + if (seg->chksum_swapped) { + seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum); + seg->chksum_swapped = 0; + } + acc += (u16_t)~(seg->chksum); + seg->tcphdr->chksum = FOLD_U32T(acc); +#if TCP_CHECKSUM_ON_COPY_SANITY_CHECK + if (chksum_slow != seg->tcphdr->chksum) { + LWIP_DEBUGF(TCP_DEBUG | LWIP_DBG_LEVEL_WARNING, + ("tcp_output_segment: calculated checksum is %"X16_F" instead of %"X16_F"\n", + seg->tcphdr->chksum, chksum_slow)); + seg->tcphdr->chksum = chksum_slow; + } +#endif /* TCP_CHECKSUM_ON_COPY_SANITY_CHECK */ + } +#else /* TCP_CHECKSUM_ON_COPY */ + seg->tcphdr->chksum = inet_chksum_pseudo(seg->p, &(pcb->local_ip), + &(pcb->remote_ip), + IP_PROTO_TCP, seg->p->tot_len); +#endif /* TCP_CHECKSUM_ON_COPY */ +#endif /* CHECKSUM_GEN_TCP */ + TCP_STATS_INC(tcp.xmit); + +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP, &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ +} + +/** + * Send a TCP RESET packet (empty segment with RST flag set) either to + * abort a connection or to show that there is no matching local connection + * for a received segment. + * + * Called by tcp_abort() (to abort a local connection), tcp_input() (if no + * matching local pcb was found), tcp_listen_input() (if incoming segment + * has ACK flag set) and tcp_process() (received segment in the wrong state) + * + * Since a RST segment is in most cases not sent for an active connection, + * tcp_rst() has a number of arguments that are taken from a tcp_pcb for + * most other segment output functions. + * + * @param seqno the sequence number to use for the outgoing segment + * @param ackno the acknowledge number to use for the outgoing segment + * @param local_ip the local IP address to send the segment from + * @param remote_ip the remote IP address to send the segment to + * @param local_port the local TCP port to send the segment from + * @param remote_port the remote TCP port to send the segment to + */ +void +tcp_rst(u32_t seqno, u32_t ackno, + ip_addr_t *local_ip, ip_addr_t *remote_ip, + u16_t local_port, u16_t remote_port) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); + if (p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= sizeof(struct tcp_hdr))); + + tcphdr = (struct tcp_hdr *)p->payload; + tcphdr->src = htons(local_port); + tcphdr->dest = htons(remote_port); + tcphdr->seqno = htonl(seqno); + tcphdr->ackno = htonl(ackno); + TCPH_HDRLEN_FLAGS_SET(tcphdr, TCP_HLEN/4, TCP_RST | TCP_ACK); + tcphdr->wnd = PP_HTONS(TCP_WND); + tcphdr->chksum = 0; + tcphdr->urgp = 0; + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, local_ip, remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + snmp_inc_tcpoutrsts(); + /* Send output with hardcoded TTL since we have no access to the pcb */ + ip_output(p, local_ip, remote_ip, TCP_TTL, 0, IP_PROTO_TCP); + pbuf_free(p); + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno)); +} + +/** + * Requeue all unacked segments for retransmission + * + * Called by tcp_slowtmr() for slow retransmission. + * + * @param pcb the tcp_pcb for which to re-enqueue all unacked segments + */ +void +tcp_rexmit_rto(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg; + struct tcp_seg *t0_head = NULL, *t0_tail = NULL; /* keep in unacked */ + struct tcp_seg *t1_head = NULL, *t1_tail = NULL; /* link to unsent */ + bool t0_1st = true, t1_1st = true; + + if (pcb->unacked == NULL) { + return; + } + +#if 1 /* by Snake: resolve the bug of pbuf reuse */ + seg = pcb->unacked; + while (seg != NULL) { + if (seg->p->eb) { + if (t0_1st) { + t0_head = t0_tail = seg; + t0_1st = false; + } else { + t0_tail->next = seg; + t0_tail = seg; + } + seg = seg->next; + t0_tail->next = NULL; + } else { + if (t1_1st) { + t1_head = t1_tail = seg; + t1_1st = false; + } else { + t1_tail->next = seg; + t1_tail = seg; + } + seg = seg->next; + t1_tail->next = NULL; + } + } + if (t1_head && t1_tail) { + t1_tail->next = pcb->unsent; + pcb->unsent = t1_head; + } + pcb->unacked = t0_head; + +#else + + /* Move all unacked segments to the head of the unsent queue */ + for (seg = pcb->unacked; seg->next != NULL; seg = seg->next); + /* concatenate unsent queue after unacked queue */ + seg->next = pcb->unsent; + /* unsent queue is the concatenated queue (of unacked, unsent) */ + pcb->unsent = pcb->unacked; + /* unacked queue is now empty */ + pcb->unacked = NULL; +#endif + /* last unsent hasn't changed, no need to reset unsent_oversize */ + + /* increment number of retransmissions */ + ++pcb->nrtx; + + /* Don't take any RTT measurements after retransmitting. */ + pcb->rttest = 0; + + /* Do the actual retransmission */ + tcp_output(pcb); +} + +/** + * Requeue the first unacked segment for retransmission + * + * Called by tcp_receive() for fast retramsmit. + * + * @param pcb the tcp_pcb for which to retransmit the first unacked segment + */ +void +tcp_rexmit(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg; + struct tcp_seg **cur_seg; + + if (pcb->unacked == NULL) { + return; + } + + /* Move the first unacked segment to the unsent queue */ + /* Keep the unsent queue sorted. */ + seg = pcb->unacked; + pcb->unacked = seg->next; + + cur_seg = &(pcb->unsent); + while (*cur_seg && + TCP_SEQ_LT(ntohl((*cur_seg)->tcphdr->seqno), ntohl(seg->tcphdr->seqno))) { + cur_seg = &((*cur_seg)->next ); + } + seg->next = *cur_seg; + *cur_seg = seg; +#if TCP_OVERSIZE + if (seg->next == NULL) { + /* the retransmitted segment is last in unsent, so reset unsent_oversize */ + pcb->unsent_oversize = 0; + } +#endif /* TCP_OVERSIZE */ + + ++pcb->nrtx; + + /* Don't take any rtt measurements after retransmitting. */ + pcb->rttest = 0; + + /* Do the actual retransmission. */ + snmp_inc_tcpretranssegs(); + /* No need to call tcp_output: we are always called from tcp_input() + and thus tcp_output directly returns. */ +} + + +/** + * Handle retransmission after three dupacks received + * + * @param pcb the tcp_pcb for which to retransmit the first unacked segment + */ +void +tcp_rexmit_fast(struct tcp_pcb *pcb) +{ + if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) { + /* This is fast retransmit. Retransmit the first unacked segment. */ + LWIP_DEBUGF(TCP_FR_DEBUG, + ("tcp_receive: dupacks %"U16_F" (%"U32_F + "), fast retransmit %"U32_F"\n", + (u16_t)pcb->dupacks, pcb->lastack, + ntohl(pcb->unacked->tcphdr->seqno))); + tcp_rexmit(pcb); + + /* Set ssthresh to half of the minimum of the current + * cwnd and the advertised window */ + if (pcb->cwnd > pcb->snd_wnd) { + pcb->ssthresh = pcb->snd_wnd / 2; + } else { + pcb->ssthresh = pcb->cwnd / 2; + } + + /* The minimum value for ssthresh should be 2 MSS */ + if (pcb->ssthresh < 2*pcb->mss) { + LWIP_DEBUGF(TCP_FR_DEBUG, + ("tcp_receive: The minimum value for ssthresh %"U16_F + " should be min 2 mss %"U16_F"...\n", + pcb->ssthresh, 2*pcb->mss)); + pcb->ssthresh = 2*pcb->mss; + } + + pcb->cwnd = pcb->ssthresh + 3 * pcb->mss; + pcb->flags |= TF_INFR; + } +} + + +/** + * Send keepalive packets to keep a connection active although + * no data is sent over it. + * + * Called by tcp_slowtmr() + * + * @param pcb the tcp_pcb for which to send a keepalive packet + */ +void +tcp_keepalive(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: sending KEEPALIVE probe to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(&pcb->remote_ip), ip4_addr2_16(&pcb->remote_ip), + ip4_addr3_16(&pcb->remote_ip), ip4_addr4_16(&pcb->remote_ip))); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", + tcp_ticks, pcb->tmr, pcb->keep_cnt_sent)); + + p = tcp_output_alloc_header(pcb, 0, 0, htonl(pcb->snd_nxt - 1)); + if(p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_keepalive: could not allocate memory for pbuf\n")); + return; + } + tcphdr = (struct tcp_hdr *)p->payload; + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + + /* Send output to IP */ +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP, + &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + + pbuf_free(p); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F".\n", + pcb->snd_nxt - 1, pcb->rcv_nxt)); +} + + +/** + * Send persist timer zero-window probes to keep a connection active + * when a window update is lost. + * + * Called by tcp_slowtmr() + * + * @param pcb the tcp_pcb for which to send a zero-window probe packet + */ +void +tcp_zero_window_probe(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + struct tcp_seg *seg; + u16_t offset = 0; + u16_t len; + u8_t is_fin; + + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_zero_window_probe: sending ZERO WINDOW probe to %" + U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(&pcb->remote_ip), ip4_addr2_16(&pcb->remote_ip), + ip4_addr3_16(&pcb->remote_ip), ip4_addr4_16(&pcb->remote_ip))); + + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_zero_window_probe: tcp_ticks %"U32_F + " pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", + tcp_ticks, pcb->tmr, pcb->keep_cnt_sent)); + + seg = pcb->unacked; + + if(seg == NULL) { + seg = pcb->unsent; + } else { + struct ip_hdr *iphdr = NULL; + iphdr = (struct ip_hdr *)((char*)seg->p->payload + SIZEOF_ETH_HDR); + offset = IPH_HL(iphdr)*4; + offset += SIZEOF_ETH_HDR; + } + if(seg == NULL) { + return; + } + + is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0); + /* we want to send one seqno: either FIN or data (no options) */ + len = is_fin ? 0 : 1; + + p = tcp_output_alloc_header(pcb, 0, len, seg->tcphdr->seqno); + if(p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n")); + return; + } + tcphdr = (struct tcp_hdr *)p->payload; + + if (is_fin) { + /* FIN segment, no data */ + TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN); + } else { + /* Data segment, copy in one byte from the head of the unacked queue */ + struct tcp_hdr *thdr = (struct tcp_hdr *)seg->p->payload; + char *d = ((char *)p->payload + TCP_HLEN); + if (pcb->unacked == NULL) + pbuf_copy_partial(seg->p, d, 1, TCPH_HDRLEN(thdr) * 4); + else { + thdr = (struct tcp_hdr *)((char*)seg->p->payload + offset); + pbuf_copy_partial(seg->p, d, 1, TCPH_HDRLEN(thdr) * 4 + offset); + } + } + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + + /* Send output to IP */ +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP, + &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + + pbuf_free(p); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F + " ackno %"U32_F".\n", + pcb->snd_nxt - 1, pcb->rcv_nxt)); +} +#endif /* LWIP_TCP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/timers.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/timers.c new file mode 100755 index 0000000..e682bd2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/timers.c @@ -0,0 +1,513 @@ +/** + * @file + * Stack-internal timers implementation. + * This file includes timer callbacks for stack-internal timers as well as + * functions to set up or stop timers and check for expired timers. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * Simon Goldschmidt + * + */ + +#include "lwip/opt.h" + +#include "lwip/timers.h" +#include "lwip/tcp_impl.h" + +#if LWIP_TIMERS + +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/tcpip.h" + +#include "lwip/ip_frag.h" +#include "netif/etharp.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "lwip/igmp.h" +#include "lwip/dns.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/** The one and only timeout list */ +static struct sys_timeo *next_timeout = NULL; +#if NO_SYS +static u32_t timeouts_last_time; +#endif /* NO_SYS */ + +#if LWIP_TCP +/** global variable that shows if the tcp timer is currently scheduled or not */ +static int tcpip_tcp_timer_active; + +/** + * Timer callback function that calls tcp_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void ICACHE_FLASH_ATTR +tcpip_tcp_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + + /* call TCP timer handler */ + tcp_tmr(); + /* timer still needed? */ + if (tcp_active_pcbs || tcp_tw_pcbs) { + /* restart timer */ + sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); + } else { + /* disable timer */ + tcpip_tcp_timer_active = 0; + } +} + +/** + * Called from TCP_REG when registering a new PCB: + * the reason is to have the TCP timer only running when + * there are active (or time-wait) PCBs. + */ +void +tcp_timer_needed(void) +{ + /* timer is off but needed again? */ + if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) { + /* enable and start timer */ + tcpip_tcp_timer_active = 1; + sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); + } +} + +/** + * Timer callback function that calls tcp_tmr() and reschedules itself. + * + * @param arg unused argument + */ + +static void ICACHE_FLASH_ATTR +tcp_timer_coarse(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: tcp_tmr()\n")); + tcp_tmr(); + sys_timeout(TCP_TMR_INTERVAL, tcp_timer_coarse, NULL); +} + +#endif /* LWIP_TCP */ + +#if IP_REASSEMBLY +/** + * Timer callback function that calls ip_reass_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void ICACHE_FLASH_ATTR +ip_reass_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: ip_reass_tmr()\n")); + ip_reass_tmr(); + sys_timeout(IP_TMR_INTERVAL, ip_reass_timer, NULL); +} +#endif /* IP_REASSEMBLY */ + +#if LWIP_ARP +/** + * Timer callback function that calls etharp_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void ICACHE_FLASH_ATTR +arp_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: etharp_tmr()\n")); + etharp_tmr(); + sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); +} +#endif /* LWIP_ARP */ + +#if LWIP_DHCP +/** + * Timer callback function that calls dhcp_coarse_tmr() and reschedules itself. + * + * @param arg unused argument + */ +extern void dhcps_coarse_tmr(void); +static void +dhcp_timer_coarse(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: dhcp_coarse_tmr()\n")); + dhcp_coarse_tmr(); + dhcps_coarse_tmr(); + sys_timeout(DHCP_COARSE_TIMER_MSECS, dhcp_timer_coarse, NULL); +} + +/** + * Timer callback function that calls dhcp_fine_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +dhcp_timer_fine(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: dhcp_fine_tmr()\n")); + dhcp_fine_tmr(); + sys_timeout(DHCP_FINE_TIMER_MSECS, dhcp_timer_fine, NULL); +} +#endif /* LWIP_DHCP */ + +#if LWIP_AUTOIP +/** + * Timer callback function that calls autoip_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +autoip_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: autoip_tmr()\n")); + autoip_tmr(); + sys_timeout(AUTOIP_TMR_INTERVAL, autoip_timer, NULL); +} +#endif /* LWIP_AUTOIP */ + +#if LWIP_IGMP +/** + * Timer callback function that calls igmp_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +igmp_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: igmp_tmr()\n")); + igmp_tmr(); + sys_timeout(IGMP_TMR_INTERVAL, igmp_timer, NULL); +} +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +/** + * Timer callback function that calls dns_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +dns_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: dns_tmr()\n")); + dns_tmr(); + sys_timeout(DNS_TMR_INTERVAL, dns_timer, NULL); +} +#endif /* LWIP_DNS */ + +/** Initialize this module */ +void sys_timeouts_init(void) +{ +#if IP_REASSEMBLY + sys_timeout(IP_TMR_INTERVAL, ip_reass_timer, NULL); +#endif /* IP_REASSEMBLY */ +#if LWIP_ARP + sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); +#endif /* LWIP_ARP */ +#if LWIP_DHCP + DHCP_MAXRTX = 0; + sys_timeout(DHCP_COARSE_TIMER_MSECS, dhcp_timer_coarse, NULL); + sys_timeout(DHCP_FINE_TIMER_MSECS, dhcp_timer_fine, NULL); +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + sys_timeout(AUTOIP_TMR_INTERVAL, autoip_timer, NULL); +#endif /* LWIP_AUTOIP */ +#if LWIP_IGMP + sys_timeout(IGMP_TMR_INTERVAL, igmp_timer, NULL); +#endif /* LWIP_IGMP */ +#if LWIP_DNS + sys_timeout(DNS_TMR_INTERVAL, dns_timer, NULL); +#endif /* LWIP_DNS */ + +#if LWIP_TCP + sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); +// sys_timeout(TCP_TMR_INTERVAL, tcp_timer_coarse, NULL); +#endif + +#if NO_SYS + /* Initialise timestamp for sys_check_timeouts */ + timeouts_last_time = NOW(); +#endif +} + +/** + * Create a one-shot timer (aka timeout). Timeouts are processed in the + * following cases: + * - while waiting for a message using sys_timeouts_mbox_fetch() + * - by calling sys_check_timeouts() (NO_SYS==1 only) + * + * @param msecs time in milliseconds after that the timer should expire + * @param handler callback function to call when msecs have elapsed + * @param arg argument to pass to the callback function + */ +#if LWIP_DEBUG_TIMERNAMES +void +sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char* handler_name) +#else /* LWIP_DEBUG_TIMERNAMES */ +void +sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg) +#endif /* LWIP_DEBUG_TIMERNAMES */ +{ + struct sys_timeo *timeout, *t; + + timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT); + if (timeout == NULL) { + LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL); + return; + } + timeout->next = NULL; + timeout->h = handler; + timeout->arg = arg; + timeout->time = msecs; +#if LWIP_DEBUG_TIMERNAMES + timeout->handler_name = handler_name; + LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p msecs=%"U32_F" handler=%s arg=%p\n", + (void *)timeout, msecs, handler_name, (void *)arg)); +#endif /* LWIP_DEBUG_TIMERNAMES */ + + if (next_timeout == NULL) { + next_timeout = timeout; + return; + } + + if (next_timeout->time > msecs) { + next_timeout->time -= msecs; + timeout->next = next_timeout; + next_timeout = timeout; + } else { + for(t = next_timeout; t != NULL; t = t->next) { + timeout->time -= t->time; + if (t->next == NULL || t->next->time > timeout->time) { + if (t->next != NULL) { + t->next->time -= timeout->time; + } + timeout->next = t->next; + t->next = timeout; + break; + } + } + } +} + +/** + * Go through timeout list (for this task only) and remove the first matching + * entry, even though the timeout has not triggered yet. + * + * @note This function only works as expected if there is only one timeout + * calling 'handler' in the list of timeouts. + * + * @param handler callback function that would be called by the timeout + * @param arg callback argument that would be passed to handler +*/ +void +sys_untimeout(sys_timeout_handler handler, void *arg) +{ + struct sys_timeo *prev_t, *t; + + if (next_timeout == NULL) { + return; + } + + for (t = next_timeout, prev_t = NULL; t != NULL; prev_t = t, t = t->next) { + if ((t->h == handler) && (t->arg == arg)) { + /* We have a match */ + /* Unlink from previous in list */ + if (prev_t == NULL) { + next_timeout = t->next; + } else { + prev_t->next = t->next; + } + /* If not the last one, add time of this one back to next */ + if (t->next != NULL) { + t->next->time += t->time; + } + memp_free(MEMP_SYS_TIMEOUT, t); + return; + } + } + return; +} + +#if NO_SYS +extern uint8 timer2_ms_flag; +/** Handle timeouts for NO_SYS==1 (i.e. without using + * tcpip_thread/sys_timeouts_mbox_fetch(). Uses sys_now() to call timeout + * handler functions when timeouts expire. + * + * Must be called periodically from your main loop. + */ +void +sys_check_timeouts(void) +{ + struct sys_timeo *tmptimeout; + u32_t diff; + sys_timeout_handler handler; + void *arg; + int had_one; + u32_t now; + + now = NOW(); + if (next_timeout) { + /* this cares for wraparounds */ + if (timer2_ms_flag == 0) { + diff = LWIP_U32_DIFF(now, timeouts_last_time)/((APB_CLK_FREQ>>4)/1000); + } else { + diff = LWIP_U32_DIFF(now, timeouts_last_time)/((APB_CLK_FREQ>>8)/1000); + } + do + { + had_one = 0; + tmptimeout = next_timeout; + if (tmptimeout->time <= diff) { + /* timeout has expired */ + had_one = 1; + timeouts_last_time = now; + diff -= tmptimeout->time; + next_timeout = tmptimeout->next; + handler = tmptimeout->h; + arg = tmptimeout->arg; +#if LWIP_DEBUG_TIMERNAMES + if (handler != NULL) { + LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s arg=%p\n", + tmptimeout->handler_name, arg)); + } +#endif /* LWIP_DEBUG_TIMERNAMES */ + memp_free(MEMP_SYS_TIMEOUT, tmptimeout); + if (handler != NULL) { + handler(arg); + } + } + /* repeat until all expired timers have been called */ + }while(had_one); + } +} + +/** Set back the timestamp of the last call to sys_check_timeouts() + * This is necessary if sys_check_timeouts() hasn't been called for a long + * time (e.g. while saving energy) to prevent all timer functions of that + * period being called. + */ +void +sys_restart_timeouts(void) +{ + timeouts_last_time = NOW(); +} + +#else /* NO_SYS */ + +/** + * Wait (forever) for a message to arrive in an mbox. + * While waiting, timeouts are processed. + * + * @param mbox the mbox to fetch the message from + * @param msg the place to store the message + */ +void +sys_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg) +{ + u32_t time_needed; + struct sys_timeo *tmptimeout; + sys_timeout_handler handler; + void *arg; + + again: + if (!next_timeout) { + time_needed = sys_arch_mbox_fetch(mbox, msg, 0); + } else { + if (next_timeout->time > 0) { + time_needed = sys_arch_mbox_fetch(mbox, msg, next_timeout->time); + } else { + time_needed = SYS_ARCH_TIMEOUT; + } + + if (time_needed == SYS_ARCH_TIMEOUT) { + /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message + could be fetched. We should now call the timeout handler and + deallocate the memory allocated for the timeout. */ + tmptimeout = next_timeout; + next_timeout = tmptimeout->next; + handler = tmptimeout->h; + arg = tmptimeout->arg; +#if LWIP_DEBUG_TIMERNAMES + if (handler != NULL) { + LWIP_DEBUGF(TIMERS_DEBUG, ("stmf calling h=%s arg=%p\n", + tmptimeout->handler_name, arg)); + } +#endif /* LWIP_DEBUG_TIMERNAMES */ + memp_free(MEMP_SYS_TIMEOUT, tmptimeout); + if (handler != NULL) { + /* For LWIP_TCPIP_CORE_LOCKING, lock the core before calling the + timeout handler function. */ + LOCK_TCPIP_CORE(); + handler(arg); + UNLOCK_TCPIP_CORE(); + } + LWIP_TCPIP_THREAD_ALIVE(); + + /* We try again to fetch a message from the mbox. */ + goto again; + } else { + /* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout + occured. The time variable is set to the number of + milliseconds we waited for the message. */ + if (time_needed < next_timeout->time) { + next_timeout->time -= time_needed; + } else { + next_timeout->time = 0; + } + } + } +} + +#endif /* NO_SYS */ + +#else /* LWIP_TIMERS */ +/* Satisfy the TCP code which calls this function */ +void +tcp_timer_needed(void) +{ +} +#endif /* LWIP_TIMERS */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/core/udp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/udp.c new file mode 100755 index 0000000..db12c48 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/core/udp.c @@ -0,0 +1,977 @@ +/** + * @file + * User Datagram Protocol module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + +/* udp.c + * + * The code for the User Datagram Protocol UDP & UDPLite (RFC 3828). + * + */ + +/* @todo Check the use of '(struct udp_pcb).chksum_len_rx'! + */ + +#include "lwip/opt.h" + +#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/udp.h" +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/inet_chksum.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" +#include "lwip/dhcp.h" + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +/* The list of UDP PCBs */ +/* exported in udp.h (was static) */ +struct udp_pcb *udp_pcbs; + +/** + * Process an incoming UDP datagram. + * + * Given an incoming UDP datagram (as a chain of pbufs) this function + * finds a corresponding UDP PCB and hands over the pbuf to the pcbs + * recv function. If no pcb is found or the datagram is incorrect, the + * pbuf is freed. + * + * @param p pbuf to be demultiplexed to a UDP PCB. + * @param inp network interface on which the datagram was received. + * + */ +void ICACHE_FLASH_ATTR +udp_input(struct pbuf *p, struct netif *inp) +{ + struct udp_hdr *udphdr; + struct udp_pcb *pcb, *prev; + struct udp_pcb *uncon_pcb; + struct ip_hdr *iphdr; + u16_t src, dest; + u8_t local_match; + u8_t broadcast; + + PERF_START; + + UDP_STATS_INC(udp.recv); + + iphdr = (struct ip_hdr *)p->payload; + + /* Check minimum length (IP header + UDP header) + * and move payload pointer to UDP header */ + if (p->tot_len < (IPH_HL(iphdr) * 4 + UDP_HLEN) || pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4))) { + /* drop short packets */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len)); + UDP_STATS_INC(udp.lenerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + + udphdr = (struct udp_hdr *)p->payload; + + /* is broadcast packet ? */ + broadcast = ip_addr_isbroadcast(¤t_iphdr_dest, inp); + + LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len)); + + /* convert src and dest ports to host byte order */ + src = ntohs(udphdr->src); + dest = ntohs(udphdr->dest); + + udp_debug_print(udphdr); + + /* print the UDP source and destination */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") <-- " + "(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", + ip4_addr1_16(&iphdr->dest), ip4_addr2_16(&iphdr->dest), + ip4_addr3_16(&iphdr->dest), ip4_addr4_16(&iphdr->dest), ntohs(udphdr->dest), + ip4_addr1_16(&iphdr->src), ip4_addr2_16(&iphdr->src), + ip4_addr3_16(&iphdr->src), ip4_addr4_16(&iphdr->src), ntohs(udphdr->src))); + +#if LWIP_DHCP + pcb = NULL; + /* when LWIP_DHCP is active, packets to DHCP_CLIENT_PORT may only be processed by + the dhcp module, no other UDP pcb may use the local UDP port DHCP_CLIENT_PORT */ + if (dest == DHCP_CLIENT_PORT) { + /* all packets for DHCP_CLIENT_PORT not coming from DHCP_SERVER_PORT are dropped! */ + if (src == DHCP_SERVER_PORT) { + if ((inp->dhcp != NULL) && (inp->dhcp->pcb != NULL)) { + /* accept the packe if + (- broadcast or directed to us) -> DHCP is link-layer-addressed, local ip is always ANY! + - inp->dhcp->pcb->remote == ANY or iphdr->src */ + if ((ip_addr_isany(&inp->dhcp->pcb->remote_ip) || + ip_addr_cmp(&(inp->dhcp->pcb->remote_ip), ¤t_iphdr_src))) { + pcb = inp->dhcp->pcb; + } + } + } + } else if (dest == DHCP_SERVER_PORT) { + if (src == DHCP_CLIENT_PORT) { + if ( inp->dhcps_pcb != NULL ) { + if ((ip_addr_isany(&inp->dhcps_pcb->local_ip) || + ip_addr_cmp(&(inp->dhcps_pcb->local_ip), ¤t_iphdr_dest))) { + pcb = inp->dhcps_pcb; + } + } + } + } else +#endif /* LWIP_DHCP */ + { + prev = NULL; + local_match = 0; + uncon_pcb = NULL; + /* Iterate through the UDP pcb list for a matching pcb. + * 'Perfect match' pcbs (connected to the remote port & ip address) are + * preferred. If no perfect match is found, the first unconnected pcb that + * matches the local port and ip address gets the datagram. */ + for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { + local_match = 0; + /* print the PCB local and remote address */ + LWIP_DEBUGF(UDP_DEBUG, + ("pcb (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") --- " + "(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", + ip4_addr1_16(&pcb->local_ip), ip4_addr2_16(&pcb->local_ip), + ip4_addr3_16(&pcb->local_ip), ip4_addr4_16(&pcb->local_ip), pcb->local_port, + ip4_addr1_16(&pcb->remote_ip), ip4_addr2_16(&pcb->remote_ip), + ip4_addr3_16(&pcb->remote_ip), ip4_addr4_16(&pcb->remote_ip), pcb->remote_port)); + + /* compare PCB local addr+port to UDP destination addr+port */ + if ((pcb->local_port == dest) && + ((!broadcast && ip_addr_isany(&pcb->local_ip)) || + ip_addr_cmp(&(pcb->local_ip), ¤t_iphdr_dest) || +#if LWIP_IGMP + ip_addr_ismulticast(¤t_iphdr_dest) || +#endif /* LWIP_IGMP */ +#if IP_SOF_BROADCAST_RECV + (broadcast && (pcb->so_options & SOF_BROADCAST)))) { +#else /* IP_SOF_BROADCAST_RECV */ + (broadcast))) { +#endif /* IP_SOF_BROADCAST_RECV */ + local_match = 1; + if ((uncon_pcb == NULL) && + ((pcb->flags & UDP_FLAGS_CONNECTED) == 0)) { + /* the first unconnected matching PCB */ + uncon_pcb = pcb; + } + } + /* compare PCB remote addr+port to UDP source addr+port */ + if ((local_match != 0) && + (pcb->remote_port == src) && + (ip_addr_isany(&pcb->remote_ip) || + ip_addr_cmp(&(pcb->remote_ip), ¤t_iphdr_src))) { + /* the first fully matching PCB */ + if (prev != NULL) { + /* move the pcb to the front of udp_pcbs so that is + found faster next time */ + prev->next = pcb->next; + pcb->next = udp_pcbs; + udp_pcbs = pcb; + } else { + UDP_STATS_INC(udp.cachehit); + } + break; + } + prev = pcb; + } + /* no fully matching pcb found? then look for an unconnected pcb */ + if (pcb == NULL) { + pcb = uncon_pcb; + } + } + + /* Check checksum if this is a match or if it was directed at us. */ + if (pcb != NULL || ip_addr_cmp(&inp->ip_addr, ¤t_iphdr_dest)) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: calculating checksum\n")); +#if LWIP_UDPLITE + if (IPH_PROTO(iphdr) == IP_PROTO_UDPLITE) { + /* Do the UDP Lite checksum */ +#if CHECKSUM_CHECK_UDP + u16_t chklen = ntohs(udphdr->len); + if (chklen < sizeof(struct udp_hdr)) { + if (chklen == 0) { + /* For UDP-Lite, checksum length of 0 means checksum + over the complete packet (See RFC 3828 chap. 3.1) */ + chklen = p->tot_len; + } else { + /* At least the UDP-Lite header must be covered by the + checksum! (Again, see RFC 3828 chap. 3.1) */ + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + } + if (inet_chksum_pseudo_partial(p, ¤t_iphdr_src, ¤t_iphdr_dest, + IP_PROTO_UDPLITE, p->tot_len, chklen) != 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_input: UDP Lite datagram discarded due to failing checksum\n")); + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } +#endif /* CHECKSUM_CHECK_UDP */ + } else +#endif /* LWIP_UDPLITE */ + { +#if CHECKSUM_CHECK_UDP + if (udphdr->chksum != 0) { + if (inet_chksum_pseudo(p, ip_current_src_addr(), ip_current_dest_addr(), + IP_PROTO_UDP, p->tot_len) != 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_input: UDP datagram discarded due to failing checksum\n")); + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + } +#endif /* CHECKSUM_CHECK_UDP */ + } + if(pbuf_header(p, -UDP_HLEN)) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + if (pcb != NULL) { + snmp_inc_udpindatagrams(); +#if SO_REUSE && SO_REUSE_RXTOALL + if ((broadcast || ip_addr_ismulticast(¤t_iphdr_dest)) && + ((pcb->so_options & SOF_REUSEADDR) != 0)) { + /* pass broadcast- or multicast packets to all multicast pcbs + if SOF_REUSEADDR is set on the first match */ + struct udp_pcb *mpcb; + u8_t p_header_changed = 0; + for (mpcb = udp_pcbs; mpcb != NULL; mpcb = mpcb->next) { + if (mpcb != pcb) { + /* compare PCB local addr+port to UDP destination addr+port */ + if ((mpcb->local_port == dest) && + ((!broadcast && ip_addr_isany(&mpcb->local_ip)) || + ip_addr_cmp(&(mpcb->local_ip), ¤t_iphdr_dest) || +#if LWIP_IGMP + ip_addr_ismulticast(¤t_iphdr_dest) || +#endif /* LWIP_IGMP */ +#if IP_SOF_BROADCAST_RECV + (broadcast && (mpcb->so_options & SOF_BROADCAST)))) { +#else /* IP_SOF_BROADCAST_RECV */ + (broadcast))) { +#endif /* IP_SOF_BROADCAST_RECV */ + /* pass a copy of the packet to all local matches */ + if (mpcb->recv != NULL) { + struct pbuf *q; + /* for that, move payload to IP header again */ + if (p_header_changed == 0) { + pbuf_header(p, (s16_t)((IPH_HL(iphdr) * 4) + UDP_HLEN)); + p_header_changed = 1; + } + q = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if (q != NULL) { + err_t err = pbuf_copy(q, p); + if (err == ERR_OK) { + /* move payload to UDP data */ + pbuf_header(q, -(s16_t)((IPH_HL(iphdr) * 4) + UDP_HLEN)); + mpcb->recv(mpcb->recv_arg, mpcb, q, ip_current_src_addr(), src); + } + } + } + } + } + } + if (p_header_changed) { + /* and move payload to UDP data again */ + pbuf_header(p, -(s16_t)((IPH_HL(iphdr) * 4) + UDP_HLEN)); + } + } +#endif /* SO_REUSE && SO_REUSE_RXTOALL */ + /* callback */ + if (pcb->recv != NULL) { + /* now the recv function is responsible for freeing p */ + pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src); + } else { + /* no recv function registered? then we have to free the pbuf! */ + pbuf_free(p); + goto end; + } + } else { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: not for us.\n")); + +#if LWIP_ICMP + /* No match was found, send ICMP destination port unreachable unless + destination address was broadcast/multicast. */ + if (!broadcast && + !ip_addr_ismulticast(¤t_iphdr_dest)) { + /* move payload pointer back to ip header */ + pbuf_header(p, (IPH_HL(iphdr) * 4) + UDP_HLEN); + LWIP_ASSERT("p->payload == iphdr", (p->payload == iphdr)); + icmp_dest_unreach(p, ICMP_DUR_PORT); + } +#endif /* LWIP_ICMP */ + UDP_STATS_INC(udp.proterr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpnoports(); + pbuf_free(p); + } + } else { + pbuf_free(p); + } +end: + PERF_STOP("udp_input"); +} + +/** + * Send data using UDP. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * + * The datagram will be sent to the current remote_ip & remote_port + * stored in pcb. If the pcb is not bound to a port, it will + * automatically be bound to a random port. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_MEM. Out of memory. + * - ERR_RTE. Could not find route to destination address. + * - More errors could be returned by lower protocol layers. + * + * @see udp_disconnect() udp_sendto() + */ +err_t ICACHE_FLASH_ATTR +udp_send(struct udp_pcb *pcb, struct pbuf *p) +{ + /* send to the packet using remote ip and port stored in the pcb */ + return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port); +} + +#if LWIP_CHECKSUM_ON_COPY +/** Same as udp_send() but with checksum + */ +err_t ICACHE_FLASH_ATTR +udp_send_chksum(struct udp_pcb *pcb, struct pbuf *p, + u8_t have_chksum, u16_t chksum) +{ + /* send to the packet using remote ip and port stored in the pcb */ + return udp_sendto_chksum(pcb, p, &pcb->remote_ip, pcb->remote_port, + have_chksum, chksum); +} +#endif /* LWIP_CHECKSUM_ON_COPY */ + +/** + * Send data to a specified address using UDP. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * @param dst_ip Destination IP address. + * @param dst_port Destination UDP port. + * + * dst_ip & dst_port are expected to be in the same byte order as in the pcb. + * + * If the PCB already has a remote address association, it will + * be restored after the data is sent. + * + * @return lwIP error code (@see udp_send for possible error codes) + * + * @see udp_disconnect() udp_send() + */ +err_t ICACHE_FLASH_ATTR +udp_sendto(struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *dst_ip, u16_t dst_port) +{ +#if LWIP_CHECKSUM_ON_COPY + return udp_sendto_chksum(pcb, p, dst_ip, dst_port, 0, 0); +} + +/** Same as udp_sendto(), but with checksum */ +err_t ICACHE_FLASH_ATTR +udp_sendto_chksum(struct udp_pcb *pcb, struct pbuf *p, ip_addr_t *dst_ip, + u16_t dst_port, u8_t have_chksum, u16_t chksum) +{ +#endif /* LWIP_CHECKSUM_ON_COPY */ + struct netif *netif; + + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n")); + + /* find the outgoing network interface for this packet */ +#if LWIP_IGMP + netif = ip_route((ip_addr_ismulticast(dst_ip))?(&(pcb->multicast_ip)):(dst_ip)); +#else + netif = ip_route(dst_ip); +#endif /* LWIP_IGMP */ + + /* no outgoing network interface could be found? */ + if (netif == NULL) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(dst_ip), ip4_addr2_16(dst_ip), ip4_addr3_16(dst_ip), ip4_addr4_16(dst_ip))); + UDP_STATS_INC(udp.rterr); + return ERR_RTE; + } +#if LWIP_CHECKSUM_ON_COPY + return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum); +#else /* LWIP_CHECKSUM_ON_COPY */ + return udp_sendto_if(pcb, p, dst_ip, dst_port, netif); +#endif /* LWIP_CHECKSUM_ON_COPY */ +} + +/** + * Send data to a specified address using UDP. + * The netif used for sending can be specified. + * + * This function exists mainly for DHCP, to be able to send UDP packets + * on a netif that is still down. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * @param dst_ip Destination IP address. + * @param dst_port Destination UDP port. + * @param netif the netif used for sending. + * + * dst_ip & dst_port are expected to be in the same byte order as in the pcb. + * + * @return lwIP error code (@see udp_send for possible error codes) + * + * @see udp_disconnect() udp_send() + */ +err_t ICACHE_FLASH_ATTR +udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p, + ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif) +{ +#if LWIP_CHECKSUM_ON_COPY + return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, 0, 0); +} + +/** Same as udp_sendto_if(), but with checksum */ +err_t ICACHE_FLASH_ATTR +udp_sendto_if_chksum(struct udp_pcb *pcb, struct pbuf *p, ip_addr_t *dst_ip, + u16_t dst_port, struct netif *netif, u8_t have_chksum, + u16_t chksum) +{ +#endif /* LWIP_CHECKSUM_ON_COPY */ + struct udp_hdr *udphdr; + ip_addr_t *src_ip; + err_t err; + struct pbuf *q; /* q will be sent down the stack */ + +#if IP_SOF_BROADCAST + /* broadcast filter? */ + if ( ((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(dst_ip, netif) ) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_sendto_if: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb)); + return ERR_VAL; + } +#endif /* IP_SOF_BROADCAST */ + + /* if the PCB is not yet bound to a port, bind it here */ + if (pcb->local_port == 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n")); + err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); + if (err != ERR_OK) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n")); + return err; + } + } + + /* not enough space to add an UDP header to first pbuf in given p chain? */ + if (pbuf_header(p, UDP_HLEN)) { + /* allocate header in a separate new pbuf */ + q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM); + /* new header pbuf could not be allocated? */ + if (q == NULL) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n")); + return ERR_MEM; + } + if (p->tot_len != 0) { + /* chain header q in front of given pbuf p (only if p contains data) */ + pbuf_chain(q, p); + } + /* first pbuf q points to header pbuf */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); + } else { + /* adding space for header within p succeeded */ + /* first pbuf q equals given pbuf */ + q = p; + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p)); + } + LWIP_ASSERT("check that first pbuf can hold struct udp_hdr", + (q->len >= sizeof(struct udp_hdr))); + /* q now represents the packet to be sent */ + udphdr = (struct udp_hdr *)q->payload; + udphdr->src = htons(pcb->local_port); + udphdr->dest = htons(dst_port); + /* in UDP, 0 checksum means 'no checksum' */ + udphdr->chksum = 0x0000; + + /* Multicast Loop? */ +#if LWIP_IGMP + if (ip_addr_ismulticast(dst_ip) && ((pcb->flags & UDP_FLAGS_MULTICAST_LOOP) != 0)) { + q->flags |= PBUF_FLAG_MCASTLOOP; + } +#endif /* LWIP_IGMP */ + + + /* PCB local address is IP_ANY_ADDR? */ + if (ip_addr_isany(&pcb->local_ip)) { + /* use outgoing network interface IP address as source address */ + src_ip = &(netif->ip_addr); + } else { + /* check if UDP PCB local IP address is correct + * this could be an old address if netif->ip_addr has changed */ + if (!ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) { + /* local_ip doesn't match, drop the packet */ + if (q != p) { + /* free the header pbuf */ + pbuf_free(q); + q = NULL; + /* p is still referenced by the caller, and will live on */ + } + return ERR_VAL; + } + /* use UDP PCB local IP address as source address */ + src_ip = &(pcb->local_ip); + } + + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: sending datagram of length %"U16_F"\n", q->tot_len)); + +#if LWIP_UDPLITE + /* UDP Lite protocol? */ + if (pcb->flags & UDP_FLAGS_UDPLITE) { + u16_t chklen, chklen_hdr; + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE packet length %"U16_F"\n", q->tot_len)); + /* set UDP message length in UDP header */ + chklen_hdr = chklen = pcb->chksum_len_tx; + if ((chklen < sizeof(struct udp_hdr)) || (chklen > q->tot_len)) { + if (chklen != 0) { + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE pcb->chksum_len is illegal: %"U16_F"\n", chklen)); + } + /* For UDP-Lite, checksum length of 0 means checksum + over the complete packet. (See RFC 3828 chap. 3.1) + At least the UDP-Lite header must be covered by the + checksum, therefore, if chksum_len has an illegal + value, we generate the checksum over the complete + packet to be safe. */ + chklen_hdr = 0; + chklen = q->tot_len; + } + udphdr->len = htons(chklen_hdr); + /* calculate checksum */ +#if CHECKSUM_GEN_UDP + udphdr->chksum = inet_chksum_pseudo_partial(q, src_ip, dst_ip, + IP_PROTO_UDPLITE, q->tot_len, +#if !LWIP_CHECKSUM_ON_COPY + chklen); +#else /* !LWIP_CHECKSUM_ON_COPY */ + (have_chksum ? UDP_HLEN : chklen)); + if (have_chksum) { + u32_t acc; + acc = udphdr->chksum + (u16_t)~(chksum); + udphdr->chksum = FOLD_U32T(acc); + } +#endif /* !LWIP_CHECKSUM_ON_COPY */ + + /* chksum zero must become 0xffff, as zero means 'no checksum' */ + if (udphdr->chksum == 0x0000) { + udphdr->chksum = 0xffff; + } +#endif /* CHECKSUM_GEN_UDP */ + /* output to IP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDPLITE,)\n")); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDPLITE, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + } else +#endif /* LWIP_UDPLITE */ + { /* UDP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len)); + udphdr->len = htons(q->tot_len); + /* calculate checksum */ +#if CHECKSUM_GEN_UDP + if ((pcb->flags & UDP_FLAGS_NOCHKSUM) == 0) { + u16_t udpchksum; +#if LWIP_CHECKSUM_ON_COPY + if (have_chksum) { + u32_t acc; + udpchksum = inet_chksum_pseudo_partial(q, src_ip, dst_ip, IP_PROTO_UDP, + q->tot_len, UDP_HLEN); + acc = udpchksum + (u16_t)~(chksum); + udpchksum = FOLD_U32T(acc); + } else +#endif /* LWIP_CHECKSUM_ON_COPY */ + { + udpchksum = inet_chksum_pseudo(q, src_ip, dst_ip, IP_PROTO_UDP, q->tot_len); + } + + /* chksum zero must become 0xffff, as zero means 'no checksum' */ + if (udpchksum == 0x0000) { + udpchksum = 0xffff; + } + udphdr->chksum = udpchksum; + } +#endif /* CHECKSUM_GEN_UDP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum)); + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDP,)\n")); + /* output to IP */ +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDP, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + } + /* TODO: must this be increased even if error occured? */ + snmp_inc_udpoutdatagrams(); + + /* did we chain a separate header pbuf earlier? */ + if (q != p) { + /* free the header pbuf */ + pbuf_free(q); + q = NULL; + /* p is still referenced by the caller, and will live on */ + } + + UDP_STATS_INC(udp.xmit); + return err; +} + +/** + * Bind an UDP PCB. + * + * @param pcb UDP PCB to be bound with a local address ipaddr and port. + * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to + * bind to all local interfaces. + * @param port local UDP port to bind with. Use 0 to automatically bind + * to a random port between UDP_LOCAL_PORT_RANGE_START and + * UDP_LOCAL_PORT_RANGE_END. + * + * ipaddr & port are expected to be in the same byte order as in the pcb. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_USE. The specified ipaddr and port are already bound to by + * another UDP PCB. + * + * @see udp_disconnect() + */ +err_t ICACHE_FLASH_ATTR +udp_bind(struct udp_pcb *pcb, ip_addr_t *ipaddr, u16_t port) +{ + struct udp_pcb *ipcb; + u8_t rebind; + + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = ")); + ip_addr_debug_print(UDP_DEBUG, ipaddr); + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port)); + + rebind = 0; + /* Check for double bind and rebind of the same pcb */ + for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { + /* is this UDP PCB already on active list? */ + if (pcb == ipcb) { + /* pcb may occur at most once in active list */ + LWIP_ASSERT("rebind == 0", rebind == 0); + /* pcb already in list, just rebind */ + rebind = 1; + } + + /* By default, we don't allow to bind to a port that any other udp + PCB is alread bound to, unless *all* PCBs with that port have tha + REUSEADDR flag set. */ +#if SO_REUSE + else if (((pcb->so_options & SOF_REUSEADDR) == 0) && + ((ipcb->so_options & SOF_REUSEADDR) == 0)) { +#else /* SO_REUSE */ + /* port matches that of PCB in list and REUSEADDR not set -> reject */ + else { +#endif /* SO_REUSE */ + if ((ipcb->local_port == port) && + /* IP address matches, or one is IP_ADDR_ANY? */ + (ip_addr_isany(&(ipcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(ipcb->local_ip), ipaddr))) { + /* other PCB already binds to this local IP and port */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_bind: local port %"U16_F" already bound by another pcb\n", port)); + return ERR_USE; + } + } + } + + ip_addr_set(&pcb->local_ip, ipaddr); + + /* no port specified? */ + if (port == 0) { +#ifndef UDP_LOCAL_PORT_RANGE_START +#define UDP_LOCAL_PORT_RANGE_START 4096 +#define UDP_LOCAL_PORT_RANGE_END 0x7fff +#endif + port = UDP_LOCAL_PORT_RANGE_START; + ipcb = udp_pcbs; + while ((ipcb != NULL) && (port != UDP_LOCAL_PORT_RANGE_END)) { + if (ipcb->local_port == port) { + /* port is already used by another udp_pcb */ + port++; + /* restart scanning all udp pcbs */ + ipcb = udp_pcbs; + } else { + /* go on with next udp pcb */ + ipcb = ipcb->next; + } + } + if (ipcb != NULL) { + /* no more ports available in local range */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n")); + return ERR_USE; + } + } + pcb->local_port = port; + snmp_insert_udpidx_tree(pcb); + /* pcb not active yet? */ + if (rebind == 0) { + /* place the PCB on the active list if not already there */ + pcb->next = udp_pcbs; + udp_pcbs = pcb; + } + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("udp_bind: bound to %"U16_F".%"U16_F".%"U16_F".%"U16_F", port %"U16_F"\n", + ip4_addr1_16(&pcb->local_ip), ip4_addr2_16(&pcb->local_ip), + ip4_addr3_16(&pcb->local_ip), ip4_addr4_16(&pcb->local_ip), + pcb->local_port)); + return ERR_OK; +} +/** + * Connect an UDP PCB. + * + * This will associate the UDP PCB with the remote address. + * + * @param pcb UDP PCB to be connected with remote address ipaddr and port. + * @param ipaddr remote IP address to connect with. + * @param port remote UDP port to connect with. + * + * @return lwIP error code + * + * ipaddr & port are expected to be in the same byte order as in the pcb. + * + * The udp pcb is bound to a random local port if not already bound. + * + * @see udp_disconnect() + */ +err_t ICACHE_FLASH_ATTR +udp_connect(struct udp_pcb *pcb, ip_addr_t *ipaddr, u16_t port) +{ + struct udp_pcb *ipcb; + + if (pcb->local_port == 0) { + err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); + if (err != ERR_OK) { + return err; + } + } + + ip_addr_set(&pcb->remote_ip, ipaddr); + pcb->remote_port = port; + pcb->flags |= UDP_FLAGS_CONNECTED; +/** TODO: this functionality belongs in upper layers */ +#ifdef LWIP_UDP_TODO + /* Nail down local IP for netconn_addr()/getsockname() */ + if (ip_addr_isany(&pcb->local_ip) && !ip_addr_isany(&pcb->remote_ip)) { + struct netif *netif; + + if ((netif = ip_route(&(pcb->remote_ip))) == NULL) { + LWIP_DEBUGF(UDP_DEBUG, ("udp_connect: No route to 0x%lx\n", pcb->remote_ip.addr)); + UDP_STATS_INC(udp.rterr); + return ERR_RTE; + } + /** TODO: this will bind the udp pcb locally, to the interface which + is used to route output packets to the remote address. However, we + might want to accept incoming packets on any interface! */ + pcb->local_ip = netif->ip_addr; + } else if (ip_addr_isany(&pcb->remote_ip)) { + pcb->local_ip.addr = 0; + } +#endif + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("udp_connect: connected to %"U16_F".%"U16_F".%"U16_F".%"U16_F",port %"U16_F"\n", + ip4_addr1_16(&pcb->local_ip), ip4_addr2_16(&pcb->local_ip), + ip4_addr3_16(&pcb->local_ip), ip4_addr4_16(&pcb->local_ip), + pcb->local_port)); + + /* Insert UDP PCB into the list of active UDP PCBs. */ + for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { + if (pcb == ipcb) { + /* already on the list, just return */ + return ERR_OK; + } + } + /* PCB not yet on the list, add PCB now */ + pcb->next = udp_pcbs; + udp_pcbs = pcb; + return ERR_OK; +} + +/** + * Disconnect a UDP PCB + * + * @param pcb the udp pcb to disconnect. + */ +void ICACHE_FLASH_ATTR +udp_disconnect(struct udp_pcb *pcb) +{ + /* reset remote address association */ + ip_addr_set_any(&pcb->remote_ip); + pcb->remote_port = 0; + /* mark PCB as unconnected */ + pcb->flags &= ~UDP_FLAGS_CONNECTED; +} + +/** + * Set a receive callback for a UDP PCB + * + * This callback will be called when receiving a datagram for the pcb. + * + * @param pcb the pcb for wich to set the recv callback + * @param recv function pointer of the callback function + * @param recv_arg additional argument to pass to the callback function + */ +void ICACHE_FLASH_ATTR +udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg) +{ + /* remember recv() callback and user data */ + pcb->recv = recv; + pcb->recv_arg = recv_arg; +} + +/** + * Remove an UDP PCB. + * + * @param pcb UDP PCB to be removed. The PCB is removed from the list of + * UDP PCB's and the data structure is freed from memory. + * + * @see udp_new() + */ +void ICACHE_FLASH_ATTR +udp_remove(struct udp_pcb *pcb) +{ + struct udp_pcb *pcb2; + + snmp_delete_udpidx_tree(pcb); + /* pcb to be removed is first in list? */ + if (udp_pcbs == pcb) { + /* make list start at 2nd pcb */ + udp_pcbs = udp_pcbs->next; + /* pcb not 1st in list */ + } else { + for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { + /* find pcb in udp_pcbs list */ + if (pcb2->next != NULL && pcb2->next == pcb) { + /* remove pcb from list */ + pcb2->next = pcb->next; + } + } + } + memp_free(MEMP_UDP_PCB, pcb); +} + +/** + * Create a UDP PCB. + * + * @return The UDP PCB which was created. NULL if the PCB data structure + * could not be allocated. + * + * @see udp_remove() + */ +struct udp_pcb * ICACHE_FLASH_ATTR +udp_new(void) +{ + struct udp_pcb *pcb; + pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB); + /* could allocate UDP PCB? */ + if (pcb != NULL) { + /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0 + * which means checksum is generated over the whole datagram per default + * (recommended as default by RFC 3828). */ + /* initialize PCB to all zeroes */ + os_memset(pcb, 0, sizeof(struct udp_pcb)); + pcb->ttl = UDP_TTL; + } + return pcb; +} + +#if UDP_DEBUG +/** + * Print UDP header information for debug purposes. + * + * @param udphdr pointer to the udp header in memory. + */ +void ICACHE_FLASH_ATTR +udp_debug_print(struct udp_hdr *udphdr) +{ + LWIP_DEBUGF(UDP_DEBUG, ("UDP header:\n")); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", + ntohs(udphdr->src), ntohs(udphdr->dest))); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | 0x%04"X16_F" | (len, chksum)\n", + ntohs(udphdr->len), ntohs(udphdr->chksum))); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); +} +#endif /* UDP_DEBUG */ + +#endif /* LWIP_UDP */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/netif/Makefile b/examples/ESP8266_NONOS_SDK/third_party/lwip/netif/Makefile new file mode 100755 index 0000000..f03613f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/netif/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = liblwipnetif.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/lwip/netif/etharp.c b/examples/ESP8266_NONOS_SDK/third_party/lwip/netif/etharp.c new file mode 100755 index 0000000..7eb328a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/lwip/netif/etharp.c @@ -0,0 +1,1413 @@ +/** + * @file + * Address Resolution Protocol module for IP over Ethernet + * + * Functionally, ARP is divided into two parts. The first maps an IP address + * to a physical address when sending a packet, and the second part answers + * requests from other machines for our physical address. + * + * This implementation complies with RFC 826 (Ethernet ARP). It supports + * Gratuitious ARP from RFC3220 (IP Mobility Support for IPv4) section 4.6 + * if an interface calls etharp_gratuitous(our_netif) upon address change. + */ + +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * Copyright (c) 2003-2004 Leon Woestenberg + * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#include "lwip/opt.h" + +#if LWIP_ARP || LWIP_ETHERNET + +#include "lwip/ip_addr.h" +#include "lwip/def.h" +#include "lwip/ip.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "netif/etharp.h" + +#if PPPOE_SUPPORT +#include "netif/ppp_oe.h" +#endif /* PPPOE_SUPPORT */ + +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}}; +const struct eth_addr ethzero = {{0,0,0,0,0,0}}; + +#if LWIP_ARP /* don't build if not configured for use in lwipopts.h */ + +/** the time an ARP entry stays valid after its last update, + * for ARP_TMR_INTERVAL = 5000, this is + * (240 * 5) seconds = 20 minutes. + */ +#define ARP_MAXAGE 240 +/** Re-request a used ARP entry 1 minute before it would expire to prevent + * breaking a steadily used connection because the ARP entry timed out. */ +#define ARP_AGE_REREQUEST_USED (ARP_MAXAGE - 12) +/** the time an ARP entry stays pending after first request, + * for ARP_TMR_INTERVAL = 5000, this is + * (2 * 5) seconds = 10 seconds. + * + * @internal Keep this number at least 2, otherwise it might + * run out instantly if the timeout occurs directly after a request. + */ +#define ARP_MAXPENDING 2 + +#define HWTYPE_ETHERNET 1 + +enum etharp_state { + ETHARP_STATE_EMPTY = 0, + ETHARP_STATE_PENDING, + ETHARP_STATE_STABLE, + ETHARP_STATE_STABLE_REREQUESTING +}; + +struct etharp_entry { +#if ARP_QUEUEING + /** Pointer to queue of pending outgoing packets on this ARP entry. */ + struct etharp_q_entry *q; +#else /* ARP_QUEUEING */ + /** Pointer to a single pending outgoing packet on this ARP entry. */ + struct pbuf *q; +#endif /* ARP_QUEUEING */ + ip_addr_t ipaddr; + struct eth_addr ethaddr; +#if LWIP_SNMP || LWIP_ARP + struct netif *netif; +#endif /* LWIP_SNMP */ + u8_t state; + u8_t ctime; +#if ETHARP_SUPPORT_STATIC_ENTRIES + u8_t static_entry; +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ +}; + +static struct etharp_entry arp_table[ARP_TABLE_SIZE]; + +#if !LWIP_NETIF_HWADDRHINT +static u8_t etharp_cached_entry; +#endif /* !LWIP_NETIF_HWADDRHINT */ + +/** Try hard to create a new entry - we want the IP address to appear in + the cache (even if this means removing an active entry or so). */ +#define ETHARP_FLAG_TRY_HARD 1 +#define ETHARP_FLAG_FIND_ONLY 2 +#define ETHARP_FLAG_STATIC_ENTRY 4 + +#if LWIP_NETIF_HWADDRHINT +#define ETHARP_SET_HINT(netif, hint) if (((netif) != NULL) && ((netif)->addr_hint != NULL)) \ + *((netif)->addr_hint) = (hint); +#else /* LWIP_NETIF_HWADDRHINT */ +#define ETHARP_SET_HINT(netif, hint) (etharp_cached_entry = (hint)) +#endif /* LWIP_NETIF_HWADDRHINT */ + +static err_t update_arp_entry(struct netif *netif, ip_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags); + + +/* Some checks, instead of etharp_init(): */ +#if (LWIP_ARP && (ARP_TABLE_SIZE > 0x7f)) + #error "ARP_TABLE_SIZE must fit in an s8_t, you have to reduce it in your lwipopts.h" +#endif + + +#if ARP_QUEUEING +/** + * Free a complete queue of etharp entries + * + * @param q a qeueue of etharp_q_entry's to free + */ +static void +free_etharp_q(struct etharp_q_entry *q) +{ + struct etharp_q_entry *r; + LWIP_ASSERT("q != NULL", q != NULL); + LWIP_ASSERT("q->p != NULL", q->p != NULL); + while (q) { + r = q; + q = q->next; + LWIP_ASSERT("r->p != NULL", (r->p != NULL)); + pbuf_free(r->p); + memp_free(MEMP_ARP_QUEUE, r); + } +} +#else /* ARP_QUEUEING */ + +/** Compatibility define: free the queued pbuf */ +#define free_etharp_q(q) pbuf_free(q) + +#endif /* ARP_QUEUEING */ + +/** Clean up ARP table entries */ +static void ICACHE_FLASH_ATTR +free_entry(int i) +{ + /* remove from SNMP ARP index tree */ + snmp_delete_arpidx_tree(arp_table[i].netif, &arp_table[i].ipaddr); + /* and empty packet queue */ + if (arp_table[i].q != NULL) { + /* remove all queued packets */ + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q))); + free_etharp_q(arp_table[i].q); + arp_table[i].q = NULL; + } + /* recycle entry for re-use */ + arp_table[i].state = ETHARP_STATE_EMPTY; +#if ETHARP_SUPPORT_STATIC_ENTRIES + arp_table[i].static_entry = 0; +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ +#ifdef LWIP_DEBUG + /* for debugging, clean out the complete entry */ + arp_table[i].ctime = 0; +#if LWIP_SNMP + arp_table[i].netif = NULL; +#endif /* LWIP_SNMP */ + ip_addr_set_zero(&arp_table[i].ipaddr); + arp_table[i].ethaddr = ethzero; +#endif /* LWIP_DEBUG */ +} + +/** + * Clears expired entries in the ARP table. + * + * This function should be called every ETHARP_TMR_INTERVAL milliseconds (5 seconds), + * in order to expire entries in the ARP table. + */ +void +etharp_tmr(void) +{ + u8_t i; + + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n")); + /* remove expired entries from the ARP table */ + for (i = 0; i < ARP_TABLE_SIZE; ++i) { + u8_t state = arp_table[i].state; + if (state != ETHARP_STATE_EMPTY +#if ETHARP_SUPPORT_STATIC_ENTRIES + && (arp_table[i].static_entry == 0) +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ + ) { + arp_table[i].ctime++; + if ((arp_table[i].ctime >= ARP_MAXAGE) || + ((arp_table[i].state == ETHARP_STATE_PENDING) && + (arp_table[i].ctime >= ARP_MAXPENDING))) { + /* pending or stable entry has become old! */ + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %"U16_F".\n", + arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", (u16_t)i)); + /* clean up entries that have just been expired */ + free_entry(i); + } + else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING) { + /* Reset state to stable, so that the next transmitted packet will + re-send an ARP request. */ + arp_table[i].state = ETHARP_STATE_STABLE; + } +#if ARP_QUEUEING + /* still pending entry? (not expired) */ + if (arp_table[i].state == ETHARP_STATE_PENDING) { + /* resend an ARP query here? */ + } +#endif /* ARP_QUEUEING */ + } + } +} + +/** + * Search the ARP table for a matching or new entry. + * + * If an IP address is given, return a pending or stable ARP entry that matches + * the address. If no match is found, create a new entry with this address set, + * but in state ETHARP_EMPTY. The caller must check and possibly change the + * state of the returned entry. + * + * If ipaddr is NULL, return a initialized new entry in state ETHARP_EMPTY. + * + * In all cases, attempt to create new entries from an empty entry. If no + * empty entries are available and ETHARP_FLAG_TRY_HARD flag is set, recycle + * old entries. Heuristic choose the least important entry for recycling. + * + * @param ipaddr IP address to find in ARP cache, or to add if not found. + * @param flags @see definition of ETHARP_FLAG_* + * @param netif netif related to this address (used for NETIF_HWADDRHINT) + * + * @return The ARP entry index that matched or is created, ERR_MEM if no + * entry is found or could be recycled. + */ +static s8_t ICACHE_FLASH_ATTR +find_entry(ip_addr_t *ipaddr, u8_t flags) +{ + s8_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE; + s8_t empty = ARP_TABLE_SIZE; + u8_t i = 0, age_pending = 0, age_stable = 0; + /* oldest entry with packets on queue */ + s8_t old_queue = ARP_TABLE_SIZE; + /* its age */ + u8_t age_queue = 0; + + /** + * a) do a search through the cache, remember candidates + * b) select candidate entry + * c) create new entry + */ + + /* a) in a single search sweep, do all of this + * 1) remember the first empty entry (if any) + * 2) remember the oldest stable entry (if any) + * 3) remember the oldest pending entry without queued packets (if any) + * 4) remember the oldest pending entry with queued packets (if any) + * 5) search for a matching IP entry, either pending or stable + * until 5 matches, or all entries are searched for. + */ + + for (i = 0; i < ARP_TABLE_SIZE; ++i) { + u8_t state = arp_table[i].state; + /* no empty entry found yet and now we do find one? */ + if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) { + LWIP_DEBUGF(ETHARP_DEBUG, ("find_entry: found empty entry %"U16_F"\n", (u16_t)i)); + /* remember first empty entry */ + empty = i; + } else if (state != ETHARP_STATE_EMPTY) { + LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE", + state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE); + /* if given, does IP address match IP address in ARP entry? */ + if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: found matching entry %"U16_F"\n", (u16_t)i)); + /* found exact IP address match, simply bail out */ + return i; + } + /* pending entry? */ + if (state == ETHARP_STATE_PENDING) { + /* pending with queued packets? */ + if (arp_table[i].q != NULL) { + if (arp_table[i].ctime >= age_queue) { + old_queue = i; + age_queue = arp_table[i].ctime; + } + } else + /* pending without queued packets? */ + { + if (arp_table[i].ctime >= age_pending) { + old_pending = i; + age_pending = arp_table[i].ctime; + } + } + /* stable entry? */ + } else if (state >= ETHARP_STATE_STABLE) { +#if ETHARP_SUPPORT_STATIC_ENTRIES + /* don't record old_stable for static entries since they never expire */ + if (arp_table[i].static_entry == 0) +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ + { + /* remember entry with oldest stable entry in oldest, its age in maxtime */ + if (arp_table[i].ctime >= age_stable) { + old_stable = i; + age_stable = arp_table[i].ctime; + } + } + } + } + } + /* { we have no match } => try to create a new entry */ + + /* don't create new entry, only search? */ + if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) || + /* or no empty entry found and not allowed to recycle? */ + ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: no empty entry found and not allowed to recycle\n")); + return (s8_t)ERR_MEM; + } + + /* b) choose the least destructive entry to recycle: + * 1) empty entry + * 2) oldest stable entry + * 3) oldest pending entry without queued packets + * 4) oldest pending entry with queued packets + * + * { ETHARP_FLAG_TRY_HARD is set at this point } + */ + + /* 1) empty entry available? */ + if (empty < ARP_TABLE_SIZE) { + i = empty; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting empty entry %"U16_F"\n", (u16_t)i)); + } else { + /* 2) found recyclable stable entry? */ + if (old_stable < ARP_TABLE_SIZE) { + /* recycle oldest stable*/ + i = old_stable; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest stable entry %"U16_F"\n", (u16_t)i)); + /* no queued packets should exist on stable entries */ + LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL); + /* 3) found recyclable pending entry without queued packets? */ + } else if (old_pending < ARP_TABLE_SIZE) { + /* recycle oldest pending */ + i = old_pending; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F" (without queue)\n", (u16_t)i)); + /* 4) found recyclable pending entry with queued packets? */ + } else if (old_queue < ARP_TABLE_SIZE) { + /* recycle oldest pending (queued packets are free in free_entry) */ + i = old_queue; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F", freeing packet queue %p\n", (u16_t)i, (void *)(arp_table[i].q))); + /* no empty or recyclable entries found */ + } else { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: no empty or recyclable entries found\n")); + return (s8_t)ERR_MEM; + } + + /* { empty or recyclable entry found } */ + LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); + free_entry(i); + } + + LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); + LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY", + arp_table[i].state == ETHARP_STATE_EMPTY); + + /* IP address given? */ + if (ipaddr != NULL) { + /* set IP address */ + ip_addr_copy(arp_table[i].ipaddr, *ipaddr); + } + arp_table[i].ctime = 0; +#if ETHARP_SUPPORT_STATIC_ENTRIES + arp_table[i].static_entry = 0; +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ + return (err_t)i; +} + +/** + * Send an IP packet on the network using netif->linkoutput + * The ethernet header is filled in before sending. + * + * @params netif the lwIP network interface on which to send the packet + * @params p the packet to send, p->payload pointing to the (uninitialized) ethernet header + * @params src the source MAC address to be copied into the ethernet header + * @params dst the destination MAC address to be copied into the ethernet header + * @return ERR_OK if the packet was sent, any other err_t on failure + */ +static err_t ICACHE_FLASH_ATTR +etharp_send_ip(struct netif *netif, struct pbuf *p, struct eth_addr *src, struct eth_addr *dst) +{ + struct eth_hdr *ethhdr = (struct eth_hdr *)p->payload; + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); + ETHADDR32_COPY(ðhdr->dest, dst); + ETHADDR16_COPY(ðhdr->src, src); + ethhdr->type = PP_HTONS(ETHTYPE_IP); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_send_ip: sending packet %p\n", (void *)p)); + /* send the packet */ + return netif->linkoutput(netif, p); +} + +/** + * Update (or insert) a IP/MAC address pair in the ARP cache. + * + * If a pending entry is resolved, any queued packets will be sent + * at this point. + * + * @param netif netif related to this entry (used for NETIF_ADDRHINT) + * @param ipaddr IP address of the inserted ARP entry. + * @param ethaddr Ethernet address of the inserted ARP entry. + * @param flags @see definition of ETHARP_FLAG_* + * + * @return + * - ERR_OK Succesfully updated ARP cache. + * - ERR_MEM If we could not add a new ARP entry when ETHARP_FLAG_TRY_HARD was set. + * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. + * + * @see pbuf_free() + */ +static err_t ICACHE_FLASH_ATTR +update_arp_entry(struct netif *netif, ip_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags) +{ + s8_t i; + LWIP_ASSERT("netif->hwaddr_len == ETHARP_HWADDR_LEN", netif->hwaddr_len == ETHARP_HWADDR_LEN); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", + ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr), + ethaddr->addr[0], ethaddr->addr[1], ethaddr->addr[2], + ethaddr->addr[3], ethaddr->addr[4], ethaddr->addr[5])); + /* non-unicast address? */ + if (ip_addr_isany(ipaddr) || + ip_addr_isbroadcast(ipaddr, netif) || + ip_addr_ismulticast(ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: will not add non-unicast IP address to ARP cache\n")); + return ERR_ARG; + } + /* find or create ARP entry */ + i = find_entry(ipaddr, flags); + /* bail out if no entry could be found */ + if (i < 0) { + return (err_t)i; + } + +#if ETHARP_SUPPORT_STATIC_ENTRIES + if (flags & ETHARP_FLAG_STATIC_ENTRY) { + /* record static type */ + arp_table[i].static_entry = 1; + } +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ + + /* mark it stable */ + arp_table[i].state = ETHARP_STATE_STABLE; + +#if LWIP_SNMP + /* record network interface */ + arp_table[i].netif = netif; +#endif /* LWIP_SNMP */ + /* insert in SNMP ARP index tree */ + snmp_insert_arpidx_tree(netif, &arp_table[i].ipaddr); + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: updating stable entry %"S16_F"\n", (s16_t)i)); + /* update address */ + ETHADDR32_COPY(&arp_table[i].ethaddr, ethaddr); + /* reset time stamp */ + arp_table[i].ctime = 0; + /* this is where we will send out queued packets! */ +#if ARP_QUEUEING + while (arp_table[i].q != NULL) { + struct pbuf *p; + /* remember remainder of queue */ + struct etharp_q_entry *q = arp_table[i].q; + /* pop first item off the queue */ + arp_table[i].q = q->next; + /* get the packet pointer */ + p = q->p; + /* now queue entry can be freed */ + memp_free(MEMP_ARP_QUEUE, q); +#else /* ARP_QUEUEING */ + if (arp_table[i].q != NULL) { + struct pbuf *p = arp_table[i].q; + arp_table[i].q = NULL; +#endif /* ARP_QUEUEING */ + /* send the queued IP packet */ + etharp_send_ip(netif, p, (struct eth_addr*)(netif->hwaddr), ethaddr); + /* free the queued IP packet */ + pbuf_free(p); + } + return ERR_OK; +} + +#if ETHARP_SUPPORT_STATIC_ENTRIES +/** Add a new static entry to the ARP table. If an entry exists for the + * specified IP address, this entry is overwritten. + * If packets are queued for the specified IP address, they are sent out. + * + * @param ipaddr IP address for the new static entry + * @param ethaddr ethernet address for the new static entry + * @return @see return values of etharp_add_static_entry + */ +err_t +etharp_add_static_entry(ip_addr_t *ipaddr, struct eth_addr *ethaddr) +{ + struct netif *netif; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_add_static_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", + ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr), + ethaddr->addr[0], ethaddr->addr[1], ethaddr->addr[2], + ethaddr->addr[3], ethaddr->addr[4], ethaddr->addr[5])); + + netif = ip_route(ipaddr); + if (netif == NULL) { + return ERR_RTE; + } + + return update_arp_entry(netif, ipaddr, ethaddr, ETHARP_FLAG_TRY_HARD | ETHARP_FLAG_STATIC_ENTRY); +} + +/** Remove a static entry from the ARP table previously added with a call to + * etharp_add_static_entry. + * + * @param ipaddr IP address of the static entry to remove + * @return ERR_OK: entry removed + * ERR_MEM: entry wasn't found + * ERR_ARG: entry wasn't a static entry but a dynamic one + */ +err_t +etharp_remove_static_entry(ip_addr_t *ipaddr) +{ + s8_t i; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_remove_static_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr))); + + /* find or create ARP entry */ + i = find_entry(ipaddr, ETHARP_FLAG_FIND_ONLY); + /* bail out if no entry could be found */ + if (i < 0) { + return (err_t)i; + } + + if ((arp_table[i].state != ETHARP_STATE_STABLE) || + (arp_table[i].static_entry == 0)) { + /* entry wasn't a static entry, cannot remove it */ + return ERR_ARG; + } + /* entry found, free it */ + free_entry(i); + return ERR_OK; +} +#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ + +/** + * Remove all ARP table entries of the specified netif. + * + * @param netif points to a network interface + */ +void ICACHE_FLASH_ATTR etharp_cleanup_netif(struct netif *netif) +{ + u8_t i; + + for (i = 0; i < ARP_TABLE_SIZE; ++i) { + u8_t state = arp_table[i].state; + if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) { + free_entry(i); + } + } +} + +/** + * Finds (stable) ethernet/IP address pair from ARP table + * using interface and IP address index. + * @note the addresses in the ARP table are in network order! + * + * @param netif points to interface index + * @param ipaddr points to the (network order) IP address index + * @param eth_ret points to return pointer + * @param ip_ret points to return pointer + * @return table index if found, -1 otherwise + */ +s8_t +etharp_find_addr(struct netif *netif, ip_addr_t *ipaddr, + struct eth_addr **eth_ret, ip_addr_t **ip_ret) +{ + s8_t i; + + LWIP_ASSERT("eth_ret != NULL && ip_ret != NULL", + eth_ret != NULL && ip_ret != NULL); + + LWIP_UNUSED_ARG(netif); + + i = find_entry(ipaddr, ETHARP_FLAG_FIND_ONLY); + if((i >= 0) && (arp_table[i].state >= ETHARP_STATE_STABLE)) { + *eth_ret = &arp_table[i].ethaddr; + *ip_ret = &arp_table[i].ipaddr; + return i; + } + return -1; +} + +#if ETHARP_TRUST_IP_MAC +/** + * Updates the ARP table using the given IP packet. + * + * Uses the incoming IP packet's source address to update the + * ARP cache for the local network. The function does not alter + * or free the packet. This function must be called before the + * packet p is passed to the IP layer. + * + * @param netif The lwIP network interface on which the IP packet pbuf arrived. + * @param p The IP packet that arrived on netif. + * + * @return NULL + * + * @see pbuf_free() + */ +static void ICACHE_FLASH_ATTR +etharp_ip_input(struct netif *netif, struct pbuf *p) +{ + struct eth_hdr *ethhdr; + struct ip_hdr *iphdr; + ip_addr_t iphdr_src; + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + + /* Only insert an entry if the source IP address of the + incoming IP packet comes from a host on the local network. */ + ethhdr = (struct eth_hdr *)p->payload; + iphdr = (struct ip_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); +#if ETHARP_SUPPORT_VLAN + if (ethhdr->type == ETHTYPE_VLAN) { + iphdr = (struct ip_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + ip_addr_copy(iphdr_src, iphdr->src); + + /* source is not on the local network? */ + if (!ip_addr_netcmp(&iphdr_src, &(netif->ip_addr), &(netif->netmask))) { + /* do nothing */ + return; + } + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_ip_input: updating ETHARP table.\n")); + /* update the source IP address in the cache, if present */ + /* @todo We could use ETHARP_FLAG_TRY_HARD if we think we are going to talk + * back soon (for example, if the destination IP address is ours. */ + update_arp_entry(netif, &iphdr_src, &(ethhdr->src), ETHARP_FLAG_FIND_ONLY); +} +#endif /* ETHARP_TRUST_IP_MAC */ + +/** + * Responds to ARP requests to us. Upon ARP replies to us, add entry to cache + * send out queued IP packets. Updates cache with snooped address pairs. + * + * Should be called for incoming ARP packets. The pbuf in the argument + * is freed by this function. + * + * @param netif The lwIP network interface on which the ARP packet pbuf arrived. + * @param ethaddr Ethernet address of netif. + * @param p The ARP packet that arrived on netif. Is freed by this function. + * + * @return NULL + * + * @see pbuf_free() + */ +static void ICACHE_FLASH_ATTR +etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, struct pbuf *p) +{ + struct etharp_hdr *hdr; + struct eth_hdr *ethhdr; + /* these are aligned properly, whereas the ARP header fields might not be */ + ip_addr_t sipaddr, dipaddr; + u8_t for_us; +#if LWIP_AUTOIP + const u8_t * ethdst_hwaddr; +#endif /* LWIP_AUTOIP */ +#ifdef EBUF_LWIP + struct pbuf *q; +#endif /* EBUF_LWIP */ + + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + + /* drop short ARP packets: we have to check for p->len instead of p->tot_len here + since a struct etharp_hdr is pointed to p->payload, so it musn't be chained! */ + if (p->len < SIZEOF_ETHARP_PACKET) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("etharp_arp_input: packet dropped, too short (%"S16_F"/%"S16_F")\n", p->tot_len, + (s16_t)SIZEOF_ETHARP_PACKET)); + ETHARP_STATS_INC(etharp.lenerr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + return; + } + + ethhdr = (struct eth_hdr *)p->payload; + hdr = (struct etharp_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); +#if ETHARP_SUPPORT_VLAN + if (ethhdr->type == ETHTYPE_VLAN) { + hdr = (struct etharp_hdr *)(((u8_t*)ethhdr) + SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + /* RFC 826 "Packet Reception": */ + if ((hdr->hwtype != PP_HTONS(HWTYPE_ETHERNET)) || + (hdr->hwlen != ETHARP_HWADDR_LEN) || + (hdr->protolen != sizeof(ip_addr_t)) || + (hdr->proto != PP_HTONS(ETHTYPE_IP)) || + (ethhdr->type != PP_HTONS(ETHTYPE_ARP))) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("etharp_arp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n", + hdr->hwtype, hdr->hwlen, hdr->proto, hdr->protolen, ethhdr->type)); + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + return; + } + ETHARP_STATS_INC(etharp.recv); + +#if LWIP_AUTOIP + /* We have to check if a host already has configured our random + * created link local address and continously check if there is + * a host with this IP-address so we can detect collisions */ + autoip_arp_reply(netif, hdr); +#endif /* LWIP_AUTOIP */ + + /* Copy struct ip_addr2 to aligned ip_addr, to support compilers without + * structure packing (not using structure copy which breaks strict-aliasing rules). */ + IPADDR2_COPY(&sipaddr, &hdr->sipaddr); + IPADDR2_COPY(&dipaddr, &hdr->dipaddr); + + /* this interface is not configured? */ + if (ip_addr_isany(&netif->ip_addr)) { + for_us = 0; + } else { + /* ARP packet directed to us? */ + for_us = (u8_t)ip_addr_cmp(&dipaddr, &(netif->ip_addr)); + } + + /* ARP message directed to us? + -> add IP address in ARP cache; assume requester wants to talk to us, + can result in directly sending the queued packets for this host. + ARP message not directed to us? + -> update the source IP address in the cache, if present */ + update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), + for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY); + + /* now act on the message itself */ + switch (hdr->opcode) { + /* ARP request? */ + case PP_HTONS(ARP_REQUEST): + /* ARP request. If it asked for our address, we send out a + * reply. In any case, we time-stamp any existing ARP entry, + * and possiby send out an IP packet that was queued on it. */ + + LWIP_DEBUGF (ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: incoming ARP request\n")); + /* ARP request for our address? */ + if (for_us) { + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: replying to ARP request for our IP address\n")); + /* Re-use pbuf to send ARP reply. + Since we are re-using an existing pbuf, we can't call etharp_raw since + that would allocate a new pbuf. */ + hdr->opcode = htons(ARP_REPLY); + + IPADDR2_COPY(&hdr->dipaddr, &hdr->sipaddr); + IPADDR2_COPY(&hdr->sipaddr, &netif->ip_addr); + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); +#if LWIP_AUTOIP + /* If we are using Link-Local, all ARP packets that contain a Link-Local + * 'sender IP address' MUST be sent using link-layer broadcast instead of + * link-layer unicast. (See RFC3927 Section 2.5, last paragraph) */ + ethdst_hwaddr = ip_addr_islinklocal(&netif->ip_addr) ? (u8_t*)(ethbroadcast.addr) : hdr->shwaddr.addr; +#endif /* LWIP_AUTOIP */ + + ETHADDR16_COPY(&hdr->dhwaddr, &hdr->shwaddr); +#if LWIP_AUTOIP + ETHADDR16_COPY(ðhdr->dest, ethdst_hwaddr); +#else /* LWIP_AUTOIP */ + ETHADDR16_COPY(ðhdr->dest, &hdr->shwaddr); +#endif /* LWIP_AUTOIP */ + ETHADDR16_COPY(&hdr->shwaddr, ethaddr); + ETHADDR16_COPY(ðhdr->src, ethaddr); + + /* hwtype, hwaddr_len, proto, protolen and the type in the ethernet header + are already correct, we tested that before */ +#ifdef EBUF_LWIP + /* + * don't do flip-flop here... do a copy here. + * otherwise, we need to handle existing pbuf->eb in ieee80211_output.c + */ + + q = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if (q != NULL) { + pbuf_copy(q, p); + //pbuf_free(p); + } else { + LWIP_ASSERT("q != NULL", q != NULL); + } + + netif->linkoutput(netif, q); + pbuf_free(q); +#else + + /* return ARP reply */ + netif->linkoutput(netif, p); +#endif /* ESF_LWIP */ + /* we are not configured? */ + } else if (ip_addr_isany(&netif->ip_addr)) { + /* { for_us == 0 and netif->ip_addr.addr == 0 } */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: we are unconfigured, ARP request ignored.\n")); + /* request was not directed to us */ + } else { + /* { for_us == 0 and netif->ip_addr.addr != 0 } */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: ARP request was not for us.\n")); + } + break; + case PP_HTONS(ARP_REPLY): + /* ARP reply. We already updated the ARP cache earlier. */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: incoming ARP reply\n")); +#if (LWIP_DHCP && DHCP_DOES_ARP_CHECK) + /* DHCP wants to know about ARP replies from any host with an + * IP address also offered to us by the DHCP server. We do not + * want to take a duplicate IP address on a single network. + * @todo How should we handle redundant (fail-over) interfaces? */ + dhcp_arp_reply(netif, &sipaddr); +#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */ + break; + default: + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: ARP unknown opcode type %"S16_F"\n", htons(hdr->opcode))); + ETHARP_STATS_INC(etharp.err); + break; + } + /* free ARP packet */ + pbuf_free(p); +} + +/** Just a small helper function that sends a pbuf to an ethernet address + * in the arp_table specified by the index 'arp_idx'. + */ +static err_t ICACHE_FLASH_ATTR +etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, u8_t arp_idx) +{ + LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE", + arp_table[arp_idx].state >= ETHARP_STATE_STABLE); + /* if arp table entry is about to expire: re-request it, + but only if its state is ETHARP_STATE_STABLE to prevent flooding the + network with ARP requests if this address is used frequently. */ + if ((arp_table[arp_idx].state == ETHARP_STATE_STABLE) && + (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED)) { + if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) { + arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING; + } + } + + return etharp_send_ip(netif, q, (struct eth_addr*)(netif->hwaddr), + &arp_table[arp_idx].ethaddr); +} + +/** + * Resolve and fill-in Ethernet address header for outgoing IP packet. + * + * For IP multicast and broadcast, corresponding Ethernet addresses + * are selected and the packet is transmitted on the link. + * + * For unicast addresses, the packet is submitted to etharp_query(). In + * case the IP address is outside the local network, the IP address of + * the gateway is used. + * + * @param netif The lwIP network interface which the IP packet will be sent on. + * @param q The pbuf(s) containing the IP packet to be sent. + * @param ipaddr The IP address of the packet destination. + * + * @return + * - ERR_RTE No route to destination (no gateway to external networks), + * or the return type of either etharp_query() or etharp_send_ip(). + */ +err_t +etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr) +{ + struct eth_addr *dest, mcastaddr; + + /* make room for Ethernet header - should not fail */ + if (pbuf_header(q, sizeof(struct eth_hdr)) != 0) { + /* bail out */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("etharp_output: could not allocate room for header.\n")); + LINK_STATS_INC(link.lenerr); + return ERR_BUF; + } + + /* assume unresolved Ethernet address */ + dest = NULL; + /* Determine on destination hardware address. Broadcasts and multicasts + * are special, other IP addresses are looked up in the ARP table. */ + + /* broadcast destination IP address? */ + if (ip_addr_isbroadcast(ipaddr, netif)) { + /* broadcast on Ethernet also */ + dest = (struct eth_addr *)ðbroadcast; + /* multicast destination IP address? */ + } else if (ip_addr_ismulticast(ipaddr)) { + /* Hash IP multicast address to MAC address.*/ + mcastaddr.addr[0] = 0x01; + mcastaddr.addr[1] = 0x00; + mcastaddr.addr[2] = 0x5e; + mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f; + mcastaddr.addr[4] = ip4_addr3(ipaddr); + mcastaddr.addr[5] = ip4_addr4(ipaddr); + /* destination Ethernet address is multicast */ + dest = &mcastaddr; + /* unicast destination IP address? */ + } else { + s8_t i; + /* outside local network? if so, this can neither be a global broadcast nor + a subnet broadcast. */ + if (!ip_addr_netcmp(ipaddr, &(netif->ip_addr), &(netif->netmask)) && + !ip_addr_islinklocal(ipaddr)) { +#if LWIP_AUTOIP + struct ip_hdr *iphdr = (struct ip_hdr*)((u8_t*)q->payload + + sizeof(struct eth_hdr)); + /* According to RFC 3297, chapter 2.6.2 (Forwarding Rules), a packet with + a link-local source address must always be "directly to its destination + on the same physical link. The host MUST NOT send the packet to any + router for forwarding". */ + if (!ip_addr_islinklocal(&iphdr->src)) +#endif /* LWIP_AUTOIP */ + { + /* interface has default gateway? */ + if (!ip_addr_isany(&netif->gw)) { + /* send to hardware address of default gateway IP address */ + ipaddr = &(netif->gw); + /* no default gateway available */ + } else { + /* no route to destination error (default gateway missing) */ + return ERR_RTE; + } + } + } +#if LWIP_NETIF_HWADDRHINT + if (netif->addr_hint != NULL) { + /* per-pcb cached entry was given */ + u8_t etharp_cached_entry = *(netif->addr_hint); + if (etharp_cached_entry < ARP_TABLE_SIZE) { +#endif /* LWIP_NETIF_HWADDRHINT */ + if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) && + (ip_addr_cmp(ipaddr, &arp_table[etharp_cached_entry].ipaddr))) { + /* the per-pcb-cached entry is stable and the right one! */ + ETHARP_STATS_INC(etharp.cachehit); + return etharp_output_to_arp_index(netif, q, etharp_cached_entry); + } +#if LWIP_NETIF_HWADDRHINT + } + } +#endif /* LWIP_NETIF_HWADDRHINT */ + /* find stable entry: do this here since this is a critical path for + throughput and etharp_find_entry() is kind of slow */ + for (i = 0; i < ARP_TABLE_SIZE; i++) { + if ((arp_table[i].state >= ETHARP_STATE_STABLE) && + (ip_addr_cmp(ipaddr, &arp_table[i].ipaddr))) { + /* found an existing, stable entry */ + ETHARP_SET_HINT(netif, i); + return etharp_output_to_arp_index(netif, q, i); + } + } + /* queue on destination Ethernet address belonging to ipaddr */ + return etharp_query(netif, ipaddr, q); + } + + /* continuation for multicast/broadcast destinations */ + /* obtain source Ethernet address of the given interface */ + /* send packet directly on the link */ + return etharp_send_ip(netif, q, (struct eth_addr*)(netif->hwaddr), dest); +} + +/** + * Send an ARP request for the given IP address and/or queue a packet. + * + * If the IP address was not yet in the cache, a pending ARP cache entry + * is added and an ARP request is sent for the given address. The packet + * is queued on this entry. + * + * If the IP address was already pending in the cache, a new ARP request + * is sent for the given address. The packet is queued on this entry. + * + * If the IP address was already stable in the cache, and a packet is + * given, it is directly sent and no ARP request is sent out. + * + * If the IP address was already stable in the cache, and no packet is + * given, an ARP request is sent out. + * + * @param netif The lwIP network interface on which ipaddr + * must be queried for. + * @param ipaddr The IP address to be resolved. + * @param q If non-NULL, a pbuf that must be delivered to the IP address. + * q is not freed by this function. + * + * @note q must only be ONE packet, not a packet queue! + * + * @return + * - ERR_BUF Could not make room for Ethernet header. + * - ERR_MEM Hardware address unknown, and no more ARP entries available + * to query for address or queue the packet. + * - ERR_MEM Could not queue packet due to memory shortage. + * - ERR_RTE No route to destination (no gateway to external networks). + * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. + * + */ +err_t +etharp_query(struct netif *netif, ip_addr_t *ipaddr, struct pbuf *q) +{ + struct eth_addr * srcaddr = (struct eth_addr *)netif->hwaddr; + err_t result = ERR_MEM; + s8_t i; /* ARP entry index */ + + /* non-unicast address? */ + if (ip_addr_isbroadcast(ipaddr, netif) || + ip_addr_ismulticast(ipaddr) || + ip_addr_isany(ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n")); + return ERR_ARG; + } + + /* find entry in ARP cache, ask to create entry if queueing packet */ + i = find_entry(ipaddr, ETHARP_FLAG_TRY_HARD); + + /* could not find or create entry? */ + if (i < 0) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n")); + if (q) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n")); + ETHARP_STATS_INC(etharp.memerr); + } + return (err_t)i; + } + + /* mark a fresh entry as pending (we just sent a request) */ + if (arp_table[i].state == ETHARP_STATE_EMPTY) { + arp_table[i].state = ETHARP_STATE_PENDING; + } + + /* { i is either a STABLE or (new or existing) PENDING entry } */ + LWIP_ASSERT("arp_table[i].state == PENDING or STABLE", + ((arp_table[i].state == ETHARP_STATE_PENDING) || + (arp_table[i].state >= ETHARP_STATE_STABLE))); + + /* do we have a pending entry? or an implicit query request? */ + if ((arp_table[i].state == ETHARP_STATE_PENDING) || (q == NULL)) { + /* try to resolve it; send out ARP request */ + result = etharp_request(netif, ipaddr); + if (result != ERR_OK) { + /* ARP request couldn't be sent */ + /* We don't re-send arp request in etharp_tmr, but we still queue packets, + since this failure could be temporary, and the next packet calling + etharp_query again could lead to sending the queued packets. */ + } + if (q == NULL) { + return result; + } + } + + /* packet given? */ + LWIP_ASSERT("q != NULL", q != NULL); + /* stable entry? */ + if (arp_table[i].state >= ETHARP_STATE_STABLE) { + /* we have a valid IP->Ethernet address mapping */ + ETHARP_SET_HINT(netif, i); + /* send the packet */ + result = etharp_send_ip(netif, q, srcaddr, &(arp_table[i].ethaddr)); + /* pending entry? (either just created or already pending */ + } else if (arp_table[i].state == ETHARP_STATE_PENDING) { + /* entry is still pending, queue the given packet 'q' */ + struct pbuf *p; + int copy_needed = 0; + /* IF q includes a PBUF_REF, PBUF_POOL or PBUF_RAM, we have no choice but + * to copy the whole queue into a new PBUF_RAM (see bug #11400) + * PBUF_ROMs can be left as they are, since ROM must not get changed. */ + p = q; + while (p) { + LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0)); + if(p->type != PBUF_ROM) { + copy_needed = 1; + break; + } + p = p->next; + } + if(copy_needed) { + /* copy the whole packet into new pbufs */ + p = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if(p != NULL) { + if (pbuf_copy(p, q) != ERR_OK) { + pbuf_free(p); + p = NULL; + } + } + } else { + /* referencing the old pbuf is enough */ + p = q; + pbuf_ref(p); + } + /* packet could be taken over? */ + if (p != NULL) { + /* queue packet ... */ +#if ARP_QUEUEING + struct etharp_q_entry *new_entry; + /* allocate a new arp queue entry */ + new_entry = (struct etharp_q_entry *)memp_malloc(MEMP_ARP_QUEUE); + if (new_entry != NULL) { + unsigned int qlen = 0; + new_entry->next = 0; + new_entry->p = p; + if(arp_table[i].q != NULL) { + /* queue was already existent, append the new entry to the end */ + struct etharp_q_entry *r; + r = arp_table[i].q; + qlen++; + while (r->next != NULL) { + r = r->next; + qlen++; + } + r->next = new_entry; + } else { + /* queue did not exist, first item in queue */ + arp_table[i].q = new_entry; + } + if(qlen >= 3) { + struct etharp_q_entry *old; + old = arp_table[i].q; + arp_table[i].q = arp_table[i].q->next; + pbuf_free(old->p); + memp_free(MEM_ARP_QUEUE, old); + } + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"S16_F"\n", (void *)q, (s16_t)i)); + result = ERR_OK; + } else { + /* the pool MEMP_ARP_QUEUE is empty */ + pbuf_free(p); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); + result = ERR_MEM; + } +#else /* ARP_QUEUEING */ + /* always queue one packet per ARP request only, freeing a previously queued packet */ + if (arp_table[i].q != NULL) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"S16_F"\n", (void *)q, (s16_t)i)); + pbuf_free(arp_table[i].q); + } + arp_table[i].q = p; + result = ERR_OK; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"S16_F"\n", (void *)q, (s16_t)i)); +#endif /* ARP_QUEUEING */ + } else { + ETHARP_STATS_INC(etharp.memerr); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); + result = ERR_MEM; + } + } + return result; +} + +/** + * Send a raw ARP packet (opcode and all addresses can be modified) + * + * @param netif the lwip network interface on which to send the ARP packet + * @param ethsrc_addr the source MAC address for the ethernet header + * @param ethdst_addr the destination MAC address for the ethernet header + * @param hwsrc_addr the source MAC address for the ARP protocol header + * @param ipsrc_addr the source IP address for the ARP protocol header + * @param hwdst_addr the destination MAC address for the ARP protocol header + * @param ipdst_addr the destination IP address for the ARP protocol header + * @param opcode the type of the ARP packet + * @return ERR_OK if the ARP packet has been sent + * ERR_MEM if the ARP packet couldn't be allocated + * any other err_t on failure + */ +#if !LWIP_AUTOIP +static +#endif /* LWIP_AUTOIP */ +err_t ICACHE_FLASH_ATTR +etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, + const struct eth_addr *ethdst_addr, + const struct eth_addr *hwsrc_addr, const ip_addr_t *ipsrc_addr, + const struct eth_addr *hwdst_addr, const ip_addr_t *ipdst_addr, + const u16_t opcode) +{ + struct pbuf *p; + err_t result = ERR_OK; + struct eth_hdr *ethhdr; + struct etharp_hdr *hdr; +#if LWIP_AUTOIP + const u8_t * ethdst_hwaddr; +#endif /* LWIP_AUTOIP */ + + /* allocate a pbuf for the outgoing ARP request packet */ + p = pbuf_alloc(PBUF_RAW, SIZEOF_ETHARP_PACKET, PBUF_RAM); + /* could allocate a pbuf for an ARP request? */ + if (p == NULL) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("etharp_raw: could not allocate pbuf for ARP request.\n")); + ETHARP_STATS_INC(etharp.memerr); + return ERR_MEM; + } + LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr", + (p->len >= SIZEOF_ETHARP_PACKET)); + + ethhdr = (struct eth_hdr *)p->payload; + hdr = (struct etharp_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n")); + hdr->opcode = htons(opcode); + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); +#if LWIP_AUTOIP + /* If we are using Link-Local, all ARP packets that contain a Link-Local + * 'sender IP address' MUST be sent using link-layer broadcast instead of + * link-layer unicast. (See RFC3927 Section 2.5, last paragraph) */ + ethdst_hwaddr = ip_addr_islinklocal(ipsrc_addr) ? (u8_t*)(ethbroadcast.addr) : ethdst_addr->addr; +#endif /* LWIP_AUTOIP */ + /* Write the ARP MAC-Addresses */ + ETHADDR16_COPY(&hdr->shwaddr, hwsrc_addr); + ETHADDR16_COPY(&hdr->dhwaddr, hwdst_addr); + /* Write the Ethernet MAC-Addresses */ +#if LWIP_AUTOIP + ETHADDR16_COPY(ðhdr->dest, ethdst_hwaddr); +#else /* LWIP_AUTOIP */ + ETHADDR16_COPY(ðhdr->dest, ethdst_addr); +#endif /* LWIP_AUTOIP */ + ETHADDR16_COPY(ðhdr->src, ethsrc_addr); + /* Copy struct ip_addr2 to aligned ip_addr, to support compilers without + * structure packing. */ + IPADDR2_COPY(&hdr->sipaddr, ipsrc_addr); + IPADDR2_COPY(&hdr->dipaddr, ipdst_addr); + + hdr->hwtype = PP_HTONS(HWTYPE_ETHERNET); + hdr->proto = PP_HTONS(ETHTYPE_IP); + /* set hwlen and protolen */ + hdr->hwlen = ETHARP_HWADDR_LEN; + hdr->protolen = sizeof(ip_addr_t); + + ethhdr->type = PP_HTONS(ETHTYPE_ARP); + /* send ARP query */ + result = netif->linkoutput(netif, p); + ETHARP_STATS_INC(etharp.xmit); + /* free ARP query packet */ + pbuf_free(p); + p = NULL; + /* could not allocate pbuf for ARP request */ + + return result; +} + +/** + * Send an ARP request packet asking for ipaddr. + * + * @param netif the lwip network interface on which to send the request + * @param ipaddr the IP address for which to ask + * @return ERR_OK if the request has been sent + * ERR_MEM if the ARP packet couldn't be allocated + * any other err_t on failure + */ +err_t +etharp_request(struct netif *netif, ip_addr_t *ipaddr) +{ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n")); + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, &netif->ip_addr, ðzero, + ipaddr, ARP_REQUEST); +} +#endif /* LWIP_ARP */ + +/** + * Process received ethernet frames. Using this function instead of directly + * calling ip_input and passing ARP frames through etharp in ethernetif_input, + * the ARP cache is protected from concurrent access. + * + * @param p the recevied packet, p->payload pointing to the ethernet header + * @param netif the network interface on which the packet was received + */ +err_t +ethernet_input(struct pbuf *p, struct netif *netif) +{ + struct eth_hdr* ethhdr; + u16_t type; + s16_t ip_hdr_offset = SIZEOF_ETH_HDR; + + if (p->len <= SIZEOF_ETH_HDR) { + /* a packet with only an ethernet header (or less) is not valid for us modify by ives at 2014.4.24*/ + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + goto free_and_return; + } + + /* points to packet payload, which starts with an Ethernet header */ + ethhdr = (struct eth_hdr *)p->payload; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, + ("ethernet_input: dest:%"X8_F":%"X8_F":%"X8_F":%"X8_F":%"X8_F":%"X8_F", src:%"X8_F":%"X8_F":%"X8_F":%"X8_F":%"X8_F":%"X8_F", type:%"X16_F"\n", + (unsigned)ethhdr->dest.addr[0], (unsigned)ethhdr->dest.addr[1], (unsigned)ethhdr->dest.addr[2], + (unsigned)ethhdr->dest.addr[3], (unsigned)ethhdr->dest.addr[4], (unsigned)ethhdr->dest.addr[5], + (unsigned)ethhdr->src.addr[0], (unsigned)ethhdr->src.addr[1], (unsigned)ethhdr->src.addr[2], + (unsigned)ethhdr->src.addr[3], (unsigned)ethhdr->src.addr[4], (unsigned)ethhdr->src.addr[5], + (unsigned)htons(ethhdr->type))); + + type = ethhdr->type; +#if ETHARP_SUPPORT_VLAN + if (type == PP_HTONS(ETHTYPE_VLAN)) { + struct eth_vlan_hdr *vlan = (struct eth_vlan_hdr*)(((char*)ethhdr) + SIZEOF_ETH_HDR); + if (p->len <= SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR) { + /* a packet with only an ethernet/vlan header (or less) is not valid for us modify by ives at 2014.4.24*/ + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + goto free_and_return; + } +#ifdef ETHARP_VLAN_CHECK /* if not, allow all VLANs */ + if (VLAN_ID(vlan) != ETHARP_VLAN_CHECK) { + /* silently ignore this packet: not for our VLAN */ + pbuf_free(p); + return ERR_OK; + } +#endif /* ETHARP_VLAN_CHECK */ + type = vlan->tpid; + ip_hdr_offset = SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR; + } +#endif /* ETHARP_SUPPORT_VLAN */ + +#if LWIP_ARP_FILTER_NETIF + netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, htons(type)); +#endif /* LWIP_ARP_FILTER_NETIF*/ + + switch (type) { +#if LWIP_ARP + /* IP packet? */ + case PP_HTONS(ETHTYPE_IP): + if (!(netif->flags & NETIF_FLAG_ETHARP)) { + goto free_and_return; + } +#if ETHARP_TRUST_IP_MAC + /* update ARP table */ + etharp_ip_input(netif, p); +#endif /* ETHARP_TRUST_IP_MAC */ + /* skip Ethernet header */ + if(pbuf_header(p, -ip_hdr_offset)) { + LWIP_ASSERT("Can't move over header in packet", 0); + goto free_and_return; + } else { + /* pass to IP layer */ + ip_input(p, netif); + } + break; + + case PP_HTONS(ETHTYPE_ARP): + if (!(netif->flags & NETIF_FLAG_ETHARP)) { + goto free_and_return; + } + /* pass p to ARP module */ + etharp_arp_input(netif, (struct eth_addr*)(netif->hwaddr), p); + break; +#endif /* LWIP_ARP */ +#if PPPOE_SUPPORT + case PP_HTONS(ETHTYPE_PPPOEDISC): /* PPP Over Ethernet Discovery Stage */ + pppoe_disc_input(netif, p); + break; + + case PP_HTONS(ETHTYPE_PPPOE): /* PPP Over Ethernet Session Stage */ + pppoe_data_input(netif, p); + break; +#endif /* PPPOE_SUPPORT */ + + default: + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + goto free_and_return; + } + + /* This means the pbuf is freed or consumed, + so the caller doesn't have to free it again */ + return ERR_OK; + +free_and_return: + pbuf_free(p); + return ERR_OK; +} +#endif /* LWIP_ARP || LWIP_ETHERNET */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/make_lib.sh b/examples/ESP8266_NONOS_SDK/third_party/make_lib.sh new file mode 100755 index 0000000..ce7a48a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/make_lib.sh @@ -0,0 +1,26 @@ +#!/bin/bash +set -e + +export SDK_PATH=$(dirname $(pwd)) + +echo "make_lib.sh version 20150924" +echo "" + +if [ $SDK_PATH ]; then + echo "SDK_PATH:" + echo "$SDK_PATH" + echo "" +else + echo "ERROR: Please export SDK_PATH in make_lib.sh firstly, exit!!!" + exit +fi + +cd $1 +make clean +make COMPILE=gcc + +# Make sure the lib folder is exist. + +cp .output/eagle/debug/lib/lib$1.a ../../lib/lib$1.a +xtensa-lx106-elf-strip --strip-unneeded ../../lib/lib$1.a +cd .. diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/Makefile b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/Makefile new file mode 100644 index 0000000..dd6399c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/Makefile @@ -0,0 +1,49 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR +UP_EXTRACT_DIR = .. +GEN_LIBS = libmbedtls.a +COMPONENTS_libmbedtls = library/liblibrary.a platform/libplatform.a app/libapp.a +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +DEFINES += -DMBEDTLS_CONFIG_FILE='"config_esp.h"' +#CCFLAGS += --rename-section .text=.irom0.text --rename-section .literal=.irom0.literal + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ../$(PDIR)include/lwip/posix +INCLUDES += -I ../$(PDIR)include/mbedtls +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/Makefile b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/Makefile new file mode 100644 index 0000000..4a3dbd1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = libapp.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/espconn_mbedtls.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/espconn_mbedtls.c new file mode 100644 index 0000000..95f203d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/espconn_mbedtls.c @@ -0,0 +1,1295 @@ +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#if !defined(ESPCONN_MBEDTLS) + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "mbedtls/ssl_internal.h" + +#include "mem.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +#include "sys/socket.h" +#include "sys/espconn_mbedtls.h" +#include "lwip/app/espconn_tcp.h" + +static os_event_t lwIPThreadQueue[lwIPThreadQueueLen]; +static bool lwIPThreadFlag = false; +extern espconn_msg *plink_active; +static espconn_msg *plink_server = NULL; +static pmbedtls_parame def_certificate = NULL; +static pmbedtls_parame def_private_key = NULL; + +#if defined(ESP8266_PLATFORM) +#define MBEDTLS_SSL_OUTBUFFER_LEN ( MBEDTLS_SSL_PLAIN_ADD \ + + MBEDTLS_SSL_COMPRESSION_ADD \ + + 29 /* counter + header + IV */ \ + + MBEDTLS_SSL_MAC_ADD \ + + MBEDTLS_SSL_PADDING_ADD \ + ) +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +static pmbedtls_parame mbedtls_parame_new(size_t capacity) +{ + pmbedtls_parame rb = (pmbedtls_parame)os_zalloc(sizeof(mbedtls_parame)); + if (rb && capacity != 0){ + rb->parame_datalen = capacity; + rb->parame_data = (uint8*)os_zalloc(rb->parame_datalen + 1); + if (rb->parame_data){ + + } else{ + os_free(rb); + rb = NULL; + } + } + return rb; +} + +static void mbedtls_parame_free(pmbedtls_parame *fp) +{ + lwIP_ASSERT(fp); + lwIP_ASSERT(*fp); + + os_free((*fp)->parame_data); + os_free(*fp); + *fp = NULL; +} + +bool mbedtls_load_default_obj(uint32 flash_sector, int obj_type, const unsigned char *load_buf, uint16 length) +{ + pmbedtls_parame mbedtls_write = NULL; + uint32 mbedtls_head = 0; + bool mbedtls_load_flag = false; + + if (flash_sector != 0){ + spi_flash_read(flash_sector * FLASH_SECTOR_SIZE, (uint32*)&mbedtls_head, 4); + if (mbedtls_head != ESPCONN_INVALID_TYPE){ + mbedtls_write = mbedtls_parame_new(0); + mbedtls_write->parame_datalen = length; + } + } else{ + const char* const begin = "-----BEGIN"; + int format_type = ESPCONN_FORMAT_INIT; + /* + * Determine data content. data contains either one DER certificate or + * one or more PEM certificates. + */ + if ((char*)os_strstr(load_buf, begin) != NULL){ + format_type = ESPCONN_FORMAT_PEM; + }else{ + format_type = ESPCONN_FORMAT_DER; + } + + if (format_type == ESPCONN_FORMAT_PEM){ + length += 1; + } + + mbedtls_write = mbedtls_parame_new(length); + if (mbedtls_write){ + os_memcpy(mbedtls_write->parame_data, load_buf, length); + if (format_type == ESPCONN_FORMAT_PEM) + mbedtls_write->parame_data[length - 1] = '\0'; + } + } + + if (mbedtls_write){ + mbedtls_load_flag = true; + mbedtls_write->parame_type = obj_type; + mbedtls_write->parame_sec = flash_sector; + if (obj_type == ESPCONN_PK){ + def_private_key = mbedtls_write; + } else{ + def_certificate = mbedtls_write; + } + } + return mbedtls_load_flag; +} + +static unsigned char* mbedtls_get_default_obj(uint32 *sec, uint32 type, uint32 *len) +{ + const char* const begin = "-----BEGIN"; + unsigned char *parame_data = NULL; + pmbedtls_parame mbedtls_obj = NULL; + + if (type == ESPCONN_PK){ + mbedtls_obj = def_private_key; + } else{ + mbedtls_obj = def_certificate; + } + + if (mbedtls_obj->parame_sec != 0){ + #define DATA_OFFSET 4 + uint32 data_len = mbedtls_obj->parame_datalen; + parame_data = (unsigned char *)os_zalloc(data_len + DATA_OFFSET); + if (parame_data){ + spi_flash_read(mbedtls_obj->parame_sec * FLASH_SECTOR_SIZE, (uint32*)parame_data, data_len); + /* + * Determine buffer content. Buffer contains either one DER certificate or + * one or more PEM certificates. + */ + if ((char*)os_strstr(parame_data, begin) != NULL){ + data_len ++; + parame_data[data_len - 1] = '\0'; + } + } + *len = data_len; + } else{ + parame_data = mbedtls_obj->parame_data; + *len = mbedtls_obj->parame_datalen; + } + + *sec = mbedtls_obj->parame_sec; + return parame_data; +} + +static int mbedtls_setsockopt(int sock_id, int level, int optname, int optval) +{ + return setsockopt(sock_id, level, optname, (void*)&optval, sizeof(optval)); +} + +static int mbedtls_keep_alive(int sock_id, int onoff, int idle, int intvl, int cnt) +{ + int ret = ERR_OK; + if (onoff == 0) + return mbedtls_setsockopt(sock_id, SOL_SOCKET, SO_KEEPALIVE, onoff);; + + ret = mbedtls_setsockopt(sock_id, SOL_SOCKET, SO_KEEPALIVE, onoff); + lwIP_REQUIRE_NOERROR(ret, exit); + ret = mbedtls_setsockopt(sock_id, IPPROTO_TCP, TCP_KEEPALIVE, onoff); + lwIP_REQUIRE_NOERROR(ret, exit); + ret = mbedtls_setsockopt(sock_id, IPPROTO_TCP, TCP_KEEPIDLE, idle); + lwIP_REQUIRE_NOERROR(ret, exit); + ret = mbedtls_setsockopt(sock_id, IPPROTO_TCP, TCP_KEEPINTVL, intvl); + lwIP_REQUIRE_NOERROR(ret, exit); + ret = mbedtls_setsockopt(sock_id, IPPROTO_TCP, TCP_KEEPCNT, cnt); + lwIP_REQUIRE_NOERROR(ret, exit); + +exit: + return ret; +} + +#if defined(ESP8266_PLATFORM) +static pmbedtls_finished mbedtls_finished_new(int len) +{ + pmbedtls_finished finished = (pmbedtls_finished)os_zalloc(sizeof(mbedtls_finished)); + if (finished) + { + finished->finished_len = len; + finished->finished_buf = (uint8*)os_zalloc(finished->finished_len + 1); + if (finished->finished_buf) + { + + } + else + { + os_free(finished); + finished = NULL; + } + } + return finished; +} + +static void mbedtls_finished_free(pmbedtls_finished *pfinished) +{ + lwIP_ASSERT(pfinished); + lwIP_ASSERT(*pfinished); + os_free((*pfinished)->finished_buf); + os_free(*pfinished); + *pfinished = NULL; +} +#endif +static pmbedtls_espconn mbedtls_espconn_new(void) +{ + pmbedtls_espconn mbedtls_conn = NULL; + mbedtls_conn = (pmbedtls_espconn)os_zalloc(sizeof(mbedtls_espconn)); + if (mbedtls_conn){ + mbedtls_conn->proto.tcp = (esp_tcp *)os_zalloc(sizeof(esp_tcp)); + if (mbedtls_conn->proto.tcp == NULL){ + os_free(mbedtls_conn); + mbedtls_conn = NULL; + } + } + + return mbedtls_conn; +} + +static void mbedtls_espconn_free(pmbedtls_espconn *mbedtlsconn) +{ + lwIP_ASSERT(mbedtlsconn); + lwIP_ASSERT(*mbedtlsconn); + + os_free((*mbedtlsconn)->proto.tcp); + (*mbedtlsconn)->proto.tcp = NULL; + + os_free((*mbedtlsconn)); + *mbedtlsconn = NULL; +} + +static pmbedtls_session mbedtls_session_new(void) +{ + pmbedtls_session session = (pmbedtls_session)os_zalloc(sizeof(mbedtls_session)); + if (session){ + mbedtls_x509_crt_init(&session->cacert); + mbedtls_x509_crt_init(&session->clicert); + mbedtls_pk_init(&session->pkey); +// mbedtls_entropy_init(&session->entropy); + } + return session; +} + +static void mbedtls_session_free(pmbedtls_session *session) +{ + lwIP_ASSERT(session); + lwIP_ASSERT(*session); + + mbedtls_x509_crt_free(&(*session)->cacert); + mbedtls_x509_crt_free(&(*session)->clicert); + mbedtls_pk_free(&(*session)->pkey); +// mbedtls_entropy_free(&(*session)->entropy); + os_free(*session); + *session = NULL; +} + +static pmbedtls_msg mbedtls_msg_new(void) +{ + pmbedtls_msg msg = (pmbedtls_msg)os_zalloc( sizeof(mbedtls_msg)); + if (msg) { + os_bzero(msg, sizeof(mbedtls_msg)); + msg->psession = mbedtls_session_new(); + if (msg->psession){ + mbedtls_net_init(&msg->listen_fd); + mbedtls_net_init(&msg->fd); + mbedtls_ssl_init(&msg->ssl); + mbedtls_ssl_config_init(&msg->conf); + mbedtls_ctr_drbg_init(&msg->ctr_drbg); + mbedtls_entropy_init(&msg->entropy); + } else{ + os_free(msg); + msg = NULL; + } + } + return msg; +} + +static void mbedtls_msg_server_step(pmbedtls_msg msg) +{ + lwIP_ASSERT(msg); + + /*to prevent memory leaks, ensure that each allocated is deleted at every handshake*/ + if (msg->psession){ + mbedtls_session_free(&msg->psession); + } +#if defined(ESP8266_PLATFORM) + if (msg->quiet && msg->ssl.out_buf) + { + mbedtls_zeroize(msg->ssl.out_buf, MBEDTLS_SSL_OUTBUFFER_LEN); + os_free(msg->ssl.out_buf); + msg->ssl.out_buf = NULL; + } +#endif + mbedtls_entropy_free(&msg->entropy); + mbedtls_ssl_free(&msg->ssl); + mbedtls_ssl_config_free(&msg->conf); + mbedtls_ctr_drbg_free(&msg->ctr_drbg); + + /*New connection ensure that each initial for next handshake */ + os_bzero(msg, sizeof(mbedtls_msg)); + msg->psession = mbedtls_session_new(); + if (msg->psession){ + mbedtls_net_init(&msg->fd); + mbedtls_ssl_init(&msg->ssl); + mbedtls_ssl_config_init(&msg->conf); + mbedtls_ctr_drbg_init(&msg->ctr_drbg); + mbedtls_entropy_init(&msg->entropy); + } +} + +static void mbedtls_msg_free(pmbedtls_msg *msg) +{ + lwIP_ASSERT(msg); + lwIP_ASSERT(*msg); + + /*to prevent memory leaks, ensure that each allocated is deleted at every handshake*/ + if ((*msg)->psession){ + mbedtls_session_free(&((*msg)->psession)); + } +#if defined(ESP8266_PLATFORM) + if ((*msg)->quiet && (*msg)->ssl.out_buf) + { + mbedtls_zeroize((*msg)->ssl.out_buf, MBEDTLS_SSL_OUTBUFFER_LEN); + os_free((*msg)->ssl.out_buf); + (*msg)->ssl.out_buf = NULL; + } + if((*msg)->pfinished != NULL) + mbedtls_finished_free(&(*msg)->pfinished); +#endif + mbedtls_entropy_free(&(*msg)->entropy); + mbedtls_ssl_free(&(*msg)->ssl); + mbedtls_ssl_config_free(&(*msg)->conf); + mbedtls_ctr_drbg_free(&(*msg)->ctr_drbg); + + os_free(*msg); + *msg = NULL; +} + +static espconn_msg* mbedtls_msg_find(int sock) +{ + espconn_msg *plist = NULL; + pmbedtls_msg msg = NULL; + + for (plist = plink_active; plist != NULL; plist = plist->pnext) { + if(plist->pssl != NULL){ + msg = plist->pssl; + if (msg->fd.fd == sock) + return plist; + } + } + + for (plist = plink_server; plist != NULL; plist = plist->pnext){ + if(plist->pssl != NULL){ + msg = plist->pssl; + if (msg->listen_fd.fd == sock) + return plist; + } + } + return NULL; +} + +void mbedtls_handshake_heap(mbedtls_ssl_context *ssl) +{ + os_printf("mbedtls_handshake_heap %d %d\n", ssl->state, system_get_free_heap_size()); +} + +static bool mbedtls_handshake_result(const pmbedtls_msg Threadmsg) +{ + if (Threadmsg == NULL) + return false; + + if (Threadmsg->ssl.state == MBEDTLS_SSL_HANDSHAKE_OVER) { + int ret = 0; + if (Threadmsg->listen_fd.fd == -1) + ret = ssl_option.client.cert_ca_sector.flag; + else + ret = ssl_option.server.cert_ca_sector.flag; + + if (ret == 1){ + ret = mbedtls_ssl_get_verify_result(&Threadmsg->ssl); + if (ret != 0) { + char vrfy_buf[512]; + os_memset(vrfy_buf, 0, sizeof(vrfy_buf)-1); + mbedtls_x509_crt_verify_info(vrfy_buf, sizeof(vrfy_buf), "!", ret); + os_printf("%s\n", vrfy_buf); + Threadmsg->verify_result = ret; + return false; + } else + return true; + } else + return true; + }else + return false; +} + +static void mbedtls_fail_info(espconn_msg *pinfo, int ret) +{ + pmbedtls_msg TLSmsg = NULL; + lwIP_REQUIRE_ACTION(pinfo,exit,ret = ERR_ARG); + TLSmsg = pinfo->pssl; + lwIP_REQUIRE_ACTION(TLSmsg,exit,ret = ERR_ARG); + + if (TLSmsg->quiet){ + if (pinfo->preverse != NULL) { + os_printf("server's data invalid protocol\n"); + } else { + os_printf("client's data invalid protocol\n"); + } + if(ret != MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY){ + mbedtls_ssl_close_notify(&TLSmsg->ssl); + } + } else{ + if (pinfo->preverse != NULL) { + os_printf("server handshake failed!\n"); + } else { + os_printf("client handshake failed!\n"); + } + } + + os_printf("Reason:[-0x%2x]\n",-ret); + /*Error code convert*/ + ret = -ret; + if ((ret & 0xFF) != 0){ + ret = ((ret >> 8) + ret); + } else{ + ret >>= 8; + } + pinfo->hs_status = -ret; + pinfo->pespconn->state = ESPCONN_CLOSE; + + mbedtls_net_free(&TLSmsg->fd); + +exit: + return; +} + +#if defined(ESP8266_PLATFORM) +int mbedtls_write_finished(mbedtls_ssl_context *ssl) +{ + lwIP_ASSERT(ssl); + lwIP_ASSERT(ssl->p_bio); + int ret = ERR_OK; + int fd = ((mbedtls_net_context *) ssl->p_bio)->fd; + espconn_msg *Threadmsg = mbedtls_msg_find(fd); + lwIP_REQUIRE_ACTION(Threadmsg, exit, ret = ERR_MEM); + pmbedtls_msg TLSmsg = Threadmsg->pssl; + lwIP_REQUIRE_ACTION(TLSmsg, exit, ret = ERR_MEM); + TLSmsg->pfinished = mbedtls_finished_new(ssl->out_msglen + 29); + lwIP_REQUIRE_ACTION(TLSmsg->pfinished, exit, ret = ERR_MEM); + os_memcpy(TLSmsg->pfinished->finished_buf, ssl->out_ctr, TLSmsg->pfinished->finished_len); +exit: + return ret; +} + +static int mbedtls_hanshake_finished(mbedtls_msg *msg) +{ + lwIP_ASSERT(msg); + int ret = ERR_OK; + const size_t len = MBEDTLS_SSL_OUTBUFFER_LEN; + + mbedtls_ssl_context *ssl = &msg->ssl; + lwIP_REQUIRE_ACTION(ssl, exit, ret = ERR_MEM); + + pmbedtls_finished finished = msg->pfinished; + lwIP_REQUIRE_ACTION(finished, exit, ret = ERR_MEM); + + ssl->out_buf = (unsigned char*)os_zalloc(len); + lwIP_REQUIRE_ACTION(ssl->out_buf, exit, ret = MBEDTLS_ERR_SSL_ALLOC_FAILED); + + ssl->out_ctr = ssl->out_buf; + ssl->out_hdr = ssl->out_buf + 8; + ssl->out_len = ssl->out_buf + 11; + ssl->out_iv = ssl->out_buf + 13; + ssl->out_msg = ssl->out_buf + 29; + os_memcpy(ssl->out_ctr, finished->finished_buf, finished->finished_len); + mbedtls_finished_free(&msg->pfinished); + +exit: + return ret; +} +#endif +static void mbedtls_handshake_succ(mbedtls_ssl_context *ssl) +{ + lwIP_ASSERT(ssl); + if( ssl->handshake ) + { + mbedtls_ssl_handshake_free( ssl->handshake ); + mbedtls_ssl_transform_free( ssl->transform_negotiate ); + mbedtls_ssl_session_free( ssl->session_negotiate ); + + os_free( ssl->handshake ); + os_free( ssl->transform_negotiate ); + os_free( ssl->session_negotiate ); + ssl->handshake = NULL; + ssl->transform_negotiate = NULL; + ssl->session_negotiate = NULL; + } + + if( ssl->session ) + { + mbedtls_ssl_session_free( ssl->session ); + os_free( ssl->session ); + ssl->session = NULL; + } + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + if( ssl->hostname != NULL ) + { + mbedtls_zeroize( ssl->hostname, os_strlen( ssl->hostname ) ); + os_free( ssl->hostname ); + ssl->hostname = NULL; + } +#endif +} + +/****************************************************************************** + * FunctionName : espconn_ssl_reconnect + * Description : reconnect with host + * Parameters : arg -- Additional argument to pass to the callback function + * Returns : none +*******************************************************************************/ +static void espconn_close_internal(void *arg, netconn_event event_type) +{ + espconn_msg *pssl_recon = arg; + struct espconn *espconn = NULL; + sint8 ssl_reerr = 0; + sint16 hs_status = 0; + lwIP_ASSERT(pssl_recon); + + espconn = pssl_recon->preverse; + ssl_reerr = pssl_recon->pcommon.err; + hs_status = pssl_recon->hs_status; + if (espconn != NULL) { + //clear pcommon parameters. + pssl_recon->pcommon.write_flag = false; + pssl_recon->pcommon.ptrbuf = NULL; + pssl_recon->pcommon.cntr = 0; + pssl_recon->pcommon.err = 0; + espconn = pssl_recon->preverse; + } else { + espconn = pssl_recon->pespconn; + os_free(pssl_recon); + pssl_recon = NULL; + } + + espconn_kill_oldest_pcb(); + switch (event_type){ + case NETCONN_EVENT_ERROR: + if (hs_status == ESPCONN_OK) + ESPCONN_EVENT_ERROR(espconn, ssl_reerr); + else + ESPCONN_EVENT_ERROR(espconn, hs_status); + break; + case NETCONN_EVENT_CLOSE: + if (hs_status == ESPCONN_OK) + ESPCONN_EVENT_CLOSED(espconn); + else + ESPCONN_EVENT_ERROR(espconn, hs_status); + break; + default: + break; + } +} + +/****************************************************************************** + * FunctionName : espconn_ssl_read_param_from_flash + * Description : load parameter from flash, toggle use two sector by flag value. + * Parameters : param--the parame point which write the flash + * Returns : none +*******************************************************************************/ +static bool espconn_ssl_read_param_from_flash(void *param, uint16 len, int32 offset, mbedtls_auth_info *auth_info) +{ + if (param == NULL || (len + offset) > ESPCONN_SECURE_MAX_SIZE) { + return false; + } + + uint32 FILE_PARAM_START_SEC = 0x3B; + switch (auth_info->auth_level) { + case ESPCONN_CLIENT: + switch (auth_info->auth_type) { + case ESPCONN_CERT_AUTH: + FILE_PARAM_START_SEC = ssl_option.client.cert_ca_sector.sector; + break; + case ESPCONN_CERT_OWN: + case ESPCONN_PK: + FILE_PARAM_START_SEC = ssl_option.client.cert_req_sector.sector; + break; + default: + return false; + } + break; + case ESPCONN_SERVER: + switch (auth_info->auth_type) { + case ESPCONN_CERT_AUTH: + FILE_PARAM_START_SEC = ssl_option.server.cert_ca_sector.sector; + break; + case ESPCONN_CERT_OWN: + case ESPCONN_PK: + FILE_PARAM_START_SEC = ssl_option.server.cert_req_sector.sector; + break; + default: + return false; + } + break; + default: + return false; + break; + } + + spi_flash_read(FILE_PARAM_START_SEC * 4096 + offset, param, len); + + return true; +} + +static bool mbedtls_msg_info_load(mbedtls_msg *msg, mbedtls_auth_info *auth_info) +{ + const char* const begin = "-----BEGIN"; + const char* const type_name = "private_key"; + #define FILE_OFFSET 4 + int ret = 0; + int32 offerset = 0; + uint8* load_buf = NULL; + size_t load_len = 0; + file_param *pfile_param = NULL; + pfile_param = (file_param *)os_zalloc( sizeof(file_param)); + if (pfile_param==NULL) + return false; + +again: + espconn_ssl_read_param_from_flash(&pfile_param->file_head, sizeof(file_head), offerset, auth_info); + pfile_param->file_offerset = offerset; + os_printf("%s %d, type[%s],length[%d]\n", __FILE__, __LINE__, pfile_param->file_head.file_name, pfile_param->file_head.file_length); + if (pfile_param->file_head.file_length == 0xFFFF){ + os_free(pfile_param); + return false; + } else{ + /*Optional is load the private key*/ + if (auth_info->auth_type == ESPCONN_PK && os_memcmp(pfile_param->file_head.file_name, type_name, os_strlen(type_name)) != 0){ + offerset += sizeof(file_head) + pfile_param->file_head.file_length; + goto again; + } + /*Optional is load the cert*/ + if (auth_info->auth_type == ESPCONN_CERT_OWN && os_memcmp(pfile_param->file_head.file_name, "certificate", os_strlen("certificate")) != 0){ + offerset += sizeof(file_head) + pfile_param->file_head.file_length; + goto again; + } + load_buf = (uint8_t *) os_zalloc( pfile_param->file_head.file_length + FILE_OFFSET); + if (load_buf == NULL){ + os_free(pfile_param); + return false; + } + offerset = sizeof(file_head) + pfile_param->file_offerset; + espconn_ssl_read_param_from_flash(load_buf, pfile_param->file_head.file_length, offerset, auth_info); + } + + load_len = pfile_param->file_head.file_length; + /* + * Determine buffer content. Buffer contains either one DER certificate or + * one or more PEM certificates. + */ + if ((char*)os_strstr(load_buf, begin) != NULL){ + load_len += 1; + load_buf[load_len - 1] = '\0'; + } + switch (auth_info->auth_type){ + case ESPCONN_CERT_AUTH: + /*Optional is not optimal for security*/ + ret = mbedtls_x509_crt_parse(&msg->psession->cacert, (const uint8*) load_buf,load_len); + lwIP_REQUIRE_NOERROR(ret, exit); + mbedtls_ssl_conf_authmode(&msg->conf, MBEDTLS_SSL_VERIFY_REQUIRED); + mbedtls_ssl_conf_ca_chain(&msg->conf, &msg->psession->cacert, NULL); + break; + case ESPCONN_CERT_OWN: + ret = mbedtls_x509_crt_parse(&msg->psession->clicert, (const uint8*) load_buf,load_len); + break; + case ESPCONN_PK: + ret = mbedtls_pk_parse_key(&msg->psession->pkey, (const uint8*) load_buf,load_len, NULL, 0); + lwIP_REQUIRE_NOERROR(ret, exit); + ret = mbedtls_ssl_conf_own_cert(&msg->conf, &msg->psession->clicert, &msg->psession->pkey); + break; + } +exit: + os_free(load_buf); + os_free(pfile_param); + if (ret < 0){ + return false; + }else{ + return true; + } +} + +static bool mbedtls_msg_config(mbedtls_msg *msg) +{ + const char *pers = NULL; + uint8 auth_type = 0; + bool load_flag = false; + int ret = ESPCONN_OK; + mbedtls_auth_info auth_info; + + /*end_point mode*/ + if (msg->listen_fd.fd == -1){ + pers = "client"; + auth_type = MBEDTLS_SSL_IS_CLIENT; + } else { + pers = "server"; + auth_type = MBEDTLS_SSL_IS_SERVER; + } + + /*Initialize the RNG and the session data*/ + ret = mbedtls_ctr_drbg_seed(&msg->ctr_drbg, mbedtls_entropy_func, &msg->entropy, (const unsigned char*) pers, os_strlen(pers)); + lwIP_REQUIRE_NOERROR(ret, exit); + + if (auth_type == MBEDTLS_SSL_IS_SERVER){ + uint32 flash_sector = 0; + /*Load the certificate*/ + unsigned int def_certificate_len = 0;unsigned char *def_certificate = NULL; + def_certificate = (unsigned char *)mbedtls_get_default_obj(&flash_sector,ESPCONN_CERT_OWN, &def_certificate_len); + lwIP_REQUIRE_ACTION(def_certificate, exit, ret = MBEDTLS_ERR_SSL_ALLOC_FAILED); + ret = mbedtls_x509_crt_parse(&msg->psession->clicert, (const unsigned char *)def_certificate, def_certificate_len); + if (flash_sector != 0) + os_free(def_certificate); + lwIP_REQUIRE_NOERROR(ret, exit); + + /*Load the private RSA key*/ + unsigned int def_private_key_len = 0;unsigned char *def_private_key = NULL; + def_private_key = (unsigned char *)mbedtls_get_default_obj(&flash_sector,ESPCONN_PK, &def_private_key_len); + lwIP_REQUIRE_ACTION(def_private_key, exit, ret = MBEDTLS_ERR_SSL_ALLOC_FAILED); + ret = mbedtls_pk_parse_key(&msg->psession->pkey, (const unsigned char *)def_private_key, def_private_key_len, NULL, 0); + if (flash_sector != 0) + os_free(def_private_key); + lwIP_REQUIRE_NOERROR(ret, exit); + ret = mbedtls_ssl_conf_own_cert(&msg->conf, &msg->psession->clicert, &msg->psession->pkey); + lwIP_REQUIRE_NOERROR(ret, exit); + + /*Load the trusted CA*/ + if (ssl_option.server.cert_ca_sector.flag) { + auth_info.auth_level = ESPCONN_SERVER; + auth_info.auth_type = ESPCONN_CERT_AUTH; + load_flag = mbedtls_msg_info_load(msg, &auth_info); + lwIP_REQUIRE_ACTION(load_flag, exit, ret = ESPCONN_MEM); + } + } else{ + /*Load the certificate and private RSA key*/ + if (ssl_option.client.cert_req_sector.flag) { + auth_info.auth_level = ESPCONN_CLIENT; + auth_info.auth_type = ESPCONN_CERT_OWN; + load_flag = mbedtls_msg_info_load(msg, &auth_info); + lwIP_REQUIRE_ACTION(load_flag, exit, ret = ESPCONN_MEM); + auth_info.auth_type = ESPCONN_PK; + load_flag = mbedtls_msg_info_load(msg, &auth_info); + lwIP_REQUIRE_ACTION(load_flag, exit, ret = ESPCONN_MEM); + } + + /*Load the trusted CA*/ + if(ssl_option.client.cert_ca_sector.flag){ + auth_info.auth_level = ESPCONN_CLIENT; + auth_info.auth_type = ESPCONN_CERT_AUTH; + load_flag = mbedtls_msg_info_load(msg, &auth_info); + lwIP_REQUIRE_ACTION(load_flag, exit, ret = ESPCONN_MEM); + } + } + + /*Setup the stuff*/ + ret = mbedtls_ssl_config_defaults(&msg->conf, auth_type, MBEDTLS_SSL_TRANSPORT_STREAM, MBEDTLS_SSL_PRESET_DEFAULT); + lwIP_REQUIRE_NOERROR(ret, exit); + + /*OPTIONAL is not optimal for security, but makes interop easier in this session*/ + if (auth_type == MBEDTLS_SSL_IS_CLIENT && ssl_option.client.cert_ca_sector.flag == false){ + mbedtls_ssl_conf_authmode(&msg->conf, MBEDTLS_SSL_VERIFY_NONE); + } + mbedtls_ssl_conf_rng(&msg->conf, mbedtls_ctr_drbg_random, &msg->ctr_drbg); + mbedtls_ssl_conf_dbg(&msg->conf, NULL, NULL); + + ret = mbedtls_ssl_setup(&msg->ssl, &msg->conf); + lwIP_REQUIRE_NOERROR(ret, exit); + + mbedtls_ssl_set_bio(&msg->ssl, &msg->fd, mbedtls_net_send, mbedtls_net_recv, NULL); + +exit: + if (ret != 0){ + return false; + } else{ + return true; + } +} + +int __attribute__((weak)) mbedtls_parse_internal(int socket, sint8 error) +{ + int ret = ERR_OK; + bool config_flag = false; + espconn_msg *Threadmsg = NULL; + pmbedtls_msg TLSmsg = NULL; + Threadmsg = mbedtls_msg_find(socket); + lwIP_REQUIRE_ACTION(Threadmsg, exit, ret = ERR_MEM); + TLSmsg = Threadmsg->pssl; + lwIP_REQUIRE_ACTION(TLSmsg, exit, ret = ERR_MEM); + + if (error == ERR_OK){ + if (TLSmsg->quiet){ + uint8 *TheadBuff = NULL; + size_t ThreadLen = MBEDTLS_SSL_PLAIN_ADD; + TheadBuff = (uint8 *)os_zalloc(ThreadLen + 1); + lwIP_REQUIRE_ACTION(TheadBuff, exit, ret = ERR_MEM); + do { + os_memset(TheadBuff, 0, ThreadLen); + ret = mbedtls_ssl_read(&TLSmsg->ssl, TheadBuff, ThreadLen); + if (ret > 0){ + ESPCONN_EVENT_RECV(Threadmsg->pespconn, TheadBuff, ret); + } else{ + if (ret == MBEDTLS_ERR_SSL_WANT_READ || ret == 0){ + ret = ESPCONN_OK; + break; + } else if(ret == MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY){ + ret = ESPCONN_OK; + mbedtls_ssl_close_notify(&TLSmsg->ssl); + }else{ + break; + } + } + } while(1); + os_free(TheadBuff); + TheadBuff = NULL; + lwIP_REQUIRE_NOERROR(ret, exit); + } else{ + if (TLSmsg->ssl.state == MBEDTLS_SSL_HELLO_REQUEST){ + if (Threadmsg->preverse != NULL){ + struct espconn *accept_conn = NULL; + struct espconn *espconn = Threadmsg->preverse; + struct sockaddr_in name; + socklen_t name_len = sizeof(name); + remot_info *pinfo = NULL; + espconn_get_connection_info(espconn, &pinfo , ESPCONN_SSL); + if (espconn->link_cnt == 0x01) + return ERR_ISCONN; + + ret = mbedtls_net_accept(&TLSmsg->listen_fd, &TLSmsg->fd, NULL, 0, NULL); + lwIP_REQUIRE_NOERROR(ret, exit); + accept_conn = mbedtls_espconn_new(); + lwIP_REQUIRE_ACTION(accept_conn, exit, ret = ERR_MEM); + Threadmsg->pespconn = accept_conn; + /*get the remote information*/ + getpeername(TLSmsg->fd.fd, (struct sockaddr*)&name, &name_len); + Threadmsg->pcommon.remote_port = htons(name.sin_port); + os_memcpy(Threadmsg->pcommon.remote_ip, &name.sin_addr.s_addr, 4); + + espconn->proto.tcp->remote_port = htons(name.sin_port); + os_memcpy(espconn->proto.tcp->remote_ip, &name.sin_addr.s_addr, 4); + + espconn_copy_partial(accept_conn, espconn); + + /*insert the node to the active connection list*/ + espconn_list_creat(&plink_active, Threadmsg); + os_printf("server handshake start.\n"); + } else{ + os_printf("client handshake start.\n"); + } + config_flag = mbedtls_msg_config(TLSmsg); + if (config_flag){ +// mbedtls_keep_alive(TLSmsg->fd.fd, 1, SSL_KEEP_IDLE, SSL_KEEP_INTVL, SSL_KEEP_CNT); + system_overclock(); + } else{ + ret = MBEDTLS_ERR_SSL_ALLOC_FAILED; + lwIP_REQUIRE_NOERROR(ret, exit); + } + } + + system_soft_wdt_stop(); + uint8 cpu_freq; + cpu_freq = system_get_cpu_freq(); + system_update_cpu_freq(160); + while ((ret = mbedtls_ssl_handshake(&TLSmsg->ssl)) != 0) { + + if (ret == MBEDTLS_ERR_SSL_WANT_READ || ret == MBEDTLS_ERR_SSL_WANT_WRITE) { + ret = ESPCONN_OK; + break; + } else{ + break; + } + } + system_soft_wdt_restart(); + system_update_cpu_freq(cpu_freq); + lwIP_REQUIRE_NOERROR(ret, exit); + /**/ + TLSmsg->quiet = mbedtls_handshake_result(TLSmsg); + if (TLSmsg->quiet){ + if (Threadmsg->preverse != NULL) { + os_printf("server handshake ok!\n"); + } else { + os_printf("client handshake ok!\n"); + } +// mbedtls_keep_alive(TLSmsg->fd.fd, 0, SSL_KEEP_IDLE, SSL_KEEP_INTVL, SSL_KEEP_CNT); + mbedtls_session_free(&TLSmsg->psession); + mbedtls_handshake_succ(&TLSmsg->ssl); +#if defined(ESP8266_PLATFORM) + mbedtls_hanshake_finished(TLSmsg); +#endif + system_restoreclock(); + + TLSmsg->SentFnFlag = true; + ESPCONN_EVENT_CONNECTED(Threadmsg->pespconn); + } else{ + lwIP_REQUIRE_NOERROR_ACTION(TLSmsg->verify_result, exit, ret = TLSmsg->verify_result); + } + } + } else if (error < 0){ + Threadmsg->pcommon.err = error; + Threadmsg->pespconn->state = ESPCONN_CLOSE; + mbedtls_net_free(&TLSmsg->fd); + ets_post(lwIPThreadPrio, NETCONN_EVENT_ERROR, (uint32)Threadmsg); + } else { + ret = MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY; + lwIP_REQUIRE_NOERROR(ret, exit); + } + +exit: + if (ret != ESPCONN_OK){ + mbedtls_fail_info(Threadmsg, ret); + if(ret == MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY){ + Threadmsg->hs_status = ESPCONN_OK; + } + ets_post(lwIPThreadPrio, NETCONN_EVENT_CLOSE,(uint32)Threadmsg); + } + return ret; +} + +int __attribute__((weak)) mbedtls_parse_thread(int socket, int event, int error) +{ + int ret = ERR_OK; + espconn_msg *Threadmsg = NULL; + pmbedtls_msg TLSmsg = NULL; + Threadmsg = mbedtls_msg_find(socket); + lwIP_REQUIRE_ACTION(Threadmsg, exit, ret = ERR_MEM); + TLSmsg = Threadmsg->pssl; + lwIP_REQUIRE_ACTION(TLSmsg, exit, ret = ERR_MEM); + if (TLSmsg->quiet){ + int out_msglen = TLSmsg->ssl.out_msglen + 5; + if (Threadmsg->pcommon.write_flag) + TLSmsg->record.record_len += error; + + if (TLSmsg->record.record_len == out_msglen){ + TLSmsg->record.record_len = 0; + Threadmsg->pcommon.write_flag = false; + if (Threadmsg->pcommon.cntr != 0){ + espconn_ssl_sent(Threadmsg, Threadmsg->pcommon.ptrbuf, Threadmsg->pcommon.cntr); + } else{ + TLSmsg->SentFnFlag = true; + ESPCONN_EVENT_SEND(Threadmsg->pespconn); + } + } else{ + + } + } else{ + + } +exit: + return ret; +} + +/** + * @brief Api_Thread. + * @param events: contain the Api_Thread processing data + * @retval None + */ +static void +mbedtls_thread(os_event_t *events) +{ + int ret = ESP_OK; + bool active_flag = false; + espconn_msg *Threadmsg = NULL; + espconn_msg *ListMsg = NULL; + pmbedtls_msg TLSmsg = NULL; + Threadmsg = (espconn_msg *)events->par; + lwIP_REQUIRE_ACTION(Threadmsg,exit,ret = ERR_ARG); + TLSmsg = Threadmsg->pssl; + lwIP_REQUIRE_ACTION(TLSmsg,exit,ret = ERR_ARG); + lwIP_REQUIRE_ACTION(Threadmsg->pespconn,exit,ret = ERR_ARG); + + /*find the active connection*/ + for (ListMsg = plink_active; ListMsg != NULL; ListMsg = ListMsg->pnext){ + if (Threadmsg == ListMsg){ + active_flag = true; + break; + } + } + + if (active_flag){ + /*remove the node from the active connection list*/ + espconn_list_delete(&plink_active, Threadmsg); + if (TLSmsg->listen_fd.fd != -1){ + mbedtls_msg_server_step(TLSmsg); + espconn_copy_partial(Threadmsg->preverse, Threadmsg->pespconn); + mbedtls_espconn_free(&Threadmsg->pespconn); + } else{ + mbedtls_msg_free(&TLSmsg); + Threadmsg->pssl = NULL; + } + + switch (events->sig){ + case NETCONN_EVENT_ERROR: + espconn_close_internal(Threadmsg, NETCONN_EVENT_ERROR); + break; + case NETCONN_EVENT_CLOSE: + espconn_close_internal(Threadmsg, NETCONN_EVENT_CLOSE); + break; + default: + break; + } + } +exit: + return; +} + +static void mbedtls_threadinit(void) +{ + ets_task(mbedtls_thread, lwIPThreadPrio, lwIPThreadQueue, lwIPThreadQueueLen); + lwIPThreadFlag = true; +} + +sint8 espconn_ssl_client(struct espconn *espconn) +{ + int ret = ESPCONN_OK; + struct ip_addr ipaddr; + const char *server_name = NULL; + const char *server_port = NULL; + espconn_msg *pclient = NULL; + pmbedtls_msg mbedTLSMsg = NULL; + if (lwIPThreadFlag == false) + mbedtls_threadinit(); + + lwIP_REQUIRE_ACTION(espconn, exit, ret = ESPCONN_ARG); + pclient = (espconn_msg *)os_zalloc( sizeof(espconn_msg)); + lwIP_REQUIRE_ACTION(pclient, exit, ret = ESPCONN_MEM); + mbedTLSMsg = mbedtls_msg_new(); + lwIP_REQUIRE_ACTION(mbedTLSMsg, exit, ret = ESPCONN_MEM); + IP4_ADDR(&ipaddr, espconn->proto.tcp->remote_ip[0],espconn->proto.tcp->remote_ip[1], + espconn->proto.tcp->remote_ip[2],espconn->proto.tcp->remote_ip[3]); + server_name = ipaddr_ntoa(&ipaddr); + server_port = (const char *)sys_itoa(espconn->proto.tcp->remote_port); + + /*start the connection*/ + ret = mbedtls_net_connect(&mbedTLSMsg->fd, server_name, server_port, MBEDTLS_NET_PROTO_TCP); + lwIP_REQUIRE_NOERROR_ACTION(ret, exit, ret = ESPCONN_MEM); + espconn->state = ESPCONN_WAIT; + pclient->pespconn = espconn; + pclient->pssl = mbedTLSMsg; + pclient->preverse = NULL; + /*insert the node to the active connection list*/ + espconn_list_creat(&plink_active, pclient); +exit: + if (ret != ESPCONN_OK){ + if (mbedTLSMsg != NULL) + mbedtls_msg_free(&mbedTLSMsg); + if (pclient != NULL) + os_free(pclient); + } + return ret; +} + +/****************************************************************************** + * FunctionName : espconn_ssl_server + * Description : as + * Parameters : + * Returns : +*******************************************************************************/ +sint8 espconn_ssl_server(struct espconn *espconn) +{ + int ret = ESPCONN_OK; + struct ip_addr ipaddr; + + const char *server_port = NULL; + espconn_msg *pserver = NULL; + pmbedtls_msg mbedTLSMsg = NULL; + if (lwIPThreadFlag == false) + mbedtls_threadinit(); + + if (plink_server != NULL) + return ESPCONN_INPROGRESS; + + lwIP_REQUIRE_ACTION(espconn, exit, ret = ESPCONN_ARG); + /*Creates a new server control message*/ + pserver = (espconn_msg *) os_zalloc( sizeof(espconn_msg)); + lwIP_REQUIRE_ACTION(espconn, exit, ret = ESPCONN_MEM); + mbedTLSMsg = mbedtls_msg_new(); + lwIP_REQUIRE_ACTION(mbedTLSMsg, exit, ret = ESPCONN_MEM); + + server_port = (const char *)sys_itoa(espconn->proto.tcp->local_port); + /*start the connection*/ + ret = mbedtls_net_bind(&mbedTLSMsg->listen_fd, NULL, server_port, MBEDTLS_NET_PROTO_TCP); + lwIP_REQUIRE_NOERROR_ACTION(ret, exit, ret = ESPCONN_MEM); + espconn->state = ESPCONN_LISTEN; + pserver->pespconn = NULL; + pserver->pssl = mbedTLSMsg; + pserver->preverse = espconn; + pserver->count_opt = MEMP_NUM_TCP_PCB; + pserver->pcommon.timeout = 0x0a; + espconn->state = ESPCONN_LISTEN; + plink_server = pserver; +exit: + if (ret != ESPCONN_OK) { + if (mbedTLSMsg != NULL) + mbedtls_msg_free(&mbedTLSMsg); + if (pserver != NULL) + os_free(pserver); + } + return ret; +} + +/****************************************************************************** + * FunctionName : espconn_ssl_delete + * Description : delete the server: delete a listening PCB and free it + * Parameters : pdeletecon -- the espconn used to delete a server + * Returns : none +*******************************************************************************/ +sint8 espconn_ssl_delete(struct espconn *pdeletecon) +{ + remot_info *pinfo = NULL; + espconn_msg *pdelete_msg = NULL; + pmbedtls_msg mbedTLSMsg = NULL; + + if (pdeletecon == NULL) + return ESPCONN_ARG; + + espconn_get_connection_info(pdeletecon, &pinfo, ESPCONN_SSL); + /*make sure all the active connection have been disconnect*/ + if (pdeletecon->link_cnt != 0) + return ESPCONN_INPROGRESS; + else { + pdelete_msg = plink_server; + if (pdelete_msg != NULL && pdelete_msg->preverse == pdeletecon) { + mbedTLSMsg = pdelete_msg->pssl; + espconn_kill_pcb(pdeletecon->proto.tcp->local_port); + mbedtls_net_free(&mbedTLSMsg->listen_fd); + mbedtls_msg_free(&mbedTLSMsg); + pdelete_msg->pssl = mbedTLSMsg; + os_free(pdelete_msg); + pdelete_msg = NULL; + plink_server = pdelete_msg; + mbedtls_parame_free(&def_private_key); + mbedtls_parame_free(&def_certificate); + return ESPCONN_OK; + } else { + return ESPCONN_ARG; + } + } +} + +/****************************************************************************** + * FunctionName : espconn_ssl_write + * Description : sent data for client or server + * Parameters : void *arg -- client or server to send + * uint8* psent -- Data to send + * uint16 length -- Length of data to send + * Returns : none +*******************************************************************************/ +void espconn_ssl_sent(void *arg, uint8 *psent, uint16 length) +{ + espconn_msg *Threadmsg = arg; + uint16 out_msglen = length; + int ret = ESPCONN_OK; + lwIP_ASSERT(Threadmsg); + lwIP_ASSERT(psent); + lwIP_ASSERT(length); + pmbedtls_msg mbedTLSMsg = Threadmsg->pssl; + lwIP_ASSERT(mbedTLSMsg); + + if (length > MBEDTLS_SSL_PLAIN_ADD){ + out_msglen = MBEDTLS_SSL_PLAIN_ADD; + } + + Threadmsg->pcommon.write_flag = true; + ret = mbedtls_ssl_write(&mbedTLSMsg->ssl, psent, out_msglen); + if (ret > 0){ + Threadmsg->pcommon.ptrbuf = psent + ret; + Threadmsg->pcommon.cntr = length - ret; + } else{ + if (ret == MBEDTLS_ERR_SSL_WANT_WRITE || ret == 0) { + + } else{ + mbedtls_fail_info(Threadmsg, ret); + ets_post(lwIPThreadPrio, NETCONN_EVENT_CLOSE,(uint32)Threadmsg); + } + } + +} + +/****************************************************************************** + * FunctionName : espconn_ssl_disconnect + * Description : A new incoming connection has been disconnected. + * Parameters : espconn -- the espconn used to disconnect with host + * Returns : none +*******************************************************************************/ +void espconn_ssl_disconnect(espconn_msg *Threadmsg) +{ + lwIP_ASSERT(Threadmsg); + pmbedtls_msg mbedTLSMsg = Threadmsg->pssl; + lwIP_ASSERT(mbedTLSMsg); + mbedtls_net_free(&mbedTLSMsg->fd); + Threadmsg->pespconn->state = ESPCONN_CLOSE; + ets_post(lwIPThreadPrio, NETCONN_EVENT_CLOSE, (uint32)Threadmsg); +} + +/* + * Checkup routine + */ +int mbedtls_x509_test(int verbose, char *ca_crt, size_t ca_crt_len, char *cli_crt, size_t cli_crt_len) +{ +#if defined(MBEDTLS_SHA1_C) + int ret; + uint32_t flags; + mbedtls_x509_crt cacert; + mbedtls_x509_crt clicert; + + if( verbose != 0 ) + os_printf( " X.509 certificate load: " ); + + mbedtls_x509_crt_init( &clicert ); + + ret = mbedtls_x509_crt_parse( &clicert, (const unsigned char *) cli_crt, + cli_crt_len ); + if( ret != 0 ) + { + if( verbose != 0 ) + os_printf( "failed\n" ); + + return( ret ); + } + + mbedtls_x509_crt_init( &cacert ); + + ret = mbedtls_x509_crt_parse( &cacert, (const unsigned char *) ca_crt, + ca_crt_len ); + if( ret != 0 ) + { + if( verbose != 0 ) + os_printf( "failed\n" ); + + return( ret ); + } + + if( verbose != 0 ) + os_printf( "passed\n X.509 signature verify: "); + + ret = mbedtls_x509_crt_verify( &clicert, &cacert, NULL, NULL, &flags, NULL, NULL ); + if( ret != 0 ) + { + if( verbose != 0 ) + os_printf( "failed\n" ); + + return( ret ); + } + + if( verbose != 0 ) + os_printf( "passed\n\n"); + + mbedtls_x509_crt_free( &cacert ); + mbedtls_x509_crt_free( &clicert ); + + return( 0 ); +#else + ((void) verbose); + return( 0 ); +#endif /* MBEDTLS_CERTS_C && MBEDTLS_SHA1_C */ +} + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/espconn_secure.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/espconn_secure.c new file mode 100644 index 0000000..1def89c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/espconn_secure.c @@ -0,0 +1,395 @@ +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "netif/etharp.h" +#include "lwip/tcp.h" +#include "lwip/ip.h" +#include "lwip/init.h" +#include "ets_sys.h" +#include "os_type.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +#if !defined(ESPCONN_MBEDTLS) + +#include "sys/espconn_mbedtls.h" + +ssl_opt ssl_option = { + {NULL, ESPCONN_SECURE_DEFAULT_SIZE, 0, false, 0, false}, + {NULL, ESPCONN_SECURE_DEFAULT_SIZE, 0, false, 0, false}, + 0 +}; + +unsigned int max_content_len = ESPCONN_SECURE_DEFAULT_SIZE; +/****************************************************************************** + * FunctionName : espconn_encry_connect + * Description : The function given as the connect + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_secure_connect(struct espconn *espconn) +{ + struct ip_addr ipaddr; + struct ip_info ipinfo; + uint8 connect_status = 0; + uint16 current_size = 0; + if (espconn == NULL || espconn ->type != ESPCONN_TCP) + return ESPCONN_ARG; + + if (wifi_get_opmode() == ESPCONN_STA){ + wifi_get_ip_info(STA_NETIF, &ipinfo); + if (ipinfo.ip.addr == 0) { + return ESPCONN_RTE; + } + } else if (wifi_get_opmode() == ESPCONN_AP) { + wifi_get_ip_info(AP_NETIF, &ipinfo); + if (ipinfo.ip.addr == 0) { + return ESPCONN_RTE; + } + } else if (wifi_get_opmode() == ESPCONN_AP_STA) { + IP4_ADDR(&ipaddr, espconn->proto.tcp->remote_ip[0], + espconn->proto.tcp->remote_ip[1], + espconn->proto.tcp->remote_ip[2], + espconn->proto.tcp->remote_ip[3]); + ipaddr.addr <<= 8; + wifi_get_ip_info(AP_NETIF, &ipinfo); + ipinfo.ip.addr <<= 8; + espconn_printf("softap_addr = %x, remote_addr = %x\n", ipinfo.ip.addr, ipaddr.addr); + + if (ipaddr.addr != ipinfo.ip.addr) { + connect_status = wifi_station_get_connect_status(); + if (connect_status == STATION_GOT_IP) { + wifi_get_ip_info(STA_NETIF, &ipinfo); + if (ipinfo.ip.addr == 0) + return ESPCONN_RTE; + } else if (connect_status == STATION_IDLE) { + return ESPCONN_RTE; + } else { + return connect_status; + } + } + } + current_size = espconn_secure_get_size(ESPCONN_CLIENT); + current_size += ESPCONN_SECURE_DEFAULT_HEAP; +// ssl_printf("heap_size %d %d\n", system_get_free_heap_size(), current_size); + if (system_get_free_heap_size() <= current_size) + return ESPCONN_MEM; + + return espconn_ssl_client(espconn); +} + +/****************************************************************************** + * FunctionName : espconn_encry_disconnect + * Description : The function given as the disconnect + * Parameters : espconn -- the espconn used to listen the connection + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_secure_disconnect(struct espconn *espconn) +{ + espconn_msg *pnode = NULL; + bool value = false; + if (espconn == NULL) + return ESPCONN_ARG; + + value = espconn_find_connection(espconn, &pnode); + if (value){ + if (pnode->pespconn->state == ESPCONN_CLOSE) + return ESPCONN_INPROGRESS; + + espconn_ssl_disconnect(pnode); + return ESPCONN_OK; + } + else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_encry_sent + * Description : sent data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR +espconn_secure_sent(struct espconn *espconn, uint8 *psent, uint16 length) +{ + espconn_msg *pnode = NULL; + bool value = false; + if (espconn == NULL) + return ESPCONN_ARG; + + espconn ->state = ESPCONN_WRITE; + value = espconn_find_connection(espconn, &pnode); + if (value){ + pmbedtls_msg pssl = NULL; + pssl = pnode->pssl; + if (pssl->SentFnFlag){ + pssl->SentFnFlag = false; + espconn_ssl_sent(pnode, psent, length); + return ESPCONN_OK; + }else + return ESPCONN_INPROGRESS; + } + else + return ESPCONN_ARG; +} + +/****************************************************************************** + * FunctionName : espconn_secure_send + * Description : send data for client or server + * Parameters : espconn -- espconn to set for client or server + * psent -- data to send + * length -- length of data to send + * Returns : none +*******************************************************************************/ + +sint8 espconn_secure_send(struct espconn *espconn, uint8 *psent, uint16 length) __attribute__((alias("espconn_secure_sent"))); + +sint8 ICACHE_FLASH_ATTR +espconn_secure_accept(struct espconn *espconn) +{ + if (espconn == NULL || espconn ->type != ESPCONN_TCP) + return ESPCONN_ARG; + + return espconn_ssl_server(espconn); +} + +/****************************************************************************** + * FunctionName : espconn_secure_set_size + * Description : set the buffer size for client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * size -- buffer size + * Returns : true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_secure_set_size(uint8 level, uint16 size) +{ + if (level >= ESPCONN_MAX || level <= ESPCONN_IDLE) + return false; + + if (size > ESPCONN_SECURE_MAX_SIZE || size < ESPCONN_SECURE_DEFAULT_SIZE) + return false; + + max_content_len = size; + return true; +} + +/****************************************************************************** + * FunctionName : espconn_secure_get_size + * Description : get buffer size for client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : buffer size for client or server +*******************************************************************************/ +sint16 ICACHE_FLASH_ATTR espconn_secure_get_size(uint8 level) +{ + if (level >= ESPCONN_MAX || level <= ESPCONN_IDLE) + return ESPCONN_ARG; + + return max_content_len; +} + +/****************************************************************************** + * FunctionName : espconn_secure_ca_enable + * Description : enable the certificate authenticate and set the flash sector + * as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * flash_sector -- flash sector for save certificate + * Returns : result true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_secure_ca_enable(uint8 level, uint32 flash_sector ) +{ + if (level >= ESPCONN_MAX || level <= ESPCONN_IDLE || flash_sector <= 0) + return false; + + if (level == ESPCONN_CLIENT){ + ssl_option.client.cert_ca_sector.sector = flash_sector; + ssl_option.client.cert_ca_sector.flag = true; + } + + if (level == ESPCONN_SERVER){ + ssl_option.server.cert_ca_sector.sector = flash_sector; + ssl_option.server.cert_ca_sector.flag = true; + } + + if (level == ESPCONN_BOTH) { + ssl_option.client.cert_ca_sector.sector = flash_sector; + ssl_option.server.cert_ca_sector.sector = flash_sector; + ssl_option.client.cert_ca_sector.flag = true; + ssl_option.server.cert_ca_sector.flag = true; + } + return true; +} + +/****************************************************************************** + * FunctionName : espconn_secure_ca_disable + * Description : disable the certificate authenticate as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : result true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_secure_ca_disable(uint8 level) +{ + if (level >= ESPCONN_MAX || level <= ESPCONN_IDLE) + return false; + + if (level == ESPCONN_CLIENT) + ssl_option.client.cert_ca_sector.flag = false; + + if (level == ESPCONN_SERVER) + ssl_option.server.cert_ca_sector.flag = false; + + if (level == ESPCONN_BOTH) { + ssl_option.client.cert_ca_sector.flag = false; + ssl_option.server.cert_ca_sector.flag = false; + } + + return true; +} + +/****************************************************************************** + * FunctionName : espconn_secure_cert_req_enable + * Description : enable the client certificate authenticate and set the flash sector + * as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * flash_sector -- flash sector for save certificate + * Returns : result true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_secure_cert_req_enable(uint8 level, uint32 flash_sector ) +{ + if (level >= ESPCONN_MAX || level <= ESPCONN_IDLE || flash_sector <= 0) + return false; + + if (level == ESPCONN_CLIENT){ + ssl_option.client.cert_req_sector.sector = flash_sector; + ssl_option.client.cert_req_sector.flag = true; + } + + if (level == ESPCONN_SERVER){ + ssl_option.server.cert_req_sector.sector = flash_sector; + ssl_option.server.cert_req_sector.flag = true; + } + + if (level == ESPCONN_BOTH) { + ssl_option.client.cert_req_sector.sector = flash_sector; + ssl_option.server.cert_req_sector.sector = flash_sector; + ssl_option.client.cert_req_sector.flag = true; + ssl_option.server.cert_req_sector.flag = true; + } + return true; +} + +/****************************************************************************** + * FunctionName : espconn_secure_ca_disable + * Description : disable the client certificate authenticate as client or server + * Parameters : level -- set for client or server + * 1: client,2:server,3:client and server + * Returns : result true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_secure_cert_req_disable(uint8 level) +{ + if (level >= ESPCONN_MAX || level <= ESPCONN_IDLE) + return false; + + if (level == ESPCONN_CLIENT) + ssl_option.client.cert_req_sector.flag = false; + + if (level == ESPCONN_SERVER) + ssl_option.server.cert_req_sector.flag = false; + + if (level == ESPCONN_BOTH) { + ssl_option.client.cert_req_sector.flag = false; + ssl_option.server.cert_req_sector.flag = false; + } + + return true; +} + +/****************************************************************************** + * FunctionName : espconn_secure_set_default_certificate + * Description : Load the certificates in memory depending on compile-time + * and user options. + * Parameters : certificate -- Load the certificate + * length -- Load the certificate length + * Returns : result true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_secure_set_default_certificate(const uint8* certificate, uint16 length) +{ + if (certificate == NULL || length > ESPCONN_SECURE_MAX_SIZE) + return false; + + return mbedtls_load_default_obj(0, ESPCONN_CERT_OWN, certificate, length); +} + +/****************************************************************************** + * FunctionName : espconn_secure_set_default_private_key + * Description : Load the key in memory depending on compile-time + * and user options. + * Parameters : private_key -- Load the key + * length -- Load the key length + * Returns : result true or false +*******************************************************************************/ +bool ICACHE_FLASH_ATTR espconn_secure_set_default_private_key(const uint8* private_key, uint16 length) +{ + if (private_key == NULL || length > ESPCONN_SECURE_MAX_SIZE) + return false; + + return mbedtls_load_default_obj(0, ESPCONN_PK, private_key, length); +} + +/****************************************************************************** + * FunctionName : espconn_secure_delete + * Description : delete the secure server host + * Parameters : espconn -- espconn to set for client or server + * Returns : result +*******************************************************************************/ +sint8 ICACHE_FLASH_ATTR espconn_secure_delete(struct espconn *espconn) +{ + sint8 error = ESPCONN_OK; + error = espconn_ssl_delete(espconn); + + return error; +} + +bool espconn_secure_obj_load(int obj_type, uint32 flash_sector, uint16 length) +{ + if (length > ESPCONN_SECURE_MAX_SIZE || length == 0) + return false; + + if (obj_type != ESPCONN_PK && obj_type != ESPCONN_CERT_OWN) + return false; + + return mbedtls_load_default_obj(flash_sector, obj_type, NULL, length); +} + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/lwIPFile.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/lwIPFile.c new file mode 100644 index 0000000..bdae8fd --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/lwIPFile.c @@ -0,0 +1,123 @@ +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "c_types.h" + +#include +//#include "os.h" +#include + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +int ICACHE_FLASH_ATTR __attribute__((weak)) +_open_r(struct _reent *r, const char *filename, int flags, int mode) +{ + return 0; +} + +_ssize_t ICACHE_FLASH_ATTR __attribute__((weak)) +_read_r(struct _reent *r, int fd, void *buf, size_t cnt) +{ + return -1; +} + +_ssize_t ICACHE_FLASH_ATTR __attribute__((weak)) +_write_r(struct _reent *r, int fd, void *buf, size_t cnt) +{ + return -1; +} + +_off_t ICACHE_FLASH_ATTR __attribute__((weak)) +_lseek_r(struct _reent *r, int fd, _off_t pos, int whence) +{ + return -1; +} + +int ICACHE_FLASH_ATTR __attribute__((weak)) +_close_r(struct _reent *r, int fd) +{ + return -1; +} + +int ICACHE_FLASH_ATTR __attribute__((weak)) +_rename_r(struct _reent *r, const char *from, const char *to) +{ + return 0; +} + +int ICACHE_FLASH_ATTR __attribute__((weak)) +_unlink_r(struct _reent *r, const char *filename) +{ + return 0; +} + +int ICACHE_FLASH_ATTR __attribute__((weak)) +_fstat_r(struct _reent *r, int fd, struct stat *s) +{ + return 0; +} + +void *ICACHE_FLASH_ATTR __attribute__((weak)) +_sbrk_r(void *ptr, int incr) +{ + return 0; +} + +char *sys_reverse(char *s) +{ + char temp = 0; + char *p = s; + char *q = s; + while(*q) + ++q; + q--; + while(q > p){ + temp = *p; + *p++ = *q; + *q-- = temp; + } + return s; +} + +char *sys_itoa(int n) +{ + int i = 0, Negative = 0; + static char s[32]; + Negative = n; + if (Negative < 0){ + n = -n; + } + do { + s[i++] = n%10 + '0'; + n = n / 10; + }while(n > 0); + + if (Negative < 0){ + s[i++] = '-'; + } + s[i] = '\0'; + return sys_reverse(s); +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/lwIPSocket.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/lwIPSocket.c new file mode 100644 index 0000000..2f9db18 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/app/lwIPSocket.c @@ -0,0 +1,1032 @@ + +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "netif/etharp.h" +#include "lwip/tcp.h" +#include "lwip/ip.h" +#include "lwip/init.h" +#include "lwip/tcp_impl.h" +#include "lwip/memp.h" + +#include "ets_sys.h" +#include "os_type.h" + +#include "lwip/mem.h" +#include "sys/socket.h" + +#ifdef MEMLEAK_DEBUG +static const char mem_debug_file[] ICACHE_RODATA_ATTR = __FILE__; +#endif + +extern int isdigit(int c); +/** The global array of available sockets */ +static lwIP_sock sockets[NUM_SOCKETS]; + +/** Table to quickly map an lwIP error (err_t) to a socket error + * by using -err as an index */ +static const int err_to_errno_table[] = +{ + 0, /* ERR_OK 0 No error, everything OK. */ +// ENOMEM, /* ERR_MEM -1 Out of memory error. */ +// ENOBUFS, /* ERR_BUF -2 Buffer error. */ +// EWOULDBLOCK, /* ERR_TIMEOUT -3 Timeout */ +// EHOSTUNREACH, /* ERR_RTE -4 Routing problem. */ +// EINPROGRESS, /* ERR_INPROGRESS -5 Operation in progress */ +// EINVAL, /* ERR_VAL -6 Illegal value. */ +// EWOULDBLOCK, /* ERR_WOULDBLOCK -7 Operation would block. */ +// ECONNABORTED, /* ERR_ABRT -8 Connection aborted. */ +// ECONNRESET, /* ERR_RST -9 Connection reset. */ +// ESHUTDOWN, /* ERR_CLSD -10 Connection closed. */ +// ENOTCONN, /* ERR_CONN -11 Not connected. */ +// EIO, /* ERR_ARG -12 Illegal argument. */ +// EADDRINUSE, /* ERR_USE -13 Address in use. */ + -1, /* ERR_IF -14 Low-level netif error */ + -1, /* ERR_ISCONN -15 Already connected. */ +}; + +#define ERR_TO_ERRNO_TABLE_SIZE \ + (sizeof(err_to_errno_table)/sizeof(err_to_errno_table[0])) + +#define err_to_errno(err) \ + ((unsigned)(-(err)) < ERR_TO_ERRNO_TABLE_SIZE ? \ + err_to_errno_table[-(err)] : EIO) + +#ifdef ERRNO +#ifndef set_errno +#define set_errno(err) errno = (err) +#endif +#else /* ERRNO */ +#define set_errno(err) +#endif /* ERRNO */ + +#define sock_set_errno(sk, e) do { \ + sk->err = (e); \ + set_errno(sk->err); \ +} while (0) + +static lwIP_sock *get_socket(int s); + +static int find_socket(lwIP_netconn *newconn) +{ + int i = 0; + lwIP_ASSERT(newconn); + for (i = 0; i < NUM_SOCKETS; ++i) + { + if (sockets[i].conn && sockets[i].conn == newconn) + return i; + } + return -1; +} + +static void remove_tcp(lwIP_netconn *conn) +{ + struct tcp_pcb *pcb = NULL; + sint8 ret = ERR_OK; + lwIP_REQUIRE_ACTION(conn, exit, ret = ERR_ARG); + lwIP_REQUIRE_ACTION(conn->tcp, exit, ret = ERR_ARG); + pcb = conn->tcp; + tcp_arg(pcb, NULL); + tcp_recv(pcb, NULL); + tcp_sent(pcb, NULL); + tcp_poll(pcb, NULL, 0); + tcp_err(pcb, NULL); +exit: + return; +} + +static void free_netconn(lwIP_netconn *netconn) +{ + lwIP_ASSERT(netconn); + if (netconn->readbuf) + { + ringbuf_free(&netconn->readbuf); + } + + os_free(netconn); + netconn = NULL; +} + +static lwIP_netconn * +netconn_alloc(netconn_type type, void *arg) +{ + sint8 ret = ERR_OK; + lwIP_netconn *netconn = NULL; + struct tcp_pcb *pcb = arg; + lwIP_REQUIRE_ACTION(pcb, exit, ret = ERR_ARG); + netconn = (lwIP_netconn *)os_zalloc(sizeof(lwIP_netconn)); + lwIP_REQUIRE_ACTION(netconn, exit, ret = ERR_MEM); + netconn->readbuf = ringbuf_new(TCP_SND_BUF); + lwIP_REQUIRE_ACTION(netconn->readbuf, exit, ret = ERR_MEM); + system_overclock(); + netconn->socket = -1; +exit: + if (ret != ERR_OK) + { + free_netconn(netconn); + } + return netconn; +} + +static err_t netconn_getaddr(lwIP_netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local) +{ + sint8 ret = ERR_OK; + lwIP_REQUIRE_ACTION(conn, exit, ret = ERR_ARG); + lwIP_REQUIRE_ACTION(addr, exit, ret = ERR_ARG); + lwIP_REQUIRE_ACTION(port, exit, ret = ERR_ARG); + lwIP_REQUIRE_ACTION(conn->tcp, exit, ret = ERR_ARG); + *port = local==1 ? conn->tcp->local_port : conn->tcp->remote_port; + *addr = local==1 ? conn->tcp->local_ip : conn->tcp->remote_ip; +exit: + return ret; +} + +/** Free a socket. The socket's netconn must have been + * delete before! + * + * @param sock the socket to free + * @param is_tcp != 0 for TCP sockets, used to free lastdata + */ +static void free_socket(lwIP_sock *sock) +{ + void *lastdata = NULL; + sock->conn = NULL; + sock->recv_data_len = 0; + sock->recv_index = 0; + sock->send_buffer = NULL; + sock->send_index = 0; +} + +static err_t recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + lwIP_netconn *newconn = arg; + err = ESP_OK; + lwIP_REQUIRE_ACTION(newconn, exit, err = ESP_ARG); + + if (p!= NULL) + { + struct pbuf *pthis = NULL; + + if (newconn->readbuf != NULL) + { + for (pthis = p; pthis != NULL; pthis = pthis->next) + { + newconn->state = NETCONN_STATE_READ; + ringbuf_memcpy_into(newconn->readbuf, pthis->payload, pthis->len); + tcp_recved(newconn->tcp, pthis->len); + newconn->state = NETCONN_STATE_ESTABLISHED; + lwIP_EVENT_PARSE(find_socket(newconn), ERR_OK); + } + pbuf_free(p); + } + else + { + tcp_recved(newconn->tcp, p->tot_len); + pbuf_free(p); + err = ERR_MEM; + } + } + else + { + lwIP_EVENT_PARSE(find_socket(newconn), NETCONN_EVENT_CLOSE); + } +exit: + return err; +} + +static err_t poll_tcp(void *arg, struct tcp_pcb *pcb) +{ + lwIP_netconn *conn = arg; + lwIP_ASSERT(conn); + + return ERR_OK; +} + +static err_t sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len) +{ + lwIP_netconn *conn = arg; + lwIP_ASSERT(conn); + conn->state = NETCONN_STATE_ESTABLISHED; + lwIP_EVENT_THREAD(find_socket(conn), NETCONN_EVENT_SEND, len); + return ERR_OK; +} + +static void err_tcp(void *arg, err_t err) +{ + lwIP_netconn *conn = arg; + lwIP_ASSERT(conn); + conn->state = NETCONN_STATE_ERROR; + ESP_LOG("%s %d %p\n",__FILE__, __LINE__, conn->tcp); + switch (conn->tcp->state) + { + case SYN_SENT: + if (conn->tcp->nrtx == TCP_SYNMAXRTX) + { + err = ERR_CONN; + } + break; + case ESTABLISHED: + if (conn->tcp->nrtx == TCP_MAXRTX) + { + err = ERR_TIMEOUT; + } + break; + default: + break; + } + + lwIP_EVENT_PARSE(find_socket(conn), err); + return; +} + +/** + * TCP callback function if a connection (opened by tcp_connect/do_connect) has + * been established (or reset by the remote host). + * + * @see tcp.h (struct tcp_pcb.connected) for parameters and return values + */ +static err_t do_connected(void *arg, struct tcp_pcb *pcb, err_t err) +{ + lwIP_netconn *conn = arg; + err = ERR_OK; + lwIP_REQUIRE_ACTION(conn, exit, err = ESP_ARG); + conn->state = NETCONN_STATE_ESTABLISHED; + conn->readbuf = ringbuf_new(TCP_SND_BUF); + lwIP_REQUIRE_ACTION(conn->readbuf, exit, err = ESP_MEM); + lwIP_EVENT_PARSE(find_socket(conn), ERR_OK); +exit: + return err; +} + +static void setup_tcp(lwIP_netconn *conn) +{ + struct tcp_pcb *pcb = NULL; + sint8 ret = ERR_OK; + lwIP_REQUIRE_ACTION(conn, exit, ret = ERR_ARG); + lwIP_REQUIRE_ACTION(conn->tcp, exit, ret = ERR_ARG); + + pcb = conn->tcp; + tcp_arg(pcb, conn); + tcp_recv(pcb, recv_tcp); + tcp_sent(pcb, sent_tcp); + tcp_poll(pcb, poll_tcp, 4); + tcp_err(pcb, err_tcp); +exit: + return; +} + +static err_t do_accepted(void *arg, struct tcp_pcb *newpcb, err_t err) +{ + lwIP_netconn *newconn = NULL; + lwIP_netconn *conn = arg; + err = ERR_OK; + + //Avoid two TCP connections coming in simultaneously + struct tcp_pcb *pactive_pcb; + int active_pcb_num=0; + for(pactive_pcb = tcp_active_pcbs; pactive_pcb != NULL; pactive_pcb = pactive_pcb->next){ + if (pactive_pcb->state == ESTABLISHED ||pactive_pcb->state == SYN_RCVD){ + active_pcb_num++; + if (active_pcb_num > MEMP_NUM_TCP_PCB){ + ESP_LOG("%s %d active_pcb_number:%d\n",__FILE__, __LINE__,active_pcb_num); + return ERR_MEM; + } + } + } + + lwIP_REQUIRE_ACTION(conn, exit, err = ESP_ARG); + /* We have to set the callback here even though + * the new socket is unknown. conn->socket is marked as -1. */ + newconn = netconn_alloc(conn->type, newpcb); + lwIP_REQUIRE_ACTION(conn, exit, err = ERR_MEM); + newconn->tcp = newpcb; + setup_tcp(newconn); + newconn->state = NETCONN_STATE_ESTABLISHED; + conn->acceptmbox = newconn; + lwIP_EVENT_PARSE(find_socket(conn), ERR_OK); +exit: + return err; +} + +sint8 netconn_delete(lwIP_netconn *conn) +{ + sint8 error = ESP_OK; + lwIP_REQUIRE_ACTION(conn, exit, error = ESP_ARG); + tcp_recv(conn->tcp, NULL); + error = tcp_close(conn->tcp); + + if (error != ERR_OK) + { + /* closing failed, try again later */ + tcp_recv(conn->tcp, recv_tcp); + } + else + { + /* closing succeeded */ + remove_tcp(conn); + } + free_netconn(conn); +exit: + return error; +} + +sint8 netconn_bind(lwIP_netconn *conn, ip_addr_t *addr, u16_t port) +{ + sint8 error = ESP_OK; + lwIP_REQUIRE_ACTION(conn, exit, error = ESP_ARG); + lwIP_REQUIRE_ACTION(addr, exit, error = ESP_ARG); + lwIP_REQUIRE_ACTION(conn->tcp, exit, error = ESP_ARG); + + error = tcp_bind(conn->tcp, addr, port); +exit: + return error; +} + +sint8 netconn_connect(lwIP_netconn *conn, ip_addr_t *addr, u16_t port) +{ + sint8 error = ESP_OK; + lwIP_REQUIRE_ACTION(conn, exit, error = ESP_ARG); + lwIP_REQUIRE_ACTION(addr, exit, error = ESP_ARG); + lwIP_REQUIRE_ACTION(conn->tcp, exit, error = ESP_ARG); + + setup_tcp(conn); + error = tcp_connect(conn->tcp, addr, port, do_connected); +exit: + return error; +} + +err_t netconn_accept(lwIP_netconn *conn, lwIP_netconn **new_conn) +{ + err_t error = ESP_OK; + lwIP_netconn *newconn = NULL; + lwIP_REQUIRE_ACTION(conn, exit, error = ESP_ARG); + lwIP_REQUIRE_ACTION(new_conn, exit, error = ESP_ARG); + *new_conn = NULL; + newconn = (lwIP_netconn *)conn->acceptmbox; + conn->acceptmbox = NULL; + lwIP_REQUIRE_ACTION(newconn, exit, error = ERR_CLSD); + *new_conn = newconn; +exit: + return error; +} + +sint8 netconn_listen(lwIP_netconn *conn) +{ + sint8 error = ESP_OK; + struct tcp_pcb *lpcb = NULL; + + lwIP_REQUIRE_ACTION(conn, exit, error = ESP_ARG); + lwIP_REQUIRE_ACTION(conn->tcp, exit, error = ESP_ARG); + + setup_tcp(conn); + lpcb = conn->tcp; + conn->tcp = tcp_listen(conn->tcp); + if (conn->tcp != NULL) + { + tcp_accept(conn->tcp, do_accepted); + } + else + { + conn->tcp = lpcb; + } +exit: + return error; +} + +static int alloc_socket(lwIP_netconn *newconn, int accepted) +{ + int i = 0; + lwIP_ASSERT(newconn); + /* allocate a new socket identifier */ + for (i = 0; i < NUM_SOCKETS; ++i) + { + /* Protect socket array */ + if (!sockets[i].conn) + { + sockets[i].conn = newconn; + return i; + } + } + return -1; +} + +static lwIP_sock *get_socket(int s) +{ + lwIP_sock *sock = NULL; + + if ((s < 0) || (s >= NUM_SOCKETS)) + { + return NULL; + } + + sock = &sockets[s]; + + if (!sock->conn) + { + return NULL; + } + + return sock; +} + +int lwip_socket(int domain, int type, int protocol) +{ + lwIP_netconn *conn = NULL; + int i = 0; + switch (type) + { + case SOCK_STREAM: + conn = (lwIP_netconn *)os_zalloc(sizeof(lwIP_netconn)); + lwIP_REQUIRE_ACTION(conn, exit, i = ESP_MEM); + conn->tcp = tcp_new(); + lwIP_REQUIRE_ACTION(conn->tcp, exit, i = ESP_MEM); + conn->socket = -1; + break; + default: + return -1; + } + + i = alloc_socket(conn, 0); + if (i == -1) + { + goto exit; + } + conn->socket = i; +exit: + if (i == -1) + { + if (conn->tcp) + memp_free(MEMP_TCP_PCB,conn->tcp); + if (conn) + os_free(conn); + } + return i; +} + +int lwip_bind(int s, const struct sockaddr *name, socklen_t namelen) +{ + lwIP_sock *sock = NULL; + ip_addr_t local_addr; + uint16 local_port = 0; + sint8 err = ERR_OK; + const struct sockaddr_in *name_in = NULL; + + sock = get_socket(s); + if (!sock) + { + return -1; + } + + /* check size, familiy and alignment of 'name' */ + LWIP_ERROR("lwip_bind: invalid address", + ((namelen == sizeof(struct sockaddr_in)) && ((name->sa_family) == AF_INET) && ((((mem_ptr_t)name) % 4) == 0)), + return -1;); + name_in = (const struct sockaddr_in *) (void*) name; + + inet_addr_to_ipaddr(&local_addr, &name_in->sin_addr); + local_port = name_in->sin_port; + + err = netconn_bind(sock->conn, &local_addr, ntohs(local_port)); + + if (err != ESP_OK) + { + ESP_LOG("%s %d, err=%d\n", __FILE__, __LINE__, err); + return -1; + } + ESP_LOG("%s %d, %d succeeded\n", __FILE__, __LINE__, s); + return ERR_OK; +} + +int lwip_connect(int s, const struct sockaddr *name, socklen_t namelen) +{ + lwIP_sock *sock = NULL; + err_t err = ERR_OK; + ip_addr_t remote_addr; + u16_t remote_port = 0; + const struct sockaddr_in *name_in = NULL; + + sock = get_socket(s); + if (!sock) + { + return -1; + } + + /* check size, familiy and alignment of 'name' */ + LWIP_ERROR("lwip_connect: invalid address", + ((namelen == sizeof(struct sockaddr_in)) && ((name->sa_family) == AF_INET) && ((((mem_ptr_t)name) % 4) == 0)), + return -1;); + name_in = (const struct sockaddr_in *) (void*) name; + + inet_addr_to_ipaddr(&remote_addr, &name_in->sin_addr); + remote_port = name_in->sin_port; + + err = netconn_connect(sock->conn, &remote_addr, ntohs(remote_port)); + if (err != ERR_OK) + { + ESP_LOG("lwip_connect(%d) failed, err=%d\n", s, err); + return -1; + } + + ESP_LOG("lwip_connect(%d) succeeded\n", s); + return ERR_OK; +} + +int lwip_fcntl(int s, int cmd, int val) +{ + lwIP_sock *sock = get_socket(s); + int ret = -1; + + if (!sock || !sock->conn) + { + return -1; + } + + switch (cmd) + { + case F_GETFL: + ret = netconn_is_nonblocking(sock->conn) ? O_NONBLOCK : 0; + break; + case F_SETFL: + if ((val & ~O_NONBLOCK) == 0) + { + /* only O_NONBLOCK, all other bits are zero */ + netconn_set_nonblocking(sock->conn, val & O_NONBLOCK); + ret = 0; + } + break; + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_fcntl(%d, UNIMPL: %d, %d)\n", s, cmd, val)); + break; + } + return ret; +} + +uint32_t lwip_getul(char *str) +{ + uint32 ret = 0; + + while (isdigit(*str)) + { + ret = ret * 10 + *str++ - '0'; + } + + return ret; +} + +int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen) +{ + lwIP_sock *sock = NULL; + err_t err = ERR_OK; + lwIP_netconn *newconn = NULL; + int newsock = -1; + sock = get_socket(s); + if (!sock) + { + return -1; + } + + /* wait for a new connection */ + err = netconn_accept(sock->conn, &newconn); + lwIP_REQUIRE_NOERROR(err, exit); + newsock = alloc_socket(newconn, 0); + if (newsock == -1) + { + goto exit; + } + newconn->socket = newsock; +exit: + if (newsock == -1) + { + netconn_delete(newconn); + } + return newsock; +} + +int lwip_listen(int s, int backlog) +{ + lwIP_sock *sock = NULL; + err_t err = ERR_OK; + sock = get_socket(s); + if (!sock) + { + return -1; + } + err = netconn_listen(sock->conn); + if (err != ERR_OK) + { + ESP_LOG("lwip_connect(%d) failed, err=%d\n", s, err); + return -1; + } + + ESP_LOG("lwip_connect(%d) succeeded\n", s); + + return ERR_OK; +} + +int lwip_recvfrom(int s, void *mem, size_t len, int flags, struct sockaddr *from, socklen_t *fromlen) +{ + lwIP_sock *sock = NULL; + size_t bytes_used = 0; + int is_tcp = 0; + lwIP_ASSERT(mem); + + sock = get_socket(s); + if (!sock) + { + return -1; + } + + if (sock->conn != NULL) + { + if (sock->conn->state == NETCONN_STATE_ESTABLISHED) + { + bytes_used = ringbuf_bytes_used(sock->conn->readbuf); + if (bytes_used != 0) + { + if (len > bytes_used) + { + len = bytes_used; + } + ringbuf_memcpy_from(mem, sock->conn->readbuf, len); + return len; + } + else + { + return 0; + } + } + else + { + return 0; + } + } + else + { + return -1; + } +} + +int lwip_read(int s, void *mem, size_t len) +{ + return lwip_recvfrom(s, mem, len, 0, NULL, NULL); +} + +int lwip_recv(int s, void *mem, size_t len, int flags) +{ + return lwip_recvfrom(s, mem, len, flags, NULL, NULL); +} + +int lwip_send(int s, const void *data, size_t size, int flags) +{ + lwIP_sock *sock = NULL; + size_t bytes_used = 0; + err_t Err = ERR_OK; + + lwIP_ASSERT(data); + sock = get_socket(s); + if (!sock) + { + return -1; + } + + if (tcp_sndbuf(sock->conn->tcp) < size) + { + bytes_used = tcp_sndbuf(sock->conn->tcp); + } else{ + bytes_used = size; + } + + if (bytes_used > 2 * sock->conn->tcp->mss) + { + bytes_used = 2 * sock->conn->tcp->mss; + } + + do + { + Err = tcp_write(sock->conn->tcp, data, bytes_used, 1); + if (Err == ERR_MEM) + size /= 2; + } + while (Err == ERR_MEM && size > 1); + + if (Err == ERR_OK) + { + Err = tcp_output(sock->conn->tcp); + } else{ + size = Err; + } + + return size; +} + +int lwip_close(int s) +{ + lwIP_sock *sock = NULL; + int err = 0; + + sock = get_socket(s); + if (!sock) + { + return -1; + } + /*Do not set callback function when tcp->state is LISTEN. + Avoid memory overlap when conn->tcp changes from + struct tcp_bcb to struct tcp_pcb_listen after lwip_listen.*/ + if (sock->conn->tcp->state != LISTEN) + { + if (sock->conn->state != NETCONN_STATE_ERROR){ + tcp_recv(sock->conn->tcp, NULL); + err = tcp_close(sock->conn->tcp); + + if (err != ERR_OK) + { + /* closing failed, try again later */ + tcp_recv(sock->conn->tcp, recv_tcp); + return -1; + } + } + /* closing succeeded */ + remove_tcp(sock->conn); + } else { + tcp_close(sock->conn->tcp); + } + free_netconn(sock->conn); + free_socket(sock); + return ERR_OK; +} + +int lwip_write(int s, const void *data, size_t size) +{ + lwIP_sock *sock = NULL; + int is_tcp = 0; + size_t bytes_free = 0; + + sock = get_socket(s); + if (!sock) + { + return -1; + } + + if (sock->conn != NULL) + { + switch (sock->conn->state) + { + case NETCONN_STATE_ESTABLISHED: + return lwip_send(s, data, size, 0); + default: + return -1; + } + } + else + { + return -1; + } +} + +static int +lwip_getaddrname(int s, struct sockaddr *name, socklen_t *namelen, u8_t local) +{ + lwIP_sock *sock = NULL; + struct sockaddr_in sin; + ip_addr_t naddr; + lwIP_ASSERT(name); + lwIP_ASSERT(namelen); + + sock = get_socket(s); + if (!sock) + { + return -1; + } + + os_memset(&sin, 0, sizeof(sin)); + sin.sin_len = sizeof(sin); + sin.sin_family = AF_INET; + + /* get the IP address and port */ + netconn_getaddr(sock->conn, &naddr, &sin.sin_port, local); + sin.sin_port = htons(sin.sin_port); + inet_addr_from_ipaddr(&sin.sin_addr, &naddr); + + if (*namelen > sizeof(sin)) + { + *namelen = sizeof(sin); + } + + MEMCPY(name, &sin, *namelen); + + return 0; +} + +int lwip_getpeername(int s, struct sockaddr *name, socklen_t *namelen) +{ + return lwip_getaddrname(s, name, namelen, 0); +} + +int lwip_getsockname(int s, struct sockaddr *name, socklen_t *namelen) +{ + return lwip_getaddrname(s, name, namelen, 1); +} + +int lwip_getsockopt(int s, int level, int optname, void *optval, socklen_t *optlen) +{ + lwIP_sock *sock = NULL; + err_t err = ERR_OK; + + lwIP_REQUIRE_ACTION(optval, exit, err = ESP_ARG); + lwIP_REQUIRE_ACTION(optlen, exit, err = ESP_ARG); + + sock = get_socket(s); + lwIP_REQUIRE_ACTION(sock, exit, err = ESP_MEM); + switch (level) + { + /* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) + { + /* The option flags */ + case SO_ACCEPTCONN: + case SO_BROADCAST: + case SO_KEEPALIVE: +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + *(int*)optval = sock->conn->tcp->so_options & optname; + break; + case SO_TYPE: + switch (NETCONNTYPE_GROUP(sock->conn->type)) + { + case NETCONN_TCP: + *(int*)optval = SOCK_STREAM; + break; + case NETCONN_UDP: + *(int*)optval = SOCK_DGRAM; + break; + default: + *(int*)optval = sock->conn->type; + break; + } + break; + break; + } + break; + /* Level: IPPROTO_IP */ + case IPPROTO_IP: + break; +#if LWIP_TCP + /* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + if (*optlen < sizeof(int)) + { + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + } + + /* If this is no TCP socket, ignore any options. */ + if (sock->conn->type != NETCONN_TCP) + { + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + } + + switch (optname) + { + case TCP_NODELAY: + case TCP_KEEPALIVE: + *(int*)optval = (int)sock->conn->tcp->keep_idle; + break; +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + *(int*)optval = (int)(sock->conn->tcp->keep_idle/1000); + break; + case TCP_KEEPINTVL: + *(int*)optval = (int)(sock->conn->tcp->keep_intvl/1000); + break; + case TCP_KEEPCNT: + *(int*)optval = (int)sock->conn->tcp->keep_cnt; +#endif /* LWIP_TCP_KEEPALIVE */ + break; + + default: + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + break; + } /* switch (optname) */ + break; +#endif /* LWIP_TCP */ + default: + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + break; + } + +exit: + return err; +} + +int lwip_setsockopt(int s, int level, int optname, const void *optval, socklen_t optlen) +{ + lwIP_sock *sock = NULL; + err_t err = ERR_OK; + lwIP_REQUIRE_ACTION(optval, exit, err = ESP_ARG); + + sock = get_socket(s); + lwIP_REQUIRE_ACTION(sock, exit, err = ESP_MEM); + lwIP_REQUIRE_ACTION(sock->conn, exit, err = ESP_MEM); + lwIP_REQUIRE_ACTION(sock->conn->tcp, exit, err = ESP_MEM); + switch (level) + { + /* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) + { + case SO_KEEPALIVE: + if (optlen < sizeof(int)) + { + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + } + if (*(int*)optval) + { + sock->conn->tcp->so_options |= optname; + } + else + { + sock->conn->tcp->so_options &= ~optname; + } + break; + } + break; + /* Level: IPPROTO_IP */ + case IPPROTO_IP: + break; + /* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + if (optlen < sizeof(int)) + { + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + } + + /* If this is no TCP socket, ignore any options. */ + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_TCP) + { + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + } + switch (optname) + { + case TCP_KEEPALIVE: + sock->conn->tcp->keep_idle = (u32_t) (*(int*) optval); + break; + +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + sock->conn->tcp->keep_idle = 1000 * (u32_t) (*(int*) optval); + break; + case TCP_KEEPINTVL: + sock->conn->tcp->keep_intvl = 1000 * (u32_t) (*(int*) optval); + break; + case TCP_KEEPCNT: + sock->conn->tcp->keep_cnt = (u32_t) (*(int*) optval); + break; +#endif /* LWIP_TCP_KEEPALIVE */ + default: + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + break; + } + break; + /* UNDEFINED LEVEL */ + default: + err = ESP_ARG; + lwIP_REQUIRE_NOERROR(err, exit); + break; + } + +exit: + return err; +} diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/Makefile b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/Makefile new file mode 100644 index 0000000..10f4067 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = liblibrary.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/aes.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/aes.c new file mode 100644 index 0000000..0630042 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/aes.c @@ -0,0 +1,1491 @@ +/* + * FIPS-197 compliant AES implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The AES block cipher was designed by Vincent Rijmen and Joan Daemen. + * + * http://csrc.nist.gov/encryption/aes/rijndael/Rijndael.pdf + * http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_AES_C) + +#include "c_types.h" +#include + +#include "mbedtls/aes.h" +#if defined(MBEDTLS_PADLOCK_C) +#include "mbedtls/padlock.h" +#endif +#if defined(MBEDTLS_AESNI_C) +#include "mbedtls/aesni.h" +#endif + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_AES_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (little endian) + */ +#ifndef GET_UINT32_LE +#define GET_UINT32_LE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] ) \ + | ( (uint32_t) (b)[(i) + 1] << 8 ) \ + | ( (uint32_t) (b)[(i) + 2] << 16 ) \ + | ( (uint32_t) (b)[(i) + 3] << 24 ); \ +} +#endif + +#ifndef PUT_UINT32_LE +#define PUT_UINT32_LE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( ( (n) ) & 0xFF ); \ + (b)[(i) + 1] = (unsigned char) ( ( (n) >> 8 ) & 0xFF ); \ + (b)[(i) + 2] = (unsigned char) ( ( (n) >> 16 ) & 0xFF ); \ + (b)[(i) + 3] = (unsigned char) ( ( (n) >> 24 ) & 0xFF ); \ +} +#endif + +#if defined(MBEDTLS_PADLOCK_C) && \ + ( defined(MBEDTLS_HAVE_X86) || defined(MBEDTLS_PADLOCK_ALIGN16) ) +static int aes_padlock_ace = -1; +#endif + +#if defined(MBEDTLS_AES_ROM_TABLES) +/* + * Forward S-box + */ +static const unsigned char FSb[256] ICACHE_RODATA_ATTR STORE_ATTR = +{ + 0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5, + 0x30, 0x01, 0x67, 0x2B, 0xFE, 0xD7, 0xAB, 0x76, + 0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0, + 0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0xA4, 0x72, 0xC0, + 0xB7, 0xFD, 0x93, 0x26, 0x36, 0x3F, 0xF7, 0xCC, + 0x34, 0xA5, 0xE5, 0xF1, 0x71, 0xD8, 0x31, 0x15, + 0x04, 0xC7, 0x23, 0xC3, 0x18, 0x96, 0x05, 0x9A, + 0x07, 0x12, 0x80, 0xE2, 0xEB, 0x27, 0xB2, 0x75, + 0x09, 0x83, 0x2C, 0x1A, 0x1B, 0x6E, 0x5A, 0xA0, + 0x52, 0x3B, 0xD6, 0xB3, 0x29, 0xE3, 0x2F, 0x84, + 0x53, 0xD1, 0x00, 0xED, 0x20, 0xFC, 0xB1, 0x5B, + 0x6A, 0xCB, 0xBE, 0x39, 0x4A, 0x4C, 0x58, 0xCF, + 0xD0, 0xEF, 0xAA, 0xFB, 0x43, 0x4D, 0x33, 0x85, + 0x45, 0xF9, 0x02, 0x7F, 0x50, 0x3C, 0x9F, 0xA8, + 0x51, 0xA3, 0x40, 0x8F, 0x92, 0x9D, 0x38, 0xF5, + 0xBC, 0xB6, 0xDA, 0x21, 0x10, 0xFF, 0xF3, 0xD2, + 0xCD, 0x0C, 0x13, 0xEC, 0x5F, 0x97, 0x44, 0x17, + 0xC4, 0xA7, 0x7E, 0x3D, 0x64, 0x5D, 0x19, 0x73, + 0x60, 0x81, 0x4F, 0xDC, 0x22, 0x2A, 0x90, 0x88, + 0x46, 0xEE, 0xB8, 0x14, 0xDE, 0x5E, 0x0B, 0xDB, + 0xE0, 0x32, 0x3A, 0x0A, 0x49, 0x06, 0x24, 0x5C, + 0xC2, 0xD3, 0xAC, 0x62, 0x91, 0x95, 0xE4, 0x79, + 0xE7, 0xC8, 0x37, 0x6D, 0x8D, 0xD5, 0x4E, 0xA9, + 0x6C, 0x56, 0xF4, 0xEA, 0x65, 0x7A, 0xAE, 0x08, + 0xBA, 0x78, 0x25, 0x2E, 0x1C, 0xA6, 0xB4, 0xC6, + 0xE8, 0xDD, 0x74, 0x1F, 0x4B, 0xBD, 0x8B, 0x8A, + 0x70, 0x3E, 0xB5, 0x66, 0x48, 0x03, 0xF6, 0x0E, + 0x61, 0x35, 0x57, 0xB9, 0x86, 0xC1, 0x1D, 0x9E, + 0xE1, 0xF8, 0x98, 0x11, 0x69, 0xD9, 0x8E, 0x94, + 0x9B, 0x1E, 0x87, 0xE9, 0xCE, 0x55, 0x28, 0xDF, + 0x8C, 0xA1, 0x89, 0x0D, 0xBF, 0xE6, 0x42, 0x68, + 0x41, 0x99, 0x2D, 0x0F, 0xB0, 0x54, 0xBB, 0x16 +}; + +/* + * Forward tables + */ +#define FT \ +\ + V(A5,63,63,C6), V(84,7C,7C,F8), V(99,77,77,EE), V(8D,7B,7B,F6), \ + V(0D,F2,F2,FF), V(BD,6B,6B,D6), V(B1,6F,6F,DE), V(54,C5,C5,91), \ + V(50,30,30,60), V(03,01,01,02), V(A9,67,67,CE), V(7D,2B,2B,56), \ + V(19,FE,FE,E7), V(62,D7,D7,B5), V(E6,AB,AB,4D), V(9A,76,76,EC), \ + V(45,CA,CA,8F), V(9D,82,82,1F), V(40,C9,C9,89), V(87,7D,7D,FA), \ + V(15,FA,FA,EF), V(EB,59,59,B2), V(C9,47,47,8E), V(0B,F0,F0,FB), \ + V(EC,AD,AD,41), V(67,D4,D4,B3), V(FD,A2,A2,5F), V(EA,AF,AF,45), \ + V(BF,9C,9C,23), V(F7,A4,A4,53), V(96,72,72,E4), V(5B,C0,C0,9B), \ + V(C2,B7,B7,75), V(1C,FD,FD,E1), V(AE,93,93,3D), V(6A,26,26,4C), \ + V(5A,36,36,6C), V(41,3F,3F,7E), V(02,F7,F7,F5), V(4F,CC,CC,83), \ + V(5C,34,34,68), V(F4,A5,A5,51), V(34,E5,E5,D1), V(08,F1,F1,F9), \ + V(93,71,71,E2), V(73,D8,D8,AB), V(53,31,31,62), V(3F,15,15,2A), \ + V(0C,04,04,08), V(52,C7,C7,95), V(65,23,23,46), V(5E,C3,C3,9D), \ + V(28,18,18,30), V(A1,96,96,37), V(0F,05,05,0A), V(B5,9A,9A,2F), \ + V(09,07,07,0E), V(36,12,12,24), V(9B,80,80,1B), V(3D,E2,E2,DF), \ + V(26,EB,EB,CD), V(69,27,27,4E), V(CD,B2,B2,7F), V(9F,75,75,EA), \ + V(1B,09,09,12), V(9E,83,83,1D), V(74,2C,2C,58), V(2E,1A,1A,34), \ + V(2D,1B,1B,36), V(B2,6E,6E,DC), V(EE,5A,5A,B4), V(FB,A0,A0,5B), \ + V(F6,52,52,A4), V(4D,3B,3B,76), V(61,D6,D6,B7), V(CE,B3,B3,7D), \ + V(7B,29,29,52), V(3E,E3,E3,DD), V(71,2F,2F,5E), V(97,84,84,13), \ + V(F5,53,53,A6), V(68,D1,D1,B9), V(00,00,00,00), V(2C,ED,ED,C1), \ + V(60,20,20,40), V(1F,FC,FC,E3), V(C8,B1,B1,79), V(ED,5B,5B,B6), \ + V(BE,6A,6A,D4), V(46,CB,CB,8D), V(D9,BE,BE,67), V(4B,39,39,72), \ + V(DE,4A,4A,94), V(D4,4C,4C,98), V(E8,58,58,B0), V(4A,CF,CF,85), \ + V(6B,D0,D0,BB), V(2A,EF,EF,C5), V(E5,AA,AA,4F), V(16,FB,FB,ED), \ + V(C5,43,43,86), V(D7,4D,4D,9A), V(55,33,33,66), V(94,85,85,11), \ + V(CF,45,45,8A), V(10,F9,F9,E9), V(06,02,02,04), V(81,7F,7F,FE), \ + V(F0,50,50,A0), V(44,3C,3C,78), V(BA,9F,9F,25), V(E3,A8,A8,4B), \ + V(F3,51,51,A2), V(FE,A3,A3,5D), V(C0,40,40,80), V(8A,8F,8F,05), \ + V(AD,92,92,3F), V(BC,9D,9D,21), V(48,38,38,70), V(04,F5,F5,F1), \ + V(DF,BC,BC,63), V(C1,B6,B6,77), V(75,DA,DA,AF), V(63,21,21,42), \ + V(30,10,10,20), V(1A,FF,FF,E5), V(0E,F3,F3,FD), V(6D,D2,D2,BF), \ + V(4C,CD,CD,81), V(14,0C,0C,18), V(35,13,13,26), V(2F,EC,EC,C3), \ + V(E1,5F,5F,BE), V(A2,97,97,35), V(CC,44,44,88), V(39,17,17,2E), \ + V(57,C4,C4,93), V(F2,A7,A7,55), V(82,7E,7E,FC), V(47,3D,3D,7A), \ + V(AC,64,64,C8), V(E7,5D,5D,BA), V(2B,19,19,32), V(95,73,73,E6), \ + V(A0,60,60,C0), V(98,81,81,19), V(D1,4F,4F,9E), V(7F,DC,DC,A3), \ + V(66,22,22,44), V(7E,2A,2A,54), V(AB,90,90,3B), V(83,88,88,0B), \ + V(CA,46,46,8C), V(29,EE,EE,C7), V(D3,B8,B8,6B), V(3C,14,14,28), \ + V(79,DE,DE,A7), V(E2,5E,5E,BC), V(1D,0B,0B,16), V(76,DB,DB,AD), \ + V(3B,E0,E0,DB), V(56,32,32,64), V(4E,3A,3A,74), V(1E,0A,0A,14), \ + V(DB,49,49,92), V(0A,06,06,0C), V(6C,24,24,48), V(E4,5C,5C,B8), \ + V(5D,C2,C2,9F), V(6E,D3,D3,BD), V(EF,AC,AC,43), V(A6,62,62,C4), \ + V(A8,91,91,39), V(A4,95,95,31), V(37,E4,E4,D3), V(8B,79,79,F2), \ + V(32,E7,E7,D5), V(43,C8,C8,8B), V(59,37,37,6E), V(B7,6D,6D,DA), \ + V(8C,8D,8D,01), V(64,D5,D5,B1), V(D2,4E,4E,9C), V(E0,A9,A9,49), \ + V(B4,6C,6C,D8), V(FA,56,56,AC), V(07,F4,F4,F3), V(25,EA,EA,CF), \ + V(AF,65,65,CA), V(8E,7A,7A,F4), V(E9,AE,AE,47), V(18,08,08,10), \ + V(D5,BA,BA,6F), V(88,78,78,F0), V(6F,25,25,4A), V(72,2E,2E,5C), \ + V(24,1C,1C,38), V(F1,A6,A6,57), V(C7,B4,B4,73), V(51,C6,C6,97), \ + V(23,E8,E8,CB), V(7C,DD,DD,A1), V(9C,74,74,E8), V(21,1F,1F,3E), \ + V(DD,4B,4B,96), V(DC,BD,BD,61), V(86,8B,8B,0D), V(85,8A,8A,0F), \ + V(90,70,70,E0), V(42,3E,3E,7C), V(C4,B5,B5,71), V(AA,66,66,CC), \ + V(D8,48,48,90), V(05,03,03,06), V(01,F6,F6,F7), V(12,0E,0E,1C), \ + V(A3,61,61,C2), V(5F,35,35,6A), V(F9,57,57,AE), V(D0,B9,B9,69), \ + V(91,86,86,17), V(58,C1,C1,99), V(27,1D,1D,3A), V(B9,9E,9E,27), \ + V(38,E1,E1,D9), V(13,F8,F8,EB), V(B3,98,98,2B), V(33,11,11,22), \ + V(BB,69,69,D2), V(70,D9,D9,A9), V(89,8E,8E,07), V(A7,94,94,33), \ + V(B6,9B,9B,2D), V(22,1E,1E,3C), V(92,87,87,15), V(20,E9,E9,C9), \ + V(49,CE,CE,87), V(FF,55,55,AA), V(78,28,28,50), V(7A,DF,DF,A5), \ + V(8F,8C,8C,03), V(F8,A1,A1,59), V(80,89,89,09), V(17,0D,0D,1A), \ + V(DA,BF,BF,65), V(31,E6,E6,D7), V(C6,42,42,84), V(B8,68,68,D0), \ + V(C3,41,41,82), V(B0,99,99,29), V(77,2D,2D,5A), V(11,0F,0F,1E), \ + V(CB,B0,B0,7B), V(FC,54,54,A8), V(D6,BB,BB,6D), V(3A,16,16,2C) + +#define V(a,b,c,d) 0x##a##b##c##d +static const uint32_t FT0[256] ICACHE_RODATA_ATTR STORE_ATTR = { FT }; +#undef V + +#define V(a,b,c,d) 0x##b##c##d##a +static const uint32_t FT1[256] ICACHE_RODATA_ATTR STORE_ATTR = { FT }; +#undef V + +#define V(a,b,c,d) 0x##c##d##a##b +static const uint32_t FT2[256] ICACHE_RODATA_ATTR STORE_ATTR = { FT }; +#undef V + +#define V(a,b,c,d) 0x##d##a##b##c +static const uint32_t FT3[256] ICACHE_RODATA_ATTR STORE_ATTR = { FT }; +#undef V + +#undef FT + +/* + * Reverse S-box + */ +static const unsigned char RSb[256] ICACHE_RODATA_ATTR STORE_ATTR = +{ + 0x52, 0x09, 0x6A, 0xD5, 0x30, 0x36, 0xA5, 0x38, + 0xBF, 0x40, 0xA3, 0x9E, 0x81, 0xF3, 0xD7, 0xFB, + 0x7C, 0xE3, 0x39, 0x82, 0x9B, 0x2F, 0xFF, 0x87, + 0x34, 0x8E, 0x43, 0x44, 0xC4, 0xDE, 0xE9, 0xCB, + 0x54, 0x7B, 0x94, 0x32, 0xA6, 0xC2, 0x23, 0x3D, + 0xEE, 0x4C, 0x95, 0x0B, 0x42, 0xFA, 0xC3, 0x4E, + 0x08, 0x2E, 0xA1, 0x66, 0x28, 0xD9, 0x24, 0xB2, + 0x76, 0x5B, 0xA2, 0x49, 0x6D, 0x8B, 0xD1, 0x25, + 0x72, 0xF8, 0xF6, 0x64, 0x86, 0x68, 0x98, 0x16, + 0xD4, 0xA4, 0x5C, 0xCC, 0x5D, 0x65, 0xB6, 0x92, + 0x6C, 0x70, 0x48, 0x50, 0xFD, 0xED, 0xB9, 0xDA, + 0x5E, 0x15, 0x46, 0x57, 0xA7, 0x8D, 0x9D, 0x84, + 0x90, 0xD8, 0xAB, 0x00, 0x8C, 0xBC, 0xD3, 0x0A, + 0xF7, 0xE4, 0x58, 0x05, 0xB8, 0xB3, 0x45, 0x06, + 0xD0, 0x2C, 0x1E, 0x8F, 0xCA, 0x3F, 0x0F, 0x02, + 0xC1, 0xAF, 0xBD, 0x03, 0x01, 0x13, 0x8A, 0x6B, + 0x3A, 0x91, 0x11, 0x41, 0x4F, 0x67, 0xDC, 0xEA, + 0x97, 0xF2, 0xCF, 0xCE, 0xF0, 0xB4, 0xE6, 0x73, + 0x96, 0xAC, 0x74, 0x22, 0xE7, 0xAD, 0x35, 0x85, + 0xE2, 0xF9, 0x37, 0xE8, 0x1C, 0x75, 0xDF, 0x6E, + 0x47, 0xF1, 0x1A, 0x71, 0x1D, 0x29, 0xC5, 0x89, + 0x6F, 0xB7, 0x62, 0x0E, 0xAA, 0x18, 0xBE, 0x1B, + 0xFC, 0x56, 0x3E, 0x4B, 0xC6, 0xD2, 0x79, 0x20, + 0x9A, 0xDB, 0xC0, 0xFE, 0x78, 0xCD, 0x5A, 0xF4, + 0x1F, 0xDD, 0xA8, 0x33, 0x88, 0x07, 0xC7, 0x31, + 0xB1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xEC, 0x5F, + 0x60, 0x51, 0x7F, 0xA9, 0x19, 0xB5, 0x4A, 0x0D, + 0x2D, 0xE5, 0x7A, 0x9F, 0x93, 0xC9, 0x9C, 0xEF, + 0xA0, 0xE0, 0x3B, 0x4D, 0xAE, 0x2A, 0xF5, 0xB0, + 0xC8, 0xEB, 0xBB, 0x3C, 0x83, 0x53, 0x99, 0x61, + 0x17, 0x2B, 0x04, 0x7E, 0xBA, 0x77, 0xD6, 0x26, + 0xE1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0C, 0x7D +}; + +/* + * Reverse tables + */ +#define RT \ +\ + V(50,A7,F4,51), V(53,65,41,7E), V(C3,A4,17,1A), V(96,5E,27,3A), \ + V(CB,6B,AB,3B), V(F1,45,9D,1F), V(AB,58,FA,AC), V(93,03,E3,4B), \ + V(55,FA,30,20), V(F6,6D,76,AD), V(91,76,CC,88), V(25,4C,02,F5), \ + V(FC,D7,E5,4F), V(D7,CB,2A,C5), V(80,44,35,26), V(8F,A3,62,B5), \ + V(49,5A,B1,DE), V(67,1B,BA,25), V(98,0E,EA,45), V(E1,C0,FE,5D), \ + V(02,75,2F,C3), V(12,F0,4C,81), V(A3,97,46,8D), V(C6,F9,D3,6B), \ + V(E7,5F,8F,03), V(95,9C,92,15), V(EB,7A,6D,BF), V(DA,59,52,95), \ + V(2D,83,BE,D4), V(D3,21,74,58), V(29,69,E0,49), V(44,C8,C9,8E), \ + V(6A,89,C2,75), V(78,79,8E,F4), V(6B,3E,58,99), V(DD,71,B9,27), \ + V(B6,4F,E1,BE), V(17,AD,88,F0), V(66,AC,20,C9), V(B4,3A,CE,7D), \ + V(18,4A,DF,63), V(82,31,1A,E5), V(60,33,51,97), V(45,7F,53,62), \ + V(E0,77,64,B1), V(84,AE,6B,BB), V(1C,A0,81,FE), V(94,2B,08,F9), \ + V(58,68,48,70), V(19,FD,45,8F), V(87,6C,DE,94), V(B7,F8,7B,52), \ + V(23,D3,73,AB), V(E2,02,4B,72), V(57,8F,1F,E3), V(2A,AB,55,66), \ + V(07,28,EB,B2), V(03,C2,B5,2F), V(9A,7B,C5,86), V(A5,08,37,D3), \ + V(F2,87,28,30), V(B2,A5,BF,23), V(BA,6A,03,02), V(5C,82,16,ED), \ + V(2B,1C,CF,8A), V(92,B4,79,A7), V(F0,F2,07,F3), V(A1,E2,69,4E), \ + V(CD,F4,DA,65), V(D5,BE,05,06), V(1F,62,34,D1), V(8A,FE,A6,C4), \ + V(9D,53,2E,34), V(A0,55,F3,A2), V(32,E1,8A,05), V(75,EB,F6,A4), \ + V(39,EC,83,0B), V(AA,EF,60,40), V(06,9F,71,5E), V(51,10,6E,BD), \ + V(F9,8A,21,3E), V(3D,06,DD,96), V(AE,05,3E,DD), V(46,BD,E6,4D), \ + V(B5,8D,54,91), V(05,5D,C4,71), V(6F,D4,06,04), V(FF,15,50,60), \ + V(24,FB,98,19), V(97,E9,BD,D6), V(CC,43,40,89), V(77,9E,D9,67), \ + V(BD,42,E8,B0), V(88,8B,89,07), V(38,5B,19,E7), V(DB,EE,C8,79), \ + V(47,0A,7C,A1), V(E9,0F,42,7C), V(C9,1E,84,F8), V(00,00,00,00), \ + V(83,86,80,09), V(48,ED,2B,32), V(AC,70,11,1E), V(4E,72,5A,6C), \ + V(FB,FF,0E,FD), V(56,38,85,0F), V(1E,D5,AE,3D), V(27,39,2D,36), \ + V(64,D9,0F,0A), V(21,A6,5C,68), V(D1,54,5B,9B), V(3A,2E,36,24), \ + V(B1,67,0A,0C), V(0F,E7,57,93), V(D2,96,EE,B4), V(9E,91,9B,1B), \ + V(4F,C5,C0,80), V(A2,20,DC,61), V(69,4B,77,5A), V(16,1A,12,1C), \ + V(0A,BA,93,E2), V(E5,2A,A0,C0), V(43,E0,22,3C), V(1D,17,1B,12), \ + V(0B,0D,09,0E), V(AD,C7,8B,F2), V(B9,A8,B6,2D), V(C8,A9,1E,14), \ + V(85,19,F1,57), V(4C,07,75,AF), V(BB,DD,99,EE), V(FD,60,7F,A3), \ + V(9F,26,01,F7), V(BC,F5,72,5C), V(C5,3B,66,44), V(34,7E,FB,5B), \ + V(76,29,43,8B), V(DC,C6,23,CB), V(68,FC,ED,B6), V(63,F1,E4,B8), \ + V(CA,DC,31,D7), V(10,85,63,42), V(40,22,97,13), V(20,11,C6,84), \ + V(7D,24,4A,85), V(F8,3D,BB,D2), V(11,32,F9,AE), V(6D,A1,29,C7), \ + V(4B,2F,9E,1D), V(F3,30,B2,DC), V(EC,52,86,0D), V(D0,E3,C1,77), \ + V(6C,16,B3,2B), V(99,B9,70,A9), V(FA,48,94,11), V(22,64,E9,47), \ + V(C4,8C,FC,A8), V(1A,3F,F0,A0), V(D8,2C,7D,56), V(EF,90,33,22), \ + V(C7,4E,49,87), V(C1,D1,38,D9), V(FE,A2,CA,8C), V(36,0B,D4,98), \ + V(CF,81,F5,A6), V(28,DE,7A,A5), V(26,8E,B7,DA), V(A4,BF,AD,3F), \ + V(E4,9D,3A,2C), V(0D,92,78,50), V(9B,CC,5F,6A), V(62,46,7E,54), \ + V(C2,13,8D,F6), V(E8,B8,D8,90), V(5E,F7,39,2E), V(F5,AF,C3,82), \ + V(BE,80,5D,9F), V(7C,93,D0,69), V(A9,2D,D5,6F), V(B3,12,25,CF), \ + V(3B,99,AC,C8), V(A7,7D,18,10), V(6E,63,9C,E8), V(7B,BB,3B,DB), \ + V(09,78,26,CD), V(F4,18,59,6E), V(01,B7,9A,EC), V(A8,9A,4F,83), \ + V(65,6E,95,E6), V(7E,E6,FF,AA), V(08,CF,BC,21), V(E6,E8,15,EF), \ + V(D9,9B,E7,BA), V(CE,36,6F,4A), V(D4,09,9F,EA), V(D6,7C,B0,29), \ + V(AF,B2,A4,31), V(31,23,3F,2A), V(30,94,A5,C6), V(C0,66,A2,35), \ + V(37,BC,4E,74), V(A6,CA,82,FC), V(B0,D0,90,E0), V(15,D8,A7,33), \ + V(4A,98,04,F1), V(F7,DA,EC,41), V(0E,50,CD,7F), V(2F,F6,91,17), \ + V(8D,D6,4D,76), V(4D,B0,EF,43), V(54,4D,AA,CC), V(DF,04,96,E4), \ + V(E3,B5,D1,9E), V(1B,88,6A,4C), V(B8,1F,2C,C1), V(7F,51,65,46), \ + V(04,EA,5E,9D), V(5D,35,8C,01), V(73,74,87,FA), V(2E,41,0B,FB), \ + V(5A,1D,67,B3), V(52,D2,DB,92), V(33,56,10,E9), V(13,47,D6,6D), \ + V(8C,61,D7,9A), V(7A,0C,A1,37), V(8E,14,F8,59), V(89,3C,13,EB), \ + V(EE,27,A9,CE), V(35,C9,61,B7), V(ED,E5,1C,E1), V(3C,B1,47,7A), \ + V(59,DF,D2,9C), V(3F,73,F2,55), V(79,CE,14,18), V(BF,37,C7,73), \ + V(EA,CD,F7,53), V(5B,AA,FD,5F), V(14,6F,3D,DF), V(86,DB,44,78), \ + V(81,F3,AF,CA), V(3E,C4,68,B9), V(2C,34,24,38), V(5F,40,A3,C2), \ + V(72,C3,1D,16), V(0C,25,E2,BC), V(8B,49,3C,28), V(41,95,0D,FF), \ + V(71,01,A8,39), V(DE,B3,0C,08), V(9C,E4,B4,D8), V(90,C1,56,64), \ + V(61,84,CB,7B), V(70,B6,32,D5), V(74,5C,6C,48), V(42,57,B8,D0) + +#define V(a,b,c,d) 0x##a##b##c##d +static const uint32_t RT0[256] ICACHE_RODATA_ATTR STORE_ATTR = { RT }; +#undef V + +#define V(a,b,c,d) 0x##b##c##d##a +static const uint32_t RT1[256] ICACHE_RODATA_ATTR STORE_ATTR = { RT }; +#undef V + +#define V(a,b,c,d) 0x##c##d##a##b +static const uint32_t RT2[256] ICACHE_RODATA_ATTR STORE_ATTR = { RT }; +#undef V + +#define V(a,b,c,d) 0x##d##a##b##c +static const uint32_t RT3[256] ICACHE_RODATA_ATTR STORE_ATTR = { RT }; +#undef V + +#undef RT + +/* + * Round constants + */ +static const uint32_t RCON[10] ICACHE_RODATA_ATTR = +{ + 0x00000001, 0x00000002, 0x00000004, 0x00000008, + 0x00000010, 0x00000020, 0x00000040, 0x00000080, + 0x0000001B, 0x00000036 +}; + +#else /* MBEDTLS_AES_ROM_TABLES */ + +/* + * Forward S-box & tables + */ +static unsigned char FSb[256]; +static uint32_t FT0[256]; +static uint32_t FT1[256]; +static uint32_t FT2[256]; +static uint32_t FT3[256]; + +/* + * Reverse S-box & tables + */ +static unsigned char RSb[256]; +static uint32_t RT0[256]; +static uint32_t RT1[256]; +static uint32_t RT2[256]; +static uint32_t RT3[256]; + +/* + * Round constants + */ +static uint32_t RCON[10]; + +/* + * Tables generation code + */ +#define ROTL8(x) ( ( x << 8 ) & 0xFFFFFFFF ) | ( x >> 24 ) +#define XTIME(x) ( ( x << 1 ) ^ ( ( x & 0x80 ) ? 0x1B : 0x00 ) ) +#define MUL(x,y) ( ( x && y ) ? pow[(log[x]+log[y]) % 255] : 0 ) + +static int aes_init_done = 0; + +static void aes_gen_tables( void ) +{ + int i, x, y, z; + int pow[256]; + int log[256]; + + /* + * compute pow and log tables over GF(2^8) + */ + for( i = 0, x = 1; i < 256; i++ ) + { + pow[i] = x; + log[x] = i; + x = ( x ^ XTIME( x ) ) & 0xFF; + } + + /* + * calculate the round constants + */ + for( i = 0, x = 1; i < 10; i++ ) + { + RCON[i] = (uint32_t) x; + x = XTIME( x ) & 0xFF; + } + + /* + * generate the forward and reverse S-boxes + */ + FSb[0x00] = 0x63; + RSb[0x63] = 0x00; + + for( i = 1; i < 256; i++ ) + { + x = pow[255 - log[i]]; + + y = x; y = ( ( y << 1 ) | ( y >> 7 ) ) & 0xFF; + x ^= y; y = ( ( y << 1 ) | ( y >> 7 ) ) & 0xFF; + x ^= y; y = ( ( y << 1 ) | ( y >> 7 ) ) & 0xFF; + x ^= y; y = ( ( y << 1 ) | ( y >> 7 ) ) & 0xFF; + x ^= y ^ 0x63; + + FSb[i] = (unsigned char) x; + RSb[x] = (unsigned char) i; + } + + /* + * generate the forward and reverse tables + */ + for( i = 0; i < 256; i++ ) + { + x = FSb[i]; + y = XTIME( x ) & 0xFF; + z = ( y ^ x ) & 0xFF; + + FT0[i] = ( (uint32_t) y ) ^ + ( (uint32_t) x << 8 ) ^ + ( (uint32_t) x << 16 ) ^ + ( (uint32_t) z << 24 ); + + FT1[i] = ROTL8( FT0[i] ); + FT2[i] = ROTL8( FT1[i] ); + FT3[i] = ROTL8( FT2[i] ); + + x = RSb[i]; + + RT0[i] = ( (uint32_t) MUL( 0x0E, x ) ) ^ + ( (uint32_t) MUL( 0x09, x ) << 8 ) ^ + ( (uint32_t) MUL( 0x0D, x ) << 16 ) ^ + ( (uint32_t) MUL( 0x0B, x ) << 24 ); + + RT1[i] = ROTL8( RT0[i] ); + RT2[i] = ROTL8( RT1[i] ); + RT3[i] = ROTL8( RT2[i] ); + } +} + +#endif /* MBEDTLS_AES_ROM_TABLES */ + +void mbedtls_aes_init( mbedtls_aes_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_aes_context ) ); +} + +void mbedtls_aes_free( mbedtls_aes_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_aes_context ) ); +} + +/* + * AES key schedule (encryption) + */ +#if !defined(MBEDTLS_AES_SETKEY_ENC_ALT) +int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ) +{ + unsigned int i; + uint32_t *RK; + +#if !defined(MBEDTLS_AES_ROM_TABLES) + if( aes_init_done == 0 ) + { + aes_gen_tables(); + aes_init_done = 1; + + } +#endif + + switch( keybits ) + { + case 128: ctx->nr = 10; break; + case 192: ctx->nr = 12; break; + case 256: ctx->nr = 14; break; + default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH ); + } + +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_PADLOCK_ALIGN16) + if( aes_padlock_ace == -1 ) + aes_padlock_ace = mbedtls_padlock_has_support( MBEDTLS_PADLOCK_ACE ); + + if( aes_padlock_ace ) + ctx->rk = RK = MBEDTLS_PADLOCK_ALIGN16( ctx->buf ); + else +#endif + ctx->rk = RK = ctx->buf; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( mbedtls_aesni_has_support( MBEDTLS_AESNI_AES ) ) + return( mbedtls_aesni_setkey_enc( (unsigned char *) ctx->rk, key, keybits ) ); +#endif + + for( i = 0; i < ( keybits >> 5 ); i++ ) + { + GET_UINT32_LE( RK[i], key, i << 2 ); + } + + switch( ctx->nr ) + { + case 10: + + for( i = 0; i < 10; i++, RK += 4 ) + { + RK[4] = RK[0] ^ RCON[i] ^ + ( (uint32_t) system_get_data_of_array_8(FSb ,( RK[3] >> 8 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb ,( RK[3] >> 16 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb ,( RK[3] >> 24 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb ,( RK[3] ) & 0xFF ) << 24 ); + + RK[5] = RK[1] ^ RK[4]; + RK[6] = RK[2] ^ RK[5]; + RK[7] = RK[3] ^ RK[6]; + } + break; + + case 12: + + for( i = 0; i < 8; i++, RK += 6 ) + { + RK[6] = RK[0] ^ RCON[i] ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[5] >> 8 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[5] >> 16 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[5] >> 24 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[5] ) & 0xFF ) << 24 ); + + RK[7] = RK[1] ^ RK[6]; + RK[8] = RK[2] ^ RK[7]; + RK[9] = RK[3] ^ RK[8]; + RK[10] = RK[4] ^ RK[9]; + RK[11] = RK[5] ^ RK[10]; + } + break; + + case 14: + + for( i = 0; i < 7; i++, RK += 8 ) + { + RK[8] = RK[0] ^ RCON[i] ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[7] >> 8 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[7] >> 16 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[7] >> 24 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[7] ) & 0xFF ) << 24 ); + + RK[9] = RK[1] ^ RK[8]; + RK[10] = RK[2] ^ RK[9]; + RK[11] = RK[3] ^ RK[10]; + + RK[12] = RK[4] ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[11] ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[11] >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[11] >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( RK[11] >> 24 ) & 0xFF ) << 24 ); + + RK[13] = RK[5] ^ RK[12]; + RK[14] = RK[6] ^ RK[13]; + RK[15] = RK[7] ^ RK[14]; + } + break; + } + + return( 0 ); +} +#endif /* !MBEDTLS_AES_SETKEY_ENC_ALT */ + +/* + * AES key schedule (decryption) + */ +#if !defined(MBEDTLS_AES_SETKEY_DEC_ALT) +int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ) +{ + int i, j, ret; + mbedtls_aes_context cty; + uint32_t *RK; + uint32_t *SK; + + mbedtls_aes_init( &cty ); + +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_PADLOCK_ALIGN16) + if( aes_padlock_ace == -1 ) + aes_padlock_ace = mbedtls_padlock_has_support( MBEDTLS_PADLOCK_ACE ); + + if( aes_padlock_ace ) + ctx->rk = RK = MBEDTLS_PADLOCK_ALIGN16( ctx->buf ); + else +#endif + ctx->rk = RK = ctx->buf; + + /* Also checks keybits */ + if( ( ret = mbedtls_aes_setkey_enc( &cty, key, keybits ) ) != 0 ) + goto exit; + + ctx->nr = cty.nr; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( mbedtls_aesni_has_support( MBEDTLS_AESNI_AES ) ) + { + mbedtls_aesni_inverse_key( (unsigned char *) ctx->rk, + (const unsigned char *) cty.rk, ctx->nr ); + goto exit; + } +#endif + + SK = cty.rk + cty.nr * 4; + + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + + for( i = ctx->nr - 1, SK -= 8; i > 0; i--, SK -= 8 ) + { + for( j = 0; j < 4; j++, SK++ ) + { + *RK++ = RT0[ system_get_data_of_array_8(FSb, ( *SK ) & 0xFF ) ] ^ + RT1[ system_get_data_of_array_8(FSb, ( *SK >> 8 ) & 0xFF ) ] ^ + RT2[ system_get_data_of_array_8(FSb, ( *SK >> 16 ) & 0xFF ) ] ^ + RT3[ system_get_data_of_array_8(FSb, ( *SK >> 24 ) & 0xFF ) ]; + } + } + + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + +exit: + mbedtls_aes_free( &cty ); + + return( ret ); +} +#endif /* !MBEDTLS_AES_SETKEY_DEC_ALT */ + +#define AES_FROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3) \ +{ \ + X0 = *RK++ ^ FT0[ ( Y0 ) & 0xFF ] ^ \ + FT1[ ( Y1 >> 8 ) & 0xFF ] ^ \ + FT2[ ( Y2 >> 16 ) & 0xFF ] ^ \ + FT3[ ( Y3 >> 24 ) & 0xFF ]; \ + \ + X1 = *RK++ ^ FT0[ ( Y1 ) & 0xFF ] ^ \ + FT1[ ( Y2 >> 8 ) & 0xFF ] ^ \ + FT2[ ( Y3 >> 16 ) & 0xFF ] ^ \ + FT3[ ( Y0 >> 24 ) & 0xFF ]; \ + \ + X2 = *RK++ ^ FT0[ ( Y2 ) & 0xFF ] ^ \ + FT1[ ( Y3 >> 8 ) & 0xFF ] ^ \ + FT2[ ( Y0 >> 16 ) & 0xFF ] ^ \ + FT3[ ( Y1 >> 24 ) & 0xFF ]; \ + \ + X3 = *RK++ ^ FT0[ ( Y3 ) & 0xFF ] ^ \ + FT1[ ( Y0 >> 8 ) & 0xFF ] ^ \ + FT2[ ( Y1 >> 16 ) & 0xFF ] ^ \ + FT3[ ( Y2 >> 24 ) & 0xFF ]; \ +} + +#define AES_RROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3) \ +{ \ + X0 = *RK++ ^ RT0[ ( Y0 ) & 0xFF ] ^ \ + RT1[ ( Y3 >> 8 ) & 0xFF ] ^ \ + RT2[ ( Y2 >> 16 ) & 0xFF ] ^ \ + RT3[ ( Y1 >> 24 ) & 0xFF ]; \ + \ + X1 = *RK++ ^ RT0[ ( Y1 ) & 0xFF ] ^ \ + RT1[ ( Y0 >> 8 ) & 0xFF ] ^ \ + RT2[ ( Y3 >> 16 ) & 0xFF ] ^ \ + RT3[ ( Y2 >> 24 ) & 0xFF ]; \ + \ + X2 = *RK++ ^ RT0[ ( Y2 ) & 0xFF ] ^ \ + RT1[ ( Y1 >> 8 ) & 0xFF ] ^ \ + RT2[ ( Y0 >> 16 ) & 0xFF ] ^ \ + RT3[ ( Y3 >> 24 ) & 0xFF ]; \ + \ + X3 = *RK++ ^ RT0[ ( Y3 ) & 0xFF ] ^ \ + RT1[ ( Y2 >> 8 ) & 0xFF ] ^ \ + RT2[ ( Y1 >> 16 ) & 0xFF ] ^ \ + RT3[ ( Y0 >> 24 ) & 0xFF ]; \ +} + +/* + * AES-ECB block encryption + */ +#if !defined(MBEDTLS_AES_ENCRYPT_ALT) +void mbedtls_aes_encrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ) +{ + int i; + uint32_t *RK, X0, X1, X2, X3, Y0, Y1, Y2, Y3; + + RK = ctx->rk; + + GET_UINT32_LE( X0, input, 0 ); X0 ^= *RK++; + GET_UINT32_LE( X1, input, 4 ); X1 ^= *RK++; + GET_UINT32_LE( X2, input, 8 ); X2 ^= *RK++; + GET_UINT32_LE( X3, input, 12 ); X3 ^= *RK++; + + for( i = ( ctx->nr >> 1 ) - 1; i > 0; i-- ) + { + AES_FROUND( Y0, Y1, Y2, Y3, X0, X1, X2, X3 ); + AES_FROUND( X0, X1, X2, X3, Y0, Y1, Y2, Y3 ); + } + + AES_FROUND( Y0, Y1, Y2, Y3, X0, X1, X2, X3 ); + + X0 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y0 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y1 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y2 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y3 >> 24 ) & 0xFF ) << 24 ); + + X1 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y1 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y2 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y3 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y0 >> 24 ) & 0xFF ) << 24 ); + + X2 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y2 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y3 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y0 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y1 >> 24 ) & 0xFF ) << 24 ); + + X3 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y3 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y0 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y1 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(FSb, ( Y2 >> 24 ) & 0xFF ) << 24 ); + + PUT_UINT32_LE( X0, output, 0 ); + PUT_UINT32_LE( X1, output, 4 ); + PUT_UINT32_LE( X2, output, 8 ); + PUT_UINT32_LE( X3, output, 12 ); +} +#endif /* !MBEDTLS_AES_ENCRYPT_ALT */ + +/* + * AES-ECB block decryption + */ +#if !defined(MBEDTLS_AES_DECRYPT_ALT) +void mbedtls_aes_decrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ) +{ + int i; + uint32_t *RK, X0, X1, X2, X3, Y0, Y1, Y2, Y3; + + RK = ctx->rk; + + GET_UINT32_LE( X0, input, 0 ); X0 ^= *RK++; + GET_UINT32_LE( X1, input, 4 ); X1 ^= *RK++; + GET_UINT32_LE( X2, input, 8 ); X2 ^= *RK++; + GET_UINT32_LE( X3, input, 12 ); X3 ^= *RK++; + + for( i = ( ctx->nr >> 1 ) - 1; i > 0; i-- ) + { + AES_RROUND( Y0, Y1, Y2, Y3, X0, X1, X2, X3 ); + AES_RROUND( X0, X1, X2, X3, Y0, Y1, Y2, Y3 ); + } + + AES_RROUND( Y0, Y1, Y2, Y3, X0, X1, X2, X3 ); + + X0 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y0 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y3 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y2 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y1 >> 24 ) & 0xFF ) << 24 ); + + X1 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y1 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y0 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y3 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y2 >> 24 ) & 0xFF ) << 24 ); + + X2 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y2 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y1 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y0 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y3 >> 24 ) & 0xFF ) << 24 ); + + X3 = *RK++ ^ \ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y3 ) & 0xFF ) ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y2 >> 8 ) & 0xFF ) << 8 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y1 >> 16 ) & 0xFF ) << 16 ) ^ + ( (uint32_t) system_get_data_of_array_8(RSb, ( Y0 >> 24 ) & 0xFF ) << 24 ); + + PUT_UINT32_LE( X0, output, 0 ); + PUT_UINT32_LE( X1, output, 4 ); + PUT_UINT32_LE( X2, output, 8 ); + PUT_UINT32_LE( X3, output, 12 ); +} +#endif /* !MBEDTLS_AES_DECRYPT_ALT */ + +/* + * AES-ECB block encryption/decryption + */ +int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ) +{ +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( mbedtls_aesni_has_support( MBEDTLS_AESNI_AES ) ) + return( mbedtls_aesni_crypt_ecb( ctx, mode, input, output ) ); +#endif + +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) + if( aes_padlock_ace ) + { + if( mbedtls_padlock_xcryptecb( ctx, mode, input, output ) == 0 ) + return( 0 ); + + // If padlock data misaligned, we just fall back to + // unaccelerated mode + // + } +#endif + + if( mode == MBEDTLS_AES_ENCRYPT ) + mbedtls_aes_encrypt( ctx, input, output ); + else + mbedtls_aes_decrypt( ctx, input, output ); + + return( 0 ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/* + * AES-CBC buffer encryption/decryption + */ +int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ) +{ + int i; + unsigned char temp[16]; + + if( length % 16 ) + return( MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH ); + +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) + if( aes_padlock_ace ) + { + if( mbedtls_padlock_xcryptcbc( ctx, mode, length, iv, input, output ) == 0 ) + return( 0 ); + + // If padlock data misaligned, we just fall back to + // unaccelerated mode + // + } +#endif + + if( mode == MBEDTLS_AES_DECRYPT ) + { + while( length > 0 ) + { + memcpy( temp, input, 16 ); + mbedtls_aes_crypt_ecb( ctx, mode, input, output ); + + for( i = 0; i < 16; i++ ) + output[i] = (unsigned char)( output[i] ^ iv[i] ); + + memcpy( iv, temp, 16 ); + + input += 16; + output += 16; + length -= 16; + } + } + else + { + while( length > 0 ) + { + for( i = 0; i < 16; i++ ) + output[i] = (unsigned char)( input[i] ^ iv[i] ); + + mbedtls_aes_crypt_ecb( ctx, mode, output, output ); + memcpy( iv, output, 16 ); + + input += 16; + output += 16; + length -= 16; + } + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +/* + * AES-CFB128 buffer encryption/decryption + */ +int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx, + int mode, + size_t length, + size_t *iv_off, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ) +{ + int c; + size_t n = *iv_off; + + if( mode == MBEDTLS_AES_DECRYPT ) + { + while( length-- ) + { + if( n == 0 ) + mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); + + c = *input++; + *output++ = (unsigned char)( c ^ iv[n] ); + iv[n] = (unsigned char) c; + + n = ( n + 1 ) & 0x0F; + } + } + else + { + while( length-- ) + { + if( n == 0 ) + mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); + + iv[n] = *output++ = (unsigned char)( iv[n] ^ *input++ ); + + n = ( n + 1 ) & 0x0F; + } + } + + *iv_off = n; + + return( 0 ); +} + +/* + * AES-CFB8 buffer encryption/decryption + */ +int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ) +{ + unsigned char c; + unsigned char ov[17]; + + while( length-- ) + { + memcpy( ov, iv, 16 ); + mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); + + if( mode == MBEDTLS_AES_DECRYPT ) + ov[16] = *input; + + c = *output++ = (unsigned char)( iv[0] ^ *input++ ); + + if( mode == MBEDTLS_AES_ENCRYPT ) + ov[16] = c; + + memcpy( iv, ov + 1, 16 ); + } + + return( 0 ); +} +#endif /*MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/* + * AES-CTR buffer encryption/decryption + */ +int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx, + size_t length, + size_t *nc_off, + unsigned char nonce_counter[16], + unsigned char stream_block[16], + const unsigned char *input, + unsigned char *output ) +{ + int c, i; + size_t n = *nc_off; + + while( length-- ) + { + if( n == 0 ) { + mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, nonce_counter, stream_block ); + + for( i = 16; i > 0; i-- ) + if( ++nonce_counter[i - 1] != 0 ) + break; + } + c = *input++; + *output++ = (unsigned char)( c ^ stream_block[n] ); + + n = ( n + 1 ) & 0x0F; + } + + *nc_off = n; + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +#endif /* !MBEDTLS_AES_ALT */ + +#if defined(MBEDTLS_SELF_TEST) +/* + * AES test vectors from: + * + * http://csrc.nist.gov/archive/aes/rijndael/rijndael-vals.zip + */ +static const unsigned char aes_test_ecb_dec[3][16] = +{ + { 0x44, 0x41, 0x6A, 0xC2, 0xD1, 0xF5, 0x3C, 0x58, + 0x33, 0x03, 0x91, 0x7E, 0x6B, 0xE9, 0xEB, 0xE0 }, + { 0x48, 0xE3, 0x1E, 0x9E, 0x25, 0x67, 0x18, 0xF2, + 0x92, 0x29, 0x31, 0x9C, 0x19, 0xF1, 0x5B, 0xA4 }, + { 0x05, 0x8C, 0xCF, 0xFD, 0xBB, 0xCB, 0x38, 0x2D, + 0x1F, 0x6F, 0x56, 0x58, 0x5D, 0x8A, 0x4A, 0xDE } +}; + +static const unsigned char aes_test_ecb_enc[3][16] = +{ + { 0xC3, 0x4C, 0x05, 0x2C, 0xC0, 0xDA, 0x8D, 0x73, + 0x45, 0x1A, 0xFE, 0x5F, 0x03, 0xBE, 0x29, 0x7F }, + { 0xF3, 0xF6, 0x75, 0x2A, 0xE8, 0xD7, 0x83, 0x11, + 0x38, 0xF0, 0x41, 0x56, 0x06, 0x31, 0xB1, 0x14 }, + { 0x8B, 0x79, 0xEE, 0xCC, 0x93, 0xA0, 0xEE, 0x5D, + 0xFF, 0x30, 0xB4, 0xEA, 0x21, 0x63, 0x6D, 0xA4 } +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const unsigned char aes_test_cbc_dec[3][16] = +{ + { 0xFA, 0xCA, 0x37, 0xE0, 0xB0, 0xC8, 0x53, 0x73, + 0xDF, 0x70, 0x6E, 0x73, 0xF7, 0xC9, 0xAF, 0x86 }, + { 0x5D, 0xF6, 0x78, 0xDD, 0x17, 0xBA, 0x4E, 0x75, + 0xB6, 0x17, 0x68, 0xC6, 0xAD, 0xEF, 0x7C, 0x7B }, + { 0x48, 0x04, 0xE1, 0x81, 0x8F, 0xE6, 0x29, 0x75, + 0x19, 0xA3, 0xE8, 0x8C, 0x57, 0x31, 0x04, 0x13 } +}; + +static const unsigned char aes_test_cbc_enc[3][16] = +{ + { 0x8A, 0x05, 0xFC, 0x5E, 0x09, 0x5A, 0xF4, 0x84, + 0x8A, 0x08, 0xD3, 0x28, 0xD3, 0x68, 0x8E, 0x3D }, + { 0x7B, 0xD9, 0x66, 0xD5, 0x3A, 0xD8, 0xC1, 0xBB, + 0x85, 0xD2, 0xAD, 0xFA, 0xE8, 0x7B, 0xB1, 0x04 }, + { 0xFE, 0x3C, 0x53, 0x65, 0x3E, 0x2F, 0x45, 0xB5, + 0x6F, 0xCD, 0x88, 0xB2, 0xCC, 0x89, 0x8F, 0xF0 } +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +/* + * AES-CFB128 test vectors from: + * + * http://csrc.nist.gov/publications/nistpubs/800-38a/sp800-38a.pdf + */ +static const unsigned char aes_test_cfb128_key[3][32] = +{ + { 0x2B, 0x7E, 0x15, 0x16, 0x28, 0xAE, 0xD2, 0xA6, + 0xAB, 0xF7, 0x15, 0x88, 0x09, 0xCF, 0x4F, 0x3C }, + { 0x8E, 0x73, 0xB0, 0xF7, 0xDA, 0x0E, 0x64, 0x52, + 0xC8, 0x10, 0xF3, 0x2B, 0x80, 0x90, 0x79, 0xE5, + 0x62, 0xF8, 0xEA, 0xD2, 0x52, 0x2C, 0x6B, 0x7B }, + { 0x60, 0x3D, 0xEB, 0x10, 0x15, 0xCA, 0x71, 0xBE, + 0x2B, 0x73, 0xAE, 0xF0, 0x85, 0x7D, 0x77, 0x81, + 0x1F, 0x35, 0x2C, 0x07, 0x3B, 0x61, 0x08, 0xD7, + 0x2D, 0x98, 0x10, 0xA3, 0x09, 0x14, 0xDF, 0xF4 } +}; + +static const unsigned char aes_test_cfb128_iv[16] = +{ + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F +}; + +static const unsigned char aes_test_cfb128_pt[64] = +{ + 0x6B, 0xC1, 0xBE, 0xE2, 0x2E, 0x40, 0x9F, 0x96, + 0xE9, 0x3D, 0x7E, 0x11, 0x73, 0x93, 0x17, 0x2A, + 0xAE, 0x2D, 0x8A, 0x57, 0x1E, 0x03, 0xAC, 0x9C, + 0x9E, 0xB7, 0x6F, 0xAC, 0x45, 0xAF, 0x8E, 0x51, + 0x30, 0xC8, 0x1C, 0x46, 0xA3, 0x5C, 0xE4, 0x11, + 0xE5, 0xFB, 0xC1, 0x19, 0x1A, 0x0A, 0x52, 0xEF, + 0xF6, 0x9F, 0x24, 0x45, 0xDF, 0x4F, 0x9B, 0x17, + 0xAD, 0x2B, 0x41, 0x7B, 0xE6, 0x6C, 0x37, 0x10 +}; + +static const unsigned char aes_test_cfb128_ct[3][64] = +{ + { 0x3B, 0x3F, 0xD9, 0x2E, 0xB7, 0x2D, 0xAD, 0x20, + 0x33, 0x34, 0x49, 0xF8, 0xE8, 0x3C, 0xFB, 0x4A, + 0xC8, 0xA6, 0x45, 0x37, 0xA0, 0xB3, 0xA9, 0x3F, + 0xCD, 0xE3, 0xCD, 0xAD, 0x9F, 0x1C, 0xE5, 0x8B, + 0x26, 0x75, 0x1F, 0x67, 0xA3, 0xCB, 0xB1, 0x40, + 0xB1, 0x80, 0x8C, 0xF1, 0x87, 0xA4, 0xF4, 0xDF, + 0xC0, 0x4B, 0x05, 0x35, 0x7C, 0x5D, 0x1C, 0x0E, + 0xEA, 0xC4, 0xC6, 0x6F, 0x9F, 0xF7, 0xF2, 0xE6 }, + { 0xCD, 0xC8, 0x0D, 0x6F, 0xDD, 0xF1, 0x8C, 0xAB, + 0x34, 0xC2, 0x59, 0x09, 0xC9, 0x9A, 0x41, 0x74, + 0x67, 0xCE, 0x7F, 0x7F, 0x81, 0x17, 0x36, 0x21, + 0x96, 0x1A, 0x2B, 0x70, 0x17, 0x1D, 0x3D, 0x7A, + 0x2E, 0x1E, 0x8A, 0x1D, 0xD5, 0x9B, 0x88, 0xB1, + 0xC8, 0xE6, 0x0F, 0xED, 0x1E, 0xFA, 0xC4, 0xC9, + 0xC0, 0x5F, 0x9F, 0x9C, 0xA9, 0x83, 0x4F, 0xA0, + 0x42, 0xAE, 0x8F, 0xBA, 0x58, 0x4B, 0x09, 0xFF }, + { 0xDC, 0x7E, 0x84, 0xBF, 0xDA, 0x79, 0x16, 0x4B, + 0x7E, 0xCD, 0x84, 0x86, 0x98, 0x5D, 0x38, 0x60, + 0x39, 0xFF, 0xED, 0x14, 0x3B, 0x28, 0xB1, 0xC8, + 0x32, 0x11, 0x3C, 0x63, 0x31, 0xE5, 0x40, 0x7B, + 0xDF, 0x10, 0x13, 0x24, 0x15, 0xE5, 0x4B, 0x92, + 0xA1, 0x3E, 0xD0, 0xA8, 0x26, 0x7A, 0xE2, 0xF9, + 0x75, 0xA3, 0x85, 0x74, 0x1A, 0xB9, 0xCE, 0xF8, + 0x20, 0x31, 0x62, 0x3D, 0x55, 0xB1, 0xE4, 0x71 } +}; +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/* + * AES-CTR test vectors from: + * + * http://www.faqs.org/rfcs/rfc3686.html + */ + +static const unsigned char aes_test_ctr_key[3][16] = +{ + { 0xAE, 0x68, 0x52, 0xF8, 0x12, 0x10, 0x67, 0xCC, + 0x4B, 0xF7, 0xA5, 0x76, 0x55, 0x77, 0xF3, 0x9E }, + { 0x7E, 0x24, 0x06, 0x78, 0x17, 0xFA, 0xE0, 0xD7, + 0x43, 0xD6, 0xCE, 0x1F, 0x32, 0x53, 0x91, 0x63 }, + { 0x76, 0x91, 0xBE, 0x03, 0x5E, 0x50, 0x20, 0xA8, + 0xAC, 0x6E, 0x61, 0x85, 0x29, 0xF9, 0xA0, 0xDC } +}; + +static const unsigned char aes_test_ctr_nonce_counter[3][16] = +{ + { 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01 }, + { 0x00, 0x6C, 0xB6, 0xDB, 0xC0, 0x54, 0x3B, 0x59, + 0xDA, 0x48, 0xD9, 0x0B, 0x00, 0x00, 0x00, 0x01 }, + { 0x00, 0xE0, 0x01, 0x7B, 0x27, 0x77, 0x7F, 0x3F, + 0x4A, 0x17, 0x86, 0xF0, 0x00, 0x00, 0x00, 0x01 } +}; + +static const unsigned char aes_test_ctr_pt[3][48] = +{ + { 0x53, 0x69, 0x6E, 0x67, 0x6C, 0x65, 0x20, 0x62, + 0x6C, 0x6F, 0x63, 0x6B, 0x20, 0x6D, 0x73, 0x67 }, + + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F }, + + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, + 0x20, 0x21, 0x22, 0x23 } +}; + +static const unsigned char aes_test_ctr_ct[3][48] = +{ + { 0xE4, 0x09, 0x5D, 0x4F, 0xB7, 0xA7, 0xB3, 0x79, + 0x2D, 0x61, 0x75, 0xA3, 0x26, 0x13, 0x11, 0xB8 }, + { 0x51, 0x04, 0xA1, 0x06, 0x16, 0x8A, 0x72, 0xD9, + 0x79, 0x0D, 0x41, 0xEE, 0x8E, 0xDA, 0xD3, 0x88, + 0xEB, 0x2E, 0x1E, 0xFC, 0x46, 0xDA, 0x57, 0xC8, + 0xFC, 0xE6, 0x30, 0xDF, 0x91, 0x41, 0xBE, 0x28 }, + { 0xC1, 0xCF, 0x48, 0xA8, 0x9F, 0x2F, 0xFD, 0xD9, + 0xCF, 0x46, 0x52, 0xE9, 0xEF, 0xDB, 0x72, 0xD7, + 0x45, 0x40, 0xA4, 0x2B, 0xDE, 0x6D, 0x78, 0x36, + 0xD5, 0x9A, 0x5C, 0xEA, 0xAE, 0xF3, 0x10, 0x53, + 0x25, 0xB2, 0x07, 0x2F } +}; + +static const int aes_test_ctr_len[3] = + { 16, 32, 36 }; +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +/* + * Checkup routine + */ +int mbedtls_aes_self_test( int verbose ) +{ + int ret = 0, i, j, u, v; + unsigned char key[32]; + unsigned char buf[64]; + unsigned char iv[16]; +#if defined(MBEDTLS_CIPHER_MODE_CBC) + unsigned char prv[16]; +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) || defined(MBEDTLS_CIPHER_MODE_CFB) + size_t offset; +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + int len; + unsigned char nonce_counter[16]; + unsigned char stream_block[16]; +#endif + mbedtls_aes_context ctx; + + memset( key, 0, 32 ); + mbedtls_aes_init( &ctx ); + + /* + * ECB mode + */ + for( i = 0; i < 6; i++ ) + { + u = i >> 1; + v = i & 1; + + if( verbose != 0 ) + mbedtls_printf( " AES-ECB-%3d (%s): ", 128 + u * 64, + ( v == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + + memset( buf, 0, 16 ); + + if( v == MBEDTLS_AES_DECRYPT ) + { + mbedtls_aes_setkey_dec( &ctx, key, 128 + u * 64 ); + + for( j = 0; j < 10000; j++ ) + mbedtls_aes_crypt_ecb( &ctx, v, buf, buf ); + + if( memcmp( buf, aes_test_ecb_dec[u], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + else + { + mbedtls_aes_setkey_enc( &ctx, key, 128 + u * 64 ); + + for( j = 0; j < 10000; j++ ) + mbedtls_aes_crypt_ecb( &ctx, v, buf, buf ); + + if( memcmp( buf, aes_test_ecb_enc[u], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + /* + * CBC mode + */ + for( i = 0; i < 6; i++ ) + { + u = i >> 1; + v = i & 1; + + if( verbose != 0 ) + mbedtls_printf( " AES-CBC-%3d (%s): ", 128 + u * 64, + ( v == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + + memset( iv , 0, 16 ); + memset( prv, 0, 16 ); + memset( buf, 0, 16 ); + + if( v == MBEDTLS_AES_DECRYPT ) + { + mbedtls_aes_setkey_dec( &ctx, key, 128 + u * 64 ); + + for( j = 0; j < 10000; j++ ) + mbedtls_aes_crypt_cbc( &ctx, v, 16, iv, buf, buf ); + + if( memcmp( buf, aes_test_cbc_dec[u], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + else + { + mbedtls_aes_setkey_enc( &ctx, key, 128 + u * 64 ); + + for( j = 0; j < 10000; j++ ) + { + unsigned char tmp[16]; + + mbedtls_aes_crypt_cbc( &ctx, v, 16, iv, buf, buf ); + + memcpy( tmp, prv, 16 ); + memcpy( prv, buf, 16 ); + memcpy( buf, tmp, 16 ); + } + + if( memcmp( prv, aes_test_cbc_enc[u], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) + /* + * CFB128 mode + */ + for( i = 0; i < 6; i++ ) + { + u = i >> 1; + v = i & 1; + + if( verbose != 0 ) + mbedtls_printf( " AES-CFB128-%3d (%s): ", 128 + u * 64, + ( v == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + + memcpy( iv, aes_test_cfb128_iv, 16 ); + memcpy( key, aes_test_cfb128_key[u], 16 + u * 8 ); + + offset = 0; + mbedtls_aes_setkey_enc( &ctx, key, 128 + u * 64 ); + + if( v == MBEDTLS_AES_DECRYPT ) + { + memcpy( buf, aes_test_cfb128_ct[u], 64 ); + mbedtls_aes_crypt_cfb128( &ctx, v, 64, &offset, iv, buf, buf ); + + if( memcmp( buf, aes_test_cfb128_pt, 64 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + else + { + memcpy( buf, aes_test_cfb128_pt, 64 ); + mbedtls_aes_crypt_cfb128( &ctx, v, 64, &offset, iv, buf, buf ); + + if( memcmp( buf, aes_test_cfb128_ct[u], 64 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) + /* + * CTR mode + */ + for( i = 0; i < 6; i++ ) + { + u = i >> 1; + v = i & 1; + + if( verbose != 0 ) + mbedtls_printf( " AES-CTR-128 (%s): ", + ( v == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + + memcpy( nonce_counter, aes_test_ctr_nonce_counter[u], 16 ); + memcpy( key, aes_test_ctr_key[u], 16 ); + + offset = 0; + mbedtls_aes_setkey_enc( &ctx, key, 128 ); + + if( v == MBEDTLS_AES_DECRYPT ) + { + len = aes_test_ctr_len[u]; + memcpy( buf, aes_test_ctr_ct[u], len ); + + mbedtls_aes_crypt_ctr( &ctx, len, &offset, nonce_counter, stream_block, + buf, buf ); + + if( memcmp( buf, aes_test_ctr_pt[u], len ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + else + { + len = aes_test_ctr_len[u]; + memcpy( buf, aes_test_ctr_pt[u], len ); + + mbedtls_aes_crypt_ctr( &ctx, len, &offset, nonce_counter, stream_block, + buf, buf ); + + if( memcmp( buf, aes_test_ctr_ct[u], len ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + + ret = 0; + +exit: + mbedtls_aes_free( &ctx ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_AES_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/aesni.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/aesni.c new file mode 100644 index 0000000..83a5868 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/aesni.c @@ -0,0 +1,464 @@ +/* + * AES-NI support functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set + * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/ + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_AESNI_C) + +#include "mbedtls/aesni.h" + +#include + +#ifndef asm +#define asm __asm +#endif + +#if defined(MBEDTLS_HAVE_X86_64) + +/* + * AES-NI support detection routine + */ +int mbedtls_aesni_has_support( unsigned int what ) +{ + static int done = 0; + static unsigned int c = 0; + + if( ! done ) + { + asm( "movl $1, %%eax \n\t" + "cpuid \n\t" + : "=c" (c) + : + : "eax", "ebx", "edx" ); + done = 1; + } + + return( ( c & what ) != 0 ); +} + +/* + * Binutils needs to be at least 2.19 to support AES-NI instructions. + * Unfortunately, a lot of users have a lower version now (2014-04). + * Emit bytecode directly in order to support "old" version of gas. + * + * Opcodes from the Intel architecture reference manual, vol. 3. + * We always use registers, so we don't need prefixes for memory operands. + * Operand macros are in gas order (src, dst) as opposed to Intel order + * (dst, src) in order to blend better into the surrounding assembly code. + */ +#define AESDEC ".byte 0x66,0x0F,0x38,0xDE," +#define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF," +#define AESENC ".byte 0x66,0x0F,0x38,0xDC," +#define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD," +#define AESIMC ".byte 0x66,0x0F,0x38,0xDB," +#define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF," +#define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44," + +#define xmm0_xmm0 "0xC0" +#define xmm0_xmm1 "0xC8" +#define xmm0_xmm2 "0xD0" +#define xmm0_xmm3 "0xD8" +#define xmm0_xmm4 "0xE0" +#define xmm1_xmm0 "0xC1" +#define xmm1_xmm2 "0xD1" + +/* + * AES-NI AES-ECB block en(de)cryption + */ +int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ) +{ + asm( "movdqu (%3), %%xmm0 \n\t" // load input + "movdqu (%1), %%xmm1 \n\t" // load round key 0 + "pxor %%xmm1, %%xmm0 \n\t" // round 0 + "addq $16, %1 \n\t" // point to next round key + "subl $1, %0 \n\t" // normal rounds = nr - 1 + "test %2, %2 \n\t" // mode? + "jz 2f \n\t" // 0 = decrypt + + "1: \n\t" // encryption loop + "movdqu (%1), %%xmm1 \n\t" // load round key + AESENC xmm1_xmm0 "\n\t" // do round + "addq $16, %1 \n\t" // point to next round key + "subl $1, %0 \n\t" // loop + "jnz 1b \n\t" + "movdqu (%1), %%xmm1 \n\t" // load round key + AESENCLAST xmm1_xmm0 "\n\t" // last round + "jmp 3f \n\t" + + "2: \n\t" // decryption loop + "movdqu (%1), %%xmm1 \n\t" + AESDEC xmm1_xmm0 "\n\t" // do round + "addq $16, %1 \n\t" + "subl $1, %0 \n\t" + "jnz 2b \n\t" + "movdqu (%1), %%xmm1 \n\t" // load round key + AESDECLAST xmm1_xmm0 "\n\t" // last round + + "3: \n\t" + "movdqu %%xmm0, (%4) \n\t" // export output + : + : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output) + : "memory", "cc", "xmm0", "xmm1" ); + + + return( 0 ); +} + +/* + * GCM multiplication: c = a times b in GF(2^128) + * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5. + */ +void mbedtls_aesni_gcm_mult( unsigned char c[16], + const unsigned char a[16], + const unsigned char b[16] ) +{ + unsigned char aa[16], bb[16], cc[16]; + size_t i; + + /* The inputs are in big-endian order, so byte-reverse them */ + for( i = 0; i < 16; i++ ) + { + aa[i] = a[15 - i]; + bb[i] = b[15 - i]; + } + + asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0 + "movdqu (%1), %%xmm1 \n\t" // b1:b0 + + /* + * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1 + * using [CLMUL-WP] algorithm 1 (p. 13). + */ + "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0 + "movdqa %%xmm1, %%xmm3 \n\t" // same + "movdqa %%xmm1, %%xmm4 \n\t" // same + PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0 + PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0 + PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0 + PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0 + "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0 + "movdqa %%xmm4, %%xmm3 \n\t" // same + "psrldq $8, %%xmm4 \n\t" // 0:e1+f1 + "pslldq $8, %%xmm3 \n\t" // e0+f0:0 + "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1 + "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0 + + /* + * Now shift the result one bit to the left, + * taking advantage of [CLMUL-WP] eq 27 (p. 20) + */ + "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0 + "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2 + "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1 + "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1 + "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63 + "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63 + "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63 + "pslldq $8, %%xmm3 \n\t" // r0>>63:0 + "pslldq $8, %%xmm4 \n\t" // r2>>63:0 + "psrldq $8, %%xmm5 \n\t" // 0:r1>>63 + "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1 + "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1 + "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63 + + /* + * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1 + * using [CLMUL-WP] algorithm 5 (p. 20). + * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted). + */ + /* Step 2 (1) */ + "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0 + "movdqa %%xmm1, %%xmm4 \n\t" // same + "movdqa %%xmm1, %%xmm5 \n\t" // same + "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a + "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b + "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c + + /* Step 2 (2) */ + "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b + "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c + "pslldq $8, %%xmm3 \n\t" // a+b+c:0 + "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0 + + /* Steps 3 and 4 */ + "movdqa %%xmm1,%%xmm0 \n\t" // d:x0 + "movdqa %%xmm1,%%xmm4 \n\t" // same + "movdqa %%xmm1,%%xmm5 \n\t" // same + "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0' + "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0' + "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0' + "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0' + "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0' + // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing + // bits carried from d. Now get those\t bits back in. + "movdqa %%xmm1,%%xmm3 \n\t" // d:x0 + "movdqa %%xmm1,%%xmm4 \n\t" // same + "movdqa %%xmm1,%%xmm5 \n\t" // same + "psllq $63, %%xmm3 \n\t" // d<<63:stuff + "psllq $62, %%xmm4 \n\t" // d<<62:stuff + "psllq $57, %%xmm5 \n\t" // d<<57:stuff + "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff + "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff + "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d + "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0 + "pxor %%xmm1, %%xmm0 \n\t" // h1:h0 + "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0 + + "movdqu %%xmm0, (%2) \n\t" // done + : + : "r" (aa), "r" (bb), "r" (cc) + : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" ); + + /* Now byte-reverse the outputs */ + for( i = 0; i < 16; i++ ) + c[i] = cc[15 - i]; + + return; +} + +/* + * Compute decryption round keys from encryption round keys + */ +void mbedtls_aesni_inverse_key( unsigned char *invkey, + const unsigned char *fwdkey, int nr ) +{ + unsigned char *ik = invkey; + const unsigned char *fk = fwdkey + 16 * nr; + + memcpy( ik, fk, 16 ); + + for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 ) + asm( "movdqu (%0), %%xmm0 \n\t" + AESIMC xmm0_xmm0 "\n\t" + "movdqu %%xmm0, (%1) \n\t" + : + : "r" (fk), "r" (ik) + : "memory", "xmm0" ); + + memcpy( ik, fk, 16 ); +} + +/* + * Key expansion, 128-bit case + */ +static void aesni_setkey_enc_128( unsigned char *rk, + const unsigned char *key ) +{ + asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key + "movdqu %%xmm0, (%0) \n\t" // as round key 0 + "jmp 2f \n\t" // skip auxiliary routine + + /* + * Finish generating the next round key. + * + * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff + * with X = rot( sub( r3 ) ) ^ RCON. + * + * On exit, xmm0 is r7:r6:r5:r4 + * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3 + * and those are written to the round key buffer. + */ + "1: \n\t" + "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X + "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4 + "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0 + "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4 + "pslldq $4, %%xmm0 \n\t" // etc + "pxor %%xmm0, %%xmm1 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time! + "add $16, %0 \n\t" // point to next round key + "movdqu %%xmm0, (%0) \n\t" // write it + "ret \n\t" + + /* Main "loop" */ + "2: \n\t" + AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t" + : + : "r" (rk), "r" (key) + : "memory", "cc", "0" ); +} + +/* + * Key expansion, 192-bit case + */ +static void aesni_setkey_enc_192( unsigned char *rk, + const unsigned char *key ) +{ + asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key + "movdqu %%xmm0, (%0) \n\t" + "add $16, %0 \n\t" + "movq 16(%1), %%xmm1 \n\t" + "movq %%xmm1, (%0) \n\t" + "add $8, %0 \n\t" + "jmp 2f \n\t" // skip auxiliary routine + + /* + * Finish generating the next 6 quarter-keys. + * + * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4 + * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON. + * + * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10 + * and those are written to the round key buffer. + */ + "1: \n\t" + "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X + "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4 + "pslldq $4, %%xmm0 \n\t" // etc + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6 + "movdqu %%xmm0, (%0) \n\t" + "add $16, %0 \n\t" + "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9 + "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10 + "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0 + "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10 + "movq %%xmm1, (%0) \n\t" + "add $8, %0 \n\t" + "ret \n\t" + + "2: \n\t" + AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t" + + : + : "r" (rk), "r" (key) + : "memory", "cc", "0" ); +} + +/* + * Key expansion, 256-bit case + */ +static void aesni_setkey_enc_256( unsigned char *rk, + const unsigned char *key ) +{ + asm( "movdqu (%1), %%xmm0 \n\t" + "movdqu %%xmm0, (%0) \n\t" + "add $16, %0 \n\t" + "movdqu 16(%1), %%xmm1 \n\t" + "movdqu %%xmm1, (%0) \n\t" + "jmp 2f \n\t" // skip auxiliary routine + + /* + * Finish generating the next two round keys. + * + * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and + * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON + * + * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12 + * and those have been written to the output buffer. + */ + "1: \n\t" + "pshufd $0xff, %%xmm2, %%xmm2 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm2, %%xmm0 \n\t" + "add $16, %0 \n\t" + "movdqu %%xmm0, (%0) \n\t" + + /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 ) + * and proceed to generate next round key from there */ + AESKEYGENA xmm0_xmm2 ",0x00 \n\t" + "pshufd $0xaa, %%xmm2, %%xmm2 \n\t" + "pxor %%xmm1, %%xmm2 \n\t" + "pslldq $4, %%xmm1 \n\t" + "pxor %%xmm1, %%xmm2 \n\t" + "pslldq $4, %%xmm1 \n\t" + "pxor %%xmm1, %%xmm2 \n\t" + "pslldq $4, %%xmm1 \n\t" + "pxor %%xmm2, %%xmm1 \n\t" + "add $16, %0 \n\t" + "movdqu %%xmm1, (%0) \n\t" + "ret \n\t" + + /* + * Main "loop" - Generating one more key than necessary, + * see definition of mbedtls_aes_context.buf + */ + "2: \n\t" + AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t" + : + : "r" (rk), "r" (key) + : "memory", "cc", "0" ); +} + +/* + * Key expansion, wrapper + */ +int mbedtls_aesni_setkey_enc( unsigned char *rk, + const unsigned char *key, + size_t bits ) +{ + switch( bits ) + { + case 128: aesni_setkey_enc_128( rk, key ); break; + case 192: aesni_setkey_enc_192( rk, key ); break; + case 256: aesni_setkey_enc_256( rk, key ); break; + default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH ); + } + + return( 0 ); +} + +#endif /* MBEDTLS_HAVE_X86_64 */ + +#endif /* MBEDTLS_AESNI_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/arc4.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/arc4.c new file mode 100644 index 0000000..ff0e993 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/arc4.c @@ -0,0 +1,205 @@ +/* + * An implementation of the ARCFOUR algorithm + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The ARCFOUR algorithm was publicly disclosed on 94/09. + * + * http://groups.google.com/group/sci.crypt/msg/10a300c9d21afca0 + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ARC4_C) + +#include "mbedtls/arc4.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_ARC4_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +void mbedtls_arc4_init( mbedtls_arc4_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_arc4_context ) ); +} + +void mbedtls_arc4_free( mbedtls_arc4_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_arc4_context ) ); +} + +/* + * ARC4 key schedule + */ +void mbedtls_arc4_setup( mbedtls_arc4_context *ctx, const unsigned char *key, + unsigned int keylen ) +{ + int i, j, a; + unsigned int k; + unsigned char *m; + + ctx->x = 0; + ctx->y = 0; + m = ctx->m; + + for( i = 0; i < 256; i++ ) + m[i] = (unsigned char) i; + + j = k = 0; + + for( i = 0; i < 256; i++, k++ ) + { + if( k >= keylen ) k = 0; + + a = m[i]; + j = ( j + a + key[k] ) & 0xFF; + m[i] = m[j]; + m[j] = (unsigned char) a; + } +} + +/* + * ARC4 cipher function + */ +int mbedtls_arc4_crypt( mbedtls_arc4_context *ctx, size_t length, const unsigned char *input, + unsigned char *output ) +{ + int x, y, a, b; + size_t i; + unsigned char *m; + + x = ctx->x; + y = ctx->y; + m = ctx->m; + + for( i = 0; i < length; i++ ) + { + x = ( x + 1 ) & 0xFF; a = m[x]; + y = ( y + a ) & 0xFF; b = m[y]; + + m[x] = (unsigned char) b; + m[y] = (unsigned char) a; + + output[i] = (unsigned char) + ( input[i] ^ m[(unsigned char)( a + b )] ); + } + + ctx->x = x; + ctx->y = y; + + return( 0 ); +} + +#endif /* !MBEDTLS_ARC4_ALT */ + +#if defined(MBEDTLS_SELF_TEST) +/* + * ARC4 tests vectors as posted by Eric Rescorla in sep. 1994: + * + * http://groups.google.com/group/comp.security.misc/msg/10a300c9d21afca0 + */ +static const unsigned char arc4_test_key[3][8] = +{ + { 0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF }, + { 0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } +}; + +static const unsigned char arc4_test_pt[3][8] = +{ + { 0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } +}; + +static const unsigned char arc4_test_ct[3][8] = +{ + { 0x75, 0xB7, 0x87, 0x80, 0x99, 0xE0, 0xC5, 0x96 }, + { 0x74, 0x94, 0xC2, 0xE7, 0x10, 0x4B, 0x08, 0x79 }, + { 0xDE, 0x18, 0x89, 0x41, 0xA3, 0x37, 0x5D, 0x3A } +}; + +/* + * Checkup routine + */ +int mbedtls_arc4_self_test( int verbose ) +{ + int i, ret = 0; + unsigned char ibuf[8]; + unsigned char obuf[8]; + mbedtls_arc4_context ctx; + + mbedtls_arc4_init( &ctx ); + + for( i = 0; i < 3; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " ARC4 test #%d: ", i + 1 ); + + memcpy( ibuf, arc4_test_pt[i], 8 ); + + mbedtls_arc4_setup( &ctx, arc4_test_key[i], 8 ); + mbedtls_arc4_crypt( &ctx, 8, ibuf, obuf ); + + if( memcmp( obuf, arc4_test_ct[i], 8 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +exit: + mbedtls_arc4_free( &ctx ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_ARC4_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/asn1parse.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/asn1parse.c new file mode 100644 index 0000000..b37523d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/asn1parse.c @@ -0,0 +1,392 @@ +/* + * Generic ASN.1 parsing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ASN1_PARSE_C) + +#include "mbedtls/asn1.h" + +#include + +#if defined(MBEDTLS_BIGNUM_C) +#include "mbedtls/bignum.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * ASN.1 DER decoding routines + */ +int mbedtls_asn1_get_len( unsigned char **p, + const unsigned char *end, + size_t *len ) +{ + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + if( ( **p & 0x80 ) == 0 ) + *len = *(*p)++; + else + { + switch( **p & 0x7F ) + { + case 1: + if( ( end - *p ) < 2 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = (*p)[1]; + (*p) += 2; + break; + + case 2: + if( ( end - *p ) < 3 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = ( (size_t)(*p)[1] << 8 ) | (*p)[2]; + (*p) += 3; + break; + + case 3: + if( ( end - *p ) < 4 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = ( (size_t)(*p)[1] << 16 ) | + ( (size_t)(*p)[2] << 8 ) | (*p)[3]; + (*p) += 4; + break; + + case 4: + if( ( end - *p ) < 5 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = ( (size_t)(*p)[1] << 24 ) | ( (size_t)(*p)[2] << 16 ) | + ( (size_t)(*p)[3] << 8 ) | (*p)[4]; + (*p) += 5; + break; + + default: + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + } + } + + if( *len > (size_t) ( end - *p ) ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + return( 0 ); +} + +int mbedtls_asn1_get_tag( unsigned char **p, + const unsigned char *end, + size_t *len, int tag ) +{ + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + if( **p != tag ) + return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + (*p)++; + + return( mbedtls_asn1_get_len( p, end, len ) ); +} + +int mbedtls_asn1_get_bool( unsigned char **p, + const unsigned char *end, + int *val ) +{ + int ret; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_BOOLEAN ) ) != 0 ) + return( ret ); + + if( len != 1 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + *val = ( **p != 0 ) ? 1 : 0; + (*p)++; + + return( 0 ); +} + +int mbedtls_asn1_get_int( unsigned char **p, + const unsigned char *end, + int *val ) +{ + int ret; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 ) + return( ret ); + + if( len > sizeof( int ) || ( **p & 0x80 ) != 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + *val = 0; + + while( len-- > 0 ) + { + *val = ( *val << 8 ) | **p; + (*p)++; + } + + return( 0 ); +} + +#if defined(MBEDTLS_BIGNUM_C) +int mbedtls_asn1_get_mpi( unsigned char **p, + const unsigned char *end, + mbedtls_mpi *X ) +{ + int ret; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 ) + return( ret ); + + ret = mbedtls_mpi_read_binary( X, *p, len ); + + *p += len; + + return( ret ); +} +#endif /* MBEDTLS_BIGNUM_C */ + +int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end, + mbedtls_asn1_bitstring *bs) +{ + int ret; + + /* Certificate type is a single byte bitstring */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &bs->len, MBEDTLS_ASN1_BIT_STRING ) ) != 0 ) + return( ret ); + + /* Check length, subtract one for actual bit string length */ + if( bs->len < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + bs->len -= 1; + + /* Get number of unused bits, ensure unused bits <= 7 */ + bs->unused_bits = **p; + if( bs->unused_bits > 7 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + (*p)++; + + /* Get actual bitstring */ + bs->p = *p; + *p += bs->len; + + if( *p != end ) + return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * Get a bit string without unused bits + */ +int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end, + size_t *len ) +{ + int ret; + + if( ( ret = mbedtls_asn1_get_tag( p, end, len, MBEDTLS_ASN1_BIT_STRING ) ) != 0 ) + return( ret ); + + if( (*len)-- < 2 || *(*p)++ != 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_DATA ); + + return( 0 ); +} + + + +/* + * Parses and splits an ASN.1 "SEQUENCE OF " + */ +int mbedtls_asn1_get_sequence_of( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_sequence *cur, + int tag) +{ + int ret; + size_t len; + mbedtls_asn1_buf *buf; + + /* Get main sequence tag */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( ret ); + + if( *p + len != end ) + return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + while( *p < end ) + { + buf = &(cur->buf); + buf->tag = **p; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &buf->len, tag ) ) != 0 ) + return( ret ); + + buf->p = *p; + *p += buf->len; + + /* Allocate and assign next pointer */ + if( *p < end ) + { + cur->next = mbedtls_calloc( 1, sizeof( mbedtls_asn1_sequence ) ); + + if( cur->next == NULL ) + return( MBEDTLS_ERR_ASN1_ALLOC_FAILED ); + + cur = cur->next; + } + } + + /* Set final sequence entry's next pointer to NULL */ + cur->next = NULL; + + if( *p != end ) + return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +int mbedtls_asn1_get_alg( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg, mbedtls_asn1_buf *params ) +{ + int ret; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( ret ); + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + alg->tag = **p; + end = *p + len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &alg->len, MBEDTLS_ASN1_OID ) ) != 0 ) + return( ret ); + + alg->p = *p; + *p += alg->len; + + if( *p == end ) + { + mbedtls_zeroize( params, sizeof(mbedtls_asn1_buf) ); + return( 0 ); + } + + params->tag = **p; + (*p)++; + + if( ( ret = mbedtls_asn1_get_len( p, end, ¶ms->len ) ) != 0 ) + return( ret ); + + params->p = *p; + *p += params->len; + + if( *p != end ) + return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +int mbedtls_asn1_get_alg_null( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg ) +{ + int ret; + mbedtls_asn1_buf params; + + memset( ¶ms, 0, sizeof(mbedtls_asn1_buf) ); + + if( ( ret = mbedtls_asn1_get_alg( p, end, alg, ¶ms ) ) != 0 ) + return( ret ); + + if( ( params.tag != MBEDTLS_ASN1_NULL && params.tag != 0 ) || params.len != 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_DATA ); + + return( 0 ); +} + +void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *cur ) +{ + if( cur == NULL ) + return; + + mbedtls_free( cur->oid.p ); + mbedtls_free( cur->val.p ); + + mbedtls_zeroize( cur, sizeof( mbedtls_asn1_named_data ) ); +} + +void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head ) +{ + mbedtls_asn1_named_data *cur; + + while( ( cur = *head ) != NULL ) + { + *head = cur->next; + mbedtls_asn1_free_named_data( cur ); + mbedtls_free( cur ); + } +} + +mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( mbedtls_asn1_named_data *list, + const char *oid, size_t len ) +{ + while( list != NULL ) + { + if( list->oid.len == len && + memcmp( list->oid.p, oid, len ) == 0 ) + { + break; + } + + list = list->next; + } + + return( list ); +} + +#endif /* MBEDTLS_ASN1_PARSE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/asn1write.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/asn1write.c new file mode 100644 index 0000000..00ed73c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/asn1write.c @@ -0,0 +1,361 @@ +/* + * ASN.1 buffer writing functionality + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ASN1_WRITE_C) + +#include "mbedtls/asn1write.h" + +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +int mbedtls_asn1_write_len( unsigned char **p, unsigned char *start, size_t len ) +{ + if( len < 0x80 ) + { + if( *p - start < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *--(*p) = (unsigned char) len; + return( 1 ); + } + + if( len <= 0xFF ) + { + if( *p - start < 2 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *--(*p) = (unsigned char) len; + *--(*p) = 0x81; + return( 2 ); + } + + if( *p - start < 3 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + // We assume we never have lengths larger than 65535 bytes + // + *--(*p) = len % 256; + *--(*p) = ( len / 256 ) % 256; + *--(*p) = 0x82; + + return( 3 ); +} + +int mbedtls_asn1_write_tag( unsigned char **p, unsigned char *start, unsigned char tag ) +{ + if( *p - start < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *--(*p) = tag; + + return( 1 ); +} + +int mbedtls_asn1_write_raw_buffer( unsigned char **p, unsigned char *start, + const unsigned char *buf, size_t size ) +{ + size_t len = 0; + + if( *p < start || (size_t)( *p - start ) < size ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + len = size; + (*p) -= len; + memcpy( *p, buf, len ); + + return( (int) len ); +} + +#if defined(MBEDTLS_BIGNUM_C) +int mbedtls_asn1_write_mpi( unsigned char **p, unsigned char *start, const mbedtls_mpi *X ) +{ + int ret; + size_t len = 0; + + // Write the MPI + // + len = mbedtls_mpi_size( X ); + + if( *p < start || (size_t)( *p - start ) < len ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + (*p) -= len; + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( X, *p, len ) ); + + // DER format assumes 2s complement for numbers, so the leftmost bit + // should be 0 for positive numbers and 1 for negative numbers. + // + if( X->s ==1 && **p & 0x80 ) + { + if( *p - start < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *--(*p) = 0x00; + len += 1; + } + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_INTEGER ) ); + + ret = (int) len; + +cleanup: + return( ret ); +} +#endif /* MBEDTLS_BIGNUM_C */ + +int mbedtls_asn1_write_null( unsigned char **p, unsigned char *start ) +{ + int ret; + size_t len = 0; + + // Write NULL + // + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, 0) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_NULL ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_oid( unsigned char **p, unsigned char *start, + const char *oid, size_t oid_len ) +{ + int ret; + size_t len = 0; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, + (const unsigned char *) oid, oid_len ) ); + MBEDTLS_ASN1_CHK_ADD( len , mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len , mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_OID ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_algorithm_identifier( unsigned char **p, unsigned char *start, + const char *oid, size_t oid_len, + size_t par_len ) +{ + int ret; + size_t len = 0; + + if( par_len == 0 ) + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_null( p, start ) ); + else + len += par_len; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_oid( p, start, oid, oid_len ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_bool( unsigned char **p, unsigned char *start, int boolean ) +{ + int ret; + size_t len = 0; + + if( *p - start < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *--(*p) = (boolean) ? 255 : 0; + len++; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_BOOLEAN ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_int( unsigned char **p, unsigned char *start, int val ) +{ + int ret; + size_t len = 0; + + // TODO negative values and values larger than 128 + // DER format assumes 2s complement for numbers, so the leftmost bit + // should be 0 for positive numbers and 1 for negative numbers. + // + if( *p - start < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + len += 1; + *--(*p) = val; + + if( val > 0 && **p & 0x80 ) + { + if( *p - start < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *--(*p) = 0x00; + len += 1; + } + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_INTEGER ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_printable_string( unsigned char **p, unsigned char *start, + const char *text, size_t text_len ) +{ + int ret; + size_t len = 0; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, + (const unsigned char *) text, text_len ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_PRINTABLE_STRING ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_ia5_string( unsigned char **p, unsigned char *start, + const char *text, size_t text_len ) +{ + int ret; + size_t len = 0; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, + (const unsigned char *) text, text_len ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_IA5_STRING ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_bitstring( unsigned char **p, unsigned char *start, + const unsigned char *buf, size_t bits ) +{ + int ret; + size_t len = 0, size; + + size = ( bits / 8 ) + ( ( bits % 8 ) ? 1 : 0 ); + + // Calculate byte length + // + if( *p < start || (size_t)( *p - start ) < size + 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + len = size + 1; + (*p) -= size; + memcpy( *p, buf, size ); + + // Write unused bits + // + *--(*p) = (unsigned char) (size * 8 - bits); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_BIT_STRING ) ); + + return( (int) len ); +} + +int mbedtls_asn1_write_octet_string( unsigned char **p, unsigned char *start, + const unsigned char *buf, size_t size ) +{ + int ret; + size_t len = 0; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, buf, size ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_OCTET_STRING ) ); + + return( (int) len ); +} + +mbedtls_asn1_named_data *mbedtls_asn1_store_named_data( mbedtls_asn1_named_data **head, + const char *oid, size_t oid_len, + const unsigned char *val, + size_t val_len ) +{ + mbedtls_asn1_named_data *cur; + + if( ( cur = mbedtls_asn1_find_named_data( *head, oid, oid_len ) ) == NULL ) + { + // Add new entry if not present yet based on OID + // + if( ( cur = mbedtls_calloc( 1, sizeof(mbedtls_asn1_named_data) ) ) == NULL ) + return( NULL ); + + cur->oid.len = oid_len; + cur->oid.p = mbedtls_calloc( 1, oid_len ); + if( cur->oid.p == NULL ) + { + mbedtls_free( cur ); + return( NULL ); + } + + memcpy( cur->oid.p, oid, oid_len ); + + cur->val.len = val_len; + cur->val.p = mbedtls_calloc( 1, val_len ); + if( cur->val.p == NULL ) + { + mbedtls_free( cur->oid.p ); + mbedtls_free( cur ); + return( NULL ); + } + + cur->next = *head; + *head = cur; + } + else if( cur->val.len < val_len ) + { + /* + * Enlarge existing value buffer if needed + * Preserve old data until the allocation succeeded, to leave list in + * a consistent state in case allocation fails. + */ + void *p = mbedtls_calloc( 1, val_len ); + if( p == NULL ) + return( NULL ); + + mbedtls_free( cur->val.p ); + cur->val.p = p; + cur->val.len = val_len; + } + + if( val != NULL ) + memcpy( cur->val.p, val, val_len ); + + return( cur ); +} +#endif /* MBEDTLS_ASN1_WRITE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/base64.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/base64.c new file mode 100644 index 0000000..36be7aa --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/base64.c @@ -0,0 +1,289 @@ +/* + * RFC 1521 base64 encoding/decoding + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_BASE64_C) + +#include "mbedtls/base64.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#include +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +static const unsigned char base64_enc_map[64] ICACHE_RODATA_ATTR = +{ + 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', + 'K', 'L', 'M', 'N', 'O', 'P', 'Q', 'R', 'S', 'T', + 'U', 'V', 'W', 'X', 'Y', 'Z', 'a', 'b', 'c', 'd', + 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', + 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', + 'y', 'z', '0', '1', '2', '3', '4', '5', '6', '7', + '8', '9', '+', '/' +}; + +static const unsigned char base64_dec_map[128] ICACHE_RODATA_ATTR = +{ + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 62, 127, 127, 127, 63, 52, 53, + 54, 55, 56, 57, 58, 59, 60, 61, 127, 127, + 127, 64, 127, 127, 127, 0, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 127, 127, 127, 127, 127, 127, 26, 27, 28, + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, + 49, 50, 51, 127, 127, 127, 127, 127 +}; + +#define BASE64_SIZE_T_MAX ( (size_t) -1 ) /* SIZE_T_MAX is not standard */ + +/* + * Encode a buffer into base64 format + */ +int mbedtls_base64_encode( unsigned char *dst, size_t dlen, size_t *olen, + const unsigned char *src, size_t slen ) +{ + size_t i, n; + int C1, C2, C3; + unsigned char *p; + + if( slen == 0 ) + { + *olen = 0; + return( 0 ); + } + + n = slen / 3 + ( slen % 3 != 0 ); + + if( n > ( BASE64_SIZE_T_MAX - 1 ) / 4 ) + { + *olen = BASE64_SIZE_T_MAX; + return( MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL ); + } + + n *= 4; + + if( dlen < n + 1 ) + { + *olen = n + 1; + return( MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL ); + } + + n = ( slen / 3 ) * 3; + + for( i = 0, p = dst; i < n; i += 3 ) + { + C1 = *src++; + C2 = *src++; + C3 = *src++; + + *p++ = system_get_data_of_array_8(base64_enc_map, (C1 >> 2) & 0x3F); + *p++ = system_get_data_of_array_8(base64_enc_map, (((C1 & 3) << 4) + (C2 >> 4)) & 0x3F); + *p++ = system_get_data_of_array_8(base64_enc_map, (((C2 & 15) << 2) + (C3 >> 6)) & 0x3F); + *p++ = system_get_data_of_array_8(base64_enc_map, C3 & 0x3F); + } + + if( i < slen ) + { + C1 = *src++; + C2 = ( ( i + 1 ) < slen ) ? *src++ : 0; + + *p++ = system_get_data_of_array_8(base64_enc_map, (C1 >> 2) & 0x3F); + *p++ = system_get_data_of_array_8(base64_enc_map, (((C1 & 3) << 4) + (C2 >> 4)) & 0x3F); + + if( ( i + 1 ) < slen ) + *p++ = system_get_data_of_array_8(base64_enc_map, ((C2 & 15) << 2) & 0x3F); + else *p++ = '='; + + *p++ = '='; + } + + *olen = p - dst; + *p = 0; + + return( 0 ); +} + +/* + * Decode a base64-formatted buffer + */ +int mbedtls_base64_decode( unsigned char *dst, size_t dlen, size_t *olen, + const unsigned char *src, size_t slen ) +{ + size_t i, n; + uint32_t j, x; + unsigned char *p; + + /* First pass: check for validity and get output length */ + for( i = n = j = 0; i < slen; i++ ) + { + /* Skip spaces before checking for EOL */ + x = 0; + while( i < slen && src[i] == ' ' ) + { + ++i; + ++x; + } + + /* Spaces at end of buffer are OK */ + if( i == slen ) + break; + + if( ( slen - i ) >= 2 && + src[i] == '\r' && src[i + 1] == '\n' ) + continue; + + if( src[i] == '\n' ) + continue; + + /* Space inside a line is an error */ + if( x != 0 ) + return( MBEDTLS_ERR_BASE64_INVALID_CHARACTER ); + + if( src[i] == '=' && ++j > 2 ) + return( MBEDTLS_ERR_BASE64_INVALID_CHARACTER ); + + if( src[i] > 127 || system_get_data_of_array_8(base64_dec_map, src[i]) == 127 ) + return( MBEDTLS_ERR_BASE64_INVALID_CHARACTER ); + + if( system_get_data_of_array_8(base64_dec_map, src[i]) < 64 && j != 0 ) + return( MBEDTLS_ERR_BASE64_INVALID_CHARACTER ); + + n++; + } + + if( n == 0 ) + { + *olen = 0; + return( 0 ); + } + + n = ( ( n * 6 ) + 7 ) >> 3; + n -= j; + + if( dst == NULL || dlen < n ) + { + *olen = n; + return( MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL ); + } + + for( j = 3, n = x = 0, p = dst; i > 0; i--, src++ ) + { + if( *src == '\r' || *src == '\n' || *src == ' ' ) + continue; + + j -= ( system_get_data_of_array_8(base64_dec_map, *src) == 64 ); + x = ( x << 6 ) | ( system_get_data_of_array_8(base64_dec_map, *src) & 0x3F ); + + if( ++n == 4 ) + { + n = 0; + if( j > 0 ) *p++ = (unsigned char)( x >> 16 ); + if( j > 1 ) *p++ = (unsigned char)( x >> 8 ); + if( j > 2 ) *p++ = (unsigned char)( x ); + } + } + + *olen = p - dst; + + return( 0 ); +} + +#if defined(MBEDTLS_SELF_TEST) + +static const unsigned char base64_test_dec[64] = +{ + 0x24, 0x48, 0x6E, 0x56, 0x87, 0x62, 0x5A, 0xBD, + 0xBF, 0x17, 0xD9, 0xA2, 0xC4, 0x17, 0x1A, 0x01, + 0x94, 0xED, 0x8F, 0x1E, 0x11, 0xB3, 0xD7, 0x09, + 0x0C, 0xB6, 0xE9, 0x10, 0x6F, 0x22, 0xEE, 0x13, + 0xCA, 0xB3, 0x07, 0x05, 0x76, 0xC9, 0xFA, 0x31, + 0x6C, 0x08, 0x34, 0xFF, 0x8D, 0xC2, 0x6C, 0x38, + 0x00, 0x43, 0xE9, 0x54, 0x97, 0xAF, 0x50, 0x4B, + 0xD1, 0x41, 0xBA, 0x95, 0x31, 0x5A, 0x0B, 0x97 +}; + +static const unsigned char base64_test_enc[] = + "JEhuVodiWr2/F9mixBcaAZTtjx4Rs9cJDLbpEG8i7hPK" + "swcFdsn6MWwINP+Nwmw4AEPpVJevUEvRQbqVMVoLlw=="; + +/* + * Checkup routine + */ +int mbedtls_base64_self_test( int verbose ) +{ + size_t len; + const unsigned char *src; + unsigned char buffer[128]; + + if( verbose != 0 ) + mbedtls_printf( " Base64 encoding test: " ); + + src = base64_test_dec; + + if( mbedtls_base64_encode( buffer, sizeof( buffer ), &len, src, 64 ) != 0 || + memcmp( base64_test_enc, buffer, 88 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n Base64 decoding test: " ); + + src = base64_test_enc; + + if( mbedtls_base64_decode( buffer, sizeof( buffer ), &len, src, 88 ) != 0 || + memcmp( base64_test_dec, buffer, 64 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n\n" ); + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_BASE64_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/bignum.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/bignum.c new file mode 100644 index 0000000..c55fdb8 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/bignum.c @@ -0,0 +1,2433 @@ +/* + * Multi-precision integer library + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * The following sources were referenced in the design of this Multi-precision + * Integer library: + * + * [1] Handbook of Applied Cryptography - 1997 + * Menezes, van Oorschot and Vanstone + * + * [2] Multi-Precision Math + * Tom St Denis + * https://github.com/libtom/libtommath/blob/develop/tommath.pdf + * + * [3] GNU Multi-Precision Arithmetic Library + * https://gmplib.org/manual/index.html + * + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_BIGNUM_C) +#include "c_types.h" +#include "mbedtls/bignum.h" +#include "mbedtls/bn_mul.h" + +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#include +#define mbedtls_printf printf +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +#define ciL (sizeof(mbedtls_mpi_uint)) /* chars in limb */ +#define biL (ciL << 3) /* bits in limb */ +#define biH (ciL << 2) /* half limb size */ + +#define MPI_SIZE_T_MAX ( (size_t) -1 ) /* SIZE_T_MAX is not standard */ + +/* + * Convert between bits/chars and number of limbs + * Divide first in order to avoid potential overflows + */ +#define BITS_TO_LIMBS(i) ( (i) / biL + ( (i) % biL != 0 ) ) +#define CHARS_TO_LIMBS(i) ( (i) / ciL + ( (i) % ciL != 0 ) ) + +/* + * Initialize one MPI + */ +void mbedtls_mpi_init( mbedtls_mpi *X ) +{ + if( X == NULL ) + return; + + X->s = 1; + X->n = 0; + X->p = NULL; +} + +/* + * Unallocate one MPI + */ +void mbedtls_mpi_free( mbedtls_mpi *X ) +{ + if( X == NULL ) + return; + + if( X->p != NULL ) + { + mbedtls_zeroize( X->p, X->n * ciL ); + mbedtls_free( X->p ); + } + + X->s = 1; + X->n = 0; + X->p = NULL; +} + +/* + * Enlarge to the specified number of limbs + */ +int mbedtls_mpi_grow( mbedtls_mpi *X, size_t nblimbs ) +{ + mbedtls_mpi_uint *p; + + if( nblimbs > MBEDTLS_MPI_MAX_LIMBS ) + return( MBEDTLS_ERR_MPI_ALLOC_FAILED ); + + if( X->n < nblimbs ) + { + if( ( p = mbedtls_calloc( nblimbs, ciL ) ) == NULL ) + return( MBEDTLS_ERR_MPI_ALLOC_FAILED ); + + if( X->p != NULL ) + { + memcpy( p, X->p, X->n * ciL ); + mbedtls_zeroize( X->p, X->n * ciL ); + mbedtls_free( X->p ); + } + + X->n = nblimbs; + X->p = p; + } + + return( 0 ); +} + +/* + * Resize down as much as possible, + * while keeping at least the specified number of limbs + */ +int mbedtls_mpi_shrink( mbedtls_mpi *X, size_t nblimbs ) +{ + mbedtls_mpi_uint *p; + size_t i; + + /* Actually resize up in this case */ + if( X->n <= nblimbs ) + return( mbedtls_mpi_grow( X, nblimbs ) ); + + for( i = X->n - 1; i > 0; i-- ) + if( X->p[i] != 0 ) + break; + i++; + + if( i < nblimbs ) + i = nblimbs; + + if( ( p = mbedtls_calloc( i, ciL ) ) == NULL ) + return( MBEDTLS_ERR_MPI_ALLOC_FAILED ); + + if( X->p != NULL ) + { + memcpy( p, X->p, i * ciL ); + mbedtls_zeroize( X->p, X->n * ciL ); + mbedtls_free( X->p ); + } + + X->n = i; + X->p = p; + + return( 0 ); +} + +/* + * Copy the contents of Y into X + */ +int mbedtls_mpi_copy( mbedtls_mpi *X, const mbedtls_mpi *Y ) +{ + int ret; + size_t i; + + if( X == Y ) + return( 0 ); + + if( Y->p == NULL ) + { + mbedtls_mpi_free( X ); + return( 0 ); + } + + for( i = Y->n - 1; i > 0; i-- ) + if( Y->p[i] != 0 ) + break; + i++; + + X->s = Y->s; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i ) ); + + memset( X->p, 0, X->n * ciL ); + memcpy( X->p, Y->p, i * ciL ); + +cleanup: + + return( ret ); +} + +/* + * Swap the contents of X and Y + */ +void mbedtls_mpi_swap( mbedtls_mpi *X, mbedtls_mpi *Y ) +{ + mbedtls_mpi T; + + memcpy( &T, X, sizeof( mbedtls_mpi ) ); + memcpy( X, Y, sizeof( mbedtls_mpi ) ); + memcpy( Y, &T, sizeof( mbedtls_mpi ) ); +} + +/* + * Conditionally assign X = Y, without leaking information + * about whether the assignment was made or not. + * (Leaking information about the respective sizes of X and Y is ok however.) + */ +int mbedtls_mpi_safe_cond_assign( mbedtls_mpi *X, const mbedtls_mpi *Y, unsigned char assign ) +{ + int ret = 0; + size_t i; + + /* make sure assign is 0 or 1 in a time-constant manner */ + assign = (assign | (unsigned char)-assign) >> 7; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, Y->n ) ); + + X->s = X->s * ( 1 - assign ) + Y->s * assign; + + for( i = 0; i < Y->n; i++ ) + X->p[i] = X->p[i] * ( 1 - assign ) + Y->p[i] * assign; + + for( ; i < X->n; i++ ) + X->p[i] *= ( 1 - assign ); + +cleanup: + return( ret ); +} + +/* + * Conditionally swap X and Y, without leaking information + * about whether the swap was made or not. + * Here it is not ok to simply swap the pointers, which whould lead to + * different memory access patterns when X and Y are used afterwards. + */ +int mbedtls_mpi_safe_cond_swap( mbedtls_mpi *X, mbedtls_mpi *Y, unsigned char swap ) +{ + int ret, s; + size_t i; + mbedtls_mpi_uint tmp; + + if( X == Y ) + return( 0 ); + + /* make sure swap is 0 or 1 in a time-constant manner */ + swap = (swap | (unsigned char)-swap) >> 7; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, Y->n ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( Y, X->n ) ); + + s = X->s; + X->s = X->s * ( 1 - swap ) + Y->s * swap; + Y->s = Y->s * ( 1 - swap ) + s * swap; + + + for( i = 0; i < X->n; i++ ) + { + tmp = X->p[i]; + X->p[i] = X->p[i] * ( 1 - swap ) + Y->p[i] * swap; + Y->p[i] = Y->p[i] * ( 1 - swap ) + tmp * swap; + } + +cleanup: + return( ret ); +} + +/* + * Set value from integer + */ +int mbedtls_mpi_lset( mbedtls_mpi *X, mbedtls_mpi_sint z ) +{ + int ret; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, 1 ) ); + memset( X->p, 0, X->n * ciL ); + + X->p[0] = ( z < 0 ) ? -z : z; + X->s = ( z < 0 ) ? -1 : 1; + +cleanup: + + return( ret ); +} + +/* + * Get a specific bit + */ +int mbedtls_mpi_get_bit( const mbedtls_mpi *X, size_t pos ) +{ + if( X->n * biL <= pos ) + return( 0 ); + + return( ( X->p[pos / biL] >> ( pos % biL ) ) & 0x01 ); +} + +/* + * Set a bit to a specific value of 0 or 1 + */ +int mbedtls_mpi_set_bit( mbedtls_mpi *X, size_t pos, unsigned char val ) +{ + int ret = 0; + size_t off = pos / biL; + size_t idx = pos % biL; + + if( val != 0 && val != 1 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + if( X->n * biL <= pos ) + { + if( val == 0 ) + return( 0 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, off + 1 ) ); + } + + X->p[off] &= ~( (mbedtls_mpi_uint) 0x01 << idx ); + X->p[off] |= (mbedtls_mpi_uint) val << idx; + +cleanup: + + return( ret ); +} + +/* + * Return the number of less significant zero-bits + */ +size_t mbedtls_mpi_lsb( const mbedtls_mpi *X ) +{ + size_t i, j, count = 0; + + for( i = 0; i < X->n; i++ ) + for( j = 0; j < biL; j++, count++ ) + if( ( ( X->p[i] >> j ) & 1 ) != 0 ) + return( count ); + + return( 0 ); +} + +/* + * Count leading zero bits in a given integer + */ +static size_t mbedtls_clz( const mbedtls_mpi_uint x ) +{ + size_t j; + mbedtls_mpi_uint mask = (mbedtls_mpi_uint) 1 << (biL - 1); + + for( j = 0; j < biL; j++ ) + { + if( x & mask ) break; + + mask >>= 1; + } + + return j; +} + +/* + * Return the number of bits + */ +size_t mbedtls_mpi_bitlen( const mbedtls_mpi *X ) +{ + size_t i, j; + + if( X->n == 0 ) + return( 0 ); + + for( i = X->n - 1; i > 0; i-- ) + if( X->p[i] != 0 ) + break; + + j = biL - mbedtls_clz( X->p[i] ); + + return( ( i * biL ) + j ); +} + +/* + * Return the total size in bytes + */ +size_t mbedtls_mpi_size( const mbedtls_mpi *X ) +{ + return( ( mbedtls_mpi_bitlen( X ) + 7 ) >> 3 ); +} + +/* + * Convert an ASCII character to digit value + */ +static int mpi_get_digit( mbedtls_mpi_uint *d, int radix, char c ) +{ + *d = 255; + + if( c >= 0x30 && c <= 0x39 ) *d = c - 0x30; + if( c >= 0x41 && c <= 0x46 ) *d = c - 0x37; + if( c >= 0x61 && c <= 0x66 ) *d = c - 0x57; + + if( *d >= (mbedtls_mpi_uint) radix ) + return( MBEDTLS_ERR_MPI_INVALID_CHARACTER ); + + return( 0 ); +} + +/* + * Import from an ASCII string + */ +int mbedtls_mpi_read_string( mbedtls_mpi *X, int radix, const char *s ) +{ + int ret; + size_t i, j, slen, n; + mbedtls_mpi_uint d; + mbedtls_mpi T; + + if( radix < 2 || radix > 16 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + mbedtls_mpi_init( &T ); + + slen = strlen( s ); + + if( radix == 16 ) + { + if( slen > MPI_SIZE_T_MAX >> 2 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + n = BITS_TO_LIMBS( slen << 2 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, n ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( X, 0 ) ); + + for( i = slen, j = 0; i > 0; i--, j++ ) + { + if( i == 1 && s[i - 1] == '-' ) + { + X->s = -1; + break; + } + + MBEDTLS_MPI_CHK( mpi_get_digit( &d, radix, s[i - 1] ) ); + X->p[j / ( 2 * ciL )] |= d << ( ( j % ( 2 * ciL ) ) << 2 ); + } + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( X, 0 ) ); + + for( i = 0; i < slen; i++ ) + { + if( i == 0 && s[i] == '-' ) + { + X->s = -1; + continue; + } + + MBEDTLS_MPI_CHK( mpi_get_digit( &d, radix, s[i] ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T, X, radix ) ); + + if( X->s == 1 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( X, &T, d ) ); + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( X, &T, d ) ); + } + } + } + +cleanup: + + mbedtls_mpi_free( &T ); + + return( ret ); +} + +/* + * Helper to write the digits high-order first + */ +static int mpi_write_hlp( mbedtls_mpi *X, int radix, char **p ) +{ + int ret; + mbedtls_mpi_uint r; + + if( radix < 2 || radix > 16 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_int( &r, X, radix ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_div_int( X, NULL, X, radix ) ); + + if( mbedtls_mpi_cmp_int( X, 0 ) != 0 ) + MBEDTLS_MPI_CHK( mpi_write_hlp( X, radix, p ) ); + + if( r < 10 ) + *(*p)++ = (char)( r + 0x30 ); + else + *(*p)++ = (char)( r + 0x37 ); + +cleanup: + + return( ret ); +} + +/* + * Export into an ASCII string + */ +int mbedtls_mpi_write_string( const mbedtls_mpi *X, int radix, + char *buf, size_t buflen, size_t *olen ) +{ + int ret = 0; + size_t n; + char *p; + mbedtls_mpi T; + + if( radix < 2 || radix > 16 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + n = mbedtls_mpi_bitlen( X ); + if( radix >= 4 ) n >>= 1; + if( radix >= 16 ) n >>= 1; + n += 3; + + if( buflen < n ) + { + *olen = n; + return( MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL ); + } + + p = buf; + mbedtls_mpi_init( &T ); + + if( X->s == -1 ) + *p++ = '-'; + + if( radix == 16 ) + { + int c; + size_t i, j, k; + + for( i = X->n, k = 0; i > 0; i-- ) + { + for( j = ciL; j > 0; j-- ) + { + c = ( X->p[i - 1] >> ( ( j - 1 ) << 3) ) & 0xFF; + + if( c == 0 && k == 0 && ( i + j ) != 2 ) + continue; + + *(p++) = "0123456789ABCDEF" [c / 16]; + *(p++) = "0123456789ABCDEF" [c % 16]; + k = 1; + } + } + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &T, X ) ); + + if( T.s == -1 ) + T.s = 1; + + MBEDTLS_MPI_CHK( mpi_write_hlp( &T, radix, &p ) ); + } + + *p++ = '\0'; + *olen = p - buf; + +cleanup: + + mbedtls_mpi_free( &T ); + + return( ret ); +} + +#if defined(MBEDTLS_FS_IO) +/* + * Read X from an opened file + */ +int mbedtls_mpi_read_file( mbedtls_mpi *X, int radix, FILE *fin ) +{ + mbedtls_mpi_uint d; + size_t slen; + char *p; + /* + * Buffer should have space for (short) label and decimal formatted MPI, + * newline characters and '\0' + */ + char s[ MBEDTLS_MPI_RW_BUFFER_SIZE ]; + + memset( s, 0, sizeof( s ) ); + if( fgets( s, sizeof( s ) - 1, fin ) == NULL ) + return( MBEDTLS_ERR_MPI_FILE_IO_ERROR ); + + slen = strlen( s ); + if( slen == sizeof( s ) - 2 ) + return( MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL ); + + if( s[slen - 1] == '\n' ) { slen--; s[slen] = '\0'; } + if( s[slen - 1] == '\r' ) { slen--; s[slen] = '\0'; } + + p = s + slen; + while( --p >= s ) + if( mpi_get_digit( &d, radix, *p ) != 0 ) + break; + + return( mbedtls_mpi_read_string( X, radix, p + 1 ) ); +} + +/* + * Write X into an opened file (or stdout if fout == NULL) + */ +int mbedtls_mpi_write_file( const char *p, const mbedtls_mpi *X, int radix, FILE *fout ) +{ + int ret; + size_t n, slen, plen; + /* + * Buffer should have space for (short) label and decimal formatted MPI, + * newline characters and '\0' + */ + char s[ MBEDTLS_MPI_RW_BUFFER_SIZE ]; + + memset( s, 0, sizeof( s ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_write_string( X, radix, s, sizeof( s ) - 2, &n ) ); + + if( p == NULL ) p = ""; + + plen = strlen( p ); + slen = strlen( s ); + s[slen++] = '\r'; + s[slen++] = '\n'; + + if( fout != NULL ) + { + if( fwrite( p, 1, plen, fout ) != plen || + fwrite( s, 1, slen, fout ) != slen ) + return( MBEDTLS_ERR_MPI_FILE_IO_ERROR ); + } + else + mbedtls_printf( "%s%s", p, s ); + +cleanup: + + return( ret ); +} +#endif /* MBEDTLS_FS_IO */ + +/* + * Import X from unsigned binary data, big endian + */ +int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf, size_t buflen ) +{ + int ret; + size_t i, j, n; + + for( n = 0; n < buflen; n++ ) + if( buf[n] != 0 ) + break; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, CHARS_TO_LIMBS( buflen - n ) ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( X, 0 ) ); + + for( i = buflen, j = 0; i > n; i--, j++ ) + X->p[j / ciL] |= ((mbedtls_mpi_uint) buf[i - 1]) << ((j % ciL) << 3); + +cleanup: + + return( ret ); +} + +/* + * Export X into unsigned binary data, big endian + */ +int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf, size_t buflen ) +{ + size_t i, j, n; + + n = mbedtls_mpi_size( X ); + + if( buflen < n ) + return( MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL ); + + memset( buf, 0, buflen ); + + for( i = buflen - 1, j = 0; n > 0; i--, j++, n-- ) + buf[i] = (unsigned char)( X->p[j / ciL] >> ((j % ciL) << 3) ); + + return( 0 ); +} + +/* + * Left-shift: X <<= count + */ +int mbedtls_mpi_shift_l( mbedtls_mpi *X, size_t count ) +{ + int ret; + size_t i, v0, t1; + mbedtls_mpi_uint r0 = 0, r1; + + v0 = count / (biL ); + t1 = count & (biL - 1); + + i = mbedtls_mpi_bitlen( X ) + count; + + if( X->n * biL < i ) + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, BITS_TO_LIMBS( i ) ) ); + + ret = 0; + + /* + * shift by count / limb_size + */ + if( v0 > 0 ) + { + for( i = X->n; i > v0; i-- ) + X->p[i - 1] = X->p[i - v0 - 1]; + + for( ; i > 0; i-- ) + X->p[i - 1] = 0; + } + + /* + * shift by count % limb_size + */ + if( t1 > 0 ) + { + for( i = v0; i < X->n; i++ ) + { + r1 = X->p[i] >> (biL - t1); + X->p[i] <<= t1; + X->p[i] |= r0; + r0 = r1; + } + } + +cleanup: + + return( ret ); +} + +/* + * Right-shift: X >>= count + */ +int mbedtls_mpi_shift_r( mbedtls_mpi *X, size_t count ) +{ + size_t i, v0, v1; + mbedtls_mpi_uint r0 = 0, r1; + + v0 = count / biL; + v1 = count & (biL - 1); + + if( v0 > X->n || ( v0 == X->n && v1 > 0 ) ) + return mbedtls_mpi_lset( X, 0 ); + + /* + * shift by count / limb_size + */ + if( v0 > 0 ) + { + for( i = 0; i < X->n - v0; i++ ) + X->p[i] = X->p[i + v0]; + + for( ; i < X->n; i++ ) + X->p[i] = 0; + } + + /* + * shift by count % limb_size + */ + if( v1 > 0 ) + { + for( i = X->n; i > 0; i-- ) + { + r1 = X->p[i - 1] << (biL - v1); + X->p[i - 1] >>= v1; + X->p[i - 1] |= r0; + r0 = r1; + } + } + + return( 0 ); +} + +/* + * Compare unsigned values + */ +int mbedtls_mpi_cmp_abs( const mbedtls_mpi *X, const mbedtls_mpi *Y ) +{ + size_t i, j; + + for( i = X->n; i > 0; i-- ) + if( X->p[i - 1] != 0 ) + break; + + for( j = Y->n; j > 0; j-- ) + if( Y->p[j - 1] != 0 ) + break; + + if( i == 0 && j == 0 ) + return( 0 ); + + if( i > j ) return( 1 ); + if( j > i ) return( -1 ); + + for( ; i > 0; i-- ) + { + if( X->p[i - 1] > Y->p[i - 1] ) return( 1 ); + if( X->p[i - 1] < Y->p[i - 1] ) return( -1 ); + } + + return( 0 ); +} + +/* + * Compare signed values + */ +int mbedtls_mpi_cmp_mpi( const mbedtls_mpi *X, const mbedtls_mpi *Y ) +{ + size_t i, j; + + for( i = X->n; i > 0; i-- ) + if( X->p[i - 1] != 0 ) + break; + + for( j = Y->n; j > 0; j-- ) + if( Y->p[j - 1] != 0 ) + break; + + if( i == 0 && j == 0 ) + return( 0 ); + + if( i > j ) return( X->s ); + if( j > i ) return( -Y->s ); + + if( X->s > 0 && Y->s < 0 ) return( 1 ); + if( Y->s > 0 && X->s < 0 ) return( -1 ); + + for( ; i > 0; i-- ) + { + if( X->p[i - 1] > Y->p[i - 1] ) return( X->s ); + if( X->p[i - 1] < Y->p[i - 1] ) return( -X->s ); + } + + return( 0 ); +} + +/* + * Compare signed values + */ +int mbedtls_mpi_cmp_int( const mbedtls_mpi *X, mbedtls_mpi_sint z ) +{ + mbedtls_mpi Y; + mbedtls_mpi_uint p[1]; + + *p = ( z < 0 ) ? -z : z; + Y.s = ( z < 0 ) ? -1 : 1; + Y.n = 1; + Y.p = p; + + return( mbedtls_mpi_cmp_mpi( X, &Y ) ); +} + +/* + * Unsigned addition: X = |A| + |B| (HAC 14.7) + */ +int mbedtls_mpi_add_abs( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + int ret; + size_t i, j; + mbedtls_mpi_uint *o, *p, c; + + if( X == B ) + { + const mbedtls_mpi *T = A; A = X; B = T; + } + + if( X != A ) + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, A ) ); + + /* + * X should always be positive as a result of unsigned additions. + */ + X->s = 1; + + for( j = B->n; j > 0; j-- ) + if( B->p[j - 1] != 0 ) + break; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) ); + + o = B->p; p = X->p; c = 0; + + for( i = 0; i < j; i++, o++, p++ ) + { + *p += c; c = ( *p < c ); + *p += *o; c += ( *p < *o ); + } + + while( c != 0 ) + { + if( i >= X->n ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + 1 ) ); + p = X->p + i; + } + + *p += c; c = ( *p < c ); i++; p++; + } + +cleanup: + + return( ret ); +} + +/* + * Helper for mbedtls_mpi subtraction + */ +static void mpi_sub_hlp( size_t n, mbedtls_mpi_uint *s, mbedtls_mpi_uint *d ) +{ + size_t i; + mbedtls_mpi_uint c, z; + + for( i = c = 0; i < n; i++, s++, d++ ) + { + z = ( *d < c ); *d -= c; + c = ( *d < *s ) + z; *d -= *s; + } + + while( c != 0 ) + { + z = ( *d < c ); *d -= c; + c = z; i++; d++; + } +} + +/* + * Unsigned subtraction: X = |A| - |B| (HAC 14.9) + */ +int mbedtls_mpi_sub_abs( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + mbedtls_mpi TB; + int ret; + size_t n; + + if( mbedtls_mpi_cmp_abs( A, B ) < 0 ) + return( MBEDTLS_ERR_MPI_NEGATIVE_VALUE ); + + mbedtls_mpi_init( &TB ); + + if( X == B ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TB, B ) ); + B = &TB; + } + + if( X != A ) + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, A ) ); + + /* + * X should always be positive as a result of unsigned subtractions. + */ + X->s = 1; + + ret = 0; + + for( n = B->n; n > 0; n-- ) + if( B->p[n - 1] != 0 ) + break; + + mpi_sub_hlp( n, B->p, X->p ); + +cleanup: + + mbedtls_mpi_free( &TB ); + + return( ret ); +} + +/* + * Signed addition: X = A + B + */ +int mbedtls_mpi_add_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + int ret, s = A->s; + + if( A->s * B->s < 0 ) + { + if( mbedtls_mpi_cmp_abs( A, B ) >= 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, A, B ) ); + X->s = s; + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) ); + X->s = -s; + } + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) ); + X->s = s; + } + +cleanup: + + return( ret ); +} + +/* + * Signed subtraction: X = A - B + */ +int mbedtls_mpi_sub_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + int ret, s = A->s; + + if( A->s * B->s > 0 ) + { + if( mbedtls_mpi_cmp_abs( A, B ) >= 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, A, B ) ); + X->s = s; + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) ); + X->s = -s; + } + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) ); + X->s = s; + } + +cleanup: + + return( ret ); +} + +/* + * Signed addition: X = A + b + */ +int mbedtls_mpi_add_int( mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_sint b ) +{ + mbedtls_mpi _B; + mbedtls_mpi_uint p[1]; + + p[0] = ( b < 0 ) ? -b : b; + _B.s = ( b < 0 ) ? -1 : 1; + _B.n = 1; + _B.p = p; + + return( mbedtls_mpi_add_mpi( X, A, &_B ) ); +} + +/* + * Signed subtraction: X = A - b + */ +int mbedtls_mpi_sub_int( mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_sint b ) +{ + mbedtls_mpi _B; + mbedtls_mpi_uint p[1]; + + p[0] = ( b < 0 ) ? -b : b; + _B.s = ( b < 0 ) ? -1 : 1; + _B.n = 1; + _B.p = p; + + return( mbedtls_mpi_sub_mpi( X, A, &_B ) ); +} + +/* + * Helper for mbedtls_mpi multiplication + */ +static +#if defined(__APPLE__) && defined(__arm__) +/* + * Apple LLVM version 4.2 (clang-425.0.24) (based on LLVM 3.2svn) + * appears to need this to prevent bad ARM code generation at -O3. + */ +__attribute__ ((noinline)) +#endif +void mpi_mul_hlp( size_t i, mbedtls_mpi_uint *s, mbedtls_mpi_uint *d, mbedtls_mpi_uint b ) +{ + mbedtls_mpi_uint c = 0, t = 0; + +#if defined(MULADDC_HUIT) + for( ; i >= 8; i -= 8 ) + { + MULADDC_INIT + MULADDC_HUIT + MULADDC_STOP + } + + for( ; i > 0; i-- ) + { + MULADDC_INIT + MULADDC_CORE + MULADDC_STOP + } +#else /* MULADDC_HUIT */ + for( ; i >= 16; i -= 16 ) + { + MULADDC_INIT + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_STOP + } + + for( ; i >= 8; i -= 8 ) + { + MULADDC_INIT + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_STOP + } + + for( ; i > 0; i-- ) + { + MULADDC_INIT + MULADDC_CORE + MULADDC_STOP + } +#endif /* MULADDC_HUIT */ + + t++; + + do { + *d += c; c = ( *d < c ); d++; + } + while( c != 0 ); +} + +/* + * Baseline multiplication: X = A * B (HAC 14.12) + */ +int mbedtls_mpi_mul_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + int ret; + size_t i, j; + mbedtls_mpi TA, TB; + + mbedtls_mpi_init( &TA ); mbedtls_mpi_init( &TB ); + + if( X == A ) { MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TA, A ) ); A = &TA; } + if( X == B ) { MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TB, B ) ); B = &TB; } + + for( i = A->n; i > 0; i-- ) + if( A->p[i - 1] != 0 ) + break; + + for( j = B->n; j > 0; j-- ) + if( B->p[j - 1] != 0 ) + break; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + j ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( X, 0 ) ); + + for( i++; j > 0; j-- ) + mpi_mul_hlp( i - 1, A->p, X->p + j - 1, B->p[j - 1] ); + + X->s = A->s * B->s; + +cleanup: + + mbedtls_mpi_free( &TB ); mbedtls_mpi_free( &TA ); + + return( ret ); +} + +/* + * Baseline multiplication: X = A * b + */ +int mbedtls_mpi_mul_int( mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_uint b ) +{ + mbedtls_mpi _B; + mbedtls_mpi_uint p[1]; + + _B.s = 1; + _B.n = 1; + _B.p = p; + p[0] = b; + + return( mbedtls_mpi_mul_mpi( X, A, &_B ) ); +} + +/* + * Unsigned integer divide - double mbedtls_mpi_uint dividend, u1/u0, and + * mbedtls_mpi_uint divisor, d + */ +static mbedtls_mpi_uint mbedtls_int_div_int( mbedtls_mpi_uint u1, + mbedtls_mpi_uint u0, mbedtls_mpi_uint d, mbedtls_mpi_uint *r ) +{ +#if defined(MBEDTLS_HAVE_UDBL) + mbedtls_t_udbl dividend, quotient; +#else + const mbedtls_mpi_uint radix = (mbedtls_mpi_uint) 1 << biH; + const mbedtls_mpi_uint uint_halfword_mask = ( (mbedtls_mpi_uint) 1 << biH ) - 1; + mbedtls_mpi_uint d0, d1, q0, q1, rAX, r0, quotient; + mbedtls_mpi_uint u0_msw, u0_lsw; + size_t s; +#endif + + /* + * Check for overflow + */ + if( 0 == d || u1 >= d ) + { + if (r != NULL) *r = ~0; + + return ( ~0 ); + } + +#if defined(MBEDTLS_HAVE_UDBL) + dividend = (mbedtls_t_udbl) u1 << biL; + dividend |= (mbedtls_t_udbl) u0; + quotient = dividend / d; + if( quotient > ( (mbedtls_t_udbl) 1 << biL ) - 1 ) + quotient = ( (mbedtls_t_udbl) 1 << biL ) - 1; + + if( r != NULL ) + *r = (mbedtls_mpi_uint)( dividend - (quotient * d ) ); + + return (mbedtls_mpi_uint) quotient; +#else + + /* + * Algorithm D, Section 4.3.1 - The Art of Computer Programming + * Vol. 2 - Seminumerical Algorithms, Knuth + */ + + /* + * Normalize the divisor, d, and dividend, u0, u1 + */ + s = mbedtls_clz( d ); + d = d << s; + + u1 = u1 << s; + u1 |= ( u0 >> ( biL - s ) ) & ( -(mbedtls_mpi_sint)s >> ( biL - 1 ) ); + u0 = u0 << s; + + d1 = d >> biH; + d0 = d & uint_halfword_mask; + + u0_msw = u0 >> biH; + u0_lsw = u0 & uint_halfword_mask; + + /* + * Find the first quotient and remainder + */ + q1 = u1 / d1; + r0 = u1 - d1 * q1; + + while( q1 >= radix || ( q1 * d0 > radix * r0 + u0_msw ) ) + { + q1 -= 1; + r0 += d1; + + if ( r0 >= radix ) break; + } + + rAX = ( u1 * radix ) + ( u0_msw - q1 * d ); + q0 = rAX / d1; + r0 = rAX - q0 * d1; + + while( q0 >= radix || ( q0 * d0 > radix * r0 + u0_lsw ) ) + { + q0 -= 1; + r0 += d1; + + if ( r0 >= radix ) break; + } + + if (r != NULL) + *r = ( rAX * radix + u0_lsw - q0 * d ) >> s; + + quotient = q1 * radix + q0; + + return quotient; +#endif +} + +/* + * Division by mbedtls_mpi: A = Q * B + R (HAC 14.20) + */ +int mbedtls_mpi_div_mpi( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + int ret; + size_t i, n, t, k; + mbedtls_mpi X, Y, Z, T1, T2; + + if( mbedtls_mpi_cmp_int( B, 0 ) == 0 ) + return( MBEDTLS_ERR_MPI_DIVISION_BY_ZERO ); + + mbedtls_mpi_init( &X ); mbedtls_mpi_init( &Y ); mbedtls_mpi_init( &Z ); + mbedtls_mpi_init( &T1 ); mbedtls_mpi_init( &T2 ); + + if( mbedtls_mpi_cmp_abs( A, B ) < 0 ) + { + if( Q != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_lset( Q, 0 ) ); + if( R != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, A ) ); + return( 0 ); + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &X, A ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Y, B ) ); + X.s = Y.s = 1; + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &Z, A->n + 2 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &Z, 0 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T1, 2 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T2, 3 ) ); + + k = mbedtls_mpi_bitlen( &Y ) % biL; + if( k < biL - 1 ) + { + k = biL - 1 - k; + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &X, k ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &Y, k ) ); + } + else k = 0; + + n = X.n - 1; + t = Y.n - 1; + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &Y, biL * ( n - t ) ) ); + + while( mbedtls_mpi_cmp_mpi( &X, &Y ) >= 0 ) + { + Z.p[n - t]++; + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &Y ) ); + } + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &Y, biL * ( n - t ) ) ); + + for( i = n; i > t ; i-- ) + { + if( X.p[i] >= Y.p[t] ) + Z.p[i - t - 1] = ~0; + else + { + Z.p[i - t - 1] = mbedtls_int_div_int( X.p[i], X.p[i - 1], + Y.p[t], NULL); + } + + Z.p[i - t - 1]++; + do + { + Z.p[i - t - 1]--; + + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &T1, 0 ) ); + T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1]; + T1.p[1] = Y.p[t]; + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &T1, Z.p[i - t - 1] ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &T2, 0 ) ); + T2.p[0] = ( i < 2 ) ? 0 : X.p[i - 2]; + T2.p[1] = ( i < 1 ) ? 0 : X.p[i - 1]; + T2.p[2] = X.p[i]; + } + while( mbedtls_mpi_cmp_mpi( &T1, &T2 ) > 0 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &Y, Z.p[i - t - 1] ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T1, biL * ( i - t - 1 ) ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &T1 ) ); + + if( mbedtls_mpi_cmp_int( &X, 0 ) < 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &T1, &Y ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T1, biL * ( i - t - 1 ) ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &X, &X, &T1 ) ); + Z.p[i - t - 1]--; + } + } + + if( Q != NULL ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( Q, &Z ) ); + Q->s = A->s * B->s; + } + + if( R != NULL ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &X, k ) ); + X.s = A->s; + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, &X ) ); + + if( mbedtls_mpi_cmp_int( R, 0 ) == 0 ) + R->s = 1; + } + +cleanup: + + mbedtls_mpi_free( &X ); mbedtls_mpi_free( &Y ); mbedtls_mpi_free( &Z ); + mbedtls_mpi_free( &T1 ); mbedtls_mpi_free( &T2 ); + + return( ret ); +} + +/* + * Division by int: A = Q * b + R + */ +int mbedtls_mpi_div_int( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A, mbedtls_mpi_sint b ) +{ + mbedtls_mpi _B; + mbedtls_mpi_uint p[1]; + + p[0] = ( b < 0 ) ? -b : b; + _B.s = ( b < 0 ) ? -1 : 1; + _B.n = 1; + _B.p = p; + + return( mbedtls_mpi_div_mpi( Q, R, A, &_B ) ); +} + +/* + * Modulo: R = A mod B + */ +int mbedtls_mpi_mod_mpi( mbedtls_mpi *R, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + int ret; + + if( mbedtls_mpi_cmp_int( B, 0 ) < 0 ) + return( MBEDTLS_ERR_MPI_NEGATIVE_VALUE ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_div_mpi( NULL, R, A, B ) ); + + while( mbedtls_mpi_cmp_int( R, 0 ) < 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( R, R, B ) ); + + while( mbedtls_mpi_cmp_mpi( R, B ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( R, R, B ) ); + +cleanup: + + return( ret ); +} + +/* + * Modulo: r = A mod b + */ +int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A, mbedtls_mpi_sint b ) +{ + size_t i; + mbedtls_mpi_uint x, y, z; + + if( b == 0 ) + return( MBEDTLS_ERR_MPI_DIVISION_BY_ZERO ); + + if( b < 0 ) + return( MBEDTLS_ERR_MPI_NEGATIVE_VALUE ); + + /* + * handle trivial cases + */ + if( b == 1 ) + { + *r = 0; + return( 0 ); + } + + if( b == 2 ) + { + *r = A->p[0] & 1; + return( 0 ); + } + + /* + * general case + */ + for( i = A->n, y = 0; i > 0; i-- ) + { + x = A->p[i - 1]; + y = ( y << biH ) | ( x >> biH ); + z = y / b; + y -= z * b; + + x <<= biH; + y = ( y << biH ) | ( x >> biH ); + z = y / b; + y -= z * b; + } + + /* + * If A is negative, then the current y represents a negative value. + * Flipping it to the positive side. + */ + if( A->s < 0 && y != 0 ) + y = b - y; + + *r = y; + + return( 0 ); +} + +/* + * Fast Montgomery initialization (thanks to Tom St Denis) + */ +static void mpi_montg_init( mbedtls_mpi_uint *mm, const mbedtls_mpi *N ) +{ + mbedtls_mpi_uint x, m0 = N->p[0]; + unsigned int i; + + x = m0; + x += ( ( m0 + 2 ) & 4 ) << 1; + + for( i = biL; i >= 8; i /= 2 ) + x *= ( 2 - ( m0 * x ) ); + + *mm = ~x + 1; +} + +/* + * Montgomery multiplication: A = A * B * R^-1 mod N (HAC 14.36) + */ +static void mpi_montmul( mbedtls_mpi *A, const mbedtls_mpi *B, const mbedtls_mpi *N, mbedtls_mpi_uint mm, + const mbedtls_mpi *T ) +{ + size_t i, n, m; + mbedtls_mpi_uint u0, u1, *d; + + memset( T->p, 0, T->n * ciL ); + + d = T->p; + n = N->n; + m = ( B->n < n ) ? B->n : n; + + for( i = 0; i < n; i++ ) + { + /* + * T = (T + u0*B + u1*N) / 2^biL + */ + u0 = A->p[i]; + u1 = ( d[0] + u0 * B->p[0] ) * mm; + + mpi_mul_hlp( m, B->p, d, u0 ); + mpi_mul_hlp( n, N->p, d, u1 ); + + *d++ = u0; d[n + 1] = 0; + } + + memcpy( A->p, d, ( n + 1 ) * ciL ); + + if( mbedtls_mpi_cmp_abs( A, N ) >= 0 ) + mpi_sub_hlp( n, N->p, A->p ); + else + /* prevent timing attacks */ + mpi_sub_hlp( n, A->p, T->p ); +} + +/* + * Montgomery reduction: A = A * R^-1 mod N + */ +static void mpi_montred( mbedtls_mpi *A, const mbedtls_mpi *N, mbedtls_mpi_uint mm, const mbedtls_mpi *T ) +{ + mbedtls_mpi_uint z = 1; + mbedtls_mpi U; + + U.n = U.s = (int) z; + U.p = &z; + + mpi_montmul( A, &U, N, mm, T ); +} + +/* + * Sliding-window exponentiation: X = A^E mod N (HAC 14.85) + */ +int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *E, const mbedtls_mpi *N, mbedtls_mpi *_RR ) +{ + int ret; + size_t wbits, wsize, one = 1; + size_t i, j, nblimbs; + size_t bufsize, nbits; + mbedtls_mpi_uint ei, mm, state; + mbedtls_mpi RR, T, W[ 2 << MBEDTLS_MPI_WINDOW_SIZE ], Apos; + int neg; + + if( mbedtls_mpi_cmp_int( N, 0 ) < 0 || ( N->p[0] & 1 ) == 0 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + if( mbedtls_mpi_cmp_int( E, 0 ) < 0 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + /* + * Init temps and window size + */ + mpi_montg_init( &mm, N ); + mbedtls_mpi_init( &RR ); mbedtls_mpi_init( &T ); + mbedtls_mpi_init( &Apos ); + memset( W, 0, sizeof( W ) ); + + i = mbedtls_mpi_bitlen( E ); + + wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 : + ( i > 79 ) ? 4 : ( i > 23 ) ? 3 : 1; + + if( wsize > MBEDTLS_MPI_WINDOW_SIZE ) + wsize = MBEDTLS_MPI_WINDOW_SIZE; + + j = N->n + 1; + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[1], j ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T, j * 2 ) ); + + /* + * Compensate for negative A (and correct at the end) + */ + neg = ( A->s == -1 ); + if( neg ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Apos, A ) ); + Apos.s = 1; + A = &Apos; + } + + /* + * If 1st call, pre-compute R^2 mod N + */ + if( _RR == NULL || _RR->p == NULL ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &RR, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &RR, N->n * 2 * biL ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &RR, &RR, N ) ); + + if( _RR != NULL ) + memcpy( _RR, &RR, sizeof( mbedtls_mpi ) ); + } + else + memcpy( &RR, _RR, sizeof( mbedtls_mpi ) ); + + /* + * W[1] = A * R^2 * R^-1 mod N = A * R mod N + */ + if( mbedtls_mpi_cmp_mpi( A, N ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &W[1], A, N ) ); + else + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[1], A ) ); + + mpi_montmul( &W[1], &RR, N, mm, &T ); + + /* + * X = R^2 * R^-1 mod N = R mod N + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, &RR ) ); + mpi_montred( X, N, mm, &T ); + + if( wsize > 1 ) + { + /* + * W[1 << (wsize - 1)] = W[1] ^ (wsize - 1) + */ + j = one << ( wsize - 1 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[j], N->n + 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[j], &W[1] ) ); + + for( i = 0; i < wsize - 1; i++ ) + mpi_montmul( &W[j], &W[j], N, mm, &T ); + + /* + * W[i] = W[i - 1] * W[1] + */ + for( i = j + 1; i < ( one << wsize ); i++ ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[i], N->n + 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[i], &W[i - 1] ) ); + + mpi_montmul( &W[i], &W[1], N, mm, &T ); + } + } + + nblimbs = E->n; + bufsize = 0; + nbits = 0; + wbits = 0; + state = 0; + + while( 1 ) + { + if( bufsize == 0 ) + { + if( nblimbs == 0 ) + break; + + nblimbs--; + + bufsize = sizeof( mbedtls_mpi_uint ) << 3; + } + + bufsize--; + + ei = (E->p[nblimbs] >> bufsize) & 1; + + /* + * skip leading 0s + */ + if( ei == 0 && state == 0 ) + continue; + + if( ei == 0 && state == 1 ) + { + /* + * out of window, square X + */ + mpi_montmul( X, X, N, mm, &T ); + continue; + } + + /* + * add ei to current window + */ + state = 2; + + nbits++; + wbits |= ( ei << ( wsize - nbits ) ); + + if( nbits == wsize ) + { + /* + * X = X^wsize R^-1 mod N + */ + for( i = 0; i < wsize; i++ ) + mpi_montmul( X, X, N, mm, &T ); + + /* + * X = X * W[wbits] R^-1 mod N + */ + mpi_montmul( X, &W[wbits], N, mm, &T ); + + state--; + nbits = 0; + wbits = 0; + } + } + + /* + * process the remaining bits + */ + for( i = 0; i < nbits; i++ ) + { + mpi_montmul( X, X, N, mm, &T ); + + wbits <<= 1; + + if( ( wbits & ( one << wsize ) ) != 0 ) + mpi_montmul( X, &W[1], N, mm, &T ); + } + + /* + * X = A^E * R * R^-1 mod N = A^E mod N + */ + mpi_montred( X, N, mm, &T ); + + if( neg ) + { + X->s = -1; + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( X, N, X ) ); + } + +cleanup: + + for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ ) + mbedtls_mpi_free( &W[i] ); + + mbedtls_mpi_free( &W[1] ); mbedtls_mpi_free( &T ); mbedtls_mpi_free( &Apos ); + + if( _RR == NULL || _RR->p == NULL ) + mbedtls_mpi_free( &RR ); + + return( ret ); +} + +/* + * Greatest common divisor: G = gcd(A, B) (HAC 14.54) + */ +int mbedtls_mpi_gcd( mbedtls_mpi *G, const mbedtls_mpi *A, const mbedtls_mpi *B ) +{ + int ret; + size_t lz, lzt; + mbedtls_mpi TG, TA, TB; + + mbedtls_mpi_init( &TG ); mbedtls_mpi_init( &TA ); mbedtls_mpi_init( &TB ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TA, A ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TB, B ) ); + + lz = mbedtls_mpi_lsb( &TA ); + lzt = mbedtls_mpi_lsb( &TB ); + + if( lzt < lz ) + lz = lzt; + + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TA, lz ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TB, lz ) ); + + TA.s = TB.s = 1; + + while( mbedtls_mpi_cmp_int( &TA, 0 ) != 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TA, mbedtls_mpi_lsb( &TA ) ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TB, mbedtls_mpi_lsb( &TB ) ) ); + + if( mbedtls_mpi_cmp_mpi( &TA, &TB ) >= 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( &TA, &TA, &TB ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TA, 1 ) ); + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( &TB, &TB, &TA ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TB, 1 ) ); + } + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &TB, lz ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( G, &TB ) ); + +cleanup: + + mbedtls_mpi_free( &TG ); mbedtls_mpi_free( &TA ); mbedtls_mpi_free( &TB ); + + return( ret ); +} + +/* + * Fill X with size bytes of random. + * + * Use a temporary bytes representation to make sure the result is the same + * regardless of the platform endianness (useful when f_rng is actually + * deterministic, eg for tests). + */ +int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE]; + + if( size > MBEDTLS_MPI_MAX_SIZE ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + MBEDTLS_MPI_CHK( f_rng( p_rng, buf, size ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( X, buf, size ) ); + +cleanup: + return( ret ); +} + +/* + * Modular inverse: X = A^-1 mod N (HAC 14.61 / 14.64) + */ +int mbedtls_mpi_inv_mod( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *N ) +{ + int ret; + mbedtls_mpi G, TA, TU, U1, U2, TB, TV, V1, V2; + + if( mbedtls_mpi_cmp_int( N, 0 ) <= 0 ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + mbedtls_mpi_init( &TA ); mbedtls_mpi_init( &TU ); mbedtls_mpi_init( &U1 ); mbedtls_mpi_init( &U2 ); + mbedtls_mpi_init( &G ); mbedtls_mpi_init( &TB ); mbedtls_mpi_init( &TV ); + mbedtls_mpi_init( &V1 ); mbedtls_mpi_init( &V2 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &G, A, N ) ); + + if( mbedtls_mpi_cmp_int( &G, 1 ) != 0 ) + { + ret = MBEDTLS_ERR_MPI_NOT_ACCEPTABLE; + goto cleanup; + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &TA, A, N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TU, &TA ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TB, N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TV, N ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &U1, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &U2, 0 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &V1, 0 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &V2, 1 ) ); + + do + { + while( ( TU.p[0] & 1 ) == 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TU, 1 ) ); + + if( ( U1.p[0] & 1 ) != 0 || ( U2.p[0] & 1 ) != 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &U1, &U1, &TB ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &U2, &U2, &TA ) ); + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &U1, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &U2, 1 ) ); + } + + while( ( TV.p[0] & 1 ) == 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &TV, 1 ) ); + + if( ( V1.p[0] & 1 ) != 0 || ( V2.p[0] & 1 ) != 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &V1, &V1, &TB ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &V2, &V2, &TA ) ); + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &V1, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &V2, 1 ) ); + } + + if( mbedtls_mpi_cmp_mpi( &TU, &TV ) >= 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &TU, &TU, &TV ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &U1, &U1, &V1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &U2, &U2, &V2 ) ); + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &TV, &TV, &TU ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &V1, &V1, &U1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &V2, &V2, &U2 ) ); + } + } + while( mbedtls_mpi_cmp_int( &TU, 0 ) != 0 ); + + while( mbedtls_mpi_cmp_int( &V1, 0 ) < 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &V1, &V1, N ) ); + + while( mbedtls_mpi_cmp_mpi( &V1, N ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &V1, &V1, N ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, &V1 ) ); + +cleanup: + + mbedtls_mpi_free( &TA ); mbedtls_mpi_free( &TU ); mbedtls_mpi_free( &U1 ); mbedtls_mpi_free( &U2 ); + mbedtls_mpi_free( &G ); mbedtls_mpi_free( &TB ); mbedtls_mpi_free( &TV ); + mbedtls_mpi_free( &V1 ); mbedtls_mpi_free( &V2 ); + + return( ret ); +} + +#if defined(MBEDTLS_GENPRIME) + +static const int small_prime[] ICACHE_RODATA_ATTR STORE_ATTR = +{ + 3, 5, 7, 11, 13, 17, 19, 23, + 29, 31, 37, 41, 43, 47, 53, 59, + 61, 67, 71, 73, 79, 83, 89, 97, + 101, 103, 107, 109, 113, 127, 131, 137, + 139, 149, 151, 157, 163, 167, 173, 179, + 181, 191, 193, 197, 199, 211, 223, 227, + 229, 233, 239, 241, 251, 257, 263, 269, + 271, 277, 281, 283, 293, 307, 311, 313, + 317, 331, 337, 347, 349, 353, 359, 367, + 373, 379, 383, 389, 397, 401, 409, 419, + 421, 431, 433, 439, 443, 449, 457, 461, + 463, 467, 479, 487, 491, 499, 503, 509, + 521, 523, 541, 547, 557, 563, 569, 571, + 577, 587, 593, 599, 601, 607, 613, 617, + 619, 631, 641, 643, 647, 653, 659, 661, + 673, 677, 683, 691, 701, 709, 719, 727, + 733, 739, 743, 751, 757, 761, 769, 773, + 787, 797, 809, 811, 821, 823, 827, 829, + 839, 853, 857, 859, 863, 877, 881, 883, + 887, 907, 911, 919, 929, 937, 941, 947, + 953, 967, 971, 977, 983, 991, 997, -103 +}; + +/* + * Small divisors test (X must be positive) + * + * Return values: + * 0: no small factor (possible prime, more tests needed) + * 1: certain prime + * MBEDTLS_ERR_MPI_NOT_ACCEPTABLE: certain non-prime + * other negative: error + */ +static int mpi_check_small_factors( const mbedtls_mpi *X ) +{ + int ret = 0; + size_t i; + mbedtls_mpi_uint r; + + if( ( X->p[0] & 1 ) == 0 ) + return( MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ); + + for( i = 0; small_prime[i] > 0; i++ ) + { + if( mbedtls_mpi_cmp_int( X, small_prime[i] ) <= 0 ) + return( 1 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_int( &r, X, small_prime[i] ) ); + + if( r == 0 ) + return( MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ); + } + +cleanup: + return( ret ); +} + +/* + * Miller-Rabin pseudo-primality test (HAC 4.24) + */ +static int mpi_miller_rabin( const mbedtls_mpi *X, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret, count; + size_t i, j, k, n, s; + mbedtls_mpi W, R, T, A, RR; + + mbedtls_mpi_init( &W ); mbedtls_mpi_init( &R ); mbedtls_mpi_init( &T ); mbedtls_mpi_init( &A ); + mbedtls_mpi_init( &RR ); + + /* + * W = |X| - 1 + * R = W >> lsb( W ) + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &W, X, 1 ) ); + s = mbedtls_mpi_lsb( &W ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R, &W ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &R, s ) ); + + i = mbedtls_mpi_bitlen( X ); + /* + * HAC, table 4.4 + */ + n = ( ( i >= 1300 ) ? 2 : ( i >= 850 ) ? 3 : + ( i >= 650 ) ? 4 : ( i >= 350 ) ? 8 : + ( i >= 250 ) ? 12 : ( i >= 150 ) ? 18 : 27 ); + + for( i = 0; i < n; i++ ) + { + /* + * pick a random A, 1 < A < |X| - 1 + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &A, X->n * ciL, f_rng, p_rng ) ); + + if( mbedtls_mpi_cmp_mpi( &A, &W ) >= 0 ) + { + j = mbedtls_mpi_bitlen( &A ) - mbedtls_mpi_bitlen( &W ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &A, j + 1 ) ); + } + A.p[0] |= 3; + + count = 0; + do { + MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &A, X->n * ciL, f_rng, p_rng ) ); + + j = mbedtls_mpi_bitlen( &A ); + k = mbedtls_mpi_bitlen( &W ); + if (j > k) { + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &A, j - k ) ); + } + + if (count++ > 30) { + return MBEDTLS_ERR_MPI_NOT_ACCEPTABLE; + } + + } while ( mbedtls_mpi_cmp_mpi( &A, &W ) >= 0 || + mbedtls_mpi_cmp_int( &A, 1 ) <= 0 ); + + /* + * A = A^R mod |X| + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &A, &A, &R, X, &RR ) ); + + if( mbedtls_mpi_cmp_mpi( &A, &W ) == 0 || + mbedtls_mpi_cmp_int( &A, 1 ) == 0 ) + continue; + + j = 1; + while( j < s && mbedtls_mpi_cmp_mpi( &A, &W ) != 0 ) + { + /* + * A = A * A mod |X| + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &A, &A ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &A, &T, X ) ); + + if( mbedtls_mpi_cmp_int( &A, 1 ) == 0 ) + break; + + j++; + } + + /* + * not prime if A != |X| - 1 or A == 1 + */ + if( mbedtls_mpi_cmp_mpi( &A, &W ) != 0 || + mbedtls_mpi_cmp_int( &A, 1 ) == 0 ) + { + ret = MBEDTLS_ERR_MPI_NOT_ACCEPTABLE; + break; + } + } + +cleanup: + mbedtls_mpi_free( &W ); mbedtls_mpi_free( &R ); mbedtls_mpi_free( &T ); mbedtls_mpi_free( &A ); + mbedtls_mpi_free( &RR ); + + return( ret ); +} + +/* + * Pseudo-primality test: small factors, then Miller-Rabin + */ +int mbedtls_mpi_is_prime( const mbedtls_mpi *X, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_mpi XX; + + XX.s = 1; + XX.n = X->n; + XX.p = X->p; + + if( mbedtls_mpi_cmp_int( &XX, 0 ) == 0 || + mbedtls_mpi_cmp_int( &XX, 1 ) == 0 ) + return( MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ); + + if( mbedtls_mpi_cmp_int( &XX, 2 ) == 0 ) + return( 0 ); + + if( ( ret = mpi_check_small_factors( &XX ) ) != 0 ) + { + if( ret == 1 ) + return( 0 ); + + return( ret ); + } + + return( mpi_miller_rabin( &XX, f_rng, p_rng ) ); +} + +/* + * Prime number generation + */ +int mbedtls_mpi_gen_prime( mbedtls_mpi *X, size_t nbits, int dh_flag, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + size_t k, n; + mbedtls_mpi_uint r; + mbedtls_mpi Y; + + if( nbits < 3 || nbits > MBEDTLS_MPI_MAX_BITS ) + return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA ); + + mbedtls_mpi_init( &Y ); + + n = BITS_TO_LIMBS( nbits ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( X, n * ciL, f_rng, p_rng ) ); + + k = mbedtls_mpi_bitlen( X ); + if( k > nbits ) MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( X, k - nbits + 1 ) ); + + mbedtls_mpi_set_bit( X, nbits-1, 1 ); + + X->p[0] |= 1; + + if( dh_flag == 0 ) + { + while( ( ret = mbedtls_mpi_is_prime( X, f_rng, p_rng ) ) != 0 ) + { + if( ret != MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ) + goto cleanup; + + MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( X, X, 2 ) ); + } + } + else + { + /* + * An necessary condition for Y and X = 2Y + 1 to be prime + * is X = 2 mod 3 (which is equivalent to Y = 2 mod 3). + * Make sure it is satisfied, while keeping X = 3 mod 4 + */ + + X->p[0] |= 2; + + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_int( &r, X, 3 ) ); + if( r == 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( X, X, 8 ) ); + else if( r == 1 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( X, X, 4 ) ); + + /* Set Y = (X-1) / 2, which is X / 2 because X is odd */ + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Y, X ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &Y, 1 ) ); + + while( 1 ) + { + /* + * First, check small factors for X and Y + * before doing Miller-Rabin on any of them + */ + if( ( ret = mpi_check_small_factors( X ) ) == 0 && + ( ret = mpi_check_small_factors( &Y ) ) == 0 && + ( ret = mpi_miller_rabin( X, f_rng, p_rng ) ) == 0 && + ( ret = mpi_miller_rabin( &Y, f_rng, p_rng ) ) == 0 ) + { + break; + } + + if( ret != MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ) + goto cleanup; + + /* + * Next candidates. We want to preserve Y = (X-1) / 2 and + * Y = 1 mod 2 and Y = 2 mod 3 (eq X = 3 mod 4 and X = 2 mod 3) + * so up Y by 6 and X by 12. + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( X, X, 12 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( &Y, &Y, 6 ) ); + } + } + +cleanup: + + mbedtls_mpi_free( &Y ); + + return( ret ); +} + +#endif /* MBEDTLS_GENPRIME */ + +#if defined(MBEDTLS_SELF_TEST) + +#define GCD_PAIR_COUNT 3 + +static const int gcd_pairs[GCD_PAIR_COUNT][3] = +{ + { 693, 609, 21 }, + { 1764, 868, 28 }, + { 768454923, 542167814, 1 } +}; + +/* + * Checkup routine + */ +int mbedtls_mpi_self_test( int verbose ) +{ + int ret, i; + mbedtls_mpi A, E, N, X, Y, U, V; + + mbedtls_mpi_init( &A ); mbedtls_mpi_init( &E ); mbedtls_mpi_init( &N ); mbedtls_mpi_init( &X ); + mbedtls_mpi_init( &Y ); mbedtls_mpi_init( &U ); mbedtls_mpi_init( &V ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &A, 16, + "EFE021C2645FD1DC586E69184AF4A31E" \ + "D5F53E93B5F123FA41680867BA110131" \ + "944FE7952E2517337780CB0DB80E61AA" \ + "E7C8DDC6C5C6AADEB34EB38A2F40D5E6" ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &E, 16, + "B2E7EFD37075B9F03FF989C7C5051C20" \ + "34D2A323810251127E7BF8625A4F49A5" \ + "F3E27F4DA8BD59C47D6DAABA4C8127BD" \ + "5B5C25763222FEFCCFC38B832366C29E" ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &N, 16, + "0066A198186C18C10B2F5ED9B522752A" \ + "9830B69916E535C8F047518A889A43A5" \ + "94B6BED27A168D31D4A52F88925AA8F5" ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &X, &A, &N ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &U, 16, + "602AB7ECA597A3D6B56FF9829A5E8B85" \ + "9E857EA95A03512E2BAE7391688D264A" \ + "A5663B0341DB9CCFD2C4C5F421FEC814" \ + "8001B72E848A38CAE1C65F78E56ABDEF" \ + "E12D3C039B8A02D6BE593F0BBBDA56F1" \ + "ECF677152EF804370C1A305CAF3B5BF1" \ + "30879B56C61DE584A0F53A2447A51E" ) ); + + if( verbose != 0 ) + mbedtls_printf( " MPI test #1 (mul_mpi): " ); + + if( mbedtls_mpi_cmp_mpi( &X, &U ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto cleanup; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_div_mpi( &X, &Y, &A, &N ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &U, 16, + "256567336059E52CAE22925474705F39A94" ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &V, 16, + "6613F26162223DF488E9CD48CC132C7A" \ + "0AC93C701B001B092E4E5B9F73BCD27B" \ + "9EE50D0657C77F374E903CDFA4C642" ) ); + + if( verbose != 0 ) + mbedtls_printf( " MPI test #2 (div_mpi): " ); + + if( mbedtls_mpi_cmp_mpi( &X, &U ) != 0 || + mbedtls_mpi_cmp_mpi( &Y, &V ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto cleanup; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &X, &A, &E, &N, NULL ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &U, 16, + "36E139AEA55215609D2816998ED020BB" \ + "BD96C37890F65171D948E9BC7CBAA4D9" \ + "325D24D6A3C12710F10A09FA08AB87" ) ); + + if( verbose != 0 ) + mbedtls_printf( " MPI test #3 (exp_mod): " ); + + if( mbedtls_mpi_cmp_mpi( &X, &U ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto cleanup; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &X, &A, &N ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &U, 16, + "003A0AAEDD7E784FC07D8F9EC6E3BFD5" \ + "C3DBA76456363A10869622EAC2DD84EC" \ + "C5B8A74DAC4D09E03B5E0BE779F2DF61" ) ); + + if( verbose != 0 ) + mbedtls_printf( " MPI test #4 (inv_mod): " ); + + if( mbedtls_mpi_cmp_mpi( &X, &U ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto cleanup; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " MPI test #5 (simple gcd): " ); + + for( i = 0; i < GCD_PAIR_COUNT; i++ ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &X, gcd_pairs[i][0] ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &Y, gcd_pairs[i][1] ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &A, &X, &Y ) ); + + if( mbedtls_mpi_cmp_int( &A, gcd_pairs[i][2] ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed at %d\n", i ); + + ret = 1; + goto cleanup; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + +cleanup: + + if( ret != 0 && verbose != 0 ) + mbedtls_printf( "Unexpected error, return code = %08X\n", ret ); + + mbedtls_mpi_free( &A ); mbedtls_mpi_free( &E ); mbedtls_mpi_free( &N ); mbedtls_mpi_free( &X ); + mbedtls_mpi_free( &Y ); mbedtls_mpi_free( &U ); mbedtls_mpi_free( &V ); + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_BIGNUM_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/blowfish.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/blowfish.c new file mode 100644 index 0000000..89be4d1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/blowfish.c @@ -0,0 +1,656 @@ +/* + * Blowfish implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The Blowfish block cipher was designed by Bruce Schneier in 1993. + * http://www.schneier.com/blowfish.html + * http://en.wikipedia.org/wiki/Blowfish_%28cipher%29 + * + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_BLOWFISH_C) + +#include "mbedtls/blowfish.h" + +#include + +#if !defined(MBEDTLS_BLOWFISH_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ + | ( (uint32_t) (b)[(i) + 1] << 16 ) \ + | ( (uint32_t) (b)[(i) + 2] << 8 ) \ + | ( (uint32_t) (b)[(i) + 3] ); \ +} +#endif + +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +static const uint32_t P[MBEDTLS_BLOWFISH_ROUNDS + 2] = { + 0x243F6A88L, 0x85A308D3L, 0x13198A2EL, 0x03707344L, + 0xA4093822L, 0x299F31D0L, 0x082EFA98L, 0xEC4E6C89L, + 0x452821E6L, 0x38D01377L, 0xBE5466CFL, 0x34E90C6CL, + 0xC0AC29B7L, 0xC97C50DDL, 0x3F84D5B5L, 0xB5470917L, + 0x9216D5D9L, 0x8979FB1BL +}; + +/* declarations of data at the end of this file */ +static const uint32_t S[4][256]; + +static uint32_t F( mbedtls_blowfish_context *ctx, uint32_t x ) +{ + unsigned short a, b, c, d; + uint32_t y; + + d = (unsigned short)(x & 0xFF); + x >>= 8; + c = (unsigned short)(x & 0xFF); + x >>= 8; + b = (unsigned short)(x & 0xFF); + x >>= 8; + a = (unsigned short)(x & 0xFF); + y = ctx->S[0][a] + ctx->S[1][b]; + y = y ^ ctx->S[2][c]; + y = y + ctx->S[3][d]; + + return( y ); +} + +static void blowfish_enc( mbedtls_blowfish_context *ctx, uint32_t *xl, uint32_t *xr ) +{ + uint32_t Xl, Xr, temp; + short i; + + Xl = *xl; + Xr = *xr; + + for( i = 0; i < MBEDTLS_BLOWFISH_ROUNDS; ++i ) + { + Xl = Xl ^ ctx->P[i]; + Xr = F( ctx, Xl ) ^ Xr; + + temp = Xl; + Xl = Xr; + Xr = temp; + } + + temp = Xl; + Xl = Xr; + Xr = temp; + + Xr = Xr ^ ctx->P[MBEDTLS_BLOWFISH_ROUNDS]; + Xl = Xl ^ ctx->P[MBEDTLS_BLOWFISH_ROUNDS + 1]; + + *xl = Xl; + *xr = Xr; +} + +static void blowfish_dec( mbedtls_blowfish_context *ctx, uint32_t *xl, uint32_t *xr ) +{ + uint32_t Xl, Xr, temp; + short i; + + Xl = *xl; + Xr = *xr; + + for( i = MBEDTLS_BLOWFISH_ROUNDS + 1; i > 1; --i ) + { + Xl = Xl ^ ctx->P[i]; + Xr = F( ctx, Xl ) ^ Xr; + + temp = Xl; + Xl = Xr; + Xr = temp; + } + + temp = Xl; + Xl = Xr; + Xr = temp; + + Xr = Xr ^ ctx->P[1]; + Xl = Xl ^ ctx->P[0]; + + *xl = Xl; + *xr = Xr; +} + +void mbedtls_blowfish_init( mbedtls_blowfish_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_blowfish_context ) ); +} + +void mbedtls_blowfish_free( mbedtls_blowfish_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_blowfish_context ) ); +} + +/* + * Blowfish key schedule + */ +int mbedtls_blowfish_setkey( mbedtls_blowfish_context *ctx, const unsigned char *key, + unsigned int keybits ) +{ + unsigned int i, j, k; + uint32_t data, datal, datar; + + if( keybits < MBEDTLS_BLOWFISH_MIN_KEY_BITS || keybits > MBEDTLS_BLOWFISH_MAX_KEY_BITS || + ( keybits % 8 ) ) + { + return( MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH ); + } + + keybits >>= 3; + + for( i = 0; i < 4; i++ ) + { + for( j = 0; j < 256; j++ ) + ctx->S[i][j] = S[i][j]; + } + + j = 0; + for( i = 0; i < MBEDTLS_BLOWFISH_ROUNDS + 2; ++i ) + { + data = 0x00000000; + for( k = 0; k < 4; ++k ) + { + data = ( data << 8 ) | key[j++]; + if( j >= keybits ) + j = 0; + } + ctx->P[i] = P[i] ^ data; + } + + datal = 0x00000000; + datar = 0x00000000; + + for( i = 0; i < MBEDTLS_BLOWFISH_ROUNDS + 2; i += 2 ) + { + blowfish_enc( ctx, &datal, &datar ); + ctx->P[i] = datal; + ctx->P[i + 1] = datar; + } + + for( i = 0; i < 4; i++ ) + { + for( j = 0; j < 256; j += 2 ) + { + blowfish_enc( ctx, &datal, &datar ); + ctx->S[i][j] = datal; + ctx->S[i][j + 1] = datar; + } + } + return( 0 ); +} + +/* + * Blowfish-ECB block encryption/decryption + */ +int mbedtls_blowfish_crypt_ecb( mbedtls_blowfish_context *ctx, + int mode, + const unsigned char input[MBEDTLS_BLOWFISH_BLOCKSIZE], + unsigned char output[MBEDTLS_BLOWFISH_BLOCKSIZE] ) +{ + uint32_t X0, X1; + + GET_UINT32_BE( X0, input, 0 ); + GET_UINT32_BE( X1, input, 4 ); + + if( mode == MBEDTLS_BLOWFISH_DECRYPT ) + { + blowfish_dec( ctx, &X0, &X1 ); + } + else /* MBEDTLS_BLOWFISH_ENCRYPT */ + { + blowfish_enc( ctx, &X0, &X1 ); + } + + PUT_UINT32_BE( X0, output, 0 ); + PUT_UINT32_BE( X1, output, 4 ); + + return( 0 ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/* + * Blowfish-CBC buffer encryption/decryption + */ +int mbedtls_blowfish_crypt_cbc( mbedtls_blowfish_context *ctx, + int mode, + size_t length, + unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE], + const unsigned char *input, + unsigned char *output ) +{ + int i; + unsigned char temp[MBEDTLS_BLOWFISH_BLOCKSIZE]; + + if( length % MBEDTLS_BLOWFISH_BLOCKSIZE ) + return( MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH ); + + if( mode == MBEDTLS_BLOWFISH_DECRYPT ) + { + while( length > 0 ) + { + memcpy( temp, input, MBEDTLS_BLOWFISH_BLOCKSIZE ); + mbedtls_blowfish_crypt_ecb( ctx, mode, input, output ); + + for( i = 0; i < MBEDTLS_BLOWFISH_BLOCKSIZE;i++ ) + output[i] = (unsigned char)( output[i] ^ iv[i] ); + + memcpy( iv, temp, MBEDTLS_BLOWFISH_BLOCKSIZE ); + + input += MBEDTLS_BLOWFISH_BLOCKSIZE; + output += MBEDTLS_BLOWFISH_BLOCKSIZE; + length -= MBEDTLS_BLOWFISH_BLOCKSIZE; + } + } + else + { + while( length > 0 ) + { + for( i = 0; i < MBEDTLS_BLOWFISH_BLOCKSIZE; i++ ) + output[i] = (unsigned char)( input[i] ^ iv[i] ); + + mbedtls_blowfish_crypt_ecb( ctx, mode, output, output ); + memcpy( iv, output, MBEDTLS_BLOWFISH_BLOCKSIZE ); + + input += MBEDTLS_BLOWFISH_BLOCKSIZE; + output += MBEDTLS_BLOWFISH_BLOCKSIZE; + length -= MBEDTLS_BLOWFISH_BLOCKSIZE; + } + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +/* + * Blowfish CFB buffer encryption/decryption + */ +int mbedtls_blowfish_crypt_cfb64( mbedtls_blowfish_context *ctx, + int mode, + size_t length, + size_t *iv_off, + unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE], + const unsigned char *input, + unsigned char *output ) +{ + int c; + size_t n = *iv_off; + + if( mode == MBEDTLS_BLOWFISH_DECRYPT ) + { + while( length-- ) + { + if( n == 0 ) + mbedtls_blowfish_crypt_ecb( ctx, MBEDTLS_BLOWFISH_ENCRYPT, iv, iv ); + + c = *input++; + *output++ = (unsigned char)( c ^ iv[n] ); + iv[n] = (unsigned char) c; + + n = ( n + 1 ) % MBEDTLS_BLOWFISH_BLOCKSIZE; + } + } + else + { + while( length-- ) + { + if( n == 0 ) + mbedtls_blowfish_crypt_ecb( ctx, MBEDTLS_BLOWFISH_ENCRYPT, iv, iv ); + + iv[n] = *output++ = (unsigned char)( iv[n] ^ *input++ ); + + n = ( n + 1 ) % MBEDTLS_BLOWFISH_BLOCKSIZE; + } + } + + *iv_off = n; + + return( 0 ); +} +#endif /*MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/* + * Blowfish CTR buffer encryption/decryption + */ +int mbedtls_blowfish_crypt_ctr( mbedtls_blowfish_context *ctx, + size_t length, + size_t *nc_off, + unsigned char nonce_counter[MBEDTLS_BLOWFISH_BLOCKSIZE], + unsigned char stream_block[MBEDTLS_BLOWFISH_BLOCKSIZE], + const unsigned char *input, + unsigned char *output ) +{ + int c, i; + size_t n = *nc_off; + + while( length-- ) + { + if( n == 0 ) { + mbedtls_blowfish_crypt_ecb( ctx, MBEDTLS_BLOWFISH_ENCRYPT, nonce_counter, + stream_block ); + + for( i = MBEDTLS_BLOWFISH_BLOCKSIZE; i > 0; i-- ) + if( ++nonce_counter[i - 1] != 0 ) + break; + } + c = *input++; + *output++ = (unsigned char)( c ^ stream_block[n] ); + + n = ( n + 1 ) % MBEDTLS_BLOWFISH_BLOCKSIZE; + } + + *nc_off = n; + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +static const uint32_t S[4][256] = { + { 0xD1310BA6L, 0x98DFB5ACL, 0x2FFD72DBL, 0xD01ADFB7L, + 0xB8E1AFEDL, 0x6A267E96L, 0xBA7C9045L, 0xF12C7F99L, + 0x24A19947L, 0xB3916CF7L, 0x0801F2E2L, 0x858EFC16L, + 0x636920D8L, 0x71574E69L, 0xA458FEA3L, 0xF4933D7EL, + 0x0D95748FL, 0x728EB658L, 0x718BCD58L, 0x82154AEEL, + 0x7B54A41DL, 0xC25A59B5L, 0x9C30D539L, 0x2AF26013L, + 0xC5D1B023L, 0x286085F0L, 0xCA417918L, 0xB8DB38EFL, + 0x8E79DCB0L, 0x603A180EL, 0x6C9E0E8BL, 0xB01E8A3EL, + 0xD71577C1L, 0xBD314B27L, 0x78AF2FDAL, 0x55605C60L, + 0xE65525F3L, 0xAA55AB94L, 0x57489862L, 0x63E81440L, + 0x55CA396AL, 0x2AAB10B6L, 0xB4CC5C34L, 0x1141E8CEL, + 0xA15486AFL, 0x7C72E993L, 0xB3EE1411L, 0x636FBC2AL, + 0x2BA9C55DL, 0x741831F6L, 0xCE5C3E16L, 0x9B87931EL, + 0xAFD6BA33L, 0x6C24CF5CL, 0x7A325381L, 0x28958677L, + 0x3B8F4898L, 0x6B4BB9AFL, 0xC4BFE81BL, 0x66282193L, + 0x61D809CCL, 0xFB21A991L, 0x487CAC60L, 0x5DEC8032L, + 0xEF845D5DL, 0xE98575B1L, 0xDC262302L, 0xEB651B88L, + 0x23893E81L, 0xD396ACC5L, 0x0F6D6FF3L, 0x83F44239L, + 0x2E0B4482L, 0xA4842004L, 0x69C8F04AL, 0x9E1F9B5EL, + 0x21C66842L, 0xF6E96C9AL, 0x670C9C61L, 0xABD388F0L, + 0x6A51A0D2L, 0xD8542F68L, 0x960FA728L, 0xAB5133A3L, + 0x6EEF0B6CL, 0x137A3BE4L, 0xBA3BF050L, 0x7EFB2A98L, + 0xA1F1651DL, 0x39AF0176L, 0x66CA593EL, 0x82430E88L, + 0x8CEE8619L, 0x456F9FB4L, 0x7D84A5C3L, 0x3B8B5EBEL, + 0xE06F75D8L, 0x85C12073L, 0x401A449FL, 0x56C16AA6L, + 0x4ED3AA62L, 0x363F7706L, 0x1BFEDF72L, 0x429B023DL, + 0x37D0D724L, 0xD00A1248L, 0xDB0FEAD3L, 0x49F1C09BL, + 0x075372C9L, 0x80991B7BL, 0x25D479D8L, 0xF6E8DEF7L, + 0xE3FE501AL, 0xB6794C3BL, 0x976CE0BDL, 0x04C006BAL, + 0xC1A94FB6L, 0x409F60C4L, 0x5E5C9EC2L, 0x196A2463L, + 0x68FB6FAFL, 0x3E6C53B5L, 0x1339B2EBL, 0x3B52EC6FL, + 0x6DFC511FL, 0x9B30952CL, 0xCC814544L, 0xAF5EBD09L, + 0xBEE3D004L, 0xDE334AFDL, 0x660F2807L, 0x192E4BB3L, + 0xC0CBA857L, 0x45C8740FL, 0xD20B5F39L, 0xB9D3FBDBL, + 0x5579C0BDL, 0x1A60320AL, 0xD6A100C6L, 0x402C7279L, + 0x679F25FEL, 0xFB1FA3CCL, 0x8EA5E9F8L, 0xDB3222F8L, + 0x3C7516DFL, 0xFD616B15L, 0x2F501EC8L, 0xAD0552ABL, + 0x323DB5FAL, 0xFD238760L, 0x53317B48L, 0x3E00DF82L, + 0x9E5C57BBL, 0xCA6F8CA0L, 0x1A87562EL, 0xDF1769DBL, + 0xD542A8F6L, 0x287EFFC3L, 0xAC6732C6L, 0x8C4F5573L, + 0x695B27B0L, 0xBBCA58C8L, 0xE1FFA35DL, 0xB8F011A0L, + 0x10FA3D98L, 0xFD2183B8L, 0x4AFCB56CL, 0x2DD1D35BL, + 0x9A53E479L, 0xB6F84565L, 0xD28E49BCL, 0x4BFB9790L, + 0xE1DDF2DAL, 0xA4CB7E33L, 0x62FB1341L, 0xCEE4C6E8L, + 0xEF20CADAL, 0x36774C01L, 0xD07E9EFEL, 0x2BF11FB4L, + 0x95DBDA4DL, 0xAE909198L, 0xEAAD8E71L, 0x6B93D5A0L, + 0xD08ED1D0L, 0xAFC725E0L, 0x8E3C5B2FL, 0x8E7594B7L, + 0x8FF6E2FBL, 0xF2122B64L, 0x8888B812L, 0x900DF01CL, + 0x4FAD5EA0L, 0x688FC31CL, 0xD1CFF191L, 0xB3A8C1ADL, + 0x2F2F2218L, 0xBE0E1777L, 0xEA752DFEL, 0x8B021FA1L, + 0xE5A0CC0FL, 0xB56F74E8L, 0x18ACF3D6L, 0xCE89E299L, + 0xB4A84FE0L, 0xFD13E0B7L, 0x7CC43B81L, 0xD2ADA8D9L, + 0x165FA266L, 0x80957705L, 0x93CC7314L, 0x211A1477L, + 0xE6AD2065L, 0x77B5FA86L, 0xC75442F5L, 0xFB9D35CFL, + 0xEBCDAF0CL, 0x7B3E89A0L, 0xD6411BD3L, 0xAE1E7E49L, + 0x00250E2DL, 0x2071B35EL, 0x226800BBL, 0x57B8E0AFL, + 0x2464369BL, 0xF009B91EL, 0x5563911DL, 0x59DFA6AAL, + 0x78C14389L, 0xD95A537FL, 0x207D5BA2L, 0x02E5B9C5L, + 0x83260376L, 0x6295CFA9L, 0x11C81968L, 0x4E734A41L, + 0xB3472DCAL, 0x7B14A94AL, 0x1B510052L, 0x9A532915L, + 0xD60F573FL, 0xBC9BC6E4L, 0x2B60A476L, 0x81E67400L, + 0x08BA6FB5L, 0x571BE91FL, 0xF296EC6BL, 0x2A0DD915L, + 0xB6636521L, 0xE7B9F9B6L, 0xFF34052EL, 0xC5855664L, + 0x53B02D5DL, 0xA99F8FA1L, 0x08BA4799L, 0x6E85076AL }, + { 0x4B7A70E9L, 0xB5B32944L, 0xDB75092EL, 0xC4192623L, + 0xAD6EA6B0L, 0x49A7DF7DL, 0x9CEE60B8L, 0x8FEDB266L, + 0xECAA8C71L, 0x699A17FFL, 0x5664526CL, 0xC2B19EE1L, + 0x193602A5L, 0x75094C29L, 0xA0591340L, 0xE4183A3EL, + 0x3F54989AL, 0x5B429D65L, 0x6B8FE4D6L, 0x99F73FD6L, + 0xA1D29C07L, 0xEFE830F5L, 0x4D2D38E6L, 0xF0255DC1L, + 0x4CDD2086L, 0x8470EB26L, 0x6382E9C6L, 0x021ECC5EL, + 0x09686B3FL, 0x3EBAEFC9L, 0x3C971814L, 0x6B6A70A1L, + 0x687F3584L, 0x52A0E286L, 0xB79C5305L, 0xAA500737L, + 0x3E07841CL, 0x7FDEAE5CL, 0x8E7D44ECL, 0x5716F2B8L, + 0xB03ADA37L, 0xF0500C0DL, 0xF01C1F04L, 0x0200B3FFL, + 0xAE0CF51AL, 0x3CB574B2L, 0x25837A58L, 0xDC0921BDL, + 0xD19113F9L, 0x7CA92FF6L, 0x94324773L, 0x22F54701L, + 0x3AE5E581L, 0x37C2DADCL, 0xC8B57634L, 0x9AF3DDA7L, + 0xA9446146L, 0x0FD0030EL, 0xECC8C73EL, 0xA4751E41L, + 0xE238CD99L, 0x3BEA0E2FL, 0x3280BBA1L, 0x183EB331L, + 0x4E548B38L, 0x4F6DB908L, 0x6F420D03L, 0xF60A04BFL, + 0x2CB81290L, 0x24977C79L, 0x5679B072L, 0xBCAF89AFL, + 0xDE9A771FL, 0xD9930810L, 0xB38BAE12L, 0xDCCF3F2EL, + 0x5512721FL, 0x2E6B7124L, 0x501ADDE6L, 0x9F84CD87L, + 0x7A584718L, 0x7408DA17L, 0xBC9F9ABCL, 0xE94B7D8CL, + 0xEC7AEC3AL, 0xDB851DFAL, 0x63094366L, 0xC464C3D2L, + 0xEF1C1847L, 0x3215D908L, 0xDD433B37L, 0x24C2BA16L, + 0x12A14D43L, 0x2A65C451L, 0x50940002L, 0x133AE4DDL, + 0x71DFF89EL, 0x10314E55L, 0x81AC77D6L, 0x5F11199BL, + 0x043556F1L, 0xD7A3C76BL, 0x3C11183BL, 0x5924A509L, + 0xF28FE6EDL, 0x97F1FBFAL, 0x9EBABF2CL, 0x1E153C6EL, + 0x86E34570L, 0xEAE96FB1L, 0x860E5E0AL, 0x5A3E2AB3L, + 0x771FE71CL, 0x4E3D06FAL, 0x2965DCB9L, 0x99E71D0FL, + 0x803E89D6L, 0x5266C825L, 0x2E4CC978L, 0x9C10B36AL, + 0xC6150EBAL, 0x94E2EA78L, 0xA5FC3C53L, 0x1E0A2DF4L, + 0xF2F74EA7L, 0x361D2B3DL, 0x1939260FL, 0x19C27960L, + 0x5223A708L, 0xF71312B6L, 0xEBADFE6EL, 0xEAC31F66L, + 0xE3BC4595L, 0xA67BC883L, 0xB17F37D1L, 0x018CFF28L, + 0xC332DDEFL, 0xBE6C5AA5L, 0x65582185L, 0x68AB9802L, + 0xEECEA50FL, 0xDB2F953BL, 0x2AEF7DADL, 0x5B6E2F84L, + 0x1521B628L, 0x29076170L, 0xECDD4775L, 0x619F1510L, + 0x13CCA830L, 0xEB61BD96L, 0x0334FE1EL, 0xAA0363CFL, + 0xB5735C90L, 0x4C70A239L, 0xD59E9E0BL, 0xCBAADE14L, + 0xEECC86BCL, 0x60622CA7L, 0x9CAB5CABL, 0xB2F3846EL, + 0x648B1EAFL, 0x19BDF0CAL, 0xA02369B9L, 0x655ABB50L, + 0x40685A32L, 0x3C2AB4B3L, 0x319EE9D5L, 0xC021B8F7L, + 0x9B540B19L, 0x875FA099L, 0x95F7997EL, 0x623D7DA8L, + 0xF837889AL, 0x97E32D77L, 0x11ED935FL, 0x16681281L, + 0x0E358829L, 0xC7E61FD6L, 0x96DEDFA1L, 0x7858BA99L, + 0x57F584A5L, 0x1B227263L, 0x9B83C3FFL, 0x1AC24696L, + 0xCDB30AEBL, 0x532E3054L, 0x8FD948E4L, 0x6DBC3128L, + 0x58EBF2EFL, 0x34C6FFEAL, 0xFE28ED61L, 0xEE7C3C73L, + 0x5D4A14D9L, 0xE864B7E3L, 0x42105D14L, 0x203E13E0L, + 0x45EEE2B6L, 0xA3AAABEAL, 0xDB6C4F15L, 0xFACB4FD0L, + 0xC742F442L, 0xEF6ABBB5L, 0x654F3B1DL, 0x41CD2105L, + 0xD81E799EL, 0x86854DC7L, 0xE44B476AL, 0x3D816250L, + 0xCF62A1F2L, 0x5B8D2646L, 0xFC8883A0L, 0xC1C7B6A3L, + 0x7F1524C3L, 0x69CB7492L, 0x47848A0BL, 0x5692B285L, + 0x095BBF00L, 0xAD19489DL, 0x1462B174L, 0x23820E00L, + 0x58428D2AL, 0x0C55F5EAL, 0x1DADF43EL, 0x233F7061L, + 0x3372F092L, 0x8D937E41L, 0xD65FECF1L, 0x6C223BDBL, + 0x7CDE3759L, 0xCBEE7460L, 0x4085F2A7L, 0xCE77326EL, + 0xA6078084L, 0x19F8509EL, 0xE8EFD855L, 0x61D99735L, + 0xA969A7AAL, 0xC50C06C2L, 0x5A04ABFCL, 0x800BCADCL, + 0x9E447A2EL, 0xC3453484L, 0xFDD56705L, 0x0E1E9EC9L, + 0xDB73DBD3L, 0x105588CDL, 0x675FDA79L, 0xE3674340L, + 0xC5C43465L, 0x713E38D8L, 0x3D28F89EL, 0xF16DFF20L, + 0x153E21E7L, 0x8FB03D4AL, 0xE6E39F2BL, 0xDB83ADF7L }, + { 0xE93D5A68L, 0x948140F7L, 0xF64C261CL, 0x94692934L, + 0x411520F7L, 0x7602D4F7L, 0xBCF46B2EL, 0xD4A20068L, + 0xD4082471L, 0x3320F46AL, 0x43B7D4B7L, 0x500061AFL, + 0x1E39F62EL, 0x97244546L, 0x14214F74L, 0xBF8B8840L, + 0x4D95FC1DL, 0x96B591AFL, 0x70F4DDD3L, 0x66A02F45L, + 0xBFBC09ECL, 0x03BD9785L, 0x7FAC6DD0L, 0x31CB8504L, + 0x96EB27B3L, 0x55FD3941L, 0xDA2547E6L, 0xABCA0A9AL, + 0x28507825L, 0x530429F4L, 0x0A2C86DAL, 0xE9B66DFBL, + 0x68DC1462L, 0xD7486900L, 0x680EC0A4L, 0x27A18DEEL, + 0x4F3FFEA2L, 0xE887AD8CL, 0xB58CE006L, 0x7AF4D6B6L, + 0xAACE1E7CL, 0xD3375FECL, 0xCE78A399L, 0x406B2A42L, + 0x20FE9E35L, 0xD9F385B9L, 0xEE39D7ABL, 0x3B124E8BL, + 0x1DC9FAF7L, 0x4B6D1856L, 0x26A36631L, 0xEAE397B2L, + 0x3A6EFA74L, 0xDD5B4332L, 0x6841E7F7L, 0xCA7820FBL, + 0xFB0AF54EL, 0xD8FEB397L, 0x454056ACL, 0xBA489527L, + 0x55533A3AL, 0x20838D87L, 0xFE6BA9B7L, 0xD096954BL, + 0x55A867BCL, 0xA1159A58L, 0xCCA92963L, 0x99E1DB33L, + 0xA62A4A56L, 0x3F3125F9L, 0x5EF47E1CL, 0x9029317CL, + 0xFDF8E802L, 0x04272F70L, 0x80BB155CL, 0x05282CE3L, + 0x95C11548L, 0xE4C66D22L, 0x48C1133FL, 0xC70F86DCL, + 0x07F9C9EEL, 0x41041F0FL, 0x404779A4L, 0x5D886E17L, + 0x325F51EBL, 0xD59BC0D1L, 0xF2BCC18FL, 0x41113564L, + 0x257B7834L, 0x602A9C60L, 0xDFF8E8A3L, 0x1F636C1BL, + 0x0E12B4C2L, 0x02E1329EL, 0xAF664FD1L, 0xCAD18115L, + 0x6B2395E0L, 0x333E92E1L, 0x3B240B62L, 0xEEBEB922L, + 0x85B2A20EL, 0xE6BA0D99L, 0xDE720C8CL, 0x2DA2F728L, + 0xD0127845L, 0x95B794FDL, 0x647D0862L, 0xE7CCF5F0L, + 0x5449A36FL, 0x877D48FAL, 0xC39DFD27L, 0xF33E8D1EL, + 0x0A476341L, 0x992EFF74L, 0x3A6F6EABL, 0xF4F8FD37L, + 0xA812DC60L, 0xA1EBDDF8L, 0x991BE14CL, 0xDB6E6B0DL, + 0xC67B5510L, 0x6D672C37L, 0x2765D43BL, 0xDCD0E804L, + 0xF1290DC7L, 0xCC00FFA3L, 0xB5390F92L, 0x690FED0BL, + 0x667B9FFBL, 0xCEDB7D9CL, 0xA091CF0BL, 0xD9155EA3L, + 0xBB132F88L, 0x515BAD24L, 0x7B9479BFL, 0x763BD6EBL, + 0x37392EB3L, 0xCC115979L, 0x8026E297L, 0xF42E312DL, + 0x6842ADA7L, 0xC66A2B3BL, 0x12754CCCL, 0x782EF11CL, + 0x6A124237L, 0xB79251E7L, 0x06A1BBE6L, 0x4BFB6350L, + 0x1A6B1018L, 0x11CAEDFAL, 0x3D25BDD8L, 0xE2E1C3C9L, + 0x44421659L, 0x0A121386L, 0xD90CEC6EL, 0xD5ABEA2AL, + 0x64AF674EL, 0xDA86A85FL, 0xBEBFE988L, 0x64E4C3FEL, + 0x9DBC8057L, 0xF0F7C086L, 0x60787BF8L, 0x6003604DL, + 0xD1FD8346L, 0xF6381FB0L, 0x7745AE04L, 0xD736FCCCL, + 0x83426B33L, 0xF01EAB71L, 0xB0804187L, 0x3C005E5FL, + 0x77A057BEL, 0xBDE8AE24L, 0x55464299L, 0xBF582E61L, + 0x4E58F48FL, 0xF2DDFDA2L, 0xF474EF38L, 0x8789BDC2L, + 0x5366F9C3L, 0xC8B38E74L, 0xB475F255L, 0x46FCD9B9L, + 0x7AEB2661L, 0x8B1DDF84L, 0x846A0E79L, 0x915F95E2L, + 0x466E598EL, 0x20B45770L, 0x8CD55591L, 0xC902DE4CL, + 0xB90BACE1L, 0xBB8205D0L, 0x11A86248L, 0x7574A99EL, + 0xB77F19B6L, 0xE0A9DC09L, 0x662D09A1L, 0xC4324633L, + 0xE85A1F02L, 0x09F0BE8CL, 0x4A99A025L, 0x1D6EFE10L, + 0x1AB93D1DL, 0x0BA5A4DFL, 0xA186F20FL, 0x2868F169L, + 0xDCB7DA83L, 0x573906FEL, 0xA1E2CE9BL, 0x4FCD7F52L, + 0x50115E01L, 0xA70683FAL, 0xA002B5C4L, 0x0DE6D027L, + 0x9AF88C27L, 0x773F8641L, 0xC3604C06L, 0x61A806B5L, + 0xF0177A28L, 0xC0F586E0L, 0x006058AAL, 0x30DC7D62L, + 0x11E69ED7L, 0x2338EA63L, 0x53C2DD94L, 0xC2C21634L, + 0xBBCBEE56L, 0x90BCB6DEL, 0xEBFC7DA1L, 0xCE591D76L, + 0x6F05E409L, 0x4B7C0188L, 0x39720A3DL, 0x7C927C24L, + 0x86E3725FL, 0x724D9DB9L, 0x1AC15BB4L, 0xD39EB8FCL, + 0xED545578L, 0x08FCA5B5L, 0xD83D7CD3L, 0x4DAD0FC4L, + 0x1E50EF5EL, 0xB161E6F8L, 0xA28514D9L, 0x6C51133CL, + 0x6FD5C7E7L, 0x56E14EC4L, 0x362ABFCEL, 0xDDC6C837L, + 0xD79A3234L, 0x92638212L, 0x670EFA8EL, 0x406000E0L }, + { 0x3A39CE37L, 0xD3FAF5CFL, 0xABC27737L, 0x5AC52D1BL, + 0x5CB0679EL, 0x4FA33742L, 0xD3822740L, 0x99BC9BBEL, + 0xD5118E9DL, 0xBF0F7315L, 0xD62D1C7EL, 0xC700C47BL, + 0xB78C1B6BL, 0x21A19045L, 0xB26EB1BEL, 0x6A366EB4L, + 0x5748AB2FL, 0xBC946E79L, 0xC6A376D2L, 0x6549C2C8L, + 0x530FF8EEL, 0x468DDE7DL, 0xD5730A1DL, 0x4CD04DC6L, + 0x2939BBDBL, 0xA9BA4650L, 0xAC9526E8L, 0xBE5EE304L, + 0xA1FAD5F0L, 0x6A2D519AL, 0x63EF8CE2L, 0x9A86EE22L, + 0xC089C2B8L, 0x43242EF6L, 0xA51E03AAL, 0x9CF2D0A4L, + 0x83C061BAL, 0x9BE96A4DL, 0x8FE51550L, 0xBA645BD6L, + 0x2826A2F9L, 0xA73A3AE1L, 0x4BA99586L, 0xEF5562E9L, + 0xC72FEFD3L, 0xF752F7DAL, 0x3F046F69L, 0x77FA0A59L, + 0x80E4A915L, 0x87B08601L, 0x9B09E6ADL, 0x3B3EE593L, + 0xE990FD5AL, 0x9E34D797L, 0x2CF0B7D9L, 0x022B8B51L, + 0x96D5AC3AL, 0x017DA67DL, 0xD1CF3ED6L, 0x7C7D2D28L, + 0x1F9F25CFL, 0xADF2B89BL, 0x5AD6B472L, 0x5A88F54CL, + 0xE029AC71L, 0xE019A5E6L, 0x47B0ACFDL, 0xED93FA9BL, + 0xE8D3C48DL, 0x283B57CCL, 0xF8D56629L, 0x79132E28L, + 0x785F0191L, 0xED756055L, 0xF7960E44L, 0xE3D35E8CL, + 0x15056DD4L, 0x88F46DBAL, 0x03A16125L, 0x0564F0BDL, + 0xC3EB9E15L, 0x3C9057A2L, 0x97271AECL, 0xA93A072AL, + 0x1B3F6D9BL, 0x1E6321F5L, 0xF59C66FBL, 0x26DCF319L, + 0x7533D928L, 0xB155FDF5L, 0x03563482L, 0x8ABA3CBBL, + 0x28517711L, 0xC20AD9F8L, 0xABCC5167L, 0xCCAD925FL, + 0x4DE81751L, 0x3830DC8EL, 0x379D5862L, 0x9320F991L, + 0xEA7A90C2L, 0xFB3E7BCEL, 0x5121CE64L, 0x774FBE32L, + 0xA8B6E37EL, 0xC3293D46L, 0x48DE5369L, 0x6413E680L, + 0xA2AE0810L, 0xDD6DB224L, 0x69852DFDL, 0x09072166L, + 0xB39A460AL, 0x6445C0DDL, 0x586CDECFL, 0x1C20C8AEL, + 0x5BBEF7DDL, 0x1B588D40L, 0xCCD2017FL, 0x6BB4E3BBL, + 0xDDA26A7EL, 0x3A59FF45L, 0x3E350A44L, 0xBCB4CDD5L, + 0x72EACEA8L, 0xFA6484BBL, 0x8D6612AEL, 0xBF3C6F47L, + 0xD29BE463L, 0x542F5D9EL, 0xAEC2771BL, 0xF64E6370L, + 0x740E0D8DL, 0xE75B1357L, 0xF8721671L, 0xAF537D5DL, + 0x4040CB08L, 0x4EB4E2CCL, 0x34D2466AL, 0x0115AF84L, + 0xE1B00428L, 0x95983A1DL, 0x06B89FB4L, 0xCE6EA048L, + 0x6F3F3B82L, 0x3520AB82L, 0x011A1D4BL, 0x277227F8L, + 0x611560B1L, 0xE7933FDCL, 0xBB3A792BL, 0x344525BDL, + 0xA08839E1L, 0x51CE794BL, 0x2F32C9B7L, 0xA01FBAC9L, + 0xE01CC87EL, 0xBCC7D1F6L, 0xCF0111C3L, 0xA1E8AAC7L, + 0x1A908749L, 0xD44FBD9AL, 0xD0DADECBL, 0xD50ADA38L, + 0x0339C32AL, 0xC6913667L, 0x8DF9317CL, 0xE0B12B4FL, + 0xF79E59B7L, 0x43F5BB3AL, 0xF2D519FFL, 0x27D9459CL, + 0xBF97222CL, 0x15E6FC2AL, 0x0F91FC71L, 0x9B941525L, + 0xFAE59361L, 0xCEB69CEBL, 0xC2A86459L, 0x12BAA8D1L, + 0xB6C1075EL, 0xE3056A0CL, 0x10D25065L, 0xCB03A442L, + 0xE0EC6E0EL, 0x1698DB3BL, 0x4C98A0BEL, 0x3278E964L, + 0x9F1F9532L, 0xE0D392DFL, 0xD3A0342BL, 0x8971F21EL, + 0x1B0A7441L, 0x4BA3348CL, 0xC5BE7120L, 0xC37632D8L, + 0xDF359F8DL, 0x9B992F2EL, 0xE60B6F47L, 0x0FE3F11DL, + 0xE54CDA54L, 0x1EDAD891L, 0xCE6279CFL, 0xCD3E7E6FL, + 0x1618B166L, 0xFD2C1D05L, 0x848FD2C5L, 0xF6FB2299L, + 0xF523F357L, 0xA6327623L, 0x93A83531L, 0x56CCCD02L, + 0xACF08162L, 0x5A75EBB5L, 0x6E163697L, 0x88D273CCL, + 0xDE966292L, 0x81B949D0L, 0x4C50901BL, 0x71C65614L, + 0xE6C6C7BDL, 0x327A140AL, 0x45E1D006L, 0xC3F27B9AL, + 0xC9AA53FDL, 0x62A80F00L, 0xBB25BFE2L, 0x35BDD2F6L, + 0x71126905L, 0xB2040222L, 0xB6CBCF7CL, 0xCD769C2BL, + 0x53113EC0L, 0x1640E3D3L, 0x38ABBD60L, 0x2547ADF0L, + 0xBA38209CL, 0xF746CE76L, 0x77AFA1C5L, 0x20756060L, + 0x85CBFE4EL, 0x8AE88DD8L, 0x7AAAF9B0L, 0x4CF9AA7EL, + 0x1948C25CL, 0x02FB8A8CL, 0x01C36AE4L, 0xD6EBE1F9L, + 0x90D4F869L, 0xA65CDEA0L, 0x3F09252DL, 0xC208E69FL, + 0xB74E6132L, 0xCE77E25BL, 0x578FDFE3L, 0x3AC372E6L } +}; + +#endif /* !MBEDTLS_BLOWFISH_ALT */ +#endif /* MBEDTLS_BLOWFISH_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/camellia.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/camellia.c new file mode 100644 index 0000000..e015ca2 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/camellia.c @@ -0,0 +1,1072 @@ +/* + * Camellia implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The Camellia block cipher was designed by NTT and Mitsubishi Electric + * Corporation. + * + * http://info.isl.ntt.co.jp/crypt/eng/camellia/dl/01espec.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_CAMELLIA_C) + +#include "mbedtls/camellia.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_CAMELLIA_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ + | ( (uint32_t) (b)[(i) + 1] << 16 ) \ + | ( (uint32_t) (b)[(i) + 2] << 8 ) \ + | ( (uint32_t) (b)[(i) + 3] ); \ +} +#endif + +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +static const unsigned char SIGMA_CHARS[6][8] = +{ + { 0xa0, 0x9e, 0x66, 0x7f, 0x3b, 0xcc, 0x90, 0x8b }, + { 0xb6, 0x7a, 0xe8, 0x58, 0x4c, 0xaa, 0x73, 0xb2 }, + { 0xc6, 0xef, 0x37, 0x2f, 0xe9, 0x4f, 0x82, 0xbe }, + { 0x54, 0xff, 0x53, 0xa5, 0xf1, 0xd3, 0x6f, 0x1c }, + { 0x10, 0xe5, 0x27, 0xfa, 0xde, 0x68, 0x2d, 0x1d }, + { 0xb0, 0x56, 0x88, 0xc2, 0xb3, 0xe6, 0xc1, 0xfd } +}; + +#if defined(MBEDTLS_CAMELLIA_SMALL_MEMORY) + +static const unsigned char FSb[256] = +{ + 112,130, 44,236,179, 39,192,229,228,133, 87, 53,234, 12,174, 65, + 35,239,107,147, 69, 25,165, 33,237, 14, 79, 78, 29,101,146,189, + 134,184,175,143,124,235, 31,206, 62, 48,220, 95, 94,197, 11, 26, + 166,225, 57,202,213, 71, 93, 61,217, 1, 90,214, 81, 86,108, 77, + 139, 13,154,102,251,204,176, 45,116, 18, 43, 32,240,177,132,153, + 223, 76,203,194, 52,126,118, 5,109,183,169, 49,209, 23, 4,215, + 20, 88, 58, 97,222, 27, 17, 28, 50, 15,156, 22, 83, 24,242, 34, + 254, 68,207,178,195,181,122,145, 36, 8,232,168, 96,252,105, 80, + 170,208,160,125,161,137, 98,151, 84, 91, 30,149,224,255,100,210, + 16,196, 0, 72,163,247,117,219,138, 3,230,218, 9, 63,221,148, + 135, 92,131, 2,205, 74,144, 51,115,103,246,243,157,127,191,226, + 82,155,216, 38,200, 55,198, 59,129,150,111, 75, 19,190, 99, 46, + 233,121,167,140,159,110,188,142, 41,245,249,182, 47,253,180, 89, + 120,152, 6,106,231, 70,113,186,212, 37,171, 66,136,162,141,250, + 114, 7,185, 85,248,238,172, 10, 54, 73, 42,104, 60, 56,241,164, + 64, 40,211,123,187,201, 67,193, 21,227,173,244,119,199,128,158 +}; + +#define SBOX1(n) FSb[(n)] +#define SBOX2(n) (unsigned char)((FSb[(n)] >> 7 ^ FSb[(n)] << 1) & 0xff) +#define SBOX3(n) (unsigned char)((FSb[(n)] >> 1 ^ FSb[(n)] << 7) & 0xff) +#define SBOX4(n) FSb[((n) << 1 ^ (n) >> 7) &0xff] + +#else /* MBEDTLS_CAMELLIA_SMALL_MEMORY */ + +static const unsigned char FSb[256] = +{ + 112, 130, 44, 236, 179, 39, 192, 229, 228, 133, 87, 53, 234, 12, 174, 65, + 35, 239, 107, 147, 69, 25, 165, 33, 237, 14, 79, 78, 29, 101, 146, 189, + 134, 184, 175, 143, 124, 235, 31, 206, 62, 48, 220, 95, 94, 197, 11, 26, + 166, 225, 57, 202, 213, 71, 93, 61, 217, 1, 90, 214, 81, 86, 108, 77, + 139, 13, 154, 102, 251, 204, 176, 45, 116, 18, 43, 32, 240, 177, 132, 153, + 223, 76, 203, 194, 52, 126, 118, 5, 109, 183, 169, 49, 209, 23, 4, 215, + 20, 88, 58, 97, 222, 27, 17, 28, 50, 15, 156, 22, 83, 24, 242, 34, + 254, 68, 207, 178, 195, 181, 122, 145, 36, 8, 232, 168, 96, 252, 105, 80, + 170, 208, 160, 125, 161, 137, 98, 151, 84, 91, 30, 149, 224, 255, 100, 210, + 16, 196, 0, 72, 163, 247, 117, 219, 138, 3, 230, 218, 9, 63, 221, 148, + 135, 92, 131, 2, 205, 74, 144, 51, 115, 103, 246, 243, 157, 127, 191, 226, + 82, 155, 216, 38, 200, 55, 198, 59, 129, 150, 111, 75, 19, 190, 99, 46, + 233, 121, 167, 140, 159, 110, 188, 142, 41, 245, 249, 182, 47, 253, 180, 89, + 120, 152, 6, 106, 231, 70, 113, 186, 212, 37, 171, 66, 136, 162, 141, 250, + 114, 7, 185, 85, 248, 238, 172, 10, 54, 73, 42, 104, 60, 56, 241, 164, + 64, 40, 211, 123, 187, 201, 67, 193, 21, 227, 173, 244, 119, 199, 128, 158 +}; + +static const unsigned char FSb2[256] = +{ + 224, 5, 88, 217, 103, 78, 129, 203, 201, 11, 174, 106, 213, 24, 93, 130, + 70, 223, 214, 39, 138, 50, 75, 66, 219, 28, 158, 156, 58, 202, 37, 123, + 13, 113, 95, 31, 248, 215, 62, 157, 124, 96, 185, 190, 188, 139, 22, 52, + 77, 195, 114, 149, 171, 142, 186, 122, 179, 2, 180, 173, 162, 172, 216, 154, + 23, 26, 53, 204, 247, 153, 97, 90, 232, 36, 86, 64, 225, 99, 9, 51, + 191, 152, 151, 133, 104, 252, 236, 10, 218, 111, 83, 98, 163, 46, 8, 175, + 40, 176, 116, 194, 189, 54, 34, 56, 100, 30, 57, 44, 166, 48, 229, 68, + 253, 136, 159, 101, 135, 107, 244, 35, 72, 16, 209, 81, 192, 249, 210, 160, + 85, 161, 65, 250, 67, 19, 196, 47, 168, 182, 60, 43, 193, 255, 200, 165, + 32, 137, 0, 144, 71, 239, 234, 183, 21, 6, 205, 181, 18, 126, 187, 41, + 15, 184, 7, 4, 155, 148, 33, 102, 230, 206, 237, 231, 59, 254, 127, 197, + 164, 55, 177, 76, 145, 110, 141, 118, 3, 45, 222, 150, 38, 125, 198, 92, + 211, 242, 79, 25, 63, 220, 121, 29, 82, 235, 243, 109, 94, 251, 105, 178, + 240, 49, 12, 212, 207, 140, 226, 117, 169, 74, 87, 132, 17, 69, 27, 245, + 228, 14, 115, 170, 241, 221, 89, 20, 108, 146, 84, 208, 120, 112, 227, 73, + 128, 80, 167, 246, 119, 147, 134, 131, 42, 199, 91, 233, 238, 143, 1, 61 +}; + +static const unsigned char FSb3[256] = +{ + 56, 65, 22, 118, 217, 147, 96, 242, 114, 194, 171, 154, 117, 6, 87, 160, + 145, 247, 181, 201, 162, 140, 210, 144, 246, 7, 167, 39, 142, 178, 73, 222, + 67, 92, 215, 199, 62, 245, 143, 103, 31, 24, 110, 175, 47, 226, 133, 13, + 83, 240, 156, 101, 234, 163, 174, 158, 236, 128, 45, 107, 168, 43, 54, 166, + 197, 134, 77, 51, 253, 102, 88, 150, 58, 9, 149, 16, 120, 216, 66, 204, + 239, 38, 229, 97, 26, 63, 59, 130, 182, 219, 212, 152, 232, 139, 2, 235, + 10, 44, 29, 176, 111, 141, 136, 14, 25, 135, 78, 11, 169, 12, 121, 17, + 127, 34, 231, 89, 225, 218, 61, 200, 18, 4, 116, 84, 48, 126, 180, 40, + 85, 104, 80, 190, 208, 196, 49, 203, 42, 173, 15, 202, 112, 255, 50, 105, + 8, 98, 0, 36, 209, 251, 186, 237, 69, 129, 115, 109, 132, 159, 238, 74, + 195, 46, 193, 1, 230, 37, 72, 153, 185, 179, 123, 249, 206, 191, 223, 113, + 41, 205, 108, 19, 100, 155, 99, 157, 192, 75, 183, 165, 137, 95, 177, 23, + 244, 188, 211, 70, 207, 55, 94, 71, 148, 250, 252, 91, 151, 254, 90, 172, + 60, 76, 3, 53, 243, 35, 184, 93, 106, 146, 213, 33, 68, 81, 198, 125, + 57, 131, 220, 170, 124, 119, 86, 5, 27, 164, 21, 52, 30, 28, 248, 82, + 32, 20, 233, 189, 221, 228, 161, 224, 138, 241, 214, 122, 187, 227, 64, 79 +}; + +static const unsigned char FSb4[256] = +{ + 112, 44, 179, 192, 228, 87, 234, 174, 35, 107, 69, 165, 237, 79, 29, 146, + 134, 175, 124, 31, 62, 220, 94, 11, 166, 57, 213, 93, 217, 90, 81, 108, + 139, 154, 251, 176, 116, 43, 240, 132, 223, 203, 52, 118, 109, 169, 209, 4, + 20, 58, 222, 17, 50, 156, 83, 242, 254, 207, 195, 122, 36, 232, 96, 105, + 170, 160, 161, 98, 84, 30, 224, 100, 16, 0, 163, 117, 138, 230, 9, 221, + 135, 131, 205, 144, 115, 246, 157, 191, 82, 216, 200, 198, 129, 111, 19, 99, + 233, 167, 159, 188, 41, 249, 47, 180, 120, 6, 231, 113, 212, 171, 136, 141, + 114, 185, 248, 172, 54, 42, 60, 241, 64, 211, 187, 67, 21, 173, 119, 128, + 130, 236, 39, 229, 133, 53, 12, 65, 239, 147, 25, 33, 14, 78, 101, 189, + 184, 143, 235, 206, 48, 95, 197, 26, 225, 202, 71, 61, 1, 214, 86, 77, + 13, 102, 204, 45, 18, 32, 177, 153, 76, 194, 126, 5, 183, 49, 23, 215, + 88, 97, 27, 28, 15, 22, 24, 34, 68, 178, 181, 145, 8, 168, 252, 80, + 208, 125, 137, 151, 91, 149, 255, 210, 196, 72, 247, 219, 3, 218, 63, 148, + 92, 2, 74, 51, 103, 243, 127, 226, 155, 38, 55, 59, 150, 75, 190, 46, + 121, 140, 110, 142, 245, 182, 253, 89, 152, 106, 70, 186, 37, 66, 162, 250, + 7, 85, 238, 10, 73, 104, 56, 164, 40, 123, 201, 193, 227, 244, 199, 158 +}; + +#define SBOX1(n) FSb[(n)] +#define SBOX2(n) FSb2[(n)] +#define SBOX3(n) FSb3[(n)] +#define SBOX4(n) FSb4[(n)] + +#endif /* MBEDTLS_CAMELLIA_SMALL_MEMORY */ + +static const unsigned char shifts[2][4][4] = +{ + { + { 1, 1, 1, 1 }, /* KL */ + { 0, 0, 0, 0 }, /* KR */ + { 1, 1, 1, 1 }, /* KA */ + { 0, 0, 0, 0 } /* KB */ + }, + { + { 1, 0, 1, 1 }, /* KL */ + { 1, 1, 0, 1 }, /* KR */ + { 1, 1, 1, 0 }, /* KA */ + { 1, 1, 0, 1 } /* KB */ + } +}; + +static const signed char indexes[2][4][20] = +{ + { + { 0, 1, 2, 3, 8, 9, 10, 11, 38, 39, + 36, 37, 23, 20, 21, 22, 27, -1, -1, 26 }, /* KL -> RK */ + { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, /* KR -> RK */ + { 4, 5, 6, 7, 12, 13, 14, 15, 16, 17, + 18, 19, -1, 24, 25, -1, 31, 28, 29, 30 }, /* KA -> RK */ + { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 } /* KB -> RK */ + }, + { + { 0, 1, 2, 3, 61, 62, 63, 60, -1, -1, + -1, -1, 27, 24, 25, 26, 35, 32, 33, 34 }, /* KL -> RK */ + { -1, -1, -1, -1, 8, 9, 10, 11, 16, 17, + 18, 19, -1, -1, -1, -1, 39, 36, 37, 38 }, /* KR -> RK */ + { -1, -1, -1, -1, 12, 13, 14, 15, 58, 59, + 56, 57, 31, 28, 29, 30, -1, -1, -1, -1 }, /* KA -> RK */ + { 4, 5, 6, 7, 65, 66, 67, 64, 20, 21, + 22, 23, -1, -1, -1, -1, 43, 40, 41, 42 } /* KB -> RK */ + } +}; + +static const signed char transposes[2][20] = +{ + { + 21, 22, 23, 20, + -1, -1, -1, -1, + 18, 19, 16, 17, + 11, 8, 9, 10, + 15, 12, 13, 14 + }, + { + 25, 26, 27, 24, + 29, 30, 31, 28, + 18, 19, 16, 17, + -1, -1, -1, -1, + -1, -1, -1, -1 + } +}; + +/* Shift macro for 128 bit strings with rotation smaller than 32 bits (!) */ +#define ROTL(DEST, SRC, SHIFT) \ +{ \ + (DEST)[0] = (SRC)[0] << (SHIFT) ^ (SRC)[1] >> (32 - (SHIFT)); \ + (DEST)[1] = (SRC)[1] << (SHIFT) ^ (SRC)[2] >> (32 - (SHIFT)); \ + (DEST)[2] = (SRC)[2] << (SHIFT) ^ (SRC)[3] >> (32 - (SHIFT)); \ + (DEST)[3] = (SRC)[3] << (SHIFT) ^ (SRC)[0] >> (32 - (SHIFT)); \ +} + +#define FL(XL, XR, KL, KR) \ +{ \ + (XR) = ((((XL) & (KL)) << 1) | (((XL) & (KL)) >> 31)) ^ (XR); \ + (XL) = ((XR) | (KR)) ^ (XL); \ +} + +#define FLInv(YL, YR, KL, KR) \ +{ \ + (YL) = ((YR) | (KR)) ^ (YL); \ + (YR) = ((((YL) & (KL)) << 1) | (((YL) & (KL)) >> 31)) ^ (YR); \ +} + +#define SHIFT_AND_PLACE(INDEX, OFFSET) \ +{ \ + TK[0] = KC[(OFFSET) * 4 + 0]; \ + TK[1] = KC[(OFFSET) * 4 + 1]; \ + TK[2] = KC[(OFFSET) * 4 + 2]; \ + TK[3] = KC[(OFFSET) * 4 + 3]; \ + \ + for( i = 1; i <= 4; i++ ) \ + if( shifts[(INDEX)][(OFFSET)][i -1] ) \ + ROTL(TK + i * 4, TK, ( 15 * i ) % 32); \ + \ + for( i = 0; i < 20; i++ ) \ + if( indexes[(INDEX)][(OFFSET)][i] != -1 ) { \ + RK[indexes[(INDEX)][(OFFSET)][i]] = TK[ i ]; \ + } \ +} + +static void camellia_feistel( const uint32_t x[2], const uint32_t k[2], + uint32_t z[2]) +{ + uint32_t I0, I1; + I0 = x[0] ^ k[0]; + I1 = x[1] ^ k[1]; + + I0 = ((uint32_t) SBOX1((I0 >> 24) & 0xFF) << 24) | + ((uint32_t) SBOX2((I0 >> 16) & 0xFF) << 16) | + ((uint32_t) SBOX3((I0 >> 8) & 0xFF) << 8) | + ((uint32_t) SBOX4((I0 ) & 0xFF) ); + I1 = ((uint32_t) SBOX2((I1 >> 24) & 0xFF) << 24) | + ((uint32_t) SBOX3((I1 >> 16) & 0xFF) << 16) | + ((uint32_t) SBOX4((I1 >> 8) & 0xFF) << 8) | + ((uint32_t) SBOX1((I1 ) & 0xFF) ); + + I0 ^= (I1 << 8) | (I1 >> 24); + I1 ^= (I0 << 16) | (I0 >> 16); + I0 ^= (I1 >> 8) | (I1 << 24); + I1 ^= (I0 >> 8) | (I0 << 24); + + z[0] ^= I1; + z[1] ^= I0; +} + +void mbedtls_camellia_init( mbedtls_camellia_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_camellia_context ) ); +} + +void mbedtls_camellia_free( mbedtls_camellia_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_camellia_context ) ); +} + +/* + * Camellia key schedule (encryption) + */ +int mbedtls_camellia_setkey_enc( mbedtls_camellia_context *ctx, const unsigned char *key, + unsigned int keybits ) +{ + int idx; + size_t i; + uint32_t *RK; + unsigned char t[64]; + uint32_t SIGMA[6][2]; + uint32_t KC[16]; + uint32_t TK[20]; + + RK = ctx->rk; + + memset( t, 0, 64 ); + memset( RK, 0, sizeof(ctx->rk) ); + + switch( keybits ) + { + case 128: ctx->nr = 3; idx = 0; break; + case 192: + case 256: ctx->nr = 4; idx = 1; break; + default : return( MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH ); + } + + for( i = 0; i < keybits / 8; ++i ) + t[i] = key[i]; + + if( keybits == 192 ) { + for( i = 0; i < 8; i++ ) + t[24 + i] = ~t[16 + i]; + } + + /* + * Prepare SIGMA values + */ + for( i = 0; i < 6; i++ ) { + GET_UINT32_BE( SIGMA[i][0], SIGMA_CHARS[i], 0 ); + GET_UINT32_BE( SIGMA[i][1], SIGMA_CHARS[i], 4 ); + } + + /* + * Key storage in KC + * Order: KL, KR, KA, KB + */ + memset( KC, 0, sizeof(KC) ); + + /* Store KL, KR */ + for( i = 0; i < 8; i++ ) + GET_UINT32_BE( KC[i], t, i * 4 ); + + /* Generate KA */ + for( i = 0; i < 4; ++i ) + KC[8 + i] = KC[i] ^ KC[4 + i]; + + camellia_feistel( KC + 8, SIGMA[0], KC + 10 ); + camellia_feistel( KC + 10, SIGMA[1], KC + 8 ); + + for( i = 0; i < 4; ++i ) + KC[8 + i] ^= KC[i]; + + camellia_feistel( KC + 8, SIGMA[2], KC + 10 ); + camellia_feistel( KC + 10, SIGMA[3], KC + 8 ); + + if( keybits > 128 ) { + /* Generate KB */ + for( i = 0; i < 4; ++i ) + KC[12 + i] = KC[4 + i] ^ KC[8 + i]; + + camellia_feistel( KC + 12, SIGMA[4], KC + 14 ); + camellia_feistel( KC + 14, SIGMA[5], KC + 12 ); + } + + /* + * Generating subkeys + */ + + /* Manipulating KL */ + SHIFT_AND_PLACE( idx, 0 ); + + /* Manipulating KR */ + if( keybits > 128 ) { + SHIFT_AND_PLACE( idx, 1 ); + } + + /* Manipulating KA */ + SHIFT_AND_PLACE( idx, 2 ); + + /* Manipulating KB */ + if( keybits > 128 ) { + SHIFT_AND_PLACE( idx, 3 ); + } + + /* Do transpositions */ + for( i = 0; i < 20; i++ ) { + if( transposes[idx][i] != -1 ) { + RK[32 + 12 * idx + i] = RK[transposes[idx][i]]; + } + } + + return( 0 ); +} + +/* + * Camellia key schedule (decryption) + */ +int mbedtls_camellia_setkey_dec( mbedtls_camellia_context *ctx, const unsigned char *key, + unsigned int keybits ) +{ + int idx, ret; + size_t i; + mbedtls_camellia_context cty; + uint32_t *RK; + uint32_t *SK; + + mbedtls_camellia_init( &cty ); + + /* Also checks keybits */ + if( ( ret = mbedtls_camellia_setkey_enc( &cty, key, keybits ) ) != 0 ) + goto exit; + + ctx->nr = cty.nr; + idx = ( ctx->nr == 4 ); + + RK = ctx->rk; + SK = cty.rk + 24 * 2 + 8 * idx * 2; + + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + + for( i = 22 + 8 * idx, SK -= 6; i > 0; i--, SK -= 4 ) + { + *RK++ = *SK++; + *RK++ = *SK++; + } + + SK -= 2; + + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + +exit: + mbedtls_camellia_free( &cty ); + + return( ret ); +} + +/* + * Camellia-ECB block encryption/decryption + */ +int mbedtls_camellia_crypt_ecb( mbedtls_camellia_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ) +{ + int NR; + uint32_t *RK, X[4]; + + ( (void) mode ); + + NR = ctx->nr; + RK = ctx->rk; + + GET_UINT32_BE( X[0], input, 0 ); + GET_UINT32_BE( X[1], input, 4 ); + GET_UINT32_BE( X[2], input, 8 ); + GET_UINT32_BE( X[3], input, 12 ); + + X[0] ^= *RK++; + X[1] ^= *RK++; + X[2] ^= *RK++; + X[3] ^= *RK++; + + while( NR ) { + --NR; + camellia_feistel( X, RK, X + 2 ); + RK += 2; + camellia_feistel( X + 2, RK, X ); + RK += 2; + camellia_feistel( X, RK, X + 2 ); + RK += 2; + camellia_feistel( X + 2, RK, X ); + RK += 2; + camellia_feistel( X, RK, X + 2 ); + RK += 2; + camellia_feistel( X + 2, RK, X ); + RK += 2; + + if( NR ) { + FL(X[0], X[1], RK[0], RK[1]); + RK += 2; + FLInv(X[2], X[3], RK[0], RK[1]); + RK += 2; + } + } + + X[2] ^= *RK++; + X[3] ^= *RK++; + X[0] ^= *RK++; + X[1] ^= *RK++; + + PUT_UINT32_BE( X[2], output, 0 ); + PUT_UINT32_BE( X[3], output, 4 ); + PUT_UINT32_BE( X[0], output, 8 ); + PUT_UINT32_BE( X[1], output, 12 ); + + return( 0 ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/* + * Camellia-CBC buffer encryption/decryption + */ +int mbedtls_camellia_crypt_cbc( mbedtls_camellia_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ) +{ + int i; + unsigned char temp[16]; + + if( length % 16 ) + return( MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH ); + + if( mode == MBEDTLS_CAMELLIA_DECRYPT ) + { + while( length > 0 ) + { + memcpy( temp, input, 16 ); + mbedtls_camellia_crypt_ecb( ctx, mode, input, output ); + + for( i = 0; i < 16; i++ ) + output[i] = (unsigned char)( output[i] ^ iv[i] ); + + memcpy( iv, temp, 16 ); + + input += 16; + output += 16; + length -= 16; + } + } + else + { + while( length > 0 ) + { + for( i = 0; i < 16; i++ ) + output[i] = (unsigned char)( input[i] ^ iv[i] ); + + mbedtls_camellia_crypt_ecb( ctx, mode, output, output ); + memcpy( iv, output, 16 ); + + input += 16; + output += 16; + length -= 16; + } + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +/* + * Camellia-CFB128 buffer encryption/decryption + */ +int mbedtls_camellia_crypt_cfb128( mbedtls_camellia_context *ctx, + int mode, + size_t length, + size_t *iv_off, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ) +{ + int c; + size_t n = *iv_off; + + if( mode == MBEDTLS_CAMELLIA_DECRYPT ) + { + while( length-- ) + { + if( n == 0 ) + mbedtls_camellia_crypt_ecb( ctx, MBEDTLS_CAMELLIA_ENCRYPT, iv, iv ); + + c = *input++; + *output++ = (unsigned char)( c ^ iv[n] ); + iv[n] = (unsigned char) c; + + n = ( n + 1 ) & 0x0F; + } + } + else + { + while( length-- ) + { + if( n == 0 ) + mbedtls_camellia_crypt_ecb( ctx, MBEDTLS_CAMELLIA_ENCRYPT, iv, iv ); + + iv[n] = *output++ = (unsigned char)( iv[n] ^ *input++ ); + + n = ( n + 1 ) & 0x0F; + } + } + + *iv_off = n; + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/* + * Camellia-CTR buffer encryption/decryption + */ +int mbedtls_camellia_crypt_ctr( mbedtls_camellia_context *ctx, + size_t length, + size_t *nc_off, + unsigned char nonce_counter[16], + unsigned char stream_block[16], + const unsigned char *input, + unsigned char *output ) +{ + int c, i; + size_t n = *nc_off; + + while( length-- ) + { + if( n == 0 ) { + mbedtls_camellia_crypt_ecb( ctx, MBEDTLS_CAMELLIA_ENCRYPT, nonce_counter, + stream_block ); + + for( i = 16; i > 0; i-- ) + if( ++nonce_counter[i - 1] != 0 ) + break; + } + c = *input++; + *output++ = (unsigned char)( c ^ stream_block[n] ); + + n = ( n + 1 ) & 0x0F; + } + + *nc_off = n; + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CTR */ +#endif /* !MBEDTLS_CAMELLIA_ALT */ + +#if defined(MBEDTLS_SELF_TEST) + +/* + * Camellia test vectors from: + * + * http://info.isl.ntt.co.jp/crypt/eng/camellia/technology.html: + * http://info.isl.ntt.co.jp/crypt/eng/camellia/dl/cryptrec/intermediate.txt + * http://info.isl.ntt.co.jp/crypt/eng/camellia/dl/cryptrec/t_camellia.txt + * (For each bitlength: Key 0, Nr 39) + */ +#define CAMELLIA_TESTS_ECB 2 + +static const unsigned char camellia_test_ecb_key[3][CAMELLIA_TESTS_ECB][32] = +{ + { + { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } + }, + { + { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, + 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } + }, + { + { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, + 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, + 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } + }, +}; + +static const unsigned char camellia_test_ecb_plain[CAMELLIA_TESTS_ECB][16] = +{ + { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 }, + { 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } +}; + +static const unsigned char camellia_test_ecb_cipher[3][CAMELLIA_TESTS_ECB][16] = +{ + { + { 0x67, 0x67, 0x31, 0x38, 0x54, 0x96, 0x69, 0x73, + 0x08, 0x57, 0x06, 0x56, 0x48, 0xea, 0xbe, 0x43 }, + { 0x38, 0x3C, 0x6C, 0x2A, 0xAB, 0xEF, 0x7F, 0xDE, + 0x25, 0xCD, 0x47, 0x0B, 0xF7, 0x74, 0xA3, 0x31 } + }, + { + { 0xb4, 0x99, 0x34, 0x01, 0xb3, 0xe9, 0x96, 0xf8, + 0x4e, 0xe5, 0xce, 0xe7, 0xd7, 0x9b, 0x09, 0xb9 }, + { 0xD1, 0x76, 0x3F, 0xC0, 0x19, 0xD7, 0x7C, 0xC9, + 0x30, 0xBF, 0xF2, 0xA5, 0x6F, 0x7C, 0x93, 0x64 } + }, + { + { 0x9a, 0xcc, 0x23, 0x7d, 0xff, 0x16, 0xd7, 0x6c, + 0x20, 0xef, 0x7c, 0x91, 0x9e, 0x3a, 0x75, 0x09 }, + { 0x05, 0x03, 0xFB, 0x10, 0xAB, 0x24, 0x1E, 0x7C, + 0xF4, 0x5D, 0x8C, 0xDE, 0xEE, 0x47, 0x43, 0x35 } + } +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#define CAMELLIA_TESTS_CBC 3 + +static const unsigned char camellia_test_cbc_key[3][32] = +{ + { 0x2B, 0x7E, 0x15, 0x16, 0x28, 0xAE, 0xD2, 0xA6, + 0xAB, 0xF7, 0x15, 0x88, 0x09, 0xCF, 0x4F, 0x3C } + , + { 0x8E, 0x73, 0xB0, 0xF7, 0xDA, 0x0E, 0x64, 0x52, + 0xC8, 0x10, 0xF3, 0x2B, 0x80, 0x90, 0x79, 0xE5, + 0x62, 0xF8, 0xEA, 0xD2, 0x52, 0x2C, 0x6B, 0x7B } + , + { 0x60, 0x3D, 0xEB, 0x10, 0x15, 0xCA, 0x71, 0xBE, + 0x2B, 0x73, 0xAE, 0xF0, 0x85, 0x7D, 0x77, 0x81, + 0x1F, 0x35, 0x2C, 0x07, 0x3B, 0x61, 0x08, 0xD7, + 0x2D, 0x98, 0x10, 0xA3, 0x09, 0x14, 0xDF, 0xF4 } +}; + +static const unsigned char camellia_test_cbc_iv[16] = + + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F } +; + +static const unsigned char camellia_test_cbc_plain[CAMELLIA_TESTS_CBC][16] = +{ + { 0x6B, 0xC1, 0xBE, 0xE2, 0x2E, 0x40, 0x9F, 0x96, + 0xE9, 0x3D, 0x7E, 0x11, 0x73, 0x93, 0x17, 0x2A }, + { 0xAE, 0x2D, 0x8A, 0x57, 0x1E, 0x03, 0xAC, 0x9C, + 0x9E, 0xB7, 0x6F, 0xAC, 0x45, 0xAF, 0x8E, 0x51 }, + { 0x30, 0xC8, 0x1C, 0x46, 0xA3, 0x5C, 0xE4, 0x11, + 0xE5, 0xFB, 0xC1, 0x19, 0x1A, 0x0A, 0x52, 0xEF } + +}; + +static const unsigned char camellia_test_cbc_cipher[3][CAMELLIA_TESTS_CBC][16] = +{ + { + { 0x16, 0x07, 0xCF, 0x49, 0x4B, 0x36, 0xBB, 0xF0, + 0x0D, 0xAE, 0xB0, 0xB5, 0x03, 0xC8, 0x31, 0xAB }, + { 0xA2, 0xF2, 0xCF, 0x67, 0x16, 0x29, 0xEF, 0x78, + 0x40, 0xC5, 0xA5, 0xDF, 0xB5, 0x07, 0x48, 0x87 }, + { 0x0F, 0x06, 0x16, 0x50, 0x08, 0xCF, 0x8B, 0x8B, + 0x5A, 0x63, 0x58, 0x63, 0x62, 0x54, 0x3E, 0x54 } + }, + { + { 0x2A, 0x48, 0x30, 0xAB, 0x5A, 0xC4, 0xA1, 0xA2, + 0x40, 0x59, 0x55, 0xFD, 0x21, 0x95, 0xCF, 0x93 }, + { 0x5D, 0x5A, 0x86, 0x9B, 0xD1, 0x4C, 0xE5, 0x42, + 0x64, 0xF8, 0x92, 0xA6, 0xDD, 0x2E, 0xC3, 0xD5 }, + { 0x37, 0xD3, 0x59, 0xC3, 0x34, 0x98, 0x36, 0xD8, + 0x84, 0xE3, 0x10, 0xAD, 0xDF, 0x68, 0xC4, 0x49 } + }, + { + { 0xE6, 0xCF, 0xA3, 0x5F, 0xC0, 0x2B, 0x13, 0x4A, + 0x4D, 0x2C, 0x0B, 0x67, 0x37, 0xAC, 0x3E, 0xDA }, + { 0x36, 0xCB, 0xEB, 0x73, 0xBD, 0x50, 0x4B, 0x40, + 0x70, 0xB1, 0xB7, 0xDE, 0x2B, 0x21, 0xEB, 0x50 }, + { 0xE3, 0x1A, 0x60, 0x55, 0x29, 0x7D, 0x96, 0xCA, + 0x33, 0x30, 0xCD, 0xF1, 0xB1, 0x86, 0x0A, 0x83 } + } +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +/* + * Camellia-CTR test vectors from: + * + * http://www.faqs.org/rfcs/rfc5528.html + */ + +static const unsigned char camellia_test_ctr_key[3][16] = +{ + { 0xAE, 0x68, 0x52, 0xF8, 0x12, 0x10, 0x67, 0xCC, + 0x4B, 0xF7, 0xA5, 0x76, 0x55, 0x77, 0xF3, 0x9E }, + { 0x7E, 0x24, 0x06, 0x78, 0x17, 0xFA, 0xE0, 0xD7, + 0x43, 0xD6, 0xCE, 0x1F, 0x32, 0x53, 0x91, 0x63 }, + { 0x76, 0x91, 0xBE, 0x03, 0x5E, 0x50, 0x20, 0xA8, + 0xAC, 0x6E, 0x61, 0x85, 0x29, 0xF9, 0xA0, 0xDC } +}; + +static const unsigned char camellia_test_ctr_nonce_counter[3][16] = +{ + { 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01 }, + { 0x00, 0x6C, 0xB6, 0xDB, 0xC0, 0x54, 0x3B, 0x59, + 0xDA, 0x48, 0xD9, 0x0B, 0x00, 0x00, 0x00, 0x01 }, + { 0x00, 0xE0, 0x01, 0x7B, 0x27, 0x77, 0x7F, 0x3F, + 0x4A, 0x17, 0x86, 0xF0, 0x00, 0x00, 0x00, 0x01 } +}; + +static const unsigned char camellia_test_ctr_pt[3][48] = +{ + { 0x53, 0x69, 0x6E, 0x67, 0x6C, 0x65, 0x20, 0x62, + 0x6C, 0x6F, 0x63, 0x6B, 0x20, 0x6D, 0x73, 0x67 }, + + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F }, + + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, + 0x20, 0x21, 0x22, 0x23 } +}; + +static const unsigned char camellia_test_ctr_ct[3][48] = +{ + { 0xD0, 0x9D, 0xC2, 0x9A, 0x82, 0x14, 0x61, 0x9A, + 0x20, 0x87, 0x7C, 0x76, 0xDB, 0x1F, 0x0B, 0x3F }, + { 0xDB, 0xF3, 0xC7, 0x8D, 0xC0, 0x83, 0x96, 0xD4, + 0xDA, 0x7C, 0x90, 0x77, 0x65, 0xBB, 0xCB, 0x44, + 0x2B, 0x8E, 0x8E, 0x0F, 0x31, 0xF0, 0xDC, 0xA7, + 0x2C, 0x74, 0x17, 0xE3, 0x53, 0x60, 0xE0, 0x48 }, + { 0xB1, 0x9D, 0x1F, 0xCD, 0xCB, 0x75, 0xEB, 0x88, + 0x2F, 0x84, 0x9C, 0xE2, 0x4D, 0x85, 0xCF, 0x73, + 0x9C, 0xE6, 0x4B, 0x2B, 0x5C, 0x9D, 0x73, 0xF1, + 0x4F, 0x2D, 0x5D, 0x9D, 0xCE, 0x98, 0x89, 0xCD, + 0xDF, 0x50, 0x86, 0x96 } +}; + +static const int camellia_test_ctr_len[3] = + { 16, 32, 36 }; +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +/* + * Checkup routine + */ +int mbedtls_camellia_self_test( int verbose ) +{ + int i, j, u, v; + unsigned char key[32]; + unsigned char buf[64]; + unsigned char src[16]; + unsigned char dst[16]; +#if defined(MBEDTLS_CIPHER_MODE_CBC) + unsigned char iv[16]; +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + size_t offset, len; + unsigned char nonce_counter[16]; + unsigned char stream_block[16]; +#endif + + mbedtls_camellia_context ctx; + + memset( key, 0, 32 ); + + for( j = 0; j < 6; j++ ) { + u = j >> 1; + v = j & 1; + + if( verbose != 0 ) + mbedtls_printf( " CAMELLIA-ECB-%3d (%s): ", 128 + u * 64, + (v == MBEDTLS_CAMELLIA_DECRYPT) ? "dec" : "enc"); + + for( i = 0; i < CAMELLIA_TESTS_ECB; i++ ) { + memcpy( key, camellia_test_ecb_key[u][i], 16 + 8 * u ); + + if( v == MBEDTLS_CAMELLIA_DECRYPT ) { + mbedtls_camellia_setkey_dec( &ctx, key, 128 + u * 64 ); + memcpy( src, camellia_test_ecb_cipher[u][i], 16 ); + memcpy( dst, camellia_test_ecb_plain[i], 16 ); + } else { /* MBEDTLS_CAMELLIA_ENCRYPT */ + mbedtls_camellia_setkey_enc( &ctx, key, 128 + u * 64 ); + memcpy( src, camellia_test_ecb_plain[i], 16 ); + memcpy( dst, camellia_test_ecb_cipher[u][i], 16 ); + } + + mbedtls_camellia_crypt_ecb( &ctx, v, src, buf ); + + if( memcmp( buf, dst, 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + /* + * CBC mode + */ + for( j = 0; j < 6; j++ ) + { + u = j >> 1; + v = j & 1; + + if( verbose != 0 ) + mbedtls_printf( " CAMELLIA-CBC-%3d (%s): ", 128 + u * 64, + ( v == MBEDTLS_CAMELLIA_DECRYPT ) ? "dec" : "enc" ); + + memcpy( src, camellia_test_cbc_iv, 16 ); + memcpy( dst, camellia_test_cbc_iv, 16 ); + memcpy( key, camellia_test_cbc_key[u], 16 + 8 * u ); + + if( v == MBEDTLS_CAMELLIA_DECRYPT ) { + mbedtls_camellia_setkey_dec( &ctx, key, 128 + u * 64 ); + } else { + mbedtls_camellia_setkey_enc( &ctx, key, 128 + u * 64 ); + } + + for( i = 0; i < CAMELLIA_TESTS_CBC; i++ ) { + + if( v == MBEDTLS_CAMELLIA_DECRYPT ) { + memcpy( iv , src, 16 ); + memcpy( src, camellia_test_cbc_cipher[u][i], 16 ); + memcpy( dst, camellia_test_cbc_plain[i], 16 ); + } else { /* MBEDTLS_CAMELLIA_ENCRYPT */ + memcpy( iv , dst, 16 ); + memcpy( src, camellia_test_cbc_plain[i], 16 ); + memcpy( dst, camellia_test_cbc_cipher[u][i], 16 ); + } + + mbedtls_camellia_crypt_cbc( &ctx, v, 16, iv, src, buf ); + + if( memcmp( buf, dst, 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +#if defined(MBEDTLS_CIPHER_MODE_CTR) + /* + * CTR mode + */ + for( i = 0; i < 6; i++ ) + { + u = i >> 1; + v = i & 1; + + if( verbose != 0 ) + mbedtls_printf( " CAMELLIA-CTR-128 (%s): ", + ( v == MBEDTLS_CAMELLIA_DECRYPT ) ? "dec" : "enc" ); + + memcpy( nonce_counter, camellia_test_ctr_nonce_counter[u], 16 ); + memcpy( key, camellia_test_ctr_key[u], 16 ); + + offset = 0; + mbedtls_camellia_setkey_enc( &ctx, key, 128 ); + + if( v == MBEDTLS_CAMELLIA_DECRYPT ) + { + len = camellia_test_ctr_len[u]; + memcpy( buf, camellia_test_ctr_ct[u], len ); + + mbedtls_camellia_crypt_ctr( &ctx, len, &offset, nonce_counter, stream_block, + buf, buf ); + + if( memcmp( buf, camellia_test_ctr_pt[u], len ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + else + { + len = camellia_test_ctr_len[u]; + memcpy( buf, camellia_test_ctr_pt[u], len ); + + mbedtls_camellia_crypt_ctr( &ctx, len, &offset, nonce_counter, stream_block, + buf, buf ); + + if( memcmp( buf, camellia_test_ctr_ct[u], len ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_CAMELLIA_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ccm.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ccm.c new file mode 100644 index 0000000..3463a0b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ccm.c @@ -0,0 +1,464 @@ +/* + * NIST SP800-38C compliant CCM implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Definition of CCM: + * http://csrc.nist.gov/publications/nistpubs/800-38C/SP800-38C_updated-July20_2007.pdf + * RFC 3610 "Counter with CBC-MAC (CCM)" + * + * Related: + * RFC 5116 "An Interface and Algorithms for Authenticated Encryption" + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_CCM_C) + +#include "mbedtls/ccm.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +#define CCM_ENCRYPT 0 +#define CCM_DECRYPT 1 + +/* + * Initialize context + */ +void mbedtls_ccm_init( mbedtls_ccm_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_ccm_context ) ); +} + +int mbedtls_ccm_setkey( mbedtls_ccm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits ) +{ + int ret; + const mbedtls_cipher_info_t *cipher_info; + + cipher_info = mbedtls_cipher_info_from_values( cipher, keybits, MBEDTLS_MODE_ECB ); + if( cipher_info == NULL ) + return( MBEDTLS_ERR_CCM_BAD_INPUT ); + + if( cipher_info->block_size != 16 ) + return( MBEDTLS_ERR_CCM_BAD_INPUT ); + + mbedtls_cipher_free( &ctx->cipher_ctx ); + + if( ( ret = mbedtls_cipher_setup( &ctx->cipher_ctx, cipher_info ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_setkey( &ctx->cipher_ctx, key, keybits, + MBEDTLS_ENCRYPT ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} + +/* + * Free context + */ +void mbedtls_ccm_free( mbedtls_ccm_context *ctx ) +{ + mbedtls_cipher_free( &ctx->cipher_ctx ); + mbedtls_zeroize( ctx, sizeof( mbedtls_ccm_context ) ); +} + +/* + * Macros for common operations. + * Results in smaller compiled code than static inline functions. + */ + +/* + * Update the CBC-MAC state in y using a block in b + * (Always using b as the source helps the compiler optimise a bit better.) + */ +#define UPDATE_CBC_MAC \ + for( i = 0; i < 16; i++ ) \ + y[i] ^= b[i]; \ + \ + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, y, 16, y, &olen ) ) != 0 ) \ + return( ret ); + +/* + * Encrypt or decrypt a partial block with CTR + * Warning: using b for temporary storage! src and dst must not be b! + * This avoids allocating one more 16 bytes buffer while allowing src == dst. + */ +#define CTR_CRYPT( dst, src, len ) \ + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, ctr, 16, b, &olen ) ) != 0 ) \ + return( ret ); \ + \ + for( i = 0; i < len; i++ ) \ + dst[i] = src[i] ^ b[i]; + +/* + * Authenticated encryption or decryption + */ +static int ccm_auth_crypt( mbedtls_ccm_context *ctx, int mode, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + unsigned char *tag, size_t tag_len ) +{ + int ret; + unsigned char i; + unsigned char q; + size_t len_left, olen; + unsigned char b[16]; + unsigned char y[16]; + unsigned char ctr[16]; + const unsigned char *src; + unsigned char *dst; + + /* + * Check length requirements: SP800-38C A.1 + * Additional requirement: a < 2^16 - 2^8 to simplify the code. + * 'length' checked later (when writing it to the first block) + */ + if( tag_len < 4 || tag_len > 16 || tag_len % 2 != 0 ) + return( MBEDTLS_ERR_CCM_BAD_INPUT ); + + /* Also implies q is within bounds */ + if( iv_len < 7 || iv_len > 13 ) + return( MBEDTLS_ERR_CCM_BAD_INPUT ); + + if( add_len > 0xFF00 ) + return( MBEDTLS_ERR_CCM_BAD_INPUT ); + + q = 16 - 1 - (unsigned char) iv_len; + + /* + * First block B_0: + * 0 .. 0 flags + * 1 .. iv_len nonce (aka iv) + * iv_len+1 .. 15 length + * + * With flags as (bits): + * 7 0 + * 6 add present? + * 5 .. 3 (t - 2) / 2 + * 2 .. 0 q - 1 + */ + b[0] = 0; + b[0] |= ( add_len > 0 ) << 6; + b[0] |= ( ( tag_len - 2 ) / 2 ) << 3; + b[0] |= q - 1; + + memcpy( b + 1, iv, iv_len ); + + for( i = 0, len_left = length; i < q; i++, len_left >>= 8 ) + b[15-i] = (unsigned char)( len_left & 0xFF ); + + if( len_left > 0 ) + return( MBEDTLS_ERR_CCM_BAD_INPUT ); + + + /* Start CBC-MAC with first block */ + memset( y, 0, 16 ); + UPDATE_CBC_MAC; + + /* + * If there is additional data, update CBC-MAC with + * add_len, add, 0 (padding to a block boundary) + */ + if( add_len > 0 ) + { + size_t use_len; + len_left = add_len; + src = add; + + memset( b, 0, 16 ); + b[0] = (unsigned char)( ( add_len >> 8 ) & 0xFF ); + b[1] = (unsigned char)( ( add_len ) & 0xFF ); + + use_len = len_left < 16 - 2 ? len_left : 16 - 2; + memcpy( b + 2, src, use_len ); + len_left -= use_len; + src += use_len; + + UPDATE_CBC_MAC; + + while( len_left > 0 ) + { + use_len = len_left > 16 ? 16 : len_left; + + memset( b, 0, 16 ); + memcpy( b, src, use_len ); + UPDATE_CBC_MAC; + + len_left -= use_len; + src += use_len; + } + } + + /* + * Prepare counter block for encryption: + * 0 .. 0 flags + * 1 .. iv_len nonce (aka iv) + * iv_len+1 .. 15 counter (initially 1) + * + * With flags as (bits): + * 7 .. 3 0 + * 2 .. 0 q - 1 + */ + ctr[0] = q - 1; + memcpy( ctr + 1, iv, iv_len ); + memset( ctr + 1 + iv_len, 0, q ); + ctr[15] = 1; + + /* + * Authenticate and {en,de}crypt the message. + * + * The only difference between encryption and decryption is + * the respective order of authentication and {en,de}cryption. + */ + len_left = length; + src = input; + dst = output; + + while( len_left > 0 ) + { + size_t use_len = len_left > 16 ? 16 : len_left; + + if( mode == CCM_ENCRYPT ) + { + memset( b, 0, 16 ); + memcpy( b, src, use_len ); + UPDATE_CBC_MAC; + } + + CTR_CRYPT( dst, src, use_len ); + + if( mode == CCM_DECRYPT ) + { + memset( b, 0, 16 ); + memcpy( b, dst, use_len ); + UPDATE_CBC_MAC; + } + + dst += use_len; + src += use_len; + len_left -= use_len; + + /* + * Increment counter. + * No need to check for overflow thanks to the length check above. + */ + for( i = 0; i < q; i++ ) + if( ++ctr[15-i] != 0 ) + break; + } + + /* + * Authentication: reset counter and crypt/mask internal tag + */ + for( i = 0; i < q; i++ ) + ctr[15-i] = 0; + + CTR_CRYPT( y, y, 16 ); + memcpy( tag, y, tag_len ); + + return( 0 ); +} + +/* + * Authenticated encryption + */ +int mbedtls_ccm_encrypt_and_tag( mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + unsigned char *tag, size_t tag_len ) +{ + return( ccm_auth_crypt( ctx, CCM_ENCRYPT, length, iv, iv_len, + add, add_len, input, output, tag, tag_len ) ); +} + +/* + * Authenticated decryption + */ +int mbedtls_ccm_auth_decrypt( mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + const unsigned char *tag, size_t tag_len ) +{ + int ret; + unsigned char check_tag[16]; + unsigned char i; + int diff; + + if( ( ret = ccm_auth_crypt( ctx, CCM_DECRYPT, length, + iv, iv_len, add, add_len, + input, output, check_tag, tag_len ) ) != 0 ) + { + return( ret ); + } + + /* Check tag in "constant-time" */ + for( diff = 0, i = 0; i < tag_len; i++ ) + diff |= tag[i] ^ check_tag[i]; + + if( diff != 0 ) + { + mbedtls_zeroize( output, length ); + return( MBEDTLS_ERR_CCM_AUTH_FAILED ); + } + + return( 0 ); +} + + +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) +/* + * Examples 1 to 3 from SP800-38C Appendix C + */ + +#define NB_TESTS 3 + +/* + * The data is the same for all tests, only the used length changes + */ +static const unsigned char key[] = { + 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, + 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f +}; + +static const unsigned char iv[] = { + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b +}; + +static const unsigned char ad[] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13 +}; + +static const unsigned char msg[] = { + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, + 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, +}; + +static const size_t iv_len [NB_TESTS] = { 7, 8, 12 }; +static const size_t add_len[NB_TESTS] = { 8, 16, 20 }; +static const size_t msg_len[NB_TESTS] = { 4, 16, 24 }; +static const size_t tag_len[NB_TESTS] = { 4, 6, 8 }; + +static const unsigned char res[NB_TESTS][32] = { + { 0x71, 0x62, 0x01, 0x5b, 0x4d, 0xac, 0x25, 0x5d }, + { 0xd2, 0xa1, 0xf0, 0xe0, 0x51, 0xea, 0x5f, 0x62, + 0x08, 0x1a, 0x77, 0x92, 0x07, 0x3d, 0x59, 0x3d, + 0x1f, 0xc6, 0x4f, 0xbf, 0xac, 0xcd }, + { 0xe3, 0xb2, 0x01, 0xa9, 0xf5, 0xb7, 0x1a, 0x7a, + 0x9b, 0x1c, 0xea, 0xec, 0xcd, 0x97, 0xe7, 0x0b, + 0x61, 0x76, 0xaa, 0xd9, 0xa4, 0x42, 0x8a, 0xa5, + 0x48, 0x43, 0x92, 0xfb, 0xc1, 0xb0, 0x99, 0x51 } +}; + +int mbedtls_ccm_self_test( int verbose ) +{ + mbedtls_ccm_context ctx; + unsigned char out[32]; + size_t i; + int ret; + + mbedtls_ccm_init( &ctx ); + + if( mbedtls_ccm_setkey( &ctx, MBEDTLS_CIPHER_ID_AES, key, 8 * sizeof key ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( " CCM: setup failed" ); + + return( 1 ); + } + + for( i = 0; i < NB_TESTS; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " CCM-AES #%u: ", (unsigned int) i + 1 ); + + ret = mbedtls_ccm_encrypt_and_tag( &ctx, msg_len[i], + iv, iv_len[i], ad, add_len[i], + msg, out, + out + msg_len[i], tag_len[i] ); + + if( ret != 0 || + memcmp( out, res[i], msg_len[i] + tag_len[i] ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + ret = mbedtls_ccm_auth_decrypt( &ctx, msg_len[i], + iv, iv_len[i], ad, add_len[i], + res[i], out, + res[i] + msg_len[i], tag_len[i] ); + + if( ret != 0 || + memcmp( out, msg, msg_len[i] ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + mbedtls_ccm_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ + +#endif /* MBEDTLS_CCM_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/certs.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/certs.c new file mode 100644 index 0000000..ffa48ab --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/certs.c @@ -0,0 +1,357 @@ +/* + * X.509 test certificates + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include "mbedtls/certs.h" + +#if defined(MBEDTLS_SELF_TEST) + +#if defined(MBEDTLS_CERTS_C) + +#if defined(MBEDTLS_ECDSA_C) +#define TEST_CA_CRT_EC \ +"-----BEGIN CERTIFICATE-----\r\n" \ +"MIICUjCCAdegAwIBAgIJAMFD4n5iQ8zoMAoGCCqGSM49BAMCMD4xCzAJBgNVBAYT\r\n" \ +"Ak5MMREwDwYDVQQKEwhQb2xhclNTTDEcMBoGA1UEAxMTUG9sYXJzc2wgVGVzdCBF\r\n" \ +"QyBDQTAeFw0xMzA5MjQxNTQ5NDhaFw0yMzA5MjIxNTQ5NDhaMD4xCzAJBgNVBAYT\r\n" \ +"Ak5MMREwDwYDVQQKEwhQb2xhclNTTDEcMBoGA1UEAxMTUG9sYXJzc2wgVGVzdCBF\r\n" \ +"QyBDQTB2MBAGByqGSM49AgEGBSuBBAAiA2IABMPaKzRBN1gvh1b+/Im6KUNLTuBu\r\n" \ +"ww5XUzM5WNRStJGVOQsj318XJGJI/BqVKc4sLYfCiFKAr9ZqqyHduNMcbli4yuiy\r\n" \ +"aY7zQa0pw7RfdadHb9UZKVVpmlM7ILRmFmAzHqOBoDCBnTAdBgNVHQ4EFgQUnW0g\r\n" \ +"JEkBPyvLeLUZvH4kydv7NnwwbgYDVR0jBGcwZYAUnW0gJEkBPyvLeLUZvH4kydv7\r\n" \ +"NnyhQqRAMD4xCzAJBgNVBAYTAk5MMREwDwYDVQQKEwhQb2xhclNTTDEcMBoGA1UE\r\n" \ +"AxMTUG9sYXJzc2wgVGVzdCBFQyBDQYIJAMFD4n5iQ8zoMAwGA1UdEwQFMAMBAf8w\r\n" \ +"CgYIKoZIzj0EAwIDaQAwZgIxAMO0YnNWKJUAfXgSJtJxexn4ipg+kv4znuR50v56\r\n" \ +"t4d0PCu412mUC6Nnd7izvtE2MgIxAP1nnJQjZ8BWukszFQDG48wxCCyci9qpdSMv\r\n" \ +"uCjn8pwUOkABXK8Mss90fzCfCEOtIA==\r\n" \ +"-----END CERTIFICATE-----\r\n" +const char mbedtls_test_ca_crt_ec[] = TEST_CA_CRT_EC; + +const char mbedtls_test_ca_key_ec[] = +"-----BEGIN EC PRIVATE KEY-----\r\n" +"Proc-Type: 4,ENCRYPTED\r\n" +"DEK-Info: DES-EDE3-CBC,307EAB469933D64E\r\n" +"\r\n" +"IxbrRmKcAzctJqPdTQLA4SWyBYYGYJVkYEna+F7Pa5t5Yg/gKADrFKcm6B72e7DG\r\n" +"ihExtZI648s0zdYw6qSJ74vrPSuWDe5qm93BqsfVH9svtCzWHW0pm1p0KTBCFfUq\r\n" +"UsuWTITwJImcnlAs1gaRZ3sAWm7cOUidL0fo2G0fYUFNcYoCSLffCFTEHBuPnagb\r\n" +"a77x/sY1Bvii8S9/XhDTb6pTMx06wzrm\r\n" +"-----END EC PRIVATE KEY-----\r\n"; + +const char mbedtls_test_ca_pwd_ec[] = "PolarSSLTest"; + +const char mbedtls_test_srv_crt_ec[] = +"-----BEGIN CERTIFICATE-----\r\n" +"MIICHzCCAaWgAwIBAgIBCTAKBggqhkjOPQQDAjA+MQswCQYDVQQGEwJOTDERMA8G\r\n" +"A1UEChMIUG9sYXJTU0wxHDAaBgNVBAMTE1BvbGFyc3NsIFRlc3QgRUMgQ0EwHhcN\r\n" +"MTMwOTI0MTU1MjA0WhcNMjMwOTIyMTU1MjA0WjA0MQswCQYDVQQGEwJOTDERMA8G\r\n" +"A1UEChMIUG9sYXJTU0wxEjAQBgNVBAMTCWxvY2FsaG9zdDBZMBMGByqGSM49AgEG\r\n" +"CCqGSM49AwEHA0IABDfMVtl2CR5acj7HWS3/IG7ufPkGkXTQrRS192giWWKSTuUA\r\n" +"2CMR/+ov0jRdXRa9iojCa3cNVc2KKg76Aci07f+jgZ0wgZowCQYDVR0TBAIwADAd\r\n" +"BgNVHQ4EFgQUUGGlj9QH2deCAQzlZX+MY0anE74wbgYDVR0jBGcwZYAUnW0gJEkB\r\n" +"PyvLeLUZvH4kydv7NnyhQqRAMD4xCzAJBgNVBAYTAk5MMREwDwYDVQQKEwhQb2xh\r\n" +"clNTTDEcMBoGA1UEAxMTUG9sYXJzc2wgVGVzdCBFQyBDQYIJAMFD4n5iQ8zoMAoG\r\n" +"CCqGSM49BAMCA2gAMGUCMQCaLFzXptui5WQN8LlO3ddh1hMxx6tzgLvT03MTVK2S\r\n" +"C12r0Lz3ri/moSEpNZWqPjkCMCE2f53GXcYLqyfyJR078c/xNSUU5+Xxl7VZ414V\r\n" +"fGa5kHvHARBPc8YAIVIqDvHH1Q==\r\n" +"-----END CERTIFICATE-----\r\n"; + +const char mbedtls_test_srv_key_ec[] = +"-----BEGIN EC PRIVATE KEY-----\r\n" +"MHcCAQEEIPEqEyB2AnCoPL/9U/YDHvdqXYbIogTywwyp6/UfDw6noAoGCCqGSM49\r\n" +"AwEHoUQDQgAEN8xW2XYJHlpyPsdZLf8gbu58+QaRdNCtFLX3aCJZYpJO5QDYIxH/\r\n" +"6i/SNF1dFr2KiMJrdw1VzYoqDvoByLTt/w==\r\n" +"-----END EC PRIVATE KEY-----\r\n"; + +const char mbedtls_test_cli_crt_ec[] = +"-----BEGIN CERTIFICATE-----\r\n" +"MIICLDCCAbKgAwIBAgIBDTAKBggqhkjOPQQDAjA+MQswCQYDVQQGEwJOTDERMA8G\r\n" +"A1UEChMIUG9sYXJTU0wxHDAaBgNVBAMTE1BvbGFyc3NsIFRlc3QgRUMgQ0EwHhcN\r\n" +"MTMwOTI0MTU1MjA0WhcNMjMwOTIyMTU1MjA0WjBBMQswCQYDVQQGEwJOTDERMA8G\r\n" +"A1UEChMIUG9sYXJTU0wxHzAdBgNVBAMTFlBvbGFyU1NMIFRlc3QgQ2xpZW50IDIw\r\n" +"WTATBgcqhkjOPQIBBggqhkjOPQMBBwNCAARX5a6xc9/TrLuTuIH/Eq7u5lOszlVT\r\n" +"9jQOzC7jYyUL35ji81xgNpbA1RgUcOV/n9VLRRjlsGzVXPiWj4dwo+THo4GdMIGa\r\n" +"MAkGA1UdEwQCMAAwHQYDVR0OBBYEFHoAX4Zk/OBd5REQO7LmO8QmP8/iMG4GA1Ud\r\n" +"IwRnMGWAFJ1tICRJAT8ry3i1Gbx+JMnb+zZ8oUKkQDA+MQswCQYDVQQGEwJOTDER\r\n" +"MA8GA1UEChMIUG9sYXJTU0wxHDAaBgNVBAMTE1BvbGFyc3NsIFRlc3QgRUMgQ0GC\r\n" +"CQDBQ+J+YkPM6DAKBggqhkjOPQQDAgNoADBlAjBKZQ17IIOimbmoD/yN7o89u3BM\r\n" +"lgOsjnhw3fIOoLIWy2WOGsk/LGF++DzvrRzuNiACMQCd8iem1XS4JK7haj8xocpU\r\n" +"LwjQje5PDGHfd3h9tP38Qknu5bJqws0md2KOKHyeV0U=\r\n" +"-----END CERTIFICATE-----\r\n"; + +const char mbedtls_test_cli_key_ec[] = +"-----BEGIN EC PRIVATE KEY-----\r\n" +"MHcCAQEEIPb3hmTxZ3/mZI3vyk7p3U3wBf+WIop6hDhkFzJhmLcqoAoGCCqGSM49\r\n" +"AwEHoUQDQgAEV+WusXPf06y7k7iB/xKu7uZTrM5VU/Y0Dswu42MlC9+Y4vNcYDaW\r\n" +"wNUYFHDlf5/VS0UY5bBs1Vz4lo+HcKPkxw==\r\n" +"-----END EC PRIVATE KEY-----\r\n"; + +const size_t mbedtls_test_ca_crt_ec_len = sizeof( mbedtls_test_ca_crt_ec ); +const size_t mbedtls_test_ca_key_ec_len = sizeof( mbedtls_test_ca_key_ec ); +const size_t mbedtls_test_ca_pwd_ec_len = sizeof( mbedtls_test_ca_pwd_ec ) - 1; +const size_t mbedtls_test_srv_crt_ec_len = sizeof( mbedtls_test_srv_crt_ec ); +const size_t mbedtls_test_srv_key_ec_len = sizeof( mbedtls_test_srv_key_ec ); +const size_t mbedtls_test_cli_crt_ec_len = sizeof( mbedtls_test_cli_crt_ec ); +const size_t mbedtls_test_cli_key_ec_len = sizeof( mbedtls_test_cli_key_ec ); +#else +#define TEST_CA_CRT_EC +#endif /* MBEDTLS_ECDSA_C */ + +#if defined(MBEDTLS_RSA_C) +#define TEST_CA_CRT_RSA \ +"-----BEGIN CERTIFICATE-----\r\n" \ +"MIIDhzCCAm+gAwIBAgIBADANBgkqhkiG9w0BAQUFADA7MQswCQYDVQQGEwJOTDER\r\n" \ +"MA8GA1UEChMIUG9sYXJTU0wxGTAXBgNVBAMTEFBvbGFyU1NMIFRlc3QgQ0EwHhcN\r\n" \ +"MTEwMjEyMTQ0NDAwWhcNMjEwMjEyMTQ0NDAwWjA7MQswCQYDVQQGEwJOTDERMA8G\r\n" \ +"A1UEChMIUG9sYXJTU0wxGTAXBgNVBAMTEFBvbGFyU1NMIFRlc3QgQ0EwggEiMA0G\r\n" \ +"CSqGSIb3DQEBAQUAA4IBDwAwggEKAoIBAQDA3zf8F7vglp0/ht6WMn1EpRagzSHx\r\n" \ +"mdTs6st8GFgIlKXsm8WL3xoemTiZhx57wI053zhdcHgH057Zk+i5clHFzqMwUqny\r\n" \ +"50BwFMtEonILwuVA+T7lpg6z+exKY8C4KQB0nFc7qKUEkHHxvYPZP9al4jwqj+8n\r\n" \ +"YMPGn8u67GB9t+aEMr5P+1gmIgNb1LTV+/Xjli5wwOQuvfwu7uJBVcA0Ln0kcmnL\r\n" \ +"R7EUQIN9Z/SG9jGr8XmksrUuEvmEF/Bibyc+E1ixVA0hmnM3oTDPb5Lc9un8rNsu\r\n" \ +"KNF+AksjoBXyOGVkCeoMbo4bF6BxyLObyavpw/LPh5aPgAIynplYb6LVAgMBAAGj\r\n" \ +"gZUwgZIwDAYDVR0TBAUwAwEB/zAdBgNVHQ4EFgQUtFrkpbPe0lL2udWmlQ/rPrzH\r\n" \ +"/f8wYwYDVR0jBFwwWoAUtFrkpbPe0lL2udWmlQ/rPrzH/f+hP6Q9MDsxCzAJBgNV\r\n" \ +"BAYTAk5MMREwDwYDVQQKEwhQb2xhclNTTDEZMBcGA1UEAxMQUG9sYXJTU0wgVGVz\r\n" \ +"dCBDQYIBADANBgkqhkiG9w0BAQUFAAOCAQEAuP1U2ABUkIslsCfdlc2i94QHHYeJ\r\n" \ +"SsR4EdgHtdciUI5I62J6Mom+Y0dT/7a+8S6MVMCZP6C5NyNyXw1GWY/YR82XTJ8H\r\n" \ +"DBJiCTok5DbZ6SzaONBzdWHXwWwmi5vg1dxn7YxrM9d0IjxM27WNKs4sDQhZBQkF\r\n" \ +"pjmfs2cb4oPl4Y9T9meTx/lvdkRYEug61Jfn6cA+qHpyPYdTH+UshITnmp5/Ztkf\r\n" \ +"m/UTSLBNFNHesiTZeH31NcxYGdHSme9Nc/gfidRa0FLOCfWxRlFqAI47zG9jAQCZ\r\n" \ +"7Z2mCGDNMhjQc+BYcdnl0lPXjdDK6V0qCg1dVewhUBcW5gZKzV7e9+DpVA==\r\n" \ +"-----END CERTIFICATE-----\r\n" +const char mbedtls_test_ca_crt_rsa[] = TEST_CA_CRT_RSA; + +const char mbedtls_test_ca_key_rsa[] = +"-----BEGIN RSA PRIVATE KEY-----\r\n" +"Proc-Type: 4,ENCRYPTED\r\n" +"DEK-Info: DES-EDE3-CBC,A8A95B05D5B7206B\r\n" +"\r\n" +"9Qd9GeArejl1GDVh2lLV1bHt0cPtfbh5h/5zVpAVaFpqtSPMrElp50Rntn9et+JA\r\n" +"7VOyboR+Iy2t/HU4WvA687k3Bppe9GwKHjHhtl//8xFKwZr3Xb5yO5JUP8AUctQq\r\n" +"Nb8CLlZyuUC+52REAAthdWgsX+7dJO4yabzUcQ22Tp9JSD0hiL43BlkWYUNK3dAo\r\n" +"PZlmiptjnzVTjg1MxsBSydZinWOLBV8/JQgxSPo2yD4uEfig28qbvQ2wNIn0pnAb\r\n" +"GxnSAOazkongEGfvcjIIs+LZN9gXFhxcOh6kc4Q/c99B7QWETwLLkYgZ+z1a9VY9\r\n" +"gEU7CwCxYCD+h9hY6FPmsK0/lC4O7aeRKpYq00rPPxs6i7phiexg6ax6yTMmArQq\r\n" +"QmK3TAsJm8V/J5AWpLEV6jAFgRGymGGHnof0DXzVWZidrcZJWTNuGEX90nB3ee2w\r\n" +"PXJEFWKoD3K3aFcSLdHYr3mLGxP7H9ThQai9VsycxZKS5kwvBKQ//YMrmFfwPk8x\r\n" +"vTeY4KZMaUrveEel5tWZC94RSMKgxR6cyE1nBXyTQnDOGbfpNNgBKxyKbINWoOJU\r\n" +"WJZAwlsQn+QzCDwpri7+sV1mS3gBE6UY7aQmnmiiaC2V3Hbphxct/en5QsfDOt1X\r\n" +"JczSfpRWLlbPznZg8OQh/VgCMA58N5DjOzTIK7sJJ5r+94ZBTCpgAMbF588f0NTR\r\n" +"KCe4yrxGJR7X02M4nvD4IwOlpsQ8xQxZtOSgXv4LkxvdU9XJJKWZ/XNKJeWztxSe\r\n" +"Z1vdTc2YfsDBA2SEv33vxHx2g1vqtw8SjDRT2RaQSS0QuSaMJimdOX6mTOCBKk1J\r\n" +"9Q5mXTrER+/LnK0jEmXsBXWA5bqqVZIyahXSx4VYZ7l7w/PHiUDtDgyRhMMKi4n2\r\n" +"iQvQcWSQTjrpnlJbca1/DkpRt3YwrvJwdqb8asZU2VrNETh5x0QVefDRLFiVpif/\r\n" +"tUaeAe/P1F8OkS7OIZDs1SUbv/sD2vMbhNkUoCms3/PvNtdnvgL4F0zhaDpKCmlT\r\n" +"P8vx49E7v5CyRNmED9zZg4o3wmMqrQO93PtTug3Eu9oVx1zPQM1NVMyBa2+f29DL\r\n" +"1nuTCeXdo9+ni45xx+jAI4DCwrRdhJ9uzZyC6962H37H6D+5naNvClFR1s6li1Gb\r\n" +"nqPoiy/OBsEx9CaDGcqQBp5Wme/3XW+6z1ISOx+igwNTVCT14mHdBMbya0eIKft5\r\n" +"X+GnwtgEMyCYyyWuUct8g4RzErcY9+yW9Om5Hzpx4zOuW4NPZgPDTgK+t2RSL/Yq\r\n" +"rE1njrgeGYcVeG3f+OftH4s6fPbq7t1A5ZgUscbLMBqr9tK+OqygR4EgKBPsH6Cz\r\n" +"L6zlv/2RV0qAHvVuDJcIDIgwY5rJtINEm32rhOeFNJwZS5MNIC1czXZx5//ugX7l\r\n" +"I4sy5nbVhwSjtAk8Xg5dZbdTZ6mIrb7xqH+fdakZor1khG7bC2uIwibD3cSl2XkR\r\n" +"wN48lslbHnqqagr6Xm1nNOSVl8C/6kbJEsMpLhAezfRtGwvOucoaE+WbeUNolGde\r\n" +"P/eQiddSf0brnpiLJRh7qZrl9XuqYdpUqnoEdMAfotDOID8OtV7gt8a48ad8VPW2\r\n" +"-----END RSA PRIVATE KEY-----\r\n"; + +const char mbedtls_test_ca_pwd_rsa[] = "PolarSSLTest"; + +const char mbedtls_test_srv_crt_rsa[] = +"-----BEGIN CERTIFICATE-----\r\n" +"MIIDNzCCAh+gAwIBAgIBAjANBgkqhkiG9w0BAQUFADA7MQswCQYDVQQGEwJOTDER\r\n" +"MA8GA1UEChMIUG9sYXJTU0wxGTAXBgNVBAMTEFBvbGFyU1NMIFRlc3QgQ0EwHhcN\r\n" +"MTEwMjEyMTQ0NDA2WhcNMjEwMjEyMTQ0NDA2WjA0MQswCQYDVQQGEwJOTDERMA8G\r\n" +"A1UEChMIUG9sYXJTU0wxEjAQBgNVBAMTCWxvY2FsaG9zdDCCASIwDQYJKoZIhvcN\r\n" +"AQEBBQADggEPADCCAQoCggEBAMFNo93nzR3RBNdJcriZrA545Do8Ss86ExbQWuTN\r\n" +"owCIp+4ea5anUrSQ7y1yej4kmvy2NKwk9XfgJmSMnLAofaHa6ozmyRyWvP7BBFKz\r\n" +"NtSj+uGxdtiQwWG0ZlI2oiZTqqt0Xgd9GYLbKtgfoNkNHC1JZvdbJXNG6AuKT2kM\r\n" +"tQCQ4dqCEGZ9rlQri2V5kaHiYcPNQEkI7mgM8YuG0ka/0LiqEQMef1aoGh5EGA8P\r\n" +"hYvai0Re4hjGYi/HZo36Xdh98yeJKQHFkA4/J/EwyEoO79bex8cna8cFPXrEAjya\r\n" +"HT4P6DSYW8tzS1KW2BGiLICIaTla0w+w3lkvEcf36hIBMJcCAwEAAaNNMEswCQYD\r\n" +"VR0TBAIwADAdBgNVHQ4EFgQUpQXoZLjc32APUBJNYKhkr02LQ5MwHwYDVR0jBBgw\r\n" +"FoAUtFrkpbPe0lL2udWmlQ/rPrzH/f8wDQYJKoZIhvcNAQEFBQADggEBAJxnXClY\r\n" +"oHkbp70cqBrsGXLybA74czbO5RdLEgFs7rHVS9r+c293luS/KdliLScZqAzYVylw\r\n" +"UfRWvKMoWhHYKp3dEIS4xTXk6/5zXxhv9Rw8SGc8qn6vITHk1S1mPevtekgasY5Y\r\n" +"iWQuM3h4YVlRH3HHEMAD1TnAexfXHHDFQGe+Bd1iAbz1/sH9H8l4StwX6egvTK3M\r\n" +"wXRwkKkvjKaEDA9ATbZx0mI8LGsxSuCqe9r9dyjmttd47J1p1Rulz3CLzaRcVIuS\r\n" +"RRQfaD8neM9c1S/iJ/amTVqJxA1KOdOS5780WhPfSArA+g4qAmSjelc3p4wWpha8\r\n" +"zhuYwjVuX6JHG0c=\r\n" +"-----END CERTIFICATE-----\r\n"; + +const char mbedtls_test_srv_key_rsa[] = +"-----BEGIN RSA PRIVATE KEY-----\r\n" +"MIIEpAIBAAKCAQEAwU2j3efNHdEE10lyuJmsDnjkOjxKzzoTFtBa5M2jAIin7h5r\r\n" +"lqdStJDvLXJ6PiSa/LY0rCT1d+AmZIycsCh9odrqjObJHJa8/sEEUrM21KP64bF2\r\n" +"2JDBYbRmUjaiJlOqq3ReB30Zgtsq2B+g2Q0cLUlm91slc0boC4pPaQy1AJDh2oIQ\r\n" +"Zn2uVCuLZXmRoeJhw81ASQjuaAzxi4bSRr/QuKoRAx5/VqgaHkQYDw+Fi9qLRF7i\r\n" +"GMZiL8dmjfpd2H3zJ4kpAcWQDj8n8TDISg7v1t7HxydrxwU9esQCPJodPg/oNJhb\r\n" +"y3NLUpbYEaIsgIhpOVrTD7DeWS8Rx/fqEgEwlwIDAQABAoIBAQCXR0S8EIHFGORZ\r\n" +"++AtOg6eENxD+xVs0f1IeGz57Tjo3QnXX7VBZNdj+p1ECvhCE/G7XnkgU5hLZX+G\r\n" +"Z0jkz/tqJOI0vRSdLBbipHnWouyBQ4e/A1yIJdlBtqXxJ1KE/ituHRbNc4j4kL8Z\r\n" +"/r6pvwnTI0PSx2Eqs048YdS92LT6qAv4flbNDxMn2uY7s4ycS4Q8w1JXnCeaAnYm\r\n" +"WYI5wxO+bvRELR2Mcz5DmVnL8jRyml6l6582bSv5oufReFIbyPZbQWlXgYnpu6He\r\n" +"GTc7E1zKYQGG/9+DQUl/1vQuCPqQwny0tQoX2w5tdYpdMdVm+zkLtbajzdTviJJa\r\n" +"TWzL6lt5AoGBAN86+SVeJDcmQJcv4Eq6UhtRr4QGMiQMz0Sod6ettYxYzMgxtw28\r\n" +"CIrgpozCc+UaZJLo7UxvC6an85r1b2nKPCLQFaggJ0H4Q0J/sZOhBIXaoBzWxveK\r\n" +"nupceKdVxGsFi8CDy86DBfiyFivfBj+47BbaQzPBj7C4rK7UlLjab2rDAoGBAN2u\r\n" +"AM2gchoFiu4v1HFL8D7lweEpi6ZnMJjnEu/dEgGQJFjwdpLnPbsj4c75odQ4Gz8g\r\n" +"sw9lao9VVzbusoRE/JGI4aTdO0pATXyG7eG1Qu+5Yc1YGXcCrliA2xM9xx+d7f+s\r\n" +"mPzN+WIEg5GJDYZDjAzHG5BNvi/FfM1C9dOtjv2dAoGAF0t5KmwbjWHBhcVqO4Ic\r\n" +"BVvN3BIlc1ue2YRXEDlxY5b0r8N4XceMgKmW18OHApZxfl8uPDauWZLXOgl4uepv\r\n" +"whZC3EuWrSyyICNhLY21Ah7hbIEBPF3L3ZsOwC+UErL+dXWLdB56Jgy3gZaBeW7b\r\n" +"vDrEnocJbqCm7IukhXHOBK8CgYEAwqdHB0hqyNSzIOGY7v9abzB6pUdA3BZiQvEs\r\n" +"3LjHVd4HPJ2x0N8CgrBIWOE0q8+0hSMmeE96WW/7jD3fPWwCR5zlXknxBQsfv0gP\r\n" +"3BC5PR0Qdypz+d+9zfMf625kyit4T/hzwhDveZUzHnk1Cf+IG7Q+TOEnLnWAWBED\r\n" +"ISOWmrUCgYAFEmRxgwAc/u+D6t0syCwAYh6POtscq9Y0i9GyWk89NzgC4NdwwbBH\r\n" +"4AgahOxIxXx2gxJnq3yfkJfIjwf0s2DyP0kY2y6Ua1OeomPeY9mrIS4tCuDQ6LrE\r\n" +"TB6l9VGoxJL4fyHnZb8L5gGvnB1bbD8cL6YPaDiOhcRseC9vBiEuVg==\r\n" +"-----END RSA PRIVATE KEY-----\r\n"; + +const char mbedtls_test_cli_crt_rsa[] = +"-----BEGIN CERTIFICATE-----\r\n" +"MIIDPzCCAiegAwIBAgIBBDANBgkqhkiG9w0BAQUFADA7MQswCQYDVQQGEwJOTDER\r\n" +"MA8GA1UEChMIUG9sYXJTU0wxGTAXBgNVBAMTEFBvbGFyU1NMIFRlc3QgQ0EwHhcN\r\n" +"MTEwMjEyMTQ0NDA3WhcNMjEwMjEyMTQ0NDA3WjA8MQswCQYDVQQGEwJOTDERMA8G\r\n" +"A1UEChMIUG9sYXJTU0wxGjAYBgNVBAMTEVBvbGFyU1NMIENsaWVudCAyMIIBIjAN\r\n" +"BgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAyHTEzLn5tXnpRdkUYLB9u5Pyax6f\r\n" +"M60Nj4o8VmXl3ETZzGaFB9X4J7BKNdBjngpuG7fa8H6r7gwQk4ZJGDTzqCrSV/Uu\r\n" +"1C93KYRhTYJQj6eVSHD1bk2y1RPD0hrt5kPqQhTrdOrA7R/UV06p86jt0uDBMHEw\r\n" +"MjDV0/YI0FZPRo7yX/k9Z5GIMC5Cst99++UMd//sMcB4j7/Cf8qtbCHWjdmLao5v\r\n" +"4Jv4EFbMs44TFeY0BGbH7vk2DmqV9gmaBmf0ZXH4yqSxJeD+PIs1BGe64E92hfx/\r\n" +"/DZrtenNLQNiTrM9AM+vdqBpVoNq0qjU51Bx5rU2BXcFbXvI5MT9TNUhXwIDAQAB\r\n" +"o00wSzAJBgNVHRMEAjAAMB0GA1UdDgQWBBRxoQBzckAvVHZeM/xSj7zx3WtGITAf\r\n" +"BgNVHSMEGDAWgBS0WuSls97SUva51aaVD+s+vMf9/zANBgkqhkiG9w0BAQUFAAOC\r\n" +"AQEAAn86isAM8X+mVwJqeItt6E9slhEQbAofyk+diH1Lh8Y9iLlWQSKbw/UXYjx5\r\n" +"LLPZcniovxIcARC/BjyZR9g3UwTHNGNm+rwrqa15viuNOFBchykX/Orsk02EH7NR\r\n" +"Alw5WLPorYjED6cdVQgBl9ot93HdJogRiXCxErM7NC8/eP511mjq+uLDjLKH8ZPQ\r\n" +"8I4ekHJnroLsDkIwXKGIsvIBHQy2ac/NwHLCQOK6mfum1pRx52V4Utu5dLLjD5bM\r\n" +"xOBC7KU4xZKuMXXZM6/93Yb51K/J4ahf1TxJlTWXtnzDr9saEYdNy2SKY/6ZiDNH\r\n" +"D+stpAKiQLAWaAusIWKYEyw9MQ==\r\n" +"-----END CERTIFICATE-----\r\n"; + +const char mbedtls_test_cli_key_rsa[] = +"-----BEGIN RSA PRIVATE KEY-----\r\n" +"MIIEpAIBAAKCAQEAyHTEzLn5tXnpRdkUYLB9u5Pyax6fM60Nj4o8VmXl3ETZzGaF\r\n" +"B9X4J7BKNdBjngpuG7fa8H6r7gwQk4ZJGDTzqCrSV/Uu1C93KYRhTYJQj6eVSHD1\r\n" +"bk2y1RPD0hrt5kPqQhTrdOrA7R/UV06p86jt0uDBMHEwMjDV0/YI0FZPRo7yX/k9\r\n" +"Z5GIMC5Cst99++UMd//sMcB4j7/Cf8qtbCHWjdmLao5v4Jv4EFbMs44TFeY0BGbH\r\n" +"7vk2DmqV9gmaBmf0ZXH4yqSxJeD+PIs1BGe64E92hfx//DZrtenNLQNiTrM9AM+v\r\n" +"dqBpVoNq0qjU51Bx5rU2BXcFbXvI5MT9TNUhXwIDAQABAoIBAGdNtfYDiap6bzst\r\n" +"yhCiI8m9TtrhZw4MisaEaN/ll3XSjaOG2dvV6xMZCMV+5TeXDHOAZnY18Yi18vzz\r\n" +"4Ut2TnNFzizCECYNaA2fST3WgInnxUkV3YXAyP6CNxJaCmv2aA0yFr2kFVSeaKGt\r\n" +"ymvljNp2NVkvm7Th8fBQBO7I7AXhz43k0mR7XmPgewe8ApZOG3hstkOaMvbWAvWA\r\n" +"zCZupdDjZYjOJqlA4eEA4H8/w7F83r5CugeBE8LgEREjLPiyejrU5H1fubEY+h0d\r\n" +"l5HZBJ68ybTXfQ5U9o/QKA3dd0toBEhhdRUDGzWtjvwkEQfqF1reGWj/tod/gCpf\r\n" +"DFi6X0ECgYEA4wOv/pjSC3ty6TuOvKX2rOUiBrLXXv2JSxZnMoMiWI5ipLQt+RYT\r\n" +"VPafL/m7Dn6MbwjayOkcZhBwk5CNz5A6Q4lJ64Mq/lqHznRCQQ2Mc1G8eyDF/fYL\r\n" +"Ze2pLvwP9VD5jTc2miDfw+MnvJhywRRLcemDFP8k4hQVtm8PMp3ZmNECgYEA4gz7\r\n" +"wzObR4gn8ibe617uQPZjWzUj9dUHYd+in1gwBCIrtNnaRn9I9U/Q6tegRYpii4ys\r\n" +"c176NmU+umy6XmuSKV5qD9bSpZWG2nLFnslrN15Lm3fhZxoeMNhBaEDTnLT26yoi\r\n" +"33gp0mSSWy94ZEqipms+ULF6sY1ZtFW6tpGFoy8CgYAQHhnnvJflIs2ky4q10B60\r\n" +"ZcxFp3rtDpkp0JxhFLhiizFrujMtZSjYNm5U7KkgPVHhLELEUvCmOnKTt4ap/vZ0\r\n" +"BxJNe1GZH3pW6SAvGDQpl9sG7uu/vTFP+lCxukmzxB0DrrDcvorEkKMom7ZCCRvW\r\n" +"KZsZ6YeH2Z81BauRj218kQKBgQCUV/DgKP2985xDTT79N08jUo3hTP5MVYCCuj/+\r\n" +"UeEw1TvZcx3LJby7P6Xad6a1/BqveaGyFKIfEFIaBUBItk801sDDpDaYc4gL00Xc\r\n" +"7lFuBHOZkxJYlss5QrGpuOEl9ZwUt5IrFLBdYaKqNHzNVC1pCPfb/JyH6Dr2HUxq\r\n" +"gxUwAQKBgQCcU6G2L8AG9d9c0UpOyL1tMvFe5Ttw0KjlQVdsh1MP6yigYo9DYuwu\r\n" +"bHFVW2r0dBTqegP2/KTOxKzaHfC1qf0RGDsUoJCNJrd1cwoCLG8P2EF4w3OBrKqv\r\n" +"8u4ytY0F+Vlanj5lm3TaoHSVF1+NWPyOTiwevIECGKwSxvlki4fDAA==\r\n" +"-----END RSA PRIVATE KEY-----\r\n"; + +const size_t mbedtls_test_ca_crt_rsa_len = sizeof( mbedtls_test_ca_crt_rsa ); +const size_t mbedtls_test_ca_key_rsa_len = sizeof( mbedtls_test_ca_key_rsa ); +const size_t mbedtls_test_ca_pwd_rsa_len = sizeof( mbedtls_test_ca_pwd_rsa ) - 1; +const size_t mbedtls_test_srv_crt_rsa_len = sizeof( mbedtls_test_srv_crt_rsa ); +const size_t mbedtls_test_srv_key_rsa_len = sizeof( mbedtls_test_srv_key_rsa ); +const size_t mbedtls_test_cli_crt_rsa_len = sizeof( mbedtls_test_cli_crt_rsa ); +const size_t mbedtls_test_cli_key_rsa_len = sizeof( mbedtls_test_cli_key_rsa ); +#else +#define TEST_CA_CRT_RSA +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_PEM_PARSE_C) +/* Concatenation of all available CA certificates */ +const char mbedtls_test_cas_pem[] = TEST_CA_CRT_RSA TEST_CA_CRT_EC; +const size_t mbedtls_test_cas_pem_len = sizeof( mbedtls_test_cas_pem ); +#endif + +/* List of all available CA certificates */ +const char * mbedtls_test_cas[] = { +#if defined(MBEDTLS_RSA_C) + mbedtls_test_ca_crt_rsa, +#endif +#if defined(MBEDTLS_ECDSA_C) + mbedtls_test_ca_crt_ec, +#endif + NULL +}; +const size_t mbedtls_test_cas_len[] = { +#if defined(MBEDTLS_RSA_C) + sizeof( mbedtls_test_ca_crt_rsa ), +#endif +#if defined(MBEDTLS_ECDSA_C) + sizeof( mbedtls_test_ca_crt_ec ), +#endif + 0 +}; + +#if defined(MBEDTLS_RSA_C) +const char *mbedtls_test_ca_crt = mbedtls_test_ca_crt_rsa; +const char *mbedtls_test_ca_key = mbedtls_test_ca_key_rsa; +const char *mbedtls_test_ca_pwd = mbedtls_test_ca_pwd_rsa; +const char *mbedtls_test_srv_crt = mbedtls_test_srv_crt_rsa; +const char *mbedtls_test_srv_key = mbedtls_test_srv_key_rsa; +const char *mbedtls_test_cli_crt = mbedtls_test_cli_crt_rsa; +const char *mbedtls_test_cli_key = mbedtls_test_cli_key_rsa; +const size_t mbedtls_test_ca_crt_len = sizeof( mbedtls_test_ca_crt_rsa ); +const size_t mbedtls_test_ca_key_len = sizeof( mbedtls_test_ca_key_rsa ); +const size_t mbedtls_test_ca_pwd_len = sizeof( mbedtls_test_ca_pwd_rsa ) - 1; +const size_t mbedtls_test_srv_crt_len = sizeof( mbedtls_test_srv_crt_rsa ); +const size_t mbedtls_test_srv_key_len = sizeof( mbedtls_test_srv_key_rsa ); +const size_t mbedtls_test_cli_crt_len = sizeof( mbedtls_test_cli_crt_rsa ); +const size_t mbedtls_test_cli_key_len = sizeof( mbedtls_test_cli_key_rsa ); +#else /* ! MBEDTLS_RSA_C, so MBEDTLS_ECDSA_C */ +const char *mbedtls_test_ca_crt = mbedtls_test_ca_crt_ec; +const char *mbedtls_test_ca_key = mbedtls_test_ca_key_ec; +const char *mbedtls_test_ca_pwd = mbedtls_test_ca_pwd_ec; +const char *mbedtls_test_srv_crt = mbedtls_test_srv_crt_ec; +const char *mbedtls_test_srv_key = mbedtls_test_srv_key_ec; +const char *mbedtls_test_cli_crt = mbedtls_test_cli_crt_ec; +const char *mbedtls_test_cli_key = mbedtls_test_cli_key_ec; +const size_t mbedtls_test_ca_crt_len = sizeof( mbedtls_test_ca_crt_ec ); +const size_t mbedtls_test_ca_key_len = sizeof( mbedtls_test_ca_key_ec ); +const size_t mbedtls_test_ca_pwd_len = sizeof( mbedtls_test_ca_pwd_ec ) - 1; +const size_t mbedtls_test_srv_crt_len = sizeof( mbedtls_test_srv_crt_ec ); +const size_t mbedtls_test_srv_key_len = sizeof( mbedtls_test_srv_key_ec ); +const size_t mbedtls_test_cli_crt_len = sizeof( mbedtls_test_cli_crt_ec ); +const size_t mbedtls_test_cli_key_len = sizeof( mbedtls_test_cli_key_ec ); +#endif /* MBEDTLS_RSA_C */ + +#endif /* MBEDTLS_CERTS_C */ + +#else + +#endif diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/cipher.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/cipher.c new file mode 100644 index 0000000..ccc0685 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/cipher.c @@ -0,0 +1,886 @@ +/** + * \file cipher.c + * + * \brief Generic cipher wrapper for mbed TLS + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_CIPHER_C) + +#include "mbedtls/cipher.h" +#include "mbedtls/cipher_internal.h" + +#include +#include + +#if defined(MBEDTLS_GCM_C) +#include "mbedtls/gcm.h" +#endif + +#if defined(MBEDTLS_CCM_C) +#include "mbedtls/ccm.h" +#endif + +#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) +#define MBEDTLS_CIPHER_MODE_STREAM +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +static int supported_init = 0; + +const int *mbedtls_cipher_list( void ) +{ + const mbedtls_cipher_definition_t *def; + int *type; + + if( ! supported_init ) + { + def = mbedtls_cipher_definitions; + type = mbedtls_cipher_supported; + + while( def->type != 0 ) + *type++ = (*def++).type; + + *type = 0; + + supported_init = 1; + } + + return( mbedtls_cipher_supported ); +} + +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_type( const mbedtls_cipher_type_t cipher_type ) +{ + const mbedtls_cipher_definition_t *def; + + for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) + if( def->type == cipher_type ) + return( def->info ); + + return( NULL ); +} + +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_string( const char *cipher_name ) +{ + const mbedtls_cipher_definition_t *def; + + if( NULL == cipher_name ) + return( NULL ); + + for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) + if( ! strcmp( def->info->name, cipher_name ) ) + return( def->info ); + + return( NULL ); +} + +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_values( const mbedtls_cipher_id_t cipher_id, + int key_bitlen, + const mbedtls_cipher_mode_t mode ) +{ + const mbedtls_cipher_definition_t *def; + + for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) + if( def->info->base->cipher == cipher_id && + def->info->key_bitlen == (unsigned) key_bitlen && + def->info->mode == mode ) + return( def->info ); + + return( NULL ); +} + +void mbedtls_cipher_init( mbedtls_cipher_context_t *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_cipher_context_t ) ); +} + +void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx ) +{ + if( ctx == NULL ) + return; + + if( ctx->cipher_ctx ) + ctx->cipher_info->base->ctx_free_func( ctx->cipher_ctx ); + + mbedtls_zeroize( ctx, sizeof(mbedtls_cipher_context_t) ); +} + +int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx, const mbedtls_cipher_info_t *cipher_info ) +{ + if( NULL == cipher_info || NULL == ctx ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + memset( ctx, 0, sizeof( mbedtls_cipher_context_t ) ); + + if( NULL == ( ctx->cipher_ctx = cipher_info->base->ctx_alloc_func() ) ) + return( MBEDTLS_ERR_CIPHER_ALLOC_FAILED ); + + ctx->cipher_info = cipher_info; + +#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING) + /* + * Ignore possible errors caused by a cipher mode that doesn't use padding + */ +#if defined(MBEDTLS_CIPHER_PADDING_PKCS7) + (void) mbedtls_cipher_set_padding_mode( ctx, MBEDTLS_PADDING_PKCS7 ); +#else + (void) mbedtls_cipher_set_padding_mode( ctx, MBEDTLS_PADDING_NONE ); +#endif +#endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */ + + return( 0 ); +} + +int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx, const unsigned char *key, + int key_bitlen, const mbedtls_operation_t operation ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( ( ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_KEY_LEN ) == 0 && + (int) ctx->cipher_info->key_bitlen != key_bitlen ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + ctx->key_bitlen = key_bitlen; + ctx->operation = operation; + + /* + * For CFB and CTR mode always use the encryption key schedule + */ + if( MBEDTLS_ENCRYPT == operation || + MBEDTLS_MODE_CFB == ctx->cipher_info->mode || + MBEDTLS_MODE_CTR == ctx->cipher_info->mode ) + { + return ctx->cipher_info->base->setkey_enc_func( ctx->cipher_ctx, key, + ctx->key_bitlen ); + } + + if( MBEDTLS_DECRYPT == operation ) + return ctx->cipher_info->base->setkey_dec_func( ctx->cipher_ctx, key, + ctx->key_bitlen ); + + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); +} + +int mbedtls_cipher_set_iv( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len ) +{ + size_t actual_iv_size; + + if( NULL == ctx || NULL == ctx->cipher_info || NULL == iv ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + /* avoid buffer overflow in ctx->iv */ + if( iv_len > MBEDTLS_MAX_IV_LENGTH ) + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + + if( ( ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_IV_LEN ) != 0 ) + actual_iv_size = iv_len; + else + { + actual_iv_size = ctx->cipher_info->iv_size; + + /* avoid reading past the end of input buffer */ + if( actual_iv_size > iv_len ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + memcpy( ctx->iv, iv, actual_iv_size ); + ctx->iv_size = actual_iv_size; + + return( 0 ); +} + +int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + ctx->unprocessed_len = 0; + + return( 0 ); +} + +#if defined(MBEDTLS_GCM_C) +int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx, + const unsigned char *ad, size_t ad_len ) +{ + if( NULL == ctx || NULL == ctx->cipher_info ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + return mbedtls_gcm_starts( (mbedtls_gcm_context *) ctx->cipher_ctx, ctx->operation, + ctx->iv, ctx->iv_size, ad, ad_len ); + } + + return( 0 ); +} +#endif /* MBEDTLS_GCM_C */ + +int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input, + size_t ilen, unsigned char *output, size_t *olen ) +{ + int ret; + + if( NULL == ctx || NULL == ctx->cipher_info || NULL == olen ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + *olen = 0; + + if( ctx->cipher_info->mode == MBEDTLS_MODE_ECB ) + { + if( ilen != mbedtls_cipher_get_block_size( ctx ) ) + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + + *olen = ilen; + + if( 0 != ( ret = ctx->cipher_info->base->ecb_func( ctx->cipher_ctx, + ctx->operation, input, output ) ) ) + { + return( ret ); + } + + return( 0 ); + } + +#if defined(MBEDTLS_GCM_C) + if( ctx->cipher_info->mode == MBEDTLS_MODE_GCM ) + { + *olen = ilen; + return mbedtls_gcm_update( (mbedtls_gcm_context *) ctx->cipher_ctx, ilen, input, + output ); + } +#endif + + if( input == output && + ( ctx->unprocessed_len != 0 || ilen % mbedtls_cipher_get_block_size( ctx ) ) ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + if( ctx->cipher_info->mode == MBEDTLS_MODE_CBC ) + { + size_t copy_len = 0; + + /* + * If there is not enough data for a full block, cache it. + */ + if( ( ctx->operation == MBEDTLS_DECRYPT && + ilen + ctx->unprocessed_len <= mbedtls_cipher_get_block_size( ctx ) ) || + ( ctx->operation == MBEDTLS_ENCRYPT && + ilen + ctx->unprocessed_len < mbedtls_cipher_get_block_size( ctx ) ) ) + { + memcpy( &( ctx->unprocessed_data[ctx->unprocessed_len] ), input, + ilen ); + + ctx->unprocessed_len += ilen; + return( 0 ); + } + + /* + * Process cached data first + */ + if( ctx->unprocessed_len != 0 ) + { + copy_len = mbedtls_cipher_get_block_size( ctx ) - ctx->unprocessed_len; + + memcpy( &( ctx->unprocessed_data[ctx->unprocessed_len] ), input, + copy_len ); + + if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, + ctx->operation, mbedtls_cipher_get_block_size( ctx ), ctx->iv, + ctx->unprocessed_data, output ) ) ) + { + return( ret ); + } + + *olen += mbedtls_cipher_get_block_size( ctx ); + output += mbedtls_cipher_get_block_size( ctx ); + ctx->unprocessed_len = 0; + + input += copy_len; + ilen -= copy_len; + } + + /* + * Cache final, incomplete block + */ + if( 0 != ilen ) + { + copy_len = ilen % mbedtls_cipher_get_block_size( ctx ); + if( copy_len == 0 && ctx->operation == MBEDTLS_DECRYPT ) + copy_len = mbedtls_cipher_get_block_size( ctx ); + + memcpy( ctx->unprocessed_data, &( input[ilen - copy_len] ), + copy_len ); + + ctx->unprocessed_len += copy_len; + ilen -= copy_len; + } + + /* + * Process remaining full blocks + */ + if( ilen ) + { + if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, + ctx->operation, ilen, ctx->iv, input, output ) ) ) + { + return( ret ); + } + + *olen += ilen; + } + + return( 0 ); + } +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) + if( ctx->cipher_info->mode == MBEDTLS_MODE_CFB ) + { + if( 0 != ( ret = ctx->cipher_info->base->cfb_func( ctx->cipher_ctx, + ctx->operation, ilen, &ctx->unprocessed_len, ctx->iv, + input, output ) ) ) + { + return( ret ); + } + + *olen = ilen; + + return( 0 ); + } +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) + if( ctx->cipher_info->mode == MBEDTLS_MODE_CTR ) + { + if( 0 != ( ret = ctx->cipher_info->base->ctr_func( ctx->cipher_ctx, + ilen, &ctx->unprocessed_len, ctx->iv, + ctx->unprocessed_data, input, output ) ) ) + { + return( ret ); + } + + *olen = ilen; + + return( 0 ); + } +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + if( ctx->cipher_info->mode == MBEDTLS_MODE_STREAM ) + { + if( 0 != ( ret = ctx->cipher_info->base->stream_func( ctx->cipher_ctx, + ilen, input, output ) ) ) + { + return( ret ); + } + + *olen = ilen; + + return( 0 ); + } +#endif /* MBEDTLS_CIPHER_MODE_STREAM */ + + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); +} + +#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING) +#if defined(MBEDTLS_CIPHER_PADDING_PKCS7) +/* + * PKCS7 (and PKCS5) padding: fill with ll bytes, with ll = padding_len + */ +static void add_pkcs_padding( unsigned char *output, size_t output_len, + size_t data_len ) +{ + size_t padding_len = output_len - data_len; + unsigned char i; + + for( i = 0; i < padding_len; i++ ) + output[data_len + i] = (unsigned char) padding_len; +} + +static int get_pkcs_padding( unsigned char *input, size_t input_len, + size_t *data_len ) +{ + size_t i, pad_idx; + unsigned char padding_len, bad = 0; + + if( NULL == input || NULL == data_len ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + padding_len = input[input_len - 1]; + *data_len = input_len - padding_len; + + /* Avoid logical || since it results in a branch */ + bad |= padding_len > input_len; + bad |= padding_len == 0; + + /* The number of bytes checked must be independent of padding_len, + * so pick input_len, which is usually 8 or 16 (one block) */ + pad_idx = input_len - padding_len; + for( i = 0; i < input_len; i++ ) + bad |= ( input[i] ^ padding_len ) * ( i >= pad_idx ); + + return( MBEDTLS_ERR_CIPHER_INVALID_PADDING * ( bad != 0 ) ); +} +#endif /* MBEDTLS_CIPHER_PADDING_PKCS7 */ + +#if defined(MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS) +/* + * One and zeros padding: fill with 80 00 ... 00 + */ +static void add_one_and_zeros_padding( unsigned char *output, + size_t output_len, size_t data_len ) +{ + size_t padding_len = output_len - data_len; + unsigned char i = 0; + + output[data_len] = 0x80; + for( i = 1; i < padding_len; i++ ) + output[data_len + i] = 0x00; +} + +static int get_one_and_zeros_padding( unsigned char *input, size_t input_len, + size_t *data_len ) +{ + size_t i; + unsigned char done = 0, prev_done, bad; + + if( NULL == input || NULL == data_len ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + bad = 0xFF; + *data_len = 0; + for( i = input_len; i > 0; i-- ) + { + prev_done = done; + done |= ( input[i-1] != 0 ); + *data_len |= ( i - 1 ) * ( done != prev_done ); + bad &= ( input[i-1] ^ 0x80 ) | ( done == prev_done ); + } + + return( MBEDTLS_ERR_CIPHER_INVALID_PADDING * ( bad != 0 ) ); + +} +#endif /* MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS */ + +#if defined(MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN) +/* + * Zeros and len padding: fill with 00 ... 00 ll, where ll is padding length + */ +static void add_zeros_and_len_padding( unsigned char *output, + size_t output_len, size_t data_len ) +{ + size_t padding_len = output_len - data_len; + unsigned char i = 0; + + for( i = 1; i < padding_len; i++ ) + output[data_len + i - 1] = 0x00; + output[output_len - 1] = (unsigned char) padding_len; +} + +static int get_zeros_and_len_padding( unsigned char *input, size_t input_len, + size_t *data_len ) +{ + size_t i, pad_idx; + unsigned char padding_len, bad = 0; + + if( NULL == input || NULL == data_len ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + padding_len = input[input_len - 1]; + *data_len = input_len - padding_len; + + /* Avoid logical || since it results in a branch */ + bad |= padding_len > input_len; + bad |= padding_len == 0; + + /* The number of bytes checked must be independent of padding_len */ + pad_idx = input_len - padding_len; + for( i = 0; i < input_len - 1; i++ ) + bad |= input[i] * ( i >= pad_idx ); + + return( MBEDTLS_ERR_CIPHER_INVALID_PADDING * ( bad != 0 ) ); +} +#endif /* MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN */ + +#if defined(MBEDTLS_CIPHER_PADDING_ZEROS) +/* + * Zero padding: fill with 00 ... 00 + */ +static void add_zeros_padding( unsigned char *output, + size_t output_len, size_t data_len ) +{ + size_t i; + + for( i = data_len; i < output_len; i++ ) + output[i] = 0x00; +} + +static int get_zeros_padding( unsigned char *input, size_t input_len, + size_t *data_len ) +{ + size_t i; + unsigned char done = 0, prev_done; + + if( NULL == input || NULL == data_len ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + *data_len = 0; + for( i = input_len; i > 0; i-- ) + { + prev_done = done; + done |= ( input[i-1] != 0 ); + *data_len |= i * ( done != prev_done ); + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_PADDING_ZEROS */ + +/* + * No padding: don't pad :) + * + * There is no add_padding function (check for NULL in mbedtls_cipher_finish) + * but a trivial get_padding function + */ +static int get_no_padding( unsigned char *input, size_t input_len, + size_t *data_len ) +{ + if( NULL == input || NULL == data_len ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + *data_len = input_len; + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */ + +int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx, + unsigned char *output, size_t *olen ) +{ + if( NULL == ctx || NULL == ctx->cipher_info || NULL == olen ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + *olen = 0; + + if( MBEDTLS_MODE_CFB == ctx->cipher_info->mode || + MBEDTLS_MODE_CTR == ctx->cipher_info->mode || + MBEDTLS_MODE_GCM == ctx->cipher_info->mode || + MBEDTLS_MODE_STREAM == ctx->cipher_info->mode ) + { + return( 0 ); + } + + if( MBEDTLS_MODE_ECB == ctx->cipher_info->mode ) + { + if( ctx->unprocessed_len != 0 ) + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + + return( 0 ); + } + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + if( MBEDTLS_MODE_CBC == ctx->cipher_info->mode ) + { + int ret = 0; + + if( MBEDTLS_ENCRYPT == ctx->operation ) + { + /* check for 'no padding' mode */ + if( NULL == ctx->add_padding ) + { + if( 0 != ctx->unprocessed_len ) + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + + return( 0 ); + } + + ctx->add_padding( ctx->unprocessed_data, mbedtls_cipher_get_iv_size( ctx ), + ctx->unprocessed_len ); + } + else if( mbedtls_cipher_get_block_size( ctx ) != ctx->unprocessed_len ) + { + /* + * For decrypt operations, expect a full block, + * or an empty block if no padding + */ + if( NULL == ctx->add_padding && 0 == ctx->unprocessed_len ) + return( 0 ); + + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + } + + /* cipher block */ + if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, + ctx->operation, mbedtls_cipher_get_block_size( ctx ), ctx->iv, + ctx->unprocessed_data, output ) ) ) + { + return( ret ); + } + + /* Set output size for decryption */ + if( MBEDTLS_DECRYPT == ctx->operation ) + return ctx->get_padding( output, mbedtls_cipher_get_block_size( ctx ), + olen ); + + /* Set output size for encryption */ + *olen = mbedtls_cipher_get_block_size( ctx ); + return( 0 ); + } +#else + ((void) output); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); +} + +#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING) +int mbedtls_cipher_set_padding_mode( mbedtls_cipher_context_t *ctx, mbedtls_cipher_padding_t mode ) +{ + if( NULL == ctx || + MBEDTLS_MODE_CBC != ctx->cipher_info->mode ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + switch( mode ) + { +#if defined(MBEDTLS_CIPHER_PADDING_PKCS7) + case MBEDTLS_PADDING_PKCS7: + ctx->add_padding = add_pkcs_padding; + ctx->get_padding = get_pkcs_padding; + break; +#endif +#if defined(MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS) + case MBEDTLS_PADDING_ONE_AND_ZEROS: + ctx->add_padding = add_one_and_zeros_padding; + ctx->get_padding = get_one_and_zeros_padding; + break; +#endif +#if defined(MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN) + case MBEDTLS_PADDING_ZEROS_AND_LEN: + ctx->add_padding = add_zeros_and_len_padding; + ctx->get_padding = get_zeros_and_len_padding; + break; +#endif +#if defined(MBEDTLS_CIPHER_PADDING_ZEROS) + case MBEDTLS_PADDING_ZEROS: + ctx->add_padding = add_zeros_padding; + ctx->get_padding = get_zeros_padding; + break; +#endif + case MBEDTLS_PADDING_NONE: + ctx->add_padding = NULL; + ctx->get_padding = get_no_padding; + break; + + default: + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */ + +#if defined(MBEDTLS_GCM_C) +int mbedtls_cipher_write_tag( mbedtls_cipher_context_t *ctx, + unsigned char *tag, size_t tag_len ) +{ + if( NULL == ctx || NULL == ctx->cipher_info || NULL == tag ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( MBEDTLS_ENCRYPT != ctx->operation ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + return mbedtls_gcm_finish( (mbedtls_gcm_context *) ctx->cipher_ctx, tag, tag_len ); + + return( 0 ); +} + +int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx, + const unsigned char *tag, size_t tag_len ) +{ + int ret; + + if( NULL == ctx || NULL == ctx->cipher_info || + MBEDTLS_DECRYPT != ctx->operation ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + unsigned char check_tag[16]; + size_t i; + int diff; + + if( tag_len > sizeof( check_tag ) ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( 0 != ( ret = mbedtls_gcm_finish( (mbedtls_gcm_context *) ctx->cipher_ctx, + check_tag, tag_len ) ) ) + { + return( ret ); + } + + /* Check the tag in "constant-time" */ + for( diff = 0, i = 0; i < tag_len; i++ ) + diff |= tag[i] ^ check_tag[i]; + + if( diff != 0 ) + return( MBEDTLS_ERR_CIPHER_AUTH_FAILED ); + + return( 0 ); + } + + return( 0 ); +} +#endif /* MBEDTLS_GCM_C */ + +/* + * Packet-oriented wrapper for non-AEAD modes + */ +int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen ) +{ + int ret; + size_t finish_olen; + + if( ( ret = mbedtls_cipher_set_iv( ctx, iv, iv_len ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_reset( ctx ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_update( ctx, input, ilen, output, olen ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_finish( ctx, output + *olen, &finish_olen ) ) != 0 ) + return( ret ); + + *olen += finish_olen; + + return( 0 ); +} + +#if defined(MBEDTLS_CIPHER_MODE_AEAD) +/* + * Packet-oriented encryption for AEAD modes + */ +int mbedtls_cipher_auth_encrypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, + unsigned char *tag, size_t tag_len ) +{ +#if defined(MBEDTLS_GCM_C) + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + *olen = ilen; + return( mbedtls_gcm_crypt_and_tag( ctx->cipher_ctx, MBEDTLS_GCM_ENCRYPT, ilen, + iv, iv_len, ad, ad_len, input, output, + tag_len, tag ) ); + } +#endif /* MBEDTLS_GCM_C */ +#if defined(MBEDTLS_CCM_C) + if( MBEDTLS_MODE_CCM == ctx->cipher_info->mode ) + { + *olen = ilen; + return( mbedtls_ccm_encrypt_and_tag( ctx->cipher_ctx, ilen, + iv, iv_len, ad, ad_len, input, output, + tag, tag_len ) ); + } +#endif /* MBEDTLS_CCM_C */ + + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); +} + +/* + * Packet-oriented decryption for AEAD modes + */ +int mbedtls_cipher_auth_decrypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, + const unsigned char *tag, size_t tag_len ) +{ +#if defined(MBEDTLS_GCM_C) + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + int ret; + + *olen = ilen; + ret = mbedtls_gcm_auth_decrypt( ctx->cipher_ctx, ilen, + iv, iv_len, ad, ad_len, + tag, tag_len, input, output ); + + if( ret == MBEDTLS_ERR_GCM_AUTH_FAILED ) + ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; + + return( ret ); + } +#endif /* MBEDTLS_GCM_C */ +#if defined(MBEDTLS_CCM_C) + if( MBEDTLS_MODE_CCM == ctx->cipher_info->mode ) + { + int ret; + + *olen = ilen; + ret = mbedtls_ccm_auth_decrypt( ctx->cipher_ctx, ilen, + iv, iv_len, ad, ad_len, + input, output, tag, tag_len ); + + if( ret == MBEDTLS_ERR_CCM_AUTH_FAILED ) + ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; + + return( ret ); + } +#endif /* MBEDTLS_CCM_C */ + + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); +} +#endif /* MBEDTLS_CIPHER_MODE_AEAD */ + +#endif /* MBEDTLS_CIPHER_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/cipher_wrap.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/cipher_wrap.c new file mode 100644 index 0000000..814376b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/cipher_wrap.c @@ -0,0 +1,1451 @@ +/** + * \file cipher_wrap.c + * + * \brief Generic cipher wrapper for mbed TLS + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_CIPHER_C) + +#include "mbedtls/cipher_internal.h" + +#if defined(MBEDTLS_AES_C) +#include "mbedtls/aes.h" +#endif + +#if defined(MBEDTLS_ARC4_C) +#include "mbedtls/arc4.h" +#endif + +#if defined(MBEDTLS_CAMELLIA_C) +#include "mbedtls/camellia.h" +#endif + +#if defined(MBEDTLS_DES_C) +#include "mbedtls/des.h" +#endif + +#if defined(MBEDTLS_BLOWFISH_C) +#include "mbedtls/blowfish.h" +#endif + +#if defined(MBEDTLS_GCM_C) +#include "mbedtls/gcm.h" +#endif + +#if defined(MBEDTLS_CCM_C) +#include "mbedtls/ccm.h" +#endif + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +#include +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if defined(MBEDTLS_GCM_C) +/* shared by all GCM ciphers */ +static void *gcm_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_gcm_context ) ); + + if( ctx != NULL ) + mbedtls_gcm_init( (mbedtls_gcm_context *) ctx ); + + return( ctx ); +} + +static void gcm_ctx_free( void *ctx ) +{ + mbedtls_gcm_free( ctx ); + mbedtls_free( ctx ); +} +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CCM_C) +/* shared by all CCM ciphers */ +static void *ccm_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_ccm_context ) ); + + if( ctx != NULL ) + mbedtls_ccm_init( (mbedtls_ccm_context *) ctx ); + + return( ctx ); +} + +static void ccm_ctx_free( void *ctx ) +{ + mbedtls_ccm_free( ctx ); + mbedtls_free( ctx ); +} +#endif /* MBEDTLS_CCM_C */ + +#if defined(MBEDTLS_AES_C) + +static int aes_crypt_ecb_wrap( void *ctx, mbedtls_operation_t operation, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_aes_crypt_ecb( (mbedtls_aes_context *) ctx, operation, input, output ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static int aes_crypt_cbc_wrap( void *ctx, mbedtls_operation_t operation, size_t length, + unsigned char *iv, const unsigned char *input, unsigned char *output ) +{ + return mbedtls_aes_crypt_cbc( (mbedtls_aes_context *) ctx, operation, length, iv, input, + output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +static int aes_crypt_cfb128_wrap( void *ctx, mbedtls_operation_t operation, + size_t length, size_t *iv_off, unsigned char *iv, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_aes_crypt_cfb128( (mbedtls_aes_context *) ctx, operation, length, iv_off, iv, + input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +static int aes_crypt_ctr_wrap( void *ctx, size_t length, size_t *nc_off, + unsigned char *nonce_counter, unsigned char *stream_block, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_aes_crypt_ctr( (mbedtls_aes_context *) ctx, length, nc_off, nonce_counter, + stream_block, input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +static int aes_setkey_dec_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_aes_setkey_dec( (mbedtls_aes_context *) ctx, key, key_bitlen ); +} + +static int aes_setkey_enc_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_aes_setkey_enc( (mbedtls_aes_context *) ctx, key, key_bitlen ); +} + +static void * aes_ctx_alloc( void ) +{ + mbedtls_aes_context *aes = mbedtls_calloc( 1, sizeof( mbedtls_aes_context ) ); + + if( aes == NULL ) + return( NULL ); + + mbedtls_aes_init( aes ); + + return( aes ); +} + +static void aes_ctx_free( void *ctx ) +{ + mbedtls_aes_free( (mbedtls_aes_context *) ctx ); + mbedtls_free( ctx ); +} + +static const mbedtls_cipher_base_t aes_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_AES, + aes_crypt_ecb_wrap, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + aes_crypt_cbc_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + aes_crypt_cfb128_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + aes_crypt_ctr_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + aes_setkey_enc_wrap, + aes_setkey_dec_wrap, + aes_ctx_alloc, + aes_ctx_free +}; + +static const mbedtls_cipher_info_t aes_128_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_128_ECB, + MBEDTLS_MODE_ECB, + 128, + "AES-128-ECB", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_192_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_192_ECB, + MBEDTLS_MODE_ECB, + 192, + "AES-192-ECB", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_256_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_256_ECB, + MBEDTLS_MODE_ECB, + 256, + "AES-256-ECB", + 16, + 0, + 16, + &aes_info +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const mbedtls_cipher_info_t aes_128_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_128_CBC, + MBEDTLS_MODE_CBC, + 128, + "AES-128-CBC", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_192_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_192_CBC, + MBEDTLS_MODE_CBC, + 192, + "AES-192-CBC", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_256_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_256_CBC, + MBEDTLS_MODE_CBC, + 256, + "AES-256-CBC", + 16, + 0, + 16, + &aes_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +static const mbedtls_cipher_info_t aes_128_cfb128_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_128_CFB128, + MBEDTLS_MODE_CFB, + 128, + "AES-128-CFB128", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_192_cfb128_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_192_CFB128, + MBEDTLS_MODE_CFB, + 192, + "AES-192-CFB128", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_256_cfb128_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_256_CFB128, + MBEDTLS_MODE_CFB, + 256, + "AES-256-CFB128", + 16, + 0, + 16, + &aes_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +static const mbedtls_cipher_info_t aes_128_ctr_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_128_CTR, + MBEDTLS_MODE_CTR, + 128, + "AES-128-CTR", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_192_ctr_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_192_CTR, + MBEDTLS_MODE_CTR, + 192, + "AES-192-CTR", + 16, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_256_ctr_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_256_CTR, + MBEDTLS_MODE_CTR, + 256, + "AES-256-CTR", + 16, + 0, + 16, + &aes_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +#if defined(MBEDTLS_GCM_C) +static int gcm_aes_setkey_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_gcm_setkey( (mbedtls_gcm_context *) ctx, MBEDTLS_CIPHER_ID_AES, + key, key_bitlen ); +} + +static const mbedtls_cipher_base_t gcm_aes_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_AES, + NULL, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + gcm_aes_setkey_wrap, + gcm_aes_setkey_wrap, + gcm_ctx_alloc, + gcm_ctx_free, +}; + +static const mbedtls_cipher_info_t aes_128_gcm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_128_GCM, + MBEDTLS_MODE_GCM, + 128, + "AES-128-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_aes_info +}; + +static const mbedtls_cipher_info_t aes_192_gcm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_192_GCM, + MBEDTLS_MODE_GCM, + 192, + "AES-192-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_aes_info +}; + +static const mbedtls_cipher_info_t aes_256_gcm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_256_GCM, + MBEDTLS_MODE_GCM, + 256, + "AES-256-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_aes_info +}; +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CCM_C) +static int ccm_aes_setkey_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_ccm_setkey( (mbedtls_ccm_context *) ctx, MBEDTLS_CIPHER_ID_AES, + key, key_bitlen ); +} + +static const mbedtls_cipher_base_t ccm_aes_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_AES, + NULL, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + ccm_aes_setkey_wrap, + ccm_aes_setkey_wrap, + ccm_ctx_alloc, + ccm_ctx_free, +}; + +static const mbedtls_cipher_info_t aes_128_ccm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_128_CCM, + MBEDTLS_MODE_CCM, + 128, + "AES-128-CCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &ccm_aes_info +}; + +static const mbedtls_cipher_info_t aes_192_ccm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_192_CCM, + MBEDTLS_MODE_CCM, + 192, + "AES-192-CCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &ccm_aes_info +}; + +static const mbedtls_cipher_info_t aes_256_ccm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_AES_256_CCM, + MBEDTLS_MODE_CCM, + 256, + "AES-256-CCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &ccm_aes_info +}; +#endif /* MBEDTLS_CCM_C */ + +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) + +static int camellia_crypt_ecb_wrap( void *ctx, mbedtls_operation_t operation, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_camellia_crypt_ecb( (mbedtls_camellia_context *) ctx, operation, input, + output ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static int camellia_crypt_cbc_wrap( void *ctx, mbedtls_operation_t operation, + size_t length, unsigned char *iv, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_camellia_crypt_cbc( (mbedtls_camellia_context *) ctx, operation, length, iv, + input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +static int camellia_crypt_cfb128_wrap( void *ctx, mbedtls_operation_t operation, + size_t length, size_t *iv_off, unsigned char *iv, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_camellia_crypt_cfb128( (mbedtls_camellia_context *) ctx, operation, length, + iv_off, iv, input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +static int camellia_crypt_ctr_wrap( void *ctx, size_t length, size_t *nc_off, + unsigned char *nonce_counter, unsigned char *stream_block, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_camellia_crypt_ctr( (mbedtls_camellia_context *) ctx, length, nc_off, + nonce_counter, stream_block, input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +static int camellia_setkey_dec_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_camellia_setkey_dec( (mbedtls_camellia_context *) ctx, key, key_bitlen ); +} + +static int camellia_setkey_enc_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_camellia_setkey_enc( (mbedtls_camellia_context *) ctx, key, key_bitlen ); +} + +static void * camellia_ctx_alloc( void ) +{ + mbedtls_camellia_context *ctx; + ctx = mbedtls_calloc( 1, sizeof( mbedtls_camellia_context ) ); + + if( ctx == NULL ) + return( NULL ); + + mbedtls_camellia_init( ctx ); + + return( ctx ); +} + +static void camellia_ctx_free( void *ctx ) +{ + mbedtls_camellia_free( (mbedtls_camellia_context *) ctx ); + mbedtls_free( ctx ); +} + +static const mbedtls_cipher_base_t camellia_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_CAMELLIA, + camellia_crypt_ecb_wrap, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + camellia_crypt_cbc_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + camellia_crypt_cfb128_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + camellia_crypt_ctr_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + camellia_setkey_enc_wrap, + camellia_setkey_dec_wrap, + camellia_ctx_alloc, + camellia_ctx_free +}; + +static const mbedtls_cipher_info_t camellia_128_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_128_ECB, + MBEDTLS_MODE_ECB, + 128, + "CAMELLIA-128-ECB", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_192_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_192_ECB, + MBEDTLS_MODE_ECB, + 192, + "CAMELLIA-192-ECB", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_256_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_256_ECB, + MBEDTLS_MODE_ECB, + 256, + "CAMELLIA-256-ECB", + 16, + 0, + 16, + &camellia_info +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const mbedtls_cipher_info_t camellia_128_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_128_CBC, + MBEDTLS_MODE_CBC, + 128, + "CAMELLIA-128-CBC", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_192_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_192_CBC, + MBEDTLS_MODE_CBC, + 192, + "CAMELLIA-192-CBC", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_256_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_256_CBC, + MBEDTLS_MODE_CBC, + 256, + "CAMELLIA-256-CBC", + 16, + 0, + 16, + &camellia_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +static const mbedtls_cipher_info_t camellia_128_cfb128_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_128_CFB128, + MBEDTLS_MODE_CFB, + 128, + "CAMELLIA-128-CFB128", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_192_cfb128_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_192_CFB128, + MBEDTLS_MODE_CFB, + 192, + "CAMELLIA-192-CFB128", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_256_cfb128_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_256_CFB128, + MBEDTLS_MODE_CFB, + 256, + "CAMELLIA-256-CFB128", + 16, + 0, + 16, + &camellia_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +static const mbedtls_cipher_info_t camellia_128_ctr_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_128_CTR, + MBEDTLS_MODE_CTR, + 128, + "CAMELLIA-128-CTR", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_192_ctr_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_192_CTR, + MBEDTLS_MODE_CTR, + 192, + "CAMELLIA-192-CTR", + 16, + 0, + 16, + &camellia_info +}; + +static const mbedtls_cipher_info_t camellia_256_ctr_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_256_CTR, + MBEDTLS_MODE_CTR, + 256, + "CAMELLIA-256-CTR", + 16, + 0, + 16, + &camellia_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +#if defined(MBEDTLS_GCM_C) +static int gcm_camellia_setkey_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_gcm_setkey( (mbedtls_gcm_context *) ctx, MBEDTLS_CIPHER_ID_CAMELLIA, + key, key_bitlen ); +} + +static const mbedtls_cipher_base_t gcm_camellia_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_CAMELLIA, + NULL, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + gcm_camellia_setkey_wrap, + gcm_camellia_setkey_wrap, + gcm_ctx_alloc, + gcm_ctx_free, +}; + +static const mbedtls_cipher_info_t camellia_128_gcm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_128_GCM, + MBEDTLS_MODE_GCM, + 128, + "CAMELLIA-128-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_camellia_info +}; + +static const mbedtls_cipher_info_t camellia_192_gcm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_192_GCM, + MBEDTLS_MODE_GCM, + 192, + "CAMELLIA-192-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_camellia_info +}; + +static const mbedtls_cipher_info_t camellia_256_gcm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_256_GCM, + MBEDTLS_MODE_GCM, + 256, + "CAMELLIA-256-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_camellia_info +}; +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CCM_C) +static int ccm_camellia_setkey_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_ccm_setkey( (mbedtls_ccm_context *) ctx, MBEDTLS_CIPHER_ID_CAMELLIA, + key, key_bitlen ); +} + +static const mbedtls_cipher_base_t ccm_camellia_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_CAMELLIA, + NULL, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + ccm_camellia_setkey_wrap, + ccm_camellia_setkey_wrap, + ccm_ctx_alloc, + ccm_ctx_free, +}; + +static const mbedtls_cipher_info_t camellia_128_ccm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_128_CCM, + MBEDTLS_MODE_CCM, + 128, + "CAMELLIA-128-CCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &ccm_camellia_info +}; + +static const mbedtls_cipher_info_t camellia_192_ccm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_192_CCM, + MBEDTLS_MODE_CCM, + 192, + "CAMELLIA-192-CCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &ccm_camellia_info +}; + +static const mbedtls_cipher_info_t camellia_256_ccm_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_CAMELLIA_256_CCM, + MBEDTLS_MODE_CCM, + 256, + "CAMELLIA-256-CCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &ccm_camellia_info +}; +#endif /* MBEDTLS_CCM_C */ + +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) + +static int des_crypt_ecb_wrap( void *ctx, mbedtls_operation_t operation, + const unsigned char *input, unsigned char *output ) +{ + ((void) operation); + return mbedtls_des_crypt_ecb( (mbedtls_des_context *) ctx, input, output ); +} + +static int des3_crypt_ecb_wrap( void *ctx, mbedtls_operation_t operation, + const unsigned char *input, unsigned char *output ) +{ + ((void) operation); + return mbedtls_des3_crypt_ecb( (mbedtls_des3_context *) ctx, input, output ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static int des_crypt_cbc_wrap( void *ctx, mbedtls_operation_t operation, size_t length, + unsigned char *iv, const unsigned char *input, unsigned char *output ) +{ + return mbedtls_des_crypt_cbc( (mbedtls_des_context *) ctx, operation, length, iv, input, + output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static int des3_crypt_cbc_wrap( void *ctx, mbedtls_operation_t operation, size_t length, + unsigned char *iv, const unsigned char *input, unsigned char *output ) +{ + return mbedtls_des3_crypt_cbc( (mbedtls_des3_context *) ctx, operation, length, iv, input, + output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +static int des_setkey_dec_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) key_bitlen); + + return mbedtls_des_setkey_dec( (mbedtls_des_context *) ctx, key ); +} + +static int des_setkey_enc_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) key_bitlen); + + return mbedtls_des_setkey_enc( (mbedtls_des_context *) ctx, key ); +} + +static int des3_set2key_dec_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) key_bitlen); + + return mbedtls_des3_set2key_dec( (mbedtls_des3_context *) ctx, key ); +} + +static int des3_set2key_enc_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) key_bitlen); + + return mbedtls_des3_set2key_enc( (mbedtls_des3_context *) ctx, key ); +} + +static int des3_set3key_dec_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) key_bitlen); + + return mbedtls_des3_set3key_dec( (mbedtls_des3_context *) ctx, key ); +} + +static int des3_set3key_enc_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) key_bitlen); + + return mbedtls_des3_set3key_enc( (mbedtls_des3_context *) ctx, key ); +} + +static void * des_ctx_alloc( void ) +{ + mbedtls_des_context *des = mbedtls_calloc( 1, sizeof( mbedtls_des_context ) ); + + if( des == NULL ) + return( NULL ); + + mbedtls_des_init( des ); + + return( des ); +} + +static void des_ctx_free( void *ctx ) +{ + mbedtls_des_free( (mbedtls_des_context *) ctx ); + mbedtls_free( ctx ); +} + +static void * des3_ctx_alloc( void ) +{ + mbedtls_des3_context *des3; + des3 = mbedtls_calloc( 1, sizeof( mbedtls_des3_context ) ); + + if( des3 == NULL ) + return( NULL ); + + mbedtls_des3_init( des3 ); + + return( des3 ); +} + +static void des3_ctx_free( void *ctx ) +{ + mbedtls_des3_free( (mbedtls_des3_context *) ctx ); + mbedtls_free( ctx ); +} + +static const mbedtls_cipher_base_t des_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_DES, + des_crypt_ecb_wrap, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + des_crypt_cbc_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + des_setkey_enc_wrap, + des_setkey_dec_wrap, + des_ctx_alloc, + des_ctx_free +}; + +static const mbedtls_cipher_info_t des_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_DES_ECB, + MBEDTLS_MODE_ECB, + MBEDTLS_KEY_LENGTH_DES, + "DES-ECB", + 8, + 0, + 8, + &des_info +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const mbedtls_cipher_info_t des_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_DES_CBC, + MBEDTLS_MODE_CBC, + MBEDTLS_KEY_LENGTH_DES, + "DES-CBC", + 8, + 0, + 8, + &des_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +static const mbedtls_cipher_base_t des_ede_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_DES, + des3_crypt_ecb_wrap, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + des3_crypt_cbc_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + des3_set2key_enc_wrap, + des3_set2key_dec_wrap, + des3_ctx_alloc, + des3_ctx_free +}; + +static const mbedtls_cipher_info_t des_ede_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_DES_EDE_ECB, + MBEDTLS_MODE_ECB, + MBEDTLS_KEY_LENGTH_DES_EDE, + "DES-EDE-ECB", + 8, + 0, + 8, + &des_ede_info +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const mbedtls_cipher_info_t des_ede_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_DES_EDE_CBC, + MBEDTLS_MODE_CBC, + MBEDTLS_KEY_LENGTH_DES_EDE, + "DES-EDE-CBC", + 8, + 0, + 8, + &des_ede_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +static const mbedtls_cipher_base_t des_ede3_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_3DES, + des3_crypt_ecb_wrap, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + des3_crypt_cbc_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + des3_set3key_enc_wrap, + des3_set3key_dec_wrap, + des3_ctx_alloc, + des3_ctx_free +}; + +static const mbedtls_cipher_info_t des_ede3_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_DES_EDE3_ECB, + MBEDTLS_MODE_ECB, + MBEDTLS_KEY_LENGTH_DES_EDE3, + "DES-EDE3-ECB", + 8, + 0, + 8, + &des_ede3_info +}; +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const mbedtls_cipher_info_t des_ede3_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_DES_EDE3_CBC, + MBEDTLS_MODE_CBC, + MBEDTLS_KEY_LENGTH_DES_EDE3, + "DES-EDE3-CBC", + 8, + 0, + 8, + &des_ede3_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_BLOWFISH_C) + +static int blowfish_crypt_ecb_wrap( void *ctx, mbedtls_operation_t operation, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_blowfish_crypt_ecb( (mbedtls_blowfish_context *) ctx, operation, input, + output ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static int blowfish_crypt_cbc_wrap( void *ctx, mbedtls_operation_t operation, + size_t length, unsigned char *iv, const unsigned char *input, + unsigned char *output ) +{ + return mbedtls_blowfish_crypt_cbc( (mbedtls_blowfish_context *) ctx, operation, length, iv, + input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +static int blowfish_crypt_cfb64_wrap( void *ctx, mbedtls_operation_t operation, + size_t length, size_t *iv_off, unsigned char *iv, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_blowfish_crypt_cfb64( (mbedtls_blowfish_context *) ctx, operation, length, + iv_off, iv, input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +static int blowfish_crypt_ctr_wrap( void *ctx, size_t length, size_t *nc_off, + unsigned char *nonce_counter, unsigned char *stream_block, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_blowfish_crypt_ctr( (mbedtls_blowfish_context *) ctx, length, nc_off, + nonce_counter, stream_block, input, output ); +} +#endif /* MBEDTLS_CIPHER_MODE_CTR */ + +static int blowfish_setkey_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_blowfish_setkey( (mbedtls_blowfish_context *) ctx, key, key_bitlen ); +} + +static void * blowfish_ctx_alloc( void ) +{ + mbedtls_blowfish_context *ctx; + ctx = mbedtls_calloc( 1, sizeof( mbedtls_blowfish_context ) ); + + if( ctx == NULL ) + return( NULL ); + + mbedtls_blowfish_init( ctx ); + + return( ctx ); +} + +static void blowfish_ctx_free( void *ctx ) +{ + mbedtls_blowfish_free( (mbedtls_blowfish_context *) ctx ); + mbedtls_free( ctx ); +} + +static const mbedtls_cipher_base_t blowfish_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_BLOWFISH, + blowfish_crypt_ecb_wrap, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + blowfish_crypt_cbc_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + blowfish_crypt_cfb64_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + blowfish_crypt_ctr_wrap, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + NULL, +#endif + blowfish_setkey_wrap, + blowfish_setkey_wrap, + blowfish_ctx_alloc, + blowfish_ctx_free +}; + +static const mbedtls_cipher_info_t blowfish_ecb_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_BLOWFISH_ECB, + MBEDTLS_MODE_ECB, + 128, + "BLOWFISH-ECB", + 8, + MBEDTLS_CIPHER_VARIABLE_KEY_LEN, + 8, + &blowfish_info +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const mbedtls_cipher_info_t blowfish_cbc_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_BLOWFISH_CBC, + MBEDTLS_MODE_CBC, + 128, + "BLOWFISH-CBC", + 8, + MBEDTLS_CIPHER_VARIABLE_KEY_LEN, + 8, + &blowfish_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_CIPHER_MODE_CFB) +static const mbedtls_cipher_info_t blowfish_cfb64_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_BLOWFISH_CFB64, + MBEDTLS_MODE_CFB, + 128, + "BLOWFISH-CFB64", + 8, + MBEDTLS_CIPHER_VARIABLE_KEY_LEN, + 8, + &blowfish_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CFB */ + +#if defined(MBEDTLS_CIPHER_MODE_CTR) +static const mbedtls_cipher_info_t blowfish_ctr_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_BLOWFISH_CTR, + MBEDTLS_MODE_CTR, + 128, + "BLOWFISH-CTR", + 8, + MBEDTLS_CIPHER_VARIABLE_KEY_LEN, + 8, + &blowfish_info +}; +#endif /* MBEDTLS_CIPHER_MODE_CTR */ +#endif /* MBEDTLS_BLOWFISH_C */ + +#if defined(MBEDTLS_ARC4_C) +static int arc4_crypt_stream_wrap( void *ctx, size_t length, + const unsigned char *input, + unsigned char *output ) +{ + return( mbedtls_arc4_crypt( (mbedtls_arc4_context *) ctx, length, input, output ) ); +} + +static int arc4_setkey_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + /* we get key_bitlen in bits, arc4 expects it in bytes */ + if( key_bitlen % 8 != 0 ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + mbedtls_arc4_setup( (mbedtls_arc4_context *) ctx, key, key_bitlen / 8 ); + return( 0 ); +} + +static void * arc4_ctx_alloc( void ) +{ + mbedtls_arc4_context *ctx; + ctx = mbedtls_calloc( 1, sizeof( mbedtls_arc4_context ) ); + + if( ctx == NULL ) + return( NULL ); + + mbedtls_arc4_init( ctx ); + + return( ctx ); +} + +static void arc4_ctx_free( void *ctx ) +{ + mbedtls_arc4_free( (mbedtls_arc4_context *) ctx ); + mbedtls_free( ctx ); +} + +static const mbedtls_cipher_base_t arc4_base_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_ARC4, + NULL, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + arc4_crypt_stream_wrap, +#endif + arc4_setkey_wrap, + arc4_setkey_wrap, + arc4_ctx_alloc, + arc4_ctx_free +}; + +static const mbedtls_cipher_info_t arc4_128_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ARC4_128, + MBEDTLS_MODE_STREAM, + 128, + "ARC4-128", + 0, + 0, + 1, + &arc4_base_info +}; +#endif /* MBEDTLS_ARC4_C */ + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +static int null_crypt_stream( void *ctx, size_t length, + const unsigned char *input, + unsigned char *output ) +{ + ((void) ctx); + memmove( output, input, length ); + return( 0 ); +} + +static int null_setkey( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) ctx); + ((void) key); + ((void) key_bitlen); + + return( 0 ); +} + +static void * null_ctx_alloc( void ) +{ + return( (void *) 1 ); +} + +static void null_ctx_free( void *ctx ) +{ + ((void) ctx); +} + +static const mbedtls_cipher_base_t null_base_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_ID_NULL, + NULL, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + NULL, +#endif +#if defined(MBEDTLS_CIPHER_MODE_STREAM) + null_crypt_stream, +#endif + null_setkey, + null_setkey, + null_ctx_alloc, + null_ctx_free +}; + +static const mbedtls_cipher_info_t null_cipher_info ICACHE_RODATA_ATTR = { + MBEDTLS_CIPHER_NULL, + MBEDTLS_MODE_STREAM, + 0, + "NULL", + 0, + 0, + 1, + &null_base_info +}; +#endif /* defined(MBEDTLS_CIPHER_NULL_CIPHER) */ + +const mbedtls_cipher_definition_t mbedtls_cipher_definitions[] ICACHE_RODATA_ATTR = +{ +#if defined(MBEDTLS_AES_C) + { MBEDTLS_CIPHER_AES_128_ECB, &aes_128_ecb_info }, + { MBEDTLS_CIPHER_AES_192_ECB, &aes_192_ecb_info }, + { MBEDTLS_CIPHER_AES_256_ECB, &aes_256_ecb_info }, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_CIPHER_AES_128_CBC, &aes_128_cbc_info }, + { MBEDTLS_CIPHER_AES_192_CBC, &aes_192_cbc_info }, + { MBEDTLS_CIPHER_AES_256_CBC, &aes_256_cbc_info }, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + { MBEDTLS_CIPHER_AES_128_CFB128, &aes_128_cfb128_info }, + { MBEDTLS_CIPHER_AES_192_CFB128, &aes_192_cfb128_info }, + { MBEDTLS_CIPHER_AES_256_CFB128, &aes_256_cfb128_info }, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + { MBEDTLS_CIPHER_AES_128_CTR, &aes_128_ctr_info }, + { MBEDTLS_CIPHER_AES_192_CTR, &aes_192_ctr_info }, + { MBEDTLS_CIPHER_AES_256_CTR, &aes_256_ctr_info }, +#endif +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_CIPHER_AES_128_GCM, &aes_128_gcm_info }, + { MBEDTLS_CIPHER_AES_192_GCM, &aes_192_gcm_info }, + { MBEDTLS_CIPHER_AES_256_GCM, &aes_256_gcm_info }, +#endif +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_CIPHER_AES_128_CCM, &aes_128_ccm_info }, + { MBEDTLS_CIPHER_AES_192_CCM, &aes_192_ccm_info }, + { MBEDTLS_CIPHER_AES_256_CCM, &aes_256_ccm_info }, +#endif +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_ARC4_C) + { MBEDTLS_CIPHER_ARC4_128, &arc4_128_info }, +#endif + +#if defined(MBEDTLS_BLOWFISH_C) + { MBEDTLS_CIPHER_BLOWFISH_ECB, &blowfish_ecb_info }, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_CIPHER_BLOWFISH_CBC, &blowfish_cbc_info }, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + { MBEDTLS_CIPHER_BLOWFISH_CFB64, &blowfish_cfb64_info }, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + { MBEDTLS_CIPHER_BLOWFISH_CTR, &blowfish_ctr_info }, +#endif +#endif /* MBEDTLS_BLOWFISH_C */ + +#if defined(MBEDTLS_CAMELLIA_C) + { MBEDTLS_CIPHER_CAMELLIA_128_ECB, &camellia_128_ecb_info }, + { MBEDTLS_CIPHER_CAMELLIA_192_ECB, &camellia_192_ecb_info }, + { MBEDTLS_CIPHER_CAMELLIA_256_ECB, &camellia_256_ecb_info }, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_CIPHER_CAMELLIA_128_CBC, &camellia_128_cbc_info }, + { MBEDTLS_CIPHER_CAMELLIA_192_CBC, &camellia_192_cbc_info }, + { MBEDTLS_CIPHER_CAMELLIA_256_CBC, &camellia_256_cbc_info }, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CFB) + { MBEDTLS_CIPHER_CAMELLIA_128_CFB128, &camellia_128_cfb128_info }, + { MBEDTLS_CIPHER_CAMELLIA_192_CFB128, &camellia_192_cfb128_info }, + { MBEDTLS_CIPHER_CAMELLIA_256_CFB128, &camellia_256_cfb128_info }, +#endif +#if defined(MBEDTLS_CIPHER_MODE_CTR) + { MBEDTLS_CIPHER_CAMELLIA_128_CTR, &camellia_128_ctr_info }, + { MBEDTLS_CIPHER_CAMELLIA_192_CTR, &camellia_192_ctr_info }, + { MBEDTLS_CIPHER_CAMELLIA_256_CTR, &camellia_256_ctr_info }, +#endif +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_CIPHER_CAMELLIA_128_GCM, &camellia_128_gcm_info }, + { MBEDTLS_CIPHER_CAMELLIA_192_GCM, &camellia_192_gcm_info }, + { MBEDTLS_CIPHER_CAMELLIA_256_GCM, &camellia_256_gcm_info }, +#endif +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_CIPHER_CAMELLIA_128_CCM, &camellia_128_ccm_info }, + { MBEDTLS_CIPHER_CAMELLIA_192_CCM, &camellia_192_ccm_info }, + { MBEDTLS_CIPHER_CAMELLIA_256_CCM, &camellia_256_ccm_info }, +#endif +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) + { MBEDTLS_CIPHER_DES_ECB, &des_ecb_info }, + { MBEDTLS_CIPHER_DES_EDE_ECB, &des_ede_ecb_info }, + { MBEDTLS_CIPHER_DES_EDE3_ECB, &des_ede3_ecb_info }, +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_CIPHER_DES_CBC, &des_cbc_info }, + { MBEDTLS_CIPHER_DES_EDE_CBC, &des_ede_cbc_info }, + { MBEDTLS_CIPHER_DES_EDE3_CBC, &des_ede3_cbc_info }, +#endif +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) + { MBEDTLS_CIPHER_NULL, &null_cipher_info }, +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ + + { MBEDTLS_CIPHER_NONE, NULL } +}; + +#define NUM_CIPHERS sizeof mbedtls_cipher_definitions / sizeof mbedtls_cipher_definitions[0] +int mbedtls_cipher_supported[NUM_CIPHERS]; + +#endif /* MBEDTLS_CIPHER_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ctr_drbg.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ctr_drbg.c new file mode 100644 index 0000000..aefddfa --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ctr_drbg.c @@ -0,0 +1,593 @@ +/* + * CTR_DRBG implementation based on AES-256 (NIST SP 800-90) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The NIST SP 800-90 DRBGs are described in the following publucation. + * + * http://csrc.nist.gov/publications/nistpubs/800-90/SP800-90revised_March2007.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_CTR_DRBG_C) + +#include "mbedtls/ctr_drbg.h" + +#include + +#if defined(MBEDTLS_FS_IO) +#include +#endif + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * CTR_DRBG context initialization + */ +void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_ctr_drbg_context ) ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &ctx->mutex ); +#endif +} + +/* + * Non-public function wrapped by ctr_crbg_init(). Necessary to allow NIST + * tests to succeed (which require known length fixed entropy) + */ +int mbedtls_ctr_drbg_seed_entropy_len( + mbedtls_ctr_drbg_context *ctx, + int (*f_entropy)(void *, unsigned char *, size_t), + void *p_entropy, + const unsigned char *custom, + size_t len, + size_t entropy_len ) +{ + int ret; + unsigned char key[MBEDTLS_CTR_DRBG_KEYSIZE]; + + memset( key, 0, MBEDTLS_CTR_DRBG_KEYSIZE ); + + mbedtls_aes_init( &ctx->aes_ctx ); + + ctx->f_entropy = f_entropy; + ctx->p_entropy = p_entropy; + + ctx->entropy_len = entropy_len; + ctx->reseed_interval = MBEDTLS_CTR_DRBG_RESEED_INTERVAL; + + /* + * Initialize with an empty key + */ + mbedtls_aes_setkey_enc( &ctx->aes_ctx, key, MBEDTLS_CTR_DRBG_KEYBITS ); + + if( ( ret = mbedtls_ctr_drbg_reseed( ctx, custom, len ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +int mbedtls_ctr_drbg_seed( mbedtls_ctr_drbg_context *ctx, + int (*f_entropy)(void *, unsigned char *, size_t), + void *p_entropy, + const unsigned char *custom, + size_t len ) +{ + return( mbedtls_ctr_drbg_seed_entropy_len( ctx, f_entropy, p_entropy, custom, len, + MBEDTLS_CTR_DRBG_ENTROPY_LEN ) ); +} + +void mbedtls_ctr_drbg_free( mbedtls_ctr_drbg_context *ctx ) +{ + if( ctx == NULL ) + return; + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_free( &ctx->mutex ); +#endif + mbedtls_aes_free( &ctx->aes_ctx ); + mbedtls_zeroize( ctx, sizeof( mbedtls_ctr_drbg_context ) ); +} + +void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx, int resistance ) +{ + ctx->prediction_resistance = resistance; +} + +void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx, size_t len ) +{ + ctx->entropy_len = len; +} + +void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx, int interval ) +{ + ctx->reseed_interval = interval; +} + +static int block_cipher_df( unsigned char *output, + const unsigned char *data, size_t data_len ) +{ + unsigned char buf[MBEDTLS_CTR_DRBG_MAX_SEED_INPUT + MBEDTLS_CTR_DRBG_BLOCKSIZE + 16]; + unsigned char tmp[MBEDTLS_CTR_DRBG_SEEDLEN]; + unsigned char key[MBEDTLS_CTR_DRBG_KEYSIZE]; + unsigned char chain[MBEDTLS_CTR_DRBG_BLOCKSIZE]; + unsigned char *p, *iv; + mbedtls_aes_context aes_ctx; + + int i, j; + size_t buf_len, use_len; + + if( data_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ) + return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); + + memset( buf, 0, MBEDTLS_CTR_DRBG_MAX_SEED_INPUT + MBEDTLS_CTR_DRBG_BLOCKSIZE + 16 ); + mbedtls_aes_init( &aes_ctx ); + + /* + * Construct IV (16 bytes) and S in buffer + * IV = Counter (in 32-bits) padded to 16 with zeroes + * S = Length input string (in 32-bits) || Length of output (in 32-bits) || + * data || 0x80 + * (Total is padded to a multiple of 16-bytes with zeroes) + */ + p = buf + MBEDTLS_CTR_DRBG_BLOCKSIZE; + *p++ = ( data_len >> 24 ) & 0xff; + *p++ = ( data_len >> 16 ) & 0xff; + *p++ = ( data_len >> 8 ) & 0xff; + *p++ = ( data_len ) & 0xff; + p += 3; + *p++ = MBEDTLS_CTR_DRBG_SEEDLEN; + memcpy( p, data, data_len ); + p[data_len] = 0x80; + + buf_len = MBEDTLS_CTR_DRBG_BLOCKSIZE + 8 + data_len + 1; + + for( i = 0; i < MBEDTLS_CTR_DRBG_KEYSIZE; i++ ) + key[i] = i; + + mbedtls_aes_setkey_enc( &aes_ctx, key, MBEDTLS_CTR_DRBG_KEYBITS ); + + /* + * Reduce data to MBEDTLS_CTR_DRBG_SEEDLEN bytes of data + */ + for( j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE ) + { + p = buf; + memset( chain, 0, MBEDTLS_CTR_DRBG_BLOCKSIZE ); + use_len = buf_len; + + while( use_len > 0 ) + { + for( i = 0; i < MBEDTLS_CTR_DRBG_BLOCKSIZE; i++ ) + chain[i] ^= p[i]; + p += MBEDTLS_CTR_DRBG_BLOCKSIZE; + use_len -= ( use_len >= MBEDTLS_CTR_DRBG_BLOCKSIZE ) ? + MBEDTLS_CTR_DRBG_BLOCKSIZE : use_len; + + mbedtls_aes_crypt_ecb( &aes_ctx, MBEDTLS_AES_ENCRYPT, chain, chain ); + } + + memcpy( tmp + j, chain, MBEDTLS_CTR_DRBG_BLOCKSIZE ); + + /* + * Update IV + */ + buf[3]++; + } + + /* + * Do final encryption with reduced data + */ + mbedtls_aes_setkey_enc( &aes_ctx, tmp, MBEDTLS_CTR_DRBG_KEYBITS ); + iv = tmp + MBEDTLS_CTR_DRBG_KEYSIZE; + p = output; + + for( j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE ) + { + mbedtls_aes_crypt_ecb( &aes_ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); + memcpy( p, iv, MBEDTLS_CTR_DRBG_BLOCKSIZE ); + p += MBEDTLS_CTR_DRBG_BLOCKSIZE; + } + + mbedtls_aes_free( &aes_ctx ); + + return( 0 ); +} + +static int ctr_drbg_update_internal( mbedtls_ctr_drbg_context *ctx, + const unsigned char data[MBEDTLS_CTR_DRBG_SEEDLEN] ) +{ + unsigned char tmp[MBEDTLS_CTR_DRBG_SEEDLEN]; + unsigned char *p = tmp; + int i, j; + + memset( tmp, 0, MBEDTLS_CTR_DRBG_SEEDLEN ); + + for( j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE ) + { + /* + * Increase counter + */ + for( i = MBEDTLS_CTR_DRBG_BLOCKSIZE; i > 0; i-- ) + if( ++ctx->counter[i - 1] != 0 ) + break; + + /* + * Crypt counter block + */ + mbedtls_aes_crypt_ecb( &ctx->aes_ctx, MBEDTLS_AES_ENCRYPT, ctx->counter, p ); + + p += MBEDTLS_CTR_DRBG_BLOCKSIZE; + } + + for( i = 0; i < MBEDTLS_CTR_DRBG_SEEDLEN; i++ ) + tmp[i] ^= data[i]; + + /* + * Update key and counter + */ + mbedtls_aes_setkey_enc( &ctx->aes_ctx, tmp, MBEDTLS_CTR_DRBG_KEYBITS ); + memcpy( ctx->counter, tmp + MBEDTLS_CTR_DRBG_KEYSIZE, MBEDTLS_CTR_DRBG_BLOCKSIZE ); + + return( 0 ); +} + +void mbedtls_ctr_drbg_update( mbedtls_ctr_drbg_context *ctx, + const unsigned char *additional, size_t add_len ) +{ + unsigned char add_input[MBEDTLS_CTR_DRBG_SEEDLEN]; + + if( add_len > 0 ) + { + /* MAX_INPUT would be more logical here, but we have to match + * block_cipher_df()'s limits since we can't propagate errors */ + if( add_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ) + add_len = MBEDTLS_CTR_DRBG_MAX_SEED_INPUT; + + block_cipher_df( add_input, additional, add_len ); + ctr_drbg_update_internal( ctx, add_input ); + } +} + +int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx, + const unsigned char *additional, size_t len ) +{ + unsigned char seed[MBEDTLS_CTR_DRBG_MAX_SEED_INPUT]; + size_t seedlen = 0; + + if( ctx->entropy_len + len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ) + return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); + + memset( seed, 0, MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ); + + /* + * Gather entropy_len bytes of entropy to seed state + */ + if( 0 != ctx->f_entropy( ctx->p_entropy, seed, + ctx->entropy_len ) ) + { + return( MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED ); + } + + seedlen += ctx->entropy_len; + + /* + * Add additional data + */ + if( additional && len ) + { + memcpy( seed + seedlen, additional, len ); + seedlen += len; + } + + /* + * Reduce to 384 bits + */ + block_cipher_df( seed, seed, seedlen ); + + /* + * Update state + */ + ctr_drbg_update_internal( ctx, seed ); + ctx->reseed_counter = 1; + + return( 0 ); +} + +int mbedtls_ctr_drbg_random_with_add( void *p_rng, + unsigned char *output, size_t output_len, + const unsigned char *additional, size_t add_len ) +{ + int ret = 0; + mbedtls_ctr_drbg_context *ctx = (mbedtls_ctr_drbg_context *) p_rng; + unsigned char add_input[MBEDTLS_CTR_DRBG_SEEDLEN]; + unsigned char *p = output; + unsigned char tmp[MBEDTLS_CTR_DRBG_BLOCKSIZE]; + int i; + size_t use_len; + + if( output_len > MBEDTLS_CTR_DRBG_MAX_REQUEST ) + return( MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG ); + + if( add_len > MBEDTLS_CTR_DRBG_MAX_INPUT ) + return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); + + memset( add_input, 0, MBEDTLS_CTR_DRBG_SEEDLEN ); + + if( ctx->reseed_counter > ctx->reseed_interval || + ctx->prediction_resistance ) + { + if( ( ret = mbedtls_ctr_drbg_reseed( ctx, additional, add_len ) ) != 0 ) + return( ret ); + + add_len = 0; + } + + if( add_len > 0 ) + { + block_cipher_df( add_input, additional, add_len ); + ctr_drbg_update_internal( ctx, add_input ); + } + + while( output_len > 0 ) + { + /* + * Increase counter + */ + for( i = MBEDTLS_CTR_DRBG_BLOCKSIZE; i > 0; i-- ) + if( ++ctx->counter[i - 1] != 0 ) + break; + + /* + * Crypt counter block + */ + mbedtls_aes_crypt_ecb( &ctx->aes_ctx, MBEDTLS_AES_ENCRYPT, ctx->counter, tmp ); + + use_len = ( output_len > MBEDTLS_CTR_DRBG_BLOCKSIZE ) ? MBEDTLS_CTR_DRBG_BLOCKSIZE : + output_len; + /* + * Copy random block to destination + */ + memcpy( p, tmp, use_len ); + p += use_len; + output_len -= use_len; + } + + ctr_drbg_update_internal( ctx, add_input ); + + ctx->reseed_counter++; + + return( 0 ); +} + +int mbedtls_ctr_drbg_random( void *p_rng, unsigned char *output, size_t output_len ) +{ + int ret; + mbedtls_ctr_drbg_context *ctx = (mbedtls_ctr_drbg_context *) p_rng; + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + ret = mbedtls_ctr_drbg_random_with_add( ctx, output, output_len, NULL, 0 ); + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +#if defined(MBEDTLS_FS_IO) +int mbedtls_ctr_drbg_write_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path ) +{ + int ret = MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR; + FILE *f; + unsigned char buf[ MBEDTLS_CTR_DRBG_MAX_INPUT ]; + + if( ( f = fopen( path, "wb" ) ) == NULL ) + return( MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR ); + + if( ( ret = mbedtls_ctr_drbg_random( ctx, buf, MBEDTLS_CTR_DRBG_MAX_INPUT ) ) != 0 ) + goto exit; + + if( fwrite( buf, 1, MBEDTLS_CTR_DRBG_MAX_INPUT, f ) != MBEDTLS_CTR_DRBG_MAX_INPUT ) + { + ret = MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR; + goto exit; + } + + ret = 0; + +exit: + fclose( f ); + return( ret ); +} + +int mbedtls_ctr_drbg_update_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path ) +{ + FILE *f; + size_t n; + unsigned char buf[ MBEDTLS_CTR_DRBG_MAX_INPUT ]; + + if( ( f = fopen( path, "rb" ) ) == NULL ) + return( MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR ); + + fseek( f, 0, SEEK_END ); + n = (size_t) ftell( f ); + fseek( f, 0, SEEK_SET ); + + if( n > MBEDTLS_CTR_DRBG_MAX_INPUT ) + { + fclose( f ); + return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); + } + + if( fread( buf, 1, n, f ) != n ) + { + fclose( f ); + return( MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR ); + } + + fclose( f ); + + mbedtls_ctr_drbg_update( ctx, buf, n ); + + return( mbedtls_ctr_drbg_write_seed_file( ctx, path ) ); +} +#endif /* MBEDTLS_FS_IO */ + +#if defined(MBEDTLS_SELF_TEST) + +static const unsigned char entropy_source_pr[96] = + { 0xc1, 0x80, 0x81, 0xa6, 0x5d, 0x44, 0x02, 0x16, + 0x19, 0xb3, 0xf1, 0x80, 0xb1, 0xc9, 0x20, 0x02, + 0x6a, 0x54, 0x6f, 0x0c, 0x70, 0x81, 0x49, 0x8b, + 0x6e, 0xa6, 0x62, 0x52, 0x6d, 0x51, 0xb1, 0xcb, + 0x58, 0x3b, 0xfa, 0xd5, 0x37, 0x5f, 0xfb, 0xc9, + 0xff, 0x46, 0xd2, 0x19, 0xc7, 0x22, 0x3e, 0x95, + 0x45, 0x9d, 0x82, 0xe1, 0xe7, 0x22, 0x9f, 0x63, + 0x31, 0x69, 0xd2, 0x6b, 0x57, 0x47, 0x4f, 0xa3, + 0x37, 0xc9, 0x98, 0x1c, 0x0b, 0xfb, 0x91, 0x31, + 0x4d, 0x55, 0xb9, 0xe9, 0x1c, 0x5a, 0x5e, 0xe4, + 0x93, 0x92, 0xcf, 0xc5, 0x23, 0x12, 0xd5, 0x56, + 0x2c, 0x4a, 0x6e, 0xff, 0xdc, 0x10, 0xd0, 0x68 }; + +static const unsigned char entropy_source_nopr[64] = + { 0x5a, 0x19, 0x4d, 0x5e, 0x2b, 0x31, 0x58, 0x14, + 0x54, 0xde, 0xf6, 0x75, 0xfb, 0x79, 0x58, 0xfe, + 0xc7, 0xdb, 0x87, 0x3e, 0x56, 0x89, 0xfc, 0x9d, + 0x03, 0x21, 0x7c, 0x68, 0xd8, 0x03, 0x38, 0x20, + 0xf9, 0xe6, 0x5e, 0x04, 0xd8, 0x56, 0xf3, 0xa9, + 0xc4, 0x4a, 0x4c, 0xbd, 0xc1, 0xd0, 0x08, 0x46, + 0xf5, 0x98, 0x3d, 0x77, 0x1c, 0x1b, 0x13, 0x7e, + 0x4e, 0x0f, 0x9d, 0x8e, 0xf4, 0x09, 0xf9, 0x2e }; + +static const unsigned char nonce_pers_pr[16] = + { 0xd2, 0x54, 0xfc, 0xff, 0x02, 0x1e, 0x69, 0xd2, + 0x29, 0xc9, 0xcf, 0xad, 0x85, 0xfa, 0x48, 0x6c }; + +static const unsigned char nonce_pers_nopr[16] = + { 0x1b, 0x54, 0xb8, 0xff, 0x06, 0x42, 0xbf, 0xf5, + 0x21, 0xf1, 0x5c, 0x1c, 0x0b, 0x66, 0x5f, 0x3f }; + +static const unsigned char result_pr[16] = + { 0x34, 0x01, 0x16, 0x56, 0xb4, 0x29, 0x00, 0x8f, + 0x35, 0x63, 0xec, 0xb5, 0xf2, 0x59, 0x07, 0x23 }; + +static const unsigned char result_nopr[16] = + { 0xa0, 0x54, 0x30, 0x3d, 0x8a, 0x7e, 0xa9, 0x88, + 0x9d, 0x90, 0x3e, 0x07, 0x7c, 0x6f, 0x21, 0x8f }; + +static size_t test_offset; +static int ctr_drbg_self_test_entropy( void *data, unsigned char *buf, + size_t len ) +{ + const unsigned char *p = data; + memcpy( buf, p + test_offset, len ); + test_offset += len; + return( 0 ); +} + +#define CHK( c ) if( (c) != 0 ) \ + { \ + if( verbose != 0 ) \ + mbedtls_printf( "failed\n" ); \ + return( 1 ); \ + } + +/* + * Checkup routine + */ +int mbedtls_ctr_drbg_self_test( int verbose ) +{ + mbedtls_ctr_drbg_context ctx; + unsigned char buf[16]; + + mbedtls_ctr_drbg_init( &ctx ); + + /* + * Based on a NIST CTR_DRBG test vector (PR = True) + */ + if( verbose != 0 ) + mbedtls_printf( " CTR_DRBG (PR = TRUE) : " ); + + test_offset = 0; + CHK( mbedtls_ctr_drbg_seed_entropy_len( &ctx, ctr_drbg_self_test_entropy, + (void *) entropy_source_pr, nonce_pers_pr, 16, 32 ) ); + mbedtls_ctr_drbg_set_prediction_resistance( &ctx, MBEDTLS_CTR_DRBG_PR_ON ); + CHK( mbedtls_ctr_drbg_random( &ctx, buf, MBEDTLS_CTR_DRBG_BLOCKSIZE ) ); + CHK( mbedtls_ctr_drbg_random( &ctx, buf, MBEDTLS_CTR_DRBG_BLOCKSIZE ) ); + CHK( memcmp( buf, result_pr, MBEDTLS_CTR_DRBG_BLOCKSIZE ) ); + + mbedtls_ctr_drbg_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + /* + * Based on a NIST CTR_DRBG test vector (PR = FALSE) + */ + if( verbose != 0 ) + mbedtls_printf( " CTR_DRBG (PR = FALSE): " ); + + mbedtls_ctr_drbg_init( &ctx ); + + test_offset = 0; + CHK( mbedtls_ctr_drbg_seed_entropy_len( &ctx, ctr_drbg_self_test_entropy, + (void *) entropy_source_nopr, nonce_pers_nopr, 16, 32 ) ); + CHK( mbedtls_ctr_drbg_random( &ctx, buf, 16 ) ); + CHK( mbedtls_ctr_drbg_reseed( &ctx, NULL, 0 ) ); + CHK( mbedtls_ctr_drbg_random( &ctx, buf, 16 ) ); + CHK( memcmp( buf, result_nopr, 16 ) ); + + mbedtls_ctr_drbg_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_CTR_DRBG_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/debug.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/debug.c new file mode 100644 index 0000000..4752ab1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/debug.c @@ -0,0 +1,367 @@ +/* + * Debugging routines + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_DEBUG_C) + +#include "mbedtls/debug.h" + +#include +#include +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#define mbedtls_snprintf snprintf +#endif + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +#define DEBUG_BUF_SIZE 512 + +static int debug_threshold = 0; + +void mbedtls_debug_set_threshold( int threshold ) +{ + debug_threshold = threshold; +} + +/* + * All calls to f_dbg must be made via this function + */ +static inline void debug_send_line( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *str ) +{ + /* + * If in a threaded environment, we need a thread identifier. + * Since there is no portable way to get one, use the address of the ssl + * context instead, as it shouldn't be shared between threads. + */ +#if defined(MBEDTLS_THREADING_C) + char idstr[20 + DEBUG_BUF_SIZE]; /* 0x + 16 nibbles + ': ' */ + mbedtls_snprintf( idstr, sizeof( idstr ), "%p: %s", ssl, str ); + ssl->conf->f_dbg( ssl->conf->p_dbg, level, file, line, idstr ); +#else + ssl->conf->f_dbg( ssl->conf->p_dbg, level, file, line, str ); +#endif +} + +void mbedtls_debug_print_msg( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *format, ... ) +{ + va_list argp; + char str[DEBUG_BUF_SIZE]; + int ret; + + if( ssl->conf == NULL || ssl->conf->f_dbg == NULL || level > debug_threshold ) + return; + + va_start( argp, format ); +#if defined(_WIN32) +#if defined(_TRUNCATE) + ret = _vsnprintf_s( str, DEBUG_BUF_SIZE, _TRUNCATE, format, argp ); +#else + ret = _vsnprintf( str, DEBUG_BUF_SIZE, format, argp ); + if( ret < 0 || (size_t) ret == DEBUG_BUF_SIZE ) + { + str[DEBUG_BUF_SIZE-1] = '\0'; + ret = -1; + } +#endif +#else + ret = vsnprintf( str, DEBUG_BUF_SIZE, format, argp ); +#endif + va_end( argp ); + + if( ret >= 0 && ret < DEBUG_BUF_SIZE - 1 ) + { + str[ret] = '\n'; + str[ret + 1] = '\0'; + } + + debug_send_line( ssl, level, file, line, str ); +} + +void mbedtls_debug_print_ret( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, int ret ) +{ + char str[DEBUG_BUF_SIZE]; + + if( ssl->conf == NULL || ssl->conf->f_dbg == NULL || level > debug_threshold ) + return; + + /* + * With non-blocking I/O and examples that just retry immediately, + * the logs would be quickly flooded with WANT_READ, so ignore that. + * Don't ignore WANT_WRITE however, since is is usually rare. + */ + if( ret == MBEDTLS_ERR_SSL_WANT_READ ) + return; + + mbedtls_snprintf( str, sizeof( str ), "%s() returned %d (-0x%04x)\n", + text, ret, -ret ); + + debug_send_line( ssl, level, file, line, str ); +} + +void mbedtls_debug_print_buf( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, const char *text, + const unsigned char *buf, size_t len ) +{ + char str[DEBUG_BUF_SIZE]; + char txt[17]; + size_t i, idx = 0; + + if( ssl->conf == NULL || ssl->conf->f_dbg == NULL || level > debug_threshold ) + return; + + mbedtls_snprintf( str + idx, sizeof( str ) - idx, "dumping '%s' (%u bytes)\n", + text, (unsigned int) len ); + + debug_send_line( ssl, level, file, line, str ); + + idx = 0; + memset( txt, 0, sizeof( txt ) ); + for( i = 0; i < len; i++ ) + { + if( i >= 4096 ) + break; + + if( i % 16 == 0 ) + { + if( i > 0 ) + { + mbedtls_snprintf( str + idx, sizeof( str ) - idx, " %s\n", txt ); + debug_send_line( ssl, level, file, line, str ); + + idx = 0; + memset( txt, 0, sizeof( txt ) ); + } + + idx += mbedtls_snprintf( str + idx, sizeof( str ) - idx, "%04x: ", + (unsigned int) i ); + + } + + idx += mbedtls_snprintf( str + idx, sizeof( str ) - idx, " %02x", + (unsigned int) buf[i] ); + txt[i % 16] = ( buf[i] > 31 && buf[i] < 127 ) ? buf[i] : '.' ; + } + + if( len > 0 ) + { + for( /* i = i */; i % 16 != 0; i++ ) + idx += mbedtls_snprintf( str + idx, sizeof( str ) - idx, " " ); + + mbedtls_snprintf( str + idx, sizeof( str ) - idx, " %s\n", txt ); + debug_send_line( ssl, level, file, line, str ); + } +} + +#if defined(MBEDTLS_ECP_C) +void mbedtls_debug_print_ecp( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, const mbedtls_ecp_point *X ) +{ + char str[DEBUG_BUF_SIZE]; + + if( ssl->conf == NULL || ssl->conf->f_dbg == NULL || level > debug_threshold ) + return; + + mbedtls_snprintf( str, sizeof( str ), "%s(X)", text ); + mbedtls_debug_print_mpi( ssl, level, file, line, str, &X->X ); + + mbedtls_snprintf( str, sizeof( str ), "%s(Y)", text ); + mbedtls_debug_print_mpi( ssl, level, file, line, str, &X->Y ); +} +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_BIGNUM_C) +void mbedtls_debug_print_mpi( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, const mbedtls_mpi *X ) +{ + char str[DEBUG_BUF_SIZE]; + int j, k, zeros = 1; + size_t i, n, idx = 0; + + if( ssl->conf == NULL || ssl->conf->f_dbg == NULL || X == NULL || level > debug_threshold ) + return; + + for( n = X->n - 1; n > 0; n-- ) + if( X->p[n] != 0 ) + break; + + for( j = ( sizeof(mbedtls_mpi_uint) << 3 ) - 1; j >= 0; j-- ) + if( ( ( X->p[n] >> j ) & 1 ) != 0 ) + break; + + mbedtls_snprintf( str + idx, sizeof( str ) - idx, "value of '%s' (%d bits) is:\n", + text, (int) ( ( n * ( sizeof(mbedtls_mpi_uint) << 3 ) ) + j + 1 ) ); + + debug_send_line( ssl, level, file, line, str ); + + idx = 0; + for( i = n + 1, j = 0; i > 0; i-- ) + { + if( zeros && X->p[i - 1] == 0 ) + continue; + + for( k = sizeof( mbedtls_mpi_uint ) - 1; k >= 0; k-- ) + { + if( zeros && ( ( X->p[i - 1] >> ( k << 3 ) ) & 0xFF ) == 0 ) + continue; + else + zeros = 0; + + if( j % 16 == 0 ) + { + if( j > 0 ) + { + mbedtls_snprintf( str + idx, sizeof( str ) - idx, "\n" ); + debug_send_line( ssl, level, file, line, str ); + idx = 0; + } + } + + idx += mbedtls_snprintf( str + idx, sizeof( str ) - idx, " %02x", (unsigned int) + ( X->p[i - 1] >> ( k << 3 ) ) & 0xFF ); + + j++; + } + + } + + if( zeros == 1 ) + idx += mbedtls_snprintf( str + idx, sizeof( str ) - idx, " 00" ); + + mbedtls_snprintf( str + idx, sizeof( str ) - idx, "\n" ); + debug_send_line( ssl, level, file, line, str ); +} +#endif /* MBEDTLS_BIGNUM_C */ + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +static void debug_print_pk( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, const mbedtls_pk_context *pk ) +{ + size_t i; + mbedtls_pk_debug_item items[MBEDTLS_PK_DEBUG_MAX_ITEMS]; + char name[16]; + + memset( items, 0, sizeof( items ) ); + + if( mbedtls_pk_debug( pk, items ) != 0 ) + { + debug_send_line( ssl, level, file, line, + "invalid PK context\n" ); + return; + } + + for( i = 0; i < MBEDTLS_PK_DEBUG_MAX_ITEMS; i++ ) + { + if( items[i].type == MBEDTLS_PK_DEBUG_NONE ) + return; + + mbedtls_snprintf( name, sizeof( name ), "%s%s", text, items[i].name ); + name[sizeof( name ) - 1] = '\0'; + + if( items[i].type == MBEDTLS_PK_DEBUG_MPI ) + mbedtls_debug_print_mpi( ssl, level, file, line, name, items[i].value ); + else +#if defined(MBEDTLS_ECP_C) + if( items[i].type == MBEDTLS_PK_DEBUG_ECP ) + mbedtls_debug_print_ecp( ssl, level, file, line, name, items[i].value ); + else +#endif + debug_send_line( ssl, level, file, line, + "should not happen\n" ); + } +} + +static void debug_print_line_by_line( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, const char *text ) +{ + char str[DEBUG_BUF_SIZE]; + const char *start, *cur; + + start = text; + for( cur = text; *cur != '\0'; cur++ ) + { + if( *cur == '\n' ) + { + size_t len = cur - start + 1; + if( len > DEBUG_BUF_SIZE - 1 ) + len = DEBUG_BUF_SIZE - 1; + + memcpy( str, start, len ); + str[len] = '\0'; + + debug_send_line( ssl, level, file, line, str ); + + start = cur + 1; + } + } +} + +void mbedtls_debug_print_crt( const mbedtls_ssl_context *ssl, int level, + const char *file, int line, + const char *text, const mbedtls_x509_crt *crt ) +{ + char str[DEBUG_BUF_SIZE]; + int i = 0; + + if( ssl->conf == NULL || ssl->conf->f_dbg == NULL || crt == NULL || level > debug_threshold ) + return; + + while( crt != NULL ) + { + char buf[1024]; + + mbedtls_snprintf( str, sizeof( str ), "%s #%d:\n", text, ++i ); + debug_send_line( ssl, level, file, line, str ); + + mbedtls_x509_crt_info( buf, sizeof( buf ) - 1, "", crt ); + debug_print_line_by_line( ssl, level, file, line, buf ); + + debug_print_pk( ssl, level, file, line, "crt->", &crt->pk ); + + crt = crt->next; + } +} +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#endif /* MBEDTLS_DEBUG_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/des.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/des.c new file mode 100644 index 0000000..61f214a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/des.c @@ -0,0 +1,1061 @@ +/* + * FIPS-46-3 compliant Triple-DES implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * DES, on which TDES is based, was originally designed by Horst Feistel + * at IBM in 1974, and was adopted as a standard by NIST (formerly NBS). + * + * http://csrc.nist.gov/publications/fips/fips46-3/fips46-3.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_DES_C) + +#include "mbedtls/des.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_DES_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ + | ( (uint32_t) (b)[(i) + 1] << 16 ) \ + | ( (uint32_t) (b)[(i) + 2] << 8 ) \ + | ( (uint32_t) (b)[(i) + 3] ); \ +} +#endif + +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +/* + * Expanded DES S-boxes + */ +static const uint32_t SB1[64] = +{ + 0x01010400, 0x00000000, 0x00010000, 0x01010404, + 0x01010004, 0x00010404, 0x00000004, 0x00010000, + 0x00000400, 0x01010400, 0x01010404, 0x00000400, + 0x01000404, 0x01010004, 0x01000000, 0x00000004, + 0x00000404, 0x01000400, 0x01000400, 0x00010400, + 0x00010400, 0x01010000, 0x01010000, 0x01000404, + 0x00010004, 0x01000004, 0x01000004, 0x00010004, + 0x00000000, 0x00000404, 0x00010404, 0x01000000, + 0x00010000, 0x01010404, 0x00000004, 0x01010000, + 0x01010400, 0x01000000, 0x01000000, 0x00000400, + 0x01010004, 0x00010000, 0x00010400, 0x01000004, + 0x00000400, 0x00000004, 0x01000404, 0x00010404, + 0x01010404, 0x00010004, 0x01010000, 0x01000404, + 0x01000004, 0x00000404, 0x00010404, 0x01010400, + 0x00000404, 0x01000400, 0x01000400, 0x00000000, + 0x00010004, 0x00010400, 0x00000000, 0x01010004 +}; + +static const uint32_t SB2[64] = +{ + 0x80108020, 0x80008000, 0x00008000, 0x00108020, + 0x00100000, 0x00000020, 0x80100020, 0x80008020, + 0x80000020, 0x80108020, 0x80108000, 0x80000000, + 0x80008000, 0x00100000, 0x00000020, 0x80100020, + 0x00108000, 0x00100020, 0x80008020, 0x00000000, + 0x80000000, 0x00008000, 0x00108020, 0x80100000, + 0x00100020, 0x80000020, 0x00000000, 0x00108000, + 0x00008020, 0x80108000, 0x80100000, 0x00008020, + 0x00000000, 0x00108020, 0x80100020, 0x00100000, + 0x80008020, 0x80100000, 0x80108000, 0x00008000, + 0x80100000, 0x80008000, 0x00000020, 0x80108020, + 0x00108020, 0x00000020, 0x00008000, 0x80000000, + 0x00008020, 0x80108000, 0x00100000, 0x80000020, + 0x00100020, 0x80008020, 0x80000020, 0x00100020, + 0x00108000, 0x00000000, 0x80008000, 0x00008020, + 0x80000000, 0x80100020, 0x80108020, 0x00108000 +}; + +static const uint32_t SB3[64] = +{ + 0x00000208, 0x08020200, 0x00000000, 0x08020008, + 0x08000200, 0x00000000, 0x00020208, 0x08000200, + 0x00020008, 0x08000008, 0x08000008, 0x00020000, + 0x08020208, 0x00020008, 0x08020000, 0x00000208, + 0x08000000, 0x00000008, 0x08020200, 0x00000200, + 0x00020200, 0x08020000, 0x08020008, 0x00020208, + 0x08000208, 0x00020200, 0x00020000, 0x08000208, + 0x00000008, 0x08020208, 0x00000200, 0x08000000, + 0x08020200, 0x08000000, 0x00020008, 0x00000208, + 0x00020000, 0x08020200, 0x08000200, 0x00000000, + 0x00000200, 0x00020008, 0x08020208, 0x08000200, + 0x08000008, 0x00000200, 0x00000000, 0x08020008, + 0x08000208, 0x00020000, 0x08000000, 0x08020208, + 0x00000008, 0x00020208, 0x00020200, 0x08000008, + 0x08020000, 0x08000208, 0x00000208, 0x08020000, + 0x00020208, 0x00000008, 0x08020008, 0x00020200 +}; + +static const uint32_t SB4[64] = +{ + 0x00802001, 0x00002081, 0x00002081, 0x00000080, + 0x00802080, 0x00800081, 0x00800001, 0x00002001, + 0x00000000, 0x00802000, 0x00802000, 0x00802081, + 0x00000081, 0x00000000, 0x00800080, 0x00800001, + 0x00000001, 0x00002000, 0x00800000, 0x00802001, + 0x00000080, 0x00800000, 0x00002001, 0x00002080, + 0x00800081, 0x00000001, 0x00002080, 0x00800080, + 0x00002000, 0x00802080, 0x00802081, 0x00000081, + 0x00800080, 0x00800001, 0x00802000, 0x00802081, + 0x00000081, 0x00000000, 0x00000000, 0x00802000, + 0x00002080, 0x00800080, 0x00800081, 0x00000001, + 0x00802001, 0x00002081, 0x00002081, 0x00000080, + 0x00802081, 0x00000081, 0x00000001, 0x00002000, + 0x00800001, 0x00002001, 0x00802080, 0x00800081, + 0x00002001, 0x00002080, 0x00800000, 0x00802001, + 0x00000080, 0x00800000, 0x00002000, 0x00802080 +}; + +static const uint32_t SB5[64] = +{ + 0x00000100, 0x02080100, 0x02080000, 0x42000100, + 0x00080000, 0x00000100, 0x40000000, 0x02080000, + 0x40080100, 0x00080000, 0x02000100, 0x40080100, + 0x42000100, 0x42080000, 0x00080100, 0x40000000, + 0x02000000, 0x40080000, 0x40080000, 0x00000000, + 0x40000100, 0x42080100, 0x42080100, 0x02000100, + 0x42080000, 0x40000100, 0x00000000, 0x42000000, + 0x02080100, 0x02000000, 0x42000000, 0x00080100, + 0x00080000, 0x42000100, 0x00000100, 0x02000000, + 0x40000000, 0x02080000, 0x42000100, 0x40080100, + 0x02000100, 0x40000000, 0x42080000, 0x02080100, + 0x40080100, 0x00000100, 0x02000000, 0x42080000, + 0x42080100, 0x00080100, 0x42000000, 0x42080100, + 0x02080000, 0x00000000, 0x40080000, 0x42000000, + 0x00080100, 0x02000100, 0x40000100, 0x00080000, + 0x00000000, 0x40080000, 0x02080100, 0x40000100 +}; + +static const uint32_t SB6[64] = +{ + 0x20000010, 0x20400000, 0x00004000, 0x20404010, + 0x20400000, 0x00000010, 0x20404010, 0x00400000, + 0x20004000, 0x00404010, 0x00400000, 0x20000010, + 0x00400010, 0x20004000, 0x20000000, 0x00004010, + 0x00000000, 0x00400010, 0x20004010, 0x00004000, + 0x00404000, 0x20004010, 0x00000010, 0x20400010, + 0x20400010, 0x00000000, 0x00404010, 0x20404000, + 0x00004010, 0x00404000, 0x20404000, 0x20000000, + 0x20004000, 0x00000010, 0x20400010, 0x00404000, + 0x20404010, 0x00400000, 0x00004010, 0x20000010, + 0x00400000, 0x20004000, 0x20000000, 0x00004010, + 0x20000010, 0x20404010, 0x00404000, 0x20400000, + 0x00404010, 0x20404000, 0x00000000, 0x20400010, + 0x00000010, 0x00004000, 0x20400000, 0x00404010, + 0x00004000, 0x00400010, 0x20004010, 0x00000000, + 0x20404000, 0x20000000, 0x00400010, 0x20004010 +}; + +static const uint32_t SB7[64] = +{ + 0x00200000, 0x04200002, 0x04000802, 0x00000000, + 0x00000800, 0x04000802, 0x00200802, 0x04200800, + 0x04200802, 0x00200000, 0x00000000, 0x04000002, + 0x00000002, 0x04000000, 0x04200002, 0x00000802, + 0x04000800, 0x00200802, 0x00200002, 0x04000800, + 0x04000002, 0x04200000, 0x04200800, 0x00200002, + 0x04200000, 0x00000800, 0x00000802, 0x04200802, + 0x00200800, 0x00000002, 0x04000000, 0x00200800, + 0x04000000, 0x00200800, 0x00200000, 0x04000802, + 0x04000802, 0x04200002, 0x04200002, 0x00000002, + 0x00200002, 0x04000000, 0x04000800, 0x00200000, + 0x04200800, 0x00000802, 0x00200802, 0x04200800, + 0x00000802, 0x04000002, 0x04200802, 0x04200000, + 0x00200800, 0x00000000, 0x00000002, 0x04200802, + 0x00000000, 0x00200802, 0x04200000, 0x00000800, + 0x04000002, 0x04000800, 0x00000800, 0x00200002 +}; + +static const uint32_t SB8[64] = +{ + 0x10001040, 0x00001000, 0x00040000, 0x10041040, + 0x10000000, 0x10001040, 0x00000040, 0x10000000, + 0x00040040, 0x10040000, 0x10041040, 0x00041000, + 0x10041000, 0x00041040, 0x00001000, 0x00000040, + 0x10040000, 0x10000040, 0x10001000, 0x00001040, + 0x00041000, 0x00040040, 0x10040040, 0x10041000, + 0x00001040, 0x00000000, 0x00000000, 0x10040040, + 0x10000040, 0x10001000, 0x00041040, 0x00040000, + 0x00041040, 0x00040000, 0x10041000, 0x00001000, + 0x00000040, 0x10040040, 0x00001000, 0x00041040, + 0x10001000, 0x00000040, 0x10000040, 0x10040000, + 0x10040040, 0x10000000, 0x00040000, 0x10001040, + 0x00000000, 0x10041040, 0x00040040, 0x10000040, + 0x10040000, 0x10001000, 0x10001040, 0x00000000, + 0x10041040, 0x00041000, 0x00041000, 0x00001040, + 0x00001040, 0x00040040, 0x10000000, 0x10041000 +}; + +/* + * PC1: left and right halves bit-swap + */ +static const uint32_t LHs[16] = +{ + 0x00000000, 0x00000001, 0x00000100, 0x00000101, + 0x00010000, 0x00010001, 0x00010100, 0x00010101, + 0x01000000, 0x01000001, 0x01000100, 0x01000101, + 0x01010000, 0x01010001, 0x01010100, 0x01010101 +}; + +static const uint32_t RHs[16] = +{ + 0x00000000, 0x01000000, 0x00010000, 0x01010000, + 0x00000100, 0x01000100, 0x00010100, 0x01010100, + 0x00000001, 0x01000001, 0x00010001, 0x01010001, + 0x00000101, 0x01000101, 0x00010101, 0x01010101, +}; + +/* + * Initial Permutation macro + */ +#define DES_IP(X,Y) \ +{ \ + T = ((X >> 4) ^ Y) & 0x0F0F0F0F; Y ^= T; X ^= (T << 4); \ + T = ((X >> 16) ^ Y) & 0x0000FFFF; Y ^= T; X ^= (T << 16); \ + T = ((Y >> 2) ^ X) & 0x33333333; X ^= T; Y ^= (T << 2); \ + T = ((Y >> 8) ^ X) & 0x00FF00FF; X ^= T; Y ^= (T << 8); \ + Y = ((Y << 1) | (Y >> 31)) & 0xFFFFFFFF; \ + T = (X ^ Y) & 0xAAAAAAAA; Y ^= T; X ^= T; \ + X = ((X << 1) | (X >> 31)) & 0xFFFFFFFF; \ +} + +/* + * Final Permutation macro + */ +#define DES_FP(X,Y) \ +{ \ + X = ((X << 31) | (X >> 1)) & 0xFFFFFFFF; \ + T = (X ^ Y) & 0xAAAAAAAA; X ^= T; Y ^= T; \ + Y = ((Y << 31) | (Y >> 1)) & 0xFFFFFFFF; \ + T = ((Y >> 8) ^ X) & 0x00FF00FF; X ^= T; Y ^= (T << 8); \ + T = ((Y >> 2) ^ X) & 0x33333333; X ^= T; Y ^= (T << 2); \ + T = ((X >> 16) ^ Y) & 0x0000FFFF; Y ^= T; X ^= (T << 16); \ + T = ((X >> 4) ^ Y) & 0x0F0F0F0F; Y ^= T; X ^= (T << 4); \ +} + +/* + * DES round macro + */ +#define DES_ROUND(X,Y) \ +{ \ + T = *SK++ ^ X; \ + Y ^= SB8[ (T ) & 0x3F ] ^ \ + SB6[ (T >> 8) & 0x3F ] ^ \ + SB4[ (T >> 16) & 0x3F ] ^ \ + SB2[ (T >> 24) & 0x3F ]; \ + \ + T = *SK++ ^ ((X << 28) | (X >> 4)); \ + Y ^= SB7[ (T ) & 0x3F ] ^ \ + SB5[ (T >> 8) & 0x3F ] ^ \ + SB3[ (T >> 16) & 0x3F ] ^ \ + SB1[ (T >> 24) & 0x3F ]; \ +} + +#define SWAP(a,b) { uint32_t t = a; a = b; b = t; t = 0; } + +void mbedtls_des_init( mbedtls_des_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_des_context ) ); +} + +void mbedtls_des_free( mbedtls_des_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_des_context ) ); +} + +void mbedtls_des3_init( mbedtls_des3_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_des3_context ) ); +} + +void mbedtls_des3_free( mbedtls_des3_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_des3_context ) ); +} + +static const unsigned char odd_parity_table[128] = { 1, 2, 4, 7, 8, + 11, 13, 14, 16, 19, 21, 22, 25, 26, 28, 31, 32, 35, 37, 38, 41, 42, 44, + 47, 49, 50, 52, 55, 56, 59, 61, 62, 64, 67, 69, 70, 73, 74, 76, 79, 81, + 82, 84, 87, 88, 91, 93, 94, 97, 98, 100, 103, 104, 107, 109, 110, 112, + 115, 117, 118, 121, 122, 124, 127, 128, 131, 133, 134, 137, 138, 140, + 143, 145, 146, 148, 151, 152, 155, 157, 158, 161, 162, 164, 167, 168, + 171, 173, 174, 176, 179, 181, 182, 185, 186, 188, 191, 193, 194, 196, + 199, 200, 203, 205, 206, 208, 211, 213, 214, 217, 218, 220, 223, 224, + 227, 229, 230, 233, 234, 236, 239, 241, 242, 244, 247, 248, 251, 253, + 254 }; + +void mbedtls_des_key_set_parity( unsigned char key[MBEDTLS_DES_KEY_SIZE] ) +{ + int i; + + for( i = 0; i < MBEDTLS_DES_KEY_SIZE; i++ ) + key[i] = odd_parity_table[key[i] / 2]; +} + +/* + * Check the given key's parity, returns 1 on failure, 0 on SUCCESS + */ +int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SIZE] ) +{ + int i; + + for( i = 0; i < MBEDTLS_DES_KEY_SIZE; i++ ) + if( key[i] != odd_parity_table[key[i] / 2] ) + return( 1 ); + + return( 0 ); +} + +/* + * Table of weak and semi-weak keys + * + * Source: http://en.wikipedia.org/wiki/Weak_key + * + * Weak: + * Alternating ones + zeros (0x0101010101010101) + * Alternating 'F' + 'E' (0xFEFEFEFEFEFEFEFE) + * '0xE0E0E0E0F1F1F1F1' + * '0x1F1F1F1F0E0E0E0E' + * + * Semi-weak: + * 0x011F011F010E010E and 0x1F011F010E010E01 + * 0x01E001E001F101F1 and 0xE001E001F101F101 + * 0x01FE01FE01FE01FE and 0xFE01FE01FE01FE01 + * 0x1FE01FE00EF10EF1 and 0xE01FE01FF10EF10E + * 0x1FFE1FFE0EFE0EFE and 0xFE1FFE1FFE0EFE0E + * 0xE0FEE0FEF1FEF1FE and 0xFEE0FEE0FEF1FEF1 + * + */ + +#define WEAK_KEY_COUNT 16 + +static const unsigned char weak_key_table[WEAK_KEY_COUNT][MBEDTLS_DES_KEY_SIZE] = +{ + { 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 }, + { 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE }, + { 0x1F, 0x1F, 0x1F, 0x1F, 0x0E, 0x0E, 0x0E, 0x0E }, + { 0xE0, 0xE0, 0xE0, 0xE0, 0xF1, 0xF1, 0xF1, 0xF1 }, + + { 0x01, 0x1F, 0x01, 0x1F, 0x01, 0x0E, 0x01, 0x0E }, + { 0x1F, 0x01, 0x1F, 0x01, 0x0E, 0x01, 0x0E, 0x01 }, + { 0x01, 0xE0, 0x01, 0xE0, 0x01, 0xF1, 0x01, 0xF1 }, + { 0xE0, 0x01, 0xE0, 0x01, 0xF1, 0x01, 0xF1, 0x01 }, + { 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE }, + { 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01 }, + { 0x1F, 0xE0, 0x1F, 0xE0, 0x0E, 0xF1, 0x0E, 0xF1 }, + { 0xE0, 0x1F, 0xE0, 0x1F, 0xF1, 0x0E, 0xF1, 0x0E }, + { 0x1F, 0xFE, 0x1F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE }, + { 0xFE, 0x1F, 0xFE, 0x1F, 0xFE, 0x0E, 0xFE, 0x0E }, + { 0xE0, 0xFE, 0xE0, 0xFE, 0xF1, 0xFE, 0xF1, 0xFE }, + { 0xFE, 0xE0, 0xFE, 0xE0, 0xFE, 0xF1, 0xFE, 0xF1 } +}; + +int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] ) +{ + int i; + + for( i = 0; i < WEAK_KEY_COUNT; i++ ) + if( memcmp( weak_key_table[i], key, MBEDTLS_DES_KEY_SIZE) == 0 ) + return( 1 ); + + return( 0 ); +} + +#if !defined(MBEDTLS_DES_SETKEY_ALT) +void mbedtls_des_setkey( uint32_t SK[32], const unsigned char key[MBEDTLS_DES_KEY_SIZE] ) +{ + int i; + uint32_t X, Y, T; + + GET_UINT32_BE( X, key, 0 ); + GET_UINT32_BE( Y, key, 4 ); + + /* + * Permuted Choice 1 + */ + T = ((Y >> 4) ^ X) & 0x0F0F0F0F; X ^= T; Y ^= (T << 4); + T = ((Y ) ^ X) & 0x10101010; X ^= T; Y ^= (T ); + + X = (LHs[ (X ) & 0xF] << 3) | (LHs[ (X >> 8) & 0xF ] << 2) + | (LHs[ (X >> 16) & 0xF] << 1) | (LHs[ (X >> 24) & 0xF ] ) + | (LHs[ (X >> 5) & 0xF] << 7) | (LHs[ (X >> 13) & 0xF ] << 6) + | (LHs[ (X >> 21) & 0xF] << 5) | (LHs[ (X >> 29) & 0xF ] << 4); + + Y = (RHs[ (Y >> 1) & 0xF] << 3) | (RHs[ (Y >> 9) & 0xF ] << 2) + | (RHs[ (Y >> 17) & 0xF] << 1) | (RHs[ (Y >> 25) & 0xF ] ) + | (RHs[ (Y >> 4) & 0xF] << 7) | (RHs[ (Y >> 12) & 0xF ] << 6) + | (RHs[ (Y >> 20) & 0xF] << 5) | (RHs[ (Y >> 28) & 0xF ] << 4); + + X &= 0x0FFFFFFF; + Y &= 0x0FFFFFFF; + + /* + * calculate subkeys + */ + for( i = 0; i < 16; i++ ) + { + if( i < 2 || i == 8 || i == 15 ) + { + X = ((X << 1) | (X >> 27)) & 0x0FFFFFFF; + Y = ((Y << 1) | (Y >> 27)) & 0x0FFFFFFF; + } + else + { + X = ((X << 2) | (X >> 26)) & 0x0FFFFFFF; + Y = ((Y << 2) | (Y >> 26)) & 0x0FFFFFFF; + } + + *SK++ = ((X << 4) & 0x24000000) | ((X << 28) & 0x10000000) + | ((X << 14) & 0x08000000) | ((X << 18) & 0x02080000) + | ((X << 6) & 0x01000000) | ((X << 9) & 0x00200000) + | ((X >> 1) & 0x00100000) | ((X << 10) & 0x00040000) + | ((X << 2) & 0x00020000) | ((X >> 10) & 0x00010000) + | ((Y >> 13) & 0x00002000) | ((Y >> 4) & 0x00001000) + | ((Y << 6) & 0x00000800) | ((Y >> 1) & 0x00000400) + | ((Y >> 14) & 0x00000200) | ((Y ) & 0x00000100) + | ((Y >> 5) & 0x00000020) | ((Y >> 10) & 0x00000010) + | ((Y >> 3) & 0x00000008) | ((Y >> 18) & 0x00000004) + | ((Y >> 26) & 0x00000002) | ((Y >> 24) & 0x00000001); + + *SK++ = ((X << 15) & 0x20000000) | ((X << 17) & 0x10000000) + | ((X << 10) & 0x08000000) | ((X << 22) & 0x04000000) + | ((X >> 2) & 0x02000000) | ((X << 1) & 0x01000000) + | ((X << 16) & 0x00200000) | ((X << 11) & 0x00100000) + | ((X << 3) & 0x00080000) | ((X >> 6) & 0x00040000) + | ((X << 15) & 0x00020000) | ((X >> 4) & 0x00010000) + | ((Y >> 2) & 0x00002000) | ((Y << 8) & 0x00001000) + | ((Y >> 14) & 0x00000808) | ((Y >> 9) & 0x00000400) + | ((Y ) & 0x00000200) | ((Y << 7) & 0x00000100) + | ((Y >> 7) & 0x00000020) | ((Y >> 3) & 0x00000011) + | ((Y << 2) & 0x00000004) | ((Y >> 21) & 0x00000002); + } +} +#endif /* !MBEDTLS_DES_SETKEY_ALT */ + +/* + * DES key schedule (56-bit, encryption) + */ +int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] ) +{ + mbedtls_des_setkey( ctx->sk, key ); + + return( 0 ); +} + +/* + * DES key schedule (56-bit, decryption) + */ +int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] ) +{ + int i; + + mbedtls_des_setkey( ctx->sk, key ); + + for( i = 0; i < 16; i += 2 ) + { + SWAP( ctx->sk[i ], ctx->sk[30 - i] ); + SWAP( ctx->sk[i + 1], ctx->sk[31 - i] ); + } + + return( 0 ); +} + +static void des3_set2key( uint32_t esk[96], + uint32_t dsk[96], + const unsigned char key[MBEDTLS_DES_KEY_SIZE*2] ) +{ + int i; + + mbedtls_des_setkey( esk, key ); + mbedtls_des_setkey( dsk + 32, key + 8 ); + + for( i = 0; i < 32; i += 2 ) + { + dsk[i ] = esk[30 - i]; + dsk[i + 1] = esk[31 - i]; + + esk[i + 32] = dsk[62 - i]; + esk[i + 33] = dsk[63 - i]; + + esk[i + 64] = esk[i ]; + esk[i + 65] = esk[i + 1]; + + dsk[i + 64] = dsk[i ]; + dsk[i + 65] = dsk[i + 1]; + } +} + +/* + * Triple-DES key schedule (112-bit, encryption) + */ +int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] ) +{ + uint32_t sk[96]; + + des3_set2key( ctx->sk, sk, key ); + mbedtls_zeroize( sk, sizeof( sk ) ); + + return( 0 ); +} + +/* + * Triple-DES key schedule (112-bit, decryption) + */ +int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] ) +{ + uint32_t sk[96]; + + des3_set2key( sk, ctx->sk, key ); + mbedtls_zeroize( sk, sizeof( sk ) ); + + return( 0 ); +} + +static void des3_set3key( uint32_t esk[96], + uint32_t dsk[96], + const unsigned char key[24] ) +{ + int i; + + mbedtls_des_setkey( esk, key ); + mbedtls_des_setkey( dsk + 32, key + 8 ); + mbedtls_des_setkey( esk + 64, key + 16 ); + + for( i = 0; i < 32; i += 2 ) + { + dsk[i ] = esk[94 - i]; + dsk[i + 1] = esk[95 - i]; + + esk[i + 32] = dsk[62 - i]; + esk[i + 33] = dsk[63 - i]; + + dsk[i + 64] = esk[30 - i]; + dsk[i + 65] = esk[31 - i]; + } +} + +/* + * Triple-DES key schedule (168-bit, encryption) + */ +int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] ) +{ + uint32_t sk[96]; + + des3_set3key( ctx->sk, sk, key ); + mbedtls_zeroize( sk, sizeof( sk ) ); + + return( 0 ); +} + +/* + * Triple-DES key schedule (168-bit, decryption) + */ +int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx, + const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] ) +{ + uint32_t sk[96]; + + des3_set3key( sk, ctx->sk, key ); + mbedtls_zeroize( sk, sizeof( sk ) ); + + return( 0 ); +} + +/* + * DES-ECB block encryption/decryption + */ +#if !defined(MBEDTLS_DES_CRYPT_ECB_ALT) +int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx, + const unsigned char input[8], + unsigned char output[8] ) +{ + int i; + uint32_t X, Y, T, *SK; + + SK = ctx->sk; + + GET_UINT32_BE( X, input, 0 ); + GET_UINT32_BE( Y, input, 4 ); + + DES_IP( X, Y ); + + for( i = 0; i < 8; i++ ) + { + DES_ROUND( Y, X ); + DES_ROUND( X, Y ); + } + + DES_FP( Y, X ); + + PUT_UINT32_BE( Y, output, 0 ); + PUT_UINT32_BE( X, output, 4 ); + + return( 0 ); +} +#endif /* !MBEDTLS_DES_CRYPT_ECB_ALT */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/* + * DES-CBC buffer encryption/decryption + */ +int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx, + int mode, + size_t length, + unsigned char iv[8], + const unsigned char *input, + unsigned char *output ) +{ + int i; + unsigned char temp[8]; + + if( length % 8 ) + return( MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH ); + + if( mode == MBEDTLS_DES_ENCRYPT ) + { + while( length > 0 ) + { + for( i = 0; i < 8; i++ ) + output[i] = (unsigned char)( input[i] ^ iv[i] ); + + mbedtls_des_crypt_ecb( ctx, output, output ); + memcpy( iv, output, 8 ); + + input += 8; + output += 8; + length -= 8; + } + } + else /* MBEDTLS_DES_DECRYPT */ + { + while( length > 0 ) + { + memcpy( temp, input, 8 ); + mbedtls_des_crypt_ecb( ctx, input, output ); + + for( i = 0; i < 8; i++ ) + output[i] = (unsigned char)( output[i] ^ iv[i] ); + + memcpy( iv, temp, 8 ); + + input += 8; + output += 8; + length -= 8; + } + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +/* + * 3DES-ECB block encryption/decryption + */ +#if !defined(MBEDTLS_DES3_CRYPT_ECB_ALT) +int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx, + const unsigned char input[8], + unsigned char output[8] ) +{ + int i; + uint32_t X, Y, T, *SK; + + SK = ctx->sk; + + GET_UINT32_BE( X, input, 0 ); + GET_UINT32_BE( Y, input, 4 ); + + DES_IP( X, Y ); + + for( i = 0; i < 8; i++ ) + { + DES_ROUND( Y, X ); + DES_ROUND( X, Y ); + } + + for( i = 0; i < 8; i++ ) + { + DES_ROUND( X, Y ); + DES_ROUND( Y, X ); + } + + for( i = 0; i < 8; i++ ) + { + DES_ROUND( Y, X ); + DES_ROUND( X, Y ); + } + + DES_FP( Y, X ); + + PUT_UINT32_BE( Y, output, 0 ); + PUT_UINT32_BE( X, output, 4 ); + + return( 0 ); +} +#endif /* !MBEDTLS_DES3_CRYPT_ECB_ALT */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/* + * 3DES-CBC buffer encryption/decryption + */ +int mbedtls_des3_crypt_cbc( mbedtls_des3_context *ctx, + int mode, + size_t length, + unsigned char iv[8], + const unsigned char *input, + unsigned char *output ) +{ + int i; + unsigned char temp[8]; + + if( length % 8 ) + return( MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH ); + + if( mode == MBEDTLS_DES_ENCRYPT ) + { + while( length > 0 ) + { + for( i = 0; i < 8; i++ ) + output[i] = (unsigned char)( input[i] ^ iv[i] ); + + mbedtls_des3_crypt_ecb( ctx, output, output ); + memcpy( iv, output, 8 ); + + input += 8; + output += 8; + length -= 8; + } + } + else /* MBEDTLS_DES_DECRYPT */ + { + while( length > 0 ) + { + memcpy( temp, input, 8 ); + mbedtls_des3_crypt_ecb( ctx, input, output ); + + for( i = 0; i < 8; i++ ) + output[i] = (unsigned char)( output[i] ^ iv[i] ); + + memcpy( iv, temp, 8 ); + + input += 8; + output += 8; + length -= 8; + } + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#endif /* !MBEDTLS_DES_ALT */ + +#if defined(MBEDTLS_SELF_TEST) +/* + * DES and 3DES test vectors from: + * + * http://csrc.nist.gov/groups/STM/cavp/documents/des/tripledes-vectors.zip + */ +static const unsigned char des3_test_keys[24] = +{ + 0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, + 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, 0x01, + 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, 0x01, 0x23 +}; + +static const unsigned char des3_test_buf[8] = +{ + 0x4E, 0x6F, 0x77, 0x20, 0x69, 0x73, 0x20, 0x74 +}; + +static const unsigned char des3_test_ecb_dec[3][8] = +{ + { 0xCD, 0xD6, 0x4F, 0x2F, 0x94, 0x27, 0xC1, 0x5D }, + { 0x69, 0x96, 0xC8, 0xFA, 0x47, 0xA2, 0xAB, 0xEB }, + { 0x83, 0x25, 0x39, 0x76, 0x44, 0x09, 0x1A, 0x0A } +}; + +static const unsigned char des3_test_ecb_enc[3][8] = +{ + { 0x6A, 0x2A, 0x19, 0xF4, 0x1E, 0xCA, 0x85, 0x4B }, + { 0x03, 0xE6, 0x9F, 0x5B, 0xFA, 0x58, 0xEB, 0x42 }, + { 0xDD, 0x17, 0xE8, 0xB8, 0xB4, 0x37, 0xD2, 0x32 } +}; + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +static const unsigned char des3_test_iv[8] = +{ + 0x12, 0x34, 0x56, 0x78, 0x90, 0xAB, 0xCD, 0xEF, +}; + +static const unsigned char des3_test_cbc_dec[3][8] = +{ + { 0x12, 0x9F, 0x40, 0xB9, 0xD2, 0x00, 0x56, 0xB3 }, + { 0x47, 0x0E, 0xFC, 0x9A, 0x6B, 0x8E, 0xE3, 0x93 }, + { 0xC5, 0xCE, 0xCF, 0x63, 0xEC, 0xEC, 0x51, 0x4C } +}; + +static const unsigned char des3_test_cbc_enc[3][8] = +{ + { 0x54, 0xF1, 0x5A, 0xF6, 0xEB, 0xE3, 0xA4, 0xB4 }, + { 0x35, 0x76, 0x11, 0x56, 0x5F, 0xA1, 0x8E, 0x4D }, + { 0xCB, 0x19, 0x1F, 0x85, 0xD1, 0xED, 0x84, 0x39 } +}; +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +/* + * Checkup routine + */ +int mbedtls_des_self_test( int verbose ) +{ + int i, j, u, v, ret = 0; + mbedtls_des_context ctx; + mbedtls_des3_context ctx3; + unsigned char buf[8]; +#if defined(MBEDTLS_CIPHER_MODE_CBC) + unsigned char prv[8]; + unsigned char iv[8]; +#endif + + mbedtls_des_init( &ctx ); + mbedtls_des3_init( &ctx3 ); + /* + * ECB mode + */ + for( i = 0; i < 6; i++ ) + { + u = i >> 1; + v = i & 1; + + if( verbose != 0 ) + mbedtls_printf( " DES%c-ECB-%3d (%s): ", + ( u == 0 ) ? ' ' : '3', 56 + u * 56, + ( v == MBEDTLS_DES_DECRYPT ) ? "dec" : "enc" ); + + memcpy( buf, des3_test_buf, 8 ); + + switch( i ) + { + case 0: + mbedtls_des_setkey_dec( &ctx, des3_test_keys ); + break; + + case 1: + mbedtls_des_setkey_enc( &ctx, des3_test_keys ); + break; + + case 2: + mbedtls_des3_set2key_dec( &ctx3, des3_test_keys ); + break; + + case 3: + mbedtls_des3_set2key_enc( &ctx3, des3_test_keys ); + break; + + case 4: + mbedtls_des3_set3key_dec( &ctx3, des3_test_keys ); + break; + + case 5: + mbedtls_des3_set3key_enc( &ctx3, des3_test_keys ); + break; + + default: + return( 1 ); + } + + for( j = 0; j < 10000; j++ ) + { + if( u == 0 ) + mbedtls_des_crypt_ecb( &ctx, buf, buf ); + else + mbedtls_des3_crypt_ecb( &ctx3, buf, buf ); + } + + if( ( v == MBEDTLS_DES_DECRYPT && + memcmp( buf, des3_test_ecb_dec[u], 8 ) != 0 ) || + ( v != MBEDTLS_DES_DECRYPT && + memcmp( buf, des3_test_ecb_enc[u], 8 ) != 0 ) ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + /* + * CBC mode + */ + for( i = 0; i < 6; i++ ) + { + u = i >> 1; + v = i & 1; + + if( verbose != 0 ) + mbedtls_printf( " DES%c-CBC-%3d (%s): ", + ( u == 0 ) ? ' ' : '3', 56 + u * 56, + ( v == MBEDTLS_DES_DECRYPT ) ? "dec" : "enc" ); + + memcpy( iv, des3_test_iv, 8 ); + memcpy( prv, des3_test_iv, 8 ); + memcpy( buf, des3_test_buf, 8 ); + + switch( i ) + { + case 0: + mbedtls_des_setkey_dec( &ctx, des3_test_keys ); + break; + + case 1: + mbedtls_des_setkey_enc( &ctx, des3_test_keys ); + break; + + case 2: + mbedtls_des3_set2key_dec( &ctx3, des3_test_keys ); + break; + + case 3: + mbedtls_des3_set2key_enc( &ctx3, des3_test_keys ); + break; + + case 4: + mbedtls_des3_set3key_dec( &ctx3, des3_test_keys ); + break; + + case 5: + mbedtls_des3_set3key_enc( &ctx3, des3_test_keys ); + break; + + default: + return( 1 ); + } + + if( v == MBEDTLS_DES_DECRYPT ) + { + for( j = 0; j < 10000; j++ ) + { + if( u == 0 ) + mbedtls_des_crypt_cbc( &ctx, v, 8, iv, buf, buf ); + else + mbedtls_des3_crypt_cbc( &ctx3, v, 8, iv, buf, buf ); + } + } + else + { + for( j = 0; j < 10000; j++ ) + { + unsigned char tmp[8]; + + if( u == 0 ) + mbedtls_des_crypt_cbc( &ctx, v, 8, iv, buf, buf ); + else + mbedtls_des3_crypt_cbc( &ctx3, v, 8, iv, buf, buf ); + + memcpy( tmp, prv, 8 ); + memcpy( prv, buf, 8 ); + memcpy( buf, tmp, 8 ); + } + + memcpy( buf, prv, 8 ); + } + + if( ( v == MBEDTLS_DES_DECRYPT && + memcmp( buf, des3_test_cbc_dec[u], 8 ) != 0 ) || + ( v != MBEDTLS_DES_DECRYPT && + memcmp( buf, des3_test_cbc_enc[u], 8 ) != 0 ) ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +exit: + mbedtls_des_free( &ctx ); + mbedtls_des3_free( &ctx3 ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_DES_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/dhm.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/dhm.c new file mode 100644 index 0000000..0f4d316 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/dhm.c @@ -0,0 +1,624 @@ +/* + * Diffie-Hellman-Merkle key exchange + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * Reference: + * + * http://www.cacr.math.uwaterloo.ca/hac/ (chapter 12) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_DHM_C) + +#include "mbedtls/dhm.h" + +#include + +#if defined(MBEDTLS_PEM_PARSE_C) +#include "mbedtls/pem.h" +#endif + +#if defined(MBEDTLS_ASN1_PARSE_C) +#include "mbedtls/asn1.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#include +#define mbedtls_printf printf +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * helper to validate the mbedtls_mpi size and import it + */ +static int dhm_read_bignum( mbedtls_mpi *X, + unsigned char **p, + const unsigned char *end ) +{ + int ret, n; + + if( end - *p < 2 ) + return( MBEDTLS_ERR_DHM_BAD_INPUT_DATA ); + + n = ( (*p)[0] << 8 ) | (*p)[1]; + (*p) += 2; + + if( (int)( end - *p ) < n ) + return( MBEDTLS_ERR_DHM_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_mpi_read_binary( X, *p, n ) ) != 0 ) + return( MBEDTLS_ERR_DHM_READ_PARAMS_FAILED + ret ); + + (*p) += n; + + return( 0 ); +} + +/* + * Verify sanity of parameter with regards to P + * + * Parameter should be: 2 <= public_param <= P - 2 + * + * For more information on the attack, see: + * http://www.cl.cam.ac.uk/~rja14/Papers/psandqs.pdf + * http://web.nvd.nist.gov/view/vuln/detail?vulnId=CVE-2005-2643 + */ +static int dhm_check_range( const mbedtls_mpi *param, const mbedtls_mpi *P ) +{ + mbedtls_mpi L, U; + int ret = MBEDTLS_ERR_DHM_BAD_INPUT_DATA; + + mbedtls_mpi_init( &L ); mbedtls_mpi_init( &U ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &L, 2 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &U, P, 2 ) ); + + if( mbedtls_mpi_cmp_mpi( param, &L ) >= 0 && + mbedtls_mpi_cmp_mpi( param, &U ) <= 0 ) + { + ret = 0; + } + +cleanup: + mbedtls_mpi_free( &L ); mbedtls_mpi_free( &U ); + return( ret ); +} + +void mbedtls_dhm_init( mbedtls_dhm_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_dhm_context ) ); +} + +/* + * Parse the ServerKeyExchange parameters + */ +int mbedtls_dhm_read_params( mbedtls_dhm_context *ctx, + unsigned char **p, + const unsigned char *end ) +{ + int ret; + + if( ( ret = dhm_read_bignum( &ctx->P, p, end ) ) != 0 || + ( ret = dhm_read_bignum( &ctx->G, p, end ) ) != 0 || + ( ret = dhm_read_bignum( &ctx->GY, p, end ) ) != 0 ) + return( ret ); + + if( ( ret = dhm_check_range( &ctx->GY, &ctx->P ) ) != 0 ) + return( ret ); + + ctx->len = mbedtls_mpi_size( &ctx->P ); + + return( 0 ); +} + +/* + * Setup and write the ServerKeyExchange parameters + */ +int mbedtls_dhm_make_params( mbedtls_dhm_context *ctx, int x_size, + unsigned char *output, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret, count = 0; + size_t n1, n2, n3; + unsigned char *p; + + if( mbedtls_mpi_cmp_int( &ctx->P, 0 ) == 0 ) + return( MBEDTLS_ERR_DHM_BAD_INPUT_DATA ); + + /* + * Generate X as large as possible ( < P ) + */ + do + { + mbedtls_mpi_fill_random( &ctx->X, x_size, f_rng, p_rng ); + + while( mbedtls_mpi_cmp_mpi( &ctx->X, &ctx->P ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &ctx->X, 1 ) ); + + if( count++ > 10 ) + return( MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED ); + } + while( dhm_check_range( &ctx->X, &ctx->P ) != 0 ); + + /* + * Calculate GX = G^X mod P + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &ctx->GX, &ctx->G, &ctx->X, + &ctx->P , &ctx->RP ) ); + + if( ( ret = dhm_check_range( &ctx->GX, &ctx->P ) ) != 0 ) + return( ret ); + + /* + * export P, G, GX + */ +#define DHM_MPI_EXPORT(X,n) \ + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( X, p + 2, n ) ); \ + *p++ = (unsigned char)( n >> 8 ); \ + *p++ = (unsigned char)( n ); p += n; + + n1 = mbedtls_mpi_size( &ctx->P ); + n2 = mbedtls_mpi_size( &ctx->G ); + n3 = mbedtls_mpi_size( &ctx->GX ); + + p = output; + DHM_MPI_EXPORT( &ctx->P , n1 ); + DHM_MPI_EXPORT( &ctx->G , n2 ); + DHM_MPI_EXPORT( &ctx->GX, n3 ); + + *olen = p - output; + + ctx->len = n1; + +cleanup: + + if( ret != 0 ) + return( MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED + ret ); + + return( 0 ); +} + +/* + * Import the peer's public value G^Y + */ +int mbedtls_dhm_read_public( mbedtls_dhm_context *ctx, + const unsigned char *input, size_t ilen ) +{ + int ret; + + if( ctx == NULL || ilen < 1 || ilen > ctx->len ) + return( MBEDTLS_ERR_DHM_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_mpi_read_binary( &ctx->GY, input, ilen ) ) != 0 ) + return( MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED + ret ); + + return( 0 ); +} + +/* + * Create own private value X and export G^X + */ +int mbedtls_dhm_make_public( mbedtls_dhm_context *ctx, int x_size, + unsigned char *output, size_t olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret, count = 0; + + if( ctx == NULL || olen < 1 || olen > ctx->len ) + return( MBEDTLS_ERR_DHM_BAD_INPUT_DATA ); + + if( mbedtls_mpi_cmp_int( &ctx->P, 0 ) == 0 ) + return( MBEDTLS_ERR_DHM_BAD_INPUT_DATA ); + + /* + * generate X and calculate GX = G^X mod P + */ + do + { + mbedtls_mpi_fill_random( &ctx->X, x_size, f_rng, p_rng ); + + while( mbedtls_mpi_cmp_mpi( &ctx->X, &ctx->P ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &ctx->X, 1 ) ); + + if( count++ > 10 ) + return( MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED ); + } + while( dhm_check_range( &ctx->X, &ctx->P ) != 0 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &ctx->GX, &ctx->G, &ctx->X, + &ctx->P , &ctx->RP ) ); + + if( ( ret = dhm_check_range( &ctx->GX, &ctx->P ) ) != 0 ) + return( ret ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &ctx->GX, output, olen ) ); + +cleanup: + + if( ret != 0 ) + return( MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED + ret ); + + return( 0 ); +} + +/* + * Use the blinding method and optimisation suggested in section 10 of: + * KOCHER, Paul C. Timing attacks on implementations of Diffie-Hellman, RSA, + * DSS, and other systems. In : Advances in Cryptology-CRYPTO'96. Springer + * Berlin Heidelberg, 1996. p. 104-113. + */ +static int dhm_update_blinding( mbedtls_dhm_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret, count; + + /* + * Don't use any blinding the first time a particular X is used, + * but remember it to use blinding next time. + */ + if( mbedtls_mpi_cmp_mpi( &ctx->X, &ctx->pX ) != 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &ctx->pX, &ctx->X ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &ctx->Vi, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &ctx->Vf, 1 ) ); + + return( 0 ); + } + + /* + * Ok, we need blinding. Can we re-use existing values? + * If yes, just update them by squaring them. + */ + if( mbedtls_mpi_cmp_int( &ctx->Vi, 1 ) != 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vi, &ctx->Vi, &ctx->Vi ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vi, &ctx->Vi, &ctx->P ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vf, &ctx->Vf, &ctx->Vf ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vf, &ctx->Vf, &ctx->P ) ); + + return( 0 ); + } + + /* + * We need to generate blinding values from scratch + */ + + /* Vi = random( 2, P-1 ) */ + count = 0; + do + { + mbedtls_mpi_fill_random( &ctx->Vi, mbedtls_mpi_size( &ctx->P ), f_rng, p_rng ); + + while( mbedtls_mpi_cmp_mpi( &ctx->Vi, &ctx->P ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &ctx->Vi, 1 ) ); + + if( count++ > 10 ) + return( MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ); + } + while( mbedtls_mpi_cmp_int( &ctx->Vi, 1 ) <= 0 ); + + /* Vf = Vi^-X mod P */ + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &ctx->Vf, &ctx->Vi, &ctx->P ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &ctx->Vf, &ctx->Vf, &ctx->X, &ctx->P, &ctx->RP ) ); + +cleanup: + return( ret ); +} + +/* + * Derive and export the shared secret (G^Y)^X mod P + */ +int mbedtls_dhm_calc_secret( mbedtls_dhm_context *ctx, + unsigned char *output, size_t output_size, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_mpi GYb; + + if( ctx == NULL || output_size < ctx->len ) + return( MBEDTLS_ERR_DHM_BAD_INPUT_DATA ); + + if( ( ret = dhm_check_range( &ctx->GY, &ctx->P ) ) != 0 ) + return( ret ); + + mbedtls_mpi_init( &GYb ); + + /* Blind peer's value */ + if( f_rng != NULL ) + { + MBEDTLS_MPI_CHK( dhm_update_blinding( ctx, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &GYb, &ctx->GY, &ctx->Vi ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &GYb, &GYb, &ctx->P ) ); + } + else + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &GYb, &ctx->GY ) ); + + /* Do modular exponentiation */ + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &ctx->K, &GYb, &ctx->X, + &ctx->P, &ctx->RP ) ); + + /* Unblind secret value */ + if( f_rng != NULL ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->K, &ctx->K, &ctx->Vf ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->K, &ctx->K, &ctx->P ) ); + } + + *olen = mbedtls_mpi_size( &ctx->K ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &ctx->K, output, *olen ) ); + +cleanup: + mbedtls_mpi_free( &GYb ); + + if( ret != 0 ) + return( MBEDTLS_ERR_DHM_CALC_SECRET_FAILED + ret ); + + return( 0 ); +} + +/* + * Free the components of a DHM key + */ +void mbedtls_dhm_free( mbedtls_dhm_context *ctx ) +{ + mbedtls_mpi_free( &ctx->pX); mbedtls_mpi_free( &ctx->Vf ); mbedtls_mpi_free( &ctx->Vi ); + mbedtls_mpi_free( &ctx->RP ); mbedtls_mpi_free( &ctx->K ); mbedtls_mpi_free( &ctx->GY ); + mbedtls_mpi_free( &ctx->GX ); mbedtls_mpi_free( &ctx->X ); mbedtls_mpi_free( &ctx->G ); + mbedtls_mpi_free( &ctx->P ); + + mbedtls_zeroize( ctx, sizeof( mbedtls_dhm_context ) ); +} + +#if defined(MBEDTLS_ASN1_PARSE_C) +/* + * Parse DHM parameters + */ +int mbedtls_dhm_parse_dhm( mbedtls_dhm_context *dhm, const unsigned char *dhmin, + size_t dhminlen ) +{ + int ret; + size_t len; + unsigned char *p, *end; +#if defined(MBEDTLS_PEM_PARSE_C) + mbedtls_pem_context pem; + + mbedtls_pem_init( &pem ); + + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( dhminlen == 0 || dhmin[dhminlen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN DH PARAMETERS-----", + "-----END DH PARAMETERS-----", + dhmin, NULL, 0, &dhminlen ); + + if( ret == 0 ) + { + /* + * Was PEM encoded + */ + dhminlen = pem.buflen; + } + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + goto exit; + + p = ( ret == 0 ) ? pem.buf : (unsigned char *) dhmin; +#else + p = (unsigned char *) dhmin; +#endif /* MBEDTLS_PEM_PARSE_C */ + end = p + dhminlen; + + /* + * DHParams ::= SEQUENCE { + * prime INTEGER, -- P + * generator INTEGER, -- g + * privateValueLength INTEGER OPTIONAL + * } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + ret = MBEDTLS_ERR_DHM_INVALID_FORMAT + ret; + goto exit; + } + + end = p + len; + + if( ( ret = mbedtls_asn1_get_mpi( &p, end, &dhm->P ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &dhm->G ) ) != 0 ) + { + ret = MBEDTLS_ERR_DHM_INVALID_FORMAT + ret; + goto exit; + } + + if( p != end ) + { + /* This might be the optional privateValueLength. + * If so, we can cleanly discard it */ + mbedtls_mpi rec; + mbedtls_mpi_init( &rec ); + ret = mbedtls_asn1_get_mpi( &p, end, &rec ); + mbedtls_mpi_free( &rec ); + if ( ret != 0 ) + { + ret = MBEDTLS_ERR_DHM_INVALID_FORMAT + ret; + goto exit; + } + if ( p != end ) + { + ret = MBEDTLS_ERR_DHM_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH; + goto exit; + } + } + + ret = 0; + + dhm->len = mbedtls_mpi_size( &dhm->P ); + +exit: +#if defined(MBEDTLS_PEM_PARSE_C) + mbedtls_pem_free( &pem ); +#endif + if( ret != 0 ) + mbedtls_dhm_free( dhm ); + + return( ret ); +} + +#if defined(MBEDTLS_FS_IO) +/* + * Load all data from a file into a given buffer. + * + * The file is expected to contain either PEM or DER encoded data. + * A terminating null byte is always appended. It is included in the announced + * length only if the data looks like it is PEM encoded. + */ +static int load_file( const char *path, unsigned char **buf, size_t *n ) +{ + FILE *f; + long size; + + if( ( f = fopen( path, "rb" ) ) == NULL ) + return( MBEDTLS_ERR_DHM_FILE_IO_ERROR ); + + fseek( f, 0, SEEK_END ); + if( ( size = ftell( f ) ) == -1 ) + { + fclose( f ); + return( MBEDTLS_ERR_DHM_FILE_IO_ERROR ); + } + fseek( f, 0, SEEK_SET ); + + *n = (size_t) size; + + if( *n + 1 == 0 || + ( *buf = mbedtls_calloc( 1, *n + 1 ) ) == NULL ) + { + fclose( f ); + return( MBEDTLS_ERR_DHM_ALLOC_FAILED ); + } + + if( fread( *buf, 1, *n, f ) != *n ) + { + fclose( f ); + mbedtls_free( *buf ); + return( MBEDTLS_ERR_DHM_FILE_IO_ERROR ); + } + + fclose( f ); + + (*buf)[*n] = '\0'; + + if( strstr( (const char *) *buf, "-----BEGIN " ) != NULL ) + ++*n; + + return( 0 ); +} + +/* + * Load and parse DHM parameters + */ +int mbedtls_dhm_parse_dhmfile( mbedtls_dhm_context *dhm, const char *path ) +{ + int ret; + size_t n; + unsigned char *buf; + + if( ( ret = load_file( path, &buf, &n ) ) != 0 ) + return( ret ); + + ret = mbedtls_dhm_parse_dhm( dhm, buf, n ); + + mbedtls_zeroize( buf, n ); + mbedtls_free( buf ); + + return( ret ); +} +#endif /* MBEDTLS_FS_IO */ +#endif /* MBEDTLS_ASN1_PARSE_C */ + +#if defined(MBEDTLS_SELF_TEST) + +static const char mbedtls_test_dhm_params[] = +"-----BEGIN DH PARAMETERS-----\r\n" +"MIGHAoGBAJ419DBEOgmQTzo5qXl5fQcN9TN455wkOL7052HzxxRVMyhYmwQcgJvh\r\n" +"1sa18fyfR9OiVEMYglOpkqVoGLN7qd5aQNNi5W7/C+VBdHTBJcGZJyyP5B3qcz32\r\n" +"9mLJKudlVudV0Qxk5qUJaPZ/xupz0NyoVpviuiBOI1gNi8ovSXWzAgEC\r\n" +"-----END DH PARAMETERS-----\r\n"; + +static const size_t mbedtls_test_dhm_params_len = sizeof( mbedtls_test_dhm_params ); + +/* + * Checkup routine + */ +int mbedtls_dhm_self_test( int verbose ) +{ + int ret; + mbedtls_dhm_context dhm; + + mbedtls_dhm_init( &dhm ); + + if( verbose != 0 ) + mbedtls_printf( " DHM parameter load: " ); + + if( ( ret = mbedtls_dhm_parse_dhm( &dhm, + (const unsigned char *) mbedtls_test_dhm_params, + mbedtls_test_dhm_params_len ) ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n\n" ); + +exit: + mbedtls_dhm_free( &dhm ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_DHM_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecdh.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecdh.c new file mode 100644 index 0000000..c0a8147 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecdh.c @@ -0,0 +1,264 @@ +/* + * Elliptic curve Diffie-Hellman + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * References: + * + * SEC1 http://www.secg.org/index.php?action=secg,docs_secg + * RFC 4492 + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ECDH_C) + +#include "mbedtls/ecdh.h" + +#include + +/* + * Generate public key: simple wrapper around mbedtls_ecp_gen_keypair + */ +int mbedtls_ecdh_gen_public( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + return mbedtls_ecp_gen_keypair( grp, d, Q, f_rng, p_rng ); +} + +/* + * Compute shared secret (SEC1 3.3.1) + */ +int mbedtls_ecdh_compute_shared( mbedtls_ecp_group *grp, mbedtls_mpi *z, + const mbedtls_ecp_point *Q, const mbedtls_mpi *d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_ecp_point P; + + mbedtls_ecp_point_init( &P ); + + /* + * Make sure Q is a valid pubkey before using it + */ + MBEDTLS_MPI_CHK( mbedtls_ecp_check_pubkey( grp, Q ) ); + + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( grp, &P, d, Q, f_rng, p_rng ) ); + + if( mbedtls_ecp_is_zero( &P ) ) + { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( z, &P.X ) ); + +cleanup: + mbedtls_ecp_point_free( &P ); + + return( ret ); +} + +/* + * Initialize context + */ +void mbedtls_ecdh_init( mbedtls_ecdh_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_ecdh_context ) ); +} + +/* + * Free context + */ +void mbedtls_ecdh_free( mbedtls_ecdh_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_ecp_group_free( &ctx->grp ); + mbedtls_ecp_point_free( &ctx->Q ); + mbedtls_ecp_point_free( &ctx->Qp ); + mbedtls_ecp_point_free( &ctx->Vi ); + mbedtls_ecp_point_free( &ctx->Vf ); + mbedtls_mpi_free( &ctx->d ); + mbedtls_mpi_free( &ctx->z ); + mbedtls_mpi_free( &ctx->_d ); +} + +/* + * Setup and write the ServerKeyExhange parameters (RFC 4492) + * struct { + * ECParameters curve_params; + * ECPoint public; + * } ServerECDHParams; + */ +int mbedtls_ecdh_make_params( mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + size_t grp_len, pt_len; + + if( ctx == NULL || ctx->grp.pbits == 0 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_ecdh_gen_public( &ctx->grp, &ctx->d, &ctx->Q, f_rng, p_rng ) ) + != 0 ) + return( ret ); + + if( ( ret = mbedtls_ecp_tls_write_group( &ctx->grp, &grp_len, buf, blen ) ) + != 0 ) + return( ret ); + + buf += grp_len; + blen -= grp_len; + + if( ( ret = mbedtls_ecp_tls_write_point( &ctx->grp, &ctx->Q, ctx->point_format, + &pt_len, buf, blen ) ) != 0 ) + return( ret ); + + *olen = grp_len + pt_len; + return( 0 ); +} + +/* + * Read the ServerKeyExhange parameters (RFC 4492) + * struct { + * ECParameters curve_params; + * ECPoint public; + * } ServerECDHParams; + */ +int mbedtls_ecdh_read_params( mbedtls_ecdh_context *ctx, + const unsigned char **buf, const unsigned char *end ) +{ + int ret; + + if( ( ret = mbedtls_ecp_tls_read_group( &ctx->grp, buf, end - *buf ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_ecp_tls_read_point( &ctx->grp, &ctx->Qp, buf, end - *buf ) ) + != 0 ) + return( ret ); + + return( 0 ); +} + +/* + * Get parameters from a keypair + */ +int mbedtls_ecdh_get_params( mbedtls_ecdh_context *ctx, const mbedtls_ecp_keypair *key, + mbedtls_ecdh_side side ) +{ + int ret; + + if( ( ret = mbedtls_ecp_group_copy( &ctx->grp, &key->grp ) ) != 0 ) + return( ret ); + + /* If it's not our key, just import the public part as Qp */ + if( side == MBEDTLS_ECDH_THEIRS ) + return( mbedtls_ecp_copy( &ctx->Qp, &key->Q ) ); + + /* Our key: import public (as Q) and private parts */ + if( side != MBEDTLS_ECDH_OURS ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_ecp_copy( &ctx->Q, &key->Q ) ) != 0 || + ( ret = mbedtls_mpi_copy( &ctx->d, &key->d ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +/* + * Setup and export the client public value + */ +int mbedtls_ecdh_make_public( mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + + if( ctx == NULL || ctx->grp.pbits == 0 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_ecdh_gen_public( &ctx->grp, &ctx->d, &ctx->Q, f_rng, p_rng ) ) + != 0 ) + return( ret ); + + return mbedtls_ecp_tls_write_point( &ctx->grp, &ctx->Q, ctx->point_format, + olen, buf, blen ); +} + +/* + * Parse and import the client's public value + */ +int mbedtls_ecdh_read_public( mbedtls_ecdh_context *ctx, + const unsigned char *buf, size_t blen ) +{ + int ret; + const unsigned char *p = buf; + + if( ctx == NULL ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_ecp_tls_read_point( &ctx->grp, &ctx->Qp, &p, blen ) ) != 0 ) + return( ret ); + + if( (size_t)( p - buf ) != blen ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + return( 0 ); +} + +/* + * Derive and export the shared secret + */ +int mbedtls_ecdh_calc_secret( mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + + if( ctx == NULL ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_ecdh_compute_shared( &ctx->grp, &ctx->z, &ctx->Qp, &ctx->d, + f_rng, p_rng ) ) != 0 ) + { + return( ret ); + } + + if( mbedtls_mpi_size( &ctx->z ) > blen ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + *olen = ctx->grp.pbits / 8 + ( ( ctx->grp.pbits % 8 ) != 0 ); + return mbedtls_mpi_write_binary( &ctx->z, buf, *olen ); +} + +#endif /* MBEDTLS_ECDH_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecdsa.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecdsa.c new file mode 100644 index 0000000..4156f3c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecdsa.c @@ -0,0 +1,448 @@ +/* + * Elliptic curve DSA + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * References: + * + * SEC1 http://www.secg.org/index.php?action=secg,docs_secg + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ECDSA_C) + +#include "mbedtls/ecdsa.h" +#include "mbedtls/asn1write.h" + +#include + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) +#include "mbedtls/hmac_drbg.h" +#endif + +/* + * Derive a suitable integer for group grp from a buffer of length len + * SEC1 4.1.3 step 5 aka SEC1 4.1.4 step 3 + */ +static int derive_mpi( const mbedtls_ecp_group *grp, mbedtls_mpi *x, + const unsigned char *buf, size_t blen ) +{ + int ret; + size_t n_size = ( grp->nbits + 7 ) / 8; + size_t use_size = blen > n_size ? n_size : blen; + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( x, buf, use_size ) ); + if( use_size * 8 > grp->nbits ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( x, use_size * 8 - grp->nbits ) ); + + /* While at it, reduce modulo N */ + if( mbedtls_mpi_cmp_mpi( x, &grp->N ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( x, x, &grp->N ) ); + +cleanup: + return( ret ); +} + +/* + * Compute ECDSA signature of a hashed message (SEC1 4.1.3) + * Obviously, compared to SEC1 4.1.3, we skip step 4 (hash message) + */ +int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s, + const mbedtls_mpi *d, const unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret, key_tries, sign_tries, blind_tries; + mbedtls_ecp_point R; + mbedtls_mpi k, e, t; + + /* Fail cleanly on curves such as Curve25519 that can't be used for ECDSA */ + if( grp->N.p == NULL ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + mbedtls_ecp_point_init( &R ); + mbedtls_mpi_init( &k ); mbedtls_mpi_init( &e ); mbedtls_mpi_init( &t ); + + sign_tries = 0; + do + { + /* + * Steps 1-3: generate a suitable ephemeral keypair + * and set r = xR mod n + */ + key_tries = 0; + do + { + MBEDTLS_MPI_CHK( mbedtls_ecp_gen_keypair( grp, &k, &R, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( r, &R.X, &grp->N ) ); + + if( key_tries++ > 10 ) + { + ret = MBEDTLS_ERR_ECP_RANDOM_FAILED; + goto cleanup; + } + } + while( mbedtls_mpi_cmp_int( r, 0 ) == 0 ); + + /* + * Step 5: derive MPI from hashed message + */ + MBEDTLS_MPI_CHK( derive_mpi( grp, &e, buf, blen ) ); + + /* + * Generate a random value to blind inv_mod in next step, + * avoiding a potential timing leak. + */ + blind_tries = 0; + do + { + size_t n_size = ( grp->nbits + 7 ) / 8; + MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &t, n_size, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &t, 8 * n_size - grp->nbits ) ); + + /* See mbedtls_ecp_gen_keypair() */ + if( ++blind_tries > 30 ) + return( MBEDTLS_ERR_ECP_RANDOM_FAILED ); + } + while( mbedtls_mpi_cmp_int( &t, 1 ) < 0 || + mbedtls_mpi_cmp_mpi( &t, &grp->N ) >= 0 ); + + /* + * Step 6: compute s = (e + r * d) / k = t (e + rd) / (kt) mod n + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( s, r, d ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &e, &e, s ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &e, &e, &t ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &k, &k, &t ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( s, &k, &grp->N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( s, s, &e ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( s, s, &grp->N ) ); + + if( sign_tries++ > 10 ) + { + ret = MBEDTLS_ERR_ECP_RANDOM_FAILED; + goto cleanup; + } + } + while( mbedtls_mpi_cmp_int( s, 0 ) == 0 ); + +cleanup: + mbedtls_ecp_point_free( &R ); + mbedtls_mpi_free( &k ); mbedtls_mpi_free( &e ); mbedtls_mpi_free( &t ); + + return( ret ); +} + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) +/* + * Deterministic signature wrapper + */ +int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s, + const mbedtls_mpi *d, const unsigned char *buf, size_t blen, + mbedtls_md_type_t md_alg ) +{ + int ret; + mbedtls_hmac_drbg_context rng_ctx; + unsigned char data[2 * MBEDTLS_ECP_MAX_BYTES]; + size_t grp_len = ( grp->nbits + 7 ) / 8; + const mbedtls_md_info_t *md_info; + mbedtls_mpi h; + + if( ( md_info = mbedtls_md_info_from_type( md_alg ) ) == NULL ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + mbedtls_mpi_init( &h ); + mbedtls_hmac_drbg_init( &rng_ctx ); + + /* Use private key and message hash (reduced) to initialize HMAC_DRBG */ + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( d, data, grp_len ) ); + MBEDTLS_MPI_CHK( derive_mpi( grp, &h, buf, blen ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &h, data + grp_len, grp_len ) ); + mbedtls_hmac_drbg_seed_buf( &rng_ctx, md_info, data, 2 * grp_len ); + + ret = mbedtls_ecdsa_sign( grp, r, s, d, buf, blen, + mbedtls_hmac_drbg_random, &rng_ctx ); + +cleanup: + mbedtls_hmac_drbg_free( &rng_ctx ); + mbedtls_mpi_free( &h ); + + return( ret ); +} +#endif /* MBEDTLS_ECDSA_DETERMINISTIC */ + +/* + * Verify ECDSA signature of hashed message (SEC1 4.1.4) + * Obviously, compared to SEC1 4.1.3, we skip step 2 (hash message) + */ +int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp, + const unsigned char *buf, size_t blen, + const mbedtls_ecp_point *Q, const mbedtls_mpi *r, const mbedtls_mpi *s) +{ + int ret; + mbedtls_mpi e, s_inv, u1, u2; + mbedtls_ecp_point R; + + mbedtls_ecp_point_init( &R ); + mbedtls_mpi_init( &e ); mbedtls_mpi_init( &s_inv ); mbedtls_mpi_init( &u1 ); mbedtls_mpi_init( &u2 ); + + /* Fail cleanly on curves such as Curve25519 that can't be used for ECDSA */ + if( grp->N.p == NULL ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * Step 1: make sure r and s are in range 1..n-1 + */ + if( mbedtls_mpi_cmp_int( r, 1 ) < 0 || mbedtls_mpi_cmp_mpi( r, &grp->N ) >= 0 || + mbedtls_mpi_cmp_int( s, 1 ) < 0 || mbedtls_mpi_cmp_mpi( s, &grp->N ) >= 0 ) + { + ret = MBEDTLS_ERR_ECP_VERIFY_FAILED; + goto cleanup; + } + + /* + * Additional precaution: make sure Q is valid + */ + MBEDTLS_MPI_CHK( mbedtls_ecp_check_pubkey( grp, Q ) ); + + /* + * Step 3: derive MPI from hashed message + */ + MBEDTLS_MPI_CHK( derive_mpi( grp, &e, buf, blen ) ); + + /* + * Step 4: u1 = e / s mod n, u2 = r / s mod n + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &s_inv, s, &grp->N ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &u1, &e, &s_inv ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &u1, &u1, &grp->N ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &u2, r, &s_inv ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &u2, &u2, &grp->N ) ); + + /* + * Step 5: R = u1 G + u2 Q + * + * Since we're not using any secret data, no need to pass a RNG to + * mbedtls_ecp_mul() for countermesures. + */ + MBEDTLS_MPI_CHK( mbedtls_ecp_muladd( grp, &R, &u1, &grp->G, &u2, Q ) ); + + if( mbedtls_ecp_is_zero( &R ) ) + { + ret = MBEDTLS_ERR_ECP_VERIFY_FAILED; + goto cleanup; + } + + /* + * Step 6: convert xR to an integer (no-op) + * Step 7: reduce xR mod n (gives v) + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &R.X, &R.X, &grp->N ) ); + + /* + * Step 8: check if v (that is, R.X) is equal to r + */ + if( mbedtls_mpi_cmp_mpi( &R.X, r ) != 0 ) + { + ret = MBEDTLS_ERR_ECP_VERIFY_FAILED; + goto cleanup; + } + +cleanup: + mbedtls_ecp_point_free( &R ); + mbedtls_mpi_free( &e ); mbedtls_mpi_free( &s_inv ); mbedtls_mpi_free( &u1 ); mbedtls_mpi_free( &u2 ); + + return( ret ); +} + +/* + * Convert a signature (given by context) to ASN.1 + */ +static int ecdsa_signature_to_asn1( const mbedtls_mpi *r, const mbedtls_mpi *s, + unsigned char *sig, size_t *slen ) +{ + int ret; + unsigned char buf[MBEDTLS_ECDSA_MAX_LEN]; + unsigned char *p = buf + sizeof( buf ); + size_t len = 0; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &p, buf, s ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &p, buf, r ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &p, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &p, buf, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ); + + memcpy( sig, p, len ); + *slen = len; + + return( 0 ); +} + +/* + * Compute and write signature + */ +int mbedtls_ecdsa_write_signature( mbedtls_ecdsa_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hlen, + unsigned char *sig, size_t *slen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_mpi r, s; + + mbedtls_mpi_init( &r ); + mbedtls_mpi_init( &s ); + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) + (void) f_rng; + (void) p_rng; + + MBEDTLS_MPI_CHK( mbedtls_ecdsa_sign_det( &ctx->grp, &r, &s, &ctx->d, + hash, hlen, md_alg ) ); +#else + (void) md_alg; + + MBEDTLS_MPI_CHK( mbedtls_ecdsa_sign( &ctx->grp, &r, &s, &ctx->d, + hash, hlen, f_rng, p_rng ) ); +#endif + + MBEDTLS_MPI_CHK( ecdsa_signature_to_asn1( &r, &s, sig, slen ) ); + +cleanup: + mbedtls_mpi_free( &r ); + mbedtls_mpi_free( &s ); + + return( ret ); +} + +#if ! defined(MBEDTLS_DEPRECATED_REMOVED) && \ + defined(MBEDTLS_ECDSA_DETERMINISTIC) +int mbedtls_ecdsa_write_signature_det( mbedtls_ecdsa_context *ctx, + const unsigned char *hash, size_t hlen, + unsigned char *sig, size_t *slen, + mbedtls_md_type_t md_alg ) +{ + return( mbedtls_ecdsa_write_signature( ctx, md_alg, hash, hlen, sig, slen, + NULL, NULL ) ); +} +#endif + +/* + * Read and check signature + */ +int mbedtls_ecdsa_read_signature( mbedtls_ecdsa_context *ctx, + const unsigned char *hash, size_t hlen, + const unsigned char *sig, size_t slen ) +{ + int ret; + unsigned char *p = (unsigned char *) sig; + const unsigned char *end = sig + slen; + size_t len; + mbedtls_mpi r, s; + + mbedtls_mpi_init( &r ); + mbedtls_mpi_init( &s ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + ret += MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + if( p + len != end ) + { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH; + goto cleanup; + } + + if( ( ret = mbedtls_asn1_get_mpi( &p, end, &r ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &s ) ) != 0 ) + { + ret += MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + if( ( ret = mbedtls_ecdsa_verify( &ctx->grp, hash, hlen, + &ctx->Q, &r, &s ) ) != 0 ) + goto cleanup; + + if( p != end ) + ret = MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH; + +cleanup: + mbedtls_mpi_free( &r ); + mbedtls_mpi_free( &s ); + + return( ret ); +} + +/* + * Generate key pair + */ +int mbedtls_ecdsa_genkey( mbedtls_ecdsa_context *ctx, mbedtls_ecp_group_id gid, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + return( mbedtls_ecp_group_load( &ctx->grp, gid ) || + mbedtls_ecp_gen_keypair( &ctx->grp, &ctx->d, &ctx->Q, f_rng, p_rng ) ); +} + +/* + * Set context from an mbedtls_ecp_keypair + */ +int mbedtls_ecdsa_from_keypair( mbedtls_ecdsa_context *ctx, const mbedtls_ecp_keypair *key ) +{ + int ret; + + if( ( ret = mbedtls_ecp_group_copy( &ctx->grp, &key->grp ) ) != 0 || + ( ret = mbedtls_mpi_copy( &ctx->d, &key->d ) ) != 0 || + ( ret = mbedtls_ecp_copy( &ctx->Q, &key->Q ) ) != 0 ) + { + mbedtls_ecdsa_free( ctx ); + } + + return( ret ); +} + +/* + * Initialize context + */ +void mbedtls_ecdsa_init( mbedtls_ecdsa_context *ctx ) +{ + mbedtls_ecp_keypair_init( ctx ); +} + +/* + * Free context + */ +void mbedtls_ecdsa_free( mbedtls_ecdsa_context *ctx ) +{ + mbedtls_ecp_keypair_free( ctx ); +} + +#endif /* MBEDTLS_ECDSA_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecjpake.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecjpake.c new file mode 100644 index 0000000..1fa1c2d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecjpake.c @@ -0,0 +1,1103 @@ +/* + * Elliptic curve J-PAKE + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * References in the code are to the Thread v1.0 Specification, + * available to members of the Thread Group http://threadgroup.org/ + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ECJPAKE_C) + +#include "mbedtls/ecjpake.h" + +#include + +/* + * Convert a mbedtls_ecjpake_role to identifier string + */ +static const char * const ecjpake_id[] = { + "client", + "server" +}; + +#define ID_MINE ( ecjpake_id[ ctx->role ] ) +#define ID_PEER ( ecjpake_id[ 1 - ctx->role ] ) + +/* + * Initialize context + */ +void mbedtls_ecjpake_init( mbedtls_ecjpake_context *ctx ) +{ + if( ctx == NULL ) + return; + + ctx->md_info = NULL; + mbedtls_ecp_group_init( &ctx->grp ); + ctx->point_format = MBEDTLS_ECP_PF_UNCOMPRESSED; + + mbedtls_ecp_point_init( &ctx->Xm1 ); + mbedtls_ecp_point_init( &ctx->Xm2 ); + mbedtls_ecp_point_init( &ctx->Xp1 ); + mbedtls_ecp_point_init( &ctx->Xp2 ); + mbedtls_ecp_point_init( &ctx->Xp ); + + mbedtls_mpi_init( &ctx->xm1 ); + mbedtls_mpi_init( &ctx->xm2 ); + mbedtls_mpi_init( &ctx->s ); +} + +/* + * Free context + */ +void mbedtls_ecjpake_free( mbedtls_ecjpake_context *ctx ) +{ + if( ctx == NULL ) + return; + + ctx->md_info = NULL; + mbedtls_ecp_group_free( &ctx->grp ); + + mbedtls_ecp_point_free( &ctx->Xm1 ); + mbedtls_ecp_point_free( &ctx->Xm2 ); + mbedtls_ecp_point_free( &ctx->Xp1 ); + mbedtls_ecp_point_free( &ctx->Xp2 ); + mbedtls_ecp_point_free( &ctx->Xp ); + + mbedtls_mpi_free( &ctx->xm1 ); + mbedtls_mpi_free( &ctx->xm2 ); + mbedtls_mpi_free( &ctx->s ); +} + +/* + * Setup context + */ +int mbedtls_ecjpake_setup( mbedtls_ecjpake_context *ctx, + mbedtls_ecjpake_role role, + mbedtls_md_type_t hash, + mbedtls_ecp_group_id curve, + const unsigned char *secret, + size_t len ) +{ + int ret; + + ctx->role = role; + + if( ( ctx->md_info = mbedtls_md_info_from_type( hash ) ) == NULL ) + return( MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE ); + + MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &ctx->grp, curve ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->s, secret, len ) ); + +cleanup: + if( ret != 0 ) + mbedtls_ecjpake_free( ctx ); + + return( ret ); +} + +/* + * Check if context is ready for use + */ +int mbedtls_ecjpake_check( const mbedtls_ecjpake_context *ctx ) +{ + if( ctx->md_info == NULL || + ctx->grp.id == MBEDTLS_ECP_DP_NONE || + ctx->s.p == NULL ) + { + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + } + + return( 0 ); +} + +/* + * Write a point plus its length to a buffer + */ +static int ecjpake_write_len_point( unsigned char **p, + const unsigned char *end, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *P ) +{ + int ret; + size_t len; + + /* Need at least 4 for length plus 1 for point */ + if( end < *p || end - *p < 5 ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + ret = mbedtls_ecp_point_write_binary( grp, P, pf, + &len, *p + 4, end - ( *p + 4 ) ); + if( ret != 0 ) + return( ret ); + + (*p)[0] = (unsigned char)( ( len >> 24 ) & 0xFF ); + (*p)[1] = (unsigned char)( ( len >> 16 ) & 0xFF ); + (*p)[2] = (unsigned char)( ( len >> 8 ) & 0xFF ); + (*p)[3] = (unsigned char)( ( len ) & 0xFF ); + + *p += 4 + len; + + return( 0 ); +} + +/* + * Size of the temporary buffer for ecjpake_hash: + * 3 EC points plus their length, plus ID and its length (4 + 6 bytes) + */ +#define ECJPAKE_HASH_BUF_LEN ( 3 * ( 4 + MBEDTLS_ECP_MAX_PT_LEN ) + 4 + 6 ) + +/* + * Compute hash for ZKP (7.4.2.2.2.1) + */ +static int ecjpake_hash( const mbedtls_md_info_t *md_info, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *G, + const mbedtls_ecp_point *V, + const mbedtls_ecp_point *X, + const char *id, + mbedtls_mpi *h ) +{ + int ret; + unsigned char buf[ECJPAKE_HASH_BUF_LEN]; + unsigned char *p = buf; + const unsigned char *end = buf + sizeof( buf ); + const size_t id_len = strlen( id ); + unsigned char hash[MBEDTLS_MD_MAX_SIZE]; + + /* Write things to temporary buffer */ + MBEDTLS_MPI_CHK( ecjpake_write_len_point( &p, end, grp, pf, G ) ); + MBEDTLS_MPI_CHK( ecjpake_write_len_point( &p, end, grp, pf, V ) ); + MBEDTLS_MPI_CHK( ecjpake_write_len_point( &p, end, grp, pf, X ) ); + + if( end - p < 4 ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + *p++ = (unsigned char)( ( id_len >> 24 ) & 0xFF ); + *p++ = (unsigned char)( ( id_len >> 16 ) & 0xFF ); + *p++ = (unsigned char)( ( id_len >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( id_len ) & 0xFF ); + + if( end < p || (size_t)( end - p ) < id_len ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + memcpy( p, id, id_len ); + p += id_len; + + /* Compute hash */ + mbedtls_md( md_info, buf, p - buf, hash ); + + /* Turn it into an integer mod n */ + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( h, hash, + mbedtls_md_get_size( md_info ) ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( h, h, &grp->N ) ); + +cleanup: + return( ret ); +} + +/* + * Parse a ECShnorrZKP (7.4.2.2.2) and verify it (7.4.2.3.3) + */ +static int ecjpake_zkp_read( const mbedtls_md_info_t *md_info, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *G, + const mbedtls_ecp_point *X, + const char *id, + const unsigned char **p, + const unsigned char *end ) +{ + int ret; + mbedtls_ecp_point V, VV; + mbedtls_mpi r, h; + size_t r_len; + + mbedtls_ecp_point_init( &V ); + mbedtls_ecp_point_init( &VV ); + mbedtls_mpi_init( &r ); + mbedtls_mpi_init( &h ); + + /* + * struct { + * ECPoint V; + * opaque r<1..2^8-1>; + * } ECSchnorrZKP; + */ + if( end < *p ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + MBEDTLS_MPI_CHK( mbedtls_ecp_tls_read_point( grp, &V, p, end - *p ) ); + + if( end < *p || (size_t)( end - *p ) < 1 ) + { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + r_len = *(*p)++; + + if( end < *p || (size_t)( end - *p ) < r_len ) + { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &r, *p, r_len ) ); + *p += r_len; + + /* + * Verification + */ + MBEDTLS_MPI_CHK( ecjpake_hash( md_info, grp, pf, G, &V, X, id, &h ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_muladd( (mbedtls_ecp_group *) grp, + &VV, &h, X, &r, G ) ); + + if( mbedtls_ecp_point_cmp( &VV, &V ) != 0 ) + { + ret = MBEDTLS_ERR_ECP_VERIFY_FAILED; + goto cleanup; + } + +cleanup: + mbedtls_ecp_point_free( &V ); + mbedtls_ecp_point_free( &VV ); + mbedtls_mpi_free( &r ); + mbedtls_mpi_free( &h ); + + return( ret ); +} + +/* + * Generate ZKP (7.4.2.3.2) and write it as ECSchnorrZKP (7.4.2.2.2) + */ +static int ecjpake_zkp_write( const mbedtls_md_info_t *md_info, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *G, + const mbedtls_mpi *x, + const mbedtls_ecp_point *X, + const char *id, + unsigned char **p, + const unsigned char *end, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_ecp_point V; + mbedtls_mpi v; + mbedtls_mpi h; /* later recycled to hold r */ + size_t len; + + if( end < *p ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + mbedtls_ecp_point_init( &V ); + mbedtls_mpi_init( &v ); + mbedtls_mpi_init( &h ); + + /* Compute signature */ + MBEDTLS_MPI_CHK( mbedtls_ecp_gen_keypair_base( (mbedtls_ecp_group *) grp, + G, &v, &V, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( ecjpake_hash( md_info, grp, pf, G, &V, X, id, &h ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &h, &h, x ) ); /* x*h */ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &h, &v, &h ) ); /* v - x*h */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &h, &h, &grp->N ) ); /* r */ + + /* Write it out */ + MBEDTLS_MPI_CHK( mbedtls_ecp_tls_write_point( grp, &V, + pf, &len, *p, end - *p ) ); + *p += len; + + len = mbedtls_mpi_size( &h ); /* actually r */ + if( end < *p || (size_t)( end - *p ) < 1 + len || len > 255 ) + { + ret = MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + goto cleanup; + } + + *(*p)++ = (unsigned char)( len & 0xFF ); + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &h, *p, len ) ); /* r */ + *p += len; + +cleanup: + mbedtls_ecp_point_free( &V ); + mbedtls_mpi_free( &v ); + mbedtls_mpi_free( &h ); + + return( ret ); +} + +/* + * Parse a ECJPAKEKeyKP (7.4.2.2.1) and check proof + * Output: verified public key X + */ +static int ecjpake_kkp_read( const mbedtls_md_info_t *md_info, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *G, + mbedtls_ecp_point *X, + const char *id, + const unsigned char **p, + const unsigned char *end ) +{ + int ret; + + if( end < *p ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * struct { + * ECPoint X; + * ECSchnorrZKP zkp; + * } ECJPAKEKeyKP; + */ + MBEDTLS_MPI_CHK( mbedtls_ecp_tls_read_point( grp, X, p, end - *p ) ); + if( mbedtls_ecp_is_zero( X ) ) + { + ret = MBEDTLS_ERR_ECP_INVALID_KEY; + goto cleanup; + } + + MBEDTLS_MPI_CHK( ecjpake_zkp_read( md_info, grp, pf, G, X, id, p, end ) ); + +cleanup: + return( ret ); +} + +/* + * Generate an ECJPAKEKeyKP + * Output: the serialized structure, plus private/public key pair + */ +static int ecjpake_kkp_write( const mbedtls_md_info_t *md_info, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *G, + mbedtls_mpi *x, + mbedtls_ecp_point *X, + const char *id, + unsigned char **p, + const unsigned char *end, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + size_t len; + + if( end < *p ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + /* Generate key (7.4.2.3.1) and write it out */ + MBEDTLS_MPI_CHK( mbedtls_ecp_gen_keypair_base( (mbedtls_ecp_group *) grp, G, x, X, + f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_tls_write_point( grp, X, + pf, &len, *p, end - *p ) ); + *p += len; + + /* Generate and write proof */ + MBEDTLS_MPI_CHK( ecjpake_zkp_write( md_info, grp, pf, G, x, X, id, + p, end, f_rng, p_rng ) ); + +cleanup: + return( ret ); +} + +/* + * Read a ECJPAKEKeyKPPairList (7.4.2.3) and check proofs + * Ouputs: verified peer public keys Xa, Xb + */ +static int ecjpake_kkpp_read( const mbedtls_md_info_t *md_info, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *G, + mbedtls_ecp_point *Xa, + mbedtls_ecp_point *Xb, + const char *id, + const unsigned char *buf, + size_t len ) +{ + int ret; + const unsigned char *p = buf; + const unsigned char *end = buf + len; + + /* + * struct { + * ECJPAKEKeyKP ecjpake_key_kp_pair_list[2]; + * } ECJPAKEKeyKPPairList; + */ + MBEDTLS_MPI_CHK( ecjpake_kkp_read( md_info, grp, pf, G, Xa, id, &p, end ) ); + MBEDTLS_MPI_CHK( ecjpake_kkp_read( md_info, grp, pf, G, Xb, id, &p, end ) ); + + if( p != end ) + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + +cleanup: + return( ret ); +} + +/* + * Generate a ECJPAKEKeyKPPairList + * Outputs: the serialized structure, plus two private/public key pairs + */ +static int ecjpake_kkpp_write( const mbedtls_md_info_t *md_info, + const mbedtls_ecp_group *grp, + const int pf, + const mbedtls_ecp_point *G, + mbedtls_mpi *xm1, + mbedtls_ecp_point *Xa, + mbedtls_mpi *xm2, + mbedtls_ecp_point *Xb, + const char *id, + unsigned char *buf, + size_t len, + size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + unsigned char *p = buf; + const unsigned char *end = buf + len; + + MBEDTLS_MPI_CHK( ecjpake_kkp_write( md_info, grp, pf, G, xm1, Xa, id, + &p, end, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( ecjpake_kkp_write( md_info, grp, pf, G, xm2, Xb, id, + &p, end, f_rng, p_rng ) ); + + *olen = p - buf; + +cleanup: + return( ret ); +} + +/* + * Read and process the first round message + */ +int mbedtls_ecjpake_read_round_one( mbedtls_ecjpake_context *ctx, + const unsigned char *buf, + size_t len ) +{ + return( ecjpake_kkpp_read( ctx->md_info, &ctx->grp, ctx->point_format, + &ctx->grp.G, + &ctx->Xp1, &ctx->Xp2, ID_PEER, + buf, len ) ); +} + +/* + * Generate and write the first round message + */ +int mbedtls_ecjpake_write_round_one( mbedtls_ecjpake_context *ctx, + unsigned char *buf, size_t len, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + return( ecjpake_kkpp_write( ctx->md_info, &ctx->grp, ctx->point_format, + &ctx->grp.G, + &ctx->xm1, &ctx->Xm1, &ctx->xm2, &ctx->Xm2, + ID_MINE, buf, len, olen, f_rng, p_rng ) ); +} + +/* + * Compute the sum of three points R = A + B + C + */ +static int ecjpake_ecp_add3( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point *A, + const mbedtls_ecp_point *B, + const mbedtls_ecp_point *C ) +{ + int ret; + mbedtls_mpi one; + + mbedtls_mpi_init( &one ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &one, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_muladd( grp, R, &one, A, &one, B ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_muladd( grp, R, &one, R, &one, C ) ); + +cleanup: + mbedtls_mpi_free( &one ); + + return( ret ); +} + +/* + * Read and process second round message (C: 7.4.2.5, S: 7.4.2.6) + */ +int mbedtls_ecjpake_read_round_two( mbedtls_ecjpake_context *ctx, + const unsigned char *buf, + size_t len ) +{ + int ret; + const unsigned char *p = buf; + const unsigned char *end = buf + len; + mbedtls_ecp_group grp; + mbedtls_ecp_point G; /* C: GB, S: GA */ + + mbedtls_ecp_group_init( &grp ); + mbedtls_ecp_point_init( &G ); + + /* + * Server: GA = X3 + X4 + X1 (7.4.2.6.1) + * Client: GB = X1 + X2 + X3 (7.4.2.5.1) + * Unified: G = Xm1 + Xm2 + Xp1 + * We need that before parsing in order to check Xp as we read it + */ + MBEDTLS_MPI_CHK( ecjpake_ecp_add3( &ctx->grp, &G, + &ctx->Xm1, &ctx->Xm2, &ctx->Xp1 ) ); + + /* + * struct { + * ECParameters curve_params; // only client reading server msg + * ECJPAKEKeyKP ecjpake_key_kp; + * } Client/ServerECJPAKEParams; + */ + if( ctx->role == MBEDTLS_ECJPAKE_CLIENT ) + { + MBEDTLS_MPI_CHK( mbedtls_ecp_tls_read_group( &grp, &p, len ) ); + if( grp.id != ctx->grp.id ) + { + ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; + goto cleanup; + } + } + + MBEDTLS_MPI_CHK( ecjpake_kkp_read( ctx->md_info, &ctx->grp, + ctx->point_format, + &G, &ctx->Xp, ID_PEER, &p, end ) ); + + if( p != end ) + { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + +cleanup: + mbedtls_ecp_group_free( &grp ); + mbedtls_ecp_point_free( &G ); + + return( ret ); +} + +/* + * Compute R = +/- X * S mod N, taking care not to leak S + */ +static int ecjpake_mul_secret( mbedtls_mpi *R, int sign, + const mbedtls_mpi *X, + const mbedtls_mpi *S, + const mbedtls_mpi *N, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_mpi b; /* Blinding value, then s + N * blinding */ + + mbedtls_mpi_init( &b ); + + /* b = s + rnd-128-bit * N */ + MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &b, 16, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &b, &b, N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &b, &b, S ) ); + + /* R = sign * X * b mod N */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( R, X, &b ) ); + R->s *= sign; + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( R, R, N ) ); + +cleanup: + mbedtls_mpi_free( &b ); + + return( ret ); +} + +/* + * Generate and write the second round message (S: 7.4.2.5, C: 7.4.2.6) + */ +int mbedtls_ecjpake_write_round_two( mbedtls_ecjpake_context *ctx, + unsigned char *buf, size_t len, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_ecp_point G; /* C: GA, S: GB */ + mbedtls_ecp_point Xm; /* C: Xc, S: Xs */ + mbedtls_mpi xm; /* C: xc, S: xs */ + unsigned char *p = buf; + const unsigned char *end = buf + len; + size_t ec_len; + + mbedtls_ecp_point_init( &G ); + mbedtls_ecp_point_init( &Xm ); + mbedtls_mpi_init( &xm ); + + /* + * First generate private/public key pair (S: 7.4.2.5.1, C: 7.4.2.6.1) + * + * Client: GA = X1 + X3 + X4 | xs = x2 * s | Xc = xc * GA + * Server: GB = X3 + X1 + X2 | xs = x4 * s | Xs = xs * GB + * Unified: G = Xm1 + Xp1 + Xp2 | xm = xm2 * s | Xm = xm * G + */ + MBEDTLS_MPI_CHK( ecjpake_ecp_add3( &ctx->grp, &G, + &ctx->Xp1, &ctx->Xp2, &ctx->Xm1 ) ); + MBEDTLS_MPI_CHK( ecjpake_mul_secret( &xm, 1, &ctx->xm2, &ctx->s, + &ctx->grp.N, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &ctx->grp, &Xm, &xm, &G, f_rng, p_rng ) ); + + /* + * Now write things out + * + * struct { + * ECParameters curve_params; // only server writing its message + * ECJPAKEKeyKP ecjpake_key_kp; + * } Client/ServerECJPAKEParams; + */ + if( ctx->role == MBEDTLS_ECJPAKE_SERVER ) + { + if( end < p ) + { + ret = MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + goto cleanup; + } + MBEDTLS_MPI_CHK( mbedtls_ecp_tls_write_group( &ctx->grp, &ec_len, + p, end - p ) ); + p += ec_len; + } + + if( end < p ) + { + ret = MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + goto cleanup; + } + MBEDTLS_MPI_CHK( mbedtls_ecp_tls_write_point( &ctx->grp, &Xm, + ctx->point_format, &ec_len, p, end - p ) ); + p += ec_len; + + MBEDTLS_MPI_CHK( ecjpake_zkp_write( ctx->md_info, &ctx->grp, + ctx->point_format, + &G, &xm, &Xm, ID_MINE, + &p, end, f_rng, p_rng ) ); + + *olen = p - buf; + +cleanup: + mbedtls_ecp_point_free( &G ); + mbedtls_ecp_point_free( &Xm ); + mbedtls_mpi_free( &xm ); + + return( ret ); +} + +/* + * Derive PMS (7.4.2.7 / 7.4.2.8) + */ +int mbedtls_ecjpake_derive_secret( mbedtls_ecjpake_context *ctx, + unsigned char *buf, size_t len, size_t *olen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_ecp_point K; + mbedtls_mpi m_xm2_s, one; + unsigned char kx[MBEDTLS_ECP_MAX_BYTES]; + size_t x_bytes; + + *olen = mbedtls_md_get_size( ctx->md_info ); + if( len < *olen ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + mbedtls_ecp_point_init( &K ); + mbedtls_mpi_init( &m_xm2_s ); + mbedtls_mpi_init( &one ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &one, 1 ) ); + + /* + * Client: K = ( Xs - X4 * x2 * s ) * x2 + * Server: K = ( Xc - X2 * x4 * s ) * x4 + * Unified: K = ( Xp - Xp2 * xm2 * s ) * xm2 + */ + MBEDTLS_MPI_CHK( ecjpake_mul_secret( &m_xm2_s, -1, &ctx->xm2, &ctx->s, + &ctx->grp.N, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_muladd( &ctx->grp, &K, + &one, &ctx->Xp, + &m_xm2_s, &ctx->Xp2 ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &ctx->grp, &K, &ctx->xm2, &K, + f_rng, p_rng ) ); + + /* PMS = SHA-256( K.X ) */ + x_bytes = ( ctx->grp.pbits + 7 ) / 8; + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &K.X, kx, x_bytes ) ); + MBEDTLS_MPI_CHK( mbedtls_md( ctx->md_info, kx, x_bytes, buf ) ); + +cleanup: + mbedtls_ecp_point_free( &K ); + mbedtls_mpi_free( &m_xm2_s ); + mbedtls_mpi_free( &one ); + + return( ret ); +} + +#undef ID_MINE +#undef ID_PEER + + +#if defined(MBEDTLS_SELF_TEST) + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif + +#if !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \ + !defined(MBEDTLS_SHA256_C) +int mbedtls_ecjpake_self_test( int verbose ) +{ + (void) verbose; + return( 0 ); +} +#else + +static const unsigned char ecjpake_test_password[] = { + 0x74, 0x68, 0x72, 0x65, 0x61, 0x64, 0x6a, 0x70, 0x61, 0x6b, 0x65, 0x74, + 0x65, 0x73, 0x74 +}; + +static const unsigned char ecjpake_test_x1[] = { + 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, + 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x21 +}; + +static const unsigned char ecjpake_test_x2[] = { + 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, + 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, + 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x81 +}; + +static const unsigned char ecjpake_test_x3[] = { + 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, + 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, + 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x81 +}; + +static const unsigned char ecjpake_test_x4[] = { + 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, + 0xcd, 0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, + 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe1 +}; + +static const unsigned char ecjpake_test_cli_one[] = { + 0x41, 0x04, 0xac, 0xcf, 0x01, 0x06, 0xef, 0x85, 0x8f, 0xa2, 0xd9, 0x19, + 0x33, 0x13, 0x46, 0x80, 0x5a, 0x78, 0xb5, 0x8b, 0xba, 0xd0, 0xb8, 0x44, + 0xe5, 0xc7, 0x89, 0x28, 0x79, 0x14, 0x61, 0x87, 0xdd, 0x26, 0x66, 0xad, + 0xa7, 0x81, 0xbb, 0x7f, 0x11, 0x13, 0x72, 0x25, 0x1a, 0x89, 0x10, 0x62, + 0x1f, 0x63, 0x4d, 0xf1, 0x28, 0xac, 0x48, 0xe3, 0x81, 0xfd, 0x6e, 0xf9, + 0x06, 0x07, 0x31, 0xf6, 0x94, 0xa4, 0x41, 0x04, 0x1d, 0xd0, 0xbd, 0x5d, + 0x45, 0x66, 0xc9, 0xbe, 0xd9, 0xce, 0x7d, 0xe7, 0x01, 0xb5, 0xe8, 0x2e, + 0x08, 0xe8, 0x4b, 0x73, 0x04, 0x66, 0x01, 0x8a, 0xb9, 0x03, 0xc7, 0x9e, + 0xb9, 0x82, 0x17, 0x22, 0x36, 0xc0, 0xc1, 0x72, 0x8a, 0xe4, 0xbf, 0x73, + 0x61, 0x0d, 0x34, 0xde, 0x44, 0x24, 0x6e, 0xf3, 0xd9, 0xc0, 0x5a, 0x22, + 0x36, 0xfb, 0x66, 0xa6, 0x58, 0x3d, 0x74, 0x49, 0x30, 0x8b, 0xab, 0xce, + 0x20, 0x72, 0xfe, 0x16, 0x66, 0x29, 0x92, 0xe9, 0x23, 0x5c, 0x25, 0x00, + 0x2f, 0x11, 0xb1, 0x50, 0x87, 0xb8, 0x27, 0x38, 0xe0, 0x3c, 0x94, 0x5b, + 0xf7, 0xa2, 0x99, 0x5d, 0xda, 0x1e, 0x98, 0x34, 0x58, 0x41, 0x04, 0x7e, + 0xa6, 0xe3, 0xa4, 0x48, 0x70, 0x37, 0xa9, 0xe0, 0xdb, 0xd7, 0x92, 0x62, + 0xb2, 0xcc, 0x27, 0x3e, 0x77, 0x99, 0x30, 0xfc, 0x18, 0x40, 0x9a, 0xc5, + 0x36, 0x1c, 0x5f, 0xe6, 0x69, 0xd7, 0x02, 0xe1, 0x47, 0x79, 0x0a, 0xeb, + 0x4c, 0xe7, 0xfd, 0x65, 0x75, 0xab, 0x0f, 0x6c, 0x7f, 0xd1, 0xc3, 0x35, + 0x93, 0x9a, 0xa8, 0x63, 0xba, 0x37, 0xec, 0x91, 0xb7, 0xe3, 0x2b, 0xb0, + 0x13, 0xbb, 0x2b, 0x41, 0x04, 0xa4, 0x95, 0x58, 0xd3, 0x2e, 0xd1, 0xeb, + 0xfc, 0x18, 0x16, 0xaf, 0x4f, 0xf0, 0x9b, 0x55, 0xfc, 0xb4, 0xca, 0x47, + 0xb2, 0xa0, 0x2d, 0x1e, 0x7c, 0xaf, 0x11, 0x79, 0xea, 0x3f, 0xe1, 0x39, + 0x5b, 0x22, 0xb8, 0x61, 0x96, 0x40, 0x16, 0xfa, 0xba, 0xf7, 0x2c, 0x97, + 0x56, 0x95, 0xd9, 0x3d, 0x4d, 0xf0, 0xe5, 0x19, 0x7f, 0xe9, 0xf0, 0x40, + 0x63, 0x4e, 0xd5, 0x97, 0x64, 0x93, 0x77, 0x87, 0xbe, 0x20, 0xbc, 0x4d, + 0xee, 0xbb, 0xf9, 0xb8, 0xd6, 0x0a, 0x33, 0x5f, 0x04, 0x6c, 0xa3, 0xaa, + 0x94, 0x1e, 0x45, 0x86, 0x4c, 0x7c, 0xad, 0xef, 0x9c, 0xf7, 0x5b, 0x3d, + 0x8b, 0x01, 0x0e, 0x44, 0x3e, 0xf0 +}; + +static const unsigned char ecjpake_test_srv_one[] = { + 0x41, 0x04, 0x7e, 0xa6, 0xe3, 0xa4, 0x48, 0x70, 0x37, 0xa9, 0xe0, 0xdb, + 0xd7, 0x92, 0x62, 0xb2, 0xcc, 0x27, 0x3e, 0x77, 0x99, 0x30, 0xfc, 0x18, + 0x40, 0x9a, 0xc5, 0x36, 0x1c, 0x5f, 0xe6, 0x69, 0xd7, 0x02, 0xe1, 0x47, + 0x79, 0x0a, 0xeb, 0x4c, 0xe7, 0xfd, 0x65, 0x75, 0xab, 0x0f, 0x6c, 0x7f, + 0xd1, 0xc3, 0x35, 0x93, 0x9a, 0xa8, 0x63, 0xba, 0x37, 0xec, 0x91, 0xb7, + 0xe3, 0x2b, 0xb0, 0x13, 0xbb, 0x2b, 0x41, 0x04, 0x09, 0xf8, 0x5b, 0x3d, + 0x20, 0xeb, 0xd7, 0x88, 0x5c, 0xe4, 0x64, 0xc0, 0x8d, 0x05, 0x6d, 0x64, + 0x28, 0xfe, 0x4d, 0xd9, 0x28, 0x7a, 0xa3, 0x65, 0xf1, 0x31, 0xf4, 0x36, + 0x0f, 0xf3, 0x86, 0xd8, 0x46, 0x89, 0x8b, 0xc4, 0xb4, 0x15, 0x83, 0xc2, + 0xa5, 0x19, 0x7f, 0x65, 0xd7, 0x87, 0x42, 0x74, 0x6c, 0x12, 0xa5, 0xec, + 0x0a, 0x4f, 0xfe, 0x2f, 0x27, 0x0a, 0x75, 0x0a, 0x1d, 0x8f, 0xb5, 0x16, + 0x20, 0x93, 0x4d, 0x74, 0xeb, 0x43, 0xe5, 0x4d, 0xf4, 0x24, 0xfd, 0x96, + 0x30, 0x6c, 0x01, 0x17, 0xbf, 0x13, 0x1a, 0xfa, 0xbf, 0x90, 0xa9, 0xd3, + 0x3d, 0x11, 0x98, 0xd9, 0x05, 0x19, 0x37, 0x35, 0x14, 0x41, 0x04, 0x19, + 0x0a, 0x07, 0x70, 0x0f, 0xfa, 0x4b, 0xe6, 0xae, 0x1d, 0x79, 0xee, 0x0f, + 0x06, 0xae, 0xb5, 0x44, 0xcd, 0x5a, 0xdd, 0xaa, 0xbe, 0xdf, 0x70, 0xf8, + 0x62, 0x33, 0x21, 0x33, 0x2c, 0x54, 0xf3, 0x55, 0xf0, 0xfb, 0xfe, 0xc7, + 0x83, 0xed, 0x35, 0x9e, 0x5d, 0x0b, 0xf7, 0x37, 0x7a, 0x0f, 0xc4, 0xea, + 0x7a, 0xce, 0x47, 0x3c, 0x9c, 0x11, 0x2b, 0x41, 0xcc, 0xd4, 0x1a, 0xc5, + 0x6a, 0x56, 0x12, 0x41, 0x04, 0x36, 0x0a, 0x1c, 0xea, 0x33, 0xfc, 0xe6, + 0x41, 0x15, 0x64, 0x58, 0xe0, 0xa4, 0xea, 0xc2, 0x19, 0xe9, 0x68, 0x31, + 0xe6, 0xae, 0xbc, 0x88, 0xb3, 0xf3, 0x75, 0x2f, 0x93, 0xa0, 0x28, 0x1d, + 0x1b, 0xf1, 0xfb, 0x10, 0x60, 0x51, 0xdb, 0x96, 0x94, 0xa8, 0xd6, 0xe8, + 0x62, 0xa5, 0xef, 0x13, 0x24, 0xa3, 0xd9, 0xe2, 0x78, 0x94, 0xf1, 0xee, + 0x4f, 0x7c, 0x59, 0x19, 0x99, 0x65, 0xa8, 0xdd, 0x4a, 0x20, 0x91, 0x84, + 0x7d, 0x2d, 0x22, 0xdf, 0x3e, 0xe5, 0x5f, 0xaa, 0x2a, 0x3f, 0xb3, 0x3f, + 0xd2, 0xd1, 0xe0, 0x55, 0xa0, 0x7a, 0x7c, 0x61, 0xec, 0xfb, 0x8d, 0x80, + 0xec, 0x00, 0xc2, 0xc9, 0xeb, 0x12 +}; + +static const unsigned char ecjpake_test_srv_two[] = { + 0x03, 0x00, 0x17, 0x41, 0x04, 0x0f, 0xb2, 0x2b, 0x1d, 0x5d, 0x11, 0x23, + 0xe0, 0xef, 0x9f, 0xeb, 0x9d, 0x8a, 0x2e, 0x59, 0x0a, 0x1f, 0x4d, 0x7c, + 0xed, 0x2c, 0x2b, 0x06, 0x58, 0x6e, 0x8f, 0x2a, 0x16, 0xd4, 0xeb, 0x2f, + 0xda, 0x43, 0x28, 0xa2, 0x0b, 0x07, 0xd8, 0xfd, 0x66, 0x76, 0x54, 0xca, + 0x18, 0xc5, 0x4e, 0x32, 0xa3, 0x33, 0xa0, 0x84, 0x54, 0x51, 0xe9, 0x26, + 0xee, 0x88, 0x04, 0xfd, 0x7a, 0xf0, 0xaa, 0xa7, 0xa6, 0x41, 0x04, 0x55, + 0x16, 0xea, 0x3e, 0x54, 0xa0, 0xd5, 0xd8, 0xb2, 0xce, 0x78, 0x6b, 0x38, + 0xd3, 0x83, 0x37, 0x00, 0x29, 0xa5, 0xdb, 0xe4, 0x45, 0x9c, 0x9d, 0xd6, + 0x01, 0xb4, 0x08, 0xa2, 0x4a, 0xe6, 0x46, 0x5c, 0x8a, 0xc9, 0x05, 0xb9, + 0xeb, 0x03, 0xb5, 0xd3, 0x69, 0x1c, 0x13, 0x9e, 0xf8, 0x3f, 0x1c, 0xd4, + 0x20, 0x0f, 0x6c, 0x9c, 0xd4, 0xec, 0x39, 0x22, 0x18, 0xa5, 0x9e, 0xd2, + 0x43, 0xd3, 0xc8, 0x20, 0xff, 0x72, 0x4a, 0x9a, 0x70, 0xb8, 0x8c, 0xb8, + 0x6f, 0x20, 0xb4, 0x34, 0xc6, 0x86, 0x5a, 0xa1, 0xcd, 0x79, 0x06, 0xdd, + 0x7c, 0x9b, 0xce, 0x35, 0x25, 0xf5, 0x08, 0x27, 0x6f, 0x26, 0x83, 0x6c +}; + +static const unsigned char ecjpake_test_cli_two[] = { + 0x41, 0x04, 0x69, 0xd5, 0x4e, 0xe8, 0x5e, 0x90, 0xce, 0x3f, 0x12, 0x46, + 0x74, 0x2d, 0xe5, 0x07, 0xe9, 0x39, 0xe8, 0x1d, 0x1d, 0xc1, 0xc5, 0xcb, + 0x98, 0x8b, 0x58, 0xc3, 0x10, 0xc9, 0xfd, 0xd9, 0x52, 0x4d, 0x93, 0x72, + 0x0b, 0x45, 0x54, 0x1c, 0x83, 0xee, 0x88, 0x41, 0x19, 0x1d, 0xa7, 0xce, + 0xd8, 0x6e, 0x33, 0x12, 0xd4, 0x36, 0x23, 0xc1, 0xd6, 0x3e, 0x74, 0x98, + 0x9a, 0xba, 0x4a, 0xff, 0xd1, 0xee, 0x41, 0x04, 0x07, 0x7e, 0x8c, 0x31, + 0xe2, 0x0e, 0x6b, 0xed, 0xb7, 0x60, 0xc1, 0x35, 0x93, 0xe6, 0x9f, 0x15, + 0xbe, 0x85, 0xc2, 0x7d, 0x68, 0xcd, 0x09, 0xcc, 0xb8, 0xc4, 0x18, 0x36, + 0x08, 0x91, 0x7c, 0x5c, 0x3d, 0x40, 0x9f, 0xac, 0x39, 0xfe, 0xfe, 0xe8, + 0x2f, 0x72, 0x92, 0xd3, 0x6f, 0x0d, 0x23, 0xe0, 0x55, 0x91, 0x3f, 0x45, + 0xa5, 0x2b, 0x85, 0xdd, 0x8a, 0x20, 0x52, 0xe9, 0xe1, 0x29, 0xbb, 0x4d, + 0x20, 0x0f, 0x01, 0x1f, 0x19, 0x48, 0x35, 0x35, 0xa6, 0xe8, 0x9a, 0x58, + 0x0c, 0x9b, 0x00, 0x03, 0xba, 0xf2, 0x14, 0x62, 0xec, 0xe9, 0x1a, 0x82, + 0xcc, 0x38, 0xdb, 0xdc, 0xae, 0x60, 0xd9, 0xc5, 0x4c +}; + +static const unsigned char ecjpake_test_pms[] = { + 0xf3, 0xd4, 0x7f, 0x59, 0x98, 0x44, 0xdb, 0x92, 0xa5, 0x69, 0xbb, 0xe7, + 0x98, 0x1e, 0x39, 0xd9, 0x31, 0xfd, 0x74, 0x3b, 0xf2, 0x2e, 0x98, 0xf9, + 0xb4, 0x38, 0xf7, 0x19, 0xd3, 0xc4, 0xf3, 0x51 +}; + +/* Load my private keys and generate the correponding public keys */ +static int ecjpake_test_load( mbedtls_ecjpake_context *ctx, + const unsigned char *xm1, size_t len1, + const unsigned char *xm2, size_t len2 ) +{ + int ret; + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->xm1, xm1, len1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->xm2, xm2, len2 ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &ctx->grp, &ctx->Xm1, &ctx->xm1, + &ctx->grp.G, NULL, NULL ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &ctx->grp, &ctx->Xm2, &ctx->xm2, + &ctx->grp.G, NULL, NULL ) ); + +cleanup: + return( ret ); +} + +/* For tests we don't need a secure RNG; + * use the LGC from Numerical Recipes for simplicity */ +static int ecjpake_lgc( void *p, unsigned char *out, size_t len ) +{ + static uint32_t x = 42; + (void) p; + + while( len > 0 ) + { + size_t use_len = len > 4 ? 4 : len; + x = 1664525 * x + 1013904223; + memcpy( out, &x, use_len ); + out += use_len; + len -= use_len; + } + + return( 0 ); +} + +#define TEST_ASSERT( x ) \ + do { \ + if( x ) \ + ret = 0; \ + else \ + { \ + ret = 1; \ + goto cleanup; \ + } \ + } while( 0 ) + +/* + * Checkup routine + */ +int mbedtls_ecjpake_self_test( int verbose ) +{ + int ret; + mbedtls_ecjpake_context cli; + mbedtls_ecjpake_context srv; + unsigned char buf[512], pms[32]; + size_t len, pmslen; + + mbedtls_ecjpake_init( &cli ); + mbedtls_ecjpake_init( &srv ); + + if( verbose != 0 ) + mbedtls_printf( " ECJPAKE test #0 (setup): " ); + + TEST_ASSERT( mbedtls_ecjpake_setup( &cli, MBEDTLS_ECJPAKE_CLIENT, + MBEDTLS_MD_SHA256, MBEDTLS_ECP_DP_SECP256R1, + ecjpake_test_password, + sizeof( ecjpake_test_password ) ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_setup( &srv, MBEDTLS_ECJPAKE_SERVER, + MBEDTLS_MD_SHA256, MBEDTLS_ECP_DP_SECP256R1, + ecjpake_test_password, + sizeof( ecjpake_test_password ) ) == 0 ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " ECJPAKE test #1 (random handshake): " ); + + TEST_ASSERT( mbedtls_ecjpake_write_round_one( &cli, + buf, sizeof( buf ), &len, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_read_round_one( &srv, buf, len ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_write_round_one( &srv, + buf, sizeof( buf ), &len, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_read_round_one( &cli, buf, len ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_write_round_two( &srv, + buf, sizeof( buf ), &len, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_read_round_two( &cli, buf, len ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_derive_secret( &cli, + pms, sizeof( pms ), &pmslen, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_write_round_two( &cli, + buf, sizeof( buf ), &len, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_read_round_two( &srv, buf, len ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_derive_secret( &srv, + buf, sizeof( buf ), &len, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( len == pmslen ); + TEST_ASSERT( memcmp( buf, pms, len ) == 0 ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " ECJPAKE test #2 (reference handshake): " ); + + /* Simulate generation of round one */ + MBEDTLS_MPI_CHK( ecjpake_test_load( &cli, + ecjpake_test_x1, sizeof( ecjpake_test_x1 ), + ecjpake_test_x2, sizeof( ecjpake_test_x2 ) ) ); + + MBEDTLS_MPI_CHK( ecjpake_test_load( &srv, + ecjpake_test_x3, sizeof( ecjpake_test_x3 ), + ecjpake_test_x4, sizeof( ecjpake_test_x4 ) ) ); + + /* Read round one */ + TEST_ASSERT( mbedtls_ecjpake_read_round_one( &srv, + ecjpake_test_cli_one, + sizeof( ecjpake_test_cli_one ) ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_read_round_one( &cli, + ecjpake_test_srv_one, + sizeof( ecjpake_test_srv_one ) ) == 0 ); + + /* Skip generation of round two, read round two */ + TEST_ASSERT( mbedtls_ecjpake_read_round_two( &cli, + ecjpake_test_srv_two, + sizeof( ecjpake_test_srv_two ) ) == 0 ); + + TEST_ASSERT( mbedtls_ecjpake_read_round_two( &srv, + ecjpake_test_cli_two, + sizeof( ecjpake_test_cli_two ) ) == 0 ); + + /* Server derives PMS */ + TEST_ASSERT( mbedtls_ecjpake_derive_secret( &srv, + buf, sizeof( buf ), &len, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( len == sizeof( ecjpake_test_pms ) ); + TEST_ASSERT( memcmp( buf, ecjpake_test_pms, len ) == 0 ); + + memset( buf, 0, len ); /* Avoid interferences with next step */ + + /* Client derives PMS */ + TEST_ASSERT( mbedtls_ecjpake_derive_secret( &cli, + buf, sizeof( buf ), &len, ecjpake_lgc, NULL ) == 0 ); + + TEST_ASSERT( len == sizeof( ecjpake_test_pms ) ); + TEST_ASSERT( memcmp( buf, ecjpake_test_pms, len ) == 0 ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + +cleanup: + mbedtls_ecjpake_free( &cli ); + mbedtls_ecjpake_free( &srv ); + + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( ret ); +} + +#undef TEST_ASSERT + +#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED && MBEDTLS_SHA256_C */ + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_ECJPAKE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecp.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecp.c new file mode 100644 index 0000000..19bb488 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecp.c @@ -0,0 +1,2090 @@ +/* + * Elliptic curves over GF(p): generic functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * References: + * + * SEC1 http://www.secg.org/index.php?action=secg,docs_secg + * GECC = Guide to Elliptic Curve Cryptography - Hankerson, Menezes, Vanstone + * FIPS 186-3 http://csrc.nist.gov/publications/fips/fips186-3/fips_186-3.pdf + * RFC 4492 for the related TLS structures and constants + * + * [Curve25519] http://cr.yp.to/ecdh/curve25519-20060209.pdf + * + * [2] CORON, Jean-S'ebastien. Resistance against differential power analysis + * for elliptic curve cryptosystems. In : Cryptographic Hardware and + * Embedded Systems. Springer Berlin Heidelberg, 1999. p. 292-302. + * + * + * [3] HEDABOU, Mustapha, PINEL, Pierre, et B'EN'ETEAU, Lucien. A comb method to + * render ECC resistant against Side Channel Attacks. IACR Cryptology + * ePrint Archive, 2004, vol. 2004, p. 342. + * + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ECP_C) + +#include "mbedtls/ecp.h" + +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#include +#define mbedtls_printf printf +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +#if defined(MBEDTLS_SELF_TEST) +/* + * Counts of point addition and doubling, and field multiplications. + * Used to test resistance of point multiplication to simple timing attacks. + */ +static unsigned long add_count, dbl_count, mul_count; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) +#define ECP_SHORTWEIERSTRASS +#endif + +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) +#define ECP_MONTGOMERY +#endif + +/* + * Curve types: internal for now, might be exposed later + */ +typedef enum +{ + ECP_TYPE_NONE = 0, + ECP_TYPE_SHORT_WEIERSTRASS, /* y^2 = x^3 + a x + b */ + ECP_TYPE_MONTGOMERY, /* y^2 = x^3 + a x^2 + x */ +} ecp_curve_type; + +/* + * List of supported curves: + * - internal ID + * - TLS NamedCurve ID (RFC 4492 sec. 5.1.1, RFC 7071 sec. 2) + * - size in bits + * - readable name + * + * Curves are listed in order: largest curves first, and for a given size, + * fastest curves first. This provides the default order for the SSL module. + * + * Reminder: update profiles in x509_crt.c when adding a new curves! + */ +static const mbedtls_ecp_curve_info ecp_supported_curves[] = +{ +#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) + { MBEDTLS_ECP_DP_SECP521R1, 25, 521, "secp521r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) + { MBEDTLS_ECP_DP_BP512R1, 28, 512, "brainpoolP512r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) + { MBEDTLS_ECP_DP_SECP384R1, 24, 384, "secp384r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) + { MBEDTLS_ECP_DP_BP384R1, 27, 384, "brainpoolP384r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) + { MBEDTLS_ECP_DP_SECP256R1, 23, 256, "secp256r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) + { MBEDTLS_ECP_DP_SECP256K1, 22, 256, "secp256k1" }, +#endif +#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) + { MBEDTLS_ECP_DP_BP256R1, 26, 256, "brainpoolP256r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) + { MBEDTLS_ECP_DP_SECP224R1, 21, 224, "secp224r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) + { MBEDTLS_ECP_DP_SECP224K1, 20, 224, "secp224k1" }, +#endif +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) + { MBEDTLS_ECP_DP_SECP192R1, 19, 192, "secp192r1" }, +#endif +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) + { MBEDTLS_ECP_DP_SECP192K1, 18, 192, "secp192k1" }, +#endif + { MBEDTLS_ECP_DP_NONE, 0, 0, NULL }, +}; + +#define ECP_NB_CURVES sizeof( ecp_supported_curves ) / \ + sizeof( ecp_supported_curves[0] ) + +static mbedtls_ecp_group_id ecp_supported_grp_id[ECP_NB_CURVES]; + +/* + * List of supported curves and associated info + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void ) +{ + return( ecp_supported_curves ); +} + +/* + * List of supported curves, group ID only + */ +const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void ) +{ + static int init_done = 0; + + if( ! init_done ) + { + size_t i = 0; + const mbedtls_ecp_curve_info *curve_info; + + for( curve_info = mbedtls_ecp_curve_list(); + curve_info->grp_id != MBEDTLS_ECP_DP_NONE; + curve_info++ ) + { + ecp_supported_grp_id[i++] = curve_info->grp_id; + } + ecp_supported_grp_id[i] = MBEDTLS_ECP_DP_NONE; + + init_done = 1; + } + + return( ecp_supported_grp_id ); +} + +/* + * Get the curve info for the internal identifier + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id( mbedtls_ecp_group_id grp_id ) +{ + const mbedtls_ecp_curve_info *curve_info; + + for( curve_info = mbedtls_ecp_curve_list(); + curve_info->grp_id != MBEDTLS_ECP_DP_NONE; + curve_info++ ) + { + if( curve_info->grp_id == grp_id ) + return( curve_info ); + } + + return( NULL ); +} + +/* + * Get the curve info from the TLS identifier + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id( uint16_t tls_id ) +{ + const mbedtls_ecp_curve_info *curve_info; + + for( curve_info = mbedtls_ecp_curve_list(); + curve_info->grp_id != MBEDTLS_ECP_DP_NONE; + curve_info++ ) + { + if( curve_info->tls_id == tls_id ) + return( curve_info ); + } + + return( NULL ); +} + +/* + * Get the curve info from the name + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name( const char *name ) +{ + const mbedtls_ecp_curve_info *curve_info; + + for( curve_info = mbedtls_ecp_curve_list(); + curve_info->grp_id != MBEDTLS_ECP_DP_NONE; + curve_info++ ) + { + if( strcmp( curve_info->name, name ) == 0 ) + return( curve_info ); + } + + return( NULL ); +} + +/* + * Get the type of a curve + */ +static inline ecp_curve_type ecp_get_type( const mbedtls_ecp_group *grp ) +{ + if( grp->G.X.p == NULL ) + return( ECP_TYPE_NONE ); + + if( grp->G.Y.p == NULL ) + return( ECP_TYPE_MONTGOMERY ); + else + return( ECP_TYPE_SHORT_WEIERSTRASS ); +} + +/* + * Initialize (the components of) a point + */ +void mbedtls_ecp_point_init( mbedtls_ecp_point *pt ) +{ + if( pt == NULL ) + return; + + mbedtls_mpi_init( &pt->X ); + mbedtls_mpi_init( &pt->Y ); + mbedtls_mpi_init( &pt->Z ); +} + +/* + * Initialize (the components of) a group + */ +void mbedtls_ecp_group_init( mbedtls_ecp_group *grp ) +{ + if( grp == NULL ) + return; + + memset( grp, 0, sizeof( mbedtls_ecp_group ) ); +} + +/* + * Initialize (the components of) a key pair + */ +void mbedtls_ecp_keypair_init( mbedtls_ecp_keypair *key ) +{ + if( key == NULL ) + return; + + mbedtls_ecp_group_init( &key->grp ); + mbedtls_mpi_init( &key->d ); + mbedtls_ecp_point_init( &key->Q ); +} + +/* + * Unallocate (the components of) a point + */ +void mbedtls_ecp_point_free( mbedtls_ecp_point *pt ) +{ + if( pt == NULL ) + return; + + mbedtls_mpi_free( &( pt->X ) ); + mbedtls_mpi_free( &( pt->Y ) ); + mbedtls_mpi_free( &( pt->Z ) ); +} + +/* + * Unallocate (the components of) a group + */ +void mbedtls_ecp_group_free( mbedtls_ecp_group *grp ) +{ + size_t i; + + if( grp == NULL ) + return; + + if( grp->h != 1 ) + { + mbedtls_mpi_free( &grp->P ); + mbedtls_mpi_free( &grp->A ); + mbedtls_mpi_free( &grp->B ); + mbedtls_ecp_point_free( &grp->G ); + mbedtls_mpi_free( &grp->N ); + } + + if( grp->T != NULL ) + { + for( i = 0; i < grp->T_size; i++ ) + mbedtls_ecp_point_free( &grp->T[i] ); + mbedtls_free( grp->T ); + } + + mbedtls_zeroize( grp, sizeof( mbedtls_ecp_group ) ); +} + +/* + * Unallocate (the components of) a key pair + */ +void mbedtls_ecp_keypair_free( mbedtls_ecp_keypair *key ) +{ + if( key == NULL ) + return; + + mbedtls_ecp_group_free( &key->grp ); + mbedtls_mpi_free( &key->d ); + mbedtls_ecp_point_free( &key->Q ); +} + +/* + * Copy the contents of a point + */ +int mbedtls_ecp_copy( mbedtls_ecp_point *P, const mbedtls_ecp_point *Q ) +{ + int ret; + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->X, &Q->X ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->Y, &Q->Y ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->Z, &Q->Z ) ); + +cleanup: + return( ret ); +} + +/* + * Copy the contents of a group object + */ +int mbedtls_ecp_group_copy( mbedtls_ecp_group *dst, const mbedtls_ecp_group *src ) +{ + return mbedtls_ecp_group_load( dst, src->id ); +} + +/* + * Set point to zero + */ +int mbedtls_ecp_set_zero( mbedtls_ecp_point *pt ) +{ + int ret; + + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->X , 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Y , 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z , 0 ) ); + +cleanup: + return( ret ); +} + +/* + * Tell if a point is zero + */ +int mbedtls_ecp_is_zero( mbedtls_ecp_point *pt ) +{ + return( mbedtls_mpi_cmp_int( &pt->Z, 0 ) == 0 ); +} + +/* + * Compare two points lazyly + */ +int mbedtls_ecp_point_cmp( const mbedtls_ecp_point *P, + const mbedtls_ecp_point *Q ) +{ + if( mbedtls_mpi_cmp_mpi( &P->X, &Q->X ) == 0 && + mbedtls_mpi_cmp_mpi( &P->Y, &Q->Y ) == 0 && + mbedtls_mpi_cmp_mpi( &P->Z, &Q->Z ) == 0 ) + { + return( 0 ); + } + + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); +} + +/* + * Import a non-zero point from ASCII strings + */ +int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix, + const char *x, const char *y ) +{ + int ret; + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &P->X, radix, x ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &P->Y, radix, y ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &P->Z, 1 ) ); + +cleanup: + return( ret ); +} + +/* + * Export a point into unsigned binary data (SEC1 2.3.3) + */ +int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *P, + int format, size_t *olen, + unsigned char *buf, size_t buflen ) +{ + int ret = 0; + size_t plen; + + if( format != MBEDTLS_ECP_PF_UNCOMPRESSED && + format != MBEDTLS_ECP_PF_COMPRESSED ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * Common case: P == 0 + */ + if( mbedtls_mpi_cmp_int( &P->Z, 0 ) == 0 ) + { + if( buflen < 1 ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + buf[0] = 0x00; + *olen = 1; + + return( 0 ); + } + + plen = mbedtls_mpi_size( &grp->P ); + + if( format == MBEDTLS_ECP_PF_UNCOMPRESSED ) + { + *olen = 2 * plen + 1; + + if( buflen < *olen ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + buf[0] = 0x04; + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->X, buf + 1, plen ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->Y, buf + 1 + plen, plen ) ); + } + else if( format == MBEDTLS_ECP_PF_COMPRESSED ) + { + *olen = plen + 1; + + if( buflen < *olen ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + buf[0] = 0x02 + mbedtls_mpi_get_bit( &P->Y, 0 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->X, buf + 1, plen ) ); + } + +cleanup: + return( ret ); +} + +/* + * Import a point from unsigned binary data (SEC1 2.3.4) + */ +int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt, + const unsigned char *buf, size_t ilen ) +{ + int ret; + size_t plen; + + if( ilen < 1 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( buf[0] == 0x00 ) + { + if( ilen == 1 ) + return( mbedtls_ecp_set_zero( pt ) ); + else + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + } + + plen = mbedtls_mpi_size( &grp->P ); + + if( buf[0] != 0x04 ) + return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + + if( ilen != 2 * plen + 1 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &pt->X, buf + 1, plen ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &pt->Y, buf + 1 + plen, plen ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z, 1 ) ); + +cleanup: + return( ret ); +} + +/* + * Import a point from a TLS ECPoint record (RFC 4492) + * struct { + * opaque point <1..2^8-1>; + * } ECPoint; + */ +int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt, + const unsigned char **buf, size_t buf_len ) +{ + unsigned char data_len; + const unsigned char *buf_start; + + /* + * We must have at least two bytes (1 for length, at least one for data) + */ + if( buf_len < 2 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + data_len = *(*buf)++; + if( data_len < 1 || data_len > buf_len - 1 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * Save buffer start for read_binary and update buf + */ + buf_start = *buf; + *buf += data_len; + + return mbedtls_ecp_point_read_binary( grp, pt, buf_start, data_len ); +} + +/* + * Export a point as a TLS ECPoint record (RFC 4492) + * struct { + * opaque point <1..2^8-1>; + * } ECPoint; + */ +int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt, + int format, size_t *olen, + unsigned char *buf, size_t blen ) +{ + int ret; + + /* + * buffer length must be at least one, for our length byte + */ + if( blen < 1 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_ecp_point_write_binary( grp, pt, format, + olen, buf + 1, blen - 1) ) != 0 ) + return( ret ); + + /* + * write length to the first byte and update total length + */ + buf[0] = (unsigned char) *olen; + ++*olen; + + return( 0 ); +} + +/* + * Set a group from an ECParameters record (RFC 4492) + */ +int mbedtls_ecp_tls_read_group( mbedtls_ecp_group *grp, const unsigned char **buf, size_t len ) +{ + uint16_t tls_id; + const mbedtls_ecp_curve_info *curve_info; + + /* + * We expect at least three bytes (see below) + */ + if( len < 3 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * First byte is curve_type; only named_curve is handled + */ + if( *(*buf)++ != MBEDTLS_ECP_TLS_NAMED_CURVE ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * Next two bytes are the namedcurve value + */ + tls_id = *(*buf)++; + tls_id <<= 8; + tls_id |= *(*buf)++; + + if( ( curve_info = mbedtls_ecp_curve_info_from_tls_id( tls_id ) ) == NULL ) + return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + + return mbedtls_ecp_group_load( grp, curve_info->grp_id ); +} + +/* + * Write the ECParameters record corresponding to a group (RFC 4492) + */ +int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp, size_t *olen, + unsigned char *buf, size_t blen ) +{ + const mbedtls_ecp_curve_info *curve_info; + + if( ( curve_info = mbedtls_ecp_curve_info_from_grp_id( grp->id ) ) == NULL ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * We are going to write 3 bytes (see below) + */ + *olen = 3; + if( blen < *olen ) + return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + + /* + * First byte is curve_type, always named_curve + */ + *buf++ = MBEDTLS_ECP_TLS_NAMED_CURVE; + + /* + * Next two bytes are the namedcurve value + */ + buf[0] = curve_info->tls_id >> 8; + buf[1] = curve_info->tls_id & 0xFF; + + return( 0 ); +} + +/* + * Wrapper around fast quasi-modp functions, with fall-back to mbedtls_mpi_mod_mpi. + * See the documentation of struct mbedtls_ecp_group. + * + * This function is in the critial loop for mbedtls_ecp_mul, so pay attention to perf. + */ +static int ecp_modp( mbedtls_mpi *N, const mbedtls_ecp_group *grp ) +{ + int ret; + + if( grp->modp == NULL ) + return( mbedtls_mpi_mod_mpi( N, N, &grp->P ) ); + + /* N->s < 0 is a much faster test, which fails only if N is 0 */ + if( ( N->s < 0 && mbedtls_mpi_cmp_int( N, 0 ) != 0 ) || + mbedtls_mpi_bitlen( N ) > 2 * grp->pbits ) + { + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + } + + MBEDTLS_MPI_CHK( grp->modp( N ) ); + + /* N->s < 0 is a much faster test, which fails only if N is 0 */ + while( N->s < 0 && mbedtls_mpi_cmp_int( N, 0 ) != 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( N, N, &grp->P ) ); + + while( mbedtls_mpi_cmp_mpi( N, &grp->P ) >= 0 ) + /* we known P, N and the result are positive */ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( N, N, &grp->P ) ); + +cleanup: + return( ret ); +} + +/* + * Fast mod-p functions expect their argument to be in the 0..p^2 range. + * + * In order to guarantee that, we need to ensure that operands of + * mbedtls_mpi_mul_mpi are in the 0..p range. So, after each operation we will + * bring the result back to this range. + * + * The following macros are shortcuts for doing that. + */ + +/* + * Reduce a mbedtls_mpi mod p in-place, general case, to use after mbedtls_mpi_mul_mpi + */ +#if defined(MBEDTLS_SELF_TEST) +#define INC_MUL_COUNT mul_count++; +#else +#define INC_MUL_COUNT +#endif + +#define MOD_MUL( N ) do { MBEDTLS_MPI_CHK( ecp_modp( &N, grp ) ); INC_MUL_COUNT } \ + while( 0 ) + +/* + * Reduce a mbedtls_mpi mod p in-place, to use after mbedtls_mpi_sub_mpi + * N->s < 0 is a very fast test, which fails only if N is 0 + */ +#define MOD_SUB( N ) \ + while( N.s < 0 && mbedtls_mpi_cmp_int( &N, 0 ) != 0 ) \ + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &N, &N, &grp->P ) ) + +/* + * Reduce a mbedtls_mpi mod p in-place, to use after mbedtls_mpi_add_mpi and mbedtls_mpi_mul_int. + * We known P, N and the result are positive, so sub_abs is correct, and + * a bit faster. + */ +#define MOD_ADD( N ) \ + while( mbedtls_mpi_cmp_mpi( &N, &grp->P ) >= 0 ) \ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( &N, &N, &grp->P ) ) + +#if defined(ECP_SHORTWEIERSTRASS) +/* + * For curves in short Weierstrass form, we do all the internal operations in + * Jacobian coordinates. + * + * For multiplication, we'll use a comb method with coutermeasueres against + * SPA, hence timing attacks. + */ + +/* + * Normalize jacobian coordinates so that Z == 0 || Z == 1 (GECC 3.2.1) + * Cost: 1N := 1I + 3M + 1S + */ +static int ecp_normalize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt ) +{ + int ret; + mbedtls_mpi Zi, ZZi; + + if( mbedtls_mpi_cmp_int( &pt->Z, 0 ) == 0 ) + return( 0 ); + + mbedtls_mpi_init( &Zi ); mbedtls_mpi_init( &ZZi ); + + /* + * X = X / Z^2 mod p + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &Zi, &pt->Z, &grp->P ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ZZi, &Zi, &Zi ) ); MOD_MUL( ZZi ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->X, &pt->X, &ZZi ) ); MOD_MUL( pt->X ); + + /* + * Y = Y / Z^3 mod p + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Y, &pt->Y, &ZZi ) ); MOD_MUL( pt->Y ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Y, &pt->Y, &Zi ) ); MOD_MUL( pt->Y ); + + /* + * Z = 1 + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z, 1 ) ); + +cleanup: + + mbedtls_mpi_free( &Zi ); mbedtls_mpi_free( &ZZi ); + + return( ret ); +} + +/* + * Normalize jacobian coordinates of an array of (pointers to) points, + * using Montgomery's trick to perform only one inversion mod P. + * (See for example Cohen's "A Course in Computational Algebraic Number + * Theory", Algorithm 10.3.4.) + * + * Warning: fails (returning an error) if one of the points is zero! + * This should never happen, see choice of w in ecp_mul_comb(). + * + * Cost: 1N(t) := 1I + (6t - 3)M + 1S + */ +static int ecp_normalize_jac_many( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *T[], size_t t_len ) +{ + int ret; + size_t i; + mbedtls_mpi *c, u, Zi, ZZi; + + if( t_len < 2 ) + return( ecp_normalize_jac( grp, *T ) ); + + if( ( c = mbedtls_calloc( t_len, sizeof( mbedtls_mpi ) ) ) == NULL ) + return( MBEDTLS_ERR_ECP_ALLOC_FAILED ); + + mbedtls_mpi_init( &u ); mbedtls_mpi_init( &Zi ); mbedtls_mpi_init( &ZZi ); + + /* + * c[i] = Z_0 * ... * Z_i + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &c[0], &T[0]->Z ) ); + for( i = 1; i < t_len; i++ ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &c[i], &c[i-1], &T[i]->Z ) ); + MOD_MUL( c[i] ); + } + + /* + * u = 1 / (Z_0 * ... * Z_n) mod P + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &u, &c[t_len-1], &grp->P ) ); + + for( i = t_len - 1; ; i-- ) + { + /* + * Zi = 1 / Z_i mod p + * u = 1 / (Z_0 * ... * Z_i) mod P + */ + if( i == 0 ) { + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Zi, &u ) ); + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &Zi, &u, &c[i-1] ) ); MOD_MUL( Zi ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &u, &u, &T[i]->Z ) ); MOD_MUL( u ); + } + + /* + * proceed as in normalize() + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ZZi, &Zi, &Zi ) ); MOD_MUL( ZZi ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T[i]->X, &T[i]->X, &ZZi ) ); MOD_MUL( T[i]->X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T[i]->Y, &T[i]->Y, &ZZi ) ); MOD_MUL( T[i]->Y ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T[i]->Y, &T[i]->Y, &Zi ) ); MOD_MUL( T[i]->Y ); + + /* + * Post-precessing: reclaim some memory by shrinking coordinates + * - not storing Z (always 1) + * - shrinking other coordinates, but still keeping the same number of + * limbs as P, as otherwise it will too likely be regrown too fast. + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_shrink( &T[i]->X, grp->P.n ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shrink( &T[i]->Y, grp->P.n ) ); + mbedtls_mpi_free( &T[i]->Z ); + + if( i == 0 ) + break; + } + +cleanup: + + mbedtls_mpi_free( &u ); mbedtls_mpi_free( &Zi ); mbedtls_mpi_free( &ZZi ); + for( i = 0; i < t_len; i++ ) + mbedtls_mpi_free( &c[i] ); + mbedtls_free( c ); + + return( ret ); +} + +/* + * Conditional point inversion: Q -> -Q = (Q.X, -Q.Y, Q.Z) without leak. + * "inv" must be 0 (don't invert) or 1 (invert) or the result will be invalid + */ +static int ecp_safe_invert_jac( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *Q, + unsigned char inv ) +{ + int ret; + unsigned char nonzero; + mbedtls_mpi mQY; + + mbedtls_mpi_init( &mQY ); + + /* Use the fact that -Q.Y mod P = P - Q.Y unless Q.Y == 0 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &mQY, &grp->P, &Q->Y ) ); + nonzero = mbedtls_mpi_cmp_int( &Q->Y, 0 ) != 0; + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &Q->Y, &mQY, inv & nonzero ) ); + +cleanup: + mbedtls_mpi_free( &mQY ); + + return( ret ); +} + +/* + * Point doubling R = 2 P, Jacobian coordinates + * + * Based on http://www.hyperelliptic.org/EFD/g1p/auto-shortw-jacobian.html#doubling-dbl-1998-cmo-2 . + * + * We follow the variable naming fairly closely. The formula variations that trade a MUL for a SQR + * (plus a few ADDs) aren't useful as our bignum implementation doesn't distinguish squaring. + * + * Standard optimizations are applied when curve parameter A is one of { 0, -3 }. + * + * Cost: 1D := 3M + 4S (A == 0) + * 4M + 4S (A == -3) + * 3M + 6S + 1a otherwise + */ +static int ecp_double_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point *P ) +{ + int ret; + mbedtls_mpi M, S, T, U; + +#if defined(MBEDTLS_SELF_TEST) + dbl_count++; +#endif + + mbedtls_mpi_init( &M ); mbedtls_mpi_init( &S ); mbedtls_mpi_init( &T ); mbedtls_mpi_init( &U ); + + /* Special case for A = -3 */ + if( grp->A.p == NULL ) + { + /* M = 3(X + Z^2)(X - Z^2) */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->Z, &P->Z ) ); MOD_MUL( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &T, &P->X, &S ) ); MOD_ADD( T ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &U, &P->X, &S ) ); MOD_SUB( U ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &T, &U ) ); MOD_MUL( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &M, &S, 3 ) ); MOD_ADD( M ); + } + else + { + /* M = 3.X^2 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->X, &P->X ) ); MOD_MUL( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &M, &S, 3 ) ); MOD_ADD( M ); + + /* Optimize away for "koblitz" curves with A = 0 */ + if( mbedtls_mpi_cmp_int( &grp->A, 0 ) != 0 ) + { + /* M += A.Z^4 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->Z, &P->Z ) ); MOD_MUL( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &S, &S ) ); MOD_MUL( T ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &T, &grp->A ) ); MOD_MUL( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &M, &M, &S ) ); MOD_ADD( M ); + } + } + + /* S = 4.X.Y^2 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &P->Y, &P->Y ) ); MOD_MUL( T ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T, 1 ) ); MOD_ADD( T ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->X, &T ) ); MOD_MUL( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &S, 1 ) ); MOD_ADD( S ); + + /* U = 8.Y^4 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &U, &T, &T ) ); MOD_MUL( U ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &U, 1 ) ); MOD_ADD( U ); + + /* T = M^2 - 2.S */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &M, &M ) ); MOD_MUL( T ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T, &T, &S ) ); MOD_SUB( T ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T, &T, &S ) ); MOD_SUB( T ); + + /* S = M(S - T) - U */ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &S, &S, &T ) ); MOD_SUB( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &S, &M ) ); MOD_MUL( S ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &S, &S, &U ) ); MOD_SUB( S ); + + /* U = 2.Y.Z */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &U, &P->Y, &P->Z ) ); MOD_MUL( U ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &U, 1 ) ); MOD_ADD( U ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->X, &T ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Y, &S ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Z, &U ) ); + +cleanup: + mbedtls_mpi_free( &M ); mbedtls_mpi_free( &S ); mbedtls_mpi_free( &T ); mbedtls_mpi_free( &U ); + + return( ret ); +} + +/* + * Addition: R = P + Q, mixed affine-Jacobian coordinates (GECC 3.22) + * + * The coordinates of Q must be normalized (= affine), + * but those of P don't need to. R is not normalized. + * + * Special cases: (1) P or Q is zero, (2) R is zero, (3) P == Q. + * None of these cases can happen as intermediate step in ecp_mul_comb(): + * - at each step, P, Q and R are multiples of the base point, the factor + * being less than its order, so none of them is zero; + * - Q is an odd multiple of the base point, P an even multiple, + * due to the choice of precomputed points in the modified comb method. + * So branches for these cases do not leak secret information. + * + * We accept Q->Z being unset (saving memory in tables) as meaning 1. + * + * Cost: 1A := 8M + 3S + */ +static int ecp_add_mixed( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q ) +{ + int ret; + mbedtls_mpi T1, T2, T3, T4, X, Y, Z; + +#if defined(MBEDTLS_SELF_TEST) + add_count++; +#endif + + /* + * Trivial cases: P == 0 or Q == 0 (case 1) + */ + if( mbedtls_mpi_cmp_int( &P->Z, 0 ) == 0 ) + return( mbedtls_ecp_copy( R, Q ) ); + + if( Q->Z.p != NULL && mbedtls_mpi_cmp_int( &Q->Z, 0 ) == 0 ) + return( mbedtls_ecp_copy( R, P ) ); + + /* + * Make sure Q coordinates are normalized + */ + if( Q->Z.p != NULL && mbedtls_mpi_cmp_int( &Q->Z, 1 ) != 0 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + mbedtls_mpi_init( &T1 ); mbedtls_mpi_init( &T2 ); mbedtls_mpi_init( &T3 ); mbedtls_mpi_init( &T4 ); + mbedtls_mpi_init( &X ); mbedtls_mpi_init( &Y ); mbedtls_mpi_init( &Z ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T1, &P->Z, &P->Z ) ); MOD_MUL( T1 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T2, &T1, &P->Z ) ); MOD_MUL( T2 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T1, &T1, &Q->X ) ); MOD_MUL( T1 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T2, &T2, &Q->Y ) ); MOD_MUL( T2 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T1, &T1, &P->X ) ); MOD_SUB( T1 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T2, &T2, &P->Y ) ); MOD_SUB( T2 ); + + /* Special cases (2) and (3) */ + if( mbedtls_mpi_cmp_int( &T1, 0 ) == 0 ) + { + if( mbedtls_mpi_cmp_int( &T2, 0 ) == 0 ) + { + ret = ecp_double_jac( grp, R, P ); + goto cleanup; + } + else + { + ret = mbedtls_ecp_set_zero( R ); + goto cleanup; + } + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &Z, &P->Z, &T1 ) ); MOD_MUL( Z ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T3, &T1, &T1 ) ); MOD_MUL( T3 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T4, &T3, &T1 ) ); MOD_MUL( T4 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T3, &T3, &P->X ) ); MOD_MUL( T3 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &T3, 2 ) ); MOD_ADD( T1 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &X, &T2, &T2 ) ); MOD_MUL( X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &T1 ) ); MOD_SUB( X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &T4 ) ); MOD_SUB( X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T3, &T3, &X ) ); MOD_SUB( T3 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T3, &T3, &T2 ) ); MOD_MUL( T3 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T4, &T4, &P->Y ) ); MOD_MUL( T4 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &Y, &T3, &T4 ) ); MOD_SUB( Y ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->X, &X ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Y, &Y ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Z, &Z ) ); + +cleanup: + + mbedtls_mpi_free( &T1 ); mbedtls_mpi_free( &T2 ); mbedtls_mpi_free( &T3 ); mbedtls_mpi_free( &T4 ); + mbedtls_mpi_free( &X ); mbedtls_mpi_free( &Y ); mbedtls_mpi_free( &Z ); + + return( ret ); +} + +/* + * Randomize jacobian coordinates: + * (X, Y, Z) -> (l^2 X, l^3 Y, l Z) for random l + * This is sort of the reverse operation of ecp_normalize_jac(). + * + * This countermeasure was first suggested in [2]. + */ +static int ecp_randomize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret; + mbedtls_mpi l, ll; + size_t p_size = ( grp->pbits + 7 ) / 8; + int count = 0; + + mbedtls_mpi_init( &l ); mbedtls_mpi_init( &ll ); + + /* Generate l such that 1 < l < p */ + do + { + mbedtls_mpi_fill_random( &l, p_size, f_rng, p_rng ); + + while( mbedtls_mpi_cmp_mpi( &l, &grp->P ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &l, 1 ) ); + + if( count++ > 10 ) + return( MBEDTLS_ERR_ECP_RANDOM_FAILED ); + } + while( mbedtls_mpi_cmp_int( &l, 1 ) <= 0 ); + + /* Z = l * Z */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Z, &pt->Z, &l ) ); MOD_MUL( pt->Z ); + + /* X = l^2 * X */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ll, &l, &l ) ); MOD_MUL( ll ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->X, &pt->X, &ll ) ); MOD_MUL( pt->X ); + + /* Y = l^3 * Y */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ll, &ll, &l ) ); MOD_MUL( ll ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Y, &pt->Y, &ll ) ); MOD_MUL( pt->Y ); + +cleanup: + mbedtls_mpi_free( &l ); mbedtls_mpi_free( &ll ); + + return( ret ); +} + +/* + * Check and define parameters used by the comb method (see below for details) + */ +#if MBEDTLS_ECP_WINDOW_SIZE < 2 || MBEDTLS_ECP_WINDOW_SIZE > 7 +#error "MBEDTLS_ECP_WINDOW_SIZE out of bounds" +#endif + +/* d = ceil( n / w ) */ +#define COMB_MAX_D ( MBEDTLS_ECP_MAX_BITS + 1 ) / 2 + +/* number of precomputed points */ +#define COMB_MAX_PRE ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) ) + +/* + * Compute the representation of m that will be used with our comb method. + * + * The basic comb method is described in GECC 3.44 for example. We use a + * modified version that provides resistance to SPA by avoiding zero + * digits in the representation as in [3]. We modify the method further by + * requiring that all K_i be odd, which has the small cost that our + * representation uses one more K_i, due to carries. + * + * Also, for the sake of compactness, only the seven low-order bits of x[i] + * are used to represent K_i, and the msb of x[i] encodes the the sign (s_i in + * the paper): it is set if and only if if s_i == -1; + * + * Calling conventions: + * - x is an array of size d + 1 + * - w is the size, ie number of teeth, of the comb, and must be between + * 2 and 7 (in practice, between 2 and MBEDTLS_ECP_WINDOW_SIZE) + * - m is the MPI, expected to be odd and such that bitlength(m) <= w * d + * (the result will be incorrect if these assumptions are not satisfied) + */ +static void ecp_comb_fixed( unsigned char x[], size_t d, + unsigned char w, const mbedtls_mpi *m ) +{ + size_t i, j; + unsigned char c, cc, adjust; + + memset( x, 0, d+1 ); + + /* First get the classical comb values (except for x_d = 0) */ + for( i = 0; i < d; i++ ) + for( j = 0; j < w; j++ ) + x[i] |= mbedtls_mpi_get_bit( m, i + d * j ) << j; + + /* Now make sure x_1 .. x_d are odd */ + c = 0; + for( i = 1; i <= d; i++ ) + { + /* Add carry and update it */ + cc = x[i] & c; + x[i] = x[i] ^ c; + c = cc; + + /* Adjust if needed, avoiding branches */ + adjust = 1 - ( x[i] & 0x01 ); + c |= x[i] & ( x[i-1] * adjust ); + x[i] = x[i] ^ ( x[i-1] * adjust ); + x[i-1] |= adjust << 7; + } +} + +/* + * Precompute points for the comb method + * + * If i = i_{w-1} ... i_1 is the binary representation of i, then + * T[i] = i_{w-1} 2^{(w-1)d} P + ... + i_1 2^d P + P + * + * T must be able to hold 2^{w - 1} elements + * + * Cost: d(w-1) D + (2^{w-1} - 1) A + 1 N(w-1) + 1 N(2^{w-1} - 1) + */ +static int ecp_precompute_comb( const mbedtls_ecp_group *grp, + mbedtls_ecp_point T[], const mbedtls_ecp_point *P, + unsigned char w, size_t d ) +{ + int ret; + unsigned char i, k; + size_t j; + mbedtls_ecp_point *cur, *TT[COMB_MAX_PRE - 1]; + + /* + * Set T[0] = P and + * T[2^{l-1}] = 2^{dl} P for l = 1 .. w-1 (this is not the final value) + */ + MBEDTLS_MPI_CHK( mbedtls_ecp_copy( &T[0], P ) ); + + k = 0; + for( i = 1; i < ( 1U << ( w - 1 ) ); i <<= 1 ) + { + cur = T + i; + MBEDTLS_MPI_CHK( mbedtls_ecp_copy( cur, T + ( i >> 1 ) ) ); + for( j = 0; j < d; j++ ) + MBEDTLS_MPI_CHK( ecp_double_jac( grp, cur, cur ) ); + + TT[k++] = cur; + } + + MBEDTLS_MPI_CHK( ecp_normalize_jac_many( grp, TT, k ) ); + + /* + * Compute the remaining ones using the minimal number of additions + * Be careful to update T[2^l] only after using it! + */ + k = 0; + for( i = 1; i < ( 1U << ( w - 1 ) ); i <<= 1 ) + { + j = i; + while( j-- ) + { + MBEDTLS_MPI_CHK( ecp_add_mixed( grp, &T[i + j], &T[j], &T[i] ) ); + TT[k++] = &T[i + j]; + } + } + + MBEDTLS_MPI_CHK( ecp_normalize_jac_many( grp, TT, k ) ); + +cleanup: + return( ret ); +} + +/* + * Select precomputed point: R = sign(i) * T[ abs(i) / 2 ] + */ +static int ecp_select_comb( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point T[], unsigned char t_len, + unsigned char i ) +{ + int ret; + unsigned char ii, j; + + /* Ignore the "sign" bit and scale down */ + ii = ( i & 0x7Fu ) >> 1; + + /* Read the whole table to thwart cache-based timing attacks */ + for( j = 0; j < t_len; j++ ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &R->X, &T[j].X, j == ii ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &R->Y, &T[j].Y, j == ii ) ); + } + + /* Safely invert result if i is "negative" */ + MBEDTLS_MPI_CHK( ecp_safe_invert_jac( grp, R, i >> 7 ) ); + +cleanup: + return( ret ); +} + +/* + * Core multiplication algorithm for the (modified) comb method. + * This part is actually common with the basic comb method (GECC 3.44) + * + * Cost: d A + d D + 1 R + */ +static int ecp_mul_comb_core( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point T[], unsigned char t_len, + const unsigned char x[], size_t d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + mbedtls_ecp_point Txi; + size_t i; + + mbedtls_ecp_point_init( &Txi ); + + /* Start with a non-zero point and randomize its coordinates */ + i = d; + MBEDTLS_MPI_CHK( ecp_select_comb( grp, R, T, t_len, x[i] ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &R->Z, 1 ) ); + if( f_rng != 0 ) + MBEDTLS_MPI_CHK( ecp_randomize_jac( grp, R, f_rng, p_rng ) ); + + while( i-- != 0 ) + { + MBEDTLS_MPI_CHK( ecp_double_jac( grp, R, R ) ); + MBEDTLS_MPI_CHK( ecp_select_comb( grp, &Txi, T, t_len, x[i] ) ); + MBEDTLS_MPI_CHK( ecp_add_mixed( grp, R, R, &Txi ) ); + } + +cleanup: + mbedtls_ecp_point_free( &Txi ); + + return( ret ); +} + +/* + * Multiplication using the comb method, + * for curves in short Weierstrass form + */ +static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + unsigned char w, m_is_odd, p_eq_g, pre_len, i; + size_t d; + unsigned char k[COMB_MAX_D + 1]; + mbedtls_ecp_point *T; + mbedtls_mpi M, mm; + + mbedtls_mpi_init( &M ); + mbedtls_mpi_init( &mm ); + + /* we need N to be odd to trnaform m in an odd number, check now */ + if( mbedtls_mpi_get_bit( &grp->N, 0 ) != 1 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + /* + * Minimize the number of multiplications, that is minimize + * 10 * d * w + 18 * 2^(w-1) + 11 * d + 7 * w, with d = ceil( nbits / w ) + * (see costs of the various parts, with 1S = 1M) + */ + w = grp->nbits >= 384 ? 5 : 4; + + /* + * If P == G, pre-compute a bit more, since this may be re-used later. + * Just adding one avoids upping the cost of the first mul too much, + * and the memory cost too. + */ +#if MBEDTLS_ECP_FIXED_POINT_OPTIM == 1 + p_eq_g = ( mbedtls_mpi_cmp_mpi( &P->Y, &grp->G.Y ) == 0 && + mbedtls_mpi_cmp_mpi( &P->X, &grp->G.X ) == 0 ); + if( p_eq_g ) + w++; +#else + p_eq_g = 0; +#endif + + /* + * Make sure w is within bounds. + * (The last test is useful only for very small curves in the test suite.) + */ + if( w > MBEDTLS_ECP_WINDOW_SIZE ) + w = MBEDTLS_ECP_WINDOW_SIZE; + if( w >= grp->nbits ) + w = 2; + + /* Other sizes that depend on w */ + pre_len = 1U << ( w - 1 ); + d = ( grp->nbits + w - 1 ) / w; + + /* + * Prepare precomputed points: if P == G we want to + * use grp->T if already initialized, or initialize it. + */ + T = p_eq_g ? grp->T : NULL; + + if( T == NULL ) + { + T = mbedtls_calloc( pre_len, sizeof( mbedtls_ecp_point ) ); + if( T == NULL ) + { + ret = MBEDTLS_ERR_ECP_ALLOC_FAILED; + goto cleanup; + } + + MBEDTLS_MPI_CHK( ecp_precompute_comb( grp, T, P, w, d ) ); + + if( p_eq_g ) + { + grp->T = T; + grp->T_size = pre_len; + } + } + + /* + * Make sure M is odd (M = m or M = N - m, since N is odd) + * using the fact that m * P = - (N - m) * P + */ + m_is_odd = ( mbedtls_mpi_get_bit( m, 0 ) == 1 ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &M, m ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &mm, &grp->N, m ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &M, &mm, ! m_is_odd ) ); + + /* + * Go for comb multiplication, R = M * P + */ + ecp_comb_fixed( k, d, w, &M ); + MBEDTLS_MPI_CHK( ecp_mul_comb_core( grp, R, T, pre_len, k, d, f_rng, p_rng ) ); + + /* + * Now get m * P from M * P and normalize it + */ + MBEDTLS_MPI_CHK( ecp_safe_invert_jac( grp, R, ! m_is_odd ) ); + MBEDTLS_MPI_CHK( ecp_normalize_jac( grp, R ) ); + +cleanup: + + if( T != NULL && ! p_eq_g ) + { + for( i = 0; i < pre_len; i++ ) + mbedtls_ecp_point_free( &T[i] ); + mbedtls_free( T ); + } + + mbedtls_mpi_free( &M ); + mbedtls_mpi_free( &mm ); + + if( ret != 0 ) + mbedtls_ecp_point_free( R ); + + return( ret ); +} + +#endif /* ECP_SHORTWEIERSTRASS */ + +#if defined(ECP_MONTGOMERY) +/* + * For Montgomery curves, we do all the internal arithmetic in projective + * coordinates. Import/export of points uses only the x coordinates, which is + * internaly represented as X / Z. + * + * For scalar multiplication, we'll use a Montgomery ladder. + */ + +/* + * Normalize Montgomery x/z coordinates: X = X/Z, Z = 1 + * Cost: 1M + 1I + */ +static int ecp_normalize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P ) +{ + int ret; + + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &P->Z, &P->Z, &grp->P ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &P->X, &P->X, &P->Z ) ); MOD_MUL( P->X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &P->Z, 1 ) ); + +cleanup: + return( ret ); +} + +/* + * Randomize projective x/z coordinates: + * (X, Z) -> (l X, l Z) for random l + * This is sort of the reverse operation of ecp_normalize_mxz(). + * + * This countermeasure was first suggested in [2]. + * Cost: 2M + */ +static int ecp_randomize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret; + mbedtls_mpi l; + size_t p_size = ( grp->pbits + 7 ) / 8; + int count = 0; + + mbedtls_mpi_init( &l ); + + /* Generate l such that 1 < l < p */ + do + { + mbedtls_mpi_fill_random( &l, p_size, f_rng, p_rng ); + + while( mbedtls_mpi_cmp_mpi( &l, &grp->P ) >= 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &l, 1 ) ); + + if( count++ > 10 ) + return( MBEDTLS_ERR_ECP_RANDOM_FAILED ); + } + while( mbedtls_mpi_cmp_int( &l, 1 ) <= 0 ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &P->X, &P->X, &l ) ); MOD_MUL( P->X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &P->Z, &P->Z, &l ) ); MOD_MUL( P->Z ); + +cleanup: + mbedtls_mpi_free( &l ); + + return( ret ); +} + +/* + * Double-and-add: R = 2P, S = P + Q, with d = X(P - Q), + * for Montgomery curves in x/z coordinates. + * + * http://www.hyperelliptic.org/EFD/g1p/auto-code/montgom/xz/ladder/mladd-1987-m.op3 + * with + * d = X1 + * P = (X2, Z2) + * Q = (X3, Z3) + * R = (X4, Z4) + * S = (X5, Z5) + * and eliminating temporary variables tO, ..., t4. + * + * Cost: 5M + 4S + */ +static int ecp_double_add_mxz( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, mbedtls_ecp_point *S, + const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q, + const mbedtls_mpi *d ) +{ + int ret; + mbedtls_mpi A, AA, B, BB, E, C, D, DA, CB; + + mbedtls_mpi_init( &A ); mbedtls_mpi_init( &AA ); mbedtls_mpi_init( &B ); + mbedtls_mpi_init( &BB ); mbedtls_mpi_init( &E ); mbedtls_mpi_init( &C ); + mbedtls_mpi_init( &D ); mbedtls_mpi_init( &DA ); mbedtls_mpi_init( &CB ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &A, &P->X, &P->Z ) ); MOD_ADD( A ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &AA, &A, &A ) ); MOD_MUL( AA ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &B, &P->X, &P->Z ) ); MOD_SUB( B ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &BB, &B, &B ) ); MOD_MUL( BB ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &E, &AA, &BB ) ); MOD_SUB( E ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &C, &Q->X, &Q->Z ) ); MOD_ADD( C ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &D, &Q->X, &Q->Z ) ); MOD_SUB( D ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &DA, &D, &A ) ); MOD_MUL( DA ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &CB, &C, &B ) ); MOD_MUL( CB ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &S->X, &DA, &CB ) ); MOD_MUL( S->X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S->X, &S->X, &S->X ) ); MOD_MUL( S->X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &S->Z, &DA, &CB ) ); MOD_SUB( S->Z ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S->Z, &S->Z, &S->Z ) ); MOD_MUL( S->Z ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S->Z, d, &S->Z ) ); MOD_MUL( S->Z ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &R->X, &AA, &BB ) ); MOD_MUL( R->X ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &R->Z, &grp->A, &E ) ); MOD_MUL( R->Z ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &R->Z, &BB, &R->Z ) ); MOD_ADD( R->Z ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &R->Z, &E, &R->Z ) ); MOD_MUL( R->Z ); + +cleanup: + mbedtls_mpi_free( &A ); mbedtls_mpi_free( &AA ); mbedtls_mpi_free( &B ); + mbedtls_mpi_free( &BB ); mbedtls_mpi_free( &E ); mbedtls_mpi_free( &C ); + mbedtls_mpi_free( &D ); mbedtls_mpi_free( &DA ); mbedtls_mpi_free( &CB ); + + return( ret ); +} + +/* + * Multiplication with Montgomery ladder in x/z coordinates, + * for curves in Montgomery form + */ +static int ecp_mul_mxz( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + size_t i; + unsigned char b; + mbedtls_ecp_point RP; + mbedtls_mpi PX; + + mbedtls_ecp_point_init( &RP ); mbedtls_mpi_init( &PX ); + + /* Save PX and read from P before writing to R, in case P == R */ + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &PX, &P->X ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_copy( &RP, P ) ); + + /* Set R to zero in modified x/z coordinates */ + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &R->X, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &R->Z, 0 ) ); + mbedtls_mpi_free( &R->Y ); + + /* RP.X might be sligtly larger than P, so reduce it */ + MOD_ADD( RP.X ); + + /* Randomize coordinates of the starting point */ + if( f_rng != NULL ) + MBEDTLS_MPI_CHK( ecp_randomize_mxz( grp, &RP, f_rng, p_rng ) ); + + /* Loop invariant: R = result so far, RP = R + P */ + i = mbedtls_mpi_bitlen( m ); /* one past the (zero-based) most significant bit */ + while( i-- > 0 ) + { + b = mbedtls_mpi_get_bit( m, i ); + /* + * if (b) R = 2R + P else R = 2R, + * which is: + * if (b) double_add( RP, R, RP, R ) + * else double_add( R, RP, R, RP ) + * but using safe conditional swaps to avoid leaks + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->X, &RP.X, b ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->Z, &RP.Z, b ) ); + MBEDTLS_MPI_CHK( ecp_double_add_mxz( grp, R, &RP, R, &RP, &PX ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->X, &RP.X, b ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->Z, &RP.Z, b ) ); + } + + MBEDTLS_MPI_CHK( ecp_normalize_mxz( grp, R ) ); + +cleanup: + mbedtls_ecp_point_free( &RP ); mbedtls_mpi_free( &PX ); + + return( ret ); +} + +#endif /* ECP_MONTGOMERY */ + +/* + * Multiplication R = m * P + */ +int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret; + + /* Common sanity checks */ + if( mbedtls_mpi_cmp_int( &P->Z, 1 ) != 0 ) + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_ecp_check_privkey( grp, m ) ) != 0 || + ( ret = mbedtls_ecp_check_pubkey( grp, P ) ) != 0 ) + return( ret ); + +#if defined(ECP_MONTGOMERY) + if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY ) + return( ecp_mul_mxz( grp, R, m, P, f_rng, p_rng ) ); +#endif +#if defined(ECP_SHORTWEIERSTRASS) + if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS ) + return( ecp_mul_comb( grp, R, m, P, f_rng, p_rng ) ); +#endif + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); +} + +#if defined(ECP_SHORTWEIERSTRASS) +/* + * Check that an affine point is valid as a public key, + * short weierstrass curves (SEC1 3.2.3.1) + */ +static int ecp_check_pubkey_sw( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt ) +{ + int ret; + mbedtls_mpi YY, RHS; + + /* pt coordinates must be normalized for our checks */ + if( mbedtls_mpi_cmp_int( &pt->X, 0 ) < 0 || + mbedtls_mpi_cmp_int( &pt->Y, 0 ) < 0 || + mbedtls_mpi_cmp_mpi( &pt->X, &grp->P ) >= 0 || + mbedtls_mpi_cmp_mpi( &pt->Y, &grp->P ) >= 0 ) + return( MBEDTLS_ERR_ECP_INVALID_KEY ); + + mbedtls_mpi_init( &YY ); mbedtls_mpi_init( &RHS ); + + /* + * YY = Y^2 + * RHS = X (X^2 + A) + B = X^3 + A X + B + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &YY, &pt->Y, &pt->Y ) ); MOD_MUL( YY ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &RHS, &pt->X, &pt->X ) ); MOD_MUL( RHS ); + + /* Special case for A = -3 */ + if( grp->A.p == NULL ) + { + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &RHS, &RHS, 3 ) ); MOD_SUB( RHS ); + } + else + { + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &RHS, &RHS, &grp->A ) ); MOD_ADD( RHS ); + } + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &RHS, &RHS, &pt->X ) ); MOD_MUL( RHS ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &RHS, &RHS, &grp->B ) ); MOD_ADD( RHS ); + + if( mbedtls_mpi_cmp_mpi( &YY, &RHS ) != 0 ) + ret = MBEDTLS_ERR_ECP_INVALID_KEY; + +cleanup: + + mbedtls_mpi_free( &YY ); mbedtls_mpi_free( &RHS ); + + return( ret ); +} +#endif /* ECP_SHORTWEIERSTRASS */ + +/* + * R = m * P with shortcuts for m == 1 and m == -1 + * NOT constant-time - ONLY for short Weierstrass! + */ +static int mbedtls_ecp_mul_shortcuts( mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, + const mbedtls_mpi *m, + const mbedtls_ecp_point *P ) +{ + int ret; + + if( mbedtls_mpi_cmp_int( m, 1 ) == 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, P ) ); + } + else if( mbedtls_mpi_cmp_int( m, -1 ) == 0 ) + { + MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, P ) ); + if( mbedtls_mpi_cmp_int( &R->Y, 0 ) != 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &R->Y, &grp->P, &R->Y ) ); + } + else + { + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( grp, R, m, P, NULL, NULL ) ); + } + +cleanup: + return( ret ); +} + +/* + * Linear combination + * NOT constant-time + */ +int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + const mbedtls_mpi *n, const mbedtls_ecp_point *Q ) +{ + int ret; + mbedtls_ecp_point mP; + + if( ecp_get_type( grp ) != ECP_TYPE_SHORT_WEIERSTRASS ) + return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + + mbedtls_ecp_point_init( &mP ); + + MBEDTLS_MPI_CHK( mbedtls_ecp_mul_shortcuts( grp, &mP, m, P ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul_shortcuts( grp, R, n, Q ) ); + + MBEDTLS_MPI_CHK( ecp_add_mixed( grp, R, &mP, R ) ); + MBEDTLS_MPI_CHK( ecp_normalize_jac( grp, R ) ); + +cleanup: + mbedtls_ecp_point_free( &mP ); + + return( ret ); +} + + +#if defined(ECP_MONTGOMERY) +/* + * Check validity of a public key for Montgomery curves with x-only schemes + */ +static int ecp_check_pubkey_mx( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt ) +{ + /* [Curve25519 p. 5] Just check X is the correct number of bytes */ + if( mbedtls_mpi_size( &pt->X ) > ( grp->nbits + 7 ) / 8 ) + return( MBEDTLS_ERR_ECP_INVALID_KEY ); + + return( 0 ); +} +#endif /* ECP_MONTGOMERY */ + +/* + * Check that a point is valid as a public key + */ +int mbedtls_ecp_check_pubkey( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt ) +{ + /* Must use affine coordinates */ + if( mbedtls_mpi_cmp_int( &pt->Z, 1 ) != 0 ) + return( MBEDTLS_ERR_ECP_INVALID_KEY ); + +#if defined(ECP_MONTGOMERY) + if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY ) + return( ecp_check_pubkey_mx( grp, pt ) ); +#endif +#if defined(ECP_SHORTWEIERSTRASS) + if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS ) + return( ecp_check_pubkey_sw( grp, pt ) ); +#endif + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); +} + +/* + * Check that an mbedtls_mpi is valid as a private key + */ +int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp, const mbedtls_mpi *d ) +{ +#if defined(ECP_MONTGOMERY) + if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY ) + { + /* see [Curve25519] page 5 */ + if( mbedtls_mpi_get_bit( d, 0 ) != 0 || + mbedtls_mpi_get_bit( d, 1 ) != 0 || + mbedtls_mpi_get_bit( d, 2 ) != 0 || + mbedtls_mpi_bitlen( d ) - 1 != grp->nbits ) /* mbedtls_mpi_bitlen is one-based! */ + return( MBEDTLS_ERR_ECP_INVALID_KEY ); + else + return( 0 ); + } +#endif /* ECP_MONTGOMERY */ +#if defined(ECP_SHORTWEIERSTRASS) + if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS ) + { + /* see SEC1 3.2 */ + if( mbedtls_mpi_cmp_int( d, 1 ) < 0 || + mbedtls_mpi_cmp_mpi( d, &grp->N ) >= 0 ) + return( MBEDTLS_ERR_ECP_INVALID_KEY ); + else + return( 0 ); + } +#endif /* ECP_SHORTWEIERSTRASS */ + + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); +} + +/* + * Generate a keypair with configurable base point + */ +int mbedtls_ecp_gen_keypair_base( mbedtls_ecp_group *grp, + const mbedtls_ecp_point *G, + mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + size_t n_size = ( grp->nbits + 7 ) / 8; + +#if defined(ECP_MONTGOMERY) + if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY ) + { + /* [M225] page 5 */ + size_t b; + + MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( d, n_size, f_rng, p_rng ) ); + + /* Make sure the most significant bit is nbits */ + b = mbedtls_mpi_bitlen( d ) - 1; /* mbedtls_mpi_bitlen is one-based */ + if( b > grp->nbits ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( d, b - grp->nbits ) ); + else + MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, grp->nbits, 1 ) ); + + /* Make sure the last three bits are unset */ + MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 0, 0 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 1, 0 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 2, 0 ) ); + } + else +#endif /* ECP_MONTGOMERY */ +#if defined(ECP_SHORTWEIERSTRASS) + if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS ) + { + /* SEC1 3.2.1: Generate d such that 1 <= n < N */ + int count = 0; + unsigned char rnd[MBEDTLS_ECP_MAX_BYTES]; + + /* + * Match the procedure given in RFC 6979 (deterministic ECDSA): + * - use the same byte ordering; + * - keep the leftmost nbits bits of the generated octet string; + * - try until result is in the desired range. + * This also avoids any biais, which is especially important for ECDSA. + */ + do + { + MBEDTLS_MPI_CHK( f_rng( p_rng, rnd, n_size ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( d, rnd, n_size ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( d, 8 * n_size - grp->nbits ) ); + + /* + * Each try has at worst a probability 1/2 of failing (the msb has + * a probability 1/2 of being 0, and then the result will be < N), + * so after 30 tries failure probability is a most 2**(-30). + * + * For most curves, 1 try is enough with overwhelming probability, + * since N starts with a lot of 1s in binary, but some curves + * such as secp224k1 are actually very close to the worst case. + */ + if( ++count > 30 ) + return( MBEDTLS_ERR_ECP_RANDOM_FAILED ); + } + while( mbedtls_mpi_cmp_int( d, 1 ) < 0 || + mbedtls_mpi_cmp_mpi( d, &grp->N ) >= 0 ); + } + else +#endif /* ECP_SHORTWEIERSTRASS */ + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + +cleanup: + if( ret != 0 ) + return( ret ); + + return( mbedtls_ecp_mul( grp, Q, d, G, f_rng, p_rng ) ); +} + +/* + * Generate key pair, wrapper for conventional base point + */ +int mbedtls_ecp_gen_keypair( mbedtls_ecp_group *grp, + mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + return( mbedtls_ecp_gen_keypair_base( grp, &grp->G, d, Q, f_rng, p_rng ) ); +} + +/* + * Generate a keypair, prettier wrapper + */ +int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret; + + if( ( ret = mbedtls_ecp_group_load( &key->grp, grp_id ) ) != 0 ) + return( ret ); + + return( mbedtls_ecp_gen_keypair( &key->grp, &key->d, &key->Q, f_rng, p_rng ) ); +} + +/* + * Check a public-private key pair + */ +int mbedtls_ecp_check_pub_priv( const mbedtls_ecp_keypair *pub, const mbedtls_ecp_keypair *prv ) +{ + int ret; + mbedtls_ecp_point Q; + mbedtls_ecp_group grp; + + if( pub->grp.id == MBEDTLS_ECP_DP_NONE || + pub->grp.id != prv->grp.id || + mbedtls_mpi_cmp_mpi( &pub->Q.X, &prv->Q.X ) || + mbedtls_mpi_cmp_mpi( &pub->Q.Y, &prv->Q.Y ) || + mbedtls_mpi_cmp_mpi( &pub->Q.Z, &prv->Q.Z ) ) + { + return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + } + + mbedtls_ecp_point_init( &Q ); + mbedtls_ecp_group_init( &grp ); + + /* mbedtls_ecp_mul() needs a non-const group... */ + mbedtls_ecp_group_copy( &grp, &prv->grp ); + + /* Also checks d is valid */ + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &Q, &prv->d, &prv->grp.G, NULL, NULL ) ); + + if( mbedtls_mpi_cmp_mpi( &Q.X, &prv->Q.X ) || + mbedtls_mpi_cmp_mpi( &Q.Y, &prv->Q.Y ) || + mbedtls_mpi_cmp_mpi( &Q.Z, &prv->Q.Z ) ) + { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + +cleanup: + mbedtls_ecp_point_free( &Q ); + mbedtls_ecp_group_free( &grp ); + + return( ret ); +} + +#if defined(MBEDTLS_SELF_TEST) + +/* + * Checkup routine + */ +int mbedtls_ecp_self_test( int verbose ) +{ + int ret; + size_t i; + mbedtls_ecp_group grp; + mbedtls_ecp_point R, P; + mbedtls_mpi m; + unsigned long add_c_prev, dbl_c_prev, mul_c_prev; + /* exponents especially adapted for secp192r1 */ + const char *exponents[] = + { + "000000000000000000000000000000000000000000000001", /* one */ + "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22830", /* N - 1 */ + "5EA6F389A38B8BC81E767753B15AA5569E1782E30ABE7D25", /* random */ + "400000000000000000000000000000000000000000000000", /* one and zeros */ + "7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF", /* all ones */ + "555555555555555555555555555555555555555555555555", /* 101010... */ + }; + + mbedtls_ecp_group_init( &grp ); + mbedtls_ecp_point_init( &R ); + mbedtls_ecp_point_init( &P ); + mbedtls_mpi_init( &m ); + + /* Use secp192r1 if available, or any available curve */ +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) + MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, MBEDTLS_ECP_DP_SECP192R1 ) ); +#else + MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, mbedtls_ecp_curve_list()->grp_id ) ); +#endif + + if( verbose != 0 ) + mbedtls_printf( " ECP test #1 (constant op_count, base point G): " ); + + /* Do a dummy multiplication first to trigger precomputation */ + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &m, 2 ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &P, &m, &grp.G, NULL, NULL ) ); + + add_count = 0; + dbl_count = 0; + mul_count = 0; + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[0] ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &grp.G, NULL, NULL ) ); + + for( i = 1; i < sizeof( exponents ) / sizeof( exponents[0] ); i++ ) + { + add_c_prev = add_count; + dbl_c_prev = dbl_count; + mul_c_prev = mul_count; + add_count = 0; + dbl_count = 0; + mul_count = 0; + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[i] ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &grp.G, NULL, NULL ) ); + + if( add_count != add_c_prev || + dbl_count != dbl_c_prev || + mul_count != mul_c_prev ) + { + if( verbose != 0 ) + mbedtls_printf( "failed (%u)\n", (unsigned int) i ); + + ret = 1; + goto cleanup; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " ECP test #2 (constant op_count, other point): " ); + /* We computed P = 2G last time, use it */ + + add_count = 0; + dbl_count = 0; + mul_count = 0; + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[0] ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &P, NULL, NULL ) ); + + for( i = 1; i < sizeof( exponents ) / sizeof( exponents[0] ); i++ ) + { + add_c_prev = add_count; + dbl_c_prev = dbl_count; + mul_c_prev = mul_count; + add_count = 0; + dbl_count = 0; + mul_count = 0; + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[i] ) ); + MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &P, NULL, NULL ) ); + + if( add_count != add_c_prev || + dbl_count != dbl_c_prev || + mul_count != mul_c_prev ) + { + if( verbose != 0 ) + mbedtls_printf( "failed (%u)\n", (unsigned int) i ); + + ret = 1; + goto cleanup; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + +cleanup: + + if( ret < 0 && verbose != 0 ) + mbedtls_printf( "Unexpected error, return code = %08X\n", ret ); + + mbedtls_ecp_group_free( &grp ); + mbedtls_ecp_point_free( &R ); + mbedtls_ecp_point_free( &P ); + mbedtls_mpi_free( &m ); + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_ECP_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecp_curves.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecp_curves.c new file mode 100644 index 0000000..9a6e8eb --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ecp_curves.c @@ -0,0 +1,1325 @@ +/* + * Elliptic curves over GF(p): curve-specific data and functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ECP_C) + +#include "mbedtls/ecp.h" + +#include + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +/* + * Conversion macros for embedded constants: + * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2 + */ +#if defined(MBEDTLS_HAVE_INT32) + +#define BYTES_TO_T_UINT_4( a, b, c, d ) \ + ( (mbedtls_mpi_uint) a << 0 ) | \ + ( (mbedtls_mpi_uint) b << 8 ) | \ + ( (mbedtls_mpi_uint) c << 16 ) | \ + ( (mbedtls_mpi_uint) d << 24 ) + +#define BYTES_TO_T_UINT_2( a, b ) \ + BYTES_TO_T_UINT_4( a, b, 0, 0 ) + +#define BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \ + BYTES_TO_T_UINT_4( a, b, c, d ), \ + BYTES_TO_T_UINT_4( e, f, g, h ) + +#else /* 64-bits */ + +#define BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \ + ( (mbedtls_mpi_uint) a << 0 ) | \ + ( (mbedtls_mpi_uint) b << 8 ) | \ + ( (mbedtls_mpi_uint) c << 16 ) | \ + ( (mbedtls_mpi_uint) d << 24 ) | \ + ( (mbedtls_mpi_uint) e << 32 ) | \ + ( (mbedtls_mpi_uint) f << 40 ) | \ + ( (mbedtls_mpi_uint) g << 48 ) | \ + ( (mbedtls_mpi_uint) h << 56 ) + +#define BYTES_TO_T_UINT_4( a, b, c, d ) \ + BYTES_TO_T_UINT_8( a, b, c, d, 0, 0, 0, 0 ) + +#define BYTES_TO_T_UINT_2( a, b ) \ + BYTES_TO_T_UINT_8( a, b, 0, 0, 0, 0, 0, 0 ) + +#endif /* bits in mbedtls_mpi_uint */ + +/* + * Note: the constants are in little-endian order + * to be directly usable in MPIs + */ + +/* + * Domain parameters for secp192r1 + */ +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) +static const mbedtls_mpi_uint secp192r1_p[] = { + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +static const mbedtls_mpi_uint secp192r1_b[] = { + BYTES_TO_T_UINT_8( 0xB1, 0xB9, 0x46, 0xC1, 0xEC, 0xDE, 0xB8, 0xFE ), + BYTES_TO_T_UINT_8( 0x49, 0x30, 0x24, 0x72, 0xAB, 0xE9, 0xA7, 0x0F ), + BYTES_TO_T_UINT_8( 0xE7, 0x80, 0x9C, 0xE5, 0x19, 0x05, 0x21, 0x64 ), +}; +static const mbedtls_mpi_uint secp192r1_gx[] = { + BYTES_TO_T_UINT_8( 0x12, 0x10, 0xFF, 0x82, 0xFD, 0x0A, 0xFF, 0xF4 ), + BYTES_TO_T_UINT_8( 0x00, 0x88, 0xA1, 0x43, 0xEB, 0x20, 0xBF, 0x7C ), + BYTES_TO_T_UINT_8( 0xF6, 0x90, 0x30, 0xB0, 0x0E, 0xA8, 0x8D, 0x18 ), +}; +static const mbedtls_mpi_uint secp192r1_gy[] = { + BYTES_TO_T_UINT_8( 0x11, 0x48, 0x79, 0x1E, 0xA1, 0x77, 0xF9, 0x73 ), + BYTES_TO_T_UINT_8( 0xD5, 0xCD, 0x24, 0x6B, 0xED, 0x11, 0x10, 0x63 ), + BYTES_TO_T_UINT_8( 0x78, 0xDA, 0xC8, 0xFF, 0x95, 0x2B, 0x19, 0x07 ), +}; +static const mbedtls_mpi_uint secp192r1_n[] = { + BYTES_TO_T_UINT_8( 0x31, 0x28, 0xD2, 0xB4, 0xB1, 0xC9, 0x6B, 0x14 ), + BYTES_TO_T_UINT_8( 0x36, 0xF8, 0xDE, 0x99, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */ + +/* + * Domain parameters for secp224r1 + */ +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) +static const mbedtls_mpi_uint secp224r1_p[] = { + BYTES_TO_T_UINT_8( 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ), + BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00 ), +}; +static const mbedtls_mpi_uint secp224r1_b[] = { + BYTES_TO_T_UINT_8( 0xB4, 0xFF, 0x55, 0x23, 0x43, 0x39, 0x0B, 0x27 ), + BYTES_TO_T_UINT_8( 0xBA, 0xD8, 0xBF, 0xD7, 0xB7, 0xB0, 0x44, 0x50 ), + BYTES_TO_T_UINT_8( 0x56, 0x32, 0x41, 0xF5, 0xAB, 0xB3, 0x04, 0x0C ), + BYTES_TO_T_UINT_4( 0x85, 0x0A, 0x05, 0xB4 ), +}; +static const mbedtls_mpi_uint secp224r1_gx[] = { + BYTES_TO_T_UINT_8( 0x21, 0x1D, 0x5C, 0x11, 0xD6, 0x80, 0x32, 0x34 ), + BYTES_TO_T_UINT_8( 0x22, 0x11, 0xC2, 0x56, 0xD3, 0xC1, 0x03, 0x4A ), + BYTES_TO_T_UINT_8( 0xB9, 0x90, 0x13, 0x32, 0x7F, 0xBF, 0xB4, 0x6B ), + BYTES_TO_T_UINT_4( 0xBD, 0x0C, 0x0E, 0xB7 ), +}; +static const mbedtls_mpi_uint secp224r1_gy[] = { + BYTES_TO_T_UINT_8( 0x34, 0x7E, 0x00, 0x85, 0x99, 0x81, 0xD5, 0x44 ), + BYTES_TO_T_UINT_8( 0x64, 0x47, 0x07, 0x5A, 0xA0, 0x75, 0x43, 0xCD ), + BYTES_TO_T_UINT_8( 0xE6, 0xDF, 0x22, 0x4C, 0xFB, 0x23, 0xF7, 0xB5 ), + BYTES_TO_T_UINT_4( 0x88, 0x63, 0x37, 0xBD ), +}; +static const mbedtls_mpi_uint secp224r1_n[] = { + BYTES_TO_T_UINT_8( 0x3D, 0x2A, 0x5C, 0x5C, 0x45, 0x29, 0xDD, 0x13 ), + BYTES_TO_T_UINT_8( 0x3E, 0xF0, 0xB8, 0xE0, 0xA2, 0x16, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_4( 0xFF, 0xFF, 0xFF, 0xFF ), +}; +#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */ + +/* + * Domain parameters for secp256r1 + */ +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) +static const mbedtls_mpi_uint secp256r1_p[] = { + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00 ), + BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ), + BYTES_TO_T_UINT_8( 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +static const mbedtls_mpi_uint secp256r1_b[] = { + BYTES_TO_T_UINT_8( 0x4B, 0x60, 0xD2, 0x27, 0x3E, 0x3C, 0xCE, 0x3B ), + BYTES_TO_T_UINT_8( 0xF6, 0xB0, 0x53, 0xCC, 0xB0, 0x06, 0x1D, 0x65 ), + BYTES_TO_T_UINT_8( 0xBC, 0x86, 0x98, 0x76, 0x55, 0xBD, 0xEB, 0xB3 ), + BYTES_TO_T_UINT_8( 0xE7, 0x93, 0x3A, 0xAA, 0xD8, 0x35, 0xC6, 0x5A ), +}; +static const mbedtls_mpi_uint secp256r1_gx[] = { + BYTES_TO_T_UINT_8( 0x96, 0xC2, 0x98, 0xD8, 0x45, 0x39, 0xA1, 0xF4 ), + BYTES_TO_T_UINT_8( 0xA0, 0x33, 0xEB, 0x2D, 0x81, 0x7D, 0x03, 0x77 ), + BYTES_TO_T_UINT_8( 0xF2, 0x40, 0xA4, 0x63, 0xE5, 0xE6, 0xBC, 0xF8 ), + BYTES_TO_T_UINT_8( 0x47, 0x42, 0x2C, 0xE1, 0xF2, 0xD1, 0x17, 0x6B ), +}; +static const mbedtls_mpi_uint secp256r1_gy[] = { + BYTES_TO_T_UINT_8( 0xF5, 0x51, 0xBF, 0x37, 0x68, 0x40, 0xB6, 0xCB ), + BYTES_TO_T_UINT_8( 0xCE, 0x5E, 0x31, 0x6B, 0x57, 0x33, 0xCE, 0x2B ), + BYTES_TO_T_UINT_8( 0x16, 0x9E, 0x0F, 0x7C, 0x4A, 0xEB, 0xE7, 0x8E ), + BYTES_TO_T_UINT_8( 0x9B, 0x7F, 0x1A, 0xFE, 0xE2, 0x42, 0xE3, 0x4F ), +}; +static const mbedtls_mpi_uint secp256r1_n[] = { + BYTES_TO_T_UINT_8( 0x51, 0x25, 0x63, 0xFC, 0xC2, 0xCA, 0xB9, 0xF3 ), + BYTES_TO_T_UINT_8( 0x84, 0x9E, 0x17, 0xA7, 0xAD, 0xFA, 0xE6, 0xBC ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */ + +/* + * Domain parameters for secp384r1 + */ +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) +static const mbedtls_mpi_uint secp384r1_p[] = { + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00 ), + BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +static const mbedtls_mpi_uint secp384r1_b[] = { + BYTES_TO_T_UINT_8( 0xEF, 0x2A, 0xEC, 0xD3, 0xED, 0xC8, 0x85, 0x2A ), + BYTES_TO_T_UINT_8( 0x9D, 0xD1, 0x2E, 0x8A, 0x8D, 0x39, 0x56, 0xC6 ), + BYTES_TO_T_UINT_8( 0x5A, 0x87, 0x13, 0x50, 0x8F, 0x08, 0x14, 0x03 ), + BYTES_TO_T_UINT_8( 0x12, 0x41, 0x81, 0xFE, 0x6E, 0x9C, 0x1D, 0x18 ), + BYTES_TO_T_UINT_8( 0x19, 0x2D, 0xF8, 0xE3, 0x6B, 0x05, 0x8E, 0x98 ), + BYTES_TO_T_UINT_8( 0xE4, 0xE7, 0x3E, 0xE2, 0xA7, 0x2F, 0x31, 0xB3 ), +}; +static const mbedtls_mpi_uint secp384r1_gx[] = { + BYTES_TO_T_UINT_8( 0xB7, 0x0A, 0x76, 0x72, 0x38, 0x5E, 0x54, 0x3A ), + BYTES_TO_T_UINT_8( 0x6C, 0x29, 0x55, 0xBF, 0x5D, 0xF2, 0x02, 0x55 ), + BYTES_TO_T_UINT_8( 0x38, 0x2A, 0x54, 0x82, 0xE0, 0x41, 0xF7, 0x59 ), + BYTES_TO_T_UINT_8( 0x98, 0x9B, 0xA7, 0x8B, 0x62, 0x3B, 0x1D, 0x6E ), + BYTES_TO_T_UINT_8( 0x74, 0xAD, 0x20, 0xF3, 0x1E, 0xC7, 0xB1, 0x8E ), + BYTES_TO_T_UINT_8( 0x37, 0x05, 0x8B, 0xBE, 0x22, 0xCA, 0x87, 0xAA ), +}; +static const mbedtls_mpi_uint secp384r1_gy[] = { + BYTES_TO_T_UINT_8( 0x5F, 0x0E, 0xEA, 0x90, 0x7C, 0x1D, 0x43, 0x7A ), + BYTES_TO_T_UINT_8( 0x9D, 0x81, 0x7E, 0x1D, 0xCE, 0xB1, 0x60, 0x0A ), + BYTES_TO_T_UINT_8( 0xC0, 0xB8, 0xF0, 0xB5, 0x13, 0x31, 0xDA, 0xE9 ), + BYTES_TO_T_UINT_8( 0x7C, 0x14, 0x9A, 0x28, 0xBD, 0x1D, 0xF4, 0xF8 ), + BYTES_TO_T_UINT_8( 0x29, 0xDC, 0x92, 0x92, 0xBF, 0x98, 0x9E, 0x5D ), + BYTES_TO_T_UINT_8( 0x6F, 0x2C, 0x26, 0x96, 0x4A, 0xDE, 0x17, 0x36 ), +}; +static const mbedtls_mpi_uint secp384r1_n[] = { + BYTES_TO_T_UINT_8( 0x73, 0x29, 0xC5, 0xCC, 0x6A, 0x19, 0xEC, 0xEC ), + BYTES_TO_T_UINT_8( 0x7A, 0xA7, 0xB0, 0x48, 0xB2, 0x0D, 0x1A, 0x58 ), + BYTES_TO_T_UINT_8( 0xDF, 0x2D, 0x37, 0xF4, 0x81, 0x4D, 0x63, 0xC7 ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */ + +/* + * Domain parameters for secp521r1 + */ +#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) +static const mbedtls_mpi_uint secp521r1_p[] = { + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_2( 0xFF, 0x01 ), +}; +static const mbedtls_mpi_uint secp521r1_b[] = { + BYTES_TO_T_UINT_8( 0x00, 0x3F, 0x50, 0x6B, 0xD4, 0x1F, 0x45, 0xEF ), + BYTES_TO_T_UINT_8( 0xF1, 0x34, 0x2C, 0x3D, 0x88, 0xDF, 0x73, 0x35 ), + BYTES_TO_T_UINT_8( 0x07, 0xBF, 0xB1, 0x3B, 0xBD, 0xC0, 0x52, 0x16 ), + BYTES_TO_T_UINT_8( 0x7B, 0x93, 0x7E, 0xEC, 0x51, 0x39, 0x19, 0x56 ), + BYTES_TO_T_UINT_8( 0xE1, 0x09, 0xF1, 0x8E, 0x91, 0x89, 0xB4, 0xB8 ), + BYTES_TO_T_UINT_8( 0xF3, 0x15, 0xB3, 0x99, 0x5B, 0x72, 0xDA, 0xA2 ), + BYTES_TO_T_UINT_8( 0xEE, 0x40, 0x85, 0xB6, 0xA0, 0x21, 0x9A, 0x92 ), + BYTES_TO_T_UINT_8( 0x1F, 0x9A, 0x1C, 0x8E, 0x61, 0xB9, 0x3E, 0x95 ), + BYTES_TO_T_UINT_2( 0x51, 0x00 ), +}; +static const mbedtls_mpi_uint secp521r1_gx[] = { + BYTES_TO_T_UINT_8( 0x66, 0xBD, 0xE5, 0xC2, 0x31, 0x7E, 0x7E, 0xF9 ), + BYTES_TO_T_UINT_8( 0x9B, 0x42, 0x6A, 0x85, 0xC1, 0xB3, 0x48, 0x33 ), + BYTES_TO_T_UINT_8( 0xDE, 0xA8, 0xFF, 0xA2, 0x27, 0xC1, 0x1D, 0xFE ), + BYTES_TO_T_UINT_8( 0x28, 0x59, 0xE7, 0xEF, 0x77, 0x5E, 0x4B, 0xA1 ), + BYTES_TO_T_UINT_8( 0xBA, 0x3D, 0x4D, 0x6B, 0x60, 0xAF, 0x28, 0xF8 ), + BYTES_TO_T_UINT_8( 0x21, 0xB5, 0x3F, 0x05, 0x39, 0x81, 0x64, 0x9C ), + BYTES_TO_T_UINT_8( 0x42, 0xB4, 0x95, 0x23, 0x66, 0xCB, 0x3E, 0x9E ), + BYTES_TO_T_UINT_8( 0xCD, 0xE9, 0x04, 0x04, 0xB7, 0x06, 0x8E, 0x85 ), + BYTES_TO_T_UINT_2( 0xC6, 0x00 ), +}; +static const mbedtls_mpi_uint secp521r1_gy[] = { + BYTES_TO_T_UINT_8( 0x50, 0x66, 0xD1, 0x9F, 0x76, 0x94, 0xBE, 0x88 ), + BYTES_TO_T_UINT_8( 0x40, 0xC2, 0x72, 0xA2, 0x86, 0x70, 0x3C, 0x35 ), + BYTES_TO_T_UINT_8( 0x61, 0x07, 0xAD, 0x3F, 0x01, 0xB9, 0x50, 0xC5 ), + BYTES_TO_T_UINT_8( 0x40, 0x26, 0xF4, 0x5E, 0x99, 0x72, 0xEE, 0x97 ), + BYTES_TO_T_UINT_8( 0x2C, 0x66, 0x3E, 0x27, 0x17, 0xBD, 0xAF, 0x17 ), + BYTES_TO_T_UINT_8( 0x68, 0x44, 0x9B, 0x57, 0x49, 0x44, 0xF5, 0x98 ), + BYTES_TO_T_UINT_8( 0xD9, 0x1B, 0x7D, 0x2C, 0xB4, 0x5F, 0x8A, 0x5C ), + BYTES_TO_T_UINT_8( 0x04, 0xC0, 0x3B, 0x9A, 0x78, 0x6A, 0x29, 0x39 ), + BYTES_TO_T_UINT_2( 0x18, 0x01 ), +}; +static const mbedtls_mpi_uint secp521r1_n[] = { + BYTES_TO_T_UINT_8( 0x09, 0x64, 0x38, 0x91, 0x1E, 0xB7, 0x6F, 0xBB ), + BYTES_TO_T_UINT_8( 0xAE, 0x47, 0x9C, 0x89, 0xB8, 0xC9, 0xB5, 0x3B ), + BYTES_TO_T_UINT_8( 0xD0, 0xA5, 0x09, 0xF7, 0x48, 0x01, 0xCC, 0x7F ), + BYTES_TO_T_UINT_8( 0x6B, 0x96, 0x2F, 0xBF, 0x83, 0x87, 0x86, 0x51 ), + BYTES_TO_T_UINT_8( 0xFA, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_2( 0xFF, 0x01 ), +}; +#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) +static const mbedtls_mpi_uint secp192k1_p[] = { + BYTES_TO_T_UINT_8( 0x37, 0xEE, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +static const mbedtls_mpi_uint secp192k1_a[] = { + BYTES_TO_T_UINT_2( 0x00, 0x00 ), +}; +static const mbedtls_mpi_uint secp192k1_b[] = { + BYTES_TO_T_UINT_2( 0x03, 0x00 ), +}; +static const mbedtls_mpi_uint secp192k1_gx[] = { + BYTES_TO_T_UINT_8( 0x7D, 0x6C, 0xE0, 0xEA, 0xB1, 0xD1, 0xA5, 0x1D ), + BYTES_TO_T_UINT_8( 0x34, 0xF4, 0xB7, 0x80, 0x02, 0x7D, 0xB0, 0x26 ), + BYTES_TO_T_UINT_8( 0xAE, 0xE9, 0x57, 0xC0, 0x0E, 0xF1, 0x4F, 0xDB ), +}; +static const mbedtls_mpi_uint secp192k1_gy[] = { + BYTES_TO_T_UINT_8( 0x9D, 0x2F, 0x5E, 0xD9, 0x88, 0xAA, 0x82, 0x40 ), + BYTES_TO_T_UINT_8( 0x34, 0x86, 0xBE, 0x15, 0xD0, 0x63, 0x41, 0x84 ), + BYTES_TO_T_UINT_8( 0xA7, 0x28, 0x56, 0x9C, 0x6D, 0x2F, 0x2F, 0x9B ), +}; +static const mbedtls_mpi_uint secp192k1_n[] = { + BYTES_TO_T_UINT_8( 0x8D, 0xFD, 0xDE, 0x74, 0x6A, 0x46, 0x69, 0x0F ), + BYTES_TO_T_UINT_8( 0x17, 0xFC, 0xF2, 0x26, 0xFE, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) +static const mbedtls_mpi_uint secp224k1_p[] = { + BYTES_TO_T_UINT_8( 0x6D, 0xE5, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_4( 0xFF, 0xFF, 0xFF, 0xFF ), +}; +static const mbedtls_mpi_uint secp224k1_a[] = { + BYTES_TO_T_UINT_2( 0x00, 0x00 ), +}; +static const mbedtls_mpi_uint secp224k1_b[] = { + BYTES_TO_T_UINT_2( 0x05, 0x00 ), +}; +static const mbedtls_mpi_uint secp224k1_gx[] = { + BYTES_TO_T_UINT_8( 0x5C, 0xA4, 0xB7, 0xB6, 0x0E, 0x65, 0x7E, 0x0F ), + BYTES_TO_T_UINT_8( 0xA9, 0x75, 0x70, 0xE4, 0xE9, 0x67, 0xA4, 0x69 ), + BYTES_TO_T_UINT_8( 0xA1, 0x28, 0xFC, 0x30, 0xDF, 0x99, 0xF0, 0x4D ), + BYTES_TO_T_UINT_4( 0x33, 0x5B, 0x45, 0xA1 ), +}; +static const mbedtls_mpi_uint secp224k1_gy[] = { + BYTES_TO_T_UINT_8( 0xA5, 0x61, 0x6D, 0x55, 0xDB, 0x4B, 0xCA, 0xE2 ), + BYTES_TO_T_UINT_8( 0x59, 0xBD, 0xB0, 0xC0, 0xF7, 0x19, 0xE3, 0xF7 ), + BYTES_TO_T_UINT_8( 0xD6, 0xFB, 0xCA, 0x82, 0x42, 0x34, 0xBA, 0x7F ), + BYTES_TO_T_UINT_4( 0xED, 0x9F, 0x08, 0x7E ), +}; +static const mbedtls_mpi_uint secp224k1_n[] = { + BYTES_TO_T_UINT_8( 0xF7, 0xB1, 0x9F, 0x76, 0x71, 0xA9, 0xF0, 0xCA ), + BYTES_TO_T_UINT_8( 0x84, 0x61, 0xEC, 0xD2, 0xE8, 0xDC, 0x01, 0x00 ), + BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ), + BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ), +}; +#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) +static const mbedtls_mpi_uint secp256k1_p[] = { + BYTES_TO_T_UINT_8( 0x2F, 0xFC, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +static const mbedtls_mpi_uint secp256k1_a[] = { + BYTES_TO_T_UINT_2( 0x00, 0x00 ), +}; +static const mbedtls_mpi_uint secp256k1_b[] = { + BYTES_TO_T_UINT_2( 0x07, 0x00 ), +}; +static const mbedtls_mpi_uint secp256k1_gx[] = { + BYTES_TO_T_UINT_8( 0x98, 0x17, 0xF8, 0x16, 0x5B, 0x81, 0xF2, 0x59 ), + BYTES_TO_T_UINT_8( 0xD9, 0x28, 0xCE, 0x2D, 0xDB, 0xFC, 0x9B, 0x02 ), + BYTES_TO_T_UINT_8( 0x07, 0x0B, 0x87, 0xCE, 0x95, 0x62, 0xA0, 0x55 ), + BYTES_TO_T_UINT_8( 0xAC, 0xBB, 0xDC, 0xF9, 0x7E, 0x66, 0xBE, 0x79 ), +}; +static const mbedtls_mpi_uint secp256k1_gy[] = { + BYTES_TO_T_UINT_8( 0xB8, 0xD4, 0x10, 0xFB, 0x8F, 0xD0, 0x47, 0x9C ), + BYTES_TO_T_UINT_8( 0x19, 0x54, 0x85, 0xA6, 0x48, 0xB4, 0x17, 0xFD ), + BYTES_TO_T_UINT_8( 0xA8, 0x08, 0x11, 0x0E, 0xFC, 0xFB, 0xA4, 0x5D ), + BYTES_TO_T_UINT_8( 0x65, 0xC4, 0xA3, 0x26, 0x77, 0xDA, 0x3A, 0x48 ), +}; +static const mbedtls_mpi_uint secp256k1_n[] = { + BYTES_TO_T_UINT_8( 0x41, 0x41, 0x36, 0xD0, 0x8C, 0x5E, 0xD2, 0xBF ), + BYTES_TO_T_UINT_8( 0x3B, 0xA0, 0x48, 0xAF, 0xE6, 0xDC, 0xAE, 0xBA ), + BYTES_TO_T_UINT_8( 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), + BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ), +}; +#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */ + +/* + * Domain parameters for brainpoolP256r1 (RFC 5639 3.4) + */ +#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) +static const mbedtls_mpi_uint brainpoolP256r1_p[] = { + BYTES_TO_T_UINT_8( 0x77, 0x53, 0x6E, 0x1F, 0x1D, 0x48, 0x13, 0x20 ), + BYTES_TO_T_UINT_8( 0x28, 0x20, 0x26, 0xD5, 0x23, 0xF6, 0x3B, 0x6E ), + BYTES_TO_T_UINT_8( 0x72, 0x8D, 0x83, 0x9D, 0x90, 0x0A, 0x66, 0x3E ), + BYTES_TO_T_UINT_8( 0xBC, 0xA9, 0xEE, 0xA1, 0xDB, 0x57, 0xFB, 0xA9 ), +}; +static const mbedtls_mpi_uint brainpoolP256r1_a[] = { + BYTES_TO_T_UINT_8( 0xD9, 0xB5, 0x30, 0xF3, 0x44, 0x4B, 0x4A, 0xE9 ), + BYTES_TO_T_UINT_8( 0x6C, 0x5C, 0xDC, 0x26, 0xC1, 0x55, 0x80, 0xFB ), + BYTES_TO_T_UINT_8( 0xE7, 0xFF, 0x7A, 0x41, 0x30, 0x75, 0xF6, 0xEE ), + BYTES_TO_T_UINT_8( 0x57, 0x30, 0x2C, 0xFC, 0x75, 0x09, 0x5A, 0x7D ), +}; +static const mbedtls_mpi_uint brainpoolP256r1_b[] = { + BYTES_TO_T_UINT_8( 0xB6, 0x07, 0x8C, 0xFF, 0x18, 0xDC, 0xCC, 0x6B ), + BYTES_TO_T_UINT_8( 0xCE, 0xE1, 0xF7, 0x5C, 0x29, 0x16, 0x84, 0x95 ), + BYTES_TO_T_UINT_8( 0xBF, 0x7C, 0xD7, 0xBB, 0xD9, 0xB5, 0x30, 0xF3 ), + BYTES_TO_T_UINT_8( 0x44, 0x4B, 0x4A, 0xE9, 0x6C, 0x5C, 0xDC, 0x26 ), +}; +static const mbedtls_mpi_uint brainpoolP256r1_gx[] = { + BYTES_TO_T_UINT_8( 0x62, 0x32, 0xCE, 0x9A, 0xBD, 0x53, 0x44, 0x3A ), + BYTES_TO_T_UINT_8( 0xC2, 0x23, 0xBD, 0xE3, 0xE1, 0x27, 0xDE, 0xB9 ), + BYTES_TO_T_UINT_8( 0xAF, 0xB7, 0x81, 0xFC, 0x2F, 0x48, 0x4B, 0x2C ), + BYTES_TO_T_UINT_8( 0xCB, 0x57, 0x7E, 0xCB, 0xB9, 0xAE, 0xD2, 0x8B ), +}; +static const mbedtls_mpi_uint brainpoolP256r1_gy[] = { + BYTES_TO_T_UINT_8( 0x97, 0x69, 0x04, 0x2F, 0xC7, 0x54, 0x1D, 0x5C ), + BYTES_TO_T_UINT_8( 0x54, 0x8E, 0xED, 0x2D, 0x13, 0x45, 0x77, 0xC2 ), + BYTES_TO_T_UINT_8( 0xC9, 0x1D, 0x61, 0x14, 0x1A, 0x46, 0xF8, 0x97 ), + BYTES_TO_T_UINT_8( 0xFD, 0xC4, 0xDA, 0xC3, 0x35, 0xF8, 0x7E, 0x54 ), +}; +static const mbedtls_mpi_uint brainpoolP256r1_n[] = { + BYTES_TO_T_UINT_8( 0xA7, 0x56, 0x48, 0x97, 0x82, 0x0E, 0x1E, 0x90 ), + BYTES_TO_T_UINT_8( 0xF7, 0xA6, 0x61, 0xB5, 0xA3, 0x7A, 0x39, 0x8C ), + BYTES_TO_T_UINT_8( 0x71, 0x8D, 0x83, 0x9D, 0x90, 0x0A, 0x66, 0x3E ), + BYTES_TO_T_UINT_8( 0xBC, 0xA9, 0xEE, 0xA1, 0xDB, 0x57, 0xFB, 0xA9 ), +}; +#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */ + +/* + * Domain parameters for brainpoolP384r1 (RFC 5639 3.6) + */ +#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) +static const mbedtls_mpi_uint brainpoolP384r1_p[] = { + BYTES_TO_T_UINT_8( 0x53, 0xEC, 0x07, 0x31, 0x13, 0x00, 0x47, 0x87 ), + BYTES_TO_T_UINT_8( 0x71, 0x1A, 0x1D, 0x90, 0x29, 0xA7, 0xD3, 0xAC ), + BYTES_TO_T_UINT_8( 0x23, 0x11, 0xB7, 0x7F, 0x19, 0xDA, 0xB1, 0x12 ), + BYTES_TO_T_UINT_8( 0xB4, 0x56, 0x54, 0xED, 0x09, 0x71, 0x2F, 0x15 ), + BYTES_TO_T_UINT_8( 0xDF, 0x41, 0xE6, 0x50, 0x7E, 0x6F, 0x5D, 0x0F ), + BYTES_TO_T_UINT_8( 0x28, 0x6D, 0x38, 0xA3, 0x82, 0x1E, 0xB9, 0x8C ), +}; +static const mbedtls_mpi_uint brainpoolP384r1_a[] = { + BYTES_TO_T_UINT_8( 0x26, 0x28, 0xCE, 0x22, 0xDD, 0xC7, 0xA8, 0x04 ), + BYTES_TO_T_UINT_8( 0xEB, 0xD4, 0x3A, 0x50, 0x4A, 0x81, 0xA5, 0x8A ), + BYTES_TO_T_UINT_8( 0x0F, 0xF9, 0x91, 0xBA, 0xEF, 0x65, 0x91, 0x13 ), + BYTES_TO_T_UINT_8( 0x87, 0x27, 0xB2, 0x4F, 0x8E, 0xA2, 0xBE, 0xC2 ), + BYTES_TO_T_UINT_8( 0xA0, 0xAF, 0x05, 0xCE, 0x0A, 0x08, 0x72, 0x3C ), + BYTES_TO_T_UINT_8( 0x0C, 0x15, 0x8C, 0x3D, 0xC6, 0x82, 0xC3, 0x7B ), +}; +static const mbedtls_mpi_uint brainpoolP384r1_b[] = { + BYTES_TO_T_UINT_8( 0x11, 0x4C, 0x50, 0xFA, 0x96, 0x86, 0xB7, 0x3A ), + BYTES_TO_T_UINT_8( 0x94, 0xC9, 0xDB, 0x95, 0x02, 0x39, 0xB4, 0x7C ), + BYTES_TO_T_UINT_8( 0xD5, 0x62, 0xEB, 0x3E, 0xA5, 0x0E, 0x88, 0x2E ), + BYTES_TO_T_UINT_8( 0xA6, 0xD2, 0xDC, 0x07, 0xE1, 0x7D, 0xB7, 0x2F ), + BYTES_TO_T_UINT_8( 0x7C, 0x44, 0xF0, 0x16, 0x54, 0xB5, 0x39, 0x8B ), + BYTES_TO_T_UINT_8( 0x26, 0x28, 0xCE, 0x22, 0xDD, 0xC7, 0xA8, 0x04 ), +}; +static const mbedtls_mpi_uint brainpoolP384r1_gx[] = { + BYTES_TO_T_UINT_8( 0x1E, 0xAF, 0xD4, 0x47, 0xE2, 0xB2, 0x87, 0xEF ), + BYTES_TO_T_UINT_8( 0xAA, 0x46, 0xD6, 0x36, 0x34, 0xE0, 0x26, 0xE8 ), + BYTES_TO_T_UINT_8( 0xE8, 0x10, 0xBD, 0x0C, 0xFE, 0xCA, 0x7F, 0xDB ), + BYTES_TO_T_UINT_8( 0xE3, 0x4F, 0xF1, 0x7E, 0xE7, 0xA3, 0x47, 0x88 ), + BYTES_TO_T_UINT_8( 0x6B, 0x3F, 0xC1, 0xB7, 0x81, 0x3A, 0xA6, 0xA2 ), + BYTES_TO_T_UINT_8( 0xFF, 0x45, 0xCF, 0x68, 0xF0, 0x64, 0x1C, 0x1D ), +}; +static const mbedtls_mpi_uint brainpoolP384r1_gy[] = { + BYTES_TO_T_UINT_8( 0x15, 0x53, 0x3C, 0x26, 0x41, 0x03, 0x82, 0x42 ), + BYTES_TO_T_UINT_8( 0x11, 0x81, 0x91, 0x77, 0x21, 0x46, 0x46, 0x0E ), + BYTES_TO_T_UINT_8( 0x28, 0x29, 0x91, 0xF9, 0x4F, 0x05, 0x9C, 0xE1 ), + BYTES_TO_T_UINT_8( 0x64, 0x58, 0xEC, 0xFE, 0x29, 0x0B, 0xB7, 0x62 ), + BYTES_TO_T_UINT_8( 0x52, 0xD5, 0xCF, 0x95, 0x8E, 0xEB, 0xB1, 0x5C ), + BYTES_TO_T_UINT_8( 0xA4, 0xC2, 0xF9, 0x20, 0x75, 0x1D, 0xBE, 0x8A ), +}; +static const mbedtls_mpi_uint brainpoolP384r1_n[] = { + BYTES_TO_T_UINT_8( 0x65, 0x65, 0x04, 0xE9, 0x02, 0x32, 0x88, 0x3B ), + BYTES_TO_T_UINT_8( 0x10, 0xC3, 0x7F, 0x6B, 0xAF, 0xB6, 0x3A, 0xCF ), + BYTES_TO_T_UINT_8( 0xA7, 0x25, 0x04, 0xAC, 0x6C, 0x6E, 0x16, 0x1F ), + BYTES_TO_T_UINT_8( 0xB3, 0x56, 0x54, 0xED, 0x09, 0x71, 0x2F, 0x15 ), + BYTES_TO_T_UINT_8( 0xDF, 0x41, 0xE6, 0x50, 0x7E, 0x6F, 0x5D, 0x0F ), + BYTES_TO_T_UINT_8( 0x28, 0x6D, 0x38, 0xA3, 0x82, 0x1E, 0xB9, 0x8C ), +}; +#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */ + +/* + * Domain parameters for brainpoolP512r1 (RFC 5639 3.7) + */ +#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) +static const mbedtls_mpi_uint brainpoolP512r1_p[] = { + BYTES_TO_T_UINT_8( 0xF3, 0x48, 0x3A, 0x58, 0x56, 0x60, 0xAA, 0x28 ), + BYTES_TO_T_UINT_8( 0x85, 0xC6, 0x82, 0x2D, 0x2F, 0xFF, 0x81, 0x28 ), + BYTES_TO_T_UINT_8( 0xE6, 0x80, 0xA3, 0xE6, 0x2A, 0xA1, 0xCD, 0xAE ), + BYTES_TO_T_UINT_8( 0x42, 0x68, 0xC6, 0x9B, 0x00, 0x9B, 0x4D, 0x7D ), + BYTES_TO_T_UINT_8( 0x71, 0x08, 0x33, 0x70, 0xCA, 0x9C, 0x63, 0xD6 ), + BYTES_TO_T_UINT_8( 0x0E, 0xD2, 0xC9, 0xB3, 0xB3, 0x8D, 0x30, 0xCB ), + BYTES_TO_T_UINT_8( 0x07, 0xFC, 0xC9, 0x33, 0xAE, 0xE6, 0xD4, 0x3F ), + BYTES_TO_T_UINT_8( 0x8B, 0xC4, 0xE9, 0xDB, 0xB8, 0x9D, 0xDD, 0xAA ), +}; +static const mbedtls_mpi_uint brainpoolP512r1_a[] = { + BYTES_TO_T_UINT_8( 0xCA, 0x94, 0xFC, 0x77, 0x4D, 0xAC, 0xC1, 0xE7 ), + BYTES_TO_T_UINT_8( 0xB9, 0xC7, 0xF2, 0x2B, 0xA7, 0x17, 0x11, 0x7F ), + BYTES_TO_T_UINT_8( 0xB5, 0xC8, 0x9A, 0x8B, 0xC9, 0xF1, 0x2E, 0x0A ), + BYTES_TO_T_UINT_8( 0xA1, 0x3A, 0x25, 0xA8, 0x5A, 0x5D, 0xED, 0x2D ), + BYTES_TO_T_UINT_8( 0xBC, 0x63, 0x98, 0xEA, 0xCA, 0x41, 0x34, 0xA8 ), + BYTES_TO_T_UINT_8( 0x10, 0x16, 0xF9, 0x3D, 0x8D, 0xDD, 0xCB, 0x94 ), + BYTES_TO_T_UINT_8( 0xC5, 0x4C, 0x23, 0xAC, 0x45, 0x71, 0x32, 0xE2 ), + BYTES_TO_T_UINT_8( 0x89, 0x3B, 0x60, 0x8B, 0x31, 0xA3, 0x30, 0x78 ), +}; +static const mbedtls_mpi_uint brainpoolP512r1_b[] = { + BYTES_TO_T_UINT_8( 0x23, 0xF7, 0x16, 0x80, 0x63, 0xBD, 0x09, 0x28 ), + BYTES_TO_T_UINT_8( 0xDD, 0xE5, 0xBA, 0x5E, 0xB7, 0x50, 0x40, 0x98 ), + BYTES_TO_T_UINT_8( 0x67, 0x3E, 0x08, 0xDC, 0xCA, 0x94, 0xFC, 0x77 ), + BYTES_TO_T_UINT_8( 0x4D, 0xAC, 0xC1, 0xE7, 0xB9, 0xC7, 0xF2, 0x2B ), + BYTES_TO_T_UINT_8( 0xA7, 0x17, 0x11, 0x7F, 0xB5, 0xC8, 0x9A, 0x8B ), + BYTES_TO_T_UINT_8( 0xC9, 0xF1, 0x2E, 0x0A, 0xA1, 0x3A, 0x25, 0xA8 ), + BYTES_TO_T_UINT_8( 0x5A, 0x5D, 0xED, 0x2D, 0xBC, 0x63, 0x98, 0xEA ), + BYTES_TO_T_UINT_8( 0xCA, 0x41, 0x34, 0xA8, 0x10, 0x16, 0xF9, 0x3D ), +}; +static const mbedtls_mpi_uint brainpoolP512r1_gx[] = { + BYTES_TO_T_UINT_8( 0x22, 0xF8, 0xB9, 0xBC, 0x09, 0x22, 0x35, 0x8B ), + BYTES_TO_T_UINT_8( 0x68, 0x5E, 0x6A, 0x40, 0x47, 0x50, 0x6D, 0x7C ), + BYTES_TO_T_UINT_8( 0x5F, 0x7D, 0xB9, 0x93, 0x7B, 0x68, 0xD1, 0x50 ), + BYTES_TO_T_UINT_8( 0x8D, 0xD4, 0xD0, 0xE2, 0x78, 0x1F, 0x3B, 0xFF ), + BYTES_TO_T_UINT_8( 0x8E, 0x09, 0xD0, 0xF4, 0xEE, 0x62, 0x3B, 0xB4 ), + BYTES_TO_T_UINT_8( 0xC1, 0x16, 0xD9, 0xB5, 0x70, 0x9F, 0xED, 0x85 ), + BYTES_TO_T_UINT_8( 0x93, 0x6A, 0x4C, 0x9C, 0x2E, 0x32, 0x21, 0x5A ), + BYTES_TO_T_UINT_8( 0x64, 0xD9, 0x2E, 0xD8, 0xBD, 0xE4, 0xAE, 0x81 ), +}; +static const mbedtls_mpi_uint brainpoolP512r1_gy[] = { + BYTES_TO_T_UINT_8( 0x92, 0x08, 0xD8, 0x3A, 0x0F, 0x1E, 0xCD, 0x78 ), + BYTES_TO_T_UINT_8( 0x06, 0x54, 0xF0, 0xA8, 0x2F, 0x2B, 0xCA, 0xD1 ), + BYTES_TO_T_UINT_8( 0xAE, 0x63, 0x27, 0x8A, 0xD8, 0x4B, 0xCA, 0x5B ), + BYTES_TO_T_UINT_8( 0x5E, 0x48, 0x5F, 0x4A, 0x49, 0xDE, 0xDC, 0xB2 ), + BYTES_TO_T_UINT_8( 0x11, 0x81, 0x1F, 0x88, 0x5B, 0xC5, 0x00, 0xA0 ), + BYTES_TO_T_UINT_8( 0x1A, 0x7B, 0xA5, 0x24, 0x00, 0xF7, 0x09, 0xF2 ), + BYTES_TO_T_UINT_8( 0xFD, 0x22, 0x78, 0xCF, 0xA9, 0xBF, 0xEA, 0xC0 ), + BYTES_TO_T_UINT_8( 0xEC, 0x32, 0x63, 0x56, 0x5D, 0x38, 0xDE, 0x7D ), +}; +static const mbedtls_mpi_uint brainpoolP512r1_n[] = { + BYTES_TO_T_UINT_8( 0x69, 0x00, 0xA9, 0x9C, 0x82, 0x96, 0x87, 0xB5 ), + BYTES_TO_T_UINT_8( 0xDD, 0xDA, 0x5D, 0x08, 0x81, 0xD3, 0xB1, 0x1D ), + BYTES_TO_T_UINT_8( 0x47, 0x10, 0xAC, 0x7F, 0x19, 0x61, 0x86, 0x41 ), + BYTES_TO_T_UINT_8( 0x19, 0x26, 0xA9, 0x4C, 0x41, 0x5C, 0x3E, 0x55 ), + BYTES_TO_T_UINT_8( 0x70, 0x08, 0x33, 0x70, 0xCA, 0x9C, 0x63, 0xD6 ), + BYTES_TO_T_UINT_8( 0x0E, 0xD2, 0xC9, 0xB3, 0xB3, 0x8D, 0x30, 0xCB ), + BYTES_TO_T_UINT_8( 0x07, 0xFC, 0xC9, 0x33, 0xAE, 0xE6, 0xD4, 0x3F ), + BYTES_TO_T_UINT_8( 0x8B, 0xC4, 0xE9, 0xDB, 0xB8, 0x9D, 0xDD, 0xAA ), +}; +#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */ + +/* + * Create an MPI from embedded constants + * (assumes len is an exact multiple of sizeof mbedtls_mpi_uint) + */ +static inline void ecp_mpi_load( mbedtls_mpi *X, const mbedtls_mpi_uint *p, size_t len ) +{ + X->s = 1; + X->n = len / sizeof( mbedtls_mpi_uint ); + X->p = (mbedtls_mpi_uint *) p; +} + +/* + * Set an MPI to static value 1 + */ +static inline void ecp_mpi_set1( mbedtls_mpi *X ) +{ + static mbedtls_mpi_uint one[] = { 1 }; + X->s = 1; + X->n = 1; + X->p = one; +} + +/* + * Make group available from embedded constants + */ +static int ecp_group_load( mbedtls_ecp_group *grp, + const mbedtls_mpi_uint *p, size_t plen, + const mbedtls_mpi_uint *a, size_t alen, + const mbedtls_mpi_uint *b, size_t blen, + const mbedtls_mpi_uint *gx, size_t gxlen, + const mbedtls_mpi_uint *gy, size_t gylen, + const mbedtls_mpi_uint *n, size_t nlen) +{ + ecp_mpi_load( &grp->P, p, plen ); + if( a != NULL ) + ecp_mpi_load( &grp->A, a, alen ); + ecp_mpi_load( &grp->B, b, blen ); + ecp_mpi_load( &grp->N, n, nlen ); + + ecp_mpi_load( &grp->G.X, gx, gxlen ); + ecp_mpi_load( &grp->G.Y, gy, gylen ); + ecp_mpi_set1( &grp->G.Z ); + + grp->pbits = mbedtls_mpi_bitlen( &grp->P ); + grp->nbits = mbedtls_mpi_bitlen( &grp->N ); + + grp->h = 1; + + return( 0 ); +} + +#if defined(MBEDTLS_ECP_NIST_OPTIM) +/* Forward declarations */ +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) +static int ecp_mod_p192( mbedtls_mpi * ); +#endif +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) +static int ecp_mod_p224( mbedtls_mpi * ); +#endif +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) +static int ecp_mod_p256( mbedtls_mpi * ); +#endif +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) +static int ecp_mod_p384( mbedtls_mpi * ); +#endif +#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) +static int ecp_mod_p521( mbedtls_mpi * ); +#endif + +#define NIST_MODP( P ) grp->modp = ecp_mod_ ## P; +#else +#define NIST_MODP( P ) +#endif /* MBEDTLS_ECP_NIST_OPTIM */ + +/* Additional forward declarations */ +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) +static int ecp_mod_p255( mbedtls_mpi * ); +#endif +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) +static int ecp_mod_p192k1( mbedtls_mpi * ); +#endif +#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) +static int ecp_mod_p224k1( mbedtls_mpi * ); +#endif +#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) +static int ecp_mod_p256k1( mbedtls_mpi * ); +#endif + +#define LOAD_GROUP_A( G ) ecp_group_load( grp, \ + G ## _p, sizeof( G ## _p ), \ + G ## _a, sizeof( G ## _a ), \ + G ## _b, sizeof( G ## _b ), \ + G ## _gx, sizeof( G ## _gx ), \ + G ## _gy, sizeof( G ## _gy ), \ + G ## _n, sizeof( G ## _n ) ) + +#define LOAD_GROUP( G ) ecp_group_load( grp, \ + G ## _p, sizeof( G ## _p ), \ + NULL, 0, \ + G ## _b, sizeof( G ## _b ), \ + G ## _gx, sizeof( G ## _gx ), \ + G ## _gy, sizeof( G ## _gy ), \ + G ## _n, sizeof( G ## _n ) ) + +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) +/* + * Specialized function for creating the Curve25519 group + */ +static int ecp_use_curve25519( mbedtls_ecp_group *grp ) +{ + int ret; + + /* Actually ( A + 2 ) / 4 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &grp->A, 16, "01DB42" ) ); + + /* P = 2^255 - 19 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &grp->P, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &grp->P, 255 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &grp->P, &grp->P, 19 ) ); + grp->pbits = mbedtls_mpi_bitlen( &grp->P ); + + /* Y intentionaly not set, since we use x/z coordinates. + * This is used as a marker to identify Montgomery curves! */ + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &grp->G.X, 9 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &grp->G.Z, 1 ) ); + mbedtls_mpi_free( &grp->G.Y ); + + /* Actually, the required msb for private keys */ + grp->nbits = 254; + +cleanup: + if( ret != 0 ) + mbedtls_ecp_group_free( grp ); + + return( ret ); +} +#endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ + +/* + * Set a group using well-known domain parameters + */ +int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id id ) +{ + mbedtls_ecp_group_free( grp ); + + grp->id = id; + + switch( id ) + { +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) + case MBEDTLS_ECP_DP_SECP192R1: + NIST_MODP( p192 ); + return( LOAD_GROUP( secp192r1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) + case MBEDTLS_ECP_DP_SECP224R1: + NIST_MODP( p224 ); + return( LOAD_GROUP( secp224r1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) + case MBEDTLS_ECP_DP_SECP256R1: + NIST_MODP( p256 ); + return( LOAD_GROUP( secp256r1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) + case MBEDTLS_ECP_DP_SECP384R1: + NIST_MODP( p384 ); + return( LOAD_GROUP( secp384r1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) + case MBEDTLS_ECP_DP_SECP521R1: + NIST_MODP( p521 ); + return( LOAD_GROUP( secp521r1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) + case MBEDTLS_ECP_DP_SECP192K1: + grp->modp = ecp_mod_p192k1; + return( LOAD_GROUP_A( secp192k1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) + case MBEDTLS_ECP_DP_SECP224K1: + grp->modp = ecp_mod_p224k1; + return( LOAD_GROUP_A( secp224k1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) + case MBEDTLS_ECP_DP_SECP256K1: + grp->modp = ecp_mod_p256k1; + return( LOAD_GROUP_A( secp256k1 ) ); +#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) + case MBEDTLS_ECP_DP_BP256R1: + return( LOAD_GROUP_A( brainpoolP256r1 ) ); +#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) + case MBEDTLS_ECP_DP_BP384R1: + return( LOAD_GROUP_A( brainpoolP384r1 ) ); +#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) + case MBEDTLS_ECP_DP_BP512R1: + return( LOAD_GROUP_A( brainpoolP512r1 ) ); +#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) + case MBEDTLS_ECP_DP_CURVE25519: + grp->modp = ecp_mod_p255; + return( ecp_use_curve25519( grp ) ); +#endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ + + default: + mbedtls_ecp_group_free( grp ); + return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + } +} + +#if defined(MBEDTLS_ECP_NIST_OPTIM) +/* + * Fast reduction modulo the primes used by the NIST curves. + * + * These functions are critical for speed, but not needed for correct + * operations. So, we make the choice to heavily rely on the internals of our + * bignum library, which creates a tight coupling between these functions and + * our MPI implementation. However, the coupling between the ECP module and + * MPI remains loose, since these functions can be deactivated at will. + */ + +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) +/* + * Compared to the way things are presented in FIPS 186-3 D.2, + * we proceed in columns, from right (least significant chunk) to left, + * adding chunks to N in place, and keeping a carry for the next chunk. + * This avoids moving things around in memory, and uselessly adding zeros, + * compared to the more straightforward, line-oriented approach. + * + * For this prime we need to handle data in chunks of 64 bits. + * Since this is always a multiple of our basic mbedtls_mpi_uint, we can + * use a mbedtls_mpi_uint * to designate such a chunk, and small loops to handle it. + */ + +/* Add 64-bit chunks (dst += src) and update carry */ +static inline void add64( mbedtls_mpi_uint *dst, mbedtls_mpi_uint *src, mbedtls_mpi_uint *carry ) +{ + unsigned char i; + mbedtls_mpi_uint c = 0; + for( i = 0; i < 8 / sizeof( mbedtls_mpi_uint ); i++, dst++, src++ ) + { + *dst += c; c = ( *dst < c ); + *dst += *src; c += ( *dst < *src ); + } + *carry += c; +} + +/* Add carry to a 64-bit chunk and update carry */ +static inline void carry64( mbedtls_mpi_uint *dst, mbedtls_mpi_uint *carry ) +{ + unsigned char i; + for( i = 0; i < 8 / sizeof( mbedtls_mpi_uint ); i++, dst++ ) + { + *dst += *carry; + *carry = ( *dst < *carry ); + } +} + +#define WIDTH 8 / sizeof( mbedtls_mpi_uint ) +#define A( i ) N->p + i * WIDTH +#define ADD( i ) add64( p, A( i ), &c ) +#define NEXT p += WIDTH; carry64( p, &c ) +#define LAST p += WIDTH; *p = c; while( ++p < end ) *p = 0 + +/* + * Fast quasi-reduction modulo p192 (FIPS 186-3 D.2.1) + */ +static int ecp_mod_p192( mbedtls_mpi *N ) +{ + int ret; + mbedtls_mpi_uint c = 0; + mbedtls_mpi_uint *p, *end; + + /* Make sure we have enough blocks so that A(5) is legal */ + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( N, 6 * WIDTH ) ); + + p = N->p; + end = p + N->n; + + ADD( 3 ); ADD( 5 ); NEXT; // A0 += A3 + A5 + ADD( 3 ); ADD( 4 ); ADD( 5 ); NEXT; // A1 += A3 + A4 + A5 + ADD( 4 ); ADD( 5 ); LAST; // A2 += A4 + A5 + +cleanup: + return( ret ); +} + +#undef WIDTH +#undef A +#undef ADD +#undef NEXT +#undef LAST +#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) +/* + * The reader is advised to first understand ecp_mod_p192() since the same + * general structure is used here, but with additional complications: + * (1) chunks of 32 bits, and (2) subtractions. + */ + +/* + * For these primes, we need to handle data in chunks of 32 bits. + * This makes it more complicated if we use 64 bits limbs in MPI, + * which prevents us from using a uniform access method as for p192. + * + * So, we define a mini abstraction layer to access 32 bit chunks, + * load them in 'cur' for work, and store them back from 'cur' when done. + * + * While at it, also define the size of N in terms of 32-bit chunks. + */ +#define LOAD32 cur = A( i ); + +#if defined(MBEDTLS_HAVE_INT32) /* 32 bit */ + +#define MAX32 N->n +#define A( j ) N->p[j] +#define STORE32 N->p[i] = cur; + +#else /* 64-bit */ + +#define MAX32 N->n * 2 +#define A( j ) j % 2 ? (uint32_t)( N->p[j/2] >> 32 ) : (uint32_t)( N->p[j/2] ) +#define STORE32 \ + if( i % 2 ) { \ + N->p[i/2] &= 0x00000000FFFFFFFF; \ + N->p[i/2] |= ((mbedtls_mpi_uint) cur) << 32; \ + } else { \ + N->p[i/2] &= 0xFFFFFFFF00000000; \ + N->p[i/2] |= (mbedtls_mpi_uint) cur; \ + } + +#endif /* sizeof( mbedtls_mpi_uint ) */ + +/* + * Helpers for addition and subtraction of chunks, with signed carry. + */ +static inline void add32( uint32_t *dst, uint32_t src, signed char *carry ) +{ + *dst += src; + *carry += ( *dst < src ); +} + +static inline void sub32( uint32_t *dst, uint32_t src, signed char *carry ) +{ + *carry -= ( *dst < src ); + *dst -= src; +} + +#define ADD( j ) add32( &cur, A( j ), &c ); +#define SUB( j ) sub32( &cur, A( j ), &c ); + +/* + * Helpers for the main 'loop' + * (see fix_negative for the motivation of C) + */ +#define INIT( b ) \ + int ret; \ + signed char c = 0, cc; \ + uint32_t cur; \ + size_t i = 0, bits = b; \ + mbedtls_mpi C; \ + mbedtls_mpi_uint Cp[ b / 8 / sizeof( mbedtls_mpi_uint) + 1 ]; \ + \ + C.s = 1; \ + C.n = b / 8 / sizeof( mbedtls_mpi_uint) + 1; \ + C.p = Cp; \ + memset( Cp, 0, C.n * sizeof( mbedtls_mpi_uint ) ); \ + \ + MBEDTLS_MPI_CHK( mbedtls_mpi_grow( N, b * 2 / 8 / sizeof( mbedtls_mpi_uint ) ) ); \ + LOAD32; + +#define NEXT \ + STORE32; i++; LOAD32; \ + cc = c; c = 0; \ + if( cc < 0 ) \ + sub32( &cur, -cc, &c ); \ + else \ + add32( &cur, cc, &c ); \ + +#define LAST \ + STORE32; i++; \ + cur = c > 0 ? c : 0; STORE32; \ + cur = 0; while( ++i < MAX32 ) { STORE32; } \ + if( c < 0 ) fix_negative( N, c, &C, bits ); + +/* + * If the result is negative, we get it in the form + * c * 2^(bits + 32) + N, with c negative and N positive shorter than 'bits' + */ +static inline int fix_negative( mbedtls_mpi *N, signed char c, mbedtls_mpi *C, size_t bits ) +{ + int ret; + + /* C = - c * 2^(bits + 32) */ +#if !defined(MBEDTLS_HAVE_INT64) + ((void) bits); +#else + if( bits == 224 ) + C->p[ C->n - 1 ] = ((mbedtls_mpi_uint) -c) << 32; + else +#endif + C->p[ C->n - 1 ] = (mbedtls_mpi_uint) -c; + + /* N = - ( C - N ) */ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( N, C, N ) ); + N->s = -1; + +cleanup: + + return( ret ); +} + +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) +/* + * Fast quasi-reduction modulo p224 (FIPS 186-3 D.2.2) + */ +static int ecp_mod_p224( mbedtls_mpi *N ) +{ + INIT( 224 ); + + SUB( 7 ); SUB( 11 ); NEXT; // A0 += -A7 - A11 + SUB( 8 ); SUB( 12 ); NEXT; // A1 += -A8 - A12 + SUB( 9 ); SUB( 13 ); NEXT; // A2 += -A9 - A13 + SUB( 10 ); ADD( 7 ); ADD( 11 ); NEXT; // A3 += -A10 + A7 + A11 + SUB( 11 ); ADD( 8 ); ADD( 12 ); NEXT; // A4 += -A11 + A8 + A12 + SUB( 12 ); ADD( 9 ); ADD( 13 ); NEXT; // A5 += -A12 + A9 + A13 + SUB( 13 ); ADD( 10 ); LAST; // A6 += -A13 + A10 + +cleanup: + return( ret ); +} +#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) +/* + * Fast quasi-reduction modulo p256 (FIPS 186-3 D.2.3) + */ +static int ecp_mod_p256( mbedtls_mpi *N ) +{ + INIT( 256 ); + + ADD( 8 ); ADD( 9 ); + SUB( 11 ); SUB( 12 ); SUB( 13 ); SUB( 14 ); NEXT; // A0 + + ADD( 9 ); ADD( 10 ); + SUB( 12 ); SUB( 13 ); SUB( 14 ); SUB( 15 ); NEXT; // A1 + + ADD( 10 ); ADD( 11 ); + SUB( 13 ); SUB( 14 ); SUB( 15 ); NEXT; // A2 + + ADD( 11 ); ADD( 11 ); ADD( 12 ); ADD( 12 ); ADD( 13 ); + SUB( 15 ); SUB( 8 ); SUB( 9 ); NEXT; // A3 + + ADD( 12 ); ADD( 12 ); ADD( 13 ); ADD( 13 ); ADD( 14 ); + SUB( 9 ); SUB( 10 ); NEXT; // A4 + + ADD( 13 ); ADD( 13 ); ADD( 14 ); ADD( 14 ); ADD( 15 ); + SUB( 10 ); SUB( 11 ); NEXT; // A5 + + ADD( 14 ); ADD( 14 ); ADD( 15 ); ADD( 15 ); ADD( 14 ); ADD( 13 ); + SUB( 8 ); SUB( 9 ); NEXT; // A6 + + ADD( 15 ); ADD( 15 ); ADD( 15 ); ADD( 8 ); + SUB( 10 ); SUB( 11 ); SUB( 12 ); SUB( 13 ); LAST; // A7 + +cleanup: + return( ret ); +} +#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) +/* + * Fast quasi-reduction modulo p384 (FIPS 186-3 D.2.4) + */ +static int ecp_mod_p384( mbedtls_mpi *N ) +{ + INIT( 384 ); + + ADD( 12 ); ADD( 21 ); ADD( 20 ); + SUB( 23 ); NEXT; // A0 + + ADD( 13 ); ADD( 22 ); ADD( 23 ); + SUB( 12 ); SUB( 20 ); NEXT; // A2 + + ADD( 14 ); ADD( 23 ); + SUB( 13 ); SUB( 21 ); NEXT; // A2 + + ADD( 15 ); ADD( 12 ); ADD( 20 ); ADD( 21 ); + SUB( 14 ); SUB( 22 ); SUB( 23 ); NEXT; // A3 + + ADD( 21 ); ADD( 21 ); ADD( 16 ); ADD( 13 ); ADD( 12 ); ADD( 20 ); ADD( 22 ); + SUB( 15 ); SUB( 23 ); SUB( 23 ); NEXT; // A4 + + ADD( 22 ); ADD( 22 ); ADD( 17 ); ADD( 14 ); ADD( 13 ); ADD( 21 ); ADD( 23 ); + SUB( 16 ); NEXT; // A5 + + ADD( 23 ); ADD( 23 ); ADD( 18 ); ADD( 15 ); ADD( 14 ); ADD( 22 ); + SUB( 17 ); NEXT; // A6 + + ADD( 19 ); ADD( 16 ); ADD( 15 ); ADD( 23 ); + SUB( 18 ); NEXT; // A7 + + ADD( 20 ); ADD( 17 ); ADD( 16 ); + SUB( 19 ); NEXT; // A8 + + ADD( 21 ); ADD( 18 ); ADD( 17 ); + SUB( 20 ); NEXT; // A9 + + ADD( 22 ); ADD( 19 ); ADD( 18 ); + SUB( 21 ); NEXT; // A10 + + ADD( 23 ); ADD( 20 ); ADD( 19 ); + SUB( 22 ); LAST; // A11 + +cleanup: + return( ret ); +} +#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */ + +#undef A +#undef LOAD32 +#undef STORE32 +#undef MAX32 +#undef INIT +#undef NEXT +#undef LAST + +#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED || + MBEDTLS_ECP_DP_SECP256R1_ENABLED || + MBEDTLS_ECP_DP_SECP384R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) +/* + * Here we have an actual Mersenne prime, so things are more straightforward. + * However, chunks are aligned on a 'weird' boundary (521 bits). + */ + +/* Size of p521 in terms of mbedtls_mpi_uint */ +#define P521_WIDTH ( 521 / 8 / sizeof( mbedtls_mpi_uint ) + 1 ) + +/* Bits to keep in the most significant mbedtls_mpi_uint */ +#define P521_MASK 0x01FF + +/* + * Fast quasi-reduction modulo p521 (FIPS 186-3 D.2.5) + * Write N as A1 + 2^521 A0, return A0 + A1 + */ +static int ecp_mod_p521( mbedtls_mpi *N ) +{ + int ret; + size_t i; + mbedtls_mpi M; + mbedtls_mpi_uint Mp[P521_WIDTH + 1]; + /* Worst case for the size of M is when mbedtls_mpi_uint is 16 bits: + * we need to hold bits 513 to 1056, which is 34 limbs, that is + * P521_WIDTH + 1. Otherwise P521_WIDTH is enough. */ + + if( N->n < P521_WIDTH ) + return( 0 ); + + /* M = A1 */ + M.s = 1; + M.n = N->n - ( P521_WIDTH - 1 ); + if( M.n > P521_WIDTH + 1 ) + M.n = P521_WIDTH + 1; + M.p = Mp; + memcpy( Mp, N->p + P521_WIDTH - 1, M.n * sizeof( mbedtls_mpi_uint ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, 521 % ( 8 * sizeof( mbedtls_mpi_uint ) ) ) ); + + /* N = A0 */ + N->p[P521_WIDTH - 1] &= P521_MASK; + for( i = P521_WIDTH; i < N->n; i++ ) + N->p[i] = 0; + + /* N = A0 + A1 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) ); + +cleanup: + return( ret ); +} + +#undef P521_WIDTH +#undef P521_MASK +#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */ + +#endif /* MBEDTLS_ECP_NIST_OPTIM */ + +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) + +/* Size of p255 in terms of mbedtls_mpi_uint */ +#define P255_WIDTH ( 255 / 8 / sizeof( mbedtls_mpi_uint ) + 1 ) + +/* + * Fast quasi-reduction modulo p255 = 2^255 - 19 + * Write N as A0 + 2^255 A1, return A0 + 19 * A1 + */ +static int ecp_mod_p255( mbedtls_mpi *N ) +{ + int ret; + size_t i; + mbedtls_mpi M; + mbedtls_mpi_uint Mp[P255_WIDTH + 2]; + + if( N->n < P255_WIDTH ) + return( 0 ); + + /* M = A1 */ + M.s = 1; + M.n = N->n - ( P255_WIDTH - 1 ); + if( M.n > P255_WIDTH + 1 ) + M.n = P255_WIDTH + 1; + M.p = Mp; + memset( Mp, 0, sizeof Mp ); + memcpy( Mp, N->p + P255_WIDTH - 1, M.n * sizeof( mbedtls_mpi_uint ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, 255 % ( 8 * sizeof( mbedtls_mpi_uint ) ) ) ); + M.n++; /* Make room for multiplication by 19 */ + + /* N = A0 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( N, 255, 0 ) ); + for( i = P255_WIDTH; i < N->n; i++ ) + N->p[i] = 0; + + /* N = A0 + 19 * A1 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &M, &M, 19 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) ); + +cleanup: + return( ret ); +} +#endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) +/* + * Fast quasi-reduction modulo P = 2^s - R, + * with R about 33 bits, used by the Koblitz curves. + * + * Write N as A0 + 2^224 A1, return A0 + R * A1. + * Actually do two passes, since R is big. + */ +#define P_KOBLITZ_MAX ( 256 / 8 / sizeof( mbedtls_mpi_uint ) ) // Max limbs in P +#define P_KOBLITZ_R ( 8 / sizeof( mbedtls_mpi_uint ) ) // Limbs in R +static inline int ecp_mod_koblitz( mbedtls_mpi *N, mbedtls_mpi_uint *Rp, size_t p_limbs, + size_t adjust, size_t shift, mbedtls_mpi_uint mask ) +{ + int ret; + size_t i; + mbedtls_mpi M, R; + mbedtls_mpi_uint Mp[P_KOBLITZ_MAX + P_KOBLITZ_R]; + + if( N->n < p_limbs ) + return( 0 ); + + /* Init R */ + R.s = 1; + R.p = Rp; + R.n = P_KOBLITZ_R; + + /* Common setup for M */ + M.s = 1; + M.p = Mp; + + /* M = A1 */ + M.n = N->n - ( p_limbs - adjust ); + if( M.n > p_limbs + adjust ) + M.n = p_limbs + adjust; + memset( Mp, 0, sizeof Mp ); + memcpy( Mp, N->p + p_limbs - adjust, M.n * sizeof( mbedtls_mpi_uint ) ); + if( shift != 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, shift ) ); + M.n += R.n - adjust; /* Make room for multiplication by R */ + + /* N = A0 */ + if( mask != 0 ) + N->p[p_limbs - 1] &= mask; + for( i = p_limbs; i < N->n; i++ ) + N->p[i] = 0; + + /* N = A0 + R * A1 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &M, &M, &R ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) ); + + /* Second pass */ + + /* M = A1 */ + M.n = N->n - ( p_limbs - adjust ); + if( M.n > p_limbs + adjust ) + M.n = p_limbs + adjust; + memset( Mp, 0, sizeof Mp ); + memcpy( Mp, N->p + p_limbs - adjust, M.n * sizeof( mbedtls_mpi_uint ) ); + if( shift != 0 ) + MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, shift ) ); + M.n += R.n - adjust; /* Make room for multiplication by R */ + + /* N = A0 */ + if( mask != 0 ) + N->p[p_limbs - 1] &= mask; + for( i = p_limbs; i < N->n; i++ ) + N->p[i] = 0; + + /* N = A0 + R * A1 */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &M, &M, &R ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) ); + +cleanup: + return( ret ); +} +#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED) || + MBEDTLS_ECP_DP_SECP224K1_ENABLED) || + MBEDTLS_ECP_DP_SECP256K1_ENABLED) */ + +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) +/* + * Fast quasi-reduction modulo p192k1 = 2^192 - R, + * with R = 2^32 + 2^12 + 2^8 + 2^7 + 2^6 + 2^3 + 1 = 0x0100001119 + */ +static int ecp_mod_p192k1( mbedtls_mpi *N ) +{ + static mbedtls_mpi_uint Rp[] = { + BYTES_TO_T_UINT_8( 0xC9, 0x11, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) }; + + return( ecp_mod_koblitz( N, Rp, 192 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) ); +} +#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) +/* + * Fast quasi-reduction modulo p224k1 = 2^224 - R, + * with R = 2^32 + 2^12 + 2^11 + 2^9 + 2^7 + 2^4 + 2 + 1 = 0x0100001A93 + */ +static int ecp_mod_p224k1( mbedtls_mpi *N ) +{ + static mbedtls_mpi_uint Rp[] = { + BYTES_TO_T_UINT_8( 0x93, 0x1A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) }; + +#if defined(MBEDTLS_HAVE_INT64) + return( ecp_mod_koblitz( N, Rp, 4, 1, 32, 0xFFFFFFFF ) ); +#else + return( ecp_mod_koblitz( N, Rp, 224 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) ); +#endif +} + +#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) +/* + * Fast quasi-reduction modulo p256k1 = 2^256 - R, + * with R = 2^32 + 2^9 + 2^8 + 2^7 + 2^6 + 2^4 + 1 = 0x01000003D1 + */ +static int ecp_mod_p256k1( mbedtls_mpi *N ) +{ + static mbedtls_mpi_uint Rp[] = { + BYTES_TO_T_UINT_8( 0xD1, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) }; + return( ecp_mod_koblitz( N, Rp, 256 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) ); +} +#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */ + +#endif /* MBEDTLS_ECP_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/entropy.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/entropy.c new file mode 100644 index 0000000..cdbd35c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/entropy.c @@ -0,0 +1,493 @@ +/* + * Entropy accumulator implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ENTROPY_C) + +#include "mbedtls/entropy.h" +#include "mbedtls/entropy_poll.h" + +#include + +#if defined(MBEDTLS_FS_IO) +#include +#endif + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if defined(MBEDTLS_HAVEGE_C) +#include "mbedtls/havege.h" +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +#define ENTROPY_MAX_LOOP 256 /**< Maximum amount to loop before error */ + +void mbedtls_entropy_init( mbedtls_entropy_context *ctx ) +{ + memset( ctx, 0, sizeof(mbedtls_entropy_context) ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &ctx->mutex ); +#endif + +#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR) + mbedtls_sha512_starts( &ctx->accumulator, 0 ); +#else + mbedtls_sha256_starts( &ctx->accumulator, 0 ); +#endif +#if defined(MBEDTLS_HAVEGE_C) + mbedtls_havege_init( &ctx->havege_data ); +#endif + +#if !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES) +#if !defined(MBEDTLS_NO_PLATFORM_ENTROPY) + mbedtls_entropy_add_source( ctx, mbedtls_platform_entropy_poll, NULL, + MBEDTLS_ENTROPY_MIN_PLATFORM, + MBEDTLS_ENTROPY_SOURCE_STRONG ); +#endif +#if defined(MBEDTLS_TIMING_C) + mbedtls_entropy_add_source( ctx, mbedtls_hardclock_poll, NULL, + MBEDTLS_ENTROPY_MIN_HARDCLOCK, + MBEDTLS_ENTROPY_SOURCE_WEAK ); +#endif +#if defined(MBEDTLS_HAVEGE_C) + mbedtls_entropy_add_source( ctx, mbedtls_havege_poll, &ctx->havege_data, + MBEDTLS_ENTROPY_MIN_HAVEGE, + MBEDTLS_ENTROPY_SOURCE_STRONG ); +#endif +#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT) + mbedtls_entropy_add_source( ctx, mbedtls_hardware_poll, NULL, + MBEDTLS_ENTROPY_MIN_HARDWARE, + MBEDTLS_ENTROPY_SOURCE_STRONG ); +#endif +#endif /* MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES */ +} + +void mbedtls_entropy_free( mbedtls_entropy_context *ctx ) +{ +#if defined(MBEDTLS_HAVEGE_C) + mbedtls_havege_free( &ctx->havege_data ); +#endif +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_free( &ctx->mutex ); +#endif + mbedtls_zeroize( ctx, sizeof( mbedtls_entropy_context ) ); +} + +int mbedtls_entropy_add_source( mbedtls_entropy_context *ctx, + mbedtls_entropy_f_source_ptr f_source, void *p_source, + size_t threshold, int strong ) +{ + int index, ret = 0; + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + index = ctx->source_count; + if( index >= MBEDTLS_ENTROPY_MAX_SOURCES ) + { + ret = MBEDTLS_ERR_ENTROPY_MAX_SOURCES; + goto exit; + } + + ctx->source[index].f_source = f_source; + ctx->source[index].p_source = p_source; + ctx->source[index].threshold = threshold; + ctx->source[index].strong = strong; + + ctx->source_count++; + +exit: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +/* + * Entropy accumulator update + */ +static int entropy_update( mbedtls_entropy_context *ctx, unsigned char source_id, + const unsigned char *data, size_t len ) +{ + unsigned char header[2]; + unsigned char tmp[MBEDTLS_ENTROPY_BLOCK_SIZE]; + size_t use_len = len; + const unsigned char *p = data; + + if( use_len > MBEDTLS_ENTROPY_BLOCK_SIZE ) + { +#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR) + mbedtls_sha512( data, len, tmp, 0 ); +#else + mbedtls_sha256( data, len, tmp, 0 ); +#endif + p = tmp; + use_len = MBEDTLS_ENTROPY_BLOCK_SIZE; + } + + header[0] = source_id; + header[1] = use_len & 0xFF; + +#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR) + mbedtls_sha512_update( &ctx->accumulator, header, 2 ); + mbedtls_sha512_update( &ctx->accumulator, p, use_len ); +#else + mbedtls_sha256_update( &ctx->accumulator, header, 2 ); + mbedtls_sha256_update( &ctx->accumulator, p, use_len ); +#endif + + return( 0 ); +} + +int mbedtls_entropy_update_manual( mbedtls_entropy_context *ctx, + const unsigned char *data, size_t len ) +{ + int ret; + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + ret = entropy_update( ctx, MBEDTLS_ENTROPY_SOURCE_MANUAL, data, len ); + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +/* + * Run through the different sources to add entropy to our accumulator + */ +static int entropy_gather_internal( mbedtls_entropy_context *ctx ) +{ + int ret, i, have_one_strong = 0; + unsigned char buf[MBEDTLS_ENTROPY_MAX_GATHER]; + size_t olen; + + if( ctx->source_count == 0 ) + return( MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED ); + + /* + * Run through our entropy sources + */ + for( i = 0; i < ctx->source_count; i++ ) + { + if( ctx->source[i].strong == MBEDTLS_ENTROPY_SOURCE_STRONG ) + have_one_strong = 1; + + olen = 0; + if( ( ret = ctx->source[i].f_source( ctx->source[i].p_source, + buf, MBEDTLS_ENTROPY_MAX_GATHER, &olen ) ) != 0 ) + { + return( ret ); + } + + /* + * Add if we actually gathered something + */ + if( olen > 0 ) + { + entropy_update( ctx, (unsigned char) i, buf, olen ); + ctx->source[i].size += olen; + } + } + + if( have_one_strong == 0 ) + return( MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE ); + + return( 0 ); +} + +/* + * Thread-safe wrapper for entropy_gather_internal() + */ +int mbedtls_entropy_gather( mbedtls_entropy_context *ctx ) +{ + int ret; + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + ret = entropy_gather_internal( ctx ); + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +int mbedtls_entropy_func( void *data, unsigned char *output, size_t len ) +{ + int ret, count = 0, i, done; + mbedtls_entropy_context *ctx = (mbedtls_entropy_context *) data; + unsigned char buf[MBEDTLS_ENTROPY_BLOCK_SIZE]; + + if( len > MBEDTLS_ENTROPY_BLOCK_SIZE ) + return( MBEDTLS_ERR_ENTROPY_SOURCE_FAILED ); + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + /* + * Always gather extra entropy before a call + */ + do + { + if( count++ > ENTROPY_MAX_LOOP ) + { + ret = MBEDTLS_ERR_ENTROPY_SOURCE_FAILED; + goto exit; + } + + if( ( ret = entropy_gather_internal( ctx ) ) != 0 ) + goto exit; + + done = 1; + for( i = 0; i < ctx->source_count; i++ ) + if( ctx->source[i].size < ctx->source[i].threshold ) + done = 0; + } + while( ! done ); + + memset( buf, 0, MBEDTLS_ENTROPY_BLOCK_SIZE ); + +#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR) + mbedtls_sha512_finish( &ctx->accumulator, buf ); + + /* + * Reset accumulator and counters and recycle existing entropy + */ + memset( &ctx->accumulator, 0, sizeof( mbedtls_sha512_context ) ); + mbedtls_sha512_starts( &ctx->accumulator, 0 ); + mbedtls_sha512_update( &ctx->accumulator, buf, MBEDTLS_ENTROPY_BLOCK_SIZE ); + + /* + * Perform second SHA-512 on entropy + */ + mbedtls_sha512( buf, MBEDTLS_ENTROPY_BLOCK_SIZE, buf, 0 ); +#else /* MBEDTLS_ENTROPY_SHA512_ACCUMULATOR */ + mbedtls_sha256_finish( &ctx->accumulator, buf ); + + /* + * Reset accumulator and counters and recycle existing entropy + */ + memset( &ctx->accumulator, 0, sizeof( mbedtls_sha256_context ) ); + mbedtls_sha256_starts( &ctx->accumulator, 0 ); + mbedtls_sha256_update( &ctx->accumulator, buf, MBEDTLS_ENTROPY_BLOCK_SIZE ); + + /* + * Perform second SHA-256 on entropy + */ + mbedtls_sha256( buf, MBEDTLS_ENTROPY_BLOCK_SIZE, buf, 0 ); +#endif /* MBEDTLS_ENTROPY_SHA512_ACCUMULATOR */ + + for( i = 0; i < ctx->source_count; i++ ) + ctx->source[i].size = 0; + + memcpy( output, buf, len ); + + ret = 0; + +exit: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +#if defined(MBEDTLS_FS_IO) +int mbedtls_entropy_write_seed_file( mbedtls_entropy_context *ctx, const char *path ) +{ + int ret = MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR; + FILE *f; + unsigned char buf[MBEDTLS_ENTROPY_BLOCK_SIZE]; + + if( ( f = fopen( path, "wb" ) ) == NULL ) + return( MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR ); + + if( ( ret = mbedtls_entropy_func( ctx, buf, MBEDTLS_ENTROPY_BLOCK_SIZE ) ) != 0 ) + goto exit; + + if( fwrite( buf, 1, MBEDTLS_ENTROPY_BLOCK_SIZE, f ) != MBEDTLS_ENTROPY_BLOCK_SIZE ) + { + ret = MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR; + goto exit; + } + + ret = 0; + +exit: + fclose( f ); + return( ret ); +} + +int mbedtls_entropy_update_seed_file( mbedtls_entropy_context *ctx, const char *path ) +{ + FILE *f; + size_t n; + unsigned char buf[ MBEDTLS_ENTROPY_MAX_SEED_SIZE ]; + + if( ( f = fopen( path, "rb" ) ) == NULL ) + return( MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR ); + + fseek( f, 0, SEEK_END ); + n = (size_t) ftell( f ); + fseek( f, 0, SEEK_SET ); + + if( n > MBEDTLS_ENTROPY_MAX_SEED_SIZE ) + n = MBEDTLS_ENTROPY_MAX_SEED_SIZE; + + if( fread( buf, 1, n, f ) != n ) + { + fclose( f ); + return( MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR ); + } + + fclose( f ); + + mbedtls_entropy_update_manual( ctx, buf, n ); + + return( mbedtls_entropy_write_seed_file( ctx, path ) ); +} +#endif /* MBEDTLS_FS_IO */ + +#if defined(MBEDTLS_SELF_TEST) +/* + * Dummy source function + */ +static int entropy_dummy_source( void *data, unsigned char *output, + size_t len, size_t *olen ) +{ + ((void) data); + + memset( output, 0x2a, len ); + *olen = len; + + return( 0 ); +} + +/* + * The actual entropy quality is hard to test, but we can at least + * test that the functions don't cause errors and write the correct + * amount of data to buffers. + */ +int mbedtls_entropy_self_test( int verbose ) +{ + int ret = 0; + mbedtls_entropy_context ctx; + unsigned char buf[MBEDTLS_ENTROPY_BLOCK_SIZE] = { 0 }; + unsigned char acc[MBEDTLS_ENTROPY_BLOCK_SIZE] = { 0 }; + size_t i, j; + + if( verbose != 0 ) + mbedtls_printf( " ENTROPY test: " ); + + mbedtls_entropy_init( &ctx ); + + /* First do a gather to make sure we have default sources */ + if( ( ret = mbedtls_entropy_gather( &ctx ) ) != 0 ) + goto cleanup; + + ret = mbedtls_entropy_add_source( &ctx, entropy_dummy_source, NULL, 16, + MBEDTLS_ENTROPY_SOURCE_WEAK ); + if( ret != 0 ) + goto cleanup; + + if( ( ret = mbedtls_entropy_update_manual( &ctx, buf, sizeof buf ) ) != 0 ) + goto cleanup; + + /* + * To test that mbedtls_entropy_func writes correct number of bytes: + * - use the whole buffer and rely on ASan to detect overruns + * - collect entropy 8 times and OR the result in an accumulator: + * any byte should then be 0 with probably 2^(-64), so requiring + * each of the 32 or 64 bytes to be non-zero has a false failure rate + * of at most 2^(-58) which is acceptable. + */ + for( i = 0; i < 8; i++ ) + { + if( ( ret = mbedtls_entropy_func( &ctx, buf, sizeof( buf ) ) ) != 0 ) + goto cleanup; + + for( j = 0; j < sizeof( buf ); j++ ) + acc[j] |= buf[j]; + } + + for( j = 0; j < sizeof( buf ); j++ ) + { + if( acc[j] == 0 ) + { + ret = 1; + goto cleanup; + } + } + +cleanup: + mbedtls_entropy_free( &ctx ); + + if( verbose != 0 ) + { + if( ret != 0 ) + mbedtls_printf( "failed\n" ); + else + mbedtls_printf( "passed\n" ); + + mbedtls_printf( "\n" ); + } + + return( ret != 0 ); +} +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_ENTROPY_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/entropy_poll.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/entropy_poll.c new file mode 100644 index 0000000..25a27be --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/entropy_poll.c @@ -0,0 +1,216 @@ +/* + * Platform-specific and custom entropy polling functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ENTROPY_C) + +#include "mbedtls/entropy.h" +#include "mbedtls/entropy_poll.h" + +#if defined(MBEDTLS_TIMING_C) +#include +#include "mbedtls/timing.h" +#endif +#if defined(MBEDTLS_HAVEGE_C) +#include "mbedtls/havege.h" +#endif + +#if !defined(MBEDTLS_NO_PLATFORM_ENTROPY) +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) + +#if !defined(_WIN32_WINNT) +#define _WIN32_WINNT 0x0400 +#endif +#include +#include + +int mbedtls_platform_entropy_poll( void *data, unsigned char *output, size_t len, + size_t *olen ) +{ + HCRYPTPROV provider; + ((void) data); + *olen = 0; + + if( CryptAcquireContext( &provider, NULL, NULL, + PROV_RSA_FULL, CRYPT_VERIFYCONTEXT ) == FALSE ) + { + return( MBEDTLS_ERR_ENTROPY_SOURCE_FAILED ); + } + + if( CryptGenRandom( provider, (DWORD) len, output ) == FALSE ) + return( MBEDTLS_ERR_ENTROPY_SOURCE_FAILED ); + + CryptReleaseContext( provider, 0 ); + *olen = len; + + return( 0 ); +} +#else /* _WIN32 && !EFIX64 && !EFI32 */ + +/* + * Test for Linux getrandom() support. + * Since there is no wrapper in the libc yet, use the generic syscall wrapper + * available in GNU libc and compatible libc's (eg uClibc). + */ +#if defined(__linux__) && defined(__GLIBC__) +#include +#include +#if defined(SYS_getrandom) +#define HAVE_GETRANDOM + +static int getrandom_wrapper( void *buf, size_t buflen, unsigned int flags ) +{ + /* MemSan cannot understand that the syscall writes to the buffer */ +#if defined(__has_feature) +#if __has_feature(memory_sanitizer) + memset( buf, 0, buflen ); +#endif +#endif + + return( syscall( SYS_getrandom, buf, buflen, flags ) ); +} + +#include +/* Check if version is at least 3.17.0 */ +static int check_version_3_17_plus( void ) +{ + int minor; + struct utsname un; + const char *ver; + + /* Get version information */ + uname(&un); + ver = un.release; + + /* Check major version; assume a single digit */ + if( ver[0] < '3' || ver[0] > '9' || ver [1] != '.' ) + return( -1 ); + + if( ver[0] - '0' > 3 ) + return( 0 ); + + /* Ok, so now we know major == 3, check minor. + * Assume 1 or 2 digits. */ + if( ver[2] < '0' || ver[2] > '9' ) + return( -1 ); + + minor = ver[2] - '0'; + + if( ver[3] >= '0' && ver[3] <= '9' ) + minor = 10 * minor + ver[3] - '0'; + else if( ver [3] != '.' ) + return( -1 ); + + if( minor < 17 ) + return( -1 ); + + return( 0 ); +} +static int has_getrandom = -1; +#endif /* SYS_getrandom */ +#endif /* __linux__ */ + +#include + +int mbedtls_platform_entropy_poll( void *data, + unsigned char *output, size_t len, size_t *olen ) +{ + FILE *file; + size_t read_len; + ((void) data); + +#if defined(HAVE_GETRANDOM) + if( has_getrandom == -1 ) + has_getrandom = ( check_version_3_17_plus() == 0 ); + + if( has_getrandom ) + { + int ret; + + if( ( ret = getrandom_wrapper( output, len, 0 ) ) < 0 ) + return( MBEDTLS_ERR_ENTROPY_SOURCE_FAILED ); + + *olen = ret; + return( 0 ); + } +#endif /* HAVE_GETRANDOM */ + + *olen = 0; + + file = fopen( "/dev/urandom", "rb" ); + if( file == NULL ) + return( MBEDTLS_ERR_ENTROPY_SOURCE_FAILED ); + + read_len = fread( output, 1, len, file ); + if( read_len != len ) + { + fclose( file ); + return( MBEDTLS_ERR_ENTROPY_SOURCE_FAILED ); + } + + fclose( file ); + *olen = len; + + return( 0 ); +} +#endif /* _WIN32 && !EFIX64 && !EFI32 */ +#endif /* !MBEDTLS_NO_PLATFORM_ENTROPY */ + +#if defined(MBEDTLS_TIMING_C) +int mbedtls_hardclock_poll( void *data, + unsigned char *output, size_t len, size_t *olen ) +{ + unsigned long timer = mbedtls_timing_hardclock(); + ((void) data); + *olen = 0; + + if( len < sizeof(unsigned long) ) + return( 0 ); + + memcpy( output, &timer, sizeof(unsigned long) ); + *olen = sizeof(unsigned long); + + return( 0 ); +} +#endif /* MBEDTLS_TIMING_C */ + +#if defined(MBEDTLS_HAVEGE_C) +int mbedtls_havege_poll( void *data, + unsigned char *output, size_t len, size_t *olen ) +{ + mbedtls_havege_state *hs = (mbedtls_havege_state *) data; + *olen = 0; + + if( mbedtls_havege_random( hs, output, len ) != 0 ) + return( MBEDTLS_ERR_ENTROPY_SOURCE_FAILED ); + + *olen = len; + + return( 0 ); +} +#endif /* MBEDTLS_HAVEGE_C */ + +#endif /* MBEDTLS_ENTROPY_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/error.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/error.c new file mode 100644 index 0000000..debda1d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/error.c @@ -0,0 +1,700 @@ +/* + * Error message information + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_ERROR_C) || defined(MBEDTLS_ERROR_STRERROR_DUMMY) +#include "mbedtls/error.h" +#include +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#define mbedtls_snprintf snprintf +#endif + +#if defined(MBEDTLS_ERROR_C) + +#include + +#if defined(MBEDTLS_AES_C) +#include "mbedtls/aes.h" +#endif + +#if defined(MBEDTLS_BASE64_C) +#include "mbedtls/base64.h" +#endif + +#if defined(MBEDTLS_BIGNUM_C) +#include "mbedtls/bignum.h" +#endif + +#if defined(MBEDTLS_BLOWFISH_C) +#include "mbedtls/blowfish.h" +#endif + +#if defined(MBEDTLS_CAMELLIA_C) +#include "mbedtls/camellia.h" +#endif + +#if defined(MBEDTLS_CCM_C) +#include "mbedtls/ccm.h" +#endif + +#if defined(MBEDTLS_CIPHER_C) +#include "mbedtls/cipher.h" +#endif + +#if defined(MBEDTLS_CTR_DRBG_C) +#include "mbedtls/ctr_drbg.h" +#endif + +#if defined(MBEDTLS_DES_C) +#include "mbedtls/des.h" +#endif + +#if defined(MBEDTLS_DHM_C) +#include "mbedtls/dhm.h" +#endif + +#if defined(MBEDTLS_ECP_C) +#include "mbedtls/ecp.h" +#endif + +#if defined(MBEDTLS_ENTROPY_C) +#include "mbedtls/entropy.h" +#endif + +#if defined(MBEDTLS_GCM_C) +#include "mbedtls/gcm.h" +#endif + +#if defined(MBEDTLS_HMAC_DRBG_C) +#include "mbedtls/hmac_drbg.h" +#endif + +#if defined(MBEDTLS_MD_C) +#include "mbedtls/md.h" +#endif + +#if defined(MBEDTLS_NET_C) +#include "mbedtls/net.h" +#endif + +#if defined(MBEDTLS_OID_C) +#include "mbedtls/oid.h" +#endif + +#if defined(MBEDTLS_PADLOCK_C) +#include "mbedtls/padlock.h" +#endif + +#if defined(MBEDTLS_PEM_PARSE_C) || defined(MBEDTLS_PEM_WRITE_C) +#include "mbedtls/pem.h" +#endif + +#if defined(MBEDTLS_PK_C) +#include "mbedtls/pk.h" +#endif + +#if defined(MBEDTLS_PKCS12_C) +#include "mbedtls/pkcs12.h" +#endif + +#if defined(MBEDTLS_PKCS5_C) +#include "mbedtls/pkcs5.h" +#endif + +#if defined(MBEDTLS_RSA_C) +#include "mbedtls/rsa.h" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) +#include "mbedtls/ssl.h" +#endif + +#if defined(MBEDTLS_THREADING_C) +#include "mbedtls/threading.h" +#endif + +#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C) +#include "mbedtls/x509.h" +#endif + +#if defined(MBEDTLS_XTEA_C) +#include "mbedtls/xtea.h" +#endif + + +void mbedtls_strerror( int ret, char *buf, size_t buflen ) +{ + size_t len; + int use_ret; + + if( buflen == 0 ) + return; + + memset( buf, 0x00, buflen ); + + if( ret < 0 ) + ret = -ret; + + if( ret & 0xFF80 ) + { + use_ret = ret & 0xFF80; + + // High level error codes + // + // BEGIN generated code +#if defined(MBEDTLS_CIPHER_C) + if( use_ret == -(MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "CIPHER - The selected feature is not available" ); + if( use_ret == -(MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "CIPHER - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_CIPHER_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "CIPHER - Failed to allocate memory" ); + if( use_ret == -(MBEDTLS_ERR_CIPHER_INVALID_PADDING) ) + mbedtls_snprintf( buf, buflen, "CIPHER - Input data contains invalid padding and is rejected" ); + if( use_ret == -(MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED) ) + mbedtls_snprintf( buf, buflen, "CIPHER - Decryption of block requires a full block" ); + if( use_ret == -(MBEDTLS_ERR_CIPHER_AUTH_FAILED) ) + mbedtls_snprintf( buf, buflen, "CIPHER - Authentication failed (for AEAD modes)" ); +#endif /* MBEDTLS_CIPHER_C */ + +#if defined(MBEDTLS_DHM_C) + if( use_ret == -(MBEDTLS_ERR_DHM_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "DHM - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_DHM_READ_PARAMS_FAILED) ) + mbedtls_snprintf( buf, buflen, "DHM - Reading of the DHM parameters failed" ); + if( use_ret == -(MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED) ) + mbedtls_snprintf( buf, buflen, "DHM - Making of the DHM parameters failed" ); + if( use_ret == -(MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED) ) + mbedtls_snprintf( buf, buflen, "DHM - Reading of the public values failed" ); + if( use_ret == -(MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED) ) + mbedtls_snprintf( buf, buflen, "DHM - Making of the public value failed" ); + if( use_ret == -(MBEDTLS_ERR_DHM_CALC_SECRET_FAILED) ) + mbedtls_snprintf( buf, buflen, "DHM - Calculation of the DHM secret failed" ); + if( use_ret == -(MBEDTLS_ERR_DHM_INVALID_FORMAT) ) + mbedtls_snprintf( buf, buflen, "DHM - The ASN.1 data is not formatted correctly" ); + if( use_ret == -(MBEDTLS_ERR_DHM_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "DHM - Allocation of memory failed" ); + if( use_ret == -(MBEDTLS_ERR_DHM_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "DHM - Read/write of file failed" ); +#endif /* MBEDTLS_DHM_C */ + +#if defined(MBEDTLS_ECP_C) + if( use_ret == -(MBEDTLS_ERR_ECP_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "ECP - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "ECP - The buffer is too small to write to" ); + if( use_ret == -(MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "ECP - Requested curve not available" ); + if( use_ret == -(MBEDTLS_ERR_ECP_VERIFY_FAILED) ) + mbedtls_snprintf( buf, buflen, "ECP - The signature is not valid" ); + if( use_ret == -(MBEDTLS_ERR_ECP_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "ECP - Memory allocation failed" ); + if( use_ret == -(MBEDTLS_ERR_ECP_RANDOM_FAILED) ) + mbedtls_snprintf( buf, buflen, "ECP - Generation of random value, such as (ephemeral) key, failed" ); + if( use_ret == -(MBEDTLS_ERR_ECP_INVALID_KEY) ) + mbedtls_snprintf( buf, buflen, "ECP - Invalid private or public key" ); + if( use_ret == -(MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "ECP - Signature is valid but shorter than the user-supplied length" ); +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_MD_C) + if( use_ret == -(MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "MD - The selected feature is not available" ); + if( use_ret == -(MBEDTLS_ERR_MD_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "MD - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_MD_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "MD - Failed to allocate memory" ); + if( use_ret == -(MBEDTLS_ERR_MD_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "MD - Opening or reading of file failed" ); +#endif /* MBEDTLS_MD_C */ + +#if defined(MBEDTLS_PEM_PARSE_C) || defined(MBEDTLS_PEM_WRITE_C) + if( use_ret == -(MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT) ) + mbedtls_snprintf( buf, buflen, "PEM - No PEM header or footer found" ); + if( use_ret == -(MBEDTLS_ERR_PEM_INVALID_DATA) ) + mbedtls_snprintf( buf, buflen, "PEM - PEM string is not as expected" ); + if( use_ret == -(MBEDTLS_ERR_PEM_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "PEM - Failed to allocate memory" ); + if( use_ret == -(MBEDTLS_ERR_PEM_INVALID_ENC_IV) ) + mbedtls_snprintf( buf, buflen, "PEM - RSA IV is not in hex-format" ); + if( use_ret == -(MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG) ) + mbedtls_snprintf( buf, buflen, "PEM - Unsupported key encryption algorithm" ); + if( use_ret == -(MBEDTLS_ERR_PEM_PASSWORD_REQUIRED) ) + mbedtls_snprintf( buf, buflen, "PEM - Private key password can't be empty" ); + if( use_ret == -(MBEDTLS_ERR_PEM_PASSWORD_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "PEM - Given private key password does not allow for correct decryption" ); + if( use_ret == -(MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "PEM - Unavailable feature, e.g. hashing/encryption combination" ); + if( use_ret == -(MBEDTLS_ERR_PEM_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "PEM - Bad input parameters to function" ); +#endif /* MBEDTLS_PEM_PARSE_C || MBEDTLS_PEM_WRITE_C */ + +#if defined(MBEDTLS_PK_C) + if( use_ret == -(MBEDTLS_ERR_PK_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "PK - Memory allocation failed" ); + if( use_ret == -(MBEDTLS_ERR_PK_TYPE_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "PK - Type mismatch, eg attempt to encrypt with an ECDSA key" ); + if( use_ret == -(MBEDTLS_ERR_PK_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "PK - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_PK_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "PK - Read/write of file failed" ); + if( use_ret == -(MBEDTLS_ERR_PK_KEY_INVALID_VERSION) ) + mbedtls_snprintf( buf, buflen, "PK - Unsupported key version" ); + if( use_ret == -(MBEDTLS_ERR_PK_KEY_INVALID_FORMAT) ) + mbedtls_snprintf( buf, buflen, "PK - Invalid key tag or value" ); + if( use_ret == -(MBEDTLS_ERR_PK_UNKNOWN_PK_ALG) ) + mbedtls_snprintf( buf, buflen, "PK - Key algorithm is unsupported (only RSA and EC are supported)" ); + if( use_ret == -(MBEDTLS_ERR_PK_PASSWORD_REQUIRED) ) + mbedtls_snprintf( buf, buflen, "PK - Private key password can't be empty" ); + if( use_ret == -(MBEDTLS_ERR_PK_PASSWORD_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "PK - Given private key password does not allow for correct decryption" ); + if( use_ret == -(MBEDTLS_ERR_PK_INVALID_PUBKEY) ) + mbedtls_snprintf( buf, buflen, "PK - The pubkey tag or value is invalid (only RSA and EC are supported)" ); + if( use_ret == -(MBEDTLS_ERR_PK_INVALID_ALG) ) + mbedtls_snprintf( buf, buflen, "PK - The algorithm tag or value is invalid" ); + if( use_ret == -(MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE) ) + mbedtls_snprintf( buf, buflen, "PK - Elliptic curve is unsupported (only NIST curves are supported)" ); + if( use_ret == -(MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "PK - Unavailable feature, e.g. RSA disabled for RSA key" ); + if( use_ret == -(MBEDTLS_ERR_PK_SIG_LEN_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "PK - The signature is valid but its length is less than expected" ); +#endif /* MBEDTLS_PK_C */ + +#if defined(MBEDTLS_PKCS12_C) + if( use_ret == -(MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "PKCS12 - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "PKCS12 - Feature not available, e.g. unsupported encryption scheme" ); + if( use_ret == -(MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT) ) + mbedtls_snprintf( buf, buflen, "PKCS12 - PBE ASN.1 data not as expected" ); + if( use_ret == -(MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "PKCS12 - Given private key password does not allow for correct decryption" ); +#endif /* MBEDTLS_PKCS12_C */ + +#if defined(MBEDTLS_PKCS5_C) + if( use_ret == -(MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "PKCS5 - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_PKCS5_INVALID_FORMAT) ) + mbedtls_snprintf( buf, buflen, "PKCS5 - Unexpected ASN.1 data" ); + if( use_ret == -(MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "PKCS5 - Requested encryption or digest alg not available" ); + if( use_ret == -(MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "PKCS5 - Given private key password does not allow for correct decryption" ); +#endif /* MBEDTLS_PKCS5_C */ + +#if defined(MBEDTLS_RSA_C) + if( use_ret == -(MBEDTLS_ERR_RSA_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "RSA - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_RSA_INVALID_PADDING) ) + mbedtls_snprintf( buf, buflen, "RSA - Input data contains invalid padding and is rejected" ); + if( use_ret == -(MBEDTLS_ERR_RSA_KEY_GEN_FAILED) ) + mbedtls_snprintf( buf, buflen, "RSA - Something failed during generation of a key" ); + if( use_ret == -(MBEDTLS_ERR_RSA_KEY_CHECK_FAILED) ) + mbedtls_snprintf( buf, buflen, "RSA - Key failed to pass the library's validity check" ); + if( use_ret == -(MBEDTLS_ERR_RSA_PUBLIC_FAILED) ) + mbedtls_snprintf( buf, buflen, "RSA - The public key operation failed" ); + if( use_ret == -(MBEDTLS_ERR_RSA_PRIVATE_FAILED) ) + mbedtls_snprintf( buf, buflen, "RSA - The private key operation failed" ); + if( use_ret == -(MBEDTLS_ERR_RSA_VERIFY_FAILED) ) + mbedtls_snprintf( buf, buflen, "RSA - The PKCS#1 verification failed" ); + if( use_ret == -(MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE) ) + mbedtls_snprintf( buf, buflen, "RSA - The output buffer for decryption is not large enough" ); + if( use_ret == -(MBEDTLS_ERR_RSA_RNG_FAILED) ) + mbedtls_snprintf( buf, buflen, "RSA - The random generator failed to generate non-zeros" ); +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_SSL_TLS_C) + if( use_ret == -(MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "SSL - The requested feature is not available" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "SSL - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_SSL_INVALID_MAC) ) + mbedtls_snprintf( buf, buflen, "SSL - Verification of the message MAC failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_INVALID_RECORD) ) + mbedtls_snprintf( buf, buflen, "SSL - An invalid SSL record was received" ); + if( use_ret == -(MBEDTLS_ERR_SSL_CONN_EOF) ) + mbedtls_snprintf( buf, buflen, "SSL - The connection indicated an EOF" ); + if( use_ret == -(MBEDTLS_ERR_SSL_UNKNOWN_CIPHER) ) + mbedtls_snprintf( buf, buflen, "SSL - An unknown cipher was received" ); + if( use_ret == -(MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN) ) + mbedtls_snprintf( buf, buflen, "SSL - The server has no ciphersuites in common with the client" ); + if( use_ret == -(MBEDTLS_ERR_SSL_NO_RNG) ) + mbedtls_snprintf( buf, buflen, "SSL - No RNG was provided to the SSL module" ); + if( use_ret == -(MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE) ) + mbedtls_snprintf( buf, buflen, "SSL - No client certification received from the client, but required by the authentication mode" ); + if( use_ret == -(MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE) ) + mbedtls_snprintf( buf, buflen, "SSL - Our own certificate(s) is/are too large to send in an SSL message" ); + if( use_ret == -(MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED) ) + mbedtls_snprintf( buf, buflen, "SSL - The own certificate is not set, but needed by the server" ); + if( use_ret == -(MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED) ) + mbedtls_snprintf( buf, buflen, "SSL - The own private key or pre-shared key is not set, but needed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED) ) + mbedtls_snprintf( buf, buflen, "SSL - No CA Chain is set, but required to operate" ); + if( use_ret == -(MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE) ) + mbedtls_snprintf( buf, buflen, "SSL - An unexpected message was received from our peer" ); + if( use_ret == -(MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE) ) + { + mbedtls_snprintf( buf, buflen, "SSL - A fatal alert message was received from our peer" ); + return; + } + if( use_ret == -(MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED) ) + mbedtls_snprintf( buf, buflen, "SSL - Verification of our peer failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY) ) + mbedtls_snprintf( buf, buflen, "SSL - The peer notified us that the connection is going to be closed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ClientHello handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ServerHello handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the Certificate handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the CertificateRequest handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ServerKeyExchange handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ServerHelloDone handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ClientKeyExchange handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the CertificateVerify handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the ChangeCipherSpec handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_FINISHED) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the Finished handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "SSL - Memory allocation failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_HW_ACCEL_FAILED) ) + mbedtls_snprintf( buf, buflen, "SSL - Hardware acceleration function returned with error" ); + if( use_ret == -(MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH) ) + mbedtls_snprintf( buf, buflen, "SSL - Hardware acceleration function skipped / left alone data" ); + if( use_ret == -(MBEDTLS_ERR_SSL_COMPRESSION_FAILED) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the compression / decompression failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION) ) + mbedtls_snprintf( buf, buflen, "SSL - Handshake protocol not within min/max boundaries" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET) ) + mbedtls_snprintf( buf, buflen, "SSL - Processing of the NewSessionTicket handshake message failed" ); + if( use_ret == -(MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED) ) + mbedtls_snprintf( buf, buflen, "SSL - Session ticket has expired" ); + if( use_ret == -(MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "SSL - Public key type mismatch (eg, asked for RSA key exchange and presented EC key)" ); + if( use_ret == -(MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY) ) + mbedtls_snprintf( buf, buflen, "SSL - Unknown identity received (eg, PSK identity)" ); + if( use_ret == -(MBEDTLS_ERR_SSL_INTERNAL_ERROR) ) + mbedtls_snprintf( buf, buflen, "SSL - Internal error (eg, unexpected failure in lower-level module)" ); + if( use_ret == -(MBEDTLS_ERR_SSL_COUNTER_WRAPPING) ) + mbedtls_snprintf( buf, buflen, "SSL - A counter would wrap (eg, too many messages exchanged)" ); + if( use_ret == -(MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO) ) + mbedtls_snprintf( buf, buflen, "SSL - Unexpected message at ServerHello in renegotiation" ); + if( use_ret == -(MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED) ) + mbedtls_snprintf( buf, buflen, "SSL - DTLS client must retry for hello verification" ); + if( use_ret == -(MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "SSL - A buffer is too small to receive or write a message" ); + if( use_ret == -(MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE) ) + mbedtls_snprintf( buf, buflen, "SSL - None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages)" ); + if( use_ret == -(MBEDTLS_ERR_SSL_WANT_READ) ) + mbedtls_snprintf( buf, buflen, "SSL - Connection requires a read call" ); + if( use_ret == -(MBEDTLS_ERR_SSL_WANT_WRITE) ) + mbedtls_snprintf( buf, buflen, "SSL - Connection requires a write call" ); + if( use_ret == -(MBEDTLS_ERR_SSL_TIMEOUT) ) + mbedtls_snprintf( buf, buflen, "SSL - The operation timed out" ); + if( use_ret == -(MBEDTLS_ERR_SSL_CLIENT_RECONNECT) ) + mbedtls_snprintf( buf, buflen, "SSL - The client initiated a reconnect from the same port" ); + if( use_ret == -(MBEDTLS_ERR_SSL_UNEXPECTED_RECORD) ) + mbedtls_snprintf( buf, buflen, "SSL - Record header looks valid but is not expected" ); +#endif /* MBEDTLS_SSL_TLS_C */ + +#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C) + if( use_ret == -(MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "X509 - Unavailable feature, e.g. RSA hashing/encryption combination" ); + if( use_ret == -(MBEDTLS_ERR_X509_UNKNOWN_OID) ) + mbedtls_snprintf( buf, buflen, "X509 - Requested OID is unknown" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_FORMAT) ) + mbedtls_snprintf( buf, buflen, "X509 - The CRT/CRL/CSR format is invalid, e.g. different type expected" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_VERSION) ) + mbedtls_snprintf( buf, buflen, "X509 - The CRT/CRL/CSR version element is invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_SERIAL) ) + mbedtls_snprintf( buf, buflen, "X509 - The serial tag or value is invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_ALG) ) + mbedtls_snprintf( buf, buflen, "X509 - The algorithm tag or value is invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_NAME) ) + mbedtls_snprintf( buf, buflen, "X509 - The name tag or value is invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_DATE) ) + mbedtls_snprintf( buf, buflen, "X509 - The date tag or value is invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_SIGNATURE) ) + mbedtls_snprintf( buf, buflen, "X509 - The signature tag or value invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_INVALID_EXTENSIONS) ) + mbedtls_snprintf( buf, buflen, "X509 - The extension tag or value is invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_UNKNOWN_VERSION) ) + mbedtls_snprintf( buf, buflen, "X509 - CRT/CRL/CSR has an unsupported version number" ); + if( use_ret == -(MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG) ) + mbedtls_snprintf( buf, buflen, "X509 - Signature algorithm (oid) is unsupported" ); + if( use_ret == -(MBEDTLS_ERR_X509_SIG_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "X509 - Signature algorithms do not match. (see \\c ::mbedtls_x509_crt sig_oid)" ); + if( use_ret == -(MBEDTLS_ERR_X509_CERT_VERIFY_FAILED) ) + mbedtls_snprintf( buf, buflen, "X509 - Certificate verification failed, e.g. CRL, CA or signature check failed" ); + if( use_ret == -(MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT) ) + mbedtls_snprintf( buf, buflen, "X509 - Format not recognized as DER or PEM" ); + if( use_ret == -(MBEDTLS_ERR_X509_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "X509 - Input invalid" ); + if( use_ret == -(MBEDTLS_ERR_X509_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "X509 - Allocation of memory failed" ); + if( use_ret == -(MBEDTLS_ERR_X509_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "X509 - Read/write of file failed" ); + if( use_ret == -(MBEDTLS_ERR_X509_BUFFER_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "X509 - Destination buffer is too small" ); +#endif /* MBEDTLS_X509_USE_C || MBEDTLS_X509_CREATE_C */ + // END generated code + + if( strlen( buf ) == 0 ) + mbedtls_snprintf( buf, buflen, "UNKNOWN ERROR CODE (%04X)", use_ret ); + } + + use_ret = ret & ~0xFF80; + + if( use_ret == 0 ) + return; + + // If high level code is present, make a concatenation between both + // error strings. + // + len = strlen( buf ); + + if( len > 0 ) + { + if( buflen - len < 5 ) + return; + + mbedtls_snprintf( buf + len, buflen - len, " : " ); + + buf += len + 3; + buflen -= len + 3; + } + + // Low level error codes + // + // BEGIN generated code +#if defined(MBEDTLS_AES_C) + if( use_ret == -(MBEDTLS_ERR_AES_INVALID_KEY_LENGTH) ) + mbedtls_snprintf( buf, buflen, "AES - Invalid key length" ); + if( use_ret == -(MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH) ) + mbedtls_snprintf( buf, buflen, "AES - Invalid data input length" ); +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_ASN1_PARSE_C) + if( use_ret == -(MBEDTLS_ERR_ASN1_OUT_OF_DATA) ) + mbedtls_snprintf( buf, buflen, "ASN1 - Out of data when parsing an ASN1 data structure" ); + if( use_ret == -(MBEDTLS_ERR_ASN1_UNEXPECTED_TAG) ) + mbedtls_snprintf( buf, buflen, "ASN1 - ASN1 tag was of an unexpected value" ); + if( use_ret == -(MBEDTLS_ERR_ASN1_INVALID_LENGTH) ) + mbedtls_snprintf( buf, buflen, "ASN1 - Error when trying to determine the length or invalid length" ); + if( use_ret == -(MBEDTLS_ERR_ASN1_LENGTH_MISMATCH) ) + mbedtls_snprintf( buf, buflen, "ASN1 - Actual length differs from expected length" ); + if( use_ret == -(MBEDTLS_ERR_ASN1_INVALID_DATA) ) + mbedtls_snprintf( buf, buflen, "ASN1 - Data is invalid. (not used)" ); + if( use_ret == -(MBEDTLS_ERR_ASN1_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "ASN1 - Memory allocation failed" ); + if( use_ret == -(MBEDTLS_ERR_ASN1_BUF_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "ASN1 - Buffer too small when writing ASN.1 data structure" ); +#endif /* MBEDTLS_ASN1_PARSE_C */ + +#if defined(MBEDTLS_BASE64_C) + if( use_ret == -(MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "BASE64 - Output buffer too small" ); + if( use_ret == -(MBEDTLS_ERR_BASE64_INVALID_CHARACTER) ) + mbedtls_snprintf( buf, buflen, "BASE64 - Invalid character in input" ); +#endif /* MBEDTLS_BASE64_C */ + +#if defined(MBEDTLS_BIGNUM_C) + if( use_ret == -(MBEDTLS_ERR_MPI_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - An error occurred while reading from or writing to a file" ); + if( use_ret == -(MBEDTLS_ERR_MPI_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_MPI_INVALID_CHARACTER) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - There is an invalid character in the digit string" ); + if( use_ret == -(MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - The buffer is too small to write to" ); + if( use_ret == -(MBEDTLS_ERR_MPI_NEGATIVE_VALUE) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - The input arguments are negative or result in illegal output" ); + if( use_ret == -(MBEDTLS_ERR_MPI_DIVISION_BY_ZERO) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - The input argument for division is zero, which is not allowed" ); + if( use_ret == -(MBEDTLS_ERR_MPI_NOT_ACCEPTABLE) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - The input arguments are not acceptable" ); + if( use_ret == -(MBEDTLS_ERR_MPI_ALLOC_FAILED) ) + mbedtls_snprintf( buf, buflen, "BIGNUM - Memory allocation failed" ); +#endif /* MBEDTLS_BIGNUM_C */ + +#if defined(MBEDTLS_BLOWFISH_C) + if( use_ret == -(MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH) ) + mbedtls_snprintf( buf, buflen, "BLOWFISH - Invalid key length" ); + if( use_ret == -(MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH) ) + mbedtls_snprintf( buf, buflen, "BLOWFISH - Invalid data input length" ); +#endif /* MBEDTLS_BLOWFISH_C */ + +#if defined(MBEDTLS_CAMELLIA_C) + if( use_ret == -(MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH) ) + mbedtls_snprintf( buf, buflen, "CAMELLIA - Invalid key length" ); + if( use_ret == -(MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH) ) + mbedtls_snprintf( buf, buflen, "CAMELLIA - Invalid data input length" ); +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_CCM_C) + if( use_ret == -(MBEDTLS_ERR_CCM_BAD_INPUT) ) + mbedtls_snprintf( buf, buflen, "CCM - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_CCM_AUTH_FAILED) ) + mbedtls_snprintf( buf, buflen, "CCM - Authenticated decryption failed" ); +#endif /* MBEDTLS_CCM_C */ + +#if defined(MBEDTLS_CTR_DRBG_C) + if( use_ret == -(MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED) ) + mbedtls_snprintf( buf, buflen, "CTR_DRBG - The entropy source failed" ); + if( use_ret == -(MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG) ) + mbedtls_snprintf( buf, buflen, "CTR_DRBG - Too many random requested in single call" ); + if( use_ret == -(MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG) ) + mbedtls_snprintf( buf, buflen, "CTR_DRBG - Input too large (Entropy + additional)" ); + if( use_ret == -(MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "CTR_DRBG - Read/write error in file" ); +#endif /* MBEDTLS_CTR_DRBG_C */ + +#if defined(MBEDTLS_DES_C) + if( use_ret == -(MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH) ) + mbedtls_snprintf( buf, buflen, "DES - The data input has an invalid length" ); +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ENTROPY_C) + if( use_ret == -(MBEDTLS_ERR_ENTROPY_SOURCE_FAILED) ) + mbedtls_snprintf( buf, buflen, "ENTROPY - Critical entropy source failure" ); + if( use_ret == -(MBEDTLS_ERR_ENTROPY_MAX_SOURCES) ) + mbedtls_snprintf( buf, buflen, "ENTROPY - No more sources can be added" ); + if( use_ret == -(MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED) ) + mbedtls_snprintf( buf, buflen, "ENTROPY - No sources have been added to poll" ); + if( use_ret == -(MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE) ) + mbedtls_snprintf( buf, buflen, "ENTROPY - No strong sources have been added to poll" ); + if( use_ret == -(MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "ENTROPY - Read/write error in file" ); +#endif /* MBEDTLS_ENTROPY_C */ + +#if defined(MBEDTLS_GCM_C) + if( use_ret == -(MBEDTLS_ERR_GCM_AUTH_FAILED) ) + mbedtls_snprintf( buf, buflen, "GCM - Authenticated decryption failed" ); + if( use_ret == -(MBEDTLS_ERR_GCM_BAD_INPUT) ) + mbedtls_snprintf( buf, buflen, "GCM - Bad input parameters to function" ); +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_HMAC_DRBG_C) + if( use_ret == -(MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG) ) + mbedtls_snprintf( buf, buflen, "HMAC_DRBG - Too many random requested in single call" ); + if( use_ret == -(MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG) ) + mbedtls_snprintf( buf, buflen, "HMAC_DRBG - Input too large (Entropy + additional)" ); + if( use_ret == -(MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR) ) + mbedtls_snprintf( buf, buflen, "HMAC_DRBG - Read/write error in file" ); + if( use_ret == -(MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED) ) + mbedtls_snprintf( buf, buflen, "HMAC_DRBG - The entropy source failed" ); +#endif /* MBEDTLS_HMAC_DRBG_C */ + +#if defined(MBEDTLS_NET_C) + if( use_ret == -(MBEDTLS_ERR_NET_SOCKET_FAILED) ) + mbedtls_snprintf( buf, buflen, "NET - Failed to open a socket" ); + if( use_ret == -(MBEDTLS_ERR_NET_CONNECT_FAILED) ) + mbedtls_snprintf( buf, buflen, "NET - The connection to the given server / port failed" ); + if( use_ret == -(MBEDTLS_ERR_NET_BIND_FAILED) ) + mbedtls_snprintf( buf, buflen, "NET - Binding of the socket failed" ); + if( use_ret == -(MBEDTLS_ERR_NET_LISTEN_FAILED) ) + mbedtls_snprintf( buf, buflen, "NET - Could not listen on the socket" ); + if( use_ret == -(MBEDTLS_ERR_NET_ACCEPT_FAILED) ) + mbedtls_snprintf( buf, buflen, "NET - Could not accept the incoming connection" ); + if( use_ret == -(MBEDTLS_ERR_NET_RECV_FAILED) ) + mbedtls_snprintf( buf, buflen, "NET - Reading information from the socket failed" ); + if( use_ret == -(MBEDTLS_ERR_NET_SEND_FAILED) ) + mbedtls_snprintf( buf, buflen, "NET - Sending information through the socket failed" ); + if( use_ret == -(MBEDTLS_ERR_NET_CONN_RESET) ) + mbedtls_snprintf( buf, buflen, "NET - Connection was reset by peer" ); + if( use_ret == -(MBEDTLS_ERR_NET_UNKNOWN_HOST) ) + mbedtls_snprintf( buf, buflen, "NET - Failed to get an IP address for the given hostname" ); + if( use_ret == -(MBEDTLS_ERR_NET_BUFFER_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "NET - Buffer is too small to hold the data" ); + if( use_ret == -(MBEDTLS_ERR_NET_INVALID_CONTEXT) ) + mbedtls_snprintf( buf, buflen, "NET - The context is invalid, eg because it was free()ed" ); +#endif /* MBEDTLS_NET_C */ + +#if defined(MBEDTLS_OID_C) + if( use_ret == -(MBEDTLS_ERR_OID_NOT_FOUND) ) + mbedtls_snprintf( buf, buflen, "OID - OID is not found" ); + if( use_ret == -(MBEDTLS_ERR_OID_BUF_TOO_SMALL) ) + mbedtls_snprintf( buf, buflen, "OID - output buffer is too small" ); +#endif /* MBEDTLS_OID_C */ + +#if defined(MBEDTLS_PADLOCK_C) + if( use_ret == -(MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED) ) + mbedtls_snprintf( buf, buflen, "PADLOCK - Input data should be aligned" ); +#endif /* MBEDTLS_PADLOCK_C */ + +#if defined(MBEDTLS_THREADING_C) + if( use_ret == -(MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE) ) + mbedtls_snprintf( buf, buflen, "THREADING - The selected feature is not available" ); + if( use_ret == -(MBEDTLS_ERR_THREADING_BAD_INPUT_DATA) ) + mbedtls_snprintf( buf, buflen, "THREADING - Bad input parameters to function" ); + if( use_ret == -(MBEDTLS_ERR_THREADING_MUTEX_ERROR) ) + mbedtls_snprintf( buf, buflen, "THREADING - Locking / unlocking / free failed with error code" ); +#endif /* MBEDTLS_THREADING_C */ + +#if defined(MBEDTLS_XTEA_C) + if( use_ret == -(MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH) ) + mbedtls_snprintf( buf, buflen, "XTEA - The data input has an invalid length" ); +#endif /* MBEDTLS_XTEA_C */ + // END generated code + + if( strlen( buf ) != 0 ) + return; + + mbedtls_snprintf( buf, buflen, "UNKNOWN ERROR CODE (%04X)", use_ret ); +} + +#else /* MBEDTLS_ERROR_C */ + +#if defined(MBEDTLS_ERROR_STRERROR_DUMMY) + +/* + * Provide an non-function in case MBEDTLS_ERROR_C is not defined + */ +void mbedtls_strerror( int ret, char *buf, size_t buflen ) +{ + ((void) ret); + + if( buflen > 0 ) + buf[0] = '\0'; +} + +#endif /* MBEDTLS_ERROR_STRERROR_DUMMY */ + +#endif /* MBEDTLS_ERROR_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/gcm.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/gcm.c new file mode 100644 index 0000000..aaacf97 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/gcm.c @@ -0,0 +1,953 @@ +/* + * NIST SP800-38D compliant GCM implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * http://csrc.nist.gov/publications/nistpubs/800-38D/SP-800-38D.pdf + * + * See also: + * [MGV] http://csrc.nist.gov/groups/ST/toolkit/BCM/documents/proposedmodes/gcm/gcm-revised-spec.pdf + * + * We use the algorithm described as Shoup's method with 4-bit tables in + * [MGV] 4.1, pp. 12-13, to enhance speed without using too much memory. + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_GCM_C) + +#include "mbedtls/gcm.h" + +#include + +#if defined(MBEDTLS_AESNI_C) +#include "mbedtls/aesni.h" +#endif + +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ + | ( (uint32_t) (b)[(i) + 1] << 16 ) \ + | ( (uint32_t) (b)[(i) + 2] << 8 ) \ + | ( (uint32_t) (b)[(i) + 3] ); \ +} +#endif + +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Initialize a context + */ +void mbedtls_gcm_init( mbedtls_gcm_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_gcm_context ) ); +} + +/* + * Precompute small multiples of H, that is set + * HH[i] || HL[i] = H times i, + * where i is seen as a field element as in [MGV], ie high-order bits + * correspond to low powers of P. The result is stored in the same way, that + * is the high-order bit of HH corresponds to P^0 and the low-order bit of HL + * corresponds to P^127. + */ +static int gcm_gen_table( mbedtls_gcm_context *ctx ) +{ + int ret, i, j; + uint64_t hi, lo; + uint64_t vl, vh; + unsigned char h[16]; + size_t olen = 0; + + memset( h, 0, 16 ); + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, h, 16, h, &olen ) ) != 0 ) + return( ret ); + + /* pack h as two 64-bits ints, big-endian */ + GET_UINT32_BE( hi, h, 0 ); + GET_UINT32_BE( lo, h, 4 ); + vh = (uint64_t) hi << 32 | lo; + + GET_UINT32_BE( hi, h, 8 ); + GET_UINT32_BE( lo, h, 12 ); + vl = (uint64_t) hi << 32 | lo; + + /* 8 = 1000 corresponds to 1 in GF(2^128) */ + ctx->HL[8] = vl; + ctx->HH[8] = vh; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + /* With CLMUL support, we need only h, not the rest of the table */ + if( mbedtls_aesni_has_support( MBEDTLS_AESNI_CLMUL ) ) + return( 0 ); +#endif + + /* 0 corresponds to 0 in GF(2^128) */ + ctx->HH[0] = 0; + ctx->HL[0] = 0; + + for( i = 4; i > 0; i >>= 1 ) + { + uint32_t T = ( vl & 1 ) * 0xe1000000U; + vl = ( vh << 63 ) | ( vl >> 1 ); + vh = ( vh >> 1 ) ^ ( (uint64_t) T << 32); + + ctx->HL[i] = vl; + ctx->HH[i] = vh; + } + + for( i = 2; i <= 8; i *= 2 ) + { + uint64_t *HiL = ctx->HL + i, *HiH = ctx->HH + i; + vh = *HiH; + vl = *HiL; + for( j = 1; j < i; j++ ) + { + HiH[j] = vh ^ ctx->HH[j]; + HiL[j] = vl ^ ctx->HL[j]; + } + } + + return( 0 ); +} + +int mbedtls_gcm_setkey( mbedtls_gcm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits ) +{ + int ret; + const mbedtls_cipher_info_t *cipher_info; + + cipher_info = mbedtls_cipher_info_from_values( cipher, keybits, MBEDTLS_MODE_ECB ); + if( cipher_info == NULL ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + if( cipher_info->block_size != 16 ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + mbedtls_cipher_free( &ctx->cipher_ctx ); + + if( ( ret = mbedtls_cipher_setup( &ctx->cipher_ctx, cipher_info ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_setkey( &ctx->cipher_ctx, key, keybits, + MBEDTLS_ENCRYPT ) ) != 0 ) + { + return( ret ); + } + + if( ( ret = gcm_gen_table( ctx ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +/* + * Shoup's method for multiplication use this table with + * last4[x] = x times P^128 + * where x and last4[x] are seen as elements of GF(2^128) as in [MGV] + */ +static const uint64_t last4[16] = +{ + 0x0000, 0x1c20, 0x3840, 0x2460, + 0x7080, 0x6ca0, 0x48c0, 0x54e0, + 0xe100, 0xfd20, 0xd940, 0xc560, + 0x9180, 0x8da0, 0xa9c0, 0xb5e0 +}; + +/* + * Sets output to x times H using the precomputed tables. + * x and output are seen as elements of GF(2^128) as in [MGV]. + */ +static void gcm_mult( mbedtls_gcm_context *ctx, const unsigned char x[16], + unsigned char output[16] ) +{ + int i = 0; + unsigned char lo, hi, rem; + uint64_t zh, zl; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( mbedtls_aesni_has_support( MBEDTLS_AESNI_CLMUL ) ) { + unsigned char h[16]; + + PUT_UINT32_BE( ctx->HH[8] >> 32, h, 0 ); + PUT_UINT32_BE( ctx->HH[8], h, 4 ); + PUT_UINT32_BE( ctx->HL[8] >> 32, h, 8 ); + PUT_UINT32_BE( ctx->HL[8], h, 12 ); + + mbedtls_aesni_gcm_mult( output, x, h ); + return; + } +#endif /* MBEDTLS_AESNI_C && MBEDTLS_HAVE_X86_64 */ + + lo = x[15] & 0xf; + + zh = ctx->HH[lo]; + zl = ctx->HL[lo]; + + for( i = 15; i >= 0; i-- ) + { + lo = x[i] & 0xf; + hi = x[i] >> 4; + + if( i != 15 ) + { + rem = (unsigned char) zl & 0xf; + zl = ( zh << 60 ) | ( zl >> 4 ); + zh = ( zh >> 4 ); + zh ^= (uint64_t) last4[rem] << 48; + zh ^= ctx->HH[lo]; + zl ^= ctx->HL[lo]; + + } + + rem = (unsigned char) zl & 0xf; + zl = ( zh << 60 ) | ( zl >> 4 ); + zh = ( zh >> 4 ); + zh ^= (uint64_t) last4[rem] << 48; + zh ^= ctx->HH[hi]; + zl ^= ctx->HL[hi]; + } + + PUT_UINT32_BE( zh >> 32, output, 0 ); + PUT_UINT32_BE( zh, output, 4 ); + PUT_UINT32_BE( zl >> 32, output, 8 ); + PUT_UINT32_BE( zl, output, 12 ); +} + +int mbedtls_gcm_starts( mbedtls_gcm_context *ctx, + int mode, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len ) +{ + int ret; + unsigned char work_buf[16]; + size_t i; + const unsigned char *p; + size_t use_len, olen = 0; + + /* IV and AD are limited to 2^64 bits, so 2^61 bytes */ + if( ( (uint64_t) iv_len ) >> 61 != 0 || + ( (uint64_t) add_len ) >> 61 != 0 ) + { + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + } + + memset( ctx->y, 0x00, sizeof(ctx->y) ); + memset( ctx->buf, 0x00, sizeof(ctx->buf) ); + + ctx->mode = mode; + ctx->len = 0; + ctx->add_len = 0; + + if( iv_len == 12 ) + { + memcpy( ctx->y, iv, iv_len ); + ctx->y[15] = 1; + } + else + { + memset( work_buf, 0x00, 16 ); + PUT_UINT32_BE( iv_len * 8, work_buf, 12 ); + + p = iv; + while( iv_len > 0 ) + { + use_len = ( iv_len < 16 ) ? iv_len : 16; + + for( i = 0; i < use_len; i++ ) + ctx->y[i] ^= p[i]; + + gcm_mult( ctx, ctx->y, ctx->y ); + + iv_len -= use_len; + p += use_len; + } + + for( i = 0; i < 16; i++ ) + ctx->y[i] ^= work_buf[i]; + + gcm_mult( ctx, ctx->y, ctx->y ); + } + + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, ctx->y, 16, ctx->base_ectr, + &olen ) ) != 0 ) + { + return( ret ); + } + + ctx->add_len = add_len; + p = add; + while( add_len > 0 ) + { + use_len = ( add_len < 16 ) ? add_len : 16; + + for( i = 0; i < use_len; i++ ) + ctx->buf[i] ^= p[i]; + + gcm_mult( ctx, ctx->buf, ctx->buf ); + + add_len -= use_len; + p += use_len; + } + + return( 0 ); +} + +int mbedtls_gcm_update( mbedtls_gcm_context *ctx, + size_t length, + const unsigned char *input, + unsigned char *output ) +{ + int ret; + unsigned char ectr[16]; + size_t i; + const unsigned char *p; + unsigned char *out_p = output; + size_t use_len, olen = 0; + + if( output > input && (size_t) ( output - input ) < length ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + /* Total length is restricted to 2^39 - 256 bits, ie 2^36 - 2^5 bytes + * Also check for possible overflow */ + if( ctx->len + length < ctx->len || + (uint64_t) ctx->len + length > 0xFFFFFFFE0ull ) + { + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + } + + ctx->len += length; + + p = input; + while( length > 0 ) + { + use_len = ( length < 16 ) ? length : 16; + + for( i = 16; i > 12; i-- ) + if( ++ctx->y[i - 1] != 0 ) + break; + + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, ctx->y, 16, ectr, + &olen ) ) != 0 ) + { + return( ret ); + } + + for( i = 0; i < use_len; i++ ) + { + if( ctx->mode == MBEDTLS_GCM_DECRYPT ) + ctx->buf[i] ^= p[i]; + out_p[i] = ectr[i] ^ p[i]; + if( ctx->mode == MBEDTLS_GCM_ENCRYPT ) + ctx->buf[i] ^= out_p[i]; + } + + gcm_mult( ctx, ctx->buf, ctx->buf ); + + length -= use_len; + p += use_len; + out_p += use_len; + } + + return( 0 ); +} + +int mbedtls_gcm_finish( mbedtls_gcm_context *ctx, + unsigned char *tag, + size_t tag_len ) +{ + unsigned char work_buf[16]; + size_t i; + uint64_t orig_len = ctx->len * 8; + uint64_t orig_add_len = ctx->add_len * 8; + + if( tag_len > 16 || tag_len < 4 ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + if( tag_len != 0 ) + memcpy( tag, ctx->base_ectr, tag_len ); + + if( orig_len || orig_add_len ) + { + memset( work_buf, 0x00, 16 ); + + PUT_UINT32_BE( ( orig_add_len >> 32 ), work_buf, 0 ); + PUT_UINT32_BE( ( orig_add_len ), work_buf, 4 ); + PUT_UINT32_BE( ( orig_len >> 32 ), work_buf, 8 ); + PUT_UINT32_BE( ( orig_len ), work_buf, 12 ); + + for( i = 0; i < 16; i++ ) + ctx->buf[i] ^= work_buf[i]; + + gcm_mult( ctx, ctx->buf, ctx->buf ); + + for( i = 0; i < tag_len; i++ ) + tag[i] ^= ctx->buf[i]; + } + + return( 0 ); +} + +int mbedtls_gcm_crypt_and_tag( mbedtls_gcm_context *ctx, + int mode, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *input, + unsigned char *output, + size_t tag_len, + unsigned char *tag ) +{ + int ret; + + if( ( ret = mbedtls_gcm_starts( ctx, mode, iv, iv_len, add, add_len ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_gcm_update( ctx, length, input, output ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_gcm_finish( ctx, tag, tag_len ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *tag, + size_t tag_len, + const unsigned char *input, + unsigned char *output ) +{ + int ret; + unsigned char check_tag[16]; + size_t i; + int diff; + + if( ( ret = mbedtls_gcm_crypt_and_tag( ctx, MBEDTLS_GCM_DECRYPT, length, + iv, iv_len, add, add_len, + input, output, tag_len, check_tag ) ) != 0 ) + { + return( ret ); + } + + /* Check tag in "constant-time" */ + for( diff = 0, i = 0; i < tag_len; i++ ) + diff |= tag[i] ^ check_tag[i]; + + if( diff != 0 ) + { + mbedtls_zeroize( output, length ); + return( MBEDTLS_ERR_GCM_AUTH_FAILED ); + } + + return( 0 ); +} + +void mbedtls_gcm_free( mbedtls_gcm_context *ctx ) +{ + mbedtls_cipher_free( &ctx->cipher_ctx ); + mbedtls_zeroize( ctx, sizeof( mbedtls_gcm_context ) ); +} + +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) +/* + * AES-GCM test vectors from: + * + * http://csrc.nist.gov/groups/STM/cavp/documents/mac/gcmtestvectors.zip + */ +#define MAX_TESTS 6 + +static const int key_index[MAX_TESTS] = + { 0, 0, 1, 1, 1, 1 }; + +static const unsigned char key[MAX_TESTS][32] = +{ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, + { 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c, + 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08, + 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c, + 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08 }, +}; + +static const size_t iv_len[MAX_TESTS] = + { 12, 12, 12, 12, 8, 60 }; + +static const int iv_index[MAX_TESTS] = + { 0, 0, 1, 1, 1, 2 }; + +static const unsigned char iv[MAX_TESTS][64] = +{ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, + { 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad, + 0xde, 0xca, 0xf8, 0x88 }, + { 0x93, 0x13, 0x22, 0x5d, 0xf8, 0x84, 0x06, 0xe5, + 0x55, 0x90, 0x9c, 0x5a, 0xff, 0x52, 0x69, 0xaa, + 0x6a, 0x7a, 0x95, 0x38, 0x53, 0x4f, 0x7d, 0xa1, + 0xe4, 0xc3, 0x03, 0xd2, 0xa3, 0x18, 0xa7, 0x28, + 0xc3, 0xc0, 0xc9, 0x51, 0x56, 0x80, 0x95, 0x39, + 0xfc, 0xf0, 0xe2, 0x42, 0x9a, 0x6b, 0x52, 0x54, + 0x16, 0xae, 0xdb, 0xf5, 0xa0, 0xde, 0x6a, 0x57, + 0xa6, 0x37, 0xb3, 0x9b }, +}; + +static const size_t add_len[MAX_TESTS] = + { 0, 0, 0, 20, 20, 20 }; + +static const int add_index[MAX_TESTS] = + { 0, 0, 0, 1, 1, 1 }; + +static const unsigned char additional[MAX_TESTS][64] = +{ + { 0x00 }, + { 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef, + 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef, + 0xab, 0xad, 0xda, 0xd2 }, +}; + +static const size_t pt_len[MAX_TESTS] = + { 0, 16, 64, 60, 60, 60 }; + +static const int pt_index[MAX_TESTS] = + { 0, 0, 1, 1, 1, 1 }; + +static const unsigned char pt[MAX_TESTS][64] = +{ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, + { 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5, + 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a, + 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda, + 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72, + 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53, + 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25, + 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57, + 0xba, 0x63, 0x7b, 0x39, 0x1a, 0xaf, 0xd2, 0x55 }, +}; + +static const unsigned char ct[MAX_TESTS * 3][64] = +{ + { 0x00 }, + { 0x03, 0x88, 0xda, 0xce, 0x60, 0xb6, 0xa3, 0x92, + 0xf3, 0x28, 0xc2, 0xb9, 0x71, 0xb2, 0xfe, 0x78 }, + { 0x42, 0x83, 0x1e, 0xc2, 0x21, 0x77, 0x74, 0x24, + 0x4b, 0x72, 0x21, 0xb7, 0x84, 0xd0, 0xd4, 0x9c, + 0xe3, 0xaa, 0x21, 0x2f, 0x2c, 0x02, 0xa4, 0xe0, + 0x35, 0xc1, 0x7e, 0x23, 0x29, 0xac, 0xa1, 0x2e, + 0x21, 0xd5, 0x14, 0xb2, 0x54, 0x66, 0x93, 0x1c, + 0x7d, 0x8f, 0x6a, 0x5a, 0xac, 0x84, 0xaa, 0x05, + 0x1b, 0xa3, 0x0b, 0x39, 0x6a, 0x0a, 0xac, 0x97, + 0x3d, 0x58, 0xe0, 0x91, 0x47, 0x3f, 0x59, 0x85 }, + { 0x42, 0x83, 0x1e, 0xc2, 0x21, 0x77, 0x74, 0x24, + 0x4b, 0x72, 0x21, 0xb7, 0x84, 0xd0, 0xd4, 0x9c, + 0xe3, 0xaa, 0x21, 0x2f, 0x2c, 0x02, 0xa4, 0xe0, + 0x35, 0xc1, 0x7e, 0x23, 0x29, 0xac, 0xa1, 0x2e, + 0x21, 0xd5, 0x14, 0xb2, 0x54, 0x66, 0x93, 0x1c, + 0x7d, 0x8f, 0x6a, 0x5a, 0xac, 0x84, 0xaa, 0x05, + 0x1b, 0xa3, 0x0b, 0x39, 0x6a, 0x0a, 0xac, 0x97, + 0x3d, 0x58, 0xe0, 0x91 }, + { 0x61, 0x35, 0x3b, 0x4c, 0x28, 0x06, 0x93, 0x4a, + 0x77, 0x7f, 0xf5, 0x1f, 0xa2, 0x2a, 0x47, 0x55, + 0x69, 0x9b, 0x2a, 0x71, 0x4f, 0xcd, 0xc6, 0xf8, + 0x37, 0x66, 0xe5, 0xf9, 0x7b, 0x6c, 0x74, 0x23, + 0x73, 0x80, 0x69, 0x00, 0xe4, 0x9f, 0x24, 0xb2, + 0x2b, 0x09, 0x75, 0x44, 0xd4, 0x89, 0x6b, 0x42, + 0x49, 0x89, 0xb5, 0xe1, 0xeb, 0xac, 0x0f, 0x07, + 0xc2, 0x3f, 0x45, 0x98 }, + { 0x8c, 0xe2, 0x49, 0x98, 0x62, 0x56, 0x15, 0xb6, + 0x03, 0xa0, 0x33, 0xac, 0xa1, 0x3f, 0xb8, 0x94, + 0xbe, 0x91, 0x12, 0xa5, 0xc3, 0xa2, 0x11, 0xa8, + 0xba, 0x26, 0x2a, 0x3c, 0xca, 0x7e, 0x2c, 0xa7, + 0x01, 0xe4, 0xa9, 0xa4, 0xfb, 0xa4, 0x3c, 0x90, + 0xcc, 0xdc, 0xb2, 0x81, 0xd4, 0x8c, 0x7c, 0x6f, + 0xd6, 0x28, 0x75, 0xd2, 0xac, 0xa4, 0x17, 0x03, + 0x4c, 0x34, 0xae, 0xe5 }, + { 0x00 }, + { 0x98, 0xe7, 0x24, 0x7c, 0x07, 0xf0, 0xfe, 0x41, + 0x1c, 0x26, 0x7e, 0x43, 0x84, 0xb0, 0xf6, 0x00 }, + { 0x39, 0x80, 0xca, 0x0b, 0x3c, 0x00, 0xe8, 0x41, + 0xeb, 0x06, 0xfa, 0xc4, 0x87, 0x2a, 0x27, 0x57, + 0x85, 0x9e, 0x1c, 0xea, 0xa6, 0xef, 0xd9, 0x84, + 0x62, 0x85, 0x93, 0xb4, 0x0c, 0xa1, 0xe1, 0x9c, + 0x7d, 0x77, 0x3d, 0x00, 0xc1, 0x44, 0xc5, 0x25, + 0xac, 0x61, 0x9d, 0x18, 0xc8, 0x4a, 0x3f, 0x47, + 0x18, 0xe2, 0x44, 0x8b, 0x2f, 0xe3, 0x24, 0xd9, + 0xcc, 0xda, 0x27, 0x10, 0xac, 0xad, 0xe2, 0x56 }, + { 0x39, 0x80, 0xca, 0x0b, 0x3c, 0x00, 0xe8, 0x41, + 0xeb, 0x06, 0xfa, 0xc4, 0x87, 0x2a, 0x27, 0x57, + 0x85, 0x9e, 0x1c, 0xea, 0xa6, 0xef, 0xd9, 0x84, + 0x62, 0x85, 0x93, 0xb4, 0x0c, 0xa1, 0xe1, 0x9c, + 0x7d, 0x77, 0x3d, 0x00, 0xc1, 0x44, 0xc5, 0x25, + 0xac, 0x61, 0x9d, 0x18, 0xc8, 0x4a, 0x3f, 0x47, + 0x18, 0xe2, 0x44, 0x8b, 0x2f, 0xe3, 0x24, 0xd9, + 0xcc, 0xda, 0x27, 0x10 }, + { 0x0f, 0x10, 0xf5, 0x99, 0xae, 0x14, 0xa1, 0x54, + 0xed, 0x24, 0xb3, 0x6e, 0x25, 0x32, 0x4d, 0xb8, + 0xc5, 0x66, 0x63, 0x2e, 0xf2, 0xbb, 0xb3, 0x4f, + 0x83, 0x47, 0x28, 0x0f, 0xc4, 0x50, 0x70, 0x57, + 0xfd, 0xdc, 0x29, 0xdf, 0x9a, 0x47, 0x1f, 0x75, + 0xc6, 0x65, 0x41, 0xd4, 0xd4, 0xda, 0xd1, 0xc9, + 0xe9, 0x3a, 0x19, 0xa5, 0x8e, 0x8b, 0x47, 0x3f, + 0xa0, 0xf0, 0x62, 0xf7 }, + { 0xd2, 0x7e, 0x88, 0x68, 0x1c, 0xe3, 0x24, 0x3c, + 0x48, 0x30, 0x16, 0x5a, 0x8f, 0xdc, 0xf9, 0xff, + 0x1d, 0xe9, 0xa1, 0xd8, 0xe6, 0xb4, 0x47, 0xef, + 0x6e, 0xf7, 0xb7, 0x98, 0x28, 0x66, 0x6e, 0x45, + 0x81, 0xe7, 0x90, 0x12, 0xaf, 0x34, 0xdd, 0xd9, + 0xe2, 0xf0, 0x37, 0x58, 0x9b, 0x29, 0x2d, 0xb3, + 0xe6, 0x7c, 0x03, 0x67, 0x45, 0xfa, 0x22, 0xe7, + 0xe9, 0xb7, 0x37, 0x3b }, + { 0x00 }, + { 0xce, 0xa7, 0x40, 0x3d, 0x4d, 0x60, 0x6b, 0x6e, + 0x07, 0x4e, 0xc5, 0xd3, 0xba, 0xf3, 0x9d, 0x18 }, + { 0x52, 0x2d, 0xc1, 0xf0, 0x99, 0x56, 0x7d, 0x07, + 0xf4, 0x7f, 0x37, 0xa3, 0x2a, 0x84, 0x42, 0x7d, + 0x64, 0x3a, 0x8c, 0xdc, 0xbf, 0xe5, 0xc0, 0xc9, + 0x75, 0x98, 0xa2, 0xbd, 0x25, 0x55, 0xd1, 0xaa, + 0x8c, 0xb0, 0x8e, 0x48, 0x59, 0x0d, 0xbb, 0x3d, + 0xa7, 0xb0, 0x8b, 0x10, 0x56, 0x82, 0x88, 0x38, + 0xc5, 0xf6, 0x1e, 0x63, 0x93, 0xba, 0x7a, 0x0a, + 0xbc, 0xc9, 0xf6, 0x62, 0x89, 0x80, 0x15, 0xad }, + { 0x52, 0x2d, 0xc1, 0xf0, 0x99, 0x56, 0x7d, 0x07, + 0xf4, 0x7f, 0x37, 0xa3, 0x2a, 0x84, 0x42, 0x7d, + 0x64, 0x3a, 0x8c, 0xdc, 0xbf, 0xe5, 0xc0, 0xc9, + 0x75, 0x98, 0xa2, 0xbd, 0x25, 0x55, 0xd1, 0xaa, + 0x8c, 0xb0, 0x8e, 0x48, 0x59, 0x0d, 0xbb, 0x3d, + 0xa7, 0xb0, 0x8b, 0x10, 0x56, 0x82, 0x88, 0x38, + 0xc5, 0xf6, 0x1e, 0x63, 0x93, 0xba, 0x7a, 0x0a, + 0xbc, 0xc9, 0xf6, 0x62 }, + { 0xc3, 0x76, 0x2d, 0xf1, 0xca, 0x78, 0x7d, 0x32, + 0xae, 0x47, 0xc1, 0x3b, 0xf1, 0x98, 0x44, 0xcb, + 0xaf, 0x1a, 0xe1, 0x4d, 0x0b, 0x97, 0x6a, 0xfa, + 0xc5, 0x2f, 0xf7, 0xd7, 0x9b, 0xba, 0x9d, 0xe0, + 0xfe, 0xb5, 0x82, 0xd3, 0x39, 0x34, 0xa4, 0xf0, + 0x95, 0x4c, 0xc2, 0x36, 0x3b, 0xc7, 0x3f, 0x78, + 0x62, 0xac, 0x43, 0x0e, 0x64, 0xab, 0xe4, 0x99, + 0xf4, 0x7c, 0x9b, 0x1f }, + { 0x5a, 0x8d, 0xef, 0x2f, 0x0c, 0x9e, 0x53, 0xf1, + 0xf7, 0x5d, 0x78, 0x53, 0x65, 0x9e, 0x2a, 0x20, + 0xee, 0xb2, 0xb2, 0x2a, 0xaf, 0xde, 0x64, 0x19, + 0xa0, 0x58, 0xab, 0x4f, 0x6f, 0x74, 0x6b, 0xf4, + 0x0f, 0xc0, 0xc3, 0xb7, 0x80, 0xf2, 0x44, 0x45, + 0x2d, 0xa3, 0xeb, 0xf1, 0xc5, 0xd8, 0x2c, 0xde, + 0xa2, 0x41, 0x89, 0x97, 0x20, 0x0e, 0xf8, 0x2e, + 0x44, 0xae, 0x7e, 0x3f }, +}; + +static const unsigned char tag[MAX_TESTS * 3][16] = +{ + { 0x58, 0xe2, 0xfc, 0xce, 0xfa, 0x7e, 0x30, 0x61, + 0x36, 0x7f, 0x1d, 0x57, 0xa4, 0xe7, 0x45, 0x5a }, + { 0xab, 0x6e, 0x47, 0xd4, 0x2c, 0xec, 0x13, 0xbd, + 0xf5, 0x3a, 0x67, 0xb2, 0x12, 0x57, 0xbd, 0xdf }, + { 0x4d, 0x5c, 0x2a, 0xf3, 0x27, 0xcd, 0x64, 0xa6, + 0x2c, 0xf3, 0x5a, 0xbd, 0x2b, 0xa6, 0xfa, 0xb4 }, + { 0x5b, 0xc9, 0x4f, 0xbc, 0x32, 0x21, 0xa5, 0xdb, + 0x94, 0xfa, 0xe9, 0x5a, 0xe7, 0x12, 0x1a, 0x47 }, + { 0x36, 0x12, 0xd2, 0xe7, 0x9e, 0x3b, 0x07, 0x85, + 0x56, 0x1b, 0xe1, 0x4a, 0xac, 0xa2, 0xfc, 0xcb }, + { 0x61, 0x9c, 0xc5, 0xae, 0xff, 0xfe, 0x0b, 0xfa, + 0x46, 0x2a, 0xf4, 0x3c, 0x16, 0x99, 0xd0, 0x50 }, + { 0xcd, 0x33, 0xb2, 0x8a, 0xc7, 0x73, 0xf7, 0x4b, + 0xa0, 0x0e, 0xd1, 0xf3, 0x12, 0x57, 0x24, 0x35 }, + { 0x2f, 0xf5, 0x8d, 0x80, 0x03, 0x39, 0x27, 0xab, + 0x8e, 0xf4, 0xd4, 0x58, 0x75, 0x14, 0xf0, 0xfb }, + { 0x99, 0x24, 0xa7, 0xc8, 0x58, 0x73, 0x36, 0xbf, + 0xb1, 0x18, 0x02, 0x4d, 0xb8, 0x67, 0x4a, 0x14 }, + { 0x25, 0x19, 0x49, 0x8e, 0x80, 0xf1, 0x47, 0x8f, + 0x37, 0xba, 0x55, 0xbd, 0x6d, 0x27, 0x61, 0x8c }, + { 0x65, 0xdc, 0xc5, 0x7f, 0xcf, 0x62, 0x3a, 0x24, + 0x09, 0x4f, 0xcc, 0xa4, 0x0d, 0x35, 0x33, 0xf8 }, + { 0xdc, 0xf5, 0x66, 0xff, 0x29, 0x1c, 0x25, 0xbb, + 0xb8, 0x56, 0x8f, 0xc3, 0xd3, 0x76, 0xa6, 0xd9 }, + { 0x53, 0x0f, 0x8a, 0xfb, 0xc7, 0x45, 0x36, 0xb9, + 0xa9, 0x63, 0xb4, 0xf1, 0xc4, 0xcb, 0x73, 0x8b }, + { 0xd0, 0xd1, 0xc8, 0xa7, 0x99, 0x99, 0x6b, 0xf0, + 0x26, 0x5b, 0x98, 0xb5, 0xd4, 0x8a, 0xb9, 0x19 }, + { 0xb0, 0x94, 0xda, 0xc5, 0xd9, 0x34, 0x71, 0xbd, + 0xec, 0x1a, 0x50, 0x22, 0x70, 0xe3, 0xcc, 0x6c }, + { 0x76, 0xfc, 0x6e, 0xce, 0x0f, 0x4e, 0x17, 0x68, + 0xcd, 0xdf, 0x88, 0x53, 0xbb, 0x2d, 0x55, 0x1b }, + { 0x3a, 0x33, 0x7d, 0xbf, 0x46, 0xa7, 0x92, 0xc4, + 0x5e, 0x45, 0x49, 0x13, 0xfe, 0x2e, 0xa8, 0xf2 }, + { 0xa4, 0x4a, 0x82, 0x66, 0xee, 0x1c, 0x8e, 0xb0, + 0xc8, 0xb5, 0xd4, 0xcf, 0x5a, 0xe9, 0xf1, 0x9a }, +}; + +int mbedtls_gcm_self_test( int verbose ) +{ + mbedtls_gcm_context ctx; + unsigned char buf[64]; + unsigned char tag_buf[16]; + int i, j, ret; + mbedtls_cipher_id_t cipher = MBEDTLS_CIPHER_ID_AES; + + mbedtls_gcm_init( &ctx ); + + for( j = 0; j < 3; j++ ) + { + int key_len = 128 + 64 * j; + + for( i = 0; i < MAX_TESTS; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " AES-GCM-%3d #%d (%s): ", + key_len, i, "enc" ); + + mbedtls_gcm_setkey( &ctx, cipher, key[key_index[i]], key_len ); + + ret = mbedtls_gcm_crypt_and_tag( &ctx, MBEDTLS_GCM_ENCRYPT, + pt_len[i], + iv[iv_index[i]], iv_len[i], + additional[add_index[i]], add_len[i], + pt[pt_index[i]], buf, 16, tag_buf ); + + if( ret != 0 || + memcmp( buf, ct[j * 6 + i], pt_len[i] ) != 0 || + memcmp( tag_buf, tag[j * 6 + i], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + mbedtls_gcm_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " AES-GCM-%3d #%d (%s): ", + key_len, i, "dec" ); + + mbedtls_gcm_setkey( &ctx, cipher, key[key_index[i]], key_len ); + + ret = mbedtls_gcm_crypt_and_tag( &ctx, MBEDTLS_GCM_DECRYPT, + pt_len[i], + iv[iv_index[i]], iv_len[i], + additional[add_index[i]], add_len[i], + ct[j * 6 + i], buf, 16, tag_buf ); + + if( ret != 0 || + memcmp( buf, pt[pt_index[i]], pt_len[i] ) != 0 || + memcmp( tag_buf, tag[j * 6 + i], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + mbedtls_gcm_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " AES-GCM-%3d #%d split (%s): ", + key_len, i, "enc" ); + + mbedtls_gcm_setkey( &ctx, cipher, key[key_index[i]], key_len ); + + ret = mbedtls_gcm_starts( &ctx, MBEDTLS_GCM_ENCRYPT, + iv[iv_index[i]], iv_len[i], + additional[add_index[i]], add_len[i] ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( pt_len[i] > 32 ) + { + size_t rest_len = pt_len[i] - 32; + ret = mbedtls_gcm_update( &ctx, 32, pt[pt_index[i]], buf ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + ret = mbedtls_gcm_update( &ctx, rest_len, pt[pt_index[i]] + 32, + buf + 32 ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + else + { + ret = mbedtls_gcm_update( &ctx, pt_len[i], pt[pt_index[i]], buf ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + + ret = mbedtls_gcm_finish( &ctx, tag_buf, 16 ); + if( ret != 0 || + memcmp( buf, ct[j * 6 + i], pt_len[i] ) != 0 || + memcmp( tag_buf, tag[j * 6 + i], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + mbedtls_gcm_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " AES-GCM-%3d #%d split (%s): ", + key_len, i, "dec" ); + + mbedtls_gcm_setkey( &ctx, cipher, key[key_index[i]], key_len ); + + ret = mbedtls_gcm_starts( &ctx, MBEDTLS_GCM_DECRYPT, + iv[iv_index[i]], iv_len[i], + additional[add_index[i]], add_len[i] ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( pt_len[i] > 32 ) + { + size_t rest_len = pt_len[i] - 32; + ret = mbedtls_gcm_update( &ctx, 32, ct[j * 6 + i], buf ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + ret = mbedtls_gcm_update( &ctx, rest_len, ct[j * 6 + i] + 32, + buf + 32 ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + else + { + ret = mbedtls_gcm_update( &ctx, pt_len[i], ct[j * 6 + i], buf ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + + ret = mbedtls_gcm_finish( &ctx, tag_buf, 16 ); + if( ret != 0 || + memcmp( buf, pt[pt_index[i]], pt_len[i] ) != 0 || + memcmp( tag_buf, tag[j * 6 + i], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + mbedtls_gcm_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + } + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ + +#endif /* MBEDTLS_GCM_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/havege.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/havege.c new file mode 100644 index 0000000..7623bc0 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/havege.c @@ -0,0 +1,243 @@ +/** + * \brief HAVEGE: HArdware Volatile Entropy Gathering and Expansion + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The HAVEGE RNG was designed by Andre Seznec in 2002. + * + * http://www.irisa.fr/caps/projects/hipsor/publi.php + * + * Contact: seznec(at)irisa_dot_fr - orocheco(at)irisa_dot_fr + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_HAVEGE_C) + +#include "mbedtls/havege.h" +#include "mbedtls/timing.h" + +#include + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* ------------------------------------------------------------------------ + * On average, one iteration accesses two 8-word blocks in the havege WALK + * table, and generates 16 words in the RES array. + * + * The data read in the WALK table is updated and permuted after each use. + * The result of the hardware clock counter read is used for this update. + * + * 25 conditional tests are present. The conditional tests are grouped in + * two nested groups of 12 conditional tests and 1 test that controls the + * permutation; on average, there should be 6 tests executed and 3 of them + * should be mispredicted. + * ------------------------------------------------------------------------ + */ + +#define SWAP(X,Y) { int *T = X; X = Y; Y = T; } + +#define TST1_ENTER if( PTEST & 1 ) { PTEST ^= 3; PTEST >>= 1; +#define TST2_ENTER if( PTEST & 1 ) { PTEST ^= 3; PTEST >>= 1; + +#define TST1_LEAVE U1++; } +#define TST2_LEAVE U2++; } + +#define ONE_ITERATION \ + \ + PTEST = PT1 >> 20; \ + \ + TST1_ENTER TST1_ENTER TST1_ENTER TST1_ENTER \ + TST1_ENTER TST1_ENTER TST1_ENTER TST1_ENTER \ + TST1_ENTER TST1_ENTER TST1_ENTER TST1_ENTER \ + \ + TST1_LEAVE TST1_LEAVE TST1_LEAVE TST1_LEAVE \ + TST1_LEAVE TST1_LEAVE TST1_LEAVE TST1_LEAVE \ + TST1_LEAVE TST1_LEAVE TST1_LEAVE TST1_LEAVE \ + \ + PTX = (PT1 >> 18) & 7; \ + PT1 &= 0x1FFF; \ + PT2 &= 0x1FFF; \ + CLK = (int) mbedtls_timing_hardclock(); \ + \ + i = 0; \ + A = &WALK[PT1 ]; RES[i++] ^= *A; \ + B = &WALK[PT2 ]; RES[i++] ^= *B; \ + C = &WALK[PT1 ^ 1]; RES[i++] ^= *C; \ + D = &WALK[PT2 ^ 4]; RES[i++] ^= *D; \ + \ + IN = (*A >> (1)) ^ (*A << (31)) ^ CLK; \ + *A = (*B >> (2)) ^ (*B << (30)) ^ CLK; \ + *B = IN ^ U1; \ + *C = (*C >> (3)) ^ (*C << (29)) ^ CLK; \ + *D = (*D >> (4)) ^ (*D << (28)) ^ CLK; \ + \ + A = &WALK[PT1 ^ 2]; RES[i++] ^= *A; \ + B = &WALK[PT2 ^ 2]; RES[i++] ^= *B; \ + C = &WALK[PT1 ^ 3]; RES[i++] ^= *C; \ + D = &WALK[PT2 ^ 6]; RES[i++] ^= *D; \ + \ + if( PTEST & 1 ) SWAP( A, C ); \ + \ + IN = (*A >> (5)) ^ (*A << (27)) ^ CLK; \ + *A = (*B >> (6)) ^ (*B << (26)) ^ CLK; \ + *B = IN; CLK = (int) mbedtls_timing_hardclock(); \ + *C = (*C >> (7)) ^ (*C << (25)) ^ CLK; \ + *D = (*D >> (8)) ^ (*D << (24)) ^ CLK; \ + \ + A = &WALK[PT1 ^ 4]; \ + B = &WALK[PT2 ^ 1]; \ + \ + PTEST = PT2 >> 1; \ + \ + PT2 = (RES[(i - 8) ^ PTY] ^ WALK[PT2 ^ PTY ^ 7]); \ + PT2 = ((PT2 & 0x1FFF) & (~8)) ^ ((PT1 ^ 8) & 0x8); \ + PTY = (PT2 >> 10) & 7; \ + \ + TST2_ENTER TST2_ENTER TST2_ENTER TST2_ENTER \ + TST2_ENTER TST2_ENTER TST2_ENTER TST2_ENTER \ + TST2_ENTER TST2_ENTER TST2_ENTER TST2_ENTER \ + \ + TST2_LEAVE TST2_LEAVE TST2_LEAVE TST2_LEAVE \ + TST2_LEAVE TST2_LEAVE TST2_LEAVE TST2_LEAVE \ + TST2_LEAVE TST2_LEAVE TST2_LEAVE TST2_LEAVE \ + \ + C = &WALK[PT1 ^ 5]; \ + D = &WALK[PT2 ^ 5]; \ + \ + RES[i++] ^= *A; \ + RES[i++] ^= *B; \ + RES[i++] ^= *C; \ + RES[i++] ^= *D; \ + \ + IN = (*A >> ( 9)) ^ (*A << (23)) ^ CLK; \ + *A = (*B >> (10)) ^ (*B << (22)) ^ CLK; \ + *B = IN ^ U2; \ + *C = (*C >> (11)) ^ (*C << (21)) ^ CLK; \ + *D = (*D >> (12)) ^ (*D << (20)) ^ CLK; \ + \ + A = &WALK[PT1 ^ 6]; RES[i++] ^= *A; \ + B = &WALK[PT2 ^ 3]; RES[i++] ^= *B; \ + C = &WALK[PT1 ^ 7]; RES[i++] ^= *C; \ + D = &WALK[PT2 ^ 7]; RES[i++] ^= *D; \ + \ + IN = (*A >> (13)) ^ (*A << (19)) ^ CLK; \ + *A = (*B >> (14)) ^ (*B << (18)) ^ CLK; \ + *B = IN; \ + *C = (*C >> (15)) ^ (*C << (17)) ^ CLK; \ + *D = (*D >> (16)) ^ (*D << (16)) ^ CLK; \ + \ + PT1 = ( RES[( i - 8 ) ^ PTX] ^ \ + WALK[PT1 ^ PTX ^ 7] ) & (~1); \ + PT1 ^= (PT2 ^ 0x10) & 0x10; \ + \ + for( n++, i = 0; i < 16; i++ ) \ + hs->pool[n % MBEDTLS_HAVEGE_COLLECT_SIZE] ^= RES[i]; + +/* + * Entropy gathering function + */ +static void havege_fill( mbedtls_havege_state *hs ) +{ + int i, n = 0; + int U1, U2, *A, *B, *C, *D; + int PT1, PT2, *WALK, RES[16]; + int PTX, PTY, CLK, PTEST, IN; + + WALK = hs->WALK; + PT1 = hs->PT1; + PT2 = hs->PT2; + + PTX = U1 = 0; + PTY = U2 = 0; + + memset( RES, 0, sizeof( RES ) ); + + while( n < MBEDTLS_HAVEGE_COLLECT_SIZE * 4 ) + { + ONE_ITERATION + ONE_ITERATION + ONE_ITERATION + ONE_ITERATION + } + + hs->PT1 = PT1; + hs->PT2 = PT2; + + hs->offset[0] = 0; + hs->offset[1] = MBEDTLS_HAVEGE_COLLECT_SIZE / 2; +} + +/* + * HAVEGE initialization + */ +void mbedtls_havege_init( mbedtls_havege_state *hs ) +{ + memset( hs, 0, sizeof( mbedtls_havege_state ) ); + + havege_fill( hs ); +} + +void mbedtls_havege_free( mbedtls_havege_state *hs ) +{ + if( hs == NULL ) + return; + + mbedtls_zeroize( hs, sizeof( mbedtls_havege_state ) ); +} + +/* + * HAVEGE rand function + */ +int mbedtls_havege_random( void *p_rng, unsigned char *buf, size_t len ) +{ + int val; + size_t use_len; + mbedtls_havege_state *hs = (mbedtls_havege_state *) p_rng; + unsigned char *p = buf; + + while( len > 0 ) + { + use_len = len; + if( use_len > sizeof(int) ) + use_len = sizeof(int); + + if( hs->offset[1] >= MBEDTLS_HAVEGE_COLLECT_SIZE ) + havege_fill( hs ); + + val = hs->pool[hs->offset[0]++]; + val ^= hs->pool[hs->offset[1]++]; + + memcpy( p, &val, use_len ); + + len -= use_len; + p += use_len; + } + + return( 0 ); +} + +#endif /* MBEDTLS_HAVEGE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/hmac_drbg.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/hmac_drbg.c new file mode 100644 index 0000000..bf5f9b5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/hmac_drbg.c @@ -0,0 +1,529 @@ +/* + * HMAC_DRBG implementation (NIST SP 800-90) + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * The NIST SP 800-90A DRBGs are described in the following publication. + * http://csrc.nist.gov/publications/nistpubs/800-90A/SP800-90A.pdf + * References below are based on rev. 1 (January 2012). + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_HMAC_DRBG_C) + +#include "mbedtls/hmac_drbg.h" + +#include + +#if defined(MBEDTLS_FS_IO) +#include +#endif + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_SELF_TEST */ +#endif /* MBEDTLS_PLATFORM_C */ + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * HMAC_DRBG context initialization + */ +void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_hmac_drbg_context ) ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &ctx->mutex ); +#endif +} + +/* + * HMAC_DRBG update, using optional additional data (10.1.2.2) + */ +void mbedtls_hmac_drbg_update( mbedtls_hmac_drbg_context *ctx, + const unsigned char *additional, size_t add_len ) +{ + size_t md_len = mbedtls_md_get_size( ctx->md_ctx.md_info ); + unsigned char rounds = ( additional != NULL && add_len != 0 ) ? 2 : 1; + unsigned char sep[1]; + unsigned char K[MBEDTLS_MD_MAX_SIZE]; + + for( sep[0] = 0; sep[0] < rounds; sep[0]++ ) + { + /* Step 1 or 4 */ + mbedtls_md_hmac_reset( &ctx->md_ctx ); + mbedtls_md_hmac_update( &ctx->md_ctx, ctx->V, md_len ); + mbedtls_md_hmac_update( &ctx->md_ctx, sep, 1 ); + if( rounds == 2 ) + mbedtls_md_hmac_update( &ctx->md_ctx, additional, add_len ); + mbedtls_md_hmac_finish( &ctx->md_ctx, K ); + + /* Step 2 or 5 */ + mbedtls_md_hmac_starts( &ctx->md_ctx, K, md_len ); + mbedtls_md_hmac_update( &ctx->md_ctx, ctx->V, md_len ); + mbedtls_md_hmac_finish( &ctx->md_ctx, ctx->V ); + } +} + +/* + * Simplified HMAC_DRBG initialisation (for use with deterministic ECDSA) + */ +int mbedtls_hmac_drbg_seed_buf( mbedtls_hmac_drbg_context *ctx, + const mbedtls_md_info_t * md_info, + const unsigned char *data, size_t data_len ) +{ + int ret; + + if( ( ret = mbedtls_md_setup( &ctx->md_ctx, md_info, 1 ) ) != 0 ) + return( ret ); + + /* + * Set initial working state. + * Use the V memory location, which is currently all 0, to initialize the + * MD context with an all-zero key. Then set V to its initial value. + */ + mbedtls_md_hmac_starts( &ctx->md_ctx, ctx->V, mbedtls_md_get_size( md_info ) ); + memset( ctx->V, 0x01, mbedtls_md_get_size( md_info ) ); + + mbedtls_hmac_drbg_update( ctx, data, data_len ); + + return( 0 ); +} + +/* + * HMAC_DRBG reseeding: 10.1.2.4 (arabic) + 9.2 (Roman) + */ +int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx, + const unsigned char *additional, size_t len ) +{ + unsigned char seed[MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT]; + size_t seedlen; + + /* III. Check input length */ + if( len > MBEDTLS_HMAC_DRBG_MAX_INPUT || + ctx->entropy_len + len > MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT ) + { + return( MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG ); + } + + memset( seed, 0, MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT ); + + /* IV. Gather entropy_len bytes of entropy for the seed */ + if( ctx->f_entropy( ctx->p_entropy, seed, ctx->entropy_len ) != 0 ) + return( MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED ); + + seedlen = ctx->entropy_len; + + /* 1. Concatenate entropy and additional data if any */ + if( additional != NULL && len != 0 ) + { + memcpy( seed + seedlen, additional, len ); + seedlen += len; + } + + /* 2. Update state */ + mbedtls_hmac_drbg_update( ctx, seed, seedlen ); + + /* 3. Reset reseed_counter */ + ctx->reseed_counter = 1; + + /* 4. Done */ + return( 0 ); +} + +/* + * HMAC_DRBG initialisation (10.1.2.3 + 9.1) + */ +int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx, + const mbedtls_md_info_t * md_info, + int (*f_entropy)(void *, unsigned char *, size_t), + void *p_entropy, + const unsigned char *custom, + size_t len ) +{ + int ret; + size_t entropy_len, md_size; + + if( ( ret = mbedtls_md_setup( &ctx->md_ctx, md_info, 1 ) ) != 0 ) + return( ret ); + + md_size = mbedtls_md_get_size( md_info ); + + /* + * Set initial working state. + * Use the V memory location, which is currently all 0, to initialize the + * MD context with an all-zero key. Then set V to its initial value. + */ + mbedtls_md_hmac_starts( &ctx->md_ctx, ctx->V, md_size ); + memset( ctx->V, 0x01, md_size ); + + ctx->f_entropy = f_entropy; + ctx->p_entropy = p_entropy; + + ctx->reseed_interval = MBEDTLS_HMAC_DRBG_RESEED_INTERVAL; + + /* + * See SP800-57 5.6.1 (p. 65-66) for the security strength provided by + * each hash function, then according to SP800-90A rev1 10.1 table 2, + * min_entropy_len (in bits) is security_strength. + * + * (This also matches the sizes used in the NIST test vectors.) + */ + entropy_len = md_size <= 20 ? 16 : /* 160-bits hash -> 128 bits */ + md_size <= 28 ? 24 : /* 224-bits hash -> 192 bits */ + 32; /* better (256+) -> 256 bits */ + + /* + * For initialisation, use more entropy to emulate a nonce + * (Again, matches test vectors.) + */ + ctx->entropy_len = entropy_len * 3 / 2; + + if( ( ret = mbedtls_hmac_drbg_reseed( ctx, custom, len ) ) != 0 ) + return( ret ); + + ctx->entropy_len = entropy_len; + + return( 0 ); +} + +/* + * Set prediction resistance + */ +void mbedtls_hmac_drbg_set_prediction_resistance( mbedtls_hmac_drbg_context *ctx, + int resistance ) +{ + ctx->prediction_resistance = resistance; +} + +/* + * Set entropy length grabbed for reseeds + */ +void mbedtls_hmac_drbg_set_entropy_len( mbedtls_hmac_drbg_context *ctx, size_t len ) +{ + ctx->entropy_len = len; +} + +/* + * Set reseed interval + */ +void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx, int interval ) +{ + ctx->reseed_interval = interval; +} + +/* + * HMAC_DRBG random function with optional additional data: + * 10.1.2.5 (arabic) + 9.3 (Roman) + */ +int mbedtls_hmac_drbg_random_with_add( void *p_rng, + unsigned char *output, size_t out_len, + const unsigned char *additional, size_t add_len ) +{ + int ret; + mbedtls_hmac_drbg_context *ctx = (mbedtls_hmac_drbg_context *) p_rng; + size_t md_len = mbedtls_md_get_size( ctx->md_ctx.md_info ); + size_t left = out_len; + unsigned char *out = output; + + /* II. Check request length */ + if( out_len > MBEDTLS_HMAC_DRBG_MAX_REQUEST ) + return( MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG ); + + /* III. Check input length */ + if( add_len > MBEDTLS_HMAC_DRBG_MAX_INPUT ) + return( MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG ); + + /* 1. (aka VII and IX) Check reseed counter and PR */ + if( ctx->f_entropy != NULL && /* For no-reseeding instances */ + ( ctx->prediction_resistance == MBEDTLS_HMAC_DRBG_PR_ON || + ctx->reseed_counter > ctx->reseed_interval ) ) + { + if( ( ret = mbedtls_hmac_drbg_reseed( ctx, additional, add_len ) ) != 0 ) + return( ret ); + + add_len = 0; /* VII.4 */ + } + + /* 2. Use additional data if any */ + if( additional != NULL && add_len != 0 ) + mbedtls_hmac_drbg_update( ctx, additional, add_len ); + + /* 3, 4, 5. Generate bytes */ + while( left != 0 ) + { + size_t use_len = left > md_len ? md_len : left; + + mbedtls_md_hmac_reset( &ctx->md_ctx ); + mbedtls_md_hmac_update( &ctx->md_ctx, ctx->V, md_len ); + mbedtls_md_hmac_finish( &ctx->md_ctx, ctx->V ); + + memcpy( out, ctx->V, use_len ); + out += use_len; + left -= use_len; + } + + /* 6. Update */ + mbedtls_hmac_drbg_update( ctx, additional, add_len ); + + /* 7. Update reseed counter */ + ctx->reseed_counter++; + + /* 8. Done */ + return( 0 ); +} + +/* + * HMAC_DRBG random function + */ +int mbedtls_hmac_drbg_random( void *p_rng, unsigned char *output, size_t out_len ) +{ + int ret; + mbedtls_hmac_drbg_context *ctx = (mbedtls_hmac_drbg_context *) p_rng; + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + ret = mbedtls_hmac_drbg_random_with_add( ctx, output, out_len, NULL, 0 ); + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +/* + * Free an HMAC_DRBG context + */ +void mbedtls_hmac_drbg_free( mbedtls_hmac_drbg_context *ctx ) +{ + if( ctx == NULL ) + return; + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_free( &ctx->mutex ); +#endif + mbedtls_md_free( &ctx->md_ctx ); + mbedtls_zeroize( ctx, sizeof( mbedtls_hmac_drbg_context ) ); +} + +#if defined(MBEDTLS_FS_IO) +int mbedtls_hmac_drbg_write_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path ) +{ + int ret; + FILE *f; + unsigned char buf[ MBEDTLS_HMAC_DRBG_MAX_INPUT ]; + + if( ( f = fopen( path, "wb" ) ) == NULL ) + return( MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR ); + + if( ( ret = mbedtls_hmac_drbg_random( ctx, buf, sizeof( buf ) ) ) != 0 ) + goto exit; + + if( fwrite( buf, 1, sizeof( buf ), f ) != sizeof( buf ) ) + { + ret = MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR; + goto exit; + } + + ret = 0; + +exit: + fclose( f ); + return( ret ); +} + +int mbedtls_hmac_drbg_update_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path ) +{ + FILE *f; + size_t n; + unsigned char buf[ MBEDTLS_HMAC_DRBG_MAX_INPUT ]; + + if( ( f = fopen( path, "rb" ) ) == NULL ) + return( MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR ); + + fseek( f, 0, SEEK_END ); + n = (size_t) ftell( f ); + fseek( f, 0, SEEK_SET ); + + if( n > MBEDTLS_HMAC_DRBG_MAX_INPUT ) + { + fclose( f ); + return( MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG ); + } + + if( fread( buf, 1, n, f ) != n ) + { + fclose( f ); + return( MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR ); + } + + fclose( f ); + + mbedtls_hmac_drbg_update( ctx, buf, n ); + + return( mbedtls_hmac_drbg_write_seed_file( ctx, path ) ); +} +#endif /* MBEDTLS_FS_IO */ + + +#if defined(MBEDTLS_SELF_TEST) + +#if !defined(MBEDTLS_SHA1_C) +/* Dummy checkup routine */ +int mbedtls_hmac_drbg_self_test( int verbose ) +{ + (void) verbose; + return( 0 ); +} +#else + +#define OUTPUT_LEN 80 + +/* From a NIST PR=true test vector */ +static const unsigned char entropy_pr[] = { + 0xa0, 0xc9, 0xab, 0x58, 0xf1, 0xe2, 0xe5, 0xa4, 0xde, 0x3e, 0xbd, 0x4f, + 0xf7, 0x3e, 0x9c, 0x5b, 0x64, 0xef, 0xd8, 0xca, 0x02, 0x8c, 0xf8, 0x11, + 0x48, 0xa5, 0x84, 0xfe, 0x69, 0xab, 0x5a, 0xee, 0x42, 0xaa, 0x4d, 0x42, + 0x17, 0x60, 0x99, 0xd4, 0x5e, 0x13, 0x97, 0xdc, 0x40, 0x4d, 0x86, 0xa3, + 0x7b, 0xf5, 0x59, 0x54, 0x75, 0x69, 0x51, 0xe4 }; +static const unsigned char result_pr[OUTPUT_LEN] = { + 0x9a, 0x00, 0xa2, 0xd0, 0x0e, 0xd5, 0x9b, 0xfe, 0x31, 0xec, 0xb1, 0x39, + 0x9b, 0x60, 0x81, 0x48, 0xd1, 0x96, 0x9d, 0x25, 0x0d, 0x3c, 0x1e, 0x94, + 0x10, 0x10, 0x98, 0x12, 0x93, 0x25, 0xca, 0xb8, 0xfc, 0xcc, 0x2d, 0x54, + 0x73, 0x19, 0x70, 0xc0, 0x10, 0x7a, 0xa4, 0x89, 0x25, 0x19, 0x95, 0x5e, + 0x4b, 0xc6, 0x00, 0x1d, 0x7f, 0x4e, 0x6a, 0x2b, 0xf8, 0xa3, 0x01, 0xab, + 0x46, 0x05, 0x5c, 0x09, 0xa6, 0x71, 0x88, 0xf1, 0xa7, 0x40, 0xee, 0xf3, + 0xe1, 0x5c, 0x02, 0x9b, 0x44, 0xaf, 0x03, 0x44 }; + +/* From a NIST PR=false test vector */ +static const unsigned char entropy_nopr[] = { + 0x79, 0x34, 0x9b, 0xbf, 0x7c, 0xdd, 0xa5, 0x79, 0x95, 0x57, 0x86, 0x66, + 0x21, 0xc9, 0x13, 0x83, 0x11, 0x46, 0x73, 0x3a, 0xbf, 0x8c, 0x35, 0xc8, + 0xc7, 0x21, 0x5b, 0x5b, 0x96, 0xc4, 0x8e, 0x9b, 0x33, 0x8c, 0x74, 0xe3, + 0xe9, 0x9d, 0xfe, 0xdf }; +static const unsigned char result_nopr[OUTPUT_LEN] = { + 0xc6, 0xa1, 0x6a, 0xb8, 0xd4, 0x20, 0x70, 0x6f, 0x0f, 0x34, 0xab, 0x7f, + 0xec, 0x5a, 0xdc, 0xa9, 0xd8, 0xca, 0x3a, 0x13, 0x3e, 0x15, 0x9c, 0xa6, + 0xac, 0x43, 0xc6, 0xf8, 0xa2, 0xbe, 0x22, 0x83, 0x4a, 0x4c, 0x0a, 0x0a, + 0xff, 0xb1, 0x0d, 0x71, 0x94, 0xf1, 0xc1, 0xa5, 0xcf, 0x73, 0x22, 0xec, + 0x1a, 0xe0, 0x96, 0x4e, 0xd4, 0xbf, 0x12, 0x27, 0x46, 0xe0, 0x87, 0xfd, + 0xb5, 0xb3, 0xe9, 0x1b, 0x34, 0x93, 0xd5, 0xbb, 0x98, 0xfa, 0xed, 0x49, + 0xe8, 0x5f, 0x13, 0x0f, 0xc8, 0xa4, 0x59, 0xb7 }; + +/* "Entropy" from buffer */ +static size_t test_offset; +static int hmac_drbg_self_test_entropy( void *data, + unsigned char *buf, size_t len ) +{ + const unsigned char *p = data; + memcpy( buf, p + test_offset, len ); + test_offset += len; + return( 0 ); +} + +#define CHK( c ) if( (c) != 0 ) \ + { \ + if( verbose != 0 ) \ + mbedtls_printf( "failed\n" ); \ + return( 1 ); \ + } + +/* + * Checkup routine for HMAC_DRBG with SHA-1 + */ +int mbedtls_hmac_drbg_self_test( int verbose ) +{ + mbedtls_hmac_drbg_context ctx; + unsigned char buf[OUTPUT_LEN]; + const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type( MBEDTLS_MD_SHA1 ); + + mbedtls_hmac_drbg_init( &ctx ); + + /* + * PR = True + */ + if( verbose != 0 ) + mbedtls_printf( " HMAC_DRBG (PR = True) : " ); + + test_offset = 0; + CHK( mbedtls_hmac_drbg_seed( &ctx, md_info, + hmac_drbg_self_test_entropy, (void *) entropy_pr, + NULL, 0 ) ); + mbedtls_hmac_drbg_set_prediction_resistance( &ctx, MBEDTLS_HMAC_DRBG_PR_ON ); + CHK( mbedtls_hmac_drbg_random( &ctx, buf, OUTPUT_LEN ) ); + CHK( mbedtls_hmac_drbg_random( &ctx, buf, OUTPUT_LEN ) ); + CHK( memcmp( buf, result_pr, OUTPUT_LEN ) ); + mbedtls_hmac_drbg_free( &ctx ); + + mbedtls_hmac_drbg_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + /* + * PR = False + */ + if( verbose != 0 ) + mbedtls_printf( " HMAC_DRBG (PR = False) : " ); + + mbedtls_hmac_drbg_init( &ctx ); + + test_offset = 0; + CHK( mbedtls_hmac_drbg_seed( &ctx, md_info, + hmac_drbg_self_test_entropy, (void *) entropy_nopr, + NULL, 0 ) ); + CHK( mbedtls_hmac_drbg_reseed( &ctx, NULL, 0 ) ); + CHK( mbedtls_hmac_drbg_random( &ctx, buf, OUTPUT_LEN ) ); + CHK( mbedtls_hmac_drbg_random( &ctx, buf, OUTPUT_LEN ) ); + CHK( memcmp( buf, result_nopr, OUTPUT_LEN ) ); + mbedtls_hmac_drbg_free( &ctx ); + + mbedtls_hmac_drbg_free( &ctx ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_HMAC_DRBG_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md.c new file mode 100644 index 0000000..9c2ab6f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md.c @@ -0,0 +1,471 @@ +/** + * \file mbedtls_md.c + * + * \brief Generic message digest wrapper for mbed TLS + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_MD_C) + +#include "mbedtls/md.h" +#include "mbedtls/md_internal.h" + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#include + +#if defined(MBEDTLS_FS_IO) +#include +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Reminder: update profiles in x509_crt.c when adding a new hash! + */ +static const int supported_digests[] ICACHE_RODATA_ATTR = { + +#if defined(MBEDTLS_SHA512_C) + MBEDTLS_MD_SHA512, + MBEDTLS_MD_SHA384, +#endif + +#if defined(MBEDTLS_SHA256_C) + MBEDTLS_MD_SHA256, + MBEDTLS_MD_SHA224, +#endif + +#if defined(MBEDTLS_SHA1_C) + MBEDTLS_MD_SHA1, +#endif + +#if defined(MBEDTLS_RIPEMD160_C) + MBEDTLS_MD_RIPEMD160, +#endif + +#if defined(MBEDTLS_MD5_C) + MBEDTLS_MD_MD5, +#endif + +#if defined(MBEDTLS_MD4_C) + MBEDTLS_MD_MD4, +#endif + +#if defined(MBEDTLS_MD2_C) + MBEDTLS_MD_MD2, +#endif + + MBEDTLS_MD_NONE +}; + +const int *mbedtls_md_list( void ) +{ + return( supported_digests ); +} + +const mbedtls_md_info_t *mbedtls_md_info_from_string( const char *md_name ) +{ + if( NULL == md_name ) + return( NULL ); + + /* Get the appropriate digest information */ +#if defined(MBEDTLS_MD2_C) + if( !strcmp( "MD2", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_MD2 ); +#endif +#if defined(MBEDTLS_MD4_C) + if( !strcmp( "MD4", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_MD4 ); +#endif +#if defined(MBEDTLS_MD5_C) + if( !strcmp( "MD5", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_MD5 ); +#endif +#if defined(MBEDTLS_RIPEMD160_C) + if( !strcmp( "RIPEMD160", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_RIPEMD160 ); +#endif +#if defined(MBEDTLS_SHA1_C) + if( !strcmp( "SHA1", md_name ) || !strcmp( "SHA", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_SHA1 ); +#endif +#if defined(MBEDTLS_SHA256_C) + if( !strcmp( "SHA224", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_SHA224 ); + if( !strcmp( "SHA256", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_SHA256 ); +#endif +#if defined(MBEDTLS_SHA512_C) + if( !strcmp( "SHA384", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_SHA384 ); + if( !strcmp( "SHA512", md_name ) ) + return mbedtls_md_info_from_type( MBEDTLS_MD_SHA512 ); +#endif + return( NULL ); +} + +const mbedtls_md_info_t *mbedtls_md_info_from_type( mbedtls_md_type_t md_type ) +{ + switch( md_type ) + { +#if defined(MBEDTLS_MD2_C) + case MBEDTLS_MD_MD2: + return( &mbedtls_md2_info ); +#endif +#if defined(MBEDTLS_MD4_C) + case MBEDTLS_MD_MD4: + return( &mbedtls_md4_info ); +#endif +#if defined(MBEDTLS_MD5_C) + case MBEDTLS_MD_MD5: + return( &mbedtls_md5_info ); +#endif +#if defined(MBEDTLS_RIPEMD160_C) + case MBEDTLS_MD_RIPEMD160: + return( &mbedtls_ripemd160_info ); +#endif +#if defined(MBEDTLS_SHA1_C) + case MBEDTLS_MD_SHA1: + return( &mbedtls_sha1_info ); +#endif +#if defined(MBEDTLS_SHA256_C) + case MBEDTLS_MD_SHA224: + return( &mbedtls_sha224_info ); + case MBEDTLS_MD_SHA256: + return( &mbedtls_sha256_info ); +#endif +#if defined(MBEDTLS_SHA512_C) + case MBEDTLS_MD_SHA384: + return( &mbedtls_sha384_info ); + case MBEDTLS_MD_SHA512: + return( &mbedtls_sha512_info ); +#endif + default: + return( NULL ); + } +} + +void mbedtls_md_init( mbedtls_md_context_t *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_md_context_t ) ); +} + +void mbedtls_md_free( mbedtls_md_context_t *ctx ) +{ + if( ctx == NULL || ctx->md_info == NULL ) + return; + + if( ctx->md_ctx != NULL ) + ctx->md_info->ctx_free_func( ctx->md_ctx ); + + if( ctx->hmac_ctx != NULL ) + { + mbedtls_zeroize( ctx->hmac_ctx, 2 * ctx->md_info->block_size ); + mbedtls_free( ctx->hmac_ctx ); + } + + mbedtls_zeroize( ctx, sizeof( mbedtls_md_context_t ) ); +} + +int mbedtls_md_clone( mbedtls_md_context_t *dst, + const mbedtls_md_context_t *src ) +{ + if( dst == NULL || dst->md_info == NULL || + src == NULL || src->md_info == NULL || + dst->md_info != src->md_info ) + { + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + } + + dst->md_info->clone_func( dst->md_ctx, src->md_ctx ); + + return( 0 ); +} + +#if ! defined(MBEDTLS_DEPRECATED_REMOVED) +int mbedtls_md_init_ctx( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info ) +{ + return mbedtls_md_setup( ctx, md_info, 1 ); +} +#endif + +int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac ) +{ + if( md_info == NULL || ctx == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + if( ( ctx->md_ctx = md_info->ctx_alloc_func() ) == NULL ) + return( MBEDTLS_ERR_MD_ALLOC_FAILED ); + + if( hmac != 0 ) + { + ctx->hmac_ctx = mbedtls_calloc( 2, md_info->block_size ); + if( ctx->hmac_ctx == NULL ) + { + md_info->ctx_free_func( ctx->md_ctx ); + return( MBEDTLS_ERR_MD_ALLOC_FAILED ); + } + } + + ctx->md_info = md_info; + + return( 0 ); +} + +int mbedtls_md_starts( mbedtls_md_context_t *ctx ) +{ + if( ctx == NULL || ctx->md_info == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + ctx->md_info->starts_func( ctx->md_ctx ); + + return( 0 ); +} + +int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen ) +{ + if( ctx == NULL || ctx->md_info == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + ctx->md_info->update_func( ctx->md_ctx, input, ilen ); + + return( 0 ); +} + +int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output ) +{ + if( ctx == NULL || ctx->md_info == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + ctx->md_info->finish_func( ctx->md_ctx, output ); + + return( 0 ); +} + +int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen, + unsigned char *output ) +{ + if( md_info == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + md_info->digest_func( input, ilen, output ); + + return( 0 ); +} + +#if defined(MBEDTLS_FS_IO) +int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path, unsigned char *output ) +{ + int ret; + FILE *f; + size_t n; + mbedtls_md_context_t ctx; + unsigned char buf[1024]; + + if( md_info == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + if( ( f = fopen( path, "rb" ) ) == NULL ) + return( MBEDTLS_ERR_MD_FILE_IO_ERROR ); + + mbedtls_md_init( &ctx ); + + if( ( ret = mbedtls_md_setup( &ctx, md_info, 0 ) ) != 0 ) + goto cleanup; + + md_info->starts_func( ctx.md_ctx ); + + while( ( n = fread( buf, 1, sizeof( buf ), f ) ) > 0 ) + md_info->update_func( ctx.md_ctx, buf, n ); + + if( ferror( f ) != 0 ) + { + ret = MBEDTLS_ERR_MD_FILE_IO_ERROR; + goto cleanup; + } + + md_info->finish_func( ctx.md_ctx, output ); + +cleanup: + fclose( f ); + mbedtls_md_free( &ctx ); + + return( ret ); +} +#endif /* MBEDTLS_FS_IO */ + +int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key, size_t keylen ) +{ + unsigned char sum[MBEDTLS_MD_MAX_SIZE]; + unsigned char *ipad, *opad; + size_t i; + + if( ctx == NULL || ctx->md_info == NULL || ctx->hmac_ctx == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + if( keylen > (size_t) ctx->md_info->block_size ) + { + ctx->md_info->starts_func( ctx->md_ctx ); + ctx->md_info->update_func( ctx->md_ctx, key, keylen ); + ctx->md_info->finish_func( ctx->md_ctx, sum ); + + keylen = ctx->md_info->size; + key = sum; + } + + ipad = (unsigned char *) ctx->hmac_ctx; + opad = (unsigned char *) ctx->hmac_ctx + ctx->md_info->block_size; + + memset( ipad, 0x36, ctx->md_info->block_size ); + memset( opad, 0x5C, ctx->md_info->block_size ); + + for( i = 0; i < keylen; i++ ) + { + ipad[i] = (unsigned char)( ipad[i] ^ key[i] ); + opad[i] = (unsigned char)( opad[i] ^ key[i] ); + } + + mbedtls_zeroize( sum, sizeof( sum ) ); + + ctx->md_info->starts_func( ctx->md_ctx ); + ctx->md_info->update_func( ctx->md_ctx, ipad, ctx->md_info->block_size ); + + return( 0 ); +} + +int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen ) +{ + if( ctx == NULL || ctx->md_info == NULL || ctx->hmac_ctx == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + ctx->md_info->update_func( ctx->md_ctx, input, ilen ); + + return( 0 ); +} + +int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output ) +{ + unsigned char tmp[MBEDTLS_MD_MAX_SIZE]; + unsigned char *opad; + + if( ctx == NULL || ctx->md_info == NULL || ctx->hmac_ctx == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + opad = (unsigned char *) ctx->hmac_ctx + ctx->md_info->block_size; + + ctx->md_info->finish_func( ctx->md_ctx, tmp ); + ctx->md_info->starts_func( ctx->md_ctx ); + ctx->md_info->update_func( ctx->md_ctx, opad, ctx->md_info->block_size ); + ctx->md_info->update_func( ctx->md_ctx, tmp, ctx->md_info->size ); + ctx->md_info->finish_func( ctx->md_ctx, output ); + + return( 0 ); +} + +int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx ) +{ + unsigned char *ipad; + + if( ctx == NULL || ctx->md_info == NULL || ctx->hmac_ctx == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + ipad = (unsigned char *) ctx->hmac_ctx; + + ctx->md_info->starts_func( ctx->md_ctx ); + ctx->md_info->update_func( ctx->md_ctx, ipad, ctx->md_info->block_size ); + + return( 0 ); +} + +int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen, + const unsigned char *input, size_t ilen, + unsigned char *output ) +{ + mbedtls_md_context_t ctx; + int ret; + + if( md_info == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + mbedtls_md_init( &ctx ); + + if( ( ret = mbedtls_md_setup( &ctx, md_info, 1 ) ) != 0 ) + return( ret ); + + mbedtls_md_hmac_starts( &ctx, key, keylen ); + mbedtls_md_hmac_update( &ctx, input, ilen ); + mbedtls_md_hmac_finish( &ctx, output ); + + mbedtls_md_free( &ctx ); + + return( 0 ); +} + +int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data ) +{ + if( ctx == NULL || ctx->md_info == NULL ) + return( MBEDTLS_ERR_MD_BAD_INPUT_DATA ); + + ctx->md_info->process_func( ctx->md_ctx, data ); + + return( 0 ); +} + +int mbedtls_md_get_size( const mbedtls_md_info_t *md_info ) +{ + if( md_info == NULL ) + return( 0 ); + + return md_info->size; +} + +mbedtls_md_type_t mbedtls_md_get_type( const mbedtls_md_info_t *md_info ) +{ + if( md_info == NULL ) + return( MBEDTLS_MD_NONE ); + + return md_info->type; +} + +const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info ) +{ + if( md_info == NULL ) + return( NULL ); + + return md_info->name; +} + +#endif /* MBEDTLS_MD_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md2.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md2.c new file mode 100644 index 0000000..8976701 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md2.c @@ -0,0 +1,288 @@ +/* + * RFC 1115/1319 compliant MD2 implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The MD2 algorithm was designed by Ron Rivest in 1989. + * + * http://www.ietf.org/rfc/rfc1115.txt + * http://www.ietf.org/rfc/rfc1319.txt + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_MD2_C) + +#include "mbedtls/md2.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_MD2_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +static const unsigned char PI_SUBST[256] = +{ + 0x29, 0x2E, 0x43, 0xC9, 0xA2, 0xD8, 0x7C, 0x01, 0x3D, 0x36, + 0x54, 0xA1, 0xEC, 0xF0, 0x06, 0x13, 0x62, 0xA7, 0x05, 0xF3, + 0xC0, 0xC7, 0x73, 0x8C, 0x98, 0x93, 0x2B, 0xD9, 0xBC, 0x4C, + 0x82, 0xCA, 0x1E, 0x9B, 0x57, 0x3C, 0xFD, 0xD4, 0xE0, 0x16, + 0x67, 0x42, 0x6F, 0x18, 0x8A, 0x17, 0xE5, 0x12, 0xBE, 0x4E, + 0xC4, 0xD6, 0xDA, 0x9E, 0xDE, 0x49, 0xA0, 0xFB, 0xF5, 0x8E, + 0xBB, 0x2F, 0xEE, 0x7A, 0xA9, 0x68, 0x79, 0x91, 0x15, 0xB2, + 0x07, 0x3F, 0x94, 0xC2, 0x10, 0x89, 0x0B, 0x22, 0x5F, 0x21, + 0x80, 0x7F, 0x5D, 0x9A, 0x5A, 0x90, 0x32, 0x27, 0x35, 0x3E, + 0xCC, 0xE7, 0xBF, 0xF7, 0x97, 0x03, 0xFF, 0x19, 0x30, 0xB3, + 0x48, 0xA5, 0xB5, 0xD1, 0xD7, 0x5E, 0x92, 0x2A, 0xAC, 0x56, + 0xAA, 0xC6, 0x4F, 0xB8, 0x38, 0xD2, 0x96, 0xA4, 0x7D, 0xB6, + 0x76, 0xFC, 0x6B, 0xE2, 0x9C, 0x74, 0x04, 0xF1, 0x45, 0x9D, + 0x70, 0x59, 0x64, 0x71, 0x87, 0x20, 0x86, 0x5B, 0xCF, 0x65, + 0xE6, 0x2D, 0xA8, 0x02, 0x1B, 0x60, 0x25, 0xAD, 0xAE, 0xB0, + 0xB9, 0xF6, 0x1C, 0x46, 0x61, 0x69, 0x34, 0x40, 0x7E, 0x0F, + 0x55, 0x47, 0xA3, 0x23, 0xDD, 0x51, 0xAF, 0x3A, 0xC3, 0x5C, + 0xF9, 0xCE, 0xBA, 0xC5, 0xEA, 0x26, 0x2C, 0x53, 0x0D, 0x6E, + 0x85, 0x28, 0x84, 0x09, 0xD3, 0xDF, 0xCD, 0xF4, 0x41, 0x81, + 0x4D, 0x52, 0x6A, 0xDC, 0x37, 0xC8, 0x6C, 0xC1, 0xAB, 0xFA, + 0x24, 0xE1, 0x7B, 0x08, 0x0C, 0xBD, 0xB1, 0x4A, 0x78, 0x88, + 0x95, 0x8B, 0xE3, 0x63, 0xE8, 0x6D, 0xE9, 0xCB, 0xD5, 0xFE, + 0x3B, 0x00, 0x1D, 0x39, 0xF2, 0xEF, 0xB7, 0x0E, 0x66, 0x58, + 0xD0, 0xE4, 0xA6, 0x77, 0x72, 0xF8, 0xEB, 0x75, 0x4B, 0x0A, + 0x31, 0x44, 0x50, 0xB4, 0x8F, 0xED, 0x1F, 0x1A, 0xDB, 0x99, + 0x8D, 0x33, 0x9F, 0x11, 0x83, 0x14 +}; + +void mbedtls_md2_init( mbedtls_md2_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_md2_context ) ); +} + +void mbedtls_md2_free( mbedtls_md2_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_md2_context ) ); +} + +void mbedtls_md2_clone( mbedtls_md2_context *dst, + const mbedtls_md2_context *src ) +{ + *dst = *src; +} + +/* + * MD2 context setup + */ +void mbedtls_md2_starts( mbedtls_md2_context *ctx ) +{ + memset( ctx->cksum, 0, 16 ); + memset( ctx->state, 0, 46 ); + memset( ctx->buffer, 0, 16 ); + ctx->left = 0; +} + +#if !defined(MBEDTLS_MD2_PROCESS_ALT) +void mbedtls_md2_process( mbedtls_md2_context *ctx ) +{ + int i, j; + unsigned char t = 0; + + for( i = 0; i < 16; i++ ) + { + ctx->state[i + 16] = ctx->buffer[i]; + ctx->state[i + 32] = + (unsigned char)( ctx->buffer[i] ^ ctx->state[i]); + } + + for( i = 0; i < 18; i++ ) + { + for( j = 0; j < 48; j++ ) + { + ctx->state[j] = (unsigned char) + ( ctx->state[j] ^ PI_SUBST[t] ); + t = ctx->state[j]; + } + + t = (unsigned char)( t + i ); + } + + t = ctx->cksum[15]; + + for( i = 0; i < 16; i++ ) + { + ctx->cksum[i] = (unsigned char) + ( ctx->cksum[i] ^ PI_SUBST[ctx->buffer[i] ^ t] ); + t = ctx->cksum[i]; + } +} +#endif /* !MBEDTLS_MD2_PROCESS_ALT */ + +/* + * MD2 process buffer + */ +void mbedtls_md2_update( mbedtls_md2_context *ctx, const unsigned char *input, size_t ilen ) +{ + size_t fill; + + while( ilen > 0 ) + { + if( ctx->left + ilen > 16 ) + fill = 16 - ctx->left; + else + fill = ilen; + + memcpy( ctx->buffer + ctx->left, input, fill ); + + ctx->left += fill; + input += fill; + ilen -= fill; + + if( ctx->left == 16 ) + { + ctx->left = 0; + mbedtls_md2_process( ctx ); + } + } +} + +/* + * MD2 final digest + */ +void mbedtls_md2_finish( mbedtls_md2_context *ctx, unsigned char output[16] ) +{ + size_t i; + unsigned char x; + + x = (unsigned char)( 16 - ctx->left ); + + for( i = ctx->left; i < 16; i++ ) + ctx->buffer[i] = x; + + mbedtls_md2_process( ctx ); + + memcpy( ctx->buffer, ctx->cksum, 16 ); + mbedtls_md2_process( ctx ); + + memcpy( output, ctx->state, 16 ); +} + +#endif /* !MBEDTLS_MD2_ALT */ + +/* + * output = MD2( input buffer ) + */ +void mbedtls_md2( const unsigned char *input, size_t ilen, unsigned char output[16] ) +{ + mbedtls_md2_context ctx; + + mbedtls_md2_init( &ctx ); + mbedtls_md2_starts( &ctx ); + mbedtls_md2_update( &ctx, input, ilen ); + mbedtls_md2_finish( &ctx, output ); + mbedtls_md2_free( &ctx ); +} + +#if defined(MBEDTLS_SELF_TEST) + +/* + * RFC 1319 test vectors + */ +static const char md2_test_str[7][81] = +{ + { "" }, + { "a" }, + { "abc" }, + { "message digest" }, + { "abcdefghijklmnopqrstuvwxyz" }, + { "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789" }, + { "12345678901234567890123456789012345678901234567890123456789012" \ + "345678901234567890" } +}; + +static const unsigned char md2_test_sum[7][16] = +{ + { 0x83, 0x50, 0xE5, 0xA3, 0xE2, 0x4C, 0x15, 0x3D, + 0xF2, 0x27, 0x5C, 0x9F, 0x80, 0x69, 0x27, 0x73 }, + { 0x32, 0xEC, 0x01, 0xEC, 0x4A, 0x6D, 0xAC, 0x72, + 0xC0, 0xAB, 0x96, 0xFB, 0x34, 0xC0, 0xB5, 0xD1 }, + { 0xDA, 0x85, 0x3B, 0x0D, 0x3F, 0x88, 0xD9, 0x9B, + 0x30, 0x28, 0x3A, 0x69, 0xE6, 0xDE, 0xD6, 0xBB }, + { 0xAB, 0x4F, 0x49, 0x6B, 0xFB, 0x2A, 0x53, 0x0B, + 0x21, 0x9F, 0xF3, 0x30, 0x31, 0xFE, 0x06, 0xB0 }, + { 0x4E, 0x8D, 0xDF, 0xF3, 0x65, 0x02, 0x92, 0xAB, + 0x5A, 0x41, 0x08, 0xC3, 0xAA, 0x47, 0x94, 0x0B }, + { 0xDA, 0x33, 0xDE, 0xF2, 0xA4, 0x2D, 0xF1, 0x39, + 0x75, 0x35, 0x28, 0x46, 0xC3, 0x03, 0x38, 0xCD }, + { 0xD5, 0x97, 0x6F, 0x79, 0xD8, 0x3D, 0x3A, 0x0D, + 0xC9, 0x80, 0x6C, 0x3C, 0x66, 0xF3, 0xEF, 0xD8 } +}; + +/* + * Checkup routine + */ +int mbedtls_md2_self_test( int verbose ) +{ + int i; + unsigned char md2sum[16]; + + for( i = 0; i < 7; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " MD2 test #%d: ", i + 1 ); + + mbedtls_md2( (unsigned char *) md2_test_str[i], + strlen( md2_test_str[i] ), md2sum ); + + if( memcmp( md2sum, md2_test_sum[i], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_MD2_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md4.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md4.c new file mode 100644 index 0000000..11a77e3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md4.c @@ -0,0 +1,384 @@ +/* + * RFC 1186/1320 compliant MD4 implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The MD4 algorithm was designed by Ron Rivest in 1990. + * + * http://www.ietf.org/rfc/rfc1186.txt + * http://www.ietf.org/rfc/rfc1320.txt + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_MD4_C) + +#include "mbedtls/md4.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_MD4_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (little endian) + */ +#ifndef GET_UINT32_LE +#define GET_UINT32_LE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] ) \ + | ( (uint32_t) (b)[(i) + 1] << 8 ) \ + | ( (uint32_t) (b)[(i) + 2] << 16 ) \ + | ( (uint32_t) (b)[(i) + 3] << 24 ); \ +} +#endif + +#ifndef PUT_UINT32_LE +#define PUT_UINT32_LE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( ( (n) ) & 0xFF ); \ + (b)[(i) + 1] = (unsigned char) ( ( (n) >> 8 ) & 0xFF ); \ + (b)[(i) + 2] = (unsigned char) ( ( (n) >> 16 ) & 0xFF ); \ + (b)[(i) + 3] = (unsigned char) ( ( (n) >> 24 ) & 0xFF ); \ +} +#endif + +void mbedtls_md4_init( mbedtls_md4_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_md4_context ) ); +} + +void mbedtls_md4_free( mbedtls_md4_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_md4_context ) ); +} + +void mbedtls_md4_clone( mbedtls_md4_context *dst, + const mbedtls_md4_context *src ) +{ + *dst = *src; +} + +/* + * MD4 context setup + */ +void mbedtls_md4_starts( mbedtls_md4_context *ctx ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + ctx->state[0] = 0x67452301; + ctx->state[1] = 0xEFCDAB89; + ctx->state[2] = 0x98BADCFE; + ctx->state[3] = 0x10325476; +} + +#if !defined(MBEDTLS_MD4_PROCESS_ALT) +void mbedtls_md4_process( mbedtls_md4_context *ctx, const unsigned char data[64] ) +{ + uint32_t X[16], A, B, C, D; + + GET_UINT32_LE( X[ 0], data, 0 ); + GET_UINT32_LE( X[ 1], data, 4 ); + GET_UINT32_LE( X[ 2], data, 8 ); + GET_UINT32_LE( X[ 3], data, 12 ); + GET_UINT32_LE( X[ 4], data, 16 ); + GET_UINT32_LE( X[ 5], data, 20 ); + GET_UINT32_LE( X[ 6], data, 24 ); + GET_UINT32_LE( X[ 7], data, 28 ); + GET_UINT32_LE( X[ 8], data, 32 ); + GET_UINT32_LE( X[ 9], data, 36 ); + GET_UINT32_LE( X[10], data, 40 ); + GET_UINT32_LE( X[11], data, 44 ); + GET_UINT32_LE( X[12], data, 48 ); + GET_UINT32_LE( X[13], data, 52 ); + GET_UINT32_LE( X[14], data, 56 ); + GET_UINT32_LE( X[15], data, 60 ); + +#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n))) + + A = ctx->state[0]; + B = ctx->state[1]; + C = ctx->state[2]; + D = ctx->state[3]; + +#define F(x, y, z) ((x & y) | ((~x) & z)) +#define P(a,b,c,d,x,s) { a += F(b,c,d) + x; a = S(a,s); } + + P( A, B, C, D, X[ 0], 3 ); + P( D, A, B, C, X[ 1], 7 ); + P( C, D, A, B, X[ 2], 11 ); + P( B, C, D, A, X[ 3], 19 ); + P( A, B, C, D, X[ 4], 3 ); + P( D, A, B, C, X[ 5], 7 ); + P( C, D, A, B, X[ 6], 11 ); + P( B, C, D, A, X[ 7], 19 ); + P( A, B, C, D, X[ 8], 3 ); + P( D, A, B, C, X[ 9], 7 ); + P( C, D, A, B, X[10], 11 ); + P( B, C, D, A, X[11], 19 ); + P( A, B, C, D, X[12], 3 ); + P( D, A, B, C, X[13], 7 ); + P( C, D, A, B, X[14], 11 ); + P( B, C, D, A, X[15], 19 ); + +#undef P +#undef F + +#define F(x,y,z) ((x & y) | (x & z) | (y & z)) +#define P(a,b,c,d,x,s) { a += F(b,c,d) + x + 0x5A827999; a = S(a,s); } + + P( A, B, C, D, X[ 0], 3 ); + P( D, A, B, C, X[ 4], 5 ); + P( C, D, A, B, X[ 8], 9 ); + P( B, C, D, A, X[12], 13 ); + P( A, B, C, D, X[ 1], 3 ); + P( D, A, B, C, X[ 5], 5 ); + P( C, D, A, B, X[ 9], 9 ); + P( B, C, D, A, X[13], 13 ); + P( A, B, C, D, X[ 2], 3 ); + P( D, A, B, C, X[ 6], 5 ); + P( C, D, A, B, X[10], 9 ); + P( B, C, D, A, X[14], 13 ); + P( A, B, C, D, X[ 3], 3 ); + P( D, A, B, C, X[ 7], 5 ); + P( C, D, A, B, X[11], 9 ); + P( B, C, D, A, X[15], 13 ); + +#undef P +#undef F + +#define F(x,y,z) (x ^ y ^ z) +#define P(a,b,c,d,x,s) { a += F(b,c,d) + x + 0x6ED9EBA1; a = S(a,s); } + + P( A, B, C, D, X[ 0], 3 ); + P( D, A, B, C, X[ 8], 9 ); + P( C, D, A, B, X[ 4], 11 ); + P( B, C, D, A, X[12], 15 ); + P( A, B, C, D, X[ 2], 3 ); + P( D, A, B, C, X[10], 9 ); + P( C, D, A, B, X[ 6], 11 ); + P( B, C, D, A, X[14], 15 ); + P( A, B, C, D, X[ 1], 3 ); + P( D, A, B, C, X[ 9], 9 ); + P( C, D, A, B, X[ 5], 11 ); + P( B, C, D, A, X[13], 15 ); + P( A, B, C, D, X[ 3], 3 ); + P( D, A, B, C, X[11], 9 ); + P( C, D, A, B, X[ 7], 11 ); + P( B, C, D, A, X[15], 15 ); + +#undef F +#undef P + + ctx->state[0] += A; + ctx->state[1] += B; + ctx->state[2] += C; + ctx->state[3] += D; +} +#endif /* !MBEDTLS_MD4_PROCESS_ALT */ + +/* + * MD4 process buffer + */ +void mbedtls_md4_update( mbedtls_md4_context *ctx, const unsigned char *input, size_t ilen ) +{ + size_t fill; + uint32_t left; + + if( ilen == 0 ) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += (uint32_t) ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if( ctx->total[0] < (uint32_t) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), + (void *) input, fill ); + mbedtls_md4_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 64 ) + { + mbedtls_md4_process( ctx, input ); + input += 64; + ilen -= 64; + } + + if( ilen > 0 ) + { + memcpy( (void *) (ctx->buffer + left), + (void *) input, ilen ); + } +} + +static const unsigned char md4_padding[64] = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * MD4 final digest + */ +void mbedtls_md4_finish( mbedtls_md4_context *ctx, unsigned char output[16] ) +{ + uint32_t last, padn; + uint32_t high, low; + unsigned char msglen[8]; + + high = ( ctx->total[0] >> 29 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_UINT32_LE( low, msglen, 0 ); + PUT_UINT32_LE( high, msglen, 4 ); + + last = ctx->total[0] & 0x3F; + padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + + mbedtls_md4_update( ctx, (unsigned char *) md4_padding, padn ); + mbedtls_md4_update( ctx, msglen, 8 ); + + PUT_UINT32_LE( ctx->state[0], output, 0 ); + PUT_UINT32_LE( ctx->state[1], output, 4 ); + PUT_UINT32_LE( ctx->state[2], output, 8 ); + PUT_UINT32_LE( ctx->state[3], output, 12 ); +} + +#endif /* !MBEDTLS_MD4_ALT */ + +/* + * output = MD4( input buffer ) + */ +void mbedtls_md4( const unsigned char *input, size_t ilen, unsigned char output[16] ) +{ + mbedtls_md4_context ctx; + + mbedtls_md4_init( &ctx ); + mbedtls_md4_starts( &ctx ); + mbedtls_md4_update( &ctx, input, ilen ); + mbedtls_md4_finish( &ctx, output ); + mbedtls_md4_free( &ctx ); +} + +#if defined(MBEDTLS_SELF_TEST) + +/* + * RFC 1320 test vectors + */ +static const char md4_test_str[7][81] = +{ + { "" }, + { "a" }, + { "abc" }, + { "message digest" }, + { "abcdefghijklmnopqrstuvwxyz" }, + { "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789" }, + { "12345678901234567890123456789012345678901234567890123456789012" \ + "345678901234567890" } +}; + +static const unsigned char md4_test_sum[7][16] = +{ + { 0x31, 0xD6, 0xCF, 0xE0, 0xD1, 0x6A, 0xE9, 0x31, + 0xB7, 0x3C, 0x59, 0xD7, 0xE0, 0xC0, 0x89, 0xC0 }, + { 0xBD, 0xE5, 0x2C, 0xB3, 0x1D, 0xE3, 0x3E, 0x46, + 0x24, 0x5E, 0x05, 0xFB, 0xDB, 0xD6, 0xFB, 0x24 }, + { 0xA4, 0x48, 0x01, 0x7A, 0xAF, 0x21, 0xD8, 0x52, + 0x5F, 0xC1, 0x0A, 0xE8, 0x7A, 0xA6, 0x72, 0x9D }, + { 0xD9, 0x13, 0x0A, 0x81, 0x64, 0x54, 0x9F, 0xE8, + 0x18, 0x87, 0x48, 0x06, 0xE1, 0xC7, 0x01, 0x4B }, + { 0xD7, 0x9E, 0x1C, 0x30, 0x8A, 0xA5, 0xBB, 0xCD, + 0xEE, 0xA8, 0xED, 0x63, 0xDF, 0x41, 0x2D, 0xA9 }, + { 0x04, 0x3F, 0x85, 0x82, 0xF2, 0x41, 0xDB, 0x35, + 0x1C, 0xE6, 0x27, 0xE1, 0x53, 0xE7, 0xF0, 0xE4 }, + { 0xE3, 0x3B, 0x4D, 0xDC, 0x9C, 0x38, 0xF2, 0x19, + 0x9C, 0x3E, 0x7B, 0x16, 0x4F, 0xCC, 0x05, 0x36 } +}; + +/* + * Checkup routine + */ +int mbedtls_md4_self_test( int verbose ) +{ + int i; + unsigned char md4sum[16]; + + for( i = 0; i < 7; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " MD4 test #%d: ", i + 1 ); + + mbedtls_md4( (unsigned char *) md4_test_str[i], + strlen( md4_test_str[i] ), md4sum ); + + if( memcmp( md4sum, md4_test_sum[i], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_MD4_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md5.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md5.c new file mode 100644 index 0000000..c36192f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md5.c @@ -0,0 +1,407 @@ +/* + * RFC 1321 compliant MD5 implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The MD5 algorithm was designed by Ron Rivest in 1991. + * + * http://www.ietf.org/rfc/rfc1321.txt + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_MD5_C) + +#include "mbedtls/md5.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_MD5_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (little endian) + */ +#ifndef GET_UINT32_LE +#define GET_UINT32_LE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] ) \ + | ( (uint32_t) (b)[(i) + 1] << 8 ) \ + | ( (uint32_t) (b)[(i) + 2] << 16 ) \ + | ( (uint32_t) (b)[(i) + 3] << 24 ); \ +} +#endif + +#ifndef PUT_UINT32_LE +#define PUT_UINT32_LE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( ( (n) ) & 0xFF ); \ + (b)[(i) + 1] = (unsigned char) ( ( (n) >> 8 ) & 0xFF ); \ + (b)[(i) + 2] = (unsigned char) ( ( (n) >> 16 ) & 0xFF ); \ + (b)[(i) + 3] = (unsigned char) ( ( (n) >> 24 ) & 0xFF ); \ +} +#endif + +void mbedtls_md5_init( mbedtls_md5_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_md5_context ) ); +} + +void mbedtls_md5_free( mbedtls_md5_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_md5_context ) ); +} + +void mbedtls_md5_clone( mbedtls_md5_context *dst, + const mbedtls_md5_context *src ) +{ + *dst = *src; +} + +/* + * MD5 context setup + */ +void mbedtls_md5_starts( mbedtls_md5_context *ctx ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + ctx->state[0] = 0x67452301; + ctx->state[1] = 0xEFCDAB89; + ctx->state[2] = 0x98BADCFE; + ctx->state[3] = 0x10325476; +} + +#if !defined(MBEDTLS_MD5_PROCESS_ALT) +void mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[64] ) +{ + uint32_t X[16], A, B, C, D; + + GET_UINT32_LE( X[ 0], data, 0 ); + GET_UINT32_LE( X[ 1], data, 4 ); + GET_UINT32_LE( X[ 2], data, 8 ); + GET_UINT32_LE( X[ 3], data, 12 ); + GET_UINT32_LE( X[ 4], data, 16 ); + GET_UINT32_LE( X[ 5], data, 20 ); + GET_UINT32_LE( X[ 6], data, 24 ); + GET_UINT32_LE( X[ 7], data, 28 ); + GET_UINT32_LE( X[ 8], data, 32 ); + GET_UINT32_LE( X[ 9], data, 36 ); + GET_UINT32_LE( X[10], data, 40 ); + GET_UINT32_LE( X[11], data, 44 ); + GET_UINT32_LE( X[12], data, 48 ); + GET_UINT32_LE( X[13], data, 52 ); + GET_UINT32_LE( X[14], data, 56 ); + GET_UINT32_LE( X[15], data, 60 ); + +#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n))) + +#define P(a,b,c,d,k,s,t) \ +{ \ + a += F(b,c,d) + X[k] + t; a = S(a,s) + b; \ +} + + A = ctx->state[0]; + B = ctx->state[1]; + C = ctx->state[2]; + D = ctx->state[3]; + +#define F(x,y,z) (z ^ (x & (y ^ z))) + + P( A, B, C, D, 0, 7, 0xD76AA478 ); + P( D, A, B, C, 1, 12, 0xE8C7B756 ); + P( C, D, A, B, 2, 17, 0x242070DB ); + P( B, C, D, A, 3, 22, 0xC1BDCEEE ); + P( A, B, C, D, 4, 7, 0xF57C0FAF ); + P( D, A, B, C, 5, 12, 0x4787C62A ); + P( C, D, A, B, 6, 17, 0xA8304613 ); + P( B, C, D, A, 7, 22, 0xFD469501 ); + P( A, B, C, D, 8, 7, 0x698098D8 ); + P( D, A, B, C, 9, 12, 0x8B44F7AF ); + P( C, D, A, B, 10, 17, 0xFFFF5BB1 ); + P( B, C, D, A, 11, 22, 0x895CD7BE ); + P( A, B, C, D, 12, 7, 0x6B901122 ); + P( D, A, B, C, 13, 12, 0xFD987193 ); + P( C, D, A, B, 14, 17, 0xA679438E ); + P( B, C, D, A, 15, 22, 0x49B40821 ); + +#undef F + +#define F(x,y,z) (y ^ (z & (x ^ y))) + + P( A, B, C, D, 1, 5, 0xF61E2562 ); + P( D, A, B, C, 6, 9, 0xC040B340 ); + P( C, D, A, B, 11, 14, 0x265E5A51 ); + P( B, C, D, A, 0, 20, 0xE9B6C7AA ); + P( A, B, C, D, 5, 5, 0xD62F105D ); + P( D, A, B, C, 10, 9, 0x02441453 ); + P( C, D, A, B, 15, 14, 0xD8A1E681 ); + P( B, C, D, A, 4, 20, 0xE7D3FBC8 ); + P( A, B, C, D, 9, 5, 0x21E1CDE6 ); + P( D, A, B, C, 14, 9, 0xC33707D6 ); + P( C, D, A, B, 3, 14, 0xF4D50D87 ); + P( B, C, D, A, 8, 20, 0x455A14ED ); + P( A, B, C, D, 13, 5, 0xA9E3E905 ); + P( D, A, B, C, 2, 9, 0xFCEFA3F8 ); + P( C, D, A, B, 7, 14, 0x676F02D9 ); + P( B, C, D, A, 12, 20, 0x8D2A4C8A ); + +#undef F + +#define F(x,y,z) (x ^ y ^ z) + + P( A, B, C, D, 5, 4, 0xFFFA3942 ); + P( D, A, B, C, 8, 11, 0x8771F681 ); + P( C, D, A, B, 11, 16, 0x6D9D6122 ); + P( B, C, D, A, 14, 23, 0xFDE5380C ); + P( A, B, C, D, 1, 4, 0xA4BEEA44 ); + P( D, A, B, C, 4, 11, 0x4BDECFA9 ); + P( C, D, A, B, 7, 16, 0xF6BB4B60 ); + P( B, C, D, A, 10, 23, 0xBEBFBC70 ); + P( A, B, C, D, 13, 4, 0x289B7EC6 ); + P( D, A, B, C, 0, 11, 0xEAA127FA ); + P( C, D, A, B, 3, 16, 0xD4EF3085 ); + P( B, C, D, A, 6, 23, 0x04881D05 ); + P( A, B, C, D, 9, 4, 0xD9D4D039 ); + P( D, A, B, C, 12, 11, 0xE6DB99E5 ); + P( C, D, A, B, 15, 16, 0x1FA27CF8 ); + P( B, C, D, A, 2, 23, 0xC4AC5665 ); + +#undef F + +#define F(x,y,z) (y ^ (x | ~z)) + + P( A, B, C, D, 0, 6, 0xF4292244 ); + P( D, A, B, C, 7, 10, 0x432AFF97 ); + P( C, D, A, B, 14, 15, 0xAB9423A7 ); + P( B, C, D, A, 5, 21, 0xFC93A039 ); + P( A, B, C, D, 12, 6, 0x655B59C3 ); + P( D, A, B, C, 3, 10, 0x8F0CCC92 ); + P( C, D, A, B, 10, 15, 0xFFEFF47D ); + P( B, C, D, A, 1, 21, 0x85845DD1 ); + P( A, B, C, D, 8, 6, 0x6FA87E4F ); + P( D, A, B, C, 15, 10, 0xFE2CE6E0 ); + P( C, D, A, B, 6, 15, 0xA3014314 ); + P( B, C, D, A, 13, 21, 0x4E0811A1 ); + P( A, B, C, D, 4, 6, 0xF7537E82 ); + P( D, A, B, C, 11, 10, 0xBD3AF235 ); + P( C, D, A, B, 2, 15, 0x2AD7D2BB ); + P( B, C, D, A, 9, 21, 0xEB86D391 ); + +#undef F + + ctx->state[0] += A; + ctx->state[1] += B; + ctx->state[2] += C; + ctx->state[3] += D; +} +#endif /* !MBEDTLS_MD5_PROCESS_ALT */ + +/* + * MD5 process buffer + */ +void mbedtls_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ) +{ + size_t fill; + uint32_t left; + + if( ilen == 0 ) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += (uint32_t) ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if( ctx->total[0] < (uint32_t) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), input, fill ); + mbedtls_md5_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 64 ) + { + mbedtls_md5_process( ctx, input ); + input += 64; + ilen -= 64; + } + + if( ilen > 0 ) + { + memcpy( (void *) (ctx->buffer + left), input, ilen ); + } +} + +static const unsigned char md5_padding[64] ICACHE_RODATA_ATTR = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * MD5 final digest + */ +void mbedtls_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] ) +{ + uint32_t last, padn; + uint32_t high, low; + unsigned char msglen[8]; + unsigned char md5_padding_local[64]; + + memcpy(md5_padding_local, md5_padding, 64); + + high = ( ctx->total[0] >> 29 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_UINT32_LE( low, msglen, 0 ); + PUT_UINT32_LE( high, msglen, 4 ); + + last = ctx->total[0] & 0x3F; + padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + + mbedtls_md5_update( ctx, md5_padding_local, padn ); + mbedtls_md5_update( ctx, msglen, 8 ); + + PUT_UINT32_LE( ctx->state[0], output, 0 ); + PUT_UINT32_LE( ctx->state[1], output, 4 ); + PUT_UINT32_LE( ctx->state[2], output, 8 ); + PUT_UINT32_LE( ctx->state[3], output, 12 ); +} + +#endif /* !MBEDTLS_MD5_ALT */ + +/* + * output = MD5( input buffer ) + */ +void mbedtls_md5( const unsigned char *input, size_t ilen, unsigned char output[16] ) +{ + mbedtls_md5_context ctx; + + mbedtls_md5_init( &ctx ); + mbedtls_md5_starts( &ctx ); + mbedtls_md5_update( &ctx, input, ilen ); + mbedtls_md5_finish( &ctx, output ); + mbedtls_md5_free( &ctx ); +} + +#if defined(MBEDTLS_SELF_TEST) +/* + * RFC 1321 test vectors + */ +static const unsigned char md5_test_buf[7][81] = +{ + { "" }, + { "a" }, + { "abc" }, + { "message digest" }, + { "abcdefghijklmnopqrstuvwxyz" }, + { "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789" }, + { "12345678901234567890123456789012345678901234567890123456789012" \ + "345678901234567890" } +}; + +static const int md5_test_buflen[7] = +{ + 0, 1, 3, 14, 26, 62, 80 +}; + +static const unsigned char md5_test_sum[7][16] = +{ + { 0xD4, 0x1D, 0x8C, 0xD9, 0x8F, 0x00, 0xB2, 0x04, + 0xE9, 0x80, 0x09, 0x98, 0xEC, 0xF8, 0x42, 0x7E }, + { 0x0C, 0xC1, 0x75, 0xB9, 0xC0, 0xF1, 0xB6, 0xA8, + 0x31, 0xC3, 0x99, 0xE2, 0x69, 0x77, 0x26, 0x61 }, + { 0x90, 0x01, 0x50, 0x98, 0x3C, 0xD2, 0x4F, 0xB0, + 0xD6, 0x96, 0x3F, 0x7D, 0x28, 0xE1, 0x7F, 0x72 }, + { 0xF9, 0x6B, 0x69, 0x7D, 0x7C, 0xB7, 0x93, 0x8D, + 0x52, 0x5A, 0x2F, 0x31, 0xAA, 0xF1, 0x61, 0xD0 }, + { 0xC3, 0xFC, 0xD3, 0xD7, 0x61, 0x92, 0xE4, 0x00, + 0x7D, 0xFB, 0x49, 0x6C, 0xCA, 0x67, 0xE1, 0x3B }, + { 0xD1, 0x74, 0xAB, 0x98, 0xD2, 0x77, 0xD9, 0xF5, + 0xA5, 0x61, 0x1C, 0x2C, 0x9F, 0x41, 0x9D, 0x9F }, + { 0x57, 0xED, 0xF4, 0xA2, 0x2B, 0xE3, 0xC9, 0x55, + 0xAC, 0x49, 0xDA, 0x2E, 0x21, 0x07, 0xB6, 0x7A } +}; + +/* + * Checkup routine + */ +int mbedtls_md5_self_test( int verbose ) +{ + int i; + unsigned char md5sum[16]; + + for( i = 0; i < 7; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " MD5 test #%d: ", i + 1 ); + + mbedtls_md5( md5_test_buf[i], md5_test_buflen[i], md5sum ); + + if( memcmp( md5sum, md5_test_sum[i], 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_MD5_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md_wrap.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md_wrap.c new file mode 100644 index 0000000..3d21159 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/md_wrap.c @@ -0,0 +1,575 @@ +/** + * \file md_wrap.c + * + * \brief Generic message digest wrapper for mbed TLS + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_MD_C) + +#include "mbedtls/md_internal.h" + +#if defined(MBEDTLS_MD2_C) +#include "mbedtls/md2.h" +#endif + +#if defined(MBEDTLS_MD4_C) +#include "mbedtls/md4.h" +#endif + +#if defined(MBEDTLS_MD5_C) +#include "mbedtls/md5.h" +#endif + +#if defined(MBEDTLS_RIPEMD160_C) +#include "mbedtls/ripemd160.h" +#endif + +#if defined(MBEDTLS_SHA1_C) +#include "mbedtls/sha1.h" +#endif + +#if defined(MBEDTLS_SHA256_C) +#include "mbedtls/sha256.h" +#endif + +#if defined(MBEDTLS_SHA512_C) +#include "mbedtls/sha512.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if defined(MBEDTLS_MD2_C) + +static void md2_starts_wrap( void *ctx ) +{ + mbedtls_md2_starts( (mbedtls_md2_context *) ctx ); +} + +static void md2_update_wrap( void *ctx, const unsigned char *input, + size_t ilen ) +{ + mbedtls_md2_update( (mbedtls_md2_context *) ctx, input, ilen ); +} + +static void md2_finish_wrap( void *ctx, unsigned char *output ) +{ + mbedtls_md2_finish( (mbedtls_md2_context *) ctx, output ); +} + +static void *md2_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_md2_context ) ); + + if( ctx != NULL ) + mbedtls_md2_init( (mbedtls_md2_context *) ctx ); + + return( ctx ); +} + +static void md2_ctx_free( void *ctx ) +{ + mbedtls_md2_free( (mbedtls_md2_context *) ctx ); + mbedtls_free( ctx ); +} + +static void md2_clone_wrap( void *dst, const void *src ) +{ + mbedtls_md2_clone( (mbedtls_md2_context *) dst, + (const mbedtls_md2_context *) src ); +} + +static void md2_process_wrap( void *ctx, const unsigned char *data ) +{ + ((void) data); + + mbedtls_md2_process( (mbedtls_md2_context *) ctx ); +} + +const mbedtls_md_info_t mbedtls_md2_info = { + MBEDTLS_MD_MD2, + "MD2", + 16, + 16, + md2_starts_wrap, + md2_update_wrap, + md2_finish_wrap, + mbedtls_md2, + md2_ctx_alloc, + md2_ctx_free, + md2_clone_wrap, + md2_process_wrap, +}; + +#endif /* MBEDTLS_MD2_C */ + +#if defined(MBEDTLS_MD4_C) + +static void md4_starts_wrap( void *ctx ) +{ + mbedtls_md4_starts( (mbedtls_md4_context *) ctx ); +} + +static void md4_update_wrap( void *ctx, const unsigned char *input, + size_t ilen ) +{ + mbedtls_md4_update( (mbedtls_md4_context *) ctx, input, ilen ); +} + +static void md4_finish_wrap( void *ctx, unsigned char *output ) +{ + mbedtls_md4_finish( (mbedtls_md4_context *) ctx, output ); +} + +static void *md4_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_md4_context ) ); + + if( ctx != NULL ) + mbedtls_md4_init( (mbedtls_md4_context *) ctx ); + + return( ctx ); +} + +static void md4_ctx_free( void *ctx ) +{ + mbedtls_md4_free( (mbedtls_md4_context *) ctx ); + mbedtls_free( ctx ); +} + +static void md4_clone_wrap( void *dst, const void *src ) +{ + mbedtls_md4_clone( (mbedtls_md4_context *) dst, + (const mbedtls_md4_context *) src ); +} + +static void md4_process_wrap( void *ctx, const unsigned char *data ) +{ + mbedtls_md4_process( (mbedtls_md4_context *) ctx, data ); +} + +const mbedtls_md_info_t mbedtls_md4_info = { + MBEDTLS_MD_MD4, + "MD4", + 16, + 64, + md4_starts_wrap, + md4_update_wrap, + md4_finish_wrap, + mbedtls_md4, + md4_ctx_alloc, + md4_ctx_free, + md4_clone_wrap, + md4_process_wrap, +}; + +#endif /* MBEDTLS_MD4_C */ + +#if defined(MBEDTLS_MD5_C) + +static void md5_starts_wrap( void *ctx ) +{ + mbedtls_md5_starts( (mbedtls_md5_context *) ctx ); +} + +static void md5_update_wrap( void *ctx, const unsigned char *input, + size_t ilen ) +{ + mbedtls_md5_update( (mbedtls_md5_context *) ctx, input, ilen ); +} + +static void md5_finish_wrap( void *ctx, unsigned char *output ) +{ + mbedtls_md5_finish( (mbedtls_md5_context *) ctx, output ); +} + +static void *md5_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_md5_context ) ); + + if( ctx != NULL ) + mbedtls_md5_init( (mbedtls_md5_context *) ctx ); + + return( ctx ); +} + +static void md5_ctx_free( void *ctx ) +{ + mbedtls_md5_free( (mbedtls_md5_context *) ctx ); + mbedtls_free( ctx ); +} + +static void md5_clone_wrap( void *dst, const void *src ) +{ + mbedtls_md5_clone( (mbedtls_md5_context *) dst, + (const mbedtls_md5_context *) src ); +} + +static void md5_process_wrap( void *ctx, const unsigned char *data ) +{ + mbedtls_md5_process( (mbedtls_md5_context *) ctx, data ); +} + +const mbedtls_md_info_t mbedtls_md5_info ICACHE_RODATA_ATTR = { + MBEDTLS_MD_MD5, + "MD5", + 16, + 64, + md5_starts_wrap, + md5_update_wrap, + md5_finish_wrap, + mbedtls_md5, + md5_ctx_alloc, + md5_ctx_free, + md5_clone_wrap, + md5_process_wrap, +}; + +#endif /* MBEDTLS_MD5_C */ + +#if defined(MBEDTLS_RIPEMD160_C) + +static void ripemd160_starts_wrap( void *ctx ) +{ + mbedtls_ripemd160_starts( (mbedtls_ripemd160_context *) ctx ); +} + +static void ripemd160_update_wrap( void *ctx, const unsigned char *input, + size_t ilen ) +{ + mbedtls_ripemd160_update( (mbedtls_ripemd160_context *) ctx, input, ilen ); +} + +static void ripemd160_finish_wrap( void *ctx, unsigned char *output ) +{ + mbedtls_ripemd160_finish( (mbedtls_ripemd160_context *) ctx, output ); +} + +static void *ripemd160_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_ripemd160_context ) ); + + if( ctx != NULL ) + mbedtls_ripemd160_init( (mbedtls_ripemd160_context *) ctx ); + + return( ctx ); +} + +static void ripemd160_ctx_free( void *ctx ) +{ + mbedtls_ripemd160_free( (mbedtls_ripemd160_context *) ctx ); + mbedtls_free( ctx ); +} + +static void ripemd160_clone_wrap( void *dst, const void *src ) +{ + mbedtls_ripemd160_clone( (mbedtls_ripemd160_context *) dst, + (const mbedtls_ripemd160_context *) src ); +} + +static void ripemd160_process_wrap( void *ctx, const unsigned char *data ) +{ + mbedtls_ripemd160_process( (mbedtls_ripemd160_context *) ctx, data ); +} + +const mbedtls_md_info_t mbedtls_ripemd160_info = { + MBEDTLS_MD_RIPEMD160, + "RIPEMD160", + 20, + 64, + ripemd160_starts_wrap, + ripemd160_update_wrap, + ripemd160_finish_wrap, + mbedtls_ripemd160, + ripemd160_ctx_alloc, + ripemd160_ctx_free, + ripemd160_clone_wrap, + ripemd160_process_wrap, +}; + +#endif /* MBEDTLS_RIPEMD160_C */ + +#if defined(MBEDTLS_SHA1_C) + +static void sha1_starts_wrap( void *ctx ) +{ + mbedtls_sha1_starts( (mbedtls_sha1_context *) ctx ); +} + +static void sha1_update_wrap( void *ctx, const unsigned char *input, + size_t ilen ) +{ + mbedtls_sha1_update( (mbedtls_sha1_context *) ctx, input, ilen ); +} + +static void sha1_finish_wrap( void *ctx, unsigned char *output ) +{ + mbedtls_sha1_finish( (mbedtls_sha1_context *) ctx, output ); +} + +static void *sha1_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_sha1_context ) ); + + if( ctx != NULL ) + mbedtls_sha1_init( (mbedtls_sha1_context *) ctx ); + + return( ctx ); +} + +static void sha1_clone_wrap( void *dst, const void *src ) +{ + mbedtls_sha1_clone( (mbedtls_sha1_context *) dst, + (const mbedtls_sha1_context *) src ); +} + +static void sha1_ctx_free( void *ctx ) +{ + mbedtls_sha1_free( (mbedtls_sha1_context *) ctx ); + mbedtls_free( ctx ); +} + +static void sha1_process_wrap( void *ctx, const unsigned char *data ) +{ + mbedtls_sha1_process( (mbedtls_sha1_context *) ctx, data ); +} + +const mbedtls_md_info_t mbedtls_sha1_info ICACHE_RODATA_ATTR = { + MBEDTLS_MD_SHA1, + "SHA1", + 20, + 64, + sha1_starts_wrap, + sha1_update_wrap, + sha1_finish_wrap, + mbedtls_sha1, + sha1_ctx_alloc, + sha1_ctx_free, + sha1_clone_wrap, + sha1_process_wrap, +}; + +#endif /* MBEDTLS_SHA1_C */ + +/* + * Wrappers for generic message digests + */ +#if defined(MBEDTLS_SHA256_C) + +static void sha224_starts_wrap( void *ctx ) +{ + mbedtls_sha256_starts( (mbedtls_sha256_context *) ctx, 1 ); +} + +static void sha224_update_wrap( void *ctx, const unsigned char *input, + size_t ilen ) +{ + mbedtls_sha256_update( (mbedtls_sha256_context *) ctx, input, ilen ); +} + +static void sha224_finish_wrap( void *ctx, unsigned char *output ) +{ + mbedtls_sha256_finish( (mbedtls_sha256_context *) ctx, output ); +} + +static void sha224_wrap( const unsigned char *input, size_t ilen, + unsigned char *output ) +{ + mbedtls_sha256( input, ilen, output, 1 ); +} + +static void *sha224_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_sha256_context ) ); + + if( ctx != NULL ) + mbedtls_sha256_init( (mbedtls_sha256_context *) ctx ); + + return( ctx ); +} + +static void sha224_ctx_free( void *ctx ) +{ + mbedtls_sha256_free( (mbedtls_sha256_context *) ctx ); + mbedtls_free( ctx ); +} + +static void sha224_clone_wrap( void *dst, const void *src ) +{ + mbedtls_sha256_clone( (mbedtls_sha256_context *) dst, + (const mbedtls_sha256_context *) src ); +} + +static void sha224_process_wrap( void *ctx, const unsigned char *data ) +{ + mbedtls_sha256_process( (mbedtls_sha256_context *) ctx, data ); +} + +const mbedtls_md_info_t mbedtls_sha224_info ICACHE_RODATA_ATTR = { + MBEDTLS_MD_SHA224, + "SHA224", + 28, + 64, + sha224_starts_wrap, + sha224_update_wrap, + sha224_finish_wrap, + sha224_wrap, + sha224_ctx_alloc, + sha224_ctx_free, + sha224_clone_wrap, + sha224_process_wrap, +}; + +static void sha256_starts_wrap( void *ctx ) +{ + mbedtls_sha256_starts( (mbedtls_sha256_context *) ctx, 0 ); +} + +static void sha256_wrap( const unsigned char *input, size_t ilen, + unsigned char *output ) +{ + mbedtls_sha256( input, ilen, output, 0 ); +} + +const mbedtls_md_info_t mbedtls_sha256_info ICACHE_RODATA_ATTR = { + MBEDTLS_MD_SHA256, + "SHA256", + 32, + 64, + sha256_starts_wrap, + sha224_update_wrap, + sha224_finish_wrap, + sha256_wrap, + sha224_ctx_alloc, + sha224_ctx_free, + sha224_clone_wrap, + sha224_process_wrap, +}; + +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + +static void sha384_starts_wrap( void *ctx ) +{ + mbedtls_sha512_starts( (mbedtls_sha512_context *) ctx, 1 ); +} + +static void sha384_update_wrap( void *ctx, const unsigned char *input, + size_t ilen ) +{ + mbedtls_sha512_update( (mbedtls_sha512_context *) ctx, input, ilen ); +} + +static void sha384_finish_wrap( void *ctx, unsigned char *output ) +{ + mbedtls_sha512_finish( (mbedtls_sha512_context *) ctx, output ); +} + +static void sha384_wrap( const unsigned char *input, size_t ilen, + unsigned char *output ) +{ + mbedtls_sha512( input, ilen, output, 1 ); +} + +static void *sha384_ctx_alloc( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_sha512_context ) ); + + if( ctx != NULL ) + mbedtls_sha512_init( (mbedtls_sha512_context *) ctx ); + + return( ctx ); +} + +static void sha384_ctx_free( void *ctx ) +{ + mbedtls_sha512_free( (mbedtls_sha512_context *) ctx ); + mbedtls_free( ctx ); +} + +static void sha384_clone_wrap( void *dst, const void *src ) +{ + mbedtls_sha512_clone( (mbedtls_sha512_context *) dst, + (const mbedtls_sha512_context *) src ); +} + +static void sha384_process_wrap( void *ctx, const unsigned char *data ) +{ + mbedtls_sha512_process( (mbedtls_sha512_context *) ctx, data ); +} + +const mbedtls_md_info_t mbedtls_sha384_info ICACHE_RODATA_ATTR = { + MBEDTLS_MD_SHA384, + "SHA384", + 48, + 128, + sha384_starts_wrap, + sha384_update_wrap, + sha384_finish_wrap, + sha384_wrap, + sha384_ctx_alloc, + sha384_ctx_free, + sha384_clone_wrap, + sha384_process_wrap, +}; + +static void sha512_starts_wrap( void *ctx ) +{ + mbedtls_sha512_starts( (mbedtls_sha512_context *) ctx, 0 ); +} + +static void sha512_wrap( const unsigned char *input, size_t ilen, + unsigned char *output ) +{ + mbedtls_sha512( input, ilen, output, 0 ); +} + +const mbedtls_md_info_t mbedtls_sha512_info ICACHE_RODATA_ATTR = { + MBEDTLS_MD_SHA512, + "SHA512", + 64, + 128, + sha512_starts_wrap, + sha384_update_wrap, + sha384_finish_wrap, + sha512_wrap, + sha384_ctx_alloc, + sha384_ctx_free, + sha384_clone_wrap, + sha384_process_wrap, +}; + +#endif /* MBEDTLS_SHA512_C */ + +#endif /* MBEDTLS_MD_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/memory_buffer_alloc.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/memory_buffer_alloc.c new file mode 100644 index 0000000..b2c775a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/memory_buffer_alloc.c @@ -0,0 +1,750 @@ +/* + * Buffer-based memory allocator + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) +#include "mbedtls/memory_buffer_alloc.h" + +/* No need for the header guard as MBEDTLS_MEMORY_BUFFER_ALLOC_C + is dependent upon MBEDTLS_PLATFORM_C */ +#include "mbedtls/platform.h" + +#include + +#if defined(MBEDTLS_MEMORY_BACKTRACE) +#include +#endif + +#if defined(MBEDTLS_THREADING_C) +#include "mbedtls/threading.h" +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +#define MAGIC1 0xFF00AA55 +#define MAGIC2 0xEE119966 +#define MAX_BT 20 + +typedef struct _memory_header memory_header; +struct _memory_header +{ + size_t magic1; + size_t size; + size_t alloc; + memory_header *prev; + memory_header *next; + memory_header *prev_free; + memory_header *next_free; +#if defined(MBEDTLS_MEMORY_BACKTRACE) + char **trace; + size_t trace_count; +#endif + size_t magic2; +}; + +typedef struct +{ + unsigned char *buf; + size_t len; + memory_header *first; + memory_header *first_free; + int verify; +#if defined(MBEDTLS_MEMORY_DEBUG) + size_t alloc_count; + size_t free_count; + size_t total_used; + size_t maximum_used; + size_t header_count; + size_t maximum_header_count; +#endif +#if defined(MBEDTLS_THREADING_C) + mbedtls_threading_mutex_t mutex; +#endif +} +buffer_alloc_ctx; + +static buffer_alloc_ctx heap; + +#if defined(MBEDTLS_MEMORY_DEBUG) +static void debug_header( memory_header *hdr ) +{ +#if defined(MBEDTLS_MEMORY_BACKTRACE) + size_t i; +#endif + + mbedtls_fprintf( stderr, "HDR: PTR(%10zu), PREV(%10zu), NEXT(%10zu), " + "ALLOC(%zu), SIZE(%10zu)\n", + (size_t) hdr, (size_t) hdr->prev, (size_t) hdr->next, + hdr->alloc, hdr->size ); + mbedtls_fprintf( stderr, " FPREV(%10zu), FNEXT(%10zu)\n", + (size_t) hdr->prev_free, (size_t) hdr->next_free ); + +#if defined(MBEDTLS_MEMORY_BACKTRACE) + mbedtls_fprintf( stderr, "TRACE: \n" ); + for( i = 0; i < hdr->trace_count; i++ ) + mbedtls_fprintf( stderr, "%s\n", hdr->trace[i] ); + mbedtls_fprintf( stderr, "\n" ); +#endif +} + +static void debug_chain() +{ + memory_header *cur = heap.first; + + mbedtls_fprintf( stderr, "\nBlock list\n" ); + while( cur != NULL ) + { + debug_header( cur ); + cur = cur->next; + } + + mbedtls_fprintf( stderr, "Free list\n" ); + cur = heap.first_free; + + while( cur != NULL ) + { + debug_header( cur ); + cur = cur->next_free; + } +} +#endif /* MBEDTLS_MEMORY_DEBUG */ + +static int verify_header( memory_header *hdr ) +{ + if( hdr->magic1 != MAGIC1 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: MAGIC1 mismatch\n" ); +#endif + return( 1 ); + } + + if( hdr->magic2 != MAGIC2 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: MAGIC2 mismatch\n" ); +#endif + return( 1 ); + } + + if( hdr->alloc > 1 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: alloc has illegal value\n" ); +#endif + return( 1 ); + } + + if( hdr->prev != NULL && hdr->prev == hdr->next ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: prev == next\n" ); +#endif + return( 1 ); + } + + if( hdr->prev_free != NULL && hdr->prev_free == hdr->next_free ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: prev_free == next_free\n" ); +#endif + return( 1 ); + } + + return( 0 ); +} + +static int verify_chain() +{ + memory_header *prv = heap.first, *cur = heap.first->next; + + if( verify_header( heap.first ) != 0 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: verification of first header " + "failed\n" ); +#endif + return( 1 ); + } + + if( heap.first->prev != NULL ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: verification failed: " + "first->prev != NULL\n" ); +#endif + return( 1 ); + } + + while( cur != NULL ) + { + if( verify_header( cur ) != 0 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: verification of header " + "failed\n" ); +#endif + return( 1 ); + } + + if( cur->prev != prv ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: verification failed: " + "cur->prev != prv\n" ); +#endif + return( 1 ); + } + + prv = cur; + cur = cur->next; + } + + return( 0 ); +} + +static void *buffer_alloc_calloc( size_t n, size_t size ) +{ + memory_header *new, *cur = heap.first_free; + unsigned char *p; + void *ret; + size_t original_len, len; +#if defined(MBEDTLS_MEMORY_BACKTRACE) + void *trace_buffer[MAX_BT]; + size_t trace_cnt; +#endif + + if( heap.buf == NULL || heap.first == NULL ) + return( NULL ); + + original_len = len = n * size; + + if( n != 0 && len / n != size ) + return( NULL ); + + if( len % MBEDTLS_MEMORY_ALIGN_MULTIPLE ) + { + len -= len % MBEDTLS_MEMORY_ALIGN_MULTIPLE; + len += MBEDTLS_MEMORY_ALIGN_MULTIPLE; + } + + // Find block that fits + // + while( cur != NULL ) + { + if( cur->size >= len ) + break; + + cur = cur->next_free; + } + + if( cur == NULL ) + return( NULL ); + + if( cur->alloc != 0 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: block in free_list but allocated " + "data\n" ); +#endif + mbedtls_exit( 1 ); + } + +#if defined(MBEDTLS_MEMORY_DEBUG) + heap.alloc_count++; +#endif + + // Found location, split block if > memory_header + 4 room left + // + if( cur->size - len < sizeof(memory_header) + + MBEDTLS_MEMORY_ALIGN_MULTIPLE ) + { + cur->alloc = 1; + + // Remove from free_list + // + if( cur->prev_free != NULL ) + cur->prev_free->next_free = cur->next_free; + else + heap.first_free = cur->next_free; + + if( cur->next_free != NULL ) + cur->next_free->prev_free = cur->prev_free; + + cur->prev_free = NULL; + cur->next_free = NULL; + +#if defined(MBEDTLS_MEMORY_DEBUG) + heap.total_used += cur->size; + if( heap.total_used > heap.maximum_used ) + heap.maximum_used = heap.total_used; +#endif +#if defined(MBEDTLS_MEMORY_BACKTRACE) + trace_cnt = backtrace( trace_buffer, MAX_BT ); + cur->trace = backtrace_symbols( trace_buffer, trace_cnt ); + cur->trace_count = trace_cnt; +#endif + + if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 ) + mbedtls_exit( 1 ); + + ret = (unsigned char *) cur + sizeof( memory_header ); + memset( ret, 0, original_len ); + + return( ret ); + } + + p = ( (unsigned char *) cur ) + sizeof(memory_header) + len; + new = (memory_header *) p; + + new->size = cur->size - len - sizeof(memory_header); + new->alloc = 0; + new->prev = cur; + new->next = cur->next; +#if defined(MBEDTLS_MEMORY_BACKTRACE) + new->trace = NULL; + new->trace_count = 0; +#endif + new->magic1 = MAGIC1; + new->magic2 = MAGIC2; + + if( new->next != NULL ) + new->next->prev = new; + + // Replace cur with new in free_list + // + new->prev_free = cur->prev_free; + new->next_free = cur->next_free; + if( new->prev_free != NULL ) + new->prev_free->next_free = new; + else + heap.first_free = new; + + if( new->next_free != NULL ) + new->next_free->prev_free = new; + + cur->alloc = 1; + cur->size = len; + cur->next = new; + cur->prev_free = NULL; + cur->next_free = NULL; + +#if defined(MBEDTLS_MEMORY_DEBUG) + heap.header_count++; + if( heap.header_count > heap.maximum_header_count ) + heap.maximum_header_count = heap.header_count; + heap.total_used += cur->size; + if( heap.total_used > heap.maximum_used ) + heap.maximum_used = heap.total_used; +#endif +#if defined(MBEDTLS_MEMORY_BACKTRACE) + trace_cnt = backtrace( trace_buffer, MAX_BT ); + cur->trace = backtrace_symbols( trace_buffer, trace_cnt ); + cur->trace_count = trace_cnt; +#endif + + if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 ) + mbedtls_exit( 1 ); + + ret = (unsigned char *) cur + sizeof( memory_header ); + memset( ret, 0, original_len ); + + return( ret ); +} + +static void buffer_alloc_free( void *ptr ) +{ + memory_header *hdr, *old = NULL; + unsigned char *p = (unsigned char *) ptr; + + if( ptr == NULL || heap.buf == NULL || heap.first == NULL ) + return; + + if( p < heap.buf || p > heap.buf + heap.len ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: mbedtls_free() outside of managed " + "space\n" ); +#endif + mbedtls_exit( 1 ); + } + + p -= sizeof(memory_header); + hdr = (memory_header *) p; + + if( verify_header( hdr ) != 0 ) + mbedtls_exit( 1 ); + + if( hdr->alloc != 1 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + mbedtls_fprintf( stderr, "FATAL: mbedtls_free() on unallocated " + "data\n" ); +#endif + mbedtls_exit( 1 ); + } + + hdr->alloc = 0; + +#if defined(MBEDTLS_MEMORY_DEBUG) + heap.free_count++; + heap.total_used -= hdr->size; +#endif + + // Regroup with block before + // + if( hdr->prev != NULL && hdr->prev->alloc == 0 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + heap.header_count--; +#endif + hdr->prev->size += sizeof(memory_header) + hdr->size; + hdr->prev->next = hdr->next; + old = hdr; + hdr = hdr->prev; + + if( hdr->next != NULL ) + hdr->next->prev = hdr; + +#if defined(MBEDTLS_MEMORY_BACKTRACE) + free( old->trace ); +#endif + memset( old, 0, sizeof(memory_header) ); + } + + // Regroup with block after + // + if( hdr->next != NULL && hdr->next->alloc == 0 ) + { +#if defined(MBEDTLS_MEMORY_DEBUG) + heap.header_count--; +#endif + hdr->size += sizeof(memory_header) + hdr->next->size; + old = hdr->next; + hdr->next = hdr->next->next; + + if( hdr->prev_free != NULL || hdr->next_free != NULL ) + { + if( hdr->prev_free != NULL ) + hdr->prev_free->next_free = hdr->next_free; + else + heap.first_free = hdr->next_free; + + if( hdr->next_free != NULL ) + hdr->next_free->prev_free = hdr->prev_free; + } + + hdr->prev_free = old->prev_free; + hdr->next_free = old->next_free; + + if( hdr->prev_free != NULL ) + hdr->prev_free->next_free = hdr; + else + heap.first_free = hdr; + + if( hdr->next_free != NULL ) + hdr->next_free->prev_free = hdr; + + if( hdr->next != NULL ) + hdr->next->prev = hdr; + +#if defined(MBEDTLS_MEMORY_BACKTRACE) + free( old->trace ); +#endif + memset( old, 0, sizeof(memory_header) ); + } + + // Prepend to free_list if we have not merged + // (Does not have to stay in same order as prev / next list) + // + if( old == NULL ) + { + hdr->next_free = heap.first_free; + if( heap.first_free != NULL ) + heap.first_free->prev_free = hdr; + heap.first_free = hdr; + } + +#if defined(MBEDTLS_MEMORY_BACKTRACE) + hdr->trace = NULL; + hdr->trace_count = 0; +#endif + + if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_FREE ) && verify_chain() != 0 ) + mbedtls_exit( 1 ); +} + +void mbedtls_memory_buffer_set_verify( int verify ) +{ + heap.verify = verify; +} + +int mbedtls_memory_buffer_alloc_verify() +{ + return verify_chain(); +} + +#if defined(MBEDTLS_MEMORY_DEBUG) +void mbedtls_memory_buffer_alloc_status() +{ + mbedtls_fprintf( stderr, + "Current use: %zu blocks / %zu bytes, max: %zu blocks / " + "%zu bytes (total %zu bytes), alloc / free: %zu / %zu\n", + heap.header_count, heap.total_used, + heap.maximum_header_count, heap.maximum_used, + heap.maximum_header_count * sizeof( memory_header ) + + heap.maximum_used, + heap.alloc_count, heap.free_count ); + + if( heap.first->next == NULL ) + mbedtls_fprintf( stderr, "All memory de-allocated in stack buffer\n" ); + else + { + mbedtls_fprintf( stderr, "Memory currently allocated:\n" ); + debug_chain(); + } +} + +void mbedtls_memory_buffer_alloc_max_get( size_t *max_used, size_t *max_blocks ) +{ + *max_used = heap.maximum_used; + *max_blocks = heap.maximum_header_count; +} + +void mbedtls_memory_buffer_alloc_max_reset( void ) +{ + heap.maximum_used = 0; + heap.maximum_header_count = 0; +} + +void mbedtls_memory_buffer_alloc_cur_get( size_t *cur_used, size_t *cur_blocks ) +{ + *cur_used = heap.total_used; + *cur_blocks = heap.header_count; +} +#endif /* MBEDTLS_MEMORY_DEBUG */ + +#if defined(MBEDTLS_THREADING_C) +static void *buffer_alloc_calloc_mutexed( size_t n, size_t size ) +{ + void *buf; + if( mbedtls_mutex_lock( &heap.mutex ) != 0 ) + return( NULL ); + buf = buffer_alloc_calloc( n, size ); + if( mbedtls_mutex_unlock( &heap.mutex ) ) + return( NULL ); + return( buf ); +} + +static void buffer_alloc_free_mutexed( void *ptr ) +{ + /* We have to good option here, but corrupting the heap seems + * worse than loosing memory. */ + if( mbedtls_mutex_lock( &heap.mutex ) ) + return; + buffer_alloc_free( ptr ); + (void) mbedtls_mutex_unlock( &heap.mutex ); +} +#endif /* MBEDTLS_THREADING_C */ + +void mbedtls_memory_buffer_alloc_init( unsigned char *buf, size_t len ) +{ + memset( &heap, 0, sizeof(buffer_alloc_ctx) ); + memset( buf, 0, len ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &heap.mutex ); + mbedtls_platform_set_calloc_free( buffer_alloc_calloc_mutexed, + buffer_alloc_free_mutexed ); +#else + mbedtls_platform_set_calloc_free( buffer_alloc_calloc, buffer_alloc_free ); +#endif + + if( (size_t) buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE ) + { + /* Adjust len first since buf is used in the computation */ + len -= MBEDTLS_MEMORY_ALIGN_MULTIPLE + - (size_t) buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE; + buf += MBEDTLS_MEMORY_ALIGN_MULTIPLE + - (size_t) buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE; + } + + heap.buf = buf; + heap.len = len; + + heap.first = (memory_header *) buf; + heap.first->size = len - sizeof(memory_header); + heap.first->magic1 = MAGIC1; + heap.first->magic2 = MAGIC2; + heap.first_free = heap.first; +} + +void mbedtls_memory_buffer_alloc_free() +{ +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_free( &heap.mutex ); +#endif + mbedtls_zeroize( &heap, sizeof(buffer_alloc_ctx) ); +} + +#if defined(MBEDTLS_SELF_TEST) +static int check_pointer( void *p ) +{ + if( p == NULL ) + return( -1 ); + + if( (size_t) p % MBEDTLS_MEMORY_ALIGN_MULTIPLE != 0 ) + return( -1 ); + + return( 0 ); +} + +static int check_all_free( ) +{ + if( +#if defined(MBEDTLS_MEMORY_DEBUG) + heap.total_used != 0 || +#endif + heap.first != heap.first_free || + (void *) heap.first != (void *) heap.buf ) + { + return( -1 ); + } + + return( 0 ); +} + +#define TEST_ASSERT( condition ) \ + if( ! (condition) ) \ + { \ + if( verbose != 0 ) \ + mbedtls_printf( "failed\n" ); \ + \ + ret = 1; \ + goto cleanup; \ + } + +int mbedtls_memory_buffer_alloc_self_test( int verbose ) +{ + unsigned char buf[1024]; + unsigned char *p, *q, *r, *end; + int ret = 0; + + if( verbose != 0 ) + mbedtls_printf( " MBA test #1 (basic alloc-free cycle): " ); + + mbedtls_memory_buffer_alloc_init( buf, sizeof( buf ) ); + + p = mbedtls_calloc( 1, 1 ); + q = mbedtls_calloc( 1, 128 ); + r = mbedtls_calloc( 1, 16 ); + + TEST_ASSERT( check_pointer( p ) == 0 && + check_pointer( q ) == 0 && + check_pointer( r ) == 0 ); + + mbedtls_free( r ); + mbedtls_free( q ); + mbedtls_free( p ); + + TEST_ASSERT( check_all_free( ) == 0 ); + + /* Memorize end to compare with the next test */ + end = heap.buf + heap.len; + + mbedtls_memory_buffer_alloc_free( ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " MBA test #2 (buf not aligned): " ); + + mbedtls_memory_buffer_alloc_init( buf + 1, sizeof( buf ) - 1 ); + + TEST_ASSERT( heap.buf + heap.len == end ); + + p = mbedtls_calloc( 1, 1 ); + q = mbedtls_calloc( 1, 128 ); + r = mbedtls_calloc( 1, 16 ); + + TEST_ASSERT( check_pointer( p ) == 0 && + check_pointer( q ) == 0 && + check_pointer( r ) == 0 ); + + mbedtls_free( r ); + mbedtls_free( q ); + mbedtls_free( p ); + + TEST_ASSERT( check_all_free( ) == 0 ); + + mbedtls_memory_buffer_alloc_free( ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " MBA test #3 (full): " ); + + mbedtls_memory_buffer_alloc_init( buf, sizeof( buf ) ); + + p = mbedtls_calloc( 1, sizeof( buf ) - sizeof( memory_header ) ); + + TEST_ASSERT( check_pointer( p ) == 0 ); + TEST_ASSERT( mbedtls_calloc( 1, 1 ) == NULL ); + + mbedtls_free( p ); + + p = mbedtls_calloc( 1, sizeof( buf ) - 2 * sizeof( memory_header ) - 16 ); + q = mbedtls_calloc( 1, 16 ); + + TEST_ASSERT( check_pointer( p ) == 0 && check_pointer( q ) == 0 ); + TEST_ASSERT( mbedtls_calloc( 1, 1 ) == NULL ); + + mbedtls_free( q ); + + TEST_ASSERT( mbedtls_calloc( 1, 17 ) == NULL ); + + mbedtls_free( p ); + + TEST_ASSERT( check_all_free( ) == 0 ); + + mbedtls_memory_buffer_alloc_free( ); + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + +cleanup: + mbedtls_memory_buffer_alloc_free( ); + + return( ret ); +} +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_MEMORY_BUFFER_ALLOC_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/net.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/net.c new file mode 100644 index 0000000..a77268c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/net.c @@ -0,0 +1,575 @@ +/* + * TCP/IP or UDP/IP networking functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_NET_C) + +#include "mbedtls/net.h" + +#include + +#if (defined(_WIN32) || defined(_WIN32_WCE)) && !defined(EFIX64) && \ + !defined(EFI32) + +#ifdef _WIN32_WINNT +#undef _WIN32_WINNT +#endif +/* Enables getaddrinfo() & Co */ +#define _WIN32_WINNT 0x0501 +#include + +#include +#include + +#if defined(_MSC_VER) +#if defined(_WIN32_WCE) +#pragma comment( lib, "ws2.lib" ) +#else +#pragma comment( lib, "ws2_32.lib" ) +#endif +#endif /* _MSC_VER */ + +#define read(fd,buf,len) recv(fd,(char*)buf,(int) len,0) +#define write(fd,buf,len) send(fd,(char*)buf,(int) len,0) +#define close(fd) closesocket(fd) + +static int wsa_init_done = 0; + +#else /* ( _WIN32 || _WIN32_WCE ) && !EFIX64 && !EFI32 */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#endif /* ( _WIN32 || _WIN32_WCE ) && !EFIX64 && !EFI32 */ + +/* Some MS functions want int and MSVC warns if we pass size_t, + * but the standard fucntions use socklen_t, so cast only for MSVC */ +#if defined(_MSC_VER) +#define MSVC_INT_CAST (int) +#else +#define MSVC_INT_CAST +#endif + +#include +#include + +#include + +#include + +/* + * Prepare for using the sockets interface + */ +static int net_prepare( void ) +{ +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + WSADATA wsaData; + + if( wsa_init_done == 0 ) + { + if( WSAStartup( MAKEWORD(2,0), &wsaData ) != 0 ) + return( MBEDTLS_ERR_NET_SOCKET_FAILED ); + + wsa_init_done = 1; + } +#else +#if !defined(EFIX64) && !defined(EFI32) + signal( SIGPIPE, SIG_IGN ); +#endif +#endif + return( 0 ); +} + +/* + * Initialize a context + */ +void mbedtls_net_init( mbedtls_net_context *ctx ) +{ + ctx->fd = -1; +} + +/* + * Initiate a TCP connection with host:port and the given protocol + */ +int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char *port, int proto ) +{ + int ret; + struct addrinfo hints, *addr_list, *cur; + + if( ( ret = net_prepare() ) != 0 ) + return( ret ); + + /* Do name resolution with both IPv6 and IPv4 */ + memset( &hints, 0, sizeof( hints ) ); + hints.ai_family = AF_UNSPEC; + hints.ai_socktype = proto == MBEDTLS_NET_PROTO_UDP ? SOCK_DGRAM : SOCK_STREAM; + hints.ai_protocol = proto == MBEDTLS_NET_PROTO_UDP ? IPPROTO_UDP : IPPROTO_TCP; + + if( getaddrinfo( host, port, &hints, &addr_list ) != 0 ) + return( MBEDTLS_ERR_NET_UNKNOWN_HOST ); + + /* Try the sockaddrs until a connection succeeds */ + ret = MBEDTLS_ERR_NET_UNKNOWN_HOST; + for( cur = addr_list; cur != NULL; cur = cur->ai_next ) + { + ctx->fd = (int) socket( cur->ai_family, cur->ai_socktype, + cur->ai_protocol ); + if( ctx->fd < 0 ) + { + ret = MBEDTLS_ERR_NET_SOCKET_FAILED; + continue; + } + + if( connect( ctx->fd, cur->ai_addr, MSVC_INT_CAST cur->ai_addrlen ) == 0 ) + { + ret = 0; + break; + } + + close( ctx->fd ); + ret = MBEDTLS_ERR_NET_CONNECT_FAILED; + } + + freeaddrinfo( addr_list ); + + return( ret ); +} + +/* + * Create a listening socket on bind_ip:port + */ +int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char *port, int proto ) +{ + int n, ret; + struct addrinfo hints, *addr_list, *cur; + + if( ( ret = net_prepare() ) != 0 ) + return( ret ); + + /* Bind to IPv6 and/or IPv4, but only in the desired protocol */ + memset( &hints, 0, sizeof( hints ) ); + hints.ai_family = AF_UNSPEC; + hints.ai_socktype = proto == MBEDTLS_NET_PROTO_UDP ? SOCK_DGRAM : SOCK_STREAM; + hints.ai_protocol = proto == MBEDTLS_NET_PROTO_UDP ? IPPROTO_UDP : IPPROTO_TCP; + if( bind_ip == NULL ) + hints.ai_flags = AI_PASSIVE; + + if( getaddrinfo( bind_ip, port, &hints, &addr_list ) != 0 ) + return( MBEDTLS_ERR_NET_UNKNOWN_HOST ); + + /* Try the sockaddrs until a binding succeeds */ + ret = MBEDTLS_ERR_NET_UNKNOWN_HOST; + for( cur = addr_list; cur != NULL; cur = cur->ai_next ) + { + ctx->fd = (int) socket( cur->ai_family, cur->ai_socktype, + cur->ai_protocol ); + if( ctx->fd < 0 ) + { + ret = MBEDTLS_ERR_NET_SOCKET_FAILED; + continue; + } + + n = 1; + if( setsockopt( ctx->fd, SOL_SOCKET, SO_REUSEADDR, + (const char *) &n, sizeof( n ) ) != 0 ) + { + close( ctx->fd ); + ret = MBEDTLS_ERR_NET_SOCKET_FAILED; + continue; + } + + if( bind( ctx->fd, cur->ai_addr, MSVC_INT_CAST cur->ai_addrlen ) != 0 ) + { + close( ctx->fd ); + ret = MBEDTLS_ERR_NET_BIND_FAILED; + continue; + } + + /* Listen only makes sense for TCP */ + if( proto == MBEDTLS_NET_PROTO_TCP ) + { + if( listen( ctx->fd, MBEDTLS_NET_LISTEN_BACKLOG ) != 0 ) + { + close( ctx->fd ); + ret = MBEDTLS_ERR_NET_LISTEN_FAILED; + continue; + } + } + + /* I we ever get there, it's a success */ + ret = 0; + break; + } + + freeaddrinfo( addr_list ); + + return( ret ); + +} + +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) +/* + * Check if the requested operation would be blocking on a non-blocking socket + * and thus 'failed' with a negative return value. + */ +static int net_would_block( const mbedtls_net_context *ctx ) +{ + ((void) ctx); + return( WSAGetLastError() == WSAEWOULDBLOCK ); +} +#else +/* + * Check if the requested operation would be blocking on a non-blocking socket + * and thus 'failed' with a negative return value. + * + * Note: on a blocking socket this function always returns 0! + */ +static int net_would_block( const mbedtls_net_context *ctx ) +{ + /* + * Never return 'WOULD BLOCK' on a non-blocking socket + */ + if( ( fcntl( ctx->fd, F_GETFL ) & O_NONBLOCK ) != O_NONBLOCK ) + return( 0 ); + + switch( errno ) + { +#if defined EAGAIN + case EAGAIN: +#endif +#if defined EWOULDBLOCK && EWOULDBLOCK != EAGAIN + case EWOULDBLOCK: +#endif + return( 1 ); + } + return( 0 ); +} +#endif /* ( _WIN32 || _WIN32_WCE ) && !EFIX64 && !EFI32 */ + +/* + * Accept a connection from a remote client + */ +int mbedtls_net_accept( mbedtls_net_context *bind_ctx, + mbedtls_net_context *client_ctx, + void *client_ip, size_t buf_size, size_t *ip_len ) +{ + int ret; + int type; + + struct sockaddr_storage client_addr; + +#if defined(__socklen_t_defined) || defined(_SOCKLEN_T) || \ + defined(_SOCKLEN_T_DECLARED) || defined(__DEFINED_socklen_t) + socklen_t n = (socklen_t) sizeof( client_addr ); + socklen_t type_len = (socklen_t) sizeof( type ); +#else + int n = (int) sizeof( client_addr ); + int type_len = (int) sizeof( type ); +#endif + + /* Is this a TCP or UDP socket? */ + if( getsockopt( bind_ctx->fd, SOL_SOCKET, SO_TYPE, + (void *) &type, &type_len ) != 0 || + ( type != SOCK_STREAM && type != SOCK_DGRAM ) ) + { + return( MBEDTLS_ERR_NET_ACCEPT_FAILED ); + } + + if( type == SOCK_STREAM ) + { + /* TCP: actual accept() */ + ret = client_ctx->fd = (int) accept( bind_ctx->fd, + (struct sockaddr *) &client_addr, &n ); + } + else + { + /* UDP: wait for a message, but keep it in the queue */ + char buf[1] = { 0 }; + + ret = (int) recvfrom( bind_ctx->fd, buf, sizeof( buf ), MSG_PEEK, + (struct sockaddr *) &client_addr, &n ); + +#if defined(_WIN32) + if( ret == SOCKET_ERROR && + WSAGetLastError() == WSAEMSGSIZE ) + { + /* We know buf is too small, thanks, just peeking here */ + ret = 0; + } +#endif + } + + if( ret < 0 ) + { + if( net_would_block( bind_ctx ) != 0 ) + return( MBEDTLS_ERR_SSL_WANT_READ ); + + return( MBEDTLS_ERR_NET_ACCEPT_FAILED ); + } + + /* UDP: hijack the listening socket to communicate with the client, + * then bind a new socket to accept new connections */ + if( type != SOCK_STREAM ) + { + struct sockaddr_storage local_addr; + int one = 1; + + if( connect( bind_ctx->fd, (struct sockaddr *) &client_addr, n ) != 0 ) + return( MBEDTLS_ERR_NET_ACCEPT_FAILED ); + + client_ctx->fd = bind_ctx->fd; + bind_ctx->fd = -1; /* In case we exit early */ + + n = sizeof( struct sockaddr_storage ); + if( getsockname( client_ctx->fd, + (struct sockaddr *) &local_addr, &n ) != 0 || + ( bind_ctx->fd = (int) socket( local_addr.ss_family, + SOCK_DGRAM, IPPROTO_UDP ) ) < 0 || + setsockopt( bind_ctx->fd, SOL_SOCKET, SO_REUSEADDR, + (const char *) &one, sizeof( one ) ) != 0 ) + { + return( MBEDTLS_ERR_NET_SOCKET_FAILED ); + } + + if( bind( bind_ctx->fd, (struct sockaddr *) &local_addr, n ) != 0 ) + { + return( MBEDTLS_ERR_NET_BIND_FAILED ); + } + } + + if( client_ip != NULL ) + { + if( client_addr.ss_family == AF_INET ) + { + struct sockaddr_in *addr4 = (struct sockaddr_in *) &client_addr; + *ip_len = sizeof( addr4->sin_addr.s_addr ); + + if( buf_size < *ip_len ) + return( MBEDTLS_ERR_NET_BUFFER_TOO_SMALL ); + + memcpy( client_ip, &addr4->sin_addr.s_addr, *ip_len ); + } + else + { + struct sockaddr_in6 *addr6 = (struct sockaddr_in6 *) &client_addr; + *ip_len = sizeof( addr6->sin6_addr.s6_addr ); + + if( buf_size < *ip_len ) + return( MBEDTLS_ERR_NET_BUFFER_TOO_SMALL ); + + memcpy( client_ip, &addr6->sin6_addr.s6_addr, *ip_len); + } + } + + return( 0 ); +} + +/* + * Set the socket blocking or non-blocking + */ +int mbedtls_net_set_block( mbedtls_net_context *ctx ) +{ +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + u_long n = 0; + return( ioctlsocket( ctx->fd, FIONBIO, &n ) ); +#else + return( fcntl( ctx->fd, F_SETFL, fcntl( ctx->fd, F_GETFL ) & ~O_NONBLOCK ) ); +#endif +} + +int mbedtls_net_set_nonblock( mbedtls_net_context *ctx ) +{ +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + u_long n = 1; + return( ioctlsocket( ctx->fd, FIONBIO, &n ) ); +#else + return( fcntl( ctx->fd, F_SETFL, fcntl( ctx->fd, F_GETFL ) | O_NONBLOCK ) ); +#endif +} + +/* + * Portable usleep helper + */ +void mbedtls_net_usleep( unsigned long usec ) +{ +#if defined(_WIN32) + Sleep( ( usec + 999 ) / 1000 ); +#else + struct timeval tv; + tv.tv_sec = usec / 1000000; +#if defined(__unix__) || defined(__unix) || \ + ( defined(__APPLE__) && defined(__MACH__) ) + tv.tv_usec = (suseconds_t) usec % 1000000; +#else + tv.tv_usec = usec % 1000000; +#endif + select( 0, NULL, NULL, NULL, &tv ); +#endif +} + +/* + * Read at most 'len' characters + */ +int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len ) +{ + int ret; + int fd = ((mbedtls_net_context *) ctx)->fd; + + if( fd < 0 ) + return( MBEDTLS_ERR_NET_INVALID_CONTEXT ); + + ret = (int) read( fd, buf, len ); + + if( ret < 0 ) + { + if( net_would_block( ctx ) != 0 ) + return( MBEDTLS_ERR_SSL_WANT_READ ); + +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + if( WSAGetLastError() == WSAECONNRESET ) + return( MBEDTLS_ERR_NET_CONN_RESET ); +#else + if( errno == EPIPE || errno == ECONNRESET ) + return( MBEDTLS_ERR_NET_CONN_RESET ); + + if( errno == EINTR ) + return( MBEDTLS_ERR_SSL_WANT_READ ); +#endif + + return( MBEDTLS_ERR_NET_RECV_FAILED ); + } + + return( ret ); +} + +/* + * Read at most 'len' characters, blocking for at most 'timeout' ms + */ +int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len, + uint32_t timeout ) +{ + int ret; + struct timeval tv; + fd_set read_fds; + int fd = ((mbedtls_net_context *) ctx)->fd; + + if( fd < 0 ) + return( MBEDTLS_ERR_NET_INVALID_CONTEXT ); + + FD_ZERO( &read_fds ); + FD_SET( fd, &read_fds ); + + tv.tv_sec = timeout / 1000; + tv.tv_usec = ( timeout % 1000 ) * 1000; + + ret = select( fd + 1, &read_fds, NULL, NULL, timeout == 0 ? NULL : &tv ); + + /* Zero fds ready means we timed out */ + if( ret == 0 ) + return( MBEDTLS_ERR_SSL_TIMEOUT ); + + if( ret < 0 ) + { +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + if( WSAGetLastError() == WSAEINTR ) + return( MBEDTLS_ERR_SSL_WANT_READ ); +#else + if( errno == EINTR ) + return( MBEDTLS_ERR_SSL_WANT_READ ); +#endif + + return( MBEDTLS_ERR_NET_RECV_FAILED ); + } + + /* This call will not block */ + return( mbedtls_net_recv( ctx, buf, len ) ); +} + +/* + * Write at most 'len' characters + */ +int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len ) +{ + int ret; + int fd = ((mbedtls_net_context *) ctx)->fd; + + if( fd < 0 ) + return( MBEDTLS_ERR_NET_INVALID_CONTEXT ); + + ret = (int) write( fd, buf, len ); + + if( ret < 0 ) + { + if( net_would_block( ctx ) != 0 ) + return( MBEDTLS_ERR_SSL_WANT_WRITE ); + +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + if( WSAGetLastError() == WSAECONNRESET ) + return( MBEDTLS_ERR_NET_CONN_RESET ); +#else + if( errno == EPIPE || errno == ECONNRESET ) + return( MBEDTLS_ERR_NET_CONN_RESET ); + + if( errno == EINTR ) + return( MBEDTLS_ERR_SSL_WANT_WRITE ); +#endif + + return( MBEDTLS_ERR_NET_SEND_FAILED ); + } + + return( ret ); +} + +/* + * Gracefully close the connection + */ +void mbedtls_net_free( mbedtls_net_context *ctx ) +{ + if( ctx->fd == -1 ) + return; + + shutdown( ctx->fd, 2 ); + close( ctx->fd ); + + ctx->fd = -1; +} + +#endif /* MBEDTLS_NET_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/oid.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/oid.c new file mode 100644 index 0000000..0d606c6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/oid.c @@ -0,0 +1,650 @@ +/** + * \file oid.c + * + * \brief Object Identifier (OID) database + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_OID_C) + +#include "mbedtls/oid.h" +#include "mbedtls/rsa.h" + +#include +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#define mbedtls_snprintf snprintf +#endif + +#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C) +#include "mbedtls/x509.h" +#endif + +/* + * Macro to automatically add the size of #define'd OIDs + */ +#define ADD_LEN(s) s, MBEDTLS_OID_SIZE(s) + +/* + * Macro to generate an internal function for oid_XXX_from_asn1() (used by + * the other functions) + */ +#define FN_OID_TYPED_FROM_ASN1( TYPE_T, NAME, LIST ) \ +static const TYPE_T * oid_ ## NAME ## _from_asn1( const mbedtls_asn1_buf *oid ) \ +{ \ + const TYPE_T *p = LIST; \ + const mbedtls_oid_descriptor_t *cur = (const mbedtls_oid_descriptor_t *) p; \ + if( p == NULL || oid == NULL ) return( NULL ); \ + while( cur->asn1 != NULL ) { \ + if( cur->asn1_len == oid->len && \ + memcmp( cur->asn1, oid->p, oid->len ) == 0 ) { \ + return( p ); \ + } \ + p++; \ + cur = (const mbedtls_oid_descriptor_t *) p; \ + } \ + return( NULL ); \ +} + +/* + * Macro to generate a function for retrieving a single attribute from the + * descriptor of an mbedtls_oid_descriptor_t wrapper. + */ +#define FN_OID_GET_DESCRIPTOR_ATTR1(FN_NAME, TYPE_T, TYPE_NAME, ATTR1_TYPE, ATTR1) \ +int FN_NAME( const mbedtls_asn1_buf *oid, ATTR1_TYPE * ATTR1 ) \ +{ \ + const TYPE_T *data = oid_ ## TYPE_NAME ## _from_asn1( oid ); \ + if( data == NULL ) return( MBEDTLS_ERR_OID_NOT_FOUND ); \ + *ATTR1 = data->descriptor.ATTR1; \ + return( 0 ); \ +} + +/* + * Macro to generate a function for retrieving a single attribute from an + * mbedtls_oid_descriptor_t wrapper. + */ +#define FN_OID_GET_ATTR1(FN_NAME, TYPE_T, TYPE_NAME, ATTR1_TYPE, ATTR1) \ +int FN_NAME( const mbedtls_asn1_buf *oid, ATTR1_TYPE * ATTR1 ) \ +{ \ + const TYPE_T *data = oid_ ## TYPE_NAME ## _from_asn1( oid ); \ + if( data == NULL ) return( MBEDTLS_ERR_OID_NOT_FOUND ); \ + *ATTR1 = data->ATTR1; \ + return( 0 ); \ +} + +/* + * Macro to generate a function for retrieving two attributes from an + * mbedtls_oid_descriptor_t wrapper. + */ +#define FN_OID_GET_ATTR2(FN_NAME, TYPE_T, TYPE_NAME, ATTR1_TYPE, ATTR1, \ + ATTR2_TYPE, ATTR2) \ +int FN_NAME( const mbedtls_asn1_buf *oid, ATTR1_TYPE * ATTR1, ATTR2_TYPE * ATTR2 ) \ +{ \ + const TYPE_T *data = oid_ ## TYPE_NAME ## _from_asn1( oid ); \ + if( data == NULL ) return( MBEDTLS_ERR_OID_NOT_FOUND ); \ + *ATTR1 = data->ATTR1; \ + *ATTR2 = data->ATTR2; \ + return( 0 ); \ +} + +/* + * Macro to generate a function for retrieving the OID based on a single + * attribute from a mbedtls_oid_descriptor_t wrapper. + */ +#define FN_OID_GET_OID_BY_ATTR1(FN_NAME, TYPE_T, LIST, ATTR1_TYPE, ATTR1) \ +int FN_NAME( ATTR1_TYPE ATTR1, const char **oid, size_t *olen ) \ +{ \ + const TYPE_T *cur = LIST; \ + while( cur->descriptor.asn1 != NULL ) { \ + if( cur->ATTR1 == ATTR1 ) { \ + *oid = cur->descriptor.asn1; \ + *olen = cur->descriptor.asn1_len; \ + return( 0 ); \ + } \ + cur++; \ + } \ + return( MBEDTLS_ERR_OID_NOT_FOUND ); \ +} + +/* + * Macro to generate a function for retrieving the OID based on two + * attributes from a mbedtls_oid_descriptor_t wrapper. + */ +#define FN_OID_GET_OID_BY_ATTR2(FN_NAME, TYPE_T, LIST, ATTR1_TYPE, ATTR1, \ + ATTR2_TYPE, ATTR2) \ +int FN_NAME( ATTR1_TYPE ATTR1, ATTR2_TYPE ATTR2, const char **oid , \ + size_t *olen ) \ +{ \ + const TYPE_T *cur = LIST; \ + while( cur->descriptor.asn1 != NULL ) { \ + if( cur->ATTR1 == ATTR1 && cur->ATTR2 == ATTR2 ) { \ + *oid = cur->descriptor.asn1; \ + *olen = cur->descriptor.asn1_len; \ + return( 0 ); \ + } \ + cur++; \ + } \ + return( MBEDTLS_ERR_OID_NOT_FOUND ); \ +} + +/* + * For X520 attribute types + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + const char *short_name; +} oid_x520_attr_t; + +static const oid_x520_attr_t oid_x520_attr_type[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_AT_CN ), "id-at-commonName", "Common Name" }, + "CN", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_COUNTRY ), "id-at-countryName", "Country" }, + "C", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_LOCALITY ), "id-at-locality", "Locality" }, + "L", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_STATE ), "id-at-state", "State" }, + "ST", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_ORGANIZATION ),"id-at-organizationName", "Organization" }, + "O", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_ORG_UNIT ), "id-at-organizationalUnitName", "Org Unit" }, + "OU", + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS9_EMAIL ), "emailAddress", "E-mail address" }, + "emailAddress", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_SERIAL_NUMBER ),"id-at-serialNumber", "Serial number" }, + "serialNumber", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_POSTAL_ADDRESS ),"id-at-postalAddress", "Postal address" }, + "postalAddress", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_POSTAL_CODE ), "id-at-postalCode", "Postal code" }, + "postalCode", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_SUR_NAME ), "id-at-surName", "Surname" }, + "SN", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_GIVEN_NAME ), "id-at-givenName", "Given name" }, + "GN", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_INITIALS ), "id-at-initials", "Initials" }, + "initials", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_GENERATION_QUALIFIER ), "id-at-generationQualifier", "Generation qualifier" }, + "generationQualifier", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_TITLE ), "id-at-title", "Title" }, + "title", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_DN_QUALIFIER ),"id-at-dnQualifier", "Distinguished Name qualifier" }, + "dnQualifier", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_PSEUDONYM ), "id-at-pseudonym", "Pseudonym" }, + "pseudonym", + }, + { + { ADD_LEN( MBEDTLS_OID_DOMAIN_COMPONENT ), "id-domainComponent", "Domain component" }, + "DC", + }, + { + { ADD_LEN( MBEDTLS_OID_AT_UNIQUE_IDENTIFIER ), "id-at-uniqueIdentifier", "Unique Identifier" }, + "uniqueIdentifier", + }, + { + { NULL, 0, NULL, NULL }, + NULL, + } +}; + +FN_OID_TYPED_FROM_ASN1(oid_x520_attr_t, x520_attr, oid_x520_attr_type) +FN_OID_GET_ATTR1(mbedtls_oid_get_attr_short_name, oid_x520_attr_t, x520_attr, const char *, short_name) + +#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C) +/* + * For X509 extensions + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + int ext_type; +} oid_x509_ext_t; + +static const oid_x509_ext_t oid_x509_ext[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_BASIC_CONSTRAINTS ), "id-ce-basicConstraints", "Basic Constraints" }, + MBEDTLS_X509_EXT_BASIC_CONSTRAINTS, + }, + { + { ADD_LEN( MBEDTLS_OID_KEY_USAGE ), "id-ce-keyUsage", "Key Usage" }, + MBEDTLS_X509_EXT_KEY_USAGE, + }, + { + { ADD_LEN( MBEDTLS_OID_EXTENDED_KEY_USAGE ), "id-ce-extKeyUsage", "Extended Key Usage" }, + MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE, + }, + { + { ADD_LEN( MBEDTLS_OID_SUBJECT_ALT_NAME ), "id-ce-subjectAltName", "Subject Alt Name" }, + MBEDTLS_X509_EXT_SUBJECT_ALT_NAME, + }, + { + { ADD_LEN( MBEDTLS_OID_NS_CERT_TYPE ), "id-netscape-certtype", "Netscape Certificate Type" }, + MBEDTLS_X509_EXT_NS_CERT_TYPE, + }, + { + { NULL, 0, NULL, NULL }, + 0, + }, +}; + +FN_OID_TYPED_FROM_ASN1(oid_x509_ext_t, x509_ext, oid_x509_ext) +FN_OID_GET_ATTR1(mbedtls_oid_get_x509_ext_type, oid_x509_ext_t, x509_ext, int, ext_type) + +static const mbedtls_oid_descriptor_t oid_ext_key_usage[] ICACHE_RODATA_ATTR = +{ + { ADD_LEN( MBEDTLS_OID_SERVER_AUTH ), "id-kp-serverAuth", "TLS Web Server Authentication" }, + { ADD_LEN( MBEDTLS_OID_CLIENT_AUTH ), "id-kp-clientAuth", "TLS Web Client Authentication" }, + { ADD_LEN( MBEDTLS_OID_CODE_SIGNING ), "id-kp-codeSigning", "Code Signing" }, + { ADD_LEN( MBEDTLS_OID_EMAIL_PROTECTION ), "id-kp-emailProtection", "E-mail Protection" }, + { ADD_LEN( MBEDTLS_OID_TIME_STAMPING ), "id-kp-timeStamping", "Time Stamping" }, + { ADD_LEN( MBEDTLS_OID_OCSP_SIGNING ), "id-kp-OCSPSigning", "OCSP Signing" }, + { NULL, 0, NULL, NULL }, +}; + +FN_OID_TYPED_FROM_ASN1(mbedtls_oid_descriptor_t, ext_key_usage, oid_ext_key_usage) +FN_OID_GET_ATTR1(mbedtls_oid_get_extended_key_usage, mbedtls_oid_descriptor_t, ext_key_usage, const char *, description) +#endif /* MBEDTLS_X509_USE_C || MBEDTLS_X509_CREATE_C */ + +#if defined(MBEDTLS_MD_C) +/* + * For SignatureAlgorithmIdentifier + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + mbedtls_md_type_t md_alg; + mbedtls_pk_type_t pk_alg; +} oid_sig_alg_t; + +static const oid_sig_alg_t oid_sig_alg[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_PKCS1_MD2 ), "md2WithRSAEncryption", "RSA with MD2" }, + MBEDTLS_MD_MD2, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS1_MD4 ), "md4WithRSAEncryption", "RSA with MD4" }, + MBEDTLS_MD_MD4, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS1_MD5 ), "md5WithRSAEncryption", "RSA with MD5" }, + MBEDTLS_MD_MD5, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS1_SHA1 ), "sha-1WithRSAEncryption", "RSA with SHA1" }, + MBEDTLS_MD_SHA1, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS1_SHA224 ), "sha224WithRSAEncryption", "RSA with SHA-224" }, + MBEDTLS_MD_SHA224, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS1_SHA256 ), "sha256WithRSAEncryption", "RSA with SHA-256" }, + MBEDTLS_MD_SHA256, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS1_SHA384 ), "sha384WithRSAEncryption", "RSA with SHA-384" }, + MBEDTLS_MD_SHA384, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS1_SHA512 ), "sha512WithRSAEncryption", "RSA with SHA-512" }, + MBEDTLS_MD_SHA512, MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_RSA_SHA_OBS ), "sha-1WithRSAEncryption", "RSA with SHA1" }, + MBEDTLS_MD_SHA1, MBEDTLS_PK_RSA, + }, +// { +// { ADD_LEN( MBEDTLS_OID_ECDSA_SHA1 ), "ecdsa-with-SHA1", "ECDSA with SHA1" }, +// MBEDTLS_MD_SHA1, MBEDTLS_PK_ECDSA, +// }, +// { +// { ADD_LEN( MBEDTLS_OID_ECDSA_SHA224 ), "ecdsa-with-SHA224", "ECDSA with SHA224" }, +// MBEDTLS_MD_SHA224, MBEDTLS_PK_ECDSA, +// }, +// { +// { ADD_LEN( MBEDTLS_OID_ECDSA_SHA256 ), "ecdsa-with-SHA256", "ECDSA with SHA256" }, +// MBEDTLS_MD_SHA256, MBEDTLS_PK_ECDSA, +// }, +// { +// { ADD_LEN( MBEDTLS_OID_ECDSA_SHA384 ), "ecdsa-with-SHA384", "ECDSA with SHA384" }, +// MBEDTLS_MD_SHA384, MBEDTLS_PK_ECDSA, +// }, +// { +// { ADD_LEN( MBEDTLS_OID_ECDSA_SHA512 ), "ecdsa-with-SHA512", "ECDSA with SHA512" }, +// MBEDTLS_MD_SHA512, MBEDTLS_PK_ECDSA, +// }, + { + { ADD_LEN( MBEDTLS_OID_RSASSA_PSS ), "RSASSA-PSS", "RSASSA-PSS" }, + MBEDTLS_MD_NONE, MBEDTLS_PK_RSASSA_PSS, + }, + { + { NULL, 0, NULL, NULL }, + MBEDTLS_MD_NONE, MBEDTLS_PK_NONE, + }, +}; + +FN_OID_TYPED_FROM_ASN1(oid_sig_alg_t, sig_alg, oid_sig_alg) +FN_OID_GET_DESCRIPTOR_ATTR1(mbedtls_oid_get_sig_alg_desc, oid_sig_alg_t, sig_alg, const char *, description) +FN_OID_GET_ATTR2(mbedtls_oid_get_sig_alg, oid_sig_alg_t, sig_alg, mbedtls_md_type_t, md_alg, mbedtls_pk_type_t, pk_alg) +FN_OID_GET_OID_BY_ATTR2(mbedtls_oid_get_oid_by_sig_alg, oid_sig_alg_t, oid_sig_alg, mbedtls_pk_type_t, pk_alg, mbedtls_md_type_t, md_alg) +#endif /* MBEDTLS_MD_C */ + +/* + * For PublicKeyInfo (PKCS1, RFC 5480) + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + mbedtls_pk_type_t pk_alg; +} oid_pk_alg_t; + +static const oid_pk_alg_t oid_pk_alg[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_PKCS1_RSA ), "rsaEncryption", "RSA" }, + MBEDTLS_PK_RSA, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_ALG_UNRESTRICTED ), "id-ecPublicKey", "Generic EC key" }, + MBEDTLS_PK_ECKEY, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_ALG_ECDH ), "id-ecDH", "EC key for ECDH" }, + MBEDTLS_PK_ECKEY_DH, + }, + { + { NULL, 0, NULL, NULL }, + MBEDTLS_PK_NONE, + }, +}; + +FN_OID_TYPED_FROM_ASN1(oid_pk_alg_t, pk_alg, oid_pk_alg) +FN_OID_GET_ATTR1(mbedtls_oid_get_pk_alg, oid_pk_alg_t, pk_alg, mbedtls_pk_type_t, pk_alg) +FN_OID_GET_OID_BY_ATTR1(mbedtls_oid_get_oid_by_pk_alg, oid_pk_alg_t, oid_pk_alg, mbedtls_pk_type_t, pk_alg) + +#if defined(MBEDTLS_ECP_C) +/* + * For namedCurve (RFC 5480) + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + mbedtls_ecp_group_id grp_id; +} oid_ecp_grp_t; + +static const oid_ecp_grp_t oid_ecp_grp[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP192R1 ), "secp192r1", "secp192r1" }, + MBEDTLS_ECP_DP_SECP192R1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP224R1 ), "secp224r1", "secp224r1" }, + MBEDTLS_ECP_DP_SECP224R1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP256R1 ), "secp256r1", "secp256r1" }, + MBEDTLS_ECP_DP_SECP256R1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP384R1 ), "secp384r1", "secp384r1" }, + MBEDTLS_ECP_DP_SECP384R1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP521R1 ), "secp521r1", "secp521r1" }, + MBEDTLS_ECP_DP_SECP521R1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP192K1 ), "secp192k1", "secp192k1" }, + MBEDTLS_ECP_DP_SECP192K1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP224K1 ), "secp224k1", "secp224k1" }, + MBEDTLS_ECP_DP_SECP224K1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_SECP256K1 ), "secp256k1", "secp256k1" }, + MBEDTLS_ECP_DP_SECP256K1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_BP256R1 ), "brainpoolP256r1","brainpool256r1" }, + MBEDTLS_ECP_DP_BP256R1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_BP384R1 ), "brainpoolP384r1","brainpool384r1" }, + MBEDTLS_ECP_DP_BP384R1, + }, + { + { ADD_LEN( MBEDTLS_OID_EC_GRP_BP512R1 ), "brainpoolP512r1","brainpool512r1" }, + MBEDTLS_ECP_DP_BP512R1, + }, + { + { NULL, 0, NULL, NULL }, + MBEDTLS_ECP_DP_NONE, + }, +}; + +FN_OID_TYPED_FROM_ASN1(oid_ecp_grp_t, grp_id, oid_ecp_grp) +FN_OID_GET_ATTR1(mbedtls_oid_get_ec_grp, oid_ecp_grp_t, grp_id, mbedtls_ecp_group_id, grp_id) +FN_OID_GET_OID_BY_ATTR1(mbedtls_oid_get_oid_by_ec_grp, oid_ecp_grp_t, oid_ecp_grp, mbedtls_ecp_group_id, grp_id) +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_CIPHER_C) +/* + * For PKCS#5 PBES2 encryption algorithm + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + mbedtls_cipher_type_t cipher_alg; +} oid_cipher_alg_t; + +static const oid_cipher_alg_t oid_cipher_alg[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_DES_CBC ), "desCBC", "DES-CBC" }, + MBEDTLS_CIPHER_DES_CBC, + }, + { + { ADD_LEN( MBEDTLS_OID_DES_EDE3_CBC ), "des-ede3-cbc", "DES-EDE3-CBC" }, + MBEDTLS_CIPHER_DES_EDE3_CBC, + }, + { + { NULL, 0, NULL, NULL }, + MBEDTLS_CIPHER_NONE, + }, +}; + +FN_OID_TYPED_FROM_ASN1(oid_cipher_alg_t, cipher_alg, oid_cipher_alg) +FN_OID_GET_ATTR1(mbedtls_oid_get_cipher_alg, oid_cipher_alg_t, cipher_alg, mbedtls_cipher_type_t, cipher_alg) +#endif /* MBEDTLS_CIPHER_C */ + +#if defined(MBEDTLS_MD_C) +/* + * For digestAlgorithm + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + mbedtls_md_type_t md_alg; +} oid_md_alg_t; + +static const oid_md_alg_t oid_md_alg[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_MD2 ), "id-md2", "MD2" }, + MBEDTLS_MD_MD2, + }, + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_MD4 ), "id-md4", "MD4" }, + MBEDTLS_MD_MD4, + }, + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_MD5 ), "id-md5", "MD5" }, + MBEDTLS_MD_MD5, + }, + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_SHA1 ), "id-sha1", "SHA-1" }, + MBEDTLS_MD_SHA1, + }, + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_SHA224 ), "id-sha224", "SHA-224" }, + MBEDTLS_MD_SHA224, + }, + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_SHA256 ), "id-sha256", "SHA-256" }, + MBEDTLS_MD_SHA256, + }, + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_SHA384 ), "id-sha384", "SHA-384" }, + MBEDTLS_MD_SHA384, + }, + { + { ADD_LEN( MBEDTLS_OID_DIGEST_ALG_SHA512 ), "id-sha512", "SHA-512" }, + MBEDTLS_MD_SHA512, + }, + { + { NULL, 0, NULL, NULL }, + MBEDTLS_MD_NONE, + }, +}; + +FN_OID_TYPED_FROM_ASN1(oid_md_alg_t, md_alg, oid_md_alg) +FN_OID_GET_ATTR1(mbedtls_oid_get_md_alg, oid_md_alg_t, md_alg, mbedtls_md_type_t, md_alg) +FN_OID_GET_OID_BY_ATTR1(mbedtls_oid_get_oid_by_md, oid_md_alg_t, oid_md_alg, mbedtls_md_type_t, md_alg) +#endif /* MBEDTLS_MD_C */ + +#if defined(MBEDTLS_PKCS12_C) +/* + * For PKCS#12 PBEs + */ +typedef struct { + mbedtls_oid_descriptor_t descriptor; + mbedtls_md_type_t md_alg; + mbedtls_cipher_type_t cipher_alg; +} oid_pkcs12_pbe_alg_t; + +static const oid_pkcs12_pbe_alg_t oid_pkcs12_pbe_alg[] ICACHE_RODATA_ATTR = +{ + { + { ADD_LEN( MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC ), "pbeWithSHAAnd3-KeyTripleDES-CBC", "PBE with SHA1 and 3-Key 3DES" }, + MBEDTLS_MD_SHA1, MBEDTLS_CIPHER_DES_EDE3_CBC, + }, + { + { ADD_LEN( MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC ), "pbeWithSHAAnd2-KeyTripleDES-CBC", "PBE with SHA1 and 2-Key 3DES" }, + MBEDTLS_MD_SHA1, MBEDTLS_CIPHER_DES_EDE_CBC, + }, + { + { NULL, 0, NULL, NULL }, + MBEDTLS_MD_NONE, MBEDTLS_CIPHER_NONE, + }, +}; + +FN_OID_TYPED_FROM_ASN1(oid_pkcs12_pbe_alg_t, pkcs12_pbe_alg, oid_pkcs12_pbe_alg) +FN_OID_GET_ATTR2(mbedtls_oid_get_pkcs12_pbe_alg, oid_pkcs12_pbe_alg_t, pkcs12_pbe_alg, mbedtls_md_type_t, md_alg, mbedtls_cipher_type_t, cipher_alg) +#endif /* MBEDTLS_PKCS12_C */ + +#define OID_SAFE_SNPRINTF \ + do { \ + if( ret < 0 || (size_t) ret >= n ) \ + return( MBEDTLS_ERR_OID_BUF_TOO_SMALL ); \ + \ + n -= (size_t) ret; \ + p += (size_t) ret; \ + } while( 0 ) + +/* Return the x.y.z.... style numeric string for the given OID */ +int mbedtls_oid_get_numeric_string( char *buf, size_t size, + const mbedtls_asn1_buf *oid ) +{ + int ret; + size_t i, n; + unsigned int value; + char *p; + + p = buf; + n = size; + + /* First byte contains first two dots */ + if( oid->len > 0 ) + { + ret = mbedtls_snprintf( p, n, "%d.%d", oid->p[0] / 40, oid->p[0] % 40 ); + OID_SAFE_SNPRINTF; + } + + value = 0; + for( i = 1; i < oid->len; i++ ) + { + /* Prevent overflow in value. */ + if( ( ( value << 7 ) >> 7 ) != value ) + return( MBEDTLS_ERR_OID_BUF_TOO_SMALL ); + + value <<= 7; + value += oid->p[i] & 0x7F; + + if( !( oid->p[i] & 0x80 ) ) + { + /* Last byte */ + ret = mbedtls_snprintf( p, n, ".%d", value ); + OID_SAFE_SNPRINTF; + value = 0; + } + } + + return( (int) ( size - n ) ); +} + +#endif /* MBEDTLS_OID_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/padlock.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/padlock.c new file mode 100644 index 0000000..b85ff9c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/padlock.c @@ -0,0 +1,170 @@ +/* + * VIA PadLock support functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * This implementation is based on the VIA PadLock Programming Guide: + * + * http://www.via.com.tw/en/downloads/whitepapers/initiatives/padlock/ + * programming_guide.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PADLOCK_C) + +#include "mbedtls/padlock.h" + +#include + +#ifndef asm +#define asm __asm +#endif + +#if defined(MBEDTLS_HAVE_X86) + +/* + * PadLock detection routine + */ +int mbedtls_padlock_has_support( int feature ) +{ + static int flags = -1; + int ebx = 0, edx = 0; + + if( flags == -1 ) + { + asm( "movl %%ebx, %0 \n\t" + "movl $0xC0000000, %%eax \n\t" + "cpuid \n\t" + "cmpl $0xC0000001, %%eax \n\t" + "movl $0, %%edx \n\t" + "jb unsupported \n\t" + "movl $0xC0000001, %%eax \n\t" + "cpuid \n\t" + "unsupported: \n\t" + "movl %%edx, %1 \n\t" + "movl %2, %%ebx \n\t" + : "=m" (ebx), "=m" (edx) + : "m" (ebx) + : "eax", "ecx", "edx" ); + + flags = edx; + } + + return( flags & feature ); +} + +/* + * PadLock AES-ECB block en(de)cryption + */ +int mbedtls_padlock_xcryptecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ) +{ + int ebx = 0; + uint32_t *rk; + uint32_t *blk; + uint32_t *ctrl; + unsigned char buf[256]; + + rk = ctx->rk; + blk = MBEDTLS_PADLOCK_ALIGN16( buf ); + memcpy( blk, input, 16 ); + + ctrl = blk + 4; + *ctrl = 0x80 | ctx->nr | ( ( ctx->nr + ( mode^1 ) - 10 ) << 9 ); + + asm( "pushfl \n\t" + "popfl \n\t" + "movl %%ebx, %0 \n\t" + "movl $1, %%ecx \n\t" + "movl %2, %%edx \n\t" + "movl %3, %%ebx \n\t" + "movl %4, %%esi \n\t" + "movl %4, %%edi \n\t" + ".byte 0xf3,0x0f,0xa7,0xc8 \n\t" + "movl %1, %%ebx \n\t" + : "=m" (ebx) + : "m" (ebx), "m" (ctrl), "m" (rk), "m" (blk) + : "memory", "ecx", "edx", "esi", "edi" ); + + memcpy( output, blk, 16 ); + + return( 0 ); +} + +/* + * PadLock AES-CBC buffer en(de)cryption + */ +int mbedtls_padlock_xcryptcbc( mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ) +{ + int ebx = 0; + size_t count; + uint32_t *rk; + uint32_t *iw; + uint32_t *ctrl; + unsigned char buf[256]; + + if( ( (long) input & 15 ) != 0 || + ( (long) output & 15 ) != 0 ) + return( MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED ); + + rk = ctx->rk; + iw = MBEDTLS_PADLOCK_ALIGN16( buf ); + memcpy( iw, iv, 16 ); + + ctrl = iw + 4; + *ctrl = 0x80 | ctx->nr | ( ( ctx->nr + ( mode ^ 1 ) - 10 ) << 9 ); + + count = ( length + 15 ) >> 4; + + asm( "pushfl \n\t" + "popfl \n\t" + "movl %%ebx, %0 \n\t" + "movl %2, %%ecx \n\t" + "movl %3, %%edx \n\t" + "movl %4, %%ebx \n\t" + "movl %5, %%esi \n\t" + "movl %6, %%edi \n\t" + "movl %7, %%eax \n\t" + ".byte 0xf3,0x0f,0xa7,0xd0 \n\t" + "movl %1, %%ebx \n\t" + : "=m" (ebx) + : "m" (ebx), "m" (count), "m" (ctrl), + "m" (rk), "m" (input), "m" (output), "m" (iw) + : "memory", "eax", "ecx", "edx", "esi", "edi" ); + + memcpy( iv, iw, 16 ); + + return( 0 ); +} + +#endif /* MBEDTLS_HAVE_X86 */ + +#endif /* MBEDTLS_PADLOCK_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pem.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pem.c new file mode 100644 index 0000000..1ee3966 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pem.c @@ -0,0 +1,447 @@ +/* + * Privacy Enhanced Mail (PEM) decoding + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PEM_PARSE_C) || defined(MBEDTLS_PEM_WRITE_C) + +#include "mbedtls/pem.h" +#include "mbedtls/base64.h" +#include "mbedtls/des.h" +#include "mbedtls/aes.h" +#include "mbedtls/md5.h" +#include "mbedtls/cipher.h" + +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +#if defined(MBEDTLS_PEM_PARSE_C) +void mbedtls_pem_init( mbedtls_pem_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_pem_context ) ); +} + +#if defined(MBEDTLS_MD5_C) && defined(MBEDTLS_CIPHER_MODE_CBC) && \ + ( defined(MBEDTLS_DES_C) || defined(MBEDTLS_AES_C) ) +/* + * Read a 16-byte hex string and convert it to binary + */ +static int pem_get_iv( const unsigned char *s, unsigned char *iv, + size_t iv_len ) +{ + size_t i, j, k; + + memset( iv, 0, iv_len ); + + for( i = 0; i < iv_len * 2; i++, s++ ) + { + if( *s >= '0' && *s <= '9' ) j = *s - '0'; else + if( *s >= 'A' && *s <= 'F' ) j = *s - '7'; else + if( *s >= 'a' && *s <= 'f' ) j = *s - 'W'; else + return( MBEDTLS_ERR_PEM_INVALID_ENC_IV ); + + k = ( ( i & 1 ) != 0 ) ? j : j << 4; + + iv[i >> 1] = (unsigned char)( iv[i >> 1] | k ); + } + + return( 0 ); +} + +static void pem_pbkdf1( unsigned char *key, size_t keylen, + unsigned char *iv, + const unsigned char *pwd, size_t pwdlen ) +{ + mbedtls_md5_context md5_ctx; + unsigned char md5sum[16]; + size_t use_len; + + mbedtls_md5_init( &md5_ctx ); + + /* + * key[ 0..15] = MD5(pwd || IV) + */ + mbedtls_md5_starts( &md5_ctx ); + mbedtls_md5_update( &md5_ctx, pwd, pwdlen ); + mbedtls_md5_update( &md5_ctx, iv, 8 ); + mbedtls_md5_finish( &md5_ctx, md5sum ); + + if( keylen <= 16 ) + { + memcpy( key, md5sum, keylen ); + + mbedtls_md5_free( &md5_ctx ); + mbedtls_zeroize( md5sum, 16 ); + return; + } + + memcpy( key, md5sum, 16 ); + + /* + * key[16..23] = MD5(key[ 0..15] || pwd || IV]) + */ + mbedtls_md5_starts( &md5_ctx ); + mbedtls_md5_update( &md5_ctx, md5sum, 16 ); + mbedtls_md5_update( &md5_ctx, pwd, pwdlen ); + mbedtls_md5_update( &md5_ctx, iv, 8 ); + mbedtls_md5_finish( &md5_ctx, md5sum ); + + use_len = 16; + if( keylen < 32 ) + use_len = keylen - 16; + + memcpy( key + 16, md5sum, use_len ); + + mbedtls_md5_free( &md5_ctx ); + mbedtls_zeroize( md5sum, 16 ); +} + +#if defined(MBEDTLS_DES_C) +/* + * Decrypt with DES-CBC, using PBKDF1 for key derivation + */ +static void pem_des_decrypt( unsigned char des_iv[8], + unsigned char *buf, size_t buflen, + const unsigned char *pwd, size_t pwdlen ) +{ + mbedtls_des_context des_ctx; + unsigned char des_key[8]; + + mbedtls_des_init( &des_ctx ); + + pem_pbkdf1( des_key, 8, des_iv, pwd, pwdlen ); + + mbedtls_des_setkey_dec( &des_ctx, des_key ); + mbedtls_des_crypt_cbc( &des_ctx, MBEDTLS_DES_DECRYPT, buflen, + des_iv, buf, buf ); + + mbedtls_des_free( &des_ctx ); + mbedtls_zeroize( des_key, 8 ); +} + +/* + * Decrypt with 3DES-CBC, using PBKDF1 for key derivation + */ +static void pem_des3_decrypt( unsigned char des3_iv[8], + unsigned char *buf, size_t buflen, + const unsigned char *pwd, size_t pwdlen ) +{ + mbedtls_des3_context des3_ctx; + unsigned char des3_key[24]; + + mbedtls_des3_init( &des3_ctx ); + + pem_pbkdf1( des3_key, 24, des3_iv, pwd, pwdlen ); + + mbedtls_des3_set3key_dec( &des3_ctx, des3_key ); + mbedtls_des3_crypt_cbc( &des3_ctx, MBEDTLS_DES_DECRYPT, buflen, + des3_iv, buf, buf ); + + mbedtls_des3_free( &des3_ctx ); + mbedtls_zeroize( des3_key, 24 ); +} +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_AES_C) +/* + * Decrypt with AES-XXX-CBC, using PBKDF1 for key derivation + */ +static void pem_aes_decrypt( unsigned char aes_iv[16], unsigned int keylen, + unsigned char *buf, size_t buflen, + const unsigned char *pwd, size_t pwdlen ) +{ + mbedtls_aes_context aes_ctx; + unsigned char aes_key[32]; + + mbedtls_aes_init( &aes_ctx ); + + pem_pbkdf1( aes_key, keylen, aes_iv, pwd, pwdlen ); + + mbedtls_aes_setkey_dec( &aes_ctx, aes_key, keylen * 8 ); + mbedtls_aes_crypt_cbc( &aes_ctx, MBEDTLS_AES_DECRYPT, buflen, + aes_iv, buf, buf ); + + mbedtls_aes_free( &aes_ctx ); + mbedtls_zeroize( aes_key, keylen ); +} +#endif /* MBEDTLS_AES_C */ + +#endif /* MBEDTLS_MD5_C && MBEDTLS_CIPHER_MODE_CBC && + ( MBEDTLS_AES_C || MBEDTLS_DES_C ) */ + +int mbedtls_pem_read_buffer( mbedtls_pem_context *ctx, const char *header, const char *footer, + const unsigned char *data, const unsigned char *pwd, + size_t pwdlen, size_t *use_len ) +{ + int ret, enc; + size_t len; + unsigned char *buf; + const unsigned char *s1, *s2, *end; +#if defined(MBEDTLS_MD5_C) && defined(MBEDTLS_CIPHER_MODE_CBC) && \ + ( defined(MBEDTLS_DES_C) || defined(MBEDTLS_AES_C) ) + unsigned char pem_iv[16]; + mbedtls_cipher_type_t enc_alg = MBEDTLS_CIPHER_NONE; +#else + ((void) pwd); + ((void) pwdlen); +#endif /* MBEDTLS_MD5_C && MBEDTLS_CIPHER_MODE_CBC && + ( MBEDTLS_AES_C || MBEDTLS_DES_C ) */ + + if( ctx == NULL ) + return( MBEDTLS_ERR_PEM_BAD_INPUT_DATA ); + + s1 = (unsigned char *) strstr( (const char *) data, header ); + + if( s1 == NULL ) + return( MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ); + + s2 = (unsigned char *) strstr( (const char *) data, footer ); + + if( s2 == NULL || s2 <= s1 ) + return( MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ); + + s1 += strlen( header ); + if( *s1 == ' ' ) s1++; + if( *s1 == '\r' ) s1++; + if( *s1 == '\n' ) s1++; + else return( MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ); + + end = s2; + end += strlen( footer ); + if( *end == ' ' ) end++; + if( *end == '\r' ) end++; + if( *end == '\n' ) end++; + *use_len = end - data; + + enc = 0; + + if( memcmp( s1, "Proc-Type: 4,ENCRYPTED", 22 ) == 0 ) + { +#if defined(MBEDTLS_MD5_C) && defined(MBEDTLS_CIPHER_MODE_CBC) && \ + ( defined(MBEDTLS_DES_C) || defined(MBEDTLS_AES_C) ) + enc++; + + s1 += 22; + if( *s1 == '\r' ) s1++; + if( *s1 == '\n' ) s1++; + else return( MBEDTLS_ERR_PEM_INVALID_DATA ); + + +#if defined(MBEDTLS_DES_C) + if( memcmp( s1, "DEK-Info: DES-EDE3-CBC,", 23 ) == 0 ) + { + enc_alg = MBEDTLS_CIPHER_DES_EDE3_CBC; + + s1 += 23; + if( pem_get_iv( s1, pem_iv, 8 ) != 0 ) + return( MBEDTLS_ERR_PEM_INVALID_ENC_IV ); + + s1 += 16; + } + else if( memcmp( s1, "DEK-Info: DES-CBC,", 18 ) == 0 ) + { + enc_alg = MBEDTLS_CIPHER_DES_CBC; + + s1 += 18; + if( pem_get_iv( s1, pem_iv, 8) != 0 ) + return( MBEDTLS_ERR_PEM_INVALID_ENC_IV ); + + s1 += 16; + } +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_AES_C) + if( memcmp( s1, "DEK-Info: AES-", 14 ) == 0 ) + { + if( memcmp( s1, "DEK-Info: AES-128-CBC,", 22 ) == 0 ) + enc_alg = MBEDTLS_CIPHER_AES_128_CBC; + else if( memcmp( s1, "DEK-Info: AES-192-CBC,", 22 ) == 0 ) + enc_alg = MBEDTLS_CIPHER_AES_192_CBC; + else if( memcmp( s1, "DEK-Info: AES-256-CBC,", 22 ) == 0 ) + enc_alg = MBEDTLS_CIPHER_AES_256_CBC; + else + return( MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG ); + + s1 += 22; + if( pem_get_iv( s1, pem_iv, 16 ) != 0 ) + return( MBEDTLS_ERR_PEM_INVALID_ENC_IV ); + + s1 += 32; + } +#endif /* MBEDTLS_AES_C */ + + if( enc_alg == MBEDTLS_CIPHER_NONE ) + return( MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG ); + + if( *s1 == '\r' ) s1++; + if( *s1 == '\n' ) s1++; + else return( MBEDTLS_ERR_PEM_INVALID_DATA ); +#else + return( MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE ); +#endif /* MBEDTLS_MD5_C && MBEDTLS_CIPHER_MODE_CBC && + ( MBEDTLS_AES_C || MBEDTLS_DES_C ) */ + } + + if( s1 == s2 ) + return( MBEDTLS_ERR_PEM_INVALID_DATA ); + + ret = mbedtls_base64_decode( NULL, 0, &len, s1, s2 - s1 ); + + if( ret == MBEDTLS_ERR_BASE64_INVALID_CHARACTER ) + return( MBEDTLS_ERR_PEM_INVALID_DATA + ret ); + + if( ( buf = mbedtls_calloc( 1, len ) ) == NULL ) + return( MBEDTLS_ERR_PEM_ALLOC_FAILED ); + + if( ( ret = mbedtls_base64_decode( buf, len, &len, s1, s2 - s1 ) ) != 0 ) + { + mbedtls_free( buf ); + return( MBEDTLS_ERR_PEM_INVALID_DATA + ret ); + } + + if( enc != 0 ) + { +#if defined(MBEDTLS_MD5_C) && defined(MBEDTLS_CIPHER_MODE_CBC) && \ + ( defined(MBEDTLS_DES_C) || defined(MBEDTLS_AES_C) ) + if( pwd == NULL ) + { + mbedtls_free( buf ); + return( MBEDTLS_ERR_PEM_PASSWORD_REQUIRED ); + } + +#if defined(MBEDTLS_DES_C) + if( enc_alg == MBEDTLS_CIPHER_DES_EDE3_CBC ) + pem_des3_decrypt( pem_iv, buf, len, pwd, pwdlen ); + else if( enc_alg == MBEDTLS_CIPHER_DES_CBC ) + pem_des_decrypt( pem_iv, buf, len, pwd, pwdlen ); +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_AES_C) + if( enc_alg == MBEDTLS_CIPHER_AES_128_CBC ) + pem_aes_decrypt( pem_iv, 16, buf, len, pwd, pwdlen ); + else if( enc_alg == MBEDTLS_CIPHER_AES_192_CBC ) + pem_aes_decrypt( pem_iv, 24, buf, len, pwd, pwdlen ); + else if( enc_alg == MBEDTLS_CIPHER_AES_256_CBC ) + pem_aes_decrypt( pem_iv, 32, buf, len, pwd, pwdlen ); +#endif /* MBEDTLS_AES_C */ + + /* + * The result will be ASN.1 starting with a SEQUENCE tag, with 1 to 3 + * length bytes (allow 4 to be sure) in all known use cases. + * + * Use that as heurisitic to try detecting password mismatchs. + */ + if( len <= 2 || buf[0] != 0x30 || buf[1] > 0x83 ) + { + mbedtls_free( buf ); + return( MBEDTLS_ERR_PEM_PASSWORD_MISMATCH ); + } +#else + mbedtls_free( buf ); + return( MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE ); +#endif /* MBEDTLS_MD5_C && MBEDTLS_CIPHER_MODE_CBC && + ( MBEDTLS_AES_C || MBEDTLS_DES_C ) */ + } + + ctx->buf = buf; + ctx->buflen = len; + + return( 0 ); +} + +void mbedtls_pem_free( mbedtls_pem_context *ctx ) +{ + mbedtls_free( ctx->buf ); + mbedtls_free( ctx->info ); + + mbedtls_zeroize( ctx, sizeof( mbedtls_pem_context ) ); +} +#endif /* MBEDTLS_PEM_PARSE_C */ + +#if defined(MBEDTLS_PEM_WRITE_C) +int mbedtls_pem_write_buffer( const char *header, const char *footer, + const unsigned char *der_data, size_t der_len, + unsigned char *buf, size_t buf_len, size_t *olen ) +{ + int ret; + unsigned char *encode_buf, *c, *p = buf; + size_t len = 0, use_len, add_len = 0; + + mbedtls_base64_encode( NULL, 0, &use_len, der_data, der_len ); + add_len = strlen( header ) + strlen( footer ) + ( use_len / 64 ) + 1; + + if( use_len + add_len > buf_len ) + { + *olen = use_len + add_len; + return( MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL ); + } + + if( ( encode_buf = mbedtls_calloc( 1, use_len ) ) == NULL ) + return( MBEDTLS_ERR_PEM_ALLOC_FAILED ); + + if( ( ret = mbedtls_base64_encode( encode_buf, use_len, &use_len, der_data, + der_len ) ) != 0 ) + { + mbedtls_free( encode_buf ); + return( ret ); + } + + memcpy( p, header, strlen( header ) ); + p += strlen( header ); + c = encode_buf; + + while( use_len ) + { + len = ( use_len > 64 ) ? 64 : use_len; + memcpy( p, c, len ); + use_len -= len; + p += len; + c += len; + *p++ = '\n'; + } + + memcpy( p, footer, strlen( footer ) ); + p += strlen( footer ); + + *p++ = '\0'; + *olen = p - buf; + + mbedtls_free( encode_buf ); + return( 0 ); +} +#endif /* MBEDTLS_PEM_WRITE_C */ +#endif /* MBEDTLS_PEM_PARSE_C || MBEDTLS_PEM_WRITE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pk.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pk.c new file mode 100644 index 0000000..10bd0a5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pk.c @@ -0,0 +1,374 @@ +/* + * Public Key abstraction layer + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PK_C) +#include "mbedtls/pk.h" +#include "mbedtls/pk_internal.h" + +#if defined(MBEDTLS_RSA_C) +#include "mbedtls/rsa.h" +#endif +#if defined(MBEDTLS_ECP_C) +#include "mbedtls/ecp.h" +#endif +#if defined(MBEDTLS_ECDSA_C) +#include "mbedtls/ecdsa.h" +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Initialise a mbedtls_pk_context + */ +void mbedtls_pk_init( mbedtls_pk_context *ctx ) +{ + if( ctx == NULL ) + return; + + ctx->pk_info = NULL; + ctx->pk_ctx = NULL; +} + +/* + * Free (the components of) a mbedtls_pk_context + */ +void mbedtls_pk_free( mbedtls_pk_context *ctx ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return; + + ctx->pk_info->ctx_free_func( ctx->pk_ctx ); + + mbedtls_zeroize( ctx, sizeof( mbedtls_pk_context ) ); +} + +/* + * Get pk_info structure from type + */ +const mbedtls_pk_info_t * mbedtls_pk_info_from_type( mbedtls_pk_type_t pk_type ) +{ + switch( pk_type ) { +#if defined(MBEDTLS_RSA_C) + case MBEDTLS_PK_RSA: + return( &mbedtls_rsa_info ); +#endif +#if defined(MBEDTLS_ECP_C) + case MBEDTLS_PK_ECKEY: + return( &mbedtls_eckey_info ); + case MBEDTLS_PK_ECKEY_DH: + return( &mbedtls_eckeydh_info ); +#endif +#if defined(MBEDTLS_ECDSA_C) + case MBEDTLS_PK_ECDSA: + return( &mbedtls_ecdsa_info ); +#endif + /* MBEDTLS_PK_RSA_ALT omitted on purpose */ + default: + return( NULL ); + } +} + +/* + * Initialise context + */ +int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info ) +{ + if( ctx == NULL || info == NULL || ctx->pk_info != NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ( ctx->pk_ctx = info->ctx_alloc_func() ) == NULL ) + return( MBEDTLS_ERR_PK_ALLOC_FAILED ); + + ctx->pk_info = info; + + return( 0 ); +} + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/* + * Initialize an RSA-alt context + */ +int mbedtls_pk_setup_rsa_alt( mbedtls_pk_context *ctx, void * key, + mbedtls_pk_rsa_alt_decrypt_func decrypt_func, + mbedtls_pk_rsa_alt_sign_func sign_func, + mbedtls_pk_rsa_alt_key_len_func key_len_func ) +{ + mbedtls_rsa_alt_context *rsa_alt; + const mbedtls_pk_info_t *info = &mbedtls_rsa_alt_info; + + if( ctx == NULL || ctx->pk_info != NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ( ctx->pk_ctx = info->ctx_alloc_func() ) == NULL ) + return( MBEDTLS_ERR_PK_ALLOC_FAILED ); + + ctx->pk_info = info; + + rsa_alt = (mbedtls_rsa_alt_context *) ctx->pk_ctx; + + rsa_alt->key = key; + rsa_alt->decrypt_func = decrypt_func; + rsa_alt->sign_func = sign_func; + rsa_alt->key_len_func = key_len_func; + + return( 0 ); +} +#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */ + +/* + * Tell if a PK can do the operations of the given type + */ +int mbedtls_pk_can_do( const mbedtls_pk_context *ctx, mbedtls_pk_type_t type ) +{ + /* null or NONE context can't do anything */ + if( ctx == NULL || ctx->pk_info == NULL ) + return( 0 ); + + return( ctx->pk_info->can_do( type ) ); +} + +/* + * Helper for mbedtls_pk_sign and mbedtls_pk_verify + */ +static inline int pk_hashlen_helper( mbedtls_md_type_t md_alg, size_t *hash_len ) +{ + const mbedtls_md_info_t *md_info; + + if( *hash_len != 0 ) + return( 0 ); + + if( ( md_info = mbedtls_md_info_from_type( md_alg ) ) == NULL ) + return( -1 ); + + *hash_len = mbedtls_md_get_size( md_info ); + return( 0 ); +} + +/* + * Verify a signature + */ +int mbedtls_pk_verify( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ) +{ + if( ctx == NULL || ctx->pk_info == NULL || + pk_hashlen_helper( md_alg, &hash_len ) != 0 ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ctx->pk_info->verify_func == NULL ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + + return( ctx->pk_info->verify_func( ctx->pk_ctx, md_alg, hash, hash_len, + sig, sig_len ) ); +} + +/* + * Verify a signature with options + */ +int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options, + mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ! mbedtls_pk_can_do( ctx, type ) ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + + if( type == MBEDTLS_PK_RSASSA_PSS ) + { +#if defined(MBEDTLS_RSA_C) && defined(MBEDTLS_PKCS1_V21) + int ret; + const mbedtls_pk_rsassa_pss_options *pss_opts; + + if( options == NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + pss_opts = (const mbedtls_pk_rsassa_pss_options *) options; + + if( sig_len < mbedtls_pk_get_len( ctx ) ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + ret = mbedtls_rsa_rsassa_pss_verify_ext( mbedtls_pk_rsa( *ctx ), + NULL, NULL, MBEDTLS_RSA_PUBLIC, + md_alg, (unsigned int) hash_len, hash, + pss_opts->mgf1_hash_id, + pss_opts->expected_salt_len, + sig ); + if( ret != 0 ) + return( ret ); + + if( sig_len > mbedtls_pk_get_len( ctx ) ) + return( MBEDTLS_ERR_PK_SIG_LEN_MISMATCH ); + + return( 0 ); +#else + return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE ); +#endif + } + + /* General case: no options */ + if( options != NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + return( mbedtls_pk_verify( ctx, md_alg, hash, hash_len, sig, sig_len ) ); +} + +/* + * Make a signature + */ +int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + if( ctx == NULL || ctx->pk_info == NULL || + pk_hashlen_helper( md_alg, &hash_len ) != 0 ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ctx->pk_info->sign_func == NULL ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + + return( ctx->pk_info->sign_func( ctx->pk_ctx, md_alg, hash, hash_len, + sig, sig_len, f_rng, p_rng ) ); +} + +/* + * Decrypt message + */ +int mbedtls_pk_decrypt( mbedtls_pk_context *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ctx->pk_info->decrypt_func == NULL ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + + return( ctx->pk_info->decrypt_func( ctx->pk_ctx, input, ilen, + output, olen, osize, f_rng, p_rng ) ); +} + +/* + * Encrypt message + */ +int mbedtls_pk_encrypt( mbedtls_pk_context *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ctx->pk_info->encrypt_func == NULL ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + + return( ctx->pk_info->encrypt_func( ctx->pk_ctx, input, ilen, + output, olen, osize, f_rng, p_rng ) ); +} + +/* + * Check public-private key pair + */ +int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, const mbedtls_pk_context *prv ) +{ + if( pub == NULL || pub->pk_info == NULL || + prv == NULL || prv->pk_info == NULL || + prv->pk_info->check_pair_func == NULL ) + { + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + } + + if( prv->pk_info->type == MBEDTLS_PK_RSA_ALT ) + { + if( pub->pk_info->type != MBEDTLS_PK_RSA ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + } + else + { + if( pub->pk_info != prv->pk_info ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + } + + return( prv->pk_info->check_pair_func( pub->pk_ctx, prv->pk_ctx ) ); +} + +/* + * Get key size in bits + */ +size_t mbedtls_pk_get_bitlen( const mbedtls_pk_context *ctx ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return( 0 ); + + return( ctx->pk_info->get_bitlen( ctx->pk_ctx ) ); +} + +/* + * Export debug information + */ +int mbedtls_pk_debug( const mbedtls_pk_context *ctx, mbedtls_pk_debug_item *items ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + if( ctx->pk_info->debug_func == NULL ) + return( MBEDTLS_ERR_PK_TYPE_MISMATCH ); + + ctx->pk_info->debug_func( ctx->pk_ctx, items ); + return( 0 ); +} + +/* + * Access the PK type name + */ +const char *mbedtls_pk_get_name( const mbedtls_pk_context *ctx ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return( "invalid PK" ); + + return( ctx->pk_info->name ); +} + +/* + * Access the PK type + */ +mbedtls_pk_type_t mbedtls_pk_get_type( const mbedtls_pk_context *ctx ) +{ + if( ctx == NULL || ctx->pk_info == NULL ) + return( MBEDTLS_PK_NONE ); + + return( ctx->pk_info->type ); +} + +#endif /* MBEDTLS_PK_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pk_wrap.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pk_wrap.c new file mode 100644 index 0000000..626c3b9 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pk_wrap.c @@ -0,0 +1,495 @@ +/* + * Public Key abstraction layer: wrapper functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PK_C) +#include "mbedtls/pk_internal.h" + +/* Even if RSA not activated, for the sake of RSA-alt */ +#include "mbedtls/rsa.h" + +#include + +#if defined(MBEDTLS_ECP_C) +#include "mbedtls/ecp.h" +#endif + +#if defined(MBEDTLS_ECDSA_C) +#include "mbedtls/ecdsa.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} +#endif + +#if defined(MBEDTLS_RSA_C) +static int rsa_can_do( mbedtls_pk_type_t type ) +{ + return( type == MBEDTLS_PK_RSA || + type == MBEDTLS_PK_RSASSA_PSS ); +} + +static size_t rsa_get_bitlen( const void *ctx ) +{ + return( 8 * ((const mbedtls_rsa_context *) ctx)->len ); +} + +static int rsa_verify_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ) +{ + int ret; + + if( sig_len < ((mbedtls_rsa_context *) ctx)->len ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( ( ret = mbedtls_rsa_pkcs1_verify( (mbedtls_rsa_context *) ctx, NULL, NULL, + MBEDTLS_RSA_PUBLIC, md_alg, + (unsigned int) hash_len, hash, sig ) ) != 0 ) + return( ret ); + + if( sig_len > ((mbedtls_rsa_context *) ctx)->len ) + return( MBEDTLS_ERR_PK_SIG_LEN_MISMATCH ); + + return( 0 ); +} + +static int rsa_sign_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + *sig_len = ((mbedtls_rsa_context *) ctx)->len; + + return( mbedtls_rsa_pkcs1_sign( (mbedtls_rsa_context *) ctx, f_rng, p_rng, MBEDTLS_RSA_PRIVATE, + md_alg, (unsigned int) hash_len, hash, sig ) ); +} + +static int rsa_decrypt_wrap( void *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + if( ilen != ((mbedtls_rsa_context *) ctx)->len ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + return( mbedtls_rsa_pkcs1_decrypt( (mbedtls_rsa_context *) ctx, f_rng, p_rng, + MBEDTLS_RSA_PRIVATE, olen, input, output, osize ) ); +} + +static int rsa_encrypt_wrap( void *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + *olen = ((mbedtls_rsa_context *) ctx)->len; + + if( *olen > osize ) + return( MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE ); + + return( mbedtls_rsa_pkcs1_encrypt( (mbedtls_rsa_context *) ctx, + f_rng, p_rng, MBEDTLS_RSA_PUBLIC, ilen, input, output ) ); +} + +static int rsa_check_pair_wrap( const void *pub, const void *prv ) +{ + return( mbedtls_rsa_check_pub_priv( (const mbedtls_rsa_context *) pub, + (const mbedtls_rsa_context *) prv ) ); +} + +static void *rsa_alloc_wrap( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_rsa_context ) ); + + if( ctx != NULL ) + mbedtls_rsa_init( (mbedtls_rsa_context *) ctx, 0, 0 ); + + return( ctx ); +} + +static void rsa_free_wrap( void *ctx ) +{ + mbedtls_rsa_free( (mbedtls_rsa_context *) ctx ); + mbedtls_free( ctx ); +} + +static void rsa_debug( const void *ctx, mbedtls_pk_debug_item *items ) +{ + items->type = MBEDTLS_PK_DEBUG_MPI; + items->name = "rsa.N"; + items->value = &( ((mbedtls_rsa_context *) ctx)->N ); + + items++; + + items->type = MBEDTLS_PK_DEBUG_MPI; + items->name = "rsa.E"; + items->value = &( ((mbedtls_rsa_context *) ctx)->E ); +} + +const mbedtls_pk_info_t mbedtls_rsa_info ICACHE_RODATA_ATTR = { + MBEDTLS_PK_RSA, + "RSA", + rsa_get_bitlen, + rsa_can_do, + rsa_verify_wrap, + rsa_sign_wrap, + rsa_decrypt_wrap, + rsa_encrypt_wrap, + rsa_check_pair_wrap, + rsa_alloc_wrap, + rsa_free_wrap, + rsa_debug, +}; +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) +/* + * Generic EC key + */ +static int eckey_can_do( mbedtls_pk_type_t type ) +{ + return( type == MBEDTLS_PK_ECKEY || + type == MBEDTLS_PK_ECKEY_DH || + type == MBEDTLS_PK_ECDSA ); +} + +static size_t eckey_get_bitlen( const void *ctx ) +{ + return( ((mbedtls_ecp_keypair *) ctx)->grp.pbits ); +} + +#if defined(MBEDTLS_ECDSA_C) +/* Forward declarations */ +static int ecdsa_verify_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ); + +static int ecdsa_sign_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +static int eckey_verify_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ) +{ + int ret; + mbedtls_ecdsa_context ecdsa; + + mbedtls_ecdsa_init( &ecdsa ); + + if( ( ret = mbedtls_ecdsa_from_keypair( &ecdsa, ctx ) ) == 0 ) + ret = ecdsa_verify_wrap( &ecdsa, md_alg, hash, hash_len, sig, sig_len ); + + mbedtls_ecdsa_free( &ecdsa ); + + return( ret ); +} + +static int eckey_sign_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret; + mbedtls_ecdsa_context ecdsa; + + mbedtls_ecdsa_init( &ecdsa ); + + if( ( ret = mbedtls_ecdsa_from_keypair( &ecdsa, ctx ) ) == 0 ) + ret = ecdsa_sign_wrap( &ecdsa, md_alg, hash, hash_len, sig, sig_len, + f_rng, p_rng ); + + mbedtls_ecdsa_free( &ecdsa ); + + return( ret ); +} + +#endif /* MBEDTLS_ECDSA_C */ + +static int eckey_check_pair( const void *pub, const void *prv ) +{ + return( mbedtls_ecp_check_pub_priv( (const mbedtls_ecp_keypair *) pub, + (const mbedtls_ecp_keypair *) prv ) ); +} + +static void *eckey_alloc_wrap( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_ecp_keypair ) ); + + if( ctx != NULL ) + mbedtls_ecp_keypair_init( ctx ); + + return( ctx ); +} + +static void eckey_free_wrap( void *ctx ) +{ + mbedtls_ecp_keypair_free( (mbedtls_ecp_keypair *) ctx ); + mbedtls_free( ctx ); +} + +static void eckey_debug( const void *ctx, mbedtls_pk_debug_item *items ) +{ + items->type = MBEDTLS_PK_DEBUG_ECP; + items->name = "eckey.Q"; + items->value = &( ((mbedtls_ecp_keypair *) ctx)->Q ); +} + +const mbedtls_pk_info_t mbedtls_eckey_info ICACHE_RODATA_ATTR = { + MBEDTLS_PK_ECKEY, + "EC", + eckey_get_bitlen, + eckey_can_do, +#if defined(MBEDTLS_ECDSA_C) + eckey_verify_wrap, + eckey_sign_wrap, +#else + NULL, + NULL, +#endif + NULL, + NULL, + eckey_check_pair, + eckey_alloc_wrap, + eckey_free_wrap, + eckey_debug, +}; + +/* + * EC key restricted to ECDH + */ +static int eckeydh_can_do( mbedtls_pk_type_t type ) +{ + return( type == MBEDTLS_PK_ECKEY || + type == MBEDTLS_PK_ECKEY_DH ); +} + +const mbedtls_pk_info_t mbedtls_eckeydh_info ICACHE_RODATA_ATTR = { + MBEDTLS_PK_ECKEY_DH, + "EC_DH", + eckey_get_bitlen, /* Same underlying key structure */ + eckeydh_can_do, + NULL, + NULL, + NULL, + NULL, + eckey_check_pair, + eckey_alloc_wrap, /* Same underlying key structure */ + eckey_free_wrap, /* Same underlying key structure */ + eckey_debug, /* Same underlying key structure */ +}; +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_ECDSA_C) +static int ecdsa_can_do( mbedtls_pk_type_t type ) +{ + return( type == MBEDTLS_PK_ECDSA ); +} + +static int ecdsa_verify_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ) +{ + int ret; + ((void) md_alg); + + ret = mbedtls_ecdsa_read_signature( (mbedtls_ecdsa_context *) ctx, + hash, hash_len, sig, sig_len ); + + if( ret == MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH ) + return( MBEDTLS_ERR_PK_SIG_LEN_MISMATCH ); + + return( ret ); +} + +static int ecdsa_sign_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + return( mbedtls_ecdsa_write_signature( (mbedtls_ecdsa_context *) ctx, + md_alg, hash, hash_len, sig, sig_len, f_rng, p_rng ) ); +} + +static void *ecdsa_alloc_wrap( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_ecdsa_context ) ); + + if( ctx != NULL ) + mbedtls_ecdsa_init( (mbedtls_ecdsa_context *) ctx ); + + return( ctx ); +} + +static void ecdsa_free_wrap( void *ctx ) +{ + mbedtls_ecdsa_free( (mbedtls_ecdsa_context *) ctx ); + mbedtls_free( ctx ); +} + +const mbedtls_pk_info_t mbedtls_ecdsa_info ICACHE_RODATA_ATTR = { + MBEDTLS_PK_ECDSA, + "ECDSA", + eckey_get_bitlen, /* Compatible key structures */ + ecdsa_can_do, + ecdsa_verify_wrap, + ecdsa_sign_wrap, + NULL, + NULL, + eckey_check_pair, /* Compatible key structures */ + ecdsa_alloc_wrap, + ecdsa_free_wrap, + eckey_debug, /* Compatible key structures */ +}; +#endif /* MBEDTLS_ECDSA_C */ + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/* + * Support for alternative RSA-private implementations + */ + +static int rsa_alt_can_do( mbedtls_pk_type_t type ) +{ + return( type == MBEDTLS_PK_RSA ); +} + +static size_t rsa_alt_get_bitlen( const void *ctx ) +{ + const mbedtls_rsa_alt_context *rsa_alt = (const mbedtls_rsa_alt_context *) ctx; + + return( 8 * rsa_alt->key_len_func( rsa_alt->key ) ); +} + +static int rsa_alt_sign_wrap( void *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + mbedtls_rsa_alt_context *rsa_alt = (mbedtls_rsa_alt_context *) ctx; + + *sig_len = rsa_alt->key_len_func( rsa_alt->key ); + + return( rsa_alt->sign_func( rsa_alt->key, f_rng, p_rng, MBEDTLS_RSA_PRIVATE, + md_alg, (unsigned int) hash_len, hash, sig ) ); +} + +static int rsa_alt_decrypt_wrap( void *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + mbedtls_rsa_alt_context *rsa_alt = (mbedtls_rsa_alt_context *) ctx; + + ((void) f_rng); + ((void) p_rng); + + if( ilen != rsa_alt->key_len_func( rsa_alt->key ) ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + return( rsa_alt->decrypt_func( rsa_alt->key, + MBEDTLS_RSA_PRIVATE, olen, input, output, osize ) ); +} + +#if defined(MBEDTLS_RSA_C) +static int rsa_alt_check_pair( const void *pub, const void *prv ) +{ + unsigned char sig[MBEDTLS_MPI_MAX_SIZE]; + unsigned char hash[32]; + size_t sig_len = 0; + int ret; + + if( rsa_alt_get_bitlen( prv ) != rsa_get_bitlen( pub ) ) + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + + memset( hash, 0x2a, sizeof( hash ) ); + + if( ( ret = rsa_alt_sign_wrap( (void *) prv, MBEDTLS_MD_NONE, + hash, sizeof( hash ), + sig, &sig_len, NULL, NULL ) ) != 0 ) + { + return( ret ); + } + + if( rsa_verify_wrap( (void *) pub, MBEDTLS_MD_NONE, + hash, sizeof( hash ), sig, sig_len ) != 0 ) + { + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + } + + return( 0 ); +} +#endif /* MBEDTLS_RSA_C */ + +static void *rsa_alt_alloc_wrap( void ) +{ + void *ctx = mbedtls_calloc( 1, sizeof( mbedtls_rsa_alt_context ) ); + + if( ctx != NULL ) + memset( ctx, 0, sizeof( mbedtls_rsa_alt_context ) ); + + return( ctx ); +} + +static void rsa_alt_free_wrap( void *ctx ) +{ + mbedtls_zeroize( ctx, sizeof( mbedtls_rsa_alt_context ) ); + mbedtls_free( ctx ); +} + +const mbedtls_pk_info_t mbedtls_rsa_alt_info ICACHE_RODATA_ATTR = { + MBEDTLS_PK_RSA_ALT, + "RSA-alt", + rsa_alt_get_bitlen, + rsa_alt_can_do, + NULL, + rsa_alt_sign_wrap, + rsa_alt_decrypt_wrap, + NULL, +#if defined(MBEDTLS_RSA_C) + rsa_alt_check_pair, +#else + NULL, +#endif + rsa_alt_alloc_wrap, + rsa_alt_free_wrap, + NULL, +}; + +#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */ + +#endif /* MBEDTLS_PK_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs11.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs11.c new file mode 100644 index 0000000..0ea6425 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs11.c @@ -0,0 +1,240 @@ +/** + * \file pkcs11.c + * + * \brief Wrapper for PKCS#11 library libpkcs11-helper + * + * \author Adriaan de Jong + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#include "mbedtls/pkcs11.h" + +#if defined(MBEDTLS_PKCS11_C) + +#include "mbedtls/md.h" +#include "mbedtls/oid.h" +#include "mbedtls/x509_crt.h" + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#include + +void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_pkcs11_context ) ); +} + +int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert, pkcs11h_certificate_t pkcs11_cert ) +{ + int ret = 1; + unsigned char *cert_blob = NULL; + size_t cert_blob_size = 0; + + if( cert == NULL ) + { + ret = 2; + goto cleanup; + } + + if( pkcs11h_certificate_getCertificateBlob( pkcs11_cert, NULL, + &cert_blob_size ) != CKR_OK ) + { + ret = 3; + goto cleanup; + } + + cert_blob = mbedtls_calloc( 1, cert_blob_size ); + if( NULL == cert_blob ) + { + ret = 4; + goto cleanup; + } + + if( pkcs11h_certificate_getCertificateBlob( pkcs11_cert, cert_blob, + &cert_blob_size ) != CKR_OK ) + { + ret = 5; + goto cleanup; + } + + if( 0 != mbedtls_x509_crt_parse( cert, cert_blob, cert_blob_size ) ) + { + ret = 6; + goto cleanup; + } + + ret = 0; + +cleanup: + if( NULL != cert_blob ) + mbedtls_free( cert_blob ); + + return( ret ); +} + + +int mbedtls_pkcs11_priv_key_bind( mbedtls_pkcs11_context *priv_key, + pkcs11h_certificate_t pkcs11_cert ) +{ + int ret = 1; + mbedtls_x509_crt cert; + + mbedtls_x509_crt_init( &cert ); + + if( priv_key == NULL ) + goto cleanup; + + if( 0 != mbedtls_pkcs11_x509_cert_bind( &cert, pkcs11_cert ) ) + goto cleanup; + + priv_key->len = mbedtls_pk_get_len( &cert.pk ); + priv_key->pkcs11h_cert = pkcs11_cert; + + ret = 0; + +cleanup: + mbedtls_x509_crt_free( &cert ); + + return( ret ); +} + +void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key ) +{ + if( NULL != priv_key ) + pkcs11h_certificate_freeCertificate( priv_key->pkcs11h_cert ); +} + +int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx, + int mode, size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ) +{ + size_t input_len, output_len; + + if( NULL == ctx ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( MBEDTLS_RSA_PRIVATE != mode ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + output_len = input_len = ctx->len; + + if( input_len < 16 || input_len > output_max_len ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + /* Determine size of output buffer */ + if( pkcs11h_certificate_decryptAny( ctx->pkcs11h_cert, CKM_RSA_PKCS, input, + input_len, NULL, &output_len ) != CKR_OK ) + { + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + } + + if( output_len > output_max_len ) + return( MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE ); + + if( pkcs11h_certificate_decryptAny( ctx->pkcs11h_cert, CKM_RSA_PKCS, input, + input_len, output, &output_len ) != CKR_OK ) + { + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + } + *olen = output_len; + return( 0 ); +} + +int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ) +{ + size_t sig_len = 0, asn_len = 0, oid_size = 0; + unsigned char *p = sig; + const char *oid; + + if( NULL == ctx ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( MBEDTLS_RSA_PRIVATE != mode ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( md_alg != MBEDTLS_MD_NONE ) + { + const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type( md_alg ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( mbedtls_oid_get_oid_by_md( md_alg, &oid, &oid_size ) != 0 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + hashlen = mbedtls_md_get_size( md_info ); + asn_len = 10 + oid_size; + } + + sig_len = ctx->len; + if( hashlen > sig_len || asn_len > sig_len || + hashlen + asn_len > sig_len ) + { + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + } + + if( md_alg != MBEDTLS_MD_NONE ) + { + /* + * DigestInfo ::= SEQUENCE { + * digestAlgorithm DigestAlgorithmIdentifier, + * digest Digest } + * + * DigestAlgorithmIdentifier ::= AlgorithmIdentifier + * + * Digest ::= OCTET STRING + */ + *p++ = MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED; + *p++ = (unsigned char) ( 0x08 + oid_size + hashlen ); + *p++ = MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED; + *p++ = (unsigned char) ( 0x04 + oid_size ); + *p++ = MBEDTLS_ASN1_OID; + *p++ = oid_size & 0xFF; + memcpy( p, oid, oid_size ); + p += oid_size; + *p++ = MBEDTLS_ASN1_NULL; + *p++ = 0x00; + *p++ = MBEDTLS_ASN1_OCTET_STRING; + *p++ = hashlen; + } + + memcpy( p, hash, hashlen ); + + if( pkcs11h_certificate_signAny( ctx->pkcs11h_cert, CKM_RSA_PKCS, sig, + asn_len + hashlen, sig, &sig_len ) != CKR_OK ) + { + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + } + + return( 0 ); +} + +#endif /* defined(MBEDTLS_PKCS11_C) */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs12.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs12.c new file mode 100644 index 0000000..7023b9d --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs12.c @@ -0,0 +1,365 @@ +/* + * PKCS#12 Personal Information Exchange Syntax + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The PKCS #12 Personal Information Exchange Syntax Standard v1.1 + * + * http://www.rsa.com/rsalabs/pkcs/files/h11301-wp-pkcs-12v1-1-personal-information-exchange-syntax.pdf + * ftp://ftp.rsasecurity.com/pub/pkcs/pkcs-12/pkcs-12v1-1.asn + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PKCS12_C) + +#include "mbedtls/pkcs12.h" +#include "mbedtls/asn1.h" +#include "mbedtls/cipher.h" + +#include + +#if defined(MBEDTLS_ARC4_C) +#include "mbedtls/arc4.h" +#endif + +#if defined(MBEDTLS_DES_C) +#include "mbedtls/des.h" +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +static int pkcs12_parse_pbe_params( mbedtls_asn1_buf *params, + mbedtls_asn1_buf *salt, int *iterations ) +{ + int ret; + unsigned char **p = ¶ms->p; + const unsigned char *end = params->p + params->len; + + /* + * pkcs-12PbeParams ::= SEQUENCE { + * salt OCTET STRING, + * iterations INTEGER + * } + * + */ + if( params->tag != ( MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) + return( MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + if( ( ret = mbedtls_asn1_get_tag( p, end, &salt->len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT + ret ); + + salt->p = *p; + *p += salt->len; + + if( ( ret = mbedtls_asn1_get_int( p, end, iterations ) ) != 0 ) + return( MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT + ret ); + + if( *p != end ) + return( MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +#define PKCS12_MAX_PWDLEN 128 + +static int pkcs12_pbe_derive_key_iv( mbedtls_asn1_buf *pbe_params, mbedtls_md_type_t md_type, + const unsigned char *pwd, size_t pwdlen, + unsigned char *key, size_t keylen, + unsigned char *iv, size_t ivlen ) +{ + int ret, iterations; + mbedtls_asn1_buf salt; + size_t i; + unsigned char unipwd[PKCS12_MAX_PWDLEN * 2 + 2]; + + if( pwdlen > PKCS12_MAX_PWDLEN ) + return( MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA ); + + memset( &salt, 0, sizeof(mbedtls_asn1_buf) ); + memset( &unipwd, 0, sizeof(unipwd) ); + + if( ( ret = pkcs12_parse_pbe_params( pbe_params, &salt, + &iterations ) ) != 0 ) + return( ret ); + + for( i = 0; i < pwdlen; i++ ) + unipwd[i * 2 + 1] = pwd[i]; + + if( ( ret = mbedtls_pkcs12_derivation( key, keylen, unipwd, pwdlen * 2 + 2, + salt.p, salt.len, md_type, + MBEDTLS_PKCS12_DERIVE_KEY, iterations ) ) != 0 ) + { + return( ret ); + } + + if( iv == NULL || ivlen == 0 ) + return( 0 ); + + if( ( ret = mbedtls_pkcs12_derivation( iv, ivlen, unipwd, pwdlen * 2 + 2, + salt.p, salt.len, md_type, + MBEDTLS_PKCS12_DERIVE_IV, iterations ) ) != 0 ) + { + return( ret ); + } + return( 0 ); +} + +#undef PKCS12_MAX_PWDLEN + +int mbedtls_pkcs12_pbe_sha1_rc4_128( mbedtls_asn1_buf *pbe_params, int mode, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *data, size_t len, + unsigned char *output ) +{ +#if !defined(MBEDTLS_ARC4_C) + ((void) pbe_params); + ((void) mode); + ((void) pwd); + ((void) pwdlen); + ((void) data); + ((void) len); + ((void) output); + return( MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE ); +#else + int ret; + unsigned char key[16]; + mbedtls_arc4_context ctx; + ((void) mode); + + mbedtls_arc4_init( &ctx ); + + if( ( ret = pkcs12_pbe_derive_key_iv( pbe_params, MBEDTLS_MD_SHA1, + pwd, pwdlen, + key, 16, NULL, 0 ) ) != 0 ) + { + return( ret ); + } + + mbedtls_arc4_setup( &ctx, key, 16 ); + if( ( ret = mbedtls_arc4_crypt( &ctx, len, data, output ) ) != 0 ) + goto exit; + +exit: + mbedtls_zeroize( key, sizeof( key ) ); + mbedtls_arc4_free( &ctx ); + + return( ret ); +#endif /* MBEDTLS_ARC4_C */ +} + +int mbedtls_pkcs12_pbe( mbedtls_asn1_buf *pbe_params, int mode, + mbedtls_cipher_type_t cipher_type, mbedtls_md_type_t md_type, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *data, size_t len, + unsigned char *output ) +{ + int ret, keylen = 0; + unsigned char key[32]; + unsigned char iv[16]; + const mbedtls_cipher_info_t *cipher_info; + mbedtls_cipher_context_t cipher_ctx; + size_t olen = 0; + + cipher_info = mbedtls_cipher_info_from_type( cipher_type ); + if( cipher_info == NULL ) + return( MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE ); + + keylen = cipher_info->key_bitlen / 8; + + if( ( ret = pkcs12_pbe_derive_key_iv( pbe_params, md_type, pwd, pwdlen, + key, keylen, + iv, cipher_info->iv_size ) ) != 0 ) + { + return( ret ); + } + + mbedtls_cipher_init( &cipher_ctx ); + + if( ( ret = mbedtls_cipher_setup( &cipher_ctx, cipher_info ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_cipher_setkey( &cipher_ctx, key, 8 * keylen, (mbedtls_operation_t) mode ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_cipher_set_iv( &cipher_ctx, iv, cipher_info->iv_size ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_cipher_reset( &cipher_ctx ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_cipher_update( &cipher_ctx, data, len, + output, &olen ) ) != 0 ) + { + goto exit; + } + + if( ( ret = mbedtls_cipher_finish( &cipher_ctx, output + olen, &olen ) ) != 0 ) + ret = MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH; + +exit: + mbedtls_zeroize( key, sizeof( key ) ); + mbedtls_zeroize( iv, sizeof( iv ) ); + mbedtls_cipher_free( &cipher_ctx ); + + return( ret ); +} + +static void pkcs12_fill_buffer( unsigned char *data, size_t data_len, + const unsigned char *filler, size_t fill_len ) +{ + unsigned char *p = data; + size_t use_len; + + while( data_len > 0 ) + { + use_len = ( data_len > fill_len ) ? fill_len : data_len; + memcpy( p, filler, use_len ); + p += use_len; + data_len -= use_len; + } +} + +int mbedtls_pkcs12_derivation( unsigned char *data, size_t datalen, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *salt, size_t saltlen, + mbedtls_md_type_t md_type, int id, int iterations ) +{ + int ret; + unsigned int j; + + unsigned char diversifier[128]; + unsigned char salt_block[128], pwd_block[128], hash_block[128]; + unsigned char hash_output[MBEDTLS_MD_MAX_SIZE]; + unsigned char *p; + unsigned char c; + + size_t hlen, use_len, v, i; + + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + + // This version only allows max of 64 bytes of password or salt + if( datalen > 128 || pwdlen > 64 || saltlen > 64 ) + return( MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA ); + + md_info = mbedtls_md_info_from_type( md_type ); + if( md_info == NULL ) + return( MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE ); + + mbedtls_md_init( &md_ctx ); + + if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 0 ) ) != 0 ) + return( ret ); + hlen = mbedtls_md_get_size( md_info ); + + if( hlen <= 32 ) + v = 64; + else + v = 128; + + memset( diversifier, (unsigned char) id, v ); + + pkcs12_fill_buffer( salt_block, v, salt, saltlen ); + pkcs12_fill_buffer( pwd_block, v, pwd, pwdlen ); + + p = data; + while( datalen > 0 ) + { + // Calculate hash( diversifier || salt_block || pwd_block ) + if( ( ret = mbedtls_md_starts( &md_ctx ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_md_update( &md_ctx, diversifier, v ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_md_update( &md_ctx, salt_block, v ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_md_update( &md_ctx, pwd_block, v ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_md_finish( &md_ctx, hash_output ) ) != 0 ) + goto exit; + + // Perform remaining ( iterations - 1 ) recursive hash calculations + for( i = 1; i < (size_t) iterations; i++ ) + { + if( ( ret = mbedtls_md( md_info, hash_output, hlen, hash_output ) ) != 0 ) + goto exit; + } + + use_len = ( datalen > hlen ) ? hlen : datalen; + memcpy( p, hash_output, use_len ); + datalen -= use_len; + p += use_len; + + if( datalen == 0 ) + break; + + // Concatenating copies of hash_output into hash_block (B) + pkcs12_fill_buffer( hash_block, v, hash_output, hlen ); + + // B += 1 + for( i = v; i > 0; i-- ) + if( ++hash_block[i - 1] != 0 ) + break; + + // salt_block += B + c = 0; + for( i = v; i > 0; i-- ) + { + j = salt_block[i - 1] + hash_block[i - 1] + c; + c = (unsigned char) (j >> 8); + salt_block[i - 1] = j & 0xFF; + } + + // pwd_block += B + c = 0; + for( i = v; i > 0; i-- ) + { + j = pwd_block[i - 1] + hash_block[i - 1] + c; + c = (unsigned char) (j >> 8); + pwd_block[i - 1] = j & 0xFF; + } + } + + ret = 0; + +exit: + mbedtls_zeroize( salt_block, sizeof( salt_block ) ); + mbedtls_zeroize( pwd_block, sizeof( pwd_block ) ); + mbedtls_zeroize( hash_block, sizeof( hash_block ) ); + mbedtls_zeroize( hash_output, sizeof( hash_output ) ); + + mbedtls_md_free( &md_ctx ); + + return( ret ); +} + +#endif /* MBEDTLS_PKCS12_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs5.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs5.c new file mode 100644 index 0000000..44af986 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkcs5.c @@ -0,0 +1,405 @@ +/** + * \file pkcs5.c + * + * \brief PKCS#5 functions + * + * \author Mathias Olsson + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * PKCS#5 includes PBKDF2 and more + * + * http://tools.ietf.org/html/rfc2898 (Specification) + * http://tools.ietf.org/html/rfc6070 (Test vectors) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PKCS5_C) + +#include "mbedtls/pkcs5.h" +#include "mbedtls/asn1.h" +#include "mbedtls/cipher.h" +#include "mbedtls/oid.h" + +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif + +static int pkcs5_parse_pbkdf2_params( const mbedtls_asn1_buf *params, + mbedtls_asn1_buf *salt, int *iterations, + int *keylen, mbedtls_md_type_t *md_type ) +{ + int ret; + mbedtls_asn1_buf prf_alg_oid; + unsigned char *p = params->p; + const unsigned char *end = params->p + params->len; + + if( params->tag != ( MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + /* + * PBKDF2-params ::= SEQUENCE { + * salt OCTET STRING, + * iterationCount INTEGER, + * keyLength INTEGER OPTIONAL + * prf AlgorithmIdentifier DEFAULT algid-hmacWithSHA1 + * } + * + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &salt->len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + ret ); + + salt->p = p; + p += salt->len; + + if( ( ret = mbedtls_asn1_get_int( &p, end, iterations ) ) != 0 ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + ret ); + + if( p == end ) + return( 0 ); + + if( ( ret = mbedtls_asn1_get_int( &p, end, keylen ) ) != 0 ) + { + if( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + ret ); + } + + if( p == end ) + return( 0 ); + + if( ( ret = mbedtls_asn1_get_alg_null( &p, end, &prf_alg_oid ) ) != 0 ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + ret ); + + if( MBEDTLS_OID_CMP( MBEDTLS_OID_HMAC_SHA1, &prf_alg_oid ) != 0 ) + return( MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE ); + + *md_type = MBEDTLS_MD_SHA1; + + if( p != end ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +int mbedtls_pkcs5_pbes2( const mbedtls_asn1_buf *pbe_params, int mode, + const unsigned char *pwd, size_t pwdlen, + const unsigned char *data, size_t datalen, + unsigned char *output ) +{ + int ret, iterations = 0, keylen = 0; + unsigned char *p, *end; + mbedtls_asn1_buf kdf_alg_oid, enc_scheme_oid, kdf_alg_params, enc_scheme_params; + mbedtls_asn1_buf salt; + mbedtls_md_type_t md_type = MBEDTLS_MD_SHA1; + unsigned char key[32], iv[32]; + size_t olen = 0; + const mbedtls_md_info_t *md_info; + const mbedtls_cipher_info_t *cipher_info; + mbedtls_md_context_t md_ctx; + mbedtls_cipher_type_t cipher_alg; + mbedtls_cipher_context_t cipher_ctx; + + p = pbe_params->p; + end = p + pbe_params->len; + + /* + * PBES2-params ::= SEQUENCE { + * keyDerivationFunc AlgorithmIdentifier {{PBES2-KDFs}}, + * encryptionScheme AlgorithmIdentifier {{PBES2-Encs}} + * } + */ + if( pbe_params->tag != ( MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + if( ( ret = mbedtls_asn1_get_alg( &p, end, &kdf_alg_oid, &kdf_alg_params ) ) != 0 ) + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + ret ); + + // Only PBKDF2 supported at the moment + // + if( MBEDTLS_OID_CMP( MBEDTLS_OID_PKCS5_PBKDF2, &kdf_alg_oid ) != 0 ) + return( MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE ); + + if( ( ret = pkcs5_parse_pbkdf2_params( &kdf_alg_params, + &salt, &iterations, &keylen, + &md_type ) ) != 0 ) + { + return( ret ); + } + + md_info = mbedtls_md_info_from_type( md_type ); + if( md_info == NULL ) + return( MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE ); + + if( ( ret = mbedtls_asn1_get_alg( &p, end, &enc_scheme_oid, + &enc_scheme_params ) ) != 0 ) + { + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT + ret ); + } + + if( mbedtls_oid_get_cipher_alg( &enc_scheme_oid, &cipher_alg ) != 0 ) + return( MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE ); + + cipher_info = mbedtls_cipher_info_from_type( cipher_alg ); + if( cipher_info == NULL ) + return( MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE ); + + /* + * The value of keylen from pkcs5_parse_pbkdf2_params() is ignored + * since it is optional and we don't know if it was set or not + */ + keylen = cipher_info->key_bitlen / 8; + + if( enc_scheme_params.tag != MBEDTLS_ASN1_OCTET_STRING || + enc_scheme_params.len != cipher_info->iv_size ) + { + return( MBEDTLS_ERR_PKCS5_INVALID_FORMAT ); + } + + mbedtls_md_init( &md_ctx ); + mbedtls_cipher_init( &cipher_ctx ); + + memcpy( iv, enc_scheme_params.p, enc_scheme_params.len ); + + if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 1 ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_pkcs5_pbkdf2_hmac( &md_ctx, pwd, pwdlen, salt.p, salt.len, + iterations, keylen, key ) ) != 0 ) + { + goto exit; + } + + if( ( ret = mbedtls_cipher_setup( &cipher_ctx, cipher_info ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_cipher_setkey( &cipher_ctx, key, 8 * keylen, (mbedtls_operation_t) mode ) ) != 0 ) + goto exit; + + if( ( ret = mbedtls_cipher_crypt( &cipher_ctx, iv, enc_scheme_params.len, + data, datalen, output, &olen ) ) != 0 ) + ret = MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH; + +exit: + mbedtls_md_free( &md_ctx ); + mbedtls_cipher_free( &cipher_ctx ); + + return( ret ); +} + +int mbedtls_pkcs5_pbkdf2_hmac( mbedtls_md_context_t *ctx, const unsigned char *password, + size_t plen, const unsigned char *salt, size_t slen, + unsigned int iteration_count, + uint32_t key_length, unsigned char *output ) +{ + int ret, j; + unsigned int i; + unsigned char md1[MBEDTLS_MD_MAX_SIZE]; + unsigned char work[MBEDTLS_MD_MAX_SIZE]; + unsigned char md_size = mbedtls_md_get_size( ctx->md_info ); + size_t use_len; + unsigned char *out_p = output; + unsigned char counter[4]; + + memset( counter, 0, 4 ); + counter[3] = 1; + + if( iteration_count > 0xFFFFFFFF ) + return( MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA ); + + while( key_length ) + { + // U1 ends up in work + // + if( ( ret = mbedtls_md_hmac_starts( ctx, password, plen ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_md_hmac_update( ctx, salt, slen ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_md_hmac_update( ctx, counter, 4 ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_md_hmac_finish( ctx, work ) ) != 0 ) + return( ret ); + + memcpy( md1, work, md_size ); + + for( i = 1; i < iteration_count; i++ ) + { + // U2 ends up in md1 + // + if( ( ret = mbedtls_md_hmac_starts( ctx, password, plen ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_md_hmac_update( ctx, md1, md_size ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_md_hmac_finish( ctx, md1 ) ) != 0 ) + return( ret ); + + // U1 xor U2 + // + for( j = 0; j < md_size; j++ ) + work[j] ^= md1[j]; + } + + use_len = ( key_length < md_size ) ? key_length : md_size; + memcpy( out_p, work, use_len ); + + key_length -= (uint32_t) use_len; + out_p += use_len; + + for( i = 4; i > 0; i-- ) + if( ++counter[i - 1] != 0 ) + break; + } + + return( 0 ); +} + +#if defined(MBEDTLS_SELF_TEST) + +#if !defined(MBEDTLS_SHA1_C) +int mbedtls_pkcs5_self_test( int verbose ) +{ + if( verbose != 0 ) + mbedtls_printf( " PBKDF2 (SHA1): skipped\n\n" ); + + return( 0 ); +} +#else + +#define MAX_TESTS 6 + +static const size_t plen[MAX_TESTS] = + { 8, 8, 8, 24, 9 }; + +static const unsigned char password[MAX_TESTS][32] = +{ + "password", + "password", + "password", + "passwordPASSWORDpassword", + "pass\0word", +}; + +static const size_t slen[MAX_TESTS] = + { 4, 4, 4, 36, 5 }; + +static const unsigned char salt[MAX_TESTS][40] = +{ + "salt", + "salt", + "salt", + "saltSALTsaltSALTsaltSALTsaltSALTsalt", + "sa\0lt", +}; + +static const uint32_t it_cnt[MAX_TESTS] = + { 1, 2, 4096, 4096, 4096 }; + +static const uint32_t key_len[MAX_TESTS] = + { 20, 20, 20, 25, 16 }; + +static const unsigned char result_key[MAX_TESTS][32] = +{ + { 0x0c, 0x60, 0xc8, 0x0f, 0x96, 0x1f, 0x0e, 0x71, + 0xf3, 0xa9, 0xb5, 0x24, 0xaf, 0x60, 0x12, 0x06, + 0x2f, 0xe0, 0x37, 0xa6 }, + { 0xea, 0x6c, 0x01, 0x4d, 0xc7, 0x2d, 0x6f, 0x8c, + 0xcd, 0x1e, 0xd9, 0x2a, 0xce, 0x1d, 0x41, 0xf0, + 0xd8, 0xde, 0x89, 0x57 }, + { 0x4b, 0x00, 0x79, 0x01, 0xb7, 0x65, 0x48, 0x9a, + 0xbe, 0xad, 0x49, 0xd9, 0x26, 0xf7, 0x21, 0xd0, + 0x65, 0xa4, 0x29, 0xc1 }, + { 0x3d, 0x2e, 0xec, 0x4f, 0xe4, 0x1c, 0x84, 0x9b, + 0x80, 0xc8, 0xd8, 0x36, 0x62, 0xc0, 0xe4, 0x4a, + 0x8b, 0x29, 0x1a, 0x96, 0x4c, 0xf2, 0xf0, 0x70, + 0x38 }, + { 0x56, 0xfa, 0x6a, 0xa7, 0x55, 0x48, 0x09, 0x9d, + 0xcc, 0x37, 0xd7, 0xf0, 0x34, 0x25, 0xe0, 0xc3 }, +}; + +int mbedtls_pkcs5_self_test( int verbose ) +{ + mbedtls_md_context_t sha1_ctx; + const mbedtls_md_info_t *info_sha1; + int ret, i; + unsigned char key[64]; + + mbedtls_md_init( &sha1_ctx ); + + info_sha1 = mbedtls_md_info_from_type( MBEDTLS_MD_SHA1 ); + if( info_sha1 == NULL ) + { + ret = 1; + goto exit; + } + + if( ( ret = mbedtls_md_setup( &sha1_ctx, info_sha1, 1 ) ) != 0 ) + { + ret = 1; + goto exit; + } + + for( i = 0; i < MAX_TESTS; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " PBKDF2 (SHA1) #%d: ", i ); + + ret = mbedtls_pkcs5_pbkdf2_hmac( &sha1_ctx, password[i], plen[i], salt[i], + slen[i], it_cnt[i], key_len[i], key ); + if( ret != 0 || + memcmp( result_key[i], key, key_len[i] ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + mbedtls_printf( "\n" ); + +exit: + mbedtls_md_free( &sha1_ctx ); + + return( ret ); +} +#endif /* MBEDTLS_SHA1_C */ + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_PKCS5_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkparse.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkparse.c new file mode 100644 index 0000000..275429e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkparse.c @@ -0,0 +1,1293 @@ +/* + * Public Key layer for parsing key files and structures + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PK_PARSE_C) + +#include "mbedtls/pk.h" +#include "mbedtls/asn1.h" +#include "mbedtls/oid.h" + +#include + +#if defined(MBEDTLS_RSA_C) +#include "mbedtls/rsa.h" +#endif +#if defined(MBEDTLS_ECP_C) +#include "mbedtls/ecp.h" +#endif +#if defined(MBEDTLS_ECDSA_C) +#include "mbedtls/ecdsa.h" +#endif +#if defined(MBEDTLS_PEM_PARSE_C) +#include "mbedtls/pem.h" +#endif +#if defined(MBEDTLS_PKCS5_C) +#include "mbedtls/pkcs5.h" +#endif +#if defined(MBEDTLS_PKCS12_C) +#include "mbedtls/pkcs12.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if defined(MBEDTLS_FS_IO) +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Load all data from a file into a given buffer. + * + * The file is expected to contain either PEM or DER encoded data. + * A terminating null byte is always appended. It is included in the announced + * length only if the data looks like it is PEM encoded. + */ +int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n ) +{ + FILE *f; + long size; + + if( ( f = fopen( path, "rb" ) ) == NULL ) + return( MBEDTLS_ERR_PK_FILE_IO_ERROR ); + + fseek( f, 0, SEEK_END ); + if( ( size = ftell( f ) ) == -1 ) + { + fclose( f ); + return( MBEDTLS_ERR_PK_FILE_IO_ERROR ); + } + fseek( f, 0, SEEK_SET ); + + *n = (size_t) size; + + if( *n + 1 == 0 || + ( *buf = mbedtls_calloc( 1, *n + 1 ) ) == NULL ) + { + fclose( f ); + return( MBEDTLS_ERR_PK_ALLOC_FAILED ); + } + + if( fread( *buf, 1, *n, f ) != *n ) + { + fclose( f ); + mbedtls_free( *buf ); + return( MBEDTLS_ERR_PK_FILE_IO_ERROR ); + } + + fclose( f ); + + (*buf)[*n] = '\0'; + + if( strstr( (const char *) *buf, "-----BEGIN " ) != NULL ) + ++*n; + + return( 0 ); +} + +/* + * Load and parse a private key + */ +int mbedtls_pk_parse_keyfile( mbedtls_pk_context *ctx, + const char *path, const char *pwd ) +{ + int ret; + size_t n; + unsigned char *buf; + + if( ( ret = mbedtls_pk_load_file( path, &buf, &n ) ) != 0 ) + return( ret ); + + if( pwd == NULL ) + ret = mbedtls_pk_parse_key( ctx, buf, n, NULL, 0 ); + else + ret = mbedtls_pk_parse_key( ctx, buf, n, + (const unsigned char *) pwd, strlen( pwd ) ); + + mbedtls_zeroize( buf, n ); + mbedtls_free( buf ); + + return( ret ); +} + +/* + * Load and parse a public key + */ +int mbedtls_pk_parse_public_keyfile( mbedtls_pk_context *ctx, const char *path ) +{ + int ret; + size_t n; + unsigned char *buf; + + if( ( ret = mbedtls_pk_load_file( path, &buf, &n ) ) != 0 ) + return( ret ); + + ret = mbedtls_pk_parse_public_key( ctx, buf, n ); + + mbedtls_zeroize( buf, n ); + mbedtls_free( buf ); + + return( ret ); +} +#endif /* MBEDTLS_FS_IO */ + +#if defined(MBEDTLS_ECP_C) +/* Minimally parse an ECParameters buffer to and mbedtls_asn1_buf + * + * ECParameters ::= CHOICE { + * namedCurve OBJECT IDENTIFIER + * specifiedCurve SpecifiedECDomain -- = SEQUENCE { ... } + * -- implicitCurve NULL + * } + */ +static int pk_get_ecparams( unsigned char **p, const unsigned char *end, + mbedtls_asn1_buf *params ) +{ + int ret; + + /* Tag may be either OID or SEQUENCE */ + params->tag = **p; + if( params->tag != MBEDTLS_ASN1_OID +#if defined(MBEDTLS_PK_PARSE_EC_EXTENDED) + && params->tag != ( MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) +#endif + ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + } + + if( ( ret = mbedtls_asn1_get_tag( p, end, ¶ms->len, params->tag ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + params->p = *p; + *p += params->len; + + if( *p != end ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +#if defined(MBEDTLS_PK_PARSE_EC_EXTENDED) +/* + * Parse a SpecifiedECDomain (SEC 1 C.2) and (mostly) fill the group with it. + * WARNING: the resulting group should only be used with + * pk_group_id_from_specified(), since its base point may not be set correctly + * if it was encoded compressed. + * + * SpecifiedECDomain ::= SEQUENCE { + * version SpecifiedECDomainVersion(ecdpVer1 | ecdpVer2 | ecdpVer3, ...), + * fieldID FieldID {{FieldTypes}}, + * curve Curve, + * base ECPoint, + * order INTEGER, + * cofactor INTEGER OPTIONAL, + * hash HashAlgorithm OPTIONAL, + * ... + * } + * + * We only support prime-field as field type, and ignore hash and cofactor. + */ +static int pk_group_from_specified( const mbedtls_asn1_buf *params, mbedtls_ecp_group *grp ) +{ + int ret; + unsigned char *p = params->p; + const unsigned char * const end = params->p + params->len; + const unsigned char *end_field, *end_curve; + size_t len; + int ver; + + /* SpecifiedECDomainVersion ::= INTEGER { 1, 2, 3 } */ + if( ( ret = mbedtls_asn1_get_int( &p, end, &ver ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( ver < 1 || ver > 3 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT ); + + /* + * FieldID { FIELD-ID:IOSet } ::= SEQUENCE { -- Finite field + * fieldType FIELD-ID.&id({IOSet}), + * parameters FIELD-ID.&Type({IOSet}{@fieldType}) + * } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( ret ); + + end_field = p + len; + + /* + * FIELD-ID ::= TYPE-IDENTIFIER + * FieldTypes FIELD-ID ::= { + * { Prime-p IDENTIFIED BY prime-field } | + * { Characteristic-two IDENTIFIED BY characteristic-two-field } + * } + * prime-field OBJECT IDENTIFIER ::= { id-fieldType 1 } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end_field, &len, MBEDTLS_ASN1_OID ) ) != 0 ) + return( ret ); + + if( len != MBEDTLS_OID_SIZE( MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD ) || + memcmp( p, MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD, len ) != 0 ) + { + return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE ); + } + + p += len; + + /* Prime-p ::= INTEGER -- Field of size p. */ + if( ( ret = mbedtls_asn1_get_mpi( &p, end_field, &grp->P ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + grp->pbits = mbedtls_mpi_bitlen( &grp->P ); + + if( p != end_field ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + /* + * Curve ::= SEQUENCE { + * a FieldElement, + * b FieldElement, + * seed BIT STRING OPTIONAL + * -- Shall be present if used in SpecifiedECDomain + * -- with version equal to ecdpVer2 or ecdpVer3 + * } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( ret ); + + end_curve = p + len; + + /* + * FieldElement ::= OCTET STRING + * containing an integer in the case of a prime field + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end_curve, &len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 || + ( ret = mbedtls_mpi_read_binary( &grp->A, p, len ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + p += len; + + if( ( ret = mbedtls_asn1_get_tag( &p, end_curve, &len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 || + ( ret = mbedtls_mpi_read_binary( &grp->B, p, len ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + p += len; + + /* Ignore seed BIT STRING OPTIONAL */ + if( ( ret = mbedtls_asn1_get_tag( &p, end_curve, &len, MBEDTLS_ASN1_BIT_STRING ) ) == 0 ) + p += len; + + if( p != end_curve ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + /* + * ECPoint ::= OCTET STRING + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( ( ret = mbedtls_ecp_point_read_binary( grp, &grp->G, + ( const unsigned char *) p, len ) ) != 0 ) + { + /* + * If we can't read the point because it's compressed, cheat by + * reading only the X coordinate and the parity bit of Y. + */ + if( ret != MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE || + ( p[0] != 0x02 && p[0] != 0x03 ) || + len != mbedtls_mpi_size( &grp->P ) + 1 || + mbedtls_mpi_read_binary( &grp->G.X, p + 1, len - 1 ) != 0 || + mbedtls_mpi_lset( &grp->G.Y, p[0] - 2 ) != 0 || + mbedtls_mpi_lset( &grp->G.Z, 1 ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT ); + } + } + + p += len; + + /* + * order INTEGER + */ + if( ( ret = mbedtls_asn1_get_mpi( &p, end, &grp->N ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + grp->nbits = mbedtls_mpi_bitlen( &grp->N ); + + /* + * Allow optional elements by purposefully not enforcing p == end here. + */ + + return( 0 ); +} + +/* + * Find the group id associated with an (almost filled) group as generated by + * pk_group_from_specified(), or return an error if unknown. + */ +static int pk_group_id_from_group( const mbedtls_ecp_group *grp, mbedtls_ecp_group_id *grp_id ) +{ + int ret = 0; + mbedtls_ecp_group ref; + const mbedtls_ecp_group_id *id; + + mbedtls_ecp_group_init( &ref ); + + for( id = mbedtls_ecp_grp_id_list(); *id != MBEDTLS_ECP_DP_NONE; id++ ) + { + /* Load the group associated to that id */ + mbedtls_ecp_group_free( &ref ); + MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &ref, *id ) ); + + /* Compare to the group we were given, starting with easy tests */ + if( grp->pbits == ref.pbits && grp->nbits == ref.nbits && + mbedtls_mpi_cmp_mpi( &grp->P, &ref.P ) == 0 && + mbedtls_mpi_cmp_mpi( &grp->A, &ref.A ) == 0 && + mbedtls_mpi_cmp_mpi( &grp->B, &ref.B ) == 0 && + mbedtls_mpi_cmp_mpi( &grp->N, &ref.N ) == 0 && + mbedtls_mpi_cmp_mpi( &grp->G.X, &ref.G.X ) == 0 && + mbedtls_mpi_cmp_mpi( &grp->G.Z, &ref.G.Z ) == 0 && + /* For Y we may only know the parity bit, so compare only that */ + mbedtls_mpi_get_bit( &grp->G.Y, 0 ) == mbedtls_mpi_get_bit( &ref.G.Y, 0 ) ) + { + break; + } + + } + +cleanup: + mbedtls_ecp_group_free( &ref ); + + *grp_id = *id; + + if( ret == 0 && *id == MBEDTLS_ECP_DP_NONE ) + ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; + + return( ret ); +} + +/* + * Parse a SpecifiedECDomain (SEC 1 C.2) and find the associated group ID + */ +static int pk_group_id_from_specified( const mbedtls_asn1_buf *params, + mbedtls_ecp_group_id *grp_id ) +{ + int ret; + mbedtls_ecp_group grp; + + mbedtls_ecp_group_init( &grp ); + + if( ( ret = pk_group_from_specified( params, &grp ) ) != 0 ) + goto cleanup; + + ret = pk_group_id_from_group( &grp, grp_id ); + +cleanup: + mbedtls_ecp_group_free( &grp ); + + return( ret ); +} +#endif /* MBEDTLS_PK_PARSE_EC_EXTENDED */ + +/* + * Use EC parameters to initialise an EC group + * + * ECParameters ::= CHOICE { + * namedCurve OBJECT IDENTIFIER + * specifiedCurve SpecifiedECDomain -- = SEQUENCE { ... } + * -- implicitCurve NULL + */ +static int pk_use_ecparams( const mbedtls_asn1_buf *params, mbedtls_ecp_group *grp ) +{ + int ret; + mbedtls_ecp_group_id grp_id; + + if( params->tag == MBEDTLS_ASN1_OID ) + { + if( mbedtls_oid_get_ec_grp( params, &grp_id ) != 0 ) + return( MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE ); + } + else + { +#if defined(MBEDTLS_PK_PARSE_EC_EXTENDED) + if( ( ret = pk_group_id_from_specified( params, &grp_id ) ) != 0 ) + return( ret ); +#else + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT ); +#endif + } + + /* + * grp may already be initilialized; if so, make sure IDs match + */ + if( grp->id != MBEDTLS_ECP_DP_NONE && grp->id != grp_id ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT ); + + if( ( ret = mbedtls_ecp_group_load( grp, grp_id ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +/* + * EC public key is an EC point + * + * The caller is responsible for clearing the structure upon failure if + * desired. Take care to pass along the possible ECP_FEATURE_UNAVAILABLE + * return code of mbedtls_ecp_point_read_binary() and leave p in a usable state. + */ +static int pk_get_ecpubkey( unsigned char **p, const unsigned char *end, + mbedtls_ecp_keypair *key ) +{ + int ret; + + if( ( ret = mbedtls_ecp_point_read_binary( &key->grp, &key->Q, + (const unsigned char *) *p, end - *p ) ) == 0 ) + { + ret = mbedtls_ecp_check_pubkey( &key->grp, &key->Q ); + } + + /* + * We know mbedtls_ecp_point_read_binary consumed all bytes or failed + */ + *p = (unsigned char *) end; + + return( ret ); +} +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_RSA_C) +/* + * RSAPublicKey ::= SEQUENCE { + * modulus INTEGER, -- n + * publicExponent INTEGER -- e + * } + */ +static int pk_get_rsapubkey( unsigned char **p, + const unsigned char *end, + mbedtls_rsa_context *rsa ) +{ + int ret; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_PK_INVALID_PUBKEY + ret ); + + if( *p + len != end ) + return( MBEDTLS_ERR_PK_INVALID_PUBKEY + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + if( ( ret = mbedtls_asn1_get_mpi( p, end, &rsa->N ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( p, end, &rsa->E ) ) != 0 ) + return( MBEDTLS_ERR_PK_INVALID_PUBKEY + ret ); + + if( *p != end ) + return( MBEDTLS_ERR_PK_INVALID_PUBKEY + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + if( ( ret = mbedtls_rsa_check_pubkey( rsa ) ) != 0 ) + return( MBEDTLS_ERR_PK_INVALID_PUBKEY ); + + rsa->len = mbedtls_mpi_size( &rsa->N ); + + return( 0 ); +} +#endif /* MBEDTLS_RSA_C */ + +/* Get a PK algorithm identifier + * + * AlgorithmIdentifier ::= SEQUENCE { + * algorithm OBJECT IDENTIFIER, + * parameters ANY DEFINED BY algorithm OPTIONAL } + */ +static int pk_get_pk_alg( unsigned char **p, + const unsigned char *end, + mbedtls_pk_type_t *pk_alg, mbedtls_asn1_buf *params ) +{ + int ret; + mbedtls_asn1_buf alg_oid; + + memset( params, 0, sizeof(mbedtls_asn1_buf) ); + + if( ( ret = mbedtls_asn1_get_alg( p, end, &alg_oid, params ) ) != 0 ) + return( MBEDTLS_ERR_PK_INVALID_ALG + ret ); + + if( mbedtls_oid_get_pk_alg( &alg_oid, pk_alg ) != 0 ) + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + /* + * No parameters with RSA (only for EC) + */ + if( *pk_alg == MBEDTLS_PK_RSA && + ( ( params->tag != MBEDTLS_ASN1_NULL && params->tag != 0 ) || + params->len != 0 ) ) + { + return( MBEDTLS_ERR_PK_INVALID_ALG ); + } + + return( 0 ); +} + +/* + * SubjectPublicKeyInfo ::= SEQUENCE { + * algorithm AlgorithmIdentifier, + * subjectPublicKey BIT STRING } + */ +int mbedtls_pk_parse_subpubkey( unsigned char **p, const unsigned char *end, + mbedtls_pk_context *pk ) +{ + int ret; + size_t len; + mbedtls_asn1_buf alg_params; + mbedtls_pk_type_t pk_alg = MBEDTLS_PK_NONE; + const mbedtls_pk_info_t *pk_info; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + end = *p + len; + + if( ( ret = pk_get_pk_alg( p, end, &pk_alg, &alg_params ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_asn1_get_bitstring_null( p, end, &len ) ) != 0 ) + return( MBEDTLS_ERR_PK_INVALID_PUBKEY + ret ); + + if( *p + len != end ) + return( MBEDTLS_ERR_PK_INVALID_PUBKEY + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + if( ( pk_info = mbedtls_pk_info_from_type( pk_alg ) ) == NULL ) + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + if( ( ret = mbedtls_pk_setup( pk, pk_info ) ) != 0 ) + return( ret ); + +#if defined(MBEDTLS_RSA_C) + if( pk_alg == MBEDTLS_PK_RSA ) + { + ret = pk_get_rsapubkey( p, end, mbedtls_pk_rsa( *pk ) ); + } else +#endif /* MBEDTLS_RSA_C */ +#if defined(MBEDTLS_ECP_C) + if( pk_alg == MBEDTLS_PK_ECKEY_DH || pk_alg == MBEDTLS_PK_ECKEY ) + { + ret = pk_use_ecparams( &alg_params, &mbedtls_pk_ec( *pk )->grp ); + if( ret == 0 ) + ret = pk_get_ecpubkey( p, end, mbedtls_pk_ec( *pk ) ); + } else +#endif /* MBEDTLS_ECP_C */ + ret = MBEDTLS_ERR_PK_UNKNOWN_PK_ALG; + + if( ret == 0 && *p != end ) + ret = MBEDTLS_ERR_PK_INVALID_PUBKEY + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH; + + if( ret != 0 ) + mbedtls_pk_free( pk ); + + return( ret ); +} + +#if defined(MBEDTLS_RSA_C) +/* + * Parse a PKCS#1 encoded private RSA key + */ +static int pk_parse_key_pkcs1_der( mbedtls_rsa_context *rsa, + const unsigned char *key, + size_t keylen ) +{ + int ret; + size_t len; + unsigned char *p, *end; + + p = (unsigned char *) key; + end = p + keylen; + + /* + * This function parses the RSAPrivateKey (PKCS#1) + * + * RSAPrivateKey ::= SEQUENCE { + * version Version, + * modulus INTEGER, -- n + * publicExponent INTEGER, -- e + * privateExponent INTEGER, -- d + * prime1 INTEGER, -- p + * prime2 INTEGER, -- q + * exponent1 INTEGER, -- d mod (p-1) + * exponent2 INTEGER, -- d mod (q-1) + * coefficient INTEGER, -- (inverse of q) mod p + * otherPrimeInfos OtherPrimeInfos OPTIONAL + * } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + end = p + len; + + if( ( ret = mbedtls_asn1_get_int( &p, end, &rsa->ver ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + if( rsa->ver != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_VERSION ); + } + + if( ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->N ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->E ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->D ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->P ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->Q ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->DP ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->DQ ) ) != 0 || + ( ret = mbedtls_asn1_get_mpi( &p, end, &rsa->QP ) ) != 0 ) + { + mbedtls_rsa_free( rsa ); + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + rsa->len = mbedtls_mpi_size( &rsa->N ); + + if( p != end ) + { + mbedtls_rsa_free( rsa ); + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + if( ( ret = mbedtls_rsa_check_privkey( rsa ) ) != 0 ) + { + mbedtls_rsa_free( rsa ); + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) +/* + * Parse a SEC1 encoded private EC key + */ +static int pk_parse_key_sec1_der( mbedtls_ecp_keypair *eck, + const unsigned char *key, + size_t keylen ) +{ + int ret; + int version, pubkey_done; + size_t len; + mbedtls_asn1_buf params; + unsigned char *p = (unsigned char *) key; + unsigned char *end = p + keylen; + unsigned char *end2; + + /* + * RFC 5915, or SEC1 Appendix C.4 + * + * ECPrivateKey ::= SEQUENCE { + * version INTEGER { ecPrivkeyVer1(1) } (ecPrivkeyVer1), + * privateKey OCTET STRING, + * parameters [0] ECParameters {{ NamedCurve }} OPTIONAL, + * publicKey [1] BIT STRING OPTIONAL + * } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + end = p + len; + + if( ( ret = mbedtls_asn1_get_int( &p, end, &version ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( version != 1 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_VERSION ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( ( ret = mbedtls_mpi_read_binary( &eck->d, p, len ) ) != 0 ) + { + mbedtls_ecp_keypair_free( eck ); + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + p += len; + + pubkey_done = 0; + if( p != end ) + { + /* + * Is 'parameters' present? + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 0 ) ) == 0 ) + { + if( ( ret = pk_get_ecparams( &p, p + len, ¶ms) ) != 0 || + ( ret = pk_use_ecparams( ¶ms, &eck->grp ) ) != 0 ) + { + mbedtls_ecp_keypair_free( eck ); + return( ret ); + } + } + else if( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + { + mbedtls_ecp_keypair_free( eck ); + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + /* + * Is 'publickey' present? If not, or if we can't read it (eg because it + * is compressed), create it from the private key. + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 1 ) ) == 0 ) + { + end2 = p + len; + + if( ( ret = mbedtls_asn1_get_bitstring_null( &p, end2, &len ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( p + len != end2 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + if( ( ret = pk_get_ecpubkey( &p, end2, eck ) ) == 0 ) + pubkey_done = 1; + else + { + /* + * The only acceptable failure mode of pk_get_ecpubkey() above + * is if the point format is not recognized. + */ + if( ret != MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT ); + } + } + else if( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + { + mbedtls_ecp_keypair_free( eck ); + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + } + + if( ! pubkey_done && + ( ret = mbedtls_ecp_mul( &eck->grp, &eck->Q, &eck->d, &eck->grp.G, + NULL, NULL ) ) != 0 ) + { + mbedtls_ecp_keypair_free( eck ); + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + if( ( ret = mbedtls_ecp_check_privkey( &eck->grp, &eck->d ) ) != 0 ) + { + mbedtls_ecp_keypair_free( eck ); + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_ECP_C */ + +/* + * Parse an unencrypted PKCS#8 encoded private key + */ +static int pk_parse_key_pkcs8_unencrypted_der( + mbedtls_pk_context *pk, + const unsigned char* key, + size_t keylen ) +{ + int ret, version; + size_t len; + mbedtls_asn1_buf params; + unsigned char *p = (unsigned char *) key; + unsigned char *end = p + keylen; + mbedtls_pk_type_t pk_alg = MBEDTLS_PK_NONE; + const mbedtls_pk_info_t *pk_info; + + /* + * This function parses the PrivatKeyInfo object (PKCS#8 v1.2 = RFC 5208) + * + * PrivateKeyInfo ::= SEQUENCE { + * version Version, + * privateKeyAlgorithm PrivateKeyAlgorithmIdentifier, + * privateKey PrivateKey, + * attributes [0] IMPLICIT Attributes OPTIONAL } + * + * Version ::= INTEGER + * PrivateKeyAlgorithmIdentifier ::= AlgorithmIdentifier + * PrivateKey ::= OCTET STRING + * + * The PrivateKey OCTET STRING is a SEC1 ECPrivateKey + */ + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + end = p + len; + + if( ( ret = mbedtls_asn1_get_int( &p, end, &version ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( version != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_VERSION + ret ); + + if( ( ret = pk_get_pk_alg( &p, end, &pk_alg, ¶ms ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( len < 1 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + if( ( pk_info = mbedtls_pk_info_from_type( pk_alg ) ) == NULL ) + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + if( ( ret = mbedtls_pk_setup( pk, pk_info ) ) != 0 ) + return( ret ); + +#if defined(MBEDTLS_RSA_C) + if( pk_alg == MBEDTLS_PK_RSA ) + { + if( ( ret = pk_parse_key_pkcs1_der( mbedtls_pk_rsa( *pk ), p, len ) ) != 0 ) + { + mbedtls_pk_free( pk ); + return( ret ); + } + } else +#endif /* MBEDTLS_RSA_C */ +#if defined(MBEDTLS_ECP_C) + if( pk_alg == MBEDTLS_PK_ECKEY || pk_alg == MBEDTLS_PK_ECKEY_DH ) + { + if( ( ret = pk_use_ecparams( ¶ms, &mbedtls_pk_ec( *pk )->grp ) ) != 0 || + ( ret = pk_parse_key_sec1_der( mbedtls_pk_ec( *pk ), p, len ) ) != 0 ) + { + mbedtls_pk_free( pk ); + return( ret ); + } + } else +#endif /* MBEDTLS_ECP_C */ + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + return( 0 ); +} + +/* + * Parse an encrypted PKCS#8 encoded private key + */ +#if defined(MBEDTLS_PKCS12_C) || defined(MBEDTLS_PKCS5_C) +static int pk_parse_key_pkcs8_encrypted_der( + mbedtls_pk_context *pk, + const unsigned char *key, size_t keylen, + const unsigned char *pwd, size_t pwdlen ) +{ + int ret, decrypted = 0; + size_t len; + unsigned char buf[2048]; + unsigned char *p, *end; + mbedtls_asn1_buf pbe_alg_oid, pbe_params; +#if defined(MBEDTLS_PKCS12_C) + mbedtls_cipher_type_t cipher_alg; + mbedtls_md_type_t md_alg; +#endif + + memset( buf, 0, sizeof( buf ) ); + + p = (unsigned char *) key; + end = p + keylen; + + if( pwdlen == 0 ) + return( MBEDTLS_ERR_PK_PASSWORD_REQUIRED ); + + /* + * This function parses the EncryptedPrivatKeyInfo object (PKCS#8) + * + * EncryptedPrivateKeyInfo ::= SEQUENCE { + * encryptionAlgorithm EncryptionAlgorithmIdentifier, + * encryptedData EncryptedData + * } + * + * EncryptionAlgorithmIdentifier ::= AlgorithmIdentifier + * + * EncryptedData ::= OCTET STRING + * + * The EncryptedData OCTET STRING is a PKCS#8 PrivateKeyInfo + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + } + + end = p + len; + + if( ( ret = mbedtls_asn1_get_alg( &p, end, &pbe_alg_oid, &pbe_params ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT + ret ); + + if( len > sizeof( buf ) ) + return( MBEDTLS_ERR_PK_BAD_INPUT_DATA ); + + /* + * Decrypt EncryptedData with appropriate PDE + */ +#if defined(MBEDTLS_PKCS12_C) + if( mbedtls_oid_get_pkcs12_pbe_alg( &pbe_alg_oid, &md_alg, &cipher_alg ) == 0 ) + { + if( ( ret = mbedtls_pkcs12_pbe( &pbe_params, MBEDTLS_PKCS12_PBE_DECRYPT, + cipher_alg, md_alg, + pwd, pwdlen, p, len, buf ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH ) + return( MBEDTLS_ERR_PK_PASSWORD_MISMATCH ); + + return( ret ); + } + + decrypted = 1; + } + else if( MBEDTLS_OID_CMP( MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_128, &pbe_alg_oid ) == 0 ) + { + if( ( ret = mbedtls_pkcs12_pbe_sha1_rc4_128( &pbe_params, + MBEDTLS_PKCS12_PBE_DECRYPT, + pwd, pwdlen, + p, len, buf ) ) != 0 ) + { + return( ret ); + } + + // Best guess for password mismatch when using RC4. If first tag is + // not MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE + // + if( *buf != ( MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) + return( MBEDTLS_ERR_PK_PASSWORD_MISMATCH ); + + decrypted = 1; + } + else +#endif /* MBEDTLS_PKCS12_C */ +#if defined(MBEDTLS_PKCS5_C) + if( MBEDTLS_OID_CMP( MBEDTLS_OID_PKCS5_PBES2, &pbe_alg_oid ) == 0 ) + { + if( ( ret = mbedtls_pkcs5_pbes2( &pbe_params, MBEDTLS_PKCS5_DECRYPT, pwd, pwdlen, + p, len, buf ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH ) + return( MBEDTLS_ERR_PK_PASSWORD_MISMATCH ); + + return( ret ); + } + + decrypted = 1; + } + else +#endif /* MBEDTLS_PKCS5_C */ + { + ((void) pwd); + } + + if( decrypted == 0 ) + return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE ); + + return( pk_parse_key_pkcs8_unencrypted_der( pk, buf, len ) ); +} +#endif /* MBEDTLS_PKCS12_C || MBEDTLS_PKCS5_C */ + +/* + * Parse a private key + */ +int mbedtls_pk_parse_key( mbedtls_pk_context *pk, + const unsigned char *key, size_t keylen, + const unsigned char *pwd, size_t pwdlen ) +{ + int ret; + const mbedtls_pk_info_t *pk_info; + +#if defined(MBEDTLS_PEM_PARSE_C) + size_t len; + mbedtls_pem_context pem; + + mbedtls_pem_init( &pem ); + +#if defined(MBEDTLS_RSA_C) + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( keylen == 0 || key[keylen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN RSA PRIVATE KEY-----", + "-----END RSA PRIVATE KEY-----", + key, pwd, pwdlen, &len ); + + if( ret == 0 ) + { + if( ( pk_info = mbedtls_pk_info_from_type( MBEDTLS_PK_RSA ) ) == NULL ) + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + if( ( ret = mbedtls_pk_setup( pk, pk_info ) ) != 0 || + ( ret = pk_parse_key_pkcs1_der( mbedtls_pk_rsa( *pk ), + pem.buf, pem.buflen ) ) != 0 ) + { + mbedtls_pk_free( pk ); + } + + mbedtls_pem_free( &pem ); + return( ret ); + } + else if( ret == MBEDTLS_ERR_PEM_PASSWORD_MISMATCH ) + return( MBEDTLS_ERR_PK_PASSWORD_MISMATCH ); + else if( ret == MBEDTLS_ERR_PEM_PASSWORD_REQUIRED ) + return( MBEDTLS_ERR_PK_PASSWORD_REQUIRED ); + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + return( ret ); +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( keylen == 0 || key[keylen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN EC PRIVATE KEY-----", + "-----END EC PRIVATE KEY-----", + key, pwd, pwdlen, &len ); + if( ret == 0 ) + { + if( ( pk_info = mbedtls_pk_info_from_type( MBEDTLS_PK_ECKEY ) ) == NULL ) + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + if( ( ret = mbedtls_pk_setup( pk, pk_info ) ) != 0 || + ( ret = pk_parse_key_sec1_der( mbedtls_pk_ec( *pk ), + pem.buf, pem.buflen ) ) != 0 ) + { + mbedtls_pk_free( pk ); + } + + mbedtls_pem_free( &pem ); + return( ret ); + } + else if( ret == MBEDTLS_ERR_PEM_PASSWORD_MISMATCH ) + return( MBEDTLS_ERR_PK_PASSWORD_MISMATCH ); + else if( ret == MBEDTLS_ERR_PEM_PASSWORD_REQUIRED ) + return( MBEDTLS_ERR_PK_PASSWORD_REQUIRED ); + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + return( ret ); +#endif /* MBEDTLS_ECP_C */ + + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( keylen == 0 || key[keylen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN PRIVATE KEY-----", + "-----END PRIVATE KEY-----", + key, NULL, 0, &len ); + if( ret == 0 ) + { + if( ( ret = pk_parse_key_pkcs8_unencrypted_der( pk, + pem.buf, pem.buflen ) ) != 0 ) + { + mbedtls_pk_free( pk ); + } + + mbedtls_pem_free( &pem ); + return( ret ); + } + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + return( ret ); + +#if defined(MBEDTLS_PKCS12_C) || defined(MBEDTLS_PKCS5_C) + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( keylen == 0 || key[keylen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN ENCRYPTED PRIVATE KEY-----", + "-----END ENCRYPTED PRIVATE KEY-----", + key, NULL, 0, &len ); + if( ret == 0 ) + { + if( ( ret = pk_parse_key_pkcs8_encrypted_der( pk, + pem.buf, pem.buflen, + pwd, pwdlen ) ) != 0 ) + { + mbedtls_pk_free( pk ); + } + + mbedtls_pem_free( &pem ); + return( ret ); + } + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + return( ret ); +#endif /* MBEDTLS_PKCS12_C || MBEDTLS_PKCS5_C */ +#else + ((void) ret); + ((void) pwd); + ((void) pwdlen); +#endif /* MBEDTLS_PEM_PARSE_C */ + + /* + * At this point we only know it's not a PEM formatted key. Could be any + * of the known DER encoded private key formats + * + * We try the different DER format parsers to see if one passes without + * error + */ +#if defined(MBEDTLS_PKCS12_C) || defined(MBEDTLS_PKCS5_C) + if( ( ret = pk_parse_key_pkcs8_encrypted_der( pk, key, keylen, + pwd, pwdlen ) ) == 0 ) + { + return( 0 ); + } + + mbedtls_pk_free( pk ); + + if( ret == MBEDTLS_ERR_PK_PASSWORD_MISMATCH ) + { + return( ret ); + } +#endif /* MBEDTLS_PKCS12_C || MBEDTLS_PKCS5_C */ + + if( ( ret = pk_parse_key_pkcs8_unencrypted_der( pk, key, keylen ) ) == 0 ) + return( 0 ); + + mbedtls_pk_free( pk ); + +#if defined(MBEDTLS_RSA_C) + if( ( pk_info = mbedtls_pk_info_from_type( MBEDTLS_PK_RSA ) ) == NULL ) + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + if( ( ret = mbedtls_pk_setup( pk, pk_info ) ) != 0 || + ( ret = pk_parse_key_pkcs1_der( mbedtls_pk_rsa( *pk ), key, keylen ) ) == 0 ) + { + return( 0 ); + } + + mbedtls_pk_free( pk ); +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) + if( ( pk_info = mbedtls_pk_info_from_type( MBEDTLS_PK_ECKEY ) ) == NULL ) + return( MBEDTLS_ERR_PK_UNKNOWN_PK_ALG ); + + if( ( ret = mbedtls_pk_setup( pk, pk_info ) ) != 0 || + ( ret = pk_parse_key_sec1_der( mbedtls_pk_ec( *pk ), key, keylen ) ) == 0 ) + { + return( 0 ); + } + + mbedtls_pk_free( pk ); +#endif /* MBEDTLS_ECP_C */ + + return( MBEDTLS_ERR_PK_KEY_INVALID_FORMAT ); +} + +/* + * Parse a public key + */ +int mbedtls_pk_parse_public_key( mbedtls_pk_context *ctx, + const unsigned char *key, size_t keylen ) +{ + int ret; + unsigned char *p; +#if defined(MBEDTLS_PEM_PARSE_C) + size_t len; + mbedtls_pem_context pem; + + mbedtls_pem_init( &pem ); + + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( keylen == 0 || key[keylen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN PUBLIC KEY-----", + "-----END PUBLIC KEY-----", + key, NULL, 0, &len ); + + if( ret == 0 ) + { + /* + * Was PEM encoded + */ + key = pem.buf; + keylen = pem.buflen; + } + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + { + mbedtls_pem_free( &pem ); + return( ret ); + } +#endif /* MBEDTLS_PEM_PARSE_C */ + p = (unsigned char *) key; + + ret = mbedtls_pk_parse_subpubkey( &p, p + keylen, ctx ); + +#if defined(MBEDTLS_PEM_PARSE_C) + mbedtls_pem_free( &pem ); +#endif + + return( ret ); +} + +#endif /* MBEDTLS_PK_PARSE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkwrite.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkwrite.c new file mode 100644 index 0000000..83b798c --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/pkwrite.c @@ -0,0 +1,439 @@ +/* + * Public Key layer for writing key files and structures + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PK_WRITE_C) + +#include "mbedtls/pk.h" +#include "mbedtls/asn1write.h" +#include "mbedtls/oid.h" + +#include + +#if defined(MBEDTLS_RSA_C) +#include "mbedtls/rsa.h" +#endif +#if defined(MBEDTLS_ECP_C) +#include "mbedtls/ecp.h" +#endif +#if defined(MBEDTLS_ECDSA_C) +#include "mbedtls/ecdsa.h" +#endif +#if defined(MBEDTLS_PEM_WRITE_C) +#include "mbedtls/pem.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if defined(MBEDTLS_RSA_C) +/* + * RSAPublicKey ::= SEQUENCE { + * modulus INTEGER, -- n + * publicExponent INTEGER -- e + * } + */ +static int pk_write_rsa_pubkey( unsigned char **p, unsigned char *start, + mbedtls_rsa_context *rsa ) +{ + int ret; + size_t len = 0; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( p, start, &rsa->E ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( p, start, &rsa->N ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return( (int) len ); +} +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) +/* + * EC public key is an EC point + */ +static int pk_write_ec_pubkey( unsigned char **p, unsigned char *start, + mbedtls_ecp_keypair *ec ) +{ + int ret; + size_t len = 0; + unsigned char buf[MBEDTLS_ECP_MAX_PT_LEN]; + + if( ( ret = mbedtls_ecp_point_write_binary( &ec->grp, &ec->Q, + MBEDTLS_ECP_PF_UNCOMPRESSED, + &len, buf, sizeof( buf ) ) ) != 0 ) + { + return( ret ); + } + + if( *p < start || (size_t)( *p - start ) < len ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *p -= len; + memcpy( *p, buf, len ); + + return( (int) len ); +} + +/* + * ECParameters ::= CHOICE { + * namedCurve OBJECT IDENTIFIER + * } + */ +static int pk_write_ec_param( unsigned char **p, unsigned char *start, + mbedtls_ecp_keypair *ec ) +{ + int ret; + size_t len = 0; + const char *oid; + size_t oid_len; + + if( ( ret = mbedtls_oid_get_oid_by_ec_grp( ec->grp.id, &oid, &oid_len ) ) != 0 ) + return( ret ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_oid( p, start, oid, oid_len ) ); + + return( (int) len ); +} +#endif /* MBEDTLS_ECP_C */ + +int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start, + const mbedtls_pk_context *key ) +{ + int ret; + size_t len = 0; + +#if defined(MBEDTLS_RSA_C) + if( mbedtls_pk_get_type( key ) == MBEDTLS_PK_RSA ) + MBEDTLS_ASN1_CHK_ADD( len, pk_write_rsa_pubkey( p, start, mbedtls_pk_rsa( *key ) ) ); + else +#endif +#if defined(MBEDTLS_ECP_C) + if( mbedtls_pk_get_type( key ) == MBEDTLS_PK_ECKEY ) + MBEDTLS_ASN1_CHK_ADD( len, pk_write_ec_pubkey( p, start, mbedtls_pk_ec( *key ) ) ); + else +#endif + return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE ); + + return( (int) len ); +} + +int mbedtls_pk_write_pubkey_der( mbedtls_pk_context *key, unsigned char *buf, size_t size ) +{ + int ret; + unsigned char *c; + size_t len = 0, par_len = 0, oid_len; + const char *oid; + + c = buf + size; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_pk_write_pubkey( &c, buf, key ) ); + + if( c - buf < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + /* + * SubjectPublicKeyInfo ::= SEQUENCE { + * algorithm AlgorithmIdentifier, + * subjectPublicKey BIT STRING } + */ + *--c = 0; + len += 1; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_BIT_STRING ) ); + + if( ( ret = mbedtls_oid_get_oid_by_pk_alg( mbedtls_pk_get_type( key ), + &oid, &oid_len ) ) != 0 ) + { + return( ret ); + } + +#if defined(MBEDTLS_ECP_C) + if( mbedtls_pk_get_type( key ) == MBEDTLS_PK_ECKEY ) + { + MBEDTLS_ASN1_CHK_ADD( par_len, pk_write_ec_param( &c, buf, mbedtls_pk_ec( *key ) ) ); + } +#endif + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_algorithm_identifier( &c, buf, oid, oid_len, + par_len ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return( (int) len ); +} + +int mbedtls_pk_write_key_der( mbedtls_pk_context *key, unsigned char *buf, size_t size ) +{ + int ret; + unsigned char *c = buf + size; + size_t len = 0; + +#if defined(MBEDTLS_RSA_C) + if( mbedtls_pk_get_type( key ) == MBEDTLS_PK_RSA ) + { + mbedtls_rsa_context *rsa = mbedtls_pk_rsa( *key ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->QP ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->DQ ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->DP ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->Q ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->P ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->D ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->E ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &rsa->N ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_int( &c, buf, 0 ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + } + else +#endif /* MBEDTLS_RSA_C */ +#if defined(MBEDTLS_ECP_C) + if( mbedtls_pk_get_type( key ) == MBEDTLS_PK_ECKEY ) + { + mbedtls_ecp_keypair *ec = mbedtls_pk_ec( *key ); + size_t pub_len = 0, par_len = 0; + + /* + * RFC 5915, or SEC1 Appendix C.4 + * + * ECPrivateKey ::= SEQUENCE { + * version INTEGER { ecPrivkeyVer1(1) } (ecPrivkeyVer1), + * privateKey OCTET STRING, + * parameters [0] ECParameters {{ NamedCurve }} OPTIONAL, + * publicKey [1] BIT STRING OPTIONAL + * } + */ + + /* publicKey */ + MBEDTLS_ASN1_CHK_ADD( pub_len, pk_write_ec_pubkey( &c, buf, ec ) ); + + if( c - buf < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + *--c = 0; + pub_len += 1; + + MBEDTLS_ASN1_CHK_ADD( pub_len, mbedtls_asn1_write_len( &c, buf, pub_len ) ); + MBEDTLS_ASN1_CHK_ADD( pub_len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_BIT_STRING ) ); + + MBEDTLS_ASN1_CHK_ADD( pub_len, mbedtls_asn1_write_len( &c, buf, pub_len ) ); + MBEDTLS_ASN1_CHK_ADD( pub_len, mbedtls_asn1_write_tag( &c, buf, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 1 ) ); + len += pub_len; + + /* parameters */ + MBEDTLS_ASN1_CHK_ADD( par_len, pk_write_ec_param( &c, buf, ec ) ); + + MBEDTLS_ASN1_CHK_ADD( par_len, mbedtls_asn1_write_len( &c, buf, par_len ) ); + MBEDTLS_ASN1_CHK_ADD( par_len, mbedtls_asn1_write_tag( &c, buf, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 0 ) ); + len += par_len; + + /* privateKey: write as MPI then fix tag */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, buf, &ec->d ) ); + *c = MBEDTLS_ASN1_OCTET_STRING; + + /* version */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_int( &c, buf, 1 ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + } + else +#endif /* MBEDTLS_ECP_C */ + return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE ); + + return( (int) len ); +} + +#if defined(MBEDTLS_PEM_WRITE_C) + +#define PEM_BEGIN_PUBLIC_KEY "-----BEGIN PUBLIC KEY-----\n" +#define PEM_END_PUBLIC_KEY "-----END PUBLIC KEY-----\n" + +#define PEM_BEGIN_PRIVATE_KEY_RSA "-----BEGIN RSA PRIVATE KEY-----\n" +#define PEM_END_PRIVATE_KEY_RSA "-----END RSA PRIVATE KEY-----\n" +#define PEM_BEGIN_PRIVATE_KEY_EC "-----BEGIN EC PRIVATE KEY-----\n" +#define PEM_END_PRIVATE_KEY_EC "-----END EC PRIVATE KEY-----\n" + +/* + * Max sizes of key per types. Shown as tag + len (+ content). + */ + +#if defined(MBEDTLS_RSA_C) +/* + * RSA public keys: + * SubjectPublicKeyInfo ::= SEQUENCE { 1 + 3 + * algorithm AlgorithmIdentifier, 1 + 1 (sequence) + * + 1 + 1 + 9 (rsa oid) + * + 1 + 1 (params null) + * subjectPublicKey BIT STRING } 1 + 3 + (1 + below) + * RSAPublicKey ::= SEQUENCE { 1 + 3 + * modulus INTEGER, -- n 1 + 3 + MPI_MAX + 1 + * publicExponent INTEGER -- e 1 + 3 + MPI_MAX + 1 + * } + */ +#define RSA_PUB_DER_MAX_BYTES 38 + 2 * MBEDTLS_MPI_MAX_SIZE + +/* + * RSA private keys: + * RSAPrivateKey ::= SEQUENCE { 1 + 3 + * version Version, 1 + 1 + 1 + * modulus INTEGER, 1 + 3 + MPI_MAX + 1 + * publicExponent INTEGER, 1 + 3 + MPI_MAX + 1 + * privateExponent INTEGER, 1 + 3 + MPI_MAX + 1 + * prime1 INTEGER, 1 + 3 + MPI_MAX / 2 + 1 + * prime2 INTEGER, 1 + 3 + MPI_MAX / 2 + 1 + * exponent1 INTEGER, 1 + 3 + MPI_MAX / 2 + 1 + * exponent2 INTEGER, 1 + 3 + MPI_MAX / 2 + 1 + * coefficient INTEGER, 1 + 3 + MPI_MAX / 2 + 1 + * otherPrimeInfos OtherPrimeInfos OPTIONAL 0 (not supported) + * } + */ +#define MPI_MAX_SIZE_2 MBEDTLS_MPI_MAX_SIZE / 2 + \ + MBEDTLS_MPI_MAX_SIZE % 2 +#define RSA_PRV_DER_MAX_BYTES 47 + 3 * MBEDTLS_MPI_MAX_SIZE \ + + 5 * MPI_MAX_SIZE_2 + +#else /* MBEDTLS_RSA_C */ + +#define RSA_PUB_DER_MAX_BYTES 0 +#define RSA_PRV_DER_MAX_BYTES 0 + +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) +/* + * EC public keys: + * SubjectPublicKeyInfo ::= SEQUENCE { 1 + 2 + * algorithm AlgorithmIdentifier, 1 + 1 (sequence) + * + 1 + 1 + 7 (ec oid) + * + 1 + 1 + 9 (namedCurve oid) + * subjectPublicKey BIT STRING 1 + 2 + 1 [1] + * + 1 (point format) [1] + * + 2 * ECP_MAX (coords) [1] + * } + */ +#define ECP_PUB_DER_MAX_BYTES 30 + 2 * MBEDTLS_ECP_MAX_BYTES + +/* + * EC private keys: + * ECPrivateKey ::= SEQUENCE { 1 + 2 + * version INTEGER , 1 + 1 + 1 + * privateKey OCTET STRING, 1 + 1 + ECP_MAX + * parameters [0] ECParameters OPTIONAL, 1 + 1 + (1 + 1 + 9) + * publicKey [1] BIT STRING OPTIONAL 1 + 2 + [1] above + * } + */ +#define ECP_PRV_DER_MAX_BYTES 29 + 3 * MBEDTLS_ECP_MAX_BYTES + +#else /* MBEDTLS_ECP_C */ + +#define ECP_PUB_DER_MAX_BYTES 0 +#define ECP_PRV_DER_MAX_BYTES 0 + +#endif /* MBEDTLS_ECP_C */ + +#define PUB_DER_MAX_BYTES RSA_PUB_DER_MAX_BYTES > ECP_PUB_DER_MAX_BYTES ? \ + RSA_PUB_DER_MAX_BYTES : ECP_PUB_DER_MAX_BYTES +#define PRV_DER_MAX_BYTES RSA_PRV_DER_MAX_BYTES > ECP_PRV_DER_MAX_BYTES ? \ + RSA_PRV_DER_MAX_BYTES : ECP_PRV_DER_MAX_BYTES + +int mbedtls_pk_write_pubkey_pem( mbedtls_pk_context *key, unsigned char *buf, size_t size ) +{ + int ret; + unsigned char output_buf[PUB_DER_MAX_BYTES]; + size_t olen = 0; + + if( ( ret = mbedtls_pk_write_pubkey_der( key, output_buf, + sizeof(output_buf) ) ) < 0 ) + { + return( ret ); + } + + if( ( ret = mbedtls_pem_write_buffer( PEM_BEGIN_PUBLIC_KEY, PEM_END_PUBLIC_KEY, + output_buf + sizeof(output_buf) - ret, + ret, buf, size, &olen ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} + +int mbedtls_pk_write_key_pem( mbedtls_pk_context *key, unsigned char *buf, size_t size ) +{ + int ret; + unsigned char output_buf[PRV_DER_MAX_BYTES]; + const char *begin, *end; + size_t olen = 0; + + if( ( ret = mbedtls_pk_write_key_der( key, output_buf, sizeof(output_buf) ) ) < 0 ) + return( ret ); + +#if defined(MBEDTLS_RSA_C) + if( mbedtls_pk_get_type( key ) == MBEDTLS_PK_RSA ) + { + begin = PEM_BEGIN_PRIVATE_KEY_RSA; + end = PEM_END_PRIVATE_KEY_RSA; + } + else +#endif +#if defined(MBEDTLS_ECP_C) + if( mbedtls_pk_get_type( key ) == MBEDTLS_PK_ECKEY ) + { + begin = PEM_BEGIN_PRIVATE_KEY_EC; + end = PEM_END_PRIVATE_KEY_EC; + } + else +#endif + return( MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE ); + + if( ( ret = mbedtls_pem_write_buffer( begin, end, + output_buf + sizeof(output_buf) - ret, + ret, buf, size, &olen ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_PEM_WRITE_C */ + +#endif /* MBEDTLS_PK_WRITE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/platform.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/platform.c new file mode 100644 index 0000000..d634c62 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/platform.c @@ -0,0 +1,193 @@ +/* + * Platform abstraction layer + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PLATFORM_C) + +#include "mbedtls/platform.h" + +#if defined(MBEDTLS_PLATFORM_MEMORY) +#if !defined(MBEDTLS_PLATFORM_STD_CALLOC) +static void *platform_calloc_uninit( size_t n, size_t size ) +{ + ((void) n); + ((void) size); + return( NULL ); +} + +#define MBEDTLS_PLATFORM_STD_CALLOC platform_calloc_uninit +#endif /* !MBEDTLS_PLATFORM_STD_CALLOC */ + +#if !defined(MBEDTLS_PLATFORM_STD_FREE) +static void platform_free_uninit( void *ptr ) +{ + ((void) ptr); +} + +#define MBEDTLS_PLATFORM_STD_FREE platform_free_uninit +#endif /* !MBEDTLS_PLATFORM_STD_FREE */ + +void * (*mbedtls_calloc)( size_t, size_t ) = MBEDTLS_PLATFORM_STD_CALLOC; +void (*mbedtls_free)( void * ) = MBEDTLS_PLATFORM_STD_FREE; + +int mbedtls_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ), + void (*free_func)( void * ) ) +{ + mbedtls_calloc = calloc_func; + mbedtls_free = free_func; + return( 0 ); +} +#endif /* MBEDTLS_PLATFORM_MEMORY */ + +#if defined(_WIN32) +#include +int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... ) +{ + int ret; + va_list argp; + + /* Avoid calling the invalid parameter handler by checking ourselves */ + if( s == NULL || n == 0 || fmt == NULL ) + return( -1 ); + + va_start( argp, fmt ); +#if defined(_TRUNCATE) + ret = _vsnprintf_s( s, n, _TRUNCATE, fmt, argp ); +#else + ret = _vsnprintf( s, n, fmt, argp ); + if( ret < 0 || (size_t) ret == n ) + { + s[n-1] = '\0'; + ret = -1; + } +#endif + va_end( argp ); + + return( ret ); +} +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) +#if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF) +/* + * Make dummy function to prevent NULL pointer dereferences + */ +static int platform_snprintf_uninit( char * s, size_t n, + const char * format, ... ) +{ + ((void) s); + ((void) n); + ((void) format); + return( 0 ); +} + +#define MBEDTLS_PLATFORM_STD_SNPRINTF platform_snprintf_uninit +#endif /* !MBEDTLS_PLATFORM_STD_SNPRINTF */ + +int (*mbedtls_snprintf)( char * s, size_t n, + const char * format, + ... ) = MBEDTLS_PLATFORM_STD_SNPRINTF; + +int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n, + const char * format, + ... ) ) +{ + mbedtls_snprintf = snprintf_func; + return( 0 ); +} +#endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */ + +#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) +#if !defined(MBEDTLS_PLATFORM_STD_PRINTF) +/* + * Make dummy function to prevent NULL pointer dereferences + */ +static int platform_printf_uninit( const char *format, ... ) +{ + ((void) format); + return( 0 ); +} + +#define MBEDTLS_PLATFORM_STD_PRINTF platform_printf_uninit +#endif /* !MBEDTLS_PLATFORM_STD_PRINTF */ + +int (*mbedtls_printf)( const char *, ... ) = MBEDTLS_PLATFORM_STD_PRINTF; + +int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) ) +{ + mbedtls_printf = printf_func; + return( 0 ); +} +#endif /* MBEDTLS_PLATFORM_PRINTF_ALT */ + +#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) +#if !defined(MBEDTLS_PLATFORM_STD_FPRINTF) +/* + * Make dummy function to prevent NULL pointer dereferences + */ +static int platform_fprintf_uninit( FILE *stream, const char *format, ... ) +{ + ((void) stream); + ((void) format); + return( 0 ); +} + +#define MBEDTLS_PLATFORM_STD_FPRINTF platform_fprintf_uninit +#endif /* !MBEDTLS_PLATFORM_STD_FPRINTF */ + +int (*mbedtls_fprintf)( FILE *, const char *, ... ) = + MBEDTLS_PLATFORM_STD_FPRINTF; + +int mbedtls_platform_set_fprintf( int (*fprintf_func)( FILE *, const char *, ... ) ) +{ + mbedtls_fprintf = fprintf_func; + return( 0 ); +} +#endif /* MBEDTLS_PLATFORM_FPRINTF_ALT */ + +#if defined(MBEDTLS_PLATFORM_EXIT_ALT) +#if !defined(MBEDTLS_PLATFORM_STD_EXIT) +/* + * Make dummy function to prevent NULL pointer dereferences + */ +static void platform_exit_uninit( int status ) +{ + ((void) status); +} + +#define MBEDTLS_PLATFORM_STD_EXIT platform_exit_uninit +#endif /* !MBEDTLS_PLATFORM_STD_EXIT */ + +void (*mbedtls_exit)( int status ) = MBEDTLS_PLATFORM_STD_EXIT; + +int mbedtls_platform_set_exit( void (*exit_func)( int status ) ) +{ + mbedtls_exit = exit_func; + return( 0 ); +} +#endif /* MBEDTLS_PLATFORM_EXIT_ALT */ + +#endif /* MBEDTLS_PLATFORM_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ripemd160.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ripemd160.c new file mode 100644 index 0000000..a55cc3e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ripemd160.c @@ -0,0 +1,464 @@ +/* + * RIPE MD-160 implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * The RIPEMD-160 algorithm was designed by RIPE in 1996 + * http://homes.esat.kuleuven.be/~bosselae/mbedtls_ripemd160.html + * http://ehash.iaik.tugraz.at/wiki/RIPEMD-160 + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_RIPEMD160_C) + +#include "mbedtls/ripemd160.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +/* + * 32-bit integer manipulation macros (little endian) + */ +#ifndef GET_UINT32_LE +#define GET_UINT32_LE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] ) \ + | ( (uint32_t) (b)[(i) + 1] << 8 ) \ + | ( (uint32_t) (b)[(i) + 2] << 16 ) \ + | ( (uint32_t) (b)[(i) + 3] << 24 ); \ +} +#endif + +#ifndef PUT_UINT32_LE +#define PUT_UINT32_LE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( ( (n) ) & 0xFF ); \ + (b)[(i) + 1] = (unsigned char) ( ( (n) >> 8 ) & 0xFF ); \ + (b)[(i) + 2] = (unsigned char) ( ( (n) >> 16 ) & 0xFF ); \ + (b)[(i) + 3] = (unsigned char) ( ( (n) >> 24 ) & 0xFF ); \ +} +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +void mbedtls_ripemd160_init( mbedtls_ripemd160_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_ripemd160_context ) ); +} + +void mbedtls_ripemd160_free( mbedtls_ripemd160_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_ripemd160_context ) ); +} + +void mbedtls_ripemd160_clone( mbedtls_ripemd160_context *dst, + const mbedtls_ripemd160_context *src ) +{ + *dst = *src; +} + +/* + * RIPEMD-160 context setup + */ +void mbedtls_ripemd160_starts( mbedtls_ripemd160_context *ctx ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + ctx->state[0] = 0x67452301; + ctx->state[1] = 0xEFCDAB89; + ctx->state[2] = 0x98BADCFE; + ctx->state[3] = 0x10325476; + ctx->state[4] = 0xC3D2E1F0; +} + +#if !defined(MBEDTLS_RIPEMD160_PROCESS_ALT) +/* + * Process one block + */ +void mbedtls_ripemd160_process( mbedtls_ripemd160_context *ctx, const unsigned char data[64] ) +{ + uint32_t A, B, C, D, E, Ap, Bp, Cp, Dp, Ep, X[16]; + + GET_UINT32_LE( X[ 0], data, 0 ); + GET_UINT32_LE( X[ 1], data, 4 ); + GET_UINT32_LE( X[ 2], data, 8 ); + GET_UINT32_LE( X[ 3], data, 12 ); + GET_UINT32_LE( X[ 4], data, 16 ); + GET_UINT32_LE( X[ 5], data, 20 ); + GET_UINT32_LE( X[ 6], data, 24 ); + GET_UINT32_LE( X[ 7], data, 28 ); + GET_UINT32_LE( X[ 8], data, 32 ); + GET_UINT32_LE( X[ 9], data, 36 ); + GET_UINT32_LE( X[10], data, 40 ); + GET_UINT32_LE( X[11], data, 44 ); + GET_UINT32_LE( X[12], data, 48 ); + GET_UINT32_LE( X[13], data, 52 ); + GET_UINT32_LE( X[14], data, 56 ); + GET_UINT32_LE( X[15], data, 60 ); + + A = Ap = ctx->state[0]; + B = Bp = ctx->state[1]; + C = Cp = ctx->state[2]; + D = Dp = ctx->state[3]; + E = Ep = ctx->state[4]; + +#define F1( x, y, z ) ( x ^ y ^ z ) +#define F2( x, y, z ) ( ( x & y ) | ( ~x & z ) ) +#define F3( x, y, z ) ( ( x | ~y ) ^ z ) +#define F4( x, y, z ) ( ( x & z ) | ( y & ~z ) ) +#define F5( x, y, z ) ( x ^ ( y | ~z ) ) + +#define S( x, n ) ( ( x << n ) | ( x >> (32 - n) ) ) + +#define P( a, b, c, d, e, r, s, f, k ) \ + a += f( b, c, d ) + X[r] + k; \ + a = S( a, s ) + e; \ + c = S( c, 10 ); + +#define P2( a, b, c, d, e, r, s, rp, sp ) \ + P( a, b, c, d, e, r, s, F, K ); \ + P( a ## p, b ## p, c ## p, d ## p, e ## p, rp, sp, Fp, Kp ); + +#define F F1 +#define K 0x00000000 +#define Fp F5 +#define Kp 0x50A28BE6 + P2( A, B, C, D, E, 0, 11, 5, 8 ); + P2( E, A, B, C, D, 1, 14, 14, 9 ); + P2( D, E, A, B, C, 2, 15, 7, 9 ); + P2( C, D, E, A, B, 3, 12, 0, 11 ); + P2( B, C, D, E, A, 4, 5, 9, 13 ); + P2( A, B, C, D, E, 5, 8, 2, 15 ); + P2( E, A, B, C, D, 6, 7, 11, 15 ); + P2( D, E, A, B, C, 7, 9, 4, 5 ); + P2( C, D, E, A, B, 8, 11, 13, 7 ); + P2( B, C, D, E, A, 9, 13, 6, 7 ); + P2( A, B, C, D, E, 10, 14, 15, 8 ); + P2( E, A, B, C, D, 11, 15, 8, 11 ); + P2( D, E, A, B, C, 12, 6, 1, 14 ); + P2( C, D, E, A, B, 13, 7, 10, 14 ); + P2( B, C, D, E, A, 14, 9, 3, 12 ); + P2( A, B, C, D, E, 15, 8, 12, 6 ); +#undef F +#undef K +#undef Fp +#undef Kp + +#define F F2 +#define K 0x5A827999 +#define Fp F4 +#define Kp 0x5C4DD124 + P2( E, A, B, C, D, 7, 7, 6, 9 ); + P2( D, E, A, B, C, 4, 6, 11, 13 ); + P2( C, D, E, A, B, 13, 8, 3, 15 ); + P2( B, C, D, E, A, 1, 13, 7, 7 ); + P2( A, B, C, D, E, 10, 11, 0, 12 ); + P2( E, A, B, C, D, 6, 9, 13, 8 ); + P2( D, E, A, B, C, 15, 7, 5, 9 ); + P2( C, D, E, A, B, 3, 15, 10, 11 ); + P2( B, C, D, E, A, 12, 7, 14, 7 ); + P2( A, B, C, D, E, 0, 12, 15, 7 ); + P2( E, A, B, C, D, 9, 15, 8, 12 ); + P2( D, E, A, B, C, 5, 9, 12, 7 ); + P2( C, D, E, A, B, 2, 11, 4, 6 ); + P2( B, C, D, E, A, 14, 7, 9, 15 ); + P2( A, B, C, D, E, 11, 13, 1, 13 ); + P2( E, A, B, C, D, 8, 12, 2, 11 ); +#undef F +#undef K +#undef Fp +#undef Kp + +#define F F3 +#define K 0x6ED9EBA1 +#define Fp F3 +#define Kp 0x6D703EF3 + P2( D, E, A, B, C, 3, 11, 15, 9 ); + P2( C, D, E, A, B, 10, 13, 5, 7 ); + P2( B, C, D, E, A, 14, 6, 1, 15 ); + P2( A, B, C, D, E, 4, 7, 3, 11 ); + P2( E, A, B, C, D, 9, 14, 7, 8 ); + P2( D, E, A, B, C, 15, 9, 14, 6 ); + P2( C, D, E, A, B, 8, 13, 6, 6 ); + P2( B, C, D, E, A, 1, 15, 9, 14 ); + P2( A, B, C, D, E, 2, 14, 11, 12 ); + P2( E, A, B, C, D, 7, 8, 8, 13 ); + P2( D, E, A, B, C, 0, 13, 12, 5 ); + P2( C, D, E, A, B, 6, 6, 2, 14 ); + P2( B, C, D, E, A, 13, 5, 10, 13 ); + P2( A, B, C, D, E, 11, 12, 0, 13 ); + P2( E, A, B, C, D, 5, 7, 4, 7 ); + P2( D, E, A, B, C, 12, 5, 13, 5 ); +#undef F +#undef K +#undef Fp +#undef Kp + +#define F F4 +#define K 0x8F1BBCDC +#define Fp F2 +#define Kp 0x7A6D76E9 + P2( C, D, E, A, B, 1, 11, 8, 15 ); + P2( B, C, D, E, A, 9, 12, 6, 5 ); + P2( A, B, C, D, E, 11, 14, 4, 8 ); + P2( E, A, B, C, D, 10, 15, 1, 11 ); + P2( D, E, A, B, C, 0, 14, 3, 14 ); + P2( C, D, E, A, B, 8, 15, 11, 14 ); + P2( B, C, D, E, A, 12, 9, 15, 6 ); + P2( A, B, C, D, E, 4, 8, 0, 14 ); + P2( E, A, B, C, D, 13, 9, 5, 6 ); + P2( D, E, A, B, C, 3, 14, 12, 9 ); + P2( C, D, E, A, B, 7, 5, 2, 12 ); + P2( B, C, D, E, A, 15, 6, 13, 9 ); + P2( A, B, C, D, E, 14, 8, 9, 12 ); + P2( E, A, B, C, D, 5, 6, 7, 5 ); + P2( D, E, A, B, C, 6, 5, 10, 15 ); + P2( C, D, E, A, B, 2, 12, 14, 8 ); +#undef F +#undef K +#undef Fp +#undef Kp + +#define F F5 +#define K 0xA953FD4E +#define Fp F1 +#define Kp 0x00000000 + P2( B, C, D, E, A, 4, 9, 12, 8 ); + P2( A, B, C, D, E, 0, 15, 15, 5 ); + P2( E, A, B, C, D, 5, 5, 10, 12 ); + P2( D, E, A, B, C, 9, 11, 4, 9 ); + P2( C, D, E, A, B, 7, 6, 1, 12 ); + P2( B, C, D, E, A, 12, 8, 5, 5 ); + P2( A, B, C, D, E, 2, 13, 8, 14 ); + P2( E, A, B, C, D, 10, 12, 7, 6 ); + P2( D, E, A, B, C, 14, 5, 6, 8 ); + P2( C, D, E, A, B, 1, 12, 2, 13 ); + P2( B, C, D, E, A, 3, 13, 13, 6 ); + P2( A, B, C, D, E, 8, 14, 14, 5 ); + P2( E, A, B, C, D, 11, 11, 0, 15 ); + P2( D, E, A, B, C, 6, 8, 3, 13 ); + P2( C, D, E, A, B, 15, 5, 9, 11 ); + P2( B, C, D, E, A, 13, 6, 11, 11 ); +#undef F +#undef K +#undef Fp +#undef Kp + + C = ctx->state[1] + C + Dp; + ctx->state[1] = ctx->state[2] + D + Ep; + ctx->state[2] = ctx->state[3] + E + Ap; + ctx->state[3] = ctx->state[4] + A + Bp; + ctx->state[4] = ctx->state[0] + B + Cp; + ctx->state[0] = C; +} +#endif /* !MBEDTLS_RIPEMD160_PROCESS_ALT */ + +/* + * RIPEMD-160 process buffer + */ +void mbedtls_ripemd160_update( mbedtls_ripemd160_context *ctx, + const unsigned char *input, size_t ilen ) +{ + size_t fill; + uint32_t left; + + if( ilen == 0 ) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += (uint32_t) ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if( ctx->total[0] < (uint32_t) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), input, fill ); + mbedtls_ripemd160_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 64 ) + { + mbedtls_ripemd160_process( ctx, input ); + input += 64; + ilen -= 64; + } + + if( ilen > 0 ) + { + memcpy( (void *) (ctx->buffer + left), input, ilen ); + } +} + +static const unsigned char ripemd160_padding[64] = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * RIPEMD-160 final digest + */ +void mbedtls_ripemd160_finish( mbedtls_ripemd160_context *ctx, unsigned char output[20] ) +{ + uint32_t last, padn; + uint32_t high, low; + unsigned char msglen[8]; + + high = ( ctx->total[0] >> 29 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_UINT32_LE( low, msglen, 0 ); + PUT_UINT32_LE( high, msglen, 4 ); + + last = ctx->total[0] & 0x3F; + padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + + mbedtls_ripemd160_update( ctx, ripemd160_padding, padn ); + mbedtls_ripemd160_update( ctx, msglen, 8 ); + + PUT_UINT32_LE( ctx->state[0], output, 0 ); + PUT_UINT32_LE( ctx->state[1], output, 4 ); + PUT_UINT32_LE( ctx->state[2], output, 8 ); + PUT_UINT32_LE( ctx->state[3], output, 12 ); + PUT_UINT32_LE( ctx->state[4], output, 16 ); +} + +/* + * output = RIPEMD-160( input buffer ) + */ +void mbedtls_ripemd160( const unsigned char *input, size_t ilen, + unsigned char output[20] ) +{ + mbedtls_ripemd160_context ctx; + + mbedtls_ripemd160_init( &ctx ); + mbedtls_ripemd160_starts( &ctx ); + mbedtls_ripemd160_update( &ctx, input, ilen ); + mbedtls_ripemd160_finish( &ctx, output ); + mbedtls_ripemd160_free( &ctx ); +} + +#if defined(MBEDTLS_SELF_TEST) +/* + * Test vectors from the RIPEMD-160 paper and + * http://homes.esat.kuleuven.be/~bosselae/mbedtls_ripemd160.html#HMAC + */ +#define TESTS 8 +#define KEYS 2 +static const char *ripemd160_test_input[TESTS] = +{ + "", + "a", + "abc", + "message digest", + "abcdefghijklmnopqrstuvwxyz", + "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq", + "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789", + "1234567890123456789012345678901234567890" + "1234567890123456789012345678901234567890", +}; + +static const unsigned char ripemd160_test_md[TESTS][20] = +{ + { 0x9c, 0x11, 0x85, 0xa5, 0xc5, 0xe9, 0xfc, 0x54, 0x61, 0x28, + 0x08, 0x97, 0x7e, 0xe8, 0xf5, 0x48, 0xb2, 0x25, 0x8d, 0x31 }, + { 0x0b, 0xdc, 0x9d, 0x2d, 0x25, 0x6b, 0x3e, 0xe9, 0xda, 0xae, + 0x34, 0x7b, 0xe6, 0xf4, 0xdc, 0x83, 0x5a, 0x46, 0x7f, 0xfe }, + { 0x8e, 0xb2, 0x08, 0xf7, 0xe0, 0x5d, 0x98, 0x7a, 0x9b, 0x04, + 0x4a, 0x8e, 0x98, 0xc6, 0xb0, 0x87, 0xf1, 0x5a, 0x0b, 0xfc }, + { 0x5d, 0x06, 0x89, 0xef, 0x49, 0xd2, 0xfa, 0xe5, 0x72, 0xb8, + 0x81, 0xb1, 0x23, 0xa8, 0x5f, 0xfa, 0x21, 0x59, 0x5f, 0x36 }, + { 0xf7, 0x1c, 0x27, 0x10, 0x9c, 0x69, 0x2c, 0x1b, 0x56, 0xbb, + 0xdc, 0xeb, 0x5b, 0x9d, 0x28, 0x65, 0xb3, 0x70, 0x8d, 0xbc }, + { 0x12, 0xa0, 0x53, 0x38, 0x4a, 0x9c, 0x0c, 0x88, 0xe4, 0x05, + 0xa0, 0x6c, 0x27, 0xdc, 0xf4, 0x9a, 0xda, 0x62, 0xeb, 0x2b }, + { 0xb0, 0xe2, 0x0b, 0x6e, 0x31, 0x16, 0x64, 0x02, 0x86, 0xed, + 0x3a, 0x87, 0xa5, 0x71, 0x30, 0x79, 0xb2, 0x1f, 0x51, 0x89 }, + { 0x9b, 0x75, 0x2e, 0x45, 0x57, 0x3d, 0x4b, 0x39, 0xf4, 0xdb, + 0xd3, 0x32, 0x3c, 0xab, 0x82, 0xbf, 0x63, 0x32, 0x6b, 0xfb }, +}; + +/* + * Checkup routine + */ +int mbedtls_ripemd160_self_test( int verbose ) +{ + int i; + unsigned char output[20]; + + memset( output, 0, sizeof output ); + + for( i = 0; i < TESTS; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " RIPEMD-160 test #%d: ", i + 1 ); + + mbedtls_ripemd160( (const unsigned char *) ripemd160_test_input[i], + strlen( ripemd160_test_input[i] ), + output ); + + if( memcmp( output, ripemd160_test_md[i], 20 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_RIPEMD160_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/rsa.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/rsa.c new file mode 100644 index 0000000..efdd055 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/rsa.c @@ -0,0 +1,1705 @@ +/* + * The RSA public-key cryptosystem + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * RSA was designed by Ron Rivest, Adi Shamir and Len Adleman. + * + * http://theory.lcs.mit.edu/~rivest/rsapaper.pdf + * http://www.cacr.math.uwaterloo.ca/hac/about/chap8.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_RSA_C) + +#include "mbedtls/rsa.h" +#include "mbedtls/oid.h" + +#include + +#if defined(MBEDTLS_PKCS1_V21) +#include "mbedtls/md.h" +#endif + +#if defined(MBEDTLS_PKCS1_V15) && !defined(__OpenBSD__) +#include +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +/* + * Initialize an RSA context + */ +void mbedtls_rsa_init( mbedtls_rsa_context *ctx, + int padding, + int hash_id ) +{ + memset( ctx, 0, sizeof( mbedtls_rsa_context ) ); + + mbedtls_rsa_set_padding( ctx, padding, hash_id ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &ctx->mutex ); +#endif +} + +/* + * Set padding for an existing RSA context + */ +void mbedtls_rsa_set_padding( mbedtls_rsa_context *ctx, int padding, int hash_id ) +{ + ctx->padding = padding; + ctx->hash_id = hash_id; +} + +#if defined(MBEDTLS_GENPRIME) + +/* + * Generate an RSA keypair + */ +int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + unsigned int nbits, int exponent ) +{ + int ret; + mbedtls_mpi P1, Q1, H, G; + + if( f_rng == NULL || nbits < 128 || exponent < 3 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + mbedtls_mpi_init( &P1 ); mbedtls_mpi_init( &Q1 ); mbedtls_mpi_init( &H ); mbedtls_mpi_init( &G ); + + /* + * find primes P and Q with Q < P so that: + * GCD( E, (P-1)*(Q-1) ) == 1 + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &ctx->E, exponent ) ); + + do + { + MBEDTLS_MPI_CHK( mbedtls_mpi_gen_prime( &ctx->P, ( nbits + 1 ) >> 1, 0, + f_rng, p_rng ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_gen_prime( &ctx->Q, ( nbits + 1 ) >> 1, 0, + f_rng, p_rng ) ); + + if( mbedtls_mpi_cmp_mpi( &ctx->P, &ctx->Q ) < 0 ) + mbedtls_mpi_swap( &ctx->P, &ctx->Q ); + + if( mbedtls_mpi_cmp_mpi( &ctx->P, &ctx->Q ) == 0 ) + continue; + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->N, &ctx->P, &ctx->Q ) ); + if( mbedtls_mpi_bitlen( &ctx->N ) != nbits ) + continue; + + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &P1, &ctx->P, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &Q1, &ctx->Q, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &H, &P1, &Q1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &G, &ctx->E, &H ) ); + } + while( mbedtls_mpi_cmp_int( &G, 1 ) != 0 ); + + /* + * D = E^-1 mod ((P-1)*(Q-1)) + * DP = D mod (P - 1) + * DQ = D mod (Q - 1) + * QP = Q^-1 mod P + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &ctx->D , &ctx->E, &H ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->DP, &ctx->D, &P1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->DQ, &ctx->D, &Q1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &ctx->QP, &ctx->Q, &ctx->P ) ); + + ctx->len = ( mbedtls_mpi_bitlen( &ctx->N ) + 7 ) >> 3; + +cleanup: + + mbedtls_mpi_free( &P1 ); mbedtls_mpi_free( &Q1 ); mbedtls_mpi_free( &H ); mbedtls_mpi_free( &G ); + + if( ret != 0 ) + { + mbedtls_rsa_free( ctx ); + return( MBEDTLS_ERR_RSA_KEY_GEN_FAILED + ret ); + } + + return( 0 ); +} + +#endif /* MBEDTLS_GENPRIME */ + +/* + * Check a public RSA key + */ +int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx ) +{ + if( !ctx->N.p || !ctx->E.p ) + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + + if( ( ctx->N.p[0] & 1 ) == 0 || + ( ctx->E.p[0] & 1 ) == 0 ) + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + + if( mbedtls_mpi_bitlen( &ctx->N ) < 128 || + mbedtls_mpi_bitlen( &ctx->N ) > MBEDTLS_MPI_MAX_BITS ) + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + + if( mbedtls_mpi_bitlen( &ctx->E ) < 2 || + mbedtls_mpi_cmp_mpi( &ctx->E, &ctx->N ) >= 0 ) + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + + return( 0 ); +} + +/* + * Check a private RSA key + */ +int mbedtls_rsa_check_privkey( const mbedtls_rsa_context *ctx ) +{ + int ret; + mbedtls_mpi PQ, DE, P1, Q1, H, I, G, G2, L1, L2, DP, DQ, QP; + + if( ( ret = mbedtls_rsa_check_pubkey( ctx ) ) != 0 ) + return( ret ); + + if( !ctx->P.p || !ctx->Q.p || !ctx->D.p ) + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + + mbedtls_mpi_init( &PQ ); mbedtls_mpi_init( &DE ); mbedtls_mpi_init( &P1 ); mbedtls_mpi_init( &Q1 ); + mbedtls_mpi_init( &H ); mbedtls_mpi_init( &I ); mbedtls_mpi_init( &G ); mbedtls_mpi_init( &G2 ); + mbedtls_mpi_init( &L1 ); mbedtls_mpi_init( &L2 ); mbedtls_mpi_init( &DP ); mbedtls_mpi_init( &DQ ); + mbedtls_mpi_init( &QP ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &PQ, &ctx->P, &ctx->Q ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &DE, &ctx->D, &ctx->E ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &P1, &ctx->P, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &Q1, &ctx->Q, 1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &H, &P1, &Q1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &G, &ctx->E, &H ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &G2, &P1, &Q1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_div_mpi( &L1, &L2, &H, &G2 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &I, &DE, &L1 ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &DP, &ctx->D, &P1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &DQ, &ctx->D, &Q1 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &QP, &ctx->Q, &ctx->P ) ); + /* + * Check for a valid PKCS1v2 private key + */ + if( mbedtls_mpi_cmp_mpi( &PQ, &ctx->N ) != 0 || + mbedtls_mpi_cmp_mpi( &DP, &ctx->DP ) != 0 || + mbedtls_mpi_cmp_mpi( &DQ, &ctx->DQ ) != 0 || + mbedtls_mpi_cmp_mpi( &QP, &ctx->QP ) != 0 || + mbedtls_mpi_cmp_int( &L2, 0 ) != 0 || + mbedtls_mpi_cmp_int( &I, 1 ) != 0 || + mbedtls_mpi_cmp_int( &G, 1 ) != 0 ) + { + ret = MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; + } + +cleanup: + mbedtls_mpi_free( &PQ ); mbedtls_mpi_free( &DE ); mbedtls_mpi_free( &P1 ); mbedtls_mpi_free( &Q1 ); + mbedtls_mpi_free( &H ); mbedtls_mpi_free( &I ); mbedtls_mpi_free( &G ); mbedtls_mpi_free( &G2 ); + mbedtls_mpi_free( &L1 ); mbedtls_mpi_free( &L2 ); mbedtls_mpi_free( &DP ); mbedtls_mpi_free( &DQ ); + mbedtls_mpi_free( &QP ); + + if( ret == MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ) + return( ret ); + + if( ret != 0 ) + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED + ret ); + + return( 0 ); +} + +/* + * Check if contexts holding a public and private key match + */ +int mbedtls_rsa_check_pub_priv( const mbedtls_rsa_context *pub, const mbedtls_rsa_context *prv ) +{ + if( mbedtls_rsa_check_pubkey( pub ) != 0 || + mbedtls_rsa_check_privkey( prv ) != 0 ) + { + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + } + + if( mbedtls_mpi_cmp_mpi( &pub->N, &prv->N ) != 0 || + mbedtls_mpi_cmp_mpi( &pub->E, &prv->E ) != 0 ) + { + return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + } + + return( 0 ); +} + +/* + * Do an RSA public key operation + */ +int mbedtls_rsa_public( mbedtls_rsa_context *ctx, + const unsigned char *input, + unsigned char *output ) +{ + int ret; + size_t olen; + mbedtls_mpi T; + + mbedtls_mpi_init( &T ); + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &T, input, ctx->len ) ); + + if( mbedtls_mpi_cmp_mpi( &T, &ctx->N ) >= 0 ) + { + ret = MBEDTLS_ERR_MPI_BAD_INPUT_DATA; + goto cleanup; + } + + olen = ctx->len; + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, &ctx->E, &ctx->N, &ctx->RN ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &T, output, olen ) ); + +cleanup: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + mbedtls_mpi_free( &T ); + + if( ret != 0 ) + return( MBEDTLS_ERR_RSA_PUBLIC_FAILED + ret ); + + return( 0 ); +} + +/* + * Generate or update blinding values, see section 10 of: + * KOCHER, Paul C. Timing attacks on implementations of Diffie-Hellman, RSA, + * DSS, and other systems. In : Advances in Cryptology-CRYPTO'96. Springer + * Berlin Heidelberg, 1996. p. 104-113. + */ +static int rsa_prepare_blinding( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +{ + int ret, count = 0; + + if( ctx->Vf.p != NULL ) + { + /* We already have blinding values, just update them by squaring */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vi, &ctx->Vi, &ctx->Vi ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vi, &ctx->Vi, &ctx->N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vf, &ctx->Vf, &ctx->Vf ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vf, &ctx->Vf, &ctx->N ) ); + + goto cleanup; + } + + /* Unblinding value: Vf = random number, invertible mod N */ + do { + if( count++ > 10 ) + return( MBEDTLS_ERR_RSA_RNG_FAILED ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &ctx->Vf, ctx->len - 1, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &ctx->Vi, &ctx->Vf, &ctx->N ) ); + } while( mbedtls_mpi_cmp_int( &ctx->Vi, 1 ) != 0 ); + + /* Blinding value: Vi = Vf^(-e) mod N */ + MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &ctx->Vi, &ctx->Vf, &ctx->N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &ctx->Vi, &ctx->Vi, &ctx->E, &ctx->N, &ctx->RN ) ); + + +cleanup: + return( ret ); +} + +/* + * Do an RSA private key operation + */ +int mbedtls_rsa_private( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *input, + unsigned char *output ) +{ + int ret; + size_t olen; + mbedtls_mpi T, T1, T2; + + /* Make sure we have private key info, prevent possible misuse */ + if( ctx->P.p == NULL || ctx->Q.p == NULL || ctx->D.p == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + mbedtls_mpi_init( &T ); mbedtls_mpi_init( &T1 ); mbedtls_mpi_init( &T2 ); + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &T, input, ctx->len ) ); + if( mbedtls_mpi_cmp_mpi( &T, &ctx->N ) >= 0 ) + { + ret = MBEDTLS_ERR_MPI_BAD_INPUT_DATA; + goto cleanup; + } + + if( f_rng != NULL ) + { + /* + * Blinding + * T = T * Vi mod N + */ + MBEDTLS_MPI_CHK( rsa_prepare_blinding( ctx, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &T, &ctx->Vi ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &T, &T, &ctx->N ) ); + } + +#if defined(MBEDTLS_RSA_NO_CRT) + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, &ctx->D, &ctx->N, &ctx->RN ) ); +#else + /* + * faster decryption using the CRT + * + * T1 = input ^ dP mod P + * T2 = input ^ dQ mod Q + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T1, &T, &ctx->DP, &ctx->P, &ctx->RP ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T2, &T, &ctx->DQ, &ctx->Q, &ctx->RQ ) ); + + /* + * T = (T1 - T2) * (Q^-1 mod P) mod P + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T, &T1, &T2 ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T1, &T, &ctx->QP ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &T, &T1, &ctx->P ) ); + + /* + * T = T2 + T * Q + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T1, &T, &ctx->Q ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &T, &T2, &T1 ) ); +#endif /* MBEDTLS_RSA_NO_CRT */ + + if( f_rng != NULL ) + { + /* + * Unblind + * T = T * Vf mod N + */ + MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &T, &ctx->Vf ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &T, &T, &ctx->N ) ); + } + + olen = ctx->len; + MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &T, output, olen ) ); + +cleanup: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + mbedtls_mpi_free( &T ); mbedtls_mpi_free( &T1 ); mbedtls_mpi_free( &T2 ); + + if( ret != 0 ) + return( MBEDTLS_ERR_RSA_PRIVATE_FAILED + ret ); + + return( 0 ); +} + +#if defined(MBEDTLS_PKCS1_V21) +/** + * Generate and apply the MGF1 operation (from PKCS#1 v2.1) to a buffer. + * + * \param dst buffer to mask + * \param dlen length of destination buffer + * \param src source of the mask generation + * \param slen length of the source buffer + * \param md_ctx message digest context to use + */ +static void mgf_mask( unsigned char *dst, size_t dlen, unsigned char *src, + size_t slen, mbedtls_md_context_t *md_ctx ) +{ + unsigned char mask[MBEDTLS_MD_MAX_SIZE]; + unsigned char counter[4]; + unsigned char *p; + unsigned int hlen; + size_t i, use_len; + + memset( mask, 0, MBEDTLS_MD_MAX_SIZE ); + memset( counter, 0, 4 ); + + hlen = mbedtls_md_get_size( md_ctx->md_info ); + + // Generate and apply dbMask + // + p = dst; + + while( dlen > 0 ) + { + use_len = hlen; + if( dlen < hlen ) + use_len = dlen; + + mbedtls_md_starts( md_ctx ); + mbedtls_md_update( md_ctx, src, slen ); + mbedtls_md_update( md_ctx, counter, 4 ); + mbedtls_md_finish( md_ctx, mask ); + + for( i = 0; i < use_len; ++i ) + *p++ ^= mask[i]; + + counter[3]++; + + dlen -= use_len; + } +} +#endif /* MBEDTLS_PKCS1_V21 */ + +#if defined(MBEDTLS_PKCS1_V21) +/* + * Implementation of the PKCS#1 v2.1 RSAES-OAEP-ENCRYPT function + */ +int mbedtls_rsa_rsaes_oaep_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + const unsigned char *label, size_t label_len, + size_t ilen, + const unsigned char *input, + unsigned char *output ) +{ + size_t olen; + int ret; + unsigned char *p = output; + unsigned int hlen; + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V21 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( f_rng == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + md_info = mbedtls_md_info_from_type( (mbedtls_md_type_t) ctx->hash_id ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + olen = ctx->len; + hlen = mbedtls_md_get_size( md_info ); + + if( olen < ilen + 2 * hlen + 2 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + memset( output, 0, olen ); + + *p++ = 0; + + // Generate a random octet string seed + // + if( ( ret = f_rng( p_rng, p, hlen ) ) != 0 ) + return( MBEDTLS_ERR_RSA_RNG_FAILED + ret ); + + p += hlen; + + // Construct DB + // + mbedtls_md( md_info, label, label_len, p ); + p += hlen; + p += olen - 2 * hlen - 2 - ilen; + *p++ = 1; + memcpy( p, input, ilen ); + + mbedtls_md_init( &md_ctx ); + mbedtls_md_setup( &md_ctx, md_info, 0 ); + + // maskedDB: Apply dbMask to DB + // + mgf_mask( output + hlen + 1, olen - hlen - 1, output + 1, hlen, + &md_ctx ); + + // maskedSeed: Apply seedMask to seed + // + mgf_mask( output + 1, hlen, output + hlen + 1, olen - hlen - 1, + &md_ctx ); + + mbedtls_md_free( &md_ctx ); + + return( ( mode == MBEDTLS_RSA_PUBLIC ) + ? mbedtls_rsa_public( ctx, output, output ) + : mbedtls_rsa_private( ctx, f_rng, p_rng, output, output ) ); +} +#endif /* MBEDTLS_PKCS1_V21 */ + +#if defined(MBEDTLS_PKCS1_V15) +/* + * Implementation of the PKCS#1 v2.1 RSAES-PKCS1-V1_5-ENCRYPT function + */ +int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t ilen, + const unsigned char *input, + unsigned char *output ) +{ + size_t nb_pad, olen; + int ret; + unsigned char *p = output; + + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V15 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( f_rng == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + olen = ctx->len; + + if( olen < ilen + 11 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + nb_pad = olen - 3 - ilen; + + *p++ = 0; + if( mode == MBEDTLS_RSA_PUBLIC ) + { + *p++ = MBEDTLS_RSA_CRYPT; + + while( nb_pad-- > 0 ) + { + int rng_dl = 100; + + do { + ret = f_rng( p_rng, p, 1 ); + } while( *p == 0 && --rng_dl && ret == 0 ); + + // Check if RNG failed to generate data + // + if( rng_dl == 0 || ret != 0 ) + return( MBEDTLS_ERR_RSA_RNG_FAILED + ret ); + + p++; + } + } + else + { + *p++ = MBEDTLS_RSA_SIGN; + + while( nb_pad-- > 0 ) + *p++ = 0xFF; + } + + *p++ = 0; + memcpy( p, input, ilen ); + + return( ( mode == MBEDTLS_RSA_PUBLIC ) + ? mbedtls_rsa_public( ctx, output, output ) + : mbedtls_rsa_private( ctx, f_rng, p_rng, output, output ) ); +} +#endif /* MBEDTLS_PKCS1_V15 */ + +/* + * Add the message padding, then do an RSA operation + */ +int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t ilen, + const unsigned char *input, + unsigned char *output ) +{ + switch( ctx->padding ) + { +#if defined(MBEDTLS_PKCS1_V15) + case MBEDTLS_RSA_PKCS_V15: + return mbedtls_rsa_rsaes_pkcs1_v15_encrypt( ctx, f_rng, p_rng, mode, ilen, + input, output ); +#endif + +#if defined(MBEDTLS_PKCS1_V21) + case MBEDTLS_RSA_PKCS_V21: + return mbedtls_rsa_rsaes_oaep_encrypt( ctx, f_rng, p_rng, mode, NULL, 0, + ilen, input, output ); +#endif + + default: + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + } +} + +#if defined(MBEDTLS_PKCS1_V21) +/* + * Implementation of the PKCS#1 v2.1 RSAES-OAEP-DECRYPT function + */ +int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + const unsigned char *label, size_t label_len, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ) +{ + int ret; + size_t ilen, i, pad_len; + unsigned char *p, bad, pad_done; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE]; + unsigned char lhash[MBEDTLS_MD_MAX_SIZE]; + unsigned int hlen; + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + + /* + * Parameters sanity checks + */ + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V21 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + ilen = ctx->len; + + if( ilen < 16 || ilen > sizeof( buf ) ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + md_info = mbedtls_md_info_from_type( (mbedtls_md_type_t) ctx->hash_id ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + /* + * RSA operation + */ + ret = ( mode == MBEDTLS_RSA_PUBLIC ) + ? mbedtls_rsa_public( ctx, input, buf ) + : mbedtls_rsa_private( ctx, f_rng, p_rng, input, buf ); + + if( ret != 0 ) + return( ret ); + + /* + * Unmask data and generate lHash + */ + hlen = mbedtls_md_get_size( md_info ); + + mbedtls_md_init( &md_ctx ); + mbedtls_md_setup( &md_ctx, md_info, 0 ); + + /* Generate lHash */ + mbedtls_md( md_info, label, label_len, lhash ); + + /* seed: Apply seedMask to maskedSeed */ + mgf_mask( buf + 1, hlen, buf + hlen + 1, ilen - hlen - 1, + &md_ctx ); + + /* DB: Apply dbMask to maskedDB */ + mgf_mask( buf + hlen + 1, ilen - hlen - 1, buf + 1, hlen, + &md_ctx ); + + mbedtls_md_free( &md_ctx ); + + /* + * Check contents, in "constant-time" + */ + p = buf; + bad = 0; + + bad |= *p++; /* First byte must be 0 */ + + p += hlen; /* Skip seed */ + + /* Check lHash */ + for( i = 0; i < hlen; i++ ) + bad |= lhash[i] ^ *p++; + + /* Get zero-padding len, but always read till end of buffer + * (minus one, for the 01 byte) */ + pad_len = 0; + pad_done = 0; + for( i = 0; i < ilen - 2 * hlen - 2; i++ ) + { + pad_done |= p[i]; + pad_len += ((pad_done | (unsigned char)-pad_done) >> 7) ^ 1; + } + + p += pad_len; + bad |= *p++ ^ 0x01; + + /* + * The only information "leaked" is whether the padding was correct or not + * (eg, no data is copied if it was not correct). This meets the + * recommendations in PKCS#1 v2.2: an opponent cannot distinguish between + * the different error conditions. + */ + if( bad != 0 ) + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + + if( ilen - ( p - buf ) > output_max_len ) + return( MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE ); + + *olen = ilen - (p - buf); + memcpy( output, p, *olen ); + + return( 0 ); +} +#endif /* MBEDTLS_PKCS1_V21 */ + +#if defined(MBEDTLS_PKCS1_V15) +/* + * Implementation of the PKCS#1 v2.1 RSAES-PKCS1-V1_5-DECRYPT function + */ +int mbedtls_rsa_rsaes_pkcs1_v15_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len) +{ + int ret; + size_t ilen, pad_count = 0, i; + unsigned char *p, bad, pad_done = 0; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE]; + + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V15 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + ilen = ctx->len; + + if( ilen < 16 || ilen > sizeof( buf ) ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + ret = ( mode == MBEDTLS_RSA_PUBLIC ) + ? mbedtls_rsa_public( ctx, input, buf ) + : mbedtls_rsa_private( ctx, f_rng, p_rng, input, buf ); + + if( ret != 0 ) + return( ret ); + + p = buf; + bad = 0; + + /* + * Check and get padding len in "constant-time" + */ + bad |= *p++; /* First byte must be 0 */ + + /* This test does not depend on secret data */ + if( mode == MBEDTLS_RSA_PRIVATE ) + { + bad |= *p++ ^ MBEDTLS_RSA_CRYPT; + + /* Get padding len, but always read till end of buffer + * (minus one, for the 00 byte) */ + for( i = 0; i < ilen - 3; i++ ) + { + pad_done |= ((p[i] | (unsigned char)-p[i]) >> 7) ^ 1; + pad_count += ((pad_done | (unsigned char)-pad_done) >> 7) ^ 1; + } + + p += pad_count; + bad |= *p++; /* Must be zero */ + } + else + { + bad |= *p++ ^ MBEDTLS_RSA_SIGN; + + /* Get padding len, but always read till end of buffer + * (minus one, for the 00 byte) */ + for( i = 0; i < ilen - 3; i++ ) + { + pad_done |= ( p[i] != 0xFF ); + pad_count += ( pad_done == 0 ); + } + + p += pad_count; + bad |= *p++; /* Must be zero */ + } + + if( bad ) + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + + if( ilen - ( p - buf ) > output_max_len ) + return( MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE ); + + *olen = ilen - (p - buf); + memcpy( output, p, *olen ); + + return( 0 ); +} +#endif /* MBEDTLS_PKCS1_V15 */ + +/* + * Do an RSA operation, then remove the message padding + */ +int mbedtls_rsa_pkcs1_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len) +{ + switch( ctx->padding ) + { +#if defined(MBEDTLS_PKCS1_V15) + case MBEDTLS_RSA_PKCS_V15: + return mbedtls_rsa_rsaes_pkcs1_v15_decrypt( ctx, f_rng, p_rng, mode, olen, + input, output, output_max_len ); +#endif + +#if defined(MBEDTLS_PKCS1_V21) + case MBEDTLS_RSA_PKCS_V21: + return mbedtls_rsa_rsaes_oaep_decrypt( ctx, f_rng, p_rng, mode, NULL, 0, + olen, input, output, + output_max_len ); +#endif + + default: + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + } +} + +#if defined(MBEDTLS_PKCS1_V21) +/* + * Implementation of the PKCS#1 v2.1 RSASSA-PSS-SIGN function + */ +int mbedtls_rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ) +{ + size_t olen; + unsigned char *p = sig; + unsigned char salt[MBEDTLS_MD_MAX_SIZE]; + unsigned int slen, hlen, offset = 0; + int ret; + size_t msb; + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V21 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( f_rng == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + olen = ctx->len; + + if( md_alg != MBEDTLS_MD_NONE ) + { + // Gather length of hash to sign + // + md_info = mbedtls_md_info_from_type( md_alg ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + hashlen = mbedtls_md_get_size( md_info ); + } + + md_info = mbedtls_md_info_from_type( (mbedtls_md_type_t) ctx->hash_id ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + hlen = mbedtls_md_get_size( md_info ); + slen = hlen; + + if( olen < hlen + slen + 2 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + memset( sig, 0, olen ); + + // Generate salt of length slen + // + if( ( ret = f_rng( p_rng, salt, slen ) ) != 0 ) + return( MBEDTLS_ERR_RSA_RNG_FAILED + ret ); + + // Note: EMSA-PSS encoding is over the length of N - 1 bits + // + msb = mbedtls_mpi_bitlen( &ctx->N ) - 1; + p += olen - hlen * 2 - 2; + *p++ = 0x01; + memcpy( p, salt, slen ); + p += slen; + + mbedtls_md_init( &md_ctx ); + mbedtls_md_setup( &md_ctx, md_info, 0 ); + + // Generate H = Hash( M' ) + // + mbedtls_md_starts( &md_ctx ); + mbedtls_md_update( &md_ctx, p, 8 ); + mbedtls_md_update( &md_ctx, hash, hashlen ); + mbedtls_md_update( &md_ctx, salt, slen ); + mbedtls_md_finish( &md_ctx, p ); + + // Compensate for boundary condition when applying mask + // + if( msb % 8 == 0 ) + offset = 1; + + // maskedDB: Apply dbMask to DB + // + mgf_mask( sig + offset, olen - hlen - 1 - offset, p, hlen, &md_ctx ); + + mbedtls_md_free( &md_ctx ); + + msb = mbedtls_mpi_bitlen( &ctx->N ) - 1; + sig[0] &= 0xFF >> ( olen * 8 - msb ); + + p += hlen; + *p++ = 0xBC; + + return( ( mode == MBEDTLS_RSA_PUBLIC ) + ? mbedtls_rsa_public( ctx, sig, sig ) + : mbedtls_rsa_private( ctx, f_rng, p_rng, sig, sig ) ); +} +#endif /* MBEDTLS_PKCS1_V21 */ + +#if defined(MBEDTLS_PKCS1_V15) +/* + * Implementation of the PKCS#1 v2.1 RSASSA-PKCS1-V1_5-SIGN function + */ +/* + * Do an RSA operation to sign the message digest + */ +int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ) +{ + size_t nb_pad, olen, oid_size = 0; + unsigned char *p = sig; + const char *oid = NULL; + unsigned char *sig_try = NULL, *verif = NULL; + size_t i; + unsigned char diff; + volatile unsigned char diff_no_optimize; + int ret; + + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V15 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + olen = ctx->len; + nb_pad = olen - 3; + + if( md_alg != MBEDTLS_MD_NONE ) + { + const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type( md_alg ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + if( mbedtls_oid_get_oid_by_md( md_alg, &oid, &oid_size ) != 0 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + nb_pad -= 10 + oid_size; + + hashlen = mbedtls_md_get_size( md_info ); + } + + nb_pad -= hashlen; + + if( ( nb_pad < 8 ) || ( nb_pad > olen ) ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + *p++ = 0; + *p++ = MBEDTLS_RSA_SIGN; + memset( p, 0xFF, nb_pad ); + p += nb_pad; + *p++ = 0; + + if( md_alg == MBEDTLS_MD_NONE ) + { + memcpy( p, hash, hashlen ); + } + else + { + /* + * DigestInfo ::= SEQUENCE { + * digestAlgorithm DigestAlgorithmIdentifier, + * digest Digest } + * + * DigestAlgorithmIdentifier ::= AlgorithmIdentifier + * + * Digest ::= OCTET STRING + */ + *p++ = MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED; + *p++ = (unsigned char) ( 0x08 + oid_size + hashlen ); + *p++ = MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED; + *p++ = (unsigned char) ( 0x04 + oid_size ); + *p++ = MBEDTLS_ASN1_OID; + *p++ = oid_size & 0xFF; + memcpy( p, oid, oid_size ); + p += oid_size; + *p++ = MBEDTLS_ASN1_NULL; + *p++ = 0x00; + *p++ = MBEDTLS_ASN1_OCTET_STRING; + *p++ = hashlen; + memcpy( p, hash, hashlen ); + } + + if( mode == MBEDTLS_RSA_PUBLIC ) + return( mbedtls_rsa_public( ctx, sig, sig ) ); + + /* + * In order to prevent Lenstra's attack, make the signature in a + * temporary buffer and check it before returning it. + */ + sig_try = mbedtls_calloc( 1, ctx->len ); + if( sig_try == NULL ) + return( MBEDTLS_ERR_MPI_ALLOC_FAILED ); + + verif = mbedtls_calloc( 1, ctx->len ); + if( verif == NULL ) + { + mbedtls_free( sig_try ); + return( MBEDTLS_ERR_MPI_ALLOC_FAILED ); + } + + MBEDTLS_MPI_CHK( mbedtls_rsa_private( ctx, f_rng, p_rng, sig, sig_try ) ); + MBEDTLS_MPI_CHK( mbedtls_rsa_public( ctx, sig_try, verif ) ); + + /* Compare in constant time just in case */ + for( diff = 0, i = 0; i < ctx->len; i++ ) + diff |= verif[i] ^ sig[i]; + diff_no_optimize = diff; + + if( diff_no_optimize != 0 ) + { + ret = MBEDTLS_ERR_RSA_PRIVATE_FAILED; + goto cleanup; + } + + memcpy( sig, sig_try, ctx->len ); + +cleanup: + mbedtls_free( sig_try ); + mbedtls_free( verif ); + + return( ret ); +} +#endif /* MBEDTLS_PKCS1_V15 */ + +/* + * Do an RSA operation to sign the message digest + */ +int mbedtls_rsa_pkcs1_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ) +{ + switch( ctx->padding ) + { +#if defined(MBEDTLS_PKCS1_V15) + case MBEDTLS_RSA_PKCS_V15: + return mbedtls_rsa_rsassa_pkcs1_v15_sign( ctx, f_rng, p_rng, mode, md_alg, + hashlen, hash, sig ); +#endif + +#if defined(MBEDTLS_PKCS1_V21) + case MBEDTLS_RSA_PKCS_V21: + return mbedtls_rsa_rsassa_pss_sign( ctx, f_rng, p_rng, mode, md_alg, + hashlen, hash, sig ); +#endif + + default: + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + } +} + +#if defined(MBEDTLS_PKCS1_V21) +/* + * Implementation of the PKCS#1 v2.1 RSASSA-PSS-VERIFY function + */ +int mbedtls_rsa_rsassa_pss_verify_ext( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + mbedtls_md_type_t mgf1_hash_id, + int expected_salt_len, + const unsigned char *sig ) +{ + int ret; + size_t siglen; + unsigned char *p; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE]; + unsigned char result[MBEDTLS_MD_MAX_SIZE]; + unsigned char zeros[8]; + unsigned int hlen; + size_t slen, msb; + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V21 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + siglen = ctx->len; + + if( siglen < 16 || siglen > sizeof( buf ) ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + ret = ( mode == MBEDTLS_RSA_PUBLIC ) + ? mbedtls_rsa_public( ctx, sig, buf ) + : mbedtls_rsa_private( ctx, f_rng, p_rng, sig, buf ); + + if( ret != 0 ) + return( ret ); + + p = buf; + + if( buf[siglen - 1] != 0xBC ) + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + + if( md_alg != MBEDTLS_MD_NONE ) + { + // Gather length of hash to sign + // + md_info = mbedtls_md_info_from_type( md_alg ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + hashlen = mbedtls_md_get_size( md_info ); + } + + md_info = mbedtls_md_info_from_type( mgf1_hash_id ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + hlen = mbedtls_md_get_size( md_info ); + slen = siglen - hlen - 1; /* Currently length of salt + padding */ + + memset( zeros, 0, 8 ); + + // Note: EMSA-PSS verification is over the length of N - 1 bits + // + msb = mbedtls_mpi_bitlen( &ctx->N ) - 1; + + // Compensate for boundary condition when applying mask + // + if( msb % 8 == 0 ) + { + p++; + siglen -= 1; + } + if( buf[0] >> ( 8 - siglen * 8 + msb ) ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + mbedtls_md_init( &md_ctx ); + mbedtls_md_setup( &md_ctx, md_info, 0 ); + + mgf_mask( p, siglen - hlen - 1, p + siglen - hlen - 1, hlen, &md_ctx ); + + buf[0] &= 0xFF >> ( siglen * 8 - msb ); + + while( p < buf + siglen && *p == 0 ) + p++; + + if( p == buf + siglen || + *p++ != 0x01 ) + { + mbedtls_md_free( &md_ctx ); + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + } + + /* Actual salt len */ + slen -= p - buf; + + if( expected_salt_len != MBEDTLS_RSA_SALT_LEN_ANY && + slen != (size_t) expected_salt_len ) + { + mbedtls_md_free( &md_ctx ); + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + } + + // Generate H = Hash( M' ) + // + mbedtls_md_starts( &md_ctx ); + mbedtls_md_update( &md_ctx, zeros, 8 ); + mbedtls_md_update( &md_ctx, hash, hashlen ); + mbedtls_md_update( &md_ctx, p, slen ); + mbedtls_md_finish( &md_ctx, result ); + + mbedtls_md_free( &md_ctx ); + + if( memcmp( p + slen, result, hlen ) == 0 ) + return( 0 ); + else + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); +} + +/* + * Simplified PKCS#1 v2.1 RSASSA-PSS-VERIFY function + */ +int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ) +{ + mbedtls_md_type_t mgf1_hash_id = ( ctx->hash_id != MBEDTLS_MD_NONE ) + ? (mbedtls_md_type_t) ctx->hash_id + : md_alg; + + return( mbedtls_rsa_rsassa_pss_verify_ext( ctx, f_rng, p_rng, mode, + md_alg, hashlen, hash, + mgf1_hash_id, MBEDTLS_RSA_SALT_LEN_ANY, + sig ) ); + +} +#endif /* MBEDTLS_PKCS1_V21 */ + +#if defined(MBEDTLS_PKCS1_V15) +/* + * Implementation of the PKCS#1 v2.1 RSASSA-PKCS1-v1_5-VERIFY function + */ +int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ) +{ + int ret; + size_t len, siglen, asn1_len; + unsigned char *p, *end; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE]; + mbedtls_md_type_t msg_md_alg; + const mbedtls_md_info_t *md_info; + mbedtls_asn1_buf oid; + + if( mode == MBEDTLS_RSA_PRIVATE && ctx->padding != MBEDTLS_RSA_PKCS_V15 ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + siglen = ctx->len; + + if( siglen < 16 || siglen > sizeof( buf ) ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + + ret = ( mode == MBEDTLS_RSA_PUBLIC ) + ? mbedtls_rsa_public( ctx, sig, buf ) + : mbedtls_rsa_private( ctx, f_rng, p_rng, sig, buf ); + + if( ret != 0 ) + return( ret ); + + p = buf; + + if( *p++ != 0 || *p++ != MBEDTLS_RSA_SIGN ) + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + + while( *p != 0 ) + { + if( p >= buf + siglen - 1 || *p != 0xFF ) + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + p++; + } + p++; + + len = siglen - ( p - buf ); + + if( len == hashlen && md_alg == MBEDTLS_MD_NONE ) + { + if( memcmp( p, hash, hashlen ) == 0 ) + return( 0 ); + else + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + } + + md_info = mbedtls_md_info_from_type( md_alg ); + if( md_info == NULL ) + return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + hashlen = mbedtls_md_get_size( md_info ); + + end = p + len; + + // Parse the ASN.1 structure inside the PKCS#1 v1.5 structure + // + if( ( ret = mbedtls_asn1_get_tag( &p, end, &asn1_len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( asn1_len + 2 != len ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &asn1_len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( asn1_len + 6 + hashlen != len ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &oid.len, MBEDTLS_ASN1_OID ) ) != 0 ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + oid.p = p; + p += oid.len; + + if( mbedtls_oid_get_md_alg( &oid, &msg_md_alg ) != 0 ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( md_alg != msg_md_alg ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + /* + * assume the algorithm parameters must be NULL + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &asn1_len, MBEDTLS_ASN1_NULL ) ) != 0 ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &asn1_len, MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( asn1_len != hashlen ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + if( memcmp( p, hash, hashlen ) != 0 ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + p += hashlen; + + if( p != end ) + return( MBEDTLS_ERR_RSA_VERIFY_FAILED ); + + return( 0 ); +} +#endif /* MBEDTLS_PKCS1_V15 */ + +/* + * Do an RSA operation and check the message digest + */ +int mbedtls_rsa_pkcs1_verify( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + int mode, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ) +{ + switch( ctx->padding ) + { +#if defined(MBEDTLS_PKCS1_V15) + case MBEDTLS_RSA_PKCS_V15: + return mbedtls_rsa_rsassa_pkcs1_v15_verify( ctx, f_rng, p_rng, mode, md_alg, + hashlen, hash, sig ); +#endif + +#if defined(MBEDTLS_PKCS1_V21) + case MBEDTLS_RSA_PKCS_V21: + return mbedtls_rsa_rsassa_pss_verify( ctx, f_rng, p_rng, mode, md_alg, + hashlen, hash, sig ); +#endif + + default: + return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + } +} + +/* + * Copy the components of an RSA key + */ +int mbedtls_rsa_copy( mbedtls_rsa_context *dst, const mbedtls_rsa_context *src ) +{ + int ret; + + dst->ver = src->ver; + dst->len = src->len; + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->N, &src->N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->E, &src->E ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->D, &src->D ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->P, &src->P ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->Q, &src->Q ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->DP, &src->DP ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->DQ, &src->DQ ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->QP, &src->QP ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->RN, &src->RN ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->RP, &src->RP ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->RQ, &src->RQ ) ); + + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->Vi, &src->Vi ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->Vf, &src->Vf ) ); + + dst->padding = src->padding; + dst->hash_id = src->hash_id; + +cleanup: + if( ret != 0 ) + mbedtls_rsa_free( dst ); + + return( ret ); +} + +/* + * Free the components of an RSA key + */ +void mbedtls_rsa_free( mbedtls_rsa_context *ctx ) +{ + mbedtls_mpi_free( &ctx->Vi ); mbedtls_mpi_free( &ctx->Vf ); + mbedtls_mpi_free( &ctx->RQ ); mbedtls_mpi_free( &ctx->RP ); mbedtls_mpi_free( &ctx->RN ); + mbedtls_mpi_free( &ctx->QP ); mbedtls_mpi_free( &ctx->DQ ); mbedtls_mpi_free( &ctx->DP ); + mbedtls_mpi_free( &ctx->Q ); mbedtls_mpi_free( &ctx->P ); mbedtls_mpi_free( &ctx->D ); + mbedtls_mpi_free( &ctx->E ); mbedtls_mpi_free( &ctx->N ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_free( &ctx->mutex ); +#endif +} + +#if defined(MBEDTLS_SELF_TEST) + +#include "mbedtls/sha1.h" + +/* + * Example RSA-1024 keypair, for test purposes + */ +#define KEY_LEN 128 + +#define RSA_N "9292758453063D803DD603D5E777D788" \ + "8ED1D5BF35786190FA2F23EBC0848AEA" \ + "DDA92CA6C3D80B32C4D109BE0F36D6AE" \ + "7130B9CED7ACDF54CFC7555AC14EEBAB" \ + "93A89813FBF3C4F8066D2D800F7C38A8" \ + "1AE31942917403FF4946B0A83D3D3E05" \ + "EE57C6F5F5606FB5D4BC6CD34EE0801A" \ + "5E94BB77B07507233A0BC7BAC8F90F79" + +#define RSA_E "10001" + +#define RSA_D "24BF6185468786FDD303083D25E64EFC" \ + "66CA472BC44D253102F8B4A9D3BFA750" \ + "91386C0077937FE33FA3252D28855837" \ + "AE1B484A8A9A45F7EE8C0C634F99E8CD" \ + "DF79C5CE07EE72C7F123142198164234" \ + "CABB724CF78B8173B9F880FC86322407" \ + "AF1FEDFDDE2BEB674CA15F3E81A1521E" \ + "071513A1E85B5DFA031F21ECAE91A34D" + +#define RSA_P "C36D0EB7FCD285223CFB5AABA5BDA3D8" \ + "2C01CAD19EA484A87EA4377637E75500" \ + "FCB2005C5C7DD6EC4AC023CDA285D796" \ + "C3D9E75E1EFC42488BB4F1D13AC30A57" + +#define RSA_Q "C000DF51A7C77AE8D7C7370C1FF55B69" \ + "E211C2B9E5DB1ED0BF61D0D9899620F4" \ + "910E4168387E3C30AA1E00C339A79508" \ + "8452DD96A9A5EA5D9DCA68DA636032AF" + +#define RSA_DP "C1ACF567564274FB07A0BBAD5D26E298" \ + "3C94D22288ACD763FD8E5600ED4A702D" \ + "F84198A5F06C2E72236AE490C93F07F8" \ + "3CC559CD27BC2D1CA488811730BB5725" + +#define RSA_DQ "4959CBF6F8FEF750AEE6977C155579C7" \ + "D8AAEA56749EA28623272E4F7D0592AF" \ + "7C1F1313CAC9471B5C523BFE592F517B" \ + "407A1BD76C164B93DA2D32A383E58357" + +#define RSA_QP "9AE7FBC99546432DF71896FC239EADAE" \ + "F38D18D2B2F0E2DD275AA977E2BF4411" \ + "F5A3B2A5D33605AEBBCCBA7FEB9F2D2F" \ + "A74206CEC169D74BF5A8C50D6F48EA08" + +#define PT_LEN 24 +#define RSA_PT "\xAA\xBB\xCC\x03\x02\x01\x00\xFF\xFF\xFF\xFF\xFF" \ + "\x11\x22\x33\x0A\x0B\x0C\xCC\xDD\xDD\xDD\xDD\xDD" + +#if defined(MBEDTLS_PKCS1_V15) +static int myrand( void *rng_state, unsigned char *output, size_t len ) +{ +#if !defined(__OpenBSD__) + size_t i; + + if( rng_state != NULL ) + rng_state = NULL; + + for( i = 0; i < len; ++i ) + output[i] = rand(); +#else + if( rng_state != NULL ) + rng_state = NULL; + + arc4random_buf( output, len ); +#endif /* !OpenBSD */ + + return( 0 ); +} +#endif /* MBEDTLS_PKCS1_V15 */ + +/* + * Checkup routine + */ +int mbedtls_rsa_self_test( int verbose ) +{ + int ret = 0; +#if defined(MBEDTLS_PKCS1_V15) + size_t len; + mbedtls_rsa_context rsa; + unsigned char rsa_plaintext[PT_LEN]; + unsigned char rsa_decrypted[PT_LEN]; + unsigned char rsa_ciphertext[KEY_LEN]; +#if defined(MBEDTLS_SHA1_C) + unsigned char sha1sum[20]; +#endif + + mbedtls_rsa_init( &rsa, MBEDTLS_RSA_PKCS_V15, 0 ); + + rsa.len = KEY_LEN; + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.N , 16, RSA_N ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.E , 16, RSA_E ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.D , 16, RSA_D ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.P , 16, RSA_P ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.Q , 16, RSA_Q ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.DP, 16, RSA_DP ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.DQ, 16, RSA_DQ ) ); + MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &rsa.QP, 16, RSA_QP ) ); + + if( verbose != 0 ) + mbedtls_printf( " RSA key validation: " ); + + if( mbedtls_rsa_check_pubkey( &rsa ) != 0 || + mbedtls_rsa_check_privkey( &rsa ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n PKCS#1 encryption : " ); + + memcpy( rsa_plaintext, RSA_PT, PT_LEN ); + + if( mbedtls_rsa_pkcs1_encrypt( &rsa, myrand, NULL, MBEDTLS_RSA_PUBLIC, PT_LEN, + rsa_plaintext, rsa_ciphertext ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n PKCS#1 decryption : " ); + + if( mbedtls_rsa_pkcs1_decrypt( &rsa, myrand, NULL, MBEDTLS_RSA_PRIVATE, &len, + rsa_ciphertext, rsa_decrypted, + sizeof(rsa_decrypted) ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( memcmp( rsa_decrypted, rsa_plaintext, len ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + +#if defined(MBEDTLS_SHA1_C) + if( verbose != 0 ) + mbedtls_printf( "PKCS#1 data sign : " ); + + mbedtls_sha1( rsa_plaintext, PT_LEN, sha1sum ); + + if( mbedtls_rsa_pkcs1_sign( &rsa, myrand, NULL, MBEDTLS_RSA_PRIVATE, MBEDTLS_MD_SHA1, 0, + sha1sum, rsa_ciphertext ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n PKCS#1 sig. verify: " ); + + if( mbedtls_rsa_pkcs1_verify( &rsa, NULL, NULL, MBEDTLS_RSA_PUBLIC, MBEDTLS_MD_SHA1, 0, + sha1sum, rsa_ciphertext ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); +#endif /* MBEDTLS_SHA1_C */ + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +cleanup: + mbedtls_rsa_free( &rsa ); +#else /* MBEDTLS_PKCS1_V15 */ + ((void) verbose); +#endif /* MBEDTLS_PKCS1_V15 */ + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_RSA_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha1.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha1.c new file mode 100644 index 0000000..c9acc64 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha1.c @@ -0,0 +1,451 @@ +/* + * FIPS-180-1 compliant SHA-1 implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The SHA-1 standard was published by NIST in 1993. + * + * http://www.itl.nist.gov/fipspubs/fip180-1.htm + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SHA1_C) + +#include "mbedtls/sha1.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_SHA1_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ + | ( (uint32_t) (b)[(i) + 1] << 16 ) \ + | ( (uint32_t) (b)[(i) + 2] << 8 ) \ + | ( (uint32_t) (b)[(i) + 3] ); \ +} +#endif + +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +void mbedtls_sha1_init( mbedtls_sha1_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_sha1_context ) ); +} + +void mbedtls_sha1_free( mbedtls_sha1_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_sha1_context ) ); +} + +void mbedtls_sha1_clone( mbedtls_sha1_context *dst, + const mbedtls_sha1_context *src ) +{ + *dst = *src; +} + +/* + * SHA-1 context setup + */ +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + ctx->state[0] = 0x67452301; + ctx->state[1] = 0xEFCDAB89; + ctx->state[2] = 0x98BADCFE; + ctx->state[3] = 0x10325476; + ctx->state[4] = 0xC3D2E1F0; +} + +#if !defined(MBEDTLS_SHA1_PROCESS_ALT) +void mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[64] ) +{ + uint32_t temp, W[16], A, B, C, D, E; + + GET_UINT32_BE( W[ 0], data, 0 ); + GET_UINT32_BE( W[ 1], data, 4 ); + GET_UINT32_BE( W[ 2], data, 8 ); + GET_UINT32_BE( W[ 3], data, 12 ); + GET_UINT32_BE( W[ 4], data, 16 ); + GET_UINT32_BE( W[ 5], data, 20 ); + GET_UINT32_BE( W[ 6], data, 24 ); + GET_UINT32_BE( W[ 7], data, 28 ); + GET_UINT32_BE( W[ 8], data, 32 ); + GET_UINT32_BE( W[ 9], data, 36 ); + GET_UINT32_BE( W[10], data, 40 ); + GET_UINT32_BE( W[11], data, 44 ); + GET_UINT32_BE( W[12], data, 48 ); + GET_UINT32_BE( W[13], data, 52 ); + GET_UINT32_BE( W[14], data, 56 ); + GET_UINT32_BE( W[15], data, 60 ); + +#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n))) + +#define R(t) \ +( \ + temp = W[( t - 3 ) & 0x0F] ^ W[( t - 8 ) & 0x0F] ^ \ + W[( t - 14 ) & 0x0F] ^ W[ t & 0x0F], \ + ( W[t & 0x0F] = S(temp,1) ) \ +) + +#define P(a,b,c,d,e,x) \ +{ \ + e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \ +} + + A = ctx->state[0]; + B = ctx->state[1]; + C = ctx->state[2]; + D = ctx->state[3]; + E = ctx->state[4]; + +#define F(x,y,z) (z ^ (x & (y ^ z))) +#define K 0x5A827999 + + P( A, B, C, D, E, W[0] ); + P( E, A, B, C, D, W[1] ); + P( D, E, A, B, C, W[2] ); + P( C, D, E, A, B, W[3] ); + P( B, C, D, E, A, W[4] ); + P( A, B, C, D, E, W[5] ); + P( E, A, B, C, D, W[6] ); + P( D, E, A, B, C, W[7] ); + P( C, D, E, A, B, W[8] ); + P( B, C, D, E, A, W[9] ); + P( A, B, C, D, E, W[10] ); + P( E, A, B, C, D, W[11] ); + P( D, E, A, B, C, W[12] ); + P( C, D, E, A, B, W[13] ); + P( B, C, D, E, A, W[14] ); + P( A, B, C, D, E, W[15] ); + P( E, A, B, C, D, R(16) ); + P( D, E, A, B, C, R(17) ); + P( C, D, E, A, B, R(18) ); + P( B, C, D, E, A, R(19) ); + +#undef K +#undef F + +#define F(x,y,z) (x ^ y ^ z) +#define K 0x6ED9EBA1 + + P( A, B, C, D, E, R(20) ); + P( E, A, B, C, D, R(21) ); + P( D, E, A, B, C, R(22) ); + P( C, D, E, A, B, R(23) ); + P( B, C, D, E, A, R(24) ); + P( A, B, C, D, E, R(25) ); + P( E, A, B, C, D, R(26) ); + P( D, E, A, B, C, R(27) ); + P( C, D, E, A, B, R(28) ); + P( B, C, D, E, A, R(29) ); + P( A, B, C, D, E, R(30) ); + P( E, A, B, C, D, R(31) ); + P( D, E, A, B, C, R(32) ); + P( C, D, E, A, B, R(33) ); + P( B, C, D, E, A, R(34) ); + P( A, B, C, D, E, R(35) ); + P( E, A, B, C, D, R(36) ); + P( D, E, A, B, C, R(37) ); + P( C, D, E, A, B, R(38) ); + P( B, C, D, E, A, R(39) ); + +#undef K +#undef F + +#define F(x,y,z) ((x & y) | (z & (x | y))) +#define K 0x8F1BBCDC + + P( A, B, C, D, E, R(40) ); + P( E, A, B, C, D, R(41) ); + P( D, E, A, B, C, R(42) ); + P( C, D, E, A, B, R(43) ); + P( B, C, D, E, A, R(44) ); + P( A, B, C, D, E, R(45) ); + P( E, A, B, C, D, R(46) ); + P( D, E, A, B, C, R(47) ); + P( C, D, E, A, B, R(48) ); + P( B, C, D, E, A, R(49) ); + P( A, B, C, D, E, R(50) ); + P( E, A, B, C, D, R(51) ); + P( D, E, A, B, C, R(52) ); + P( C, D, E, A, B, R(53) ); + P( B, C, D, E, A, R(54) ); + P( A, B, C, D, E, R(55) ); + P( E, A, B, C, D, R(56) ); + P( D, E, A, B, C, R(57) ); + P( C, D, E, A, B, R(58) ); + P( B, C, D, E, A, R(59) ); + +#undef K +#undef F + +#define F(x,y,z) (x ^ y ^ z) +#define K 0xCA62C1D6 + + P( A, B, C, D, E, R(60) ); + P( E, A, B, C, D, R(61) ); + P( D, E, A, B, C, R(62) ); + P( C, D, E, A, B, R(63) ); + P( B, C, D, E, A, R(64) ); + P( A, B, C, D, E, R(65) ); + P( E, A, B, C, D, R(66) ); + P( D, E, A, B, C, R(67) ); + P( C, D, E, A, B, R(68) ); + P( B, C, D, E, A, R(69) ); + P( A, B, C, D, E, R(70) ); + P( E, A, B, C, D, R(71) ); + P( D, E, A, B, C, R(72) ); + P( C, D, E, A, B, R(73) ); + P( B, C, D, E, A, R(74) ); + P( A, B, C, D, E, R(75) ); + P( E, A, B, C, D, R(76) ); + P( D, E, A, B, C, R(77) ); + P( C, D, E, A, B, R(78) ); + P( B, C, D, E, A, R(79) ); + +#undef K +#undef F + + ctx->state[0] += A; + ctx->state[1] += B; + ctx->state[2] += C; + ctx->state[3] += D; + ctx->state[4] += E; +} +#endif /* !MBEDTLS_SHA1_PROCESS_ALT */ + +/* + * SHA-1 process buffer + */ +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ) +{ + size_t fill; + uint32_t left; + + if( ilen == 0 ) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += (uint32_t) ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if( ctx->total[0] < (uint32_t) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), input, fill ); + mbedtls_sha1_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 64 ) + { + mbedtls_sha1_process( ctx, input ); + input += 64; + ilen -= 64; + } + + if( ilen > 0 ) + memcpy( (void *) (ctx->buffer + left), input, ilen ); +} + +static const unsigned char sha1_padding[64] ICACHE_RODATA_ATTR = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * SHA-1 final digest + */ +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, unsigned char output[20] ) +{ + uint32_t last, padn; + uint32_t high, low; + unsigned char msglen[8]; + unsigned char sha1_padding_local[64]; + + memcpy(sha1_padding_local, sha1_padding, 64); + + high = ( ctx->total[0] >> 29 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_UINT32_BE( high, msglen, 0 ); + PUT_UINT32_BE( low, msglen, 4 ); + + last = ctx->total[0] & 0x3F; + padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + + mbedtls_sha1_update( ctx, sha1_padding_local, padn ); + mbedtls_sha1_update( ctx, msglen, 8 ); + + PUT_UINT32_BE( ctx->state[0], output, 0 ); + PUT_UINT32_BE( ctx->state[1], output, 4 ); + PUT_UINT32_BE( ctx->state[2], output, 8 ); + PUT_UINT32_BE( ctx->state[3], output, 12 ); + PUT_UINT32_BE( ctx->state[4], output, 16 ); +} + +#endif /* !MBEDTLS_SHA1_ALT */ + +/* + * output = SHA-1( input buffer ) + */ +void mbedtls_sha1( const unsigned char *input, size_t ilen, unsigned char output[20] ) +{ + mbedtls_sha1_context ctx; + + mbedtls_sha1_init( &ctx ); + mbedtls_sha1_starts( &ctx ); + mbedtls_sha1_update( &ctx, input, ilen ); + mbedtls_sha1_finish( &ctx, output ); + mbedtls_sha1_free( &ctx ); +} + +#if defined(MBEDTLS_SELF_TEST) +/* + * FIPS-180-1 test vectors + */ +static const unsigned char sha1_test_buf[3][57] = +{ + { "abc" }, + { "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" }, + { "" } +}; + +static const int sha1_test_buflen[3] = +{ + 3, 56, 1000 +}; + +static const unsigned char sha1_test_sum[3][20] = +{ + { 0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E, + 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D }, + { 0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE, + 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1 }, + { 0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E, + 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F } +}; + +/* + * Checkup routine + */ +int mbedtls_sha1_self_test( int verbose ) +{ + int i, j, buflen, ret = 0; + unsigned char buf[1024]; + unsigned char sha1sum[20]; + mbedtls_sha1_context ctx; + + mbedtls_sha1_init( &ctx ); + + /* + * SHA-1 + */ + for( i = 0; i < 3; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " SHA-1 test #%d: ", i + 1 ); + + mbedtls_sha1_starts( &ctx ); + + if( i == 2 ) + { + memset( buf, 'a', buflen = 1000 ); + + for( j = 0; j < 1000; j++ ) + mbedtls_sha1_update( &ctx, buf, buflen ); + } + else + mbedtls_sha1_update( &ctx, sha1_test_buf[i], + sha1_test_buflen[i] ); + + mbedtls_sha1_finish( &ctx, sha1sum ); + + if( memcmp( sha1sum, sha1_test_sum[i], 20 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +exit: + mbedtls_sha1_free( &ctx ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_SHA1_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha256.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha256.c new file mode 100644 index 0000000..946e672 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha256.c @@ -0,0 +1,449 @@ +/* + * FIPS-180-2 compliant SHA-256 implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The SHA-256 Secure Hash Standard was published by NIST in 2002. + * + * http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SHA256_C) + +#include "mbedtls/sha256.h" +#include "c_types.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_SHA256_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +do { \ + (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ + | ( (uint32_t) (b)[(i) + 1] << 16 ) \ + | ( (uint32_t) (b)[(i) + 2] << 8 ) \ + | ( (uint32_t) (b)[(i) + 3] ); \ +} while( 0 ) +#endif + +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +do { \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} while( 0 ) +#endif + +void mbedtls_sha256_init( mbedtls_sha256_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_sha256_context ) ); +} + +void mbedtls_sha256_free( mbedtls_sha256_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_sha256_context ) ); +} + +void mbedtls_sha256_clone( mbedtls_sha256_context *dst, + const mbedtls_sha256_context *src ) +{ + *dst = *src; +} + +/* + * SHA-256 context setup + */ +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + if( is224 == 0 ) + { + /* SHA-256 */ + ctx->state[0] = 0x6A09E667; + ctx->state[1] = 0xBB67AE85; + ctx->state[2] = 0x3C6EF372; + ctx->state[3] = 0xA54FF53A; + ctx->state[4] = 0x510E527F; + ctx->state[5] = 0x9B05688C; + ctx->state[6] = 0x1F83D9AB; + ctx->state[7] = 0x5BE0CD19; + } + else + { + /* SHA-224 */ + ctx->state[0] = 0xC1059ED8; + ctx->state[1] = 0x367CD507; + ctx->state[2] = 0x3070DD17; + ctx->state[3] = 0xF70E5939; + ctx->state[4] = 0xFFC00B31; + ctx->state[5] = 0x68581511; + ctx->state[6] = 0x64F98FA7; + ctx->state[7] = 0xBEFA4FA4; + } + + ctx->is224 = is224; +} + +#if !defined(MBEDTLS_SHA256_PROCESS_ALT) +static const uint32_t K[] ICACHE_RODATA_ATTR STORE_ATTR = +{ + 0x428A2F98, 0x71374491, 0xB5C0FBCF, 0xE9B5DBA5, + 0x3956C25B, 0x59F111F1, 0x923F82A4, 0xAB1C5ED5, + 0xD807AA98, 0x12835B01, 0x243185BE, 0x550C7DC3, + 0x72BE5D74, 0x80DEB1FE, 0x9BDC06A7, 0xC19BF174, + 0xE49B69C1, 0xEFBE4786, 0x0FC19DC6, 0x240CA1CC, + 0x2DE92C6F, 0x4A7484AA, 0x5CB0A9DC, 0x76F988DA, + 0x983E5152, 0xA831C66D, 0xB00327C8, 0xBF597FC7, + 0xC6E00BF3, 0xD5A79147, 0x06CA6351, 0x14292967, + 0x27B70A85, 0x2E1B2138, 0x4D2C6DFC, 0x53380D13, + 0x650A7354, 0x766A0ABB, 0x81C2C92E, 0x92722C85, + 0xA2BFE8A1, 0xA81A664B, 0xC24B8B70, 0xC76C51A3, + 0xD192E819, 0xD6990624, 0xF40E3585, 0x106AA070, + 0x19A4C116, 0x1E376C08, 0x2748774C, 0x34B0BCB5, + 0x391C0CB3, 0x4ED8AA4A, 0x5B9CCA4F, 0x682E6FF3, + 0x748F82EE, 0x78A5636F, 0x84C87814, 0x8CC70208, + 0x90BEFFFA, 0xA4506CEB, 0xBEF9A3F7, 0xC67178F2, +}; + +#define SHR(x,n) ((x & 0xFFFFFFFF) >> n) +#define ROTR(x,n) (SHR(x,n) | (x << (32 - n))) + +#define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3)) +#define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10)) + +#define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22)) +#define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25)) + +#define F0(x,y,z) ((x & y) | (z & (x | y))) +#define F1(x,y,z) (z ^ (x & (y ^ z))) + +#define R(t) \ +( \ + W[t] = S1(W[t - 2]) + W[t - 7] + \ + S0(W[t - 15]) + W[t - 16] \ +) + +#define P(a,b,c,d,e,f,g,h,x,K) \ +{ \ + temp1 = h + S3(e) + F1(e,f,g) + K + x; \ + temp2 = S2(a) + F0(a,b,c); \ + d += temp1; h = temp1 + temp2; \ +} + +void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[64] ) +{ + uint32_t temp1, temp2, W[64]; + uint32_t A[8]; + unsigned int i; + + for( i = 0; i < 8; i++ ) + A[i] = ctx->state[i]; + +#if defined(MBEDTLS_SHA256_SMALLER) + for( i = 0; i < 64; i++ ) + { + if( i < 16 ) + GET_UINT32_BE( W[i], data, 4 * i ); + else + R( i ); + + P( A[0], A[1], A[2], A[3], A[4], A[5], A[6], A[7], W[i], K[i] ); + + temp1 = A[7]; A[7] = A[6]; A[6] = A[5]; A[5] = A[4]; A[4] = A[3]; + A[3] = A[2]; A[2] = A[1]; A[1] = A[0]; A[0] = temp1; + } +#else /* MBEDTLS_SHA256_SMALLER */ + for( i = 0; i < 16; i++ ) + GET_UINT32_BE( W[i], data, 4 * i ); + + for( i = 0; i < 16; i += 8 ) + { + P( A[0], A[1], A[2], A[3], A[4], A[5], A[6], A[7], W[i+0], K[i+0] ); + P( A[7], A[0], A[1], A[2], A[3], A[4], A[5], A[6], W[i+1], K[i+1] ); + P( A[6], A[7], A[0], A[1], A[2], A[3], A[4], A[5], W[i+2], K[i+2] ); + P( A[5], A[6], A[7], A[0], A[1], A[2], A[3], A[4], W[i+3], K[i+3] ); + P( A[4], A[5], A[6], A[7], A[0], A[1], A[2], A[3], W[i+4], K[i+4] ); + P( A[3], A[4], A[5], A[6], A[7], A[0], A[1], A[2], W[i+5], K[i+5] ); + P( A[2], A[3], A[4], A[5], A[6], A[7], A[0], A[1], W[i+6], K[i+6] ); + P( A[1], A[2], A[3], A[4], A[5], A[6], A[7], A[0], W[i+7], K[i+7] ); + } + + for( i = 16; i < 64; i += 8 ) + { + P( A[0], A[1], A[2], A[3], A[4], A[5], A[6], A[7], R(i+0), K[i+0] ); + P( A[7], A[0], A[1], A[2], A[3], A[4], A[5], A[6], R(i+1), K[i+1] ); + P( A[6], A[7], A[0], A[1], A[2], A[3], A[4], A[5], R(i+2), K[i+2] ); + P( A[5], A[6], A[7], A[0], A[1], A[2], A[3], A[4], R(i+3), K[i+3] ); + P( A[4], A[5], A[6], A[7], A[0], A[1], A[2], A[3], R(i+4), K[i+4] ); + P( A[3], A[4], A[5], A[6], A[7], A[0], A[1], A[2], R(i+5), K[i+5] ); + P( A[2], A[3], A[4], A[5], A[6], A[7], A[0], A[1], R(i+6), K[i+6] ); + P( A[1], A[2], A[3], A[4], A[5], A[6], A[7], A[0], R(i+7), K[i+7] ); + } +#endif /* MBEDTLS_SHA256_SMALLER */ + + for( i = 0; i < 8; i++ ) + ctx->state[i] += A[i]; +} +#endif /* !MBEDTLS_SHA256_PROCESS_ALT */ + +/* + * SHA-256 process buffer + */ +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input, + size_t ilen ) +{ + size_t fill; + uint32_t left; + + if( ilen == 0 ) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += (uint32_t) ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if( ctx->total[0] < (uint32_t) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), input, fill ); + mbedtls_sha256_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 64 ) + { + mbedtls_sha256_process( ctx, input ); + input += 64; + ilen -= 64; + } + + if( ilen > 0 ) + memcpy( (void *) (ctx->buffer + left), input, ilen ); +} + +static const unsigned char sha256_padding[64] ICACHE_RODATA_ATTR = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * SHA-256 final digest + */ +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] ) +{ + uint32_t last, padn; + uint32_t high, low; + unsigned char msglen[8]; + unsigned char sha256_padding_local[64]; + + memcpy(sha256_padding_local, sha256_padding, 64); + + high = ( ctx->total[0] >> 29 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_UINT32_BE( high, msglen, 0 ); + PUT_UINT32_BE( low, msglen, 4 ); + + last = ctx->total[0] & 0x3F; + padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + + mbedtls_sha256_update( ctx, sha256_padding_local, padn ); + mbedtls_sha256_update( ctx, msglen, 8 ); + + PUT_UINT32_BE( ctx->state[0], output, 0 ); + PUT_UINT32_BE( ctx->state[1], output, 4 ); + PUT_UINT32_BE( ctx->state[2], output, 8 ); + PUT_UINT32_BE( ctx->state[3], output, 12 ); + PUT_UINT32_BE( ctx->state[4], output, 16 ); + PUT_UINT32_BE( ctx->state[5], output, 20 ); + PUT_UINT32_BE( ctx->state[6], output, 24 ); + + if( ctx->is224 == 0 ) + PUT_UINT32_BE( ctx->state[7], output, 28 ); +} + +#endif /* !MBEDTLS_SHA256_ALT */ + +/* + * output = SHA-256( input buffer ) + */ +void mbedtls_sha256( const unsigned char *input, size_t ilen, + unsigned char output[32], int is224 ) +{ + mbedtls_sha256_context ctx; + + mbedtls_sha256_init( &ctx ); + mbedtls_sha256_starts( &ctx, is224 ); + mbedtls_sha256_update( &ctx, input, ilen ); + mbedtls_sha256_finish( &ctx, output ); + mbedtls_sha256_free( &ctx ); +} + +#if defined(MBEDTLS_SELF_TEST) +/* + * FIPS-180-2 test vectors + */ +static const unsigned char sha256_test_buf[3][57] = +{ + { "abc" }, + { "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" }, + { "" } +}; + +static const int sha256_test_buflen[3] = +{ + 3, 56, 1000 +}; + +static const unsigned char sha256_test_sum[6][32] = +{ + /* + * SHA-224 test vectors + */ + { 0x23, 0x09, 0x7D, 0x22, 0x34, 0x05, 0xD8, 0x22, + 0x86, 0x42, 0xA4, 0x77, 0xBD, 0xA2, 0x55, 0xB3, + 0x2A, 0xAD, 0xBC, 0xE4, 0xBD, 0xA0, 0xB3, 0xF7, + 0xE3, 0x6C, 0x9D, 0xA7 }, + { 0x75, 0x38, 0x8B, 0x16, 0x51, 0x27, 0x76, 0xCC, + 0x5D, 0xBA, 0x5D, 0xA1, 0xFD, 0x89, 0x01, 0x50, + 0xB0, 0xC6, 0x45, 0x5C, 0xB4, 0xF5, 0x8B, 0x19, + 0x52, 0x52, 0x25, 0x25 }, + { 0x20, 0x79, 0x46, 0x55, 0x98, 0x0C, 0x91, 0xD8, + 0xBB, 0xB4, 0xC1, 0xEA, 0x97, 0x61, 0x8A, 0x4B, + 0xF0, 0x3F, 0x42, 0x58, 0x19, 0x48, 0xB2, 0xEE, + 0x4E, 0xE7, 0xAD, 0x67 }, + + /* + * SHA-256 test vectors + */ + { 0xBA, 0x78, 0x16, 0xBF, 0x8F, 0x01, 0xCF, 0xEA, + 0x41, 0x41, 0x40, 0xDE, 0x5D, 0xAE, 0x22, 0x23, + 0xB0, 0x03, 0x61, 0xA3, 0x96, 0x17, 0x7A, 0x9C, + 0xB4, 0x10, 0xFF, 0x61, 0xF2, 0x00, 0x15, 0xAD }, + { 0x24, 0x8D, 0x6A, 0x61, 0xD2, 0x06, 0x38, 0xB8, + 0xE5, 0xC0, 0x26, 0x93, 0x0C, 0x3E, 0x60, 0x39, + 0xA3, 0x3C, 0xE4, 0x59, 0x64, 0xFF, 0x21, 0x67, + 0xF6, 0xEC, 0xED, 0xD4, 0x19, 0xDB, 0x06, 0xC1 }, + { 0xCD, 0xC7, 0x6E, 0x5C, 0x99, 0x14, 0xFB, 0x92, + 0x81, 0xA1, 0xC7, 0xE2, 0x84, 0xD7, 0x3E, 0x67, + 0xF1, 0x80, 0x9A, 0x48, 0xA4, 0x97, 0x20, 0x0E, + 0x04, 0x6D, 0x39, 0xCC, 0xC7, 0x11, 0x2C, 0xD0 } +}; + +/* + * Checkup routine + */ +int mbedtls_sha256_self_test( int verbose ) +{ + int i, j, k, buflen, ret = 0; + unsigned char buf[1024]; + unsigned char sha256sum[32]; + mbedtls_sha256_context ctx; + + mbedtls_sha256_init( &ctx ); + + for( i = 0; i < 6; i++ ) + { + j = i % 3; + k = i < 3; + + if( verbose != 0 ) + mbedtls_printf( " SHA-%d test #%d: ", 256 - k * 32, j + 1 ); + + mbedtls_sha256_starts( &ctx, k ); + + if( j == 2 ) + { + memset( buf, 'a', buflen = 1000 ); + + for( j = 0; j < 1000; j++ ) + mbedtls_sha256_update( &ctx, buf, buflen ); + } + else + mbedtls_sha256_update( &ctx, sha256_test_buf[j], + sha256_test_buflen[j] ); + + mbedtls_sha256_finish( &ctx, sha256sum ); + + if( memcmp( sha256sum, sha256_test_sum[i], 32 - k * 4 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +exit: + mbedtls_sha256_free( &ctx ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_SHA256_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha512.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha512.c new file mode 100644 index 0000000..f8be80e --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/sha512.c @@ -0,0 +1,505 @@ +/* + * FIPS-180-2 compliant SHA-384/512 implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The SHA-512 Secure Hash Standard was published by NIST in 2002. + * + * http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SHA512_C) + +#include "mbedtls/sha512.h" + +#if defined(_MSC_VER) || defined(__WATCOMC__) + #define UL64(x) x##ui64 +#else + #define UL64(x) x##ULL +#endif +#include "c_types.h" +#include "mem.h" +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_SHA512_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 64-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT64_BE +#define GET_UINT64_BE(n,b,i) \ +{ \ + (n) = ( (uint64_t) (b)[(i) ] << 56 ) \ + | ( (uint64_t) (b)[(i) + 1] << 48 ) \ + | ( (uint64_t) (b)[(i) + 2] << 40 ) \ + | ( (uint64_t) (b)[(i) + 3] << 32 ) \ + | ( (uint64_t) (b)[(i) + 4] << 24 ) \ + | ( (uint64_t) (b)[(i) + 5] << 16 ) \ + | ( (uint64_t) (b)[(i) + 6] << 8 ) \ + | ( (uint64_t) (b)[(i) + 7] ); \ +} +#endif /* GET_UINT64_BE */ + +#ifndef PUT_UINT64_BE +#define PUT_UINT64_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 56 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 48 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 40 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) >> 32 ); \ + (b)[(i) + 4] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 5] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 6] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 7] = (unsigned char) ( (n) ); \ +} +#endif /* PUT_UINT64_BE */ + +/* + * Round constants + */ +static const uint64_t K[80] ICACHE_RODATA_ATTR STORE_ATTR = +{ + UL64(0x428A2F98D728AE22), UL64(0x7137449123EF65CD), + UL64(0xB5C0FBCFEC4D3B2F), UL64(0xE9B5DBA58189DBBC), + UL64(0x3956C25BF348B538), UL64(0x59F111F1B605D019), + UL64(0x923F82A4AF194F9B), UL64(0xAB1C5ED5DA6D8118), + UL64(0xD807AA98A3030242), UL64(0x12835B0145706FBE), + UL64(0x243185BE4EE4B28C), UL64(0x550C7DC3D5FFB4E2), + UL64(0x72BE5D74F27B896F), UL64(0x80DEB1FE3B1696B1), + UL64(0x9BDC06A725C71235), UL64(0xC19BF174CF692694), + UL64(0xE49B69C19EF14AD2), UL64(0xEFBE4786384F25E3), + UL64(0x0FC19DC68B8CD5B5), UL64(0x240CA1CC77AC9C65), + UL64(0x2DE92C6F592B0275), UL64(0x4A7484AA6EA6E483), + UL64(0x5CB0A9DCBD41FBD4), UL64(0x76F988DA831153B5), + UL64(0x983E5152EE66DFAB), UL64(0xA831C66D2DB43210), + UL64(0xB00327C898FB213F), UL64(0xBF597FC7BEEF0EE4), + UL64(0xC6E00BF33DA88FC2), UL64(0xD5A79147930AA725), + UL64(0x06CA6351E003826F), UL64(0x142929670A0E6E70), + UL64(0x27B70A8546D22FFC), UL64(0x2E1B21385C26C926), + UL64(0x4D2C6DFC5AC42AED), UL64(0x53380D139D95B3DF), + UL64(0x650A73548BAF63DE), UL64(0x766A0ABB3C77B2A8), + UL64(0x81C2C92E47EDAEE6), UL64(0x92722C851482353B), + UL64(0xA2BFE8A14CF10364), UL64(0xA81A664BBC423001), + UL64(0xC24B8B70D0F89791), UL64(0xC76C51A30654BE30), + UL64(0xD192E819D6EF5218), UL64(0xD69906245565A910), + UL64(0xF40E35855771202A), UL64(0x106AA07032BBD1B8), + UL64(0x19A4C116B8D2D0C8), UL64(0x1E376C085141AB53), + UL64(0x2748774CDF8EEB99), UL64(0x34B0BCB5E19B48A8), + UL64(0x391C0CB3C5C95A63), UL64(0x4ED8AA4AE3418ACB), + UL64(0x5B9CCA4F7763E373), UL64(0x682E6FF3D6B2B8A3), + UL64(0x748F82EE5DEFB2FC), UL64(0x78A5636F43172F60), + UL64(0x84C87814A1F0AB72), UL64(0x8CC702081A6439EC), + UL64(0x90BEFFFA23631E28), UL64(0xA4506CEBDE82BDE9), + UL64(0xBEF9A3F7B2C67915), UL64(0xC67178F2E372532B), + UL64(0xCA273ECEEA26619C), UL64(0xD186B8C721C0C207), + UL64(0xEADA7DD6CDE0EB1E), UL64(0xF57D4F7FEE6ED178), + UL64(0x06F067AA72176FBA), UL64(0x0A637DC5A2C898A6), + UL64(0x113F9804BEF90DAE), UL64(0x1B710B35131C471B), + UL64(0x28DB77F523047D84), UL64(0x32CAAB7B40C72493), + UL64(0x3C9EBE0A15C9BEBC), UL64(0x431D67C49C100D4C), + UL64(0x4CC5D4BECB3E42B6), UL64(0x597F299CFC657E2A), + UL64(0x5FCB6FAB3AD6FAEC), UL64(0x6C44198C4A475817) +}; + +void mbedtls_sha512_init( mbedtls_sha512_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_sha512_context ) ); +} + +void mbedtls_sha512_free( mbedtls_sha512_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_sha512_context ) ); +} + +void mbedtls_sha512_clone( mbedtls_sha512_context *dst, + const mbedtls_sha512_context *src ) +{ + *dst = *src; +} + +/* + * SHA-512 context setup + */ +void mbedtls_sha512_starts( mbedtls_sha512_context *ctx, int is384 ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + if( is384 == 0 ) + { + /* SHA-512 */ + ctx->state[0] = UL64(0x6A09E667F3BCC908); + ctx->state[1] = UL64(0xBB67AE8584CAA73B); + ctx->state[2] = UL64(0x3C6EF372FE94F82B); + ctx->state[3] = UL64(0xA54FF53A5F1D36F1); + ctx->state[4] = UL64(0x510E527FADE682D1); + ctx->state[5] = UL64(0x9B05688C2B3E6C1F); + ctx->state[6] = UL64(0x1F83D9ABFB41BD6B); + ctx->state[7] = UL64(0x5BE0CD19137E2179); + } + else + { + /* SHA-384 */ + ctx->state[0] = UL64(0xCBBB9D5DC1059ED8); + ctx->state[1] = UL64(0x629A292A367CD507); + ctx->state[2] = UL64(0x9159015A3070DD17); + ctx->state[3] = UL64(0x152FECD8F70E5939); + ctx->state[4] = UL64(0x67332667FFC00B31); + ctx->state[5] = UL64(0x8EB44A8768581511); + ctx->state[6] = UL64(0xDB0C2E0D64F98FA7); + ctx->state[7] = UL64(0x47B5481DBEFA4FA4); + } + + ctx->is384 = is384; +} + +#if !defined(MBEDTLS_SHA512_PROCESS_ALT) +void mbedtls_sha512_process( mbedtls_sha512_context *ctx, const unsigned char data[128] ) +{ + int i; + uint64_t temp1, temp2, W[80]; + uint64_t A, B, C, D, E, F, G, H; + +#define SHR(x,n) (x >> n) +#define ROTR(x,n) (SHR(x,n) | (x << (64 - n))) + +#define S0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7)) +#define S1(x) (ROTR(x,19) ^ ROTR(x,61) ^ SHR(x, 6)) + +#define S2(x) (ROTR(x,28) ^ ROTR(x,34) ^ ROTR(x,39)) +#define S3(x) (ROTR(x,14) ^ ROTR(x,18) ^ ROTR(x,41)) + +#define F0(x,y,z) ((x & y) | (z & (x | y))) +#define F1(x,y,z) (z ^ (x & (y ^ z))) + +#define P(a,b,c,d,e,f,g,h,x,K) \ +{ \ + temp1 = h + S3(e) + F1(e,f,g) + K + x; \ + temp2 = S2(a) + F0(a,b,c); \ + d += temp1; h = temp1 + temp2; \ +} + + for( i = 0; i < 16; i++ ) + { + GET_UINT64_BE( W[i], data, i << 3 ); + } + + for( ; i < 80; i++ ) + { + W[i] = S1(W[i - 2]) + W[i - 7] + + S0(W[i - 15]) + W[i - 16]; + } + + A = ctx->state[0]; + B = ctx->state[1]; + C = ctx->state[2]; + D = ctx->state[3]; + E = ctx->state[4]; + F = ctx->state[5]; + G = ctx->state[6]; + H = ctx->state[7]; + i = 0; + + do + { + P( A, B, C, D, E, F, G, H, W[i], K[i] ); i++; + P( H, A, B, C, D, E, F, G, W[i], K[i] ); i++; + P( G, H, A, B, C, D, E, F, W[i], K[i] ); i++; + P( F, G, H, A, B, C, D, E, W[i], K[i] ); i++; + P( E, F, G, H, A, B, C, D, W[i], K[i] ); i++; + P( D, E, F, G, H, A, B, C, W[i], K[i] ); i++; + P( C, D, E, F, G, H, A, B, W[i], K[i] ); i++; + P( B, C, D, E, F, G, H, A, W[i], K[i] ); i++; + } + while( i < 80 ); + + ctx->state[0] += A; + ctx->state[1] += B; + ctx->state[2] += C; + ctx->state[3] += D; + ctx->state[4] += E; + ctx->state[5] += F; + ctx->state[6] += G; + ctx->state[7] += H; +} +#endif /* !MBEDTLS_SHA512_PROCESS_ALT */ + +/* + * SHA-512 process buffer + */ +void mbedtls_sha512_update( mbedtls_sha512_context *ctx, const unsigned char *input, + size_t ilen ) +{ + size_t fill; + unsigned int left; + + if( ilen == 0 ) + return; + + left = (unsigned int) (ctx->total[0] & 0x7F); + fill = 128 - left; + + ctx->total[0] += (uint64_t) ilen; + + if( ctx->total[0] < (uint64_t) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), input, fill ); + mbedtls_sha512_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 128 ) + { + mbedtls_sha512_process( ctx, input ); + input += 128; + ilen -= 128; + } + + if( ilen > 0 ) + memcpy( (void *) (ctx->buffer + left), input, ilen ); +} + +static const unsigned char sha512_padding[128] ICACHE_RODATA_ATTR STORE_ATTR = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * SHA-512 final digest + */ +void mbedtls_sha512_finish( mbedtls_sha512_context *ctx, unsigned char output[64] ) +{ + size_t last, padn; + uint64_t high, low; + unsigned char msglen[16]; + unsigned char sha512_padding_local[128]; + + memcpy(sha512_padding_local, sha512_padding, 128); + + high = ( ctx->total[0] >> 61 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_UINT64_BE( high, msglen, 0 ); + PUT_UINT64_BE( low, msglen, 8 ); + + last = (size_t)( ctx->total[0] & 0x7F ); + padn = ( last < 112 ) ? ( 112 - last ) : ( 240 - last ); + + + mbedtls_sha512_update( ctx, sha512_padding_local, padn ); + mbedtls_sha512_update( ctx, msglen, 16 ); + + PUT_UINT64_BE( ctx->state[0], output, 0 ); + PUT_UINT64_BE( ctx->state[1], output, 8 ); + PUT_UINT64_BE( ctx->state[2], output, 16 ); + PUT_UINT64_BE( ctx->state[3], output, 24 ); + PUT_UINT64_BE( ctx->state[4], output, 32 ); + PUT_UINT64_BE( ctx->state[5], output, 40 ); + + if( ctx->is384 == 0 ) + { + PUT_UINT64_BE( ctx->state[6], output, 48 ); + PUT_UINT64_BE( ctx->state[7], output, 56 ); + } +} + +#endif /* !MBEDTLS_SHA512_ALT */ + +/* + * output = SHA-512( input buffer ) + */ +void mbedtls_sha512( const unsigned char *input, size_t ilen, + unsigned char output[64], int is384 ) +{ + mbedtls_sha512_context ctx; + + mbedtls_sha512_init( &ctx ); + mbedtls_sha512_starts( &ctx, is384 ); + mbedtls_sha512_update( &ctx, input, ilen ); + mbedtls_sha512_finish( &ctx, output ); + mbedtls_sha512_free( &ctx ); +} + +#if defined(MBEDTLS_SELF_TEST) + +/* + * FIPS-180-2 test vectors + */ +static const unsigned char sha512_test_buf[3][113] = +{ + { "abc" }, + { "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmn" + "hijklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu" }, + { "" } +}; + +static const int sha512_test_buflen[3] = +{ + 3, 112, 1000 +}; + +static const unsigned char sha512_test_sum[6][64] = +{ + /* + * SHA-384 test vectors + */ + { 0xCB, 0x00, 0x75, 0x3F, 0x45, 0xA3, 0x5E, 0x8B, + 0xB5, 0xA0, 0x3D, 0x69, 0x9A, 0xC6, 0x50, 0x07, + 0x27, 0x2C, 0x32, 0xAB, 0x0E, 0xDE, 0xD1, 0x63, + 0x1A, 0x8B, 0x60, 0x5A, 0x43, 0xFF, 0x5B, 0xED, + 0x80, 0x86, 0x07, 0x2B, 0xA1, 0xE7, 0xCC, 0x23, + 0x58, 0xBA, 0xEC, 0xA1, 0x34, 0xC8, 0x25, 0xA7 }, + { 0x09, 0x33, 0x0C, 0x33, 0xF7, 0x11, 0x47, 0xE8, + 0x3D, 0x19, 0x2F, 0xC7, 0x82, 0xCD, 0x1B, 0x47, + 0x53, 0x11, 0x1B, 0x17, 0x3B, 0x3B, 0x05, 0xD2, + 0x2F, 0xA0, 0x80, 0x86, 0xE3, 0xB0, 0xF7, 0x12, + 0xFC, 0xC7, 0xC7, 0x1A, 0x55, 0x7E, 0x2D, 0xB9, + 0x66, 0xC3, 0xE9, 0xFA, 0x91, 0x74, 0x60, 0x39 }, + { 0x9D, 0x0E, 0x18, 0x09, 0x71, 0x64, 0x74, 0xCB, + 0x08, 0x6E, 0x83, 0x4E, 0x31, 0x0A, 0x4A, 0x1C, + 0xED, 0x14, 0x9E, 0x9C, 0x00, 0xF2, 0x48, 0x52, + 0x79, 0x72, 0xCE, 0xC5, 0x70, 0x4C, 0x2A, 0x5B, + 0x07, 0xB8, 0xB3, 0xDC, 0x38, 0xEC, 0xC4, 0xEB, + 0xAE, 0x97, 0xDD, 0xD8, 0x7F, 0x3D, 0x89, 0x85 }, + + /* + * SHA-512 test vectors + */ + { 0xDD, 0xAF, 0x35, 0xA1, 0x93, 0x61, 0x7A, 0xBA, + 0xCC, 0x41, 0x73, 0x49, 0xAE, 0x20, 0x41, 0x31, + 0x12, 0xE6, 0xFA, 0x4E, 0x89, 0xA9, 0x7E, 0xA2, + 0x0A, 0x9E, 0xEE, 0xE6, 0x4B, 0x55, 0xD3, 0x9A, + 0x21, 0x92, 0x99, 0x2A, 0x27, 0x4F, 0xC1, 0xA8, + 0x36, 0xBA, 0x3C, 0x23, 0xA3, 0xFE, 0xEB, 0xBD, + 0x45, 0x4D, 0x44, 0x23, 0x64, 0x3C, 0xE8, 0x0E, + 0x2A, 0x9A, 0xC9, 0x4F, 0xA5, 0x4C, 0xA4, 0x9F }, + { 0x8E, 0x95, 0x9B, 0x75, 0xDA, 0xE3, 0x13, 0xDA, + 0x8C, 0xF4, 0xF7, 0x28, 0x14, 0xFC, 0x14, 0x3F, + 0x8F, 0x77, 0x79, 0xC6, 0xEB, 0x9F, 0x7F, 0xA1, + 0x72, 0x99, 0xAE, 0xAD, 0xB6, 0x88, 0x90, 0x18, + 0x50, 0x1D, 0x28, 0x9E, 0x49, 0x00, 0xF7, 0xE4, + 0x33, 0x1B, 0x99, 0xDE, 0xC4, 0xB5, 0x43, 0x3A, + 0xC7, 0xD3, 0x29, 0xEE, 0xB6, 0xDD, 0x26, 0x54, + 0x5E, 0x96, 0xE5, 0x5B, 0x87, 0x4B, 0xE9, 0x09 }, + { 0xE7, 0x18, 0x48, 0x3D, 0x0C, 0xE7, 0x69, 0x64, + 0x4E, 0x2E, 0x42, 0xC7, 0xBC, 0x15, 0xB4, 0x63, + 0x8E, 0x1F, 0x98, 0xB1, 0x3B, 0x20, 0x44, 0x28, + 0x56, 0x32, 0xA8, 0x03, 0xAF, 0xA9, 0x73, 0xEB, + 0xDE, 0x0F, 0xF2, 0x44, 0x87, 0x7E, 0xA6, 0x0A, + 0x4C, 0xB0, 0x43, 0x2C, 0xE5, 0x77, 0xC3, 0x1B, + 0xEB, 0x00, 0x9C, 0x5C, 0x2C, 0x49, 0xAA, 0x2E, + 0x4E, 0xAD, 0xB2, 0x17, 0xAD, 0x8C, 0xC0, 0x9B } +}; + +/* + * Checkup routine + */ +int mbedtls_sha512_self_test( int verbose ) +{ + int i, j, k, buflen, ret = 0; + unsigned char buf[1024]; + unsigned char sha512sum[64]; + mbedtls_sha512_context ctx; + + mbedtls_sha512_init( &ctx ); + + for( i = 0; i < 6; i++ ) + { + j = i % 3; + k = i < 3; + + if( verbose != 0 ) + mbedtls_printf( " SHA-%d test #%d: ", 512 - k * 128, j + 1 ); + + mbedtls_sha512_starts( &ctx, k ); + + if( j == 2 ) + { + memset( buf, 'a', buflen = 1000 ); + + for( j = 0; j < 1000; j++ ) + mbedtls_sha512_update( &ctx, buf, buflen ); + } + else + mbedtls_sha512_update( &ctx, sha512_test_buf[j], + sha512_test_buflen[j] ); + + mbedtls_sha512_finish( &ctx, sha512sum ); + + if( memcmp( sha512sum, sha512_test_sum[i], 64 - k * 16 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +exit: + mbedtls_sha512_free( &ctx ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_SHA512_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cache.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cache.c new file mode 100644 index 0000000..711bc53 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cache.c @@ -0,0 +1,326 @@ +/* + * SSL session cache implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * These session callbacks use a simple chained list + * to store and retrieve the session information. + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SSL_CACHE_C) + +#include "mbedtls/ssl_cache.h" + +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +void mbedtls_ssl_cache_init( mbedtls_ssl_cache_context *cache ) +{ + memset( cache, 0, sizeof( mbedtls_ssl_cache_context ) ); + + cache->timeout = MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT; + cache->max_entries = MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES; + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &cache->mutex ); +#endif +} + +int mbedtls_ssl_cache_get( void *data, mbedtls_ssl_session *session ) +{ + int ret = 1; +#if defined(MBEDTLS_HAVE_TIME) + time_t t = time( NULL ); +#endif + mbedtls_ssl_cache_context *cache = (mbedtls_ssl_cache_context *) data; + mbedtls_ssl_cache_entry *cur, *entry; + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_lock( &cache->mutex ) != 0 ) + return( 1 ); +#endif + + cur = cache->chain; + entry = NULL; + + while( cur != NULL ) + { + entry = cur; + cur = cur->next; + +#if defined(MBEDTLS_HAVE_TIME) + if( cache->timeout != 0 && + (int) ( t - entry->timestamp ) > cache->timeout ) + continue; +#endif + + if( session->ciphersuite != entry->session.ciphersuite || + session->compression != entry->session.compression || + session->id_len != entry->session.id_len ) + continue; + + if( memcmp( session->id, entry->session.id, + entry->session.id_len ) != 0 ) + continue; + + memcpy( session->master, entry->session.master, 48 ); + + session->verify_result = entry->session.verify_result; + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + /* + * Restore peer certificate (without rest of the original chain) + */ + if( entry->peer_cert.p != NULL ) + { + if( ( session->peer_cert = mbedtls_calloc( 1, + sizeof(mbedtls_x509_crt) ) ) == NULL ) + { + ret = 1; + goto exit; + } + + mbedtls_x509_crt_init( session->peer_cert ); + if( mbedtls_x509_crt_parse( session->peer_cert, entry->peer_cert.p, + entry->peer_cert.len ) != 0 ) + { + mbedtls_free( session->peer_cert ); + session->peer_cert = NULL; + ret = 1; + goto exit; + } + } +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + + ret = 0; + goto exit; + } + +exit: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &cache->mutex ) != 0 ) + ret = 1; +#endif + + return( ret ); +} + +int mbedtls_ssl_cache_set( void *data, const mbedtls_ssl_session *session ) +{ + int ret = 1; +#if defined(MBEDTLS_HAVE_TIME) + time_t t = time( NULL ), oldest = 0; + mbedtls_ssl_cache_entry *old = NULL; +#endif + mbedtls_ssl_cache_context *cache = (mbedtls_ssl_cache_context *) data; + mbedtls_ssl_cache_entry *cur, *prv; + int count = 0; + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &cache->mutex ) ) != 0 ) + return( ret ); +#endif + + cur = cache->chain; + prv = NULL; + + while( cur != NULL ) + { + count++; + +#if defined(MBEDTLS_HAVE_TIME) + if( cache->timeout != 0 && + (int) ( t - cur->timestamp ) > cache->timeout ) + { + cur->timestamp = t; + break; /* expired, reuse this slot, update timestamp */ + } +#endif + + if( memcmp( session->id, cur->session.id, cur->session.id_len ) == 0 ) + break; /* client reconnected, keep timestamp for session id */ + +#if defined(MBEDTLS_HAVE_TIME) + if( oldest == 0 || cur->timestamp < oldest ) + { + oldest = cur->timestamp; + old = cur; + } +#endif + + prv = cur; + cur = cur->next; + } + + if( cur == NULL ) + { +#if defined(MBEDTLS_HAVE_TIME) + /* + * Reuse oldest entry if max_entries reached + */ + if( count >= cache->max_entries ) + { + if( old == NULL ) + { + ret = 1; + goto exit; + } + + cur = old; + } +#else /* MBEDTLS_HAVE_TIME */ + /* + * Reuse first entry in chain if max_entries reached, + * but move to last place + */ + if( count >= cache->max_entries ) + { + if( cache->chain == NULL ) + { + ret = 1; + goto exit; + } + + cur = cache->chain; + cache->chain = cur->next; + cur->next = NULL; + prv->next = cur; + } +#endif /* MBEDTLS_HAVE_TIME */ + else + { + /* + * max_entries not reached, create new entry + */ + cur = mbedtls_calloc( 1, sizeof(mbedtls_ssl_cache_entry) ); + if( cur == NULL ) + { + ret = 1; + goto exit; + } + + if( prv == NULL ) + cache->chain = cur; + else + prv->next = cur; + } + +#if defined(MBEDTLS_HAVE_TIME) + cur->timestamp = t; +#endif + } + + memcpy( &cur->session, session, sizeof( mbedtls_ssl_session ) ); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + /* + * If we're reusing an entry, free its certificate first + */ + if( cur->peer_cert.p != NULL ) + { + mbedtls_free( cur->peer_cert.p ); + memset( &cur->peer_cert, 0, sizeof(mbedtls_x509_buf) ); + } + + /* + * Store peer certificate + */ + if( session->peer_cert != NULL ) + { + cur->peer_cert.p = mbedtls_calloc( 1, session->peer_cert->raw.len ); + if( cur->peer_cert.p == NULL ) + { + ret = 1; + goto exit; + } + + memcpy( cur->peer_cert.p, session->peer_cert->raw.p, + session->peer_cert->raw.len ); + cur->peer_cert.len = session->peer_cert->raw.len; + + cur->session.peer_cert = NULL; + } +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + + ret = 0; + +exit: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &cache->mutex ) != 0 ) + ret = 1; +#endif + + return( ret ); +} + +#if defined(MBEDTLS_HAVE_TIME) +void mbedtls_ssl_cache_set_timeout( mbedtls_ssl_cache_context *cache, int timeout ) +{ + if( timeout < 0 ) timeout = 0; + + cache->timeout = timeout; +} +#endif /* MBEDTLS_HAVE_TIME */ + +void mbedtls_ssl_cache_set_max_entries( mbedtls_ssl_cache_context *cache, int max ) +{ + if( max < 0 ) max = 0; + + cache->max_entries = max; +} + +void mbedtls_ssl_cache_free( mbedtls_ssl_cache_context *cache ) +{ + mbedtls_ssl_cache_entry *cur, *prv; + + cur = cache->chain; + + while( cur != NULL ) + { + prv = cur; + cur = cur->next; + + mbedtls_ssl_session_free( &prv->session ); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + mbedtls_free( prv->peer_cert.p ); +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + + mbedtls_free( prv ); + } + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_free( &cache->mutex ); +#endif +} + +#endif /* MBEDTLS_SSL_CACHE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_ciphersuites.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_ciphersuites.c new file mode 100644 index 0000000..862deb3 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_ciphersuites.c @@ -0,0 +1,1853 @@ +/** + * \file ssl_ciphersuites.c + * + * \brief SSL ciphersuites for mbed TLS + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SSL_TLS_C) + +#include "mbedtls/ssl_ciphersuites.h" +#include "mbedtls/ssl.h" + +#include "c_types.h" + +#include + +/* + * Ordered from most preferred to least preferred in terms of security. + * + * Current rule (except rc4, weak and null which come last): + * 1. By key exchange: + * Forward-secure non-PSK > forward-secure PSK > ECJPAKE > other non-PSK > other PSK + * 2. By key length and cipher: + * AES-256 > Camellia-256 > AES-128 > Camellia-128 > 3DES + * 3. By cipher mode when relevant GCM > CCM > CBC > CCM_8 + * 4. By hash function used when relevant + * 5. By key exchange/auth again: EC > non-EC + */ +static const int ciphersuite_preference[] ICACHE_RODATA_ATTR STORE_ATTR = +{ +#if defined(MBEDTLS_SSL_CIPHERSUITES) + MBEDTLS_SSL_CIPHERSUITES, +#else + /* All AES-256 ephemeral suites */ + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM, + MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8, + MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8, + + /* All CAMELLIA-256 ephemeral suites */ + MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384, + MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384, + MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256, + MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA, + + /* All AES-128 ephemeral suites */ + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM, + MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8, + MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8, + + /* All CAMELLIA-128 ephemeral suites */ + MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA, + + /* All remaining >= 128-bit ephemeral suites */ + MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA, + MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA, + MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA, + + /* The PSK ephemeral suites */ + MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM, + MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384, + MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384, + MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8, + + MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM, + MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8, + + MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA, + MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA, + + /* The ECJPAKE suite */ + MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8, + + /* All AES-256 suites */ + MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_RSA_WITH_AES_256_CCM, + MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256, + MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8, + + /* All CAMELLIA-256 suites */ + MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256, + MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA, + MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384, + MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384, + + /* All AES-128 suites */ + MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_RSA_WITH_AES_128_CCM, + MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8, + + /* All CAMELLIA-128 suites */ + MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA, + MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256, + + /* All remaining >= 128-bit suites */ + MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA, + MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA, + MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA, + + /* The RSA PSK suites */ + MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384, + + MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256, + + MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA, + + /* The PSK suites */ + MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384, + MBEDTLS_TLS_PSK_WITH_AES_256_CCM, + MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384, + MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA, + MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384, + MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384, + MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8, + + MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_PSK_WITH_AES_128_CCM, + MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256, + MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA, + MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256, + MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256, + MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8, + + MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA, + + /* RC4 suites */ + MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA, + MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA, + MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA, + MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA, + MBEDTLS_TLS_RSA_WITH_RC4_128_SHA, + MBEDTLS_TLS_RSA_WITH_RC4_128_MD5, + MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA, + MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA, + MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA, + MBEDTLS_TLS_PSK_WITH_RC4_128_SHA, + + /* Weak suites */ + MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA, + MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA, + + /* NULL suites */ + MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA, + MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA, + MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384, + MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256, + MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA, + MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384, + MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256, + MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA, + + MBEDTLS_TLS_RSA_WITH_NULL_SHA256, + MBEDTLS_TLS_RSA_WITH_NULL_SHA, + MBEDTLS_TLS_RSA_WITH_NULL_MD5, + MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA, + MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA, + MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384, + MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256, + MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA, + MBEDTLS_TLS_PSK_WITH_NULL_SHA384, + MBEDTLS_TLS_PSK_WITH_NULL_SHA256, + MBEDTLS_TLS_PSK_WITH_NULL_SHA, + +#endif /* MBEDTLS_SSL_CIPHERSUITES */ + 0 +}; + +static const mbedtls_ssl_ciphersuite_t ciphersuite_definitions[] ICACHE_RODATA_ATTR STORE_ATTR = +{ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_SHA1_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA, "TLS-ECDHE-ECDSA-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA, "TLS-ECDHE-ECDSA-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_SHA1_C */ +#if defined(MBEDTLS_SHA256_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256, "TLS-ECDHE-ECDSA-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256, "TLS-ECDHE-ECDSA-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384, "TLS-ECDHE-ECDSA-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384, "TLS-ECDHE-ECDSA-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA512_C */ +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM, "TLS-ECDHE-ECDSA-WITH-AES-256-CCM", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8, "TLS-ECDHE-ECDSA-WITH-AES-256-CCM-8", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM, "TLS-ECDHE-ECDSA-WITH-AES-128-CCM", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8, "TLS-ECDHE-ECDSA-WITH-AES-128-CCM-8", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, +#endif /* MBEDTLS_CCM_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256, "TLS-ECDHE-ECDSA-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384, "TLS-ECDHE-ECDSA-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256, "TLS-ECDHE-ECDSA-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384, "TLS-ECDHE-ECDSA-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA, "TLS-ECDHE-ECDSA-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA, "TLS-ECDHE-ECDSA-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA, "TLS-ECDHE-ECDSA-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_SHA1_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA, "TLS-ECDHE-RSA-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA, "TLS-ECDHE-RSA-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_SHA1_C */ +#if defined(MBEDTLS_SHA256_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256, "TLS-ECDHE-RSA-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256, "TLS-ECDHE-RSA-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384, "TLS-ECDHE-RSA-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384, "TLS-ECDHE-RSA-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256, "TLS-ECDHE-RSA-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384, "TLS-ECDHE-RSA-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256, "TLS-ECDHE-RSA-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384, "TLS-ECDHE-RSA-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA, "TLS-ECDHE-RSA-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA, "TLS-ECDHE-RSA-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA, "TLS-ECDHE-RSA-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_SHA512_C) && defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384, "TLS-DHE-RSA-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C && MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_SHA256_C) +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256, "TLS-DHE-RSA-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256, "TLS-DHE-RSA-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256, "TLS-DHE-RSA-WITH-AES-256-CBC-SHA256", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA, "TLS-DHE-RSA-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA, "TLS-DHE-RSA-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM, "TLS-DHE-RSA-WITH-AES-256-CCM", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8, "TLS-DHE-RSA-WITH-AES-256-CCM-8", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, + { MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM, "TLS-DHE-RSA-WITH-AES-128-CCM", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8, "TLS-DHE-RSA-WITH-AES-128-CCM-8", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, +#endif /* MBEDTLS_CCM_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256, "TLS-DHE-RSA-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256, "TLS-DHE-RSA-WITH-CAMELLIA-256-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA, "TLS-DHE-RSA-WITH-CAMELLIA-128-CBC-SHA", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA, "TLS-DHE-RSA-WITH-CAMELLIA-256-CBC-SHA", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256, "TLS-DHE-RSA-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384, "TLS-DHE-RSA-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA, "TLS-DHE-RSA-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_SHA512_C) && defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384, "TLS-RSA-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C && MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_SHA256_C) +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256, "TLS-RSA-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256, "TLS-RSA-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256, "TLS-RSA-WITH-AES-256-CBC-SHA256", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA1_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA, "TLS-RSA-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA, "TLS-RSA-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_SHA1_C */ +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_TLS_RSA_WITH_AES_256_CCM, "TLS-RSA-WITH-AES-256-CCM", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8, "TLS-RSA-WITH-AES-256-CCM-8", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, + { MBEDTLS_TLS_RSA_WITH_AES_128_CCM, "TLS-RSA-WITH-AES-128-CCM", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8, "TLS-RSA-WITH-AES-128-CCM-8", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, +#endif /* MBEDTLS_CCM_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256, "TLS-RSA-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256, "TLS-RSA-WITH-CAMELLIA-256-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA, "TLS-RSA-WITH-CAMELLIA-128-CBC-SHA", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA, "TLS-RSA-WITH-CAMELLIA-256-CBC-SHA", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256, "TLS-RSA-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384, "TLS-RSA-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA, "TLS-RSA-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_MD5_C) + { MBEDTLS_TLS_RSA_WITH_RC4_128_MD5, "TLS-RSA-WITH-RC4-128-MD5", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_MD5, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_WITH_RC4_128_SHA, "TLS-RSA-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif +#endif /* MBEDTLS_ARC4_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_SHA1_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA, "TLS-ECDH-RSA-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA, "TLS-ECDH-RSA-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_SHA1_C */ +#if defined(MBEDTLS_SHA256_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256, "TLS-ECDH-RSA-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256, "TLS-ECDH-RSA-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384, "TLS-ECDH-RSA-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384, "TLS-ECDH-RSA-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256, "TLS-ECDH-RSA-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384, "TLS-ECDH-RSA-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256, "TLS-ECDH-RSA-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384, "TLS-ECDH-RSA-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA, "TLS-ECDH-RSA-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA, "TLS-ECDH-RSA-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA, "TLS-ECDH-RSA-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ +#endif /* MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_SHA1_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA, "TLS-ECDH-ECDSA-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA, "TLS-ECDH-ECDSA-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_SHA1_C */ +#if defined(MBEDTLS_SHA256_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256, "TLS-ECDH-ECDSA-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256, "TLS-ECDH-ECDSA-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384, "TLS-ECDH-ECDSA-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384, "TLS-ECDH-ECDSA-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256, "TLS-ECDH-ECDSA-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384, "TLS-ECDH-ECDSA-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256, "TLS-ECDH-ECDSA-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384, "TLS-ECDH-ECDSA-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA, "TLS-ECDH-ECDSA-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA, "TLS-ECDH-ECDSA-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA, "TLS-ECDH-ECDSA-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ +#endif /* MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256, "TLS-PSK-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384, "TLS-PSK-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256, "TLS-PSK-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384, "TLS-PSK-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA, "TLS-PSK-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA, "TLS-PSK-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_TLS_PSK_WITH_AES_256_CCM, "TLS-PSK-WITH-AES-256-CCM", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8, "TLS-PSK-WITH-AES-256-CCM-8", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, + { MBEDTLS_TLS_PSK_WITH_AES_128_CCM, "TLS-PSK-WITH-AES-128-CCM", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8, "TLS-PSK-WITH-AES-128-CCM-8", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, +#endif /* MBEDTLS_CCM_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256, "TLS-PSK-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384, "TLS-PSK-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256, "TLS-PSK-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384, "TLS-PSK-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA, "TLS-PSK-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_PSK_WITH_RC4_128_SHA, "TLS-PSK-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256, "TLS-DHE-PSK-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384, "TLS-DHE-PSK-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256, "TLS-DHE-PSK-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384, "TLS-DHE-PSK-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA, "TLS-DHE-PSK-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA, "TLS-DHE-PSK-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM, "TLS-DHE-PSK-WITH-AES-256-CCM", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8, "TLS-DHE-PSK-WITH-AES-256-CCM-8", + MBEDTLS_CIPHER_AES_256_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, + { MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM, "TLS-DHE-PSK-WITH-AES-128-CCM", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + { MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8, "TLS-DHE-PSK-WITH-AES-128-CCM-8", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, +#endif /* MBEDTLS_CCM_C */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256, "TLS-DHE-PSK-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384, "TLS-DHE-PSK-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256, "TLS-DHE-PSK-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384, "TLS-DHE-PSK-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA, "TLS-DHE-PSK-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA, "TLS-DHE-PSK-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) +#if defined(MBEDTLS_AES_C) + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256, "TLS-ECDHE-PSK-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384, "TLS-ECDHE-PSK-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA, "TLS-ECDHE-PSK-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA, "TLS-ECDHE-PSK-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256, "TLS-ECDHE-PSK-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384, "TLS-ECDHE-PSK-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA, "TLS-ECDHE-PSK-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA, "TLS-ECDHE-PSK-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256, "TLS-RSA-PSK-WITH-AES-128-GCM-SHA256", + MBEDTLS_CIPHER_AES_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384, "TLS-RSA-PSK-WITH-AES-256-GCM-SHA384", + MBEDTLS_CIPHER_AES_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256, "TLS-RSA-PSK-WITH-AES-128-CBC-SHA256", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384, "TLS-RSA-PSK-WITH-AES-256-CBC-SHA384", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA, "TLS-RSA-PSK-WITH-AES-128-CBC-SHA", + MBEDTLS_CIPHER_AES_128_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, + + { MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA, "TLS-RSA-PSK-WITH-AES-256-CBC-SHA", + MBEDTLS_CIPHER_AES_256_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_AES_C */ + +#if defined(MBEDTLS_CAMELLIA_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256, "TLS-RSA-PSK-WITH-CAMELLIA-128-CBC-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_CBC, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384, "TLS-RSA-PSK-WITH-CAMELLIA-256-CBC-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_CBC, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + +#if defined(MBEDTLS_GCM_C) +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256, "TLS-RSA-PSK-WITH-CAMELLIA-128-GCM-SHA256", + MBEDTLS_CIPHER_CAMELLIA_128_GCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384, "TLS-RSA-PSK-WITH-CAMELLIA-256-GCM-SHA384", + MBEDTLS_CIPHER_CAMELLIA_256_GCM, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_GCM_C */ +#endif /* MBEDTLS_CAMELLIA_C */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA, "TLS-RSA-PSK-WITH-3DES-EDE-CBC-SHA", + MBEDTLS_CIPHER_DES_EDE3_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + 0 }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ + +#if defined(MBEDTLS_ARC4_C) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA, "TLS-RSA-PSK-WITH-RC4-128-SHA", + MBEDTLS_CIPHER_ARC4_128, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_NODTLS }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_ARC4_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +#if defined(MBEDTLS_AES_C) +#if defined(MBEDTLS_CCM_C) + { MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8, "TLS-ECJPAKE-WITH-AES-128-CCM-8", + MBEDTLS_CIPHER_AES_128_CCM, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECJPAKE, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_SHORT_TAG }, +#endif /* MBEDTLS_CCM_C */ +#endif /* MBEDTLS_AES_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_ENABLE_WEAK_CIPHERSUITES) +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) +#if defined(MBEDTLS_MD5_C) + { MBEDTLS_TLS_RSA_WITH_NULL_MD5, "TLS-RSA-WITH-NULL-MD5", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_MD5, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif + +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_WITH_NULL_SHA, "TLS-RSA-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif + +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_WITH_NULL_SHA256, "TLS-RSA-WITH-NULL-SHA256", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_PSK_WITH_NULL_SHA, "TLS-PSK-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ + +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_PSK_WITH_NULL_SHA256, "TLS-PSK-WITH-NULL-SHA256", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_PSK_WITH_NULL_SHA384, "TLS-PSK-WITH-NULL-SHA384", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif +#endif /* MBEDTLS_KEY_EXCHANGE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA, "TLS-DHE-PSK-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ + +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256, "TLS-DHE-PSK-WITH-NULL-SHA256", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384, "TLS-DHE-PSK-WITH-NULL-SHA384", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_DHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA, "TLS-ECDHE-PSK-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ + +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256, "TLS-ECDHE-PSK-WITH-NULL-SHA256", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384, "TLS-ECDHE-PSK-WITH-NULL-SHA384", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_ECDHE_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA, "TLS-RSA-PSK-WITH-NULL-SHA", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ + +#if defined(MBEDTLS_SHA256_C) + { MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256, "TLS-RSA-PSK-WITH-NULL-SHA256", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA256, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif + +#if defined(MBEDTLS_SHA512_C) + { MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384, "TLS-RSA-PSK-WITH-NULL-SHA384", + MBEDTLS_CIPHER_NULL, MBEDTLS_MD_SHA384, MBEDTLS_KEY_EXCHANGE_RSA_PSK, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_1, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ + +#if defined(MBEDTLS_DES_C) +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA, "TLS-DHE-RSA-WITH-DES-CBC-SHA", + MBEDTLS_CIPHER_DES_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_DHE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) +#if defined(MBEDTLS_SHA1_C) + { MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA, "TLS-RSA-WITH-DES-CBC-SHA", + MBEDTLS_CIPHER_DES_CBC, MBEDTLS_MD_SHA1, MBEDTLS_KEY_EXCHANGE_RSA, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_0, + MBEDTLS_SSL_MAJOR_VERSION_3, MBEDTLS_SSL_MINOR_VERSION_3, + MBEDTLS_CIPHERSUITE_WEAK }, +#endif /* MBEDTLS_SHA1_C */ +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */ +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* MBEDTLS_DES_C */ +#endif /* MBEDTLS_ENABLE_WEAK_CIPHERSUITES */ + + { 0, "", + MBEDTLS_CIPHER_NONE, MBEDTLS_MD_NONE, MBEDTLS_KEY_EXCHANGE_NONE, + 0, 0, 0, 0, 0 } +}; + +#if defined(MBEDTLS_SSL_CIPHERSUITES) +const int *mbedtls_ssl_list_ciphersuites( void ) +{ + return( ciphersuite_preference ); +} +#else +#define MAX_CIPHERSUITES sizeof( ciphersuite_definitions ) / \ + sizeof( ciphersuite_definitions[0] ) +static int supported_ciphersuites[MAX_CIPHERSUITES]; +static int supported_init = 0; + +const int *mbedtls_ssl_list_ciphersuites( void ) +{ + /* + * On initial call filter out all ciphersuites not supported by current + * build based on presence in the ciphersuite_definitions. + */ + if( supported_init == 0 ) + { + const int *p; + int *q; + + for( p = ciphersuite_preference, q = supported_ciphersuites; + *p != 0 && q < supported_ciphersuites + MAX_CIPHERSUITES - 1; + p++ ) + { +#if defined(MBEDTLS_REMOVE_ARC4_CIPHERSUITES) + const mbedtls_ssl_ciphersuite_t *cs_info; + if( ( cs_info = mbedtls_ssl_ciphersuite_from_id( *p ) ) != NULL && + cs_info->cipher != MBEDTLS_CIPHER_ARC4_128 ) +#else + if( mbedtls_ssl_ciphersuite_from_id( *p ) != NULL ) +#endif + *(q++) = *p; + } + *q = 0; + + supported_init = 1; + } + + return( supported_ciphersuites ); +} +#endif /* MBEDTLS_SSL_CIPHERSUITES */ + +const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_string( + const char *ciphersuite_name ) +{ + const mbedtls_ssl_ciphersuite_t *cur = ciphersuite_definitions; + + if( NULL == ciphersuite_name ) + return( NULL ); + + while( cur->id != 0 ) + { + if( 0 == strcmp( cur->name, ciphersuite_name ) ) + return( cur ); + + cur++; + } + + return( NULL ); +} + +const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_id( int ciphersuite ) +{ + const mbedtls_ssl_ciphersuite_t *cur = ciphersuite_definitions; + + while( cur->id != 0 ) + { + if( cur->id == ciphersuite ) + return( cur ); + + cur++; + } + + return( NULL ); +} + +const char *mbedtls_ssl_get_ciphersuite_name( const int ciphersuite_id ) +{ + const mbedtls_ssl_ciphersuite_t *cur; + + cur = mbedtls_ssl_ciphersuite_from_id( ciphersuite_id ); + + if( cur == NULL ) + return( "unknown" ); + + return( cur->name ); +} + +int mbedtls_ssl_get_ciphersuite_id( const char *ciphersuite_name ) +{ + const mbedtls_ssl_ciphersuite_t *cur; + + cur = mbedtls_ssl_ciphersuite_from_string( ciphersuite_name ); + + if( cur == NULL ) + return( 0 ); + + return( cur->id ); +} + +#if defined(MBEDTLS_PK_C) +mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_pk_alg( const mbedtls_ssl_ciphersuite_t *info ) +{ + switch( info->key_exchange ) + { + case MBEDTLS_KEY_EXCHANGE_RSA: + case MBEDTLS_KEY_EXCHANGE_DHE_RSA: + case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA: + case MBEDTLS_KEY_EXCHANGE_RSA_PSK: + return( MBEDTLS_PK_RSA ); + + case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA: + return( MBEDTLS_PK_ECDSA ); + + case MBEDTLS_KEY_EXCHANGE_ECDH_RSA: + case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA: + return( MBEDTLS_PK_ECKEY ); + + default: + return( MBEDTLS_PK_NONE ); + } +} +#endif /* MBEDTLS_PK_C */ + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) +int mbedtls_ssl_ciphersuite_uses_ec( const mbedtls_ssl_ciphersuite_t *info ) +{ + switch( info->key_exchange ) + { + case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA: + case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA: + case MBEDTLS_KEY_EXCHANGE_ECDHE_PSK: + case MBEDTLS_KEY_EXCHANGE_ECDH_RSA: + case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA: + return( 1 ); + + default: + return( 0 ); + } +} +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C */ + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) +int mbedtls_ssl_ciphersuite_uses_psk( const mbedtls_ssl_ciphersuite_t *info ) +{ + switch( info->key_exchange ) + { + case MBEDTLS_KEY_EXCHANGE_PSK: + case MBEDTLS_KEY_EXCHANGE_RSA_PSK: + case MBEDTLS_KEY_EXCHANGE_DHE_PSK: + case MBEDTLS_KEY_EXCHANGE_ECDHE_PSK: + return( 1 ); + + default: + return( 0 ); + } +} +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ + +#endif /* MBEDTLS_SSL_TLS_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cli.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cli.c new file mode 100644 index 0000000..a04368a --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cli.c @@ -0,0 +1,3396 @@ +/* + * SSLv3/TLSv1 client-side functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SSL_CLI_C) + +#include "mbedtls/debug.h" +#include "mbedtls/ssl.h" +#include "mbedtls/ssl_internal.h" + +#include + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#include + +#if defined(MBEDTLS_HAVE_TIME) +#include +#endif + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} +#endif + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) +static void ssl_write_hostname_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + size_t hostname_len; + + *olen = 0; + + if( ssl->hostname == NULL ) + return; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding server name extension: %s", + ssl->hostname ) ); + + hostname_len = strlen( ssl->hostname ); + + if( end < p || (size_t)( end - p ) < hostname_len + 9 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + /* + * struct { + * NameType name_type; + * select (name_type) { + * case host_name: HostName; + * } name; + * } ServerName; + * + * enum { + * host_name(0), (255) + * } NameType; + * + * opaque HostName<1..2^16-1>; + * + * struct { + * ServerName server_name_list<1..2^16-1> + * } ServerNameList; + */ + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SERVERNAME >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SERVERNAME ) & 0xFF ); + + *p++ = (unsigned char)( ( (hostname_len + 5) >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( (hostname_len + 5) ) & 0xFF ); + + *p++ = (unsigned char)( ( (hostname_len + 3) >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( (hostname_len + 3) ) & 0xFF ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME ) & 0xFF ); + *p++ = (unsigned char)( ( hostname_len >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( hostname_len ) & 0xFF ); + + memcpy( p, ssl->hostname, hostname_len ); + + *olen = hostname_len + 9; +} +#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */ + +#if defined(MBEDTLS_SSL_RENEGOTIATION) +static void ssl_write_renegotiation_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + + *olen = 0; + + if( ssl->renego_status != MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + return; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding renegotiation extension" ) ); + + if( end < p || (size_t)( end - p ) < 5 + ssl->verify_data_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + /* + * Secure renegotiation + */ + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_RENEGOTIATION_INFO >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_RENEGOTIATION_INFO ) & 0xFF ); + + *p++ = 0x00; + *p++ = ( ssl->verify_data_len + 1 ) & 0xFF; + *p++ = ssl->verify_data_len & 0xFF; + + memcpy( p, ssl->own_verify_data, ssl->verify_data_len ); + + *olen = 5 + ssl->verify_data_len; +} +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + +/* + * Only if we handle at least one key exchange that needs signatures. + */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \ + defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +static void ssl_write_signature_algorithms_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + size_t sig_alg_len = 0; + const int *md; +#if defined(MBEDTLS_RSA_C) || defined(MBEDTLS_ECDSA_C) + unsigned char *sig_alg_list = buf + 6; +#endif + + *olen = 0; + + if( ssl->conf->max_minor_ver != MBEDTLS_SSL_MINOR_VERSION_3 ) + return; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding signature_algorithms extension" ) ); + + for( md = ssl->conf->sig_hashes; *md != MBEDTLS_MD_NONE; md++ ) + { +#if defined(MBEDTLS_ECDSA_C) + sig_alg_len += 2; +#endif +#if defined(MBEDTLS_RSA_C) + sig_alg_len += 2; +#endif + } + + if( end < p || (size_t)( end - p ) < sig_alg_len + 6 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + /* + * Prepare signature_algorithms extension (TLS 1.2) + */ + sig_alg_len = 0; + + for( md = ssl->conf->sig_hashes; *md != MBEDTLS_MD_NONE; md++ ) + { +#if defined(MBEDTLS_ECDSA_C) + sig_alg_list[sig_alg_len++] = mbedtls_ssl_hash_from_md_alg( *md ); + sig_alg_list[sig_alg_len++] = MBEDTLS_SSL_SIG_ECDSA; +#endif +#if defined(MBEDTLS_RSA_C) + sig_alg_list[sig_alg_len++] = mbedtls_ssl_hash_from_md_alg( *md ); + sig_alg_list[sig_alg_len++] = MBEDTLS_SSL_SIG_RSA; +#endif + } + + /* + * enum { + * none(0), md5(1), sha1(2), sha224(3), sha256(4), sha384(5), + * sha512(6), (255) + * } HashAlgorithm; + * + * enum { anonymous(0), rsa(1), dsa(2), ecdsa(3), (255) } + * SignatureAlgorithm; + * + * struct { + * HashAlgorithm hash; + * SignatureAlgorithm signature; + * } SignatureAndHashAlgorithm; + * + * SignatureAndHashAlgorithm + * supported_signature_algorithms<2..2^16-2>; + */ + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SIG_ALG >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SIG_ALG ) & 0xFF ); + + *p++ = (unsigned char)( ( ( sig_alg_len + 2 ) >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( ( sig_alg_len + 2 ) ) & 0xFF ); + + *p++ = (unsigned char)( ( sig_alg_len >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( sig_alg_len ) & 0xFF ); + + *olen = 6 + sig_alg_len; +} +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 && + MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */ + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static void ssl_write_supported_elliptic_curves_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + unsigned char *elliptic_curve_list = p + 6; + size_t elliptic_curve_len = 0; + const mbedtls_ecp_curve_info *info; +#if defined(MBEDTLS_ECP_C) + const mbedtls_ecp_group_id *grp_id; +#else + ((void) ssl); +#endif + + *olen = 0; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding supported_elliptic_curves extension" ) ); + +#if defined(MBEDTLS_ECP_C) + for( grp_id = ssl->conf->curve_list; *grp_id != MBEDTLS_ECP_DP_NONE; grp_id++ ) + { + info = mbedtls_ecp_curve_info_from_grp_id( *grp_id ); +#else + for( info = mbedtls_ecp_curve_list(); info->grp_id != MBEDTLS_ECP_DP_NONE; info++ ) + { +#endif + elliptic_curve_len += 2; + } + + if( end < p || (size_t)( end - p ) < 6 + elliptic_curve_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + elliptic_curve_len = 0; + +#if defined(MBEDTLS_ECP_C) + for( grp_id = ssl->conf->curve_list; *grp_id != MBEDTLS_ECP_DP_NONE; grp_id++ ) + { + info = mbedtls_ecp_curve_info_from_grp_id( *grp_id ); +#else + for( info = mbedtls_ecp_curve_list(); info->grp_id != MBEDTLS_ECP_DP_NONE; info++ ) + { +#endif + + elliptic_curve_list[elliptic_curve_len++] = info->tls_id >> 8; + elliptic_curve_list[elliptic_curve_len++] = info->tls_id & 0xFF; + } + + if( elliptic_curve_len == 0 ) + return; + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES ) & 0xFF ); + + *p++ = (unsigned char)( ( ( elliptic_curve_len + 2 ) >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( ( elliptic_curve_len + 2 ) ) & 0xFF ); + + *p++ = (unsigned char)( ( ( elliptic_curve_len ) >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( ( elliptic_curve_len ) ) & 0xFF ); + + *olen = 6 + elliptic_curve_len; +} + +static void ssl_write_supported_point_formats_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + + *olen = 0; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding supported_point_formats extension" ) ); + + if( end < p || (size_t)( end - p ) < 6 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS ) & 0xFF ); + + *p++ = 0x00; + *p++ = 2; + + *p++ = 1; + *p++ = MBEDTLS_ECP_PF_UNCOMPRESSED; + + *olen = 6; +} +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C || + MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static void ssl_write_ecjpake_kkpp_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + int ret; + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + size_t kkpp_len; + + *olen = 0; + + /* Skip costly extension if we can't use EC J-PAKE anyway */ + if( mbedtls_ecjpake_check( &ssl->handshake->ecjpake_ctx ) != 0 ) + return; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding ecjpake_kkpp extension" ) ); + + if( end - p < 4 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ECJPAKE_KKPP >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ECJPAKE_KKPP ) & 0xFF ); + + /* + * We may need to send ClientHello multiple times for Hello verification. + * We don't want to compute fresh values every time (both for performance + * and consistency reasons), so cache the extension content. + */ + if( ssl->handshake->ecjpake_cache == NULL || + ssl->handshake->ecjpake_cache_len == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "generating new ecjpake parameters" ) ); + + ret = mbedtls_ecjpake_write_round_one( &ssl->handshake->ecjpake_ctx, + p + 2, end - p - 2, &kkpp_len, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1 , "mbedtls_ecjpake_write_round_one", ret ); + return; + } + + ssl->handshake->ecjpake_cache = mbedtls_calloc( 1, kkpp_len ); + if( ssl->handshake->ecjpake_cache == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "allocation failed" ) ); + return; + } + + memcpy( ssl->handshake->ecjpake_cache, p + 2, kkpp_len ); + ssl->handshake->ecjpake_cache_len = kkpp_len; + } + else + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "re-using cached ecjpake parameters" ) ); + + kkpp_len = ssl->handshake->ecjpake_cache_len; + + if( (size_t)( end - p - 2 ) < kkpp_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + memcpy( p + 2, ssl->handshake->ecjpake_cache, kkpp_len ); + } + + *p++ = (unsigned char)( ( kkpp_len >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( kkpp_len ) & 0xFF ); + + *olen = kkpp_len + 4; +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +static void ssl_write_max_fragment_length_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + + *olen = 0; + + if( ssl->conf->mfl_code == MBEDTLS_SSL_MAX_FRAG_LEN_NONE ) { + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding max_fragment_length extension" ) ); + + if( end < p || (size_t)( end - p ) < 5 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH ) & 0xFF ); + + *p++ = 0x00; + *p++ = 1; + + *p++ = ssl->conf->mfl_code; + + *olen = 5; +} +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) +static void ssl_write_truncated_hmac_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + + *olen = 0; + + if( ssl->conf->trunc_hmac == MBEDTLS_SSL_TRUNC_HMAC_DISABLED ) + { + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding truncated_hmac extension" ) ); + + if( end < p || (size_t)( end - p ) < 4 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_TRUNCATED_HMAC >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_TRUNCATED_HMAC ) & 0xFF ); + + *p++ = 0x00; + *p++ = 0x00; + + *olen = 4; +} +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) +static void ssl_write_encrypt_then_mac_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + + *olen = 0; + + if( ssl->conf->encrypt_then_mac == MBEDTLS_SSL_ETM_DISABLED || + ssl->conf->max_minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding encrypt_then_mac " + "extension" ) ); + + if( end < p || (size_t)( end - p ) < 4 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC ) & 0xFF ); + + *p++ = 0x00; + *p++ = 0x00; + + *olen = 4; +} +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) +static void ssl_write_extended_ms_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + + *olen = 0; + + if( ssl->conf->extended_ms == MBEDTLS_SSL_EXTENDED_MS_DISABLED || + ssl->conf->max_minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding extended_master_secret " + "extension" ) ); + + if( end < p || (size_t)( end - p ) < 4 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET ) & 0xFF ); + + *p++ = 0x00; + *p++ = 0x00; + + *olen = 4; +} +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +static void ssl_write_session_ticket_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + size_t tlen = ssl->session_negotiate->ticket_len; + + *olen = 0; + + if( ssl->conf->session_tickets == MBEDTLS_SSL_SESSION_TICKETS_DISABLED ) + { + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding session ticket extension" ) ); + + if( end < p || (size_t)( end - p ) < 4 + tlen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SESSION_TICKET >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SESSION_TICKET ) & 0xFF ); + + *p++ = (unsigned char)( ( tlen >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( tlen ) & 0xFF ); + + *olen = 4; + + if( ssl->session_negotiate->ticket == NULL || tlen == 0 ) + { + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "sending session ticket of length %d", tlen ) ); + + memcpy( p, ssl->session_negotiate->ticket, tlen ); + + *olen += tlen; +} +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(MBEDTLS_SSL_ALPN) +static void ssl_write_alpn_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, size_t *olen ) +{ + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + size_t alpnlen = 0; + const char **cur; + + *olen = 0; + + if( ssl->conf->alpn_list == NULL ) + { + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, adding alpn extension" ) ); + + for( cur = ssl->conf->alpn_list; *cur != NULL; cur++ ) + alpnlen += (unsigned char)( strlen( *cur ) & 0xFF ) + 1; + + if( end < p || (size_t)( end - p ) < 6 + alpnlen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ALPN >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ALPN ) & 0xFF ); + + /* + * opaque ProtocolName<1..2^8-1>; + * + * struct { + * ProtocolName protocol_name_list<2..2^16-1> + * } ProtocolNameList; + */ + + /* Skip writing extension and list length for now */ + p += 4; + + for( cur = ssl->conf->alpn_list; *cur != NULL; cur++ ) + { + *p = (unsigned char)( strlen( *cur ) & 0xFF ); + memcpy( p + 1, *cur, *p ); + p += 1 + *p; + } + + *olen = p - buf; + + /* List length = olen - 2 (ext_type) - 2 (ext_len) - 2 (list_len) */ + buf[4] = (unsigned char)( ( ( *olen - 6 ) >> 8 ) & 0xFF ); + buf[5] = (unsigned char)( ( ( *olen - 6 ) ) & 0xFF ); + + /* Extension length = olen - 2 (ext_type) - 2 (ext_len) */ + buf[2] = (unsigned char)( ( ( *olen - 4 ) >> 8 ) & 0xFF ); + buf[3] = (unsigned char)( ( ( *olen - 4 ) ) & 0xFF ); +} +#endif /* MBEDTLS_SSL_ALPN */ + +/* + * Generate random bytes for ClientHello + */ +static int ssl_generate_random( mbedtls_ssl_context *ssl ) +{ + int ret; + unsigned char *p = ssl->handshake->randbytes; +#if defined(MBEDTLS_HAVE_TIME) + time_t t; +#endif + + /* + * When responding to a verify request, MUST reuse random (RFC 6347 4.2.1) + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake->verify_cookie != NULL ) + { + return( 0 ); + } +#endif + +#if defined(MBEDTLS_HAVE_TIME) + t = time( NULL ); + *p++ = (unsigned char)( t >> 24 ); + *p++ = (unsigned char)( t >> 16 ); + *p++ = (unsigned char)( t >> 8 ); + *p++ = (unsigned char)( t ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, current time: %lu", t ) ); +#else + if( ( ret = ssl->conf->f_rng( ssl->conf->p_rng, p, 4 ) ) != 0 ) + return( ret ); + + p += 4; +#endif /* MBEDTLS_HAVE_TIME */ + + if( ( ret = ssl->conf->f_rng( ssl->conf->p_rng, p, 28 ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +static int ssl_write_client_hello( mbedtls_ssl_context *ssl ) +{ + int ret; + size_t i, n, olen, ext_len = 0; + unsigned char *buf; + unsigned char *p, *q; + unsigned char offer_compress; + const int *ciphersuites; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write client hello" ) ); + + if( ssl->conf->f_rng == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "no RNG provided") ); + return( MBEDTLS_ERR_SSL_NO_RNG ); + } + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_INITIAL_HANDSHAKE ) +#endif + { + ssl->major_ver = ssl->conf->min_major_ver; + ssl->minor_ver = ssl->conf->min_minor_ver; + } + + if( ssl->conf->max_major_ver == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "configured max major version is invalid, " + "consider using mbedtls_ssl_config_defaults()" ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + /* + * 0 . 0 handshake type + * 1 . 3 handshake length + * 4 . 5 highest version supported + * 6 . 9 current UNIX time + * 10 . 37 random bytes + */ + buf = ssl->out_msg; + p = buf + 4; + + mbedtls_ssl_write_version( ssl->conf->max_major_ver, ssl->conf->max_minor_ver, + ssl->conf->transport, p ); + p += 2; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, max version: [%d:%d]", + buf[4], buf[5] ) ); + + if( ( ret = ssl_generate_random( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_generate_random", ret ); + return( ret ); + } + + memcpy( p, ssl->handshake->randbytes, 32 ); + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, random bytes", p, 32 ); + p += 32; + + /* + * 38 . 38 session id length + * 39 . 39+n session id + * 39+n . 39+n DTLS only: cookie length (1 byte) + * 40+n . .. DTSL only: cookie + * .. . .. ciphersuitelist length (2 bytes) + * .. . .. ciphersuitelist + * .. . .. compression methods length (1 byte) + * .. . .. compression methods + * .. . .. extensions length (2 bytes) + * .. . .. extensions + */ + n = ssl->session_negotiate->id_len; + + if( n < 16 || n > 32 || +#if defined(MBEDTLS_SSL_RENEGOTIATION) + ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE || +#endif + ssl->handshake->resume == 0 ) + { + n = 0; + } + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + /* + * RFC 5077 section 3.4: "When presenting a ticket, the client MAY + * generate and include a Session ID in the TLS ClientHello." + */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_INITIAL_HANDSHAKE ) +#endif + { + if( ssl->session_negotiate->ticket != NULL && + ssl->session_negotiate->ticket_len != 0 ) + { + ret = ssl->conf->f_rng( ssl->conf->p_rng, ssl->session_negotiate->id, 32 ); + + if( ret != 0 ) + return( ret ); + + ssl->session_negotiate->id_len = n = 32; + } + } +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + + *p++ = (unsigned char) n; + + for( i = 0; i < n; i++ ) + *p++ = ssl->session_negotiate->id[i]; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, session id len.: %d", n ) ); + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, session id", buf + 39, n ); + + /* + * DTLS cookie + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + if( ssl->handshake->verify_cookie == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "no verify cookie to send" ) ); + *p++ = 0; + } + else + { + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, cookie", + ssl->handshake->verify_cookie, + ssl->handshake->verify_cookie_len ); + + *p++ = ssl->handshake->verify_cookie_len; + memcpy( p, ssl->handshake->verify_cookie, + ssl->handshake->verify_cookie_len ); + p += ssl->handshake->verify_cookie_len; + } + } +#endif + + /* + * Ciphersuite list + */ + ciphersuites = ssl->conf->ciphersuite_list[ssl->minor_ver]; + + /* Skip writing ciphersuite length for now */ + n = 0; + q = p; + p += 2; + + for( i = 0; ciphersuites[i] != 0; i++ ) + { + ciphersuite_info = mbedtls_ssl_ciphersuite_from_id( ciphersuites[i] ); + + if( ciphersuite_info == NULL ) + continue; + + if( ciphersuite_info->min_minor_ver > ssl->conf->max_minor_ver || + ciphersuite_info->max_minor_ver < ssl->conf->min_minor_ver ) + continue; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ( ciphersuite_info->flags & MBEDTLS_CIPHERSUITE_NODTLS ) ) + continue; +#endif + +#if defined(MBEDTLS_ARC4_C) + if( ssl->conf->arc4_disabled == MBEDTLS_SSL_ARC4_DISABLED && + ciphersuite_info->cipher == MBEDTLS_CIPHER_ARC4_128 ) + continue; +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE && + mbedtls_ecjpake_check( &ssl->handshake->ecjpake_ctx ) != 0 ) + continue; +#endif + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, add ciphersuite: %04x", + ciphersuites[i] ) ); + + n++; + *p++ = (unsigned char)( ciphersuites[i] >> 8 ); + *p++ = (unsigned char)( ciphersuites[i] ); + } + + /* + * Add TLS_EMPTY_RENEGOTIATION_INFO_SCSV + */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_INITIAL_HANDSHAKE ) +#endif + { + *p++ = (unsigned char)( MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO >> 8 ); + *p++ = (unsigned char)( MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO ); + n++; + } + + /* Some versions of OpenSSL don't handle it correctly if not at end */ +#if defined(MBEDTLS_SSL_FALLBACK_SCSV) + if( ssl->conf->fallback == MBEDTLS_SSL_IS_FALLBACK ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "adding FALLBACK_SCSV" ) ); + *p++ = (unsigned char)( MBEDTLS_SSL_FALLBACK_SCSV_VALUE >> 8 ); + *p++ = (unsigned char)( MBEDTLS_SSL_FALLBACK_SCSV_VALUE ); + n++; + } +#endif + + *q++ = (unsigned char)( n >> 7 ); + *q++ = (unsigned char)( n << 1 ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, got %d ciphersuites", n ) ); + +#if defined(MBEDTLS_ZLIB_SUPPORT) + offer_compress = 1; +#else + offer_compress = 0; +#endif + + /* + * We don't support compression with DTLS right now: is many records come + * in the same datagram, uncompressing one could overwrite the next one. + * We don't want to add complexity for handling that case unless there is + * an actual need for it. + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + offer_compress = 0; +#endif + + if( offer_compress ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, compress len.: %d", 2 ) ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, compress alg.: %d %d", + MBEDTLS_SSL_COMPRESS_DEFLATE, MBEDTLS_SSL_COMPRESS_NULL ) ); + + *p++ = 2; + *p++ = MBEDTLS_SSL_COMPRESS_DEFLATE; + *p++ = MBEDTLS_SSL_COMPRESS_NULL; + } + else + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, compress len.: %d", 1 ) ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, compress alg.: %d", + MBEDTLS_SSL_COMPRESS_NULL ) ); + + *p++ = 1; + *p++ = MBEDTLS_SSL_COMPRESS_NULL; + } + + // First write extensions, then the total length + // +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + ssl_write_hostname_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + ssl_write_renegotiation_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \ + defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) + ssl_write_signature_algorithms_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + ssl_write_supported_elliptic_curves_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; + + ssl_write_supported_point_formats_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + ssl_write_ecjpake_kkpp_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + ssl_write_max_fragment_length_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + ssl_write_truncated_hmac_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + ssl_write_encrypt_then_mac_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + ssl_write_extended_ms_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_ALPN) + ssl_write_alpn_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + ssl_write_session_ticket_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + + /* olen unused if all extensions are disabled */ + ((void) olen); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello, total extension length: %d", + ext_len ) ); + + if( ext_len > 0 ) + { + *p++ = (unsigned char)( ( ext_len >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( ext_len ) & 0xFF ); + p += ext_len; + } + + ssl->out_msglen = p - buf; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_CLIENT_HELLO; + + ssl->state++; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + mbedtls_ssl_send_flight_completed( ssl ); +#endif + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write client hello" ) ); + + return( 0 ); +} + +static int ssl_parse_renegotiation_info( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + int ret; + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE ) + { + /* Check verify-data in constant-time. The length OTOH is no secret */ + if( len != 1 + ssl->verify_data_len * 2 || + buf[0] != ssl->verify_data_len * 2 || + mbedtls_ssl_safer_memcmp( buf + 1, + ssl->own_verify_data, ssl->verify_data_len ) != 0 || + mbedtls_ssl_safer_memcmp( buf + 1 + ssl->verify_data_len, + ssl->peer_verify_data, ssl->verify_data_len ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "non-matching renegotiation info" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + } + else +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + { + if( len != 1 || buf[0] != 0x00 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "non-zero length renegotiation info" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + ssl->secure_renegotiation = MBEDTLS_SSL_SECURE_RENEGOTIATION; + } + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +static int ssl_parse_max_fragment_length_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + /* + * server should use the extension only if we did, + * and if so the server's value should match ours (and len is always 1) + */ + if( ssl->conf->mfl_code == MBEDTLS_SSL_MAX_FRAG_LEN_NONE || + len != 1 || + buf[0] != ssl->conf->mfl_code ) + { + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + return( 0 ); +} +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) +static int ssl_parse_truncated_hmac_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( ssl->conf->trunc_hmac == MBEDTLS_SSL_TRUNC_HMAC_DISABLED || + len != 0 ) + { + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + ((void) buf); + + ssl->session_negotiate->trunc_hmac = MBEDTLS_SSL_TRUNC_HMAC_ENABLED; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) +static int ssl_parse_encrypt_then_mac_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( ssl->conf->encrypt_then_mac == MBEDTLS_SSL_ETM_DISABLED || + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 || + len != 0 ) + { + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + ((void) buf); + + ssl->session_negotiate->encrypt_then_mac = MBEDTLS_SSL_ETM_ENABLED; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) +static int ssl_parse_extended_ms_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( ssl->conf->extended_ms == MBEDTLS_SSL_EXTENDED_MS_DISABLED || + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 || + len != 0 ) + { + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + ((void) buf); + + ssl->handshake->extended_ms = MBEDTLS_SSL_EXTENDED_MS_ENABLED; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +static int ssl_parse_session_ticket_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( ssl->conf->session_tickets == MBEDTLS_SSL_SESSION_TICKETS_DISABLED || + len != 0 ) + { + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + ((void) buf); + + ssl->handshake->new_session_ticket = 1; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static int ssl_parse_supported_point_formats_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + size_t list_size; + const unsigned char *p; + + list_size = buf[0]; + if( list_size + 1 != len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + p = buf + 1; + while( list_size > 0 ) + { + if( p[0] == MBEDTLS_ECP_PF_UNCOMPRESSED || + p[0] == MBEDTLS_ECP_PF_COMPRESSED ) + { +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) + ssl->handshake->ecdh_ctx.point_format = p[0]; +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + ssl->handshake->ecjpake_ctx.point_format = p[0]; +#endif + MBEDTLS_SSL_DEBUG_MSG( 4, ( "point format selected: %d", p[0] ) ); + return( 0 ); + } + + list_size--; + p++; + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "no point format in common" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); +} +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C || + MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static int ssl_parse_ecjpake_kkpp( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + int ret; + + if( ssl->transform_negotiate->ciphersuite_info->key_exchange != + MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "skip ecjpake kkpp extension" ) ); + return( 0 ); + } + + /* If we got here, we no longer need our cached extension */ + mbedtls_free( ssl->handshake->ecjpake_cache ); + ssl->handshake->ecjpake_cache = NULL; + ssl->handshake->ecjpake_cache_len = 0; + + if( ( ret = mbedtls_ecjpake_read_round_one( &ssl->handshake->ecjpake_ctx, + buf, len ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_read_round_one", ret ); + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_SSL_ALPN) +static int ssl_parse_alpn_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ + size_t list_len, name_len; + const char **p; + + /* If we didn't send it, the server shouldn't send it */ + if( ssl->conf->alpn_list == NULL ) + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + + /* + * opaque ProtocolName<1..2^8-1>; + * + * struct { + * ProtocolName protocol_name_list<2..2^16-1> + * } ProtocolNameList; + * + * the "ProtocolNameList" MUST contain exactly one "ProtocolName" + */ + + /* Min length is 2 (list_len) + 1 (name_len) + 1 (name) */ + if( len < 4 ) + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + + list_len = ( buf[0] << 8 ) | buf[1]; + if( list_len != len - 2 ) + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + + name_len = buf[2]; + if( name_len != list_len - 1 ) + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + + /* Check that the server chosen protocol was in our list and save it */ + for( p = ssl->conf->alpn_list; *p != NULL; p++ ) + { + if( name_len == strlen( *p ) && + memcmp( buf + 3, *p, name_len ) == 0 ) + { + ssl->alpn_chosen = *p; + return( 0 ); + } + } + + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); +} +#endif /* MBEDTLS_SSL_ALPN */ + +/* + * Parse HelloVerifyRequest. Only called after verifying the HS type. + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) +static int ssl_parse_hello_verify_request( mbedtls_ssl_context *ssl ) +{ + const unsigned char *p = ssl->in_msg + mbedtls_ssl_hs_hdr_len( ssl ); + int major_ver, minor_ver; + unsigned char cookie_len; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse hello verify request" ) ); + + /* + * struct { + * ProtocolVersion server_version; + * opaque cookie<0..2^8-1>; + * } HelloVerifyRequest; + */ + MBEDTLS_SSL_DEBUG_BUF( 3, "server version", p, 2 ); + mbedtls_ssl_read_version( &major_ver, &minor_ver, ssl->conf->transport, p ); + p += 2; + + /* + * Since the RFC is not clear on this point, accept DTLS 1.0 (TLS 1.1) + * even is lower than our min version. + */ + if( major_ver < MBEDTLS_SSL_MAJOR_VERSION_3 || + minor_ver < MBEDTLS_SSL_MINOR_VERSION_2 || + major_ver > ssl->conf->max_major_ver || + minor_ver > ssl->conf->max_minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server version" ) ); + + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION ); + + return( MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION ); + } + + cookie_len = *p++; + MBEDTLS_SSL_DEBUG_BUF( 3, "cookie", p, cookie_len ); + + mbedtls_free( ssl->handshake->verify_cookie ); + + ssl->handshake->verify_cookie = mbedtls_calloc( 1, cookie_len ); + if( ssl->handshake->verify_cookie == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc failed (%d bytes)", cookie_len ) ); + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + memcpy( ssl->handshake->verify_cookie, p, cookie_len ); + ssl->handshake->verify_cookie_len = cookie_len; + + /* Start over at ClientHello */ + ssl->state = MBEDTLS_SSL_CLIENT_HELLO; + mbedtls_ssl_reset_checksum( ssl ); + + mbedtls_ssl_recv_flight_completed( ssl ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse hello verify request" ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + +static int ssl_parse_server_hello( mbedtls_ssl_context *ssl ) +{ + int ret, i; + size_t n; + size_t ext_len; + unsigned char *buf, *ext; + unsigned char comp; +#if defined(MBEDTLS_ZLIB_SUPPORT) + int accept_comp; +#endif +#if defined(MBEDTLS_SSL_RENEGOTIATION) + int renegotiation_info_seen = 0; +#endif + int handshake_failure = 0; + const mbedtls_ssl_ciphersuite_t *suite_info; +#if defined(MBEDTLS_DEBUG_C) + uint32_t t; +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse server hello" ) ); + + buf = ssl->in_msg; + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + { + ssl->renego_records_seen++; + + if( ssl->conf->renego_max_records >= 0 && + ssl->renego_records_seen > ssl->conf->renego_max_records ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "renegotiation requested, " + "but not honored by server" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "non-handshake message during renego" ) ); + return( MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO ); + } +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + if( buf[0] == MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "received hello verify request" ) ); + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse server hello" ) ); + return( ssl_parse_hello_verify_request( ssl ) ); + } + else + { + /* We made it through the verification process */ + mbedtls_free( ssl->handshake->verify_cookie ); + ssl->handshake->verify_cookie = NULL; + ssl->handshake->verify_cookie_len = 0; + } + } +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + + if( ssl->in_hslen < 38 + mbedtls_ssl_hs_hdr_len( ssl ) || + buf[0] != MBEDTLS_SSL_HS_SERVER_HELLO ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + /* + * 0 . 1 server_version + * 2 . 33 random (maybe including 4 bytes of Unix time) + * 34 . 34 session_id length = n + * 35 . 34+n session_id + * 35+n . 36+n cipher_suite + * 37+n . 37+n compression_method + * + * 38+n . 39+n extensions length (optional) + * 40+n . .. extensions + */ + buf += mbedtls_ssl_hs_hdr_len( ssl ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "server hello, version", buf + 0, 2 ); + mbedtls_ssl_read_version( &ssl->major_ver, &ssl->minor_ver, + ssl->conf->transport, buf + 0 ); + + if( ssl->major_ver < ssl->conf->min_major_ver || + ssl->minor_ver < ssl->conf->min_minor_ver || + ssl->major_ver > ssl->conf->max_major_ver || + ssl->minor_ver > ssl->conf->max_minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "server version out of bounds - " + " min: [%d:%d], server: [%d:%d], max: [%d:%d]", + ssl->conf->min_major_ver, ssl->conf->min_minor_ver, + ssl->major_ver, ssl->minor_ver, + ssl->conf->max_major_ver, ssl->conf->max_minor_ver ) ); + + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION ); + + return( MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION ); + } + +#if defined(MBEDTLS_DEBUG_C) + t = ( (uint32_t) buf[2] << 24 ) + | ( (uint32_t) buf[3] << 16 ) + | ( (uint32_t) buf[4] << 8 ) + | ( (uint32_t) buf[5] ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, current time: %lu", t ) ); +#endif + + memcpy( ssl->handshake->randbytes + 32, buf + 2, 32 ); + + n = buf[34]; + + MBEDTLS_SSL_DEBUG_BUF( 3, "server hello, random bytes", buf + 2, 32 ); + + if( n > 32 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + if( ssl->in_hslen > mbedtls_ssl_hs_hdr_len( ssl ) + 39 + n ) + { + ext_len = ( ( buf[38 + n] << 8 ) + | ( buf[39 + n] ) ); + + if( ( ext_len > 0 && ext_len < 4 ) || + ssl->in_hslen != mbedtls_ssl_hs_hdr_len( ssl ) + 40 + n + ext_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + } + else if( ssl->in_hslen == mbedtls_ssl_hs_hdr_len( ssl ) + 38 + n ) + { + ext_len = 0; + } + else + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + /* ciphersuite (used later) */ + i = ( buf[35 + n] << 8 ) | buf[36 + n]; + + /* + * Read and check compression + */ + comp = buf[37 + n]; + +#if defined(MBEDTLS_ZLIB_SUPPORT) + /* See comments in ssl_write_client_hello() */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + accept_comp = 0; + else +#endif + accept_comp = 1; + + if( comp != MBEDTLS_SSL_COMPRESS_NULL && + ( comp != MBEDTLS_SSL_COMPRESS_DEFLATE || accept_comp == 0 ) ) +#else /* MBEDTLS_ZLIB_SUPPORT */ + if( comp != MBEDTLS_SSL_COMPRESS_NULL ) +#endif/* MBEDTLS_ZLIB_SUPPORT */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "server hello, bad compression: %d", comp ) ); + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); + } + + /* + * Initialize update checksum functions + */ + ssl->transform_negotiate->ciphersuite_info = mbedtls_ssl_ciphersuite_from_id( i ); + + if( ssl->transform_negotiate->ciphersuite_info == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "ciphersuite info for %04x not found", i ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + mbedtls_ssl_optimize_checksum( ssl, ssl->transform_negotiate->ciphersuite_info ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, session id len.: %d", n ) ); + MBEDTLS_SSL_DEBUG_BUF( 3, "server hello, session id", buf + 35, n ); + + /* + * Check if the session can be resumed + */ + if( ssl->handshake->resume == 0 || n == 0 || +#if defined(MBEDTLS_SSL_RENEGOTIATION) + ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE || +#endif + ssl->session_negotiate->ciphersuite != i || + ssl->session_negotiate->compression != comp || + ssl->session_negotiate->id_len != n || + memcmp( ssl->session_negotiate->id, buf + 35, n ) != 0 ) + { + ssl->state++; + ssl->handshake->resume = 0; +#if defined(MBEDTLS_HAVE_TIME) + ssl->session_negotiate->start = time( NULL ); +#endif + ssl->session_negotiate->ciphersuite = i; + ssl->session_negotiate->compression = comp; + ssl->session_negotiate->id_len = n; + memcpy( ssl->session_negotiate->id, buf + 35, n ); + } + else + { + ssl->state = MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC; + + if( ( ret = mbedtls_ssl_derive_keys( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_derive_keys", ret ); + return( ret ); + } + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "%s session has been resumed", + ssl->handshake->resume ? "a" : "no" ) ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, chosen ciphersuite: %04x", i ) ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, compress alg.: %d", buf[37 + n] ) ); + + suite_info = mbedtls_ssl_ciphersuite_from_id( ssl->session_negotiate->ciphersuite ); + if( suite_info == NULL +#if defined(MBEDTLS_ARC4_C) + || ( ssl->conf->arc4_disabled && + suite_info->cipher == MBEDTLS_CIPHER_ARC4_128 ) +#endif + ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, chosen ciphersuite: %s", suite_info->name ) ); + + i = 0; + while( 1 ) + { + if( ssl->conf->ciphersuite_list[ssl->minor_ver][i] == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + if( ssl->conf->ciphersuite_list[ssl->minor_ver][i++] == + ssl->session_negotiate->ciphersuite ) + { + break; + } + } + + if( comp != MBEDTLS_SSL_COMPRESS_NULL +#if defined(MBEDTLS_ZLIB_SUPPORT) + && comp != MBEDTLS_SSL_COMPRESS_DEFLATE +#endif + ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + ssl->session_negotiate->compression = comp; + + ext = buf + 40 + n; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "server hello, total extension length: %d", ext_len ) ); + + while( ext_len ) + { + unsigned int ext_id = ( ( ext[0] << 8 ) + | ( ext[1] ) ); + unsigned int ext_size = ( ( ext[2] << 8 ) + | ( ext[3] ) ); + + if( ext_size + 4 > ext_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + switch( ext_id ) + { + case MBEDTLS_TLS_EXT_RENEGOTIATION_INFO: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found renegotiation extension" ) ); +#if defined(MBEDTLS_SSL_RENEGOTIATION) + renegotiation_info_seen = 1; +#endif + + if( ( ret = ssl_parse_renegotiation_info( ssl, ext + 4, + ext_size ) ) != 0 ) + return( ret ); + + break; + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + case MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found max_fragment_length extension" ) ); + + if( ( ret = ssl_parse_max_fragment_length_ext( ssl, + ext + 4, ext_size ) ) != 0 ) + { + return( ret ); + } + + break; +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + case MBEDTLS_TLS_EXT_TRUNCATED_HMAC: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found truncated_hmac extension" ) ); + + if( ( ret = ssl_parse_truncated_hmac_ext( ssl, + ext + 4, ext_size ) ) != 0 ) + { + return( ret ); + } + + break; +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + case MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found encrypt_then_mac extension" ) ); + + if( ( ret = ssl_parse_encrypt_then_mac_ext( ssl, + ext + 4, ext_size ) ) != 0 ) + { + return( ret ); + } + + break; +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + case MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found extended_master_secret extension" ) ); + + if( ( ret = ssl_parse_extended_ms_ext( ssl, + ext + 4, ext_size ) ) != 0 ) + { + return( ret ); + } + + break; +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + case MBEDTLS_TLS_EXT_SESSION_TICKET: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found session_ticket extension" ) ); + + if( ( ret = ssl_parse_session_ticket_ext( ssl, + ext + 4, ext_size ) ) != 0 ) + { + return( ret ); + } + + break; +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + case MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found supported_point_formats extension" ) ); + + if( ( ret = ssl_parse_supported_point_formats_ext( ssl, + ext + 4, ext_size ) ) != 0 ) + { + return( ret ); + } + + break; +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C || + MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + case MBEDTLS_TLS_EXT_ECJPAKE_KKPP: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found ecjpake_kkpp extension" ) ); + + if( ( ret = ssl_parse_ecjpake_kkpp( ssl, + ext + 4, ext_size ) ) != 0 ) + { + return( ret ); + } + + break; +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_SSL_ALPN) + case MBEDTLS_TLS_EXT_ALPN: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found alpn extension" ) ); + + if( ( ret = ssl_parse_alpn_ext( ssl, ext + 4, ext_size ) ) != 0 ) + return( ret ); + + break; +#endif /* MBEDTLS_SSL_ALPN */ + + default: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "unknown extension found: %d (ignoring)", + ext_id ) ); + } + + ext_len -= 4 + ext_size; + ext += 4 + ext_size; + + if( ext_len > 0 && ext_len < 4 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + } + + /* + * Renegotiation security checks + */ + if( ssl->secure_renegotiation == MBEDTLS_SSL_LEGACY_RENEGOTIATION && + ssl->conf->allow_legacy_renegotiation == MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "legacy renegotiation, breaking off handshake" ) ); + handshake_failure = 1; + } +#if defined(MBEDTLS_SSL_RENEGOTIATION) + else if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS && + ssl->secure_renegotiation == MBEDTLS_SSL_SECURE_RENEGOTIATION && + renegotiation_info_seen == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "renegotiation_info extension missing (secure)" ) ); + handshake_failure = 1; + } + else if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS && + ssl->secure_renegotiation == MBEDTLS_SSL_LEGACY_RENEGOTIATION && + ssl->conf->allow_legacy_renegotiation == MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "legacy renegotiation not allowed" ) ); + handshake_failure = 1; + } + else if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS && + ssl->secure_renegotiation == MBEDTLS_SSL_LEGACY_RENEGOTIATION && + renegotiation_info_seen == 1 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "renegotiation_info extension present (legacy)" ) ); + handshake_failure = 1; + } +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + + if( handshake_failure == 1 ) + { + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse server hello" ) ); + + return( 0 ); +} + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) +static int ssl_parse_server_dh_params( mbedtls_ssl_context *ssl, unsigned char **p, + unsigned char *end ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + + /* + * Ephemeral DH parameters: + * + * struct { + * opaque dh_p<1..2^16-1>; + * opaque dh_g<1..2^16-1>; + * opaque dh_Ys<1..2^16-1>; + * } ServerDHParams; + */ + if( ( ret = mbedtls_dhm_read_params( &ssl->handshake->dhm_ctx, p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 2, ( "mbedtls_dhm_read_params" ), ret ); + return( ret ); + } + + if( ssl->handshake->dhm_ctx.len * 8 < ssl->conf->dhm_min_bitlen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "DHM prime too short: %d < %d", + ssl->handshake->dhm_ctx.len * 8, + ssl->conf->dhm_min_bitlen ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: P ", &ssl->handshake->dhm_ctx.P ); + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: G ", &ssl->handshake->dhm_ctx.G ); + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: GY", &ssl->handshake->dhm_ctx.GY ); + + return( ret ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) +static int ssl_check_server_ecdh_params( const mbedtls_ssl_context *ssl ) +{ + const mbedtls_ecp_curve_info *curve_info; + + curve_info = mbedtls_ecp_curve_info_from_grp_id( ssl->handshake->ecdh_ctx.grp.id ); + if( curve_info == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "ECDH curve: %s", curve_info->name ) ); + +#if defined(MBEDTLS_ECP_C) + if( mbedtls_ssl_check_curve( ssl, ssl->handshake->ecdh_ctx.grp.id ) != 0 ) +#else + if( ssl->handshake->ecdh_ctx.grp.nbits < 163 || + ssl->handshake->ecdh_ctx.grp.nbits > 521 ) +#endif + return( -1 ); + + MBEDTLS_SSL_DEBUG_ECP( 3, "ECDH: Qp", &ssl->handshake->ecdh_ctx.Qp ); + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) +static int ssl_parse_server_ecdh_params( mbedtls_ssl_context *ssl, + unsigned char **p, + unsigned char *end ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + + /* + * Ephemeral ECDH parameters: + * + * struct { + * ECParameters curve_params; + * ECPoint public; + * } ServerECDHParams; + */ + if( ( ret = mbedtls_ecdh_read_params( &ssl->handshake->ecdh_ctx, + (const unsigned char **) p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "mbedtls_ecdh_read_params" ), ret ); + return( ret ); + } + + if( ssl_check_server_ecdh_params( ssl ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message (ECDHE curve)" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + return( ret ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) +static int ssl_parse_server_psk_hint( mbedtls_ssl_context *ssl, + unsigned char **p, + unsigned char *end ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + size_t len; + ((void) ssl); + + /* + * PSK parameters: + * + * opaque psk_identity_hint<0..2^16-1>; + */ + len = (*p)[0] << 8 | (*p)[1]; + *p += 2; + + if( (*p) + len > end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message (psk_identity_hint length)" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + // TODO: Retrieve PSK identity hint and callback to app + // + *p += len; + ret = 0; + + return( ret ); +} +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) +/* + * Generate a pre-master secret and encrypt it with the server's RSA key + */ +static int ssl_write_encrypted_pms( mbedtls_ssl_context *ssl, + size_t offset, size_t *olen, + size_t pms_offset ) +{ + int ret; + size_t len_bytes = ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ? 0 : 2; + unsigned char *p = ssl->handshake->premaster + pms_offset; + + if( offset + len_bytes > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small for encrypted pms" ) ); + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + } + + /* + * Generate (part of) the pre-master as + * struct { + * ProtocolVersion client_version; + * opaque random[46]; + * } PreMasterSecret; + */ + mbedtls_ssl_write_version( ssl->conf->max_major_ver, ssl->conf->max_minor_ver, + ssl->conf->transport, p ); + + if( ( ret = ssl->conf->f_rng( ssl->conf->p_rng, p + 2, 46 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "f_rng", ret ); + return( ret ); + } + + ssl->handshake->pmslen = 48; + + if( ssl->session_negotiate->peer_cert == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "certificate required" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + /* + * Now write it out, encrypted + */ + if( ! mbedtls_pk_can_do( &ssl->session_negotiate->peer_cert->pk, + MBEDTLS_PK_RSA ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "certificate key type mismatch" ) ); + return( MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH ); + } + + if( ( ret = mbedtls_pk_encrypt( &ssl->session_negotiate->peer_cert->pk, + p, ssl->handshake->pmslen, + ssl->out_msg + offset + len_bytes, olen, + MBEDTLS_SSL_MAX_CONTENT_LEN - offset - len_bytes, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_rsa_pkcs1_encrypt", ret ); + return( ret ); + } + +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( len_bytes == 2 ) + { + ssl->out_msg[offset+0] = (unsigned char)( *olen >> 8 ); + ssl->out_msg[offset+1] = (unsigned char)( *olen ); + *olen += 2; + } +#endif + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) +static int ssl_parse_signature_algorithm( mbedtls_ssl_context *ssl, + unsigned char **p, + unsigned char *end, + mbedtls_md_type_t *md_alg, + mbedtls_pk_type_t *pk_alg ) +{ + ((void) ssl); + *md_alg = MBEDTLS_MD_NONE; + *pk_alg = MBEDTLS_PK_NONE; + + /* Only in TLS 1.2 */ + if( ssl->minor_ver != MBEDTLS_SSL_MINOR_VERSION_3 ) + { + return( 0 ); + } + + if( (*p) + 2 > end ) + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + + /* + * Get hash algorithm + */ + if( ( *md_alg = mbedtls_ssl_md_alg_from_hash( (*p)[0] ) ) == MBEDTLS_MD_NONE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "Server used unsupported " + "HashAlgorithm %d", *(p)[0] ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + /* + * Get signature algorithm + */ + if( ( *pk_alg = mbedtls_ssl_pk_alg_from_sig( (*p)[1] ) ) == MBEDTLS_PK_NONE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "server used unsupported " + "SignatureAlgorithm %d", (*p)[1] ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + /* + * Check if the hash is acceptable + */ + if( mbedtls_ssl_check_sig_hash( ssl, *md_alg ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "server used HashAlgorithm " + "that was not offered" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "Server used SignatureAlgorithm %d", (*p)[1] ) ); + MBEDTLS_SSL_DEBUG_MSG( 2, ( "Server used HashAlgorithm %d", (*p)[0] ) ); + *p += 2; + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) +static int ssl_get_ecdh_params_from_cert( mbedtls_ssl_context *ssl ) +{ + int ret; + const mbedtls_ecp_keypair *peer_key; + + if( ssl->session_negotiate->peer_cert == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "certificate required" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + if( ! mbedtls_pk_can_do( &ssl->session_negotiate->peer_cert->pk, + MBEDTLS_PK_ECKEY ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "server key not ECDH capable" ) ); + return( MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH ); + } + + peer_key = mbedtls_pk_ec( ssl->session_negotiate->peer_cert->pk ); + + if( ( ret = mbedtls_ecdh_get_params( &ssl->handshake->ecdh_ctx, peer_key, + MBEDTLS_ECDH_THEIRS ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "mbedtls_ecdh_get_params" ), ret ); + return( ret ); + } + + if( ssl_check_server_ecdh_params( ssl ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server certificate (ECDH curve)" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE ); + } + + return( ret ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || + MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ + +static int ssl_parse_server_key_exchange( mbedtls_ssl_context *ssl ) +{ + int ret; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + unsigned char *p, *end; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse server key exchange" ) ); + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse server key exchange" ) ); + ssl->state++; + return( 0 ); + } + ((void) p); + ((void) end); +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA ) + { + if( ( ret = ssl_get_ecdh_params_from_cert( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_get_ecdh_params_from_cert", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse server key exchange" ) ); + ssl->state++; + return( 0 ); + } + ((void) p); + ((void) end); +#endif /* MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + /* + * ServerKeyExchange may be skipped with PSK and RSA-PSK when the server + * doesn't use a psk_identity_hint + */ + if( ssl->in_msg[0] != MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE ) + { + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK ) + { + ssl->record_read = 1; + goto exit; + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + p = ssl->in_msg + mbedtls_ssl_hs_hdr_len( ssl ); + end = ssl->in_msg + ssl->in_hslen; + MBEDTLS_SSL_DEBUG_BUF( 3, "server key exchange", p, end - p ); + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK ) + { + if( ssl_parse_server_psk_hint( ssl, &p, end ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + } /* FALLTROUGH */ +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK ) + ; /* nothing more to do */ + else +#endif /* MBEDTLS_KEY_EXCHANGE_PSK_ENABLED || + MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK ) + { + if( ssl_parse_server_dh_params( ssl, &p, end ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA ) + { + if( ssl_parse_server_ecdh_params( ssl, &p, end ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + ret = mbedtls_ecjpake_read_round_two( &ssl->handshake->ecjpake_ctx, + p, end - p ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_read_round_two", ret ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA ) + { + size_t sig_len, hashlen; + unsigned char hash[64]; + mbedtls_md_type_t md_alg = MBEDTLS_MD_NONE; + mbedtls_pk_type_t pk_alg = MBEDTLS_PK_NONE; + unsigned char *params = ssl->in_msg + mbedtls_ssl_hs_hdr_len( ssl ); + size_t params_len = p - params; + + /* + * Handle the digitally-signed structure + */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + if( ssl_parse_signature_algorithm( ssl, &p, end, + &md_alg, &pk_alg ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + if( pk_alg != mbedtls_ssl_get_ciphersuite_sig_pk_alg( ciphersuite_info ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( ssl->minor_ver < MBEDTLS_SSL_MINOR_VERSION_3 ) + { + pk_alg = mbedtls_ssl_get_ciphersuite_sig_pk_alg( ciphersuite_info ); + + /* Default hash for ECDSA is SHA-1 */ + if( pk_alg == MBEDTLS_PK_ECDSA && md_alg == MBEDTLS_MD_NONE ) + md_alg = MBEDTLS_MD_SHA1; + } + else +#endif + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + /* + * Read signature + */ + sig_len = ( p[0] << 8 ) | p[1]; + p += 2; + + if( end != p + sig_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "signature", p, sig_len ); + + /* + * Compute the hash that has been signed + */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( md_alg == MBEDTLS_MD_NONE ) + { + mbedtls_md5_context mbedtls_md5; + mbedtls_sha1_context mbedtls_sha1; + + mbedtls_md5_init( &mbedtls_md5 ); + mbedtls_sha1_init( &mbedtls_sha1 ); + + hashlen = 36; + + /* + * digitally-signed struct { + * opaque md5_hash[16]; + * opaque sha_hash[20]; + * }; + * + * md5_hash + * MD5(ClientHello.random + ServerHello.random + * + ServerParams); + * sha_hash + * SHA(ClientHello.random + ServerHello.random + * + ServerParams); + */ + mbedtls_md5_starts( &mbedtls_md5 ); + mbedtls_md5_update( &mbedtls_md5, ssl->handshake->randbytes, 64 ); + mbedtls_md5_update( &mbedtls_md5, params, params_len ); + mbedtls_md5_finish( &mbedtls_md5, hash ); + + mbedtls_sha1_starts( &mbedtls_sha1 ); + mbedtls_sha1_update( &mbedtls_sha1, ssl->handshake->randbytes, 64 ); + mbedtls_sha1_update( &mbedtls_sha1, params, params_len ); + mbedtls_sha1_finish( &mbedtls_sha1, hash + 16 ); + + mbedtls_md5_free( &mbedtls_md5 ); + mbedtls_sha1_free( &mbedtls_sha1 ); + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 || MBEDTLS_SSL_PROTO_TLS1 || \ + MBEDTLS_SSL_PROTO_TLS1_1 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( md_alg != MBEDTLS_MD_NONE ) + { + mbedtls_md_context_t ctx; + + mbedtls_md_init( &ctx ); + + /* Info from md_alg will be used instead */ + hashlen = 0; + + /* + * digitally-signed struct { + * opaque client_random[32]; + * opaque server_random[32]; + * ServerDHParams params; + * }; + */ + if( ( ret = mbedtls_md_setup( &ctx, + mbedtls_md_info_from_type( md_alg ), 0 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_md_setup", ret ); + return( ret ); + } + + mbedtls_md_starts( &ctx ); + mbedtls_md_update( &ctx, ssl->handshake->randbytes, 64 ); + mbedtls_md_update( &ctx, params, params_len ); + mbedtls_md_finish( &ctx, hash ); + mbedtls_md_free( &ctx ); + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \ + MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "parameters hash", hash, hashlen != 0 ? hashlen : + (unsigned int) ( mbedtls_md_get_size( mbedtls_md_info_from_type( md_alg ) ) ) ); + + if( ssl->session_negotiate->peer_cert == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "certificate required" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + /* + * Verify signature + */ + if( ! mbedtls_pk_can_do( &ssl->session_negotiate->peer_cert->pk, pk_alg ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server key exchange message" ) ); + return( MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH ); + } + + if( ( ret = mbedtls_pk_verify( &ssl->session_negotiate->peer_cert->pk, + md_alg, hash, hashlen, p, sig_len ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_pk_verify", ret ); + return( ret ); + } + } +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ + +exit: + ssl->state++; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse server key exchange" ) ); + + return( 0 ); +} + +#if !defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) +static int ssl_parse_certificate_request( mbedtls_ssl_context *ssl ) +{ + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse certificate request" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate request" ) ); + ssl->state++; + return( 0 ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); +} +#else +static int ssl_parse_certificate_request( mbedtls_ssl_context *ssl ) +{ + int ret; + unsigned char *buf, *p; + size_t n = 0, m = 0; + size_t cert_type_len = 0, dn_len = 0; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse certificate request" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate request" ) ); + ssl->state++; + return( 0 ); + } + + if( ssl->record_read == 0 ) + { + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate request message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + ssl->record_read = 1; + } + + ssl->client_auth = 0; + ssl->state++; + + if( ssl->in_msg[0] == MBEDTLS_SSL_HS_CERTIFICATE_REQUEST ) + ssl->client_auth++; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "got %s certificate request", + ssl->client_auth ? "a" : "no" ) ); + + if( ssl->client_auth == 0 ) + goto exit; + + ssl->record_read = 0; + + // TODO: handshake_failure alert for an anonymous server to request + // client authentication + + /* + * struct { + * ClientCertificateType certificate_types<1..2^8-1>; + * SignatureAndHashAlgorithm + * supported_signature_algorithms<2^16-1>; -- TLS 1.2 only + * DistinguishedName certificate_authorities<0..2^16-1>; + * } CertificateRequest; + */ + buf = ssl->in_msg; + + // Retrieve cert types + // + cert_type_len = buf[mbedtls_ssl_hs_hdr_len( ssl )]; + n = cert_type_len; + + if( ssl->in_hslen < mbedtls_ssl_hs_hdr_len( ssl ) + 2 + n ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate request message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST ); + } + + p = buf + mbedtls_ssl_hs_hdr_len( ssl ) + 1; + while( cert_type_len > 0 ) + { +#if defined(MBEDTLS_RSA_C) + if( *p == MBEDTLS_SSL_CERT_TYPE_RSA_SIGN && + mbedtls_pk_can_do( mbedtls_ssl_own_key( ssl ), MBEDTLS_PK_RSA ) ) + { + ssl->handshake->cert_type = MBEDTLS_SSL_CERT_TYPE_RSA_SIGN; + break; + } + else +#endif +#if defined(MBEDTLS_ECDSA_C) + if( *p == MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN && + mbedtls_pk_can_do( mbedtls_ssl_own_key( ssl ), MBEDTLS_PK_ECDSA ) ) + { + ssl->handshake->cert_type = MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN; + break; + } + else +#endif + { + ; /* Unsupported cert type, ignore */ + } + + cert_type_len--; + p++; + } + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + /* Ignored, see comments about hash in write_certificate_verify */ + // TODO: should check the signature part against our pk_key though + size_t sig_alg_len = ( ( buf[mbedtls_ssl_hs_hdr_len( ssl ) + 1 + n] << 8 ) + | ( buf[mbedtls_ssl_hs_hdr_len( ssl ) + 2 + n] ) ); + + m += 2; + n += sig_alg_len; + + if( ssl->in_hslen < mbedtls_ssl_hs_hdr_len( ssl ) + 2 + n ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate request message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST ); + } + } +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + + /* Ignore certificate_authorities, we only have one cert anyway */ + // TODO: should not send cert if no CA matches + dn_len = ( ( buf[mbedtls_ssl_hs_hdr_len( ssl ) + 1 + m + n] << 8 ) + | ( buf[mbedtls_ssl_hs_hdr_len( ssl ) + 2 + m + n] ) ); + + n += dn_len; + if( ssl->in_hslen != mbedtls_ssl_hs_hdr_len( ssl ) + 3 + m + n ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate request message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST ); + } + +exit: + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse certificate request" ) ); + + return( 0 ); +} +#endif /* !MBEDTLS_KEY_EXCHANGE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ + +static int ssl_parse_server_hello_done( mbedtls_ssl_context *ssl ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse server hello done" ) ); + + if( ssl->record_read == 0 ) + { + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello done message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + } + ssl->record_read = 0; + + if( ssl->in_hslen != mbedtls_ssl_hs_hdr_len( ssl ) || + ssl->in_msg[0] != MBEDTLS_SSL_HS_SERVER_HELLO_DONE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad server hello done message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE ); + } + + ssl->state++; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + mbedtls_ssl_recv_flight_completed( ssl ); +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse server hello done" ) ); + + return( 0 ); +} + +static int ssl_write_client_key_exchange( mbedtls_ssl_context *ssl ) +{ + int ret; + size_t i, n; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write client key exchange" ) ); + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_RSA ) + { + /* + * DHM key exchange -- send G^X mod P + */ + n = ssl->handshake->dhm_ctx.len; + + ssl->out_msg[4] = (unsigned char)( n >> 8 ); + ssl->out_msg[5] = (unsigned char)( n ); + i = 6; + + ret = mbedtls_dhm_make_public( &ssl->handshake->dhm_ctx, + (int) mbedtls_mpi_size( &ssl->handshake->dhm_ctx.P ), + &ssl->out_msg[i], n, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_dhm_make_public", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: X ", &ssl->handshake->dhm_ctx.X ); + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: GX", &ssl->handshake->dhm_ctx.GX ); + + if( ( ret = mbedtls_dhm_calc_secret( &ssl->handshake->dhm_ctx, + ssl->handshake->premaster, + MBEDTLS_PREMASTER_SIZE, + &ssl->handshake->pmslen, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_dhm_calc_secret", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: K ", &ssl->handshake->dhm_ctx.K ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA ) + { + /* + * ECDH key exchange -- send client public value + */ + i = 4; + + ret = mbedtls_ecdh_make_public( &ssl->handshake->ecdh_ctx, + &n, + &ssl->out_msg[i], 1000, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_make_public", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_ECP( 3, "ECDH: Q", &ssl->handshake->ecdh_ctx.Q ); + + if( ( ret = mbedtls_ecdh_calc_secret( &ssl->handshake->ecdh_ctx, + &ssl->handshake->pmslen, + ssl->handshake->premaster, + MBEDTLS_MPI_MAX_SIZE, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_calc_secret", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MPI( 3, "ECDH: z", &ssl->handshake->ecdh_ctx.z ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK ) + { + /* + * opaque psk_identity<0..2^16-1>; + */ + if( ssl->conf->psk == NULL || ssl->conf->psk_identity == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no private key for PSK" ) ); + return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED ); + } + + i = 4; + n = ssl->conf->psk_identity_len; + + if( i + 2 + n > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "psk identity too long or " + "SSL buffer too short" ) ); + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + } + + ssl->out_msg[i++] = (unsigned char)( n >> 8 ); + ssl->out_msg[i++] = (unsigned char)( n ); + + memcpy( ssl->out_msg + i, ssl->conf->psk_identity, ssl->conf->psk_identity_len ); + i += ssl->conf->psk_identity_len; + +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK ) + { + n = 0; + } + else +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK ) + { + if( ( ret = ssl_write_encrypted_pms( ssl, i, &n, 2 ) ) != 0 ) + return( ret ); + } + else +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK ) + { + /* + * ClientDiffieHellmanPublic public (DHM send G^X mod P) + */ + n = ssl->handshake->dhm_ctx.len; + + if( i + 2 + n > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "psk identity or DHM size too long" + " or SSL buffer too short" ) ); + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + } + + ssl->out_msg[i++] = (unsigned char)( n >> 8 ); + ssl->out_msg[i++] = (unsigned char)( n ); + + ret = mbedtls_dhm_make_public( &ssl->handshake->dhm_ctx, + (int) mbedtls_mpi_size( &ssl->handshake->dhm_ctx.P ), + &ssl->out_msg[i], n, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_dhm_make_public", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK ) + { + /* + * ClientECDiffieHellmanPublic public; + */ + ret = mbedtls_ecdh_make_public( &ssl->handshake->ecdh_ctx, &n, + &ssl->out_msg[i], MBEDTLS_SSL_MAX_CONTENT_LEN - i, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_make_public", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_ECP( 3, "ECDH: Q", &ssl->handshake->ecdh_ctx.Q ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + if( ( ret = mbedtls_ssl_psk_derive_premaster( ssl, + ciphersuite_info->key_exchange ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_psk_derive_premaster", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA ) + { + i = 4; + if( ( ret = ssl_write_encrypted_pms( ssl, i, &n, 0 ) ) != 0 ) + return( ret ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + i = 4; + + ret = mbedtls_ecjpake_write_round_two( &ssl->handshake->ecjpake_ctx, + ssl->out_msg + i, MBEDTLS_SSL_MAX_CONTENT_LEN - i, &n, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_write_round_two", ret ); + return( ret ); + } + + ret = mbedtls_ecjpake_derive_secret( &ssl->handshake->ecjpake_ctx, + ssl->handshake->premaster, 32, &ssl->handshake->pmslen, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_derive_secret", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */ + { + ((void) ciphersuite_info); + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + ssl->out_msglen = i + n; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE; + + ssl->state++; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write client key exchange" ) ); + + return( 0 ); +} + +#if !defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) +static int ssl_write_certificate_verify( mbedtls_ssl_context *ssl ) +{ + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write certificate verify" ) ); + + if( ( ret = mbedtls_ssl_derive_keys( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_derive_keys", ret ); + return( ret ); + } + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate verify" ) ); + ssl->state++; + return( 0 ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); +} +#else +static int ssl_write_certificate_verify( mbedtls_ssl_context *ssl ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + size_t n = 0, offset = 0; + unsigned char hash[48]; + unsigned char *hash_start = hash; + mbedtls_md_type_t md_alg = MBEDTLS_MD_NONE; + unsigned int hashlen; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write certificate verify" ) ); + + if( ( ret = mbedtls_ssl_derive_keys( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_derive_keys", ret ); + return( ret ); + } + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate verify" ) ); + ssl->state++; + return( 0 ); + } + + if( ssl->client_auth == 0 || mbedtls_ssl_own_cert( ssl ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate verify" ) ); + ssl->state++; + return( 0 ); + } + + if( mbedtls_ssl_own_key( ssl ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no private key for certificate" ) ); + return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED ); + } + + /* + * Make an RSA signature of the handshake digests + */ + ssl->handshake->calc_verify( ssl, hash ); + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( ssl->minor_ver != MBEDTLS_SSL_MINOR_VERSION_3 ) + { + /* + * digitally-signed struct { + * opaque md5_hash[16]; + * opaque sha_hash[20]; + * }; + * + * md5_hash + * MD5(handshake_messages); + * + * sha_hash + * SHA(handshake_messages); + */ + hashlen = 36; + md_alg = MBEDTLS_MD_NONE; + + /* + * For ECDSA, default hash is SHA-1 only + */ + if( mbedtls_pk_can_do( mbedtls_ssl_own_key( ssl ), MBEDTLS_PK_ECDSA ) ) + { + hash_start += 16; + hashlen -= 16; + md_alg = MBEDTLS_MD_SHA1; + } + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 || MBEDTLS_SSL_PROTO_TLS1 || \ + MBEDTLS_SSL_PROTO_TLS1_1 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + /* + * digitally-signed struct { + * opaque handshake_messages[handshake_messages_length]; + * }; + * + * Taking shortcut here. We assume that the server always allows the + * PRF Hash function and has sent it in the allowed signature + * algorithms list received in the Certificate Request message. + * + * Until we encounter a server that does not, we will take this + * shortcut. + * + * Reason: Otherwise we should have running hashes for SHA512 and SHA224 + * in order to satisfy 'weird' needs from the server side. + */ + if( ssl->transform_negotiate->ciphersuite_info->mac == + MBEDTLS_MD_SHA384 ) + { + md_alg = MBEDTLS_MD_SHA384; + ssl->out_msg[4] = MBEDTLS_SSL_HASH_SHA384; + } + else + { + md_alg = MBEDTLS_MD_SHA256; + ssl->out_msg[4] = MBEDTLS_SSL_HASH_SHA256; + } + ssl->out_msg[5] = mbedtls_ssl_sig_from_pk( mbedtls_ssl_own_key( ssl ) ); + + /* Info from md_alg will be used instead */ + hashlen = 0; + offset = 2; + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + if( ( ret = mbedtls_pk_sign( mbedtls_ssl_own_key( ssl ), md_alg, hash_start, hashlen, + ssl->out_msg + 6 + offset, &n, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_pk_sign", ret ); + return( ret ); + } + + ssl->out_msg[4 + offset] = (unsigned char)( n >> 8 ); + ssl->out_msg[5 + offset] = (unsigned char)( n ); + + ssl->out_msglen = 6 + n + offset; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_CERTIFICATE_VERIFY; + + ssl->state++; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write certificate verify" ) ); + + return( ret ); +} +#endif /* !MBEDTLS_KEY_EXCHANGE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +static int ssl_parse_new_session_ticket( mbedtls_ssl_context *ssl ) +{ + int ret; + uint32_t lifetime; + size_t ticket_len; + unsigned char *ticket; + const unsigned char *msg; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse new session ticket" ) ); + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad new session ticket message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + /* + * struct { + * uint32 ticket_lifetime_hint; + * opaque ticket<0..2^16-1>; + * } NewSessionTicket; + * + * 0 . 3 ticket_lifetime_hint + * 4 . 5 ticket_len (n) + * 6 . 5+n ticket content + */ + if( ssl->in_msg[0] != MBEDTLS_SSL_HS_NEW_SESSION_TICKET || + ssl->in_hslen < 6 + mbedtls_ssl_hs_hdr_len( ssl ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad new session ticket message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET ); + } + + msg = ssl->in_msg + mbedtls_ssl_hs_hdr_len( ssl ); + + lifetime = ( msg[0] << 24 ) | ( msg[1] << 16 ) | + ( msg[2] << 8 ) | ( msg[3] ); + + ticket_len = ( msg[4] << 8 ) | ( msg[5] ); + + if( ticket_len + 6 + mbedtls_ssl_hs_hdr_len( ssl ) != ssl->in_hslen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad new session ticket message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET ); + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ticket length: %d", ticket_len ) ); + + /* We're not waiting for a NewSessionTicket message any more */ + ssl->handshake->new_session_ticket = 0; + ssl->state = MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC; + + /* + * Zero-length ticket means the server changed his mind and doesn't want + * to send a ticket after all, so just forget it + */ + if( ticket_len == 0 ) + return( 0 ); + + mbedtls_zeroize( ssl->session_negotiate->ticket, + ssl->session_negotiate->ticket_len ); + mbedtls_free( ssl->session_negotiate->ticket ); + ssl->session_negotiate->ticket = NULL; + ssl->session_negotiate->ticket_len = 0; + + if( ( ticket = mbedtls_calloc( 1, ticket_len ) ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "ticket alloc failed" ) ); + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + memcpy( ticket, msg + 6, ticket_len ); + + ssl->session_negotiate->ticket = ticket; + ssl->session_negotiate->ticket_len = ticket_len; + ssl->session_negotiate->ticket_lifetime = lifetime; + + /* + * RFC 5077 section 3.4: + * "If the client receives a session ticket from the server, then it + * discards any Session ID that was sent in the ServerHello." + */ + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ticket in use, discarding session id" ) ); + ssl->session_negotiate->id_len = 0; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse new session ticket" ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(ESP8266_PLATFORM) +int mbedtls_write_finished(mbedtls_ssl_context *ssl); +#endif +/* + * SSL handshake -- client side -- single step + */ +int mbedtls_ssl_handshake_client_step( mbedtls_ssl_context *ssl ) +{ + int ret = 0; + + if( ssl->state == MBEDTLS_SSL_HANDSHAKE_OVER || ssl->handshake == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "client state: %d", ssl->state ) ); + + if( ( ret = mbedtls_ssl_flush_output( ssl ) ) != 0 ) + return( ret ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake->retransmit_state == MBEDTLS_SSL_RETRANS_SENDING ) + { + if( ( ret = mbedtls_ssl_resend( ssl ) ) != 0 ) + return( ret ); + } +#endif + + /* Change state now, so that it is right in mbedtls_ssl_read_record(), used + * by DTLS for dropping out-of-sequence ChangeCipherSpec records */ +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + if( ssl->state == MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC && + ssl->handshake->new_session_ticket != 0 ) + { + ssl->state = MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET; + } +#endif + + switch( ssl->state ) + { + case MBEDTLS_SSL_HELLO_REQUEST: + ssl->state = MBEDTLS_SSL_CLIENT_HELLO; + break; + + /* + * ==> ClientHello + */ + case MBEDTLS_SSL_CLIENT_HELLO: + ret = ssl_write_client_hello( ssl ); + break; + + /* + * <== ServerHello + * Certificate + * ( ServerKeyExchange ) + * ( CertificateRequest ) + * ServerHelloDone + */ + case MBEDTLS_SSL_SERVER_HELLO: + ret = ssl_parse_server_hello( ssl ); + break; + + case MBEDTLS_SSL_SERVER_CERTIFICATE: + ret = mbedtls_ssl_parse_certificate( ssl ); + break; + + case MBEDTLS_SSL_SERVER_KEY_EXCHANGE: + ret = ssl_parse_server_key_exchange( ssl ); + break; + + case MBEDTLS_SSL_CERTIFICATE_REQUEST: + ret = ssl_parse_certificate_request( ssl ); + break; + + case MBEDTLS_SSL_SERVER_HELLO_DONE: + ret = ssl_parse_server_hello_done( ssl ); + break; + + /* + * ==> ( Certificate/Alert ) + * ClientKeyExchange + * ( CertificateVerify ) + * ChangeCipherSpec + * Finished + */ + case MBEDTLS_SSL_CLIENT_CERTIFICATE: + ret = mbedtls_ssl_write_certificate( ssl ); + break; + + case MBEDTLS_SSL_CLIENT_KEY_EXCHANGE: + ret = ssl_write_client_key_exchange( ssl ); + break; + + case MBEDTLS_SSL_CERTIFICATE_VERIFY: + ret = ssl_write_certificate_verify( ssl ); + break; + + case MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC: + ret = mbedtls_ssl_write_change_cipher_spec( ssl ); + break; + + case MBEDTLS_SSL_CLIENT_FINISHED: + ret = mbedtls_ssl_write_finished( ssl ); +#if defined(ESP8266_PLATFORM) + mbedtls_write_finished(ssl); +#endif + break; + + /* + * <== ( NewSessionTicket ) + * ChangeCipherSpec + * Finished + */ +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + case MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET: + ret = ssl_parse_new_session_ticket( ssl ); + break; +#endif + + case MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC: + ret = mbedtls_ssl_parse_change_cipher_spec( ssl ); + break; + + case MBEDTLS_SSL_SERVER_FINISHED: + ret = mbedtls_ssl_parse_finished( ssl ); + break; + + case MBEDTLS_SSL_FLUSH_BUFFERS: + MBEDTLS_SSL_DEBUG_MSG( 2, ( "handshake: done" ) ); + ssl->state = MBEDTLS_SSL_HANDSHAKE_WRAPUP; + break; + + case MBEDTLS_SSL_HANDSHAKE_WRAPUP: + mbedtls_ssl_handshake_wrapup( ssl ); + break; + + default: + MBEDTLS_SSL_DEBUG_MSG( 1, ( "invalid state %d", ssl->state ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + return( ret ); +} +#endif /* MBEDTLS_SSL_CLI_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cookie.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cookie.c new file mode 100644 index 0000000..7e0c573 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_cookie.c @@ -0,0 +1,260 @@ +/* + * DTLS cookie callbacks implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * These session callbacks use a simple chained list + * to store and retrieve the session information. + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SSL_COOKIE_C) + +#include "mbedtls/ssl_cookie.h" +#include "mbedtls/ssl_internal.h" + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#include + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * If DTLS is in use, then at least one of SHA-1, SHA-256, SHA-512 is + * available. Try SHA-256 first, 512 wastes resources since we need to stay + * with max 32 bytes of cookie for DTLS 1.0 + */ +#if defined(MBEDTLS_SHA256_C) +#define COOKIE_MD MBEDTLS_MD_SHA224 +#define COOKIE_MD_OUTLEN 32 +#define COOKIE_HMAC_LEN 28 +#elif defined(MBEDTLS_SHA512_C) +#define COOKIE_MD MBEDTLS_MD_SHA384 +#define COOKIE_MD_OUTLEN 48 +#define COOKIE_HMAC_LEN 28 +#elif defined(MBEDTLS_SHA1_C) +#define COOKIE_MD MBEDTLS_MD_SHA1 +#define COOKIE_MD_OUTLEN 20 +#define COOKIE_HMAC_LEN 20 +#else +#error "DTLS hello verify needs SHA-1 or SHA-2" +#endif + +/* + * Cookies are formed of a 4-bytes timestamp (or serial number) and + * an HMAC of timestemp and client ID. + */ +#define COOKIE_LEN ( 4 + COOKIE_HMAC_LEN ) + +void mbedtls_ssl_cookie_init( mbedtls_ssl_cookie_ctx *ctx ) +{ + mbedtls_md_init( &ctx->hmac_ctx ); +#if !defined(MBEDTLS_HAVE_TIME) + ctx->serial = 0; +#endif + ctx->timeout = MBEDTLS_SSL_COOKIE_TIMEOUT; + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &ctx->mutex ); +#endif +} + +void mbedtls_ssl_cookie_set_timeout( mbedtls_ssl_cookie_ctx *ctx, unsigned long delay ) +{ + ctx->timeout = delay; +} + +void mbedtls_ssl_cookie_free( mbedtls_ssl_cookie_ctx *ctx ) +{ + mbedtls_md_free( &ctx->hmac_ctx ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &ctx->mutex ); +#endif + + mbedtls_zeroize( ctx, sizeof( mbedtls_ssl_cookie_ctx ) ); +} + +int mbedtls_ssl_cookie_setup( mbedtls_ssl_cookie_ctx *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + unsigned char key[COOKIE_MD_OUTLEN]; + + if( ( ret = f_rng( p_rng, key, sizeof( key ) ) ) != 0 ) + return( ret ); + + ret = mbedtls_md_setup( &ctx->hmac_ctx, mbedtls_md_info_from_type( COOKIE_MD ), 1 ); + if( ret != 0 ) + return( ret ); + + ret = mbedtls_md_hmac_starts( &ctx->hmac_ctx, key, sizeof( key ) ); + if( ret != 0 ) + return( ret ); + + mbedtls_zeroize( key, sizeof( key ) ); + + return( 0 ); +} + +/* + * Generate the HMAC part of a cookie + */ +static int ssl_cookie_hmac( mbedtls_md_context_t *hmac_ctx, + const unsigned char time[4], + unsigned char **p, unsigned char *end, + const unsigned char *cli_id, size_t cli_id_len ) +{ + unsigned char hmac_out[COOKIE_MD_OUTLEN]; + + if( (size_t)( end - *p ) < COOKIE_HMAC_LEN ) + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + + if( mbedtls_md_hmac_reset( hmac_ctx ) != 0 || + mbedtls_md_hmac_update( hmac_ctx, time, 4 ) != 0 || + mbedtls_md_hmac_update( hmac_ctx, cli_id, cli_id_len ) != 0 || + mbedtls_md_hmac_finish( hmac_ctx, hmac_out ) != 0 ) + { + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + memcpy( *p, hmac_out, COOKIE_HMAC_LEN ); + *p += COOKIE_HMAC_LEN; + + return( 0 ); +} + +/* + * Generate cookie for DTLS ClientHello verification + */ +int mbedtls_ssl_cookie_write( void *p_ctx, + unsigned char **p, unsigned char *end, + const unsigned char *cli_id, size_t cli_id_len ) +{ + int ret; + mbedtls_ssl_cookie_ctx *ctx = (mbedtls_ssl_cookie_ctx *) p_ctx; + unsigned long t; + + if( ctx == NULL || cli_id == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( (size_t)( end - *p ) < COOKIE_LEN ) + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + +#if defined(MBEDTLS_HAVE_TIME) + t = (unsigned long) time( NULL ); +#else + t = ctx->serial++; +#endif + + (*p)[0] = (unsigned char)( t >> 24 ); + (*p)[1] = (unsigned char)( t >> 16 ); + (*p)[2] = (unsigned char)( t >> 8 ); + (*p)[3] = (unsigned char)( t ); + *p += 4; + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR + ret ); +#endif + + ret = ssl_cookie_hmac( &ctx->hmac_ctx, *p - 4, + p, end, cli_id, cli_id_len ); + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR + + MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +/* + * Check a cookie + */ +int mbedtls_ssl_cookie_check( void *p_ctx, + const unsigned char *cookie, size_t cookie_len, + const unsigned char *cli_id, size_t cli_id_len ) +{ + unsigned char ref_hmac[COOKIE_HMAC_LEN]; + int ret = 0; + unsigned char *p = ref_hmac; + mbedtls_ssl_cookie_ctx *ctx = (mbedtls_ssl_cookie_ctx *) p_ctx; + unsigned long cur_time, cookie_time; + + if( ctx == NULL || cli_id == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( cookie_len != COOKIE_LEN ) + return( -1 ); + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR + ret ); +#endif + + if( ssl_cookie_hmac( &ctx->hmac_ctx, cookie, + &p, p + sizeof( ref_hmac ), + cli_id, cli_id_len ) != 0 ) + ret = -1; + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR + + MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + if( ret != 0 ) + return( ret ); + + if( mbedtls_ssl_safer_memcmp( cookie + 4, ref_hmac, sizeof( ref_hmac ) ) != 0 ) + return( -1 ); + +#if defined(MBEDTLS_HAVE_TIME) + cur_time = (unsigned long) time( NULL ); +#else + cur_time = ctx->serial; +#endif + + cookie_time = ( (unsigned long) cookie[0] << 24 ) | + ( (unsigned long) cookie[1] << 16 ) | + ( (unsigned long) cookie[2] << 8 ) | + ( (unsigned long) cookie[3] ); + + if( ctx->timeout != 0 && cur_time - cookie_time > ctx->timeout ) + return( -1 ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_COOKIE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_srv.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_srv.c new file mode 100644 index 0000000..0b6e8a5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_srv.c @@ -0,0 +1,3887 @@ +/* + * SSLv3/TLSv1 server-side functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SSL_SRV_C) + +#include "mbedtls/debug.h" +#include "mbedtls/ssl.h" +#include "mbedtls/ssl_internal.h" + +#include + +#if defined(MBEDTLS_ECP_C) +#include "mbedtls/ecp.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if defined(MBEDTLS_HAVE_TIME) +#include +#endif + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} +#endif + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) +int mbedtls_ssl_set_client_transport_id( mbedtls_ssl_context *ssl, + const unsigned char *info, + size_t ilen ) +{ + if( ssl->conf->endpoint != MBEDTLS_SSL_IS_SERVER ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + mbedtls_free( ssl->cli_id ); + + if( ( ssl->cli_id = mbedtls_calloc( 1, ilen ) ) == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + memcpy( ssl->cli_id, info, ilen ); + ssl->cli_id_len = ilen; + + return( 0 ); +} + +void mbedtls_ssl_conf_dtls_cookies( mbedtls_ssl_config *conf, + mbedtls_ssl_cookie_write_t *f_cookie_write, + mbedtls_ssl_cookie_check_t *f_cookie_check, + void *p_cookie ) +{ + conf->f_cookie_write = f_cookie_write; + conf->f_cookie_check = f_cookie_check; + conf->p_cookie = p_cookie; +} +#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY */ + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) +static int ssl_parse_servername_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + int ret; + size_t servername_list_size, hostname_len; + const unsigned char *p; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "parse ServerName extension" ) ); + + servername_list_size = ( ( buf[0] << 8 ) | ( buf[1] ) ); + if( servername_list_size + 2 != len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + p = buf + 2; + while( servername_list_size > 0 ) + { + hostname_len = ( ( p[1] << 8 ) | p[2] ); + if( hostname_len + 3 > servername_list_size ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + if( p[0] == MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME ) + { + ret = ssl->conf->f_sni( ssl->conf->p_sni, + ssl, p + 3, hostname_len ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_sni_wrapper", ret ); + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_UNRECOGNIZED_NAME ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + return( 0 ); + } + + servername_list_size -= hostname_len + 3; + p += hostname_len + 3; + } + + if( servername_list_size != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + return( 0 ); +} +#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */ + +static int ssl_parse_renegotiation_info( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + int ret; + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE ) + { + /* Check verify-data in constant-time. The length OTOH is no secret */ + if( len != 1 + ssl->verify_data_len || + buf[0] != ssl->verify_data_len || + mbedtls_ssl_safer_memcmp( buf + 1, ssl->peer_verify_data, + ssl->verify_data_len ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "non-matching renegotiation info" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + } + else +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + { + if( len != 1 || buf[0] != 0x0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "non-zero length renegotiation info" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ssl->secure_renegotiation = MBEDTLS_SSL_SECURE_RENEGOTIATION; + } + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \ + defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +static int ssl_parse_signature_algorithms_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + size_t sig_alg_list_size; + const unsigned char *p; + const unsigned char *end = buf + len; + const int *md_cur; + + + sig_alg_list_size = ( ( buf[0] << 8 ) | ( buf[1] ) ); + if( sig_alg_list_size + 2 != len || + sig_alg_list_size % 2 != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + /* + * For now, ignore the SignatureAlgorithm part and rely on offered + * ciphersuites only for that part. To be fixed later. + * + * So, just look at the HashAlgorithm part. + */ + for( md_cur = ssl->conf->sig_hashes; *md_cur != MBEDTLS_MD_NONE; md_cur++ ) { + for( p = buf + 2; p < end; p += 2 ) { + if( *md_cur == (int) mbedtls_ssl_md_alg_from_hash( p[0] ) ) { + ssl->handshake->sig_alg = p[0]; + goto have_sig_alg; + } + } + } + + /* Some key echanges do not need signatures at all */ + MBEDTLS_SSL_DEBUG_MSG( 3, ( "no signature_algorithm in common" ) ); + return( 0 ); + +have_sig_alg: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v3, signature_algorithm ext: %d", + ssl->handshake->sig_alg ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 && + MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */ + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static int ssl_parse_supported_elliptic_curves( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + size_t list_size, our_size; + const unsigned char *p; + const mbedtls_ecp_curve_info *curve_info, **curves; + + list_size = ( ( buf[0] << 8 ) | ( buf[1] ) ); + if( list_size + 2 != len || + list_size % 2 != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + /* Should never happen unless client duplicates the extension */ + if( ssl->handshake->curves != NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + /* Don't allow our peer to make us allocate too much memory, + * and leave room for a final 0 */ + our_size = list_size / 2 + 1; + if( our_size > MBEDTLS_ECP_DP_MAX ) + our_size = MBEDTLS_ECP_DP_MAX; + + if( ( curves = mbedtls_calloc( our_size, sizeof( *curves ) ) ) == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + ssl->handshake->curves = curves; + + p = buf + 2; + while( list_size > 0 && our_size > 1 ) + { + curve_info = mbedtls_ecp_curve_info_from_tls_id( ( p[0] << 8 ) | p[1] ); + + if( curve_info != NULL ) + { + *curves++ = curve_info; + our_size--; + } + + list_size -= 2; + p += 2; + } + + return( 0 ); +} + +static int ssl_parse_supported_point_formats( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + size_t list_size; + const unsigned char *p; + + list_size = buf[0]; + if( list_size + 1 != len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + p = buf + 1; + while( list_size > 0 ) + { + if( p[0] == MBEDTLS_ECP_PF_UNCOMPRESSED || + p[0] == MBEDTLS_ECP_PF_COMPRESSED ) + { +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) + ssl->handshake->ecdh_ctx.point_format = p[0]; +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + ssl->handshake->ecjpake_ctx.point_format = p[0]; +#endif + MBEDTLS_SSL_DEBUG_MSG( 4, ( "point format selected: %d", p[0] ) ); + return( 0 ); + } + + list_size--; + p++; + } + + return( 0 ); +} +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C || + MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static int ssl_parse_ecjpake_kkpp( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + int ret; + + if( mbedtls_ecjpake_check( &ssl->handshake->ecjpake_ctx ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "skip ecjpake kkpp extension" ) ); + return( 0 ); + } + + if( ( ret = mbedtls_ecjpake_read_round_one( &ssl->handshake->ecjpake_ctx, + buf, len ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_read_round_one", ret ); + return( ret ); + } + + /* Only mark the extension as OK when we're sure it is */ + ssl->handshake->cli_exts |= MBEDTLS_TLS_EXT_ECJPAKE_KKPP_OK; + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +static int ssl_parse_max_fragment_length_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( len != 1 || buf[0] >= MBEDTLS_SSL_MAX_FRAG_LEN_INVALID ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ssl->session_negotiate->mfl_code = buf[0]; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) +static int ssl_parse_truncated_hmac_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( len != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ((void) buf); + + if( ssl->conf->trunc_hmac == MBEDTLS_SSL_TRUNC_HMAC_ENABLED ) + ssl->session_negotiate->trunc_hmac = MBEDTLS_SSL_TRUNC_HMAC_ENABLED; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) +static int ssl_parse_encrypt_then_mac_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( len != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ((void) buf); + + if( ssl->conf->encrypt_then_mac == MBEDTLS_SSL_ETM_ENABLED && + ssl->minor_ver != MBEDTLS_SSL_MINOR_VERSION_0 ) + { + ssl->session_negotiate->encrypt_then_mac = MBEDTLS_SSL_ETM_ENABLED; + } + + return( 0 ); +} +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) +static int ssl_parse_extended_ms_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, + size_t len ) +{ + if( len != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ((void) buf); + + if( ssl->conf->extended_ms == MBEDTLS_SSL_EXTENDED_MS_ENABLED && + ssl->minor_ver != MBEDTLS_SSL_MINOR_VERSION_0 ) + { + ssl->handshake->extended_ms = MBEDTLS_SSL_EXTENDED_MS_ENABLED; + } + + return( 0 ); +} +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +static int ssl_parse_session_ticket_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t len ) +{ + int ret; + mbedtls_ssl_session session; + + mbedtls_ssl_session_init( &session ); + + if( ssl->conf->f_ticket_parse == NULL || + ssl->conf->f_ticket_write == NULL ) + { + return( 0 ); + } + + /* Remember the client asked us to send a new ticket */ + ssl->handshake->new_session_ticket = 1; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ticket length: %d", len ) ); + + if( len == 0 ) + return( 0 ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ticket rejected: renegotiating" ) ); + return( 0 ); + } +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + + /* + * Failures are ok: just ignore the ticket and proceed. + */ + if( ( ret = ssl->conf->f_ticket_parse( ssl->conf->p_ticket, &session, + buf, len ) ) != 0 ) + { + mbedtls_ssl_session_free( &session ); + + if( ret == MBEDTLS_ERR_SSL_INVALID_MAC ) + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ticket is not authentic" ) ); + else if( ret == MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED ) + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ticket is expired" ) ); + else + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_ticket_parse", ret ); + + return( 0 ); + } + + /* + * Keep the session ID sent by the client, since we MUST send it back to + * inform them we're accepting the ticket (RFC 5077 section 3.4) + */ + session.id_len = ssl->session_negotiate->id_len; + memcpy( &session.id, ssl->session_negotiate->id, session.id_len ); + + mbedtls_ssl_session_free( ssl->session_negotiate ); + memcpy( ssl->session_negotiate, &session, sizeof( mbedtls_ssl_session ) ); + + /* Zeroize instead of free as we copied the content */ + mbedtls_zeroize( &session, sizeof( mbedtls_ssl_session ) ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "session successfully restored from ticket" ) ); + + ssl->handshake->resume = 1; + + /* Don't send a new ticket after all, this one is OK */ + ssl->handshake->new_session_ticket = 0; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(MBEDTLS_SSL_ALPN) +static int ssl_parse_alpn_ext( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ + size_t list_len, cur_len, ours_len; + const unsigned char *theirs, *start, *end; + const char **ours; + + /* If ALPN not configured, just ignore the extension */ + if( ssl->conf->alpn_list == NULL ) + return( 0 ); + + /* + * opaque ProtocolName<1..2^8-1>; + * + * struct { + * ProtocolName protocol_name_list<2..2^16-1> + * } ProtocolNameList; + */ + + /* Min length is 2 (list_len) + 1 (name_len) + 1 (name) */ + if( len < 4 ) + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + + list_len = ( buf[0] << 8 ) | buf[1]; + if( list_len != len - 2 ) + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + + /* + * Use our order of preference + */ + start = buf + 2; + end = buf + len; + for( ours = ssl->conf->alpn_list; *ours != NULL; ours++ ) + { + ours_len = strlen( *ours ); + for( theirs = start; theirs != end; theirs += cur_len ) + { + /* If the list is well formed, we should get equality first */ + if( theirs > end ) + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + + cur_len = *theirs++; + + /* Empty strings MUST NOT be included */ + if( cur_len == 0 ) + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + + if( cur_len == ours_len && + memcmp( theirs, *ours, cur_len ) == 0 ) + { + ssl->alpn_chosen = *ours; + return( 0 ); + } + } + } + + /* If we get there, no match was found */ + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); +} +#endif /* MBEDTLS_SSL_ALPN */ + +/* + * Auxiliary functions for ServerHello parsing and related actions + */ + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +/* + * Return 0 if the given key uses one of the acceptable curves, -1 otherwise + */ +#if defined(MBEDTLS_ECDSA_C) +static int ssl_check_key_curve( mbedtls_pk_context *pk, + const mbedtls_ecp_curve_info **curves ) +{ + const mbedtls_ecp_curve_info **crv = curves; + mbedtls_ecp_group_id grp_id = mbedtls_pk_ec( *pk )->grp.id; + + while( *crv != NULL ) + { + if( (*crv)->grp_id == grp_id ) + return( 0 ); + crv++; + } + + return( -1 ); +} +#endif /* MBEDTLS_ECDSA_C */ + +/* + * Try picking a certificate for this ciphersuite, + * return 0 on success and -1 on failure. + */ +static int ssl_pick_cert( mbedtls_ssl_context *ssl, + const mbedtls_ssl_ciphersuite_t * ciphersuite_info ) +{ + mbedtls_ssl_key_cert *cur, *list, *fallback = NULL; + mbedtls_pk_type_t pk_alg = mbedtls_ssl_get_ciphersuite_sig_pk_alg( ciphersuite_info ); + uint32_t flags; + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + if( ssl->handshake->sni_key_cert != NULL ) + list = ssl->handshake->sni_key_cert; + else +#endif + list = ssl->conf->key_cert; + + if( pk_alg == MBEDTLS_PK_NONE ) + return( 0 ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite requires certificate" ) ); + + if( list == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server has no certificate" ) ); + return( -1 ); + } + + for( cur = list; cur != NULL; cur = cur->next ) + { + MBEDTLS_SSL_DEBUG_CRT( 3, "candidate certificate chain, certificate", + cur->cert ); + + if( ! mbedtls_pk_can_do( cur->key, pk_alg ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "certificate mismatch: key type" ) ); + continue; + } + + /* + * This avoids sending the client a cert it'll reject based on + * keyUsage or other extensions. + * + * It also allows the user to provision different certificates for + * different uses based on keyUsage, eg if they want to avoid signing + * and decrypting with the same RSA key. + */ + if( mbedtls_ssl_check_cert_usage( cur->cert, ciphersuite_info, + MBEDTLS_SSL_IS_SERVER, &flags ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "certificate mismatch: " + "(extended) key usage extension" ) ); + continue; + } + +#if defined(MBEDTLS_ECDSA_C) + if( pk_alg == MBEDTLS_PK_ECDSA && + ssl_check_key_curve( cur->key, ssl->handshake->curves ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "certificate mismatch: elliptic curve" ) ); + continue; + } +#endif + + /* + * Try to select a SHA-1 certificate for pre-1.2 clients, but still + * present them a SHA-higher cert rather than failing if it's the only + * one we got that satisfies the other conditions. + */ + if( ssl->minor_ver < MBEDTLS_SSL_MINOR_VERSION_3 && + cur->cert->sig_md != MBEDTLS_MD_SHA1 ) + { + if( fallback == NULL ) + fallback = cur; + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "certificate not preferred: " + "sha-2 with pre-TLS 1.2 client" ) ); + continue; + } + } + + /* If we get there, we got a winner */ + break; + } + + if( cur == NULL ) + cur = fallback; + + /* Do not update ssl->handshake->key_cert unless there is a match */ + if( cur != NULL ) + { + ssl->handshake->key_cert = cur; + MBEDTLS_SSL_DEBUG_CRT( 3, "selected certificate chain, certificate", + ssl->handshake->key_cert->cert ); + return( 0 ); + } + + return( -1 ); +} +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +/* + * Check if a given ciphersuite is suitable for use with our config/keys/etc + * Sets ciphersuite_info only if the suite matches. + */ +static int ssl_ciphersuite_match( mbedtls_ssl_context *ssl, int suite_id, + const mbedtls_ssl_ciphersuite_t **ciphersuite_info ) +{ + const mbedtls_ssl_ciphersuite_t *suite_info; + + suite_info = mbedtls_ssl_ciphersuite_from_id( suite_id ); + if( suite_info == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "trying ciphersuite: %s", suite_info->name ) ); + + if( suite_info->min_minor_ver > ssl->minor_ver || + suite_info->max_minor_ver < ssl->minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite mismatch: version" ) ); + return( 0 ); + } + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ( suite_info->flags & MBEDTLS_CIPHERSUITE_NODTLS ) ) + return( 0 ); +#endif + +#if defined(MBEDTLS_ARC4_C) + if( ssl->conf->arc4_disabled == MBEDTLS_SSL_ARC4_DISABLED && + suite_info->cipher == MBEDTLS_CIPHER_ARC4_128 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite mismatch: rc4" ) ); + return( 0 ); + } +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + if( suite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE && + ( ssl->handshake->cli_exts & MBEDTLS_TLS_EXT_ECJPAKE_KKPP_OK ) == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite mismatch: ecjpake " + "not configured or ext missing" ) ); + return( 0 ); + } +#endif + + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) + if( mbedtls_ssl_ciphersuite_uses_ec( suite_info ) && + ( ssl->handshake->curves == NULL || + ssl->handshake->curves[0] == NULL ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite mismatch: " + "no common elliptic curve" ) ); + return( 0 ); + } +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + /* If the ciphersuite requires a pre-shared key and we don't + * have one, skip it now rather than failing later */ + if( mbedtls_ssl_ciphersuite_uses_psk( suite_info ) && + ssl->conf->f_psk == NULL && + ( ssl->conf->psk == NULL || ssl->conf->psk_identity == NULL || + ssl->conf->psk_identity_len == 0 || ssl->conf->psk_len == 0 ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite mismatch: no pre-shared key" ) ); + return( 0 ); + } +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + /* + * Final check: if ciphersuite requires us to have a + * certificate/key of a particular type: + * - select the appropriate certificate if we have one, or + * - try the next ciphersuite if we don't + * This must be done last since we modify the key_cert list. + */ + if( ssl_pick_cert( ssl, suite_info ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite mismatch: " + "no suitable certificate" ) ); + return( 0 ); + } +#endif + + *ciphersuite_info = suite_info; + return( 0 ); +} + +#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO) +static int ssl_parse_client_hello_v2( mbedtls_ssl_context *ssl ) +{ + int ret, got_common_suite; + unsigned int i, j; + size_t n; + unsigned int ciph_len, sess_len, chal_len; + unsigned char *buf, *p; + const int *ciphersuites; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse client hello v2" ) ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "client hello v2 illegal for renegotiation" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + + buf = ssl->in_hdr; + + MBEDTLS_SSL_DEBUG_BUF( 4, "record header", buf, 5 ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v2, message type: %d", + buf[2] ) ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v2, message len.: %d", + ( ( buf[0] & 0x7F ) << 8 ) | buf[1] ) ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v2, max. version: [%d:%d]", + buf[3], buf[4] ) ); + + /* + * SSLv2 Client Hello + * + * Record layer: + * 0 . 1 message length + * + * SSL layer: + * 2 . 2 message type + * 3 . 4 protocol version + */ + if( buf[2] != MBEDTLS_SSL_HS_CLIENT_HELLO || + buf[3] != MBEDTLS_SSL_MAJOR_VERSION_3 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + n = ( ( buf[0] << 8 ) | buf[1] ) & 0x7FFF; + + if( n < 17 || n > 512 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ssl->major_ver = MBEDTLS_SSL_MAJOR_VERSION_3; + ssl->minor_ver = ( buf[4] <= ssl->conf->max_minor_ver ) + ? buf[4] : ssl->conf->max_minor_ver; + + if( ssl->minor_ver < ssl->conf->min_minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "client only supports ssl smaller than minimum" + " [%d:%d] < [%d:%d]", + ssl->major_ver, ssl->minor_ver, + ssl->conf->min_major_ver, ssl->conf->min_minor_ver ) ); + + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION ); + return( MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION ); + } + + ssl->handshake->max_major_ver = buf[3]; + ssl->handshake->max_minor_ver = buf[4]; + + if( ( ret = mbedtls_ssl_fetch_input( ssl, 2 + n ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_fetch_input", ret ); + return( ret ); + } + + ssl->handshake->update_checksum( ssl, buf + 2, n ); + + buf = ssl->in_msg; + n = ssl->in_left - 5; + + /* + * 0 . 1 ciphersuitelist length + * 2 . 3 session id length + * 4 . 5 challenge length + * 6 . .. ciphersuitelist + * .. . .. session id + * .. . .. challenge + */ + MBEDTLS_SSL_DEBUG_BUF( 4, "record contents", buf, n ); + + ciph_len = ( buf[0] << 8 ) | buf[1]; + sess_len = ( buf[2] << 8 ) | buf[3]; + chal_len = ( buf[4] << 8 ) | buf[5]; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciph_len: %d, sess_len: %d, chal_len: %d", + ciph_len, sess_len, chal_len ) ); + + /* + * Make sure each parameter length is valid + */ + if( ciph_len < 3 || ( ciph_len % 3 ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + if( sess_len > 32 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + if( chal_len < 8 || chal_len > 32 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + if( n != 6 + ciph_len + sess_len + chal_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, ciphersuitelist", + buf + 6, ciph_len ); + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, session id", + buf + 6 + ciph_len, sess_len ); + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, challenge", + buf + 6 + ciph_len + sess_len, chal_len ); + + p = buf + 6 + ciph_len; + ssl->session_negotiate->id_len = sess_len; + memset( ssl->session_negotiate->id, 0, + sizeof( ssl->session_negotiate->id ) ); + memcpy( ssl->session_negotiate->id, p, ssl->session_negotiate->id_len ); + + p += sess_len; + memset( ssl->handshake->randbytes, 0, 64 ); + memcpy( ssl->handshake->randbytes + 32 - chal_len, p, chal_len ); + + /* + * Check for TLS_EMPTY_RENEGOTIATION_INFO_SCSV + */ + for( i = 0, p = buf + 6; i < ciph_len; i += 3, p += 3 ) + { + if( p[0] == 0 && p[1] == 0 && p[2] == MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "received TLS_EMPTY_RENEGOTIATION_INFO " ) ); +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "received RENEGOTIATION SCSV " + "during renegotiation" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + ssl->secure_renegotiation = MBEDTLS_SSL_SECURE_RENEGOTIATION; + break; + } + } + +#if defined(MBEDTLS_SSL_FALLBACK_SCSV) + for( i = 0, p = buf + 6; i < ciph_len; i += 3, p += 3 ) + { + if( p[0] == 0 && + p[1] == (unsigned char)( ( MBEDTLS_SSL_FALLBACK_SCSV_VALUE >> 8 ) & 0xff ) && + p[2] == (unsigned char)( ( MBEDTLS_SSL_FALLBACK_SCSV_VALUE ) & 0xff ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "received FALLBACK_SCSV" ) ); + + if( ssl->minor_ver < ssl->conf->max_minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "inapropriate fallback" ) ); + + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + break; + } + } +#endif /* MBEDTLS_SSL_FALLBACK_SCSV */ + + got_common_suite = 0; + ciphersuites = ssl->conf->ciphersuite_list[ssl->minor_ver]; + ciphersuite_info = NULL; +#if defined(MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE) + for( j = 0, p = buf + 6; j < ciph_len; j += 3, p += 3 ) + { + for( i = 0; ciphersuites[i] != 0; i++ ) +#else + for( i = 0; ciphersuites[i] != 0; i++ ) + { + for( j = 0, p = buf + 6; j < ciph_len; j += 3, p += 3 ) +#endif + { + if( p[0] != 0 || + p[1] != ( ( ciphersuites[i] >> 8 ) & 0xFF ) || + p[2] != ( ( ciphersuites[i] ) & 0xFF ) ) + continue; + + got_common_suite = 1; + + if( ( ret = ssl_ciphersuite_match( ssl, ciphersuites[i], + &ciphersuite_info ) ) != 0 ) + return( ret ); + + if( ciphersuite_info != NULL ) + goto have_ciphersuite_v2; + } + } + + if( got_common_suite ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got ciphersuites in common, " + "but none of them usable" ) ); + return( MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE ); + } + else + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no ciphersuites in common" ) ); + return( MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN ); + } + +have_ciphersuite_v2: + MBEDTLS_SSL_DEBUG_MSG( 2, ( "selected ciphersuite: %s", ciphersuite_info->name ) ); + + ssl->session_negotiate->ciphersuite = ciphersuites[i]; + ssl->transform_negotiate->ciphersuite_info = ciphersuite_info; + mbedtls_ssl_optimize_checksum( ssl, ssl->transform_negotiate->ciphersuite_info ); + + /* + * SSLv2 Client Hello relevant renegotiation security checks + */ + if( ssl->secure_renegotiation == MBEDTLS_SSL_LEGACY_RENEGOTIATION && + ssl->conf->allow_legacy_renegotiation == MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "legacy renegotiation, breaking off handshake" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ssl->in_left = 0; + ssl->state++; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse client hello v2" ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO */ + +static int ssl_parse_client_hello( mbedtls_ssl_context *ssl ) +{ + int ret, got_common_suite; + size_t i, j; + size_t ciph_offset, comp_offset, ext_offset; + size_t msg_len, ciph_len, sess_len, comp_len, ext_len; +#if defined(MBEDTLS_SSL_PROTO_DTLS) + size_t cookie_offset, cookie_len; +#endif + unsigned char *buf, *p, *ext; +#if defined(MBEDTLS_SSL_RENEGOTIATION) + int renegotiation_info_seen = 0; +#endif + int handshake_failure = 0; + const int *ciphersuites; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info; + int major, minor; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse client hello" ) ); + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) +read_record_header: +#endif + /* + * If renegotiating, then the input was read with mbedtls_ssl_read_record(), + * otherwise read it ourselves manually in order to support SSLv2 + * ClientHello, which doesn't use the same record layer format. + */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_INITIAL_HANDSHAKE ) +#endif + { + if( ( ret = mbedtls_ssl_fetch_input( ssl, 5 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_fetch_input", ret ); + return( ret ); + } + } + + buf = ssl->in_hdr; + +#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO) +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_STREAM ) +#endif + if( ( buf[0] & 0x80 ) != 0 ) + return ssl_parse_client_hello_v2( ssl ); +#endif + + MBEDTLS_SSL_DEBUG_BUF( 4, "record header", buf, mbedtls_ssl_hdr_len( ssl ) ); + + /* + * SSLv3/TLS Client Hello + * + * Record layer: + * 0 . 0 message type + * 1 . 2 protocol version + * 3 . 11 DTLS: epoch + record sequence number + * 3 . 4 message length + */ + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v3, message type: %d", + buf[0] ) ); + + if( buf[0] != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v3, message len.: %d", + ( ssl->in_len[0] << 8 ) | ssl->in_len[1] ) ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v3, protocol version: [%d:%d]", + buf[1], buf[2] ) ); + + mbedtls_ssl_read_version( &major, &minor, ssl->conf->transport, buf + 1 ); + + /* According to RFC 5246 Appendix E.1, the version here is typically + * "{03,00}, the lowest version number supported by the client, [or] the + * value of ClientHello.client_version", so the only meaningful check here + * is the major version shouldn't be less than 3 */ + if( major < MBEDTLS_SSL_MAJOR_VERSION_3 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + /* For DTLS if this is the initial handshake, remember the client sequence + * number to use it in our next message (RFC 6347 4.2.1) */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM +#if defined(MBEDTLS_SSL_RENEGOTIATION) + && ssl->renego_status == MBEDTLS_SSL_INITIAL_HANDSHAKE +#endif + ) + { + /* Epoch should be 0 for initial handshakes */ + if( ssl->in_ctr[0] != 0 || ssl->in_ctr[1] != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + memcpy( ssl->out_ctr + 2, ssl->in_ctr + 2, 6 ); + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + if( mbedtls_ssl_dtls_replay_check( ssl ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "replayed record, discarding" ) ); + ssl->next_record_offset = 0; + ssl->in_left = 0; + goto read_record_header; + } + + /* No MAC to check yet, so we can update right now */ + mbedtls_ssl_dtls_replay_update( ssl ); +#endif + } +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + + msg_len = ( ssl->in_len[0] << 8 ) | ssl->in_len[1]; + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE ) + { + /* Set by mbedtls_ssl_read_record() */ + msg_len = ssl->in_hslen; + } + else +#endif + { + if( msg_len > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + if( ( ret = mbedtls_ssl_fetch_input( ssl, mbedtls_ssl_hdr_len( ssl ) + msg_len ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_fetch_input", ret ); + return( ret ); + } + + /* Done reading this record, get ready for the next one */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + ssl->next_record_offset = msg_len + mbedtls_ssl_hdr_len( ssl ); + else +#endif + ssl->in_left = 0; + } + + buf = ssl->in_msg; + + MBEDTLS_SSL_DEBUG_BUF( 4, "record contents", buf, msg_len ); + + ssl->handshake->update_checksum( ssl, buf, msg_len ); + + /* + * Handshake layer: + * 0 . 0 handshake type + * 1 . 3 handshake length + * 4 . 5 DTLS only: message seqence number + * 6 . 8 DTLS only: fragment offset + * 9 . 11 DTLS only: fragment length + */ + if( msg_len < mbedtls_ssl_hs_hdr_len( ssl ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v3, handshake type: %d", buf[0] ) ); + + if( buf[0] != MBEDTLS_SSL_HS_CLIENT_HELLO ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "client hello v3, handshake len.: %d", + ( buf[1] << 16 ) | ( buf[2] << 8 ) | buf[3] ) ); + + /* We don't support fragmentation of ClientHello (yet?) */ + if( buf[1] != 0 || + msg_len != mbedtls_ssl_hs_hdr_len( ssl ) + ( ( buf[2] << 8 ) | buf[3] ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + /* + * Copy the client's handshake message_seq on initial handshakes, + * check sequence number on renego. + */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + { + /* This couldn't be done in ssl_prepare_handshake_record() */ + unsigned int cli_msg_seq = ( ssl->in_msg[4] << 8 ) | + ssl->in_msg[5]; + + if( cli_msg_seq != ssl->handshake->in_msg_seq ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message_seq: " + "%d (expected %d)", cli_msg_seq, + ssl->handshake->in_msg_seq ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ssl->handshake->in_msg_seq++; + } + else +#endif + { + unsigned int cli_msg_seq = ( ssl->in_msg[4] << 8 ) | + ssl->in_msg[5]; + ssl->handshake->out_msg_seq = cli_msg_seq; + ssl->handshake->in_msg_seq = cli_msg_seq + 1; + } + + /* + * For now we don't support fragmentation, so make sure + * fragment_offset == 0 and fragment_length == length + */ + if( ssl->in_msg[6] != 0 || ssl->in_msg[7] != 0 || ssl->in_msg[8] != 0 || + memcmp( ssl->in_msg + 1, ssl->in_msg + 9, 3 ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "ClientHello fragmentation not supported" ) ); + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); + } + } +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + + buf += mbedtls_ssl_hs_hdr_len( ssl ); + msg_len -= mbedtls_ssl_hs_hdr_len( ssl ); + + /* + * ClientHello layer: + * 0 . 1 protocol version + * 2 . 33 random bytes (starting with 4 bytes of Unix time) + * 34 . 35 session id length (1 byte) + * 35 . 34+x session id + * 35+x . 35+x DTLS only: cookie length (1 byte) + * 36+x . .. DTLS only: cookie + * .. . .. ciphersuite list length (2 bytes) + * .. . .. ciphersuite list + * .. . .. compression alg. list length (1 byte) + * .. . .. compression alg. list + * .. . .. extensions length (2 bytes, optional) + * .. . .. extensions (optional) + */ + + /* + * Minimal length (with everything empty and extensions ommitted) is + * 2 + 32 + 1 + 2 + 1 = 38 bytes. Check that first, so that we can + * read at least up to session id length without worrying. + */ + if( msg_len < 38 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + /* + * Check and save the protocol version + */ + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, version", buf, 2 ); + + mbedtls_ssl_read_version( &ssl->major_ver, &ssl->minor_ver, + ssl->conf->transport, buf ); + + ssl->handshake->max_major_ver = ssl->major_ver; + ssl->handshake->max_minor_ver = ssl->minor_ver; + + if( ssl->major_ver < ssl->conf->min_major_ver || + ssl->minor_ver < ssl->conf->min_minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "client only supports ssl smaller than minimum" + " [%d:%d] < [%d:%d]", + ssl->major_ver, ssl->minor_ver, + ssl->conf->min_major_ver, ssl->conf->min_minor_ver ) ); + + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION ); + + return( MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION ); + } + + if( ssl->major_ver > ssl->conf->max_major_ver ) + { + ssl->major_ver = ssl->conf->max_major_ver; + ssl->minor_ver = ssl->conf->max_minor_ver; + } + else if( ssl->minor_ver > ssl->conf->max_minor_ver ) + ssl->minor_ver = ssl->conf->max_minor_ver; + + /* + * Save client random (inc. Unix time) + */ + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, random bytes", buf + 2, 32 ); + + memcpy( ssl->handshake->randbytes, buf + 2, 32 ); + + /* + * Check the session ID length and save session ID + */ + sess_len = buf[34]; + + if( sess_len > sizeof( ssl->session_negotiate->id ) || + sess_len + 34 + 2 > msg_len ) /* 2 for cipherlist length field */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, session id", buf + 35, sess_len ); + + ssl->session_negotiate->id_len = sess_len; + memset( ssl->session_negotiate->id, 0, + sizeof( ssl->session_negotiate->id ) ); + memcpy( ssl->session_negotiate->id, buf + 35, + ssl->session_negotiate->id_len ); + + /* + * Check the cookie length and content + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + cookie_offset = 35 + sess_len; + cookie_len = buf[cookie_offset]; + + if( cookie_offset + 1 + cookie_len + 2 > msg_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, cookie", + buf + cookie_offset + 1, cookie_len ); + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) + if( ssl->conf->f_cookie_check != NULL +#if defined(MBEDTLS_SSL_RENEGOTIATION) + && ssl->renego_status == MBEDTLS_SSL_INITIAL_HANDSHAKE +#endif + ) + { + if( ssl->conf->f_cookie_check( ssl->conf->p_cookie, + buf + cookie_offset + 1, cookie_len, + ssl->cli_id, ssl->cli_id_len ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "cookie verification failed" ) ); + ssl->handshake->verify_cookie_len = 1; + } + else + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "cookie verification passed" ) ); + ssl->handshake->verify_cookie_len = 0; + } + } + else +#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY */ + { + /* We know we didn't send a cookie, so it should be empty */ + if( cookie_len != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "cookie verification skipped" ) ); + } + + /* + * Check the ciphersuitelist length (will be parsed later) + */ + ciph_offset = cookie_offset + 1 + cookie_len; + } + else +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + ciph_offset = 35 + sess_len; + + ciph_len = ( buf[ciph_offset + 0] << 8 ) + | ( buf[ciph_offset + 1] ); + + if( ciph_len < 2 || + ciph_len + 2 + ciph_offset + 1 > msg_len || /* 1 for comp. alg. len */ + ( ciph_len % 2 ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, ciphersuitelist", + buf + ciph_offset + 2, ciph_len ); + + /* + * Check the compression algorithms length and pick one + */ + comp_offset = ciph_offset + 2 + ciph_len; + + comp_len = buf[comp_offset]; + + if( comp_len < 1 || + comp_len > 16 || + comp_len + comp_offset + 1 > msg_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello, compression", + buf + comp_offset + 1, comp_len ); + + ssl->session_negotiate->compression = MBEDTLS_SSL_COMPRESS_NULL; +#if defined(MBEDTLS_ZLIB_SUPPORT) + for( i = 0; i < comp_len; ++i ) + { + if( buf[comp_offset + 1 + i] == MBEDTLS_SSL_COMPRESS_DEFLATE ) + { + ssl->session_negotiate->compression = MBEDTLS_SSL_COMPRESS_DEFLATE; + break; + } + } +#endif + + /* See comments in ssl_write_client_hello() */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + ssl->session_negotiate->compression = MBEDTLS_SSL_COMPRESS_NULL; +#endif + + /* + * Check the extension length + */ + ext_offset = comp_offset + 1 + comp_len; + if( msg_len > ext_offset ) + { + if( msg_len < ext_offset + 2 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + ext_len = ( buf[ext_offset + 0] << 8 ) + | ( buf[ext_offset + 1] ); + + if( ( ext_len > 0 && ext_len < 4 ) || + msg_len != ext_offset + 2 + ext_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + } + else + ext_len = 0; + + ext = buf + ext_offset + 2; + MBEDTLS_SSL_DEBUG_BUF( 3, "client hello extensions", ext, ext_len ); + + while( ext_len != 0 ) + { + unsigned int ext_id = ( ( ext[0] << 8 ) + | ( ext[1] ) ); + unsigned int ext_size = ( ( ext[2] << 8 ) + | ( ext[3] ) ); + + if( ext_size + 4 > ext_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + switch( ext_id ) + { +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + case MBEDTLS_TLS_EXT_SERVERNAME: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found ServerName extension" ) ); + if( ssl->conf->f_sni == NULL ) + break; + + ret = ssl_parse_servername_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */ + + case MBEDTLS_TLS_EXT_RENEGOTIATION_INFO: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found renegotiation extension" ) ); +#if defined(MBEDTLS_SSL_RENEGOTIATION) + renegotiation_info_seen = 1; +#endif + + ret = ssl_parse_renegotiation_info( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \ + defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) + case MBEDTLS_TLS_EXT_SIG_ALG: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found signature_algorithms extension" ) ); +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + break; +#endif + + ret = ssl_parse_signature_algorithms_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 && + MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */ + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + case MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found supported elliptic curves extension" ) ); + + ret = ssl_parse_supported_elliptic_curves( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; + + case MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found supported point formats extension" ) ); + ssl->handshake->cli_exts |= MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT; + + ret = ssl_parse_supported_point_formats( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C || + MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + case MBEDTLS_TLS_EXT_ECJPAKE_KKPP: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found ecjpake kkpp extension" ) ); + + ret = ssl_parse_ecjpake_kkpp( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + case MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found max fragment length extension" ) ); + + ret = ssl_parse_max_fragment_length_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + case MBEDTLS_TLS_EXT_TRUNCATED_HMAC: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found truncated hmac extension" ) ); + + ret = ssl_parse_truncated_hmac_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + case MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found encrypt then mac extension" ) ); + + ret = ssl_parse_encrypt_then_mac_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + case MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found extended master secret extension" ) ); + + ret = ssl_parse_extended_ms_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + case MBEDTLS_TLS_EXT_SESSION_TICKET: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found session ticket extension" ) ); + + ret = ssl_parse_session_ticket_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(MBEDTLS_SSL_ALPN) + case MBEDTLS_TLS_EXT_ALPN: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "found alpn extension" ) ); + + ret = ssl_parse_alpn_ext( ssl, ext + 4, ext_size ); + if( ret != 0 ) + return( ret ); + break; +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + + default: + MBEDTLS_SSL_DEBUG_MSG( 3, ( "unknown extension found: %d (ignoring)", + ext_id ) ); + } + + ext_len -= 4 + ext_size; + ext += 4 + ext_size; + + if( ext_len > 0 && ext_len < 4 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client hello message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + } + +#if defined(MBEDTLS_SSL_FALLBACK_SCSV) + for( i = 0, p = buf + 41 + sess_len; i < ciph_len; i += 2, p += 2 ) + { + if( p[0] == (unsigned char)( ( MBEDTLS_SSL_FALLBACK_SCSV_VALUE >> 8 ) & 0xff ) && + p[1] == (unsigned char)( ( MBEDTLS_SSL_FALLBACK_SCSV_VALUE ) & 0xff ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "received FALLBACK_SCSV" ) ); + + if( ssl->minor_ver < ssl->conf->max_minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "inapropriate fallback" ) ); + + mbedtls_ssl_send_alert_message( ssl, MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + break; + } + } +#endif /* MBEDTLS_SSL_FALLBACK_SCSV */ + + /* + * Check for TLS_EMPTY_RENEGOTIATION_INFO_SCSV + */ + for( i = 0, p = buf + ciph_offset + 2; i < ciph_len; i += 2, p += 2 ) + { + if( p[0] == 0 && p[1] == MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "received TLS_EMPTY_RENEGOTIATION_INFO " ) ); +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "received RENEGOTIATION SCSV during renegotiation" ) ); + + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } +#endif + ssl->secure_renegotiation = MBEDTLS_SSL_SECURE_RENEGOTIATION; + break; + } + } + + /* + * Renegotiation security checks + */ + if( ssl->secure_renegotiation != MBEDTLS_SSL_SECURE_RENEGOTIATION && + ssl->conf->allow_legacy_renegotiation == MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "legacy renegotiation, breaking off handshake" ) ); + handshake_failure = 1; + } +#if defined(MBEDTLS_SSL_RENEGOTIATION) + else if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS && + ssl->secure_renegotiation == MBEDTLS_SSL_SECURE_RENEGOTIATION && + renegotiation_info_seen == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "renegotiation_info extension missing (secure)" ) ); + handshake_failure = 1; + } + else if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS && + ssl->secure_renegotiation == MBEDTLS_SSL_LEGACY_RENEGOTIATION && + ssl->conf->allow_legacy_renegotiation == MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "legacy renegotiation not allowed" ) ); + handshake_failure = 1; + } + else if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS && + ssl->secure_renegotiation == MBEDTLS_SSL_LEGACY_RENEGOTIATION && + renegotiation_info_seen == 1 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "renegotiation_info extension present (legacy)" ) ); + handshake_failure = 1; + } +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + + if( handshake_failure == 1 ) + { + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + /* + * Search for a matching ciphersuite + * (At the end because we need information from the EC-based extensions + * and certificate from the SNI callback triggered by the SNI extension.) + */ + got_common_suite = 0; + ciphersuites = ssl->conf->ciphersuite_list[ssl->minor_ver]; + ciphersuite_info = NULL; +#if defined(MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE) + for( j = 0, p = buf + ciph_offset + 2; j < ciph_len; j += 2, p += 2 ) + { + for( i = 0; ciphersuites[i] != 0; i++ ) +#else + for( i = 0; ciphersuites[i] != 0; i++ ) + { + for( j = 0, p = buf + ciph_offset + 2; j < ciph_len; j += 2, p += 2 ) +#endif + { + if( p[0] != ( ( ciphersuites[i] >> 8 ) & 0xFF ) || + p[1] != ( ( ciphersuites[i] ) & 0xFF ) ) + continue; + + got_common_suite = 1; + + if( ( ret = ssl_ciphersuite_match( ssl, ciphersuites[i], + &ciphersuite_info ) ) != 0 ) + return( ret ); + + if( ciphersuite_info != NULL ) + goto have_ciphersuite; + } + } + + if( got_common_suite ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got ciphersuites in common, " + "but none of them usable" ) ); + mbedtls_ssl_send_fatal_handshake_failure( ssl ); + return( MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE ); + } + else + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no ciphersuites in common" ) ); + mbedtls_ssl_send_fatal_handshake_failure( ssl ); + return( MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN ); + } + +have_ciphersuite: + MBEDTLS_SSL_DEBUG_MSG( 2, ( "selected ciphersuite: %s", ciphersuite_info->name ) ); + + ssl->session_negotiate->ciphersuite = ciphersuites[i]; + ssl->transform_negotiate->ciphersuite_info = ciphersuite_info; + mbedtls_ssl_optimize_checksum( ssl, ssl->transform_negotiate->ciphersuite_info ); + + ssl->state++; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + mbedtls_ssl_recv_flight_completed( ssl ); +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse client hello" ) ); + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) +static void ssl_write_truncated_hmac_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + + if( ssl->session_negotiate->trunc_hmac == MBEDTLS_SSL_TRUNC_HMAC_DISABLED ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, adding truncated hmac extension" ) ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_TRUNCATED_HMAC >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_TRUNCATED_HMAC ) & 0xFF ); + + *p++ = 0x00; + *p++ = 0x00; + + *olen = 4; +} +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) +static void ssl_write_encrypt_then_mac_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + const mbedtls_ssl_ciphersuite_t *suite = NULL; + const mbedtls_cipher_info_t *cipher = NULL; + + if( ssl->session_negotiate->encrypt_then_mac == MBEDTLS_SSL_EXTENDED_MS_DISABLED || + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + *olen = 0; + return; + } + + /* + * RFC 7366: "If a server receives an encrypt-then-MAC request extension + * from a client and then selects a stream or Authenticated Encryption + * with Associated Data (AEAD) ciphersuite, it MUST NOT send an + * encrypt-then-MAC response extension back to the client." + */ + if( ( suite = mbedtls_ssl_ciphersuite_from_id( + ssl->session_negotiate->ciphersuite ) ) == NULL || + ( cipher = mbedtls_cipher_info_from_type( suite->cipher ) ) == NULL || + cipher->mode != MBEDTLS_MODE_CBC ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, adding encrypt then mac extension" ) ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC ) & 0xFF ); + + *p++ = 0x00; + *p++ = 0x00; + + *olen = 4; +} +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) +static void ssl_write_extended_ms_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + + if( ssl->handshake->extended_ms == MBEDTLS_SSL_EXTENDED_MS_DISABLED || + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, adding extended master secret " + "extension" ) ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET ) & 0xFF ); + + *p++ = 0x00; + *p++ = 0x00; + + *olen = 4; +} +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +static void ssl_write_session_ticket_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + + if( ssl->handshake->new_session_ticket == 0 ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, adding session ticket extension" ) ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SESSION_TICKET >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SESSION_TICKET ) & 0xFF ); + + *p++ = 0x00; + *p++ = 0x00; + + *olen = 4; +} +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +static void ssl_write_renegotiation_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + + if( ssl->secure_renegotiation != MBEDTLS_SSL_SECURE_RENEGOTIATION ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, secure renegotiation extension" ) ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_RENEGOTIATION_INFO >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_RENEGOTIATION_INFO ) & 0xFF ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status != MBEDTLS_SSL_INITIAL_HANDSHAKE ) + { + *p++ = 0x00; + *p++ = ( ssl->verify_data_len * 2 + 1 ) & 0xFF; + *p++ = ssl->verify_data_len * 2 & 0xFF; + + memcpy( p, ssl->peer_verify_data, ssl->verify_data_len ); + p += ssl->verify_data_len; + memcpy( p, ssl->own_verify_data, ssl->verify_data_len ); + p += ssl->verify_data_len; + } + else +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + { + *p++ = 0x00; + *p++ = 0x01; + *p++ = 0x00; + } + + *olen = p - buf; +} + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +static void ssl_write_max_fragment_length_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + + if( ssl->session_negotiate->mfl_code == MBEDTLS_SSL_MAX_FRAG_LEN_NONE ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, max_fragment_length extension" ) ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH ) & 0xFF ); + + *p++ = 0x00; + *p++ = 1; + + *p++ = ssl->session_negotiate->mfl_code; + + *olen = 5; +} +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static void ssl_write_supported_point_formats_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + unsigned char *p = buf; + ((void) ssl); + + if( ( ssl->handshake->cli_exts & + MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT ) == 0 ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, supported_point_formats extension" ) ); + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS ) & 0xFF ); + + *p++ = 0x00; + *p++ = 2; + + *p++ = 1; + *p++ = MBEDTLS_ECP_PF_UNCOMPRESSED; + + *olen = 6; +} +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C || MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +static void ssl_write_ecjpake_kkpp_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, + size_t *olen ) +{ + int ret; + unsigned char *p = buf; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + size_t kkpp_len; + + *olen = 0; + + /* Skip costly computation if not needed */ + if( ssl->transform_negotiate->ciphersuite_info->key_exchange != + MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + return; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, ecjpake kkpp extension" ) ); + + if( end - p < 4 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "buffer too small" ) ); + return; + } + + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ECJPAKE_KKPP >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( MBEDTLS_TLS_EXT_ECJPAKE_KKPP ) & 0xFF ); + + ret = mbedtls_ecjpake_write_round_one( &ssl->handshake->ecjpake_ctx, + p + 2, end - p - 2, &kkpp_len, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1 , "mbedtls_ecjpake_write_round_one", ret ); + return; + } + + *p++ = (unsigned char)( ( kkpp_len >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( kkpp_len ) & 0xFF ); + + *olen = kkpp_len + 4; +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_SSL_ALPN ) +static void ssl_write_alpn_ext( mbedtls_ssl_context *ssl, + unsigned char *buf, size_t *olen ) +{ + if( ssl->alpn_chosen == NULL ) + { + *olen = 0; + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, adding alpn extension" ) ); + + /* + * 0 . 1 ext identifier + * 2 . 3 ext length + * 4 . 5 protocol list length + * 6 . 6 protocol name length + * 7 . 7+n protocol name + */ + buf[0] = (unsigned char)( ( MBEDTLS_TLS_EXT_ALPN >> 8 ) & 0xFF ); + buf[1] = (unsigned char)( ( MBEDTLS_TLS_EXT_ALPN ) & 0xFF ); + + *olen = 7 + strlen( ssl->alpn_chosen ); + + buf[2] = (unsigned char)( ( ( *olen - 4 ) >> 8 ) & 0xFF ); + buf[3] = (unsigned char)( ( ( *olen - 4 ) ) & 0xFF ); + + buf[4] = (unsigned char)( ( ( *olen - 6 ) >> 8 ) & 0xFF ); + buf[5] = (unsigned char)( ( ( *olen - 6 ) ) & 0xFF ); + + buf[6] = (unsigned char)( ( ( *olen - 7 ) ) & 0xFF ); + + memcpy( buf + 7, ssl->alpn_chosen, *olen - 7 ); +} +#endif /* MBEDTLS_ECDH_C || MBEDTLS_ECDSA_C */ + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) +static int ssl_write_hello_verify_request( mbedtls_ssl_context *ssl ) +{ + int ret; + unsigned char *p = ssl->out_msg + 4; + unsigned char *cookie_len_byte; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write hello verify request" ) ); + + /* + * struct { + * ProtocolVersion server_version; + * opaque cookie<0..2^8-1>; + * } HelloVerifyRequest; + */ + + /* The RFC is not clear on this point, but sending the actual negotiated + * version looks like the most interoperable thing to do. */ + mbedtls_ssl_write_version( ssl->major_ver, ssl->minor_ver, + ssl->conf->transport, p ); + MBEDTLS_SSL_DEBUG_BUF( 3, "server version", p, 2 ); + p += 2; + + /* If we get here, f_cookie_check is not null */ + if( ssl->conf->f_cookie_write == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "inconsistent cookie callbacks" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + /* Skip length byte until we know the length */ + cookie_len_byte = p++; + + if( ( ret = ssl->conf->f_cookie_write( ssl->conf->p_cookie, + &p, ssl->out_buf + MBEDTLS_SSL_BUFFER_LEN, + ssl->cli_id, ssl->cli_id_len ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "f_cookie_write", ret ); + return( ret ); + } + + *cookie_len_byte = (unsigned char)( p - ( cookie_len_byte + 1 ) ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "cookie sent", cookie_len_byte + 1, *cookie_len_byte ); + + ssl->out_msglen = p - ssl->out_msg; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST; + + ssl->state = MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write hello verify request" ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY */ + +static int ssl_write_server_hello( mbedtls_ssl_context *ssl ) +{ +#if defined(MBEDTLS_HAVE_TIME) + time_t t; +#endif + int ret; + size_t olen, ext_len = 0, n; + unsigned char *buf, *p; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write server hello" ) ); + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake->verify_cookie_len != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "client hello was not authenticated" ) ); + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write server hello" ) ); + + return( ssl_write_hello_verify_request( ssl ) ); + } +#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY */ + + if( ssl->conf->f_rng == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "no RNG provided") ); + return( MBEDTLS_ERR_SSL_NO_RNG ); + } + + /* + * 0 . 0 handshake type + * 1 . 3 handshake length + * 4 . 5 protocol version + * 6 . 9 UNIX time() + * 10 . 37 random bytes + */ + buf = ssl->out_msg; + p = buf + 4; + + mbedtls_ssl_write_version( ssl->major_ver, ssl->minor_ver, + ssl->conf->transport, p ); + p += 2; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, chosen version: [%d:%d]", + buf[4], buf[5] ) ); + +#if defined(MBEDTLS_HAVE_TIME) + t = time( NULL ); + *p++ = (unsigned char)( t >> 24 ); + *p++ = (unsigned char)( t >> 16 ); + *p++ = (unsigned char)( t >> 8 ); + *p++ = (unsigned char)( t ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, current time: %lu", t ) ); +#else + if( ( ret = ssl->conf->f_rng( ssl->conf->p_rng, p, 4 ) ) != 0 ) + return( ret ); + + p += 4; +#endif /* MBEDTLS_HAVE_TIME */ + + if( ( ret = ssl->conf->f_rng( ssl->conf->p_rng, p, 28 ) ) != 0 ) + return( ret ); + + p += 28; + + memcpy( ssl->handshake->randbytes + 32, buf + 6, 32 ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "server hello, random bytes", buf + 6, 32 ); + + /* + * Resume is 0 by default, see ssl_handshake_init(). + * It may be already set to 1 by ssl_parse_session_ticket_ext(). + * If not, try looking up session ID in our cache. + */ + if( ssl->handshake->resume == 0 && +#if defined(MBEDTLS_SSL_RENEGOTIATION) + ssl->renego_status == MBEDTLS_SSL_INITIAL_HANDSHAKE && +#endif + ssl->session_negotiate->id_len != 0 && + ssl->conf->f_get_cache != NULL && + ssl->conf->f_get_cache( ssl->conf->p_cache, ssl->session_negotiate ) == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "session successfully restored from cache" ) ); + ssl->handshake->resume = 1; + } + + if( ssl->handshake->resume == 0 ) + { + /* + * New session, create a new session id, + * unless we're about to issue a session ticket + */ + ssl->state++; + +#if defined(MBEDTLS_HAVE_TIME) + ssl->session_negotiate->start = time( NULL ); +#endif + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + if( ssl->handshake->new_session_ticket != 0 ) + { + ssl->session_negotiate->id_len = n = 0; + memset( ssl->session_negotiate->id, 0, 32 ); + } + else +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + { + ssl->session_negotiate->id_len = n = 32; + if( ( ret = ssl->conf->f_rng( ssl->conf->p_rng, ssl->session_negotiate->id, + n ) ) != 0 ) + return( ret ); + } + } + else + { + /* + * Resuming a session + */ + n = ssl->session_negotiate->id_len; + ssl->state = MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC; + + if( ( ret = mbedtls_ssl_derive_keys( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_derive_keys", ret ); + return( ret ); + } + } + + /* + * 38 . 38 session id length + * 39 . 38+n session id + * 39+n . 40+n chosen ciphersuite + * 41+n . 41+n chosen compression alg. + * 42+n . 43+n extensions length + * 44+n . 43+n+m extensions + */ + *p++ = (unsigned char) ssl->session_negotiate->id_len; + memcpy( p, ssl->session_negotiate->id, ssl->session_negotiate->id_len ); + p += ssl->session_negotiate->id_len; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, session id len.: %d", n ) ); + MBEDTLS_SSL_DEBUG_BUF( 3, "server hello, session id", buf + 39, n ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "%s session has been resumed", + ssl->handshake->resume ? "a" : "no" ) ); + + *p++ = (unsigned char)( ssl->session_negotiate->ciphersuite >> 8 ); + *p++ = (unsigned char)( ssl->session_negotiate->ciphersuite ); + *p++ = (unsigned char)( ssl->session_negotiate->compression ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, chosen ciphersuite: %s", + mbedtls_ssl_get_ciphersuite_name( ssl->session_negotiate->ciphersuite ) ) ); + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, compress alg.: 0x%02X", + ssl->session_negotiate->compression ) ); + + /* + * First write extensions, then the total length + */ + ssl_write_renegotiation_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + ssl_write_max_fragment_length_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + ssl_write_truncated_hmac_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + ssl_write_encrypt_then_mac_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + ssl_write_extended_ms_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + ssl_write_session_ticket_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + ssl_write_supported_point_formats_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + ssl_write_ecjpake_kkpp_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + +#if defined(MBEDTLS_SSL_ALPN) + ssl_write_alpn_ext( ssl, p + 2 + ext_len, &olen ); + ext_len += olen; +#endif + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "server hello, total extension length: %d", ext_len ) ); + + if( ext_len > 0 ) + { + *p++ = (unsigned char)( ( ext_len >> 8 ) & 0xFF ); + *p++ = (unsigned char)( ( ext_len ) & 0xFF ); + p += ext_len; + } + + ssl->out_msglen = p - buf; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_SERVER_HELLO; + + ret = mbedtls_ssl_write_record( ssl ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write server hello" ) ); + + return( ret ); +} + +#if !defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) +static int ssl_write_certificate_request( mbedtls_ssl_context *ssl ) +{ + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write certificate request" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate request" ) ); + ssl->state++; + return( 0 ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); +} +#else +static int ssl_write_certificate_request( mbedtls_ssl_context *ssl ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + size_t dn_size, total_dn_size; /* excluding length bytes */ + size_t ct_len, sa_len; /* including length bytes */ + unsigned char *buf, *p; + const unsigned char * const end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + const mbedtls_x509_crt *crt; + int authmode; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write certificate request" ) ); + + ssl->state++; + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + if( ssl->handshake->sni_authmode != MBEDTLS_SSL_VERIFY_UNSET ) + authmode = ssl->handshake->sni_authmode; + else +#endif + authmode = ssl->conf->authmode; + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE || + authmode == MBEDTLS_SSL_VERIFY_NONE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate request" ) ); + return( 0 ); + } + + /* + * 0 . 0 handshake type + * 1 . 3 handshake length + * 4 . 4 cert type count + * 5 .. m-1 cert types + * m .. m+1 sig alg length (TLS 1.2 only) + * m+1 .. n-1 SignatureAndHashAlgorithms (TLS 1.2 only) + * n .. n+1 length of all DNs + * n+2 .. n+3 length of DN 1 + * n+4 .. ... Distinguished Name #1 + * ... .. ... length of DN 2, etc. + */ + buf = ssl->out_msg; + p = buf + 4; + + /* + * Supported certificate types + * + * ClientCertificateType certificate_types<1..2^8-1>; + * enum { (255) } ClientCertificateType; + */ + ct_len = 0; + +#if defined(MBEDTLS_RSA_C) + p[1 + ct_len++] = MBEDTLS_SSL_CERT_TYPE_RSA_SIGN; +#endif +#if defined(MBEDTLS_ECDSA_C) + p[1 + ct_len++] = MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN; +#endif + + p[0] = (unsigned char) ct_len++; + p += ct_len; + + sa_len = 0; +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + /* + * Add signature_algorithms for verify (TLS 1.2) + * + * SignatureAndHashAlgorithm supported_signature_algorithms<2..2^16-2>; + * + * struct { + * HashAlgorithm hash; + * SignatureAlgorithm signature; + * } SignatureAndHashAlgorithm; + * + * enum { (255) } HashAlgorithm; + * enum { (255) } SignatureAlgorithm; + */ + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + /* + * Only use current running hash algorithm that is already required + * for requested ciphersuite. + */ + ssl->handshake->verify_sig_alg = MBEDTLS_SSL_HASH_SHA256; + + if( ssl->transform_negotiate->ciphersuite_info->mac == + MBEDTLS_MD_SHA384 ) + { + ssl->handshake->verify_sig_alg = MBEDTLS_SSL_HASH_SHA384; + } + + /* + * Supported signature algorithms + */ +#if defined(MBEDTLS_RSA_C) + p[2 + sa_len++] = ssl->handshake->verify_sig_alg; + p[2 + sa_len++] = MBEDTLS_SSL_SIG_RSA; +#endif +#if defined(MBEDTLS_ECDSA_C) + p[2 + sa_len++] = ssl->handshake->verify_sig_alg; + p[2 + sa_len++] = MBEDTLS_SSL_SIG_ECDSA; +#endif + + p[0] = (unsigned char)( sa_len >> 8 ); + p[1] = (unsigned char)( sa_len ); + sa_len += 2; + p += sa_len; + } +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + + /* + * DistinguishedName certificate_authorities<0..2^16-1>; + * opaque DistinguishedName<1..2^16-1>; + */ + p += 2; +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + if( ssl->handshake->sni_ca_chain != NULL ) + crt = ssl->handshake->sni_ca_chain; + else +#endif + crt = ssl->conf->ca_chain; + + total_dn_size = 0; + while( crt != NULL && crt->version != 0 ) + { + dn_size = crt->subject_raw.len; + + if( end < p || + (size_t)( end - p ) < dn_size || + (size_t)( end - p ) < 2 + dn_size ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "skipping CAs: buffer too short" ) ); + break; + } + + *p++ = (unsigned char)( dn_size >> 8 ); + *p++ = (unsigned char)( dn_size ); + memcpy( p, crt->subject_raw.p, dn_size ); + p += dn_size; + + MBEDTLS_SSL_DEBUG_BUF( 3, "requested DN", p - dn_size, dn_size ); + + total_dn_size += 2 + dn_size; + crt = crt->next; + } + + ssl->out_msglen = p - buf; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_CERTIFICATE_REQUEST; + ssl->out_msg[4 + ct_len + sa_len] = (unsigned char)( total_dn_size >> 8 ); + ssl->out_msg[5 + ct_len + sa_len] = (unsigned char)( total_dn_size ); + + ret = mbedtls_ssl_write_record( ssl ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write certificate request" ) ); + + return( ret ); +} +#endif /* !MBEDTLS_KEY_EXCHANGE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) +static int ssl_get_ecdh_params_from_cert( mbedtls_ssl_context *ssl ) +{ + int ret; + + if( ! mbedtls_pk_can_do( mbedtls_ssl_own_key( ssl ), MBEDTLS_PK_ECKEY ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "server key not ECDH capable" ) ); + return( MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH ); + } + + if( ( ret = mbedtls_ecdh_get_params( &ssl->handshake->ecdh_ctx, + mbedtls_pk_ec( *mbedtls_ssl_own_key( ssl ) ), + MBEDTLS_ECDH_OURS ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "mbedtls_ecdh_get_params" ), ret ); + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || + MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ + +static int ssl_write_server_key_exchange( mbedtls_ssl_context *ssl ) +{ + int ret; + size_t n = 0; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = + ssl->transform_negotiate->ciphersuite_info; + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + unsigned char *p = ssl->out_msg + 4; + unsigned char *dig_signed = p; + size_t dig_signed_len = 0, len; + ((void) dig_signed); + ((void) dig_signed_len); + ((void) len); +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write server key exchange" ) ); + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write server key exchange" ) ); + ssl->state++; + return( 0 ); + } +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA ) + { + ssl_get_ecdh_params_from_cert( ssl ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write server key exchange" ) ); + ssl->state++; + return( 0 ); + } +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + size_t jlen; + const unsigned char *end = ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN; + + ret = mbedtls_ecjpake_write_round_two( &ssl->handshake->ecjpake_ctx, + p, end - p, &jlen, ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_write_round_two", ret ); + return( ret ); + } + + p += jlen; + n += jlen; + } +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK ) + { + /* TODO: Support identity hints */ + *(p++) = 0x00; + *(p++) = 0x00; + + n += 2; + } +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK ) + { + if( ssl->conf->dhm_P.p == NULL || ssl->conf->dhm_G.p == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "no DH parameters set" ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + /* + * Ephemeral DH parameters: + * + * struct { + * opaque dh_p<1..2^16-1>; + * opaque dh_g<1..2^16-1>; + * opaque dh_Ys<1..2^16-1>; + * } ServerDHParams; + */ + if( ( ret = mbedtls_mpi_copy( &ssl->handshake->dhm_ctx.P, &ssl->conf->dhm_P ) ) != 0 || + ( ret = mbedtls_mpi_copy( &ssl->handshake->dhm_ctx.G, &ssl->conf->dhm_G ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_mpi_copy", ret ); + return( ret ); + } + + if( ( ret = mbedtls_dhm_make_params( &ssl->handshake->dhm_ctx, + (int) mbedtls_mpi_size( &ssl->handshake->dhm_ctx.P ), + p, &len, ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_dhm_make_params", ret ); + return( ret ); + } + + dig_signed = p; + dig_signed_len = len; + + p += len; + n += len; + + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: X ", &ssl->handshake->dhm_ctx.X ); + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: P ", &ssl->handshake->dhm_ctx.P ); + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: G ", &ssl->handshake->dhm_ctx.G ); + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: GX", &ssl->handshake->dhm_ctx.GX ); + } +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK ) + { + /* + * Ephemeral ECDH parameters: + * + * struct { + * ECParameters curve_params; + * ECPoint public; + * } ServerECDHParams; + */ + const mbedtls_ecp_curve_info **curve = NULL; + const mbedtls_ecp_group_id *gid; + + /* Match our preference list against the offered curves */ + for( gid = ssl->conf->curve_list; *gid != MBEDTLS_ECP_DP_NONE; gid++ ) + for( curve = ssl->handshake->curves; *curve != NULL; curve++ ) + if( (*curve)->grp_id == *gid ) + goto curve_matching_done; + +curve_matching_done: + if( curve == NULL || *curve == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "no matching curve for ECDHE" ) ); + return( MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "ECDHE curve: %s", (*curve)->name ) ); + + if( ( ret = mbedtls_ecp_group_load( &ssl->handshake->ecdh_ctx.grp, + (*curve)->grp_id ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecp_group_load", ret ); + return( ret ); + } + + if( ( ret = mbedtls_ecdh_make_params( &ssl->handshake->ecdh_ctx, &len, + p, MBEDTLS_SSL_MAX_CONTENT_LEN - n, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_make_params", ret ); + return( ret ); + } + + dig_signed = p; + dig_signed_len = len; + + p += len; + n += len; + + MBEDTLS_SSL_DEBUG_ECP( 3, "ECDH: Q ", &ssl->handshake->ecdh_ctx.Q ); + } +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA ) + { + size_t signature_len = 0; + unsigned int hashlen = 0; + unsigned char hash[64]; + mbedtls_md_type_t md_alg = MBEDTLS_MD_NONE; + + /* + * Choose hash algorithm. NONE means MD5 + SHA1 here. + */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + md_alg = mbedtls_ssl_md_alg_from_hash( ssl->handshake->sig_alg ); + + if( md_alg == MBEDTLS_MD_NONE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( ciphersuite_info->key_exchange == + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA ) + { + md_alg = MBEDTLS_MD_SHA1; + } + else +#endif + { + md_alg = MBEDTLS_MD_NONE; + } + + /* + * Compute the hash to be signed + */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( md_alg == MBEDTLS_MD_NONE ) + { + mbedtls_md5_context mbedtls_md5; + mbedtls_sha1_context mbedtls_sha1; + + mbedtls_md5_init( &mbedtls_md5 ); + mbedtls_sha1_init( &mbedtls_sha1 ); + + /* + * digitally-signed struct { + * opaque md5_hash[16]; + * opaque sha_hash[20]; + * }; + * + * md5_hash + * MD5(ClientHello.random + ServerHello.random + * + ServerParams); + * sha_hash + * SHA(ClientHello.random + ServerHello.random + * + ServerParams); + */ + mbedtls_md5_starts( &mbedtls_md5 ); + mbedtls_md5_update( &mbedtls_md5, ssl->handshake->randbytes, 64 ); + mbedtls_md5_update( &mbedtls_md5, dig_signed, dig_signed_len ); + mbedtls_md5_finish( &mbedtls_md5, hash ); + + mbedtls_sha1_starts( &mbedtls_sha1 ); + mbedtls_sha1_update( &mbedtls_sha1, ssl->handshake->randbytes, 64 ); + mbedtls_sha1_update( &mbedtls_sha1, dig_signed, dig_signed_len ); + mbedtls_sha1_finish( &mbedtls_sha1, hash + 16 ); + + hashlen = 36; + + mbedtls_md5_free( &mbedtls_md5 ); + mbedtls_sha1_free( &mbedtls_sha1 ); + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 || MBEDTLS_SSL_PROTO_TLS1 || \ + MBEDTLS_SSL_PROTO_TLS1_1 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( md_alg != MBEDTLS_MD_NONE ) + { + mbedtls_md_context_t ctx; + const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type( md_alg ); + + mbedtls_md_init( &ctx ); + + /* Info from md_alg will be used instead */ + hashlen = 0; + + /* + * digitally-signed struct { + * opaque client_random[32]; + * opaque server_random[32]; + * ServerDHParams params; + * }; + */ + if( ( ret = mbedtls_md_setup( &ctx, md_info, 0 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_md_setup", ret ); + return( ret ); + } + + mbedtls_md_starts( &ctx ); + mbedtls_md_update( &ctx, ssl->handshake->randbytes, 64 ); + mbedtls_md_update( &ctx, dig_signed, dig_signed_len ); + mbedtls_md_finish( &ctx, hash ); + mbedtls_md_free( &ctx ); + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \ + MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_BUF( 3, "parameters hash", hash, hashlen != 0 ? hashlen : + (unsigned int) ( mbedtls_md_get_size( mbedtls_md_info_from_type( md_alg ) ) ) ); + + /* + * Make the signature + */ + if( mbedtls_ssl_own_key( ssl ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no private key" ) ); + return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED ); + } + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + *(p++) = ssl->handshake->sig_alg; + *(p++) = mbedtls_ssl_sig_from_pk( mbedtls_ssl_own_key( ssl ) ); + + n += 2; + } +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + + if( ( ret = mbedtls_pk_sign( mbedtls_ssl_own_key( ssl ), md_alg, hash, hashlen, + p + 2 , &signature_len, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_pk_sign", ret ); + return( ret ); + } + + *(p++) = (unsigned char)( signature_len >> 8 ); + *(p++) = (unsigned char)( signature_len ); + n += 2; + + MBEDTLS_SSL_DEBUG_BUF( 3, "my signature", p, signature_len ); + + n += signature_len; + } +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || + MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ + + ssl->out_msglen = 4 + n; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE; + + ssl->state++; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write server key exchange" ) ); + + return( 0 ); +} + +static int ssl_write_server_hello_done( mbedtls_ssl_context *ssl ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write server hello done" ) ); + + ssl->out_msglen = 4; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_SERVER_HELLO_DONE; + + ssl->state++; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + mbedtls_ssl_send_flight_completed( ssl ); +#endif + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write server hello done" ) ); + + return( 0 ); +} + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) +static int ssl_parse_client_dh_public( mbedtls_ssl_context *ssl, unsigned char **p, + const unsigned char *end ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + size_t n; + + /* + * Receive G^Y mod P, premaster = (G^Y)^X mod P + */ + if( *p + 2 > end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + n = ( (*p)[0] << 8 ) | (*p)[1]; + *p += 2; + + if( *p + n > end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + if( ( ret = mbedtls_dhm_read_public( &ssl->handshake->dhm_ctx, *p, n ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_dhm_read_public", ret ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP ); + } + + *p += n; + + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: GY", &ssl->handshake->dhm_ctx.GY ); + + return( ret ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) +static int ssl_parse_encrypted_pms( mbedtls_ssl_context *ssl, + const unsigned char *p, + const unsigned char *end, + size_t pms_offset ) +{ + int ret; + size_t len = mbedtls_pk_get_len( mbedtls_ssl_own_key( ssl ) ); + unsigned char *pms = ssl->handshake->premaster + pms_offset; + unsigned char ver[2]; + unsigned char fake_pms[48], peer_pms[48]; + unsigned char mask; + size_t i, peer_pmslen; + unsigned int diff; + + if( ! mbedtls_pk_can_do( mbedtls_ssl_own_key( ssl ), MBEDTLS_PK_RSA ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no RSA private key" ) ); + return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED ); + } + + /* + * Decrypt the premaster using own private RSA key + */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver != MBEDTLS_SSL_MINOR_VERSION_0 ) + { + if( *p++ != ( ( len >> 8 ) & 0xFF ) || + *p++ != ( ( len ) & 0xFF ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + } +#endif + + if( p + len != end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + mbedtls_ssl_write_version( ssl->handshake->max_major_ver, + ssl->handshake->max_minor_ver, + ssl->conf->transport, ver ); + + /* + * Protection against Bleichenbacher's attack: invalid PKCS#1 v1.5 padding + * must not cause the connection to end immediately; instead, send a + * bad_record_mac later in the handshake. + * Also, avoid data-dependant branches here to protect against + * timing-based variants. + */ + ret = ssl->conf->f_rng( ssl->conf->p_rng, fake_pms, sizeof( fake_pms ) ); + if( ret != 0 ) + return( ret ); + + ret = mbedtls_pk_decrypt( mbedtls_ssl_own_key( ssl ), p, len, + peer_pms, &peer_pmslen, + sizeof( peer_pms ), + ssl->conf->f_rng, ssl->conf->p_rng ); + + diff = (unsigned int) ret; + diff |= peer_pmslen ^ 48; + diff |= peer_pms[0] ^ ver[0]; + diff |= peer_pms[1] ^ ver[1]; + +#if defined(MBEDTLS_SSL_DEBUG_ALL) + if( diff != 0 ) + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); +#endif + + if( sizeof( ssl->handshake->premaster ) < pms_offset || + sizeof( ssl->handshake->premaster ) - pms_offset < 48 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + ssl->handshake->pmslen = 48; + + /* mask = diff ? 0xff : 0x00 using bit operations to avoid branches */ + /* MSVC has a warning about unary minus on unsigned, but this is + * well-defined and precisely what we want to do here */ +#if defined(_MSC_VER) +#pragma warning( push ) +#pragma warning( disable : 4146 ) +#endif + mask = - ( ( diff | - diff ) >> ( sizeof( unsigned int ) * 8 - 1 ) ); +#if defined(_MSC_VER) +#pragma warning( pop ) +#endif + + for( i = 0; i < ssl->handshake->pmslen; i++ ) + pms[i] = ( mask & fake_pms[i] ) | ( (~mask) & peer_pms[i] ); + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) +static int ssl_parse_client_psk_identity( mbedtls_ssl_context *ssl, unsigned char **p, + const unsigned char *end ) +{ + int ret = 0; + size_t n; + + if( ssl->conf->f_psk == NULL && + ( ssl->conf->psk == NULL || ssl->conf->psk_identity == NULL || + ssl->conf->psk_identity_len == 0 || ssl->conf->psk_len == 0 ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no pre-shared key" ) ); + return( MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED ); + } + + /* + * Receive client pre-shared key identity name + */ + if( *p + 2 > end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + n = ( (*p)[0] << 8 ) | (*p)[1]; + *p += 2; + + if( n < 1 || n > 65535 || *p + n > end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + if( ssl->conf->f_psk != NULL ) + { + if( ssl->conf->f_psk( ssl->conf->p_psk, ssl, *p, n ) != 0 ) + ret = MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY; + } + else + { + /* Identity is not a big secret since clients send it in the clear, + * but treat it carefully anyway, just in case */ + if( n != ssl->conf->psk_identity_len || + mbedtls_ssl_safer_memcmp( ssl->conf->psk_identity, *p, n ) != 0 ) + { + ret = MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY; + } + } + + if( ret == MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY ) + { + MBEDTLS_SSL_DEBUG_BUF( 3, "Unknown PSK identity", *p, n ); + if( ( ret = mbedtls_ssl_send_alert_message( ssl, + MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY ) ) != 0 ) + { + return( ret ); + } + + return( MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY ); + } + + *p += n; + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ + +static int ssl_parse_client_key_exchange( mbedtls_ssl_context *ssl ) +{ + int ret; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info; + unsigned char *p, *end; + + ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse client key exchange" ) ); + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + p = ssl->in_msg + mbedtls_ssl_hs_hdr_len( ssl ); + end = ssl->in_msg + ssl->in_hslen; + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + if( ssl->in_msg[0] != MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_RSA ) + { + if( ( ret = ssl_parse_client_dh_public( ssl, &p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_client_dh_public" ), ret ); + return( ret ); + } + + if( p != end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + if( ( ret = mbedtls_dhm_calc_secret( &ssl->handshake->dhm_ctx, + ssl->handshake->premaster, + MBEDTLS_PREMASTER_SIZE, + &ssl->handshake->pmslen, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_dhm_calc_secret", ret ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS ); + } + + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: K ", &ssl->handshake->dhm_ctx.K ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_RSA || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA ) + { + if( ( ret = mbedtls_ecdh_read_public( &ssl->handshake->ecdh_ctx, + p, end - p) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_read_public", ret ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP ); + } + + MBEDTLS_SSL_DEBUG_ECP( 3, "ECDH: Qp ", &ssl->handshake->ecdh_ctx.Qp ); + + if( ( ret = mbedtls_ecdh_calc_secret( &ssl->handshake->ecdh_ctx, + &ssl->handshake->pmslen, + ssl->handshake->premaster, + MBEDTLS_MPI_MAX_SIZE, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_calc_secret", ret ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS ); + } + + MBEDTLS_SSL_DEBUG_MPI( 3, "ECDH: z ", &ssl->handshake->ecdh_ctx.z ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED || + MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK ) + { + if( ( ret = ssl_parse_client_psk_identity( ssl, &p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_client_psk_identity" ), ret ); + return( ret ); + } + + if( p != end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + if( ( ret = mbedtls_ssl_psk_derive_premaster( ssl, + ciphersuite_info->key_exchange ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_psk_derive_premaster", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK ) + { + if( ( ret = ssl_parse_client_psk_identity( ssl, &p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_client_psk_identity" ), ret ); + return( ret ); + } + + if( ( ret = ssl_parse_encrypted_pms( ssl, p, end, 2 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_encrypted_pms" ), ret ); + return( ret ); + } + + if( ( ret = mbedtls_ssl_psk_derive_premaster( ssl, + ciphersuite_info->key_exchange ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_psk_derive_premaster", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK ) + { + if( ( ret = ssl_parse_client_psk_identity( ssl, &p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_client_psk_identity" ), ret ); + return( ret ); + } + if( ( ret = ssl_parse_client_dh_public( ssl, &p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_client_dh_public" ), ret ); + return( ret ); + } + + if( p != end ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad client key exchange" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE ); + } + + if( ( ret = mbedtls_ssl_psk_derive_premaster( ssl, + ciphersuite_info->key_exchange ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_psk_derive_premaster", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK ) + { + if( ( ret = ssl_parse_client_psk_identity( ssl, &p, end ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_client_psk_identity" ), ret ); + return( ret ); + } + + if( ( ret = mbedtls_ecdh_read_public( &ssl->handshake->ecdh_ctx, + p, end - p ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_read_public", ret ); + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP ); + } + + MBEDTLS_SSL_DEBUG_ECP( 3, "ECDH: Qp ", &ssl->handshake->ecdh_ctx.Qp ); + + if( ( ret = mbedtls_ssl_psk_derive_premaster( ssl, + ciphersuite_info->key_exchange ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_psk_derive_premaster", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA ) + { + if( ( ret = ssl_parse_encrypted_pms( ssl, p, end, 0 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, ( "ssl_parse_parse_encrypted_pms_secret" ), ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + ret = mbedtls_ecjpake_read_round_two( &ssl->handshake->ecjpake_ctx, + p, end - p ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_read_round_two", ret ); + return( MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE ); + } + + ret = mbedtls_ecjpake_derive_secret( &ssl->handshake->ecjpake_ctx, + ssl->handshake->premaster, 32, &ssl->handshake->pmslen, + ssl->conf->f_rng, ssl->conf->p_rng ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecjpake_derive_secret", ret ); + return( ret ); + } + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + if( ( ret = mbedtls_ssl_derive_keys( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_derive_keys", ret ); + return( ret ); + } + + ssl->state++; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse client key exchange" ) ); + + return( 0 ); +} + +#if !defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) +static int ssl_parse_certificate_verify( mbedtls_ssl_context *ssl ) +{ + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse certificate verify" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate verify" ) ); + ssl->state++; + return( 0 ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); +} +#else +static int ssl_parse_certificate_verify( mbedtls_ssl_context *ssl ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + size_t i, sig_len; + unsigned char hash[48]; + unsigned char *hash_start = hash; + size_t hashlen; +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + mbedtls_pk_type_t pk_alg; +#endif + mbedtls_md_type_t md_alg; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse certificate verify" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE || + ssl->session_negotiate->peer_cert == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate verify" ) ); + ssl->state++; + return( 0 ); + } + + /* Needs to be done before read_record() to exclude current message */ + ssl->handshake->calc_verify( ssl, hash ); + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + ssl->state++; + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE || + ssl->in_msg[0] != MBEDTLS_SSL_HS_CERTIFICATE_VERIFY ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate verify message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY ); + } + + i = mbedtls_ssl_hs_hdr_len( ssl ); + + /* + * struct { + * SignatureAndHashAlgorithm algorithm; -- TLS 1.2 only + * opaque signature<0..2^16-1>; + * } DigitallySigned; + */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( ssl->minor_ver != MBEDTLS_SSL_MINOR_VERSION_3 ) + { + md_alg = MBEDTLS_MD_NONE; + hashlen = 36; + + /* For ECDSA, use SHA-1, not MD-5 + SHA-1 */ + if( mbedtls_pk_can_do( &ssl->session_negotiate->peer_cert->pk, + MBEDTLS_PK_ECDSA ) ) + { + hash_start += 16; + hashlen -= 16; + md_alg = MBEDTLS_MD_SHA1; + } + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 || MBEDTLS_SSL_PROTO_TLS1 || + MBEDTLS_SSL_PROTO_TLS1_1 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + if( i + 2 > ssl->in_hslen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate verify message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY ); + } + + /* + * Hash + */ + if( ssl->in_msg[i] != ssl->handshake->verify_sig_alg ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "peer not adhering to requested sig_alg" + " for verify message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY ); + } + + md_alg = mbedtls_ssl_md_alg_from_hash( ssl->handshake->verify_sig_alg ); + + /* Info from md_alg will be used instead */ + hashlen = 0; + + i++; + + /* + * Signature + */ + if( ( pk_alg = mbedtls_ssl_pk_alg_from_sig( ssl->in_msg[i] ) ) + == MBEDTLS_PK_NONE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "peer not adhering to requested sig_alg" + " for verify message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY ); + } + + /* + * Check the certificate's key type matches the signature alg + */ + if( ! mbedtls_pk_can_do( &ssl->session_negotiate->peer_cert->pk, pk_alg ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "sig_alg doesn't match cert key" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY ); + } + + i++; + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + if( i + 2 > ssl->in_hslen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate verify message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY ); + } + + sig_len = ( ssl->in_msg[i] << 8 ) | ssl->in_msg[i+1]; + i += 2; + + if( i + sig_len != ssl->in_hslen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate verify message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY ); + } + + if( ( ret = mbedtls_pk_verify( &ssl->session_negotiate->peer_cert->pk, + md_alg, hash_start, hashlen, + ssl->in_msg + i, sig_len ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_pk_verify", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse certificate verify" ) ); + + return( ret ); +} +#endif /* !MBEDTLS_KEY_EXCHANGE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED && + !MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +static int ssl_write_new_session_ticket( mbedtls_ssl_context *ssl ) +{ + int ret; + size_t tlen; + uint32_t lifetime; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write new session ticket" ) ); + + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_NEW_SESSION_TICKET; + + /* + * struct { + * uint32 ticket_lifetime_hint; + * opaque ticket<0..2^16-1>; + * } NewSessionTicket; + * + * 4 . 7 ticket_lifetime_hint (0 = unspecified) + * 8 . 9 ticket_len (n) + * 10 . 9+n ticket content + */ + + if( ( ret = ssl->conf->f_ticket_write( ssl->conf->p_ticket, + ssl->session_negotiate, + ssl->out_msg + 10, + ssl->out_msg + MBEDTLS_SSL_MAX_CONTENT_LEN, + &tlen, &lifetime ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_ticket_write", ret ); + tlen = 0; + } + + ssl->out_msg[4] = ( lifetime >> 24 ) & 0xFF; + ssl->out_msg[5] = ( lifetime >> 16 ) & 0xFF; + ssl->out_msg[6] = ( lifetime >> 8 ) & 0xFF; + ssl->out_msg[7] = ( lifetime ) & 0xFF; + + ssl->out_msg[8] = (unsigned char)( ( tlen >> 8 ) & 0xFF ); + ssl->out_msg[9] = (unsigned char)( ( tlen ) & 0xFF ); + + ssl->out_msglen = 10 + tlen; + + /* + * Morally equivalent to updating ssl->state, but NewSessionTicket and + * ChangeCipherSpec share the same state. + */ + ssl->handshake->new_session_ticket = 0; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write new session ticket" ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(ESP8266_PLATFORM) +int mbedtls_write_finished(mbedtls_ssl_context *ssl); +#endif +/* + * SSL handshake -- server side -- single step + */ +int mbedtls_ssl_handshake_server_step( mbedtls_ssl_context *ssl ) +{ + int ret = 0; + + if( ssl->state == MBEDTLS_SSL_HANDSHAKE_OVER || ssl->handshake == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "server state: %d", ssl->state ) ); + + if( ( ret = mbedtls_ssl_flush_output( ssl ) ) != 0 ) + return( ret ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake->retransmit_state == MBEDTLS_SSL_RETRANS_SENDING ) + { + if( ( ret = mbedtls_ssl_resend( ssl ) ) != 0 ) + return( ret ); + } +#endif + + switch( ssl->state ) + { + case MBEDTLS_SSL_HELLO_REQUEST: + ssl->state = MBEDTLS_SSL_CLIENT_HELLO; + break; + + /* + * <== ClientHello + */ + case MBEDTLS_SSL_CLIENT_HELLO: + ret = ssl_parse_client_hello( ssl ); + break; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + case MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT: + return( MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED ); +#endif + + /* + * ==> ServerHello + * Certificate + * ( ServerKeyExchange ) + * ( CertificateRequest ) + * ServerHelloDone + */ + case MBEDTLS_SSL_SERVER_HELLO: + ret = ssl_write_server_hello( ssl ); + break; + + case MBEDTLS_SSL_SERVER_CERTIFICATE: + ret = mbedtls_ssl_write_certificate( ssl ); + break; + + case MBEDTLS_SSL_SERVER_KEY_EXCHANGE: + ret = ssl_write_server_key_exchange( ssl ); + break; + + case MBEDTLS_SSL_CERTIFICATE_REQUEST: + ret = ssl_write_certificate_request( ssl ); + break; + + case MBEDTLS_SSL_SERVER_HELLO_DONE: + ret = ssl_write_server_hello_done( ssl ); + break; + + /* + * <== ( Certificate/Alert ) + * ClientKeyExchange + * ( CertificateVerify ) + * ChangeCipherSpec + * Finished + */ + case MBEDTLS_SSL_CLIENT_CERTIFICATE: + ret = mbedtls_ssl_parse_certificate( ssl ); + break; + + case MBEDTLS_SSL_CLIENT_KEY_EXCHANGE: + ret = ssl_parse_client_key_exchange( ssl ); + break; + + case MBEDTLS_SSL_CERTIFICATE_VERIFY: + ret = ssl_parse_certificate_verify( ssl ); + break; + + case MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC: + ret = mbedtls_ssl_parse_change_cipher_spec( ssl ); + break; + + case MBEDTLS_SSL_CLIENT_FINISHED: + ret = mbedtls_ssl_parse_finished( ssl ); + break; + + /* + * ==> ( NewSessionTicket ) + * ChangeCipherSpec + * Finished + */ + case MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC: +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + if( ssl->handshake->new_session_ticket != 0 ) + ret = ssl_write_new_session_ticket( ssl ); + else +#endif + ret = mbedtls_ssl_write_change_cipher_spec( ssl ); + break; + + case MBEDTLS_SSL_SERVER_FINISHED: + ret = mbedtls_ssl_write_finished( ssl ); +#if defined(ESP8266_PLATFORM) + mbedtls_write_finished(ssl); +#endif + break; + + case MBEDTLS_SSL_FLUSH_BUFFERS: + MBEDTLS_SSL_DEBUG_MSG( 2, ( "handshake: done" ) ); + ssl->state = MBEDTLS_SSL_HANDSHAKE_WRAPUP; + break; + + case MBEDTLS_SSL_HANDSHAKE_WRAPUP: + mbedtls_ssl_handshake_wrapup( ssl ); + break; + + default: + MBEDTLS_SSL_DEBUG_MSG( 1, ( "invalid state %d", ssl->state ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + return( ret ); +} +#endif /* MBEDTLS_SSL_SRV_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_ticket.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_ticket.c new file mode 100644 index 0000000..0e27900 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_ticket.c @@ -0,0 +1,489 @@ +/* + * TLS server tickets callbacks implementation + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SSL_TICKET_C) + +#include "mbedtls/ssl_ticket.h" + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#include + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Initialze context + */ +void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_ssl_ticket_context ) ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_init( &ctx->mutex ); +#endif +} + +#define MAX_KEY_BYTES 32 /* 256 bits */ + +/* + * Generate/update a key + */ +static int ssl_ticket_gen_key( mbedtls_ssl_ticket_context *ctx, + unsigned char index ) +{ + int ret; + unsigned char buf[MAX_KEY_BYTES]; + mbedtls_ssl_ticket_key *key = ctx->keys + index; + +#if defined(MBEDTLS_HAVE_TIME) + key->generation_time = (uint32_t) time( NULL ); +#endif + + if( ( ret = ctx->f_rng( ctx->p_rng, key->name, sizeof( key->name ) ) ) != 0 ) + return( ret ); + + if( ( ret = ctx->f_rng( ctx->p_rng, buf, sizeof( buf ) ) ) != 0 ) + return( ret ); + + /* With GCM and CCM, same context can encrypt & decrypt */ + ret = mbedtls_cipher_setkey( &key->ctx, buf, + mbedtls_cipher_get_key_bitlen( &key->ctx ), + MBEDTLS_ENCRYPT ); + + mbedtls_zeroize( buf, sizeof( buf ) ); + + return( ret ); +} + +/* + * Rotate/generate keys if necessary + */ +static int ssl_ticket_update_keys( mbedtls_ssl_ticket_context *ctx ) +{ +#if !defined(MBEDTLS_HAVE_TIME) + ((void) ctx); +#else + if( ctx->ticket_lifetime != 0 ) + { + uint32_t current_time = (uint32_t) time( NULL ); + uint32_t key_time = ctx->keys[ctx->active].generation_time; + + if( current_time > key_time && + current_time - key_time < ctx->ticket_lifetime ) + { + return( 0 ); + } + + ctx->active = 1 - ctx->active; + + return( ssl_ticket_gen_key( ctx, ctx->active ) ); + } + else +#endif /* MBEDTLS_HAVE_TIME */ + return( 0 ); +} + +/* + * Setup context for actual use + */ +int mbedtls_ssl_ticket_setup( mbedtls_ssl_ticket_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + mbedtls_cipher_type_t cipher, + uint32_t lifetime ) +{ + int ret; + const mbedtls_cipher_info_t *cipher_info; + + ctx->f_rng = f_rng; + ctx->p_rng = p_rng; + + ctx->ticket_lifetime = lifetime; + + cipher_info = mbedtls_cipher_info_from_type( cipher); + if( cipher_info == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( cipher_info->mode != MBEDTLS_MODE_GCM && + cipher_info->mode != MBEDTLS_MODE_CCM ) + { + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + if( cipher_info->key_bitlen > 8 * MAX_KEY_BYTES ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_cipher_setup( &ctx->keys[0].ctx, cipher_info ) ) != 0 || + ( ret = mbedtls_cipher_setup( &ctx->keys[1].ctx, cipher_info ) ) != 0 ) + { + return( ret ); + } + + if( ( ret = ssl_ticket_gen_key( ctx, 0 ) ) != 0 || + ( ret = ssl_ticket_gen_key( ctx, 1 ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} + +/* + * Serialize a session in the following format: + * 0 . n-1 session structure, n = sizeof(mbedtls_ssl_session) + * n . n+2 peer_cert length = m (0 if no certificate) + * n+3 . n+2+m peer cert ASN.1 + */ +static int ssl_save_session( const mbedtls_ssl_session *session, + unsigned char *buf, size_t buf_len, + size_t *olen ) +{ + unsigned char *p = buf; + size_t left = buf_len; +#if defined(MBEDTLS_X509_CRT_PARSE_C) + size_t cert_len; +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + + if( left < sizeof( mbedtls_ssl_session ) ) + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + + memcpy( p, session, sizeof( mbedtls_ssl_session ) ); + p += sizeof( mbedtls_ssl_session ); + left -= sizeof( mbedtls_ssl_session ); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + if( session->peer_cert == NULL ) + cert_len = 0; + else + cert_len = session->peer_cert->raw.len; + + if( left < 3 + cert_len ) + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + + *p++ = (unsigned char)( cert_len >> 16 & 0xFF ); + *p++ = (unsigned char)( cert_len >> 8 & 0xFF ); + *p++ = (unsigned char)( cert_len & 0xFF ); + + if( session->peer_cert != NULL ) + memcpy( p, session->peer_cert->raw.p, cert_len ); + + p += cert_len; +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + + *olen = p - buf; + + return( 0 ); +} + +/* + * Unserialise session, see ssl_save_session() + */ +static int ssl_load_session( mbedtls_ssl_session *session, + const unsigned char *buf, size_t len ) +{ + const unsigned char *p = buf; + const unsigned char * const end = buf + len; +#if defined(MBEDTLS_X509_CRT_PARSE_C) + size_t cert_len; +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + + if( p + sizeof( mbedtls_ssl_session ) > end ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + memcpy( session, p, sizeof( mbedtls_ssl_session ) ); + p += sizeof( mbedtls_ssl_session ); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + if( p + 3 > end ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + cert_len = ( p[0] << 16 ) | ( p[1] << 8 ) | p[2]; + p += 3; + + if( cert_len == 0 ) + { + session->peer_cert = NULL; + } + else + { + int ret; + + if( p + cert_len > end ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + session->peer_cert = mbedtls_calloc( 1, sizeof( mbedtls_x509_crt ) ); + + if( session->peer_cert == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + mbedtls_x509_crt_init( session->peer_cert ); + + if( ( ret = mbedtls_x509_crt_parse_der( session->peer_cert, + p, cert_len ) ) != 0 ) + { + mbedtls_x509_crt_free( session->peer_cert ); + mbedtls_free( session->peer_cert ); + session->peer_cert = NULL; + return( ret ); + } + + p += cert_len; + } +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + + if( p != end ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + return( 0 ); +} + +/* + * Create session ticket, with the following structure: + * + * struct { + * opaque key_name[4]; + * opaque iv[12]; + * opaque encrypted_state<0..2^16-1>; + * opaque tag[16]; + * } ticket; + * + * The key_name, iv, and length of encrypted_state are the additional + * authenticated data. + */ +int mbedtls_ssl_ticket_write( void *p_ticket, + const mbedtls_ssl_session *session, + unsigned char *start, + const unsigned char *end, + size_t *tlen, + uint32_t *ticket_lifetime ) +{ + int ret; + mbedtls_ssl_ticket_context *ctx = p_ticket; + mbedtls_ssl_ticket_key *key; + unsigned char *key_name = start; + unsigned char *iv = start + 4; + unsigned char *state_len_bytes = iv + 12; + unsigned char *state = state_len_bytes + 2; + unsigned char *tag; + size_t clear_len, ciph_len; + + *tlen = 0; + + if( ctx == NULL || ctx->f_rng == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + /* We need at least 4 bytes for key_name, 12 for IV, 2 for len 16 for tag, + * in addition to session itself, that will be checked when writing it. */ + if( end - start < 4 + 12 + 2 + 16 ) + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + if( ( ret = ssl_ticket_update_keys( ctx ) ) != 0 ) + goto cleanup; + + key = &ctx->keys[ctx->active]; + + *ticket_lifetime = ctx->ticket_lifetime; + + memcpy( key_name, key->name, 4 ); + + if( ( ret = ctx->f_rng( ctx->p_rng, iv, 12 ) ) != 0 ) + goto cleanup; + + /* Dump session state */ + if( ( ret = ssl_save_session( session, + state, end - state, &clear_len ) ) != 0 || + (unsigned long) clear_len > 65535 ) + { + goto cleanup; + } + state_len_bytes[0] = ( clear_len >> 8 ) & 0xff; + state_len_bytes[1] = ( clear_len ) & 0xff; + + /* Encrypt and authenticate */ + tag = state + clear_len; + if( ( ret = mbedtls_cipher_auth_encrypt( &key->ctx, + iv, 12, key_name, 4 + 12 + 2, + state, clear_len, state, &ciph_len, tag, 16 ) ) != 0 ) + { + goto cleanup; + } + if( ciph_len != clear_len ) + { + ret = MBEDTLS_ERR_SSL_INTERNAL_ERROR; + goto cleanup; + } + + *tlen = 4 + 12 + 2 + 16 + ciph_len; + +cleanup: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +/* + * Select key based on name + */ +static mbedtls_ssl_ticket_key *ssl_ticket_select_key( + mbedtls_ssl_ticket_context *ctx, + const unsigned char name[4] ) +{ + unsigned char i; + + for( i = 0; i < sizeof( ctx->keys ) / sizeof( *ctx->keys ); i++ ) + if( memcmp( name, ctx->keys[i].name, 4 ) == 0 ) + return( &ctx->keys[i] ); + + return( NULL ); +} + +/* + * Load session ticket (see mbedtls_ssl_ticket_write for structure) + */ +int mbedtls_ssl_ticket_parse( void *p_ticket, + mbedtls_ssl_session *session, + unsigned char *buf, + size_t len ) +{ + int ret; + mbedtls_ssl_ticket_context *ctx = p_ticket; + mbedtls_ssl_ticket_key *key; + unsigned char *key_name = buf; + unsigned char *iv = buf + 4; + unsigned char *enc_len_p = iv + 12; + unsigned char *ticket = enc_len_p + 2; + unsigned char *tag; + size_t enc_len, clear_len; + + if( ctx == NULL || ctx->f_rng == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + /* See mbedtls_ssl_ticket_write() */ + if( len < 4 + 12 + 2 + 16 ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + +#if defined(MBEDTLS_THREADING_C) + if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) + return( ret ); +#endif + + if( ( ret = ssl_ticket_update_keys( ctx ) ) != 0 ) + goto cleanup; + + enc_len = ( enc_len_p[0] << 8 ) | enc_len_p[1]; + tag = ticket + enc_len; + + if( len != 4 + 12 + 2 + enc_len + 16 ) + { + ret = MBEDTLS_ERR_SSL_BAD_INPUT_DATA; + goto cleanup; + } + + /* Select key */ + if( ( key = ssl_ticket_select_key( ctx, key_name ) ) == NULL ) + { + /* We can't know for sure but this is a likely option unless we're + * under attack - this is only informative anyway */ + ret = MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED; + goto cleanup; + } + + /* Decrypt and authenticate */ + if( ( ret = mbedtls_cipher_auth_decrypt( &key->ctx, iv, 12, + key_name, 4 + 12 + 2, ticket, enc_len, + ticket, &clear_len, tag, 16 ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_CIPHER_AUTH_FAILED ) + ret = MBEDTLS_ERR_SSL_INVALID_MAC; + + goto cleanup; + } + if( clear_len != enc_len ) + { + ret = MBEDTLS_ERR_SSL_INTERNAL_ERROR; + goto cleanup; + } + + /* Actually load session */ + if( ( ret = ssl_load_session( session, ticket, clear_len ) ) != 0 ) + goto cleanup; + +#if defined(MBEDTLS_HAVE_TIME) + { + /* Check for expiration */ + time_t current_time = time( NULL ); + + if( current_time < session->start || + (uint32_t)( current_time - session->start ) > ctx->ticket_lifetime ) + { + ret = MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED; + goto cleanup; + } + } +#endif + +cleanup: +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} + +/* + * Free context + */ +void mbedtls_ssl_ticket_free( mbedtls_ssl_ticket_context *ctx ) +{ + mbedtls_cipher_free( &ctx->keys[0].ctx ); + mbedtls_cipher_free( &ctx->keys[1].ctx ); + +#if defined(MBEDTLS_THREADING_C) + mbedtls_mutex_free( &ctx->mutex ); +#endif + + mbedtls_zeroize( ctx, sizeof( mbedtls_ssl_ticket_context ) ); +} + +#endif /* MBEDTLS_SSL_TICKET_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_tls.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_tls.c new file mode 100644 index 0000000..8a8e789 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/ssl_tls.c @@ -0,0 +1,7625 @@ +/* + * SSLv3/TLSv1 shared functions + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The SSL 3.0 specification was drafted by Netscape in 1996, + * and became an IETF standard in 1999. + * + * http://wp.netscape.com/eng/ssl3/ + * http://www.ietf.org/rfc/rfc2246.txt + * http://www.ietf.org/rfc/rfc4346.txt + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SSL_TLS_C) + +#include "mbedtls/debug.h" +#include "mbedtls/ssl.h" +#include "mbedtls/ssl_internal.h" + +#include + +#if defined(MBEDTLS_X509_CRT_PARSE_C) && \ + defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) +#include "mbedtls/oid.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* Length of the "epoch" field in the record header */ +static inline size_t ssl_ep_len( const mbedtls_ssl_context *ssl ) +{ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + return( 2 ); +#else + ((void) ssl); +#endif + return( 0 ); +} + +/* + * Start a timer. + * Passing millisecs = 0 cancels a running timer. + */ +static void ssl_set_timer( mbedtls_ssl_context *ssl, uint32_t millisecs ) +{ + if( ssl->f_set_timer == NULL ) + return; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "set_timer to %d ms", (int) millisecs ) ); + ssl->f_set_timer( ssl->p_timer, millisecs / 4, millisecs ); +} + +/* + * Return -1 is timer is expired, 0 if it isn't. + */ +static int ssl_check_timer( mbedtls_ssl_context *ssl ) +{ + if( ssl->f_get_timer == NULL ) + return( 0 ); + + if( ssl->f_get_timer( ssl->p_timer ) == 2 ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "timer expired" ) ); + return( -1 ); + } + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_PROTO_DTLS) +/* + * Double the retransmit timeout value, within the allowed range, + * returning -1 if the maximum value has already been reached. + */ +static int ssl_double_retransmit_timeout( mbedtls_ssl_context *ssl ) +{ + uint32_t new_timeout; + + if( ssl->handshake->retransmit_timeout >= ssl->conf->hs_timeout_max ) + return( -1 ); + + new_timeout = 2 * ssl->handshake->retransmit_timeout; + + /* Avoid arithmetic overflow and range overflow */ + if( new_timeout < ssl->handshake->retransmit_timeout || + new_timeout > ssl->conf->hs_timeout_max ) + { + new_timeout = ssl->conf->hs_timeout_max; + } + + ssl->handshake->retransmit_timeout = new_timeout; + MBEDTLS_SSL_DEBUG_MSG( 3, ( "update timeout value to %d millisecs", + ssl->handshake->retransmit_timeout ) ); + + return( 0 ); +} + +static void ssl_reset_retransmit_timeout( mbedtls_ssl_context *ssl ) +{ + ssl->handshake->retransmit_timeout = ssl->conf->hs_timeout_min; + MBEDTLS_SSL_DEBUG_MSG( 3, ( "update timeout value to %d millisecs", + ssl->handshake->retransmit_timeout ) ); +} +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +/* + * Convert max_fragment_length codes to length. + * RFC 6066 says: + * enum{ + * 2^9(1), 2^10(2), 2^11(3), 2^12(4), (255) + * } MaxFragmentLength; + * and we add 0 -> extension unused + */ +static unsigned int mfl_code_to_length[MBEDTLS_SSL_MAX_FRAG_LEN_INVALID] = +{ + MBEDTLS_SSL_MAX_CONTENT_LEN, /* MBEDTLS_SSL_MAX_FRAG_LEN_NONE */ + 512, /* MBEDTLS_SSL_MAX_FRAG_LEN_512 */ + 1024, /* MBEDTLS_SSL_MAX_FRAG_LEN_1024 */ + 2048, /* MBEDTLS_SSL_MAX_FRAG_LEN_2048 */ + 4096, /* MBEDTLS_SSL_MAX_FRAG_LEN_4096 */ +}; +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_CLI_C) +static int ssl_session_copy( mbedtls_ssl_session *dst, const mbedtls_ssl_session *src ) +{ + mbedtls_ssl_session_free( dst ); + memcpy( dst, src, sizeof( mbedtls_ssl_session ) ); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + if( src->peer_cert != NULL ) + { + int ret; + + dst->peer_cert = mbedtls_calloc( 1, sizeof(mbedtls_x509_crt) ); + if( dst->peer_cert == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + mbedtls_x509_crt_init( dst->peer_cert ); + + if( ( ret = mbedtls_x509_crt_parse_der( dst->peer_cert, src->peer_cert->raw.p, + src->peer_cert->raw.len ) ) != 0 ) + { + mbedtls_free( dst->peer_cert ); + dst->peer_cert = NULL; + return( ret ); + } + } +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C) + if( src->ticket != NULL ) + { + dst->ticket = mbedtls_calloc( 1, src->ticket_len ); + if( dst->ticket == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + memcpy( dst->ticket, src->ticket, src->ticket_len ); + } +#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */ + + return( 0 ); +} +#endif /* MBEDTLS_SSL_CLI_C */ + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) +int (*mbedtls_ssl_hw_record_init)( mbedtls_ssl_context *ssl, + const unsigned char *key_enc, const unsigned char *key_dec, + size_t keylen, + const unsigned char *iv_enc, const unsigned char *iv_dec, + size_t ivlen, + const unsigned char *mac_enc, const unsigned char *mac_dec, + size_t maclen ) = NULL; +int (*mbedtls_ssl_hw_record_activate)( mbedtls_ssl_context *ssl, int direction) = NULL; +int (*mbedtls_ssl_hw_record_reset)( mbedtls_ssl_context *ssl ) = NULL; +int (*mbedtls_ssl_hw_record_write)( mbedtls_ssl_context *ssl ) = NULL; +int (*mbedtls_ssl_hw_record_read)( mbedtls_ssl_context *ssl ) = NULL; +int (*mbedtls_ssl_hw_record_finish)( mbedtls_ssl_context *ssl ) = NULL; +#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */ + +/* + * Key material generation + */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) +static int ssl3_prf( const unsigned char *secret, size_t slen, + const char *label, + const unsigned char *random, size_t rlen, + unsigned char *dstbuf, size_t dlen ) +{ + size_t i; + mbedtls_md5_context md5; + mbedtls_sha1_context sha1; + unsigned char padding[16]; + unsigned char sha1sum[20]; + ((void)label); + + mbedtls_md5_init( &md5 ); + mbedtls_sha1_init( &sha1 ); + + /* + * SSLv3: + * block = + * MD5( secret + SHA1( 'A' + secret + random ) ) + + * MD5( secret + SHA1( 'BB' + secret + random ) ) + + * MD5( secret + SHA1( 'CCC' + secret + random ) ) + + * ... + */ + for( i = 0; i < dlen / 16; i++ ) + { + memset( padding, (unsigned char) ('A' + i), 1 + i ); + + mbedtls_sha1_starts( &sha1 ); + mbedtls_sha1_update( &sha1, padding, 1 + i ); + mbedtls_sha1_update( &sha1, secret, slen ); + mbedtls_sha1_update( &sha1, random, rlen ); + mbedtls_sha1_finish( &sha1, sha1sum ); + + mbedtls_md5_starts( &md5 ); + mbedtls_md5_update( &md5, secret, slen ); + mbedtls_md5_update( &md5, sha1sum, 20 ); + mbedtls_md5_finish( &md5, dstbuf + i * 16 ); + } + + mbedtls_md5_free( &md5 ); + mbedtls_sha1_free( &sha1 ); + + mbedtls_zeroize( padding, sizeof( padding ) ); + mbedtls_zeroize( sha1sum, sizeof( sha1sum ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) +static int tls1_prf( const unsigned char *secret, size_t slen, + const char *label, + const unsigned char *random, size_t rlen, + unsigned char *dstbuf, size_t dlen ) +{ + size_t nb, hs; + size_t i, j, k; + const unsigned char *S1, *S2; + unsigned char tmp[128]; + unsigned char h_i[20]; + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + int ret; + + mbedtls_md_init( &md_ctx ); + + if( sizeof( tmp ) < 20 + strlen( label ) + rlen ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + hs = ( slen + 1 ) / 2; + S1 = secret; + S2 = secret + slen - hs; + + nb = strlen( label ); + memcpy( tmp + 20, label, nb ); + memcpy( tmp + 20 + nb, random, rlen ); + nb += rlen; + + /* + * First compute P_md5(secret,label+random)[0..dlen] + */ + if( ( md_info = mbedtls_md_info_from_type( MBEDTLS_MD_MD5 ) ) == NULL ) + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + + if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 1 ) ) != 0 ) + return( ret ); + + mbedtls_md_hmac_starts( &md_ctx, S1, hs ); + mbedtls_md_hmac_update( &md_ctx, tmp + 20, nb ); + mbedtls_md_hmac_finish( &md_ctx, 4 + tmp ); + + for( i = 0; i < dlen; i += 16 ) + { + mbedtls_md_hmac_reset ( &md_ctx ); + mbedtls_md_hmac_update( &md_ctx, 4 + tmp, 16 + nb ); + mbedtls_md_hmac_finish( &md_ctx, h_i ); + + mbedtls_md_hmac_reset ( &md_ctx ); + mbedtls_md_hmac_update( &md_ctx, 4 + tmp, 16 ); + mbedtls_md_hmac_finish( &md_ctx, 4 + tmp ); + + k = ( i + 16 > dlen ) ? dlen % 16 : 16; + + for( j = 0; j < k; j++ ) + dstbuf[i + j] = h_i[j]; + } + + mbedtls_md_free( &md_ctx ); + + /* + * XOR out with P_sha1(secret,label+random)[0..dlen] + */ + if( ( md_info = mbedtls_md_info_from_type( MBEDTLS_MD_SHA1 ) ) == NULL ) + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + + if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 1 ) ) != 0 ) + return( ret ); + + mbedtls_md_hmac_starts( &md_ctx, S2, hs ); + mbedtls_md_hmac_update( &md_ctx, tmp + 20, nb ); + mbedtls_md_hmac_finish( &md_ctx, tmp ); + + for( i = 0; i < dlen; i += 20 ) + { + mbedtls_md_hmac_reset ( &md_ctx ); + mbedtls_md_hmac_update( &md_ctx, tmp, 20 + nb ); + mbedtls_md_hmac_finish( &md_ctx, h_i ); + + mbedtls_md_hmac_reset ( &md_ctx ); + mbedtls_md_hmac_update( &md_ctx, tmp, 20 ); + mbedtls_md_hmac_finish( &md_ctx, tmp ); + + k = ( i + 20 > dlen ) ? dlen % 20 : 20; + + for( j = 0; j < k; j++ ) + dstbuf[i + j] = (unsigned char)( dstbuf[i + j] ^ h_i[j] ); + } + + mbedtls_md_free( &md_ctx ); + + mbedtls_zeroize( tmp, sizeof( tmp ) ); + mbedtls_zeroize( h_i, sizeof( h_i ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_PROTO_TLS1) || MBEDTLS_SSL_PROTO_TLS1_1 */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +static int tls_prf_generic( mbedtls_md_type_t md_type, + const unsigned char *secret, size_t slen, + const char *label, + const unsigned char *random, size_t rlen, + unsigned char *dstbuf, size_t dlen ) +{ + size_t nb; + size_t i, j, k, md_len; + unsigned char tmp[128]; + unsigned char h_i[MBEDTLS_MD_MAX_SIZE]; + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + int ret; + + mbedtls_md_init( &md_ctx ); + + if( ( md_info = mbedtls_md_info_from_type( md_type ) ) == NULL ) + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + + md_len = mbedtls_md_get_size( md_info ); + + if( sizeof( tmp ) < md_len + strlen( label ) + rlen ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + nb = strlen( label ); + memcpy( tmp + md_len, label, nb ); + memcpy( tmp + md_len + nb, random, rlen ); + nb += rlen; + + /* + * Compute P_(secret, label + random)[0..dlen] + */ + if ( ( ret = mbedtls_md_setup( &md_ctx, md_info, 1 ) ) != 0 ) + return( ret ); + + mbedtls_md_hmac_starts( &md_ctx, secret, slen ); + mbedtls_md_hmac_update( &md_ctx, tmp + md_len, nb ); + mbedtls_md_hmac_finish( &md_ctx, tmp ); + + for( i = 0; i < dlen; i += md_len ) + { + mbedtls_md_hmac_reset ( &md_ctx ); + mbedtls_md_hmac_update( &md_ctx, tmp, md_len + nb ); + mbedtls_md_hmac_finish( &md_ctx, h_i ); + + mbedtls_md_hmac_reset ( &md_ctx ); + mbedtls_md_hmac_update( &md_ctx, tmp, md_len ); + mbedtls_md_hmac_finish( &md_ctx, tmp ); + + k = ( i + md_len > dlen ) ? dlen % md_len : md_len; + + for( j = 0; j < k; j++ ) + dstbuf[i + j] = h_i[j]; + } + + mbedtls_md_free( &md_ctx ); + + mbedtls_zeroize( tmp, sizeof( tmp ) ); + mbedtls_zeroize( h_i, sizeof( h_i ) ); + + return( 0 ); +} + +#if defined(MBEDTLS_SHA256_C) +static int tls_prf_sha256( const unsigned char *secret, size_t slen, + const char *label, + const unsigned char *random, size_t rlen, + unsigned char *dstbuf, size_t dlen ) +{ + return( tls_prf_generic( MBEDTLS_MD_SHA256, secret, slen, + label, random, rlen, dstbuf, dlen ) ); +} +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) +static int tls_prf_sha384( const unsigned char *secret, size_t slen, + const char *label, + const unsigned char *random, size_t rlen, + unsigned char *dstbuf, size_t dlen ) +{ + return( tls_prf_generic( MBEDTLS_MD_SHA384, secret, slen, + label, random, rlen, dstbuf, dlen ) ); +} +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +static void ssl_update_checksum_start( mbedtls_ssl_context *, const unsigned char *, size_t ); + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) +static void ssl_update_checksum_md5sha1( mbedtls_ssl_context *, const unsigned char *, size_t ); +#endif + +#if defined(MBEDTLS_SSL_PROTO_SSL3) +static void ssl_calc_verify_ssl( mbedtls_ssl_context *, unsigned char * ); +static void ssl_calc_finished_ssl( mbedtls_ssl_context *, unsigned char *, int ); +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) +static void ssl_calc_verify_tls( mbedtls_ssl_context *, unsigned char * ); +static void ssl_calc_finished_tls( mbedtls_ssl_context *, unsigned char *, int ); +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) +static void ssl_update_checksum_sha256( mbedtls_ssl_context *, const unsigned char *, size_t ); +static void ssl_calc_verify_tls_sha256( mbedtls_ssl_context *,unsigned char * ); +static void ssl_calc_finished_tls_sha256( mbedtls_ssl_context *,unsigned char *, int ); +#endif + +#if defined(MBEDTLS_SHA512_C) +static void ssl_update_checksum_sha384( mbedtls_ssl_context *, const unsigned char *, size_t ); +static void ssl_calc_verify_tls_sha384( mbedtls_ssl_context *, unsigned char * ); +static void ssl_calc_finished_tls_sha384( mbedtls_ssl_context *, unsigned char *, int ); +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +int mbedtls_ssl_derive_keys( mbedtls_ssl_context *ssl ) +{ + int ret = 0; + unsigned char tmp[64]; + unsigned char keyblk[256]; + unsigned char *key1; + unsigned char *key2; + unsigned char *mac_enc; + unsigned char *mac_dec; + size_t iv_copy_len; + const mbedtls_cipher_info_t *cipher_info; + const mbedtls_md_info_t *md_info; + + mbedtls_ssl_session *session = ssl->session_negotiate; + mbedtls_ssl_transform *transform = ssl->transform_negotiate; + mbedtls_ssl_handshake_params *handshake = ssl->handshake; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> derive keys" ) ); + + cipher_info = mbedtls_cipher_info_from_type( transform->ciphersuite_info->cipher ); + if( cipher_info == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "cipher info for %d not found", + transform->ciphersuite_info->cipher ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + md_info = mbedtls_md_info_from_type( transform->ciphersuite_info->mac ); + if( md_info == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "mbedtls_md info for %d not found", + transform->ciphersuite_info->mac ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + /* + * Set appropriate PRF function and other SSL / TLS / TLS1.2 functions + */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + handshake->tls_prf = ssl3_prf; + handshake->calc_verify = ssl_calc_verify_ssl; + handshake->calc_finished = ssl_calc_finished_ssl; + } + else +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( ssl->minor_ver < MBEDTLS_SSL_MINOR_VERSION_3 ) + { + handshake->tls_prf = tls1_prf; + handshake->calc_verify = ssl_calc_verify_tls; + handshake->calc_finished = ssl_calc_finished_tls; + } + else +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA512_C) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 && + transform->ciphersuite_info->mac == MBEDTLS_MD_SHA384 ) + { + handshake->tls_prf = tls_prf_sha384; + handshake->calc_verify = ssl_calc_verify_tls_sha384; + handshake->calc_finished = ssl_calc_finished_tls_sha384; + } + else +#endif +#if defined(MBEDTLS_SHA256_C) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + handshake->tls_prf = tls_prf_sha256; + handshake->calc_verify = ssl_calc_verify_tls_sha256; + handshake->calc_finished = ssl_calc_finished_tls_sha256; + } + else +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + /* + * SSLv3: + * master = + * MD5( premaster + SHA1( 'A' + premaster + randbytes ) ) + + * MD5( premaster + SHA1( 'BB' + premaster + randbytes ) ) + + * MD5( premaster + SHA1( 'CCC' + premaster + randbytes ) ) + * + * TLSv1+: + * master = PRF( premaster, "master secret", randbytes )[0..47] + */ + if( handshake->resume == 0 ) + { + MBEDTLS_SSL_DEBUG_BUF( 3, "premaster secret", handshake->premaster, + handshake->pmslen ); + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + if( ssl->handshake->extended_ms == MBEDTLS_SSL_EXTENDED_MS_ENABLED ) + { + unsigned char session_hash[48]; + size_t hash_len; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "using extended master secret" ) ); + + ssl->handshake->calc_verify( ssl, session_hash ); + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { +#if defined(MBEDTLS_SHA512_C) + if( ssl->transform_negotiate->ciphersuite_info->mac == + MBEDTLS_MD_SHA384 ) + { + hash_len = 48; + } + else +#endif + hash_len = 32; + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + hash_len = 36; + + MBEDTLS_SSL_DEBUG_BUF( 3, "session hash", session_hash, hash_len ); + + ret = handshake->tls_prf( handshake->premaster, handshake->pmslen, + "extended master secret", + session_hash, hash_len, + session->master, 48 ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "prf", ret ); + return( ret ); + } + + } + else +#endif + ret = handshake->tls_prf( handshake->premaster, handshake->pmslen, + "master secret", + handshake->randbytes, 64, + session->master, 48 ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "prf", ret ); + return( ret ); + } + + mbedtls_zeroize( handshake->premaster, sizeof(handshake->premaster) ); + } + else + MBEDTLS_SSL_DEBUG_MSG( 3, ( "no premaster (session resumed)" ) ); + + /* + * Swap the client and server random values. + */ + memcpy( tmp, handshake->randbytes, 64 ); + memcpy( handshake->randbytes, tmp + 32, 32 ); + memcpy( handshake->randbytes + 32, tmp, 32 ); + mbedtls_zeroize( tmp, sizeof( tmp ) ); + + /* + * SSLv3: + * key block = + * MD5( master + SHA1( 'A' + master + randbytes ) ) + + * MD5( master + SHA1( 'BB' + master + randbytes ) ) + + * MD5( master + SHA1( 'CCC' + master + randbytes ) ) + + * MD5( master + SHA1( 'DDDD' + master + randbytes ) ) + + * ... + * + * TLSv1: + * key block = PRF( master, "key expansion", randbytes ) + */ + ret = handshake->tls_prf( session->master, 48, "key expansion", + handshake->randbytes, 64, keyblk, 256 ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "prf", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "ciphersuite = %s", + mbedtls_ssl_get_ciphersuite_name( session->ciphersuite ) ) ); + MBEDTLS_SSL_DEBUG_BUF( 3, "master secret", session->master, 48 ); + MBEDTLS_SSL_DEBUG_BUF( 4, "random bytes", handshake->randbytes, 64 ); + MBEDTLS_SSL_DEBUG_BUF( 4, "key block", keyblk, 256 ); + + mbedtls_zeroize( handshake->randbytes, sizeof( handshake->randbytes ) ); + + /* + * Determine the appropriate key, IV and MAC length. + */ + + transform->keylen = cipher_info->key_bitlen / 8; + + if( cipher_info->mode == MBEDTLS_MODE_GCM || + cipher_info->mode == MBEDTLS_MODE_CCM ) + { + transform->maclen = 0; + + transform->ivlen = 12; + transform->fixed_ivlen = 4; + + /* Minimum length is expicit IV + tag */ + transform->minlen = transform->ivlen - transform->fixed_ivlen + + ( transform->ciphersuite_info->flags & + MBEDTLS_CIPHERSUITE_SHORT_TAG ? 8 : 16 ); + } + else + { + /* Initialize HMAC contexts */ + if( ( ret = mbedtls_md_setup( &transform->md_ctx_enc, md_info, 1 ) ) != 0 || + ( ret = mbedtls_md_setup( &transform->md_ctx_dec, md_info, 1 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_md_setup", ret ); + return( ret ); + } + + /* Get MAC length */ + transform->maclen = mbedtls_md_get_size( md_info ); + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + /* + * If HMAC is to be truncated, we shall keep the leftmost bytes, + * (rfc 6066 page 13 or rfc 2104 section 4), + * so we only need to adjust the length here. + */ + if( session->trunc_hmac == MBEDTLS_SSL_TRUNC_HMAC_ENABLED ) + transform->maclen = MBEDTLS_SSL_TRUNCATED_HMAC_LEN; +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + + /* IV length */ + transform->ivlen = cipher_info->iv_size; + + /* Minimum length */ + if( cipher_info->mode == MBEDTLS_MODE_STREAM ) + transform->minlen = transform->maclen; + else + { + /* + * GenericBlockCipher: + * 1. if EtM is in use: one block plus MAC + * otherwise: * first multiple of blocklen greater than maclen + * 2. IV except for SSL3 and TLS 1.0 + */ +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + if( session->encrypt_then_mac == MBEDTLS_SSL_ETM_ENABLED ) + { + transform->minlen = transform->maclen + + cipher_info->block_size; + } + else +#endif + { + transform->minlen = transform->maclen + + cipher_info->block_size + - transform->maclen % cipher_info->block_size; + } + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 || + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_1 ) + ; /* No need to adjust minlen */ + else +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_2 || + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_3 ) + { + transform->minlen += transform->ivlen; + } + else +#endif + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + } + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "keylen: %d, minlen: %d, ivlen: %d, maclen: %d", + transform->keylen, transform->minlen, transform->ivlen, + transform->maclen ) ); + + /* + * Finally setup the cipher contexts, IVs and MAC secrets. + */ +#if defined(MBEDTLS_SSL_CLI_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT ) + { + key1 = keyblk + transform->maclen * 2; + key2 = keyblk + transform->maclen * 2 + transform->keylen; + + mac_enc = keyblk; + mac_dec = keyblk + transform->maclen; + + /* + * This is not used in TLS v1.1. + */ + iv_copy_len = ( transform->fixed_ivlen ) ? + transform->fixed_ivlen : transform->ivlen; + memcpy( transform->iv_enc, key2 + transform->keylen, iv_copy_len ); + memcpy( transform->iv_dec, key2 + transform->keylen + iv_copy_len, + iv_copy_len ); + } + else +#endif /* MBEDTLS_SSL_CLI_C */ +#if defined(MBEDTLS_SSL_SRV_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + { + key1 = keyblk + transform->maclen * 2 + transform->keylen; + key2 = keyblk + transform->maclen * 2; + + mac_enc = keyblk + transform->maclen; + mac_dec = keyblk; + + /* + * This is not used in TLS v1.1. + */ + iv_copy_len = ( transform->fixed_ivlen ) ? + transform->fixed_ivlen : transform->ivlen; + memcpy( transform->iv_dec, key1 + transform->keylen, iv_copy_len ); + memcpy( transform->iv_enc, key1 + transform->keylen + iv_copy_len, + iv_copy_len ); + } + else +#endif /* MBEDTLS_SSL_SRV_C */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + if( transform->maclen > sizeof transform->mac_enc ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + memcpy( transform->mac_enc, mac_enc, transform->maclen ); + memcpy( transform->mac_dec, mac_dec, transform->maclen ); + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_1 ) + { + mbedtls_md_hmac_starts( &transform->md_ctx_enc, mac_enc, transform->maclen ); + mbedtls_md_hmac_starts( &transform->md_ctx_dec, mac_dec, transform->maclen ); + } + else +#endif + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_init != NULL ) + { + int ret = 0; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "going for mbedtls_ssl_hw_record_init()" ) ); + + if( ( ret = mbedtls_ssl_hw_record_init( ssl, key1, key2, transform->keylen, + transform->iv_enc, transform->iv_dec, + iv_copy_len, + mac_enc, mac_dec, + transform->maclen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_hw_record_init", ret ); + return( MBEDTLS_ERR_SSL_HW_ACCEL_FAILED ); + } + } +#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */ + +#if defined(MBEDTLS_SSL_EXPORT_KEYS) + if( ssl->conf->f_export_keys != NULL ) + { + ssl->conf->f_export_keys( ssl->conf->p_export_keys, + session->master, keyblk, + transform->maclen, transform->keylen, + iv_copy_len ); + } +#endif + + if( ( ret = mbedtls_cipher_setup( &transform->cipher_ctx_enc, + cipher_info ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_setup", ret ); + return( ret ); + } + + if( ( ret = mbedtls_cipher_setup( &transform->cipher_ctx_dec, + cipher_info ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_setup", ret ); + return( ret ); + } + + if( ( ret = mbedtls_cipher_setkey( &transform->cipher_ctx_enc, key1, + cipher_info->key_bitlen, + MBEDTLS_ENCRYPT ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_setkey", ret ); + return( ret ); + } + + if( ( ret = mbedtls_cipher_setkey( &transform->cipher_ctx_dec, key2, + cipher_info->key_bitlen, + MBEDTLS_DECRYPT ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_setkey", ret ); + return( ret ); + } + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + if( cipher_info->mode == MBEDTLS_MODE_CBC ) + { + if( ( ret = mbedtls_cipher_set_padding_mode( &transform->cipher_ctx_enc, + MBEDTLS_PADDING_NONE ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_set_padding_mode", ret ); + return( ret ); + } + + if( ( ret = mbedtls_cipher_set_padding_mode( &transform->cipher_ctx_dec, + MBEDTLS_PADDING_NONE ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_set_padding_mode", ret ); + return( ret ); + } + } +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + + mbedtls_zeroize( keyblk, sizeof( keyblk ) ); + +#if defined(MBEDTLS_ZLIB_SUPPORT) + // Initialize compression + // + if( session->compression == MBEDTLS_SSL_COMPRESS_DEFLATE ) + { + if( ssl->compress_buf == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "Allocating compression buffer" ) ); + ssl->compress_buf = mbedtls_calloc( 1, MBEDTLS_SSL_BUFFER_LEN ); + if( ssl->compress_buf == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc(%d bytes) failed", + MBEDTLS_SSL_BUFFER_LEN ) ); + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "Initializing zlib states" ) ); + + memset( &transform->ctx_deflate, 0, sizeof( transform->ctx_deflate ) ); + memset( &transform->ctx_inflate, 0, sizeof( transform->ctx_inflate ) ); + + if( deflateInit( &transform->ctx_deflate, + Z_DEFAULT_COMPRESSION ) != Z_OK || + inflateInit( &transform->ctx_inflate ) != Z_OK ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "Failed to initialize compression" ) ); + return( MBEDTLS_ERR_SSL_COMPRESSION_FAILED ); + } + } +#endif /* MBEDTLS_ZLIB_SUPPORT */ + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= derive keys" ) ); + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_PROTO_SSL3) +void ssl_calc_verify_ssl( mbedtls_ssl_context *ssl, unsigned char hash[36] ) +{ + mbedtls_md5_context md5; + mbedtls_sha1_context sha1; + unsigned char pad_1[48]; + unsigned char pad_2[48]; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc verify ssl" ) ); + + mbedtls_md5_init( &md5 ); + mbedtls_sha1_init( &sha1 ); + + mbedtls_md5_clone( &md5, &ssl->handshake->fin_md5 ); + mbedtls_sha1_clone( &sha1, &ssl->handshake->fin_sha1 ); + + memset( pad_1, 0x36, 48 ); + memset( pad_2, 0x5C, 48 ); + + mbedtls_md5_update( &md5, ssl->session_negotiate->master, 48 ); + mbedtls_md5_update( &md5, pad_1, 48 ); + mbedtls_md5_finish( &md5, hash ); + + mbedtls_md5_starts( &md5 ); + mbedtls_md5_update( &md5, ssl->session_negotiate->master, 48 ); + mbedtls_md5_update( &md5, pad_2, 48 ); + mbedtls_md5_update( &md5, hash, 16 ); + mbedtls_md5_finish( &md5, hash ); + + mbedtls_sha1_update( &sha1, ssl->session_negotiate->master, 48 ); + mbedtls_sha1_update( &sha1, pad_1, 40 ); + mbedtls_sha1_finish( &sha1, hash + 16 ); + + mbedtls_sha1_starts( &sha1 ); + mbedtls_sha1_update( &sha1, ssl->session_negotiate->master, 48 ); + mbedtls_sha1_update( &sha1, pad_2, 40 ); + mbedtls_sha1_update( &sha1, hash + 16, 20 ); + mbedtls_sha1_finish( &sha1, hash + 16 ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calculated verify result", hash, 36 ); + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc verify" ) ); + + mbedtls_md5_free( &md5 ); + mbedtls_sha1_free( &sha1 ); + + return; +} +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) +void ssl_calc_verify_tls( mbedtls_ssl_context *ssl, unsigned char hash[36] ) +{ + mbedtls_md5_context md5; + mbedtls_sha1_context sha1; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc verify tls" ) ); + + mbedtls_md5_init( &md5 ); + mbedtls_sha1_init( &sha1 ); + + mbedtls_md5_clone( &md5, &ssl->handshake->fin_md5 ); + mbedtls_sha1_clone( &sha1, &ssl->handshake->fin_sha1 ); + + mbedtls_md5_finish( &md5, hash ); + mbedtls_sha1_finish( &sha1, hash + 16 ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calculated verify result", hash, 36 ); + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc verify" ) ); + + mbedtls_md5_free( &md5 ); + mbedtls_sha1_free( &sha1 ); + + return; +} +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) +void ssl_calc_verify_tls_sha256( mbedtls_ssl_context *ssl, unsigned char hash[32] ) +{ + mbedtls_sha256_context sha256; + + mbedtls_sha256_init( &sha256 ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc verify sha256" ) ); + + mbedtls_sha256_clone( &sha256, &ssl->handshake->fin_sha256 ); + mbedtls_sha256_finish( &sha256, hash ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calculated verify result", hash, 32 ); + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc verify" ) ); + + mbedtls_sha256_free( &sha256 ); + + return; +} +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) +void ssl_calc_verify_tls_sha384( mbedtls_ssl_context *ssl, unsigned char hash[48] ) +{ + mbedtls_sha512_context sha512; + + mbedtls_sha512_init( &sha512 ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc verify sha384" ) ); + + mbedtls_sha512_clone( &sha512, &ssl->handshake->fin_sha512 ); + mbedtls_sha512_finish( &sha512, hash ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calculated verify result", hash, 48 ); + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc verify" ) ); + + mbedtls_sha512_free( &sha512 ); + + return; +} +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) +int mbedtls_ssl_psk_derive_premaster( mbedtls_ssl_context *ssl, mbedtls_key_exchange_type_t key_ex ) +{ + unsigned char *p = ssl->handshake->premaster; + unsigned char *end = p + sizeof( ssl->handshake->premaster ); + const unsigned char *psk = ssl->conf->psk; + size_t psk_len = ssl->conf->psk_len; + + /* If the psk callback was called, use its result */ + if( ssl->handshake->psk != NULL ) + { + psk = ssl->handshake->psk; + psk_len = ssl->handshake->psk_len; + } + + /* + * PMS = struct { + * opaque other_secret<0..2^16-1>; + * opaque psk<0..2^16-1>; + * }; + * with "other_secret" depending on the particular key exchange + */ +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) + if( key_ex == MBEDTLS_KEY_EXCHANGE_PSK ) + { + if( end - p < 2 ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + *(p++) = (unsigned char)( psk_len >> 8 ); + *(p++) = (unsigned char)( psk_len ); + + if( end < p || (size_t)( end - p ) < psk_len ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + memset( p, 0, psk_len ); + p += psk_len; + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) + if( key_ex == MBEDTLS_KEY_EXCHANGE_RSA_PSK ) + { + /* + * other_secret already set by the ClientKeyExchange message, + * and is 48 bytes long + */ + *p++ = 0; + *p++ = 48; + p += 48; + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) + if( key_ex == MBEDTLS_KEY_EXCHANGE_DHE_PSK ) + { + int ret; + size_t len; + + /* Write length only when we know the actual value */ + if( ( ret = mbedtls_dhm_calc_secret( &ssl->handshake->dhm_ctx, + p + 2, end - ( p + 2 ), &len, + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_dhm_calc_secret", ret ); + return( ret ); + } + *(p++) = (unsigned char)( len >> 8 ); + *(p++) = (unsigned char)( len ); + p += len; + + MBEDTLS_SSL_DEBUG_MPI( 3, "DHM: K ", &ssl->handshake->dhm_ctx.K ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) + if( key_ex == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK ) + { + int ret; + size_t zlen; + + if( ( ret = mbedtls_ecdh_calc_secret( &ssl->handshake->ecdh_ctx, &zlen, + p + 2, end - ( p + 2 ), + ssl->conf->f_rng, ssl->conf->p_rng ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ecdh_calc_secret", ret ); + return( ret ); + } + + *(p++) = (unsigned char)( zlen >> 8 ); + *(p++) = (unsigned char)( zlen ); + p += zlen; + + MBEDTLS_SSL_DEBUG_MPI( 3, "ECDH: z", &ssl->handshake->ecdh_ctx.z ); + } + else +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + /* opaque psk<0..2^16-1>; */ + if( end - p < 2 ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + *(p++) = (unsigned char)( psk_len >> 8 ); + *(p++) = (unsigned char)( psk_len ); + + if( end < p || (size_t)( end - p ) < psk_len ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + memcpy( p, psk, psk_len ); + p += psk_len; + + ssl->handshake->pmslen = p - ssl->handshake->premaster; + + return( 0 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ + +#if defined(MBEDTLS_SSL_PROTO_SSL3) +/* + * SSLv3.0 MAC functions + */ +static void ssl_mac( mbedtls_md_context_t *md_ctx, unsigned char *secret, + unsigned char *buf, size_t len, + unsigned char *ctr, int type ) +{ + unsigned char header[11]; + unsigned char padding[48]; + int padlen; + int md_size = mbedtls_md_get_size( md_ctx->md_info ); + int md_type = mbedtls_md_get_type( md_ctx->md_info ); + + /* Only MD5 and SHA-1 supported */ + if( md_type == MBEDTLS_MD_MD5 ) + padlen = 48; + else + padlen = 40; + + memcpy( header, ctr, 8 ); + header[ 8] = (unsigned char) type; + header[ 9] = (unsigned char)( len >> 8 ); + header[10] = (unsigned char)( len ); + + memset( padding, 0x36, padlen ); + mbedtls_md_starts( md_ctx ); + mbedtls_md_update( md_ctx, secret, md_size ); + mbedtls_md_update( md_ctx, padding, padlen ); + mbedtls_md_update( md_ctx, header, 11 ); + mbedtls_md_update( md_ctx, buf, len ); + mbedtls_md_finish( md_ctx, buf + len ); + + memset( padding, 0x5C, padlen ); + mbedtls_md_starts( md_ctx ); + mbedtls_md_update( md_ctx, secret, md_size ); + mbedtls_md_update( md_ctx, padding, padlen ); + mbedtls_md_update( md_ctx, buf + len, md_size ); + mbedtls_md_finish( md_ctx, buf + len ); +} +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + +#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) || \ + ( defined(MBEDTLS_CIPHER_MODE_CBC) && \ + ( defined(MBEDTLS_AES_C) || defined(MBEDTLS_CAMELLIA_C) ) ) +#define SSL_SOME_MODES_USE_MAC +#endif + +/* + * Encryption/decryption functions + */ +static int ssl_encrypt_buf( mbedtls_ssl_context *ssl ) +{ + mbedtls_cipher_mode_t mode; + int auth_done = 0; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> encrypt buf" ) ); + + if( ssl->session_out == NULL || ssl->transform_out == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + mode = mbedtls_cipher_get_cipher_mode( &ssl->transform_out->cipher_ctx_enc ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "before encrypt: output payload", + ssl->out_msg, ssl->out_msglen ); + + /* + * Add MAC before if needed + */ +#if defined(SSL_SOME_MODES_USE_MAC) + if( mode == MBEDTLS_MODE_STREAM || + ( mode == MBEDTLS_MODE_CBC +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + && ssl->session_out->encrypt_then_mac == MBEDTLS_SSL_ETM_DISABLED +#endif + ) ) + { +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + ssl_mac( &ssl->transform_out->md_ctx_enc, + ssl->transform_out->mac_enc, + ssl->out_msg, ssl->out_msglen, + ssl->out_ctr, ssl->out_msgtype ); + } + else +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_1 ) + { + mbedtls_md_hmac_update( &ssl->transform_out->md_ctx_enc, ssl->out_ctr, 8 ); + mbedtls_md_hmac_update( &ssl->transform_out->md_ctx_enc, ssl->out_hdr, 3 ); + mbedtls_md_hmac_update( &ssl->transform_out->md_ctx_enc, ssl->out_len, 2 ); + mbedtls_md_hmac_update( &ssl->transform_out->md_ctx_enc, + ssl->out_msg, ssl->out_msglen ); + mbedtls_md_hmac_finish( &ssl->transform_out->md_ctx_enc, + ssl->out_msg + ssl->out_msglen ); + mbedtls_md_hmac_reset( &ssl->transform_out->md_ctx_enc ); + } + else +#endif + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_BUF( 4, "computed mac", + ssl->out_msg + ssl->out_msglen, + ssl->transform_out->maclen ); + + ssl->out_msglen += ssl->transform_out->maclen; + auth_done++; + } +#endif /* AEAD not the only option */ + + /* + * Encrypt + */ +#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) + if( mode == MBEDTLS_MODE_STREAM ) + { + int ret; + size_t olen = 0; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "before encrypt: msglen = %d, " + "including %d bytes of padding", + ssl->out_msglen, 0 ) ); + + if( ( ret = mbedtls_cipher_crypt( &ssl->transform_out->cipher_ctx_enc, + ssl->transform_out->iv_enc, + ssl->transform_out->ivlen, + ssl->out_msg, ssl->out_msglen, + ssl->out_msg, &olen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_crypt", ret ); + return( ret ); + } + + if( ssl->out_msglen != olen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + } + else +#endif /* MBEDTLS_ARC4_C || MBEDTLS_CIPHER_NULL_CIPHER */ +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) + if( mode == MBEDTLS_MODE_GCM || + mode == MBEDTLS_MODE_CCM ) + { + int ret; + size_t enc_msglen, olen; + unsigned char *enc_msg; + unsigned char add_data[13]; + unsigned char taglen = ssl->transform_out->ciphersuite_info->flags & + MBEDTLS_CIPHERSUITE_SHORT_TAG ? 8 : 16; + + memcpy( add_data, ssl->out_ctr, 8 ); + add_data[8] = ssl->out_msgtype; + mbedtls_ssl_write_version( ssl->major_ver, ssl->minor_ver, + ssl->conf->transport, add_data + 9 ); + add_data[11] = ( ssl->out_msglen >> 8 ) & 0xFF; + add_data[12] = ssl->out_msglen & 0xFF; + + MBEDTLS_SSL_DEBUG_BUF( 4, "additional data used for AEAD", + add_data, 13 ); + + /* + * Generate IV + */ +#if defined(MBEDTLS_SSL_AEAD_RANDOM_IV) + ret = ssl->conf->f_rng( ssl->conf->p_rng, + ssl->transform_out->iv_enc + ssl->transform_out->fixed_ivlen, + ssl->transform_out->ivlen - ssl->transform_out->fixed_ivlen ); + if( ret != 0 ) + return( ret ); + + memcpy( ssl->out_iv, + ssl->transform_out->iv_enc + ssl->transform_out->fixed_ivlen, + ssl->transform_out->ivlen - ssl->transform_out->fixed_ivlen ); +#else + if( ssl->transform_out->ivlen - ssl->transform_out->fixed_ivlen != 8 ) + { + /* Reminder if we ever add an AEAD mode with a different size */ + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + memcpy( ssl->transform_out->iv_enc + ssl->transform_out->fixed_ivlen, + ssl->out_ctr, 8 ); + memcpy( ssl->out_iv, ssl->out_ctr, 8 ); +#endif + + MBEDTLS_SSL_DEBUG_BUF( 4, "IV used", ssl->out_iv, + ssl->transform_out->ivlen - ssl->transform_out->fixed_ivlen ); + + /* + * Fix pointer positions and message length with added IV + */ + enc_msg = ssl->out_msg; + enc_msglen = ssl->out_msglen; + ssl->out_msglen += ssl->transform_out->ivlen - + ssl->transform_out->fixed_ivlen; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "before encrypt: msglen = %d, " + "including %d bytes of padding", + ssl->out_msglen, 0 ) ); + + /* + * Encrypt and authenticate + */ + if( ( ret = mbedtls_cipher_auth_encrypt( &ssl->transform_out->cipher_ctx_enc, + ssl->transform_out->iv_enc, + ssl->transform_out->ivlen, + add_data, 13, + enc_msg, enc_msglen, + enc_msg, &olen, + enc_msg + enc_msglen, taglen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_auth_encrypt", ret ); + return( ret ); + } + + if( olen != enc_msglen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + ssl->out_msglen += taglen; + auth_done++; + + MBEDTLS_SSL_DEBUG_BUF( 4, "after encrypt: tag", enc_msg + enc_msglen, taglen ); + } + else +#endif /* MBEDTLS_GCM_C || MBEDTLS_CCM_C */ +#if defined(MBEDTLS_CIPHER_MODE_CBC) && \ + ( defined(MBEDTLS_AES_C) || defined(MBEDTLS_CAMELLIA_C) ) + if( mode == MBEDTLS_MODE_CBC ) + { + int ret; + unsigned char *enc_msg; + size_t enc_msglen, padlen, olen = 0, i; + + padlen = ssl->transform_out->ivlen - ( ssl->out_msglen + 1 ) % + ssl->transform_out->ivlen; + if( padlen == ssl->transform_out->ivlen ) + padlen = 0; + + for( i = 0; i <= padlen; i++ ) + ssl->out_msg[ssl->out_msglen + i] = (unsigned char) padlen; + + ssl->out_msglen += padlen + 1; + + enc_msglen = ssl->out_msglen; + enc_msg = ssl->out_msg; + +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2) + /* + * Prepend per-record IV for block cipher in TLS v1.1 and up as per + * Method 1 (6.2.3.2. in RFC4346 and RFC5246) + */ + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_2 ) + { + /* + * Generate IV + */ + ret = ssl->conf->f_rng( ssl->conf->p_rng, ssl->transform_out->iv_enc, + ssl->transform_out->ivlen ); + if( ret != 0 ) + return( ret ); + + memcpy( ssl->out_iv, ssl->transform_out->iv_enc, + ssl->transform_out->ivlen ); + + /* + * Fix pointer positions and message length with added IV + */ + enc_msg = ssl->out_msg; + enc_msglen = ssl->out_msglen; + ssl->out_msglen += ssl->transform_out->ivlen; + } +#endif /* MBEDTLS_SSL_PROTO_TLS1_1 || MBEDTLS_SSL_PROTO_TLS1_2 */ + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "before encrypt: msglen = %d, " + "including %d bytes of IV and %d bytes of padding", + ssl->out_msglen, ssl->transform_out->ivlen, + padlen + 1 ) ); + + if( ( ret = mbedtls_cipher_crypt( &ssl->transform_out->cipher_ctx_enc, + ssl->transform_out->iv_enc, + ssl->transform_out->ivlen, + enc_msg, enc_msglen, + enc_msg, &olen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_crypt", ret ); + return( ret ); + } + + if( enc_msglen != olen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) + if( ssl->minor_ver < MBEDTLS_SSL_MINOR_VERSION_2 ) + { + /* + * Save IV in SSL3 and TLS1 + */ + memcpy( ssl->transform_out->iv_enc, + ssl->transform_out->cipher_ctx_enc.iv, + ssl->transform_out->ivlen ); + } +#endif + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + if( auth_done == 0 ) + { + /* + * MAC(MAC_write_key, seq_num + + * TLSCipherText.type + + * TLSCipherText.version + + * length_of( (IV +) ENC(...) ) + + * IV + // except for TLS 1.0 + * ENC(content + padding + padding_length)); + */ + unsigned char pseudo_hdr[13]; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "using encrypt then mac" ) ); + + memcpy( pseudo_hdr + 0, ssl->out_ctr, 8 ); + memcpy( pseudo_hdr + 8, ssl->out_hdr, 3 ); + pseudo_hdr[11] = (unsigned char)( ( ssl->out_msglen >> 8 ) & 0xFF ); + pseudo_hdr[12] = (unsigned char)( ( ssl->out_msglen ) & 0xFF ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "MAC'd meta-data", pseudo_hdr, 13 ); + + mbedtls_md_hmac_update( &ssl->transform_out->md_ctx_enc, pseudo_hdr, 13 ); + mbedtls_md_hmac_update( &ssl->transform_out->md_ctx_enc, + ssl->out_iv, ssl->out_msglen ); + mbedtls_md_hmac_finish( &ssl->transform_out->md_ctx_enc, + ssl->out_iv + ssl->out_msglen ); + mbedtls_md_hmac_reset( &ssl->transform_out->md_ctx_enc ); + + ssl->out_msglen += ssl->transform_out->maclen; + auth_done++; + } +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + } + else +#endif /* MBEDTLS_CIPHER_MODE_CBC && + ( MBEDTLS_AES_C || MBEDTLS_CAMELLIA_C ) */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + /* Make extra sure authentication was performed, exactly once */ + if( auth_done != 1 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= encrypt buf" ) ); + + return( 0 ); +} + +#define SSL_MAX_MAC_SIZE 48 + +static int ssl_decrypt_buf( mbedtls_ssl_context *ssl ) +{ + size_t i; + mbedtls_cipher_mode_t mode; + int auth_done = 0; +#if defined(SSL_SOME_MODES_USE_MAC) + size_t padlen = 0, correct = 1; +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> decrypt buf" ) ); + + if( ssl->session_in == NULL || ssl->transform_in == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + mode = mbedtls_cipher_get_cipher_mode( &ssl->transform_in->cipher_ctx_dec ); + + if( ssl->in_msglen < ssl->transform_in->minlen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "in_msglen (%d) < minlen (%d)", + ssl->in_msglen, ssl->transform_in->minlen ) ); + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } + +#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) + if( mode == MBEDTLS_MODE_STREAM ) + { + int ret; + size_t olen = 0; + + padlen = 0; + + if( ( ret = mbedtls_cipher_crypt( &ssl->transform_in->cipher_ctx_dec, + ssl->transform_in->iv_dec, + ssl->transform_in->ivlen, + ssl->in_msg, ssl->in_msglen, + ssl->in_msg, &olen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_crypt", ret ); + return( ret ); + } + + if( ssl->in_msglen != olen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + } + else +#endif /* MBEDTLS_ARC4_C || MBEDTLS_CIPHER_NULL_CIPHER */ +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) + if( mode == MBEDTLS_MODE_GCM || + mode == MBEDTLS_MODE_CCM ) + { + int ret; + size_t dec_msglen, olen; + unsigned char *dec_msg; + unsigned char *dec_msg_result; + unsigned char add_data[13]; + unsigned char taglen = ssl->transform_in->ciphersuite_info->flags & + MBEDTLS_CIPHERSUITE_SHORT_TAG ? 8 : 16; + size_t explicit_iv_len = ssl->transform_in->ivlen - + ssl->transform_in->fixed_ivlen; + + if( ssl->in_msglen < explicit_iv_len + taglen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "msglen (%d) < explicit_iv_len (%d) " + "+ taglen (%d)", ssl->in_msglen, + explicit_iv_len, taglen ) ); + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } + dec_msglen = ssl->in_msglen - explicit_iv_len - taglen; + + dec_msg = ssl->in_msg; + dec_msg_result = ssl->in_msg; + ssl->in_msglen = dec_msglen; + + memcpy( add_data, ssl->in_ctr, 8 ); + add_data[8] = ssl->in_msgtype; + mbedtls_ssl_write_version( ssl->major_ver, ssl->minor_ver, + ssl->conf->transport, add_data + 9 ); + add_data[11] = ( ssl->in_msglen >> 8 ) & 0xFF; + add_data[12] = ssl->in_msglen & 0xFF; + + MBEDTLS_SSL_DEBUG_BUF( 4, "additional data used for AEAD", + add_data, 13 ); + + memcpy( ssl->transform_in->iv_dec + ssl->transform_in->fixed_ivlen, + ssl->in_iv, + ssl->transform_in->ivlen - ssl->transform_in->fixed_ivlen ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "IV used", ssl->transform_in->iv_dec, + ssl->transform_in->ivlen ); + MBEDTLS_SSL_DEBUG_BUF( 4, "TAG used", dec_msg + dec_msglen, taglen ); + + /* + * Decrypt and authenticate + */ + if( ( ret = mbedtls_cipher_auth_decrypt( &ssl->transform_in->cipher_ctx_dec, + ssl->transform_in->iv_dec, + ssl->transform_in->ivlen, + add_data, 13, + dec_msg, dec_msglen, + dec_msg_result, &olen, + dec_msg + dec_msglen, taglen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_auth_decrypt", ret ); + + if( ret == MBEDTLS_ERR_CIPHER_AUTH_FAILED ) + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + + return( ret ); + } + auth_done++; + + if( olen != dec_msglen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + } + else +#endif /* MBEDTLS_GCM_C || MBEDTLS_CCM_C */ +#if defined(MBEDTLS_CIPHER_MODE_CBC) && \ + ( defined(MBEDTLS_AES_C) || defined(MBEDTLS_CAMELLIA_C) ) + if( mode == MBEDTLS_MODE_CBC ) + { + /* + * Decrypt and check the padding + */ + int ret; + unsigned char *dec_msg; + unsigned char *dec_msg_result; + size_t dec_msglen; + size_t minlen = 0; + size_t olen = 0; + + /* + * Check immediate ciphertext sanity + */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_2 ) + minlen += ssl->transform_in->ivlen; +#endif + + if( ssl->in_msglen < minlen + ssl->transform_in->ivlen || + ssl->in_msglen < minlen + ssl->transform_in->maclen + 1 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "msglen (%d) < max( ivlen(%d), maclen (%d) " + "+ 1 ) ( + expl IV )", ssl->in_msglen, + ssl->transform_in->ivlen, + ssl->transform_in->maclen ) ); + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } + + dec_msglen = ssl->in_msglen; + dec_msg = ssl->in_msg; + dec_msg_result = ssl->in_msg; + + /* + * Authenticate before decrypt if enabled + */ +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + if( ssl->session_in->encrypt_then_mac == MBEDTLS_SSL_ETM_ENABLED ) + { + unsigned char computed_mac[SSL_MAX_MAC_SIZE]; + unsigned char pseudo_hdr[13]; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "using encrypt then mac" ) ); + + dec_msglen -= ssl->transform_in->maclen; + ssl->in_msglen -= ssl->transform_in->maclen; + + memcpy( pseudo_hdr + 0, ssl->in_ctr, 8 ); + memcpy( pseudo_hdr + 8, ssl->in_hdr, 3 ); + pseudo_hdr[11] = (unsigned char)( ( ssl->in_msglen >> 8 ) & 0xFF ); + pseudo_hdr[12] = (unsigned char)( ( ssl->in_msglen ) & 0xFF ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "MAC'd meta-data", pseudo_hdr, 13 ); + + mbedtls_md_hmac_update( &ssl->transform_in->md_ctx_dec, pseudo_hdr, 13 ); + mbedtls_md_hmac_update( &ssl->transform_in->md_ctx_dec, + ssl->in_iv, ssl->in_msglen ); + mbedtls_md_hmac_finish( &ssl->transform_in->md_ctx_dec, computed_mac ); + mbedtls_md_hmac_reset( &ssl->transform_in->md_ctx_dec ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "message mac", ssl->in_iv + ssl->in_msglen, + ssl->transform_in->maclen ); + MBEDTLS_SSL_DEBUG_BUF( 4, "computed mac", computed_mac, + ssl->transform_in->maclen ); + + if( mbedtls_ssl_safer_memcmp( ssl->in_iv + ssl->in_msglen, computed_mac, + ssl->transform_in->maclen ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "message mac does not match" ) ); + + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } + auth_done++; + } +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ + + /* + * Check length sanity + */ + if( ssl->in_msglen % ssl->transform_in->ivlen != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "msglen (%d) %% ivlen (%d) != 0", + ssl->in_msglen, ssl->transform_in->ivlen ) ); + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } + +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) || defined(MBEDTLS_SSL_PROTO_TLS1_2) + /* + * Initialize for prepended IV for block cipher in TLS v1.1 and up + */ + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_2 ) + { + dec_msglen -= ssl->transform_in->ivlen; + ssl->in_msglen -= ssl->transform_in->ivlen; + + for( i = 0; i < ssl->transform_in->ivlen; i++ ) + ssl->transform_in->iv_dec[i] = ssl->in_iv[i]; + } +#endif /* MBEDTLS_SSL_PROTO_TLS1_1 || MBEDTLS_SSL_PROTO_TLS1_2 */ + + if( ( ret = mbedtls_cipher_crypt( &ssl->transform_in->cipher_ctx_dec, + ssl->transform_in->iv_dec, + ssl->transform_in->ivlen, + dec_msg, dec_msglen, + dec_msg_result, &olen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_cipher_crypt", ret ); + return( ret ); + } + + if( dec_msglen != olen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) + if( ssl->minor_ver < MBEDTLS_SSL_MINOR_VERSION_2 ) + { + /* + * Save IV in SSL3 and TLS1 + */ + memcpy( ssl->transform_in->iv_dec, + ssl->transform_in->cipher_ctx_dec.iv, + ssl->transform_in->ivlen ); + } +#endif + + padlen = 1 + ssl->in_msg[ssl->in_msglen - 1]; + + if( ssl->in_msglen < ssl->transform_in->maclen + padlen && + auth_done == 0 ) + { +#if defined(MBEDTLS_SSL_DEBUG_ALL) + MBEDTLS_SSL_DEBUG_MSG( 1, ( "msglen (%d) < maclen (%d) + padlen (%d)", + ssl->in_msglen, ssl->transform_in->maclen, padlen ) ); +#endif + padlen = 0; + correct = 0; + } + +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + if( padlen > ssl->transform_in->ivlen ) + { +#if defined(MBEDTLS_SSL_DEBUG_ALL) + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad padding length: is %d, " + "should be no more than %d", + padlen, ssl->transform_in->ivlen ) ); +#endif + correct = 0; + } + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver > MBEDTLS_SSL_MINOR_VERSION_0 ) + { + /* + * TLSv1+: always check the padding up to the first failure + * and fake check up to 256 bytes of padding + */ + size_t pad_count = 0, real_count = 1; + size_t padding_idx = ssl->in_msglen - padlen - 1; + + /* + * Padding is guaranteed to be incorrect if: + * 1. padlen >= ssl->in_msglen + * + * 2. padding_idx >= MBEDTLS_SSL_MAX_CONTENT_LEN + + * ssl->transform_in->maclen + * + * In both cases we reset padding_idx to a safe value (0) to + * prevent out-of-buffer reads. + */ + correct &= ( ssl->in_msglen >= padlen + 1 ); + correct &= ( padding_idx < MBEDTLS_SSL_MAX_CONTENT_LEN + + ssl->transform_in->maclen ); + + padding_idx *= correct; + + for( i = 1; i <= 256; i++ ) + { + real_count &= ( i <= padlen ); + pad_count += real_count * + ( ssl->in_msg[padding_idx + i] == padlen - 1 ); + } + + correct &= ( pad_count == padlen ); /* Only 1 on correct padding */ + +#if defined(MBEDTLS_SSL_DEBUG_ALL) + if( padlen > 0 && correct == 0 ) + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad padding byte detected" ) ); +#endif + padlen &= correct * 0x1FF; + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \ + MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + ssl->in_msglen -= padlen; + } + else +#endif /* MBEDTLS_CIPHER_MODE_CBC && + ( MBEDTLS_AES_C || MBEDTLS_CAMELLIA_C ) */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_BUF( 4, "raw buffer after decryption", + ssl->in_msg, ssl->in_msglen ); + + /* + * Authenticate if not done yet. + * Compute the MAC regardless of the padding result (RFC4346, CBCTIME). + */ +#if defined(SSL_SOME_MODES_USE_MAC) + if( auth_done == 0 ) + { + unsigned char tmp[SSL_MAX_MAC_SIZE]; + + ssl->in_msglen -= ssl->transform_in->maclen; + + ssl->in_len[0] = (unsigned char)( ssl->in_msglen >> 8 ); + ssl->in_len[1] = (unsigned char)( ssl->in_msglen ); + + memcpy( tmp, ssl->in_msg + ssl->in_msglen, ssl->transform_in->maclen ); + +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + ssl_mac( &ssl->transform_in->md_ctx_dec, + ssl->transform_in->mac_dec, + ssl->in_msg, ssl->in_msglen, + ssl->in_ctr, ssl->in_msgtype ); + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver > MBEDTLS_SSL_MINOR_VERSION_0 ) + { + /* + * Process MAC and always update for padlen afterwards to make + * total time independent of padlen + * + * extra_run compensates MAC check for padlen + * + * Known timing attacks: + * - Lucky Thirteen (http://www.isg.rhul.ac.uk/tls/TLStiming.pdf) + * + * We use ( ( Lx + 8 ) / 64 ) to handle 'negative Lx' values + * correctly. (We round down instead of up, so -56 is the correct + * value for our calculations instead of -55) + */ + size_t j, extra_run = 0; + extra_run = ( 13 + ssl->in_msglen + padlen + 8 ) / 64 - + ( 13 + ssl->in_msglen + 8 ) / 64; + + extra_run &= correct * 0xFF; + + mbedtls_md_hmac_update( &ssl->transform_in->md_ctx_dec, ssl->in_ctr, 8 ); + mbedtls_md_hmac_update( &ssl->transform_in->md_ctx_dec, ssl->in_hdr, 3 ); + mbedtls_md_hmac_update( &ssl->transform_in->md_ctx_dec, ssl->in_len, 2 ); + mbedtls_md_hmac_update( &ssl->transform_in->md_ctx_dec, ssl->in_msg, + ssl->in_msglen ); + mbedtls_md_hmac_finish( &ssl->transform_in->md_ctx_dec, + ssl->in_msg + ssl->in_msglen ); + /* Call mbedtls_md_process at least once due to cache attacks */ + for( j = 0; j < extra_run + 1; j++ ) + mbedtls_md_process( &ssl->transform_in->md_ctx_dec, ssl->in_msg ); + + mbedtls_md_hmac_reset( &ssl->transform_in->md_ctx_dec ); + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \ + MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + MBEDTLS_SSL_DEBUG_BUF( 4, "message mac", tmp, ssl->transform_in->maclen ); + MBEDTLS_SSL_DEBUG_BUF( 4, "computed mac", ssl->in_msg + ssl->in_msglen, + ssl->transform_in->maclen ); + + if( mbedtls_ssl_safer_memcmp( tmp, ssl->in_msg + ssl->in_msglen, + ssl->transform_in->maclen ) != 0 ) + { +#if defined(MBEDTLS_SSL_DEBUG_ALL) + MBEDTLS_SSL_DEBUG_MSG( 1, ( "message mac does not match" ) ); +#endif + correct = 0; + } + auth_done++; + + /* + * Finally check the correct flag + */ + if( correct == 0 ) + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } +#endif /* SSL_SOME_MODES_USE_MAC */ + + /* Make extra sure authentication was performed, exactly once */ + if( auth_done != 1 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + if( ssl->in_msglen == 0 ) + { + ssl->nb_zero++; + + /* + * Three or more empty messages may be a DoS attack + * (excessive CPU consumption). + */ + if( ssl->nb_zero > 3 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "received four consecutive empty " + "messages, possible DoS attack" ) ); + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } + } + else + ssl->nb_zero = 0; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + ; /* in_ctr read from peer, not maintained internally */ + } + else +#endif + { + for( i = 8; i > ssl_ep_len( ssl ); i-- ) + if( ++ssl->in_ctr[i - 1] != 0 ) + break; + + /* The loop goes to its end iff the counter is wrapping */ + if( i == ssl_ep_len( ssl ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "incoming message counter would wrap" ) ); + return( MBEDTLS_ERR_SSL_COUNTER_WRAPPING ); + } + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= decrypt buf" ) ); + + return( 0 ); +} + +#undef MAC_NONE +#undef MAC_PLAINTEXT +#undef MAC_CIPHERTEXT + +#if defined(MBEDTLS_ZLIB_SUPPORT) +/* + * Compression/decompression functions + */ +static int ssl_compress_buf( mbedtls_ssl_context *ssl ) +{ + int ret; + unsigned char *msg_post = ssl->out_msg; + size_t len_pre = ssl->out_msglen; + unsigned char *msg_pre = ssl->compress_buf; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> compress buf" ) ); + + if( len_pre == 0 ) + return( 0 ); + + memcpy( msg_pre, ssl->out_msg, len_pre ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "before compression: msglen = %d, ", + ssl->out_msglen ) ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "before compression: output payload", + ssl->out_msg, ssl->out_msglen ); + + ssl->transform_out->ctx_deflate.next_in = msg_pre; + ssl->transform_out->ctx_deflate.avail_in = len_pre; + ssl->transform_out->ctx_deflate.next_out = msg_post; + ssl->transform_out->ctx_deflate.avail_out = MBEDTLS_SSL_BUFFER_LEN; + + ret = deflate( &ssl->transform_out->ctx_deflate, Z_SYNC_FLUSH ); + if( ret != Z_OK ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "failed to perform compression (%d)", ret ) ); + return( MBEDTLS_ERR_SSL_COMPRESSION_FAILED ); + } + + ssl->out_msglen = MBEDTLS_SSL_BUFFER_LEN - + ssl->transform_out->ctx_deflate.avail_out; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "after compression: msglen = %d, ", + ssl->out_msglen ) ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "after compression: output payload", + ssl->out_msg, ssl->out_msglen ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= compress buf" ) ); + + return( 0 ); +} + +static int ssl_decompress_buf( mbedtls_ssl_context *ssl ) +{ + int ret; + unsigned char *msg_post = ssl->in_msg; + size_t len_pre = ssl->in_msglen; + unsigned char *msg_pre = ssl->compress_buf; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> decompress buf" ) ); + + if( len_pre == 0 ) + return( 0 ); + + memcpy( msg_pre, ssl->in_msg, len_pre ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "before decompression: msglen = %d, ", + ssl->in_msglen ) ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "before decompression: input payload", + ssl->in_msg, ssl->in_msglen ); + + ssl->transform_in->ctx_inflate.next_in = msg_pre; + ssl->transform_in->ctx_inflate.avail_in = len_pre; + ssl->transform_in->ctx_inflate.next_out = msg_post; + ssl->transform_in->ctx_inflate.avail_out = MBEDTLS_SSL_MAX_CONTENT_LEN; + + ret = inflate( &ssl->transform_in->ctx_inflate, Z_SYNC_FLUSH ); + if( ret != Z_OK ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "failed to perform decompression (%d)", ret ) ); + return( MBEDTLS_ERR_SSL_COMPRESSION_FAILED ); + } + + ssl->in_msglen = MBEDTLS_SSL_MAX_CONTENT_LEN - + ssl->transform_in->ctx_inflate.avail_out; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "after decompression: msglen = %d, ", + ssl->in_msglen ) ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "after decompression: input payload", + ssl->in_msg, ssl->in_msglen ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= decompress buf" ) ); + + return( 0 ); +} +#endif /* MBEDTLS_ZLIB_SUPPORT */ + +#if defined(MBEDTLS_SSL_SRV_C) && defined(MBEDTLS_SSL_RENEGOTIATION) +static int ssl_write_hello_request( mbedtls_ssl_context *ssl ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) +static int ssl_resend_hello_request( mbedtls_ssl_context *ssl ) +{ + /* If renegotiation is not enforced, retransmit until we would reach max + * timeout if we were using the usual handshake doubling scheme */ + if( ssl->conf->renego_max_records < 0 ) + { + uint32_t ratio = ssl->conf->hs_timeout_max / ssl->conf->hs_timeout_min + 1; + unsigned char doublings = 1; + + while( ratio != 0 ) + { + ++doublings; + ratio >>= 1; + } + + if( ++ssl->renego_records_seen > doublings ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "no longer retransmitting hello request" ) ); + return( 0 ); + } + } + + return( ssl_write_hello_request( ssl ) ); +} +#endif +#endif /* MBEDTLS_SSL_SRV_C && MBEDTLS_SSL_RENEGOTIATION */ + +/* + * Fill the input message buffer by appending data to it. + * The amount of data already fetched is in ssl->in_left. + * + * If we return 0, is it guaranteed that (at least) nb_want bytes are + * available (from this read and/or a previous one). Otherwise, an error code + * is returned (possibly EOF or WANT_READ). + * + * With stream transport (TLS) on success ssl->in_left == nb_want, but + * with datagram transport (DTLS) on success ssl->in_left >= nb_want, + * since we always read a whole datagram at once. + * + * For DTLS, it is up to the caller to set ssl->next_record_offset when + * they're done reading a record. + */ +int mbedtls_ssl_fetch_input( mbedtls_ssl_context *ssl, size_t nb_want ) +{ + int ret; + size_t len; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> fetch input" ) ); + + if( ssl->f_recv == NULL && ssl->f_recv_timeout == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "Bad usage of mbedtls_ssl_set_bio() " + "or mbedtls_ssl_set_bio()" ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + if( nb_want > MBEDTLS_SSL_BUFFER_LEN - (size_t)( ssl->in_hdr - ssl->in_buf ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "requesting more data than fits" ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + uint32_t timeout; + + /* Just to be sure */ + if( ssl->f_set_timer == NULL || ssl->f_get_timer == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "You must use " + "mbedtls_ssl_set_timer_cb() for DTLS" ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + /* + * The point is, we need to always read a full datagram at once, so we + * sometimes read more then requested, and handle the additional data. + * It could be the rest of the current record (while fetching the + * header) and/or some other records in the same datagram. + */ + + /* + * Move to the next record in the already read datagram if applicable + */ + if( ssl->next_record_offset != 0 ) + { + if( ssl->in_left < ssl->next_record_offset ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + ssl->in_left -= ssl->next_record_offset; + + if( ssl->in_left != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "next record in same datagram, offset: %d", + ssl->next_record_offset ) ); + memmove( ssl->in_hdr, + ssl->in_hdr + ssl->next_record_offset, + ssl->in_left ); + } + + ssl->next_record_offset = 0; + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "in_left: %d, nb_want: %d", + ssl->in_left, nb_want ) ); + + /* + * Done if we already have enough data. + */ + if( nb_want <= ssl->in_left) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= fetch input" ) ); + return( 0 ); + } + + /* + * A record can't be split accross datagrams. If we need to read but + * are not at the beginning of a new record, the caller did something + * wrong. + */ + if( ssl->in_left != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + /* + * Don't even try to read if time's out already. + * This avoids by-passing the timer when repeatedly receiving messages + * that will end up being dropped. + */ + if( ssl_check_timer( ssl ) != 0 ) + ret = MBEDTLS_ERR_SSL_TIMEOUT; + else + { + len = MBEDTLS_SSL_BUFFER_LEN - ( ssl->in_hdr - ssl->in_buf ); + + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER ) + timeout = ssl->handshake->retransmit_timeout; + else + timeout = ssl->conf->read_timeout; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "f_recv_timeout: %u ms", timeout ) ); + + if( ssl->f_recv_timeout != NULL ) + ret = ssl->f_recv_timeout( ssl->p_bio, ssl->in_hdr, len, + timeout ); + else + ret = ssl->f_recv( ssl->p_bio, ssl->in_hdr, len ); + + MBEDTLS_SSL_DEBUG_RET( 2, "ssl->f_recv(_timeout)", ret ); + + if( ret == 0 ) + return( MBEDTLS_ERR_SSL_CONN_EOF ); + } + + if( ret == MBEDTLS_ERR_SSL_TIMEOUT ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "timeout" ) ); + ssl_set_timer( ssl, 0 ); + + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER ) + { + if( ssl_double_retransmit_timeout( ssl ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "handshake timeout" ) ); + return( MBEDTLS_ERR_SSL_TIMEOUT ); + } + + if( ( ret = mbedtls_ssl_resend( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_resend", ret ); + return( ret ); + } + + return( MBEDTLS_ERR_SSL_WANT_READ ); + } +#if defined(MBEDTLS_SSL_SRV_C) && defined(MBEDTLS_SSL_RENEGOTIATION) + else if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_PENDING ) + { + if( ( ret = ssl_resend_hello_request( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_resend_hello_request", ret ); + return( ret ); + } + + return( MBEDTLS_ERR_SSL_WANT_READ ); + } +#endif /* MBEDTLS_SSL_SRV_C && MBEDTLS_SSL_RENEGOTIATION */ + } + + if( ret < 0 ) + return( ret ); + + ssl->in_left = ret; + } + else +#endif + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "in_left: %d, nb_want: %d", + ssl->in_left, nb_want ) ); + + while( ssl->in_left < nb_want ) + { + len = nb_want - ssl->in_left; + + if( ssl_check_timer( ssl ) != 0 ) + ret = MBEDTLS_ERR_SSL_TIMEOUT; + else + { + if( ssl->f_recv_timeout != NULL ) + { + ret = ssl->f_recv_timeout( ssl->p_bio, + ssl->in_hdr + ssl->in_left, len, + ssl->conf->read_timeout ); + } + else + { + ret = ssl->f_recv( ssl->p_bio, + ssl->in_hdr + ssl->in_left, len ); + } + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "in_left: %d, nb_want: %d", + ssl->in_left, nb_want ) ); + MBEDTLS_SSL_DEBUG_RET( 2, "ssl->f_recv(_timeout)", ret ); + + if( ret == 0 ) + return( MBEDTLS_ERR_SSL_CONN_EOF ); + + if( ret < 0 ) + return( ret ); + + ssl->in_left += ret; + } + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= fetch input" ) ); + + return( 0 ); +} + +/* + * Flush any data not yet written + */ +int mbedtls_ssl_flush_output( mbedtls_ssl_context *ssl ) +{ + int ret; + unsigned char *buf, i; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> flush output" ) ); + + if( ssl->f_send == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "Bad usage of mbedtls_ssl_set_bio() " + "or mbedtls_ssl_set_bio()" ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + /* Avoid incrementing counter if data is flushed */ + if( ssl->out_left == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= flush output" ) ); + return( 0 ); + } + + while( ssl->out_left > 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "message length: %d, out_left: %d", + mbedtls_ssl_hdr_len( ssl ) + ssl->out_msglen, ssl->out_left ) ); + + buf = ssl->out_hdr + mbedtls_ssl_hdr_len( ssl ) + + ssl->out_msglen - ssl->out_left; + ret = ssl->f_send( ssl->p_bio, buf, ssl->out_left ); + + MBEDTLS_SSL_DEBUG_RET( 2, "ssl->f_send", ret ); + + if( ret <= 0 ) + return( ret ); + + ssl->out_left -= ret; + } + + for( i = 8; i > ssl_ep_len( ssl ); i-- ) + if( ++ssl->out_ctr[i - 1] != 0 ) + break; + + /* The loop goes to its end iff the counter is wrapping */ + if( i == ssl_ep_len( ssl ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "outgoing message counter would wrap" ) ); + return( MBEDTLS_ERR_SSL_COUNTER_WRAPPING ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= flush output" ) ); + + return( 0 ); +} + +/* + * Functions to handle the DTLS retransmission state machine + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) +/* + * Append current handshake message to current outgoing flight + */ +static int ssl_flight_append( mbedtls_ssl_context *ssl ) +{ + mbedtls_ssl_flight_item *msg; + + /* Allocate space for current message */ + if( ( msg = mbedtls_calloc( 1, sizeof( mbedtls_ssl_flight_item ) ) ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc %d bytes failed", + sizeof( mbedtls_ssl_flight_item ) ) ); + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + if( ( msg->p = mbedtls_calloc( 1, ssl->out_msglen ) ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc %d bytes failed", ssl->out_msglen ) ); + mbedtls_free( msg ); + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + /* Copy current handshake message with headers */ + memcpy( msg->p, ssl->out_msg, ssl->out_msglen ); + msg->len = ssl->out_msglen; + msg->type = ssl->out_msgtype; + msg->next = NULL; + + /* Append to the current flight */ + if( ssl->handshake->flight == NULL ) + ssl->handshake->flight = msg; + else + { + mbedtls_ssl_flight_item *cur = ssl->handshake->flight; + while( cur->next != NULL ) + cur = cur->next; + cur->next = msg; + } + + return( 0 ); +} + +/* + * Free the current flight of handshake messages + */ +static void ssl_flight_free( mbedtls_ssl_flight_item *flight ) +{ + mbedtls_ssl_flight_item *cur = flight; + mbedtls_ssl_flight_item *next; + + while( cur != NULL ) + { + next = cur->next; + + mbedtls_free( cur->p ); + mbedtls_free( cur ); + + cur = next; + } +} + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) +static void ssl_dtls_replay_reset( mbedtls_ssl_context *ssl ); +#endif + +/* + * Swap transform_out and out_ctr with the alternative ones + */ +static void ssl_swap_epochs( mbedtls_ssl_context *ssl ) +{ + mbedtls_ssl_transform *tmp_transform; + unsigned char tmp_out_ctr[8]; + + if( ssl->transform_out == ssl->handshake->alt_transform_out ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "skip swap epochs" ) ); + return; + } + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "swap epochs" ) ); + + /* Swap transforms */ + tmp_transform = ssl->transform_out; + ssl->transform_out = ssl->handshake->alt_transform_out; + ssl->handshake->alt_transform_out = tmp_transform; + + /* Swap epoch + sequence_number */ + memcpy( tmp_out_ctr, ssl->out_ctr, 8 ); + memcpy( ssl->out_ctr, ssl->handshake->alt_out_ctr, 8 ); + memcpy( ssl->handshake->alt_out_ctr, tmp_out_ctr, 8 ); + + /* Adjust to the newly activated transform */ + if( ssl->transform_out != NULL && + ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_2 ) + { + ssl->out_msg = ssl->out_iv + ssl->transform_out->ivlen - + ssl->transform_out->fixed_ivlen; + } + else + ssl->out_msg = ssl->out_iv; + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_activate != NULL ) + { + if( ( ret = mbedtls_ssl_hw_record_activate( ssl, MBEDTLS_SSL_CHANNEL_OUTBOUND ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_hw_record_activate", ret ); + return( MBEDTLS_ERR_SSL_HW_ACCEL_FAILED ); + } + } +#endif +} + +/* + * Retransmit the current flight of messages. + * + * Need to remember the current message in case flush_output returns + * WANT_WRITE, causing us to exit this function and come back later. + * This function must be called until state is no longer SENDING. + */ +int mbedtls_ssl_resend( mbedtls_ssl_context *ssl ) +{ + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> mbedtls_ssl_resend" ) ); + + if( ssl->handshake->retransmit_state != MBEDTLS_SSL_RETRANS_SENDING ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "initialise resending" ) ); + + ssl->handshake->cur_msg = ssl->handshake->flight; + ssl_swap_epochs( ssl ); + + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_SENDING; + } + + while( ssl->handshake->cur_msg != NULL ) + { + int ret; + mbedtls_ssl_flight_item *cur = ssl->handshake->cur_msg; + + /* Swap epochs before sending Finished: we can't do it after + * sending ChangeCipherSpec, in case write returns WANT_READ. + * Must be done before copying, may change out_msg pointer */ + if( cur->type == MBEDTLS_SSL_MSG_HANDSHAKE && + cur->p[0] == MBEDTLS_SSL_HS_FINISHED ) + { + ssl_swap_epochs( ssl ); + } + + memcpy( ssl->out_msg, cur->p, cur->len ); + ssl->out_msglen = cur->len; + ssl->out_msgtype = cur->type; + + ssl->handshake->cur_msg = cur->next; + + MBEDTLS_SSL_DEBUG_BUF( 3, "resent handshake message header", ssl->out_msg, 12 ); + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + } + + if( ssl->state == MBEDTLS_SSL_HANDSHAKE_OVER ) + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_FINISHED; + else + { + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_WAITING; + ssl_set_timer( ssl, ssl->handshake->retransmit_timeout ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= mbedtls_ssl_resend" ) ); + + return( 0 ); +} + +/* + * To be called when the last message of an incoming flight is received. + */ +void mbedtls_ssl_recv_flight_completed( mbedtls_ssl_context *ssl ) +{ + /* We won't need to resend that one any more */ + ssl_flight_free( ssl->handshake->flight ); + ssl->handshake->flight = NULL; + ssl->handshake->cur_msg = NULL; + + /* The next incoming flight will start with this msg_seq */ + ssl->handshake->in_flight_start_seq = ssl->handshake->in_msg_seq; + + /* Cancel timer */ + ssl_set_timer( ssl, 0 ); + + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE && + ssl->in_msg[0] == MBEDTLS_SSL_HS_FINISHED ) + { + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_FINISHED; + } + else + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_PREPARING; +} + +/* + * To be called when the last message of an outgoing flight is send. + */ +void mbedtls_ssl_send_flight_completed( mbedtls_ssl_context *ssl ) +{ + ssl_reset_retransmit_timeout( ssl ); + ssl_set_timer( ssl, ssl->handshake->retransmit_timeout ); + + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE && + ssl->in_msg[0] == MBEDTLS_SSL_HS_FINISHED ) + { + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_FINISHED; + } + else + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_WAITING; +} +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + +/* + * Record layer functions + */ + +/* + * Write current record. + * Uses ssl->out_msgtype, ssl->out_msglen and bytes at ssl->out_msg. + */ +int mbedtls_ssl_write_record( mbedtls_ssl_context *ssl ) +{ + int ret, done = 0; + size_t len = ssl->out_msglen; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write record" ) ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake != NULL && + ssl->handshake->retransmit_state == MBEDTLS_SSL_RETRANS_SENDING ) + { + ; /* Skip special handshake treatment when resending */ + } + else +#endif + if( ssl->out_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE ) + { + if( ssl->out_msg[0] != MBEDTLS_SSL_HS_HELLO_REQUEST && + ssl->handshake == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + ssl->out_msg[1] = (unsigned char)( ( len - 4 ) >> 16 ); + ssl->out_msg[2] = (unsigned char)( ( len - 4 ) >> 8 ); + ssl->out_msg[3] = (unsigned char)( ( len - 4 ) ); + + /* + * DTLS has additional fields in the Handshake layer, + * between the length field and the actual payload: + * uint16 message_seq; + * uint24 fragment_offset; + * uint24 fragment_length; + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + /* Make room for the additional DTLS fields */ + memmove( ssl->out_msg + 12, ssl->out_msg + 4, len - 4 ); + ssl->out_msglen += 8; + len += 8; + + /* Write message_seq and update it, except for HelloRequest */ + if( ssl->out_msg[0] != MBEDTLS_SSL_HS_HELLO_REQUEST ) + { + ssl->out_msg[4] = ( ssl->handshake->out_msg_seq >> 8 ) & 0xFF; + ssl->out_msg[5] = ( ssl->handshake->out_msg_seq ) & 0xFF; + ++( ssl->handshake->out_msg_seq ); + } + else + { + ssl->out_msg[4] = 0; + ssl->out_msg[5] = 0; + } + + /* We don't fragment, so frag_offset = 0 and frag_len = len */ + memset( ssl->out_msg + 6, 0x00, 3 ); + memcpy( ssl->out_msg + 9, ssl->out_msg + 1, 3 ); + } +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + + if( ssl->out_msg[0] != MBEDTLS_SSL_HS_HELLO_REQUEST ) + ssl->handshake->update_checksum( ssl, ssl->out_msg, len ); + } + + /* Save handshake and CCS messages for resending */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake != NULL && + ssl->handshake->retransmit_state != MBEDTLS_SSL_RETRANS_SENDING && + ( ssl->out_msgtype == MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC || + ssl->out_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE ) ) + { + if( ( ret = ssl_flight_append( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_flight_append", ret ); + return( ret ); + } + } +#endif + +#if defined(MBEDTLS_ZLIB_SUPPORT) + if( ssl->transform_out != NULL && + ssl->session_out->compression == MBEDTLS_SSL_COMPRESS_DEFLATE ) + { + if( ( ret = ssl_compress_buf( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_compress_buf", ret ); + return( ret ); + } + + len = ssl->out_msglen; + } +#endif /*MBEDTLS_ZLIB_SUPPORT */ + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_write != NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "going for mbedtls_ssl_hw_record_write()" ) ); + + ret = mbedtls_ssl_hw_record_write( ssl ); + if( ret != 0 && ret != MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_hw_record_write", ret ); + return( MBEDTLS_ERR_SSL_HW_ACCEL_FAILED ); + } + + if( ret == 0 ) + done = 1; + } +#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */ + if( !done ) + { + ssl->out_hdr[0] = (unsigned char) ssl->out_msgtype; + mbedtls_ssl_write_version( ssl->major_ver, ssl->minor_ver, + ssl->conf->transport, ssl->out_hdr + 1 ); + + ssl->out_len[0] = (unsigned char)( len >> 8 ); + ssl->out_len[1] = (unsigned char)( len ); + + if( ssl->transform_out != NULL ) + { + if( ( ret = ssl_encrypt_buf( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_encrypt_buf", ret ); + return( ret ); + } + + len = ssl->out_msglen; + ssl->out_len[0] = (unsigned char)( len >> 8 ); + ssl->out_len[1] = (unsigned char)( len ); + } + + ssl->out_left = mbedtls_ssl_hdr_len( ssl ) + ssl->out_msglen; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "output record: msgtype = %d, " + "version = [%d:%d], msglen = %d", + ssl->out_hdr[0], ssl->out_hdr[1], ssl->out_hdr[2], + ( ssl->out_len[0] << 8 ) | ssl->out_len[1] ) ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "output record sent to network", + ssl->out_hdr, mbedtls_ssl_hdr_len( ssl ) + ssl->out_msglen ); + } + + if( ( ret = mbedtls_ssl_flush_output( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_flush_output", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write record" ) ); + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_PROTO_DTLS) +/* + * Mark bits in bitmask (used for DTLS HS reassembly) + */ +static void ssl_bitmask_set( unsigned char *mask, size_t offset, size_t len ) +{ + unsigned int start_bits, end_bits; + + start_bits = 8 - ( offset % 8 ); + if( start_bits != 8 ) + { + size_t first_byte_idx = offset / 8; + + /* Special case */ + if( len <= start_bits ) + { + for( ; len != 0; len-- ) + mask[first_byte_idx] |= 1 << ( start_bits - len ); + + /* Avoid potential issues with offset or len becoming invalid */ + return; + } + + offset += start_bits; /* Now offset % 8 == 0 */ + len -= start_bits; + + for( ; start_bits != 0; start_bits-- ) + mask[first_byte_idx] |= 1 << ( start_bits - 1 ); + } + + end_bits = len % 8; + if( end_bits != 0 ) + { + size_t last_byte_idx = ( offset + len ) / 8; + + len -= end_bits; /* Now len % 8 == 0 */ + + for( ; end_bits != 0; end_bits-- ) + mask[last_byte_idx] |= 1 << ( 8 - end_bits ); + } + + memset( mask + offset / 8, 0xFF, len / 8 ); +} + +/* + * Check that bitmask is full + */ +static int ssl_bitmask_check( unsigned char *mask, size_t len ) +{ + size_t i; + + for( i = 0; i < len / 8; i++ ) + if( mask[i] != 0xFF ) + return( -1 ); + + for( i = 0; i < len % 8; i++ ) + if( ( mask[len / 8] & ( 1 << ( 7 - i ) ) ) == 0 ) + return( -1 ); + + return( 0 ); +} + +/* + * Reassemble fragmented DTLS handshake messages. + * + * Use a temporary buffer for reassembly, divided in two parts: + * - the first holds the reassembled message (including handshake header), + * - the second holds a bitmask indicating which parts of the message + * (excluding headers) have been received so far. + */ +static int ssl_reassemble_dtls_handshake( mbedtls_ssl_context *ssl ) +{ + unsigned char *msg, *bitmask; + size_t frag_len, frag_off; + size_t msg_len = ssl->in_hslen - 12; /* Without headers */ + + if( ssl->handshake == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "not supported outside handshake (for now)" ) ); + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); + } + + /* + * For first fragment, check size and allocate buffer + */ + if( ssl->handshake->hs_msg == NULL ) + { + size_t alloc_len; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "initialize reassembly, total length = %d", + msg_len ) ); + + if( ssl->in_hslen > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "handshake message too large" ) ); + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); + } + + /* The bitmask needs one bit per byte of message excluding header */ + alloc_len = 12 + msg_len + msg_len / 8 + ( msg_len % 8 != 0 ); + + ssl->handshake->hs_msg = mbedtls_calloc( 1, alloc_len ); + if( ssl->handshake->hs_msg == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc failed (%d bytes)", alloc_len ) ); + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + /* Prepare final header: copy msg_type, length and message_seq, + * then add standardised fragment_offset and fragment_length */ + memcpy( ssl->handshake->hs_msg, ssl->in_msg, 6 ); + memset( ssl->handshake->hs_msg + 6, 0, 3 ); + memcpy( ssl->handshake->hs_msg + 9, + ssl->handshake->hs_msg + 1, 3 ); + } + else + { + /* Make sure msg_type and length are consistent */ + if( memcmp( ssl->handshake->hs_msg, ssl->in_msg, 4 ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "fragment header mismatch" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + } + + msg = ssl->handshake->hs_msg + 12; + bitmask = msg + msg_len; + + /* + * Check and copy current fragment + */ + frag_off = ( ssl->in_msg[6] << 16 ) | + ( ssl->in_msg[7] << 8 ) | + ssl->in_msg[8]; + frag_len = ( ssl->in_msg[9] << 16 ) | + ( ssl->in_msg[10] << 8 ) | + ssl->in_msg[11]; + + if( frag_off + frag_len > msg_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "invalid fragment offset/len: %d + %d > %d", + frag_off, frag_len, msg_len ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + + if( frag_len + 12 > ssl->in_msglen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "invalid fragment length: %d + 12 > %d", + frag_len, ssl->in_msglen ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "adding fragment, offset = %d, length = %d", + frag_off, frag_len ) ); + + memcpy( msg + frag_off, ssl->in_msg + 12, frag_len ); + ssl_bitmask_set( bitmask, frag_off, frag_len ); + + /* + * Do we have the complete message by now? + * If yes, finalize it, else ask to read the next record. + */ + if( ssl_bitmask_check( bitmask, msg_len ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "message is not complete yet" ) ); + return( MBEDTLS_ERR_SSL_WANT_READ ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "handshake message completed" ) ); + + if( frag_len + 12 < ssl->in_msglen ) + { + /* + * We'got more handshake messages in the same record. + * This case is not handled now because no know implementation does + * that and it's hard to test, so we prefer to fail cleanly for now. + */ + MBEDTLS_SSL_DEBUG_MSG( 1, ( "last fragment not alone in its record" ) ); + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); + } + + if( ssl->in_left > ssl->next_record_offset ) + { + /* + * We've got more data in the buffer after the current record, + * that we don't want to overwrite. Move it before writing the + * reassembled message, and adjust in_left and next_record_offset. + */ + unsigned char *cur_remain = ssl->in_hdr + ssl->next_record_offset; + unsigned char *new_remain = ssl->in_msg + ssl->in_hslen; + size_t remain_len = ssl->in_left - ssl->next_record_offset; + + /* First compute and check new lengths */ + ssl->next_record_offset = new_remain - ssl->in_hdr; + ssl->in_left = ssl->next_record_offset + remain_len; + + if( ssl->in_left > MBEDTLS_SSL_BUFFER_LEN - + (size_t)( ssl->in_hdr - ssl->in_buf ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "reassembled message too large for buffer" ) ); + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + } + + memmove( new_remain, cur_remain, remain_len ); + } + + memcpy( ssl->in_msg, ssl->handshake->hs_msg, ssl->in_hslen ); + + mbedtls_free( ssl->handshake->hs_msg ); + ssl->handshake->hs_msg = NULL; + + MBEDTLS_SSL_DEBUG_BUF( 3, "reassembled handshake message", + ssl->in_msg, ssl->in_hslen ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + +static int ssl_prepare_handshake_record( mbedtls_ssl_context *ssl ) +{ + if( ssl->in_msglen < mbedtls_ssl_hs_hdr_len( ssl ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "handshake message too short: %d", + ssl->in_msglen ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + + ssl->in_hslen = mbedtls_ssl_hs_hdr_len( ssl ) + ( + ( ssl->in_msg[1] << 16 ) | + ( ssl->in_msg[2] << 8 ) | + ssl->in_msg[3] ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "handshake message: msglen =" + " %d, type = %d, hslen = %d", + ssl->in_msglen, ssl->in_msg[0], ssl->in_hslen ) ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + int ret; + unsigned int recv_msg_seq = ( ssl->in_msg[4] << 8 ) | ssl->in_msg[5]; + + /* ssl->handshake is NULL when receiving ClientHello for renego */ + if( ssl->handshake != NULL && + recv_msg_seq != ssl->handshake->in_msg_seq ) + { + /* Retransmit only on last message from previous flight, to avoid + * too many retransmissions. + * Besides, No sane server ever retransmits HelloVerifyRequest */ + if( recv_msg_seq == ssl->handshake->in_flight_start_seq - 1 && + ssl->in_msg[0] != MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "received message from last flight, " + "message_seq = %d, start_of_flight = %d", + recv_msg_seq, + ssl->handshake->in_flight_start_seq ) ); + + if( ( ret = mbedtls_ssl_resend( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_resend", ret ); + return( ret ); + } + } + else + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "dropping out-of-sequence message: " + "message_seq = %d, expected = %d", + recv_msg_seq, + ssl->handshake->in_msg_seq ) ); + } + + return( MBEDTLS_ERR_SSL_WANT_READ ); + } + /* Wait until message completion to increment in_msg_seq */ + + /* Reassemble if current message is fragmented or reassembly is + * already in progress */ + if( ssl->in_msglen < ssl->in_hslen || + memcmp( ssl->in_msg + 6, "\0\0\0", 3 ) != 0 || + memcmp( ssl->in_msg + 9, ssl->in_msg + 1, 3 ) != 0 || + ( ssl->handshake != NULL && ssl->handshake->hs_msg != NULL ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "found fragmented DTLS handshake message" ) ); + + if( ( ret = ssl_reassemble_dtls_handshake( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_reassemble_dtls_handshake", ret ); + return( ret ); + } + } + } + else +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + /* With TLS we don't handle fragmentation (for now) */ + if( ssl->in_msglen < ssl->in_hslen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "TLS handshake fragmentation not supported" ) ); + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); + } + + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER && + ssl->handshake != NULL ) + { + ssl->handshake->update_checksum( ssl, ssl->in_msg, ssl->in_hslen ); + } + + /* Handshake message is complete, increment counter */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake != NULL ) + { + ssl->handshake->in_msg_seq++; + } +#endif + + return( 0 ); +} + +/* + * DTLS anti-replay: RFC 6347 4.1.2.6 + * + * in_window is a field of bits numbered from 0 (lsb) to 63 (msb). + * Bit n is set iff record number in_window_top - n has been seen. + * + * Usually, in_window_top is the last record number seen and the lsb of + * in_window is set. The only exception is the initial state (record number 0 + * not seen yet). + */ +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) +static void ssl_dtls_replay_reset( mbedtls_ssl_context *ssl ) +{ + ssl->in_window_top = 0; + ssl->in_window = 0; +} + +static inline uint64_t ssl_load_six_bytes( unsigned char *buf ) +{ + return( ( (uint64_t) buf[0] << 40 ) | + ( (uint64_t) buf[1] << 32 ) | + ( (uint64_t) buf[2] << 24 ) | + ( (uint64_t) buf[3] << 16 ) | + ( (uint64_t) buf[4] << 8 ) | + ( (uint64_t) buf[5] ) ); +} + +/* + * Return 0 if sequence number is acceptable, -1 otherwise + */ +int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context *ssl ) +{ + uint64_t rec_seqnum = ssl_load_six_bytes( ssl->in_ctr + 2 ); + uint64_t bit; + + if( ssl->conf->anti_replay == MBEDTLS_SSL_ANTI_REPLAY_DISABLED ) + return( 0 ); + + if( rec_seqnum > ssl->in_window_top ) + return( 0 ); + + bit = ssl->in_window_top - rec_seqnum; + + if( bit >= 64 ) + return( -1 ); + + if( ( ssl->in_window & ( (uint64_t) 1 << bit ) ) != 0 ) + return( -1 ); + + return( 0 ); +} + +/* + * Update replay window on new validated record + */ +void mbedtls_ssl_dtls_replay_update( mbedtls_ssl_context *ssl ) +{ + uint64_t rec_seqnum = ssl_load_six_bytes( ssl->in_ctr + 2 ); + + if( ssl->conf->anti_replay == MBEDTLS_SSL_ANTI_REPLAY_DISABLED ) + return; + + if( rec_seqnum > ssl->in_window_top ) + { + /* Update window_top and the contents of the window */ + uint64_t shift = rec_seqnum - ssl->in_window_top; + + if( shift >= 64 ) + ssl->in_window = 1; + else + { + ssl->in_window <<= shift; + ssl->in_window |= 1; + } + + ssl->in_window_top = rec_seqnum; + } + else + { + /* Mark that number as seen in the current window */ + uint64_t bit = ssl->in_window_top - rec_seqnum; + + if( bit < 64 ) /* Always true, but be extra sure */ + ssl->in_window |= (uint64_t) 1 << bit; + } +} +#endif /* MBEDTLS_SSL_DTLS_ANTI_REPLAY */ + +#if defined(MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE) && defined(MBEDTLS_SSL_SRV_C) +/* Forward declaration */ +static int ssl_session_reset_int( mbedtls_ssl_context *ssl, int partial ); + +/* + * Without any SSL context, check if a datagram looks like a ClientHello with + * a valid cookie, and if it doesn't, generate a HelloVerifyRequest message. + * Both input and output include full DTLS headers. + * + * - if cookie is valid, return 0 + * - if ClientHello looks superficially valid but cookie is not, + * fill obuf and set olen, then + * return MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED + * - otherwise return a specific error code + */ +static int ssl_check_dtls_clihlo_cookie( + mbedtls_ssl_cookie_write_t *f_cookie_write, + mbedtls_ssl_cookie_check_t *f_cookie_check, + void *p_cookie, + const unsigned char *cli_id, size_t cli_id_len, + const unsigned char *in, size_t in_len, + unsigned char *obuf, size_t buf_len, size_t *olen ) +{ + size_t sid_len, cookie_len; + unsigned char *p; + + if( f_cookie_write == NULL || f_cookie_check == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + /* + * Structure of ClientHello with record and handshake headers, + * and expected values. We don't need to check a lot, more checks will be + * done when actually parsing the ClientHello - skipping those checks + * avoids code duplication and does not make cookie forging any easier. + * + * 0-0 ContentType type; copied, must be handshake + * 1-2 ProtocolVersion version; copied + * 3-4 uint16 epoch; copied, must be 0 + * 5-10 uint48 sequence_number; copied + * 11-12 uint16 length; (ignored) + * + * 13-13 HandshakeType msg_type; (ignored) + * 14-16 uint24 length; (ignored) + * 17-18 uint16 message_seq; copied + * 19-21 uint24 fragment_offset; copied, must be 0 + * 22-24 uint24 fragment_length; (ignored) + * + * 25-26 ProtocolVersion client_version; (ignored) + * 27-58 Random random; (ignored) + * 59-xx SessionID session_id; 1 byte len + sid_len content + * 60+ opaque cookie<0..2^8-1>; 1 byte len + content + * ... + * + * Minimum length is 61 bytes. + */ + if( in_len < 61 || + in[0] != MBEDTLS_SSL_MSG_HANDSHAKE || + in[3] != 0 || in[4] != 0 || + in[19] != 0 || in[20] != 0 || in[21] != 0 ) + { + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + } + + sid_len = in[59]; + if( sid_len > in_len - 61 ) + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + + cookie_len = in[60 + sid_len]; + if( cookie_len > in_len - 60 ) + return( MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO ); + + if( f_cookie_check( p_cookie, in + sid_len + 61, cookie_len, + cli_id, cli_id_len ) == 0 ) + { + /* Valid cookie */ + return( 0 ); + } + + /* + * If we get here, we've got an invalid cookie, let's prepare HVR. + * + * 0-0 ContentType type; copied + * 1-2 ProtocolVersion version; copied + * 3-4 uint16 epoch; copied + * 5-10 uint48 sequence_number; copied + * 11-12 uint16 length; olen - 13 + * + * 13-13 HandshakeType msg_type; hello_verify_request + * 14-16 uint24 length; olen - 25 + * 17-18 uint16 message_seq; copied + * 19-21 uint24 fragment_offset; copied + * 22-24 uint24 fragment_length; olen - 25 + * + * 25-26 ProtocolVersion server_version; 0xfe 0xff + * 27-27 opaque cookie<0..2^8-1>; cookie_len = olen - 27, cookie + * + * Minimum length is 28. + */ + if( buf_len < 28 ) + return( MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL ); + + /* Copy most fields and adapt others */ + memcpy( obuf, in, 25 ); + obuf[13] = MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST; + obuf[25] = 0xfe; + obuf[26] = 0xff; + + /* Generate and write actual cookie */ + p = obuf + 28; + if( f_cookie_write( p_cookie, + &p, obuf + buf_len, cli_id, cli_id_len ) != 0 ) + { + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + *olen = p - obuf; + + /* Go back and fill length fields */ + obuf[27] = (unsigned char)( *olen - 28 ); + + obuf[14] = obuf[22] = (unsigned char)( ( *olen - 25 ) >> 16 ); + obuf[15] = obuf[23] = (unsigned char)( ( *olen - 25 ) >> 8 ); + obuf[16] = obuf[24] = (unsigned char)( ( *olen - 25 ) ); + + obuf[11] = (unsigned char)( ( *olen - 13 ) >> 8 ); + obuf[12] = (unsigned char)( ( *olen - 13 ) ); + + return( MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED ); +} + +/* + * Handle possible client reconnect with the same UDP quadruplet + * (RFC 6347 Section 4.2.8). + * + * Called by ssl_parse_record_header() in case we receive an epoch 0 record + * that looks like a ClientHello. + * + * - if the input looks like a ClientHello without cookies, + * send back HelloVerifyRequest, then + * return MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED + * - if the input looks like a ClientHello with a valid cookie, + * reset the session of the current context, and + * return MBEDTLS_ERR_SSL_CLIENT_RECONNECT + * - if anything goes wrong, return a specific error code + * + * mbedtls_ssl_read_record() will ignore the record if anything else than + * MBEDTLS_ERR_SSL_CLIENT_RECONNECT or 0 is returned, although this function + * cannot not return 0. + */ +static int ssl_handle_possible_reconnect( mbedtls_ssl_context *ssl ) +{ + int ret; + size_t len; + + ret = ssl_check_dtls_clihlo_cookie( + ssl->conf->f_cookie_write, + ssl->conf->f_cookie_check, + ssl->conf->p_cookie, + ssl->cli_id, ssl->cli_id_len, + ssl->in_buf, ssl->in_left, + ssl->out_buf, MBEDTLS_SSL_MAX_CONTENT_LEN, &len ); + + MBEDTLS_SSL_DEBUG_RET( 2, "ssl_check_dtls_clihlo_cookie", ret ); + + if( ret == MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED ) + { + /* Dont check write errors as we can't do anything here. + * If the error is permanent we'll catch it later, + * if it's not, then hopefully it'll work next time. */ + (void) ssl->f_send( ssl->p_bio, ssl->out_buf, len ); + + return( MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED ); + } + + if( ret == 0 ) + { + /* Got a valid cookie, partially reset context */ + if( ( ret = ssl_session_reset_int( ssl, 1 ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "reset", ret ); + return( ret ); + } + + return( MBEDTLS_ERR_SSL_CLIENT_RECONNECT ); + } + + return( ret ); +} +#endif /* MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE && MBEDTLS_SSL_SRV_C */ + +/* + * ContentType type; + * ProtocolVersion version; + * uint16 epoch; // DTLS only + * uint48 sequence_number; // DTLS only + * uint16 length; + * + * Return 0 if header looks sane (and, for DTLS, the record is expected) + * MBEDTLS_ERR_SSL_INVALID_RECORD if the header looks bad, + * MBEDTLS_ERR_SSL_UNEXPECTED_RECORD (DTLS only) if sane but unexpected. + * + * With DTLS, mbedtls_ssl_read_record() will: + * 1. proceed with the record if this function returns 0 + * 2. drop only the current record if this function returns UNEXPECTED_RECORD + * 3. return CLIENT_RECONNECT if this function return that value + * 4. drop the whole datagram if this function returns anything else. + * Point 2 is needed when the peer is resending, and we have already received + * the first record from a datagram but are still waiting for the others. + */ +static int ssl_parse_record_header( mbedtls_ssl_context *ssl ) +{ + int ret; + int major_ver, minor_ver; + + MBEDTLS_SSL_DEBUG_BUF( 4, "input record header", ssl->in_hdr, mbedtls_ssl_hdr_len( ssl ) ); + + ssl->in_msgtype = ssl->in_hdr[0]; + ssl->in_msglen = ( ssl->in_len[0] << 8 ) | ssl->in_len[1]; + mbedtls_ssl_read_version( &major_ver, &minor_ver, ssl->conf->transport, ssl->in_hdr + 1 ); + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "input record: msgtype = %d, " + "version = [%d:%d], msglen = %d", + ssl->in_msgtype, + major_ver, minor_ver, ssl->in_msglen ) ); + + /* Check record type */ + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE && + ssl->in_msgtype != MBEDTLS_SSL_MSG_ALERT && + ssl->in_msgtype != MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC && + ssl->in_msgtype != MBEDTLS_SSL_MSG_APPLICATION_DATA ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "unknown record type" ) ); + + if( ( ret = mbedtls_ssl_send_alert_message( ssl, + MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_UNEXPECTED_MESSAGE ) ) != 0 ) + { + return( ret ); + } + + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + + /* Check version */ + if( major_ver != ssl->major_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "major version mismatch" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + + if( minor_ver > ssl->conf->max_minor_ver ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "minor version mismatch" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + + /* Check length against the size of our buffer */ + if( ssl->in_msglen > MBEDTLS_SSL_BUFFER_LEN + - (size_t)( ssl->in_msg - ssl->in_buf ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad message length" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + + /* Check length against bounds of the current transform and version */ + if( ssl->transform_in == NULL ) + { + if( ssl->in_msglen < 1 || + ssl->in_msglen > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad message length" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + } + else + { + if( ssl->in_msglen < ssl->transform_in->minlen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad message length" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 && + ssl->in_msglen > ssl->transform_in->minlen + MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad message length" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + /* + * TLS encrypted messages can have up to 256 bytes of padding + */ + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_1 && + ssl->in_msglen > ssl->transform_in->minlen + + MBEDTLS_SSL_MAX_CONTENT_LEN + 256 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad message length" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } +#endif + } + + /* + * DTLS-related tests done last, because most of them may result in + * silently dropping the record (but not the whole datagram), and we only + * want to consider that after ensuring that the "basic" fields (type, + * version, length) are sane. + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + unsigned int rec_epoch = ( ssl->in_ctr[0] << 8 ) | ssl->in_ctr[1]; + + /* Drop unexpected ChangeCipherSpec messages */ + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC && + ssl->state != MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC && + ssl->state != MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "dropping unexpected ChangeCipherSpec" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_RECORD ); + } + + /* Drop unexpected ApplicationData records, + * except at the beginning of renegotiations */ + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_APPLICATION_DATA && + ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER +#if defined(MBEDTLS_SSL_RENEGOTIATION) + && ! ( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS && + ssl->state == MBEDTLS_SSL_SERVER_HELLO ) +#endif + ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "dropping unexpected ApplicationData" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_RECORD ); + } + + /* Check epoch (and sequence number) with DTLS */ + if( rec_epoch != ssl->in_epoch ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "record from another epoch: " + "expected %d, received %d", + ssl->in_epoch, rec_epoch ) ); + +#if defined(MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE) && defined(MBEDTLS_SSL_SRV_C) + /* + * Check for an epoch 0 ClientHello. We can't use in_msg here to + * access the first byte of record content (handshake type), as we + * have an active transform (possibly iv_len != 0), so use the + * fact that the record header len is 13 instead. + */ + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ssl->state == MBEDTLS_SSL_HANDSHAKE_OVER && + rec_epoch == 0 && + ssl->in_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE && + ssl->in_left > 13 && + ssl->in_buf[13] == MBEDTLS_SSL_HS_CLIENT_HELLO ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "possible client reconnect " + "from the same port" ) ); + return( ssl_handle_possible_reconnect( ssl ) ); + } + else +#endif /* MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE && MBEDTLS_SSL_SRV_C */ + return( MBEDTLS_ERR_SSL_UNEXPECTED_RECORD ); + } + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + /* Replay detection only works for the current epoch */ + if( rec_epoch == ssl->in_epoch && + mbedtls_ssl_dtls_replay_check( ssl ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "replayed record" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_RECORD ); + } +#endif + } +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + + return( 0 ); +} + +/* + * If applicable, decrypt (and decompress) record content + */ +static int ssl_prepare_record_content( mbedtls_ssl_context *ssl ) +{ + int ret, done = 0; + + MBEDTLS_SSL_DEBUG_BUF( 4, "input record from network", + ssl->in_hdr, mbedtls_ssl_hdr_len( ssl ) + ssl->in_msglen ); + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_read != NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "going for mbedtls_ssl_hw_record_read()" ) ); + + ret = mbedtls_ssl_hw_record_read( ssl ); + if( ret != 0 && ret != MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_hw_record_read", ret ); + return( MBEDTLS_ERR_SSL_HW_ACCEL_FAILED ); + } + + if( ret == 0 ) + done = 1; + } +#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */ + if( !done && ssl->transform_in != NULL ) + { + if( ( ret = ssl_decrypt_buf( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_decrypt_buf", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_BUF( 4, "input payload after decrypt", + ssl->in_msg, ssl->in_msglen ); + + if( ssl->in_msglen > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad message length" ) ); + return( MBEDTLS_ERR_SSL_INVALID_RECORD ); + } + } + +#if defined(MBEDTLS_ZLIB_SUPPORT) + if( ssl->transform_in != NULL && + ssl->session_in->compression == MBEDTLS_SSL_COMPRESS_DEFLATE ) + { + if( ( ret = ssl_decompress_buf( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_decompress_buf", ret ); + return( ret ); + } + + // TODO: what's the purpose of these lines? is in_len used? + ssl->in_len[0] = (unsigned char)( ssl->in_msglen >> 8 ); + ssl->in_len[1] = (unsigned char)( ssl->in_msglen ); + } +#endif /* MBEDTLS_ZLIB_SUPPORT */ + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + mbedtls_ssl_dtls_replay_update( ssl ); + } +#endif + + return( 0 ); +} + +static void ssl_handshake_wrapup_free_hs_transform( mbedtls_ssl_context *ssl ); + +/* + * Read a record. + * + * Silently ignore non-fatal alert (and for DTLS, invalid records as well, + * RFC 6347 4.1.2.7) and continue reading until a valid record is found. + * + */ +int mbedtls_ssl_read_record( mbedtls_ssl_context *ssl ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> read record" ) ); + + if( ssl->in_hslen != 0 && ssl->in_hslen < ssl->in_msglen ) + { + /* + * Get next Handshake message in the current record + */ + ssl->in_msglen -= ssl->in_hslen; + + memmove( ssl->in_msg, ssl->in_msg + ssl->in_hslen, + ssl->in_msglen ); + + MBEDTLS_SSL_DEBUG_BUF( 4, "remaining content in record", + ssl->in_msg, ssl->in_msglen ); + + if( ( ret = ssl_prepare_handshake_record( ssl ) ) != 0 ) + return( ret ); + + return( 0 ); + } + + ssl->in_hslen = 0; + + /* + * Read the record header and parse it + */ +read_record_header: + if( ( ret = mbedtls_ssl_fetch_input( ssl, mbedtls_ssl_hdr_len( ssl ) ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_fetch_input", ret ); + return( ret ); + } + + if( ( ret = ssl_parse_record_header( ssl ) ) != 0 ) + { +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ret != MBEDTLS_ERR_SSL_CLIENT_RECONNECT ) + { + if( ret == MBEDTLS_ERR_SSL_UNEXPECTED_RECORD ) + { + /* Skip unexpected record (but not whole datagram) */ + ssl->next_record_offset = ssl->in_msglen + + mbedtls_ssl_hdr_len( ssl ); + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "discarding unexpected record " + "(header)" ) ); + } + else + { + /* Skip invalid record and the rest of the datagram */ + ssl->next_record_offset = 0; + ssl->in_left = 0; + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "discarding invalid record " + "(header)" ) ); + } + + /* Get next record */ + goto read_record_header; + } +#endif + return( ret ); + } + + /* + * Read and optionally decrypt the message contents + */ + if( ( ret = mbedtls_ssl_fetch_input( ssl, + mbedtls_ssl_hdr_len( ssl ) + ssl->in_msglen ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_fetch_input", ret ); + return( ret ); + } + + /* Done reading this record, get ready for the next one */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + ssl->next_record_offset = ssl->in_msglen + mbedtls_ssl_hdr_len( ssl ); + else +#endif + ssl->in_left = 0; + + if( ( ret = ssl_prepare_record_content( ssl ) ) != 0 ) + { +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + /* Silently discard invalid records */ + if( ret == MBEDTLS_ERR_SSL_INVALID_RECORD || + ret == MBEDTLS_ERR_SSL_INVALID_MAC ) + { + /* Except when waiting for Finished as a bad mac here + * probably means something went wrong in the handshake + * (eg wrong psk used, mitm downgrade attempt, etc.) */ + if( ssl->state == MBEDTLS_SSL_CLIENT_FINISHED || + ssl->state == MBEDTLS_SSL_SERVER_FINISHED ) + { +#if defined(MBEDTLS_SSL_ALL_ALERT_MESSAGES) + if( ret == MBEDTLS_ERR_SSL_INVALID_MAC ) + { + mbedtls_ssl_send_alert_message( ssl, + MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC ); + } +#endif + return( ret ); + } + +#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) + if( ssl->conf->badmac_limit != 0 && + ++ssl->badmac_seen >= ssl->conf->badmac_limit ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "too many records with bad MAC" ) ); + return( MBEDTLS_ERR_SSL_INVALID_MAC ); + } +#endif + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "discarding invalid record (mac)" ) ); + goto read_record_header; + } + + return( ret ); + } + else +#endif + { + /* Error out (and send alert) on invalid records */ +#if defined(MBEDTLS_SSL_ALL_ALERT_MESSAGES) + if( ret == MBEDTLS_ERR_SSL_INVALID_MAC ) + { + mbedtls_ssl_send_alert_message( ssl, + MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC ); + } +#endif + return( ret ); + } + } + + /* + * When we sent the last flight of the handshake, we MUST respond to a + * retransmit of the peer's previous flight with a retransmit. (In + * practice, only the Finished message will make it, other messages + * including CCS use the old transform so they're dropped as invalid.) + * + * If the record we received is not a handshake message, however, it + * means the peer received our last flight so we can clean up + * handshake info. + * + * This check needs to be done before prepare_handshake() due to an edge + * case: if the client immediately requests renegotiation, this + * finishes the current handshake first, avoiding the new ClientHello + * being mistaken for an ancient message in the current handshake. + */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake != NULL && + ssl->state == MBEDTLS_SSL_HANDSHAKE_OVER ) + { + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE && + ssl->in_msg[0] == MBEDTLS_SSL_HS_FINISHED ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "received retransmit of last flight" ) ); + + if( ( ret = mbedtls_ssl_resend( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_resend", ret ); + return( ret ); + } + + return( MBEDTLS_ERR_SSL_WANT_READ ); + } + else + { + ssl_handshake_wrapup_free_hs_transform( ssl ); + } + } +#endif + + /* + * Handle particular types of records + */ + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE ) + { + if( ( ret = ssl_prepare_handshake_record( ssl ) ) != 0 ) + return( ret ); + } + + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_ALERT ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "got an alert message, type: [%d:%d]", + ssl->in_msg[0], ssl->in_msg[1] ) ); + + /* + * Ignore non-fatal alerts, except close_notify and no_renegotiation + */ + if( ssl->in_msg[0] == MBEDTLS_SSL_ALERT_LEVEL_FATAL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "is a fatal alert message (msg %d)", + ssl->in_msg[1] ) ); + return( MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE ); + } + + if( ssl->in_msg[0] == MBEDTLS_SSL_ALERT_LEVEL_WARNING && + ssl->in_msg[1] == MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "is a close notify message" ) ); + return( MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY ); + } + +#if defined(MBEDTLS_SSL_RENEGOTIATION_ENABLED) + if( ssl->in_msg[0] == MBEDTLS_SSL_ALERT_LEVEL_WARNING && + ssl->in_msg[1] == MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "is a SSLv3 no_cert" ) ); + /* Will be handled when trying to parse ServerHello */ + return( 0 ); + } +#endif + +#if defined(MBEDTLS_SSL_PROTO_SSL3) && defined(MBEDTLS_SSL_SRV_C) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 && + ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ssl->in_msg[0] == MBEDTLS_SSL_ALERT_LEVEL_WARNING && + ssl->in_msg[1] == MBEDTLS_SSL_ALERT_MSG_NO_CERT ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "is a SSLv3 no_cert" ) ); + /* Will be handled in mbedtls_ssl_parse_certificate() */ + return( 0 ); + } +#endif /* MBEDTLS_SSL_PROTO_SSL3 && MBEDTLS_SSL_SRV_C */ + + /* Silently ignore: fetch new message */ + goto read_record_header; + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= read record" ) ); + + return( 0 ); +} + +int mbedtls_ssl_send_fatal_handshake_failure( mbedtls_ssl_context *ssl ) +{ + int ret; + + if( ( ret = mbedtls_ssl_send_alert_message( ssl, + MBEDTLS_SSL_ALERT_LEVEL_FATAL, + MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} + +int mbedtls_ssl_send_alert_message( mbedtls_ssl_context *ssl, + unsigned char level, + unsigned char message ) +{ + int ret; + + if( ssl == NULL || ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> send alert message" ) ); + + ssl->out_msgtype = MBEDTLS_SSL_MSG_ALERT; + ssl->out_msglen = 2; + ssl->out_msg[0] = level; + ssl->out_msg[1] = message; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= send alert message" ) ); + + return( 0 ); +} + +/* + * Handshake functions + */ +#if !defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) && \ + !defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) +int mbedtls_ssl_write_certificate( mbedtls_ssl_context *ssl ) +{ + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write certificate" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate" ) ); + ssl->state++; + return( 0 ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); +} + +int mbedtls_ssl_parse_certificate( mbedtls_ssl_context *ssl ) +{ + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse certificate" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate" ) ); + ssl->state++; + return( 0 ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); +} +#else +int mbedtls_ssl_write_certificate( mbedtls_ssl_context *ssl ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + size_t i, n; + const mbedtls_x509_crt *crt; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write certificate" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate" ) ); + ssl->state++; + return( 0 ); + } + +#if defined(MBEDTLS_SSL_CLI_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT ) + { + if( ssl->client_auth == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip write certificate" ) ); + ssl->state++; + return( 0 ); + } + +#if defined(MBEDTLS_SSL_PROTO_SSL3) + /* + * If using SSLv3 and got no cert, send an Alert message + * (otherwise an empty Certificate message will be sent). + */ + if( mbedtls_ssl_own_cert( ssl ) == NULL && + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + ssl->out_msglen = 2; + ssl->out_msgtype = MBEDTLS_SSL_MSG_ALERT; + ssl->out_msg[0] = MBEDTLS_SSL_ALERT_LEVEL_WARNING; + ssl->out_msg[1] = MBEDTLS_SSL_ALERT_MSG_NO_CERT; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "got no certificate to send" ) ); + goto write_msg; + } +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + } +#endif /* MBEDTLS_SSL_CLI_C */ +#if defined(MBEDTLS_SSL_SRV_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + { + if( mbedtls_ssl_own_cert( ssl ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no certificate to send" ) ); + return( MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED ); + } + } +#endif + + MBEDTLS_SSL_DEBUG_CRT( 3, "own certificate", mbedtls_ssl_own_cert( ssl ) ); + + /* + * 0 . 0 handshake type + * 1 . 3 handshake length + * 4 . 6 length of all certs + * 7 . 9 length of cert. 1 + * 10 . n-1 peer certificate + * n . n+2 length of cert. 2 + * n+3 . ... upper level cert, etc. + */ + i = 7; + crt = mbedtls_ssl_own_cert( ssl ); + + while( crt != NULL ) + { + n = crt->raw.len; + if( n > MBEDTLS_SSL_MAX_CONTENT_LEN - 3 - i ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "certificate too large, %d > %d", + i + 3 + n, MBEDTLS_SSL_MAX_CONTENT_LEN ) ); + return( MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE ); + } + + ssl->out_msg[i ] = (unsigned char)( n >> 16 ); + ssl->out_msg[i + 1] = (unsigned char)( n >> 8 ); + ssl->out_msg[i + 2] = (unsigned char)( n ); + + i += 3; memcpy( ssl->out_msg + i, crt->raw.p, n ); + i += n; crt = crt->next; + } + + ssl->out_msg[4] = (unsigned char)( ( i - 7 ) >> 16 ); + ssl->out_msg[5] = (unsigned char)( ( i - 7 ) >> 8 ); + ssl->out_msg[6] = (unsigned char)( ( i - 7 ) ); + + ssl->out_msglen = i; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_CERTIFICATE; + +#if defined(MBEDTLS_SSL_PROTO_SSL3) && defined(MBEDTLS_SSL_CLI_C) +write_msg: +#endif + + ssl->state++; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write certificate" ) ); + + return( ret ); +} + +int mbedtls_ssl_parse_certificate( mbedtls_ssl_context *ssl ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + size_t i, n; + const mbedtls_ssl_ciphersuite_t *ciphersuite_info = ssl->transform_negotiate->ciphersuite_info; + int authmode = ssl->conf->authmode; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse certificate" ) ); + + if( ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_DHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECDHE_PSK || + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_ECJPAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate" ) ); + ssl->state++; + return( 0 ); + } + +#if defined(MBEDTLS_SSL_SRV_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ciphersuite_info->key_exchange == MBEDTLS_KEY_EXCHANGE_RSA_PSK ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate" ) ); + ssl->state++; + return( 0 ); + } + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + if( ssl->handshake->sni_authmode != MBEDTLS_SSL_VERIFY_UNSET ) + authmode = ssl->handshake->sni_authmode; +#endif + + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + authmode == MBEDTLS_SSL_VERIFY_NONE ) + { + ssl->session_negotiate->verify_result = MBEDTLS_X509_BADCERT_SKIP_VERIFY; + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= skip parse certificate" ) ); + ssl->state++; + return( 0 ); + } +#endif + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + ssl->state++; + +#if defined(MBEDTLS_SSL_SRV_C) +#if defined(MBEDTLS_SSL_PROTO_SSL3) + /* + * Check if the client sent an empty certificate + */ + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + if( ssl->in_msglen == 2 && + ssl->in_msgtype == MBEDTLS_SSL_MSG_ALERT && + ssl->in_msg[0] == MBEDTLS_SSL_ALERT_LEVEL_WARNING && + ssl->in_msg[1] == MBEDTLS_SSL_ALERT_MSG_NO_CERT ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "SSLv3 client has no certificate" ) ); + + ssl->session_negotiate->verify_result = MBEDTLS_X509_BADCERT_MISSING; + if( authmode == MBEDTLS_SSL_VERIFY_OPTIONAL ) + return( 0 ); + else + return( MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE ); + } + } +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ssl->minor_ver != MBEDTLS_SSL_MINOR_VERSION_0 ) + { + if( ssl->in_hslen == 3 + mbedtls_ssl_hs_hdr_len( ssl ) && + ssl->in_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE && + ssl->in_msg[0] == MBEDTLS_SSL_HS_CERTIFICATE && + memcmp( ssl->in_msg + mbedtls_ssl_hs_hdr_len( ssl ), "\0\0\0", 3 ) == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "TLSv1 client has no certificate" ) ); + + ssl->session_negotiate->verify_result = MBEDTLS_X509_BADCERT_MISSING; + if( authmode == MBEDTLS_SSL_VERIFY_OPTIONAL ) + return( 0 ); + else + return( MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE ); + } + } +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \ + MBEDTLS_SSL_PROTO_TLS1_2 */ +#endif /* MBEDTLS_SSL_SRV_C */ + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + if( ssl->in_msg[0] != MBEDTLS_SSL_HS_CERTIFICATE || + ssl->in_hslen < mbedtls_ssl_hs_hdr_len( ssl ) + 3 + 3 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE ); + } + + i = mbedtls_ssl_hs_hdr_len( ssl ); + + /* + * Same message structure as in mbedtls_ssl_write_certificate() + */ + n = ( ssl->in_msg[i+1] << 8 ) | ssl->in_msg[i+2]; + + if( ssl->in_msg[i] != 0 || + ssl->in_hslen != n + 3 + mbedtls_ssl_hs_hdr_len( ssl ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE ); + } + + /* In case we tried to reuse a session but it failed */ + if( ssl->session_negotiate->peer_cert != NULL ) + { + mbedtls_x509_crt_free( ssl->session_negotiate->peer_cert ); + mbedtls_free( ssl->session_negotiate->peer_cert ); + } + + if( ( ssl->session_negotiate->peer_cert = mbedtls_calloc( 1, + sizeof( mbedtls_x509_crt ) ) ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc(%d bytes) failed", + sizeof( mbedtls_x509_crt ) ) ); + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + mbedtls_x509_crt_init( ssl->session_negotiate->peer_cert ); + + i += 3; + + while( i < ssl->in_hslen ) + { + if( ssl->in_msg[i] != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE ); + } + + n = ( (unsigned int) ssl->in_msg[i + 1] << 8 ) + | (unsigned int) ssl->in_msg[i + 2]; + i += 3; + + if( n < 128 || i + n > ssl->in_hslen ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE ); + } + + ret = mbedtls_x509_crt_parse_der( ssl->session_negotiate->peer_cert, + ssl->in_msg + i, n ); + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, " mbedtls_x509_crt_parse_der", ret ); + return( ret ); + } + + i += n; + } + + MBEDTLS_SSL_DEBUG_CRT( 3, "peer certificate", ssl->session_negotiate->peer_cert ); + + /* + * On client, make sure the server cert doesn't change during renego to + * avoid "triple handshake" attack: https://secure-resumption.com/ + */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) && defined(MBEDTLS_SSL_CLI_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT && + ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + { + if( ssl->session->peer_cert == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "new server cert during renegotiation" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE ); + } + + if( ssl->session->peer_cert->raw.len != + ssl->session_negotiate->peer_cert->raw.len || + memcmp( ssl->session->peer_cert->raw.p, + ssl->session_negotiate->peer_cert->raw.p, + ssl->session->peer_cert->raw.len ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "server cert changed during renegotiation" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE ); + } + } +#endif /* MBEDTLS_SSL_RENEGOTIATION && MBEDTLS_SSL_CLI_C */ + + if( authmode != MBEDTLS_SSL_VERIFY_NONE ) + { + mbedtls_x509_crt *ca_chain; + mbedtls_x509_crl *ca_crl; + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + if( ssl->handshake->sni_ca_chain != NULL ) + { + ca_chain = ssl->handshake->sni_ca_chain; + ca_crl = ssl->handshake->sni_ca_crl; + } + else +#endif + { + ca_chain = ssl->conf->ca_chain; + ca_crl = ssl->conf->ca_crl; + } + + if( ca_chain == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "got no CA chain" ) ); + return( MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED ); + } + + /* + * Main check: verify certificate + */ + ret = mbedtls_x509_crt_verify_with_profile( + ssl->session_negotiate->peer_cert, + ca_chain, ca_crl, + ssl->conf->cert_profile, + ssl->hostname, + &ssl->session_negotiate->verify_result, + ssl->conf->f_vrfy, ssl->conf->p_vrfy ); + + if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "x509_verify_cert", ret ); + } + + /* + * Secondary checks: always done, but change 'ret' only if it was 0 + */ + +#if defined(MBEDTLS_ECP_C) + { + const mbedtls_pk_context *pk = &ssl->session_negotiate->peer_cert->pk; + + /* If certificate uses an EC key, make sure the curve is OK */ + if( mbedtls_pk_can_do( pk, MBEDTLS_PK_ECKEY ) && + mbedtls_ssl_check_curve( ssl, mbedtls_pk_ec( *pk )->grp.id ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate (EC key curve)" ) ); + if( ret == 0 ) + ret = MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE; + } + } +#endif /* MBEDTLS_ECP_C */ + + if( mbedtls_ssl_check_cert_usage( ssl->session_negotiate->peer_cert, + ciphersuite_info, + ! ssl->conf->endpoint, + &ssl->session_negotiate->verify_result ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad certificate (usage extensions)" ) ); + if( ret == 0 ) + ret = MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE; + } + + if( authmode == MBEDTLS_SSL_VERIFY_OPTIONAL ) + ret = 0; + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse certificate" ) ); + + return( ret ); +} +#endif /* !MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + !MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + !MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + !MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + !MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + !MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + !MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ + +int mbedtls_ssl_write_change_cipher_spec( mbedtls_ssl_context *ssl ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write change cipher spec" ) ); + + ssl->out_msgtype = MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC; + ssl->out_msglen = 1; + ssl->out_msg[0] = 1; + + ssl->state++; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write change cipher spec" ) ); + + return( 0 ); +} + +int mbedtls_ssl_parse_change_cipher_spec( mbedtls_ssl_context *ssl ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse change cipher spec" ) ); + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad change cipher spec message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + if( ssl->in_msglen != 1 || ssl->in_msg[0] != 1 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad change cipher spec message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC ); + } + + /* + * Switch to our negotiated transform and session parameters for inbound + * data. + */ + MBEDTLS_SSL_DEBUG_MSG( 3, ( "switching to new transform spec for inbound data" ) ); + ssl->transform_in = ssl->transform_negotiate; + ssl->session_in = ssl->session_negotiate; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + ssl_dtls_replay_reset( ssl ); +#endif + + /* Increment epoch */ + if( ++ssl->in_epoch == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "DTLS epoch would wrap" ) ); + return( MBEDTLS_ERR_SSL_COUNTER_WRAPPING ); + } + } + else +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + memset( ssl->in_ctr, 0, 8 ); + + /* + * Set the in_msg pointer to the correct location based on IV length + */ + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_2 ) + { + ssl->in_msg = ssl->in_iv + ssl->transform_negotiate->ivlen - + ssl->transform_negotiate->fixed_ivlen; + } + else + ssl->in_msg = ssl->in_iv; + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_activate != NULL ) + { + if( ( ret = mbedtls_ssl_hw_record_activate( ssl, MBEDTLS_SSL_CHANNEL_INBOUND ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_hw_record_activate", ret ); + return( MBEDTLS_ERR_SSL_HW_ACCEL_FAILED ); + } + } +#endif + + ssl->state++; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse change cipher spec" ) ); + + return( 0 ); +} + +void mbedtls_ssl_optimize_checksum( mbedtls_ssl_context *ssl, + const mbedtls_ssl_ciphersuite_t *ciphersuite_info ) +{ + ((void) ciphersuite_info); + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + if( ssl->minor_ver < MBEDTLS_SSL_MINOR_VERSION_3 ) + ssl->handshake->update_checksum = ssl_update_checksum_md5sha1; + else +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA512_C) + if( ciphersuite_info->mac == MBEDTLS_MD_SHA384 ) + ssl->handshake->update_checksum = ssl_update_checksum_sha384; + else +#endif +#if defined(MBEDTLS_SHA256_C) + if( ciphersuite_info->mac != MBEDTLS_MD_SHA384 ) + ssl->handshake->update_checksum = ssl_update_checksum_sha256; + else +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return; + } +} + +void mbedtls_ssl_reset_checksum( mbedtls_ssl_context *ssl ) +{ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + mbedtls_md5_starts( &ssl->handshake->fin_md5 ); + mbedtls_sha1_starts( &ssl->handshake->fin_sha1 ); +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) + mbedtls_sha256_starts( &ssl->handshake->fin_sha256, 0 ); +#endif +#if defined(MBEDTLS_SHA512_C) + mbedtls_sha512_starts( &ssl->handshake->fin_sha512, 1 ); +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ +} + +static void ssl_update_checksum_start( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + mbedtls_md5_update( &ssl->handshake->fin_md5 , buf, len ); + mbedtls_sha1_update( &ssl->handshake->fin_sha1, buf, len ); +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) + mbedtls_sha256_update( &ssl->handshake->fin_sha256, buf, len ); +#endif +#if defined(MBEDTLS_SHA512_C) + mbedtls_sha512_update( &ssl->handshake->fin_sha512, buf, len ); +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ +} + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) +static void ssl_update_checksum_md5sha1( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ + mbedtls_md5_update( &ssl->handshake->fin_md5 , buf, len ); + mbedtls_sha1_update( &ssl->handshake->fin_sha1, buf, len ); +} +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) +static void ssl_update_checksum_sha256( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ + mbedtls_sha256_update( &ssl->handshake->fin_sha256, buf, len ); +} +#endif + +#if defined(MBEDTLS_SHA512_C) +static void ssl_update_checksum_sha384( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ + mbedtls_sha512_update( &ssl->handshake->fin_sha512, buf, len ); +} +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +#if defined(MBEDTLS_SSL_PROTO_SSL3) +static void ssl_calc_finished_ssl( + mbedtls_ssl_context *ssl, unsigned char *buf, int from ) +{ + const char *sender; + mbedtls_md5_context md5; + mbedtls_sha1_context sha1; + + unsigned char padbuf[48]; + unsigned char md5sum[16]; + unsigned char sha1sum[20]; + + mbedtls_ssl_session *session = ssl->session_negotiate; + if( !session ) + session = ssl->session; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc finished ssl" ) ); + + mbedtls_md5_init( &md5 ); + mbedtls_sha1_init( &sha1 ); + + mbedtls_md5_clone( &md5, &ssl->handshake->fin_md5 ); + mbedtls_sha1_clone( &sha1, &ssl->handshake->fin_sha1 ); + + /* + * SSLv3: + * hash = + * MD5( master + pad2 + + * MD5( handshake + sender + master + pad1 ) ) + * + SHA1( master + pad2 + + * SHA1( handshake + sender + master + pad1 ) ) + */ + +#if !defined(MBEDTLS_MD5_ALT) + MBEDTLS_SSL_DEBUG_BUF( 4, "finished md5 state", (unsigned char *) + md5.state, sizeof( md5.state ) ); +#endif + +#if !defined(MBEDTLS_SHA1_ALT) + MBEDTLS_SSL_DEBUG_BUF( 4, "finished sha1 state", (unsigned char *) + sha1.state, sizeof( sha1.state ) ); +#endif + + sender = ( from == MBEDTLS_SSL_IS_CLIENT ) ? "CLNT" + : "SRVR"; + + memset( padbuf, 0x36, 48 ); + + mbedtls_md5_update( &md5, (const unsigned char *) sender, 4 ); + mbedtls_md5_update( &md5, session->master, 48 ); + mbedtls_md5_update( &md5, padbuf, 48 ); + mbedtls_md5_finish( &md5, md5sum ); + + mbedtls_sha1_update( &sha1, (const unsigned char *) sender, 4 ); + mbedtls_sha1_update( &sha1, session->master, 48 ); + mbedtls_sha1_update( &sha1, padbuf, 40 ); + mbedtls_sha1_finish( &sha1, sha1sum ); + + memset( padbuf, 0x5C, 48 ); + + mbedtls_md5_starts( &md5 ); + mbedtls_md5_update( &md5, session->master, 48 ); + mbedtls_md5_update( &md5, padbuf, 48 ); + mbedtls_md5_update( &md5, md5sum, 16 ); + mbedtls_md5_finish( &md5, buf ); + + mbedtls_sha1_starts( &sha1 ); + mbedtls_sha1_update( &sha1, session->master, 48 ); + mbedtls_sha1_update( &sha1, padbuf , 40 ); + mbedtls_sha1_update( &sha1, sha1sum, 20 ); + mbedtls_sha1_finish( &sha1, buf + 16 ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calc finished result", buf, 36 ); + + mbedtls_md5_free( &md5 ); + mbedtls_sha1_free( &sha1 ); + + mbedtls_zeroize( padbuf, sizeof( padbuf ) ); + mbedtls_zeroize( md5sum, sizeof( md5sum ) ); + mbedtls_zeroize( sha1sum, sizeof( sha1sum ) ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc finished" ) ); +} +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) +static void ssl_calc_finished_tls( + mbedtls_ssl_context *ssl, unsigned char *buf, int from ) +{ + int len = 12; + const char *sender; + mbedtls_md5_context md5; + mbedtls_sha1_context sha1; + unsigned char padbuf[36]; + + mbedtls_ssl_session *session = ssl->session_negotiate; + if( !session ) + session = ssl->session; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc finished tls" ) ); + + mbedtls_md5_init( &md5 ); + mbedtls_sha1_init( &sha1 ); + + mbedtls_md5_clone( &md5, &ssl->handshake->fin_md5 ); + mbedtls_sha1_clone( &sha1, &ssl->handshake->fin_sha1 ); + + /* + * TLSv1: + * hash = PRF( master, finished_label, + * MD5( handshake ) + SHA1( handshake ) )[0..11] + */ + +#if !defined(MBEDTLS_MD5_ALT) + MBEDTLS_SSL_DEBUG_BUF( 4, "finished md5 state", (unsigned char *) + md5.state, sizeof( md5.state ) ); +#endif + +#if !defined(MBEDTLS_SHA1_ALT) + MBEDTLS_SSL_DEBUG_BUF( 4, "finished sha1 state", (unsigned char *) + sha1.state, sizeof( sha1.state ) ); +#endif + + sender = ( from == MBEDTLS_SSL_IS_CLIENT ) + ? "client finished" + : "server finished"; + + mbedtls_md5_finish( &md5, padbuf ); + mbedtls_sha1_finish( &sha1, padbuf + 16 ); + + ssl->handshake->tls_prf( session->master, 48, sender, + padbuf, 36, buf, len ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calc finished result", buf, len ); + + mbedtls_md5_free( &md5 ); + mbedtls_sha1_free( &sha1 ); + + mbedtls_zeroize( padbuf, sizeof( padbuf ) ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc finished" ) ); +} +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 */ + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) +static void ssl_calc_finished_tls_sha256( + mbedtls_ssl_context *ssl, unsigned char *buf, int from ) +{ + int len = 12; + const char *sender; + mbedtls_sha256_context sha256; + unsigned char padbuf[32]; + + mbedtls_ssl_session *session = ssl->session_negotiate; + if( !session ) + session = ssl->session; + + mbedtls_sha256_init( &sha256 ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc finished tls sha256" ) ); + + mbedtls_sha256_clone( &sha256, &ssl->handshake->fin_sha256 ); + + /* + * TLSv1.2: + * hash = PRF( master, finished_label, + * Hash( handshake ) )[0.11] + */ + +#if !defined(MBEDTLS_SHA256_ALT) + MBEDTLS_SSL_DEBUG_BUF( 4, "finished sha2 state", (unsigned char *) + sha256.state, sizeof( sha256.state ) ); +#endif + + sender = ( from == MBEDTLS_SSL_IS_CLIENT ) + ? "client finished" + : "server finished"; + + mbedtls_sha256_finish( &sha256, padbuf ); + + ssl->handshake->tls_prf( session->master, 48, sender, + padbuf, 32, buf, len ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calc finished result", buf, len ); + + mbedtls_sha256_free( &sha256 ); + + mbedtls_zeroize( padbuf, sizeof( padbuf ) ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc finished" ) ); +} +#endif /* MBEDTLS_SHA256_C */ + +#if defined(MBEDTLS_SHA512_C) +static void ssl_calc_finished_tls_sha384( + mbedtls_ssl_context *ssl, unsigned char *buf, int from ) +{ + int len = 12; + const char *sender; + mbedtls_sha512_context sha512; + unsigned char padbuf[48]; + + mbedtls_ssl_session *session = ssl->session_negotiate; + if( !session ) + session = ssl->session; + + mbedtls_sha512_init( &sha512 ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> calc finished tls sha384" ) ); + + mbedtls_sha512_clone( &sha512, &ssl->handshake->fin_sha512 ); + + /* + * TLSv1.2: + * hash = PRF( master, finished_label, + * Hash( handshake ) )[0.11] + */ + +#if !defined(MBEDTLS_SHA512_ALT) + MBEDTLS_SSL_DEBUG_BUF( 4, "finished sha512 state", (unsigned char *) + sha512.state, sizeof( sha512.state ) ); +#endif + + sender = ( from == MBEDTLS_SSL_IS_CLIENT ) + ? "client finished" + : "server finished"; + + mbedtls_sha512_finish( &sha512, padbuf ); + + ssl->handshake->tls_prf( session->master, 48, sender, + padbuf, 48, buf, len ); + + MBEDTLS_SSL_DEBUG_BUF( 3, "calc finished result", buf, len ); + + mbedtls_sha512_free( &sha512 ); + + mbedtls_zeroize( padbuf, sizeof( padbuf ) ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= calc finished" ) ); +} +#endif /* MBEDTLS_SHA512_C */ +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +static void ssl_handshake_wrapup_free_hs_transform( mbedtls_ssl_context *ssl ) +{ + MBEDTLS_SSL_DEBUG_MSG( 3, ( "=> handshake wrapup: final free" ) ); + + /* + * Free our handshake params + */ + mbedtls_ssl_handshake_free( ssl->handshake ); + mbedtls_free( ssl->handshake ); + ssl->handshake = NULL; + + /* + * Free the previous transform and swith in the current one + */ + if( ssl->transform ) + { + mbedtls_ssl_transform_free( ssl->transform ); + mbedtls_free( ssl->transform ); + } + ssl->transform = ssl->transform_negotiate; + ssl->transform_negotiate = NULL; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "<= handshake wrapup: final free" ) ); +} + +void mbedtls_ssl_handshake_wrapup( mbedtls_ssl_context *ssl ) +{ + int resume = ssl->handshake->resume; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "=> handshake wrapup" ) ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + { + ssl->renego_status = MBEDTLS_SSL_RENEGOTIATION_DONE; + ssl->renego_records_seen = 0; + } +#endif + + /* + * Free the previous session and switch in the current one + */ + if( ssl->session ) + { +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + /* RFC 7366 3.1: keep the EtM state */ + ssl->session_negotiate->encrypt_then_mac = + ssl->session->encrypt_then_mac; +#endif + + mbedtls_ssl_session_free( ssl->session ); + mbedtls_free( ssl->session ); + } + ssl->session = ssl->session_negotiate; + ssl->session_negotiate = NULL; + + /* + * Add cache entry + */ + if( ssl->conf->f_set_cache != NULL && + ssl->session->id_len != 0 && + resume == 0 ) + { + if( ssl->conf->f_set_cache( ssl->conf->p_cache, ssl->session ) != 0 ) + MBEDTLS_SSL_DEBUG_MSG( 1, ( "cache did not store session" ) ); + } + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->handshake->flight != NULL ) + { + /* Cancel handshake timer */ + ssl_set_timer( ssl, 0 ); + + /* Keep last flight around in case we need to resend it: + * we need the handshake and transform structures for that */ + MBEDTLS_SSL_DEBUG_MSG( 3, ( "skip freeing handshake and transform" ) ); + } + else +#endif + ssl_handshake_wrapup_free_hs_transform( ssl ); + + ssl->state++; + + MBEDTLS_SSL_DEBUG_MSG( 3, ( "<= handshake wrapup" ) ); +} + +int mbedtls_ssl_write_finished( mbedtls_ssl_context *ssl ) +{ + int ret, hash_len; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write finished" ) ); + + /* + * Set the out_msg pointer to the correct location based on IV length + */ + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_2 ) + { + ssl->out_msg = ssl->out_iv + ssl->transform_negotiate->ivlen - + ssl->transform_negotiate->fixed_ivlen; + } + else + ssl->out_msg = ssl->out_iv; + + ssl->handshake->calc_finished( ssl, ssl->out_msg + 4, ssl->conf->endpoint ); + + // TODO TLS/1.2 Hash length is determined by cipher suite (Page 63) + hash_len = ( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) ? 36 : 12; + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + ssl->verify_data_len = hash_len; + memcpy( ssl->own_verify_data, ssl->out_msg + 4, hash_len ); +#endif + + ssl->out_msglen = 4 + hash_len; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_FINISHED; + + /* + * In case of session resuming, invert the client and server + * ChangeCipherSpec messages order. + */ + if( ssl->handshake->resume != 0 ) + { +#if defined(MBEDTLS_SSL_CLI_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT ) + ssl->state = MBEDTLS_SSL_HANDSHAKE_WRAPUP; +#endif +#if defined(MBEDTLS_SSL_SRV_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + ssl->state = MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC; +#endif + } + else + ssl->state++; + + /* + * Switch to our negotiated transform and session parameters for outbound + * data. + */ + MBEDTLS_SSL_DEBUG_MSG( 3, ( "switching to new transform spec for outbound data" ) ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + unsigned char i; + + /* Remember current epoch settings for resending */ + ssl->handshake->alt_transform_out = ssl->transform_out; + memcpy( ssl->handshake->alt_out_ctr, ssl->out_ctr, 8 ); + + /* Set sequence_number to zero */ + memset( ssl->out_ctr + 2, 0, 6 ); + + /* Increment epoch */ + for( i = 2; i > 0; i-- ) + if( ++ssl->out_ctr[i - 1] != 0 ) + break; + + /* The loop goes to its end iff the counter is wrapping */ + if( i == 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "DTLS epoch would wrap" ) ); + return( MBEDTLS_ERR_SSL_COUNTER_WRAPPING ); + } + } + else +#endif /* MBEDTLS_SSL_PROTO_DTLS */ + memset( ssl->out_ctr, 0, 8 ); + + ssl->transform_out = ssl->transform_negotiate; + ssl->session_out = ssl->session_negotiate; + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_activate != NULL ) + { + if( ( ret = mbedtls_ssl_hw_record_activate( ssl, MBEDTLS_SSL_CHANNEL_OUTBOUND ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_hw_record_activate", ret ); + return( MBEDTLS_ERR_SSL_HW_ACCEL_FAILED ); + } + } +#endif + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + mbedtls_ssl_send_flight_completed( ssl ); +#endif + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write finished" ) ); + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_PROTO_SSL3) +#define SSL_MAX_HASH_LEN 36 +#else +#define SSL_MAX_HASH_LEN 12 +#endif + +int mbedtls_ssl_parse_finished( mbedtls_ssl_context *ssl ) +{ + int ret; + unsigned int hash_len; + unsigned char buf[SSL_MAX_HASH_LEN]; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> parse finished" ) ); + + ssl->handshake->calc_finished( ssl, buf, ssl->conf->endpoint ^ 1 ); + + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad finished message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + /* There is currently no ciphersuite using another length with TLS 1.2 */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + hash_len = 36; + else +#endif + hash_len = 12; + + if( ssl->in_msg[0] != MBEDTLS_SSL_HS_FINISHED || + ssl->in_hslen != mbedtls_ssl_hs_hdr_len( ssl ) + hash_len ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad finished message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_FINISHED ); + } + + if( mbedtls_ssl_safer_memcmp( ssl->in_msg + mbedtls_ssl_hs_hdr_len( ssl ), + buf, hash_len ) != 0 ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad finished message" ) ); + return( MBEDTLS_ERR_SSL_BAD_HS_FINISHED ); + } + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + ssl->verify_data_len = hash_len; + memcpy( ssl->peer_verify_data, buf, hash_len ); +#endif + + if( ssl->handshake->resume != 0 ) + { +#if defined(MBEDTLS_SSL_CLI_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT ) + ssl->state = MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC; +#endif +#if defined(MBEDTLS_SSL_SRV_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + ssl->state = MBEDTLS_SSL_HANDSHAKE_WRAPUP; +#endif + } + else + ssl->state++; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + mbedtls_ssl_recv_flight_completed( ssl ); +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= parse finished" ) ); + + return( 0 ); +} + +static void ssl_handshake_params_init( mbedtls_ssl_handshake_params *handshake ) +{ + memset( handshake, 0, sizeof( mbedtls_ssl_handshake_params ) ); + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + mbedtls_md5_init( &handshake->fin_md5 ); + mbedtls_sha1_init( &handshake->fin_sha1 ); + mbedtls_md5_starts( &handshake->fin_md5 ); + mbedtls_sha1_starts( &handshake->fin_sha1 ); +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) + mbedtls_sha256_init( &handshake->fin_sha256 ); + mbedtls_sha256_starts( &handshake->fin_sha256, 0 ); +#endif +#if defined(MBEDTLS_SHA512_C) + mbedtls_sha512_init( &handshake->fin_sha512 ); + mbedtls_sha512_starts( &handshake->fin_sha512, 1 ); +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + + handshake->update_checksum = ssl_update_checksum_start; + handshake->sig_alg = MBEDTLS_SSL_HASH_SHA1; + +#if defined(MBEDTLS_DHM_C) + mbedtls_dhm_init( &handshake->dhm_ctx ); +#endif +#if defined(MBEDTLS_ECDH_C) + mbedtls_ecdh_init( &handshake->ecdh_ctx ); +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + mbedtls_ecjpake_init( &handshake->ecjpake_ctx ); +#if defined(MBEDTLS_SSL_CLI_C) + handshake->ecjpake_cache = NULL; + handshake->ecjpake_cache_len = 0; +#endif +#endif + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + handshake->sni_authmode = MBEDTLS_SSL_VERIFY_UNSET; +#endif +} + +static void ssl_transform_init( mbedtls_ssl_transform *transform ) +{ + memset( transform, 0, sizeof(mbedtls_ssl_transform) ); + + mbedtls_cipher_init( &transform->cipher_ctx_enc ); + mbedtls_cipher_init( &transform->cipher_ctx_dec ); + + mbedtls_md_init( &transform->md_ctx_enc ); + mbedtls_md_init( &transform->md_ctx_dec ); +} + +void mbedtls_ssl_session_init( mbedtls_ssl_session *session ) +{ + memset( session, 0, sizeof(mbedtls_ssl_session) ); +} + +static int ssl_handshake_init( mbedtls_ssl_context *ssl ) +{ + /* Clear old handshake information if present */ + if( ssl->transform_negotiate ) + mbedtls_ssl_transform_free( ssl->transform_negotiate ); + if( ssl->session_negotiate ) + mbedtls_ssl_session_free( ssl->session_negotiate ); + if( ssl->handshake ) + mbedtls_ssl_handshake_free( ssl->handshake ); + + /* + * Either the pointers are now NULL or cleared properly and can be freed. + * Now allocate missing structures. + */ + if( ssl->transform_negotiate == NULL ) + { + ssl->transform_negotiate = mbedtls_calloc( 1, sizeof(mbedtls_ssl_transform) ); + } + + if( ssl->session_negotiate == NULL ) + { + ssl->session_negotiate = mbedtls_calloc( 1, sizeof(mbedtls_ssl_session) ); + } + + if( ssl->handshake == NULL ) + { + ssl->handshake = mbedtls_calloc( 1, sizeof(mbedtls_ssl_handshake_params) ); + } + + /* All pointers should exist and can be directly freed without issue */ + if( ssl->handshake == NULL || + ssl->transform_negotiate == NULL || + ssl->session_negotiate == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc() of ssl sub-contexts failed" ) ); + + mbedtls_free( ssl->handshake ); + mbedtls_free( ssl->transform_negotiate ); + mbedtls_free( ssl->session_negotiate ); + + ssl->handshake = NULL; + ssl->transform_negotiate = NULL; + ssl->session_negotiate = NULL; + + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + /* Initialize structures */ + mbedtls_ssl_session_init( ssl->session_negotiate ); + ssl_transform_init( ssl->transform_negotiate ); + ssl_handshake_params_init( ssl->handshake ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + ssl->handshake->alt_transform_out = ssl->transform_out; + + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT ) + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_PREPARING; + else + ssl->handshake->retransmit_state = MBEDTLS_SSL_RETRANS_WAITING; + + ssl_set_timer( ssl, 0 ); + } +#endif + + return( 0 ); +} + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C) +/* Dummy cookie callbacks for defaults */ +static int ssl_cookie_write_dummy( void *ctx, + unsigned char **p, unsigned char *end, + const unsigned char *cli_id, size_t cli_id_len ) +{ + ((void) ctx); + ((void) p); + ((void) end); + ((void) cli_id); + ((void) cli_id_len); + + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); +} + +static int ssl_cookie_check_dummy( void *ctx, + const unsigned char *cookie, size_t cookie_len, + const unsigned char *cli_id, size_t cli_id_len ) +{ + ((void) ctx); + ((void) cookie); + ((void) cookie_len); + ((void) cli_id); + ((void) cli_id_len); + + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); +} +#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY && MBEDTLS_SSL_SRV_C */ + +/* + * Initialize an SSL context + */ +void mbedtls_ssl_init( mbedtls_ssl_context *ssl ) +{ + memset( ssl, 0, sizeof( mbedtls_ssl_context ) ); +} + +/* + * Setup an SSL context + */ +int mbedtls_ssl_setup( mbedtls_ssl_context *ssl, + const mbedtls_ssl_config *conf ) +{ + int ret; + const size_t len = MBEDTLS_SSL_BUFFER_LEN; + + ssl->conf = conf; + + /* + * Prepare base structures + */ +#if !defined(ESP8266_PLATFORM) + if( ( ssl-> in_buf = mbedtls_calloc( 1, len ) ) == NULL || + ( ssl->out_buf = mbedtls_calloc( 1, len ) ) == NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc(%d bytes) failed", len ) ); + mbedtls_free( ssl->in_buf ); + ssl->in_buf = NULL; + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } +#else + if( ( ssl-> in_buf = mbedtls_calloc( 1, len ) ) == NULL) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "alloc(%d bytes) failed", len ) ); + mbedtls_free( ssl->in_buf ); + ssl->in_buf = NULL; + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + ssl->out_buf = ssl->in_buf; +#endif + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + ssl->out_hdr = ssl->out_buf; + ssl->out_ctr = ssl->out_buf + 3; + ssl->out_len = ssl->out_buf + 11; + ssl->out_iv = ssl->out_buf + 13; + ssl->out_msg = ssl->out_buf + 13; + + ssl->in_hdr = ssl->in_buf; + ssl->in_ctr = ssl->in_buf + 3; + ssl->in_len = ssl->in_buf + 11; + ssl->in_iv = ssl->in_buf + 13; + ssl->in_msg = ssl->in_buf + 13; + } + else +#endif + { + ssl->out_ctr = ssl->out_buf; + ssl->out_hdr = ssl->out_buf + 8; + ssl->out_len = ssl->out_buf + 11; + ssl->out_iv = ssl->out_buf + 13; + ssl->out_msg = ssl->out_buf + 13; + + ssl->in_ctr = ssl->in_buf; + ssl->in_hdr = ssl->in_buf + 8; + ssl->in_len = ssl->in_buf + 11; + ssl->in_iv = ssl->in_buf + 13; + ssl->in_msg = ssl->in_buf + 13; + } + + if( ( ret = ssl_handshake_init( ssl ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +/* + * Reset an initialized and used SSL context for re-use while retaining + * all application-set variables, function pointers and data. + * + * If partial is non-zero, keep data in the input buffer and client ID. + * (Use when a DTLS client reconnects from the same port.) + */ +static int ssl_session_reset_int( mbedtls_ssl_context *ssl, int partial ) +{ + int ret; + + ssl->state = MBEDTLS_SSL_HELLO_REQUEST; + + /* Cancel any possibly running timer */ + ssl_set_timer( ssl, 0 ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + ssl->renego_status = MBEDTLS_SSL_INITIAL_HANDSHAKE; + ssl->renego_records_seen = 0; + + ssl->verify_data_len = 0; + memset( ssl->own_verify_data, 0, MBEDTLS_SSL_VERIFY_DATA_MAX_LEN ); + memset( ssl->peer_verify_data, 0, MBEDTLS_SSL_VERIFY_DATA_MAX_LEN ); +#endif + ssl->secure_renegotiation = MBEDTLS_SSL_LEGACY_RENEGOTIATION; + + ssl->in_offt = NULL; + + ssl->in_msg = ssl->in_buf + 13; + ssl->in_msgtype = 0; + ssl->in_msglen = 0; + if( partial == 0 ) + ssl->in_left = 0; +#if defined(MBEDTLS_SSL_PROTO_DTLS) + ssl->next_record_offset = 0; + ssl->in_epoch = 0; +#endif +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + ssl_dtls_replay_reset( ssl ); +#endif + + ssl->in_hslen = 0; + ssl->nb_zero = 0; + ssl->record_read = 0; + + ssl->out_msg = ssl->out_buf + 13; + ssl->out_msgtype = 0; + ssl->out_msglen = 0; + ssl->out_left = 0; +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) + if( ssl->split_done != MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED ) + ssl->split_done = 0; +#endif + + ssl->transform_in = NULL; + ssl->transform_out = NULL; + + memset( ssl->out_buf, 0, MBEDTLS_SSL_BUFFER_LEN ); + if( partial == 0 ) + memset( ssl->in_buf, 0, MBEDTLS_SSL_BUFFER_LEN ); + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_reset != NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "going for mbedtls_ssl_hw_record_reset()" ) ); + if( ( ret = mbedtls_ssl_hw_record_reset( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_hw_record_reset", ret ); + return( MBEDTLS_ERR_SSL_HW_ACCEL_FAILED ); + } + } +#endif + + if( ssl->transform ) + { + mbedtls_ssl_transform_free( ssl->transform ); + mbedtls_free( ssl->transform ); + ssl->transform = NULL; + } + + if( ssl->session ) + { + mbedtls_ssl_session_free( ssl->session ); + mbedtls_free( ssl->session ); + ssl->session = NULL; + } + +#if defined(MBEDTLS_SSL_ALPN) + ssl->alpn_chosen = NULL; +#endif + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C) + if( partial == 0 ) + { + mbedtls_free( ssl->cli_id ); + ssl->cli_id = NULL; + ssl->cli_id_len = 0; + } +#endif + + if( ( ret = ssl_handshake_init( ssl ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +/* + * Reset an initialized and used SSL context for re-use while retaining + * all application-set variables, function pointers and data. + */ +int mbedtls_ssl_session_reset( mbedtls_ssl_context *ssl ) +{ + return( ssl_session_reset_int( ssl, 0 ) ); +} + +/* + * SSL set accessors + */ +void mbedtls_ssl_conf_endpoint( mbedtls_ssl_config *conf, int endpoint ) +{ + conf->endpoint = endpoint; +} + +void mbedtls_ssl_conf_transport( mbedtls_ssl_config *conf, int transport ) +{ + conf->transport = transport; +} + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) +void mbedtls_ssl_conf_dtls_anti_replay( mbedtls_ssl_config *conf, char mode ) +{ + conf->anti_replay = mode; +} +#endif + +#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) +void mbedtls_ssl_conf_dtls_badmac_limit( mbedtls_ssl_config *conf, unsigned limit ) +{ + conf->badmac_limit = limit; +} +#endif + +#if defined(MBEDTLS_SSL_PROTO_DTLS) +void mbedtls_ssl_conf_handshake_timeout( mbedtls_ssl_config *conf, uint32_t min, uint32_t max ) +{ + conf->hs_timeout_min = min; + conf->hs_timeout_max = max; +} +#endif + +void mbedtls_ssl_conf_authmode( mbedtls_ssl_config *conf, int authmode ) +{ + conf->authmode = authmode; +} + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +void mbedtls_ssl_conf_verify( mbedtls_ssl_config *conf, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ) +{ + conf->f_vrfy = f_vrfy; + conf->p_vrfy = p_vrfy; +} +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +void mbedtls_ssl_conf_rng( mbedtls_ssl_config *conf, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + conf->f_rng = f_rng; + conf->p_rng = p_rng; +} + +void mbedtls_ssl_conf_dbg( mbedtls_ssl_config *conf, + void (*f_dbg)(void *, int, const char *, int, const char *), + void *p_dbg ) +{ + conf->f_dbg = f_dbg; + conf->p_dbg = p_dbg; +} + +void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl, + void *p_bio, + int (*f_send)(void *, const unsigned char *, size_t), + int (*f_recv)(void *, unsigned char *, size_t), + int (*f_recv_timeout)(void *, unsigned char *, size_t, uint32_t) ) +{ + ssl->p_bio = p_bio; + ssl->f_send = f_send; + ssl->f_recv = f_recv; + ssl->f_recv_timeout = f_recv_timeout; +} + +void mbedtls_ssl_conf_read_timeout( mbedtls_ssl_config *conf, uint32_t timeout ) +{ + conf->read_timeout = timeout; +} + +void mbedtls_ssl_set_timer_cb( mbedtls_ssl_context *ssl, + void *p_timer, + void (*f_set_timer)(void *, uint32_t int_ms, uint32_t fin_ms), + int (*f_get_timer)(void *) ) +{ + ssl->p_timer = p_timer; + ssl->f_set_timer = f_set_timer; + ssl->f_get_timer = f_get_timer; + + /* Make sure we start with no timer running */ + ssl_set_timer( ssl, 0 ); +} + +#if defined(MBEDTLS_SSL_SRV_C) +void mbedtls_ssl_conf_session_cache( mbedtls_ssl_config *conf, + void *p_cache, + int (*f_get_cache)(void *, mbedtls_ssl_session *), + int (*f_set_cache)(void *, const mbedtls_ssl_session *) ) +{ + conf->p_cache = p_cache; + conf->f_get_cache = f_get_cache; + conf->f_set_cache = f_set_cache; +} +#endif /* MBEDTLS_SSL_SRV_C */ + +#if defined(MBEDTLS_SSL_CLI_C) +int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session *session ) +{ + int ret; + + if( ssl == NULL || + session == NULL || + ssl->session_negotiate == NULL || + ssl->conf->endpoint != MBEDTLS_SSL_IS_CLIENT ) + { + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + if( ( ret = ssl_session_copy( ssl->session_negotiate, session ) ) != 0 ) + return( ret ); + + ssl->handshake->resume = 1; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_CLI_C */ + +void mbedtls_ssl_conf_ciphersuites( mbedtls_ssl_config *conf, + const int *ciphersuites ) +{ + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_0] = ciphersuites; + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_1] = ciphersuites; + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_2] = ciphersuites; + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_3] = ciphersuites; +} + +void mbedtls_ssl_conf_ciphersuites_for_version( mbedtls_ssl_config *conf, + const int *ciphersuites, + int major, int minor ) +{ + if( major != MBEDTLS_SSL_MAJOR_VERSION_3 ) + return; + + if( minor < MBEDTLS_SSL_MINOR_VERSION_0 || minor > MBEDTLS_SSL_MINOR_VERSION_3 ) + return; + + conf->ciphersuite_list[minor] = ciphersuites; +} + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +void mbedtls_ssl_conf_cert_profile( mbedtls_ssl_config *conf, + const mbedtls_x509_crt_profile *profile ) +{ + conf->cert_profile = profile; +} + +/* Append a new keycert entry to a (possibly empty) list */ +static int ssl_append_key_cert( mbedtls_ssl_key_cert **head, + mbedtls_x509_crt *cert, + mbedtls_pk_context *key ) +{ + mbedtls_ssl_key_cert *new; + + new = mbedtls_calloc( 1, sizeof( mbedtls_ssl_key_cert ) ); + if( new == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + new->cert = cert; + new->key = key; + new->next = NULL; + + /* Update head is the list was null, else add to the end */ + if( *head == NULL ) + { + *head = new; + } + else + { + mbedtls_ssl_key_cert *cur = *head; + while( cur->next != NULL ) + cur = cur->next; + cur->next = new; + } + + return( 0 ); +} + +int mbedtls_ssl_conf_own_cert( mbedtls_ssl_config *conf, + mbedtls_x509_crt *own_cert, + mbedtls_pk_context *pk_key ) +{ + return( ssl_append_key_cert( &conf->key_cert, own_cert, pk_key ) ); +} + +void mbedtls_ssl_conf_ca_chain( mbedtls_ssl_config *conf, + mbedtls_x509_crt *ca_chain, + mbedtls_x509_crl *ca_crl ) +{ + conf->ca_chain = ca_chain; + conf->ca_crl = ca_crl; +} +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) +int mbedtls_ssl_set_hs_own_cert( mbedtls_ssl_context *ssl, + mbedtls_x509_crt *own_cert, + mbedtls_pk_context *pk_key ) +{ + return( ssl_append_key_cert( &ssl->handshake->sni_key_cert, + own_cert, pk_key ) ); +} + +void mbedtls_ssl_set_hs_ca_chain( mbedtls_ssl_context *ssl, + mbedtls_x509_crt *ca_chain, + mbedtls_x509_crl *ca_crl ) +{ + ssl->handshake->sni_ca_chain = ca_chain; + ssl->handshake->sni_ca_crl = ca_crl; +} + +void mbedtls_ssl_set_hs_authmode( mbedtls_ssl_context *ssl, + int authmode ) +{ + ssl->handshake->sni_authmode = authmode; +} +#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */ + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) +/* + * Set EC J-PAKE password for current handshake + */ +int mbedtls_ssl_set_hs_ecjpake_password( mbedtls_ssl_context *ssl, + const unsigned char *pw, + size_t pw_len ) +{ + mbedtls_ecjpake_role role; + + if( ssl->handshake == NULL && ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + role = MBEDTLS_ECJPAKE_SERVER; + else + role = MBEDTLS_ECJPAKE_CLIENT; + + return( mbedtls_ecjpake_setup( &ssl->handshake->ecjpake_ctx, + role, + MBEDTLS_MD_SHA256, + MBEDTLS_ECP_DP_SECP256R1, + pw, pw_len ) ); +} +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) +int mbedtls_ssl_conf_psk( mbedtls_ssl_config *conf, + const unsigned char *psk, size_t psk_len, + const unsigned char *psk_identity, size_t psk_identity_len ) +{ + if( psk == NULL || psk_identity == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( psk_len > MBEDTLS_PSK_MAX_LEN ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + /* Identity len will be encoded on two bytes */ + if( ( psk_identity_len >> 16 ) != 0 || + psk_identity_len > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + if( conf->psk != NULL || conf->psk_identity != NULL ) + { + mbedtls_free( conf->psk ); + mbedtls_free( conf->psk_identity ); + conf->psk = NULL; + conf->psk_identity = NULL; + } + + if( ( conf->psk = mbedtls_calloc( 1, psk_len ) ) == NULL || + ( conf->psk_identity = mbedtls_calloc( 1, psk_identity_len ) ) == NULL ) + { + mbedtls_free( conf->psk ); + mbedtls_free( conf->psk_identity ); + conf->psk = NULL; + conf->psk_identity = NULL; + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + } + + conf->psk_len = psk_len; + conf->psk_identity_len = psk_identity_len; + + memcpy( conf->psk, psk, conf->psk_len ); + memcpy( conf->psk_identity, psk_identity, conf->psk_identity_len ); + + return( 0 ); +} + +int mbedtls_ssl_set_hs_psk( mbedtls_ssl_context *ssl, + const unsigned char *psk, size_t psk_len ) +{ + if( psk == NULL || ssl->handshake == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( psk_len > MBEDTLS_PSK_MAX_LEN ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( ssl->handshake->psk != NULL ) + mbedtls_free( ssl->handshake->psk ); + + if( ( ssl->handshake->psk = mbedtls_calloc( 1, psk_len ) ) == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + ssl->handshake->psk_len = psk_len; + memcpy( ssl->handshake->psk, psk, ssl->handshake->psk_len ); + + return( 0 ); +} + +void mbedtls_ssl_conf_psk_cb( mbedtls_ssl_config *conf, + int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, + size_t), + void *p_psk ) +{ + conf->f_psk = f_psk; + conf->p_psk = p_psk; +} +#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */ + +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C) +int mbedtls_ssl_conf_dh_param( mbedtls_ssl_config *conf, const char *dhm_P, const char *dhm_G ) +{ + int ret; + + if( ( ret = mbedtls_mpi_read_string( &conf->dhm_P, 16, dhm_P ) ) != 0 || + ( ret = mbedtls_mpi_read_string( &conf->dhm_G, 16, dhm_G ) ) != 0 ) + { + mbedtls_mpi_free( &conf->dhm_P ); + mbedtls_mpi_free( &conf->dhm_G ); + return( ret ); + } + + return( 0 ); +} + +int mbedtls_ssl_conf_dh_param_ctx( mbedtls_ssl_config *conf, mbedtls_dhm_context *dhm_ctx ) +{ + int ret; + + if( ( ret = mbedtls_mpi_copy( &conf->dhm_P, &dhm_ctx->P ) ) != 0 || + ( ret = mbedtls_mpi_copy( &conf->dhm_G, &dhm_ctx->G ) ) != 0 ) + { + mbedtls_mpi_free( &conf->dhm_P ); + mbedtls_mpi_free( &conf->dhm_G ); + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_DHM_C && MBEDTLS_SSL_SRV_C */ + +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C) +/* + * Set the minimum length for Diffie-Hellman parameters + */ +void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf, + unsigned int bitlen ) +{ + conf->dhm_min_bitlen = bitlen; +} +#endif /* MBEDTLS_DHM_C && MBEDTLS_SSL_CLI_C */ + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +/* + * Set allowed/preferred hashes for handshake signatures + */ +void mbedtls_ssl_conf_sig_hashes( mbedtls_ssl_config *conf, + const int *hashes ) +{ + conf->sig_hashes = hashes; +} +#endif + +#if defined(MBEDTLS_ECP_C) +/* + * Set the allowed elliptic curves + */ +void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf, + const mbedtls_ecp_group_id *curve_list ) +{ + conf->curve_list = curve_list; +} +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +int mbedtls_ssl_set_hostname( mbedtls_ssl_context *ssl, const char *hostname ) +{ + size_t hostname_len; + + if( hostname == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + hostname_len = strlen( hostname ); + + if( hostname_len + 1 == 0 ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( hostname_len > MBEDTLS_SSL_MAX_HOST_NAME_LEN ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + ssl->hostname = mbedtls_calloc( 1, hostname_len + 1 ); + + if( ssl->hostname == NULL ) + return( MBEDTLS_ERR_SSL_ALLOC_FAILED ); + + memcpy( ssl->hostname, hostname, hostname_len ); + + ssl->hostname[hostname_len] = '\0'; + + return( 0 ); +} +#endif + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) +void mbedtls_ssl_conf_sni( mbedtls_ssl_config *conf, + int (*f_sni)(void *, mbedtls_ssl_context *, + const unsigned char *, size_t), + void *p_sni ) +{ + conf->f_sni = f_sni; + conf->p_sni = p_sni; +} +#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */ + +#if defined(MBEDTLS_SSL_ALPN) +int mbedtls_ssl_conf_alpn_protocols( mbedtls_ssl_config *conf, const char **protos ) +{ + size_t cur_len, tot_len; + const char **p; + + /* + * "Empty strings MUST NOT be included and byte strings MUST NOT be + * truncated". Check lengths now rather than later. + */ + tot_len = 0; + for( p = protos; *p != NULL; p++ ) + { + cur_len = strlen( *p ); + tot_len += cur_len; + + if( cur_len == 0 || cur_len > 255 || tot_len > 65535 ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + conf->alpn_list = protos; + + return( 0 ); +} + +const char *mbedtls_ssl_get_alpn_protocol( const mbedtls_ssl_context *ssl ) +{ + return( ssl->alpn_chosen ); +} +#endif /* MBEDTLS_SSL_ALPN */ + +void mbedtls_ssl_conf_max_version( mbedtls_ssl_config *conf, int major, int minor ) +{ + conf->max_major_ver = major; + conf->max_minor_ver = minor; +} + +void mbedtls_ssl_conf_min_version( mbedtls_ssl_config *conf, int major, int minor ) +{ + conf->min_major_ver = major; + conf->min_minor_ver = minor; +} + +#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C) +void mbedtls_ssl_conf_fallback( mbedtls_ssl_config *conf, char fallback ) +{ + conf->fallback = fallback; +} +#endif + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) +void mbedtls_ssl_conf_encrypt_then_mac( mbedtls_ssl_config *conf, char etm ) +{ + conf->encrypt_then_mac = etm; +} +#endif + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) +void mbedtls_ssl_conf_extended_master_secret( mbedtls_ssl_config *conf, char ems ) +{ + conf->extended_ms = ems; +} +#endif + +#if defined(MBEDTLS_ARC4_C) +void mbedtls_ssl_conf_arc4_support( mbedtls_ssl_config *conf, char arc4 ) +{ + conf->arc4_disabled = arc4; +} +#endif + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +int mbedtls_ssl_conf_max_frag_len( mbedtls_ssl_config *conf, unsigned char mfl_code ) +{ + if( mfl_code >= MBEDTLS_SSL_MAX_FRAG_LEN_INVALID || + mfl_code_to_length[mfl_code] > MBEDTLS_SSL_MAX_CONTENT_LEN ) + { + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + conf->mfl_code = mfl_code; + + return( 0 ); +} +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) +void mbedtls_ssl_conf_truncated_hmac( mbedtls_ssl_config *conf, int truncate ) +{ + conf->trunc_hmac = truncate; +} +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ + +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) +void mbedtls_ssl_conf_cbc_record_splitting( mbedtls_ssl_config *conf, char split ) +{ + conf->cbc_record_splitting = split; +} +#endif + +void mbedtls_ssl_conf_legacy_renegotiation( mbedtls_ssl_config *conf, int allow_legacy ) +{ + conf->allow_legacy_renegotiation = allow_legacy; +} + +#if defined(MBEDTLS_SSL_RENEGOTIATION) +void mbedtls_ssl_conf_renegotiation( mbedtls_ssl_config *conf, int renegotiation ) +{ + conf->disable_renegotiation = renegotiation; +} + +void mbedtls_ssl_conf_renegotiation_enforced( mbedtls_ssl_config *conf, int max_records ) +{ + conf->renego_max_records = max_records; +} + +void mbedtls_ssl_conf_renegotiation_period( mbedtls_ssl_config *conf, + const unsigned char period[8] ) +{ + memcpy( conf->renego_period, period, 8 ); +} +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) +#if defined(MBEDTLS_SSL_CLI_C) +void mbedtls_ssl_conf_session_tickets( mbedtls_ssl_config *conf, int use_tickets ) +{ + conf->session_tickets = use_tickets; +} +#endif + +#if defined(MBEDTLS_SSL_SRV_C) +void mbedtls_ssl_conf_session_tickets_cb( mbedtls_ssl_config *conf, + mbedtls_ssl_ticket_write_t *f_ticket_write, + mbedtls_ssl_ticket_parse_t *f_ticket_parse, + void *p_ticket ) +{ + conf->f_ticket_write = f_ticket_write; + conf->f_ticket_parse = f_ticket_parse; + conf->p_ticket = p_ticket; +} +#endif +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ + +#if defined(MBEDTLS_SSL_EXPORT_KEYS) +void mbedtls_ssl_conf_export_keys_cb( mbedtls_ssl_config *conf, + mbedtls_ssl_export_keys_t *f_export_keys, + void *p_export_keys ) +{ + conf->f_export_keys = f_export_keys; + conf->p_export_keys = p_export_keys; +} +#endif + +/* + * SSL get accessors + */ +size_t mbedtls_ssl_get_bytes_avail( const mbedtls_ssl_context *ssl ) +{ + return( ssl->in_offt == NULL ? 0 : ssl->in_msglen ); +} + +uint32_t mbedtls_ssl_get_verify_result( const mbedtls_ssl_context *ssl ) +{ + if( ssl->session != NULL ) + return( ssl->session->verify_result ); + + if( ssl->session_negotiate != NULL ) + return( ssl->session_negotiate->verify_result ); + + return( 0xFFFFFFFF ); +} + +const char *mbedtls_ssl_get_ciphersuite( const mbedtls_ssl_context *ssl ) +{ + if( ssl == NULL || ssl->session == NULL ) + return( NULL ); + + return mbedtls_ssl_get_ciphersuite_name( ssl->session->ciphersuite ); +} + +const char *mbedtls_ssl_get_version( const mbedtls_ssl_context *ssl ) +{ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + switch( ssl->minor_ver ) + { + case MBEDTLS_SSL_MINOR_VERSION_2: + return( "DTLSv1.0" ); + + case MBEDTLS_SSL_MINOR_VERSION_3: + return( "DTLSv1.2" ); + + default: + return( "unknown (DTLS)" ); + } + } +#endif + + switch( ssl->minor_ver ) + { + case MBEDTLS_SSL_MINOR_VERSION_0: + return( "SSLv3.0" ); + + case MBEDTLS_SSL_MINOR_VERSION_1: + return( "TLSv1.0" ); + + case MBEDTLS_SSL_MINOR_VERSION_2: + return( "TLSv1.1" ); + + case MBEDTLS_SSL_MINOR_VERSION_3: + return( "TLSv1.2" ); + + default: + return( "unknown" ); + } +} + +int mbedtls_ssl_get_record_expansion( const mbedtls_ssl_context *ssl ) +{ + size_t transform_expansion; + const mbedtls_ssl_transform *transform = ssl->transform_out; + +#if defined(MBEDTLS_ZLIB_SUPPORT) + if( ssl->session_out->compression != MBEDTLS_SSL_COMPRESS_NULL ) + return( MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE ); +#endif + + if( transform == NULL ) + return( (int) mbedtls_ssl_hdr_len( ssl ) ); + + switch( mbedtls_cipher_get_cipher_mode( &transform->cipher_ctx_enc ) ) + { + case MBEDTLS_MODE_GCM: + case MBEDTLS_MODE_CCM: + case MBEDTLS_MODE_STREAM: + transform_expansion = transform->minlen; + break; + + case MBEDTLS_MODE_CBC: + transform_expansion = transform->maclen + + mbedtls_cipher_get_block_size( &transform->cipher_ctx_enc ); + break; + + default: + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + + return( (int)( mbedtls_ssl_hdr_len( ssl ) + transform_expansion ) ); +} + +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) +size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl ) +{ + size_t max_len; + + /* + * Assume mfl_code is correct since it was checked when set + */ + max_len = mfl_code_to_length[ssl->conf->mfl_code]; + + /* + * Check if a smaller max length was negotiated + */ + if( ssl->session_out != NULL && + mfl_code_to_length[ssl->session_out->mfl_code] < max_len ) + { + max_len = mfl_code_to_length[ssl->session_out->mfl_code]; + } + + return max_len; +} +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +const mbedtls_x509_crt *mbedtls_ssl_get_peer_cert( const mbedtls_ssl_context *ssl ) +{ + if( ssl == NULL || ssl->session == NULL ) + return( NULL ); + + return( ssl->session->peer_cert ); +} +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +#if defined(MBEDTLS_SSL_CLI_C) +int mbedtls_ssl_get_session( const mbedtls_ssl_context *ssl, mbedtls_ssl_session *dst ) +{ + if( ssl == NULL || + dst == NULL || + ssl->session == NULL || + ssl->conf->endpoint != MBEDTLS_SSL_IS_CLIENT ) + { + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + + return( ssl_session_copy( dst, ssl->session ) ); +} +#endif /* MBEDTLS_SSL_CLI_C */ + +/* + * Perform a single step of the SSL handshake + */ +int mbedtls_ssl_handshake_step( mbedtls_ssl_context *ssl ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + + if( ssl == NULL || ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + +#if defined(MBEDTLS_SSL_CLI_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT ) + ret = mbedtls_ssl_handshake_client_step( ssl ); +#endif +#if defined(MBEDTLS_SSL_SRV_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + ret = mbedtls_ssl_handshake_server_step( ssl ); +#endif + + return( ret ); +} +void mbedtls_handshake_heap(mbedtls_ssl_context *ssl); + +/* + * Perform the SSL handshake + */ +int mbedtls_ssl_handshake( mbedtls_ssl_context *ssl ) +{ + int ret = 0; + + if( ssl == NULL || ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> handshake" ) ); + + while( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER ) + { + //mbedtls_handshake_heap(ssl); + ret = mbedtls_ssl_handshake_step( ssl ); + + if( ret != 0 ) + break; + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= handshake" ) ); + + return( ret ); +} + +#if defined(MBEDTLS_SSL_RENEGOTIATION) +#if defined(MBEDTLS_SSL_SRV_C) +/* + * Write HelloRequest to request renegotiation on server + */ +static int ssl_write_hello_request( mbedtls_ssl_context *ssl ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write hello request" ) ); + + ssl->out_msglen = 4; + ssl->out_msgtype = MBEDTLS_SSL_MSG_HANDSHAKE; + ssl->out_msg[0] = MBEDTLS_SSL_HS_HELLO_REQUEST; + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write hello request" ) ); + + return( 0 ); +} +#endif /* MBEDTLS_SSL_SRV_C */ + +/* + * Actually renegotiate current connection, triggered by either: + * - any side: calling mbedtls_ssl_renegotiate(), + * - client: receiving a HelloRequest during mbedtls_ssl_read(), + * - server: receiving any handshake message on server during mbedtls_ssl_read() after + * the initial handshake is completed. + * If the handshake doesn't complete due to waiting for I/O, it will continue + * during the next calls to mbedtls_ssl_renegotiate() or mbedtls_ssl_read() respectively. + */ +static int ssl_start_renegotiation( mbedtls_ssl_context *ssl ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> renegotiate" ) ); + + if( ( ret = ssl_handshake_init( ssl ) ) != 0 ) + return( ret ); + + /* RFC 6347 4.2.2: "[...] the HelloRequest will have message_seq = 0 and + * the ServerHello will have message_seq = 1" */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_PENDING ) + { + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + ssl->handshake->out_msg_seq = 1; + else + ssl->handshake->in_msg_seq = 1; + } +#endif + + ssl->state = MBEDTLS_SSL_HELLO_REQUEST; + ssl->renego_status = MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS; + + if( ( ret = mbedtls_ssl_handshake( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_handshake", ret ); + return( ret ); + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= renegotiate" ) ); + + return( 0 ); +} + +/* + * Renegotiate current connection on client, + * or request renegotiation on server + */ +int mbedtls_ssl_renegotiate( mbedtls_ssl_context *ssl ) +{ + int ret = MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE; + + if( ssl == NULL || ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + +#if defined(MBEDTLS_SSL_SRV_C) + /* On server, just send the request */ + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER ) + { + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + ssl->renego_status = MBEDTLS_SSL_RENEGOTIATION_PENDING; + + /* Did we already try/start sending HelloRequest? */ + if( ssl->out_left != 0 ) + return( mbedtls_ssl_flush_output( ssl ) ); + + return( ssl_write_hello_request( ssl ) ); + } +#endif /* MBEDTLS_SSL_SRV_C */ + +#if defined(MBEDTLS_SSL_CLI_C) + /* + * On client, either start the renegotiation process or, + * if already in progress, continue the handshake + */ + if( ssl->renego_status != MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS ) + { + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + if( ( ret = ssl_start_renegotiation( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_start_renegotiation", ret ); + return( ret ); + } + } + else + { + if( ( ret = mbedtls_ssl_handshake( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_handshake", ret ); + return( ret ); + } + } +#endif /* MBEDTLS_SSL_CLI_C */ + + return( ret ); +} + +/* + * Check record counters and renegotiate if they're above the limit. + */ +static int ssl_check_ctr_renegotiate( mbedtls_ssl_context *ssl ) +{ + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER || + ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_PENDING || + ssl->conf->disable_renegotiation == MBEDTLS_SSL_RENEGOTIATION_DISABLED ) + { + return( 0 ); + } + + if( memcmp( ssl->in_ctr, ssl->conf->renego_period, 8 ) <= 0 && + memcmp( ssl->out_ctr, ssl->conf->renego_period, 8 ) <= 0 ) + { + return( 0 ); + } + + MBEDTLS_SSL_DEBUG_MSG( 1, ( "record counter limit reached: renegotiate" ) ); + return( mbedtls_ssl_renegotiate( ssl ) ); +} +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + +/* + * Receive application data decrypted from the SSL layer + */ +int mbedtls_ssl_read( mbedtls_ssl_context *ssl, unsigned char *buf, size_t len ) +{ + int ret, record_read = 0; + size_t n; + + if( ssl == NULL || ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> read" ) ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + if( ( ret = mbedtls_ssl_flush_output( ssl ) ) != 0 ) + return( ret ); + + if( ssl->handshake != NULL && + ssl->handshake->retransmit_state == MBEDTLS_SSL_RETRANS_SENDING ) + { + if( ( ret = mbedtls_ssl_resend( ssl ) ) != 0 ) + return( ret ); + } + } +#endif + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ( ret = ssl_check_ctr_renegotiate( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_check_ctr_renegotiate", ret ); + return( ret ); + } +#endif + + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER ) + { + ret = mbedtls_ssl_handshake( ssl ); + if( ret == MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO ) + { + record_read = 1; + } + else if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_handshake", ret ); + return( ret ); + } + } + + if( ssl->in_offt == NULL ) + { + /* Start timer if not already running */ + if( ssl->f_get_timer != NULL && + ssl->f_get_timer( ssl->p_timer ) == -1 ) + { + ssl_set_timer( ssl, ssl->conf->read_timeout ); + } + + if( ! record_read ) + { + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_SSL_CONN_EOF ) + return( 0 ); + + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + } + + if( ssl->in_msglen == 0 && + ssl->in_msgtype == MBEDTLS_SSL_MSG_APPLICATION_DATA ) + { + /* + * OpenSSL sends empty messages to randomize the IV + */ + if( ( ret = mbedtls_ssl_read_record( ssl ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_SSL_CONN_EOF ) + return( 0 ); + + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_read_record", ret ); + return( ret ); + } + } + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_HANDSHAKE ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "received handshake message" ) ); + +#if defined(MBEDTLS_SSL_CLI_C) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT && + ( ssl->in_msg[0] != MBEDTLS_SSL_HS_HELLO_REQUEST || + ssl->in_hslen != mbedtls_ssl_hs_hdr_len( ssl ) ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "handshake received (not HelloRequest)" ) ); + + /* With DTLS, drop the packet (probably from last handshake) */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + return( MBEDTLS_ERR_SSL_WANT_READ ); +#endif + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ssl->in_msg[0] != MBEDTLS_SSL_HS_CLIENT_HELLO ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "handshake received (not ClientHello)" ) ); + + /* With DTLS, drop the packet (probably from last handshake) */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + return( MBEDTLS_ERR_SSL_WANT_READ ); +#endif + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } +#endif + + if( ssl->conf->disable_renegotiation == MBEDTLS_SSL_RENEGOTIATION_DISABLED || + ( ssl->secure_renegotiation == MBEDTLS_SSL_LEGACY_RENEGOTIATION && + ssl->conf->allow_legacy_renegotiation == + MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION ) ) + { + MBEDTLS_SSL_DEBUG_MSG( 3, ( "refusing renegotiation, sending alert" ) ); + +#if defined(MBEDTLS_SSL_PROTO_SSL3) + if( ssl->minor_ver == MBEDTLS_SSL_MINOR_VERSION_0 ) + { + /* + * SSLv3 does not have a "no_renegotiation" alert + */ + if( ( ret = mbedtls_ssl_send_fatal_handshake_failure( ssl ) ) != 0 ) + return( ret ); + } + else +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_2) + if( ssl->minor_ver >= MBEDTLS_SSL_MINOR_VERSION_1 ) + { + if( ( ret = mbedtls_ssl_send_alert_message( ssl, + MBEDTLS_SSL_ALERT_LEVEL_WARNING, + MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION ) ) != 0 ) + { + return( ret ); + } + } + else +#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || + MBEDTLS_SSL_PROTO_TLS1_2 */ + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "should never happen" ) ); + return( MBEDTLS_ERR_SSL_INTERNAL_ERROR ); + } + } + else + { + /* DTLS clients need to know renego is server-initiated */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM && + ssl->conf->endpoint == MBEDTLS_SSL_IS_CLIENT ) + { + ssl->renego_status = MBEDTLS_SSL_RENEGOTIATION_PENDING; + } +#endif + ret = ssl_start_renegotiation( ssl ); + if( ret == MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO ) + { + record_read = 1; + } + else if( ret != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_start_renegotiation", ret ); + return( ret ); + } + } + + /* If a non-handshake record was read during renego, fallthrough, + * else tell the user they should call mbedtls_ssl_read() again */ + if( ! record_read ) + return( MBEDTLS_ERR_SSL_WANT_READ ); + } + else if( ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_PENDING ) + { + + if( ssl->conf->renego_max_records >= 0 ) + { + if( ++ssl->renego_records_seen > ssl->conf->renego_max_records ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "renegotiation requested, " + "but not honored by client" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + } + } +#endif /* MBEDTLS_SSL_RENEGOTIATION */ + + /* Fatal and closure alerts handled by mbedtls_ssl_read_record() */ + if( ssl->in_msgtype == MBEDTLS_SSL_MSG_ALERT ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "ignoring non-fatal non-closure alert" ) ); + return( MBEDTLS_ERR_SSL_WANT_READ ); + } + + if( ssl->in_msgtype != MBEDTLS_SSL_MSG_APPLICATION_DATA ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "bad application data message" ) ); + return( MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE ); + } + + ssl->in_offt = ssl->in_msg; + + /* We're going to return something now, cancel timer, + * except if handshake (renegotiation) is in progress */ + if( ssl->state == MBEDTLS_SSL_HANDSHAKE_OVER ) + ssl_set_timer( ssl, 0 ); + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + /* If we requested renego but received AppData, resend HelloRequest. + * Do it now, after setting in_offt, to avoid taking this branch + * again if ssl_write_hello_request() returns WANT_WRITE */ +#if defined(MBEDTLS_SSL_SRV_C) && defined(MBEDTLS_SSL_RENEGOTIATION) + if( ssl->conf->endpoint == MBEDTLS_SSL_IS_SERVER && + ssl->renego_status == MBEDTLS_SSL_RENEGOTIATION_PENDING ) + { + if( ( ret = ssl_resend_hello_request( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_resend_hello_request", ret ); + return( ret ); + } + } +#endif /* MBEDTLS_SSL_SRV_C && MBEDTLS_SSL_RENEGOTIATION */ +#endif + } + + n = ( len < ssl->in_msglen ) + ? len : ssl->in_msglen; + + memcpy( buf, ssl->in_offt, n ); + ssl->in_msglen -= n; + + if( ssl->in_msglen == 0 ) + /* all bytes consumed */ + ssl->in_offt = NULL; + else + /* more data available */ + ssl->in_offt += n; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= read" ) ); + + return( (int) n ); +} + +/* + * Send application data to be encrypted by the SSL layer, + * taking care of max fragment length and buffer size + */ +static int ssl_write_real( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ + int ret; +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + size_t max_len = mbedtls_ssl_get_max_frag_len( ssl ); + + if( len > max_len ) + { +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + MBEDTLS_SSL_DEBUG_MSG( 1, ( "fragment larger than the (negotiated) " + "maximum fragment length: %d > %d", + len, max_len ) ); + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + } + else +#endif + len = max_len; + } +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ + + if( ssl->out_left != 0 ) + { + if( ( ret = mbedtls_ssl_flush_output( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_flush_output", ret ); + return( ret ); + } + } + else + { + ssl->out_msglen = len; + ssl->out_msgtype = MBEDTLS_SSL_MSG_APPLICATION_DATA; + memcpy( ssl->out_msg, buf, len ); + + if( ( ret = mbedtls_ssl_write_record( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_write_record", ret ); + return( ret ); + } + } + + return( (int) len ); +} + +/* + * Write application data, doing 1/n-1 splitting if necessary. + * + * With non-blocking I/O, ssl_write_real() may return WANT_WRITE, + * then the caller will call us again with the same arguments, so + * remember wether we already did the split or not. + */ +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) +static int ssl_write_split( mbedtls_ssl_context *ssl, + const unsigned char *buf, size_t len ) +{ + int ret; + + if( ssl->conf->cbc_record_splitting == + MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED || + len <= 1 || + ssl->minor_ver > MBEDTLS_SSL_MINOR_VERSION_1 || + mbedtls_cipher_get_cipher_mode( &ssl->transform_out->cipher_ctx_enc ) + != MBEDTLS_MODE_CBC ) + { + return( ssl_write_real( ssl, buf, len ) ); + } + + if( ssl->split_done == 0 ) + { + if( ( ret = ssl_write_real( ssl, buf, 1 ) ) <= 0 ) + return( ret ); + ssl->split_done = 1; + } + + if( ( ret = ssl_write_real( ssl, buf + 1, len - 1 ) ) <= 0 ) + return( ret ); + ssl->split_done = 0; + + return( ret + 1 ); +} +#endif /* MBEDTLS_SSL_CBC_RECORD_SPLITTING */ + +/* + * Write application data (public-facing wrapper) + */ +int mbedtls_ssl_write( mbedtls_ssl_context *ssl, const unsigned char *buf, size_t len ) +{ + int ret; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write" ) ); + + if( ssl == NULL || ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + if( ( ret = ssl_check_ctr_renegotiate( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "ssl_check_ctr_renegotiate", ret ); + return( ret ); + } +#endif + + if( ssl->state != MBEDTLS_SSL_HANDSHAKE_OVER ) + { + if( ( ret = mbedtls_ssl_handshake( ssl ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_handshake", ret ); + return( ret ); + } + } + +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) + ret = ssl_write_split( ssl, buf, len ); +#else + ret = ssl_write_real( ssl, buf, len ); +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write" ) ); + + return( ret ); +} + +/* + * Notify the peer that the connection is being closed + */ +int mbedtls_ssl_close_notify( mbedtls_ssl_context *ssl ) +{ + int ret; + + if( ssl == NULL || ssl->conf == NULL ) + return( MBEDTLS_ERR_SSL_BAD_INPUT_DATA ); + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> write close notify" ) ); + + if( ssl->out_left != 0 ) + return( mbedtls_ssl_flush_output( ssl ) ); + + if( ssl->state == MBEDTLS_SSL_HANDSHAKE_OVER ) + { + if( ( ret = mbedtls_ssl_send_alert_message( ssl, + MBEDTLS_SSL_ALERT_LEVEL_WARNING, + MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY ) ) != 0 ) + { + MBEDTLS_SSL_DEBUG_RET( 1, "mbedtls_ssl_send_alert_message", ret ); + return( ret ); + } + } + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= write close notify" ) ); + + return( 0 ); +} + +void mbedtls_ssl_transform_free( mbedtls_ssl_transform *transform ) +{ + if( transform == NULL ) + return; + +#if defined(MBEDTLS_ZLIB_SUPPORT) + deflateEnd( &transform->ctx_deflate ); + inflateEnd( &transform->ctx_inflate ); +#endif + + mbedtls_cipher_free( &transform->cipher_ctx_enc ); + mbedtls_cipher_free( &transform->cipher_ctx_dec ); + + mbedtls_md_free( &transform->md_ctx_enc ); + mbedtls_md_free( &transform->md_ctx_dec ); + + mbedtls_zeroize( transform, sizeof( mbedtls_ssl_transform ) ); +} + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +static void ssl_key_cert_free( mbedtls_ssl_key_cert *key_cert ) +{ + mbedtls_ssl_key_cert *cur = key_cert, *next; + + while( cur != NULL ) + { + next = cur->next; + mbedtls_free( cur ); + cur = next; + } +} +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +void mbedtls_ssl_handshake_free( mbedtls_ssl_handshake_params *handshake ) +{ + if( handshake == NULL ) + return; + +#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \ + defined(MBEDTLS_SSL_PROTO_TLS1_1) + mbedtls_md5_free( &handshake->fin_md5 ); + mbedtls_sha1_free( &handshake->fin_sha1 ); +#endif +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) +#if defined(MBEDTLS_SHA256_C) + mbedtls_sha256_free( &handshake->fin_sha256 ); +#endif +#if defined(MBEDTLS_SHA512_C) + mbedtls_sha512_free( &handshake->fin_sha512 ); +#endif +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ + +#if defined(MBEDTLS_DHM_C) + mbedtls_dhm_free( &handshake->dhm_ctx ); +#endif +#if defined(MBEDTLS_ECDH_C) + mbedtls_ecdh_free( &handshake->ecdh_ctx ); +#endif +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + mbedtls_ecjpake_free( &handshake->ecjpake_ctx ); +#if defined(MBEDTLS_SSL_CLI_C) + mbedtls_free( handshake->ecjpake_cache ); + handshake->ecjpake_cache = NULL; + handshake->ecjpake_cache_len = 0; +#endif +#endif + +#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) + /* explicit void pointer cast for buggy MS compiler */ + mbedtls_free( (void *) handshake->curves ); +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + if( handshake->psk != NULL ) + { + mbedtls_zeroize( handshake->psk, handshake->psk_len ); + mbedtls_free( handshake->psk ); + } +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) && \ + defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + /* + * Free only the linked list wrapper, not the keys themselves + * since the belong to the SNI callback + */ + if( handshake->sni_key_cert != NULL ) + { + mbedtls_ssl_key_cert *cur = handshake->sni_key_cert, *next; + + while( cur != NULL ) + { + next = cur->next; + mbedtls_free( cur ); + cur = next; + } + } +#endif /* MBEDTLS_X509_CRT_PARSE_C && MBEDTLS_SSL_SERVER_NAME_INDICATION */ + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + mbedtls_free( handshake->verify_cookie ); + mbedtls_free( handshake->hs_msg ); + ssl_flight_free( handshake->flight ); +#endif + + mbedtls_zeroize( handshake, sizeof( mbedtls_ssl_handshake_params ) ); +} + +void mbedtls_ssl_session_free( mbedtls_ssl_session *session ) +{ + if( session == NULL ) + return; + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + if( session->peer_cert != NULL ) + { + mbedtls_x509_crt_free( session->peer_cert ); + mbedtls_free( session->peer_cert ); + } +#endif + +#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C) + mbedtls_free( session->ticket ); +#endif + + mbedtls_zeroize( session, sizeof( mbedtls_ssl_session ) ); +} + +/* + * Free an SSL context + */ +void mbedtls_ssl_free( mbedtls_ssl_context *ssl ) +{ + if( ssl == NULL ) + return; + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "=> free" ) ); + +#if !defined(ESP8266_PLATFORM) + + if( ssl->out_buf != NULL ) + { + mbedtls_zeroize( ssl->out_buf, MBEDTLS_SSL_BUFFER_LEN ); + mbedtls_free( ssl->out_buf ); + } + + if( ssl->in_buf != NULL ) + { + mbedtls_zeroize( ssl->in_buf, MBEDTLS_SSL_BUFFER_LEN ); + mbedtls_free( ssl->in_buf ); + } +#else + if( ssl->in_buf != NULL ) + { + mbedtls_zeroize( ssl->in_buf, MBEDTLS_SSL_BUFFER_LEN ); + mbedtls_free( ssl->in_buf ); + } + +#endif + +#if defined(MBEDTLS_ZLIB_SUPPORT) + if( ssl->compress_buf != NULL ) + { + mbedtls_zeroize( ssl->compress_buf, MBEDTLS_SSL_BUFFER_LEN ); + mbedtls_free( ssl->compress_buf ); + } +#endif + + if( ssl->transform ) + { + mbedtls_ssl_transform_free( ssl->transform ); + mbedtls_free( ssl->transform ); + } + + if( ssl->handshake ) + { + mbedtls_ssl_handshake_free( ssl->handshake ); + mbedtls_ssl_transform_free( ssl->transform_negotiate ); + mbedtls_ssl_session_free( ssl->session_negotiate ); + + mbedtls_free( ssl->handshake ); + mbedtls_free( ssl->transform_negotiate ); + mbedtls_free( ssl->session_negotiate ); + } + + if( ssl->session ) + { + mbedtls_ssl_session_free( ssl->session ); + mbedtls_free( ssl->session ); + } + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + if( ssl->hostname != NULL ) + { + mbedtls_zeroize( ssl->hostname, strlen( ssl->hostname ) ); + mbedtls_free( ssl->hostname ); + } +#endif + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + if( mbedtls_ssl_hw_record_finish != NULL ) + { + MBEDTLS_SSL_DEBUG_MSG( 2, ( "going for mbedtls_ssl_hw_record_finish()" ) ); + mbedtls_ssl_hw_record_finish( ssl ); + } +#endif + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C) + mbedtls_free( ssl->cli_id ); +#endif + + MBEDTLS_SSL_DEBUG_MSG( 2, ( "<= free" ) ); + + /* Actually clear after last debug message */ + mbedtls_zeroize( ssl, sizeof( mbedtls_ssl_context ) ); +} + +/* + * Initialze mbedtls_ssl_config + */ +void mbedtls_ssl_config_init( mbedtls_ssl_config *conf ) +{ + memset( conf, 0, sizeof( mbedtls_ssl_config ) ); +} + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +static int ssl_preset_default_hashes[] = { +#if defined(MBEDTLS_SHA512_C) + MBEDTLS_MD_SHA512, + MBEDTLS_MD_SHA384, +#endif +#if defined(MBEDTLS_SHA256_C) + MBEDTLS_MD_SHA256, + MBEDTLS_MD_SHA224, +#endif +#if defined(MBEDTLS_SHA1_C) + MBEDTLS_MD_SHA1, +#endif + MBEDTLS_MD_NONE +}; +#endif + +static int ssl_preset_suiteb_ciphersuites[] = { + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256, + MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384, + 0 +}; + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +static int ssl_preset_suiteb_hashes[] = { + MBEDTLS_MD_SHA256, + MBEDTLS_MD_SHA384, + MBEDTLS_MD_NONE +}; +#endif + +#if defined(MBEDTLS_ECP_C) +static mbedtls_ecp_group_id ssl_preset_suiteb_curves[] = { + MBEDTLS_ECP_DP_SECP256R1, + MBEDTLS_ECP_DP_SECP384R1, + MBEDTLS_ECP_DP_NONE +}; +#endif + +/* + * Load default in mbedtls_ssl_config + */ +int mbedtls_ssl_config_defaults( mbedtls_ssl_config *conf, + int endpoint, int transport, int preset ) +{ +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C) + int ret; +#endif + + /* Use the functions here so that they are covered in tests, + * but otherwise access member directly for efficiency */ + mbedtls_ssl_conf_endpoint( conf, endpoint ); + mbedtls_ssl_conf_transport( conf, transport ); + + /* + * Things that are common to all presets + */ +#if defined(MBEDTLS_SSL_CLI_C) + if( endpoint == MBEDTLS_SSL_IS_CLIENT ) + { + conf->authmode = MBEDTLS_SSL_VERIFY_REQUIRED; +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + conf->session_tickets = MBEDTLS_SSL_SESSION_TICKETS_ENABLED; +#endif + } +#endif + +#if defined(MBEDTLS_ARC4_C) + conf->arc4_disabled = MBEDTLS_SSL_ARC4_DISABLED; +#endif + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + conf->encrypt_then_mac = MBEDTLS_SSL_ETM_ENABLED; +#endif + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + conf->extended_ms = MBEDTLS_SSL_EXTENDED_MS_ENABLED; +#endif + +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) + conf->cbc_record_splitting = MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED; +#endif + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C) + conf->f_cookie_write = ssl_cookie_write_dummy; + conf->f_cookie_check = ssl_cookie_check_dummy; +#endif + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + conf->anti_replay = MBEDTLS_SSL_ANTI_REPLAY_ENABLED; +#endif + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + conf->hs_timeout_min = MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MIN; + conf->hs_timeout_max = MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MAX; +#endif + +#if defined(MBEDTLS_SSL_RENEGOTIATION) + conf->renego_max_records = MBEDTLS_SSL_RENEGO_MAX_RECORDS_DEFAULT; + memset( conf->renego_period, 0xFF, 7 ); + conf->renego_period[7] = 0x00; +#endif + +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C) + if( endpoint == MBEDTLS_SSL_IS_SERVER ) + { + if( ( ret = mbedtls_ssl_conf_dh_param( conf, + MBEDTLS_DHM_RFC5114_MODP_2048_P, + MBEDTLS_DHM_RFC5114_MODP_2048_G ) ) != 0 ) + { + return( ret ); + } + } +#endif + + /* + * Preset-specific defaults + */ + switch( preset ) + { + /* + * NSA Suite B + */ + case MBEDTLS_SSL_PRESET_SUITEB: + conf->min_major_ver = MBEDTLS_SSL_MAJOR_VERSION_3; + conf->min_minor_ver = MBEDTLS_SSL_MINOR_VERSION_3; /* TLS 1.2 */ + conf->max_major_ver = MBEDTLS_SSL_MAX_MAJOR_VERSION; + conf->max_minor_ver = MBEDTLS_SSL_MAX_MINOR_VERSION; + + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_0] = + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_1] = + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_2] = + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_3] = + ssl_preset_suiteb_ciphersuites; + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + conf->cert_profile = &mbedtls_x509_crt_profile_suiteb; +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) + conf->sig_hashes = ssl_preset_suiteb_hashes; +#endif + +#if defined(MBEDTLS_ECP_C) + conf->curve_list = ssl_preset_suiteb_curves; +#endif + break; + + /* + * Default + */ + default: + conf->min_major_ver = MBEDTLS_SSL_MAJOR_VERSION_3; + conf->min_minor_ver = MBEDTLS_SSL_MINOR_VERSION_1; /* TLS 1.0 */ + conf->max_major_ver = MBEDTLS_SSL_MAX_MAJOR_VERSION; + conf->max_minor_ver = MBEDTLS_SSL_MAX_MINOR_VERSION; + +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + conf->min_minor_ver = MBEDTLS_SSL_MINOR_VERSION_2; +#endif + + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_0] = + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_1] = + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_2] = + conf->ciphersuite_list[MBEDTLS_SSL_MINOR_VERSION_3] = + mbedtls_ssl_list_ciphersuites(); + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + conf->cert_profile = &mbedtls_x509_crt_profile_default; +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) + conf->sig_hashes = ssl_preset_default_hashes; +#endif + +#if defined(MBEDTLS_ECP_C) + conf->curve_list = mbedtls_ecp_grp_id_list(); +#endif + +#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C) + conf->dhm_min_bitlen = 1024; +#endif + } + + return( 0 ); +} + +/* + * Free mbedtls_ssl_config + */ +void mbedtls_ssl_config_free( mbedtls_ssl_config *conf ) +{ +#if defined(MBEDTLS_DHM_C) + mbedtls_mpi_free( &conf->dhm_P ); + mbedtls_mpi_free( &conf->dhm_G ); +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED) + if( conf->psk != NULL ) + { + mbedtls_zeroize( conf->psk, conf->psk_len ); + mbedtls_zeroize( conf->psk_identity, conf->psk_identity_len ); + mbedtls_free( conf->psk ); + mbedtls_free( conf->psk_identity ); + conf->psk_len = 0; + conf->psk_identity_len = 0; + } +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + ssl_key_cert_free( conf->key_cert ); +#endif + + mbedtls_zeroize( conf, sizeof( mbedtls_ssl_config ) ); +} + +#if defined(MBEDTLS_PK_C) && \ + ( defined(MBEDTLS_RSA_C) || defined(MBEDTLS_ECDSA_C) ) +/* + * Convert between MBEDTLS_PK_XXX and SSL_SIG_XXX + */ +unsigned char mbedtls_ssl_sig_from_pk( mbedtls_pk_context *pk ) +{ +#if defined(MBEDTLS_RSA_C) + if( mbedtls_pk_can_do( pk, MBEDTLS_PK_RSA ) ) + return( MBEDTLS_SSL_SIG_RSA ); +#endif +#if defined(MBEDTLS_ECDSA_C) + if( mbedtls_pk_can_do( pk, MBEDTLS_PK_ECDSA ) ) + return( MBEDTLS_SSL_SIG_ECDSA ); +#endif + return( MBEDTLS_SSL_SIG_ANON ); +} + +mbedtls_pk_type_t mbedtls_ssl_pk_alg_from_sig( unsigned char sig ) +{ + switch( sig ) + { +#if defined(MBEDTLS_RSA_C) + case MBEDTLS_SSL_SIG_RSA: + return( MBEDTLS_PK_RSA ); +#endif +#if defined(MBEDTLS_ECDSA_C) + case MBEDTLS_SSL_SIG_ECDSA: + return( MBEDTLS_PK_ECDSA ); +#endif + default: + return( MBEDTLS_PK_NONE ); + } +} +#endif /* MBEDTLS_PK_C && ( MBEDTLS_RSA_C || MBEDTLS_ECDSA_C ) */ + +/* + * Convert from MBEDTLS_SSL_HASH_XXX to MBEDTLS_MD_XXX + */ +mbedtls_md_type_t mbedtls_ssl_md_alg_from_hash( unsigned char hash ) +{ + switch( hash ) + { +#if defined(MBEDTLS_MD5_C) + case MBEDTLS_SSL_HASH_MD5: + return( MBEDTLS_MD_MD5 ); +#endif +#if defined(MBEDTLS_SHA1_C) + case MBEDTLS_SSL_HASH_SHA1: + return( MBEDTLS_MD_SHA1 ); +#endif +#if defined(MBEDTLS_SHA256_C) + case MBEDTLS_SSL_HASH_SHA224: + return( MBEDTLS_MD_SHA224 ); + case MBEDTLS_SSL_HASH_SHA256: + return( MBEDTLS_MD_SHA256 ); +#endif +#if defined(MBEDTLS_SHA512_C) + case MBEDTLS_SSL_HASH_SHA384: + return( MBEDTLS_MD_SHA384 ); + case MBEDTLS_SSL_HASH_SHA512: + return( MBEDTLS_MD_SHA512 ); +#endif + default: + return( MBEDTLS_MD_NONE ); + } +} + +/* + * Convert from MBEDTLS_MD_XXX to MBEDTLS_SSL_HASH_XXX + */ +unsigned char mbedtls_ssl_hash_from_md_alg( int md ) +{ + switch( md ) + { +#if defined(MBEDTLS_MD5_C) + case MBEDTLS_MD_MD5: + return( MBEDTLS_SSL_HASH_MD5 ); +#endif +#if defined(MBEDTLS_SHA1_C) + case MBEDTLS_MD_SHA1: + return( MBEDTLS_SSL_HASH_SHA1 ); +#endif +#if defined(MBEDTLS_SHA256_C) + case MBEDTLS_MD_SHA224: + return( MBEDTLS_SSL_HASH_SHA224 ); + case MBEDTLS_MD_SHA256: + return( MBEDTLS_SSL_HASH_SHA256 ); +#endif +#if defined(MBEDTLS_SHA512_C) + case MBEDTLS_MD_SHA384: + return( MBEDTLS_SSL_HASH_SHA384 ); + case MBEDTLS_MD_SHA512: + return( MBEDTLS_SSL_HASH_SHA512 ); +#endif + default: + return( MBEDTLS_SSL_HASH_NONE ); + } +} + +#if defined(MBEDTLS_ECP_C) +/* + * Check if a curve proposed by the peer is in our list. + * Return 0 if we're willing to use it, -1 otherwise. + */ +int mbedtls_ssl_check_curve( const mbedtls_ssl_context *ssl, mbedtls_ecp_group_id grp_id ) +{ + const mbedtls_ecp_group_id *gid; + + if( ssl->conf->curve_list == NULL ) + return( -1 ); + + for( gid = ssl->conf->curve_list; *gid != MBEDTLS_ECP_DP_NONE; gid++ ) + if( *gid == grp_id ) + return( 0 ); + + return( -1 ); +} +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED) +/* + * Check if a hash proposed by the peer is in our list. + * Return 0 if we're willing to use it, -1 otherwise. + */ +int mbedtls_ssl_check_sig_hash( const mbedtls_ssl_context *ssl, + mbedtls_md_type_t md ) +{ + const int *cur; + + if( ssl->conf->sig_hashes == NULL ) + return( -1 ); + + for( cur = ssl->conf->sig_hashes; *cur != MBEDTLS_MD_NONE; cur++ ) + if( *cur == (int) md ) + return( 0 ); + + return( -1 ); +} +#endif /* MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */ + +#if defined(MBEDTLS_X509_CRT_PARSE_C) +int mbedtls_ssl_check_cert_usage( const mbedtls_x509_crt *cert, + const mbedtls_ssl_ciphersuite_t *ciphersuite, + int cert_endpoint, + uint32_t *flags ) +{ + int ret = 0; +#if defined(MBEDTLS_X509_CHECK_KEY_USAGE) + int usage = 0; +#endif +#if defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) + const char *ext_oid; + size_t ext_len; +#endif + +#if !defined(MBEDTLS_X509_CHECK_KEY_USAGE) && \ + !defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) + ((void) cert); + ((void) cert_endpoint); + ((void) flags); +#endif + +#if defined(MBEDTLS_X509_CHECK_KEY_USAGE) + if( cert_endpoint == MBEDTLS_SSL_IS_SERVER ) + { + /* Server part of the key exchange */ + switch( ciphersuite->key_exchange ) + { + case MBEDTLS_KEY_EXCHANGE_RSA: + case MBEDTLS_KEY_EXCHANGE_RSA_PSK: + usage = MBEDTLS_X509_KU_KEY_ENCIPHERMENT; + break; + + case MBEDTLS_KEY_EXCHANGE_DHE_RSA: + case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA: + case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA: + usage = MBEDTLS_X509_KU_DIGITAL_SIGNATURE; + break; + + case MBEDTLS_KEY_EXCHANGE_ECDH_RSA: + case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA: + usage = MBEDTLS_X509_KU_KEY_AGREEMENT; + break; + + /* Don't use default: we want warnings when adding new values */ + case MBEDTLS_KEY_EXCHANGE_NONE: + case MBEDTLS_KEY_EXCHANGE_PSK: + case MBEDTLS_KEY_EXCHANGE_DHE_PSK: + case MBEDTLS_KEY_EXCHANGE_ECDHE_PSK: + case MBEDTLS_KEY_EXCHANGE_ECJPAKE: + usage = 0; + } + } + else + { + /* Client auth: we only implement rsa_sign and mbedtls_ecdsa_sign for now */ + usage = MBEDTLS_X509_KU_DIGITAL_SIGNATURE; + } + + if( mbedtls_x509_crt_check_key_usage( cert, usage ) != 0 ) + { + *flags |= MBEDTLS_X509_BADCERT_KEY_USAGE; + ret = -1; + } +#else + ((void) ciphersuite); +#endif /* MBEDTLS_X509_CHECK_KEY_USAGE */ + +#if defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) + if( cert_endpoint == MBEDTLS_SSL_IS_SERVER ) + { + ext_oid = MBEDTLS_OID_SERVER_AUTH; + ext_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_SERVER_AUTH ); + } + else + { + ext_oid = MBEDTLS_OID_CLIENT_AUTH; + ext_len = MBEDTLS_OID_SIZE( MBEDTLS_OID_CLIENT_AUTH ); + } + + if( mbedtls_x509_crt_check_extended_key_usage( cert, ext_oid, ext_len ) != 0 ) + { + *flags |= MBEDTLS_X509_BADCERT_EXT_KEY_USAGE; + ret = -1; + } +#endif /* MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE */ + + return( ret ); +} +#endif /* MBEDTLS_X509_CRT_PARSE_C */ + +/* + * Convert version numbers to/from wire format + * and, for DTLS, to/from TLS equivalent. + * + * For TLS this is the identity. + * For DTLS, use one complement (v -> 255 - v, and then map as follows: + * 1.0 <-> 3.2 (DTLS 1.0 is based on TLS 1.1) + * 1.x <-> 3.x+1 for x != 0 (DTLS 1.2 based on TLS 1.2) + */ +void mbedtls_ssl_write_version( int major, int minor, int transport, + unsigned char ver[2] ) +{ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + if( minor == MBEDTLS_SSL_MINOR_VERSION_2 ) + --minor; /* DTLS 1.0 stored as TLS 1.1 internally */ + + ver[0] = (unsigned char)( 255 - ( major - 2 ) ); + ver[1] = (unsigned char)( 255 - ( minor - 1 ) ); + } + else +#else + ((void) transport); +#endif + { + ver[0] = (unsigned char) major; + ver[1] = (unsigned char) minor; + } +} + +void mbedtls_ssl_read_version( int *major, int *minor, int transport, + const unsigned char ver[2] ) +{ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + if( transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM ) + { + *major = 255 - ver[0] + 2; + *minor = 255 - ver[1] + 1; + + if( *minor == MBEDTLS_SSL_MINOR_VERSION_1 ) + ++*minor; /* DTLS 1.0 stored as TLS 1.1 internally */ + } + else +#else + ((void) transport); +#endif + { + *major = ver[0]; + *minor = ver[1]; + } +} + +#endif /* MBEDTLS_SSL_TLS_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/threading.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/threading.c new file mode 100644 index 0000000..1b6d9cd --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/threading.c @@ -0,0 +1,136 @@ +/* + * Threading abstraction layer + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_THREADING_C) + +#include "mbedtls/threading.h" + +#if defined(MBEDTLS_THREADING_PTHREAD) +static void threading_mutex_init_pthread( mbedtls_threading_mutex_t *mutex ) +{ + if( mutex == NULL ) + return; + + mutex->is_valid = pthread_mutex_init( &mutex->mutex, NULL ) == 0; +} + +static void threading_mutex_free_pthread( mbedtls_threading_mutex_t *mutex ) +{ + if( mutex == NULL ) + return; + + (void) pthread_mutex_destroy( &mutex->mutex ); +} + +static int threading_mutex_lock_pthread( mbedtls_threading_mutex_t *mutex ) +{ + if( mutex == NULL || ! mutex->is_valid ) + return( MBEDTLS_ERR_THREADING_BAD_INPUT_DATA ); + + if( pthread_mutex_lock( &mutex->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); + + return( 0 ); +} + +static int threading_mutex_unlock_pthread( mbedtls_threading_mutex_t *mutex ) +{ + if( mutex == NULL || ! mutex->is_valid ) + return( MBEDTLS_ERR_THREADING_BAD_INPUT_DATA ); + + if( pthread_mutex_unlock( &mutex->mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); + + return( 0 ); +} + +void (*mbedtls_mutex_init)( mbedtls_threading_mutex_t * ) = threading_mutex_init_pthread; +void (*mbedtls_mutex_free)( mbedtls_threading_mutex_t * ) = threading_mutex_free_pthread; +int (*mbedtls_mutex_lock)( mbedtls_threading_mutex_t * ) = threading_mutex_lock_pthread; +int (*mbedtls_mutex_unlock)( mbedtls_threading_mutex_t * ) = threading_mutex_unlock_pthread; + +/* + * With phtreads we can statically initialize mutexes + */ +#define MUTEX_INIT = { PTHREAD_MUTEX_INITIALIZER, 1 } + +#endif /* MBEDTLS_THREADING_PTHREAD */ + +#if defined(MBEDTLS_THREADING_ALT) +static int threading_mutex_fail( mbedtls_threading_mutex_t *mutex ) +{ + ((void) mutex ); + return( MBEDTLS_ERR_THREADING_BAD_INPUT_DATA ); +} +static void threading_mutex_dummy( mbedtls_threading_mutex_t *mutex ) +{ + ((void) mutex ); + return; +} + +void (*mbedtls_mutex_init)( mbedtls_threading_mutex_t * ) = threading_mutex_dummy; +void (*mbedtls_mutex_free)( mbedtls_threading_mutex_t * ) = threading_mutex_dummy; +int (*mbedtls_mutex_lock)( mbedtls_threading_mutex_t * ) = threading_mutex_fail; +int (*mbedtls_mutex_unlock)( mbedtls_threading_mutex_t * ) = threading_mutex_fail; + +/* + * Set functions pointers and initialize global mutexes + */ +void mbedtls_threading_set_alt( void (*mutex_init)( mbedtls_threading_mutex_t * ), + void (*mutex_free)( mbedtls_threading_mutex_t * ), + int (*mutex_lock)( mbedtls_threading_mutex_t * ), + int (*mutex_unlock)( mbedtls_threading_mutex_t * ) ) +{ + mbedtls_mutex_init = mutex_init; + mbedtls_mutex_free = mutex_free; + mbedtls_mutex_lock = mutex_lock; + mbedtls_mutex_unlock = mutex_unlock; + + mbedtls_mutex_init( &mbedtls_threading_readdir_mutex ); + mbedtls_mutex_init( &mbedtls_threading_gmtime_mutex ); +} + +/* + * Free global mutexes + */ +void mbedtls_threading_free_alt( void ) +{ + mbedtls_mutex_free( &mbedtls_threading_readdir_mutex ); + mbedtls_mutex_free( &mbedtls_threading_gmtime_mutex ); +} +#endif /* MBEDTLS_THREADING_ALT */ + +/* + * Define global mutexes + */ +#ifndef MUTEX_INIT +#define MUTEX_INIT +#endif +mbedtls_threading_mutex_t mbedtls_threading_readdir_mutex MUTEX_INIT; +mbedtls_threading_mutex_t mbedtls_threading_gmtime_mutex MUTEX_INIT; + +#endif /* MBEDTLS_THREADING_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/timing.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/timing.c new file mode 100644 index 0000000..5d8b25b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/timing.c @@ -0,0 +1,520 @@ +/* + * Portable interface to the CPU cycle counter + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif + +#if defined(MBEDTLS_TIMING_C) + +#include "mbedtls/timing.h" + +#if !defined(MBEDTLS_TIMING_ALT) + +#ifndef asm +#define asm __asm +#endif + +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) + +#include +#include + +struct _hr_time +{ + LARGE_INTEGER start; +}; + +#else + +#include +#include +#include +#include +#include + +struct _hr_time +{ + struct timeval start; +}; + +#endif /* _WIN32 && !EFIX64 && !EFI32 */ + +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + ( defined(_MSC_VER) && defined(_M_IX86) ) || defined(__WATCOMC__) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long tsc; + __asm rdtsc + __asm mov [tsc], eax + return( tsc ); +} +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + ( _MSC_VER && _M_IX86 ) || __WATCOMC__ */ + +/* some versions of mingw-64 have 32-bit longs even on x84_64 */ +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + defined(__GNUC__) && ( defined(__i386__) || ( \ + ( defined(__amd64__) || defined( __x86_64__) ) && __SIZEOF_LONG__ == 4 ) ) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long lo, hi; + asm volatile( "rdtsc" : "=a" (lo), "=d" (hi) ); + return( lo ); +} +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + __GNUC__ && __i386__ */ + +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + defined(__GNUC__) && ( defined(__amd64__) || defined(__x86_64__) ) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long lo, hi; + asm volatile( "rdtsc" : "=a" (lo), "=d" (hi) ); + return( lo | ( hi << 32 ) ); +} +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + __GNUC__ && ( __amd64__ || __x86_64__ ) */ + +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + defined(__GNUC__) && ( defined(__powerpc__) || defined(__ppc__) ) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long tbl, tbu0, tbu1; + + do + { + asm volatile( "mftbu %0" : "=r" (tbu0) ); + asm volatile( "mftb %0" : "=r" (tbl ) ); + asm volatile( "mftbu %0" : "=r" (tbu1) ); + } + while( tbu0 != tbu1 ); + + return( tbl ); +} +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + __GNUC__ && ( __powerpc__ || __ppc__ ) */ + +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + defined(__GNUC__) && defined(__sparc64__) + +#if defined(__OpenBSD__) +#warning OpenBSD does not allow access to tick register using software version instead +#else +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long tick; + asm volatile( "rdpr %%tick, %0;" : "=&r" (tick) ); + return( tick ); +} +#endif /* __OpenBSD__ */ +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + __GNUC__ && __sparc64__ */ + +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + defined(__GNUC__) && defined(__sparc__) && !defined(__sparc64__) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long tick; + asm volatile( ".byte 0x83, 0x41, 0x00, 0x00" ); + asm volatile( "mov %%g1, %0" : "=r" (tick) ); + return( tick ); +} +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + __GNUC__ && __sparc__ && !__sparc64__ */ + +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + defined(__GNUC__) && defined(__alpha__) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long cc; + asm volatile( "rpcc %0" : "=r" (cc) ); + return( cc & 0xFFFFFFFF ); +} +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + __GNUC__ && __alpha__ */ + +#if !defined(HAVE_HARDCLOCK) && defined(MBEDTLS_HAVE_ASM) && \ + defined(__GNUC__) && defined(__ia64__) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + unsigned long itc; + asm volatile( "mov %0 = ar.itc" : "=r" (itc) ); + return( itc ); +} +#endif /* !HAVE_HARDCLOCK && MBEDTLS_HAVE_ASM && + __GNUC__ && __ia64__ */ + +#if !defined(HAVE_HARDCLOCK) && defined(_MSC_VER) && \ + !defined(EFIX64) && !defined(EFI32) + +#define HAVE_HARDCLOCK + +unsigned long mbedtls_timing_hardclock( void ) +{ + LARGE_INTEGER offset; + + QueryPerformanceCounter( &offset ); + + return( (unsigned long)( offset.QuadPart ) ); +} +#endif /* !HAVE_HARDCLOCK && _MSC_VER && !EFIX64 && !EFI32 */ + +#if !defined(HAVE_HARDCLOCK) + +#define HAVE_HARDCLOCK + +static int hardclock_init = 0; +static struct timeval tv_init; + +unsigned long mbedtls_timing_hardclock( void ) +{ + struct timeval tv_cur; + + if( hardclock_init == 0 ) + { + gettimeofday( &tv_init, NULL ); + hardclock_init = 1; + } + + gettimeofday( &tv_cur, NULL ); + return( ( tv_cur.tv_sec - tv_init.tv_sec ) * 1000000 + + ( tv_cur.tv_usec - tv_init.tv_usec ) ); +} +#endif /* !HAVE_HARDCLOCK */ + +volatile int mbedtls_timing_alarmed = 0; + +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) + +unsigned long mbedtls_timing_get_timer( struct mbedtls_timing_hr_time *val, int reset ) +{ + unsigned long delta; + LARGE_INTEGER offset, hfreq; + struct _hr_time *t = (struct _hr_time *) val; + + QueryPerformanceCounter( &offset ); + QueryPerformanceFrequency( &hfreq ); + + delta = (unsigned long)( ( 1000 * + ( offset.QuadPart - t->start.QuadPart ) ) / + hfreq.QuadPart ); + + if( reset ) + QueryPerformanceCounter( &t->start ); + + return( delta ); +} + +/* It's OK to use a global because alarm() is supposed to be global anyway */ +static DWORD alarmMs; + +static DWORD WINAPI TimerProc( LPVOID TimerContext ) +{ + ((void) TimerContext); + Sleep( alarmMs ); + mbedtls_timing_alarmed = 1; + return( TRUE ); +} + +void mbedtls_set_alarm( int seconds ) +{ + DWORD ThreadId; + + mbedtls_timing_alarmed = 0; + alarmMs = seconds * 1000; + CloseHandle( CreateThread( NULL, 0, TimerProc, NULL, 0, &ThreadId ) ); +} + +#else /* _WIN32 && !EFIX64 && !EFI32 */ + +unsigned long mbedtls_timing_get_timer( struct mbedtls_timing_hr_time *val, int reset ) +{ + unsigned long delta; + struct timeval offset; + struct _hr_time *t = (struct _hr_time *) val; + + gettimeofday( &offset, NULL ); + + if( reset ) + { + t->start.tv_sec = offset.tv_sec; + t->start.tv_usec = offset.tv_usec; + return( 0 ); + } + + delta = ( offset.tv_sec - t->start.tv_sec ) * 1000 + + ( offset.tv_usec - t->start.tv_usec ) / 1000; + + return( delta ); +} + +static void sighandler( int signum ) +{ + mbedtls_timing_alarmed = 1; + signal( signum, sighandler ); +} + +void mbedtls_set_alarm( int seconds ) +{ + mbedtls_timing_alarmed = 0; + signal( SIGALRM, sighandler ); + alarm( seconds ); +} + +#endif /* _WIN32 && !EFIX64 && !EFI32 */ + +/* + * Set delays to watch + */ +void mbedtls_timing_set_delay( void *data, uint32_t int_ms, uint32_t fin_ms ) +{ + mbedtls_timing_delay_context *ctx = (mbedtls_timing_delay_context *) data; + + ctx->int_ms = int_ms; + ctx->fin_ms = fin_ms; + + if( fin_ms != 0 ) + (void) mbedtls_timing_get_timer( &ctx->timer, 1 ); +} + +/* + * Get number of delays expired + */ +int mbedtls_timing_get_delay( void *data ) +{ + mbedtls_timing_delay_context *ctx = (mbedtls_timing_delay_context *) data; + unsigned long elapsed_ms; + + if( ctx->fin_ms == 0 ) + return( -1 ); + + elapsed_ms = mbedtls_timing_get_timer( &ctx->timer, 0 ); + + if( elapsed_ms >= ctx->fin_ms ) + return( 2 ); + + if( elapsed_ms >= ctx->int_ms ) + return( 1 ); + + return( 0 ); +} + +#endif /* !MBEDTLS_TIMING_ALT */ + +#if defined(MBEDTLS_SELF_TEST) + +/* + * Busy-waits for the given number of milliseconds. + * Used for testing mbedtls_timing_hardclock. + */ +static void busy_msleep( unsigned long msec ) +{ + struct mbedtls_timing_hr_time hires; + unsigned long i = 0; /* for busy-waiting */ + volatile unsigned long j; /* to prevent optimisation */ + + (void) mbedtls_timing_get_timer( &hires, 1 ); + + while( mbedtls_timing_get_timer( &hires, 0 ) < msec ) + i++; + + j = i; + (void) j; +} + +#define FAIL do \ +{ \ + if( verbose != 0 ) \ + mbedtls_printf( "failed\n" ); \ + \ + return( 1 ); \ +} while( 0 ) + +/* + * Checkup routine + * + * Warning: this is work in progress, some tests may not be reliable enough + * yet! False positives may happen. + */ +int mbedtls_timing_self_test( int verbose ) +{ + unsigned long cycles, ratio; + unsigned long millisecs, secs; + int hardfail; + struct mbedtls_timing_hr_time hires; + uint32_t a, b; + mbedtls_timing_delay_context ctx; + + if( verbose != 0 ) + mbedtls_printf( " TIMING tests note: will take some time!\n" ); + + + if( verbose != 0 ) + mbedtls_printf( " TIMING test #1 (set_alarm / get_timer): " ); + + for( secs = 1; secs <= 3; secs++ ) + { + (void) mbedtls_timing_get_timer( &hires, 1 ); + + mbedtls_set_alarm( (int) secs ); + while( !mbedtls_timing_alarmed ) + ; + + millisecs = mbedtls_timing_get_timer( &hires, 0 ); + + /* For some reason on Windows it looks like alarm has an extra delay + * (maybe related to creating a new thread). Allow some room here. */ + if( millisecs < 800 * secs || millisecs > 1200 * secs + 300 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( 1 ); + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " TIMING test #2 (set/get_delay ): " ); + + for( a = 200; a <= 400; a += 200 ) + { + for( b = 200; b <= 400; b += 200 ) + { + mbedtls_timing_set_delay( &ctx, a, a + b ); + + busy_msleep( a - a / 8 ); + if( mbedtls_timing_get_delay( &ctx ) != 0 ) + FAIL; + + busy_msleep( a / 4 ); + if( mbedtls_timing_get_delay( &ctx ) != 1 ) + FAIL; + + busy_msleep( b - a / 8 - b / 8 ); + if( mbedtls_timing_get_delay( &ctx ) != 1 ) + FAIL; + + busy_msleep( b / 4 ); + if( mbedtls_timing_get_delay( &ctx ) != 2 ) + FAIL; + } + } + + mbedtls_timing_set_delay( &ctx, 0, 0 ); + busy_msleep( 200 ); + if( mbedtls_timing_get_delay( &ctx ) != -1 ) + FAIL; + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + + if( verbose != 0 ) + mbedtls_printf( " TIMING test #3 (hardclock / get_timer): " ); + + /* + * Allow one failure for possible counter wrapping. + * On a 4Ghz 32-bit machine the cycle counter wraps about once per second; + * since the whole test is about 10ms, it shouldn't happen twice in a row. + */ + hardfail = 0; + +hard_test: + if( hardfail > 1 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed (ignored)\n" ); + + goto hard_test_done; + } + + /* Get a reference ratio cycles/ms */ + millisecs = 1; + cycles = mbedtls_timing_hardclock(); + busy_msleep( millisecs ); + cycles = mbedtls_timing_hardclock() - cycles; + ratio = cycles / millisecs; + + /* Check that the ratio is mostly constant */ + for( millisecs = 2; millisecs <= 4; millisecs++ ) + { + cycles = mbedtls_timing_hardclock(); + busy_msleep( millisecs ); + cycles = mbedtls_timing_hardclock() - cycles; + + /* Allow variation up to 20% */ + if( cycles / millisecs < ratio - ratio / 5 || + cycles / millisecs > ratio + ratio / 5 ) + { + hardfail++; + goto hard_test; + } + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + +hard_test_done: + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + + return( 0 ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_TIMING_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/version.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/version.c new file mode 100644 index 0000000..6ca80d4 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/version.c @@ -0,0 +1,50 @@ +/* + * Version information + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_VERSION_C) + +#include "mbedtls/version.h" +#include + +unsigned int mbedtls_version_get_number() +{ + return( MBEDTLS_VERSION_NUMBER ); +} + +void mbedtls_version_get_string( char *string ) +{ + memcpy( string, MBEDTLS_VERSION_STRING, + sizeof( MBEDTLS_VERSION_STRING ) ); +} + +void mbedtls_version_get_string_full( char *string ) +{ + memcpy( string, MBEDTLS_VERSION_STRING_FULL, + sizeof( MBEDTLS_VERSION_STRING_FULL ) ); +} + +#endif /* MBEDTLS_VERSION_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/version_features.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/version_features.c new file mode 100644 index 0000000..1575e09 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/version_features.c @@ -0,0 +1,635 @@ +/* + * Version feature information + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_VERSION_C) + +#include "mbedtls/version.h" + +#include + +static const char *features[] = { +#if defined(MBEDTLS_VERSION_FEATURES) +#if defined(MBEDTLS_HAVE_ASM) + "MBEDTLS_HAVE_ASM", +#endif /* MBEDTLS_HAVE_ASM */ +#if defined(MBEDTLS_HAVE_SSE2) + "MBEDTLS_HAVE_SSE2", +#endif /* MBEDTLS_HAVE_SSE2 */ +#if defined(MBEDTLS_HAVE_TIME) + "MBEDTLS_HAVE_TIME", +#endif /* MBEDTLS_HAVE_TIME */ +#if defined(MBEDTLS_HAVE_TIME_DATE) + "MBEDTLS_HAVE_TIME_DATE", +#endif /* MBEDTLS_HAVE_TIME_DATE */ +#if defined(MBEDTLS_PLATFORM_MEMORY) + "MBEDTLS_PLATFORM_MEMORY", +#endif /* MBEDTLS_PLATFORM_MEMORY */ +#if defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) + "MBEDTLS_PLATFORM_NO_STD_FUNCTIONS", +#endif /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */ +#if defined(MBEDTLS_PLATFORM_EXIT_ALT) + "MBEDTLS_PLATFORM_EXIT_ALT", +#endif /* MBEDTLS_PLATFORM_EXIT_ALT */ +#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) + "MBEDTLS_PLATFORM_FPRINTF_ALT", +#endif /* MBEDTLS_PLATFORM_FPRINTF_ALT */ +#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) + "MBEDTLS_PLATFORM_PRINTF_ALT", +#endif /* MBEDTLS_PLATFORM_PRINTF_ALT */ +#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) + "MBEDTLS_PLATFORM_SNPRINTF_ALT", +#endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */ +#if defined(MBEDTLS_DEPRECATED_WARNING) + "MBEDTLS_DEPRECATED_WARNING", +#endif /* MBEDTLS_DEPRECATED_WARNING */ +#if defined(MBEDTLS_DEPRECATED_REMOVED) + "MBEDTLS_DEPRECATED_REMOVED", +#endif /* MBEDTLS_DEPRECATED_REMOVED */ +#if defined(MBEDTLS_TIMING_ALT) + "MBEDTLS_TIMING_ALT", +#endif /* MBEDTLS_TIMING_ALT */ +#if defined(MBEDTLS_AES_ALT) + "MBEDTLS_AES_ALT", +#endif /* MBEDTLS_AES_ALT */ +#if defined(MBEDTLS_ARC4_ALT) + "MBEDTLS_ARC4_ALT", +#endif /* MBEDTLS_ARC4_ALT */ +#if defined(MBEDTLS_BLOWFISH_ALT) + "MBEDTLS_BLOWFISH_ALT", +#endif /* MBEDTLS_BLOWFISH_ALT */ +#if defined(MBEDTLS_CAMELLIA_ALT) + "MBEDTLS_CAMELLIA_ALT", +#endif /* MBEDTLS_CAMELLIA_ALT */ +#if defined(MBEDTLS_DES_ALT) + "MBEDTLS_DES_ALT", +#endif /* MBEDTLS_DES_ALT */ +#if defined(MBEDTLS_XTEA_ALT) + "MBEDTLS_XTEA_ALT", +#endif /* MBEDTLS_XTEA_ALT */ +#if defined(MBEDTLS_MD2_ALT) + "MBEDTLS_MD2_ALT", +#endif /* MBEDTLS_MD2_ALT */ +#if defined(MBEDTLS_MD4_ALT) + "MBEDTLS_MD4_ALT", +#endif /* MBEDTLS_MD4_ALT */ +#if defined(MBEDTLS_MD5_ALT) + "MBEDTLS_MD5_ALT", +#endif /* MBEDTLS_MD5_ALT */ +#if defined(MBEDTLS_RIPEMD160_ALT) + "MBEDTLS_RIPEMD160_ALT", +#endif /* MBEDTLS_RIPEMD160_ALT */ +#if defined(MBEDTLS_SHA1_ALT) + "MBEDTLS_SHA1_ALT", +#endif /* MBEDTLS_SHA1_ALT */ +#if defined(MBEDTLS_SHA256_ALT) + "MBEDTLS_SHA256_ALT", +#endif /* MBEDTLS_SHA256_ALT */ +#if defined(MBEDTLS_SHA512_ALT) + "MBEDTLS_SHA512_ALT", +#endif /* MBEDTLS_SHA512_ALT */ +#if defined(MBEDTLS_MD2_PROCESS_ALT) + "MBEDTLS_MD2_PROCESS_ALT", +#endif /* MBEDTLS_MD2_PROCESS_ALT */ +#if defined(MBEDTLS_MD4_PROCESS_ALT) + "MBEDTLS_MD4_PROCESS_ALT", +#endif /* MBEDTLS_MD4_PROCESS_ALT */ +#if defined(MBEDTLS_MD5_PROCESS_ALT) + "MBEDTLS_MD5_PROCESS_ALT", +#endif /* MBEDTLS_MD5_PROCESS_ALT */ +#if defined(MBEDTLS_RIPEMD160_PROCESS_ALT) + "MBEDTLS_RIPEMD160_PROCESS_ALT", +#endif /* MBEDTLS_RIPEMD160_PROCESS_ALT */ +#if defined(MBEDTLS_SHA1_PROCESS_ALT) + "MBEDTLS_SHA1_PROCESS_ALT", +#endif /* MBEDTLS_SHA1_PROCESS_ALT */ +#if defined(MBEDTLS_SHA256_PROCESS_ALT) + "MBEDTLS_SHA256_PROCESS_ALT", +#endif /* MBEDTLS_SHA256_PROCESS_ALT */ +#if defined(MBEDTLS_SHA512_PROCESS_ALT) + "MBEDTLS_SHA512_PROCESS_ALT", +#endif /* MBEDTLS_SHA512_PROCESS_ALT */ +#if defined(MBEDTLS_DES_SETKEY_ALT) + "MBEDTLS_DES_SETKEY_ALT", +#endif /* MBEDTLS_DES_SETKEY_ALT */ +#if defined(MBEDTLS_DES_CRYPT_ECB_ALT) + "MBEDTLS_DES_CRYPT_ECB_ALT", +#endif /* MBEDTLS_DES_CRYPT_ECB_ALT */ +#if defined(MBEDTLS_DES3_CRYPT_ECB_ALT) + "MBEDTLS_DES3_CRYPT_ECB_ALT", +#endif /* MBEDTLS_DES3_CRYPT_ECB_ALT */ +#if defined(MBEDTLS_AES_SETKEY_ENC_ALT) + "MBEDTLS_AES_SETKEY_ENC_ALT", +#endif /* MBEDTLS_AES_SETKEY_ENC_ALT */ +#if defined(MBEDTLS_AES_SETKEY_DEC_ALT) + "MBEDTLS_AES_SETKEY_DEC_ALT", +#endif /* MBEDTLS_AES_SETKEY_DEC_ALT */ +#if defined(MBEDTLS_AES_ENCRYPT_ALT) + "MBEDTLS_AES_ENCRYPT_ALT", +#endif /* MBEDTLS_AES_ENCRYPT_ALT */ +#if defined(MBEDTLS_AES_DECRYPT_ALT) + "MBEDTLS_AES_DECRYPT_ALT", +#endif /* MBEDTLS_AES_DECRYPT_ALT */ +#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT) + "MBEDTLS_ENTROPY_HARDWARE_ALT", +#endif /* MBEDTLS_ENTROPY_HARDWARE_ALT */ +#if defined(MBEDTLS_AES_ROM_TABLES) + "MBEDTLS_AES_ROM_TABLES", +#endif /* MBEDTLS_AES_ROM_TABLES */ +#if defined(MBEDTLS_CAMELLIA_SMALL_MEMORY) + "MBEDTLS_CAMELLIA_SMALL_MEMORY", +#endif /* MBEDTLS_CAMELLIA_SMALL_MEMORY */ +#if defined(MBEDTLS_CIPHER_MODE_CBC) + "MBEDTLS_CIPHER_MODE_CBC", +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#if defined(MBEDTLS_CIPHER_MODE_CFB) + "MBEDTLS_CIPHER_MODE_CFB", +#endif /* MBEDTLS_CIPHER_MODE_CFB */ +#if defined(MBEDTLS_CIPHER_MODE_CTR) + "MBEDTLS_CIPHER_MODE_CTR", +#endif /* MBEDTLS_CIPHER_MODE_CTR */ +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) + "MBEDTLS_CIPHER_NULL_CIPHER", +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ +#if defined(MBEDTLS_CIPHER_PADDING_PKCS7) + "MBEDTLS_CIPHER_PADDING_PKCS7", +#endif /* MBEDTLS_CIPHER_PADDING_PKCS7 */ +#if defined(MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS) + "MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS", +#endif /* MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS */ +#if defined(MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN) + "MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN", +#endif /* MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN */ +#if defined(MBEDTLS_CIPHER_PADDING_ZEROS) + "MBEDTLS_CIPHER_PADDING_ZEROS", +#endif /* MBEDTLS_CIPHER_PADDING_ZEROS */ +#if defined(MBEDTLS_ENABLE_WEAK_CIPHERSUITES) + "MBEDTLS_ENABLE_WEAK_CIPHERSUITES", +#endif /* MBEDTLS_ENABLE_WEAK_CIPHERSUITES */ +#if defined(MBEDTLS_REMOVE_ARC4_CIPHERSUITES) + "MBEDTLS_REMOVE_ARC4_CIPHERSUITES", +#endif /* MBEDTLS_REMOVE_ARC4_CIPHERSUITES */ +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) + "MBEDTLS_ECP_DP_SECP192R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) + "MBEDTLS_ECP_DP_SECP224R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) + "MBEDTLS_ECP_DP_SECP256R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) + "MBEDTLS_ECP_DP_SECP384R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) + "MBEDTLS_ECP_DP_SECP521R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) + "MBEDTLS_ECP_DP_SECP192K1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) + "MBEDTLS_ECP_DP_SECP224K1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) + "MBEDTLS_ECP_DP_SECP256K1_ENABLED", +#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) + "MBEDTLS_ECP_DP_BP256R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) + "MBEDTLS_ECP_DP_BP384R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) + "MBEDTLS_ECP_DP_BP512R1_ENABLED", +#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */ +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) + "MBEDTLS_ECP_DP_CURVE25519_ENABLED", +#endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ +#if defined(MBEDTLS_ECP_NIST_OPTIM) + "MBEDTLS_ECP_NIST_OPTIM", +#endif /* MBEDTLS_ECP_NIST_OPTIM */ +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) + "MBEDTLS_ECDSA_DETERMINISTIC", +#endif /* MBEDTLS_ECDSA_DETERMINISTIC */ +#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) + "MBEDTLS_KEY_EXCHANGE_PSK_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) + "MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) + "MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) + "MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) + "MBEDTLS_KEY_EXCHANGE_RSA_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) + "MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) + "MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) + "MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) + "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) + "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED */ +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) + "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED", +#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */ +#if defined(MBEDTLS_PK_PARSE_EC_EXTENDED) + "MBEDTLS_PK_PARSE_EC_EXTENDED", +#endif /* MBEDTLS_PK_PARSE_EC_EXTENDED */ +#if defined(MBEDTLS_ERROR_STRERROR_DUMMY) + "MBEDTLS_ERROR_STRERROR_DUMMY", +#endif /* MBEDTLS_ERROR_STRERROR_DUMMY */ +#if defined(MBEDTLS_GENPRIME) + "MBEDTLS_GENPRIME", +#endif /* MBEDTLS_GENPRIME */ +#if defined(MBEDTLS_FS_IO) + "MBEDTLS_FS_IO", +#endif /* MBEDTLS_FS_IO */ +#if defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES) + "MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES", +#endif /* MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES */ +#if defined(MBEDTLS_NO_PLATFORM_ENTROPY) + "MBEDTLS_NO_PLATFORM_ENTROPY", +#endif /* MBEDTLS_NO_PLATFORM_ENTROPY */ +#if defined(MBEDTLS_ENTROPY_FORCE_SHA256) + "MBEDTLS_ENTROPY_FORCE_SHA256", +#endif /* MBEDTLS_ENTROPY_FORCE_SHA256 */ +#if defined(MBEDTLS_MEMORY_DEBUG) + "MBEDTLS_MEMORY_DEBUG", +#endif /* MBEDTLS_MEMORY_DEBUG */ +#if defined(MBEDTLS_MEMORY_BACKTRACE) + "MBEDTLS_MEMORY_BACKTRACE", +#endif /* MBEDTLS_MEMORY_BACKTRACE */ +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) + "MBEDTLS_PK_RSA_ALT_SUPPORT", +#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */ +#if defined(MBEDTLS_PKCS1_V15) + "MBEDTLS_PKCS1_V15", +#endif /* MBEDTLS_PKCS1_V15 */ +#if defined(MBEDTLS_PKCS1_V21) + "MBEDTLS_PKCS1_V21", +#endif /* MBEDTLS_PKCS1_V21 */ +#if defined(MBEDTLS_RSA_NO_CRT) + "MBEDTLS_RSA_NO_CRT", +#endif /* MBEDTLS_RSA_NO_CRT */ +#if defined(MBEDTLS_SELF_TEST) + "MBEDTLS_SELF_TEST", +#endif /* MBEDTLS_SELF_TEST */ +#if defined(MBEDTLS_SHA256_SMALLER) + "MBEDTLS_SHA256_SMALLER", +#endif /* MBEDTLS_SHA256_SMALLER */ +#if defined(MBEDTLS_SSL_AEAD_RANDOM_IV) + "MBEDTLS_SSL_AEAD_RANDOM_IV", +#endif /* MBEDTLS_SSL_AEAD_RANDOM_IV */ +#if defined(MBEDTLS_SSL_ALL_ALERT_MESSAGES) + "MBEDTLS_SSL_ALL_ALERT_MESSAGES", +#endif /* MBEDTLS_SSL_ALL_ALERT_MESSAGES */ +#if defined(MBEDTLS_SSL_DEBUG_ALL) + "MBEDTLS_SSL_DEBUG_ALL", +#endif /* MBEDTLS_SSL_DEBUG_ALL */ +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) + "MBEDTLS_SSL_ENCRYPT_THEN_MAC", +#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */ +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) + "MBEDTLS_SSL_EXTENDED_MASTER_SECRET", +#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */ +#if defined(MBEDTLS_SSL_FALLBACK_SCSV) + "MBEDTLS_SSL_FALLBACK_SCSV", +#endif /* MBEDTLS_SSL_FALLBACK_SCSV */ +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) + "MBEDTLS_SSL_HW_RECORD_ACCEL", +#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */ +#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) + "MBEDTLS_SSL_CBC_RECORD_SPLITTING", +#endif /* MBEDTLS_SSL_CBC_RECORD_SPLITTING */ +#if defined(MBEDTLS_SSL_RENEGOTIATION) + "MBEDTLS_SSL_RENEGOTIATION", +#endif /* MBEDTLS_SSL_RENEGOTIATION */ +#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO) + "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO", +#endif /* MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO */ +#if defined(MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE) + "MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE", +#endif /* MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE */ +#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) + "MBEDTLS_SSL_MAX_FRAGMENT_LENGTH", +#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */ +#if defined(MBEDTLS_SSL_PROTO_SSL3) + "MBEDTLS_SSL_PROTO_SSL3", +#endif /* MBEDTLS_SSL_PROTO_SSL3 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1) + "MBEDTLS_SSL_PROTO_TLS1", +#endif /* MBEDTLS_SSL_PROTO_TLS1 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) + "MBEDTLS_SSL_PROTO_TLS1_1", +#endif /* MBEDTLS_SSL_PROTO_TLS1_1 */ +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) + "MBEDTLS_SSL_PROTO_TLS1_2", +#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */ +#if defined(MBEDTLS_SSL_PROTO_DTLS) + "MBEDTLS_SSL_PROTO_DTLS", +#endif /* MBEDTLS_SSL_PROTO_DTLS */ +#if defined(MBEDTLS_SSL_ALPN) + "MBEDTLS_SSL_ALPN", +#endif /* MBEDTLS_SSL_ALPN */ +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) + "MBEDTLS_SSL_DTLS_ANTI_REPLAY", +#endif /* MBEDTLS_SSL_DTLS_ANTI_REPLAY */ +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) + "MBEDTLS_SSL_DTLS_HELLO_VERIFY", +#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY */ +#if defined(MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE) + "MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE", +#endif /* MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE */ +#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) + "MBEDTLS_SSL_DTLS_BADMAC_LIMIT", +#endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */ +#if defined(MBEDTLS_SSL_SESSION_TICKETS) + "MBEDTLS_SSL_SESSION_TICKETS", +#endif /* MBEDTLS_SSL_SESSION_TICKETS */ +#if defined(MBEDTLS_SSL_EXPORT_KEYS) + "MBEDTLS_SSL_EXPORT_KEYS", +#endif /* MBEDTLS_SSL_EXPORT_KEYS */ +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) + "MBEDTLS_SSL_SERVER_NAME_INDICATION", +#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */ +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) + "MBEDTLS_SSL_TRUNCATED_HMAC", +#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */ +#if defined(MBEDTLS_THREADING_ALT) + "MBEDTLS_THREADING_ALT", +#endif /* MBEDTLS_THREADING_ALT */ +#if defined(MBEDTLS_THREADING_PTHREAD) + "MBEDTLS_THREADING_PTHREAD", +#endif /* MBEDTLS_THREADING_PTHREAD */ +#if defined(MBEDTLS_VERSION_FEATURES) + "MBEDTLS_VERSION_FEATURES", +#endif /* MBEDTLS_VERSION_FEATURES */ +#if defined(MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3) + "MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3", +#endif /* MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 */ +#if defined(MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION) + "MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION", +#endif /* MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION */ +#if defined(MBEDTLS_X509_CHECK_KEY_USAGE) + "MBEDTLS_X509_CHECK_KEY_USAGE", +#endif /* MBEDTLS_X509_CHECK_KEY_USAGE */ +#if defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) + "MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE", +#endif /* MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE */ +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) + "MBEDTLS_X509_RSASSA_PSS_SUPPORT", +#endif /* MBEDTLS_X509_RSASSA_PSS_SUPPORT */ +#if defined(MBEDTLS_ZLIB_SUPPORT) + "MBEDTLS_ZLIB_SUPPORT", +#endif /* MBEDTLS_ZLIB_SUPPORT */ +#if defined(MBEDTLS_AESNI_C) + "MBEDTLS_AESNI_C", +#endif /* MBEDTLS_AESNI_C */ +#if defined(MBEDTLS_AES_C) + "MBEDTLS_AES_C", +#endif /* MBEDTLS_AES_C */ +#if defined(MBEDTLS_ARC4_C) + "MBEDTLS_ARC4_C", +#endif /* MBEDTLS_ARC4_C */ +#if defined(MBEDTLS_ASN1_PARSE_C) + "MBEDTLS_ASN1_PARSE_C", +#endif /* MBEDTLS_ASN1_PARSE_C */ +#if defined(MBEDTLS_ASN1_WRITE_C) + "MBEDTLS_ASN1_WRITE_C", +#endif /* MBEDTLS_ASN1_WRITE_C */ +#if defined(MBEDTLS_BASE64_C) + "MBEDTLS_BASE64_C", +#endif /* MBEDTLS_BASE64_C */ +#if defined(MBEDTLS_BIGNUM_C) + "MBEDTLS_BIGNUM_C", +#endif /* MBEDTLS_BIGNUM_C */ +#if defined(MBEDTLS_BLOWFISH_C) + "MBEDTLS_BLOWFISH_C", +#endif /* MBEDTLS_BLOWFISH_C */ +#if defined(MBEDTLS_CAMELLIA_C) + "MBEDTLS_CAMELLIA_C", +#endif /* MBEDTLS_CAMELLIA_C */ +#if defined(MBEDTLS_CCM_C) + "MBEDTLS_CCM_C", +#endif /* MBEDTLS_CCM_C */ +#if defined(MBEDTLS_CERTS_C) + "MBEDTLS_CERTS_C", +#endif /* MBEDTLS_CERTS_C */ +#if defined(MBEDTLS_CIPHER_C) + "MBEDTLS_CIPHER_C", +#endif /* MBEDTLS_CIPHER_C */ +#if defined(MBEDTLS_CTR_DRBG_C) + "MBEDTLS_CTR_DRBG_C", +#endif /* MBEDTLS_CTR_DRBG_C */ +#if defined(MBEDTLS_DEBUG_C) + "MBEDTLS_DEBUG_C", +#endif /* MBEDTLS_DEBUG_C */ +#if defined(MBEDTLS_DES_C) + "MBEDTLS_DES_C", +#endif /* MBEDTLS_DES_C */ +#if defined(MBEDTLS_DHM_C) + "MBEDTLS_DHM_C", +#endif /* MBEDTLS_DHM_C */ +#if defined(MBEDTLS_ECDH_C) + "MBEDTLS_ECDH_C", +#endif /* MBEDTLS_ECDH_C */ +#if defined(MBEDTLS_ECDSA_C) + "MBEDTLS_ECDSA_C", +#endif /* MBEDTLS_ECDSA_C */ +#if defined(MBEDTLS_ECJPAKE_C) + "MBEDTLS_ECJPAKE_C", +#endif /* MBEDTLS_ECJPAKE_C */ +#if defined(MBEDTLS_ECP_C) + "MBEDTLS_ECP_C", +#endif /* MBEDTLS_ECP_C */ +#if defined(MBEDTLS_ENTROPY_C) + "MBEDTLS_ENTROPY_C", +#endif /* MBEDTLS_ENTROPY_C */ +#if defined(MBEDTLS_ERROR_C) + "MBEDTLS_ERROR_C", +#endif /* MBEDTLS_ERROR_C */ +#if defined(MBEDTLS_GCM_C) + "MBEDTLS_GCM_C", +#endif /* MBEDTLS_GCM_C */ +#if defined(MBEDTLS_HAVEGE_C) + "MBEDTLS_HAVEGE_C", +#endif /* MBEDTLS_HAVEGE_C */ +#if defined(MBEDTLS_HMAC_DRBG_C) + "MBEDTLS_HMAC_DRBG_C", +#endif /* MBEDTLS_HMAC_DRBG_C */ +#if defined(MBEDTLS_MD_C) + "MBEDTLS_MD_C", +#endif /* MBEDTLS_MD_C */ +#if defined(MBEDTLS_MD2_C) + "MBEDTLS_MD2_C", +#endif /* MBEDTLS_MD2_C */ +#if defined(MBEDTLS_MD4_C) + "MBEDTLS_MD4_C", +#endif /* MBEDTLS_MD4_C */ +#if defined(MBEDTLS_MD5_C) + "MBEDTLS_MD5_C", +#endif /* MBEDTLS_MD5_C */ +#if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) + "MBEDTLS_MEMORY_BUFFER_ALLOC_C", +#endif /* MBEDTLS_MEMORY_BUFFER_ALLOC_C */ +#if defined(MBEDTLS_NET_C) + "MBEDTLS_NET_C", +#endif /* MBEDTLS_NET_C */ +#if defined(MBEDTLS_OID_C) + "MBEDTLS_OID_C", +#endif /* MBEDTLS_OID_C */ +#if defined(MBEDTLS_PADLOCK_C) + "MBEDTLS_PADLOCK_C", +#endif /* MBEDTLS_PADLOCK_C */ +#if defined(MBEDTLS_PEM_PARSE_C) + "MBEDTLS_PEM_PARSE_C", +#endif /* MBEDTLS_PEM_PARSE_C */ +#if defined(MBEDTLS_PEM_WRITE_C) + "MBEDTLS_PEM_WRITE_C", +#endif /* MBEDTLS_PEM_WRITE_C */ +#if defined(MBEDTLS_PK_C) + "MBEDTLS_PK_C", +#endif /* MBEDTLS_PK_C */ +#if defined(MBEDTLS_PK_PARSE_C) + "MBEDTLS_PK_PARSE_C", +#endif /* MBEDTLS_PK_PARSE_C */ +#if defined(MBEDTLS_PK_WRITE_C) + "MBEDTLS_PK_WRITE_C", +#endif /* MBEDTLS_PK_WRITE_C */ +#if defined(MBEDTLS_PKCS5_C) + "MBEDTLS_PKCS5_C", +#endif /* MBEDTLS_PKCS5_C */ +#if defined(MBEDTLS_PKCS11_C) + "MBEDTLS_PKCS11_C", +#endif /* MBEDTLS_PKCS11_C */ +#if defined(MBEDTLS_PKCS12_C) + "MBEDTLS_PKCS12_C", +#endif /* MBEDTLS_PKCS12_C */ +#if defined(MBEDTLS_PLATFORM_C) + "MBEDTLS_PLATFORM_C", +#endif /* MBEDTLS_PLATFORM_C */ +#if defined(MBEDTLS_RIPEMD160_C) + "MBEDTLS_RIPEMD160_C", +#endif /* MBEDTLS_RIPEMD160_C */ +#if defined(MBEDTLS_RSA_C) + "MBEDTLS_RSA_C", +#endif /* MBEDTLS_RSA_C */ +#if defined(MBEDTLS_SHA1_C) + "MBEDTLS_SHA1_C", +#endif /* MBEDTLS_SHA1_C */ +#if defined(MBEDTLS_SHA256_C) + "MBEDTLS_SHA256_C", +#endif /* MBEDTLS_SHA256_C */ +#if defined(MBEDTLS_SHA512_C) + "MBEDTLS_SHA512_C", +#endif /* MBEDTLS_SHA512_C */ +#if defined(MBEDTLS_SSL_CACHE_C) + "MBEDTLS_SSL_CACHE_C", +#endif /* MBEDTLS_SSL_CACHE_C */ +#if defined(MBEDTLS_SSL_COOKIE_C) + "MBEDTLS_SSL_COOKIE_C", +#endif /* MBEDTLS_SSL_COOKIE_C */ +#if defined(MBEDTLS_SSL_TICKET_C) + "MBEDTLS_SSL_TICKET_C", +#endif /* MBEDTLS_SSL_TICKET_C */ +#if defined(MBEDTLS_SSL_CLI_C) + "MBEDTLS_SSL_CLI_C", +#endif /* MBEDTLS_SSL_CLI_C */ +#if defined(MBEDTLS_SSL_SRV_C) + "MBEDTLS_SSL_SRV_C", +#endif /* MBEDTLS_SSL_SRV_C */ +#if defined(MBEDTLS_SSL_TLS_C) + "MBEDTLS_SSL_TLS_C", +#endif /* MBEDTLS_SSL_TLS_C */ +#if defined(MBEDTLS_THREADING_C) + "MBEDTLS_THREADING_C", +#endif /* MBEDTLS_THREADING_C */ +#if defined(MBEDTLS_TIMING_C) + "MBEDTLS_TIMING_C", +#endif /* MBEDTLS_TIMING_C */ +#if defined(MBEDTLS_VERSION_C) + "MBEDTLS_VERSION_C", +#endif /* MBEDTLS_VERSION_C */ +#if defined(MBEDTLS_X509_USE_C) + "MBEDTLS_X509_USE_C", +#endif /* MBEDTLS_X509_USE_C */ +#if defined(MBEDTLS_X509_CRT_PARSE_C) + "MBEDTLS_X509_CRT_PARSE_C", +#endif /* MBEDTLS_X509_CRT_PARSE_C */ +#if defined(MBEDTLS_X509_CRL_PARSE_C) + "MBEDTLS_X509_CRL_PARSE_C", +#endif /* MBEDTLS_X509_CRL_PARSE_C */ +#if defined(MBEDTLS_X509_CSR_PARSE_C) + "MBEDTLS_X509_CSR_PARSE_C", +#endif /* MBEDTLS_X509_CSR_PARSE_C */ +#if defined(MBEDTLS_X509_CREATE_C) + "MBEDTLS_X509_CREATE_C", +#endif /* MBEDTLS_X509_CREATE_C */ +#if defined(MBEDTLS_X509_CRT_WRITE_C) + "MBEDTLS_X509_CRT_WRITE_C", +#endif /* MBEDTLS_X509_CRT_WRITE_C */ +#if defined(MBEDTLS_X509_CSR_WRITE_C) + "MBEDTLS_X509_CSR_WRITE_C", +#endif /* MBEDTLS_X509_CSR_WRITE_C */ +#if defined(MBEDTLS_XTEA_C) + "MBEDTLS_XTEA_C", +#endif /* MBEDTLS_XTEA_C */ +#endif /* MBEDTLS_VERSION_FEATURES */ + NULL +}; + +int mbedtls_version_check_feature( const char *feature ) +{ + const char **idx = features; + + if( *idx == NULL ) + return( -2 ); + + if( feature == NULL ) + return( -1 ); + + while( *idx != NULL ) + { + if( !strcmp( *idx, feature ) ) + return( 0 ); + idx++; + } + return( -1 ); +} + +#endif /* MBEDTLS_VERSION_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509.c new file mode 100755 index 0000000..f2409d5 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509.c @@ -0,0 +1,1029 @@ +/* + * X.509 common functions for parsing and verification + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The ITU-T X.509 standard defines a certificate format for PKI. + * + * http://www.ietf.org/rfc/rfc5280.txt (Certificates and CRLs) + * http://www.ietf.org/rfc/rfc3279.txt (Alg IDs for CRLs) + * http://www.ietf.org/rfc/rfc2986.txt (CSRs, aka PKCS#10) + * + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.680-0207.pdf + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.690-0207.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_X509_USE_C) + +#include "mbedtls/x509.h" +#include "mbedtls/asn1.h" +#include "mbedtls/oid.h" + +#include +#include + +#if defined(MBEDTLS_PEM_PARSE_C) +#include "mbedtls/pem.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#include +#define mbedtls_free free +#define mbedtls_calloc calloc +#define mbedtls_printf printf +#define mbedtls_snprintf snprintf +#endif + +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) +#include +#else +#include +#endif + +#if defined(MBEDTLS_FS_IO) +#include +#if !defined(_WIN32) +#include +#include +#include +#endif +#endif + +#define CHECK(code) if( ( ret = code ) != 0 ){ return( ret ); } + +/* + * CertificateSerialNumber ::= INTEGER + */ +int mbedtls_x509_get_serial( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *serial ) +{ + int ret; + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_X509_INVALID_SERIAL + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + if( **p != ( MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_PRIMITIVE | 2 ) && + **p != MBEDTLS_ASN1_INTEGER ) + return( MBEDTLS_ERR_X509_INVALID_SERIAL + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + serial->tag = *(*p)++; + + if( ( ret = mbedtls_asn1_get_len( p, end, &serial->len ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_SERIAL + ret ); + + serial->p = *p; + *p += serial->len; + + return( 0 ); +} + +/* Get an algorithm identifier without parameters (eg for signatures) + * + * AlgorithmIdentifier ::= SEQUENCE { + * algorithm OBJECT IDENTIFIER, + * parameters ANY DEFINED BY algorithm OPTIONAL } + */ +int mbedtls_x509_get_alg_null( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *alg ) +{ + int ret; + + if( ( ret = mbedtls_asn1_get_alg_null( p, end, alg ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + return( 0 ); +} + +/* + * Parse an algorithm identifier with (optional) paramaters + */ +int mbedtls_x509_get_alg( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *alg, mbedtls_x509_buf *params ) +{ + int ret; + + if( ( ret = mbedtls_asn1_get_alg( p, end, alg, params ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + return( 0 ); +} + +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) +/* + * HashAlgorithm ::= AlgorithmIdentifier + * + * AlgorithmIdentifier ::= SEQUENCE { + * algorithm OBJECT IDENTIFIER, + * parameters ANY DEFINED BY algorithm OPTIONAL } + * + * For HashAlgorithm, parameters MUST be NULL or absent. + */ +static int x509_get_hash_alg( const mbedtls_x509_buf *alg, mbedtls_md_type_t *md_alg ) +{ + int ret; + unsigned char *p; + const unsigned char *end; + mbedtls_x509_buf md_oid; + size_t len; + + /* Make sure we got a SEQUENCE and setup bounds */ + if( alg->tag != ( MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + p = (unsigned char *) alg->p; + end = p + alg->len; + + if( p >= end ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + /* Parse md_oid */ + md_oid.tag = *p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &md_oid.len, MBEDTLS_ASN1_OID ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + md_oid.p = p; + p += md_oid.len; + + /* Get md_alg from md_oid */ + if( ( ret = mbedtls_oid_get_md_alg( &md_oid, md_alg ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + /* Make sure params is absent of NULL */ + if( p == end ) + return( 0 ); + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, MBEDTLS_ASN1_NULL ) ) != 0 || len != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p != end ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * RSASSA-PSS-params ::= SEQUENCE { + * hashAlgorithm [0] HashAlgorithm DEFAULT sha1Identifier, + * maskGenAlgorithm [1] MaskGenAlgorithm DEFAULT mgf1SHA1Identifier, + * saltLength [2] INTEGER DEFAULT 20, + * trailerField [3] INTEGER DEFAULT 1 } + * -- Note that the tags in this Sequence are explicit. + * + * RFC 4055 (which defines use of RSASSA-PSS in PKIX) states that the value + * of trailerField MUST be 1, and PKCS#1 v2.2 doesn't even define any other + * option. Enfore this at parsing time. + */ +int mbedtls_x509_get_rsassa_pss_params( const mbedtls_x509_buf *params, + mbedtls_md_type_t *md_alg, mbedtls_md_type_t *mgf_md, + int *salt_len ) +{ + int ret; + unsigned char *p; + const unsigned char *end, *end2; + size_t len; + mbedtls_x509_buf alg_id, alg_params; + + /* First set everything to defaults */ + *md_alg = MBEDTLS_MD_SHA1; + *mgf_md = MBEDTLS_MD_SHA1; + *salt_len = 20; + + /* Make sure params is a SEQUENCE and setup bounds */ + if( params->tag != ( MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + p = (unsigned char *) params->p; + end = p + params->len; + + if( p == end ) + return( 0 ); + + /* + * HashAlgorithm + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 0 ) ) == 0 ) + { + end2 = p + len; + + /* HashAlgorithm ::= AlgorithmIdentifier (without parameters) */ + if( ( ret = mbedtls_x509_get_alg_null( &p, end2, &alg_id ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_oid_get_md_alg( &alg_id, md_alg ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p != end2 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + else if( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p == end ) + return( 0 ); + + /* + * MaskGenAlgorithm + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 1 ) ) == 0 ) + { + end2 = p + len; + + /* MaskGenAlgorithm ::= AlgorithmIdentifier (params = HashAlgorithm) */ + if( ( ret = mbedtls_x509_get_alg( &p, end2, &alg_id, &alg_params ) ) != 0 ) + return( ret ); + + /* Only MFG1 is recognised for now */ + if( MBEDTLS_OID_CMP( MBEDTLS_OID_MGF1, &alg_id ) != 0 ) + return( MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE + + MBEDTLS_ERR_OID_NOT_FOUND ); + + /* Parse HashAlgorithm */ + if( ( ret = x509_get_hash_alg( &alg_params, mgf_md ) ) != 0 ) + return( ret ); + + if( p != end2 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + else if( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p == end ) + return( 0 ); + + /* + * salt_len + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 2 ) ) == 0 ) + { + end2 = p + len; + + if( ( ret = mbedtls_asn1_get_int( &p, end2, salt_len ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p != end2 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + else if( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p == end ) + return( 0 ); + + /* + * trailer_field (if present, must be 1) + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 3 ) ) == 0 ) + { + int trailer_field; + + end2 = p + len; + + if( ( ret = mbedtls_asn1_get_int( &p, end2, &trailer_field ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p != end2 ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + if( trailer_field != 1 ) + return( MBEDTLS_ERR_X509_INVALID_ALG ); + } + else if( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( MBEDTLS_ERR_X509_INVALID_ALG + ret ); + + if( p != end ) + return( MBEDTLS_ERR_X509_INVALID_ALG + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} +#endif /* MBEDTLS_X509_RSASSA_PSS_SUPPORT */ + +/* + * AttributeTypeAndValue ::= SEQUENCE { + * type AttributeType, + * value AttributeValue } + * + * AttributeType ::= OBJECT IDENTIFIER + * + * AttributeValue ::= ANY DEFINED BY AttributeType + */ +static int x509_get_attr_type_value( unsigned char **p, + const unsigned char *end, + mbedtls_x509_name *cur ) +{ + int ret; + size_t len; + mbedtls_x509_buf *oid; + mbedtls_x509_buf *val; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_NAME + ret ); + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_X509_INVALID_NAME + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + oid = &cur->oid; + oid->tag = **p; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &oid->len, MBEDTLS_ASN1_OID ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_NAME + ret ); + + oid->p = *p; + *p += oid->len; + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_X509_INVALID_NAME + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + if( **p != MBEDTLS_ASN1_BMP_STRING && **p != MBEDTLS_ASN1_UTF8_STRING && + **p != MBEDTLS_ASN1_T61_STRING && **p != MBEDTLS_ASN1_PRINTABLE_STRING && + **p != MBEDTLS_ASN1_IA5_STRING && **p != MBEDTLS_ASN1_UNIVERSAL_STRING && + **p != MBEDTLS_ASN1_BIT_STRING ) + return( MBEDTLS_ERR_X509_INVALID_NAME + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + val = &cur->val; + val->tag = *(*p)++; + + if( ( ret = mbedtls_asn1_get_len( p, end, &val->len ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_NAME + ret ); + + val->p = *p; + *p += val->len; + + cur->next = NULL; + + return( 0 ); +} + +/* + * Name ::= CHOICE { -- only one possibility for now -- + * rdnSequence RDNSequence } + * + * RDNSequence ::= SEQUENCE OF RelativeDistinguishedName + * + * RelativeDistinguishedName ::= + * SET OF AttributeTypeAndValue + * + * AttributeTypeAndValue ::= SEQUENCE { + * type AttributeType, + * value AttributeValue } + * + * AttributeType ::= OBJECT IDENTIFIER + * + * AttributeValue ::= ANY DEFINED BY AttributeType + * + * The data structure is optimized for the common case where each RDN has only + * one element, which is represented as a list of AttributeTypeAndValue. + * For the general case we still use a flat list, but we mark elements of the + * same set so that they are "merged" together in the functions that consume + * this list, eg mbedtls_x509_dn_gets(). + */ +int mbedtls_x509_get_name( unsigned char **p, const unsigned char *end, + mbedtls_x509_name *cur ) +{ + int ret; + size_t set_len; + const unsigned char *end_set; + + /* don't use recursion, we'd risk stack overflow if not optimized */ + while( 1 ) + { + /* + * parse SET + */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &set_len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SET ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_NAME + ret ); + + end_set = *p + set_len; + + while( 1 ) + { + if( ( ret = x509_get_attr_type_value( p, end_set, cur ) ) != 0 ) + return( ret ); + + if( *p == end_set ) + break; + + /* Mark this item as being no the only one in a set */ + cur->next_merged = 1; + + cur->next = mbedtls_calloc( 1, sizeof( mbedtls_x509_name ) ); + + if( cur->next == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + cur = cur->next; + } + + /* + * continue until end of SEQUENCE is reached + */ + if( *p == end ) + return( 0 ); + + cur->next = mbedtls_calloc( 1, sizeof( mbedtls_x509_name ) ); + + if( cur->next == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + cur = cur->next; + } +} + +static int x509_parse_int(unsigned char **p, unsigned n, int *res){ + *res = 0; + for( ; n > 0; --n ){ + if( ( **p < '0') || ( **p > '9' ) ) return MBEDTLS_ERR_X509_INVALID_DATE; + *res *= 10; + *res += (*(*p)++ - '0'); + } + return 0; +} + +/* + * Time ::= CHOICE { + * utcTime UTCTime, + * generalTime GeneralizedTime } + */ +int mbedtls_x509_get_time( unsigned char **p, const unsigned char *end, + mbedtls_x509_time *time ) +{ + int ret; + size_t len; + unsigned char tag; + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_X509_INVALID_DATE + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + tag = **p; + + if( tag == MBEDTLS_ASN1_UTC_TIME ) + { + (*p)++; + ret = mbedtls_asn1_get_len( p, end, &len ); + + if( ret != 0 ) + return( MBEDTLS_ERR_X509_INVALID_DATE + ret ); + + CHECK( x509_parse_int( p, 2, &time->year ) ); + CHECK( x509_parse_int( p, 2, &time->mon ) ); + CHECK( x509_parse_int( p, 2, &time->day ) ); + CHECK( x509_parse_int( p, 2, &time->hour ) ); + CHECK( x509_parse_int( p, 2, &time->min ) ); + if( len > 10 ) + CHECK( x509_parse_int( p, 2, &time->sec ) ); + if( len > 12 && *(*p)++ != 'Z' ) + return( MBEDTLS_ERR_X509_INVALID_DATE ); + + time->year += 100 * ( time->year < 50 ); + time->year += 1900; + + return( 0 ); + } + else if( tag == MBEDTLS_ASN1_GENERALIZED_TIME ) + { + (*p)++; + ret = mbedtls_asn1_get_len( p, end, &len ); + + if( ret != 0 ) + return( MBEDTLS_ERR_X509_INVALID_DATE + ret ); + + CHECK( x509_parse_int( p, 4, &time->year ) ); + CHECK( x509_parse_int( p, 2, &time->mon ) ); + CHECK( x509_parse_int( p, 2, &time->day ) ); + CHECK( x509_parse_int( p, 2, &time->hour ) ); + CHECK( x509_parse_int( p, 2, &time->min ) ); + if( len > 12 ) + CHECK( x509_parse_int( p, 2, &time->sec ) ); + if( len > 14 && *(*p)++ != 'Z' ) + return( MBEDTLS_ERR_X509_INVALID_DATE ); + + return( 0 ); + } + else + return( MBEDTLS_ERR_X509_INVALID_DATE + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); +} + +int mbedtls_x509_get_sig( unsigned char **p, const unsigned char *end, mbedtls_x509_buf *sig ) +{ + int ret; + size_t len; + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_X509_INVALID_SIGNATURE + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + sig->tag = **p; + + if( ( ret = mbedtls_asn1_get_bitstring_null( p, end, &len ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_SIGNATURE + ret ); + + sig->len = len; + sig->p = *p; + + *p += len; + + return( 0 ); +} + +/* + * Get signature algorithm from alg OID and optional parameters + */ +int mbedtls_x509_get_sig_alg( const mbedtls_x509_buf *sig_oid, const mbedtls_x509_buf *sig_params, + mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg, + void **sig_opts ) +{ + int ret; + + if( *sig_opts != NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + if( ( ret = mbedtls_oid_get_sig_alg( sig_oid, md_alg, pk_alg ) ) != 0 ) + return( MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG + ret ); + +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) + if( *pk_alg == MBEDTLS_PK_RSASSA_PSS ) + { + mbedtls_pk_rsassa_pss_options *pss_opts; + + pss_opts = mbedtls_calloc( 1, sizeof( mbedtls_pk_rsassa_pss_options ) ); + if( pss_opts == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + ret = mbedtls_x509_get_rsassa_pss_params( sig_params, + md_alg, + &pss_opts->mgf1_hash_id, + &pss_opts->expected_salt_len ); + if( ret != 0 ) + { + mbedtls_free( pss_opts ); + return( ret ); + } + + *sig_opts = (void *) pss_opts; + } + else +#endif /* MBEDTLS_X509_RSASSA_PSS_SUPPORT */ + { + /* Make sure parameters are absent or NULL */ + if( ( sig_params->tag != MBEDTLS_ASN1_NULL && sig_params->tag != 0 ) || + sig_params->len != 0 ) + return( MBEDTLS_ERR_X509_INVALID_ALG ); + } + + return( 0 ); +} + +/* + * X.509 Extensions (No parsing of extensions, pointer should + * be either manually updated or extensions should be parsed! + */ +int mbedtls_x509_get_ext( unsigned char **p, const unsigned char *end, + mbedtls_x509_buf *ext, int tag ) +{ + int ret; + size_t len; + + if( *p == end ) + return( 0 ); + + ext->tag = **p; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &ext->len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | tag ) ) != 0 ) + return( ret ); + + ext->p = *p; + end = *p + ext->len; + + /* + * Extensions ::= SEQUENCE SIZE (1..MAX) OF Extension + * + * Extension ::= SEQUENCE { + * extnID OBJECT IDENTIFIER, + * critical BOOLEAN DEFAULT FALSE, + * extnValue OCTET STRING } + */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( end != *p + len ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * Store the name in printable form into buf; no more + * than size characters will be written + */ +int mbedtls_x509_dn_gets( char *buf, size_t size, const mbedtls_x509_name *dn ) +{ + int ret; + size_t i, n; + unsigned char c, merge = 0; + const mbedtls_x509_name *name; + const char *short_name = NULL; + char s[MBEDTLS_X509_MAX_DN_NAME_SIZE], *p; + + memset( s, 0, sizeof( s ) ); + + name = dn; + p = buf; + n = size; + + while( name != NULL ) + { + if( !name->oid.p ) + { + name = name->next; + continue; + } + + if( name != dn ) + { + // ret = mbedtls_snprintf( p, n, merge ? " + " : ", " ); + if (merge) { + ret = mbedtls_snprintf( p, n, " + "); + } else { + ret = mbedtls_snprintf( p, n, ", "); + } + MBEDTLS_X509_SAFE_SNPRINTF; + } + + ret = mbedtls_oid_get_attr_short_name( &name->oid, &short_name ); + + if( ret == 0 ) + ret = mbedtls_snprintf( p, n, "%s=", short_name ); + else + ret = mbedtls_snprintf( p, n, "\?\?=" ); + MBEDTLS_X509_SAFE_SNPRINTF; + + for( i = 0; i < name->val.len; i++ ) + { + if( i >= sizeof( s ) - 1 ) + break; + + c = name->val.p[i]; + if( c < 32 || c == 127 || ( c > 128 && c < 160 ) ) + s[i] = '?'; + else s[i] = c; + } + s[i] = '\0'; + ret = mbedtls_snprintf( p, n, "%s", s ); + MBEDTLS_X509_SAFE_SNPRINTF; + + merge = name->next_merged; + name = name->next; + } + + return( (int) ( size - n ) ); +} + +/* + * Store the serial in printable form into buf; no more + * than size characters will be written + */ +int mbedtls_x509_serial_gets( char *buf, size_t size, const mbedtls_x509_buf *serial ) +{ + int ret; + size_t i, n, nr; + char *p; + + p = buf; + n = size; + + nr = ( serial->len <= 32 ) + ? serial->len : 28; + + for( i = 0; i < nr; i++ ) + { + if( i == 0 && nr > 1 && serial->p[i] == 0x0 ) + continue; + + ret = mbedtls_snprintf( p, n, "%02X%s", + serial->p[i], ( i < nr - 1 ) ? ":" : "" ); + MBEDTLS_X509_SAFE_SNPRINTF; + } + + if( nr != serial->len ) + { + ret = mbedtls_snprintf( p, n, "...." ); + MBEDTLS_X509_SAFE_SNPRINTF; + } + + return( (int) ( size - n ) ); +} + +/* + * Helper for writing signature algorithms + */ +int mbedtls_x509_sig_alg_gets( char *buf, size_t size, const mbedtls_x509_buf *sig_oid, + mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg, + const void *sig_opts ) +{ + int ret; + char *p = buf; + size_t n = size; + const char *desc = NULL; + + ret = mbedtls_oid_get_sig_alg_desc( sig_oid, &desc ); + if( ret != 0 ) + ret = mbedtls_snprintf( p, n, "???" ); + else + ret = mbedtls_snprintf( p, n, "%s", desc ); + MBEDTLS_X509_SAFE_SNPRINTF; + +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) + if( pk_alg == MBEDTLS_PK_RSASSA_PSS ) + { + const mbedtls_pk_rsassa_pss_options *pss_opts; + const mbedtls_md_info_t *md_info, *mgf_md_info; + + pss_opts = (const mbedtls_pk_rsassa_pss_options *) sig_opts; + + md_info = mbedtls_md_info_from_type( md_alg ); + mgf_md_info = mbedtls_md_info_from_type( pss_opts->mgf1_hash_id ); + + ret = mbedtls_snprintf( p, n, " (%s, MGF1-%s, 0x%02X)", + md_info ? mbedtls_md_get_name( md_info ) : "???", + mgf_md_info ? mbedtls_md_get_name( mgf_md_info ) : "???", + pss_opts->expected_salt_len ); + MBEDTLS_X509_SAFE_SNPRINTF; + } +#else + ((void) pk_alg); + ((void) md_alg); + ((void) sig_opts); +#endif /* MBEDTLS_X509_RSASSA_PSS_SUPPORT */ + + return( (int)( size - n ) ); +} + +/* + * Helper for writing "RSA key size", "EC key size", etc + */ +int mbedtls_x509_key_size_helper( char *buf, size_t buf_size, const char *name ) +{ + char *p = buf; + size_t n = buf_size; + int ret; + + ret = mbedtls_snprintf( p, n, "%s key size", name ); + MBEDTLS_X509_SAFE_SNPRINTF; + + return( 0 ); +} + +#if defined(MBEDTLS_HAVE_TIME_DATE) +/* + * Set the time structure to the current time. + * Return 0 on success, non-zero on failure. + */ +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) +static int x509_get_current_time( mbedtls_x509_time *now ) +{ + SYSTEMTIME st; + + GetSystemTime( &st ); + + now->year = st.wYear; + now->mon = st.wMonth; + now->day = st.wDay; + now->hour = st.wHour; + now->min = st.wMinute; + now->sec = st.wSecond; + + return( 0 ); +} +#else +static int x509_get_current_time( mbedtls_x509_time *now ) +{ + struct tm *lt; + time_t tt; + int ret = 0; + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_lock( &mbedtls_threading_gmtime_mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + tt = time( NULL ); + lt = gmtime( &tt ); + + if( lt == NULL ) + ret = -1; + else + { + now->year = lt->tm_year + 1900; + now->mon = lt->tm_mon + 1; + now->day = lt->tm_mday; + now->hour = lt->tm_hour; + now->min = lt->tm_min; + now->sec = lt->tm_sec; + } + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &mbedtls_threading_gmtime_mutex ) != 0 ) + return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); +#endif + + return( ret ); +} +#endif /* _WIN32 && !EFIX64 && !EFI32 */ + +/* + * Return 0 if before <= after, 1 otherwise + */ +static int x509_check_time( const mbedtls_x509_time *before, const mbedtls_x509_time *after ) +{ + if( before->year > after->year ) + return( 1 ); + + if( before->year == after->year && + before->mon > after->mon ) + return( 1 ); + + if( before->year == after->year && + before->mon == after->mon && + before->day > after->day ) + return( 1 ); + + if( before->year == after->year && + before->mon == after->mon && + before->day == after->day && + before->hour > after->hour ) + return( 1 ); + + if( before->year == after->year && + before->mon == after->mon && + before->day == after->day && + before->hour == after->hour && + before->min > after->min ) + return( 1 ); + + if( before->year == after->year && + before->mon == after->mon && + before->day == after->day && + before->hour == after->hour && + before->min == after->min && + before->sec > after->sec ) + return( 1 ); + + return( 0 ); +} + +int mbedtls_x509_time_is_past( const mbedtls_x509_time *to ) +{ + mbedtls_x509_time now; + + if( x509_get_current_time( &now ) != 0 ) + return( 1 ); + + return( x509_check_time( &now, to ) ); +} + +int mbedtls_x509_time_is_future( const mbedtls_x509_time *from ) +{ + mbedtls_x509_time now; + + if( x509_get_current_time( &now ) != 0 ) + return( 1 ); + + return( x509_check_time( from, &now ) ); +} + +#else /* MBEDTLS_HAVE_TIME_DATE */ + +int mbedtls_x509_time_is_past( const mbedtls_x509_time *to ) +{ + ((void) to); + return( 0 ); +} + +int mbedtls_x509_time_is_future( const mbedtls_x509_time *from ) +{ + ((void) from); + return( 0 ); +} +#endif /* MBEDTLS_HAVE_TIME_DATE */ + +#if defined(MBEDTLS_SELF_TEST) + +#include "mbedtls/x509_crt.h" +#include "mbedtls/certs.h" + +/* + * Checkup routine + */ +int mbedtls_x509_self_test( int verbose ) +{ +#if defined(MBEDTLS_CERTS_C) && defined(MBEDTLS_SHA1_C) + int ret; + uint32_t flags; + mbedtls_x509_crt cacert; + mbedtls_x509_crt clicert; + + if( verbose != 0 ) + mbedtls_printf( " X.509 certificate load: " ); + + mbedtls_x509_crt_init( &clicert ); + + ret = mbedtls_x509_crt_parse( &clicert, (const unsigned char *) mbedtls_test_cli_crt, + mbedtls_test_cli_crt_len ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( ret ); + } + + mbedtls_x509_crt_init( &cacert ); + + ret = mbedtls_x509_crt_parse( &cacert, (const unsigned char *) mbedtls_test_ca_crt, + mbedtls_test_ca_crt_len ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( ret ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n X.509 signature verify: "); + + ret = mbedtls_x509_crt_verify( &clicert, &cacert, NULL, NULL, &flags, NULL, NULL ); + if( ret != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + return( ret ); + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n\n"); + + mbedtls_x509_crt_free( &cacert ); + mbedtls_x509_crt_free( &clicert ); + + return( 0 ); +#else + ((void) verbose); + return( 0 ); +#endif /* MBEDTLS_CERTS_C && MBEDTLS_SHA1_C */ +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_X509_USE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_create.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_create.c new file mode 100644 index 0000000..823747b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_create.c @@ -0,0 +1,340 @@ +/* + * X.509 base functions for creating certificates / CSRs + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_X509_CREATE_C) + +#include "mbedtls/x509.h" +#include "mbedtls/asn1write.h" +#include "mbedtls/oid.h" +#include "c_types.h" +#include + +typedef struct { + const char *name; + size_t name_len; + const char*oid; +} x509_attr_descriptor_t; + +#define ADD_STRLEN( s ) s, sizeof( s ) - 1 + +static const x509_attr_descriptor_t x509_attrs[] ICACHE_RODATA_ATTR STORE_ATTR = +{ + { ADD_STRLEN( "CN" ), MBEDTLS_OID_AT_CN }, + { ADD_STRLEN( "commonName" ), MBEDTLS_OID_AT_CN }, + { ADD_STRLEN( "C" ), MBEDTLS_OID_AT_COUNTRY }, + { ADD_STRLEN( "countryName" ), MBEDTLS_OID_AT_COUNTRY }, + { ADD_STRLEN( "O" ), MBEDTLS_OID_AT_ORGANIZATION }, + { ADD_STRLEN( "organizationName" ), MBEDTLS_OID_AT_ORGANIZATION }, + { ADD_STRLEN( "L" ), MBEDTLS_OID_AT_LOCALITY }, + { ADD_STRLEN( "locality" ), MBEDTLS_OID_AT_LOCALITY }, + { ADD_STRLEN( "R" ), MBEDTLS_OID_PKCS9_EMAIL }, + { ADD_STRLEN( "OU" ), MBEDTLS_OID_AT_ORG_UNIT }, + { ADD_STRLEN( "organizationalUnitName" ), MBEDTLS_OID_AT_ORG_UNIT }, + { ADD_STRLEN( "ST" ), MBEDTLS_OID_AT_STATE }, + { ADD_STRLEN( "stateOrProvinceName" ), MBEDTLS_OID_AT_STATE }, + { ADD_STRLEN( "emailAddress" ), MBEDTLS_OID_PKCS9_EMAIL }, + { ADD_STRLEN( "serialNumber" ), MBEDTLS_OID_AT_SERIAL_NUMBER }, + { ADD_STRLEN( "postalAddress" ), MBEDTLS_OID_AT_POSTAL_ADDRESS }, + { ADD_STRLEN( "postalCode" ), MBEDTLS_OID_AT_POSTAL_CODE }, + { ADD_STRLEN( "dnQualifier" ), MBEDTLS_OID_AT_DN_QUALIFIER }, + { ADD_STRLEN( "title" ), MBEDTLS_OID_AT_TITLE }, + { ADD_STRLEN( "surName" ), MBEDTLS_OID_AT_SUR_NAME }, + { ADD_STRLEN( "SN" ), MBEDTLS_OID_AT_SUR_NAME }, + { ADD_STRLEN( "givenName" ), MBEDTLS_OID_AT_GIVEN_NAME }, + { ADD_STRLEN( "GN" ), MBEDTLS_OID_AT_GIVEN_NAME }, + { ADD_STRLEN( "initials" ), MBEDTLS_OID_AT_INITIALS }, + { ADD_STRLEN( "pseudonym" ), MBEDTLS_OID_AT_PSEUDONYM }, + { ADD_STRLEN( "generationQualifier" ), MBEDTLS_OID_AT_GENERATION_QUALIFIER }, + { ADD_STRLEN( "domainComponent" ), MBEDTLS_OID_DOMAIN_COMPONENT }, + { ADD_STRLEN( "DC" ), MBEDTLS_OID_DOMAIN_COMPONENT }, + { NULL, 0, NULL } +}; + +static const char *x509_at_oid_from_name( const char *name, size_t name_len ) +{ + const x509_attr_descriptor_t *cur; + + for( cur = x509_attrs; cur->name != NULL; cur++ ) + if( cur->name_len == name_len && + strncmp( cur->name, name, name_len ) == 0 ) + break; + + return( cur->oid ); +} + +int mbedtls_x509_string_to_names( mbedtls_asn1_named_data **head, const char *name ) +{ + int ret = 0; + const char *s = name, *c = s; + const char *end = s + strlen( s ); + const char *oid = NULL; + int in_tag = 1; + char data[MBEDTLS_X509_MAX_DN_NAME_SIZE]; + char *d = data; + + /* Clear existing chain if present */ + mbedtls_asn1_free_named_data_list( head ); + + while( c <= end ) + { + if( in_tag && *c == '=' ) + { + if( ( oid = x509_at_oid_from_name( s, c - s ) ) == NULL ) + { + ret = MBEDTLS_ERR_X509_UNKNOWN_OID; + goto exit; + } + + s = c + 1; + in_tag = 0; + d = data; + } + + if( !in_tag && *c == '\\' && c != end ) + { + c++; + + /* Check for valid escaped characters */ + if( c == end || *c != ',' ) + { + ret = MBEDTLS_ERR_X509_INVALID_NAME; + goto exit; + } + } + else if( !in_tag && ( *c == ',' || c == end ) ) + { + if( mbedtls_asn1_store_named_data( head, oid, strlen( oid ), + (unsigned char *) data, + d - data ) == NULL ) + { + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + } + + while( c < end && *(c + 1) == ' ' ) + c++; + + s = c + 1; + in_tag = 1; + } + + if( !in_tag && s != c + 1 ) + { + *(d++) = *c; + + if( d - data == MBEDTLS_X509_MAX_DN_NAME_SIZE ) + { + ret = MBEDTLS_ERR_X509_INVALID_NAME; + goto exit; + } + } + + c++; + } + +exit: + + return( ret ); +} + +/* The first byte of the value in the mbedtls_asn1_named_data structure is reserved + * to store the critical boolean for us + */ +int mbedtls_x509_set_extension( mbedtls_asn1_named_data **head, const char *oid, size_t oid_len, + int critical, const unsigned char *val, size_t val_len ) +{ + mbedtls_asn1_named_data *cur; + + if( ( cur = mbedtls_asn1_store_named_data( head, oid, oid_len, + NULL, val_len + 1 ) ) == NULL ) + { + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + } + + cur->val.p[0] = critical; + memcpy( cur->val.p + 1, val, val_len ); + + return( 0 ); +} + +/* + * RelativeDistinguishedName ::= + * SET OF AttributeTypeAndValue + * + * AttributeTypeAndValue ::= SEQUENCE { + * type AttributeType, + * value AttributeValue } + * + * AttributeType ::= OBJECT IDENTIFIER + * + * AttributeValue ::= ANY DEFINED BY AttributeType + */ +static int x509_write_name( unsigned char **p, unsigned char *start, + const char *oid, size_t oid_len, + const unsigned char *name, size_t name_len ) +{ + int ret; + size_t len = 0; + + // Write PrintableString for all except MBEDTLS_OID_PKCS9_EMAIL + // + if( MBEDTLS_OID_SIZE( MBEDTLS_OID_PKCS9_EMAIL ) == oid_len && + memcmp( oid, MBEDTLS_OID_PKCS9_EMAIL, oid_len ) == 0 ) + { + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_ia5_string( p, start, + (const char *) name, + name_len ) ); + } + else + { + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_printable_string( p, start, + (const char *) name, + name_len ) ); + } + + // Write OID + // + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_oid( p, start, oid, oid_len ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SET ) ); + + return( (int) len ); +} + +int mbedtls_x509_write_names( unsigned char **p, unsigned char *start, + mbedtls_asn1_named_data *first ) +{ + int ret; + size_t len = 0; + mbedtls_asn1_named_data *cur = first; + + while( cur != NULL ) + { + MBEDTLS_ASN1_CHK_ADD( len, x509_write_name( p, start, (char *) cur->oid.p, + cur->oid.len, + cur->val.p, cur->val.len ) ); + cur = cur->next; + } + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return( (int) len ); +} + +int mbedtls_x509_write_sig( unsigned char **p, unsigned char *start, + const char *oid, size_t oid_len, + unsigned char *sig, size_t size ) +{ + int ret; + size_t len = 0; + + if( *p < start || (size_t)( *p - start ) < size ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + len = size; + (*p) -= len; + memcpy( *p, sig, len ); + + if( *p - start < 1 ) + return( MBEDTLS_ERR_ASN1_BUF_TOO_SMALL ); + + *--(*p) = 0; + len += 1; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_BIT_STRING ) ); + + // Write OID + // + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_algorithm_identifier( p, start, oid, + oid_len, 0 ) ); + + return( (int) len ); +} + +static int x509_write_extension( unsigned char **p, unsigned char *start, + mbedtls_asn1_named_data *ext ) +{ + int ret; + size_t len = 0; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, ext->val.p + 1, + ext->val.len - 1 ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, ext->val.len - 1 ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_OCTET_STRING ) ); + + if( ext->val.p[0] != 0 ) + { + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_bool( p, start, 1 ) ); + } + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, ext->oid.p, + ext->oid.len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, ext->oid.len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_OID ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return( (int) len ); +} + +/* + * Extension ::= SEQUENCE { + * extnID OBJECT IDENTIFIER, + * critical BOOLEAN DEFAULT FALSE, + * extnValue OCTET STRING + * -- contains the DER encoding of an ASN.1 value + * -- corresponding to the extension type identified + * -- by extnID + * } + */ +int mbedtls_x509_write_extensions( unsigned char **p, unsigned char *start, + mbedtls_asn1_named_data *first ) +{ + int ret; + size_t len = 0; + mbedtls_asn1_named_data *cur_ext = first; + + while( cur_ext != NULL ) + { + MBEDTLS_ASN1_CHK_ADD( len, x509_write_extension( p, start, cur_ext ) ); + cur_ext = cur_ext->next; + } + + return( (int) len ); +} + +#endif /* MBEDTLS_X509_CREATE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_crl.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_crl.c new file mode 100644 index 0000000..125a773 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_crl.c @@ -0,0 +1,721 @@ +/* + * X.509 Certidicate Revocation List (CRL) parsing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The ITU-T X.509 standard defines a certificate format for PKI. + * + * http://www.ietf.org/rfc/rfc5280.txt (Certificates and CRLs) + * http://www.ietf.org/rfc/rfc3279.txt (Alg IDs for CRLs) + * http://www.ietf.org/rfc/rfc2986.txt (CSRs, aka PKCS#10) + * + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.680-0207.pdf + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.690-0207.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_X509_CRL_PARSE_C) + +#include "mbedtls/x509_crl.h" +#include "mbedtls/oid.h" + +#include + +#if defined(MBEDTLS_PEM_PARSE_C) +#include "mbedtls/pem.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#include +#define mbedtls_free free +#define mbedtls_calloc calloc +#define mbedtls_snprintf snprintf +#endif + +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) +#include +#else +#include +#endif + +#if defined(MBEDTLS_FS_IO) || defined(EFIX64) || defined(EFI32) +#include +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Version ::= INTEGER { v1(0), v2(1) } + */ +static int x509_crl_get_version( unsigned char **p, + const unsigned char *end, + int *ver ) +{ + int ret; + + if( ( ret = mbedtls_asn1_get_int( p, end, ver ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + { + *ver = 0; + return( 0 ); + } + + return( MBEDTLS_ERR_X509_INVALID_VERSION + ret ); + } + + return( 0 ); +} + +/* + * X.509 CRL v2 extensions (no extensions parsed yet.) + */ +static int x509_get_crl_ext( unsigned char **p, + const unsigned char *end, + mbedtls_x509_buf *ext ) +{ + int ret; + size_t len = 0; + + /* Get explicit tag */ + if( ( ret = mbedtls_x509_get_ext( p, end, ext, 0) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( 0 ); + + return( ret ); + } + + while( *p < end ) + { + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + *p += len; + } + + if( *p != end ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * X.509 CRL v2 entry extensions (no extensions parsed yet.) + */ +static int x509_get_crl_entry_ext( unsigned char **p, + const unsigned char *end, + mbedtls_x509_buf *ext ) +{ + int ret; + size_t len = 0; + + /* OPTIONAL */ + if( end <= *p ) + return( 0 ); + + ext->tag = **p; + ext->p = *p; + + /* + * Get CRL-entry extension sequence header + * crlEntryExtensions Extensions OPTIONAL -- if present, MUST be v2 + */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &ext->len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + { + ext->p = NULL; + return( 0 ); + } + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + } + + end = *p + ext->len; + + if( end != *p + ext->len ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + while( *p < end ) + { + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + *p += len; + } + + if( *p != end ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * X.509 CRL Entries + */ +static int x509_get_entries( unsigned char **p, + const unsigned char *end, + mbedtls_x509_crl_entry *entry ) +{ + int ret; + size_t entry_len; + mbedtls_x509_crl_entry *cur_entry = entry; + + if( *p == end ) + return( 0 ); + + if( ( ret = mbedtls_asn1_get_tag( p, end, &entry_len, + MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( 0 ); + + return( ret ); + } + + end = *p + entry_len; + + while( *p < end ) + { + size_t len2; + const unsigned char *end2; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len2, + MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED ) ) != 0 ) + { + return( ret ); + } + + cur_entry->raw.tag = **p; + cur_entry->raw.p = *p; + cur_entry->raw.len = len2; + end2 = *p + len2; + + if( ( ret = mbedtls_x509_get_serial( p, end2, &cur_entry->serial ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_x509_get_time( p, end2, + &cur_entry->revocation_date ) ) != 0 ) + return( ret ); + + if( ( ret = x509_get_crl_entry_ext( p, end2, + &cur_entry->entry_ext ) ) != 0 ) + return( ret ); + + if( *p < end ) + { + cur_entry->next = mbedtls_calloc( 1, sizeof( mbedtls_x509_crl_entry ) ); + + if( cur_entry->next == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + cur_entry = cur_entry->next; + } + } + + return( 0 ); +} + +/* + * Parse one CRLs in DER format and append it to the chained list + */ +int mbedtls_x509_crl_parse_der( mbedtls_x509_crl *chain, + const unsigned char *buf, size_t buflen ) +{ + int ret; + size_t len; + unsigned char *p, *end; + mbedtls_x509_buf sig_params1, sig_params2, sig_oid2; + mbedtls_x509_crl *crl = chain; + + /* + * Check for valid input + */ + if( crl == NULL || buf == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + memset( &sig_params1, 0, sizeof( mbedtls_x509_buf ) ); + memset( &sig_params2, 0, sizeof( mbedtls_x509_buf ) ); + memset( &sig_oid2, 0, sizeof( mbedtls_x509_buf ) ); + + /* + * Add new CRL on the end of the chain if needed. + */ + while( crl->version != 0 && crl->next != NULL ) + crl = crl->next; + + if( crl->version != 0 && crl->next == NULL ) + { + crl->next = mbedtls_calloc( 1, sizeof( mbedtls_x509_crl ) ); + + if( crl->next == NULL ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + } + + mbedtls_x509_crl_init( crl->next ); + crl = crl->next; + } + + /* + * Copy raw DER-encoded CRL + */ + if( ( p = mbedtls_calloc( 1, buflen ) ) == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + memcpy( p, buf, buflen ); + + crl->raw.p = p; + crl->raw.len = buflen; + + end = p + buflen; + + /* + * CertificateList ::= SEQUENCE { + * tbsCertList TBSCertList, + * signatureAlgorithm AlgorithmIdentifier, + * signatureValue BIT STRING } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT ); + } + + if( len != (size_t) ( end - p ) ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + /* + * TBSCertList ::= SEQUENCE { + */ + crl->tbs.p = p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + + end = p + len; + crl->tbs.len = end - crl->tbs.p; + + /* + * Version ::= INTEGER OPTIONAL { v1(0), v2(1) } + * -- if present, MUST be v2 + * + * signature AlgorithmIdentifier + */ + if( ( ret = x509_crl_get_version( &p, end, &crl->version ) ) != 0 || + ( ret = mbedtls_x509_get_alg( &p, end, &crl->sig_oid, &sig_params1 ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + + crl->version++; + + if( crl->version > 2 ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_UNKNOWN_VERSION ); + } + + if( ( ret = mbedtls_x509_get_sig_alg( &crl->sig_oid, &sig_params1, + &crl->sig_md, &crl->sig_pk, + &crl->sig_opts ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG ); + } + + /* + * issuer Name + */ + crl->issuer_raw.p = p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + + if( ( ret = mbedtls_x509_get_name( &p, p + len, &crl->issuer ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + + crl->issuer_raw.len = p - crl->issuer_raw.p; + + /* + * thisUpdate Time + * nextUpdate Time OPTIONAL + */ + if( ( ret = mbedtls_x509_get_time( &p, end, &crl->this_update ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + + if( ( ret = mbedtls_x509_get_time( &p, end, &crl->next_update ) ) != 0 ) + { + if( ret != ( MBEDTLS_ERR_X509_INVALID_DATE + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) && + ret != ( MBEDTLS_ERR_X509_INVALID_DATE + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ) ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + } + + /* + * revokedCertificates SEQUENCE OF SEQUENCE { + * userCertificate CertificateSerialNumber, + * revocationDate Time, + * crlEntryExtensions Extensions OPTIONAL + * -- if present, MUST be v2 + * } OPTIONAL + */ + if( ( ret = x509_get_entries( &p, end, &crl->entry ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + + /* + * crlExtensions EXPLICIT Extensions OPTIONAL + * -- if present, MUST be v2 + */ + if( crl->version == 2 ) + { + ret = x509_get_crl_ext( &p, end, &crl->crl_ext ); + + if( ret != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + } + + if( p != end ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + end = crl->raw.p + crl->raw.len; + + /* + * signatureAlgorithm AlgorithmIdentifier, + * signatureValue BIT STRING + */ + if( ( ret = mbedtls_x509_get_alg( &p, end, &sig_oid2, &sig_params2 ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + + if( crl->sig_oid.len != sig_oid2.len || + memcmp( crl->sig_oid.p, sig_oid2.p, crl->sig_oid.len ) != 0 || + sig_params1.len != sig_params2.len || + ( sig_params1.len != 0 && + memcmp( sig_params1.p, sig_params2.p, sig_params1.len ) != 0 ) ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_SIG_MISMATCH ); + } + + if( ( ret = mbedtls_x509_get_sig( &p, end, &crl->sig ) ) != 0 ) + { + mbedtls_x509_crl_free( crl ); + return( ret ); + } + + if( p != end ) + { + mbedtls_x509_crl_free( crl ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + return( 0 ); +} + +/* + * Parse one or more CRLs and add them to the chained list + */ +int mbedtls_x509_crl_parse( mbedtls_x509_crl *chain, const unsigned char *buf, size_t buflen ) +{ +#if defined(MBEDTLS_PEM_PARSE_C) + int ret; + size_t use_len; + mbedtls_pem_context pem; + int is_pem = 0; + + if( chain == NULL || buf == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + do + { + mbedtls_pem_init( &pem ); + + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( buflen == 0 || buf[buflen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN X509 CRL-----", + "-----END X509 CRL-----", + buf, NULL, 0, &use_len ); + + if( ret == 0 ) + { + /* + * Was PEM encoded + */ + is_pem = 1; + + buflen -= use_len; + buf += use_len; + + if( ( ret = mbedtls_x509_crl_parse_der( chain, + pem.buf, pem.buflen ) ) != 0 ) + { + return( ret ); + } + + mbedtls_pem_free( &pem ); + } + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + { + mbedtls_pem_free( &pem ); + return( ret ); + } + } + /* In the PEM case, buflen is 1 at the end, for the terminated NULL byte. + * And a valid CRL cannot be less than 1 byte anyway. */ + while( is_pem && buflen > 1 ); + + if( is_pem ) + return( 0 ); + else +#endif /* MBEDTLS_PEM_PARSE_C */ + return( mbedtls_x509_crl_parse_der( chain, buf, buflen ) ); +} + +#if defined(MBEDTLS_FS_IO) +/* + * Load one or more CRLs and add them to the chained list + */ +int mbedtls_x509_crl_parse_file( mbedtls_x509_crl *chain, const char *path ) +{ + int ret; + size_t n; + unsigned char *buf; + + if( ( ret = mbedtls_pk_load_file( path, &buf, &n ) ) != 0 ) + return( ret ); + + ret = mbedtls_x509_crl_parse( chain, buf, n ); + + mbedtls_zeroize( buf, n ); + mbedtls_free( buf ); + + return( ret ); +} +#endif /* MBEDTLS_FS_IO */ + +/* + * Return an informational string about the certificate. + */ +#define BEFORE_COLON 14 +#define BC "14" +/* + * Return an informational string about the CRL. + */ +int mbedtls_x509_crl_info( char *buf, size_t size, const char *prefix, + const mbedtls_x509_crl *crl ) +{ + int ret; + size_t n; + char *p; + const mbedtls_x509_crl_entry *entry; + + p = buf; + n = size; + + ret = mbedtls_snprintf( p, n, "%sCRL version : %d", + prefix, crl->version ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%sissuer name : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + ret = mbedtls_x509_dn_gets( p, n, &crl->issuer ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%sthis update : " \ + "%04d-%02d-%02d %02d:%02d:%02d", prefix, + crl->this_update.year, crl->this_update.mon, + crl->this_update.day, crl->this_update.hour, + crl->this_update.min, crl->this_update.sec ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%snext update : " \ + "%04d-%02d-%02d %02d:%02d:%02d", prefix, + crl->next_update.year, crl->next_update.mon, + crl->next_update.day, crl->next_update.hour, + crl->next_update.min, crl->next_update.sec ); + MBEDTLS_X509_SAFE_SNPRINTF; + + entry = &crl->entry; + + ret = mbedtls_snprintf( p, n, "\n%sRevoked certificates:", + prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + while( entry != NULL && entry->raw.len != 0 ) + { + ret = mbedtls_snprintf( p, n, "\n%sserial number: ", + prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_x509_serial_gets( p, n, &entry->serial ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, " revocation date: " \ + "%04d-%02d-%02d %02d:%02d:%02d", + entry->revocation_date.year, entry->revocation_date.mon, + entry->revocation_date.day, entry->revocation_date.hour, + entry->revocation_date.min, entry->revocation_date.sec ); + MBEDTLS_X509_SAFE_SNPRINTF; + + entry = entry->next; + } + + ret = mbedtls_snprintf( p, n, "\n%ssigned using : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_x509_sig_alg_gets( p, n, &crl->sig_oid, crl->sig_pk, crl->sig_md, + crl->sig_opts ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n" ); + MBEDTLS_X509_SAFE_SNPRINTF; + + return( (int) ( size - n ) ); +} + +/* + * Initialize a CRL chain + */ +void mbedtls_x509_crl_init( mbedtls_x509_crl *crl ) +{ + memset( crl, 0, sizeof(mbedtls_x509_crl) ); +} + +/* + * Unallocate all CRL data + */ +void mbedtls_x509_crl_free( mbedtls_x509_crl *crl ) +{ + mbedtls_x509_crl *crl_cur = crl; + mbedtls_x509_crl *crl_prv; + mbedtls_x509_name *name_cur; + mbedtls_x509_name *name_prv; + mbedtls_x509_crl_entry *entry_cur; + mbedtls_x509_crl_entry *entry_prv; + + if( crl == NULL ) + return; + + do + { +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) + mbedtls_free( crl_cur->sig_opts ); +#endif + + name_cur = crl_cur->issuer.next; + while( name_cur != NULL ) + { + name_prv = name_cur; + name_cur = name_cur->next; + mbedtls_zeroize( name_prv, sizeof( mbedtls_x509_name ) ); + mbedtls_free( name_prv ); + } + + entry_cur = crl_cur->entry.next; + while( entry_cur != NULL ) + { + entry_prv = entry_cur; + entry_cur = entry_cur->next; + mbedtls_zeroize( entry_prv, sizeof( mbedtls_x509_crl_entry ) ); + mbedtls_free( entry_prv ); + } + + if( crl_cur->raw.p != NULL ) + { + mbedtls_zeroize( crl_cur->raw.p, crl_cur->raw.len ); + mbedtls_free( crl_cur->raw.p ); + } + + crl_cur = crl_cur->next; + } + while( crl_cur != NULL ); + + crl_cur = crl; + do + { + crl_prv = crl_cur; + crl_cur = crl_cur->next; + + mbedtls_zeroize( crl_prv, sizeof( mbedtls_x509_crl ) ); + if( crl_prv != crl ) + mbedtls_free( crl_prv ); + } + while( crl_cur != NULL ); +} + +#endif /* MBEDTLS_X509_CRL_PARSE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_crt.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_crt.c new file mode 100644 index 0000000..da65745 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_crt.c @@ -0,0 +1,2412 @@ +/* + * X.509 certificate parsing and verification + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The ITU-T X.509 standard defines a certificate format for PKI. + * + * http://www.ietf.org/rfc/rfc5280.txt (Certificates and CRLs) + * http://www.ietf.org/rfc/rfc3279.txt (Alg IDs for CRLs) + * http://www.ietf.org/rfc/rfc2986.txt (CSRs, aka PKCS#10) + * + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.680-0207.pdf + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.690-0207.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) + +#include "mbedtls/x509_crt.h" +#include "mbedtls/oid.h" + +#include +#include + +#if defined(MBEDTLS_PEM_PARSE_C) +#include "mbedtls/pem.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_free free +#define mbedtls_calloc calloc +#define mbedtls_snprintf snprintf +#endif + +#if defined(MBEDTLS_THREADING_C) +#include "mbedtls/threading.h" +#endif + +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) +#include +#else +#include +#endif + +#if defined(MBEDTLS_FS_IO) +#include +#if !defined(_WIN32) || defined(EFIX64) || defined(EFI32) +#include +#include +#include +#endif /* !_WIN32 || EFIX64 || EFI32 */ +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Default profile + */ +const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default ICACHE_RODATA_ATTR = +{ + /* Hashes from SHA-1 and above */ + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_RIPEMD160 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA224 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA256 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA512 ), + 0xFFFFFFF, /* Any PK alg */ + 0xFFFFFFF, /* Any curve */ +#if defined(ESP8266_PLATFORM) + 512, +#else + 2048, +#endif +}; + +/* + * Next-default profile + */ +const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next ICACHE_RODATA_ATTR = +{ + /* Hashes from SHA-256 and above */ +#if defined(ESP8266_PLATFORM) + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA1 ) | +#endif + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA256 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA512 ), + 0xFFFFFFF, /* Any PK alg */ +#if defined(MBEDTLS_ECP_C) + /* Curves at or above 128-bit security level */ + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256R1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP521R1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP256R1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP384R1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP512R1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256K1 ), +#else + 0, +#endif +#if defined(ESP8266_PLATFORM) + 512, +#else + 2048, +#endif +}; + +/* + * NSA Suite B Profile + */ +const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb ICACHE_RODATA_ATTR = +{ + /* Only SHA-256 and 384 */ +#if defined(ESP8266_PLATFORM) + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA1 ) | +#endif + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA256 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ), + /* Only ECDSA */ + MBEDTLS_X509_ID_FLAG( MBEDTLS_PK_ECDSA ), +#if defined(MBEDTLS_ECP_C) + /* Only NIST P-256 and P-384 */ + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256R1 ) | + MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ), +#else + 0, +#endif + 0, +}; + +/* + * Check md_alg against profile + * Return 0 if md_alg acceptable for this profile, -1 otherwise + */ +static int x509_profile_check_md_alg( const mbedtls_x509_crt_profile *profile, + mbedtls_md_type_t md_alg ) +{ + if( ( profile->allowed_mds & MBEDTLS_X509_ID_FLAG( md_alg ) ) != 0 ) + return( 0 ); + + return( -1 ); +} + +/* + * Check pk_alg against profile + * Return 0 if pk_alg acceptable for this profile, -1 otherwise + */ +static int x509_profile_check_pk_alg( const mbedtls_x509_crt_profile *profile, + mbedtls_pk_type_t pk_alg ) +{ + if( ( profile->allowed_pks & MBEDTLS_X509_ID_FLAG( pk_alg ) ) != 0 ) + return( 0 ); + + return( -1 ); +} + +/* + * Check key against profile + * Return 0 if pk_alg acceptable for this profile, -1 otherwise + */ +static int x509_profile_check_key( const mbedtls_x509_crt_profile *profile, + mbedtls_pk_type_t pk_alg, + const mbedtls_pk_context *pk ) +{ +#if defined(MBEDTLS_RSA_C) + if( pk_alg == MBEDTLS_PK_RSA || pk_alg == MBEDTLS_PK_RSASSA_PSS ) + { + if( mbedtls_pk_get_bitlen( pk ) >= profile->rsa_min_bitlen ) + return( 0 ); + + return( -1 ); + } +#endif + +#if defined(MBEDTLS_ECP_C) + if( pk_alg == MBEDTLS_PK_ECDSA || + pk_alg == MBEDTLS_PK_ECKEY || + pk_alg == MBEDTLS_PK_ECKEY_DH ) + { + mbedtls_ecp_group_id gid = mbedtls_pk_ec( *pk )->grp.id; + + if( ( profile->allowed_curves & MBEDTLS_X509_ID_FLAG( gid ) ) != 0 ) + return( 0 ); + + return( -1 ); + } +#endif + + return( -1 ); +} + +/* + * Version ::= INTEGER { v1(0), v2(1), v3(2) } + */ +static int x509_get_version( unsigned char **p, + const unsigned char *end, + int *ver ) +{ + int ret; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 0 ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + { + *ver = 0; + return( 0 ); + } + + return( ret ); + } + + end = *p + len; + + if( ( ret = mbedtls_asn1_get_int( p, end, ver ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_VERSION + ret ); + + if( *p != end ) + return( MBEDTLS_ERR_X509_INVALID_VERSION + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * Validity ::= SEQUENCE { + * notBefore Time, + * notAfter Time } + */ +static int x509_get_dates( unsigned char **p, + const unsigned char *end, + mbedtls_x509_time *from, + mbedtls_x509_time *to ) +{ + int ret; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_DATE + ret ); + + end = *p + len; + + if( ( ret = mbedtls_x509_get_time( p, end, from ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_x509_get_time( p, end, to ) ) != 0 ) + return( ret ); + + if( *p != end ) + return( MBEDTLS_ERR_X509_INVALID_DATE + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * X.509 v2/v3 unique identifier (not parsed) + */ +static int x509_get_uid( unsigned char **p, + const unsigned char *end, + mbedtls_x509_buf *uid, int n ) +{ + int ret; + + if( *p == end ) + return( 0 ); + + uid->tag = **p; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &uid->len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | n ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( 0 ); + + return( ret ); + } + + uid->p = *p; + *p += uid->len; + + return( 0 ); +} + +static int x509_get_basic_constraints( unsigned char **p, + const unsigned char *end, + int *ca_istrue, + int *max_pathlen ) +{ + int ret; + size_t len; + + /* + * BasicConstraints ::= SEQUENCE { + * cA BOOLEAN DEFAULT FALSE, + * pathLenConstraint INTEGER (0..MAX) OPTIONAL } + */ + *ca_istrue = 0; /* DEFAULT FALSE */ + *max_pathlen = 0; /* endless */ + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( *p == end ) + return( 0 ); + + if( ( ret = mbedtls_asn1_get_bool( p, end, ca_istrue ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + ret = mbedtls_asn1_get_int( p, end, ca_istrue ); + + if( ret != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( *ca_istrue != 0 ) + *ca_istrue = 1; + } + + if( *p == end ) + return( 0 ); + + if( ( ret = mbedtls_asn1_get_int( p, end, max_pathlen ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( *p != end ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + (*max_pathlen)++; + + return( 0 ); +} + +static int x509_get_ns_cert_type( unsigned char **p, + const unsigned char *end, + unsigned char *ns_cert_type) +{ + int ret; + mbedtls_x509_bitstring bs = { 0, 0, NULL }; + + if( ( ret = mbedtls_asn1_get_bitstring( p, end, &bs ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( bs.len != 1 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + /* Get actual bitstring */ + *ns_cert_type = *bs.p; + return( 0 ); +} + +static int x509_get_key_usage( unsigned char **p, + const unsigned char *end, + unsigned int *key_usage) +{ + int ret; + size_t i; + mbedtls_x509_bitstring bs = { 0, 0, NULL }; + + if( ( ret = mbedtls_asn1_get_bitstring( p, end, &bs ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( bs.len < 1 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + /* Get actual bitstring */ + *key_usage = 0; + for( i = 0; i < bs.len && i < sizeof( unsigned int ); i++ ) + { + *key_usage |= (unsigned int) bs.p[i] << (8*i); + } + + return( 0 ); +} + +/* + * ExtKeyUsageSyntax ::= SEQUENCE SIZE (1..MAX) OF KeyPurposeId + * + * KeyPurposeId ::= OBJECT IDENTIFIER + */ +static int x509_get_ext_key_usage( unsigned char **p, + const unsigned char *end, + mbedtls_x509_sequence *ext_key_usage) +{ + int ret; + + if( ( ret = mbedtls_asn1_get_sequence_of( p, end, ext_key_usage, MBEDTLS_ASN1_OID ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + /* Sequence length must be >= 1 */ + if( ext_key_usage->buf.p == NULL ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + return( 0 ); +} + +/* + * SubjectAltName ::= GeneralNames + * + * GeneralNames ::= SEQUENCE SIZE (1..MAX) OF GeneralName + * + * GeneralName ::= CHOICE { + * otherName [0] OtherName, + * rfc822Name [1] IA5String, + * dNSName [2] IA5String, + * x400Address [3] ORAddress, + * directoryName [4] Name, + * ediPartyName [5] EDIPartyName, + * uniformResourceIdentifier [6] IA5String, + * iPAddress [7] OCTET STRING, + * registeredID [8] OBJECT IDENTIFIER } + * + * OtherName ::= SEQUENCE { + * type-id OBJECT IDENTIFIER, + * value [0] EXPLICIT ANY DEFINED BY type-id } + * + * EDIPartyName ::= SEQUENCE { + * nameAssigner [0] DirectoryString OPTIONAL, + * partyName [1] DirectoryString } + * + * NOTE: we only parse and use dNSName at this point. + */ +static int x509_get_subject_alt_name( unsigned char **p, + const unsigned char *end, + mbedtls_x509_sequence *subject_alt_name ) +{ + int ret; + size_t len, tag_len; + mbedtls_asn1_buf *buf; + unsigned char tag; + mbedtls_asn1_sequence *cur = subject_alt_name; + + /* Get main sequence tag */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( *p + len != end ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + while( *p < end ) + { + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + tag = **p; + (*p)++; + if( ( ret = mbedtls_asn1_get_len( p, end, &tag_len ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + if( ( tag & MBEDTLS_ASN1_CONTEXT_SPECIFIC ) != MBEDTLS_ASN1_CONTEXT_SPECIFIC ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + /* Skip everything but DNS name */ + if( tag != ( MBEDTLS_ASN1_CONTEXT_SPECIFIC | 2 ) ) + { + *p += tag_len; + continue; + } + + /* Allocate and assign next pointer */ + if( cur->buf.p != NULL ) + { + if( cur->next != NULL ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS ); + + cur->next = mbedtls_calloc( 1, sizeof( mbedtls_asn1_sequence ) ); + + if( cur->next == NULL ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_ALLOC_FAILED ); + + cur = cur->next; + } + + buf = &(cur->buf); + buf->tag = tag; + buf->p = *p; + buf->len = tag_len; + *p += buf->len; + } + + /* Set final sequence entry's next pointer to NULL */ + cur->next = NULL; + + if( *p != end ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * X.509 v3 extensions + * + * TODO: Perform all of the basic constraints tests required by the RFC + * TODO: Set values for undetected extensions to a sane default? + * + */ +static int x509_get_crt_ext( unsigned char **p, + const unsigned char *end, + mbedtls_x509_crt *crt ) +{ + int ret; + size_t len; + unsigned char *end_ext_data, *end_ext_octet; + + if( ( ret = mbedtls_x509_get_ext( p, end, &crt->v3_ext, 3 ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + return( 0 ); + + return( ret ); + } + + while( *p < end ) + { + /* + * Extension ::= SEQUENCE { + * extnID OBJECT IDENTIFIER, + * critical BOOLEAN DEFAULT FALSE, + * extnValue OCTET STRING } + */ + mbedtls_x509_buf extn_oid = {0, 0, NULL}; + int is_critical = 0; /* DEFAULT FALSE */ + int ext_type = 0; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + end_ext_data = *p + len; + + /* Get extension ID */ + extn_oid.tag = **p; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &extn_oid.len, MBEDTLS_ASN1_OID ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + extn_oid.p = *p; + *p += extn_oid.len; + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + /* Get optional critical */ + if( ( ret = mbedtls_asn1_get_bool( p, end_ext_data, &is_critical ) ) != 0 && + ( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + /* Data should be octet string type */ + if( ( ret = mbedtls_asn1_get_tag( p, end_ext_data, &len, + MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + ret ); + + end_ext_octet = *p + len; + + if( end_ext_octet != end_ext_data ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + /* + * Detect supported extensions + */ + ret = mbedtls_oid_get_x509_ext_type( &extn_oid, &ext_type ); + + if( ret != 0 ) + { + /* No parser found, skip extension */ + *p = end_ext_octet; + +#if !defined(MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION) + if( is_critical ) + { + /* Data is marked as critical: fail */ + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + } +#endif + continue; + } + + /* Forbid repeated extensions */ + if( ( crt->ext_types & ext_type ) != 0 ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS ); + + crt->ext_types |= ext_type; + + switch( ext_type ) + { + case MBEDTLS_X509_EXT_BASIC_CONSTRAINTS: + /* Parse basic constraints */ + if( ( ret = x509_get_basic_constraints( p, end_ext_octet, + &crt->ca_istrue, &crt->max_pathlen ) ) != 0 ) + return( ret ); + break; + + case MBEDTLS_X509_EXT_KEY_USAGE: + /* Parse key usage */ + if( ( ret = x509_get_key_usage( p, end_ext_octet, + &crt->key_usage ) ) != 0 ) + return( ret ); + break; + + case MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE: + /* Parse extended key usage */ + if( ( ret = x509_get_ext_key_usage( p, end_ext_octet, + &crt->ext_key_usage ) ) != 0 ) + return( ret ); + break; + + case MBEDTLS_X509_EXT_SUBJECT_ALT_NAME: + /* Parse subject alt name */ + if( ( ret = x509_get_subject_alt_name( p, end_ext_octet, + &crt->subject_alt_names ) ) != 0 ) + return( ret ); + break; + + case MBEDTLS_X509_EXT_NS_CERT_TYPE: + /* Parse netscape certificate type */ + if( ( ret = x509_get_ns_cert_type( p, end_ext_octet, + &crt->ns_cert_type ) ) != 0 ) + return( ret ); + break; + + default: + return( MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ); + } + } + + if( *p != end ) + return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * Parse and fill a single X.509 certificate in DER format + */ +static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, const unsigned char *buf, + size_t buflen ) +{ + int ret; + size_t len; + unsigned char *p, *end, *crt_end; + mbedtls_x509_buf sig_params1, sig_params2, sig_oid2; + + memset( &sig_params1, 0, sizeof( mbedtls_x509_buf ) ); + memset( &sig_params2, 0, sizeof( mbedtls_x509_buf ) ); + memset( &sig_oid2, 0, sizeof( mbedtls_x509_buf ) ); + + /* + * Check for valid input + */ + if( crt == NULL || buf == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + p = mbedtls_calloc( 1, len = buflen ); + if( p == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + memcpy( p, buf, buflen ); + + crt->raw.p = p; + crt->raw.len = len; + end = p + len; + + /* + * Certificate ::= SEQUENCE { + * tbsCertificate TBSCertificate, + * signatureAlgorithm AlgorithmIdentifier, + * signatureValue BIT STRING } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT ); + } + + if( len > (size_t) ( end - p ) ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + crt_end = p + len; + + /* + * TBSCertificate ::= SEQUENCE { + */ + crt->tbs.p = p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + + end = p + len; + crt->tbs.len = end - crt->tbs.p; + + /* + * Version ::= INTEGER { v1(0), v2(1), v3(2) } + * + * CertificateSerialNumber ::= INTEGER + * + * signature AlgorithmIdentifier + */ + if( ( ret = x509_get_version( &p, end, &crt->version ) ) != 0 || + ( ret = mbedtls_x509_get_serial( &p, end, &crt->serial ) ) != 0 || + ( ret = mbedtls_x509_get_alg( &p, end, &crt->sig_oid, + &sig_params1 ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + crt->version++; + + if( crt->version > 3 ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_UNKNOWN_VERSION ); + } + + if( ( ret = mbedtls_x509_get_sig_alg( &crt->sig_oid, &sig_params1, + &crt->sig_md, &crt->sig_pk, + &crt->sig_opts ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + /* + * issuer Name + */ + crt->issuer_raw.p = p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + + if( ( ret = mbedtls_x509_get_name( &p, p + len, &crt->issuer ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + crt->issuer_raw.len = p - crt->issuer_raw.p; + + /* + * Validity ::= SEQUENCE { + * notBefore Time, + * notAfter Time } + * + */ + if( ( ret = x509_get_dates( &p, end, &crt->valid_from, + &crt->valid_to ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + /* + * subject Name + */ + crt->subject_raw.p = p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + + if( len && ( ret = mbedtls_x509_get_name( &p, p + len, &crt->subject ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + crt->subject_raw.len = p - crt->subject_raw.p; + + /* + * SubjectPublicKeyInfo + */ + if( ( ret = mbedtls_pk_parse_subpubkey( &p, end, &crt->pk ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + /* + * issuerUniqueID [1] IMPLICIT UniqueIdentifier OPTIONAL, + * -- If present, version shall be v2 or v3 + * subjectUniqueID [2] IMPLICIT UniqueIdentifier OPTIONAL, + * -- If present, version shall be v2 or v3 + * extensions [3] EXPLICIT Extensions OPTIONAL + * -- If present, version shall be v3 + */ + if( crt->version == 2 || crt->version == 3 ) + { + ret = x509_get_uid( &p, end, &crt->issuer_id, 1 ); + if( ret != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + } + + if( crt->version == 2 || crt->version == 3 ) + { + ret = x509_get_uid( &p, end, &crt->subject_id, 2 ); + if( ret != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + } + +#if !defined(MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3) + if( crt->version == 3 ) +#endif + { + ret = x509_get_crt_ext( &p, end, crt ); + if( ret != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + } + + if( p != end ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + end = crt_end; + + /* + * } + * -- end of TBSCertificate + * + * signatureAlgorithm AlgorithmIdentifier, + * signatureValue BIT STRING + */ + if( ( ret = mbedtls_x509_get_alg( &p, end, &sig_oid2, &sig_params2 ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + if( crt->sig_oid.len != sig_oid2.len || + memcmp( crt->sig_oid.p, sig_oid2.p, crt->sig_oid.len ) != 0 || + sig_params1.len != sig_params2.len || + ( sig_params1.len != 0 && + memcmp( sig_params1.p, sig_params2.p, sig_params1.len ) != 0 ) ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_SIG_MISMATCH ); + } + + if( ( ret = mbedtls_x509_get_sig( &p, end, &crt->sig ) ) != 0 ) + { + mbedtls_x509_crt_free( crt ); + return( ret ); + } + + if( p != end ) + { + mbedtls_x509_crt_free( crt ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + return( 0 ); +} + +/* + * Parse one X.509 certificate in DER format from a buffer and add them to a + * chained list + */ +int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain, const unsigned char *buf, + size_t buflen ) +{ + int ret; + mbedtls_x509_crt *crt = chain, *prev = NULL; + + /* + * Check for valid input + */ + if( crt == NULL || buf == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + while( crt->version != 0 && crt->next != NULL ) + { + prev = crt; + crt = crt->next; + } + + /* + * Add new certificate on the end of the chain if needed. + */ + if( crt->version != 0 && crt->next == NULL ) + { + crt->next = mbedtls_calloc( 1, sizeof( mbedtls_x509_crt ) ); + + if( crt->next == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + prev = crt; + mbedtls_x509_crt_init( crt->next ); + crt = crt->next; + } + + if( ( ret = x509_crt_parse_der_core( crt, buf, buflen ) ) != 0 ) + { + if( prev ) + prev->next = NULL; + + if( crt != chain ) + mbedtls_free( crt ); + + return( ret ); + } + + return( 0 ); +} + +/* + * Parse one or more PEM certificates from a buffer and add them to the chained + * list + */ +int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, const unsigned char *buf, size_t buflen ) +{ + int success = 0, first_error = 0, total_failed = 0; + int buf_format = MBEDTLS_X509_FORMAT_DER; + + /* + * Check for valid input + */ + if( chain == NULL || buf == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + /* + * Determine buffer content. Buffer contains either one DER certificate or + * one or more PEM certificates. + */ +#if defined(MBEDTLS_PEM_PARSE_C) + if( buflen != 0 && buf[buflen - 1] == '\0' && + strstr( (const char *) buf, "-----BEGIN CERTIFICATE-----" ) != NULL ) + { + buf_format = MBEDTLS_X509_FORMAT_PEM; + } +#endif + + if( buf_format == MBEDTLS_X509_FORMAT_DER ) + return mbedtls_x509_crt_parse_der( chain, buf, buflen ); + +#if defined(MBEDTLS_PEM_PARSE_C) + if( buf_format == MBEDTLS_X509_FORMAT_PEM ) + { + int ret; + mbedtls_pem_context pem; + + /* 1 rather than 0 since the terminating NULL byte is counted in */ + while( buflen > 1 ) + { + size_t use_len; + mbedtls_pem_init( &pem ); + + /* If we get there, we know the string is null-terminated */ + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN CERTIFICATE-----", + "-----END CERTIFICATE-----", + buf, NULL, 0, &use_len ); + + if( ret == 0 ) + { + /* + * Was PEM encoded + */ + buflen -= use_len; + buf += use_len; + } + else if( ret == MBEDTLS_ERR_PEM_BAD_INPUT_DATA ) + { + return( ret ); + } + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + { + mbedtls_pem_free( &pem ); + + /* + * PEM header and footer were found + */ + buflen -= use_len; + buf += use_len; + + if( first_error == 0 ) + first_error = ret; + + total_failed++; + continue; + } + else + break; + + ret = mbedtls_x509_crt_parse_der( chain, pem.buf, pem.buflen ); + + mbedtls_pem_free( &pem ); + + if( ret != 0 ) + { + /* + * Quit parsing on a memory error + */ + if( ret == MBEDTLS_ERR_X509_ALLOC_FAILED ) + return( ret ); + + if( first_error == 0 ) + first_error = ret; + + total_failed++; + continue; + } + + success = 1; + } + } +#endif /* MBEDTLS_PEM_PARSE_C */ + + if( success ) + return( total_failed ); + else if( first_error ) + return( first_error ); + else + return( MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT ); +} + +#if defined(MBEDTLS_FS_IO) +/* + * Load one or more certificates and add them to the chained list + */ +int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path ) +{ + int ret; + size_t n; + unsigned char *buf; + + if( ( ret = mbedtls_pk_load_file( path, &buf, &n ) ) != 0 ) + return( ret ); + + ret = mbedtls_x509_crt_parse( chain, buf, n ); + + mbedtls_zeroize( buf, n ); + mbedtls_free( buf ); + + return( ret ); +} + +int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path ) +{ + int ret = 0; +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) + int w_ret; + WCHAR szDir[MAX_PATH]; + char filename[MAX_PATH]; + char *p; + size_t len = strlen( path ); + + WIN32_FIND_DATAW file_data; + HANDLE hFind; + + if( len > MAX_PATH - 3 ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + memset( szDir, 0, sizeof(szDir) ); + memset( filename, 0, MAX_PATH ); + memcpy( filename, path, len ); + filename[len++] = '\\'; + p = filename + len; + filename[len++] = '*'; + + w_ret = MultiByteToWideChar( CP_ACP, 0, filename, len, szDir, + MAX_PATH - 3 ); + if( w_ret == 0 ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + hFind = FindFirstFileW( szDir, &file_data ); + if( hFind == INVALID_HANDLE_VALUE ) + return( MBEDTLS_ERR_X509_FILE_IO_ERROR ); + + len = MAX_PATH - len; + do + { + memset( p, 0, len ); + + if( file_data.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY ) + continue; + + w_ret = WideCharToMultiByte( CP_ACP, 0, file_data.cFileName, + lstrlenW( file_data.cFileName ), + p, (int) len - 1, + NULL, NULL ); + if( w_ret == 0 ) + return( MBEDTLS_ERR_X509_FILE_IO_ERROR ); + + w_ret = mbedtls_x509_crt_parse_file( chain, filename ); + if( w_ret < 0 ) + ret++; + else + ret += w_ret; + } + while( FindNextFileW( hFind, &file_data ) != 0 ); + + if( GetLastError() != ERROR_NO_MORE_FILES ) + ret = MBEDTLS_ERR_X509_FILE_IO_ERROR; + + FindClose( hFind ); +#else /* _WIN32 */ + int t_ret; + struct stat sb; + struct dirent *entry; + char entry_name[255]; + DIR *dir = opendir( path ); + + if( dir == NULL ) + return( MBEDTLS_ERR_X509_FILE_IO_ERROR ); + +#if defined(MBEDTLS_THREADING_PTHREAD) + if( ( ret = mbedtls_mutex_lock( &mbedtls_threading_readdir_mutex ) ) != 0 ) + { + closedir( dir ); + return( ret ); + } +#endif + + while( ( entry = readdir( dir ) ) != NULL ) + { + mbedtls_snprintf( entry_name, sizeof entry_name, "%s/%s", path, entry->d_name ); + + if( stat( entry_name, &sb ) == -1 ) + { + closedir( dir ); + ret = MBEDTLS_ERR_X509_FILE_IO_ERROR; + goto cleanup; + } + + if( !S_ISREG( sb.st_mode ) ) + continue; + + // Ignore parse errors + // + t_ret = mbedtls_x509_crt_parse_file( chain, entry_name ); + if( t_ret < 0 ) + ret++; + else + ret += t_ret; + } + closedir( dir ); + +cleanup: +#if defined(MBEDTLS_THREADING_PTHREAD) + if( mbedtls_mutex_unlock( &mbedtls_threading_readdir_mutex ) != 0 ) + ret = MBEDTLS_ERR_THREADING_MUTEX_ERROR; +#endif + +#endif /* _WIN32 */ + + return( ret ); +} +#endif /* MBEDTLS_FS_IO */ + +static int x509_info_subject_alt_name( char **buf, size_t *size, + const mbedtls_x509_sequence *subject_alt_name ) +{ + size_t i; + size_t n = *size; + char *p = *buf; + const mbedtls_x509_sequence *cur = subject_alt_name; + const char *sep = ""; + size_t sep_len = 0; + + while( cur != NULL ) + { + if( cur->buf.len + sep_len >= n ) + { + *p = '\0'; + return( MBEDTLS_ERR_X509_BUFFER_TOO_SMALL ); + } + + n -= cur->buf.len + sep_len; + for( i = 0; i < sep_len; i++ ) + *p++ = sep[i]; + for( i = 0; i < cur->buf.len; i++ ) + *p++ = cur->buf.p[i]; + + sep = ", "; + sep_len = 2; + + cur = cur->next; + } + + *p = '\0'; + + *size = n; + *buf = p; + + return( 0 ); +} + +#define PRINT_ITEM(i) \ + { \ + ret = mbedtls_snprintf( p, n, "%s" i, sep ); \ + MBEDTLS_X509_SAFE_SNPRINTF; \ + sep = ", "; \ + } + +#define CERT_TYPE(type,name) \ + if( ns_cert_type & type ) \ + PRINT_ITEM( name ); + +static int x509_info_cert_type( char **buf, size_t *size, + unsigned char ns_cert_type ) +{ + int ret; + size_t n = *size; + char *p = *buf; + const char *sep = ""; + + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT, "SSL Client" ); + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER, "SSL Server" ); + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_EMAIL, "Email" ); + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING, "Object Signing" ); + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_RESERVED, "Reserved" ); + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_SSL_CA, "SSL CA" ); + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA, "Email CA" ); + CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA, "Object Signing CA" ); + + *size = n; + *buf = p; + + return( 0 ); +} + +#define KEY_USAGE(code,name) \ + if( key_usage & code ) \ + PRINT_ITEM( name ); + +static int x509_info_key_usage( char **buf, size_t *size, + unsigned int key_usage ) +{ + int ret; + size_t n = *size; + char *p = *buf; + const char *sep = ""; + + KEY_USAGE( MBEDTLS_X509_KU_DIGITAL_SIGNATURE, "Digital Signature" ); + KEY_USAGE( MBEDTLS_X509_KU_NON_REPUDIATION, "Non Repudiation" ); + KEY_USAGE( MBEDTLS_X509_KU_KEY_ENCIPHERMENT, "Key Encipherment" ); + KEY_USAGE( MBEDTLS_X509_KU_DATA_ENCIPHERMENT, "Data Encipherment" ); + KEY_USAGE( MBEDTLS_X509_KU_KEY_AGREEMENT, "Key Agreement" ); + KEY_USAGE( MBEDTLS_X509_KU_KEY_CERT_SIGN, "Key Cert Sign" ); + KEY_USAGE( MBEDTLS_X509_KU_CRL_SIGN, "CRL Sign" ); + KEY_USAGE( MBEDTLS_X509_KU_ENCIPHER_ONLY, "Encipher Only" ); + KEY_USAGE( MBEDTLS_X509_KU_DECIPHER_ONLY, "Decipher Only" ); + + *size = n; + *buf = p; + + return( 0 ); +} + +static int x509_info_ext_key_usage( char **buf, size_t *size, + const mbedtls_x509_sequence *extended_key_usage ) +{ + int ret; + const char *desc; + size_t n = *size; + char *p = *buf; + const mbedtls_x509_sequence *cur = extended_key_usage; + const char *sep = ""; + + while( cur != NULL ) + { + if( mbedtls_oid_get_extended_key_usage( &cur->buf, &desc ) != 0 ) + desc = "???"; + + ret = mbedtls_snprintf( p, n, "%s%s", sep, desc ); + MBEDTLS_X509_SAFE_SNPRINTF; + + sep = ", "; + + cur = cur->next; + } + + *size = n; + *buf = p; + + return( 0 ); +} + +/* + * Return an informational string about the certificate. + */ +#define BEFORE_COLON 18 +#define BC "18" +int mbedtls_x509_crt_info( char *buf, size_t size, const char *prefix, + const mbedtls_x509_crt *crt ) +{ + int ret; + size_t n; + char *p; + char key_size_str[BEFORE_COLON]; + + p = buf; + n = size; + + ret = mbedtls_snprintf( p, n, "%scert. version : %d\n", + prefix, crt->version ); + MBEDTLS_X509_SAFE_SNPRINTF; + ret = mbedtls_snprintf( p, n, "%sserial number : ", + prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_x509_serial_gets( p, n, &crt->serial ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%sissuer name : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + ret = mbedtls_x509_dn_gets( p, n, &crt->issuer ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%ssubject name : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + ret = mbedtls_x509_dn_gets( p, n, &crt->subject ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%sissued on : " \ + "%04d-%02d-%02d %02d:%02d:%02d", prefix, + crt->valid_from.year, crt->valid_from.mon, + crt->valid_from.day, crt->valid_from.hour, + crt->valid_from.min, crt->valid_from.sec ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%sexpires on : " \ + "%04d-%02d-%02d %02d:%02d:%02d", prefix, + crt->valid_to.year, crt->valid_to.mon, + crt->valid_to.day, crt->valid_to.hour, + crt->valid_to.min, crt->valid_to.sec ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%ssigned using : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_x509_sig_alg_gets( p, n, &crt->sig_oid, crt->sig_pk, + crt->sig_md, crt->sig_opts ); + MBEDTLS_X509_SAFE_SNPRINTF; + + /* Key size */ + if( ( ret = mbedtls_x509_key_size_helper( key_size_str, BEFORE_COLON, + mbedtls_pk_get_name( &crt->pk ) ) ) != 0 ) + { + return( ret ); + } + + ret = mbedtls_snprintf( p, n, "\n%s%-" BC "s: %d bits", prefix, key_size_str, + (int) mbedtls_pk_get_bitlen( &crt->pk ) ); + MBEDTLS_X509_SAFE_SNPRINTF; + + /* + * Optional extensions + */ + + if( crt->ext_types & MBEDTLS_X509_EXT_BASIC_CONSTRAINTS ) + { + ret = mbedtls_snprintf( p, n, "\n%sbasic constraints : CA=%s", prefix, + crt->ca_istrue ? "true" : "false" ); + MBEDTLS_X509_SAFE_SNPRINTF; + + if( crt->max_pathlen > 0 ) + { + ret = mbedtls_snprintf( p, n, ", max_pathlen=%d", crt->max_pathlen - 1 ); + MBEDTLS_X509_SAFE_SNPRINTF; + } + } + + if( crt->ext_types & MBEDTLS_X509_EXT_SUBJECT_ALT_NAME ) + { + ret = mbedtls_snprintf( p, n, "\n%ssubject alt name : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + if( ( ret = x509_info_subject_alt_name( &p, &n, + &crt->subject_alt_names ) ) != 0 ) + return( ret ); + } + + if( crt->ext_types & MBEDTLS_X509_EXT_NS_CERT_TYPE ) + { + ret = mbedtls_snprintf( p, n, "\n%scert. type : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + if( ( ret = x509_info_cert_type( &p, &n, crt->ns_cert_type ) ) != 0 ) + return( ret ); + } + + if( crt->ext_types & MBEDTLS_X509_EXT_KEY_USAGE ) + { + ret = mbedtls_snprintf( p, n, "\n%skey usage : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + if( ( ret = x509_info_key_usage( &p, &n, crt->key_usage ) ) != 0 ) + return( ret ); + } + + if( crt->ext_types & MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE ) + { + ret = mbedtls_snprintf( p, n, "\n%sext key usage : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + if( ( ret = x509_info_ext_key_usage( &p, &n, + &crt->ext_key_usage ) ) != 0 ) + return( ret ); + } + + ret = mbedtls_snprintf( p, n, "\n" ); + MBEDTLS_X509_SAFE_SNPRINTF; + + return( (int) ( size - n ) ); +} + +struct x509_crt_verify_string { + int code; + const char *string; +}; + +#if 0 +static const struct x509_crt_verify_string x509_crt_verify_strings[] = { + { MBEDTLS_X509_BADCERT_EXPIRED, "The certificate validity has expired" }, + { MBEDTLS_X509_BADCERT_REVOKED, "The certificate has been revoked (is on a CRL)" }, + { MBEDTLS_X509_BADCERT_CN_MISMATCH, "The certificate Common Name (CN) does not match with the expected CN" }, + { MBEDTLS_X509_BADCERT_NOT_TRUSTED, "The certificate is not correctly signed by the trusted CA" }, + { MBEDTLS_X509_BADCRL_NOT_TRUSTED, "The CRL is not correctly signed by the trusted CA" }, + { MBEDTLS_X509_BADCRL_EXPIRED, "The CRL is expired" }, + { MBEDTLS_X509_BADCERT_MISSING, "Certificate was missing" }, + { MBEDTLS_X509_BADCERT_SKIP_VERIFY, "Certificate verification was skipped" }, + { MBEDTLS_X509_BADCERT_OTHER, "Other reason (can be used by verify callback)" }, + { MBEDTLS_X509_BADCERT_FUTURE, "The certificate validity starts in the future" }, + { MBEDTLS_X509_BADCRL_FUTURE, "The CRL is from the future" }, + { MBEDTLS_X509_BADCERT_KEY_USAGE, "Usage does not match the keyUsage extension" }, + { MBEDTLS_X509_BADCERT_EXT_KEY_USAGE, "Usage does not match the extendedKeyUsage extension" }, + { MBEDTLS_X509_BADCERT_NS_CERT_TYPE, "Usage does not match the nsCertType extension" }, + { MBEDTLS_X509_BADCERT_BAD_MD, "The certificate is signed with an unacceptable hash." }, + { MBEDTLS_X509_BADCERT_BAD_PK, "The certificate is signed with an unacceptable PK alg (eg RSA vs ECDSA)." }, + { MBEDTLS_X509_BADCERT_BAD_KEY, "The certificate is signed with an unacceptable key (eg bad curve, RSA too short)." }, + { MBEDTLS_X509_BADCRL_BAD_MD, "The CRL is signed with an unacceptable hash." }, + { MBEDTLS_X509_BADCRL_BAD_PK, "The CRL is signed with an unacceptable PK alg (eg RSA vs ECDSA)." }, + { MBEDTLS_X509_BADCRL_BAD_KEY, "The CRL is signed with an unacceptable key (eg bad curve, RSA too short)." }, + { 0, NULL } +}; +#else +static const struct x509_crt_verify_string x509_crt_verify_strings[] = { + { MBEDTLS_X509_BADCERT_EXPIRED, NULL }, + { MBEDTLS_X509_BADCERT_REVOKED, NULL }, + { MBEDTLS_X509_BADCERT_CN_MISMATCH, NULL }, + { MBEDTLS_X509_BADCERT_NOT_TRUSTED, NULL }, + { MBEDTLS_X509_BADCRL_NOT_TRUSTED, NULL }, + { MBEDTLS_X509_BADCRL_EXPIRED, NULL }, + { MBEDTLS_X509_BADCERT_MISSING, NULL }, + { MBEDTLS_X509_BADCERT_SKIP_VERIFY, NULL }, + { MBEDTLS_X509_BADCERT_OTHER, NULL }, + { MBEDTLS_X509_BADCERT_FUTURE, NULL }, + { MBEDTLS_X509_BADCRL_FUTURE, NULL }, + { MBEDTLS_X509_BADCERT_KEY_USAGE, NULL }, + { MBEDTLS_X509_BADCERT_EXT_KEY_USAGE, NULL }, + { MBEDTLS_X509_BADCERT_NS_CERT_TYPE, NULL }, + { MBEDTLS_X509_BADCERT_BAD_MD, NULL }, + { MBEDTLS_X509_BADCERT_BAD_PK, NULL }, + { MBEDTLS_X509_BADCERT_BAD_KEY, NULL }, + { MBEDTLS_X509_BADCRL_BAD_MD, NULL }, + { MBEDTLS_X509_BADCRL_BAD_PK, NULL }, + { MBEDTLS_X509_BADCRL_BAD_KEY, NULL }, + { 0, NULL } +}; +#endif + +int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix, + uint32_t flags ) +{ + int ret; + const struct x509_crt_verify_string *cur; + char *p = buf; + size_t n = size; + + for( cur = x509_crt_verify_strings; cur->string != NULL ; cur++ ) + { + if( ( flags & cur->code ) == 0 ) + continue; + + ret = mbedtls_snprintf( p, n, "%s%s\n", prefix, cur->string ); + MBEDTLS_X509_SAFE_SNPRINTF; + flags ^= cur->code; + } + + if( flags != 0 ) + { + ret = mbedtls_snprintf( p, n, "%sUnknown reason " + "(this should not happen)\n", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + } + + return( (int) ( size - n ) ); +} + +#if defined(MBEDTLS_X509_CHECK_KEY_USAGE) +int mbedtls_x509_crt_check_key_usage( const mbedtls_x509_crt *crt, + unsigned int usage ) +{ + unsigned int usage_must, usage_may; + unsigned int may_mask = MBEDTLS_X509_KU_ENCIPHER_ONLY + | MBEDTLS_X509_KU_DECIPHER_ONLY; + + if( ( crt->ext_types & MBEDTLS_X509_EXT_KEY_USAGE ) == 0 ) + return( 0 ); + + usage_must = usage & ~may_mask; + + if( ( ( crt->key_usage & ~may_mask ) & usage_must ) != usage_must ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + usage_may = usage & may_mask; + + if( ( ( crt->key_usage & may_mask ) | usage_may ) != usage_may ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + return( 0 ); +} +#endif + +#if defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE) +int mbedtls_x509_crt_check_extended_key_usage( const mbedtls_x509_crt *crt, + const char *usage_oid, + size_t usage_len ) +{ + const mbedtls_x509_sequence *cur; + + /* Extension is not mandatory, absent means no restriction */ + if( ( crt->ext_types & MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE ) == 0 ) + return( 0 ); + + /* + * Look for the requested usage (or wildcard ANY) in our list + */ + for( cur = &crt->ext_key_usage; cur != NULL; cur = cur->next ) + { + const mbedtls_x509_buf *cur_oid = &cur->buf; + + if( cur_oid->len == usage_len && + memcmp( cur_oid->p, usage_oid, usage_len ) == 0 ) + { + return( 0 ); + } + + if( MBEDTLS_OID_CMP( MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE, cur_oid ) == 0 ) + return( 0 ); + } + + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); +} +#endif /* MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE */ + +#if defined(MBEDTLS_X509_CRL_PARSE_C) +/* + * Return 1 if the certificate is revoked, or 0 otherwise. + */ +int mbedtls_x509_crt_is_revoked( const mbedtls_x509_crt *crt, const mbedtls_x509_crl *crl ) +{ + const mbedtls_x509_crl_entry *cur = &crl->entry; + + while( cur != NULL && cur->serial.len != 0 ) + { + if( crt->serial.len == cur->serial.len && + memcmp( crt->serial.p, cur->serial.p, crt->serial.len ) == 0 ) + { + if( mbedtls_x509_time_is_past( &cur->revocation_date ) ) + return( 1 ); + } + + cur = cur->next; + } + + return( 0 ); +} + +/* + * Check that the given certificate is valid according to the CRL. + */ +static int x509_crt_verifycrl( mbedtls_x509_crt *crt, mbedtls_x509_crt *ca, + mbedtls_x509_crl *crl_list, + const mbedtls_x509_crt_profile *profile ) +{ + int flags = 0; + unsigned char hash[MBEDTLS_MD_MAX_SIZE]; + const mbedtls_md_info_t *md_info; + + if( ca == NULL ) + return( flags ); + + /* + * TODO: What happens if no CRL is present? + * Suggestion: Revocation state should be unknown if no CRL is present. + * For backwards compatibility this is not yet implemented. + */ + + while( crl_list != NULL ) + { + if( crl_list->version == 0 || + crl_list->issuer_raw.len != ca->subject_raw.len || + memcmp( crl_list->issuer_raw.p, ca->subject_raw.p, + crl_list->issuer_raw.len ) != 0 ) + { + crl_list = crl_list->next; + continue; + } + + /* + * Check if the CA is configured to sign CRLs + */ +#if defined(MBEDTLS_X509_CHECK_KEY_USAGE) + if( mbedtls_x509_crt_check_key_usage( ca, MBEDTLS_X509_KU_CRL_SIGN ) != 0 ) + { + flags |= MBEDTLS_X509_BADCRL_NOT_TRUSTED; + break; + } +#endif + + /* + * Check if CRL is correctly signed by the trusted CA + */ + if( x509_profile_check_md_alg( profile, crl_list->sig_md ) != 0 ) + flags |= MBEDTLS_X509_BADCRL_BAD_MD; + + if( x509_profile_check_pk_alg( profile, crl_list->sig_pk ) != 0 ) + flags |= MBEDTLS_X509_BADCRL_BAD_PK; + + md_info = mbedtls_md_info_from_type( crl_list->sig_md ); + if( md_info == NULL ) + { + /* + * Cannot check 'unknown' hash + */ + flags |= MBEDTLS_X509_BADCRL_NOT_TRUSTED; + break; + } + + mbedtls_md( md_info, crl_list->tbs.p, crl_list->tbs.len, hash ); + + if( x509_profile_check_key( profile, crl_list->sig_pk, &ca->pk ) != 0 ) + flags |= MBEDTLS_X509_BADCERT_BAD_KEY; + + if( mbedtls_pk_verify_ext( crl_list->sig_pk, crl_list->sig_opts, &ca->pk, + crl_list->sig_md, hash, mbedtls_md_get_size( md_info ), + crl_list->sig.p, crl_list->sig.len ) != 0 ) + { + flags |= MBEDTLS_X509_BADCRL_NOT_TRUSTED; + break; + } + + /* + * Check for validity of CRL (Do not drop out) + */ + if( mbedtls_x509_time_is_past( &crl_list->next_update ) ) + flags |= MBEDTLS_X509_BADCRL_EXPIRED; + + if( mbedtls_x509_time_is_future( &crl_list->this_update ) ) + flags |= MBEDTLS_X509_BADCRL_FUTURE; + + /* + * Check if certificate is revoked + */ + if( mbedtls_x509_crt_is_revoked( crt, crl_list ) ) + { + flags |= MBEDTLS_X509_BADCERT_REVOKED; + break; + } + + crl_list = crl_list->next; + } + + return( flags ); +} +#endif /* MBEDTLS_X509_CRL_PARSE_C */ + +/* + * Like memcmp, but case-insensitive and always returns -1 if different + */ +static int x509_memcasecmp( const void *s1, const void *s2, size_t len ) +{ + size_t i; + unsigned char diff; + const unsigned char *n1 = s1, *n2 = s2; + + for( i = 0; i < len; i++ ) + { + diff = n1[i] ^ n2[i]; + + if( diff == 0 ) + continue; + + if( diff == 32 && + ( ( n1[i] >= 'a' && n1[i] <= 'z' ) || + ( n1[i] >= 'A' && n1[i] <= 'Z' ) ) ) + { + continue; + } + + return( -1 ); + } + + return( 0 ); +} + +/* + * Return 0 if name matches wildcard, -1 otherwise + */ +static int x509_check_wildcard( const char *cn, mbedtls_x509_buf *name ) +{ + size_t i; + size_t cn_idx = 0, cn_len = strlen( cn ); + + if( name->len < 3 || name->p[0] != '*' || name->p[1] != '.' ) + return( 0 ); + + for( i = 0; i < cn_len; ++i ) + { + if( cn[i] == '.' ) + { + cn_idx = i; + break; + } + } + + if( cn_idx == 0 ) + return( -1 ); + + if( cn_len - cn_idx == name->len - 1 && + x509_memcasecmp( name->p + 1, cn + cn_idx, name->len - 1 ) == 0 ) + { + return( 0 ); + } + + return( -1 ); +} + +/* + * Compare two X.509 strings, case-insensitive, and allowing for some encoding + * variations (but not all). + * + * Return 0 if equal, -1 otherwise. + */ +static int x509_string_cmp( const mbedtls_x509_buf *a, const mbedtls_x509_buf *b ) +{ + if( a->tag == b->tag && + a->len == b->len && + memcmp( a->p, b->p, b->len ) == 0 ) + { + return( 0 ); + } + + if( ( a->tag == MBEDTLS_ASN1_UTF8_STRING || a->tag == MBEDTLS_ASN1_PRINTABLE_STRING ) && + ( b->tag == MBEDTLS_ASN1_UTF8_STRING || b->tag == MBEDTLS_ASN1_PRINTABLE_STRING ) && + a->len == b->len && + x509_memcasecmp( a->p, b->p, b->len ) == 0 ) + { + return( 0 ); + } + + return( -1 ); +} + +/* + * Compare two X.509 Names (aka rdnSequence). + * + * See RFC 5280 section 7.1, though we don't implement the whole algorithm: + * we sometimes return unequal when the full algorithm would return equal, + * but never the other way. (In particular, we don't do Unicode normalisation + * or space folding.) + * + * Return 0 if equal, -1 otherwise. + */ +static int x509_name_cmp( const mbedtls_x509_name *a, const mbedtls_x509_name *b ) +{ + /* Avoid recursion, it might not be optimised by the compiler */ + while( a != NULL || b != NULL ) + { + if( a == NULL || b == NULL ) + return( -1 ); + + /* type */ + if( a->oid.tag != b->oid.tag || + a->oid.len != b->oid.len || + memcmp( a->oid.p, b->oid.p, b->oid.len ) != 0 ) + { + return( -1 ); + } + + /* value */ + if( x509_string_cmp( &a->val, &b->val ) != 0 ) + return( -1 ); + + /* structure of the list of sets */ + if( a->next_merged != b->next_merged ) + return( -1 ); + + a = a->next; + b = b->next; + } + + /* a == NULL == b */ + return( 0 ); +} + +/* + * Check if 'parent' is a suitable parent (signing CA) for 'child'. + * Return 0 if yes, -1 if not. + * + * top means parent is a locally-trusted certificate + * bottom means child is the end entity cert + */ +static int x509_crt_check_parent( const mbedtls_x509_crt *child, + const mbedtls_x509_crt *parent, + int top, int bottom ) +{ + int need_ca_bit; + + /* Parent must be the issuer */ + if( x509_name_cmp( &child->issuer, &parent->subject ) != 0 ) + return( -1 ); + + /* Parent must have the basicConstraints CA bit set as a general rule */ + need_ca_bit = 1; + + /* Exception: v1/v2 certificates that are locally trusted. */ + if( top && parent->version < 3 ) + need_ca_bit = 0; + + /* Exception: self-signed end-entity certs that are locally trusted. */ + if( top && bottom && + child->raw.len == parent->raw.len && + memcmp( child->raw.p, parent->raw.p, child->raw.len ) == 0 ) + { + need_ca_bit = 0; + } + + if( need_ca_bit && ! parent->ca_istrue ) + return( -1 ); + +#if defined(MBEDTLS_X509_CHECK_KEY_USAGE) + if( need_ca_bit && + mbedtls_x509_crt_check_key_usage( parent, MBEDTLS_X509_KU_KEY_CERT_SIGN ) != 0 ) + { + return( -1 ); + } +#endif + + return( 0 ); +} + +static int x509_crt_verify_top( + mbedtls_x509_crt *child, mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const mbedtls_x509_crt_profile *profile, + int path_cnt, int self_cnt, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ) +{ + int ret; + uint32_t ca_flags = 0; + int check_path_cnt; + unsigned char hash[MBEDTLS_MD_MAX_SIZE]; + const mbedtls_md_info_t *md_info; + + if( mbedtls_x509_time_is_past( &child->valid_to ) ) + *flags |= MBEDTLS_X509_BADCERT_EXPIRED; + + if( mbedtls_x509_time_is_future( &child->valid_from ) ) + *flags |= MBEDTLS_X509_BADCERT_FUTURE; + + if( x509_profile_check_md_alg( profile, child->sig_md ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_MD; + + if( x509_profile_check_pk_alg( profile, child->sig_pk ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_PK; + + /* + * Child is the top of the chain. Check against the trust_ca list. + */ + *flags |= MBEDTLS_X509_BADCERT_NOT_TRUSTED; + + md_info = mbedtls_md_info_from_type( child->sig_md ); + if( md_info == NULL ) + { + /* + * Cannot check 'unknown', no need to try any CA + */ + trust_ca = NULL; + } + else + mbedtls_md( md_info, child->tbs.p, child->tbs.len, hash ); + + for( /* trust_ca */ ; trust_ca != NULL; trust_ca = trust_ca->next ) + { + if( x509_crt_check_parent( child, trust_ca, 1, path_cnt == 0 ) != 0 ) + continue; + + check_path_cnt = path_cnt + 1; + + /* + * Reduce check_path_cnt to check against if top of the chain is + * the same as the trusted CA + */ + if( child->subject_raw.len == trust_ca->subject_raw.len && + memcmp( child->subject_raw.p, trust_ca->subject_raw.p, + child->issuer_raw.len ) == 0 ) + { + check_path_cnt--; + } + + /* Self signed certificates do not count towards the limit */ + if( trust_ca->max_pathlen > 0 && + trust_ca->max_pathlen < check_path_cnt - self_cnt ) + { + continue; + } + + if( mbedtls_pk_verify_ext( child->sig_pk, child->sig_opts, &trust_ca->pk, + child->sig_md, hash, mbedtls_md_get_size( md_info ), + child->sig.p, child->sig.len ) != 0 ) + { + continue; + } + + /* + * Top of chain is signed by a trusted CA + */ + *flags &= ~MBEDTLS_X509_BADCERT_NOT_TRUSTED; + + if( x509_profile_check_key( profile, child->sig_pk, &trust_ca->pk ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_KEY; + + break; + } + + /* + * If top of chain is not the same as the trusted CA send a verify request + * to the callback for any issues with validity and CRL presence for the + * trusted CA certificate. + */ + if( trust_ca != NULL && + ( child->subject_raw.len != trust_ca->subject_raw.len || + memcmp( child->subject_raw.p, trust_ca->subject_raw.p, + child->issuer_raw.len ) != 0 ) ) + { +#if defined(MBEDTLS_X509_CRL_PARSE_C) + /* Check trusted CA's CRL for the chain's top crt */ + *flags |= x509_crt_verifycrl( child, trust_ca, ca_crl, profile ); +#else + ((void) ca_crl); +#endif + + if( mbedtls_x509_time_is_past( &trust_ca->valid_to ) ) + ca_flags |= MBEDTLS_X509_BADCERT_EXPIRED; + + if( mbedtls_x509_time_is_future( &trust_ca->valid_from ) ) + ca_flags |= MBEDTLS_X509_BADCERT_FUTURE; + + if( NULL != f_vrfy ) + { + if( ( ret = f_vrfy( p_vrfy, trust_ca, path_cnt + 1, + &ca_flags ) ) != 0 ) + { + return( ret ); + } + } + } + + /* Call callback on top cert */ + if( NULL != f_vrfy ) + { + if( ( ret = f_vrfy( p_vrfy, child, path_cnt, flags ) ) != 0 ) + return( ret ); + } + + *flags |= ca_flags; + + return( 0 ); +} + +static int x509_crt_verify_child( + mbedtls_x509_crt *child, mbedtls_x509_crt *parent, + mbedtls_x509_crt *trust_ca, mbedtls_x509_crl *ca_crl, + const mbedtls_x509_crt_profile *profile, + int path_cnt, int self_cnt, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ) +{ + int ret; + uint32_t parent_flags = 0; + unsigned char hash[MBEDTLS_MD_MAX_SIZE]; + mbedtls_x509_crt *grandparent; + const mbedtls_md_info_t *md_info; + + /* Counting intermediate self signed certificates */ + if( ( path_cnt != 0 ) && x509_name_cmp( &child->issuer, &child->subject ) == 0 ) + self_cnt++; + + /* path_cnt is 0 for the first intermediate CA */ + if( 1 + path_cnt > MBEDTLS_X509_MAX_INTERMEDIATE_CA ) + { + *flags |= MBEDTLS_X509_BADCERT_NOT_TRUSTED; + return( MBEDTLS_ERR_X509_CERT_VERIFY_FAILED ); + } + + if( mbedtls_x509_time_is_past( &child->valid_to ) ) + *flags |= MBEDTLS_X509_BADCERT_EXPIRED; + + if( mbedtls_x509_time_is_future( &child->valid_from ) ) + *flags |= MBEDTLS_X509_BADCERT_FUTURE; + + if( x509_profile_check_md_alg( profile, child->sig_md ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_MD; + + if( x509_profile_check_pk_alg( profile, child->sig_pk ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_PK; + + md_info = mbedtls_md_info_from_type( child->sig_md ); + if( md_info == NULL ) + { + /* + * Cannot check 'unknown' hash + */ + *flags |= MBEDTLS_X509_BADCERT_NOT_TRUSTED; + } + else + { + mbedtls_md( md_info, child->tbs.p, child->tbs.len, hash ); + + if( x509_profile_check_key( profile, child->sig_pk, &parent->pk ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_KEY; + + if( mbedtls_pk_verify_ext( child->sig_pk, child->sig_opts, &parent->pk, + child->sig_md, hash, mbedtls_md_get_size( md_info ), + child->sig.p, child->sig.len ) != 0 ) + { + *flags |= MBEDTLS_X509_BADCERT_NOT_TRUSTED; + } + } + +#if defined(MBEDTLS_X509_CRL_PARSE_C) + /* Check trusted CA's CRL for the given crt */ + *flags |= x509_crt_verifycrl(child, parent, ca_crl, profile ); +#endif + + /* Look for a grandparent in trusted CAs */ + for( grandparent = trust_ca; + grandparent != NULL; + grandparent = grandparent->next ) + { + if( x509_crt_check_parent( parent, grandparent, + 0, path_cnt == 0 ) == 0 ) + break; + } + + if( grandparent != NULL ) + { + ret = x509_crt_verify_top( parent, grandparent, ca_crl, profile, + path_cnt + 1, self_cnt, &parent_flags, f_vrfy, p_vrfy ); + if( ret != 0 ) + return( ret ); + } + else + { + /* Look for a grandparent upwards the chain */ + for( grandparent = parent->next; + grandparent != NULL; + grandparent = grandparent->next ) + { + /* +2 because the current step is not yet accounted for + * and because max_pathlen is one higher than it should be. + * Also self signed certificates do not count to the limit. */ + if( grandparent->max_pathlen > 0 && + grandparent->max_pathlen < 2 + path_cnt - self_cnt ) + { + continue; + } + + if( x509_crt_check_parent( parent, grandparent, + 0, path_cnt == 0 ) == 0 ) + break; + } + + /* Is our parent part of the chain or at the top? */ + if( grandparent != NULL ) + { + ret = x509_crt_verify_child( parent, grandparent, trust_ca, ca_crl, + profile, path_cnt + 1, self_cnt, &parent_flags, + f_vrfy, p_vrfy ); + if( ret != 0 ) + return( ret ); + } + else + { + ret = x509_crt_verify_top( parent, trust_ca, ca_crl, profile, + path_cnt + 1, self_cnt, &parent_flags, + f_vrfy, p_vrfy ); + if( ret != 0 ) + return( ret ); + } + } + + /* child is verified to be a child of the parent, call verify callback */ + if( NULL != f_vrfy ) + if( ( ret = f_vrfy( p_vrfy, child, path_cnt, flags ) ) != 0 ) + return( ret ); + + *flags |= parent_flags; + + return( 0 ); +} + +/* + * Verify the certificate validity + */ +int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ) +{ + return( mbedtls_x509_crt_verify_with_profile( crt, trust_ca, ca_crl, + &mbedtls_x509_crt_profile_default, cn, flags, f_vrfy, p_vrfy ) ); +} + + +/* + * Verify the certificate validity, with profile + */ +int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const mbedtls_x509_crt_profile *profile, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy ) +{ + size_t cn_len; + int ret; + int pathlen = 0, selfsigned = 0; + mbedtls_x509_crt *parent; + mbedtls_x509_name *name; + mbedtls_x509_sequence *cur = NULL; + mbedtls_pk_type_t pk_type; + + if( profile == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + *flags = 0; + + if( cn != NULL ) + { + name = &crt->subject; + cn_len = strlen( cn ); + + if( crt->ext_types & MBEDTLS_X509_EXT_SUBJECT_ALT_NAME ) + { + cur = &crt->subject_alt_names; + + while( cur != NULL ) + { + if( cur->buf.len == cn_len && + x509_memcasecmp( cn, cur->buf.p, cn_len ) == 0 ) + break; + + if( cur->buf.len > 2 && + memcmp( cur->buf.p, "*.", 2 ) == 0 && + x509_check_wildcard( cn, &cur->buf ) == 0 ) + { + break; + } + + cur = cur->next; + } + + if( cur == NULL ) + *flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH; + } + else + { + while( name != NULL ) + { + if( MBEDTLS_OID_CMP( MBEDTLS_OID_AT_CN, &name->oid ) == 0 ) + { + if( name->val.len == cn_len && + x509_memcasecmp( name->val.p, cn, cn_len ) == 0 ) + break; + + if( name->val.len > 2 && + memcmp( name->val.p, "*.", 2 ) == 0 && + x509_check_wildcard( cn, &name->val ) == 0 ) + break; + } + + name = name->next; + } + + if( name == NULL ) + *flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH; + } + } + + /* Check the type and size of the key */ + pk_type = mbedtls_pk_get_type( &crt->pk ); + + if( x509_profile_check_pk_alg( profile, pk_type ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_PK; + + if( x509_profile_check_key( profile, pk_type, &crt->pk ) != 0 ) + *flags |= MBEDTLS_X509_BADCERT_BAD_KEY; + + /* Look for a parent in trusted CAs */ + for( parent = trust_ca; parent != NULL; parent = parent->next ) + { + if( x509_crt_check_parent( crt, parent, 0, pathlen == 0 ) == 0 ) + break; + } + + if( parent != NULL ) + { + ret = x509_crt_verify_top( crt, parent, ca_crl, profile, + pathlen, selfsigned, flags, f_vrfy, p_vrfy ); + if( ret != 0 ) + return( ret ); + } + else + { + /* Look for a parent upwards the chain */ + for( parent = crt->next; parent != NULL; parent = parent->next ) + if( x509_crt_check_parent( crt, parent, 0, pathlen == 0 ) == 0 ) + break; + + /* Are we part of the chain or at the top? */ + if( parent != NULL ) + { + ret = x509_crt_verify_child( crt, parent, trust_ca, ca_crl, profile, + pathlen, selfsigned, flags, f_vrfy, p_vrfy ); + if( ret != 0 ) + return( ret ); + } + else + { + ret = x509_crt_verify_top( crt, trust_ca, ca_crl, profile, + pathlen, selfsigned, flags, f_vrfy, p_vrfy ); + if( ret != 0 ) + return( ret ); + } + } + + if( *flags != 0 ) + return( MBEDTLS_ERR_X509_CERT_VERIFY_FAILED ); + + return( 0 ); +} + +/* + * Initialize a certificate chain + */ +void mbedtls_x509_crt_init( mbedtls_x509_crt *crt ) +{ + memset( crt, 0, sizeof(mbedtls_x509_crt) ); +} + +/* + * Unallocate all certificate data + */ +void mbedtls_x509_crt_free( mbedtls_x509_crt *crt ) +{ + mbedtls_x509_crt *cert_cur = crt; + mbedtls_x509_crt *cert_prv; + mbedtls_x509_name *name_cur; + mbedtls_x509_name *name_prv; + mbedtls_x509_sequence *seq_cur; + mbedtls_x509_sequence *seq_prv; + + if( crt == NULL ) + return; + + do + { + mbedtls_pk_free( &cert_cur->pk ); + +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) + mbedtls_free( cert_cur->sig_opts ); +#endif + + name_cur = cert_cur->issuer.next; + while( name_cur != NULL ) + { + name_prv = name_cur; + name_cur = name_cur->next; + mbedtls_zeroize( name_prv, sizeof( mbedtls_x509_name ) ); + mbedtls_free( name_prv ); + } + + name_cur = cert_cur->subject.next; + while( name_cur != NULL ) + { + name_prv = name_cur; + name_cur = name_cur->next; + mbedtls_zeroize( name_prv, sizeof( mbedtls_x509_name ) ); + mbedtls_free( name_prv ); + } + + seq_cur = cert_cur->ext_key_usage.next; + while( seq_cur != NULL ) + { + seq_prv = seq_cur; + seq_cur = seq_cur->next; + mbedtls_zeroize( seq_prv, sizeof( mbedtls_x509_sequence ) ); + mbedtls_free( seq_prv ); + } + + seq_cur = cert_cur->subject_alt_names.next; + while( seq_cur != NULL ) + { + seq_prv = seq_cur; + seq_cur = seq_cur->next; + mbedtls_zeroize( seq_prv, sizeof( mbedtls_x509_sequence ) ); + mbedtls_free( seq_prv ); + } + + if( cert_cur->raw.p != NULL ) + { + mbedtls_zeroize( cert_cur->raw.p, cert_cur->raw.len ); + mbedtls_free( cert_cur->raw.p ); + } + + cert_cur = cert_cur->next; + } + while( cert_cur != NULL ); + + cert_cur = crt; + do + { + cert_prv = cert_cur; + cert_cur = cert_cur->next; + + mbedtls_zeroize( cert_prv, sizeof( mbedtls_x509_crt ) ); + if( cert_prv != crt ) + mbedtls_free( cert_prv ); + } + while( cert_cur != NULL ); +} + +#endif /* MBEDTLS_X509_CRT_PARSE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_csr.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_csr.c new file mode 100644 index 0000000..dbf659b --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509_csr.c @@ -0,0 +1,417 @@ +/* + * X.509 Certificate Signing Request (CSR) parsing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * The ITU-T X.509 standard defines a certificate format for PKI. + * + * http://www.ietf.org/rfc/rfc5280.txt (Certificates and CRLs) + * http://www.ietf.org/rfc/rfc3279.txt (Alg IDs for CRLs) + * http://www.ietf.org/rfc/rfc2986.txt (CSRs, aka PKCS#10) + * + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.680-0207.pdf + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.690-0207.pdf + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_X509_CSR_PARSE_C) + +#include "mbedtls/x509_csr.h" +#include "mbedtls/oid.h" + +#include + +#if defined(MBEDTLS_PEM_PARSE_C) +#include "mbedtls/pem.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#include +#define mbedtls_free free +#define mbedtls_calloc calloc +#define mbedtls_snprintf snprintf +#endif + +#if defined(MBEDTLS_FS_IO) || defined(EFIX64) || defined(EFI32) +#include +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * Version ::= INTEGER { v1(0) } + */ +static int x509_csr_get_version( unsigned char **p, + const unsigned char *end, + int *ver ) +{ + int ret; + + if( ( ret = mbedtls_asn1_get_int( p, end, ver ) ) != 0 ) + { + if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) + { + *ver = 0; + return( 0 ); + } + + return( MBEDTLS_ERR_X509_INVALID_VERSION + ret ); + } + + return( 0 ); +} + +/* + * Parse a CSR in DER format + */ +int mbedtls_x509_csr_parse_der( mbedtls_x509_csr *csr, + const unsigned char *buf, size_t buflen ) +{ + int ret; + size_t len; + unsigned char *p, *end; + mbedtls_x509_buf sig_params; + + memset( &sig_params, 0, sizeof( mbedtls_x509_buf ) ); + + /* + * Check for valid input + */ + if( csr == NULL || buf == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + mbedtls_x509_csr_init( csr ); + + /* + * first copy the raw DER data + */ + p = mbedtls_calloc( 1, len = buflen ); + + if( p == NULL ) + return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + + memcpy( p, buf, buflen ); + + csr->raw.p = p; + csr->raw.len = len; + end = p + len; + + /* + * CertificationRequest ::= SEQUENCE { + * certificationRequestInfo CertificationRequestInfo, + * signatureAlgorithm AlgorithmIdentifier, + * signature BIT STRING + * } + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT ); + } + + if( len != (size_t) ( end - p ) ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + /* + * CertificationRequestInfo ::= SEQUENCE { + */ + csr->cri.p = p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + + end = p + len; + csr->cri.len = end - csr->cri.p; + + /* + * Version ::= INTEGER { v1(0) } + */ + if( ( ret = x509_csr_get_version( &p, end, &csr->version ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( ret ); + } + + csr->version++; + + if( csr->version != 1 ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_UNKNOWN_VERSION ); + } + + /* + * subject Name + */ + csr->subject_raw.p = p; + + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + + if( ( ret = mbedtls_x509_get_name( &p, p + len, &csr->subject ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( ret ); + } + + csr->subject_raw.len = p - csr->subject_raw.p; + + /* + * subjectPKInfo SubjectPublicKeyInfo + */ + if( ( ret = mbedtls_pk_parse_subpubkey( &p, end, &csr->pk ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( ret ); + } + + /* + * attributes [0] Attributes + */ + if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_CONTEXT_SPECIFIC ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + ret ); + } + // TODO Parse Attributes / extension requests + + p += len; + + end = csr->raw.p + csr->raw.len; + + /* + * signatureAlgorithm AlgorithmIdentifier, + * signature BIT STRING + */ + if( ( ret = mbedtls_x509_get_alg( &p, end, &csr->sig_oid, &sig_params ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( ret ); + } + + if( ( ret = mbedtls_x509_get_sig_alg( &csr->sig_oid, &sig_params, + &csr->sig_md, &csr->sig_pk, + &csr->sig_opts ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG ); + } + + if( ( ret = mbedtls_x509_get_sig( &p, end, &csr->sig ) ) != 0 ) + { + mbedtls_x509_csr_free( csr ); + return( ret ); + } + + if( p != end ) + { + mbedtls_x509_csr_free( csr ); + return( MBEDTLS_ERR_X509_INVALID_FORMAT + + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + } + + return( 0 ); +} + +/* + * Parse a CSR, allowing for PEM or raw DER encoding + */ +int mbedtls_x509_csr_parse( mbedtls_x509_csr *csr, const unsigned char *buf, size_t buflen ) +{ + int ret; +#if defined(MBEDTLS_PEM_PARSE_C) + size_t use_len; + mbedtls_pem_context pem; +#endif + + /* + * Check for valid input + */ + if( csr == NULL || buf == NULL ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + +#if defined(MBEDTLS_PEM_PARSE_C) + mbedtls_pem_init( &pem ); + + /* Avoid calling mbedtls_pem_read_buffer() on non-null-terminated string */ + if( buflen == 0 || buf[buflen - 1] != '\0' ) + ret = MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT; + else + ret = mbedtls_pem_read_buffer( &pem, + "-----BEGIN CERTIFICATE REQUEST-----", + "-----END CERTIFICATE REQUEST-----", + buf, NULL, 0, &use_len ); + + if( ret == 0 ) + { + /* + * Was PEM encoded, parse the result + */ + if( ( ret = mbedtls_x509_csr_parse_der( csr, pem.buf, pem.buflen ) ) != 0 ) + return( ret ); + + mbedtls_pem_free( &pem ); + return( 0 ); + } + else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) + { + mbedtls_pem_free( &pem ); + return( ret ); + } + else +#endif /* MBEDTLS_PEM_PARSE_C */ + return( mbedtls_x509_csr_parse_der( csr, buf, buflen ) ); +} + +#if defined(MBEDTLS_FS_IO) +/* + * Load a CSR into the structure + */ +int mbedtls_x509_csr_parse_file( mbedtls_x509_csr *csr, const char *path ) +{ + int ret; + size_t n; + unsigned char *buf; + + if( ( ret = mbedtls_pk_load_file( path, &buf, &n ) ) != 0 ) + return( ret ); + + ret = mbedtls_x509_csr_parse( csr, buf, n ); + + mbedtls_zeroize( buf, n ); + mbedtls_free( buf ); + + return( ret ); +} +#endif /* MBEDTLS_FS_IO */ + +#define BEFORE_COLON 14 +#define BC "14" +/* + * Return an informational string about the CSR. + */ +int mbedtls_x509_csr_info( char *buf, size_t size, const char *prefix, + const mbedtls_x509_csr *csr ) +{ + int ret; + size_t n; + char *p; + char key_size_str[BEFORE_COLON]; + + p = buf; + n = size; + + ret = mbedtls_snprintf( p, n, "%sCSR version : %d", + prefix, csr->version ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%ssubject name : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + ret = mbedtls_x509_dn_gets( p, n, &csr->subject ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_snprintf( p, n, "\n%ssigned using : ", prefix ); + MBEDTLS_X509_SAFE_SNPRINTF; + + ret = mbedtls_x509_sig_alg_gets( p, n, &csr->sig_oid, csr->sig_pk, csr->sig_md, + csr->sig_opts ); + MBEDTLS_X509_SAFE_SNPRINTF; + + if( ( ret = mbedtls_x509_key_size_helper( key_size_str, BEFORE_COLON, + mbedtls_pk_get_name( &csr->pk ) ) ) != 0 ) + { + return( ret ); + } + + ret = mbedtls_snprintf( p, n, "\n%s%-" BC "s: %d bits\n", prefix, key_size_str, + (int) mbedtls_pk_get_bitlen( &csr->pk ) ); + MBEDTLS_X509_SAFE_SNPRINTF; + + return( (int) ( size - n ) ); +} + +/* + * Initialize a CSR + */ +void mbedtls_x509_csr_init( mbedtls_x509_csr *csr ) +{ + memset( csr, 0, sizeof(mbedtls_x509_csr) ); +} + +/* + * Unallocate all CSR data + */ +void mbedtls_x509_csr_free( mbedtls_x509_csr *csr ) +{ + mbedtls_x509_name *name_cur; + mbedtls_x509_name *name_prv; + + if( csr == NULL ) + return; + + mbedtls_pk_free( &csr->pk ); + +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) + mbedtls_free( csr->sig_opts ); +#endif + + name_cur = csr->subject.next; + while( name_cur != NULL ) + { + name_prv = name_cur; + name_cur = name_cur->next; + mbedtls_zeroize( name_prv, sizeof( mbedtls_x509_name ) ); + mbedtls_free( name_prv ); + } + + if( csr->raw.p != NULL ) + { + mbedtls_zeroize( csr->raw.p, csr->raw.len ); + mbedtls_free( csr->raw.p ); + } + + mbedtls_zeroize( csr, sizeof( mbedtls_x509_csr ) ); +} + +#endif /* MBEDTLS_X509_CSR_PARSE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509write_crt.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509write_crt.c new file mode 100644 index 0000000..9041d44 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509write_crt.c @@ -0,0 +1,456 @@ +/* + * X.509 certificate writing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * References: + * - certificates: RFC 5280, updated by RFC 6818 + * - CSRs: PKCS#10 v1.7 aka RFC 2986 + * - attributes: PKCS#9 v2.0 aka RFC 2985 + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_X509_CRT_WRITE_C) + +#include "mbedtls/x509_crt.h" +#include "mbedtls/oid.h" +#include "mbedtls/asn1write.h" +#include "mbedtls/sha1.h" + +#include + +#if defined(MBEDTLS_PEM_WRITE_C) +#include "mbedtls/pem.h" +#endif /* MBEDTLS_PEM_WRITE_C */ + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +void mbedtls_x509write_crt_init( mbedtls_x509write_cert *ctx ) +{ + memset( ctx, 0, sizeof(mbedtls_x509write_cert) ); + + mbedtls_mpi_init( &ctx->serial ); + ctx->version = MBEDTLS_X509_CRT_VERSION_3; +} + +void mbedtls_x509write_crt_free( mbedtls_x509write_cert *ctx ) +{ + mbedtls_mpi_free( &ctx->serial ); + + mbedtls_asn1_free_named_data_list( &ctx->subject ); + mbedtls_asn1_free_named_data_list( &ctx->issuer ); + mbedtls_asn1_free_named_data_list( &ctx->extensions ); + + mbedtls_zeroize( ctx, sizeof(mbedtls_x509write_cert) ); +} + +void mbedtls_x509write_crt_set_version( mbedtls_x509write_cert *ctx, int version ) +{ + ctx->version = version; +} + +void mbedtls_x509write_crt_set_md_alg( mbedtls_x509write_cert *ctx, mbedtls_md_type_t md_alg ) +{ + ctx->md_alg = md_alg; +} + +void mbedtls_x509write_crt_set_subject_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key ) +{ + ctx->subject_key = key; +} + +void mbedtls_x509write_crt_set_issuer_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key ) +{ + ctx->issuer_key = key; +} + +int mbedtls_x509write_crt_set_subject_name( mbedtls_x509write_cert *ctx, + const char *subject_name ) +{ + return mbedtls_x509_string_to_names( &ctx->subject, subject_name ); +} + +int mbedtls_x509write_crt_set_issuer_name( mbedtls_x509write_cert *ctx, + const char *issuer_name ) +{ + return mbedtls_x509_string_to_names( &ctx->issuer, issuer_name ); +} + +int mbedtls_x509write_crt_set_serial( mbedtls_x509write_cert *ctx, const mbedtls_mpi *serial ) +{ + int ret; + + if( ( ret = mbedtls_mpi_copy( &ctx->serial, serial ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +int mbedtls_x509write_crt_set_validity( mbedtls_x509write_cert *ctx, const char *not_before, + const char *not_after ) +{ + if( strlen( not_before ) != MBEDTLS_X509_RFC5280_UTC_TIME_LEN - 1 || + strlen( not_after ) != MBEDTLS_X509_RFC5280_UTC_TIME_LEN - 1 ) + { + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + } + strncpy( ctx->not_before, not_before, MBEDTLS_X509_RFC5280_UTC_TIME_LEN ); + strncpy( ctx->not_after , not_after , MBEDTLS_X509_RFC5280_UTC_TIME_LEN ); + ctx->not_before[MBEDTLS_X509_RFC5280_UTC_TIME_LEN - 1] = 'Z'; + ctx->not_after[MBEDTLS_X509_RFC5280_UTC_TIME_LEN - 1] = 'Z'; + + return( 0 ); +} + +int mbedtls_x509write_crt_set_extension( mbedtls_x509write_cert *ctx, + const char *oid, size_t oid_len, + int critical, + const unsigned char *val, size_t val_len ) +{ + return mbedtls_x509_set_extension( &ctx->extensions, oid, oid_len, + critical, val, val_len ); +} + +int mbedtls_x509write_crt_set_basic_constraints( mbedtls_x509write_cert *ctx, + int is_ca, int max_pathlen ) +{ + int ret; + unsigned char buf[9]; + unsigned char *c = buf + sizeof(buf); + size_t len = 0; + + memset( buf, 0, sizeof(buf) ); + + if( is_ca && max_pathlen > 127 ) + return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + + if( is_ca ) + { + if( max_pathlen >= 0 ) + { + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_int( &c, buf, max_pathlen ) ); + } + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_bool( &c, buf, 1 ) ); + } + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return mbedtls_x509write_crt_set_extension( ctx, MBEDTLS_OID_BASIC_CONSTRAINTS, + MBEDTLS_OID_SIZE( MBEDTLS_OID_BASIC_CONSTRAINTS ), + 0, buf + sizeof(buf) - len, len ); +} + +#if defined(MBEDTLS_SHA1_C) +int mbedtls_x509write_crt_set_subject_key_identifier( mbedtls_x509write_cert *ctx ) +{ + int ret; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE * 2 + 20]; /* tag, length + 2xMPI */ + unsigned char *c = buf + sizeof(buf); + size_t len = 0; + + memset( buf, 0, sizeof(buf) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_pk_write_pubkey( &c, buf, ctx->subject_key ) ); + + mbedtls_sha1( buf + sizeof(buf) - len, len, buf + sizeof(buf) - 20 ); + c = buf + sizeof(buf) - 20; + len = 20; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_OCTET_STRING ) ); + + return mbedtls_x509write_crt_set_extension( ctx, MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER, + MBEDTLS_OID_SIZE( MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER ), + 0, buf + sizeof(buf) - len, len ); +} + +int mbedtls_x509write_crt_set_authority_key_identifier( mbedtls_x509write_cert *ctx ) +{ + int ret; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE * 2 + 20]; /* tag, length + 2xMPI */ + unsigned char *c = buf + sizeof(buf); + size_t len = 0; + + memset( buf, 0, sizeof(buf) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_pk_write_pubkey( &c, buf, ctx->issuer_key ) ); + + mbedtls_sha1( buf + sizeof(buf) - len, len, buf + sizeof(buf) - 20 ); + c = buf + sizeof(buf) - 20; + len = 20; + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_CONTEXT_SPECIFIC | 0 ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return mbedtls_x509write_crt_set_extension( ctx, MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER, + MBEDTLS_OID_SIZE( MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER ), + 0, buf + sizeof(buf) - len, len ); +} +#endif /* MBEDTLS_SHA1_C */ + +int mbedtls_x509write_crt_set_key_usage( mbedtls_x509write_cert *ctx, + unsigned int key_usage ) +{ + unsigned char buf[4], ku; + unsigned char *c; + int ret; + + /* We currently only support 7 bits, from 0x80 to 0x02 */ + if( ( key_usage & ~0xfe ) != 0 ) + return( MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ); + + c = buf + 4; + ku = (unsigned char) key_usage; + + if( ( ret = mbedtls_asn1_write_bitstring( &c, buf, &ku, 7 ) ) != 4 ) + return( ret ); + + ret = mbedtls_x509write_crt_set_extension( ctx, MBEDTLS_OID_KEY_USAGE, + MBEDTLS_OID_SIZE( MBEDTLS_OID_KEY_USAGE ), + 1, buf, 4 ); + if( ret != 0 ) + return( ret ); + + return( 0 ); +} + +int mbedtls_x509write_crt_set_ns_cert_type( mbedtls_x509write_cert *ctx, + unsigned char ns_cert_type ) +{ + unsigned char buf[4]; + unsigned char *c; + int ret; + + c = buf + 4; + + if( ( ret = mbedtls_asn1_write_bitstring( &c, buf, &ns_cert_type, 8 ) ) != 4 ) + return( ret ); + + ret = mbedtls_x509write_crt_set_extension( ctx, MBEDTLS_OID_NS_CERT_TYPE, + MBEDTLS_OID_SIZE( MBEDTLS_OID_NS_CERT_TYPE ), + 0, buf, 4 ); + if( ret != 0 ) + return( ret ); + + return( 0 ); +} + +static int x509_write_time( unsigned char **p, unsigned char *start, + const char *time, size_t size ) +{ + int ret; + size_t len = 0; + + /* + * write MBEDTLS_ASN1_UTC_TIME if year < 2050 (2 bytes shorter) + */ + if( time[0] == '2' && time[1] == '0' && time [2] < '5' ) + { + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, + (const unsigned char *) time + 2, + size - 2 ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_UTC_TIME ) ); + } + else + { + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_raw_buffer( p, start, + (const unsigned char *) time, + size ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( p, start, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( p, start, MBEDTLS_ASN1_GENERALIZED_TIME ) ); + } + + return( (int) len ); +} + +int mbedtls_x509write_crt_der( mbedtls_x509write_cert *ctx, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + const char *sig_oid; + size_t sig_oid_len = 0; + unsigned char *c, *c2; + unsigned char hash[64]; + unsigned char sig[MBEDTLS_MPI_MAX_SIZE]; + unsigned char tmp_buf[2048]; + size_t sub_len = 0, pub_len = 0, sig_and_oid_len = 0, sig_len; + size_t len = 0; + mbedtls_pk_type_t pk_alg; + + /* + * Prepare data to be signed in tmp_buf + */ + c = tmp_buf + sizeof( tmp_buf ); + + /* Signature algorithm needed in TBS, and later for actual signature */ + pk_alg = mbedtls_pk_get_type( ctx->issuer_key ); + if( pk_alg == MBEDTLS_PK_ECKEY ) + pk_alg = MBEDTLS_PK_ECDSA; + + if( ( ret = mbedtls_oid_get_oid_by_sig_alg( pk_alg, ctx->md_alg, + &sig_oid, &sig_oid_len ) ) != 0 ) + { + return( ret ); + } + + /* + * Extensions ::= SEQUENCE SIZE (1..MAX) OF Extension + */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_x509_write_extensions( &c, tmp_buf, ctx->extensions ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONTEXT_SPECIFIC | + MBEDTLS_ASN1_CONSTRUCTED | 3 ) ); + + /* + * SubjectPublicKeyInfo + */ + MBEDTLS_ASN1_CHK_ADD( pub_len, mbedtls_pk_write_pubkey_der( ctx->subject_key, + tmp_buf, c - tmp_buf ) ); + c -= pub_len; + len += pub_len; + + /* + * Subject ::= Name + */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_x509_write_names( &c, tmp_buf, ctx->subject ) ); + + /* + * Validity ::= SEQUENCE { + * notBefore Time, + * notAfter Time } + */ + sub_len = 0; + + MBEDTLS_ASN1_CHK_ADD( sub_len, x509_write_time( &c, tmp_buf, ctx->not_after, + MBEDTLS_X509_RFC5280_UTC_TIME_LEN ) ); + + MBEDTLS_ASN1_CHK_ADD( sub_len, x509_write_time( &c, tmp_buf, ctx->not_before, + MBEDTLS_X509_RFC5280_UTC_TIME_LEN ) ); + + len += sub_len; + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, sub_len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + /* + * Issuer ::= Name + */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_x509_write_names( &c, tmp_buf, ctx->issuer ) ); + + /* + * Signature ::= AlgorithmIdentifier + */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_algorithm_identifier( &c, tmp_buf, + sig_oid, strlen( sig_oid ), 0 ) ); + + /* + * Serial ::= INTEGER + */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_mpi( &c, tmp_buf, &ctx->serial ) ); + + /* + * Version ::= INTEGER { v1(0), v2(1), v3(2) } + */ + sub_len = 0; + MBEDTLS_ASN1_CHK_ADD( sub_len, mbedtls_asn1_write_int( &c, tmp_buf, ctx->version ) ); + len += sub_len; + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, sub_len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONTEXT_SPECIFIC | + MBEDTLS_ASN1_CONSTRUCTED | 0 ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + /* + * Make signature + */ + mbedtls_md( mbedtls_md_info_from_type( ctx->md_alg ), c, len, hash ); + + if( ( ret = mbedtls_pk_sign( ctx->issuer_key, ctx->md_alg, hash, 0, sig, &sig_len, + f_rng, p_rng ) ) != 0 ) + { + return( ret ); + } + + /* + * Write data to output buffer + */ + c2 = buf + size; + MBEDTLS_ASN1_CHK_ADD( sig_and_oid_len, mbedtls_x509_write_sig( &c2, buf, + sig_oid, sig_oid_len, sig, sig_len ) ); + + c2 -= len; + memcpy( c2, c, len ); + + len += sig_and_oid_len; + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c2, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c2, buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return( (int) len ); +} + +#define PEM_BEGIN_CRT "-----BEGIN CERTIFICATE-----\n" +#define PEM_END_CRT "-----END CERTIFICATE-----\n" + +#if defined(MBEDTLS_PEM_WRITE_C) +int mbedtls_x509write_crt_pem( mbedtls_x509write_cert *crt, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + unsigned char output_buf[4096]; + size_t olen = 0; + + if( ( ret = mbedtls_x509write_crt_der( crt, output_buf, sizeof(output_buf), + f_rng, p_rng ) ) < 0 ) + { + return( ret ); + } + + if( ( ret = mbedtls_pem_write_buffer( PEM_BEGIN_CRT, PEM_END_CRT, + output_buf + sizeof(output_buf) - ret, + ret, buf, size, &olen ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_PEM_WRITE_C */ + +#endif /* MBEDTLS_X509_CRT_WRITE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509write_csr.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509write_csr.c new file mode 100644 index 0000000..0b9a285 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/x509write_csr.c @@ -0,0 +1,256 @@ +/* + * X.509 Certificate Signing Request writing + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +/* + * References: + * - CSRs: PKCS#10 v1.7 aka RFC 2986 + * - attributes: PKCS#9 v2.0 aka RFC 2985 + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_X509_CSR_WRITE_C) + +#include "mbedtls/x509_csr.h" +#include "mbedtls/oid.h" +#include "mbedtls/asn1write.h" + +#include +#include + +#if defined(MBEDTLS_PEM_WRITE_C) +#include "mbedtls/pem.h" +#endif + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +void mbedtls_x509write_csr_init( mbedtls_x509write_csr *ctx ) +{ + memset( ctx, 0, sizeof(mbedtls_x509write_csr) ); +} + +void mbedtls_x509write_csr_free( mbedtls_x509write_csr *ctx ) +{ + mbedtls_asn1_free_named_data_list( &ctx->subject ); + mbedtls_asn1_free_named_data_list( &ctx->extensions ); + + mbedtls_zeroize( ctx, sizeof(mbedtls_x509write_csr) ); +} + +void mbedtls_x509write_csr_set_md_alg( mbedtls_x509write_csr *ctx, mbedtls_md_type_t md_alg ) +{ + ctx->md_alg = md_alg; +} + +void mbedtls_x509write_csr_set_key( mbedtls_x509write_csr *ctx, mbedtls_pk_context *key ) +{ + ctx->key = key; +} + +int mbedtls_x509write_csr_set_subject_name( mbedtls_x509write_csr *ctx, + const char *subject_name ) +{ + return mbedtls_x509_string_to_names( &ctx->subject, subject_name ); +} + +int mbedtls_x509write_csr_set_extension( mbedtls_x509write_csr *ctx, + const char *oid, size_t oid_len, + const unsigned char *val, size_t val_len ) +{ + return mbedtls_x509_set_extension( &ctx->extensions, oid, oid_len, + 0, val, val_len ); +} + +int mbedtls_x509write_csr_set_key_usage( mbedtls_x509write_csr *ctx, unsigned char key_usage ) +{ + unsigned char buf[4]; + unsigned char *c; + int ret; + + c = buf + 4; + + if( ( ret = mbedtls_asn1_write_bitstring( &c, buf, &key_usage, 7 ) ) != 4 ) + return( ret ); + + ret = mbedtls_x509write_csr_set_extension( ctx, MBEDTLS_OID_KEY_USAGE, + MBEDTLS_OID_SIZE( MBEDTLS_OID_KEY_USAGE ), + buf, 4 ); + if( ret != 0 ) + return( ret ); + + return( 0 ); +} + +int mbedtls_x509write_csr_set_ns_cert_type( mbedtls_x509write_csr *ctx, + unsigned char ns_cert_type ) +{ + unsigned char buf[4]; + unsigned char *c; + int ret; + + c = buf + 4; + + if( ( ret = mbedtls_asn1_write_bitstring( &c, buf, &ns_cert_type, 8 ) ) != 4 ) + return( ret ); + + ret = mbedtls_x509write_csr_set_extension( ctx, MBEDTLS_OID_NS_CERT_TYPE, + MBEDTLS_OID_SIZE( MBEDTLS_OID_NS_CERT_TYPE ), + buf, 4 ); + if( ret != 0 ) + return( ret ); + + return( 0 ); +} + +int mbedtls_x509write_csr_der( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + const char *sig_oid; + size_t sig_oid_len = 0; + unsigned char *c, *c2; + unsigned char hash[64]; + unsigned char sig[MBEDTLS_MPI_MAX_SIZE]; + unsigned char tmp_buf[2048]; + size_t pub_len = 0, sig_and_oid_len = 0, sig_len; + size_t len = 0; + mbedtls_pk_type_t pk_alg; + + /* + * Prepare data to be signed in tmp_buf + */ + c = tmp_buf + sizeof( tmp_buf ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_x509_write_extensions( &c, tmp_buf, ctx->extensions ) ); + + if( len ) + { + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SET ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_oid( &c, tmp_buf, MBEDTLS_OID_PKCS9_CSR_EXT_REQ, + MBEDTLS_OID_SIZE( MBEDTLS_OID_PKCS9_CSR_EXT_REQ ) ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + } + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_CONTEXT_SPECIFIC ) ); + + MBEDTLS_ASN1_CHK_ADD( pub_len, mbedtls_pk_write_pubkey_der( ctx->key, + tmp_buf, c - tmp_buf ) ); + c -= pub_len; + len += pub_len; + + /* + * Subject ::= Name + */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_x509_write_names( &c, tmp_buf, ctx->subject ) ); + + /* + * Version ::= INTEGER { v1(0), v2(1), v3(2) } + */ + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_int( &c, tmp_buf, 0 ) ); + + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c, tmp_buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c, tmp_buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + /* + * Prepare signature + */ + mbedtls_md( mbedtls_md_info_from_type( ctx->md_alg ), c, len, hash ); + + pk_alg = mbedtls_pk_get_type( ctx->key ); + if( pk_alg == MBEDTLS_PK_ECKEY ) + pk_alg = MBEDTLS_PK_ECDSA; + + if( ( ret = mbedtls_pk_sign( ctx->key, ctx->md_alg, hash, 0, sig, &sig_len, + f_rng, p_rng ) ) != 0 || + ( ret = mbedtls_oid_get_oid_by_sig_alg( pk_alg, ctx->md_alg, + &sig_oid, &sig_oid_len ) ) != 0 ) + { + return( ret ); + } + + /* + * Write data to output buffer + */ + c2 = buf + size; + MBEDTLS_ASN1_CHK_ADD( sig_and_oid_len, mbedtls_x509_write_sig( &c2, buf, + sig_oid, sig_oid_len, sig, sig_len ) ); + + c2 -= len; + memcpy( c2, c, len ); + + len += sig_and_oid_len; + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_len( &c2, buf, len ) ); + MBEDTLS_ASN1_CHK_ADD( len, mbedtls_asn1_write_tag( &c2, buf, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE ) ); + + return( (int) len ); +} + +#define PEM_BEGIN_CSR "-----BEGIN CERTIFICATE REQUEST-----\n" +#define PEM_END_CSR "-----END CERTIFICATE REQUEST-----\n" + +#if defined(MBEDTLS_PEM_WRITE_C) +int mbedtls_x509write_csr_pem( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ) +{ + int ret; + unsigned char output_buf[4096]; + size_t olen = 0; + + if( ( ret = mbedtls_x509write_csr_der( ctx, output_buf, sizeof(output_buf), + f_rng, p_rng ) ) < 0 ) + { + return( ret ); + } + + if( ( ret = mbedtls_pem_write_buffer( PEM_BEGIN_CSR, PEM_END_CSR, + output_buf + sizeof(output_buf) - ret, + ret, buf, size, &olen ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} +#endif /* MBEDTLS_PEM_WRITE_C */ + +#endif /* MBEDTLS_X509_CSR_WRITE_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/xtea.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/xtea.c new file mode 100644 index 0000000..fe0a350 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/library/xtea.c @@ -0,0 +1,281 @@ +/* + * An 32-bit implementation of the XTEA algorithm + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_XTEA_C) + +#include "mbedtls/xtea.h" + +#include + +#if defined(MBEDTLS_SELF_TEST) +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_C */ +#endif /* MBEDTLS_SELF_TEST */ + +#if !defined(MBEDTLS_XTEA_ALT) + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +{ \ + (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ + | ( (uint32_t) (b)[(i) + 1] << 16 ) \ + | ( (uint32_t) (b)[(i) + 2] << 8 ) \ + | ( (uint32_t) (b)[(i) + 3] ); \ +} +#endif + +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +void mbedtls_xtea_init( mbedtls_xtea_context *ctx ) +{ + memset( ctx, 0, sizeof( mbedtls_xtea_context ) ); +} + +void mbedtls_xtea_free( mbedtls_xtea_context *ctx ) +{ + if( ctx == NULL ) + return; + + mbedtls_zeroize( ctx, sizeof( mbedtls_xtea_context ) ); +} + +/* + * XTEA key schedule + */ +void mbedtls_xtea_setup( mbedtls_xtea_context *ctx, const unsigned char key[16] ) +{ + int i; + + memset( ctx, 0, sizeof(mbedtls_xtea_context) ); + + for( i = 0; i < 4; i++ ) + { + GET_UINT32_BE( ctx->k[i], key, i << 2 ); + } +} + +/* + * XTEA encrypt function + */ +int mbedtls_xtea_crypt_ecb( mbedtls_xtea_context *ctx, int mode, + const unsigned char input[8], unsigned char output[8]) +{ + uint32_t *k, v0, v1, i; + + k = ctx->k; + + GET_UINT32_BE( v0, input, 0 ); + GET_UINT32_BE( v1, input, 4 ); + + if( mode == MBEDTLS_XTEA_ENCRYPT ) + { + uint32_t sum = 0, delta = 0x9E3779B9; + + for( i = 0; i < 32; i++ ) + { + v0 += (((v1 << 4) ^ (v1 >> 5)) + v1) ^ (sum + k[sum & 3]); + sum += delta; + v1 += (((v0 << 4) ^ (v0 >> 5)) + v0) ^ (sum + k[(sum>>11) & 3]); + } + } + else /* MBEDTLS_XTEA_DECRYPT */ + { + uint32_t delta = 0x9E3779B9, sum = delta * 32; + + for( i = 0; i < 32; i++ ) + { + v1 -= (((v0 << 4) ^ (v0 >> 5)) + v0) ^ (sum + k[(sum>>11) & 3]); + sum -= delta; + v0 -= (((v1 << 4) ^ (v1 >> 5)) + v1) ^ (sum + k[sum & 3]); + } + } + + PUT_UINT32_BE( v0, output, 0 ); + PUT_UINT32_BE( v1, output, 4 ); + + return( 0 ); +} + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/* + * XTEA-CBC buffer encryption/decryption + */ +int mbedtls_xtea_crypt_cbc( mbedtls_xtea_context *ctx, int mode, size_t length, + unsigned char iv[8], const unsigned char *input, + unsigned char *output) +{ + int i; + unsigned char temp[8]; + + if( length % 8 ) + return( MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH ); + + if( mode == MBEDTLS_XTEA_DECRYPT ) + { + while( length > 0 ) + { + memcpy( temp, input, 8 ); + mbedtls_xtea_crypt_ecb( ctx, mode, input, output ); + + for( i = 0; i < 8; i++ ) + output[i] = (unsigned char)( output[i] ^ iv[i] ); + + memcpy( iv, temp, 8 ); + + input += 8; + output += 8; + length -= 8; + } + } + else + { + while( length > 0 ) + { + for( i = 0; i < 8; i++ ) + output[i] = (unsigned char)( input[i] ^ iv[i] ); + + mbedtls_xtea_crypt_ecb( ctx, mode, output, output ); + memcpy( iv, output, 8 ); + + input += 8; + output += 8; + length -= 8; + } + } + + return( 0 ); +} +#endif /* MBEDTLS_CIPHER_MODE_CBC */ +#endif /* !MBEDTLS_XTEA_ALT */ + +#if defined(MBEDTLS_SELF_TEST) + +/* + * XTEA tests vectors (non-official) + */ + +static const unsigned char xtea_test_key[6][16] = +{ + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, + 0x0c, 0x0d, 0x0e, 0x0f }, + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, + 0x0c, 0x0d, 0x0e, 0x0f }, + { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, + 0x0c, 0x0d, 0x0e, 0x0f }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 } +}; + +static const unsigned char xtea_test_pt[6][8] = +{ + { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48 }, + { 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41 }, + { 0x5a, 0x5b, 0x6e, 0x27, 0x89, 0x48, 0xd7, 0x7f }, + { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48 }, + { 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41 }, + { 0x70, 0xe1, 0x22, 0x5d, 0x6e, 0x4e, 0x76, 0x55 } +}; + +static const unsigned char xtea_test_ct[6][8] = +{ + { 0x49, 0x7d, 0xf3, 0xd0, 0x72, 0x61, 0x2c, 0xb5 }, + { 0xe7, 0x8f, 0x2d, 0x13, 0x74, 0x43, 0x41, 0xd8 }, + { 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41 }, + { 0xa0, 0x39, 0x05, 0x89, 0xf8, 0xb8, 0xef, 0xa5 }, + { 0xed, 0x23, 0x37, 0x5a, 0x82, 0x1a, 0x8c, 0x2d }, + { 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41 } +}; + +/* + * Checkup routine + */ +int mbedtls_xtea_self_test( int verbose ) +{ + int i, ret = 0; + unsigned char buf[8]; + mbedtls_xtea_context ctx; + + mbedtls_xtea_init( &ctx ); + for( i = 0; i < 6; i++ ) + { + if( verbose != 0 ) + mbedtls_printf( " XTEA test #%d: ", i + 1 ); + + memcpy( buf, xtea_test_pt[i], 8 ); + + mbedtls_xtea_setup( &ctx, xtea_test_key[i] ); + mbedtls_xtea_crypt_ecb( &ctx, MBEDTLS_XTEA_ENCRYPT, buf, buf ); + + if( memcmp( buf, xtea_test_ct[i], 8 ) != 0 ) + { + if( verbose != 0 ) + mbedtls_printf( "failed\n" ); + + ret = 1; + goto exit; + } + + if( verbose != 0 ) + mbedtls_printf( "passed\n" ); + } + + if( verbose != 0 ) + mbedtls_printf( "\n" ); + +exit: + mbedtls_xtea_free( &ctx ); + + return( ret ); +} + +#endif /* MBEDTLS_SELF_TEST */ + +#endif /* MBEDTLS_XTEA_C */ diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/Makefile b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/Makefile new file mode 100644 index 0000000..749b478 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/Makefile @@ -0,0 +1,46 @@ + +############################################################# +# Required variables for each makefile +# Discard this section from all parent makefiles +# Expected variables (with automatic defaults): +# CSRCS (all "C" files in the dir) +# SUBDIRS (all subdirs with a Makefile) +# GEN_LIBS - list of libs to be generated () +# GEN_IMAGES - list of images to be generated () +# COMPONENTS_xxx - a list of libs/objs in the form +# subdir/lib to be extracted and rolled up into +# a generated lib/image xxx.a () +# +ifndef PDIR + +GEN_LIBS = libplatform.a + +endif + + +############################################################# +# Configuration i.e. compile options etc. +# Target specific stuff (defines etc.) goes in here! +# Generally values applying to a tree are captured in the +# makefile at its root level - these are then overridden +# for a subtree within the makefile rooted therein +# +#DEFINES += + +############################################################# +# Recursion Magic - Don't touch this!! +# +# Each subtree potentially has an include directory +# corresponding to the common APIs applicable to modules +# rooted at that subtree. Accordingly, the INCLUDE PATH +# of a module can only contain the include directories up +# its parent path, and not its siblings +# +# Required for each makefile to inherit from the parent +# + +INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES += -I ./ +PDIR := ../$(PDIR) +sinclude $(PDIR)Makefile + diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/esp_hardware.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/esp_hardware.c new file mode 100644 index 0000000..d57441f --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/esp_hardware.c @@ -0,0 +1,51 @@ +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2016 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#include +#include "osapi.h" + +#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT) +/** + * \brief Entropy poll callback for a hardware source + * + * \warning This is not provided by mbed TLS! + * See \c MBEDTLS_ENTROPY_HARDWARE_ALT in config.h. + * + * \note This must accept NULL as its first argument. + */ +int mbedtls_hardware_poll( void *data, + unsigned char *output, size_t len, size_t *olen ) +{ + os_get_random(output, len); + *olen = len; + return 0; +} +#endif + diff --git a/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/net.c b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/net.c new file mode 100644 index 0000000..e0692e6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/third_party/mbedtls/platform/net.c @@ -0,0 +1,440 @@ +/* + * TCP/IP or UDP/IP networking functions + * modified for LWIP support on ESP8266 + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * Additions Copyright (C) 2015 Angus Gratton + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ +//#define MBEDTLS_CONFIG_FILE +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if !defined(MBEDTLS_NET_C) + +#include "mbedtls/net.h" + +#include +// +#include +#include +//#include +#include +#include "lwip/netdb.h" +#include +// +#include +#include +// +#include +// +#include + +/* + * Prepare for using the sockets interface + */ +static int net_prepare( void ) +{ +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + WSADATA wsaData; + + if( wsa_init_done == 0 ) + { + if( WSAStartup( MAKEWORD(2,0), &wsaData ) != 0 ) + return( MBEDTLS_ERR_NET_SOCKET_FAILED ); + + wsa_init_done = 1; + } +#else +#endif + return( 0 ); +} + +/* + * Initialize a context + */ +void mbedtls_net_init( mbedtls_net_context *ctx ) +{ + ctx->fd = -1; +} + +/* + * Initiate a TCP connection with host:port and the given protocol + */ +int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char *port, int proto ) +{ + int ret; + uint32 ports = getul((char*)port); + struct sockaddr_in client_addr; + struct sockaddr_in server_addr; + + if( ( ret = net_prepare() ) != 0 ) + return( ret ); + + client_addr.sin_family = AF_INET; + client_addr.sin_addr.s_addr = htons(IPADDR_ANY); + client_addr.sin_port = htons(0); + + ctx->fd = socket(AF_INET, SOCK_STREAM,IPPROTO_TCP); + if( ctx->fd < 0 ){ + ret = MBEDTLS_ERR_NET_SOCKET_FAILED; + os_printf("Create Socket Failed!\n"); + goto mbedtls_error; + } + + if (bind(ctx->fd, (struct sockaddr*)&client_addr,sizeof(client_addr))) { + ret = MBEDTLS_ERR_NET_BIND_FAILED; + os_printf("Client Bind Port Failed!\n"); + goto mbedtls_error; + } + + server_addr.sin_family = AF_INET; + server_addr.sin_addr.s_addr = ipaddr_addr(host); + server_addr.sin_port = htons(ports); + + ret = connect(ctx->fd, (struct sockaddr*)&server_addr, sizeof(server_addr)); + if (ret < 0){ + ret = MBEDTLS_ERR_NET_CONNECT_FAILED; + os_printf("Can Not Connect To!\n"); + } + +mbedtls_error: + if (ret < 0) + close( ctx->fd ); + return( ret ); +} + +/* + * Create a listening socket on bind_ip:port + */ +int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char *port, int proto ) +{ + int ret; + int protocol = 0; + int sock_type = 0; + uint32 ports = getul((char*)port); + + struct sockaddr_in server_addr; + + if( ( ret = net_prepare() ) != 0 ) + return( ret ); + + server_addr.sin_family = AF_INET; + server_addr.sin_addr.s_addr = htons(IPADDR_ANY); + server_addr.sin_port = htons(ports); + protocol = proto == MBEDTLS_NET_PROTO_UDP ? IPPROTO_UDP : IPPROTO_TCP; + sock_type = proto == MBEDTLS_NET_PROTO_UDP ? SOCK_DGRAM : SOCK_STREAM; + + ctx->fd = socket(AF_INET, sock_type, protocol); + if( ctx->fd < 0 ){ + ret = MBEDTLS_ERR_NET_SOCKET_FAILED; + os_printf("Create Socket Failed!\n"); + goto mbedtls_error; + } + + ret = bind(ctx->fd, (struct sockaddr*)&server_addr,sizeof(server_addr)); + if (ret != 0){ + ret = MBEDTLS_ERR_NET_BIND_FAILED; + os_printf("Server Bind Port Failed!\n"); + goto mbedtls_error; + } + + if (proto == MBEDTLS_NET_PROTO_TCP){ + ret = listen(ctx->fd, MBEDTLS_ERR_NET_LISTEN_FAILED); + if (ret != 0){ + ret = MBEDTLS_ERR_NET_LISTEN_FAILED; + goto mbedtls_error; + } + } + + ret = 0; + + mbedtls_error: + if (ret < 0) + close( ctx->fd ); + return( ret ); + +} + +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) +/* + * Check if the requested operation would be blocking on a non-blocking socket + * and thus 'failed' with a negative return value. + */ +static int net_would_block( const mbedtls_net_context *ctx ) +{ + ((void) ctx); + return( WSAGetLastError() == WSAEWOULDBLOCK ); +} +#else +/* + * Check if the requested operation would be blocking on a non-blocking socket + * and thus 'failed' with a negative return value. + * + * Note: on a blocking socket this function always returns 0! + */ +static int net_would_block( const mbedtls_net_context *ctx ) +{ + /* + * Never return 'WOULD BLOCK' on a non-blocking socket + */ +// if( ( fcntl( ctx->fd, F_GETFL, 0) & O_NONBLOCK ) != O_NONBLOCK ) +// return( 0 ); + +// switch( errno ) +// { +//#if defined EAGAIN +// case EAGAIN: +//#endif +//#if defined EWOULDBLOCK && EWOULDBLOCK != EAGAIN +// case EWOULDBLOCK: +//#endif +// return( 1 ); +// } + return( 0 ); +} +#endif /* ( _WIN32 || _WIN32_WCE ) && !EFIX64 && !EFI32 */ + +/* + * Accept a connection from a remote client + */ +int mbedtls_net_accept( mbedtls_net_context *bind_ctx, + mbedtls_net_context *client_ctx, + void *client_ip, size_t buf_size, size_t *ip_len ) +{ + int ret; + int type; + + struct sockaddr_in client_addr; + + socklen_t n = (socklen_t) sizeof( client_addr ); + socklen_t type_len = (socklen_t) sizeof( type ); + + client_ctx->fd = (int) accept( bind_ctx->fd,(struct sockaddr *) &client_addr, &n ); + if (client_ctx->fd < 0){ + ret = MBEDTLS_ERR_NET_SOCKET_FAILED; + os_printf("Create Socket Failed!\n"); + goto mbedtls_error; + } + + if(client_ip != NULL){ + struct sockaddr_in *addr4 = (struct sockaddr_in *) &client_addr; + *ip_len = sizeof( addr4->sin_addr.s_addr ); + + if( buf_size < *ip_len ){ + ret = MBEDTLS_ERR_NET_BUFFER_TOO_SMALL; + os_printf("Create Socket Failed!\n"); + goto mbedtls_error; + } + + memcpy(client_ip, &addr4->sin_addr.s_addr, *ip_len); + } + ret = 0; + mbedtls_error: + if (ret < 0) + close( client_ctx->fd ); + return( ret ); + return( 0 ); +} + +/* + * Set the socket blocking or non-blocking + */ +int mbedtls_net_set_block( mbedtls_net_context *ctx ) +{ +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + u_long n = 0; + return( ioctlsocket( ctx->fd, FIONBIO, &n ) ); +#else + return( fcntl( ctx->fd, F_SETFL, fcntl( ctx->fd, F_GETFL, 0 ) & ~O_NONBLOCK ) ); +#endif +} + +int mbedtls_net_set_nonblock( mbedtls_net_context *ctx ) +{ +#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ + !defined(EFI32) + u_long n = 1; + return( ioctlsocket( ctx->fd, FIONBIO, &n ) ); +#else + return( fcntl( ctx->fd, F_SETFL, fcntl( ctx->fd, F_GETFL, 0 ) | O_NONBLOCK ) ); +#endif +} + +/* + * Portable usleep helper + */ +void mbedtls_net_usleep( unsigned long usec ) +{ +//#if defined(_WIN32) +// Sleep( ( usec + 999 ) / 1000 ); +//#else +// struct timeval tv; +// tv.tv_sec = usec / 1000000; +//#if defined(__unix__) || defined(__unix) || \ +// ( defined(__APPLE__) && defined(__MACH__) ) +// tv.tv_usec = (suseconds_t) usec % 1000000; +//#else +// tv.tv_usec = usec % 1000000; +//#endif +// select( 0, NULL, NULL, NULL, &tv ); +//#endif +} + +/* + * Read at most 'len' characters + */ +int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len ) +{ + int ret; + int fd = ((mbedtls_net_context *) ctx)->fd; + + if( fd < 0 ) + return( MBEDTLS_ERR_NET_INVALID_CONTEXT ); + +// os_printf("mbedtls_net_recv need %d\n", len); + ret = (int) read( fd, buf, len ); + + if( ret < 0 ) + { + if( net_would_block( ctx ) != 0 ) + return( MBEDTLS_ERR_SSL_WANT_READ ); + +//#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ +// !defined(EFI32) +// if( WSAGetLastError() == WSAECONNRESET ) +// return( MBEDTLS_ERR_NET_CONN_RESET ); +//#else +// if( errno == EPIPE || errno == ECONNRESET ) +// return( MBEDTLS_ERR_NET_CONN_RESET ); +// +// if( errno == EINTR ) +// return( MBEDTLS_ERR_SSL_WANT_READ ); +//#endif + + return( MBEDTLS_ERR_NET_RECV_FAILED ); + } +// os_printf("mbedtls_net_recv get %d\n", ret); + if (ret == 0) + return( MBEDTLS_ERR_SSL_WANT_READ ); + + return( ret ); +} + +/* + * Read at most 'len' characters, blocking for at most 'timeout' ms + */ +int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len, + uint32_t timeout ) +{ + int ret; + struct timeval tv; + fd_set read_fds; + int fd = ((mbedtls_net_context *) ctx)->fd; + + if( fd < 0 ) + return( MBEDTLS_ERR_NET_INVALID_CONTEXT ); + +// FD_ZERO( &read_fds ); +// FD_SET( fd, &read_fds ); +// +// tv.tv_sec = timeout / 1000; +// tv.tv_usec = ( timeout % 1000 ) * 1000; +// +// ret = select( fd + 1, &read_fds, NULL, NULL, timeout == 0 ? NULL : &tv ); +// +// /* Zero fds ready means we timed out */ +// if( ret == 0 ) +// return( MBEDTLS_ERR_SSL_TIMEOUT ); +// +// if( ret < 0 ) +// { +//#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ +// !defined(EFI32) +// if( WSAGetLastError() == WSAEINTR ) +// return( MBEDTLS_ERR_SSL_WANT_READ ); +//#else +// if( errno == EINTR ) +// return( MBEDTLS_ERR_SSL_WANT_READ ); +//#endif +// +// return( MBEDTLS_ERR_NET_RECV_FAILED ); +// } + + /* This call will not block */ + return( mbedtls_net_recv( ctx, buf, len ) ); +} + +/* + * Write at most 'len' characters + */ +int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len ) +{ + int ret; + int fd = ((mbedtls_net_context *) ctx)->fd; + + if( fd < 0 ) + return( MBEDTLS_ERR_NET_INVALID_CONTEXT ); + +// os_printf("mbedtls_net_send need %d\n", len); + ret = (int) write( fd, buf, len ); + + if( ret < 0 ) + { + if( net_would_block( ctx ) != 0 ) + return( MBEDTLS_ERR_SSL_WANT_WRITE ); + +//#if ( defined(_WIN32) || defined(_WIN32_WCE) ) && !defined(EFIX64) && \ +// !defined(EFI32) +// if( WSAGetLastError() == WSAECONNRESET ) +// return( MBEDTLS_ERR_NET_CONN_RESET ); +//#else +// if( errno == EPIPE || errno == ECONNRESET ) +// return( MBEDTLS_ERR_NET_CONN_RESET ); +// +// if( errno == EINTR ) +// return( MBEDTLS_ERR_SSL_WANT_WRITE ); +//#endif +// +// return( MBEDTLS_ERR_NET_SEND_FAILED ); + } +// os_printf("mbedtls_net_send write %d\n", ret); + if (ret == 0) + return( MBEDTLS_ERR_SSL_WANT_WRITE ); + return( ret ); +} + +/* + * Gracefully close the connection + */ +void mbedtls_net_free( mbedtls_net_context *ctx ) +{ + if( ctx->fd == -1 ) + return; + + close( ctx->fd ); + + ctx->fd = -1; +} + +#endif /* MBEDTLS_NET_C */ diff --git a/examples/ESP8266_NONOS_SDK/tools/README.md b/examples/ESP8266_NONOS_SDK/tools/README.md new file mode 100755 index 0000000..9d46866 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/tools/README.md @@ -0,0 +1,84 @@ +## SSL tools +Refer to [ESP8266 Non-OS SDK SSL User Manual](http://espressif.com/en/support/download/documents?keys=&field_type_tid%5B%5D=14) + +## certificate generation +you **must** choose one of a,b,c to generate your certificate file +### a) if you does not have any certificate file which issued by trusted CA + +we would generate self-signed CA certificate,and generate certificate and private key with self-signed CA. + +- **change your CN field in your makefile.sh** to your IP address + +run the command as the following: + +**makefile.sh:** +``` +$./makefile.sh +``` +generate all of your cert and private key files. + +**rmfile.sh** +``` +$./rmfile.sh +``` + +delete all of your cert and private key files. + +the certificate files to flash are under the directory bin/ + +### b) if you just have CA certificate: ca.crt which issued by trusted CA + +we would generate CA bin:esp_ca_cert.bin for one-way authentication + +- **[important]**if CA certificate file is not called ca.crt, please rename it to ca.crt +- ensure the CA certificate file is in **PEM** format +- copy your ca.crt to tools/ directory + +run the command as the following: + +**makefile.sh:** + +``` +$./makefile.sh +``` + +the command would generate your CA certificate bin + +**rmfile.sh** + +``` +$./rmfile.sh +``` + +delete all of your generated files + +the certificate file to flash is under the directory bin/ + +### c) if you have both CA certificate:ca.crt and client certificate:client.crt and client key:client.key which issued by trusted CA + +we would generate CA bin:esp_ca_cert.bin and client certificate/private key bin:esp_cert_private_key.bin for two-way authentication + +- **[important]**if their filename is not called ca.crt,client.crt,client.key, please rename it to ca.crt,client.crt,client.key +- ensure the ca.crt,client.crt,client.key are in **PEM** format +- copy your ca.crt,client.crt,client.key to tools/ directory + +run the command as the following: + +**makefile.sh:** + +``` +$./makefile.sh +``` + +the command would generate all of your CA certificate bin:esp_ca_cert.bin and client bin:esp_cert_private_key.bin. + +**rmfile.sh** + +``` +$./rmfile.sh +``` + +delete all of your generated files. + +the certificate file to flash is under directory bin/ + diff --git a/examples/ESP8266_NONOS_SDK/tools/gen_appbin.py b/examples/ESP8266_NONOS_SDK/tools/gen_appbin.py new file mode 100644 index 0000000..1df8ed1 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/tools/gen_appbin.py @@ -0,0 +1,286 @@ +#!/usr/bin/python +# +# File : gen_appbin.py +# This file is part of Espressif's generate bin script. +# +# ESPRESSIF MIT License +# +# Copyright (c) 2016 +# +# Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, +# it is free of charge, to any person obtaining a copy of this software and associated +# documentation files (the "Software"), to deal in the Software without restriction, including +# without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the Software is furnished +# to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all copies or +# substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +# FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# +# + +"""This file is part of Espressif's generate bin script. + argv[1] is elf file name + argv[2] is version num""" + +import string +import sys +import os +import re +import binascii +import struct +import zlib + + +TEXT_ADDRESS = 0x40100000 +# app_entry = 0 +# data_address = 0x3ffb0000 +# data_end = 0x40000000 +# text_end = 0x40120000 + +CHECKSUM_INIT = 0xEF + +chk_sum = CHECKSUM_INIT +blocks = 0 + +def write_file(file_name,data): + if file_name is None: + print 'file_name cannot be none\n' + sys.exit(0) + + fp = open(file_name,'ab') + + if fp: + fp.seek(0,os.SEEK_END) + fp.write(data) + fp.close() + else: + print '%s write fail\n'%(file_name) + +def combine_bin(file_name,dest_file_name,start_offset_addr,need_chk): + global chk_sum + global blocks + if dest_file_name is None: + print 'dest_file_name cannot be none\n' + sys.exit(0) + + if file_name: + fp = open(file_name,'rb') + if fp: + ########## write text ########## + fp.seek(0,os.SEEK_END) + data_len = fp.tell() + if data_len: + if need_chk: + tmp_len = (data_len + 3) & (~3) + else: + tmp_len = (data_len + 15) & (~15) + data_bin = struct.pack(' eagle.app.sym' + else : + cmd = 'xt-nm -g ' + elf_file + ' > eagle.app.sym' + + os.system(cmd) + + fp = file('./eagle.app.sym') + if fp is None: + print "open sym file error\n" + sys.exit(0) + + lines = fp.readlines() + fp.close() + + entry_addr = None + p = re.compile('(\w*)(\sT\s)(call_user_start)$') + for line in lines: + m = p.search(line) + if m != None: + entry_addr = m.group(1) + # print entry_addr + + if entry_addr is None: + print 'no entry point!!' + sys.exit(0) + + data_start_addr = '0' + p = re.compile('(\w*)(\sA\s)(_data_start)$') + for line in lines: + m = p.search(line) + if m != None: + data_start_addr = m.group(1) + # print data_start_addr + + rodata_start_addr = '0' + p = re.compile('(\w*)(\sA\s)(_rodata_start)$') + for line in lines: + m = p.search(line) + if m != None: + rodata_start_addr = m.group(1) + # print rodata_start_addr + + # write flash bin header + #============================ + # SPI FLASH PARAMS + #------------------- + #flash_mode= + # 0: QIO + # 1: QOUT + # 2: DIO + # 3: DOUT + #------------------- + #flash_clk_div= + # 0 : 80m / 2 + # 1 : 80m / 3 + # 2 : 80m / 4 + # 0xf: 80m / 1 + #------------------- + #flash_size_map= + # 0 : 512 KB (256 KB + 256 KB) + # 1 : 256 KB + # 2 : 1024 KB (512 KB + 512 KB) + # 3 : 2048 KB (512 KB + 512 KB) + # 4 : 4096 KB (512 KB + 512 KB) + # 5 : 2048 KB (1024 KB + 1024 KB) + # 6 : 4096 KB (1024 KB + 1024 KB) + #------------------- + # END OF SPI FLASH PARAMS + #============================ + byte2=int(flash_mode)&0xff + byte3=(((int(flash_size_map)<<4)| int(flash_clk_div))&0xff) + app=int(user_bin)&0xff + if boot_mode == '2': + # write irom bin head + #data_bin = struct.pack('> 8)+chr((all_bin_crc & 0x00FF0000) >> 16)+chr((all_bin_crc & 0xFF000000) >> 24)) + cmd = 'rm eagle.app.sym' + os.system(cmd) + +if __name__=='__main__': + gen_appbin() diff --git a/examples/ESP8266_NONOS_SDK/tools/make_cacert.py b/examples/ESP8266_NONOS_SDK/tools/make_cacert.py new file mode 100644 index 0000000..221a303 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/tools/make_cacert.py @@ -0,0 +1,64 @@ +# +# ESPRESSIF MIT License +# +# Copyright (c) 2016 +# +# Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, +# it is free of charge, to any person obtaining a copy of this software and associated +# documentation files (the "Software"), to deal in the Software without restriction, including +# without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the Software is furnished +# to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all copies or +# substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +# FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# + +import os + + +class Cert(object): + def __init__(self, name, buff): + self.name = name + self.len = len(buff) + self.buff = buff + pass + + def __str__(self): + out_str = ['\0']*32 + for i in range(len(self.name)): + out_str[i] = self.name[i] + out_str = "".join(out_str) + out_str += str(chr(self.len & 0xFF)) + out_str += str(chr((self.len & 0xFF00) >> 8)) + out_str += self.buff + return out_str + pass + + +def main(): + cert_list = [] + file_list = os.listdir(os.getcwd()) + cert_file_list = [] + for _file in file_list: + if _file.endswith(".cer"): + cert_file_list.append(_file) + print cert_file_list + for cert_file in cert_file_list: + with open(cert_file, 'rb') as f: + buff = f.read() + cert_list.append(Cert(cert_file, buff)) + with open('esp_ca_cert.bin', 'wb+') as f: + for _cert in cert_list: + f.write("%s" % _cert) + pass +if __name__ == '__main__': + main() + diff --git a/examples/ESP8266_NONOS_SDK/tools/make_cert.py b/examples/ESP8266_NONOS_SDK/tools/make_cert.py new file mode 100644 index 0000000..b48a3f6 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/tools/make_cert.py @@ -0,0 +1,76 @@ +# +# ESPRESSIF MIT License +# +# Copyright (c) 2016 +# +# Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, +# it is free of charge, to any person obtaining a copy of this software and associated +# documentation files (the "Software"), to deal in the Software without restriction, including +# without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the Software is furnished +# to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all copies or +# substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +# FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# + +import os + + +class Cert(object): + def __init__(self, name, buff): + self.name = name + self.len = len(buff) + self.buff = buff + pass + + def __str__(self): + out_str = ['\0']*32 + for i in range(len(self.name)): + out_str[i] = self.name[i] + out_str = "".join(out_str) + out_str += str(chr(self.len & 0xFF)) + out_str += str(chr((self.len & 0xFF00) >> 8)) + out_str += self.buff + return out_str + pass + + +def main(): + cert_list = [] + file_list = os.listdir(os.getcwd()) + cert_file_list = [] + for _file in file_list: + pos = _file.find(".key_1024") + if pos != -1: + cert_file_list.append(_file[:pos]) + + pos = _file.find(".cer") + if pos!= -1: + cert_file_list.append(_file[:pos]) + + for cert_file in cert_file_list: + if cert_file == 'private_key': + with open(cert_file+".key_1024", 'rb') as f: + buff = f.read() + cert_list.append(Cert(cert_file, buff)) + + if cert_file == 'certificate': + with open(cert_file+".cer", 'rb') as f: + buff = f.read() + cert_list.append(Cert(cert_file, buff)) + + with open('esp_cert_private_key.bin', 'wb+') as f: + for _cert in cert_list: + f.write("%s" % _cert) + pass +if __name__ == '__main__': + main() + diff --git a/examples/ESP8266_NONOS_SDK/tools/makefile.sh b/examples/ESP8266_NONOS_SDK/tools/makefile.sh new file mode 100755 index 0000000..d03bc70 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/tools/makefile.sh @@ -0,0 +1,216 @@ +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of the axTLS project nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +PROJECT_NAME="TLS Project" +mkdir ca +mkdir bin +TrueCA=-1 +if [ -f "ca.crt" ]; then + echo ca.crt is found, generating esp_ca_cert.bin... + TrueCA=1 +else + echo ca.crt not exist\! We would generate self-signed CA certificate,and generating esp_ca_cert.bin... + TrueCA=0 + +# Generate the openssl configuration files. +cat > ca_cert.conf << EOF +[ req ] +distinguished_name = req_distinguished_name +prompt = no + +[ req_distinguished_name ] + O = $PROJECT_NAME Dodgy Certificate Authority +EOF + + + openssl genrsa -out ca.key 1024 #you can change number 1024 if encryption bits is required + openssl req -out ca.req -key ca.key -new -config ./ca_cert.conf + + # generate the actual self-signed ca certs. + openssl x509 -req -in ca.req -out ca.crt -sha1 -days 5000 -signkey ca.key + + cp ca.key ca/ + +fi + # reduce cert size if possible + openssl x509 -in ca.crt -outform DER -out TLS.ca_x509.cer.bak + openssl x509 -in TLS.ca_x509.cer.bak -inform DER -out TLS.ca_x509.cer + + cp TLS.ca_x509.cer ca/ + cp make_cacert.py ca/ + cd ca/ + python make_cacert.py + cd .. + cp ca/esp_ca_cert.bin bin/ + cp ca.crt ca/ + +echo esp_ca_cert.bin generated OK\! + +if [ $TrueCA -eq 1 ];then + echo trust CA + if [ -f "client.crt" ] && [ -f "client.key" ]; then + echo client.crt \&\& client.key are found, generating esp_cert_private_key.bin + mkdir client + mkdir include + openssl rsa -in client.key -out TLS.key_1024.bak -outform DER + openssl x509 -in client.crt -outform DER -out TLS.x509_1024.cer.bak + + # reduce cert and key size if possible + openssl rsa -in TLS.key_1024.bak -out TLS.key_1024 -inform DER + openssl x509 -in TLS.x509_1024.cer.bak -inform DER -out TLS.x509_1024.cer + + cp TLS.x509_1024.cer client/ + cp TLS.key_1024 client/ + mv client/TLS.x509_1024.cer client/certificate.cer + mv client/TLS.key_1024 client/private_key.key_1024 + cp make_cert.py client/ + cd client + + python make_cert.py + rm make_cert.py + mv esp_cert_private_key.bin ../bin/ + cd .. + + # set default cert for use in the client + xxd -i TLS.x509_1024.cer | sed -e \ + "s/TLS_x509_1024_cer/default_certificate/" > cert.h + # set default key for use in the server + xxd -i TLS.key_1024 | sed -e \ + "s/TLS_key_1024/default_private_key/" > private_key.h + cp cert.h private_key.h include/ + cp client.crt client.key client/ + + elif [ -f "server.crt" ] && [ -f "server.key" ]; then + echo server.crt \&\& server.key are found, generating esp_cert_private_key.bin + mkdir server + mkdir include + openssl rsa -in server.key -out TLS.key_1024.bak -outform DER + openssl x509 -in server.crt -outform DER -out TLS.x509_1024.cer.bak + + # reduce cert and key size if possible + openssl rsa -in TLS.key_1024.bak -out TLS.key_1024 -inform DER + openssl x509 -in TLS.x509_1024.cer.bak -inform DER -out TLS.x509_1024.cer + + cp TLS.x509_1024.cer server/ + cp TLS.key_1024 server/ + mv server/TLS.x509_1024.cer server/certificate.cer + mv server/TLS.key_1024 server/private_key.key_1024 + cp make_cert.py server/ + cd server + + python make_cert.py + rm make_cert.py + mv esp_cert_private_key.bin ../bin/ + cd .. + + # set default cert for use in the client + xxd -i TLS.x509_1024.cer | sed -e \ + "s/TLS_x509_1024_cer/default_certificate/" > cert.h + # set default key for use in the server + xxd -i TLS.key_1024 | sed -e \ + "s/TLS_key_1024/default_private_key/" > private_key.h + cp cert.h private_key.h include/ + cp server.crt server.key server/ + else + echo we would not generate certificate \for ESP chip when trust CA exist and [client.crt \&\& client.key] or [server.crt \&\& server.key] could not be found. + fi +elif [ $TrueCA -eq 0 ];then + echo generate cerificate and private key with self-signed CA + mkdir server + mkdir client + mkdir include + +cat > server_cert.conf << EOF +[ req ] +distinguished_name = req_distinguished_name +prompt = no + +[ req_distinguished_name ] + O = $PROJECT_NAME + CN = 192.168.111.100 +EOF + +cat > client_cert.conf << EOF +[ req ] +distinguished_name = req_distinguished_name +prompt = no + +[ req_distinguished_name ] + O = $PROJECT_NAME Device Certificate + CN = 192.168.111.101 +EOF + + openssl genrsa -out server.key 1024 + openssl genrsa -out client.key 1024 + + # reduce cert and key size if possible + openssl rsa -in client.key -out TLS.key_1024.bak -outform DER + openssl rsa -in TLS.key_1024.bak -out TLS.key_1024 -inform DER + + openssl req -out server.req -key server.key -new -config ./server_cert.conf + openssl req -out client.req -key client.key -new -config ./client_cert.conf + + openssl x509 -req -in server.req -out server.crt -sha1 -CAcreateserial -days 5000 -CA ca.crt -CAkey ca.key + openssl x509 -req -in client.req -out client.crt -sha1 -CAcreateserial -days 5000 -CA ca.crt -CAkey ca.key + cp server.crt server.key server/ + + # reduce cert and key size if possible + openssl x509 -in client.crt -outform DER -out TLS.x509_1024.cer.bak + openssl x509 -in TLS.x509_1024.cer.bak -inform DER -out TLS.x509_1024.cer + + cp TLS.x509_1024.cer client/ + cp TLS.key_1024 client/ + mv client/TLS.x509_1024.cer client/certificate.cer + mv client/TLS.key_1024 client/private_key.key_1024 + cp make_cert.py client/ + cd client + + python make_cert.py + rm make_cert.py + mv esp_cert_private_key.bin ../bin/ + cd .. + + # set default cert for use in the client + xxd -i TLS.x509_1024.cer | sed -e \ + "s/TLS_x509_1024_cer/default_certificate/" > cert.h + # set default key for use in the server + xxd -i TLS.key_1024 | sed -e \ + "s/TLS_key_1024/default_private_key/" > private_key.h + mv cert.h private_key.h include/ + cp client.crt client.key client/ + rm *.crt + rm *.key + +else + echo error happened\!TrueCA didnot initialize. +fi + +#delete intermediate file + +rm ca/make_cacert.py ca/esp_ca_cert.bin -rf +rm *.conf -rf +rm *.req -rf +rm *.h -rf +rm *.bak +rm *.srl -rf + +find -name \*.cer | xargs rm -f +find -name \*.key_1024 | xargs rm -f + +echo esp_ca_cert.bin \&\& esp_cert_private_key.bin was generated under bin\/ directory diff --git a/examples/ESP8266_NONOS_SDK/tools/rmfile.sh b/examples/ESP8266_NONOS_SDK/tools/rmfile.sh new file mode 100755 index 0000000..be34700 --- /dev/null +++ b/examples/ESP8266_NONOS_SDK/tools/rmfile.sh @@ -0,0 +1,17 @@ +rm *.pem -rf +rm *.srl -rf +rm *.h -rf +rm *.cer -rf +rm *.key_1024 -rf +rm *.req -rf +rm *.conf -rf +rm *.bak -rf + +rm ca/ -rf +rm bin/ -rf +rm server/ -rf +rm client/ -rf +rm include/ -rf + + + diff --git a/hw/STM32G070RB/CMakeLists.txt b/examples/STM32G071RB_NUCLEO_BARE_METAL/CMakeLists.txt similarity index 81% rename from hw/STM32G070RB/CMakeLists.txt rename to examples/STM32G071RB_NUCLEO_BARE_METAL/CMakeLists.txt index 12dc741..054da0d 100644 --- a/hw/STM32G070RB/CMakeLists.txt +++ b/examples/STM32G071RB_NUCLEO_BARE_METAL/CMakeLists.txt @@ -24,34 +24,36 @@ set(CMAKE_TOOLCHAIN_FILE ../config/STM32/Toolchain-arm-gcc.cmake) # Allow assembler enable_language(ASM) -project(STM32G070RB_TEMPLATE) +project(STM32G071RB_NUCLEO_BARE_METAL) set(INCLUDE_DIRS -Core -Core/Inc -Core/Startup + ./Core + ./Core/Inc + ./Core/Startup -Drivers -Drivers/CMSIS -Drivers/CMSIS/Device -Drivers/CMSIS/Include -Drivers/CMSIS/STM32G0_Drivers + ./Drivers + ./Drivers/CMSIS + ./Drivers/CMSIS/Device + ./Drivers/CMSIS/Include + ./Drivers/CMSIS/STM32G0_Drivers -../src + ../../src -../lib + ../../lib . ) set(C_SRCS - Core/Src/main.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/core_init.c - - + ./Core/Src/main.c + ./Core/Src/syscalls.c + ./Core/Src/sysmem.c + ./Core/Src/core_init.c + ./Core/Src/tim_delay.c + ./Core/Src/LCD_IO_driver.c + + ../../src/lcd_hd44780.c ) set(ASM_SRCS diff --git a/hw/STM32G070RB/Core/Inc/core_init.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/core_init.h similarity index 100% rename from hw/STM32G070RB/Core/Inc/core_init.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/core_init.h diff --git a/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/main.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/main.h new file mode 100644 index 0000000..8008cc5 --- /dev/null +++ b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/main.h @@ -0,0 +1 @@ +#include "stm32g070xx.h" diff --git a/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/tim_delay.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/tim_delay.h new file mode 100644 index 0000000..082bf16 --- /dev/null +++ b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Inc/tim_delay.h @@ -0,0 +1,23 @@ +/* + * im_delay.h + * + * Created on: 26 wrz 2014 + * Author: niw-lap + */ + +#ifndef IM_DELAY_H_ +#define IM_DELAY_H_ + +#include "main.h" + +void _delay_ms (uint32_t delay_ms); +void _delay_us (uint32_t delay_us); + +/* + * Procedura wlaczajaca odliczanie konkretnego oponienia ale nie blokujaca. + * Do wykorzystania w maszynach stanu gdzie w danym stanie trzeba byc (stan musi trwac) przez okreslona ilosc ms + */ +void count_ms (uint16_t *delay_ms); +void count_s (uint16_t *delay_s); + +#endif /* IM_DELAY_H_ */ diff --git a/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/LCD_IO_driver.c b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/LCD_IO_driver.c new file mode 100644 index 0000000..1a96373 --- /dev/null +++ b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/LCD_IO_driver.c @@ -0,0 +1,254 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-07 15:51:41 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-08 00:34:48 + */ +#include +#include "stm32g070xx.h" +#include "lcd_hd44780_interface.h" +#include "main.h" +#include "tim_delay.h" + +// clang-format off +#define ON 1 +#define OFF 0 + +#define LCD_D7_PORT GPIOA +#define LCD_D6_PORT GPIOB +#define LCD_D5_PORT GPIOB +#define LCD_D4_PORT GPIOB +#define LCD_RS_PORT GPIOA +#define LCD_E_PORT GPIOC +#define LCD_BCKL_PORT GPIOB +#if USE_RW_PIN == ON +#define LCD_RW_PORT GPIOC +#endif + +#define LCD_D7_PORT_CLK_EN RCC_IOPENR_GPIOAEN +#define LCD_D6_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#define LCD_D5_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#define LCD_D4_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#define LCD_RS_PORT_CLK_EN RCC_IOPENR_GPIOAEN +#define LCD_E_PORT_CLK_EN RCC_IOPENR_GPIOCEN +#define LCD_BCKL_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#if USE_RW_PIN == ON +#define LCD_RW_PORT_CLK_EN RCC_IOPENR_GPIOCEN +#endif + +#define LCD_D7_OUT_PIN GPIO_ODR_OD8 +#define LCD_D6_OUT_PIN GPIO_ODR_OD14 +#define LCD_D5_OUT_PIN GPIO_ODR_OD4 +#define LCD_D4_OUT_PIN GPIO_ODR_OD5 +#define LCD_RS_OUT_PIN GPIO_ODR_OD9 +#define LCD_E_OUT_PIN GPIO_ODR_OD7 +#define LCD_BCKL_OUT_PIN GPIO_ODR_OD0 +#if USE_RW_PIN == ON +#define LCD_E_OUT_PIN GPIO_ODR_OD7 +#endif + +#define LCD_D7_IN_PIN GPIO_IDR_ID8 +#define LCD_D6_IN_PIN GPIO_IDR_ID14 +#define LCD_D5_IN_PIN GPIO_IDR_ID4 +#define LCD_D4_IN_PIN GPIO_IDR_ID5 + +#define MODER_LCD_D7_0 GPIO_MODER_MODE8_0 +#define MODER_LCD_D7_Msk GPIO_MODER_MODE8_Msk +#define MODER_LCD_D6_0 GPIO_MODER_MODE14_0 +#define MODER_LCD_D6_Msk GPIO_MODER_MODE14_Msk +#define MODER_LCD_D5_0 GPIO_MODER_MODE4_0 +#define MODER_LCD_D5_Msk GPIO_MODER_MODE4_Msk +#define MODER_LCD_D4_0 GPIO_MODER_MODE5_0 +#define MODER_LCD_D4_Msk GPIO_MODER_MODE5_Msk +#define MODER_LCD_RS_0 GPIO_MODER_MODE9_0 +#define MODER_LCD_RS_Msk GPIO_MODER_MODE9_Msk +#define MODER_LCD_E_0 GPIO_MODER_MODE7_0 +#define MODER_LCD_E_Msk GPIO_MODER_MODE7_Msk +#define MODER_LCD_BCKL_0 GPIO_MODER_MODE0_0 +#define MODER_LCD_BCKL_Msk GPIO_MODER_MODE0_Msk +#if USE_RW_PIN == ON +#define MODER_LCD_RW_0 GPIO_MODER_MODE7_0 +#define MODER_LCD_RW_Msk GPIO_MODER_MODE7_Msk +#endif + +#define LCD_D4_MASK 0x01 +#define LCD_D5_MASK 0x02 +#define LCD_D6_MASK 0x04 +#define LCD_D7_MASK 0x08 +// clang-format on + +static void init_LCD_data_and_SIG_pins(void); +static void set_LCD_DATA_PINS_as_outputs(void); +static void set_LCD_DATA_PINS_as_inputs(void); +static void set_LCD_DATA_PINS_state(uint8_t data); +static uint8_t get_LCD_DATA_PINS_state(void); +static void LCD_set_SIG(enum lcd_sig LCD_SIG); +static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +static void init_LCD_SIGNAL_PINS_as_outputs(void); +static void init_LCD_BCKL_PIN_as_output(void); + +/************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + set_LCD_DATA_PINS_as_outputs, + set_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + _delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +/*************LCD_IO_driver_interface implementation END***************/ + +static void init_LCD_data_and_SIG_pins(void) +{ + RCC -> IOPENR |= LCD_D7_PORT_CLK_EN; + RCC -> IOPENR |= LCD_D6_PORT_CLK_EN; + RCC -> IOPENR |= LCD_D5_PORT_CLK_EN; + RCC -> IOPENR |= LCD_D4_PORT_CLK_EN; + + set_LCD_DATA_PINS_as_outputs(); + init_LCD_SIGNAL_PINS_as_outputs(); + init_LCD_BCKL_PIN_as_output(); + //disable LCD backlight on init + LCD_BCKL_PORT->ODR &= ~LCD_BCKL_OUT_PIN; + +} + +static void set_LCD_DATA_PINS_as_outputs(void) +{ + LCD_D7_PORT->MODER &=(~MODER_LCD_D7_Msk); + LCD_D7_PORT->MODER |= MODER_LCD_D7_0; + + LCD_D6_PORT->MODER &=(~MODER_LCD_D6_Msk); + LCD_D6_PORT->MODER |= MODER_LCD_D6_0; + + LCD_D5_PORT->MODER &=(~MODER_LCD_D5_Msk); + LCD_D5_PORT->MODER |= MODER_LCD_D5_0; + + LCD_D4_PORT->MODER &=(~MODER_LCD_D4_Msk); + LCD_D4_PORT->MODER |= MODER_LCD_D4_0; + +} +static void set_LCD_DATA_PINS_as_inputs(void) +{ + LCD_D7_PORT->MODER &=(~MODER_LCD_D7_Msk); + + LCD_D6_PORT->MODER &=(~MODER_LCD_D6_Msk); + + LCD_D5_PORT->MODER &=(~MODER_LCD_D5_Msk); + + LCD_D4_PORT->MODER &=(~MODER_LCD_D4_Msk); +} + +static void set_LCD_DATA_PINS_state(uint8_t data) +{ + if ((data & LCD_D4_MASK)) + LCD_D4_PORT->ODR |= LCD_D4_OUT_PIN; + else + LCD_D4_PORT->ODR &= ~LCD_D4_OUT_PIN; + + if ((data & LCD_D5_MASK)) + LCD_D5_PORT->ODR |= LCD_D5_OUT_PIN; + else + LCD_D5_PORT->ODR &= ~LCD_D5_OUT_PIN; + + if ((data & LCD_D6_MASK)) + LCD_D6_PORT->ODR |= LCD_D6_OUT_PIN; + else + LCD_D6_PORT->ODR &= ~LCD_D6_OUT_PIN; + + if ((data & LCD_D7_MASK)) + LCD_D7_PORT->ODR |= LCD_D7_OUT_PIN; + else + LCD_D7_PORT->ODR &= ~LCD_D7_OUT_PIN; +} + +static uint8_t get_LCD_DATA_PINS_state(void) +{ + uint8_t data = 0; + if (((LCD_D4_PORT->IDR) & LCD_D4_IN_PIN) == LCD_D4_IN_PIN) + data = LCD_D4_MASK; + if (((LCD_D5_PORT->IDR) & LCD_D5_IN_PIN) == LCD_D5_IN_PIN) + data |= LCD_D5_MASK; + if (((LCD_D6_PORT->IDR) & LCD_D6_IN_PIN) == LCD_D6_IN_PIN) + data |= LCD_D6_MASK; + if (((LCD_D7_PORT->IDR) & LCD_D7_IN_PIN) == LCD_D7_IN_PIN) + data |= LCD_D7_MASK; + return data; +} + +static void LCD_set_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_RS_PORT->ODR |= LCD_RS_OUT_PIN; + break; + case LCD_E: + LCD_E_PORT->ODR |= LCD_E_OUT_PIN; + break; +#if USE_RW_PIN == ON + case LCD_RW: + LCD_RW_PORT->ODR |= LCD_RW_OUT_PIN; + break; +#endif + case LCD_BCKL: + LCD_BCKL_PORT->ODR |= LCD_BCKL_OUT_PIN; + break; + default: + break; + } +} + +static void LCD_reset_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_RS_PORT->ODR &= ~LCD_RS_OUT_PIN; + break; + case LCD_E: + LCD_E_PORT->ODR &= ~LCD_E_OUT_PIN; + break; +#if USE_RW_PIN == 1 + case LCD_RW: + LCD_RW_PORT->ODR &= ~LCD_Rw_OUT_PIN; + break; +#endif + case LCD_BCKL: + LCD_BCKL_PORT->ODR &= ~LCD_BCKL_OUT_PIN; + break; + default: + break; + } +} + +static void init_LCD_SIGNAL_PINS_as_outputs(void) +{ + RCC -> IOPENR |= LCD_RS_PORT_CLK_EN; + LCD_RS_PORT->MODER &=(~MODER_LCD_RS_Msk); + LCD_RS_PORT->MODER |= MODER_LCD_RS_0; + + RCC -> IOPENR |= LCD_E_PORT_CLK_EN; + LCD_E_PORT->MODER &=(~MODER_LCD_E_Msk); + LCD_E_PORT->MODER |= MODER_LCD_E_0; + +#if USE_RW_PIN == 1 + RCC -> IOPENR |= LCD_RW_PORT_CLK_EN; + LCD_RW_PORT->MODER &=(~MODER_LCD_RW_Msk); + LCD_RW_PORT->MODER |= MODER_LCD_RW_0; +#endif +} + +static void init_LCD_BCKL_PIN_as_output(void) +{ + RCC -> IOPENR |= LCD_BCKL_PORT_CLK_EN; + LCD_BCKL_PORT->MODER &=(~MODER_LCD_BCKL_Msk); + LCD_BCKL_PORT->MODER |= MODER_LCD_BCKL_0; +} diff --git a/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/core_init.c b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/core_init.c new file mode 100644 index 0000000..fa7ff8e --- /dev/null +++ b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/core_init.c @@ -0,0 +1,49 @@ +#include "stm32g070xx.h" +#include "core_init.h" + +#define SYS_FREQ 48000000U +#define SYS_TICK_MAX_CNT 1000U +void core_init(void) +{ + __IO uint32_t tmpreg; + RCC->APBENR2 |=RCC_APBENR2_SYSCFGEN; + /* Delay after an RCC peripheral clock enabling */ + tmpreg = RCC->APBENR2 & RCC_APBENR2_SYSCFGEN; + (void)tmpreg; + + RCC->APBENR2 |=RCC_APBENR1_PWREN; + /* Delay after an RCC peripheral clock enabling */ + tmpreg = RCC->APBENR2 & RCC_APBENR1_PWREN; + (void)tmpreg; + + FLASH ->ACR &=~(FLASH_ACR_LATENCY); //clear latency flag + FLASH ->ACR |=FLASH_ACR_LATENCY_0; + while((FLASH->ACR & FLASH_ACR_LATENCY)!=FLASH_ACR_LATENCY_0); + + /* HSI configuration and activation */ + RCC->CR|=RCC_CR_HSION; + while((RCC->CR & RCC_CR_HSIRDY)!=RCC_CR_HSIRDY); + + /* Main PLL configuration and activation */ + RCC->PLLCFGR &=~( RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR); + RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSI| 0U | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1); + RCC->CR|= RCC_CR_PLLON; + RCC->PLLCFGR|= RCC_PLLCFGR_PLLREN; + + while((RCC->CR & RCC_CR_PLLRDY)!=RCC_CR_PLLRDY); + + // /* Set AHB prescaler*/ + RCC->CFGR &= ~(RCC_CFGR_HPRE); + RCC->CFGR |= 0x00000000U ; + /* Sysclk activation on the main PLL */ + RCC->CFGR &= ~(RCC_CFGR_SW); + RCC->CFGR |= RCC_CFGR_SW_1; + while((RCC->CFGR & RCC_CFGR_SWS)!= RCC_CFGR_SWS_1); + + // /* Set APB1 prescaler*/ + // RCC->CFGR &= ~(RCC_CFGR_PPRE); + // RCC->CFGR |= 0; + // SysTick->LOAD = (uint32_t)((SYS_FREQ / SYS_TICK_MAX_CNT) - 1UL); /* set reload register */ + // SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + // SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ +} \ No newline at end of file diff --git a/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/main.c b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/main.c new file mode 100644 index 0000000..a89b4dd --- /dev/null +++ b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Src/main.c @@ -0,0 +1,105 @@ +/** + ****************************************************************************** + * @file : main.c + * @author : Auto-generated by STM32CubeIDE + * @brief : Main program body + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include +#include + +#include "main.h" +#include "core_init.h" +#include "lcd_hd44780.h" +#include "tim_delay.h" + +#if !defined(__SOFT_FP__) && defined(__ARM_FP) + #warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use." +#endif + +#define SHIFT_DELAY 300 + +const char *demo_tekst = {"Congratulation, you have just run LCD demo example on STM32G071RB Nucleo eval board."}; +const char *demo_title = {"LCD HD44780 Demo"}; + +static void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line, uint16_t speed); +static void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line, uint16_t speed); +static void blink_backlight(uint8_t blinks_no); + +uint8_t j = 0; +uint8_t i = 0; + +int main(void) +{ + core_init(); + + lcd_init(); + lcd_buf_str(demo_title); + lcd_update(); + blink_backlight(3); + for(;;) + { + lcd_buf_slide_str_in(demo_tekst, LINE_2, SHIFT_DELAY); + lcd_buf_slide_str_out(demo_tekst, LINE_2, SHIFT_DELAY); + } +} + + +void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line, uint16_t speed) +{ + uint8_t str_end_flag = 0; + for (j = 0; j <= strlen(str); j++) + { + _delay_ms(speed); + lcd_buf_locate(lcd_line, C1); + for (i = 0; i < LCD_X; i++) + { + if ((str[j + i] != '\0') && (str_end_flag == 0)) + { + lcd_buf_char(str[j + i]); + } + else + { + str_end_flag = 0xFF; + lcd_buf_char(' '); + } + } + str_end_flag = 0; + lcd_update(); + } +} + +void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line, uint16_t speed) +{ + for (i = LCD_X - 1; i > C1; i--) + { + _delay_ms(speed); + lcd_buf_locate(lcd_line, i); + for (uint8_t j = 0; j < (LCD_X - i); j++) + { + lcd_buf_char(str[j]); + } + lcd_update(); + } +} +static void blink_backlight(uint8_t blinks_no) +{ + for(uint8_t i=0; i APBENR1 |= RCC_APBENR1_TIM6EN; + + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + TIM6 -> PSC = 0; + TIM6 -> ARR =47999; + + TIM6 -> CR1 |= TIM_CR1_ARPE; + TIM6 -> EGR |= TIM_EGR_UG; + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + + TIM6 -> CR1 |= TIM_CR1_CEN; + while (delay_ms!=0) + { + if ((TIM6 -> SR & TIM_SR_UIF) == TIM_SR_UIF) + { + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + delay_ms--; + } + } + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + RCC-> APBENR1 &= ~((uint32_t)RCC_APBENR1_TIM6EN); //wy��cz clocka dla timera + +} + +void _delay_us(uint32_t delay_us) +{ + RCC-> APBENR1 |= RCC_APBENR1_TIM6EN; + + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + TIM6 -> PSC = 0; + TIM6 -> ARR =47; + + TIM6 -> CR1 |= TIM_CR1_ARPE; + TIM6 -> EGR |= TIM_EGR_UG; + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + + TIM6 -> CR1 |= TIM_CR1_CEN; + while (delay_us!=0) + { + if ((TIM6 -> SR & TIM_SR_UIF) == TIM_SR_UIF) + { + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + delay_us--; + } + } + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + RCC-> APBENR1 &= ~((uint32_t)RCC_APBENR1_TIM6EN); //wy��cz clocka dla timera +} + +void count_ms(uint16_t *delay_ms) +{ + if((TIM6 ->CR1 & TIM_CR1_CEN) ==0) + { + RCC-> APBENR1 |= RCC_APBENR1_TIM6EN; + + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + TIM6 -> PSC = 0; + TIM6 -> ARR =47999; + + TIM6 -> CR1 |= TIM_CR1_ARPE; + TIM6 -> EGR |= TIM_EGR_UG; + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + + TIM6 -> CR1 |= TIM_CR1_CEN; + } + + if ((TIM6 -> SR & TIM_SR_UIF) == TIM_SR_UIF) + { + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + (*delay_ms)--; + } + + if(*delay_ms==0) + { + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + RCC-> APBENR1 &= ~((uint32_t)RCC_APBENR1_TIM6EN); //wy��cz clocka dla timera + } +} + +void count_s(uint16_t *delay_s) +{ + if((TIM6 ->CR1 & TIM_CR1_CEN) ==0) + { + RCC-> APBENR1 |= RCC_APBENR1_TIM6EN; + + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + TIM6 -> PSC = 999; + TIM6 -> ARR =47999; + + TIM6 -> CR1 |= TIM_CR1_ARPE; + TIM6 -> EGR |= TIM_EGR_UG; + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + + TIM6 -> CR1 |= TIM_CR1_CEN; + } + + if ((TIM6 -> SR & TIM_SR_UIF) == TIM_SR_UIF) + { + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + (*delay_s)--; + } + + if(*delay_s==0) + { + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + RCC-> APBENR1 &= ~((uint32_t)RCC_APBENR1_TIM6EN); //wy��cz clocka dla timera + } +} diff --git a/hw/STM32G070RB/Core/Startup/startup_stm32g070rbtx.s b/examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Startup/startup_stm32g070rbtx.s similarity index 100% rename from hw/STM32G070RB/Core/Startup/startup_stm32g070rbtx.s rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Core/Startup/startup_stm32g070rbtx.s diff --git a/hw/STM32G070RB/Drivers/CMSIS/Device/stm32g070xx.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Device/stm32g070xx.h similarity index 100% rename from hw/STM32G070RB/Drivers/CMSIS/Device/stm32g070xx.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Device/stm32g070xx.h diff --git a/hw/STM32G070RB/Drivers/CMSIS/Device/stm32g0xx.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Device/stm32g0xx.h similarity index 100% rename from hw/STM32G070RB/Drivers/CMSIS/Device/stm32g0xx.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Device/stm32g0xx.h diff --git a/hw/STM32F030R8/Drivers/CMSIS/Include/cmsis_compiler.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/cmsis_compiler.h similarity index 100% rename from hw/STM32F030R8/Drivers/CMSIS/Include/cmsis_compiler.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/cmsis_compiler.h diff --git a/hw/STM32F030R8/Drivers/CMSIS/Include/cmsis_gcc.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/cmsis_gcc.h similarity index 100% rename from hw/STM32F030R8/Drivers/CMSIS/Include/cmsis_gcc.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/cmsis_gcc.h diff --git a/hw/STM32F030R8/Drivers/CMSIS/Include/cmsis_version.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/cmsis_version.h similarity index 100% rename from hw/STM32F030R8/Drivers/CMSIS/Include/cmsis_version.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/cmsis_version.h diff --git a/hw/STM32G070RB/Drivers/CMSIS/Include/core_cm0plus.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/core_cm0plus.h similarity index 100% rename from hw/STM32G070RB/Drivers/CMSIS/Include/core_cm0plus.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/core_cm0plus.h diff --git a/hw/STM32F030R8/Drivers/CMSIS/Include/mpu_armv7.h b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/mpu_armv7.h similarity index 100% rename from hw/STM32F030R8/Drivers/CMSIS/Include/mpu_armv7.h rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/CMSIS/Include/mpu_armv7.h diff --git a/hw/STM32F091RB/Drivers/STM32F0_Drivers/deleteMe.txt b/examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/STM32G0_Drivers/deleteMe.txt similarity index 100% rename from hw/STM32F091RB/Drivers/STM32F0_Drivers/deleteMe.txt rename to examples/STM32G071RB_NUCLEO_BARE_METAL/Drivers/STM32G0_Drivers/deleteMe.txt diff --git a/hw/STM32G070RB/linker.ld b/examples/STM32G071RB_NUCLEO_BARE_METAL/linker.ld similarity index 100% rename from hw/STM32G070RB/linker.ld rename to examples/STM32G071RB_NUCLEO_BARE_METAL/linker.ld diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/.mxproject b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/.mxproject new file mode 100644 index 0000000..d5668d3 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/.mxproject @@ -0,0 +1,24 @@ +[PreviousLibFiles] +LibFiles=Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_lpuart.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_lpuart.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_lpuart.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; + +[PreviousUsedCubeIDEFiles] +SourceFiles=Core\Src\main.c;Core\Src\stm32g4xx_it.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_lpuart.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Core\Src\system_stm32g4xx.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_lpuart.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Core\Src\system_stm32g4xx.c;;; +HeaderPath=Drivers\STM32G4xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32G4xx\Include;Drivers\CMSIS\Include;Core\Inc; +CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G474xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1; + +[PreviousGenFiles] +AdvancedFolderStructure=true +HeaderFileListSize=3 +HeaderFiles#0=..\Core\Inc\stm32g4xx_it.h +HeaderFiles#1=..\Core\Inc\stm32_assert.h +HeaderFiles#2=..\Core\Inc\main.h +HeaderFolderListSize=1 +HeaderPath#0=..\Core\Inc +HeaderFiles=; +SourceFileListSize=2 +SourceFiles#0=..\Core\Src\stm32g4xx_it.c +SourceFiles#1=..\Core\Src\main.c +SourceFolderListSize=1 +SourcePath#0=..\Core\Src +SourceFiles=; + diff --git a/hw/STM32F030R8/CMakeLists.txt b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/CMakeLists.txt similarity index 57% rename from hw/STM32F030R8/CMakeLists.txt rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/CMakeLists.txt index f65cd46..db4b8dd 100644 --- a/hw/STM32F030R8/CMakeLists.txt +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/CMakeLists.txt @@ -24,43 +24,67 @@ set(CMAKE_TOOLCHAIN_FILE ../config/STM32/Toolchain-arm-gcc.cmake) # Allow assembler enable_language(ASM) -project(STM32F030R8_TEMPLATE) +project(STM32G474RE_NUCLEO_CUBE_IDE_LCD_TEST) set(INCLUDE_DIRS -Core -Core/Inc -Core/Startup +../ +./Core +./Core/Inc +# Core/Src +# Core/Startup -Drivers -Drivers/CMSIS -Drivers/CMSIS/Device -Drivers/CMSIS/Include -Drivers/CMSIS/STM32F0_Drivers +./Drivers/CMSIS/Include +./Drivers/CMSIS/Device/ST/STM32G4xx/Include +./Drivers/STM32G4xx_HAL_Driver/Inc -../src - -../lib +../../src . ) set(C_SRCS Core/Src/main.c + Core/Src/stm32g4xx_it.c Core/Src/syscalls.c Core/Src/sysmem.c - Core/Src/core_init.c - Core/Src/system_stm32f0xx.c - + Core/Src/system_stm32g4xx.c + Core/Src/LCD_IO_driver.c + Core/Src/tim_delay.c + + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c + # Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c + + ../../src/lcd_hd44780.c ) set(ASM_SRCS - Core/Startup/startup_stm32f030r8tx.s + Core/Startup/startup_stm32g474retx.s ) set(GLOBAL_DEFINES - -DSTM32F030x8 +-DDEBUG +-DSTM32G474xx +-DUSE_FULL_LL_DRIVER +-DHSE_VALUE=24000000 +-DHSE_STARTUP_TIMEOUT=100 +-DLSE_STARTUP_TIMEOUT=5000 +-DLSE_VALUE=32768 +-DEXTERNAL_CLOCK_VALUE=12288000 +-DHSI_VALUE=16000000 +-DLSI_VALUE=32000 +-DVDD_VALUE=3300 +-DPREFETCH_ENABLE=0 +-DINSTRUCTION_CACHE_ENABLE=1 +-DDATA_CACHE_ENABLE=1 +# -std=gnu11 -g3 -c -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb ) set(LINKED_LIBS @@ -74,10 +98,11 @@ link_directories( include_directories(${INCLUDE_DIRS}) add_definitions(${GLOBAL_DEFINES}) -set(MCPU "-mcpu=cortex-m0") +set(MCPU "-mcpu=cortex-m4") include( ../config/STM32/compiler_flags.cmake) # generate elf file add_arm_executable(${CMAKE_PROJECT_NAME} ${C_SRCS} ${ASM_SRCS}) arm_link_libraries(${CMAKE_PROJECT_NAME} ${LINKED_LIBS}) + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/main.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/main.h new file mode 100644 index 0000000..4d022b2 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/main.h @@ -0,0 +1,124 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_lpuart.h" +#include "stm32g4xx_ll_rcc.h" +#include "stm32g4xx_ll_bus.h" +#include "stm32g4xx_ll_crs.h" +#include "stm32g4xx_ll_system.h" +#include "stm32g4xx_ll_exti.h" +#include "stm32g4xx_ll_cortex.h" +#include "stm32g4xx_ll_utils.h" +#include "stm32g4xx_ll_pwr.h" +#include "stm32g4xx_ll_dma.h" +#include "stm32g4xx_ll_gpio.h" + +#if defined(USE_FULL_ASSERT) +#include "stm32_assert.h" +#endif /* USE_FULL_ASSERT */ + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define B1_Pin LL_GPIO_PIN_13 +#define B1_GPIO_Port GPIOC +#define B1_EXTI_IRQn EXTI15_10_IRQn +#define LPUART1_TX_Pin LL_GPIO_PIN_2 +#define LPUART1_TX_GPIO_Port GPIOA +#define LPUART1_RX_Pin LL_GPIO_PIN_3 +#define LPUART1_RX_GPIO_Port GPIOA +#define LD2_Pin LL_GPIO_PIN_5 +#define LD2_GPIO_Port GPIOA +#define LCD_D6_Pin LL_GPIO_PIN_10 +#define LCD_D6_GPIO_Port GPIOB +#define LCD_E_Pin LL_GPIO_PIN_7 +#define LCD_E_GPIO_Port GPIOC +#define LCD_D7_Pin LL_GPIO_PIN_8 +#define LCD_D7_GPIO_Port GPIOA +#define LCD_RS_Pin LL_GPIO_PIN_9 +#define LCD_RS_GPIO_Port GPIOA +#define T_SWDIO_Pin LL_GPIO_PIN_13 +#define T_SWDIO_GPIO_Port GPIOA +#define T_SWCLK_Pin LL_GPIO_PIN_14 +#define T_SWCLK_GPIO_Port GPIOA +#define T_SWO_Pin LL_GPIO_PIN_3 +#define T_SWO_GPIO_Port GPIOB +#define LCD_D5_Pin LL_GPIO_PIN_4 +#define LCD_D5_GPIO_Port GPIOB +#define LCD_D4_Pin LL_GPIO_PIN_5 +#define LCD_D4_GPIO_Port GPIOB +#define LCD_BCKL_Pin LL_GPIO_PIN_6 +#define LCD_BCKL_GPIO_Port GPIOB +#ifndef NVIC_PRIORITYGROUP_0 +#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority, + 4 bits for subpriority */ +#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority, + 3 bits for subpriority */ +#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority, + 2 bits for subpriority */ +#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority, + 1 bit for subpriority */ +#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority, + 0 bit for subpriority */ +#endif + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/stm32_assert.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/stm32_assert.h new file mode 100644 index 0000000..8e1e57a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/stm32_assert.h @@ -0,0 +1,53 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32_assert.h + * @brief STM32 assert file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_ASSERT_H +#define __STM32_ASSERT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Includes ------------------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32_ASSERT_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/stm32g4xx_it.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/stm32g4xx_it.h new file mode 100644 index 0000000..d8e034a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/stm32g4xx_it.h @@ -0,0 +1,67 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32g4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_IT_H +#define __STM32G4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void EXTI15_10_IRQHandler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_IT_H */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/tim_delay.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/tim_delay.h new file mode 100644 index 0000000..105ad6a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Inc/tim_delay.h @@ -0,0 +1,17 @@ +/* + * im_delay.h + * + * Created on: 26 wrz 2014 + * Author: niw-lap + */ + +#ifndef IM_DELAY_H_ +#define IM_DELAY_H_ + +#include "main.h" + +void _delay_ms (uint32_t delay_us); +void _delay_us (uint32_t delay_us); + + +#endif /* IM_DELAY_H_ */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/LCD_IO_driver.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/LCD_IO_driver.c new file mode 100644 index 0000000..1a43602 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/LCD_IO_driver.c @@ -0,0 +1,196 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-07 15:51:41 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-08 00:34:48 + */ + +#define LCD_DATA_PORTB LCD_D4_GPIO_Port +#define LCD_SIG_PORT LCD_RS_GPIO_Port + +#define LCD_D4_MASK 0x01 +#define LCD_D5_MASK 0x02 +#define LCD_D6_MASK 0x04 +#define LCD_D7_MASK 0x08 + +#define ON 1 +#define OFF 0 + +// #include "lcd_hd44780_config.h" +#include "lcd_hd44780_interface.h" +#include "main.h" +#include "tim_delay.h" +#include "stm32g474xx.h" +#include + +LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + +static void init_LCD_data_and_SIG_pins(void); +static void set_LCD_DATA_PINS_as_outputs(void); +static void set_LCD_DATA_PINS_as_inputs(void); +static void set_LCD_DATA_PINS_state(uint8_t data); +static uint8_t get_LCD_DATA_PINS_state(void); +static void LCD_set_SIG(enum lcd_sig LCD_SIG); +static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +// static void init_LCD_SIGNAL_PINS_as_outputs(void); + +/************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + set_LCD_DATA_PINS_as_outputs, + set_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + _delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +/*************LCD_IO_driver_interface implementation END***************/ + +static void init_LCD_data_and_SIG_pins(void) +{ + // all pins are initialized in CubeIDE code +} + +static void set_LCD_DATA_PINS_as_outputs(void) +{ + + GPIO_InitStruct.Pin = LCD_D6_Pin | LCD_D5_Pin | LCD_D4_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_DATA_PORTB, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LCD_D7_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_D7_GPIO_Port, &GPIO_InitStruct); +} +static void set_LCD_DATA_PINS_as_inputs(void) +{ + GPIO_InitStruct.Pin = LCD_D6_Pin | LCD_D5_Pin | LCD_D4_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; + LL_GPIO_Init(LCD_DATA_PORTB, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LCD_D7_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; + LL_GPIO_Init(LCD_D7_GPIO_Port, &GPIO_InitStruct); +} + +static void set_LCD_DATA_PINS_state(uint8_t data) +{ + if ((data & LCD_D4_MASK)) + LL_GPIO_SetOutputPin(LCD_D4_GPIO_Port, LCD_D4_Pin); + else + LL_GPIO_ResetOutputPin(LCD_D4_GPIO_Port, LCD_D4_Pin); + + if ((data & LCD_D5_MASK)) + LL_GPIO_SetOutputPin(LCD_D5_GPIO_Port, LCD_D5_Pin); + else + LL_GPIO_ResetOutputPin(LCD_D5_GPIO_Port, LCD_D5_Pin); + + if ((data & LCD_D6_MASK)) + LL_GPIO_SetOutputPin(LCD_D6_GPIO_Port, LCD_D6_Pin); + else + LL_GPIO_ResetOutputPin(LCD_D6_GPIO_Port, LCD_D6_Pin); + if ((data & LCD_D7_MASK)) + LL_GPIO_SetOutputPin(LCD_D7_GPIO_Port, LCD_D7_Pin); + else + LL_GPIO_ResetOutputPin(LCD_D7_GPIO_Port, LCD_D7_Pin); +} + +static uint8_t get_LCD_DATA_PINS_state(void) +{ + uint8_t data = 0; + if (LL_GPIO_IsInputPinSet(LCD_D4_GPIO_Port, LCD_D4_Pin)) + data = LCD_D4_MASK; + if (LL_GPIO_IsInputPinSet(LCD_D5_GPIO_Port, LCD_D5_Pin)) + data |= LCD_D5_MASK; + if (LL_GPIO_IsInputPinSet(LCD_D6_GPIO_Port, LCD_D6_Pin)) + data |= LCD_D6_MASK; + if (LL_GPIO_IsInputPinSet(LCD_D7_GPIO_Port, LCD_D7_Pin)) + data |= LCD_D7_MASK; + return data; +} + +static void LCD_set_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LL_GPIO_SetOutputPin(LCD_RS_GPIO_Port, LCD_RS_Pin); + break; + case LCD_E: + LL_GPIO_SetOutputPin(LCD_E_GPIO_Port, LCD_E_Pin); + break; +#if USE_RW_PIN == ON + case LCD_RW: + LL_GPIO_SetOutputPin(LCD_RW_GPIO_Port, LCD_RW_Pin); + break; +#endif + case LCD_BCKL: + LL_GPIO_SetOutputPin(LCD_BCKL_GPIO_Port, LCD_BCKL_Pin); + break; + default: + break; + } +} + +static void LCD_reset_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LL_GPIO_ResetOutputPin(LCD_RS_GPIO_Port, LCD_RS_Pin); + break; + case LCD_E: + LL_GPIO_ResetOutputPin(LCD_E_GPIO_Port, LCD_E_Pin); + break; +#if USE_RW_PIN == ON + case LCD_RW: + LL_GPIO_ResetOutputPin(LCD_RW_GPIO_Port, LCD_RW_Pin); + break; +#endif + case LCD_BCKL: + LL_GPIO_ResetOutputPin(LCD_BCKL_GPIO_Port, LCD_BCKL_Pin); + break; + default: + break; + } +} + +//CUBE IDE initiize all outputs and inputs +// static void init_LCD_SIGNAL_PINS_as_outputs(void) +// { +// #if USE_RW_PIN == ON +// GPIO_InitStruct.Pin = LCD_RW_Pin; +// GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; +// GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; +// GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +// GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +// LL_GPIO_Init(LCD_RW_GPIO_Port, &GPIO_InitStruct); +// #endif +// GPIO_InitStruct.Pin = LCD_RS_Pin; +// GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; +// GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; +// GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +// GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +// LL_GPIO_Init(LCD_RS_GPIO_Port, &GPIO_InitStruct); + +// GPIO_InitStruct.Pin = LCD_E_Pin; +// GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; +// GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; +// GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +// GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +// LL_GPIO_Init(LCD_E_GPIO_Port, &GPIO_InitStruct); +// } diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/main.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/main.c new file mode 100644 index 0000000..bb60fd7 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/main.c @@ -0,0 +1,460 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "lcd_hd44780.h" +#include "tim_delay.h" +#include +#include "stm32g474xx.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +#define SHIFT_DELAY 300 +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ +const char *demo_tekst = {"Congratulation, you have just run LCD demo example on STM32G474-Nucleo."}; +const char *demo_title = {"LCD HD44780 DEMO"}; + +uint8_t j = 0; +uint8_t i = 0; +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_LPUART1_UART_Init(void); +/* USER CODE BEGIN PFP */ +static void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line, uint16_t speed); +static void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line, uint16_t speed); +static void blink_backlight(uint8_t blinks_no); +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG); + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); + + /* System interrupt init*/ + NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + + /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral + */ + LL_PWR_DisableUCPDDeadBattery(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_LPUART1_UART_Init(); + /* USER CODE BEGIN 2 */ + // LL_GPIO_ResetOutputPin(LCD_BCKL_GPIO_Port,LCD_BCKL_Pin); + // _delay_ms(1000); + // LL_GPIO_SetOutputPin(LCD_BCKL_GPIO_Port,LCD_BCKL_Pin); + lcd_init(); + lcd_buf_str(demo_title); + lcd_update(); + blink_backlight(3); + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + lcd_buf_slide_str_in(demo_tekst, LINE_2, SHIFT_DELAY); + lcd_buf_slide_str_out(demo_tekst, LINE_2, SHIFT_DELAY); + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); + while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_3) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_HSI_Enable(); + /* Wait till HSI is ready */ + while(LL_RCC_HSI_IsReady() != 1) + { + } + + LL_RCC_HSI_SetCalibTrimming(64); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_1, 12, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + } + + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2); + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + } + + /* Insure 1us transition state at intermediate medium speed clock*/ + for (__IO uint32_t i = (170 >> 1); i !=0; i--); + + /* Set AHB prescaler*/ + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_4); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + + LL_Init1msTick(96000000); + + LL_SetSystemCoreClock(96000000); +} + +/** + * @brief LPUART1 Initialization Function + * @param None + * @retval None + */ +static void MX_LPUART1_UART_Init(void) +{ + + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + LL_LPUART_InitTypeDef LPUART_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1); + + /* Peripheral clock enable */ + LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART1); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + /**LPUART1 GPIO Configuration + PA2 ------> LPUART1_TX + PA3 ------> LPUART1_RX + */ + GPIO_InitStruct.Pin = LPUART1_TX_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_12; + LL_GPIO_Init(LPUART1_TX_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LPUART1_RX_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_12; + LL_GPIO_Init(LPUART1_RX_GPIO_Port, &GPIO_InitStruct); + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + LPUART_InitStruct.PrescalerValue = LL_LPUART_PRESCALER_DIV1; + LPUART_InitStruct.BaudRate = 115200; + LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_8B; + LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1; + LPUART_InitStruct.Parity = LL_LPUART_PARITY_NONE; + LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX; + LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE; + LL_LPUART_Init(LPUART1, &LPUART_InitStruct); + LL_LPUART_SetTXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8); + LL_LPUART_SetRXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8); + LL_LPUART_DisableFIFO(LPUART1); + + /* USER CODE BEGIN WKUPType LPUART1 */ + + /* USER CODE END WKUPType LPUART1 */ + + LL_LPUART_Enable(LPUART1); + + /* Polling LPUART1 initialisation */ + while((!(LL_LPUART_IsActiveFlag_TEACK(LPUART1))) || (!(LL_LPUART_IsActiveFlag_REACK(LPUART1)))) + { + } + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* USER CODE END LPUART1_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + LL_EXTI_InitTypeDef EXTI_InitStruct = {0}; + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +/* USER CODE BEGIN MX_GPIO_Init_1 */ +/* USER CODE END MX_GPIO_Init_1 */ + + /* GPIO Ports Clock Enable */ + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOF); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); + + /**/ + LL_GPIO_ResetOutputPin(LD2_GPIO_Port, LD2_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LCD_D6_GPIO_Port, LCD_D6_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LCD_E_GPIO_Port, LCD_E_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LCD_D7_GPIO_Port, LCD_D7_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LCD_RS_GPIO_Port, LCD_RS_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LCD_D5_GPIO_Port, LCD_D5_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LCD_D4_GPIO_Port, LCD_D4_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LCD_BCKL_GPIO_Port, LCD_BCKL_Pin); + + /**/ + LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13); + + /**/ + EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13; + EXTI_InitStruct.LineCommand = ENABLE; + EXTI_InitStruct.Mode = LL_EXTI_MODE_IT; + EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING; + LL_EXTI_Init(&EXTI_InitStruct); + + /**/ + LL_GPIO_SetPinPull(B1_GPIO_Port, B1_Pin, LL_GPIO_PULL_NO); + + /**/ + LL_GPIO_SetPinMode(B1_GPIO_Port, B1_Pin, LL_GPIO_MODE_INPUT); + + /**/ + GPIO_InitStruct.Pin = LD2_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LCD_D6_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_D6_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LCD_E_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_E_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LCD_D7_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_D7_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LCD_RS_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_RS_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LCD_D5_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_D5_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LCD_D4_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_D4_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LCD_BCKL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LCD_BCKL_GPIO_Port, &GPIO_InitStruct); + + /* EXTI interrupt init*/ + NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + NVIC_EnableIRQ(EXTI15_10_IRQn); + +/* USER CODE BEGIN MX_GPIO_Init_2 */ +/* USER CODE END MX_GPIO_Init_2 */ +} + +/* USER CODE BEGIN 4 */ +void lcd_buf_slide_str_out(const char *str, enum LCD_LINES lcd_line, uint16_t speed) +{ + uint8_t str_end_flag = 0; + for (j = 0; j <= strlen(str); j++) + { + _delay_ms(speed); + lcd_buf_locate(lcd_line, C1); + for (i = 0; i < LCD_X; i++) + { + if ((str[j + i] != '\0') && (str_end_flag == 0)) + { + lcd_buf_char(str[j + i]); + } + else + { + str_end_flag = 0xFF; + lcd_buf_char(' '); + } + } + str_end_flag = 0; + lcd_update(); + } +} + +void lcd_buf_slide_str_in(const char *str, enum LCD_LINES lcd_line, uint16_t speed) +{ + for (i = LCD_X - 1; i > C1; i--) + { + _delay_ms(speed); + lcd_buf_locate(lcd_line, i); + for (uint8_t j = 0; j < (LCD_X - i); j++) + { + lcd_buf_char(str[j]); + } + lcd_update(); + } +} + +static void blink_backlight(uint8_t blinks_no) +{ + for(uint8_t i=0; i
© Copyright (c) 2020 STMicroelectronics. - * All rights reserved.
+ * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/system_stm32g4xx.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/system_stm32g4xx.c new file mode 100644 index 0000000..922e57a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/system_stm32g4xx.c @@ -0,0 +1,285 @@ +/** + ****************************************************************************** + * @file system_stm32g4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32g4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the HSI (16 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | HSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 16 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * Require 48MHz for RNG | Disabled + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32g4xx_system + * @{ + */ + +/** @addtogroup STM32G4xx_System_Private_Includes + * @{ + */ + +#include "stm32g4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in Flash or Sram, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +/*!< Uncomment the following line if you need to relocate your vector Table + in Sram else user remap will be done in Flash. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +#else +#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = HSI_VALUE; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ + #endif + + /* Configure the Vector Table location add offset address ------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value + * 24 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp, pllvco, pllr, pllsource, pllm; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ; + if (pllsource == 0x02UL) /* HSI used as PLL clock source */ + { + pllvco = (HSI_VALUE / pllm); + } + else /* HSE used as PLL clock source */ + { + pllvco = (HSE_VALUE / pllm); + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/tim_delay.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/tim_delay.c new file mode 100644 index 0000000..467e9fd --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Src/tim_delay.c @@ -0,0 +1,62 @@ +/* + * tim_delay.c + * + * Created on: 26 wrz 2014 + * Author: niw-lap + */ +#include "tim_delay.h" +#include "stm32g474xx.h" + + +void _delay_ms(uint32_t delay_ms) +{ + RCC-> APB1ENR1 |= RCC_APB1ENR1_TIM6EN; + + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + TIM6 -> PSC = 0; + TIM6 -> ARR =47999; + + TIM6 -> CR1 |= TIM_CR1_ARPE; + TIM6 -> EGR |= TIM_EGR_UG; + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + + TIM6 -> CR1 |= TIM_CR1_CEN; + while (delay_ms!=0) + { + if ((TIM6 -> SR & TIM_SR_UIF) == TIM_SR_UIF) + { + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + delay_ms--; + } + } + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + RCC-> APB1ENR1 &= ~((uint32_t)RCC_APB1ENR1_TIM6EN); //wy��cz clocka dla timera + + +} + +void _delay_us(uint32_t delay_us) +{ + RCC-> APB1ENR1 |= RCC_APB1ENR1_TIM6EN; + + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + TIM6 -> PSC = 0; + TIM6 -> ARR =47; + + TIM6 -> CR1 |= TIM_CR1_ARPE; + TIM6 -> EGR |= TIM_EGR_UG; + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + + TIM6 -> CR1 |= TIM_CR1_CEN; + while (delay_us!=0) + { + if ((TIM6 -> SR & TIM_SR_UIF) == TIM_SR_UIF) + { + TIM6 -> SR &=~((uint32_t)(TIM_SR_UIF)); + delay_us--; + } + } + TIM6 -> CR1 &=~((uint32_t)(TIM_CR1_CEN)); + RCC-> APB1ENR1 &= ~((uint32_t)RCC_APB1ENR1_TIM6EN); //wy��cz clocka dla timera +} + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Startup/startup_stm32g474retx.s b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Startup/startup_stm32g474retx.s new file mode 100644 index 0000000..e7a2c61 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Core/Startup/startup_stm32g474retx.s @@ -0,0 +1,592 @@ +/** + ****************************************************************************** + * @file startup_stm32g474xx.s + * @author MCD Application Team + * @brief STM32G474xx devices vector table GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_PVM_IRQHandler + .word RTC_TAMP_LSECSS_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word USB_HP_IRQHandler + .word USB_LP_IRQHandler + .word FDCAN1_IT0_IRQHandler + .word FDCAN1_IT1_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word USBWakeUp_IRQHandler + .word TIM8_BRK_IRQHandler + .word TIM8_UP_IRQHandler + .word TIM8_TRG_COM_IRQHandler + .word TIM8_CC_IRQHandler + .word ADC3_IRQHandler + .word FMC_IRQHandler + .word LPTIM1_IRQHandler + .word TIM5_IRQHandler + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word TIM7_DAC_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word ADC4_IRQHandler + .word ADC5_IRQHandler + .word UCPD1_IRQHandler + .word COMP1_2_3_IRQHandler + .word COMP4_5_6_IRQHandler + .word COMP7_IRQHandler + .word HRTIM1_Master_IRQHandler + .word HRTIM1_TIMA_IRQHandler + .word HRTIM1_TIMB_IRQHandler + .word HRTIM1_TIMC_IRQHandler + .word HRTIM1_TIMD_IRQHandler + .word HRTIM1_TIME_IRQHandler + .word HRTIM1_FLT_IRQHandler + .word HRTIM1_TIMF_IRQHandler + .word CRS_IRQHandler + .word SAI1_IRQHandler + .word TIM20_BRK_IRQHandler + .word TIM20_UP_IRQHandler + .word TIM20_TRG_COM_IRQHandler + .word TIM20_CC_IRQHandler + .word FPU_IRQHandler + .word I2C4_EV_IRQHandler + .word I2C4_ER_IRQHandler + .word SPI4_IRQHandler + .word 0 + .word FDCAN2_IT0_IRQHandler + .word FDCAN2_IT1_IRQHandler + .word FDCAN3_IT0_IRQHandler + .word FDCAN3_IT1_IRQHandler + .word RNG_IRQHandler + .word LPUART1_IRQHandler + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word DMAMUX_OVR_IRQHandler + .word QUADSPI_IRQHandler + .word DMA1_Channel8_IRQHandler + .word DMA2_Channel6_IRQHandler + .word DMA2_Channel7_IRQHandler + .word DMA2_Channel8_IRQHandler + .word CORDIC_IRQHandler + .word FMAC_IRQHandler + + .size g_pfnVectors, .-g_pfnVectors + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_PVM_IRQHandler + .thumb_set PVD_PVM_IRQHandler,Default_Handler + + .weak RTC_TAMP_LSECSS_IRQHandler + .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USB_HP_IRQHandler + .thumb_set USB_HP_IRQHandler,Default_Handler + + .weak USB_LP_IRQHandler + .thumb_set USB_LP_IRQHandler,Default_Handler + + .weak FDCAN1_IT0_IRQHandler + .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler + + .weak FDCAN1_IT1_IRQHandler + .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_DAC_IRQHandler + .thumb_set TIM7_DAC_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak ADC4_IRQHandler + .thumb_set ADC4_IRQHandler,Default_Handler + + .weak ADC5_IRQHandler + .thumb_set ADC5_IRQHandler,Default_Handler + + .weak UCPD1_IRQHandler + .thumb_set UCPD1_IRQHandler,Default_Handler + + .weak COMP1_2_3_IRQHandler + .thumb_set COMP1_2_3_IRQHandler,Default_Handler + + .weak COMP4_5_6_IRQHandler + .thumb_set COMP4_5_6_IRQHandler,Default_Handler + + .weak COMP7_IRQHandler + .thumb_set COMP7_IRQHandler,Default_Handler + + .weak HRTIM1_Master_IRQHandler + .thumb_set HRTIM1_Master_IRQHandler,Default_Handler + + .weak HRTIM1_TIMA_IRQHandler + .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler + + .weak HRTIM1_TIMB_IRQHandler + .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler + + .weak HRTIM1_TIMC_IRQHandler + .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler + + .weak HRTIM1_TIMD_IRQHandler + .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler + + .weak HRTIM1_TIME_IRQHandler + .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler + + .weak HRTIM1_FLT_IRQHandler + .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler + + .weak HRTIM1_TIMF_IRQHandler + .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler + + .weak CRS_IRQHandler + .thumb_set CRS_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak TIM20_BRK_IRQHandler + .thumb_set TIM20_BRK_IRQHandler,Default_Handler + + .weak TIM20_UP_IRQHandler + .thumb_set TIM20_UP_IRQHandler,Default_Handler + + .weak TIM20_TRG_COM_IRQHandler + .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler + + .weak TIM20_CC_IRQHandler + .thumb_set TIM20_CC_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak I2C4_EV_IRQHandler + .thumb_set I2C4_EV_IRQHandler,Default_Handler + + .weak I2C4_ER_IRQHandler + .thumb_set I2C4_ER_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak FDCAN2_IT0_IRQHandler + .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler + + .weak FDCAN2_IT1_IRQHandler + .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler + + .weak FDCAN3_IT0_IRQHandler + .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler + + .weak FDCAN3_IT1_IRQHandler + .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler + + .weak RNG_IRQHandler + .thumb_set RNG_IRQHandler,Default_Handler + + .weak LPUART1_IRQHandler + .thumb_set LPUART1_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak DMAMUX_OVR_IRQHandler + .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak DMA1_Channel8_IRQHandler + .thumb_set DMA1_Channel8_IRQHandler,Default_Handler + + .weak DMA2_Channel6_IRQHandler + .thumb_set DMA2_Channel6_IRQHandler,Default_Handler + + .weak DMA2_Channel7_IRQHandler + .thumb_set DMA2_Channel7_IRQHandler,Default_Handler + + .weak DMA2_Channel8_IRQHandler + .thumb_set DMA2_Channel8_IRQHandler,Default_Handler + + .weak CORDIC_IRQHandler + .thumb_set CORDIC_IRQHandler,Default_Handler + + .weak FMAC_IRQHandler + .thumb_set FMAC_IRQHandler,Default_Handler + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h new file mode 100644 index 0000000..1899d0a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h @@ -0,0 +1,18116 @@ +/** + ****************************************************************************** + * @file stm32g474xx.h + * @author MCD Application Team + * @brief CMSIS STM32G474xx Device Peripheral Access Layer Header File. + * + * This file contains: + * - Data structures and the address mapping for all peripherals + * - Peripheral's registers declarations and bits definition + * - Macros to access peripheral's registers hardware + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS_Device + * @{ + */ + +/** @addtogroup stm32g474xx + * @{ + */ + +#ifndef __STM32G474xx_H +#define __STM32G474xx_H + +#ifdef __cplusplus + extern "C" { +#endif /* __cplusplus */ + +/** @addtogroup Configuration_section_for_CMSIS + * @{ + */ + +/** + * @brief Configuration of the Cortex-M4 Processor and Core Peripherals + */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ + +/** + * @} + */ + +/** @addtogroup Peripheral_interrupt_number_definition + * @{ + */ + +/** + * @brief STM32G4XX Interrupt Number Definition, according to the selected device + * in @ref Library_configuration_section + */ +typedef enum +{ +/****** Cortex-M4 Processor Exceptions Numbers *********************************************************************************/ + NonMaskableInt_IRQn = -14, /*!< 2 Cortex-M4 Non Maskable Interrupt */ + HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */ + MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */ + BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */ +/****** STM32 specific Interrupt Numbers ***************************************************************************************/ + WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ + PVD_PVM_IRQn = 1, /*!< PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection Interrupts */ + RTC_TAMP_LSECSS_IRQn = 2, /*!< RTC Tamper and TimeStamp and RCC LSE CSS interrupts through the EXTI */ + RTC_WKUP_IRQn = 3, /*!< RTC Wakeup interrupt through the EXTI line */ + FLASH_IRQn = 4, /*!< FLASH global Interrupt */ + RCC_IRQn = 5, /*!< RCC global Interrupt */ + EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */ + EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */ + EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */ + EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */ + EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */ + DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */ + DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */ + DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */ + DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */ + DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */ + DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */ + DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */ + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_IRQn = 19, /*!< USB HP Interrupt */ + USB_LP_IRQn = 20, /*!< USB LP Interrupt */ + FDCAN1_IT0_IRQn = 21, /*!< FDCAN1 IT0 Interrupt */ + FDCAN1_IT1_IRQn = 22, /*!< FDCAN1 IT1 Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break, Transition error, Index error and TIM15 global interrupt */ + TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update Interrupt and TIM16 global interrupt */ + TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 TIM1 Trigger, Commutation, Direction change, Index and TIM17 global interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTC_Alarm_IRQn = 41, /*!< RTC Alarm (A and B) through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42, /*!< USB Wakeup through EXTI line Interrupt */ + TIM8_BRK_IRQn = 43, /*!< TIM8 Break, Transition error and Index error Interrupt */ + TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ + TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger, Commutation, Direction change and Index Interrupt */ + TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ + ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ + FMC_IRQn = 48, /*!< FMC global Interrupt */ + LPTIM1_IRQn = 49, /*!< LP TIM1 Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_DAC_IRQn = 54, /*!< TIM6 global and DAC1&3 underrun error interrupts */ + TIM7_DAC_IRQn = 55, /*!< TIM7 global and DAC2&4 underrun error interrupts */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */ + DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */ + ADC4_IRQn = 61, /*!< ADC4 global Interrupt */ + ADC5_IRQn = 62, /*!< ADC5 global Interrupt */ + UCPD1_IRQn = 63, /*!< UCPD global Interrupt */ + COMP1_2_3_IRQn = 64, /*!< COMP1, COMP2 and COMP3 Interrupts */ + COMP4_5_6_IRQn = 65, /*!< COMP4, COMP5 and COMP6 */ + COMP7_IRQn = 66, /*!< COMP7 Interrupt */ + HRTIM1_Master_IRQn = 67, /*!< HRTIM Master Timer global Interrupt */ + HRTIM1_TIMA_IRQn = 68, /*!< HRTIM Timer A global Interrupt */ + HRTIM1_TIMB_IRQn = 69, /*!< HRTIM Timer B global Interrupt */ + HRTIM1_TIMC_IRQn = 70, /*!< HRTIM Timer C global Interrupt */ + HRTIM1_TIMD_IRQn = 71, /*!< HRTIM Timer D global Interrupt */ + HRTIM1_TIME_IRQn = 72, /*!< HRTIM Timer E global Interrupt */ + HRTIM1_FLT_IRQn = 73, /*!< HRTIM Fault global Interrupt */ + HRTIM1_TIMF_IRQn = 74, /*!< HRTIM Timer F global Interrupt */ + CRS_IRQn = 75, /*!< CRS global interrupt */ + SAI1_IRQn = 76, /*!< Serial Audio Interface global interrupt */ + TIM20_BRK_IRQn = 77, /*!< TIM20 Break, Transition error and Index error Interrupt */ + TIM20_UP_IRQn = 78, /*!< TIM20 Update interrupt */ + TIM20_TRG_COM_IRQn = 79, /*!< TIM20 Trigger, Commutation, Direction change and Index Interrupt */ + TIM20_CC_IRQn = 80, /*!< TIM20 Capture Compare interrupt */ + FPU_IRQn = 81, /*!< FPU global interrupt */ + I2C4_EV_IRQn = 82, /*!< I2C4 Event interrupt */ + I2C4_ER_IRQn = 83, /*!< I2C4 Error interrupt */ + SPI4_IRQn = 84, /*!< SPI4 Event interrupt */ + FDCAN2_IT0_IRQn = 86, /*!< FDCAN2 interrupt line 0 interrupt */ + FDCAN2_IT1_IRQn = 87, /*!< FDCAN2 interrupt line 1 interrupt */ + FDCAN3_IT0_IRQn = 88, /*!< FDCAN3 interrupt line 0 interrupt */ + FDCAN3_IT1_IRQn = 89, /*!< FDCAN3 interrupt line 1 interrupt */ + RNG_IRQn = 90, /*!< RNG global interrupt */ + LPUART1_IRQn = 91, /*!< LP UART 1 Interrupt */ + I2C3_EV_IRQn = 92, /*!< I2C3 Event Interrupt */ + I2C3_ER_IRQn = 93, /*!< I2C3 Error interrupt */ + DMAMUX_OVR_IRQn = 94, /*!< DMAMUX overrun global interrupt */ + QUADSPI_IRQn = 95, /*!< QUADSPI interrupt */ + DMA1_Channel8_IRQn = 96, /*!< DMA1 Channel 8 interrupt */ + DMA2_Channel6_IRQn = 97, /*!< DMA2 Channel 6 interrupt */ + DMA2_Channel7_IRQn = 98, /*!< DMA2 Channel 7 interrupt */ + DMA2_Channel8_IRQn = 99, /*!< DMA2 Channel 8 interrupt */ + CORDIC_IRQn = 100, /*!< CORDIC global Interrupt */ + FMAC_IRQn = 101 /*!< FMAC global Interrupt */ +} IRQn_Type; + +/** + * @} + */ + +#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ +#include "system_stm32g4xx.h" +#include + +/** @addtogroup Peripheral_registers_structures + * @{ + */ + +/** + * @brief Analog to Digital Converter + */ + +typedef struct +{ + __IO uint32_t ISR; /*!< ADC interrupt and status register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< ADC interrupt enable register, Address offset: 0x04 */ + __IO uint32_t CR; /*!< ADC control register, Address offset: 0x08 */ + __IO uint32_t CFGR; /*!< ADC configuration register 1, Address offset: 0x0C */ + __IO uint32_t CFGR2; /*!< ADC configuration register 2, Address offset: 0x10 */ + __IO uint32_t SMPR1; /*!< ADC sampling time register 1, Address offset: 0x14 */ + __IO uint32_t SMPR2; /*!< ADC sampling time register 2, Address offset: 0x18 */ + uint32_t RESERVED1; /*!< Reserved, 0x1C */ + __IO uint32_t TR1; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x20 */ + __IO uint32_t TR2; /*!< ADC analog watchdog 2 threshold register, Address offset: 0x24 */ + __IO uint32_t TR3; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x28 */ + uint32_t RESERVED2; /*!< Reserved, 0x2C */ + __IO uint32_t SQR1; /*!< ADC group regular sequencer register 1, Address offset: 0x30 */ + __IO uint32_t SQR2; /*!< ADC group regular sequencer register 2, Address offset: 0x34 */ + __IO uint32_t SQR3; /*!< ADC group regular sequencer register 3, Address offset: 0x38 */ + __IO uint32_t SQR4; /*!< ADC group regular sequencer register 4, Address offset: 0x3C */ + __IO uint32_t DR; /*!< ADC group regular data register, Address offset: 0x40 */ + uint32_t RESERVED3; /*!< Reserved, 0x44 */ + uint32_t RESERVED4; /*!< Reserved, 0x48 */ + __IO uint32_t JSQR; /*!< ADC group injected sequencer register, Address offset: 0x4C */ + uint32_t RESERVED5[4]; /*!< Reserved, 0x50 - 0x5C */ + __IO uint32_t OFR1; /*!< ADC offset register 1, Address offset: 0x60 */ + __IO uint32_t OFR2; /*!< ADC offset register 2, Address offset: 0x64 */ + __IO uint32_t OFR3; /*!< ADC offset register 3, Address offset: 0x68 */ + __IO uint32_t OFR4; /*!< ADC offset register 4, Address offset: 0x6C */ + uint32_t RESERVED6[4]; /*!< Reserved, 0x70 - 0x7C */ + __IO uint32_t JDR1; /*!< ADC group injected rank 1 data register, Address offset: 0x80 */ + __IO uint32_t JDR2; /*!< ADC group injected rank 2 data register, Address offset: 0x84 */ + __IO uint32_t JDR3; /*!< ADC group injected rank 3 data register, Address offset: 0x88 */ + __IO uint32_t JDR4; /*!< ADC group injected rank 4 data register, Address offset: 0x8C */ + uint32_t RESERVED7[4]; /*!< Reserved, 0x090 - 0x09C */ + __IO uint32_t AWD2CR; /*!< ADC analog watchdog 2 configuration register, Address offset: 0xA0 */ + __IO uint32_t AWD3CR; /*!< ADC analog watchdog 3 Configuration Register, Address offset: 0xA4 */ + uint32_t RESERVED8; /*!< Reserved, 0x0A8 */ + uint32_t RESERVED9; /*!< Reserved, 0x0AC */ + __IO uint32_t DIFSEL; /*!< ADC differential mode selection register, Address offset: 0xB0 */ + __IO uint32_t CALFACT; /*!< ADC calibration factors, Address offset: 0xB4 */ + uint32_t RESERVED10[2];/*!< Reserved, 0x0B8 - 0x0BC */ + __IO uint32_t GCOMP; /*!< ADC calibration factors, Address offset: 0xC0 */ +} ADC_TypeDef; + +typedef struct +{ + __IO uint32_t CSR; /*!< ADC common status register, Address offset: 0x300 + 0x00 */ + uint32_t RESERVED1; /*!< Reserved, Address offset: 0x300 + 0x04 */ + __IO uint32_t CCR; /*!< ADC common configuration register, Address offset: 0x300 + 0x08 */ + __IO uint32_t CDR; /*!< ADC common group regular data register Address offset: 0x300 + 0x0C */ +} ADC_Common_TypeDef; + +/** + * @brief FD Controller Area Network + */ + +typedef struct +{ + __IO uint32_t CREL; /*!< FDCAN Core Release register, Address offset: 0x000 */ + __IO uint32_t ENDN; /*!< FDCAN Endian register, Address offset: 0x004 */ + uint32_t RESERVED1; /*!< Reserved, 0x008 */ + __IO uint32_t DBTP; /*!< FDCAN Data Bit Timing & Prescaler register, Address offset: 0x00C */ + __IO uint32_t TEST; /*!< FDCAN Test register, Address offset: 0x010 */ + __IO uint32_t RWD; /*!< FDCAN RAM Watchdog register, Address offset: 0x014 */ + __IO uint32_t CCCR; /*!< FDCAN CC Control register, Address offset: 0x018 */ + __IO uint32_t NBTP; /*!< FDCAN Nominal Bit Timing & Prescaler register, Address offset: 0x01C */ + __IO uint32_t TSCC; /*!< FDCAN Timestamp Counter Configuration register, Address offset: 0x020 */ + __IO uint32_t TSCV; /*!< FDCAN Timestamp Counter Value register, Address offset: 0x024 */ + __IO uint32_t TOCC; /*!< FDCAN Timeout Counter Configuration register, Address offset: 0x028 */ + __IO uint32_t TOCV; /*!< FDCAN Timeout Counter Value register, Address offset: 0x02C */ + uint32_t RESERVED2[4]; /*!< Reserved, 0x030 - 0x03C */ + __IO uint32_t ECR; /*!< FDCAN Error Counter register, Address offset: 0x040 */ + __IO uint32_t PSR; /*!< FDCAN Protocol Status register, Address offset: 0x044 */ + __IO uint32_t TDCR; /*!< FDCAN Transmitter Delay Compensation register, Address offset: 0x048 */ + uint32_t RESERVED3; /*!< Reserved, 0x04C */ + __IO uint32_t IR; /*!< FDCAN Interrupt register, Address offset: 0x050 */ + __IO uint32_t IE; /*!< FDCAN Interrupt Enable register, Address offset: 0x054 */ + __IO uint32_t ILS; /*!< FDCAN Interrupt Line Select register, Address offset: 0x058 */ + __IO uint32_t ILE; /*!< FDCAN Interrupt Line Enable register, Address offset: 0x05C */ + uint32_t RESERVED4[8]; /*!< Reserved, 0x060 - 0x07C */ + __IO uint32_t RXGFC; /*!< FDCAN Global Filter Configuration register, Address offset: 0x080 */ + __IO uint32_t XIDAM; /*!< FDCAN Extended ID AND Mask register, Address offset: 0x084 */ + __IO uint32_t HPMS; /*!< FDCAN High Priority Message Status register, Address offset: 0x088 */ + uint32_t RESERVED5; /*!< Reserved, 0x08C */ + __IO uint32_t RXF0S; /*!< FDCAN Rx FIFO 0 Status register, Address offset: 0x090 */ + __IO uint32_t RXF0A; /*!< FDCAN Rx FIFO 0 Acknowledge register, Address offset: 0x094 */ + __IO uint32_t RXF1S; /*!< FDCAN Rx FIFO 1 Status register, Address offset: 0x098 */ + __IO uint32_t RXF1A; /*!< FDCAN Rx FIFO 1 Acknowledge register, Address offset: 0x09C */ + uint32_t RESERVED6[8]; /*!< Reserved, 0x0A0 - 0x0BC */ + __IO uint32_t TXBC; /*!< FDCAN Tx Buffer Configuration register, Address offset: 0x0C0 */ + __IO uint32_t TXFQS; /*!< FDCAN Tx FIFO/Queue Status register, Address offset: 0x0C4 */ + __IO uint32_t TXBRP; /*!< FDCAN Tx Buffer Request Pending register, Address offset: 0x0C8 */ + __IO uint32_t TXBAR; /*!< FDCAN Tx Buffer Add Request register, Address offset: 0x0CC */ + __IO uint32_t TXBCR; /*!< FDCAN Tx Buffer Cancellation Request register, Address offset: 0x0D0 */ + __IO uint32_t TXBTO; /*!< FDCAN Tx Buffer Transmission Occurred register, Address offset: 0x0D4 */ + __IO uint32_t TXBCF; /*!< FDCAN Tx Buffer Cancellation Finished register, Address offset: 0x0D8 */ + __IO uint32_t TXBTIE; /*!< FDCAN Tx Buffer Transmission Interrupt Enable register, Address offset: 0x0DC */ + __IO uint32_t TXBCIE; /*!< FDCAN Tx Buffer Cancellation Finished Interrupt Enable register, Address offset: 0x0E0 */ + __IO uint32_t TXEFS; /*!< FDCAN Tx Event FIFO Status register, Address offset: 0x0E4 */ + __IO uint32_t TXEFA; /*!< FDCAN Tx Event FIFO Acknowledge register, Address offset: 0x0E8 */ +} FDCAN_GlobalTypeDef; + +/** + * @brief FD Controller Area Network Configuration + */ + +typedef struct +{ + __IO uint32_t CKDIV; /*!< FDCAN clock divider register, Address offset: 0x100 + 0x000 */ +} FDCAN_Config_TypeDef; + +/** + * @brief Comparator + */ + +typedef struct +{ + __IO uint32_t CSR; /*!< COMP control and status register, Address offset: 0x00 */ +} COMP_TypeDef; + +/** + * @brief CRC calculation unit + */ + +typedef struct +{ + __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */ + __IO uint32_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ + __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ + uint32_t RESERVED0; /*!< Reserved, 0x0C */ + __IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */ + __IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */ +} CRC_TypeDef; + +/** + * @brief Clock Recovery System + */ +typedef struct +{ + __IO uint32_t CR; /*!< CRS ccontrol register, Address offset: 0x00 */ + __IO uint32_t CFGR; /*!< CRS configuration register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< CRS interrupt and status register, Address offset: 0x08 */ + __IO uint32_t ICR; /*!< CRS interrupt flag clear register, Address offset: 0x0C */ +} CRS_TypeDef; + +/** + * @brief Digital to Analog Converter + */ + +typedef struct +{ + __IO uint32_t CR; /*!< DAC control register, Address offset: 0x00 */ + __IO uint32_t SWTRIGR; /*!< DAC software trigger register, Address offset: 0x04 */ + __IO uint32_t DHR12R1; /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */ + __IO uint32_t DHR12L1; /*!< DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C */ + __IO uint32_t DHR8R1; /*!< DAC channel1 8-bit right aligned data holding register, Address offset: 0x10 */ + __IO uint32_t DHR12R2; /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */ + __IO uint32_t DHR12L2; /*!< DAC channel2 12-bit left aligned data holding register, Address offset: 0x18 */ + __IO uint32_t DHR8R2; /*!< DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C */ + __IO uint32_t DHR12RD; /*!< Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20 */ + __IO uint32_t DHR12LD; /*!< DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24 */ + __IO uint32_t DHR8RD; /*!< DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28 */ + __IO uint32_t DOR1; /*!< DAC channel1 data output register, Address offset: 0x2C */ + __IO uint32_t DOR2; /*!< DAC channel2 data output register, Address offset: 0x30 */ + __IO uint32_t SR; /*!< DAC status register, Address offset: 0x34 */ + __IO uint32_t CCR; /*!< DAC calibration control register, Address offset: 0x38 */ + __IO uint32_t MCR; /*!< DAC mode control register, Address offset: 0x3C */ + __IO uint32_t SHSR1; /*!< DAC Sample and Hold sample time register 1, Address offset: 0x40 */ + __IO uint32_t SHSR2; /*!< DAC Sample and Hold sample time register 2, Address offset: 0x44 */ + __IO uint32_t SHHR; /*!< DAC Sample and Hold hold time register, Address offset: 0x48 */ + __IO uint32_t SHRR; /*!< DAC Sample and Hold refresh time register, Address offset: 0x4C */ + __IO uint32_t RESERVED[2]; + __IO uint32_t STR1; /*!< DAC Sawtooth register, Address offset: 0x58 */ + __IO uint32_t STR2; /*!< DAC Sawtooth register, Address offset: 0x5C */ + __IO uint32_t STMODR; /*!< DAC Sawtooth Mode register, Address offset: 0x60 */ +} DAC_TypeDef; + +/** + * @brief Debug MCU + */ + +typedef struct +{ + __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */ + __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ + __IO uint32_t APB1FZR1; /*!< Debug MCU APB1 freeze register 1, Address offset: 0x08 */ + __IO uint32_t APB1FZR2; /*!< Debug MCU APB1 freeze register 2, Address offset: 0x0C */ + __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x10 */ +} DBGMCU_TypeDef; + +/** + * @brief DMA Controller + */ + +typedef struct +{ + __IO uint32_t CCR; /*!< DMA channel x configuration register */ + __IO uint32_t CNDTR; /*!< DMA channel x number of data register */ + __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */ + __IO uint32_t CMAR; /*!< DMA channel x memory address register */ +} DMA_Channel_TypeDef; + +typedef struct +{ + __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */ + __IO uint32_t IFCR; /*!< DMA interrupt flag clear register, Address offset: 0x04 */ +} DMA_TypeDef; + +/** + * @brief DMA Multiplexer + */ + +typedef struct +{ + __IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x0004 * (channel x) */ +}DMAMUX_Channel_TypeDef; + +typedef struct +{ + __IO uint32_t CSR; /*!< DMA Channel Status Register Address offset: 0x0080 */ + __IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x0084 */ +}DMAMUX_ChannelStatus_TypeDef; + +typedef struct +{ + __IO uint32_t RGCR; /*!< DMA Request Generator x Control Register Address offset: 0x0100 + 0x0004 * (Req Gen x) */ +}DMAMUX_RequestGen_TypeDef; + +typedef struct +{ + __IO uint32_t RGSR; /*!< DMA Request Generator Status Register Address offset: 0x0140 */ + __IO uint32_t RGCFR; /*!< DMA Request Generator Clear Flag Register Address offset: 0x0144 */ +}DMAMUX_RequestGenStatus_TypeDef; + +/** + * @brief External Interrupt/Event Controller + */ + +typedef struct +{ + __IO uint32_t IMR1; /*!< EXTI Interrupt mask register 1, Address offset: 0x00 */ + __IO uint32_t EMR1; /*!< EXTI Event mask register 1, Address offset: 0x04 */ + __IO uint32_t RTSR1; /*!< EXTI Rising trigger selection register 1, Address offset: 0x08 */ + __IO uint32_t FTSR1; /*!< EXTI Falling trigger selection register 1, Address offset: 0x0C */ + __IO uint32_t SWIER1; /*!< EXTI Software interrupt event register 1, Address offset: 0x10 */ + __IO uint32_t PR1; /*!< EXTI Pending register 1, Address offset: 0x14 */ + uint32_t RESERVED1; /*!< Reserved, 0x18 */ + uint32_t RESERVED2; /*!< Reserved, 0x1C */ + __IO uint32_t IMR2; /*!< EXTI Interrupt mask register 2, Address offset: 0x20 */ + __IO uint32_t EMR2; /*!< EXTI Event mask register 2, Address offset: 0x24 */ + __IO uint32_t RTSR2; /*!< EXTI Rising trigger selection register 2, Address offset: 0x28 */ + __IO uint32_t FTSR2; /*!< EXTI Falling trigger selection register 2, Address offset: 0x2C */ + __IO uint32_t SWIER2; /*!< EXTI Software interrupt event register 2, Address offset: 0x30 */ + __IO uint32_t PR2; /*!< EXTI Pending register 2, Address offset: 0x34 */ +} EXTI_TypeDef; + +/** + * @brief FLASH Registers + */ + +typedef struct +{ + __IO uint32_t ACR; /*!< FLASH access control register, Address offset: 0x00 */ + __IO uint32_t PDKEYR; /*!< FLASH power down key register, Address offset: 0x04 */ + __IO uint32_t KEYR; /*!< FLASH key register, Address offset: 0x08 */ + __IO uint32_t OPTKEYR; /*!< FLASH option key register, Address offset: 0x0C */ + __IO uint32_t SR; /*!< FLASH status register, Address offset: 0x10 */ + __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x14 */ + __IO uint32_t ECCR; /*!< FLASH ECC register, Address offset: 0x18 */ + uint32_t RESERVED1; /*!< Reserved1, Address offset: 0x1C */ + __IO uint32_t OPTR; /*!< FLASH option register, Address offset: 0x20 */ + __IO uint32_t PCROP1SR; /*!< FLASH bank1 PCROP start address register, Address offset: 0x24 */ + __IO uint32_t PCROP1ER; /*!< FLASH bank1 PCROP end address register, Address offset: 0x28 */ + __IO uint32_t WRP1AR; /*!< FLASH bank1 WRP area A address register, Address offset: 0x2C */ + __IO uint32_t WRP1BR; /*!< FLASH bank1 WRP area B address register, Address offset: 0x30 */ + uint32_t RESERVED2[4]; /*!< Reserved2, Address offset: 0x34 */ + __IO uint32_t PCROP2SR; /*!< FLASH bank2 PCROP start address register, Address offset: 0x44 */ + __IO uint32_t PCROP2ER; /*!< FLASH bank2 PCROP end address register, Address offset: 0x48 */ + __IO uint32_t WRP2AR; /*!< FLASH bank2 WRP area A address register, Address offset: 0x4C */ + __IO uint32_t WRP2BR; /*!< FLASH bank2 WRP area B address register, Address offset: 0x50 */ + uint32_t RESERVED3[7]; /*!< Reserved3, Address offset: 0x54 */ + __IO uint32_t SEC1R; /*!< FLASH Securable memory register bank1, Address offset: 0x70 */ + __IO uint32_t SEC2R; /*!< FLASH Securable memory register bank2, Address offset: 0x74 */ +} FLASH_TypeDef; + +/** + * @brief FMAC + */ +typedef struct +{ + __IO uint32_t X1BUFCFG; /*!< FMAC X1 Buffer Configuration register, Address offset: 0x00 */ + __IO uint32_t X2BUFCFG; /*!< FMAC X2 Buffer Configuration register, Address offset: 0x04 */ + __IO uint32_t YBUFCFG; /*!< FMAC Y Buffer Configuration register, Address offset: 0x08 */ + __IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C */ + __IO uint32_t CR; /*!< FMAC Control register, Address offset: 0x10 */ + __IO uint32_t SR; /*!< FMAC Status register, Address offset: 0x14 */ + __IO uint32_t WDATA; /*!< FMAC Write Data register, Address offset: 0x18 */ + __IO uint32_t RDATA; /*!< FMAC Read Data register, Address offset: 0x1C */ +} FMAC_TypeDef; + +/** + * @brief Flexible Memory Controller + */ + +typedef struct +{ + __IO uint32_t BTCR[8]; /*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */ + __IO uint32_t PCSCNTR; /*!< PSRAM chip-select counter register, Address offset: 0x20 */ +} FMC_Bank1_TypeDef; + +/** + * @brief Flexible Memory Controller Bank1E + */ + +typedef struct +{ + __IO uint32_t BWTR[7]; /*!< NOR/PSRAM write timing registers, Address offset: 0x104-0x11C */ +} FMC_Bank1E_TypeDef; + +/** + * @brief Flexible Memory Controller Bank3 + */ + +typedef struct +{ + __IO uint32_t PCR; /*!< NAND Flash control register, Address offset: 0x80 */ + __IO uint32_t SR; /*!< NAND Flash FIFO status and interrupt register, Address offset: 0x84 */ + __IO uint32_t PMEM; /*!< NAND Flash Common memory space timing register, Address offset: 0x88 */ + __IO uint32_t PATT; /*!< NAND Flash Attribute memory space timing register, Address offset: 0x8C */ + uint32_t RESERVED0; /*!< Reserved, 0x90 */ + __IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: 0x94 */ +} FMC_Bank3_TypeDef; + +/** + * @brief General Purpose I/O + */ + +typedef struct +{ + __IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */ + __IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */ + __IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */ + __IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */ + __IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */ + __IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */ + __IO uint32_t BSRR; /*!< GPIO port bit set/reset register, Address offset: 0x18 */ + __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ + __IO uint32_t AFR[2]; /*!< GPIO alternate function registers, Address offset: 0x20-0x24 */ + __IO uint32_t BRR; /*!< GPIO Bit Reset register, Address offset: 0x28 */ +} GPIO_TypeDef; + +/** + * @brief Inter-integrated Circuit Interface + */ + +typedef struct +{ + __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< I2C Control register 2, Address offset: 0x04 */ + __IO uint32_t OAR1; /*!< I2C Own address 1 register, Address offset: 0x08 */ + __IO uint32_t OAR2; /*!< I2C Own address 2 register, Address offset: 0x0C */ + __IO uint32_t TIMINGR; /*!< I2C Timing register, Address offset: 0x10 */ + __IO uint32_t TIMEOUTR; /*!< I2C Timeout register, Address offset: 0x14 */ + __IO uint32_t ISR; /*!< I2C Interrupt and status register, Address offset: 0x18 */ + __IO uint32_t ICR; /*!< I2C Interrupt clear register, Address offset: 0x1C */ + __IO uint32_t PECR; /*!< I2C PEC register, Address offset: 0x20 */ + __IO uint32_t RXDR; /*!< I2C Receive data register, Address offset: 0x24 */ + __IO uint32_t TXDR; /*!< I2C Transmit data register, Address offset: 0x28 */ +} I2C_TypeDef; + +/** + * @brief Independent WATCHDOG + */ + +typedef struct +{ + __IO uint32_t KR; /*!< IWDG Key register, Address offset: 0x00 */ + __IO uint32_t PR; /*!< IWDG Prescaler register, Address offset: 0x04 */ + __IO uint32_t RLR; /*!< IWDG Reload register, Address offset: 0x08 */ + __IO uint32_t SR; /*!< IWDG Status register, Address offset: 0x0C */ + __IO uint32_t WINR; /*!< IWDG Window register, Address offset: 0x10 */ +} IWDG_TypeDef; + +/** + * @brief LPTIMER + */ + +typedef struct +{ + __IO uint32_t ISR; /*!< LPTIM Interrupt and Status register, Address offset: 0x00 */ + __IO uint32_t ICR; /*!< LPTIM Interrupt Clear register, Address offset: 0x04 */ + __IO uint32_t IER; /*!< LPTIM Interrupt Enable register, Address offset: 0x08 */ + __IO uint32_t CFGR; /*!< LPTIM Configuration register, Address offset: 0x0C */ + __IO uint32_t CR; /*!< LPTIM Control register, Address offset: 0x10 */ + __IO uint32_t CMP; /*!< LPTIM Compare register, Address offset: 0x14 */ + __IO uint32_t ARR; /*!< LPTIM Autoreload register, Address offset: 0x18 */ + __IO uint32_t CNT; /*!< LPTIM Counter register, Address offset: 0x1C */ + __IO uint32_t OR; /*!< LPTIM Option register, Address offset: 0x20 */ +} LPTIM_TypeDef; + +/** + * @brief Operational Amplifier (OPAMP) + */ + +typedef struct +{ + __IO uint32_t CSR; /*!< OPAMP control/status register, Address offset: 0x00 */ + __IO uint32_t RESERVED[5]; /*!< OPAMP offset trimming register for normal mode, Address offset: 0x04 */ + __IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offset: 0x18 */ +} OPAMP_TypeDef; + +/** + * @brief Power Control + */ + +typedef struct +{ + __IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< PWR power control register 2, Address offset: 0x04 */ + __IO uint32_t CR3; /*!< PWR power control register 3, Address offset: 0x08 */ + __IO uint32_t CR4; /*!< PWR power control register 4, Address offset: 0x0C */ + __IO uint32_t SR1; /*!< PWR power status register 1, Address offset: 0x10 */ + __IO uint32_t SR2; /*!< PWR power status register 2, Address offset: 0x14 */ + __IO uint32_t SCR; /*!< PWR power status reset register, Address offset: 0x18 */ + uint32_t RESERVED; /*!< Reserved, Address offset: 0x1C */ + __IO uint32_t PUCRA; /*!< Pull_up control register of portA, Address offset: 0x20 */ + __IO uint32_t PDCRA; /*!< Pull_Down control register of portA, Address offset: 0x24 */ + __IO uint32_t PUCRB; /*!< Pull_up control register of portB, Address offset: 0x28 */ + __IO uint32_t PDCRB; /*!< Pull_Down control register of portB, Address offset: 0x2C */ + __IO uint32_t PUCRC; /*!< Pull_up control register of portC, Address offset: 0x30 */ + __IO uint32_t PDCRC; /*!< Pull_Down control register of portC, Address offset: 0x34 */ + __IO uint32_t PUCRD; /*!< Pull_up control register of portD, Address offset: 0x38 */ + __IO uint32_t PDCRD; /*!< Pull_Down control register of portD, Address offset: 0x3C */ + __IO uint32_t PUCRE; /*!< Pull_up control register of portE, Address offset: 0x40 */ + __IO uint32_t PDCRE; /*!< Pull_Down control register of portE, Address offset: 0x44 */ + __IO uint32_t PUCRF; /*!< Pull_up control register of portF, Address offset: 0x48 */ + __IO uint32_t PDCRF; /*!< Pull_Down control register of portF, Address offset: 0x4C */ + __IO uint32_t PUCRG; /*!< Pull_up control register of portG, Address offset: 0x50 */ + __IO uint32_t PDCRG; /*!< Pull_Down control register of portG, Address offset: 0x54 */ + uint32_t RESERVED1[10]; /*!< Reserved Address offset: 0x58 - 0x7C */ + __IO uint32_t CR5; /*!< PWR power control register 5, Address offset: 0x80 */ +} PWR_TypeDef; + +/** + * @brief QUAD Serial Peripheral Interface + */ + +typedef struct +{ + __IO uint32_t CR; /*!< QUADSPI Control register, Address offset: 0x00 */ + __IO uint32_t DCR; /*!< QUADSPI Device Configuration register, Address offset: 0x04 */ + __IO uint32_t SR; /*!< QUADSPI Status register, Address offset: 0x08 */ + __IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset: 0x0C */ + __IO uint32_t DLR; /*!< QUADSPI Data Length register, Address offset: 0x10 */ + __IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset: 0x14 */ + __IO uint32_t AR; /*!< QUADSPI Address register, Address offset: 0x18 */ + __IO uint32_t ABR; /*!< QUADSPI Alternate Bytes register, Address offset: 0x1C */ + __IO uint32_t DR; /*!< QUADSPI Data register, Address offset: 0x20 */ + __IO uint32_t PSMKR; /*!< QUADSPI Polling Status Mask register, Address offset: 0x24 */ + __IO uint32_t PSMAR; /*!< QUADSPI Polling Status Match register, Address offset: 0x28 */ + __IO uint32_t PIR; /*!< QUADSPI Polling Interval register, Address offset: 0x2C */ + __IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */ +} QUADSPI_TypeDef; + +/** + * @brief Reset and Clock Control + */ + +typedef struct +{ + __IO uint32_t CR; /*!< RCC clock control register, Address offset: 0x00 */ + __IO uint32_t ICSCR; /*!< RCC internal clock sources calibration register, Address offset: 0x04 */ + __IO uint32_t CFGR; /*!< RCC clock configuration register, Address offset: 0x08 */ + __IO uint32_t PLLCFGR; /*!< RCC system PLL configuration register, Address offset: 0x0C */ + uint32_t RESERVED0; /*!< Reserved, Address offset: 0x10 */ + uint32_t RESERVED1; /*!< Reserved, Address offset: 0x14 */ + __IO uint32_t CIER; /*!< RCC clock interrupt enable register, Address offset: 0x18 */ + __IO uint32_t CIFR; /*!< RCC clock interrupt flag register, Address offset: 0x1C */ + __IO uint32_t CICR; /*!< RCC clock interrupt clear register, Address offset: 0x20 */ + uint32_t RESERVED2; /*!< Reserved, Address offset: 0x24 */ + __IO uint32_t AHB1RSTR; /*!< RCC AHB1 peripheral reset register, Address offset: 0x28 */ + __IO uint32_t AHB2RSTR; /*!< RCC AHB2 peripheral reset register, Address offset: 0x2C */ + __IO uint32_t AHB3RSTR; /*!< RCC AHB3 peripheral reset register, Address offset: 0x30 */ + uint32_t RESERVED3; /*!< Reserved, Address offset: 0x34 */ + __IO uint32_t APB1RSTR1; /*!< RCC APB1 peripheral reset register 1, Address offset: 0x38 */ + __IO uint32_t APB1RSTR2; /*!< RCC APB1 peripheral reset register 2, Address offset: 0x3C */ + __IO uint32_t APB2RSTR; /*!< RCC APB2 peripheral reset register, Address offset: 0x40 */ + uint32_t RESERVED4; /*!< Reserved, Address offset: 0x44 */ + __IO uint32_t AHB1ENR; /*!< RCC AHB1 peripheral clocks enable register, Address offset: 0x48 */ + __IO uint32_t AHB2ENR; /*!< RCC AHB2 peripheral clocks enable register, Address offset: 0x4C */ + __IO uint32_t AHB3ENR; /*!< RCC AHB3 peripheral clocks enable register, Address offset: 0x50 */ + uint32_t RESERVED5; /*!< Reserved, Address offset: 0x54 */ + __IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, Address offset: 0x58 */ + __IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, Address offset: 0x5C */ + __IO uint32_t APB2ENR; /*!< RCC APB2 peripheral clocks enable register, Address offset: 0x60 */ + uint32_t RESERVED6; /*!< Reserved, Address offset: 0x64 */ + __IO uint32_t AHB1SMENR; /*!< RCC AHB1 peripheral clocks enable in sleep and stop modes register, Address offset: 0x68 */ + __IO uint32_t AHB2SMENR; /*!< RCC AHB2 peripheral clocks enable in sleep and stop modes register, Address offset: 0x6C */ + __IO uint32_t AHB3SMENR; /*!< RCC AHB3 peripheral clocks enable in sleep and stop modes register, Address offset: 0x70 */ + uint32_t RESERVED7; /*!< Reserved, Address offset: 0x74 */ + __IO uint32_t APB1SMENR1; /*!< RCC APB1 peripheral clocks enable in sleep mode and stop modes register 1, Address offset: 0x78 */ + __IO uint32_t APB1SMENR2; /*!< RCC APB1 peripheral clocks enable in sleep mode and stop modes register 2, Address offset: 0x7C */ + __IO uint32_t APB2SMENR; /*!< RCC APB2 peripheral clocks enable in sleep mode and stop modes register, Address offset: 0x80 */ + uint32_t RESERVED8; /*!< Reserved, Address offset: 0x84 */ + __IO uint32_t CCIPR; /*!< RCC peripherals independent clock configuration register, Address offset: 0x88 */ + uint32_t RESERVED9; /*!< Reserved, Address offset: 0x8C */ + __IO uint32_t BDCR; /*!< RCC backup domain control register, Address offset: 0x90 */ + __IO uint32_t CSR; /*!< RCC clock control & status register, Address offset: 0x94 */ + __IO uint32_t CRRCR; /*!< RCC clock recovery RC register, Address offset: 0x98 */ + __IO uint32_t CCIPR2; /*!< RCC peripherals independent clock configuration register 2, Address offset: 0x9C */ +} RCC_TypeDef; + +/** + * @brief Real-Time Clock + */ +/* +* @brief Specific device feature definitions +*/ +#define RTC_TAMP_INT_6_SUPPORT +#define RTC_TAMP_INT_NB 4u + +#define RTC_TAMP_NB 3u +#define RTC_BACKUP_NB 32u + + +typedef struct +{ + __IO uint32_t TR; /*!< RTC time register, Address offset: 0x00 */ + __IO uint32_t DR; /*!< RTC date register, Address offset: 0x04 */ + __IO uint32_t SSR; /*!< RTC sub second register, Address offset: 0x08 */ + __IO uint32_t ICSR; /*!< RTC initialization control and status register, Address offset: 0x0C */ + __IO uint32_t PRER; /*!< RTC prescaler register, Address offset: 0x10 */ + __IO uint32_t WUTR; /*!< RTC wakeup timer register, Address offset: 0x14 */ + __IO uint32_t CR; /*!< RTC control register, Address offset: 0x18 */ + uint32_t RESERVED0; /*!< Reserved Address offset: 0x1C */ + uint32_t RESERVED1; /*!< Reserved Address offset: 0x20 */ + __IO uint32_t WPR; /*!< RTC write protection register, Address offset: 0x24 */ + __IO uint32_t CALR; /*!< RTC calibration register, Address offset: 0x28 */ + __IO uint32_t SHIFTR; /*!< RTC shift control register, Address offset: 0x2C */ + __IO uint32_t TSTR; /*!< RTC time stamp time register, Address offset: 0x30 */ + __IO uint32_t TSDR; /*!< RTC time stamp date register, Address offset: 0x34 */ + __IO uint32_t TSSSR; /*!< RTC time-stamp sub second register, Address offset: 0x38 */ + uint32_t RESERVED2; /*!< Reserved Address offset: 0x3C */ + __IO uint32_t ALRMAR; /*!< RTC alarm A register, Address offset: 0x40 */ + __IO uint32_t ALRMASSR; /*!< RTC alarm A sub second register, Address offset: 0x44 */ + __IO uint32_t ALRMBR; /*!< RTC alarm B register, Address offset: 0x48 */ + __IO uint32_t ALRMBSSR; /*!< RTC alarm B sub second register, Address offset: 0x4C */ + __IO uint32_t SR; /*!< RTC Status register, Address offset: 0x50 */ + __IO uint32_t MISR; /*!< RTC Masked Interrupt Status register, Address offset: 0x54 */ + uint32_t RESERVED3; /*!< Reserved Address offset: 0x58 */ + __IO uint32_t SCR; /*!< RTC Status Clear register, Address offset: 0x5C */ +} RTC_TypeDef; + +/** + * @brief Tamper and backup registers + */ + +typedef struct +{ + __IO uint32_t CR1; /*!< TAMP configuration register 1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< TAMP configuration register 2, Address offset: 0x04 */ + uint32_t RESERVED0; /*!< no configuration register 3, Address offset: 0x08 */ + __IO uint32_t FLTCR; /*!< TAMP filter control register, Address offset: 0x0C */ + uint32_t RESERVED1[6]; /*!< Reserved Address offset: 0x10 - 0x24 */ + uint32_t RESERVED2; /*!< Reserved Address offset: 0x28 */ + __IO uint32_t IER; /*!< TAMP Interrupt enable register, Address offset: 0x2C */ + __IO uint32_t SR; /*!< TAMP Status register, Address offset: 0x30 */ + __IO uint32_t MISR; /*!< TAMP Masked Interrupt Status register Address offset: 0x34 */ + uint32_t RESERVED3; /*!< Reserved Address offset: 0x38 */ + __IO uint32_t SCR; /*!< TAMP Status clear register, Address offset: 0x3C */ + uint32_t RESERVED4[48]; /*!< Reserved Address offset: 0x040 - 0xFC */ + __IO uint32_t BKP0R; /*!< TAMP backup register 0, Address offset: 0x100 */ + __IO uint32_t BKP1R; /*!< TAMP backup register 1, Address offset: 0x104 */ + __IO uint32_t BKP2R; /*!< TAMP backup register 2, Address offset: 0x108 */ + __IO uint32_t BKP3R; /*!< TAMP backup register 3, Address offset: 0x10C */ + __IO uint32_t BKP4R; /*!< TAMP backup register 4, Address offset: 0x110 */ + __IO uint32_t BKP5R; /*!< TAMP backup register 5, Address offset: 0x114 */ + __IO uint32_t BKP6R; /*!< TAMP backup register 6, Address offset: 0x118 */ + __IO uint32_t BKP7R; /*!< TAMP backup register 7, Address offset: 0x11C */ + __IO uint32_t BKP8R; /*!< TAMP backup register 8, Address offset: 0x120 */ + __IO uint32_t BKP9R; /*!< TAMP backup register 9, Address offset: 0x124 */ + __IO uint32_t BKP10R; /*!< TAMP backup register 10, Address offset: 0x128 */ + __IO uint32_t BKP11R; /*!< TAMP backup register 11, Address offset: 0x12C */ + __IO uint32_t BKP12R; /*!< TAMP backup register 12, Address offset: 0x130 */ + __IO uint32_t BKP13R; /*!< TAMP backup register 13, Address offset: 0x134 */ + __IO uint32_t BKP14R; /*!< TAMP backup register 14, Address offset: 0x138 */ + __IO uint32_t BKP15R; /*!< TAMP backup register 15, Address offset: 0x13C */ + __IO uint32_t BKP16R; /*!< TAMP backup register 16, Address offset: 0x140 */ + __IO uint32_t BKP17R; /*!< TAMP backup register 17, Address offset: 0x144 */ + __IO uint32_t BKP18R; /*!< TAMP backup register 18, Address offset: 0x148 */ + __IO uint32_t BKP19R; /*!< TAMP backup register 19, Address offset: 0x14C */ + __IO uint32_t BKP20R; /*!< TAMP backup register 20, Address offset: 0x150 */ + __IO uint32_t BKP21R; /*!< TAMP backup register 21, Address offset: 0x154 */ + __IO uint32_t BKP22R; /*!< TAMP backup register 22, Address offset: 0x158 */ + __IO uint32_t BKP23R; /*!< TAMP backup register 23, Address offset: 0x15C */ + __IO uint32_t BKP24R; /*!< TAMP backup register 24, Address offset: 0x160 */ + __IO uint32_t BKP25R; /*!< TAMP backup register 25, Address offset: 0x164 */ + __IO uint32_t BKP26R; /*!< TAMP backup register 26, Address offset: 0x168 */ + __IO uint32_t BKP27R; /*!< TAMP backup register 27, Address offset: 0x16C */ + __IO uint32_t BKP28R; /*!< TAMP backup register 28, Address offset: 0x170 */ + __IO uint32_t BKP29R; /*!< TAMP backup register 29, Address offset: 0x174 */ + __IO uint32_t BKP30R; /*!< TAMP backup register 30, Address offset: 0x178 */ + __IO uint32_t BKP31R; /*!< TAMP backup register 31, Address offset: 0x17C */ +} TAMP_TypeDef; + +/** + * @brief Serial Audio Interface + */ + +typedef struct +{ + uint32_t RESERVED[17]; /*!< Reserved, Address offset: 0x00 to 0x40 */ + __IO uint32_t PDMCR; /*!< SAI PDM control register, Address offset: 0x44 */ + __IO uint32_t PDMDLY; /*!< SAI PDM delay register, Address offset: 0x48 */ +} SAI_TypeDef; + +typedef struct +{ + __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ + __IO uint32_t CR2; /*!< SAI block x configuration register 2, Address offset: 0x08 */ + __IO uint32_t FRCR; /*!< SAI block x frame configuration register, Address offset: 0x0C */ + __IO uint32_t SLOTR; /*!< SAI block x slot register, Address offset: 0x10 */ + __IO uint32_t IMR; /*!< SAI block x interrupt mask register, Address offset: 0x14 */ + __IO uint32_t SR; /*!< SAI block x status register, Address offset: 0x18 */ + __IO uint32_t CLRFR; /*!< SAI block x clear flag register, Address offset: 0x1C */ + __IO uint32_t DR; /*!< SAI block x data register, Address offset: 0x20 */ +} SAI_Block_TypeDef; + +/** + * @brief Serial Peripheral Interface + */ + +typedef struct +{ + __IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */ + __IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */ + __IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */ + __IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */ + __IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */ + __IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */ + __IO uint32_t I2SCFGR; /*!< SPI_I2S configuration register, Address offset: 0x1C */ + __IO uint32_t I2SPR; /*!< SPI_I2S prescaler register, Address offset: 0x20 */ +} SPI_TypeDef; + +/** + * @brief System configuration controller + */ + +typedef struct +{ + __IO uint32_t MEMRMP; /*!< SYSCFG memory remap register, Address offset: 0x00 */ + __IO uint32_t CFGR1; /*!< SYSCFG configuration register 1, Address offset: 0x04 */ + __IO uint32_t EXTICR[4]; /*!< SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 */ + __IO uint32_t SCSR; /*!< SYSCFG CCMSRAM control and status register, Address offset: 0x18 */ + __IO uint32_t CFGR2; /*!< SYSCFG configuration register 2, Address offset: 0x1C */ + __IO uint32_t SWPR; /*!< SYSCFG CCMSRAM write protection register, Address offset: 0x20 */ + __IO uint32_t SKR; /*!< SYSCFG CCMSRAM Key Register, Address offset: 0x24 */ +} SYSCFG_TypeDef; + +/** + * @brief TIM + */ + +typedef struct +{ + __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< TIM control register 2, Address offset: 0x04 */ + __IO uint32_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */ + __IO uint32_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */ + __IO uint32_t SR; /*!< TIM status register, Address offset: 0x10 */ + __IO uint32_t EGR; /*!< TIM event generation register, Address offset: 0x14 */ + __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ + __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ + __IO uint32_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */ + __IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< TIM prescaler, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */ + __IO uint32_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */ + __IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */ + __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ + __IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */ + __IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */ + __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ + __IO uint32_t CCR5; /*!< TIM capture/compare register 5, Address offset: 0x48 */ + __IO uint32_t CCR6; /*!< TIM capture/compare register 6, Address offset: 0x4C */ + __IO uint32_t CCMR3; /*!< TIM capture/compare mode register 3, Address offset: 0x50 */ + __IO uint32_t DTR2; /*!< TIM deadtime register 2, Address offset: 0x54 */ + __IO uint32_t ECR; /*!< TIM encoder control register, Address offset: 0x58 */ + __IO uint32_t TISEL; /*!< TIM Input Selection register, Address offset: 0x5C */ + __IO uint32_t AF1; /*!< TIM alternate function option register 1, Address offset: 0x60 */ + __IO uint32_t AF2; /*!< TIM alternate function option register 2, Address offset: 0x64 */ + __IO uint32_t OR ; /*!< TIM option register, Address offset: 0x68 */ + uint32_t RESERVED0[220];/*!< Reserved, Address offset: 0x6C */ + __IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x3DC */ + __IO uint32_t DMAR; /*!< TIM DMA address for full transfer, Address offset: 0x3E0 */ +} TIM_TypeDef; + +/** + * @brief Universal Synchronous Asynchronous Receiver Transmitter + */ +typedef struct +{ + __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< USART Control register 2, Address offset: 0x04 */ + __IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 */ + __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ + __IO uint32_t GTPR; /*!< USART Guard time and prescaler register, Address offset: 0x10 */ + __IO uint32_t RTOR; /*!< USART Receiver Timeout register, Address offset: 0x14 */ + __IO uint32_t RQR; /*!< USART Request register, Address offset: 0x18 */ + __IO uint32_t ISR; /*!< USART Interrupt and status register, Address offset: 0x1C */ + __IO uint32_t ICR; /*!< USART Interrupt flag Clear register, Address offset: 0x20 */ + __IO uint32_t RDR; /*!< USART Receive Data register, Address offset: 0x24 */ + __IO uint32_t TDR; /*!< USART Transmit Data register, Address offset: 0x28 */ + __IO uint32_t PRESC; /*!< USART Prescaler register, Address offset: 0x2C */ +} USART_TypeDef; + +/** + * @brief Universal Serial Bus Full Speed Device + */ + +typedef struct +{ + __IO uint16_t EP0R; /*!< USB Endpoint 0 register, Address offset: 0x00 */ + __IO uint16_t RESERVED0; /*!< Reserved */ + __IO uint16_t EP1R; /*!< USB Endpoint 1 register, Address offset: 0x04 */ + __IO uint16_t RESERVED1; /*!< Reserved */ + __IO uint16_t EP2R; /*!< USB Endpoint 2 register, Address offset: 0x08 */ + __IO uint16_t RESERVED2; /*!< Reserved */ + __IO uint16_t EP3R; /*!< USB Endpoint 3 register, Address offset: 0x0C */ + __IO uint16_t RESERVED3; /*!< Reserved */ + __IO uint16_t EP4R; /*!< USB Endpoint 4 register, Address offset: 0x10 */ + __IO uint16_t RESERVED4; /*!< Reserved */ + __IO uint16_t EP5R; /*!< USB Endpoint 5 register, Address offset: 0x14 */ + __IO uint16_t RESERVED5; /*!< Reserved */ + __IO uint16_t EP6R; /*!< USB Endpoint 6 register, Address offset: 0x18 */ + __IO uint16_t RESERVED6; /*!< Reserved */ + __IO uint16_t EP7R; /*!< USB Endpoint 7 register, Address offset: 0x1C */ + __IO uint16_t RESERVED7[17]; /*!< Reserved */ + __IO uint16_t CNTR; /*!< Control register, Address offset: 0x40 */ + __IO uint16_t RESERVED8; /*!< Reserved */ + __IO uint16_t ISTR; /*!< Interrupt status register, Address offset: 0x44 */ + __IO uint16_t RESERVED9; /*!< Reserved */ + __IO uint16_t FNR; /*!< Frame number register, Address offset: 0x48 */ + __IO uint16_t RESERVEDA; /*!< Reserved */ + __IO uint16_t DADDR; /*!< Device address register, Address offset: 0x4C */ + __IO uint16_t RESERVEDB; /*!< Reserved */ + __IO uint16_t BTABLE; /*!< Buffer Table address register, Address offset: 0x50 */ + __IO uint16_t RESERVEDC; /*!< Reserved */ + __IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ + __IO uint16_t RESERVEDD; /*!< Reserved */ + __IO uint16_t BCDR; /*!< Battery Charging detector register, Address offset: 0x58 */ + __IO uint16_t RESERVEDE; /*!< Reserved */ +} USB_TypeDef; + +/** + * @brief VREFBUF + */ + +typedef struct +{ + __IO uint32_t CSR; /*!< VREFBUF control and status register, Address offset: 0x00 */ + __IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 */ +} VREFBUF_TypeDef; + +/** + * @brief Window WATCHDOG + */ + +typedef struct +{ + __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ + __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ + __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ +} WWDG_TypeDef; + + +/** + * @brief RNG + */ +typedef struct +{ + __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ + __IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */ + __IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */ +} RNG_TypeDef; + +/** + * @brief CORDIC + */ + +typedef struct +{ + __IO uint32_t CSR; /*!< CORDIC control and status register, Address offset: 0x00 */ + __IO uint32_t WDATA; /*!< CORDIC argument register, Address offset: 0x04 */ + __IO uint32_t RDATA; /*!< CORDIC result register, Address offset: 0x08 */ +} CORDIC_TypeDef; + +/** + * @brief UCPD + */ + +typedef struct +{ + __IO uint32_t CFG1; /*!< UCPD configuration register 1, Address offset: 0x00 */ + __IO uint32_t CFG2; /*!< UCPD configuration register 2, Address offset: 0x04 */ + __IO uint32_t RESERVED0; /*!< UCPD reserved register, Address offset: 0x08 */ + __IO uint32_t CR; /*!< UCPD control register, Address offset: 0x0C */ + __IO uint32_t IMR; /*!< UCPD interrupt mask register, Address offset: 0x10 */ + __IO uint32_t SR; /*!< UCPD status register, Address offset: 0x14 */ + __IO uint32_t ICR; /*!< UCPD interrupt flag clear register Address offset: 0x18 */ + __IO uint32_t TX_ORDSET; /*!< UCPD Tx ordered set type register, Address offset: 0x1C */ + __IO uint32_t TX_PAYSZ; /*!< UCPD Tx payload size register, Address offset: 0x20 */ + __IO uint32_t TXDR; /*!< UCPD Tx data register, Address offset: 0x24 */ + __IO uint32_t RX_ORDSET; /*!< UCPD Rx ordered set type register, Address offset: 0x28 */ + __IO uint32_t RX_PAYSZ; /*!< UCPD Rx payload size register, Address offset: 0x2C */ + __IO uint32_t RXDR; /*!< UCPD Rx data register, Address offset: 0x30 */ + __IO uint32_t RX_ORDEXT1; /*!< UCPD Rx ordered set extension 1 register, Address offset: 0x34 */ + __IO uint32_t RX_ORDEXT2; /*!< UCPD Rx ordered set extension 2 register, Address offset: 0x38 */ +} UCPD_TypeDef; + +/** + * @brief High resolution Timer (HRTIM) + */ + +#define c7amba_hrtim1_v2_0 + +/* HRTIM master registers definition */ +typedef struct +{ + __IO uint32_t MCR; /*!< HRTIM Master Timer control register, Address offset: 0x00 */ + __IO uint32_t MISR; /*!< HRTIM Master Timer interrupt status register, Address offset: 0x04 */ + __IO uint32_t MICR; /*!< HRTIM Master Timer interrupt clear register, Address offset: 0x08 */ + __IO uint32_t MDIER; /*!< HRTIM Master Timer DMA/interrupt enable register Address offset: 0x0C */ + __IO uint32_t MCNTR; /*!< HRTIM Master Timer counter register, Address offset: 0x10 */ + __IO uint32_t MPER; /*!< HRTIM Master Timer period register, Address offset: 0x14 */ + __IO uint32_t MREP; /*!< HRTIM Master Timer repetition register, Address offset: 0x18 */ + __IO uint32_t MCMP1R; /*!< HRTIM Master Timer compare 1 register, Address offset: 0x1C */ + uint32_t RESERVED0; /*!< Reserved, 0x20 */ + __IO uint32_t MCMP2R; /*!< HRTIM Master Timer compare 2 register, Address offset: 0x24 */ + __IO uint32_t MCMP3R; /*!< HRTIM Master Timer compare 3 register, Address offset: 0x28 */ + __IO uint32_t MCMP4R; /*!< HRTIM Master Timer compare 4 register, Address offset: 0x2C */ + uint32_t RESERVED1[20]; /*!< Reserved, 0x30..0x7C */ +}HRTIM_Master_TypeDef; + +/* HRTIM Timer A to F registers definition */ +typedef struct +{ + __IO uint32_t TIMxCR; /*!< HRTIM Timerx control register, Address offset: 0x00 */ + __IO uint32_t TIMxISR; /*!< HRTIM Timerx interrupt status register, Address offset: 0x04 */ + __IO uint32_t TIMxICR; /*!< HRTIM Timerx interrupt clear register, Address offset: 0x08 */ + __IO uint32_t TIMxDIER; /*!< HRTIM Timerx DMA/interrupt enable register, Address offset: 0x0C */ + __IO uint32_t CNTxR; /*!< HRTIM Timerx counter register, Address offset: 0x10 */ + __IO uint32_t PERxR; /*!< HRTIM Timerx period register, Address offset: 0x14 */ + __IO uint32_t REPxR; /*!< HRTIM Timerx repetition register, Address offset: 0x18 */ + __IO uint32_t CMP1xR; /*!< HRTIM Timerx compare 1 register, Address offset: 0x1C */ + __IO uint32_t CMP1CxR; /*!< HRTIM Timerx compare 1 compound register, Address offset: 0x20 */ + __IO uint32_t CMP2xR; /*!< HRTIM Timerx compare 2 register, Address offset: 0x24 */ + __IO uint32_t CMP3xR; /*!< HRTIM Timerx compare 3 register, Address offset: 0x28 */ + __IO uint32_t CMP4xR; /*!< HRTIM Timerx compare 4 register, Address offset: 0x2C */ + __IO uint32_t CPT1xR; /*!< HRTIM Timerx capture 1 register, Address offset: 0x30 */ + __IO uint32_t CPT2xR; /*!< HRTIM Timerx capture 2 register, Address offset: 0x34 */ + __IO uint32_t DTxR; /*!< HRTIM Timerx dead time register, Address offset: 0x38 */ + __IO uint32_t SETx1R; /*!< HRTIM Timerx output 1 set register, Address offset: 0x3C */ + __IO uint32_t RSTx1R; /*!< HRTIM Timerx output 1 reset register, Address offset: 0x40 */ + __IO uint32_t SETx2R; /*!< HRTIM Timerx output 2 set register, Address offset: 0x44 */ + __IO uint32_t RSTx2R; /*!< HRTIM Timerx output 2 reset register, Address offset: 0x48 */ + __IO uint32_t EEFxR1; /*!< HRTIM Timerx external event filtering 1 register, Address offset: 0x4C */ + __IO uint32_t EEFxR2; /*!< HRTIM Timerx external event filtering 2 register, Address offset: 0x50 */ + __IO uint32_t RSTxR; /*!< HRTIM Timerx Reset register, Address offset: 0x54 */ + __IO uint32_t CHPxR; /*!< HRTIM Timerx Chopper register, Address offset: 0x58 */ + __IO uint32_t CPT1xCR; /*!< HRTIM Timerx Capture 1 register, Address offset: 0x5C */ + __IO uint32_t CPT2xCR; /*!< HRTIM Timerx Capture 2 register, Address offset: 0x60 */ + __IO uint32_t OUTxR; /*!< HRTIM Timerx Output register, Address offset: 0x64 */ + __IO uint32_t FLTxR; /*!< HRTIM Timerx Fault register, Address offset: 0x68 */ + __IO uint32_t TIMxCR2; /*!< HRTIM Timerx Control register 2, Address offset: 0x6C */ + __IO uint32_t EEFxR3; /*!< HRTIM Timerx external event filtering 3 register, Address offset: 0x70 */ + uint32_t RESERVED0[3]; /*!< Reserved, 0x74..0x7C */ +}HRTIM_Timerx_TypeDef; + +/* HRTIM common register definition */ +typedef struct +{ + __IO uint32_t CR1; /*!< HRTIM control register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< HRTIM control register2, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< HRTIM interrupt status register, Address offset: 0x08 */ + __IO uint32_t ICR; /*!< HRTIM interrupt clear register, Address offset: 0x0C */ + __IO uint32_t IER; /*!< HRTIM interrupt enable register, Address offset: 0x10 */ + __IO uint32_t OENR; /*!< HRTIM Output enable register, Address offset: 0x14 */ + __IO uint32_t ODISR; /*!< HRTIM Output disable register, Address offset: 0x18 */ + __IO uint32_t ODSR; /*!< HRTIM Output disable status register, Address offset: 0x1C */ + __IO uint32_t BMCR; /*!< HRTIM Burst mode control register, Address offset: 0x20 */ + __IO uint32_t BMTRGR; /*!< HRTIM Busrt mode trigger register, Address offset: 0x24 */ + __IO uint32_t BMCMPR; /*!< HRTIM Burst mode compare register, Address offset: 0x28 */ + __IO uint32_t BMPER; /*!< HRTIM Burst mode period register, Address offset: 0x2C */ + __IO uint32_t EECR1; /*!< HRTIM Timer external event control register1, Address offset: 0x30 */ + __IO uint32_t EECR2; /*!< HRTIM Timer external event control register2, Address offset: 0x34 */ + __IO uint32_t EECR3; /*!< HRTIM Timer external event control register3, Address offset: 0x38 */ + __IO uint32_t ADC1R; /*!< HRTIM ADC Trigger 1 register, Address offset: 0x3C */ + __IO uint32_t ADC2R; /*!< HRTIM ADC Trigger 2 register, Address offset: 0x40 */ + __IO uint32_t ADC3R; /*!< HRTIM ADC Trigger 3 register, Address offset: 0x44 */ + __IO uint32_t ADC4R; /*!< HRTIM ADC Trigger 4 register, Address offset: 0x48 */ + __IO uint32_t DLLCR; /*!< HRTIM DLL control register, Address offset: 0x4C */ + __IO uint32_t FLTINR1; /*!< HRTIM Fault input register1, Address offset: 0x50 */ + __IO uint32_t FLTINR2; /*!< HRTIM Fault input register2, Address offset: 0x54 */ + __IO uint32_t BDMUPR; /*!< HRTIM Burst DMA Master Timer update register, Address offset: 0x58 */ + __IO uint32_t BDTAUPR; /*!< HRTIM Burst DMA Timerx update register, Address offset: 0x5C */ + __IO uint32_t BDTBUPR; /*!< HRTIM Burst DMA Timerx update register, Address offset: 0x60 */ + __IO uint32_t BDTCUPR; /*!< HRTIM Burst DMA Timerx update register, Address offset: 0x64 */ + __IO uint32_t BDTDUPR; /*!< HRTIM Burst DMA Timerx update register, Address offset: 0x68 */ + __IO uint32_t BDTEUPR; /*!< HRTIM Burst DMA Timerx update register, Address offset: 0x6C */ + __IO uint32_t BDMADR; /*!< HRTIM Burst DMA Master Data register, Address offset: 0x70 */ + __IO uint32_t BDTFUPR; /*!< HRTIM Burst DMA Timerx update register, Address offset: 0x74 */ + __IO uint32_t ADCER; /*!< HRTIM ADC Extended Trigger register, Address offset: 0x78 */ + __IO uint32_t ADCUR; /*!< HRTIM ADC Trigger Update register, Address offset: 0x7C */ + __IO uint32_t ADCPS1; /*!< HRTIM ADC Post Scaler Register 1, Address offset: 0x80 */ + __IO uint32_t ADCPS2; /*!< HRTIM ADC Post Scaler Register 2, Address offset: 0x84 */ + __IO uint32_t FLTINR3; /*!< HRTIM Fault input register3, Address offset: 0x88 */ + __IO uint32_t FLTINR4; /*!< HRTIM Fault input register4, Address offset: 0x8C */ +}HRTIM_Common_TypeDef; + +/* HRTIM register definition */ +typedef struct { + HRTIM_Master_TypeDef sMasterRegs; + HRTIM_Timerx_TypeDef sTimerxRegs[6]; + HRTIM_Common_TypeDef sCommonRegs; +}HRTIM_TypeDef; + +/** + * @} + */ + +/** @addtogroup Peripheral_memory_map + * @{ + */ + +#define FLASH_BASE (0x08000000UL) /*!< FLASH (up to 512 kB) base address */ +#define SRAM1_BASE (0x20000000UL) /*!< SRAM1(up to 80 KB) base address */ +#define SRAM2_BASE (0x20014000UL) /*!< SRAM2(16 KB) base address */ +#define CCMSRAM_BASE (0x10000000UL) /*!< CCMSRAM(32 KB) base address */ +#define PERIPH_BASE (0x40000000UL) /*!< Peripheral base address */ +#define FMC_BASE (0x60000000UL) /*!< FMC base address */ +#define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address */ + +#define FMC_R_BASE (0xA0000000UL) /*!< FMC control registers base address */ +#define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ +#define SRAM1_BB_BASE (0x22000000UL) /*!< SRAM1(80 KB) base address in the bit-band region */ +#define SRAM2_BB_BASE (0x22280000UL) /*!< SRAM2(16 KB) base address in the bit-band region */ +#define CCMSRAM_BB_BASE (0x22300000UL) /*!< CCMSRAM(32 KB) base address in the bit-band region */ +#define PERIPH_BB_BASE (0x42000000UL) /*!< Peripheral base address in the bit-band region */ +/* Legacy defines */ +#define SRAM_BASE SRAM1_BASE +#define SRAM_BB_BASE SRAM1_BB_BASE + +#define SRAM1_SIZE_MAX (0x00014000UL) /*!< maximum SRAM1 size (up to 80 KBytes) */ +#define SRAM2_SIZE (0x00004000UL) /*!< SRAM2 size (16 KBytes) */ +#define CCMSRAM_SIZE (0x00008000UL) /*!< CCMSRAM size (32 KBytes) */ + +/*!< Peripheral memory map */ +#define APB1PERIPH_BASE PERIPH_BASE +#define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL) +#define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL) +#define AHB2PERIPH_BASE (PERIPH_BASE + 0x08000000UL) + +#define FMC_BANK1 FMC_BASE +#define FMC_BANK1_1 FMC_BANK1 +#define FMC_BANK1_2 (FMC_BANK1 + 0x04000000UL) +#define FMC_BANK1_3 (FMC_BANK1 + 0x08000000UL) +#define FMC_BANK1_4 (FMC_BANK1 + 0x0C000000UL) +#define FMC_BANK3 (FMC_BASE + 0x20000000UL) + +/*!< APB1 peripherals */ +#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL) +#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL) +#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL) +#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL) +#define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL) +#define TIM7_BASE (APB1PERIPH_BASE + 0x1400UL) +#define CRS_BASE (APB1PERIPH_BASE + 0x2000UL) +#define TAMP_BASE (APB1PERIPH_BASE + 0x2400UL) +#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL) +#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL) +#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL) +#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL) +#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL) +#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL) +#define USART3_BASE (APB1PERIPH_BASE + 0x4800UL) +#define UART4_BASE (APB1PERIPH_BASE + 0x4C00UL) +#define UART5_BASE (APB1PERIPH_BASE + 0x5000UL) +#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL) +#define I2C2_BASE (APB1PERIPH_BASE + 0x5800UL) +#define USB_BASE (APB1PERIPH_BASE + 0x5C00UL) /*!< USB_IP Peripheral Registers base address */ +#define USB_PMAADDR (APB1PERIPH_BASE + 0x6000UL) /*!< USB_IP Packet Memory Area base address */ +#define FDCAN1_BASE (APB1PERIPH_BASE + 0x6400UL) +#define FDCAN_CONFIG_BASE (APB1PERIPH_BASE + 0x6500UL) /*!< FDCAN configuration registers base address */ +#define FDCAN2_BASE (APB1PERIPH_BASE + 0x6800UL) +#define FDCAN3_BASE (APB1PERIPH_BASE + 0x6C00UL) +#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL) +#define I2C3_BASE (APB1PERIPH_BASE + 0x7800UL) +#define LPTIM1_BASE (APB1PERIPH_BASE + 0x7C00UL) +#define LPUART1_BASE (APB1PERIPH_BASE + 0x8000UL) +#define I2C4_BASE (APB1PERIPH_BASE + 0x8400UL) +#define UCPD1_BASE (APB1PERIPH_BASE + 0xA000UL) +#define SRAMCAN_BASE (APB1PERIPH_BASE + 0xA400UL) + +/*!< APB2 peripherals */ +#define SYSCFG_BASE (APB2PERIPH_BASE + 0x0000UL) +#define VREFBUF_BASE (APB2PERIPH_BASE + 0x0030UL) +#define COMP1_BASE (APB2PERIPH_BASE + 0x0200UL) +#define COMP2_BASE (APB2PERIPH_BASE + 0x0204UL) +#define COMP3_BASE (APB2PERIPH_BASE + 0x0208UL) +#define COMP4_BASE (APB2PERIPH_BASE + 0x020CUL) +#define COMP5_BASE (APB2PERIPH_BASE + 0x0210UL) +#define COMP6_BASE (APB2PERIPH_BASE + 0x0214UL) +#define COMP7_BASE (APB2PERIPH_BASE + 0x0218UL) +#define OPAMP_BASE (APB2PERIPH_BASE + 0x0300UL) +#define OPAMP1_BASE (APB2PERIPH_BASE + 0x0300UL) +#define OPAMP2_BASE (APB2PERIPH_BASE + 0x0304UL) +#define OPAMP3_BASE (APB2PERIPH_BASE + 0x0308UL) +#define OPAMP4_BASE (APB2PERIPH_BASE + 0x030CUL) +#define OPAMP5_BASE (APB2PERIPH_BASE + 0x0310UL) +#define OPAMP6_BASE (APB2PERIPH_BASE + 0x0314UL) + +#define EXTI_BASE (APB2PERIPH_BASE + 0x0400UL) +#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00UL) +#define SPI1_BASE (APB2PERIPH_BASE + 0x3000UL) +#define TIM8_BASE (APB2PERIPH_BASE + 0x3400UL) +#define USART1_BASE (APB2PERIPH_BASE + 0x3800UL) +#define SPI4_BASE (APB2PERIPH_BASE + 0x3C00UL) +#define TIM15_BASE (APB2PERIPH_BASE + 0x4000UL) +#define TIM16_BASE (APB2PERIPH_BASE + 0x4400UL) +#define TIM17_BASE (APB2PERIPH_BASE + 0x4800UL) +#define TIM20_BASE (APB2PERIPH_BASE + 0x5000UL) +#define SAI1_BASE (APB2PERIPH_BASE + 0x5400UL) +#define SAI1_Block_A_BASE (SAI1_BASE + 0x0004UL) +#define SAI1_Block_B_BASE (SAI1_BASE + 0x0024UL) +#define HRTIM1_BASE (APB2PERIPH_BASE + 0x6800UL) +#define HRTIM1_TIMA_BASE (HRTIM1_BASE + 0x0080UL) +#define HRTIM1_TIMB_BASE (HRTIM1_BASE + 0x0100UL) +#define HRTIM1_TIMC_BASE (HRTIM1_BASE + 0x0180UL) +#define HRTIM1_TIMD_BASE (HRTIM1_BASE + 0x0200UL) +#define HRTIM1_TIME_BASE (HRTIM1_BASE + 0x0280UL) +#define HRTIM1_TIMF_BASE (HRTIM1_BASE + 0x0300UL) +#define HRTIM1_COMMON_BASE (HRTIM1_BASE + 0x0380UL) + +/*!< AHB1 peripherals */ +#define DMA1_BASE (AHB1PERIPH_BASE) +#define DMA2_BASE (AHB1PERIPH_BASE + 0x0400UL) +#define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x0800UL) +#define CORDIC_BASE (AHB1PERIPH_BASE + 0x0C00UL) +#define RCC_BASE (AHB1PERIPH_BASE + 0x1000UL) +#define FMAC_BASE (AHB1PERIPH_BASE + 0x1400UL) +#define FLASH_R_BASE (AHB1PERIPH_BASE + 0x2000UL) +#define CRC_BASE (AHB1PERIPH_BASE + 0x3000UL) + +#define DMA1_Channel1_BASE (DMA1_BASE + 0x0008UL) +#define DMA1_Channel2_BASE (DMA1_BASE + 0x001CUL) +#define DMA1_Channel3_BASE (DMA1_BASE + 0x0030UL) +#define DMA1_Channel4_BASE (DMA1_BASE + 0x0044UL) +#define DMA1_Channel5_BASE (DMA1_BASE + 0x0058UL) +#define DMA1_Channel6_BASE (DMA1_BASE + 0x006CUL) +#define DMA1_Channel7_BASE (DMA1_BASE + 0x0080UL) +#define DMA1_Channel8_BASE (DMA1_BASE + 0x0094UL) + +#define DMA2_Channel1_BASE (DMA2_BASE + 0x0008UL) +#define DMA2_Channel2_BASE (DMA2_BASE + 0x001CUL) +#define DMA2_Channel3_BASE (DMA2_BASE + 0x0030UL) +#define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) +#define DMA2_Channel5_BASE (DMA2_BASE + 0x0058UL) +#define DMA2_Channel6_BASE (DMA2_BASE + 0x006CUL) +#define DMA2_Channel7_BASE (DMA2_BASE + 0x0080UL) +#define DMA2_Channel8_BASE (DMA2_BASE + 0x0094UL) + +#define DMAMUX1_Channel0_BASE (DMAMUX1_BASE) +#define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL) +#define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL) +#define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL) +#define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL) +#define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL) +#define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL) +#define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL) +#define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL) +#define DMAMUX1_Channel9_BASE (DMAMUX1_BASE + 0x0024UL) +#define DMAMUX1_Channel10_BASE (DMAMUX1_BASE + 0x0028UL) +#define DMAMUX1_Channel11_BASE (DMAMUX1_BASE + 0x002CUL) +#define DMAMUX1_Channel12_BASE (DMAMUX1_BASE + 0x0030UL) +#define DMAMUX1_Channel13_BASE (DMAMUX1_BASE + 0x0034UL) +#define DMAMUX1_Channel14_BASE (DMAMUX1_BASE + 0x0038UL) +#define DMAMUX1_Channel15_BASE (DMAMUX1_BASE + 0x003CUL) +#define DMAMUX1_RequestGenerator0_BASE (DMAMUX1_BASE + 0x0100UL) +#define DMAMUX1_RequestGenerator1_BASE (DMAMUX1_BASE + 0x0104UL) +#define DMAMUX1_RequestGenerator2_BASE (DMAMUX1_BASE + 0x0108UL) +#define DMAMUX1_RequestGenerator3_BASE (DMAMUX1_BASE + 0x010CUL) + +#define DMAMUX1_ChannelStatus_BASE (DMAMUX1_BASE + 0x0080UL) +#define DMAMUX1_RequestGenStatus_BASE (DMAMUX1_BASE + 0x0140UL) + +/*!< AHB2 peripherals */ +#define GPIOA_BASE (AHB2PERIPH_BASE + 0x0000UL) +#define GPIOB_BASE (AHB2PERIPH_BASE + 0x0400UL) +#define GPIOC_BASE (AHB2PERIPH_BASE + 0x0800UL) +#define GPIOD_BASE (AHB2PERIPH_BASE + 0x0C00UL) +#define GPIOE_BASE (AHB2PERIPH_BASE + 0x1000UL) +#define GPIOF_BASE (AHB2PERIPH_BASE + 0x1400UL) +#define GPIOG_BASE (AHB2PERIPH_BASE + 0x1800UL) + +#define ADC1_BASE (AHB2PERIPH_BASE + 0x08000000UL) +#define ADC2_BASE (AHB2PERIPH_BASE + 0x08000100UL) +#define ADC12_COMMON_BASE (AHB2PERIPH_BASE + 0x08000300UL) +#define ADC3_BASE (AHB2PERIPH_BASE + 0x08000400UL) +#define ADC4_BASE (AHB2PERIPH_BASE + 0x08000500UL) +#define ADC5_BASE (AHB2PERIPH_BASE + 0x08000600UL) +#define ADC345_COMMON_BASE (AHB2PERIPH_BASE + 0x08000700UL) + +#define DAC_BASE (AHB2PERIPH_BASE + 0x08000800UL) +#define DAC1_BASE (AHB2PERIPH_BASE + 0x08000800UL) +#define DAC2_BASE (AHB2PERIPH_BASE + 0x08000C00UL) +#define DAC3_BASE (AHB2PERIPH_BASE + 0x08001000UL) +#define DAC4_BASE (AHB2PERIPH_BASE + 0x08001400UL) + +/*!< FMC Banks registers base address */ +#define FMC_Bank1_R_BASE (FMC_R_BASE + 0x0000UL) +#define FMC_Bank1E_R_BASE (FMC_R_BASE + 0x0104UL) +#define FMC_Bank3_R_BASE (FMC_R_BASE + 0x0080UL) +#define RNG_BASE (AHB2PERIPH_BASE + 0x08060800UL) +/* Debug MCU registers base address */ +#define DBGMCU_BASE (0xE0042000UL) + +#define PACKAGE_BASE (0x1FFF7500UL) /*!< Package data register base address */ +#define UID_BASE (0x1FFF7590UL) /*!< Unique device ID register base address */ +#define FLASHSIZE_BASE (0x1FFF75E0UL) /*!< Flash size data register base address */ +/** + * @} + */ + +/** @addtogroup Peripheral_declaration + * @{ + */ +#define TIM2 ((TIM_TypeDef *) TIM2_BASE) +#define TIM3 ((TIM_TypeDef *) TIM3_BASE) +#define TIM4 ((TIM_TypeDef *) TIM4_BASE) +#define TIM5 ((TIM_TypeDef *) TIM5_BASE) +#define TIM6 ((TIM_TypeDef *) TIM6_BASE) +#define TIM7 ((TIM_TypeDef *) TIM7_BASE) +#define CRS ((CRS_TypeDef *) CRS_BASE) +#define TAMP ((TAMP_TypeDef *) TAMP_BASE) +#define RTC ((RTC_TypeDef *) RTC_BASE) +#define WWDG ((WWDG_TypeDef *) WWDG_BASE) +#define IWDG ((IWDG_TypeDef *) IWDG_BASE) +#define SPI2 ((SPI_TypeDef *) SPI2_BASE) +#define SPI3 ((SPI_TypeDef *) SPI3_BASE) +#define USART2 ((USART_TypeDef *) USART2_BASE) +#define USART3 ((USART_TypeDef *) USART3_BASE) +#define UART4 ((USART_TypeDef *) UART4_BASE) +#define UART5 ((USART_TypeDef *) UART5_BASE) +#define I2C1 ((I2C_TypeDef *) I2C1_BASE) +#define I2C2 ((I2C_TypeDef *) I2C2_BASE) +#define USB ((USB_TypeDef *) USB_BASE) +#define FDCAN1 ((FDCAN_GlobalTypeDef *) FDCAN1_BASE) +#define FDCAN_CONFIG ((FDCAN_Config_TypeDef *) FDCAN_CONFIG_BASE) +#define FDCAN2 ((FDCAN_GlobalTypeDef *) FDCAN2_BASE) +#define FDCAN3 ((FDCAN_GlobalTypeDef *) FDCAN3_BASE) +#define PWR ((PWR_TypeDef *) PWR_BASE) +#define I2C3 ((I2C_TypeDef *) I2C3_BASE) +#define LPTIM1 ((LPTIM_TypeDef *) LPTIM1_BASE) +#define LPUART1 ((USART_TypeDef *) LPUART1_BASE) +#define I2C4 ((I2C_TypeDef *) I2C4_BASE) +#define UCPD1 ((UCPD_TypeDef *) UCPD1_BASE) + +#define SYSCFG ((SYSCFG_TypeDef *) SYSCFG_BASE) +#define VREFBUF ((VREFBUF_TypeDef *) VREFBUF_BASE) +#define COMP1 ((COMP_TypeDef *) COMP1_BASE) +#define COMP2 ((COMP_TypeDef *) COMP2_BASE) +#define COMP3 ((COMP_TypeDef *) COMP3_BASE) +#define COMP4 ((COMP_TypeDef *) COMP4_BASE) +#define COMP5 ((COMP_TypeDef *) COMP5_BASE) +#define COMP6 ((COMP_TypeDef *) COMP6_BASE) +#define COMP7 ((COMP_TypeDef *) COMP7_BASE) + +#define OPAMP ((OPAMP_TypeDef *) OPAMP_BASE) +#define OPAMP1 ((OPAMP_TypeDef *) OPAMP1_BASE) +#define OPAMP2 ((OPAMP_TypeDef *) OPAMP2_BASE) +#define OPAMP3 ((OPAMP_TypeDef *) OPAMP3_BASE) +#define OPAMP4 ((OPAMP_TypeDef *) OPAMP4_BASE) +#define OPAMP5 ((OPAMP_TypeDef *) OPAMP5_BASE) +#define OPAMP6 ((OPAMP_TypeDef *) OPAMP6_BASE) + +#define EXTI ((EXTI_TypeDef *) EXTI_BASE) +#define TIM1 ((TIM_TypeDef *) TIM1_BASE) +#define SPI1 ((SPI_TypeDef *) SPI1_BASE) +#define TIM8 ((TIM_TypeDef *) TIM8_BASE) +#define USART1 ((USART_TypeDef *) USART1_BASE) +#define SPI4 ((SPI_TypeDef *) SPI4_BASE) +#define TIM15 ((TIM_TypeDef *) TIM15_BASE) +#define TIM16 ((TIM_TypeDef *) TIM16_BASE) +#define TIM17 ((TIM_TypeDef *) TIM17_BASE) +#define TIM20 ((TIM_TypeDef *) TIM20_BASE) +#define SAI1 ((SAI_TypeDef *) SAI1_BASE) +#define SAI1_Block_A ((SAI_Block_TypeDef *)SAI1_Block_A_BASE) +#define SAI1_Block_B ((SAI_Block_TypeDef *)SAI1_Block_B_BASE) +#define HRTIM1 ((HRTIM_TypeDef *) HRTIM1_BASE) +#define HRTIM1_TIMA ((HRTIM_Timerx_TypeDef *) HRTIM1_TIMA_BASE) +#define HRTIM1_TIMB ((HRTIM_Timerx_TypeDef *) HRTIM1_TIMB_BASE) +#define HRTIM1_TIMC ((HRTIM_Timerx_TypeDef *) HRTIM1_TIMC_BASE) +#define HRTIM1_TIMD ((HRTIM_Timerx_TypeDef *) HRTIM1_TIMD_BASE) +#define HRTIM1_TIME ((HRTIM_Timerx_TypeDef *) HRTIM1_TIME_BASE) +#define HRTIM1_TIMF ((HRTIM_Timerx_TypeDef *) HRTIM1_TIMF_BASE) +#define HRTIM1_COMMON ((HRTIM_Common_TypeDef *) HRTIM1_COMMON_BASE) +#define DMA1 ((DMA_TypeDef *) DMA1_BASE) +#define DMA2 ((DMA_TypeDef *) DMA2_BASE) +#define DMAMUX1 ((DMAMUX_Channel_TypeDef *) DMAMUX1_BASE) +#define CORDIC ((CORDIC_TypeDef *) CORDIC_BASE) +#define RCC ((RCC_TypeDef *) RCC_BASE) +#define FMAC ((FMAC_TypeDef *) FMAC_BASE) +#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) +#define CRC ((CRC_TypeDef *) CRC_BASE) + +#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) +#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) +#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) +#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) +#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) +#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) +#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) +#define ADC1 ((ADC_TypeDef *) ADC1_BASE) +#define ADC2 ((ADC_TypeDef *) ADC2_BASE) +#define ADC12_COMMON ((ADC_Common_TypeDef *) ADC12_COMMON_BASE) +#define ADC3 ((ADC_TypeDef *) ADC3_BASE) +#define ADC4 ((ADC_TypeDef *) ADC4_BASE) +#define ADC5 ((ADC_TypeDef *) ADC5_BASE) +#define ADC345_COMMON ((ADC_Common_TypeDef *) ADC345_COMMON_BASE) +#define DAC ((DAC_TypeDef *) DAC_BASE) +#define DAC1 ((DAC_TypeDef *) DAC1_BASE) +#define DAC2 ((DAC_TypeDef *) DAC2_BASE) +#define DAC3 ((DAC_TypeDef *) DAC3_BASE) +#define DAC4 ((DAC_TypeDef *) DAC4_BASE) +#define RNG ((RNG_TypeDef *) RNG_BASE) + +#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) +#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) +#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) +#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) +#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) +#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) +#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) +#define DMA1_Channel8 ((DMA_Channel_TypeDef *) DMA1_Channel8_BASE) + +#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) +#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) +#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) +#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) +#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) +#define DMA2_Channel6 ((DMA_Channel_TypeDef *) DMA2_Channel6_BASE) +#define DMA2_Channel7 ((DMA_Channel_TypeDef *) DMA2_Channel7_BASE) +#define DMA2_Channel8 ((DMA_Channel_TypeDef *) DMA2_Channel8_BASE) + +#define DMAMUX1_Channel0 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel0_BASE) +#define DMAMUX1_Channel1 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel1_BASE) +#define DMAMUX1_Channel2 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel2_BASE) +#define DMAMUX1_Channel3 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel3_BASE) +#define DMAMUX1_Channel4 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel4_BASE) +#define DMAMUX1_Channel5 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel5_BASE) +#define DMAMUX1_Channel6 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel6_BASE) +#define DMAMUX1_Channel7 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel7_BASE) +#define DMAMUX1_Channel8 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel8_BASE) +#define DMAMUX1_Channel9 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel9_BASE) +#define DMAMUX1_Channel10 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel10_BASE) +#define DMAMUX1_Channel11 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel11_BASE) +#define DMAMUX1_Channel12 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel12_BASE) +#define DMAMUX1_Channel13 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel13_BASE) +#define DMAMUX1_Channel14 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel14_BASE) +#define DMAMUX1_Channel15 ((DMAMUX_Channel_TypeDef *) DMAMUX1_Channel15_BASE) + +#define DMAMUX1_RequestGenerator0 ((DMAMUX_RequestGen_TypeDef *) DMAMUX1_RequestGenerator0_BASE) +#define DMAMUX1_RequestGenerator1 ((DMAMUX_RequestGen_TypeDef *) DMAMUX1_RequestGenerator1_BASE) +#define DMAMUX1_RequestGenerator2 ((DMAMUX_RequestGen_TypeDef *) DMAMUX1_RequestGenerator2_BASE) +#define DMAMUX1_RequestGenerator3 ((DMAMUX_RequestGen_TypeDef *) DMAMUX1_RequestGenerator3_BASE) + +#define DMAMUX1_ChannelStatus ((DMAMUX_ChannelStatus_TypeDef *) DMAMUX1_ChannelStatus_BASE) +#define DMAMUX1_RequestGenStatus ((DMAMUX_RequestGenStatus_TypeDef *) DMAMUX1_RequestGenStatus_BASE) + +#define FMC_Bank1_R ((FMC_Bank1_TypeDef *) FMC_Bank1_R_BASE) +#define FMC_Bank1E_R ((FMC_Bank1E_TypeDef *) FMC_Bank1E_R_BASE) +#define FMC_Bank3_R ((FMC_Bank3_TypeDef *) FMC_Bank3_R_BASE) + +#define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE) + +#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) + +/** + * @} + */ + +/** @addtogroup Exported_constants + * @{ + */ + + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + +/** @addtogroup Peripheral_Registers_Bits_Definition + * @{ + */ + +/******************************************************************************/ +/* Peripheral Registers_Bits_Definition */ +/******************************************************************************/ + +/******************************************************************************/ +/* */ +/* Analog to Digital Converter */ +/* */ +/******************************************************************************/ + +/* + * @brief Specific device feature definitions (not present on all devices in the STM32G4 series) + */ +#define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ + +/******************** Bit definition for ADC_ISR register *******************/ +#define ADC_ISR_ADRDY_Pos (0U) +#define ADC_ISR_ADRDY_Msk (0x1UL << ADC_ISR_ADRDY_Pos) /*!< 0x00000001 */ +#define ADC_ISR_ADRDY ADC_ISR_ADRDY_Msk /*!< ADC ready flag */ +#define ADC_ISR_EOSMP_Pos (1U) +#define ADC_ISR_EOSMP_Msk (0x1UL << ADC_ISR_EOSMP_Pos) /*!< 0x00000002 */ +#define ADC_ISR_EOSMP ADC_ISR_EOSMP_Msk /*!< ADC group regular end of sampling flag */ +#define ADC_ISR_EOC_Pos (2U) +#define ADC_ISR_EOC_Msk (0x1UL << ADC_ISR_EOC_Pos) /*!< 0x00000004 */ +#define ADC_ISR_EOC ADC_ISR_EOC_Msk /*!< ADC group regular end of unitary conversion flag */ +#define ADC_ISR_EOS_Pos (3U) +#define ADC_ISR_EOS_Msk (0x1UL << ADC_ISR_EOS_Pos) /*!< 0x00000008 */ +#define ADC_ISR_EOS ADC_ISR_EOS_Msk /*!< ADC group regular end of sequence conversions flag */ +#define ADC_ISR_OVR_Pos (4U) +#define ADC_ISR_OVR_Msk (0x1UL << ADC_ISR_OVR_Pos) /*!< 0x00000010 */ +#define ADC_ISR_OVR ADC_ISR_OVR_Msk /*!< ADC group regular overrun flag */ +#define ADC_ISR_JEOC_Pos (5U) +#define ADC_ISR_JEOC_Msk (0x1UL << ADC_ISR_JEOC_Pos) /*!< 0x00000020 */ +#define ADC_ISR_JEOC ADC_ISR_JEOC_Msk /*!< ADC group injected end of unitary conversion flag */ +#define ADC_ISR_JEOS_Pos (6U) +#define ADC_ISR_JEOS_Msk (0x1UL << ADC_ISR_JEOS_Pos) /*!< 0x00000040 */ +#define ADC_ISR_JEOS ADC_ISR_JEOS_Msk /*!< ADC group injected end of sequence conversions flag */ +#define ADC_ISR_AWD1_Pos (7U) +#define ADC_ISR_AWD1_Msk (0x1UL << ADC_ISR_AWD1_Pos) /*!< 0x00000080 */ +#define ADC_ISR_AWD1 ADC_ISR_AWD1_Msk /*!< ADC analog watchdog 1 flag */ +#define ADC_ISR_AWD2_Pos (8U) +#define ADC_ISR_AWD2_Msk (0x1UL << ADC_ISR_AWD2_Pos) /*!< 0x00000100 */ +#define ADC_ISR_AWD2 ADC_ISR_AWD2_Msk /*!< ADC analog watchdog 2 flag */ +#define ADC_ISR_AWD3_Pos (9U) +#define ADC_ISR_AWD3_Msk (0x1UL << ADC_ISR_AWD3_Pos) /*!< 0x00000200 */ +#define ADC_ISR_AWD3 ADC_ISR_AWD3_Msk /*!< ADC analog watchdog 3 flag */ +#define ADC_ISR_JQOVF_Pos (10U) +#define ADC_ISR_JQOVF_Msk (0x1UL << ADC_ISR_JQOVF_Pos) /*!< 0x00000400 */ +#define ADC_ISR_JQOVF ADC_ISR_JQOVF_Msk /*!< ADC group injected contexts queue overflow flag */ + +/******************** Bit definition for ADC_IER register *******************/ +#define ADC_IER_ADRDYIE_Pos (0U) +#define ADC_IER_ADRDYIE_Msk (0x1UL << ADC_IER_ADRDYIE_Pos) /*!< 0x00000001 */ +#define ADC_IER_ADRDYIE ADC_IER_ADRDYIE_Msk /*!< ADC ready interrupt */ +#define ADC_IER_EOSMPIE_Pos (1U) +#define ADC_IER_EOSMPIE_Msk (0x1UL << ADC_IER_EOSMPIE_Pos) /*!< 0x00000002 */ +#define ADC_IER_EOSMPIE ADC_IER_EOSMPIE_Msk /*!< ADC group regular end of sampling interrupt */ +#define ADC_IER_EOCIE_Pos (2U) +#define ADC_IER_EOCIE_Msk (0x1UL << ADC_IER_EOCIE_Pos) /*!< 0x00000004 */ +#define ADC_IER_EOCIE ADC_IER_EOCIE_Msk /*!< ADC group regular end of unitary conversion interrupt */ +#define ADC_IER_EOSIE_Pos (3U) +#define ADC_IER_EOSIE_Msk (0x1UL << ADC_IER_EOSIE_Pos) /*!< 0x00000008 */ +#define ADC_IER_EOSIE ADC_IER_EOSIE_Msk /*!< ADC group regular end of sequence conversions interrupt */ +#define ADC_IER_OVRIE_Pos (4U) +#define ADC_IER_OVRIE_Msk (0x1UL << ADC_IER_OVRIE_Pos) /*!< 0x00000010 */ +#define ADC_IER_OVRIE ADC_IER_OVRIE_Msk /*!< ADC group regular overrun interrupt */ +#define ADC_IER_JEOCIE_Pos (5U) +#define ADC_IER_JEOCIE_Msk (0x1UL << ADC_IER_JEOCIE_Pos) /*!< 0x00000020 */ +#define ADC_IER_JEOCIE ADC_IER_JEOCIE_Msk /*!< ADC group injected end of unitary conversion interrupt */ +#define ADC_IER_JEOSIE_Pos (6U) +#define ADC_IER_JEOSIE_Msk (0x1UL << ADC_IER_JEOSIE_Pos) /*!< 0x00000040 */ +#define ADC_IER_JEOSIE ADC_IER_JEOSIE_Msk /*!< ADC group injected end of sequence conversions interrupt */ +#define ADC_IER_AWD1IE_Pos (7U) +#define ADC_IER_AWD1IE_Msk (0x1UL << ADC_IER_AWD1IE_Pos) /*!< 0x00000080 */ +#define ADC_IER_AWD1IE ADC_IER_AWD1IE_Msk /*!< ADC analog watchdog 1 interrupt */ +#define ADC_IER_AWD2IE_Pos (8U) +#define ADC_IER_AWD2IE_Msk (0x1UL << ADC_IER_AWD2IE_Pos) /*!< 0x00000100 */ +#define ADC_IER_AWD2IE ADC_IER_AWD2IE_Msk /*!< ADC analog watchdog 2 interrupt */ +#define ADC_IER_AWD3IE_Pos (9U) +#define ADC_IER_AWD3IE_Msk (0x1UL << ADC_IER_AWD3IE_Pos) /*!< 0x00000200 */ +#define ADC_IER_AWD3IE ADC_IER_AWD3IE_Msk /*!< ADC analog watchdog 3 interrupt */ +#define ADC_IER_JQOVFIE_Pos (10U) +#define ADC_IER_JQOVFIE_Msk (0x1UL << ADC_IER_JQOVFIE_Pos) /*!< 0x00000400 */ +#define ADC_IER_JQOVFIE ADC_IER_JQOVFIE_Msk /*!< ADC group injected contexts queue overflow interrupt */ + +/******************** Bit definition for ADC_CR register ********************/ +#define ADC_CR_ADEN_Pos (0U) +#define ADC_CR_ADEN_Msk (0x1UL << ADC_CR_ADEN_Pos) /*!< 0x00000001 */ +#define ADC_CR_ADEN ADC_CR_ADEN_Msk /*!< ADC enable */ +#define ADC_CR_ADDIS_Pos (1U) +#define ADC_CR_ADDIS_Msk (0x1UL << ADC_CR_ADDIS_Pos) /*!< 0x00000002 */ +#define ADC_CR_ADDIS ADC_CR_ADDIS_Msk /*!< ADC disable */ +#define ADC_CR_ADSTART_Pos (2U) +#define ADC_CR_ADSTART_Msk (0x1UL << ADC_CR_ADSTART_Pos) /*!< 0x00000004 */ +#define ADC_CR_ADSTART ADC_CR_ADSTART_Msk /*!< ADC group regular conversion start */ +#define ADC_CR_JADSTART_Pos (3U) +#define ADC_CR_JADSTART_Msk (0x1UL << ADC_CR_JADSTART_Pos) /*!< 0x00000008 */ +#define ADC_CR_JADSTART ADC_CR_JADSTART_Msk /*!< ADC group injected conversion start */ +#define ADC_CR_ADSTP_Pos (4U) +#define ADC_CR_ADSTP_Msk (0x1UL << ADC_CR_ADSTP_Pos) /*!< 0x00000010 */ +#define ADC_CR_ADSTP ADC_CR_ADSTP_Msk /*!< ADC group regular conversion stop */ +#define ADC_CR_JADSTP_Pos (5U) +#define ADC_CR_JADSTP_Msk (0x1UL << ADC_CR_JADSTP_Pos) /*!< 0x00000020 */ +#define ADC_CR_JADSTP ADC_CR_JADSTP_Msk /*!< ADC group injected conversion stop */ +#define ADC_CR_ADVREGEN_Pos (28U) +#define ADC_CR_ADVREGEN_Msk (0x1UL << ADC_CR_ADVREGEN_Pos) /*!< 0x10000000 */ +#define ADC_CR_ADVREGEN ADC_CR_ADVREGEN_Msk /*!< ADC voltage regulator enable */ +#define ADC_CR_DEEPPWD_Pos (29U) +#define ADC_CR_DEEPPWD_Msk (0x1UL << ADC_CR_DEEPPWD_Pos) /*!< 0x20000000 */ +#define ADC_CR_DEEPPWD ADC_CR_DEEPPWD_Msk /*!< ADC deep power down enable */ +#define ADC_CR_ADCALDIF_Pos (30U) +#define ADC_CR_ADCALDIF_Msk (0x1UL << ADC_CR_ADCALDIF_Pos) /*!< 0x40000000 */ +#define ADC_CR_ADCALDIF ADC_CR_ADCALDIF_Msk /*!< ADC differential mode for calibration */ +#define ADC_CR_ADCAL_Pos (31U) +#define ADC_CR_ADCAL_Msk (0x1UL << ADC_CR_ADCAL_Pos) /*!< 0x80000000 */ +#define ADC_CR_ADCAL ADC_CR_ADCAL_Msk /*!< ADC calibration */ + +/******************** Bit definition for ADC_CFGR register ******************/ +#define ADC_CFGR_DMAEN_Pos (0U) +#define ADC_CFGR_DMAEN_Msk (0x1UL << ADC_CFGR_DMAEN_Pos) /*!< 0x00000001 */ +#define ADC_CFGR_DMAEN ADC_CFGR_DMAEN_Msk /*!< ADC DMA transfer enable */ +#define ADC_CFGR_DMACFG_Pos (1U) +#define ADC_CFGR_DMACFG_Msk (0x1UL << ADC_CFGR_DMACFG_Pos) /*!< 0x00000002 */ +#define ADC_CFGR_DMACFG ADC_CFGR_DMACFG_Msk /*!< ADC DMA transfer configuration */ + +#define ADC_CFGR_RES_Pos (3U) +#define ADC_CFGR_RES_Msk (0x3UL << ADC_CFGR_RES_Pos) /*!< 0x00000018 */ +#define ADC_CFGR_RES ADC_CFGR_RES_Msk /*!< ADC data resolution */ +#define ADC_CFGR_RES_0 (0x1UL << ADC_CFGR_RES_Pos) /*!< 0x00000008 */ +#define ADC_CFGR_RES_1 (0x2UL << ADC_CFGR_RES_Pos) /*!< 0x00000010 */ + +#define ADC_CFGR_EXTSEL_Pos (5U) +#define ADC_CFGR_EXTSEL_Msk (0x1FUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003E0 */ +#define ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_Msk /*!< ADC group regular external trigger source */ +#define ADC_CFGR_EXTSEL_0 (0x1UL << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000020 */ +#define ADC_CFGR_EXTSEL_1 (0x2UL << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000040 */ +#define ADC_CFGR_EXTSEL_2 (0x4UL << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000080 */ +#define ADC_CFGR_EXTSEL_3 (0x8UL << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000100 */ +#define ADC_CFGR_EXTSEL_4 (0x10UL << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000200 */ + +#define ADC_CFGR_EXTEN_Pos (10U) +#define ADC_CFGR_EXTEN_Msk (0x3UL << ADC_CFGR_EXTEN_Pos) /*!< 0x00000C00 */ +#define ADC_CFGR_EXTEN ADC_CFGR_EXTEN_Msk /*!< ADC group regular external trigger polarity */ +#define ADC_CFGR_EXTEN_0 (0x1UL << ADC_CFGR_EXTEN_Pos) /*!< 0x00000400 */ +#define ADC_CFGR_EXTEN_1 (0x2UL << ADC_CFGR_EXTEN_Pos) /*!< 0x00000800 */ + +#define ADC_CFGR_OVRMOD_Pos (12U) +#define ADC_CFGR_OVRMOD_Msk (0x1UL << ADC_CFGR_OVRMOD_Pos) /*!< 0x00001000 */ +#define ADC_CFGR_OVRMOD ADC_CFGR_OVRMOD_Msk /*!< ADC group regular overrun configuration */ +#define ADC_CFGR_CONT_Pos (13U) +#define ADC_CFGR_CONT_Msk (0x1UL << ADC_CFGR_CONT_Pos) /*!< 0x00002000 */ +#define ADC_CFGR_CONT ADC_CFGR_CONT_Msk /*!< ADC group regular continuous conversion mode */ +#define ADC_CFGR_AUTDLY_Pos (14U) +#define ADC_CFGR_AUTDLY_Msk (0x1UL << ADC_CFGR_AUTDLY_Pos) /*!< 0x00004000 */ +#define ADC_CFGR_AUTDLY ADC_CFGR_AUTDLY_Msk /*!< ADC low power auto wait */ +#define ADC_CFGR_ALIGN_Pos (15U) +#define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00008000 */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ +#define ADC_CFGR_DISCEN_Pos (16U) +#define ADC_CFGR_DISCEN_Msk (0x1UL << ADC_CFGR_DISCEN_Pos) /*!< 0x00010000 */ +#define ADC_CFGR_DISCEN ADC_CFGR_DISCEN_Msk /*!< ADC group regular sequencer discontinuous mode */ + +#define ADC_CFGR_DISCNUM_Pos (17U) +#define ADC_CFGR_DISCNUM_Msk (0x7UL << ADC_CFGR_DISCNUM_Pos) /*!< 0x000E0000 */ +#define ADC_CFGR_DISCNUM ADC_CFGR_DISCNUM_Msk /*!< ADC group regular sequencer discontinuous number of ranks */ +#define ADC_CFGR_DISCNUM_0 (0x1UL << ADC_CFGR_DISCNUM_Pos) /*!< 0x00020000 */ +#define ADC_CFGR_DISCNUM_1 (0x2UL << ADC_CFGR_DISCNUM_Pos) /*!< 0x00040000 */ +#define ADC_CFGR_DISCNUM_2 (0x4UL << ADC_CFGR_DISCNUM_Pos) /*!< 0x00080000 */ + +#define ADC_CFGR_JDISCEN_Pos (20U) +#define ADC_CFGR_JDISCEN_Msk (0x1UL << ADC_CFGR_JDISCEN_Pos) /*!< 0x00100000 */ +#define ADC_CFGR_JDISCEN ADC_CFGR_JDISCEN_Msk /*!< ADC group injected sequencer discontinuous mode */ +#define ADC_CFGR_JQM_Pos (21U) +#define ADC_CFGR_JQM_Msk (0x1UL << ADC_CFGR_JQM_Pos) /*!< 0x00200000 */ +#define ADC_CFGR_JQM ADC_CFGR_JQM_Msk /*!< ADC group injected contexts queue mode */ +#define ADC_CFGR_AWD1SGL_Pos (22U) +#define ADC_CFGR_AWD1SGL_Msk (0x1UL << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */ +#define ADC_CFGR_AWD1SGL ADC_CFGR_AWD1SGL_Msk /*!< ADC analog watchdog 1 monitoring a single channel or all channels */ +#define ADC_CFGR_AWD1EN_Pos (23U) +#define ADC_CFGR_AWD1EN_Msk (0x1UL << ADC_CFGR_AWD1EN_Pos) /*!< 0x00800000 */ +#define ADC_CFGR_AWD1EN ADC_CFGR_AWD1EN_Msk /*!< ADC analog watchdog 1 enable on scope ADC group regular */ +#define ADC_CFGR_JAWD1EN_Pos (24U) +#define ADC_CFGR_JAWD1EN_Msk (0x1UL << ADC_CFGR_JAWD1EN_Pos) /*!< 0x01000000 */ +#define ADC_CFGR_JAWD1EN ADC_CFGR_JAWD1EN_Msk /*!< ADC analog watchdog 1 enable on scope ADC group injected */ +#define ADC_CFGR_JAUTO_Pos (25U) +#define ADC_CFGR_JAUTO_Msk (0x1UL << ADC_CFGR_JAUTO_Pos) /*!< 0x02000000 */ +#define ADC_CFGR_JAUTO ADC_CFGR_JAUTO_Msk /*!< ADC group injected automatic trigger mode */ + +#define ADC_CFGR_AWD1CH_Pos (26U) +#define ADC_CFGR_AWD1CH_Msk (0x1FUL << ADC_CFGR_AWD1CH_Pos) /*!< 0x7C000000 */ +#define ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_Msk /*!< ADC analog watchdog 1 monitored channel selection */ +#define ADC_CFGR_AWD1CH_0 (0x01UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x04000000 */ +#define ADC_CFGR_AWD1CH_1 (0x02UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x08000000 */ +#define ADC_CFGR_AWD1CH_2 (0x04UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x10000000 */ +#define ADC_CFGR_AWD1CH_3 (0x08UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x20000000 */ +#define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ + +#define ADC_CFGR_JQDIS_Pos (31U) +#define ADC_CFGR_JQDIS_Msk (0x1UL << ADC_CFGR_JQDIS_Pos) /*!< 0x80000000 */ +#define ADC_CFGR_JQDIS ADC_CFGR_JQDIS_Msk /*!< ADC group injected contexts queue disable */ + +/******************** Bit definition for ADC_CFGR2 register *****************/ +#define ADC_CFGR2_ROVSE_Pos (0U) +#define ADC_CFGR2_ROVSE_Msk (0x1UL << ADC_CFGR2_ROVSE_Pos) /*!< 0x00000001 */ +#define ADC_CFGR2_ROVSE ADC_CFGR2_ROVSE_Msk /*!< ADC oversampler enable on scope ADC group regular */ +#define ADC_CFGR2_JOVSE_Pos (1U) +#define ADC_CFGR2_JOVSE_Msk (0x1UL << ADC_CFGR2_JOVSE_Pos) /*!< 0x00000002 */ +#define ADC_CFGR2_JOVSE ADC_CFGR2_JOVSE_Msk /*!< ADC oversampler enable on scope ADC group injected */ + +#define ADC_CFGR2_OVSR_Pos (2U) +#define ADC_CFGR2_OVSR_Msk (0x7UL << ADC_CFGR2_OVSR_Pos) /*!< 0x0000001C */ +#define ADC_CFGR2_OVSR ADC_CFGR2_OVSR_Msk /*!< ADC oversampling ratio */ +#define ADC_CFGR2_OVSR_0 (0x1UL << ADC_CFGR2_OVSR_Pos) /*!< 0x00000004 */ +#define ADC_CFGR2_OVSR_1 (0x2UL << ADC_CFGR2_OVSR_Pos) /*!< 0x00000008 */ +#define ADC_CFGR2_OVSR_2 (0x4UL << ADC_CFGR2_OVSR_Pos) /*!< 0x00000010 */ + +#define ADC_CFGR2_OVSS_Pos (5U) +#define ADC_CFGR2_OVSS_Msk (0xFUL << ADC_CFGR2_OVSS_Pos) /*!< 0x000001E0 */ +#define ADC_CFGR2_OVSS ADC_CFGR2_OVSS_Msk /*!< ADC oversampling shift */ +#define ADC_CFGR2_OVSS_0 (0x1UL << ADC_CFGR2_OVSS_Pos) /*!< 0x00000020 */ +#define ADC_CFGR2_OVSS_1 (0x2UL << ADC_CFGR2_OVSS_Pos) /*!< 0x00000040 */ +#define ADC_CFGR2_OVSS_2 (0x4UL << ADC_CFGR2_OVSS_Pos) /*!< 0x00000080 */ +#define ADC_CFGR2_OVSS_3 (0x8UL << ADC_CFGR2_OVSS_Pos) /*!< 0x00000100 */ + +#define ADC_CFGR2_TROVS_Pos (9U) +#define ADC_CFGR2_TROVS_Msk (0x1UL << ADC_CFGR2_TROVS_Pos) /*!< 0x00000200 */ +#define ADC_CFGR2_TROVS ADC_CFGR2_TROVS_Msk /*!< ADC oversampling discontinuous mode (triggered mode) for ADC group regular */ +#define ADC_CFGR2_ROVSM_Pos (10U) +#define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */ +#define ADC_CFGR2_ROVSM ADC_CFGR2_ROVSM_Msk /*!< ADC oversampling mode managing interlaced conversions of ADC group regular and group injected */ + +#define ADC_CFGR2_GCOMP_Pos (16U) +#define ADC_CFGR2_GCOMP_Msk (0x1UL << ADC_CFGR2_GCOMP_Pos) /*!< 0x00010000 */ +#define ADC_CFGR2_GCOMP ADC_CFGR2_GCOMP_Msk /*!< ADC Gain Compensation mode */ + +#define ADC_CFGR2_SWTRIG_Pos (25U) +#define ADC_CFGR2_SWTRIG_Msk (0x1UL << ADC_CFGR2_SWTRIG_Pos) /*!< 0x02000000 */ +#define ADC_CFGR2_SWTRIG ADC_CFGR2_SWTRIG_Msk /*!< ADC Software Trigger Bit for Sample time control trigger mode */ +#define ADC_CFGR2_BULB_Pos (26U) +#define ADC_CFGR2_BULB_Msk (0x1UL << ADC_CFGR2_BULB_Pos) /*!< 0x04000000 */ +#define ADC_CFGR2_BULB ADC_CFGR2_BULB_Msk /*!< ADC Bulb sampling mode */ +#define ADC_CFGR2_SMPTRIG_Pos (27U) +#define ADC_CFGR2_SMPTRIG_Msk (0x1UL << ADC_CFGR2_SMPTRIG_Pos) /*!< 0x08000000 */ +#define ADC_CFGR2_SMPTRIG ADC_CFGR2_SMPTRIG_Msk /*!< ADC Sample Time Control Trigger mode */ + +/******************** Bit definition for ADC_SMPR1 register *****************/ +#define ADC_SMPR1_SMP0_Pos (0U) +#define ADC_SMPR1_SMP0_Msk (0x7UL << ADC_SMPR1_SMP0_Pos) /*!< 0x00000007 */ +#define ADC_SMPR1_SMP0 ADC_SMPR1_SMP0_Msk /*!< ADC channel 0 sampling time selection */ +#define ADC_SMPR1_SMP0_0 (0x1UL << ADC_SMPR1_SMP0_Pos) /*!< 0x00000001 */ +#define ADC_SMPR1_SMP0_1 (0x2UL << ADC_SMPR1_SMP0_Pos) /*!< 0x00000002 */ +#define ADC_SMPR1_SMP0_2 (0x4UL << ADC_SMPR1_SMP0_Pos) /*!< 0x00000004 */ + +#define ADC_SMPR1_SMP1_Pos (3U) +#define ADC_SMPR1_SMP1_Msk (0x7UL << ADC_SMPR1_SMP1_Pos) /*!< 0x00000038 */ +#define ADC_SMPR1_SMP1 ADC_SMPR1_SMP1_Msk /*!< ADC channel 1 sampling time selection */ +#define ADC_SMPR1_SMP1_0 (0x1UL << ADC_SMPR1_SMP1_Pos) /*!< 0x00000008 */ +#define ADC_SMPR1_SMP1_1 (0x2UL << ADC_SMPR1_SMP1_Pos) /*!< 0x00000010 */ +#define ADC_SMPR1_SMP1_2 (0x4UL << ADC_SMPR1_SMP1_Pos) /*!< 0x00000020 */ + +#define ADC_SMPR1_SMP2_Pos (6U) +#define ADC_SMPR1_SMP2_Msk (0x7UL << ADC_SMPR1_SMP2_Pos) /*!< 0x000001C0 */ +#define ADC_SMPR1_SMP2 ADC_SMPR1_SMP2_Msk /*!< ADC channel 2 sampling time selection */ +#define ADC_SMPR1_SMP2_0 (0x1UL << ADC_SMPR1_SMP2_Pos) /*!< 0x00000040 */ +#define ADC_SMPR1_SMP2_1 (0x2UL << ADC_SMPR1_SMP2_Pos) /*!< 0x00000080 */ +#define ADC_SMPR1_SMP2_2 (0x4UL << ADC_SMPR1_SMP2_Pos) /*!< 0x00000100 */ + +#define ADC_SMPR1_SMP3_Pos (9U) +#define ADC_SMPR1_SMP3_Msk (0x7UL << ADC_SMPR1_SMP3_Pos) /*!< 0x00000E00 */ +#define ADC_SMPR1_SMP3 ADC_SMPR1_SMP3_Msk /*!< ADC channel 3 sampling time selection */ +#define ADC_SMPR1_SMP3_0 (0x1UL << ADC_SMPR1_SMP3_Pos) /*!< 0x00000200 */ +#define ADC_SMPR1_SMP3_1 (0x2UL << ADC_SMPR1_SMP3_Pos) /*!< 0x00000400 */ +#define ADC_SMPR1_SMP3_2 (0x4UL << ADC_SMPR1_SMP3_Pos) /*!< 0x00000800 */ + +#define ADC_SMPR1_SMP4_Pos (12U) +#define ADC_SMPR1_SMP4_Msk (0x7UL << ADC_SMPR1_SMP4_Pos) /*!< 0x00007000 */ +#define ADC_SMPR1_SMP4 ADC_SMPR1_SMP4_Msk /*!< ADC channel 4 sampling time selection */ +#define ADC_SMPR1_SMP4_0 (0x1UL << ADC_SMPR1_SMP4_Pos) /*!< 0x00001000 */ +#define ADC_SMPR1_SMP4_1 (0x2UL << ADC_SMPR1_SMP4_Pos) /*!< 0x00002000 */ +#define ADC_SMPR1_SMP4_2 (0x4UL << ADC_SMPR1_SMP4_Pos) /*!< 0x00004000 */ + +#define ADC_SMPR1_SMP5_Pos (15U) +#define ADC_SMPR1_SMP5_Msk (0x7UL << ADC_SMPR1_SMP5_Pos) /*!< 0x00038000 */ +#define ADC_SMPR1_SMP5 ADC_SMPR1_SMP5_Msk /*!< ADC channel 5 sampling time selection */ +#define ADC_SMPR1_SMP5_0 (0x1UL << ADC_SMPR1_SMP5_Pos) /*!< 0x00008000 */ +#define ADC_SMPR1_SMP5_1 (0x2UL << ADC_SMPR1_SMP5_Pos) /*!< 0x00010000 */ +#define ADC_SMPR1_SMP5_2 (0x4UL << ADC_SMPR1_SMP5_Pos) /*!< 0x00020000 */ + +#define ADC_SMPR1_SMP6_Pos (18U) +#define ADC_SMPR1_SMP6_Msk (0x7UL << ADC_SMPR1_SMP6_Pos) /*!< 0x001C0000 */ +#define ADC_SMPR1_SMP6 ADC_SMPR1_SMP6_Msk /*!< ADC channel 6 sampling time selection */ +#define ADC_SMPR1_SMP6_0 (0x1UL << ADC_SMPR1_SMP6_Pos) /*!< 0x00040000 */ +#define ADC_SMPR1_SMP6_1 (0x2UL << ADC_SMPR1_SMP6_Pos) /*!< 0x00080000 */ +#define ADC_SMPR1_SMP6_2 (0x4UL << ADC_SMPR1_SMP6_Pos) /*!< 0x00100000 */ + +#define ADC_SMPR1_SMP7_Pos (21U) +#define ADC_SMPR1_SMP7_Msk (0x7UL << ADC_SMPR1_SMP7_Pos) /*!< 0x00E00000 */ +#define ADC_SMPR1_SMP7 ADC_SMPR1_SMP7_Msk /*!< ADC channel 7 sampling time selection */ +#define ADC_SMPR1_SMP7_0 (0x1UL << ADC_SMPR1_SMP7_Pos) /*!< 0x00200000 */ +#define ADC_SMPR1_SMP7_1 (0x2UL << ADC_SMPR1_SMP7_Pos) /*!< 0x00400000 */ +#define ADC_SMPR1_SMP7_2 (0x4UL << ADC_SMPR1_SMP7_Pos) /*!< 0x00800000 */ + +#define ADC_SMPR1_SMP8_Pos (24U) +#define ADC_SMPR1_SMP8_Msk (0x7UL << ADC_SMPR1_SMP8_Pos) /*!< 0x07000000 */ +#define ADC_SMPR1_SMP8 ADC_SMPR1_SMP8_Msk /*!< ADC channel 8 sampling time selection */ +#define ADC_SMPR1_SMP8_0 (0x1UL << ADC_SMPR1_SMP8_Pos) /*!< 0x01000000 */ +#define ADC_SMPR1_SMP8_1 (0x2UL << ADC_SMPR1_SMP8_Pos) /*!< 0x02000000 */ +#define ADC_SMPR1_SMP8_2 (0x4UL << ADC_SMPR1_SMP8_Pos) /*!< 0x04000000 */ + +#define ADC_SMPR1_SMP9_Pos (27U) +#define ADC_SMPR1_SMP9_Msk (0x7UL << ADC_SMPR1_SMP9_Pos) /*!< 0x38000000 */ +#define ADC_SMPR1_SMP9 ADC_SMPR1_SMP9_Msk /*!< ADC channel 9 sampling time selection */ +#define ADC_SMPR1_SMP9_0 (0x1UL << ADC_SMPR1_SMP9_Pos) /*!< 0x08000000 */ +#define ADC_SMPR1_SMP9_1 (0x2UL << ADC_SMPR1_SMP9_Pos) /*!< 0x10000000 */ +#define ADC_SMPR1_SMP9_2 (0x4UL << ADC_SMPR1_SMP9_Pos) /*!< 0x20000000 */ + +#define ADC_SMPR1_SMPPLUS_Pos (31U) +#define ADC_SMPR1_SMPPLUS_Msk (0x1UL << ADC_SMPR1_SMPPLUS_Pos) /*!< 0x80000000 */ +#define ADC_SMPR1_SMPPLUS ADC_SMPR1_SMPPLUS_Msk /*!< ADC channels sampling time additional setting */ + +/******************** Bit definition for ADC_SMPR2 register *****************/ +#define ADC_SMPR2_SMP10_Pos (0U) +#define ADC_SMPR2_SMP10_Msk (0x7UL << ADC_SMPR2_SMP10_Pos) /*!< 0x00000007 */ +#define ADC_SMPR2_SMP10 ADC_SMPR2_SMP10_Msk /*!< ADC channel 10 sampling time selection */ +#define ADC_SMPR2_SMP10_0 (0x1UL << ADC_SMPR2_SMP10_Pos) /*!< 0x00000001 */ +#define ADC_SMPR2_SMP10_1 (0x2UL << ADC_SMPR2_SMP10_Pos) /*!< 0x00000002 */ +#define ADC_SMPR2_SMP10_2 (0x4UL << ADC_SMPR2_SMP10_Pos) /*!< 0x00000004 */ + +#define ADC_SMPR2_SMP11_Pos (3U) +#define ADC_SMPR2_SMP11_Msk (0x7UL << ADC_SMPR2_SMP11_Pos) /*!< 0x00000038 */ +#define ADC_SMPR2_SMP11 ADC_SMPR2_SMP11_Msk /*!< ADC channel 11 sampling time selection */ +#define ADC_SMPR2_SMP11_0 (0x1UL << ADC_SMPR2_SMP11_Pos) /*!< 0x00000008 */ +#define ADC_SMPR2_SMP11_1 (0x2UL << ADC_SMPR2_SMP11_Pos) /*!< 0x00000010 */ +#define ADC_SMPR2_SMP11_2 (0x4UL << ADC_SMPR2_SMP11_Pos) /*!< 0x00000020 */ + +#define ADC_SMPR2_SMP12_Pos (6U) +#define ADC_SMPR2_SMP12_Msk (0x7UL << ADC_SMPR2_SMP12_Pos) /*!< 0x000001C0 */ +#define ADC_SMPR2_SMP12 ADC_SMPR2_SMP12_Msk /*!< ADC channel 12 sampling time selection */ +#define ADC_SMPR2_SMP12_0 (0x1UL << ADC_SMPR2_SMP12_Pos) /*!< 0x00000040 */ +#define ADC_SMPR2_SMP12_1 (0x2UL << ADC_SMPR2_SMP12_Pos) /*!< 0x00000080 */ +#define ADC_SMPR2_SMP12_2 (0x4UL << ADC_SMPR2_SMP12_Pos) /*!< 0x00000100 */ + +#define ADC_SMPR2_SMP13_Pos (9U) +#define ADC_SMPR2_SMP13_Msk (0x7UL << ADC_SMPR2_SMP13_Pos) /*!< 0x00000E00 */ +#define ADC_SMPR2_SMP13 ADC_SMPR2_SMP13_Msk /*!< ADC channel 13 sampling time selection */ +#define ADC_SMPR2_SMP13_0 (0x1UL << ADC_SMPR2_SMP13_Pos) /*!< 0x00000200 */ +#define ADC_SMPR2_SMP13_1 (0x2UL << ADC_SMPR2_SMP13_Pos) /*!< 0x00000400 */ +#define ADC_SMPR2_SMP13_2 (0x4UL << ADC_SMPR2_SMP13_Pos) /*!< 0x00000800 */ + +#define ADC_SMPR2_SMP14_Pos (12U) +#define ADC_SMPR2_SMP14_Msk (0x7UL << ADC_SMPR2_SMP14_Pos) /*!< 0x00007000 */ +#define ADC_SMPR2_SMP14 ADC_SMPR2_SMP14_Msk /*!< ADC channel 14 sampling time selection */ +#define ADC_SMPR2_SMP14_0 (0x1UL << ADC_SMPR2_SMP14_Pos) /*!< 0x00001000 */ +#define ADC_SMPR2_SMP14_1 (0x2UL << ADC_SMPR2_SMP14_Pos) /*!< 0x00002000 */ +#define ADC_SMPR2_SMP14_2 (0x4UL << ADC_SMPR2_SMP14_Pos) /*!< 0x00004000 */ + +#define ADC_SMPR2_SMP15_Pos (15U) +#define ADC_SMPR2_SMP15_Msk (0x7UL << ADC_SMPR2_SMP15_Pos) /*!< 0x00038000 */ +#define ADC_SMPR2_SMP15 ADC_SMPR2_SMP15_Msk /*!< ADC channel 15 sampling time selection */ +#define ADC_SMPR2_SMP15_0 (0x1UL << ADC_SMPR2_SMP15_Pos) /*!< 0x00008000 */ +#define ADC_SMPR2_SMP15_1 (0x2UL << ADC_SMPR2_SMP15_Pos) /*!< 0x00010000 */ +#define ADC_SMPR2_SMP15_2 (0x4UL << ADC_SMPR2_SMP15_Pos) /*!< 0x00020000 */ + +#define ADC_SMPR2_SMP16_Pos (18U) +#define ADC_SMPR2_SMP16_Msk (0x7UL << ADC_SMPR2_SMP16_Pos) /*!< 0x001C0000 */ +#define ADC_SMPR2_SMP16 ADC_SMPR2_SMP16_Msk /*!< ADC channel 16 sampling time selection */ +#define ADC_SMPR2_SMP16_0 (0x1UL << ADC_SMPR2_SMP16_Pos) /*!< 0x00040000 */ +#define ADC_SMPR2_SMP16_1 (0x2UL << ADC_SMPR2_SMP16_Pos) /*!< 0x00080000 */ +#define ADC_SMPR2_SMP16_2 (0x4UL << ADC_SMPR2_SMP16_Pos) /*!< 0x00100000 */ + +#define ADC_SMPR2_SMP17_Pos (21U) +#define ADC_SMPR2_SMP17_Msk (0x7UL << ADC_SMPR2_SMP17_Pos) /*!< 0x00E00000 */ +#define ADC_SMPR2_SMP17 ADC_SMPR2_SMP17_Msk /*!< ADC channel 17 sampling time selection */ +#define ADC_SMPR2_SMP17_0 (0x1UL << ADC_SMPR2_SMP17_Pos) /*!< 0x00200000 */ +#define ADC_SMPR2_SMP17_1 (0x2UL << ADC_SMPR2_SMP17_Pos) /*!< 0x00400000 */ +#define ADC_SMPR2_SMP17_2 (0x4UL << ADC_SMPR2_SMP17_Pos) /*!< 0x00800000 */ + +#define ADC_SMPR2_SMP18_Pos (24U) +#define ADC_SMPR2_SMP18_Msk (0x7UL << ADC_SMPR2_SMP18_Pos) /*!< 0x07000000 */ +#define ADC_SMPR2_SMP18 ADC_SMPR2_SMP18_Msk /*!< ADC channel 18 sampling time selection */ +#define ADC_SMPR2_SMP18_0 (0x1UL << ADC_SMPR2_SMP18_Pos) /*!< 0x01000000 */ +#define ADC_SMPR2_SMP18_1 (0x2UL << ADC_SMPR2_SMP18_Pos) /*!< 0x02000000 */ +#define ADC_SMPR2_SMP18_2 (0x4UL << ADC_SMPR2_SMP18_Pos) /*!< 0x04000000 */ + +/******************** Bit definition for ADC_TR1 register *******************/ +#define ADC_TR1_LT1_Pos (0U) +#define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */ +#define ADC_TR1_LT1 ADC_TR1_LT1_Msk /*!< ADC analog watchdog 1 threshold low */ + +#define ADC_TR1_AWDFILT_Pos (12U) +#define ADC_TR1_AWDFILT_Msk (0x7UL << ADC_TR1_AWDFILT_Pos) /*!< 0x00007000 */ +#define ADC_TR1_AWDFILT ADC_TR1_AWDFILT_Msk /*!< ADC analog watchdog filtering parameter */ +#define ADC_TR1_AWDFILT_0 (0x1UL << ADC_TR1_AWDFILT_Pos) /*!< 0x00001000 */ +#define ADC_TR1_AWDFILT_1 (0x2UL << ADC_TR1_AWDFILT_Pos) /*!< 0x00002000 */ +#define ADC_TR1_AWDFILT_2 (0x4UL << ADC_TR1_AWDFILT_Pos) /*!< 0x00004000 */ + +#define ADC_TR1_HT1_Pos (16U) +#define ADC_TR1_HT1_Msk (0xFFFUL << ADC_TR1_HT1_Pos) /*!< 0x0FFF0000 */ +#define ADC_TR1_HT1 ADC_TR1_HT1_Msk /*!< ADC analog watchdog 1 threshold high */ + +/******************** Bit definition for ADC_TR2 register *******************/ +#define ADC_TR2_LT2_Pos (0U) +#define ADC_TR2_LT2_Msk (0xFFUL << ADC_TR2_LT2_Pos) /*!< 0x000000FF */ +#define ADC_TR2_LT2 ADC_TR2_LT2_Msk /*!< ADC analog watchdog 2 threshold low */ + +#define ADC_TR2_HT2_Pos (16U) +#define ADC_TR2_HT2_Msk (0xFFUL << ADC_TR2_HT2_Pos) /*!< 0x00FF0000 */ +#define ADC_TR2_HT2 ADC_TR2_HT2_Msk /*!< ADC analog watchdog 2 threshold high */ + +/******************** Bit definition for ADC_TR3 register *******************/ +#define ADC_TR3_LT3_Pos (0U) +#define ADC_TR3_LT3_Msk (0xFFUL << ADC_TR3_LT3_Pos) /*!< 0x000000FF */ +#define ADC_TR3_LT3 ADC_TR3_LT3_Msk /*!< ADC analog watchdog 3 threshold low */ + +#define ADC_TR3_HT3_Pos (16U) +#define ADC_TR3_HT3_Msk (0xFFUL << ADC_TR3_HT3_Pos) /*!< 0x00FF0000 */ +#define ADC_TR3_HT3 ADC_TR3_HT3_Msk /*!< ADC analog watchdog 3 threshold high */ + +/******************** Bit definition for ADC_SQR1 register ******************/ +#define ADC_SQR1_L_Pos (0U) +#define ADC_SQR1_L_Msk (0xFUL << ADC_SQR1_L_Pos) /*!< 0x0000000F */ +#define ADC_SQR1_L ADC_SQR1_L_Msk /*!< ADC group regular sequencer scan length */ +#define ADC_SQR1_L_0 (0x1UL << ADC_SQR1_L_Pos) /*!< 0x00000001 */ +#define ADC_SQR1_L_1 (0x2UL << ADC_SQR1_L_Pos) /*!< 0x00000002 */ +#define ADC_SQR1_L_2 (0x4UL << ADC_SQR1_L_Pos) /*!< 0x00000004 */ +#define ADC_SQR1_L_3 (0x8UL << ADC_SQR1_L_Pos) /*!< 0x00000008 */ + +#define ADC_SQR1_SQ1_Pos (6U) +#define ADC_SQR1_SQ1_Msk (0x1FUL << ADC_SQR1_SQ1_Pos) /*!< 0x000007C0 */ +#define ADC_SQR1_SQ1 ADC_SQR1_SQ1_Msk /*!< ADC group regular sequencer rank 1 */ +#define ADC_SQR1_SQ1_0 (0x01UL << ADC_SQR1_SQ1_Pos) /*!< 0x00000040 */ +#define ADC_SQR1_SQ1_1 (0x02UL << ADC_SQR1_SQ1_Pos) /*!< 0x00000080 */ +#define ADC_SQR1_SQ1_2 (0x04UL << ADC_SQR1_SQ1_Pos) /*!< 0x00000100 */ +#define ADC_SQR1_SQ1_3 (0x08UL << ADC_SQR1_SQ1_Pos) /*!< 0x00000200 */ +#define ADC_SQR1_SQ1_4 (0x10UL << ADC_SQR1_SQ1_Pos) /*!< 0x00000400 */ + +#define ADC_SQR1_SQ2_Pos (12U) +#define ADC_SQR1_SQ2_Msk (0x1FUL << ADC_SQR1_SQ2_Pos) /*!< 0x0001F000 */ +#define ADC_SQR1_SQ2 ADC_SQR1_SQ2_Msk /*!< ADC group regular sequencer rank 2 */ +#define ADC_SQR1_SQ2_0 (0x01UL << ADC_SQR1_SQ2_Pos) /*!< 0x00001000 */ +#define ADC_SQR1_SQ2_1 (0x02UL << ADC_SQR1_SQ2_Pos) /*!< 0x00002000 */ +#define ADC_SQR1_SQ2_2 (0x04UL << ADC_SQR1_SQ2_Pos) /*!< 0x00004000 */ +#define ADC_SQR1_SQ2_3 (0x08UL << ADC_SQR1_SQ2_Pos) /*!< 0x00008000 */ +#define ADC_SQR1_SQ2_4 (0x10UL << ADC_SQR1_SQ2_Pos) /*!< 0x00010000 */ + +#define ADC_SQR1_SQ3_Pos (18U) +#define ADC_SQR1_SQ3_Msk (0x1FUL << ADC_SQR1_SQ3_Pos) /*!< 0x007C0000 */ +#define ADC_SQR1_SQ3 ADC_SQR1_SQ3_Msk /*!< ADC group regular sequencer rank 3 */ +#define ADC_SQR1_SQ3_0 (0x01UL << ADC_SQR1_SQ3_Pos) /*!< 0x00040000 */ +#define ADC_SQR1_SQ3_1 (0x02UL << ADC_SQR1_SQ3_Pos) /*!< 0x00080000 */ +#define ADC_SQR1_SQ3_2 (0x04UL << ADC_SQR1_SQ3_Pos) /*!< 0x00100000 */ +#define ADC_SQR1_SQ3_3 (0x08UL << ADC_SQR1_SQ3_Pos) /*!< 0x00200000 */ +#define ADC_SQR1_SQ3_4 (0x10UL<< ADC_SQR1_SQ3_Pos) /*!< 0x00400000 */ + +#define ADC_SQR1_SQ4_Pos (24U) +#define ADC_SQR1_SQ4_Msk (0x1FUL << ADC_SQR1_SQ4_Pos) /*!< 0x1F000000 */ +#define ADC_SQR1_SQ4 ADC_SQR1_SQ4_Msk /*!< ADC group regular sequencer rank 4 */ +#define ADC_SQR1_SQ4_0 (0x01UL << ADC_SQR1_SQ4_Pos) /*!< 0x01000000 */ +#define ADC_SQR1_SQ4_1 (0x02UL << ADC_SQR1_SQ4_Pos) /*!< 0x02000000 */ +#define ADC_SQR1_SQ4_2 (0x04UL << ADC_SQR1_SQ4_Pos) /*!< 0x04000000 */ +#define ADC_SQR1_SQ4_3 (0x08UL << ADC_SQR1_SQ4_Pos) /*!< 0x08000000 */ +#define ADC_SQR1_SQ4_4 (0x10UL << ADC_SQR1_SQ4_Pos) /*!< 0x10000000 */ + +/******************** Bit definition for ADC_SQR2 register ******************/ +#define ADC_SQR2_SQ5_Pos (0U) +#define ADC_SQR2_SQ5_Msk (0x1FUL << ADC_SQR2_SQ5_Pos) /*!< 0x0000001F */ +#define ADC_SQR2_SQ5 ADC_SQR2_SQ5_Msk /*!< ADC group regular sequencer rank 5 */ +#define ADC_SQR2_SQ5_0 (0x01UL << ADC_SQR2_SQ5_Pos) /*!< 0x00000001 */ +#define ADC_SQR2_SQ5_1 (0x02UL << ADC_SQR2_SQ5_Pos) /*!< 0x00000002 */ +#define ADC_SQR2_SQ5_2 (0x04UL << ADC_SQR2_SQ5_Pos) /*!< 0x00000004 */ +#define ADC_SQR2_SQ5_3 (0x08UL << ADC_SQR2_SQ5_Pos) /*!< 0x00000008 */ +#define ADC_SQR2_SQ5_4 (0x10UL << ADC_SQR2_SQ5_Pos) /*!< 0x00000010 */ + +#define ADC_SQR2_SQ6_Pos (6U) +#define ADC_SQR2_SQ6_Msk (0x1FUL << ADC_SQR2_SQ6_Pos) /*!< 0x000007C0 */ +#define ADC_SQR2_SQ6 ADC_SQR2_SQ6_Msk /*!< ADC group regular sequencer rank 6 */ +#define ADC_SQR2_SQ6_0 (0x01UL << ADC_SQR2_SQ6_Pos) /*!< 0x00000040 */ +#define ADC_SQR2_SQ6_1 (0x02UL << ADC_SQR2_SQ6_Pos) /*!< 0x00000080 */ +#define ADC_SQR2_SQ6_2 (0x04UL << ADC_SQR2_SQ6_Pos) /*!< 0x00000100 */ +#define ADC_SQR2_SQ6_3 (0x08UL << ADC_SQR2_SQ6_Pos) /*!< 0x00000200 */ +#define ADC_SQR2_SQ6_4 (0x10UL << ADC_SQR2_SQ6_Pos) /*!< 0x00000400 */ + +#define ADC_SQR2_SQ7_Pos (12U) +#define ADC_SQR2_SQ7_Msk (0x1FUL << ADC_SQR2_SQ7_Pos) /*!< 0x0001F000 */ +#define ADC_SQR2_SQ7 ADC_SQR2_SQ7_Msk /*!< ADC group regular sequencer rank 7 */ +#define ADC_SQR2_SQ7_0 (0x01UL << ADC_SQR2_SQ7_Pos) /*!< 0x00001000 */ +#define ADC_SQR2_SQ7_1 (0x02UL << ADC_SQR2_SQ7_Pos) /*!< 0x00002000 */ +#define ADC_SQR2_SQ7_2 (0x04UL << ADC_SQR2_SQ7_Pos) /*!< 0x00004000 */ +#define ADC_SQR2_SQ7_3 (0x08UL << ADC_SQR2_SQ7_Pos) /*!< 0x00008000 */ +#define ADC_SQR2_SQ7_4 (0x10UL << ADC_SQR2_SQ7_Pos) /*!< 0x00010000 */ + +#define ADC_SQR2_SQ8_Pos (18U) +#define ADC_SQR2_SQ8_Msk (0x1FUL << ADC_SQR2_SQ8_Pos) /*!< 0x007C0000 */ +#define ADC_SQR2_SQ8 ADC_SQR2_SQ8_Msk /*!< ADC group regular sequencer rank 8 */ +#define ADC_SQR2_SQ8_0 (0x01UL << ADC_SQR2_SQ8_Pos) /*!< 0x00040000 */ +#define ADC_SQR2_SQ8_1 (0x02UL << ADC_SQR2_SQ8_Pos) /*!< 0x00080000 */ +#define ADC_SQR2_SQ8_2 (0x04UL << ADC_SQR2_SQ8_Pos) /*!< 0x00100000 */ +#define ADC_SQR2_SQ8_3 (0x08UL << ADC_SQR2_SQ8_Pos) /*!< 0x00200000 */ +#define ADC_SQR2_SQ8_4 (0x10UL << ADC_SQR2_SQ8_Pos) /*!< 0x00400000 */ + +#define ADC_SQR2_SQ9_Pos (24U) +#define ADC_SQR2_SQ9_Msk (0x1FUL << ADC_SQR2_SQ9_Pos) /*!< 0x1F000000 */ +#define ADC_SQR2_SQ9 ADC_SQR2_SQ9_Msk /*!< ADC group regular sequencer rank 9 */ +#define ADC_SQR2_SQ9_0 (0x01UL << ADC_SQR2_SQ9_Pos) /*!< 0x01000000 */ +#define ADC_SQR2_SQ9_1 (0x02UL << ADC_SQR2_SQ9_Pos) /*!< 0x02000000 */ +#define ADC_SQR2_SQ9_2 (0x04UL << ADC_SQR2_SQ9_Pos) /*!< 0x04000000 */ +#define ADC_SQR2_SQ9_3 (0x08UL << ADC_SQR2_SQ9_Pos) /*!< 0x08000000 */ +#define ADC_SQR2_SQ9_4 (0x10UL << ADC_SQR2_SQ9_Pos) /*!< 0x10000000 */ + +/******************** Bit definition for ADC_SQR3 register ******************/ +#define ADC_SQR3_SQ10_Pos (0U) +#define ADC_SQR3_SQ10_Msk (0x1FUL << ADC_SQR3_SQ10_Pos) /*!< 0x0000001F */ +#define ADC_SQR3_SQ10 ADC_SQR3_SQ10_Msk /*!< ADC group regular sequencer rank 10 */ +#define ADC_SQR3_SQ10_0 (0x01UL << ADC_SQR3_SQ10_Pos) /*!< 0x00000001 */ +#define ADC_SQR3_SQ10_1 (0x02UL << ADC_SQR3_SQ10_Pos) /*!< 0x00000002 */ +#define ADC_SQR3_SQ10_2 (0x04UL << ADC_SQR3_SQ10_Pos) /*!< 0x00000004 */ +#define ADC_SQR3_SQ10_3 (0x08UL << ADC_SQR3_SQ10_Pos) /*!< 0x00000008 */ +#define ADC_SQR3_SQ10_4 (0x10UL << ADC_SQR3_SQ10_Pos) /*!< 0x00000010 */ + +#define ADC_SQR3_SQ11_Pos (6U) +#define ADC_SQR3_SQ11_Msk (0x1FUL << ADC_SQR3_SQ11_Pos) /*!< 0x000007C0 */ +#define ADC_SQR3_SQ11 ADC_SQR3_SQ11_Msk /*!< ADC group regular sequencer rank 11 */ +#define ADC_SQR3_SQ11_0 (0x01UL << ADC_SQR3_SQ11_Pos) /*!< 0x00000040 */ +#define ADC_SQR3_SQ11_1 (0x02UL << ADC_SQR3_SQ11_Pos) /*!< 0x00000080 */ +#define ADC_SQR3_SQ11_2 (0x04UL << ADC_SQR3_SQ11_Pos) /*!< 0x00000100 */ +#define ADC_SQR3_SQ11_3 (0x08UL << ADC_SQR3_SQ11_Pos) /*!< 0x00000200 */ +#define ADC_SQR3_SQ11_4 (0x10UL << ADC_SQR3_SQ11_Pos) /*!< 0x00000400 */ + +#define ADC_SQR3_SQ12_Pos (12U) +#define ADC_SQR3_SQ12_Msk (0x1FUL << ADC_SQR3_SQ12_Pos) /*!< 0x0001F000 */ +#define ADC_SQR3_SQ12 ADC_SQR3_SQ12_Msk /*!< ADC group regular sequencer rank 12 */ +#define ADC_SQR3_SQ12_0 (0x01UL << ADC_SQR3_SQ12_Pos) /*!< 0x00001000 */ +#define ADC_SQR3_SQ12_1 (0x02UL << ADC_SQR3_SQ12_Pos) /*!< 0x00002000 */ +#define ADC_SQR3_SQ12_2 (0x04UL << ADC_SQR3_SQ12_Pos) /*!< 0x00004000 */ +#define ADC_SQR3_SQ12_3 (0x08UL << ADC_SQR3_SQ12_Pos) /*!< 0x00008000 */ +#define ADC_SQR3_SQ12_4 (0x10UL << ADC_SQR3_SQ12_Pos) /*!< 0x00010000 */ + +#define ADC_SQR3_SQ13_Pos (18U) +#define ADC_SQR3_SQ13_Msk (0x1FUL << ADC_SQR3_SQ13_Pos) /*!< 0x007C0000 */ +#define ADC_SQR3_SQ13 ADC_SQR3_SQ13_Msk /*!< ADC group regular sequencer rank 13 */ +#define ADC_SQR3_SQ13_0 (0x01UL << ADC_SQR3_SQ13_Pos) /*!< 0x00040000 */ +#define ADC_SQR3_SQ13_1 (0x02UL << ADC_SQR3_SQ13_Pos) /*!< 0x00080000 */ +#define ADC_SQR3_SQ13_2 (0x04UL << ADC_SQR3_SQ13_Pos) /*!< 0x00100000 */ +#define ADC_SQR3_SQ13_3 (0x08UL << ADC_SQR3_SQ13_Pos) /*!< 0x00200000 */ +#define ADC_SQR3_SQ13_4 (0x10UL << ADC_SQR3_SQ13_Pos) /*!< 0x00400000 */ + +#define ADC_SQR3_SQ14_Pos (24U) +#define ADC_SQR3_SQ14_Msk (0x1FUL << ADC_SQR3_SQ14_Pos) /*!< 0x1F000000 */ +#define ADC_SQR3_SQ14 ADC_SQR3_SQ14_Msk /*!< ADC group regular sequencer rank 14 */ +#define ADC_SQR3_SQ14_0 (0x01UL << ADC_SQR3_SQ14_Pos) /*!< 0x01000000 */ +#define ADC_SQR3_SQ14_1 (0x02UL << ADC_SQR3_SQ14_Pos) /*!< 0x02000000 */ +#define ADC_SQR3_SQ14_2 (0x04UL << ADC_SQR3_SQ14_Pos) /*!< 0x04000000 */ +#define ADC_SQR3_SQ14_3 (0x08UL << ADC_SQR3_SQ14_Pos) /*!< 0x08000000 */ +#define ADC_SQR3_SQ14_4 (0x10UL << ADC_SQR3_SQ14_Pos) /*!< 0x10000000 */ + +/******************** Bit definition for ADC_SQR4 register ******************/ +#define ADC_SQR4_SQ15_Pos (0U) +#define ADC_SQR4_SQ15_Msk (0x1FUL << ADC_SQR4_SQ15_Pos) /*!< 0x0000001F */ +#define ADC_SQR4_SQ15 ADC_SQR4_SQ15_Msk /*!< ADC group regular sequencer rank 15 */ +#define ADC_SQR4_SQ15_0 (0x01UL << ADC_SQR4_SQ15_Pos) /*!< 0x00000001 */ +#define ADC_SQR4_SQ15_1 (0x02UL << ADC_SQR4_SQ15_Pos) /*!< 0x00000002 */ +#define ADC_SQR4_SQ15_2 (0x04UL << ADC_SQR4_SQ15_Pos) /*!< 0x00000004 */ +#define ADC_SQR4_SQ15_3 (0x08UL << ADC_SQR4_SQ15_Pos) /*!< 0x00000008 */ +#define ADC_SQR4_SQ15_4 (0x10UL << ADC_SQR4_SQ15_Pos) /*!< 0x00000010 */ + +#define ADC_SQR4_SQ16_Pos (6U) +#define ADC_SQR4_SQ16_Msk (0x1FUL << ADC_SQR4_SQ16_Pos) /*!< 0x000007C0 */ +#define ADC_SQR4_SQ16 ADC_SQR4_SQ16_Msk /*!< ADC group regular sequencer rank 16 */ +#define ADC_SQR4_SQ16_0 (0x01UL << ADC_SQR4_SQ16_Pos) /*!< 0x00000040 */ +#define ADC_SQR4_SQ16_1 (0x02UL << ADC_SQR4_SQ16_Pos) /*!< 0x00000080 */ +#define ADC_SQR4_SQ16_2 (0x04UL << ADC_SQR4_SQ16_Pos) /*!< 0x00000100 */ +#define ADC_SQR4_SQ16_3 (0x08UL << ADC_SQR4_SQ16_Pos) /*!< 0x00000200 */ +#define ADC_SQR4_SQ16_4 (0x10UL << ADC_SQR4_SQ16_Pos) /*!< 0x00000400 */ + +/******************** Bit definition for ADC_DR register ********************/ +#define ADC_DR_RDATA_Pos (0U) +#define ADC_DR_RDATA_Msk (0xFFFFUL << ADC_DR_RDATA_Pos) /*!< 0x0000FFFF */ +#define ADC_DR_RDATA ADC_DR_RDATA_Msk /*!< ADC group regular conversion data */ + +/******************** Bit definition for ADC_JSQR register ******************/ +#define ADC_JSQR_JL_Pos (0U) +#define ADC_JSQR_JL_Msk (0x3UL << ADC_JSQR_JL_Pos) /*!< 0x00000003 */ +#define ADC_JSQR_JL ADC_JSQR_JL_Msk /*!< ADC group injected sequencer scan length */ +#define ADC_JSQR_JL_0 (0x1UL << ADC_JSQR_JL_Pos) /*!< 0x00000001 */ +#define ADC_JSQR_JL_1 (0x2UL << ADC_JSQR_JL_Pos) /*!< 0x00000002 */ + +#define ADC_JSQR_JEXTSEL_Pos (2U) +#define ADC_JSQR_JEXTSEL_Msk (0x1FUL << ADC_JSQR_JEXTSEL_Pos) /*!< 0x0000007C */ +#define ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_Msk /*!< ADC group injected external trigger source */ +#define ADC_JSQR_JEXTSEL_0 (0x1UL << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000004 */ +#define ADC_JSQR_JEXTSEL_1 (0x2UL << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000008 */ +#define ADC_JSQR_JEXTSEL_2 (0x4UL << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000010 */ +#define ADC_JSQR_JEXTSEL_3 (0x8UL << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000020 */ +#define ADC_JSQR_JEXTSEL_4 (0x10UL << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000040 */ + +#define ADC_JSQR_JEXTEN_Pos (7U) +#define ADC_JSQR_JEXTEN_Msk (0x3UL << ADC_JSQR_JEXTEN_Pos) /*!< 0x00000180 */ +#define ADC_JSQR_JEXTEN ADC_JSQR_JEXTEN_Msk /*!< ADC group injected external trigger polarity */ +#define ADC_JSQR_JEXTEN_0 (0x1UL << ADC_JSQR_JEXTEN_Pos) /*!< 0x00000080 */ +#define ADC_JSQR_JEXTEN_1 (0x2UL << ADC_JSQR_JEXTEN_Pos) /*!< 0x00000100 */ + +#define ADC_JSQR_JSQ1_Pos (9U) +#define ADC_JSQR_JSQ1_Msk (0x1FUL << ADC_JSQR_JSQ1_Pos) /*!< 0x00003E00 */ +#define ADC_JSQR_JSQ1 ADC_JSQR_JSQ1_Msk /*!< ADC group injected sequencer rank 1 */ +#define ADC_JSQR_JSQ1_0 (0x01UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000200 */ +#define ADC_JSQR_JSQ1_1 (0x02UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000400 */ +#define ADC_JSQR_JSQ1_2 (0x04UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000800 */ +#define ADC_JSQR_JSQ1_3 (0x08UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00001000 */ +#define ADC_JSQR_JSQ1_4 (0x10UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00002000 */ + +#define ADC_JSQR_JSQ2_Pos (15U) +#define ADC_JSQR_JSQ2_Msk (0x1FUL << ADC_JSQR_JSQ2_Pos) /*!< 0x0007C000 */ +#define ADC_JSQR_JSQ2 ADC_JSQR_JSQ2_Msk /*!< ADC group injected sequencer rank 2 */ +#define ADC_JSQR_JSQ2_0 (0x01UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00004000 */ +#define ADC_JSQR_JSQ2_1 (0x02UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00008000 */ +#define ADC_JSQR_JSQ2_2 (0x04UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00010000 */ +#define ADC_JSQR_JSQ2_3 (0x08UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00020000 */ +#define ADC_JSQR_JSQ2_4 (0x10UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00040000 */ + +#define ADC_JSQR_JSQ3_Pos (21U) +#define ADC_JSQR_JSQ3_Msk (0x1FUL << ADC_JSQR_JSQ3_Pos) /*!< 0x03E00000 */ +#define ADC_JSQR_JSQ3 ADC_JSQR_JSQ3_Msk /*!< ADC group injected sequencer rank 3 */ +#define ADC_JSQR_JSQ3_0 (0x01UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00200000 */ +#define ADC_JSQR_JSQ3_1 (0x02UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00400000 */ +#define ADC_JSQR_JSQ3_2 (0x04UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00800000 */ +#define ADC_JSQR_JSQ3_3 (0x08UL << ADC_JSQR_JSQ3_Pos) /*!< 0x01000000 */ +#define ADC_JSQR_JSQ3_4 (0x10UL << ADC_JSQR_JSQ3_Pos) /*!< 0x02000000 */ + +#define ADC_JSQR_JSQ4_Pos (27U) +#define ADC_JSQR_JSQ4_Msk (0x1FUL << ADC_JSQR_JSQ4_Pos) /*!< 0xF8000000 */ +#define ADC_JSQR_JSQ4 ADC_JSQR_JSQ4_Msk /*!< ADC group injected sequencer rank 4 */ +#define ADC_JSQR_JSQ4_0 (0x01UL << ADC_JSQR_JSQ4_Pos) /*!< 0x08000000 */ +#define ADC_JSQR_JSQ4_1 (0x02UL << ADC_JSQR_JSQ4_Pos) /*!< 0x10000000 */ +#define ADC_JSQR_JSQ4_2 (0x04UL << ADC_JSQR_JSQ4_Pos) /*!< 0x20000000 */ +#define ADC_JSQR_JSQ4_3 (0x08UL << ADC_JSQR_JSQ4_Pos) /*!< 0x40000000 */ +#define ADC_JSQR_JSQ4_4 (0x10UL << ADC_JSQR_JSQ4_Pos) /*!< 0x80000000 */ + +/******************** Bit definition for ADC_OFR1 register ******************/ +#define ADC_OFR1_OFFSET1_Pos (0U) +#define ADC_OFR1_OFFSET1_Msk (0xFFFUL << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000FFF */ +#define ADC_OFR1_OFFSET1 ADC_OFR1_OFFSET1_Msk /*!< ADC offset number 1 offset level */ + +#define ADC_OFR1_OFFSETPOS_Pos (24U) +#define ADC_OFR1_OFFSETPOS_Msk (0x1UL << ADC_OFR1_OFFSETPOS_Pos) /*!< 0x01000000 */ +#define ADC_OFR1_OFFSETPOS ADC_OFR1_OFFSETPOS_Msk /*!< ADC offset number 1 positive */ +#define ADC_OFR1_SATEN_Pos (25U) +#define ADC_OFR1_SATEN_Msk (0x1UL << ADC_OFR1_SATEN_Pos) /*!< 0x02000000 */ +#define ADC_OFR1_SATEN ADC_OFR1_SATEN_Msk /*!< ADC offset number 1 saturation enable */ + +#define ADC_OFR1_OFFSET1_CH_Pos (26U) +#define ADC_OFR1_OFFSET1_CH_Msk (0x1FUL << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x7C000000 */ +#define ADC_OFR1_OFFSET1_CH ADC_OFR1_OFFSET1_CH_Msk /*!< ADC offset number 1 channel selection */ +#define ADC_OFR1_OFFSET1_CH_0 (0x01UL << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x04000000 */ +#define ADC_OFR1_OFFSET1_CH_1 (0x02UL << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x08000000 */ +#define ADC_OFR1_OFFSET1_CH_2 (0x04UL << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x10000000 */ +#define ADC_OFR1_OFFSET1_CH_3 (0x08UL << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x20000000 */ +#define ADC_OFR1_OFFSET1_CH_4 (0x10UL << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x40000000 */ + +#define ADC_OFR1_OFFSET1_EN_Pos (31U) +#define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */ +#define ADC_OFR1_OFFSET1_EN ADC_OFR1_OFFSET1_EN_Msk /*!< ADC offset number 1 enable */ + +/******************** Bit definition for ADC_OFR2 register ******************/ +#define ADC_OFR2_OFFSET2_Pos (0U) +#define ADC_OFR2_OFFSET2_Msk (0xFFFUL << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000FFF */ +#define ADC_OFR2_OFFSET2 ADC_OFR2_OFFSET2_Msk /*!< ADC offset number 2 offset level */ + +#define ADC_OFR2_OFFSETPOS_Pos (24U) +#define ADC_OFR2_OFFSETPOS_Msk (0x1UL << ADC_OFR2_OFFSETPOS_Pos) /*!< 0x01000000 */ +#define ADC_OFR2_OFFSETPOS ADC_OFR2_OFFSETPOS_Msk /*!< ADC offset number 2 positive */ +#define ADC_OFR2_SATEN_Pos (25U) +#define ADC_OFR2_SATEN_Msk (0x1UL << ADC_OFR2_SATEN_Pos) /*!< 0x02000000 */ +#define ADC_OFR2_SATEN ADC_OFR2_SATEN_Msk /*!< ADC offset number 2 saturation enable */ + +#define ADC_OFR2_OFFSET2_CH_Pos (26U) +#define ADC_OFR2_OFFSET2_CH_Msk (0x1FUL << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x7C000000 */ +#define ADC_OFR2_OFFSET2_CH ADC_OFR2_OFFSET2_CH_Msk /*!< ADC offset number 2 channel selection */ +#define ADC_OFR2_OFFSET2_CH_0 (0x01UL << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x04000000 */ +#define ADC_OFR2_OFFSET2_CH_1 (0x02UL << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x08000000 */ +#define ADC_OFR2_OFFSET2_CH_2 (0x04UL << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x10000000 */ +#define ADC_OFR2_OFFSET2_CH_3 (0x08UL << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x20000000 */ +#define ADC_OFR2_OFFSET2_CH_4 (0x10UL << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x40000000 */ + +#define ADC_OFR2_OFFSET2_EN_Pos (31U) +#define ADC_OFR2_OFFSET2_EN_Msk (0x1UL << ADC_OFR2_OFFSET2_EN_Pos) /*!< 0x80000000 */ +#define ADC_OFR2_OFFSET2_EN ADC_OFR2_OFFSET2_EN_Msk /*!< ADC offset number 2 enable */ + +/******************** Bit definition for ADC_OFR3 register ******************/ +#define ADC_OFR3_OFFSET3_Pos (0U) +#define ADC_OFR3_OFFSET3_Msk (0xFFFUL << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000FFF */ +#define ADC_OFR3_OFFSET3 ADC_OFR3_OFFSET3_Msk /*!< ADC offset number 3 offset level */ + +#define ADC_OFR3_OFFSETPOS_Pos (24U) +#define ADC_OFR3_OFFSETPOS_Msk (0x1UL << ADC_OFR3_OFFSETPOS_Pos) /*!< 0x01000000 */ +#define ADC_OFR3_OFFSETPOS ADC_OFR3_OFFSETPOS_Msk /*!< ADC offset number 3 positive */ +#define ADC_OFR3_SATEN_Pos (25U) +#define ADC_OFR3_SATEN_Msk (0x1UL << ADC_OFR3_SATEN_Pos) /*!< 0x02000000 */ +#define ADC_OFR3_SATEN ADC_OFR3_SATEN_Msk /*!< ADC offset number 3 saturation enable */ + +#define ADC_OFR3_OFFSET3_CH_Pos (26U) +#define ADC_OFR3_OFFSET3_CH_Msk (0x1FUL << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x7C000000 */ +#define ADC_OFR3_OFFSET3_CH ADC_OFR3_OFFSET3_CH_Msk /*!< ADC offset number 3 channel selection */ +#define ADC_OFR3_OFFSET3_CH_0 (0x01UL << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x04000000 */ +#define ADC_OFR3_OFFSET3_CH_1 (0x02UL << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x08000000 */ +#define ADC_OFR3_OFFSET3_CH_2 (0x04UL << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x10000000 */ +#define ADC_OFR3_OFFSET3_CH_3 (0x08UL << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x20000000 */ +#define ADC_OFR3_OFFSET3_CH_4 (0x10UL << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x40000000 */ + +#define ADC_OFR3_OFFSET3_EN_Pos (31U) +#define ADC_OFR3_OFFSET3_EN_Msk (0x1UL << ADC_OFR3_OFFSET3_EN_Pos) /*!< 0x80000000 */ +#define ADC_OFR3_OFFSET3_EN ADC_OFR3_OFFSET3_EN_Msk /*!< ADC offset number 3 enable */ + +/******************** Bit definition for ADC_OFR4 register ******************/ +#define ADC_OFR4_OFFSET4_Pos (0U) +#define ADC_OFR4_OFFSET4_Msk (0xFFFUL << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000FFF */ +#define ADC_OFR4_OFFSET4 ADC_OFR4_OFFSET4_Msk /*!< ADC offset number 4 offset level */ + +#define ADC_OFR4_OFFSETPOS_Pos (24U) +#define ADC_OFR4_OFFSETPOS_Msk (0x1UL << ADC_OFR4_OFFSETPOS_Pos) /*!< 0x01000000 */ +#define ADC_OFR4_OFFSETPOS ADC_OFR4_OFFSETPOS_Msk /*!< ADC offset number 4 positive */ +#define ADC_OFR4_SATEN_Pos (25U) +#define ADC_OFR4_SATEN_Msk (0x1UL << ADC_OFR4_SATEN_Pos) /*!< 0x02000000 */ +#define ADC_OFR4_SATEN ADC_OFR4_SATEN_Msk /*!< ADC offset number 4 saturation enable */ + +#define ADC_OFR4_OFFSET4_CH_Pos (26U) +#define ADC_OFR4_OFFSET4_CH_Msk (0x1FUL << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x7C000000 */ +#define ADC_OFR4_OFFSET4_CH ADC_OFR4_OFFSET4_CH_Msk /*!< ADC offset number 4 channel selection */ +#define ADC_OFR4_OFFSET4_CH_0 (0x01UL << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x04000000 */ +#define ADC_OFR4_OFFSET4_CH_1 (0x02UL << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x08000000 */ +#define ADC_OFR4_OFFSET4_CH_2 (0x04UL << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x10000000 */ +#define ADC_OFR4_OFFSET4_CH_3 (0x08UL << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x20000000 */ +#define ADC_OFR4_OFFSET4_CH_4 (0x10UL << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x40000000 */ + +#define ADC_OFR4_OFFSET4_EN_Pos (31U) +#define ADC_OFR4_OFFSET4_EN_Msk (0x1UL << ADC_OFR4_OFFSET4_EN_Pos) /*!< 0x80000000 */ +#define ADC_OFR4_OFFSET4_EN ADC_OFR4_OFFSET4_EN_Msk /*!< ADC offset number 4 enable */ + +/******************** Bit definition for ADC_JDR1 register ******************/ +#define ADC_JDR1_JDATA_Pos (0U) +#define ADC_JDR1_JDATA_Msk (0xFFFFUL << ADC_JDR1_JDATA_Pos) /*!< 0x0000FFFF */ +#define ADC_JDR1_JDATA ADC_JDR1_JDATA_Msk /*!< ADC group injected sequencer rank 1 conversion data */ + +/******************** Bit definition for ADC_JDR2 register ******************/ +#define ADC_JDR2_JDATA_Pos (0U) +#define ADC_JDR2_JDATA_Msk (0xFFFFUL << ADC_JDR2_JDATA_Pos) /*!< 0x0000FFFF */ +#define ADC_JDR2_JDATA ADC_JDR2_JDATA_Msk /*!< ADC group injected sequencer rank 2 conversion data */ + +/******************** Bit definition for ADC_JDR3 register ******************/ +#define ADC_JDR3_JDATA_Pos (0U) +#define ADC_JDR3_JDATA_Msk (0xFFFFUL << ADC_JDR3_JDATA_Pos) /*!< 0x0000FFFF */ +#define ADC_JDR3_JDATA ADC_JDR3_JDATA_Msk /*!< ADC group injected sequencer rank 3 conversion data */ + +/******************** Bit definition for ADC_JDR4 register ******************/ +#define ADC_JDR4_JDATA_Pos (0U) +#define ADC_JDR4_JDATA_Msk (0xFFFFUL << ADC_JDR4_JDATA_Pos) /*!< 0x0000FFFF */ +#define ADC_JDR4_JDATA ADC_JDR4_JDATA_Msk /*!< ADC group injected sequencer rank 4 conversion data */ + +/******************** Bit definition for ADC_AWD2CR register ****************/ +#define ADC_AWD2CR_AWD2CH_Pos (0U) +#define ADC_AWD2CR_AWD2CH_Msk (0x7FFFFUL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x0007FFFF */ +#define ADC_AWD2CR_AWD2CH ADC_AWD2CR_AWD2CH_Msk /*!< ADC analog watchdog 2 monitored channel selection */ +#define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ +#define ADC_AWD2CR_AWD2CH_1 (0x00002UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000002 */ +#define ADC_AWD2CR_AWD2CH_2 (0x00004UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000004 */ +#define ADC_AWD2CR_AWD2CH_3 (0x00008UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000008 */ +#define ADC_AWD2CR_AWD2CH_4 (0x00010UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000010 */ +#define ADC_AWD2CR_AWD2CH_5 (0x00020UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000020 */ +#define ADC_AWD2CR_AWD2CH_6 (0x00040UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000040 */ +#define ADC_AWD2CR_AWD2CH_7 (0x00080UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000080 */ +#define ADC_AWD2CR_AWD2CH_8 (0x00100UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000100 */ +#define ADC_AWD2CR_AWD2CH_9 (0x00200UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000200 */ +#define ADC_AWD2CR_AWD2CH_10 (0x00400UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000400 */ +#define ADC_AWD2CR_AWD2CH_11 (0x00800UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000800 */ +#define ADC_AWD2CR_AWD2CH_12 (0x01000UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00001000 */ +#define ADC_AWD2CR_AWD2CH_13 (0x02000UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00002000 */ +#define ADC_AWD2CR_AWD2CH_14 (0x04000UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00004000 */ +#define ADC_AWD2CR_AWD2CH_15 (0x08000UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00008000 */ +#define ADC_AWD2CR_AWD2CH_16 (0x10000UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00010000 */ +#define ADC_AWD2CR_AWD2CH_17 (0x20000UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00020000 */ +#define ADC_AWD2CR_AWD2CH_18 (0x40000UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00040000 */ + +/******************** Bit definition for ADC_AWD3CR register ****************/ +#define ADC_AWD3CR_AWD3CH_Pos (0U) +#define ADC_AWD3CR_AWD3CH_Msk (0x7FFFFUL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x0007FFFF */ +#define ADC_AWD3CR_AWD3CH ADC_AWD3CR_AWD3CH_Msk /*!< ADC analog watchdog 3 monitored channel selection */ +#define ADC_AWD3CR_AWD3CH_0 (0x00001UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000001 */ +#define ADC_AWD3CR_AWD3CH_1 (0x00002UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000002 */ +#define ADC_AWD3CR_AWD3CH_2 (0x00004UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000004 */ +#define ADC_AWD3CR_AWD3CH_3 (0x00008UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000008 */ +#define ADC_AWD3CR_AWD3CH_4 (0x00010UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000010 */ +#define ADC_AWD3CR_AWD3CH_5 (0x00020UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000020 */ +#define ADC_AWD3CR_AWD3CH_6 (0x00040UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000040 */ +#define ADC_AWD3CR_AWD3CH_7 (0x00080UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000080 */ +#define ADC_AWD3CR_AWD3CH_8 (0x00100UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000100 */ +#define ADC_AWD3CR_AWD3CH_9 (0x00200UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000200 */ +#define ADC_AWD3CR_AWD3CH_10 (0x00400UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000400 */ +#define ADC_AWD3CR_AWD3CH_11 (0x00800UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000800 */ +#define ADC_AWD3CR_AWD3CH_12 (0x01000UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00001000 */ +#define ADC_AWD3CR_AWD3CH_13 (0x02000UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00002000 */ +#define ADC_AWD3CR_AWD3CH_14 (0x04000UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00004000 */ +#define ADC_AWD3CR_AWD3CH_15 (0x08000UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00008000 */ +#define ADC_AWD3CR_AWD3CH_16 (0x10000UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00010000 */ +#define ADC_AWD3CR_AWD3CH_17 (0x20000UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00020000 */ +#define ADC_AWD3CR_AWD3CH_18 (0x40000UL << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00040000 */ + +/******************** Bit definition for ADC_DIFSEL register ****************/ +#define ADC_DIFSEL_DIFSEL_Pos (0U) +#define ADC_DIFSEL_DIFSEL_Msk (0x7FFFFUL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x0007FFFF */ +#define ADC_DIFSEL_DIFSEL ADC_DIFSEL_DIFSEL_Msk /*!< ADC channel differential or single-ended mode */ +#define ADC_DIFSEL_DIFSEL_0 (0x00001UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000001 */ +#define ADC_DIFSEL_DIFSEL_1 (0x00002UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000002 */ +#define ADC_DIFSEL_DIFSEL_2 (0x00004UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000004 */ +#define ADC_DIFSEL_DIFSEL_3 (0x00008UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000008 */ +#define ADC_DIFSEL_DIFSEL_4 (0x00010UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000010 */ +#define ADC_DIFSEL_DIFSEL_5 (0x00020UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000020 */ +#define ADC_DIFSEL_DIFSEL_6 (0x00040UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000040 */ +#define ADC_DIFSEL_DIFSEL_7 (0x00080UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000080 */ +#define ADC_DIFSEL_DIFSEL_8 (0x00100UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000100 */ +#define ADC_DIFSEL_DIFSEL_9 (0x00200UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000200 */ +#define ADC_DIFSEL_DIFSEL_10 (0x00400UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000400 */ +#define ADC_DIFSEL_DIFSEL_11 (0x00800UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000800 */ +#define ADC_DIFSEL_DIFSEL_12 (0x01000UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00001000 */ +#define ADC_DIFSEL_DIFSEL_13 (0x02000UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00002000 */ +#define ADC_DIFSEL_DIFSEL_14 (0x04000UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00004000 */ +#define ADC_DIFSEL_DIFSEL_15 (0x08000UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00008000 */ +#define ADC_DIFSEL_DIFSEL_16 (0x10000UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00010000 */ +#define ADC_DIFSEL_DIFSEL_17 (0x20000UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00020000 */ +#define ADC_DIFSEL_DIFSEL_18 (0x40000UL << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00040000 */ + +/******************** Bit definition for ADC_CALFACT register ***************/ +#define ADC_CALFACT_CALFACT_S_Pos (0U) +#define ADC_CALFACT_CALFACT_S_Msk (0x7FUL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x0000007F */ +#define ADC_CALFACT_CALFACT_S ADC_CALFACT_CALFACT_S_Msk /*!< ADC calibration factor in single-ended mode */ +#define ADC_CALFACT_CALFACT_S_0 (0x01UL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000001 */ +#define ADC_CALFACT_CALFACT_S_1 (0x02UL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000002 */ +#define ADC_CALFACT_CALFACT_S_2 (0x04UL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000004 */ +#define ADC_CALFACT_CALFACT_S_3 (0x08UL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000008 */ +#define ADC_CALFACT_CALFACT_S_4 (0x10UL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000010 */ +#define ADC_CALFACT_CALFACT_S_5 (0x20UL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000020 */ +#define ADC_CALFACT_CALFACT_S_6 (0x40UL << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000030 */ + +#define ADC_CALFACT_CALFACT_D_Pos (16U) +#define ADC_CALFACT_CALFACT_D_Msk (0x7FUL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x007F0000 */ +#define ADC_CALFACT_CALFACT_D ADC_CALFACT_CALFACT_D_Msk /*!< ADC calibration factor in differential mode */ +#define ADC_CALFACT_CALFACT_D_0 (0x01UL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00010000 */ +#define ADC_CALFACT_CALFACT_D_1 (0x02UL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00020000 */ +#define ADC_CALFACT_CALFACT_D_2 (0x04UL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00040000 */ +#define ADC_CALFACT_CALFACT_D_3 (0x08UL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00080000 */ +#define ADC_CALFACT_CALFACT_D_4 (0x10UL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00100000 */ +#define ADC_CALFACT_CALFACT_D_5 (0x20UL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00200000 */ +#define ADC_CALFACT_CALFACT_D_6 (0x40UL << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00300000 */ + +/******************** Bit definition for ADC_GCOMP register *****************/ +#define ADC_GCOMP_GCOMPCOEFF_Pos (0U) +#define ADC_GCOMP_GCOMPCOEFF_Msk (0x3FFFUL << ADC_GCOMP_GCOMPCOEFF_Pos) /*!< 0x00003FFF */ +#define ADC_GCOMP_GCOMPCOEFF ADC_GCOMP_GCOMPCOEFF_Msk /*!< ADC Gain Compensation Coefficient */ + +/************************* ADC Common registers *****************************/ +/******************** Bit definition for ADC_CSR register *******************/ +#define ADC_CSR_ADRDY_MST_Pos (0U) +#define ADC_CSR_ADRDY_MST_Msk (0x1UL << ADC_CSR_ADRDY_MST_Pos) /*!< 0x00000001 */ +#define ADC_CSR_ADRDY_MST ADC_CSR_ADRDY_MST_Msk /*!< ADC multimode master ready flag */ +#define ADC_CSR_EOSMP_MST_Pos (1U) +#define ADC_CSR_EOSMP_MST_Msk (0x1UL << ADC_CSR_EOSMP_MST_Pos) /*!< 0x00000002 */ +#define ADC_CSR_EOSMP_MST ADC_CSR_EOSMP_MST_Msk /*!< ADC multimode master group regular end of sampling flag */ +#define ADC_CSR_EOC_MST_Pos (2U) +#define ADC_CSR_EOC_MST_Msk (0x1UL << ADC_CSR_EOC_MST_Pos) /*!< 0x00000004 */ +#define ADC_CSR_EOC_MST ADC_CSR_EOC_MST_Msk /*!< ADC multimode master group regular end of unitary conversion flag */ +#define ADC_CSR_EOS_MST_Pos (3U) +#define ADC_CSR_EOS_MST_Msk (0x1UL << ADC_CSR_EOS_MST_Pos) /*!< 0x00000008 */ +#define ADC_CSR_EOS_MST ADC_CSR_EOS_MST_Msk /*!< ADC multimode master group regular end of sequence conversions flag */ +#define ADC_CSR_OVR_MST_Pos (4U) +#define ADC_CSR_OVR_MST_Msk (0x1UL << ADC_CSR_OVR_MST_Pos) /*!< 0x00000010 */ +#define ADC_CSR_OVR_MST ADC_CSR_OVR_MST_Msk /*!< ADC multimode master group regular overrun flag */ +#define ADC_CSR_JEOC_MST_Pos (5U) +#define ADC_CSR_JEOC_MST_Msk (0x1UL << ADC_CSR_JEOC_MST_Pos) /*!< 0x00000020 */ +#define ADC_CSR_JEOC_MST ADC_CSR_JEOC_MST_Msk /*!< ADC multimode master group injected end of unitary conversion flag */ +#define ADC_CSR_JEOS_MST_Pos (6U) +#define ADC_CSR_JEOS_MST_Msk (0x1UL << ADC_CSR_JEOS_MST_Pos) /*!< 0x00000040 */ +#define ADC_CSR_JEOS_MST ADC_CSR_JEOS_MST_Msk /*!< ADC multimode master group injected end of sequence conversions flag */ +#define ADC_CSR_AWD1_MST_Pos (7U) +#define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */ +#define ADC_CSR_AWD1_MST ADC_CSR_AWD1_MST_Msk /*!< ADC multimode master analog watchdog 1 flag */ +#define ADC_CSR_AWD2_MST_Pos (8U) +#define ADC_CSR_AWD2_MST_Msk (0x1UL << ADC_CSR_AWD2_MST_Pos) /*!< 0x00000100 */ +#define ADC_CSR_AWD2_MST ADC_CSR_AWD2_MST_Msk /*!< ADC multimode master analog watchdog 2 flag */ +#define ADC_CSR_AWD3_MST_Pos (9U) +#define ADC_CSR_AWD3_MST_Msk (0x1UL << ADC_CSR_AWD3_MST_Pos) /*!< 0x00000200 */ +#define ADC_CSR_AWD3_MST ADC_CSR_AWD3_MST_Msk /*!< ADC multimode master analog watchdog 3 flag */ +#define ADC_CSR_JQOVF_MST_Pos (10U) +#define ADC_CSR_JQOVF_MST_Msk (0x1UL << ADC_CSR_JQOVF_MST_Pos) /*!< 0x00000400 */ +#define ADC_CSR_JQOVF_MST ADC_CSR_JQOVF_MST_Msk /*!< ADC multimode master group injected contexts queue overflow flag */ + +#define ADC_CSR_ADRDY_SLV_Pos (16U) +#define ADC_CSR_ADRDY_SLV_Msk (0x1UL << ADC_CSR_ADRDY_SLV_Pos) /*!< 0x00010000 */ +#define ADC_CSR_ADRDY_SLV ADC_CSR_ADRDY_SLV_Msk /*!< ADC multimode slave ready flag */ +#define ADC_CSR_EOSMP_SLV_Pos (17U) +#define ADC_CSR_EOSMP_SLV_Msk (0x1UL << ADC_CSR_EOSMP_SLV_Pos) /*!< 0x00020000 */ +#define ADC_CSR_EOSMP_SLV ADC_CSR_EOSMP_SLV_Msk /*!< ADC multimode slave group regular end of sampling flag */ +#define ADC_CSR_EOC_SLV_Pos (18U) +#define ADC_CSR_EOC_SLV_Msk (0x1UL << ADC_CSR_EOC_SLV_Pos) /*!< 0x00040000 */ +#define ADC_CSR_EOC_SLV ADC_CSR_EOC_SLV_Msk /*!< ADC multimode slave group regular end of unitary conversion flag */ +#define ADC_CSR_EOS_SLV_Pos (19U) +#define ADC_CSR_EOS_SLV_Msk (0x1UL << ADC_CSR_EOS_SLV_Pos) /*!< 0x00080000 */ +#define ADC_CSR_EOS_SLV ADC_CSR_EOS_SLV_Msk /*!< ADC multimode slave group regular end of sequence conversions flag */ +#define ADC_CSR_OVR_SLV_Pos (20U) +#define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */ +#define ADC_CSR_OVR_SLV ADC_CSR_OVR_SLV_Msk /*!< ADC multimode slave group regular overrun flag */ +#define ADC_CSR_JEOC_SLV_Pos (21U) +#define ADC_CSR_JEOC_SLV_Msk (0x1UL << ADC_CSR_JEOC_SLV_Pos) /*!< 0x00200000 */ +#define ADC_CSR_JEOC_SLV ADC_CSR_JEOC_SLV_Msk /*!< ADC multimode slave group injected end of unitary conversion flag */ +#define ADC_CSR_JEOS_SLV_Pos (22U) +#define ADC_CSR_JEOS_SLV_Msk (0x1UL << ADC_CSR_JEOS_SLV_Pos) /*!< 0x00400000 */ +#define ADC_CSR_JEOS_SLV ADC_CSR_JEOS_SLV_Msk /*!< ADC multimode slave group injected end of sequence conversions flag */ +#define ADC_CSR_AWD1_SLV_Pos (23U) +#define ADC_CSR_AWD1_SLV_Msk (0x1UL << ADC_CSR_AWD1_SLV_Pos) /*!< 0x00800000 */ +#define ADC_CSR_AWD1_SLV ADC_CSR_AWD1_SLV_Msk /*!< ADC multimode slave analog watchdog 1 flag */ +#define ADC_CSR_AWD2_SLV_Pos (24U) +#define ADC_CSR_AWD2_SLV_Msk (0x1UL << ADC_CSR_AWD2_SLV_Pos) /*!< 0x01000000 */ +#define ADC_CSR_AWD2_SLV ADC_CSR_AWD2_SLV_Msk /*!< ADC multimode slave analog watchdog 2 flag */ +#define ADC_CSR_AWD3_SLV_Pos (25U) +#define ADC_CSR_AWD3_SLV_Msk (0x1UL << ADC_CSR_AWD3_SLV_Pos) /*!< 0x02000000 */ +#define ADC_CSR_AWD3_SLV ADC_CSR_AWD3_SLV_Msk /*!< ADC multimode slave analog watchdog 3 flag */ +#define ADC_CSR_JQOVF_SLV_Pos (26U) +#define ADC_CSR_JQOVF_SLV_Msk (0x1UL << ADC_CSR_JQOVF_SLV_Pos) /*!< 0x04000000 */ +#define ADC_CSR_JQOVF_SLV ADC_CSR_JQOVF_SLV_Msk /*!< ADC multimode slave group injected contexts queue overflow flag */ + +/******************** Bit definition for ADC_CCR register *******************/ +#define ADC_CCR_DUAL_Pos (0U) +#define ADC_CCR_DUAL_Msk (0x1FUL << ADC_CCR_DUAL_Pos) /*!< 0x0000001F */ +#define ADC_CCR_DUAL ADC_CCR_DUAL_Msk /*!< ADC multimode mode selection */ +#define ADC_CCR_DUAL_0 (0x01UL << ADC_CCR_DUAL_Pos) /*!< 0x00000001 */ +#define ADC_CCR_DUAL_1 (0x02UL << ADC_CCR_DUAL_Pos) /*!< 0x00000002 */ +#define ADC_CCR_DUAL_2 (0x04UL << ADC_CCR_DUAL_Pos) /*!< 0x00000004 */ +#define ADC_CCR_DUAL_3 (0x08UL << ADC_CCR_DUAL_Pos) /*!< 0x00000008 */ +#define ADC_CCR_DUAL_4 (0x10UL << ADC_CCR_DUAL_Pos) /*!< 0x00000010 */ + +#define ADC_CCR_DELAY_Pos (8U) +#define ADC_CCR_DELAY_Msk (0xFUL << ADC_CCR_DELAY_Pos) /*!< 0x00000F00 */ +#define ADC_CCR_DELAY ADC_CCR_DELAY_Msk /*!< ADC multimode delay between 2 sampling phases */ +#define ADC_CCR_DELAY_0 (0x1UL << ADC_CCR_DELAY_Pos) /*!< 0x00000100 */ +#define ADC_CCR_DELAY_1 (0x2UL << ADC_CCR_DELAY_Pos) /*!< 0x00000200 */ +#define ADC_CCR_DELAY_2 (0x4UL << ADC_CCR_DELAY_Pos) /*!< 0x00000400 */ +#define ADC_CCR_DELAY_3 (0x8UL << ADC_CCR_DELAY_Pos) /*!< 0x00000800 */ + +#define ADC_CCR_DMACFG_Pos (13U) +#define ADC_CCR_DMACFG_Msk (0x1UL << ADC_CCR_DMACFG_Pos) /*!< 0x00002000 */ +#define ADC_CCR_DMACFG ADC_CCR_DMACFG_Msk /*!< ADC multimode DMA transfer configuration */ + +#define ADC_CCR_MDMA_Pos (14U) +#define ADC_CCR_MDMA_Msk (0x3UL << ADC_CCR_MDMA_Pos) /*!< 0x0000C000 */ +#define ADC_CCR_MDMA ADC_CCR_MDMA_Msk /*!< ADC multimode DMA transfer enable */ +#define ADC_CCR_MDMA_0 (0x1UL << ADC_CCR_MDMA_Pos) /*!< 0x00004000 */ +#define ADC_CCR_MDMA_1 (0x2UL << ADC_CCR_MDMA_Pos) /*!< 0x00008000 */ + +#define ADC_CCR_CKMODE_Pos (16U) +#define ADC_CCR_CKMODE_Msk (0x3UL << ADC_CCR_CKMODE_Pos) /*!< 0x00030000 */ +#define ADC_CCR_CKMODE ADC_CCR_CKMODE_Msk /*!< ADC common clock source and prescaler (prescaler only for clock source synchronous) */ +#define ADC_CCR_CKMODE_0 (0x1UL << ADC_CCR_CKMODE_Pos) /*!< 0x00010000 */ +#define ADC_CCR_CKMODE_1 (0x2UL << ADC_CCR_CKMODE_Pos) /*!< 0x00020000 */ + +#define ADC_CCR_PRESC_Pos (18U) +#define ADC_CCR_PRESC_Msk (0xFUL << ADC_CCR_PRESC_Pos) /*!< 0x003C0000 */ +#define ADC_CCR_PRESC ADC_CCR_PRESC_Msk /*!< ADC common clock prescaler, only for clock source asynchronous */ +#define ADC_CCR_PRESC_0 (0x1UL << ADC_CCR_PRESC_Pos) /*!< 0x00040000 */ +#define ADC_CCR_PRESC_1 (0x2UL << ADC_CCR_PRESC_Pos) /*!< 0x00080000 */ +#define ADC_CCR_PRESC_2 (0x4UL << ADC_CCR_PRESC_Pos) /*!< 0x00100000 */ +#define ADC_CCR_PRESC_3 (0x8UL << ADC_CCR_PRESC_Pos) /*!< 0x00200000 */ + +#define ADC_CCR_VREFEN_Pos (22U) +#define ADC_CCR_VREFEN_Msk (0x1UL << ADC_CCR_VREFEN_Pos) /*!< 0x00400000 */ +#define ADC_CCR_VREFEN ADC_CCR_VREFEN_Msk /*!< ADC internal path to VrefInt enable */ +#define ADC_CCR_VSENSESEL_Pos (23U) +#define ADC_CCR_VSENSESEL_Msk (0x1UL << ADC_CCR_VSENSESEL_Pos) /*!< 0x00800000 */ +#define ADC_CCR_VSENSESEL ADC_CCR_VSENSESEL_Msk /*!< ADC internal path to temperature sensor enable */ +#define ADC_CCR_VBATSEL_Pos (24U) +#define ADC_CCR_VBATSEL_Msk (0x1UL << ADC_CCR_VBATSEL_Pos) /*!< 0x01000000 */ +#define ADC_CCR_VBATSEL ADC_CCR_VBATSEL_Msk /*!< ADC internal path to battery voltage enable */ + +/******************** Bit definition for ADC_CDR register *******************/ +#define ADC_CDR_RDATA_MST_Pos (0U) +#define ADC_CDR_RDATA_MST_Msk (0xFFFFUL << ADC_CDR_RDATA_MST_Pos) /*!< 0x0000FFFF */ +#define ADC_CDR_RDATA_MST ADC_CDR_RDATA_MST_Msk /*!< ADC multimode master group regular conversion data */ + +#define ADC_CDR_RDATA_SLV_Pos (16U) +#define ADC_CDR_RDATA_SLV_Msk (0xFFFFUL << ADC_CDR_RDATA_SLV_Pos) /*!< 0xFFFF0000 */ +#define ADC_CDR_RDATA_SLV ADC_CDR_RDATA_SLV_Msk /*!< ADC multimode slave group regular conversion data */ + + +/******************************************************************************/ +/* */ +/* Analog Comparators (COMP) */ +/* */ +/******************************************************************************/ +/********************** Bit definition for COMP_CSR register ****************/ +#define COMP_CSR_EN_Pos (0U) +#define COMP_CSR_EN_Msk (0x1UL << COMP_CSR_EN_Pos) /*!< 0x00000001 */ +#define COMP_CSR_EN COMP_CSR_EN_Msk /*!< Comparator enable */ + +#define COMP_CSR_INMSEL_Pos (4U) +#define COMP_CSR_INMSEL_Msk (0xFUL << COMP_CSR_INMSEL_Pos) /*!< 0x00000070 */ +#define COMP_CSR_INMSEL COMP_CSR_INMSEL_Msk /*!< Comparator input minus selection */ +#define COMP_CSR_INMSEL_0 (0x1UL << COMP_CSR_INMSEL_Pos) /*!< 0x00000010 */ +#define COMP_CSR_INMSEL_1 (0x2UL << COMP_CSR_INMSEL_Pos) /*!< 0x00000020 */ +#define COMP_CSR_INMSEL_2 (0x4UL << COMP_CSR_INMSEL_Pos) /*!< 0x00000040 */ +#define COMP_CSR_INMSEL_3 (0x8UL << COMP_CSR_INMSEL_Pos) /*!< 0x00000080 */ + +#define COMP_CSR_INPSEL_Pos (8U) +#define COMP_CSR_INPSEL_Msk (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */ +#define COMP_CSR_INPSEL COMP_CSR_INPSEL_Msk /*!< Comparator input plus selection */ + +#define COMP_CSR_POLARITY_Pos (15U) +#define COMP_CSR_POLARITY_Msk (0x1UL << COMP_CSR_POLARITY_Pos) /*!< 0x00008000 */ +#define COMP_CSR_POLARITY COMP_CSR_POLARITY_Msk /*!< Comparator output polarity */ + +#define COMP_CSR_HYST_Pos (16U) +#define COMP_CSR_HYST_Msk (0x7UL << COMP_CSR_HYST_Pos) /*!< 0x00070000 */ +#define COMP_CSR_HYST COMP_CSR_HYST_Msk /*!< Comparator hysteresis */ +#define COMP_CSR_HYST_0 (0x1UL << COMP_CSR_HYST_Pos) /*!< 0x00010000 */ +#define COMP_CSR_HYST_1 (0x2UL << COMP_CSR_HYST_Pos) /*!< 0x00020000 */ +#define COMP_CSR_HYST_2 (0x4UL << COMP_CSR_HYST_Pos) /*!< 0x00040000 */ + +#define COMP_CSR_BLANKING_Pos (19U) +#define COMP_CSR_BLANKING_Msk (0x7UL << COMP_CSR_BLANKING_Pos) /*!< 0x00380000 */ +#define COMP_CSR_BLANKING COMP_CSR_BLANKING_Msk /*!< Comparator blanking source */ +#define COMP_CSR_BLANKING_0 (0x1UL << COMP_CSR_BLANKING_Pos) /*!< 0x00080000 */ +#define COMP_CSR_BLANKING_1 (0x2UL << COMP_CSR_BLANKING_Pos) /*!< 0x00100000 */ +#define COMP_CSR_BLANKING_2 (0x4UL << COMP_CSR_BLANKING_Pos) /*!< 0x00200000 */ + +#define COMP_CSR_BRGEN_Pos (22U) +#define COMP_CSR_BRGEN_Msk (0x1UL << COMP_CSR_BRGEN_Pos) /*!< 0x00400000 */ +#define COMP_CSR_BRGEN COMP_CSR_BRGEN_Msk /*!< Comparator scaler bridge enable */ + +#define COMP_CSR_SCALEN_Pos (23U) +#define COMP_CSR_SCALEN_Msk (0x1UL << COMP_CSR_SCALEN_Pos) /*!< 0x00800000 */ +#define COMP_CSR_SCALEN COMP_CSR_SCALEN_Msk /*!< Comparator voltage scaler enable */ + +#define COMP_CSR_VALUE_Pos (30U) +#define COMP_CSR_VALUE_Msk (0x1UL << COMP_CSR_VALUE_Pos) /*!< 0x40000000 */ +#define COMP_CSR_VALUE COMP_CSR_VALUE_Msk /*!< Comparator output level */ + +#define COMP_CSR_LOCK_Pos (31U) +#define COMP_CSR_LOCK_Msk (0x1UL << COMP_CSR_LOCK_Pos) /*!< 0x80000000 */ +#define COMP_CSR_LOCK COMP_CSR_LOCK_Msk /*!< Comparator lock */ + +/******************************************************************************/ +/* */ +/* CORDIC calculation unit */ +/* */ +/******************************************************************************/ +/******************* Bit definition for CORDIC_CSR register *****************/ +#define CORDIC_CSR_FUNC_Pos (0U) +#define CORDIC_CSR_FUNC_Msk (0xFUL << CORDIC_CSR_FUNC_Pos) /*!< 0x0000000F */ +#define CORDIC_CSR_FUNC CORDIC_CSR_FUNC_Msk /*!< Function */ +#define CORDIC_CSR_FUNC_0 (0x1UL << CORDIC_CSR_FUNC_Pos) /*!< 0x00000001 */ +#define CORDIC_CSR_FUNC_1 (0x2UL << CORDIC_CSR_FUNC_Pos) /*!< 0x00000002 */ +#define CORDIC_CSR_FUNC_2 (0x4UL << CORDIC_CSR_FUNC_Pos) /*!< 0x00000004 */ +#define CORDIC_CSR_FUNC_3 (0x8UL << CORDIC_CSR_FUNC_Pos) /*!< 0x00000008 */ +#define CORDIC_CSR_PRECISION_Pos (4U) +#define CORDIC_CSR_PRECISION_Msk (0xFUL << CORDIC_CSR_PRECISION_Pos) /*!< 0x000000F0 */ +#define CORDIC_CSR_PRECISION CORDIC_CSR_PRECISION_Msk /*!< Precision */ +#define CORDIC_CSR_PRECISION_0 (0x1UL << CORDIC_CSR_PRECISION_Pos) /*!< 0x00000010 */ +#define CORDIC_CSR_PRECISION_1 (0x2UL << CORDIC_CSR_PRECISION_Pos) /*!< 0x00000020 */ +#define CORDIC_CSR_PRECISION_2 (0x4UL << CORDIC_CSR_PRECISION_Pos) /*!< 0x00000040 */ +#define CORDIC_CSR_PRECISION_3 (0x8UL << CORDIC_CSR_PRECISION_Pos) /*!< 0x00000080 */ +#define CORDIC_CSR_SCALE_Pos (8U) +#define CORDIC_CSR_SCALE_Msk (0x7UL << CORDIC_CSR_SCALE_Pos) /*!< 0x00000700 */ +#define CORDIC_CSR_SCALE CORDIC_CSR_SCALE_Msk /*!< Scaling factor */ +#define CORDIC_CSR_SCALE_0 (0x1UL << CORDIC_CSR_SCALE_Pos) /*!< 0x00000100 */ +#define CORDIC_CSR_SCALE_1 (0x2UL << CORDIC_CSR_SCALE_Pos) /*!< 0x00000200 */ +#define CORDIC_CSR_SCALE_2 (0x4UL << CORDIC_CSR_SCALE_Pos) /*!< 0x00000400 */ +#define CORDIC_CSR_IEN_Pos (16U) +#define CORDIC_CSR_IEN_Msk (0x1UL << CORDIC_CSR_IEN_Pos) /*!< 0x00010000 */ +#define CORDIC_CSR_IEN CORDIC_CSR_IEN_Msk /*!< Interrupt Enable */ +#define CORDIC_CSR_DMAREN_Pos (17U) +#define CORDIC_CSR_DMAREN_Msk (0x1UL << CORDIC_CSR_DMAREN_Pos) /*!< 0x00020000 */ +#define CORDIC_CSR_DMAREN CORDIC_CSR_DMAREN_Msk /*!< DMA Read channel Enable */ +#define CORDIC_CSR_DMAWEN_Pos (18U) +#define CORDIC_CSR_DMAWEN_Msk (0x1UL << CORDIC_CSR_DMAWEN_Pos) /*!< 0x00040000 */ +#define CORDIC_CSR_DMAWEN CORDIC_CSR_DMAWEN_Msk /*!< DMA Write channel Enable */ +#define CORDIC_CSR_NRES_Pos (19U) +#define CORDIC_CSR_NRES_Msk (0x1UL << CORDIC_CSR_NRES_Pos) /*!< 0x00080000 */ +#define CORDIC_CSR_NRES CORDIC_CSR_NRES_Msk /*!< Number of results in WDATA register */ +#define CORDIC_CSR_NARGS_Pos (20U) +#define CORDIC_CSR_NARGS_Msk (0x1UL << CORDIC_CSR_NARGS_Pos) /*!< 0x00100000 */ +#define CORDIC_CSR_NARGS CORDIC_CSR_NARGS_Msk /*!< Number of arguments in RDATA register */ +#define CORDIC_CSR_RESSIZE_Pos (21U) +#define CORDIC_CSR_RESSIZE_Msk (0x1UL << CORDIC_CSR_RESSIZE_Pos) /*!< 0x00200000 */ +#define CORDIC_CSR_RESSIZE CORDIC_CSR_RESSIZE_Msk /*!< Width of output data */ +#define CORDIC_CSR_ARGSIZE_Pos (22U) +#define CORDIC_CSR_ARGSIZE_Msk (0x1UL << CORDIC_CSR_ARGSIZE_Pos) /*!< 0x00400000 */ +#define CORDIC_CSR_ARGSIZE CORDIC_CSR_ARGSIZE_Msk /*!< Width of input data */ +#define CORDIC_CSR_RRDY_Pos (31U) +#define CORDIC_CSR_RRDY_Msk (0x1UL << CORDIC_CSR_RRDY_Pos) /*!< 0x80000000 */ +#define CORDIC_CSR_RRDY CORDIC_CSR_RRDY_Msk /*!< Result Ready Flag */ + +/******************* Bit definition for CORDIC_WDATA register ***************/ +#define CORDIC_WDATA_ARG_Pos (0U) +#define CORDIC_WDATA_ARG_Msk (0xFFFFFFFFUL << CORDIC_WDATA_ARG_Pos) /*!< 0xFFFFFFFF */ +#define CORDIC_WDATA_ARG CORDIC_WDATA_ARG_Msk /*!< Input Argument */ + +/******************* Bit definition for CORDIC_RDATA register ***************/ +#define CORDIC_RDATA_RES_Pos (0U) +#define CORDIC_RDATA_RES_Msk (0xFFFFFFFFUL << CORDIC_RDATA_RES_Pos) /*!< 0xFFFFFFFF */ +#define CORDIC_RDATA_RES CORDIC_RDATA_RES_Msk /*!< Output Result */ + +/******************************************************************************/ +/* */ +/* CRC calculation unit */ +/* */ +/******************************************************************************/ +/******************* Bit definition for CRC_DR register *********************/ +#define CRC_DR_DR_Pos (0U) +#define CRC_DR_DR_Msk (0xFFFFFFFFUL << CRC_DR_DR_Pos) /*!< 0xFFFFFFFF */ +#define CRC_DR_DR CRC_DR_DR_Msk /*!< Data register bits */ + +/******************* Bit definition for CRC_IDR register ********************/ +#define CRC_IDR_IDR_Pos (0U) +#define CRC_IDR_IDR_Msk (0xFFFFFFFFUL << CRC_IDR_IDR_Pos) /*!< 0xFFFFFFFF */ +#define CRC_IDR_IDR CRC_IDR_IDR_Msk /*!< General-purpose 32-bit data register bits */ + +/******************** Bit definition for CRC_CR register ********************/ +#define CRC_CR_RESET_Pos (0U) +#define CRC_CR_RESET_Msk (0x1UL << CRC_CR_RESET_Pos) /*!< 0x00000001 */ +#define CRC_CR_RESET CRC_CR_RESET_Msk /*!< RESET the CRC computation unit bit */ +#define CRC_CR_POLYSIZE_Pos (3U) +#define CRC_CR_POLYSIZE_Msk (0x3UL << CRC_CR_POLYSIZE_Pos) /*!< 0x00000018 */ +#define CRC_CR_POLYSIZE CRC_CR_POLYSIZE_Msk /*!< Polynomial size bits */ +#define CRC_CR_POLYSIZE_0 (0x1UL << CRC_CR_POLYSIZE_Pos) /*!< 0x00000008 */ +#define CRC_CR_POLYSIZE_1 (0x2UL << CRC_CR_POLYSIZE_Pos) /*!< 0x00000010 */ +#define CRC_CR_REV_IN_Pos (5U) +#define CRC_CR_REV_IN_Msk (0x3UL << CRC_CR_REV_IN_Pos) /*!< 0x00000060 */ +#define CRC_CR_REV_IN CRC_CR_REV_IN_Msk /*!< REV_IN Reverse Input Data bits */ +#define CRC_CR_REV_IN_0 (0x1UL << CRC_CR_REV_IN_Pos) /*!< 0x00000020 */ +#define CRC_CR_REV_IN_1 (0x2UL << CRC_CR_REV_IN_Pos) /*!< 0x00000040 */ +#define CRC_CR_REV_OUT_Pos (7U) +#define CRC_CR_REV_OUT_Msk (0x1UL << CRC_CR_REV_OUT_Pos) /*!< 0x00000080 */ +#define CRC_CR_REV_OUT CRC_CR_REV_OUT_Msk /*!< REV_OUT Reverse Output Data bits */ + +/******************* Bit definition for CRC_INIT register *******************/ +#define CRC_INIT_INIT_Pos (0U) +#define CRC_INIT_INIT_Msk (0xFFFFFFFFUL << CRC_INIT_INIT_Pos) /*!< 0xFFFFFFFF */ +#define CRC_INIT_INIT CRC_INIT_INIT_Msk /*!< Initial CRC value bits */ + +/******************* Bit definition for CRC_POL register ********************/ +#define CRC_POL_POL_Pos (0U) +#define CRC_POL_POL_Msk (0xFFFFFFFFUL << CRC_POL_POL_Pos) /*!< 0xFFFFFFFF */ +#define CRC_POL_POL CRC_POL_POL_Msk /*!< Coefficients of the polynomial */ + +/******************************************************************************/ +/* */ +/* CRS Clock Recovery System */ +/******************************************************************************/ + +/******************* Bit definition for CRS_CR register *********************/ +#define CRS_CR_SYNCOKIE_Pos (0U) +#define CRS_CR_SYNCOKIE_Msk (0x1UL << CRS_CR_SYNCOKIE_Pos) /*!< 0x00000001 */ +#define CRS_CR_SYNCOKIE CRS_CR_SYNCOKIE_Msk /*!< SYNC event OK interrupt enable */ +#define CRS_CR_SYNCWARNIE_Pos (1U) +#define CRS_CR_SYNCWARNIE_Msk (0x1UL << CRS_CR_SYNCWARNIE_Pos) /*!< 0x00000002 */ +#define CRS_CR_SYNCWARNIE CRS_CR_SYNCWARNIE_Msk /*!< SYNC warning interrupt enable */ +#define CRS_CR_ERRIE_Pos (2U) +#define CRS_CR_ERRIE_Msk (0x1UL << CRS_CR_ERRIE_Pos) /*!< 0x00000004 */ +#define CRS_CR_ERRIE CRS_CR_ERRIE_Msk /*!< SYNC error or trimming error interrupt enable */ +#define CRS_CR_ESYNCIE_Pos (3U) +#define CRS_CR_ESYNCIE_Msk (0x1UL << CRS_CR_ESYNCIE_Pos) /*!< 0x00000008 */ +#define CRS_CR_ESYNCIE CRS_CR_ESYNCIE_Msk /*!< Expected SYNC interrupt enable */ +#define CRS_CR_CEN_Pos (5U) +#define CRS_CR_CEN_Msk (0x1UL << CRS_CR_CEN_Pos) /*!< 0x00000020 */ +#define CRS_CR_CEN CRS_CR_CEN_Msk /*!< Frequency error counter enable */ +#define CRS_CR_AUTOTRIMEN_Pos (6U) +#define CRS_CR_AUTOTRIMEN_Msk (0x1UL << CRS_CR_AUTOTRIMEN_Pos) /*!< 0x00000040 */ +#define CRS_CR_AUTOTRIMEN CRS_CR_AUTOTRIMEN_Msk /*!< Automatic trimming enable */ +#define CRS_CR_SWSYNC_Pos (7U) +#define CRS_CR_SWSYNC_Msk (0x1UL << CRS_CR_SWSYNC_Pos) /*!< 0x00000080 */ +#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */ +#define CRS_CR_TRIM_Pos (8U) +#define CRS_CR_TRIM_Msk (0x7FUL << CRS_CR_TRIM_Pos) /*!< 0x00007F00 */ +#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */ + +/******************* Bit definition for CRS_CFGR register *********************/ +#define CRS_CFGR_RELOAD_Pos (0U) +#define CRS_CFGR_RELOAD_Msk (0xFFFFUL << CRS_CFGR_RELOAD_Pos) /*!< 0x0000FFFF */ +#define CRS_CFGR_RELOAD CRS_CFGR_RELOAD_Msk /*!< Counter reload value */ +#define CRS_CFGR_FELIM_Pos (16U) +#define CRS_CFGR_FELIM_Msk (0xFFUL << CRS_CFGR_FELIM_Pos) /*!< 0x00FF0000 */ +#define CRS_CFGR_FELIM CRS_CFGR_FELIM_Msk /*!< Frequency error limit */ + +#define CRS_CFGR_SYNCDIV_Pos (24U) +#define CRS_CFGR_SYNCDIV_Msk (0x7UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x07000000 */ +#define CRS_CFGR_SYNCDIV CRS_CFGR_SYNCDIV_Msk /*!< SYNC divider */ +#define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ +#define CRS_CFGR_SYNCDIV_1 (0x2UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x02000000 */ +#define CRS_CFGR_SYNCDIV_2 (0x4UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x04000000 */ + +#define CRS_CFGR_SYNCSRC_Pos (28U) +#define CRS_CFGR_SYNCSRC_Msk (0x3UL << CRS_CFGR_SYNCSRC_Pos) /*!< 0x30000000 */ +#define CRS_CFGR_SYNCSRC CRS_CFGR_SYNCSRC_Msk /*!< SYNC signal source selection */ +#define CRS_CFGR_SYNCSRC_0 (0x1UL << CRS_CFGR_SYNCSRC_Pos) /*!< 0x10000000 */ +#define CRS_CFGR_SYNCSRC_1 (0x2UL << CRS_CFGR_SYNCSRC_Pos) /*!< 0x20000000 */ + +#define CRS_CFGR_SYNCPOL_Pos (31U) +#define CRS_CFGR_SYNCPOL_Msk (0x1UL << CRS_CFGR_SYNCPOL_Pos) /*!< 0x80000000 */ +#define CRS_CFGR_SYNCPOL CRS_CFGR_SYNCPOL_Msk /*!< SYNC polarity selection */ + +/******************* Bit definition for CRS_ISR register *********************/ +#define CRS_ISR_SYNCOKF_Pos (0U) +#define CRS_ISR_SYNCOKF_Msk (0x1UL << CRS_ISR_SYNCOKF_Pos) /*!< 0x00000001 */ +#define CRS_ISR_SYNCOKF CRS_ISR_SYNCOKF_Msk /*!< SYNC event OK flag */ +#define CRS_ISR_SYNCWARNF_Pos (1U) +#define CRS_ISR_SYNCWARNF_Msk (0x1UL << CRS_ISR_SYNCWARNF_Pos) /*!< 0x00000002 */ +#define CRS_ISR_SYNCWARNF CRS_ISR_SYNCWARNF_Msk /*!< SYNC warning flag */ +#define CRS_ISR_ERRF_Pos (2U) +#define CRS_ISR_ERRF_Msk (0x1UL << CRS_ISR_ERRF_Pos) /*!< 0x00000004 */ +#define CRS_ISR_ERRF CRS_ISR_ERRF_Msk /*!< Error flag */ +#define CRS_ISR_ESYNCF_Pos (3U) +#define CRS_ISR_ESYNCF_Msk (0x1UL << CRS_ISR_ESYNCF_Pos) /*!< 0x00000008 */ +#define CRS_ISR_ESYNCF CRS_ISR_ESYNCF_Msk /*!< Expected SYNC flag */ +#define CRS_ISR_SYNCERR_Pos (8U) +#define CRS_ISR_SYNCERR_Msk (0x1UL << CRS_ISR_SYNCERR_Pos) /*!< 0x00000100 */ +#define CRS_ISR_SYNCERR CRS_ISR_SYNCERR_Msk /*!< SYNC error */ +#define CRS_ISR_SYNCMISS_Pos (9U) +#define CRS_ISR_SYNCMISS_Msk (0x1UL << CRS_ISR_SYNCMISS_Pos) /*!< 0x00000200 */ +#define CRS_ISR_SYNCMISS CRS_ISR_SYNCMISS_Msk /*!< SYNC missed */ +#define CRS_ISR_TRIMOVF_Pos (10U) +#define CRS_ISR_TRIMOVF_Msk (0x1UL << CRS_ISR_TRIMOVF_Pos) /*!< 0x00000400 */ +#define CRS_ISR_TRIMOVF CRS_ISR_TRIMOVF_Msk /*!< Trimming overflow or underflow */ +#define CRS_ISR_FEDIR_Pos (15U) +#define CRS_ISR_FEDIR_Msk (0x1UL << CRS_ISR_FEDIR_Pos) /*!< 0x00008000 */ +#define CRS_ISR_FEDIR CRS_ISR_FEDIR_Msk /*!< Frequency error direction */ +#define CRS_ISR_FECAP_Pos (16U) +#define CRS_ISR_FECAP_Msk (0xFFFFUL << CRS_ISR_FECAP_Pos) /*!< 0xFFFF0000 */ +#define CRS_ISR_FECAP CRS_ISR_FECAP_Msk /*!< Frequency error capture */ + +/******************* Bit definition for CRS_ICR register *********************/ +#define CRS_ICR_SYNCOKC_Pos (0U) +#define CRS_ICR_SYNCOKC_Msk (0x1UL << CRS_ICR_SYNCOKC_Pos) /*!< 0x00000001 */ +#define CRS_ICR_SYNCOKC CRS_ICR_SYNCOKC_Msk /*!< SYNC event OK clear flag */ +#define CRS_ICR_SYNCWARNC_Pos (1U) +#define CRS_ICR_SYNCWARNC_Msk (0x1UL << CRS_ICR_SYNCWARNC_Pos) /*!< 0x00000002 */ +#define CRS_ICR_SYNCWARNC CRS_ICR_SYNCWARNC_Msk /*!< SYNC warning clear flag */ +#define CRS_ICR_ERRC_Pos (2U) +#define CRS_ICR_ERRC_Msk (0x1UL << CRS_ICR_ERRC_Pos) /*!< 0x00000004 */ +#define CRS_ICR_ERRC CRS_ICR_ERRC_Msk /*!< Error clear flag */ +#define CRS_ICR_ESYNCC_Pos (3U) +#define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */ +#define CRS_ICR_ESYNCC CRS_ICR_ESYNCC_Msk /*!< Expected SYNC clear flag */ + +/******************************************************************************/ +/* */ +/* Digital to Analog Converter */ +/* */ +/******************************************************************************/ +/* + * @brief Specific device feature definitions (not present on all devices in the STM32G4 series) + */ +#define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available */ + +/******************** Bit definition for DAC_CR register ********************/ +#define DAC_CR_EN1_Pos (0U) +#define DAC_CR_EN1_Msk (0x1UL << DAC_CR_EN1_Pos) /*!< 0x00000001 */ +#define DAC_CR_EN1 DAC_CR_EN1_Msk /*!*/ +#define DAC_CR_CEN1_Pos (14U) +#define DAC_CR_CEN1_Msk (0x1UL << DAC_CR_CEN1_Pos) /*!< 0x00004000 */ +#define DAC_CR_CEN1 DAC_CR_CEN1_Msk /*!*/ + +#define DAC_CR_HFSEL_Pos (15U) +#define DAC_CR_HFSEL_Msk (0x1UL << DAC_CR_HFSEL_Pos) /*!< 0x00008000 */ +#define DAC_CR_HFSEL DAC_CR_HFSEL_Msk /*!*/ + +#define DAC_CR_EN2_Pos (16U) +#define DAC_CR_EN2_Msk (0x1UL << DAC_CR_EN2_Pos) /*!< 0x00010000 */ +#define DAC_CR_EN2 DAC_CR_EN2_Msk /*!*/ +#define DAC_CR_CEN2_Pos (30U) +#define DAC_CR_CEN2_Msk (0x1UL << DAC_CR_CEN2_Pos) /*!< 0x40000000 */ +#define DAC_CR_CEN2 DAC_CR_CEN2_Msk /*!*/ + +/***************** Bit definition for DAC_SWTRIGR register ******************/ +#define DAC_SWTRIGR_SWTRIG1_Pos (0U) +#define DAC_SWTRIGR_SWTRIG1_Msk (0x1UL << DAC_SWTRIGR_SWTRIG1_Pos) /*!< 0x00000001 */ +#define DAC_SWTRIGR_SWTRIG1 DAC_SWTRIGR_SWTRIG1_Msk /*! */ + +/******************* Bit definition for HRTIM_CPT2R register ****************/ +#define HRTIM_CPT2R_CPT2R_Pos (0U) +#define HRTIM_CPT2R_CPT2R_Msk (0x0000FFFFUL << HRTIM_CPT2R_CPT2R_Pos) /*!< 0x0000FFFF */ +#define HRTIM_CPT2R_CPT2R HRTIM_CPT2R_CPT2R_Msk /*!< Capture 2 Value */ +#define HRTIM_CPT2R_DIR_Pos (16U) +#define HRTIM_CPT2R_DIR_Msk (0x1UL << HRTIM_CPT2R_DIR_Pos) /*!< 0x00010000 */ +#define HRTIM_CPT2R_DIR HRTIM_CPT2R_DIR_Msk /*!< Capture 2 direction */ + +/******************** Bit definition for Slave Deadtime register **************/ +#define HRTIM_DTR_DTR_Pos (0U) +#define HRTIM_DTR_DTR_Msk (0x1FFUL << HRTIM_DTR_DTR_Pos) /*!< 0x000001FF */ +#define HRTIM_DTR_DTR HRTIM_DTR_DTR_Msk /*!< Dead time rising value */ +#define HRTIM_DTR_DTR_0 (0x001UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000001 */ +#define HRTIM_DTR_DTR_1 (0x002UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000002 */ +#define HRTIM_DTR_DTR_2 (0x004UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000004 */ +#define HRTIM_DTR_DTR_3 (0x008UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000008 */ +#define HRTIM_DTR_DTR_4 (0x010UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000010 */ +#define HRTIM_DTR_DTR_5 (0x020UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000020 */ +#define HRTIM_DTR_DTR_6 (0x040UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000040 */ +#define HRTIM_DTR_DTR_7 (0x080UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000080 */ +#define HRTIM_DTR_DTR_8 (0x100UL << HRTIM_DTR_DTR_Pos) /*!< 0x00000100 */ +#define HRTIM_DTR_SDTR_Pos (9U) +#define HRTIM_DTR_SDTR_Msk (0x1UL << HRTIM_DTR_SDTR_Pos) /*!< 0x00000200 */ +#define HRTIM_DTR_SDTR HRTIM_DTR_SDTR_Msk /*!< Sign dead time rising value */ +#define HRTIM_DTR_DTPRSC_Pos (10U) +#define HRTIM_DTR_DTPRSC_Msk (0x7UL << HRTIM_DTR_DTPRSC_Pos) /*!< 0x00001C00 */ +#define HRTIM_DTR_DTPRSC HRTIM_DTR_DTPRSC_Msk /*!< Dead time prescaler */ +#define HRTIM_DTR_DTPRSC_0 (0x1UL << HRTIM_DTR_DTPRSC_Pos) /*!< 0x00000400 */ +#define HRTIM_DTR_DTPRSC_1 (0x2UL << HRTIM_DTR_DTPRSC_Pos) /*!< 0x00000800 */ +#define HRTIM_DTR_DTPRSC_2 (0x4UL << HRTIM_DTR_DTPRSC_Pos) /*!< 0x00001000 */ +#define HRTIM_DTR_DTRSLK_Pos (14U) +#define HRTIM_DTR_DTRSLK_Msk (0x1UL << HRTIM_DTR_DTRSLK_Pos) /*!< 0x00004000 */ +#define HRTIM_DTR_DTRSLK HRTIM_DTR_DTRSLK_Msk /*!< Dead time rising sign lock */ +#define HRTIM_DTR_DTRLK_Pos (15U) +#define HRTIM_DTR_DTRLK_Msk (0x1UL << HRTIM_DTR_DTRLK_Pos) /*!< 0x00008000 */ +#define HRTIM_DTR_DTRLK HRTIM_DTR_DTRLK_Msk /*!< Dead time rising lock */ +#define HRTIM_DTR_DTF_Pos (16U) +#define HRTIM_DTR_DTF_Msk (0x1FFUL << HRTIM_DTR_DTF_Pos) /*!< 0x01FF0000 */ +#define HRTIM_DTR_DTF HRTIM_DTR_DTF_Msk /*!< Dead time falling value */ +#define HRTIM_DTR_DTF_0 (0x001UL << HRTIM_DTR_DTF_Pos) /*!< 0x00010000 */ +#define HRTIM_DTR_DTF_1 (0x002UL << HRTIM_DTR_DTF_Pos) /*!< 0x00020000 */ +#define HRTIM_DTR_DTF_2 (0x004UL << HRTIM_DTR_DTF_Pos) /*!< 0x00040000 */ +#define HRTIM_DTR_DTF_3 (0x008UL << HRTIM_DTR_DTF_Pos) /*!< 0x00080000 */ +#define HRTIM_DTR_DTF_4 (0x010UL << HRTIM_DTR_DTF_Pos) /*!< 0x00100000 */ +#define HRTIM_DTR_DTF_5 (0x020UL << HRTIM_DTR_DTF_Pos) /*!< 0x00200000 */ +#define HRTIM_DTR_DTF_6 (0x040UL << HRTIM_DTR_DTF_Pos) /*!< 0x00400000 */ +#define HRTIM_DTR_DTF_7 (0x080UL << HRTIM_DTR_DTF_Pos) /*!< 0x00800000 */ +#define HRTIM_DTR_DTF_8 (0x100UL << HRTIM_DTR_DTF_Pos) /*!< 0x01000000 */ +#define HRTIM_DTR_SDTF_Pos (25U) +#define HRTIM_DTR_SDTF_Msk (0x1UL << HRTIM_DTR_SDTF_Pos) /*!< 0x02000000 */ +#define HRTIM_DTR_SDTF HRTIM_DTR_SDTF_Msk /*!< Sign dead time falling value */ +#define HRTIM_DTR_DTFSLK_Pos (30U) +#define HRTIM_DTR_DTFSLK_Msk (0x1UL << HRTIM_DTR_DTFSLK_Pos) /*!< 0x40000000 */ +#define HRTIM_DTR_DTFSLK HRTIM_DTR_DTFSLK_Msk /*!< Dead time falling sign lock */ +#define HRTIM_DTR_DTFLK_Pos (31U) +#define HRTIM_DTR_DTFLK_Msk (0x1UL << HRTIM_DTR_DTFLK_Pos) /*!< 0x80000000 */ +#define HRTIM_DTR_DTFLK HRTIM_DTR_DTFLK_Msk /*!< Dead time falling lock */ + +/**** Bit definition for Slave Output 1 set register **************************/ +#define HRTIM_SET1R_SST_Pos (0U) +#define HRTIM_SET1R_SST_Msk (0x1UL << HRTIM_SET1R_SST_Pos) /*!< 0x00000001 */ +#define HRTIM_SET1R_SST HRTIM_SET1R_SST_Msk /*!< software set trigger */ +#define HRTIM_SET1R_RESYNC_Pos (1U) +#define HRTIM_SET1R_RESYNC_Msk (0x1UL << HRTIM_SET1R_RESYNC_Pos) /*!< 0x00000002 */ +#define HRTIM_SET1R_RESYNC HRTIM_SET1R_RESYNC_Msk /*!< Timer A resynchronization */ +#define HRTIM_SET1R_PER_Pos (2U) +#define HRTIM_SET1R_PER_Msk (0x1UL << HRTIM_SET1R_PER_Pos) /*!< 0x00000004 */ +#define HRTIM_SET1R_PER HRTIM_SET1R_PER_Msk /*!< Timer A period */ +#define HRTIM_SET1R_CMP1_Pos (3U) +#define HRTIM_SET1R_CMP1_Msk (0x1UL << HRTIM_SET1R_CMP1_Pos) /*!< 0x00000008 */ +#define HRTIM_SET1R_CMP1 HRTIM_SET1R_CMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_SET1R_CMP2_Pos (4U) +#define HRTIM_SET1R_CMP2_Msk (0x1UL << HRTIM_SET1R_CMP2_Pos) /*!< 0x00000010 */ +#define HRTIM_SET1R_CMP2 HRTIM_SET1R_CMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_SET1R_CMP3_Pos (5U) +#define HRTIM_SET1R_CMP3_Msk (0x1UL << HRTIM_SET1R_CMP3_Pos) /*!< 0x00000020 */ +#define HRTIM_SET1R_CMP3 HRTIM_SET1R_CMP3_Msk /*!< Timer A compare 3 */ +#define HRTIM_SET1R_CMP4_Pos (6U) +#define HRTIM_SET1R_CMP4_Msk (0x1UL << HRTIM_SET1R_CMP4_Pos) /*!< 0x00000040 */ +#define HRTIM_SET1R_CMP4 HRTIM_SET1R_CMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_SET1R_MSTPER_Pos (7U) +#define HRTIM_SET1R_MSTPER_Msk (0x1UL << HRTIM_SET1R_MSTPER_Pos) /*!< 0x00000080 */ +#define HRTIM_SET1R_MSTPER HRTIM_SET1R_MSTPER_Msk /*!< Master period */ +#define HRTIM_SET1R_MSTCMP1_Pos (8U) +#define HRTIM_SET1R_MSTCMP1_Msk (0x1UL << HRTIM_SET1R_MSTCMP1_Pos) /*!< 0x00000100 */ +#define HRTIM_SET1R_MSTCMP1 HRTIM_SET1R_MSTCMP1_Msk /*!< Master compare 1 */ +#define HRTIM_SET1R_MSTCMP2_Pos (9U) +#define HRTIM_SET1R_MSTCMP2_Msk (0x1UL << HRTIM_SET1R_MSTCMP2_Pos) /*!< 0x00000200 */ +#define HRTIM_SET1R_MSTCMP2 HRTIM_SET1R_MSTCMP2_Msk /*!< Master compare 2 */ +#define HRTIM_SET1R_MSTCMP3_Pos (10U) +#define HRTIM_SET1R_MSTCMP3_Msk (0x1UL << HRTIM_SET1R_MSTCMP3_Pos) /*!< 0x00000400 */ +#define HRTIM_SET1R_MSTCMP3 HRTIM_SET1R_MSTCMP3_Msk /*!< Master compare 3 */ +#define HRTIM_SET1R_MSTCMP4_Pos (11U) +#define HRTIM_SET1R_MSTCMP4_Msk (0x1UL << HRTIM_SET1R_MSTCMP4_Pos) /*!< 0x00000800 */ +#define HRTIM_SET1R_MSTCMP4 HRTIM_SET1R_MSTCMP4_Msk /*!< Master compare 4 */ + +#define HRTIM_SET1R_TIMEVNT1_Pos (12U) +#define HRTIM_SET1R_TIMEVNT1_Msk (0x1UL << HRTIM_SET1R_TIMEVNT1_Pos) /*!< 0x00001000 */ +#define HRTIM_SET1R_TIMEVNT1 HRTIM_SET1R_TIMEVNT1_Msk /*!< Timer event 1 */ +#define HRTIM_SET1R_TIMEVNT2_Pos (13U) +#define HRTIM_SET1R_TIMEVNT2_Msk (0x1UL << HRTIM_SET1R_TIMEVNT2_Pos) /*!< 0x00002000 */ +#define HRTIM_SET1R_TIMEVNT2 HRTIM_SET1R_TIMEVNT2_Msk /*!< Timer event 2 */ +#define HRTIM_SET1R_TIMEVNT3_Pos (14U) +#define HRTIM_SET1R_TIMEVNT3_Msk (0x1UL << HRTIM_SET1R_TIMEVNT3_Pos) /*!< 0x00004000 */ +#define HRTIM_SET1R_TIMEVNT3 HRTIM_SET1R_TIMEVNT3_Msk /*!< Timer event 3 */ +#define HRTIM_SET1R_TIMEVNT4_Pos (15U) +#define HRTIM_SET1R_TIMEVNT4_Msk (0x1UL << HRTIM_SET1R_TIMEVNT4_Pos) /*!< 0x00008000 */ +#define HRTIM_SET1R_TIMEVNT4 HRTIM_SET1R_TIMEVNT4_Msk /*!< Timer event 4 */ +#define HRTIM_SET1R_TIMEVNT5_Pos (16U) +#define HRTIM_SET1R_TIMEVNT5_Msk (0x1UL << HRTIM_SET1R_TIMEVNT5_Pos) /*!< 0x00010000 */ +#define HRTIM_SET1R_TIMEVNT5 HRTIM_SET1R_TIMEVNT5_Msk /*!< Timer event 5 */ +#define HRTIM_SET1R_TIMEVNT6_Pos (17U) +#define HRTIM_SET1R_TIMEVNT6_Msk (0x1UL << HRTIM_SET1R_TIMEVNT6_Pos) /*!< 0x00020000 */ +#define HRTIM_SET1R_TIMEVNT6 HRTIM_SET1R_TIMEVNT6_Msk /*!< Timer event 6 */ +#define HRTIM_SET1R_TIMEVNT7_Pos (18U) +#define HRTIM_SET1R_TIMEVNT7_Msk (0x1UL << HRTIM_SET1R_TIMEVNT7_Pos) /*!< 0x00040000 */ +#define HRTIM_SET1R_TIMEVNT7 HRTIM_SET1R_TIMEVNT7_Msk /*!< Timer event 7 */ +#define HRTIM_SET1R_TIMEVNT8_Pos (19U) +#define HRTIM_SET1R_TIMEVNT8_Msk (0x1UL << HRTIM_SET1R_TIMEVNT8_Pos) /*!< 0x00080000 */ +#define HRTIM_SET1R_TIMEVNT8 HRTIM_SET1R_TIMEVNT8_Msk /*!< Timer event 8 */ +#define HRTIM_SET1R_TIMEVNT9_Pos (20U) +#define HRTIM_SET1R_TIMEVNT9_Msk (0x1UL << HRTIM_SET1R_TIMEVNT9_Pos) /*!< 0x00100000 */ +#define HRTIM_SET1R_TIMEVNT9 HRTIM_SET1R_TIMEVNT9_Msk /*!< Timer event 9 */ + +#define HRTIM_SET1R_EXTVNT1_Pos (21U) +#define HRTIM_SET1R_EXTVNT1_Msk (0x1UL << HRTIM_SET1R_EXTVNT1_Pos) /*!< 0x00200000 */ +#define HRTIM_SET1R_EXTVNT1 HRTIM_SET1R_EXTVNT1_Msk /*!< External event 1 */ +#define HRTIM_SET1R_EXTVNT2_Pos (22U) +#define HRTIM_SET1R_EXTVNT2_Msk (0x1UL << HRTIM_SET1R_EXTVNT2_Pos) /*!< 0x00400000 */ +#define HRTIM_SET1R_EXTVNT2 HRTIM_SET1R_EXTVNT2_Msk /*!< External event 2 */ +#define HRTIM_SET1R_EXTVNT3_Pos (23U) +#define HRTIM_SET1R_EXTVNT3_Msk (0x1UL << HRTIM_SET1R_EXTVNT3_Pos) /*!< 0x00800000 */ +#define HRTIM_SET1R_EXTVNT3 HRTIM_SET1R_EXTVNT3_Msk /*!< External event 3 */ +#define HRTIM_SET1R_EXTVNT4_Pos (24U) +#define HRTIM_SET1R_EXTVNT4_Msk (0x1UL << HRTIM_SET1R_EXTVNT4_Pos) /*!< 0x01000000 */ +#define HRTIM_SET1R_EXTVNT4 HRTIM_SET1R_EXTVNT4_Msk /*!< External event 4 */ +#define HRTIM_SET1R_EXTVNT5_Pos (25U) +#define HRTIM_SET1R_EXTVNT5_Msk (0x1UL << HRTIM_SET1R_EXTVNT5_Pos) /*!< 0x02000000 */ +#define HRTIM_SET1R_EXTVNT5 HRTIM_SET1R_EXTVNT5_Msk /*!< External event 5 */ +#define HRTIM_SET1R_EXTVNT6_Pos (26U) +#define HRTIM_SET1R_EXTVNT6_Msk (0x1UL << HRTIM_SET1R_EXTVNT6_Pos) /*!< 0x04000000 */ +#define HRTIM_SET1R_EXTVNT6 HRTIM_SET1R_EXTVNT6_Msk /*!< External event 6 */ +#define HRTIM_SET1R_EXTVNT7_Pos (27U) +#define HRTIM_SET1R_EXTVNT7_Msk (0x1UL << HRTIM_SET1R_EXTVNT7_Pos) /*!< 0x08000000 */ +#define HRTIM_SET1R_EXTVNT7 HRTIM_SET1R_EXTVNT7_Msk /*!< External event 7 */ +#define HRTIM_SET1R_EXTVNT8_Pos (28U) +#define HRTIM_SET1R_EXTVNT8_Msk (0x1UL << HRTIM_SET1R_EXTVNT8_Pos) /*!< 0x10000000 */ +#define HRTIM_SET1R_EXTVNT8 HRTIM_SET1R_EXTVNT8_Msk /*!< External event 8 */ +#define HRTIM_SET1R_EXTVNT9_Pos (29U) +#define HRTIM_SET1R_EXTVNT9_Msk (0x1UL << HRTIM_SET1R_EXTVNT9_Pos) /*!< 0x20000000 */ +#define HRTIM_SET1R_EXTVNT9 HRTIM_SET1R_EXTVNT9_Msk /*!< External event 9 */ +#define HRTIM_SET1R_EXTVNT10_Pos (30U) +#define HRTIM_SET1R_EXTVNT10_Msk (0x1UL << HRTIM_SET1R_EXTVNT10_Pos) /*!< 0x40000000 */ +#define HRTIM_SET1R_EXTVNT10 HRTIM_SET1R_EXTVNT10_Msk /*!< External event 10 */ + +#define HRTIM_SET1R_UPDATE_Pos (31U) +#define HRTIM_SET1R_UPDATE_Msk (0x1UL << HRTIM_SET1R_UPDATE_Pos) /*!< 0x80000000 */ +#define HRTIM_SET1R_UPDATE HRTIM_SET1R_UPDATE_Msk /*!< Register update (transfer preload to active) */ + +/**** Bit definition for Slave Output 1 reset register ************************/ +#define HRTIM_RST1R_SRT_Pos (0U) +#define HRTIM_RST1R_SRT_Msk (0x1UL << HRTIM_RST1R_SRT_Pos) /*!< 0x00000001 */ +#define HRTIM_RST1R_SRT HRTIM_RST1R_SRT_Msk /*!< software reset trigger */ +#define HRTIM_RST1R_RESYNC_Pos (1U) +#define HRTIM_RST1R_RESYNC_Msk (0x1UL << HRTIM_RST1R_RESYNC_Pos) /*!< 0x00000002 */ +#define HRTIM_RST1R_RESYNC HRTIM_RST1R_RESYNC_Msk /*!< Timer A resynchronization */ +#define HRTIM_RST1R_PER_Pos (2U) +#define HRTIM_RST1R_PER_Msk (0x1UL << HRTIM_RST1R_PER_Pos) /*!< 0x00000004 */ +#define HRTIM_RST1R_PER HRTIM_RST1R_PER_Msk /*!< Timer A period */ +#define HRTIM_RST1R_CMP1_Pos (3U) +#define HRTIM_RST1R_CMP1_Msk (0x1UL << HRTIM_RST1R_CMP1_Pos) /*!< 0x00000008 */ +#define HRTIM_RST1R_CMP1 HRTIM_RST1R_CMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RST1R_CMP2_Pos (4U) +#define HRTIM_RST1R_CMP2_Msk (0x1UL << HRTIM_RST1R_CMP2_Pos) /*!< 0x00000010 */ +#define HRTIM_RST1R_CMP2 HRTIM_RST1R_CMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RST1R_CMP3_Pos (5U) +#define HRTIM_RST1R_CMP3_Msk (0x1UL << HRTIM_RST1R_CMP3_Pos) /*!< 0x00000020 */ +#define HRTIM_RST1R_CMP3 HRTIM_RST1R_CMP3_Msk /*!< Timer A compare 3 */ +#define HRTIM_RST1R_CMP4_Pos (6U) +#define HRTIM_RST1R_CMP4_Msk (0x1UL << HRTIM_RST1R_CMP4_Pos) /*!< 0x00000040 */ +#define HRTIM_RST1R_CMP4 HRTIM_RST1R_CMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RST1R_MSTPER_Pos (7U) +#define HRTIM_RST1R_MSTPER_Msk (0x1UL << HRTIM_RST1R_MSTPER_Pos) /*!< 0x00000080 */ +#define HRTIM_RST1R_MSTPER HRTIM_RST1R_MSTPER_Msk /*!< Master period */ +#define HRTIM_RST1R_MSTCMP1_Pos (8U) +#define HRTIM_RST1R_MSTCMP1_Msk (0x1UL << HRTIM_RST1R_MSTCMP1_Pos) /*!< 0x00000100 */ +#define HRTIM_RST1R_MSTCMP1 HRTIM_RST1R_MSTCMP1_Msk /*!< Master compare 1 */ +#define HRTIM_RST1R_MSTCMP2_Pos (9U) +#define HRTIM_RST1R_MSTCMP2_Msk (0x1UL << HRTIM_RST1R_MSTCMP2_Pos) /*!< 0x00000200 */ +#define HRTIM_RST1R_MSTCMP2 HRTIM_RST1R_MSTCMP2_Msk /*!< Master compare 2 */ +#define HRTIM_RST1R_MSTCMP3_Pos (10U) +#define HRTIM_RST1R_MSTCMP3_Msk (0x1UL << HRTIM_RST1R_MSTCMP3_Pos) /*!< 0x00000400 */ +#define HRTIM_RST1R_MSTCMP3 HRTIM_RST1R_MSTCMP3_Msk /*!< Master compare 3 */ +#define HRTIM_RST1R_MSTCMP4_Pos (11U) +#define HRTIM_RST1R_MSTCMP4_Msk (0x1UL << HRTIM_RST1R_MSTCMP4_Pos) /*!< 0x00000800 */ +#define HRTIM_RST1R_MSTCMP4 HRTIM_RST1R_MSTCMP4_Msk /*!< Master compare 4 */ + +#define HRTIM_RST1R_TIMEVNT1_Pos (12U) +#define HRTIM_RST1R_TIMEVNT1_Msk (0x1UL << HRTIM_RST1R_TIMEVNT1_Pos) /*!< 0x00001000 */ +#define HRTIM_RST1R_TIMEVNT1 HRTIM_RST1R_TIMEVNT1_Msk /*!< Timer event 1 */ +#define HRTIM_RST1R_TIMEVNT2_Pos (13U) +#define HRTIM_RST1R_TIMEVNT2_Msk (0x1UL << HRTIM_RST1R_TIMEVNT2_Pos) /*!< 0x00002000 */ +#define HRTIM_RST1R_TIMEVNT2 HRTIM_RST1R_TIMEVNT2_Msk /*!< Timer event 2 */ +#define HRTIM_RST1R_TIMEVNT3_Pos (14U) +#define HRTIM_RST1R_TIMEVNT3_Msk (0x1UL << HRTIM_RST1R_TIMEVNT3_Pos) /*!< 0x00004000 */ +#define HRTIM_RST1R_TIMEVNT3 HRTIM_RST1R_TIMEVNT3_Msk /*!< Timer event 3 */ +#define HRTIM_RST1R_TIMEVNT4_Pos (15U) +#define HRTIM_RST1R_TIMEVNT4_Msk (0x1UL << HRTIM_RST1R_TIMEVNT4_Pos) /*!< 0x00008000 */ +#define HRTIM_RST1R_TIMEVNT4 HRTIM_RST1R_TIMEVNT4_Msk /*!< Timer event 4 */ +#define HRTIM_RST1R_TIMEVNT5_Pos (16U) +#define HRTIM_RST1R_TIMEVNT5_Msk (0x1UL << HRTIM_RST1R_TIMEVNT5_Pos) /*!< 0x00010000 */ +#define HRTIM_RST1R_TIMEVNT5 HRTIM_RST1R_TIMEVNT5_Msk /*!< Timer event 5 */ +#define HRTIM_RST1R_TIMEVNT6_Pos (17U) +#define HRTIM_RST1R_TIMEVNT6_Msk (0x1UL << HRTIM_RST1R_TIMEVNT6_Pos) /*!< 0x00020000 */ +#define HRTIM_RST1R_TIMEVNT6 HRTIM_RST1R_TIMEVNT6_Msk /*!< Timer event 6 */ +#define HRTIM_RST1R_TIMEVNT7_Pos (18U) +#define HRTIM_RST1R_TIMEVNT7_Msk (0x1UL << HRTIM_RST1R_TIMEVNT7_Pos) /*!< 0x00040000 */ +#define HRTIM_RST1R_TIMEVNT7 HRTIM_RST1R_TIMEVNT7_Msk /*!< Timer event 7 */ +#define HRTIM_RST1R_TIMEVNT8_Pos (19U) +#define HRTIM_RST1R_TIMEVNT8_Msk (0x1UL << HRTIM_RST1R_TIMEVNT8_Pos) /*!< 0x00080000 */ +#define HRTIM_RST1R_TIMEVNT8 HRTIM_RST1R_TIMEVNT8_Msk /*!< Timer event 8 */ +#define HRTIM_RST1R_TIMEVNT9_Pos (20U) +#define HRTIM_RST1R_TIMEVNT9_Msk (0x1UL << HRTIM_RST1R_TIMEVNT9_Pos) /*!< 0x00100000 */ +#define HRTIM_RST1R_TIMEVNT9 HRTIM_RST1R_TIMEVNT9_Msk /*!< Timer event 9 */ + +#define HRTIM_RST1R_EXTVNT1_Pos (21U) +#define HRTIM_RST1R_EXTVNT1_Msk (0x1UL << HRTIM_RST1R_EXTVNT1_Pos) /*!< 0x00200000 */ +#define HRTIM_RST1R_EXTVNT1 HRTIM_RST1R_EXTVNT1_Msk /*!< External event 1 */ +#define HRTIM_RST1R_EXTVNT2_Pos (22U) +#define HRTIM_RST1R_EXTVNT2_Msk (0x1UL << HRTIM_RST1R_EXTVNT2_Pos) /*!< 0x00400000 */ +#define HRTIM_RST1R_EXTVNT2 HRTIM_RST1R_EXTVNT2_Msk /*!< External event 2 */ +#define HRTIM_RST1R_EXTVNT3_Pos (23U) +#define HRTIM_RST1R_EXTVNT3_Msk (0x1UL << HRTIM_RST1R_EXTVNT3_Pos) /*!< 0x00800000 */ +#define HRTIM_RST1R_EXTVNT3 HRTIM_RST1R_EXTVNT3_Msk /*!< External event 3 */ +#define HRTIM_RST1R_EXTVNT4_Pos (24U) +#define HRTIM_RST1R_EXTVNT4_Msk (0x1UL << HRTIM_RST1R_EXTVNT4_Pos) /*!< 0x01000000 */ +#define HRTIM_RST1R_EXTVNT4 HRTIM_RST1R_EXTVNT4_Msk /*!< External event 4 */ +#define HRTIM_RST1R_EXTVNT5_Pos (25U) +#define HRTIM_RST1R_EXTVNT5_Msk (0x1UL << HRTIM_RST1R_EXTVNT5_Pos) /*!< 0x02000000 */ +#define HRTIM_RST1R_EXTVNT5 HRTIM_RST1R_EXTVNT5_Msk /*!< External event 5 */ +#define HRTIM_RST1R_EXTVNT6_Pos (26U) +#define HRTIM_RST1R_EXTVNT6_Msk (0x1UL << HRTIM_RST1R_EXTVNT6_Pos) /*!< 0x04000000 */ +#define HRTIM_RST1R_EXTVNT6 HRTIM_RST1R_EXTVNT6_Msk /*!< External event 6 */ +#define HRTIM_RST1R_EXTVNT7_Pos (27U) +#define HRTIM_RST1R_EXTVNT7_Msk (0x1UL << HRTIM_RST1R_EXTVNT7_Pos) /*!< 0x08000000 */ +#define HRTIM_RST1R_EXTVNT7 HRTIM_RST1R_EXTVNT7_Msk /*!< External event 7 */ +#define HRTIM_RST1R_EXTVNT8_Pos (28U) +#define HRTIM_RST1R_EXTVNT8_Msk (0x1UL << HRTIM_RST1R_EXTVNT8_Pos) /*!< 0x10000000 */ +#define HRTIM_RST1R_EXTVNT8 HRTIM_RST1R_EXTVNT8_Msk /*!< External event 8 */ +#define HRTIM_RST1R_EXTVNT9_Pos (29U) +#define HRTIM_RST1R_EXTVNT9_Msk (0x1UL << HRTIM_RST1R_EXTVNT9_Pos) /*!< 0x20000000 */ +#define HRTIM_RST1R_EXTVNT9 HRTIM_RST1R_EXTVNT9_Msk /*!< External event 9 */ +#define HRTIM_RST1R_EXTVNT10_Pos (30U) +#define HRTIM_RST1R_EXTVNT10_Msk (0x1UL << HRTIM_RST1R_EXTVNT10_Pos) /*!< 0x40000000 */ +#define HRTIM_RST1R_EXTVNT10 HRTIM_RST1R_EXTVNT10_Msk /*!< External event 10 */ +#define HRTIM_RST1R_UPDATE_Pos (31U) +#define HRTIM_RST1R_UPDATE_Msk (0x1UL << HRTIM_RST1R_UPDATE_Pos) /*!< 0x80000000 */ +#define HRTIM_RST1R_UPDATE HRTIM_RST1R_UPDATE_Msk /*!< Register update (transfer preload to active) */ + +/**** Bit definition for Slave Output 2 set register **************************/ +#define HRTIM_SET2R_SST_Pos (0U) +#define HRTIM_SET2R_SST_Msk (0x1UL << HRTIM_SET2R_SST_Pos) /*!< 0x00000001 */ +#define HRTIM_SET2R_SST HRTIM_SET2R_SST_Msk /*!< software set trigger */ +#define HRTIM_SET2R_RESYNC_Pos (1U) +#define HRTIM_SET2R_RESYNC_Msk (0x1UL << HRTIM_SET2R_RESYNC_Pos) /*!< 0x00000002 */ +#define HRTIM_SET2R_RESYNC HRTIM_SET2R_RESYNC_Msk /*!< Timer A resynchronization */ +#define HRTIM_SET2R_PER_Pos (2U) +#define HRTIM_SET2R_PER_Msk (0x1UL << HRTIM_SET2R_PER_Pos) /*!< 0x00000004 */ +#define HRTIM_SET2R_PER HRTIM_SET2R_PER_Msk /*!< Timer A period */ +#define HRTIM_SET2R_CMP1_Pos (3U) +#define HRTIM_SET2R_CMP1_Msk (0x1UL << HRTIM_SET2R_CMP1_Pos) /*!< 0x00000008 */ +#define HRTIM_SET2R_CMP1 HRTIM_SET2R_CMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_SET2R_CMP2_Pos (4U) +#define HRTIM_SET2R_CMP2_Msk (0x1UL << HRTIM_SET2R_CMP2_Pos) /*!< 0x00000010 */ +#define HRTIM_SET2R_CMP2 HRTIM_SET2R_CMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_SET2R_CMP3_Pos (5U) +#define HRTIM_SET2R_CMP3_Msk (0x1UL << HRTIM_SET2R_CMP3_Pos) /*!< 0x00000020 */ +#define HRTIM_SET2R_CMP3 HRTIM_SET2R_CMP3_Msk /*!< Timer A compare 3 */ +#define HRTIM_SET2R_CMP4_Pos (6U) +#define HRTIM_SET2R_CMP4_Msk (0x1UL << HRTIM_SET2R_CMP4_Pos) /*!< 0x00000040 */ +#define HRTIM_SET2R_CMP4 HRTIM_SET2R_CMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_SET2R_MSTPER_Pos (7U) +#define HRTIM_SET2R_MSTPER_Msk (0x1UL << HRTIM_SET2R_MSTPER_Pos) /*!< 0x00000080 */ +#define HRTIM_SET2R_MSTPER HRTIM_SET2R_MSTPER_Msk /*!< Master period */ +#define HRTIM_SET2R_MSTCMP1_Pos (8U) +#define HRTIM_SET2R_MSTCMP1_Msk (0x1UL << HRTIM_SET2R_MSTCMP1_Pos) /*!< 0x00000100 */ +#define HRTIM_SET2R_MSTCMP1 HRTIM_SET2R_MSTCMP1_Msk /*!< Master compare 1 */ +#define HRTIM_SET2R_MSTCMP2_Pos (9U) +#define HRTIM_SET2R_MSTCMP2_Msk (0x1UL << HRTIM_SET2R_MSTCMP2_Pos) /*!< 0x00000200 */ +#define HRTIM_SET2R_MSTCMP2 HRTIM_SET2R_MSTCMP2_Msk /*!< Master compare 2 */ +#define HRTIM_SET2R_MSTCMP3_Pos (10U) +#define HRTIM_SET2R_MSTCMP3_Msk (0x1UL << HRTIM_SET2R_MSTCMP3_Pos) /*!< 0x00000400 */ +#define HRTIM_SET2R_MSTCMP3 HRTIM_SET2R_MSTCMP3_Msk /*!< Master compare 3 */ +#define HRTIM_SET2R_MSTCMP4_Pos (11U) +#define HRTIM_SET2R_MSTCMP4_Msk (0x1UL << HRTIM_SET2R_MSTCMP4_Pos) /*!< 0x00000800 */ +#define HRTIM_SET2R_MSTCMP4 HRTIM_SET2R_MSTCMP4_Msk /*!< Master compare 4 */ + +#define HRTIM_SET2R_TIMEVNT1_Pos (12U) +#define HRTIM_SET2R_TIMEVNT1_Msk (0x1UL << HRTIM_SET2R_TIMEVNT1_Pos) /*!< 0x00001000 */ +#define HRTIM_SET2R_TIMEVNT1 HRTIM_SET2R_TIMEVNT1_Msk /*!< Timer event 1 */ +#define HRTIM_SET2R_TIMEVNT2_Pos (13U) +#define HRTIM_SET2R_TIMEVNT2_Msk (0x1UL << HRTIM_SET2R_TIMEVNT2_Pos) /*!< 0x00002000 */ +#define HRTIM_SET2R_TIMEVNT2 HRTIM_SET2R_TIMEVNT2_Msk /*!< Timer event 2 */ +#define HRTIM_SET2R_TIMEVNT3_Pos (14U) +#define HRTIM_SET2R_TIMEVNT3_Msk (0x1UL << HRTIM_SET2R_TIMEVNT3_Pos) /*!< 0x00004000 */ +#define HRTIM_SET2R_TIMEVNT3 HRTIM_SET2R_TIMEVNT3_Msk /*!< Timer event 3 */ +#define HRTIM_SET2R_TIMEVNT4_Pos (15U) +#define HRTIM_SET2R_TIMEVNT4_Msk (0x1UL << HRTIM_SET2R_TIMEVNT4_Pos) /*!< 0x00008000 */ +#define HRTIM_SET2R_TIMEVNT4 HRTIM_SET2R_TIMEVNT4_Msk /*!< Timer event 4 */ +#define HRTIM_SET2R_TIMEVNT5_Pos (16U) +#define HRTIM_SET2R_TIMEVNT5_Msk (0x1UL << HRTIM_SET2R_TIMEVNT5_Pos) /*!< 0x00010000 */ +#define HRTIM_SET2R_TIMEVNT5 HRTIM_SET2R_TIMEVNT5_Msk /*!< Timer event 5 */ +#define HRTIM_SET2R_TIMEVNT6_Pos (17U) +#define HRTIM_SET2R_TIMEVNT6_Msk (0x1UL << HRTIM_SET2R_TIMEVNT6_Pos) /*!< 0x00020000 */ +#define HRTIM_SET2R_TIMEVNT6 HRTIM_SET2R_TIMEVNT6_Msk /*!< Timer event 6 */ +#define HRTIM_SET2R_TIMEVNT7_Pos (18U) +#define HRTIM_SET2R_TIMEVNT7_Msk (0x1UL << HRTIM_SET2R_TIMEVNT7_Pos) /*!< 0x00040000 */ +#define HRTIM_SET2R_TIMEVNT7 HRTIM_SET2R_TIMEVNT7_Msk /*!< Timer event 7 */ +#define HRTIM_SET2R_TIMEVNT8_Pos (19U) +#define HRTIM_SET2R_TIMEVNT8_Msk (0x1UL << HRTIM_SET2R_TIMEVNT8_Pos) /*!< 0x00080000 */ +#define HRTIM_SET2R_TIMEVNT8 HRTIM_SET2R_TIMEVNT8_Msk /*!< Timer event 8 */ +#define HRTIM_SET2R_TIMEVNT9_Pos (20U) +#define HRTIM_SET2R_TIMEVNT9_Msk (0x1UL << HRTIM_SET2R_TIMEVNT9_Pos) /*!< 0x00100000 */ +#define HRTIM_SET2R_TIMEVNT9 HRTIM_SET2R_TIMEVNT9_Msk /*!< Timer event 9 */ + +#define HRTIM_SET2R_EXTVNT1_Pos (21U) +#define HRTIM_SET2R_EXTVNT1_Msk (0x1UL << HRTIM_SET2R_EXTVNT1_Pos) /*!< 0x00200000 */ +#define HRTIM_SET2R_EXTVNT1 HRTIM_SET2R_EXTVNT1_Msk /*!< External event 1 */ +#define HRTIM_SET2R_EXTVNT2_Pos (22U) +#define HRTIM_SET2R_EXTVNT2_Msk (0x1UL << HRTIM_SET2R_EXTVNT2_Pos) /*!< 0x00400000 */ +#define HRTIM_SET2R_EXTVNT2 HRTIM_SET2R_EXTVNT2_Msk /*!< External event 2 */ +#define HRTIM_SET2R_EXTVNT3_Pos (23U) +#define HRTIM_SET2R_EXTVNT3_Msk (0x1UL << HRTIM_SET2R_EXTVNT3_Pos) /*!< 0x00800000 */ +#define HRTIM_SET2R_EXTVNT3 HRTIM_SET2R_EXTVNT3_Msk /*!< External event 3 */ +#define HRTIM_SET2R_EXTVNT4_Pos (24U) +#define HRTIM_SET2R_EXTVNT4_Msk (0x1UL << HRTIM_SET2R_EXTVNT4_Pos) /*!< 0x01000000 */ +#define HRTIM_SET2R_EXTVNT4 HRTIM_SET2R_EXTVNT4_Msk /*!< External event 4 */ +#define HRTIM_SET2R_EXTVNT5_Pos (25U) +#define HRTIM_SET2R_EXTVNT5_Msk (0x1UL << HRTIM_SET2R_EXTVNT5_Pos) /*!< 0x02000000 */ +#define HRTIM_SET2R_EXTVNT5 HRTIM_SET2R_EXTVNT5_Msk /*!< External event 5 */ +#define HRTIM_SET2R_EXTVNT6_Pos (26U) +#define HRTIM_SET2R_EXTVNT6_Msk (0x1UL << HRTIM_SET2R_EXTVNT6_Pos) /*!< 0x04000000 */ +#define HRTIM_SET2R_EXTVNT6 HRTIM_SET2R_EXTVNT6_Msk /*!< External event 6 */ +#define HRTIM_SET2R_EXTVNT7_Pos (27U) +#define HRTIM_SET2R_EXTVNT7_Msk (0x1UL << HRTIM_SET2R_EXTVNT7_Pos) /*!< 0x08000000 */ +#define HRTIM_SET2R_EXTVNT7 HRTIM_SET2R_EXTVNT7_Msk /*!< External event 7 */ +#define HRTIM_SET2R_EXTVNT8_Pos (28U) +#define HRTIM_SET2R_EXTVNT8_Msk (0x1UL << HRTIM_SET2R_EXTVNT8_Pos) /*!< 0x10000000 */ +#define HRTIM_SET2R_EXTVNT8 HRTIM_SET2R_EXTVNT8_Msk /*!< External event 8 */ +#define HRTIM_SET2R_EXTVNT9_Pos (29U) +#define HRTIM_SET2R_EXTVNT9_Msk (0x1UL << HRTIM_SET2R_EXTVNT9_Pos) /*!< 0x20000000 */ +#define HRTIM_SET2R_EXTVNT9 HRTIM_SET2R_EXTVNT9_Msk /*!< External event 9 */ +#define HRTIM_SET2R_EXTVNT10_Pos (30U) +#define HRTIM_SET2R_EXTVNT10_Msk (0x1UL << HRTIM_SET2R_EXTVNT10_Pos) /*!< 0x40000000 */ +#define HRTIM_SET2R_EXTVNT10 HRTIM_SET2R_EXTVNT10_Msk /*!< External event 10 */ + +#define HRTIM_SET2R_UPDATE_Pos (31U) +#define HRTIM_SET2R_UPDATE_Msk (0x1UL << HRTIM_SET2R_UPDATE_Pos) /*!< 0x80000000 */ +#define HRTIM_SET2R_UPDATE HRTIM_SET2R_UPDATE_Msk /*!< Register update (transfer preload to active) */ + +/**** Bit definition for Slave Output 2 reset register ************************/ +#define HRTIM_RST2R_SRT_Pos (0U) +#define HRTIM_RST2R_SRT_Msk (0x1UL << HRTIM_RST2R_SRT_Pos) /*!< 0x00000001 */ +#define HRTIM_RST2R_SRT HRTIM_RST2R_SRT_Msk /*!< software reset trigger */ +#define HRTIM_RST2R_RESYNC_Pos (1U) +#define HRTIM_RST2R_RESYNC_Msk (0x1UL << HRTIM_RST2R_RESYNC_Pos) /*!< 0x00000002 */ +#define HRTIM_RST2R_RESYNC HRTIM_RST2R_RESYNC_Msk /*!< Timer A resynchronization */ +#define HRTIM_RST2R_PER_Pos (2U) +#define HRTIM_RST2R_PER_Msk (0x1UL << HRTIM_RST2R_PER_Pos) /*!< 0x00000004 */ +#define HRTIM_RST2R_PER HRTIM_RST2R_PER_Msk /*!< Timer A period */ +#define HRTIM_RST2R_CMP1_Pos (3U) +#define HRTIM_RST2R_CMP1_Msk (0x1UL << HRTIM_RST2R_CMP1_Pos) /*!< 0x00000008 */ +#define HRTIM_RST2R_CMP1 HRTIM_RST2R_CMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RST2R_CMP2_Pos (4U) +#define HRTIM_RST2R_CMP2_Msk (0x1UL << HRTIM_RST2R_CMP2_Pos) /*!< 0x00000010 */ +#define HRTIM_RST2R_CMP2 HRTIM_RST2R_CMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RST2R_CMP3_Pos (5U) +#define HRTIM_RST2R_CMP3_Msk (0x1UL << HRTIM_RST2R_CMP3_Pos) /*!< 0x00000020 */ +#define HRTIM_RST2R_CMP3 HRTIM_RST2R_CMP3_Msk /*!< Timer A compare 3 */ +#define HRTIM_RST2R_CMP4_Pos (6U) +#define HRTIM_RST2R_CMP4_Msk (0x1UL << HRTIM_RST2R_CMP4_Pos) /*!< 0x00000040 */ +#define HRTIM_RST2R_CMP4 HRTIM_RST2R_CMP4_Msk /*!< Timer A compare 4 */ +#define HRTIM_RST2R_MSTPER_Pos (7U) +#define HRTIM_RST2R_MSTPER_Msk (0x1UL << HRTIM_RST2R_MSTPER_Pos) /*!< 0x00000080 */ +#define HRTIM_RST2R_MSTPER HRTIM_RST2R_MSTPER_Msk /*!< Master period */ +#define HRTIM_RST2R_MSTCMP1_Pos (8U) +#define HRTIM_RST2R_MSTCMP1_Msk (0x1UL << HRTIM_RST2R_MSTCMP1_Pos) /*!< 0x00000100 */ +#define HRTIM_RST2R_MSTCMP1 HRTIM_RST2R_MSTCMP1_Msk /*!< Master compare 1 */ +#define HRTIM_RST2R_MSTCMP2_Pos (9U) +#define HRTIM_RST2R_MSTCMP2_Msk (0x1UL << HRTIM_RST2R_MSTCMP2_Pos) /*!< 0x00000200 */ +#define HRTIM_RST2R_MSTCMP2 HRTIM_RST2R_MSTCMP2_Msk /*!< Master compare 2 */ +#define HRTIM_RST2R_MSTCMP3_Pos (10U) +#define HRTIM_RST2R_MSTCMP3_Msk (0x1UL << HRTIM_RST2R_MSTCMP3_Pos) /*!< 0x00000400 */ +#define HRTIM_RST2R_MSTCMP3 HRTIM_RST2R_MSTCMP3_Msk /*!< Master compare 3 */ +#define HRTIM_RST2R_MSTCMP4_Pos (11U) +#define HRTIM_RST2R_MSTCMP4_Msk (0x1UL << HRTIM_RST2R_MSTCMP4_Pos) /*!< 0x00000800 */ +#define HRTIM_RST2R_MSTCMP4 HRTIM_RST2R_MSTCMP4_Msk /*!< Master compare 4 */ + +#define HRTIM_RST2R_TIMEVNT1_Pos (12U) +#define HRTIM_RST2R_TIMEVNT1_Msk (0x1UL << HRTIM_RST2R_TIMEVNT1_Pos) /*!< 0x00001000 */ +#define HRTIM_RST2R_TIMEVNT1 HRTIM_RST2R_TIMEVNT1_Msk /*!< Timer event 1 */ +#define HRTIM_RST2R_TIMEVNT2_Pos (13U) +#define HRTIM_RST2R_TIMEVNT2_Msk (0x1UL << HRTIM_RST2R_TIMEVNT2_Pos) /*!< 0x00002000 */ +#define HRTIM_RST2R_TIMEVNT2 HRTIM_RST2R_TIMEVNT2_Msk /*!< Timer event 2 */ +#define HRTIM_RST2R_TIMEVNT3_Pos (14U) +#define HRTIM_RST2R_TIMEVNT3_Msk (0x1UL << HRTIM_RST2R_TIMEVNT3_Pos) /*!< 0x00004000 */ +#define HRTIM_RST2R_TIMEVNT3 HRTIM_RST2R_TIMEVNT3_Msk /*!< Timer event 3 */ +#define HRTIM_RST2R_TIMEVNT4_Pos (15U) +#define HRTIM_RST2R_TIMEVNT4_Msk (0x1UL << HRTIM_RST2R_TIMEVNT4_Pos) /*!< 0x00008000 */ +#define HRTIM_RST2R_TIMEVNT4 HRTIM_RST2R_TIMEVNT4_Msk /*!< Timer event 4 */ +#define HRTIM_RST2R_TIMEVNT5_Pos (16U) +#define HRTIM_RST2R_TIMEVNT5_Msk (0x1UL << HRTIM_RST2R_TIMEVNT5_Pos) /*!< 0x00010000 */ +#define HRTIM_RST2R_TIMEVNT5 HRTIM_RST2R_TIMEVNT5_Msk /*!< Timer event 5 */ +#define HRTIM_RST2R_TIMEVNT6_Pos (17U) +#define HRTIM_RST2R_TIMEVNT6_Msk (0x1UL << HRTIM_RST2R_TIMEVNT6_Pos) /*!< 0x00020000 */ +#define HRTIM_RST2R_TIMEVNT6 HRTIM_RST2R_TIMEVNT6_Msk /*!< Timer event 6 */ +#define HRTIM_RST2R_TIMEVNT7_Pos (18U) +#define HRTIM_RST2R_TIMEVNT7_Msk (0x1UL << HRTIM_RST2R_TIMEVNT7_Pos) /*!< 0x00040000 */ +#define HRTIM_RST2R_TIMEVNT7 HRTIM_RST2R_TIMEVNT7_Msk /*!< Timer event 7 */ +#define HRTIM_RST2R_TIMEVNT8_Pos (19U) +#define HRTIM_RST2R_TIMEVNT8_Msk (0x1UL << HRTIM_RST2R_TIMEVNT8_Pos) /*!< 0x00080000 */ +#define HRTIM_RST2R_TIMEVNT8 HRTIM_RST2R_TIMEVNT8_Msk /*!< Timer event 8 */ +#define HRTIM_RST2R_TIMEVNT9_Pos (20U) +#define HRTIM_RST2R_TIMEVNT9_Msk (0x1UL << HRTIM_RST2R_TIMEVNT9_Pos) /*!< 0x00100000 */ +#define HRTIM_RST2R_TIMEVNT9 HRTIM_RST2R_TIMEVNT9_Msk /*!< Timer event 9 */ + +#define HRTIM_RST2R_EXTVNT1_Pos (21U) +#define HRTIM_RST2R_EXTVNT1_Msk (0x1UL << HRTIM_RST2R_EXTVNT1_Pos) /*!< 0x00200000 */ +#define HRTIM_RST2R_EXTVNT1 HRTIM_RST2R_EXTVNT1_Msk /*!< External event 1 */ +#define HRTIM_RST2R_EXTVNT2_Pos (22U) +#define HRTIM_RST2R_EXTVNT2_Msk (0x1UL << HRTIM_RST2R_EXTVNT2_Pos) /*!< 0x00400000 */ +#define HRTIM_RST2R_EXTVNT2 HRTIM_RST2R_EXTVNT2_Msk /*!< External event 2 */ +#define HRTIM_RST2R_EXTVNT3_Pos (23U) +#define HRTIM_RST2R_EXTVNT3_Msk (0x1UL << HRTIM_RST2R_EXTVNT3_Pos) /*!< 0x00800000 */ +#define HRTIM_RST2R_EXTVNT3 HRTIM_RST2R_EXTVNT3_Msk /*!< External event 3 */ +#define HRTIM_RST2R_EXTVNT4_Pos (24U) +#define HRTIM_RST2R_EXTVNT4_Msk (0x1UL << HRTIM_RST2R_EXTVNT4_Pos) /*!< 0x01000000 */ +#define HRTIM_RST2R_EXTVNT4 HRTIM_RST2R_EXTVNT4_Msk /*!< External event 4 */ +#define HRTIM_RST2R_EXTVNT5_Pos (25U) +#define HRTIM_RST2R_EXTVNT5_Msk (0x1UL << HRTIM_RST2R_EXTVNT5_Pos) /*!< 0x02000000 */ +#define HRTIM_RST2R_EXTVNT5 HRTIM_RST2R_EXTVNT5_Msk /*!< External event 5 */ +#define HRTIM_RST2R_EXTVNT6_Pos (26U) +#define HRTIM_RST2R_EXTVNT6_Msk (0x1UL << HRTIM_RST2R_EXTVNT6_Pos) /*!< 0x04000000 */ +#define HRTIM_RST2R_EXTVNT6 HRTIM_RST2R_EXTVNT6_Msk /*!< External event 6 */ +#define HRTIM_RST2R_EXTVNT7_Pos (27U) +#define HRTIM_RST2R_EXTVNT7_Msk (0x1UL << HRTIM_RST2R_EXTVNT7_Pos) /*!< 0x08000000 */ +#define HRTIM_RST2R_EXTVNT7 HRTIM_RST2R_EXTVNT7_Msk /*!< External event 7 */ +#define HRTIM_RST2R_EXTVNT8_Pos (28U) +#define HRTIM_RST2R_EXTVNT8_Msk (0x1UL << HRTIM_RST2R_EXTVNT8_Pos) /*!< 0x10000000 */ +#define HRTIM_RST2R_EXTVNT8 HRTIM_RST2R_EXTVNT8_Msk /*!< External event 8 */ +#define HRTIM_RST2R_EXTVNT9_Pos (29U) +#define HRTIM_RST2R_EXTVNT9_Msk (0x1UL << HRTIM_RST2R_EXTVNT9_Pos) /*!< 0x20000000 */ +#define HRTIM_RST2R_EXTVNT9 HRTIM_RST2R_EXTVNT9_Msk /*!< External event 9 */ +#define HRTIM_RST2R_EXTVNT10_Pos (30U) +#define HRTIM_RST2R_EXTVNT10_Msk (0x1UL << HRTIM_RST2R_EXTVNT10_Pos) /*!< 0x40000000 */ +#define HRTIM_RST2R_EXTVNT10 HRTIM_RST2R_EXTVNT10_Msk /*!< External event 10 */ +#define HRTIM_RST2R_UPDATE_Pos (31U) +#define HRTIM_RST2R_UPDATE_Msk (0x1UL << HRTIM_RST2R_UPDATE_Pos) /*!< 0x80000000 */ +#define HRTIM_RST2R_UPDATE HRTIM_RST2R_UPDATE_Msk /*!< Register update (transfer preload to active) */ + +/**** Bit definition for Slave external event filtering register 1 ***********/ +#define HRTIM_EEFR1_EE1LTCH_Pos (0U) +#define HRTIM_EEFR1_EE1LTCH_Msk (0x1UL << HRTIM_EEFR1_EE1LTCH_Pos) /*!< 0x00000001 */ +#define HRTIM_EEFR1_EE1LTCH HRTIM_EEFR1_EE1LTCH_Msk /*!< External Event 1 latch */ +#define HRTIM_EEFR1_EE1FLTR_Pos (1U) +#define HRTIM_EEFR1_EE1FLTR_Msk (0xFUL << HRTIM_EEFR1_EE1FLTR_Pos) /*!< 0x0000001E */ +#define HRTIM_EEFR1_EE1FLTR HRTIM_EEFR1_EE1FLTR_Msk /*!< External Event 1 filter mask */ +#define HRTIM_EEFR1_EE1FLTR_0 (0x1UL << HRTIM_EEFR1_EE1FLTR_Pos) /*!< 0x00000002 */ +#define HRTIM_EEFR1_EE1FLTR_1 (0x2UL << HRTIM_EEFR1_EE1FLTR_Pos) /*!< 0x00000004 */ +#define HRTIM_EEFR1_EE1FLTR_2 (0x4UL << HRTIM_EEFR1_EE1FLTR_Pos) /*!< 0x00000008 */ +#define HRTIM_EEFR1_EE1FLTR_3 (0x8UL << HRTIM_EEFR1_EE1FLTR_Pos) /*!< 0x00000010 */ + +#define HRTIM_EEFR1_EE2LTCH_Pos (6U) +#define HRTIM_EEFR1_EE2LTCH_Msk (0x1UL << HRTIM_EEFR1_EE2LTCH_Pos) /*!< 0x00000040 */ +#define HRTIM_EEFR1_EE2LTCH HRTIM_EEFR1_EE2LTCH_Msk /*!< External Event 2 latch */ +#define HRTIM_EEFR1_EE2FLTR_Pos (7U) +#define HRTIM_EEFR1_EE2FLTR_Msk (0xFUL << HRTIM_EEFR1_EE2FLTR_Pos) /*!< 0x00000780 */ +#define HRTIM_EEFR1_EE2FLTR HRTIM_EEFR1_EE2FLTR_Msk /*!< External Event 2 filter mask */ +#define HRTIM_EEFR1_EE2FLTR_0 (0x1UL << HRTIM_EEFR1_EE2FLTR_Pos) /*!< 0x00000080 */ +#define HRTIM_EEFR1_EE2FLTR_1 (0x2UL << HRTIM_EEFR1_EE2FLTR_Pos) /*!< 0x00000100 */ +#define HRTIM_EEFR1_EE2FLTR_2 (0x4UL << HRTIM_EEFR1_EE2FLTR_Pos) /*!< 0x00000200 */ +#define HRTIM_EEFR1_EE2FLTR_3 (0x8UL << HRTIM_EEFR1_EE2FLTR_Pos) /*!< 0x00000400 */ + +#define HRTIM_EEFR1_EE3LTCH_Pos (12U) +#define HRTIM_EEFR1_EE3LTCH_Msk (0x1UL << HRTIM_EEFR1_EE3LTCH_Pos) /*!< 0x00001000 */ +#define HRTIM_EEFR1_EE3LTCH HRTIM_EEFR1_EE3LTCH_Msk /*!< External Event 3 latch */ +#define HRTIM_EEFR1_EE3FLTR_Pos (13U) +#define HRTIM_EEFR1_EE3FLTR_Msk (0xFUL << HRTIM_EEFR1_EE3FLTR_Pos) /*!< 0x0001E000 */ +#define HRTIM_EEFR1_EE3FLTR HRTIM_EEFR1_EE3FLTR_Msk /*!< External Event 3 filter mask */ +#define HRTIM_EEFR1_EE3FLTR_0 (0x1UL << HRTIM_EEFR1_EE3FLTR_Pos) /*!< 0x00002000 */ +#define HRTIM_EEFR1_EE3FLTR_1 (0x2UL << HRTIM_EEFR1_EE3FLTR_Pos) /*!< 0x00004000 */ +#define HRTIM_EEFR1_EE3FLTR_2 (0x4UL << HRTIM_EEFR1_EE3FLTR_Pos) /*!< 0x00008000 */ +#define HRTIM_EEFR1_EE3FLTR_3 (0x8UL << HRTIM_EEFR1_EE3FLTR_Pos) /*!< 0x00010000 */ + +#define HRTIM_EEFR1_EE4LTCH_Pos (18U) +#define HRTIM_EEFR1_EE4LTCH_Msk (0x1UL << HRTIM_EEFR1_EE4LTCH_Pos) /*!< 0x00040000 */ +#define HRTIM_EEFR1_EE4LTCH HRTIM_EEFR1_EE4LTCH_Msk /*!< External Event 4 latch */ +#define HRTIM_EEFR1_EE4FLTR_Pos (19U) +#define HRTIM_EEFR1_EE4FLTR_Msk (0xFUL << HRTIM_EEFR1_EE4FLTR_Pos) /*!< 0x00780000 */ +#define HRTIM_EEFR1_EE4FLTR HRTIM_EEFR1_EE4FLTR_Msk /*!< External Event 4 filter mask */ +#define HRTIM_EEFR1_EE4FLTR_0 (0x1UL << HRTIM_EEFR1_EE4FLTR_Pos) /*!< 0x00080000 */ +#define HRTIM_EEFR1_EE4FLTR_1 (0x2UL << HRTIM_EEFR1_EE4FLTR_Pos) /*!< 0x00100000 */ +#define HRTIM_EEFR1_EE4FLTR_2 (0x4UL << HRTIM_EEFR1_EE4FLTR_Pos) /*!< 0x00200000 */ +#define HRTIM_EEFR1_EE4FLTR_3 (0x8UL << HRTIM_EEFR1_EE4FLTR_Pos) /*!< 0x00400000 */ + +#define HRTIM_EEFR1_EE5LTCH_Pos (24U) +#define HRTIM_EEFR1_EE5LTCH_Msk (0x1UL << HRTIM_EEFR1_EE5LTCH_Pos) /*!< 0x01000000 */ +#define HRTIM_EEFR1_EE5LTCH HRTIM_EEFR1_EE5LTCH_Msk /*!< External Event 5 latch */ +#define HRTIM_EEFR1_EE5FLTR_Pos (25U) +#define HRTIM_EEFR1_EE5FLTR_Msk (0xFUL << HRTIM_EEFR1_EE5FLTR_Pos) /*!< 0x1E000000 */ +#define HRTIM_EEFR1_EE5FLTR HRTIM_EEFR1_EE5FLTR_Msk /*!< External Event 5 filter mask */ +#define HRTIM_EEFR1_EE5FLTR_0 (0x1UL << HRTIM_EEFR1_EE5FLTR_Pos) /*!< 0x02000000 */ +#define HRTIM_EEFR1_EE5FLTR_1 (0x2UL << HRTIM_EEFR1_EE5FLTR_Pos) /*!< 0x04000000 */ +#define HRTIM_EEFR1_EE5FLTR_2 (0x4UL << HRTIM_EEFR1_EE5FLTR_Pos) /*!< 0x08000000 */ +#define HRTIM_EEFR1_EE5FLTR_3 (0x8UL << HRTIM_EEFR1_EE5FLTR_Pos) /*!< 0x10000000 */ + +/**** Bit definition for Slave external event filtering register 2 ***********/ +#define HRTIM_EEFR2_EE6LTCH_Pos (0U) +#define HRTIM_EEFR2_EE6LTCH_Msk (0x1UL << HRTIM_EEFR2_EE6LTCH_Pos) /*!< 0x00000001 */ +#define HRTIM_EEFR2_EE6LTCH HRTIM_EEFR2_EE6LTCH_Msk /*!< External Event 6 latch */ +#define HRTIM_EEFR2_EE6FLTR_Pos (1U) +#define HRTIM_EEFR2_EE6FLTR_Msk (0xFUL << HRTIM_EEFR2_EE6FLTR_Pos) /*!< 0x0000001E */ +#define HRTIM_EEFR2_EE6FLTR HRTIM_EEFR2_EE6FLTR_Msk /*!< External Event 6 filter mask */ +#define HRTIM_EEFR2_EE6FLTR_0 (0x1UL << HRTIM_EEFR2_EE6FLTR_Pos) /*!< 0x00000002 */ +#define HRTIM_EEFR2_EE6FLTR_1 (0x2UL << HRTIM_EEFR2_EE6FLTR_Pos) /*!< 0x00000004 */ +#define HRTIM_EEFR2_EE6FLTR_2 (0x4UL << HRTIM_EEFR2_EE6FLTR_Pos) /*!< 0x00000008 */ +#define HRTIM_EEFR2_EE6FLTR_3 (0x8UL << HRTIM_EEFR2_EE6FLTR_Pos) /*!< 0x00000010 */ + +#define HRTIM_EEFR2_EE7LTCH_Pos (6U) +#define HRTIM_EEFR2_EE7LTCH_Msk (0x1UL << HRTIM_EEFR2_EE7LTCH_Pos) /*!< 0x00000040 */ +#define HRTIM_EEFR2_EE7LTCH HRTIM_EEFR2_EE7LTCH_Msk /*!< External Event 7 latch */ +#define HRTIM_EEFR2_EE7FLTR_Pos (7U) +#define HRTIM_EEFR2_EE7FLTR_Msk (0xFUL << HRTIM_EEFR2_EE7FLTR_Pos) /*!< 0x00000780 */ +#define HRTIM_EEFR2_EE7FLTR HRTIM_EEFR2_EE7FLTR_Msk /*!< External Event 7 filter mask */ +#define HRTIM_EEFR2_EE7FLTR_0 (0x1UL << HRTIM_EEFR2_EE7FLTR_Pos) /*!< 0x00000080 */ +#define HRTIM_EEFR2_EE7FLTR_1 (0x2UL << HRTIM_EEFR2_EE7FLTR_Pos) /*!< 0x00000100 */ +#define HRTIM_EEFR2_EE7FLTR_2 (0x4UL << HRTIM_EEFR2_EE7FLTR_Pos) /*!< 0x00000200 */ +#define HRTIM_EEFR2_EE7FLTR_3 (0x8UL << HRTIM_EEFR2_EE7FLTR_Pos) /*!< 0x00000400 */ + +#define HRTIM_EEFR2_EE8LTCH_Pos (12U) +#define HRTIM_EEFR2_EE8LTCH_Msk (0x1UL << HRTIM_EEFR2_EE8LTCH_Pos) /*!< 0x00001000 */ +#define HRTIM_EEFR2_EE8LTCH HRTIM_EEFR2_EE8LTCH_Msk /*!< External Event 8 latch */ +#define HRTIM_EEFR2_EE8FLTR_Pos (13U) +#define HRTIM_EEFR2_EE8FLTR_Msk (0xFUL << HRTIM_EEFR2_EE8FLTR_Pos) /*!< 0x0001E000 */ +#define HRTIM_EEFR2_EE8FLTR HRTIM_EEFR2_EE8FLTR_Msk /*!< External Event 8 filter mask */ +#define HRTIM_EEFR2_EE8FLTR_0 (0x1UL << HRTIM_EEFR2_EE8FLTR_Pos) /*!< 0x00002000 */ +#define HRTIM_EEFR2_EE8FLTR_1 (0x2UL << HRTIM_EEFR2_EE8FLTR_Pos) /*!< 0x00004000 */ +#define HRTIM_EEFR2_EE8FLTR_2 (0x4UL << HRTIM_EEFR2_EE8FLTR_Pos) /*!< 0x00008000 */ +#define HRTIM_EEFR2_EE8FLTR_3 (0x8UL << HRTIM_EEFR2_EE8FLTR_Pos) /*!< 0x00010000 */ + +#define HRTIM_EEFR2_EE9LTCH_Pos (18U) +#define HRTIM_EEFR2_EE9LTCH_Msk (0x1UL << HRTIM_EEFR2_EE9LTCH_Pos) /*!< 0x00040000 */ +#define HRTIM_EEFR2_EE9LTCH HRTIM_EEFR2_EE9LTCH_Msk /*!< External Event 9 latch */ +#define HRTIM_EEFR2_EE9FLTR_Pos (19U) +#define HRTIM_EEFR2_EE9FLTR_Msk (0xFUL << HRTIM_EEFR2_EE9FLTR_Pos) /*!< 0x00780000 */ +#define HRTIM_EEFR2_EE9FLTR HRTIM_EEFR2_EE9FLTR_Msk /*!< External Event 9 filter mask */ +#define HRTIM_EEFR2_EE9FLTR_0 (0x1UL << HRTIM_EEFR2_EE9FLTR_Pos) /*!< 0x00080000 */ +#define HRTIM_EEFR2_EE9FLTR_1 (0x2UL << HRTIM_EEFR2_EE9FLTR_Pos) /*!< 0x00100000 */ +#define HRTIM_EEFR2_EE9FLTR_2 (0x4UL << HRTIM_EEFR2_EE9FLTR_Pos) /*!< 0x00200000 */ +#define HRTIM_EEFR2_EE9FLTR_3 (0x8UL << HRTIM_EEFR2_EE9FLTR_Pos) /*!< 0x00400000 */ + +#define HRTIM_EEFR2_EE10LTCH_Pos (24U) +#define HRTIM_EEFR2_EE10LTCH_Msk (0x1UL << HRTIM_EEFR2_EE10LTCH_Pos) /*!< 0x01000000 */ +#define HRTIM_EEFR2_EE10LTCH HRTIM_EEFR2_EE10LTCH_Msk /*!< External Event 10 latch */ +#define HRTIM_EEFR2_EE10FLTR_Pos (25U) +#define HRTIM_EEFR2_EE10FLTR_Msk (0xFUL << HRTIM_EEFR2_EE10FLTR_Pos) /*!< 0x1E000000 */ +#define HRTIM_EEFR2_EE10FLTR HRTIM_EEFR2_EE10FLTR_Msk /*!< External Event 10 filter mask */ +#define HRTIM_EEFR2_EE10FLTR_0 (0x1UL << HRTIM_EEFR2_EE10FLTR_Pos) /*!< 0x02000000 */ +#define HRTIM_EEFR2_EE10FLTR_1 (0x2UL << HRTIM_EEFR2_EE10FLTR_Pos) /*!< 0x04000000 */ +#define HRTIM_EEFR2_EE10FLTR_2 (0x4UL << HRTIM_EEFR2_EE10FLTR_Pos) /*!< 0x08000000 */ +#define HRTIM_EEFR2_EE10FLTR_3 (0x8UL << HRTIM_EEFR2_EE10FLTR_Pos) /*!< 0x10000000 */ + +/**** Bit definition for Slave Timer reset register ***************************/ + +#define HRTIM_RSTR_TIMFCMP1_Pos (0U) +#define HRTIM_RSTR_TIMFCMP1_Msk (0x1UL << HRTIM_RSTR_TIMFCMP1_Pos) /*!< 0x00000001 */ +#define HRTIM_RSTR_TIMFCMP1 HRTIM_RSTR_TIMFCMP1_Msk /*!< Timer F compare 1 */ +#define HRTIM_RSTR_UPDATE_Pos (1U) +#define HRTIM_RSTR_UPDATE_Msk (0x1UL << HRTIM_RSTR_UPDATE_Pos) /*!< 0x00000002 */ +#define HRTIM_RSTR_UPDATE HRTIM_RSTR_UPDATE_Msk /*!< Timer update */ +#define HRTIM_RSTR_CMP2_Pos (2U) +#define HRTIM_RSTR_CMP2_Msk (0x1UL << HRTIM_RSTR_CMP2_Pos) /*!< 0x00000004 */ +#define HRTIM_RSTR_CMP2 HRTIM_RSTR_CMP2_Msk /*!< Timer compare2 */ +#define HRTIM_RSTR_CMP4_Pos (3U) +#define HRTIM_RSTR_CMP4_Msk (0x1UL << HRTIM_RSTR_CMP4_Pos) /*!< 0x00000008 */ +#define HRTIM_RSTR_CMP4 HRTIM_RSTR_CMP4_Msk /*!< Timer compare4 */ +#define HRTIM_RSTR_MSTPER_Pos (4U) +#define HRTIM_RSTR_MSTPER_Msk (0x1UL << HRTIM_RSTR_MSTPER_Pos) /*!< 0x00000010 */ +#define HRTIM_RSTR_MSTPER HRTIM_RSTR_MSTPER_Msk /*!< Master period */ +#define HRTIM_RSTR_MSTCMP1_Pos (5U) +#define HRTIM_RSTR_MSTCMP1_Msk (0x1UL << HRTIM_RSTR_MSTCMP1_Pos) /*!< 0x00000020 */ +#define HRTIM_RSTR_MSTCMP1 HRTIM_RSTR_MSTCMP1_Msk /*!< Master compare1 */ +#define HRTIM_RSTR_MSTCMP2_Pos (6U) +#define HRTIM_RSTR_MSTCMP2_Msk (0x1UL << HRTIM_RSTR_MSTCMP2_Pos) /*!< 0x00000040 */ +#define HRTIM_RSTR_MSTCMP2 HRTIM_RSTR_MSTCMP2_Msk /*!< Master compare2 */ +#define HRTIM_RSTR_MSTCMP3_Pos (7U) +#define HRTIM_RSTR_MSTCMP3_Msk (0x1UL << HRTIM_RSTR_MSTCMP3_Pos) /*!< 0x00000080 */ +#define HRTIM_RSTR_MSTCMP3 HRTIM_RSTR_MSTCMP3_Msk /*!< Master compare3 */ +#define HRTIM_RSTR_MSTCMP4_Pos (8U) +#define HRTIM_RSTR_MSTCMP4_Msk (0x1UL << HRTIM_RSTR_MSTCMP4_Pos) /*!< 0x00000100 */ +#define HRTIM_RSTR_MSTCMP4 HRTIM_RSTR_MSTCMP4_Msk /*!< Master compare4 */ +#define HRTIM_RSTR_EXTEVNT1_Pos (9U) +#define HRTIM_RSTR_EXTEVNT1_Msk (0x1UL << HRTIM_RSTR_EXTEVNT1_Pos) /*!< 0x00000200 */ +#define HRTIM_RSTR_EXTEVNT1 HRTIM_RSTR_EXTEVNT1_Msk /*!< External event 1 */ +#define HRTIM_RSTR_EXTEVNT2_Pos (10U) +#define HRTIM_RSTR_EXTEVNT2_Msk (0x1UL << HRTIM_RSTR_EXTEVNT2_Pos) /*!< 0x00000400 */ +#define HRTIM_RSTR_EXTEVNT2 HRTIM_RSTR_EXTEVNT2_Msk /*!< External event 2 */ +#define HRTIM_RSTR_EXTEVNT3_Pos (11U) +#define HRTIM_RSTR_EXTEVNT3_Msk (0x1UL << HRTIM_RSTR_EXTEVNT3_Pos) /*!< 0x00000800 */ +#define HRTIM_RSTR_EXTEVNT3 HRTIM_RSTR_EXTEVNT3_Msk /*!< External event 3 */ +#define HRTIM_RSTR_EXTEVNT4_Pos (12U) +#define HRTIM_RSTR_EXTEVNT4_Msk (0x1UL << HRTIM_RSTR_EXTEVNT4_Pos) /*!< 0x00001000 */ +#define HRTIM_RSTR_EXTEVNT4 HRTIM_RSTR_EXTEVNT4_Msk /*!< External event 4 */ +#define HRTIM_RSTR_EXTEVNT5_Pos (13U) +#define HRTIM_RSTR_EXTEVNT5_Msk (0x1UL << HRTIM_RSTR_EXTEVNT5_Pos) /*!< 0x00002000 */ +#define HRTIM_RSTR_EXTEVNT5 HRTIM_RSTR_EXTEVNT5_Msk /*!< External event 5 */ +#define HRTIM_RSTR_EXTEVNT6_Pos (14U) +#define HRTIM_RSTR_EXTEVNT6_Msk (0x1UL << HRTIM_RSTR_EXTEVNT6_Pos) /*!< 0x00004000 */ +#define HRTIM_RSTR_EXTEVNT6 HRTIM_RSTR_EXTEVNT6_Msk /*!< External event 6 */ +#define HRTIM_RSTR_EXTEVNT7_Pos (15U) +#define HRTIM_RSTR_EXTEVNT7_Msk (0x1UL << HRTIM_RSTR_EXTEVNT7_Pos) /*!< 0x00008000 */ +#define HRTIM_RSTR_EXTEVNT7 HRTIM_RSTR_EXTEVNT7_Msk /*!< External event 7 */ +#define HRTIM_RSTR_EXTEVNT8_Pos (16U) +#define HRTIM_RSTR_EXTEVNT8_Msk (0x1UL << HRTIM_RSTR_EXTEVNT8_Pos) /*!< 0x00010000 */ +#define HRTIM_RSTR_EXTEVNT8 HRTIM_RSTR_EXTEVNT8_Msk /*!< External event 8 */ +#define HRTIM_RSTR_EXTEVNT9_Pos (17U) +#define HRTIM_RSTR_EXTEVNT9_Msk (0x1UL << HRTIM_RSTR_EXTEVNT9_Pos) /*!< 0x00020000 */ +#define HRTIM_RSTR_EXTEVNT9 HRTIM_RSTR_EXTEVNT9_Msk /*!< External event 9 */ +#define HRTIM_RSTR_EXTEVNT10_Pos (18U) +#define HRTIM_RSTR_EXTEVNT10_Msk (0x1UL << HRTIM_RSTR_EXTEVNT10_Pos) /*!< 0x00040000 */ +#define HRTIM_RSTR_EXTEVNT10 HRTIM_RSTR_EXTEVNT10_Msk /*!< External event 10 */ + +/* Slave Timer A reset enable bits upon other slave timers events */ +#define HRTIM_RSTR_TIMBCMP1_Pos (19U) +#define HRTIM_RSTR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTR_TIMBCMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTR_TIMBCMP1 HRTIM_RSTR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTR_TIMBCMP2_Pos (20U) +#define HRTIM_RSTR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTR_TIMBCMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTR_TIMBCMP2 HRTIM_RSTR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTR_TIMBCMP4_Pos (21U) +#define HRTIM_RSTR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTR_TIMBCMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTR_TIMBCMP4 HRTIM_RSTR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTR_TIMCCMP1_Pos (22U) +#define HRTIM_RSTR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTR_TIMCCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTR_TIMCCMP1 HRTIM_RSTR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTR_TIMCCMP2_Pos (23U) +#define HRTIM_RSTR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTR_TIMCCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTR_TIMCCMP2 HRTIM_RSTR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTR_TIMCCMP4_Pos (24U) +#define HRTIM_RSTR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTR_TIMCCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTR_TIMCCMP4 HRTIM_RSTR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTR_TIMDCMP1_Pos (25U) +#define HRTIM_RSTR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTR_TIMDCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTR_TIMDCMP1 HRTIM_RSTR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTR_TIMDCMP2_Pos (26U) +#define HRTIM_RSTR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTR_TIMDCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTR_TIMDCMP2 HRTIM_RSTR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTR_TIMDCMP4_Pos (27U) +#define HRTIM_RSTR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTR_TIMDCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTR_TIMDCMP4 HRTIM_RSTR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTR_TIMECMP1_Pos (28U) +#define HRTIM_RSTR_TIMECMP1_Msk (0x1UL << HRTIM_RSTR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTR_TIMECMP1 HRTIM_RSTR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTR_TIMECMP2_Pos (29U) +#define HRTIM_RSTR_TIMECMP2_Msk (0x1UL << HRTIM_RSTR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTR_TIMECMP2 HRTIM_RSTR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTR_TIMECMP4_Pos (30U) +#define HRTIM_RSTR_TIMECMP4_Msk (0x1UL << HRTIM_RSTR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTR_TIMECMP4 HRTIM_RSTR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTR_TIMFCMP2 HRTIM_RSTR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer B reset enable bits upon other slave timers events */ +#define HRTIM_RSTBR_TIMACMP1_Pos (19U) +#define HRTIM_RSTBR_TIMACMP1_Msk (0x1UL << HRTIM_RSTBR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTBR_TIMACMP1 HRTIM_RSTBR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTBR_TIMACMP2_Pos (20U) +#define HRTIM_RSTBR_TIMACMP2_Msk (0x1UL << HRTIM_RSTBR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTBR_TIMACMP2 HRTIM_RSTBR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTBR_TIMACMP4_Pos (21U) +#define HRTIM_RSTBR_TIMACMP4_Msk (0x1UL << HRTIM_RSTBR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTBR_TIMACMP4 HRTIM_RSTBR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTBR_TIMCCMP1_Pos (22U) +#define HRTIM_RSTBR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTBR_TIMCCMP1 HRTIM_RSTBR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTBR_TIMCCMP2_Pos (23U) +#define HRTIM_RSTBR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTBR_TIMCCMP2 HRTIM_RSTBR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTBR_TIMCCMP4_Pos (24U) +#define HRTIM_RSTBR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTBR_TIMCCMP4 HRTIM_RSTBR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTBR_TIMDCMP1_Pos (25U) +#define HRTIM_RSTBR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTBR_TIMDCMP1 HRTIM_RSTBR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTBR_TIMDCMP2_Pos (26U) +#define HRTIM_RSTBR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTBR_TIMDCMP2 HRTIM_RSTBR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTBR_TIMDCMP4_Pos (27U) +#define HRTIM_RSTBR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTBR_TIMDCMP4 HRTIM_RSTBR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTBR_TIMECMP1_Pos (28U) +#define HRTIM_RSTBR_TIMECMP1_Msk (0x1UL << HRTIM_RSTBR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTBR_TIMECMP1 HRTIM_RSTBR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTBR_TIMECMP2_Pos (29U) +#define HRTIM_RSTBR_TIMECMP2_Msk (0x1UL << HRTIM_RSTBR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTBR_TIMECMP2 HRTIM_RSTBR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTBR_TIMECMP4_Pos (30U) +#define HRTIM_RSTBR_TIMECMP4_Msk (0x1UL << HRTIM_RSTBR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTBR_TIMECMP4 HRTIM_RSTBR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTBR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTBR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTBR_TIMFCMP2 HRTIM_RSTBR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer C reset enable bits upon other slave timers events */ +#define HRTIM_RSTCR_TIMACMP1_Pos (19U) +#define HRTIM_RSTCR_TIMACMP1_Msk (0x1UL << HRTIM_RSTCR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTCR_TIMACMP1 HRTIM_RSTCR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTCR_TIMACMP2_Pos (20U) +#define HRTIM_RSTCR_TIMACMP2_Msk (0x1UL << HRTIM_RSTCR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTCR_TIMACMP2 HRTIM_RSTCR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTCR_TIMACMP4_Pos (21U) +#define HRTIM_RSTCR_TIMACMP4_Msk (0x1UL << HRTIM_RSTCR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTCR_TIMACMP4 HRTIM_RSTCR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTCR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTCR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTCR_TIMBCMP1 HRTIM_RSTCR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTCR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTCR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTCR_TIMBCMP2 HRTIM_RSTCR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTCR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTCR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTCR_TIMBCMP4 HRTIM_RSTCR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTCR_TIMDCMP1_Pos (25U) +#define HRTIM_RSTCR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTCR_TIMDCMP1 HRTIM_RSTCR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTCR_TIMDCMP2_Pos (26U) +#define HRTIM_RSTCR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTCR_TIMDCMP2 HRTIM_RSTCR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTCR_TIMDCMP4_Pos (27U) +#define HRTIM_RSTCR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTCR_TIMDCMP4 HRTIM_RSTCR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTCR_TIMECMP1_Pos (28U) +#define HRTIM_RSTCR_TIMECMP1_Msk (0x1UL << HRTIM_RSTCR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTCR_TIMECMP1 HRTIM_RSTCR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTCR_TIMECMP2_Pos (29U) +#define HRTIM_RSTCR_TIMECMP2_Msk (0x1UL << HRTIM_RSTCR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTCR_TIMECMP2 HRTIM_RSTCR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTCR_TIMECMP4_Pos (30U) +#define HRTIM_RSTCR_TIMECMP4_Msk (0x1UL << HRTIM_RSTCR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTCR_TIMECMP4 HRTIM_RSTCR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTCR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTCR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTCR_TIMFCMP2 HRTIM_RSTCR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer D reset enable bits upon other slave timers events */ +#define HRTIM_RSTDR_TIMACMP1_Pos (19U) +#define HRTIM_RSTDR_TIMACMP1_Msk (0x1UL << HRTIM_RSTDR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTDR_TIMACMP1 HRTIM_RSTDR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTDR_TIMACMP2_Pos (20U) +#define HRTIM_RSTDR_TIMACMP2_Msk (0x1UL << HRTIM_RSTDR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTDR_TIMACMP2 HRTIM_RSTDR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTDR_TIMACMP4_Pos (21U) +#define HRTIM_RSTDR_TIMACMP4_Msk (0x1UL << HRTIM_RSTDR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTDR_TIMACMP4 HRTIM_RSTDR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTDR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTDR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTDR_TIMBCMP1 HRTIM_RSTDR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTDR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTDR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTDR_TIMBCMP2 HRTIM_RSTDR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTDR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTDR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTDR_TIMBCMP4 HRTIM_RSTDR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTDR_TIMCCMP1_Pos (25U) +#define HRTIM_RSTDR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTDR_TIMCCMP1 HRTIM_RSTDR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTDR_TIMCCMP2_Pos (26U) +#define HRTIM_RSTDR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTDR_TIMCCMP2 HRTIM_RSTDR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTDR_TIMCCMP4_Pos (27U) +#define HRTIM_RSTDR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTDR_TIMCCMP4 HRTIM_RSTDR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTDR_TIMECMP1_Pos (28U) +#define HRTIM_RSTDR_TIMECMP1_Msk (0x1UL << HRTIM_RSTDR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTDR_TIMECMP1 HRTIM_RSTDR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTDR_TIMECMP2_Pos (29U) +#define HRTIM_RSTDR_TIMECMP2_Msk (0x1UL << HRTIM_RSTDR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTDR_TIMECMP2 HRTIM_RSTDR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTDR_TIMECMP4_Pos (30U) +#define HRTIM_RSTDR_TIMECMP4_Msk (0x1UL << HRTIM_RSTDR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTDR_TIMECMP4 HRTIM_RSTDR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTDR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTDR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTDR_TIMFCMP2 HRTIM_RSTDR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer E reset enable bits upon other slave timers events */ +#define HRTIM_RSTER_TIMACMP1_Pos (19U) +#define HRTIM_RSTER_TIMACMP1_Msk (0x1UL << HRTIM_RSTER_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTER_TIMACMP1 HRTIM_RSTER_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTER_TIMACMP2_Pos (20U) +#define HRTIM_RSTER_TIMACMP2_Msk (0x1UL << HRTIM_RSTER_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTER_TIMACMP2 HRTIM_RSTER_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTER_TIMACMP4_Pos (21U) +#define HRTIM_RSTER_TIMACMP4_Msk (0x1UL << HRTIM_RSTER_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTER_TIMACMP4 HRTIM_RSTER_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTER_TIMBCMP1_Pos (22U) +#define HRTIM_RSTER_TIMBCMP1_Msk (0x1UL << HRTIM_RSTER_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTER_TIMBCMP1 HRTIM_RSTER_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTER_TIMBCMP2_Pos (23U) +#define HRTIM_RSTER_TIMBCMP2_Msk (0x1UL << HRTIM_RSTER_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTER_TIMBCMP2 HRTIM_RSTER_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTER_TIMBCMP4_Pos (24U) +#define HRTIM_RSTER_TIMBCMP4_Msk (0x1UL << HRTIM_RSTER_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTER_TIMBCMP4 HRTIM_RSTER_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTER_TIMCCMP1_Pos (25U) +#define HRTIM_RSTER_TIMCCMP1_Msk (0x1UL << HRTIM_RSTER_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTER_TIMCCMP1 HRTIM_RSTER_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTER_TIMCCMP2_Pos (26U) +#define HRTIM_RSTER_TIMCCMP2_Msk (0x1UL << HRTIM_RSTER_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTER_TIMCCMP2 HRTIM_RSTER_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTER_TIMCCMP4_Pos (27U) +#define HRTIM_RSTER_TIMCCMP4_Msk (0x1UL << HRTIM_RSTER_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTER_TIMCCMP4 HRTIM_RSTER_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTER_TIMDCMP1_Pos (28U) +#define HRTIM_RSTER_TIMDCMP1_Msk (0x1UL << HRTIM_RSTER_TIMDCMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTER_TIMDCMP1 HRTIM_RSTER_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTER_TIMDCMP2_Pos (29U) +#define HRTIM_RSTER_TIMDCMP2_Msk (0x1UL << HRTIM_RSTER_TIMDCMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTER_TIMDCMP2 HRTIM_RSTER_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTER_TIMDCMP4_Pos (30U) +#define HRTIM_RSTER_TIMDCMP4_Msk (0x1UL << HRTIM_RSTER_TIMDCMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTER_TIMDCMP4 HRTIM_RSTER_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTER_TIMFCMP2_Pos (31U) +#define HRTIM_RSTER_TIMFCMP2_Msk (0x1UL << HRTIM_RSTER_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTER_TIMFCMP2 HRTIM_RSTER_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer F reset enable bits upon other slave timers events */ +#define HRTIM_RSTFR_TIMACMP1_Pos (19U) +#define HRTIM_RSTFR_TIMACMP1_Msk (0x1UL << HRTIM_RSTFR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTFR_TIMACMP1 HRTIM_RSTFR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTFR_TIMACMP2_Pos (20U) +#define HRTIM_RSTFR_TIMACMP2_Msk (0x1UL << HRTIM_RSTFR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTFR_TIMACMP2 HRTIM_RSTFR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTFR_TIMACMP4_Pos (21U) +#define HRTIM_RSTFR_TIMACMP4_Msk (0x1UL << HRTIM_RSTFR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTFR_TIMACMP4 HRTIM_RSTFR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTFR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTFR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTFR_TIMBCMP1 HRTIM_RSTFR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTFR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTFR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTFR_TIMBCMP2 HRTIM_RSTFR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTFR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTFR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTFR_TIMBCMP4 HRTIM_RSTFR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTFR_TIMCCMP1_Pos (25U) +#define HRTIM_RSTFR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTFR_TIMCCMP1 HRTIM_RSTFR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTFR_TIMCCMP2_Pos (26U) +#define HRTIM_RSTFR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTFR_TIMCCMP2 HRTIM_RSTFR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTFR_TIMCCMP4_Pos (27U) +#define HRTIM_RSTFR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTFR_TIMCCMP4 HRTIM_RSTFR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTFR_TIMDCMP1_Pos (28U) +#define HRTIM_RSTFR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTFR_TIMDCMP1 HRTIM_RSTFR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTFR_TIMDCMP2_Pos (29U) +#define HRTIM_RSTFR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTFR_TIMDCMP2 HRTIM_RSTFR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTFR_TIMDCMP4_Pos (30U) +#define HRTIM_RSTFR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTFR_TIMDCMP4 HRTIM_RSTFR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTFR_TIMECMP2_Pos (31U) +#define HRTIM_RSTFR_TIMECMP2_Msk (0x1UL << HRTIM_RSTFR_TIMECMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTFR_TIMECMP2 HRTIM_RSTFR_TIMECMP2_Msk /*!< Timer E compare 2 */ + +/**** Bit definition for Slave Timer Chopper register *************************/ +#define HRTIM_CHPR_CARFRQ_Pos (0U) +#define HRTIM_CHPR_CARFRQ_Msk (0xFUL << HRTIM_CHPR_CARFRQ_Pos) /*!< 0x0000000F */ +#define HRTIM_CHPR_CARFRQ HRTIM_CHPR_CARFRQ_Msk /*!< Timer carrier frequency value */ +#define HRTIM_CHPR_CARFRQ_0 (0x1UL << HRTIM_CHPR_CARFRQ_Pos) /*!< 0x00000001 */ +#define HRTIM_CHPR_CARFRQ_1 (0x2UL << HRTIM_CHPR_CARFRQ_Pos) /*!< 0x00000002 */ +#define HRTIM_CHPR_CARFRQ_2 (0x4UL << HRTIM_CHPR_CARFRQ_Pos) /*!< 0x00000004 */ +#define HRTIM_CHPR_CARFRQ_3 (0x8UL << HRTIM_CHPR_CARFRQ_Pos) /*!< 0x00000008 */ + +#define HRTIM_CHPR_CARDTY_Pos (4U) +#define HRTIM_CHPR_CARDTY_Msk (0x7UL << HRTIM_CHPR_CARDTY_Pos) /*!< 0x00000070 */ +#define HRTIM_CHPR_CARDTY HRTIM_CHPR_CARDTY_Msk /*!< Timer chopper duty cycle value */ +#define HRTIM_CHPR_CARDTY_0 (0x1UL << HRTIM_CHPR_CARDTY_Pos) /*!< 0x00000010 */ +#define HRTIM_CHPR_CARDTY_1 (0x2UL << HRTIM_CHPR_CARDTY_Pos) /*!< 0x00000020 */ +#define HRTIM_CHPR_CARDTY_2 (0x4UL << HRTIM_CHPR_CARDTY_Pos) /*!< 0x00000040 */ + +#define HRTIM_CHPR_STRPW_Pos (7U) +#define HRTIM_CHPR_STRPW_Msk (0xFUL << HRTIM_CHPR_STRPW_Pos) /*!< 0x00000780 */ +#define HRTIM_CHPR_STRPW HRTIM_CHPR_STRPW_Msk /*!< Timer start pulse width value */ +#define HRTIM_CHPR_STRPW_0 (0x1UL << HRTIM_CHPR_STRPW_Pos) /*!< 0x00000080 */ +#define HRTIM_CHPR_STRPW_1 (0x2UL << HRTIM_CHPR_STRPW_Pos) /*!< 0x00000100 */ +#define HRTIM_CHPR_STRPW_2 (0x4UL << HRTIM_CHPR_STRPW_Pos) /*!< 0x00000200 */ +#define HRTIM_CHPR_STRPW_3 (0x8UL << HRTIM_CHPR_STRPW_Pos) /*!< 0x00000400 */ + +/**** Bit definition for Slave Timer Capture 1 control register ***************/ +#define HRTIM_CPT1CR_SWCPT_Pos (0U) +#define HRTIM_CPT1CR_SWCPT_Msk (0x1UL << HRTIM_CPT1CR_SWCPT_Pos) /*!< 0x00000001 */ +#define HRTIM_CPT1CR_SWCPT HRTIM_CPT1CR_SWCPT_Msk /*!< Software capture */ +#define HRTIM_CPT1CR_UPDCPT_Pos (1U) +#define HRTIM_CPT1CR_UPDCPT_Msk (0x1UL << HRTIM_CPT1CR_UPDCPT_Pos) /*!< 0x00000002 */ +#define HRTIM_CPT1CR_UPDCPT HRTIM_CPT1CR_UPDCPT_Msk /*!< Update capture */ +#define HRTIM_CPT1CR_EXEV1CPT_Pos (2U) +#define HRTIM_CPT1CR_EXEV1CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV1CPT_Pos) /*!< 0x00000004 */ +#define HRTIM_CPT1CR_EXEV1CPT HRTIM_CPT1CR_EXEV1CPT_Msk /*!< External event 1 capture */ +#define HRTIM_CPT1CR_EXEV2CPT_Pos (3U) +#define HRTIM_CPT1CR_EXEV2CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV2CPT_Pos) /*!< 0x00000008 */ +#define HRTIM_CPT1CR_EXEV2CPT HRTIM_CPT1CR_EXEV2CPT_Msk /*!< External event 2 capture */ +#define HRTIM_CPT1CR_EXEV3CPT_Pos (4U) +#define HRTIM_CPT1CR_EXEV3CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV3CPT_Pos) /*!< 0x00000010 */ +#define HRTIM_CPT1CR_EXEV3CPT HRTIM_CPT1CR_EXEV3CPT_Msk /*!< External event 3 capture */ +#define HRTIM_CPT1CR_EXEV4CPT_Pos (5U) +#define HRTIM_CPT1CR_EXEV4CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV4CPT_Pos) /*!< 0x00000020 */ +#define HRTIM_CPT1CR_EXEV4CPT HRTIM_CPT1CR_EXEV4CPT_Msk /*!< External event 4 capture */ +#define HRTIM_CPT1CR_EXEV5CPT_Pos (6U) +#define HRTIM_CPT1CR_EXEV5CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV5CPT_Pos) /*!< 0x00000040 */ +#define HRTIM_CPT1CR_EXEV5CPT HRTIM_CPT1CR_EXEV5CPT_Msk /*!< External event 5 capture */ +#define HRTIM_CPT1CR_EXEV6CPT_Pos (7U) +#define HRTIM_CPT1CR_EXEV6CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV6CPT_Pos) /*!< 0x00000080 */ +#define HRTIM_CPT1CR_EXEV6CPT HRTIM_CPT1CR_EXEV6CPT_Msk /*!< External event 6 capture */ +#define HRTIM_CPT1CR_EXEV7CPT_Pos (8U) +#define HRTIM_CPT1CR_EXEV7CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV7CPT_Pos) /*!< 0x00000100 */ +#define HRTIM_CPT1CR_EXEV7CPT HRTIM_CPT1CR_EXEV7CPT_Msk /*!< External event 7 capture */ +#define HRTIM_CPT1CR_EXEV8CPT_Pos (9U) +#define HRTIM_CPT1CR_EXEV8CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV8CPT_Pos) /*!< 0x00000200 */ +#define HRTIM_CPT1CR_EXEV8CPT HRTIM_CPT1CR_EXEV8CPT_Msk /*!< External event 8 capture */ +#define HRTIM_CPT1CR_EXEV9CPT_Pos (10U) +#define HRTIM_CPT1CR_EXEV9CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV9CPT_Pos) /*!< 0x00000400 */ +#define HRTIM_CPT1CR_EXEV9CPT HRTIM_CPT1CR_EXEV9CPT_Msk /*!< External event 9 capture */ +#define HRTIM_CPT1CR_EXEV10CPT_Pos (11U) +#define HRTIM_CPT1CR_EXEV10CPT_Msk (0x1UL << HRTIM_CPT1CR_EXEV10CPT_Pos) /*!< 0x00000800 */ +#define HRTIM_CPT1CR_EXEV10CPT HRTIM_CPT1CR_EXEV10CPT_Msk /*!< External event 10 capture */ + +#define HRTIM_CPT1CR_TF1SET_Pos (0U) +#define HRTIM_CPT1CR_TF1SET_Msk (0x1UL << HRTIM_CPT1CR_TF1SET_Pos) /*!< 0x00000001 */ +#define HRTIM_CPT1CR_TF1SET HRTIM_CPT1CR_TF1SET_Msk /*!< Timer F output 1 set */ +#define HRTIM_CPT1CR_TF1RST_Pos (1U) +#define HRTIM_CPT1CR_TF1RST_Msk (0x1UL << HRTIM_CPT1CR_TF1RST_Pos) /*!< 0x00000002 */ +#define HRTIM_CPT1CR_TF1RST HRTIM_CPT1CR_TF1RST_Msk /*!< Timer F output 1 reset */ +#define HRTIM_CPT1CR_TIMFCMP1_Pos (2U) +#define HRTIM_CPT1CR_TIMFCMP1_Msk (0x1UL << HRTIM_CPT1CR_TIMFCMP1_Pos) /*!< 0x00000004 */ +#define HRTIM_CPT1CR_TIMFCMP1 HRTIM_CPT1CR_TIMFCMP1_Msk /*!< Timer F compare 1 */ +#define HRTIM_CPT1CR_TIMFCMP2_Pos (3U) +#define HRTIM_CPT1CR_TIMFCMP2_Msk (0x1UL << HRTIM_CPT1CR_TIMFCMP2_Pos) /*!< 0x00000008 */ +#define HRTIM_CPT1CR_TIMFCMP2 HRTIM_CPT1CR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +#define HRTIM_CPT1CR_TA1SET_Pos (12U) +#define HRTIM_CPT1CR_TA1SET_Msk (0x1UL << HRTIM_CPT1CR_TA1SET_Pos) /*!< 0x00001000 */ +#define HRTIM_CPT1CR_TA1SET HRTIM_CPT1CR_TA1SET_Msk /*!< Timer A output 1 set */ +#define HRTIM_CPT1CR_TA1RST_Pos (13U) +#define HRTIM_CPT1CR_TA1RST_Msk (0x1UL << HRTIM_CPT1CR_TA1RST_Pos) /*!< 0x00002000 */ +#define HRTIM_CPT1CR_TA1RST HRTIM_CPT1CR_TA1RST_Msk /*!< Timer A output 1 reset */ +#define HRTIM_CPT1CR_TIMACMP1_Pos (14U) +#define HRTIM_CPT1CR_TIMACMP1_Msk (0x1UL << HRTIM_CPT1CR_TIMACMP1_Pos) /*!< 0x00004000 */ +#define HRTIM_CPT1CR_TIMACMP1 HRTIM_CPT1CR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_CPT1CR_TIMACMP2_Pos (15U) +#define HRTIM_CPT1CR_TIMACMP2_Msk (0x1UL << HRTIM_CPT1CR_TIMACMP2_Pos) /*!< 0x00008000 */ +#define HRTIM_CPT1CR_TIMACMP2 HRTIM_CPT1CR_TIMACMP2_Msk /*!< Timer A compare 2 */ + +#define HRTIM_CPT1CR_TB1SET_Pos (16U) +#define HRTIM_CPT1CR_TB1SET_Msk (0x1UL << HRTIM_CPT1CR_TB1SET_Pos) /*!< 0x00010000 */ +#define HRTIM_CPT1CR_TB1SET HRTIM_CPT1CR_TB1SET_Msk /*!< Timer B output 1 set */ +#define HRTIM_CPT1CR_TB1RST_Pos (17U) +#define HRTIM_CPT1CR_TB1RST_Msk (0x1UL << HRTIM_CPT1CR_TB1RST_Pos) /*!< 0x00020000 */ +#define HRTIM_CPT1CR_TB1RST HRTIM_CPT1CR_TB1RST_Msk /*!< Timer B output 1 reset */ +#define HRTIM_CPT1CR_TIMBCMP1_Pos (18U) +#define HRTIM_CPT1CR_TIMBCMP1_Msk (0x1UL << HRTIM_CPT1CR_TIMBCMP1_Pos) /*!< 0x00040000 */ +#define HRTIM_CPT1CR_TIMBCMP1 HRTIM_CPT1CR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_CPT1CR_TIMBCMP2_Pos (19U) +#define HRTIM_CPT1CR_TIMBCMP2_Msk (0x1UL << HRTIM_CPT1CR_TIMBCMP2_Pos) /*!< 0x00080000 */ +#define HRTIM_CPT1CR_TIMBCMP2 HRTIM_CPT1CR_TIMBCMP2_Msk /*!< Timer B compare 2 */ + +#define HRTIM_CPT1CR_TC1SET_Pos (20U) +#define HRTIM_CPT1CR_TC1SET_Msk (0x1UL << HRTIM_CPT1CR_TC1SET_Pos) /*!< 0x00100000 */ +#define HRTIM_CPT1CR_TC1SET HRTIM_CPT1CR_TC1SET_Msk /*!< Timer C output 1 set */ +#define HRTIM_CPT1CR_TC1RST_Pos (21U) +#define HRTIM_CPT1CR_TC1RST_Msk (0x1UL << HRTIM_CPT1CR_TC1RST_Pos) /*!< 0x00200000 */ +#define HRTIM_CPT1CR_TC1RST HRTIM_CPT1CR_TC1RST_Msk /*!< Timer C output 1 reset */ +#define HRTIM_CPT1CR_TIMCCMP1_Pos (22U) +#define HRTIM_CPT1CR_TIMCCMP1_Msk (0x1UL << HRTIM_CPT1CR_TIMCCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_CPT1CR_TIMCCMP1 HRTIM_CPT1CR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_CPT1CR_TIMCCMP2_Pos (23U) +#define HRTIM_CPT1CR_TIMCCMP2_Msk (0x1UL << HRTIM_CPT1CR_TIMCCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_CPT1CR_TIMCCMP2 HRTIM_CPT1CR_TIMCCMP2_Msk /*!< Timer C compare 2 */ + +#define HRTIM_CPT1CR_TD1SET_Pos (24U) +#define HRTIM_CPT1CR_TD1SET_Msk (0x1UL << HRTIM_CPT1CR_TD1SET_Pos) /*!< 0x01000000 */ +#define HRTIM_CPT1CR_TD1SET HRTIM_CPT1CR_TD1SET_Msk /*!< Timer D output 1 set */ +#define HRTIM_CPT1CR_TD1RST_Pos (25U) +#define HRTIM_CPT1CR_TD1RST_Msk (0x1UL << HRTIM_CPT1CR_TD1RST_Pos) /*!< 0x02000000 */ +#define HRTIM_CPT1CR_TD1RST HRTIM_CPT1CR_TD1RST_Msk /*!< Timer D output 1 reset */ +#define HRTIM_CPT1CR_TIMDCMP1_Pos (26U) +#define HRTIM_CPT1CR_TIMDCMP1_Msk (0x1UL << HRTIM_CPT1CR_TIMDCMP1_Pos) /*!< 0x04000000 */ +#define HRTIM_CPT1CR_TIMDCMP1 HRTIM_CPT1CR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_CPT1CR_TIMDCMP2_Pos (27U) +#define HRTIM_CPT1CR_TIMDCMP2_Msk (0x1UL << HRTIM_CPT1CR_TIMDCMP2_Pos) /*!< 0x08000000 */ +#define HRTIM_CPT1CR_TIMDCMP2 HRTIM_CPT1CR_TIMDCMP2_Msk /*!< Timer D compare 2 */ + +#define HRTIM_CPT1CR_TE1SET_Pos (28U) +#define HRTIM_CPT1CR_TE1SET_Msk (0x1UL << HRTIM_CPT1CR_TE1SET_Pos) /*!< 0x10000000 */ +#define HRTIM_CPT1CR_TE1SET HRTIM_CPT1CR_TE1SET_Msk /*!< Timer E output 1 set */ +#define HRTIM_CPT1CR_TE1RST_Pos (29U) +#define HRTIM_CPT1CR_TE1RST_Msk (0x1UL << HRTIM_CPT1CR_TE1RST_Pos) /*!< 0x20000000 */ +#define HRTIM_CPT1CR_TE1RST HRTIM_CPT1CR_TE1RST_Msk /*!< Timer E output 1 reset */ +#define HRTIM_CPT1CR_TIMECMP1_Pos (30U) +#define HRTIM_CPT1CR_TIMECMP1_Msk (0x1UL << HRTIM_CPT1CR_TIMECMP1_Pos) /*!< 0x40000000 */ +#define HRTIM_CPT1CR_TIMECMP1 HRTIM_CPT1CR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_CPT1CR_TIMECMP2_Pos (31U) +#define HRTIM_CPT1CR_TIMECMP2_Msk (0x1UL << HRTIM_CPT1CR_TIMECMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_CPT1CR_TIMECMP2 HRTIM_CPT1CR_TIMECMP2_Msk /*!< Timer E compare 2 */ + +/**** Bit definition for Slave Timer Capture 2 control register ***************/ +#define HRTIM_CPT2CR_SWCPT_Pos (0U) +#define HRTIM_CPT2CR_SWCPT_Msk (0x1UL << HRTIM_CPT2CR_SWCPT_Pos) /*!< 0x00000001 */ +#define HRTIM_CPT2CR_SWCPT HRTIM_CPT2CR_SWCPT_Msk /*!< Software capture */ +#define HRTIM_CPT2CR_UPDCPT_Pos (1U) +#define HRTIM_CPT2CR_UPDCPT_Msk (0x1UL << HRTIM_CPT2CR_UPDCPT_Pos) /*!< 0x00000002 */ +#define HRTIM_CPT2CR_UPDCPT HRTIM_CPT2CR_UPDCPT_Msk /*!< Update capture */ +#define HRTIM_CPT2CR_EXEV1CPT_Pos (2U) +#define HRTIM_CPT2CR_EXEV1CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV1CPT_Pos) /*!< 0x00000004 */ +#define HRTIM_CPT2CR_EXEV1CPT HRTIM_CPT2CR_EXEV1CPT_Msk /*!< External event 1 capture */ +#define HRTIM_CPT2CR_EXEV2CPT_Pos (3U) +#define HRTIM_CPT2CR_EXEV2CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV2CPT_Pos) /*!< 0x00000008 */ +#define HRTIM_CPT2CR_EXEV2CPT HRTIM_CPT2CR_EXEV2CPT_Msk /*!< External event 2 capture */ +#define HRTIM_CPT2CR_EXEV3CPT_Pos (4U) +#define HRTIM_CPT2CR_EXEV3CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV3CPT_Pos) /*!< 0x00000010 */ +#define HRTIM_CPT2CR_EXEV3CPT HRTIM_CPT2CR_EXEV3CPT_Msk /*!< External event 3 capture */ +#define HRTIM_CPT2CR_EXEV4CPT_Pos (5U) +#define HRTIM_CPT2CR_EXEV4CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV4CPT_Pos) /*!< 0x00000020 */ +#define HRTIM_CPT2CR_EXEV4CPT HRTIM_CPT2CR_EXEV4CPT_Msk /*!< External event 4 capture */ +#define HRTIM_CPT2CR_EXEV5CPT_Pos (6U) +#define HRTIM_CPT2CR_EXEV5CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV5CPT_Pos) /*!< 0x00000040 */ +#define HRTIM_CPT2CR_EXEV5CPT HRTIM_CPT2CR_EXEV5CPT_Msk /*!< External event 5 capture */ +#define HRTIM_CPT2CR_EXEV6CPT_Pos (7U) +#define HRTIM_CPT2CR_EXEV6CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV6CPT_Pos) /*!< 0x00000080 */ +#define HRTIM_CPT2CR_EXEV6CPT HRTIM_CPT2CR_EXEV6CPT_Msk /*!< External event 6 capture */ +#define HRTIM_CPT2CR_EXEV7CPT_Pos (8U) +#define HRTIM_CPT2CR_EXEV7CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV7CPT_Pos) /*!< 0x00000100 */ +#define HRTIM_CPT2CR_EXEV7CPT HRTIM_CPT2CR_EXEV7CPT_Msk /*!< External event 7 capture */ +#define HRTIM_CPT2CR_EXEV8CPT_Pos (9U) +#define HRTIM_CPT2CR_EXEV8CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV8CPT_Pos) /*!< 0x00000200 */ +#define HRTIM_CPT2CR_EXEV8CPT HRTIM_CPT2CR_EXEV8CPT_Msk /*!< External event 8 capture */ +#define HRTIM_CPT2CR_EXEV9CPT_Pos (10U) +#define HRTIM_CPT2CR_EXEV9CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV9CPT_Pos) /*!< 0x00000400 */ +#define HRTIM_CPT2CR_EXEV9CPT HRTIM_CPT2CR_EXEV9CPT_Msk /*!< External event 9 capture */ +#define HRTIM_CPT2CR_EXEV10CPT_Pos (11U) +#define HRTIM_CPT2CR_EXEV10CPT_Msk (0x1UL << HRTIM_CPT2CR_EXEV10CPT_Pos) /*!< 0x00000800 */ +#define HRTIM_CPT2CR_EXEV10CPT HRTIM_CPT2CR_EXEV10CPT_Msk /*!< External event 10 capture */ + +#define HRTIM_CPT2CR_TF1SET_Pos (0U) +#define HRTIM_CPT2CR_TF1SET_Msk (0x1UL << HRTIM_CPT2CR_TF1SET_Pos) /*!< 0x00000001 */ +#define HRTIM_CPT2CR_TF1SET HRTIM_CPT2CR_TF1SET_Msk /*!< Timer F output 1 set */ +#define HRTIM_CPT2CR_TF1RST_Pos (1U) +#define HRTIM_CPT2CR_TF1RST_Msk (0x1UL << HRTIM_CPT2CR_TF1RST_Pos) /*!< 0x00000002 */ +#define HRTIM_CPT2CR_TF1RST HRTIM_CPT2CR_TF1RST_Msk /*!< Timer F output 1 reset */ +#define HRTIM_CPT2CR_TIMFCMP1_Pos (2U) +#define HRTIM_CPT2CR_TIMFCMP1_Msk (0x1UL << HRTIM_CPT2CR_TIMFCMP1_Pos) /*!< 0x00000004 */ +#define HRTIM_CPT2CR_TIMFCMP1 HRTIM_CPT2CR_TIMFCMP1_Msk /*!< Timer F compare 1 */ +#define HRTIM_CPT2CR_TIMFCMP2_Pos (3U) +#define HRTIM_CPT2CR_TIMFCMP2_Msk (0x1UL << HRTIM_CPT2CR_TIMFCMP2_Pos) /*!< 0x00000008 */ +#define HRTIM_CPT2CR_TIMFCMP2 HRTIM_CPT2CR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +#define HRTIM_CPT2CR_TA1SET_Pos (12U) +#define HRTIM_CPT2CR_TA1SET_Msk (0x1UL << HRTIM_CPT2CR_TA1SET_Pos) /*!< 0x00001000 */ +#define HRTIM_CPT2CR_TA1SET HRTIM_CPT2CR_TA1SET_Msk /*!< Timer A output 1 set */ +#define HRTIM_CPT2CR_TA1RST_Pos (13U) +#define HRTIM_CPT2CR_TA1RST_Msk (0x1UL << HRTIM_CPT2CR_TA1RST_Pos) /*!< 0x00002000 */ +#define HRTIM_CPT2CR_TA1RST HRTIM_CPT2CR_TA1RST_Msk /*!< Timer A output 1 reset */ +#define HRTIM_CPT2CR_TIMACMP1_Pos (14U) +#define HRTIM_CPT2CR_TIMACMP1_Msk (0x1UL << HRTIM_CPT2CR_TIMACMP1_Pos) /*!< 0x00004000 */ +#define HRTIM_CPT2CR_TIMACMP1 HRTIM_CPT2CR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_CPT2CR_TIMACMP2_Pos (15U) +#define HRTIM_CPT2CR_TIMACMP2_Msk (0x1UL << HRTIM_CPT2CR_TIMACMP2_Pos) /*!< 0x00008000 */ +#define HRTIM_CPT2CR_TIMACMP2 HRTIM_CPT2CR_TIMACMP2_Msk /*!< Timer A compare 2 */ + +#define HRTIM_CPT2CR_TB1SET_Pos (16U) +#define HRTIM_CPT2CR_TB1SET_Msk (0x1UL << HRTIM_CPT2CR_TB1SET_Pos) /*!< 0x00010000 */ +#define HRTIM_CPT2CR_TB1SET HRTIM_CPT2CR_TB1SET_Msk /*!< Timer B output 1 set */ +#define HRTIM_CPT2CR_TB1RST_Pos (17U) +#define HRTIM_CPT2CR_TB1RST_Msk (0x1UL << HRTIM_CPT2CR_TB1RST_Pos) /*!< 0x00020000 */ +#define HRTIM_CPT2CR_TB1RST HRTIM_CPT2CR_TB1RST_Msk /*!< Timer B output 1 reset */ +#define HRTIM_CPT2CR_TIMBCMP1_Pos (18U) +#define HRTIM_CPT2CR_TIMBCMP1_Msk (0x1UL << HRTIM_CPT2CR_TIMBCMP1_Pos) /*!< 0x00040000 */ +#define HRTIM_CPT2CR_TIMBCMP1 HRTIM_CPT2CR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_CPT2CR_TIMBCMP2_Pos (19U) +#define HRTIM_CPT2CR_TIMBCMP2_Msk (0x1UL << HRTIM_CPT2CR_TIMBCMP2_Pos) /*!< 0x00080000 */ +#define HRTIM_CPT2CR_TIMBCMP2 HRTIM_CPT2CR_TIMBCMP2_Msk /*!< Timer B compare 2 */ + +#define HRTIM_CPT2CR_TC1SET_Pos (20U) +#define HRTIM_CPT2CR_TC1SET_Msk (0x1UL << HRTIM_CPT2CR_TC1SET_Pos) /*!< 0x00100000 */ +#define HRTIM_CPT2CR_TC1SET HRTIM_CPT2CR_TC1SET_Msk /*!< Timer C output 1 set */ +#define HRTIM_CPT2CR_TC1RST_Pos (21U) +#define HRTIM_CPT2CR_TC1RST_Msk (0x1UL << HRTIM_CPT2CR_TC1RST_Pos) /*!< 0x00200000 */ +#define HRTIM_CPT2CR_TC1RST HRTIM_CPT2CR_TC1RST_Msk /*!< Timer C output 1 reset */ +#define HRTIM_CPT2CR_TIMCCMP1_Pos (22U) +#define HRTIM_CPT2CR_TIMCCMP1_Msk (0x1UL << HRTIM_CPT2CR_TIMCCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_CPT2CR_TIMCCMP1 HRTIM_CPT2CR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_CPT2CR_TIMCCMP2_Pos (23U) +#define HRTIM_CPT2CR_TIMCCMP2_Msk (0x1UL << HRTIM_CPT2CR_TIMCCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_CPT2CR_TIMCCMP2 HRTIM_CPT2CR_TIMCCMP2_Msk /*!< Timer C compare 2 */ + +#define HRTIM_CPT2CR_TD1SET_Pos (24U) +#define HRTIM_CPT2CR_TD1SET_Msk (0x1UL << HRTIM_CPT2CR_TD1SET_Pos) /*!< 0x01000000 */ +#define HRTIM_CPT2CR_TD1SET HRTIM_CPT2CR_TD1SET_Msk /*!< Timer D output 1 set */ +#define HRTIM_CPT2CR_TD1RST_Pos (25U) +#define HRTIM_CPT2CR_TD1RST_Msk (0x1UL << HRTIM_CPT2CR_TD1RST_Pos) /*!< 0x02000000 */ +#define HRTIM_CPT2CR_TD1RST HRTIM_CPT2CR_TD1RST_Msk /*!< Timer D output 1 reset */ +#define HRTIM_CPT2CR_TIMDCMP1_Pos (26U) +#define HRTIM_CPT2CR_TIMDCMP1_Msk (0x1UL << HRTIM_CPT2CR_TIMDCMP1_Pos) /*!< 0x04000000 */ +#define HRTIM_CPT2CR_TIMDCMP1 HRTIM_CPT2CR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_CPT2CR_TIMDCMP2_Pos (27U) +#define HRTIM_CPT2CR_TIMDCMP2_Msk (0x1UL << HRTIM_CPT2CR_TIMDCMP2_Pos) /*!< 0x08000000 */ +#define HRTIM_CPT2CR_TIMDCMP2 HRTIM_CPT2CR_TIMDCMP2_Msk /*!< Timer D compare 2 */ + +#define HRTIM_CPT2CR_TE1SET_Pos (28U) +#define HRTIM_CPT2CR_TE1SET_Msk (0x1UL << HRTIM_CPT2CR_TE1SET_Pos) /*!< 0x10000000 */ +#define HRTIM_CPT2CR_TE1SET HRTIM_CPT2CR_TE1SET_Msk /*!< Timer E output 1 set */ +#define HRTIM_CPT2CR_TE1RST_Pos (29U) +#define HRTIM_CPT2CR_TE1RST_Msk (0x1UL << HRTIM_CPT2CR_TE1RST_Pos) /*!< 0x20000000 */ +#define HRTIM_CPT2CR_TE1RST HRTIM_CPT2CR_TE1RST_Msk /*!< Timer E output 1 reset */ +#define HRTIM_CPT2CR_TIMECMP1_Pos (30U) +#define HRTIM_CPT2CR_TIMECMP1_Msk (0x1UL << HRTIM_CPT2CR_TIMECMP1_Pos) /*!< 0x40000000 */ +#define HRTIM_CPT2CR_TIMECMP1 HRTIM_CPT2CR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_CPT2CR_TIMECMP2_Pos (31U) +#define HRTIM_CPT2CR_TIMECMP2_Msk (0x1UL << HRTIM_CPT2CR_TIMECMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_CPT2CR_TIMECMP2 HRTIM_CPT2CR_TIMECMP2_Msk /*!< Timer E compare 2 */ + +/**** Bit definition for Slave Timer Output register **************************/ +#define HRTIM_OUTR_POL1_Pos (1U) +#define HRTIM_OUTR_POL1_Msk (0x1UL << HRTIM_OUTR_POL1_Pos) /*!< 0x00000002 */ +#define HRTIM_OUTR_POL1 HRTIM_OUTR_POL1_Msk /*!< Slave output 1 polarity */ +#define HRTIM_OUTR_IDLM1_Pos (2U) +#define HRTIM_OUTR_IDLM1_Msk (0x1UL << HRTIM_OUTR_IDLM1_Pos) /*!< 0x00000004 */ +#define HRTIM_OUTR_IDLM1 HRTIM_OUTR_IDLM1_Msk /*!< Slave output 1 idle mode */ +#define HRTIM_OUTR_IDLES1_Pos (3U) +#define HRTIM_OUTR_IDLES1_Msk (0x1UL << HRTIM_OUTR_IDLES1_Pos) /*!< 0x00000008 */ +#define HRTIM_OUTR_IDLES1 HRTIM_OUTR_IDLES1_Msk /*!< Slave output 1 idle state */ +#define HRTIM_OUTR_FAULT1_Pos (4U) +#define HRTIM_OUTR_FAULT1_Msk (0x3UL << HRTIM_OUTR_FAULT1_Pos) /*!< 0x00000030 */ +#define HRTIM_OUTR_FAULT1 HRTIM_OUTR_FAULT1_Msk /*!< Slave output 1 fault state */ +#define HRTIM_OUTR_FAULT1_0 (0x1UL << HRTIM_OUTR_FAULT1_Pos) /*!< 0x00000010 */ +#define HRTIM_OUTR_FAULT1_1 (0x2UL << HRTIM_OUTR_FAULT1_Pos) /*!< 0x00000020 */ +#define HRTIM_OUTR_CHP1_Pos (6U) +#define HRTIM_OUTR_CHP1_Msk (0x1UL << HRTIM_OUTR_CHP1_Pos) /*!< 0x00000040 */ +#define HRTIM_OUTR_CHP1 HRTIM_OUTR_CHP1_Msk /*!< Slave output 1 chopper enable */ +#define HRTIM_OUTR_DIDL1_Pos (7U) +#define HRTIM_OUTR_DIDL1_Msk (0x1UL << HRTIM_OUTR_DIDL1_Pos) /*!< 0x00000080 */ +#define HRTIM_OUTR_DIDL1 HRTIM_OUTR_DIDL1_Msk /*!< Slave output 1 dead time idle */ + +#define HRTIM_OUTR_DTEN_Pos (8U) +#define HRTIM_OUTR_DTEN_Msk (0x1UL << HRTIM_OUTR_DTEN_Pos) /*!< 0x00000100 */ +#define HRTIM_OUTR_DTEN HRTIM_OUTR_DTEN_Msk /*!< Slave output deadtime enable */ +#define HRTIM_OUTR_DLYPRTEN_Pos (9U) +#define HRTIM_OUTR_DLYPRTEN_Msk (0x1UL << HRTIM_OUTR_DLYPRTEN_Pos) /*!< 0x00000200 */ +#define HRTIM_OUTR_DLYPRTEN HRTIM_OUTR_DLYPRTEN_Msk /*!< Slave output delay protection enable */ +#define HRTIM_OUTR_DLYPRT_Pos (10U) +#define HRTIM_OUTR_DLYPRT_Msk (0x7UL << HRTIM_OUTR_DLYPRT_Pos) /*!< 0x00001C00 */ +#define HRTIM_OUTR_DLYPRT HRTIM_OUTR_DLYPRT_Msk /*!< Slave output delay protection */ +#define HRTIM_OUTR_DLYPRT_0 (0x1UL << HRTIM_OUTR_DLYPRT_Pos) /*!< 0x00000400 */ +#define HRTIM_OUTR_DLYPRT_1 (0x2UL << HRTIM_OUTR_DLYPRT_Pos) /*!< 0x00000800 */ +#define HRTIM_OUTR_DLYPRT_2 (0x4UL << HRTIM_OUTR_DLYPRT_Pos) /*!< 0x00001000 */ +#define HRTIM_OUTR_BIAR_Pos (14U) +#define HRTIM_OUTR_BIAR_Msk (0x1UL << HRTIM_OUTR_BIAR_Pos) /*!< 0x00004000 */ +#define HRTIM_OUTR_BIAR HRTIM_OUTR_BIAR_Msk /*!< Slave output Balanced Idle Automatic resume */ +#define HRTIM_OUTR_POL2_Pos (17U) +#define HRTIM_OUTR_POL2_Msk (0x1UL << HRTIM_OUTR_POL2_Pos) /*!< 0x00020000 */ +#define HRTIM_OUTR_POL2 HRTIM_OUTR_POL2_Msk /*!< Slave output 2 polarity */ +#define HRTIM_OUTR_IDLM2_Pos (18U) +#define HRTIM_OUTR_IDLM2_Msk (0x1UL << HRTIM_OUTR_IDLM2_Pos) /*!< 0x00040000 */ +#define HRTIM_OUTR_IDLM2 HRTIM_OUTR_IDLM2_Msk /*!< Slave output 2 idle mode */ +#define HRTIM_OUTR_IDLES2_Pos (19U) +#define HRTIM_OUTR_IDLES2_Msk (0x1UL << HRTIM_OUTR_IDLES2_Pos) /*!< 0x00080000 */ +#define HRTIM_OUTR_IDLES2 HRTIM_OUTR_IDLES2_Msk /*!< Slave output 2 idle state */ +#define HRTIM_OUTR_FAULT2_Pos (20U) +#define HRTIM_OUTR_FAULT2_Msk (0x3UL << HRTIM_OUTR_FAULT2_Pos) /*!< 0x00300000 */ +#define HRTIM_OUTR_FAULT2 HRTIM_OUTR_FAULT2_Msk /*!< Slave output 2 fault state */ +#define HRTIM_OUTR_FAULT2_0 (0x1UL << HRTIM_OUTR_FAULT2_Pos) /*!< 0x00100000 */ +#define HRTIM_OUTR_FAULT2_1 (0x2UL << HRTIM_OUTR_FAULT2_Pos) /*!< 0x00200000 */ +#define HRTIM_OUTR_CHP2_Pos (22U) +#define HRTIM_OUTR_CHP2_Msk (0x1UL << HRTIM_OUTR_CHP2_Pos) /*!< 0x00400000 */ +#define HRTIM_OUTR_CHP2 HRTIM_OUTR_CHP2_Msk /*!< Slave output 2 chopper enable */ +#define HRTIM_OUTR_DIDL2_Pos (23U) +#define HRTIM_OUTR_DIDL2_Msk (0x1UL << HRTIM_OUTR_DIDL2_Pos) /*!< 0x00800000 */ +#define HRTIM_OUTR_DIDL2 HRTIM_OUTR_DIDL2_Msk /*!< Slave output 2 dead time idle */ + +/**** Bit definition for Timerx Fault register ***************************/ +#define HRTIM_FLTR_FLT1EN_Pos (0U) +#define HRTIM_FLTR_FLT1EN_Msk (0x1UL << HRTIM_FLTR_FLT1EN_Pos) /*!< 0x00000001 */ +#define HRTIM_FLTR_FLT1EN HRTIM_FLTR_FLT1EN_Msk /*!< Fault 1 enable */ +#define HRTIM_FLTR_FLT2EN_Pos (1U) +#define HRTIM_FLTR_FLT2EN_Msk (0x1UL << HRTIM_FLTR_FLT2EN_Pos) /*!< 0x00000002 */ +#define HRTIM_FLTR_FLT2EN HRTIM_FLTR_FLT2EN_Msk /*!< Fault 2 enable */ +#define HRTIM_FLTR_FLT3EN_Pos (2U) +#define HRTIM_FLTR_FLT3EN_Msk (0x1UL << HRTIM_FLTR_FLT3EN_Pos) /*!< 0x00000004 */ +#define HRTIM_FLTR_FLT3EN HRTIM_FLTR_FLT3EN_Msk /*!< Fault 3 enable */ +#define HRTIM_FLTR_FLT4EN_Pos (3U) +#define HRTIM_FLTR_FLT4EN_Msk (0x1UL << HRTIM_FLTR_FLT4EN_Pos) /*!< 0x00000008 */ +#define HRTIM_FLTR_FLT4EN HRTIM_FLTR_FLT4EN_Msk /*!< Fault 4 enable */ +#define HRTIM_FLTR_FLT5EN_Pos (4U) +#define HRTIM_FLTR_FLT5EN_Msk (0x1UL << HRTIM_FLTR_FLT5EN_Pos) /*!< 0x00000010 */ +#define HRTIM_FLTR_FLT5EN HRTIM_FLTR_FLT5EN_Msk /*!< Fault 5 enable */ +#define HRTIM_FLTR_FLT6EN_Pos (5U) +#define HRTIM_FLTR_FLT6EN_Msk (0x1UL << HRTIM_FLTR_FLT6EN_Pos) /*!< 0x00000020 */ +#define HRTIM_FLTR_FLT6EN HRTIM_FLTR_FLT6EN_Msk /*!< Fault 6 enable */ +#define HRTIM_FLTR_FLTLCK_Pos (31U) +#define HRTIM_FLTR_FLTLCK_Msk (0x1UL << HRTIM_FLTR_FLTLCK_Pos) /*!< 0x80000000 */ +#define HRTIM_FLTR_FLTLCK HRTIM_FLTR_FLTLCK_Msk /*!< Fault sources lock */ + +/**** Bit definition for HRTIM Timerx control register 2 ****************/ +#define HRTIM_TIMCR2_DCDE_Pos (0U) +#define HRTIM_TIMCR2_DCDE_Msk (0x1UL << HRTIM_TIMCR2_DCDE_Pos) /*!< 0x00000001 */ +#define HRTIM_TIMCR2_DCDE HRTIM_TIMCR2_DCDE_Msk /*!< Dual Channel DAC trigger enable */ +#define HRTIM_TIMCR2_DCDS_Pos (1U) +#define HRTIM_TIMCR2_DCDS_Msk (0x1UL << HRTIM_TIMCR2_DCDS_Pos) /*!< 0x00000002 */ +#define HRTIM_TIMCR2_DCDS HRTIM_TIMCR2_DCDS_Msk /*!< Dual Channel DAC step trigger */ +#define HRTIM_TIMCR2_DCDR_Pos (2U) +#define HRTIM_TIMCR2_DCDR_Msk (0x1UL << HRTIM_TIMCR2_DCDR_Pos) /*!< 0x00000004 */ +#define HRTIM_TIMCR2_DCDR HRTIM_TIMCR2_DCDR_Msk /*!< Dual Channel DAC reset trigger */ +#define HRTIM_TIMCR2_UDM_Pos (4U) +#define HRTIM_TIMCR2_UDM_Msk (0x1UL << HRTIM_TIMCR2_UDM_Pos) /*!< 0x00000010 */ +#define HRTIM_TIMCR2_UDM HRTIM_TIMCR2_UDM_Msk /*!< Up-Down Mode*/ +#define HRTIM_TIMCR2_ROM_Pos (6U) +#define HRTIM_TIMCR2_ROM_Msk (0x3UL << HRTIM_TIMCR2_ROM_Pos) /*!< 0x000000C0 */ +#define HRTIM_TIMCR2_ROM HRTIM_TIMCR2_ROM_Msk /*!< Roll-over Mode */ +#define HRTIM_TIMCR2_ROM_0 (0x1UL << HRTIM_TIMCR2_ROM_Pos) /*!< 0x00000040 */ +#define HRTIM_TIMCR2_ROM_1 (0x2UL << HRTIM_TIMCR2_ROM_Pos) /*!< 0x00000080 */ +#define HRTIM_TIMCR2_OUTROM_Pos (8U) +#define HRTIM_TIMCR2_OUTROM_Msk (0x3UL << HRTIM_TIMCR2_OUTROM_Pos) /*!< 0x00000300 */ +#define HRTIM_TIMCR2_OUTROM HRTIM_TIMCR2_OUTROM_Msk /*!< Output Roll-Over Mode */ +#define HRTIM_TIMCR2_OUTROM_0 (0x1UL << HRTIM_TIMCR2_OUTROM_Pos) /*!< 0x00000100 */ +#define HRTIM_TIMCR2_OUTROM_1 (0x2UL << HRTIM_TIMCR2_OUTROM_Pos) /*!< 0x00000200 */ +#define HRTIM_TIMCR2_ADROM_Pos (10U) +#define HRTIM_TIMCR2_ADROM_Msk (0x3UL << HRTIM_TIMCR2_ADROM_Pos) /*!< 0x00000C00 */ +#define HRTIM_TIMCR2_ADROM HRTIM_TIMCR2_ADROM_Msk /*!< ADC Roll-Over Mode */ +#define HRTIM_TIMCR2_ADROM_0 (0x1UL << HRTIM_TIMCR2_ADROM_Pos) /*!< 0x00000400 */ +#define HRTIM_TIMCR2_ADROM_1 (0x2UL << HRTIM_TIMCR2_ADROM_Pos) /*!< 0x00000800 */ +#define HRTIM_TIMCR2_BMROM_Pos (12U) +#define HRTIM_TIMCR2_BMROM_Msk (0x3UL << HRTIM_TIMCR2_BMROM_Pos) /*!< 0x00003000 */ +#define HRTIM_TIMCR2_BMROM HRTIM_TIMCR2_BMROM_Msk /*!< Burst Mode Rollover Mode */ +#define HRTIM_TIMCR2_BMROM_0 (0x1UL << HRTIM_TIMCR2_BMROM_Pos) /*!< 0x00001000 */ +#define HRTIM_TIMCR2_BMROM_1 (0x2UL << HRTIM_TIMCR2_BMROM_Pos) /*!< 0x00002000 */ +#define HRTIM_TIMCR2_FEROM_Pos (14U) +#define HRTIM_TIMCR2_FEROM_Msk (0x3UL << HRTIM_TIMCR2_FEROM_Pos) /*!< 0x0000C000 */ +#define HRTIM_TIMCR2_FEROM HRTIM_TIMCR2_FEROM_Msk /*!< Fault and Event Rollover Mode */ +#define HRTIM_TIMCR2_FEROM_0 (0x1UL << HRTIM_TIMCR2_FEROM_Pos) /*!< 0x00004000 */ +#define HRTIM_TIMCR2_FEROM_1 (0x2UL << HRTIM_TIMCR2_FEROM_Pos) /*!< 0x00008000 */ +#define HRTIM_TIMCR2_GTCMP1_Pos (16U) +#define HRTIM_TIMCR2_GTCMP1_Msk (0x1UL << HRTIM_TIMCR2_GTCMP1_Pos) /*!< 0x00010000 */ +#define HRTIM_TIMCR2_GTCMP1 HRTIM_TIMCR2_GTCMP1_Msk /*!< Greater than Compare 1 PWM mode */ +#define HRTIM_TIMCR2_GTCMP3_Pos (17U) +#define HRTIM_TIMCR2_GTCMP3_Msk (0x1UL << HRTIM_TIMCR2_GTCMP3_Pos) /*!< 0x00020000 */ +#define HRTIM_TIMCR2_GTCMP3 HRTIM_TIMCR2_GTCMP3_Msk /*!< Greater than Compare 3 PWM mode */ +#define HRTIM_TIMCR2_TRGHLF_Pos (20U) +#define HRTIM_TIMCR2_TRGHLF_Msk (0x1UL << HRTIM_TIMCR2_TRGHLF_Pos) /*!< 0x00100000 */ +#define HRTIM_TIMCR2_TRGHLF HRTIM_TIMCR2_TRGHLF_Msk /*!< Triggered-Half mode */ + +/**** Bit definition for Slave external event filtering register 3 ***********/ +#define HRTIM_EEFR3_EEVACE_Pos (0U) +#define HRTIM_EEFR3_EEVACE_Msk (0x1UL << HRTIM_EEFR3_EEVACE_Pos) /*!< 0x00000001 */ +#define HRTIM_EEFR3_EEVACE HRTIM_EEFR3_EEVACE_Msk /*!< External Event A Counter Enable */ +#define HRTIM_EEFR3_EEVACRES_Pos (1U) +#define HRTIM_EEFR3_EEVACRES_Msk (0x1UL << HRTIM_EEFR3_EEVACRES_Pos) /*!< 0x00000002 */ +#define HRTIM_EEFR3_EEVACRES HRTIM_EEFR3_EEVACRES_Msk /*!< External Event A Counter Reset */ +#define HRTIM_EEFR3_EEVARSTM_Pos (2U) +#define HRTIM_EEFR3_EEVARSTM_Msk (0x1UL << HRTIM_EEFR3_EEVARSTM_Pos) /*!< 0x00000004 */ +#define HRTIM_EEFR3_EEVARSTM HRTIM_EEFR3_EEVARSTM_Msk /*!< External Event A Counter Reset Mode */ +#define HRTIM_EEFR3_EEVASEL_Pos (4U) +#define HRTIM_EEFR3_EEVASEL_Msk (0xFUL << HRTIM_EEFR3_EEVASEL_Pos) /*!< 0x000000F0 */ +#define HRTIM_EEFR3_EEVASEL HRTIM_EEFR3_EEVASEL_Msk /*!< External Event A Selection */ +#define HRTIM_EEFR3_EEVASEL_0 (0x1UL << HRTIM_EEFR3_EEVASEL_Pos) /*!< 0x00000010 */ +#define HRTIM_EEFR3_EEVASEL_1 (0x2UL << HRTIM_EEFR3_EEVASEL_Pos) /*!< 0x00000020 */ +#define HRTIM_EEFR3_EEVASEL_2 (0x4UL << HRTIM_EEFR3_EEVASEL_Pos) /*!< 0x00000040 */ +#define HRTIM_EEFR3_EEVASEL_3 (0x8UL << HRTIM_EEFR3_EEVASEL_Pos) /*!< 0x00000080 */ +#define HRTIM_EEFR3_EEVACNT_Pos (8U) +#define HRTIM_EEFR3_EEVACNT_Msk (0x3FUL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x00003F00 */ +#define HRTIM_EEFR3_EEVACNT HRTIM_EEFR3_EEVACNT_Msk /*!< External Event A Selection */ +#define HRTIM_EEFR3_EEVACNT_0 (0x1UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x00000100 */ +#define HRTIM_EEFR3_EEVACNT_1 (0x2UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x00000200 */ +#define HRTIM_EEFR3_EEVACNT_2 (0x4UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x00000400 */ +#define HRTIM_EEFR3_EEVACNT_3 (0x8UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x00000800 */ +#define HRTIM_EEFR3_EEVACNT_4 (0x10UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x00001000 */ +#define HRTIM_EEFR3_EEVACNT_5 (0x20UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x00002000 */ +#define HRTIM_EEFR3_EEVBCE_Pos (16U) +#define HRTIM_EEFR3_EEVBCE_Msk (0x1UL << HRTIM_EEFR3_EEVBCE_Pos) /*!< 0x00010000 */ +#define HRTIM_EEFR3_EEVBCE HRTIM_EEFR3_EEVBCE_Msk /*!< External Event B Counter Enable */ +#define HRTIM_EEFR3_EEVBCRES_Pos (17U) +#define HRTIM_EEFR3_EEVBCRES_Msk (0x1UL << HRTIM_EEFR3_EEVBCRES_Pos) /*!< 0x00020000 */ +#define HRTIM_EEFR3_EEVBCRES HRTIM_EEFR3_EEVBCRES_Msk /*!< External Event B Counter Reset */ +#define HRTIM_EEFR3_EEVBRSTM_Pos (18U) +#define HRTIM_EEFR3_EEVBRSTM_Msk (0x1UL << HRTIM_EEFR3_EEVBRSTM_Pos) /*!< 0x00040000 */ +#define HRTIM_EEFR3_EEVBRSTM HRTIM_EEFR3_EEVBRSTM_Msk /*!< External Event B Counter Reset Mode */ +#define HRTIM_EEFR3_EEVBSEL_Pos (20U) +#define HRTIM_EEFR3_EEVBSEL_Msk (0xFUL << HRTIM_EEFR3_EEVBSEL_Pos) /*!< 0x00F00000 */ +#define HRTIM_EEFR3_EEVBSEL HRTIM_EEFR3_EEVBSEL_Msk /*!< External Event B Selection */ +#define HRTIM_EEFR3_EEVBSEL_0 (0x1UL << HRTIM_EEFR3_EEVBSEL_Pos) /*!< 0x00100000 */ +#define HRTIM_EEFR3_EEVBSEL_1 (0x2UL << HRTIM_EEFR3_EEVBSEL_Pos) /*!< 0x00200000 */ +#define HRTIM_EEFR3_EEVBSEL_2 (0x4UL << HRTIM_EEFR3_EEVBSEL_Pos) /*!< 0x00400000 */ +#define HRTIM_EEFR3_EEVBSEL_3 (0x8UL << HRTIM_EEFR3_EEVBSEL_Pos) /*!< 0x00800000 */ +#define HRTIM_EEFR3_EEVBCNT_Pos (24U) +#define HRTIM_EEFR3_EEVBCNT_Msk (0x3FUL << HRTIM_EEFR3_EEVBCNT_Pos) /*!< 0x3F000000 */ +#define HRTIM_EEFR3_EEVBCNT HRTIM_EEFR3_EEVBCNT_Msk /*!< External Event B Counter */ +#define HRTIM_EEFR3_EEVBCNT_0 (0x1UL << HRTIM_EEFR3_EEVBCNT_Pos) /*!< 0x01000000 */ +#define HRTIM_EEFR3_EEVBCNT_1 (0x2UL << HRTIM_EEFR3_EEVBCNT_Pos) /*!< 0x02000000 */ +#define HRTIM_EEFR3_EEVBCNT_2 (0x4UL << HRTIM_EEFR3_EEVBCNT_Pos) /*!< 0x04000000 */ +#define HRTIM_EEFR3_EEVBCNT_3 (0x8UL << HRTIM_EEFR3_EEVBCNT_Pos) /*!< 0x08000000 */ +#define HRTIM_EEFR3_EEVBCNT_4 (0x10UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x10000000 */ +#define HRTIM_EEFR3_EEVBCNT_5 (0x20UL << HRTIM_EEFR3_EEVACNT_Pos) /*!< 0x20000000 */ + +/**** Bit definition for Common HRTIM Timer control register 1 ****************/ +#define HRTIM_CR1_MUDIS_Pos (0U) +#define HRTIM_CR1_MUDIS_Msk (0x1UL << HRTIM_CR1_MUDIS_Pos) /*!< 0x00000001 */ +#define HRTIM_CR1_MUDIS HRTIM_CR1_MUDIS_Msk /*!< Master update disable*/ +#define HRTIM_CR1_TAUDIS_Pos (1U) +#define HRTIM_CR1_TAUDIS_Msk (0x1UL << HRTIM_CR1_TAUDIS_Pos) /*!< 0x00000002 */ +#define HRTIM_CR1_TAUDIS HRTIM_CR1_TAUDIS_Msk /*!< Timer A update disable*/ +#define HRTIM_CR1_TBUDIS_Pos (2U) +#define HRTIM_CR1_TBUDIS_Msk (0x1UL << HRTIM_CR1_TBUDIS_Pos) /*!< 0x00000004 */ +#define HRTIM_CR1_TBUDIS HRTIM_CR1_TBUDIS_Msk /*!< Timer B update disable*/ +#define HRTIM_CR1_TCUDIS_Pos (3U) +#define HRTIM_CR1_TCUDIS_Msk (0x1UL << HRTIM_CR1_TCUDIS_Pos) /*!< 0x00000008 */ +#define HRTIM_CR1_TCUDIS HRTIM_CR1_TCUDIS_Msk /*!< Timer C update disable*/ +#define HRTIM_CR1_TDUDIS_Pos (4U) +#define HRTIM_CR1_TDUDIS_Msk (0x1UL << HRTIM_CR1_TDUDIS_Pos) /*!< 0x00000010 */ +#define HRTIM_CR1_TDUDIS HRTIM_CR1_TDUDIS_Msk /*!< Timer D update disable*/ +#define HRTIM_CR1_TEUDIS_Pos (5U) +#define HRTIM_CR1_TEUDIS_Msk (0x1UL << HRTIM_CR1_TEUDIS_Pos) /*!< 0x00000020 */ +#define HRTIM_CR1_TEUDIS HRTIM_CR1_TEUDIS_Msk /*!< Timer E update disable*/ +#define HRTIM_CR1_TFUDIS_Pos (6U) +#define HRTIM_CR1_TFUDIS_Msk (0x1UL << HRTIM_CR1_TFUDIS_Pos) /*!< 0x00000040 */ +#define HRTIM_CR1_TFUDIS HRTIM_CR1_TFUDIS_Msk /*!< Timer F update disable*/ +#define HRTIM_CR1_ADC1USRC_Pos (16U) +#define HRTIM_CR1_ADC1USRC_Msk (0x7UL << HRTIM_CR1_ADC1USRC_Pos) /*!< 0x00070000 */ +#define HRTIM_CR1_ADC1USRC HRTIM_CR1_ADC1USRC_Msk /*!< ADC Trigger 1 update source */ +#define HRTIM_CR1_ADC1USRC_0 (0x1UL << HRTIM_CR1_ADC1USRC_Pos) /*!< 0x00010000 */ +#define HRTIM_CR1_ADC1USRC_1 (0x2UL << HRTIM_CR1_ADC1USRC_Pos) /*!< 0x00020000 */ +#define HRTIM_CR1_ADC1USRC_2 (0x4UL << HRTIM_CR1_ADC1USRC_Pos) /*!< 0x00040000 */ +#define HRTIM_CR1_ADC2USRC_Pos (19U) +#define HRTIM_CR1_ADC2USRC_Msk (0x7UL << HRTIM_CR1_ADC2USRC_Pos) /*!< 0x00380000 */ +#define HRTIM_CR1_ADC2USRC HRTIM_CR1_ADC2USRC_Msk /*!< ADC Trigger 2 update source */ +#define HRTIM_CR1_ADC2USRC_0 (0x1UL << HRTIM_CR1_ADC2USRC_Pos) /*!< 0x00080000 */ +#define HRTIM_CR1_ADC2USRC_1 (0x2UL << HRTIM_CR1_ADC2USRC_Pos) /*!< 0x00100000 */ +#define HRTIM_CR1_ADC2USRC_2 (0x4UL << HRTIM_CR1_ADC2USRC_Pos) /*!< 0x00200000 */ +#define HRTIM_CR1_ADC3USRC_Pos (22U) +#define HRTIM_CR1_ADC3USRC_Msk (0x7UL << HRTIM_CR1_ADC3USRC_Pos) /*!< 0x01C00000 */ +#define HRTIM_CR1_ADC3USRC HRTIM_CR1_ADC3USRC_Msk /*!< ADC Trigger 3 update source */ +#define HRTIM_CR1_ADC3USRC_0 (0x1UL << HRTIM_CR1_ADC3USRC_Pos) /*!< 0x00400000 */ +#define HRTIM_CR1_ADC3USRC_1 (0x2UL << HRTIM_CR1_ADC3USRC_Pos) /*!< 0x00800000 */ +#define HRTIM_CR1_ADC3USRC_2 (0x4UL << HRTIM_CR1_ADC3USRC_Pos) /*!< 0x01000000 */ +#define HRTIM_CR1_ADC4USRC_Pos (25U) +#define HRTIM_CR1_ADC4USRC_Msk (0x7UL << HRTIM_CR1_ADC4USRC_Pos) /*!< 0x0E000000 */ +#define HRTIM_CR1_ADC4USRC HRTIM_CR1_ADC4USRC_Msk /*!< ADC Trigger 4 update source */ +#define HRTIM_CR1_ADC4USRC_0 (0x1UL << HRTIM_CR1_ADC4USRC_Pos) /*!< 0x02000000 */ +#define HRTIM_CR1_ADC4USRC_1 (0x2UL << HRTIM_CR1_ADC4USRC_Pos) /*!< 0x04000000 */ +#define HRTIM_CR1_ADC4USRC_2 (0x0UL << HRTIM_CR1_ADC4USRC_Pos) /*!< 0x0800000 */ + +/**** Bit definition for Common HRTIM Timer control register 2 ****************/ +#define HRTIM_CR2_MSWU_Pos (0U) +#define HRTIM_CR2_MSWU_Msk (0x1UL << HRTIM_CR2_MSWU_Pos) /*!< 0x00000001 */ +#define HRTIM_CR2_MSWU HRTIM_CR2_MSWU_Msk /*!< Master software update */ +#define HRTIM_CR2_TASWU_Pos (1U) +#define HRTIM_CR2_TASWU_Msk (0x1UL << HRTIM_CR2_TASWU_Pos) /*!< 0x00000002 */ +#define HRTIM_CR2_TASWU HRTIM_CR2_TASWU_Msk /*!< Timer A software update */ +#define HRTIM_CR2_TBSWU_Pos (2U) +#define HRTIM_CR2_TBSWU_Msk (0x1UL << HRTIM_CR2_TBSWU_Pos) /*!< 0x00000004 */ +#define HRTIM_CR2_TBSWU HRTIM_CR2_TBSWU_Msk /*!< Timer B software update */ +#define HRTIM_CR2_TCSWU_Pos (3U) +#define HRTIM_CR2_TCSWU_Msk (0x1UL << HRTIM_CR2_TCSWU_Pos) /*!< 0x00000008 */ +#define HRTIM_CR2_TCSWU HRTIM_CR2_TCSWU_Msk /*!< Timer C software update */ +#define HRTIM_CR2_TDSWU_Pos (4U) +#define HRTIM_CR2_TDSWU_Msk (0x1UL << HRTIM_CR2_TDSWU_Pos) /*!< 0x00000010 */ +#define HRTIM_CR2_TDSWU HRTIM_CR2_TDSWU_Msk /*!< Timer D software update */ +#define HRTIM_CR2_TESWU_Pos (5U) +#define HRTIM_CR2_TESWU_Msk (0x1UL << HRTIM_CR2_TESWU_Pos) /*!< 0x00000020 */ +#define HRTIM_CR2_TESWU HRTIM_CR2_TESWU_Msk /*!< Timer E software update */ +#define HRTIM_CR2_TFSWU_Pos (6U) +#define HRTIM_CR2_TFSWU_Msk (0x1UL << HRTIM_CR2_TFSWU_Pos) /*!< 0x00000040 */ +#define HRTIM_CR2_TFSWU HRTIM_CR2_TFSWU_Msk /*!< Timer F software update */ +#define HRTIM_CR2_MRST_Pos (8U) +#define HRTIM_CR2_MRST_Msk (0x1UL << HRTIM_CR2_MRST_Pos) /*!< 0x00000100 */ +#define HRTIM_CR2_MRST HRTIM_CR2_MRST_Msk /*!< Master count software reset */ +#define HRTIM_CR2_TARST_Pos (9U) +#define HRTIM_CR2_TARST_Msk (0x1UL << HRTIM_CR2_TARST_Pos) /*!< 0x00000200 */ +#define HRTIM_CR2_TARST HRTIM_CR2_TARST_Msk /*!< Timer A count software reset */ +#define HRTIM_CR2_TBRST_Pos (10U) +#define HRTIM_CR2_TBRST_Msk (0x1UL << HRTIM_CR2_TBRST_Pos) /*!< 0x00000400 */ +#define HRTIM_CR2_TBRST HRTIM_CR2_TBRST_Msk /*!< Timer B count software reset */ +#define HRTIM_CR2_TCRST_Pos (11U) +#define HRTIM_CR2_TCRST_Msk (0x1UL << HRTIM_CR2_TCRST_Pos) /*!< 0x00000800 */ +#define HRTIM_CR2_TCRST HRTIM_CR2_TCRST_Msk /*!< Timer C count software reset */ +#define HRTIM_CR2_TDRST_Pos (12U) +#define HRTIM_CR2_TDRST_Msk (0x1UL << HRTIM_CR2_TDRST_Pos) /*!< 0x00001000 */ +#define HRTIM_CR2_TDRST HRTIM_CR2_TDRST_Msk /*!< Timer D count software reset */ +#define HRTIM_CR2_TERST_Pos (13U) +#define HRTIM_CR2_TERST_Msk (0x1UL << HRTIM_CR2_TERST_Pos) /*!< 0x00002000 */ +#define HRTIM_CR2_TERST HRTIM_CR2_TERST_Msk /*!< Timer E count software reset */ +#define HRTIM_CR2_TFRST_Pos (14U) +#define HRTIM_CR2_TFRST_Msk (0x1UL << HRTIM_CR2_TFRST_Pos) /*!< 0x00004000 */ +#define HRTIM_CR2_TFRST HRTIM_CR2_TFRST_Msk /*!< Timer F count software reset */ +#define HRTIM_CR2_SWPA_Pos (16U) +#define HRTIM_CR2_SWPA_Msk (0x1UL << HRTIM_CR2_SWPA_Pos) /*!< 0x00010000 */ +#define HRTIM_CR2_SWPA HRTIM_CR2_SWPA_Msk /*!< Timer A swap outputs */ +#define HRTIM_CR2_SWPB_Pos (17U) +#define HRTIM_CR2_SWPB_Msk (0x1UL << HRTIM_CR2_SWPB_Pos) /*!< 0x00020000 */ +#define HRTIM_CR2_SWPB HRTIM_CR2_SWPB_Msk /*!< Timer B swap outputs */ +#define HRTIM_CR2_SWPC_Pos (18U) +#define HRTIM_CR2_SWPC_Msk (0x1UL << HRTIM_CR2_SWPC_Pos) /*!< 0x00040000 */ +#define HRTIM_CR2_SWPC HRTIM_CR2_SWPC_Msk /*!< Timer C swap outputs */ +#define HRTIM_CR2_SWPD_Pos (19U) +#define HRTIM_CR2_SWPD_Msk (0x1UL << HRTIM_CR2_SWPD_Pos) /*!< 0x00080000 */ +#define HRTIM_CR2_SWPD HRTIM_CR2_SWPD_Msk /*!< Timer D swap outputs */ +#define HRTIM_CR2_SWPE_Pos (20U) +#define HRTIM_CR2_SWPE_Msk (0x1UL << HRTIM_CR2_SWPE_Pos) /*!< 0x00100000 */ +#define HRTIM_CR2_SWPE HRTIM_CR2_SWPE_Msk /*!< Timer E swap outputs */ +#define HRTIM_CR2_SWPF_Pos (21U) +#define HRTIM_CR2_SWPF_Msk (0x1UL << HRTIM_CR2_SWPF_Pos) /*!< 0x00200000 */ +#define HRTIM_CR2_SWPF HRTIM_CR2_SWPF_Msk /*!< Timer F swap outputs */ + +/**** Bit definition for Common HRTIM Timer interrupt status register *********/ +#define HRTIM_ISR_FLT1_Pos (0U) +#define HRTIM_ISR_FLT1_Msk (0x1UL << HRTIM_ISR_FLT1_Pos) /*!< 0x00000001 */ +#define HRTIM_ISR_FLT1 HRTIM_ISR_FLT1_Msk /*!< Fault 1 interrupt flag */ +#define HRTIM_ISR_FLT2_Pos (1U) +#define HRTIM_ISR_FLT2_Msk (0x1UL << HRTIM_ISR_FLT2_Pos) /*!< 0x00000002 */ +#define HRTIM_ISR_FLT2 HRTIM_ISR_FLT2_Msk /*!< Fault 2 interrupt flag */ +#define HRTIM_ISR_FLT3_Pos (2U) +#define HRTIM_ISR_FLT3_Msk (0x1UL << HRTIM_ISR_FLT3_Pos) /*!< 0x00000004 */ +#define HRTIM_ISR_FLT3 HRTIM_ISR_FLT3_Msk /*!< Fault 3 interrupt flag */ +#define HRTIM_ISR_FLT4_Pos (3U) +#define HRTIM_ISR_FLT4_Msk (0x1UL << HRTIM_ISR_FLT4_Pos) /*!< 0x00000008 */ +#define HRTIM_ISR_FLT4 HRTIM_ISR_FLT4_Msk /*!< Fault 4 interrupt flag */ +#define HRTIM_ISR_FLT5_Pos (4U) +#define HRTIM_ISR_FLT5_Msk (0x1UL << HRTIM_ISR_FLT5_Pos) /*!< 0x00000010 */ +#define HRTIM_ISR_FLT5 HRTIM_ISR_FLT5_Msk /*!< Fault 5 interrupt flag */ +#define HRTIM_ISR_SYSFLT_Pos (5U) +#define HRTIM_ISR_SYSFLT_Msk (0x1UL << HRTIM_ISR_SYSFLT_Pos) /*!< 0x00000020 */ +#define HRTIM_ISR_SYSFLT HRTIM_ISR_SYSFLT_Msk /*!< System Fault interrupt flag */ +#define HRTIM_ISR_FLT6_Pos (6U) +#define HRTIM_ISR_FLT6_Msk (0x1UL << HRTIM_ISR_FLT6_Pos) /*!< 0x00000040 */ +#define HRTIM_ISR_FLT6 HRTIM_ISR_FLT6_Msk /*!< Fault 6 interrupt flag */ +#define HRTIM_ISR_DLLRDY_Pos (16U) +#define HRTIM_ISR_DLLRDY_Msk (0x1UL << HRTIM_ISR_DLLRDY_Pos) /*!< 0x00010000 */ +#define HRTIM_ISR_DLLRDY HRTIM_ISR_DLLRDY_Msk /*!< DLL ready interrupt flag */ +#define HRTIM_ISR_BMPER_Pos (17U) +#define HRTIM_ISR_BMPER_Msk (0x1UL << HRTIM_ISR_BMPER_Pos) /*!< 0x00020000 */ +#define HRTIM_ISR_BMPER HRTIM_ISR_BMPER_Msk /*!< Burst mode period interrupt flag */ + +/**** Bit definition for Common HRTIM Timer interrupt clear register **********/ +#define HRTIM_ICR_FLT1C_Pos (0U) +#define HRTIM_ICR_FLT1C_Msk (0x1UL << HRTIM_ICR_FLT1C_Pos) /*!< 0x00000001 */ +#define HRTIM_ICR_FLT1C HRTIM_ICR_FLT1C_Msk /*!< Fault 1 interrupt flag clear */ +#define HRTIM_ICR_FLT2C_Pos (1U) +#define HRTIM_ICR_FLT2C_Msk (0x1UL << HRTIM_ICR_FLT2C_Pos) /*!< 0x00000002 */ +#define HRTIM_ICR_FLT2C HRTIM_ICR_FLT2C_Msk /*!< Fault 2 interrupt flag clear */ +#define HRTIM_ICR_FLT3C_Pos (2U) +#define HRTIM_ICR_FLT3C_Msk (0x1UL << HRTIM_ICR_FLT3C_Pos) /*!< 0x00000004 */ +#define HRTIM_ICR_FLT3C HRTIM_ICR_FLT3C_Msk /*!< Fault 3 interrupt flag clear */ +#define HRTIM_ICR_FLT4C_Pos (3U) +#define HRTIM_ICR_FLT4C_Msk (0x1UL << HRTIM_ICR_FLT4C_Pos) /*!< 0x00000008 */ +#define HRTIM_ICR_FLT4C HRTIM_ICR_FLT4C_Msk /*!< Fault 4 interrupt flag clear */ +#define HRTIM_ICR_FLT5C_Pos (4U) +#define HRTIM_ICR_FLT5C_Msk (0x1UL << HRTIM_ICR_FLT5C_Pos) /*!< 0x00000010 */ +#define HRTIM_ICR_FLT5C HRTIM_ICR_FLT5C_Msk /*!< Fault 5 interrupt flag clear */ +#define HRTIM_ICR_SYSFLTC_Pos (5U) +#define HRTIM_ICR_SYSFLTC_Msk (0x1UL << HRTIM_ICR_SYSFLTC_Pos) /*!< 0x00000020 */ +#define HRTIM_ICR_SYSFLTC HRTIM_ICR_SYSFLTC_Msk /*!< System Fault interrupt flag clear */ + +#define HRTIM_ICR_FLT6C_Pos (6U) +#define HRTIM_ICR_FLT6C_Msk (0x1UL << HRTIM_ICR_FLT6C_Pos) /*!< 0x00000040 */ +#define HRTIM_ICR_FLT6C HRTIM_ICR_FLT6C_Msk /*!< Fault 6 interrupt flag clear */ + +#define HRTIM_ICR_DLLRDYC_Pos (16U) +#define HRTIM_ICR_DLLRDYC_Msk (0x1UL << HRTIM_ICR_DLLRDYC_Pos) /*!< 0x00010000 */ +#define HRTIM_ICR_DLLRDYC HRTIM_ICR_DLLRDYC_Msk /*!< DLL ready interrupt flag clear */ +#define HRTIM_ICR_BMPERC_Pos (17U) +#define HRTIM_ICR_BMPERC_Msk (0x1UL << HRTIM_ICR_BMPERC_Pos) /*!< 0x00020000 */ +#define HRTIM_ICR_BMPERC HRTIM_ICR_BMPERC_Msk /*!< Burst mode period interrupt flag clear */ + +/**** Bit definition for Common HRTIM Timer interrupt enable register *********/ +#define HRTIM_IER_FLT1_Pos (0U) +#define HRTIM_IER_FLT1_Msk (0x1UL << HRTIM_IER_FLT1_Pos) /*!< 0x00000001 */ +#define HRTIM_IER_FLT1 HRTIM_IER_FLT1_Msk /*!< Fault 1 interrupt enable */ +#define HRTIM_IER_FLT2_Pos (1U) +#define HRTIM_IER_FLT2_Msk (0x1UL << HRTIM_IER_FLT2_Pos) /*!< 0x00000002 */ +#define HRTIM_IER_FLT2 HRTIM_IER_FLT2_Msk /*!< Fault 2 interrupt enable */ +#define HRTIM_IER_FLT3_Pos (2U) +#define HRTIM_IER_FLT3_Msk (0x1UL << HRTIM_IER_FLT3_Pos) /*!< 0x00000004 */ +#define HRTIM_IER_FLT3 HRTIM_IER_FLT3_Msk /*!< Fault 3 interrupt enable */ +#define HRTIM_IER_FLT4_Pos (3U) +#define HRTIM_IER_FLT4_Msk (0x1UL << HRTIM_IER_FLT4_Pos) /*!< 0x00000008 */ +#define HRTIM_IER_FLT4 HRTIM_IER_FLT4_Msk /*!< Fault 4 interrupt enable */ +#define HRTIM_IER_FLT5_Pos (4U) +#define HRTIM_IER_FLT5_Msk (0x1UL << HRTIM_IER_FLT5_Pos) /*!< 0x00000010 */ +#define HRTIM_IER_FLT5 HRTIM_IER_FLT5_Msk /*!< Fault 5 interrupt enable */ +#define HRTIM_IER_SYSFLT_Pos (5U) +#define HRTIM_IER_SYSFLT_Msk (0x1UL << HRTIM_IER_SYSFLT_Pos) /*!< 0x00000020 */ +#define HRTIM_IER_SYSFLT HRTIM_IER_SYSFLT_Msk /*!< System Fault interrupt enable */ +#define HRTIM_IER_FLT6_Pos (6U) +#define HRTIM_IER_FLT6_Msk (0x1UL << HRTIM_IER_FLT6_Pos) /*!< 0x00000040 */ +#define HRTIM_IER_FLT6 HRTIM_IER_FLT6_Msk /*!< Fault 6 interrupt enable */ + +#define HRTIM_IER_DLLRDY_Pos (16U) +#define HRTIM_IER_DLLRDY_Msk (0x1UL << HRTIM_IER_DLLRDY_Pos) /*!< 0x00010000 */ +#define HRTIM_IER_DLLRDY HRTIM_IER_DLLRDY_Msk /*!< DLL ready interrupt enable */ +#define HRTIM_IER_BMPER_Pos (17U) +#define HRTIM_IER_BMPER_Msk (0x1UL << HRTIM_IER_BMPER_Pos) /*!< 0x00020000 */ +#define HRTIM_IER_BMPER HRTIM_IER_BMPER_Msk /*!< Burst mode period interrupt enable */ + +/**** Bit definition for Common HRTIM Timer output enable register ************/ +#define HRTIM_OENR_TA1OEN_Pos (0U) +#define HRTIM_OENR_TA1OEN_Msk (0x1UL << HRTIM_OENR_TA1OEN_Pos) /*!< 0x00000001 */ +#define HRTIM_OENR_TA1OEN HRTIM_OENR_TA1OEN_Msk /*!< Timer A Output 1 enable */ +#define HRTIM_OENR_TA2OEN_Pos (1U) +#define HRTIM_OENR_TA2OEN_Msk (0x1UL << HRTIM_OENR_TA2OEN_Pos) /*!< 0x00000002 */ +#define HRTIM_OENR_TA2OEN HRTIM_OENR_TA2OEN_Msk /*!< Timer A Output 2 enable */ +#define HRTIM_OENR_TB1OEN_Pos (2U) +#define HRTIM_OENR_TB1OEN_Msk (0x1UL << HRTIM_OENR_TB1OEN_Pos) /*!< 0x00000004 */ +#define HRTIM_OENR_TB1OEN HRTIM_OENR_TB1OEN_Msk /*!< Timer B Output 1 enable */ +#define HRTIM_OENR_TB2OEN_Pos (3U) +#define HRTIM_OENR_TB2OEN_Msk (0x1UL << HRTIM_OENR_TB2OEN_Pos) /*!< 0x00000008 */ +#define HRTIM_OENR_TB2OEN HRTIM_OENR_TB2OEN_Msk /*!< Timer B Output 2 enable */ +#define HRTIM_OENR_TC1OEN_Pos (4U) +#define HRTIM_OENR_TC1OEN_Msk (0x1UL << HRTIM_OENR_TC1OEN_Pos) /*!< 0x00000010 */ +#define HRTIM_OENR_TC1OEN HRTIM_OENR_TC1OEN_Msk /*!< Timer C Output 1 enable */ +#define HRTIM_OENR_TC2OEN_Pos (5U) +#define HRTIM_OENR_TC2OEN_Msk (0x1UL << HRTIM_OENR_TC2OEN_Pos) /*!< 0x00000020 */ +#define HRTIM_OENR_TC2OEN HRTIM_OENR_TC2OEN_Msk /*!< Timer C Output 2 enable */ +#define HRTIM_OENR_TD1OEN_Pos (6U) +#define HRTIM_OENR_TD1OEN_Msk (0x1UL << HRTIM_OENR_TD1OEN_Pos) /*!< 0x00000040 */ +#define HRTIM_OENR_TD1OEN HRTIM_OENR_TD1OEN_Msk /*!< Timer D Output 1 enable */ +#define HRTIM_OENR_TD2OEN_Pos (7U) +#define HRTIM_OENR_TD2OEN_Msk (0x1UL << HRTIM_OENR_TD2OEN_Pos) /*!< 0x00000080 */ +#define HRTIM_OENR_TD2OEN HRTIM_OENR_TD2OEN_Msk /*!< Timer D Output 2 enable */ +#define HRTIM_OENR_TE1OEN_Pos (8U) +#define HRTIM_OENR_TE1OEN_Msk (0x1UL << HRTIM_OENR_TE1OEN_Pos) /*!< 0x00000100 */ +#define HRTIM_OENR_TE1OEN HRTIM_OENR_TE1OEN_Msk /*!< Timer E Output 1 enable */ +#define HRTIM_OENR_TE2OEN_Pos (9U) +#define HRTIM_OENR_TE2OEN_Msk (0x1UL << HRTIM_OENR_TE2OEN_Pos) /*!< 0x00000200 */ +#define HRTIM_OENR_TE2OEN HRTIM_OENR_TE2OEN_Msk /*!< Timer E Output 2 enable */ +#define HRTIM_OENR_TF1OEN_Pos (10U) +#define HRTIM_OENR_TF1OEN_Msk (0x1UL << HRTIM_OENR_TF1OEN_Pos) /*!< 0x00000400 */ +#define HRTIM_OENR_TF1OEN HRTIM_OENR_TF1OEN_Msk /*!< Timer F Output 1 enable */ +#define HRTIM_OENR_TF2OEN_Pos (11U) +#define HRTIM_OENR_TF2OEN_Msk (0x1UL << HRTIM_OENR_TF2OEN_Pos) /*!< 0x00000800 */ +#define HRTIM_OENR_TF2OEN HRTIM_OENR_TF2OEN_Msk /*!< Timer F Output 2 enable */ + +/**** Bit definition for Common HRTIM Timer output disable register ***********/ +#define HRTIM_ODISR_TA1ODIS_Pos (0U) +#define HRTIM_ODISR_TA1ODIS_Msk (0x1UL << HRTIM_ODISR_TA1ODIS_Pos) /*!< 0x00000001 */ +#define HRTIM_ODISR_TA1ODIS HRTIM_ODISR_TA1ODIS_Msk /*!< Timer A Output 1 disable */ +#define HRTIM_ODISR_TA2ODIS_Pos (1U) +#define HRTIM_ODISR_TA2ODIS_Msk (0x1UL << HRTIM_ODISR_TA2ODIS_Pos) /*!< 0x00000002 */ +#define HRTIM_ODISR_TA2ODIS HRTIM_ODISR_TA2ODIS_Msk /*!< Timer A Output 2 disable */ +#define HRTIM_ODISR_TB1ODIS_Pos (2U) +#define HRTIM_ODISR_TB1ODIS_Msk (0x1UL << HRTIM_ODISR_TB1ODIS_Pos) /*!< 0x00000004 */ +#define HRTIM_ODISR_TB1ODIS HRTIM_ODISR_TB1ODIS_Msk /*!< Timer B Output 1 disable */ +#define HRTIM_ODISR_TB2ODIS_Pos (3U) +#define HRTIM_ODISR_TB2ODIS_Msk (0x1UL << HRTIM_ODISR_TB2ODIS_Pos) /*!< 0x00000008 */ +#define HRTIM_ODISR_TB2ODIS HRTIM_ODISR_TB2ODIS_Msk /*!< Timer B Output 2 disable */ +#define HRTIM_ODISR_TC1ODIS_Pos (4U) +#define HRTIM_ODISR_TC1ODIS_Msk (0x1UL << HRTIM_ODISR_TC1ODIS_Pos) /*!< 0x00000010 */ +#define HRTIM_ODISR_TC1ODIS HRTIM_ODISR_TC1ODIS_Msk /*!< Timer C Output 1 disable */ +#define HRTIM_ODISR_TC2ODIS_Pos (5U) +#define HRTIM_ODISR_TC2ODIS_Msk (0x1UL << HRTIM_ODISR_TC2ODIS_Pos) /*!< 0x00000020 */ +#define HRTIM_ODISR_TC2ODIS HRTIM_ODISR_TC2ODIS_Msk /*!< Timer C Output 2 disable */ +#define HRTIM_ODISR_TD1ODIS_Pos (6U) +#define HRTIM_ODISR_TD1ODIS_Msk (0x1UL << HRTIM_ODISR_TD1ODIS_Pos) /*!< 0x00000040 */ +#define HRTIM_ODISR_TD1ODIS HRTIM_ODISR_TD1ODIS_Msk /*!< Timer D Output 1 disable */ +#define HRTIM_ODISR_TD2ODIS_Pos (7U) +#define HRTIM_ODISR_TD2ODIS_Msk (0x1UL << HRTIM_ODISR_TD2ODIS_Pos) /*!< 0x00000080 */ +#define HRTIM_ODISR_TD2ODIS HRTIM_ODISR_TD2ODIS_Msk /*!< Timer D Output 2 disable */ +#define HRTIM_ODISR_TE1ODIS_Pos (8U) +#define HRTIM_ODISR_TE1ODIS_Msk (0x1UL << HRTIM_ODISR_TE1ODIS_Pos) /*!< 0x00000100 */ +#define HRTIM_ODISR_TE1ODIS HRTIM_ODISR_TE1ODIS_Msk /*!< Timer E Output 1 disable */ +#define HRTIM_ODISR_TE2ODIS_Pos (9U) +#define HRTIM_ODISR_TE2ODIS_Msk (0x1UL << HRTIM_ODISR_TE2ODIS_Pos) /*!< 0x00000200 */ +#define HRTIM_ODISR_TE2ODIS HRTIM_ODISR_TE2ODIS_Msk /*!< Timer E Output 2 disable */ +#define HRTIM_ODISR_TF1ODIS_Pos (10U) +#define HRTIM_ODISR_TF1ODIS_Msk (0x1UL << HRTIM_ODISR_TF1ODIS_Pos) /*!< 0x00000100 */ +#define HRTIM_ODISR_TF1ODIS HRTIM_ODISR_TF1ODIS_Msk /*!< Timer F Output 1 disable */ +#define HRTIM_ODISR_TF2ODIS_Pos (11U) +#define HRTIM_ODISR_TF2ODIS_Msk (0x1UL << HRTIM_ODISR_TF2ODIS_Pos) /*!< 0x00000200 */ +#define HRTIM_ODISR_TF2ODIS HRTIM_ODISR_TF2ODIS_Msk /*!< Timer F Output 2 disable */ + +/**** Bit definition for Common HRTIM Timer output disable status register *****/ +#define HRTIM_ODSR_TA1ODS_Pos (0U) +#define HRTIM_ODSR_TA1ODS_Msk (0x1UL << HRTIM_ODSR_TA1ODS_Pos) /*!< 0x00000001 */ +#define HRTIM_ODSR_TA1ODS HRTIM_ODSR_TA1ODS_Msk /*!< Timer A Output 1 disable status */ +#define HRTIM_ODSR_TA2ODS_Pos (1U) +#define HRTIM_ODSR_TA2ODS_Msk (0x1UL << HRTIM_ODSR_TA2ODS_Pos) /*!< 0x00000002 */ +#define HRTIM_ODSR_TA2ODS HRTIM_ODSR_TA2ODS_Msk /*!< Timer A Output 2 disable status */ +#define HRTIM_ODSR_TB1ODS_Pos (2U) +#define HRTIM_ODSR_TB1ODS_Msk (0x1UL << HRTIM_ODSR_TB1ODS_Pos) /*!< 0x00000004 */ +#define HRTIM_ODSR_TB1ODS HRTIM_ODSR_TB1ODS_Msk /*!< Timer B Output 1 disable status */ +#define HRTIM_ODSR_TB2ODS_Pos (3U) +#define HRTIM_ODSR_TB2ODS_Msk (0x1UL << HRTIM_ODSR_TB2ODS_Pos) /*!< 0x00000008 */ +#define HRTIM_ODSR_TB2ODS HRTIM_ODSR_TB2ODS_Msk /*!< Timer B Output 2 disable status */ +#define HRTIM_ODSR_TC1ODS_Pos (4U) +#define HRTIM_ODSR_TC1ODS_Msk (0x1UL << HRTIM_ODSR_TC1ODS_Pos) /*!< 0x00000010 */ +#define HRTIM_ODSR_TC1ODS HRTIM_ODSR_TC1ODS_Msk /*!< Timer C Output 1 disable status */ +#define HRTIM_ODSR_TC2ODS_Pos (5U) +#define HRTIM_ODSR_TC2ODS_Msk (0x1UL << HRTIM_ODSR_TC2ODS_Pos) /*!< 0x00000020 */ +#define HRTIM_ODSR_TC2ODS HRTIM_ODSR_TC2ODS_Msk /*!< Timer C Output 2 disable status */ +#define HRTIM_ODSR_TD1ODS_Pos (6U) +#define HRTIM_ODSR_TD1ODS_Msk (0x1UL << HRTIM_ODSR_TD1ODS_Pos) /*!< 0x00000040 */ +#define HRTIM_ODSR_TD1ODS HRTIM_ODSR_TD1ODS_Msk /*!< Timer D Output 1 disable status */ +#define HRTIM_ODSR_TD2ODS_Pos (7U) +#define HRTIM_ODSR_TD2ODS_Msk (0x1UL << HRTIM_ODSR_TD2ODS_Pos) /*!< 0x00000080 */ +#define HRTIM_ODSR_TD2ODS HRTIM_ODSR_TD2ODS_Msk /*!< Timer D Output 2 disable status */ +#define HRTIM_ODSR_TE1ODS_Pos (8U) +#define HRTIM_ODSR_TE1ODS_Msk (0x1UL << HRTIM_ODSR_TE1ODS_Pos) /*!< 0x00000100 */ +#define HRTIM_ODSR_TE1ODS HRTIM_ODSR_TE1ODS_Msk /*!< Timer E Output 1 disable status */ +#define HRTIM_ODSR_TE2ODS_Pos (9U) +#define HRTIM_ODSR_TE2ODS_Msk (0x1UL << HRTIM_ODSR_TE2ODS_Pos) /*!< 0x00000200 */ +#define HRTIM_ODSR_TE2ODS HRTIM_ODSR_TE2ODS_Msk /*!< Timer E Output 2 disable status */ +#define HRTIM_ODSR_TF1ODS_Pos (10U) +#define HRTIM_ODSR_TF1ODS_Msk (0x1UL << HRTIM_ODSR_TF1ODS_Pos) /*!< 0x00000100 */ +#define HRTIM_ODSR_TF1ODS HRTIM_ODSR_TF1ODS_Msk /*!< Timer F Output 1 disable status */ +#define HRTIM_ODSR_TF2ODS_Pos (11U) +#define HRTIM_ODSR_TF2ODS_Msk (0x1UL << HRTIM_ODSR_TF2ODS_Pos) /*!< 0x00000200 */ +#define HRTIM_ODSR_TF2ODS HRTIM_ODSR_TF2ODS_Msk /*!< Timer F Output 2 disable status */ + +/**** Bit definition for Common HRTIM Timer Burst mode control register ********/ +#define HRTIM_BMCR_BME_Pos (0U) +#define HRTIM_BMCR_BME_Msk (0x1UL << HRTIM_BMCR_BME_Pos) /*!< 0x00000001 */ +#define HRTIM_BMCR_BME HRTIM_BMCR_BME_Msk /*!< Burst mode enable */ +#define HRTIM_BMCR_BMOM_Pos (1U) +#define HRTIM_BMCR_BMOM_Msk (0x1UL << HRTIM_BMCR_BMOM_Pos) /*!< 0x00000002 */ +#define HRTIM_BMCR_BMOM HRTIM_BMCR_BMOM_Msk /*!< Burst mode operating mode */ +#define HRTIM_BMCR_BMCLK_Pos (2U) +#define HRTIM_BMCR_BMCLK_Msk (0xFUL << HRTIM_BMCR_BMCLK_Pos) /*!< 0x0000003C */ +#define HRTIM_BMCR_BMCLK HRTIM_BMCR_BMCLK_Msk /*!< Burst mode clock source */ +#define HRTIM_BMCR_BMCLK_0 (0x1UL << HRTIM_BMCR_BMCLK_Pos) /*!< 0x00000004 */ +#define HRTIM_BMCR_BMCLK_1 (0x2UL << HRTIM_BMCR_BMCLK_Pos) /*!< 0x00000008 */ +#define HRTIM_BMCR_BMCLK_2 (0x4UL << HRTIM_BMCR_BMCLK_Pos) /*!< 0x00000010 */ +#define HRTIM_BMCR_BMCLK_3 (0x8UL << HRTIM_BMCR_BMCLK_Pos) /*!< 0x00000020 */ +#define HRTIM_BMCR_BMPRSC_Pos (6U) +#define HRTIM_BMCR_BMPRSC_Msk (0xFUL << HRTIM_BMCR_BMPRSC_Pos) /*!< 0x000003C0 */ +#define HRTIM_BMCR_BMPRSC HRTIM_BMCR_BMPRSC_Msk /*!< Burst mode prescaler */ +#define HRTIM_BMCR_BMPRSC_0 (0x1UL << HRTIM_BMCR_BMPRSC_Pos) /*!< 0x00000040 */ +#define HRTIM_BMCR_BMPRSC_1 (0x2UL << HRTIM_BMCR_BMPRSC_Pos) /*!< 0x00000080 */ +#define HRTIM_BMCR_BMPRSC_2 (0x4UL << HRTIM_BMCR_BMPRSC_Pos) /*!< 0x00000100 */ +#define HRTIM_BMCR_BMPRSC_3 (0x8UL << HRTIM_BMCR_BMPRSC_Pos) /*!< 0x00000200 */ +#define HRTIM_BMCR_BMPREN_Pos (10U) +#define HRTIM_BMCR_BMPREN_Msk (0x1UL << HRTIM_BMCR_BMPREN_Pos) /*!< 0x00000400 */ +#define HRTIM_BMCR_BMPREN HRTIM_BMCR_BMPREN_Msk /*!< Burst mode Preload bit */ +#define HRTIM_BMCR_MTBM_Pos (16U) +#define HRTIM_BMCR_MTBM_Msk (0x1UL << HRTIM_BMCR_MTBM_Pos) /*!< 0x00010000 */ +#define HRTIM_BMCR_MTBM HRTIM_BMCR_MTBM_Msk /*!< Master Timer Burst mode */ +#define HRTIM_BMCR_TABM_Pos (17U) +#define HRTIM_BMCR_TABM_Msk (0x1UL << HRTIM_BMCR_TABM_Pos) /*!< 0x00020000 */ +#define HRTIM_BMCR_TABM HRTIM_BMCR_TABM_Msk /*!< Timer A Burst mode */ +#define HRTIM_BMCR_TBBM_Pos (18U) +#define HRTIM_BMCR_TBBM_Msk (0x1UL << HRTIM_BMCR_TBBM_Pos) /*!< 0x00040000 */ +#define HRTIM_BMCR_TBBM HRTIM_BMCR_TBBM_Msk /*!< Timer B Burst mode */ +#define HRTIM_BMCR_TCBM_Pos (19U) +#define HRTIM_BMCR_TCBM_Msk (0x1UL << HRTIM_BMCR_TCBM_Pos) /*!< 0x00080000 */ +#define HRTIM_BMCR_TCBM HRTIM_BMCR_TCBM_Msk /*!< Timer C Burst mode */ +#define HRTIM_BMCR_TDBM_Pos (20U) +#define HRTIM_BMCR_TDBM_Msk (0x1UL << HRTIM_BMCR_TDBM_Pos) /*!< 0x00100000 */ +#define HRTIM_BMCR_TDBM HRTIM_BMCR_TDBM_Msk /*!< Timer D Burst mode */ +#define HRTIM_BMCR_TEBM_Pos (21U) +#define HRTIM_BMCR_TEBM_Msk (0x1UL << HRTIM_BMCR_TEBM_Pos) /*!< 0x00200000 */ +#define HRTIM_BMCR_TEBM HRTIM_BMCR_TEBM_Msk /*!< Timer E Burst mode */ + +#define HRTIM_BMCR_TFBM_Pos (22U) +#define HRTIM_BMCR_TFBM_Msk (0x1UL << HRTIM_BMCR_TFBM_Pos) /*!< 0x00400000 */ +#define HRTIM_BMCR_TFBM HRTIM_BMCR_TFBM_Msk /*!< Timer F Burst mode */ + +#define HRTIM_BMCR_BMSTAT_Pos (31U) +#define HRTIM_BMCR_BMSTAT_Msk (0x1UL << HRTIM_BMCR_BMSTAT_Pos) /*!< 0x80000000 */ +#define HRTIM_BMCR_BMSTAT HRTIM_BMCR_BMSTAT_Msk /*!< Burst mode status */ + +/**** Bit definition for Common HRTIM Timer Burst mode Trigger register *******/ +#define HRTIM_BMTRGR_SW_Pos (0U) +#define HRTIM_BMTRGR_SW_Msk (0x1UL << HRTIM_BMTRGR_SW_Pos) /*!< 0x00000001 */ +#define HRTIM_BMTRGR_SW HRTIM_BMTRGR_SW_Msk /*!< Software start */ +#define HRTIM_BMTRGR_MSTRST_Pos (1U) +#define HRTIM_BMTRGR_MSTRST_Msk (0x1UL << HRTIM_BMTRGR_MSTRST_Pos) /*!< 0x00000002 */ +#define HRTIM_BMTRGR_MSTRST HRTIM_BMTRGR_MSTRST_Msk /*!< Master reset */ +#define HRTIM_BMTRGR_MSTREP_Pos (2U) +#define HRTIM_BMTRGR_MSTREP_Msk (0x1UL << HRTIM_BMTRGR_MSTREP_Pos) /*!< 0x00000004 */ +#define HRTIM_BMTRGR_MSTREP HRTIM_BMTRGR_MSTREP_Msk /*!< Master repetition */ +#define HRTIM_BMTRGR_MSTCMP1_Pos (3U) +#define HRTIM_BMTRGR_MSTCMP1_Msk (0x1UL << HRTIM_BMTRGR_MSTCMP1_Pos) /*!< 0x00000008 */ +#define HRTIM_BMTRGR_MSTCMP1 HRTIM_BMTRGR_MSTCMP1_Msk /*!< Master compare 1 */ +#define HRTIM_BMTRGR_MSTCMP2_Pos (4U) +#define HRTIM_BMTRGR_MSTCMP2_Msk (0x1UL << HRTIM_BMTRGR_MSTCMP2_Pos) /*!< 0x00000010 */ +#define HRTIM_BMTRGR_MSTCMP2 HRTIM_BMTRGR_MSTCMP2_Msk /*!< Master compare 2 */ +#define HRTIM_BMTRGR_MSTCMP3_Pos (5U) +#define HRTIM_BMTRGR_MSTCMP3_Msk (0x1UL << HRTIM_BMTRGR_MSTCMP3_Pos) /*!< 0x00000020 */ +#define HRTIM_BMTRGR_MSTCMP3 HRTIM_BMTRGR_MSTCMP3_Msk /*!< Master compare 3 */ +#define HRTIM_BMTRGR_MSTCMP4_Pos (6U) +#define HRTIM_BMTRGR_MSTCMP4_Msk (0x1UL << HRTIM_BMTRGR_MSTCMP4_Pos) /*!< 0x00000040 */ +#define HRTIM_BMTRGR_MSTCMP4 HRTIM_BMTRGR_MSTCMP4_Msk /*!< Master compare 4 */ +#define HRTIM_BMTRGR_TARST_Pos (7U) +#define HRTIM_BMTRGR_TARST_Msk (0x1UL << HRTIM_BMTRGR_TARST_Pos) /*!< 0x00000080 */ +#define HRTIM_BMTRGR_TARST HRTIM_BMTRGR_TARST_Msk /*!< Timer A reset */ +#define HRTIM_BMTRGR_TAREP_Pos (8U) +#define HRTIM_BMTRGR_TAREP_Msk (0x1UL << HRTIM_BMTRGR_TAREP_Pos) /*!< 0x00000100 */ +#define HRTIM_BMTRGR_TAREP HRTIM_BMTRGR_TAREP_Msk /*!< Timer A repetition */ +#define HRTIM_BMTRGR_TACMP1_Pos (9U) +#define HRTIM_BMTRGR_TACMP1_Msk (0x1UL << HRTIM_BMTRGR_TACMP1_Pos) /*!< 0x00000200 */ +#define HRTIM_BMTRGR_TACMP1 HRTIM_BMTRGR_TACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_BMTRGR_TACMP2_Pos (10U) +#define HRTIM_BMTRGR_TACMP2_Msk (0x1UL << HRTIM_BMTRGR_TACMP2_Pos) /*!< 0x00000400 */ +#define HRTIM_BMTRGR_TACMP2 HRTIM_BMTRGR_TACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_BMTRGR_TBRST_Pos (11U) +#define HRTIM_BMTRGR_TBRST_Msk (0x1UL << HRTIM_BMTRGR_TBRST_Pos) /*!< 0x00000800 */ +#define HRTIM_BMTRGR_TBRST HRTIM_BMTRGR_TBRST_Msk /*!< Timer B reset */ +#define HRTIM_BMTRGR_TBREP_Pos (12U) +#define HRTIM_BMTRGR_TBREP_Msk (0x1UL << HRTIM_BMTRGR_TBREP_Pos) /*!< 0x00001000 */ +#define HRTIM_BMTRGR_TBREP HRTIM_BMTRGR_TBREP_Msk /*!< Timer B repetition */ +#define HRTIM_BMTRGR_TBCMP1_Pos (13U) +#define HRTIM_BMTRGR_TBCMP1_Msk (0x1UL << HRTIM_BMTRGR_TBCMP1_Pos) /*!< 0x00002000 */ +#define HRTIM_BMTRGR_TBCMP1 HRTIM_BMTRGR_TBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_BMTRGR_TBCMP2_Pos (14U) +#define HRTIM_BMTRGR_TBCMP2_Msk (0x1UL << HRTIM_BMTRGR_TBCMP2_Pos) /*!< 0x00004000 */ +#define HRTIM_BMTRGR_TBCMP2 HRTIM_BMTRGR_TBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_BMTRGR_TCRST_Pos (15U) +#define HRTIM_BMTRGR_TCRST_Msk (0x1UL << HRTIM_BMTRGR_TCRST_Pos) /*!< 0x00008000 */ +#define HRTIM_BMTRGR_TCRST HRTIM_BMTRGR_TCRST_Msk /*!< Timer C reset */ +#define HRTIM_BMTRGR_TCREP_Pos (16U) +#define HRTIM_BMTRGR_TCREP_Msk (0x1UL << HRTIM_BMTRGR_TCREP_Pos) /*!< 0x00010000 */ +#define HRTIM_BMTRGR_TCREP HRTIM_BMTRGR_TCREP_Msk /*!< Timer C repetition */ +#define HRTIM_BMTRGR_TCCMP1_Pos (17U) +#define HRTIM_BMTRGR_TCCMP1_Msk (0x1UL << HRTIM_BMTRGR_TCCMP1_Pos) /*!< 0x00020000 */ +#define HRTIM_BMTRGR_TCCMP1 HRTIM_BMTRGR_TCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_BMTRGR_TFRST_Pos (18U) +#define HRTIM_BMTRGR_TFRST_Msk (0x1UL << HRTIM_BMTRGR_TFRST_Pos) /*!< 0x00040000 */ +#define HRTIM_BMTRGR_TFRST HRTIM_BMTRGR_TFRST_Msk /*!< Timer F reset */ +#define HRTIM_BMTRGR_TDRST_Pos (19U) +#define HRTIM_BMTRGR_TDRST_Msk (0x1UL << HRTIM_BMTRGR_TDRST_Pos) /*!< 0x00080000 */ +#define HRTIM_BMTRGR_TDRST HRTIM_BMTRGR_TDRST_Msk /*!< Timer D reset */ +#define HRTIM_BMTRGR_TDREP_Pos (20U) +#define HRTIM_BMTRGR_TDREP_Msk (0x1UL << HRTIM_BMTRGR_TDREP_Pos) /*!< 0x00100000 */ +#define HRTIM_BMTRGR_TDREP HRTIM_BMTRGR_TDREP_Msk /*!< Timer D repetition */ +#define HRTIM_BMTRGR_TFREP_Pos (21U) +#define HRTIM_BMTRGR_TFREP_Msk (0x1UL << HRTIM_BMTRGR_TFREP_Pos) /*!< 0x00200000 */ +#define HRTIM_BMTRGR_TFREP HRTIM_BMTRGR_TFREP_Msk /*!< Timer F repetition*/ +#define HRTIM_BMTRGR_TDCMP2_Pos (22U) +#define HRTIM_BMTRGR_TDCMP2_Msk (0x1UL << HRTIM_BMTRGR_TDCMP2_Pos) /*!< 0x00400000 */ +#define HRTIM_BMTRGR_TDCMP2 HRTIM_BMTRGR_TDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_BMTRGR_TFCMP1_Pos (23U) +#define HRTIM_BMTRGR_TFCMP1_Msk (0x1UL << HRTIM_BMTRGR_TFCMP1_Pos) /*!< 0x00800000 */ +#define HRTIM_BMTRGR_TFCMP1 HRTIM_BMTRGR_TFCMP1_Msk /*!< Timer F compare 1 */ +#define HRTIM_BMTRGR_TEREP_Pos (24U) +#define HRTIM_BMTRGR_TEREP_Msk (0x1UL << HRTIM_BMTRGR_TEREP_Pos) /*!< 0x01000000 */ +#define HRTIM_BMTRGR_TEREP HRTIM_BMTRGR_TEREP_Msk /*!< Timer E repetition */ +#define HRTIM_BMTRGR_TECMP1_Pos (25U) +#define HRTIM_BMTRGR_TECMP1_Msk (0x1UL << HRTIM_BMTRGR_TECMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_BMTRGR_TECMP1 HRTIM_BMTRGR_TECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_BMTRGR_TECMP2_Pos (26U) +#define HRTIM_BMTRGR_TECMP2_Msk (0x1UL << HRTIM_BMTRGR_TECMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_BMTRGR_TECMP2 HRTIM_BMTRGR_TECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_BMTRGR_TAEEV7_Pos (27U) +#define HRTIM_BMTRGR_TAEEV7_Msk (0x1UL << HRTIM_BMTRGR_TAEEV7_Pos) /*!< 0x08000000 */ +#define HRTIM_BMTRGR_TAEEV7 HRTIM_BMTRGR_TAEEV7_Msk /*!< Timer A period following External Event7 */ +#define HRTIM_BMTRGR_TDEEV8_Pos (28U) +#define HRTIM_BMTRGR_TDEEV8_Msk (0x1UL << HRTIM_BMTRGR_TDEEV8_Pos) /*!< 0x10000000 */ +#define HRTIM_BMTRGR_TDEEV8 HRTIM_BMTRGR_TDEEV8_Msk /*!< Timer D period following External Event8 */ +#define HRTIM_BMTRGR_EEV7_Pos (29U) +#define HRTIM_BMTRGR_EEV7_Msk (0x1UL << HRTIM_BMTRGR_EEV7_Pos) /*!< 0x20000000 */ +#define HRTIM_BMTRGR_EEV7 HRTIM_BMTRGR_EEV7_Msk /*!< External Event 7 */ +#define HRTIM_BMTRGR_EEV8_Pos (30U) +#define HRTIM_BMTRGR_EEV8_Msk (0x1UL << HRTIM_BMTRGR_EEV8_Pos) /*!< 0x40000000 */ +#define HRTIM_BMTRGR_EEV8 HRTIM_BMTRGR_EEV8_Msk /*!< External Event 8 */ +#define HRTIM_BMTRGR_OCHPEV_Pos (31U) +#define HRTIM_BMTRGR_OCHPEV_Msk (0x1UL << HRTIM_BMTRGR_OCHPEV_Pos) /*!< 0x80000000 */ +#define HRTIM_BMTRGR_OCHPEV HRTIM_BMTRGR_OCHPEV_Msk /*!< on-chip Event */ + +/******************* Bit definition for HRTIM_BMCMPR register ***************/ +#define HRTIM_BMCMPR_BMCMPR_Pos (0U) +#define HRTIM_BMCMPR_BMCMPR_Msk (0xFFFFUL << HRTIM_BMCMPR_BMCMPR_Pos) /*!< 0x0000FFFF */ +#define HRTIM_BMCMPR_BMCMPR HRTIM_BMCMPR_BMCMPR_Msk /*!>= 1U; value != 0U; value >>= 1U) + { + result <<= 1U; + result |= value & 1U; + s--; + } + result <<= s; /* shift when v's highest bits are zero */ + return result; +} +#endif + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __clz + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) + +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) +#else + #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) +#else + #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) +#else + #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXB(value, ptr) __strex(value, ptr) +#else + #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXH(value, ptr) __strex(value, ptr) +#else + #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXW(value, ptr) __strex(value, ptr) +#else + #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +#define __CLREX __clrex + + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT __ssat + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __usat + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) +{ + rrx r0, r0 + bx lr +} +#endif + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRBT(value, ptr) __strt(value, ptr) + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRHT(value, ptr) __strt(value, ptr) + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRT(value, ptr) __strt(value, ptr) + +#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) +{ + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; +} + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) +{ + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) + +#define __SADD8 __sadd8 +#define __QADD8 __qadd8 +#define __SHADD8 __shadd8 +#define __UADD8 __uadd8 +#define __UQADD8 __uqadd8 +#define __UHADD8 __uhadd8 +#define __SSUB8 __ssub8 +#define __QSUB8 __qsub8 +#define __SHSUB8 __shsub8 +#define __USUB8 __usub8 +#define __UQSUB8 __uqsub8 +#define __UHSUB8 __uhsub8 +#define __SADD16 __sadd16 +#define __QADD16 __qadd16 +#define __SHADD16 __shadd16 +#define __UADD16 __uadd16 +#define __UQADD16 __uqadd16 +#define __UHADD16 __uhadd16 +#define __SSUB16 __ssub16 +#define __QSUB16 __qsub16 +#define __SHSUB16 __shsub16 +#define __USUB16 __usub16 +#define __UQSUB16 __uqsub16 +#define __UHSUB16 __uhsub16 +#define __SASX __sasx +#define __QASX __qasx +#define __SHASX __shasx +#define __UASX __uasx +#define __UQASX __uqasx +#define __UHASX __uhasx +#define __SSAX __ssax +#define __QSAX __qsax +#define __SHSAX __shsax +#define __USAX __usax +#define __UQSAX __uqsax +#define __UHSAX __uhsax +#define __USAD8 __usad8 +#define __USADA8 __usada8 +#define __SSAT16 __ssat16 +#define __USAT16 __usat16 +#define __UXTB16 __uxtb16 +#define __UXTAB16 __uxtab16 +#define __SXTB16 __sxtb16 +#define __SXTAB16 __sxtab16 +#define __SMUAD __smuad +#define __SMUADX __smuadx +#define __SMLAD __smlad +#define __SMLADX __smladx +#define __SMLALD __smlald +#define __SMLALDX __smlaldx +#define __SMUSD __smusd +#define __SMUSDX __smusdx +#define __SMLSD __smlsd +#define __SMLSDX __smlsdx +#define __SMLSLD __smlsld +#define __SMLSLDX __smlsldx +#define __SEL __sel +#define __QADD __qadd +#define __QSUB __qsub + +#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ + ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) + +#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ + ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) + +#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \ + ((int64_t)(ARG3) << 32U) ) >> 32U)) + +#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#endif /* __CMSIS_ARMCC_H */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_armclang.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_armclang.h new file mode 100644 index 0000000..e917f35 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_armclang.h @@ -0,0 +1,1444 @@ +/**************************************************************************//** + * @file cmsis_armclang.h + * @brief CMSIS compiler armclang (Arm Compiler 6) header file + * @version V5.2.0 + * @date 08. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */ + +#ifndef __CMSIS_ARMCLANG_H +#define __CMSIS_ARMCLANG_H + +#pragma clang system_header /* treat file as system include file */ + +#ifndef __ARM_COMPAT_H +#include /* Compatibility header for Arm Compiler 5 intrinsics */ +#endif + +/* CMSIS compiler specific defines */ +#ifndef __ASM + #define __ASM __asm +#endif +#ifndef __INLINE + #define __INLINE __inline +#endif +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static __inline +#endif +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline +#endif +#ifndef __NO_RETURN + #define __NO_RETURN __attribute__((__noreturn__)) +#endif +#ifndef __USED + #define __USED __attribute__((used)) +#endif +#ifndef __WEAK + #define __WEAK __attribute__((weak)) +#endif +#ifndef __PACKED + #define __PACKED __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_UNION + #define __PACKED_UNION union __attribute__((packed, aligned(1))) +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */ + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) +#endif +#ifndef __RESTRICT + #define __RESTRICT __restrict +#endif +#ifndef __COMPILER_BARRIER + #define __COMPILER_BARRIER() __ASM volatile("":::"memory") +#endif + +/* ######################### Startup and Lowlevel Init ######################## */ + +#ifndef __PROGRAM_START +#define __PROGRAM_START __main +#endif + +#ifndef __INITIAL_SP +#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit +#endif + +#ifndef __STACK_LIMIT +#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base +#endif + +#ifndef __VECTOR_TABLE +#define __VECTOR_TABLE __Vectors +#endif + +#ifndef __VECTOR_TABLE_ATTRIBUTE +#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET"))) +#endif + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +/* intrinsic void __enable_irq(); see arm_compat.h */ + + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +/* intrinsic void __disable_irq(); see arm_compat.h */ + + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__STATIC_FORCEINLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Control Register (non-secure) + \details Returns the content of the non-secure Control Register when in secure mode. + \return non-secure Control Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Control Register (non-secure) + \details Writes the given value to the non-secure Control Register when in secure state. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) +{ + __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); +} +#endif + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + \return xPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer (non-secure) + \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); +} +#endif + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer (non-secure) + \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); +} +#endif + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Stack Pointer (non-secure) + \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + \return SP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + \param [in] topOfStack Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) +{ + __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); +} +#endif + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Priority Mask (non-secure) + \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Priority Mask (non-secure) + \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) +{ + __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); +} +#endif + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __enable_fault_irq __enable_fiq /* see arm_compat.h */ + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __disable_fault_irq __disable_fiq /* see arm_compat.h */ + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Base Priority (non-secure) + \details Returns the current value of the non-secure Base Priority register when in secure state. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Base Priority (non-secure) + \details Assigns the given value to the non-secure Base Priority register when in secure state. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); +} +#endif + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); +} + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Fault Mask (non-secure) + \details Returns the current value of the non-secure Fault Mask register when in secure state. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Fault Mask (non-secure) + \details Assigns the given value to the non-secure Fault Mask register when in secure state. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); +} +#endif + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + +/** + \brief Get Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + return result; +#endif +} + +#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); +#endif +} +#endif + + +/** + \brief Get Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + return result; +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. + \param [in] MainStackPtrLimit Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); +#endif +} +#endif + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + +/** + \brief Get FPSCR + \details Returns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr +#else +#define __get_FPSCR() ((uint32_t)0U) +#endif + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#define __set_FPSCR __builtin_arm_set_fpscr +#else +#define __set_FPSCR(x) ((void)(x)) +#endif + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constraint "l" + * Otherwise, use general registers, specified by constraint "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_RW_REG(r) "+l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_RW_REG(r) "+r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP __builtin_arm_nop + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +#define __WFI __builtin_arm_wfi + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE __builtin_arm_wfe + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV __builtin_arm_sev + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +#define __ISB() __builtin_arm_isb(0xF) + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +#define __DSB() __builtin_arm_dsb(0xF) + + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +#define __DMB() __builtin_arm_dmb(0xF) + + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV(value) __builtin_bswap32(value) + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV16(value) __ROR(__REV(value), 16) + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REVSH(value) (int16_t)__builtin_bswap16(value) + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] op1 Value to rotate + \param [in] op2 Number of Bits to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + op2 %= 32U; + if (op2 == 0U) + { + return op1; + } + return (op1 >> op2) | (op1 << (32U - op2)); +} + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +#define __RBIT __builtin_arm_rbit + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) +{ + /* Even though __builtin_clz produces a CLZ instruction on ARM, formally + __builtin_clz(0) is undefined behaviour, so handle this case specially. + This guarantees ARM-compatible results if happening to compile on a non-ARM + target, and ensures the compiler doesn't decide to activate any + optimisations using the logic "value was passed to __builtin_clz, so it + is non-zero". + ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a + single CLZ instruction. + */ + if (value == 0U) + { + return 32U; + } + return __builtin_clz(value); +} + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDREXB (uint8_t)__builtin_arm_ldrex + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDREXH (uint16_t)__builtin_arm_ldrex + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDREXW (uint32_t)__builtin_arm_ldrex + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXB (uint32_t)__builtin_arm_strex + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXH (uint32_t)__builtin_arm_strex + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXW (uint32_t)__builtin_arm_strex + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +#define __CLREX __builtin_arm_clrex + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT __builtin_arm_ssat + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __builtin_arm_usat + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); +} + +#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) +{ + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; +} + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) +{ + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief Load-Acquire (8 bit) + \details Executes a LDAB instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); +} + + +/** + \brief Load-Acquire (16 bit) + \details Executes a LDAH instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); +} + + +/** + \brief Load-Acquire (32 bit) + \details Executes a LDA instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief Store-Release (8 bit) + \details Executes a STLB instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (16 bit) + \details Executes a STLH instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (32 bit) + \details Executes a STL instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Load-Acquire Exclusive (8 bit) + \details Executes a LDAB exclusive instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDAEXB (uint8_t)__builtin_arm_ldaex + + +/** + \brief Load-Acquire Exclusive (16 bit) + \details Executes a LDAH exclusive instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDAEXH (uint16_t)__builtin_arm_ldaex + + +/** + \brief Load-Acquire Exclusive (32 bit) + \details Executes a LDA exclusive instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDAEX (uint32_t)__builtin_arm_ldaex + + +/** + \brief Store-Release Exclusive (8 bit) + \details Executes a STLB exclusive instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEXB (uint32_t)__builtin_arm_stlex + + +/** + \brief Store-Release Exclusive (16 bit) + \details Executes a STLH exclusive instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEXH (uint32_t)__builtin_arm_stlex + + +/** + \brief Store-Release Exclusive (32 bit) + \details Executes a STL exclusive instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEX (uint32_t)__builtin_arm_stlex + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) + +#define __SADD8 __builtin_arm_sadd8 +#define __QADD8 __builtin_arm_qadd8 +#define __SHADD8 __builtin_arm_shadd8 +#define __UADD8 __builtin_arm_uadd8 +#define __UQADD8 __builtin_arm_uqadd8 +#define __UHADD8 __builtin_arm_uhadd8 +#define __SSUB8 __builtin_arm_ssub8 +#define __QSUB8 __builtin_arm_qsub8 +#define __SHSUB8 __builtin_arm_shsub8 +#define __USUB8 __builtin_arm_usub8 +#define __UQSUB8 __builtin_arm_uqsub8 +#define __UHSUB8 __builtin_arm_uhsub8 +#define __SADD16 __builtin_arm_sadd16 +#define __QADD16 __builtin_arm_qadd16 +#define __SHADD16 __builtin_arm_shadd16 +#define __UADD16 __builtin_arm_uadd16 +#define __UQADD16 __builtin_arm_uqadd16 +#define __UHADD16 __builtin_arm_uhadd16 +#define __SSUB16 __builtin_arm_ssub16 +#define __QSUB16 __builtin_arm_qsub16 +#define __SHSUB16 __builtin_arm_shsub16 +#define __USUB16 __builtin_arm_usub16 +#define __UQSUB16 __builtin_arm_uqsub16 +#define __UHSUB16 __builtin_arm_uhsub16 +#define __SASX __builtin_arm_sasx +#define __QASX __builtin_arm_qasx +#define __SHASX __builtin_arm_shasx +#define __UASX __builtin_arm_uasx +#define __UQASX __builtin_arm_uqasx +#define __UHASX __builtin_arm_uhasx +#define __SSAX __builtin_arm_ssax +#define __QSAX __builtin_arm_qsax +#define __SHSAX __builtin_arm_shsax +#define __USAX __builtin_arm_usax +#define __UQSAX __builtin_arm_uqsax +#define __UHSAX __builtin_arm_uhsax +#define __USAD8 __builtin_arm_usad8 +#define __USADA8 __builtin_arm_usada8 +#define __SSAT16 __builtin_arm_ssat16 +#define __USAT16 __builtin_arm_usat16 +#define __UXTB16 __builtin_arm_uxtb16 +#define __UXTAB16 __builtin_arm_uxtab16 +#define __SXTB16 __builtin_arm_sxtb16 +#define __SXTAB16 __builtin_arm_sxtab16 +#define __SMUAD __builtin_arm_smuad +#define __SMUADX __builtin_arm_smuadx +#define __SMLAD __builtin_arm_smlad +#define __SMLADX __builtin_arm_smladx +#define __SMLALD __builtin_arm_smlald +#define __SMLALDX __builtin_arm_smlaldx +#define __SMUSD __builtin_arm_smusd +#define __SMUSDX __builtin_arm_smusdx +#define __SMLSD __builtin_arm_smlsd +#define __SMLSDX __builtin_arm_smlsdx +#define __SMLSLD __builtin_arm_smlsld +#define __SMLSLDX __builtin_arm_smlsldx +#define __SEL __builtin_arm_sel +#define __QADD __builtin_arm_qadd +#define __QSUB __builtin_arm_qsub + +#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ + ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) + +#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ + ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) + +__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) +{ + int32_t result; + + __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#endif /* (__ARM_FEATURE_DSP == 1) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#endif /* __CMSIS_ARMCLANG_H */ diff --git a/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_gcc.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_armclang_ltm.h similarity index 79% rename from hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_gcc.h rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_armclang_ltm.h index 3ddcc58..feec324 100644 --- a/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_gcc.h +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_armclang_ltm.h @@ -1,11 +1,11 @@ /**************************************************************************//** - * @file cmsis_gcc.h - * @brief CMSIS compiler GCC header file - * @version V5.2.0 + * @file cmsis_armclang_ltm.h + * @brief CMSIS compiler armclang (Arm Compiler 6) header file + * @version V1.2.0 * @date 08. May 2019 ******************************************************************************/ /* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * Copyright (c) 2018-2019 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -22,18 +22,15 @@ * limitations under the License. */ -#ifndef __CMSIS_GCC_H -#define __CMSIS_GCC_H +/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */ -/* ignore some GCC warnings */ -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wsign-conversion" -#pragma GCC diagnostic ignored "-Wconversion" -#pragma GCC diagnostic ignored "-Wunused-parameter" +#ifndef __CMSIS_ARMCLANG_H +#define __CMSIS_ARMCLANG_H -/* Fallback for __has_builtin */ -#ifndef __has_builtin - #define __has_builtin(x) (0) +#pragma clang system_header /* treat file as system include file */ + +#ifndef __ARM_COMPAT_H +#include /* Compatibility header for Arm Compiler 5 intrinsics */ #endif /* CMSIS compiler specific defines */ @@ -41,14 +38,14 @@ #define __ASM __asm #endif #ifndef __INLINE - #define __INLINE inline + #define __INLINE __inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline + #define __STATIC_INLINE static __inline +#endif +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline #endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline -#endif #ifndef __NO_RETURN #define __NO_RETURN __attribute__((__noreturn__)) #endif @@ -68,43 +65,43 @@ #define __PACKED_UNION union __attribute__((packed, aligned(1))) #endif #ifndef __UNALIGNED_UINT32 /* deprecated */ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */ struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #pragma GCC diagnostic pop + #pragma clang diagnostic pop #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) #endif #ifndef __UNALIGNED_UINT16_WRITE - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #pragma GCC diagnostic pop + #pragma clang diagnostic pop #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) #endif #ifndef __UNALIGNED_UINT16_READ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #pragma GCC diagnostic pop + #pragma clang diagnostic pop #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) #endif #ifndef __UNALIGNED_UINT32_WRITE - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #pragma GCC diagnostic pop + #pragma clang diagnostic pop #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) #endif #ifndef __UNALIGNED_UINT32_READ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */ __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #pragma GCC diagnostic pop + #pragma clang diagnostic pop #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) #endif #ifndef __ALIGNED @@ -120,58 +117,15 @@ /* ######################### Startup and Lowlevel Init ######################## */ #ifndef __PROGRAM_START - -/** - \brief Initializes data and bss sections - \details This default implementations initialized all data and additional bss - sections relying on .copy.table and .zero.table specified properly - in the used linker script. - - */ -__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) -{ - extern void _start(void) __NO_RETURN; - - typedef struct { - uint32_t const* src; - uint32_t* dest; - uint32_t wlen; - } __copy_table_t; - - typedef struct { - uint32_t* dest; - uint32_t wlen; - } __zero_table_t; - - extern const __copy_table_t __copy_table_start__; - extern const __copy_table_t __copy_table_end__; - extern const __zero_table_t __zero_table_start__; - extern const __zero_table_t __zero_table_end__; - - for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) { - for(uint32_t i=0u; iwlen; ++i) { - pTable->dest[i] = pTable->src[i]; - } - } - - for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) { - for(uint32_t i=0u; iwlen; ++i) { - pTable->dest[i] = 0u; - } - } - - _start(); -} - -#define __PROGRAM_START __cmsis_start +#define __PROGRAM_START __main #endif #ifndef __INITIAL_SP -#define __INITIAL_SP __StackTop +#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit #endif #ifndef __STACK_LIMIT -#define __STACK_LIMIT __StackLimit +#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base #endif #ifndef __VECTOR_TABLE @@ -179,9 +133,10 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) #endif #ifndef __VECTOR_TABLE_ATTRIBUTE -#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) +#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET"))) #endif + /* ########################### Core Function Access ########################### */ /** \ingroup CMSIS_Core_FunctionInterface \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions @@ -193,10 +148,7 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) \details Enables IRQ interrupts by clearing the I-bit in the CPSR. Can only be executed in Privileged modes. */ -__STATIC_FORCEINLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} +/* intrinsic void __enable_irq(); see arm_compat.h */ /** @@ -204,10 +156,7 @@ __STATIC_FORCEINLINE void __enable_irq(void) \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ -__STATIC_FORCEINLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} +/* intrinsic void __disable_irq(); see arm_compat.h */ /** @@ -450,7 +399,7 @@ __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) { uint32_t result; - __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + __ASM volatile ("MRS %0, primask" : "=r" (result) ); return(result); } @@ -465,7 +414,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) { uint32_t result; - __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); return(result); } #endif @@ -503,10 +452,7 @@ __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) \details Enables FIQ interrupts by clearing the F-bit in the CPSR. Can only be executed in Privileged modes. */ -__STATIC_FORCEINLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} +#define __enable_fault_irq __enable_fiq /* see arm_compat.h */ /** @@ -514,10 +460,7 @@ __STATIC_FORCEINLINE void __enable_fault_irq(void) \details Disables FIQ interrupts by setting the F-bit in the CPSR. Can only be executed in Privileged modes. */ -__STATIC_FORCEINLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} +#define __disable_fault_irq __disable_fiq /* see arm_compat.h */ /** @@ -673,7 +616,8 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) /** \brief Get Process Stack Pointer Limit (non-secure) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always. + Stack Pointer Limit register hence zero is returned always in non-secure + mode. \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. \return PSPLIM Register value @@ -717,7 +661,8 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) /** \brief Set Process Stack Pointer (non-secure) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored. + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set @@ -737,8 +682,7 @@ __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) /** \brief Get Main Stack Pointer Limit Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always in non-secure - mode. + Stack Pointer Limit register hence zero is returned always. \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). \return MSPLIM Register value @@ -783,8 +727,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) /** \brief Set Main Stack Pointer Limit Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored in non-secure - mode. + Stack Pointer Limit register hence the write is silently ignored. \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set @@ -824,54 +767,29 @@ __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ - /** \brief Get FPSCR \details Returns the current value of the Floating Point Status/Control register. \return Floating Point Status/Control register value */ -__STATIC_FORCEINLINE uint32_t __get_FPSCR(void) -{ #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#if __has_builtin(__builtin_arm_get_fpscr) -// Re-enable using built-in when GCC has been fixed -// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) - /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ - return __builtin_arm_get_fpscr(); -#else - uint32_t result; - - __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - return(result); -#endif +#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr #else - return(0U); +#define __get_FPSCR() ((uint32_t)0U) #endif -} - /** \brief Set FPSCR \details Assigns the given value to the Floating Point Status/Control register. \param [in] fpscr Floating Point Status/Control value to set */ -__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) -{ #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#if __has_builtin(__builtin_arm_set_fpscr) -// Re-enable using built-in when GCC has been fixed -// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) - /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ - __builtin_arm_set_fpscr(fpscr); +#define __set_FPSCR __builtin_arm_set_fpscr #else - __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); +#define __set_FPSCR(x) ((void)(x)) #endif -#else - (void)fpscr; -#endif -} /*@} end of CMSIS_Core_RegAccFunctions */ @@ -888,11 +806,9 @@ __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) * Otherwise, use general registers, specified by constraint "r" */ #if defined (__thumb__) && !defined (__thumb2__) #define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_RW_REG(r) "+l" (r) #define __CMSIS_GCC_USE_REG(r) "l" (r) #else #define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_RW_REG(r) "+r" (r) #define __CMSIS_GCC_USE_REG(r) "r" (r) #endif @@ -900,13 +816,13 @@ __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ -#define __NOP() __ASM volatile ("nop") +#define __NOP __builtin_arm_nop /** \brief Wait For Interrupt \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. */ -#define __WFI() __ASM volatile ("wfi") +#define __WFI __builtin_arm_wfi /** @@ -914,14 +830,14 @@ __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) \details Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs. */ -#define __WFE() __ASM volatile ("wfe") +#define __WFE __builtin_arm_wfe /** \brief Send Event \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. */ -#define __SEV() __ASM volatile ("sev") +#define __SEV __builtin_arm_sev /** @@ -930,21 +846,14 @@ __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed. */ -__STATIC_FORCEINLINE void __ISB(void) -{ - __ASM volatile ("isb 0xF":::"memory"); -} - +#define __ISB() __builtin_arm_isb(0xF) /** \brief Data Synchronization Barrier \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ -__STATIC_FORCEINLINE void __DSB(void) -{ - __ASM volatile ("dsb 0xF":::"memory"); -} +#define __DSB() __builtin_arm_dsb(0xF) /** @@ -952,10 +861,7 @@ __STATIC_FORCEINLINE void __DSB(void) \details Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion. */ -__STATIC_FORCEINLINE void __DMB(void) -{ - __ASM volatile ("dmb 0xF":::"memory"); -} +#define __DMB() __builtin_arm_dmb(0xF) /** @@ -964,17 +870,7 @@ __STATIC_FORCEINLINE void __DMB(void) \param [in] value Value to reverse \return Reversed value */ -__STATIC_FORCEINLINE uint32_t __REV(uint32_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) - return __builtin_bswap32(value); -#else - uint32_t result; - - __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return result; -#endif -} +#define __REV(value) __builtin_bswap32(value) /** @@ -983,13 +879,7 @@ __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) \param [in] value Value to reverse \return Reversed value */ -__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return result; -} +#define __REV16(value) __ROR(__REV(value), 16) /** @@ -998,17 +888,7 @@ __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) \param [in] value Value to reverse \return Reversed value */ -__STATIC_FORCEINLINE int16_t __REVSH(int16_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - return (int16_t)__builtin_bswap16(value); -#else - int16_t result; - - __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return result; -#endif -} +#define __REVSH(value) (int16_t)__builtin_bswap16(value) /** @@ -1036,7 +916,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) \param [in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint. */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) +#define __BKPT(value) __ASM volatile ("bkpt "#value) /** @@ -1045,29 +925,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) \param [in] value Value to reverse \return Reversed value */ -__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); -#else - uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value != 0U; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return result; -} - +#define __RBIT __builtin_arm_rbit /** \brief Count leading zeros @@ -1083,7 +941,7 @@ __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) target, and ensures the compiler doesn't decide to activate any optimisations using the logic "value was passed to __builtin_clz, so it is non-zero". - ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a + ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a single CLZ instruction. */ if (value == 0U) @@ -1104,20 +962,7 @@ __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) \param [in] ptr Pointer to data \return value of type uint8_t at (*ptr) */ -__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} +#define __LDREXB (uint8_t)__builtin_arm_ldrex /** @@ -1126,20 +971,7 @@ __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) \param [in] ptr Pointer to data \return value of type uint16_t at (*ptr) */ -__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} +#define __LDREXH (uint16_t)__builtin_arm_ldrex /** @@ -1148,13 +980,7 @@ __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) \param [in] ptr Pointer to data \return value of type uint32_t at (*ptr) */ -__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - return(result); -} +#define __LDREXW (uint32_t)__builtin_arm_ldrex /** @@ -1165,13 +991,7 @@ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) \return 0 Function succeeded \return 1 Function failed */ -__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} +#define __STREXB (uint32_t)__builtin_arm_strex /** @@ -1182,13 +1002,7 @@ __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) \return 0 Function succeeded \return 1 Function failed */ -__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} +#define __STREXH (uint32_t)__builtin_arm_strex /** @@ -1199,23 +1013,14 @@ __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) \return 0 Function succeeded \return 1 Function failed */ -__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - return(result); -} +#define __STREXW (uint32_t)__builtin_arm_strex /** \brief Remove the exclusive lock \details Removes the exclusive lock which is created by LDREX. */ -__STATIC_FORCEINLINE void __CLREX(void) -{ - __ASM volatile ("clrex" ::: "memory"); -} +#define __CLREX __builtin_arm_clrex #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ @@ -1226,36 +1031,25 @@ __STATIC_FORCEINLINE void __CLREX(void) #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + /** \brief Signed Saturate \details Saturates a signed value. - \param [in] ARG1 Value to be saturated - \param [in] ARG2 Bit position to saturate to (1..32) + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) \return Saturated value */ -#define __SSAT(ARG1,ARG2) \ -__extension__ \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) +#define __SSAT __builtin_arm_ssat /** \brief Unsigned Saturate \details Saturates an unsigned value. - \param [in] ARG1 Value to be saturated - \param [in] ARG2 Bit position to saturate to (0..31) + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) \return Saturated value */ -#define __USAT(ARG1,ARG2) \ - __extension__ \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) +#define __USAT __builtin_arm_usat /** @@ -1282,17 +1076,10 @@ __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) */ __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) { - uint32_t result; + uint32_t result; -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); /* Add explicit type cast here */ } @@ -1304,17 +1091,10 @@ __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) */ __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) { - uint32_t result; + uint32_t result; -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); /* Add explicit type cast here */ } @@ -1326,10 +1106,10 @@ __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) */ __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) { - uint32_t result; + uint32_t result; - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); } @@ -1341,7 +1121,7 @@ __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) */ __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) { - __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); + __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); } @@ -1353,7 +1133,7 @@ __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) */ __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) { - __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); + __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); } @@ -1365,7 +1145,7 @@ __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) */ __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) { - __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); + __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); } #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ @@ -1436,10 +1216,10 @@ __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) */ __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) { - uint32_t result; + uint32_t result; - __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); + __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); } @@ -1451,10 +1231,10 @@ __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) */ __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) { - uint32_t result; + uint32_t result; - __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); + __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); } @@ -1466,10 +1246,10 @@ __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) */ __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) { - uint32_t result; + uint32_t result; - __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); + __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); } @@ -1481,7 +1261,7 @@ __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) */ __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) { - __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); + __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); } @@ -1493,7 +1273,7 @@ __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) */ __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) { - __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); + __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); } @@ -1505,7 +1285,7 @@ __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) */ __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) { - __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); + __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); } @@ -1515,13 +1295,7 @@ __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) \param [in] ptr Pointer to data \return value of type uint8_t at (*ptr) */ -__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); -} +#define __LDAEXB (uint8_t)__builtin_arm_ldaex /** @@ -1530,13 +1304,7 @@ __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) \param [in] ptr Pointer to data \return value of type uint16_t at (*ptr) */ -__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); -} +#define __LDAEXH (uint16_t)__builtin_arm_ldaex /** @@ -1545,13 +1313,7 @@ __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) \param [in] ptr Pointer to data \return value of type uint32_t at (*ptr) */ -__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} +#define __LDAEX (uint32_t)__builtin_arm_ldaex /** @@ -1562,13 +1324,7 @@ __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) \return 0 Function succeeded \return 1 Function failed */ -__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); - return(result); -} +#define __STLEXB (uint32_t)__builtin_arm_stlex /** @@ -1579,13 +1335,7 @@ __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) \return 0 Function succeeded \return 1 Function failed */ -__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); - return(result); -} +#define __STLEXH (uint32_t)__builtin_arm_stlex /** @@ -1596,13 +1346,7 @@ __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) \return 0 Function succeeded \return 1 Function failed */ -__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); - return(result); -} +#define __STLEX (uint32_t)__builtin_arm_stlex #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ @@ -2126,25 +1870,6 @@ __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) return(result); } -#if 0 -#define __PKHBT(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -#define __PKHTB(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - if (ARG3 == 0) \ - __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ - else \ - __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) -#endif - #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) @@ -2153,16 +1878,14 @@ __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) { - int32_t result; + int32_t result; - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); + __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); + return(result); } #endif /* (__ARM_FEATURE_DSP == 1) */ /*@} end of group CMSIS_SIMD_intrinsics */ -#pragma GCC diagnostic pop - -#endif /* __CMSIS_GCC_H */ +#endif /* __CMSIS_ARMCLANG_H */ diff --git a/hw/STM32F091RB/Drivers/CMSIS/Include/cmsis_compiler.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_compiler.h similarity index 100% rename from hw/STM32F091RB/Drivers/CMSIS/Include/cmsis_compiler.h rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_compiler.h diff --git a/hw/STM32F091RB/Drivers/CMSIS/Include/cmsis_gcc.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_gcc.h similarity index 100% rename from hw/STM32F091RB/Drivers/CMSIS/Include/cmsis_gcc.h rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_gcc.h diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_iccarm.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_iccarm.h new file mode 100644 index 0000000..12d68fd --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_iccarm.h @@ -0,0 +1,964 @@ +/**************************************************************************//** + * @file cmsis_iccarm.h + * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file + * @version V5.1.0 + * @date 08. May 2019 + ******************************************************************************/ + +//------------------------------------------------------------------------------ +// +// Copyright (c) 2017-2019 IAR Systems +// Copyright (c) 2017-2019 Arm Limited. All rights reserved. +// +// Licensed under the Apache License, Version 2.0 (the "License") +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +//------------------------------------------------------------------------------ + + +#ifndef __CMSIS_ICCARM_H__ +#define __CMSIS_ICCARM_H__ + +#ifndef __ICCARM__ + #error This file should only be compiled by ICCARM +#endif + +#pragma system_include + +#define __IAR_FT _Pragma("inline=forced") __intrinsic + +#if (__VER__ >= 8000000) + #define __ICCARM_V8 1 +#else + #define __ICCARM_V8 0 +#endif + +#ifndef __ALIGNED + #if __ICCARM_V8 + #define __ALIGNED(x) __attribute__((aligned(x))) + #elif (__VER__ >= 7080000) + /* Needs IAR language extensions */ + #define __ALIGNED(x) __attribute__((aligned(x))) + #else + #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. + #define __ALIGNED(x) + #endif +#endif + + +/* Define compiler macros for CPU architecture, used in CMSIS 5. + */ +#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__ +/* Macros already defined */ +#else + #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #elif defined(__ARM8M_BASELINE__) + #define __ARM_ARCH_8M_BASE__ 1 + #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M' + #if __ARM_ARCH == 6 + #define __ARM_ARCH_6M__ 1 + #elif __ARM_ARCH == 7 + #if __ARM_FEATURE_DSP + #define __ARM_ARCH_7EM__ 1 + #else + #define __ARM_ARCH_7M__ 1 + #endif + #endif /* __ARM_ARCH */ + #endif /* __ARM_ARCH_PROFILE == 'M' */ +#endif + +/* Alternativ core deduction for older ICCARM's */ +#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \ + !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__) + #if defined(__ARM6M__) && (__CORE__ == __ARM6M__) + #define __ARM_ARCH_6M__ 1 + #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__) + #define __ARM_ARCH_7M__ 1 + #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) + #define __ARM_ARCH_7EM__ 1 + #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__) + #define __ARM_ARCH_8M_BASE__ 1 + #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #else + #error "Unknown target." + #endif +#endif + + + +#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1 + #define __IAR_M0_FAMILY 1 +#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1 + #define __IAR_M0_FAMILY 1 +#else + #define __IAR_M0_FAMILY 0 +#endif + + +#ifndef __ASM + #define __ASM __asm +#endif + +#ifndef __COMPILER_BARRIER + #define __COMPILER_BARRIER() __ASM volatile("":::"memory") +#endif + +#ifndef __INLINE + #define __INLINE inline +#endif + +#ifndef __NO_RETURN + #if __ICCARM_V8 + #define __NO_RETURN __attribute__((__noreturn__)) + #else + #define __NO_RETURN _Pragma("object_attribute=__noreturn") + #endif +#endif + +#ifndef __PACKED + #if __ICCARM_V8 + #define __PACKED __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED __packed + #endif +#endif + +#ifndef __PACKED_STRUCT + #if __ICCARM_V8 + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED_STRUCT __packed struct + #endif +#endif + +#ifndef __PACKED_UNION + #if __ICCARM_V8 + #define __PACKED_UNION union __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED_UNION __packed union + #endif +#endif + +#ifndef __RESTRICT + #if __ICCARM_V8 + #define __RESTRICT __restrict + #else + /* Needs IAR language extensions */ + #define __RESTRICT restrict + #endif +#endif + +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline +#endif + +#ifndef __FORCEINLINE + #define __FORCEINLINE _Pragma("inline=forced") +#endif + +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE +#endif + +#ifndef __UNALIGNED_UINT16_READ +#pragma language=save +#pragma language=extended +__IAR_FT uint16_t __iar_uint16_read(void const *ptr) +{ + return *(__packed uint16_t*)(ptr); +} +#pragma language=restore +#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR) +#endif + + +#ifndef __UNALIGNED_UINT16_WRITE +#pragma language=save +#pragma language=extended +__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) +{ + *(__packed uint16_t*)(ptr) = val;; +} +#pragma language=restore +#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL) +#endif + +#ifndef __UNALIGNED_UINT32_READ +#pragma language=save +#pragma language=extended +__IAR_FT uint32_t __iar_uint32_read(void const *ptr) +{ + return *(__packed uint32_t*)(ptr); +} +#pragma language=restore +#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR) +#endif + +#ifndef __UNALIGNED_UINT32_WRITE +#pragma language=save +#pragma language=extended +__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) +{ + *(__packed uint32_t*)(ptr) = val;; +} +#pragma language=restore +#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL) +#endif + +#ifndef __UNALIGNED_UINT32 /* deprecated */ +#pragma language=save +#pragma language=extended +__packed struct __iar_u32 { uint32_t v; }; +#pragma language=restore +#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v) +#endif + +#ifndef __USED + #if __ICCARM_V8 + #define __USED __attribute__((used)) + #else + #define __USED _Pragma("__root") + #endif +#endif + +#ifndef __WEAK + #if __ICCARM_V8 + #define __WEAK __attribute__((weak)) + #else + #define __WEAK _Pragma("__weak") + #endif +#endif + +#ifndef __PROGRAM_START +#define __PROGRAM_START __iar_program_start +#endif + +#ifndef __INITIAL_SP +#define __INITIAL_SP CSTACK$$Limit +#endif + +#ifndef __STACK_LIMIT +#define __STACK_LIMIT CSTACK$$Base +#endif + +#ifndef __VECTOR_TABLE +#define __VECTOR_TABLE __vector_table +#endif + +#ifndef __VECTOR_TABLE_ATTRIBUTE +#define __VECTOR_TABLE_ATTRIBUTE @".intvec" +#endif + +#ifndef __ICCARM_INTRINSICS_VERSION__ + #define __ICCARM_INTRINSICS_VERSION__ 0 +#endif + +#if __ICCARM_INTRINSICS_VERSION__ == 2 + + #if defined(__CLZ) + #undef __CLZ + #endif + #if defined(__REVSH) + #undef __REVSH + #endif + #if defined(__RBIT) + #undef __RBIT + #endif + #if defined(__SSAT) + #undef __SSAT + #endif + #if defined(__USAT) + #undef __USAT + #endif + + #include "iccarm_builtin.h" + + #define __disable_fault_irq __iar_builtin_disable_fiq + #define __disable_irq __iar_builtin_disable_interrupt + #define __enable_fault_irq __iar_builtin_enable_fiq + #define __enable_irq __iar_builtin_enable_interrupt + #define __arm_rsr __iar_builtin_rsr + #define __arm_wsr __iar_builtin_wsr + + + #define __get_APSR() (__arm_rsr("APSR")) + #define __get_BASEPRI() (__arm_rsr("BASEPRI")) + #define __get_CONTROL() (__arm_rsr("CONTROL")) + #define __get_FAULTMASK() (__arm_rsr("FAULTMASK")) + + #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + #define __get_FPSCR() (__arm_rsr("FPSCR")) + #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) + #else + #define __get_FPSCR() ( 0 ) + #define __set_FPSCR(VALUE) ((void)VALUE) + #endif + + #define __get_IPSR() (__arm_rsr("IPSR")) + #define __get_MSP() (__arm_rsr("MSP")) + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + #define __get_MSPLIM() (0U) + #else + #define __get_MSPLIM() (__arm_rsr("MSPLIM")) + #endif + #define __get_PRIMASK() (__arm_rsr("PRIMASK")) + #define __get_PSP() (__arm_rsr("PSP")) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __get_PSPLIM() (0U) + #else + #define __get_PSPLIM() (__arm_rsr("PSPLIM")) + #endif + + #define __get_xPSR() (__arm_rsr("xPSR")) + + #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) + #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) + #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) + #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) + #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + #define __set_MSPLIM(VALUE) ((void)(VALUE)) + #else + #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) + #endif + #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) + #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __set_PSPLIM(VALUE) ((void)(VALUE)) + #else + #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) + #endif + + #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS")) + #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE))) + #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS")) + #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE))) + #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS")) + #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE))) + #define __TZ_get_SP_NS() (__arm_rsr("SP_NS")) + #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) + #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS")) + #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE))) + #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS")) + #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE))) + #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS")) + #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE))) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __TZ_get_PSPLIM_NS() (0U) + #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) + #else + #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS")) + #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE))) + #endif + + #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS")) + #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE))) + + #define __NOP __iar_builtin_no_operation + + #define __CLZ __iar_builtin_CLZ + #define __CLREX __iar_builtin_CLREX + + #define __DMB __iar_builtin_DMB + #define __DSB __iar_builtin_DSB + #define __ISB __iar_builtin_ISB + + #define __LDREXB __iar_builtin_LDREXB + #define __LDREXH __iar_builtin_LDREXH + #define __LDREXW __iar_builtin_LDREX + + #define __RBIT __iar_builtin_RBIT + #define __REV __iar_builtin_REV + #define __REV16 __iar_builtin_REV16 + + __IAR_FT int16_t __REVSH(int16_t val) + { + return (int16_t) __iar_builtin_REVSH(val); + } + + #define __ROR __iar_builtin_ROR + #define __RRX __iar_builtin_RRX + + #define __SEV __iar_builtin_SEV + + #if !__IAR_M0_FAMILY + #define __SSAT __iar_builtin_SSAT + #endif + + #define __STREXB __iar_builtin_STREXB + #define __STREXH __iar_builtin_STREXH + #define __STREXW __iar_builtin_STREX + + #if !__IAR_M0_FAMILY + #define __USAT __iar_builtin_USAT + #endif + + #define __WFE __iar_builtin_WFE + #define __WFI __iar_builtin_WFI + + #if __ARM_MEDIA__ + #define __SADD8 __iar_builtin_SADD8 + #define __QADD8 __iar_builtin_QADD8 + #define __SHADD8 __iar_builtin_SHADD8 + #define __UADD8 __iar_builtin_UADD8 + #define __UQADD8 __iar_builtin_UQADD8 + #define __UHADD8 __iar_builtin_UHADD8 + #define __SSUB8 __iar_builtin_SSUB8 + #define __QSUB8 __iar_builtin_QSUB8 + #define __SHSUB8 __iar_builtin_SHSUB8 + #define __USUB8 __iar_builtin_USUB8 + #define __UQSUB8 __iar_builtin_UQSUB8 + #define __UHSUB8 __iar_builtin_UHSUB8 + #define __SADD16 __iar_builtin_SADD16 + #define __QADD16 __iar_builtin_QADD16 + #define __SHADD16 __iar_builtin_SHADD16 + #define __UADD16 __iar_builtin_UADD16 + #define __UQADD16 __iar_builtin_UQADD16 + #define __UHADD16 __iar_builtin_UHADD16 + #define __SSUB16 __iar_builtin_SSUB16 + #define __QSUB16 __iar_builtin_QSUB16 + #define __SHSUB16 __iar_builtin_SHSUB16 + #define __USUB16 __iar_builtin_USUB16 + #define __UQSUB16 __iar_builtin_UQSUB16 + #define __UHSUB16 __iar_builtin_UHSUB16 + #define __SASX __iar_builtin_SASX + #define __QASX __iar_builtin_QASX + #define __SHASX __iar_builtin_SHASX + #define __UASX __iar_builtin_UASX + #define __UQASX __iar_builtin_UQASX + #define __UHASX __iar_builtin_UHASX + #define __SSAX __iar_builtin_SSAX + #define __QSAX __iar_builtin_QSAX + #define __SHSAX __iar_builtin_SHSAX + #define __USAX __iar_builtin_USAX + #define __UQSAX __iar_builtin_UQSAX + #define __UHSAX __iar_builtin_UHSAX + #define __USAD8 __iar_builtin_USAD8 + #define __USADA8 __iar_builtin_USADA8 + #define __SSAT16 __iar_builtin_SSAT16 + #define __USAT16 __iar_builtin_USAT16 + #define __UXTB16 __iar_builtin_UXTB16 + #define __UXTAB16 __iar_builtin_UXTAB16 + #define __SXTB16 __iar_builtin_SXTB16 + #define __SXTAB16 __iar_builtin_SXTAB16 + #define __SMUAD __iar_builtin_SMUAD + #define __SMUADX __iar_builtin_SMUADX + #define __SMMLA __iar_builtin_SMMLA + #define __SMLAD __iar_builtin_SMLAD + #define __SMLADX __iar_builtin_SMLADX + #define __SMLALD __iar_builtin_SMLALD + #define __SMLALDX __iar_builtin_SMLALDX + #define __SMUSD __iar_builtin_SMUSD + #define __SMUSDX __iar_builtin_SMUSDX + #define __SMLSD __iar_builtin_SMLSD + #define __SMLSDX __iar_builtin_SMLSDX + #define __SMLSLD __iar_builtin_SMLSLD + #define __SMLSLDX __iar_builtin_SMLSLDX + #define __SEL __iar_builtin_SEL + #define __QADD __iar_builtin_QADD + #define __QSUB __iar_builtin_QSUB + #define __PKHBT __iar_builtin_PKHBT + #define __PKHTB __iar_builtin_PKHTB + #endif + +#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */ + + #if __IAR_M0_FAMILY + /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ + #define __CLZ __cmsis_iar_clz_not_active + #define __SSAT __cmsis_iar_ssat_not_active + #define __USAT __cmsis_iar_usat_not_active + #define __RBIT __cmsis_iar_rbit_not_active + #define __get_APSR __cmsis_iar_get_APSR_not_active + #endif + + + #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) + #define __get_FPSCR __cmsis_iar_get_FPSR_not_active + #define __set_FPSCR __cmsis_iar_set_FPSR_not_active + #endif + + #ifdef __INTRINSICS_INCLUDED + #error intrinsics.h is already included previously! + #endif + + #include + + #if __IAR_M0_FAMILY + /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ + #undef __CLZ + #undef __SSAT + #undef __USAT + #undef __RBIT + #undef __get_APSR + + __STATIC_INLINE uint8_t __CLZ(uint32_t data) + { + if (data == 0U) { return 32U; } + + uint32_t count = 0U; + uint32_t mask = 0x80000000U; + + while ((data & mask) == 0U) + { + count += 1U; + mask = mask >> 1U; + } + return count; + } + + __STATIC_INLINE uint32_t __RBIT(uint32_t v) + { + uint8_t sc = 31U; + uint32_t r = v; + for (v >>= 1U; v; v >>= 1U) + { + r <<= 1U; + r |= v & 1U; + sc--; + } + return (r << sc); + } + + __STATIC_INLINE uint32_t __get_APSR(void) + { + uint32_t res; + __asm("MRS %0,APSR" : "=r" (res)); + return res; + } + + #endif + + #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) + #undef __get_FPSCR + #undef __set_FPSCR + #define __get_FPSCR() (0) + #define __set_FPSCR(VALUE) ((void)VALUE) + #endif + + #pragma diag_suppress=Pe940 + #pragma diag_suppress=Pe177 + + #define __enable_irq __enable_interrupt + #define __disable_irq __disable_interrupt + #define __NOP __no_operation + + #define __get_xPSR __get_PSR + + #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0) + + __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) + { + return __LDREX((unsigned long *)ptr); + } + + __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) + { + return __STREX(value, (unsigned long *)ptr); + } + #endif + + + /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ + #if (__CORTEX_M >= 0x03) + + __IAR_FT uint32_t __RRX(uint32_t value) + { + uint32_t result; + __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc"); + return(result); + } + + __IAR_FT void __set_BASEPRI_MAX(uint32_t value) + { + __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); + } + + + #define __enable_fault_irq __enable_fiq + #define __disable_fault_irq __disable_fiq + + + #endif /* (__CORTEX_M >= 0x03) */ + + __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) + { + return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); + } + + #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + + __IAR_FT uint32_t __get_MSPLIM(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,MSPLIM" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __set_MSPLIM(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR MSPLIM,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __get_PSPLIM(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,PSPLIM" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __set_PSPLIM(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR PSPLIM,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,CONTROL_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) + { + __asm volatile("MSR CONTROL_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PSP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,PSP_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_PSP_NS(uint32_t value) + { + __asm volatile("MSR PSP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_MSP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,MSP_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_MSP_NS(uint32_t value) + { + __asm volatile("MSR MSP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_SP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,SP_NS" : "=r" (res)); + return res; + } + __IAR_FT void __TZ_set_SP_NS(uint32_t value) + { + __asm volatile("MSR SP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) + { + __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) + { + __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) + { + __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) + { + __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value)); + } + + #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ + +#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */ + +#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value)) + +#if __IAR_M0_FAMILY + __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) + { + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; + } + + __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) + { + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; + } +#endif + +#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ + + __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) + { + uint32_t res; + __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) + { + uint32_t res; + __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) + { + uint32_t res; + __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return res; + } + + __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) + { + __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); + } + + __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) + { + __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); + } + + __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) + { + __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory"); + } + +#endif /* (__CORTEX_M >= 0x03) */ + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + + + __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return res; + } + + __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) + { + __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) + { + __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) + { + __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + +#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ + +#undef __IAR_FT +#undef __IAR_M0_FAMILY +#undef __ICCARM_V8 + +#pragma diag_default=Pe940 +#pragma diag_default=Pe177 + +#endif /* __CMSIS_ICCARM_H__ */ diff --git a/hw/STM32F091RB/Drivers/CMSIS/Include/cmsis_version.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_version.h similarity index 100% rename from hw/STM32F091RB/Drivers/CMSIS/Include/cmsis_version.h rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/cmsis_version.h diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv81mml.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv81mml.h new file mode 100644 index 0000000..8441e57 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv81mml.h @@ -0,0 +1,2968 @@ +/**************************************************************************//** + * @file core_armv81mml.h + * @brief CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File + * @version V1.0.0 + * @date 15. March 2019 + ******************************************************************************/ +/* + * Copyright (c) 2018-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_ARMV81MML_H_GENERIC +#define __CORE_ARMV81MML_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_ARMV81MML + @{ + */ + +#include "cmsis_version.h" + +#define __ARM_ARCH_8M_MAIN__ 1 // patching for now +/* CMSIS ARMV81MML definitions */ +#define __ARMv81MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __ARMv81MML_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __ARMv81MML_CMSIS_VERSION ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \ + __ARMv81MML_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (81U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV81MML_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_ARMV81MML_H_DEPENDANT +#define __CORE_ARMV81MML_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __ARMv81MML_REV + #define __ARMv81MML_REV 0x0000U + #warning "__ARMv81MML_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DSP_PRESENT + #define __DSP_PRESENT 0U + #warning "__DSP_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group ARMv81MML */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ + uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ + uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ +#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ + +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED6[580U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ + uint32_t RESERVED3[92U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ + uint32_t RESERVED7[6U]; + __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ + __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ + __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ + __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ + __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ + uint32_t RESERVED8[1U]; + __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ +#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ +#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ + +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ +#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ +#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Non-Secure Access Control Register Definitions */ +#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ +#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ + +#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ +#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ + +#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ +#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/* Instruction Tightly-Coupled Memory Control Register Definitions */ +#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ +#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ + +#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ +#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ + +#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ +#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ + +#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ +#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ + +/* Data Tightly-Coupled Memory Control Register Definitions */ +#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ +#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ + +#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ +#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ + +#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ +#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ + +#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ +#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ + +/* AHBP Control Register Definitions */ +#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ +#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ + +#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ +#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ + +/* L1 Cache Control Register Definitions */ +#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ +#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ + +#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ +#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ + +#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ +#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ + +/* AHBS Control Register Definitions */ +#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ +#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ + +#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ +#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ + +#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ +#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ + +/* Auxiliary Bus Fault Status Register Definitions */ +#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ +#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ + +#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ +#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ + +#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ +#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ + +#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ +#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ + +#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ +#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ + +#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ +#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ + uint32_t RESERVED6[4U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Stimulus Port Register Definitions */ +#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ +#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ + +#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ +#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ +#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ + +#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ +#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ + uint32_t RESERVED32[934U]; + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ + uint32_t RESERVED33[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ +#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ +#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ +#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ + __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ + __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ + __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ + uint32_t RESERVED0[1]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_PXN_Pos 4U /*!< MPU RLAR: PXN Position */ +#define MPU_RLAR_PXN_Msk (0x1UL << MPU_RLAR_PXN_Pos) /*!< MPU RLAR: PXN Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#else + uint32_t RESERVED0[3]; +#endif + __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ + __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/* Secure Fault Status Register Definitions */ +#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ +#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ + +#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ +#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ + +#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ +#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ + +#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ +#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ + +#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ +#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ + +#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ +#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ + +#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ +#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ + +#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ +#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ +#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ + +#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ +#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ + +#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ +#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ + +#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ +#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ + +#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ +#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ + +#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ +#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ +#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ +#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + + #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ + #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + __DSB(); +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Priority Grouping (non-secure) + \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB_NS->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB_NS->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping (non-secure) + \details Reads the priority grouping field from the non-secure NVIC when in secure state. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) +{ + return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV81MML_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv8mbl.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv8mbl.h new file mode 100644 index 0000000..344dca5 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv8mbl.h @@ -0,0 +1,1921 @@ +/**************************************************************************//** + * @file core_armv8mbl.h + * @brief CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File + * @version V5.0.8 + * @date 12. November 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_ARMV8MBL_H_GENERIC +#define __CORE_ARMV8MBL_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_ARMv8MBL + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS definitions */ +#define __ARMv8MBL_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __ARMv8MBL_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __ARMv8MBL_CMSIS_VERSION ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \ + __ARMv8MBL_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M ( 2U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MBL_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_ARMV8MBL_H_DEPENDANT +#define __CORE_ARMV8MBL_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __ARMv8MBL_REV + #define __ARMv8MBL_REV 0x0000U + #warning "__ARMv8MBL_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif + + #ifndef __ETM_PRESENT + #define __ETM_PRESENT 0U + #warning "__ETM_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MTB_PRESENT + #define __MTB_PRESENT 0U + #warning "__MTB_PRESENT not defined in device header file; using default!" + #endif + +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group ARMv8MBL */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + uint32_t RESERVED0[6U]; + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[809U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ + uint32_t RESERVED4[4U]; + __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ +#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI Periodic Synchronization Control Register Definitions */ +#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ +#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ + +/* TPI Software Lock Status Register Definitions */ +#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ +#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ + +#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ +#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ + +#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ +#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + uint32_t RESERVED0[7U]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 1U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#endif +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register */ +#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< CoreDebug DEMCR: DWTENA Position */ +#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + If VTOR is not present address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + __DSB(); +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MBL_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv8mml.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv8mml.h new file mode 100644 index 0000000..5ddb8ae --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_armv8mml.h @@ -0,0 +1,2835 @@ +/**************************************************************************//** + * @file core_armv8mml.h + * @brief CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File + * @version V5.1.0 + * @date 12. September 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_ARMV8MML_H_GENERIC +#define __CORE_ARMV8MML_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_ARMv8MML + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS Armv8MML definitions */ +#define __ARMv8MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __ARMv8MML_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __ARMv8MML_CMSIS_VERSION ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \ + __ARMv8MML_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (81U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MML_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_ARMV8MML_H_DEPENDANT +#define __CORE_ARMV8MML_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __ARMv8MML_REV + #define __ARMv8MML_REV 0x0000U + #warning "__ARMv8MML_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DSP_PRESENT + #define __DSP_PRESENT 0U + #warning "__DSP_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group ARMv8MML */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ + uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ + uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ +#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ + +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED6[580U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ + uint32_t RESERVED3[92U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ +#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ +#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ + +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ +#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ +#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Non-Secure Access Control Register Definitions */ +#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ +#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ + +#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ +#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ + +#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ +#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ + uint32_t RESERVED6[4U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Stimulus Port Register Definitions */ +#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ +#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ + +#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ +#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ +#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ + +#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ +#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ + uint32_t RESERVED32[934U]; + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ + uint32_t RESERVED33[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ +#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[809U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ + uint32_t RESERVED4[4U]; + __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ +#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI Periodic Synchronization Control Register Definitions */ +#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ +#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ + +/* TPI Software Lock Status Register Definitions */ +#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ +#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ + +#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ +#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ + +#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ +#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ + __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ + __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ + __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ + uint32_t RESERVED0[1]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#else + uint32_t RESERVED0[3]; +#endif + __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ + __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/* Secure Fault Status Register Definitions */ +#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ +#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ + +#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ +#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ + +#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ +#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ + +#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ +#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ + +#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ +#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ + +#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ +#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ + +#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ +#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ + +#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ +#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ +#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ + +#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ +#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ + +#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ +#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ + +#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ +#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ + +#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ +#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ + +#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ +#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ +#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ +#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + + #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ + #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + __DSB(); +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Priority Grouping (non-secure) + \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB_NS->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB_NS->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping (non-secure) + \details Reads the priority grouping field from the non-secure NVIC when in secure state. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) +{ + return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MML_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/hw/STM32F030R8/Drivers/CMSIS/Include/core_cm0.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm0.h similarity index 98% rename from hw/STM32F030R8/Drivers/CMSIS/Include/core_cm0.h rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm0.h index f929bba..cafae5a 100644 --- a/hw/STM32F030R8/Drivers/CMSIS/Include/core_cm0.h +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm0.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_cm0.h * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File - * @version V5.0.5 - * @date 28. May 2018 + * @version V5.0.6 + * @date 13. March 2019 ******************************************************************************/ /* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -81,7 +81,7 @@ #endif #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP + #if defined __ARM_FP #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" #endif @@ -316,7 +316,7 @@ typedef struct __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ uint32_t RESERVED0[31U]; __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; + uint32_t RESERVED1[31U]; __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ uint32_t RESERVED2[31U]; __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ @@ -624,7 +624,9 @@ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { + __COMPILER_BARRIER(); NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); } } @@ -829,8 +831,9 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr */ __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { - uint32_t *vectors = (uint32_t *)0x0U; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + uint32_t vectors = 0x0U; + (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; + /* ARM Application Note 321 states that the M0 does not require the architectural barrier */ } @@ -844,8 +847,8 @@ __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) */ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) { - uint32_t *vectors = (uint32_t *)0x0U; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; + uint32_t vectors = 0x0U; + return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); } diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm0plus.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm0plus.h new file mode 100644 index 0000000..d104965 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm0plus.h @@ -0,0 +1,1085 @@ +/**************************************************************************//** + * @file core_cm0plus.h + * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File + * @version V5.0.7 + * @date 13. March 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM0PLUS_H_GENERIC +#define __CORE_CM0PLUS_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex-M0+ + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM0+ definitions */ +#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ + __CM0PLUS_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (0U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM0PLUS_H_DEPENDANT +#define __CORE_CM0PLUS_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM0PLUS_REV + #define __CM0PLUS_REV 0x0000U + #warning "__CM0PLUS_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex-M0+ */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RESERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 1U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M0+ header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0+ */ + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + If VTOR is not present address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t vectors = SCB->VTOR; +#else + uint32_t vectors = 0x0U; +#endif + (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; + /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */ +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t vectors = SCB->VTOR; +#else + uint32_t vectors = 0x0U; +#endif + return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/hw/STM32F091RB/Drivers/CMSIS/Include/core_cm0.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm1.h similarity index 94% rename from hw/STM32F091RB/Drivers/CMSIS/Include/core_cm0.h rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm1.h index f929bba..76b4569 100644 --- a/hw/STM32F091RB/Drivers/CMSIS/Include/core_cm0.h +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm1.h @@ -1,8 +1,8 @@ /**************************************************************************//** - * @file core_cm0.h - * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File - * @version V5.0.5 - * @date 28. May 2018 + * @file core_cm1.h + * @brief CMSIS Cortex-M1 Core Peripheral Access Layer Header File + * @version V1.0.1 + * @date 12. November 2018 ******************************************************************************/ /* * Copyright (c) 2009-2018 Arm Limited. All rights reserved. @@ -28,8 +28,8 @@ #pragma clang system_header /* treat file as system include file */ #endif -#ifndef __CORE_CM0_H_GENERIC -#define __CORE_CM0_H_GENERIC +#ifndef __CORE_CM1_H_GENERIC +#define __CORE_CM1_H_GENERIC #include @@ -56,19 +56,19 @@ * CMSIS definitions ******************************************************************************/ /** - \ingroup Cortex_M0 + \ingroup Cortex_M1 @{ */ #include "cmsis_version.h" -/* CMSIS CM0 definitions */ -#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ - __CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ +/* CMSIS CM1 definitions */ +#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM1_CMSIS_VERSION ((__CM1_CMSIS_VERSION_MAIN << 16U) | \ + __CM1_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ -#define __CORTEX_M (0U) /*!< Cortex-M Core */ +#define __CORTEX_M (1U) /*!< Cortex-M Core */ /** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all @@ -81,7 +81,7 @@ #endif #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP + #if defined __ARM_FP #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" #endif @@ -119,12 +119,12 @@ } #endif -#endif /* __CORE_CM0_H_GENERIC */ +#endif /* __CORE_CM1_H_GENERIC */ #ifndef __CMSIS_GENERIC -#ifndef __CORE_CM0_H_DEPENDANT -#define __CORE_CM0_H_DEPENDANT +#ifndef __CORE_CM1_H_DEPENDANT +#define __CORE_CM1_H_DEPENDANT #ifdef __cplusplus extern "C" { @@ -132,9 +132,9 @@ /* check device defines and use defaults */ #if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0_REV - #define __CM0_REV 0x0000U - #warning "__CM0_REV not defined in device header file; using default!" + #ifndef __CM1_REV + #define __CM1_REV 0x0100U + #warning "__CM1_REV not defined in device header file; using default!" #endif #ifndef __NVIC_PRIO_BITS @@ -169,7 +169,7 @@ #define __OM volatile /*! Defines 'write only' structure member permissions */ #define __IOM volatile /*! Defines 'read / write' structure member permissions */ -/*@} end of group Cortex_M0 */ +/*@} end of group Cortex_M1 */ @@ -435,6 +435,32 @@ typedef struct /*@} end of group CMSIS_SCB */ +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_ITCMUAEN_Pos 4U /*!< ACTLR: Instruction TCM Upper Alias Enable Position */ +#define SCnSCB_ACTLR_ITCMUAEN_Msk (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos) /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */ + +#define SCnSCB_ACTLR_ITCMLAEN_Pos 3U /*!< ACTLR: Instruction TCM Lower Alias Enable Position */ +#define SCnSCB_ACTLR_ITCMLAEN_Msk (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos) /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + /** \ingroup CMSIS_core_register \defgroup CMSIS_SysTick System Tick Timer (SysTick) @@ -490,8 +516,8 @@ typedef struct /** \ingroup CMSIS_core_register \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M0 header file. + \brief Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M1 header file. @{ */ /*@} end of group CMSIS_CoreDebug */ @@ -536,6 +562,7 @@ typedef struct #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ @@ -580,7 +607,7 @@ typedef struct #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ -/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */ +/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M1 */ #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority #define NVIC_SystemReset __NVIC_SystemReset @@ -624,7 +651,9 @@ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { if ((int32_t)(IRQn) >= 0) { + __COMPILER_BARRIER(); NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); } } @@ -831,6 +860,7 @@ __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { uint32_t *vectors = (uint32_t *)0x0U; vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + /* ARM Application Note 321 states that the M1 does not require the architectural barrier */ } @@ -944,6 +974,6 @@ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) } #endif -#endif /* __CORE_CM0_H_DEPENDANT */ +#endif /* __CORE_CM1_H_DEPENDANT */ #endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm23.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm23.h new file mode 100644 index 0000000..b79c6af --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm23.h @@ -0,0 +1,1996 @@ +/**************************************************************************//** + * @file core_cm23.h + * @brief CMSIS Cortex-M23 Core Peripheral Access Layer Header File + * @version V5.0.8 + * @date 12. November 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM23_H_GENERIC +#define __CORE_CM23_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M23 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS definitions */ +#define __CM23_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM23_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM23_CMSIS_VERSION ((__CM23_CMSIS_VERSION_MAIN << 16U) | \ + __CM23_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (23U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM23_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM23_H_DEPENDANT +#define __CORE_CM23_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM23_REV + #define __CM23_REV 0x0000U + #warning "__CM23_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif + + #ifndef __ETM_PRESENT + #define __ETM_PRESENT 0U + #warning "__ETM_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MTB_PRESENT + #define __MTB_PRESENT 0U + #warning "__MTB_PRESENT not defined in device header file; using default!" + #endif + +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M23 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + uint32_t RESERVED0[6U]; + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ + __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ + __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration Test FIFO Test Data 0 Register Definitions */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ +#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ +#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ +#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ + +/* TPI Integration Test ATB Control Register 2 Register Definitions */ +#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ +#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ + +#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ +#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ + +#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ +#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ + +#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ +#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ + +/* TPI Integration Test FIFO Test Data 1 Register Definitions */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ +#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ +#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ +#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ + +/* TPI Integration Test ATB Control Register 0 Definitions */ +#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ +#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ + +#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ +#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ + +#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ +#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ + +#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ +#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + uint32_t RESERVED0[7U]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 1U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#endif +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register */ +#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< CoreDebug DEMCR: DWTENA Position */ +#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else +/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M23 */ +/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M23 */ + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + If VTOR is not present address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + __DSB(); +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM23_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm3.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm3.h new file mode 100644 index 0000000..8157ca7 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm3.h @@ -0,0 +1,1937 @@ +/**************************************************************************//** + * @file core_cm3.h + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version V5.1.0 + * @date 13. March 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM3_H_GENERIC +#define __CORE_CM3_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M3 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM3 definitions */ +#define __CM3_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ + __CM3_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (3U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM3_H_DEPENDANT +#define __CORE_CM3_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM3_REV + #define __CM3_REV 0x0200U + #warning "__CM3_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M3 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RESERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#if defined (__CM3_REV) && (__CM3_REV < 0x0201U) /* core r2p1 */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#else +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +#else + uint32_t RESERVED1[1U]; +#endif +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) +#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ +#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ + +#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ +#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ +#endif + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; + /* ARM Application Note 321 states that the M3 does not require the architectural barrier */ +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm33.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm33.h new file mode 100644 index 0000000..7fed59a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm33.h @@ -0,0 +1,2910 @@ +/**************************************************************************//** + * @file core_cm33.h + * @brief CMSIS Cortex-M33 Core Peripheral Access Layer Header File + * @version V5.1.0 + * @date 12. November 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM33_H_GENERIC +#define __CORE_CM33_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M33 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM33 definitions */ +#define __CM33_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM33_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM33_CMSIS_VERSION ((__CM33_CMSIS_VERSION_MAIN << 16U) | \ + __CM33_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (33U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined (__TARGET_FPU_VFP) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined (__ARM_FP) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined (__ARMVFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined (__TI_VFP_SUPPORT__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined (__FPU_VFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM33_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM33_H_DEPENDANT +#define __CORE_CM33_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM33_REV + #define __CM33_REV 0x0000U + #warning "__CM33_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DSP_PRESENT + #define __DSP_PRESENT 0U + #warning "__DSP_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M33 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ + uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ + uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ +#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ + +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED6[580U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ + uint32_t RESERVED3[92U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ +#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ +#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ + +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ +#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ +#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Non-Secure Access Control Register Definitions */ +#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ +#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ + +#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ +#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ + +#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ +#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ + uint32_t RESERVED6[4U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Stimulus Port Register Definitions */ +#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ +#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ + +#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ +#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ +#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ + +#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ +#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ + uint32_t RESERVED32[934U]; + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ + uint32_t RESERVED33[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ +#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ + __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ + __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration Test FIFO Test Data 0 Register Definitions */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ +#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ +#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ +#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ + +/* TPI Integration Test ATB Control Register 2 Register Definitions */ +#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ +#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ + +#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ +#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ + +#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ +#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ + +#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ +#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ + +/* TPI Integration Test FIFO Test Data 1 Register Definitions */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ +#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ +#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ +#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ + +/* TPI Integration Test ATB Control Register 0 Definitions */ +#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ +#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ + +#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ +#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ + +#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ +#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ + +#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ +#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ + __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ + __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ + __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ + uint32_t RESERVED0[1]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#else + uint32_t RESERVED0[3]; +#endif + __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ + __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/* Secure Fault Status Register Definitions */ +#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ +#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ + +#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ +#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ + +#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ +#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ + +#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ +#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ + +#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ +#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ + +#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ +#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ + +#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ +#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ + +#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ +#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ +#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ + +#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ +#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ + +#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ +#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ + +#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ +#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ + +#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ +#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ + +#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ +#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ +#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ +#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + + #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ + #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + __DSB(); +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Priority Grouping (non-secure) + \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB_NS->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB_NS->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping (non-secure) + \details Reads the priority grouping field from the non-secure NVIC when in secure state. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) +{ + return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM33_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm35p.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm35p.h new file mode 100644 index 0000000..5579c82 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm35p.h @@ -0,0 +1,2910 @@ +/**************************************************************************//** + * @file core_cm35p.h + * @brief CMSIS Cortex-M35P Core Peripheral Access Layer Header File + * @version V1.0.0 + * @date 12. November 2018 + ******************************************************************************/ +/* + * Copyright (c) 2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM35P_H_GENERIC +#define __CORE_CM35P_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M35P + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM35P definitions */ +#define __CM35P_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM35P_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM35P_CMSIS_VERSION ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \ + __CM35P_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (35U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined (__TARGET_FPU_VFP) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined (__ARM_FP) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined (__ARMVFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined (__TI_VFP_SUPPORT__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined (__FPU_VFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM35P_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM35P_H_DEPENDANT +#define __CORE_CM35P_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM35P_REV + #define __CM35P_REV 0x0000U + #warning "__CM35P_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DSP_PRESENT + #define __DSP_PRESENT 0U + #warning "__DSP_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M35P */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ + uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ + uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ +#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ + +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED6[580U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ + uint32_t RESERVED3[92U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ +#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ +#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ + +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ +#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ +#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Non-Secure Access Control Register Definitions */ +#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ +#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ + +#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ +#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ + +#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ +#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ + uint32_t RESERVED6[4U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Stimulus Port Register Definitions */ +#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ +#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ + +#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ +#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ +#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ + +#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ +#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ + uint32_t RESERVED32[934U]; + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ + uint32_t RESERVED33[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ +#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ + __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ + __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration Test FIFO Test Data 0 Register Definitions */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ +#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ +#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ +#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ + +/* TPI Integration Test ATB Control Register 2 Register Definitions */ +#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ +#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ + +#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ +#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ + +#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ +#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ + +#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ +#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ + +/* TPI Integration Test FIFO Test Data 1 Register Definitions */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ +#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ +#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ +#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ + +/* TPI Integration Test ATB Control Register 0 Definitions */ +#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ +#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ + +#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ +#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ + +#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ +#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ + +#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ +#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ + __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ + __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ + __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ + uint32_t RESERVED0[1]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#else + uint32_t RESERVED0[3]; +#endif + __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ + __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/* Secure Fault Status Register Definitions */ +#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ +#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ + +#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ +#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ + +#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ +#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ + +#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ +#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ + +#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ +#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ + +#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ +#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ + +#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ +#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ + +#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ +#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ +#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ + +#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ +#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ + +#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ +#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ + +#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ +#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ + +#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ +#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ + +#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ +#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ +#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ +#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + + #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ + #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + __DSB(); +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Priority Grouping (non-secure) + \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB_NS->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB_NS->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping (non-secure) + \details Reads the priority grouping field from the non-secure NVIC when in secure state. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) +{ + return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM35P_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm4.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm4.h new file mode 100644 index 0000000..12c023b --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm4.h @@ -0,0 +1,2124 @@ +/**************************************************************************//** + * @file core_cm4.h + * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File + * @version V5.1.0 + * @date 13. March 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM4_H_GENERIC +#define __CORE_CM4_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M4 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM4 definitions */ +#define __CM4_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM4_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ + __CM4_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (4U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM4_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM4_H_DEPENDANT +#define __CORE_CM4_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM4_REV + #define __CM4_REV 0x0000U + #warning "__CM4_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M4 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RESERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ +#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ + +#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ +#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/* Media and FP Feature Register 2 Definitions */ + +#define FPU_MVFR2_VFP_Misc_Pos 4U /*!< MVFR2: VFP Misc bits Position */ +#define FPU_MVFR2_VFP_Misc_Msk (0xFUL << FPU_MVFR2_VFP_Misc_Pos) /*!< MVFR2: VFP Misc bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ +#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ +#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; + /* ARM Application Note 321 states that the M4 does not require the architectural barrier */ +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM4_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm7.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm7.h new file mode 100644 index 0000000..c4515d8 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_cm7.h @@ -0,0 +1,2725 @@ +/**************************************************************************//** + * @file core_cm7.h + * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File + * @version V5.1.1 + * @date 28. March 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM7_H_GENERIC +#define __CORE_CM7_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M7 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM7 definitions */ +#define __CM7_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM7_CMSIS_VERSION_SUB ( __CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16U) | \ + __CM7_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (7U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM7_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM7_H_DEPENDANT +#define __CORE_CM7_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM7_REV + #define __CM7_REV 0x0000U + #warning "__CM7_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __ICACHE_PRESENT + #define __ICACHE_PRESENT 0U + #warning "__ICACHE_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DCACHE_PRESENT + #define __DCACHE_PRESENT 0U + #warning "__DCACHE_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DTCM_PRESENT + #define __DTCM_PRESENT 0U + #warning "__DTCM_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M7 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RESERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[1U]; + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + uint32_t RESERVED3[93U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ + uint32_t RESERVED7[6U]; + __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ + __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ + __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ + __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ + __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ + uint32_t RESERVED8[1U]; + __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: Branch prediction enable bit Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: Instruction cache enable bit Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: Cache enable bit Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */ + +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/* Instruction Tightly-Coupled Memory Control Register Definitions */ +#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ +#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ + +#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ +#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ + +#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ +#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ + +#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ +#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ + +/* Data Tightly-Coupled Memory Control Register Definitions */ +#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ +#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ + +#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ +#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ + +#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ +#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ + +#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ +#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ + +/* AHBP Control Register Definitions */ +#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ +#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ + +#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ +#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ + +/* L1 Cache Control Register Definitions */ +#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ +#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ + +#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ +#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ + +#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ +#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ + +/* AHBS Control Register Definitions */ +#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ +#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ + +#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ +#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ + +#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ +#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ + +/* Auxiliary Bus Fault Status Register Definitions */ +#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ +#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ + +#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ +#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ + +#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ +#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ + +#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ +#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ + +#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ +#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ + +#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ +#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISDYNADD_Pos 26U /*!< ACTLR: DISDYNADD Position */ +#define SCnSCB_ACTLR_DISDYNADD_Msk (1UL << SCnSCB_ACTLR_DISDYNADD_Pos) /*!< ACTLR: DISDYNADD Mask */ + +#define SCnSCB_ACTLR_DISISSCH1_Pos 21U /*!< ACTLR: DISISSCH1 Position */ +#define SCnSCB_ACTLR_DISISSCH1_Msk (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos) /*!< ACTLR: DISISSCH1 Mask */ + +#define SCnSCB_ACTLR_DISDI_Pos 16U /*!< ACTLR: DISDI Position */ +#define SCnSCB_ACTLR_DISDI_Msk (0x1FUL << SCnSCB_ACTLR_DISDI_Pos) /*!< ACTLR: DISDI Mask */ + +#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos 15U /*!< ACTLR: DISCRITAXIRUR Position */ +#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos) /*!< ACTLR: DISCRITAXIRUR Mask */ + +#define SCnSCB_ACTLR_DISBTACALLOC_Pos 14U /*!< ACTLR: DISBTACALLOC Position */ +#define SCnSCB_ACTLR_DISBTACALLOC_Msk (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos) /*!< ACTLR: DISBTACALLOC Mask */ + +#define SCnSCB_ACTLR_DISBTACREAD_Pos 13U /*!< ACTLR: DISBTACREAD Position */ +#define SCnSCB_ACTLR_DISBTACREAD_Msk (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos) /*!< ACTLR: DISBTACREAD Mask */ + +#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ +#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ + +#define SCnSCB_ACTLR_DISRAMODE_Pos 11U /*!< ACTLR: DISRAMODE Position */ +#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */ + +#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ +#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED3[981U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/* Media and FP Feature Register 2 Definitions */ + +#define FPU_MVFR2_VFP_Misc_Pos 4U /*!< MVFR2: VFP Misc bits Position */ +#define FPU_MVFR2_VFP_Misc_Msk (0xFUL << FPU_MVFR2_VFP_Misc_Pos) /*!< MVFR2: VFP Misc bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ +#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ +#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; + __DSB(); +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = SCB->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## Cache functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_CacheFunctions Cache Functions + \brief Functions that configure Instruction and Data cache. + @{ + */ + +/* Cache Size ID Register Macros */ +#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos) +#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos ) + +#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */ +#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */ + +/** + \brief Enable I-Cache + \details Turns on I-Cache + */ +__STATIC_FORCEINLINE void SCB_EnableICache (void) +{ + #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) + if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */ + + __DSB(); + __ISB(); + SCB->ICIALLU = 0UL; /* invalidate I-Cache */ + __DSB(); + __ISB(); + SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Disable I-Cache + \details Turns off I-Cache + */ +__STATIC_FORCEINLINE void SCB_DisableICache (void) +{ + #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ + SCB->ICIALLU = 0UL; /* invalidate I-Cache */ + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Invalidate I-Cache + \details Invalidates I-Cache + */ +__STATIC_FORCEINLINE void SCB_InvalidateICache (void) +{ + #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->ICIALLU = 0UL; + __DSB(); + __ISB(); + #endif +} + + +/** + \brief I-Cache Invalidate by address + \details Invalidates I-Cache for the given address. + I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. + I-Cache memory blocks which are part of given address + given size are invalidated. + \param[in] addr address + \param[in] isize size of memory block (in number of bytes) +*/ +__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize) +{ + #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) + if ( isize > 0 ) { + int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); + uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */; + + __DSB(); + + do { + SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ + op_addr += __SCB_ICACHE_LINE_SIZE; + op_size -= __SCB_ICACHE_LINE_SIZE; + } while ( op_size > 0 ); + + __DSB(); + __ISB(); + } + #endif +} + + +/** + \brief Enable D-Cache + \details Turns on D-Cache + */ +__STATIC_FORCEINLINE void SCB_EnableDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */ + + SCB->CSSELR = 0U; /* select Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | + ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + __DSB(); + + SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Disable D-Cache + \details Turns off D-Cache + */ +__STATIC_FORCEINLINE void SCB_DisableDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /* select Level 1 data cache */ + __DSB(); + + SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean & invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | + ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Invalidate D-Cache + \details Invalidates D-Cache + */ +__STATIC_FORCEINLINE void SCB_InvalidateDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /* select Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | + ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Clean D-Cache + \details Cleans D-Cache + */ +__STATIC_FORCEINLINE void SCB_CleanDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /* select Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) | + ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Clean & Invalidate D-Cache + \details Cleans and Invalidates D-Cache + */ +__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /* select Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean & invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | + ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief D-Cache Invalidate by address + \details Invalidates D-Cache for the given address. + D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. + D-Cache memory blocks which are part of given address + given size are invalidated. + \param[in] addr address + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + if ( dsize > 0 ) { + int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); + uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; + + __DSB(); + + do { + SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ + op_addr += __SCB_DCACHE_LINE_SIZE; + op_size -= __SCB_DCACHE_LINE_SIZE; + } while ( op_size > 0 ); + + __DSB(); + __ISB(); + } + #endif +} + + +/** + \brief D-Cache Clean by address + \details Cleans D-Cache for the given address + D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity. + D-Cache memory blocks which are part of given address + given size are cleaned. + \param[in] addr address + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + if ( dsize > 0 ) { + int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); + uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; + + __DSB(); + + do { + SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ + op_addr += __SCB_DCACHE_LINE_SIZE; + op_size -= __SCB_DCACHE_LINE_SIZE; + } while ( op_size > 0 ); + + __DSB(); + __ISB(); + } + #endif +} + + +/** + \brief D-Cache Clean and Invalidate by address + \details Cleans and invalidates D_Cache for the given address + D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity. + D-Cache memory blocks which are part of given address + given size are cleaned and invalidated. + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + if ( dsize > 0 ) { + int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); + uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; + + __DSB(); + + do { + SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ + op_addr += __SCB_DCACHE_LINE_SIZE; + op_size -= __SCB_DCACHE_LINE_SIZE; + } while ( op_size > 0 ); + + __DSB(); + __ISB(); + } + #endif +} + +/*@} end of CMSIS_Core_CacheFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM7_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_sc000.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_sc000.h new file mode 100644 index 0000000..cf92577 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_sc000.h @@ -0,0 +1,1025 @@ +/**************************************************************************//** + * @file core_sc000.h + * @brief CMSIS SC000 Core Peripheral Access Layer Header File + * @version V5.0.6 + * @date 12. November 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_SC000_H_GENERIC +#define __CORE_SC000_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup SC000 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS SC000 definitions */ +#define __SC000_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __SC000_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \ + __SC000_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_SC (000U) /*!< Cortex secure core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC000_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_SC000_H_DEPENDANT +#define __CORE_SC000_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __SC000_REV + #define __SC000_REV 0x0000U + #warning "__SC000_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group SC000 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED0[1U]; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + uint32_t RESERVED1[154U]; + __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the SC000 header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else +/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for SC000 */ +/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for SC000 */ + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +/*#define NVIC_GetActive __NVIC_GetActive not available for SC000 */ + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + /* ARM Application Note 321 states that the M0 and M0+ do not require the architectural barrier - assume SC000 is the same */ +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC000_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_sc300.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_sc300.h new file mode 100644 index 0000000..40f3af8 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/core_sc300.h @@ -0,0 +1,1912 @@ +/**************************************************************************//** + * @file core_sc300.h + * @brief CMSIS SC300 Core Peripheral Access Layer Header File + * @version V5.0.8 + * @date 31. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_SC300_H_GENERIC +#define __CORE_SC300_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup SC3000 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS SC300 definitions */ +#define __SC300_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __SC300_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \ + __SC300_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_SC (300U) /*!< Cortex secure core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC300_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_SC300_H_DEPENDANT +#define __CORE_SC300_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __SC300_REV + #define __SC300_REV 0x0000U + #warning "__SC300_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group SC300 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RESERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + uint32_t RESERVED1[129U]; + __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; + /* ARM Application Note 321 states that the M3 does not require the architectural barrier */ +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t vectors = (uint32_t )SCB->VTOR; + return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC300_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/hw/STM32F091RB/Drivers/CMSIS/Include/mpu_armv7.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/mpu_armv7.h similarity index 100% rename from hw/STM32F091RB/Drivers/CMSIS/Include/mpu_armv7.h rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/mpu_armv7.h diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/mpu_armv8.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/mpu_armv8.h new file mode 100644 index 0000000..0041d4d --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/mpu_armv8.h @@ -0,0 +1,346 @@ +/****************************************************************************** + * @file mpu_armv8.h + * @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU + * @version V5.1.0 + * @date 08. March 2019 + ******************************************************************************/ +/* + * Copyright (c) 2017-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef ARM_MPU_ARMV8_H +#define ARM_MPU_ARMV8_H + +/** \brief Attribute for device memory (outer only) */ +#define ARM_MPU_ATTR_DEVICE ( 0U ) + +/** \brief Attribute for non-cacheable, normal memory */ +#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) + +/** \brief Attribute for normal memory (outer and inner) +* \param NT Non-Transient: Set to 1 for non-transient data. +* \param WB Write-Back: Set to 1 to use write-back update policy. +* \param RA Read Allocation: Set to 1 to use cache allocation on read miss. +* \param WA Write Allocation: Set to 1 to use cache allocation on write miss. +*/ +#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \ + (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U)) + +/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U) + +/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_nGnRE (1U) + +/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_nGRE (2U) + +/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_GRE (3U) + +/** \brief Memory Attribute +* \param O Outer memory attributes +* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes +*/ +#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U))) + +/** \brief Normal memory non-shareable */ +#define ARM_MPU_SH_NON (0U) + +/** \brief Normal memory outer shareable */ +#define ARM_MPU_SH_OUTER (2U) + +/** \brief Normal memory inner shareable */ +#define ARM_MPU_SH_INNER (3U) + +/** \brief Memory access permissions +* \param RO Read-Only: Set to 1 for read-only memory. +* \param NP Non-Privileged: Set to 1 for non-privileged memory. +*/ +#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U)) + +/** \brief Region Base Address Register value +* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. +* \param SH Defines the Shareability domain for this memory region. +* \param RO Read-Only: Set to 1 for a read-only memory region. +* \param NP Non-Privileged: Set to 1 for a non-privileged memory region. +* \oaram XN eXecute Never: Set to 1 for a non-executable memory region. +*/ +#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \ + ((BASE & MPU_RBAR_BASE_Msk) | \ + ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \ + ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \ + ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk)) + +/** \brief Region Limit Address Register value +* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. +* \param IDX The attribute index to be associated with this memory region. +*/ +#define ARM_MPU_RLAR(LIMIT, IDX) \ + ((LIMIT & MPU_RLAR_LIMIT_Msk) | \ + ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ + (MPU_RLAR_EN_Msk)) + +#if defined(MPU_RLAR_PXN_Pos) + +/** \brief Region Limit Address Register with PXN value +* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. +* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region. +* \param IDX The attribute index to be associated with this memory region. +*/ +#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \ + ((LIMIT & MPU_RLAR_LIMIT_Msk) | \ + ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \ + ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ + (MPU_RLAR_EN_Msk)) + +#endif + +/** +* Struct for a single MPU Region +*/ +typedef struct { + uint32_t RBAR; /*!< Region Base Address Register value */ + uint32_t RLAR; /*!< Region Limit Address Register value */ +} ARM_MPU_Region_t; + +/** Enable the MPU. +* \param MPU_Control Default access permissions for unconfigured regions. +*/ +__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) +{ + MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; +#endif + __DSB(); + __ISB(); +} + +/** Disable the MPU. +*/ +__STATIC_INLINE void ARM_MPU_Disable(void) +{ + __DMB(); +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; +#endif + MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; +} + +#ifdef MPU_NS +/** Enable the Non-secure MPU. +* \param MPU_Control Default access permissions for unconfigured regions. +*/ +__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control) +{ + MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; +#endif + __DSB(); + __ISB(); +} + +/** Disable the Non-secure MPU. +*/ +__STATIC_INLINE void ARM_MPU_Disable_NS(void) +{ + __DMB(); +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; +#endif + MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk; +} +#endif + +/** Set the memory attribute encoding to the given MPU. +* \param mpu Pointer to the MPU to be configured. +* \param idx The attribute index to be set [0-7] +* \param attr The attribute value to be set. +*/ +__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr) +{ + const uint8_t reg = idx / 4U; + const uint32_t pos = ((idx % 4U) * 8U); + const uint32_t mask = 0xFFU << pos; + + if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { + return; // invalid index + } + + mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); +} + +/** Set the memory attribute encoding. +* \param idx The attribute index to be set [0-7] +* \param attr The attribute value to be set. +*/ +__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr) +{ + ARM_MPU_SetMemAttrEx(MPU, idx, attr); +} + +#ifdef MPU_NS +/** Set the memory attribute encoding to the Non-secure MPU. +* \param idx The attribute index to be set [0-7] +* \param attr The attribute value to be set. +*/ +__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr) +{ + ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr); +} +#endif + +/** Clear and disable the given MPU region of the given MPU. +* \param mpu Pointer to MPU to be used. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr) +{ + mpu->RNR = rnr; + mpu->RLAR = 0U; +} + +/** Clear and disable the given MPU region. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) +{ + ARM_MPU_ClrRegionEx(MPU, rnr); +} + +#ifdef MPU_NS +/** Clear and disable the given Non-secure MPU region. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) +{ + ARM_MPU_ClrRegionEx(MPU_NS, rnr); +} +#endif + +/** Configure the given MPU region of the given MPU. +* \param mpu Pointer to MPU to be used. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rlar Value for RLAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) +{ + mpu->RNR = rnr; + mpu->RBAR = rbar; + mpu->RLAR = rlar; +} + +/** Configure the given MPU region. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rlar Value for RLAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) +{ + ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); +} + +#ifdef MPU_NS +/** Configure the given Non-secure MPU region. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rlar Value for RLAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) +{ + ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); +} +#endif + +/** Memcopy with strictly ordered memory access, e.g. for register targets. +* \param dst Destination data is copied to. +* \param src Source data is copied from. +* \param len Amount of data words to be copied. +*/ +__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) +{ + uint32_t i; + for (i = 0U; i < len; ++i) + { + dst[i] = src[i]; + } +} + +/** Load the given number of MPU regions from a table to the given MPU. +* \param mpu Pointer to the MPU registers to be used. +* \param rnr First region number to be configured. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +{ + const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; + if (cnt == 1U) { + mpu->RNR = rnr; + ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize); + } else { + uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); + uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; + + mpu->RNR = rnrBase; + while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { + uint32_t c = MPU_TYPE_RALIASES - rnrOffset; + ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize); + table += c; + cnt -= c; + rnrOffset = 0U; + rnrBase += MPU_TYPE_RALIASES; + mpu->RNR = rnrBase; + } + + ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); + } +} + +/** Load the given number of MPU regions from a table. +* \param rnr First region number to be configured. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +{ + ARM_MPU_LoadEx(MPU, rnr, table, cnt); +} + +#ifdef MPU_NS +/** Load the given number of MPU regions from a table to the Non-secure MPU. +* \param rnr First region number to be configured. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +{ + ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); +} +#endif + +#endif + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/tz_context.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/tz_context.h new file mode 100644 index 0000000..0d09749 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/Include/tz_context.h @@ -0,0 +1,70 @@ +/****************************************************************************** + * @file tz_context.h + * @brief Context Management for Armv8-M TrustZone + * @version V1.0.1 + * @date 10. January 2018 + ******************************************************************************/ +/* + * Copyright (c) 2017-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef TZ_CONTEXT_H +#define TZ_CONTEXT_H + +#include + +#ifndef TZ_MODULEID_T +#define TZ_MODULEID_T +/// \details Data type that identifies secure software modules called by a process. +typedef uint32_t TZ_ModuleId_t; +#endif + +/// \details TZ Memory ID identifies an allocated memory slot. +typedef uint32_t TZ_MemoryId_t; + +/// Initialize secure context memory system +/// \return execution status (1: success, 0: error) +uint32_t TZ_InitContextSystem_S (void); + +/// Allocate context memory for calling secure software modules in TrustZone +/// \param[in] module identifies software modules called from non-secure mode +/// \return value != 0 id TrustZone memory slot identifier +/// \return value 0 no memory available or internal error +TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); + +/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S +/// \param[in] id TrustZone memory slot identifier +/// \return execution status (1: success, 0: error) +uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); + +/// Load secure context (called on RTOS thread context switch) +/// \param[in] id TrustZone memory slot identifier +/// \return execution status (1: success, 0: error) +uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); + +/// Store secure context (called on RTOS thread context switch) +/// \param[in] id TrustZone memory slot identifier +/// \return execution status (1: success, 0: error) +uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); + +#endif // TZ_CONTEXT_H diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/LICENSE.txt b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/LICENSE.txt new file mode 100644 index 0000000..8dada3e --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/CMSIS/LICENSE.txt @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. Definitions. + + "License" shall mean the terms and conditions for use, reproduction, + and distribution as defined by Sections 1 through 9 of this document. + + "Licensor" shall mean the copyright owner or entity authorized by + the copyright owner that is granting the License. + + "Legal Entity" shall mean the union of the acting entity and all + other entities that control, are controlled by, or are under common + control with that entity. For the purposes of this definition, + "control" means (i) the power, direct or indirect, to cause the + direction or management of such entity, whether by contract or + otherwise, or (ii) ownership of fifty percent (50%) or more of the + outstanding shares, or (iii) beneficial ownership of such entity. + + "You" (or "Your") shall mean an individual or Legal Entity + exercising permissions granted by this License. + + "Source" form shall mean the preferred form for making modifications, + including but not limited to software source code, documentation + source, and configuration files. + + "Object" form shall mean any form resulting from mechanical + transformation or translation of a Source form, including but + not limited to compiled object code, generated documentation, + and conversions to other media types. + + "Work" shall mean the work of authorship, whether in Source or + Object form, made available under the License, as indicated by a + copyright notice that is included in or attached to the work + (an example is provided in the Appendix below). + + "Derivative Works" shall mean any work, whether in Source or Object + form, that is based on (or derived from) the Work and for which the + editorial revisions, annotations, elaborations, or other modifications + represent, as a whole, an original work of authorship. For the purposes + of this License, Derivative Works shall not include works that remain + separable from, or merely link (or bind by name) to the interfaces of, + the Work and Derivative Works thereof. + + "Contribution" shall mean any work of authorship, including + the original version of the Work and any modifications or additions + to that Work or Derivative Works thereof, that is intentionally + submitted to Licensor for inclusion in the Work by the copyright owner + or by an individual or Legal Entity authorized to submit on behalf of + the copyright owner. For the purposes of this definition, "submitted" + means any form of electronic, verbal, or written communication sent + to the Licensor or its representatives, including but not limited to + communication on electronic mailing lists, source code control systems, + and issue tracking systems that are managed by, or on behalf of, the + Licensor for the purpose of discussing and improving the Work, but + excluding communication that is conspicuously marked or otherwise + designated in writing by the copyright owner as "Not a Contribution." + + "Contributor" shall mean Licensor and any individual or Legal Entity + on behalf of whom a Contribution has been received by Licensor and + subsequently incorporated within the Work. + + 2. Grant of Copyright License. Subject to the terms and conditions of + this License, each Contributor hereby grants to You a perpetual, + worldwide, non-exclusive, no-charge, royalty-free, irrevocable + copyright license to reproduce, prepare Derivative Works of, + publicly display, publicly perform, sublicense, and distribute the + Work and such Derivative Works in Source or Object form. + + 3. Grant of Patent License. Subject to the terms and conditions of + this License, each Contributor hereby grants to You a perpetual, + worldwide, non-exclusive, no-charge, royalty-free, irrevocable + (except as stated in this section) patent license to make, have made, + use, offer to sell, sell, import, and otherwise transfer the Work, + where such license applies only to those patent claims licensable + by such Contributor that are necessarily infringed by their + Contribution(s) alone or by combination of their Contribution(s) + with the Work to which such Contribution(s) was submitted. If You + institute patent litigation against any entity (including a + cross-claim or counterclaim in a lawsuit) alleging that the Work + or a Contribution incorporated within the Work constitutes direct + or contributory patent infringement, then any patent licenses + granted to You under this License for that Work shall terminate + as of the date such litigation is filed. + + 4. Redistribution. You may reproduce and distribute copies of the + Work or Derivative Works thereof in any medium, with or without + modifications, and in Source or Object form, provided that You + meet the following conditions: + + (a) You must give any other recipients of the Work or + Derivative Works a copy of this License; and + + (b) You must cause any modified files to carry prominent notices + stating that You changed the files; and + + (c) You must retain, in the Source form of any Derivative Works + that You distribute, all copyright, patent, trademark, and + attribution notices from the Source form of the Work, + excluding those notices that do not pertain to any part of + the Derivative Works; and + + (d) If the Work includes a "NOTICE" text file as part of its + distribution, then any Derivative Works that You distribute must + include a readable copy of the attribution notices contained + within such NOTICE file, excluding those notices that do not + pertain to any part of the Derivative Works, in at least one + of the following places: within a NOTICE text file distributed + as part of the Derivative Works; within the Source form or + documentation, if provided along with the Derivative Works; or, + within a display generated by the Derivative Works, if and + wherever such third-party notices normally appear. The contents + of the NOTICE file are for informational purposes only and + do not modify the License. You may add Your own attribution + notices within Derivative Works that You distribute, alongside + or as an addendum to the NOTICE text from the Work, provided + that such additional attribution notices cannot be construed + as modifying the License. + + You may add Your own copyright statement to Your modifications and + may provide additional or different license terms and conditions + for use, reproduction, or distribution of Your modifications, or + for any such Derivative Works as a whole, provided Your use, + reproduction, and distribution of the Work otherwise complies with + the conditions stated in this License. + + 5. Submission of Contributions. Unless You explicitly state otherwise, + any Contribution intentionally submitted for inclusion in the Work + by You to the Licensor shall be under the terms and conditions of + this License, without any additional terms or conditions. + Notwithstanding the above, nothing herein shall supersede or modify + the terms of any separate license agreement you may have executed + with Licensor regarding such Contributions. + + 6. Trademarks. This License does not grant permission to use the trade + names, trademarks, service marks, or product names of the Licensor, + except as required for reasonable and customary use in describing the + origin of the Work and reproducing the content of the NOTICE file. + + 7. Disclaimer of Warranty. Unless required by applicable law or + agreed to in writing, Licensor provides the Work (and each + Contributor provides its Contributions) on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied, including, without limitation, any warranties or conditions + of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A + PARTICULAR PURPOSE. You are solely responsible for determining the + appropriateness of using or redistributing the Work and assume any + risks associated with Your exercise of permissions under this License. + + 8. Limitation of Liability. In no event and under no legal theory, + whether in tort (including negligence), contract, or otherwise, + unless required by applicable law (such as deliberate and grossly + negligent acts) or agreed to in writing, shall any Contributor be + liable to You for damages, including any direct, indirect, special, + incidental, or consequential damages of any character arising as a + result of this License or out of the use or inability to use the + Work (including but not limited to damages for loss of goodwill, + work stoppage, computer failure or malfunction, or any and all + other commercial damages or losses), even if such Contributor + has been advised of the possibility of such damages. + + 9. Accepting Warranty or Additional Liability. While redistributing + the Work or Derivative Works thereof, You may choose to offer, + and charge a fee for, acceptance of support, warranty, indemnity, + or other liability obligations and/or rights consistent with this + License. However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. + + END OF TERMS AND CONDITIONS + + APPENDIX: How to apply the Apache License to your work. + + To apply the Apache License to your work, attach the following + boilerplate notice, with the fields enclosed by brackets "{}" + replaced with your own identifying information. (Don't include + the brackets!) The text should be enclosed in the appropriate + comment syntax for the file format. We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright {yyyy} {name of copyright owner} + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h new file mode 100644 index 0000000..a336346 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h @@ -0,0 +1,1680 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_bus.h + * @author MCD Application Team + * @brief Header file of BUS LL module. + + @verbatim + ##### RCC Limitations ##### + ============================================================================== + [..] + A delay between an RCC peripheral clock enable and the effective peripheral + enabling should be taken into account in order to manage the peripheral read/write + from/to registers. + (+) This delay depends on the peripheral mapping. + (++) AHB & APB peripherals, 1 dummy read is necessary + + [..] + Workarounds: + (#) For AHB & APB peripherals, a dummy read to the peripheral register has been + inserted in each LL_{BUS}_GRP{x}_EnableClock() function. + + @endverbatim + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_LL_BUS_H +#define STM32G4xx_LL_BUS_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined(RCC) + +/** @defgroup BUS_LL BUS + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/* Private constants ---------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/** @defgroup BUS_LL_Exported_Constants BUS Exported Constants + * @{ + */ + +/** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH + * @{ + */ +#define LL_AHB1_GRP1_PERIPH_ALL 0xFFFFFFFFU +#define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHB1ENR_DMA1EN +#define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN +#define LL_AHB1_GRP1_PERIPH_DMAMUX1 RCC_AHB1ENR_DMAMUX1EN +#define LL_AHB1_GRP1_PERIPH_CORDIC RCC_AHB1ENR_CORDICEN +#define LL_AHB1_GRP1_PERIPH_FMAC RCC_AHB1ENR_FMACEN +#define LL_AHB1_GRP1_PERIPH_FLASH RCC_AHB1ENR_FLASHEN +#define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1SMENR_SRAM1SMEN +#define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN +/** + * @} + */ + +/** @defgroup BUS_LL_EC_AHB2_GRP1_PERIPH AHB2 GRP1 PERIPH + * @{ + */ +#define LL_AHB2_GRP1_PERIPH_ALL 0xFFFFFFFFU +#define LL_AHB2_GRP1_PERIPH_GPIOA RCC_AHB2ENR_GPIOAEN +#define LL_AHB2_GRP1_PERIPH_GPIOB RCC_AHB2ENR_GPIOBEN +#define LL_AHB2_GRP1_PERIPH_GPIOC RCC_AHB2ENR_GPIOCEN +#define LL_AHB2_GRP1_PERIPH_GPIOD RCC_AHB2ENR_GPIODEN +#define LL_AHB2_GRP1_PERIPH_GPIOE RCC_AHB2ENR_GPIOEEN +#define LL_AHB2_GRP1_PERIPH_GPIOF RCC_AHB2ENR_GPIOFEN +#define LL_AHB2_GRP1_PERIPH_GPIOG RCC_AHB2ENR_GPIOGEN +#define LL_AHB2_GRP1_PERIPH_CCM RCC_AHB2SMENR_CCMSMEN +#define LL_AHB2_GRP1_PERIPH_SRAM2 RCC_AHB2SMENR_SRAM2SMEN +#define LL_AHB2_GRP1_PERIPH_ADC12 RCC_AHB2ENR_ADC12EN +#if defined(ADC345_COMMON) +#define LL_AHB2_GRP1_PERIPH_ADC345 RCC_AHB2ENR_ADC345EN +#endif /* ADC345_COMMON */ +#define LL_AHB2_GRP1_PERIPH_DAC1 RCC_AHB2ENR_DAC1EN +#if defined(DAC2) +#define LL_AHB2_GRP1_PERIPH_DAC2 RCC_AHB2ENR_DAC2EN +#endif /* DAC2 */ +#define LL_AHB2_GRP1_PERIPH_DAC3 RCC_AHB2ENR_DAC3EN +#if defined(DAC4) +#define LL_AHB2_GRP1_PERIPH_DAC4 RCC_AHB2ENR_DAC4EN +#endif /* DAC4 */ +#if defined(AES) +#define LL_AHB2_GRP1_PERIPH_AES RCC_AHB2ENR_AESEN +#endif /* AES */ +#define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN +/** + * @} + */ + +/** @defgroup BUS_LL_EC_AHB3_GRP1_PERIPH AHB3 GRP1 PERIPH + * @{ + */ +#define LL_AHB3_GRP1_PERIPH_ALL 0xFFFFFFFFU +#if defined(FMC_Bank1_R) +#define LL_AHB3_GRP1_PERIPH_FMC RCC_AHB3ENR_FMCEN +#endif /* FMC_Bank1_R */ +#if defined(QUADSPI) +#define LL_AHB3_GRP1_PERIPH_QSPI RCC_AHB3ENR_QSPIEN +#endif /* QUADSPI */ +/** + * @} + */ + +/** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH + * @{ + */ +#define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU +#define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN +#define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR1_TIM3EN +#define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR1_TIM4EN +#if defined(TIM5) +#define LL_APB1_GRP1_PERIPH_TIM5 RCC_APB1ENR1_TIM5EN +#endif /* TIM5 */ +#define LL_APB1_GRP1_PERIPH_TIM6 RCC_APB1ENR1_TIM6EN +#define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR1_TIM7EN +#define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR1_CRSEN +#define LL_APB1_GRP1_PERIPH_RTCAPB RCC_APB1ENR1_RTCAPBEN +#define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN +#define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR1_SPI2EN +#define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR1_SPI3EN +#define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR1_USART2EN +#define LL_APB1_GRP1_PERIPH_USART3 RCC_APB1ENR1_USART3EN +#if defined(UART4) +#define LL_APB1_GRP1_PERIPH_UART4 RCC_APB1ENR1_UART4EN +#endif /* UART4 */ +#if defined(UART5) +#define LL_APB1_GRP1_PERIPH_UART5 RCC_APB1ENR1_UART5EN +#endif /* UART5 */ +#define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR1_I2C1EN +#define LL_APB1_GRP1_PERIPH_I2C2 RCC_APB1ENR1_I2C2EN +#define LL_APB1_GRP1_PERIPH_USB RCC_APB1ENR1_USBEN +#if defined(FDCAN1) +#define LL_APB1_GRP1_PERIPH_FDCAN RCC_APB1ENR1_FDCANEN +#endif /* FDCAN1 */ +#define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR1_PWREN +#define LL_APB1_GRP1_PERIPH_I2C3 RCC_APB1ENR1_I2C3EN +#define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR1_LPTIM1EN +/** + * @} + */ + + +/** @defgroup BUS_LL_EC_APB1_GRP2_PERIPH APB1 GRP2 PERIPH + * @{ + */ +#define LL_APB1_GRP2_PERIPH_ALL 0xFFFFFFFFU +#define LL_APB1_GRP2_PERIPH_LPUART1 RCC_APB1ENR2_LPUART1EN +#if defined(I2C4) +#define LL_APB1_GRP2_PERIPH_I2C4 RCC_APB1ENR2_I2C4EN +#endif /* I2C4 */ +#define LL_APB1_GRP2_PERIPH_UCPD1 RCC_APB1ENR2_UCPD1EN +/** + * @} + */ + +/** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH + * @{ + */ +#define LL_APB2_GRP1_PERIPH_ALL 0xFFFFFFFFU +#define LL_APB2_GRP1_PERIPH_SYSCFG RCC_APB2ENR_SYSCFGEN +#define LL_APB2_GRP1_PERIPH_TIM1 RCC_APB2ENR_TIM1EN +#define LL_APB2_GRP1_PERIPH_SPI1 RCC_APB2ENR_SPI1EN +#define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN +#define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN +#if defined(SPI4) +#define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN +#endif /* SPI4 */ +#define LL_APB2_GRP1_PERIPH_TIM15 RCC_APB2ENR_TIM15EN +#define LL_APB2_GRP1_PERIPH_TIM16 RCC_APB2ENR_TIM16EN +#define LL_APB2_GRP1_PERIPH_TIM17 RCC_APB2ENR_TIM17EN +#if defined(TIM20) +#define LL_APB2_GRP1_PERIPH_TIM20 RCC_APB2ENR_TIM20EN +#endif /* TIM20 */ +#define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN +#if defined(HRTIM1) +#define LL_APB2_GRP1_PERIPH_HRTIM1 RCC_APB2ENR_HRTIM1EN +#endif /* HRTIM1 */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ +/** @defgroup BUS_LL_Exported_Functions BUS Exported Functions + * @{ + */ + +/** @defgroup BUS_LL_EF_AHB1 AHB1 + * @{ + */ + +/** + * @brief Enable AHB1 peripherals clock. + * @rmtoll AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n + * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n + * AHB1ENR DMAMMUXEN LL_AHB1_GRP1_EnableClock\n + * AHB1ENR CORDICEN LL_AHB1_GRP1_EnableClock\n + * AHB1ENR FMACEN LL_AHB1_GRP1_EnableClock\n + * AHB1ENR FLASHEN LL_AHB1_GRP1_EnableClock\n + * AHB1ENR CRCEN LL_AHB1_GRP1_EnableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMAMUX1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CORDIC + * @arg @ref LL_AHB1_GRP1_PERIPH_FMAC + * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH + * @arg @ref LL_AHB1_GRP1_PERIPH_CRC + * @retval None + */ +__STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->AHB1ENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Check if AHB1 peripheral clock is enabled or not + * @rmtoll AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock\n + * AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock\n + * AHB1ENR DMAMUXEN LL_AHB1_GRP1_IsEnabledClock\n + * AHB1ENR CORDICEN LL_AHB1_GRP1_IsEnabledClock\n + * AHB1ENR FMACEN LL_AHB1_GRP1_IsEnabledClock\n + * AHB1ENR FLASHEN LL_AHB1_GRP1_IsEnabledClock\n + * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMAMUX1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CORDIC + * @arg @ref LL_AHB1_GRP1_PERIPH_FMAC + * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH + * @arg @ref LL_AHB1_GRP1_PERIPH_CRC + * @retval State of Periphs (1 or 0). + */ +__STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) +{ + return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); +} + +/** + * @brief Disable AHB1 peripherals clock. + * @rmtoll AHB1ENR DMA1EN LL_AHB1_GRP1_DisableClock\n + * AHB1ENR DMA2EN LL_AHB1_GRP1_DisableClock\n + * AHB1ENR DMAMUXEN LL_AHB1_GRP1_DisableClock\n + * AHB1ENR CORDICEN LL_AHB1_GRP1_DisableClock\n + * AHB1ENR FMACEN LL_AHB1_GRP1_DisableClock\n + * AHB1ENR FLASHEN LL_AHB1_GRP1_DisableClock\n + * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMAMUX1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CORDIC + * @arg @ref LL_AHB1_GRP1_PERIPH_FMAC + * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH + * @arg @ref LL_AHB1_GRP1_PERIPH_CRC + * @retval None + */ +__STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB1ENR, Periphs); +} + +/** + * @brief Force AHB1 peripherals reset. + * @rmtoll AHB1RSTR DMA1RST LL_AHB1_GRP1_ForceReset\n + * AHB1RSTR DMA2RST LL_AHB1_GRP1_ForceReset\n + * AHB1RSTR DMAMUXRST LL_AHB1_GRP1_ForceReset\n + * AHB1RSTR CORDICRST LL_AHB1_GRP1_ForceReset\n + * AHB1RSTR FMACRST LL_AHB1_GRP1_ForceReset\n + * AHB1RSTR FLASHRST LL_AHB1_GRP1_ForceReset\n + * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB1_GRP1_PERIPH_ALL + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMAMUX1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CORDIC + * @arg @ref LL_AHB1_GRP1_PERIPH_FMAC + * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH + * @arg @ref LL_AHB1_GRP1_PERIPH_CRC + * @retval None + */ +__STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) +{ + SET_BIT(RCC->AHB1RSTR, Periphs); +} + +/** + * @brief Release AHB1 peripherals reset. + * @rmtoll AHB1RSTR DMA1RST LL_AHB1_GRP1_ReleaseReset\n + * AHB1RSTR DMA2RST LL_AHB1_GRP1_ReleaseReset\n + * AHB1RSTR DMAMUXRST LL_AHB1_GRP1_ReleaseReset\n + * AHB1RSTR CORDICRST LL_AHB1_GRP1_ReleaseReset\n + * AHB1RSTR FMACRST LL_AHB1_GRP1_ReleaseReset\n + * AHB1RSTR FLASHRST LL_AHB1_GRP1_ReleaseReset\n + * AHB1RSTR CRCRST LL_AHB1_GRP1_ReleaseReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB1_GRP1_PERIPH_ALL + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMAMUX1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CORDIC + * @arg @ref LL_AHB1_GRP1_PERIPH_FMAC + * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH + * @arg @ref LL_AHB1_GRP1_PERIPH_CRC + * @retval None + */ +__STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB1RSTR, Periphs); +} + +/** + * @brief Enable AHB1 peripheral clocks in Sleep and Stop modes + * @rmtoll AHB1SMENR DMA1SMEN LL_AHB1_GRP1_EnableClockStopSleep\n + * AHB1SMENR DMA2SMEN LL_AHB1_GRP1_EnableClockStopSleep\n + * AHB1SMENR DMAMUXSMEN LL_AHB1_GRP1_EnableClockStopSleep\n + * AHB1SMENR CORDICSMEN LL_AHB1_GRP1_EnableClockStopSleep\n + * AHB1SMENR FMACSMEN LL_AHB1_GRP1_EnableClockStopSleep\n + * AHB1SMENR FLASHSMEN LL_AHB1_GRP1_EnableClockStopSleep\n + * AHB1SMENR SRAM1SMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR CRCSMEN LL_AHB1_GRP1_EnableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMAMUX1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CORDIC + * @arg @ref LL_AHB1_GRP1_PERIPH_FMAC + * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH + * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CRC + * @retval None + */ +__STATIC_INLINE void LL_AHB1_GRP1_EnableClockStopSleep(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->AHB1SMENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHB1SMENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Disable AHB1 peripheral clocks in Sleep and Stop modes + * @rmtoll AHB1SMENR DMA1SMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR DMA2SMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR DMAMUXSMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR CORDICSMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR FMACSMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR FLASHSMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR SRAM1SMEN LL_AHB1_GRP1_DisableClockStopSleep\n + * AHB1SMENR CRCSMEN LL_AHB1_GRP1_DisableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 + * @arg @ref LL_AHB1_GRP1_PERIPH_DMAMUX1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CORDIC + * @arg @ref LL_AHB1_GRP1_PERIPH_FMAC + * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH + * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1 + * @arg @ref LL_AHB1_GRP1_PERIPH_CRC + * @retval None + */ +__STATIC_INLINE void LL_AHB1_GRP1_DisableClockStopSleep(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB1SMENR, Periphs); +} + +/** + * @} + */ + +/** @defgroup BUS_LL_EF_AHB2 AHB2 + * @{ + */ + +/** + * @brief Enable AHB2 peripherals clock. + * @rmtoll AHB2ENR GPIOAEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR GPIOBEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR GPIOCEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR GPIODEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR GPIOEEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR GPIOFEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR GPIOGEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR ADC12EN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR ADC345EN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR DAC1EN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR DAC2EN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR DAC3EN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR DAC4EN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR AESEN LL_AHB2_GRP1_EnableClock\n + * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOA + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOB + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOC + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOD + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOE + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOF + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOG + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC12 + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC345 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC1 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC2 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC3 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC4 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_RNG + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->AHB2ENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Check if AHB2 peripheral clock is enabled or not + * @rmtoll AHB2ENR GPIOAEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR GPIOBEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR GPIOCEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR GPIODEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR GPIOEEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR GPIOFEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR GPIOGEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR ADC12EN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR ADC345EN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR DAC1EN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR DAC2EN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR DAC3EN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR DAC4EN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock\n + * AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOA + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOB + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOC + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOD + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOE + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOF + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOG + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC12 + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC345 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC1 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC2 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC3 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC4 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_RNG + * + * (*) value not defined in all devices. + * @retval State of Periphs (1 or 0). + */ +__STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) +{ + return ((READ_BIT(RCC->AHB2ENR, Periphs) == Periphs) ? 1UL : 0UL); +} + +/** + * @brief Disable AHB2 peripherals clock. + * @rmtoll AHB2ENR GPIOAEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR GPIOBEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR GPIOCEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR GPIODEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR GPIOEEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR GPIOFEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR GPIOGEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR ADC12EN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR ADC345EN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR DAC1EN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR DAC2EN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR DAC3EN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR DAC4EN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR AESEN LL_AHB2_GRP1_DisableClock\n + * AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOA + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOB + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOC + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOD + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOE + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOF + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOG + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC12 + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC345 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC1 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC2 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC3 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC4 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_RNG + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB2ENR, Periphs); +} + +/** + * @brief Force AHB2 peripherals reset. + * @rmtoll AHB2RSTR GPIOARST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR GPIOBRST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR GPIOCRST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR GPIODRST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR GPIOERST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR GPIOFRST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR GPIOGRST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR ADC12RST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR ADC345RST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR DAC1RST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR DAC2RST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR DAC3RST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR DAC4RST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR AESRST LL_AHB2_GRP1_ForceReset\n + * AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOA + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOB + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOC + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOD + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOE + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOF + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOG + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC12 + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC345 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC1 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC2 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC3 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC4 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_RNG + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) +{ + SET_BIT(RCC->AHB2RSTR, Periphs); +} + +/** + * @brief Release AHB2 peripherals reset. + * @rmtoll AHB2RSTR GPIOARST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR GPIOBRST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR GPIOCRST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR GPIODRST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR GPIOERST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR GPIOFRST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR GPIOGRST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR ADC12RST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR ADC345RST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR DAC1RST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR DAC2RST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR DAC3RST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR DAC4RST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n + * AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOA + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOB + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOC + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOD + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOE + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOF + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOG + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC12 + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC345 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC1 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC2 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC3 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC4 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_RNG + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB2RSTR, Periphs); +} + +/** + * @brief Enable AHB2 peripheral clocks in Sleep and Stop modes + * @rmtoll AHB2SMENR GPIOASMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR GPIOBSMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR GPIOCSMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR GPIODSMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR GPIOESMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR GPIOFSMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR GPIOGSMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR SRAM2SMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR CCMSMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR ADC12SMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR ADC345SMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR DAC1SMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR DAC2SMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR DAC3SMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR DAC4SMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR AESSMEN LL_AHB2_GRP1_EnableClockStopSleep\n + * AHB2SMENR RNGSMEN LL_AHB2_GRP1_EnableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOA + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOB + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOC + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOD + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOE + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOF + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOG + * @arg @ref LL_AHB2_GRP1_PERIPH_SRAM2 + * @arg @ref LL_AHB2_GRP1_PERIPH_CCM + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC12 + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC345 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC1 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC2 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC3 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC4 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_RNG + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB2_GRP1_EnableClockStopSleep(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->AHB2SMENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHB2SMENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Disable AHB2 peripheral clocks in Sleep and Stop modes + * @rmtoll AHB2SMENR GPIOASMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR GPIOBSMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR GPIOCSMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR GPIODSMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR GPIOESMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR GPIOFSMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR GPIOGSMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR SRAM2SMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR CCMSMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR ADC12SMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR ADC345SMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR DAC1SMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR DAC2SMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR DAC3SMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR DAC4SMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR AESSMEN LL_AHB2_GRP1_DisableClockStopSleep\n + * AHB2SMENR RNGSMEN LL_AHB2_GRP1_DisableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOA + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOB + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOC + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOD + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOE + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOF + * @arg @ref LL_AHB2_GRP1_PERIPH_GPIOG + * @arg @ref LL_AHB2_GRP1_PERIPH_SRAM2 + * @arg @ref LL_AHB2_GRP1_PERIPH_CCM + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC12 + * @arg @ref LL_AHB2_GRP1_PERIPH_ADC345 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC1 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC2 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC3 + * @arg @ref LL_AHB2_GRP1_PERIPH_DAC4 (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + * @arg @ref LL_AHB2_GRP1_PERIPH_RNG + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB2_GRP1_DisableClockStopSleep(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB2SMENR, Periphs); +} + +/** + * @} + */ + +/** @defgroup BUS_LL_EF_AHB3 AHB3 + * @{ + */ + +/** + * @brief Enable AHB3 peripherals clock. + * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock\n + * AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) + * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->AHB3ENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Check if AHB3 peripheral clock is enabled or not + * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock\n + * AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) + * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) + * + * (*) value not defined in all devices. + * @retval State of Periphs (1 or 0). + */ +__STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) +{ + return ((READ_BIT(RCC->AHB3ENR, Periphs) == Periphs) ? 1UL : 0UL); +} + +/** + * @brief Disable AHB3 peripherals clock. + * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n + * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) + * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB3ENR, Periphs); +} + +/** + * @brief Force AHB3 peripherals reset. + * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset\n + * AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB3_GRP1_PERIPH_ALL + * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) + * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) +{ + SET_BIT(RCC->AHB3RSTR, Periphs); +} + +/** + * @brief Release AHB3 peripherals reset. + * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset\n + * AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB3_GRP1_PERIPH_ALL + * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) + * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB3RSTR, Periphs); +} + +/** + * @brief Enable AHB3 peripheral clocks in Sleep and Stop modes + * @rmtoll AHB3SMENR FMCSMEN LL_AHB3_GRP1_EnableClockStopSleep\n + * AHB3SMENR QSPISMEN LL_AHB3_GRP1_EnableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) + * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB3_GRP1_EnableClockStopSleep(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->AHB3SMENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Disable AHB3 peripheral clocks in Sleep and Stop modes + * @rmtoll AHB3SMENR FMCSMEN LL_AHB3_GRP1_DisableClockStopSleep\n + * AHB3SMENR QSPISMEN LL_AHB3_GRP1_DisableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) + * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_AHB3_GRP1_DisableClockStopSleep(uint32_t Periphs) +{ + CLEAR_BIT(RCC->AHB3SMENR, Periphs); +} + +/** + * @} + */ + +/** @defgroup BUS_LL_EF_APB1 APB1 + * @{ + */ + +/** + * @brief Enable APB1 peripherals clock. + * @rmtoll APB1ENR1 TIM2EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 TIM3EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 TIM4EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 TIM5EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 TIM6EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 TIM7EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 CRSEN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 RTCAPBEN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 WWDGEN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 SPI2EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 SPI3EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 USART2EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 USART3EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 UART4EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 UART5EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 I2C1EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 I2C2EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 USBEN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 FDCANEN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 PWREN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 I2C3EN LL_APB1_GRP1_EnableClock\n + * APB1ENR1 LPTIM1EN LL_APB1_GRP1_EnableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 + * @arg @ref LL_APB1_GRP1_PERIPH_CRS + * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB + * @arg @ref LL_APB1_GRP1_PERIPH_WWDG + * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 + * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + * @arg @ref LL_APB1_GRP1_PERIPH_USART3 + * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 + * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + * @arg @ref LL_APB1_GRP1_PERIPH_USB + * @arg @ref LL_APB1_GRP1_PERIPH_FDCAN (*) + * @arg @ref LL_APB1_GRP1_PERIPH_PWR + * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->APB1ENR1, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); + (void)tmpreg; +} + +/** + * @brief Enable APB1 peripherals clock. + * @rmtoll APB1ENR2 LPUART1EN LL_APB1_GRP2_EnableClock\n + * APB1ENR2 I2C4EN LL_APB1_GRP2_EnableClock\n + * APB1ENR2 UCPD1EN LL_APB1_GRP2_EnableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP2_PERIPH_LPUART1 + * @arg @ref LL_APB1_GRP2_PERIPH_I2C4 (*) + * @arg @ref LL_APB1_GRP2_PERIPH_UCPD1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP2_EnableClock(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->APB1ENR2, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); + (void)tmpreg; +} + +/** + * @brief Check if APB1 peripheral clock is enabled or not + * @rmtoll APB1ENR1 TIM2EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 TIM3EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 TIM4EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 TIM5EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 TIM6EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 TIM7EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 CRSEN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 RTCAPBEN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 WWDGEN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 SPI2EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 SPI3EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 USART2EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 USART3EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 UART4EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 UART5EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 I2C1EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 I2C2EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 USBEN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 FDCANEN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 PWREN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 I2C3EN LL_APB1_GRP1_IsEnabledClock\n + * APB1ENR1 LPTIM1EN LL_APB1_GRP1_IsEnabledClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 + * @arg @ref LL_APB1_GRP1_PERIPH_CRS + * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB + * @arg @ref LL_APB1_GRP1_PERIPH_WWDG + * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 + * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + * @arg @ref LL_APB1_GRP1_PERIPH_USART3 + * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 + * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + * @arg @ref LL_APB1_GRP1_PERIPH_USB + * @arg @ref LL_APB1_GRP1_PERIPH_FDCAN (*) + * @arg @ref LL_APB1_GRP1_PERIPH_PWR + * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + * + * (*) value not defined in all devices. + * @retval State of Periphs (1 or 0). + */ +__STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) +{ + return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); +} + +/** + * @brief Check if APB1 peripheral clock is enabled or not + * @rmtoll APB1ENR2 LPUART1EN LL_APB1_GRP2_IsEnabledClock\n + * APB1ENR2 I2C4EN LL_APB1_GRP2_IsEnabledClock\n + * APB1ENR2 UCPD1EN LL_APB1_GRP2_IsEnabledClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP2_PERIPH_LPUART1 + * @arg @ref LL_APB1_GRP2_PERIPH_I2C4 (*) + * @arg @ref LL_APB1_GRP2_PERIPH_UCPD1 + * + * (*) value not defined in all devices. + * @retval State of Periphs (1 or 0). + */ +__STATIC_INLINE uint32_t LL_APB1_GRP2_IsEnabledClock(uint32_t Periphs) +{ + return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL); +} + +/** + * @brief Disable APB1 peripherals clock. + * @rmtoll APB1ENR1 TIM2EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 TIM3EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 TIM4EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 TIM5EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 TIM6EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 TIM7EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 CRSEN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 RTCAPBEN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 WWDGEN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 SPI2EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 SPI3EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 USART2EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 USART3EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 UART4EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 UART5EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 I2C1EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 I2C2EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 USBEN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 FDCANEN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 PWREN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 I2C3EN LL_APB1_GRP1_DisableClock\n + * APB1ENR1 LPTIM1EN LL_APB1_GRP1_DisableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 + * @arg @ref LL_APB1_GRP1_PERIPH_CRS + * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB + * @arg @ref LL_APB1_GRP1_PERIPH_WWDG + * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 + * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + * @arg @ref LL_APB1_GRP1_PERIPH_USART3 + * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 + * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + * @arg @ref LL_APB1_GRP1_PERIPH_USB + * @arg @ref LL_APB1_GRP1_PERIPH_FDCAN (*) + * @arg @ref LL_APB1_GRP1_PERIPH_PWR + * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB1ENR1, Periphs); +} + +/** + * @brief Disable APB1 peripherals clock. + * @rmtoll APB1ENR2 LPUART1EN LL_APB1_GRP2_DisableClock\n + * APB1ENR2 I2C4EN LL_APB1_GRP2_DisableClock\n + * APB1ENR2 UCPD1EN LL_APB1_GRP2_DisableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP2_PERIPH_LPUART1 + * @arg @ref LL_APB1_GRP2_PERIPH_I2C4 (*) + * @arg @ref LL_APB1_GRP2_PERIPH_UCPD1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP2_DisableClock(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB1ENR2, Periphs); +} + +/** + * @brief Force APB1 peripherals reset. + * @rmtoll APB1RSTR1 TIM2RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 TIM3RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 TIM4RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 TIM5RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 TIM6RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 TIM7RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 CRSRST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 SPI2RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 SPI3RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 USART2RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 USART3RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 UART4RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 UART5RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 I2C1RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 I2C2RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 USBRST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 FDCANRST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 PWRRST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 I2C3RST LL_APB1_GRP1_ForceReset\n + * APB1RSTR1 LPTIM1RST LL_APB1_GRP1_ForceReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 + * @arg @ref LL_APB1_GRP1_PERIPH_CRS + * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 + * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + * @arg @ref LL_APB1_GRP1_PERIPH_USART3 + * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 + * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + * @arg @ref LL_APB1_GRP1_PERIPH_USB + * @arg @ref LL_APB1_GRP1_PERIPH_FDCAN (*) + * @arg @ref LL_APB1_GRP1_PERIPH_PWR + * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) +{ + SET_BIT(RCC->APB1RSTR1, Periphs); +} + +/** + * @brief Force APB1 peripherals reset. + * @rmtoll APB1RSTR2 LPUART1RST LL_APB1_GRP2_ForceReset\n + * APB1RSTR2 I2C4RST LL_APB1_GRP2_ForceReset\n + * APB1RSTR2 UCPD1RST LL_APB1_GRP2_ForceReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP2_PERIPH_LPUART1 + * @arg @ref LL_APB1_GRP2_PERIPH_I2C4 (*) + * @arg @ref LL_APB1_GRP2_PERIPH_UCPD1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP2_ForceReset(uint32_t Periphs) +{ + SET_BIT(RCC->APB1RSTR2, Periphs); +} + +/** + * @brief Release APB1 peripherals reset. + * @rmtoll APB1RSTR1 TIM2RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 TIM3RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 TIM4RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 TIM5RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 TIM6RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 TIM7RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 CRSRST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 SPI2RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 SPI3RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 USART2RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 USART3RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 UART4RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 UART5RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 I2C1RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 I2C2RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 USBRST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 FDCANRST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 PWRRST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 I2C3RST LL_APB1_GRP1_ReleaseReset\n + * APB1RSTR1 LPTIM1RST LL_APB1_GRP1_ReleaseReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 + * @arg @ref LL_APB1_GRP1_PERIPH_CRS + * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 + * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + * @arg @ref LL_APB1_GRP1_PERIPH_USART3 + * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 + * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + * @arg @ref LL_APB1_GRP1_PERIPH_USB + * @arg @ref LL_APB1_GRP1_PERIPH_FDCAN (*) + * @arg @ref LL_APB1_GRP1_PERIPH_PWR + * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB1RSTR1, Periphs); +} + +/** + * @brief Release APB1 peripherals reset. + * @rmtoll APB1RSTR2 LPUART1RST LL_APB1_GRP2_ReleaseReset\n + * APB1RSTR2 I2C4RST LL_APB1_GRP2_ReleaseReset\n + * APB1RSTR2 UCPD1RST LL_APB1_GRP2_ReleaseReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP2_PERIPH_LPUART1 + * @arg @ref LL_APB1_GRP2_PERIPH_I2C4 (*) + * @arg @ref LL_APB1_GRP2_PERIPH_UCPD1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP2_ReleaseReset(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB1RSTR2, Periphs); +} + +/** + * @brief Enable APB1 peripheral clocks in Sleep and Stop modes + * @rmtoll APB1SMENR1 TIM2SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 TIM3SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 TIM4SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 TIM5SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 TIM6SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 TIM7SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 CRSSMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 RTCAPBSMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 WWDGSMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 SPI2SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 SPI3SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 USART2SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 USART3SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 UART4SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 UART5SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 I2C1SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 I2C2SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 USBSMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 FDCANSMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 PWRSMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 I2C3SMEN LL_APB1_GRP1_EnableClockStopSleep\n + * APB1SMENR1 LPTIM1SMEN LL_APB1_GRP1_EnableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 + * @arg @ref LL_APB1_GRP1_PERIPH_CRS + * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB + * @arg @ref LL_APB1_GRP1_PERIPH_WWDG + * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 + * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + * @arg @ref LL_APB1_GRP1_PERIPH_USART3 + * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 + * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + * @arg @ref LL_APB1_GRP1_PERIPH_USB + * @arg @ref LL_APB1_GRP1_PERIPH_FDCAN (*) + * @arg @ref LL_APB1_GRP1_PERIPH_PWR + * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP1_EnableClockStopSleep(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->APB1SMENR1, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB1SMENR1, Periphs); + (void)tmpreg; +} + +/** + * @brief Enable APB1 peripheral clocks in Sleep and Stop modes + * @rmtoll APB1SMENR2 LPUART1SMEN LL_APB1_GRP2_EnableClockStopSleep\n + * APB1SMENR2 I2C4SMEN LL_APB1_GRP2_EnableClockStopSleep\n + * APB1SMENR2 UCPD1SMEN LL_APB1_GRP2_EnableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP2_PERIPH_LPUART1 + * @arg @ref LL_APB1_GRP2_PERIPH_I2C4 (*) + * @arg @ref LL_APB1_GRP2_PERIPH_UCPD1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP2_EnableClockStopSleep(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->APB1SMENR2, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB1SMENR2, Periphs); + (void)tmpreg; +} + +/** + * @brief Disable APB1 peripheral clocks in Sleep and Stop modes + * @rmtoll APB1SMENR1 TIM2SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 TIM3SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 TIM4SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 TIM5SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 TIM6SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 TIM7SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 CRSSMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 RTCAPBSMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 WWDGSMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 SPI2SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 SPI3SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 USART2SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 USART3SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 UART4SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 UART5SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 I2C1SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 I2C2SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 USBSMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 FDCANSMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 PWRSMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 I2C3SMEN LL_APB1_GRP1_DisableClockStopSleep\n + * APB1SMENR1 LPTIM1SMEN LL_APB1_GRP1_DisableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 + * @arg @ref LL_APB1_GRP1_PERIPH_CRS + * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB + * @arg @ref LL_APB1_GRP1_PERIPH_WWDG + * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 + * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + * @arg @ref LL_APB1_GRP1_PERIPH_USART3 + * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) + * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 + * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + * @arg @ref LL_APB1_GRP1_PERIPH_USB + * @arg @ref LL_APB1_GRP1_PERIPH_FDCAN (*) + * @arg @ref LL_APB1_GRP1_PERIPH_PWR + * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP1_DisableClockStopSleep(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB1SMENR1, Periphs); +} + +/** + * @brief Disable APB1 peripheral clocks in Sleep and Stop modes + * @rmtoll APB1SMENR2 LPUART1SMEN LL_APB1_GRP2_DisableClockStopSleep\n + * APB1SMENR2 I2C4SMEN LL_APB1_GRP2_DisableClockStopSleep\n + * APB1SMENR2 UCPD1SMEN LL_APB1_GRP2_DisableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB1_GRP2_PERIPH_LPUART1 + * @arg @ref LL_APB1_GRP2_PERIPH_I2C4 (*) + * @arg @ref LL_APB1_GRP2_PERIPH_UCPD1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB1_GRP2_DisableClockStopSleep(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB1SMENR2, Periphs); +} + +/** + * @} + */ + +/** @defgroup BUS_LL_EF_APB2 APB2 + * @{ + */ + +/** + * @brief Enable APB2 peripherals clock. + * @rmtoll APB2ENR SYSCFGEN LL_APB2_GRP1_EnableClock\n + * APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n + * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n + * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n + * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n + * APB2ENR SPI4EN LL_APB2_GRP1_EnableClock\n + * APB2ENR TIM15EN LL_APB2_GRP1_EnableClock\n + * APB2ENR TIM16EN LL_APB2_GRP1_EnableClock\n + * APB2ENR TIM17EN LL_APB2_GRP1_EnableClock\n + * APB2ENR TIM20EN LL_APB2_GRP1_EnableClock\n + * APB2ENR SAI1EN LL_APB2_GRP1_EnableClock\n + * APB2ENR HRTIM1EN LL_APB2_GRP1_EnableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG + * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + * @arg @ref LL_APB2_GRP1_PERIPH_USART1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM20 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 + * @arg @ref LL_APB2_GRP1_PERIPH_HRTIM1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->APB2ENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB2ENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Check if APB2 peripheral clock is enabled or not + * @rmtoll APB2ENR SYSCFGEN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR TIM1EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR SPI1EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR TIM8EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR USART1EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR SPI4EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR TIM15EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR TIM16EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR TIM17EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR TIM20EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR SAI1EN LL_APB2_GRP1_IsEnabledClock\n + * APB2ENR HRTIM1EN LL_APB2_GRP1_IsEnabledClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG + * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + * @arg @ref LL_APB2_GRP1_PERIPH_USART1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM20 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 + * @arg @ref LL_APB2_GRP1_PERIPH_HRTIM1 (*) + * + * (*) value not defined in all devices. + * @retval State of Periphs (1 or 0). + */ +__STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) +{ + return ((READ_BIT(RCC->APB2ENR, Periphs) == Periphs) ? 1UL : 0UL); +} + +/** + * @brief Disable APB2 peripherals clock. + * @rmtoll APB2ENR SYSCFGEN LL_APB2_GRP1_DisableClock\n + * APB2ENR TIM1EN LL_APB2_GRP1_DisableClock\n + * APB2ENR SPI1EN LL_APB2_GRP1_DisableClock\n + * APB2ENR TIM8EN LL_APB2_GRP1_DisableClock\n + * APB2ENR USART1EN LL_APB2_GRP1_DisableClock\n + * APB2ENR SPI4EN LL_APB2_GRP1_DisableClock\n + * APB2ENR TIM15EN LL_APB2_GRP1_DisableClock\n + * APB2ENR TIM16EN LL_APB2_GRP1_DisableClock\n + * APB2ENR TIM17EN LL_APB2_GRP1_DisableClock\n + * APB2ENR TIM20EN LL_APB2_GRP1_DisableClock\n + * APB2ENR SAI1EN LL_APB2_GRP1_DisableClock\n + * APB2ENR HRTIM1EN LL_APB2_GRP1_DisableClock + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG + * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + * @arg @ref LL_APB2_GRP1_PERIPH_USART1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM20 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 + * @arg @ref LL_APB2_GRP1_PERIPH_HRTIM1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB2ENR, Periphs); +} + +/** + * @brief Force APB2 peripherals reset. + * @rmtoll APB2RSTR SYSCFGRST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR SPI1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM8RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR USART1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR SPI4RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM15RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM16RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM17RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM20RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR SAI1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR HRTIM1RST LL_APB2_GRP1_ForceReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG + * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + * @arg @ref LL_APB2_GRP1_PERIPH_USART1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM20 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 + * @arg @ref LL_APB2_GRP1_PERIPH_HRTIM1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) +{ + SET_BIT(RCC->APB2RSTR, Periphs); +} + +/** + * @brief Release APB2 peripherals reset. + * @rmtoll APB2RSTR SYSCFGRST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR SPI1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM8RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR USART1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR SPI4RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM15RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM16RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM17RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR TIM20RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR SAI1RST LL_APB2_GRP1_ForceReset\n + * APB2RSTR HRTIM1RST LL_APB2_GRP1_ForceReset + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG + * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + * @arg @ref LL_APB2_GRP1_PERIPH_USART1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM20 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 + * @arg @ref LL_APB2_GRP1_PERIPH_HRTIM1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB2RSTR, Periphs); +} + +/** + * @brief Enable APB2 peripheral clocks in Sleep and Stop modes + * @rmtoll APB2SMENR SYSCFGSMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR TIM1SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR SPI1SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR TIM8SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR USART1SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR SPI4SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR TIM15SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR TIM16SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR TIM17SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR TIM20SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR SAI1SMEN LL_APB2_GRP1_EnableClockStopSleep\n + * APB2SMENR HRTIM1SMEN LL_APB2_GRP1_EnableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG + * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + * @arg @ref LL_APB2_GRP1_PERIPH_USART1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM20 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 + * @arg @ref LL_APB2_GRP1_PERIPH_HRTIM1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB2_GRP1_EnableClockStopSleep(uint32_t Periphs) +{ + __IO uint32_t tmpreg; + SET_BIT(RCC->APB2SMENR, Periphs); + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB2SMENR, Periphs); + (void)tmpreg; +} + +/** + * @brief Disable APB2 peripheral clocks in Sleep and Stop modes + * @rmtoll APB2SMENR SYSCFGSMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR TIM1SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR SPI1SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR TIM8SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR USART1SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR SPI4SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR TIM15SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR TIM16SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR TIM17SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR TIM20SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR SAI1SMEN LL_APB2_GRP1_DisableClockStopSleep\n + * APB2SMENR HRTIM1SMEN LL_APB2_GRP1_DisableClockStopSleep + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG + * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + * @arg @ref LL_APB2_GRP1_PERIPH_USART1 + * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 + * @arg @ref LL_APB2_GRP1_PERIPH_TIM20 (*) + * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 + * @arg @ref LL_APB2_GRP1_PERIPH_HRTIM1 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_APB2_GRP1_DisableClockStopSleep(uint32_t Periphs) +{ + CLEAR_BIT(RCC->APB2SMENR, Periphs); +} + +/** + * @} + */ + + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined(RCC) */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_LL_BUS_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h new file mode 100644 index 0000000..5f91639 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h @@ -0,0 +1,637 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_cortex.h + * @author MCD Application Team + * @brief Header file of CORTEX LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim + ============================================================================== + ##### How to use this driver ##### + ============================================================================== + [..] + The LL CORTEX driver contains a set of generic APIs that can be + used by user: + (+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick + functions + (+) Low power mode configuration (SCB register of Cortex-MCU) + (+) MPU API to configure and enable regions + (+) API to access to MCU info (CPUID register) + (+) API to enable fault handler (SHCSR accesses) + + @endverbatim + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_LL_CORTEX_H +#define __STM32G4xx_LL_CORTEX_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +/** @defgroup CORTEX_LL CORTEX + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/* Private constants ---------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants + * @{ + */ + +/** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source + * @{ + */ +#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U /*!< AHB clock divided by 8 selected as SysTick clock source.*/ +#define LL_SYSTICK_CLKSOURCE_HCLK SysTick_CTRL_CLKSOURCE_Msk /*!< AHB clock selected as SysTick clock source. */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_FAULT Handler Fault type + * @{ + */ +#define LL_HANDLER_FAULT_USG SCB_SHCSR_USGFAULTENA_Msk /*!< Usage fault */ +#define LL_HANDLER_FAULT_BUS SCB_SHCSR_BUSFAULTENA_Msk /*!< Bus fault */ +#define LL_HANDLER_FAULT_MEM SCB_SHCSR_MEMFAULTENA_Msk /*!< Memory management fault */ +/** + * @} + */ + +#if __MPU_PRESENT + +/** @defgroup CORTEX_LL_EC_CTRL_HFNMI_PRIVDEF MPU Control + * @{ + */ +#define LL_MPU_CTRL_HFNMI_PRIVDEF_NONE 0x00000000U /*!< Disable NMI and privileged SW access */ +#define LL_MPU_CTRL_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */ +#define LL_MPU_CTRL_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk /*!< Enable privileged software access to default memory map */ +#define LL_MPU_CTRL_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /*!< Enable NMI and privileged SW access */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_REGION MPU Region Number + * @{ + */ +#define LL_MPU_REGION_NUMBER0 0x00U /*!< REGION Number 0 */ +#define LL_MPU_REGION_NUMBER1 0x01U /*!< REGION Number 1 */ +#define LL_MPU_REGION_NUMBER2 0x02U /*!< REGION Number 2 */ +#define LL_MPU_REGION_NUMBER3 0x03U /*!< REGION Number 3 */ +#define LL_MPU_REGION_NUMBER4 0x04U /*!< REGION Number 4 */ +#define LL_MPU_REGION_NUMBER5 0x05U /*!< REGION Number 5 */ +#define LL_MPU_REGION_NUMBER6 0x06U /*!< REGION Number 6 */ +#define LL_MPU_REGION_NUMBER7 0x07U /*!< REGION Number 7 */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_REGION_SIZE MPU Region Size + * @{ + */ +#define LL_MPU_REGION_SIZE_32B (0x04U << MPU_RASR_SIZE_Pos) /*!< 32B Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_64B (0x05U << MPU_RASR_SIZE_Pos) /*!< 64B Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_128B (0x06U << MPU_RASR_SIZE_Pos) /*!< 128B Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_256B (0x07U << MPU_RASR_SIZE_Pos) /*!< 256B Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_512B (0x08U << MPU_RASR_SIZE_Pos) /*!< 512B Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_1KB (0x09U << MPU_RASR_SIZE_Pos) /*!< 1KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_2KB (0x0AU << MPU_RASR_SIZE_Pos) /*!< 2KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_4KB (0x0BU << MPU_RASR_SIZE_Pos) /*!< 4KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_8KB (0x0CU << MPU_RASR_SIZE_Pos) /*!< 8KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_16KB (0x0DU << MPU_RASR_SIZE_Pos) /*!< 16KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_32KB (0x0EU << MPU_RASR_SIZE_Pos) /*!< 32KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_64KB (0x0FU << MPU_RASR_SIZE_Pos) /*!< 64KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_128KB (0x10U << MPU_RASR_SIZE_Pos) /*!< 128KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_256KB (0x11U << MPU_RASR_SIZE_Pos) /*!< 256KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_512KB (0x12U << MPU_RASR_SIZE_Pos) /*!< 512KB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_1MB (0x13U << MPU_RASR_SIZE_Pos) /*!< 1MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_2MB (0x14U << MPU_RASR_SIZE_Pos) /*!< 2MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_4MB (0x15U << MPU_RASR_SIZE_Pos) /*!< 4MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_8MB (0x16U << MPU_RASR_SIZE_Pos) /*!< 8MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_16MB (0x17U << MPU_RASR_SIZE_Pos) /*!< 16MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_32MB (0x18U << MPU_RASR_SIZE_Pos) /*!< 32MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_64MB (0x19U << MPU_RASR_SIZE_Pos) /*!< 64MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_128MB (0x1AU << MPU_RASR_SIZE_Pos) /*!< 128MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_256MB (0x1BU << MPU_RASR_SIZE_Pos) /*!< 256MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_512MB (0x1CU << MPU_RASR_SIZE_Pos) /*!< 512MB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_1GB (0x1DU << MPU_RASR_SIZE_Pos) /*!< 1GB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_2GB (0x1EU << MPU_RASR_SIZE_Pos) /*!< 2GB Size of the MPU protection region */ +#define LL_MPU_REGION_SIZE_4GB (0x1FU << MPU_RASR_SIZE_Pos) /*!< 4GB Size of the MPU protection region */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_REGION_PRIVILEDGES MPU Region Privileges + * @{ + */ +#define LL_MPU_REGION_NO_ACCESS (0x00U << MPU_RASR_AP_Pos) /*!< No access*/ +#define LL_MPU_REGION_PRIV_RW (0x01U << MPU_RASR_AP_Pos) /*!< RW privileged (privileged access only)*/ +#define LL_MPU_REGION_PRIV_RW_URO (0x02U << MPU_RASR_AP_Pos) /*!< RW privileged - RO user (Write in a user program generates a fault) */ +#define LL_MPU_REGION_FULL_ACCESS (0x03U << MPU_RASR_AP_Pos) /*!< RW privileged & user (Full access) */ +#define LL_MPU_REGION_PRIV_RO (0x05U << MPU_RASR_AP_Pos) /*!< RO privileged (privileged read only)*/ +#define LL_MPU_REGION_PRIV_RO_URO (0x06U << MPU_RASR_AP_Pos) /*!< RO privileged & user (read only) */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_TEX MPU TEX Level + * @{ + */ +#define LL_MPU_TEX_LEVEL0 (0x00U << MPU_RASR_TEX_Pos) /*!< b000 for TEX bits */ +#define LL_MPU_TEX_LEVEL1 (0x01U << MPU_RASR_TEX_Pos) /*!< b001 for TEX bits */ +#define LL_MPU_TEX_LEVEL2 (0x02U << MPU_RASR_TEX_Pos) /*!< b010 for TEX bits */ +#define LL_MPU_TEX_LEVEL4 (0x04U << MPU_RASR_TEX_Pos) /*!< b100 for TEX bits */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_INSTRUCTION_ACCESS MPU Instruction Access + * @{ + */ +#define LL_MPU_INSTRUCTION_ACCESS_ENABLE 0x00U /*!< Instruction fetches enabled */ +#define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_SHAREABLE_ACCESS MPU Shareable Access + * @{ + */ +#define LL_MPU_ACCESS_SHAREABLE MPU_RASR_S_Msk /*!< Shareable memory attribute */ +#define LL_MPU_ACCESS_NOT_SHAREABLE 0x00U /*!< Not Shareable memory attribute */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_CACHEABLE_ACCESS MPU Cacheable Access + * @{ + */ +#define LL_MPU_ACCESS_CACHEABLE MPU_RASR_C_Msk /*!< Cacheable memory attribute */ +#define LL_MPU_ACCESS_NOT_CACHEABLE 0x00U /*!< Not Cacheable memory attribute */ +/** + * @} + */ + +/** @defgroup CORTEX_LL_EC_BUFFERABLE_ACCESS MPU Bufferable Access + * @{ + */ +#define LL_MPU_ACCESS_BUFFERABLE MPU_RASR_B_Msk /*!< Bufferable memory attribute */ +#define LL_MPU_ACCESS_NOT_BUFFERABLE 0x00U /*!< Not Bufferable memory attribute */ +/** + * @} + */ +#endif /* __MPU_PRESENT */ +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions + * @{ + */ + +/** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK + * @{ + */ + +/** + * @brief This function checks if the Systick counter flag is active or not. + * @note It can be used in timeout function on application side. + * @rmtoll STK_CTRL COUNTFLAG LL_SYSTICK_IsActiveCounterFlag + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void) +{ + return (((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk)) ? 1UL : 0UL); +} + +/** + * @brief Configures the SysTick clock source + * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource + * @param Source This parameter can be one of the following values: + * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 + * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK + * @retval None + */ +__STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source) +{ + if (Source == LL_SYSTICK_CLKSOURCE_HCLK) + { + SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); + } + else + { + CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); + } +} + +/** + * @brief Get the SysTick clock source + * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource + * @retval Returned value can be one of the following values: + * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 + * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK + */ +__STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void) +{ + return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); +} + +/** + * @brief Enable SysTick exception request + * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT + * @retval None + */ +__STATIC_INLINE void LL_SYSTICK_EnableIT(void) +{ + SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); +} + +/** + * @brief Disable SysTick exception request + * @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT + * @retval None + */ +__STATIC_INLINE void LL_SYSTICK_DisableIT(void) +{ + CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); +} + +/** + * @brief Checks if the SYSTICK interrupt is enabled or disabled. + * @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void) +{ + return ((READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE + * @{ + */ + +/** + * @brief Processor uses sleep as its low power mode + * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep + * @retval None + */ +__STATIC_INLINE void LL_LPM_EnableSleep(void) +{ + /* Clear SLEEPDEEP bit of Cortex System Control Register */ + CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); +} + +/** + * @brief Processor uses deep sleep as its low power mode + * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep + * @retval None + */ +__STATIC_INLINE void LL_LPM_EnableDeepSleep(void) +{ + /* Set SLEEPDEEP bit of Cortex System Control Register */ + SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); +} + +/** + * @brief Configures sleep-on-exit when returning from Handler mode to Thread mode. + * @note Setting this bit to 1 enables an interrupt-driven application to avoid returning to an + * empty main application. + * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit + * @retval None + */ +__STATIC_INLINE void LL_LPM_EnableSleepOnExit(void) +{ + /* Set SLEEPONEXIT bit of Cortex System Control Register */ + SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); +} + +/** + * @brief Do not sleep when returning to Thread mode. + * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit + * @retval None + */ +__STATIC_INLINE void LL_LPM_DisableSleepOnExit(void) +{ + /* Clear SLEEPONEXIT bit of Cortex System Control Register */ + CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); +} + +/** + * @brief Enabled events and all interrupts, including disabled interrupts, can wakeup the + * processor. + * @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend + * @retval None + */ +__STATIC_INLINE void LL_LPM_EnableEventOnPend(void) +{ + /* Set SEVEONPEND bit of Cortex System Control Register */ + SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); +} + +/** + * @brief Only enabled interrupts or events can wakeup the processor, disabled interrupts are + * excluded + * @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend + * @retval None + */ +__STATIC_INLINE void LL_LPM_DisableEventOnPend(void) +{ + /* Clear SEVEONPEND bit of Cortex System Control Register */ + CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); +} + +/** + * @} + */ + +/** @defgroup CORTEX_LL_EF_HANDLER HANDLER + * @{ + */ + +/** + * @brief Enable a fault in System handler control register (SHCSR) + * @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_EnableFault + * @param Fault This parameter can be a combination of the following values: + * @arg @ref LL_HANDLER_FAULT_USG + * @arg @ref LL_HANDLER_FAULT_BUS + * @arg @ref LL_HANDLER_FAULT_MEM + * @retval None + */ +__STATIC_INLINE void LL_HANDLER_EnableFault(uint32_t Fault) +{ + /* Enable the system handler fault */ + SET_BIT(SCB->SHCSR, Fault); +} + +/** + * @brief Disable a fault in System handler control register (SHCSR) + * @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_DisableFault + * @param Fault This parameter can be a combination of the following values: + * @arg @ref LL_HANDLER_FAULT_USG + * @arg @ref LL_HANDLER_FAULT_BUS + * @arg @ref LL_HANDLER_FAULT_MEM + * @retval None + */ +__STATIC_INLINE void LL_HANDLER_DisableFault(uint32_t Fault) +{ + /* Disable the system handler fault */ + CLEAR_BIT(SCB->SHCSR, Fault); +} + +/** + * @} + */ + +/** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO + * @{ + */ + +/** + * @brief Get Implementer code + * @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer + * @retval Value should be equal to 0x41 for ARM + */ +__STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void) +{ + return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); +} + +/** + * @brief Get Variant number (The r value in the rnpn product revision identifier) + * @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant + * @retval Value between 0 and 255 (0x0: revision 0) + */ +__STATIC_INLINE uint32_t LL_CPUID_GetVariant(void) +{ + return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); +} + +/** + * @brief Get Architecture number + * @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetArchitecture + * @retval Value should be equal to 0xF for Cortex-M4 devices + */ +__STATIC_INLINE uint32_t LL_CPUID_GetArchitecture(void) +{ + return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); +} + +/** + * @brief Get Part number + * @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo + * @retval Value should be equal to 0xC24 for Cortex-M4 + */ +__STATIC_INLINE uint32_t LL_CPUID_GetParNo(void) +{ + return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); +} + +/** + * @brief Get Revision number (The p value in the rnpn product revision identifier, indicates patch release) + * @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision + * @retval Value between 0 and 255 (0x1: patch 1) + */ +__STATIC_INLINE uint32_t LL_CPUID_GetRevision(void) +{ + return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); +} + +/** + * @} + */ + +#if __MPU_PRESENT +/** @defgroup CORTEX_LL_EF_MPU MPU + * @{ + */ + +/** + * @brief Enable MPU with input options + * @rmtoll MPU_CTRL ENABLE LL_MPU_Enable + * @param Options This parameter can be one of the following values: + * @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF_NONE + * @arg @ref LL_MPU_CTRL_HARDFAULT_NMI + * @arg @ref LL_MPU_CTRL_PRIVILEGED_DEFAULT + * @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF + * @retval None + */ +__STATIC_INLINE void LL_MPU_Enable(uint32_t Options) +{ + /* Enable the MPU*/ + WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options)); + /* Ensure MPU settings take effects */ + __DSB(); + /* Sequence instruction fetches using update settings */ + __ISB(); +} + +/** + * @brief Disable MPU + * @rmtoll MPU_CTRL ENABLE LL_MPU_Disable + * @retval None + */ +__STATIC_INLINE void LL_MPU_Disable(void) +{ + /* Make sure outstanding transfers are done */ + __DMB(); + /* Disable MPU*/ + WRITE_REG(MPU->CTRL, 0U); +} + +/** + * @brief Check if MPU is enabled or not + * @rmtoll MPU_CTRL ENABLE LL_MPU_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_MPU_IsEnabled(void) +{ + return ((READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk)) ? 1UL : 0UL); +} + +/** + * @brief Enable a MPU region + * @rmtoll MPU_RASR ENABLE LL_MPU_EnableRegion + * @param Region This parameter can be one of the following values: + * @arg @ref LL_MPU_REGION_NUMBER0 + * @arg @ref LL_MPU_REGION_NUMBER1 + * @arg @ref LL_MPU_REGION_NUMBER2 + * @arg @ref LL_MPU_REGION_NUMBER3 + * @arg @ref LL_MPU_REGION_NUMBER4 + * @arg @ref LL_MPU_REGION_NUMBER5 + * @arg @ref LL_MPU_REGION_NUMBER6 + * @arg @ref LL_MPU_REGION_NUMBER7 + * @retval None + */ +__STATIC_INLINE void LL_MPU_EnableRegion(uint32_t Region) +{ + /* Set Region number */ + WRITE_REG(MPU->RNR, Region); + /* Enable the MPU region */ + SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); +} + +/** + * @brief Configure and enable a region + * @rmtoll MPU_RNR REGION LL_MPU_ConfigRegion\n + * MPU_RBAR REGION LL_MPU_ConfigRegion\n + * MPU_RBAR ADDR LL_MPU_ConfigRegion\n + * MPU_RASR XN LL_MPU_ConfigRegion\n + * MPU_RASR AP LL_MPU_ConfigRegion\n + * MPU_RASR S LL_MPU_ConfigRegion\n + * MPU_RASR C LL_MPU_ConfigRegion\n + * MPU_RASR B LL_MPU_ConfigRegion\n + * MPU_RASR SIZE LL_MPU_ConfigRegion + * @param Region This parameter can be one of the following values: + * @arg @ref LL_MPU_REGION_NUMBER0 + * @arg @ref LL_MPU_REGION_NUMBER1 + * @arg @ref LL_MPU_REGION_NUMBER2 + * @arg @ref LL_MPU_REGION_NUMBER3 + * @arg @ref LL_MPU_REGION_NUMBER4 + * @arg @ref LL_MPU_REGION_NUMBER5 + * @arg @ref LL_MPU_REGION_NUMBER6 + * @arg @ref LL_MPU_REGION_NUMBER7 + * @param Address Value of region base address + * @param SubRegionDisable Sub-region disable value between Min_Data = 0x00 and Max_Data = 0xFF + * @param Attributes This parameter can be a combination of the following values: + * @arg @ref LL_MPU_REGION_SIZE_32B or @ref LL_MPU_REGION_SIZE_64B or @ref LL_MPU_REGION_SIZE_128B or @ref LL_MPU_REGION_SIZE_256B or @ref LL_MPU_REGION_SIZE_512B + * or @ref LL_MPU_REGION_SIZE_1KB or @ref LL_MPU_REGION_SIZE_2KB or @ref LL_MPU_REGION_SIZE_4KB or @ref LL_MPU_REGION_SIZE_8KB or @ref LL_MPU_REGION_SIZE_16KB + * or @ref LL_MPU_REGION_SIZE_32KB or @ref LL_MPU_REGION_SIZE_64KB or @ref LL_MPU_REGION_SIZE_128KB or @ref LL_MPU_REGION_SIZE_256KB or @ref LL_MPU_REGION_SIZE_512KB + * or @ref LL_MPU_REGION_SIZE_1MB or @ref LL_MPU_REGION_SIZE_2MB or @ref LL_MPU_REGION_SIZE_4MB or @ref LL_MPU_REGION_SIZE_8MB or @ref LL_MPU_REGION_SIZE_16MB + * or @ref LL_MPU_REGION_SIZE_32MB or @ref LL_MPU_REGION_SIZE_64MB or @ref LL_MPU_REGION_SIZE_128MB or @ref LL_MPU_REGION_SIZE_256MB or @ref LL_MPU_REGION_SIZE_512MB + * or @ref LL_MPU_REGION_SIZE_1GB or @ref LL_MPU_REGION_SIZE_2GB or @ref LL_MPU_REGION_SIZE_4GB + * @arg @ref LL_MPU_REGION_NO_ACCESS or @ref LL_MPU_REGION_PRIV_RW or @ref LL_MPU_REGION_PRIV_RW_URO or @ref LL_MPU_REGION_FULL_ACCESS + * or @ref LL_MPU_REGION_PRIV_RO or @ref LL_MPU_REGION_PRIV_RO_URO + * @arg @ref LL_MPU_TEX_LEVEL0 or @ref LL_MPU_TEX_LEVEL1 or @ref LL_MPU_TEX_LEVEL2 or @ref LL_MPU_TEX_LEVEL4 + * @arg @ref LL_MPU_INSTRUCTION_ACCESS_ENABLE or @ref LL_MPU_INSTRUCTION_ACCESS_DISABLE + * @arg @ref LL_MPU_ACCESS_SHAREABLE or @ref LL_MPU_ACCESS_NOT_SHAREABLE + * @arg @ref LL_MPU_ACCESS_CACHEABLE or @ref LL_MPU_ACCESS_NOT_CACHEABLE + * @arg @ref LL_MPU_ACCESS_BUFFERABLE or @ref LL_MPU_ACCESS_NOT_BUFFERABLE + * @retval None + */ +__STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisable, uint32_t Address, uint32_t Attributes) +{ + /* Set Region number */ + WRITE_REG(MPU->RNR, Region); + /* Set base address */ + WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U)); + /* Configure MPU */ + WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | (SubRegionDisable << MPU_RASR_SRD_Pos))); +} + +/** + * @brief Disable a region + * @rmtoll MPU_RNR REGION LL_MPU_DisableRegion\n + * MPU_RASR ENABLE LL_MPU_DisableRegion + * @param Region This parameter can be one of the following values: + * @arg @ref LL_MPU_REGION_NUMBER0 + * @arg @ref LL_MPU_REGION_NUMBER1 + * @arg @ref LL_MPU_REGION_NUMBER2 + * @arg @ref LL_MPU_REGION_NUMBER3 + * @arg @ref LL_MPU_REGION_NUMBER4 + * @arg @ref LL_MPU_REGION_NUMBER5 + * @arg @ref LL_MPU_REGION_NUMBER6 + * @arg @ref LL_MPU_REGION_NUMBER7 + * @retval None + */ +__STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region) +{ + /* Set Region number */ + WRITE_REG(MPU->RNR, Region); + /* Disable the MPU region */ + CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); +} + +/** + * @} + */ + +#endif /* __MPU_PRESENT */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_LL_CORTEX_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h new file mode 100644 index 0000000..fcd3e5a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h @@ -0,0 +1,781 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_crs.h + * @author MCD Application Team + * @brief Header file of CRS LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_LL_CRS_H +#define __STM32G4xx_LL_CRS_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined(CRS) + +/** @defgroup CRS_LL CRS + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/** @defgroup CRS_LL_Exported_Constants CRS Exported Constants + * @{ + */ + +/** @defgroup CRS_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_CRS_ReadReg function + * @{ + */ +#define LL_CRS_ISR_SYNCOKF CRS_ISR_SYNCOKF +#define LL_CRS_ISR_SYNCWARNF CRS_ISR_SYNCWARNF +#define LL_CRS_ISR_ERRF CRS_ISR_ERRF +#define LL_CRS_ISR_ESYNCF CRS_ISR_ESYNCF +#define LL_CRS_ISR_SYNCERR CRS_ISR_SYNCERR +#define LL_CRS_ISR_SYNCMISS CRS_ISR_SYNCMISS +#define LL_CRS_ISR_TRIMOVF CRS_ISR_TRIMOVF +/** + * @} + */ + +/** @defgroup CRS_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_CRS_ReadReg and LL_CRS_WriteReg functions + * @{ + */ +#define LL_CRS_CR_SYNCOKIE CRS_CR_SYNCOKIE +#define LL_CRS_CR_SYNCWARNIE CRS_CR_SYNCWARNIE +#define LL_CRS_CR_ERRIE CRS_CR_ERRIE +#define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE +/** + * @} + */ + +/** @defgroup CRS_LL_EC_SYNC_DIV Synchronization Signal Divider + * @{ + */ +#define LL_CRS_SYNC_DIV_1 ((uint32_t)0x00U) /*!< Synchro Signal not divided (default) */ +#define LL_CRS_SYNC_DIV_2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */ +#define LL_CRS_SYNC_DIV_4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */ +#define LL_CRS_SYNC_DIV_8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */ +#define LL_CRS_SYNC_DIV_16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */ +#define LL_CRS_SYNC_DIV_32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */ +#define LL_CRS_SYNC_DIV_64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */ +#define LL_CRS_SYNC_DIV_128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */ +/** + * @} + */ + +/** @defgroup CRS_LL_EC_SYNC_SOURCE Synchronization Signal Source + * @{ + */ +#define LL_CRS_SYNC_SOURCE_GPIO ((uint32_t)0x00U) /*!< Synchro Signal source GPIO */ +#define LL_CRS_SYNC_SOURCE_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */ +#define LL_CRS_SYNC_SOURCE_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF (default)*/ +/** + * @} + */ + +/** @defgroup CRS_LL_EC_SYNC_POLARITY Synchronization Signal Polarity + * @{ + */ +#define LL_CRS_SYNC_POLARITY_RISING ((uint32_t)0x00U) /*!< Synchro Active on rising edge (default) */ +#define LL_CRS_SYNC_POLARITY_FALLING CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */ +/** + * @} + */ + +/** @defgroup CRS_LL_EC_FREQERRORDIR Frequency Error Direction + * @{ + */ +#define LL_CRS_FREQ_ERROR_DIR_UP ((uint32_t)0x00U) /*!< Upcounting direction, the actual frequency is above the target */ +#define LL_CRS_FREQ_ERROR_DIR_DOWN ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */ +/** + * @} + */ + +/** @defgroup CRS_LL_EC_DEFAULTVALUES Default Values + * @{ + */ +/** + * @brief Reset value of the RELOAD field + * @note The reset value of the RELOAD field corresponds to a target frequency of 48 MHz + * and a synchronization signal frequency of 1 kHz (SOF signal from USB) + */ +#define LL_CRS_RELOADVALUE_DEFAULT ((uint32_t)0xBB7FU) + +/** + * @brief Reset value of Frequency error limit. + */ +#define LL_CRS_ERRORLIMIT_DEFAULT ((uint32_t)0x22U) + +/** + * @brief Reset value of the HSI48 Calibration field + * @note The default value is 64, which corresponds to the middle of the trimming interval. + * The trimming step is specified in the product datasheet. + * A higher TRIM value corresponds to a higher output frequency + */ +#define LL_CRS_HSI48CALIBRATION_DEFAULT ((uint32_t)0x40U) +/** + * @} + */ +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup CRS_LL_Exported_Macros CRS Exported Macros + * @{ + */ + +/** @defgroup CRS_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in CRS register + * @param __INSTANCE__ CRS Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_CRS_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in CRS register + * @param __INSTANCE__ CRS Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_CRS_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** @defgroup CRS_LL_EM_Exported_Macros_Calculate_Reload Exported_Macros_Calculate_Reload + * @{ + */ + +/** + * @brief Macro to calculate reload value to be set in CRS register according to target and sync frequencies + * @note The RELOAD value should be selected according to the ratio between + * the target frequency and the frequency of the synchronization source after + * prescaling. It is then decreased by one in order to reach the expected + * synchronization on the zero value. The formula is the following: + * RELOAD = (fTARGET / fSYNC) -1 + * @param __FTARGET__ Target frequency (value in Hz) + * @param __FSYNC__ Synchronization signal frequency (value in Hz) + * @retval Reload value (in Hz) + */ +#define __LL_CRS_CALC_CALCULATE_RELOADVALUE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U) + +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup CRS_LL_Exported_Functions CRS Exported Functions + * @{ + */ + +/** @defgroup CRS_LL_EF_Configuration Configuration + * @{ + */ + +/** + * @brief Enable Frequency error counter + * @note When this bit is set, the CRS_CFGR register is write-protected and cannot be modified + * @rmtoll CR CEN LL_CRS_EnableFreqErrorCounter + * @retval None + */ +__STATIC_INLINE void LL_CRS_EnableFreqErrorCounter(void) +{ + SET_BIT(CRS->CR, CRS_CR_CEN); +} + +/** + * @brief Disable Frequency error counter + * @rmtoll CR CEN LL_CRS_DisableFreqErrorCounter + * @retval None + */ +__STATIC_INLINE void LL_CRS_DisableFreqErrorCounter(void) +{ + CLEAR_BIT(CRS->CR, CRS_CR_CEN); +} + +/** + * @brief Check if Frequency error counter is enabled or not + * @rmtoll CR CEN LL_CRS_IsEnabledFreqErrorCounter + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsEnabledFreqErrorCounter(void) +{ + return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); +} + +/** + * @brief Enable Automatic trimming counter + * @rmtoll CR AUTOTRIMEN LL_CRS_EnableAutoTrimming + * @retval None + */ +__STATIC_INLINE void LL_CRS_EnableAutoTrimming(void) +{ + SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); +} + +/** + * @brief Disable Automatic trimming counter + * @rmtoll CR AUTOTRIMEN LL_CRS_DisableAutoTrimming + * @retval None + */ +__STATIC_INLINE void LL_CRS_DisableAutoTrimming(void) +{ + CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); +} + +/** + * @brief Check if Automatic trimming is enabled or not + * @rmtoll CR AUTOTRIMEN LL_CRS_IsEnabledAutoTrimming + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsEnabledAutoTrimming(void) +{ + return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); +} + +/** + * @brief Set HSI48 oscillator smooth trimming + * @note When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only + * @rmtoll CR TRIM LL_CRS_SetHSI48SmoothTrimming + * @param Value a number between Min_Data = 0 and Max_Data = 63 + * @note Default value can be set thanks to @ref LL_CRS_HSI48CALIBRATION_DEFAULT + * @retval None + */ +__STATIC_INLINE void LL_CRS_SetHSI48SmoothTrimming(uint32_t Value) +{ + MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); +} + +/** + * @brief Get HSI48 oscillator smooth trimming + * @rmtoll CR TRIM LL_CRS_GetHSI48SmoothTrimming + * @retval a number between Min_Data = 0 and Max_Data = 63 + */ +__STATIC_INLINE uint32_t LL_CRS_GetHSI48SmoothTrimming(void) +{ + return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); +} + +/** + * @brief Set counter reload value + * @rmtoll CFGR RELOAD LL_CRS_SetReloadCounter + * @param Value a number between Min_Data = 0 and Max_Data = 0xFFFF + * @note Default value can be set thanks to @ref LL_CRS_RELOADVALUE_DEFAULT + * Otherwise it can be calculated in using macro @ref __LL_CRS_CALC_CALCULATE_RELOADVALUE (_FTARGET_, _FSYNC_) + * @retval None + */ +__STATIC_INLINE void LL_CRS_SetReloadCounter(uint32_t Value) +{ + MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); +} + +/** + * @brief Get counter reload value + * @rmtoll CFGR RELOAD LL_CRS_GetReloadCounter + * @retval a number between Min_Data = 0 and Max_Data = 0xFFFF + */ +__STATIC_INLINE uint32_t LL_CRS_GetReloadCounter(void) +{ + return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); +} + +/** + * @brief Set frequency error limit + * @rmtoll CFGR FELIM LL_CRS_SetFreqErrorLimit + * @param Value a number between Min_Data = 0 and Max_Data = 255 + * @note Default value can be set thanks to @ref LL_CRS_ERRORLIMIT_DEFAULT + * @retval None + */ +__STATIC_INLINE void LL_CRS_SetFreqErrorLimit(uint32_t Value) +{ + MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_CFGR_FELIM_Pos); +} + +/** + * @brief Get frequency error limit + * @rmtoll CFGR FELIM LL_CRS_GetFreqErrorLimit + * @retval A number between Min_Data = 0 and Max_Data = 255 + */ +__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorLimit(void) +{ + return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_CFGR_FELIM_Pos); +} + +/** + * @brief Set division factor for SYNC signal + * @rmtoll CFGR SYNCDIV LL_CRS_SetSyncDivider + * @param Divider This parameter can be one of the following values: + * @arg @ref LL_CRS_SYNC_DIV_1 + * @arg @ref LL_CRS_SYNC_DIV_2 + * @arg @ref LL_CRS_SYNC_DIV_4 + * @arg @ref LL_CRS_SYNC_DIV_8 + * @arg @ref LL_CRS_SYNC_DIV_16 + * @arg @ref LL_CRS_SYNC_DIV_32 + * @arg @ref LL_CRS_SYNC_DIV_64 + * @arg @ref LL_CRS_SYNC_DIV_128 + * @retval None + */ +__STATIC_INLINE void LL_CRS_SetSyncDivider(uint32_t Divider) +{ + MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCDIV, Divider); +} + +/** + * @brief Get division factor for SYNC signal + * @rmtoll CFGR SYNCDIV LL_CRS_GetSyncDivider + * @retval Returned value can be one of the following values: + * @arg @ref LL_CRS_SYNC_DIV_1 + * @arg @ref LL_CRS_SYNC_DIV_2 + * @arg @ref LL_CRS_SYNC_DIV_4 + * @arg @ref LL_CRS_SYNC_DIV_8 + * @arg @ref LL_CRS_SYNC_DIV_16 + * @arg @ref LL_CRS_SYNC_DIV_32 + * @arg @ref LL_CRS_SYNC_DIV_64 + * @arg @ref LL_CRS_SYNC_DIV_128 + */ +__STATIC_INLINE uint32_t LL_CRS_GetSyncDivider(void) +{ + return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCDIV)); +} + +/** + * @brief Set SYNC signal source + * @rmtoll CFGR SYNCSRC LL_CRS_SetSyncSignalSource + * @param Source This parameter can be one of the following values: + * @arg @ref LL_CRS_SYNC_SOURCE_GPIO + * @arg @ref LL_CRS_SYNC_SOURCE_LSE + * @arg @ref LL_CRS_SYNC_SOURCE_USB + * @retval None + */ +__STATIC_INLINE void LL_CRS_SetSyncSignalSource(uint32_t Source) +{ + MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCSRC, Source); +} + +/** + * @brief Get SYNC signal source + * @rmtoll CFGR SYNCSRC LL_CRS_GetSyncSignalSource + * @retval Returned value can be one of the following values: + * @arg @ref LL_CRS_SYNC_SOURCE_GPIO + * @arg @ref LL_CRS_SYNC_SOURCE_LSE + * @arg @ref LL_CRS_SYNC_SOURCE_USB + */ +__STATIC_INLINE uint32_t LL_CRS_GetSyncSignalSource(void) +{ + return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCSRC)); +} + +/** + * @brief Set input polarity for the SYNC signal source + * @rmtoll CFGR SYNCPOL LL_CRS_SetSyncPolarity + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_CRS_SYNC_POLARITY_RISING + * @arg @ref LL_CRS_SYNC_POLARITY_FALLING + * @retval None + */ +__STATIC_INLINE void LL_CRS_SetSyncPolarity(uint32_t Polarity) +{ + MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCPOL, Polarity); +} + +/** + * @brief Get input polarity for the SYNC signal source + * @rmtoll CFGR SYNCPOL LL_CRS_GetSyncPolarity + * @retval Returned value can be one of the following values: + * @arg @ref LL_CRS_SYNC_POLARITY_RISING + * @arg @ref LL_CRS_SYNC_POLARITY_FALLING + */ +__STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void) +{ + return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCPOL)); +} + +/** + * @brief Configure CRS for the synchronization + * @rmtoll CR TRIM LL_CRS_ConfigSynchronization\n + * CFGR RELOAD LL_CRS_ConfigSynchronization\n + * CFGR FELIM LL_CRS_ConfigSynchronization\n + * CFGR SYNCDIV LL_CRS_ConfigSynchronization\n + * CFGR SYNCSRC LL_CRS_ConfigSynchronization\n + * CFGR SYNCPOL LL_CRS_ConfigSynchronization + * @param HSI48CalibrationValue a number between Min_Data = 0 and Max_Data = 63 + * @param ErrorLimitValue a number between Min_Data = 0 and Max_Data = 0xFFFF + * @param ReloadValue a number between Min_Data = 0 and Max_Data = 255 + * @param Settings This parameter can be a combination of the following values: + * @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8 + * or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128 + * @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB + * @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING + * @retval None + */ +__STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, + uint32_t ReloadValue, uint32_t Settings) +{ + MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); + MODIFY_REG(CRS->CFGR, + CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL, + ReloadValue | (ErrorLimitValue << CRS_CFGR_FELIM_Pos) | Settings); +} + +/** + * @} + */ + +/** @defgroup CRS_LL_EF_CRS_Management CRS_Management + * @{ + */ + +/** + * @brief Generate software SYNC event + * @rmtoll CR SWSYNC LL_CRS_GenerateEvent_SWSYNC + * @retval None + */ +__STATIC_INLINE void LL_CRS_GenerateEvent_SWSYNC(void) +{ + SET_BIT(CRS->CR, CRS_CR_SWSYNC); +} + +/** + * @brief Get the frequency error direction latched in the time of the last + * SYNC event + * @rmtoll ISR FEDIR LL_CRS_GetFreqErrorDirection + * @retval Returned value can be one of the following values: + * @arg @ref LL_CRS_FREQ_ERROR_DIR_UP + * @arg @ref LL_CRS_FREQ_ERROR_DIR_DOWN + */ +__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorDirection(void) +{ + return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); +} + +/** + * @brief Get the frequency error counter value latched in the time of the last SYNC event + * @rmtoll ISR FECAP LL_CRS_GetFreqErrorCapture + * @retval A number between Min_Data = 0x0000 and Max_Data = 0xFFFF + */ +__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorCapture(void) +{ + return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); +} + +/** + * @} + */ + +/** @defgroup CRS_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Check if SYNC event OK signal occurred or not + * @rmtoll ISR SYNCOKF LL_CRS_IsActiveFlag_SYNCOK + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCOK(void) +{ + return ((READ_BIT(CRS->ISR, CRS_ISR_SYNCOKF) == (CRS_ISR_SYNCOKF)) ? 1UL : 0UL); +} + +/** + * @brief Check if SYNC warning signal occurred or not + * @rmtoll ISR SYNCWARNF LL_CRS_IsActiveFlag_SYNCWARN + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCWARN(void) +{ + return ((READ_BIT(CRS->ISR, CRS_ISR_SYNCWARNF) == (CRS_ISR_SYNCWARNF)) ? 1UL : 0UL); +} + +/** + * @brief Check if Synchronization or trimming error signal occurred or not + * @rmtoll ISR ERRF LL_CRS_IsActiveFlag_ERR + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ERR(void) +{ + return ((READ_BIT(CRS->ISR, CRS_ISR_ERRF) == (CRS_ISR_ERRF)) ? 1UL : 0UL); +} + +/** + * @brief Check if Expected SYNC signal occurred or not + * @rmtoll ISR ESYNCF LL_CRS_IsActiveFlag_ESYNC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ESYNC(void) +{ + return ((READ_BIT(CRS->ISR, CRS_ISR_ESYNCF) == (CRS_ISR_ESYNCF)) ? 1UL : 0UL); +} + +/** + * @brief Check if SYNC error signal occurred or not + * @rmtoll ISR SYNCERR LL_CRS_IsActiveFlag_SYNCERR + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCERR(void) +{ + return ((READ_BIT(CRS->ISR, CRS_ISR_SYNCERR) == (CRS_ISR_SYNCERR)) ? 1UL : 0UL); +} + +/** + * @brief Check if SYNC missed error signal occurred or not + * @rmtoll ISR SYNCMISS LL_CRS_IsActiveFlag_SYNCMISS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCMISS(void) +{ + return ((READ_BIT(CRS->ISR, CRS_ISR_SYNCMISS) == (CRS_ISR_SYNCMISS)) ? 1UL : 0UL); +} + +/** + * @brief Check if Trimming overflow or underflow occurred or not + * @rmtoll ISR TRIMOVF LL_CRS_IsActiveFlag_TRIMOVF + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_TRIMOVF(void) +{ + return ((READ_BIT(CRS->ISR, CRS_ISR_TRIMOVF) == (CRS_ISR_TRIMOVF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the SYNC event OK flag + * @rmtoll ICR SYNCOKC LL_CRS_ClearFlag_SYNCOK + * @retval None + */ +__STATIC_INLINE void LL_CRS_ClearFlag_SYNCOK(void) +{ + WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); +} + +/** + * @brief Clear the SYNC warning flag + * @rmtoll ICR SYNCWARNC LL_CRS_ClearFlag_SYNCWARN + * @retval None + */ +__STATIC_INLINE void LL_CRS_ClearFlag_SYNCWARN(void) +{ + WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); +} + +/** + * @brief Clear TRIMOVF, SYNCMISS and SYNCERR bits and consequently also + * the ERR flag + * @rmtoll ICR ERRC LL_CRS_ClearFlag_ERR + * @retval None + */ +__STATIC_INLINE void LL_CRS_ClearFlag_ERR(void) +{ + WRITE_REG(CRS->ICR, CRS_ICR_ERRC); +} + +/** + * @brief Clear Expected SYNC flag + * @rmtoll ICR ESYNCC LL_CRS_ClearFlag_ESYNC + * @retval None + */ +__STATIC_INLINE void LL_CRS_ClearFlag_ESYNC(void) +{ + WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); +} + +/** + * @} + */ + +/** @defgroup CRS_LL_EF_IT_Management IT_Management + * @{ + */ + +/** + * @brief Enable SYNC event OK interrupt + * @rmtoll CR SYNCOKIE LL_CRS_EnableIT_SYNCOK + * @retval None + */ +__STATIC_INLINE void LL_CRS_EnableIT_SYNCOK(void) +{ + SET_BIT(CRS->CR, CRS_CR_SYNCOKIE); +} + +/** + * @brief Disable SYNC event OK interrupt + * @rmtoll CR SYNCOKIE LL_CRS_DisableIT_SYNCOK + * @retval None + */ +__STATIC_INLINE void LL_CRS_DisableIT_SYNCOK(void) +{ + CLEAR_BIT(CRS->CR, CRS_CR_SYNCOKIE); +} + +/** + * @brief Check if SYNC event OK interrupt is enabled or not + * @rmtoll CR SYNCOKIE LL_CRS_IsEnabledIT_SYNCOK + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCOK(void) +{ + return ((READ_BIT(CRS->CR, CRS_CR_SYNCOKIE) == (CRS_CR_SYNCOKIE)) ? 1UL : 0UL); +} + +/** + * @brief Enable SYNC warning interrupt + * @rmtoll CR SYNCWARNIE LL_CRS_EnableIT_SYNCWARN + * @retval None + */ +__STATIC_INLINE void LL_CRS_EnableIT_SYNCWARN(void) +{ + SET_BIT(CRS->CR, CRS_CR_SYNCWARNIE); +} + +/** + * @brief Disable SYNC warning interrupt + * @rmtoll CR SYNCWARNIE LL_CRS_DisableIT_SYNCWARN + * @retval None + */ +__STATIC_INLINE void LL_CRS_DisableIT_SYNCWARN(void) +{ + CLEAR_BIT(CRS->CR, CRS_CR_SYNCWARNIE); +} + +/** + * @brief Check if SYNC warning interrupt is enabled or not + * @rmtoll CR SYNCWARNIE LL_CRS_IsEnabledIT_SYNCWARN + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCWARN(void) +{ + return ((READ_BIT(CRS->CR, CRS_CR_SYNCWARNIE) == (CRS_CR_SYNCWARNIE)) ? 1UL : 0UL); +} + +/** + * @brief Enable Synchronization or trimming error interrupt + * @rmtoll CR ERRIE LL_CRS_EnableIT_ERR + * @retval None + */ +__STATIC_INLINE void LL_CRS_EnableIT_ERR(void) +{ + SET_BIT(CRS->CR, CRS_CR_ERRIE); +} + +/** + * @brief Disable Synchronization or trimming error interrupt + * @rmtoll CR ERRIE LL_CRS_DisableIT_ERR + * @retval None + */ +__STATIC_INLINE void LL_CRS_DisableIT_ERR(void) +{ + CLEAR_BIT(CRS->CR, CRS_CR_ERRIE); +} + +/** + * @brief Check if Synchronization or trimming error interrupt is enabled or not + * @rmtoll CR ERRIE LL_CRS_IsEnabledIT_ERR + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ERR(void) +{ + return ((READ_BIT(CRS->CR, CRS_CR_ERRIE) == (CRS_CR_ERRIE)) ? 1UL : 0UL); +} + +/** + * @brief Enable Expected SYNC interrupt + * @rmtoll CR ESYNCIE LL_CRS_EnableIT_ESYNC + * @retval None + */ +__STATIC_INLINE void LL_CRS_EnableIT_ESYNC(void) +{ + SET_BIT(CRS->CR, CRS_CR_ESYNCIE); +} + +/** + * @brief Disable Expected SYNC interrupt + * @rmtoll CR ESYNCIE LL_CRS_DisableIT_ESYNC + * @retval None + */ +__STATIC_INLINE void LL_CRS_DisableIT_ESYNC(void) +{ + CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); +} + +/** + * @brief Check if Expected SYNC interrupt is enabled or not + * @rmtoll CR ESYNCIE LL_CRS_IsEnabledIT_ESYNC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ESYNC(void) +{ + return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup CRS_LL_EF_Init Initialization and de-initialization functions + * @{ + */ + +ErrorStatus LL_CRS_DeInit(void); + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined(CRS) */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_LL_CRS_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h new file mode 100644 index 0000000..515b32e --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h @@ -0,0 +1,2578 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_dma.h + * @author MCD Application Team + * @brief Header file of DMA LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_LL_DMA_H +#define __STM32G4xx_LL_DMA_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" +#include "stm32g4xx_ll_dmamux.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (DMA1) || defined (DMA2) + +/** @defgroup DMA_LL DMA + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup DMA_LL_Private_Variables DMA Private Variables + * @{ + */ +/* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */ +static const uint8_t CHANNEL_OFFSET_TAB[] = +{ + (uint8_t)(DMA1_Channel1_BASE - DMA1_BASE), + (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE), + (uint8_t)(DMA1_Channel3_BASE - DMA1_BASE), + (uint8_t)(DMA1_Channel4_BASE - DMA1_BASE), + (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE), + (uint8_t)(DMA1_Channel6_BASE - DMA1_BASE) +#if defined (DMA1_Channel7) + , + (uint8_t)(DMA1_Channel7_BASE - DMA1_BASE) +#endif /* DMA1_Channel7 */ +#if defined (DMA1_Channel8) + , + (uint8_t)(DMA1_Channel8_BASE - DMA1_BASE) +#endif /* DMA1_Channel8 */ +}; +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup DMA_LL_Private_Constants DMA Private Constants + * @{ + */ +/* Define used to get CSELR register offset */ +#define DMA_CSELR_OFFSET (uint32_t)(DMA1_CSELR_BASE - DMA1_BASE) + +/* Defines used for the bit position in the register and perform offsets */ +#define DMA_POSITION_CSELR_CXS POSITION_VAL(DMA_CSELR_C1S << ((Channel-1U)*4U)) +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup DMA_LL_Private_Macros DMA Private Macros + * @{ + */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup DMA_LL_ES_INIT DMA Exported Init structure + * @{ + */ +typedef struct +{ + uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer + or as Source base address in case of memory to memory transfer direction. + + This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */ + + uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer + or as Destination base address in case of memory to memory transfer direction. + + This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */ + + uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral, + from memory to memory or from peripheral to memory. + This parameter can be a value of @ref DMA_LL_EC_DIRECTION + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataTransferDirection(). */ + + uint32_t Mode; /*!< Specifies the normal or circular operation mode. + This parameter can be a value of @ref DMA_LL_EC_MODE + @note: The circular buffer mode cannot be used if the memory to memory + data transfer direction is configured on the selected Channel + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetMode(). */ + + uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction + is incremented or not. + This parameter can be a value of @ref DMA_LL_EC_PERIPH + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphIncMode(). */ + + uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction + is incremented or not. + This parameter can be a value of @ref DMA_LL_EC_MEMORY + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryIncMode(). */ + + uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word) + in case of memory to memory transfer direction. + This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphSize(). */ + + uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word) + in case of memory to memory transfer direction. + This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemorySize(). */ + + uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit. + The data unit is equal to the source buffer configuration set in PeripheralSize + or MemorySize parameters depending in the transfer direction. + This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataLength(). */ + + uint32_t PeriphRequest; /*!< Specifies the peripheral request. + This parameter can be a value of @ref DMAMUX_LL_EC_REQUEST + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphRequest(). */ + + uint32_t Priority; /*!< Specifies the channel priority level. + This parameter can be a value of @ref DMA_LL_EC_PRIORITY + + This feature can be modified afterwards using unitary function @ref LL_DMA_SetChannelPriorityLevel(). */ + +} LL_DMA_InitTypeDef; +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup DMA_LL_Exported_Constants DMA Exported Constants + * @{ + */ +/** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_DMA_WriteReg function + * @{ + */ +#define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag */ +#define LL_DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF1 /*!< Channel 1 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF1 /*!< Channel 1 half transfer flag */ +#define LL_DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF1 /*!< Channel 1 transfer error flag */ +#define LL_DMA_IFCR_CGIF2 DMA_IFCR_CGIF2 /*!< Channel 2 global flag */ +#define LL_DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF2 /*!< Channel 2 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF2 /*!< Channel 2 half transfer flag */ +#define LL_DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF2 /*!< Channel 2 transfer error flag */ +#define LL_DMA_IFCR_CGIF3 DMA_IFCR_CGIF3 /*!< Channel 3 global flag */ +#define LL_DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF3 /*!< Channel 3 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF3 DMA_IFCR_CHTIF3 /*!< Channel 3 half transfer flag */ +#define LL_DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF3 /*!< Channel 3 transfer error flag */ +#define LL_DMA_IFCR_CGIF4 DMA_IFCR_CGIF4 /*!< Channel 4 global flag */ +#define LL_DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF4 /*!< Channel 4 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF4 /*!< Channel 4 half transfer flag */ +#define LL_DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF4 /*!< Channel 4 transfer error flag */ +#define LL_DMA_IFCR_CGIF5 DMA_IFCR_CGIF5 /*!< Channel 5 global flag */ +#define LL_DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF5 /*!< Channel 5 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF5 DMA_IFCR_CHTIF5 /*!< Channel 5 half transfer flag */ +#define LL_DMA_IFCR_CTEIF5 DMA_IFCR_CTEIF5 /*!< Channel 5 transfer error flag */ +#define LL_DMA_IFCR_CGIF6 DMA_IFCR_CGIF6 /*!< Channel 6 global flag */ +#define LL_DMA_IFCR_CTCIF6 DMA_IFCR_CTCIF6 /*!< Channel 6 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF6 DMA_IFCR_CHTIF6 /*!< Channel 6 half transfer flag */ +#define LL_DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF6 /*!< Channel 6 transfer error flag */ +#if defined (DMA1_Channel7) +#define LL_DMA_IFCR_CGIF7 DMA_IFCR_CGIF7 /*!< Channel 7 global flag */ +#define LL_DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF7 /*!< Channel 7 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF7 /*!< Channel 7 half transfer flag */ +#define LL_DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF7 /*!< Channel 7 transfer error flag */ +#endif /* DMA1_Channel7 */ +#if defined (DMA1_Channel8) +#define LL_DMA_IFCR_CGIF8 DMA_IFCR_CGIF8 /*!< Channel 8 global flag */ +#define LL_DMA_IFCR_CTCIF8 DMA_IFCR_CTCIF8 /*!< Channel 8 transfer complete flag */ +#define LL_DMA_IFCR_CHTIF8 DMA_IFCR_CHTIF8 /*!< Channel 8 half transfer flag */ +#define LL_DMA_IFCR_CTEIF8 DMA_IFCR_CTEIF8 /*!< Channel 8 transfer error flag */ +#endif /* DMA1_Channel8 */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_DMA_ReadReg function + * @{ + */ +#define LL_DMA_ISR_GIF1 DMA_ISR_GIF1 /*!< Channel 1 global flag */ +#define LL_DMA_ISR_TCIF1 DMA_ISR_TCIF1 /*!< Channel 1 transfer complete flag */ +#define LL_DMA_ISR_HTIF1 DMA_ISR_HTIF1 /*!< Channel 1 half transfer flag */ +#define LL_DMA_ISR_TEIF1 DMA_ISR_TEIF1 /*!< Channel 1 transfer error flag */ +#define LL_DMA_ISR_GIF2 DMA_ISR_GIF2 /*!< Channel 2 global flag */ +#define LL_DMA_ISR_TCIF2 DMA_ISR_TCIF2 /*!< Channel 2 transfer complete flag */ +#define LL_DMA_ISR_HTIF2 DMA_ISR_HTIF2 /*!< Channel 2 half transfer flag */ +#define LL_DMA_ISR_TEIF2 DMA_ISR_TEIF2 /*!< Channel 2 transfer error flag */ +#define LL_DMA_ISR_GIF3 DMA_ISR_GIF3 /*!< Channel 3 global flag */ +#define LL_DMA_ISR_TCIF3 DMA_ISR_TCIF3 /*!< Channel 3 transfer complete flag */ +#define LL_DMA_ISR_HTIF3 DMA_ISR_HTIF3 /*!< Channel 3 half transfer flag */ +#define LL_DMA_ISR_TEIF3 DMA_ISR_TEIF3 /*!< Channel 3 transfer error flag */ +#define LL_DMA_ISR_GIF4 DMA_ISR_GIF4 /*!< Channel 4 global flag */ +#define LL_DMA_ISR_TCIF4 DMA_ISR_TCIF4 /*!< Channel 4 transfer complete flag */ +#define LL_DMA_ISR_HTIF4 DMA_ISR_HTIF4 /*!< Channel 4 half transfer flag */ +#define LL_DMA_ISR_TEIF4 DMA_ISR_TEIF4 /*!< Channel 4 transfer error flag */ +#define LL_DMA_ISR_GIF5 DMA_ISR_GIF5 /*!< Channel 5 global flag */ +#define LL_DMA_ISR_TCIF5 DMA_ISR_TCIF5 /*!< Channel 5 transfer complete flag */ +#define LL_DMA_ISR_HTIF5 DMA_ISR_HTIF5 /*!< Channel 5 half transfer flag */ +#define LL_DMA_ISR_TEIF5 DMA_ISR_TEIF5 /*!< Channel 5 transfer error flag */ +#define LL_DMA_ISR_GIF6 DMA_ISR_GIF6 /*!< Channel 6 global flag */ +#define LL_DMA_ISR_TCIF6 DMA_ISR_TCIF6 /*!< Channel 6 transfer complete flag */ +#define LL_DMA_ISR_HTIF6 DMA_ISR_HTIF6 /*!< Channel 6 half transfer flag */ +#define LL_DMA_ISR_TEIF6 DMA_ISR_TEIF6 /*!< Channel 6 transfer error flag */ +#if defined (DMA1_Channel7) +#define LL_DMA_ISR_GIF7 DMA_ISR_GIF7 /*!< Channel 7 global flag */ +#define LL_DMA_ISR_TCIF7 DMA_ISR_TCIF7 /*!< Channel 7 transfer complete flag */ +#define LL_DMA_ISR_HTIF7 DMA_ISR_HTIF7 /*!< Channel 7 half transfer flag */ +#define LL_DMA_ISR_TEIF7 DMA_ISR_TEIF7 /*!< Channel 7 transfer error flag */ +#endif /* DMA1_Channel7 */ +#if defined (DMA1_Channel8) +#define LL_DMA_ISR_GIF8 DMA_ISR_GIF8 /*!< Channel 8 global flag */ +#define LL_DMA_ISR_TCIF8 DMA_ISR_TCIF8 /*!< Channel 8 transfer complete flag */ +#define LL_DMA_ISR_HTIF8 DMA_ISR_HTIF8 /*!< Channel 8 half transfer flag */ +#define LL_DMA_ISR_TEIF8 DMA_ISR_TEIF8 /*!< Channel 8 transfer error flag */ +#endif /* DMA1_Channel8 */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMA_WriteReg functions + * @{ + */ +#define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */ +#define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */ +#define LL_DMA_CCR_TEIE DMA_CCR_TEIE /*!< Transfer error interrupt */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_CHANNEL CHANNEL + * @{ + */ +#define LL_DMA_CHANNEL_1 0x00000000U /*!< DMA Channel 1 */ +#define LL_DMA_CHANNEL_2 0x00000001U /*!< DMA Channel 2 */ +#define LL_DMA_CHANNEL_3 0x00000002U /*!< DMA Channel 3 */ +#define LL_DMA_CHANNEL_4 0x00000003U /*!< DMA Channel 4 */ +#define LL_DMA_CHANNEL_5 0x00000004U /*!< DMA Channel 5 */ +#define LL_DMA_CHANNEL_6 0x00000005U /*!< DMA Channel 6 */ +#if defined (DMA1_Channel7) +#define LL_DMA_CHANNEL_7 0x00000006U /*!< DMA Channel 7 */ +#endif /* DMA1_Channel7 */ +#if defined (DMA1_Channel8) +#define LL_DMA_CHANNEL_8 0x00000007U /*!< DMA Channel 8 */ +#endif /* DMA1_Channel8 */ +#if defined(USE_FULL_LL_DRIVER) +#define LL_DMA_CHANNEL_ALL 0xFFFF0000U /*!< DMA Channel all (used only for function @ref LL_DMA_DeInit(). */ +#endif /*USE_FULL_LL_DRIVER*/ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_DIRECTION Transfer Direction + * @{ + */ +#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */ +#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR /*!< Memory to peripheral direction */ +#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM /*!< Memory to memory direction */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_MODE Transfer mode + * @{ + */ +#define LL_DMA_MODE_NORMAL 0x00000000U /*!< Normal Mode */ +#define LL_DMA_MODE_CIRCULAR DMA_CCR_CIRC /*!< Circular Mode */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_PERIPH Peripheral increment mode + * @{ + */ +#define LL_DMA_PERIPH_INCREMENT DMA_CCR_PINC /*!< Peripheral increment mode Enable */ +#define LL_DMA_PERIPH_NOINCREMENT 0x00000000U /*!< Peripheral increment mode Disable */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_MEMORY Memory increment mode + * @{ + */ +#define LL_DMA_MEMORY_INCREMENT DMA_CCR_MINC /*!< Memory increment mode Enable */ +#define LL_DMA_MEMORY_NOINCREMENT 0x00000000U /*!< Memory increment mode Disable */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_PDATAALIGN Peripheral data alignment + * @{ + */ +#define LL_DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment : Byte */ +#define LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /*!< Peripheral data alignment : HalfWord */ +#define LL_DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 /*!< Peripheral data alignment : Word */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_MDATAALIGN Memory data alignment + * @{ + */ +#define LL_DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : Byte */ +#define LL_DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 /*!< Memory data alignment : HalfWord */ +#define LL_DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 /*!< Memory data alignment : Word */ +/** + * @} + */ + +/** @defgroup DMA_LL_EC_PRIORITY Transfer Priority level + * @{ + */ +#define LL_DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */ +#define LL_DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 /*!< Priority level : Medium */ +#define LL_DMA_PRIORITY_HIGH DMA_CCR_PL_1 /*!< Priority level : High */ +#define LL_DMA_PRIORITY_VERYHIGH DMA_CCR_PL /*!< Priority level : Very_High */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup DMA_LL_Exported_Macros DMA Exported Macros + * @{ + */ + +/** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros + * @{ + */ +/** + * @brief Write a value in DMA register + * @param __INSTANCE__ DMA Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in DMA register + * @param __INSTANCE__ DMA Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely + * @{ + */ +/** + * @brief Convert DMAx_Channely into DMAx + * @param __CHANNEL_INSTANCE__ DMAx_Channely + * @retval DMAx + */ +#if defined (DMA1_Channel8) +#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) \ + (((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel8)) ? DMA2 : DMA1) +#else +#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) \ + (((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel6)) ? DMA2 : DMA1) +#endif /* DMA1_Channel8 */ +/** + * @brief Convert DMAx_Channely into LL_DMA_CHANNEL_y + * @param __CHANNEL_INSTANCE__ DMAx_Channely + * @retval LL_DMA_CHANNEL_y + */ +#if defined (DMA1_Channel8) +#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \ + (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel1)) ? LL_DMA_CHANNEL_1 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel2)) ? LL_DMA_CHANNEL_2 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel3)) ? LL_DMA_CHANNEL_3 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel4)) ? LL_DMA_CHANNEL_4 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel5)) ? LL_DMA_CHANNEL_5 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel6)) ? LL_DMA_CHANNEL_6 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel7)) ? LL_DMA_CHANNEL_7 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel7)) ? LL_DMA_CHANNEL_7 : \ + LL_DMA_CHANNEL_8) +#else +#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \ + (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel1)) ? LL_DMA_CHANNEL_1 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel2)) ? LL_DMA_CHANNEL_2 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel3)) ? LL_DMA_CHANNEL_3 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel4)) ? LL_DMA_CHANNEL_4 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \ + ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel5)) ? LL_DMA_CHANNEL_5 : \ + LL_DMA_CHANNEL_6) +#endif /* DMA1_Channel8 */ + +/** + * @brief Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely + * @param __DMA_INSTANCE__ DMAx + * @param __CHANNEL__ LL_DMA_CHANNEL_y + * @retval DMAx_Channely + */ +#if defined (DMA1_Channel8) +#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \ + ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA2_Channel1 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA2_Channel2 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA2_Channel3 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA2_Channel4 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA2_Channel5 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA2_Channel6 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_7))) ? DMA1_Channel7 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_7))) ? DMA2_Channel7 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_8))) ? DMA1_Channel8 : \ + DMA2_Channel8) +#else +#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \ + ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA2_Channel1 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA2_Channel2 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA2_Channel3 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA2_Channel4 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA2_Channel5 : \ + (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \ + DMA2_Channel6) +#endif /* DMA1_Channel8 */ + +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup DMA_LL_Exported_Functions DMA Exported Functions + * @{ + */ + +/** @defgroup DMA_LL_EF_Configuration Configuration + * @{ + */ +/** + * @brief Enable DMA channel. + * @rmtoll CCR EN LL_DMA_EnableChannel + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_EN); +} + +/** + * @brief Disable DMA channel. + * @rmtoll CCR EN LL_DMA_DisableChannel + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_EN); +} + +/** + * @brief Check if DMA channel is enabled or disabled. + * @rmtoll CCR EN LL_DMA_IsEnabledChannel + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return ((READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_EN) == (DMA_CCR_EN)) ? 1UL : 0UL); +} + +/** + * @brief Configure all parameters link to DMA transfer. + * @rmtoll CCR DIR LL_DMA_ConfigTransfer\n + * CCR MEM2MEM LL_DMA_ConfigTransfer\n + * CCR CIRC LL_DMA_ConfigTransfer\n + * CCR PINC LL_DMA_ConfigTransfer\n + * CCR MINC LL_DMA_ConfigTransfer\n + * CCR PSIZE LL_DMA_ConfigTransfer\n + * CCR MSIZE LL_DMA_ConfigTransfer\n + * CCR PL LL_DMA_ConfigTransfer + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param Configuration This parameter must be a combination of all the following values: + * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY + * @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR + * @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT + * @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT + * @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD + * @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD + * @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH + * @retval None + */ +__STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_PSIZE | DMA_CCR_MSIZE | DMA_CCR_PL, + Configuration); +} + +/** + * @brief Set Data transfer direction (read from peripheral or from memory). + * @rmtoll CCR DIR LL_DMA_SetDataTransferDirection\n + * CCR MEM2MEM LL_DMA_SetDataTransferDirection + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param Direction This parameter can be one of the following values: + * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY + * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH + * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction); +} + +/** + * @brief Get Data transfer direction (read from peripheral or from memory). + * @rmtoll CCR DIR LL_DMA_GetDataTransferDirection\n + * CCR MEM2MEM LL_DMA_GetDataTransferDirection + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY + * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH + * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY + */ +__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_DIR | DMA_CCR_MEM2MEM)); +} + +/** + * @brief Set DMA mode circular or normal. + * @note The circular buffer mode cannot be used if the memory-to-memory + * data transfer is configured on the selected Channel. + * @rmtoll CCR CIRC LL_DMA_SetMode + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param Mode This parameter can be one of the following values: + * @arg @ref LL_DMA_MODE_NORMAL + * @arg @ref LL_DMA_MODE_CIRCULAR + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_CIRC, + Mode); +} + +/** + * @brief Get DMA mode circular or normal. + * @rmtoll CCR CIRC LL_DMA_GetMode + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMA_MODE_NORMAL + * @arg @ref LL_DMA_MODE_CIRCULAR + */ +__STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_CIRC)); +} + +/** + * @brief Set Peripheral increment mode. + * @rmtoll CCR PINC LL_DMA_SetPeriphIncMode + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param PeriphOrM2MSrcIncMode This parameter can be one of the following values: + * @arg @ref LL_DMA_PERIPH_INCREMENT + * @arg @ref LL_DMA_PERIPH_NOINCREMENT + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_PINC, + PeriphOrM2MSrcIncMode); +} + +/** + * @brief Get Peripheral increment mode. + * @rmtoll CCR PINC LL_DMA_GetPeriphIncMode + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMA_PERIPH_INCREMENT + * @arg @ref LL_DMA_PERIPH_NOINCREMENT + */ +__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_PINC)); +} + +/** + * @brief Set Memory increment mode. + * @rmtoll CCR MINC LL_DMA_SetMemoryIncMode + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param MemoryOrM2MDstIncMode This parameter can be one of the following values: + * @arg @ref LL_DMA_MEMORY_INCREMENT + * @arg @ref LL_DMA_MEMORY_NOINCREMENT + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_MINC, + MemoryOrM2MDstIncMode); +} + +/** + * @brief Get Memory increment mode. + * @rmtoll CCR MINC LL_DMA_GetMemoryIncMode + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMA_MEMORY_INCREMENT + * @arg @ref LL_DMA_MEMORY_NOINCREMENT + */ +__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_MINC)); +} + +/** + * @brief Set Peripheral size. + * @rmtoll CCR PSIZE LL_DMA_SetPeriphSize + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param PeriphOrM2MSrcDataSize This parameter can be one of the following values: + * @arg @ref LL_DMA_PDATAALIGN_BYTE + * @arg @ref LL_DMA_PDATAALIGN_HALFWORD + * @arg @ref LL_DMA_PDATAALIGN_WORD + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_PSIZE, + PeriphOrM2MSrcDataSize); +} + +/** + * @brief Get Peripheral size. + * @rmtoll CCR PSIZE LL_DMA_GetPeriphSize + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMA_PDATAALIGN_BYTE + * @arg @ref LL_DMA_PDATAALIGN_HALFWORD + * @arg @ref LL_DMA_PDATAALIGN_WORD + */ +__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_PSIZE)); +} + +/** + * @brief Set Memory size. + * @rmtoll CCR MSIZE LL_DMA_SetMemorySize + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param MemoryOrM2MDstDataSize This parameter can be one of the following values: + * @arg @ref LL_DMA_MDATAALIGN_BYTE + * @arg @ref LL_DMA_MDATAALIGN_HALFWORD + * @arg @ref LL_DMA_MDATAALIGN_WORD + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_MSIZE, + MemoryOrM2MDstDataSize); +} + +/** + * @brief Get Memory size. + * @rmtoll CCR MSIZE LL_DMA_GetMemorySize + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMA_MDATAALIGN_BYTE + * @arg @ref LL_DMA_MDATAALIGN_HALFWORD + * @arg @ref LL_DMA_MDATAALIGN_WORD + */ +__STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_MSIZE)); +} + +/** + * @brief Set Channel priority level. + * @rmtoll CCR PL LL_DMA_SetChannelPriorityLevel + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param Priority This parameter can be one of the following values: + * @arg @ref LL_DMA_PRIORITY_LOW + * @arg @ref LL_DMA_PRIORITY_MEDIUM + * @arg @ref LL_DMA_PRIORITY_HIGH + * @arg @ref LL_DMA_PRIORITY_VERYHIGH + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_PL, + Priority); +} + +/** + * @brief Get Channel priority level. + * @rmtoll CCR PL LL_DMA_GetChannelPriorityLevel + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMA_PRIORITY_LOW + * @arg @ref LL_DMA_PRIORITY_MEDIUM + * @arg @ref LL_DMA_PRIORITY_HIGH + * @arg @ref LL_DMA_PRIORITY_VERYHIGH + */ +__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_PL)); +} + +/** + * @brief Set Number of data to transfer. + * @note This action has no effect if + * channel is enabled. + * @rmtoll CNDTR NDT LL_DMA_SetDataLength + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CNDTR, + DMA_CNDTR_NDT, NbData); +} + +/** + * @brief Get Number of data to transfer. + * @note Once the channel is enabled, the return value indicate the + * remaining bytes to be transmitted. + * @rmtoll CNDTR NDT LL_DMA_GetDataLength + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + */ +__STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CNDTR, + DMA_CNDTR_NDT)); +} + +/** + * @brief Configure the Source and Destination addresses. + * @note This API must not be called when the DMA channel is enabled. + * @note Each IP using DMA provides an API to get directly the register address (LL_PPP_DMA_GetRegAddr). + * @rmtoll CPAR PA LL_DMA_ConfigAddresses\n + * CMAR MA LL_DMA_ConfigAddresses + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + * @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + * @param Direction This parameter can be one of the following values: + * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY + * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH + * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY + * @retval None + */ +__STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress, + uint32_t DstAddress, uint32_t Direction) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + + /* Direction Memory to Periph */ + if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) + { + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, SrcAddress); + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CPAR, DstAddress); + } + /* Direction Periph to Memory and Memory to Memory */ + else + { + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CPAR, SrcAddress); + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, DstAddress); + } +} + +/** + * @brief Set the Memory address. + * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. + * @note This API must not be called when the DMA channel is enabled. + * @rmtoll CMAR MA LL_DMA_SetMemoryAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, MemoryAddress); +} + +/** + * @brief Set the Peripheral address. + * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. + * @note This API must not be called when the DMA channel is enabled. + * @rmtoll CPAR PA LL_DMA_SetPeriphAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CPAR, PeriphAddress); +} + +/** + * @brief Get Memory address. + * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. + * @rmtoll CMAR MA LL_DMA_GetMemoryAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + */ +__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR)); +} + +/** + * @brief Get Peripheral address. + * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. + * @rmtoll CPAR PA LL_DMA_GetPeriphAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + */ +__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CPAR)); +} + +/** + * @brief Set the Memory to Memory Source address. + * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. + * @note This API must not be called when the DMA channel is enabled. + * @rmtoll CPAR PA LL_DMA_SetM2MSrcAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CPAR, MemoryAddress); +} + +/** + * @brief Set the Memory to Memory Destination address. + * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. + * @note This API must not be called when the DMA channel is enabled. + * @rmtoll CMAR MA LL_DMA_SetM2MDstAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, MemoryAddress); +} + +/** + * @brief Get the Memory to Memory Source address. + * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. + * @rmtoll CPAR PA LL_DMA_GetM2MSrcAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + */ +__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CPAR)); +} + +/** + * @brief Get the Memory to Memory Destination address. + * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. + * @rmtoll CMAR MA LL_DMA_GetM2MDstAddress + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF + */ +__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR)); +} + +/** + * @brief Set DMA request for DMA instance on Channel x. + * @note Please refer to Reference Manual to get the available mapping of Request value link to Channel Selection. + * @rmtoll CSELR C1S LL_DMA_SetPeriphRequest\n + * CSELR C2S LL_DMA_SetPeriphRequest\n + * CSELR C3S LL_DMA_SetPeriphRequest\n + * CSELR C4S LL_DMA_SetPeriphRequest\n + * CSELR C5S LL_DMA_SetPeriphRequest\n + * CSELR C6S LL_DMA_SetPeriphRequest\n + * CSELR C7S LL_DMA_SetPeriphRequest + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param PeriphRequest This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_MEM2MEM + * @arg @ref LL_DMAMUX_REQ_GENERATOR0 + * @arg @ref LL_DMAMUX_REQ_GENERATOR1 + * @arg @ref LL_DMAMUX_REQ_GENERATOR2 + * @arg @ref LL_DMAMUX_REQ_GENERATOR3 + * @arg @ref LL_DMAMUX_REQ_ADC1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM6_UP + * @arg @ref LL_DMAMUX_REQ_TIM7_UP + * @arg @ref LL_DMAMUX_REQ_SPI1_RX + * @arg @ref LL_DMAMUX_REQ_SPI1_TX + * @arg @ref LL_DMAMUX_REQ_SPI2_RX + * @arg @ref LL_DMAMUX_REQ_SPI2_TX + * @arg @ref LL_DMAMUX_REQ_SPI3_RX + * @arg @ref LL_DMAMUX_REQ_SPI3_TX + * @arg @ref LL_DMAMUX_REQ_I2C1_RX + * @arg @ref LL_DMAMUX_REQ_I2C1_TX + * @arg @ref LL_DMAMUX_REQ_I2C2_RX + * @arg @ref LL_DMAMUX_REQ_I2C2_TX + * @arg @ref LL_DMAMUX_REQ_I2C3_RX + * @arg @ref LL_DMAMUX_REQ_I2C3_TX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_RX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_TX + * @arg @ref LL_DMAMUX_REQ_USART1_RX + * @arg @ref LL_DMAMUX_REQ_USART1_TX + * @arg @ref LL_DMAMUX_REQ_USART2_RX + * @arg @ref LL_DMAMUX_REQ_USART2_TX + * @arg @ref LL_DMAMUX_REQ_USART3_RX + * @arg @ref LL_DMAMUX_REQ_USART3_TX + * @arg @ref LL_DMAMUX_REQ_UART4_RX + * @arg @ref LL_DMAMUX_REQ_UART4_TX + * @arg @ref LL_DMAMUX_REQ_UART5_RX (*) + * @arg @ref LL_DMAMUX_REQ_UART5_TX (*) + * @arg @ref LL_DMAMUX_REQ_LPUART1_RX + * @arg @ref LL_DMAMUX_REQ_LPUART1_TX + * @arg @ref LL_DMAMUX_REQ_ADC2 + * @arg @ref LL_DMAMUX_REQ_ADC3 (*) + * @arg @ref LL_DMAMUX_REQ_ADC4 (*) + * @arg @ref LL_DMAMUX_REQ_ADC5 (*) + * @arg @ref LL_DMAMUX_REQ_QSPI (*) + * @arg @ref LL_DMAMUX_REQ_DAC2_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM1_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM1_UP + * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM1_COM + * @arg @ref LL_DMAMUX_REQ_TIM8_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM8_UP + * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM8_COM + * @arg @ref LL_DMAMUX_REQ_TIM2_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM2_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM3_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM4_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM4_UP + * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_UP (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM15_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM15_UP + * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM15_COM + * @arg @ref LL_DMAMUX_REQ_TIM16_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM16_UP + * @arg @ref LL_DMAMUX_REQ_TIM17_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM17_UP + * @arg @ref LL_DMAMUX_REQ_TIM20_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_UP (*) + * @arg @ref LL_DMAMUX_REQ_AES_IN + * @arg @ref LL_DMAMUX_REQ_AES_OUT + * @arg @ref LL_DMAMUX_REQ_TIM20_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_COM (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_M (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_A (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_B (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_C (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_D (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_E (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_F (*) + * @arg @ref LL_DMAMUX_REQ_DAC3_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC3_CH2 + * @arg @ref LL_DMAMUX_REQ_DAC4_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_DAC4_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_RX (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_TX (*) + * @arg @ref LL_DMAMUX_REQ_SAI1_A + * @arg @ref LL_DMAMUX_REQ_SAI1_B + * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE + * @arg @ref LL_DMAMUX_REQ_FMAC_READ + * @arg @ref LL_DMAMUX_REQ_CORDIC_WRITE + * @arg @ref LL_DMAMUX_REQ_CORDIC_READ + * @arg @ref LL_DMAMUX_REQ_UCPD1_RX + * @arg @ref LL_DMAMUX_REQ_UCPD1_TX + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphRequest) +{ + uint32_t dmamux_ccr_offset = ((((uint32_t)DMAx ^ (uint32_t)DMA1) >> 10U) * 8U); + MODIFY_REG((DMAMUX1_Channel0 + Channel + dmamux_ccr_offset)->CCR, DMAMUX_CxCR_DMAREQ_ID, PeriphRequest); +} + +/** + * @brief Get DMA request for DMA instance on Channel x. + * @rmtoll CSELR C1S LL_DMA_GetPeriphRequest\n + * CSELR C2S LL_DMA_GetPeriphRequest\n + * CSELR C3S LL_DMA_GetPeriphRequest\n + * CSELR C4S LL_DMA_GetPeriphRequest\n + * CSELR C5S LL_DMA_GetPeriphRequest\n + * CSELR C6S LL_DMA_GetPeriphRequest\n + * CSELR C7S LL_DMA_GetPeriphRequest + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_MEM2MEM + * @arg @ref LL_DMAMUX_REQ_GENERATOR0 + * @arg @ref LL_DMAMUX_REQ_GENERATOR1 + * @arg @ref LL_DMAMUX_REQ_GENERATOR2 + * @arg @ref LL_DMAMUX_REQ_GENERATOR3 + * @arg @ref LL_DMAMUX_REQ_ADC1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM6_UP + * @arg @ref LL_DMAMUX_REQ_TIM7_UP + * @arg @ref LL_DMAMUX_REQ_SPI1_RX + * @arg @ref LL_DMAMUX_REQ_SPI1_TX + * @arg @ref LL_DMAMUX_REQ_SPI2_RX + * @arg @ref LL_DMAMUX_REQ_SPI2_TX + * @arg @ref LL_DMAMUX_REQ_SPI3_RX + * @arg @ref LL_DMAMUX_REQ_SPI3_TX + * @arg @ref LL_DMAMUX_REQ_I2C1_RX + * @arg @ref LL_DMAMUX_REQ_I2C1_TX + * @arg @ref LL_DMAMUX_REQ_I2C2_RX + * @arg @ref LL_DMAMUX_REQ_I2C2_TX + * @arg @ref LL_DMAMUX_REQ_I2C3_RX + * @arg @ref LL_DMAMUX_REQ_I2C3_TX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_RX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_TX + * @arg @ref LL_DMAMUX_REQ_USART1_RX + * @arg @ref LL_DMAMUX_REQ_USART1_TX + * @arg @ref LL_DMAMUX_REQ_USART2_RX + * @arg @ref LL_DMAMUX_REQ_USART2_TX + * @arg @ref LL_DMAMUX_REQ_USART3_RX + * @arg @ref LL_DMAMUX_REQ_USART3_TX + * @arg @ref LL_DMAMUX_REQ_UART4_RX + * @arg @ref LL_DMAMUX_REQ_UART4_TX + * @arg @ref LL_DMAMUX_REQ_UART5_RX (*) + * @arg @ref LL_DMAMUX_REQ_UART5_TX (*) + * @arg @ref LL_DMAMUX_REQ_LPUART1_RX + * @arg @ref LL_DMAMUX_REQ_LPUART1_TX + * @arg @ref LL_DMAMUX_REQ_ADC2 + * @arg @ref LL_DMAMUX_REQ_ADC3 (*) + * @arg @ref LL_DMAMUX_REQ_ADC4 (*) + * @arg @ref LL_DMAMUX_REQ_ADC5 (*) + * @arg @ref LL_DMAMUX_REQ_QSPI (*) + * @arg @ref LL_DMAMUX_REQ_DAC2_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM1_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM1_UP + * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM1_COM + * @arg @ref LL_DMAMUX_REQ_TIM8_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM8_UP + * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM8_COM + * @arg @ref LL_DMAMUX_REQ_TIM2_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM2_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM3_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM4_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM4_UP + * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_UP (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM15_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM15_UP + * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM15_COM + * @arg @ref LL_DMAMUX_REQ_TIM16_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM16_UP + * @arg @ref LL_DMAMUX_REQ_TIM17_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM17_UP + * @arg @ref LL_DMAMUX_REQ_TIM20_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_UP (*) + * @arg @ref LL_DMAMUX_REQ_AES_IN + * @arg @ref LL_DMAMUX_REQ_AES_OUT + * @arg @ref LL_DMAMUX_REQ_TIM20_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_COM (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_M (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_A (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_B (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_C (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_D (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_E (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_F (*) + * @arg @ref LL_DMAMUX_REQ_DAC3_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC3_CH2 + * @arg @ref LL_DMAMUX_REQ_DAC4_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_DAC4_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_RX (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_TX (*) + * @arg @ref LL_DMAMUX_REQ_SAI1_A + * @arg @ref LL_DMAMUX_REQ_SAI1_B + * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE + * @arg @ref LL_DMAMUX_REQ_FMAC_READ + * @arg @ref LL_DMAMUX_REQ_CORDIC_WRITE + * @arg @ref LL_DMAMUX_REQ_CORDIC_READ + * @arg @ref LL_DMAMUX_REQ_UCPD1_RX + * @arg @ref LL_DMAMUX_REQ_UCPD1_TX + * (*) Not on all G4 devices + */ +__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dmamux_ccr_offset = ((((uint32_t)DMAx ^ (uint32_t)DMA1) >> 10U) * 8U); + return (READ_BIT((DMAMUX1_Channel0 + Channel + dmamux_ccr_offset)->CCR, DMAMUX_CxCR_DMAREQ_ID)); +} + +/** + * @} + */ + +/** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Get Channel 1 global interrupt flag. + * @rmtoll ISR GIF1 LL_DMA_IsActiveFlag_GI1 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 2 global interrupt flag. + * @rmtoll ISR GIF2 LL_DMA_IsActiveFlag_GI2 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 3 global interrupt flag. + * @rmtoll ISR GIF3 LL_DMA_IsActiveFlag_GI3 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 4 global interrupt flag. + * @rmtoll ISR GIF4 LL_DMA_IsActiveFlag_GI4 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 5 global interrupt flag. + * @rmtoll ISR GIF5 LL_DMA_IsActiveFlag_GI5 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 6 global interrupt flag. + * @rmtoll ISR GIF6 LL_DMA_IsActiveFlag_GI6 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6)) ? 1UL : 0UL); +} + +#if defined (DMA1_Channel7) +/** + * @brief Get Channel 7 global interrupt flag. + * @rmtoll ISR GIF7 LL_DMA_IsActiveFlag_GI7 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Get Channel 8 global interrupt flag. + * @rmtoll ISR GIF8 LL_DMA_IsActiveFlag_GI8 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI8(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF8) == (DMA_ISR_GIF8)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel8 */ + +/** + * @brief Get Channel 1 transfer complete flag. + * @rmtoll ISR TCIF1 LL_DMA_IsActiveFlag_TC1 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 2 transfer complete flag. + * @rmtoll ISR TCIF2 LL_DMA_IsActiveFlag_TC2 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 3 transfer complete flag. + * @rmtoll ISR TCIF3 LL_DMA_IsActiveFlag_TC3 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 4 transfer complete flag. + * @rmtoll ISR TCIF4 LL_DMA_IsActiveFlag_TC4 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 5 transfer complete flag. + * @rmtoll ISR TCIF5 LL_DMA_IsActiveFlag_TC5 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 6 transfer complete flag. + * @rmtoll ISR TCIF6 LL_DMA_IsActiveFlag_TC6 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6)) ? 1UL : 0UL); +} + +#if defined (DMA1_Channel7) +/** + * @brief Get Channel 7 transfer complete flag. + * @rmtoll ISR TCIF7 LL_DMA_IsActiveFlag_TC7 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Get Channel 8 transfer complete flag. + * @rmtoll ISR TCIF8 LL_DMA_IsActiveFlag_TC8 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC8(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF8) == (DMA_ISR_TCIF8)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel8 */ + +/** + * @brief Get Channel 1 half transfer flag. + * @rmtoll ISR HTIF1 LL_DMA_IsActiveFlag_HT1 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 2 half transfer flag. + * @rmtoll ISR HTIF2 LL_DMA_IsActiveFlag_HT2 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 3 half transfer flag. + * @rmtoll ISR HTIF3 LL_DMA_IsActiveFlag_HT3 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 4 half transfer flag. + * @rmtoll ISR HTIF4 LL_DMA_IsActiveFlag_HT4 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 5 half transfer flag. + * @rmtoll ISR HTIF5 LL_DMA_IsActiveFlag_HT5 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 6 half transfer flag. + * @rmtoll ISR HTIF6 LL_DMA_IsActiveFlag_HT6 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6)) ? 1UL : 0UL); +} + +#if defined (DMA1_Channel8) +/** + * @brief Get Channel 7 half transfer flag. + * @rmtoll ISR HTIF7 LL_DMA_IsActiveFlag_HT7 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Get Channel 8 half transfer flag. + * @rmtoll ISR HTIF8 LL_DMA_IsActiveFlag_HT8 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT8(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF8) == (DMA_ISR_HTIF8)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel8 */ + +/** + * @brief Get Channel 1 transfer error flag. + * @rmtoll ISR TEIF1 LL_DMA_IsActiveFlag_TE1 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 2 transfer error flag. + * @rmtoll ISR TEIF2 LL_DMA_IsActiveFlag_TE2 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 3 transfer error flag. + * @rmtoll ISR TEIF3 LL_DMA_IsActiveFlag_TE3 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 4 transfer error flag. + * @rmtoll ISR TEIF4 LL_DMA_IsActiveFlag_TE4 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 5 transfer error flag. + * @rmtoll ISR TEIF5 LL_DMA_IsActiveFlag_TE5 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5)) ? 1UL : 0UL); +} + +/** + * @brief Get Channel 6 transfer error flag. + * @rmtoll ISR TEIF6 LL_DMA_IsActiveFlag_TE6 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6)) ? 1UL : 0UL); +} + +#if defined (DMA1_Channel7) +/** + * @brief Get Channel 7 transfer error flag. + * @rmtoll ISR TEIF7 LL_DMA_IsActiveFlag_TE7 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Get Channel 8 transfer error flag. + * @rmtoll ISR TEIF8 LL_DMA_IsActiveFlag_TE8 + * @param DMAx DMAx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE8(DMA_TypeDef *DMAx) +{ + return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF8) == (DMA_ISR_TEIF8)) ? 1UL : 0UL); +} +#endif /* DMA1_Channel8 */ + +/** + * @brief Clear Channel 1 global interrupt flag. + * @note Do not Clear Channel 1 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC1, LL_DMA_ClearFlag_HT1, + LL_DMA_ClearFlag_TE1. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); +} + +/** + * @brief Clear Channel 2 global interrupt flag. + * @note Do not Clear Channel 2 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC2, LL_DMA_ClearFlag_HT2, + LL_DMA_ClearFlag_TE2. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); +} + +/** + * @brief Clear Channel 3 global interrupt flag. + * @note Do not Clear Channel 3 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC3, LL_DMA_ClearFlag_HT3, + LL_DMA_ClearFlag_TE3. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); +} + +/** + * @brief Clear Channel 4 global interrupt flag. + * @note Do not Clear Channel 4 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC4, LL_DMA_ClearFlag_HT4, + LL_DMA_ClearFlag_TE4. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); +} + +/** + * @brief Clear Channel 5 global interrupt flag. + * @note Do not Clear Channel 5 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC5, LL_DMA_ClearFlag_HT5, + LL_DMA_ClearFlag_TE5. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); +} + +/** + * @brief Clear Channel 6 global interrupt flag. + * @note Do not Clear Channel 6 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC6, LL_DMA_ClearFlag_HT6, + LL_DMA_ClearFlag_TE6. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); +} + +#if defined (DMA1_Channel7) +/** + * @brief Clear Channel 7 global interrupt flag. + * @note Do not Clear Channel 7 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC7, LL_DMA_ClearFlag_HT7, + LL_DMA_ClearFlag_TE7. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Clear Channel 8 global interrupt flag. + * @note Do not Clear Channel 8 global interrupt flag when the channel in ON. + Instead clear specific flags transfer complete, half transfer & transfer + error flag with LL_DMA_ClearFlag_TC8, LL_DMA_ClearFlag_HT8, + LL_DMA_ClearFlag_TE8. bug id 2.3.1 in Product Errata Sheet. + * @rmtoll IFCR CGIF8 LL_DMA_ClearFlag_GI8 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_GI8(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF8); +} +#endif /* DMA1_Channel8 */ + +/** + * @brief Clear Channel 1 transfer complete flag. + * @rmtoll IFCR CTCIF1 LL_DMA_ClearFlag_TC1 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); +} + +/** + * @brief Clear Channel 2 transfer complete flag. + * @rmtoll IFCR CTCIF2 LL_DMA_ClearFlag_TC2 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); +} + +/** + * @brief Clear Channel 3 transfer complete flag. + * @rmtoll IFCR CTCIF3 LL_DMA_ClearFlag_TC3 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); +} + +/** + * @brief Clear Channel 4 transfer complete flag. + * @rmtoll IFCR CTCIF4 LL_DMA_ClearFlag_TC4 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF4); +} + +/** + * @brief Clear Channel 5 transfer complete flag. + * @rmtoll IFCR CTCIF5 LL_DMA_ClearFlag_TC5 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF5); +} + +/** + * @brief Clear Channel 6 transfer complete flag. + * @rmtoll IFCR CTCIF6 LL_DMA_ClearFlag_TC6 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF6); +} + +#if defined (DMA1_Channel7) +/** + * @brief Clear Channel 7 transfer complete flag. + * @rmtoll IFCR CTCIF7 LL_DMA_ClearFlag_TC7 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF7); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Clear Channel 8 transfer complete flag. + * @rmtoll IFCR CTCIF8 LL_DMA_ClearFlag_TC8 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TC8(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF8); +} +#endif /* DMA1_Channel8 */ + +/** + * @brief Clear Channel 1 half transfer flag. + * @rmtoll IFCR CHTIF1 LL_DMA_ClearFlag_HT1 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF1); +} + +/** + * @brief Clear Channel 2 half transfer flag. + * @rmtoll IFCR CHTIF2 LL_DMA_ClearFlag_HT2 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF2); +} + +/** + * @brief Clear Channel 3 half transfer flag. + * @rmtoll IFCR CHTIF3 LL_DMA_ClearFlag_HT3 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF3); +} + +/** + * @brief Clear Channel 4 half transfer flag. + * @rmtoll IFCR CHTIF4 LL_DMA_ClearFlag_HT4 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF4); +} + +/** + * @brief Clear Channel 5 half transfer flag. + * @rmtoll IFCR CHTIF5 LL_DMA_ClearFlag_HT5 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF5); +} + +/** + * @brief Clear Channel 6 half transfer flag. + * @rmtoll IFCR CHTIF6 LL_DMA_ClearFlag_HT6 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF6); +} + +#if defined (DMA1_Channel7) +/** + * @brief Clear Channel 7 half transfer flag. + * @rmtoll IFCR CHTIF7 LL_DMA_ClearFlag_HT7 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF7); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Clear Channel 8 half transfer flag. + * @rmtoll IFCR CHTIF8 LL_DMA_ClearFlag_HT8 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_HT8(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF8); +} +#endif /* DMA1_Channel8 */ + +/** + * @brief Clear Channel 1 transfer error flag. + * @rmtoll IFCR CTEIF1 LL_DMA_ClearFlag_TE1 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF1); +} + +/** + * @brief Clear Channel 2 transfer error flag. + * @rmtoll IFCR CTEIF2 LL_DMA_ClearFlag_TE2 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF2); +} + +/** + * @brief Clear Channel 3 transfer error flag. + * @rmtoll IFCR CTEIF3 LL_DMA_ClearFlag_TE3 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF3); +} + +/** + * @brief Clear Channel 4 transfer error flag. + * @rmtoll IFCR CTEIF4 LL_DMA_ClearFlag_TE4 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF4); +} + +/** + * @brief Clear Channel 5 transfer error flag. + * @rmtoll IFCR CTEIF5 LL_DMA_ClearFlag_TE5 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF5); +} + +/** + * @brief Clear Channel 6 transfer error flag. + * @rmtoll IFCR CTEIF6 LL_DMA_ClearFlag_TE6 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF6); +} + +#if defined (DMA1_Channel7) +/** + * @brief Clear Channel 7 transfer error flag. + * @rmtoll IFCR CTEIF7 LL_DMA_ClearFlag_TE7 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF7); +} +#endif /* DMA1_Channel7 */ + +#if defined (DMA1_Channel8) +/** + * @brief Clear Channel 8 transfer error flag. + * @rmtoll IFCR CTEIF8 LL_DMA_ClearFlag_TE8 + * @param DMAx DMAx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMA_ClearFlag_TE8(DMA_TypeDef *DMAx) +{ + WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF8); +} +#endif /* DMA1_Channel8 */ + +/** + * @} + */ + +/** @defgroup DMA_LL_EF_IT_Management IT_Management + * @{ + */ +/** + * @brief Enable Transfer complete interrupt. + * @rmtoll CCR TCIE LL_DMA_EnableIT_TC + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_TCIE); +} + +/** + * @brief Enable Half transfer interrupt. + * @rmtoll CCR HTIE LL_DMA_EnableIT_HT + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_HTIE); +} + +/** + * @brief Enable Transfer error interrupt. + * @rmtoll CCR TEIE LL_DMA_EnableIT_TE + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_TEIE); +} + +/** + * @brief Disable Transfer complete interrupt. + * @rmtoll CCR TCIE LL_DMA_DisableIT_TC + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_TCIE); +} + +/** + * @brief Disable Half transfer interrupt. + * @rmtoll CCR HTIE LL_DMA_DisableIT_HT + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_HTIE); +} + +/** + * @brief Disable Transfer error interrupt. + * @rmtoll CCR TEIE LL_DMA_DisableIT_TE + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_TEIE); +} + +/** + * @brief Check if Transfer complete Interrupt is enabled. + * @rmtoll CCR TCIE LL_DMA_IsEnabledIT_TC + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return ((READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if Half transfer Interrupt is enabled. + * @rmtoll CCR HTIE LL_DMA_IsEnabledIT_HT + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return ((READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if Transfer error Interrupt is enabled. + * @rmtoll CCR TEIE LL_DMA_IsEnabledIT_TE + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) +{ + uint32_t dma_base_addr = (uint32_t)DMAx; + return ((READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, + DMA_CCR_TEIE) == (DMA_CCR_TEIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup DMA_LL_EF_Init Initialization and de-initialization functions + * @{ + */ + +uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct); +uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel); +void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct); + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* DMA1 || DMA2 */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_LL_DMA_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h new file mode 100644 index 0000000..28c640c --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h @@ -0,0 +1,2006 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_dmamux.h + * @author MCD Application Team + * @brief Header file of DMAMUX LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_LL_DMAMUX_H +#define __STM32G4xx_LL_DMAMUX_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (DMAMUX1) + +/** @defgroup DMAMUX_LL DMAMUX + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/** @defgroup DMAMUX_LL_Private_Constants DMAMUX Private Constants + * @{ + */ +/* Define used to get DMAMUX CCR register size */ +#define DMAMUX_CCR_SIZE 0x00000004U + +/* Define used to get DMAMUX RGCR register size */ +#define DMAMUX_RGCR_SIZE 0x00000004U +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup DMAMUX_LL_Private_Macros DMAMUX Private Macros + * @{ + */ +#define UNUSED(X) (void)X +/** + * @} + */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/** @defgroup DMAMUX_LL_Exported_Constants DMAMUX Exported Constants + * @{ + */ +/** @defgroup DMAMUX_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_DMAMUX_WriteReg function + * @{ + */ +#define LL_DMAMUX_CFR_CSOF0 DMAMUX_CFR_CSOF0 /*!< Synchronization Event Overrun Flag Channel 0 */ +#define LL_DMAMUX_CFR_CSOF1 DMAMUX_CFR_CSOF1 /*!< Synchronization Event Overrun Flag Channel 1 */ +#define LL_DMAMUX_CFR_CSOF2 DMAMUX_CFR_CSOF2 /*!< Synchronization Event Overrun Flag Channel 2 */ +#define LL_DMAMUX_CFR_CSOF3 DMAMUX_CFR_CSOF3 /*!< Synchronization Event Overrun Flag Channel 3 */ +#define LL_DMAMUX_CFR_CSOF4 DMAMUX_CFR_CSOF4 /*!< Synchronization Event Overrun Flag Channel 4 */ +#define LL_DMAMUX_CFR_CSOF5 DMAMUX_CFR_CSOF5 /*!< Synchronization Event Overrun Flag Channel 5 */ +#define LL_DMAMUX_CFR_CSOF6 DMAMUX_CFR_CSOF6 /*!< Synchronization Event Overrun Flag Channel 6 */ +#define LL_DMAMUX_CFR_CSOF7 DMAMUX_CFR_CSOF7 /*!< Synchronization Event Overrun Flag Channel 7 */ +#define LL_DMAMUX_CFR_CSOF8 DMAMUX_CFR_CSOF8 /*!< Synchronization Event Overrun Flag Channel 8 */ +#define LL_DMAMUX_CFR_CSOF9 DMAMUX_CFR_CSOF9 /*!< Synchronization Event Overrun Flag Channel 9 */ +#define LL_DMAMUX_CFR_CSOF10 DMAMUX_CFR_CSOF10 /*!< Synchronization Event Overrun Flag Channel 10 */ +#define LL_DMAMUX_CFR_CSOF11 DMAMUX_CFR_CSOF11 /*!< Synchronization Event Overrun Flag Channel 11 */ +#define LL_DMAMUX_CFR_CSOF12 DMAMUX_CFR_CSOF12 /*!< Synchronization Event Overrun Flag Channel 12 */ +#define LL_DMAMUX_CFR_CSOF13 DMAMUX_CFR_CSOF13 /*!< Synchronization Event Overrun Flag Channel 13 */ +#define LL_DMAMUX_CFR_CSOF14 DMAMUX_CFR_CSOF14 /*!< Synchronization Event Overrun Flag Channel 14 */ +#define LL_DMAMUX_CFR_CSOF15 DMAMUX_CFR_CSOF15 /*!< Synchronization Event Overrun Flag Channel 15 */ +#define LL_DMAMUX_RGCFR_RGCOF0 DMAMUX_RGCFR_COF0 /*!< Request Generator 0 Trigger Event Overrun Flag */ +#define LL_DMAMUX_RGCFR_RGCOF1 DMAMUX_RGCFR_COF1 /*!< Request Generator 1 Trigger Event Overrun Flag */ +#define LL_DMAMUX_RGCFR_RGCOF2 DMAMUX_RGCFR_COF2 /*!< Request Generator 2 Trigger Event Overrun Flag */ +#define LL_DMAMUX_RGCFR_RGCOF3 DMAMUX_RGCFR_COF3 /*!< Request Generator 3 Trigger Event Overrun Flag */ +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_DMAMUX_ReadReg function + * @{ + */ +#define LL_DMAMUX_CSR_SOF0 DMAMUX_CSR_SOF0 /*!< Synchronization Event Overrun Flag Channel 0 */ +#define LL_DMAMUX_CSR_SOF1 DMAMUX_CSR_SOF1 /*!< Synchronization Event Overrun Flag Channel 1 */ +#define LL_DMAMUX_CSR_SOF2 DMAMUX_CSR_SOF2 /*!< Synchronization Event Overrun Flag Channel 2 */ +#define LL_DMAMUX_CSR_SOF3 DMAMUX_CSR_SOF3 /*!< Synchronization Event Overrun Flag Channel 3 */ +#define LL_DMAMUX_CSR_SOF4 DMAMUX_CSR_SOF4 /*!< Synchronization Event Overrun Flag Channel 4 */ +#define LL_DMAMUX_CSR_SOF5 DMAMUX_CSR_SOF5 /*!< Synchronization Event Overrun Flag Channel 5 */ +#define LL_DMAMUX_CSR_SOF6 DMAMUX_CSR_SOF6 /*!< Synchronization Event Overrun Flag Channel 6 */ +#define LL_DMAMUX_CSR_SOF7 DMAMUX_CSR_SOF7 /*!< Synchronization Event Overrun Flag Channel 7 */ +#define LL_DMAMUX_CSR_SOF8 DMAMUX_CSR_SOF8 /*!< Synchronization Event Overrun Flag Channel 8 */ +#define LL_DMAMUX_CSR_SOF9 DMAMUX_CSR_SOF9 /*!< Synchronization Event Overrun Flag Channel 9 */ +#define LL_DMAMUX_CSR_SOF10 DMAMUX_CSR_SOF10 /*!< Synchronization Event Overrun Flag Channel 10 */ +#define LL_DMAMUX_CSR_SOF11 DMAMUX_CSR_SOF11 /*!< Synchronization Event Overrun Flag Channel 11 */ +#define LL_DMAMUX_CSR_SOF12 DMAMUX_CSR_SOF12 /*!< Synchronization Event Overrun Flag Channel 12 */ +#define LL_DMAMUX_CSR_SOF13 DMAMUX_CSR_SOF13 /*!< Synchronization Event Overrun Flag Channel 13 */ +#define LL_DMAMUX_CSR_SOF14 DMAMUX_CSR_SOF14 /*!< Synchronization Event Overrun Flag Channel 14 */ +#define LL_DMAMUX_CSR_SOF15 DMAMUX_CSR_SOF15 /*!< Synchronization Event Overrun Flag Channel 15 */ +#define LL_DMAMUX_RGSR_RGOF0 DMAMUX_RGSR_OF0 /*!< Request Generator 0 Trigger Event Overrun Flag */ +#define LL_DMAMUX_RGSR_RGOF1 DMAMUX_RGSR_OF1 /*!< Request Generator 1 Trigger Event Overrun Flag */ +#define LL_DMAMUX_RGSR_RGOF2 DMAMUX_RGSR_OF2 /*!< Request Generator 2 Trigger Event Overrun Flag */ +#define LL_DMAMUX_RGSR_RGOF3 DMAMUX_RGSR_OF3 /*!< Request Generator 3 Trigger Event Overrun Flag */ +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMAMUX_WriteReg functions + * @{ + */ +#define LL_DMAMUX_CCR_SOIE DMAMUX_CxCR_SOIE /*!< Synchronization Event Overrun Interrupt */ +#define LL_DMAMUX_RGCR_RGOIE DMAMUX_RGxCR_OIE /*!< Request Generation Trigger Event Overrun Interrupt */ +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_REQUEST Transfer request + * @{ + */ +#define LL_DMAMUX_REQ_MEM2MEM 0x00000000U /*!< Memory to memory transfer */ +#define LL_DMAMUX_REQ_GENERATOR0 0x00000001U /*!< DMAMUX request generator 0 */ +#define LL_DMAMUX_REQ_GENERATOR1 0x00000002U /*!< DMAMUX request generator 1 */ +#define LL_DMAMUX_REQ_GENERATOR2 0x00000003U /*!< DMAMUX request generator 2 */ +#define LL_DMAMUX_REQ_GENERATOR3 0x00000004U /*!< DMAMUX request generator 3 */ +#define LL_DMAMUX_REQ_ADC1 0x00000005U /*!< DMAMUX ADC1 request */ +#define LL_DMAMUX_REQ_DAC1_CH1 0x00000006U /*!< DMAMUX DAC1 CH1 request */ +#define LL_DMAMUX_REQ_DAC1_CH2 0x00000007U /*!< DMAMUX DAC1 CH2 request */ +#define LL_DMAMUX_REQ_TIM6_UP 0x00000008U /*!< DMAMUX TIM6 UP request */ +#define LL_DMAMUX_REQ_TIM7_UP 0x00000009U /*!< DMAMUX TIM7 UP request */ +#define LL_DMAMUX_REQ_SPI1_RX 0x0000000AU /*!< DMAMUX SPI1 RX request */ +#define LL_DMAMUX_REQ_SPI1_TX 0x0000000BU /*!< DMAMUX SPI1 TX request */ +#define LL_DMAMUX_REQ_SPI2_RX 0x0000000CU /*!< DMAMUX SPI2 RX request */ +#define LL_DMAMUX_REQ_SPI2_TX 0x0000000DU /*!< DMAMUX SPI2 TX request */ +#define LL_DMAMUX_REQ_SPI3_RX 0x0000000EU /*!< DMAMUX SPI3 RX request */ +#define LL_DMAMUX_REQ_SPI3_TX 0x0000000FU /*!< DMAMUX SPI3 TX request */ +#define LL_DMAMUX_REQ_I2C1_RX 0x00000010U /*!< DMAMUX I2C1 RX request */ +#define LL_DMAMUX_REQ_I2C1_TX 0x00000011U /*!< DMAMUX I2C1 TX request */ +#define LL_DMAMUX_REQ_I2C2_RX 0x00000012U /*!< DMAMUX I2C2 RX request */ +#define LL_DMAMUX_REQ_I2C2_TX 0x00000013U /*!< DMAMUX I2C2 TX request */ +#define LL_DMAMUX_REQ_I2C3_RX 0x00000014U /*!< DMAMUX I2C3 RX request */ +#define LL_DMAMUX_REQ_I2C3_TX 0x00000015U /*!< DMAMUX I2C3 TX request */ +#define LL_DMAMUX_REQ_I2C4_RX 0x00000016U /*!< DMAMUX I2C4 RX request */ +#define LL_DMAMUX_REQ_I2C4_TX 0x00000017U /*!< DMAMUX I2C4 TX request */ +#define LL_DMAMUX_REQ_USART1_RX 0x00000018U /*!< DMAMUX USART1 RX request */ +#define LL_DMAMUX_REQ_USART1_TX 0x00000019U /*!< DMAMUX USART1 TX request */ +#define LL_DMAMUX_REQ_USART2_RX 0x0000001AU /*!< DMAMUX USART2 RX request */ +#define LL_DMAMUX_REQ_USART2_TX 0x0000001BU /*!< DMAMUX USART2 TX request */ +#define LL_DMAMUX_REQ_USART3_RX 0x0000001CU /*!< DMAMUX USART3 RX request */ +#define LL_DMAMUX_REQ_USART3_TX 0x0000001DU /*!< DMAMUX USART3 TX request */ +#define LL_DMAMUX_REQ_UART4_RX 0x0000001EU /*!< DMAMUX UART4 RX request */ +#define LL_DMAMUX_REQ_UART4_TX 0x0000001FU /*!< DMAMUX UART4 TX request */ +#define LL_DMAMUX_REQ_UART5_RX 0x00000020U /*!< DMAMUX UART5 RX request */ +#define LL_DMAMUX_REQ_UART5_TX 0x00000021U /*!< DMAMUX UART5 TX request */ +#define LL_DMAMUX_REQ_LPUART1_RX 0x00000022U /*!< DMAMUX LPUART1 RX request */ +#define LL_DMAMUX_REQ_LPUART1_TX 0x00000023U /*!< DMAMUX LPUART1 TX request */ +#define LL_DMAMUX_REQ_ADC2 0x00000024U /*!< DMAMUX ADC2 request */ +#define LL_DMAMUX_REQ_ADC3 0x00000025U /*!< DMAMUX ADC3 request */ +#define LL_DMAMUX_REQ_ADC4 0x00000026U /*!< DMAMUX ADC4 request */ +#define LL_DMAMUX_REQ_ADC5 0x00000027U /*!< DMAMUX ADC5 request */ +#define LL_DMAMUX_REQ_QSPI 0x00000028U /*!< DMAMUX QSPI request */ +#define LL_DMAMUX_REQ_DAC2_CH1 0x00000029U /*!< DMAMUX DAC2 CH1 request */ +#define LL_DMAMUX_REQ_TIM1_CH1 0x0000002AU /*!< DMAMUX TIM1 CH1 request */ +#define LL_DMAMUX_REQ_TIM1_CH2 0x0000002BU /*!< DMAMUX TIM1 CH2 request */ +#define LL_DMAMUX_REQ_TIM1_CH3 0x0000002CU /*!< DMAMUX TIM1 CH3 request */ +#define LL_DMAMUX_REQ_TIM1_CH4 0x0000002DU /*!< DMAMUX TIM1 CH4 request */ +#define LL_DMAMUX_REQ_TIM1_UP 0x0000002EU /*!< DMAMUX TIM1 UP request */ +#define LL_DMAMUX_REQ_TIM1_TRIG 0x0000002FU /*!< DMAMUX TIM1 TRIG request */ +#define LL_DMAMUX_REQ_TIM1_COM 0x00000030U /*!< DMAMUX TIM1 COM request */ +#define LL_DMAMUX_REQ_TIM8_CH1 0x00000031U /*!< DMAMUX TIM8 CH1 request */ +#define LL_DMAMUX_REQ_TIM8_CH2 0x00000032U /*!< DMAMUX TIM8 CH2 request */ +#define LL_DMAMUX_REQ_TIM8_CH3 0x00000033U /*!< DMAMUX TIM8 CH3 request */ +#define LL_DMAMUX_REQ_TIM8_CH4 0x00000034U /*!< DMAMUX TIM8 CH4 request */ +#define LL_DMAMUX_REQ_TIM8_UP 0x00000035U /*!< DMAMUX TIM8 UP request */ +#define LL_DMAMUX_REQ_TIM8_TRIG 0x00000036U /*!< DMAMUX TIM8 TRIG request */ +#define LL_DMAMUX_REQ_TIM8_COM 0x00000037U /*!< DMAMUX TIM8 COM request */ +#define LL_DMAMUX_REQ_TIM2_CH1 0x00000038U /*!< DMAMUX TIM2 CH1 request */ +#define LL_DMAMUX_REQ_TIM2_CH2 0x00000039U /*!< DMAMUX TIM2 CH2 request */ +#define LL_DMAMUX_REQ_TIM2_CH3 0x0000003AU /*!< DMAMUX TIM2 CH3 request */ +#define LL_DMAMUX_REQ_TIM2_CH4 0x0000003BU /*!< DMAMUX TIM2 CH4 request */ +#define LL_DMAMUX_REQ_TIM2_UP 0x0000003CU /*!< DMAMUX TIM2 UP request */ +#define LL_DMAMUX_REQ_TIM3_CH1 0x0000003DU /*!< DMAMUX TIM3 CH1 request */ +#define LL_DMAMUX_REQ_TIM3_CH2 0x0000003EU /*!< DMAMUX TIM3 CH2 request */ +#define LL_DMAMUX_REQ_TIM3_CH3 0x0000003FU /*!< DMAMUX TIM3 CH3 request */ +#define LL_DMAMUX_REQ_TIM3_CH4 0x00000040U /*!< DMAMUX TIM3 CH4 request */ +#define LL_DMAMUX_REQ_TIM3_UP 0x00000041U /*!< DMAMUX TIM3 UP request */ +#define LL_DMAMUX_REQ_TIM3_TRIG 0x00000042U /*!< DMAMUX TIM3 TRIG request */ +#define LL_DMAMUX_REQ_TIM4_CH1 0x00000043U /*!< DMAMUX TIM4 CH1 request */ +#define LL_DMAMUX_REQ_TIM4_CH2 0x00000044U /*!< DMAMUX TIM4 CH2 request */ +#define LL_DMAMUX_REQ_TIM4_CH3 0x00000045U /*!< DMAMUX TIM4 CH3 request */ +#define LL_DMAMUX_REQ_TIM4_CH4 0x00000046U /*!< DMAMUX TIM4 CH4 request */ +#define LL_DMAMUX_REQ_TIM4_UP 0x00000047U /*!< DMAMUX TIM4 UP request */ +#define LL_DMAMUX_REQ_TIM5_CH1 0x00000048U /*!< DMAMUX TIM5 CH1 request */ +#define LL_DMAMUX_REQ_TIM5_CH2 0x00000049U /*!< DMAMUX TIM5 CH2 request */ +#define LL_DMAMUX_REQ_TIM5_CH3 0x0000004AU /*!< DMAMUX TIM5 CH3 request */ +#define LL_DMAMUX_REQ_TIM5_CH4 0x0000004BU /*!< DMAMUX TIM5 CH4 request */ +#define LL_DMAMUX_REQ_TIM5_UP 0x0000004CU /*!< DMAMUX TIM5 UP request */ +#define LL_DMAMUX_REQ_TIM5_TRIG 0x0000004DU /*!< DMAMUX TIM5 TRIG request */ +#define LL_DMAMUX_REQ_TIM15_CH1 0x0000004EU /*!< DMAMUX TIM15 CH1 request */ +#define LL_DMAMUX_REQ_TIM15_UP 0x0000004FU /*!< DMAMUX TIM15 UP request */ +#define LL_DMAMUX_REQ_TIM15_TRIG 0x00000050U /*!< DMAMUX TIM15 TRIG request */ +#define LL_DMAMUX_REQ_TIM15_COM 0x00000051U /*!< DMAMUX TIM15 COM request */ +#define LL_DMAMUX_REQ_TIM16_CH1 0x00000052U /*!< DMAMUX TIM16 CH1 request */ +#define LL_DMAMUX_REQ_TIM16_UP 0x00000053U /*!< DMAMUX TIM16 UP request */ +#define LL_DMAMUX_REQ_TIM17_CH1 0x00000054U /*!< DMAMUX TIM17 CH1 request */ +#define LL_DMAMUX_REQ_TIM17_UP 0x00000055U /*!< DMAMUX TIM17 UP request */ +#define LL_DMAMUX_REQ_TIM20_CH1 0x00000056U /*!< DMAMUX TIM20 CH1 request */ +#define LL_DMAMUX_REQ_TIM20_CH2 0x00000057U /*!< DMAMUX TIM20 CH2 request */ +#define LL_DMAMUX_REQ_TIM20_CH3 0x00000058U /*!< DMAMUX TIM20 CH3 request */ +#define LL_DMAMUX_REQ_TIM20_CH4 0x00000059U /*!< DMAMUX TIM20 CH4 request */ +#define LL_DMAMUX_REQ_TIM20_UP 0x0000005AU /*!< DMAMUX TIM20 UP request */ +#define LL_DMAMUX_REQ_AES_IN 0x0000005BU /*!< DMAMUX AES_IN request */ +#define LL_DMAMUX_REQ_AES_OUT 0x0000005CU /*!< DMAMUX AES_OUT request */ +#define LL_DMAMUX_REQ_TIM20_TRIG 0x0000005DU /*!< DMAMUX TIM20 TRIG request */ +#define LL_DMAMUX_REQ_TIM20_COM 0x0000005EU /*!< DMAMUX TIM20 COM request */ +#define LL_DMAMUX_REQ_HRTIM1_M 0x0000005FU /*!< DMAMUX HRTIM M request */ +#define LL_DMAMUX_REQ_HRTIM1_A 0x00000060U /*!< DMAMUX HRTIM A request */ +#define LL_DMAMUX_REQ_HRTIM1_B 0x00000061U /*!< DMAMUX HRTIM B request */ +#define LL_DMAMUX_REQ_HRTIM1_C 0x00000062U /*!< DMAMUX HRTIM C request */ +#define LL_DMAMUX_REQ_HRTIM1_D 0x00000063U /*!< DMAMUX HRTIM D request */ +#define LL_DMAMUX_REQ_HRTIM1_E 0x00000064U /*!< DMAMUX HRTIM E request */ +#define LL_DMAMUX_REQ_HRTIM1_F 0x00000065U /*!< DMAMUX HRTIM F request */ +#define LL_DMAMUX_REQ_DAC3_CH1 0x00000066U /*!< DMAMUX DAC3 CH1 request */ +#define LL_DMAMUX_REQ_DAC3_CH2 0x00000067U /*!< DMAMUX DAC3 CH2 request */ +#define LL_DMAMUX_REQ_DAC4_CH1 0x00000068U /*!< DMAMUX DAC4 CH1 request */ +#define LL_DMAMUX_REQ_DAC4_CH2 0x00000069U /*!< DMAMUX DAC4 CH2 request */ +#define LL_DMAMUX_REQ_SPI4_RX 0x0000006AU /*!< DMAMUX SPI4 RX request */ +#define LL_DMAMUX_REQ_SPI4_TX 0x0000006BU /*!< DMAMUX SPI4 TX request */ +#define LL_DMAMUX_REQ_SAI1_A 0x0000006CU /*!< DMAMUX SAI1 A request */ +#define LL_DMAMUX_REQ_SAI1_B 0x0000006DU /*!< DMAMUX SAI1 B request */ +#define LL_DMAMUX_REQ_FMAC_READ 0x0000006EU /*!< DMAMUX FMAC READ request */ +#define LL_DMAMUX_REQ_FMAC_WRITE 0x0000006FU /*!< DMAMUX FMAC WRITE request */ +#define LL_DMAMUX_REQ_CORDIC_READ 0x00000070U /*!< DMAMUX CORDIC READ request */ +#define LL_DMAMUX_REQ_CORDIC_WRITE 0x00000071U /*!< DMAMUX CORDIC WRITE request*/ +#define LL_DMAMUX_REQ_UCPD1_RX 0x00000072U /*!< DMAMUX USBPD1_RX request */ +#define LL_DMAMUX_REQ_UCPD1_TX 0x00000073U /*!< DMAMUX USBPD1_TX request */ + +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_CHANNEL DMAMUX Channel + * @{ + */ +#define LL_DMAMUX_CHANNEL_0 0x00000000U /*!< DMAMUX Channel 0 connected to DMA1 Channel 1 */ +#define LL_DMAMUX_CHANNEL_1 0x00000001U /*!< DMAMUX Channel 1 connected to DMA1 Channel 2 */ +#define LL_DMAMUX_CHANNEL_2 0x00000002U /*!< DMAMUX Channel 2 connected to DMA1 Channel 3 */ +#define LL_DMAMUX_CHANNEL_3 0x00000003U /*!< DMAMUX Channel 3 connected to DMA1 Channel 4 */ +#define LL_DMAMUX_CHANNEL_4 0x00000004U /*!< DMAMUX Channel 4 connected to DMA1 Channel 5 */ +#define LL_DMAMUX_CHANNEL_5 0x00000005U /*!< DMAMUX Channel 5 connected to DMA1 Channel 6 */ +#define LL_DMAMUX_CHANNEL_6 0x00000006U /*!< DMAMUX Channel 6 connected to DMA1 Channel 7 */ +#define LL_DMAMUX_CHANNEL_7 0x00000007U /*!< DMAMUX Channel 7 connected to DMA1 Channel 8 */ +#define LL_DMAMUX_CHANNEL_8 0x00000008U /*!< DMAMUX Channel 8 connected to DMA2 Channel 1 */ +#define LL_DMAMUX_CHANNEL_9 0x00000009U /*!< DMAMUX Channel 9 connected to DMA2 Channel 2 */ +#define LL_DMAMUX_CHANNEL_10 0x0000000AU /*!< DMAMUX Channel 10 connected to DMA2 Channel 3 */ +#define LL_DMAMUX_CHANNEL_11 0x0000000BU /*!< DMAMUX Channel 11 connected to DMA2 Channel 4 */ +#define LL_DMAMUX_CHANNEL_12 0x0000000CU /*!< DMAMUX Channel 12 connected to DMA2 Channel 5 */ +#define LL_DMAMUX_CHANNEL_13 0x0000000DU /*!< DMAMUX Channel 13 connected to DMA2 Channel 6 */ +#define LL_DMAMUX_CHANNEL_14 0x0000000EU /*!< DMAMUX Channel 14 connected to DMA2 Channel 7 */ +#define LL_DMAMUX_CHANNEL_15 0x0000000FU /*!< DMAMUX Channel 15 connected to DMA2 Channel 8 */ +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_SYNC_NO Synchronization Signal Polarity + * @{ + */ +#define LL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< All requests are blocked */ +#define LL_DMAMUX_SYNC_POL_RISING DMAMUX_CxCR_SPOL_0 /*!< Synchronization on event on rising edge */ +#define LL_DMAMUX_SYNC_POL_FALLING DMAMUX_CxCR_SPOL_1 /*!< Synchronization on event on falling edge */ +#define LL_DMAMUX_SYNC_POL_RISING_FALLING (DMAMUX_CxCR_SPOL_0 | DMAMUX_CxCR_SPOL_1) /*!< Synchronization on event on rising and falling edge */ +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_SYNC_EVT Synchronization Signal Event + * @{ + */ +#define LL_DMAMUX_SYNC_EXTI_LINE0 0x00000000U /*!< Synchronization signal from EXTI Line0 */ +#define LL_DMAMUX_SYNC_EXTI_LINE1 DMAMUX_CxCR_SYNC_ID_0 /*!< Synchronization signal from EXTI Line1 */ +#define LL_DMAMUX_SYNC_EXTI_LINE2 DMAMUX_CxCR_SYNC_ID_1 /*!< Synchronization signal from EXTI Line2 */ +#define LL_DMAMUX_SYNC_EXTI_LINE3 (DMAMUX_CxCR_SYNC_ID_1 |DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line3 */ +#define LL_DMAMUX_SYNC_EXTI_LINE4 DMAMUX_CxCR_SYNC_ID_2 /*!< Synchronization signal from EXTI Line4 */ +#define LL_DMAMUX_SYNC_EXTI_LINE5 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line5 */ +#define LL_DMAMUX_SYNC_EXTI_LINE6 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line6 */ +#define LL_DMAMUX_SYNC_EXTI_LINE7 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line7 */ +#define LL_DMAMUX_SYNC_EXTI_LINE8 DMAMUX_CxCR_SYNC_ID_3 /*!< Synchronization signal from EXTI Line8 */ +#define LL_DMAMUX_SYNC_EXTI_LINE9 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line9 */ +#define LL_DMAMUX_SYNC_EXTI_LINE10 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line10 */ +#define LL_DMAMUX_SYNC_EXTI_LINE11 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line11 */ +#define LL_DMAMUX_SYNC_EXTI_LINE12 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from EXTI Line12 */ +#define LL_DMAMUX_SYNC_EXTI_LINE13 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line13 */ +#define LL_DMAMUX_SYNC_EXTI_LINE14 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line14 */ +#define LL_DMAMUX_SYNC_EXTI_LINE15 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line15 */ +#define LL_DMAMUX_SYNC_DMAMUX_CH0 DMAMUX_CxCR_SYNC_ID_4 /*!< Synchronization signal from DMAMUX channel0 Event */ +#define LL_DMAMUX_SYNC_DMAMUX_CH1 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel1 Event */ +#define LL_DMAMUX_SYNC_DMAMUX_CH2 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DMAMUX channel2 Event */ +#define LL_DMAMUX_SYNC_DMAMUX_CH3 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel3 Event */ +#define LL_DMAMUX_SYNC_LPTIM1_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from LPTIM1 Output */ +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_REQUEST_GENERATOR Request Generator Channel + * @{ + */ +#define LL_DMAMUX_REQ_GEN_0 0x00000000U +#define LL_DMAMUX_REQ_GEN_1 0x00000001U +#define LL_DMAMUX_REQ_GEN_2 0x00000002U +#define LL_DMAMUX_REQ_GEN_3 0x00000003U +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_REQUEST_GEN_POLARITY External Request Signal Generation Polarity + * @{ + */ +#define LL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< No external DMA request generation */ +#define LL_DMAMUX_REQ_GEN_POL_RISING DMAMUX_RGxCR_GPOL_0 /*!< External DMA request generation on event on rising edge */ +#define LL_DMAMUX_REQ_GEN_POL_FALLING DMAMUX_RGxCR_GPOL_1 /*!< External DMA request generation on event on falling edge */ +#define LL_DMAMUX_REQ_GEN_POL_RISING_FALLING (DMAMUX_RGxCR_GPOL_0 | DMAMUX_RGxCR_GPOL_1) /*!< External DMA request generation on rising and falling edge */ +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EC_REQUEST_GEN External Request Signal Generation + * @{ + */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE0 0x00000000U /*!< Request signal generation from EXTI Line0 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE1 DMAMUX_RGxCR_SIG_ID_0 /*!< Request signal generation from EXTI Line1 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE2 DMAMUX_RGxCR_SIG_ID_1 /*!< Request signal generation from EXTI Line2 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE3 (DMAMUX_RGxCR_SIG_ID_1 |DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line3 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE4 DMAMUX_RGxCR_SIG_ID_2 /*!< Request signal generation from EXTI Line4 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE5 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line5 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE6 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line6 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE7 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line7 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE8 DMAMUX_RGxCR_SIG_ID_3 /*!< Request signal generation from EXTI Line8 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE9 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line9 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE10 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line10 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE11 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line11 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE12 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from EXTI Line12 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE13 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line13 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE14 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line14 */ +#define LL_DMAMUX_REQ_GEN_EXTI_LINE15 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line15 */ +#define LL_DMAMUX_REQ_GEN_DMAMUX_CH0 DMAMUX_RGxCR_SIG_ID_4 /*!< Request signal generation from DMAMUX channel0 Event */ +#define LL_DMAMUX_REQ_GEN_DMAMUX_CH1 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel1 Event */ +#define LL_DMAMUX_REQ_GEN_DMAMUX_CH2 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DMAMUX channel2 Event */ +#define LL_DMAMUX_REQ_GEN_DMAMUX_CH3 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel3 Event */ +#define LL_DMAMUX_REQ_GEN_LPTIM1_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from LPTIM1 Output */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup DMAMUX_LL_Exported_Macros DMAMUX Exported Macros + * @{ + */ +/** @defgroup DMAMUX_LL_EM_WRITE_READ Common Write and read registers macros + * @{ + */ +/** + * @brief Write a value in DMAMUX register + * @param __INSTANCE__ DMAMUX Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_DMAMUX_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in DMAMUX register + * @param __INSTANCE__ DMAMUX Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_DMAMUX_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup DMAMUX_LL_Exported_Functions DMAMUX Exported Functions + * @{ + */ + +/** @defgroup DMAMUX_LL_EF_Configuration Configuration + * @{ + */ +/** + * @brief Set DMAMUX request ID for DMAMUX Channel x. + * @note DMAMUX channel 0 to 7 are mapped to DMA1 channel 1 to 8. + * DMAMUX channel 8 to 15 are mapped to DMA2 channel 1 to 8. + * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_SetRequestID + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @param Request This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_MEM2MEM + * @arg @ref LL_DMAMUX_REQ_GENERATOR0 + * @arg @ref LL_DMAMUX_REQ_GENERATOR1 + * @arg @ref LL_DMAMUX_REQ_GENERATOR2 + * @arg @ref LL_DMAMUX_REQ_GENERATOR3 + * @arg @ref LL_DMAMUX_REQ_ADC1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM6_UP + * @arg @ref LL_DMAMUX_REQ_TIM7_UP + * @arg @ref LL_DMAMUX_REQ_SPI1_RX + * @arg @ref LL_DMAMUX_REQ_SPI1_TX + * @arg @ref LL_DMAMUX_REQ_SPI2_RX + * @arg @ref LL_DMAMUX_REQ_SPI2_TX + * @arg @ref LL_DMAMUX_REQ_SPI3_RX + * @arg @ref LL_DMAMUX_REQ_SPI3_TX + * @arg @ref LL_DMAMUX_REQ_I2C1_RX + * @arg @ref LL_DMAMUX_REQ_I2C1_TX + * @arg @ref LL_DMAMUX_REQ_I2C2_RX + * @arg @ref LL_DMAMUX_REQ_I2C2_TX + * @arg @ref LL_DMAMUX_REQ_I2C3_RX + * @arg @ref LL_DMAMUX_REQ_I2C3_TX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_RX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_TX + * @arg @ref LL_DMAMUX_REQ_USART1_RX + * @arg @ref LL_DMAMUX_REQ_USART1_TX + * @arg @ref LL_DMAMUX_REQ_USART2_RX + * @arg @ref LL_DMAMUX_REQ_USART2_TX + * @arg @ref LL_DMAMUX_REQ_USART3_RX + * @arg @ref LL_DMAMUX_REQ_USART3_TX + * @arg @ref LL_DMAMUX_REQ_UART4_RX + * @arg @ref LL_DMAMUX_REQ_UART4_TX + * @arg @ref LL_DMAMUX_REQ_UART5_RX (*) + * @arg @ref LL_DMAMUX_REQ_UART5_TX (*) + * @arg @ref LL_DMAMUX_REQ_LPUART1_RX + * @arg @ref LL_DMAMUX_REQ_LPUART1_TX + * @arg @ref LL_DMAMUX_REQ_ADC2 + * @arg @ref LL_DMAMUX_REQ_ADC3 (*) + * @arg @ref LL_DMAMUX_REQ_ADC4 (*) + * @arg @ref LL_DMAMUX_REQ_ADC5 (*) + * @arg @ref LL_DMAMUX_REQ_QSPI (*) + * @arg @ref LL_DMAMUX_REQ_DAC2_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM1_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM1_UP + * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM1_COM + * @arg @ref LL_DMAMUX_REQ_TIM8_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM8_UP + * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM8_COM + * @arg @ref LL_DMAMUX_REQ_TIM2_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM2_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM3_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM4_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM4_UP + * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_UP (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM15_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM15_UP + * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM15_COM + * @arg @ref LL_DMAMUX_REQ_TIM16_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM16_UP + * @arg @ref LL_DMAMUX_REQ_TIM17_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM17_UP + * @arg @ref LL_DMAMUX_REQ_TIM20_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_UP (*) + * @arg @ref LL_DMAMUX_REQ_AES_IN + * @arg @ref LL_DMAMUX_REQ_AES_OUT + * @arg @ref LL_DMAMUX_REQ_TIM20_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_COM (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_M (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_A (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_B (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_C (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_D (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_E (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_F (*) + * @arg @ref LL_DMAMUX_REQ_DAC3_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC3_CH2 + * @arg @ref LL_DMAMUX_REQ_DAC4_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_DAC4_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_RX (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_TX (*) + * @arg @ref LL_DMAMUX_REQ_SAI1_A + * @arg @ref LL_DMAMUX_REQ_SAI1_B + * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE + * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE + * @arg @ref LL_DMAMUX_REQ_CORDIC_WRITE + * @arg @ref LL_DMAMUX_REQ_CORDIC_READ + * @arg @ref LL_DMAMUX_REQ_UCPD1_RX + * @arg @ref LL_DMAMUX_REQ_UCPD1_TX + * (*) Not on all G4 devices + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request) +{ + (void)(DMAMUXx); + MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request); +} + +/** + * @brief Get DMAMUX request ID for DMAMUX Channel x. + * @note DMAMUX channel 0 to 7 are mapped to DMA1 channel 1 to 8. + * DMAMUX channel 8 to 15 are mapped to DMA2 channel 1 to 8. + * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_GetRequestID + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * (*) Not on all G4 devices + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_MEM2MEM + * @arg @ref LL_DMAMUX_REQ_GENERATOR0 + * @arg @ref LL_DMAMUX_REQ_GENERATOR0 + * @arg @ref LL_DMAMUX_REQ_GENERATOR1 + * @arg @ref LL_DMAMUX_REQ_GENERATOR2 + * @arg @ref LL_DMAMUX_REQ_GENERATOR3 + * @arg @ref LL_DMAMUX_REQ_ADC1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM6_UP + * @arg @ref LL_DMAMUX_REQ_TIM7_UP + * @arg @ref LL_DMAMUX_REQ_SPI1_RX + * @arg @ref LL_DMAMUX_REQ_SPI1_TX + * @arg @ref LL_DMAMUX_REQ_SPI2_RX + * @arg @ref LL_DMAMUX_REQ_SPI2_TX + * @arg @ref LL_DMAMUX_REQ_SPI3_RX + * @arg @ref LL_DMAMUX_REQ_SPI3_TX + * @arg @ref LL_DMAMUX_REQ_I2C1_RX + * @arg @ref LL_DMAMUX_REQ_I2C1_TX + * @arg @ref LL_DMAMUX_REQ_I2C2_RX + * @arg @ref LL_DMAMUX_REQ_I2C2_TX + * @arg @ref LL_DMAMUX_REQ_I2C3_RX + * @arg @ref LL_DMAMUX_REQ_I2C3_TX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_RX (*) + * @arg @ref LL_DMAMUX_REQ_I2C4_TX + * @arg @ref LL_DMAMUX_REQ_USART1_RX + * @arg @ref LL_DMAMUX_REQ_USART1_TX + * @arg @ref LL_DMAMUX_REQ_USART2_RX + * @arg @ref LL_DMAMUX_REQ_USART2_TX + * @arg @ref LL_DMAMUX_REQ_USART3_RX + * @arg @ref LL_DMAMUX_REQ_USART3_TX + * @arg @ref LL_DMAMUX_REQ_UART4_RX + * @arg @ref LL_DMAMUX_REQ_UART4_TX + * @arg @ref LL_DMAMUX_REQ_UART5_RX (*) + * @arg @ref LL_DMAMUX_REQ_UART5_TX (*) + * @arg @ref LL_DMAMUX_REQ_LPUART1_RX + * @arg @ref LL_DMAMUX_REQ_LPUART1_TX + * @arg @ref LL_DMAMUX_REQ_ADC2 + * @arg @ref LL_DMAMUX_REQ_ADC3 (*) + * @arg @ref LL_DMAMUX_REQ_ADC4 (*) + * @arg @ref LL_DMAMUX_REQ_ADC5 (*) + * @arg @ref LL_DMAMUX_REQ_QSPI (*) + * @arg @ref LL_DMAMUX_REQ_DAC2_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM1_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM1_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM1_UP + * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM1_COM + * @arg @ref LL_DMAMUX_REQ_TIM8_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM8_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM8_UP + * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM8_COM + * @arg @ref LL_DMAMUX_REQ_TIM2_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM2_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM2_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM3_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM3_UP + * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM4_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH2 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH3 + * @arg @ref LL_DMAMUX_REQ_TIM4_CH4 + * @arg @ref LL_DMAMUX_REQ_TIM4_UP + * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_UP (*) + * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM15_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM15_UP + * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG + * @arg @ref LL_DMAMUX_REQ_TIM15_COM + * @arg @ref LL_DMAMUX_REQ_TIM16_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM16_UP + * @arg @ref LL_DMAMUX_REQ_TIM17_CH1 + * @arg @ref LL_DMAMUX_REQ_TIM17_UP + * @arg @ref LL_DMAMUX_REQ_TIM20_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH3 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_CH4 (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_UP (*) + * @arg @ref LL_DMAMUX_REQ_AES_IN + * @arg @ref LL_DMAMUX_REQ_AES_OUT + * @arg @ref LL_DMAMUX_REQ_TIM20_TRIG (*) + * @arg @ref LL_DMAMUX_REQ_TIM20_COM (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_M (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_A (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_B (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_C (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_D (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_E (*) + * @arg @ref LL_DMAMUX_REQ_HRTIM1_F (*) + * @arg @ref LL_DMAMUX_REQ_DAC3_CH1 + * @arg @ref LL_DMAMUX_REQ_DAC3_CH2 + * @arg @ref LL_DMAMUX_REQ_DAC4_CH1 (*) + * @arg @ref LL_DMAMUX_REQ_DAC4_CH2 (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_RX (*) + * @arg @ref LL_DMAMUX_REQ_SPI4_TX (*) + * @arg @ref LL_DMAMUX_REQ_SAI1_A + * @arg @ref LL_DMAMUX_REQ_SAI1_B + * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE + * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE + * @arg @ref LL_DMAMUX_REQ_CORDIC_WRITE + * @arg @ref LL_DMAMUX_REQ_CORDIC_READ + * @arg @ref LL_DMAMUX_REQ_UCPD1_RX + * @arg @ref LL_DMAMUX_REQ_UCPD1_TX + * (*) Not on all G4 devices + */ +__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID)); +} + +/** + * @brief Set the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event. + * @rmtoll CxCR NBREQ LL_DMAMUX_SetSyncRequestNb + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32. + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb) +{ + (void)(DMAMUXx); + MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ, ((RequestNb - 1U) << DMAMUX_CxCR_NBREQ_Pos)); +} + +/** + * @brief Get the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event. + * @rmtoll CxCR NBREQ LL_DMAMUX_GetSyncRequestNb + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval Between Min_Data = 1 and Max_Data = 32 + */ +__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + return (uint32_t)(((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ)) >> DMAMUX_CxCR_NBREQ_Pos) + 1U); +} + +/** + * @brief Set the polarity of the signal on which the DMA request is synchronized. + * @rmtoll CxCR SPOL LL_DMAMUX_SetSyncPolarity + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_SYNC_NO_EVENT + * @arg @ref LL_DMAMUX_SYNC_POL_RISING + * @arg @ref LL_DMAMUX_SYNC_POL_FALLING + * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity) +{ + (void)(DMAMUXx); + MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL, Polarity); +} + +/** + * @brief Get the polarity of the signal on which the DMA request is synchronized. + * @rmtoll CxCR SPOL LL_DMAMUX_GetSyncPolarity + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMAMUX_SYNC_NO_EVENT + * @arg @ref LL_DMAMUX_SYNC_POL_RISING + * @arg @ref LL_DMAMUX_SYNC_POL_FALLING + * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING + */ +__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL)); +} + +/** + * @brief Enable the Event Generation on DMAMUX channel x. + * @rmtoll CxCR EGE LL_DMAMUX_EnableEventGeneration + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE); +} + +/** + * @brief Disable the Event Generation on DMAMUX channel x. + * @rmtoll CxCR EGE LL_DMAMUX_DisableEventGeneration + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE); +} + +/** + * @brief Check if the Event Generation on DMAMUX channel x is enabled or disabled. + * @rmtoll CxCR EGE LL_DMAMUX_IsEnabledEventGeneration + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE))? 1UL : 0UL); +} + +/** + * @brief Enable the synchronization mode. + * @rmtoll CxCR SE LL_DMAMUX_EnableSync + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE); +} + +/** + * @brief Disable the synchronization mode. + * @rmtoll CxCR SE LL_DMAMUX_DisableSync + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE); +} + +/** + * @brief Check if the synchronization mode is enabled or disabled. + * @rmtoll CxCR SE LL_DMAMUX_IsEnabledSync + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE))? 1UL : 0UL); +} + +/** + * @brief Set DMAMUX synchronization ID on DMAMUX Channel x. + * @rmtoll CxCR SYNC_ID LL_DMAMUX_SetSyncID + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @param SyncID This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3 + * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID) +{ + (void)(DMAMUXx); + MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID, SyncID); +} + +/** + * @brief Get DMAMUX synchronization ID on DMAMUX Channel x. + * @rmtoll CxCR SYNC_ID LL_DMAMUX_GetSyncID + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14 + * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2 + * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3 + * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT + */ +__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID)); +} + +/** + * @brief Enable the Request Generator. + * @rmtoll RGxCR GE LL_DMAMUX_EnableRequestGen + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + (void)(DMAMUXx); + SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE); +} + +/** + * @brief Disable the Request Generator. + * @rmtoll RGxCR GE LL_DMAMUX_DisableRequestGen + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + (void)(DMAMUXx); + CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE); +} + +/** + * @brief Check if the Request Generator is enabled or disabled. + * @rmtoll RGxCR GE LL_DMAMUX_IsEnabledRequestGen + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + (void)(DMAMUXx); + return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE) == (DMAMUX_RGxCR_GE))? 1UL : 0UL); +} + +/** + * @brief Set the polarity of the signal on which the DMA request is generated. + * @rmtoll RGxCR GPOL LL_DMAMUX_SetRequestGenPolarity + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT + * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING + * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING + * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, + uint32_t Polarity) +{ + UNUSED(DMAMUXx); + MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL, Polarity); +} + +/** + * @brief Get the polarity of the signal on which the DMA request is generated. + * @rmtoll RGxCR GPOL LL_DMAMUX_GetRequestGenPolarity + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT + * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING + * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING + * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING + */ +__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + UNUSED(DMAMUXx); + return (READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL)); +} + +/** + * @brief Set the number of DMA request that will be autorized after a generation event. + * @note This field can only be written when Generator is disabled. + * @rmtoll RGxCR GNBREQ LL_DMAMUX_SetGenRequestNb + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32. + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, + uint32_t RequestNb) +{ + UNUSED(DMAMUXx); + MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ, (RequestNb - 1U) << DMAMUX_RGxCR_GNBREQ_Pos); +} + +/** + * @brief Get the number of DMA request that will be autorized after a generation event. + * @rmtoll RGxCR GNBREQ LL_DMAMUX_GetGenRequestNb + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval Between Min_Data = 1 and Max_Data = 32 + */ +__STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ) >> DMAMUX_RGxCR_GNBREQ_Pos) + 1U); +} + +/** + * @brief Set DMAMUX external Request Signal ID on DMAMUX Request Generation Trigger Event Channel x. + * @rmtoll RGxCR SIG_ID LL_DMAMUX_SetRequestSignalID + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @param RequestSignalID This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3 + * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, + uint32_t RequestSignalID) +{ + UNUSED(DMAMUXx); + MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID, RequestSignalID); +} + +/** + * @brief Get DMAMUX external Request Signal ID set on DMAMUX Channel x. + * @rmtoll RGxCR SIG_ID LL_DMAMUX_GetRequestSignalID + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval Returned value can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14 + * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2 + * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3 + * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT + */ +__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + UNUSED(DMAMUXx); + return (READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID)); +} + +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Get Synchronization Event Overrun Flag Channel 0. + * @rmtoll CSR SOF0 LL_DMAMUX_IsActiveFlag_SO0 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 1. + * @rmtoll CSR SOF1 LL_DMAMUX_IsActiveFlag_SO1 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 2. + * @rmtoll CSR SOF2 LL_DMAMUX_IsActiveFlag_SO2 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 3. + * @rmtoll CSR SOF3 LL_DMAMUX_IsActiveFlag_SO3 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 4. + * @rmtoll CSR SOF4 LL_DMAMUX_IsActiveFlag_SO4 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 5. + * @rmtoll CSR SOF5 LL_DMAMUX_IsActiveFlag_SO5 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 6. + * @rmtoll CSR SOF6 LL_DMAMUX_IsActiveFlag_SO6 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 7. + * @rmtoll CSR SOF7 LL_DMAMUX_IsActiveFlag_SO7 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 8. + * @rmtoll CSR SOF8 LL_DMAMUX_IsActiveFlag_SO8 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 9. + * @rmtoll CSR SOF9 LL_DMAMUX_IsActiveFlag_SO9 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 10. + * @rmtoll CSR SOF10 LL_DMAMUX_IsActiveFlag_SO10 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL); +} + +/** + * @brief Get Synchronization Event Overrun Flag Channel 11. + * @rmtoll CSR SOF11 LL_DMAMUX_IsActiveFlag_SO11 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL); +} + +#if defined (DMAMUX_CSR_SOF12) +/** + * @brief Get Synchronization Event Overrun Flag Channel 12. + * @rmtoll CSR SOF12 LL_DMAMUX_IsActiveFlag_SO12 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL); +} +#endif /* DMAMUX_CSR_SOF12 */ + +#if defined (DMAMUX_CSR_SOF13) +/** + * @brief Get Synchronization Event Overrun Flag Channel 13. + * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO13 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL); +} +#endif /* DMAMUX_CSR_SOF13 */ + +#if defined (DMAMUX_CSR_SOF14) +/** + * @brief Get Synchronization Event Overrun Flag Channel 14. + * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO14 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF14) == (DMAMUX_CSR_SOF14)) ? 1UL : 0UL); +} +#endif /* DMAMUX_CSR_SOF14 */ + +#if defined (DMAMUX_CSR_SOF15) +/** + * @brief Get Synchronization Event Overrun Flag Channel 15. + * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO15 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF15) == (DMAMUX_CSR_SOF15)) ? 1UL : 0UL); +} +#endif /* DMAMUX_CSR_SOF15 */ + +/** + * @brief Get Request Generator 0 Trigger Event Overrun Flag. + * @rmtoll RGSR OF0 LL_DMAMUX_IsActiveFlag_RGO0 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL); +} + +/** + * @brief Get Request Generator 1 Trigger Event Overrun Flag. + * @rmtoll RGSR OF1 LL_DMAMUX_IsActiveFlag_RGO1 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL); +} + +/** + * @brief Get Request Generator 2 Trigger Event Overrun Flag. + * @rmtoll RGSR OF2 LL_DMAMUX_IsActiveFlag_RGO2 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL); +} + +/** + * @brief Get Request Generator 3 Trigger Event Overrun Flag. + * @rmtoll RGSR OF3 LL_DMAMUX_IsActiveFlag_RGO3 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 0. + * @rmtoll CFR CSOF0 LL_DMAMUX_ClearFlag_SO0 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 1. + * @rmtoll CFR CSOF1 LL_DMAMUX_ClearFlag_SO1 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 2. + * @rmtoll CFR CSOF2 LL_DMAMUX_ClearFlag_SO2 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 3. + * @rmtoll CFR CSOF3 LL_DMAMUX_ClearFlag_SO3 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 4. + * @rmtoll CFR CSOF4 LL_DMAMUX_ClearFlag_SO4 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 5. + * @rmtoll CFR CSOF5 LL_DMAMUX_ClearFlag_SO5 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 6. + * @rmtoll CFR CSOF6 LL_DMAMUX_ClearFlag_SO6 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 7. + * @rmtoll CFR CSOF7 LL_DMAMUX_ClearFlag_SO7 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 8. + * @rmtoll CFR CSOF8 LL_DMAMUX_ClearFlag_SO8 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 9. + * @rmtoll CFR CSOF9 LL_DMAMUX_ClearFlag_SO9 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 10. + * @rmtoll CFR CSOF10 LL_DMAMUX_ClearFlag_SO10 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10); +} + +/** + * @brief Clear Synchronization Event Overrun Flag Channel 11. + * @rmtoll CFR CSOF11 LL_DMAMUX_ClearFlag_SO11 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11); +} + +#if defined (DMAMUX_CFR_CSOF12) +/** + * @brief Clear Synchronization Event Overrun Flag Channel 12. + * @rmtoll CFR CSOF12 LL_DMAMUX_ClearFlag_SO12 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12); +} +#endif /* DMAMUX_CFR_CSOF12 */ + +#if defined (DMAMUX_CFR_CSOF13) +/** + * @brief Clear Synchronization Event Overrun Flag Channel 13. + * @rmtoll CFR CSOF13 LL_DMAMUX_ClearFlag_SO13 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13); +} +#endif /* DMAMUX_CFR_CSOF13 */ + +#if defined (DMAMUX_CFR_CSOF14) +/** + * @brief Clear Synchronization Event Overrun Flag Channel 14. + * @rmtoll CFR CSOF14 LL_DMAMUX_ClearFlag_SO14 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF14); +} +#endif /* DMAMUX_CFR_CSOF14 */ + +#if defined (DMAMUX_CFR_CSOF15) +/** + * @brief Clear Synchronization Event Overrun Flag Channel 15. + * @rmtoll CFR CSOF15 LL_DMAMUX_ClearFlag_SO15 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF15); +} +#endif /* DMAMUX_CFR_CSOF15 */ + +/** + * @brief Clear Request Generator 0 Trigger Event Overrun Flag. + * @rmtoll RGCFR COF0 LL_DMAMUX_ClearFlag_RGO0 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0); +} + +/** + * @brief Clear Request Generator 1 Trigger Event Overrun Flag. + * @rmtoll RGCFR COF1 LL_DMAMUX_ClearFlag_RGO1 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1); +} + +/** + * @brief Clear Request Generator 2 Trigger Event Overrun Flag. + * @rmtoll RGCFR COF2 LL_DMAMUX_ClearFlag_RGO2 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2); +} + +/** + * @brief Clear Request Generator 3 Trigger Event Overrun Flag. + * @rmtoll RGCFR COF3 LL_DMAMUX_ClearFlag_RGO3 + * @param DMAMUXx DMAMUXx DMAMUXx Instance + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx) +{ + UNUSED(DMAMUXx); + SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3); +} + +/** + * @} + */ + +/** @defgroup DMAMUX_LL_EF_IT_Management IT_Management + * @{ + */ + +/** + * @brief Enable the Synchronization Event Overrun Interrupt on DMAMUX channel x. + * @rmtoll CxCR SOIE LL_DMAMUX_EnableIT_SO + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE); +} + +/** + * @brief Disable the Synchronization Event Overrun Interrupt on DMAMUX channel x. + * @rmtoll CxCR SOIE LL_DMAMUX_DisableIT_SO + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE); +} + +/** + * @brief Check if the Synchronization Event Overrun Interrupt on DMAMUX channel x is enabled or disabled. + * @rmtoll CxCR SOIE LL_DMAMUX_IsEnabledIT_SO + * @param DMAMUXx DMAMUXx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_CHANNEL_0 + * @arg @ref LL_DMAMUX_CHANNEL_1 + * @arg @ref LL_DMAMUX_CHANNEL_2 + * @arg @ref LL_DMAMUX_CHANNEL_3 + * @arg @ref LL_DMAMUX_CHANNEL_4 + * @arg @ref LL_DMAMUX_CHANNEL_5 + * @arg @ref LL_DMAMUX_CHANNEL_6 + * @arg @ref LL_DMAMUX_CHANNEL_7 + * @arg @ref LL_DMAMUX_CHANNEL_8 + * @arg @ref LL_DMAMUX_CHANNEL_9 + * @arg @ref LL_DMAMUX_CHANNEL_10 + * @arg @ref LL_DMAMUX_CHANNEL_11 + * @arg @ref LL_DMAMUX_CHANNEL_12 + * @arg @ref LL_DMAMUX_CHANNEL_13 + * @arg @ref LL_DMAMUX_CHANNEL_14 + * @arg @ref LL_DMAMUX_CHANNEL_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +{ + (void)(DMAMUXx); + return (((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE)) == (DMAMUX_CxCR_SOIE))? 1UL : 0UL); +} + +/** + * @brief Enable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x. + * @rmtoll RGxCR OIE LL_DMAMUX_EnableIT_RGO + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + UNUSED(DMAMUXx); + SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_OIE); +} + +/** + * @brief Disable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x. + * @rmtoll RGxCR OIE LL_DMAMUX_DisableIT_RGO + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval None + */ +__STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + UNUSED(DMAMUXx); + CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_OIE); +} + +/** + * @brief Check if the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x is enabled or disabled. + * @rmtoll RGxCR OIE LL_DMAMUX_IsEnabledIT_RGO + * @param DMAMUXx DMAMUXx Instance + * @param RequestGenChannel This parameter can be one of the following values: + * @arg @ref LL_DMAMUX_REQ_GEN_0 + * @arg @ref LL_DMAMUX_REQ_GEN_1 + * @arg @ref LL_DMAMUX_REQ_GEN_2 + * @arg @ref LL_DMAMUX_REQ_GEN_3 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +{ + UNUSED(DMAMUXx); + return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * + (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_OIE) == (DMAMUX_RGxCR_OIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* DMAMUX1 */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_LL_DMAMUX_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h new file mode 100644 index 0000000..cdebccf --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h @@ -0,0 +1,1422 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_exti.h + * @author MCD Application Team + * @brief Header file of EXTI LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_LL_EXTI_H +#define __STM32G4xx_LL_EXTI_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (EXTI) + +/** @defgroup EXTI_LL EXTI + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private Macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup EXTI_LL_Private_Macros EXTI Private Macros + * @{ + */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure + * @{ + */ +typedef struct +{ + + uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 + This parameter can be any combination of @ref EXTI_LL_EC_LINE */ + + uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63 + This parameter can be any combination of @ref EXTI_LL_EC_LINE */ + + FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. + This parameter can be set either to ENABLE or DISABLE */ + + uint8_t Mode; /*!< Specifies the mode for the EXTI lines. + This parameter can be a value of @ref EXTI_LL_EC_MODE. */ + + uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. + This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ +} LL_EXTI_InitTypeDef; + +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants + * @{ + */ + +/** @defgroup EXTI_LL_EC_LINE LINE + * @{ + */ +#define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */ +#define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */ +#define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */ +#define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */ +#define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */ +#define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */ +#define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */ +#define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */ +#define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */ +#define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */ +#define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */ +#define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */ +#define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */ +#define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */ +#define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */ +#define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */ +#if defined(EXTI_IMR1_IM16) +#define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */ +#endif /* EXTI_IMR1_IM16 */ +#define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */ +#if defined(EXTI_IMR1_IM18) +#define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */ +#endif /* EXTI_IMR1_IM18 */ +#define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */ +#if defined(EXTI_IMR1_IM20) +#define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */ +#endif /* EXTI_IMR1_IM20 */ +#if defined(EXTI_IMR1_IM21) +#define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */ +#endif /* EXTI_IMR1_IM21 */ +#if defined(EXTI_IMR1_IM22) +#define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */ +#endif /* EXTI_IMR1_IM22 */ +#define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */ +#if defined(EXTI_IMR1_IM24) +#define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */ +#endif /* EXTI_IMR1_IM24 */ +#if defined(EXTI_IMR1_IM25) +#define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */ +#endif /* EXTI_IMR1_IM25 */ +#if defined(EXTI_IMR1_IM26) +#define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */ +#endif /* EXTI_IMR1_IM26 */ +#if defined(EXTI_IMR1_IM27) +#define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */ +#endif /* EXTI_IMR1_IM27 */ +#if defined(EXTI_IMR1_IM28) +#define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */ +#endif /* EXTI_IMR1_IM28 */ +#if defined(EXTI_IMR1_IM29) +#define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */ +#endif /* EXTI_IMR1_IM29 */ +#if defined(EXTI_IMR1_IM30) +#define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */ +#endif /* EXTI_IMR1_IM30 */ +#if defined(EXTI_IMR1_IM31) +#define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */ +#endif /* EXTI_IMR1_IM31 */ +#define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/ + +#if defined(EXTI_IMR2_IM32) +#define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */ +#endif /* EXTI_IMR2_IM32 */ +#if defined(EXTI_IMR2_IM33) +#define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */ +#endif /* EXTI_IMR2_IM33 */ +#if defined(EXTI_IMR2_IM34) +#define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */ +#endif /* EXTI_IMR2_IM34 */ +#if defined(EXTI_IMR2_IM35) +#define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */ +#endif /* EXTI_IMR2_IM35 */ +#if defined(EXTI_IMR2_IM36) +#define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */ +#endif /* EXTI_IMR2_IM36 */ +#if defined(EXTI_IMR2_IM37) +#define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */ +#endif /* EXTI_IMR2_IM37 */ +#if defined(EXTI_IMR2_IM38) +#define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */ +#endif /* EXTI_IMR2_IM38 */ +#if defined(EXTI_IMR2_IM39) +#define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */ +#endif /* EXTI_IMR2_IM39 */ +#if defined(EXTI_IMR2_IM40) +#define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */ +#endif /* EXTI_IMR2_IM40 */ +#if defined(EXTI_IMR2_IM41) +#define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */ +#endif /* EXTI_IMR2_IM41 */ +#if defined(EXTI_IMR2_IM42) +#define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */ +#endif /* EXTI_IMR2_IM42 */ +#define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/ + + +#define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ + +#if defined(USE_FULL_LL_DRIVER) +#define LL_EXTI_LINE_NONE 0x00000000U /*!< None Extended line */ +#endif /*USE_FULL_LL_DRIVER*/ + +/** + * @} + */ +#if defined(USE_FULL_LL_DRIVER) + +/** @defgroup EXTI_LL_EC_MODE Mode + * @{ + */ +#define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */ +#define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */ +#define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */ +/** + * @} + */ + +/** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger + * @{ + */ +#define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */ +#define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */ +#define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */ +#define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */ + +/** + * @} + */ + + +#endif /*USE_FULL_LL_DRIVER*/ + + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros + * @{ + */ + +/** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in EXTI register + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) + +/** + * @brief Read a value in EXTI register + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) +/** + * @} + */ + + +/** + * @} + */ + + + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions + * @{ + */ +/** @defgroup EXTI_LL_EF_IT_Management IT_Management + * @{ + */ + +/** + * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 + * @note The reset value for the direct or internal lines (see RM) + * is set to 1 in order to enable the interrupt by default. + * Bits are set automatically at Power on. + * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_17 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_23 + * @arg @ref LL_EXTI_LINE_24 + * @arg @ref LL_EXTI_LINE_25 + * @arg @ref LL_EXTI_LINE_26 + * @arg @ref LL_EXTI_LINE_27 + * @arg @ref LL_EXTI_LINE_28 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @arg @ref LL_EXTI_LINE_ALL_0_31 + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) +{ + SET_BIT(EXTI->IMR1, ExtiLine); +} +/** + * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 + * @note The reset value for the direct lines (lines from 32 to 34, line + * 39) is set to 1 in order to enable the interrupt by default. + * Bits are set automatically at Power on. + * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_34 + * @arg @ref LL_EXTI_LINE_35 (*) + * @arg @ref LL_EXTI_LINE_36 + * @arg @ref LL_EXTI_LINE_37 + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @arg @ref LL_EXTI_LINE_42(*) + * @arg @ref LL_EXTI_LINE_ALL_32_63 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine) +{ + SET_BIT(EXTI->IMR2, ExtiLine); +} + +/** + * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 + * @note The reset value for the direct or internal lines (see RM) + * is set to 1 in order to enable the interrupt by default. + * Bits are set automatically at Power on. + * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_17 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_23 + * @arg @ref LL_EXTI_LINE_24 + * @arg @ref LL_EXTI_LINE_25 + * @arg @ref LL_EXTI_LINE_26 + * @arg @ref LL_EXTI_LINE_27 + * @arg @ref LL_EXTI_LINE_28 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 + * @arg @ref LL_EXTI_LINE_ALL_0_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->IMR1, ExtiLine); +} + +/** + * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 + * @note The reset value for the direct lines (lines from 32 to 34, line + * 39) is set to 1 in order to enable the interrupt by default. + * Bits are set automatically at Power on. + * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_34 + * @arg @ref LL_EXTI_LINE_35 (*) + * @arg @ref LL_EXTI_LINE_36 + * @arg @ref LL_EXTI_LINE_37 + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @arg @ref LL_EXTI_LINE_42(*) + * @arg @ref LL_EXTI_LINE_ALL_32_63 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->IMR2, ExtiLine); +} + +/** + * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 + * @note The reset value for the direct or internal lines (see RM) + * is set to 1 in order to enable the interrupt by default. + * Bits are set automatically at Power on. + * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_17 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_23 + * @arg @ref LL_EXTI_LINE_24 + * @arg @ref LL_EXTI_LINE_25 + * @arg @ref LL_EXTI_LINE_26 + * @arg @ref LL_EXTI_LINE_27 + * @arg @ref LL_EXTI_LINE_28 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @arg @ref LL_EXTI_LINE_ALL_0_31 + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 + * @note The reset value for the direct lines (lines from 32 to 34, line + * 39) is set to 1 in order to enable the interrupt by default. + * Bits are set automatically at Power on. + * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_34 + * @arg @ref LL_EXTI_LINE_35 (*) + * @arg @ref LL_EXTI_LINE_36 + * @arg @ref LL_EXTI_LINE_37 + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @arg @ref LL_EXTI_LINE_42(*) + * @arg @ref LL_EXTI_LINE_ALL_32_63 + * @note (*): Available in some devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup EXTI_LL_EF_Event_Management Event_Management + * @{ + */ + +/** + * @brief Enable ExtiLine Event request for Lines in range 0 to 31 + * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_17 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_23 + * @arg @ref LL_EXTI_LINE_24 + * @arg @ref LL_EXTI_LINE_25 + * @arg @ref LL_EXTI_LINE_26 + * @arg @ref LL_EXTI_LINE_27 + * @arg @ref LL_EXTI_LINE_28 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 + * @arg @ref LL_EXTI_LINE_ALL_0_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) +{ + SET_BIT(EXTI->EMR1, ExtiLine); + +} + +/** + * @brief Enable ExtiLine Event request for Lines in range 32 to 63 + * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_34 + * @arg @ref LL_EXTI_LINE_35 (*) + * @arg @ref LL_EXTI_LINE_36 + * @arg @ref LL_EXTI_LINE_37 + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @arg @ref LL_EXTI_LINE_42(*) + * @arg @ref LL_EXTI_LINE_ALL_32_63 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine) +{ + SET_BIT(EXTI->EMR2, ExtiLine); +} + +/** + * @brief Disable ExtiLine Event request for Lines in range 0 to 31 + * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_17 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_23 + * @arg @ref LL_EXTI_LINE_24 + * @arg @ref LL_EXTI_LINE_25 + * @arg @ref LL_EXTI_LINE_26 + * @arg @ref LL_EXTI_LINE_27 + * @arg @ref LL_EXTI_LINE_28 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @arg @ref LL_EXTI_LINE_ALL_0_31 + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->EMR1, ExtiLine); +} + +/** + * @brief Disable ExtiLine Event request for Lines in range 32 to 63 + * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_34 + * @arg @ref LL_EXTI_LINE_35 (*) + * @arg @ref LL_EXTI_LINE_36 + * @arg @ref LL_EXTI_LINE_37 + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @arg @ref LL_EXTI_LINE_42(*) + * @arg @ref LL_EXTI_LINE_ALL_32_63 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->EMR2, ExtiLine); +} + +/** + * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 + * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31 + * @param ExtiLine This parameter can be one of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_17 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_23 + * @arg @ref LL_EXTI_LINE_24 + * @arg @ref LL_EXTI_LINE_25 + * @arg @ref LL_EXTI_LINE_26 + * @arg @ref LL_EXTI_LINE_27 + * @arg @ref LL_EXTI_LINE_28 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 + * @arg @ref LL_EXTI_LINE_ALL_0_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); + +} + +/** + * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 + * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_34 + * @arg @ref LL_EXTI_LINE_35 (*) + * @arg @ref LL_EXTI_LINE_36 + * @arg @ref LL_EXTI_LINE_37 + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @arg @ref LL_EXTI_LINE_42(*) + * @arg @ref LL_EXTI_LINE_ALL_32_63 + * @note (*): Available in some devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management + * @{ + */ + +/** + * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a rising edge on a configurable interrupt + * line occurs during a write operation in the EXTI_RTSR register, the + * pending bit is not set. + * Rising and falling edge triggers can be set for + * the same interrupt line. In this case, both generate a trigger + * condition. + * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) +{ + SET_BIT(EXTI->RTSR1, ExtiLine); + +} + +/** + * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a rising edge on a configurable interrupt + * line occurs during a write operation in the EXTI_RTSR register, the + * pending bit is not set.Rising and falling edge triggers can be set for + * the same interrupt line. In this case, both generate a trigger + * condition. + * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine) +{ + SET_BIT(EXTI->RTSR2, ExtiLine); +} + +/** + * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a rising edge on a configurable interrupt + * line occurs during a write operation in the EXTI_RTSR register, the + * pending bit is not set. + * Rising and falling edge triggers can be set for + * the same interrupt line. In this case, both generate a trigger + * condition. + * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->RTSR1, ExtiLine); + +} + +/** + * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a rising edge on a configurable interrupt + * line occurs during a write operation in the EXTI_RTSR register, the + * pending bit is not set. + * Rising and falling edge triggers can be set for + * the same interrupt line. In this case, both generate a trigger + * condition. + * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->RTSR2, ExtiLine); +} + +/** + * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 + * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63 + * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management + * @{ + */ + +/** + * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a falling edge on a configurable interrupt + * line occurs during a write operation in the EXTI_FTSR register, the + * pending bit is not set. + * Rising and falling edge triggers can be set for + * the same interrupt line. In this case, both generate a trigger + * condition. + * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) +{ + SET_BIT(EXTI->FTSR1, ExtiLine); +} + +/** + * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a Falling edge on a configurable interrupt + * line occurs during a write operation in the EXTI_FTSR register, the + * pending bit is not set. + * Rising and falling edge triggers can be set for + * the same interrupt line. In this case, both generate a trigger + * condition. + * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine) +{ + SET_BIT(EXTI->FTSR2, ExtiLine); +} + +/** + * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a Falling edge on a configurable interrupt + * line occurs during a write operation in the EXTI_FTSR register, the + * pending bit is not set. + * Rising and falling edge triggers can be set for the same interrupt line. + * In this case, both generate a trigger condition. + * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->FTSR1, ExtiLine); +} + +/** + * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 + * @note The configurable wakeup lines are edge-triggered. No glitch must be + * generated on these lines. If a Falling edge on a configurable interrupt + * line occurs during a write operation in the EXTI_FTSR register, the + * pending bit is not set. + * Rising and falling edge triggers can be set for the same interrupt line. + * In this case, both generate a trigger condition. + * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine) +{ + CLEAR_BIT(EXTI->FTSR2, ExtiLine); +} + +/** + * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 + * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63 + * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management + * @{ + */ + +/** + * @brief Generate a software Interrupt Event for Lines in range 0 to 31 + * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to + * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1 + * resulting in an interrupt request generation. + * This bit is cleared by clearing the corresponding bit in the EXTI_PR1 + * register (by writing a 1 into the bit) + * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) +{ + SET_BIT(EXTI->SWIER1, ExtiLine); +} + +/** + * @brief Generate a software Interrupt Event for Lines in range 32 to 63 + * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to + * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2 + * resulting in an interrupt request generation. + * This bit is cleared by clearing the corresponding bit in the EXTI_PR2 + * register (by writing a 1 into the bit) + * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine) +{ + SET_BIT(EXTI->SWIER2, ExtiLine); +} + +/** + * @} + */ + +/** @defgroup EXTI_LL_EF_Flag_Management Flag_Management + * @{ + */ + +/** + * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 + * @note This bit is set when the selected edge event arrives on the interrupt + * line. This bit is cleared by writing a 1 to the bit. + * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63 + * @note This bit is set when the selected edge event arrives on the interrupt + * line. This bit is cleared by writing a 1 to the bit. + * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine) +{ + return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); +} + +/** + * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 + * @note This bit is set when the selected edge event arrives on the interrupt + * line. This bit is cleared by writing a 1 to the bit. + * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval @note This bit is set when the selected edge event arrives on the interrupt + */ +__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) +{ + return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine)); +} + +/** + * @brief Read ExtLine Combination Flag for Lines in range 32 to 63 + * @note This bit is set when the selected edge event arrives on the interrupt + * line. This bit is cleared by writing a 1 to the bit. + * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval @note This bit is set when the selected edge event arrives on the interrupt + */ +__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine) +{ + return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine)); +} + +/** + * @brief Clear ExtLine Flags for Lines in range 0 to 31 + * @note This bit is set when the selected edge event arrives on the interrupt + * line. This bit is cleared by writing a 1 to the bit. + * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_0 + * @arg @ref LL_EXTI_LINE_1 + * @arg @ref LL_EXTI_LINE_2 + * @arg @ref LL_EXTI_LINE_3 + * @arg @ref LL_EXTI_LINE_4 + * @arg @ref LL_EXTI_LINE_5 + * @arg @ref LL_EXTI_LINE_6 + * @arg @ref LL_EXTI_LINE_7 + * @arg @ref LL_EXTI_LINE_8 + * @arg @ref LL_EXTI_LINE_9 + * @arg @ref LL_EXTI_LINE_10 + * @arg @ref LL_EXTI_LINE_11 + * @arg @ref LL_EXTI_LINE_12 + * @arg @ref LL_EXTI_LINE_13 + * @arg @ref LL_EXTI_LINE_14 + * @arg @ref LL_EXTI_LINE_15 + * @arg @ref LL_EXTI_LINE_16 + * @arg @ref LL_EXTI_LINE_18 + * @arg @ref LL_EXTI_LINE_19 + * @arg @ref LL_EXTI_LINE_20 + * @arg @ref LL_EXTI_LINE_21 + * @arg @ref LL_EXTI_LINE_22 + * @arg @ref LL_EXTI_LINE_29 + * @arg @ref LL_EXTI_LINE_30 + * @arg @ref LL_EXTI_LINE_31 (*) + * @note (*): Available in some devices + * @note Please check each device line mapping for EXTI Line availability + * @retval None + */ +__STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) +{ + WRITE_REG(EXTI->PR1, ExtiLine); +} + +/** + * @brief Clear ExtLine Flags for Lines in range 32 to 63 + * @note This bit is set when the selected edge event arrives on the interrupt + * line. This bit is cleared by writing a 1 to the bit. + * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63 + * @param ExtiLine This parameter can be a combination of the following values: + * @arg @ref LL_EXTI_LINE_32 (*) + * @arg @ref LL_EXTI_LINE_33 (*) + * @arg @ref LL_EXTI_LINE_38 + * @arg @ref LL_EXTI_LINE_39 + * @arg @ref LL_EXTI_LINE_40 + * @arg @ref LL_EXTI_LINE_41 + * @note (*): Available in some devices + * @retval None + */ +__STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine) +{ + WRITE_REG(EXTI->PR2, ExtiLine); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions + * @{ + */ + +uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); +uint32_t LL_EXTI_DeInit(void); +void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); + + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* EXTI */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_LL_EXTI_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h new file mode 100644 index 0000000..804bd05 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h @@ -0,0 +1,994 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_gpio.h + * @author MCD Application Team + * @brief Header file of GPIO LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_LL_GPIO_H +#define STM32G4xx_LL_GPIO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) + +/** @defgroup GPIO_LL GPIO + * @{ + */ +/** MISRA C:2012 deviation rule has been granted for following rules: + * Rule-18.1_d - Medium: Array pointer `GPIOx' is accessed with index [..,..] + * which may be out of array bounds [..,UNKNOWN] in following APIs: + * LL_GPIO_GetAFPin_0_7 + * LL_GPIO_SetAFPin_0_7 + * LL_GPIO_SetAFPin_8_15 + * LL_GPIO_GetAFPin_8_15 + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup GPIO_LL_Private_Macros GPIO Private Macros + * @{ + */ + +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures + * @{ + */ + +/** + * @brief LL GPIO Init Structure definition + */ +typedef struct +{ + uint32_t Pin; /*!< Specifies the GPIO pins to be configured. + This parameter can be any value of @ref GPIO_LL_EC_PIN */ + + uint32_t Mode; /*!< Specifies the operating mode for the selected pins. + This parameter can be a value of @ref GPIO_LL_EC_MODE. + + GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/ + + uint32_t Speed; /*!< Specifies the speed for the selected pins. + This parameter can be a value of @ref GPIO_LL_EC_SPEED. + + GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/ + + uint32_t OutputType; /*!< Specifies the operating output type for the selected pins. + This parameter can be a value of @ref GPIO_LL_EC_OUTPUT. + + GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/ + + uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins. + This parameter can be a value of @ref GPIO_LL_EC_PULL. + + GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/ + + uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins. + This parameter can be a value of @ref GPIO_LL_EC_AF. + + GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/ +} LL_GPIO_InitTypeDef; + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants + * @{ + */ + +/** @defgroup GPIO_LL_EC_PIN PIN + * @{ + */ +#define LL_GPIO_PIN_0 GPIO_BSRR_BS0 /*!< Select pin 0 */ +#define LL_GPIO_PIN_1 GPIO_BSRR_BS1 /*!< Select pin 1 */ +#define LL_GPIO_PIN_2 GPIO_BSRR_BS2 /*!< Select pin 2 */ +#define LL_GPIO_PIN_3 GPIO_BSRR_BS3 /*!< Select pin 3 */ +#define LL_GPIO_PIN_4 GPIO_BSRR_BS4 /*!< Select pin 4 */ +#define LL_GPIO_PIN_5 GPIO_BSRR_BS5 /*!< Select pin 5 */ +#define LL_GPIO_PIN_6 GPIO_BSRR_BS6 /*!< Select pin 6 */ +#define LL_GPIO_PIN_7 GPIO_BSRR_BS7 /*!< Select pin 7 */ +#define LL_GPIO_PIN_8 GPIO_BSRR_BS8 /*!< Select pin 8 */ +#define LL_GPIO_PIN_9 GPIO_BSRR_BS9 /*!< Select pin 9 */ +#define LL_GPIO_PIN_10 GPIO_BSRR_BS10 /*!< Select pin 10 */ +#define LL_GPIO_PIN_11 GPIO_BSRR_BS11 /*!< Select pin 11 */ +#define LL_GPIO_PIN_12 GPIO_BSRR_BS12 /*!< Select pin 12 */ +#define LL_GPIO_PIN_13 GPIO_BSRR_BS13 /*!< Select pin 13 */ +#define LL_GPIO_PIN_14 GPIO_BSRR_BS14 /*!< Select pin 14 */ +#define LL_GPIO_PIN_15 GPIO_BSRR_BS15 /*!< Select pin 15 */ +#define LL_GPIO_PIN_ALL (GPIO_BSRR_BS0 | GPIO_BSRR_BS1 | GPIO_BSRR_BS2 | \ + GPIO_BSRR_BS3 | GPIO_BSRR_BS4 | GPIO_BSRR_BS5 | \ + GPIO_BSRR_BS6 | GPIO_BSRR_BS7 | GPIO_BSRR_BS8 | \ + GPIO_BSRR_BS9 | GPIO_BSRR_BS10 | GPIO_BSRR_BS11 | \ + GPIO_BSRR_BS12 | GPIO_BSRR_BS13 | GPIO_BSRR_BS14 | \ + GPIO_BSRR_BS15) /*!< Select all pins */ +/** + * @} + */ + +/** @defgroup GPIO_LL_EC_MODE Mode + * @{ + */ +#define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */ +#define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODE0_0 /*!< Select output mode */ +#define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODE0_1 /*!< Select alternate function mode */ +#define LL_GPIO_MODE_ANALOG GPIO_MODER_MODE0 /*!< Select analog mode */ +/** + * @} + */ + +/** @defgroup GPIO_LL_EC_OUTPUT Output Type + * @{ + */ +#define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */ +#define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT0 /*!< Select open-drain as output type */ +/** + * @} + */ + +/** @defgroup GPIO_LL_EC_SPEED Output Speed + * @{ + */ +#define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */ +#define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDR_OSPEED0_0 /*!< Select I/O medium output speed */ +#define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDR_OSPEED0_1 /*!< Select I/O fast output speed */ +#define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDR_OSPEED0 /*!< Select I/O high output speed */ +/** + * @} + */ +#define LL_GPIO_SPEED_LOW LL_GPIO_SPEED_FREQ_LOW +#define LL_GPIO_SPEED_MEDIUM LL_GPIO_SPEED_FREQ_MEDIUM +#define LL_GPIO_SPEED_FAST LL_GPIO_SPEED_FREQ_HIGH +#define LL_GPIO_SPEED_HIGH LL_GPIO_SPEED_FREQ_VERY_HIGH + +/** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down + * @{ + */ +#define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */ +#define LL_GPIO_PULL_UP GPIO_PUPDR_PUPD0_0 /*!< Select I/O pull up */ +#define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPD0_1 /*!< Select I/O pull down */ +/** + * @} + */ + +/** @defgroup GPIO_LL_EC_AF Alternate Function + * @{ + */ +#define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */ +#define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */ +#define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */ +#define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */ +#define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */ +#define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */ +#define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */ +#define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */ +#define LL_GPIO_AF_8 (0x0000008U) /*!< Select alternate function 8 */ +#define LL_GPIO_AF_9 (0x0000009U) /*!< Select alternate function 9 */ +#define LL_GPIO_AF_10 (0x000000AU) /*!< Select alternate function 10 */ +#define LL_GPIO_AF_11 (0x000000BU) /*!< Select alternate function 11 */ +#define LL_GPIO_AF_12 (0x000000CU) /*!< Select alternate function 12 */ +#define LL_GPIO_AF_13 (0x000000DU) /*!< Select alternate function 13 */ +#define LL_GPIO_AF_14 (0x000000EU) /*!< Select alternate function 14 */ +#define LL_GPIO_AF_15 (0x000000FU) /*!< Select alternate function 15 */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros + * @{ + */ + +/** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in GPIO register + * @param __INSTANCE__ GPIO Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in GPIO register + * @param __INSTANCE__ GPIO Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions + * @{ + */ + +/** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration + * @{ + */ + +/** + * @brief Configure gpio mode for a dedicated pin on dedicated port. + * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog. + * @note Warning: only one pin can be passed as parameter. + * @rmtoll MODER MODEy LL_GPIO_SetPinMode + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @param Mode This parameter can be one of the following values: + * @arg @ref LL_GPIO_MODE_INPUT + * @arg @ref LL_GPIO_MODE_OUTPUT + * @arg @ref LL_GPIO_MODE_ALTERNATE + * @arg @ref LL_GPIO_MODE_ANALOG + * @retval None + */ +__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode) +{ + MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U))); +} + +/** + * @brief Return gpio mode for a dedicated pin on dedicated port. + * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog. + * @note Warning: only one pin can be passed as parameter. + * @rmtoll MODER MODEy LL_GPIO_GetPinMode + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @retval Returned value can be one of the following values: + * @arg @ref LL_GPIO_MODE_INPUT + * @arg @ref LL_GPIO_MODE_OUTPUT + * @arg @ref LL_GPIO_MODE_ALTERNATE + * @arg @ref LL_GPIO_MODE_ANALOG + */ +__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->MODER, + (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U)); +} + +/** + * @brief Configure gpio output type for several pins on dedicated port. + * @note Output type as to be set when gpio pin is in output or + * alternate modes. Possible type are Push-pull or Open-drain. + * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @param OutputType This parameter can be one of the following values: + * @arg @ref LL_GPIO_OUTPUT_PUSHPULL + * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN + * @retval None + */ +__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType) +{ + MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType)); +} + +/** + * @brief Return gpio output type for several pins on dedicated port. + * @note Output type as to be set when gpio pin is in output or + * alternate modes. Possible type are Push-pull or Open-drain. + * @note Warning: only one pin can be passed as parameter. + * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval Returned value can be one of the following values: + * @arg @ref LL_GPIO_OUTPUT_PUSHPULL + * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN + */ +__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin)); +} + +/** + * @brief Configure gpio speed for a dedicated pin on dedicated port. + * @note I/O speed can be Low, Medium, Fast or High speed. + * @note Warning: only one pin can be passed as parameter. + * @note Refer to datasheet for frequency specifications and the power + * supply and load conditions for each speed. + * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @param Speed This parameter can be one of the following values: + * @arg @ref LL_GPIO_SPEED_FREQ_LOW + * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM + * @arg @ref LL_GPIO_SPEED_FREQ_HIGH + * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH + * @retval None + */ +__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed) +{ + MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDR_OSPEED0 << (POSITION_VAL(Pin) * 2U)), + (Speed << (POSITION_VAL(Pin) * 2U))); +} + +/** + * @brief Return gpio speed for a dedicated pin on dedicated port. + * @note I/O speed can be Low, Medium, Fast or High speed. + * @note Warning: only one pin can be passed as parameter. + * @note Refer to datasheet for frequency specifications and the power + * supply and load conditions for each speed. + * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @retval Returned value can be one of the following values: + * @arg @ref LL_GPIO_SPEED_FREQ_LOW + * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM + * @arg @ref LL_GPIO_SPEED_FREQ_HIGH + * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH + */ +__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, + (GPIO_OSPEEDR_OSPEED0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U)); +} + +/** + * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port. + * @note Warning: only one pin can be passed as parameter. + * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @param Pull This parameter can be one of the following values: + * @arg @ref LL_GPIO_PULL_NO + * @arg @ref LL_GPIO_PULL_UP + * @arg @ref LL_GPIO_PULL_DOWN + * @retval None + */ +__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull) +{ + MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U))); +} + +/** + * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port + * @note Warning: only one pin can be passed as parameter. + * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @retval Returned value can be one of the following values: + * @arg @ref LL_GPIO_PULL_NO + * @arg @ref LL_GPIO_PULL_UP + * @arg @ref LL_GPIO_PULL_DOWN + */ +__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->PUPDR, + (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U)); +} + +/** + * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port. + * @note Possible values are from AF0 to AF15 depending on target. + * @note Warning: only one pin can be passed as parameter. + * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7 + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @param Alternate This parameter can be one of the following values: + * @arg @ref LL_GPIO_AF_0 + * @arg @ref LL_GPIO_AF_1 + * @arg @ref LL_GPIO_AF_2 + * @arg @ref LL_GPIO_AF_3 + * @arg @ref LL_GPIO_AF_4 + * @arg @ref LL_GPIO_AF_5 + * @arg @ref LL_GPIO_AF_6 + * @arg @ref LL_GPIO_AF_7 + * @arg @ref LL_GPIO_AF_8 + * @arg @ref LL_GPIO_AF_9 + * @arg @ref LL_GPIO_AF_10 + * @arg @ref LL_GPIO_AF_11 + * @arg @ref LL_GPIO_AF_12 + * @arg @ref LL_GPIO_AF_13 + * @arg @ref LL_GPIO_AF_14 + * @arg @ref LL_GPIO_AF_15 + * @retval None + */ +__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate) +{ + MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)), + (Alternate << (POSITION_VAL(Pin) * 4U))); +} + +/** + * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port. + * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7 + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @retval Returned value can be one of the following values: + * @arg @ref LL_GPIO_AF_0 + * @arg @ref LL_GPIO_AF_1 + * @arg @ref LL_GPIO_AF_2 + * @arg @ref LL_GPIO_AF_3 + * @arg @ref LL_GPIO_AF_4 + * @arg @ref LL_GPIO_AF_5 + * @arg @ref LL_GPIO_AF_6 + * @arg @ref LL_GPIO_AF_7 + * @arg @ref LL_GPIO_AF_8 + * @arg @ref LL_GPIO_AF_9 + * @arg @ref LL_GPIO_AF_10 + * @arg @ref LL_GPIO_AF_11 + * @arg @ref LL_GPIO_AF_12 + * @arg @ref LL_GPIO_AF_13 + * @arg @ref LL_GPIO_AF_14 + * @arg @ref LL_GPIO_AF_15 + */ +__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->AFR[0], + (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U)); +} + +/** + * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port. + * @note Possible values are from AF0 to AF15 depending on target. + * @note Warning: only one pin can be passed as parameter. + * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15 + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @param Alternate This parameter can be one of the following values: + * @arg @ref LL_GPIO_AF_0 + * @arg @ref LL_GPIO_AF_1 + * @arg @ref LL_GPIO_AF_2 + * @arg @ref LL_GPIO_AF_3 + * @arg @ref LL_GPIO_AF_4 + * @arg @ref LL_GPIO_AF_5 + * @arg @ref LL_GPIO_AF_6 + * @arg @ref LL_GPIO_AF_7 + * @arg @ref LL_GPIO_AF_8 + * @arg @ref LL_GPIO_AF_9 + * @arg @ref LL_GPIO_AF_10 + * @arg @ref LL_GPIO_AF_11 + * @arg @ref LL_GPIO_AF_12 + * @arg @ref LL_GPIO_AF_13 + * @arg @ref LL_GPIO_AF_14 + * @arg @ref LL_GPIO_AF_15 + * @retval None + */ +__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate) +{ + MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)), + (Alternate << (POSITION_VAL(Pin >> 8U) * 4U))); +} + +/** + * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port. + * @note Possible values are from AF0 to AF15 depending on target. + * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15 + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @retval Returned value can be one of the following values: + * @arg @ref LL_GPIO_AF_0 + * @arg @ref LL_GPIO_AF_1 + * @arg @ref LL_GPIO_AF_2 + * @arg @ref LL_GPIO_AF_3 + * @arg @ref LL_GPIO_AF_4 + * @arg @ref LL_GPIO_AF_5 + * @arg @ref LL_GPIO_AF_6 + * @arg @ref LL_GPIO_AF_7 + * @arg @ref LL_GPIO_AF_8 + * @arg @ref LL_GPIO_AF_9 + * @arg @ref LL_GPIO_AF_10 + * @arg @ref LL_GPIO_AF_11 + * @arg @ref LL_GPIO_AF_12 + * @arg @ref LL_GPIO_AF_13 + * @arg @ref LL_GPIO_AF_14 + * @arg @ref LL_GPIO_AF_15 + */ +__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->AFR[1], + (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U)); +} + + +/** + * @brief Lock configuration of several pins for a dedicated port. + * @note When the lock sequence has been applied on a port bit, the + * value of this port bit can no longer be modified until the + * next reset. + * @note Each lock bit freezes a specific configuration register + * (control and alternate function registers). + * @rmtoll LCKR LCKK LL_GPIO_LockPin + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) +{ + __IO uint32_t temp; + WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask); + WRITE_REG(GPIOx->LCKR, PinMask); + WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask); + /* Read LCKR register. This read is mandatory to complete key lock sequence */ + temp = READ_REG(GPIOx->LCKR); + (void) temp; +} + +/** + * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0. + * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask) +{ + return ((READ_BIT(GPIOx->LCKR, PinMask) == (PinMask)) ? 1UL : 0UL); +} + +/** + * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0. + * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked + * @param GPIOx GPIO Port + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx) +{ + return ((READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup GPIO_LL_EF_Data_Access Data Access + * @{ + */ + +/** + * @brief Return full input data register value for a dedicated port. + * @rmtoll IDR IDy LL_GPIO_ReadInputPort + * @param GPIOx GPIO Port + * @retval Input data register value of port + */ +__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) +{ + return (uint32_t)(READ_REG(GPIOx->IDR)); +} + +/** + * @brief Return if input data level for several pins of dedicated port is high or low. + * @rmtoll IDR IDy LL_GPIO_IsInputPinSet + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask) +{ + return ((READ_BIT(GPIOx->IDR, PinMask) == (PinMask)) ? 1UL : 0UL); +} + +/** + * @brief Write output data register for the port. + * @rmtoll ODR ODy LL_GPIO_WriteOutputPort + * @param GPIOx GPIO Port + * @param PortValue Level value for each pin of the port + * @retval None + */ +__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue) +{ + WRITE_REG(GPIOx->ODR, PortValue); +} + +/** + * @brief Return full output data register value for a dedicated port. + * @rmtoll ODR ODy LL_GPIO_ReadOutputPort + * @param GPIOx GPIO Port + * @retval Output data register value of port + */ +__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx) +{ + return (uint32_t)(READ_REG(GPIOx->ODR)); +} + +/** + * @brief Return if input data level for several pins of dedicated port is high or low. + * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask) +{ + return ((READ_BIT(GPIOx->ODR, PinMask) == (PinMask)) ? 1UL : 0UL); +} + +/** + * @brief Set several pins to high level on dedicated gpio port. + * @rmtoll BSRR BSy LL_GPIO_SetOutputPin + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) +{ + WRITE_REG(GPIOx->BSRR, PinMask); +} + +/** + * @brief Set several pins to low level on dedicated gpio port. + * @rmtoll BRR BRy LL_GPIO_ResetOutputPin + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) +{ + WRITE_REG(GPIOx->BRR, PinMask); +} + +/** + * @brief Toggle data value for several pin of dedicated port. + * @rmtoll ODR ODy LL_GPIO_TogglePin + * @param GPIOx GPIO Port + * @param PinMask This parameter can be a combination of the following values: + * @arg @ref LL_GPIO_PIN_0 + * @arg @ref LL_GPIO_PIN_1 + * @arg @ref LL_GPIO_PIN_2 + * @arg @ref LL_GPIO_PIN_3 + * @arg @ref LL_GPIO_PIN_4 + * @arg @ref LL_GPIO_PIN_5 + * @arg @ref LL_GPIO_PIN_6 + * @arg @ref LL_GPIO_PIN_7 + * @arg @ref LL_GPIO_PIN_8 + * @arg @ref LL_GPIO_PIN_9 + * @arg @ref LL_GPIO_PIN_10 + * @arg @ref LL_GPIO_PIN_11 + * @arg @ref LL_GPIO_PIN_12 + * @arg @ref LL_GPIO_PIN_13 + * @arg @ref LL_GPIO_PIN_14 + * @arg @ref LL_GPIO_PIN_15 + * @arg @ref LL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask) +{ + uint32_t odr = READ_REG(GPIOx->ODR); + WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask)); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions + * @{ + */ + +ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx); +ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct); +void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct); + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) */ +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_LL_GPIO_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h new file mode 100644 index 0000000..e3f996a --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h @@ -0,0 +1,2643 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_lpuart.h + * @author MCD Application Team + * @brief Header file of LPUART LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_LL_LPUART_H +#define STM32G4xx_LL_LPUART_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (LPUART1) + +/** @defgroup LPUART_LL LPUART + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup LPUART_LL_Private_Variables LPUART Private Variables + * @{ + */ +/* Array used to get the LPUART prescaler division decimal values versus @ref LPUART_LL_EC_PRESCALER values */ +static const uint16_t LPUART_PRESCALER_TAB[] = +{ + (uint16_t)1, + (uint16_t)2, + (uint16_t)4, + (uint16_t)6, + (uint16_t)8, + (uint16_t)10, + (uint16_t)12, + (uint16_t)16, + (uint16_t)32, + (uint16_t)64, + (uint16_t)128, + (uint16_t)256 +}; +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup LPUART_LL_Private_Constants LPUART Private Constants + * @{ + */ +/* Defines used in Baud Rate related macros and corresponding register setting computation */ +#define LPUART_LPUARTDIV_FREQ_MUL 256U +#define LPUART_BRR_MASK 0x000FFFFFU +#define LPUART_BRR_MIN_VALUE 0x00000300U +/** + * @} + */ + + +/* Private macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup LPUART_LL_Private_Macros LPUART Private Macros + * @{ + */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures + * @{ + */ + +/** + * @brief LL LPUART Init Structure definition + */ +typedef struct +{ + uint32_t PrescalerValue; /*!< Specifies the Prescaler to compute the communication baud rate. + This parameter can be a value of @ref LPUART_LL_EC_PRESCALER. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetPrescaler().*/ + + uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetBaudRate().*/ + + uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetDataWidth().*/ + + uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref LPUART_LL_EC_STOPBITS. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetStopBitsLength().*/ + + uint32_t Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref LPUART_LL_EC_PARITY. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetParity().*/ + + uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled. + This parameter can be a value of @ref LPUART_LL_EC_DIRECTION. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetTransferDirection().*/ + + uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. + This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetHWFlowCtrl().*/ + +} LL_LPUART_InitTypeDef; + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants + * @{ + */ + +/** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_LPUART_WriteReg function + * @{ + */ +#define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error clear flag */ +#define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error clear flag */ +#define LL_LPUART_ICR_NCF USART_ICR_NECF /*!< Noise error detected clear flag */ +#define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error clear flag */ +#define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected clear flag */ +#define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete clear flag */ +#define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag */ +#define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match clear flag */ +#define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode clear flag */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_LPUART_ReadReg function + * @{ + */ +#define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */ +#define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */ +#define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */ +#define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */ +#define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */ +#define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE /*!< Read data register or RX FIFO not empty flag */ +#define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */ +#define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF /*!< Transmit data register empty or TX FIFO Not Full flag*/ +#define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */ +#define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ +#define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ +#define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag */ +#define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */ +#define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */ +#define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */ +#define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */ +#define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */ +#define LL_LPUART_ISR_TXFE USART_ISR_TXFE /*!< TX FIFO empty flag */ +#define LL_LPUART_ISR_RXFF USART_ISR_RXFF /*!< RX FIFO full flag */ +#define LL_LPUART_ISR_RXFT USART_ISR_RXFT /*!< RX FIFO threshold flag */ +#define LL_LPUART_ISR_TXFT USART_ISR_TXFT /*!< TX FIFO threshold flag */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions + * @{ + */ +#define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */ +#define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE /*!< Read data register and RXFIFO not empty + interrupt enable */ +#define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */ +#define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE /*!< Transmit data register empty and TX FIFO + not full interrupt enable */ +#define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ +#define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */ +#define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE /*!< TX FIFO empty interrupt enable */ +#define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE /*!< RX FIFO full interrupt enable */ +#define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */ +#define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */ +#define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */ +#define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE /*!< TX FIFO threshold interrupt enable */ +#define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE /*!< RX FIFO threshold interrupt enable */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_FIFOTHRESHOLD FIFO Threshold + * @{ + */ +#define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U /*!< FIFO reaches 1/8 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U /*!< FIFO reaches 1/4 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U /*!< FIFO reaches 1/2 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U /*!< FIFO reaches 3/4 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U /*!< FIFO reaches 7/8 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U /*!< FIFO becomes empty for TX and full for RX */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DIRECTION Direction + * @{ + */ +#define LL_LPUART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */ +#define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */ +#define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */ +#define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_PARITY Parity Control + * @{ + */ +#define LL_LPUART_PARITY_NONE 0x00000000U /*!< Parity control disabled */ +#define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */ +#define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_WAKEUP Wakeup + * @{ + */ +#define LL_LPUART_WAKEUP_IDLELINE 0x00000000U /*!< LPUART wake up from Mute mode on Idle Line */ +#define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up from Mute mode on Address Mark */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth + * @{ + */ +#define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */ +#define LL_LPUART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */ +#define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_PRESCALER Clock Source Prescaler + * @{ + */ +#define LL_LPUART_PRESCALER_DIV1 0x00000000U /*!< Input clock not divided */ +#define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) /*!< Input clock divided by 2 */ +#define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) /*!< Input clock divided by 4 */ +#define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 6 */ +#define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) /*!< Input clock divided by 8 */ +#define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 10 */ +#define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 |\ + USART_PRESC_PRESCALER_1) /*!< Input clock divided by 12 */ +#define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 |\ + USART_PRESC_PRESCALER_1 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 16 */ +#define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) /*!< Input clock divided by 32 */ +#define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 64 */ +#define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 |\ + USART_PRESC_PRESCALER_1) /*!< Input clock divided by 128 */ +#define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 |\ + USART_PRESC_PRESCALER_1 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 256 */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_STOPBITS Stop Bits + * @{ + */ +#define LL_LPUART_STOPBITS_1 0x00000000U /*!< 1 stop bit */ +#define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap + * @{ + */ +#define LL_LPUART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */ +#define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion + * @{ + */ +#define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */ +#define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion + * @{ + */ +#define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */ +#define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion + * @{ + */ +#define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received + in positive/direct logic. (1=H, 0=L) */ +#define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received + in negative/inverse logic. (1=L, 0=H). + The parity bit is also inverted. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_BITORDER Bit Order + * @{ + */ +#define LL_LPUART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, + following the start bit */ +#define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, + following the start bit */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection + * @{ + */ +#define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */ +#define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control + * @{ + */ +#define LL_LPUART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */ +#define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested + when there is space in the receive buffer */ +#define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted + when the nCTS input is asserted (tied to 0)*/ +#define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation + * @{ + */ +#define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake up active on address match */ +#define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */ +#define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity + * @{ + */ +#define LL_LPUART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */ +#define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data + * @{ + */ +#define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */ +#define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros + * @{ + */ + +/** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in LPUART register + * @param __INSTANCE__ LPUART Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in LPUART register + * @param __INSTANCE__ LPUART Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros + * @{ + */ + +/** + * @brief Compute LPUARTDIV value according to Peripheral Clock and + * expected Baud Rate (20-bit value of LPUARTDIV is returned) + * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance + * @param __PRESCALER__ This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @param __BAUDRATE__ Baud Rate value to achieve + * @retval LPUARTDIV value to be used for BRR register filling + */ +#define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) (uint32_t)\ + ((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(uint16_t)(__PRESCALER__)]))\ + * LPUART_LPUARTDIV_FREQ_MUL) + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__)) & LPUART_BRR_MASK) + +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions + * @{ + */ + +/** @defgroup LPUART_LL_EF_Configuration Configuration functions + * @{ + */ + +/** + * @brief LPUART Enable + * @rmtoll CR1 UE LL_LPUART_Enable + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR1, USART_CR1_UE); +} + +/** + * @brief LPUART Disable + * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately, + * and current operations are discarded. The configuration of the LPUART is kept, but all the status + * flags, in the LPUARTx_ISR are set to their default values. + * @note In order to go into low-power mode without generating errors on the line, + * the TE bit must be reset before and the software must wait + * for the TC bit in the LPUART_ISR to be set before resetting the UE bit. + * The DMA requests are also reset when UE = 0 so the DMA channel must + * be disabled before resetting the UE bit. + * @rmtoll CR1 UE LL_LPUART_Disable + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE); +} + +/** + * @brief Indicate if LPUART is enabled + * @rmtoll CR1 UE LL_LPUART_IsEnabled + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabled(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL); +} + +/** + * @brief FIFO Mode Enable + * @rmtoll CR1 FIFOEN LL_LPUART_EnableFIFO + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN); +} + +/** + * @brief FIFO Mode Disable + * @rmtoll CR1 FIFOEN LL_LPUART_DisableFIFO + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN); +} + +/** + * @brief Indicate if FIFO Mode is enabled + * @rmtoll CR1 FIFOEN LL_LPUART_IsEnabledFIFO + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL); +} + +/** + * @brief Configure TX FIFO Threshold + * @rmtoll CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold + * @param LPUARTx LPUART Instance + * @param Threshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); +} + +/** + * @brief Return TX FIFO Threshold Configuration + * @rmtoll CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); +} + +/** + * @brief Configure RX FIFO Threshold + * @rmtoll CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold + * @param LPUARTx LPUART Instance + * @param Threshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); +} + +/** + * @brief Return RX FIFO Threshold Configuration + * @rmtoll CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); +} + +/** + * @brief Configure TX and RX FIFOs Threshold + * @rmtoll CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold\n + * CR3 RXFTCFG LL_LPUART_ConfigFIFOsThreshold + * @param LPUARTx LPUART Instance + * @param TXThreshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @param RXThreshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | \ + (RXThreshold << USART_CR3_RXFTCFG_Pos)); +} + +/** + * @brief LPUART enabled in STOP Mode + * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that + * LPUART clock selection is HSI or LSE in RCC. + * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief LPUART disabled in STOP Mode + * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode + * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief Indicate if LPUART is enabled in STOP Mode + * (able to wake up MCU from Stop mode or not) + * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL); +} + +/** + * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit) + * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Receiver Disable + * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Transmitter Enable + * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Transmitter Disable + * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Configure simultaneously enabled/disabled states + * of Transmitter and Receiver + * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n + * CR1 TE LL_LPUART_SetTransferDirection + * @param LPUARTx LPUART Instance + * @param TransferDirection This parameter can be one of the following values: + * @arg @ref LL_LPUART_DIRECTION_NONE + * @arg @ref LL_LPUART_DIRECTION_RX + * @arg @ref LL_LPUART_DIRECTION_TX + * @arg @ref LL_LPUART_DIRECTION_TX_RX + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); +} + +/** + * @brief Return enabled/disabled states of Transmitter and Receiver + * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n + * CR1 TE LL_LPUART_GetTransferDirection + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_DIRECTION_NONE + * @arg @ref LL_LPUART_DIRECTION_RX + * @arg @ref LL_LPUART_DIRECTION_TX + * @arg @ref LL_LPUART_DIRECTION_TX_RX + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE)); +} + +/** + * @brief Configure Parity (enabled/disabled and parity mode if enabled) + * @note This function selects if hardware parity control (generation and detection) is enabled or disabled. + * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position + * (depending on data width) and parity is checked on the received data. + * @rmtoll CR1 PS LL_LPUART_SetParity\n + * CR1 PCE LL_LPUART_SetParity + * @param LPUARTx LPUART Instance + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_LPUART_PARITY_NONE + * @arg @ref LL_LPUART_PARITY_EVEN + * @arg @ref LL_LPUART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity); +} + +/** + * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) + * @rmtoll CR1 PS LL_LPUART_GetParity\n + * CR1 PCE LL_LPUART_GetParity + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_PARITY_NONE + * @arg @ref LL_LPUART_PARITY_EVEN + * @arg @ref LL_LPUART_PARITY_ODD + */ +__STATIC_INLINE uint32_t LL_LPUART_GetParity(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); +} + +/** + * @brief Set Receiver Wake Up method from Mute mode. + * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod + * @param LPUARTx LPUART Instance + * @param Method This parameter can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_IDLELINE + * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method); +} + +/** + * @brief Return Receiver Wake Up method from Mute mode + * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_IDLELINE + * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK + */ +__STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE)); +} + +/** + * @brief Set Word length (nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M LL_LPUART_SetDataWidth + * @param LPUARTx LPUART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_LPUART_DATAWIDTH_7B + * @arg @ref LL_LPUART_DATAWIDTH_8B + * @arg @ref LL_LPUART_DATAWIDTH_9B + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth); +} + +/** + * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M LL_LPUART_GetDataWidth + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_DATAWIDTH_7B + * @arg @ref LL_LPUART_DATAWIDTH_8B + * @arg @ref LL_LPUART_DATAWIDTH_9B + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M)); +} + +/** + * @brief Allow switch between Mute Mode and Active mode + * @rmtoll CR1 MME LL_LPUART_EnableMuteMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Prevent Mute Mode use. Set Receiver in active mode permanently. + * @rmtoll CR1 MME LL_LPUART_DisableMuteMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Indicate if switch between Mute Mode and Active mode is allowed + * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL); +} + +/** + * @brief Configure Clock source prescaler for baudrate generator and oversampling + * @rmtoll PRESC PRESCALER LL_LPUART_SetPrescaler + * @param LPUARTx LPUART Instance + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue) +{ + MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue); +} + +/** + * @brief Retrieve the Clock source prescaler for baudrate generator and oversampling + * @rmtoll PRESC PRESCALER LL_LPUART_GetPrescaler + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER)); +} + +/** + * @brief Set the length of the stop bits + * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength + * @param LPUARTx LPUART Instance + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_LPUART_STOPBITS_1 + * @arg @ref LL_LPUART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Retrieve the length of the stop bits + * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_STOPBITS_1 + * @arg @ref LL_LPUART_STOPBITS_2 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP)); +} + +/** + * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits) + * @note Call of this function is equivalent to following function call sequence : + * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function + * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function + * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function + * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n + * CR1 PCE LL_LPUART_ConfigCharacter\n + * CR1 M LL_LPUART_ConfigCharacter\n + * CR2 STOP LL_LPUART_ConfigCharacter + * @param LPUARTx LPUART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_LPUART_DATAWIDTH_7B + * @arg @ref LL_LPUART_DATAWIDTH_8B + * @arg @ref LL_LPUART_DATAWIDTH_9B + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_LPUART_PARITY_NONE + * @arg @ref LL_LPUART_PARITY_EVEN + * @arg @ref LL_LPUART_PARITY_ODD + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_LPUART_STOPBITS_1 + * @arg @ref LL_LPUART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity, + uint32_t StopBits) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); + MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Configure TX/RX pins swapping setting. + * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap + * @param LPUARTx LPUART Instance + * @param SwapConfig This parameter can be one of the following values: + * @arg @ref LL_LPUART_TXRX_STANDARD + * @arg @ref LL_LPUART_TXRX_SWAPPED + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig); +} + +/** + * @brief Retrieve TX/RX pins swapping configuration. + * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_TXRX_STANDARD + * @arg @ref LL_LPUART_TXRX_SWAPPED + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP)); +} + +/** + * @brief Configure RX pin active level logic + * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel + * @param LPUARTx LPUART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod); +} + +/** + * @brief Retrieve RX pin active level logic configuration + * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV)); +} + +/** + * @brief Configure TX pin active level logic + * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel + * @param LPUARTx LPUART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod); +} + +/** + * @brief Retrieve TX pin active level logic configuration + * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV)); +} + +/** + * @brief Configure Binary data logic. + * + * @note Allow to define how Logical data from the data register are send/received : + * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H) + * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic + * @param LPUARTx LPUART Instance + * @param DataLogic This parameter can be one of the following values: + * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic); +} + +/** + * @brief Retrieve Binary data configuration + * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE + */ +__STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV)); +} + +/** + * @brief Configure transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder + * @param LPUARTx LPUART Instance + * @param BitOrder This parameter can be one of the following values: + * @arg @ref LL_LPUART_BITORDER_LSBFIRST + * @arg @ref LL_LPUART_BITORDER_MSBFIRST + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder); +} + +/** + * @brief Return transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_BITORDER_LSBFIRST + * @arg @ref LL_LPUART_BITORDER_MSBFIRST + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST)); +} + +/** + * @brief Set Address of the LPUART node. + * @note This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with address mark detection. + * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7. + * (b7-b4 should be set to 0) + * 8bits address node is used when 7-bit Address Detection is selected in ADDM7. + * (This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with 7-bit address mark detection. + * The MSB of the character sent by the transmitter should be equal to 1. + * It may also be used for character detection during normal reception, + * Mute mode inactive (for example, end of block detection in ModBus protocol). + * In this case, the whole received character (8-bit) is compared to the ADD[7:0] + * value and CMF flag is set on match) + * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n + * CR2 ADDM7 LL_LPUART_ConfigNodeAddress + * @param LPUARTx LPUART Instance + * @param AddressLen This parameter can be one of the following values: + * @arg @ref LL_LPUART_ADDRESS_DETECT_4B + * @arg @ref LL_LPUART_ADDRESS_DETECT_7B + * @param NodeAddress 4 or 7 bit Address of the LPUART node. + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, + (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos))); +} + +/** + * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2. + * @note If 4-bit Address Detection is selected in ADDM7, + * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) + * If 7-bit Address Detection is selected in ADDM7, + * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant) + * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress + * @param LPUARTx LPUART Instance + * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255) + */ +__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos); +} + +/** + * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) + * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_ADDRESS_DETECT_4B + * @arg @ref LL_LPUART_ADDRESS_DETECT_7B + */ +__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7)); +} + +/** + * @brief Enable RTS HW Flow Control + * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Disable RTS HW Flow Control + * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Enable CTS HW Flow Control + * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Disable CTS HW Flow Control + * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Configure HW Flow Control mode (both CTS and RTS) + * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n + * CR3 CTSE LL_LPUART_SetHWFlowCtrl + * @param LPUARTx LPUART Instance + * @param HardwareFlowControl This parameter can be one of the following values: + * @arg @ref LL_LPUART_HWCONTROL_NONE + * @arg @ref LL_LPUART_HWCONTROL_RTS + * @arg @ref LL_LPUART_HWCONTROL_CTS + * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl) +{ + MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); +} + +/** + * @brief Return HW Flow Control configuration (both CTS and RTS) + * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n + * CR3 CTSE LL_LPUART_GetHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_HWCONTROL_NONE + * @arg @ref LL_LPUART_HWCONTROL_RTS + * @arg @ref LL_LPUART_HWCONTROL_CTS + * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS + */ +__STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); +} + +/** + * @brief Enable Overrun detection + * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Disable Overrun detection + * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Indicate if Overrun detection is enabled + * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL); +} + +/** + * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @rmtoll CR3 WUS LL_LPUART_SetWKUPType + * @param LPUARTx LPUART Instance + * @param Type This parameter can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS + * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT + * @arg @ref LL_LPUART_WAKEUP_ON_RXNE + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type) +{ + MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type); +} + +/** + * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @rmtoll CR3 WUS LL_LPUART_GetWKUPType + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS + * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT + * @arg @ref LL_LPUART_WAKEUP_ON_RXNE + */ +__STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS)); +} + +/** + * @brief Configure LPUART BRR register for achieving expected Baud Rate value. + * + * @note Compute and set LPUARTDIV value in BRR Register (full BRR content) + * according to used Peripheral Clock and expected Baud Rate values + * @note Peripheral clock and Baud Rate values provided as function parameters should be valid + * (Baud rate value != 0). + * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit, + * a care should be taken when generating high baud rates using high PeriphClk + * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate]. + * @rmtoll BRR BRR LL_LPUART_SetBaudRate + * @param LPUARTx LPUART Instance + * @param PeriphClk Peripheral Clock + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @param BaudRate Baud Rate + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue, + uint32_t BaudRate) +{ + if (BaudRate != 0U) + { + LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate); + } +} + +/** + * @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register + * (full BRR content), and to used Peripheral Clock values + * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned. + * @rmtoll BRR BRR LL_LPUART_GetBaudRate + * @param LPUARTx LPUART Instance + * @param PeriphClk Peripheral Clock + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @retval Baud Rate + */ +__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(const USART_TypeDef *LPUARTx, uint32_t PeriphClk, + uint32_t PrescalerValue) +{ + uint32_t lpuartdiv; + uint32_t brrresult; + uint32_t periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[(uint16_t)PrescalerValue])); + + lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK; + + if (lpuartdiv >= LPUART_BRR_MIN_VALUE) + { + brrresult = (uint32_t)(((uint64_t)(periphclkpresc) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv); + } + else + { + brrresult = 0x0UL; + } + + return (brrresult); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature + * @{ + */ + +/** + * @brief Enable Single Wire Half-Duplex mode + * @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Disable Single Wire Half-Duplex mode + * @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Indicate if Single Wire Half-Duplex mode is enabled + * @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature + * @{ + */ + +/** + * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime + * @param LPUARTx LPUART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos); +} + +/** + * @brief Return DEDT (Driver Enable De-Assertion Time) + * @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime + * @param LPUARTx LPUART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : c + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos); +} + +/** + * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime + * @param LPUARTx LPUART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); +} + +/** + * @brief Return DEAT (Driver Enable Assertion Time) + * @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime + * @param LPUARTx LPUART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos); +} + +/** + * @brief Enable Driver Enable (DE) Mode + * @rmtoll CR3 DEM LL_LPUART_EnableDEMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Disable Driver Enable (DE) Mode + * @rmtoll CR3 DEM LL_LPUART_DisableDEMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Indicate if Driver Enable (DE) Mode is enabled + * @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); +} + +/** + * @brief Select Driver Enable Polarity + * @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity + * @param LPUARTx LPUART Instance + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_LPUART_DE_POLARITY_HIGH + * @arg @ref LL_LPUART_DE_POLARITY_LOW + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity) +{ + MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity); +} + +/** + * @brief Return Driver Enable Polarity + * @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_DE_POLARITY_HIGH + * @arg @ref LL_LPUART_DE_POLARITY_LOW + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP)); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Check if the LPUART Parity Error Flag is set or not + * @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Framing Error Flag is set or not + * @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Noise error detected Flag is set or not + * @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART OverRun Error Flag is set or not + * @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART IDLE line detected Flag is set or not + * @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL); +} + +#define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE /* Redefinition for legacy purpose */ + +/** + * @brief Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not + * @rmtoll ISR RXNE_RXFNE LL_LPUART_IsActiveFlag_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Transmission Complete Flag is set or not + * @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL); +} + +#define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF /* Redefinition for legacy purpose */ + +/** + * @brief Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not + * @rmtoll ISR TXE_TXFNF LL_LPUART_IsActiveFlag_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART CTS interrupt Flag is set or not + * @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART CTS Flag is set or not + * @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Busy Flag is set or not + * @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Character Match Flag is set or not + * @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Send Break Flag is set or not + * @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not + * @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Wake Up from stop mode Flag is set or not + * @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not + * @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not + * @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART TX FIFO Empty Flag is set or not + * @rmtoll ISR TXFE LL_LPUART_IsActiveFlag_TXFE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART RX FIFO Full Flag is set or not + * @rmtoll ISR RXFF LL_LPUART_IsActiveFlag_RXFF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART TX FIFO Threshold Flag is set or not + * @rmtoll ISR TXFT LL_LPUART_IsActiveFlag_TXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART RX FIFO Threshold Flag is set or not + * @rmtoll ISR RXFT LL_LPUART_IsActiveFlag_RXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL); +} + +/** + * @brief Clear Parity Error Flag + * @rmtoll ICR PECF LL_LPUART_ClearFlag_PE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_PECF); +} + +/** + * @brief Clear Framing Error Flag + * @rmtoll ICR FECF LL_LPUART_ClearFlag_FE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_FECF); +} + +/** + * @brief Clear Noise detected Flag + * @rmtoll ICR NECF LL_LPUART_ClearFlag_NE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_NECF); +} + +/** + * @brief Clear OverRun Error Flag + * @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF); +} + +/** + * @brief Clear IDLE line detected Flag + * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF); +} + +/** + * @brief Clear Transmission Complete Flag + * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF); +} + +/** + * @brief Clear CTS Interrupt Flag + * @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF); +} + +/** + * @brief Clear Character Match Flag + * @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF); +} + +/** + * @brief Clear Wake Up from stop mode Flag + * @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_IT_Management IT_Management + * @{ + */ + +/** + * @brief Enable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); +} + +#define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE /* Redefinition for legacy purpose */ + +/** + * @brief Enable RX Not Empty and RX FIFO Not Empty Interrupt + * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); +} + +/** + * @brief Enable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TCIE); +} + +#define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF /* Redefinition for legacy purpose */ + +/** + * @brief Enable TX Empty and TX FIFO Not Full Interrupt + * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); +} + +/** + * @brief Enable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Enable Character Match Interrupt + * @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Enable TX FIFO Empty Interrupt + * @rmtoll CR1 TXFEIE LL_LPUART_EnableIT_TXFE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); +} + +/** + * @brief Enable RX FIFO Full Interrupt + * @rmtoll CR1 RXFFIE LL_LPUART_EnableIT_RXFF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); +} + +/** + * @brief Enable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register). + * - 0: Interrupt is inhibited + * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register. + * @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Enable CTS Interrupt + * @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Enable Wake Up from Stop Mode Interrupt + * @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE); +} + +/** + * @brief Enable TX FIFO Threshold Interrupt + * @rmtoll CR3 TXFTIE LL_LPUART_EnableIT_TXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); +} + +/** + * @brief Enable RX FIFO Threshold Interrupt + * @rmtoll CR3 RXFTIE LL_LPUART_EnableIT_RXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); +} + +/** + * @brief Disable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); +} + +#define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE /* Redefinition for legacy purpose */ + +/** + * @brief Disable RX Not Empty and RX FIFO Not Empty Interrupt + * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); +} + +/** + * @brief Disable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE); +} + +#define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF /* Redefinition for legacy purpose */ + +/** + * @brief Disable TX Empty and TX FIFO Not Full Interrupt + * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); +} + +/** + * @brief Disable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Disable Character Match Interrupt + * @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Disable TX FIFO Empty Interrupt + * @rmtoll CR1 TXFEIE LL_LPUART_DisableIT_TXFE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); +} + +/** + * @brief Disable RX FIFO Full Interrupt + * @rmtoll CR1 RXFFIE LL_LPUART_DisableIT_RXFF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); +} + +/** + * @brief Disable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register). + * - 0: Interrupt is inhibited + * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register. + * @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Disable CTS Interrupt + * @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Disable Wake Up from Stop Mode Interrupt + * @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE); +} + +/** + * @brief Disable TX FIFO Threshold Interrupt + * @rmtoll CR3 TXFTIE LL_LPUART_DisableIT_TXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); +} + +/** + * @brief Disable RX FIFO Threshold Interrupt + * @rmtoll CR3 RXFTIE LL_LPUART_DisableIT_RXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); +} + +/** + * @brief Check if the LPUART IDLE Interrupt source is enabled or disabled. + * @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); +} + +#define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE /* Redefinition for legacy purpose */ + +/** + * @brief Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled. + * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_IsEnabledIT_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled. + * @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL); +} + +#define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF /* Redefinition for legacy purpose */ + +/** + * @brief Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled + * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_IsEnabledIT_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Parity Error Interrupt is enabled or disabled. + * @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Character Match Interrupt is enabled or disabled. + * @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled + * @rmtoll CR1 TXFEIE LL_LPUART_IsEnabledIT_TXFE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART RX FIFO Full Interrupt is enabled or disabled + * @rmtoll CR1 RXFFIE LL_LPUART_IsEnabledIT_RXFF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Error Interrupt is enabled or disabled. + * @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART CTS Interrupt is enabled or disabled. + * @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled. + * @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled + * @rmtoll CR3 TXFTIE LL_LPUART_IsEnabledIT_TXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled + * @rmtoll CR3 RXFTIE LL_LPUART_IsEnabledIT_RXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_DMA_Management DMA_Management + * @{ + */ + +/** + * @brief Enable DMA Mode for reception + * @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Disable DMA Mode for reception + * @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Check if DMA Mode is enabled for reception + * @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Disable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Check if DMA Mode is enabled for transmission + * @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Disable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Indicate if DMA Disabling on Reception Error is disabled + * @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL); +} + +/** + * @brief Get the LPUART data register address used for DMA transfer + * @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n + * @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr + * @param LPUARTx LPUART Instance + * @param Direction This parameter can be one of the following values: + * @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT + * @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE + * @retval Address of data register + */ +__STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(const USART_TypeDef *LPUARTx, uint32_t Direction) +{ + uint32_t data_reg_addr; + + if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT) + { + /* return address of TDR register */ + data_reg_addr = (uint32_t) &(LPUARTx->TDR); + } + else + { + /* return address of RDR register */ + data_reg_addr = (uint32_t) &(LPUARTx->RDR); + } + + return data_reg_addr; +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Data_Management Data_Management + * @{ + */ + +/** + * @brief Read Receiver Data register (Receive Data value, 8 bits) + * @rmtoll RDR RDR LL_LPUART_ReceiveData8 + * @param LPUARTx LPUART Instance + * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF + */ +__STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(const USART_TypeDef *LPUARTx) +{ + return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR) & 0xFFU); +} + +/** + * @brief Read Receiver Data register (Receive Data value, 9 bits) + * @rmtoll RDR RDR LL_LPUART_ReceiveData9 + * @param LPUARTx LPUART Instance + * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF + */ +__STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(const USART_TypeDef *LPUARTx) +{ + return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR)); +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) + * @rmtoll TDR TDR LL_LPUART_TransmitData8 + * @param LPUARTx LPUART Instance + * @param Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value) +{ + LPUARTx->TDR = Value; +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits) + * @rmtoll TDR TDR LL_LPUART_TransmitData9 + * @param LPUARTx LPUART Instance + * @param Value between Min_Data=0x00 and Max_Data=0x1FF + * @retval None + */ +__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value) +{ + LPUARTx->TDR = Value & 0x1FFUL; +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Execution Execution + * @{ + */ + +/** + * @brief Request Break sending + * @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_SBKRQ); +} + +/** + * @brief Put LPUART in mute mode and set the RWU flag + * @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_MMRQ); +} + +/** + * @brief Request a Receive Data and FIFO flush + * @note Allows to discard the received data without reading them, and avoid an overrun + * condition. + * @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_RXFRQ); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions + * @{ + */ +ErrorStatus LL_LPUART_DeInit(const USART_TypeDef *LPUARTx); +ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, const LL_LPUART_InitTypeDef *LPUART_InitStruct); +void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct); +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* LPUART1 */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_LL_LPUART_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h new file mode 100644 index 0000000..e3c1bef --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h @@ -0,0 +1,1602 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_pwr.h + * @author MCD Application Team + * @brief Header file of PWR LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_LL_PWR_H +#define STM32G4xx_LL_PWR_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined(PWR) + +/** @defgroup PWR_LL PWR + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/* Private constants ---------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants + * @{ + */ + +/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_PWR_WriteReg function + * @{ + */ +#define LL_PWR_SCR_CSBF PWR_SCR_CSBF +#define LL_PWR_SCR_CWUF PWR_SCR_CWUF +#define LL_PWR_SCR_CWUF5 PWR_SCR_CWUF5 +#define LL_PWR_SCR_CWUF4 PWR_SCR_CWUF4 +#define LL_PWR_SCR_CWUF3 PWR_SCR_CWUF3 +#define LL_PWR_SCR_CWUF2 PWR_SCR_CWUF2 +#define LL_PWR_SCR_CWUF1 PWR_SCR_CWUF1 +/** + * @} + */ + +/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_PWR_ReadReg function + * @{ + */ +#define LL_PWR_SR1_WUFI PWR_SR1_WUFI +#define LL_PWR_SR1_SBF PWR_SR1_SBF +#define LL_PWR_SR1_WUF5 PWR_SR1_WUF5 +#define LL_PWR_SR1_WUF4 PWR_SR1_WUF4 +#define LL_PWR_SR1_WUF3 PWR_SR1_WUF3 +#define LL_PWR_SR1_WUF2 PWR_SR1_WUF2 +#define LL_PWR_SR1_WUF1 PWR_SR1_WUF1 +#if defined(PWR_SR2_PVMO4) +#define LL_PWR_SR2_PVMO4 PWR_SR2_PVMO4 +#endif /* PWR_SR2_PVMO4 */ +#if defined(PWR_SR2_PVMO3) +#define LL_PWR_SR2_PVMO3 PWR_SR2_PVMO3 +#endif /* PWR_SR2_PVMO3 */ +#if defined(PWR_SR2_PVMO2) +#define LL_PWR_SR2_PVMO2 PWR_SR2_PVMO2 +#endif /* PWR_SR2_PVMO2 */ +#if defined(PWR_SR2_PVMO1) +#define LL_PWR_SR2_PVMO1 PWR_SR2_PVMO1 +#endif /* PWR_SR2_PVMO1 */ +#define LL_PWR_SR2_PVDO PWR_SR2_PVDO +#define LL_PWR_SR2_VOSF PWR_SR2_VOSF +#define LL_PWR_SR2_REGLPF PWR_SR2_REGLPF +#define LL_PWR_SR2_REGLPS PWR_SR2_REGLPS +/** + * @} + */ + +/** @defgroup PWR_LL_EC_REGU_VOLTAGE REGU VOLTAGE + * @{ + */ +#define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR1_VOS_0) +#define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR1_VOS_1) +/** + * @} + */ + +/** @defgroup PWR_LL_EC_MODE_PWR MODE PWR + * @{ + */ +#define LL_PWR_MODE_STOP0 (PWR_CR1_LPMS_STOP0) +#define LL_PWR_MODE_STOP1 (PWR_CR1_LPMS_STOP1) +#define LL_PWR_MODE_STANDBY (PWR_CR1_LPMS_STANDBY) +#define LL_PWR_MODE_SHUTDOWN (PWR_CR1_LPMS_SHUTDOWN) +/** + * @} + */ + +/** @defgroup PWR_LL_EC_PVM_VDDUSB_1 Peripheral voltage monitoring + * @{ + */ +#if defined(PWR_CR2_PVME1) +#define LL_PWR_PVM_VDDA_COMP (PWR_CR2_PVME1) /* Monitoring VDDA vs. x.xV */ +#endif +#if defined(PWR_CR2_PVME2) +#define LL_PWR_PVM_VDDA_FASTDAC (PWR_CR2_PVME2) /* Monitoring VDDA vs. x.xV */ +#endif +#if defined(PWR_CR2_PVME3) +#define LL_PWR_PVM_VDDA_ADC (PWR_CR2_PVME3) /* Monitoring VDDA vs. 1.62V */ +#endif +#if defined(PWR_CR2_PVME4) +#define LL_PWR_PVM_VDDA_OPAMP_DAC (PWR_CR2_PVME4) /* Monitoring VDDA vs. 1x.xV */ +#endif +/** + * @} + */ + +/** @defgroup PWR_LL_EC_PVDLEVEL PVDLEVEL + * @{ + */ +#define LL_PWR_PVDLEVEL_0 (PWR_CR2_PLS_LEV0) /* VPVD0 around 2.0 V */ +#define LL_PWR_PVDLEVEL_1 (PWR_CR2_PLS_LEV1) /* VPVD1 around 2.2 V */ +#define LL_PWR_PVDLEVEL_2 (PWR_CR2_PLS_LEV2) /* VPVD2 around 2.4 V */ +#define LL_PWR_PVDLEVEL_3 (PWR_CR2_PLS_LEV3) /* VPVD3 around 2.5 V */ +#define LL_PWR_PVDLEVEL_4 (PWR_CR2_PLS_LEV4) /* VPVD4 around 2.6 V */ +#define LL_PWR_PVDLEVEL_5 (PWR_CR2_PLS_LEV5) /* VPVD5 around 2.8 V */ +#define LL_PWR_PVDLEVEL_6 (PWR_CR2_PLS_LEV6) /* VPVD6 around 2.9 V */ +#define LL_PWR_PVDLEVEL_7 (PWR_CR2_PLS_LEV7) /* External input analog voltage (Compare internally to VREFINT) */ +/** + * @} + */ + +/** @defgroup PWR_LL_EC_WAKEUP WAKEUP + * @{ + */ +#define LL_PWR_WAKEUP_PIN1 (PWR_CR3_EWUP1) +#define LL_PWR_WAKEUP_PIN2 (PWR_CR3_EWUP2) +#define LL_PWR_WAKEUP_PIN3 (PWR_CR3_EWUP3) +#define LL_PWR_WAKEUP_PIN4 (PWR_CR3_EWUP4) +#define LL_PWR_WAKEUP_PIN5 (PWR_CR3_EWUP5) +/** + * @} + */ + +/** @defgroup PWR_LL_EC_BATT_CHARG_RESISTOR BATT CHARG RESISTOR + * @{ + */ +#define LL_PWR_BATT_CHARG_RESISTOR_5K ((uint32_t)0x00000000) +#define LL_PWR_BATT_CHARGRESISTOR_1_5K (PWR_CR4_VBRS) +/** + * @} + */ + +/** @defgroup PWR_LL_EC_GPIO GPIO + * @{ + */ +#define LL_PWR_GPIO_A ((uint32_t)(&(PWR->PUCRA))) +#define LL_PWR_GPIO_B ((uint32_t)(&(PWR->PUCRB))) +#define LL_PWR_GPIO_C ((uint32_t)(&(PWR->PUCRC))) +#define LL_PWR_GPIO_D ((uint32_t)(&(PWR->PUCRD))) +#define LL_PWR_GPIO_E ((uint32_t)(&(PWR->PUCRE))) +#define LL_PWR_GPIO_F ((uint32_t)(&(PWR->PUCRF))) +#define LL_PWR_GPIO_G ((uint32_t)(&(PWR->PUCRG))) +/** + * @} + */ + +/** @defgroup PWR_LL_EC_GPIO_BIT GPIO BIT + * @{ + */ +#define LL_PWR_GPIO_BIT_0 ((uint32_t)0x00000001) +#define LL_PWR_GPIO_BIT_1 ((uint32_t)0x00000002) +#define LL_PWR_GPIO_BIT_2 ((uint32_t)0x00000004) +#define LL_PWR_GPIO_BIT_3 ((uint32_t)0x00000008) +#define LL_PWR_GPIO_BIT_4 ((uint32_t)0x00000010) +#define LL_PWR_GPIO_BIT_5 ((uint32_t)0x00000020) +#define LL_PWR_GPIO_BIT_6 ((uint32_t)0x00000040) +#define LL_PWR_GPIO_BIT_7 ((uint32_t)0x00000080) +#define LL_PWR_GPIO_BIT_8 ((uint32_t)0x00000100) +#define LL_PWR_GPIO_BIT_9 ((uint32_t)0x00000200) +#define LL_PWR_GPIO_BIT_10 ((uint32_t)0x00000400) +#define LL_PWR_GPIO_BIT_11 ((uint32_t)0x00000800) +#define LL_PWR_GPIO_BIT_12 ((uint32_t)0x00001000) +#define LL_PWR_GPIO_BIT_13 ((uint32_t)0x00002000) +#define LL_PWR_GPIO_BIT_14 ((uint32_t)0x00004000) +#define LL_PWR_GPIO_BIT_15 ((uint32_t)0x00008000) +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros + * @{ + */ + +/** @defgroup PWR_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in PWR register + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) + +/** + * @brief Read a value in PWR register + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) +/** + * @} + */ + +/** + * @} + */ + + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions + * @{ + */ + +/** @defgroup PWR_LL_EF_Configuration Configuration + * @{ + */ + +/** + * @brief Switch the regulator from main mode to low-power mode + * @rmtoll CR1 LPR LL_PWR_EnableLowPowerRunMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void) +{ + SET_BIT(PWR->CR1, PWR_CR1_LPR); +} + +/** + * @brief Switch the regulator from low-power mode to main mode + * @rmtoll CR1 LPR LL_PWR_DisableLowPowerRunMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void) +{ + CLEAR_BIT(PWR->CR1, PWR_CR1_LPR); +} + +/** + * @brief Check if the regulator is in low-power mode + * @rmtoll CR1 LPR LL_PWR_IsEnabledLowPowerRunMode + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR1, PWR_CR1_LPR); + + return ((temp == (PWR_CR1_LPR))?1U:0U); + +} + +/** + * @brief Switch from run main mode to run low-power mode. + * @rmtoll CR1 LPR LL_PWR_EnterLowPowerRunMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void) +{ + LL_PWR_EnableLowPowerRunMode(); +} + +/** + * @brief Switch from run main mode to low-power mode. + * @rmtoll CR1 LPR LL_PWR_ExitLowPowerRunMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void) +{ + LL_PWR_DisableLowPowerRunMode(); +} + +/** + * @brief Set the main internal regulator output voltage + * @rmtoll CR1 VOS LL_PWR_SetRegulVoltageScaling + * @param VoltageScaling This parameter can be one of the following values: + * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 + * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) +{ + MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); +} + +/** + * @brief Get the main internal regulator output voltage + * @rmtoll CR1 VOS LL_PWR_GetRegulVoltageScaling + * @retval Returned value can be one of the following values: + * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 + * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 + */ +__STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void) +{ + return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_VOS)); +} + +#if defined(PWR_CR5_R1MODE) +/** + * @brief Enable main regulator voltage range 1 boost mode + * @rmtoll CR5 R1MODE LL_PWR_EnableRange1BoostMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableRange1BoostMode(void) +{ + CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); +} + +/** + * @brief Disable main regulator voltage range 1 boost mode + * @rmtoll CR5 R1MODE LL_PWR_DisableRange1BoostMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableRange1BoostMode(void) +{ + SET_BIT(PWR->CR5, PWR_CR5_R1MODE); +} + +/** + * @brief Check if the main regulator voltage range 1 boost mode is enabled + * @rmtoll CR5 R1MODE LL_PWR_IsEnabledRange1BoostMode + * @retval Inverted state of bit (0 or 1). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledRange1BoostMode(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR5, PWR_CR5_R1MODE); + + return ((temp == (0U))?1U:0U); +} +#endif /* PWR_CR5_R1MODE */ + +/** + * @brief Enable access to the backup domain + * @rmtoll CR1 DBP LL_PWR_EnableBkUpAccess + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) +{ + SET_BIT(PWR->CR1, PWR_CR1_DBP); +} + +/** + * @brief Disable access to the backup domain + * @rmtoll CR1 DBP LL_PWR_DisableBkUpAccess + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) +{ + CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); +} + +/** + * @brief Check if the backup domain is enabled + * @rmtoll CR1 DBP LL_PWR_IsEnabledBkUpAccess + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR1, PWR_CR1_DBP); + + return ((temp == (PWR_CR1_DBP))?1U:0U); + +} + +/** + * @brief Set Low-Power mode + * @rmtoll CR1 LPMS LL_PWR_SetPowerMode + * @param LowPowerMode This parameter can be one of the following values: + * @arg @ref LL_PWR_MODE_STOP0 + * @arg @ref LL_PWR_MODE_STOP1 + * @arg @ref LL_PWR_MODE_STANDBY + * @arg @ref LL_PWR_MODE_SHUTDOWN + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t LowPowerMode) +{ + MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, LowPowerMode); +} + +/** + * @brief Get Low-Power mode + * @rmtoll CR1 LPMS LL_PWR_GetPowerMode + * @retval Returned value can be one of the following values: + * @arg @ref LL_PWR_MODE_STOP0 + * @arg @ref LL_PWR_MODE_STOP1 + * @arg @ref LL_PWR_MODE_STANDBY + * @arg @ref LL_PWR_MODE_SHUTDOWN + */ +__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) +{ + return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPMS)); +} + +#if defined(PWR_CR3_UCPD_STDBY) +/** + * @brief Enable the USB Type-C and Power Delivery memorization in Standby mode. + * @note This function must be called just before entering Standby mode. + * @rmtoll CR3 UCPD_STDBY LL_PWR_EnableUCPDStandbyMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableUCPDStandbyMode(void) +{ + SET_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY); +} + +/** + * @brief Disable the USB Type-C and Power Delivery memorization in Standby mode. + * @note This function must be called after exiting Standby mode and before any + * UCPD configuration update. + * @rmtoll CR3 UCPD_STDBY LL_PWR_DisableUCPDStandbyMode + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableUCPDStandbyMode(void) +{ + CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY); +} + +/** + * @brief Check the USB Type-C and Power Delivery Standby mode memorization state. + * @rmtoll CR3 UCPD_STDBY LL_PWR_IsEnabledUCPDStandbyMode + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledUCPDStandbyMode(void) +{ + + return ((READ_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY) == (PWR_CR3_UCPD_STDBY)) ? 1UL : 0UL); + +} +#endif /* PWR_CR3_UCPD_STDBY */ + +#if defined(PWR_CR3_UCPD_DBDIS) +/** + * @brief Enable the USB Type-C and power delivery dead battery pull-down behavior + * on UCPD CC1 and CC2 pins. + * @note After exiting reset, the USB Type-C dead battery behavior is enabled, + * which may have a pull-down effect on CC1 and CC2 pins. It is recommended + * to disable it in all cases, either to stop this pull-down or to hand over + * control to the UCPD (which should therefore be initialized before doing the disable). + * @rmtoll CR3 UCPD_DBDIS LL_PWR_EnableUCPDDeadBattery + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableUCPDDeadBattery(void) +{ + CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS); +} + +/** + * @brief Disable the USB Type-C and power delivery dead battery pull-down behavior + * on UCPD CC1 and CC2 pins. + * @note After exiting reset, the USB Type-C dead battery behavior is enabled, + * which may have a pull-down effect on CC1 and CC2 pins. It is recommended + * to disable it in all cases, either to stop this pull-down or to hand over + * control to the UCPD (which should therefore be initialized before doing the disable). + * @rmtoll CR3 UCPD_DBDIS LL_PWR_DisableUCPDDeadBattery + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableUCPDDeadBattery(void) +{ + SET_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS); +} + +/** + * @brief Check the USB Type-C and power delivery dead battery pull-down behavior + * on UCPD CC1 and CC2 pins. + * @note After exiting reset, the USB Type-C dead battery behavior is enabled, + * which may have a pull-down effect on CC1 and CC2 pins. It is recommended + * to disable it in all cases, either to stop this pull-down or to hand over + * control to the UCPD (which should therefore be initialized before doing the disable). + * @rmtoll CR3 UCPD_DBDIS LL_PWR_IsEnabledUCPDDeadBattery + * @retval State of feature (1 : enabled; 0 : disabled). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledUCPDDeadBattery(void) +{ + return ((READ_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS) == (PWR_CR3_UCPD_DBDIS)) ? 0UL : 1UL); +} +#endif /* PWR_CR3_UCPD_DBDIS */ + +#if defined(PWR_CR2_USV) +/** + * @brief Enable VDDUSB supply + * @rmtoll CR2 USV LL_PWR_EnableVddUSB + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableVddUSB(void) +{ + SET_BIT(PWR->CR2, PWR_CR2_USV); +} + +/** + * @brief Disable VDDUSB supply + * @rmtoll CR2 USV LL_PWR_DisableVddUSB + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableVddUSB(void) +{ + CLEAR_BIT(PWR->CR2, PWR_CR2_USV); +} + +/** + * @brief Check if VDDUSB supply is enabled + * @rmtoll CR2 USV LL_PWR_IsEnabledVddUSB + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledVddUSB(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR2, PWR_CR2_USV); + + return ((temp == (PWR_CR2_USV))?1U:0U); + +} +#endif + +#if defined(PWR_CR2_IOSV) +/** + * @brief Enable VDDIO2 supply + * @rmtoll CR2 IOSV LL_PWR_EnableVddIO2 + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableVddIO2(void) +{ + SET_BIT(PWR->CR2, PWR_CR2_IOSV); +} + +/** + * @brief Disable VDDIO2 supply + * @rmtoll CR2 IOSV LL_PWR_DisableVddIO2 + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableVddIO2(void) +{ + CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); +} + +/** + * @brief Check if VDDIO2 supply is enabled + * @rmtoll CR2 IOSV LL_PWR_IsEnabledVddIO2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledVddIO2(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR2, PWR_CR2_IOSV); + + return ((temp == (PWR_CR2_IOSV))?1U:0U); + +} +#endif + +/** + * @brief Enable the Power Voltage Monitoring on a peripheral + * @rmtoll CR2 PVME1 LL_PWR_EnablePVM\n + * CR2 PVME2 LL_PWR_EnablePVM\n + * CR2 PVME3 LL_PWR_EnablePVM\n + * CR2 PVME4 LL_PWR_EnablePVM + * @param PeriphVoltage This parameter can be one of the following values: + * @arg @ref LL_PWR_PVM_VDDA_COMP (*) + * @arg @ref LL_PWR_PVM_VDDA_FASTDAC (*) + * @arg @ref LL_PWR_PVM_VDDA_ADC + * @arg @ref LL_PWR_PVM_VDDA_OPAMP_DAC + * + * (*) value not defined in all devices + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnablePVM(uint32_t PeriphVoltage) +{ + SET_BIT(PWR->CR2, PeriphVoltage); +} + +/** + * @brief Disable the Power Voltage Monitoring on a peripheral + * @rmtoll CR2 PVME1 LL_PWR_DisablePVM\n + * CR2 PVME2 LL_PWR_DisablePVM\n + * CR2 PVME3 LL_PWR_DisablePVM\n + * CR2 PVME4 LL_PWR_DisablePVM + * @param PeriphVoltage This parameter can be one of the following values: + * @arg @ref LL_PWR_PVM_VDDA_COMP (*) + * @arg @ref LL_PWR_PVM_VDDA_FASTDAC (*) + * @arg @ref LL_PWR_PVM_VDDA_ADC + * @arg @ref LL_PWR_PVM_VDDA_OPAMP_DAC + * + * (*) value not defined in all devices + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisablePVM(uint32_t PeriphVoltage) +{ + CLEAR_BIT(PWR->CR2, PeriphVoltage); +} + +/** + * @brief Check if Power Voltage Monitoring is enabled on a peripheral + * @rmtoll CR2 PVME1 LL_PWR_IsEnabledPVM\n + * CR2 PVME2 LL_PWR_IsEnabledPVM\n + * CR2 PVME3 LL_PWR_IsEnabledPVM\n + * CR2 PVME4 LL_PWR_IsEnabledPVM + * @param PeriphVoltage This parameter can be one of the following values: + * @arg @ref LL_PWR_PVM_VDDA_COMP (*) + * @arg @ref LL_PWR_PVM_VDDA_FASTDAC (*) + * @arg @ref LL_PWR_PVM_VDDA_ADC + * @arg @ref LL_PWR_PVM_VDDA_OPAMP_DAC + * + * (*) value not defined in all devices + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVM(uint32_t PeriphVoltage) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR2, PeriphVoltage); + + return ((temp == (PeriphVoltage))?1U:0U); + +} + +/** + * @brief Configure the voltage threshold detected by the Power Voltage Detector + * @rmtoll CR2 PLS LL_PWR_SetPVDLevel + * @param PVDLevel This parameter can be one of the following values: + * @arg @ref LL_PWR_PVDLEVEL_0 + * @arg @ref LL_PWR_PVDLEVEL_1 + * @arg @ref LL_PWR_PVDLEVEL_2 + * @arg @ref LL_PWR_PVDLEVEL_3 + * @arg @ref LL_PWR_PVDLEVEL_4 + * @arg @ref LL_PWR_PVDLEVEL_5 + * @arg @ref LL_PWR_PVDLEVEL_6 + * @arg @ref LL_PWR_PVDLEVEL_7 + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) +{ + MODIFY_REG(PWR->CR2, PWR_CR2_PLS, PVDLevel); +} + +/** + * @brief Get the voltage threshold detection + * @rmtoll CR2 PLS LL_PWR_GetPVDLevel + * @retval Returned value can be one of the following values: + * @arg @ref LL_PWR_PVDLEVEL_0 + * @arg @ref LL_PWR_PVDLEVEL_1 + * @arg @ref LL_PWR_PVDLEVEL_2 + * @arg @ref LL_PWR_PVDLEVEL_3 + * @arg @ref LL_PWR_PVDLEVEL_4 + * @arg @ref LL_PWR_PVDLEVEL_5 + * @arg @ref LL_PWR_PVDLEVEL_6 + * @arg @ref LL_PWR_PVDLEVEL_7 + */ +__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) +{ + return (uint32_t)(READ_BIT(PWR->CR2, PWR_CR2_PLS)); +} + +/** + * @brief Enable Power Voltage Detector + * @rmtoll CR2 PVDE LL_PWR_EnablePVD + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnablePVD(void) +{ + SET_BIT(PWR->CR2, PWR_CR2_PVDE); +} + +/** + * @brief Disable Power Voltage Detector + * @rmtoll CR2 PVDE LL_PWR_DisablePVD + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisablePVD(void) +{ + CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE); +} + +/** + * @brief Check if Power Voltage Detector is enabled + * @rmtoll CR2 PVDE LL_PWR_IsEnabledPVD + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR2, PWR_CR2_PVDE); + + return ((temp == (PWR_CR2_PVDE))?1U:0U); +} + +/** + * @brief Enable Internal Wake-up line + * @rmtoll CR3 EIWF LL_PWR_EnableInternWU + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableInternWU(void) +{ + SET_BIT(PWR->CR3, PWR_CR3_EIWF); +} + +/** + * @brief Disable Internal Wake-up line + * @rmtoll CR3 EIWF LL_PWR_DisableInternWU + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableInternWU(void) +{ + CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF); +} + +/** + * @brief Check if Internal Wake-up line is enabled + * @rmtoll CR3 EIWF LL_PWR_IsEnabledInternWU + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledInternWU(void) +{ + return ((READ_BIT(PWR->CR3, PWR_CR3_EIWF) == (PWR_CR3_EIWF))?1UL:0UL); +} + +/** + * @brief Enable pull-up and pull-down configuration + * @rmtoll CR3 APC LL_PWR_EnablePUPDCfg + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnablePUPDCfg(void) +{ + SET_BIT(PWR->CR3, PWR_CR3_APC); +} + +/** + * @brief Disable pull-up and pull-down configuration + * @rmtoll CR3 APC LL_PWR_DisablePUPDCfg + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisablePUPDCfg(void) +{ + CLEAR_BIT(PWR->CR3, PWR_CR3_APC); +} + +/** + * @brief Check if pull-up and pull-down configuration is enabled + * @rmtoll CR3 APC LL_PWR_IsEnabledPUPDCfg + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledPUPDCfg(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR3, PWR_CR3_APC); + + return ((temp == (PWR_CR3_APC))?1U:0U); +} + +/** + * @brief Enable SRAM2 content retention in Standby mode + * @rmtoll CR3 RRS LL_PWR_EnableSRAM2Retention + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableSRAM2Retention(void) +{ + SET_BIT(PWR->CR3, PWR_CR3_RRS); +} + +/** + * @brief Disable SRAM2 content retention in Standby mode + * @rmtoll CR3 RRS LL_PWR_DisableSRAM2Retention + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableSRAM2Retention(void) +{ + CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); +} + +/** + * @brief Check if SRAM2 content retention in Standby mode is enabled + * @rmtoll CR3 RRS LL_PWR_IsEnabledSRAM2Retention + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledSRAM2Retention(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR3, PWR_CR3_RRS); + + return ((temp == (PWR_CR3_RRS))?1U:0U); +} + +/** + * @brief Enable the WakeUp PINx functionality + * @rmtoll CR3 EWUP1 LL_PWR_EnableWakeUpPin\n + * CR3 EWUP2 LL_PWR_EnableWakeUpPin\n + * CR3 EWUP3 LL_PWR_EnableWakeUpPin\n + * CR3 EWUP4 LL_PWR_EnableWakeUpPin\n + * CR3 EWUP5 LL_PWR_EnableWakeUpPin\n + * @param WakeUpPin This parameter can be one of the following values: + * @arg @ref LL_PWR_WAKEUP_PIN1 + * @arg @ref LL_PWR_WAKEUP_PIN2 + * @arg @ref LL_PWR_WAKEUP_PIN3 + * @arg @ref LL_PWR_WAKEUP_PIN4 + * @arg @ref LL_PWR_WAKEUP_PIN5 + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) +{ + SET_BIT(PWR->CR3, WakeUpPin); +} + +/** + * @brief Disable the WakeUp PINx functionality + * @rmtoll CR3 EWUP1 LL_PWR_DisableWakeUpPin\n + * CR3 EWUP2 LL_PWR_DisableWakeUpPin\n + * CR3 EWUP3 LL_PWR_DisableWakeUpPin\n + * CR3 EWUP4 LL_PWR_DisableWakeUpPin\n + * CR3 EWUP5 LL_PWR_DisableWakeUpPin\n + * @param WakeUpPin This parameter can be one of the following values: + * @arg @ref LL_PWR_WAKEUP_PIN1 + * @arg @ref LL_PWR_WAKEUP_PIN2 + * @arg @ref LL_PWR_WAKEUP_PIN3 + * @arg @ref LL_PWR_WAKEUP_PIN4 + * @arg @ref LL_PWR_WAKEUP_PIN5 + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) +{ + CLEAR_BIT(PWR->CR3, WakeUpPin); +} + +/** + * @brief Check if the WakeUp PINx functionality is enabled + * @rmtoll CR3 EWUP1 LL_PWR_IsEnabledWakeUpPin\n + * CR3 EWUP2 LL_PWR_IsEnabledWakeUpPin\n + * CR3 EWUP3 LL_PWR_IsEnabledWakeUpPin\n + * CR3 EWUP4 LL_PWR_IsEnabledWakeUpPin\n + * CR3 EWUP5 LL_PWR_IsEnabledWakeUpPin\n + * @param WakeUpPin This parameter can be one of the following values: + * @arg @ref LL_PWR_WAKEUP_PIN1 + * @arg @ref LL_PWR_WAKEUP_PIN2 + * @arg @ref LL_PWR_WAKEUP_PIN3 + * @arg @ref LL_PWR_WAKEUP_PIN4 + * @arg @ref LL_PWR_WAKEUP_PIN5 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR3, WakeUpPin); + + return ((temp == (WakeUpPin))?1U:0U); +} + +/** + * @brief Set the resistor impedance + * @rmtoll CR4 VBRS LL_PWR_SetBattChargResistor + * @param Resistor This parameter can be one of the following values: + * @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K + * @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetBattChargResistor(uint32_t Resistor) +{ + MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, Resistor); +} + +/** + * @brief Get the resistor impedance + * @rmtoll CR4 VBRS LL_PWR_GetBattChargResistor + * @retval Returned value can be one of the following values: + * @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K + * @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K + */ +__STATIC_INLINE uint32_t LL_PWR_GetBattChargResistor(void) +{ + return (uint32_t)(READ_BIT(PWR->CR4, PWR_CR4_VBRS)); +} + +/** + * @brief Enable battery charging + * @rmtoll CR4 VBE LL_PWR_EnableBatteryCharging + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableBatteryCharging(void) +{ + SET_BIT(PWR->CR4, PWR_CR4_VBE); +} + +/** + * @brief Disable battery charging + * @rmtoll CR4 VBE LL_PWR_DisableBatteryCharging + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableBatteryCharging(void) +{ + CLEAR_BIT(PWR->CR4, PWR_CR4_VBE); +} + +/** + * @brief Check if battery charging is enabled + * @rmtoll CR4 VBE LL_PWR_IsEnabledBatteryCharging + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledBatteryCharging(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR4, PWR_CR4_VBE); + + return ((temp == (PWR_CR4_VBE))?1U:0U); +} + +/** + * @brief Set the Wake-Up pin polarity low for the event detection + * @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityLow\n + * CR4 WP2 LL_PWR_SetWakeUpPinPolarityLow\n + * CR4 WP3 LL_PWR_SetWakeUpPinPolarityLow\n + * CR4 WP4 LL_PWR_SetWakeUpPinPolarityLow\n + * CR4 WP5 LL_PWR_SetWakeUpPinPolarityLow + * @param WakeUpPin This parameter can be one of the following values: + * @arg @ref LL_PWR_WAKEUP_PIN1 + * @arg @ref LL_PWR_WAKEUP_PIN2 + * @arg @ref LL_PWR_WAKEUP_PIN3 + * @arg @ref LL_PWR_WAKEUP_PIN4 + * @arg @ref LL_PWR_WAKEUP_PIN5 + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityLow(uint32_t WakeUpPin) +{ + SET_BIT(PWR->CR4, WakeUpPin); +} + +/** + * @brief Set the Wake-Up pin polarity high for the event detection + * @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityHigh\n + * CR4 WP2 LL_PWR_SetWakeUpPinPolarityHigh\n + * CR4 WP3 LL_PWR_SetWakeUpPinPolarityHigh\n + * CR4 WP4 LL_PWR_SetWakeUpPinPolarityHigh\n + * CR4 WP5 LL_PWR_SetWakeUpPinPolarityHigh + * @param WakeUpPin This parameter can be one of the following values: + * @arg @ref LL_PWR_WAKEUP_PIN1 + * @arg @ref LL_PWR_WAKEUP_PIN2 + * @arg @ref LL_PWR_WAKEUP_PIN3 + * @arg @ref LL_PWR_WAKEUP_PIN4 + * @arg @ref LL_PWR_WAKEUP_PIN5 + * @retval None + */ +__STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityHigh(uint32_t WakeUpPin) +{ + CLEAR_BIT(PWR->CR4, WakeUpPin); +} + +/** + * @brief Get the Wake-Up pin polarity for the event detection + * @rmtoll CR4 WP1 LL_PWR_IsWakeUpPinPolarityLow\n + * CR4 WP2 LL_PWR_IsWakeUpPinPolarityLow\n + * CR4 WP3 LL_PWR_IsWakeUpPinPolarityLow\n + * CR4 WP4 LL_PWR_IsWakeUpPinPolarityLow\n + * CR4 WP5 LL_PWR_IsWakeUpPinPolarityLow + * @param WakeUpPin This parameter can be one of the following values: + * @arg @ref LL_PWR_WAKEUP_PIN1 + * @arg @ref LL_PWR_WAKEUP_PIN2 + * @arg @ref LL_PWR_WAKEUP_PIN3 + * @arg @ref LL_PWR_WAKEUP_PIN4 + * @arg @ref LL_PWR_WAKEUP_PIN5 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsWakeUpPinPolarityLow(uint32_t WakeUpPin) +{ + uint32_t temp; + temp = READ_BIT(PWR->CR4, WakeUpPin); + + return ((temp == (WakeUpPin))?1U:0U); +} + +/** + * @brief Enable GPIO pull-up state in Standby and Shutdown modes + * @rmtoll PUCRA PU0-15 LL_PWR_EnableGPIOPullUp\n + * PUCRB PU0-15 LL_PWR_EnableGPIOPullUp\n + * PUCRC PU0-15 LL_PWR_EnableGPIOPullUp\n + * PUCRD PU0-15 LL_PWR_EnableGPIOPullUp\n + * PUCRE PU0-15 LL_PWR_EnableGPIOPullUp\n + * PUCRF PU0-15 LL_PWR_EnableGPIOPullUp\n + * PUCRG PU0-15 LL_PWR_EnableGPIOPullUp\n + * @param GPIO This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_A + * @arg @ref LL_PWR_GPIO_B + * @arg @ref LL_PWR_GPIO_C + * @arg @ref LL_PWR_GPIO_D + * @arg @ref LL_PWR_GPIO_E + * @arg @ref LL_PWR_GPIO_F + * @arg @ref LL_PWR_GPIO_G + * + * (*) value not defined in all devices + * @param GPIONumber This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_BIT_0 + * @arg @ref LL_PWR_GPIO_BIT_1 + * @arg @ref LL_PWR_GPIO_BIT_2 + * @arg @ref LL_PWR_GPIO_BIT_3 + * @arg @ref LL_PWR_GPIO_BIT_4 + * @arg @ref LL_PWR_GPIO_BIT_5 + * @arg @ref LL_PWR_GPIO_BIT_6 + * @arg @ref LL_PWR_GPIO_BIT_7 + * @arg @ref LL_PWR_GPIO_BIT_8 + * @arg @ref LL_PWR_GPIO_BIT_9 + * @arg @ref LL_PWR_GPIO_BIT_10 + * @arg @ref LL_PWR_GPIO_BIT_11 + * @arg @ref LL_PWR_GPIO_BIT_12 + * @arg @ref LL_PWR_GPIO_BIT_13 + * @arg @ref LL_PWR_GPIO_BIT_14 + * @arg @ref LL_PWR_GPIO_BIT_15 + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) +{ + SET_BIT(*((__IO uint32_t *)GPIO), GPIONumber); +} + +/** + * @brief Disable GPIO pull-up state in Standby and Shutdown modes + * @rmtoll PUCRA PU0-15 LL_PWR_DisableGPIOPullUp\n + * PUCRB PU0-15 LL_PWR_DisableGPIOPullUp\n + * PUCRC PU0-15 LL_PWR_DisableGPIOPullUp\n + * PUCRD PU0-15 LL_PWR_DisableGPIOPullUp\n + * PUCRE PU0-15 LL_PWR_DisableGPIOPullUp\n + * PUCRF PU0-15 LL_PWR_DisableGPIOPullUp\n + * PUCRG PU0-15 LL_PWR_DisableGPIOPullUp\n + * @param GPIO This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_A + * @arg @ref LL_PWR_GPIO_B + * @arg @ref LL_PWR_GPIO_C + * @arg @ref LL_PWR_GPIO_D + * @arg @ref LL_PWR_GPIO_E + * @arg @ref LL_PWR_GPIO_F + * @arg @ref LL_PWR_GPIO_G + * + * (*) value not defined in all devices + * @param GPIONumber This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_BIT_0 + * @arg @ref LL_PWR_GPIO_BIT_1 + * @arg @ref LL_PWR_GPIO_BIT_2 + * @arg @ref LL_PWR_GPIO_BIT_3 + * @arg @ref LL_PWR_GPIO_BIT_4 + * @arg @ref LL_PWR_GPIO_BIT_5 + * @arg @ref LL_PWR_GPIO_BIT_6 + * @arg @ref LL_PWR_GPIO_BIT_7 + * @arg @ref LL_PWR_GPIO_BIT_8 + * @arg @ref LL_PWR_GPIO_BIT_9 + * @arg @ref LL_PWR_GPIO_BIT_10 + * @arg @ref LL_PWR_GPIO_BIT_11 + * @arg @ref LL_PWR_GPIO_BIT_12 + * @arg @ref LL_PWR_GPIO_BIT_13 + * @arg @ref LL_PWR_GPIO_BIT_14 + * @arg @ref LL_PWR_GPIO_BIT_15 + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) +{ + CLEAR_BIT(*((__IO uint32_t *)GPIO), GPIONumber); +} + +/** + * @brief Check if GPIO pull-up state is enabled + * @rmtoll PUCRA PU0-15 LL_PWR_IsEnabledGPIOPullUp\n + * PUCRB PU0-15 LL_PWR_IsEnabledGPIOPullUp\n + * PUCRC PU0-15 LL_PWR_IsEnabledGPIOPullUp\n + * PUCRD PU0-15 LL_PWR_IsEnabledGPIOPullUp\n + * PUCRE PU0-15 LL_PWR_IsEnabledGPIOPullUp\n + * PUCRF PU0-15 LL_PWR_IsEnabledGPIOPullUp\n + * PUCRG PU0-15 LL_PWR_IsEnabledGPIOPullUp\n + * @param GPIO This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_A + * @arg @ref LL_PWR_GPIO_B + * @arg @ref LL_PWR_GPIO_C + * @arg @ref LL_PWR_GPIO_D + * @arg @ref LL_PWR_GPIO_E + * @arg @ref LL_PWR_GPIO_F + * @arg @ref LL_PWR_GPIO_G + * + * (*) value not defined in all devices + * @param GPIONumber This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_BIT_0 + * @arg @ref LL_PWR_GPIO_BIT_1 + * @arg @ref LL_PWR_GPIO_BIT_2 + * @arg @ref LL_PWR_GPIO_BIT_3 + * @arg @ref LL_PWR_GPIO_BIT_4 + * @arg @ref LL_PWR_GPIO_BIT_5 + * @arg @ref LL_PWR_GPIO_BIT_6 + * @arg @ref LL_PWR_GPIO_BIT_7 + * @arg @ref LL_PWR_GPIO_BIT_8 + * @arg @ref LL_PWR_GPIO_BIT_9 + * @arg @ref LL_PWR_GPIO_BIT_10 + * @arg @ref LL_PWR_GPIO_BIT_11 + * @arg @ref LL_PWR_GPIO_BIT_12 + * @arg @ref LL_PWR_GPIO_BIT_13 + * @arg @ref LL_PWR_GPIO_BIT_14 + * @arg @ref LL_PWR_GPIO_BIT_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) +{ + return ((READ_BIT(*((__IO uint32_t *)GPIO), GPIONumber) == (GPIONumber)) ? 1UL : 0UL); +} + +/** + * @brief Enable GPIO pull-down state in Standby and Shutdown modes + * @rmtoll PDCRA PD0-15 LL_PWR_EnableGPIOPullDown\n + * PDCRB PD0-15 LL_PWR_EnableGPIOPullDown\n + * PDCRC PD0-15 LL_PWR_EnableGPIOPullDown\n + * PDCRD PD0-15 LL_PWR_EnableGPIOPullDown\n + * PDCRE PD0-15 LL_PWR_EnableGPIOPullDown\n + * PDCRF PD0-15 LL_PWR_EnableGPIOPullDown\n + * PDCRG PD0-15 LL_PWR_EnableGPIOPullDown\n + * @param GPIO This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_A + * @arg @ref LL_PWR_GPIO_B + * @arg @ref LL_PWR_GPIO_C + * @arg @ref LL_PWR_GPIO_D + * @arg @ref LL_PWR_GPIO_E + * @arg @ref LL_PWR_GPIO_F + * @arg @ref LL_PWR_GPIO_G + * + * (*) value not defined in all devices + * @param GPIONumber This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_BIT_0 + * @arg @ref LL_PWR_GPIO_BIT_1 + * @arg @ref LL_PWR_GPIO_BIT_2 + * @arg @ref LL_PWR_GPIO_BIT_3 + * @arg @ref LL_PWR_GPIO_BIT_4 + * @arg @ref LL_PWR_GPIO_BIT_5 + * @arg @ref LL_PWR_GPIO_BIT_6 + * @arg @ref LL_PWR_GPIO_BIT_7 + * @arg @ref LL_PWR_GPIO_BIT_8 + * @arg @ref LL_PWR_GPIO_BIT_9 + * @arg @ref LL_PWR_GPIO_BIT_10 + * @arg @ref LL_PWR_GPIO_BIT_11 + * @arg @ref LL_PWR_GPIO_BIT_12 + * @arg @ref LL_PWR_GPIO_BIT_13 + * @arg @ref LL_PWR_GPIO_BIT_14 + * @arg @ref LL_PWR_GPIO_BIT_15 + * @retval None + */ +__STATIC_INLINE void LL_PWR_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) +{ + SET_BIT(*((__IO uint32_t *)(GPIO + 4U)), GPIONumber); +} + +/** + * @brief Disable GPIO pull-down state in Standby and Shutdown modes + * @rmtoll PDCRA PD0-15 LL_PWR_DisableGPIOPullDown\n + * PDCRB PD0-15 LL_PWR_DisableGPIOPullDown\n + * PDCRC PD0-15 LL_PWR_DisableGPIOPullDown\n + * PDCRD PD0-15 LL_PWR_DisableGPIOPullDown\n + * PDCRE PD0-15 LL_PWR_DisableGPIOPullDown\n + * PDCRF PD0-15 LL_PWR_DisableGPIOPullDown\n + * PDCRG PD0-15 LL_PWR_DisableGPIOPullDown\n + * @param GPIO This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_A + * @arg @ref LL_PWR_GPIO_B + * @arg @ref LL_PWR_GPIO_C + * @arg @ref LL_PWR_GPIO_D + * @arg @ref LL_PWR_GPIO_E + * @arg @ref LL_PWR_GPIO_F + * @arg @ref LL_PWR_GPIO_G + * + * (*) value not defined in all devices + * @param GPIONumber This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_BIT_0 + * @arg @ref LL_PWR_GPIO_BIT_1 + * @arg @ref LL_PWR_GPIO_BIT_2 + * @arg @ref LL_PWR_GPIO_BIT_3 + * @arg @ref LL_PWR_GPIO_BIT_4 + * @arg @ref LL_PWR_GPIO_BIT_5 + * @arg @ref LL_PWR_GPIO_BIT_6 + * @arg @ref LL_PWR_GPIO_BIT_7 + * @arg @ref LL_PWR_GPIO_BIT_8 + * @arg @ref LL_PWR_GPIO_BIT_9 + * @arg @ref LL_PWR_GPIO_BIT_10 + * @arg @ref LL_PWR_GPIO_BIT_11 + * @arg @ref LL_PWR_GPIO_BIT_12 + * @arg @ref LL_PWR_GPIO_BIT_13 + * @arg @ref LL_PWR_GPIO_BIT_14 + * @arg @ref LL_PWR_GPIO_BIT_15 + * @retval None + */ +__STATIC_INLINE void LL_PWR_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) +{ + CLEAR_BIT(*((__IO uint32_t *)(GPIO + 4U)), GPIONumber); +} + +/** + * @brief Check if GPIO pull-down state is enabled + * @rmtoll PDCRA PD0-15 LL_PWR_IsEnabledGPIOPullDown\n + * PDCRB PD0-15 LL_PWR_IsEnabledGPIOPullDown\n + * PDCRC PD0-15 LL_PWR_IsEnabledGPIOPullDown\n + * PDCRD PD0-15 LL_PWR_IsEnabledGPIOPullDown\n + * PDCRE PD0-15 LL_PWR_IsEnabledGPIOPullDown\n + * PDCRF PD0-15 LL_PWR_IsEnabledGPIOPullDown\n + * PDCRG PD0-15 LL_PWR_IsEnabledGPIOPullDown\n + * @param GPIO This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_A + * @arg @ref LL_PWR_GPIO_B + * @arg @ref LL_PWR_GPIO_C + * @arg @ref LL_PWR_GPIO_D + * @arg @ref LL_PWR_GPIO_E + * @arg @ref LL_PWR_GPIO_F + * @arg @ref LL_PWR_GPIO_G + * + * (*) value not defined in all devices + * @param GPIONumber This parameter can be one of the following values: + * @arg @ref LL_PWR_GPIO_BIT_0 + * @arg @ref LL_PWR_GPIO_BIT_1 + * @arg @ref LL_PWR_GPIO_BIT_2 + * @arg @ref LL_PWR_GPIO_BIT_3 + * @arg @ref LL_PWR_GPIO_BIT_4 + * @arg @ref LL_PWR_GPIO_BIT_5 + * @arg @ref LL_PWR_GPIO_BIT_6 + * @arg @ref LL_PWR_GPIO_BIT_7 + * @arg @ref LL_PWR_GPIO_BIT_8 + * @arg @ref LL_PWR_GPIO_BIT_9 + * @arg @ref LL_PWR_GPIO_BIT_10 + * @arg @ref LL_PWR_GPIO_BIT_11 + * @arg @ref LL_PWR_GPIO_BIT_12 + * @arg @ref LL_PWR_GPIO_BIT_13 + * @arg @ref LL_PWR_GPIO_BIT_14 + * @arg @ref LL_PWR_GPIO_BIT_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) +{ + return ((READ_BIT(*((__IO uint32_t *)(GPIO + 4U)), GPIONumber) == (GPIONumber)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Get Internal Wake-up line Flag + * @rmtoll SR1 WUFI LL_PWR_IsActiveFlag_InternWU + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_InternWU(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR1, PWR_SR1_WUFI); + + return ((temp == (PWR_SR1_WUFI))?1U:0U); + +} + +/** + * @brief Get Stand-By Flag + * @rmtoll SR1 SBF LL_PWR_IsActiveFlag_SB + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR1, PWR_SR1_SBF); + + return ((temp == (PWR_SR1_SBF))?1U:0U); + +} + +/** + * @brief Get Wake-up Flag 5 + * @rmtoll SR1 WUF5 LL_PWR_IsActiveFlag_WU5 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU5(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR1, PWR_SR1_WUF5); + + return ((temp == (PWR_SR1_WUF5))?1U:0U); +} + +/** + * @brief Get Wake-up Flag 4 + * @rmtoll SR1 WUF4 LL_PWR_IsActiveFlag_WU4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU4(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR1, PWR_SR1_WUF4); + + return ((temp == (PWR_SR1_WUF4))?1U:0U); +} + +/** + * @brief Get Wake-up Flag 3 + * @rmtoll SR1 WUF3 LL_PWR_IsActiveFlag_WU3 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU3(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR1, PWR_SR1_WUF3); + + return ((temp == (PWR_SR1_WUF3))?1U:0U); +} + +/** + * @brief Get Wake-up Flag 2 + * @rmtoll SR1 WUF2 LL_PWR_IsActiveFlag_WU2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU2(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR1, PWR_SR1_WUF2); + + return ((temp == (PWR_SR1_WUF2))?1U:0U); +} + +/** + * @brief Get Wake-up Flag 1 + * @rmtoll SR1 WUF1 LL_PWR_IsActiveFlag_WU1 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU1(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR1, PWR_SR1_WUF1); + + return ((temp == (PWR_SR1_WUF1))?1U:0U); +} + +/** + * @brief Clear Stand-By Flag + * @rmtoll SCR CSBF LL_PWR_ClearFlag_SB + * @retval None + */ +__STATIC_INLINE void LL_PWR_ClearFlag_SB(void) +{ + WRITE_REG(PWR->SCR, PWR_SCR_CSBF); +} + +/** + * @brief Clear Wake-up Flags + * @rmtoll SCR CWUF LL_PWR_ClearFlag_WU + * @retval None + */ +__STATIC_INLINE void LL_PWR_ClearFlag_WU(void) +{ + WRITE_REG(PWR->SCR, PWR_SCR_CWUF); +} + +/** + * @brief Clear Wake-up Flag 5 + * @rmtoll SCR CWUF5 LL_PWR_ClearFlag_WU5 + * @retval None + */ +__STATIC_INLINE void LL_PWR_ClearFlag_WU5(void) +{ + WRITE_REG(PWR->SCR, PWR_SCR_CWUF5); +} + +/** + * @brief Clear Wake-up Flag 4 + * @rmtoll SCR CWUF4 LL_PWR_ClearFlag_WU4 + * @retval None + */ +__STATIC_INLINE void LL_PWR_ClearFlag_WU4(void) +{ + WRITE_REG(PWR->SCR, PWR_SCR_CWUF4); +} + +/** + * @brief Clear Wake-up Flag 3 + * @rmtoll SCR CWUF3 LL_PWR_ClearFlag_WU3 + * @retval None + */ +__STATIC_INLINE void LL_PWR_ClearFlag_WU3(void) +{ + WRITE_REG(PWR->SCR, PWR_SCR_CWUF3); +} + +/** + * @brief Clear Wake-up Flag 2 + * @rmtoll SCR CWUF2 LL_PWR_ClearFlag_WU2 + * @retval None + */ +__STATIC_INLINE void LL_PWR_ClearFlag_WU2(void) +{ + WRITE_REG(PWR->SCR, PWR_SCR_CWUF2); +} + +/** + * @brief Clear Wake-up Flag 1 + * @rmtoll SCR CWUF1 LL_PWR_ClearFlag_WU1 + * @retval None + */ +__STATIC_INLINE void LL_PWR_ClearFlag_WU1(void) +{ + WRITE_REG(PWR->SCR, PWR_SCR_CWUF1); +} + +/** + * @brief Indicate whether VDDA voltage is below or above PVM4 threshold + * @rmtoll SR2 PVMO4 LL_PWR_IsActiveFlag_PVMO4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO4(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_PVMO4); + + return ((temp == (PWR_SR2_PVMO4))?1U:0U); + +} + +/** + * @brief Indicate whether VDDA voltage is below or above PVM3 threshold + * @rmtoll SR2 PVMO3 LL_PWR_IsActiveFlag_PVMO3 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO3(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_PVMO3); + + return ((temp == (PWR_SR2_PVMO3))?1U:0U); + +} + +#if defined(PWR_SR2_PVMO2) +/** + * @brief Indicate whether VDDIO2 voltage is below or above PVM2 threshold + * @rmtoll SR2 PVMO2 LL_PWR_IsActiveFlag_PVMO2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO2(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_PVMO2); + + return ((temp == (PWR_SR2_PVMO2))?1U:0U); + +} +#endif /* PWR_SR2_PVMO2 */ + +#if defined(PWR_SR2_PVMO1) +/** + * @brief Indicate whether VDDUSB voltage is below or above PVM1 threshold + * @rmtoll SR2 PVMO1 LL_PWR_IsActiveFlag_PVMO1 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO1(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_PVMO1); + + return ((temp == (PWR_SR2_PVMO1))?1U:0U); + +} +#endif /* PWR_SR2_PVMO1 */ + +/** + * @brief Indicate whether VDD voltage is below or above the selected PVD threshold + * @rmtoll SR2 PVDO LL_PWR_IsActiveFlag_PVDO + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_PVDO); + + return ((temp == (PWR_SR2_PVDO))?1U:0U); + +} + +/** + * @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level + * @rmtoll SR2 VOSF LL_PWR_IsActiveFlag_VOS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_VOSF); + + return ((temp == (PWR_SR2_VOSF))?1U:0U); + +} + +/** + * @brief Indicate whether the regulator is ready in main mode or is in low-power mode + * @note: Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing. + * @rmtoll SR2 REGLPF LL_PWR_IsActiveFlag_REGLPF + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_REGLPF); + + return ((temp == (PWR_SR2_REGLPF))?1U:0U); + +} + +/** + * @brief Indicate whether or not the low-power regulator is ready + * @rmtoll SR2 REGLPS LL_PWR_IsActiveFlag_REGLPS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPS(void) +{ + uint32_t temp; + temp = READ_BIT(PWR->SR2, PWR_SR2_REGLPS); + + return ((temp == (PWR_SR2_REGLPS))?1U:0U); + +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup PWR_LL_EF_Init De-initialization function + * @{ + */ +ErrorStatus LL_PWR_DeInit(void); +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** @defgroup PWR_LL_EF_Legacy_Functions Legacy functions name + * @{ + */ +/* Old functions name kept for legacy purpose, to be replaced by the */ +/* current functions name. */ +#define LL_PWR_IsActiveFlag_VOSF LL_PWR_IsActiveFlag_VOS +#define LL_PWR_EnableUSBDeadBattery LL_PWR_EnableUCPDDeadBattery +#define LL_PWR_DisableUSBDeadBattery LL_PWR_DisableUCPDDeadBattery +#define LL_PWR_IsEnabledUSBDeadBattery LL_PWR_IsEnabledUCPDDeadBattery +#define LL_PWR_EnableDeadBatteryPD LL_PWR_EnableUCPDDeadBattery +#define LL_PWR_DisableDeadBatteryPD LL_PWR_DisableUCPDDeadBattery +#define LL_PWR_EnableUSBStandByModePD LL_PWR_EnableUCPDStandbyMode +#define LL_PWR_EnableStandByModePD LL_PWR_EnableUCPDStandbyMode +#define LL_PWR_DisableUSBStandByModePD LL_PWR_DisableUCPDStandbyMode +#define LL_PWR_DisableStandByModePD LL_PWR_DisableUCPDStandbyMode +#define LL_PWR_IsEnabledUSBStandByModePD LL_PWR_IsEnabledUCPDStandbyMode +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined(PWR) */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_LL_PWR_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h new file mode 100644 index 0000000..9fef6c1 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h @@ -0,0 +1,2998 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_rcc.h + * @author MCD Application Team + * @brief Header file of RCC LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_LL_RCC_H +#define STM32G4xx_LL_RCC_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +/** @defgroup RCC_LL RCC + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup RCC_LL_Private_Variables RCC Private Variables + * @{ + */ + +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup RCC_LL_Private_Constants RCC Private Constants + * @{ + */ +/* Defines used to perform offsets*/ +/* Offset used to access to RCC_CCIPR and RCC_CCIPR2 registers */ +#define RCC_OFFSET_CCIPR 0U +#define RCC_OFFSET_CCIPR2 0x14U + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup RCC_LL_Private_Macros RCC Private Macros + * @{ + */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup RCC_LL_Exported_Types RCC Exported Types + * @{ + */ + +/** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure + * @{ + */ + +/** + * @brief RCC Clocks Frequency Structure + */ +typedef struct +{ + uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency */ + uint32_t HCLK_Frequency; /*!< HCLK clock frequency */ + uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency */ + uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency */ +} LL_RCC_ClocksTypeDef; + +/** + * @} + */ + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup RCC_LL_Exported_Constants RCC Exported Constants + * @{ + */ + +/** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation + * @brief Defines used to adapt values of different oscillators + * @note These values could be modified in the user environment according to + * HW set-up. + * @{ + */ +#if !defined (HSE_VALUE) +#define HSE_VALUE 8000000U /*!< Value of the HSE oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) +#define HSI_VALUE 16000000U /*!< Value of the HSI oscillator in Hz */ +#endif /* HSI_VALUE */ + +#if !defined (LSE_VALUE) +#define LSE_VALUE 32768U /*!< Value of the LSE oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSI_VALUE) +#define LSI_VALUE 32000U /*!< Value of the LSI oscillator in Hz */ +#endif /* LSI_VALUE */ + +#if !defined (HSI48_VALUE) +#define HSI48_VALUE 48000000U /*!< Value of the HSI48 oscillator in Hz */ +#endif /* HSI48_VALUE */ + +#if !defined (EXTERNAL_CLOCK_VALUE) +#define EXTERNAL_CLOCK_VALUE 48000U /*!< Value of the I2S_CKIN, I2S and SAI1 external clock source in Hz */ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/** + * @} + */ + +/** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_RCC_WriteReg function + * @{ + */ +#define LL_RCC_CICR_LSIRDYC RCC_CICR_LSIRDYC /*!< LSI Ready Interrupt Clear */ +#define LL_RCC_CICR_LSERDYC RCC_CICR_LSERDYC /*!< LSE Ready Interrupt Clear */ +#define LL_RCC_CICR_HSIRDYC RCC_CICR_HSIRDYC /*!< HSI Ready Interrupt Clear */ +#define LL_RCC_CICR_HSERDYC RCC_CICR_HSERDYC /*!< HSE Ready Interrupt Clear */ +#define LL_RCC_CICR_PLLRDYC RCC_CICR_PLLRDYC /*!< PLL Ready Interrupt Clear */ +#define LL_RCC_CICR_HSI48RDYC RCC_CICR_HSI48RDYC /*!< HSI48 Ready Interrupt Clear */ +#define LL_RCC_CICR_LSECSSC RCC_CICR_LSECSSC /*!< LSE Clock Security System Interrupt Clear */ +#define LL_RCC_CICR_CSSC RCC_CICR_CSSC /*!< Clock Security System Interrupt Clear */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_RCC_ReadReg function + * @{ + */ +#define LL_RCC_CIFR_LSIRDYF RCC_CIFR_LSIRDYF /*!< LSI Ready Interrupt flag */ +#define LL_RCC_CIFR_LSERDYF RCC_CIFR_LSERDYF /*!< LSE Ready Interrupt flag */ +#define LL_RCC_CIFR_HSIRDYF RCC_CIFR_HSIRDYF /*!< HSI Ready Interrupt flag */ +#define LL_RCC_CIFR_HSERDYF RCC_CIFR_HSERDYF /*!< HSE Ready Interrupt flag */ +#define LL_RCC_CIFR_PLLRDYF RCC_CIFR_PLLRDYF /*!< PLL Ready Interrupt flag */ +#define LL_RCC_CIFR_HSI48RDYF RCC_CIFR_HSI48RDYF /*!< HSI48 Ready Interrupt flag */ +#define LL_RCC_CIFR_LSECSSF RCC_CIFR_LSECSSF /*!< LSE Clock Security System Interrupt flag */ +#define LL_RCC_CIFR_CSSF RCC_CIFR_CSSF /*!< Clock Security System Interrupt flag */ +#define LL_RCC_CSR_LPWRRSTF RCC_CSR_LPWRRSTF /*!< Low-Power reset flag */ +#define LL_RCC_CSR_OBLRSTF RCC_CSR_OBLRSTF /*!< OBL reset flag */ +#define LL_RCC_CSR_PINRSTF RCC_CSR_PINRSTF /*!< PIN reset flag */ +#define LL_RCC_CSR_SFTRSTF RCC_CSR_SFTRSTF /*!< Software Reset flag */ +#define LL_RCC_CSR_IWDGRSTF RCC_CSR_IWDGRSTF /*!< Independent Watchdog reset flag */ +#define LL_RCC_CSR_WWDGRSTF RCC_CSR_WWDGRSTF /*!< Window watchdog reset flag */ +#define LL_RCC_CSR_BORRSTF RCC_CSR_BORRSTF /*!< BOR reset flag */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_RCC_ReadReg and LL_RCC_WriteReg functions + * @{ + */ +#define LL_RCC_CIER_LSIRDYIE RCC_CIER_LSIRDYIE /*!< LSI Ready Interrupt Enable */ +#define LL_RCC_CIER_LSERDYIE RCC_CIER_LSERDYIE /*!< LSE Ready Interrupt Enable */ +#define LL_RCC_CIER_HSIRDYIE RCC_CIER_HSIRDYIE /*!< HSI Ready Interrupt Enable */ +#define LL_RCC_CIER_HSERDYIE RCC_CIER_HSERDYIE /*!< HSE Ready Interrupt Enable */ +#define LL_RCC_CIER_PLLRDYIE RCC_CIER_PLLRDYIE /*!< PLL Ready Interrupt Enable */ +#define LL_RCC_CIER_HSI48RDYIE RCC_CIER_HSI48RDYIE /*!< HSI48 Ready Interrupt Enable */ +#define LL_RCC_CIER_LSECSSIE RCC_CIER_LSECSSIE /*!< LSE CSS Interrupt Enable */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_LSEDRIVE LSE oscillator drive capability + * @{ + */ +#define LL_RCC_LSEDRIVE_LOW 0x00000000U /*!< Xtal mode lower driving capability */ +#define LL_RCC_LSEDRIVE_MEDIUMLOW RCC_BDCR_LSEDRV_0 /*!< Xtal mode medium low driving capability */ +#define LL_RCC_LSEDRIVE_MEDIUMHIGH RCC_BDCR_LSEDRV_1 /*!< Xtal mode medium high driving capability */ +#define LL_RCC_LSEDRIVE_HIGH RCC_BDCR_LSEDRV /*!< Xtal mode higher driving capability */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_LSCO_CLKSOURCE LSCO Selection + * @{ + */ +#define LL_RCC_LSCO_CLKSOURCE_LSI 0x00000000U /*!< LSI selection for low speed clock */ +#define LL_RCC_LSCO_CLKSOURCE_LSE RCC_BDCR_LSCOSEL /*!< LSE selection for low speed clock */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_SYS_CLKSOURCE System clock switch + * @{ + */ +#define LL_RCC_SYS_CLKSOURCE_HSI RCC_CFGR_SW_HSI /*!< HSI selection as system clock */ +#define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_HSE /*!< HSE selection as system clock */ +#define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS System clock switch status + * @{ + */ +#define LL_RCC_SYS_CLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */ +#define LL_RCC_SYS_CLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /*!< HSE used as system clock */ +#define LL_RCC_SYS_CLKSOURCE_STATUS_PLL RCC_CFGR_SWS_PLL /*!< PLL used as system clock */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_SYSCLK_DIV AHB prescaler + * @{ + */ +#define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /*!< SYSCLK not divided */ +#define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ +#define LL_RCC_SYSCLK_DIV_4 RCC_CFGR_HPRE_DIV4 /*!< SYSCLK divided by 4 */ +#define LL_RCC_SYSCLK_DIV_8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */ +#define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */ +#define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */ +#define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */ +#define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */ +#define LL_RCC_SYSCLK_DIV_512 RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_APB1_DIV APB low-speed prescaler (APB1) + * @{ + */ +#define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */ +#define LL_RCC_APB1_DIV_2 RCC_CFGR_PPRE1_DIV2 /*!< HCLK divided by 2 */ +#define LL_RCC_APB1_DIV_4 RCC_CFGR_PPRE1_DIV4 /*!< HCLK divided by 4 */ +#define LL_RCC_APB1_DIV_8 RCC_CFGR_PPRE1_DIV8 /*!< HCLK divided by 8 */ +#define LL_RCC_APB1_DIV_16 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_APB2_DIV APB high-speed prescaler (APB2) + * @{ + */ +#define LL_RCC_APB2_DIV_1 RCC_CFGR_PPRE2_DIV1 /*!< HCLK not divided */ +#define LL_RCC_APB2_DIV_2 RCC_CFGR_PPRE2_DIV2 /*!< HCLK divided by 2 */ +#define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */ +#define LL_RCC_APB2_DIV_8 RCC_CFGR_PPRE2_DIV8 /*!< HCLK divided by 8 */ +#define LL_RCC_APB2_DIV_16 RCC_CFGR_PPRE2_DIV16 /*!< HCLK divided by 16 */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_MCO1SOURCE MCO1 SOURCE selection + * @{ + */ +#define LL_RCC_MCO1SOURCE_NOCLOCK 0x00000000U /*!< MCO output disabled, no clock on MCO */ +#define LL_RCC_MCO1SOURCE_SYSCLK RCC_CFGR_MCOSEL_0 /*!< SYSCLK selection as MCO1 source */ +#define LL_RCC_MCO1SOURCE_HSI (RCC_CFGR_MCOSEL_0| RCC_CFGR_MCOSEL_1) /*!< HSI16 selection as MCO1 source */ +#define LL_RCC_MCO1SOURCE_HSE RCC_CFGR_MCOSEL_2 /*!< HSE selection as MCO1 source */ +#define LL_RCC_MCO1SOURCE_PLLCLK (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_2) /*!< Main PLL selection as MCO1 source */ +#define LL_RCC_MCO1SOURCE_LSI (RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2) /*!< LSI selection as MCO1 source */ +#define LL_RCC_MCO1SOURCE_LSE (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2) /*!< LSE selection as MCO1 source */ +#define LL_RCC_MCO1SOURCE_HSI48 RCC_CFGR_MCOSEL_3 /*!< HSI48 selection as MCO1 source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_MCO1_DIV MCO1 prescaler + * @{ + */ +#define LL_RCC_MCO1_DIV_1 RCC_CFGR_MCOPRE_DIV1 /*!< MCO not divided */ +#define LL_RCC_MCO1_DIV_2 RCC_CFGR_MCOPRE_DIV2 /*!< MCO divided by 2 */ +#define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO divided by 4 */ +#define LL_RCC_MCO1_DIV_8 RCC_CFGR_MCOPRE_DIV8 /*!< MCO divided by 8 */ +#define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO divided by 16 */ +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency + * @{ + */ +#define LL_RCC_PERIPH_FREQUENCY_NO 0x00000000U /*!< No clock enabled for the peripheral */ +#define LL_RCC_PERIPH_FREQUENCY_NA 0xFFFFFFFFU /*!< Frequency cannot be provided as external clock */ +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** @defgroup RCC_LL_EC_USARTx_CLKSOURCE Peripheral USART clock source selection + * @{ + */ +#define LL_RCC_USART1_CLKSOURCE_PCLK2 (RCC_CCIPR_USART1SEL << 16U) /*!< PCLK2 clock used as USART1 clock source */ +#define LL_RCC_USART1_CLKSOURCE_SYSCLK ((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_0) /*!< SYSCLK clock used as USART1 clock source */ +#define LL_RCC_USART1_CLKSOURCE_HSI ((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_1) /*!< HSI clock used as USART1 clock source */ +#define LL_RCC_USART1_CLKSOURCE_LSE ((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL) /*!< LSE clock used as USART1 clock source */ +#define LL_RCC_USART2_CLKSOURCE_PCLK1 (RCC_CCIPR_USART2SEL << 16U) /*!< PCLK1 clock used as USART2 clock source */ +#define LL_RCC_USART2_CLKSOURCE_SYSCLK ((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_0) /*!< SYSCLK clock used as USART2 clock source */ +#define LL_RCC_USART2_CLKSOURCE_HSI ((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_1) /*!< HSI clock used as USART2 clock source */ +#define LL_RCC_USART2_CLKSOURCE_LSE ((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL) /*!< LSE clock used as USART2 clock source */ +#define LL_RCC_USART3_CLKSOURCE_PCLK1 (RCC_CCIPR_USART3SEL << 16U) /*!< PCLK1 clock used as USART3 clock source */ +#define LL_RCC_USART3_CLKSOURCE_SYSCLK ((RCC_CCIPR_USART3SEL << 16U) | RCC_CCIPR_USART3SEL_0) /*!< SYSCLK clock used as USART3 clock source */ +#define LL_RCC_USART3_CLKSOURCE_HSI ((RCC_CCIPR_USART3SEL << 16U) | RCC_CCIPR_USART3SEL_1) /*!< HSI clock used as USART3 clock source */ +#define LL_RCC_USART3_CLKSOURCE_LSE ((RCC_CCIPR_USART3SEL << 16U) | RCC_CCIPR_USART3SEL) /*!< LSE clock used as USART3 clock source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_UARTx_CLKSOURCE Peripheral UART clock source selection + * @{ + */ +#if defined(RCC_CCIPR_UART4SEL) +#define LL_RCC_UART4_CLKSOURCE_PCLK1 (RCC_CCIPR_UART4SEL << 16U) /*!< PCLK1 clock used as UART4 clock source */ +#define LL_RCC_UART4_CLKSOURCE_SYSCLK ((RCC_CCIPR_UART4SEL << 16U) | RCC_CCIPR_UART4SEL_0) /*!< SYSCLK clock used as UART4 clock source */ +#define LL_RCC_UART4_CLKSOURCE_HSI ((RCC_CCIPR_UART4SEL << 16U) | RCC_CCIPR_UART4SEL_1) /*!< HSI clock used as UART4 clock source */ +#define LL_RCC_UART4_CLKSOURCE_LSE ((RCC_CCIPR_UART4SEL << 16U) | RCC_CCIPR_UART4SEL) /*!< LSE clock used as UART4 clock source */ +#endif /* RCC_CCIPR_UART4SEL */ +#if defined(RCC_CCIPR_UART5SEL) +#define LL_RCC_UART5_CLKSOURCE_PCLK1 (RCC_CCIPR_UART5SEL << 16U) /*!< PCLK1 clock used as UART5 clock source */ +#define LL_RCC_UART5_CLKSOURCE_SYSCLK ((RCC_CCIPR_UART5SEL << 16U) | RCC_CCIPR_UART5SEL_0) /*!< SYSCLK clock used as UART5 clock source */ +#define LL_RCC_UART5_CLKSOURCE_HSI ((RCC_CCIPR_UART5SEL << 16U) | RCC_CCIPR_UART5SEL_1) /*!< HSI clock used as UART5 clock source */ +#define LL_RCC_UART5_CLKSOURCE_LSE ((RCC_CCIPR_UART5SEL << 16U) | RCC_CCIPR_UART5SEL) /*!< LSE clock used as UART5 clock source */ +#endif /* RCC_CCIPR_UART5SEL */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_LPUART1_CLKSOURCE Peripheral LPUART clock source selection + * @{ + */ +#define LL_RCC_LPUART1_CLKSOURCE_PCLK1 0x00000000U /*!< PCLK1 clock used as LPUART1 clock source */ +#define LL_RCC_LPUART1_CLKSOURCE_SYSCLK RCC_CCIPR_LPUART1SEL_0 /*!< SYSCLK clock used as LPUART1 clock source */ +#define LL_RCC_LPUART1_CLKSOURCE_HSI RCC_CCIPR_LPUART1SEL_1 /*!< HSI clock used as LPUART1 clock source */ +#define LL_RCC_LPUART1_CLKSOURCE_LSE RCC_CCIPR_LPUART1SEL /*!< LSE clock used as LPUART1 clock source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_I2Cx_CLKSOURCE Peripheral I2C clock source selection + * @{ + */ +#define LL_RCC_I2C1_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C1 clock source */ +#define LL_RCC_I2C1_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL_0 >> RCC_CCIPR_I2C1SEL_Pos)) /*!< SYSCLK clock used as I2C1 clock source */ +#define LL_RCC_I2C1_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL_1 >> RCC_CCIPR_I2C1SEL_Pos)) /*!< HSI clock used as I2C1 clock source */ +#define LL_RCC_I2C2_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C2 clock source */ +#define LL_RCC_I2C2_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL_0 >> RCC_CCIPR_I2C2SEL_Pos)) /*!< SYSCLK clock used as I2C2 clock source */ +#define LL_RCC_I2C2_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL_1 >> RCC_CCIPR_I2C2SEL_Pos)) /*!< HSI clock used as I2C2 clock source */ +#define LL_RCC_I2C3_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C3 clock source */ +#define LL_RCC_I2C3_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_0 >> RCC_CCIPR_I2C3SEL_Pos)) /*!< SYSCLK clock used as I2C3 clock source */ +#define LL_RCC_I2C3_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_1 >> RCC_CCIPR_I2C3SEL_Pos)) /*!< HSI clock used as I2C3 clock source */ +#if defined(RCC_CCIPR2_I2C4SEL) +#define LL_RCC_I2C4_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C4 clock source */ +#define LL_RCC_I2C4_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL_0 >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< SYSCLK clock used as I2C4 clock source */ +#define LL_RCC_I2C4_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL_1 >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< HSI clock used as I2C4 clock source */ +#endif /* RCC_CCIPR2_I2C4SEL */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_LPTIM1_CLKSOURCE Peripheral LPTIM clock source selection + * @{ + */ +#define LL_RCC_LPTIM1_CLKSOURCE_PCLK1 0x00000000U /*!< PCLK1 clock used as LPTIM1 clock source */ +#define LL_RCC_LPTIM1_CLKSOURCE_LSI RCC_CCIPR_LPTIM1SEL_0 /*!< LSI clock used as LPTIM1 clock source */ +#define LL_RCC_LPTIM1_CLKSOURCE_HSI RCC_CCIPR_LPTIM1SEL_1 /*!< HSI clock used as LPTIM1 clock source */ +#define LL_RCC_LPTIM1_CLKSOURCE_LSE RCC_CCIPR_LPTIM1SEL /*!< LSE clock used as LPTIM1 clock source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_SAI1_CLKSOURCE Peripheral SAI clock source selection + * @{ + */ +#define LL_RCC_SAI1_CLKSOURCE_SYSCLK 0x00000000U /*!< System clock used as SAI1 clock source */ +#define LL_RCC_SAI1_CLKSOURCE_PLL RCC_CCIPR_SAI1SEL_0 /*!< PLL clock used as SAI1 clock source */ +#define LL_RCC_SAI1_CLKSOURCE_PIN RCC_CCIPR_SAI1SEL_1 /*!< EXT clock used as SAI1 clock source */ +#define LL_RCC_SAI1_CLKSOURCE_HSI (RCC_CCIPR_SAI1SEL_0 | RCC_CCIPR_SAI1SEL_1) /*!< HSI clock used as SAI1 clock source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_I2S_CLKSOURCE Peripheral I2S clock source selection + * @{ + */ +#define LL_RCC_I2S_CLKSOURCE_SYSCLK 0x00000000U /*!< System clock used as I2S clock source */ +#define LL_RCC_I2S_CLKSOURCE_PLL RCC_CCIPR_I2S23SEL_0 /*!< PLL clock used as I2S clock source */ +#define LL_RCC_I2S_CLKSOURCE_PIN RCC_CCIPR_I2S23SEL_1 /*!< EXT clock used as I2S clock source */ +#define LL_RCC_I2S_CLKSOURCE_HSI (RCC_CCIPR_I2S23SEL_0 | RCC_CCIPR_I2S23SEL_1) /*!< HSI clock used as I2S clock source */ +/** + * @} + */ + +#if defined(FDCAN1) +/** @defgroup RCC_LL_EC_FDCAN_CLKSOURCE Peripheral FDCAN clock source selection + * @{ + */ +#define LL_RCC_FDCAN_CLKSOURCE_HSE 0x00000000U /*!< HSE clock used as FDCAN clock source */ +#define LL_RCC_FDCAN_CLKSOURCE_PLL RCC_CCIPR_FDCANSEL_0 /*!< PLL clock used as FDCAN clock source */ +#define LL_RCC_FDCAN_CLKSOURCE_PCLK1 RCC_CCIPR_FDCANSEL_1 /*!< PCLK1 clock used as FDCAN clock source */ +/** + * @} + */ +#endif /* FDCAN1 */ + +/** @defgroup RCC_LL_EC_RNG_CLKSOURCE Peripheral RNG clock source selection + * @{ + */ +#define LL_RCC_RNG_CLKSOURCE_HSI48 0x00000000U /*!< HSI48 clock used as RNG clock source */ +#define LL_RCC_RNG_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as RNG clock source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection + * @{ + */ +#define LL_RCC_USB_CLKSOURCE_HSI48 0x00000000U /*!< HSI48 clock used as USB clock source */ +#define LL_RCC_USB_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as USB clock source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_ADC_CLKSOURCE Peripheral ADC clock source selection + * @{ + */ +#define LL_RCC_ADC12_CLKSOURCE_NONE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U)) /*!< No clock used as ADC12 clock source */ +#define LL_RCC_ADC12_CLKSOURCE_PLL (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL_0 >> RCC_CCIPR_ADC12SEL_Pos)) /*!< PLL clock used as ADC12 clock source */ +#define LL_RCC_ADC12_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL_1 >> RCC_CCIPR_ADC12SEL_Pos)) /*!< SYSCLK clock used as ADC12 clock source */ +#if defined(RCC_CCIPR_ADC345SEL) +#define LL_RCC_ADC345_CLKSOURCE_NONE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U)) /*!< No clock used as ADC345 clock source */ +#define LL_RCC_ADC345_CLKSOURCE_PLL (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_0 >> RCC_CCIPR_ADC345SEL_Pos)) /*!< PLL clock used as ADC345 clock source */ +#define LL_RCC_ADC345_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_1 >> RCC_CCIPR_ADC345SEL_Pos)) /*!< SYSCLK clock used as ADC345 clock source */ +#endif /* RCC_CCIPR_ADC345SEL */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_QUADSPI Peripheral QUADSPI get clock source + * @{ + */ +#define LL_RCC_QUADSPI_CLKSOURCE_SYSCLK 0x00000000U /*!< SYSCLK used as QuadSPI clock source */ +#define LL_RCC_QUADSPI_CLKSOURCE_HSI RCC_CCIPR2_QSPISEL_0 /*!< HSI used as QuadSPI clock source */ +#define LL_RCC_QUADSPI_CLKSOURCE_PLL RCC_CCIPR2_QSPISEL_1 /*!< PLL used as QuadSPI clock source */ +/** + * @} + */ + + +/** @defgroup RCC_LL_EC_USARTx Peripheral USART get clock source + * @{ + */ +#define LL_RCC_USART1_CLKSOURCE RCC_CCIPR_USART1SEL /*!< USART1 Clock source selection */ +#define LL_RCC_USART2_CLKSOURCE RCC_CCIPR_USART2SEL /*!< USART2 Clock source selection */ +#define LL_RCC_USART3_CLKSOURCE RCC_CCIPR_USART3SEL /*!< USART3 Clock source selection */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_UARTx Peripheral UART get clock source + * @{ + */ +#if defined(RCC_CCIPR_UART4SEL) +#define LL_RCC_UART4_CLKSOURCE RCC_CCIPR_UART4SEL /*!< UART4 Clock source selection */ +#endif /* RCC_CCIPR_UART4SEL */ +#if defined(RCC_CCIPR_UART5SEL) +#define LL_RCC_UART5_CLKSOURCE RCC_CCIPR_UART5SEL /*!< UART5 Clock source selection */ +#endif /* RCC_CCIPR_UART5SEL */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_LPUART1 Peripheral LPUART get clock source + * @{ + */ +#define LL_RCC_LPUART1_CLKSOURCE RCC_CCIPR_LPUART1SEL /*!< LPUART1 Clock source selection */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_I2C1 Peripheral I2C get clock source + * @{ + */ +#define LL_RCC_I2C1_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL >> RCC_CCIPR_I2C1SEL_Pos)) /*!< I2C1 Clock source selection */ +#define LL_RCC_I2C2_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL >> RCC_CCIPR_I2C2SEL_Pos)) /*!< I2C2 Clock source selection */ +#define LL_RCC_I2C3_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL >> RCC_CCIPR_I2C3SEL_Pos)) /*!< I2C3 Clock source selection */ +#if defined(RCC_CCIPR2_I2C4SEL) +#define LL_RCC_I2C4_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< I2C4 Clock source selection */ +#endif /* RCC_CCIPR2_I2C4SEL */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_LPTIM1 Peripheral LPTIM get clock source + * @{ + */ +#define LL_RCC_LPTIM1_CLKSOURCE RCC_CCIPR_LPTIM1SEL /*!< LPTIM1 Clock source selection */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_SAI1 Peripheral SAI get clock source + * @{ + */ +#define LL_RCC_SAI1_CLKSOURCE RCC_CCIPR_SAI1SEL /*!< SAI1 Clock source selection */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_I2S Peripheral I2S get clock source + * @{ + */ +#define LL_RCC_I2S_CLKSOURCE RCC_CCIPR_I2S23SEL /*!< I2S Clock source selection */ +/** + * @} + */ + +#if defined(FDCAN1) +/** @defgroup RCC_LL_EC_FDCAN Peripheral FDCAN get clock source + * @{ + */ +#define LL_RCC_FDCAN_CLKSOURCE RCC_CCIPR_FDCANSEL /*!< FDCAN Clock source selection */ +#endif /* FDCAN1 */ + +/** + * @} + */ + +/** @defgroup RCC_LL_EC_RNG Peripheral RNG get clock source + * @{ + */ +#define LL_RCC_RNG_CLKSOURCE RCC_CCIPR_CLK48SEL /*!< RNG Clock source selection */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_USB Peripheral USB get clock source + * @{ + */ +#define LL_RCC_USB_CLKSOURCE RCC_CCIPR_CLK48SEL /*!< USB Clock source selection */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_ADC Peripheral ADC get clock source + * @{ + */ +#define LL_RCC_ADC12_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL >> RCC_CCIPR_ADC12SEL_Pos)) /*!< ADC12 Clock source selection */ +#if defined(RCC_CCIPR_ADC345SEL_Pos) +#define LL_RCC_ADC345_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL >> RCC_CCIPR_ADC345SEL_Pos)) /*!< ADC345 Clock source selection */ +#endif /* RCC_CCIPR_ADC345SEL_Pos */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_QUADSPI Peripheral QUADSPI get clock source + * @{ + */ +#define LL_RCC_QUADSPI_CLKSOURCE RCC_CCIPR2_QSPISEL /*!< QuadSPI Clock source selection */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_RTC_CLKSOURCE RTC clock source selection + * @{ + */ +#define LL_RCC_RTC_CLKSOURCE_NONE 0x00000000U /*!< No clock used as RTC clock */ +#define LL_RCC_RTC_CLKSOURCE_LSE RCC_BDCR_RTCSEL_0 /*!< LSE oscillator clock used as RTC clock */ +#define LL_RCC_RTC_CLKSOURCE_LSI RCC_BDCR_RTCSEL_1 /*!< LSI oscillator clock used as RTC clock */ +#define LL_RCC_RTC_CLKSOURCE_HSE_DIV32 RCC_BDCR_RTCSEL /*!< HSE oscillator clock divided by 32 used as RTC clock */ +/** + * @} + */ + + +/** @defgroup RCC_LL_EC_PLLSOURCE PLL entry clock source + * @{ + */ +#define LL_RCC_PLLSOURCE_NONE 0x00000000U /*!< No clock */ +#define LL_RCC_PLLSOURCE_HSI RCC_PLLCFGR_PLLSRC_HSI /*!< HSI16 clock selected as PLL entry clock source */ +#define LL_RCC_PLLSOURCE_HSE RCC_PLLCFGR_PLLSRC_HSE /*!< HSE clock selected as PLL entry clock source */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_PLLM_DIV PLL division factor + * @{ + */ +#define LL_RCC_PLLM_DIV_1 0x00000000U /*!< PLL division factor by 1 */ +#define LL_RCC_PLLM_DIV_2 RCC_PLLCFGR_PLLM_0 /*!< PLL division factor by 2 */ +#define LL_RCC_PLLM_DIV_3 RCC_PLLCFGR_PLLM_1 /*!< PLL division factor by 3 */ +#define LL_RCC_PLLM_DIV_4 (RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL division factor by 4 */ +#define LL_RCC_PLLM_DIV_5 RCC_PLLCFGR_PLLM_2 /*!< PLL division factor by 5 */ +#define LL_RCC_PLLM_DIV_6 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL division factor by 6 */ +#define LL_RCC_PLLM_DIV_7 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL division factor by 7 */ +#define LL_RCC_PLLM_DIV_8 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL division factor by 8 */ +#define LL_RCC_PLLM_DIV_9 RCC_PLLCFGR_PLLM_3 /*!< PLL division factor by 9 */ +#define LL_RCC_PLLM_DIV_10 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL division factor by 10 */ +#define LL_RCC_PLLM_DIV_11 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL division factor by 11 */ +#define LL_RCC_PLLM_DIV_12 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL division factor by 12 */ +#define LL_RCC_PLLM_DIV_13 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL division factor by 13 */ +#define LL_RCC_PLLM_DIV_14 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL division factor by 14 */ +#define LL_RCC_PLLM_DIV_15 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL division factor by 15 */ +#define LL_RCC_PLLM_DIV_16 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL division factor by 16 */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_PLLR_DIV PLL division factor (PLLR) + * @{ + */ +#define LL_RCC_PLLR_DIV_2 0x00000000U /*!< Main PLL division factor for PLLCLK (system clock) by 2 */ +#define LL_RCC_PLLR_DIV_4 (RCC_PLLCFGR_PLLR_0) /*!< Main PLL division factor for PLLCLK (system clock) by 4 */ +#define LL_RCC_PLLR_DIV_6 (RCC_PLLCFGR_PLLR_1) /*!< Main PLL division factor for PLLCLK (system clock) by 6 */ +#define LL_RCC_PLLR_DIV_8 (RCC_PLLCFGR_PLLR) /*!< Main PLL division factor for PLLCLK (system clock) by 8 */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_PLLP_DIV PLL division factor (PLLP) + * @{ + */ +#define LL_RCC_PLLP_DIV_2 (RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 2 */ +#define LL_RCC_PLLP_DIV_3 (RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 3 */ +#define LL_RCC_PLLP_DIV_4 (RCC_PLLCFGR_PLLPDIV_2) /*!< Main PLL division factor for PLLP output by 4 */ +#define LL_RCC_PLLP_DIV_5 (RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 5 */ +#define LL_RCC_PLLP_DIV_6 (RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 6 */ +#define LL_RCC_PLLP_DIV_7 (RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 7 */ +#define LL_RCC_PLLP_DIV_8 (RCC_PLLCFGR_PLLPDIV_3) /*!< Main PLL division factor for PLLP output by 8 */ +#define LL_RCC_PLLP_DIV_9 (RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 9 */ +#define LL_RCC_PLLP_DIV_10 (RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 10 */ +#define LL_RCC_PLLP_DIV_11 (RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 11 */ +#define LL_RCC_PLLP_DIV_12 (RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2) /*!< Main PLL division factor for PLLP output by 12 */ +#define LL_RCC_PLLP_DIV_13 (RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 13 */ +#define LL_RCC_PLLP_DIV_14 (RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 14 */ +#define LL_RCC_PLLP_DIV_15 (RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 15 */ +#define LL_RCC_PLLP_DIV_16 (RCC_PLLCFGR_PLLPDIV_4) /*!< Main PLL division factor for PLLP output by 16 */ +#define LL_RCC_PLLP_DIV_17 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 17 */ +#define LL_RCC_PLLP_DIV_18 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 18 */ +#define LL_RCC_PLLP_DIV_19 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 19 */ +#define LL_RCC_PLLP_DIV_20 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_2) /*!< Main PLL division factor for PLLP output by 20 */ +#define LL_RCC_PLLP_DIV_21 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 21 */ +#define LL_RCC_PLLP_DIV_22 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 22 */ +#define LL_RCC_PLLP_DIV_23 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 23 */ +#define LL_RCC_PLLP_DIV_24 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3) /*!< Main PLL division factor for PLLP output by 24 */ +#define LL_RCC_PLLP_DIV_25 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 25 */ +#define LL_RCC_PLLP_DIV_26 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 26 */ +#define LL_RCC_PLLP_DIV_27 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 27 */ +#define LL_RCC_PLLP_DIV_28 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2) /*!< Main PLL division factor for PLLP output by 28 */ +#define LL_RCC_PLLP_DIV_29 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 29 */ +#define LL_RCC_PLLP_DIV_30 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1) /*!< Main PLL division factor for PLLP output by 30 */ +#define LL_RCC_PLLP_DIV_31 (RCC_PLLCFGR_PLLPDIV_4|RCC_PLLCFGR_PLLPDIV_3|RCC_PLLCFGR_PLLPDIV_2|RCC_PLLCFGR_PLLPDIV_1|RCC_PLLCFGR_PLLPDIV_0) /*!< Main PLL division factor for PLLP output by 31 */ +/** + * @} + */ + +/** @defgroup RCC_LL_EC_PLLQ_DIV PLL division factor (PLLQ) + * @{ + */ +#define LL_RCC_PLLQ_DIV_2 0x00000000U /*!< Main PLL division factor for PLLQ output by 2 */ +#define LL_RCC_PLLQ_DIV_4 (RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 4 */ +#define LL_RCC_PLLQ_DIV_6 (RCC_PLLCFGR_PLLQ_1) /*!< Main PLL division factor for PLLQ output by 6 */ +#define LL_RCC_PLLQ_DIV_8 (RCC_PLLCFGR_PLLQ) /*!< Main PLL division factor for PLLQ output by 8 */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup RCC_LL_Exported_Macros RCC Exported Macros + * @{ + */ + +/** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in RCC register + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, __VALUE__) + +/** + * @brief Read a value in RCC register + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__) +/** + * @} + */ + +/** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies + * @{ + */ + +/** + * @brief Helper macro to calculate the PLLCLK frequency on system domain + * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (), + * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ()); + * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI) + * @param __PLLM__ This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLM_DIV_1 + * @arg @ref LL_RCC_PLLM_DIV_2 + * @arg @ref LL_RCC_PLLM_DIV_3 + * @arg @ref LL_RCC_PLLM_DIV_4 + * @arg @ref LL_RCC_PLLM_DIV_5 + * @arg @ref LL_RCC_PLLM_DIV_6 + * @arg @ref LL_RCC_PLLM_DIV_7 + * @arg @ref LL_RCC_PLLM_DIV_8 + * @arg @ref LL_RCC_PLLM_DIV_9 + * @arg @ref LL_RCC_PLLM_DIV_10 + * @arg @ref LL_RCC_PLLM_DIV_11 + * @arg @ref LL_RCC_PLLM_DIV_12 + * @arg @ref LL_RCC_PLLM_DIV_13 + * @arg @ref LL_RCC_PLLM_DIV_14 + * @arg @ref LL_RCC_PLLM_DIV_15 + * @arg @ref LL_RCC_PLLM_DIV_16 + * @param __PLLN__ Between Min_Data = 8 and Max_Data = 127 + * @param __PLLR__ This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLR_DIV_2 + * @arg @ref LL_RCC_PLLR_DIV_4 + * @arg @ref LL_RCC_PLLR_DIV_6 + * @arg @ref LL_RCC_PLLR_DIV_8 + * @retval PLL clock frequency (in Hz) + */ +#define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) / \ + ((((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos) + 1U) * 2U)) + +/** + * @brief Helper macro to calculate the PLLCLK frequency used on ADC domain + * @note ex: @ref __LL_RCC_CALC_PLLCLK_ADC_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (), + * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetP ()); + * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI) + * @param __PLLM__ This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLM_DIV_1 + * @arg @ref LL_RCC_PLLM_DIV_2 + * @arg @ref LL_RCC_PLLM_DIV_3 + * @arg @ref LL_RCC_PLLM_DIV_4 + * @arg @ref LL_RCC_PLLM_DIV_5 + * @arg @ref LL_RCC_PLLM_DIV_6 + * @arg @ref LL_RCC_PLLM_DIV_7 + * @arg @ref LL_RCC_PLLM_DIV_8 + * @arg @ref LL_RCC_PLLM_DIV_9 + * @arg @ref LL_RCC_PLLM_DIV_10 + * @arg @ref LL_RCC_PLLM_DIV_11 + * @arg @ref LL_RCC_PLLM_DIV_12 + * @arg @ref LL_RCC_PLLM_DIV_13 + * @arg @ref LL_RCC_PLLM_DIV_14 + * @arg @ref LL_RCC_PLLM_DIV_15 + * @arg @ref LL_RCC_PLLM_DIV_16 + + * @param __PLLN__ Between Min_Data = 8 and Max_Data = 127 + * @param __PLLP__ This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLP_DIV_2 + * @arg @ref LL_RCC_PLLP_DIV_3 + * @arg @ref LL_RCC_PLLP_DIV_4 + * @arg @ref LL_RCC_PLLP_DIV_5 + * @arg @ref LL_RCC_PLLP_DIV_6 + * @arg @ref LL_RCC_PLLP_DIV_7 + * @arg @ref LL_RCC_PLLP_DIV_8 + * @arg @ref LL_RCC_PLLP_DIV_9 + * @arg @ref LL_RCC_PLLP_DIV_10 + * @arg @ref LL_RCC_PLLP_DIV_11 + * @arg @ref LL_RCC_PLLP_DIV_12 + * @arg @ref LL_RCC_PLLP_DIV_13 + * @arg @ref LL_RCC_PLLP_DIV_14 + * @arg @ref LL_RCC_PLLP_DIV_15 + * @arg @ref LL_RCC_PLLP_DIV_16 + * @arg @ref LL_RCC_PLLP_DIV_17 + * @arg @ref LL_RCC_PLLP_DIV_18 + * @arg @ref LL_RCC_PLLP_DIV_19 + * @arg @ref LL_RCC_PLLP_DIV_20 + * @arg @ref LL_RCC_PLLP_DIV_21 + * @arg @ref LL_RCC_PLLP_DIV_22 + * @arg @ref LL_RCC_PLLP_DIV_23 + * @arg @ref LL_RCC_PLLP_DIV_24 + * @arg @ref LL_RCC_PLLP_DIV_25 + * @arg @ref LL_RCC_PLLP_DIV_26 + * @arg @ref LL_RCC_PLLP_DIV_27 + * @arg @ref LL_RCC_PLLP_DIV_28 + * @arg @ref LL_RCC_PLLP_DIV_29 + * @arg @ref LL_RCC_PLLP_DIV_30 + * @arg @ref LL_RCC_PLLP_DIV_31 + * @retval PLL clock frequency (in Hz) + */ +#define __LL_RCC_CALC_PLLCLK_ADC_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) / \ + ((__PLLP__) >> RCC_PLLCFGR_PLLPDIV_Pos)) + +/** + * @brief Helper macro to calculate the PLLCLK frequency used on 48M domain + * @note ex: @ref __LL_RCC_CALC_PLLCLK_48M_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (), + * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ()); + * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI) + * @param __PLLM__ This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLM_DIV_1 + * @arg @ref LL_RCC_PLLM_DIV_2 + * @arg @ref LL_RCC_PLLM_DIV_3 + * @arg @ref LL_RCC_PLLM_DIV_4 + * @arg @ref LL_RCC_PLLM_DIV_5 + * @arg @ref LL_RCC_PLLM_DIV_6 + * @arg @ref LL_RCC_PLLM_DIV_7 + * @arg @ref LL_RCC_PLLM_DIV_8 + * @arg @ref LL_RCC_PLLM_DIV_9 + * @arg @ref LL_RCC_PLLM_DIV_10 + * @arg @ref LL_RCC_PLLM_DIV_11 + * @arg @ref LL_RCC_PLLM_DIV_12 + * @arg @ref LL_RCC_PLLM_DIV_13 + * @arg @ref LL_RCC_PLLM_DIV_14 + * @arg @ref LL_RCC_PLLM_DIV_15 + * @arg @ref LL_RCC_PLLM_DIV_16 + * @param __PLLN__ Between Min_Data = 8 and Max_Data = 127 + * @param __PLLQ__ This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLQ_DIV_2 + * @arg @ref LL_RCC_PLLQ_DIV_4 + * @arg @ref LL_RCC_PLLQ_DIV_6 + * @arg @ref LL_RCC_PLLQ_DIV_8 + * @retval PLL clock frequency (in Hz) + */ +#define __LL_RCC_CALC_PLLCLK_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) / \ + ((((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U)) + +/** + * @brief Helper macro to calculate the HCLK frequency + * @param __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK) + * @param __AHBPRESCALER__ This parameter can be one of the following values: + * @arg @ref LL_RCC_SYSCLK_DIV_1 + * @arg @ref LL_RCC_SYSCLK_DIV_2 + * @arg @ref LL_RCC_SYSCLK_DIV_4 + * @arg @ref LL_RCC_SYSCLK_DIV_8 + * @arg @ref LL_RCC_SYSCLK_DIV_16 + * @arg @ref LL_RCC_SYSCLK_DIV_64 + * @arg @ref LL_RCC_SYSCLK_DIV_128 + * @arg @ref LL_RCC_SYSCLK_DIV_256 + * @arg @ref LL_RCC_SYSCLK_DIV_512 + * @retval HCLK clock frequency (in Hz) + */ +#define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__,__AHBPRESCALER__) ((__SYSCLKFREQ__) >> (AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos] & 0x1FU)) + +/** + * @brief Helper macro to calculate the PCLK1 frequency (ABP1) + * @param __HCLKFREQ__ HCLK frequency + * @param __APB1PRESCALER__ This parameter can be one of the following values: + * @arg @ref LL_RCC_APB1_DIV_1 + * @arg @ref LL_RCC_APB1_DIV_2 + * @arg @ref LL_RCC_APB1_DIV_4 + * @arg @ref LL_RCC_APB1_DIV_8 + * @arg @ref LL_RCC_APB1_DIV_16 + * @retval PCLK1 clock frequency (in Hz) + */ +#define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> (APBPrescTable[(__APB1PRESCALER__) >> RCC_CFGR_PPRE1_Pos] & 0x1FU)) + +/** + * @brief Helper macro to calculate the PCLK2 frequency (ABP2) + * @param __HCLKFREQ__ HCLK frequency + * @param __APB2PRESCALER__ This parameter can be one of the following values: + * @arg @ref LL_RCC_APB2_DIV_1 + * @arg @ref LL_RCC_APB2_DIV_2 + * @arg @ref LL_RCC_APB2_DIV_4 + * @arg @ref LL_RCC_APB2_DIV_8 + * @arg @ref LL_RCC_APB2_DIV_16 + * @retval PCLK2 clock frequency (in Hz) + */ +#define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> (APBPrescTable[(__APB2PRESCALER__) >> RCC_CFGR_PPRE2_Pos] & 0x1FU)) + +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup RCC_LL_Exported_Functions RCC Exported Functions + * @{ + */ + +/** @defgroup RCC_LL_EF_HSE HSE + * @{ + */ + +/** + * @brief Enable the Clock Security System. + * @rmtoll CR CSSON LL_RCC_HSE_EnableCSS + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSE_EnableCSS(void) +{ + SET_BIT(RCC->CR, RCC_CR_CSSON); +} + +/** + * @brief Enable HSE external oscillator (HSE Bypass) + * @rmtoll CR HSEBYP LL_RCC_HSE_EnableBypass + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSE_EnableBypass(void) +{ + SET_BIT(RCC->CR, RCC_CR_HSEBYP); +} + +/** + * @brief Disable HSE external oscillator (HSE Bypass) + * @rmtoll CR HSEBYP LL_RCC_HSE_DisableBypass + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSE_DisableBypass(void) +{ + CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); +} + +/** + * @brief Enable HSE crystal oscillator (HSE ON) + * @rmtoll CR HSEON LL_RCC_HSE_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSE_Enable(void) +{ + SET_BIT(RCC->CR, RCC_CR_HSEON); +} + +/** + * @brief Disable HSE crystal oscillator (HSE ON) + * @rmtoll CR HSEON LL_RCC_HSE_Disable + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSE_Disable(void) +{ + CLEAR_BIT(RCC->CR, RCC_CR_HSEON); +} + +/** + * @brief Check if HSE oscillator Ready + * @rmtoll CR HSERDY LL_RCC_HSE_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void) +{ + return ((READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_HSI HSI + * @{ + */ + +/** + * @brief Enable HSI even in stop mode + * @note HSI oscillator is forced ON even in Stop mode + * @rmtoll CR HSIKERON LL_RCC_HSI_EnableInStopMode + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSI_EnableInStopMode(void) +{ + SET_BIT(RCC->CR, RCC_CR_HSIKERON); +} + +/** + * @brief Disable HSI in stop mode + * @rmtoll CR HSIKERON LL_RCC_HSI_DisableInStopMode + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSI_DisableInStopMode(void) +{ + CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON); +} + +/** + * @brief Enable HSI oscillator + * @rmtoll CR HSION LL_RCC_HSI_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSI_Enable(void) +{ + SET_BIT(RCC->CR, RCC_CR_HSION); +} + +/** + * @brief Disable HSI oscillator + * @rmtoll CR HSION LL_RCC_HSI_Disable + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSI_Disable(void) +{ + CLEAR_BIT(RCC->CR, RCC_CR_HSION); +} + +/** + * @brief Check if HSI clock is ready + * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void) +{ + return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY)) ? 1UL : 0UL); +} + +/** + * @brief Get HSI Calibration value + * @note When HSITRIM is written, HSICAL is updated with the sum of + * HSITRIM and the factory trim value + * @rmtoll ICSCR HSICAL LL_RCC_HSI_GetCalibration + * @retval Between Min_Data = 0x00 and Max_Data = 0xFF + */ +__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void) +{ + return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSICAL) >> RCC_ICSCR_HSICAL_Pos); +} + +/** + * @brief Set HSI Calibration trimming + * @note user-programmable trimming value that is added to the HSICAL + * @note Default value is 16, which, when added to the HSICAL value, + * should trim the HSI to 16 MHz +/- 1 % + * @rmtoll ICSCR HSITRIM LL_RCC_HSI_SetCalibTrimming + * @param Value Between Min_Data = 0 and Max_Data = 127 + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value) +{ + MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_ICSCR_HSITRIM_Pos); +} + +/** + * @brief Get HSI Calibration trimming + * @rmtoll ICSCR HSITRIM LL_RCC_HSI_GetCalibTrimming + * @retval Between Min_Data = 0 and Max_Data = 127 + */ +__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void) +{ + return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_ICSCR_HSITRIM_Pos); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_HSI48 HSI48 + * @{ + */ + +/** + * @brief Enable HSI48 + * @rmtoll CRRCR HSI48ON LL_RCC_HSI48_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSI48_Enable(void) +{ + SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); +} + +/** + * @brief Disable HSI48 + * @rmtoll CRRCR HSI48ON LL_RCC_HSI48_Disable + * @retval None + */ +__STATIC_INLINE void LL_RCC_HSI48_Disable(void) +{ + CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); +} + +/** + * @brief Check if HSI48 oscillator Ready + * @rmtoll CRRCR HSI48RDY LL_RCC_HSI48_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_HSI48_IsReady(void) +{ + return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == (RCC_CRRCR_HSI48RDY)) ? 1UL : 0UL); +} + +/** + * @brief Get HSI48 Calibration value + * @rmtoll CRRCR HSI48CAL LL_RCC_HSI48_GetCalibration + * @retval Between Min_Data = 0x00 and Max_Data = 0x1FF + */ +__STATIC_INLINE uint32_t LL_RCC_HSI48_GetCalibration(void) +{ + return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_LSE LSE + * @{ + */ + +/** + * @brief Enable Low Speed External (LSE) crystal. + * @rmtoll BDCR LSEON LL_RCC_LSE_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_Enable(void) +{ + SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); +} + +/** + * @brief Disable Low Speed External (LSE) crystal. + * @rmtoll BDCR LSEON LL_RCC_LSE_Disable + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_Disable(void) +{ + CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); +} + +/** + * @brief Enable external clock source (LSE bypass). + * @rmtoll BDCR LSEBYP LL_RCC_LSE_EnableBypass + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_EnableBypass(void) +{ + SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); +} + +/** + * @brief Disable external clock source (LSE bypass). + * @rmtoll BDCR LSEBYP LL_RCC_LSE_DisableBypass + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_DisableBypass(void) +{ + CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); +} + +/** + * @brief Set LSE oscillator drive capability + * @note The oscillator is in Xtal mode when it is not in bypass mode. + * @rmtoll BDCR LSEDRV LL_RCC_LSE_SetDriveCapability + * @param LSEDrive This parameter can be one of the following values: + * @arg @ref LL_RCC_LSEDRIVE_LOW + * @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW + * @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH + * @arg @ref LL_RCC_LSEDRIVE_HIGH + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive) +{ + MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive); +} + +/** + * @brief Get LSE oscillator drive capability + * @rmtoll BDCR LSEDRV LL_RCC_LSE_GetDriveCapability + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_LSEDRIVE_LOW + * @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW + * @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH + * @arg @ref LL_RCC_LSEDRIVE_HIGH + */ +__STATIC_INLINE uint32_t LL_RCC_LSE_GetDriveCapability(void) +{ + return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSEDRV)); +} + +/** + * @brief Enable Clock security system on LSE. + * @rmtoll BDCR LSECSSON LL_RCC_LSE_EnableCSS + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_EnableCSS(void) +{ + SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON); +} + +/** + * @brief Disable Clock security system on LSE. + * @note Clock security system can be disabled only after a LSE + * failure detection. In that case it MUST be disabled by software. + * @rmtoll BDCR LSECSSON LL_RCC_LSE_DisableCSS + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSE_DisableCSS(void) +{ + CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON); +} + +/** + * @brief Check if LSE oscillator Ready + * @rmtoll BDCR LSERDY LL_RCC_LSE_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void) +{ + return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY)) ? 1UL : 0UL); +} + +/** + * @brief Check if CSS on LSE failure Detection + * @rmtoll BDCR LSECSSD LL_RCC_LSE_IsCSSDetected + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_LSE_IsCSSDetected(void) +{ + return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSECSSD) == (RCC_BDCR_LSECSSD)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_LSI LSI + * @{ + */ + +/** + * @brief Enable LSI Oscillator + * @rmtoll CSR LSION LL_RCC_LSI_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSI_Enable(void) +{ + SET_BIT(RCC->CSR, RCC_CSR_LSION); +} + +/** + * @brief Disable LSI Oscillator + * @rmtoll CSR LSION LL_RCC_LSI_Disable + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSI_Disable(void) +{ + CLEAR_BIT(RCC->CSR, RCC_CSR_LSION); +} + +/** + * @brief Check if LSI is Ready + * @rmtoll CSR LSIRDY LL_RCC_LSI_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_LSCO LSCO + * @{ + */ + +/** + * @brief Enable Low speed clock + * @rmtoll BDCR LSCOEN LL_RCC_LSCO_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSCO_Enable(void) +{ + SET_BIT(RCC->BDCR, RCC_BDCR_LSCOEN); +} + +/** + * @brief Disable Low speed clock + * @rmtoll BDCR LSCOEN LL_RCC_LSCO_Disable + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSCO_Disable(void) +{ + CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN); +} + +/** + * @brief Configure Low speed clock selection + * @rmtoll BDCR LSCOSEL LL_RCC_LSCO_SetSource + * @param Source This parameter can be one of the following values: + * @arg @ref LL_RCC_LSCO_CLKSOURCE_LSI + * @arg @ref LL_RCC_LSCO_CLKSOURCE_LSE + * @retval None + */ +__STATIC_INLINE void LL_RCC_LSCO_SetSource(uint32_t Source) +{ + MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL, Source); +} + +/** + * @brief Get Low speed clock selection + * @rmtoll BDCR LSCOSEL LL_RCC_LSCO_GetSource + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_LSCO_CLKSOURCE_LSI + * @arg @ref LL_RCC_LSCO_CLKSOURCE_LSE + */ +__STATIC_INLINE uint32_t LL_RCC_LSCO_GetSource(void) +{ + return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSCOSEL)); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_System System + * @{ + */ + +/** + * @brief Configure the system clock source + * @rmtoll CFGR SW LL_RCC_SetSysClkSource + * @param Source This parameter can be one of the following values: + * @arg @ref LL_RCC_SYS_CLKSOURCE_HSI + * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE + * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source) +{ + MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); +} + +/** + * @brief Get the system clock source + * @rmtoll CFGR SWS LL_RCC_GetSysClkSource + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI + * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE + * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL + */ +__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void) +{ + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); +} + +/** + * @brief Set AHB prescaler + * @rmtoll CFGR HPRE LL_RCC_SetAHBPrescaler + * @param Prescaler This parameter can be one of the following values: + * @arg @ref LL_RCC_SYSCLK_DIV_1 + * @arg @ref LL_RCC_SYSCLK_DIV_2 + * @arg @ref LL_RCC_SYSCLK_DIV_4 + * @arg @ref LL_RCC_SYSCLK_DIV_8 + * @arg @ref LL_RCC_SYSCLK_DIV_16 + * @arg @ref LL_RCC_SYSCLK_DIV_64 + * @arg @ref LL_RCC_SYSCLK_DIV_128 + * @arg @ref LL_RCC_SYSCLK_DIV_256 + * @arg @ref LL_RCC_SYSCLK_DIV_512 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler) +{ + MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); +} + +/** + * @brief Set APB1 prescaler + * @rmtoll CFGR PPRE1 LL_RCC_SetAPB1Prescaler + * @param Prescaler This parameter can be one of the following values: + * @arg @ref LL_RCC_APB1_DIV_1 + * @arg @ref LL_RCC_APB1_DIV_2 + * @arg @ref LL_RCC_APB1_DIV_4 + * @arg @ref LL_RCC_APB1_DIV_8 + * @arg @ref LL_RCC_APB1_DIV_16 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler) +{ + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); +} + +/** + * @brief Set APB2 prescaler + * @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler + * @param Prescaler This parameter can be one of the following values: + * @arg @ref LL_RCC_APB2_DIV_1 + * @arg @ref LL_RCC_APB2_DIV_2 + * @arg @ref LL_RCC_APB2_DIV_4 + * @arg @ref LL_RCC_APB2_DIV_8 + * @arg @ref LL_RCC_APB2_DIV_16 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) +{ + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler); +} + +/** + * @brief Get AHB prescaler + * @rmtoll CFGR HPRE LL_RCC_GetAHBPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_SYSCLK_DIV_1 + * @arg @ref LL_RCC_SYSCLK_DIV_2 + * @arg @ref LL_RCC_SYSCLK_DIV_4 + * @arg @ref LL_RCC_SYSCLK_DIV_8 + * @arg @ref LL_RCC_SYSCLK_DIV_16 + * @arg @ref LL_RCC_SYSCLK_DIV_64 + * @arg @ref LL_RCC_SYSCLK_DIV_128 + * @arg @ref LL_RCC_SYSCLK_DIV_256 + * @arg @ref LL_RCC_SYSCLK_DIV_512 + */ +__STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void) +{ + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)); +} + +/** + * @brief Get APB1 prescaler + * @rmtoll CFGR PPRE1 LL_RCC_GetAPB1Prescaler + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_APB1_DIV_1 + * @arg @ref LL_RCC_APB1_DIV_2 + * @arg @ref LL_RCC_APB1_DIV_4 + * @arg @ref LL_RCC_APB1_DIV_8 + * @arg @ref LL_RCC_APB1_DIV_16 + */ +__STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void) +{ + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1)); +} + +/** + * @brief Get APB2 prescaler + * @rmtoll CFGR PPRE2 LL_RCC_GetAPB2Prescaler + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_APB2_DIV_1 + * @arg @ref LL_RCC_APB2_DIV_2 + * @arg @ref LL_RCC_APB2_DIV_4 + * @arg @ref LL_RCC_APB2_DIV_8 + * @arg @ref LL_RCC_APB2_DIV_16 + */ +__STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void) +{ + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2)); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_MCO MCO + * @{ + */ + +/** + * @brief Configure MCOx + * @rmtoll CFGR MCOSEL LL_RCC_ConfigMCO\n + * CFGR MCOPRE LL_RCC_ConfigMCO + * @param MCOxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_MCO1SOURCE_NOCLOCK + * @arg @ref LL_RCC_MCO1SOURCE_SYSCLK + * @arg @ref LL_RCC_MCO1SOURCE_HSI + * @arg @ref LL_RCC_MCO1SOURCE_HSE + * @arg @ref LL_RCC_MCO1SOURCE_HSI48 + * @arg @ref LL_RCC_MCO1SOURCE_PLLCLK + * @arg @ref LL_RCC_MCO1SOURCE_LSI + * @arg @ref LL_RCC_MCO1SOURCE_LSE + * + * (*) value not defined in all devices. + * @param MCOxPrescaler This parameter can be one of the following values: + * @arg @ref LL_RCC_MCO1_DIV_1 + * @arg @ref LL_RCC_MCO1_DIV_2 + * @arg @ref LL_RCC_MCO1_DIV_4 + * @arg @ref LL_RCC_MCO1_DIV_8 + * @arg @ref LL_RCC_MCO1_DIV_16 + * @retval None + */ +__STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescaler) +{ + MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE, MCOxSource | MCOxPrescaler); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source + * @{ + */ + +/** + * @brief Configure USARTx clock source + * @rmtoll CCIPR USARTxSEL LL_RCC_SetUSARTClockSource + * @param USARTxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 + * @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_USART1_CLKSOURCE_HSI + * @arg @ref LL_RCC_USART1_CLKSOURCE_LSE + * @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_USART2_CLKSOURCE_HSI + * @arg @ref LL_RCC_USART2_CLKSOURCE_LSE + * @arg @ref LL_RCC_USART3_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_USART3_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_USART3_CLKSOURCE_HSI + * @arg @ref LL_RCC_USART3_CLKSOURCE_LSE + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetUSARTClockSource(uint32_t USARTxSource) +{ + MODIFY_REG(RCC->CCIPR, (USARTxSource >> 16U), (USARTxSource & 0x0000FFFFU)); +} + +#if defined(UART4) +/** + * @brief Configure UARTx clock source + * @rmtoll CCIPR UARTxSEL LL_RCC_SetUARTClockSource + * @param UARTxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_UART4_CLKSOURCE_PCLK1 (*) + * @arg @ref LL_RCC_UART4_CLKSOURCE_SYSCLK (*) + * @arg @ref LL_RCC_UART4_CLKSOURCE_HSI (*) + * @arg @ref LL_RCC_UART4_CLKSOURCE_LSE (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_PCLK1 (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_SYSCLK (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_HSI (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_LSE (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetUARTClockSource(uint32_t UARTxSource) +{ + MODIFY_REG(RCC->CCIPR, (UARTxSource >> 16U), (UARTxSource & 0x0000FFFFU)); +} +#endif /* UART4 */ + +/** + * @brief Configure LPUART1x clock source + * @rmtoll CCIPR LPUART1SEL LL_RCC_SetLPUARTClockSource + * @param LPUARTxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource) +{ + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource); +} + +/** + * @brief Configure I2Cx clock source + * @rmtoll CCIPR I2CxSEL LL_RCC_SetI2CClockSource + * @param I2CxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI + * @arg @ref LL_RCC_I2C2_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_I2C2_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2C2_CLKSOURCE_HSI + * @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI + * @arg @ref LL_RCC_I2C4_CLKSOURCE_PCLK1 (*) + * @arg @ref LL_RCC_I2C4_CLKSOURCE_SYSCLK (*) + * @arg @ref LL_RCC_I2C4_CLKSOURCE_HSI (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource) +{ + __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)(RCC_BASE + 0x88U + (I2CxSource >> 24U)); + MODIFY_REG(*reg, 3UL << ((I2CxSource & 0x001F0000U) >> 16U), ((I2CxSource & 0x000000FFU) << ((I2CxSource & 0x001F0000U) >> 16U))); +} + +/** + * @brief Configure LPTIMx clock source + * @rmtoll CCIPR LPTIM1SEL LL_RCC_SetLPTIMClockSource + * @param LPTIMxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetLPTIMClockSource(uint32_t LPTIMxSource) +{ + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL, LPTIMxSource); +} + +/** + * @brief Configure SAIx clock source + * @rmtoll CCIPR SAI1SEL LL_RCC_SetSAIClockSource + * @param SAIxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_SAI1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLL + * @arg @ref LL_RCC_SAI1_CLKSOURCE_PIN + * @arg @ref LL_RCC_SAI1_CLKSOURCE_HSI + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetSAIClockSource(uint32_t SAIxSource) +{ + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI1SEL, SAIxSource); +} + +/** + * @brief Configure I2S clock source + * @rmtoll CCIPR I2S23SEL LL_RCC_SetI2SClockSource + * @param I2SxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_I2S_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2S_CLKSOURCE_PLL + * @arg @ref LL_RCC_I2S_CLKSOURCE_PIN + * @arg @ref LL_RCC_I2S_CLKSOURCE_HSI + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetI2SClockSource(uint32_t I2SxSource) +{ + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2S23SEL, I2SxSource); +} + +#if defined(FDCAN1) +/** + * @brief Configure FDCAN clock source + * @rmtoll CCIPR FDCANSEL LL_RCC_SetFDCANClockSource + * @param FDCANxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_FDCAN_CLKSOURCE_HSE + * @arg @ref LL_RCC_FDCAN_CLKSOURCE_PLL + * @arg @ref LL_RCC_FDCAN_CLKSOURCE_PCLK1 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetFDCANClockSource(uint32_t FDCANxSource) +{ + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_FDCANSEL, FDCANxSource); +} +#endif /* FDCAN1 */ + +/** + * @brief Configure RNG clock source + * @rmtoll CCIPR CLK48SEL LL_RCC_SetRNGClockSource + * @param RNGxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48 + * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetRNGClockSource(uint32_t RNGxSource) +{ + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, RNGxSource); +} + +/** + * @brief Configure USB clock source + * @rmtoll CCIPR CLK48SEL LL_RCC_SetUSBClockSource + * @param USBxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_USB_CLKSOURCE_HSI48 + * @arg @ref LL_RCC_USB_CLKSOURCE_PLL + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource) +{ + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, USBxSource); +} + +/** + * @brief Configure ADC clock source + * @rmtoll CCIPR ADC12SEL LL_RCC_SetADCClockSource\n + * CCIPR ADC345SEL LL_RCC_SetADCClockSource + * @param ADCxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_ADC12_CLKSOURCE_NONE + * @arg @ref LL_RCC_ADC12_CLKSOURCE_PLL + * @arg @ref LL_RCC_ADC12_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_ADC345_CLKSOURCE_NONE (*) + * @arg @ref LL_RCC_ADC345_CLKSOURCE_PLL (*) + * @arg @ref LL_RCC_ADC345_CLKSOURCE_SYSCLK (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetADCClockSource(uint32_t ADCxSource) +{ + MODIFY_REG(RCC->CCIPR, 3U << ((ADCxSource & 0x001F0000U) >> 16U), ((ADCxSource & 0x000000FFU) << ((ADCxSource & 0x001F0000U) >> 16U))); +} + +#if defined(QUADSPI) +/** + * @brief Configure QUADSPI clock source + * @rmtoll CCIPR2 QSPISEL LL_RCC_SetQUADSPIClockSource + * @param Source This parameter can be one of the following values: + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE_HSI + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE_PLL + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetQUADSPIClockSource(uint32_t Source) +{ + MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_QSPISEL, Source); +} +#endif /* QUADSPI */ + +/** + * @brief Get USARTx clock source + * @rmtoll CCIPR USARTxSEL LL_RCC_GetUSARTClockSource + * @param USARTx This parameter can be one of the following values: + * @arg @ref LL_RCC_USART1_CLKSOURCE + * @arg @ref LL_RCC_USART2_CLKSOURCE + * @arg @ref LL_RCC_USART3_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 + * @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_USART1_CLKSOURCE_HSI + * @arg @ref LL_RCC_USART1_CLKSOURCE_LSE + * @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_USART2_CLKSOURCE_HSI + * @arg @ref LL_RCC_USART2_CLKSOURCE_LSE + * @arg @ref LL_RCC_USART3_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_USART3_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_USART3_CLKSOURCE_HSI + * @arg @ref LL_RCC_USART3_CLKSOURCE_LSE + */ +__STATIC_INLINE uint32_t LL_RCC_GetUSARTClockSource(uint32_t USARTx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, USARTx) | (USARTx << 16U)); +} + +#if defined(UART4) +/** + * @brief Get UARTx clock source + * @rmtoll CCIPR UARTxSEL LL_RCC_GetUARTClockSource + * @param UARTx This parameter can be one of the following values: + * @arg @ref LL_RCC_UART4_CLKSOURCE (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE (*) + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_UART4_CLKSOURCE_PCLK1 (*) + * @arg @ref LL_RCC_UART4_CLKSOURCE_SYSCLK (*) + * @arg @ref LL_RCC_UART4_CLKSOURCE_HSI (*) + * @arg @ref LL_RCC_UART4_CLKSOURCE_LSE (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_PCLK1 (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_SYSCLK (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_HSI (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE_LSE (*) + * + * (*) value not defined in all devices. + */ +__STATIC_INLINE uint32_t LL_RCC_GetUARTClockSource(uint32_t UARTx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, UARTx) | (UARTx << 16U)); +} +#endif /* UART4 */ + +/** + * @brief Get LPUARTx clock source + * @rmtoll CCIPR LPUART1SEL LL_RCC_GetLPUARTClockSource + * @param LPUARTx This parameter can be one of the following values: + * @arg @ref LL_RCC_LPUART1_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE + */ +__STATIC_INLINE uint32_t LL_RCC_GetLPUARTClockSource(uint32_t LPUARTx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx)); +} + +/** + * @brief Get I2Cx clock source + * @rmtoll CCIPR I2CxSEL LL_RCC_GetI2CClockSource + * @param I2Cx This parameter can be one of the following values: + * @arg @ref LL_RCC_I2C1_CLKSOURCE + * @arg @ref LL_RCC_I2C2_CLKSOURCE + * @arg @ref LL_RCC_I2C3_CLKSOURCE + * @arg @ref LL_RCC_I2C4_CLKSOURCE (*) + * + * (*) value not defined in all devices. + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI + * @arg @ref LL_RCC_I2C2_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_I2C2_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2C2_CLKSOURCE_HSI + * @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI + * @arg @ref LL_RCC_I2C4_CLKSOURCE_PCLK1 (*) + * @arg @ref LL_RCC_I2C4_CLKSOURCE_SYSCLK (*) + * @arg @ref LL_RCC_I2C4_CLKSOURCE_HSI (*) + * + * (*) value not defined in all devices. + */ +__STATIC_INLINE uint32_t LL_RCC_GetI2CClockSource(uint32_t I2Cx) +{ + __IO const uint32_t *reg = (__IO uint32_t *)(uint32_t)(RCC_BASE + 0x88U + (I2Cx >> 24U)); + return (uint32_t)((READ_BIT(*reg, 3UL << ((I2Cx & 0x001F0000U) >> 16U)) >> ((I2Cx & 0x001F0000U) >> 16U)) | (I2Cx & 0xFFFF0000U)); +} + +/** + * @brief Get LPTIMx clock source + * @rmtoll CCIPR LPTIMxSEL LL_RCC_GetLPTIMClockSource + * @param LPTIMx This parameter can be one of the following values: + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1 + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE + */ +__STATIC_INLINE uint32_t LL_RCC_GetLPTIMClockSource(uint32_t LPTIMx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, LPTIMx)); +} + +/** + * @brief Get SAIx clock source + * @rmtoll CCIPR SAI1SEL LL_RCC_GetSAIClockSource + * @param SAIx This parameter can be one of the following values: + * @arg @ref LL_RCC_SAI1_CLKSOURCE + * + * (*) value not defined in all devices. + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_SAI1_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLL + * @arg @ref LL_RCC_SAI1_CLKSOURCE_PIN + * @arg @ref LL_RCC_SAI1_CLKSOURCE_HSI + * + * (*) value not defined in all devices. + */ +__STATIC_INLINE uint32_t LL_RCC_GetSAIClockSource(uint32_t SAIx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, SAIx)); +} + +/** + * @brief Get I2Sx clock source + * @rmtoll CCIPR I2S23SEL LL_RCC_GetI2SClockSource + * @param I2Sx This parameter can be one of the following values: + * @arg @ref LL_RCC_I2S_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_I2S_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_I2S_CLKSOURCE_PLL + * @arg @ref LL_RCC_I2S_CLKSOURCE_PIN + * @arg @ref LL_RCC_I2S_CLKSOURCE_HSI + */ +__STATIC_INLINE uint32_t LL_RCC_GetI2SClockSource(uint32_t I2Sx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, I2Sx)); +} + +#if defined(FDCAN1) +/** + * @brief Get FDCANx clock source + * @rmtoll CCIPR FDCANSEL LL_RCC_GetFDCANClockSource + * @param FDCANx This parameter can be one of the following values: + * @arg @ref LL_RCC_FDCAN_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_FDCAN_CLKSOURCE_HSE + * @arg @ref LL_RCC_FDCAN_CLKSOURCE_PLL + * @arg @ref LL_RCC_FDCAN_CLKSOURCE_PCLK1 + * @retval None + */ +__STATIC_INLINE uint32_t LL_RCC_GetFDCANClockSource(uint32_t FDCANx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, FDCANx)); +} +#endif /* FDCAN1 */ + +/** + * @brief Get RNGx clock source + * @rmtoll CCIPR CLK48SEL LL_RCC_GetRNGClockSource + * @param RNGx This parameter can be one of the following values: + * @arg @ref LL_RCC_RNG_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48 + * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL + */ +__STATIC_INLINE uint32_t LL_RCC_GetRNGClockSource(uint32_t RNGx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, RNGx)); +} + +/** + * @brief Get USBx clock source + * @rmtoll CCIPR CLK48SEL LL_RCC_GetUSBClockSource + * @param USBx This parameter can be one of the following values: + * @arg @ref LL_RCC_USB_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_USB_CLKSOURCE_HSI48 + * @arg @ref LL_RCC_USB_CLKSOURCE_PLL + */ +__STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR, USBx)); +} + +/** + * @brief Get ADCx clock source + * @rmtoll CCIPR ADCSEL LL_RCC_GetADCClockSource + * @param ADCx This parameter can be one of the following values: + * @arg @ref LL_RCC_ADC12_CLKSOURCE + * @arg @ref LL_RCC_ADC345_CLKSOURCE (*) + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_ADC12_CLKSOURCE_NONE + * @arg @ref LL_RCC_ADC12_CLKSOURCE_PLL + * @arg @ref LL_RCC_ADC12_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_ADC345_CLKSOURCE_NONE (*) + * @arg @ref LL_RCC_ADC345_CLKSOURCE_PLL (*) + * @arg @ref LL_RCC_ADC345_CLKSOURCE_SYSCLK (*) + * + * (*) value not defined in all devices. + */ +__STATIC_INLINE uint32_t LL_RCC_GetADCClockSource(uint32_t ADCx) +{ + return (uint32_t)((READ_BIT(RCC->CCIPR, 3UL << ((ADCx & 0x001F0000U) >> 16U)) >> ((ADCx & 0x001F0000U) >> 16U)) | (ADCx & 0xFFFF0000U)); +} + +#if defined(QUADSPI) +/** + * @brief Get QUADSPI clock source + * @rmtoll CCIPR2 QSPISEL LL_RCC_GetQUADSPIClockSource + * @param QUADSPIx This parameter can be one of the following values: + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE_SYSCLK + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE_HSI + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE_PLL + */ +__STATIC_INLINE uint32_t LL_RCC_GetQUADSPIClockSource(uint32_t QUADSPIx) +{ + return (uint32_t)(READ_BIT(RCC->CCIPR2, QUADSPIx)); +} +#endif /* QUADSPI */ +/** + * @} + */ + +/** @defgroup RCC_LL_EF_RTC RTC + * @{ + */ + +/** + * @brief Set RTC Clock Source + * @note Once the RTC clock source has been selected, it cannot be changed anymore unless + * the Backup domain is reset, or unless a failure is detected on LSE (LSECSSD is + * set). The BDRST bit can be used to reset them. + * @rmtoll BDCR RTCSEL LL_RCC_SetRTCClockSource + * @param Source This parameter can be one of the following values: + * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE + * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE + * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI + * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV32 + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source) +{ + MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source); +} + +/** + * @brief Get RTC Clock Source + * @rmtoll BDCR RTCSEL LL_RCC_GetRTCClockSource + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE + * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE + * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI + * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV32 + */ +__STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void) +{ + return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL)); +} + +/** + * @brief Enable RTC + * @rmtoll BDCR RTCEN LL_RCC_EnableRTC + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableRTC(void) +{ + SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN); +} + +/** + * @brief Disable RTC + * @rmtoll BDCR RTCEN LL_RCC_DisableRTC + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableRTC(void) +{ + CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN); +} + +/** + * @brief Check if RTC has been enabled or not + * @rmtoll BDCR RTCEN LL_RCC_IsEnabledRTC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void) +{ + return ((READ_BIT(RCC->BDCR, RCC_BDCR_RTCEN) == (RCC_BDCR_RTCEN)) ? 1UL : 0UL); +} + +/** + * @brief Force the Backup domain reset + * @rmtoll BDCR BDRST LL_RCC_ForceBackupDomainReset + * @retval None + */ +__STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void) +{ + SET_BIT(RCC->BDCR, RCC_BDCR_BDRST); +} + +/** + * @brief Release the Backup domain reset + * @rmtoll BDCR BDRST LL_RCC_ReleaseBackupDomainReset + * @retval None + */ +__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void) +{ + CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST); +} + +/** + * @} + */ + + +/** @defgroup RCC_LL_EF_PLL PLL + * @{ + */ + +/** + * @brief Enable PLL + * @rmtoll CR PLLON LL_RCC_PLL_Enable + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_Enable(void) +{ + SET_BIT(RCC->CR, RCC_CR_PLLON); +} + +/** + * @brief Disable PLL + * @note Cannot be disabled if the PLL clock is used as the system clock + * @rmtoll CR PLLON LL_RCC_PLL_Disable + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_Disable(void) +{ + CLEAR_BIT(RCC->CR, RCC_CR_PLLON); +} + +/** + * @brief Check if PLL Ready + * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void) +{ + return ((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY)) ? 1UL : 0UL); +} + +/** + * @brief Configure PLL used for SYSCLK Domain + * @note PLL Source and PLLM Divider can be written only when PLL + * is disabled. + * @note PLLN/PLLR can be written only when PLL is disabled. + * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SYS\n + * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SYS\n + * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SYS\n + * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_SYS + * @param Source This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLSOURCE_NONE + * @arg @ref LL_RCC_PLLSOURCE_HSI + * @arg @ref LL_RCC_PLLSOURCE_HSE + * @param PLLM This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLM_DIV_1 + * @arg @ref LL_RCC_PLLM_DIV_2 + * @arg @ref LL_RCC_PLLM_DIV_3 + * @arg @ref LL_RCC_PLLM_DIV_4 + * @arg @ref LL_RCC_PLLM_DIV_5 + * @arg @ref LL_RCC_PLLM_DIV_6 + * @arg @ref LL_RCC_PLLM_DIV_7 + * @arg @ref LL_RCC_PLLM_DIV_8 + * @arg @ref LL_RCC_PLLM_DIV_9 + * @arg @ref LL_RCC_PLLM_DIV_10 + * @arg @ref LL_RCC_PLLM_DIV_11 + * @arg @ref LL_RCC_PLLM_DIV_12 + * @arg @ref LL_RCC_PLLM_DIV_13 + * @arg @ref LL_RCC_PLLM_DIV_14 + * @arg @ref LL_RCC_PLLM_DIV_15 + * @arg @ref LL_RCC_PLLM_DIV_16 + * @param PLLN Between Min_Data = 8 and Max_Data = 127 + * @param PLLR This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLR_DIV_2 + * @arg @ref LL_RCC_PLLR_DIV_4 + * @arg @ref LL_RCC_PLLR_DIV_6 + * @arg @ref LL_RCC_PLLR_DIV_8 + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) +{ + MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR, + Source | PLLM | (PLLN << RCC_PLLCFGR_PLLN_Pos) | PLLR); +} + +/** + * @brief Configure PLL used for ADC domain clock + * @note PLL Source and PLLM Divider can be written only when PLL + * is disabled. + * @note PLLN/PLLP can be written only when PLL is disabled. + * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_ADC\n + * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_ADC\n + * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_ADC\n + * PLLCFGR PLLPDIV LL_RCC_PLL_ConfigDomain_ADC + * @param Source This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLSOURCE_NONE + * @arg @ref LL_RCC_PLLSOURCE_HSI + * @arg @ref LL_RCC_PLLSOURCE_HSE + * @param PLLM This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLM_DIV_1 + * @arg @ref LL_RCC_PLLM_DIV_2 + * @arg @ref LL_RCC_PLLM_DIV_3 + * @arg @ref LL_RCC_PLLM_DIV_4 + * @arg @ref LL_RCC_PLLM_DIV_5 + * @arg @ref LL_RCC_PLLM_DIV_6 + * @arg @ref LL_RCC_PLLM_DIV_7 + * @arg @ref LL_RCC_PLLM_DIV_8 + * @arg @ref LL_RCC_PLLM_DIV_9 + * @arg @ref LL_RCC_PLLM_DIV_10 + * @arg @ref LL_RCC_PLLM_DIV_11 + * @arg @ref LL_RCC_PLLM_DIV_12 + * @arg @ref LL_RCC_PLLM_DIV_13 + * @arg @ref LL_RCC_PLLM_DIV_14 + * @arg @ref LL_RCC_PLLM_DIV_15 + * @arg @ref LL_RCC_PLLM_DIV_16 + * @param PLLN Between Min_Data = 8 and Max_Data = 127 + * @param PLLP This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLP_DIV_2 + * @arg @ref LL_RCC_PLLP_DIV_3 + * @arg @ref LL_RCC_PLLP_DIV_4 + * @arg @ref LL_RCC_PLLP_DIV_5 + * @arg @ref LL_RCC_PLLP_DIV_6 + * @arg @ref LL_RCC_PLLP_DIV_7 + * @arg @ref LL_RCC_PLLP_DIV_8 + * @arg @ref LL_RCC_PLLP_DIV_9 + * @arg @ref LL_RCC_PLLP_DIV_10 + * @arg @ref LL_RCC_PLLP_DIV_11 + * @arg @ref LL_RCC_PLLP_DIV_12 + * @arg @ref LL_RCC_PLLP_DIV_13 + * @arg @ref LL_RCC_PLLP_DIV_14 + * @arg @ref LL_RCC_PLLP_DIV_15 + * @arg @ref LL_RCC_PLLP_DIV_16 + * @arg @ref LL_RCC_PLLP_DIV_17 + * @arg @ref LL_RCC_PLLP_DIV_18 + * @arg @ref LL_RCC_PLLP_DIV_19 + * @arg @ref LL_RCC_PLLP_DIV_20 + * @arg @ref LL_RCC_PLLP_DIV_21 + * @arg @ref LL_RCC_PLLP_DIV_22 + * @arg @ref LL_RCC_PLLP_DIV_23 + * @arg @ref LL_RCC_PLLP_DIV_24 + * @arg @ref LL_RCC_PLLP_DIV_25 + * @arg @ref LL_RCC_PLLP_DIV_26 + * @arg @ref LL_RCC_PLLP_DIV_27 + * @arg @ref LL_RCC_PLLP_DIV_28 + * @arg @ref LL_RCC_PLLP_DIV_29 + * @arg @ref LL_RCC_PLLP_DIV_30 + * @arg @ref LL_RCC_PLLP_DIV_31 + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_ADC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP) +{ + MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLPDIV, + Source | PLLM | (PLLN << RCC_PLLCFGR_PLLN_Pos) | PLLP); +} + +/** + * @brief Configure PLL used for 48Mhz domain clock + * @note PLL Source and PLLM Divider can be written only when PLL, + * is disabled. + * @note PLLN/PLLQ can be written only when PLL is disabled. + * @note This can be selected for USB, RNG + * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_48M\n + * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_48M\n + * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_48M\n + * PLLCFGR PLLQ LL_RCC_PLL_ConfigDomain_48M + * @param Source This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLSOURCE_NONE + * @arg @ref LL_RCC_PLLSOURCE_HSI + * @arg @ref LL_RCC_PLLSOURCE_HSE + * @param PLLM This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLM_DIV_1 + * @arg @ref LL_RCC_PLLM_DIV_2 + * @arg @ref LL_RCC_PLLM_DIV_3 + * @arg @ref LL_RCC_PLLM_DIV_4 + * @arg @ref LL_RCC_PLLM_DIV_5 + * @arg @ref LL_RCC_PLLM_DIV_6 + * @arg @ref LL_RCC_PLLM_DIV_7 + * @arg @ref LL_RCC_PLLM_DIV_8 + * @arg @ref LL_RCC_PLLM_DIV_9 + * @arg @ref LL_RCC_PLLM_DIV_10 + * @arg @ref LL_RCC_PLLM_DIV_11 + * @arg @ref LL_RCC_PLLM_DIV_12 + * @arg @ref LL_RCC_PLLM_DIV_13 + * @arg @ref LL_RCC_PLLM_DIV_14 + * @arg @ref LL_RCC_PLLM_DIV_15 + * @arg @ref LL_RCC_PLLM_DIV_16 + * @param PLLN Between Min_Data = 8 and Max_Data = 127 + * @param PLLQ This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLQ_DIV_2 + * @arg @ref LL_RCC_PLLQ_DIV_4 + * @arg @ref LL_RCC_PLLQ_DIV_6 + * @arg @ref LL_RCC_PLLQ_DIV_8 + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ) +{ + MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLQ, + Source | PLLM | (PLLN << RCC_PLLCFGR_PLLN_Pos) | PLLQ); +} + +/** + * @brief Configure PLL clock source + * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_SetMainSource + * @param PLLSource This parameter can be one of the following values: + * @arg @ref LL_RCC_PLLSOURCE_NONE + * @arg @ref LL_RCC_PLLSOURCE_HSI + * @arg @ref LL_RCC_PLLSOURCE_HSE + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource) +{ + MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSource); +} + +/** + * @brief Get the oscillator used as PLL clock source. + * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_GetMainSource + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_PLLSOURCE_NONE + * @arg @ref LL_RCC_PLLSOURCE_HSI + * @arg @ref LL_RCC_PLLSOURCE_HSE + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void) +{ + return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC)); +} + +/** + * @brief Get Main PLL multiplication factor for VCO + * @rmtoll PLLCFGR PLLN LL_RCC_PLL_GetN + * @retval Between Min_Data = 8 and Max_Data = 127 + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetN(void) +{ + return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); +} + +/** + * @brief Get Main PLL division factor for PLLP + * @note Used for PLLADCCLK (ADC clock) + * @rmtoll PLLCFGR PLLPDIV LL_RCC_PLL_GetP\n + * @rmtoll PLLCFGR PLLP LL_RCC_PLL_GetP + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_PLLP_DIV_2 + * @arg @ref LL_RCC_PLLP_DIV_3 + * @arg @ref LL_RCC_PLLP_DIV_4 + * @arg @ref LL_RCC_PLLP_DIV_5 + * @arg @ref LL_RCC_PLLP_DIV_6 + * @arg @ref LL_RCC_PLLP_DIV_7 + * @arg @ref LL_RCC_PLLP_DIV_8 + * @arg @ref LL_RCC_PLLP_DIV_9 + * @arg @ref LL_RCC_PLLP_DIV_10 + * @arg @ref LL_RCC_PLLP_DIV_11 + * @arg @ref LL_RCC_PLLP_DIV_12 + * @arg @ref LL_RCC_PLLP_DIV_13 + * @arg @ref LL_RCC_PLLP_DIV_14 + * @arg @ref LL_RCC_PLLP_DIV_15 + * @arg @ref LL_RCC_PLLP_DIV_16 + * @arg @ref LL_RCC_PLLP_DIV_17 + * @arg @ref LL_RCC_PLLP_DIV_18 + * @arg @ref LL_RCC_PLLP_DIV_19 + * @arg @ref LL_RCC_PLLP_DIV_20 + * @arg @ref LL_RCC_PLLP_DIV_21 + * @arg @ref LL_RCC_PLLP_DIV_22 + * @arg @ref LL_RCC_PLLP_DIV_23 + * @arg @ref LL_RCC_PLLP_DIV_24 + * @arg @ref LL_RCC_PLLP_DIV_25 + * @arg @ref LL_RCC_PLLP_DIV_26 + * @arg @ref LL_RCC_PLLP_DIV_27 + * @arg @ref LL_RCC_PLLP_DIV_28 + * @arg @ref LL_RCC_PLLP_DIV_29 + * @arg @ref LL_RCC_PLLP_DIV_30 + * @arg @ref LL_RCC_PLLP_DIV_31 + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetP(void) +{ + return (uint32_t) ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) != 0U) ? READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) : ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) == RCC_PLLCFGR_PLLP) ? LL_RCC_PLLP_DIV_17 : LL_RCC_PLLP_DIV_7) ); +} + +/** + * @brief Get Main PLL division factor for PLLQ + * @note Used for PLL48M1CLK selected for USB, RNG (48 MHz clock) + * @rmtoll PLLCFGR PLLQ LL_RCC_PLL_GetQ + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_PLLQ_DIV_2 + * @arg @ref LL_RCC_PLLQ_DIV_4 + * @arg @ref LL_RCC_PLLQ_DIV_6 + * @arg @ref LL_RCC_PLLQ_DIV_8 + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetQ(void) +{ + return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ)); +} + +/** + * @brief Get Main PLL division factor for PLLR + * @note Used for PLLCLK (system clock) + * @rmtoll PLLCFGR PLLR LL_RCC_PLL_GetR + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_PLLR_DIV_2 + * @arg @ref LL_RCC_PLLR_DIV_4 + * @arg @ref LL_RCC_PLLR_DIV_6 + * @arg @ref LL_RCC_PLLR_DIV_8 + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetR(void) +{ + return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR)); +} + +/** + * @brief Get Division factor for the main PLL and other PLL + * @rmtoll PLLCFGR PLLM LL_RCC_PLL_GetDivider + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_PLLM_DIV_1 + * @arg @ref LL_RCC_PLLM_DIV_2 + * @arg @ref LL_RCC_PLLM_DIV_3 + * @arg @ref LL_RCC_PLLM_DIV_4 + * @arg @ref LL_RCC_PLLM_DIV_5 + * @arg @ref LL_RCC_PLLM_DIV_6 + * @arg @ref LL_RCC_PLLM_DIV_7 + * @arg @ref LL_RCC_PLLM_DIV_8 + * @arg @ref LL_RCC_PLLM_DIV_9 + * @arg @ref LL_RCC_PLLM_DIV_10 + * @arg @ref LL_RCC_PLLM_DIV_11 + * @arg @ref LL_RCC_PLLM_DIV_12 + * @arg @ref LL_RCC_PLLM_DIV_13 + * @arg @ref LL_RCC_PLLM_DIV_14 + * @arg @ref LL_RCC_PLLM_DIV_15 + * @arg @ref LL_RCC_PLLM_DIV_16 + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void) +{ + return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM)); +} + +/** + * @brief Enable PLL output mapped on ADC domain clock + * @rmtoll PLLCFGR PLLPEN LL_RCC_PLL_EnableDomain_ADC + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_EnableDomain_ADC(void) +{ + SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN); +} + +/** + * @brief Disable PLL output mapped on ADC domain clock + * @note Cannot be disabled if the PLL clock is used as the system + * clock + * @note In order to save power, when the PLLCLK of the PLL is + * not used, should be 0 + * @rmtoll PLLCFGR PLLPEN LL_RCC_PLL_DisableDomain_ADC + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_DisableDomain_ADC(void) +{ + CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN); +} + +/** + * @brief Check if PLL output mapped on ADC domain clock is enabled + * @rmtoll PLLCFGR PLLPEN LL_RCC_PLL_IsEnabledDomain_ADC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsEnabledDomain_ADC(void) +{ + return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN) == (RCC_PLLCFGR_PLLPEN)) ? 1UL : 0UL); +} + +/** + * @brief Enable PLL output mapped on 48MHz domain clock + * @rmtoll PLLCFGR PLLQEN LL_RCC_PLL_EnableDomain_48M + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_EnableDomain_48M(void) +{ + SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); +} + +/** + * @brief Disable PLL output mapped on 48MHz domain clock + * @note Cannot be disabled if the PLL clock is used as the system + * clock + * @note In order to save power, when the PLLCLK of the PLL is + * not used, should be 0 + * @rmtoll PLLCFGR PLLQEN LL_RCC_PLL_DisableDomain_48M + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_DisableDomain_48M(void) +{ + CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); +} + +/** + * @brief Check if PLL output mapped on 48MHz domain clock is enabled + * @rmtoll PLLCFGR PLLQEN LL_RCC_PLL_IsEnabledDomain_48M + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsEnabledDomain_48M(void) +{ + return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); +} + +/** + * @brief Enable PLL output mapped on SYSCLK domain + * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_EnableDomain_SYS + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_EnableDomain_SYS(void) +{ + SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN); +} + +/** + * @brief Disable PLL output mapped on SYSCLK domain + * @note Cannot be disabled if the PLL clock is used as the system + * clock + * @note In order to save power, when the PLLCLK of the PLL is + * not used, Main PLL should be 0 + * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_DisableDomain_SYS + * @retval None + */ +__STATIC_INLINE void LL_RCC_PLL_DisableDomain_SYS(void) +{ + CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN); +} + +/** + * @brief Check if PLL output mapped on SYSCLK domain clock is enabled + * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_IsEnabledDomain_SYS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsEnabledDomain_SYS(void) +{ + return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN) == (RCC_PLLCFGR_PLLREN)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_FLAG_Management FLAG Management + * @{ + */ + +/** + * @brief Clear LSI ready interrupt flag + * @rmtoll CICR LSIRDYC LL_RCC_ClearFlag_LSIRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_LSIRDYC); +} + +/** + * @brief Clear LSE ready interrupt flag + * @rmtoll CICR LSERDYC LL_RCC_ClearFlag_LSERDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_LSERDYC); +} + +/** + * @brief Clear HSI ready interrupt flag + * @rmtoll CICR HSIRDYC LL_RCC_ClearFlag_HSIRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_HSIRDYC); +} + +/** + * @brief Clear HSE ready interrupt flag + * @rmtoll CICR HSERDYC LL_RCC_ClearFlag_HSERDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_HSERDYC); +} + +/** + * @brief Clear PLL ready interrupt flag + * @rmtoll CICR PLLRDYC LL_RCC_ClearFlag_PLLRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_PLLRDYC); +} + +/** + * @brief Clear HSI48 ready interrupt flag + * @rmtoll CICR HSI48RDYC LL_RCC_ClearFlag_HSI48RDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_HSI48RDY(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_HSI48RDYC); +} + +/** + * @brief Clear Clock security system interrupt flag + * @rmtoll CICR CSSC LL_RCC_ClearFlag_HSECSS + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_CSSC); +} + +/** + * @brief Clear LSE Clock security system interrupt flag + * @rmtoll CICR LSECSSC LL_RCC_ClearFlag_LSECSS + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearFlag_LSECSS(void) +{ + SET_BIT(RCC->CICR, RCC_CICR_LSECSSC); +} + +/** + * @brief Check if LSI ready interrupt occurred or not + * @rmtoll CIFR LSIRDYF LL_RCC_IsActiveFlag_LSIRDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_LSIRDYF) == (RCC_CIFR_LSIRDYF)) ? 1UL : 0UL); +} + +/** + * @brief Check if LSE ready interrupt occurred or not + * @rmtoll CIFR LSERDYF LL_RCC_IsActiveFlag_LSERDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_LSERDYF) == (RCC_CIFR_LSERDYF)) ? 1UL : 0UL); +} + +/** + * @brief Check if HSI ready interrupt occurred or not + * @rmtoll CIFR HSIRDYF LL_RCC_IsActiveFlag_HSIRDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_HSIRDYF) == (RCC_CIFR_HSIRDYF)) ? 1UL : 0UL); +} + +/** + * @brief Check if HSE ready interrupt occurred or not + * @rmtoll CIFR HSERDYF LL_RCC_IsActiveFlag_HSERDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_HSERDYF) == (RCC_CIFR_HSERDYF)) ? 1UL : 0UL); +} + +/** + * @brief Check if PLL ready interrupt occurred or not + * @rmtoll CIFR PLLRDYF LL_RCC_IsActiveFlag_PLLRDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_PLLRDYF) == (RCC_CIFR_PLLRDYF)) ? 1UL : 0UL); +} + +/** + * @brief Check if HSI48 ready interrupt occurred or not + * @rmtoll CIR HSI48RDYF LL_RCC_IsActiveFlag_HSI48RDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSI48RDY(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_HSI48RDYF) == (RCC_CIFR_HSI48RDYF)) ? 1UL : 0UL); +} + +/** + * @brief Check if Clock security system interrupt occurred or not + * @rmtoll CIFR CSSF LL_RCC_IsActiveFlag_HSECSS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_CSSF) == (RCC_CIFR_CSSF)) ? 1UL : 0UL); +} + +/** + * @brief Check if LSE Clock security system interrupt occurred or not + * @rmtoll CIFR LSECSSF LL_RCC_IsActiveFlag_LSECSS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSECSS(void) +{ + return ((READ_BIT(RCC->CIFR, RCC_CIFR_LSECSSF) == (RCC_CIFR_LSECSSF)) ? 1UL : 0UL); +} + +/** + * @brief Check if RCC flag Independent Watchdog reset is set or not. + * @rmtoll CSR IWDGRSTF LL_RCC_IsActiveFlag_IWDGRST + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF)) ? 1UL : 0UL); +} + +/** + * @brief Check if RCC flag Low Power reset is set or not. + * @rmtoll CSR LPWRRSTF LL_RCC_IsActiveFlag_LPWRRST + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF)) ? 1UL : 0UL); +} + +/** + * @brief Check if RCC flag Option byte reset is set or not. + * @rmtoll CSR OBLRSTF LL_RCC_IsActiveFlag_OBLRST + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_OBLRST(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_OBLRSTF) == (RCC_CSR_OBLRSTF)) ? 1UL : 0UL); +} + +/** + * @brief Check if RCC flag Pin reset is set or not. + * @rmtoll CSR PINRSTF LL_RCC_IsActiveFlag_PINRST + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF)) ? 1UL : 0UL); +} + +/** + * @brief Check if RCC flag Software reset is set or not. + * @rmtoll CSR SFTRSTF LL_RCC_IsActiveFlag_SFTRST + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF)) ? 1UL : 0UL); +} + +/** + * @brief Check if RCC flag Window Watchdog reset is set or not. + * @rmtoll CSR WWDGRSTF LL_RCC_IsActiveFlag_WWDGRST + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF)) ? 1UL : 0UL); +} + +/** + * @brief Check if RCC flag BOR reset is set or not. + * @rmtoll CSR BORRSTF LL_RCC_IsActiveFlag_BORRST + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_BORRST(void) +{ + return ((READ_BIT(RCC->CSR, RCC_CSR_BORRSTF) == (RCC_CSR_BORRSTF)) ? 1UL : 0UL); +} + +/** + * @brief Set RMVF bit to clear the reset flags. + * @rmtoll CSR RMVF LL_RCC_ClearResetFlags + * @retval None + */ +__STATIC_INLINE void LL_RCC_ClearResetFlags(void) +{ + SET_BIT(RCC->CSR, RCC_CSR_RMVF); +} + +/** + * @} + */ + +/** @defgroup RCC_LL_EF_IT_Management IT Management + * @{ + */ + +/** + * @brief Enable LSI ready interrupt + * @rmtoll CIER LSIRDYIE LL_RCC_EnableIT_LSIRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableIT_LSIRDY(void) +{ + SET_BIT(RCC->CIER, RCC_CIER_LSIRDYIE); +} + +/** + * @brief Enable LSE ready interrupt + * @rmtoll CIER LSERDYIE LL_RCC_EnableIT_LSERDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableIT_LSERDY(void) +{ + SET_BIT(RCC->CIER, RCC_CIER_LSERDYIE); +} + +/** + * @brief Enable HSI ready interrupt + * @rmtoll CIER HSIRDYIE LL_RCC_EnableIT_HSIRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableIT_HSIRDY(void) +{ + SET_BIT(RCC->CIER, RCC_CIER_HSIRDYIE); +} + +/** + * @brief Enable HSE ready interrupt + * @rmtoll CIER HSERDYIE LL_RCC_EnableIT_HSERDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableIT_HSERDY(void) +{ + SET_BIT(RCC->CIER, RCC_CIER_HSERDYIE); +} + +/** + * @brief Enable PLL ready interrupt + * @rmtoll CIER PLLRDYIE LL_RCC_EnableIT_PLLRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableIT_PLLRDY(void) +{ + SET_BIT(RCC->CIER, RCC_CIER_PLLRDYIE); +} + +/** + * @brief Enable HSI48 ready interrupt + * @rmtoll CIER HSI48RDYIE LL_RCC_EnableIT_HSI48RDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableIT_HSI48RDY(void) +{ + SET_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE); +} + +/** + * @brief Enable LSE clock security system interrupt + * @rmtoll CIER LSECSSIE LL_RCC_EnableIT_LSECSS + * @retval None + */ +__STATIC_INLINE void LL_RCC_EnableIT_LSECSS(void) +{ + SET_BIT(RCC->CIER, RCC_CIER_LSECSSIE); +} + +/** + * @brief Disable LSI ready interrupt + * @rmtoll CIER LSIRDYIE LL_RCC_DisableIT_LSIRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableIT_LSIRDY(void) +{ + CLEAR_BIT(RCC->CIER, RCC_CIER_LSIRDYIE); +} + +/** + * @brief Disable LSE ready interrupt + * @rmtoll CIER LSERDYIE LL_RCC_DisableIT_LSERDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableIT_LSERDY(void) +{ + CLEAR_BIT(RCC->CIER, RCC_CIER_LSERDYIE); +} + +/** + * @brief Disable HSI ready interrupt + * @rmtoll CIER HSIRDYIE LL_RCC_DisableIT_HSIRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableIT_HSIRDY(void) +{ + CLEAR_BIT(RCC->CIER, RCC_CIER_HSIRDYIE); +} + +/** + * @brief Disable HSE ready interrupt + * @rmtoll CIER HSERDYIE LL_RCC_DisableIT_HSERDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableIT_HSERDY(void) +{ + CLEAR_BIT(RCC->CIER, RCC_CIER_HSERDYIE); +} + +/** + * @brief Disable PLL ready interrupt + * @rmtoll CIER PLLRDYIE LL_RCC_DisableIT_PLLRDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableIT_PLLRDY(void) +{ + CLEAR_BIT(RCC->CIER, RCC_CIER_PLLRDYIE); +} + +/** + * @brief Disable HSI48 ready interrupt + * @rmtoll CIER HSI48RDYIE LL_RCC_DisableIT_HSI48RDY + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableIT_HSI48RDY(void) +{ + CLEAR_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE); +} + +/** + * @brief Disable LSE clock security system interrupt + * @rmtoll CIER LSECSSIE LL_RCC_DisableIT_LSECSS + * @retval None + */ +__STATIC_INLINE void LL_RCC_DisableIT_LSECSS(void) +{ + CLEAR_BIT(RCC->CIER, RCC_CIER_LSECSSIE); +} + +/** + * @brief Checks if LSI ready interrupt source is enabled or disabled. + * @rmtoll CIER LSIRDYIE LL_RCC_IsEnabledIT_LSIRDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSIRDY(void) +{ + return ((READ_BIT(RCC->CIER, RCC_CIER_LSIRDYIE) == (RCC_CIER_LSIRDYIE)) ? 1UL : 0UL); +} + +/** + * @brief Checks if LSE ready interrupt source is enabled or disabled. + * @rmtoll CIER LSERDYIE LL_RCC_IsEnabledIT_LSERDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSERDY(void) +{ + return ((READ_BIT(RCC->CIER, RCC_CIER_LSERDYIE) == (RCC_CIER_LSERDYIE)) ? 1UL : 0UL); +} + +/** + * @brief Checks if HSI ready interrupt source is enabled or disabled. + * @rmtoll CIER HSIRDYIE LL_RCC_IsEnabledIT_HSIRDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSIRDY(void) +{ + return ((READ_BIT(RCC->CIER, RCC_CIER_HSIRDYIE) == (RCC_CIER_HSIRDYIE)) ? 1UL : 0UL); +} + +/** + * @brief Checks if HSE ready interrupt source is enabled or disabled. + * @rmtoll CIER HSERDYIE LL_RCC_IsEnabledIT_HSERDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSERDY(void) +{ + return ((READ_BIT(RCC->CIER, RCC_CIER_HSERDYIE) == (RCC_CIER_HSERDYIE)) ? 1UL : 0UL); +} + +/** + * @brief Checks if PLL ready interrupt source is enabled or disabled. + * @rmtoll CIER PLLRDYIE LL_RCC_IsEnabledIT_PLLRDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLRDY(void) +{ + return ((READ_BIT(RCC->CIER, RCC_CIER_PLLRDYIE) == (RCC_CIER_PLLRDYIE)) ? 1UL : 0UL); +} + +/** + * @brief Checks if HSI48 ready interrupt source is enabled or disabled. + * @rmtoll CIER HSI48RDYIE LL_RCC_IsEnabledIT_HSI48RDY + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSI48RDY(void) +{ + return ((READ_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE) == (RCC_CIER_HSI48RDYIE)) ? 1UL : 0UL); +} + +/** + * @brief Checks if LSECSS interrupt source is enabled or disabled. + * @rmtoll CIER LSECSSIE LL_RCC_IsEnabledIT_LSECSS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSECSS(void) +{ + return ((READ_BIT(RCC->CIER, RCC_CIER_LSECSSIE) == (RCC_CIER_LSECSSIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup RCC_LL_EF_Init De-initialization function + * @{ + */ +ErrorStatus LL_RCC_DeInit(void); +/** + * @} + */ + +/** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions + * @{ + */ +void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks); +uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource); +#if defined(UART4) +uint32_t LL_RCC_GetUARTClockFreq(uint32_t UARTxSource); +#endif /* UART4 */ +uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource); +uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource); +uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource); +uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource); +uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource); +#if defined(FDCAN1) +uint32_t LL_RCC_GetFDCANClockFreq(uint32_t FDCANxSource); +#endif /* FDCAN1 */ +uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource); +uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource); +uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource); +#if defined(QUADSPI) +uint32_t LL_RCC_GetQUADSPIClockFreq(uint32_t QUADSPIxSource); +#endif /* QUADSPI */ +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_LL_RCC_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h new file mode 100644 index 0000000..e90aebb --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h @@ -0,0 +1,1516 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_system.h + * @author MCD Application Team + * @brief Header file of SYSTEM LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim + ============================================================================== + ##### How to use this driver ##### + ============================================================================== + [..] + The LL SYSTEM driver contains a set of generic APIs that can be + used by user: + (+) Some of the FLASH features need to be handled in the SYSTEM file. + (+) Access to DBGCMU registers + (+) Access to SYSCFG registers + (+) Access to VREFBUF registers + + @endverbatim + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_LL_SYSTEM_H +#define __STM32G4xx_LL_SYSTEM_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) || defined (VREFBUF) + +/** @defgroup SYSTEM_LL SYSTEM + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants + * @{ + */ + +/* Defines used for position in the register */ +#define DBGMCU_REVID_POSITION (uint32_t)POSITION_VAL(DBGMCU_IDCODE_REV_ID) + +/** + * @brief Power-down in Run mode Flash key + */ +#define FLASH_PDKEY1 0x04152637U /*!< Flash power down key1 */ +#define FLASH_PDKEY2 0xFAFBFCFDU /*!< Flash power down key2: used with FLASH_PDKEY1 + to unlock the RUN_PD bit in FLASH_ACR */ + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants + * @{ + */ + +/** @defgroup SYSTEM_LL_EC_REMAP SYSCFG REMAP + * @{ + */ +#define LL_SYSCFG_REMAP_FLASH 0x00000000U /*!< Main Flash memory mapped at 0x00000000 */ +#define LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0 /*!< System Flash memory mapped at 0x00000000 */ +#define LL_SYSCFG_REMAP_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 | SYSCFG_MEMRMP_MEM_MODE_0) /*!< SRAM1 mapped at 0x00000000 */ +#if defined(FMC_Bank1_R) +#define LL_SYSCFG_REMAP_FMC SYSCFG_MEMRMP_MEM_MODE_1 /*!< FMC bank 1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 */ +#endif /* FMC_Bank1_R */ +#define LL_SYSCFG_REMAP_QUADSPI (SYSCFG_MEMRMP_MEM_MODE_2 | SYSCFG_MEMRMP_MEM_MODE_1) /*!< QUADSPI memory mapped at 0x00000000 */ +/** + * @} + */ + +#if defined(SYSCFG_MEMRMP_FB_MODE) +/** @defgroup SYSTEM_LL_EC_BANKMODE SYSCFG BANK MODE + * @{ + */ +#define LL_SYSCFG_BANKMODE_BANK1 0x00000000U /*!< Flash Bank1 mapped at 0x08000000 (and aliased @0x00000000) + and Flash Bank2 mapped at 0x08040000 (and aliased at 0x00080000) */ +#define LL_SYSCFG_BANKMODE_BANK2 SYSCFG_MEMRMP_FB_MODE /*!< Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000) + and Flash Bank1 mapped at 0x08040000 (and aliased at 0x00080000) */ +/** + * @} + */ + +#endif /* SYSCFG_MEMRMP_FB_MODE */ +/** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS + * @{ + */ +#define LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ +#define LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ +#if defined(SYSCFG_CFGR1_I2C_PB8_FMP) +#define LL_SYSCFG_I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ +#endif /* SYSCFG_CFGR1_I2C_PB8_FMP */ +#if defined(SYSCFG_CFGR1_I2C_PB9_FMP) +#define LL_SYSCFG_I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ +#endif /* SYSCFG_CFGR1_I2C_PB9_FMP */ +#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ +#if defined(I2C2) +#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ +#endif /* I2C2 */ +#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ +#if defined(I2C4) +#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ +#endif /* I2C4 */ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI PORT + * @{ + */ +#define LL_SYSCFG_EXTI_PORTA 0U /*!< EXTI PORT A */ +#define LL_SYSCFG_EXTI_PORTB 1U /*!< EXTI PORT B */ +#define LL_SYSCFG_EXTI_PORTC 2U /*!< EXTI PORT C */ +#define LL_SYSCFG_EXTI_PORTD 3U /*!< EXTI PORT D */ +#define LL_SYSCFG_EXTI_PORTE 4U /*!< EXTI PORT E */ +#define LL_SYSCFG_EXTI_PORTF 5U /*!< EXTI PORT F */ +#define LL_SYSCFG_EXTI_PORTG 6U /*!< EXTI PORT G */ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI LINE + * @{ + */ +#define LL_SYSCFG_EXTI_LINE0 (uint32_t)((0x000FU << 16U) | 0U) /* !< EXTI_POSITION_0 | EXTICR[0] */ +#define LL_SYSCFG_EXTI_LINE1 (uint32_t)((0x00F0U << 16U) | 0U) /* !< EXTI_POSITION_4 | EXTICR[0] */ +#define LL_SYSCFG_EXTI_LINE2 (uint32_t)((0x0F00U << 16U) | 0U) /* !< EXTI_POSITION_8 | EXTICR[0] */ +#define LL_SYSCFG_EXTI_LINE3 (uint32_t)((0xF000U << 16U) | 0U) /* !< EXTI_POSITION_12 | EXTICR[0] */ +#define LL_SYSCFG_EXTI_LINE4 (uint32_t)((0x000FU << 16U) | 1U) /* !< EXTI_POSITION_0 | EXTICR[1] */ +#define LL_SYSCFG_EXTI_LINE5 (uint32_t)((0x00F0U << 16U) | 1U) /* !< EXTI_POSITION_4 | EXTICR[1] */ +#define LL_SYSCFG_EXTI_LINE6 (uint32_t)((0x0F00U << 16U) | 1U) /* !< EXTI_POSITION_8 | EXTICR[1] */ +#define LL_SYSCFG_EXTI_LINE7 (uint32_t)((0xF000U << 16U) | 1U) /* !< EXTI_POSITION_12 | EXTICR[1] */ +#define LL_SYSCFG_EXTI_LINE8 (uint32_t)((0x000FU << 16U) | 2U) /* !< EXTI_POSITION_0 | EXTICR[2] */ +#define LL_SYSCFG_EXTI_LINE9 (uint32_t)((0x00F0U << 16U) | 2U) /* !< EXTI_POSITION_4 | EXTICR[2] */ +#define LL_SYSCFG_EXTI_LINE10 (uint32_t)((0x0F00U << 16U) | 2U) /* !< EXTI_POSITION_8 | EXTICR[2] */ +#define LL_SYSCFG_EXTI_LINE11 (uint32_t)((0xF000U << 16U) | 2U) /* !< EXTI_POSITION_12 | EXTICR[2] */ +#define LL_SYSCFG_EXTI_LINE12 (uint32_t)((0x000FU << 16U) | 3U) /* !< EXTI_POSITION_0 | EXTICR[3] */ +#define LL_SYSCFG_EXTI_LINE13 (uint32_t)((0x00F0U << 16U) | 3U) /* !< EXTI_POSITION_4 | EXTICR[3] */ +#define LL_SYSCFG_EXTI_LINE14 (uint32_t)((0x0F00U << 16U) | 3U) /* !< EXTI_POSITION_8 | EXTICR[3] */ +#define LL_SYSCFG_EXTI_LINE15 (uint32_t)((0xF000U << 16U) | 3U) /* !< EXTI_POSITION_12 | EXTICR[3] */ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_TIMBREAK SYSCFG TIMER BREAK + * @{ + */ +#define LL_SYSCFG_TIMBREAK_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal + with Break Input of TIM1/8/15/16/17 */ +#define LL_SYSCFG_TIMBREAK_PVD SYSCFG_CFGR2_PVDL /*!< Enables and locks the PVD connection + with TIM1/8/15/16/17 Break Input + and also the PVDE and PLS bits of the Power Control Interface */ +#define LL_SYSCFG_TIMBREAK_SRAM_PARITY SYSCFG_CFGR2_SPL /*!< Enables and locks the SRAM_PARITY error signal + with Break Input of TIM1/8/15/16/17 */ +#define LL_SYSCFG_TIMBREAK_LOCKUP SYSCFG_CFGR2_CLL /*!< Enables and locks the LOCKUP output of CortexM4 + with Break Input of TIM1/15/16/17 */ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_CCMSRAMWRP SYSCFG CCMSRAM WRP + * @{ + */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE0 SYSCFG_SWPR_PAGE0 /*!< CCMSRAM Write protection page 0 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE1 SYSCFG_SWPR_PAGE1 /*!< CCMSRAM Write protection page 1 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE2 SYSCFG_SWPR_PAGE2 /*!< CCMSRAM Write protection page 2 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE3 SYSCFG_SWPR_PAGE3 /*!< CCMSRAM Write protection page 3 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE4 SYSCFG_SWPR_PAGE4 /*!< CCMSRAM Write protection page 4 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE5 SYSCFG_SWPR_PAGE5 /*!< CCMSRAM Write protection page 5 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE6 SYSCFG_SWPR_PAGE6 /*!< CCMSRAM Write protection page 6 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE7 SYSCFG_SWPR_PAGE7 /*!< CCMSRAM Write protection page 7 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE8 SYSCFG_SWPR_PAGE8 /*!< CCMSRAM Write protection page 8 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE9 SYSCFG_SWPR_PAGE9 /*!< CCMSRAM Write protection page 9 */ +#if defined(SYSCFG_SWPR_PAGE10) +#define LL_SYSCFG_CCMSRAMWRP_PAGE10 SYSCFG_SWPR_PAGE10 /*!< CCMSRAM Write protection page 10 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE11 SYSCFG_SWPR_PAGE11 /*!< CCMSRAM Write protection page 11 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE12 SYSCFG_SWPR_PAGE12 /*!< CCMSRAM Write protection page 12 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE13 SYSCFG_SWPR_PAGE13 /*!< CCMSRAM Write protection page 13 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE14 SYSCFG_SWPR_PAGE14 /*!< CCMSRAM Write protection page 14 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE15 SYSCFG_SWPR_PAGE15 /*!< CCMSRAM Write protection page 15 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE16 SYSCFG_SWPR_PAGE16 /*!< CCMSRAM Write protection page 16 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE17 SYSCFG_SWPR_PAGE17 /*!< CCMSRAM Write protection page 17 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE18 SYSCFG_SWPR_PAGE18 /*!< CCMSRAM Write protection page 18 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE19 SYSCFG_SWPR_PAGE19 /*!< CCMSRAM Write protection page 19 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE20 SYSCFG_SWPR_PAGE20 /*!< CCMSRAM Write protection page 20 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE21 SYSCFG_SWPR_PAGE21 /*!< CCMSRAM Write protection page 21 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE22 SYSCFG_SWPR_PAGE22 /*!< CCMSRAM Write protection page 22 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE23 SYSCFG_SWPR_PAGE23 /*!< CCMSRAM Write protection page 23 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE24 SYSCFG_SWPR_PAGE24 /*!< CCMSRAM Write protection page 24 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE25 SYSCFG_SWPR_PAGE25 /*!< CCMSRAM Write protection page 25 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE26 SYSCFG_SWPR_PAGE26 /*!< CCMSRAM Write protection page 26 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE27 SYSCFG_SWPR_PAGE27 /*!< CCMSRAM Write protection page 27 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE28 SYSCFG_SWPR_PAGE28 /*!< CCMSRAM Write protection page 28 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE29 SYSCFG_SWPR_PAGE29 /*!< CCMSRAM Write protection page 29 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE30 SYSCFG_SWPR_PAGE30 /*!< CCMSRAM Write protection page 30 */ +#define LL_SYSCFG_CCMSRAMWRP_PAGE31 SYSCFG_SWPR_PAGE31 /*!< CCMSRAM Write protection page 31 */ +#endif /* SYSCFG_SWPR_PAGE10 */ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_TRACE DBGMCU TRACE Pin Assignment + * @{ + */ +#define LL_DBGMCU_TRACE_NONE 0x00000000U /*!< TRACE pins not assigned (default state) */ +#define LL_DBGMCU_TRACE_ASYNCH DBGMCU_CR_TRACE_IOEN /*!< TRACE pin assignment for Asynchronous Mode */ +#define LL_DBGMCU_TRACE_SYNCH_SIZE1 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_0) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 1 */ +#define LL_DBGMCU_TRACE_SYNCH_SIZE2 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_1) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 2 */ +#define LL_DBGMCU_TRACE_SYNCH_SIZE4 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 4 */ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP + * @{ + */ +#define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1FZR1_DBG_TIM2_STOP /*!< The counter clock of TIM2 is stopped when the core is halted*/ +#if defined(TIM3) +#define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1FZR1_DBG_TIM3_STOP /*!< The counter clock of TIM3 is stopped when the core is halted*/ +#endif /* TIM3 */ +#if defined(TIM4) +#define LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1FZR1_DBG_TIM4_STOP /*!< The counter clock of TIM4 is stopped when the core is halted*/ +#endif /* TIM4 */ +#if defined(TIM5) +#define LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1FZR1_DBG_TIM5_STOP /*!< The counter clock of TIM5 is stopped when the core is halted*/ +#endif /* TIM5 */ +#define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1FZR1_DBG_TIM6_STOP /*!< The counter clock of TIM6 is stopped when the core is halted*/ +#if defined(TIM7) +#define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1FZR1_DBG_TIM7_STOP /*!< The counter clock of TIM7 is stopped when the core is halted*/ +#endif /* TIM7 */ +#define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1FZR1_DBG_RTC_STOP /*!< The clock of the RTC counter is stopped when the core is halted*/ +#define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1FZR1_DBG_WWDG_STOP /*!< The window watchdog counter clock is stopped when the core is halted*/ +#define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1FZR1_DBG_IWDG_STOP /*!< The independent watchdog counter clock is stopped when the core is halted*/ +#define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1FZR1_DBG_I2C1_STOP /*!< The I2C1 SMBus timeout is frozen*/ +#if defined(I2C2) +#define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1FZR1_DBG_I2C2_STOP /*!< The I2C2 SMBus timeout is frozen*/ +#endif /* I2C2 */ +#define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1FZR1_DBG_I2C3_STOP /*!< The I2C3 SMBus timeout is frozen*/ +#define LL_DBGMCU_APB1_GRP1_LPTIM1_STOP DBGMCU_APB1FZR1_DBG_LPTIM1_STOP /*!< The counter clock of LPTIM1 is stopped when the core is halted*/ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_APB1_GRP2_STOP_IP DBGMCU APB1 GRP2 STOP IP + * @{ + */ +#if defined(I2C4) +#define LL_DBGMCU_APB1_GRP2_I2C4_STOP DBGMCU_APB1FZR2_DBG_I2C4_STOP /*!< The I2C4 SMBus timeout is frozen*/ +#endif /* I2C4 */ +/** + * @} + */ + +/** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP + * @{ + */ +#define LL_DBGMCU_APB2_GRP1_TIM1_STOP DBGMCU_APB2FZ_DBG_TIM1_STOP /*!< The counter clock of TIM1 is stopped when the core is halted*/ +#if defined(TIM8) +#define LL_DBGMCU_APB2_GRP1_TIM8_STOP DBGMCU_APB2FZ_DBG_TIM8_STOP /*!< The counter clock of TIM8 is stopped when the core is halted*/ +#endif /* TIM8 */ +#define LL_DBGMCU_APB2_GRP1_TIM15_STOP DBGMCU_APB2FZ_DBG_TIM15_STOP /*!< The counter clock of TIM15 is stopped when the core is halted*/ +#define LL_DBGMCU_APB2_GRP1_TIM16_STOP DBGMCU_APB2FZ_DBG_TIM16_STOP /*!< The counter clock of TIM16 is stopped when the core is halted*/ +#if defined(TIM17) +#define LL_DBGMCU_APB2_GRP1_TIM17_STOP DBGMCU_APB2FZ_DBG_TIM17_STOP /*!< The counter clock of TIM17 is stopped when the core is halted*/ +#endif /* TIM17 */ +#if defined(TIM20) +#define LL_DBGMCU_APB2_GRP1_TIM20_STOP DBGMCU_APB2FZ_DBG_TIM20_STOP /*!< The counter clock of TIM20 is stopped when the core is halted*/ +#endif /* TIM20 */ +#if defined(HRTIM1) +#define LL_DBGMCU_APB2_GRP1_HRTIM1_STOP DBGMCU_APB2FZ_DBG_HRTIM1_STOP /*!< The counter clock of HRTIM1 is stopped when the core is halted*/ +#endif /* HRTIM1 */ +/** + * @} + */ + +#if defined(VREFBUF) +/** @defgroup SYSTEM_LL_EC_VOLTAGE VREFBUF VOLTAGE + * @{ + */ +#define LL_VREFBUF_VOLTAGE_SCALE0 ((uint32_t)0x00000000) /*!< Voltage reference scale 0 (VREFBUF_OUT = 2.048V) */ +#define LL_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS_0 /*!< Voltage reference scale 1 (VREFBUF_OUT = 2.5V) */ +#define LL_VREFBUF_VOLTAGE_SCALE2 VREFBUF_CSR_VRS_1 /*!< Voltage reference scale 2 (VREFBUF_OUT = 2.9V) */ +/** + * @} + */ +#endif /* VREFBUF */ + +/** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY + * @{ + */ +#define LL_FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero wait state */ +#define LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One wait state */ +#define LL_FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two wait states */ +#define LL_FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three wait states */ +#define LL_FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four wait states */ +#if defined(FLASH_ACR_LATENCY_5WS) +#define LL_FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH five wait state */ +#define LL_FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH six wait state */ +#define LL_FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH seven wait states */ +#define LL_FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH eight wait states */ +#define LL_FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH nine wait states */ +#define LL_FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH ten wait states */ +#define LL_FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH eleven wait states */ +#define LL_FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH twelve wait states */ +#define LL_FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH thirteen wait states */ +#define LL_FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH fourteen wait states */ +#define LL_FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH fifteen wait states */ +#endif /* FLASH_ACR_LATENCY_5WS */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions + * @{ + */ + +/** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG + * @{ + */ + +/** + * @brief Set memory mapping at address 0x00000000 + * @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_SetRemapMemory + * @param Memory This parameter can be one of the following values: + * @arg @ref LL_SYSCFG_REMAP_FLASH + * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH + * @arg @ref LL_SYSCFG_REMAP_SRAM + * @arg @ref LL_SYSCFG_REMAP_FMC (*) + * @arg @ref LL_SYSCFG_REMAP_QUADSPI (*) + * + * (*) value not defined in all devices + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory) +{ + MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, Memory); +} + +/** + * @brief Get memory mapping at address 0x00000000 + * @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_GetRemapMemory + * @retval Returned value can be one of the following values: + * @arg @ref LL_SYSCFG_REMAP_FLASH + * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH + * @arg @ref LL_SYSCFG_REMAP_SRAM + * @arg @ref LL_SYSCFG_REMAP_FMC (*) + * @arg @ref LL_SYSCFG_REMAP_QUADSPI (*) + * + * (*) value not defined in all devices + */ +__STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void) +{ + return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)); +} + +#if defined(SYSCFG_MEMRMP_FB_MODE) +/** + * @brief Select Flash bank mode (Bank flashed at 0x08000000) + * @rmtoll SYSCFG_MEMRMP FB_MODE LL_SYSCFG_SetFlashBankMode + * @param Bank This parameter can be one of the following values: + * @arg @ref LL_SYSCFG_BANKMODE_BANK1 + * @arg @ref LL_SYSCFG_BANKMODE_BANK2 + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_SetFlashBankMode(uint32_t Bank) +{ + MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE, Bank); +} + +/** + * @brief Get Flash bank mode (Bank flashed at 0x08000000) + * @rmtoll SYSCFG_MEMRMP FB_MODE LL_SYSCFG_GetFlashBankMode + * @retval Returned value can be one of the following values: + * @arg @ref LL_SYSCFG_BANKMODE_BANK1 + * @arg @ref LL_SYSCFG_BANKMODE_BANK2 + */ +__STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode(void) +{ + return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE)); +} +#endif /* SYSCFG_MEMRMP_FB_MODE */ + +/** + * @brief Enable I/O analog switch voltage booster. + * @note When voltage booster is enabled, I/O analog switches are supplied + * by a dedicated voltage booster, from VDD power domain. This is + * the recommended configuration with low VDDA voltage operation. + * @note The I/O analog switch voltage booster is relevant for peripherals + * using I/O in analog input: ADC, COMP, OPAMP. + * However, COMP and OPAMP inputs have a high impedance and + * voltage booster do not impact performance significantly. + * Therefore, the voltage booster is mainly intended for + * usage with ADC. + * @rmtoll SYSCFG_CFGR1 BOOSTEN LL_SYSCFG_EnableAnalogBooster + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableAnalogBooster(void) +{ + SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); +} + +/** + * @brief Disable I/O analog switch voltage booster. + * @note When voltage booster is enabled, I/O analog switches are supplied + * by a dedicated voltage booster, from VDD power domain. This is + * the recommended configuration with low VDDA voltage operation. + * @note The I/O analog switch voltage booster is relevant for peripherals + * using I/O in analog input: ADC, COMP, OPAMP. + * However, COMP and OPAMP inputs have a high impedance and + * voltage booster do not impact performance significantly. + * Therefore, the voltage booster is mainly intended for + * usage with ADC. + * @rmtoll SYSCFG_CFGR1 BOOSTEN LL_SYSCFG_DisableAnalogBooster + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableAnalogBooster(void) +{ + CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); +} + +/** + * @brief Enable the I2C fast mode plus driving capability. + * @rmtoll SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_EnableFastModePlus\n + * SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_EnableFastModePlus + * @param ConfigFastModePlus This parameter can be a combination of the following values: + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8 (*) + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9 (*) + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*) + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C4 (*) + * + * (*) value not defined in all devices + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus) +{ + SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); +} + +/** + * @brief Disable the I2C fast mode plus driving capability. + * @rmtoll SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_DisableFastModePlus\n + * SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_DisableFastModePlus + * @param ConfigFastModePlus This parameter can be a combination of the following values: + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8 (*) + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9 (*) + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*) + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 + * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C4 (*) + * + * (*) value not defined in all devices + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus) +{ + CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); +} + +/** + * @brief Enable Floating Point Unit Invalid operation Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_EnableIT_FPU_IOC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IOC(void) +{ + SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); +} + +/** + * @brief Enable Floating Point Unit Divide-by-zero Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_EnableIT_FPU_DZC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_DZC(void) +{ + SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); +} + +/** + * @brief Enable Floating Point Unit Underflow Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_EnableIT_FPU_UFC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_UFC(void) +{ + SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); +} + +/** + * @brief Enable Floating Point Unit Overflow Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_EnableIT_FPU_OFC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_OFC(void) +{ + SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); +} + +/** + * @brief Enable Floating Point Unit Input denormal Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_EnableIT_FPU_IDC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IDC(void) +{ + SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4); +} + +/** + * @brief Enable Floating Point Unit Inexact Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_EnableIT_FPU_IXC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IXC(void) +{ + SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5); +} + +/** + * @brief Disable Floating Point Unit Invalid operation Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_DisableIT_FPU_IOC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IOC(void) +{ + CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); +} + +/** + * @brief Disable Floating Point Unit Divide-by-zero Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_DisableIT_FPU_DZC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_DZC(void) +{ + CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); +} + +/** + * @brief Disable Floating Point Unit Underflow Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_DisableIT_FPU_UFC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_UFC(void) +{ + CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); +} + +/** + * @brief Disable Floating Point Unit Overflow Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_DisableIT_FPU_OFC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_OFC(void) +{ + CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); +} + +/** + * @brief Disable Floating Point Unit Input denormal Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_DisableIT_FPU_IDC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IDC(void) +{ + CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4); +} + +/** + * @brief Disable Floating Point Unit Inexact Interrupt + * @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_DisableIT_FPU_IXC + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IXC(void) +{ + CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5); +} + +/** + * @brief Check if Floating Point Unit Invalid operation Interrupt source is enabled or disabled. + * @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_IsEnabledIT_FPU_IOC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IOC(void) +{ + return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0) == (SYSCFG_CFGR1_FPU_IE_0)) ? 1UL : 0UL); +} + +/** + * @brief Check if Floating Point Unit Divide-by-zero Interrupt source is enabled or disabled. + * @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_IsEnabledIT_FPU_DZC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_DZC(void) +{ + return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1)) ? 1UL : 0UL); +} + +/** + * @brief Check if Floating Point Unit Underflow Interrupt source is enabled or disabled. + * @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_IsEnabledIT_FPU_UFC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_UFC(void) +{ + return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2) == (SYSCFG_CFGR1_FPU_IE_2)) ? 1UL : 0UL); +} + +/** + * @brief Check if Floating Point Unit Overflow Interrupt source is enabled or disabled. + * @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_IsEnabledIT_FPU_OFC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_OFC(void) +{ + return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3) == (SYSCFG_CFGR1_FPU_IE_3)) ? 1UL : 0UL); +} + +/** + * @brief Check if Floating Point Unit Input denormal Interrupt source is enabled or disabled. + * @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_IsEnabledIT_FPU_IDC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IDC(void) +{ + return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4) == (SYSCFG_CFGR1_FPU_IE_4)) ? 1UL : 0UL); +} + +/** + * @brief Check if Floating Point Unit Inexact Interrupt source is enabled or disabled. + * @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_IsEnabledIT_FPU_IXC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IXC(void) +{ + return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5) == (SYSCFG_CFGR1_FPU_IE_5)) ? 1UL : 0UL); +} + +/** + * @brief Configure source input for the EXTI external interrupt. + * @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_SetEXTISource\n + * SYSCFG_EXTICR2 EXTIx LL_SYSCFG_SetEXTISource\n + * SYSCFG_EXTICR3 EXTIx LL_SYSCFG_SetEXTISource\n + * SYSCFG_EXTICR4 EXTIx LL_SYSCFG_SetEXTISource + * @param Port This parameter can be one of the following values: + * @arg @ref LL_SYSCFG_EXTI_PORTA + * @arg @ref LL_SYSCFG_EXTI_PORTB + * @arg @ref LL_SYSCFG_EXTI_PORTC + * @arg @ref LL_SYSCFG_EXTI_PORTD + * @arg @ref LL_SYSCFG_EXTI_PORTE + * @arg @ref LL_SYSCFG_EXTI_PORTF + * @arg @ref LL_SYSCFG_EXTI_PORTG + * + * (*) value not defined in all devices + * @param Line This parameter can be one of the following values: + * @arg @ref LL_SYSCFG_EXTI_LINE0 + * @arg @ref LL_SYSCFG_EXTI_LINE1 + * @arg @ref LL_SYSCFG_EXTI_LINE2 + * @arg @ref LL_SYSCFG_EXTI_LINE3 + * @arg @ref LL_SYSCFG_EXTI_LINE4 + * @arg @ref LL_SYSCFG_EXTI_LINE5 + * @arg @ref LL_SYSCFG_EXTI_LINE6 + * @arg @ref LL_SYSCFG_EXTI_LINE7 + * @arg @ref LL_SYSCFG_EXTI_LINE8 + * @arg @ref LL_SYSCFG_EXTI_LINE9 + * @arg @ref LL_SYSCFG_EXTI_LINE10 + * @arg @ref LL_SYSCFG_EXTI_LINE11 + * @arg @ref LL_SYSCFG_EXTI_LINE12 + * @arg @ref LL_SYSCFG_EXTI_LINE13 + * @arg @ref LL_SYSCFG_EXTI_LINE14 + * @arg @ref LL_SYSCFG_EXTI_LINE15 + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line) +{ + MODIFY_REG(SYSCFG->EXTICR[Line & 0x3U], (Line >> 16U), Port << (POSITION_VAL((Line >> 16U)) & 0x1FU) ); +} + +/** + * @brief Get the configured defined for specific EXTI Line + * @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_GetEXTISource\n + * SYSCFG_EXTICR2 EXTIx LL_SYSCFG_GetEXTISource\n + * SYSCFG_EXTICR3 EXTIx LL_SYSCFG_GetEXTISource\n + * SYSCFG_EXTICR4 EXTIx LL_SYSCFG_GetEXTISource + * @param Line This parameter can be one of the following values: + * @arg @ref LL_SYSCFG_EXTI_LINE0 + * @arg @ref LL_SYSCFG_EXTI_LINE1 + * @arg @ref LL_SYSCFG_EXTI_LINE2 + * @arg @ref LL_SYSCFG_EXTI_LINE3 + * @arg @ref LL_SYSCFG_EXTI_LINE4 + * @arg @ref LL_SYSCFG_EXTI_LINE5 + * @arg @ref LL_SYSCFG_EXTI_LINE6 + * @arg @ref LL_SYSCFG_EXTI_LINE7 + * @arg @ref LL_SYSCFG_EXTI_LINE8 + * @arg @ref LL_SYSCFG_EXTI_LINE9 + * @arg @ref LL_SYSCFG_EXTI_LINE10 + * @arg @ref LL_SYSCFG_EXTI_LINE11 + * @arg @ref LL_SYSCFG_EXTI_LINE12 + * @arg @ref LL_SYSCFG_EXTI_LINE13 + * @arg @ref LL_SYSCFG_EXTI_LINE14 + * @arg @ref LL_SYSCFG_EXTI_LINE15 + * @retval Returned value can be one of the following values: + * @arg @ref LL_SYSCFG_EXTI_PORTA + * @arg @ref LL_SYSCFG_EXTI_PORTB + * @arg @ref LL_SYSCFG_EXTI_PORTC + * @arg @ref LL_SYSCFG_EXTI_PORTD + * @arg @ref LL_SYSCFG_EXTI_PORTE + * @arg @ref LL_SYSCFG_EXTI_PORTF + * @arg @ref LL_SYSCFG_EXTI_PORTG + * + * (*) value not defined in all devices + */ +__STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line) +{ + return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0x3U], (Line >> 16U)) >> (POSITION_VAL(Line >> 16U) & 0x1FU)); +} + +/** + * @brief Enable CCMSRAM Erase (starts a hardware CCMSRAM erase operation. This bit is + * automatically cleared at the end of the CCMSRAM erase operation.) + * @note This bit is write-protected: setting this bit is possible only after the + * correct key sequence is written in the SYSCFG_SKR register as described in + * the Reference Manual. + * @rmtoll SYSCFG_SCSR CCMER LL_SYSCFG_EnableCCMSRAMErase + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableCCMSRAMErase(void) +{ + /* Starts a hardware CCMSRAM erase operation*/ + SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_CCMER); +} + +/** + * @brief Check if CCMSRAM erase operation is on going + * @rmtoll SYSCFG_SCSR CCMBSY LL_SYSCFG_IsCCMSRAMEraseOngoing + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsCCMSRAMEraseOngoing(void) +{ + return ((READ_BIT(SYSCFG->SCSR, SYSCFG_SCSR_CCMBSY) == (SYSCFG_SCSR_CCMBSY)) ? 1UL : 0UL); +} + +/** + * @brief Set connections to TIM1/8/15/16/17 Break inputs + * @rmtoll SYSCFG_CFGR2 CLL LL_SYSCFG_SetTIMBreakInputs\n + * SYSCFG_CFGR2 SPL LL_SYSCFG_SetTIMBreakInputs\n + * SYSCFG_CFGR2 PVDL LL_SYSCFG_SetTIMBreakInputs\n + * SYSCFG_CFGR2 ECCL LL_SYSCFG_SetTIMBreakInputs + * @param Break This parameter can be a combination of the following values: + * @arg @ref LL_SYSCFG_TIMBREAK_ECC + * @arg @ref LL_SYSCFG_TIMBREAK_PVD + * @arg @ref LL_SYSCFG_TIMBREAK_SRAM_PARITY + * @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_SetTIMBreakInputs(uint32_t Break) +{ + MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL | SYSCFG_CFGR2_SPL | SYSCFG_CFGR2_PVDL | SYSCFG_CFGR2_ECCL, Break); +} + +/** + * @brief Get connections to TIM1/8/15/16/17 Break inputs + * @rmtoll SYSCFG_CFGR2 CLL LL_SYSCFG_GetTIMBreakInputs\n + * SYSCFG_CFGR2 SPL LL_SYSCFG_GetTIMBreakInputs\n + * SYSCFG_CFGR2 PVDL LL_SYSCFG_GetTIMBreakInputs\n + * SYSCFG_CFGR2 ECCL LL_SYSCFG_GetTIMBreakInputs + * @retval Returned value can be can be a combination of the following values: + * @arg @ref LL_SYSCFG_TIMBREAK_ECC + * @arg @ref LL_SYSCFG_TIMBREAK_PVD + * @arg @ref LL_SYSCFG_TIMBREAK_SRAM_PARITY + * @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP + */ +__STATIC_INLINE uint32_t LL_SYSCFG_GetTIMBreakInputs(void) +{ + return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL | SYSCFG_CFGR2_SPL | SYSCFG_CFGR2_PVDL | SYSCFG_CFGR2_ECCL)); +} + +/** + * @brief Check if SRAM parity error detected + * @rmtoll SYSCFG_CFGR2 SPF LL_SYSCFG_IsActiveFlag_SP + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_SYSCFG_IsActiveFlag_SP(void) +{ + return ((READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF) == (SYSCFG_CFGR2_SPF)) ? 1UL : 0UL); +} + +/** + * @brief Clear SRAM parity error flag + * @rmtoll SYSCFG_CFGR2 SPF LL_SYSCFG_ClearFlag_SP + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_ClearFlag_SP(void) +{ + SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF); +} + +/** + * @brief Enable CCMSRAM page write protection + * @note Write protection is cleared only by a system reset + * @rmtoll SYSCFG_SWPR PAGEx LL_SYSCFG_EnableCCMSRAMPageWRP + * @param CCMSRAMWRP This parameter can be a combination of the following values: + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE0 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE1 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE2 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE3 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE4 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE5 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE6 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE7 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE8 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE9 + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE10 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE11 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE12 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE13 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE14 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE15 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE16 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE17 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE18 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE19 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE20 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE21 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE22 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE23 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE24 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE25 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE26 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE27 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE28 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE29 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE30 (*) + * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE31 (*) + * + * (*) value not defined in all devices + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_EnableCCMSRAMPageWRP(uint32_t CCMSRAMWRP) +{ + SET_BIT(SYSCFG->SWPR, CCMSRAMWRP); +} + +/** + * @brief CCMSRAM page write protection lock prior to erase + * @rmtoll SYSCFG_SKR KEY LL_SYSCFG_LockCCMSRAMWRP + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_LockCCMSRAMWRP(void) +{ + /* Writing a wrong key reactivates the write protection */ + WRITE_REG(SYSCFG->SKR, 0x00); +} + +/** + * @brief CCMSRAM page write protection unlock prior to erase + * @rmtoll SYSCFG_SKR KEY LL_SYSCFG_UnlockCCMSRAMWRP + * @retval None + */ +__STATIC_INLINE void LL_SYSCFG_UnlockCCMSRAMWRP(void) +{ + /* unlock the write protection of the CCMER bit */ + WRITE_REG(SYSCFG->SKR, 0xCA); + WRITE_REG(SYSCFG->SKR, 0x53); +} + +/** + * @} + */ + + +/** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU + * @{ + */ + +/** + * @brief Return the device identifier + * @rmtoll DBGMCU_IDCODE DEV_ID LL_DBGMCU_GetDeviceID + * @retval Values between Min_Data=0x00 and Max_Data=0x0FFF (ex: device ID is 0x6415) + */ +__STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void) +{ + return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID)); +} + +/** + * @brief Return the device revision identifier + * @note This field indicates the revision of the device. + * @rmtoll DBGMCU_IDCODE REV_ID LL_DBGMCU_GetRevisionID + * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF + */ +__STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void) +{ + return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> (DBGMCU_REVID_POSITION & 0x1FU)); +} + +/** + * @brief Enable the Debug Module during SLEEP mode + * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_EnableDBGSleepMode + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void) +{ + SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); +} + +/** + * @brief Disable the Debug Module during SLEEP mode + * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_DisableDBGSleepMode + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void) +{ + CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); +} + +/** + * @brief Enable the Debug Module during STOP mode + * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_EnableDBGStopMode + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void) +{ + SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); +} + +/** + * @brief Disable the Debug Module during STOP mode + * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_DisableDBGStopMode + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void) +{ + CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); +} + +/** + * @brief Enable the Debug Module during STANDBY mode + * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_EnableDBGStandbyMode + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void) +{ + SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); +} + +/** + * @brief Disable the Debug Module during STANDBY mode + * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void) +{ + CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); +} + +/** + * @brief Set Trace pin assignment control + * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_SetTracePinAssignment\n + * DBGMCU_CR TRACE_MODE LL_DBGMCU_SetTracePinAssignment + * @param PinAssignment This parameter can be one of the following values: + * @arg @ref LL_DBGMCU_TRACE_NONE + * @arg @ref LL_DBGMCU_TRACE_ASYNCH + * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1 + * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2 + * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4 + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_SetTracePinAssignment(uint32_t PinAssignment) +{ + MODIFY_REG(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE, PinAssignment); +} + +/** + * @brief Get Trace pin assignment control + * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_GetTracePinAssignment\n + * DBGMCU_CR TRACE_MODE LL_DBGMCU_GetTracePinAssignment + * @retval Returned value can be one of the following values: + * @arg @ref LL_DBGMCU_TRACE_NONE + * @arg @ref LL_DBGMCU_TRACE_ASYNCH + * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1 + * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2 + * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4 + */ +__STATIC_INLINE uint32_t LL_DBGMCU_GetTracePinAssignment(void) +{ + return (uint32_t)(READ_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE)); +} + +/** + * @brief Freeze APB1 peripherals (group1 peripherals) + * @rmtoll DBGMCU_APB1FZR1 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP (*) + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs) +{ + SET_BIT(DBGMCU->APB1FZR1, Periphs); +} + +/** + * @brief Freeze APB1 peripherals (group2 peripherals) + * @rmtoll DBGMCU_APB1FZR2 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP2_FreezePeriph + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_DBGMCU_APB1_GRP2_I2C4_STOP (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_APB1_GRP2_FreezePeriph(uint32_t Periphs) +{ + SET_BIT(DBGMCU->APB1FZR2, Periphs); +} + +/** + * @brief Unfreeze APB1 peripherals (group1 peripherals) + * @rmtoll DBGMCU_APB1FZR1 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP (*) + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP + * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs) +{ + CLEAR_BIT(DBGMCU->APB1FZR1, Periphs); +} + +/** + * @brief Unfreeze APB1 peripherals (group2 peripherals) + * @rmtoll DBGMCU_APB1FZR2 DBG_xxxx_STOP LL_DBGMCU_APB1_GRP2_UnFreezePeriph + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_DBGMCU_APB1_GRP2_I2C4_STOP (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_APB1_GRP2_UnFreezePeriph(uint32_t Periphs) +{ + CLEAR_BIT(DBGMCU->APB1FZR2, Periphs); +} + +/** + * @brief Freeze APB2 peripherals + * @rmtoll DBGMCU_APB2FZ DBG_TIMx_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM20_STOP (*) + * @arg @ref LL_DBGMCU_APB2_GRP1_HRTIM1_STOP (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs) +{ + SET_BIT(DBGMCU->APB2FZ, Periphs); +} + +/** + * @brief Unfreeze APB2 peripherals + * @rmtoll DBGMCU_APB2FZ DBG_TIMx_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph + * @param Periphs This parameter can be a combination of the following values: + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP + * @arg @ref LL_DBGMCU_APB2_GRP1_TIM20_STOP (*) + * @arg @ref LL_DBGMCU_APB2_GRP1_HRTIM1_STOP (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs) +{ + CLEAR_BIT(DBGMCU->APB2FZ, Periphs); +} + +/** + * @} + */ + +#if defined(VREFBUF) +/** @defgroup SYSTEM_LL_EF_VREFBUF VREFBUF + * @{ + */ + +/** + * @brief Enable Internal voltage reference + * @rmtoll VREFBUF_CSR ENVR LL_VREFBUF_Enable + * @retval None + */ +__STATIC_INLINE void LL_VREFBUF_Enable(void) +{ + SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); +} + +/** + * @brief Disable Internal voltage reference + * @rmtoll VREFBUF_CSR ENVR LL_VREFBUF_Disable + * @retval None + */ +__STATIC_INLINE void LL_VREFBUF_Disable(void) +{ + CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); +} + +/** + * @brief Enable high impedance (VREF+pin is high impedance) + * @rmtoll VREFBUF_CSR HIZ LL_VREFBUF_EnableHIZ + * @retval None + */ +__STATIC_INLINE void LL_VREFBUF_EnableHIZ(void) +{ + SET_BIT(VREFBUF->CSR, VREFBUF_CSR_HIZ); +} + +/** + * @brief Disable high impedance (VREF+pin is internally connected to the voltage reference buffer output) + * @rmtoll VREFBUF_CSR HIZ LL_VREFBUF_DisableHIZ + * @retval None + */ +__STATIC_INLINE void LL_VREFBUF_DisableHIZ(void) +{ + CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_HIZ); +} + +/** + * @brief Set the Voltage reference scale + * @rmtoll VREFBUF_CSR VRS LL_VREFBUF_SetVoltageScaling + * @param Scale This parameter can be one of the following values: + * @arg @ref LL_VREFBUF_VOLTAGE_SCALE0 + * @arg @ref LL_VREFBUF_VOLTAGE_SCALE1 + * @arg @ref LL_VREFBUF_VOLTAGE_SCALE2 + * @retval None + */ +__STATIC_INLINE void LL_VREFBUF_SetVoltageScaling(uint32_t Scale) +{ + MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, Scale); +} + +/** + * @brief Get the Voltage reference scale + * @rmtoll VREFBUF_CSR VRS LL_VREFBUF_GetVoltageScaling + * @retval Returned value can be one of the following values: + * @arg @ref LL_VREFBUF_VOLTAGE_SCALE0 + * @arg @ref LL_VREFBUF_VOLTAGE_SCALE1 + * @arg @ref LL_VREFBUF_VOLTAGE_SCALE2 + */ +__STATIC_INLINE uint32_t LL_VREFBUF_GetVoltageScaling(void) +{ + return (uint32_t)(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRS)); +} + +/** + * @brief Check if Voltage reference buffer is ready + * @rmtoll VREFBUF_CSR VRR LL_VREFBUF_IsVREFReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_VREFBUF_IsVREFReady(void) +{ + return ((READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == (VREFBUF_CSR_VRR)) ? 1UL : 0UL); +} + +/** + * @brief Get the trimming code for VREFBUF calibration + * @rmtoll VREFBUF_CCR TRIM LL_VREFBUF_GetTrimming + * @retval Between 0 and 0x3F + */ +__STATIC_INLINE uint32_t LL_VREFBUF_GetTrimming(void) +{ + return (uint32_t)(READ_BIT(VREFBUF->CCR, VREFBUF_CCR_TRIM)); +} + +/** + * @brief Set the trimming code for VREFBUF calibration (Tune the internal reference buffer voltage) + * @rmtoll VREFBUF_CCR TRIM LL_VREFBUF_SetTrimming + * @param Value Between 0 and 0x3F + * @retval None + */ +__STATIC_INLINE void LL_VREFBUF_SetTrimming(uint32_t Value) +{ + WRITE_REG(VREFBUF->CCR, Value); +} + +/** + * @} + */ +#endif /* VREFBUF */ + +/** @defgroup SYSTEM_LL_EF_FLASH FLASH + * @{ + */ + +/** + * @brief Set FLASH Latency + * @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency + * @param Latency This parameter can be one of the following values: + * @arg @ref LL_FLASH_LATENCY_0 + * @arg @ref LL_FLASH_LATENCY_1 + * @arg @ref LL_FLASH_LATENCY_2 + * @arg @ref LL_FLASH_LATENCY_3 + * @arg @ref LL_FLASH_LATENCY_4 + * @arg @ref LL_FLASH_LATENCY_5 (*) + * @arg @ref LL_FLASH_LATENCY_6 (*) + * @arg @ref LL_FLASH_LATENCY_7 (*) + * @arg @ref LL_FLASH_LATENCY_8 (*) + * @arg @ref LL_FLASH_LATENCY_9 (*) + * @arg @ref LL_FLASH_LATENCY_10 (*) + * @arg @ref LL_FLASH_LATENCY_11 (*) + * @arg @ref LL_FLASH_LATENCY_12 (*) + * @arg @ref LL_FLASH_LATENCY_13 (*) + * @arg @ref LL_FLASH_LATENCY_14 (*) + * @arg @ref LL_FLASH_LATENCY_15 (*) + * + * (*) value not defined in all devices. + * @retval None + */ +__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) +{ + MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency); +} + +/** + * @brief Get FLASH Latency + * @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency + * @retval Returned value can be one of the following values: + * @arg @ref LL_FLASH_LATENCY_0 + * @arg @ref LL_FLASH_LATENCY_1 + * @arg @ref LL_FLASH_LATENCY_2 + * @arg @ref LL_FLASH_LATENCY_3 + * @arg @ref LL_FLASH_LATENCY_4 + * @arg @ref LL_FLASH_LATENCY_5 (*) + * @arg @ref LL_FLASH_LATENCY_6 (*) + * @arg @ref LL_FLASH_LATENCY_7 (*) + * @arg @ref LL_FLASH_LATENCY_8 (*) + * @arg @ref LL_FLASH_LATENCY_9 (*) + * @arg @ref LL_FLASH_LATENCY_10 (*) + * @arg @ref LL_FLASH_LATENCY_11 (*) + * @arg @ref LL_FLASH_LATENCY_12 (*) + * @arg @ref LL_FLASH_LATENCY_13 (*) + * @arg @ref LL_FLASH_LATENCY_14 (*) + * @arg @ref LL_FLASH_LATENCY_15 (*) + * + * (*) value not defined in all devices. + */ +__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void) +{ + return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)); +} + +/** + * @brief Enable Prefetch + * @rmtoll FLASH_ACR PRFTEN LL_FLASH_EnablePrefetch + * @retval None + */ +__STATIC_INLINE void LL_FLASH_EnablePrefetch(void) +{ + SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN); +} + +/** + * @brief Disable Prefetch + * @rmtoll FLASH_ACR PRFTEN LL_FLASH_DisablePrefetch + * @retval None + */ +__STATIC_INLINE void LL_FLASH_DisablePrefetch(void) +{ + CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN); +} + +/** + * @brief Check if Prefetch buffer is enabled + * @rmtoll FLASH_ACR PRFTEN LL_FLASH_IsPrefetchEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void) +{ + return ((READ_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN)) ? 1UL : 0UL); +} + +/** + * @brief Enable Instruction cache + * @rmtoll FLASH_ACR ICEN LL_FLASH_EnableInstCache + * @retval None + */ +__STATIC_INLINE void LL_FLASH_EnableInstCache(void) +{ + SET_BIT(FLASH->ACR, FLASH_ACR_ICEN); +} + +/** + * @brief Disable Instruction cache + * @rmtoll FLASH_ACR ICEN LL_FLASH_DisableInstCache + * @retval None + */ +__STATIC_INLINE void LL_FLASH_DisableInstCache(void) +{ + CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN); +} + +/** + * @brief Enable Data cache + * @rmtoll FLASH_ACR DCEN LL_FLASH_EnableDataCache + * @retval None + */ +__STATIC_INLINE void LL_FLASH_EnableDataCache(void) +{ + SET_BIT(FLASH->ACR, FLASH_ACR_DCEN); +} + +/** + * @brief Disable Data cache + * @rmtoll FLASH_ACR DCEN LL_FLASH_DisableDataCache + * @retval None + */ +__STATIC_INLINE void LL_FLASH_DisableDataCache(void) +{ + CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN); +} + +/** + * @brief Enable Instruction cache reset + * @note bit can be written only when the instruction cache is disabled + * @rmtoll FLASH_ACR ICRST LL_FLASH_EnableInstCacheReset + * @retval None + */ +__STATIC_INLINE void LL_FLASH_EnableInstCacheReset(void) +{ + SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); +} + +/** + * @brief Disable Instruction cache reset + * @rmtoll FLASH_ACR ICRST LL_FLASH_DisableInstCacheReset + * @retval None + */ +__STATIC_INLINE void LL_FLASH_DisableInstCacheReset(void) +{ + CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); +} + +/** + * @brief Enable Data cache reset + * @note bit can be written only when the data cache is disabled + * @rmtoll FLASH_ACR DCRST LL_FLASH_EnableDataCacheReset + * @retval None + */ +__STATIC_INLINE void LL_FLASH_EnableDataCacheReset(void) +{ + SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); +} + +/** + * @brief Disable Data cache reset + * @rmtoll FLASH_ACR DCRST LL_FLASH_DisableDataCacheReset + * @retval None + */ +__STATIC_INLINE void LL_FLASH_DisableDataCacheReset(void) +{ + CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST); +} + +/** + * @brief Enable Flash Power-down mode during run mode or Low-power run mode + * @note Flash memory can be put in power-down mode only when the code is executed + * from RAM + * @note Flash must not be accessed when power down is enabled + * @note Flash must not be put in power-down while a program or an erase operation + * is on-going + * @rmtoll FLASH_ACR RUN_PD LL_FLASH_EnableRunPowerDown\n + * FLASH_PDKEYR PDKEY1 LL_FLASH_EnableRunPowerDown\n + * FLASH_PDKEYR PDKEY2 LL_FLASH_EnableRunPowerDown + * @retval None + */ +__STATIC_INLINE void LL_FLASH_EnableRunPowerDown(void) +{ + /* Following values must be written consecutively to unlock the RUN_PD bit in + FLASH_ACR */ + WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); + WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); + SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); +} + +/** + * @brief Disable Flash Power-down mode during run mode or Low-power run mode + * @rmtoll FLASH_ACR RUN_PD LL_FLASH_DisableRunPowerDown\n + * FLASH_PDKEYR PDKEY1 LL_FLASH_DisableRunPowerDown\n + * FLASH_PDKEYR PDKEY2 LL_FLASH_DisableRunPowerDown + * @retval None + */ +__STATIC_INLINE void LL_FLASH_DisableRunPowerDown(void) +{ + /* Following values must be written consecutively to unlock the RUN_PD bit in + FLASH_ACR */ + WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); + WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); + CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); +} + +/** + * @brief Enable Flash Power-down mode during Sleep or Low-power sleep mode + * @note Flash must not be put in power-down while a program or an erase operation + * is on-going + * @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_EnableSleepPowerDown + * @retval None + */ +__STATIC_INLINE void LL_FLASH_EnableSleepPowerDown(void) +{ + SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD); +} + +/** + * @brief Disable Flash Power-down mode during Sleep or Low-power sleep mode + * @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_DisableSleepPowerDown + * @retval None + */ +__STATIC_INLINE void LL_FLASH_DisableSleepPowerDown(void) +{ + CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) || defined (VREFBUF) */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_LL_SYSTEM_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h new file mode 100644 index 0000000..60510db --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h @@ -0,0 +1,330 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_utils.h + * @author MCD Application Team + * @brief Header file of UTILS LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim + ============================================================================== + ##### How to use this driver ##### + ============================================================================== + [..] + The LL UTILS driver contains a set of generic APIs that can be + used by user: + (+) Device electronic signature + (+) Timing functions + (+) PLL configuration functions + + @endverbatim + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_LL_UTILS_H +#define STM32G4xx_LL_UTILS_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +/** @defgroup UTILS_LL UTILS + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup UTILS_LL_Private_Constants UTILS Private Constants + * @{ + */ + +/* Max delay can be used in LL_mDelay */ +#define LL_MAX_DELAY 0xFFFFFFFFU + +/** + * @brief Unique device ID register base address + */ +#define UID_BASE_ADDRESS UID_BASE + +/** + * @brief Flash size data register base address + */ +#define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE + +/** + * @brief Package data register base address + */ +#define PACKAGE_BASE_ADDRESS PACKAGE_BASE + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup UTILS_LL_Private_Macros UTILS Private Macros + * @{ + */ +/** + * @} + */ +/* Exported types ------------------------------------------------------------*/ +/** @defgroup UTILS_LL_ES_INIT UTILS Exported structures + * @{ + */ +/** + * @brief UTILS PLL structure definition + */ +typedef struct +{ + uint32_t PLLM; /*!< Division factor for PLL VCO input clock. + This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV + + This feature can be modified afterwards using unitary function + @ref LL_RCC_PLL_ConfigDomain_SYS(). */ + + uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock. + This parameter must be a number between Min_Data = 8 and Max_Data = 86 + + This feature can be modified afterwards using unitary function + @ref LL_RCC_PLL_ConfigDomain_SYS(). */ + + uint32_t PLLR; /*!< Division for the main system clock. + This parameter can be a value of @ref RCC_LL_EC_PLLR_DIV + + This feature can be modified afterwards using unitary function + @ref LL_RCC_PLL_ConfigDomain_SYS(). */ +} LL_UTILS_PLLInitTypeDef; + +/** + * @brief UTILS System, AHB and APB buses clock configuration structure definition + */ +typedef struct +{ + uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). + This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV + + This feature can be modified afterwards using unitary function + @ref LL_RCC_SetAHBPrescaler(). */ + + uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). + This parameter can be a value of @ref RCC_LL_EC_APB1_DIV + + This feature can be modified afterwards using unitary function + @ref LL_RCC_SetAPB1Prescaler(). */ + + uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK). + This parameter can be a value of @ref RCC_LL_EC_APB2_DIV + + This feature can be modified afterwards using unitary function + @ref LL_RCC_SetAPB2Prescaler(). */ + +} LL_UTILS_ClkInitTypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants + * @{ + */ + +/** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation + * @{ + */ +#define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ +#define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ +/** + * @} + */ + +/** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE + * @{ + */ +#define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000U /*!< LQFP64 package type */ +#define LL_UTILS_PACKAGETYPE_WLCSP64 0x00000001U /*!< WLCSP64 package type */ +#if defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32G471xx) || \ + defined (STM32G473xx) || defined (STM32G483xx) || defined (STM32G474xx) || \ + defined (STM32G484xx) +#define LL_UTILS_PACKAGETYPE_LQFP100_LQFP80 0x00000002U /*!< LQFP100 \ LQFP80 package type */ +#define LL_UTILS_PACKAGETYPE_LQFP100 LL_UTILS_PACKAGETYPE_LQFP100_LQFP80 /*!< For backward compatibility */ +#else +#define LL_UTILS_PACKAGETYPE_LQFP100 0x00000002U /*!< LQFP100 package type */ +#endif /* STM32G431xx || STM32G441xx || STM32G471xx || STM32G473xx || STM32G483xx ||STM32G474xx || STM32G484xx */ +#define LL_UTILS_PACKAGETYPE_WLCSP81 0x00000005U /*!< WLCSP81 package type */ +#define LL_UTILS_PACKAGETYPE_LQFP128_UFBGA121 0x00000007U /*!< LQFP128 \ UFBGA121 package type */ +#define LL_UTILS_PACKAGETYPE_LQFP128 LL_UTILS_PACKAGETYPE_LQFP128_UFBGA121 /*!< For backward compatibility */ +#define LL_UTILS_PACKAGETYPE_UFQFPN32 0x00000008U /*!< UFQFPN32 package type */ +#define LL_UTILS_PACKAGETYPE_LQFP32 0x00000009U /*!< LQFP32 package type */ +#define LL_UTILS_PACKAGETYPE_UFQFPN48 0x0000000AU /*!< UFQFPN48 package type */ +#define LL_UTILS_PACKAGETYPE_LQFP48 0x0000000BU /*!< LQFP48 package type */ +#define LL_UTILS_PACKAGETYPE_WLCSP49 0x0000000CU /*!< WLCSP49 package type */ +#define LL_UTILS_PACKAGETYPE_UFBGA64 0x0000000DU /*!< UFBGA64 package type */ +#define LL_UTILS_PACKAGETYPE_TFBGA100 0x0000000EU /*!< TFBGA100 package type */ +#define LL_UTILS_PACKAGETYPE_UFBGA100 LL_UTILS_PACKAGETYPE_TFBGA100 /*!< For backward compatibility */ +#define LL_UTILS_PACKAGETYPE_LQFP48_EBIKE 0x00000010U /*!< LQFP48 EBIKE package type */ +#if defined (STM32G491xx) || defined (STM32G4A1xx) +#define LL_UTILS_PACKAGETYPE_LQFP80 0x00000011U /*!< LQFP80 package type */ +#endif /* STM32G491xx || STM32G4A1xx */ + +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions + * @{ + */ + +/** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE + * @{ + */ + +/** + * @brief Get Word0 of the unique device identifier (UID based on 96 bits) + * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format + */ +__STATIC_INLINE uint32_t LL_GetUID_Word0(void) +{ + return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); +} + +/** + * @brief Get Word1 of the unique device identifier (UID based on 96 bits) + * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40]) + */ +__STATIC_INLINE uint32_t LL_GetUID_Word1(void) +{ + return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); +} + +/** + * @brief Get Word2 of the unique device identifier (UID based on 96 bits) + * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24] + */ +__STATIC_INLINE uint32_t LL_GetUID_Word2(void) +{ + return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); +} + +/** + * @brief Get Flash memory size + * @note This bitfield indicates the size of the device Flash memory expressed in + * Kbytes. As an example, 0x040 corresponds to 64 Kbytes. + * @retval FLASH_SIZE[15:0]: Flash memory size + */ +__STATIC_INLINE uint32_t LL_GetFlashSize(void) +{ + return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0x0000FFFFUL); +} + +/** + * @brief Get Package type + * @retval Returned value can be one of the following values: + * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64 + * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100 + * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP81 + * @arg @ref LL_UTILS_PACKAGETYPE_LQFP128 + * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN32 + * @arg @ref LL_UTILS_PACKAGETYPE_LQFP32 + * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN48 + * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48 + * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP49 + * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA64 + * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA100 + * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48_EBIKE + * +*/ +__STATIC_INLINE uint32_t LL_GetPackageType(void) +{ + return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x1FU); +} + +/** + * @} + */ + +/** @defgroup UTILS_LL_EF_DELAY DELAY + * @{ + */ + +/** + * @brief This function configures the Cortex-M SysTick source of the time base. + * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) + * @note When a RTOS is used, it is recommended to avoid changing the SysTick + * configuration by calling this function, for a delay use rather osDelay RTOS service. + * @param Ticks Frequency of Ticks (Hz) + * @retval None + */ +__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) +{ + /* Configure the SysTick to have interrupt in 1ms time base */ + SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ +} + +void LL_Init1msTick(uint32_t HCLKFrequency); +void LL_mDelay(uint32_t Delay); + +/** + * @} + */ + +/** @defgroup UTILS_EF_SYSTEM SYSTEM + * @{ + */ + +void LL_SetSystemCoreClock(uint32_t HCLKFrequency); +ErrorStatus LL_SetFlashLatency(uint32_t HCLKFrequency); +ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, + LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); +ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, + LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_LL_UTILS_H */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt new file mode 100644 index 0000000..3edc4d1 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt @@ -0,0 +1,6 @@ +This software component is provided to you as part of a software package and +applicable license terms are in the Package_license file. If you received this +software component outside of a package or without applicable license terms, +the terms of the BSD-3-Clause license shall apply. +You may obtain a copy of the BSD-3-Clause at: +https://opensource.org/licenses/BSD-3-Clause diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c new file mode 100644 index 0000000..5a2f75e --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c @@ -0,0 +1,376 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_dma.c + * @author MCD Application Team + * @brief DMA LL module driver. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#if defined(USE_FULL_LL_DRIVER) + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_dma.h" +#include "stm32g4xx_ll_bus.h" +#ifdef USE_FULL_ASSERT +#include "stm32_assert.h" +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (DMA1) || defined (DMA2) + +/** @defgroup DMA_LL DMA + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup DMA_LL_Private_Macros + * @{ + */ +#define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY) || \ + ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) || \ + ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY)) + +#define IS_LL_DMA_MODE(__VALUE__) (((__VALUE__) == LL_DMA_MODE_NORMAL) || \ + ((__VALUE__) == LL_DMA_MODE_CIRCULAR)) + +#define IS_LL_DMA_PERIPHINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) || \ + ((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT)) + +#define IS_LL_DMA_MEMORYINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) || \ + ((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT)) + +#define IS_LL_DMA_PERIPHDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE) || \ + ((__VALUE__) == LL_DMA_PDATAALIGN_HALFWORD) || \ + ((__VALUE__) == LL_DMA_PDATAALIGN_WORD)) + +#define IS_LL_DMA_MEMORYDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_MDATAALIGN_BYTE) || \ + ((__VALUE__) == LL_DMA_MDATAALIGN_HALFWORD) || \ + ((__VALUE__) == LL_DMA_MDATAALIGN_WORD)) + +#define IS_LL_DMA_NBDATA(__VALUE__) ((__VALUE__) <= (uint32_t)0x0000FFFFU) + +#define IS_LL_DMA_PERIPHREQUEST(__VALUE__) ((__VALUE__) <= 115U) + +#define IS_LL_DMA_PRIORITY(__VALUE__) (((__VALUE__) == LL_DMA_PRIORITY_LOW) || \ + ((__VALUE__) == LL_DMA_PRIORITY_MEDIUM) || \ + ((__VALUE__) == LL_DMA_PRIORITY_HIGH) || \ + ((__VALUE__) == LL_DMA_PRIORITY_VERYHIGH)) + +#if defined (DMA1_Channel8) +#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \ + (((CHANNEL) == LL_DMA_CHANNEL_1) || \ + ((CHANNEL) == LL_DMA_CHANNEL_2) || \ + ((CHANNEL) == LL_DMA_CHANNEL_3) || \ + ((CHANNEL) == LL_DMA_CHANNEL_4) || \ + ((CHANNEL) == LL_DMA_CHANNEL_5) || \ + ((CHANNEL) == LL_DMA_CHANNEL_6) || \ + ((CHANNEL) == LL_DMA_CHANNEL_7) || \ + ((CHANNEL) == LL_DMA_CHANNEL_8))) || \ + (((INSTANCE) == DMA2) && \ + (((CHANNEL) == LL_DMA_CHANNEL_1) || \ + ((CHANNEL) == LL_DMA_CHANNEL_2) || \ + ((CHANNEL) == LL_DMA_CHANNEL_3) || \ + ((CHANNEL) == LL_DMA_CHANNEL_4) || \ + ((CHANNEL) == LL_DMA_CHANNEL_5) || \ + ((CHANNEL) == LL_DMA_CHANNEL_6) || \ + ((CHANNEL) == LL_DMA_CHANNEL_7) || \ + ((CHANNEL) == LL_DMA_CHANNEL_8)))) +#elif defined (DMA1_Channel6) +#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \ + (((CHANNEL) == LL_DMA_CHANNEL_1) || \ + ((CHANNEL) == LL_DMA_CHANNEL_2) || \ + ((CHANNEL) == LL_DMA_CHANNEL_3) || \ + ((CHANNEL) == LL_DMA_CHANNEL_4) || \ + ((CHANNEL) == LL_DMA_CHANNEL_5) || \ + ((CHANNEL) == LL_DMA_CHANNEL_6))) || \ + (((INSTANCE) == DMA2) && \ + (((CHANNEL) == LL_DMA_CHANNEL_1) || \ + ((CHANNEL) == LL_DMA_CHANNEL_2) || \ + ((CHANNEL) == LL_DMA_CHANNEL_3) || \ + ((CHANNEL) == LL_DMA_CHANNEL_4) || \ + ((CHANNEL) == LL_DMA_CHANNEL_5) || \ + ((CHANNEL) == LL_DMA_CHANNEL_6)))) +#endif /* DMA1_Channel8 */ +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup DMA_LL_Exported_Functions + * @{ + */ + +/** @addtogroup DMA_LL_EF_Init + * @{ + */ + +/** + * @brief De-initialize the DMA registers to their default reset values. + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * @arg @ref LL_DMA_CHANNEL_ALL + * (*) Not on all G4 devices + * @retval An ErrorStatus enumeration value: + * - SUCCESS: DMA registers are de-initialized + * - ERROR: DMA registers are not de-initialized + */ +uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel) +{ + DMA_Channel_TypeDef *tmp; + ErrorStatus status = SUCCESS; + + /* Check the DMA Instance DMAx and Channel parameters*/ + assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel) || (Channel == LL_DMA_CHANNEL_ALL)); + + if (Channel == LL_DMA_CHANNEL_ALL) + { + if (DMAx == DMA1) + { + /* Force reset of DMA clock */ + LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); + + /* Release reset of DMA clock */ + LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); + } + else if (DMAx == DMA2) + { + /* Force reset of DMA clock */ + LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); + + /* Release reset of DMA clock */ + LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); + } + else + { + status = ERROR; + } + } + else + { + tmp = (DMA_Channel_TypeDef *)(__LL_DMA_GET_CHANNEL_INSTANCE(DMAx, Channel)); + + /* Disable the selected DMAx_Channely */ + CLEAR_BIT(tmp->CCR, DMA_CCR_EN); + + /* Reset DMAx_Channely control register */ + WRITE_REG(tmp->CCR, 0U); + + /* Reset DMAx_Channely remaining bytes register */ + WRITE_REG(tmp->CNDTR, 0U); + + /* Reset DMAx_Channely peripheral address register */ + WRITE_REG(tmp->CPAR, 0U); + + /* Reset DMAx_Channely memory address register */ + WRITE_REG(tmp->CMAR, 0U); + + /* Reset Request register field for DMAx Channel */ + LL_DMA_SetPeriphRequest(DMAx, Channel, LL_DMAMUX_REQ_MEM2MEM); + + if (Channel == LL_DMA_CHANNEL_1) + { + /* Reset interrupt pending bits for DMAx Channel1 */ + LL_DMA_ClearFlag_GI1(DMAx); + } + else if (Channel == LL_DMA_CHANNEL_2) + { + /* Reset interrupt pending bits for DMAx Channel2 */ + LL_DMA_ClearFlag_GI2(DMAx); + } + else if (Channel == LL_DMA_CHANNEL_3) + { + /* Reset interrupt pending bits for DMAx Channel3 */ + LL_DMA_ClearFlag_GI3(DMAx); + } + else if (Channel == LL_DMA_CHANNEL_4) + { + /* Reset interrupt pending bits for DMAx Channel4 */ + LL_DMA_ClearFlag_GI4(DMAx); + } + else if (Channel == LL_DMA_CHANNEL_5) + { + /* Reset interrupt pending bits for DMAx Channel5 */ + LL_DMA_ClearFlag_GI5(DMAx); + } + + else if (Channel == LL_DMA_CHANNEL_6) + { + /* Reset interrupt pending bits for DMAx Channel6 */ + LL_DMA_ClearFlag_GI6(DMAx); + } +#if defined (DMA1_Channel7) + else if (Channel == LL_DMA_CHANNEL_7) + { + /* Reset interrupt pending bits for DMAx Channel7 */ + LL_DMA_ClearFlag_GI7(DMAx); + } +#endif /* DMA1_Channel7 */ +#if defined (DMA1_Channel8) + else if (Channel == LL_DMA_CHANNEL_8) + { + /* Reset interrupt pending bits for DMAx Channel8 */ + LL_DMA_ClearFlag_GI8(DMAx); + } +#endif /* DMA1_Channel8 */ + else + { + status = ERROR; + } + } + + return (uint32_t)status; +} + +/** + * @brief Initialize the DMA registers according to the specified parameters in DMA_InitStruct. + * @note To convert DMAx_Channely Instance to DMAx Instance and Channely, use helper macros : + * @arg @ref __LL_DMA_GET_INSTANCE + * @arg @ref __LL_DMA_GET_CHANNEL + * @param DMAx DMAx Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_DMA_CHANNEL_1 + * @arg @ref LL_DMA_CHANNEL_2 + * @arg @ref LL_DMA_CHANNEL_3 + * @arg @ref LL_DMA_CHANNEL_4 + * @arg @ref LL_DMA_CHANNEL_5 + * @arg @ref LL_DMA_CHANNEL_6 + * @arg @ref LL_DMA_CHANNEL_7 (*) + * @arg @ref LL_DMA_CHANNEL_8 (*) + * (*) Not on all G4 devices + * @param DMA_InitStruct pointer to a @ref LL_DMA_InitTypeDef structure. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: DMA registers are initialized + * - ERROR: Not applicable + */ +uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct) +{ + /* Check the DMA Instance DMAx and Channel parameters*/ + assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel)); + + /* Check the DMA parameters from DMA_InitStruct */ + assert_param(IS_LL_DMA_DIRECTION(DMA_InitStruct->Direction)); + assert_param(IS_LL_DMA_MODE(DMA_InitStruct->Mode)); + assert_param(IS_LL_DMA_PERIPHINCMODE(DMA_InitStruct->PeriphOrM2MSrcIncMode)); + assert_param(IS_LL_DMA_MEMORYINCMODE(DMA_InitStruct->MemoryOrM2MDstIncMode)); + assert_param(IS_LL_DMA_PERIPHDATASIZE(DMA_InitStruct->PeriphOrM2MSrcDataSize)); + assert_param(IS_LL_DMA_MEMORYDATASIZE(DMA_InitStruct->MemoryOrM2MDstDataSize)); + assert_param(IS_LL_DMA_NBDATA(DMA_InitStruct->NbData)); + assert_param(IS_LL_DMA_PERIPHREQUEST(DMA_InitStruct->PeriphRequest)); + assert_param(IS_LL_DMA_PRIORITY(DMA_InitStruct->Priority)); + + /*---------------------------- DMAx CCR Configuration ------------------------ + * Configure DMAx_Channely: data transfer direction, data transfer mode, + * peripheral and memory increment mode, + * data size alignment and priority level with parameters : + * - Direction: DMA_CCR_DIR and DMA_CCR_MEM2MEM bits + * - Mode: DMA_CCR_CIRC bit + * - PeriphOrM2MSrcIncMode: DMA_CCR_PINC bit + * - MemoryOrM2MDstIncMode: DMA_CCR_MINC bit + * - PeriphOrM2MSrcDataSize: DMA_CCR_PSIZE[1:0] bits + * - MemoryOrM2MDstDataSize: DMA_CCR_MSIZE[1:0] bits + * - Priority: DMA_CCR_PL[1:0] bits + */ + LL_DMA_ConfigTransfer(DMAx, Channel, DMA_InitStruct->Direction | \ + DMA_InitStruct->Mode | \ + DMA_InitStruct->PeriphOrM2MSrcIncMode | \ + DMA_InitStruct->MemoryOrM2MDstIncMode | \ + DMA_InitStruct->PeriphOrM2MSrcDataSize | \ + DMA_InitStruct->MemoryOrM2MDstDataSize | \ + DMA_InitStruct->Priority); + + /*-------------------------- DMAx CMAR Configuration ------------------------- + * Configure the memory or destination base address with parameter : + * - MemoryOrM2MDstAddress: DMA_CMAR_MA[31:0] bits + */ + LL_DMA_SetMemoryAddress(DMAx, Channel, DMA_InitStruct->MemoryOrM2MDstAddress); + + /*-------------------------- DMAx CPAR Configuration ------------------------- + * Configure the peripheral or source base address with parameter : + * - PeriphOrM2MSrcAddress: DMA_CPAR_PA[31:0] bits + */ + LL_DMA_SetPeriphAddress(DMAx, Channel, DMA_InitStruct->PeriphOrM2MSrcAddress); + + /*--------------------------- DMAx CNDTR Configuration ----------------------- + * Configure the peripheral base address with parameter : + * - NbData: DMA_CNDTR_NDT[15:0] bits + */ + LL_DMA_SetDataLength(DMAx, Channel, DMA_InitStruct->NbData); + + /*--------------------------- DMAMUXx CCR Configuration ---------------------- + * Configure the DMA request for DMA Channels on DMAMUX Channel x with parameter : + * - PeriphRequest: DMA_CxCR[7:0] bits + */ + LL_DMA_SetPeriphRequest(DMAx, Channel, DMA_InitStruct->PeriphRequest); + + return (uint32_t)SUCCESS; +} + +/** + * @brief Set each @ref LL_DMA_InitTypeDef field to default value. + * @param DMA_InitStruct Pointer to a @ref LL_DMA_InitTypeDef structure. + * @retval None + */ +void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct) +{ + /* Set DMA_InitStruct fields to default values */ + DMA_InitStruct->PeriphOrM2MSrcAddress = (uint32_t)0x00000000U; + DMA_InitStruct->MemoryOrM2MDstAddress = (uint32_t)0x00000000U; + DMA_InitStruct->Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY; + DMA_InitStruct->Mode = LL_DMA_MODE_NORMAL; + DMA_InitStruct->PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT; + DMA_InitStruct->MemoryOrM2MDstIncMode = LL_DMA_MEMORY_NOINCREMENT; + DMA_InitStruct->PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE; + DMA_InitStruct->MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE; + DMA_InitStruct->NbData = (uint32_t)0x00000000U; + DMA_InitStruct->PeriphRequest = LL_DMAMUX_REQ_MEM2MEM; + DMA_InitStruct->Priority = LL_DMA_PRIORITY_LOW; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* DMA1 || DMA2 */ + +/** + * @} + */ + +#endif /* USE_FULL_LL_DRIVER */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c new file mode 100644 index 0000000..d1e1f46 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c @@ -0,0 +1,296 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_exti.c + * @author MCD Application Team + * @brief EXTI LL module driver. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#if defined(USE_FULL_LL_DRIVER) + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_exti.h" +#ifdef USE_FULL_ASSERT +#include "stm32_assert.h" +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (EXTI) + +/** @defgroup EXTI_LL EXTI + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup EXTI_LL_Private_Macros + * @{ + */ + +#define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) +#define IS_LL_EXTI_LINE_32_63(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_32_63) == 0x00000000U) + +#define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ + || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ + || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) + + +#define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ + || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ + || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ + || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) + +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup EXTI_LL_Exported_Functions + * @{ + */ + +/** @addtogroup EXTI_LL_EF_Init + * @{ + */ + +/** + * @brief De-initialize the EXTI registers to their default reset values. + * @retval An ErrorStatus enumeration value: + * - 0x00: EXTI registers are de-initialized + */ +uint32_t LL_EXTI_DeInit(void) +{ + /* Interrupt mask register set to default reset values */ + LL_EXTI_WriteReg(IMR1, 0x1F840000U); + /* Event mask register set to default reset values */ + LL_EXTI_WriteReg(EMR1, 0x00000000U); + /* Rising Trigger selection register set to default reset values */ + LL_EXTI_WriteReg(RTSR1, 0x00000000U); + /* Falling Trigger selection register set to default reset values */ + LL_EXTI_WriteReg(FTSR1, 0x00000000U); + /* Software interrupt event register set to default reset values */ + LL_EXTI_WriteReg(SWIER1, 0x00000000U); + /* Pending register clear */ + LL_EXTI_WriteReg(PR1, 0x007DFFFFU); + + /* Interrupt mask register 2 set to default reset values */ +#if defined(LL_EXTI_LINE_32) && defined(LL_EXTI_LINE_33) && defined(LL_EXTI_LINE_35) && defined(LL_EXTI_LINE_42) + LL_EXTI_WriteReg(IMR2, 0x0000043CU); +#else + LL_EXTI_WriteReg(IMR2, 0x00000034U); +#endif /* LL_EXTI_LINE_xx */ + /* Event mask register 2 set to default reset values */ + LL_EXTI_WriteReg(EMR2, 0x00000000U); + /* Rising Trigger selection register 2 set to default reset values */ + LL_EXTI_WriteReg(RTSR2, 0x00000000U); + /* Falling Trigger selection register 2 set to default reset values */ + LL_EXTI_WriteReg(FTSR2, 0x00000000U); + /* Software interrupt event register 2 set to default reset values */ + LL_EXTI_WriteReg(SWIER2, 0x00000000U); + /* Pending register 2 clear */ + LL_EXTI_WriteReg(PR2, 0x00000078U); + + return 0x00u; +} + +/** + * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. + * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. + * @retval An ErrorStatus enumeration value: + * - 0x00: EXTI registers are initialized + * - any other value : wrong configuration + */ +uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) +{ + uint32_t status = 0x00u; + + /* Check the parameters */ + assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); + assert_param(IS_LL_EXTI_LINE_32_63(EXTI_InitStruct->Line_32_63)); + assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); + assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); + + /* ENABLE LineCommand */ + if (EXTI_InitStruct->LineCommand != DISABLE) + { + assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); + + /* Configure EXTI Lines in range from 0 to 31 */ + if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) + { + switch (EXTI_InitStruct->Mode) + { + case LL_EXTI_MODE_IT: + /* First Disable Event on provided Lines */ + LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); + /* Then Enable IT on provided Lines */ + LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); + break; + case LL_EXTI_MODE_EVENT: + /* First Disable IT on provided Lines */ + LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); + /* Then Enable Event on provided Lines */ + LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); + break; + case LL_EXTI_MODE_IT_EVENT: + /* Directly Enable IT on provided Lines */ + LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); + /* Directly Enable Event on provided Lines */ + LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); + break; + default: + status = 0x01u; + break; + } + if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) + { + switch (EXTI_InitStruct->Trigger) + { + case LL_EXTI_TRIGGER_RISING: + /* First Disable Falling Trigger on provided Lines */ + LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); + /* Then Enable Rising Trigger on provided Lines */ + LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); + break; + case LL_EXTI_TRIGGER_FALLING: + /* First Disable Rising Trigger on provided Lines */ + LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); + /* Then Enable Falling Trigger on provided Lines */ + LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); + break; + case LL_EXTI_TRIGGER_RISING_FALLING: + /* Enable Rising Trigger on provided Lines */ + LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); + /* Enable Falling Trigger on provided Lines */ + LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); + break; + default: + status |= 0x02u; + break; + } + } + } + /* Configure EXTI Lines in range from 32 to 63 */ + if (EXTI_InitStruct->Line_32_63 != LL_EXTI_LINE_NONE) + { + switch (EXTI_InitStruct->Mode) + { + case LL_EXTI_MODE_IT: + /* First Disable Event on provided Lines */ + LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63); + /* Then Enable IT on provided Lines */ + LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63); + break; + case LL_EXTI_MODE_EVENT: + /* First Disable IT on provided Lines */ + LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63); + /* Then Enable Event on provided Lines */ + LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63); + break; + case LL_EXTI_MODE_IT_EVENT: + /* Directly Enable IT on provided Lines */ + LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63); + /* Directly Enable IT on provided Lines */ + LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63); + break; + default: + status |= 0x04u; + break; + } + if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) + { + switch (EXTI_InitStruct->Trigger) + { + case LL_EXTI_TRIGGER_RISING: + /* First Disable Falling Trigger on provided Lines */ + LL_EXTI_DisableFallingTrig_32_63(EXTI_InitStruct->Line_32_63); + /* Then Enable IT on provided Lines */ + LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63); + break; + case LL_EXTI_TRIGGER_FALLING: + /* First Disable Rising Trigger on provided Lines */ + LL_EXTI_DisableRisingTrig_32_63(EXTI_InitStruct->Line_32_63); + /* Then Enable Falling Trigger on provided Lines */ + LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63); + break; + case LL_EXTI_TRIGGER_RISING_FALLING: + /* Enable Rising Trigger on provided Lines */ + LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63); + /* Enable Falling Trigger on provided Lines */ + LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63); + break; + default: + status |= 0x05u; + break; + } + } + } + } + /* DISABLE LineCommand */ + else + { + /* De-configure IT EXTI Lines in range from 0 to 31 */ + LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); + /* De-configure Event EXTI Lines in range from 0 to 31 */ + LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); + /* De-configure IT EXTI Lines in range from 32 to 63 */ + LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63); + /* De-configure Event EXTI Lines in range from 32 to 63 */ + LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63); + } + + return status; +} + +/** + * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. + * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. + * @retval None + */ +void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) +{ + EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; + EXTI_InitStruct->Line_32_63 = LL_EXTI_LINE_NONE; + EXTI_InitStruct->LineCommand = DISABLE; + EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; + EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined (EXTI) */ + +/** + * @} + */ + +#endif /* USE_FULL_LL_DRIVER */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c new file mode 100644 index 0000000..ca24e5e --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c @@ -0,0 +1,270 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_gpio.c + * @author MCD Application Team + * @brief GPIO LL module driver. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#if defined(USE_FULL_LL_DRIVER) + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_gpio.h" +#include "stm32g4xx_ll_bus.h" +#ifdef USE_FULL_ASSERT +#include "stm32_assert.h" +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) + +/** @addtogroup GPIO_LL + * @{ + */ +/** MISRA C:2012 deviation rule has been granted for following rules: + * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of + * range of the shift operator in following API : + * LL_GPIO_Init + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup GPIO_LL_Private_Macros + * @{ + */ +#define IS_LL_GPIO_PIN(__VALUE__) (((0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL))) + +#define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ + ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ + ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\ + ((__VALUE__) == LL_GPIO_MODE_ANALOG)) + +#define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ + ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) + +#define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ + ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ + ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\ + ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH)) + +#define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ + ((__VALUE__) == LL_GPIO_PULL_UP) ||\ + ((__VALUE__) == LL_GPIO_PULL_DOWN)) + +#define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ + ((__VALUE__) == LL_GPIO_AF_1 ) ||\ + ((__VALUE__) == LL_GPIO_AF_2 ) ||\ + ((__VALUE__) == LL_GPIO_AF_3 ) ||\ + ((__VALUE__) == LL_GPIO_AF_4 ) ||\ + ((__VALUE__) == LL_GPIO_AF_5 ) ||\ + ((__VALUE__) == LL_GPIO_AF_6 ) ||\ + ((__VALUE__) == LL_GPIO_AF_7 ) ||\ + ((__VALUE__) == LL_GPIO_AF_8 ) ||\ + ((__VALUE__) == LL_GPIO_AF_9 ) ||\ + ((__VALUE__) == LL_GPIO_AF_10 ) ||\ + ((__VALUE__) == LL_GPIO_AF_11 ) ||\ + ((__VALUE__) == LL_GPIO_AF_12 ) ||\ + ((__VALUE__) == LL_GPIO_AF_13 ) ||\ + ((__VALUE__) == LL_GPIO_AF_14 ) ||\ + ((__VALUE__) == LL_GPIO_AF_15 )) +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup GPIO_LL_Exported_Functions + * @{ + */ + +/** @addtogroup GPIO_LL_EF_Init + * @{ + */ + +/** + * @brief De-initialize GPIO registers (Registers restored to their default values). + * @param GPIOx GPIO Port + * @retval An ErrorStatus enumeration value: + * - SUCCESS: GPIO registers are de-initialized + * - ERROR: Wrong GPIO Port + */ +ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) +{ + ErrorStatus status = SUCCESS; + + /* Check the parameters */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + + /* Force and Release reset on clock of GPIOx Port */ + if (GPIOx == GPIOA) + { + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOA); + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOA); + } + else if (GPIOx == GPIOB) + { + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOB); + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOB); + } + else if (GPIOx == GPIOC) + { + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOC); + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOC); + } + else if (GPIOx == GPIOD) + { + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOD); + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOD); + } + else if (GPIOx == GPIOE) + { + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOE); + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOE); + } + else if (GPIOx == GPIOF) + { + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOF); + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOF); + } + else if (GPIOx == GPIOG) + { + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOG); + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOG); + } + else + { + status = ERROR; + } + + return (status); +} + +/** + * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. + * @param GPIOx GPIO Port + * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure + * that contains the configuration information for the specified GPIO peripheral. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content + * - ERROR: Not applicable + */ +ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) +{ + uint32_t pinpos; + uint32_t currentpin; + + /* Check the parameters */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); + assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); + assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); + + /* ------------------------- Configure the port pins ---------------- */ + /* Initialize pinpos on first pin set */ + pinpos = POSITION_VAL(GPIO_InitStruct->Pin); + + /* Configure the port pins */ + while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U) + { + /* Get current io position */ + currentpin = (GPIO_InitStruct->Pin) & (0x00000001UL << pinpos); + + if (currentpin != 0x00u) + { + if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) + { + /* Check Speed mode parameters */ + assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); + + /* Speed mode configuration */ + LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); + + /* Check Output mode parameters */ + assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); + + /* Output mode configuration*/ + LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); + } + + /* Pull-up Pull down resistor configuration*/ + LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); + + if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) + { + /* Check Alternate parameter */ + assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); + + /* Speed mode configuration */ + if (currentpin < LL_GPIO_PIN_8) + { + LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); + } + else + { + LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); + } + } + + /* Pin Mode configuration */ + LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); + } + pinpos++; + } + return (SUCCESS); +} + +/** + * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. + * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure + * whose fields will be set to default values. + * @retval None + */ + +void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) +{ + /* Reset GPIO init structure parameters values */ + GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; + GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct->Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct->Alternate = LL_GPIO_AF_0; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) */ + +/** + * @} + */ + +#endif /* USE_FULL_LL_DRIVER */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c new file mode 100644 index 0000000..56937ed --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c @@ -0,0 +1,285 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_lpuart.c + * @author MCD Application Team + * @brief LPUART LL module driver. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#if defined(USE_FULL_LL_DRIVER) + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_lpuart.h" +#include "stm32g4xx_ll_rcc.h" +#include "stm32g4xx_ll_bus.h" +#ifdef USE_FULL_ASSERT +#include "stm32_assert.h" +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined (LPUART1) + +/** @addtogroup LPUART_LL + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/** @addtogroup LPUART_LL_Private_Constants + * @{ + */ + +/* Definition of default baudrate value used for LPUART initialisation */ +#define LPUART_DEFAULT_BAUDRATE (9600U) + +/** + * @} + */ + + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LPUART_LL_Private_Macros + * @{ + */ + +/* Check of parameters for configuration of LPUART registers */ + +#define IS_LL_LPUART_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPUART_PRESCALER_DIV1) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV2) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV4) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV6) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV8) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV10) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV12) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV16) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV32) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV64) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV128) \ + || ((__VALUE__) == LL_LPUART_PRESCALER_DIV256)) + +/* __BAUDRATE__ Depending on constraints applicable for LPUART BRR register */ +/* value : */ +/* - fck must be in the range [3 x baudrate, 4096 x baudrate] */ +/* - LPUART_BRR register value should be >= 0x300 */ +/* - LPUART_BRR register value should be <= 0xFFFFF (20 bits) */ +/* Baudrate specified by the user should belong to [8, 50000000].*/ +#define IS_LL_LPUART_BAUDRATE(__BAUDRATE__) (((__BAUDRATE__) <= 50000000U) && ((__BAUDRATE__) >= 8U)) + +/* __VALUE__ BRR content must be greater than or equal to 0x300. */ +#define IS_LL_LPUART_BRR_MIN(__VALUE__) ((__VALUE__) >= 0x300U) + +/* __VALUE__ BRR content must be lower than or equal to 0xFFFFF. */ +#define IS_LL_LPUART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x000FFFFFU) + +#define IS_LL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == LL_LPUART_DIRECTION_NONE) \ + || ((__VALUE__) == LL_LPUART_DIRECTION_RX) \ + || ((__VALUE__) == LL_LPUART_DIRECTION_TX) \ + || ((__VALUE__) == LL_LPUART_DIRECTION_TX_RX)) + +#define IS_LL_LPUART_PARITY(__VALUE__) (((__VALUE__) == LL_LPUART_PARITY_NONE) \ + || ((__VALUE__) == LL_LPUART_PARITY_EVEN) \ + || ((__VALUE__) == LL_LPUART_PARITY_ODD)) + +#define IS_LL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_LPUART_DATAWIDTH_7B) \ + || ((__VALUE__) == LL_LPUART_DATAWIDTH_8B) \ + || ((__VALUE__) == LL_LPUART_DATAWIDTH_9B)) + +#define IS_LL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == LL_LPUART_STOPBITS_1) \ + || ((__VALUE__) == LL_LPUART_STOPBITS_2)) + +#define IS_LL_LPUART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_LPUART_HWCONTROL_NONE) \ + || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS) \ + || ((__VALUE__) == LL_LPUART_HWCONTROL_CTS) \ + || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS_CTS)) + +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LPUART_LL_Exported_Functions + * @{ + */ + +/** @addtogroup LPUART_LL_EF_Init + * @{ + */ + +/** + * @brief De-initialize LPUART registers (Registers restored to their default values). + * @param LPUARTx LPUART Instance + * @retval An ErrorStatus enumeration value: + * - SUCCESS: LPUART registers are de-initialized + * - ERROR: not applicable + */ +ErrorStatus LL_LPUART_DeInit(const USART_TypeDef *LPUARTx) +{ + ErrorStatus status = SUCCESS; + + /* Check the parameters */ + assert_param(IS_LPUART_INSTANCE(LPUARTx)); + + if (LPUARTx == LPUART1) + { + /* Force reset of LPUART peripheral */ + LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPUART1); + + /* Release reset of LPUART peripheral */ + LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPUART1); + } + else + { + status = ERROR; + } + + return (status); +} + +/** + * @brief Initialize LPUART registers according to the specified + * parameters in LPUART_InitStruct. + * @note As some bits in LPUART configuration registers can only be written when + * the LPUART is disabled (USART_CR1_UE bit =0), + * LPUART Peripheral should be in disabled state prior calling this function. + * Otherwise, ERROR result will be returned. + * @note Baud rate value stored in LPUART_InitStruct BaudRate field, should be valid (different from 0). + * @param LPUARTx LPUART Instance + * @param LPUART_InitStruct pointer to a @ref LL_LPUART_InitTypeDef structure + * that contains the configuration information for the specified LPUART peripheral. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: LPUART registers are initialized according to LPUART_InitStruct content + * - ERROR: Problem occurred during LPUART Registers initialization + */ +ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, const LL_LPUART_InitTypeDef *LPUART_InitStruct) +{ + ErrorStatus status = ERROR; + uint32_t periphclk; + + /* Check the parameters */ + assert_param(IS_LPUART_INSTANCE(LPUARTx)); + assert_param(IS_LL_LPUART_PRESCALER(LPUART_InitStruct->PrescalerValue)); + assert_param(IS_LL_LPUART_BAUDRATE(LPUART_InitStruct->BaudRate)); + assert_param(IS_LL_LPUART_DATAWIDTH(LPUART_InitStruct->DataWidth)); + assert_param(IS_LL_LPUART_STOPBITS(LPUART_InitStruct->StopBits)); + assert_param(IS_LL_LPUART_PARITY(LPUART_InitStruct->Parity)); + assert_param(IS_LL_LPUART_DIRECTION(LPUART_InitStruct->TransferDirection)); + assert_param(IS_LL_LPUART_HWCONTROL(LPUART_InitStruct->HardwareFlowControl)); + + /* LPUART needs to be in disabled state, in order to be able to configure some bits in + CRx registers. Otherwise (LPUART not in Disabled state) => return ERROR */ + if (LL_LPUART_IsEnabled(LPUARTx) == 0U) + { + /*---------------------------- LPUART CR1 Configuration ----------------------- + * Configure LPUARTx CR1 (LPUART Word Length, Parity and Transfer Direction bits) with parameters: + * - DataWidth: USART_CR1_M bits according to LPUART_InitStruct->DataWidth value + * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to LPUART_InitStruct->Parity value + * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to LPUART_InitStruct->TransferDirection value + */ + MODIFY_REG(LPUARTx->CR1, + (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE), + (LPUART_InitStruct->DataWidth | LPUART_InitStruct->Parity | LPUART_InitStruct->TransferDirection)); + + /*---------------------------- LPUART CR2 Configuration ----------------------- + * Configure LPUARTx CR2 (Stop bits) with parameters: + * - Stop Bits: USART_CR2_STOP bits according to LPUART_InitStruct->StopBits value. + */ + LL_LPUART_SetStopBitsLength(LPUARTx, LPUART_InitStruct->StopBits); + + /*---------------------------- LPUART CR3 Configuration ----------------------- + * Configure LPUARTx CR3 (Hardware Flow Control) with parameters: + * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according + * to LPUART_InitStruct->HardwareFlowControl value. + */ + LL_LPUART_SetHWFlowCtrl(LPUARTx, LPUART_InitStruct->HardwareFlowControl); + + /*---------------------------- LPUART BRR Configuration ----------------------- + * Retrieve Clock frequency used for LPUART Peripheral + */ + periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE); + + /* Configure the LPUART Baud Rate : + - prescaler value is required + - valid baud rate value (different from 0) is required + - Peripheral clock as returned by RCC service, should be valid (different from 0). + */ + if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) + && (LPUART_InitStruct->BaudRate != 0U)) + { + status = SUCCESS; + LL_LPUART_SetBaudRate(LPUARTx, + periphclk, + LPUART_InitStruct->PrescalerValue, + LPUART_InitStruct->BaudRate); + + /* Check BRR is greater than or equal to 0x300 */ + assert_param(IS_LL_LPUART_BRR_MIN(LPUARTx->BRR)); + + /* Check BRR is lower than or equal to 0xFFFFF */ + assert_param(IS_LL_LPUART_BRR_MAX(LPUARTx->BRR)); + } + + /*---------------------------- LPUART PRESC Configuration ----------------------- + * Configure LPUARTx PRESC (Prescaler) with parameters: + * - PrescalerValue: LPUART_PRESC_PRESCALER bits according to LPUART_InitStruct->PrescalerValue value. + */ + LL_LPUART_SetPrescaler(LPUARTx, LPUART_InitStruct->PrescalerValue); + } + + return (status); +} + +/** + * @brief Set each @ref LL_LPUART_InitTypeDef field to default value. + * @param LPUART_InitStruct pointer to a @ref LL_LPUART_InitTypeDef structure + * whose fields will be set to default values. + * @retval None + */ + +void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct) +{ + /* Set LPUART_InitStruct fields to default values */ + LPUART_InitStruct->PrescalerValue = LL_LPUART_PRESCALER_DIV1; + LPUART_InitStruct->BaudRate = LPUART_DEFAULT_BAUDRATE; + LPUART_InitStruct->DataWidth = LL_LPUART_DATAWIDTH_8B; + LPUART_InitStruct->StopBits = LL_LPUART_STOPBITS_1; + LPUART_InitStruct->Parity = LL_LPUART_PARITY_NONE ; + LPUART_InitStruct->TransferDirection = LL_LPUART_DIRECTION_TX_RX; + LPUART_InitStruct->HardwareFlowControl = LL_LPUART_HWCONTROL_NONE; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* LPUART1 */ + +/** + * @} + */ + +#endif /* USE_FULL_LL_DRIVER */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c new file mode 100644 index 0000000..4c900a4 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c @@ -0,0 +1,83 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_pwr.c + * @author MCD Application Team + * @brief PWR LL module driver. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#if defined(USE_FULL_LL_DRIVER) + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_pwr.h" +#include "stm32g4xx_ll_bus.h" + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +#if defined(PWR) + +/** @defgroup PWR_LL PWR + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup PWR_LL_Exported_Functions + * @{ + */ + +/** @addtogroup PWR_LL_EF_Init + * @{ + */ + +/** + * @brief De-initialize the PWR registers to their default reset values. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: PWR registers are de-initialized + * - ERROR: not applicable + */ +ErrorStatus LL_PWR_DeInit(void) +{ + /* Force reset of PWR clock */ + LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); + + /* Release reset of PWR clock */ + LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); + + return SUCCESS; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +#endif /* defined(PWR) */ +/** + * @} + */ + +#endif /* USE_FULL_LL_DRIVER */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c new file mode 100644 index 0000000..61f08d5 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c @@ -0,0 +1,1172 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_rcc.c + * @author MCD Application Team + * @brief RCC LL module driver. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + ****************************************************************************** + */ +#if defined(USE_FULL_LL_DRIVER) + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_rcc.h" +#ifdef USE_FULL_ASSERT + #include "stm32_assert.h" +#else + #define assert_param(expr) ((void)0U) +#endif +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +/** @addtogroup RCC_LL + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup RCC_LL_Private_Macros + * @{ + */ +#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_USART3_CLKSOURCE)) +#if defined(RCC_CCIPR_UART5SEL) +#define IS_LL_RCC_UART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_UART4_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_UART5_CLKSOURCE)) +#elif defined(RCC_CCIPR_UART4SEL) +#define IS_LL_RCC_UART_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_UART4_CLKSOURCE) +#endif /* RCC_CCIPR_UART5SEL*/ + +#define IS_LL_RCC_LPUART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPUART1_CLKSOURCE)) + +#if defined(RCC_CCIPR2_I2C4SEL) +#define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2C1_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_I2C2_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_I2C3_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_I2C4_CLKSOURCE)) + +#else +#define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2C1_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_I2C2_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_I2C3_CLKSOURCE)) +#endif /* RCC_CCIPR2_I2C4SEL */ +#define IS_LL_RCC_LPTIM_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPTIM1_CLKSOURCE)) + +#define IS_LL_RCC_SAI_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_SAI1_CLKSOURCE) + +#define IS_LL_RCC_I2S_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_I2S_CLKSOURCE) + +#define IS_LL_RCC_RNG_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_RNG_CLKSOURCE)) + +#define IS_LL_RCC_USB_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USB_CLKSOURCE)) + +#if defined(ADC345_COMMON) +#define IS_LL_RCC_ADC_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_ADC12_CLKSOURCE) \ + || ((__VALUE__) == LL_RCC_ADC345_CLKSOURCE)) +#else +#define IS_LL_RCC_ADC_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_ADC12_CLKSOURCE)) +#endif /* ADC345_COMMON */ + +#if defined(QUADSPI) +#define IS_LL_RCC_QUADSPI_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_QUADSPI_CLKSOURCE)) +#endif /* QUADSPI */ + +#if defined(FDCAN1) +#define IS_LL_RCC_FDCAN_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_FDCAN_CLKSOURCE)) +#endif /* FDCAN1 */ + +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup RCC_LL_Private_Functions RCC Private functions + * @{ + */ +static uint32_t RCC_GetSystemClockFreq(void); +static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency); +static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency); +static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency); +static uint32_t RCC_PLL_GetFreqDomain_SYS(void); +static uint32_t RCC_PLL_GetFreqDomain_ADC(void); +static uint32_t RCC_PLL_GetFreqDomain_48M(void); +/** + * @} + */ + + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup RCC_LL_Exported_Functions + * @{ + */ + +/** @addtogroup RCC_LL_EF_Init + * @{ + */ + +/** + * @brief Reset the RCC clock configuration to the default reset state. + * @note The default reset state of the clock configuration is given below: + * - HSI ON and used as system clock source + * - HSE and PLL OFF + * - AHB, APB1 and APB2 prescaler set to 1. + * - CSS, MCO OFF + * - All interrupts disabled + * @note This function doesn't modify the configuration of the + * - Peripheral clocks + * - LSI, LSE and RTC clocks + * @retval An ErrorStatus enumeration value: + * - SUCCESS: RCC registers are de-initialized + * - ERROR: not applicable + */ +ErrorStatus LL_RCC_DeInit(void) +{ + uint32_t vl_mask; + + /* Set HSION bit and wait for HSI READY bit */ + LL_RCC_HSI_Enable(); + while (LL_RCC_HSI_IsReady() == 0U) + {} + + /* Set HSITRIM bits to reset value*/ + LL_RCC_HSI_SetCalibTrimming(0x40U); + + /* Reset whole CFGR register but keep HSI as system clock source */ + LL_RCC_WriteReg(CFGR, LL_RCC_SYS_CLKSOURCE_HSI); + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) {}; + + /* Reset whole CR register but HSI in 2 steps in case HSEBYP is set */ + LL_RCC_WriteReg(CR, RCC_CR_HSION); + LL_RCC_WriteReg(CR, RCC_CR_HSION); + + /* Wait for PLL READY bit to be reset */ + while (LL_RCC_PLL_IsReady() != 0U) + {} + + /* Reset PLLCFGR register */ + LL_RCC_WriteReg(PLLCFGR, 16U << RCC_PLLCFGR_PLLN_Pos); + + /* Disable all interrupts */ + LL_RCC_WriteReg(CIER, 0x00000000U); + + /* Clear all interrupt flags */ + vl_mask = RCC_CICR_LSIRDYC | RCC_CICR_LSERDYC | RCC_CICR_HSIRDYC | RCC_CICR_HSERDYC | RCC_CICR_PLLRDYC | \ + RCC_CICR_HSI48RDYC | RCC_CICR_CSSC | RCC_CICR_LSECSSC; + + LL_RCC_WriteReg(CICR, vl_mask); + + /* Clear reset flags */ + LL_RCC_ClearResetFlags(); + + return SUCCESS; +} + +/** + * @} + */ + +/** @addtogroup RCC_LL_EF_Get_Freq + * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks + * and different peripheral clocks available on the device. + * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(**) + * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***) + * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(***) + * or HSI_VALUE(**) multiplied/divided by the PLL factors. + * @note (**) HSI_VALUE is a constant defined in this file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * @note (***) HSE_VALUE is a constant defined in this file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * @note The result of this function could be incorrect when using fractional + * value for HSE crystal. + * @note This function can be used by the user application to compute the + * baud-rate for the communication peripherals or configure other parameters. + * @{ + */ + +/** + * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks + * @note Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function + * must be called to update structure fields. Otherwise, any + * configuration based on this function will be incorrect. + * @param RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies + * @retval None + */ +void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks) +{ + /* Get SYSCLK frequency */ + RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq(); + + /* HCLK clock frequency */ + RCC_Clocks->HCLK_Frequency = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency); + + /* PCLK1 clock frequency */ + RCC_Clocks->PCLK1_Frequency = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency); + + /* PCLK2 clock frequency */ + RCC_Clocks->PCLK2_Frequency = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency); +} + +/** + * @brief Return USARTx clock frequency + * @param USARTxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_USART1_CLKSOURCE + * @arg @ref LL_RCC_USART2_CLKSOURCE + * @arg @ref LL_RCC_USART3_CLKSOURCE + * + * @retval USART clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready + */ +uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource) +{ + uint32_t usart_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource)); + + if (USARTxSource == LL_RCC_USART1_CLKSOURCE) + { + /* USART1CLK clock frequency */ + switch (LL_RCC_GetUSARTClockSource(USARTxSource)) + { + case LL_RCC_USART1_CLKSOURCE_SYSCLK: /* USART1 Clock is System Clock */ + usart_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_USART1_CLKSOURCE_HSI: /* USART1 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + usart_frequency = HSI_VALUE; + } + break; + + case LL_RCC_USART1_CLKSOURCE_LSE: /* USART1 Clock is LSE Osc. */ + if (LL_RCC_LSE_IsReady() != 0U) + { + usart_frequency = LSE_VALUE; + } + break; + + case LL_RCC_USART1_CLKSOURCE_PCLK2: /* USART1 Clock is PCLK2 */ + default: + usart_frequency = RCC_GetPCLK2ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + else if (USARTxSource == LL_RCC_USART2_CLKSOURCE) + { + /* USART2CLK clock frequency */ + switch (LL_RCC_GetUSARTClockSource(USARTxSource)) + { + case LL_RCC_USART2_CLKSOURCE_SYSCLK: /* USART2 Clock is System Clock */ + usart_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_USART2_CLKSOURCE_HSI: /* USART2 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + usart_frequency = HSI_VALUE; + } + break; + + case LL_RCC_USART2_CLKSOURCE_LSE: /* USART2 Clock is LSE Osc. */ + if (LL_RCC_LSE_IsReady() != 0U) + { + usart_frequency = LSE_VALUE; + } + break; + + case LL_RCC_USART2_CLKSOURCE_PCLK1: /* USART2 Clock is PCLK1 */ + default: + usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + else + { + if (USARTxSource == LL_RCC_USART3_CLKSOURCE) + { + /* USART3CLK clock frequency */ + switch (LL_RCC_GetUSARTClockSource(USARTxSource)) + { + case LL_RCC_USART3_CLKSOURCE_SYSCLK: /* USART3 Clock is System Clock */ + usart_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_USART3_CLKSOURCE_HSI: /* USART3 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + usart_frequency = HSI_VALUE; + } + break; + + case LL_RCC_USART3_CLKSOURCE_LSE: /* USART3 Clock is LSE Osc. */ + if (LL_RCC_LSE_IsReady() != 0U) + { + usart_frequency = LSE_VALUE; + } + break; + + case LL_RCC_USART3_CLKSOURCE_PCLK1: /* USART3 Clock is PCLK1 */ + default: + usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + } + return usart_frequency; +} + +#if defined(RCC_CCIPR_UART4SEL) +/** + * @brief Return UARTx clock frequency + * @param UARTxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_UART4_CLKSOURCE (*) + * @arg @ref LL_RCC_UART5_CLKSOURCE (*) + * + * (*) value not defined in all devices. + * @retval UART clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready + */ +uint32_t LL_RCC_GetUARTClockFreq(uint32_t UARTxSource) +{ + uint32_t uart_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_UART_CLKSOURCE(UARTxSource)); + + if (UARTxSource == LL_RCC_UART4_CLKSOURCE) + { + /* UART4CLK clock frequency */ + switch (LL_RCC_GetUARTClockSource(UARTxSource)) + { + case LL_RCC_UART4_CLKSOURCE_SYSCLK: /* UART4 Clock is System Clock */ + uart_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_UART4_CLKSOURCE_HSI: /* UART4 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + uart_frequency = HSI_VALUE; + } + break; + + case LL_RCC_UART4_CLKSOURCE_LSE: /* UART4 Clock is LSE Osc. */ + if (LL_RCC_LSE_IsReady() != 0U) + { + uart_frequency = LSE_VALUE; + } + break; + + case LL_RCC_UART4_CLKSOURCE_PCLK1: /* UART4 Clock is PCLK1 */ + default: + uart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + +#if defined(RCC_CCIPR_UART5SEL) + if (UARTxSource == LL_RCC_UART5_CLKSOURCE) + { + /* UART5CLK clock frequency */ + switch (LL_RCC_GetUARTClockSource(UARTxSource)) + { + case LL_RCC_UART5_CLKSOURCE_SYSCLK: /* UART5 Clock is System Clock */ + uart_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_UART5_CLKSOURCE_HSI: /* UART5 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + uart_frequency = HSI_VALUE; + } + break; + + case LL_RCC_UART5_CLKSOURCE_LSE: /* UART5 Clock is LSE Osc. */ + if (LL_RCC_LSE_IsReady() != 0U) + { + uart_frequency = LSE_VALUE; + } + break; + + case LL_RCC_UART5_CLKSOURCE_PCLK1: /* UART5 Clock is PCLK1 */ + default: + uart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } +#endif /* RCC_CCIPR_UART5SEL */ + + return uart_frequency; +} +#endif /* RCC_CCIPR_UART4SEL */ + +/** + * @brief Return I2Cx clock frequency + * @param I2CxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_I2C1_CLKSOURCE + * @arg @ref LL_RCC_I2C2_CLKSOURCE + * @arg @ref LL_RCC_I2C3_CLKSOURCE + * @arg @ref LL_RCC_I2C4_CLKSOURCE (*) + * + * (*) value not defined in all devices. + * @retval I2C clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that HSI oscillator is not ready + */ +uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource) +{ + uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_I2C_CLKSOURCE(I2CxSource)); + + if (I2CxSource == LL_RCC_I2C1_CLKSOURCE) + { + /* I2C1 CLK clock frequency */ + switch (LL_RCC_GetI2CClockSource(I2CxSource)) + { + case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */ + i2c_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_I2C1_CLKSOURCE_HSI: /* I2C1 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + i2c_frequency = HSI_VALUE; + } + break; + + case LL_RCC_I2C1_CLKSOURCE_PCLK1: /* I2C1 Clock is PCLK1 */ + default: + i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + else if (I2CxSource == LL_RCC_I2C2_CLKSOURCE) + { + /* I2C2 CLK clock frequency */ + switch (LL_RCC_GetI2CClockSource(I2CxSource)) + { + case LL_RCC_I2C2_CLKSOURCE_SYSCLK: /* I2C2 Clock is System Clock */ + i2c_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_I2C2_CLKSOURCE_HSI: /* I2C2 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + i2c_frequency = HSI_VALUE; + } + break; + + case LL_RCC_I2C2_CLKSOURCE_PCLK1: /* I2C2 Clock is PCLK1 */ + default: + i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + else + { + if (I2CxSource == LL_RCC_I2C3_CLKSOURCE) + { + /* I2C3 CLK clock frequency */ + switch (LL_RCC_GetI2CClockSource(I2CxSource)) + { + case LL_RCC_I2C3_CLKSOURCE_SYSCLK: /* I2C3 Clock is System Clock */ + i2c_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_I2C3_CLKSOURCE_HSI: /* I2C3 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + i2c_frequency = HSI_VALUE; + } + break; + + case LL_RCC_I2C3_CLKSOURCE_PCLK1: /* I2C3 Clock is PCLK1 */ + default: + i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } +#if defined(RCC_CCIPR2_I2C4SEL) + else + { + if (I2CxSource == LL_RCC_I2C4_CLKSOURCE) + { + /* I2C4 CLK clock frequency */ + switch (LL_RCC_GetI2CClockSource(I2CxSource)) + { + case LL_RCC_I2C4_CLKSOURCE_SYSCLK: /* I2C4 Clock is System Clock */ + i2c_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_I2C4_CLKSOURCE_HSI: /* I2C4 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + i2c_frequency = HSI_VALUE; + } + break; + + case LL_RCC_I2C4_CLKSOURCE_PCLK1: /* I2C4 Clock is PCLK1 */ + default: + i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + } +#endif /*RCC_CCIPR2_I2C4SEL*/ + } + + return i2c_frequency; +} + + +/** + * @brief Return LPUARTx clock frequency + * @param LPUARTxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_LPUART1_CLKSOURCE + * @retval LPUART clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready + */ +uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource) +{ + uint32_t lpuart_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_LPUART_CLKSOURCE(LPUARTxSource)); + + /* LPUART1CLK clock frequency */ + switch (LL_RCC_GetLPUARTClockSource(LPUARTxSource)) + { + case LL_RCC_LPUART1_CLKSOURCE_SYSCLK: /* LPUART1 Clock is System Clock */ + lpuart_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_LPUART1_CLKSOURCE_HSI: /* LPUART1 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + lpuart_frequency = HSI_VALUE; + } + break; + + case LL_RCC_LPUART1_CLKSOURCE_LSE: /* LPUART1 Clock is LSE Osc. */ + if (LL_RCC_LSE_IsReady() != 0U) + { + lpuart_frequency = LSE_VALUE; + } + break; + + case LL_RCC_LPUART1_CLKSOURCE_PCLK1: /* LPUART1 Clock is PCLK1 */ + default: + lpuart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + + return lpuart_frequency; +} + +/** + * @brief Return LPTIMx clock frequency + * @param LPTIMxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_LPTIM1_CLKSOURCE + * @retval LPTIM clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI, LSI or LSE) is not ready + */ +uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource) +{ + uint32_t lptim_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_LPTIM_CLKSOURCE(LPTIMxSource)); + + if (LPTIMxSource == LL_RCC_LPTIM1_CLKSOURCE) + { + /* LPTIM1CLK clock frequency */ + switch (LL_RCC_GetLPTIMClockSource(LPTIMxSource)) + { + case LL_RCC_LPTIM1_CLKSOURCE_LSI: /* LPTIM1 Clock is LSI Osc. */ + if (LL_RCC_LSI_IsReady() != 0U) + { + lptim_frequency = LSI_VALUE; + } + break; + + case LL_RCC_LPTIM1_CLKSOURCE_HSI: /* LPTIM1 Clock is HSI Osc. */ + if (LL_RCC_HSI_IsReady() != 0U) + { + lptim_frequency = HSI_VALUE; + } + break; + + case LL_RCC_LPTIM1_CLKSOURCE_LSE: /* LPTIM1 Clock is LSE Osc. */ + if (LL_RCC_LSE_IsReady() != 0U) + { + lptim_frequency = LSE_VALUE; + } + break; + + case LL_RCC_LPTIM1_CLKSOURCE_PCLK1: /* LPTIM1 Clock is PCLK1 */ + default: + lptim_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + } + } + + return lptim_frequency; +} + +/** + * @brief Return SAIx clock frequency + * @param SAIxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_SAI1_CLKSOURCE + * + * @retval SAI clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that PLL is not ready + */ +uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource) +{ + uint32_t sai_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_SAI_CLKSOURCE(SAIxSource)); + + if (SAIxSource == LL_RCC_SAI1_CLKSOURCE) + { + /* SAI1CLK clock frequency */ + switch (LL_RCC_GetSAIClockSource(SAIxSource)) + { + case LL_RCC_SAI1_CLKSOURCE_SYSCLK: /* System clock used as SAI1 clock source */ + sai_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_SAI1_CLKSOURCE_PLL: /* PLL clock used as SAI1 clock source */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + sai_frequency = RCC_PLL_GetFreqDomain_48M(); + } + } + break; + + case LL_RCC_SAI1_CLKSOURCE_PIN: /* SAI1 Clock is External clock */ + sai_frequency = EXTERNAL_CLOCK_VALUE; + break; + + case LL_RCC_SAI1_CLKSOURCE_HSI: /* HSI clock used as SAI1 clock source */ + default: + if (LL_RCC_HSI_IsReady() != 0U) + { + sai_frequency = HSI_VALUE; + } + break; + + } + } + + return sai_frequency; +} + +/** + * @brief Return I2Sx clock frequency + * @param I2SxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_I2S_CLKSOURCE + * @retval I2S clock frequency (in Hz) + * @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator is not ready + */ +uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource) +{ + uint32_t i2s_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_I2S_CLKSOURCE(I2SxSource)); + + if (I2SxSource == LL_RCC_I2S_CLKSOURCE) + { + /* I2S CLK clock frequency */ + switch (LL_RCC_GetI2SClockSource(I2SxSource)) + { + case LL_RCC_I2S_CLKSOURCE_SYSCLK: /* I2S Clock is System Clock */ + i2s_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_I2S_CLKSOURCE_PLL: /* I2S Clock is PLL"Q" */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + i2s_frequency = RCC_PLL_GetFreqDomain_48M(); + } + } + break; + + case LL_RCC_I2S_CLKSOURCE_PIN: /* I2S Clock is External clock */ + i2s_frequency = EXTERNAL_CLOCK_VALUE; + break; + + case LL_RCC_I2S_CLKSOURCE_HSI: /* I2S Clock is HSI */ + default: + if (LL_RCC_HSI_IsReady() != 0U) + { + i2s_frequency = HSI_VALUE; + } + break; + } + } + + return i2s_frequency; +} + +#if defined(FDCAN1) +/** + * @brief Return FDCAN kernel clock frequency + * @param FDCANxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_FDCAN_CLKSOURCE + * @retval FDCAN kernel clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator is not ready + * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected + */ +uint32_t LL_RCC_GetFDCANClockFreq(uint32_t FDCANxSource) +{ + uint32_t fdcan_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_FDCAN_CLKSOURCE(FDCANxSource)); + + /* FDCAN kernel clock frequency */ + switch (LL_RCC_GetFDCANClockSource(FDCANxSource)) + { + case LL_RCC_FDCAN_CLKSOURCE_HSE: /* HSE clock used as FDCAN kernel clock */ + if (LL_RCC_HSE_IsReady() != 0U) + { + fdcan_frequency = HSE_VALUE; + } + break; + + case LL_RCC_FDCAN_CLKSOURCE_PLL: /* PLL clock used as FDCAN kernel clock */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + fdcan_frequency = RCC_PLL_GetFreqDomain_48M(); + } + } + break; + + case LL_RCC_FDCAN_CLKSOURCE_PCLK1: /* PCLK1 clock used as FDCAN kernel clock */ + fdcan_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); + break; + + default: + fdcan_frequency = LL_RCC_PERIPH_FREQUENCY_NA; + break; + } + return fdcan_frequency; +} +#endif /* FDCAN1 */ + +/** + * @brief Return RNGx clock frequency + * @param RNGxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_RNG_CLKSOURCE + * @retval RNG clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI48) or PLL is not ready + * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected + */ +uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource) +{ + uint32_t rng_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_RNG_CLKSOURCE(RNGxSource)); + + /* RNGCLK clock frequency */ + switch (LL_RCC_GetRNGClockSource(RNGxSource)) + { + case LL_RCC_RNG_CLKSOURCE_PLL: /* PLL clock used as RNG clock source */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + rng_frequency = RCC_PLL_GetFreqDomain_48M(); + } + } + break; + + case LL_RCC_RNG_CLKSOURCE_HSI48: /* HSI48 used as RNG clock source */ + if (LL_RCC_HSI48_IsReady() != 0U) + { + rng_frequency = HSI48_VALUE; + } + break; + + default: + rng_frequency = LL_RCC_PERIPH_FREQUENCY_NA; + break; + + } + + return rng_frequency; +} + +/** + * @brief Return USBx clock frequency + * @param USBxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_USB_CLKSOURCE + * @retval USB clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI48) or PLL is not ready + * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected + */ +uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource) +{ + uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource)); + + /* USBCLK clock frequency */ + switch (LL_RCC_GetUSBClockSource(USBxSource)) + { + case LL_RCC_USB_CLKSOURCE_PLL: /* PLL clock used as USB clock source */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + usb_frequency = RCC_PLL_GetFreqDomain_48M(); + } + } + break; + + case LL_RCC_USB_CLKSOURCE_HSI48: /* HSI48 used as USB clock source */ + if (LL_RCC_HSI48_IsReady() != 0U) + { + usb_frequency = HSI48_VALUE; + } + break; + + default: + usb_frequency = LL_RCC_PERIPH_FREQUENCY_NA; + break; + } + + return usb_frequency; +} + +/** + * @brief Return ADCx clock frequency + * @param ADCxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_ADC12_CLKSOURCE + * @arg @ref LL_RCC_ADC345_CLKSOURCE (*) + * + * (*) value not defined in all devices. + * @retval ADC clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that PLL is not ready + * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected + */ +uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource) +{ + uint32_t adc_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_ADC_CLKSOURCE(ADCxSource)); + + if (ADCxSource == LL_RCC_ADC12_CLKSOURCE) + { + /* ADC12CLK clock frequency */ + switch (LL_RCC_GetADCClockSource(ADCxSource)) + { + case LL_RCC_ADC12_CLKSOURCE_PLL: /* PLL clock used as ADC12 clock source */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U) + { + adc_frequency = RCC_PLL_GetFreqDomain_ADC(); + } + } + break; + + case LL_RCC_ADC12_CLKSOURCE_SYSCLK: /* System clock used as ADC12 clock source */ + adc_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_ADC12_CLKSOURCE_NONE: /* No clock used as ADC12 clock source */ + default: + adc_frequency = LL_RCC_PERIPH_FREQUENCY_NA; + break; + } + } +#if defined(ADC345_COMMON) + else + { + /* ADC345CLK clock frequency */ + switch (LL_RCC_GetADCClockSource(ADCxSource)) + { + case LL_RCC_ADC345_CLKSOURCE_PLL: /* PLL clock used as ADC345 clock source */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U) + { + adc_frequency = RCC_PLL_GetFreqDomain_ADC(); + } + } + break; + + case LL_RCC_ADC345_CLKSOURCE_SYSCLK: /* System clock used as ADC345 clock source */ + adc_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_ADC345_CLKSOURCE_NONE: /* No clock used as ADC345 clock source */ + default: + adc_frequency = LL_RCC_PERIPH_FREQUENCY_NA; + break; + } + } +#endif /* ADC345_COMMON */ + + return adc_frequency; +} + +#if defined(QUADSPI) +/** + * @brief Return QUADSPI clock frequency + * @param QUADSPIxSource This parameter can be one of the following values: + * @arg @ref LL_RCC_QUADSPI_CLKSOURCE + * @retval QUADSPI clock frequency (in Hz) + * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that no clock is configured + */ +uint32_t LL_RCC_GetQUADSPIClockFreq(uint32_t QUADSPIxSource) +{ + uint32_t quadspi_frequency = LL_RCC_PERIPH_FREQUENCY_NO; + + /* Check parameter */ + assert_param(IS_LL_RCC_QUADSPI_CLKSOURCE(QUADSPIxSource)); + + /* QUADSPI clock frequency */ + switch (LL_RCC_GetQUADSPIClockSource(QUADSPIxSource)) + { + case LL_RCC_QUADSPI_CLKSOURCE_SYSCLK: /* SYSCLK used as QUADSPI source */ + quadspi_frequency = RCC_GetSystemClockFreq(); + break; + + case LL_RCC_QUADSPI_CLKSOURCE_HSI: /* HSI clock used as QUADSPI source */ + if (LL_RCC_HSI_IsReady() != 0U) + { + quadspi_frequency = HSI_VALUE; + } + break; + + case LL_RCC_QUADSPI_CLKSOURCE_PLL: /* PLL clock used as QUADSPI source */ + if (LL_RCC_PLL_IsReady() != 0U) + { + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + quadspi_frequency = RCC_PLL_GetFreqDomain_48M(); + } + } + break; + + default: + /* Nothing to do: quadspi frequency already initilalized to LL_RCC_PERIPH_FREQUENCY_NO */ + break; + } + + return quadspi_frequency; +} +#endif /* QUADSPI */ + +/** + * @} + */ + +/** + * @} + */ + +/** @addtogroup RCC_LL_Private_Functions + * @{ + */ + +/** + * @brief Return SYSTEM clock frequency + * @retval SYSTEM clock frequency (in Hz) + */ +static uint32_t RCC_GetSystemClockFreq(void) +{ + uint32_t frequency; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (LL_RCC_GetSysClkSource()) + { + case LL_RCC_SYS_CLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ + frequency = HSI_VALUE; + break; + + case LL_RCC_SYS_CLKSOURCE_STATUS_HSE: /* HSE used as system clock source */ + frequency = HSE_VALUE; + break; + + case LL_RCC_SYS_CLKSOURCE_STATUS_PLL: /* PLL used as system clock source */ + frequency = RCC_PLL_GetFreqDomain_SYS(); + break; + + default: + frequency = HSI_VALUE; + break; + } + + return frequency; +} + +/** + * @brief Return HCLK clock frequency + * @param SYSCLK_Frequency SYSCLK clock frequency + * @retval HCLK clock frequency (in Hz) + */ +static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency) +{ + /* HCLK clock frequency */ + return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler()); +} + +/** + * @brief Return PCLK1 clock frequency + * @param HCLK_Frequency HCLK clock frequency + * @retval PCLK1 clock frequency (in Hz) + */ +static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency) +{ + /* PCLK1 clock frequency */ + return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler()); +} + +/** + * @brief Return PCLK2 clock frequency + * @param HCLK_Frequency HCLK clock frequency + * @retval PCLK2 clock frequency (in Hz) + */ +static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency) +{ + /* PCLK2 clock frequency */ + return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler()); +} + +/** + * @brief Return PLL clock frequency used for system domain + * @retval PLL clock frequency (in Hz) + */ +static uint32_t RCC_PLL_GetFreqDomain_SYS(void) +{ + uint32_t pllinputfreq, pllsource; + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = LL_RCC_PLL_GetMainSource(); + + switch (pllsource) + { + case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ + pllinputfreq = HSI_VALUE; + break; + + case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ + pllinputfreq = HSE_VALUE; + break; + + default: + pllinputfreq = HSI_VALUE; + break; + } + return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(), + LL_RCC_PLL_GetN(), LL_RCC_PLL_GetR()); +} + +/** + * @brief Return PLL clock frequency used for ADC domain + * @retval PLL clock frequency (in Hz) + */ +static uint32_t RCC_PLL_GetFreqDomain_ADC(void) +{ + uint32_t pllinputfreq, pllsource; + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + ADC Domain clock = PLL_VCO / PLLP + */ + pllsource = LL_RCC_PLL_GetMainSource(); + + switch (pllsource) + { + case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ + pllinputfreq = HSI_VALUE; + break; + + case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ + pllinputfreq = HSE_VALUE; + break; + + default: + pllinputfreq = HSI_VALUE; + break; + } + return __LL_RCC_CALC_PLLCLK_ADC_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(), + LL_RCC_PLL_GetN(), LL_RCC_PLL_GetP()); +} + +/** + * @brief Return PLL clock frequency used for 48 MHz domain + * @retval PLL clock frequency (in Hz) + */ +static uint32_t RCC_PLL_GetFreqDomain_48M(void) +{ + uint32_t pllinputfreq, pllsource; + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + 48M Domain clock = PLL_VCO / PLLQ + */ + pllsource = LL_RCC_PLL_GetMainSource(); + + switch (pllsource) + { + case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ + pllinputfreq = HSI_VALUE; + break; + + case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ + pllinputfreq = HSE_VALUE; + break; + + default: + pllinputfreq = HSI_VALUE; + break; + } + return __LL_RCC_CALC_PLLCLK_48M_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(), + LL_RCC_PLL_GetN(), LL_RCC_PLL_GetQ()); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* USE_FULL_LL_DRIVER */ + diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c new file mode 100644 index 0000000..d971b05 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c @@ -0,0 +1,708 @@ +/** + ****************************************************************************** + * @file stm32g4xx_ll_utils.c + * @author MCD Application Team + * @brief UTILS LL module driver. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_ll_utils.h" +#include "stm32g4xx_ll_rcc.h" +#include "stm32g4xx_ll_system.h" +#include "stm32g4xx_ll_pwr.h" +#ifdef USE_FULL_ASSERT +#include "stm32_assert.h" +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +/** @addtogroup STM32G4xx_LL_Driver + * @{ + */ + +/** @addtogroup UTILS_LL + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/** @addtogroup UTILS_LL_Private_Constants + * @{ + */ +#define UTILS_MAX_FREQUENCY_SCALE1 170000000U /*!< Maximum frequency for system clock at power scale1, in Hz */ +#define UTILS_MAX_FREQUENCY_SCALE2 26000000U /*!< Maximum frequency for system clock at power scale2, in Hz */ + +/* Defines used for PLL range */ +#define UTILS_PLLVCO_INPUT_MIN 2660000U /*!< Frequency min for PLLVCO input, in Hz */ +#define UTILS_PLLVCO_INPUT_MAX 16000000U /*!< Frequency max for PLLVCO input, in Hz */ +#define UTILS_PLLVCO_OUTPUT_MIN 64000000U /*!< Frequency min for PLLVCO output, in Hz */ +#define UTILS_PLLVCO_OUTPUT_MAX 344000000U /*!< Frequency max for PLLVCO output, in Hz */ + +/* Defines used for HSE range */ +#define UTILS_HSE_FREQUENCY_MIN 4000000U /*!< Frequency min for HSE frequency, in Hz */ +#define UTILS_HSE_FREQUENCY_MAX 48000000U /*!< Frequency max for HSE frequency, in Hz */ + +/* Defines used for FLASH latency according to HCLK Frequency */ +#define UTILS_SCALE1_LATENCY1_BOOST_FREQ 34000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 1 */ +#define UTILS_SCALE1_LATENCY2_BOOST_FREQ 68000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 1 */ +#define UTILS_SCALE1_LATENCY3_BOOST_FREQ 102000000U /*!< HCLK frequency to set FLASH latency 3 in power scale 1 */ +#define UTILS_SCALE1_LATENCY4_BOOST_FREQ 136000000U /*!< HCLK frequency to set FLASH latency 4 in power scale 1 */ +#define UTILS_SCALE1_LATENCY5_BOOST_FREQ 170000000U /*!< HCLK frequency to set FLASH latency 5 in power scale 1 */ + +#define UTILS_SCALE1_LATENCY1_FREQ 30000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 1 normal mode */ +#define UTILS_SCALE1_LATENCY2_FREQ 60000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 1 normal mode */ +#define UTILS_SCALE1_LATENCY3_FREQ 90000000U /*!< HCLK frequency to set FLASH latency 3 in power scale 1 normal mode */ +#define UTILS_SCALE1_LATENCY4_FREQ 120000000U /*!< HCLK frequency to set FLASH latency 4 in power scale 1 normal mode */ +#define UTILS_SCALE1_LATENCY5_FREQ 150000000U /*!< HCLK frequency to set FLASH latency 5 in power scale 1 normal mode */ + +#define UTILS_SCALE2_LATENCY1_FREQ 12000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 2 */ +#define UTILS_SCALE2_LATENCY2_FREQ 24000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 2 */ +#define UTILS_SCALE2_LATENCY3_FREQ 26000000U /*!< HCLK frequency to set FLASH latency 3 in power scale 2 */ +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup UTILS_LL_Private_Macros + * @{ + */ +#define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ + || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) + +#define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ + || ((__VALUE__) == LL_RCC_APB1_DIV_2) \ + || ((__VALUE__) == LL_RCC_APB1_DIV_4) \ + || ((__VALUE__) == LL_RCC_APB1_DIV_8) \ + || ((__VALUE__) == LL_RCC_APB1_DIV_16)) + +#define IS_LL_UTILS_APB2_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB2_DIV_1) \ + || ((__VALUE__) == LL_RCC_APB2_DIV_2) \ + || ((__VALUE__) == LL_RCC_APB2_DIV_4) \ + || ((__VALUE__) == LL_RCC_APB2_DIV_8) \ + || ((__VALUE__) == LL_RCC_APB2_DIV_16)) + +#define IS_LL_UTILS_PLLM_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLLM_DIV_1) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_2) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_3) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_4) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_5) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_6) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_7) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_8) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_9) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_10) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_11) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_12) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_13) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_14) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_15) \ + || ((__VALUE__) == LL_RCC_PLLM_DIV_16)) + +#define IS_LL_UTILS_PLLN_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 127U)) + +#define IS_LL_UTILS_PLLR_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLLR_DIV_2) \ + || ((__VALUE__) == LL_RCC_PLLR_DIV_4) \ + || ((__VALUE__) == LL_RCC_PLLR_DIV_6) \ + || ((__VALUE__) == LL_RCC_PLLR_DIV_8)) + +#define IS_LL_UTILS_PLLVCO_INPUT(__VALUE__) ((UTILS_PLLVCO_INPUT_MIN <= (__VALUE__)) && ((__VALUE__) <= UTILS_PLLVCO_INPUT_MAX)) + +#define IS_LL_UTILS_PLLVCO_OUTPUT(__VALUE__) ((UTILS_PLLVCO_OUTPUT_MIN <= (__VALUE__)) && ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_MAX)) + +#define IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1) ? ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE1) : \ + ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE2)) + +#define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \ + || ((__STATE__) == LL_UTILS_HSEBYPASS_OFF)) + +#define IS_LL_UTILS_HSE_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) >= UTILS_HSE_FREQUENCY_MIN) && ((__FREQUENCY__) <= UTILS_HSE_FREQUENCY_MAX)) +/** + * @} + */ +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup UTILS_LL_Private_Functions UTILS Private functions + * @{ + */ +static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, + LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct); +static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); +static ErrorStatus UTILS_PLL_IsBusy(void); +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup UTILS_LL_Exported_Functions + * @{ + */ + +/** @addtogroup UTILS_LL_EF_DELAY + * @{ + */ + +/** + * @brief This function configures the Cortex-M SysTick source to have 1ms time base. + * @note When a RTOS is used, it is recommended to avoid changing the Systick + * configuration by calling this function, for a delay use rather osDelay RTOS service. + * @param HCLKFrequency HCLK frequency in Hz + * @note HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq + * @retval None + */ +void LL_Init1msTick(uint32_t HCLKFrequency) +{ + /* Use frequency provided in argument */ + LL_InitTick(HCLKFrequency, 1000U); +} + +/** + * @brief This function provides accurate delay (in milliseconds) based + * on SysTick counter flag + * @note When a RTOS is used, it is recommended to avoid using blocking delay + * and use rather osDelay service. + * @note To respect 1ms timebase, user should call @ref LL_Init1msTick function which + * will configure Systick to 1ms + * @param Delay specifies the delay time length, in milliseconds. + * @retval None + */ +void LL_mDelay(uint32_t Delay) +{ + __IO uint32_t tmp = SysTick->CTRL; /* Clear the COUNTFLAG first */ + uint32_t tmpDelay; /* MISRAC2012-Rule-17.8 */ + /* Add this code to indicate that local variable is not used */ + ((void)tmp); + tmpDelay = Delay; + /* Add a period to guaranty minimum wait */ + if(tmpDelay < LL_MAX_DELAY) + { + tmpDelay++; + } + + while (tmpDelay != 0U) + { + if((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U) + { + tmpDelay--; + } + } +} + +/** + * @} + */ + +/** @addtogroup UTILS_EF_SYSTEM + * @brief System Configuration functions + * + @verbatim + =============================================================================== + ##### System Configuration functions ##### + =============================================================================== + [..] + System, AHB and APB buses clocks configuration + + (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is + 170000000 Hz for STM32G4xx. + @endverbatim + @internal + Depending on the device voltage range, the maximum frequency should be + adapted accordingly: + + +----------------------------------------------------------------------------+ + | Latency | HCLK clock frequency (MHz) | + | |----------------------------------------------------------| + | | voltage range 1 | voltage range 1 | voltage range 2 | + | | boost mode 1.28 V | normal mode 1.2 V | 1.0 V | + |-----------------|-------------------|-------------------|------------------| + |0WS(1 CPU cycles)| HCLK <= 34 | HCLK <= 30 | HCLK <= 12 | + |-----------------|-------------------|-------------------|------------------| + |1WS(2 CPU cycles)| HCLK <= 68 | HCLK <= 60 | HCLK <= 24 | + |-----------------|-------------------|-------------------|------------------| + |2WS(3 CPU cycles)| HCLK <= 102 | HCLK <= 90 | HCLK <= 26 | + |-----------------|-------------------|-------------------|------------------| + |3WS(4 CPU cycles)| HCLK <= 136 | HCLK <= 120 | - | + |-----------------|-------------------|-------------------|------------------| + |4WS(5 CPU cycles)| HCLK <= 170 | HCLK <= 150 | - | + +----------------------------------------------------------------------------+ + + + @endinternal + * @{ + */ + +/** + * @brief This function sets directly SystemCoreClock CMSIS variable. + * @note Variable can be calculated also through SystemCoreClockUpdate function. + * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) + * @retval None + */ +void LL_SetSystemCoreClock(uint32_t HCLKFrequency) +{ + /* HCLK clock frequency */ + SystemCoreClock = HCLKFrequency; +} + +/** + * @brief Update number of Flash wait states in line with new frequency and current + voltage range. + * @param HCLKFrequency HCLK frequency + * @retval An ErrorStatus enumeration value: + * - SUCCESS: Latency has been modified + * - ERROR: Latency cannot be modified + */ +ErrorStatus LL_SetFlashLatency(uint32_t HCLKFrequency) +{ + uint32_t timeout; + uint32_t getlatency; + ErrorStatus status = SUCCESS; + uint32_t regulatorstatus = LL_PWR_GetRegulVoltageScaling(); + uint32_t regulatorbooststatus = LL_PWR_IsEnabledRange1BoostMode(); + + uint32_t latency = LL_FLASH_LATENCY_0; /* default value 0WS */ + + /* Frequency cannot be equal to 0 or greater than max clock */ + if((HCLKFrequency == 0U) || (HCLKFrequency > UTILS_SCALE1_LATENCY5_BOOST_FREQ)) + { + status = ERROR; + } + else + { + if((regulatorstatus == LL_PWR_REGU_VOLTAGE_SCALE1) && (regulatorbooststatus == 1U)) + { + if(HCLKFrequency > UTILS_SCALE1_LATENCY4_BOOST_FREQ) + { + /* 136 < HCLK <= 170 => 4WS (5 CPU cycles) */ + latency = LL_FLASH_LATENCY_4; + } + else if(HCLKFrequency > UTILS_SCALE1_LATENCY3_BOOST_FREQ) + { + /* 102 < HCLK <= 136 => 3WS (4 CPU cycles) */ + latency = LL_FLASH_LATENCY_3; + } + else if(HCLKFrequency > UTILS_SCALE1_LATENCY2_BOOST_FREQ) + { + /* 68 < HCLK <= 102 => 2WS (3 CPU cycles) */ + latency = LL_FLASH_LATENCY_2; + } + else + { + if(HCLKFrequency > UTILS_SCALE1_LATENCY1_BOOST_FREQ) + { + /* 34 < HCLK <= 68 => 1WS (2 CPU cycles) */ + latency = LL_FLASH_LATENCY_1; + } + /* else HCLKFrequency <= 10MHz default LL_FLASH_LATENCY_0 0WS */ + } + } + /* SCALE1 normal mode*/ + else if(regulatorstatus == LL_PWR_REGU_VOLTAGE_SCALE1) + { + if(HCLKFrequency > UTILS_SCALE1_LATENCY4_FREQ) + { + /* 120 < HCLK <= 150 => 4WS (5 CPU cycles) */ + latency = LL_FLASH_LATENCY_4; + } + else if(HCLKFrequency > UTILS_SCALE1_LATENCY3_FREQ) + { + /* 90 < HCLK <= 120 => 3WS (4 CPU cycles) */ + latency = LL_FLASH_LATENCY_3; + } + else if(HCLKFrequency > UTILS_SCALE1_LATENCY2_FREQ) + { + /* 60 < HCLK <= 90 => 2WS (3 CPU cycles) */ + latency = LL_FLASH_LATENCY_2; + } + else + { + if(HCLKFrequency > UTILS_SCALE1_LATENCY1_FREQ) + { + /* 30 < HCLK <= 60 => 1WS (2 CPU cycles) */ + latency = LL_FLASH_LATENCY_1; + } + /* else HCLKFrequency <= 10MHz default LL_FLASH_LATENCY_0 0WS */ + } + } + /* SCALE2 */ + else if(regulatorstatus == LL_PWR_REGU_VOLTAGE_SCALE2) + { + if(HCLKFrequency > UTILS_SCALE2_LATENCY2_FREQ) + { + /* 24 < HCLK <= 26 => 2WS (3 CPU cycles) */ + latency = LL_FLASH_LATENCY_2; + } + else + { + if(HCLKFrequency > UTILS_SCALE2_LATENCY1_FREQ) + { + /* 12 < HCLK <= 24 => 1WS (2 CPU cycles) */ + latency = LL_FLASH_LATENCY_1; + } + /* else HCLKFrequency <= 8MHz default LL_FLASH_LATENCY_0 0WS */ + } + } + else + { + /* Nothing to do */ + } + + if (status != ERROR) + { + LL_FLASH_SetLatency(latency); + + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + timeout = 2U; + do + { + /* Wait for Flash latency to be updated */ + getlatency = LL_FLASH_GetLatency(); + timeout--; + } while ((getlatency != latency) && (timeout > 0U)); + + if(getlatency != latency) + { + status = ERROR; + } + } + } + + return status; +} + +/** + * @brief This function configures system clock at maximum frequency with HSI as clock source of the PLL + * @note The application need to ensure that PLL is disabled. + * @note Function is based on the following formula: + * - PLL output frequency = (((HSI frequency / PLLM) * PLLN) / PLLR) + * - PLLM: ensure that the VCO input frequency ranges from 2.66 to 8 MHz (PLLVCO_input = HSI frequency / PLLM) + * - PLLN: ensure that the VCO output frequency is between 64 and 344 MHz (PLLVCO_output = PLLVCO_input * PLLN) + * - PLLR: ensure that max frequency at 170000000 Hz is reach (PLLVCO_output / PLLR) + * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains + * the configuration information for the PLL. + * @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains + * the configuration information for the BUS prescalers. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: Max frequency configuration done + * - ERROR: Max frequency configuration not done + */ +ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, + LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) +{ + ErrorStatus status; + uint32_t pllfreq; + uint32_t hpre = LL_RCC_SYSCLK_DIV_1; + + /* Check if one of the PLL is enabled */ + if(UTILS_PLL_IsBusy() == SUCCESS) + { + /* Calculate the new PLL output frequency */ + pllfreq = UTILS_GetPLLOutputFrequency(HSI_VALUE, UTILS_PLLInitStruct); + + /* Enable HSI if not enabled */ + if(LL_RCC_HSI_IsReady() != 1U) + { + LL_RCC_HSI_Enable(); + while (LL_RCC_HSI_IsReady() != 1U) + { + /* Wait for HSI ready */ + } + } + + /* Configure PLL */ + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, UTILS_PLLInitStruct->PLLM, UTILS_PLLInitStruct->PLLN, + UTILS_PLLInitStruct->PLLR); + + /* Prevent undershoot at highest frequency by applying intermediate AHB prescaler 2 */ + if(pllfreq > 80000000U) + { + if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) + { + UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; + hpre = LL_RCC_SYSCLK_DIV_2; + } + } + + /* Enable PLL and switch system clock to PLL */ + status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct); + + /* Apply definitive AHB prescaler value if necessary */ + if ((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) + { + /* Set FLASH latency to highest latency */ + status = LL_SetFlashLatency(pllfreq); + if (status == SUCCESS) + { + UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; + LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); + LL_SetSystemCoreClock(pllfreq); + } + } + } + else + { + /* Current PLL configuration cannot be modified */ + status = ERROR; + } + + return status; +} + +/** + * @brief This function configures system clock with HSE as clock source of the PLL + * @note The application need to ensure that PLL is disabled. + * @note Function is based on the following formula: + * - PLL output frequency = (((HSE frequency / PLLM) * PLLN) / PLLR) + * - PLLM: ensure that the VCO input frequency ranges from 2.66 to 8 MHz (PLLVCO_input = HSE frequency / PLLM) + * - PLLN: ensure that the VCO output frequency is between 64 and 344 MHz (PLLVCO_output = PLLVCO_input * PLLN) + * - PLLR: ensure that max frequency at 170000000 Hz is reached (PLLVCO_output / PLLR) + * @param HSEFrequency Value between Min_Data = 4000000 and Max_Data = 48000000 + * @param HSEBypass This parameter can be one of the following values: + * @arg @ref LL_UTILS_HSEBYPASS_ON + * @arg @ref LL_UTILS_HSEBYPASS_OFF + * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains + * the configuration information for the PLL. + * @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains + * the configuration information for the BUS prescalers. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: Max frequency configuration done + * - ERROR: Max frequency configuration not done + */ +ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, + LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) +{ + ErrorStatus status; + uint32_t pllfreq; + uint32_t hpre = LL_RCC_SYSCLK_DIV_1; + + /* Check the parameters */ + assert_param(IS_LL_UTILS_HSE_FREQUENCY(HSEFrequency)); + assert_param(IS_LL_UTILS_HSE_BYPASS(HSEBypass)); + + /* Check if one of the PLL is enabled */ + if(UTILS_PLL_IsBusy() == SUCCESS) + { + /* Calculate the new PLL output frequency */ + pllfreq = UTILS_GetPLLOutputFrequency(HSEFrequency, UTILS_PLLInitStruct); + + /* Enable HSE if not enabled */ + if(LL_RCC_HSE_IsReady() != 1U) + { + /* Check if need to enable HSE bypass feature or not */ + if(HSEBypass == LL_UTILS_HSEBYPASS_ON) + { + LL_RCC_HSE_EnableBypass(); + } + else + { + LL_RCC_HSE_DisableBypass(); + } + + /* Enable HSE */ + LL_RCC_HSE_Enable(); + while (LL_RCC_HSE_IsReady() != 1U) + { + /* Wait for HSE ready */ + } + } + + /* Configure PLL */ + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, UTILS_PLLInitStruct->PLLM, UTILS_PLLInitStruct->PLLN, + UTILS_PLLInitStruct->PLLR); + + /* Prevent undershoot at highest frequency by applying intermediate AHB prescaler 2 */ + if(pllfreq > 80000000U) + { + if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) + { + UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; + hpre = LL_RCC_SYSCLK_DIV_2; + } + } + + /* Enable PLL and switch system clock to PLL */ + status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct); + + /* Apply definitive AHB prescaler value if necessary */ + if ((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) + { + /* Set FLASH latency to highest latency */ + status = LL_SetFlashLatency(pllfreq); + if (status == SUCCESS) + { + UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; + LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); + LL_SetSystemCoreClock(pllfreq); + } + } + } + else + { + /* Current PLL configuration cannot be modified */ + status = ERROR; + } + + return status; +} + +/** + * @} + */ + +/** + * @} + */ + +/** @addtogroup UTILS_LL_Private_Functions + * @{ + */ + +/** + * @brief Function to check that PLL can be modified + * @param PLL_InputFrequency PLL input frequency (in Hz) + * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains + * the configuration information for the PLL. + * @retval PLL output frequency (in Hz) + */ +static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct) +{ + uint32_t pllfreq; + + /* Check the parameters */ + assert_param(IS_LL_UTILS_PLLM_VALUE(UTILS_PLLInitStruct->PLLM)); + assert_param(IS_LL_UTILS_PLLN_VALUE(UTILS_PLLInitStruct->PLLN)); + assert_param(IS_LL_UTILS_PLLR_VALUE(UTILS_PLLInitStruct->PLLR)); + + /* Check different PLL parameters according to RM */ + /* - PLLM: ensure that the VCO input frequency ranges from 2.66 to 8 MHz. */ + pllfreq = PLL_InputFrequency / (((UTILS_PLLInitStruct->PLLM >> RCC_PLLCFGR_PLLM_Pos) + 1U)); + assert_param(IS_LL_UTILS_PLLVCO_INPUT(pllfreq)); + + /* - PLLN: ensure that the VCO output frequency is between 64 and 344 MHz.*/ + pllfreq = pllfreq * (UTILS_PLLInitStruct->PLLN & (RCC_PLLCFGR_PLLN >> RCC_PLLCFGR_PLLN_Pos)); + assert_param(IS_LL_UTILS_PLLVCO_OUTPUT(pllfreq)); + + /* - PLLR: ensure that max frequency at 170000000 Hz is reached */ + pllfreq = pllfreq / (((UTILS_PLLInitStruct->PLLR >> RCC_PLLCFGR_PLLR_Pos) + 1U) * 2U); + assert_param(IS_LL_UTILS_PLL_FREQUENCY(pllfreq)); + + return pllfreq; +} + +/** + * @brief Function to check that PLL can be modified + * @retval An ErrorStatus enumeration value: + * - SUCCESS: PLL modification can be done + * - ERROR: PLL is busy + */ +static ErrorStatus UTILS_PLL_IsBusy(void) +{ + ErrorStatus status = SUCCESS; + + /* Check if PLL is busy*/ + if(LL_RCC_PLL_IsReady() != 0U) + { + /* PLL configuration cannot be modified */ + status = ERROR; + } + + return status; +} + +/** + * @brief Function to enable PLL and switch system clock to PLL + * @param SYSCLK_Frequency SYSCLK frequency + * @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains + * the configuration information for the BUS prescalers. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: No problem to switch system to PLL + * - ERROR: Problem to switch system to PLL + */ +static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) +{ + ErrorStatus status = SUCCESS; + uint32_t hclk_frequency; + + assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); + assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); + assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); + + /* Calculate HCLK frequency */ + hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); + + /* Increasing the number of wait states because of higher CPU frequency */ + if(SystemCoreClock < hclk_frequency) + { + /* Set FLASH latency to highest latency */ + status = LL_SetFlashLatency(hclk_frequency); + } + + /* Update system clock configuration */ + if(status == SUCCESS) + { + /* Enable PLL */ + LL_RCC_PLL_Enable(); + LL_RCC_PLL_EnableDomain_SYS(); + while (LL_RCC_PLL_IsReady() != 1U) + { + /* Wait for PLL ready */ + } + + /* Sysclk activation on the main PLL */ + LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + /* Wait for system clock switch to PLL */ + } + + /* Set APB1 & APB2 prescaler*/ + LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); + LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); + } + + /* Decreasing the number of wait states because of lower CPU frequency */ + if(SystemCoreClock > hclk_frequency) + { + /* Set FLASH latency to lowest latency */ + status = LL_SetFlashLatency(hclk_frequency); + } + + /* Update SystemCoreClock variable */ + if(status == SUCCESS) + { + LL_SetSystemCoreClock(hclk_frequency); + } + + return status; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + diff --git a/hw/STM32F030R8/linker.ld b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RETX_FLASH.ld similarity index 90% rename from hw/STM32F030R8/linker.ld rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RETX_FLASH.ld index ebee562..c60ec4a 100644 --- a/hw/STM32F030R8/linker.ld +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RETX_FLASH.ld @@ -5,9 +5,9 @@ ** ** @author : Auto-generated by STM32CubeIDE ** -** @brief : Linker script for STM32F030R8Tx Device from STM32F0 series -** 64Kbytes FLASH -** 8Kbytes RAM +** Abstract : Linker script for NUCLEO-G474RE Board embedding STM32G474RETx Device from stm32g4 series +** 512KBytes FLASH +** 128KBytes RAM ** ** Set heap size, stack size and stack location according ** to application requirements. @@ -22,7 +22,7 @@ ****************************************************************************** ** @attention ** -** Copyright (c) 2022 STMicroelectronics. +** Copyright (c) 2024 STMicroelectronics. ** All rights reserved. ** ** This software is licensed under terms that can be found in the LICENSE file @@ -38,14 +38,14 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ -_Min_Heap_Size = 0x200 ; /* required amount of heap */ -_Min_Stack_Size = 0x400 ; /* required amount of stack */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K } /* Sections */ diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RETX_RAM.ld b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RETX_RAM.ld new file mode 100644 index 0000000..1d189db --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RETX_RAM.ld @@ -0,0 +1,185 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld (debug in RAM dedicated) +** +** @author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-G474RE Board embedding STM32G474RETx Device from stm32g4 series +** 512KBytes FLASH +** 128KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2024 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "RAM" Ram type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >RAM + + /* The program code and other data into "RAM" Ram type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >RAM + + /* Constant data into "RAM" Ram type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >RAM + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >RAM + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >RAM + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >RAM + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >RAM + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >RAM + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RE_NUCLEO_CUBE_IDE.ioc b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RE_NUCLEO_CUBE_IDE.ioc new file mode 100644 index 0000000..b78a480 --- /dev/null +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/STM32G474RE_NUCLEO_CUBE_IDE.ioc @@ -0,0 +1,222 @@ +#MicroXplorer Configuration settings - do not modify +CAD.formats= +CAD.pinconfig= +CAD.provider= +File.Version=6 +KeepUserPlacement=false +LPUART1.BaudRate=115200 +LPUART1.IPParameters=BaudRate,WordLength +LPUART1.WordLength=UART_WORDLENGTH_8B +Mcu.CPN=STM32G474RET6 +Mcu.Family=STM32G4 +Mcu.IP0=LPUART1 +Mcu.IP1=NVIC +Mcu.IP2=RCC +Mcu.IP3=SYS +Mcu.IPNb=4 +Mcu.Name=STM32G474R(B-C-E)Tx +Mcu.Package=LQFP64 +Mcu.Pin0=PC13 +Mcu.Pin1=PC14-OSC32_IN +Mcu.Pin10=PA8 +Mcu.Pin11=PA9 +Mcu.Pin12=PA13 +Mcu.Pin13=PA14 +Mcu.Pin14=PB3 +Mcu.Pin15=PB4 +Mcu.Pin16=PB5 +Mcu.Pin17=PB6 +Mcu.Pin18=VP_SYS_VS_Systick +Mcu.Pin19=VP_SYS_VS_DBSignals +Mcu.Pin2=PC15-OSC32_OUT +Mcu.Pin3=PF0-OSC_IN +Mcu.Pin4=PF1-OSC_OUT +Mcu.Pin5=PA2 +Mcu.Pin6=PA3 +Mcu.Pin7=PA5 +Mcu.Pin8=PB10 +Mcu.Pin9=PC7 +Mcu.PinsNb=20 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32G474RETx +MxCube.Version=6.9.1 +MxDb.Version=DB.6.0.91 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +PA13.GPIOParameters=GPIO_Label +PA13.GPIO_Label=T_SWDIO +PA13.Locked=true +PA13.Mode=Serial_Wire +PA13.Signal=SYS_JTMS-SWDIO +PA14.GPIOParameters=GPIO_Label +PA14.GPIO_Label=T_SWCLK +PA14.Locked=true +PA14.Mode=Serial_Wire +PA14.Signal=SYS_JTCK-SWCLK +PA2.GPIOParameters=GPIO_Label +PA2.GPIO_Label=LPUART1_TX [STLINKV3E_VCP_RX] +PA2.Locked=true +PA2.Mode=Asynchronous +PA2.Signal=LPUART1_TX +PA3.GPIOParameters=GPIO_Label +PA3.GPIO_Label=LPUART1_RX [STLINKV3E_VCP_TX] +PA3.Locked=true +PA3.Mode=Asynchronous +PA3.Signal=LPUART1_RX +PA5.GPIOParameters=GPIO_Label +PA5.GPIO_Label=LD2 [green led] +PA5.Locked=true +PA5.Signal=GPIO_Output +PA8.GPIOParameters=GPIO_Label +PA8.GPIO_Label=LCD_D7 +PA8.Locked=true +PA8.Signal=GPIO_Output +PA9.GPIOParameters=GPIO_Label +PA9.GPIO_Label=LCD_RS +PA9.Locked=true +PA9.Signal=GPIO_Output +PB10.GPIOParameters=GPIO_Label +PB10.GPIO_Label=LCD_D6 +PB10.Locked=true +PB10.Signal=GPIO_Output +PB3.GPIOParameters=GPIO_Label +PB3.GPIO_Label=T_SWO +PB3.Locked=true +PB3.Signal=SYS_JTDO-SWO +PB4.GPIOParameters=GPIO_Label +PB4.GPIO_Label=LCD_D5 +PB4.Locked=true +PB4.Signal=GPIO_Output +PB5.GPIOParameters=GPIO_Label +PB5.GPIO_Label=LCD_D4 +PB5.Locked=true +PB5.Signal=GPIO_Output +PB6.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP +PB6.GPIO_Label=LCD_BCKL +PB6.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP +PB6.GPIO_PuPd=GPIO_NOPULL +PB6.Locked=true +PB6.PinState=GPIO_PIN_RESET +PB6.Signal=GPIO_Output +PC13.GPIOParameters=GPIO_Label +PC13.GPIO_Label=B1 [blue push button] +PC13.Locked=true +PC13.Signal=GPXTI13 +PC14-OSC32_IN.Locked=true +PC14-OSC32_IN.Mode=LSE-External-Oscillator +PC14-OSC32_IN.Signal=RCC_OSC32_IN +PC15-OSC32_OUT.Locked=true +PC15-OSC32_OUT.Mode=LSE-External-Oscillator +PC15-OSC32_OUT.Signal=RCC_OSC32_OUT +PC7.GPIOParameters=GPIO_Label +PC7.GPIO_Label=LCD_E +PC7.Locked=true +PC7.Signal=GPIO_Output +PF0-OSC_IN.Locked=true +PF0-OSC_IN.Mode=HSE-External-Oscillator +PF0-OSC_IN.Signal=RCC_OSC_IN +PF1-OSC_OUT.Locked=true +PF1-OSC_OUT.Mode=HSE-External-Oscillator +PF1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32G474RETx +ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.5.2 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=1 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=STM32G474RE_NUCLEO_CUBE_IDE.ioc +ProjectManager.ProjectName=STM32G474RE_NUCLEO_CUBE_IDE +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=STM32CubeIDE +ProjectManager.ToolChainLocation= +ProjectManager.UAScriptAfterPath= +ProjectManager.UAScriptBeforePath= +ProjectManager.UnderRoot=true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_LPUART1_UART_Init-LPUART1-false-LL-true +RCC.ADC12Freq_Value=96000000 +RCC.ADC345Freq_Value=96000000 +RCC.AHBFreq_Value=96000000 +RCC.APB1CLKDivider=RCC_HCLK_DIV4 +RCC.APB1Freq_Value=24000000 +RCC.APB1TimFreq_Value=48000000 +RCC.APB2Freq_Value=96000000 +RCC.APB2TimFreq_Value=96000000 +RCC.CRSFreq_Value=48000000 +RCC.CortexFreq_Value=96000000 +RCC.EXTERNAL_CLOCK_VALUE=12288000 +RCC.FCLKCortexFreq_Value=96000000 +RCC.FDCANFreq_Value=24000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=96000000 +RCC.HRTIM1Freq_Value=96000000 +RCC.HSE_VALUE=24000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=24000000 +RCC.I2C2Freq_Value=24000000 +RCC.I2C3Freq_Value=24000000 +RCC.I2C4Freq_Value=24000000 +RCC.I2SFreq_Value=96000000 +RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value +RCC.LPTIM1Freq_Value=24000000 +RCC.LPUART1Freq_Value=24000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=16000000 +RCC.PLLN=12 +RCC.PLLPoutputFreq_Value=96000000 +RCC.PLLQoutputFreq_Value=96000000 +RCC.PLLRCLKFreq_Value=96000000 +RCC.PWRFreq_Value=96000000 +RCC.QSPIFreq_Value=96000000 +RCC.RNGFreq_Value=96000000 +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE +RCC.RTCFreq_Value=32768 +RCC.SAI1Freq_Value=96000000 +RCC.SYSCLKFreq_VALUE=96000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.UART4Freq_Value=24000000 +RCC.UART5Freq_Value=24000000 +RCC.USART1Freq_Value=96000000 +RCC.USART2Freq_Value=24000000 +RCC.USART3Freq_Value=24000000 +RCC.USBFreq_Value=96000000 +RCC.VCOInputFreq_Value=16000000 +RCC.VCOOutputFreq_Value=192000000 +SH.GPXTI13.0=GPIO_EXTI13 +SH.GPXTI13.ConfNb=1 +VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals +VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=NUCLEO-G474RE +boardIOC=true +isbadioc=false diff --git a/hw/STM32F091RB/linker.ld b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/linker.ld similarity index 90% rename from hw/STM32F091RB/linker.ld rename to examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/linker.ld index bebc1b2..c60ec4a 100644 --- a/hw/STM32F091RB/linker.ld +++ b/examples/STM32G474RE_NUCLEO_CUBE_IDE_LL/linker.ld @@ -5,9 +5,9 @@ ** ** @author : Auto-generated by STM32CubeIDE ** -** @brief : Linker script for STM32F091RBTx Device from STM32F0 series -** 128Kbytes FLASH -** 32Kbytes RAM +** Abstract : Linker script for NUCLEO-G474RE Board embedding STM32G474RETx Device from stm32g4 series +** 512KBytes FLASH +** 128KBytes RAM ** ** Set heap size, stack size and stack location according ** to application requirements. @@ -22,7 +22,7 @@ ****************************************************************************** ** @attention ** -** Copyright (c) 2022 STMicroelectronics. +** Copyright (c) 2024 STMicroelectronics. ** All rights reserved. ** ** This software is licensed under terms that can be found in the LICENSE file @@ -38,14 +38,14 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ -_Min_Heap_Size = 0x200 ; /* required amount of heap */ -_Min_Stack_Size = 0x400 ; /* required amount of stack */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K } /* Sections */ diff --git a/hw/config/AVR/AVR_compiler_flags.cmake b/examples/config/AVR/AVR_compiler_flags.cmake similarity index 89% rename from hw/config/AVR/AVR_compiler_flags.cmake rename to examples/config/AVR/AVR_compiler_flags.cmake index 41bf2c5..3f53287 100644 --- a/hw/config/AVR/AVR_compiler_flags.cmake +++ b/examples/config/AVR/AVR_compiler_flags.cmake @@ -19,6 +19,8 @@ set(COMPILE_OPTIONS -fdata-sections -fno-split-wide-types -fno-tree-scev-cprop +-ffreestanding #flag required by util/delay.h + ) set(LD_FLAGS "-mmcu=${MMCU} -Wl,--gc-sections") set(CMAKE_EXE_LINKER_FLAGS "${LD_FLAGS}") \ No newline at end of file diff --git a/hw/config/AVR/Toolchain-AVR-gcc.cmake b/examples/config/AVR/Toolchain-AVR-gcc.cmake similarity index 95% rename from hw/config/AVR/Toolchain-AVR-gcc.cmake rename to examples/config/AVR/Toolchain-AVR-gcc.cmake index 29dded7..e48c5ea 100644 --- a/hw/config/AVR/Toolchain-AVR-gcc.cmake +++ b/examples/config/AVR/Toolchain-AVR-gcc.cmake @@ -96,12 +96,12 @@ add_custom_target( size ALL COMMAND ${CMAKE_SIZE} -C --mcu=${MMCU} --format=avr # check if programmer software is available find_program(AVR_Programmer avrdude) if(AVR_Programmer) - message(STATUS "AVR_Programmer avrdude was found, you can use defined targets: \r\n\tflash,\r\n\terase,\r\n\twrite_fuse,\r\n\tread_fuse\r\n\tread_flash.") + message(STATUS "AVR_Programmer avrdude was found, you can use defined targets: \r\n\tflash,\r\n\terase,\r\n\twrite_fuses,\r\n\tread_fuses\r\n\tread_flash.") else() message(STATUS "AVR_Programmer was not found.") endif() # Upload the firmware with avrdude -add_custom_target(flash avrdude -c ${PROG_TYPE} -p ${MMCU} -D -U flash:w:${CMAKE_SOURCE_DIR}/build/${hex_file}:i DEPENDS size erase) +add_custom_target(flash avrdude -c ${PROG_TYPE} -p ${MMCU} -D -U flash:w:${CMAKE_SOURCE_DIR}/Build/${hex_file}:i DEPENDS size erase) # Erase the chip via avrdude add_custom_target(erase avrdude -p ${MMCU} -c ${PROG_TYPE} -e) # Write AVR Fuses via avrdude diff --git a/hw/config/STM32/Toolchain-arm-gcc.cmake b/examples/config/STM32/Toolchain-arm-gcc.cmake similarity index 100% rename from hw/config/STM32/Toolchain-arm-gcc.cmake rename to examples/config/STM32/Toolchain-arm-gcc.cmake diff --git a/hw/config/STM32/compiler_flags.cmake b/examples/config/STM32/compiler_flags.cmake similarity index 87% rename from hw/config/STM32/compiler_flags.cmake rename to examples/config/STM32/compiler_flags.cmake index 16564b7..875db99 100644 --- a/hw/config/STM32/compiler_flags.cmake +++ b/examples/config/STM32/compiler_flags.cmake @@ -9,6 +9,13 @@ endif() # Hardware float support set(CORE_FLAGS "${CORE_FLAGS} -mfloat-abi=soft") +#enable showing compile diagnostic output colored (ninja require this opctions to show colored errors) +if ("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") + set(CORE_FLAGS "${CORE_FLAGS} -fdiagnostics-color=always") +elseif ("${CMAKE_C_COMPILER_ID}" STREQUAL "Clang") + set(CORE_FLAGS "${CORE_FLAGS} -fcolor-diagnostics") +endif() + # Use newlib-nano, links with libc_nano.a # set(CORE_FLAGS "${CORE_FLAGS} --specs=nano.specs") diff --git a/examples/doc/ARDUINO_UNO_R3.png b/examples/doc/ARDUINO_UNO_R3.png new file mode 100644 index 0000000..d73db58 Binary files /dev/null and b/examples/doc/ARDUINO_UNO_R3.png differ diff --git a/examples/doc/ARDUINO_UNO_R3_DataSheet.pdf b/examples/doc/ARDUINO_UNO_R3_DataSheet.pdf new file mode 100644 index 0000000..27a6354 Binary files /dev/null and b/examples/doc/ARDUINO_UNO_R3_DataSheet.pdf differ diff --git a/examples/doc/ARDUINO_UNO_R3_lcd_keypad shield_HW_connection.png b/examples/doc/ARDUINO_UNO_R3_lcd_keypad shield_HW_connection.png new file mode 100644 index 0000000..910162a Binary files /dev/null and b/examples/doc/ARDUINO_UNO_R3_lcd_keypad shield_HW_connection.png differ diff --git a/examples/doc/ESP8266_NodeMCU_V3.png b/examples/doc/ESP8266_NodeMCU_V3.png new file mode 100644 index 0000000..91fd81c Binary files /dev/null and b/examples/doc/ESP8266_NodeMCU_V3.png differ diff --git a/examples/doc/ESP8266_NodeMCU_V3_lcd_keypad shield_HW_connection.png b/examples/doc/ESP8266_NodeMCU_V3_lcd_keypad shield_HW_connection.png new file mode 100644 index 0000000..0ce228f Binary files /dev/null and b/examples/doc/ESP8266_NodeMCU_V3_lcd_keypad shield_HW_connection.png differ diff --git a/examples/doc/ESP_download_tool_setup.png b/examples/doc/ESP_download_tool_setup.png new file mode 100644 index 0000000..d1f2468 Binary files /dev/null and b/examples/doc/ESP_download_tool_setup.png differ diff --git a/examples/doc/LCDKeypad Shield_sch.pdf b/examples/doc/LCDKeypad Shield_sch.pdf new file mode 100644 index 0000000..a8013d5 Binary files /dev/null and b/examples/doc/LCDKeypad Shield_sch.pdf differ diff --git a/examples/doc/LCD_NUCLEO.pdf b/examples/doc/LCD_NUCLEO.pdf new file mode 100644 index 0000000..6111499 Binary files /dev/null and b/examples/doc/LCD_NUCLEO.pdf differ diff --git a/examples/doc/NucleoSTM32G071_lcd_keypad shield_HW_connection.png b/examples/doc/NucleoSTM32G071_lcd_keypad shield_HW_connection.png new file mode 100644 index 0000000..9c7e00e Binary files /dev/null and b/examples/doc/NucleoSTM32G071_lcd_keypad shield_HW_connection.png differ diff --git a/examples/doc/NucleoSTM32G474_lcd_keypad shield_HW_connection.png b/examples/doc/NucleoSTM32G474_lcd_keypad shield_HW_connection.png new file mode 100644 index 0000000..359710b Binary files /dev/null and b/examples/doc/NucleoSTM32G474_lcd_keypad shield_HW_connection.png differ diff --git a/examples/doc/STM32G071RB_Nucleo.png b/examples/doc/STM32G071RB_Nucleo.png new file mode 100644 index 0000000..d173110 Binary files /dev/null and b/examples/doc/STM32G071RB_Nucleo.png differ diff --git a/examples/doc/STM32G071RB_Nucleo_board_DataSheet.pdf b/examples/doc/STM32G071RB_Nucleo_board_DataSheet.pdf new file mode 100644 index 0000000..51ecead Binary files /dev/null and b/examples/doc/STM32G071RB_Nucleo_board_DataSheet.pdf differ diff --git a/examples/doc/STM32G474RE_Nucleo.png b/examples/doc/STM32G474RE_Nucleo.png new file mode 100644 index 0000000..f65373c Binary files /dev/null and b/examples/doc/STM32G474RE_Nucleo.png differ diff --git a/examples/doc/STM32G474RE_Nucleo_board_DataSheet.pdf b/examples/doc/STM32G474RE_Nucleo_board_DataSheet.pdf new file mode 100644 index 0000000..b2a3b4b Binary files /dev/null and b/examples/doc/STM32G474RE_Nucleo_board_DataSheet.pdf differ diff --git a/examples/doc/USBasp.png b/examples/doc/USBasp.png new file mode 100644 index 0000000..67a6c8f Binary files /dev/null and b/examples/doc/USBasp.png differ diff --git a/examples/doc/lcd_keypad_shield.png b/examples/doc/lcd_keypad_shield.png new file mode 100644 index 0000000..bf5edf5 Binary files /dev/null and b/examples/doc/lcd_keypad_shield.png differ diff --git a/examples/doc/lcd_keypad_shield_2.png b/examples/doc/lcd_keypad_shield_2.png new file mode 100644 index 0000000..7124e9d Binary files /dev/null and b/examples/doc/lcd_keypad_shield_2.png differ diff --git a/examples/doc/lcd_keypad_shield_doc.pdf b/examples/doc/lcd_keypad_shield_doc.pdf new file mode 100644 index 0000000..752f453 Binary files /dev/null and b/examples/doc/lcd_keypad_shield_doc.pdf differ diff --git a/examples/lcd_driver_intrface_example_implementations/AVR_IO_driver_interface_example.c b/examples/lcd_driver_intrface_example_implementations/AVR_IO_driver_interface_example.c new file mode 100644 index 0000000..f769e64 --- /dev/null +++ b/examples/lcd_driver_intrface_example_implementations/AVR_IO_driver_interface_example.c @@ -0,0 +1,192 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-04 20:13:23 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-08 10:49:44 + */ + + +#include "lcd_hd44780_interface.h" +#include "lcd_hd44780_config.h" +#include +#include +#include +// clang-format off +/*********************************Define hardware connection in your project*******************************/ +#define LCD_DATA_PORT PORTD +#define LCD_DATA_PORT_DIR DDRD +#define LCD_DATA_INPUT PIND + +#define LCD_SIG_PORT PORTB +#define LCD_SIG_PORT_DIR DDRB + +#define LCD_BCKL_PORT PORTB +#define LCD_BCKL_PORT_DIR DDRB + +#define LCD_PIN_D7 (1 << PIND7) +#define LCD_PIN_D6 (1 << PIND6) +#define LCD_PIN_D5 (1 << PIND5) +#define LCD_PIN_D4 (1 << PIND4) +#define LCD_PIN_RS (1 << PINB0) +#define LCD_PIN_RW (1 << PINC1) +#define LCD_PIN_E (1 << PINB1) +#define LCD_BCKL_PIN (1 << PINB2) +#if USE_RW_PIN == ON +#define LCD_PIN_RW (1 << PINBx) +#endif +/****************************END OFF define hardware connection in your application***********************/ + +#define LCD_D4_MASK 0x01 +#define LCD_D5_MASK 0x02 +#define LCD_D6_MASK 0x04 +#define LCD_D7_MASK 0x08 +// clang-format off + +static void init_LCD_data_and_SIG_pins(void); +static void init_LCD_DATA_PINS_as_outputs(void); +static void init_LCD_DATA_PINS_as_inputs(void); +static void set_LCD_DATA_PINS_state(uint8_t data); +static uint8_t get_LCD_DATA_PINS_state(void); +static void LCD_set_SIG(enum lcd_sig LCD_SIG); +static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +static void wraper_delay_us(uint32_t delay_us); +static void init_LCD_SIGNAL_PINS_as_outputs(void); + +/************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + init_LCD_DATA_PINS_as_outputs, + init_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + wraper_delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +/*************LCD_IO_driver_interface implementation END***************/ + +static void init_LCD_data_and_SIG_pins(void) +{ + //set BCKL PIN as output + LCD_BCKL_PORT_DIR |= LCD_BCKL_PIN; + //disable LCD backlight + LCD_BCKL_PORT &= ~ LCD_BCKL_PIN; + init_LCD_DATA_PINS_as_outputs(); + init_LCD_SIGNAL_PINS_as_outputs(); +} +static void init_LCD_DATA_PINS_as_outputs(void) +{ + //set pins as output + LCD_DATA_PORT_DIR |= (LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); +} +static void init_LCD_DATA_PINS_as_inputs(void) +{ + + //set pins as inputs + LCD_DATA_PORT_DIR &= ~(LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); + // enable pull-up on input pins + LCD_DATA_PORT |= (LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); +} + +static void set_LCD_DATA_PINS_state(uint8_t data) +{ + if ((data & LCD_D4_MASK)) + LCD_DATA_PORT |= LCD_PIN_D4; + else + LCD_DATA_PORT &= ~LCD_PIN_D4; + + if ((data & LCD_D5_MASK)) + LCD_DATA_PORT |= LCD_PIN_D5; + else + LCD_DATA_PORT &= ~LCD_PIN_D5; + + if ((data & LCD_D6_MASK)) + LCD_DATA_PORT |= LCD_PIN_D6; + else + LCD_DATA_PORT &= ~LCD_PIN_D6; + + if ((data & LCD_D7_MASK)) + LCD_DATA_PORT |= LCD_PIN_D7; + else + LCD_DATA_PORT &= ~LCD_PIN_D7; +} + +static uint8_t get_LCD_DATA_PINS_state(void) +{ + uint8_t data = 0; + if (LCD_DATA_INPUT & LCD_PIN_D4) + data = LCD_D4_MASK; + if (LCD_DATA_INPUT & LCD_PIN_D5) + data |= LCD_D5_MASK; + if (LCD_DATA_INPUT & LCD_PIN_D6) + data |= LCD_D6_MASK; + if (LCD_DATA_INPUT & LCD_PIN_D7) + data |= LCD_D7_MASK; + return data; +} + +static void LCD_set_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_SIG_PORT |= LCD_PIN_RS; + break; + case LCD_E: + LCD_SIG_PORT |= LCD_PIN_E; + break; +#if USE_RW_PIN == ON + case LCD_RW: + LCD_SIG_PORT |= LCD_PIN_RW; + break; +#endif + case LCD_BCKL: + LCD_SIG_PORT |= LCD_BCKL_PIN; + break; + default: + break; + } +} + +static void LCD_reset_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_SIG_PORT &= ~LCD_PIN_RS; + break; + case LCD_E: + LCD_SIG_PORT &= ~LCD_PIN_E; + break; +#if USE_RW_PIN == ON + case LCD_RW: + LCD_SIG_PORT &= ~LCD_PIN_RW; + break; +#endif + case LCD_BCKL: + LCD_SIG_PORT &= ~LCD_BCKL_PIN; + break; + default: + break; + } +} + +static void wraper_delay_us(uint32_t delay_us) +{ + _delay_us((double)(delay_us)); +} + +static void init_LCD_SIGNAL_PINS_as_outputs(void) +{ +#if USE_RW_PIN == ON + LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_RW | LCD_PIN_E); + +#else + LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_E); +#endif +} diff --git a/examples/lcd_driver_intrface_example_implementations/LCD_IO_driver_interface_template.c b/examples/lcd_driver_intrface_example_implementations/LCD_IO_driver_interface_template.c new file mode 100644 index 0000000..14f77b0 --- /dev/null +++ b/examples/lcd_driver_intrface_example_implementations/LCD_IO_driver_interface_template.c @@ -0,0 +1,170 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-07 15:51:41 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-08 00:34:48 + */ +#include +#include "lcd_hd44780_interface.h" + + +// clang-format off +#define ON 1 +#define OFF 0 + +/*********************************Define hardware connection in your project*******************************/ +// ToDo define here name of lcd PINS and it's hardware represetation +// #define LCD_D4 xx +// #define LCD_D5 xx +// etc +/****************************END OFF define hardware connection in your application***********************/ + +#define LCD_D4_MASK 0x01 +#define LCD_D5_MASK 0x02 +#define LCD_D6_MASK 0x04 +#define LCD_D7_MASK 0x08 +// clang-format on + +static void init_LCD_data_and_SIG_pins(void); +static void set_LCD_DATA_PINS_as_outputs(void); +static void set_LCD_DATA_PINS_as_inputs(void); +static void set_LCD_DATA_PINS_state(uint8_t data); +static uint8_t get_LCD_DATA_PINS_state(void); +static void LCD_set_SIG(enum lcd_sig LCD_SIG); +static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +static void _delay_us(uint32_t delay_us); +static void init_LCD_SIGNAL_PINS_as_outputs(void); +static void init_LCD_BCKL_PIN_as_output(void); + +/************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + set_LCD_DATA_PINS_as_outputs, + set_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + _delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +/*************LCD_IO_driver_interface implementation END***************/ + +static void init_LCD_data_and_SIG_pins(void) +{ +// init all GPIOs + +} + +static void set_LCD_DATA_PINS_as_outputs(void) +{ +// configure LCD_D4, LCD_D5, LCD_D6, LCD_D7 as output + +} +static void set_LCD_DATA_PINS_as_inputs(void) +{ +// configure LCD_D4, LCD_D5, LCD_D6, LCD_D7 as input +} + +static void set_LCD_DATA_PINS_state(uint8_t data) +{ + if ((data & LCD_D4_MASK)) + //set LCD_D4 to HIGW + else + //Set LCD_D4 to LOW + + if ((data & LCD_D5_MASK)) + //set LCD_D5 to HIGH + else + //Set LCD_D5 to LOW + + if ((data & LCD_D6_MASK)) + // Set LCD_D6 to HIGH + else + LCD_D6_PORT->ODR &= ~LCD_D6_OUT_PIN; + //Set LCD_D6 to LOW + + if ((data & LCD_D7_MASK)) + //Set LCD_D7 to HIGH + else + //Set LCD_D7 to LOW +} + +static uint8_t get_LCD_DATA_PINS_state(void) +{ + uint8_t data = 0; + // if (LCD_D4 input port is set to HIGH) + data = LCD_D4_MASK; + // if (LCD_D5 input port is set to HIGH) + data |= LCD_D5_MASK; + // if (LCD_D6 input port is set to HIGH) + data |= LCD_D6_MASK; + // if (LCD_D7 input port is set to HIGH) + data |= LCD_D7_MASK; + return data; +} + +static void LCD_set_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + // Set LCD_RS to High + break; + case LCD_E: + // Set LCD_E to High + break; +#if USE_RW_PIN == ON + case LCD_RW: + // Set LCD_RW to High + break; +#endif + case LCD_BCKL: + // Set LCD_BCKL to High + break; + default: + break; + } +} + +static void LCD_reset_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + // Set LCD_RS to LOW + break; + case LCD_E: + // Set LCD_E to LOW + break; +#if USE_RW_PIN == 1 + case LCD_RW: + // Set LCD_RW to LOW + break; +#endif + case LCD_BCKL: + // Set LCD_BCKL to LOW + break; + default: + break; + } +} + +static void wraper_delay_us(uint32_t delay_us) +{ + // ToDo update wraper +} + +static void init_LCD_SIGNAL_PINS_as_outputs(void) +{ + // Initialize LCD_E LCD_RS and optionl LCD_RW GPIOs as outputs +} + +static void init_LCD_BCKL_PIN_as_output(void) +{ +// Initialize LCD_BCKL GPIO as outputs +} diff --git a/examples/lcd_driver_intrface_example_implementations/STM32_bare_meta_IO_driver_interface_example.c b/examples/lcd_driver_intrface_example_implementations/STM32_bare_meta_IO_driver_interface_example.c new file mode 100644 index 0000000..ce63362 --- /dev/null +++ b/examples/lcd_driver_intrface_example_implementations/STM32_bare_meta_IO_driver_interface_example.c @@ -0,0 +1,261 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-07 15:51:41 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2023-12-08 00:34:48 + */ +#include +#include "stm32g070xx.h" +#include "lcd_hd44780_interface.h" + + +// clang-format off +#define ON 1 +#define OFF 0 + +/*********************************Define hardware connection in your project*******************************/ +#define LCD_D7_PORT GPIOA +#define LCD_D6_PORT GPIOB +#define LCD_D5_PORT GPIOB +#define LCD_D4_PORT GPIOB +#define LCD_RS_PORT GPIOA +#define LCD_E_PORT GPIOC +#define LCD_BCKL_PORT GPIOB +#if USE_RW_PIN == ON +#define LCD_RW_PORT GPIOC +#endif + +#define LCD_D7_PORT_CLK_EN RCC_IOPENR_GPIOAEN +#define LCD_D6_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#define LCD_D5_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#define LCD_D4_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#define LCD_RS_PORT_CLK_EN RCC_IOPENR_GPIOAEN +#define LCD_E_PORT_CLK_EN RCC_IOPENR_GPIOCEN +#define LCD_BCKL_PORT_CLK_EN RCC_IOPENR_GPIOBEN +#if USE_RW_PIN == ON +#define LCD_RW_PORT_CLK_EN RCC_IOPENR_GPIOCEN +#endif + +#define LCD_D7_OUT_PIN GPIO_ODR_OD8 +#define LCD_D6_OUT_PIN GPIO_ODR_OD14 +#define LCD_D5_OUT_PIN GPIO_ODR_OD4 +#define LCD_D4_OUT_PIN GPIO_ODR_OD5 +#define LCD_RS_OUT_PIN GPIO_ODR_OD9 +#define LCD_E_OUT_PIN GPIO_ODR_OD7 +#define LCD_BCKL_OUT_PIN GPIO_ODR_OD0 +#if USE_RW_PIN == ON +#define LCD_E_OUT_PIN GPIO_ODR_OD7 +#endif + +#define LCD_D7_IN_PIN GPIO_IDR_ID8 +#define LCD_D6_IN_PIN GPIO_IDR_ID14 +#define LCD_D5_IN_PIN GPIO_IDR_ID4 +#define LCD_D4_IN_PIN GPIO_IDR_ID5 + +#define MODER_LCD_D7_0 GPIO_MODER_MODE8_0 +#define MODER_LCD_D7_Msk GPIO_MODER_MODE8_Msk +#define MODER_LCD_D6_0 GPIO_MODER_MODE14_0 +#define MODER_LCD_D6_Msk GPIO_MODER_MODE14_Msk +#define MODER_LCD_D5_0 GPIO_MODER_MODE4_0 +#define MODER_LCD_D5_Msk GPIO_MODER_MODE4_Msk +#define MODER_LCD_D4_0 GPIO_MODER_MODE5_0 +#define MODER_LCD_D4_Msk GPIO_MODER_MODE5_Msk +#define MODER_LCD_RS_0 GPIO_MODER_MODE9_0 +#define MODER_LCD_RS_Msk GPIO_MODER_MODE9_Msk +#define MODER_LCD_E_0 GPIO_MODER_MODE7_0 +#define MODER_LCD_E_Msk GPIO_MODER_MODE7_Msk +#define MODER_LCD_BCKL_0 GPIO_MODER_MODE0_0 +#define MODER_LCD_BCKL_Msk GPIO_MODER_MODE0_Msk +#if USE_RW_PIN == ON +#define MODER_LCD_RW_0 GPIO_MODER_MODE7_0 +#define MODER_LCD_RW_Msk GPIO_MODER_MODE7_Msk +#endif +/****************************END OFF define hardware connection in your application***********************/ + +#define LCD_D4_MASK 0x01 +#define LCD_D5_MASK 0x02 +#define LCD_D6_MASK 0x04 +#define LCD_D7_MASK 0x08 +// clang-format on + +static void init_LCD_data_and_SIG_pins(void); +static void set_LCD_DATA_PINS_as_outputs(void); +static void set_LCD_DATA_PINS_as_inputs(void); +static void set_LCD_DATA_PINS_state(uint8_t data); +static uint8_t get_LCD_DATA_PINS_state(void); +static void LCD_set_SIG(enum lcd_sig LCD_SIG); +static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +static void wraper_delay_us(uint32_t delay_us); +static void init_LCD_SIGNAL_PINS_as_outputs(void); +static void init_LCD_BCKL_PIN_as_output(void); + +/************LCD_IO_driver_interface implementation START**************/ +static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { + init_LCD_data_and_SIG_pins, + set_LCD_DATA_PINS_as_outputs, + set_LCD_DATA_PINS_as_inputs, + set_LCD_DATA_PINS_state, + get_LCD_DATA_PINS_state, + LCD_set_SIG, + LCD_reset_SIG, + wraper_delay_us, +}; +const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) +{ + return &LCD_IO_driver; +} + +/*************LCD_IO_driver_interface implementation END***************/ + +static void init_LCD_data_and_SIG_pins(void) +{ + RCC -> IOPENR |= LCD_D7_PORT_CLK_EN; + RCC -> IOPENR |= LCD_D6_PORT_CLK_EN; + RCC -> IOPENR |= LCD_D5_PORT_CLK_EN; + RCC -> IOPENR |= LCD_D4_PORT_CLK_EN; + + set_LCD_DATA_PINS_as_outputs(); + init_LCD_SIGNAL_PINS_as_outputs(); + init_LCD_BCKL_PIN_as_output(); + //disable LCD backlight on init + LCD_BCKL_PORT->ODR &= ~LCD_BCKL_OUT_PIN; + +} + +static void set_LCD_DATA_PINS_as_outputs(void) +{ + LCD_D7_PORT->MODER &=(~MODER_LCD_D7_Msk); + LCD_D7_PORT->MODER |= MODER_LCD_D7_0; + + LCD_D6_PORT->MODER &=(~MODER_LCD_D6_Msk); + LCD_D6_PORT->MODER |= MODER_LCD_D6_0; + + LCD_D5_PORT->MODER &=(~MODER_LCD_D5_Msk); + LCD_D5_PORT->MODER |= MODER_LCD_D5_0; + + LCD_D4_PORT->MODER &=(~MODER_LCD_D4_Msk); + LCD_D4_PORT->MODER |= MODER_LCD_D4_0; + +} +static void set_LCD_DATA_PINS_as_inputs(void) +{ + LCD_D7_PORT->MODER &=(~MODER_LCD_D7_Msk); + + LCD_D6_PORT->MODER &=(~MODER_LCD_D6_Msk); + + LCD_D5_PORT->MODER &=(~MODER_LCD_D5_Msk); + + LCD_D4_PORT->MODER &=(~MODER_LCD_D4_Msk); +} + +static void set_LCD_DATA_PINS_state(uint8_t data) +{ + if ((data & LCD_D4_MASK)) + LCD_D4_PORT->ODR |= LCD_D4_OUT_PIN; + else + LCD_D4_PORT->ODR &= ~LCD_D4_OUT_PIN; + + if ((data & LCD_D5_MASK)) + LCD_D5_PORT->ODR |= LCD_D5_OUT_PIN; + else + LCD_D5_PORT->ODR &= ~LCD_D5_OUT_PIN; + + if ((data & LCD_D6_MASK)) + LCD_D6_PORT->ODR |= LCD_D6_OUT_PIN; + else + LCD_D6_PORT->ODR &= ~LCD_D6_OUT_PIN; + + if ((data & LCD_D7_MASK)) + LCD_D7_PORT->ODR |= LCD_D7_OUT_PIN; + else + LCD_D7_PORT->ODR &= ~LCD_D7_OUT_PIN; +} + +static uint8_t get_LCD_DATA_PINS_state(void) +{ + uint8_t data = 0; + if (((LCD_D4_PORT->IDR) & LCD_D4_IN_PIN) == LCD_D4_IN_PIN) + data = LCD_D4_MASK; + if (((LCD_D5_PORT->IDR) & LCD_D5_IN_PIN) == LCD_D5_IN_PIN) + data |= LCD_D5_MASK; + if (((LCD_D6_PORT->IDR) & LCD_D6_IN_PIN) == LCD_D6_IN_PIN) + data |= LCD_D6_MASK; + if (((LCD_D7_PORT->IDR) & LCD_D7_IN_PIN) == LCD_D7_IN_PIN) + data |= LCD_D7_MASK; + return data; +} + +static void LCD_set_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_RS_PORT->ODR |= LCD_RS_OUT_PIN; + break; + case LCD_E: + LCD_E_PORT->ODR |= LCD_E_OUT_PIN; + break; +#if USE_RW_PIN == ON + case LCD_RW: + LCD_RW_PORT->ODR |= LCD_RW_OUT_PIN; + break; +#endif + case LCD_BCKL: + LCD_BCKL_PORT->ODR |= LCD_BCKL_OUT_PIN; + break; + default: + break; + } +} + +static void LCD_reset_SIG(enum lcd_sig LCD_SIG) +{ + switch (LCD_SIG) + { + case LCD_RS: + LCD_RS_PORT->ODR &= ~LCD_RS_OUT_PIN; + break; + case LCD_E: + LCD_E_PORT->ODR &= ~LCD_E_OUT_PIN; + break; +#if USE_RW_PIN == 1 + case LCD_RW: + LCD_RW_PORT->ODR &= ~LCD_Rw_OUT_PIN; + break; +#endif + case LCD_BCKL: + LCD_BCKL_PORT->ODR &= ~LCD_BCKL_OUT_PIN; + break; + default: + break; + } +} + +static void wraper_delay_us(uint32_t delay_us) +{ + // ToDo update wraper +} + +static void init_LCD_SIGNAL_PINS_as_outputs(void) +{ + RCC -> IOPENR |= LCD_RS_PORT_CLK_EN; + LCD_RS_PORT->MODER &=(~MODER_LCD_RS_Msk); + LCD_RS_PORT->MODER |= MODER_LCD_RS_0; + + RCC -> IOPENR |= LCD_E_PORT_CLK_EN; + LCD_E_PORT->MODER &=(~MODER_LCD_E_Msk); + LCD_E_PORT->MODER |= MODER_LCD_E_0; + +#if USE_RW_PIN == 1 + RCC -> IOPENR |= LCD_RW_PORT_CLK_EN; + LCD_RW_PORT->MODER &=(~MODER_LCD_RW_Msk); + LCD_RW_PORT->MODER |= MODER_LCD_RW_0; +#endif +} + +static void init_LCD_BCKL_PIN_as_output(void) +{ + RCC -> IOPENR |= LCD_BCKL_PORT_CLK_EN; + LCD_BCKL_PORT->MODER &=(~MODER_LCD_BCKL_Msk); + LCD_BCKL_PORT->MODER |= MODER_LCD_BCKL_0; +} diff --git a/hw/ATMEGA328P_ARDUINO_UNO_R3/src/main.c b/hw/ATMEGA328P_ARDUINO_UNO_R3/src/main.c deleted file mode 100644 index 04f7629..0000000 --- a/hw/ATMEGA328P_ARDUINO_UNO_R3/src/main.c +++ /dev/null @@ -1,35 +0,0 @@ -#include -#include -#include -#include -#include -#include "project_config.h" -#if DEBUG_CONSOLE == ON -#include "debug.h" -#endif - -int main(void) -{ - DDRB|=1< -#include "main.h" -#include "core_init.h" - -#if !defined(__SOFT_FP__) && defined(__ARM_FP) - #warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use." -#endif - -int main(void) -{ - core_init(); - - /* Loop forever */ - for(;;); -} diff --git a/hw/STM32F030R8/Core/Src/sysmem.c b/hw/STM32F030R8/Core/Src/sysmem.c deleted file mode 100644 index d7cc52c..0000000 --- a/hw/STM32F030R8/Core/Src/sysmem.c +++ /dev/null @@ -1,80 +0,0 @@ -/** - ****************************************************************************** - * @file sysmem.c - * @author Generated by STM32CubeIDE - * @brief STM32CubeIDE System Memory calls file - * - * For more information about which C functions - * need which of these lowlevel functions - * please consult the newlib libc manual - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Includes */ -#include -#include - -/** - * Pointer to the current high watermark of the heap usage - */ -static uint8_t *__sbrk_heap_end = NULL; - -/** - * @brief _sbrk() allocates memory to the newlib heap and is used by malloc - * and others from the C library - * - * @verbatim - * ############################################################################ - * # .data # .bss # newlib heap # MSP stack # - * # # # # Reserved by _Min_Stack_Size # - * ############################################################################ - * ^-- RAM start ^-- _end _estack, RAM end --^ - * @endverbatim - * - * This implementation starts allocating at the '_end' linker symbol - * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack - * The implementation considers '_estack' linker symbol to be RAM end - * NOTE: If the MSP stack, at any point during execution, grows larger than the - * reserved size, please increase the '_Min_Stack_Size'. - * - * @param incr Memory size - * @return Pointer to allocated memory - */ -void *_sbrk(ptrdiff_t incr) -{ - extern uint8_t _end; /* Symbol defined in the linker script */ - extern uint8_t _estack; /* Symbol defined in the linker script */ - extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ - const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; - const uint8_t *max_heap = (uint8_t *)stack_limit; - uint8_t *prev_heap_end; - - /* Initialize heap end at first call */ - if (NULL == __sbrk_heap_end) - { - __sbrk_heap_end = &_end; - } - - /* Protect heap from growing into the reserved MSP stack */ - if (__sbrk_heap_end + incr > max_heap) - { - errno = ENOMEM; - return (void *)-1; - } - - prev_heap_end = __sbrk_heap_end; - __sbrk_heap_end += incr; - - return (void *)prev_heap_end; -} diff --git a/hw/STM32F030R8/Core/Src/system_stm32f0xx.c b/hw/STM32F030R8/Core/Src/system_stm32f0xx.c deleted file mode 100644 index 410809c..0000000 --- a/hw/STM32F030R8/Core/Src/system_stm32f0xx.c +++ /dev/null @@ -1,333 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f0xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. - * - * 1. This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32f0xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * 2. After each device reset the HSI (8 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to - * configure the system clock before to branch to main program. - * - * 3. This file configures the system clock as follows: - *============================================================================= - * Supported STM32F0xx device - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 8000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 8000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2016 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx_system - * @{ - */ - -/** @addtogroup STM32F0xx_System_Private_Includes - * @{ - */ - -#include "stm32f0xx.h" - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Defines - * @{ - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. - This value can be provided and adapted by the user application. */ -#endif /* HSE_VALUE */ - -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. - This value can be provided and adapted by the user application. */ -#endif /* HSI_VALUE */ - -#if !defined (HSI48_VALUE) -#define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz. - This value can be provided and adapted by the user application. */ -#endif /* HSI48_VALUE */ -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Variables - * @{ - */ - /* This variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock there is no need to - call the 2 first functions listed above, since SystemCoreClock variable is - updated automatically. - */ -uint32_t SystemCoreClock = 8000000; - -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * Initialize the default HSI clock source, vector table location and the PLL configuration is reset. - * @param None - * @retval None - */ -void SystemInit(void) -{ - /* Reset the RCC clock configuration to the default reset state ------------*/ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001U; - -#if defined (STM32F051x8) || defined (STM32F058x8) - /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */ - RCC->CFGR &= (uint32_t)0xF8FFB80CU; -#else - /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */ - RCC->CFGR &= (uint32_t)0x08FFB80CU; -#endif /* STM32F051x8 or STM32F058x8 */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFFU; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFFU; - - /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ - RCC->CFGR &= (uint32_t)0xFFC0FFFFU; - - /* Reset PREDIV[3:0] bits */ - RCC->CFGR2 &= (uint32_t)0xFFFFFFF0U; - -#if defined (STM32F072xB) || defined (STM32F078xx) - /* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFCFE2CU; -#elif defined (STM32F071xB) - /* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFCEACU; -#elif defined (STM32F091xC) || defined (STM32F098xx) - /* Reset USART3SW[1:0], USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFF0FEACU; -#elif defined (STM32F030x6) || defined (STM32F030x8) || defined (STM32F031x6) || defined (STM32F038xx) || defined (STM32F030xC) - /* Reset USART1SW[1:0], I2C1SW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFEECU; -#elif defined (STM32F051x8) || defined (STM32F058xx) - /* Reset USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFEACU; -#elif defined (STM32F042x6) || defined (STM32F048xx) - /* Reset USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFE2CU; -#elif defined (STM32F070x6) || defined (STM32F070xB) - /* Reset USART1SW[1:0], I2C1SW, USBSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFE6CU; - /* Set default USB clock to PLLCLK, since there is no HSI48 */ - RCC->CFGR3 |= (uint32_t)0x00000080U; -#else - #warning "No target selected" -#endif - - /* Reset HSI14 bit */ - RCC->CR2 &= (uint32_t)0xFFFFFFFEU; - - /* Disable all interrupts */ - RCC->CIR = 0x00000000U; - -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) - * or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value - * 8 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate (void) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) - { - case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ - SystemCoreClock = HSE_VALUE; - break; - case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; - pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - pllmull = ( pllmull >> 18) + 2; - predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; - - if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) - { - /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */ - SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull; - } -#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) - else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) - { - /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */ - SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull; - } -#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */ - else - { -#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \ - || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \ - || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) - /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */ - SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull; -#else - /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; -#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 || - STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB || - STM32F091xC || STM32F098xx || STM32F030xC */ - } - break; - default: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - } - /* Compute HCLK clock frequency ----------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/hw/STM32F030R8/Core/Startup/startup_stm32f030r8tx.s b/hw/STM32F030R8/Core/Startup/startup_stm32f030r8tx.s deleted file mode 100644 index 252d953..0000000 --- a/hw/STM32F030R8/Core/Startup/startup_stm32f030r8tx.s +++ /dev/null @@ -1,273 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f030x8.s - * @author MCD Application Team - * @brief STM32F030x8 devices vector table for GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M0 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m0 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr r0, =_estack - mov sp, r0 /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - ldr r0, =_sdata - ldr r1, =_edata - ldr r2, =_sidata - movs r3, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r4, [r2, r3] - str r4, [r0, r3] - adds r3, r3, #4 - -LoopCopyDataInit: - adds r4, r0, r3 - cmp r4, r1 - bcc CopyDataInit - -/* Zero fill the bss segment. */ - ldr r2, =_sbss - ldr r4, =_ebss - movs r3, #0 - b LoopFillZerobss - -FillZerobss: - str r3, [r2] - adds r2, r2, #4 - -LoopFillZerobss: - cmp r2, r4 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call static constructors */ - bl __libc_init_array -/* Call the application's entry point.*/ - bl main - -LoopForever: - b LoopForever - - -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M0. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word 0 - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler /* Window WatchDog */ - .word 0 /* Reserved */ - .word RTC_IRQHandler /* RTC through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ - .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ - .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ - .word 0 /* Reserved */ - .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ - .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */ - .word ADC1_IRQHandler /* ADC1 */ - .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word 0 /* Reserved */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM6_IRQHandler /* TIM6 */ - .word 0 /* Reserved */ - .word TIM14_IRQHandler /* TIM14 */ - .word TIM15_IRQHandler /* TIM15 */ - .word TIM16_IRQHandler /* TIM16 */ - .word TIM17_IRQHandler /* TIM17 */ - .word I2C1_IRQHandler /* I2C1 */ - .word I2C2_IRQHandler /* I2C2 */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_1_IRQHandler - .thumb_set EXTI0_1_IRQHandler,Default_Handler - - .weak EXTI2_3_IRQHandler - .thumb_set EXTI2_3_IRQHandler,Default_Handler - - .weak EXTI4_15_IRQHandler - .thumb_set EXTI4_15_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_3_IRQHandler - .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_5_IRQHandler - .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler - - .weak ADC1_IRQHandler - .thumb_set ADC1_IRQHandler,Default_Handler - - .weak TIM1_BRK_UP_TRG_COM_IRQHandler - .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM6_IRQHandler - .thumb_set TIM6_IRQHandler,Default_Handler - - .weak TIM14_IRQHandler - .thumb_set TIM14_IRQHandler,Default_Handler - - .weak TIM15_IRQHandler - .thumb_set TIM15_IRQHandler,Default_Handler - - .weak TIM16_IRQHandler - .thumb_set TIM16_IRQHandler,Default_Handler - - .weak TIM17_IRQHandler - .thumb_set TIM17_IRQHandler,Default_Handler - - .weak I2C1_IRQHandler - .thumb_set I2C1_IRQHandler,Default_Handler - - .weak I2C2_IRQHandler - .thumb_set I2C2_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/hw/STM32F030R8/Drivers/CMSIS/Device/stm32f030x8.h b/hw/STM32F030R8/Drivers/CMSIS/Device/stm32f030x8.h deleted file mode 100644 index d784500..0000000 --- a/hw/STM32F030R8/Drivers/CMSIS/Device/stm32f030x8.h +++ /dev/null @@ -1,5435 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f030x8.h - * @author MCD Application Team - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File. - * This file contains all the peripheral register's definitions, bits - * definitions and memory mapping for STM32F0xx devices. - * - * This file contains: - * - Data structures and the address mapping for all peripherals - * - Peripheral's registers declarations and bits definition - * - Macros to access peripherals registers hardware - * - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f030x8 - * @{ - */ - -#ifndef __STM32F030x8_H -#define __STM32F030x8_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Configuration_section_for_CMSIS - * @{ - */ -/** - * @brief Configuration of the Cortex-M0 Processor and Core Peripherals - */ -#define __CM0_REV 0 /*!< Core Revision r0p0 */ -#define __MPU_PRESENT 0 /*!< STM32F0xx do not provide MPU */ -#define __NVIC_PRIO_BITS 2 /*!< STM32F0xx uses 2 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - -/** - * @} - */ - -/** @addtogroup Peripheral_interrupt_number_definition - * @{ - */ - -/** - * @brief STM32F0xx Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ - -/*!< Interrupt Number Definition */ -typedef enum -{ -/****** Cortex-M0 Processor Exceptions Numbers **************************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - HardFault_IRQn = -13, /*!< 3 Cortex-M0 Hard Fault Interrupt */ - SVC_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt */ - -/****** STM32F0 specific Interrupt Numbers ******************************************************************/ - WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ - RTC_IRQn = 2, /*!< RTC Interrupt through EXTI Lines 17, 19 and 20 */ - FLASH_IRQn = 3, /*!< FLASH global Interrupt */ - RCC_IRQn = 4, /*!< RCC global Interrupt */ - EXTI0_1_IRQn = 5, /*!< EXTI Line 0 and 1 Interrupt */ - EXTI2_3_IRQn = 6, /*!< EXTI Line 2 and 3 Interrupt */ - EXTI4_15_IRQn = 7, /*!< EXTI Line 4 to 15 Interrupt */ - DMA1_Channel1_IRQn = 9, /*!< DMA1 Channel 1 Interrupt */ - DMA1_Channel2_3_IRQn = 10, /*!< DMA1 Channel 2 and Channel 3 Interrupt */ - DMA1_Channel4_5_IRQn = 11, /*!< DMA1 Channel 4 and Channel 5 Interrupt */ - ADC1_IRQn = 12, /*!< ADC1 Interrupt */ - TIM1_BRK_UP_TRG_COM_IRQn = 13, /*!< TIM1 Break, Update, Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 14, /*!< TIM1 Capture Compare Interrupt */ - TIM3_IRQn = 16, /*!< TIM3 global Interrupt */ - TIM6_IRQn = 17, /*!< TIM6 global Interrupt */ - TIM14_IRQn = 19, /*!< TIM14 global Interrupt */ - TIM15_IRQn = 20, /*!< TIM15 global Interrupt */ - TIM16_IRQn = 21, /*!< TIM16 global Interrupt */ - TIM17_IRQn = 22, /*!< TIM17 global Interrupt */ - I2C1_IRQn = 23, /*!< I2C1 Event Interrupt */ - I2C2_IRQn = 24, /*!< I2C2 Event Interrupt */ - SPI1_IRQn = 25, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 26, /*!< SPI2 global Interrupt */ - USART1_IRQn = 27, /*!< USART1 global Interrupt */ - USART2_IRQn = 28 /*!< USART2 global Interrupt */ -} IRQn_Type; - -/** - * @} - */ - -#include "core_cm0.h" /* Cortex-M0 processor and core peripherals */ -#include "system_stm32f0xx.h" /* STM32F0xx System Header */ -#include - -/** @addtogroup Peripheral_registers_structures - * @{ - */ - -/** - * @brief Analog to Digital Converter - */ - -typedef struct -{ - __IO uint32_t ISR; /*!< ADC interrupt and status register, Address offset: 0x00 */ - __IO uint32_t IER; /*!< ADC interrupt enable register, Address offset: 0x04 */ - __IO uint32_t CR; /*!< ADC control register, Address offset: 0x08 */ - __IO uint32_t CFGR1; /*!< ADC configuration register 1, Address offset: 0x0C */ - __IO uint32_t CFGR2; /*!< ADC configuration register 2, Address offset: 0x10 */ - __IO uint32_t SMPR; /*!< ADC sampling time register, Address offset: 0x14 */ - uint32_t RESERVED1; /*!< Reserved, 0x18 */ - uint32_t RESERVED2; /*!< Reserved, 0x1C */ - __IO uint32_t TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x20 */ - uint32_t RESERVED3; /*!< Reserved, 0x24 */ - __IO uint32_t CHSELR; /*!< ADC group regular sequencer register, Address offset: 0x28 */ - uint32_t RESERVED4[5]; /*!< Reserved, 0x2C */ - __IO uint32_t DR; /*!< ADC group regular data register, Address offset: 0x40 */ -} ADC_TypeDef; - -typedef struct -{ - __IO uint32_t CCR; /*!< ADC common configuration register, Address offset: ADC1 base address + 0x308 */ -} ADC_Common_TypeDef; - -/** - * @brief CRC calculation unit - */ - -typedef struct -{ - __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */ - __IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ - uint8_t RESERVED0; /*!< Reserved, 0x05 */ - uint16_t RESERVED1; /*!< Reserved, 0x06 */ - __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ - uint32_t RESERVED2; /*!< Reserved, 0x0C */ - __IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */ - __IO uint32_t RESERVED3; /*!< Reserved, 0x14 */ -} CRC_TypeDef; - -/** - * @brief Debug MCU - */ - -typedef struct -{ - __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */ - __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ - __IO uint32_t APB1FZ; /*!< Debug MCU APB1 freeze register, Address offset: 0x08 */ - __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x0C */ -}DBGMCU_TypeDef; - -/** - * @brief DMA Controller - */ - -typedef struct -{ - __IO uint32_t CCR; /*!< DMA channel x configuration register */ - __IO uint32_t CNDTR; /*!< DMA channel x number of data register */ - __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */ - __IO uint32_t CMAR; /*!< DMA channel x memory address register */ -} DMA_Channel_TypeDef; - -typedef struct -{ - __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */ - __IO uint32_t IFCR; /*!< DMA interrupt flag clear register, Address offset: 0x04 */ -} DMA_TypeDef; - -/** - * @brief External Interrupt/Event Controller - */ - -typedef struct -{ - __IO uint32_t IMR; /*!
© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.
- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx - * @{ - */ - -#ifndef __STM32F0xx_H -#define __STM32F0xx_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Library_configuration_section - * @{ - */ - -/** - * @brief STM32 Family - */ -#if !defined (STM32F0) -#define STM32F0 -#endif /* STM32F0 */ - -/** Uncomment the line below according to the target STM32 device used in your application. - * stm32f0xxxx.h file contains: - * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices - * - IRQ channel definition - * - Peripheral memory mapping and physical registers address definition - * - Peripheral pointer declaration and driver header file inclusion - * - Product miscellaneous configuration: assert macros - * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-familys superset. - */ - -#if !defined (STM32F030x6) && !defined (STM32F030x8) && \ - !defined (STM32F031x6) && !defined (STM32F038xx) && \ - !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \ - !defined (STM32F051x8) && !defined (STM32F058xx) && \ - !defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \ - !defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC) - /* #define STM32F030x6 */ /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F030x8 */ /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes) */ - /* #define STM32F031x6 */ /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */ - /* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F048xx */ /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes) */ - /* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */ - /* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */ - /* #define STM32F070x6 */ /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F070xB */ /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */ - /* #define STM32F071xB */ /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */ - /* #define STM32F072xB */ /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */ - /* #define STM32F078xx */ /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes) */ - /* #define STM32F030xC */ /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes) */ - /* #define STM32F091xC */ /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes) */ - /* #define STM32F098xx */ /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes) */ -#endif -/* Legacy aliases */ -#if defined (STM32F048x6) - #define STM32F048xx -#endif /* STM32F048x6 */ - -/* Tip: To avoid modifying this file each time you need to switch between these - devices, you can define the device in your toolchain compiler preprocessor. - */ -#if !defined (USE_HAL_DRIVER) -/** - * @brief Comment the line below if you will not use the peripherals drivers. - In this case, these drivers will not be included and the application code will - be based on direct access to peripherals registers - */ - /*#define USE_HAL_DRIVER */ -#endif /* USE_HAL_DRIVER */ - -/** - * @brief CMSIS Device version number V2.3.6 - */ -#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */ -#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ -#define __STM32F0_DEVICE_VERSION_SUB2 (0x06) /*!< [15:8] sub2 version */ -#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */ -#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\ - |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\ - |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\ - |(__STM32F0_DEVICE_VERSION_RC)) - -/** - * @} - */ - -/** @addtogroup Device_Included - * @{ - */ - -#if defined(STM32F030x6) - #include "stm32f030x6.h" -#elif defined(STM32F030x8) - #include "stm32f030x8.h" -#elif defined(STM32F031x6) - #include "stm32f031x6.h" -#elif defined(STM32F038xx) - #include "stm32f038xx.h" -#elif defined(STM32F042x6) - #include "stm32f042x6.h" -#elif defined(STM32F048xx) - #include "stm32f048xx.h" -#elif defined(STM32F051x8) - #include "stm32f051x8.h" -#elif defined(STM32F058xx) - #include "stm32f058xx.h" -#elif defined(STM32F070x6) - #include "stm32f070x6.h" -#elif defined(STM32F070xB) - #include "stm32f070xb.h" -#elif defined(STM32F071xB) - #include "stm32f071xb.h" -#elif defined(STM32F072xB) - #include "stm32f072xb.h" -#elif defined(STM32F078xx) - #include "stm32f078xx.h" -#elif defined(STM32F091xC) - #include "stm32f091xc.h" -#elif defined(STM32F098xx) - #include "stm32f098xx.h" -#elif defined(STM32F030xC) - #include "stm32f030xc.h" -#else - #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)" -#endif - -/** - * @} - */ - -/** @addtogroup Exported_types - * @{ - */ -typedef enum -{ - RESET = 0U, - SET = !RESET -} FlagStatus, ITStatus; - -typedef enum -{ - DISABLE = 0U, - ENABLE = !DISABLE -} FunctionalState; -#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) - -typedef enum -{ - SUCCESS = 0U, - ERROR = !SUCCESS -} ErrorStatus; - -/** - * @} - */ - - -/** @addtogroup Exported_macros - * @{ - */ -#define SET_BIT(REG, BIT) ((REG) |= (BIT)) - -#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) - -#define READ_BIT(REG, BIT) ((REG) & (BIT)) - -#define CLEAR_REG(REG) ((REG) = (0x0)) - -#define WRITE_REG(REG, VAL) ((REG) = (VAL)) - -#define READ_REG(REG) ((REG)) - -#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) - -/* Use of interrupt control for register exclusive access */ -/* Atomic 32-bit register access macro to set one or several bits */ -#define ATOMIC_SET_BIT(REG, BIT) \ - do { \ - uint32_t primask; \ - primask = __get_PRIMASK(); \ - __set_PRIMASK(1); \ - SET_BIT((REG), (BIT)); \ - __set_PRIMASK(primask); \ - } while(0) - -/* Atomic 32-bit register access macro to clear one or several bits */ -#define ATOMIC_CLEAR_BIT(REG, BIT) \ - do { \ - uint32_t primask; \ - primask = __get_PRIMASK(); \ - __set_PRIMASK(1); \ - CLEAR_BIT((REG), (BIT)); \ - __set_PRIMASK(primask); \ - } while(0) - -/* Atomic 32-bit register access macro to clear and set one or several bits */ -#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ - do { \ - uint32_t primask; \ - primask = __get_PRIMASK(); \ - __set_PRIMASK(1); \ - MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \ - __set_PRIMASK(primask); \ - } while(0) - -/* Atomic 16-bit register access macro to set one or several bits */ -#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \ - -/* Atomic 16-bit register access macro to clear one or several bits */ -#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \ - -/* Atomic 16-bit register access macro to clear and set one or several bits */ -#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ - -/** - * @} - */ - -#if defined (USE_HAL_DRIVER) - #include "stm32f0xx_hal.h" -#endif /* USE_HAL_DRIVER */ - - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* __STM32F0xx_H */ -/** - * @} - */ - -/** - * @} - */ - - - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/STM32F030R8/Drivers/CMSIS/Device/system_stm32f0xx.h b/hw/STM32F030R8/Drivers/CMSIS/Device/system_stm32f0xx.h deleted file mode 100644 index 3b71cfe..0000000 --- a/hw/STM32F030R8/Drivers/CMSIS/Device/system_stm32f0xx.h +++ /dev/null @@ -1,105 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f0xx.h - * @author MCD Application Team - * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx_system - * @{ - */ - -/** - * @brief Define to prevent recursive inclusion - */ -#ifndef __SYSTEM_STM32F0XX_H -#define __SYSTEM_STM32F0XX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup STM32F0xx_System_Includes - * @{ - */ - -/** - * @} - */ - - -/** @addtogroup STM32F0xx_System_Exported_types - * @{ - */ - /* This variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 3) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) by calling HAL API function HAL_RCC_ClockConfig() - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ -extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ -extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Functions - * @{ - */ - -extern void SystemInit(void); -extern void SystemCoreClockUpdate(void); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__SYSTEM_STM32F0XX_H */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/STM32F091RB/CMakeLists.txt b/hw/STM32F091RB/CMakeLists.txt deleted file mode 100644 index 9b3f36b..0000000 --- a/hw/STM32F091RB/CMakeLists.txt +++ /dev/null @@ -1,83 +0,0 @@ -############################################################################################################################# -# file: CMakeLists.txt -# brief: Template "CMakeLists.txt" for building of executables and static libraries. -# -# usage: Edit MCPU-Variable to suit STM32 project requirements. -# For debug build using Unix Makefiles: -# cmake -S ./ -B Debug -G"Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug -# make -C Debug all (optional with VERBOSE=1 and -jxx ->xx numnber of cores) -# For debug build using Ninja: -# cmake -S ./ -B Debug -G"Ninja" -DCMAKE_BUILD_TYPE=Debug -# ninja -C Debug (optional with -V and -jxx ->xx numnber of cores) -# -# For release build Unix Makefiles: -# cmake -S ./ -B Release -G"Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -# make all -C Release VERBOSE=1 -j12 (optional with VERBOSE=1 and -jxx ->xx numnber of cores) -# For Release build using Ninja: -# cmake -S ./ -B Release -G"Ninja" -DCMAKE_BUILD_TYPE=Release -# ninja -C Release (optional -V and -jxx ->xx numnber of cores) -############################################################################################################################# -cmake_minimum_required(VERSION 3.10) - -set(CMAKE_TOOLCHAIN_FILE ../config/STM32/Toolchain-arm-gcc.cmake) - -# Allow assembler -enable_language(ASM) - -project(STM32F091RB_TEMPLATE) - -set(INCLUDE_DIRS -Core -Core/Inc -Core/Startup - -Drivers -Drivers/CMSIS -Drivers/CMSIS/Device -Drivers/CMSIS/Include -Drivers/CMSIS/STM32F0_Drivers - - -../src - -../lib - -. -) - -set(C_SRCS - Core/Src/main.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/core_init.c - Core/Src/system_stm32f0xx.c - - -) - -set(ASM_SRCS - Core/Startup/startup_stm32f091rbtx.s -) - -set(GLOBAL_DEFINES - -DSTM32F091xC -) - -set(LINKED_LIBS - -) - -link_directories( - -) - -include_directories(${INCLUDE_DIRS}) -add_definitions(${GLOBAL_DEFINES}) - -set(MCPU "-mcpu=cortex-m0") -include( ../config/STM32/compiler_flags.cmake) - -# generate elf file -add_arm_executable(${CMAKE_PROJECT_NAME} ${C_SRCS} ${ASM_SRCS}) - -arm_link_libraries(${CMAKE_PROJECT_NAME} ${LINKED_LIBS}) diff --git a/hw/STM32F091RB/Core/Inc/core_init.h b/hw/STM32F091RB/Core/Inc/core_init.h deleted file mode 100644 index ea81f14..0000000 --- a/hw/STM32F091RB/Core/Inc/core_init.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * File: core_init.h - * Author: niw - * Brief: STM32F0 Core initialization. - */ - -#ifndef _CORE_INIT_H_ -#define _CORE_INIT_H_ - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/// @brief STM32G070R8 Core initialization. -//// -//// Function Configure cklocks -void core_init(void); - -#ifdef __cplusplus -} -#endif /* __cplusplus */ -#endif /* _CORE_INIT_H_ */ diff --git a/hw/STM32F091RB/Core/Inc/main.h b/hw/STM32F091RB/Core/Inc/main.h deleted file mode 100644 index e69de29..0000000 diff --git a/hw/STM32F091RB/Core/Src/core_init.c b/hw/STM32F091RB/Core/Src/core_init.c deleted file mode 100644 index 2fb5ea5..0000000 --- a/hw/STM32F091RB/Core/Src/core_init.c +++ /dev/null @@ -1,7 +0,0 @@ -#include "stm32f091xc.h" - -#include "core_init.h" - -void core_init(void) -{ -} \ No newline at end of file diff --git a/hw/STM32F091RB/Core/Src/main.c b/hw/STM32F091RB/Core/Src/main.c deleted file mode 100644 index 0958227..0000000 --- a/hw/STM32F091RB/Core/Src/main.c +++ /dev/null @@ -1,34 +0,0 @@ -/** - ****************************************************************************** - * @file : main.c - * @author : Auto-generated by STM32CubeIDE - * @brief : Main program body - ****************************************************************************** - * @attention - * - * Copyright (c) 2022 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -#include -// #include "main.h" -#include "stm32f091xc.h" -#include "core_init.h" - -#if !defined(__SOFT_FP__) && defined(__ARM_FP) - #warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use." -#endif - -int main(void) -{ - core_init(); - - /* Loop forever */ - for(;;); -} diff --git a/hw/STM32F091RB/Core/Src/syscalls.c b/hw/STM32F091RB/Core/Src/syscalls.c deleted file mode 100644 index 20733cc..0000000 --- a/hw/STM32F091RB/Core/Src/syscalls.c +++ /dev/null @@ -1,176 +0,0 @@ -/** - ****************************************************************************** - * @file syscalls.c - * @author Auto-generated by STM32CubeIDE - * @brief STM32CubeIDE Minimal System calls file - * - * For more information about which c-functions - * need which of these lowlevel functions - * please consult the Newlib libc-manual - ****************************************************************************** - * @attention - * - * Copyright (c) 2020-2022 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Includes */ -#include -#include -#include -#include -#include -#include -#include -#include - - -/* Variables */ -extern int __io_putchar(int ch) __attribute__((weak)); -extern int __io_getchar(void) __attribute__((weak)); - - -char *__env[1] = { 0 }; -char **environ = __env; - - -/* Functions */ -void initialise_monitor_handles(void) -{ -} - -int _getpid(void) -{ - return 1; -} - -int _kill(int pid, int sig) -{ - (void)pid; - (void)sig; - errno = EINVAL; - return -1; -} - -void _exit (int status) -{ - _kill(status, -1); - while (1) {} /* Make sure we hang here */ -} - -__attribute__((weak)) int _read(int file, char *ptr, int len) -{ - (void)file; - int DataIdx; - - for (DataIdx = 0; DataIdx < len; DataIdx++) - { - *ptr++ = __io_getchar(); - } - - return len; -} - -__attribute__((weak)) int _write(int file, char *ptr, int len) -{ - (void)file; - int DataIdx; - - for (DataIdx = 0; DataIdx < len; DataIdx++) - { - __io_putchar(*ptr++); - } - return len; -} - -int _close(int file) -{ - (void)file; - return -1; -} - - -int _fstat(int file, struct stat *st) -{ - (void)file; - st->st_mode = S_IFCHR; - return 0; -} - -int _isatty(int file) -{ - (void)file; - return 1; -} - -int _lseek(int file, int ptr, int dir) -{ - (void)file; - (void)ptr; - (void)dir; - return 0; -} - -int _open(char *path, int flags, ...) -{ - (void)path; - (void)flags; - /* Pretend like we always fail */ - return -1; -} - -int _wait(int *status) -{ - (void)status; - errno = ECHILD; - return -1; -} - -int _unlink(char *name) -{ - (void)name; - errno = ENOENT; - return -1; -} - -int _times(struct tms *buf) -{ - (void)buf; - return -1; -} - -int _stat(char *file, struct stat *st) -{ - (void)file; - st->st_mode = S_IFCHR; - return 0; -} - -int _link(char *old, char *new) -{ - (void)old; - (void)new; - errno = EMLINK; - return -1; -} - -int _fork(void) -{ - errno = EAGAIN; - return -1; -} - -int _execve(char *name, char **argv, char **env) -{ - (void)name; - (void)argv; - (void)env; - errno = ENOMEM; - return -1; -} diff --git a/hw/STM32F091RB/Core/Src/system_stm32f0xx.c b/hw/STM32F091RB/Core/Src/system_stm32f0xx.c deleted file mode 100644 index 410809c..0000000 --- a/hw/STM32F091RB/Core/Src/system_stm32f0xx.c +++ /dev/null @@ -1,333 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f0xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. - * - * 1. This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32f0xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * 2. After each device reset the HSI (8 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to - * configure the system clock before to branch to main program. - * - * 3. This file configures the system clock as follows: - *============================================================================= - * Supported STM32F0xx device - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 8000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 8000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2016 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx_system - * @{ - */ - -/** @addtogroup STM32F0xx_System_Private_Includes - * @{ - */ - -#include "stm32f0xx.h" - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Defines - * @{ - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. - This value can be provided and adapted by the user application. */ -#endif /* HSE_VALUE */ - -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. - This value can be provided and adapted by the user application. */ -#endif /* HSI_VALUE */ - -#if !defined (HSI48_VALUE) -#define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz. - This value can be provided and adapted by the user application. */ -#endif /* HSI48_VALUE */ -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Variables - * @{ - */ - /* This variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock there is no need to - call the 2 first functions listed above, since SystemCoreClock variable is - updated automatically. - */ -uint32_t SystemCoreClock = 8000000; - -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * Initialize the default HSI clock source, vector table location and the PLL configuration is reset. - * @param None - * @retval None - */ -void SystemInit(void) -{ - /* Reset the RCC clock configuration to the default reset state ------------*/ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001U; - -#if defined (STM32F051x8) || defined (STM32F058x8) - /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */ - RCC->CFGR &= (uint32_t)0xF8FFB80CU; -#else - /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */ - RCC->CFGR &= (uint32_t)0x08FFB80CU; -#endif /* STM32F051x8 or STM32F058x8 */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFFU; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFFU; - - /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ - RCC->CFGR &= (uint32_t)0xFFC0FFFFU; - - /* Reset PREDIV[3:0] bits */ - RCC->CFGR2 &= (uint32_t)0xFFFFFFF0U; - -#if defined (STM32F072xB) || defined (STM32F078xx) - /* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFCFE2CU; -#elif defined (STM32F071xB) - /* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFCEACU; -#elif defined (STM32F091xC) || defined (STM32F098xx) - /* Reset USART3SW[1:0], USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFF0FEACU; -#elif defined (STM32F030x6) || defined (STM32F030x8) || defined (STM32F031x6) || defined (STM32F038xx) || defined (STM32F030xC) - /* Reset USART1SW[1:0], I2C1SW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFEECU; -#elif defined (STM32F051x8) || defined (STM32F058xx) - /* Reset USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFEACU; -#elif defined (STM32F042x6) || defined (STM32F048xx) - /* Reset USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFE2CU; -#elif defined (STM32F070x6) || defined (STM32F070xB) - /* Reset USART1SW[1:0], I2C1SW, USBSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFE6CU; - /* Set default USB clock to PLLCLK, since there is no HSI48 */ - RCC->CFGR3 |= (uint32_t)0x00000080U; -#else - #warning "No target selected" -#endif - - /* Reset HSI14 bit */ - RCC->CR2 &= (uint32_t)0xFFFFFFFEU; - - /* Disable all interrupts */ - RCC->CIR = 0x00000000U; - -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) - * or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value - * 8 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate (void) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) - { - case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ - SystemCoreClock = HSE_VALUE; - break; - case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; - pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - pllmull = ( pllmull >> 18) + 2; - predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; - - if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) - { - /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */ - SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull; - } -#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) - else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) - { - /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */ - SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull; - } -#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */ - else - { -#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \ - || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \ - || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) - /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */ - SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull; -#else - /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; -#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 || - STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB || - STM32F091xC || STM32F098xx || STM32F030xC */ - } - break; - default: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - } - /* Compute HCLK clock frequency ----------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/hw/STM32F091RB/Core/Startup/startup_stm32f091rbtx.s b/hw/STM32F091RB/Core/Startup/startup_stm32f091rbtx.s deleted file mode 100644 index 8be767b..0000000 --- a/hw/STM32F091RB/Core/Startup/startup_stm32f091rbtx.s +++ /dev/null @@ -1,290 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f091xc.s - * @author MCD Application Team - * @brief STM32F091xC devices vector table for GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M0 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m0 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr r0, =_estack - mov sp, r0 /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - ldr r0, =_sdata - ldr r1, =_edata - ldr r2, =_sidata - movs r3, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r4, [r2, r3] - str r4, [r0, r3] - adds r3, r3, #4 - -LoopCopyDataInit: - adds r4, r0, r3 - cmp r4, r1 - bcc CopyDataInit - -/* Zero fill the bss segment. */ - ldr r2, =_sbss - ldr r4, =_ebss - movs r3, #0 - b LoopFillZerobss - -FillZerobss: - str r3, [r2] - adds r2, r2, #4 - -LoopFillZerobss: - cmp r2, r4 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - @ bl SystemInit -/* Call static constructors */ - bl __libc_init_array -/* Call the application's entry point.*/ - bl main - -LoopForever: - b LoopForever - - -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M0. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word 0 - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */ - .word RTC_IRQHandler /* RTC through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_CRS_IRQHandler /* RCC and CRS */ - .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ - .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ - .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ - .word TSC_IRQHandler /* TSC */ - .word DMA1_Ch1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler /* DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2 */ - .word DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler /* DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5 */ - .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ - .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC */ - .word TIM7_IRQHandler /* TIM7 */ - .word TIM14_IRQHandler /* TIM14 */ - .word TIM15_IRQHandler /* TIM15 */ - .word TIM16_IRQHandler /* TIM16 */ - .word TIM17_IRQHandler /* TIM17 */ - .word I2C1_IRQHandler /* I2C1 */ - .word I2C2_IRQHandler /* I2C2 */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_8_IRQHandler /* USART3, USART4, USART5, USART6, USART7, USART8 */ - .word CEC_CAN_IRQHandler /* CEC and CAN */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_VDDIO2_IRQHandler - .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_CRS_IRQHandler - .thumb_set RCC_CRS_IRQHandler,Default_Handler - - .weak EXTI0_1_IRQHandler - .thumb_set EXTI0_1_IRQHandler,Default_Handler - - .weak EXTI2_3_IRQHandler - .thumb_set EXTI2_3_IRQHandler,Default_Handler - - .weak EXTI4_15_IRQHandler - .thumb_set EXTI4_15_IRQHandler,Default_Handler - - .weak TSC_IRQHandler - .thumb_set TSC_IRQHandler,Default_Handler - - .weak DMA1_Ch1_IRQHandler - .thumb_set DMA1_Ch1_IRQHandler,Default_Handler - - .weak DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler - .thumb_set DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler,Default_Handler - - .weak DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler - .thumb_set DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler,Default_Handler - - .weak ADC1_COMP_IRQHandler - .thumb_set ADC1_COMP_IRQHandler,Default_Handler - - .weak TIM1_BRK_UP_TRG_COM_IRQHandler - .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak TIM14_IRQHandler - .thumb_set TIM14_IRQHandler,Default_Handler - - .weak TIM15_IRQHandler - .thumb_set TIM15_IRQHandler,Default_Handler - - .weak TIM16_IRQHandler - .thumb_set TIM16_IRQHandler,Default_Handler - - .weak TIM17_IRQHandler - .thumb_set TIM17_IRQHandler,Default_Handler - - .weak I2C1_IRQHandler - .thumb_set I2C1_IRQHandler,Default_Handler - - .weak I2C2_IRQHandler - .thumb_set I2C2_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_8_IRQHandler - .thumb_set USART3_8_IRQHandler,Default_Handler - - .weak CEC_CAN_IRQHandler - .thumb_set CEC_CAN_IRQHandler,Default_Handler - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/hw/STM32F091RB/Drivers/CMSIS/Device/stm32f091xc.h b/hw/STM32F091RB/Drivers/CMSIS/Device/stm32f091xc.h deleted file mode 100644 index cc9f134..0000000 --- a/hw/STM32F091RB/Drivers/CMSIS/Device/stm32f091xc.h +++ /dev/null @@ -1,11858 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f091xc.h - * @author MCD Application Team - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File. - * This file contains all the peripheral register's definitions, bits - * definitions and memory mapping for STM32F0xx devices. - * - * This file contains: - * - Data structures and the address mapping for all peripherals - * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral�s registers hardware - * - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f091xc - * @{ - */ - -#ifndef __STM32F091xC_H -#define __STM32F091xC_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Configuration_section_for_CMSIS - * @{ - */ -/** - * @brief Configuration of the Cortex-M0 Processor and Core Peripherals - */ -#define __CM0_REV 0 /*!< Core Revision r0p0 */ -#define __MPU_PRESENT 0 /*!< STM32F0xx do not provide MPU */ -#define __NVIC_PRIO_BITS 2 /*!< STM32F0xx uses 2 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - -/** - * @} - */ - -/** @addtogroup Peripheral_interrupt_number_definition - * @{ - */ - -/** - * @brief STM32F0xx Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ - -/*!< Interrupt Number Definition */ -typedef enum -{ -/****** Cortex-M0 Processor Exceptions Numbers **************************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - HardFault_IRQn = -13, /*!< 3 Cortex-M0 Hard Fault Interrupt */ - SVC_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt */ - -/****** STM32F0 specific Interrupt Numbers ******************************************************************/ - WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ - PVD_VDDIO2_IRQn = 1, /*!< PVD & VDDIO2 Interrupt through EXTI Lines 16 and 31 */ - RTC_IRQn = 2, /*!< RTC Interrupt through EXTI Lines 17, 19 and 20 */ - FLASH_IRQn = 3, /*!< FLASH global Interrupt */ - RCC_CRS_IRQn = 4, /*!< RCC & CRS global Interrupt */ - EXTI0_1_IRQn = 5, /*!< EXTI Line 0 and 1 Interrupt */ - EXTI2_3_IRQn = 6, /*!< EXTI Line 2 and 3 Interrupt */ - EXTI4_15_IRQn = 7, /*!< EXTI Line 4 to 15 Interrupt */ - TSC_IRQn = 8, /*!< Touch Sensing Controller Interrupts */ - DMA1_Ch1_IRQn = 9, /*!< DMA1 Channel 1 Interrupt */ - DMA1_Ch2_3_DMA2_Ch1_2_IRQn = 10, /*!< DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2 Interrupts */ - DMA1_Ch4_7_DMA2_Ch3_5_IRQn = 11, /*!< DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5 Interrupt */ - ADC1_COMP_IRQn = 12, /*!< ADC1 and COMP interrupts (ADC interrupt combined with EXTI Lines 21 and 22 */ - TIM1_BRK_UP_TRG_COM_IRQn = 13, /*!< TIM1 Break, Update, Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 14, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 15, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 16, /*!< TIM3 global Interrupt */ - TIM6_DAC_IRQn = 17, /*!< TIM6 global and DAC channel underrun error Interrupt */ - TIM7_IRQn = 18, /*!< TIM7 global Interrupt */ - TIM14_IRQn = 19, /*!< TIM14 global Interrupt */ - TIM15_IRQn = 20, /*!< TIM15 global Interrupt */ - TIM16_IRQn = 21, /*!< TIM16 global Interrupt */ - TIM17_IRQn = 22, /*!< TIM17 global Interrupt */ - I2C1_IRQn = 23, /*!< I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */ - I2C2_IRQn = 24, /*!< I2C2 Event Interrupt */ - SPI1_IRQn = 25, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 26, /*!< SPI2 global Interrupt */ - USART1_IRQn = 27, /*!< USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */ - USART2_IRQn = 28, /*!< USART2 global Interrupt & EXTI Line26 Interrupt (USART2 wakeup) */ - USART3_8_IRQn = 29, /*!< USART3 to USART8 global Interrupt */ - CEC_CAN_IRQn = 30 /*!< CEC and CAN global Interrupts & EXTI Line27 Interrupt */ -} IRQn_Type; - -/** - * @} - */ - -#include "core_cm0.h" /* Cortex-M0 processor and core peripherals */ -#include "system_stm32f0xx.h" /* STM32F0xx System Header */ -#include - -/** @addtogroup Peripheral_registers_structures - * @{ - */ - -/** - * @brief Analog to Digital Converter - */ - -typedef struct -{ - __IO uint32_t ISR; /*!< ADC interrupt and status register, Address offset: 0x00 */ - __IO uint32_t IER; /*!< ADC interrupt enable register, Address offset: 0x04 */ - __IO uint32_t CR; /*!< ADC control register, Address offset: 0x08 */ - __IO uint32_t CFGR1; /*!< ADC configuration register 1, Address offset: 0x0C */ - __IO uint32_t CFGR2; /*!< ADC configuration register 2, Address offset: 0x10 */ - __IO uint32_t SMPR; /*!< ADC sampling time register, Address offset: 0x14 */ - uint32_t RESERVED1; /*!< Reserved, 0x18 */ - uint32_t RESERVED2; /*!< Reserved, 0x1C */ - __IO uint32_t TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x20 */ - uint32_t RESERVED3; /*!< Reserved, 0x24 */ - __IO uint32_t CHSELR; /*!< ADC group regular sequencer register, Address offset: 0x28 */ - uint32_t RESERVED4[5]; /*!< Reserved, 0x2C */ - __IO uint32_t DR; /*!< ADC group regular data register, Address offset: 0x40 */ -} ADC_TypeDef; - -typedef struct -{ - __IO uint32_t CCR; /*!< ADC common configuration register, Address offset: ADC1 base address + 0x308 */ -} ADC_Common_TypeDef; - -/** - * @brief Controller Area Network TxMailBox - */ -typedef struct -{ - __IO uint32_t TIR; /*!< CAN TX mailbox identifier register */ - __IO uint32_t TDTR; /*!< CAN mailbox data length control and time stamp register */ - __IO uint32_t TDLR; /*!< CAN mailbox data low register */ - __IO uint32_t TDHR; /*!< CAN mailbox data high register */ -}CAN_TxMailBox_TypeDef; - -/** - * @brief Controller Area Network FIFOMailBox - */ -typedef struct -{ - __IO uint32_t RIR; /*!< CAN receive FIFO mailbox identifier register */ - __IO uint32_t RDTR; /*!< CAN receive FIFO mailbox data length control and time stamp register */ - __IO uint32_t RDLR; /*!< CAN receive FIFO mailbox data low register */ - __IO uint32_t RDHR; /*!< CAN receive FIFO mailbox data high register */ -}CAN_FIFOMailBox_TypeDef; - -/** - * @brief Controller Area Network FilterRegister - */ -typedef struct -{ - __IO uint32_t FR1; /*!< CAN Filter bank register 1 */ - __IO uint32_t FR2; /*!< CAN Filter bank register 1 */ -}CAN_FilterRegister_TypeDef; - -/** - * @brief Controller Area Network - */ -typedef struct -{ - __IO uint32_t MCR; /*!< CAN master control register, Address offset: 0x00 */ - __IO uint32_t MSR; /*!< CAN master status register, Address offset: 0x04 */ - __IO uint32_t TSR; /*!< CAN transmit status register, Address offset: 0x08 */ - __IO uint32_t RF0R; /*!< CAN receive FIFO 0 register, Address offset: 0x0C */ - __IO uint32_t RF1R; /*!< CAN receive FIFO 1 register, Address offset: 0x10 */ - __IO uint32_t IER; /*!< CAN interrupt enable register, Address offset: 0x14 */ - __IO uint32_t ESR; /*!< CAN error status register, Address offset: 0x18 */ - __IO uint32_t BTR; /*!< CAN bit timing register, Address offset: 0x1C */ - uint32_t RESERVED0[88]; /*!< Reserved, 0x020 - 0x17F */ - CAN_TxMailBox_TypeDef sTxMailBox[3]; /*!< CAN Tx MailBox, Address offset: 0x180 - 0x1AC */ - CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; /*!< CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC */ - uint32_t RESERVED1[12]; /*!< Reserved, 0x1D0 - 0x1FF */ - __IO uint32_t FMR; /*!< CAN filter master register, Address offset: 0x200 */ - __IO uint32_t FM1R; /*!< CAN filter mode register, Address offset: 0x204 */ - uint32_t RESERVED2; /*!< Reserved, 0x208 */ - __IO uint32_t FS1R; /*!< CAN filter scale register, Address offset: 0x20C */ - uint32_t RESERVED3; /*!< Reserved, 0x210 */ - __IO uint32_t FFA1R; /*!< CAN filter FIFO assignment register, Address offset: 0x214 */ - uint32_t RESERVED4; /*!< Reserved, 0x218 */ - __IO uint32_t FA1R; /*!< CAN filter activation register, Address offset: 0x21C */ - uint32_t RESERVED5[8]; /*!< Reserved, 0x220-0x23F */ - CAN_FilterRegister_TypeDef sFilterRegister[14]; /*!< CAN Filter Register, Address offset: 0x240-0x2AC */ -}CAN_TypeDef; - -/** - * @brief HDMI-CEC - */ - -typedef struct -{ - __IO uint32_t CR; /*!< CEC control register, Address offset:0x00 */ - __IO uint32_t CFGR; /*!< CEC configuration register, Address offset:0x04 */ - __IO uint32_t TXDR; /*!< CEC Tx data register , Address offset:0x08 */ - __IO uint32_t RXDR; /*!< CEC Rx Data Register, Address offset:0x0C */ - __IO uint32_t ISR; /*!< CEC Interrupt and Status Register, Address offset:0x10 */ - __IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */ -}CEC_TypeDef; - -/** - * @brief Comparator - */ - -typedef struct -{ - __IO uint16_t CSR; /*!< COMP control and status register, Address offset: 0x00 */ -} COMP_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */ -} COMP_Common_TypeDef; - -/* Legacy defines */ -typedef struct -{ - __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ -}COMP1_2_TypeDef; - -/** - * @brief CRC calculation unit - */ - -typedef struct -{ - __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */ - __IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ - uint8_t RESERVED0; /*!< Reserved, 0x05 */ - uint16_t RESERVED1; /*!< Reserved, 0x06 */ - __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ - uint32_t RESERVED2; /*!< Reserved, 0x0C */ - __IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */ - __IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */ -} CRC_TypeDef; - -/** - * @brief Clock Recovery System - */ -typedef struct -{ -__IO uint32_t CR; /*!< CRS ccontrol register, Address offset: 0x00 */ -__IO uint32_t CFGR; /*!< CRS configuration register, Address offset: 0x04 */ -__IO uint32_t ISR; /*!< CRS interrupt and status register, Address offset: 0x08 */ -__IO uint32_t ICR; /*!< CRS interrupt flag clear register, Address offset: 0x0C */ -}CRS_TypeDef; - -/** - * @brief Digital to Analog Converter - */ - -typedef struct -{ - __IO uint32_t CR; /*!< DAC control register, Address offset: 0x00 */ - __IO uint32_t SWTRIGR; /*!< DAC software trigger register, Address offset: 0x04 */ - __IO uint32_t DHR12R1; /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */ - __IO uint32_t DHR12L1; /*!< DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C */ - __IO uint32_t DHR8R1; /*!< DAC channel1 8-bit right aligned data holding register, Address offset: 0x10 */ - __IO uint32_t DHR12R2; /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */ - __IO uint32_t DHR12L2; /*!< DAC channel2 12-bit left aligned data holding register, Address offset: 0x18 */ - __IO uint32_t DHR8R2; /*!< DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C */ - __IO uint32_t DHR12RD; /*!< Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20 */ - __IO uint32_t DHR12LD; /*!< DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24 */ - __IO uint32_t DHR8RD; /*!< DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28 */ - __IO uint32_t DOR1; /*!< DAC channel1 data output register, Address offset: 0x2C */ - __IO uint32_t DOR2; /*!< DAC channel2 data output register, Address offset: 0x30 */ - __IO uint32_t SR; /*!< DAC status register, Address offset: 0x34 */ -} DAC_TypeDef; - -/** - * @brief Debug MCU - */ - -typedef struct -{ - __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */ - __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ - __IO uint32_t APB1FZ; /*!< Debug MCU APB1 freeze register, Address offset: 0x08 */ - __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x0C */ -}DBGMCU_TypeDef; - -/** - * @brief DMA Controller - */ - -typedef struct -{ - __IO uint32_t CCR; /*!< DMA channel x configuration register */ - __IO uint32_t CNDTR; /*!< DMA channel x number of data register */ - __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */ - __IO uint32_t CMAR; /*!< DMA channel x memory address register */ -} DMA_Channel_TypeDef; - -typedef struct -{ - __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */ - __IO uint32_t IFCR; /*!< DMA interrupt flag clear register, Address offset: 0x04 */ - uint32_t RESERVED0[40];/*!< Reserved as declared by channel typedef 0x08 - 0xA4 */ - __IO uint32_t CSELR; /*!< Channel selection register, Address offset: 0xA8 */ -} DMA_TypeDef; - -/** - * @brief External Interrupt/Event Controller - */ - -typedef struct -{ - __IO uint32_t IMR; /*! exti[31] Interrupt */ -#define SYSCFG_ITLINE1_SR_VDDIO2_Pos (1U) -#define SYSCFG_ITLINE1_SR_VDDIO2_Msk (0x1UL << SYSCFG_ITLINE1_SR_VDDIO2_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE1_SR_VDDIO2 SYSCFG_ITLINE1_SR_VDDIO2_Msk /*!< VDDIO2 -> exti[16] Interrupt */ -#define SYSCFG_ITLINE2_SR_RTC_ALRA_Pos (0U) -#define SYSCFG_ITLINE2_SR_RTC_ALRA_Msk (0x1UL << SYSCFG_ITLINE2_SR_RTC_ALRA_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE2_SR_RTC_ALRA SYSCFG_ITLINE2_SR_RTC_ALRA_Msk /*!< RTC Alarm -> exti[17] interrupt .... */ -#define SYSCFG_ITLINE2_SR_RTC_TSTAMP_Pos (1U) -#define SYSCFG_ITLINE2_SR_RTC_TSTAMP_Msk (0x1UL << SYSCFG_ITLINE2_SR_RTC_TSTAMP_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE2_SR_RTC_TSTAMP SYSCFG_ITLINE2_SR_RTC_TSTAMP_Msk /*!< RTC Time Stamp -> exti[19] interrupt */ -#define SYSCFG_ITLINE2_SR_RTC_WAKEUP_Pos (2U) -#define SYSCFG_ITLINE2_SR_RTC_WAKEUP_Msk (0x1UL << SYSCFG_ITLINE2_SR_RTC_WAKEUP_Pos) /*!< 0x00000004 */ -#define SYSCFG_ITLINE2_SR_RTC_WAKEUP SYSCFG_ITLINE2_SR_RTC_WAKEUP_Msk /*!< RTC WAKEUP -> exti[20] Interrupt */ -#define SYSCFG_ITLINE3_SR_FLASH_ITF_Pos (0U) -#define SYSCFG_ITLINE3_SR_FLASH_ITF_Msk (0x1UL << SYSCFG_ITLINE3_SR_FLASH_ITF_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE3_SR_FLASH_ITF SYSCFG_ITLINE3_SR_FLASH_ITF_Msk /*!< Flash ITF Interrupt */ -#define SYSCFG_ITLINE4_SR_CRS_Pos (0U) -#define SYSCFG_ITLINE4_SR_CRS_Msk (0x1UL << SYSCFG_ITLINE4_SR_CRS_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE4_SR_CRS SYSCFG_ITLINE4_SR_CRS_Msk /*!< CRS interrupt */ -#define SYSCFG_ITLINE4_SR_CLK_CTRL_Pos (1U) -#define SYSCFG_ITLINE4_SR_CLK_CTRL_Msk (0x1UL << SYSCFG_ITLINE4_SR_CLK_CTRL_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE4_SR_CLK_CTRL SYSCFG_ITLINE4_SR_CLK_CTRL_Msk /*!< CLK CTRL interrupt */ -#define SYSCFG_ITLINE5_SR_EXTI0_Pos (0U) -#define SYSCFG_ITLINE5_SR_EXTI0_Msk (0x1UL << SYSCFG_ITLINE5_SR_EXTI0_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE5_SR_EXTI0 SYSCFG_ITLINE5_SR_EXTI0_Msk /*!< External Interrupt 0 */ -#define SYSCFG_ITLINE5_SR_EXTI1_Pos (1U) -#define SYSCFG_ITLINE5_SR_EXTI1_Msk (0x1UL << SYSCFG_ITLINE5_SR_EXTI1_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE5_SR_EXTI1 SYSCFG_ITLINE5_SR_EXTI1_Msk /*!< External Interrupt 1 */ -#define SYSCFG_ITLINE6_SR_EXTI2_Pos (0U) -#define SYSCFG_ITLINE6_SR_EXTI2_Msk (0x1UL << SYSCFG_ITLINE6_SR_EXTI2_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE6_SR_EXTI2 SYSCFG_ITLINE6_SR_EXTI2_Msk /*!< External Interrupt 2 */ -#define SYSCFG_ITLINE6_SR_EXTI3_Pos (1U) -#define SYSCFG_ITLINE6_SR_EXTI3_Msk (0x1UL << SYSCFG_ITLINE6_SR_EXTI3_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE6_SR_EXTI3 SYSCFG_ITLINE6_SR_EXTI3_Msk /*!< External Interrupt 3 */ -#define SYSCFG_ITLINE7_SR_EXTI4_Pos (0U) -#define SYSCFG_ITLINE7_SR_EXTI4_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI4_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE7_SR_EXTI4 SYSCFG_ITLINE7_SR_EXTI4_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI5_Pos (1U) -#define SYSCFG_ITLINE7_SR_EXTI5_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI5_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE7_SR_EXTI5 SYSCFG_ITLINE7_SR_EXTI5_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI6_Pos (2U) -#define SYSCFG_ITLINE7_SR_EXTI6_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI6_Pos) /*!< 0x00000004 */ -#define SYSCFG_ITLINE7_SR_EXTI6 SYSCFG_ITLINE7_SR_EXTI6_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI7_Pos (3U) -#define SYSCFG_ITLINE7_SR_EXTI7_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI7_Pos) /*!< 0x00000008 */ -#define SYSCFG_ITLINE7_SR_EXTI7 SYSCFG_ITLINE7_SR_EXTI7_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI8_Pos (4U) -#define SYSCFG_ITLINE7_SR_EXTI8_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI8_Pos) /*!< 0x00000010 */ -#define SYSCFG_ITLINE7_SR_EXTI8 SYSCFG_ITLINE7_SR_EXTI8_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI9_Pos (5U) -#define SYSCFG_ITLINE7_SR_EXTI9_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI9_Pos) /*!< 0x00000020 */ -#define SYSCFG_ITLINE7_SR_EXTI9 SYSCFG_ITLINE7_SR_EXTI9_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI10_Pos (6U) -#define SYSCFG_ITLINE7_SR_EXTI10_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI10_Pos) /*!< 0x00000040 */ -#define SYSCFG_ITLINE7_SR_EXTI10 SYSCFG_ITLINE7_SR_EXTI10_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI11_Pos (7U) -#define SYSCFG_ITLINE7_SR_EXTI11_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI11_Pos) /*!< 0x00000080 */ -#define SYSCFG_ITLINE7_SR_EXTI11 SYSCFG_ITLINE7_SR_EXTI11_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI12_Pos (8U) -#define SYSCFG_ITLINE7_SR_EXTI12_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI12_Pos) /*!< 0x00000100 */ -#define SYSCFG_ITLINE7_SR_EXTI12 SYSCFG_ITLINE7_SR_EXTI12_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI13_Pos (9U) -#define SYSCFG_ITLINE7_SR_EXTI13_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI13_Pos) /*!< 0x00000200 */ -#define SYSCFG_ITLINE7_SR_EXTI13 SYSCFG_ITLINE7_SR_EXTI13_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI14_Pos (10U) -#define SYSCFG_ITLINE7_SR_EXTI14_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI14_Pos) /*!< 0x00000400 */ -#define SYSCFG_ITLINE7_SR_EXTI14 SYSCFG_ITLINE7_SR_EXTI14_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE7_SR_EXTI15_Pos (11U) -#define SYSCFG_ITLINE7_SR_EXTI15_Msk (0x1UL << SYSCFG_ITLINE7_SR_EXTI15_Pos) /*!< 0x00000800 */ -#define SYSCFG_ITLINE7_SR_EXTI15 SYSCFG_ITLINE7_SR_EXTI15_Msk /*!< External Interrupt 15 to 4 */ -#define SYSCFG_ITLINE8_SR_TSC_EOA_Pos (0U) -#define SYSCFG_ITLINE8_SR_TSC_EOA_Msk (0x1UL << SYSCFG_ITLINE8_SR_TSC_EOA_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE8_SR_TSC_EOA SYSCFG_ITLINE8_SR_TSC_EOA_Msk /*!< Touch control EOA Interrupt */ -#define SYSCFG_ITLINE8_SR_TSC_MCE_Pos (1U) -#define SYSCFG_ITLINE8_SR_TSC_MCE_Msk (0x1UL << SYSCFG_ITLINE8_SR_TSC_MCE_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE8_SR_TSC_MCE SYSCFG_ITLINE8_SR_TSC_MCE_Msk /*!< Touch control MCE Interrupt */ -#define SYSCFG_ITLINE9_SR_DMA1_CH1_Pos (0U) -#define SYSCFG_ITLINE9_SR_DMA1_CH1_Msk (0x1UL << SYSCFG_ITLINE9_SR_DMA1_CH1_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE9_SR_DMA1_CH1 SYSCFG_ITLINE9_SR_DMA1_CH1_Msk /*!< DMA1 Channel 1 Interrupt */ -#define SYSCFG_ITLINE10_SR_DMA1_CH2_Pos (0U) -#define SYSCFG_ITLINE10_SR_DMA1_CH2_Msk (0x1UL << SYSCFG_ITLINE10_SR_DMA1_CH2_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE10_SR_DMA1_CH2 SYSCFG_ITLINE10_SR_DMA1_CH2_Msk /*!< DMA1 Channel 2 Interrupt */ -#define SYSCFG_ITLINE10_SR_DMA1_CH3_Pos (1U) -#define SYSCFG_ITLINE10_SR_DMA1_CH3_Msk (0x1UL << SYSCFG_ITLINE10_SR_DMA1_CH3_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE10_SR_DMA1_CH3 SYSCFG_ITLINE10_SR_DMA1_CH3_Msk /*!< DMA2 Channel 3 Interrupt */ -#define SYSCFG_ITLINE10_SR_DMA2_CH1_Pos (2U) -#define SYSCFG_ITLINE10_SR_DMA2_CH1_Msk (0x1UL << SYSCFG_ITLINE10_SR_DMA2_CH1_Pos) /*!< 0x00000004 */ -#define SYSCFG_ITLINE10_SR_DMA2_CH1 SYSCFG_ITLINE10_SR_DMA2_CH1_Msk /*!< DMA2 Channel 1 Interrupt */ -#define SYSCFG_ITLINE10_SR_DMA2_CH2_Pos (3U) -#define SYSCFG_ITLINE10_SR_DMA2_CH2_Msk (0x1UL << SYSCFG_ITLINE10_SR_DMA2_CH2_Pos) /*!< 0x00000008 */ -#define SYSCFG_ITLINE10_SR_DMA2_CH2 SYSCFG_ITLINE10_SR_DMA2_CH2_Msk /*!< DMA2 Channel 2 Interrupt */ -#define SYSCFG_ITLINE11_SR_DMA1_CH4_Pos (0U) -#define SYSCFG_ITLINE11_SR_DMA1_CH4_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH4_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE11_SR_DMA1_CH4 SYSCFG_ITLINE11_SR_DMA1_CH4_Msk /*!< DMA1 Channel 4 Interrupt */ -#define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (1U) -#define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE11_SR_DMA1_CH5 SYSCFG_ITLINE11_SR_DMA1_CH5_Msk /*!< DMA1 Channel 5 Interrupt */ -#define SYSCFG_ITLINE11_SR_DMA1_CH6_Pos (2U) -#define SYSCFG_ITLINE11_SR_DMA1_CH6_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH6_Pos) /*!< 0x00000004 */ -#define SYSCFG_ITLINE11_SR_DMA1_CH6 SYSCFG_ITLINE11_SR_DMA1_CH6_Msk /*!< DMA1 Channel 6 Interrupt */ -#define SYSCFG_ITLINE11_SR_DMA1_CH7_Pos (3U) -#define SYSCFG_ITLINE11_SR_DMA1_CH7_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH7_Pos) /*!< 0x00000008 */ -#define SYSCFG_ITLINE11_SR_DMA1_CH7 SYSCFG_ITLINE11_SR_DMA1_CH7_Msk /*!< DMA1 Channel 7 Interrupt */ -#define SYSCFG_ITLINE11_SR_DMA2_CH3_Pos (4U) -#define SYSCFG_ITLINE11_SR_DMA2_CH3_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA2_CH3_Pos) /*!< 0x00000010 */ -#define SYSCFG_ITLINE11_SR_DMA2_CH3 SYSCFG_ITLINE11_SR_DMA2_CH3_Msk /*!< DMA2 Channel 3 Interrupt */ -#define SYSCFG_ITLINE11_SR_DMA2_CH4_Pos (5U) -#define SYSCFG_ITLINE11_SR_DMA2_CH4_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA2_CH4_Pos) /*!< 0x00000020 */ -#define SYSCFG_ITLINE11_SR_DMA2_CH4 SYSCFG_ITLINE11_SR_DMA2_CH4_Msk /*!< DMA2 Channel 4 Interrupt */ -#define SYSCFG_ITLINE11_SR_DMA2_CH5_Pos (6U) -#define SYSCFG_ITLINE11_SR_DMA2_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA2_CH5_Pos) /*!< 0x00000040 */ -#define SYSCFG_ITLINE11_SR_DMA2_CH5 SYSCFG_ITLINE11_SR_DMA2_CH5_Msk /*!< DMA2 Channel 5 Interrupt */ -#define SYSCFG_ITLINE12_SR_ADC_Pos (0U) -#define SYSCFG_ITLINE12_SR_ADC_Msk (0x1UL << SYSCFG_ITLINE12_SR_ADC_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE12_SR_ADC SYSCFG_ITLINE12_SR_ADC_Msk /*!< ADC Interrupt */ -#define SYSCFG_ITLINE12_SR_COMP1_Pos (1U) -#define SYSCFG_ITLINE12_SR_COMP1_Msk (0x1UL << SYSCFG_ITLINE12_SR_COMP1_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE12_SR_COMP1 SYSCFG_ITLINE12_SR_COMP1_Msk /*!< COMP1 Interrupt -> exti[21] */ -#define SYSCFG_ITLINE12_SR_COMP2_Pos (2U) -#define SYSCFG_ITLINE12_SR_COMP2_Msk (0x1UL << SYSCFG_ITLINE12_SR_COMP2_Pos) /*!< 0x00000004 */ -#define SYSCFG_ITLINE12_SR_COMP2 SYSCFG_ITLINE12_SR_COMP2_Msk /*!< COMP2 Interrupt -> exti[22] */ -#define SYSCFG_ITLINE13_SR_TIM1_BRK_Pos (0U) -#define SYSCFG_ITLINE13_SR_TIM1_BRK_Msk (0x1UL << SYSCFG_ITLINE13_SR_TIM1_BRK_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE13_SR_TIM1_BRK SYSCFG_ITLINE13_SR_TIM1_BRK_Msk /*!< TIM1 BRK Interrupt */ -#define SYSCFG_ITLINE13_SR_TIM1_UPD_Pos (1U) -#define SYSCFG_ITLINE13_SR_TIM1_UPD_Msk (0x1UL << SYSCFG_ITLINE13_SR_TIM1_UPD_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE13_SR_TIM1_UPD SYSCFG_ITLINE13_SR_TIM1_UPD_Msk /*!< TIM1 UPD Interrupt */ -#define SYSCFG_ITLINE13_SR_TIM1_TRG_Pos (2U) -#define SYSCFG_ITLINE13_SR_TIM1_TRG_Msk (0x1UL << SYSCFG_ITLINE13_SR_TIM1_TRG_Pos) /*!< 0x00000004 */ -#define SYSCFG_ITLINE13_SR_TIM1_TRG SYSCFG_ITLINE13_SR_TIM1_TRG_Msk /*!< TIM1 TRG Interrupt */ -#define SYSCFG_ITLINE13_SR_TIM1_CCU_Pos (3U) -#define SYSCFG_ITLINE13_SR_TIM1_CCU_Msk (0x1UL << SYSCFG_ITLINE13_SR_TIM1_CCU_Pos) /*!< 0x00000008 */ -#define SYSCFG_ITLINE13_SR_TIM1_CCU SYSCFG_ITLINE13_SR_TIM1_CCU_Msk /*!< TIM1 CCU Interrupt */ -#define SYSCFG_ITLINE14_SR_TIM1_CC_Pos (0U) -#define SYSCFG_ITLINE14_SR_TIM1_CC_Msk (0x1UL << SYSCFG_ITLINE14_SR_TIM1_CC_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE14_SR_TIM1_CC SYSCFG_ITLINE14_SR_TIM1_CC_Msk /*!< TIM1 CC Interrupt */ -#define SYSCFG_ITLINE15_SR_TIM2_GLB_Pos (0U) -#define SYSCFG_ITLINE15_SR_TIM2_GLB_Msk (0x1UL << SYSCFG_ITLINE15_SR_TIM2_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE15_SR_TIM2_GLB SYSCFG_ITLINE15_SR_TIM2_GLB_Msk /*!< TIM2 GLB Interrupt */ -#define SYSCFG_ITLINE16_SR_TIM3_GLB_Pos (0U) -#define SYSCFG_ITLINE16_SR_TIM3_GLB_Msk (0x1UL << SYSCFG_ITLINE16_SR_TIM3_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE16_SR_TIM3_GLB SYSCFG_ITLINE16_SR_TIM3_GLB_Msk /*!< TIM3 GLB Interrupt */ -#define SYSCFG_ITLINE17_SR_DAC_Pos (0U) -#define SYSCFG_ITLINE17_SR_DAC_Msk (0x1UL << SYSCFG_ITLINE17_SR_DAC_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE17_SR_DAC SYSCFG_ITLINE17_SR_DAC_Msk /*!< DAC Interrupt */ -#define SYSCFG_ITLINE17_SR_TIM6_GLB_Pos (1U) -#define SYSCFG_ITLINE17_SR_TIM6_GLB_Msk (0x1UL << SYSCFG_ITLINE17_SR_TIM6_GLB_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE17_SR_TIM6_GLB SYSCFG_ITLINE17_SR_TIM6_GLB_Msk /*!< TIM6 GLB Interrupt */ -#define SYSCFG_ITLINE18_SR_TIM7_GLB_Pos (0U) -#define SYSCFG_ITLINE18_SR_TIM7_GLB_Msk (0x1UL << SYSCFG_ITLINE18_SR_TIM7_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE18_SR_TIM7_GLB SYSCFG_ITLINE18_SR_TIM7_GLB_Msk /*!< TIM7 GLB Interrupt */ -#define SYSCFG_ITLINE19_SR_TIM14_GLB_Pos (0U) -#define SYSCFG_ITLINE19_SR_TIM14_GLB_Msk (0x1UL << SYSCFG_ITLINE19_SR_TIM14_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE19_SR_TIM14_GLB SYSCFG_ITLINE19_SR_TIM14_GLB_Msk /*!< TIM14 GLB Interrupt */ -#define SYSCFG_ITLINE20_SR_TIM15_GLB_Pos (0U) -#define SYSCFG_ITLINE20_SR_TIM15_GLB_Msk (0x1UL << SYSCFG_ITLINE20_SR_TIM15_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE20_SR_TIM15_GLB SYSCFG_ITLINE20_SR_TIM15_GLB_Msk /*!< TIM15 GLB Interrupt */ -#define SYSCFG_ITLINE21_SR_TIM16_GLB_Pos (0U) -#define SYSCFG_ITLINE21_SR_TIM16_GLB_Msk (0x1UL << SYSCFG_ITLINE21_SR_TIM16_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE21_SR_TIM16_GLB SYSCFG_ITLINE21_SR_TIM16_GLB_Msk /*!< TIM16 GLB Interrupt */ -#define SYSCFG_ITLINE22_SR_TIM17_GLB_Pos (0U) -#define SYSCFG_ITLINE22_SR_TIM17_GLB_Msk (0x1UL << SYSCFG_ITLINE22_SR_TIM17_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE22_SR_TIM17_GLB SYSCFG_ITLINE22_SR_TIM17_GLB_Msk /*!< TIM17 GLB Interrupt */ -#define SYSCFG_ITLINE23_SR_I2C1_GLB_Pos (0U) -#define SYSCFG_ITLINE23_SR_I2C1_GLB_Msk (0x1UL << SYSCFG_ITLINE23_SR_I2C1_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE23_SR_I2C1_GLB SYSCFG_ITLINE23_SR_I2C1_GLB_Msk /*!< I2C1 GLB Interrupt -> exti[23] */ -#define SYSCFG_ITLINE24_SR_I2C2_GLB_Pos (0U) -#define SYSCFG_ITLINE24_SR_I2C2_GLB_Msk (0x1UL << SYSCFG_ITLINE24_SR_I2C2_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE24_SR_I2C2_GLB SYSCFG_ITLINE24_SR_I2C2_GLB_Msk /*!< I2C2 GLB Interrupt */ -#define SYSCFG_ITLINE25_SR_SPI1_Pos (0U) -#define SYSCFG_ITLINE25_SR_SPI1_Msk (0x1UL << SYSCFG_ITLINE25_SR_SPI1_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE25_SR_SPI1 SYSCFG_ITLINE25_SR_SPI1_Msk /*!< SPI1 Interrupt */ -#define SYSCFG_ITLINE26_SR_SPI2_Pos (0U) -#define SYSCFG_ITLINE26_SR_SPI2_Msk (0x1UL << SYSCFG_ITLINE26_SR_SPI2_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE26_SR_SPI2 SYSCFG_ITLINE26_SR_SPI2_Msk /*!< SPI2 Interrupt */ -#define SYSCFG_ITLINE27_SR_USART1_GLB_Pos (0U) -#define SYSCFG_ITLINE27_SR_USART1_GLB_Msk (0x1UL << SYSCFG_ITLINE27_SR_USART1_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE27_SR_USART1_GLB SYSCFG_ITLINE27_SR_USART1_GLB_Msk /*!< USART1 GLB Interrupt -> exti[25] */ -#define SYSCFG_ITLINE28_SR_USART2_GLB_Pos (0U) -#define SYSCFG_ITLINE28_SR_USART2_GLB_Msk (0x1UL << SYSCFG_ITLINE28_SR_USART2_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE28_SR_USART2_GLB SYSCFG_ITLINE28_SR_USART2_GLB_Msk /*!< USART2 GLB Interrupt -> exti[26] */ -#define SYSCFG_ITLINE29_SR_USART3_GLB_Pos (0U) -#define SYSCFG_ITLINE29_SR_USART3_GLB_Msk (0x1UL << SYSCFG_ITLINE29_SR_USART3_GLB_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE29_SR_USART3_GLB SYSCFG_ITLINE29_SR_USART3_GLB_Msk /*!< USART3 GLB Interrupt -> exti[28] */ -#define SYSCFG_ITLINE29_SR_USART4_GLB_Pos (1U) -#define SYSCFG_ITLINE29_SR_USART4_GLB_Msk (0x1UL << SYSCFG_ITLINE29_SR_USART4_GLB_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE29_SR_USART4_GLB SYSCFG_ITLINE29_SR_USART4_GLB_Msk /*!< USART4 GLB Interrupt */ -#define SYSCFG_ITLINE29_SR_USART5_GLB_Pos (2U) -#define SYSCFG_ITLINE29_SR_USART5_GLB_Msk (0x1UL << SYSCFG_ITLINE29_SR_USART5_GLB_Pos) /*!< 0x00000004 */ -#define SYSCFG_ITLINE29_SR_USART5_GLB SYSCFG_ITLINE29_SR_USART5_GLB_Msk /*!< USART5 GLB Interrupt */ -#define SYSCFG_ITLINE29_SR_USART6_GLB_Pos (3U) -#define SYSCFG_ITLINE29_SR_USART6_GLB_Msk (0x1UL << SYSCFG_ITLINE29_SR_USART6_GLB_Pos) /*!< 0x00000008 */ -#define SYSCFG_ITLINE29_SR_USART6_GLB SYSCFG_ITLINE29_SR_USART6_GLB_Msk /*!< USART6 GLB Interrupt */ -#define SYSCFG_ITLINE29_SR_USART7_GLB_Pos (4U) -#define SYSCFG_ITLINE29_SR_USART7_GLB_Msk (0x1UL << SYSCFG_ITLINE29_SR_USART7_GLB_Pos) /*!< 0x00000010 */ -#define SYSCFG_ITLINE29_SR_USART7_GLB SYSCFG_ITLINE29_SR_USART7_GLB_Msk /*!< USART7 GLB Interrupt */ -#define SYSCFG_ITLINE29_SR_USART8_GLB_Pos (5U) -#define SYSCFG_ITLINE29_SR_USART8_GLB_Msk (0x1UL << SYSCFG_ITLINE29_SR_USART8_GLB_Pos) /*!< 0x00000020 */ -#define SYSCFG_ITLINE29_SR_USART8_GLB SYSCFG_ITLINE29_SR_USART8_GLB_Msk /*!< USART8 GLB Interrupt */ -#define SYSCFG_ITLINE30_SR_CAN_Pos (0U) -#define SYSCFG_ITLINE30_SR_CAN_Msk (0x1UL << SYSCFG_ITLINE30_SR_CAN_Pos) /*!< 0x00000001 */ -#define SYSCFG_ITLINE30_SR_CAN SYSCFG_ITLINE30_SR_CAN_Msk /*!< CAN Interrupt */ -#define SYSCFG_ITLINE30_SR_CEC_Pos (1U) -#define SYSCFG_ITLINE30_SR_CEC_Msk (0x1UL << SYSCFG_ITLINE30_SR_CEC_Pos) /*!< 0x00000002 */ -#define SYSCFG_ITLINE30_SR_CEC SYSCFG_ITLINE30_SR_CEC_Msk /*!< CEC Interrupt */ - -/*****************************************************************************/ -/* */ -/* Timers (TIM) */ -/* */ -/*****************************************************************************/ -/******************* Bit definition for TIM_CR1 register *******************/ -#define TIM_CR1_CEN_Pos (0U) -#define TIM_CR1_CEN_Msk (0x1UL << TIM_CR1_CEN_Pos) /*!< 0x00000001 */ -#define TIM_CR1_CEN TIM_CR1_CEN_Msk /*!
© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.
- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx - * @{ - */ - -#ifndef __STM32F0xx_H -#define __STM32F0xx_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Library_configuration_section - * @{ - */ - -/** - * @brief STM32 Family - */ -#if !defined (STM32F0) -#define STM32F0 -#endif /* STM32F0 */ - -/** Uncomment the line below according to the target STM32 device used in your application. - * stm32f0xxxx.h file contains: - * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices - * - IRQ channel definition - * - Peripheral memory mapping and physical registers address definition - * - Peripheral pointer declaration and driver header file inclusion - * - Product miscellaneous configuration: assert macros - * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-familys superset. - */ - -#if !defined (STM32F030x6) && !defined (STM32F030x8) && \ - !defined (STM32F031x6) && !defined (STM32F038xx) && \ - !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \ - !defined (STM32F051x8) && !defined (STM32F058xx) && \ - !defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \ - !defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC) - /* #define STM32F030x6 */ /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F030x8 */ /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes) */ - /* #define STM32F031x6 */ /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */ - /* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F048xx */ /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes) */ - /* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */ - /* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */ - /* #define STM32F070x6 */ /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ - /* #define STM32F070xB */ /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */ - /* #define STM32F071xB */ /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */ - /* #define STM32F072xB */ /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */ - /* #define STM32F078xx */ /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes) */ - /* #define STM32F030xC */ /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes) */ - /* #define STM32F091xC */ /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes) */ - /* #define STM32F098xx */ /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes) */ -#endif -/* Legacy aliases */ -#if defined (STM32F048x6) - #define STM32F048xx -#endif /* STM32F048x6 */ - -/* Tip: To avoid modifying this file each time you need to switch between these - devices, you can define the device in your toolchain compiler preprocessor. - */ -#if !defined (USE_HAL_DRIVER) -/** - * @brief Comment the line below if you will not use the peripherals drivers. - In this case, these drivers will not be included and the application code will - be based on direct access to peripherals registers - */ - /*#define USE_HAL_DRIVER */ -#endif /* USE_HAL_DRIVER */ - -/** - * @brief CMSIS Device version number V2.3.6 - */ -#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */ -#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ -#define __STM32F0_DEVICE_VERSION_SUB2 (0x06) /*!< [15:8] sub2 version */ -#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */ -#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\ - |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\ - |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\ - |(__STM32F0_DEVICE_VERSION_RC)) - -/** - * @} - */ - -/** @addtogroup Device_Included - * @{ - */ - -#if defined(STM32F030x6) - #include "stm32f030x6.h" -#elif defined(STM32F030x8) - #include "stm32f030x8.h" -#elif defined(STM32F031x6) - #include "stm32f031x6.h" -#elif defined(STM32F038xx) - #include "stm32f038xx.h" -#elif defined(STM32F042x6) - #include "stm32f042x6.h" -#elif defined(STM32F048xx) - #include "stm32f048xx.h" -#elif defined(STM32F051x8) - #include "stm32f051x8.h" -#elif defined(STM32F058xx) - #include "stm32f058xx.h" -#elif defined(STM32F070x6) - #include "stm32f070x6.h" -#elif defined(STM32F070xB) - #include "stm32f070xb.h" -#elif defined(STM32F071xB) - #include "stm32f071xb.h" -#elif defined(STM32F072xB) - #include "stm32f072xb.h" -#elif defined(STM32F078xx) - #include "stm32f078xx.h" -#elif defined(STM32F091xC) - #include "stm32f091xc.h" -#elif defined(STM32F098xx) - #include "stm32f098xx.h" -#elif defined(STM32F030xC) - #include "stm32f030xc.h" -#else - #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)" -#endif - -/** - * @} - */ - -/** @addtogroup Exported_types - * @{ - */ -typedef enum -{ - RESET = 0U, - SET = !RESET -} FlagStatus, ITStatus; - -typedef enum -{ - DISABLE = 0U, - ENABLE = !DISABLE -} FunctionalState; -#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) - -typedef enum -{ - SUCCESS = 0U, - ERROR = !SUCCESS -} ErrorStatus; - -/** - * @} - */ - - -/** @addtogroup Exported_macros - * @{ - */ -#define SET_BIT(REG, BIT) ((REG) |= (BIT)) - -#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) - -#define READ_BIT(REG, BIT) ((REG) & (BIT)) - -#define CLEAR_REG(REG) ((REG) = (0x0)) - -#define WRITE_REG(REG, VAL) ((REG) = (VAL)) - -#define READ_REG(REG) ((REG)) - -#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) - -/* Use of interrupt control for register exclusive access */ -/* Atomic 32-bit register access macro to set one or several bits */ -#define ATOMIC_SET_BIT(REG, BIT) \ - do { \ - uint32_t primask; \ - primask = __get_PRIMASK(); \ - __set_PRIMASK(1); \ - SET_BIT((REG), (BIT)); \ - __set_PRIMASK(primask); \ - } while(0) - -/* Atomic 32-bit register access macro to clear one or several bits */ -#define ATOMIC_CLEAR_BIT(REG, BIT) \ - do { \ - uint32_t primask; \ - primask = __get_PRIMASK(); \ - __set_PRIMASK(1); \ - CLEAR_BIT((REG), (BIT)); \ - __set_PRIMASK(primask); \ - } while(0) - -/* Atomic 32-bit register access macro to clear and set one or several bits */ -#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ - do { \ - uint32_t primask; \ - primask = __get_PRIMASK(); \ - __set_PRIMASK(1); \ - MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \ - __set_PRIMASK(primask); \ - } while(0) - -/* Atomic 16-bit register access macro to set one or several bits */ -#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \ - -/* Atomic 16-bit register access macro to clear one or several bits */ -#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \ - -/* Atomic 16-bit register access macro to clear and set one or several bits */ -#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ - -/** - * @} - */ - -#if defined (USE_HAL_DRIVER) - #include "stm32f0xx_hal.h" -#endif /* USE_HAL_DRIVER */ - - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* __STM32F0xx_H */ -/** - * @} - */ - -/** - * @} - */ - - - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/STM32F091RB/Drivers/CMSIS/Device/system_stm32f0xx.h b/hw/STM32F091RB/Drivers/CMSIS/Device/system_stm32f0xx.h deleted file mode 100644 index 3b71cfe..0000000 --- a/hw/STM32F091RB/Drivers/CMSIS/Device/system_stm32f0xx.h +++ /dev/null @@ -1,105 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f0xx.h - * @author MCD Application Team - * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx_system - * @{ - */ - -/** - * @brief Define to prevent recursive inclusion - */ -#ifndef __SYSTEM_STM32F0XX_H -#define __SYSTEM_STM32F0XX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup STM32F0xx_System_Includes - * @{ - */ - -/** - * @} - */ - - -/** @addtogroup STM32F0xx_System_Exported_types - * @{ - */ - /* This variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 3) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) by calling HAL API function HAL_RCC_ClockConfig() - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ -extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ -extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Functions - * @{ - */ - -extern void SystemInit(void); -extern void SystemCoreClockUpdate(void); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__SYSTEM_STM32F0XX_H */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/STM32G070RB/Core/Inc/main.h b/hw/STM32G070RB/Core/Inc/main.h deleted file mode 100644 index 28c0a8a..0000000 --- a/hw/STM32G070RB/Core/Inc/main.h +++ /dev/null @@ -1 +0,0 @@ -#include "stm32g070xx.h" \ No newline at end of file diff --git a/hw/STM32G070RB/Core/Src/core_init.c b/hw/STM32G070RB/Core/Src/core_init.c deleted file mode 100644 index 9f1bd78..0000000 --- a/hw/STM32G070RB/Core/Src/core_init.c +++ /dev/null @@ -1,7 +0,0 @@ -#include "stm32g070xx.h" - -#include "core_init.h" - -void core_init(void) -{ -} \ No newline at end of file diff --git a/hw/STM32G070RB/Core/Src/main.c b/hw/STM32G070RB/Core/Src/main.c deleted file mode 100644 index 3eb33cd..0000000 --- a/hw/STM32G070RB/Core/Src/main.c +++ /dev/null @@ -1,33 +0,0 @@ -/** - ****************************************************************************** - * @file : main.c - * @author : Auto-generated by STM32CubeIDE - * @brief : Main program body - ****************************************************************************** - * @attention - * - * Copyright (c) 2022 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -#include -#include "main.h" -#include "core_init.h" - -#if !defined(__SOFT_FP__) && defined(__ARM_FP) - #warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use." -#endif - -int main(void) -{ - core_init(); - - /* Loop forever */ - for(;;); -} diff --git a/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_compiler.h b/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_compiler.h deleted file mode 100644 index adbf296..0000000 --- a/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_compiler.h +++ /dev/null @@ -1,283 +0,0 @@ -/**************************************************************************//** - * @file cmsis_compiler.h - * @brief CMSIS compiler generic header file - * @version V5.1.0 - * @date 09. October 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_COMPILER_H -#define __CMSIS_COMPILER_H - -#include - -/* - * Arm Compiler 4/5 - */ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - - -/* - * Arm Compiler 6.6 LTM (armclang) - */ -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100) - #include "cmsis_armclang_ltm.h" - - /* - * Arm Compiler above 6.10.1 (armclang) - */ -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) - #include "cmsis_armclang.h" - - -/* - * GNU Compiler - */ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - - -/* - * IAR Compiler - */ -#elif defined ( __ICCARM__ ) - #include - - -/* - * TI Arm Compiler - */ -#elif defined ( __TI_ARM__ ) - #include - - #ifndef __ASM - #define __ASM __asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) - #endif - #ifndef __USED - #define __USED __attribute__((used)) - #endif - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - #ifndef __PACKED - #define __PACKED __attribute__((packed)) - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed)) - #endif - #ifndef __PACKED_UNION - #define __PACKED_UNION union __attribute__((packed)) - #endif - #ifndef __UNALIGNED_UINT32 /* deprecated */ - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __UNALIGNED_UINT16_WRITE - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT16_READ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) - #endif - #ifndef __UNALIGNED_UINT32_WRITE - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT32_READ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) - #endif - #ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) - #endif - #ifndef __RESTRICT - #define __RESTRICT __restrict - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -/* - * TASKING Compiler - */ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - - #ifndef __ASM - #define __ASM __asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) - #endif - #ifndef __USED - #define __USED __attribute__((used)) - #endif - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - #ifndef __PACKED - #define __PACKED __packed__ - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __packed__ - #endif - #ifndef __PACKED_UNION - #define __PACKED_UNION union __packed__ - #endif - #ifndef __UNALIGNED_UINT32 /* deprecated */ - struct __packed__ T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __UNALIGNED_UINT16_WRITE - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT16_READ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) - #endif - #ifndef __UNALIGNED_UINT32_WRITE - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT32_READ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) - #endif - #ifndef __ALIGNED - #define __ALIGNED(x) __align(x) - #endif - #ifndef __RESTRICT - #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. - #define __RESTRICT - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -/* - * COSMIC Compiler - */ -#elif defined ( __CSMC__ ) - #include - - #ifndef __ASM - #define __ASM _asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - // NO RETURN is automatically detected hence no warning here - #define __NO_RETURN - #endif - #ifndef __USED - #warning No compiler specific solution for __USED. __USED is ignored. - #define __USED - #endif - #ifndef __WEAK - #define __WEAK __weak - #endif - #ifndef __PACKED - #define __PACKED @packed - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT @packed struct - #endif - #ifndef __PACKED_UNION - #define __PACKED_UNION @packed union - #endif - #ifndef __UNALIGNED_UINT32 /* deprecated */ - @packed struct T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __UNALIGNED_UINT16_WRITE - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT16_READ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) - #endif - #ifndef __UNALIGNED_UINT32_WRITE - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT32_READ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) - #endif - #ifndef __ALIGNED - #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. - #define __ALIGNED(x) - #endif - #ifndef __RESTRICT - #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. - #define __RESTRICT - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -#else - #error Unknown compiler. -#endif - - -#endif /* __CMSIS_COMPILER_H */ - diff --git a/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_version.h b/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_version.h deleted file mode 100644 index f2e2746..0000000 --- a/hw/STM32G070RB/Drivers/CMSIS/Include/cmsis_version.h +++ /dev/null @@ -1,39 +0,0 @@ -/**************************************************************************//** - * @file cmsis_version.h - * @brief CMSIS Core(M) Version definitions - * @version V5.0.3 - * @date 24. June 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CMSIS_VERSION_H -#define __CMSIS_VERSION_H - -/* CMSIS Version definitions */ -#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ -#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */ -#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ - __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ -#endif diff --git a/hw/STM32G070RB/Drivers/CMSIS/Include/mpu_armv7.h b/hw/STM32G070RB/Drivers/CMSIS/Include/mpu_armv7.h deleted file mode 100644 index 66ef59b..0000000 --- a/hw/STM32G070RB/Drivers/CMSIS/Include/mpu_armv7.h +++ /dev/null @@ -1,272 +0,0 @@ -/****************************************************************************** - * @file mpu_armv7.h - * @brief CMSIS MPU API for Armv7-M MPU - * @version V5.1.0 - * @date 08. March 2019 - ******************************************************************************/ -/* - * Copyright (c) 2017-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef ARM_MPU_ARMV7_H -#define ARM_MPU_ARMV7_H - -#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes -#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes -#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes -#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes -#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes -#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte -#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes -#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes -#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes -#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes -#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes -#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes -#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes -#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes -#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes -#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte -#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes -#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes -#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes -#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes -#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes -#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes -#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes -#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes -#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes -#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte -#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes -#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes - -#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access -#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only -#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only -#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access -#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only -#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access - -/** MPU Region Base Address Register Value -* -* \param Region The region to be configured, number 0 to 15. -* \param BaseAddress The base address for the region. -*/ -#define ARM_MPU_RBAR(Region, BaseAddress) \ - (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \ - ((Region) & MPU_RBAR_REGION_Msk) | \ - (MPU_RBAR_VALID_Msk)) - -/** -* MPU Memory Access Attributes -* -* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. -* \param IsShareable Region is shareable between multiple bus masters. -* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. -* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. -*/ -#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ - ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ - (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ - (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \ - (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk)) - -/** -* MPU Region Attribute and Size Register Value -* -* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. -* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. -* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. -* \param SubRegionDisable Sub-region disable field. -* \param Size Region size of the region to be configured, for example 4K, 8K. -*/ -#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \ - ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ - (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ - (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \ - (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \ - (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \ - (((MPU_RASR_ENABLE_Msk)))) - -/** -* MPU Region Attribute and Size Register Value -* -* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. -* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. -* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. -* \param IsShareable Region is shareable between multiple bus masters. -* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. -* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. -* \param SubRegionDisable Sub-region disable field. -* \param Size Region size of the region to be configured, for example 4K, 8K. -*/ -#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ - ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) - -/** -* MPU Memory Access Attribute for strongly ordered memory. -* - TEX: 000b -* - Shareable -* - Non-cacheable -* - Non-bufferable -*/ -#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) - -/** -* MPU Memory Access Attribute for device memory. -* - TEX: 000b (if shareable) or 010b (if non-shareable) -* - Shareable or non-shareable -* - Non-cacheable -* - Bufferable (if shareable) or non-bufferable (if non-shareable) -* -* \param IsShareable Configures the device memory as shareable or non-shareable. -*/ -#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) - -/** -* MPU Memory Access Attribute for normal memory. -* - TEX: 1BBb (reflecting outer cacheability rules) -* - Shareable or non-shareable -* - Cacheable or non-cacheable (reflecting inner cacheability rules) -* - Bufferable or non-bufferable (reflecting inner cacheability rules) -* -* \param OuterCp Configures the outer cache policy. -* \param InnerCp Configures the inner cache policy. -* \param IsShareable Configures the memory as shareable or non-shareable. -*/ -#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U)) - -/** -* MPU Memory Access Attribute non-cacheable policy. -*/ -#define ARM_MPU_CACHEP_NOCACHE 0U - -/** -* MPU Memory Access Attribute write-back, write and read allocate policy. -*/ -#define ARM_MPU_CACHEP_WB_WRA 1U - -/** -* MPU Memory Access Attribute write-through, no write allocate policy. -*/ -#define ARM_MPU_CACHEP_WT_NWA 2U - -/** -* MPU Memory Access Attribute write-back, no write allocate policy. -*/ -#define ARM_MPU_CACHEP_WB_NWA 3U - - -/** -* Struct for a single MPU Region -*/ -typedef struct { - uint32_t RBAR; //!< The region base address register value (RBAR) - uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR -} ARM_MPU_Region_t; - -/** Enable the MPU. -* \param MPU_Control Default access permissions for unconfigured regions. -*/ -__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) -{ - MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; -#endif - __DSB(); - __ISB(); -} - -/** Disable the MPU. -*/ -__STATIC_INLINE void ARM_MPU_Disable(void) -{ - __DMB(); -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; -#endif - MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; -} - -/** Clear and disable the given MPU region. -* \param rnr Region number to be cleared. -*/ -__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) -{ - MPU->RNR = rnr; - MPU->RASR = 0U; -} - -/** Configure an MPU region. -* \param rbar Value for RBAR register. -* \param rsar Value for RSAR register. -*/ -__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) -{ - MPU->RBAR = rbar; - MPU->RASR = rasr; -} - -/** Configure the given MPU region. -* \param rnr Region number to be configured. -* \param rbar Value for RBAR register. -* \param rsar Value for RSAR register. -*/ -__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) -{ - MPU->RNR = rnr; - MPU->RBAR = rbar; - MPU->RASR = rasr; -} - -/** Memcopy with strictly ordered memory access, e.g. for register targets. -* \param dst Destination data is copied to. -* \param src Source data is copied from. -* \param len Amount of data words to be copied. -*/ -__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) -{ - uint32_t i; - for (i = 0U; i < len; ++i) - { - dst[i] = src[i]; - } -} - -/** Load the given number of MPU regions from a table. -* \param table Pointer to the MPU configuration table. -* \param cnt Amount of regions to be configured. -*/ -__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) -{ - const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; - while (cnt > MPU_TYPE_RALIASES) { - ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); - table += MPU_TYPE_RALIASES; - cnt -= MPU_TYPE_RALIASES; - } - ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize); -} - -#endif diff --git a/hw/STM32G070RB/Drivers/STM32G0_Drivers/deleteMe.txt b/hw/STM32G070RB/Drivers/STM32G0_Drivers/deleteMe.txt deleted file mode 100644 index e69de29..0000000 diff --git a/reports/Code_Coverage/info.txt b/reports/Code_Coverage/info.txt deleted file mode 100644 index 21cb249..0000000 --- a/reports/Code_Coverage/info.txt +++ /dev/null @@ -1,14 +0,0 @@ -This folder will contain output from GCov tool. Look at the template task shown below - - // { // to use it replace "template" with specific module and provide whole"directory_to_your_project_folder" for exampel "D_/Projects/Project_a" - // "label": "template module.c code coverage report generation", - // "type": "shell", - // "command": "python -m gcovr CMakeFiles/template_test.dir/directory_to_your_project_folder -r ../../.. --html-details ../../../reports/Code_Coverage/template_gcov_report.html", - // "args": [], - // "options": { - // "cwd": "${workspaceFolder}/test/template/out" - // }, - // "group": "test", - - // }, - Delete this file after generating first report. \ No newline at end of file diff --git a/reports/Code_Coverage/lcd_hd44780_gcov_report.functions.html b/reports/Code_Coverage/lcd_hd44780_gcov_report.functions.html index c087afc..e2c90da 100644 --- a/reports/Code_Coverage/lcd_hd44780_gcov_report.functions.html +++ b/reports/Code_Coverage/lcd_hd44780_gcov_report.functions.html @@ -23,7 +23,7 @@

GCC Code Coverage Report

Date: - 2023-12-08 00:43:02 + 2024-01-12 11:24:32 @@ -38,21 +38,21 @@

GCC Code Coverage Report

Lines: - 73 - 73 - 100.0% + 228 + 230 + 99.1% Functions: - 12 - 12 + 35 + 35 100.0% Branches: - 2 - 2 - 100.0% + 46 + 47 + 97.9% @@ -74,170 +74,492 @@

GCC Code Coverage Report

- lcd_char + check_lcd_buf_possition_ptr_overflow + + + src\lcd_hd44780.c + + + 438 + + + called 837 times + + + + + copy_lcd_buf_2_prev_lcd_buf + + + src\lcd_hd44780.c + + + 445 + + + called 469 times + + + + + fill_bin_value_buffer + + + src\lcd_hd44780.c + + + 403 + + + called 27 times + + + + + fill_zeros_buffer + + + src\lcd_hd44780.c + + + 423 + + + called 27 times + + + + + lcd_bin + + + src\lcd_hd44780.c + + + 671 + + + called 14 times + + + + + lcd_blinking_cursor_on + + + src\lcd_hd44780.c + + + 763 + + + called 7 times + + + + + lcd_buf_bin + + + src\lcd_hd44780.c + + + 881 + + + called 13 times + + + + + lcd_buf_char + + + src\lcd_hd44780.c + + + 780 + + + called 63 times + + + + + lcd_buf_cls + + + src\lcd_hd44780.c + + + 770 + + + called 382 times + + + + + lcd_buf_hex + + + src\lcd_hd44780.c + + + 856 + + + called 32 times + + + + + lcd_buf_int + + + src\lcd_hd44780.c + + + 829 + + + called 28 times + + + + + lcd_buf_locate + + + src\lcd_hd44780.c + + + 787 + + + called 87 times + + + + + lcd_buf_str + + + src\lcd_hd44780.c + + + 792 + + + called 160 times + + + + + lcd_char + + + src\lcd_hd44780.c + + + 587 + + + called 348 times + + + + + lcd_cls + + + src\lcd_hd44780.c + + + 540 + + + called 382 times + + + + + lcd_cursor_off + + + src\lcd_hd44780.c + + + 754 + + + called 7 times + + + + + lcd_cursor_on + + + src\lcd_hd44780.c + + + 744 + + + called 7 times + + + + + lcd_def_char + + + src\lcd_hd44780.c + + + 558 + + + called 63 times + + + + + lcd_hex + + + src\lcd_hd44780.c + + + 645 + + + called 28 times + + + + + lcd_home + + + src\lcd_hd44780.c + + + 731 + + + called 7 times + + + + + lcd_init + + + src\lcd_hd44780.c + + + 495 + + + called 375 times + + + + + lcd_int + + + src\lcd_hd44780.c + + + 617 + + + called 28 times + + + + + lcd_load_char_bank + + + src\lcd_hd44780.c + + + 568 + + + called 7 times + + + + + lcd_locate - src\lcd_hd44780.c + src\lcd_hd44780.c - 238 + 699 - called 2 times + called 439 times - lcd_cls + lcd_reset_all_SIG - src\lcd_hd44780.c + src\lcd_hd44780.c - 195 + 136 - called 16 times + called 375 times - lcd_def_char + lcd_set_all_SIG - src\lcd_hd44780.c + src\lcd_hd44780.c - 210 + 127 - called 18 times + called 375 times - lcd_init + lcd_str - src\lcd_hd44780.c + src\lcd_hd44780.c - 156 + 598 - called 14 times + called 77 times - lcd_load_char_bank + lcd_update - src\lcd_hd44780.c + src\lcd_hd44780.c - 220 + 802 - called 2 times + called 94 times - lcd_reset_all_SIG + lcd_write_4bit_data - src\lcd_hd44780.c + src\lcd_hd44780.c - 78 + 145 - called 14 times + called 8118 times - lcd_set_all_SIG + lcd_write_byte - src\lcd_hd44780.c + src\lcd_hd44780.c - 69 + 165 - called 14 times + called 3309 times - lcd_write_4bit_data + lcd_write_cmd - src\lcd_hd44780.c + src\lcd_hd44780.c - 87 + 153 - called 536 times + called 2100 times - lcd_write_byte + lcd_write_data - src\lcd_hd44780.c + src\lcd_hd44780.c - 107 + 159 - called 240 times + called 1209 times - lcd_write_cmd + register_LCD_IO_driver - src\lcd_hd44780.c + src\lcd_hd44780.c - 95 + 122 - called 94 times + called 375 times - lcd_write_data + update_lcd_curosr_possition - src\lcd_hd44780.c + src\lcd_hd44780.c - 101 + 455 - called 146 times + called 7520 times - register_LCD_IO_driver + write_lcd_buf_2_lcd - src\lcd_hd44780.c + src\lcd_hd44780.c - 64 + 471 - called 14 times + called 7520 times diff --git a/reports/Code_Coverage/lcd_hd44780_gcov_report.html b/reports/Code_Coverage/lcd_hd44780_gcov_report.html index d7dbd0b..ad43667 100644 --- a/reports/Code_Coverage/lcd_hd44780_gcov_report.html +++ b/reports/Code_Coverage/lcd_hd44780_gcov_report.html @@ -23,7 +23,7 @@

GCC Code Coverage Report

Date: - 2023-12-08 00:43:02 + 2024-01-12 11:24:32 Coverage: @@ -46,21 +46,21 @@

GCC Code Coverage Report

Lines: - 73 - 73 - 100.0% + 228 + 230 + 99.1% Functions: - 12 - 12 + 35 + 35 100.0% Branches: - 2 - 2 - 100.0% + 46 + 47 + 97.9% @@ -93,14 +93,14 @@

GCC Code Coverage Report

lcd_hd44780.c - 100.0 + 99.1 - 100.0% - 73 / 73 + 99.1% + 228 / 230 100.0% - 12 / 12 - 100.0% - 2 / 2 + 35 / 35 + 97.9% + 46 / 47 diff --git a/reports/Code_Coverage/lcd_hd44780_gcov_report.lcd_hd44780.c.9b5fec2915da14d10e466e7fb812c453.html b/reports/Code_Coverage/lcd_hd44780_gcov_report.lcd_hd44780.c.9b5fec2915da14d10e466e7fb812c453.html index 38f7778..fa04692 100644 --- a/reports/Code_Coverage/lcd_hd44780_gcov_report.lcd_hd44780.c.9b5fec2915da14d10e466e7fb812c453.html +++ b/reports/Code_Coverage/lcd_hd44780_gcov_report.lcd_hd44780.c.9b5fec2915da14d10e466e7fb812c453.html @@ -27,7 +27,7 @@

GCC Code Coverage Report

Date: - 2023-12-08 00:43:02 + 2024-01-12 11:24:32 @@ -41,21 +41,21 @@

GCC Code Coverage Report

Lines: - 73 - 73 - 100.0% + 228 + 230 + 99.1% Functions: - 12 - 12 + 35 + 35 100.0% Branches: - 2 - 2 - 100.0% + 46 + 47 + 97.9% @@ -75,134 +75,387 @@

GCC Code Coverage Report

- lcd_char + check_lcd_buf_possition_ptr_overflow + + + 438 + + + called 837 times + + + + + copy_lcd_buf_2_prev_lcd_buf + + + 445 + + + called 469 times + + + + + fill_bin_value_buffer + + + 403 + + + called 27 times + + + + + fill_zeros_buffer + + + 423 + + + called 27 times + + + + + lcd_bin + + + 671 + + + called 14 times + + + + + lcd_blinking_cursor_on + + + 763 + + + called 7 times + + + + + lcd_buf_bin + + + 881 + + + called 13 times + + + + + lcd_buf_char + + + 780 + + + called 63 times + + + + + lcd_buf_cls + + + 770 + + + called 382 times + + + + + lcd_buf_hex + + + 856 + + + called 32 times + + + + + lcd_buf_int + + + 829 + + + called 28 times + + + + + lcd_buf_locate + + + 787 + + + called 87 times + + + + + lcd_buf_str + + + 792 + + + called 160 times + + + + + lcd_char + + + 587 + + + called 348 times + + + + + lcd_cls + + + 540 + + + called 382 times + + + + + lcd_cursor_off + + + 754 + + + called 7 times + + + + + lcd_cursor_on + + + 744 + + + called 7 times + + + + + lcd_def_char + + + 558 + + + called 63 times + + + + + lcd_hex + + + 645 + + + called 28 times + + + + + lcd_home + + + 731 + + + called 7 times + + + + + lcd_init + + + 495 + + + called 375 times + + + + + lcd_int + + + 617 + + + called 28 times + + + + + lcd_load_char_bank + + + 568 + + + called 7 times + + + + + lcd_locate - 238 + 699 - called 2 times + called 439 times - lcd_cls + lcd_reset_all_SIG - 195 + 136 - called 16 times + called 375 times - lcd_def_char + lcd_set_all_SIG - 210 + 127 - called 18 times + called 375 times - lcd_init + lcd_str - 156 + 598 - called 14 times + called 77 times - lcd_load_char_bank + lcd_update - 220 + 802 - called 2 times + called 94 times - lcd_reset_all_SIG + lcd_write_4bit_data - 78 + 145 - called 14 times + called 8118 times - lcd_set_all_SIG + lcd_write_byte - 69 + 165 - called 14 times + called 3309 times - lcd_write_4bit_data + lcd_write_cmd - 87 + 153 - called 536 times + called 2100 times - lcd_write_byte + lcd_write_data - 107 + 159 - called 240 times + called 1209 times - lcd_write_cmd + register_LCD_IO_driver - 95 + 122 - called 94 times + called 375 times - lcd_write_data + update_lcd_curosr_possition - 101 + 455 - called 146 times + called 7520 times - register_LCD_IO_driver + write_lcd_buf_2_lcd - 64 + 471 - called 14 times + called 7520 times @@ -252,7 +505,7 @@

GCC Code Coverage Report

- * @Last Modified time: 2023-12-08 00:01:47 + * @Last Modified time: 2024-01-10 18:04:17 6 @@ -287,84 +540,84 @@

GCC Code Coverage Report

- + #include <stdio.h> 11 - #define BUSY_FLAG 1 << 7 + #include <stdlib.h> 12 - + #include <string.h> 13 - // LCD driver commands + 14 - // clang-format off + typedef char lcd_pos_t; 15 - #define LCDC_CLS 0x01 + // clang-format off 16 - #define LCDC_HOME 0x02 + #define BUSY_FLAG 1 << 7 17 - /********************************/ + #define VAL_PREFIX_LENGHT 2U 18 - #define LCDC_ENTRY_MODE 0x04 + 19 - #define LCDC_ENTRYR 0x02 + // LCD driver commands 20 - #define LCDC_ENTRYL 0x00 + #define LCDC_CLS 0x01 21 - #define LCDC_MOVE 0x01 + #define LCDC_HOME 0x02 22 @@ -378,70 +631,70 @@

GCC Code Coverage Report

- #define LCDC_ONOFF 0x08 + #define LCDC_ENTRY_MODE 0x04 24 - #define LCDC_DISPLAYON 0x04 + #define LCDC_ENTRYR 0x02 25 - #define LCDC_CURSORON 0x02 + #define LCDC_ENTRYL 0x00 26 - #define LCDC_CURSOROFF 0x00 + #define LCDC_MOVE 0x01 27 - #define LCDC_BLINKON 0x01 + /********************************/ 28 - /********************************/ + #define LCDC_ONOFF 0x08 29 - #define LCDC_SHIFT 0x10 + #define LCDC_DISPLAYON 0x04 30 - #define LCDC_SHIFTDISP 0x08 + #define LCDC_CURSORON 0x02 31 - #define LCDC_SHIFTR 0x04 + #define LCDC_CURSOROFF 0x00 32 - #define LCDC_SHIFTL 0x00 + #define LCDC_BLINKON 0x01 33 @@ -455,203 +708,203 @@

GCC Code Coverage Report

- #define LCDC_FUNC 0x20 + #define LCDC_SHIFT 0x10 35 - #define LCDC_FUNC8B 0x10 + #define LCDC_SHIFTDISP 0x08 36 - #define LCDC_FUNC4B 0x00 + #define LCDC_SHIFTR 0x04 37 - #define LCDC_FUNC2L 0x08 + #define LCDC_SHIFTL 0x00 38 - #define LCDC_FUNC1L 0x00 + /********************************/ 39 - #define LCDC_FUNC5x10 0x04 + #define LCDC_FUNC 0x20 40 - #define LCDC_FUNC5x7 0x00 + #define LCDC_FUNC8B 0x10 41 - /********************************/ + #define LCDC_FUNC4B 0x00 42 - #define LCDC_SET_CGRAM 0x40 + #define LCDC_FUNC2L 0x08 43 - #define LCDC_SET_DDRAM 0x80 + #define LCDC_FUNC1L 0x00 44 - // clang-format on + #define LCDC_FUNC5x10 0x04 45 - + #define LCDC_FUNC5x7 0x00 46 - + /********************************/ 47 - + #define LCDC_SET_CGRAM 0x40 48 - + #define LCDC_SET_DDRAM 0x80 49 - static const struct LCD_IO_driver_interface_struct *LCD = NULL; + 50 - // const struct char_bank_struct *char_bank = &char_bank_1; + #ifndef UNIT_TEST 51 - + #define PRIVATE static 52 - static void register_LCD_IO_driver(void); + #else 53 - static void lcd_set_all_SIG(void); + #define PRIVATE 54 - static void lcd_reset_all_SIG(void); + #endif 55 - static void lcd_write_4bit_data(uint8_t data); + 56 - static void lcd_write_cmd(uint8_t cmd); + #if LCD_BUFFERING == ON 57 - static void lcd_write_data(uint8_t data); + 58 - static void lcd_write_byte(uint8_t byte); + #define LAST_CHAR_IN_LCD_LINE (LCD_X-1) 59 - #if USE_RW_PIN == ON + #define LAST_LCD_LINE (LCD_Y-1) 60 - static uint8_t lcd_read_byte(void); + 61 - static uint8_t lcd_read_4bit_data(void); + PRIVATE char lcd_buffer[LCD_Y][LCD_X]; 62 - #endif + PRIVATE char prev_lcd_buffer[LCD_Y][LCD_X]; 63 @@ -664,92 +917,92 @@

GCC Code Coverage Report

64 - 14 - static void register_LCD_IO_driver(void) + + static lcd_pos_t *lcd_buf_position_ptr; 65 - { + #endif 66 - 14 - LCD = LCD_IO_driver_interface_get(); + + 67 - 14 - } + + static const struct LCD_IO_driver_interface_struct *LCD = NULL; 68 - + bool LCD_UPDATE_EVENT = false; 69 - 14 - static void lcd_set_all_SIG(void) + + 70 - { + static void register_LCD_IO_driver(void); 71 - 14 - LCD->set_SIG(LCD_E); + + static void lcd_set_all_SIG(void); 72 - 14 - LCD->set_SIG(LCD_RS); + + static void lcd_reset_all_SIG(void); 73 - #if USE_RW_PIN == ON + static void lcd_write_4bit_data(uint8_t data); 74 - LCD->set_SIG(LCD_RW); + static void lcd_write_cmd(uint8_t cmd); 75 - #endif + static void lcd_write_data(uint8_t data); 76 - 14 - } + + static void lcd_write_byte(uint8_t byte); 77 @@ -762,932 +1015,932 @@

GCC Code Coverage Report

78 - 14 - static void lcd_reset_all_SIG(void) + + #if USE_RW_PIN == ON 79 - { + static uint8_t lcd_read_byte(void); 80 - #if USE_RW_PIN == ON + static uint8_t lcd_read_4bit_data(void); 81 - LCD->reset_SIG(LCD_RW); + #endif 82 - #endif + #ifdef AVR 83 - 14 - LCD->reset_SIG(LCD_RS); + + #if ((USE_LCD_INT == ON) || (USE_LCD_HEX == ON)) 84 - 14 - LCD->reset_SIG(LCD_E); + + static void lcd_put_spaces(uint8_t empty_spaces); 85 - 14 - } + + #endif 86 - + #if USE_LCD_INT == ON 87 - 536 - void lcd_write_4bit_data(uint8_t data) + + static void lcd_int_AVR(int val, uint8_t width, enum alignment alignment); 88 - { + #endif 89 - 536 - LCD->set_SIG(LCD_E); + + #if USE_LCD_HEX == ON 90 - 536 - data &= 0x0F; + + static void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment); 91 - 536 - LCD->write_data(data); + + #endif 92 - 536 - LCD->reset_SIG(LCD_E); + + #if USE_LCD_BIN == ON 93 - 536 - } + + static void lcd_bin_AVR(int val, uint8_t width); 94 - + #endif 95 - 94 - static void lcd_write_cmd(uint8_t cmd) + + #if LCD_BUFFERING == ON 96 - { + #if ((USE_LCD_BUF_INT == ON) || (USE_LCD_BUF_HEX == ON)) 97 - 94 - LCD->reset_SIG(LCD_RS); + + static void lcd_buf_put_spaces(uint8_t empty_spaces); 98 - 94 - lcd_write_byte(cmd); + + #endif 99 - 94 - } + + #if USE_LCD_BUF_INT == ON 100 - + static void lcd_buf_int_AVR(int val, uint8_t width, enum alignment alignment); 101 - 146 - void lcd_write_data(uint8_t data) + + #endif 102 - { + #if USE_LCD_BUF_HEX == ON 103 - 146 - LCD->set_SIG(LCD_RS); + + static void lcd_buf_hex_AVR(int val, uint8_t width, enum alignment alignment); 104 - 146 - lcd_write_byte(data); + + #endif 105 - 146 - } + + #if USE_LCD_BUF_BIN == ON 106 - + static void lcd_buf_bin_AVR(int val, uint8_t width); 107 - 240 - void lcd_write_byte(uint8_t byte) + + #endif 108 - { + #endif 109 - #if USE_RW_PIN == ON + #else 110 - LCD->reset_SIG(LCD_RW); + #if (USE_LCD_BIN == ON || ((LCD_BUFFERING == ON) && (LCD_USE_BUF_BIN == ON))) 111 - #endif + static void fill_bin_value_buffer(int val, char *bin_val_buffer); 112 - 240 - lcd_write_4bit_data((byte) >> 4); + + static void fill_zeros_buffer(const char *buffer, uint8_t width, char *zeros_buf); 113 - 240 - lcd_write_4bit_data((byte)&0x0F); + + #endif 114 - #if USE_RW_PIN == ON + #endif 115 - //check_BUSSY_FALG + #if LCD_BUFFERING==ON 116 - LCD->set_data_pins_as_inputs(); + static void check_lcd_buf_possition_ptr_overflow(void); 117 - LCD->reset_SIG(LCD_RS); + static void copy_lcd_buf_2_prev_lcd_buf(void); 118 - LCD->set_SIG(LCD_RW); + static void update_lcd_curosr_possition(uint8_t *lcd_cursor_position,uint8_t *lcd_line, uint8_t *missed_char_counter_in_LCD_line); 119 - while (lcd_read_byte() & BUSY_FLAG) + static void write_lcd_buf_2_lcd(const uint8_t *lcd_cursor_position,const uint8_t *lcd_line,uint8_t * missed_char_counter_in_LCD_line, const lcd_pos_t *prev_lcd_buff_pos_ptr); 120 - { + #endif 121 - } + 122 - - LCD->reset_SIG(LCD_RW); + 375 + static void register_LCD_IO_driver(void) 123 - LCD->set_data_pins_as_outputs(); + { 124 - - + 375 + LCD = LCD_IO_driver_interface_get(); 125 - - #else + 375 + } 126 - 240 - LCD->delay_us(120); + + 127 - - #endif + 375 + static void lcd_set_all_SIG(void) 128 - 240 - } + + { 129 - - + 375 + LCD->set_SIG(LCD_E); 130 - - #if USE_RW_PIN == ON + 375 + LCD->set_SIG(LCD_RS); 131 - uint8_t lcd_read_byte(void) + #if USE_RW_PIN == ON 132 - { + LCD->set_SIG(LCD_RW); 133 - uint8_t data; + #endif 134 - - //read 4 MSB + 375 + } 135 - data = (lcd_read_4bit_data() << 4); + 136 - - //read 4 LSB + 375 + static void lcd_reset_all_SIG(void) 137 - data |= (lcd_read_4bit_data() & 0x0F); + { 138 - return data; + #if USE_RW_PIN == ON 139 - } + LCD->reset_SIG(LCD_RW); 140 - + #endif 141 - - uint8_t lcd_read_4bit_data(void) + 375 + LCD->reset_SIG(LCD_RS); 142 - - { + 375 + LCD->reset_SIG(LCD_E); 143 - - uint8_t data; + 375 + } 144 - LCD->set_SIG(LCD_E); + 145 - - data = LCD->read_data(); + 8118 + void lcd_write_4bit_data(uint8_t data) 146 - LCD->reset_SIG(LCD_E); + { 147 - - return data; + 8118 + LCD->set_SIG(LCD_E); 148 - - } + 8118 + data &= 0x0F; 149 - - #endif + 8118 + LCD->write_data(data); 150 - - + 8118 + LCD->reset_SIG(LCD_E); 151 - - /** + 8118 + } 152 - * @brief Function that initialize LCD in 4-bit mode with or without LCD R/W Pin handling. + 153 - - * @attention LCD R/W handling should be configured in lcd_hd44780_config.h by setting USE_RW_PIN to 1 (Enable R/W Pin + 2100 + static void lcd_write_cmd(uint8_t cmd) 154 - * handling) or 0 (disable R/W Pin handling). + { 155 - - */ + 2100 + LCD->reset_SIG(LCD_RS); 156 - 14 - void lcd_init(void) + 2100 + lcd_write_byte(cmd); 157 - - { + 2100 + } 158 - 14 - register_LCD_IO_driver(); + + 159 - 14 - LCD->init_LCD_pins(); + 1209 + void lcd_write_data(uint8_t data) 160 - /**************************BASIC LCD INIT - basing on DS init procedure***************************************/ + { 161 - - // set all LCD signals to High for more than 15ms ->bit different then in DS base on other implementation from internet + 1209 + LCD->set_SIG(LCD_RS); 162 - 14 - lcd_set_all_SIG(); + 1209 + lcd_write_byte(data); 163 - 14 - LCD->delay_us(15000); + 1209 + } 164 - 14 - lcd_reset_all_SIG(); + + 165 - - // send 0x03 & wait more then 4,1ms + 3309 + void lcd_write_byte(uint8_t byte) 166 - 14 - lcd_write_4bit_data(0x03); + + { 167 - 14 - LCD->delay_us(4500); + + #if USE_RW_PIN == ON 168 - // send 0x03 & wait more then 100us + LCD->reset_SIG(LCD_RW); 169 - 14 - lcd_write_4bit_data(0x03); + + #endif 170 - 14 - LCD->delay_us(110); + 3309 + lcd_write_4bit_data((byte) >> 4); 171 - - // send 0x03 & wait more then 100us + 3309 + lcd_write_4bit_data((byte) & 0x0F); 172 - 14 - lcd_write_4bit_data(0x03); + + #if USE_RW_PIN == ON 173 - 14 - LCD->delay_us(110); + + // check_BUSSY_FALG 174 - // send 0x02 & wait more then 100us + LCD->set_data_pins_as_inputs(); 175 - 14 - lcd_write_4bit_data(0x02); + + LCD->reset_SIG(LCD_RS); 176 - 14 - LCD->delay_us(110); + + LCD->set_SIG(LCD_RW); 177 - // FUNCTION SET ->send cmd -> LCD in 4-bit mode, 2 rows, char size 5x7 + while (lcd_read_byte() & BUSY_FLAG) 178 - 14 - lcd_write_cmd(LCDC_FUNC | LCDC_FUNC4B | LCDC_FUNC2L | LCDC_FUNC5x7); + + { 179 - // DISPLAY_ON_OFF send cmd -> enable lcd + } 180 - 14 - lcd_write_cmd(LCDC_ONOFF | LCDC_CURSOROFF | LCDC_DISPLAYON); + + LCD->reset_SIG(LCD_RW); 181 - // LCD clear screen + LCD->set_data_pins_as_outputs(); 182 - 14 - lcd_cls(); + + 183 - // ENTRY MODe SET do not shift LCD shift cursor right after placing a char + #else 184 - 14 - lcd_write_cmd(LCDC_ENTRY_MODE | LCDC_ENTRYR); + 3309 + LCD->delay_us(120); 185 - /*********************************END of BASIC LCD INIT***************************************/ + #endif 186 - - + 3309 + } 187 - // ToDo define sepcial characters in LCD CGRAM + 188 - + #if USE_RW_PIN == ON 189 - 14 - } + + uint8_t lcd_read_byte(void) 190 - + { 191 - /** + uint8_t data; 192 - * @brief Function that clear the LCD screen and set the cursor on the position of first character in first line of LCD + // read 4 MSB 193 - * screen. + data = (lcd_read_4bit_data() << 4); 194 - */ + // read 4 LSB 195 - 16 - void lcd_cls(void) + + data |= (lcd_read_4bit_data() & 0x0F); 196 - { + return data; 197 - 16 - lcd_write_cmd (LCDC_CLS); + + } 198 - 16 - LCD->delay_us(4900); + + 199 - 16 - } + + uint8_t lcd_read_4bit_data(void) 200 - + { 201 - /** + uint8_t data; 202 - * @brief Function for defining custom user characters in CGRAM of the LCD. + LCD->set_SIG(LCD_E); 203 - * @param CGRAM_char_index Position/addres of the character in CGRAM of the LCD where defined char should be written. + data = LCD->read_data(); 204 - * For the predefined example of special characters, taken values are defined in the type enum LCD_CGRAM that is defined + LCD->reset_SIG(LCD_E); 205 - * in lcd-hd44780.h + return data; 206 - * @param def_char Pointer to the predefined special character. + } 207 - * @note CGRAM_char_index - This Parameter can take values from 0 to 7. For the predefined example of special + #endif 208 - * characters, taken values are defined in the type enum LCD_CGRAM that is defined in lcd-hd44780.h + #ifdef AVR 209 - */ + #if ((USE_LCD_INT == ON) || (USE_LCD_HEX == ON)) 210 - 18 - void lcd_def_char(enum LCD_CGRAM CGRAM_char_index, const uint8_t *def_char) + + static void lcd_put_spaces(uint8_t empty_spaces) 211 @@ -1700,231 +1953,5015 @@

GCC Code Coverage Report

212 - 18 - lcd_write_cmd(LCDC_SET_CGRAM | ((DEF_CHAR_ADR_MASK & CGRAM_char_index) * LCD_CGRAM_BYTES_PER_CHAR)); + + for (uint8_t i = 0; i < empty_spaces; i++) 213 -
- 2/2 -
-
✓ Branch 0 taken 144 times.
-
✓ Branch 1 taken 18 times.
-
-
- 162 - for (uint8_t j = 0; j < LCD_CGRAM_BYTES_PER_CHAR; j++) + + { 214 - { + lcd_char(' '); 215 - 144 - lcd_write_data(def_char[j]); + + } 216 - } + } 217 - 18 - lcd_write_cmd(LCDC_SET_DDRAM); + + #endif 218 - 18 - } + + #if USE_LCD_INT == ON 219 - + static void lcd_int_AVR(int val, uint8_t width, enum alignment alignment) 220 - 2 - void lcd_load_char_bank(const struct char_bank_struct *char_bank) + + { 221 - { + uint8_t buf_lenght = 0; 222 - 2 - lcd_def_char(0,char_bank->char_0); + + char buffer[20]; // 19chars for 64 bit int + end char '\0' 223 - 2 - lcd_def_char(1,char_bank->char_1); + + buffer[0] = '\0'; 224 - 2 - lcd_def_char(2,char_bank->char_2); + + itoa(val, buffer, 10); 225 - 2 - lcd_def_char(3,char_bank->char_3); + + buf_lenght = strlen(buffer); 226 - 2 - lcd_def_char(4,char_bank->char_4); + + if (buf_lenght >= (width)) 227 - 2 - lcd_def_char(5,char_bank->char_5); + + { 228 - 2 - lcd_def_char(6,char_bank->char_6); + + lcd_str(buffer); 229 - 2 - lcd_def_char(7,char_bank->char_7); + + } 230 - 2 - } + + else 231 - + { 232 - /** + uint8_t empty_spaces_qty = width - buf_lenght; 233 - * @brief Function for print the char on the LCD screen under current position of the LCD cursor. + if (alignment == right) 234 - * @param C char (for example '1') or it's ASCI code (0x31). + { 235 - * @note For user defined char, place CGRAM_char_index (Position/addres of the character in CGRAM of the LCD where + lcd_put_spaces(empty_spaces_qty); 236 - * defined char was written). + lcd_str(buffer); 237 - */ + } 238 - 2 - void lcd_char(char C) + + else 239 - { + { 240 - 2 - uint8_t data = (uint8_t)(C); + + lcd_str(buffer); 241 - 2 - lcd_write_data(data); + + lcd_put_spaces(empty_spaces_qty); 242 - 2 - } + + } 243 + } + + + 244 + + + + } + + + 245 + + + + #endif + + + 246 + + + + #if USE_LCD_HEX == ON + + + 247 + + + + static void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment) + + + 248 + + + + { + + + 249 + + + + char buffer[17]; + + + 250 + + + + buffer[0] = '\0'; + + + 251 + + + + itoa(val, buffer, 16); + + + 252 + + + + static const char *prefix = {"0x"}; + + + 253 + + + + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + + + 254 + + + + { + + + 255 + + + + lcd_str(prefix); + + + 256 + + + + lcd_str(buffer); + + + 257 + + + + } + + + 258 + + + + else + + + 259 + + + + { + + + 260 + + + + uint8_t empty_spaces_qty = width - (VAL_PREFIX_LENGHT + strlen(buffer)); + + + 261 + + + + + + + 262 + + + + if (alignment == right) + + + 263 + + + + { + + + 264 + + + + lcd_put_spaces(empty_spaces_qty); + + + 265 + + + + lcd_str(prefix); + + + 266 + + + + lcd_str(buffer); + + + 267 + + + + } + + + 268 + + + + else + + + 269 + + + + { + + + 270 + + + + lcd_str(prefix); + + + 271 + + + + lcd_str(buffer); + + + 272 + + + + lcd_put_spaces(empty_spaces_qty); + + + 273 + + + + } + + + 274 + + + + } + + + 275 + + + + } + + + 276 + + + + #endif + + + 277 + + + + #if USE_LCD_BIN == ON + + + 278 + + + + static void lcd_bin_AVR(int val, uint8_t width) + + + 279 + + + + { + + + 280 + + + + char buffer[35]; // 0b 0000 0000 0000 0000 0000 0000 0000 0000 + + + 281 + + + + static const char *prefix = {"0b"}; + + + 282 + + + + buffer[0] = '\0'; + + + 283 + + + + + + + 284 + + + + itoa(val, buffer, 2); + + + 285 + + + + // if (buf_lenght < (width - VAL_PREFIX_LENGHT)) + + + 286 + + + + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + + + 287 + + + + { + + + 288 + + + + lcd_str(prefix); + + + 289 + + + + lcd_str(buffer); + + + 290 + + + + } + + + 291 + + + + else + + + 292 + + + + { + + + 293 + + + + uint8_t zeros_qty = (width - (VAL_PREFIX_LENGHT + strlen(buffer))); + + + 294 + + + + lcd_str(prefix); + + + 295 + + + + for (uint8_t i = 0; i < zeros_qty; i++) + + + 296 + + + + { + + + 297 + + + + lcd_char('0'); + + + 298 + + + + } + + + 299 + + + + lcd_str(buffer); + + + 300 + + + + } + + + 301 + + + + } + + + 302 + + + + #endif + + + 303 + + + + + + + 304 + + + + #if LCD_BUFFERING== ON + + + 305 + + + + #if ((USE_LCD_BUF_INT == ON) || (USE_LCD_BUF_HEX == ON)) + + + 306 + + + + static void lcd_buf_put_spaces(uint8_t empty_spaces) + + + 307 + + + + { + + + 308 + + + + for (uint8_t i = 0; i < empty_spaces; i++) + + + 309 + + + + { + + + 310 + + + + lcd_buf_char(' '); + + + 311 + + + + } + + + 312 + + + + } + + + 313 + + + + #endif + + + 314 + + + + #if USE_LCD_BUF_INT == ON + + + 315 + + + + static void lcd_buf_int_AVR(int val, uint8_t width, enum alignment alignment) + + + 316 + + + + { + + + 317 + + + + uint8_t buf_lenght = 0; + + + 318 + + + + char buffer[20]; // 19chars for 64 bit int + end char '\0' + + + 319 + + + + buffer[0] = '\0'; + + + 320 + + + + itoa(val, buffer, 10); + + + 321 + + + + buf_lenght = strlen(buffer); + + + 322 + + + + if (buf_lenght >= (width)) + + + 323 + + + + { + + + 324 + + + + lcd_buf_str(buffer); + + + 325 + + + + } + + + 326 + + + + else + + + 327 + + + + { + + + 328 + + + + uint8_t empty_spaces_qty = width - buf_lenght; + + + 329 + + + + if (alignment == right) + + + 330 + + + + { + + + 331 + + + + lcd_buf_put_spaces(empty_spaces_qty); + + + 332 + + + + lcd_buf_str(buffer); + + + 333 + + + + } + + + 334 + + + + else + + + 335 + + + + { + + + 336 + + + + lcd_buf_str(buffer); + + + 337 + + + + lcd_buf_put_spaces(empty_spaces_qty); + + + 338 + + + + } + + + 339 + + + + } + + + 340 + + + + } + + + 341 + + + + #endif + + + 342 + + + + + + + 343 + + + + #if USE_LCD_BUF_HEX == ON + + + 344 + + + + void lcd_buf_hex_AVR(int val, uint8_t width, enum alignment alignment) + + + 345 + + + + { + + + 346 + + + + char buffer[17]; + + + 347 + + + + buffer[0] = '\0'; + + + 348 + + + + itoa(val, buffer, 16); + + + 349 + + + + static const char *prefix = {"0x"}; + + + 350 + + + + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + + + 351 + + + + { + + + 352 + + + + lcd_buf_str(prefix); + + + 353 + + + + lcd_buf_str(buffer); + + + 354 + + + + } + + + 355 + + + + else + + + 356 + + + + { + + + 357 + + + + uint8_t empty_spaces_qty = width - (VAL_PREFIX_LENGHT + strlen(buffer)); + + + 358 + + + + + + + 359 + + + + if (alignment == right) + + + 360 + + + + { + + + 361 + + + + lcd_buf_put_spaces(empty_spaces_qty); + + + 362 + + + + lcd_buf_str(prefix); + + + 363 + + + + lcd_buf_str(buffer); + + + 364 + + + + } + + + 365 + + + + else + + + 366 + + + + { + + + 367 + + + + lcd_buf_str(prefix); + + + 368 + + + + lcd_buf_str(buffer); + + + 369 + + + + lcd_buf_put_spaces(empty_spaces_qty); + + + 370 + + + + } + + + 371 + + + + } + + + 372 + + + + } + + + 373 + + + + #endif + + + 374 + + + + #if USE_LCD_BUF_BIN == ON + + + 375 + + + + static void lcd_buf_bin_AVR(int val, uint8_t width) + + + 376 + + + + { + + + 377 + + + + char buffer[35]; // 0b 0000 0000 0000 0000 0000 0000 0000 0000 + + + 378 + + + + static const char *prefix = {"0b"}; + + + 379 + + + + buffer[0] = '\0'; + + + 380 + + + + + + + 381 + + + + itoa(val, buffer, 2); + + + 382 + + + + // if (buf_lenght < (width - VAL_PREFIX_LENGHT)) + + + 383 + + + + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + + + 384 + + + + { + + + 385 + + + + lcd_buf_str(prefix); + + + 386 + + + + lcd_buf_str(buffer); + + + 387 + + + + } + + + 388 + + + + else + + + 389 + + + + { + + + 390 + + + + uint8_t zeros_qty = (width - (VAL_PREFIX_LENGHT + strlen(buffer))); + + + 391 + + + + lcd_buf_str(prefix); + + + 392 + + + + for (uint8_t i = 0; i < zeros_qty; i++) + + + 393 + + + + { + + + 394 + + + + lcd_buf_char('0'); + + + 395 + + + + } + + + 396 + + + + lcd_buf_str(buffer); + + + 397 + + + + } + + + 398 + + + + } + + + 399 + + + + #endif + + + 400 + + + + #endif + + + 401 + + + + #else + + + 402 + + + + #if USE_LCD_BIN == ON + + + 403 + + + 27 + static void fill_bin_value_buffer(int val, char *bin_val_buffer) + + + 404 + + + + { + + + 405 + + + 27 + uint32_t bit_mask = 0x80000000; + + + 406 + +
+ 2/2 +
+
✓ Branch 0 taken 864 times.
+
✓ Branch 1 taken 27 times.
+
+
+ + 891 + while (bit_mask != 0) + + + 407 + + + + { + + + 408 + +
+ 2/2 +
+
✓ Branch 0 taken 54 times.
+
✓ Branch 1 taken 810 times.
+
+
+ + 864 + if ((bit_mask & val) != 0) + + + 409 + + + + { + + + 410 + + + 54 + strcat(bin_val_buffer, "1"); + + + 411 + + + + } + + + 412 + + + + else + + + 413 + + + + { + + + 414 + +
+ 2/2 +
+
✓ Branch 0 taken 27 times.
+
✓ Branch 1 taken 783 times.
+
+
+ + 810 + if (strlen(bin_val_buffer) != 0) + + + 415 + + + + { + + + 416 + + + 27 + strcat(bin_val_buffer, "0"); + + + 417 + + + + } + + + 418 + + + + } + + + 419 + + + 864 + bit_mask = bit_mask >> 1; + + + 420 + + + + } + + + 421 + + + 27 + } + + + 422 + + + + + + + 423 + + + 27 + static void fill_zeros_buffer(const char *buffer, uint8_t width, char *zeros_buf) + + + 424 + + + + { + + + 425 + +
+ 2/2 +
+
✓ Branch 0 taken 15 times.
+
✓ Branch 1 taken 12 times.
+
+
+ + 27 + if (strlen(buffer) < (width + VAL_PREFIX_LENGHT)) + + + 426 + + + + { + + + 427 + + + 15 + uint8_t zeros_qty = width - ((strlen(buffer) + VAL_PREFIX_LENGHT)); + + + 428 + +
+ 2/2 +
+
✓ Branch 0 taken 15 times.
+
✓ Branch 1 taken 15 times.
+
+
+ + 30 + for (uint8_t t = 0; t < zeros_qty; t++) + + + 429 + + + + { + + + 430 + + + 15 + strcat(zeros_buf, "0"); + + + 431 + + + + } + + + 432 + + + + } + + + 433 + + + 27 + } + + + 434 + + + + #endif + + + 435 + + + + #endif + + + 436 + + + + + + + 437 + + + + #if LCD_BUFFERING==ON + + + 438 + + + 837 + static void check_lcd_buf_possition_ptr_overflow(void) + + + 439 + + + + { + + + 440 + +
+ 2/2 +
+
✓ Branch 0 taken 21 times.
+
✓ Branch 1 taken 816 times.
+
+
+ + 837 + if(++lcd_buf_position_ptr>&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]) + + + 441 + + + + { + + + 442 + + + 21 + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + + + 443 + + + + } + + + 444 + + + 837 + } + + + 445 + + + 469 + static void copy_lcd_buf_2_prev_lcd_buf(void) + + + 446 + + + + { + + + 447 + +
+ 2/2 +
+
✓ Branch 0 taken 1876 times.
+
✓ Branch 1 taken 469 times.
+
+
+ + 2345 + for(uint8_t y=0;y<LCD_Y;y++) + + + 448 + + + + { + + + 449 + +
+ 2/2 +
+
✓ Branch 0 taken 37520 times.
+
✓ Branch 1 taken 1876 times.
+
+
+ + 39396 + for(uint8_t x=0;x<LCD_X;x++) + + + 450 + + + + { + + + 451 + + + 37520 + prev_lcd_buffer[y][x]=lcd_buffer[y][x]; + + + 452 + + + + } + + + 453 + + + + } + + + 454 + + + 469 + } + + + 455 + + + 7520 + static void update_lcd_curosr_possition(uint8_t *lcd_cursor_position,uint8_t *lcd_line, uint8_t *missed_char_counter_in_LCD_line) + + + 456 + + + + { + + + 457 + +
+ 2/2 +
+
✓ Branch 0 taken 376 times.
+
✓ Branch 1 taken 7144 times.
+
+
+ + 7520 + if((++(*lcd_cursor_position))>=LCD_X) + + + 458 + + + + { + + + 459 + + + 376 + *lcd_cursor_position=0; + + + 460 + + + 376 + (*lcd_line)++; + + + 461 + + + 376 + *missed_char_counter_in_LCD_line=0; + + + 462 + +
+ 2/2 +
+
✓ Branch 0 taken 94 times.
+
✓ Branch 1 taken 282 times.
+
+
+ + 376 + if(*lcd_line==LCD_Y) + + + 463 + + + + { + + + 464 + + + 94 + *lcd_line=LINE_1; + + + 465 + + + + } + + + 466 + + + 376 + lcd_locate(*lcd_line,*lcd_cursor_position); + + + 467 + + + + + + + 468 + + + + } + + + 469 + + + 7520 + } + + + 470 + + + + + + + 471 + + + 7520 + void write_lcd_buf_2_lcd(const uint8_t * lcd_cursor_position, const uint8_t *lcd_line, uint8_t * missed_char_counter_in_LCD_line, const lcd_pos_t *prev_lcd_buff_pos_ptr) + + + 472 + + + + { + + + 473 + +
+ 2/2 +
+
✓ Branch 0 taken 341 times.
+
✓ Branch 1 taken 7179 times.
+
+
+ + 7520 + if(*lcd_buf_position_ptr!=*prev_lcd_buff_pos_ptr) + + + 474 + + + + { + + + 475 + +
+ 2/2 +
+
✓ Branch 0 taken 28 times.
+
✓ Branch 1 taken 313 times.
+
+
+ + 341 + if (*missed_char_counter_in_LCD_line!=0) + + + 476 + + + + { + + + 477 + + + 28 + lcd_locate(*lcd_line,*lcd_cursor_position); + + + 478 + + + 28 + *missed_char_counter_in_LCD_line=0; + + + 479 + + + + } + + + 480 + + + 341 + lcd_char(*lcd_buf_position_ptr); + + + 481 + + + + } + + + 482 + + + + else + + + 483 + + + + { + + + 484 + + + 7179 + (*missed_char_counter_in_LCD_line)++; + + + 485 + + + + } + + + 486 + + + 7520 + } + + + 487 + + + + + + + 488 + + + + #endif + + + 489 + + + + + + + 490 + + + + /** + + + 491 + + + + * @brief Function that initialize LCD in 4-bit mode with or without LCD R/W Pin handling. + + + 492 + + + + * @attention LCD R/W handling should be configured in lcd_hd44780_config.h by setting USE_RW_PIN to 1 (Enable R/W Pin + + + 493 + + + + * handling) or 0 (disable R/W Pin handling). + + + 494 + + + + */ + + + 495 + + + 375 + void lcd_init(void) + + + 496 + + + + { + + + 497 + + + 375 + register_LCD_IO_driver(); + + + 498 + + + 375 + LCD->init_LCD_pins(); + + + 499 + + + + /**************************BASIC LCD INIT - basing on DS init procedure***************************************/ + + + 500 + + + + // set all LCD signals to High for more than 15ms ->bit different then in DS base on other implementation from internet + + + 501 + + + 375 + lcd_set_all_SIG(); + + + 502 + + + 375 + LCD->delay_us(15000); + + + 503 + + + 375 + lcd_reset_all_SIG(); + + + 504 + + + + // send 0x03 & wait more then 4,1ms + + + 505 + + + 375 + lcd_write_4bit_data(0x03); + + + 506 + + + 375 + LCD->delay_us(4500); + + + 507 + + + + // send 0x03 & wait more then 100us + + + 508 + + + 375 + lcd_write_4bit_data(0x03); + + + 509 + + + 375 + LCD->delay_us(110); + + + 510 + + + + // send 0x03 & wait more then 100us + + + 511 + + + 375 + lcd_write_4bit_data(0x03); + + + 512 + + + 375 + LCD->delay_us(110); + + + 513 + + + + // send 0x02 & wait more then 100us + + + 514 + + + 375 + lcd_write_4bit_data(0x02); + + + 515 + + + 375 + LCD->delay_us(110); + + + 516 + + + + // FUNCTION SET ->send cmd -> LCD in 4-bit mode, 2 rows, char size 5x7 + + + 517 + + + 375 + lcd_write_cmd(LCDC_FUNC | LCDC_FUNC4B | LCDC_FUNC2L | LCDC_FUNC5x7); + + + 518 + + + + // DISPLAY_ON_OFF send cmd -> enable lcd + + + 519 + + + 375 + lcd_write_cmd(LCDC_ONOFF | LCDC_CURSOROFF | LCDC_DISPLAYON); + + + 520 + + + + // LCD clear screen + + + 521 + + + 375 + lcd_cls(); + + + 522 + + + + // ENTRY MODe SET do not shift LCD shift cursor right after placing a char + + + 523 + + + 375 + lcd_write_cmd(LCDC_ENTRY_MODE | LCDC_ENTRYR); + + + 524 + + + + /*********************************END of BASIC LCD INIT***************************************/ + + + 525 + + + + #if LCD_BUFFERING == ON + + + 526 + + + + //clear lcd_buffer by putting spaces inside of the buffer + + + 527 + + + 375 + lcd_buf_cls(); + + + 528 + + + + //copy lcd_buffer with spaces to prev_lcd_buffer + + + 529 + + + 375 + copy_lcd_buf_2_prev_lcd_buf(); + + + 530 + + + + // clear flag due to init procedure that reset lcd screan and buffers + + + 531 + + + 375 + LCD_UPDATE_EVENT=false; + + + 532 + + + + #endif + + + 533 + + + + + + + 534 + + + 375 + } + + + 535 + + + + + + + 536 + + + + /** + + + 537 + + + + * @brief Function that clear the LCD screen and set the cursor on the position of first character in first line of LCD + + + 538 + + + + * screen. + + + 539 + + + + */ + + + 540 + + + 382 + void lcd_cls(void) + + + 541 + + + + { + + + 542 + + + 382 + lcd_write_cmd(LCDC_CLS); + + + 543 + + + + #if USE_RW_PIN == OFF + + + 544 + + + 382 + LCD->delay_us(4900); + + + 545 + + + + #endif + + + 546 + + + 382 + } + + + 547 + + + + + + + 548 + + + + #if USE_DEF_CHAR_FUNCTION == ON + + + 549 + + + + /** + + + 550 + + + + * @brief Function for defining custom user characters in CGRAM of the LCD. + + + 551 + + + + * @param CGRAM_char_index Position/addres of the character in CGRAM of the LCD where defined char should be written. + + + 552 + + + + * For the predefined example of special characters, taken values are defined in the type enum LCD_CGRAM that is defined + + + 553 + + + + * in lcd-hd44780.h + + + 554 + + + + * @param def_char Pointer to the predefined special character. + + + 555 + + + + * @note CGRAM_char_index - This Parameter can take values from 0 to 7. For the predefined example of special + + + 556 + + + + * characters, taken values are defined in the type enum LCD_CGRAM that is defined in lcd-hd44780.h + + + 557 + + + + */ + + + 558 + + + 63 + void lcd_def_char(const uint8_t CGRAM_bank_x_char_adr, const uint8_t *def_char) + + + 559 + + + + { + + + 560 + + + 63 + lcd_write_cmd(LCDC_SET_CGRAM | ((DEF_CHAR_ADR_MASK & CGRAM_bank_x_char_adr) * LCD_CGRAM_BYTES_PER_CHAR)); + + + 561 + +
+ 2/2 +
+
✓ Branch 0 taken 504 times.
+
✓ Branch 1 taken 63 times.
+
+
+ + 567 + for (uint8_t j = 0; j < LCD_CGRAM_BYTES_PER_CHAR; j++) + + + 562 + + + + { + + + 563 + + + 504 + lcd_write_data(def_char[j]); + + + 564 + + + + } + + + 565 + + + 63 + lcd_write_cmd(LCDC_SET_DDRAM); + + + 566 + + + 63 + } + + + 567 + + + + + + + 568 + + + 7 + void lcd_load_char_bank(const struct char_bank_struct *char_bank) + + + 569 + + + + { + + + 570 + + + 7 + lcd_def_char(0, char_bank->char_0); + + + 571 + + + 7 + lcd_def_char(1, char_bank->char_1); + + + 572 + + + 7 + lcd_def_char(2, char_bank->char_2); + + + 573 + + + 7 + lcd_def_char(3, char_bank->char_3); + + + 574 + + + 7 + lcd_def_char(4, char_bank->char_4); + + + 575 + + + 7 + lcd_def_char(5, char_bank->char_5); + + + 576 + + + 7 + lcd_def_char(6, char_bank->char_6); + + + 577 + + + 7 + lcd_def_char(7, char_bank->char_7); + + + 578 + + + 7 + } + + + 579 + + + + #endif + + + 580 + + + + + + + 581 + + + + /** + + + 582 + + + + * @brief Function for print the char on the LCD screen under current position of the LCD cursor. + + + 583 + + + + * @param C char (for example '1') or it's ASCI code (0x31). + + + 584 + + + + * @note For user defined char, place CGRAM_char_index (Position/addres of the character in CGRAM of the LCD where + + + 585 + + + + * defined char was written). + + + 586 + + + + */ + + + 587 + + + 348 + void lcd_char(const char C) + + + 588 + + + + { + + + 589 + + + 348 + uint8_t data = (uint8_t)(C); + + + 590 + + + 348 + lcd_write_data(data); + + + 591 + + + 348 + } + + + 592 + + + + + + + 593 + + + + /** + + + 594 + + + + * @brief Function for printing/writing string on LCD screen. Writing the string on LCD screen start from current LCD + + + 595 + + + + * cursor position. + + + 596 + + + + * @param str string that should be printed/written on the LCD screen + + + 597 + + + + */ + + + 598 + + + 77 + void lcd_str(const char *str) + + + 599 + + + + { + + + 600 + + + + register char znak; + + + 601 + +
+ 2/2 +
+
✓ Branch 0 taken 357 times.
+
✓ Branch 1 taken 77 times.
+
+
+ + 434 + while ((znak = *(str++))) + + + 602 + + + + { + + + 603 + + + 357 + lcd_write_data((uint8_t)(znak)); + + + 604 + + + + } + + + 605 + + + 77 + } + + + 606 + + + + + + + 607 + + + + #if USE_LCD_INT == ON + + + 608 + + + + /** + + + 609 + + + + * @brief Function for print the integer value on the LCD screen under current position of the LCD cursor. + + + 610 + + + + * @param val int type value to print on LCD screen + + + 611 + + + + * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the + + + 612 + + + + * result is padded with blank spaces. The value is not truncated even if the result is larger. + + + 613 + + + + * @param alignment If the value to be printed is shorter than width, this parmaeter will specify aligment of the + + + 614 + + + + * printed tekst value. This parameter can be set to "left" or "right" + + + 615 + + + + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + + + 616 + + + + */ + + + 617 + + + 28 + void lcd_int(int val, uint8_t width, enum alignment alignment) + + + 618 + + + + { + + + 619 + + + + #ifdef AVR + + + 620 + + + + lcd_int_AVR(val, width, alignment); + + + 621 + + + + #else + + + 622 + + + + char buffer[20]; // 19chars for 64 bit int + end char '\0' + + + 623 + + + 28 + buffer[0] = '\0'; + + + 624 + +
+ 2/2 +
+
✓ Branch 0 taken 21 times.
+
✓ Branch 1 taken 7 times.
+
+
+ + 28 + if (alignment == right) + + + 625 + + + 21 + sprintf(buffer, "%*i", width, val); + + + 626 + + + + else + + + 627 + + + 7 + sprintf(buffer, "%-*i", width, val); + + + 628 + + + 28 + lcd_str(buffer); + + + 629 + + + + #endif + + + 630 + + + 28 + } + + + 631 + + + + #endif + + + 632 + + + + + + + 633 + + + + #if USE_LCD_HEX == ON + + + 634 + + + + /** + + + 635 + + + + * @brief Function for print the integer value in hexadecimal format on the LCD screen under current position of the LCD + + + 636 + + + + * cursor. + + + 637 + + + + * @param val int type value to print on LCD screen in hexadecimal format + + + 638 + + + + * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the + + + 639 + + + + * result is padded with blank spaces. The value is not truncated even if the result is larger. Width should contain + + + 640 + + + + * additional 2 characters for '0x' at the begining of the printed value. + + + 641 + + + + * @param alignment If the value to be printed is shorter than width, this parmaeter will specify aligment of the + + + 642 + + + + * printed tekst value. This parameter can be set to "left" or "right" + + + 643 + + + + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + + + 644 + + + + */ + + + 645 + + + 28 + void lcd_hex(int val, uint8_t width, enum alignment alignment) + + + 646 + + + + { + + + 647 + + + + #ifdef AVR + + + 648 + + + + lcd_hex_AVR(val, width, alignment); + + + 649 + + + + #else + + + 650 + + + + char buffer[17]; + + + 651 + + + 28 + buffer[0] = '\0'; + + + 652 + +
+ 2/2 +
+
✓ Branch 0 taken 21 times.
+
✓ Branch 1 taken 7 times.
+
+
+ + 28 + if (alignment == right) + + + 653 + + + 21 + sprintf(buffer, "%#*x", width, val); + + + 654 + + + + else + + + 655 + + + 7 + sprintf(buffer, "%-#*x", width, val); + + + 656 + + + 28 + lcd_str(buffer); + + + 657 + + + + #endif + + + 658 + + + 28 + } + + + 659 + + + + #endif + + + 660 + + + + + + + 661 + + + + #if USE_LCD_BIN == ON + + + 662 + + + + /** + + + 663 + + + + * @brief Function for print the integer value in hexadecimal format on the LCD screen under current position of the LCD + + + 664 + + + + * cursor. + + + 665 + + + + * @param val int type value to print on LCD screen in hexadecimal format + + + 666 + + + + * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the + + + 667 + + + + * result is padded with blank spaces. The value is not truncated even if the result is larger. Width should contain + + + 668 + + + + * additional 2 characters for '0x' at the begining of the printed value. + + + 669 + + + + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + + + 670 + + + + */ + + + 671 + + + 14 + void lcd_bin(int val, uint8_t width) + + + 672 + + + + { + + + 673 + + + + #ifdef AVR + + + 674 + + + + lcd_bin_AVR(val, width); + + + 675 + + + + #else + + + 676 + + + + char buffer[35]; + + + 677 + + + + char bin_val_buffer[35]; + + + 678 + + + + char zeros_buf[35]; + + + 679 + + + 14 + buffer[0] = '\0'; + + + 680 + + + 14 + bin_val_buffer[0] = '\0'; + + + 681 + + + 14 + zeros_buf[0] = '\0'; + + + 682 + + + + + + + 683 + + + 14 + fill_bin_value_buffer(val, bin_val_buffer); + + + 684 + + + 14 + fill_zeros_buffer(bin_val_buffer, width, zeros_buf); + + + 685 + + + 14 + strcat(buffer, "0b"); + + + 686 + + + 14 + strcat(buffer, zeros_buf); + + + 687 + + + 14 + strcat(buffer, bin_val_buffer); + + + 688 + + + 14 + lcd_str(buffer); + + + 689 + + + + #endif + + + 690 + + + 14 + } + + + 691 + + + + + + + 692 + + + + #endif + + + 693 + + + + + + + 694 + + + + /** + + + 695 + + + + * @brief Function that move LCD cursor to specific posiotion located under x and y coordinate + + + 696 + + + + * @param y LCD row/line number. Defined enum value LINE_1, LINE_2,... etc. + + + 697 + + + + * @param x LCD column number. Defined enum value C1, C2, C3,... etc. + + + 698 + + + + */ + + + 699 + + + 439 + void lcd_locate(enum LCD_LINES y, enum LCD_COLUMNS x) + + + 700 + + + + { + + + 701 + +
+ 4/5 +
+
✓ Branch 0 taken 122 times.
+
✓ Branch 1 taken 108 times.
+
✓ Branch 2 taken 101 times.
+
✓ Branch 3 taken 108 times.
+
✗ Branch 4 not taken.
+
+
+ + 439 + switch (y) + + + 702 + + + + { + + + 703 + + + 122 + case 0: + + + 704 + + + 122 + y = LCD_LINE1_ADR; + + + 705 + + + 122 + break; + + + 706 + + + + + + + 707 + + + + #if (LCD_Y > 1) + + + 708 + + + 108 + case 1: + + + 709 + + + 108 + y = LCD_LINE2_ADR; + + + 710 + + + 108 + break; + + + 711 + + + + #endif + + + 712 + + + + #if (LCD_Y > 2) + + + 713 + + + 101 + case 2: + + + 714 + + + 101 + y = LCD_LINE3_ADR; + + + 715 + + + 101 + break; + + + 716 + + + + #endif + + + 717 + + + + #if (LCD_Y > 3) + + + 718 + + + 108 + case 3: + + + 719 + + + 108 + y = LCD_LINE4_ADR; + + + 720 + + + 108 + break; + + + 721 + + + + #endif + + + 722 + + + ✗ + default: + + + 723 + + + ✗ + break; + + + 724 + + + + } + + + 725 + + + 439 + lcd_write_cmd((uint8_t)(LCDC_SET_DDRAM + y + x)); + + + 726 + + + 439 + } + + + 727 + + + + #if USE_LCD_CURSOR_HOME == ON + + + 728 + + + + /** + + + 729 + + + + * @brief Function that move lcd cursor to the first posision at first row of LCD screen + + + 730 + + + + */ + + + 731 + + + 7 + void lcd_home(void) + + + 732 + + + + { + + + 733 + + + 7 + lcd_write_cmd(LCDC_CLS | LCDC_HOME); + + + 734 + + + + #if USE_RW_PIN == OFF + + + 735 + + + 7 + LCD->delay_us(4900); + + + 736 + + + + #endif + + + 737 + + + 7 + } + + + 738 + + + + #endif + + + 739 + + + + + + + 740 + + + + #if USE_LCD_CURSOR_ON == ON + + + 741 + + + + /** + + + 742 + + + + * @brief Function that activates the visibility of the LCD cursor. + + + 743 + + + + */ + + + 744 + + + 7 + void lcd_cursor_on(void) + + + 745 + + + + { + + + 746 + + + 7 + lcd_write_cmd(LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON); + + + 747 + + + 7 + } + + + 748 + + + + #endif + + + 749 + + + + + + + 750 + + + + #if USE_LCD_CURSOR_OFF == ON + + + 751 + + + + /** + + + 752 + + + + * @brief Function that deactivates the visibility and blinking of the LCD cursor. + + + 753 + + + + */ + + + 754 + + + 7 + void lcd_cursor_off(void) + + + 755 + + + + { + + + 756 + + + 7 + lcd_write_cmd(LCDC_ONOFF | LCDC_DISPLAYON); + + + 757 + + + 7 + } + + + 758 + + + + #endif + + + 759 + + + + #if USE_LCD_BLINKING_CURSOR_ON == ON + + + 760 + + + + /** + + + 761 + + + + * @brief Function that activates the visibility and blinking of the LCD cursor. + + + 762 + + + + */ + + + 763 + + + 7 + void lcd_blinking_cursor_on(void) + + + 764 + + + + { + + + 765 + + + 7 + lcd_write_cmd(LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON | LCDC_BLINKON); + + + 766 + + + 7 + } + + + 767 + + + + #endif + + + 768 + + + + + + + 769 + + + + #if LCD_BUFFERING == ON + + + 770 + + + 382 + void lcd_buf_cls(void) + + + 771 + + + + { + + + 772 + +
+ 2/2 +
+
✓ Branch 0 taken 30560 times.
+
✓ Branch 1 taken 382 times.
+
+
+ + 30942 + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) + + + 773 + + + + { + + + 774 + + + 30560 + *lcd_buf_position_ptr=' '; + + + 775 + + + + } + + + 776 + + + 382 + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + + + 777 + + + 382 + LCD_UPDATE_EVENT=true; + + + 778 + + + 382 + } + + + 779 + + + + + + + 780 + + + 63 + void lcd_buf_char(const char c) + + + 781 + + + + { + + + 782 + + + 63 + *lcd_buf_position_ptr=c; + + + 783 + + + 63 + check_lcd_buf_possition_ptr_overflow(); + + + 784 + + + 63 + LCD_UPDATE_EVENT=true; + + + 785 + + + 63 + } + + + 786 + + + + + + + 787 + + + 87 + void lcd_buf_locate(enum LCD_LINES y, enum LCD_COLUMNS x) + + + 788 + + + + { + + + 789 + + + 87 + lcd_buf_position_ptr=&lcd_buffer[y][x]; + + + 790 + + + 87 + } + + + 791 + + + + + + + 792 + + + 160 + void lcd_buf_str(const char *str) + + + 793 + + + + { + + + 794 + +
+ 2/2 +
+
✓ Branch 0 taken 774 times.
+
✓ Branch 1 taken 160 times.
+
+
+ + 934 + while (*str) + + + 795 + + + + { + + + 796 + + + 774 + *(lcd_buf_position_ptr)=*(str++); + + + 797 + + + 774 + check_lcd_buf_possition_ptr_overflow(); + + + 798 + + + + } + + + 799 + + + 160 + LCD_UPDATE_EVENT=true; + + + 800 + + + 160 + } + + + 801 + + + + + + + 802 + + + 94 + void lcd_update(void) + + + 803 + + + + { + + + 804 + + + + static uint8_t lcd_cursor_position=0; + + + 805 + + + + static uint8_t lcd_line=0; + + + 806 + + + + static uint8_t missed_char_counter_in_LCD_line=0; + + + 807 + + + + // static const lcd_pos_t *prev_lcd_buff_pos_ptr=&prev_lcd_buffer[LINE_1][C1]; + + + 808 + + + + + + + 809 + +
+ 2/2 +
+
✓ Branch 0 taken 7520 times.
+
✓ Branch 1 taken 94 times.
+
+
+ + 7614 + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) + + + 810 + + + + { + + + 811 + + + 7520 + write_lcd_buf_2_lcd(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line,&prev_lcd_buffer[LINE_1][C1]); + + + 812 + + + 7520 + update_lcd_curosr_possition(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line); + + + 813 + + + + } + + + 814 + + + 94 + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + + + 815 + + + 94 + copy_lcd_buf_2_prev_lcd_buf(); + + + 816 + + + 94 + LCD_UPDATE_EVENT=false; + + + 817 + + + 94 + } + + + 818 + + + + + + + 819 + + + + #if USE_LCD_BUF_INT == ON + + + 820 + + + + /** + + + 821 + + + + * @brief Function for adding intiger value as string to the LCD buffer under current position of the LCD buffer pointer. + + + 822 + + + + * @param val int type value to add to LCD buffer + + + 823 + + + + * @param width Minimum number of characters to be added to LCD buffer. If the value to be added to the LCD buffer is shorter than width, the + + + 824 + + + + * result is padded with blank spaces. The value to be added to buffer as string is not truncated if the string lenght is larger then width value. + + + 825 + + + + * @param alignment If the value to be added to LCD buffer as string is shorter than width, this parameter will specify alignment of the + + + 826 + + + + * tekst represented the value. This parameter can be set to "left" or "right" + + + 827 + + + + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + + + 828 + + + + */ + + + 829 + + + 28 + void lcd_buf_int(int val, uint8_t width, enum alignment alignment) + + + 830 + + + + { + + + 831 + + + + #ifdef AVR + + + 832 + + + + lcd_buf_int_AVR(val, width, alignment); + + + 833 + + + + #else + + + 834 + + + + char buffer[20]; // 19chars for 64 bit int + end char '\0' + + + 835 + + + 28 + buffer[0] = '\0'; + + + 836 + +
+ 2/2 +
+
✓ Branch 0 taken 21 times.
+
✓ Branch 1 taken 7 times.
+
+
+ + 28 + if (alignment == right) + + + 837 + + + 21 + sprintf(buffer, "%*i", width, val); + + + 838 + + + + else + + + 839 + + + 7 + sprintf(buffer, "%-*i", width, val); + + + 840 + + + 28 + lcd_buf_str(buffer); + + + 841 + + + + #endif + + + 842 + + + 28 + } + + + 843 + + + + #endif + + + 844 + + + + + + + 845 + + + + #if USE_LCD_BUF_HEX == ON + + + 846 + + + + /** + + + 847 + + + + * @brief Function for adding intiger value in hexadecimal format as string to the LCD buffer under current position of the LCD buffer pointer. + + + 848 + + + + * @param val int type value to add to LCD buffer as string in hexadecimal format + + + 849 + + + + * @param width Minimum number of characters to be added to lcd buffer. If the value to be added to buffer is shorter than width, the + + + 850 + + + + * result is padded with blank spaces. The value to be added to buffer as string is not truncated if the string lenght is larger then width value. Width should contain + + + 851 + + + + * additional 2 characters for "0x" at the begining of the value represented as string. example: 0x01-> width=4 + + + 852 + + + + * @param alignment If the value to be added to LCD buffer as string is shorter than width, this parameter will specify alignment of the + + + 853 + + + + * tekst represented the value. This parameter can be set to "left" or "right" + + + 854 + + + + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + + + 855 + + + + */ + + + 856 + + + 32 + void lcd_buf_hex(int val, uint8_t width, enum alignment alignment) + + + 857 + + + + { + + + 858 + + + + #ifdef AVR + + + 859 + + + + lcd_buf_hex_AVR(val, width, alignment); + + + 860 + + + + #else + + + 861 + + + + char buffer[17]; + + + 862 + + + 32 + buffer[0] = '\0'; + + + 863 + +
+ 2/2 +
+
✓ Branch 0 taken 21 times.
+
✓ Branch 1 taken 11 times.
+
+
+ + 32 + if (alignment == right) + + + 864 + + + 21 + sprintf(buffer, "%#*x", width, val); + + + 865 + + + + else + + + 866 + + + 11 + sprintf(buffer, "%-#*x", width, val); + + + 867 + + + 32 + lcd_buf_str(buffer); + + + 868 + + + + #endif + + + 869 + + + 32 + } + + + 870 + + + + #endif + + + 871 + + + + + + + 872 + + + + #if USE_LCD_BUF_BIN == ON + + + 873 + + + + /** + + + 874 + + + + * @brief Function for adding to the LCD buffer the integer value in binary format as string under current position of the LCD buffer pointer + + + 875 + + + + * @param val int type value to be added to the LCD buffer as string in hexadecimal format + + + 876 + + + + * @param width Minimum number of characters to be added to LCD buffer. If the value to be added to buffer as string lenght is shorter than width, the + + + 877 + + + + * result is padded with blank spaces. The value to be added to buffer as string is not truncated if the string lenght represented the value i binary format lenght + + + 878 + + + + * is larger then width value. Width should contain additional 2 characters for "0b" at the begining of the value represented as string. example: 0b01-> width=4 + + + 879 + + + + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + + + 880 + + + + */ + + + 881 + + + 13 + void lcd_buf_bin(int val, uint8_t width) + + + 882 + + + + { + + + 883 + + + + #ifdef AVR + + + 884 + + + + lcd_buf_bin_AVR(val, width); + + + 885 + + + + #else + + + 886 + + + + char buffer[35]; + + + 887 + + + + char bin_val_buffer[35]; + + + 888 + + + + char zeros_buf[35]; + + + 889 + + + 13 + buffer[0] = '\0'; + + + 890 + + + 13 + bin_val_buffer[0] = '\0'; + + + 891 + + + 13 + zeros_buf[0] = '\0'; + + + 892 + + + + + + + 893 + + + 13 + fill_bin_value_buffer(val, bin_val_buffer); + + + 894 + + + 13 + fill_zeros_buffer(bin_val_buffer, width, zeros_buf); + + + 895 + + + 13 + strcat(buffer, "0b"); + + + 896 + + + 13 + strcat(buffer, zeros_buf); + + + 897 + + + 13 + strcat(buffer, bin_val_buffer); + + + 898 + + + 13 + lcd_buf_str(buffer); + + + 899 + + + + #endif + + + 900 + + + 13 + } + + + 901 + + + + + + + 902 + + + + #endif + + + 903 + + + + #endif + + + 904 + + + + + + + 905 + + + diff --git a/reports/Cyclomatic_Complexity/Lizard_report.html b/reports/Cyclomatic_Complexity/Lizard_report.html index 7f71479..fd3b96d 100644 --- a/reports/Cyclomatic_Complexity/Lizard_report.html +++ b/reports/Cyclomatic_Complexity/Lizard_report.html @@ -55,12 +55,12 @@

Code Complexity Report

+ Source file: ../../../src/lcd_hd44780.c - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - + @@ -268,11 +348,211 @@

Code Complexity Report

- + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -339,7 +619,27 @@

Code Complexity Report

- + + + + + + + + + + + + + + + + + + + + + @@ -347,19 +647,344 @@

Code Complexity Report

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Source file: ../../../src/lcd_hd44780_config.h + Source file: ../../../src/lcd_hd44780_def_char.h + Source file: ../../../src/lcd_hd44780_interface.h @@ -369,7 +994,7 @@

Code Complexity Report


- Source file: src/lcd_hd44780.c
Function name Cyclomatic complexity (12) -LOC (21) +LOC (30) Token count @@ -248,18 +248,98 @@

Code Complexity Report

lcd_initlcd_put_spaces 27281
lcd_int_AVR3261043
lcd_hex_AVR3281293
lcd_bin_AVR3221172
lcd_buf_put_spaces220711028
lcd_clslcd_buf_int_AVR3261043
lcd_buf_hex_AVR3281293
lcd_buf_bin_AVR3221172
fill_bin_value_buffer419712
fill_zeros_buffer311703
check_lcd_buf_possition_ptr_overflow27331
copy_lcd_buf_2_prev_lcd_buf310541
update_lcd_curosr_possition314693
write_lcd_buf_2_lcd316714
lcd_init 2231221
lcd_cls2522231
lcd_str2837
lcd_int311703
lcd_hex311703
lcd_bin216982
lcd_locate821722
lcd_home25201
lcd_cursor_on14151
lcd_cursor_off14131
lcd_blinking_cursor_on14171
lcd_buf_cls29551
lcd_buf_char16211
lcd_buf_locate14232
lcd_buf_str29351
lcd_update2141051
lcd_buf_int311703
lcd_buf_hex311703
lcd_buf_bin216982
+ Source file: ../../../src/lcd_hd44780.h
- Source file: src/lcd_hd44780.h
- Source file: src/lcd_hd44780_config.h
- Source file: src/lcd_hd44780_interface.h
diff --git a/src/lcd_hd44780.c b/src/lcd_hd44780.c index a5b03b8..985c2a2 100644 --- a/src/lcd_hd44780.c +++ b/src/lcd_hd44780.c @@ -2,15 +2,16 @@ * @Author: lukasz.niewelt * @Date: 2023-12-06 21:39:30 * @Last Modified by: lukasz.niewelt - * @Last Modified time: 2023-12-13 13:18:13 + * @Last Modified time: 2024-01-10 18:04:17 */ #include "lcd_hd44780.h" #include -#include "stdio.h" -#include "stdlib.h" -#include "string.h" +#include +#include +#include +typedef char lcd_pos_t; // clang-format off #define BUSY_FLAG 1 << 7 #define VAL_PREFIX_LENGHT 2U @@ -46,39 +47,25 @@ #define LCDC_SET_CGRAM 0x40 #define LCDC_SET_DDRAM 0x80 +#ifndef UNIT_TEST +#define PRIVATE static +#else +#define PRIVATE +#endif -/******************** definitions of Line addres for different lcd screens ****************/ -//https://web.alfredstate.edu/faculty/weimandn/lcd/lcd_addressing/lcd_addressing_index.html +#if LCD_BUFFERING == ON -#if LCD_TYPE ==1604 -#define LCD_Y 4 -#define LCD_X 16 -#define LCD_LINE1_ADR 0x00 -#define LCD_LINE2_ADR 0x40 -#define LCD_LINE3_ADR 0x10 -#define LCD_LINE4_ADR 0x50 -#endif +#define LAST_CHAR_IN_LCD_LINE (LCD_X-1) +#define LAST_LCD_LINE (LCD_Y-1) -#if LCD_TYPE==2004 -#define LCD_Y 4 -#define LCD_X 20 -#define LCD_LINE1_ADR 0x00 -#define LCD_LINE2_ADR 0x40 -#define LCD_LINE3_ADR 0x14 -#define LCD_LINE4_ADR 0x54 -#endif +PRIVATE char lcd_buffer[LCD_Y][LCD_X]; +PRIVATE char prev_lcd_buffer[LCD_Y][LCD_X]; -#if LCD_TYPE==1602 -#define LCD_Y 2 -#define LCD_X 16 -#define LCD_LINE1_ADR 0x00 -#define LCD_LINE2_ADR 0x40 +static lcd_pos_t *lcd_buf_position_ptr; #endif -// clang-format on - static const struct LCD_IO_driver_interface_struct *LCD = NULL; -// const struct char_bank_struct *char_bank = &char_bank_1; +bool LCD_UPDATE_EVENT = false; static void register_LCD_IO_driver(void); static void lcd_set_all_SIG(void); @@ -93,14 +80,44 @@ static uint8_t lcd_read_byte(void); static uint8_t lcd_read_4bit_data(void); #endif #ifdef AVR +#if ((USE_LCD_INT == ON) || (USE_LCD_HEX == ON)) static void lcd_put_spaces(uint8_t empty_spaces); +#endif +#if USE_LCD_INT == ON static void lcd_int_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_HEX == ON static void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_BIN == ON static void lcd_bin_AVR(int val, uint8_t width); +#endif +#if LCD_BUFFERING == ON +#if ((USE_LCD_BUF_INT == ON) || (USE_LCD_BUF_HEX == ON)) +static void lcd_buf_put_spaces(uint8_t empty_spaces); +#endif +#if USE_LCD_BUF_INT == ON +static void lcd_buf_int_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_BUF_HEX == ON +static void lcd_buf_hex_AVR(int val, uint8_t width, enum alignment alignment); +#endif +#if USE_LCD_BUF_BIN == ON +static void lcd_buf_bin_AVR(int val, uint8_t width); +#endif +#endif #else +#if (USE_LCD_BIN == ON || ((LCD_BUFFERING == ON) && (LCD_USE_BUF_BIN == ON))) static void fill_bin_value_buffer(int val, char *bin_val_buffer); static void fill_zeros_buffer(const char *buffer, uint8_t width, char *zeros_buf); #endif +#endif +#if LCD_BUFFERING==ON +static void check_lcd_buf_possition_ptr_overflow(void); +static void copy_lcd_buf_2_prev_lcd_buf(void); +static void update_lcd_curosr_possition(uint8_t *lcd_cursor_position,uint8_t *lcd_line, uint8_t *missed_char_counter_in_LCD_line); +static void write_lcd_buf_2_lcd(const uint8_t *lcd_cursor_position,const uint8_t *lcd_line,uint8_t * missed_char_counter_in_LCD_line, const lcd_pos_t *prev_lcd_buff_pos_ptr); +#endif static void register_LCD_IO_driver(void) { @@ -189,6 +206,7 @@ uint8_t lcd_read_4bit_data(void) } #endif #ifdef AVR +#if ((USE_LCD_INT == ON) || (USE_LCD_HEX == ON)) static void lcd_put_spaces(uint8_t empty_spaces) { for (uint8_t i = 0; i < empty_spaces; i++) @@ -196,7 +214,9 @@ static void lcd_put_spaces(uint8_t empty_spaces) lcd_char(' '); } } -void lcd_int_AVR(int val, uint8_t width, enum alignment alignment) +#endif +#if USE_LCD_INT == ON +static void lcd_int_AVR(int val, uint8_t width, enum alignment alignment) { uint8_t buf_lenght = 0; char buffer[20]; // 19chars for 64 bit int + end char '\0' @@ -222,7 +242,9 @@ void lcd_int_AVR(int val, uint8_t width, enum alignment alignment) } } } -void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment) +#endif +#if USE_LCD_HEX == ON +static void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment) { char buffer[17]; buffer[0] = '\0'; @@ -251,7 +273,9 @@ void lcd_hex_AVR(int val, uint8_t width, enum alignment alignment) } } } -void lcd_bin_AVR(int val, uint8_t width) +#endif +#if USE_LCD_BIN == ON +static void lcd_bin_AVR(int val, uint8_t width) { char buffer[35]; // 0b 0000 0000 0000 0000 0000 0000 0000 0000 static const char *prefix = {"0b"}; @@ -275,7 +299,107 @@ void lcd_bin_AVR(int val, uint8_t width) lcd_str(buffer); } } +#endif + +#if LCD_BUFFERING== ON +#if ((USE_LCD_BUF_INT == ON) || (USE_LCD_BUF_HEX == ON)) +static void lcd_buf_put_spaces(uint8_t empty_spaces) +{ + for (uint8_t i = 0; i < empty_spaces; i++) + { + lcd_buf_char(' '); + } +} +#endif +#if USE_LCD_BUF_INT == ON +static void lcd_buf_int_AVR(int val, uint8_t width, enum alignment alignment) +{ + uint8_t buf_lenght = 0; + char buffer[20]; // 19chars for 64 bit int + end char '\0' + buffer[0] = '\0'; + itoa(val, buffer, 10); + buf_lenght = strlen(buffer); + if (buf_lenght >= (width)) + { + lcd_buf_str(buffer); + } + else + { + uint8_t empty_spaces_qty = width - buf_lenght; + if (alignment == right) + { + lcd_buf_put_spaces(empty_spaces_qty); + lcd_buf_str(buffer); + } + else + { + lcd_buf_str(buffer); + lcd_buf_put_spaces(empty_spaces_qty); + } + } +} +#endif + +#if USE_LCD_BUF_HEX == ON +void lcd_buf_hex_AVR(int val, uint8_t width, enum alignment alignment) +{ + char buffer[17]; + buffer[0] = '\0'; + itoa(val, buffer, 16); + static const char *prefix = {"0x"}; + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + { + lcd_buf_str(prefix); + lcd_buf_str(buffer); + } + else + { + uint8_t empty_spaces_qty = width - (VAL_PREFIX_LENGHT + strlen(buffer)); + + if (alignment == right) + { + lcd_buf_put_spaces(empty_spaces_qty); + lcd_buf_str(prefix); + lcd_buf_str(buffer); + } + else + { + lcd_buf_str(prefix); + lcd_buf_str(buffer); + lcd_buf_put_spaces(empty_spaces_qty); + } + } +} +#endif +#if USE_LCD_BUF_BIN == ON +static void lcd_buf_bin_AVR(int val, uint8_t width) +{ + char buffer[35]; // 0b 0000 0000 0000 0000 0000 0000 0000 0000 + static const char *prefix = {"0b"}; + buffer[0] = '\0'; + + itoa(val, buffer, 2); + // if (buf_lenght < (width - VAL_PREFIX_LENGHT)) + if (width <= (strlen(buffer) + VAL_PREFIX_LENGHT)) + { + lcd_buf_str(prefix); + lcd_buf_str(buffer); + } + else + { + uint8_t zeros_qty = (width - (VAL_PREFIX_LENGHT + strlen(buffer))); + lcd_buf_str(prefix); + for (uint8_t i = 0; i < zeros_qty; i++) + { + lcd_buf_char('0'); + } + lcd_buf_str(buffer); + } +} +#endif +#endif #else +#if USE_LCD_BIN == ON static void fill_bin_value_buffer(int val, char *bin_val_buffer) { uint32_t bit_mask = 0x80000000; @@ -295,6 +419,7 @@ static void fill_bin_value_buffer(int val, char *bin_val_buffer) bit_mask = bit_mask >> 1; } } + static void fill_zeros_buffer(const char *buffer, uint8_t width, char *zeros_buf) { if (strlen(buffer) < (width + VAL_PREFIX_LENGHT)) @@ -306,11 +431,64 @@ static void fill_zeros_buffer(const char *buffer, uint8_t width, char *zeros_buf } } } +#endif +#endif + +#if LCD_BUFFERING==ON +static void check_lcd_buf_possition_ptr_overflow(void) +{ + if(++lcd_buf_position_ptr>&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]) + { + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + } +} +static void copy_lcd_buf_2_prev_lcd_buf(void) +{ + for(uint8_t y=0;y=LCD_X) + { + *lcd_cursor_position=0; + (*lcd_line)++; + *missed_char_counter_in_LCD_line=0; + if(*lcd_line==LCD_Y) + { + *lcd_line=LINE_1; + } + lcd_locate(*lcd_line,*lcd_cursor_position); + + } +} + +void write_lcd_buf_2_lcd(const uint8_t * lcd_cursor_position, const uint8_t *lcd_line, uint8_t * missed_char_counter_in_LCD_line, const lcd_pos_t *prev_lcd_buff_pos_ptr) +{ + if(*lcd_buf_position_ptr!=*prev_lcd_buff_pos_ptr) + { + if (*missed_char_counter_in_LCD_line!=0) + { + lcd_locate(*lcd_line,*lcd_cursor_position); + *missed_char_counter_in_LCD_line=0; + } + lcd_char(*lcd_buf_position_ptr); + } + else + { + (*missed_char_counter_in_LCD_line)++; + } +} #endif /** - * @brief Function that initialize LCD in 4-bit mode with or without LCD R/W Pin handling. + * @brief Function that initializes LCD in 4-bit mode with or without LCD R/W Pin handling. * @attention LCD R/W handling should be configured in lcd_hd44780_config.h by setting USE_RW_PIN to 1 (Enable R/W Pin * handling) or 0 (disable R/W Pin handling). */ @@ -318,8 +496,9 @@ void lcd_init(void) { register_LCD_IO_driver(); LCD->init_LCD_pins(); + lcd_disable_backlight(); /**************************BASIC LCD INIT - basing on DS init procedure***************************************/ - // set all LCD signals to High for more than 15ms ->bit different then in DS base on other implementation from internet + // set all LCD signals to High for more than 15ms ->bit different than in DS based on other implementations from the internet lcd_set_all_SIG(); LCD->delay_us(15000); lcd_reset_all_SIG(); @@ -341,15 +520,40 @@ void lcd_init(void) lcd_write_cmd(LCDC_ONOFF | LCDC_CURSOROFF | LCDC_DISPLAYON); // LCD clear screen lcd_cls(); - // ENTRY MODe SET do not shift LCD shift cursor right after placing a char + // ENTRY MODe SET do not shift the LCD shift cursor right after placing a char lcd_write_cmd(LCDC_ENTRY_MODE | LCDC_ENTRYR); /*********************************END of BASIC LCD INIT***************************************/ +#if LCD_BUFFERING == ON + //clear lcd_buffer by putting spaces inside of the buffer + lcd_buf_cls(); + //copy lcd_buffer with spaces to prev_lcd_buffer + copy_lcd_buf_2_prev_lcd_buf(); + // clear flag due to init procedure that reset LCD screen and buffers + LCD_UPDATE_EVENT=false; +#endif + +} - // ToDo define sepcial characters in LCD CGRAM +void lcd_enable_backlight(void) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + LCD->set_SIG(LCD_BCKL); +#else + LCD->reset_SIG(LCD_BCKL); +#endif +} + +void lcd_disable_backlight(void) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + LCD->reset_SIG(LCD_BCKL); +#else + LCD->set_SIG(LCD_BCKL); +#endif } /** - * @brief Function that clear the LCD screen and set the cursor on the position of first character in first line of LCD + * @brief Function that clears the LCD screen and sets the cursor on the position of the first character in the first line of the LCD * screen. */ void lcd_cls(void) @@ -363,7 +567,7 @@ void lcd_cls(void) #if USE_DEF_CHAR_FUNCTION == ON /** * @brief Function for defining custom user characters in CGRAM of the LCD. - * @param CGRAM_char_index Position/addres of the character in CGRAM of the LCD where defined char should be written. + * @param CGRAM_char_index Position/address of the character in CGRAM of the LCD where defined char should be written. * For the predefined example of special characters, taken values are defined in the type enum LCD_CGRAM that is defined * in lcd-hd44780.h * @param def_char Pointer to the predefined special character. @@ -394,9 +598,9 @@ void lcd_load_char_bank(const struct char_bank_struct *char_bank) #endif /** - * @brief Function for print the char on the LCD screen under current position of the LCD cursor. - * @param C char (for example '1') or it's ASCI code (0x31). - * @note For user defined char, place CGRAM_char_index (Position/addres of the character in CGRAM of the LCD where + * @brief Function for printing the char on the LCD screen under the current position of the LCD cursor. + * @param C char (for example '1') or its ASCI code (0x31). + * @note For user-defined char, place CGRAM_char_index (Position/address of the character in CGRAM of the LCD where * defined char was written). */ void lcd_char(const char C) @@ -406,8 +610,7 @@ void lcd_char(const char C) } /** - * @brief Function for printing/writing string on LCD screen. Writing the string on LCD screen start from current LCD - * cursor position. + * @brief Function for printing/writing the string on the LCD screen starting from the current LCD cursor position. * @param str string that should be printed/written on the LCD screen */ void lcd_str(const char *str) @@ -421,12 +624,12 @@ void lcd_str(const char *str) #if USE_LCD_INT == ON /** - * @brief Function for print the integer value on the LCD screen under current position of the LCD cursor. + * @brief Function for printing the integer value on the LCD screen under the current position of the LCD cursor. * @param val int type value to print on LCD screen * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the * result is padded with blank spaces. The value is not truncated even if the result is larger. - * @param alignment If the value to be printed is shorter than width, this parmaeter will specify aligment of the - * printed tekst value. This parameter can be set to "left" or "right" + * @param alignment If the value to be printed is shorter than the width, this parameter will specify the alignment of the + * printed text value. This parameter can be set to "left" or "right" * @attention to compile for AVR ucontrollers definition of flag AVR is required. */ void lcd_int(int val, uint8_t width, enum alignment alignment) @@ -447,14 +650,14 @@ void lcd_int(int val, uint8_t width, enum alignment alignment) #if USE_LCD_HEX == ON /** - * @brief Function for print the integer value in hexadecimal format on the LCD screen under current position of the LCD + * @brief Function for printing the integer value in hexadecimal format on the LCD screen under the current position of the LCD * cursor. * @param val int type value to print on LCD screen in hexadecimal format * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the - * result is padded with blank spaces. The value is not truncated even if the result is larger. Width should contain - * additional 2 characters for '0x' at the begining of the printed value. - * @param alignment If the value to be printed is shorter than width, this parmaeter will specify aligment of the - * printed tekst value. This parameter can be set to "left" or "right" + * result is padded with blank spaces. The value is not truncated even if the result is larger. The width should contain + * additional 2 characters for '0x' at the beginning of the printed value. + * @param alignment If the value to be printed is shorter than the width, this parameter will specify the alignment of the + * printed text value. This parameter can be set to "left" or "right" * @attention to compile for AVR ucontrollers definition of flag AVR is required. */ void lcd_hex(int val, uint8_t width, enum alignment alignment) @@ -475,12 +678,12 @@ void lcd_hex(int val, uint8_t width, enum alignment alignment) #if USE_LCD_BIN == ON /** - * @brief Function for print the integer value in hexadecimal format on the LCD screen under current position of the LCD + * @brief Function for printing the integer value in hexadecimal format on the LCD screen under the current position of the LCD * cursor. * @param val int type value to print on LCD screen in hexadecimal format * @param width Minimum number of characters to be printed. If the value to be printed is shorter than this number, the - * result is padded with blank spaces. The value is not truncated even if the result is larger. Width should contain - * additional 2 characters for '0x' at the begining of the printed value. + * result is padded with blank spaces. The value is not truncated even if the result is larger. The width should contain + * additional 2 characters for '0x' at the beginning of the printed value. * @attention to compile for AVR ucontrollers definition of flag AVR is required. */ void lcd_bin(int val, uint8_t width) @@ -507,7 +710,7 @@ void lcd_bin(int val, uint8_t width) #endif /** - * @brief Function that move LCD cursor to specific posiotion located under x and y coordinate + * @brief Function that moves LCD cursor to a specific position located under the x and y coordinate * @param y LCD row/line number. Defined enum value LINE_1, LINE_2,... etc. * @param x LCD column number. Defined enum value C1, C2, C3,... etc. */ @@ -541,7 +744,7 @@ void lcd_locate(enum LCD_LINES y, enum LCD_COLUMNS x) } #if USE_LCD_CURSOR_HOME == ON /** - * @brief Function that move lcd cursor to the first posision at first row of LCD screen + * @brief Function that moves LCD cursor to the first position at the first row of the LCD screen */ void lcd_home(void) { @@ -579,4 +782,166 @@ void lcd_blinking_cursor_on(void) { lcd_write_cmd(LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON | LCDC_BLINKON); } -#endif \ No newline at end of file +#endif + +#if LCD_BUFFERING == ON +/** + * @brief Function that puts spaces(0x32) in the whole LCD buffer and sets the cursor on the position of the first character in the first line of the LCD + * buffer. + */ +void lcd_buf_cls(void) +{ + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) + { + *lcd_buf_position_ptr=' '; + } + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + LCD_UPDATE_EVENT=true; +} + +/** + * @brief Function for adding the char to the LCD buffer under the current position of the LCD buffer. + * @param C char (for example '1') or its ASCI code (0x31). + * @note For user-defined char, place CGRAM_char_index (Position/address of the character in CGRAM of the LCD where + * defined char was written). + */ +void lcd_buf_char(const char c) +{ + *lcd_buf_position_ptr=c; + check_lcd_buf_possition_ptr_overflow(); + LCD_UPDATE_EVENT=true; +} + +/** + * @brief Function that changes the current LCD buffer position pointer to a specific position located under the x and y coordinate + * @param y LCD row/line number. Defined enum value LINE_1, LINE_2,... etc. + * @param x LCD column number. Defined enum value C1, C2, C3,... etc. + */ +void lcd_buf_locate(enum LCD_LINES y, enum LCD_COLUMNS x) +{ + lcd_buf_position_ptr=&lcd_buffer[y][x]; +} + +/** + * @brief Function for placing the string in the LCD buffer starts from the current LCD buffer position pointer. + * @param str string that should be placed in the LCD buffer + */ +void lcd_buf_str(const char *str) +{ + while (*str) + { + *(lcd_buf_position_ptr)=*(str++); + check_lcd_buf_possition_ptr_overflow(); + } + LCD_UPDATE_EVENT=true; +} + +/** + * @brief Function that prints on the LCD screen the content of The LCD buffer. + * The function sets also The LCD buffer position pointer to the First line's first character. + */ +void lcd_update(void) +{ + uint8_t lcd_cursor_position=0; + uint8_t lcd_line=0; + uint8_t missed_char_counter_in_LCD_line=0; + const lcd_pos_t *prev_lcd_buff_pos_ptr=&prev_lcd_buffer[LINE_1][C1]; + + for(lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; lcd_buf_position_ptr<=&lcd_buffer[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE]; lcd_buf_position_ptr++) + { + write_lcd_buf_2_lcd(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line,prev_lcd_buff_pos_ptr); + update_lcd_curosr_possition(&lcd_cursor_position,&lcd_line,&missed_char_counter_in_LCD_line); + prev_lcd_buff_pos_ptr++; + } + + lcd_buf_position_ptr=&lcd_buffer[LINE_1][C1]; + copy_lcd_buf_2_prev_lcd_buf(); + LCD_UPDATE_EVENT=false; +} + +#if USE_LCD_BUF_INT == ON +/** + * @brief Function for adding integer value as string to the LCD buffer under the current position of the LCD buffer pointer. + * @param val int type value to add to LCD buffer + * @param width Minimum number of characters to be added to LCD buffer. If the value to be added to the LCD buffer is shorter than width, the + * result is padded with blank spaces. The value to be added to the buffer as a string is not truncated if the string length is larger than the width value. + * @param alignment If the value is to be added to the LCD buffer as a string is shorter than the width, this parameter will specify the alignment of the + * text representing the value. This parameter can be set to "left" or "right" + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_buf_int(int val, uint8_t width, enum alignment alignment) +{ +#ifdef AVR + lcd_buf_int_AVR(val, width, alignment); +#else + char buffer[20]; // 19chars for 64 bit int + end char '\0' + buffer[0] = '\0'; + if (alignment == right) + sprintf(buffer, "%*i", width, val); + else + sprintf(buffer, "%-*i", width, val); + lcd_buf_str(buffer); +#endif +} +#endif + +#if USE_LCD_BUF_HEX == ON +/** + * @brief Function for adding integer value in hexadecimal format as a string to the LCD buffer under the current position of the LCD buffer pointer. + * @param val int type value to add to LCD buffer as a string in hexadecimal format + * @param width Minimum number of characters to be added to lcd buffer. If the value to be added to the buffer is shorter than the width, the + * result is padded with blank spaces. The value to be added to the buffer as a string is not truncated if the string length is larger than the width value. Width should contain + * additional 2 characters for "0x" at the beginning of the value represented as a string. example: 0x01-> width=4 + * @param alignment If the value to be added to the LCD buffer as a string is shorter than the width, this parameter will specify the alignment of the +* text represented the value. This parameter can be set to "left" or "right" + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_buf_hex(int val, uint8_t width, enum alignment alignment) +{ +#ifdef AVR + lcd_buf_hex_AVR(val, width, alignment); +#else + char buffer[17]; + buffer[0] = '\0'; + if (alignment == right) + sprintf(buffer, "%#*x", width, val); + else + sprintf(buffer, "%-#*x", width, val); + lcd_buf_str(buffer); +#endif +} +#endif + +#if USE_LCD_BUF_BIN == ON +/** + * @brief Function for adding to the LCD buffer the integer value in binary format as a string under the current position of the LCD buffer pointer + * @param val int type value to be added to the LCD buffer as a string in hexadecimal format + * @param width Minimum number of characters to be added to LCD buffer. If the value to be added to the buffer as string length is shorter than width, the + * result is padded with blank spaces. The value to be added to the buffer as a string is not truncated if the string length represents the value in binary format length + * is larger than the width value. The width should contain an additional 2 characters for "0b" at the beginning of the value represented as a string. example: 0b01-> width=4 + * @attention to compile for AVR ucontrollers definition of flag AVR is required. + */ +void lcd_buf_bin(int val, uint8_t width) +{ +#ifdef AVR + lcd_buf_bin_AVR(val, width); +#else + char buffer[35]; + char bin_val_buffer[35]; + char zeros_buf[35]; + buffer[0] = '\0'; + bin_val_buffer[0] = '\0'; + zeros_buf[0] = '\0'; + + fill_bin_value_buffer(val, bin_val_buffer); + fill_zeros_buffer(bin_val_buffer, width, zeros_buf); + strcat(buffer, "0b"); + strcat(buffer, zeros_buf); + strcat(buffer, bin_val_buffer); + lcd_buf_str(buffer); +#endif +} + +#endif +#endif + diff --git a/src/lcd_hd44780.h b/src/lcd_hd44780.h index 2bd9ecf..d239d50 100644 --- a/src/lcd_hd44780.h +++ b/src/lcd_hd44780.h @@ -2,7 +2,7 @@ * @Author: lukasz.niewelt * @Date: 2023-12-06 21:40:29 * @Last Modified by: lukasz.niewelt - * @Last Modified time: 2023-12-12 18:03:17 + * @Last Modified time: 2024-01-10 14:00:22 */ #ifndef _LCD_HD_44780_H_ @@ -12,11 +12,10 @@ extern "C" { #endif /* __cplusplus */ +#include #include "lcd_hd44780_config.h" #include "lcd_hd44780_interface.h" -#if USE_DEF_CHAR_FUNCTION == ON #include "lcd_hd44780_def_char.h" -#endif enum alignment { @@ -24,7 +23,11 @@ extern "C" right }; + extern bool LCD_UPDATE_EVENT; + void lcd_init(void); + void lcd_enable_backlight(void); + void lcd_disable_backlight(void); void lcd_cls(void); void lcd_def_char(const uint8_t CGRAM_bank_x_char_adr, const uint8_t *def_char); @@ -43,6 +46,16 @@ extern "C" void lcd_cursor_off(void); void lcd_blinking_cursor_on(void); + void lcd_buf_cls(void); + void lcd_buf_char(const char c); + void lcd_buf_locate(enum LCD_LINES y, enum LCD_COLUMNS x); + void lcd_buf_str(const char *str); + void lcd_update(void); + + void lcd_buf_int(int val, uint8_t width, enum alignment alignment); + void lcd_buf_hex(int val, uint8_t width, enum alignment alignment); + void lcd_buf_bin(int val, uint8_t width); + #ifdef __cplusplus } #endif /* __cplusplus */ diff --git a/src/lcd_hd44780_config.h b/src/lcd_hd44780_config.h index 379a53d..4e9b234 100644 --- a/src/lcd_hd44780_config.h +++ b/src/lcd_hd44780_config.h @@ -2,7 +2,7 @@ * @Author: lukasz.niewelt * @Date: 2023-12-06 21:38:27 * @Last Modified by: lukasz.niewelt - * @Last Modified time: 2023-12-08 16:57:42 + * @Last Modified time: 2024-01-09 21:20:52 */ #ifndef _LCD_HD44780_CONFIG_H_ @@ -13,23 +13,29 @@ extern "C" { #endif /* __cplusplus */ -#define ON 1 -#define OFF 0 - // clang-format off +#define ON 1 +#define OFF 0 +#define HIGH 1 +#define LOW 0 + /************************************ LCD HARDWARE SETTINGS ******************************* - * LCD_TYPE -> set one of the predefined types: + * LCD_TYPE -> Set one of the predefined types: * 2004 -> 4 lines 20 characters per line * 1604 -> 4 lines 16 characters per line * 1602 -> 2 lines 16 characters per line * USE_RW_PIN -> Defines HW connection between LCD and uC - * ON - when RW pin is connected - * OFF - when RW pin is not connected + * ON - when the RW pin is connected + * OFF - when the RW pin is not connected ********************************************************************************************/ -#define LCD_TYPE 2004 -#define USE_RW_PIN OFF +#define LCD_TYPE 1602 +#define USE_RW_PIN OFF + +#define LCD_BCKL_PIN_EN_STATE HIGH + +#define LCD_BUFFERING ON -//definitions of Line and collumn labels for lcd_locate +//definitions of Line and column labels for lcd_locate enum LCD_LINES { LINE_1, @@ -48,8 +54,8 @@ enum LCD_COLUMNS{ /******************************** LCD LIBRARY COMPILATION SETTINGS ************************ * Setting USE_(procedure name) to: - * ON - add specific procedure to complilation - * OFF - exclude specific procedure from complitaion + * ON - add specific procedure to compilation + * OFF - exclude specific procedure from compilation ********************************************************************************************/ #define USE_DEF_CHAR_FUNCTION ON #define USE_LCD_INT ON @@ -61,9 +67,44 @@ enum LCD_COLUMNS{ #define USE_LCD_CURSOR_OFF ON #define USE_LCD_BLINKING_CURSOR_ON ON +#if LCD_BUFFERING == ON +#define USE_LCD_BUF_INT ON +#define USE_LCD_BUF_HEX ON +#define USE_LCD_BUF_BIN ON +#endif + + +/******************** definitions of Line address for different LCD screens ****************/ +//https://web.alfredstate.edu/faculty/weimandn/lcd/lcd_addressing/lcd_addressing_index.html + +#if LCD_TYPE ==1604 +#define LCD_Y 4 +#define LCD_X 16 +#define LCD_LINE1_ADR 0x00 +#define LCD_LINE2_ADR 0x40 +#define LCD_LINE3_ADR 0x10 +#define LCD_LINE4_ADR 0x50 +#endif + +#if LCD_TYPE==2004 +#define LCD_Y 4 +#define LCD_X 20 +#define LCD_LINE1_ADR 0x00 +#define LCD_LINE2_ADR 0x40 +#define LCD_LINE3_ADR 0x14 +#define LCD_LINE4_ADR 0x54 +#endif + +#if LCD_TYPE==1602 +#define LCD_Y 2 +#define LCD_X 16 +#define LCD_LINE1_ADR 0x00 +#define LCD_LINE2_ADR 0x40 +#endif + // clang-format on #ifdef __cplusplus } #endif /* __cplusplus */ -#endif /* _LCD_HD44780_CONFIG_H_ */ \ No newline at end of file +#endif /* _LCD_HD44780_CONFIG_H_ */ diff --git a/src/lcd_hd44780_def_char.h b/src/lcd_hd44780_def_char.h index 121e42f..6156113 100644 --- a/src/lcd_hd44780_def_char.h +++ b/src/lcd_hd44780_def_char.h @@ -12,6 +12,19 @@ extern "C" { #endif /* __cplusplus */ + + struct char_bank_struct + { + const uint8_t *char_0; + const uint8_t *char_1; + const uint8_t *char_2; + const uint8_t *char_3; + const uint8_t *char_4; + const uint8_t *char_5; + const uint8_t *char_6; + const uint8_t *char_7; + }; + #if USE_DEF_CHAR_FUNCTION == ON #define LCD_CGRAM_BYTES_PER_CHAR 8 #define DEF_CHAR_ADR_MASK 7 @@ -28,17 +41,6 @@ extern "C" // here add "definition" of new chars /**********************USER CHAR DEFINITIONS END********************************/ - struct char_bank_struct - { - const uint8_t *char_0; - const uint8_t *char_1; - const uint8_t *char_2; - const uint8_t *char_3; - const uint8_t *char_4; - const uint8_t *char_5; - const uint8_t *char_6; - const uint8_t *char_7; - }; /**********************USER CHAR CGRAM BANKS DEFINITIONS START*******************/ static const struct char_bank_struct lcd_cgram_bank_1 = { Pol_e, diff --git a/src/lcd_hd44780_interface.h b/src/lcd_hd44780_interface.h index f5dbb35..2b7d99a 100644 --- a/src/lcd_hd44780_interface.h +++ b/src/lcd_hd44780_interface.h @@ -18,6 +18,7 @@ extern "C" LCD_RS, LCD_RW, LCD_E, + LCD_BCKL, }; typedef void (*init_LCD_data_and_SIG_pins_func_p)(void); @@ -25,7 +26,6 @@ extern "C" typedef void (*set_LCD_data_pins_as_inputs_func_p)(void); typedef void (*set_LCD_data_port_func_p)(uint8_t data); typedef uint8_t (*get_LCD_data_port_func_p)(void); - typedef void (*init_LCD_SIG_func_p)(void); typedef void (*set_LCD_SIG_func_p)(enum lcd_sig LCD_SIG); typedef void (*reset_LCD_SIG_func_p)(enum lcd_sig LCD_SIG); typedef void (*delay_us_func_p)(uint32_t delay_us); @@ -37,7 +37,6 @@ extern "C" set_LCD_data_pins_as_inputs_func_p set_data_pins_as_inputs; set_LCD_data_port_func_p write_data; get_LCD_data_port_func_p read_data; - init_LCD_SIG_func_p init_SIG; set_LCD_SIG_func_p set_SIG; reset_LCD_SIG_func_p reset_SIG; delay_us_func_p delay_us; diff --git a/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt b/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt index 3e219de..183d609 100644 --- a/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt +++ b/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/CMakeLists.txt @@ -9,6 +9,17 @@ # For debug build using Ninja: # cmake -S ./ -B Build -G"Ninja" -DCMAKE_BUILD_TYPE=Debug # ninja -C Build (optional with -V and -jxx ->xx numnber of cores) +# additional custom targets for this project: +# Erase Atmega chip: +# 1. make erase / ninja erase +# Read Fuse Bits: +# 1. make write_fuses / ninja write_fuses +# Write Fuse Bits: +# 1. make write_fuses / ninja write_fuses +# Read Flash: +# 1. make read_flash / ninja read_flash +# Write Flash: +# 1. make flash / ninja flash ############################################################################################################################# cmake_minimum_required(VERSION 3.10) diff --git a/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/config/Toolchain-AVR-gcc.cmake b/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/config/Toolchain-AVR-gcc.cmake index f2401ca..1363e5b 100644 --- a/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/config/Toolchain-AVR-gcc.cmake +++ b/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/config/Toolchain-AVR-gcc.cmake @@ -96,7 +96,7 @@ add_custom_target( size ALL COMMAND ${CMAKE_SIZE} -C --mcu=${MMCU} --format=avr # check if programmer software is available find_program(AVR_Programmer avrdude) if(AVR_Programmer) - message(STATUS "AVR_Programmer avrdude was found, you can use defined targets: \r\n\tflash,\r\n\terase,\r\n\twrite_fuse,\r\n\tread_fuse,\r\n\tread_flash,\r\n\treset.") + message(STATUS "AVR_Programmer avrdude was found, you can use defined targets: \r\n\tflash,\r\n\terase,\r\n\twrite_fuses,\r\n\tread_fuses,\r\n\tread_flash,\r\n\treset.") else() message(STATUS "AVR_Programmer was not found.") endif() diff --git a/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/src/LCD_IO_driver.c b/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/src/LCD_IO_driver.c index 9f03142..e79221d 100644 --- a/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/src/LCD_IO_driver.c +++ b/test/hw_test/ATMEGA328P_ARDUINO_UNO_R3/src/LCD_IO_driver.c @@ -1,11 +1,10 @@ /* - * @Author: lukasz.niewelt - * @Date: 2023-12-04 20:13:23 + * @Author: lukasz.niewelt + * @Date: 2023-12-04 20:13:23 * @Last Modified by: lukasz.niewelt * @Last Modified time: 2023-12-08 10:49:44 */ -// #include "lcd_hd44780_config.h" #include "lcd_hd44780_interface.h" #include "lcd_hd44780_config.h" #include @@ -29,7 +28,7 @@ #define LCD_PIN_RS (1 << PINB0) #define LCD_PIN_RW (1 << PINC1) #define LCD_PIN_E (1 << PINB1) -#define LCD_BCKL_PIN (1 << PINB5) +#define LCD_BCKL_PIN (1 << PINB2) #define LCD_D4_MASK 0x01 #define LCD_D5_MASK 0x02 @@ -41,10 +40,10 @@ static void init_LCD_DATA_PINS_as_outputs(void); static void init_LCD_DATA_PINS_as_inputs(void); static void set_LCD_DATA_PINS_state(uint8_t data); static uint8_t get_LCD_DATA_PINS_state(void); -static void init_LCD_SIGNAL_PINS_as_outputs(void); static void LCD_set_SIG(enum lcd_sig LCD_SIG); static void LCD_reset_SIG(enum lcd_sig LCD_SIG); static void wraper_delay_us(uint32_t delay_us); +static void init_LCD_SIGNAL_PINS_as_outputs(void); /************LCD_IO_driver_interface implementation START**************/ static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { @@ -53,7 +52,6 @@ static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { init_LCD_DATA_PINS_as_inputs, set_LCD_DATA_PINS_state, get_LCD_DATA_PINS_state, - init_LCD_SIGNAL_PINS_as_outputs, LCD_set_SIG, LCD_reset_SIG, wraper_delay_us, @@ -67,22 +65,22 @@ const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) static void init_LCD_data_and_SIG_pins(void) { - //set BCKL PIN as output + // set BCKL PIN as output LCD_BCKL_PORT_DIR |= LCD_BCKL_PIN; - //enable Backlight of the LCD - LCD_BCKL_PORT |= LCD_BCKL_PIN; + // enable Backlight of the LCD + LCD_BCKL_PORT &= ~LCD_BCKL_PIN; init_LCD_DATA_PINS_as_outputs(); init_LCD_SIGNAL_PINS_as_outputs(); } static void init_LCD_DATA_PINS_as_outputs(void) { - //set pins as output + // set pins as output LCD_DATA_PORT_DIR |= (LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); } static void init_LCD_DATA_PINS_as_inputs(void) { - //set pins as inputs + // set pins as inputs LCD_DATA_PORT_DIR &= ~(LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); // enable pull-up on input pins LCD_DATA_PORT |= (LCD_PIN_D4 | LCD_PIN_D5 | LCD_PIN_D6 | LCD_PIN_D7); @@ -125,16 +123,6 @@ static uint8_t get_LCD_DATA_PINS_state(void) return data; } -static void init_LCD_SIGNAL_PINS_as_outputs(void) -{ -#if USE_RW_PIN == ON - LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_RW | LCD_PIN_E); - -#else - LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_E); -#endif -} - static void LCD_set_SIG(enum lcd_sig LCD_SIG) { switch (LCD_SIG) @@ -150,6 +138,9 @@ static void LCD_set_SIG(enum lcd_sig LCD_SIG) LCD_SIG_PORT |= LCD_PIN_RW; break; #endif + case LCD_BCKL: + LCD_BCKL_PORT |= LCD_BCKL_PIN; + break; default: break; } @@ -170,12 +161,25 @@ static void LCD_reset_SIG(enum lcd_sig LCD_SIG) LCD_SIG_PORT &= ~LCD_PIN_RW; break; #endif + case LCD_BCKL: + LCD_BCKL_PORT &= ~ LCD_BCKL_PIN; + break; default: break; } } -void wraper_delay_us(uint32_t delay_us) +static void wraper_delay_us(uint32_t delay_us) { _delay_us((double)(delay_us)); } + +static void init_LCD_SIGNAL_PINS_as_outputs(void) +{ +#if USE_RW_PIN == ON + LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_RW | LCD_PIN_E); + +#else + LCD_SIG_PORT_DIR |= (LCD_PIN_RS | LCD_PIN_E); +#endif +} \ No newline at end of file diff --git a/test/hw_test/STM32F030R8_CUBE_IDE/Core/Src/LCD_IO_driver.c b/test/hw_test/STM32F030R8_CUBE_IDE/Core/Src/LCD_IO_driver.c index e2bd702..b2387ac 100644 --- a/test/hw_test/STM32F030R8_CUBE_IDE/Core/Src/LCD_IO_driver.c +++ b/test/hw_test/STM32F030R8_CUBE_IDE/Core/Src/LCD_IO_driver.c @@ -1,6 +1,6 @@ /* - * @Author: lukasz.niewelt - * @Date: 2023-12-07 15:51:41 + * @Author: lukasz.niewelt + * @Date: 2023-12-07 15:51:41 * @Last Modified by: lukasz.niewelt * @Last Modified time: 2023-12-08 00:34:48 */ @@ -18,6 +18,7 @@ #include "main.h" #include "tim_delay.h" #include +#include "stm32f030x8.h" LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; @@ -26,9 +27,9 @@ static void set_LCD_DATA_PINS_as_outputs(void); static void set_LCD_DATA_PINS_as_inputs(void); static void set_LCD_DATA_PINS_state(uint8_t data); static uint8_t get_LCD_DATA_PINS_state(void); -static void init_LCD_SIGNAL_PINS_as_outputs(void); static void LCD_set_SIG(enum lcd_sig LCD_SIG); static void LCD_reset_SIG(enum lcd_sig LCD_SIG); +// static void init_LCD_SIGNAL_PINS_as_outputs(void); /************LCD_IO_driver_interface implementation START**************/ static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { @@ -37,7 +38,6 @@ static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { set_LCD_DATA_PINS_as_inputs, set_LCD_DATA_PINS_state, get_LCD_DATA_PINS_state, - init_LCD_SIGNAL_PINS_as_outputs, LCD_set_SIG, LCD_reset_SIG, _delay_us, @@ -51,11 +51,11 @@ const struct LCD_IO_driver_interface_struct *LCD_IO_driver_interface_get(void) static void init_LCD_data_and_SIG_pins(void) { - //enable BCKL of the LCD + // enable BCKL of the LCD LL_GPIO_SetOutputPin(LCD_BCKL_GPIO_Port, LCD_BCKL_Pin); - //enable CLK -> for this setup it's done by CUBE_IDE when generatig project files from it - //set_LCD_DATA_PINS_as_outputs -> for this setup it's done by CUBE_IDE when generatig project files from it - //init_LCD_SIGNAL_PINS_as_outputs -> for this setup it's done by CUBE_IDE when generatig project files from it + // enable CLK -> for this setup it's done by CUBE_IDE when generatig project files from it + // set_LCD_DATA_PINS_as_outputs -> for this setup it's done by CUBE_IDE when generatig project files from it + // init_LCD_SIGNAL_PINS_as_outputs -> for this setup it's done by CUBE_IDE when generatig project files from it } static void set_LCD_DATA_PINS_as_outputs(void) @@ -111,26 +111,6 @@ static uint8_t get_LCD_DATA_PINS_state(void) return data; } -static void init_LCD_SIGNAL_PINS_as_outputs(void) -{ -#if USE_RW_PIN == 1 - GPIO_InitStruct.Pin = LCD_RS_Pin | LCD_E_Pin | LCD_RW_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(LCD_SIG_PORT, &GPIO_InitStruct); - -#else - GPIO_InitStruct.Pin = LCD_RS_Pin | LCD_E_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(LCD_SIG_PORT, &GPIO_InitStruct); -#endif -} - static void LCD_set_SIG(enum lcd_sig LCD_SIG) { switch (LCD_SIG) @@ -166,3 +146,23 @@ static void LCD_reset_SIG(enum lcd_sig LCD_SIG) break; } } + +// static void init_LCD_SIGNAL_PINS_as_outputs(void) +// { +// #if USE_RW_PIN == 1 +// GPIO_InitStruct.Pin = LCD_RS_Pin | LCD_E_Pin | LCD_RW_Pin; +// GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; +// GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; +// GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +// GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +// LL_GPIO_Init(LCD_SIG_PORT, &GPIO_InitStruct); + +// #else +// GPIO_InitStruct.Pin = LCD_RS_Pin | LCD_E_Pin; +// GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; +// GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; +// GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +// GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +// LL_GPIO_Init(LCD_SIG_PORT, &GPIO_InitStruct); +// #endif +// } diff --git a/test/hw_test/STM32F030R8_CUBE_IDE/config/compiler_flags.cmake b/test/hw_test/STM32F030R8_CUBE_IDE/config/compiler_flags.cmake index b4da425..48b8e4a 100644 --- a/test/hw_test/STM32F030R8_CUBE_IDE/config/compiler_flags.cmake +++ b/test/hw_test/STM32F030R8_CUBE_IDE/config/compiler_flags.cmake @@ -9,6 +9,13 @@ endif() # Hardware float support set(CORE_FLAGS "${CORE_FLAGS} -mfloat-abi=soft") +#enable showing compile diagnostic output colored (ninja require this opctions to show colored errors) +if ("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") + set(CORE_FLAGS "${CORE_FLAGS} -fdiagnostics-color=always") +elseif ("${CMAKE_C_COMPILER_ID}" STREQUAL "Clang") + set(CORE_FLAGS "${CORE_FLAGS} -fcolor-diagnostics") +endif() + # Use newlib-nano, links with libc_nano.a # set(CORE_FLAGS "${CORE_FLAGS} --specs=nano.specs") diff --git a/test/hw_test/hw_test_main.c b/test/hw_test/hw_test_main.c index 03112ff..4ee017e 100644 --- a/test/hw_test/hw_test_main.c +++ b/test/hw_test/hw_test_main.c @@ -7,9 +7,40 @@ #include "tim_delay.h" #endif +#define BASIC_FUNCTIONS_TESTS OFF +#define BUFFERING_FUNCTION_TESTS ON +#define LCD_BACKLIGHT_TEST ON + +#if BASIC_FUNCTIONS_TESTS == ON +static void basic_func_tests(void); +#endif +#if BUFFERING_FUNCTION_TESTS == ON +static void buffering_func_tests(void); +#endif +#if LCD_BACKLIGHT_TEST == ON +static void lcd_backlight_test(void); +#endif + void main_hw_test(void) +{ + #if LCD_BACKLIGHT_TEST == ON + lcd_backlight_test(); + #endif + #if BASIC_FUNCTIONS_TESTS == ON + basic_func_tests(); + #endif + #if BUFFERING_FUNCTION_TESTS == ON + buffering_func_tests(); + #endif + + while (1); +} + +#if BASIC_FUNCTIONS_TESTS == ON +void basic_func_tests(void) { lcd_init(); + lcd_enable_backlight(); lcd_char('G'); _delay_ms(1000); lcd_cls(); @@ -19,7 +50,6 @@ void main_hw_test(void) lcd_char(pol_o); lcd_char(zn_wody); lcd_char('l'); - _delay_ms(1000); lcd_cls(); lcd_cursor_on(); @@ -43,6 +73,72 @@ void main_hw_test(void) lcd_bin(5, 1); lcd_locate(LINE_2, C8); lcd_bin(5, 8); - while (1) - ; -} \ No newline at end of file + _delay_ms(1000); +} +#endif +#if BUFFERING_FUNCTION_TESTS == ON +void buffering_func_tests(void) +{ + lcd_init(); + lcd_enable_backlight(); + lcd_buf_char('G'); + lcd_buf_locate(0,2); + lcd_buf_str("Test"); + lcd_update(); + _delay_ms(1000); + lcd_locate(0,0); + lcd_buf_char('a'); + lcd_update(); + _delay_ms(1000); + lcd_buf_cls(); + lcd_load_char_bank(&lcd_cgram_bank_1); + lcd_buf_char(pol_e); + lcd_buf_char(pol_o); + lcd_buf_char(zn_wody); + lcd_update(); + _delay_ms(1000); + lcd_buf_cls(); + #if LCD_TYPE==1602 + lcd_buf_locate(LINE_1,C16); + lcd_buf_str("test1"); + lcd_buf_locate(LINE_2,C16); + lcd_buf_str("test2"); + #elif LCD_TYPE==2004 + lcd_buf_locate(LINE_1,C20); + lcd_buf_str("test1"); + lcd_buf_locate(LINE_2,C20); + lcd_buf_str("test2"); + lcd_buf_locate(LINE_3,C20); + lcd_buf_str("test3"); + lcd_buf_locate(LINE_4,C20); + lcd_buf_str("test4"); + #else + #endif + lcd_update(); + lcd_buf_cls(); + lcd_buf_hex(24, 6, right); + lcd_buf_int(24, 6, right); + lcd_buf_locate(LINE_2, C1); + lcd_buf_bin(5, 1); + lcd_buf_locate(LINE_2, C8); + lcd_buf_bin(5, 8); + _delay_ms(1000); + lcd_update(); +} + +static void lcd_backlight_test(void) +{ + lcd_init(); + lcd_str("LCD Backlight"); + lcd_locate(LINE_2,C1); + lcd_str("TEST"); + for(uint8_t i=0; i<3; i++) + { + lcd_enable_backlight(); + _delay_ms(500); + lcd_disable_backlight(); + _delay_ms(500); + } + +} +#endif diff --git a/test/lcd_hd44780/CMakeLists.txt b/test/lcd_hd44780/CMakeLists.txt index 3b5116e..1ccf0c9 100644 --- a/test/lcd_hd44780/CMakeLists.txt +++ b/test/lcd_hd44780/CMakeLists.txt @@ -1,10 +1,43 @@ +############################################################################################################################# +# file: CMakeLists.txt +# brief: Template "CMakeLists.txt" for building Unit test modules. +# +# usage: +# For build using Unix Makefiles: +# 1.cmake -S./ -B out -G"Unix Makefiles" +# 2.enter the "out" folder +# 3.make all -o lcd_hd44780.o (-jXX additionaly to speed up) +# For build using Ninja: +# 1. cmake -S./ -B out -G"Ninja" +# 2. enter the "out" folder +# 3. ninja -C out -o lcd_hd44780.o (optional with -V and -jxx ->xx numnber of cores) +# additional custom targets for this project: +# Running unit tests when you are in "out" folder: +# 1. make run / ninja run +# If lizard is installed and you are in the out folder: +# 1. make ccm / ninja ccm-> code complexity metrix print in console +# 2. make ccmr / ninja ccmr-> code complexity metrics report generation +# If cppcheck is installed and you are in the out folder +# 1. make/ninja cppcheck_src -> static analize for src folder printed in console +# 2. make cppcheck_test-> static analize for src folder printed in console +# If gcovr is installed and you are in the out folder +# 1. make ccr / ninja ccr -> code coverage report generation +# +############################################################################################################################# cmake_minimum_required(VERSION 3.10) project(lcd_hd44780_test C) add_subdirectory(../unity unity) +set(CUSTOM_TARGETS_FILE_DIR ./custom_targets.cmake) + set(CMAKE_C_FLAGS "${CMAKE_CXX_FLAGS} -Wall -Wextra") +if ("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fdiagnostics-color=always") +elseif ("${CMAKE_C_COMPILER_ID}" STREQUAL "Clang") + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fcolor-diagnostics") +endif() set(INCLUDE_DIRS ../../src @@ -26,13 +59,17 @@ set(TEST_SRCS mock_LCD_IO_driver.c lcd_hd44780_test_basic_func.c lcd_hd44780_test_common.c + lcd_hd44780_test_buffering.c #mock_module.c ) set(GLOBAL_DEFINES + -DUNIT_TEST # -DAVR ) +include(${CUSTOM_TARGETS_FILE_DIR}) + include_directories(${INCLUDE_DIRS} ${TEST_INCLUDE_DIRS}) add_definitions(${GLOBAL_DEFINES}) diff --git a/test/lcd_hd44780/avr_code_test/CMakeLists.txt b/test/lcd_hd44780/avr_code_test/CMakeLists.txt index 983f1fa..7ff3fe5 100644 --- a/test/lcd_hd44780/avr_code_test/CMakeLists.txt +++ b/test/lcd_hd44780/avr_code_test/CMakeLists.txt @@ -1,9 +1,37 @@ +############################################################################################################################# +# file: CMakeLists.txt +# brief: Template "CMakeLists.txt" for building Unit test modules. +# +# usage: +# For build using Unix Makefiles: +# 1.cmake -S./ -B ../out_avr -G"Unix Makefiles" +# 2.enter the "out_avr" folder +# 3.make all -o lcd_hd44780.o (-jXX additionaly to speed up) +# For build using Ninja: +# 1. cmake -S./ -B ../out_avr -G"Ninja" +# 2. enter the "out_avr" folder +# 3. ninja -C out -o lcd_hd44780.o (optional with -V and -jxx ->xx numnber of cores) +# additional custom targets for this project: +# Running unit tests when you are in "out_avr" folder: +# 1. make run /ninja run +# If lizard is installed and you are in the out folder: +# 1. make ccm / ninja ccm -> code complexity metrix print in console +# 2. make ccmr / ninja ccmr-> code complexity metrics report generation +# If cppcheck is installed and you are in the out folder +# 1. make/ninja cppcheck_src -> static analize for src folder printed in console +# 2. make/ninja cppcheck_test-> static analize for src folder printed in console +# If gcovr is installed and you are in the out folder +# 1. make ccr/ ninja ccr-> code coverage report generation +# +############################################################################################################################# cmake_minimum_required(VERSION 3.10) project(lcd_hd44780_test C) add_subdirectory(../../unity unity) +set(CUSTOM_TARGETS_FILE_DIR ../custom_targets.cmake) + set(CMAKE_C_FLAGS "${CMAKE_CXX_FLAGS} -Wall -Wextra") set(INCLUDE_DIRS @@ -26,13 +54,17 @@ set(TEST_SRCS ../mock_LCD_IO_driver.c ../lcd_hd44780_test_basic_func.c ../lcd_hd44780_test_common.c + ../lcd_hd44780_test_buffering.c #mock_module.c ) set(GLOBAL_DEFINES -DAVR + -DUNIT_TEST ) +include(${CUSTOM_TARGETS_FILE_DIR}) + include_directories(${INCLUDE_DIRS} ${TEST_INCLUDE_DIRS}) add_definitions(${GLOBAL_DEFINES}) diff --git a/test/lcd_hd44780/custom_targets.cmake b/test/lcd_hd44780/custom_targets.cmake new file mode 100644 index 0000000..b82f072 --- /dev/null +++ b/test/lcd_hd44780/custom_targets.cmake @@ -0,0 +1,56 @@ +# PROJECT CUSTOM TARGETS FILE +# here you can define custom targets for the project so all team member can use it in the same way +# some example of custo targets are shown bello those are targets for: +# 1. Running unit tests +# 2. Code Complexity Metrics +# 3. CppCheck static analize of specific folder +# 4. Code Coverage report generation. + + +#TARGETS FOR RUNNING UNIT TESTS +add_custom_target(run lcd_hd44780_test) + +# TARGET FOR CHECKING CODE COMPLEXITY METRICS" +# check if lizard software is available +find_program(lizard_program lizard) +if(lizard_program) + message(STATUS "Lizard was found, you can use predefined targets for src folder Code Complexity Metrics: \r\n\tccm,\r\n\tccmr,") +else() + message(STATUS "Lizard was not found. \r\n\tInstall Lizard to get predefined targets for src folder Code Complexity Metrics") +endif() +# Prints CCM for src folder in the console +add_custom_target(ccm lizard ../../../src/ --CCN 12 -Tnloc=30 -a 4 --languages cpp -V -i 1) +# Create CCM report in reports/Cylcomatic_Complexity/ +add_custom_target(ccmr lizard ../../../src/ --CCN 12 -Tnloc=30 -a 4 --languages cpp -V -o ../../../reports/Cyclomatic_Complexity/Lizard_report.html) + +# TARGET FOR MAKING STATIC ANALYSIS OF THE SOURCE CODE AND UNIT TEST CODE +# check if cppchec software is available +find_program(cppcheck_program cppcheck) +if(cppcheck_program) + message(STATUS "CppCheck was found, you can use predefined targets for static analize : \r\n\tcppcheck_src,\r\n\tcppcheck_tests,") +else() + message(STATUS "CppCheck was not found. \r\n\tInstall CppCheck to get predefined targets for static analize") +endif() +# Prints static analize output for src folder in the console +add_custom_target(cppcheck_src cppcheck ../../../src --enable=all --inconclusive --force --inline-suppr --platform=win64 --suppress=missingInclude --suppress=missingIncludeSystem --suppress=unusedFunction) +# Prints static analize output for specific test_module folder in the console +add_custom_target(cppcheck_test cppcheck ../../../test/lcd_hd44780 -itest/lcd_hd44780/out -itest/lcd_hd44780/out_avr --enable=all --inconclusive --force --inline-suppr --platform=win64 --suppress=missingInclude --suppress=missingIncludeSystem || echo "test") + +# TARGET FOR CREATING CODE COVERAGE REPORTS +# check if python 3 and gcovr are available +find_program(GCOVR gcovr) +find_program(PYTHON3 python3) +if(PYTHON3) + if(GCOVR) + message(STATUS "python 3 and gcovr was found, you can use predefined targets for uint tests code coverage report generation : \r\n\tccr,") + else() + message(STATUS "pyton 3 was found but gcovr was not found. \r\n\tInstall gcovr to get predefined targets for uint tests code coverage report generation") + endif() +else() + if(GCOVR) + message(STATUS "python3 was not found. \r\n\tInstall python 3 to get predefined targets for uint tests code coverage report generation") + else() + message(STATUS "python3 and gcovr were not found. \r\n\tInstall python 3 and gcovr to get predefined targets for uint tests code coverage report generation") + endif() +endif() +add_custom_target(ccr python3 -m gcovr CMakeFiles/lcd_hd44780_test.dir/D_/0_Projekty/6_Biblioteki/LCD_HD44780/src -r ../../.. --html-details ../../../reports/Code_Coverage/lcd_hd44780_gcov_report.html) \ No newline at end of file diff --git a/test/lcd_hd44780/lcd_hd44780_test_basic_func.c b/test/lcd_hd44780/lcd_hd44780_test_basic_func.c index 8c107a3..222411d 100644 --- a/test/lcd_hd44780/lcd_hd44780_test_basic_func.c +++ b/test/lcd_hd44780/lcd_hd44780_test_basic_func.c @@ -1,3 +1,9 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2023-12-03 16:59:56 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2024-01-10 17:30:47 + */ #include "unity/fixture/unity_fixture.h" #include "lcd_hd44780.h" #include "lcd_hd44780_test_common.h" @@ -24,8 +30,11 @@ TEST_TEAR_DOWN(lcd_hd44780_basic_functions) TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenPrintGcharaterOnLcdThenSignalSequenceForSendingCharIsCorrect) { uint8_t data = (uint8_t)('G'); - +#if USE_RW_PIN == ON next_log_no = define_expected_sequence_for_send_data_to_LCD(0, data, 0x00, 0); +#else + next_log_no = define_expected_sequence_for_send_data_to_LCD(0, data, 0); +#endif expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_char('G'); @@ -36,8 +45,12 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenPrintGcharaterOnLcdThenSignalS TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenLcdClearScreenThenSignalSequenceForLcdClearScreenIsCorrect) { uint8_t cmd = (LCDC_CLS); +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, cmd, 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, cmd, 4900); +#endif - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, cmd, 0x00, 4900); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_cls(); @@ -71,7 +84,11 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenDefineSepcialCharactersFromBan #if USE_LCD_CURSOR_HOME == ON TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdHomeThenSignalSequenceIsCorrect) { - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_CLS | LCDC_HOME), 0x00, 4900); +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_CLS | LCDC_HOME), 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_CLS | LCDC_HOME), 4900); +#endif lcd_home(); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -81,7 +98,11 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdHomeThenSignalSequenceIs #if USE_LCD_CURSOR_ON == ON TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdCursorOnThenSignalSequenceIsCorrect) { - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON), 0x00, 0); +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON), 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON), 0); +#endif expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_cursor_on(); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -91,7 +112,11 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdCursorOnThenSignalSequen #if USE_LCD_CURSOR_OFF == ON TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdCursorOffThenSignalSequenceIsCorrect) { - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON), 0x00, 0); +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON), 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON), 0); +#endif expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_cursor_off(); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -101,7 +126,11 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdCursorOffThenSignalSeque #if USE_LCD_BLINKING_CURSOR_ON == ON TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdBlinkingCursorOnThenSignalSequenceIsCorrect) { - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON | LCDC_BLINKON), 0x00, 0); +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON | LCDC_BLINKON), 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (LCDC_ONOFF | LCDC_DISPLAYON | LCDC_CURSORON | LCDC_BLINKON), 0); +#endif expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_blinking_cursor_on(); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -109,8 +138,12 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdBlinkingCursorOnThenSign #endif TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdLocateThenSignalSequenceIsCorrect) { - uint8_t line_no_2_adr = 0x40; - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (uint8_t)(LCDC_SET_DDRAM + line_no_2_adr + C5), 0x00, 0); +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C5), 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C5), 0); +#endif + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_locate(LINE_2, C5); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -118,46 +151,49 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdLocateThenSignalSequence TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdStrThenSignalSequenceIsCorrect) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("TEst"); + next_log_no = define_expected_sequence_for_send_string_to_LCD("TEst", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_str("TEst"); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdLocateAndSetAllLinesLocationThenSignalSequenceIsCorrect) { - uint8_t line_no_1_adr = 0x00; - uint8_t line_no_2_adr = 0x40; -#if LCD_TYPE == 2004 - uint8_t line_no_3_adr = 0x14; - uint8_t line_no_4_adr = 0x54; -#elif LCD_TYTPE == 1604 - uint8_t line_no_3_adr = 0x10; - uint8_t line_no_4_adr = 0x50; -#endif - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (uint8_t)(LCDC_SET_DDRAM + line_no_1_adr + C5), 0x00, 0); - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + line_no_2_adr + C4), 0x00, 0); +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE1_ADR + C5), 0x00); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C4), 0x00); #if ((LCD_TYPE == 2004) || (LCD_TYTPE == 1604)) - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + line_no_3_adr + C3), 0x00, 0); - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + line_no_4_adr + C6), 0x00, 0); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE3_ADR + C3), 0x00); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE4_ADR + C6), 0x00); #endif +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(0, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE1_ADR + C5), 0); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C4), 0); +#if ((LCD_TYPE == 2004) || (LCD_TYTPE == 1604)) + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE3_ADR + C3), 0); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE4_ADR + C6), 0); +#endif +#endif + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_locate(LINE_1, C5); lcd_locate(LINE_2, C4); +#if ((LCD_TYPE == 1604) || (LCD_TYPE == 2004)) lcd_locate(LINE_3, C3); lcd_locate(LINE_4, C6); +#endif TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } - +#if USE_LCD_INT == ON TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_24_2_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("24"); + next_log_no = define_expected_sequence_for_send_string_to_LCD("24", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_int(24, 2, right); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_2444_2_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("2444"); + next_log_no = define_expected_sequence_for_send_string_to_LCD("2444", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_int(2444, 2, right); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -165,7 +201,7 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_2444_2_right_ThenSi TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_16_4_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString) { - next_log_no = define_expected_sequence_for_send_string_to_LCD(" 16"); + next_log_no = define_expected_sequence_for_send_string_to_LCD(" 16", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_int(16, 4, right); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -173,15 +209,16 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_16_4_right_ThenSign TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_61045_8_left_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("61045 "); + next_log_no = define_expected_sequence_for_send_string_to_LCD("61045 ", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_int(61045, 8, left); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } - +#endif +#if USE_LCD_HEX == ON TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_10_1_left_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("0xa"); + next_log_no = define_expected_sequence_for_send_string_to_LCD("0xa", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_hex(10, 1, left); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -189,7 +226,7 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_10_1_left_ThenSign TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_255_6_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig) { - next_log_no = define_expected_sequence_for_send_string_to_LCD(" 0xff"); + next_log_no = define_expected_sequence_for_send_string_to_LCD(" 0xff", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_hex(255, 6, right); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -197,7 +234,7 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_255_6_right_ThenSi TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_20_5_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig) { - next_log_no = define_expected_sequence_for_send_string_to_LCD(" 0x14"); + next_log_no = define_expected_sequence_for_send_string_to_LCD(" 0x14", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_hex(20, 5, right); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -205,15 +242,16 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_20_5_right_ThenSig TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_20_1_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("0x14"); + next_log_no = define_expected_sequence_for_send_string_to_LCD("0x14", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_hex(20, 1, right); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } - +#endif +#if USE_LCD_BIN == ON TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_bin_5_6_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("0b0101"); + next_log_no = define_expected_sequence_for_send_string_to_LCD("0b0101", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_bin(5, 6); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -221,21 +259,24 @@ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_bin_5_6_ThenSignalSequ TEST(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_bin_5_1_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig) { - next_log_no = define_expected_sequence_for_send_string_to_LCD("0b101"); + next_log_no = define_expected_sequence_for_send_string_to_LCD("0b101", 0); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); lcd_bin(5, 1); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } +#endif +TEST(lcd_hd44780_basic_functions, GivenLCDInitWhenUseEnableLcdBackLighThenBacklightPinIsEnabled) +{ + lcd_enable_backlight(); + TEST_ASSERT_EQUAL(LCD_BCKL_ON, mock_read_LCD_backlight_status()); +} -// TEST(lcd_hd44780_basic_functions, ) -// { -// TEST_FAIL_MESSAGE("Implement your test!"); -// } - -// TEST(lcd_hd44780_basic_functions, ) -// { -// TEST_FAIL_MESSAGE("Implement your test!"); -// } +TEST(lcd_hd44780_basic_functions, GivenLcdInitAndBacklightPinIsHighWhenLcdBacklightOffThenBacklightPinIsDisabled) +{ + lcd_enable_backlight(); + lcd_disable_backlight(); + TEST_ASSERT_EQUAL(LCD_BCKL_OFF, mock_read_LCD_backlight_status()); +} // TEST(lcd_hd44780_basic_functions, ) // { diff --git a/test/lcd_hd44780/lcd_hd44780_test_buffering.c b/test/lcd_hd44780/lcd_hd44780_test_buffering.c new file mode 100644 index 0000000..fb3fe0a --- /dev/null +++ b/test/lcd_hd44780/lcd_hd44780_test_buffering.c @@ -0,0 +1,406 @@ +/* + * @Author: lukasz.niewelt + * @Date: 2024-01-08 15:45:14 + * @Last Modified by: lukasz.niewelt + * @Last Modified time: 2024-01-10 18:06:19 + */ + +#include "unity/fixture/unity_fixture.h" +// #include "lcd_hd44780_config.h" +#include "lcd_hd44780.h" +#include "lcd_hd44780_test_common.h" +#include + +#if LCD_BUFFERING == ON + +#define LAST_CHAR_IN_LCD_LINE_POSITION (LCD_X - 1) +#define LAST_LCD_LINE (LCD_Y - 1) + +extern char lcd_buffer[LCD_Y][LCD_X]; +extern char prev_lcd_buffer[LCD_Y][LCD_X]; +char expected_lcd_buf[LCD_Y][LCD_X]; + +static void define_expected_buffer_value_for_cls(void); +static log_no_t define_expected_sequence_for_move_to_last_character_from_first_line_whne_nothing_to_print_on_lcd(log_no_t start_log_no); +static log_no_t define_expected_sequence_for_lcd_locate_0_0(log_no_t start_log_no); + +TEST_GROUP(lcd_hd44780_buffering); + +TEST_SETUP(lcd_hd44780_buffering) +{ + /* Init before every test */ + lcd_init(); + clear_expected_LCD_Port_delay_dump_data(); + mock_clear_LCD_Port_delay_dump_data(); + next_log_no = 0; + expected_buf_lenght = 0; +} + +TEST_TEAR_DOWN(lcd_hd44780_buffering) +{ + /* Cleanup after every test */ +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdInitThenLcdBufferContainSpaces) +{ + define_expected_buffer_value_for_cls(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdBufCharThenBufferEqualToExpected) +{ + lcd_buf_char('a'); + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = 'a'; + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdBufCharAandLcdBufCharBUsedThenBufferEqualToExpected) +{ + lcd_buf_char('A'); + lcd_buf_char('B'); + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = 'A'; + expected_lcd_buf[LINE_1][C2] = 'B'; + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufLocateFirstLineLastLetterAndLcdBufCharAThenBufferEqualToExpected) +{ + lcd_buf_locate(LINE_1, LAST_CHAR_IN_LCD_LINE_POSITION); + lcd_buf_char('A'); + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][LAST_CHAR_IN_LCD_LINE_POSITION] = 'A'; + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufLocateFirstLineLastLetterAndLcdBufCharAandLcdBufCharBThenBufferEqualToExpected) +{ + lcd_buf_locate(LINE_1, LAST_CHAR_IN_LCD_LINE_POSITION); + lcd_buf_char('A'); + lcd_buf_char('B'); + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][LAST_CHAR_IN_LCD_LINE_POSITION] = 'A'; + expected_lcd_buf[LINE_2][C1] = 'B'; + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufLocateLastLineLastLetterAndLcdBufCharAandLcdBufCharBThenBufferEqualToExpected) +{ + lcd_buf_locate(LAST_LCD_LINE, LAST_CHAR_IN_LCD_LINE_POSITION); + lcd_buf_char('A'); + lcd_buf_char('B'); + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE_POSITION] = 'A'; + expected_lcd_buf[LINE_1][C1] = 'B'; + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufStrTestThenLcdBufferEqualToExpectedLcdBuffer) +{ + lcd_buf_str("Test"); + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = 'T'; + expected_lcd_buf[LINE_1][C2] = 'e'; + expected_lcd_buf[LINE_1][C3] = 's'; + expected_lcd_buf[LINE_1][C4] = 't'; + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndSetLcdLocateLastLineLastCharacterWhenLcdBufStrTestThenLcdBufferEqualToExpectedLcdBuffer) +{ + lcd_buf_locate(LAST_LCD_LINE, LAST_CHAR_IN_LCD_LINE_POSITION); + lcd_buf_str("Test"); + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LAST_LCD_LINE][LAST_CHAR_IN_LCD_LINE_POSITION] = 'T'; + expected_lcd_buf[LINE_1][C1] = 'e'; + expected_lcd_buf[LINE_1][C2] = 's'; + expected_lcd_buf[LINE_1][C3] = 't'; + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdInitThenLCD_UPDATE_EVENTflagIsFALSE) +{ + TEST_ASSERT_FALSE(LCD_UPDATE_EVENT); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndLCD_UPDATE_EVENTflagIsTRUEWhenLcdInitThenLCD_UPDATE_EVENTflagIsFalse) +{ + LCD_UPDATE_EVENT = true; + lcd_init(); + TEST_ASSERT_FALSE(LCD_UPDATE_EVENT); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufCharThenLCD_UPDATE_EVENTflagIsTRUE) +{ + lcd_buf_char('a'); + TEST_ASSERT_TRUE(LCD_UPDATE_EVENT); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufStrThenLCD_UPDATE_EVENTflagIsTRUE) +{ + lcd_buf_str("TEST"); + TEST_ASSERT_TRUE(LCD_UPDATE_EVENT); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufClsThenLCD_UPDATE_EVENTflagIsTRUE) +{ + lcd_buf_cls(); + TEST_ASSERT_TRUE(LCD_UPDATE_EVENT); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndLCD_UPDATE_EVENTflagIsTRUEWhenLcdUpdateThenLCD_UPDATE_EVENTflagIsFALSE) +{ + LCD_UPDATE_EVENT = true; + lcd_update(); + TEST_ASSERT_FALSE(LCD_UPDATE_EVENT); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdInitThenLcdCurrentScreenBufferContainSpaces) +{ + define_expected_buffer_value_for_cls(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, prev_lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndLcdBufStrWhenLcdUpdateThenLcdCurrentScreenBufferIsEqualToLcdBuffer) +{ + lcd_buf_str("TEST"); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(lcd_buffer, prev_lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufStrThenLcdCurrentScreenBufferStillContainSpaces) +{ + define_expected_buffer_value_for_cls(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, prev_lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndSetLcdLocateLastLineLastCharacterAndLcdBufStrTestWhenUpdateLcdScrThenSignalSequenceForUpdateLcdScrIsCorrect) +{ + // write "est" on LCD + next_log_no = define_expected_sequence_for_send_string_to_LCD("est", 0); + // move cursor to lasr line last character + next_log_no = define_expected_sequence_for_move_to_last_character_from_first_line_whne_nothing_to_print_on_lcd(next_log_no); + // wirte "T" on LCD + next_log_no = define_expected_sequence_for_send_string_to_LCD("T", next_log_no); + // move cursor to begining of LCD (0,0) + next_log_no = define_expected_sequence_for_lcd_locate_0_0(next_log_no); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + lcd_buf_locate(LAST_LCD_LINE, LAST_CHAR_IN_LCD_LINE_POSITION); + lcd_buf_str("Test"); + lcd_update(); + TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); +} + +#if USE_LCD_BUF_INT == ON +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_24_2_right_ThenLcdBufferContainInt24AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '2'; + expected_lcd_buf[LINE_1][C2] = '4'; + lcd_buf_int(24, 2, right); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_2444_2_right_ThenLcdBufferContainInt2444AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '2'; + expected_lcd_buf[LINE_1][C2] = '4'; + expected_lcd_buf[LINE_1][C3] = '4'; + expected_lcd_buf[LINE_1][C4] = '4'; + lcd_buf_int(2444, 2, right); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_16_4_right_ThenLcdBufferContainInt__16AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = ' '; + expected_lcd_buf[LINE_1][C2] = ' '; + expected_lcd_buf[LINE_1][C3] = '1'; + expected_lcd_buf[LINE_1][C4] = '6'; + lcd_buf_str("1234"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_int(16, 4, right); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_61045_8_left_ThenLcdBufferContainInt61045___AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '6'; + expected_lcd_buf[LINE_1][C2] = '1'; + expected_lcd_buf[LINE_1][C3] = '0'; + expected_lcd_buf[LINE_1][C4] = '4'; + expected_lcd_buf[LINE_1][C5] = '5'; + expected_lcd_buf[LINE_1][C6] = ' '; + expected_lcd_buf[LINE_1][C7] = ' '; + expected_lcd_buf[LINE_1][C8] = ' '; + lcd_buf_str("99999999"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_int(61045, 8, left); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} +#endif +#if USE_LCD_BUF_HEX == ON +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_10_1_left_ThenLcdBufferContain0xaAsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '0'; + expected_lcd_buf[LINE_1][C2] = 'x'; + expected_lcd_buf[LINE_1][C3] = 'a'; + lcd_buf_hex(10, 1, left); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_255_6_right_ThenLcdBufferContain__0xFFAsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = ' '; + expected_lcd_buf[LINE_1][C2] = ' '; + expected_lcd_buf[LINE_1][C3] = '0'; + expected_lcd_buf[LINE_1][C4] = 'x'; + expected_lcd_buf[LINE_1][C5] = 'f'; + expected_lcd_buf[LINE_1][C6] = 'f'; + lcd_buf_str("123456"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_hex(255, 6, right); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_20_5_right_ThenLcdBufferContainInt_0x14AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = ' '; + expected_lcd_buf[LINE_1][C2] = '0'; + expected_lcd_buf[LINE_1][C3] = 'x'; + expected_lcd_buf[LINE_1][C4] = '1'; + expected_lcd_buf[LINE_1][C5] = '4'; + lcd_buf_str("12345"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_hex(20, 5, right); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_20_1_right_ThenLcdBufferContainInt0x14AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '0'; + expected_lcd_buf[LINE_1][C2] = 'x'; + expected_lcd_buf[LINE_1][C3] = '1'; + expected_lcd_buf[LINE_1][C4] = '4'; + lcd_buf_str("1234"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_hex(20, 1, right); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_20_6_left_ThenLcdBufferContainInt_0x14AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '0'; + expected_lcd_buf[LINE_1][C2] = 'x'; + expected_lcd_buf[LINE_1][C3] = '1'; + expected_lcd_buf[LINE_1][C4] = '4'; + expected_lcd_buf[LINE_1][C5] = ' '; + expected_lcd_buf[LINE_1][C6] = ' '; + lcd_buf_str("123456"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_hex(20, 6, left); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} +#endif +#if USE_LCD_BUF_BIN == ON +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_bin_5_6_ThenLcdBufferContainInt0b0101AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '0'; + expected_lcd_buf[LINE_1][C2] = 'b'; + expected_lcd_buf[LINE_1][C3] = '0'; + expected_lcd_buf[LINE_1][C4] = '1'; + expected_lcd_buf[LINE_1][C5] = '0'; + expected_lcd_buf[LINE_1][C6] = '1'; + lcd_buf_str("123456"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_bin(5, 6); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} + +TEST(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_bin_5_1_ThenLcdBufferContainInt0b101AsString) +{ + define_expected_buffer_value_for_cls(); + expected_lcd_buf[LINE_1][C1] = '0'; + expected_lcd_buf[LINE_1][C2] = 'b'; + expected_lcd_buf[LINE_1][C3] = '1'; + expected_lcd_buf[LINE_1][C4] = '0'; + expected_lcd_buf[LINE_1][C5] = '1'; + lcd_buf_str("12345"); + lcd_buf_locate(LINE_1, C1); + lcd_buf_bin(5, 1); + lcd_update(); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_lcd_buf, lcd_buffer, (LCD_X * LCD_Y)); +} +#endif + +// TEST(lcd_hd44780_buffering, ) +// { +// TEST_FAIL_MESSAGE("Added test") +// } + +static void define_expected_buffer_value_for_cls(void) +{ + for (uint8_t line = 0; line < LCD_Y; line++) + { + for (uint8_t collumn = 0; collumn < LCD_X; collumn++) + { + expected_lcd_buf[line][collumn] = ' '; + } + } +} + +static log_no_t define_expected_sequence_for_move_to_last_character_from_first_line_whne_nothing_to_print_on_lcd(log_no_t start_log_no) +{ +#if ((LCD_TYPE == 2004) || (LCD_TYPE == 1604)) + +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(start_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C1), 0x00); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE3_ADR + C1), 0x00); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE4_ADR + C1), 0x00); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE4_ADR + LAST_CHAR_IN_LCD_LINE_POSITION), 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(start_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C1), 0); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE3_ADR + C1), 0); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE4_ADR + C1), 0); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE4_ADR + LAST_CHAR_IN_LCD_LINE_POSITION), 0); +#endif +#elif LCD_TYPE == 1602 +#if USE_RW_PIN == ON + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(start_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C1), 0x00); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + LAST_CHAR_IN_LCD_LINE_POSITION), 0x00); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(start_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + C1), 0); + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE2_ADR + LAST_CHAR_IN_LCD_LINE_POSITION), 0); +#endif +#else + ptrintf("\r\n\r\n\t define_expected_sequence_for_move_to_last_character_from_first_line_whne_nothing_to_print_on_lcd -> go to this function and specify your expected signal sequence for your LCD_TYPE"); +#endif + return next_log_no; +} + +log_no_t define_expected_sequence_for_lcd_locate_0_0(log_no_t start_log_no) +{ +#if USE_RW_PIN == ON + return define_expected_sequence_for_send_cmd_to_LCD(start_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE1_ADR + C1), 0x00); +#else + return define_expected_sequence_for_send_cmd_to_LCD(start_log_no, (uint8_t)(LCDC_SET_DDRAM + LCD_LINE1_ADR + C1), 0); +#endif +} +#endif \ No newline at end of file diff --git a/test/lcd_hd44780/lcd_hd44780_test_common.c b/test/lcd_hd44780/lcd_hd44780_test_common.c index 721e006..2872136 100644 --- a/test/lcd_hd44780/lcd_hd44780_test_common.c +++ b/test/lcd_hd44780/lcd_hd44780_test_common.c @@ -2,7 +2,7 @@ * @Author: lukasz.niewelt * @Date: 2023-12-07 16:59:56 * @Last Modified by: lukasz.niewelt - * @Last Modified time: 2023-12-08 12:30:37 + * @Last Modified time: 2024-01-10 10:13:21 */ #include "lcd_hd44780_test_common.h" @@ -24,56 +24,72 @@ void clear_expected_LCD_Port_delay_dump_data(void) } } -uint8_t read_prev_LCD_PORT_state(void) +uint8_t read_prev_LCD_DATA_PORT_state(void) { return mock_LCD_DATA_PORT; } -uint16_t define_expected_sequence_for_first_15_ms_delay(void) +uint8_t read_prev_LCD_SIG_PORT_state(void) { - uint16_t log_no = 0; - // set E + return mock_LCD_SIG_PORT; +} - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = mock_LCD_E; +log_no_t define_expected_sequence_for_lcd_backlight_disable(log_no_t start_log_no) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + expected_LCD_Port_delay_dump_data[start_log_no][SIG_PORT] &= ~(mock_LCD_BCKL); +#else + expected_LCD_Port_delay_dump_data[start_log_no][SIG_PORT] = (mock_LCD_BCKL); +#endif + expected_LCD_Port_delay_dump_data[start_log_no][DATA_PORT] = 0x00; + expected_LCD_Port_delay_dump_data[start_log_no++][DELAY] = 0; + return start_log_no; +} + +uint16_t define_expected_sequence_for_first_15_ms_delay(log_no_t log_no) +{ + uint8_t lcd_bckl_state = expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT]; + // set E + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = lcd_bckl_state | mock_LCD_E; expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = 0x00; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; // set RS - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = mock_LCD_E | mock_LCD_RS; + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = lcd_bckl_state | mock_LCD_E | mock_LCD_RS; expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; #if USE_RW_PIN == ON // set RW - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = mock_LCD_E | mock_LCD_RS | mock_LCD_RW; + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = lcd_bckl_state | mock_LCD_E | mock_LCD_RS | mock_LCD_RW; expected_LCD_Port_delay_dump_data[log_no][1] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; // delay - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = mock_LCD_E | mock_LCD_RS | mock_LCD_RW; + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = lcd_bckl_state | mock_LCD_E | mock_LCD_RS | mock_LCD_RW; expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 15000; #else - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (mock_LCD_E | mock_LCD_RS); + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (lcd_bckl_state | mock_LCD_E | mock_LCD_RS); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 15000; #endif #if USE_RW_PIN == ON // reset RW - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = mock_LCD_E | mock_LCD_RS; + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = lcd_bckl_state | mock_LCD_E | mock_LCD_RS; expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; #endif // reset RS - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = mock_LCD_E; + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (lcd_bckl_state | mock_LCD_E); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; // Reset E - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = 0x00; + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = lcd_bckl_state; expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; return log_no; } -uint16_t define_expected_sequence_for_read_write_4_bit_data(uint16_t log_no, uint8_t R_W_data, uint16_t delay) +log_no_t define_expected_sequence_for_read_write_4_bit_data(log_no_t log_no, uint8_t R_W_data, uint16_t delay) { // setE expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] | mock_LCD_E; @@ -97,29 +113,31 @@ uint16_t define_expected_sequence_for_read_write_4_bit_data(uint16_t log_no, uin return log_no; } - -uint16_t define_expected_sequence_for_send_cmd_to_LCD(uint16_t log_no, uint8_t cmd, uint8_t expected_readed_data, uint16_t additional_cmd_delay) +#if USE_RW_PIN == ON +uint16_t define_expected_sequence_for_send_cmd_to_LCD(log_no_t log_no, uint8_t cmd, uint8_t expected_readed_data) { // reset RS - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] & ~(mock_LCD_RS)); + if (log_no != 0) { + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] & ~(mock_LCD_RS)); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; } else { - expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = read_prev_LCD_PORT_state(); + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (read_prev_LCD_SIG_PORT_state() & (~(mock_LCD_RS))); + expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = read_prev_LCD_DATA_PORT_state(); } expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; -#if USE_RW_PIN == ON + // reset RW expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] & ~(mock_LCD_RW)); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; -#endif + log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, cmd >> 4, 0); log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, cmd & 0x0F, 0); -#if USE_RW_PIN == ON + // reset_RS expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] & ~(mock_LCD_RS)); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; @@ -142,7 +160,28 @@ uint16_t define_expected_sequence_for_send_cmd_to_LCD(uint16_t log_no, uint8_t c expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; + return log_no; +} #else +uint16_t define_expected_sequence_for_send_cmd_to_LCD(log_no_t log_no, uint8_t cmd, uint16_t additional_cmd_delay) +{ + // reset RS + + if (log_no != 0) + { + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] & ~(mock_LCD_RS)); + expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; + } + else + { + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (read_prev_LCD_SIG_PORT_state() & (~(mock_LCD_RS))); + expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = read_prev_LCD_DATA_PORT_state(); + } + expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; + + log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, cmd >> 4, 0); + log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, cmd & 0x0F, 0); + // wait 120uS expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT]); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; @@ -154,34 +193,35 @@ uint16_t define_expected_sequence_for_send_cmd_to_LCD(uint16_t log_no, uint8_t c expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = additional_cmd_delay; } -#endif - additional_cmd_delay++; // to avoid warnings about unused variable and not complicate the test code too much - expected_readed_data++; // to avoid warnings about unused variable and not complicate the test code too much + return log_no; } +#endif -uint16_t define_expected_sequence_for_send_data_to_LCD(uint16_t log_no, uint8_t data, uint8_t expected_readed_data, uint16_t additional_cmd_delay) +#if USE_RW_PIN == ON +uint16_t define_expected_sequence_for_send_data_to_LCD(log_no_t log_no, uint8_t data, uint8_t expected_readed_data, uint16_t additional_cmd_delay) { // reset RS - expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] | mock_LCD_RS); if (log_no != 0) { + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] | mock_LCD_RS); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; } else { - expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = read_prev_LCD_PORT_state(); + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (read_prev_LCD_SIG_PORT_state() | mock_LCD_RS); + expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = read_prev_LCD_DATA_PORT_state(); } expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; -#if USE_RW_PIN == ON + // reset RW expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] & ~(mock_LCD_RW)); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; -#endif + log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, data >> 4, 0); log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, data & 0x0F, 0); -#if USE_RW_PIN == ON + // reset_RS expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] & ~(mock_LCD_RS)); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; @@ -204,46 +244,88 @@ uint16_t define_expected_sequence_for_send_data_to_LCD(uint16_t log_no, uint8_t expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; + if (additional_cmd_delay != 0) + { + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT]); + expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; + expected_LCD_Port_delay_dump_data[log_no++][DELAY] = additional_cmd_delay; + } + // expected_readed_data++; // to avoid warnings about unused variable and not complicate the test code too much + return log_no; +} #else +uint16_t define_expected_sequence_for_send_data_to_LCD(log_no_t log_no, uint8_t data, uint16_t additional_cmd_delay) +{ + // reset RS + if (log_no != 0) + { + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT] | mock_LCD_RS); + expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; + } + else + { + expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (read_prev_LCD_SIG_PORT_state() | mock_LCD_RS); + expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = read_prev_LCD_DATA_PORT_state(); + } + expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 0; + + log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, data >> 4, 0); + log_no = define_expected_sequence_for_read_write_4_bit_data(log_no, data & 0x0F, 0); + // wait 120uS expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT]); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = 120; -#endif + if (additional_cmd_delay != 0) { expected_LCD_Port_delay_dump_data[log_no][SIG_PORT] = (expected_LCD_Port_delay_dump_data[log_no - 1][SIG_PORT]); expected_LCD_Port_delay_dump_data[log_no][DATA_PORT] = expected_LCD_Port_delay_dump_data[log_no - 1][DATA_PORT]; expected_LCD_Port_delay_dump_data[log_no++][DELAY] = additional_cmd_delay; } - expected_readed_data++; // to avoid warnings about unused variable and not complicate the test code too much + // expected_readed_data++; // to avoid warnings about unused variable and not complicate the test code too much return log_no; } - -uint16_t define_expect_sequence_for_lcd_def_char(uint16_t log_no, const uint8_t CGRAM_bank_x_char_index, const uint8_t *def_char) +#endif +#if USE_DEF_CHAR_FUNCTION == ON +uint16_t define_expect_sequence_for_lcd_def_char(log_no_t log_no, const uint8_t CGRAM_bank_x_char_index, const uint8_t *def_char) { uint8_t CGRAM_start_adress = ((DEF_CHAR_ADR_MASK & CGRAM_bank_x_char_index) * LCD_CGRAM_BYTES_PER_CHAR); uint8_t cmd = (LCDC_SET_CGRAM | CGRAM_start_adress); - - log_no = define_expected_sequence_for_send_cmd_to_LCD(log_no, cmd, 0x00, 0); +#if USE_RW_PIN == ON + log_no = define_expected_sequence_for_send_cmd_to_LCD(log_no, cmd, 0x00); for (uint8_t j = 0; j < LCD_CGRAM_BYTES_PER_CHAR; j++) { log_no = define_expected_sequence_for_send_data_to_LCD(log_no, def_char[j], 0x00, 0); } - log_no = define_expected_sequence_for_send_cmd_to_LCD(log_no, LCDC_SET_DDRAM, 0x00, 0); + log_no = define_expected_sequence_for_send_cmd_to_LCD(log_no, LCDC_SET_DDRAM, 0x00); +#else + log_no = define_expected_sequence_for_send_cmd_to_LCD(log_no, cmd, 0); + + for (uint8_t j = 0; j < LCD_CGRAM_BYTES_PER_CHAR; j++) + { + log_no = define_expected_sequence_for_send_data_to_LCD(log_no, def_char[j], 0); + } + + log_no = define_expected_sequence_for_send_cmd_to_LCD(log_no, LCDC_SET_DDRAM, 0); +#endif return log_no; } - -uint16_t define_expected_sequence_for_send_string_to_LCD(const char *string) +#endif +uint16_t define_expected_sequence_for_send_string_to_LCD(const char *string, uint16_t next_log) { - uint16_t next_log = 0; + // uint16_t next_log = 0; register char c; while ((c = *(string++))) { +#if USE_RW_PIN == ON next_log = define_expected_sequence_for_send_data_to_LCD(next_log, (uint8_t)(c), 0x00, 0); +#else + next_log = define_expected_sequence_for_send_data_to_LCD(next_log, (uint8_t)(c), 0); +#endif } return next_log; } diff --git a/test/lcd_hd44780/lcd_hd44780_test_common.h b/test/lcd_hd44780/lcd_hd44780_test_common.h index a760c4c..8dafc37 100644 --- a/test/lcd_hd44780/lcd_hd44780_test_common.h +++ b/test/lcd_hd44780/lcd_hd44780_test_common.h @@ -2,7 +2,7 @@ * @Author: lukasz.niewelt * @Date: 2023-12-07 16:59:53 * @Last Modified by: lukasz.niewelt - * @Last Modified time: 2023-12-08 12:30:50 + * @Last Modified time: 2024-01-10 13:10:56 */ #include #include "mock_LCD_IO_driver.h" @@ -12,15 +12,26 @@ #define DATA_PORT 1 #define DELAY 2 -extern uint16_t next_log_no; +typedef uint16_t log_no_t; +typedef uint16_t buf_len_t; + +extern log_no_t next_log_no; extern uint16_t expected_LCD_Port_delay_dump_data[BUF_SIZE][LOG_DATA_AMOUNT]; -extern uint16_t expected_buf_lenght; +extern buf_len_t expected_buf_lenght; void clear_expected_LCD_Port_delay_dump_data(void); -uint8_t read_prev_LCD_PORT_state(void); -uint16_t define_expected_sequence_for_first_15_ms_delay(void); -uint16_t define_expected_sequence_for_read_write_4_bit_data(uint16_t log_no, uint8_t R_W_data, uint16_t delay); -uint16_t define_expected_sequence_for_send_cmd_to_LCD(uint16_t log_no, uint8_t cmd, uint8_t expected_readed_data, uint16_t additional_cmd_delay); -uint16_t define_expected_sequence_for_send_data_to_LCD(uint16_t log_no, uint8_t data, uint8_t expected_readed_data, uint16_t additional_cmd_delay); -uint16_t define_expect_sequence_for_lcd_def_char(uint16_t log_no, const uint8_t CGRAM_bank_x_char_index, const uint8_t *def_char); -uint16_t define_expected_sequence_for_send_string_to_LCD(const char *string); \ No newline at end of file +uint8_t read_prev_LCD_DATA_PORT_state(void); +uint8_t read_prev_LCD_SIG_PORT_state(void); +log_no_t define_expected_sequence_for_lcd_backlight_disable(log_no_t start_log_no); +log_no_t define_expected_sequence_for_first_15_ms_delay(log_no_t log_no); +uint16_t define_expected_sequence_for_read_write_4_bit_data(log_no_t log_no, uint8_t R_W_data, uint16_t delay); +#if USE_RW_PIN == ON +uint16_t define_expected_sequence_for_send_cmd_to_LCD(log_no_t log_no, uint8_t cmd, uint8_t expected_readed_data); +uint16_t define_expected_sequence_for_send_data_to_LCD(log_no_t log_no, uint8_t data, uint8_t expected_readed_data, uint16_t additional_cmd_delay); +#else +uint16_t define_expected_sequence_for_send_cmd_to_LCD(log_no_t log_no, uint8_t cmd, uint16_t additional_cmd_delay); +uint16_t define_expected_sequence_for_send_data_to_LCD(log_no_t log_no, uint8_t data, uint16_t additional_cmd_delay); +#endif + +uint16_t define_expect_sequence_for_lcd_def_char(log_no_t log_no, const uint8_t CGRAM_bank_x_char_index, const uint8_t *def_char); +uint16_t define_expected_sequence_for_send_string_to_LCD(const char *string, uint16_t next_log); \ No newline at end of file diff --git a/test/lcd_hd44780/lcd_hd44780_test_init.c b/test/lcd_hd44780/lcd_hd44780_test_init.c index 8c6e57b..cda3dc4 100644 --- a/test/lcd_hd44780/lcd_hd44780_test_init.c +++ b/test/lcd_hd44780/lcd_hd44780_test_init.c @@ -15,15 +15,15 @@ TEST_TEAR_DOWN(lcd_hd44780_init) { /* Cleanup after every test */ } -TEST(lcd_hd44780_init, WhenLcdInitThenLcdDataPinsInit) +TEST(lcd_hd44780_init, WhenLcdInitThenLcdDataSignalBcklPinsInit) { uint8_t expected_resoult = 0; lcd_init(); #if USE_RW_PIN == ON expected_resoult = - ((mock_LCD_RW | mock_LCD_E | mock_LCD_RS) << 4) | (mock_LCD_D4 | mock_LCD_D5 | mock_LCD_D6 | mock_LCD_D7); + ((mock_LCD_BCKL | mock_LCD_RW | mock_LCD_E | mock_LCD_RS) << 4) | (mock_LCD_D4 | mock_LCD_D5 | mock_LCD_D6 | mock_LCD_D7); #else - expected_resoult = ((mock_LCD_E | mock_LCD_RS) << 4) | (mock_LCD_D4 | mock_LCD_D5 | mock_LCD_D6 | mock_LCD_D7); + expected_resoult = ((mock_LCD_BCKL | mock_LCD_E | mock_LCD_RS) << 4) | (mock_LCD_D4 | mock_LCD_D5 | mock_LCD_D6 | mock_LCD_D7); #endif TEST_ASSERT_EQUAL(expected_resoult, mock_get_lcd_init_state()); } @@ -33,15 +33,25 @@ TEST(lcd_hd44780_init, WhenLcdInitThenLcdDataPinsLowAtFirstLog) TEST_ASSERT_EQUAL(0x00, mock_LCD_Port_delay_dump_data[0][DATA_PORT]); } -TEST(lcd_hd44780_init, GivenLcdInitWhenSetAllSignalsFor15msThenLcdPinStatIsCorrect) +TEST(lcd_hd44780_init, GivenLcdInitWhenSetLcdBacklightOffThenLcdPinStatIsCorrect) { - uint16_t expected_buf_lenght = 0; - + expected_buf_lenght = 0; + next_log_no = 0; mock_clear_LCD_Port_delay_dump_data(); clear_expected_LCD_Port_delay_dump_data(); + next_log_no = define_expected_sequence_for_lcd_backlight_disable(0); lcd_init(); - next_log_no = define_expected_sequence_for_first_15_ms_delay(); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); +} +TEST(lcd_hd44780_init, GivenLcdInitWhenSetAllSignalsFor15msThenLcdPinStatIsCorrect) +{ + // mock_clear_LCD_Port_delay_dump_data(); + // clear_expected_LCD_Port_delay_dump_data(); + // lcd_init(); + + next_log_no = define_expected_sequence_for_first_15_ms_delay(next_log_no); expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); @@ -52,7 +62,7 @@ TEST(lcd_hd44780_init, GivenLcdInitWhenSendFirstCmd0x03ThenLcdPinStateSequenceIs // set expected log sequence for sending cmd 0x03 at init next_log_no = define_expected_sequence_for_read_write_4_bit_data(next_log_no, 0x03, 4500); - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } @@ -62,7 +72,7 @@ TEST(lcd_hd44780_init, GivenLcdInitWhenSendSecondCmd0x03ThenLcdPinStateSequenceI // set expected log sequence for sending second cmd 0x03 at init of LCD next_log_no = define_expected_sequence_for_read_write_4_bit_data(next_log_no, 0x03, 110); - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } @@ -72,7 +82,7 @@ TEST(lcd_hd44780_init, GivenLcdInitWhenSendThirdCmd0x03ThenLcdPinStateSequenceIs // set expected log sequence for sending third cmd 0x03 at init of LCD next_log_no = define_expected_sequence_for_read_write_4_bit_data(next_log_no, 0x03, 110); - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } @@ -82,58 +92,74 @@ TEST(lcd_hd44780_init, GivenLcdInitWhenSend4thCmd0x03ThenLcdPinStateSequenceIsCo // set expected log sequence for sending 4'thcmd 0x02 at init of LCD next_log_no = define_expected_sequence_for_read_write_4_bit_data(next_log_no, 0x02, 110); - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } TEST(lcd_hd44780_init, GivenLcdInitWhenSendFunctionSetCmdThenLcdPinStateSequenceIsCorrect) { uint8_t cmd = (LCDC_FUNC | LCDC_FUNC4B | LCDC_FUNC2L | LCDC_FUNC5x7); - uint8_t expected_data_from_LCD = 0; - // set expeted log sequence when sending cmd to LCD - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD, 0); - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); +#if USE_RW_PIN == ON + uint8_t expected_data_from_LCD = 0; + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, 0); +#endif + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } TEST(lcd_hd44780_init, GivenLcdInitWhenSendDisplaySettingsCmdThenLcdPinStateSequenceIsCorrect) { uint8_t cmd = (LCDC_ONOFF | LCDC_CURSOROFF | LCDC_DISPLAYON); - uint8_t expected_data_from_LCD = 0; // set expeted log sequence when sending cmd to LCD - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD, 0); - - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); +#if USE_RW_PIN == ON + uint8_t expected_data_from_LCD = 0; + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, 0); +#endif + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } TEST(lcd_hd44780_init, GivenLcdInitWhenSendDisplayClearScrCmdThenLcdPinStateSequenceIsCorrect) { uint8_t cmd = (LCDC_CLS); +#if USE_RW_PIN == ON uint8_t expected_data_from_LCD = 0; + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, 4900); +#endif - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD, 4900); - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } TEST(lcd_hd44780_init, GivenLcdInitWhenSendDisplayEntryModeCmdThenLcdPinStateSequenceIsCorrect) { uint8_t cmd = (LCDC_ENTRY_MODE | LCDC_ENTRYR); +#if USE_RW_PIN == ON uint8_t expected_data_from_LCD = 0; + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD); +#else + next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, 0); +#endif - next_log_no = define_expected_sequence_for_send_cmd_to_LCD(next_log_no, cmd, expected_data_from_LCD, 0); - uint16_t expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); + expected_buf_lenght = (next_log_no) * (LOG_DATA_AMOUNT); TEST_ASSERT_EQUAL_UINT16_ARRAY(expected_LCD_Port_delay_dump_data, mock_LCD_Port_delay_dump_data, expected_buf_lenght); } -// TEST(lcd_hd44780_init, FirstTest) -// { -// TEST_FAIL_MESSAGE("Implement your test!"); -// } +TEST(lcd_hd44780_init, WhenLcdInitThenLcdBackLightisOff) +{ + lcd_init(); + + TEST_ASSERT_EQUAL(LCD_BCKL_OFF, mock_read_LCD_backlight_status()); +} // TEST(lcd_hd44780_init, FirstTest) // { diff --git a/test/lcd_hd44780/lcd_hd44780_test_main.c b/test/lcd_hd44780/lcd_hd44780_test_main.c index 37e9600..010f073 100644 --- a/test/lcd_hd44780/lcd_hd44780_test_main.c +++ b/test/lcd_hd44780/lcd_hd44780_test_main.c @@ -13,4 +13,5 @@ static void run_all_tests(void) { RUN_TEST_GROUP(lcd_hd44780_init); RUN_TEST_GROUP(lcd_hd44780_basic_functions); + RUN_TEST_GROUP(lcd_hd44780_buffering); } \ No newline at end of file diff --git a/test/lcd_hd44780/lcd_hd44780_test_runner.c b/test/lcd_hd44780/lcd_hd44780_test_runner.c index bffbc86..c9653a6 100644 --- a/test/lcd_hd44780/lcd_hd44780_test_runner.c +++ b/test/lcd_hd44780/lcd_hd44780_test_runner.c @@ -4,10 +4,10 @@ TEST_GROUP_RUNNER(lcd_hd44780_init) { /* Test cases to run */ - RUN_TEST_CASE(lcd_hd44780_init, WhenLcdInitThenLcdDataPinsInit); + RUN_TEST_CASE(lcd_hd44780_init, WhenLcdInitThenLcdDataSignalBcklPinsInit); RUN_TEST_CASE(lcd_hd44780_init, WhenLcdInitThenLcdDataPinsLowAtFirstLog); + RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSetLcdBacklightOffThenLcdPinStatIsCorrect) RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSetAllSignalsFor15msThenLcdPinStatIsCorrect); - RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSendFirstCmd0x03ThenLcdPinStateSequenceIsCorrect); RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSendSecondCmd0x03ThenLcdPinStateSequenceIsCorrect); RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSendThirdCmd0x03ThenLcdPinStateSequenceIsCorrect); @@ -16,7 +16,8 @@ TEST_GROUP_RUNNER(lcd_hd44780_init) RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSendDisplaySettingsCmdThenLcdPinStateSequenceIsCorrect); RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSendDisplayClearScrCmdThenLcdPinStateSequenceIsCorrect); RUN_TEST_CASE(lcd_hd44780_init, GivenLcdInitWhenSendDisplayEntryModeCmdThenLcdPinStateSequenceIsCorrect); - // RUN_TEST_CASE(lcd_hd44780_init, ) + RUN_TEST_CASE(lcd_hd44780_init, WhenLcdInitThenLcdBackLightisOff) + // RUN_TEST_CASE(lcd_hd44780_init, ) } @@ -44,23 +45,65 @@ TEST_GROUP_RUNNER(lcd_hd44780_basic_functions) RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdLocateThenSignalSequenceIsCorrect); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdStrThenSignalSequenceIsCorrect); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUseLcdLocateAndSetAllLinesLocationThenSignalSequenceIsCorrect); +#if USE_LCD_INT == ON RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_24_2_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_2444_2_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_16_4_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_LcdInt_61045_8_left_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueAsString); +#endif +#if USE_LCD_HEX == ON RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_10_1_left_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_255_6_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_20_5_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_hex_20_1_right_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig); +#endif +#if USE_LCD_BIN == ON RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_bin_5_6_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig); RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitWhenUse_lcd_bin_5_1_ThenSignalSequenceForSendigIsEqualToLcdStrWithValueInHexAsStrig); - - // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); - // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); - // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); - // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); - // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); - // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); - // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); +#endif + RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLCDInitWhenUseEnableLcdBackLighThenBacklightPinIsEnabled); + RUN_TEST_CASE(lcd_hd44780_basic_functions, GivenLcdInitAndBacklightPinIsHighWhenLcdBacklightOffThenBacklightPinIsDisabled); // RUN_TEST_CASE(lcd_hd44780_basic_functions, ); } + +TEST_GROUP_RUNNER(lcd_hd44780_buffering) +{ + /* Test cases to run */ +#if LCD_BUFFERING == ON + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdInitThenLcdBufferContainSpaces); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdBufCharThenBufferEqualToExpected); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdBufCharAandLcdBufCharBUsedThenBufferEqualToExpected); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufLocateFirstLineLastLetterAndLcdBufCharAThenBufferEqualToExpected); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufLocateFirstLineLastLetterAndLcdBufCharAandLcdBufCharBThenBufferEqualToExpected); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufLocateLastLineLastLetterAndLcdBufCharAandLcdBufCharBThenBufferEqualToExpected); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufStrTestThenLcdBufferEqualToExpectedLcdBuffer); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndSetLcdLocateLastLineLastCharacterWhenLcdBufStrTestThenLcdBufferEqualToExpectedLcdBuffer); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdInitThenLCD_UPDATE_EVENTflagIsFALSE); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndLCD_UPDATE_EVENTflagIsTRUEWhenLcdInitThenLCD_UPDATE_EVENTflagIsFalse); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufCharThenLCD_UPDATE_EVENTflagIsTRUE); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufStrThenLCD_UPDATE_EVENTflagIsTRUE); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufClsThenLCD_UPDATE_EVENTflagIsTRUE); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndLCD_UPDATE_EVENTflagIsTRUEWhenLcdUpdateThenLCD_UPDATE_EVENTflagIsFALSE); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnWhenLcdInitThenLcdCurrentScreenBufferContainSpaces); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndLcdBufStrWhenLcdUpdateThenLcdCurrentScreenBufferIsEqualToLcdBuffer); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenLcdBufStrThenLcdCurrentScreenBufferStillContainSpaces); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitAndSetLcdLocateLastLineLastCharacterAndLcdBufStrTestWhenUpdateLcdScrThenSignalSequenceForUpdateLcdScrIsCorrect); +#if USE_LCD_BUF_INT == ON + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_24_2_right_ThenLcdBufferContainInt24AsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_2444_2_right_ThenLcdBufferContainInt2444AsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_16_4_right_ThenLcdBufferContainInt__16AsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_LcdInt_61045_8_left_ThenLcdBufferContainInt61045___AsString); +#endif +#if USE_LCD_BUF_HEX == ON + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_10_1_left_ThenLcdBufferContain0xaAsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_255_6_right_ThenLcdBufferContain__0xFFAsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_20_5_right_ThenLcdBufferContainInt_0x14AsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_20_1_right_ThenLcdBufferContainInt0x14AsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_hex_20_6_left_ThenLcdBufferContainInt_0x14AsString); +#endif +#if USE_LCD_BUF_BIN == ON + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_bin_5_6_ThenLcdBufferContainInt0b0101AsString); + RUN_TEST_CASE(lcd_hd44780_buffering, GivenLcdBufferingOnAndLcdInitWhenUse_lcd_bin_5_1_ThenLcdBufferContainInt0b101AsString); +#endif +#endif +} diff --git a/test/lcd_hd44780/mock_LCD_IO_driver.c b/test/lcd_hd44780/mock_LCD_IO_driver.c index 4df8e7a..e4a86b6 100644 --- a/test/lcd_hd44780/mock_LCD_IO_driver.c +++ b/test/lcd_hd44780/mock_LCD_IO_driver.c @@ -22,12 +22,12 @@ static void mock_set_LCD_DATA_PORT_as_outputs(void); static void mock_set_LCD_DATA_PORT_as_inputs(void); static void mock_set_LCD_DATA_PORT_state(uint8_t data); static uint8_t mock_get_LCD_DATA_PORT_state(void); -static void mock_init_LCD_SIGNAL_PINS_as_outputs(void); static void mock_LCD_set_SIG(enum lcd_sig LCD_SIG); static void mock_LCD_reset_SIG(enum lcd_sig LCD_SIG); -static uint8_t mock_get_pinmask(enum lcd_sig *LCD_SIG); +static uint8_t mock_get_pinmask(const enum lcd_sig *LCD_SIG); static void mock_delay_us(uint32_t delay_us); static void mock_dump_LCD_SIG_DATA_DELAY_state(uint32_t delay_us); +static void mock_init_LCD_SIGNAL_PINS_as_outputs(void); /************LCD_IO_driver_interface implementation START**************/ static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { @@ -36,7 +36,7 @@ static const struct LCD_IO_driver_interface_struct LCD_IO_driver = { mock_set_LCD_DATA_PORT_as_inputs, mock_set_LCD_DATA_PORT_state, mock_get_LCD_DATA_PORT_state, - mock_init_LCD_SIGNAL_PINS_as_outputs, + // mock_init_LCD_SIGNAL_PINS_as_outputs, mock_LCD_set_SIG, mock_LCD_reset_SIG, mock_delay_us, @@ -79,16 +79,6 @@ static uint8_t mock_get_LCD_DATA_PORT_state(void) return mock_LCD_DATA_PORT; } -static void mock_init_LCD_SIGNAL_PINS_as_outputs(void) -{ -#if USE_RW_PIN == ON - mock_LCD_SIG_PORT_DIRECTION = mock_LCD_E | mock_LCD_RS | mock_LCD_RW; - ; -#else - mock_LCD_SIG_PORT_DIRECTION = mock_LCD_E | mock_LCD_RS; -#endif -} - static void mock_LCD_set_SIG(enum lcd_sig LCD_SIG) { mock_LCD_SIG_PORT |= mock_get_pinmask(&LCD_SIG); @@ -100,7 +90,7 @@ static void mock_LCD_reset_SIG(enum lcd_sig LCD_SIG) mock_LCD_SIG_PORT &= ~(mock_get_pinmask(&LCD_SIG)); mock_dump_LCD_SIG_DATA_DELAY_state(0); } -static uint8_t mock_get_pinmask(enum lcd_sig *LCD_SIG) +static uint8_t mock_get_pinmask(const enum lcd_sig *LCD_SIG) { uint8_t Pin_Mask = 0; switch (*LCD_SIG) @@ -114,6 +104,9 @@ static uint8_t mock_get_pinmask(enum lcd_sig *LCD_SIG) case LCD_RS: Pin_Mask = mock_LCD_RS; break; + case LCD_BCKL: + Pin_Mask = mock_LCD_BCKL; + break; default: break; } @@ -136,10 +129,21 @@ static void mock_dump_LCD_SIG_DATA_DELAY_state(uint32_t delay_us) dump_reg_pointer = 0; } +static void mock_init_LCD_SIGNAL_PINS_as_outputs(void) +{ +#if USE_RW_PIN == ON + mock_LCD_SIG_PORT_DIRECTION = mock_LCD_BCKL | mock_LCD_E | mock_LCD_RS | mock_LCD_RW; + ; +#else + mock_LCD_SIG_PORT_DIRECTION = mock_LCD_BCKL | mock_LCD_E | mock_LCD_RS; +#endif +} + uint8_t mock_get_lcd_init_state(void) { return (mock_LCD_SIG_PORT_DIRECTION << 4) | (mock_LCD_DATA_PORT_DIRECTION); } + void mock_clear_LCD_Port_delay_dump_data(void) { for (uint16_t i = 0; i < BUF_SIZE; i++) @@ -150,4 +154,19 @@ void mock_clear_LCD_Port_delay_dump_data(void) } } dump_reg_pointer = 0; -} \ No newline at end of file +} + +enum lcd_bckl_status mock_read_LCD_backlight_status(void) +{ +#if LCD_BCKL_PIN_EN_STATE == HIGH + if ((mock_LCD_SIG_PORT & mock_LCD_BCKL) == mock_LCD_BCKL) + return LCD_BCKL_ON; + else + return LCD_BCKL_OFF; +#else + if ((mock_LCD_SIG_PORT & mock_LCD_BCKL) == mock_LCD_BCKL) + return LCD_BCKL_OFF; + else + return LCD_BCKL_ON; +#endif +} diff --git a/test/lcd_hd44780/mock_LCD_IO_driver.h b/test/lcd_hd44780/mock_LCD_IO_driver.h index 6ff8e25..f9ed4d1 100644 --- a/test/lcd_hd44780/mock_LCD_IO_driver.h +++ b/test/lcd_hd44780/mock_LCD_IO_driver.h @@ -5,18 +5,21 @@ * @Last Modified time: 2023-12-07 23:15:32 */ #include -#define BUF_SIZE 2000 -#define LOG_DATA_AMOUNT 3 - -#define mock_LCD_D4 1 << 0 -#define mock_LCD_D5 1 << 1 -#define mock_LCD_D6 1 << 2 -#define mock_LCD_D7 1 << 3 -#define mock_LCD_E 1 << 2 -#define mock_LCD_RS 1 << 0 -#define mock_LCD_RW 1 << 1 // clang-format off +#define BUF_SIZE 2000 +#define LOG_DATA_AMOUNT 3 + +#define mock_LCD_D4 1 << 0 +#define mock_LCD_D5 1 << 1 +#define mock_LCD_D6 1 << 2 +#define mock_LCD_D7 1 << 3 + +#define mock_LCD_E 1 << 2 +#define mock_LCD_RS 1 << 0 +#define mock_LCD_RW 1 << 1 +#define mock_LCD_BCKL 1 << 3 + #define LCDC_CLS 0x01 #define LCDC_HOME 0x02 /********************************/ @@ -48,6 +51,12 @@ #define LCDC_SET_DDRAM 0x80 // clang-format on +enum lcd_bckl_status +{ + LCD_BCKL_ON, + LCD_BCKL_OFF +}; + extern uint8_t mock_LCD_DATA_PORT; extern uint8_t mock_LCD_SIG_PORT; extern uint8_t mock_LCD_DATA_PORT_DIRECTION; @@ -57,3 +66,4 @@ extern uint16_t mock_LCD_Port_delay_dump_data[BUF_SIZE][LOG_DATA_AMOUNT]; uint8_t mock_get_lcd_init_state(void); void mock_clear_LCD_Port_delay_dump_data(void); +enum lcd_bckl_status mock_read_LCD_backlight_status(void); diff --git a/test/template/CMakeLists.txt b/test/template/CMakeLists.txt index ce71deb..489f2fa 100644 --- a/test/template/CMakeLists.txt +++ b/test/template/CMakeLists.txt @@ -1,10 +1,41 @@ +############################################################################################################################# +# file: CMakeLists.txt +# brief: Template "CMakeLists.txt" for building Unit test modules. +# +# usage: +# For build using Unix Makefiles: +# 1. cmake -S./ -B out -G"Unix Makefiles" +# 2. enter the "out" folder +# 3. make all -o lcd_hd44780.o (-jXX additionaly to speed up) +# For build using Ninja: +# 1. cmake -S./ -B out -G"Ninja" +# 2. enter the "out" folder +# 3. ninja -C out -o lcd_hd44780.o (optional with -V and -jxx ->xx numnber of cores) +# additional custom targets for this project: +# If lizard is installed and you are in the out folder: +# 1. make ccm -> code complexity metrix print in console +# 2. make ccmr -> code complexity metrics report generation +# If cppcheck is installed and you are in the out folder +# 1. make cppcheck_src -> static analize for src folder printed in console +# 2. make cppcheck_test-> static analize for src folder printed in console +# If gcovr is installed and you are in the out folder +# 1. make ccr -> code coverage report generation +# +############################################################################################################################# cmake_minimum_required(VERSION 3.10) project(template_test C) add_subdirectory(../unity unity) +set(CUSTOM_TARGETS_FILE_DIR ./custom_targets.cmake) + set(CMAKE_C_FLAGS "${CMAKE_CXX_FLAGS} -Wall -Wextra") +if ("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fdiagnostics-color=always") +elseif ("${CMAKE_C_COMPILER_ID}" STREQUAL "Clang") + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fcolor-diagnostics") +endif() set(INCLUDE_DIRS ../../src @@ -30,6 +61,8 @@ set(GLOBAL_DEFINES ) +include(${CUSTOM_TARGETS_FILE_DIR}) + include_directories(${INCLUDE_DIRS} ${TEST_INCLUDE_DIRS}) add_definitions(${GLOBAL_DEFINES}) diff --git a/test/template/custom_targets.cmake b/test/template/custom_targets.cmake new file mode 100644 index 0000000..18dab91 --- /dev/null +++ b/test/template/custom_targets.cmake @@ -0,0 +1,57 @@ +# PROJECT CUSTOM TARGETS FILE +# here you can define custom targets for the project so all team member can use it in the same way +# some example of custo targets are shown bello those are targets for: +# 1. Code Complexity Metrics +# 2. CppCheck static analize of specific folder +# 3. Code Coverage report generation. + +#TARGETS FOR RUNNING UNIT TESTS +add_custom_target(run template_test) + +# TARGET FOR CHECKING CODE COMPLEXITY METRICS" +# check if lizard software is available +find_program(lizard_program lizard) +if(lizard_program) + message(STATUS "Lizard was found, you can use predefined targets for src folder Code Complexity Metrics: \r\n\tccm,\r\n\ttccmr") +else() + message(STATUS "Lizard was not found. \r\n\tInstall Lizard to get predefined targets for src folder Code Complexity Metrics") +endif() +# Prints CCM for src folder in the console +add_custom_target(ccm lizard src/ --CCN 12 -Tnloc=30 -a 4 --languages cpp -V -i 1) +# Create CCM report in reports/Cylcomatic_Complexity/ +add_custom_target(ccmr lizard src/ --CCN 12 -Tnloc=30 -a 4 --languages cpp -V -o ../../../reports/Cyclomatic_Complexity/Lizard_report.html) + +# TARGET FOR MAKING STATIC ANALYSIS OF THE SOURCE CODE AND UNIT TEST CODE +# check if cppchec software is available +find_program(cppcheck_program cppcheck) +if(cppcheck_program) + message(STATUS "CppCheck was found, you can use predefined targets for static analize : \r\n\tcppcheck_src,\r\n\tcppcheck_tests.") +else() + message(STATUS "CppCheck was not found. \r\n\tInstall CppCheck to get predefined targets for static analize") +endif() +# Prints static analize output for src folder in the console +add_custom_target(cppcheck_src cppcheck ../../../src --enable=all --inconclusive --force --inline-suppr --platform=win64 --suppress=missingInclude --suppress=missingIncludeSystem) #--suppress=unusedFunction) # -> last argument usefull for libraries +# Prints static analize output for specific test_module folder in the console -> example neeed to modify in project +# add_custom_target(cppcheck_test cppcheck ../../../test/lcd_hd44780 -itest/lcd_hd44780/out -itest/lcd_hd44780/out_avr --enable=all --inconclusive --force --inline-suppr --platform=win64 --suppress=missingInclude --suppress=missingIncludeSystem) +add_custom_target(cppcheck_tests echo The target definition is not completed. Complete the target definition in the file custom_targets.cmake ) + +# TARGET FOR CREATING CODE COVERAGE REPORTS +# check if python 3 and gcovr are available +find_program(GCOVR gcovr) +find_program(PYTHON3 python3) +if(PYTHON3) + if(GCOVR) + message(STATUS "python 3 and gcovr was found, you can use predefined targets for uint tests code coverage report generation : \r\n\tccr") + else() + message(STATUS "pyton 3 was found but gcovr was not found. \r\n\tInstall gcovr to get predefined targets for uint tests code coverage report generation") + endif() +else() + if(GCOVR) + message(STATUS "python3 was not found. \r\n\tInstall python 3 to get predefined targets for uint tests code coverage report generation") + else() + message(STATUS "python3 and gcovr were not found. \r\n\tInstall python 3 and gcovr to get predefined targets for uint tests code coverage report generation") + endif() +endif() +# Create Code Coverage report in reports/Code_Coverage/lcd_hd44780_gcov_report.html -> path for gcovr input need to be modified!!! bellow it's only a example of some target from som project +# add_custom_target(ccr python3 -m gcovr CMakeFiles/lcd_hd44780_test.dir/D_/0_Projekty/6_Biblioteki/LCD_HD44780/src -r ../../.. --html-details ../../../reports/Code_Coverage/lcd_hd44780_gcov_report.html) +add_custom_target(ccr echo The target definition is not completed. Complete the target definition in the file custom_targets.cmake ) \ No newline at end of file